blob: 078ec1df76c5399a3b80c37b291a5366f3fb7515 [file] [log] [blame]
Mayank Grover51a7a492018-08-17 16:16:50 +05301/* Copyright (c) 2013-2015,2018 The Linux Foundation. All rights reserved.
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07002 *
3 * Redistribution and use in source and binary forms, with or without
4 * modification, are permitted provided that the following conditions are
5 * met:
6 * * Redistributions of source code must retain the above copyright
7 * notice, this list of conditions and the following disclaimer.
8 * * Redistributions in binary form must reproduce the above
9 * copyright notice, this list of conditions and the following
10 * disclaimer in the documentation and/or other materials provided
11 * with the distribution.
12 * * Neither the name of The Linux Foundation nor the names of its
13 * contributors may be used to endorse or promote products derived
14 * from this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED
17 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
18 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT
19 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS
20 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
21 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
22 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
23 * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
24 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
25 * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
26 * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29#include <string.h>
30#include <stdlib.h>
31#include <debug.h>
32#include <reg.h>
33#include <mmc_sdhci.h>
34#include <sdhci.h>
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -070035#include <sdhci_msm.h>
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -070036#include <partition_parser.h>
37#include <platform/iomap.h>
38#include <platform/timer.h>
vijay kumar4f4405f2014-08-08 11:49:53 +053039#include <platform.h>
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -070040
41extern void clock_init_mmc(uint32_t);
42extern void clock_config_mmc(uint32_t, uint32_t);
43
44/* data access time unit in ns */
45static const uint32_t taac_unit[] =
46{
47 1, 10, 100, 1000, 10000, 100000, 1000000, 10000000
48};
49
50/* data access time value x 10 */
51static const uint32_t taac_value[] =
52{
53 0, 10, 12, 13, 15, 20, 25, 30, 35, 40, 45, 50, 55, 60, 70, 80
54};
55
56/* data transfer rate in kbit/s */
57static const uint32_t xfer_rate_unit[] =
58{
59 100, 1000, 10000, 100000, 0, 0, 0, 0
60};
61
62/* data transfer rate value x 10*/
63static const uint32_t xfer_rate_value[] =
64{
65 0, 10, 12, 13, 15, 20, 26, 30, 35, 40, 45, 52, 55, 60, 70, 80
66};
67
68/*
69 * Function: mmc decode and save csd
70 * Arg : Card structure & raw csd
71 * Return : 0 on Success, 1 on Failure
72 * Flow : Decodes CSD response received from the card.
73 * Note that we have defined only few of the CSD elements
74 * in csd structure. We'll only decode those values.
75 */
76static uint32_t mmc_decode_and_save_csd(struct mmc_card *card)
77{
78 uint32_t mmc_sizeof = 0;
79 uint32_t mmc_unit = 0;
80 uint32_t mmc_value = 0;
81 uint32_t mmc_temp = 0;
82 uint32_t *raw_csd = card->raw_csd;
83
84 struct mmc_csd mmc_csd;
85
86 mmc_sizeof = sizeof(uint32_t) * 8;
87
88 mmc_csd.cmmc_structure = UNPACK_BITS(raw_csd, 126, 2, mmc_sizeof);
89
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -070090 if (MMC_CARD_SD(card)) {
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -070091 /* Parse CSD according to SD card spec. */
92
93 /* CSD register is little bit differnet for CSD version 2.0 High
94 * Capacity and CSD version 1.0/2.0 Standard memory cards.
95 * In Version 2.0 some of the fields have fixed values and it's
96 * not necessary for host to refer these fields in CSD sent by
97 * card
98 */
99
100 if (mmc_csd.cmmc_structure == 1) {
101 /* CSD Version 2.0 */
102 mmc_csd.card_cmd_class = UNPACK_BITS(raw_csd, 84, 12, mmc_sizeof);
103 /* Fixed value is 9 = 2^9 = 512 */
104 mmc_csd.write_blk_len = 512;
105 /* Fixed value is 9 = 512 */
106 mmc_csd.read_blk_len = 512;
107 /* Fixed value: 010b */
108 mmc_csd.r2w_factor = 0x2;
109 /* Not there in version 2.0 */
110 mmc_csd.c_size_mult = 0;
111 mmc_csd.c_size = UNPACK_BITS(raw_csd, 48, 22, mmc_sizeof);
112 mmc_csd.nsac_clk_cycle = UNPACK_BITS(raw_csd, 104, 8, mmc_sizeof)
113 * 100;
114
115 mmc_unit = UNPACK_BITS(raw_csd, 112, 3, mmc_sizeof);
116 mmc_value = UNPACK_BITS(raw_csd, 115, 4, mmc_sizeof);
117 mmc_csd.taac_ns = (taac_value[mmc_value] * taac_unit[mmc_unit])
118 / 10;
119
120 mmc_csd.erase_blk_len = 1;
121 mmc_csd.read_blk_misalign = 0;
122 mmc_csd.write_blk_misalign = 0;
123 mmc_csd.read_blk_partial = 0;
124 mmc_csd.write_blk_partial = 0;
125
126 mmc_unit = UNPACK_BITS(raw_csd, 96, 3, mmc_sizeof);
127 mmc_value = UNPACK_BITS(raw_csd, 99, 4, mmc_sizeof);
128 mmc_csd.tran_speed = (xfer_rate_value[mmc_value] *
129 xfer_rate_unit[mmc_unit]) / 10;
130
131 mmc_csd.wp_grp_size = 0x0;
132 mmc_csd.wp_grp_enable = 0x0;
133 mmc_csd.perm_wp = UNPACK_BITS(raw_csd, 13, 1, mmc_sizeof);
134 mmc_csd.temp_wp = UNPACK_BITS(raw_csd, 12, 1, mmc_sizeof);
135
136 /* Calculate the card capcity */
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -0700137 card->capacity = (unsigned long long) (1 + mmc_csd.c_size) * 512 * 1024;
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -0700138 } else {
139 /* CSD Version 1.0 */
140 mmc_csd.card_cmd_class = UNPACK_BITS(raw_csd, 84, 12, mmc_sizeof);
141
142 mmc_temp = UNPACK_BITS(raw_csd, 22, 4, mmc_sizeof);
143 mmc_csd.write_blk_len = (mmc_temp > 8 && mmc_temp < 12) ?
144 (1 << mmc_temp) : 512;
145
146 mmc_temp = UNPACK_BITS(raw_csd, 80, 4, mmc_sizeof);
147 mmc_csd.read_blk_len = (mmc_temp > 8 && mmc_temp < 12) ?
148 (1 << mmc_temp) : 512;
149
150 mmc_unit = UNPACK_BITS(raw_csd, 112, 3, mmc_sizeof);
151 mmc_value = UNPACK_BITS(raw_csd, 115, 4, mmc_sizeof);
152 mmc_csd.taac_ns = (taac_value[mmc_value] * taac_unit[mmc_unit])
153 / 10;
154
155 mmc_unit = UNPACK_BITS(raw_csd, 96, 3, mmc_sizeof);
156 mmc_value = UNPACK_BITS(raw_csd, 99, 4, mmc_sizeof);
157 mmc_csd.tran_speed = (xfer_rate_value[mmc_value] *
158 xfer_rate_unit[mmc_unit]) / 10;
159
160 mmc_csd.nsac_clk_cycle = UNPACK_BITS(raw_csd, 104, 8, mmc_sizeof)
161 * 100;
162
163 mmc_csd.r2w_factor = UNPACK_BITS(raw_csd, 26, 3, mmc_sizeof);
164 mmc_csd.sector_size = UNPACK_BITS(raw_csd, 39, 7, mmc_sizeof) + 1;
165
166 mmc_csd.erase_blk_len = UNPACK_BITS(raw_csd, 46, 1, mmc_sizeof);
167 mmc_csd.read_blk_misalign = UNPACK_BITS(raw_csd, 77, 1, mmc_sizeof);
168 mmc_csd.write_blk_misalign = UNPACK_BITS(raw_csd, 78, 1, mmc_sizeof);
169 mmc_csd.read_blk_partial = UNPACK_BITS(raw_csd, 79, 1, mmc_sizeof);
170 mmc_csd.write_blk_partial = UNPACK_BITS(raw_csd, 21, 1, mmc_sizeof);
171
172 mmc_csd.c_size_mult = UNPACK_BITS(raw_csd, 47, 3, mmc_sizeof);
173 mmc_csd.c_size = UNPACK_BITS(raw_csd, 62, 12, mmc_sizeof);
174 mmc_csd.wp_grp_size = UNPACK_BITS(raw_csd, 32, 7, mmc_sizeof);
175 mmc_csd.wp_grp_enable = UNPACK_BITS(raw_csd, 31, 1, mmc_sizeof);
176 mmc_csd.perm_wp = UNPACK_BITS(raw_csd, 13, 1, mmc_sizeof);
177 mmc_csd.temp_wp = UNPACK_BITS(raw_csd, 12, 1, mmc_sizeof);
178
179 /* Calculate the card capacity */
180 mmc_temp = (1 << (mmc_csd.c_size_mult + 2)) * (mmc_csd.c_size + 1);
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -0700181 card->capacity = (unsigned long long)mmc_temp * mmc_csd.read_blk_len;
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -0700182 }
183 } else {
184 /* Parse CSD according to MMC card spec. */
185 mmc_csd.spec_vers = UNPACK_BITS(raw_csd, 122, 4, mmc_sizeof);
186 mmc_csd.card_cmd_class = UNPACK_BITS(raw_csd, 84, 12, mmc_sizeof);
187 mmc_csd.write_blk_len = 1 << UNPACK_BITS(raw_csd, 22, 4, mmc_sizeof);
188 mmc_csd.read_blk_len = 1 << UNPACK_BITS(raw_csd, 80, 4, mmc_sizeof);
189 mmc_csd.r2w_factor = UNPACK_BITS(raw_csd, 26, 3, mmc_sizeof);
190 mmc_csd.c_size_mult = UNPACK_BITS(raw_csd, 47, 3, mmc_sizeof);
191 mmc_csd.c_size = UNPACK_BITS(raw_csd, 62, 12, mmc_sizeof);
192 mmc_csd.nsac_clk_cycle = UNPACK_BITS(raw_csd, 104, 8, mmc_sizeof) * 100;
193
194 mmc_unit = UNPACK_BITS(raw_csd, 112, 3, mmc_sizeof);
195 mmc_value = UNPACK_BITS(raw_csd, 115, 4, mmc_sizeof);
196 mmc_csd.taac_ns = (taac_value[mmc_value] * taac_unit[mmc_unit]) / 10;
197
198 mmc_csd.read_blk_misalign = UNPACK_BITS(raw_csd, 77, 1, mmc_sizeof);
199 mmc_csd.write_blk_misalign = UNPACK_BITS(raw_csd, 78, 1, mmc_sizeof);
200 mmc_csd.read_blk_partial = UNPACK_BITS(raw_csd, 79, 1, mmc_sizeof);
201 mmc_csd.write_blk_partial = UNPACK_BITS(raw_csd, 21, 1, mmc_sizeof);
202
203 /* Ignore -- no use of this value. */
204 mmc_csd.tran_speed = 0x00;
205
206 mmc_csd.erase_grp_size = UNPACK_BITS(raw_csd, 42, 5, mmc_sizeof);
207 mmc_csd.erase_grp_mult = UNPACK_BITS(raw_csd, 37, 5, mmc_sizeof);
208 mmc_csd.wp_grp_size = UNPACK_BITS(raw_csd, 32, 5, mmc_sizeof);
209 mmc_csd.wp_grp_enable = UNPACK_BITS(raw_csd, 31, 1, mmc_sizeof);
210 mmc_csd.perm_wp = UNPACK_BITS(raw_csd, 13, 1, mmc_sizeof);
211 mmc_csd.temp_wp = UNPACK_BITS(raw_csd, 12, 1, mmc_sizeof);
212
213 /* Calculate the card capcity */
214 if (mmc_csd.c_size != 0xFFF) {
215 /* For cards less than or equal to 2GB */
216 mmc_temp = (1 << (mmc_csd.c_size_mult + 2)) * (mmc_csd.c_size + 1);
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -0700217 card->capacity = (unsigned long long) mmc_temp * mmc_csd.read_blk_len;
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -0700218 } else {
219 /* For cards greater than 2GB, Ext CSD register's SEC_COUNT
220 * is used to calculate the size.
221 */
222 uint64_t sec_count;
223
224 sec_count = (card->ext_csd[MMC_SEC_COUNT4] << MMC_SEC_COUNT4_SHIFT)
225 | (card->ext_csd[MMC_SEC_COUNT3] << MMC_SEC_COUNT3_SHIFT)
226 | (card->ext_csd[MMC_SEC_COUNT2] << MMC_SEC_COUNT2_SHIFT)
227 | card->ext_csd[MMC_SEC_COUNT1];
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -0700228 card->capacity = sec_count * MMC_BLK_SZ;
229 }
230 }
231
232 /* save the information in card structure */
233 memcpy((struct mmc_csd *)&card->csd,(struct mmc_csd *)&mmc_csd,
234 sizeof(struct mmc_csd));
235
vijay kumar488e4842015-08-21 20:37:29 +0530236 if (MMC_CARD_MMC(card)) {
vijay kumar697dbfd2014-04-24 17:12:49 +0530237
vijay kumar488e4842015-08-21 20:37:29 +0530238 /* Calculate the wp grp size */
239 if (card->ext_csd[MMC_ERASE_GRP_DEF])
240 card->wp_grp_size = MMC_HC_ERASE_MULT * card->ext_csd[MMC_HC_ERASE_GRP_SIZE] / MMC_BLK_SZ;
241 else
242 card->wp_grp_size = (card->csd.wp_grp_size + 1) * (card->csd.erase_grp_size + 1) \
243 * (card->csd.erase_grp_mult + 1);
244
245 card->rpmb_size = RPMB_PART_MIN_SIZE * card->ext_csd[RPMB_SIZE_MULT];
246 card->rel_wr_count = card->ext_csd[REL_WR_SEC_C];
247 }
248 else {
249 card->wp_grp_size = (card->csd.wp_grp_size + 1) * (card->csd.erase_grp_size + 1) \
250 * (card->csd.erase_grp_mult + 1);
251 }
Channagoud Kadabi31d648c2015-01-29 12:59:00 -0800252
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -0700253 dprintf(SPEW, "Decoded CSD fields:\n");
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -0700254 dprintf(SPEW, "cmmc_structure: %u\n", mmc_csd.cmmc_structure);
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -0700255 dprintf(SPEW, "card_cmd_class: %x\n", mmc_csd.card_cmd_class);
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -0700256 dprintf(SPEW, "write_blk_len: %u\n", mmc_csd.write_blk_len);
257 dprintf(SPEW, "read_blk_len: %u\n", mmc_csd.read_blk_len);
258 dprintf(SPEW, "r2w_factor: %u\n", mmc_csd.r2w_factor);
259 dprintf(SPEW, "sector_size: %u\n", mmc_csd.sector_size);
260 dprintf(SPEW, "c_size_mult:%u\n", mmc_csd.c_size_mult);
261 dprintf(SPEW, "c_size: %u\n", mmc_csd.c_size);
262 dprintf(SPEW, "nsac_clk_cycle: %u\n", mmc_csd.nsac_clk_cycle);
263 dprintf(SPEW, "taac_ns: %u\n", mmc_csd.taac_ns);
264 dprintf(SPEW, "tran_speed: %u kbps\n", mmc_csd.tran_speed);
265 dprintf(SPEW, "erase_blk_len: %u\n", mmc_csd.erase_blk_len);
266 dprintf(SPEW, "read_blk_misalign: %u\n", mmc_csd.read_blk_misalign);
267 dprintf(SPEW, "write_blk_misalign: %u\n", mmc_csd.write_blk_misalign);
268 dprintf(SPEW, "read_blk_partial: %u\n", mmc_csd.read_blk_partial);
269 dprintf(SPEW, "write_blk_partial: %u\n", mmc_csd.write_blk_partial);
vijay kumar697dbfd2014-04-24 17:12:49 +0530270 dprintf(SPEW, "wp_grp_size: %u\n", card->wp_grp_size);
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -0700271 dprintf(SPEW, "Card Capacity: %llu Bytes\n", card->capacity);
272
273 return 0;
274}
275
276/*
277 * Function: mmc decode & save cid
278 * Arg : card structure & raw cid
279 * Return : 0 on Success, 1 on Failure
280 * Flow : Decode CID sent by the card.
281 */
282static uint32_t mmc_decode_and_save_cid(struct mmc_card *card,
283 uint32_t *raw_cid)
284{
285 struct mmc_cid mmc_cid;
286 uint32_t mmc_sizeof = 0;
287 int i = 0;
288
289 if (!raw_cid) {
290 return 1;
291 }
292
293 mmc_sizeof = sizeof(uint32_t) * 8;
294
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -0700295 if (MMC_CARD_SD(card)) {
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -0700296 mmc_cid.mid = UNPACK_BITS(raw_cid, 120, 8, mmc_sizeof);
297 mmc_cid.oid = UNPACK_BITS(raw_cid, 104, 16, mmc_sizeof);
298
299 for (i = 0; i < 5; i++) {
300 mmc_cid.pnm[i] = (uint8_t)UNPACK_BITS(raw_cid,
301 (104 - 8 * (i + 1)),
302 8,
303 mmc_sizeof);
304 }
305 mmc_cid.pnm[5] = 0;
306 mmc_cid.pnm[6] = 0;
307
308 mmc_cid.prv = UNPACK_BITS(raw_cid, 56, 8, mmc_sizeof);
David Ng571b8c32013-07-30 19:17:42 -0700309 mmc_cid.psn = UNPACK_BITS(raw_cid, 24, 32, mmc_sizeof);
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -0700310 mmc_cid.month = UNPACK_BITS(raw_cid, 8, 4, mmc_sizeof);
311 mmc_cid.year = UNPACK_BITS(raw_cid, 12, 8, mmc_sizeof);
312 mmc_cid.year += 2000;
313 } else {
314 mmc_cid.mid = UNPACK_BITS(raw_cid, 120, 8, mmc_sizeof);
315 mmc_cid.oid = UNPACK_BITS(raw_cid, 104, 16, mmc_sizeof);
316
317 for (i = 0; i < 6; i++) {
318 mmc_cid.pnm[i] = (uint8_t)UNPACK_BITS(raw_cid, (104 - 8 * (i + 1)),
319 8, mmc_sizeof);
320 }
321 mmc_cid.pnm[6] = 0;
322
323 mmc_cid.prv = UNPACK_BITS(raw_cid, 48, 8, mmc_sizeof);
David Ng571b8c32013-07-30 19:17:42 -0700324 mmc_cid.psn = UNPACK_BITS(raw_cid, 16, 32, mmc_sizeof);
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -0700325 mmc_cid.month = UNPACK_BITS(raw_cid, 8, 4, mmc_sizeof);
326 mmc_cid.year = UNPACK_BITS(raw_cid, 12, 4, mmc_sizeof);
327 mmc_cid.year += 1997;
328 }
329
330 /* save it in card database */
331 memcpy((struct mmc_cid *)&card->cid,
332 (struct mmc_cid *)&mmc_cid, sizeof(struct mmc_cid));
333
334 dprintf(SPEW, "Decoded CID fields:\n");
335 dprintf(SPEW, "Manufacturer ID: %x\n", mmc_cid.mid);
336 dprintf(SPEW, "OEM ID: 0x%x\n", mmc_cid.oid);
337 dprintf(SPEW, "Product Name: %s\n", mmc_cid.pnm);
338 dprintf(SPEW, "Product revision: %d.%d\n", (mmc_cid.prv >> 4),
339 (mmc_cid.prv & 0xF));
340 dprintf(SPEW, "Product serial number: %X\n", mmc_cid.psn);
341 dprintf(SPEW, "Manufacturing date: %d %d\n", mmc_cid.month, mmc_cid.year);
342
343 return 0;
344}
345
346/*
347 * Function: mmc reset cards
348 * Arg : host structure
349 * Return : 0 on Success, 1 on Failure
350 * Flow : Reset all the cards to idle condition (CMD 0)
351 */
352static uint8_t mmc_reset_card(struct sdhci_host *host)
353{
354 struct mmc_command cmd;
355
356 memset((struct mmc_command *)&cmd, 0, sizeof(struct mmc_command));
357
358 cmd.cmd_index = CMD0_GO_IDLE_STATE;
359 cmd.argument = 0;
360 cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
361 cmd.resp_type = SDHCI_CMD_RESP_NONE;
362
363 /* send command */
364 return sdhci_send_command(host, &cmd);
365}
366
367/*
368 * Function: mmc operations command
369 * Arg : host & card structure
370 * Return : 0 on Success, 1 on Failure
371 * Flow : Send CMD1 to know whether the card supports host VDD profile or not.
372 */
373static uint32_t mmc_send_op_cond(struct sdhci_host *host, struct mmc_card *card)
374{
375 struct mmc_command cmd;
376 uint32_t mmc_resp = 0;
377 uint32_t mmc_ret = 0;
378 uint32_t mmc_retry = 0;
379
380 memset((struct mmc_command *)&cmd, 0, sizeof(struct mmc_command));
381
382 /* CMD1 format:
383 * [31] Busy bit
384 * [30:29] Access mode
385 * [28:24] reserved
386 * [23:15] 2.7-3.6
387 * [14:8] 2.0-2.6
388 * [7] 1.7-1.95
389 * [6:0] reserved
390 */
391
392 cmd.cmd_index = CMD1_SEND_OP_COND;
393 cmd.argument = card->ocr;
394 cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
395 cmd.resp_type = SDHCI_CMD_RESP_R3;
396
397 do {
398 mmc_ret = sdhci_send_command(host, &cmd);
399 if (mmc_ret)
400 return mmc_ret;
401
402 /* Command returned success, now it's time to examine response */
403 mmc_resp = cmd.resp[0];
404
405 /* Check the response for busy status */
406 if (!(mmc_resp & MMC_OCR_BUSY)) {
407 mmc_retry++;
408 mdelay(1);
409 continue;
410 } else
411 break;
412 } while (mmc_retry < MMC_MAX_COMMAND_RETRY);
413
414 /* If we reached here after max retries, we failed to get OCR */
415 if (mmc_retry == MMC_MAX_COMMAND_RETRY && !(mmc_resp & MMC_OCR_BUSY)) {
416 dprintf(CRITICAL, "Card has busy status set. Init did not complete\n");
417 return 1;
418 }
419
420 /* Response contains card's ocr. Update card's information */
421 card->ocr = mmc_resp;
422
423 if (mmc_resp & MMC_OCR_SEC_MODE)
424 card->type = MMC_TYPE_MMCHC;
425 else
426 card->type = MMC_TYPE_STD_MMC;
427
428 return 0;
429}
430
431/*
432 * Function: mmc send cid
433 * Arg : host & card structure
434 * Return : 0 on Success, 1 on Failure
435 * Flow : Request any card to send its uniquie card identification
436 * (CID) number (CMD2).
437 */
438static uint32_t mmc_all_send_cid(struct sdhci_host *host, struct mmc_card *card)
439{
440 struct mmc_command cmd;
441 uint32_t mmc_ret = 0;
442
443 memset((struct mmc_command *)&cmd, 0, sizeof(struct mmc_command));
444
445 /* CMD2 Format:
446 * [31:0] stuff bits
447 */
448 cmd.cmd_index = CMD2_ALL_SEND_CID;
449 cmd.argument = 0;
450 cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
451 cmd.resp_type = SDHCI_CMD_RESP_R2;
452
453 /* send command */
454 mmc_ret = sdhci_send_command(host, &cmd);
455 if (mmc_ret) {
456 return mmc_ret;
457 }
458
459 /* Response contains card's 128 bits CID register */
460 mmc_ret = mmc_decode_and_save_cid(card, cmd.resp);
461 if (mmc_ret) {
462 return mmc_ret;
463 }
464
465 return 0;
466}
467
468/*
469 * Function: mmc send relative address
470 * Arg : host & card structure
471 * Return : 0 on Success, 1 on Failure
472 * Flow : Ask card to send it's relative card address (RCA).
473 * This RCA number is shorter than CID and is used by
474 * the host to address the card in future (CMD3)
475 */
476static uint32_t mmc_send_relative_address(struct sdhci_host *host,
477 struct mmc_card *card)
478{
479 struct mmc_command cmd;
480 uint32_t mmc_ret = 0;
481
482 memset((struct mmc_command *)&cmd, 0, sizeof(struct mmc_command));
483
484 /* CMD3 Format:
485 * [31:0] stuff bits
486 */
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -0700487 if (MMC_CARD_SD(card)) {
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -0700488 cmd.cmd_index = CMD3_SEND_RELATIVE_ADDR;
489 cmd.argument = 0;
490 cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
491 cmd.resp_type = SDHCI_CMD_RESP_R6;
492
493 /* send command */
494 mmc_ret = sdhci_send_command(host, &cmd);
495 if (mmc_ret)
496 return mmc_ret;
497
498 /* For sD, card will send RCA. Store it */
499 card->rca = (cmd.resp[0] >> 16);
500 } else {
501 cmd.cmd_index = CMD3_SEND_RELATIVE_ADDR;
502 cmd.argument = (MMC_RCA << 16);
503 card->rca = (cmd.argument >> 16);
504 cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
505 cmd.resp_type = SDHCI_CMD_RESP_R6;
506
507 /* send command */
508 mmc_ret = sdhci_send_command(host, &cmd);
509 if (mmc_ret)
510 return mmc_ret;
511 }
512
513 return 0;
514}
515
516/*
517 * Function: mmc send csd
518 * Arg : host, card structure & o/p arg to store csd
519 * Return : 0 on Success, 1 on Failure
520 * Flow : Requests card to send it's CSD register's contents. (CMD9)
521 */
522static uint32_t mmc_send_csd(struct sdhci_host *host, struct mmc_card *card)
523{
524 struct mmc_command cmd;
525 uint32_t mmc_arg = 0;
526 uint32_t mmc_ret = 0;
527
528 memset((struct mmc_command *)&cmd, 0, sizeof(struct mmc_command));
529
530 /* CMD9 Format:
531 * [31:16] RCA
532 * [15:0] stuff bits
533 */
534 mmc_arg |= card->rca << 16;
535
536 cmd.cmd_index = CMD9_SEND_CSD;
537 cmd.argument = mmc_arg;
538 cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
539 cmd.resp_type = SDHCI_CMD_RESP_R2;
540
541 /* send command */
542 mmc_ret = sdhci_send_command(host, &cmd);
543 if (mmc_ret)
544 return mmc_ret;
545
546 /* response contains the card csd */
547 memcpy(card->raw_csd, cmd.resp, sizeof(cmd.resp));
548
549 return 0;
550}
551
552/*
553 * Function: mmc select card
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -0700554 * Arg : host, card structure
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -0700555 * Return : 0 on Success, 1 on Failure
556 * Flow : Selects a card by sending CMD7 to the card with its RCA.
557 * If RCA field is set as 0 ( or any other address ),
558 * the card will be de-selected. (CMD7)
559 */
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -0700560static uint32_t mmc_select_card(struct sdhci_host *host, struct mmc_card *card)
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -0700561{
562 struct mmc_command cmd;
563 uint32_t mmc_arg = 0;
564 uint32_t mmc_ret = 0;
565
566 memset((struct mmc_command *)&cmd, 0, sizeof(struct mmc_command));
567
568 /* CMD7 Format:
569 * [31:16] RCA
570 * [15:0] stuff bits
571 */
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -0700572 mmc_arg |= card->rca << 16;
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -0700573
574 cmd.cmd_index = CMD7_SELECT_DESELECT_CARD;
575 cmd.argument = mmc_arg;
576 cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
577
578 /* If we are deselecting card, we do not get response */
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -0700579 if (card->rca) {
580 if (MMC_CARD_SD(card))
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -0700581 cmd.resp_type = SDHCI_CMD_RESP_R1B;
582 else
583 cmd.resp_type = SDHCI_CMD_RESP_R1;
584 } else
585 cmd.resp_type = SDHCI_CMD_RESP_NONE;
586
587 /* send command */
588 mmc_ret = sdhci_send_command(host, &cmd);
589 if (mmc_ret)
590 return mmc_ret;
591
592 return 0;
593}
594
595/*
596 * Function: mmc set block len
597 * Arg : host, card structure & block length
598 * Return : 0 on Success, 1 on Failure
599 * Flow : Send command to set block length.
600 */
601static uint32_t mmc_set_block_len(struct sdhci_host *host,
602 struct mmc_card *card,
603 uint32_t block_len)
604{
605 struct mmc_command cmd;
606 uint32_t mmc_ret = 0;
607
608 memset((struct mmc_command *)&cmd, 0, sizeof(struct mmc_command));
609
610 /* CMD16 Format:
611 * [31:0] block length
612 */
613
614 cmd.cmd_index = CMD16_SET_BLOCKLEN;
615 cmd.argument = block_len;
616 cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
617 cmd.resp_type = SDHCI_CMD_RESP_R1;
618
619 /* send command */
620 mmc_ret = sdhci_send_command(host, &cmd);
621 if (mmc_ret)
622 return mmc_ret;
623
624 /*
625 * If blocklength is larger than 512 bytes,
626 * the card sets BLOCK_LEN_ERROR bit.
627 */
628 if (cmd.resp[0] & MMC_R1_BLOCK_LEN_ERR) {
629 dprintf(CRITICAL, "The block length is not supported by the card\n");
630 return 1;
631 }
632
633 return 0;
634}
635
636/*
637 * Function: mmc get card status
638 * Arg : host, card structure & o/p argument card status
639 * Return : 0 on Success, 1 on Failure
640 * Flow : Get the current status of the card
641 */
642static uint32_t mmc_get_card_status(struct sdhci_host *host,
643 struct mmc_card *card, uint32_t *status)
644{
645 struct mmc_command cmd;
646 uint32_t mmc_ret = 0;
647
648 memset((struct mmc_command *)&cmd, 0, sizeof(struct mmc_command));
649
650 /* CMD13 Format:
651 * [31:16] RCA
652 * [15:0] stuff bits
653 */
654 cmd.cmd_index = CMD13_SEND_STATUS;
655 cmd.argument = card->rca << 16;
656 cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
657 cmd.resp_type = SDHCI_CMD_RESP_R1;
658
659 /* send command */
660 mmc_ret = sdhci_send_command(host, &cmd);
661 if (mmc_ret)
662 return mmc_ret;
663
664 /* Checking ADDR_OUT_OF_RANGE error in CMD13 response */
665 if ((cmd.resp[0] >> 31) & 0x01)
666 return 1;
667
668 *status = cmd.resp[0];
669 return 0;
670}
671
672/*
673 * Function: mmc get ext csd
674 * Arg : host, card structure & array to hold ext attributes
675 * Return : 0 on Success, 1 on Failure
676 * Flow : Send ext csd command & get the card attributes
677 */
678static uint32_t mmc_get_ext_csd(struct sdhci_host *host, struct mmc_card *card)
679{
680 struct mmc_command cmd;
681 uint32_t mmc_ret = 0;
682
683 card->ext_csd = memalign(CACHE_LINE, ROUNDUP(512, CACHE_LINE));
684
685 ASSERT(card->ext_csd);
686
687 memset(card->ext_csd, 0, sizeof(card->ext_csd));
688
Mayank Grovereed5c062016-12-02 18:19:49 +0530689 /* invalidate any cached buf data (controller updates main memory) */
690 arch_invalidate_cache_range((addr_t) card->ext_csd, 512);
691
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -0700692 memset((struct mmc_command *)&cmd, 0, sizeof(struct mmc_command));
693
694 /* CMD8 */
695 cmd.cmd_index = CMD8_SEND_EXT_CSD;
696 cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
697 cmd.resp_type = SDHCI_CMD_RESP_R1;
698 cmd.data.data_ptr = card->ext_csd;
699 cmd.data.num_blocks = 1;
700 cmd.data_present = 0x1;
701 cmd.trans_mode = SDHCI_MMC_READ;
702
703 /* send command */
704 mmc_ret = sdhci_send_command(host, &cmd);
705 if (mmc_ret)
706 return mmc_ret;
707
708 return mmc_ret;
709}
710
711/*
712 * Function: mmc switch command
713 * Arg : Host, card structure, access mode, index & value to be set
714 * Return : 0 on Success, 1 on Failure
715 * Flow : Send switch command to the card to set the ext attribute @ index
716 */
717static uint32_t mmc_switch_cmd(struct sdhci_host *host, struct mmc_card *card,
718 uint32_t access, uint32_t index, uint32_t value)
719{
720
721 struct mmc_command cmd;
722 uint32_t mmc_ret = 0;
723 uint32_t mmc_status;
724
725 memset((struct mmc_command *)&cmd, 0, sizeof(struct mmc_command));
726
727 /* CMD6 Format:
728 * [31:26] set to 0
729 * [25:24] access
730 * [23:16] index
731 * [15:8] value
732 * [7:3] set to 0
733 * [2:0] cmd set
734 */
735 cmd.cmd_index = CMD6_SWITCH_FUNC;
736 cmd.argument |= (access << 24);
737 cmd.argument |= (index << 16);
738 cmd.argument |= (value << 8);
739 cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
740 cmd.resp_type = SDHCI_CMD_RESP_R1B;
741
742 mmc_ret = sdhci_send_command(host, &cmd);
743 if (mmc_ret) {
744 dprintf(CRITICAL, "CMD6 send failed\n");
745 return mmc_ret;
746 }
747
748 /* Check if the card completed the switch command processing */
749 mmc_ret = mmc_get_card_status(host, card, &mmc_status);
750 if (mmc_ret) {
751 dprintf(CRITICAL, "Get card status failed\n");
752 return mmc_ret;
753 }
754
755 if (MMC_CARD_STATUS(mmc_status) != MMC_TRAN_STATE) {
Channagoud Kadabie106d1f2014-04-25 18:26:26 -0700756 dprintf(CRITICAL, "Switch cmd failed. Card not in tran state %x\n", mmc_status);
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -0700757 mmc_ret = 1;
758 }
759
760 if (mmc_status & MMC_SWITCH_FUNC_ERR_FLAG) {
761 dprintf(CRITICAL, "Switch cmd failed. Switch Error.\n");
762 mmc_ret = 1;
763 }
764
765 return mmc_ret;
766}
767
Channagoud Kadabie106d1f2014-04-25 18:26:26 -0700768bool mmc_set_drv_type(struct sdhci_host *host, struct mmc_card *card, uint8_t drv_type)
769{
Channagoud Kadabie106d1f2014-04-25 18:26:26 -0700770 bool drv_type_changed = false;
771
772 uint32_t value = ((drv_type << 4) | MMC_HS200_TIMING);
773
vijay kumar488e4842015-08-21 20:37:29 +0530774 if (MMC_CARD_MMC(card)) {
Mayank Grover3e66b2b2016-12-07 15:16:29 +0530775 if (card->ext_csd[MMC_EXT_MMC_DRV_STRENGTH] & (1 << drv_type)){
Mayank Grover51a7a492018-08-17 16:16:50 +0530776 mmc_switch_cmd(host, card, MMC_ACCESS_WRITE, MMC_EXT_MMC_HS_TIMING, value);
777 drv_type_changed = true;
Mayank Grover3e66b2b2016-12-07 15:16:29 +0530778 }
vijay kumar488e4842015-08-21 20:37:29 +0530779 }
Channagoud Kadabie106d1f2014-04-25 18:26:26 -0700780 return drv_type_changed;
781}
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -0700782/*
783 * Function: mmc set bus width
784 * Arg : Host, card structure & width
785 * Return : 0 on Success, 1 on Failure
786 * Flow : Send switch command to set bus width
787 */
788static uint32_t mmc_set_bus_width(struct sdhci_host *host,
789 struct mmc_card *card,
790 uint32_t width)
791{
792 uint32_t mmc_ret = 0;
793
794 mmc_ret = mmc_switch_cmd(host, card, MMC_ACCESS_WRITE,
795 MMC_EXT_MMC_BUS_WIDTH, width);
796
797 if (mmc_ret) {
798 dprintf(CRITICAL, "Switch cmd failed\n");
799 return mmc_ret;
800 }
801
802 return 0;
803}
804
805
806/*
Channagoud Kadabi9b8f8fc2013-07-26 12:02:49 -0700807 * Function: mmc card supports hs400 mode
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -0700808 * Arg : None
Channagoud Kadabi9b8f8fc2013-07-26 12:02:49 -0700809 * Return : 1 if hs400 mode is supported, 0 otherwise
810 * Flow : Check the ext csd attributes of the card
811 */
812static uint8_t mmc_card_supports_hs400_mode(struct mmc_card *card)
813{
vijay kumar488e4842015-08-21 20:37:29 +0530814 if (MMC_CARD_MMC(card)) {
815 if (card->ext_csd[MMC_DEVICE_TYPE] & MMC_HS_HS400_MODE)
816 return 1;
817 else
818 return 0;
819 }
Channagoud Kadabi9b8f8fc2013-07-26 12:02:49 -0700820 else
821 return 0;
822}
823
824/*
825 * Function: mmc card supports hs200 mode
826 * Arg : None
827 * Return : 1 if HS200 mode is supported, 0 otherwise
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -0700828 * Flow : Check the ext csd attributes of the card
829 */
830static uint8_t mmc_card_supports_hs200_mode(struct mmc_card *card)
831{
vijay kumar488e4842015-08-21 20:37:29 +0530832 if (MMC_CARD_MMC(card)) {
833 if (card->ext_csd[MMC_DEVICE_TYPE] & MMC_HS_HS200_MODE)
834 return 1;
835 else
836 return 0;
837 }
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -0700838 else
839 return 0;
840}
841
842/*
843 * Function: mmc card supports ddr mode
844 * Arg : None
845 * Return : 1 if DDR mode is supported, 0 otherwise
846 * Flow : Check the ext csd attributes of the card
847 */
848static uint8_t mmc_card_supports_ddr_mode(struct mmc_card *card)
849{
vijay kumar488e4842015-08-21 20:37:29 +0530850 if (MMC_CARD_MMC(card)) {
851 if (card->ext_csd[MMC_DEVICE_TYPE] & MMC_HS_DDR_MODE)
852 return 1;
853 else
854 return 0;
855 }
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -0700856 else
857 return 0;
858}
859
860/*
861 * Function : Enable HS200 mode
862 * Arg : Host, card structure and bus width
863 * Return : 0 on Success, 1 on Failure
864 * Flow :
865 * - Set the bus width to 4/8 bit SDR as supported by the target & host
866 * - Set the HS_TIMING on ext_csd 185 for the card
867 */
868static uint32_t mmc_set_hs200_mode(struct sdhci_host *host,
869 struct mmc_card *card, uint32_t width)
870{
871 uint32_t mmc_ret = 0;
872
Channagoud Kadabie632e252014-03-31 15:26:00 -0700873 DBG("\n Enabling HS200 Mode Start\n");
874
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -0700875 /* Set 4/8 bit SDR bus width */
876 mmc_ret = mmc_set_bus_width(host, card, width);
877 if (mmc_ret) {
878 dprintf(CRITICAL, "Failure to set wide bus for Card(RCA:%x)\n",
879 card->rca);
880 return mmc_ret;
881 }
882
883 /* Setting HS200 in HS_TIMING using EXT_CSD (CMD6) */
884 mmc_ret = mmc_switch_cmd(host, card, MMC_ACCESS_WRITE, MMC_EXT_MMC_HS_TIMING, MMC_HS200_TIMING);
885
886 if (mmc_ret) {
887 dprintf(CRITICAL, "Switch cmd returned failure %d\n", __LINE__);
888 return mmc_ret;
889 }
890
Channagoud Kadabi1dc6aab2013-11-20 12:46:15 -0800891 /* Enable SDR104 mode in controller */
892 sdhci_set_uhs_mode(host, SDHCI_SDR104_MODE);
893
Channagoud Kadabi9b8f8fc2013-07-26 12:02:49 -0700894 /* Run the clock @ 400 Mhz */
Channagoud Kadabie9168e82014-01-28 21:33:34 -0800895 if (host->caps.hs400_support && mmc_card_supports_hs400_mode(card))
Channagoud Kadabi9b8f8fc2013-07-26 12:02:49 -0700896 {
Channagoud Kadabi9b8f8fc2013-07-26 12:02:49 -0700897 /* Save the timing value, before changing the clock */
898 MMC_SAVE_TIMING(host, MMC_HS400_TIMING);
Channagoud Kadabi86756c12014-03-12 17:16:39 -0700899 /*
900 * Set the MCI_CLK divider before changing the sdcc core
901 * core clk to ensure card receives no more than 200 MHZ
902 * clock frequency
903 */
904 sdhci_msm_set_mci_clk(host);
905 clock_config_mmc(host->msm_host->slot, SDHCI_CLK_400MHZ);
Channagoud Kadabi9b8f8fc2013-07-26 12:02:49 -0700906 }
Channagoud Kadabi642ff552014-08-12 21:40:59 -0700907
908 /* Execute Tuning for hs200 mode */
909 if ((mmc_ret = sdhci_msm_execute_tuning(host, card, width)))
910 dprintf(CRITICAL, "Tuning for hs200 failed\n");
911
912 /* Once the tuning is executed revert back the clock to 200MHZ
913 * and disable the MCI_CLK divider so that we can use SDHC clock
914 * divider to supply clock to the card
915 */
916 if (host->timing == MMC_HS400_TIMING)
917 {
918 MMC_SAVE_TIMING(host, MMC_HS200_TIMING);
919 sdhci_msm_set_mci_clk(host);
920 clock_config_mmc(host->msm_host->slot, MMC_CLK_192MHZ);
921 }
Channagoud Kadabi9b8f8fc2013-07-26 12:02:49 -0700922 else
923 {
924 /* Save the timing value, before changing the clock */
925 MMC_SAVE_TIMING(host, MMC_HS200_TIMING);
926 }
927
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -0700928
Channagoud Kadabie632e252014-03-31 15:26:00 -0700929 DBG("\n Enabling HS200 Mode Done\n");
930
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -0700931 return mmc_ret;
932}
933
934/*
935 * Function: mmc set ddr mode
936 * Arg : Host & card structure
937 * Return : 0 on Success, 1 on Failure
938 * Flow : Set bus width for ddr mode & set controller in DDR mode
939*/
940static uint8_t mmc_set_ddr_mode(struct sdhci_host *host, struct mmc_card *card)
941{
942 uint8_t mmc_ret = 0;
943
Channagoud Kadabie632e252014-03-31 15:26:00 -0700944 DBG("\n Enabling DDR Mode Start\n");
945
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -0700946 /* Set width for 8 bit DDR mode by default */
947 mmc_ret = mmc_set_bus_width(host, card, DATA_DDR_BUS_WIDTH_8BIT);
948
949 if (mmc_ret) {
950 dprintf(CRITICAL, "Failure to set DDR mode for Card(RCA:%x)\n",
951 card->rca);
952 return mmc_ret;
953 }
954
Channagoud Kadabi9b8f8fc2013-07-26 12:02:49 -0700955 /* Save the timing value, before changing the clock */
956 MMC_SAVE_TIMING(host, SDHCI_DDR50_MODE);
957
958 /* Set the DDR mode in controller */
959 sdhci_set_uhs_mode(host, SDHCI_DDR50_MODE);
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -0700960
Channagoud Kadabie632e252014-03-31 15:26:00 -0700961 DBG("\n Enabling DDR Mode Done\n");
962
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -0700963 return 0;
964}
965
966/*
967 * Function: mmc set high speed interface
968 * Arg : Host & card structure
969 * Return : None
970 * Flow : Sets the sdcc clock & clock divider in the host controller
971 * Adjust the interface speed to optimal speed
972 */
973static uint32_t mmc_set_hs_interface(struct sdhci_host *host,
974 struct mmc_card *card)
975{
976 uint32_t mmc_ret = 0;
977
978 /* Setting HS_TIMING in EXT_CSD (CMD6) */
979 mmc_ret = mmc_switch_cmd(host, card, MMC_ACCESS_WRITE,
980 MMC_EXT_MMC_HS_TIMING, MMC_HS_TIMING);
981
982 if (mmc_ret) {
983 dprintf(CRITICAL, "Switch cmd returned failure %d\n", __LINE__);
984 return mmc_ret;
985 }
986
Channagoud Kadabi9b8f8fc2013-07-26 12:02:49 -0700987 /* Save the timing value, before changing the clock */
988 MMC_SAVE_TIMING(host, SDHCI_SDR25_MODE);
989
990 /* Set the SDR25 mode in controller */
991 sdhci_set_uhs_mode(host, SDHCI_SDR25_MODE);
992
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -0700993 return 0;
994}
995
996/*
Channagoud Kadabi9b8f8fc2013-07-26 12:02:49 -0700997 * Function : Enable HS400 mode
998 * Arg : Host, card structure and bus width
999 * Return : 0 on Success, 1 on Failure
1000 * Flow :
1001 * - Set the bus width to 8 bit DDR
1002 * - Set the HS_TIMING on ext_csd 185 for the card
1003 */
1004uint32_t mmc_set_hs400_mode(struct sdhci_host *host,
1005 struct mmc_card *card, uint32_t width)
1006{
1007 uint32_t mmc_ret = 0;
1008
1009 /*
1010 * Emmc 5.0 spec does not allow changing to hs400 mode directly
1011 * Need to follow the sequence to change to hs400 mode
1012 * 1. Enable HS200 mode, perform tuning
1013 * 2. Change to high speed mode
1014 * 3. Enable DDR mode
1015 * 4. Enable HS400 mode & execute tuning
1016 */
1017
Channagoud Kadabie632e252014-03-31 15:26:00 -07001018 DBG("\n Enabling HS400 Mode Start\n");
Channagoud Kadabi9b8f8fc2013-07-26 12:02:49 -07001019 /* HS400 mode is supported only in DDR 8-bit */
1020 if (width != DATA_BUS_WIDTH_8BIT)
1021 {
1022 dprintf(CRITICAL, "Bus width is not 8-bit, cannot switch to hs400: %u\n", width);
1023 return 1;
1024 }
1025
1026 /* 1.Enable HS200 mode */
1027 mmc_ret = mmc_set_hs200_mode(host, card, width);
1028
1029 if (mmc_ret)
1030 {
1031 dprintf(CRITICAL, "Failure Setting HS200 mode %s\t%d\n",__func__, __LINE__);
1032 return mmc_ret;
1033 }
1034
1035 /* 2. Enable High speed mode */
1036 /* This is needed to set the clock to a low value &
1037 * so that we can switch to hs_timing --> 0x1 */
1038 /* Save the timing value, before changing the clock */
1039 MMC_SAVE_TIMING(host, SDHCI_SDR12_MODE);
1040 sdhci_set_uhs_mode(host, SDHCI_SDR12_MODE);
1041
1042 /* 3. Set HS_TIMING to 0x1 */
1043 mmc_ret = mmc_set_hs_interface(host, card);
1044 if (mmc_ret)
1045 {
1046 dprintf(CRITICAL, "Error adjusting interface speed!:%s\t%d\n", __func__, __LINE__);
1047 return mmc_ret;
1048 }
1049
1050 /*4. Enable DDR mode */
1051 mmc_ret = mmc_set_ddr_mode(host, card);
1052 if (mmc_ret)
1053 {
1054 dprintf(CRITICAL, "Failure setting DDR mode:%s\t%d\n", __func__, __LINE__);
1055 return mmc_ret;
1056 }
1057
1058 /*5. Set hs400 timing */
1059 mmc_ret = mmc_switch_cmd(host, card, MMC_ACCESS_WRITE, MMC_EXT_MMC_HS_TIMING, MMC_HS400_TIMING);
1060
1061 if (mmc_ret)
1062 {
1063 dprintf(CRITICAL, "Switch cmd returned failure %s\t%d\n",__func__, __LINE__);
1064 return mmc_ret;
1065 }
1066
1067 /* 6. Enable SDR104 mode in controller */
1068 /* Save the timing value, before changing the clock */
1069 MMC_SAVE_TIMING(host, MMC_HS400_TIMING);
1070 sdhci_set_uhs_mode(host, SDHCI_SDR104_MODE);
Channagoud Kadabi86756c12014-03-12 17:16:39 -07001071 /*
1072 * Enable HS400 mode
1073 */
1074 sdhci_msm_set_mci_clk(host);
Channagoud Kadabi642ff552014-08-12 21:40:59 -07001075 /* Set the clock back to 400 MHZ */
1076 clock_config_mmc(host->msm_host->slot, SDHCI_CLK_400MHZ);
Channagoud Kadabi9b8f8fc2013-07-26 12:02:49 -07001077
1078 /* 7. Execute Tuning for hs400 mode */
Channagoud Kadabie106d1f2014-04-25 18:26:26 -07001079 if ((mmc_ret = sdhci_msm_execute_tuning(host, card, width)))
Channagoud Kadabi9b8f8fc2013-07-26 12:02:49 -07001080 dprintf(CRITICAL, "Tuning for hs400 failed\n");
1081
Channagoud Kadabie632e252014-03-31 15:26:00 -07001082 DBG("\n Enabling HS400 Mode Done\n");
1083
Channagoud Kadabi9b8f8fc2013-07-26 12:02:49 -07001084 return mmc_ret;
1085}
1086
1087/*
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001088 * Function: mmc_host_init
1089 * Arg : mmc device structure
1090 * Return : 0 on success, 1 on Failure
1091 * Flow : Initialize the host contoller
1092 * Set the clock rate to 400 KHZ for init
1093 */
1094static uint8_t mmc_host_init(struct mmc_device *dev)
1095{
1096 uint8_t mmc_ret = 0;
1097
1098 struct sdhci_host *host;
1099 struct mmc_config_data *cfg;
Channagoud Kadabi9b8f8fc2013-07-26 12:02:49 -07001100 struct sdhci_msm_data *data;
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07001101
1102 event_t sdhc_event;
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001103
1104 host = &dev->host;
1105 cfg = &dev->config;
1106
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07001107 event_init(&sdhc_event, false, EVENT_FLAG_AUTOUNSIGNAL);
1108
1109 host->base = cfg->sdhc_base;
1110 host->sdhc_event = &sdhc_event;
Channagoud Kadabi3091dbd2014-11-12 13:00:33 -08001111 host->caps.hs200_support = cfg->hs200_support;
Aparna Mallavarapue1cdd302014-03-07 07:12:44 +05301112 host->caps.hs400_support = cfg->hs400_support;
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07001113
Channagoud Kadabi9b8f8fc2013-07-26 12:02:49 -07001114 data = (struct sdhci_msm_data *) malloc(sizeof(struct sdhci_msm_data));
1115 ASSERT(data);
1116
1117 data->sdhc_event = &sdhc_event;
1118 data->pwrctl_base = cfg->pwrctl_base;
1119 data->pwr_irq = cfg->pwr_irq;
1120 data->slot = cfg->slot;
Channagoud Kadabi17e69972014-10-13 11:42:24 -07001121 data->use_io_switch = cfg->use_io_switch;
Channagoud Kadabi9b8f8fc2013-07-26 12:02:49 -07001122
1123 host->msm_host = data;
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07001124
Channagoud Kadabi4b2f9672013-08-08 17:44:03 -07001125 /* Initialize any clocks needed for SDC controller */
1126 clock_init_mmc(cfg->slot);
1127
1128 clock_config_mmc(cfg->slot, cfg->max_clk_rate);
1129
Channagoud Kadabie632e252014-03-31 15:26:00 -07001130 /* Configure the CDC clocks needed for emmc storage
1131 * we use slot '1' for emmc
1132 */
1133 if (cfg->slot == 1)
1134 clock_config_cdc(cfg->slot);
1135
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07001136 /*
1137 * MSM specific sdhc init
1138 */
Channagoud Kadabi9b8f8fc2013-07-26 12:02:49 -07001139 sdhci_msm_init(host, data);
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07001140
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001141 /*
1142 * Initialize the controller, read the host capabilities
1143 * set power on mode
1144 */
1145 sdhci_init(host);
1146
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001147 /* Setup initial freq to 400KHz */
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001148 mmc_ret = sdhci_clk_supply(host, SDHCI_CLK_400KHZ);
1149
1150 return mmc_ret;
1151}
1152
1153/*
1154 * Function: mmc identify card
1155 * Arg : host & card structure
1156 * Return : 0 on Success, 1 on Failure
1157 * Flow : Performs card identification process:
1158 * 1. Get card's unique identification number (CID)
1159 * 2. Get(for sd)/set (for mmc) relative card address (RCA)
1160 * 3. Select the card to put it in TRAN state
1161 */
1162static uint32_t mmc_identify_card(struct sdhci_host *host, struct mmc_card *card)
1163{
1164 uint32_t mmc_return = 0;
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001165
1166 /* Ask card to send its unique card identification (CID) number (CMD2) */
1167 mmc_return = mmc_all_send_cid(host, card);
1168 if (mmc_return) {
1169 dprintf(CRITICAL,"Failure getting card's CID number!\n");
1170 return mmc_return;
1171 }
1172
1173 /* Ask card to send a relative card address (RCA) (CMD3) */
1174 mmc_return = mmc_send_relative_address(host, card);
1175 if (mmc_return) {
1176 dprintf(CRITICAL, "Failure getting card's RCA!\n");
1177 return mmc_return;
1178 }
1179
1180 /* Get card's CSD register (CMD9) */
1181 mmc_return = mmc_send_csd(host, card);
1182 if (mmc_return) {
1183 dprintf(CRITICAL,"Failure getting card's CSD information!\n");
1184 return mmc_return;
1185 }
1186
1187 /* Select the card (CMD7) */
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07001188 mmc_return = mmc_select_card(host, card);
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001189 if (mmc_return) {
1190 dprintf(CRITICAL, "Failure selecting the Card with RCA: %x\n",card->rca);
1191 return mmc_return;
1192 }
1193
1194 /* Set the card status as active */
1195 card->status = MMC_STATUS_ACTIVE;
1196
1197 return 0;
1198}
1199
1200/*
1201 * Function: mmc_reset_card_and_send_op
1202 * Arg : Host & Card structure
1203 * Return : 0 on Success, 1 on Failure
1204 * Flow : Routine to initialize MMC card. It resets a card to idle state,
1205 * verify operating voltage and set the card in ready state.
1206 */
1207static uint32_t mmc_reset_card_and_send_op(struct sdhci_host *host, struct mmc_card *card)
1208{
1209 uint32_t mmc_return = 0;
1210
1211 /* 1. Card Reset - CMD0 */
1212 mmc_return = mmc_reset_card(host);
1213 if (mmc_return) {
1214 dprintf(CRITICAL, "Failure resetting MMC cards!\n");
1215 return mmc_return;
1216 }
1217
1218 /* 2. Card Initialization process */
1219
1220 /*
1221 * Send CMD1 to identify and reject cards that do not match host's VDD range
1222 * profile. Cards sends its OCR register in response.
1223 */
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07001224
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001225 mmc_return = mmc_send_op_cond(host, card);
1226
1227 /* OCR is not received, init could not complete */
1228 if (mmc_return) {
1229 dprintf(CRITICAL, "Failure getting OCR response from MMC Card\n");
1230 return mmc_return;
1231 }
1232
1233 return 0;
1234}
1235
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07001236static uint32_t mmc_send_app_cmd(struct sdhci_host *host, struct mmc_card *card)
1237{
1238 struct mmc_command cmd = {0};
1239
1240 cmd.cmd_index = CMD55_APP_CMD;
1241 cmd.argument = (card->rca << 16);
1242 cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
1243 cmd.resp_type = SDHCI_CMD_RESP_R1;
1244
1245 if (sdhci_send_command(host, &cmd))
1246 {
1247 dprintf(CRITICAL, "Failed Sending CMD55\n");
1248 return 1;
1249 }
1250 return 0;
1251}
1252
1253uint32_t mmc_sd_card_init(struct sdhci_host *host, struct mmc_card *card)
1254{
1255 uint8_t i;
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07001256 struct mmc_command cmd;
1257
1258 memset((struct mmc_command *)&cmd, 0, sizeof(struct mmc_command));
1259
1260 /* Use the SD card RCA 0x0 during init */
1261 card->rca = SD_CARD_RCA;
1262
1263 /* Send CMD8 for voltage check*/
1264 for (i = 0 ;i < SD_CMD8_MAX_RETRY; i++)
1265 {
1266 cmd.cmd_index = CMD8_SEND_IF_COND;
1267 cmd.argument = MMC_SD_HC_VOLT_SUPPLIED;
1268 cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
1269 cmd.resp_type = SDHCI_CMD_RESP_R7;
1270
1271 if (sdhci_send_command(host, &cmd))
1272 {
1273 dprintf(CRITICAL, "The response for CMD8 does not match the supplied value\n");
1274 return 1;
1275 }
1276 else
1277 {
1278 /* If the command response echos the voltage back */
1279 if (cmd.resp[0] == MMC_SD_HC_VOLT_SUPPLIED)
1280 break;
1281 }
1282 /* As per SDCC the spec try for max three times with
1283 * 1 ms delay
1284 */
1285 mdelay(1);
1286 }
1287
1288 if (i == SD_CMD8_MAX_RETRY && (cmd.resp[0] != MMC_SD_HC_VOLT_SUPPLIED))
1289 {
1290 dprintf(CRITICAL, "Error: CMD8 response timed out\n");
1291 return 1;
1292 }
1293
1294 /* Send ACMD41 for OCR */
1295 for (i = 0; i < SD_ACMD41_MAX_RETRY; i++)
1296 {
1297 /* Send APP_CMD before ACMD41*/
1298 if (mmc_send_app_cmd(host, card))
1299 {
1300 dprintf(CRITICAL, "Failed sending App command\n");
1301 return 1;
1302 }
1303
1304 /* APP_CMD is successful, send ACMD41 now */
1305 cmd.cmd_index = ACMD41_SEND_OP_COND;
1306 cmd.argument = MMC_SD_OCR | MMC_SD_HC_HCS;
1307 cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
1308 cmd.resp_type = SDHCI_CMD_RESP_R3;
1309
1310 if (sdhci_send_command(host, &cmd))
1311 {
1312 dprintf(CRITICAL, "Failure sending ACMD41\n");
1313 return 1;
1314 }
1315 else
1316 {
1317 if (cmd.resp[0] & MMC_SD_DEV_READY)
1318 {
1319 if (cmd.resp[0] & (1 << 30))
1320 card->type = MMC_CARD_TYPE_SDHC;
1321 else
1322 card->type = MMC_CARD_TYPE_STD_SD;
1323
1324 break;
1325 }
1326 }
1327 /*
1328 * As per SDCC spec try for max 1 second
1329 */
1330 mdelay(50);
1331 }
1332
1333 if (i == SD_ACMD41_MAX_RETRY && !(cmd.resp[0] & MMC_SD_DEV_READY))
1334 {
1335 dprintf(CRITICAL, "Error: ACMD41 response timed out\n");
1336 return 1;
1337 }
1338
1339 return 0;
1340}
1341
1342/*
1343 * Function to read SD card information from SD status
1344 */
1345static uint32_t mmc_sd_get_card_ssr(struct sdhci_host *host, struct mmc_card *card)
1346{
1347 BUF_DMA_ALIGN(raw_sd_status, 64);
1348 struct mmc_command cmd = {0};
1349 uint32_t sd_status[16];
1350 uint32_t *status = sd_status;
1351 uint32_t au_size;
1352 int i;
1353 int j;
1354
1355 if (mmc_send_app_cmd(host, card))
1356 {
1357 dprintf(CRITICAL, "Failed sending App command\n");
1358 return 1;
1359 }
1360
1361 cmd.cmd_index = ACMD13_SEND_SD_STATUS;
1362 cmd.argument = 0x0;
1363 cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
Channagoud Kadabi57f37a82014-08-25 13:33:49 -07001364 cmd.resp_type = SDHCI_CMD_RESP_R1;
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07001365 cmd.trans_mode = SDHCI_MMC_READ;
1366 cmd.data_present = 0x1;
1367 cmd.data.data_ptr = raw_sd_status;
1368 cmd.data.num_blocks = 0x1;
1369 cmd.data.blk_sz = 0x40;
1370
1371 /* send command */
1372 if (sdhci_send_command(host, &cmd))
1373 return 1;
1374
1375 memcpy(sd_status, raw_sd_status, sizeof(sd_status));
1376
1377 for (i = 15, j = 0; i >=0 ; i--, j++)
1378 sd_status[i] = swap_endian32(sd_status[j]);
1379
1380 au_size = UNPACK_BITS(status, MMC_SD_AU_SIZE_BIT, MMC_SD_AU_SIZE_LEN, 32);
1381 /* Card AU size in sectors */
1382 card->ssr.au_size = 1 << (au_size + 4);
1383 card->ssr.num_aus = UNPACK_BITS(status, MMC_SD_ERASE_SIZE_BIT, MMC_SD_ERASE_SIZE_LEN, 32);
vijay kumarb01d64c2015-08-21 20:37:29 +05301384 /*if num_aus is 0 then host should assign number of AU erased at a time*/
1385 if (!card->ssr.num_aus)
1386 card->ssr.num_aus = 0x10;
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07001387 return 0;
1388}
1389
1390/*
1391 * Function to read the SD CARD configuration register
1392 */
1393static uint32_t mmc_sd_get_card_scr(struct sdhci_host *host, struct mmc_card *card)
1394{
1395 BUF_DMA_ALIGN(scr_resp, 8);
1396 struct mmc_command cmd = {0};
1397 uint32_t raw_scr[2];
1398
1399 /* Now read the SCR register */
1400 /* Send APP_CMD before ACMD51*/
1401 if (mmc_send_app_cmd(host, card))
1402 {
1403 dprintf(CRITICAL, "Failed sending App command\n");
1404 return 1;
1405 }
1406
1407 cmd.cmd_index = ACMD51_READ_CARD_SCR;
1408 cmd.argument = 0x0;
1409 cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
1410 cmd.resp_type = SDHCI_CMD_RESP_R1;
1411 cmd.trans_mode = SDHCI_MMC_READ;
1412 cmd.data_present = 0x1;
1413 cmd.data.data_ptr = scr_resp;
1414 cmd.data.num_blocks = 0x1;
1415 cmd.data.blk_sz = 0x8;
1416
1417 /* send command */
1418 if (sdhci_send_command(host, &cmd))
1419 return 1;
1420
1421 memcpy(raw_scr, scr_resp, sizeof(raw_scr));
1422
1423 card->raw_scr[0] = swap_endian32(raw_scr[0]);
1424 card->raw_scr[1] = swap_endian32(raw_scr[1]);
1425
1426 /*
1427 * Parse & Populate the SCR data as per sdcc spec
1428 */
1429 card->scr.bus_widths = (card->raw_scr[0] & SD_SCR_BUS_WIDTH_MASK) >> SD_SCR_BUS_WIDTH;
1430 card->scr.cmd23_support = (card->raw_scr[0] & SD_SCR_CMD23_SUPPORT);
1431 card->scr.sd_spec = (card->raw_scr[0] & SD_SCR_SD_SPEC_MASK) >> SD_SCR_SD_SPEC;
1432 card->scr.sd3_spec = (card->raw_scr[0] & SD_SCR_SD_SPEC3_MASK) >> SD_SCR_SD_SPEC3;
1433
1434 return 0;
1435}
1436
1437/*
1438 * Function: mmc_set_sd_bus_width
1439 * Arg : host, device structure & width
1440 * Return : 0 on Success, 1 on Failure
1441 * Flow : Set the bus width for the card
1442 */
1443uint32_t mmc_sd_set_bus_width(struct sdhci_host *host, struct mmc_card *card, uint8_t width)
1444{
1445 struct mmc_command cmd = {0};
1446
1447 /* Send APP_CMD before ACMD6*/
1448 if (mmc_send_app_cmd(host, card))
1449 {
1450 dprintf(CRITICAL, "Failed sending App command\n");
1451 return 1;
1452 }
1453
1454 cmd.cmd_index = ACMD6_SET_BUS_WIDTH;
1455 cmd.argument = (width == DATA_BUS_WIDTH_4BIT) ? (1<<1) : 0;
1456 cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
1457 cmd.resp_type = SDHCI_CMD_RESP_R1;
1458
1459 /* send command */
1460 if (sdhci_send_command(host, &cmd))
1461 return 1;
1462
1463 return 0;
1464}
1465
1466uint32_t mmc_sd_set_hs(struct sdhci_host *host, struct mmc_card *card)
1467{
1468 struct mmc_command cmd = {0};
1469 BUF_DMA_ALIGN(switch_resp, 64);
1470
1471 cmd.cmd_index = CMD6_SWITCH_FUNC;
1472 cmd.argument = MMC_SD_SWITCH_HS;
1473 cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
1474 cmd.resp_type = SDHCI_CMD_RESP_R1;
1475 cmd.trans_mode = SDHCI_MMC_READ;
1476 cmd.data_present = 0x1;
1477 cmd.data.data_ptr = switch_resp;
1478 cmd.data.num_blocks = 0x1;
1479 cmd.data.blk_sz = 0x40;
1480
1481 /* send command */
1482 if (sdhci_send_command(host, &cmd))
1483 return 1;
1484
Channagoud Kadabi9b8f8fc2013-07-26 12:02:49 -07001485 /* Set the SDR25 mode in controller*/
1486 sdhci_set_uhs_mode(host, SDHCI_SDR25_MODE);
1487
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07001488 return 0;
1489}
1490
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001491/*
1492 * Function: mmc_init_card
1493 * Arg : mmc device structure
1494 * Return : 0 on Success, 1 on Failure
1495 * Flow : Performs initialization and identification of eMMC cards connected
1496 * to the host.
1497 */
1498
1499static uint32_t mmc_card_init(struct mmc_device *dev)
1500{
1501 uint32_t mmc_return = 0;
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001502 uint8_t bus_width = 0;
1503
1504 struct sdhci_host *host;
1505 struct mmc_card *card;
1506 struct mmc_config_data *cfg;
1507
1508 host = &dev->host;
1509 card = &dev->card;
1510 cfg = &dev->config;
1511
1512 /* Initialize MMC card structure */
1513 card->status = MMC_STATUS_INACTIVE;
1514
1515 /* TODO: Get the OCR params from target */
1516 card->ocr = MMC_OCR_27_36 | MMC_OCR_SEC_MODE;
1517
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07001518 /* Initialize the internal MMC */
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001519 mmc_return = mmc_reset_card_and_send_op(host, card);
1520 if (mmc_return)
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07001521 {
1522 dprintf(CRITICAL, "MMC card failed to respond, try for SD card\n");
1523 /* Reset the card & get the OCR */
1524 mmc_return = mmc_sd_card_init(host, card);
1525 if (mmc_return)
1526 {
1527 dprintf(CRITICAL, "Failed to initialize SD card\n");
1528 return mmc_return;
1529 }
1530 }
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001531
1532 /* Identify (CMD2, CMD3 & CMD9) and select the card (CMD7) */
1533 mmc_return = mmc_identify_card(host, card);
1534 if (mmc_return)
1535 return mmc_return;
1536
1537 /* set interface speed */
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07001538 if (MMC_CARD_SD(card))
1539 {
1540 mmc_return = mmc_sd_set_hs(host, card);
1541 if (mmc_return)
1542 {
1543 dprintf(CRITICAL, "Failed to set HS for SD card\n");
1544 return mmc_return;
1545 }
1546 }
1547 else
1548 {
1549 mmc_return = mmc_set_hs_interface(host, card);
1550 if (mmc_return) {
1551 dprintf(CRITICAL, "Error adjusting interface speed!\n");
1552 return mmc_return;
1553 }
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001554 }
1555
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001556 /* Now get the extended CSD for the card */
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07001557 if (MMC_CARD_MMC(card))
1558 {
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001559 /* For MMC cards, also get the extended csd */
1560 mmc_return = mmc_get_ext_csd(host, card);
1561
1562 if (mmc_return) {
1563 dprintf(CRITICAL, "Failure getting card's ExtCSD information!\n");
1564 return mmc_return;
1565 }
1566 }
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07001567 else
1568 {
1569 /*Read SCR for sd card */
1570 if (mmc_sd_get_card_scr(host, card))
1571 {
1572 dprintf(CRITICAL, "Failure getting card's SCR register\n");
1573 return 1;
1574 }
1575 /* Read SSR for the SD card */
1576 if (mmc_sd_get_card_ssr(host, card))
1577 {
1578 dprintf(CRITICAL, "Failed to get SSR from the card\n");
1579 return 1;
1580 }
1581 }
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001582
1583 /* Decode and save the CSD register */
1584 mmc_return = mmc_decode_and_save_csd(card);
1585 if (mmc_return) {
1586 dprintf(CRITICAL, "Failure decoding card's CSD information!\n");
1587 return mmc_return;
1588 }
1589
1590
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07001591 if (MMC_CARD_MMC(card))
1592 {
1593 /* Set the bus width based on host, target capbilities */
1594 if (cfg->bus_width == DATA_BUS_WIDTH_8BIT && host->caps.bus_width_8bit)
1595 bus_width = DATA_BUS_WIDTH_8BIT;
1596 /*
1597 * Host contoller by default supports 4 bit & 1 bit mode.
1598 * No need to check for host support here
1599 */
1600 else if (cfg->bus_width == DATA_BUS_WIDTH_4BIT)
1601 bus_width = DATA_BUS_WIDTH_4BIT;
1602 else
1603 bus_width = DATA_BUS_WIDTH_1BIT;
1604
1605 /* Set 4/8 bit SDR bus width in controller */
1606 mmc_return = sdhci_set_bus_width(host, bus_width);
1607
1608 if (mmc_return) {
1609 dprintf(CRITICAL, "Failed to set bus width for host controller\n");
1610 return 1;
1611 }
1612
1613 /* Enable high speed mode in the follwing order:
Channagoud Kadabi9b8f8fc2013-07-26 12:02:49 -07001614 * 1. HS400 mode if supported by host & card
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07001615 * 1. HS200 mode if supported by host & card
1616 * 2. DDR mode host, if supported by host & card
1617 * 3. Use normal speed mode with supported bus width
1618 */
Channagoud Kadabie9168e82014-01-28 21:33:34 -08001619 if (host->caps.hs400_support && mmc_card_supports_hs400_mode(card))
Channagoud Kadabi9b8f8fc2013-07-26 12:02:49 -07001620 {
Channagoud Kadabiee5b3242014-06-25 11:15:06 -07001621 dprintf(INFO, "SDHC Running in HS400 mode\n");
Channagoud Kadabi9b8f8fc2013-07-26 12:02:49 -07001622 mmc_return = mmc_set_hs400_mode(host, card, bus_width);
1623 if (mmc_return)
1624 {
1625 dprintf(CRITICAL, "Failure to set HS400 mode for Card(RCA:%x)\n",
1626 card->rca);
1627 return mmc_return;
1628 }
1629 }
Channagoud Kadabi3091dbd2014-11-12 13:00:33 -08001630#if USE_TARGET_HS200_CAPS
1631 else if (host->caps.hs200_support && host->caps.sdr104_support && mmc_card_supports_hs200_mode(card))
1632#else
Channagoud Kadabie9168e82014-01-28 21:33:34 -08001633 else if (host->caps.sdr104_support && mmc_card_supports_hs200_mode(card))
Channagoud Kadabi3091dbd2014-11-12 13:00:33 -08001634#endif
Channagoud Kadabi9b8f8fc2013-07-26 12:02:49 -07001635 {
Channagoud Kadabiee5b3242014-06-25 11:15:06 -07001636 dprintf(INFO, "SDHC Running in HS200 mode\n");
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07001637 mmc_return = mmc_set_hs200_mode(host, card, bus_width);
1638
1639 if (mmc_return) {
1640 dprintf(CRITICAL, "Failure to set HS200 mode for Card(RCA:%x)\n",
1641 card->rca);
1642 return mmc_return;
1643 }
Channagoud Kadabie9168e82014-01-28 21:33:34 -08001644 } else if (host->caps.ddr_support && mmc_card_supports_ddr_mode(card)) {
Channagoud Kadabiee5b3242014-06-25 11:15:06 -07001645 dprintf(INFO, "SDHC Running in DDR mode\n");
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07001646 mmc_return = mmc_set_ddr_mode(host, card);
1647
1648 if (mmc_return) {
1649 dprintf(CRITICAL, "Failure to set DDR mode for Card(RCA:%x)\n",
1650 card->rca);
1651 return mmc_return;
1652 }
1653 } else {
Channagoud Kadabiee5b3242014-06-25 11:15:06 -07001654 dprintf(INFO, "SDHC Running in High Speed mode\n");
1655 /* Set HS_TIMING mode */
1656 mmc_return = mmc_set_hs_interface(host, card);
1657 if (mmc_return) {
1658 dprintf(CRITICAL, "Failure to enalbe HS mode for Card(RCA:%x)\n",
1659 card->rca);
1660 return mmc_return;
1661 }
1662 /* Set wide bus mode */
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07001663 mmc_return = mmc_set_bus_width(host, card, bus_width);
1664 if (mmc_return) {
1665 dprintf(CRITICAL, "Failure to set wide bus for Card(RCA:%x)\n",
1666 card->rca);
1667 return mmc_return;
1668 }
1669 }
1670 }
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001671 else
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07001672 {
1673 /* Check the supported bus width for the card from SCR register */
1674 if (card->scr.bus_widths & SD_SCR_WIDTH_4BIT)
1675 bus_width = DATA_BUS_WIDTH_4BIT;
1676 else
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001677 bus_width = DATA_BUS_WIDTH_1BIT;
1678
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07001679 mmc_return = mmc_sd_set_bus_width(host, card, bus_width);
1680 if (mmc_return)
1681 {
1682 dprintf(CRITICAL, "Failed to set bus width for the card\n");
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001683 return mmc_return;
1684 }
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001685
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07001686 /* Set bit SDR bus width in controller */
1687 mmc_return = sdhci_set_bus_width(host, bus_width);
1688 if (mmc_return)
1689 {
1690 dprintf(CRITICAL, "Failed to set bus width for host controller\n");
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001691 return mmc_return;
1692 }
1693 }
1694
1695
Channagoud Kadabi96c629e2013-09-10 14:21:30 -07001696 card->block_size = MMC_BLK_SZ;
1697
vijay kumar488e4842015-08-21 20:37:29 +05301698 if (MMC_CARD_MMC(card)) {
1699 /* Enable RST_n_FUNCTION */
1700 if (!card->ext_csd[MMC_EXT_CSD_RST_N_FUNC])
Channagoud Kadabifaf20f62014-10-21 22:22:37 -07001701 {
vijay kumar488e4842015-08-21 20:37:29 +05301702 mmc_return = mmc_switch_cmd(host, card, MMC_SET_BIT, MMC_EXT_CSD_RST_N_FUNC, RST_N_FUNC_ENABLE);
Channagoud Kadabifaf20f62014-10-21 22:22:37 -07001703
vijay kumar488e4842015-08-21 20:37:29 +05301704 if (mmc_return)
1705 {
1706 dprintf(CRITICAL, "Failed to enable RST_n_FUNCTION\n");
1707 return mmc_return;
1708 }
1709 }
1710
1711 }
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001712 return mmc_return;
1713}
1714
1715/*
1716 * Function: mmc display csd
1717 * Arg : None
1718 * Return : None
1719 * Flow : Displays the csd information
1720 */
1721static void mmc_display_csd(struct mmc_card *card)
1722{
1723 dprintf(SPEW, "erase_grpsize: %d\n", card->csd.erase_grp_size);
1724 dprintf(SPEW, "erase_grpmult: %d\n", card->csd.erase_grp_mult);
1725 dprintf(SPEW, "wp_grpsize: %d\n", card->csd.wp_grp_size);
1726 dprintf(SPEW, "wp_grpen: %d\n", card->csd.wp_grp_enable);
1727 dprintf(SPEW, "perm_wp: %d\n", card->csd.perm_wp);
1728 dprintf(SPEW, "temp_wp: %d\n", card->csd.temp_wp);
1729}
1730
1731/*
1732 * Function: mmc_init
1733 * Arg : MMC configuration data
1734 * Return : Pointer to mmc device
1735 * Flow : Entry point to MMC boot process
1736 * Initialize the sd host controller
1737 * Initialize the mmc card
1738 * Set the clock & high speed mode
1739 */
1740struct mmc_device *mmc_init(struct mmc_config_data *data)
1741{
1742 uint8_t mmc_ret = 0;
1743 struct mmc_device *dev;
1744
1745 dev = (struct mmc_device *) malloc (sizeof(struct mmc_device));
1746
1747 if (!dev) {
1748 dprintf(CRITICAL, "Error allocating mmc device\n");
1749 return NULL;
1750 }
1751
1752 ASSERT(data);
1753
1754 memcpy((void*)&dev->config, (void*)data, sizeof(struct mmc_config_data));
1755
1756 memset((struct mmc_card *)&dev->card, 0, sizeof(struct mmc_card));
1757
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001758 /* Initialize the host & clock */
1759 dprintf(SPEW, " Initializing MMC host data structure and clock!\n");
1760
1761 mmc_ret = mmc_host_init(dev);
1762 if (mmc_ret) {
1763 dprintf(CRITICAL, "Error Initializing MMC host : %u\n", mmc_ret);
1764 return NULL;
1765 }
1766
1767 /* Initialize and identify cards connected to host */
1768 mmc_ret = mmc_card_init(dev);
1769 if (mmc_ret) {
1770 dprintf(CRITICAL, "Failed detecting MMC/SDC @ slot%d\n",
1771 dev->config.slot);
1772 return NULL;
1773 }
1774
1775 dprintf(INFO, "Done initialization of the card\n");
1776
1777 mmc_display_csd(&dev->card);
1778
1779 return dev;
1780}
1781
Channagoud Kadabi14fd2052013-10-17 18:00:50 -07001782static uint32_t mmc_parse_response(uint32_t resp)
1783{
1784 /* Trying to write beyond card capacity */
1785 if (resp & MMC_R1_ADDR_OUT_OF_RANGE) {
1786 dprintf(CRITICAL, "Attempting to read or write beyond the Device capacity\n");
1787 return 1;
1788 }
1789
1790 /* Misaligned address not matching block length */
1791 if (resp & MMC_R1_ADDR_ERR) {
1792 dprintf(CRITICAL, "The misaligned address did not match the block length used\n");
1793 return 1;
1794 }
1795
1796 /* Invalid block length */
1797 if (resp & MMC_R1_BLOCK_LEN_ERR) {
1798 dprintf(CRITICAL, "The transferred bytes does not match the block length\n");
1799 return 1;
1800 }
1801
1802 /* Tried to program write protected block */
1803 if (resp & MMC_R1_WP_VIOLATION) {
1804 dprintf(CRITICAL, "Attempt to program a write protected block\n");
1805 return 1;
1806 }
1807
1808 /* card controller error */
1809 if (resp & MMC_R1_CC_ERROR) {
1810 dprintf(CRITICAL, "Device error occurred, which is not related to the host command\n");
1811 return 1;
1812 }
1813
1814 /* Generic error */
1815 if (resp & MMC_R1_GENERIC_ERR) {
1816 dprintf(CRITICAL, "A generic Device error\n");
1817 return 1;
1818 }
1819
1820 /* Finally check for card in TRAN state */
1821 if (MMC_CARD_STATUS(resp) != MMC_TRAN_STATE) {
1822 dprintf(CRITICAL, "MMC card is not in TRAN state\n");
1823 return 1;
1824 }
1825
1826 return 0;
1827}
1828
Channagoud Kadabia9b74782014-04-09 16:35:16 -07001829static uint32_t mmc_stop_command(struct mmc_device *dev)
1830{
1831 struct mmc_command cmd;
1832 uint32_t mmc_ret = 0;
1833
1834 memset((struct mmc_command *)&cmd, 0, sizeof(struct mmc_command));
1835
1836 cmd.cmd_index = CMD12_STOP_TRANSMISSION;
1837 cmd.argument = (dev->card.rca << 16);
1838 cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
1839 cmd.resp_type = SDHCI_CMD_RESP_R1;
1840
1841 mmc_ret = sdhci_send_command(&dev->host, &cmd);
1842 if(mmc_ret)
1843 {
1844 dprintf(CRITICAL, "Failed to send stop command\n");
1845 return mmc_ret;
1846 }
1847
1848 /* Response contains 32 bit Card status.
1849 * Parse the errors & provide relevant information */
1850
1851 return mmc_parse_response(cmd.resp[0]);
1852}
1853
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001854/*
1855 * Function: mmc sdhci read
1856 * Arg : mmc device structure, block address, number of blocks & destination
1857 * Return : 0 on Success, non zero on success
1858 * Flow : Fill in the command structure & send the command
1859 */
1860uint32_t mmc_sdhci_read(struct mmc_device *dev, void *dest,
1861 uint64_t blk_addr, uint32_t num_blocks)
1862{
1863 uint32_t mmc_ret = 0;
1864 struct mmc_command cmd;
Channagoud Kadabi9b8f8fc2013-07-26 12:02:49 -07001865 struct mmc_card *card = &dev->card;
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001866
1867 memset((struct mmc_command *)&cmd, 0, sizeof(struct mmc_command));
1868
1869 /* CMD17/18 Format:
1870 * [31:0] Data Address
1871 */
1872 if (num_blocks == 1)
1873 cmd.cmd_index = CMD17_READ_SINGLE_BLOCK;
1874 else
1875 cmd.cmd_index = CMD18_READ_MULTIPLE_BLOCK;
1876
Channagoud Kadabi7e72e632013-12-20 11:17:45 -08001877 /*
1878 * Standard emmc cards use byte mode addressing
1879 * convert the block address to byte address before
1880 * sending the command
1881 */
1882 if (card->type == MMC_TYPE_STD_MMC)
1883 cmd.argument = blk_addr * card->block_size;
1884 else
1885 cmd.argument = blk_addr;
1886
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001887 cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
1888 cmd.resp_type = SDHCI_CMD_RESP_R1;
1889 cmd.trans_mode = SDHCI_MMC_READ;
1890 cmd.data_present = 0x1;
Channagoud Kadabi9b8f8fc2013-07-26 12:02:49 -07001891
1892 /* Use CMD23 If card supports CMD23:
1893 * For SD card use the value read from SCR register
1894 * For emmc by default use CMD23.
1895 * Also as per SDCC spec always use CMD23 to stop
1896 * multiblock read/write if UHS (Ultra High Speed) is
1897 * enabled
1898 */
1899 if (MMC_CARD_SD(card))
1900 cmd.cmd23_support = dev->card.scr.cmd23_support;
1901 else
1902 cmd.cmd23_support = 0x1;
1903
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001904 cmd.data.data_ptr = dest;
1905 cmd.data.num_blocks = num_blocks;
1906
1907 /* send command */
1908 mmc_ret = sdhci_send_command(&dev->host, &cmd);
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001909
Channagoud Kadabia9b74782014-04-09 16:35:16 -07001910 /* For multi block read failures send stop command */
1911 if (mmc_ret && num_blocks > 1)
Channagoud Kadabi14fd2052013-10-17 18:00:50 -07001912 {
Channagoud Kadabia9b74782014-04-09 16:35:16 -07001913 return mmc_stop_command(dev);
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001914 }
1915
Channagoud Kadabia9b74782014-04-09 16:35:16 -07001916 /*
1917 * Response contains 32 bit Card status.
1918 * Parse the errors & provide relevant information
1919 */
1920 return mmc_parse_response(cmd.resp[0]);
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001921}
1922
1923/*
1924 * Function: mmc sdhci write
1925 * Arg : mmc device structure, block address, number of blocks & source
1926 * Return : 0 on Success, non zero on success
1927 * Flow : Fill in the command structure & send the command
1928 */
1929uint32_t mmc_sdhci_write(struct mmc_device *dev, void *src,
1930 uint64_t blk_addr, uint32_t num_blocks)
1931{
1932 uint32_t mmc_ret = 0;
1933 struct mmc_command cmd;
Channagoud Kadabi9b8f8fc2013-07-26 12:02:49 -07001934 struct mmc_card *card = &dev->card;
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001935
1936 memset((struct mmc_command *)&cmd, 0, sizeof(struct mmc_command));
1937
1938 /* CMD24/25 Format:
1939 * [31:0] Data Address
1940 */
1941
1942 if (num_blocks == 1)
1943 cmd.cmd_index = CMD24_WRITE_SINGLE_BLOCK;
1944 else
1945 cmd.cmd_index = CMD25_WRITE_MULTIPLE_BLOCK;
1946
Channagoud Kadabi7e72e632013-12-20 11:17:45 -08001947 /*
1948 * Standard emmc cards use byte mode addressing
1949 * convert the block address to byte address before
1950 * sending the command
1951 */
1952 if (card->type == MMC_TYPE_STD_MMC)
1953 cmd.argument = blk_addr * card->block_size;
1954 else
1955 cmd.argument = blk_addr;
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001956 cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
1957 cmd.resp_type = SDHCI_CMD_RESP_R1;
1958 cmd.trans_mode = SDHCI_MMC_WRITE;
Channagoud Kadabi9b8f8fc2013-07-26 12:02:49 -07001959
1960 /* Use CMD23 If card supports CMD23:
1961 * For SD card use the value read from SCR register
1962 * For emmc by default use CMD23.
1963 * Also as per SDCC spec always use CMD23 to stop
1964 * multiblock read/write if UHS (Ultra High Speed) is
1965 * enabled
1966 */
1967 if (MMC_CARD_SD(card))
1968 cmd.cmd23_support = dev->card.scr.cmd23_support;
1969 else
1970 cmd.cmd23_support = 0x1;
1971
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001972 cmd.data_present = 0x1;
1973 cmd.data.data_ptr = src;
1974 cmd.data.num_blocks = num_blocks;
1975
1976 /* send command */
1977 mmc_ret = sdhci_send_command(&dev->host, &cmd);
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001978
Channagoud Kadabia9b74782014-04-09 16:35:16 -07001979 /* For multi block write failures send stop command */
1980 if (mmc_ret && num_blocks > 1)
Channagoud Kadabi14fd2052013-10-17 18:00:50 -07001981 {
Channagoud Kadabia9b74782014-04-09 16:35:16 -07001982 return mmc_stop_command(dev);
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001983 }
1984
Channagoud Kadabia9b74782014-04-09 16:35:16 -07001985 /*
1986 * Response contains 32 bit Card status.
1987 * Parse the errors & provide relevant information
1988 */
1989 return mmc_parse_response(cmd.resp[0]);
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001990}
Channagoud Kadabi003171e2013-05-29 15:21:12 -07001991
1992/*
1993 * Send the erase group start address using CMD35
1994 */
1995static uint32_t mmc_send_erase_grp_start(struct mmc_device *dev, uint32_t erase_start)
1996{
1997 struct mmc_command cmd;
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07001998 struct mmc_card *card = &dev->card;
Channagoud Kadabi003171e2013-05-29 15:21:12 -07001999
2000 memset((struct mmc_command *)&cmd, 0, sizeof(struct mmc_command));
2001
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07002002 if (MMC_CARD_MMC(card))
2003 cmd.cmd_index = CMD35_ERASE_GROUP_START;
2004 else
2005 cmd.cmd_index = CMD32_ERASE_WR_BLK_START;
2006
vijay kumar1129e4e2014-03-28 11:24:48 +05302007 /*
2008 * Standard emmc cards use byte mode addressing
2009 * convert the block address to byte address before
2010 * sending the command
2011 */
2012 if (card->type == MMC_TYPE_STD_MMC)
2013 cmd.argument = erase_start * card->block_size;
2014 else
2015 cmd.argument = erase_start;
Channagoud Kadabi003171e2013-05-29 15:21:12 -07002016 cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
2017 cmd.resp_type = SDHCI_CMD_RESP_R1;
2018
2019 /* send command */
2020 if (sdhci_send_command(&dev->host, &cmd))
2021 return 1;
2022
2023 /*
2024 * CMD35 on failure returns address out of range error
2025 */
2026 if (MMC_ADDR_OUT_OF_RANGE(cmd.resp[0]))
2027 {
2028 dprintf(CRITICAL, "Address for CMD35 is out of range\n");
2029 return 1;
2030 }
2031
2032 return 0;
2033}
2034
2035/*
2036 * Send the erase group end address using CMD36
2037 */
2038static uint32_t mmc_send_erase_grp_end(struct mmc_device *dev, uint32_t erase_end)
2039{
2040 struct mmc_command cmd;
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07002041 struct mmc_card *card = &dev->card;
Channagoud Kadabi003171e2013-05-29 15:21:12 -07002042
2043 memset((struct mmc_command *)&cmd, 0, sizeof(struct mmc_command));
2044
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07002045 if (MMC_CARD_MMC(card))
2046 cmd.cmd_index = CMD36_ERASE_GROUP_END;
2047 else
2048 cmd.cmd_index = CMD33_ERASE_WR_BLK_END;
2049
vijay kumar1129e4e2014-03-28 11:24:48 +05302050 /*
2051 * Standard emmc cards use byte mode addressing
2052 * convert the block address to byte address before
2053 * sending the command
2054 */
2055 if (card->type == MMC_TYPE_STD_MMC)
2056 cmd.argument = erase_end * card->block_size;
2057 else
2058 cmd.argument = erase_end;
Channagoud Kadabi003171e2013-05-29 15:21:12 -07002059 cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
2060 cmd.resp_type = SDHCI_CMD_RESP_R1;
2061
2062 /* send command */
2063 if (sdhci_send_command(&dev->host, &cmd))
2064 return 1;
2065
2066 /*
2067 * CMD3 on failure returns address out of range error
2068 */
2069 if (MMC_ADDR_OUT_OF_RANGE(cmd.resp[0]))
2070 {
2071 dprintf(CRITICAL, "Address for CMD36 is out of range\n");
2072 return 1;
2073 }
2074
2075 return 0;
2076}
2077
2078/*
2079 * Send the erase CMD38, to erase the selected erase groups
2080 */
Channagoud Kadabie86a40b2014-03-12 17:48:51 -07002081static uint32_t mmc_send_erase(struct mmc_device *dev, uint64_t erase_timeout)
Channagoud Kadabi003171e2013-05-29 15:21:12 -07002082{
2083 struct mmc_command cmd;
2084 uint32_t status;
Channagoud Kadabi6d1751b2013-07-05 13:03:52 -07002085 uint32_t retry = 0;
Channagoud Kadabi003171e2013-05-29 15:21:12 -07002086
2087 memset((struct mmc_command *)&cmd, 0, sizeof(struct mmc_command));
2088
2089 cmd.cmd_index = CMD38_ERASE;
2090 cmd.argument = 0x00000000;
2091 cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
2092 cmd.resp_type = SDHCI_CMD_RESP_R1B;
Channagoud Kadabie86a40b2014-03-12 17:48:51 -07002093 cmd.cmd_timeout = erase_timeout;
Channagoud Kadabi003171e2013-05-29 15:21:12 -07002094
2095 /* send command */
2096 if (sdhci_send_command(&dev->host, &cmd))
2097 return 1;
2098
2099 do
2100 {
2101 if (mmc_get_card_status(&dev->host, &dev->card, &status))
2102 {
2103 dprintf(CRITICAL, "Failed to get card status after erase\n");
2104 return 1;
2105 }
2106 /* Check if the response of erase command has eras skip status set */
2107 if (status & MMC_R1_WP_ERASE_SKIP)
2108 dprintf(CRITICAL, "Write Protect set for the region, only partial space was erased\n");
2109
2110 retry++;
2111 udelay(1000);
2112 if (retry == MMC_MAX_CARD_STAT_RETRY)
2113 {
2114 dprintf(CRITICAL, "Card status check timed out after sending erase command\n");
2115 return 1;
2116 }
2117 } while(!(status & MMC_READY_FOR_DATA) || (MMC_CARD_STATUS(status) == MMC_PROG_STATE));
2118
2119
2120 return 0;
2121}
2122
2123
2124/*
2125 * Function: mmc sdhci erase
2126 * Arg : mmc device structure, block address and length
2127 * Return : 0 on Success, non zero on failure
2128 * Flow : Fill in the command structure & send the command
2129 */
2130uint32_t mmc_sdhci_erase(struct mmc_device *dev, uint32_t blk_addr, uint64_t len)
2131{
2132 uint32_t erase_unit_sz = 0;
2133 uint32_t erase_start;
2134 uint32_t erase_end;
2135 uint32_t blk_end;
2136 uint32_t num_erase_grps;
Channagoud Kadabie86a40b2014-03-12 17:48:51 -07002137 uint64_t erase_timeout = 0;
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07002138 struct mmc_card *card;
2139
2140
2141 card = &dev->card;
Channagoud Kadabi003171e2013-05-29 15:21:12 -07002142
2143 /*
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07002144 * Calculate the erase unit size,
2145 * 1. Based on emmc 4.5 spec for emmc card
2146 * 2. Use SD Card Status info for SD cards
Channagoud Kadabi003171e2013-05-29 15:21:12 -07002147 */
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07002148 if (MMC_CARD_MMC(card))
2149 {
2150 /*
2151 * Calculate the erase unit size as per the emmc specification v4.5
2152 */
2153 if (dev->card.ext_csd[MMC_ERASE_GRP_DEF])
2154 erase_unit_sz = (MMC_HC_ERASE_MULT * dev->card.ext_csd[MMC_HC_ERASE_GRP_SIZE]) / MMC_BLK_SZ;
2155 else
2156 erase_unit_sz = (dev->card.csd.erase_grp_size + 1) * (dev->card.csd.erase_grp_mult + 1);
2157 }
Channagoud Kadabi003171e2013-05-29 15:21:12 -07002158 else
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07002159 erase_unit_sz = dev->card.ssr.au_size * dev->card.ssr.num_aus;
2160
Channagoud Kadabi003171e2013-05-29 15:21:12 -07002161
2162 /* Convert length in blocks */
2163 len = len / MMC_BLK_SZ;
2164
2165 if (len < erase_unit_sz)
2166 {
2167 dprintf(CRITICAL, "Requested length is less than min erase group size\n");
2168 return 1;
2169 }
2170
2171 /* Calculate erase groups based on the length in blocks */
2172 num_erase_grps = len / erase_unit_sz;
2173
2174 /* Start address of the erase range */
2175 erase_start = blk_addr;
2176
2177 /* Last address of the erase range */
2178 erase_end = blk_addr + ((num_erase_grps - 1) * erase_unit_sz);
2179
2180 /* Boundary check for overlap */
2181 blk_end = blk_addr + len;
2182
2183 if (erase_end > blk_end)
2184 {
2185 dprintf(CRITICAL, "The erase group overlaps the max requested for erase\n");
2186 erase_end -= erase_unit_sz;
2187 }
2188
2189 /* Send CMD35 for erase group start */
2190 if (mmc_send_erase_grp_start(dev, erase_start))
2191 {
2192 dprintf(CRITICAL, "Failed to send erase grp start address\n");
2193 return 1;
2194 }
2195
2196 /* Send CMD36 for erase group end */
2197 if (mmc_send_erase_grp_end(dev, erase_end))
2198 {
2199 dprintf(CRITICAL, "Failed to send erase grp end address\n");
2200 return 1;
2201 }
2202
Channagoud Kadabie86a40b2014-03-12 17:48:51 -07002203 /*
2204 * As per emmc 4.5 spec section 7.4.27, calculate the erase timeout
Channagoud Kadabi7491e6c2014-12-02 15:42:11 -08002205 * erase_timeout = 300ms * ERASE_TIMEOUT_MULT * num_erase_grps
Channagoud Kadabie86a40b2014-03-12 17:48:51 -07002206 */
vijay kumar488e4842015-08-21 20:37:29 +05302207 if (MMC_CARD_MMC(card))
2208 erase_timeout = (300 * 1000 * card->ext_csd[MMC_ERASE_TIMEOUT_MULT] * num_erase_grps);
2209 else
2210 erase_timeout = (300 * 1000 * num_erase_grps);
Channagoud Kadabie86a40b2014-03-12 17:48:51 -07002211
Channagoud Kadabi003171e2013-05-29 15:21:12 -07002212 /* Send CMD38 to perform erase */
Channagoud Kadabie86a40b2014-03-12 17:48:51 -07002213 if (mmc_send_erase(dev, erase_timeout))
Channagoud Kadabi003171e2013-05-29 15:21:12 -07002214 {
2215 dprintf(CRITICAL, "Failed to erase the specified partition\n");
2216 return 1;
2217 }
Channagoud Kadabie86a40b2014-03-12 17:48:51 -07002218
Channagoud Kadabi003171e2013-05-29 15:21:12 -07002219 return 0;
2220}
2221
2222/*
2223 * Function: mmc get wp status
2224 * Arg : mmc device structure, block address and buffer for getting wp status
2225 * Return : 0 on Success, 1 on Failure
2226 * Flow : Get the WP group status by sending CMD31
2227 */
2228uint32_t mmc_get_wp_status(struct mmc_device *dev, uint32_t addr, uint8_t *wp_status)
2229{
2230 struct mmc_command cmd;
2231
2232 memset((struct mmc_command *)&cmd, 0, sizeof(struct mmc_command));
2233
2234 cmd.cmd_index = CMD31_SEND_WRITE_PROT_TYPE;
2235 cmd.argument = addr;
2236 cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
2237 cmd.resp_type = SDHCI_CMD_RESP_R1;
2238 cmd.trans_mode = SDHCI_MMC_READ;
2239 cmd.data_present = 0x1;
2240 cmd.data.data_ptr = wp_status;
2241 cmd.data.num_blocks = 0x1;
2242 cmd.data.blk_sz = 0x8;
2243
2244 if (sdhci_send_command(&dev->host, &cmd))
2245 {
2246 dprintf(CRITICAL, "Failed to get status of write protect bits\n");
2247 return 1;
2248 }
2249
2250 return 0;
2251}
2252
2253/*
2254 * Function: mmc set/clear WP on user area
2255 * Arg : mmc device structure, block address,len, & flag to set or clear
2256 * Return : 0 on success, 1 on failure
2257 * Flow : Function to set/clear power on write protect on user area
2258 */
2259
2260uint32_t mmc_set_clr_power_on_wp_user(struct mmc_device *dev, uint32_t addr, uint64_t len, uint8_t set_clr)
2261{
2262 struct mmc_command cmd;
vijay kumar7420baa2014-05-02 12:01:49 +05302263 struct mmc_card *card = &dev->card;
Channagoud Kadabi003171e2013-05-29 15:21:12 -07002264 uint32_t wp_grp_size;
2265 uint32_t status;
2266 uint32_t num_wp_grps;
2267 uint32_t ret;
Channagoud Kadabi6d1751b2013-07-05 13:03:52 -07002268 uint32_t retry = 0;
Channagoud Kadabi003171e2013-05-29 15:21:12 -07002269 uint32_t i;
2270
2271 memset((struct mmc_command *)&cmd, 0, sizeof(struct mmc_command));
2272
2273 /* Convert len into blocks */
2274 len = len / MMC_BLK_SZ;
vijay kumar697dbfd2014-04-24 17:12:49 +05302275 wp_grp_size = dev->card.wp_grp_size;
Channagoud Kadabi003171e2013-05-29 15:21:12 -07002276
2277 /* Disable PERM WP */
2278 ret = mmc_switch_cmd(&dev->host, &dev->card, MMC_SET_BIT, MMC_USR_WP, MMC_US_PERM_WP_DIS);
2279
2280 if (ret)
2281 {
2282 dprintf(CRITICAL, "Failed to Disable PERM WP\n");
2283 return ret;
2284 }
2285
2286 /* Read the default values for user WP */
2287 ret = mmc_get_ext_csd(&dev->host, &dev->card);
2288
2289 if (ret)
2290 {
2291 dprintf(CRITICAL, "Failed to read ext csd for the card\n");
2292 return ret;
2293 }
2294
2295 /* Check if user power on WP is disabled or perm WP is enabled */
2296 if ((dev->card.ext_csd[MMC_USR_WP] & MMC_US_PWR_WP_DIS)
2297 || (dev->card.ext_csd[MMC_USR_WP] & MMC_US_PERM_WP_EN))
2298 {
2299 dprintf(CRITICAL, "Power on protection is disabled, cannot be set\n");
2300 return 1;
2301 }
2302
Channagoud Kadabi003171e2013-05-29 15:21:12 -07002303 if (len < wp_grp_size)
2304 {
2305 dprintf(CRITICAL, "Length is less than min WP size, WP was not set\n");
2306 return 1;
2307 }
2308
2309 /* Set power on USER WP */
2310 ret = mmc_switch_cmd(&dev->host, &dev->card, MMC_SET_BIT, MMC_USR_WP, MMC_US_PWR_WP_EN);
2311
2312 if (ret)
2313 {
2314 dprintf(CRITICAL, "Failed to set power on WP for user\n");
2315 return ret;
2316 }
2317
2318 num_wp_grps = ROUNDUP(len, wp_grp_size) / wp_grp_size;
2319
2320 if (set_clr)
2321 cmd.cmd_index = CMD28_SET_WRITE_PROTECT;
2322 else
2323 cmd.cmd_index = CMD29_CLEAR_WRITE_PROTECT;
2324
2325 cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
2326 cmd.resp_type = SDHCI_CMD_RESP_R1B;
2327
2328 for(i = 0; i < num_wp_grps; i++)
2329 {
vijay kumar7420baa2014-05-02 12:01:49 +05302330 /*
2331 * Standard emmc cards use byte mode addressing
2332 * convert the block address to byte address before
2333 * sending the command
2334 */
2335 if (card->type == MMC_TYPE_STD_MMC)
2336 cmd.argument = (addr + (i * wp_grp_size)) * card->block_size;
2337 else
2338 cmd.argument = addr + (i * wp_grp_size);
Channagoud Kadabi003171e2013-05-29 15:21:12 -07002339
2340 if (sdhci_send_command(&dev->host, &cmd))
2341 return 1;
2342
2343 /* CMD28/CMD29 On failure returns address out of range error */
2344 if (MMC_ADDR_OUT_OF_RANGE(cmd.resp[0]))
2345 {
2346 dprintf(CRITICAL, "Address for CMD28/29 is out of range\n");
2347 return 1;
2348 }
2349
2350 /* Check the card status */
2351 do
2352 {
2353 if (mmc_get_card_status(&dev->host, &dev->card, &status))
2354 {
2355 dprintf(CRITICAL, "Failed to get card status afterapplying write protect\n");
2356 return 1;
2357 }
2358
2359 /* Time out for WP command */
2360 retry++;
2361 udelay(1000);
2362 if (retry == MMC_MAX_CARD_STAT_RETRY)
2363 {
2364 dprintf(CRITICAL, "Card status timed out after sending write protect command\n");
2365 return 1;
2366 }
2367 } while (!(status & MMC_READY_FOR_DATA) || (MMC_CARD_STATUS(status) == MMC_PROG_STATE));
2368
2369 }
2370
2371 return 0;
2372}
Channagoud Kadabi9e3c3b92013-06-18 18:32:32 -07002373
2374/* Function to put the mmc card to sleep */
2375void mmc_put_card_to_sleep(struct mmc_device *dev)
2376{
2377 struct mmc_command cmd = {0};
2378 struct mmc_card *card = &dev->card;
2379
2380 cmd.cmd_index = CMD7_SELECT_DESELECT_CARD;
2381 cmd.argument = 0x00000000;
2382 cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
2383 cmd.resp_type = SDHCI_CMD_RESP_NONE;
2384
2385 /* send command */
2386 if(sdhci_send_command(&dev->host, &cmd))
2387 {
2388 dprintf(CRITICAL, "card deselect error: %s\n", __func__);
2389 return;
2390 }
vijay kumarb01d64c2015-08-21 20:37:29 +05302391 if(MMC_CARD_MMC(card)){
2392 /*CMD5 is reserved in SD card */
2393 cmd.cmd_index = CMD5_SLEEP_AWAKE;
2394 cmd.argument = (card->rca << MMC_CARD_RCA_BIT) | MMC_CARD_SLEEP;
2395 cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
2396 cmd.resp_type = SDHCI_CMD_RESP_R1B;
Channagoud Kadabi9e3c3b92013-06-18 18:32:32 -07002397
vijay kumarb01d64c2015-08-21 20:37:29 +05302398 /* send command */
2399 if(sdhci_send_command(&dev->host, &cmd))
2400 dprintf(CRITICAL, "card sleep error: %s\n", __func__);
2401 }
Channagoud Kadabi9e3c3b92013-06-18 18:32:32 -07002402}
Channagoud Kadabi31d648c2015-01-29 12:59:00 -08002403
2404/*
2405 * Switch the partition access type to rpmb or default
2406 */
2407static uint32_t mmc_sdhci_switch_part(struct mmc_device *dev, uint32_t type)
2408{
2409 uint32_t part_access;
2410 uint32_t ret;
2411
2412 /* Clear the partition access */
2413 part_access = dev->card.ext_csd[MMC_PARTITION_CONFIG] & ~PARTITION_ACCESS_MASK;
2414 part_access |= type;
2415
2416 ret = mmc_switch_cmd(&dev->host, &dev->card, MMC_ACCESS_WRITE, MMC_PARTITION_CONFIG, part_access);
2417
2418 if (ret)
2419 {
2420 dprintf(CRITICAL, "Failed to switch partition to type: %u\n", type);
2421 return 1;
2422 }
2423
2424 dev->card.ext_csd[MMC_PARTITION_CONFIG] = part_access;
2425 return 0;
2426}
2427
2428static uint32_t mmc_sdhci_set_blk_cnt(struct mmc_device *dev, uint32_t blk_cnt, uint32_t rel_write)
2429{
2430 struct mmc_command cmd = {0};
2431
2432 cmd.cmd_index = CMD23_SET_BLOCK_COUNT;
2433 cmd.argument = blk_cnt & 0x0000ffff;
2434 cmd.argument |= rel_write;
2435 cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
2436 cmd.resp_type = SDHCI_CMD_RESP_R1;
2437
2438 if (sdhci_send_command(&dev->host, &cmd))
2439 {
2440 dprintf(CRITICAL, "Set block count failed: %s\n", __func__);
2441 return 1;
2442 }
2443
2444 return 0;
2445}
2446
2447uint32_t mmc_sdhci_rpmb_send(struct mmc_device *dev, struct mmc_command *cmd)
2448{
2449 int i;
2450 uint32_t retry = 5;
2451 uint32_t status;
2452 uint32_t rel_write = 0;
2453 uint32_t ret = 1;
2454
2455 ASSERT(cmd);
2456
2457 /* 1. Set the partition type to rpmb */
2458 if (mmc_sdhci_switch_part(dev, PART_ACCESS_RPMB))
2459 return 1;
2460
2461 for (i = 0; i < MAX_RPMB_CMDS; i++)
2462 {
2463 if (!cmd[i].cmd_index)
2464 break;
2465
2466 if (cmd[i].write_flag == true)
2467 rel_write = BIT(31);
2468 else
2469 rel_write = 0;
2470
2471 /* 2. Set the block count using cmd23 */
2472 if (mmc_sdhci_set_blk_cnt(dev, cmd[i].data.num_blocks, rel_write))
2473 goto err;
2474
2475 /* 3. Send the command */
2476 if (sdhci_send_command(&dev->host, &cmd[i]))
2477 goto err;
2478 do
2479 {
2480 /* 4. Poll for card status to ensure rpmb operation completeness */
2481 if (mmc_get_card_status(&dev->host, &dev->card, &status))
2482 {
2483 dprintf(CRITICAL, "Failed to get card status after rpmb operations\n");
2484 goto err;
2485 }
2486
2487 retry--;
2488 udelay(500);
2489 if (!retry)
2490 {
2491 dprintf(CRITICAL, "Card status check timed out after rpmb operations\n");
2492 goto err;
2493 }
2494 } while(!(status & MMC_READY_FOR_DATA) || (MMC_CARD_STATUS(status) == MMC_PROG_STATE));
2495 }
2496
2497 /* If we reach here, that means success */
2498 ret = 0;
2499
2500err:
2501 /* 5. Switch the partition back to default type */
2502 if (mmc_sdhci_switch_part(dev, PART_ACCESS_DEFAULT))
2503 ret = 1;
2504
2505 return ret;
2506}