blob: 2af5efec50326d19d38dc01f3dc71753ee116cb0 [file] [log] [blame]
Catalin Marinas8c2c3df2012-04-20 14:45:54 +01001config ARM64
2 def_bool y
Lorenzo Pieralisid8f4f162015-03-24 17:58:51 +00003 select ACPI_GENERIC_GSI if ACPI
Al Stone6933de02015-03-24 14:02:51 +00004 select ACPI_REDUCED_HARDWARE_ONLY if ACPI
Catalin Marinas8c2c3df2012-04-20 14:45:54 +01005 select ARCH_HAS_ATOMIC64_DEC_IF_POSITIVE
Kees Cook2b68f6c2015-04-14 15:48:00 -07006 select ARCH_HAS_ELF_RANDOMIZE
Riku Voipio957e3fa2014-12-12 16:57:44 -08007 select ARCH_HAS_GCOV_PROFILE_ALL
Laura Abbott308c09f2014-08-08 14:23:25 -07008 select ARCH_HAS_SG_CHAIN
Lorenzo Pieralisi1f850082013-09-04 10:55:17 +01009 select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST
Sudeep Hollac63c8702014-05-09 10:33:01 +010010 select ARCH_USE_CMPXCHG_LOCKREF
Peter Zijlstra4badad32014-06-06 19:53:16 +020011 select ARCH_SUPPORTS_ATOMIC_RMW
Arnd Bergmann91701002013-02-21 11:42:57 +010012 select ARCH_WANT_OPTIONAL_GPIOLIB
Will Deacon6212a512012-11-07 14:16:28 +000013 select ARCH_WANT_COMPAT_IPC_PARSE_VERSION
Catalin Marinasb6f35982013-01-29 18:25:41 +000014 select ARCH_WANT_FRAME_POINTERS
Catalin Marinas25c92a32012-12-18 15:26:13 +000015 select ARM_AMBA
Mark Rutland1aee5d72012-11-20 10:06:00 +000016 select ARM_ARCH_TIMER
Catalin Marinasc4188ed2013-01-14 12:39:31 +000017 select ARM_GIC
AKASHI Takahiro875cbf32014-07-04 08:28:30 +010018 select AUDIT_ARCH_COMPAT_GENERIC
Suravee Suthikulpanit853a33c2014-11-25 18:47:22 +000019 select ARM_GIC_V2M if PCI_MSI
Marc Zyngier021f6532014-06-30 16:01:31 +010020 select ARM_GIC_V3
Marc Zyngier19812722014-11-24 14:35:19 +000021 select ARM_GIC_V3_ITS if PCI_MSI
Will Deaconadace892013-05-08 17:29:24 +010022 select BUILDTIME_EXTABLE_SORT
Catalin Marinasdb2789b2012-12-18 15:27:25 +000023 select CLONE_BACKWARDS
Deepak Saxena7ca2ef32012-09-22 10:33:36 -070024 select COMMON_CLK
Lorenzo Pieralisi166936b2013-11-07 18:37:14 +000025 select CPU_PM if (SUSPEND || CPU_IDLE)
Will Deacon7bc13fd2013-11-06 19:32:13 +000026 select DCACHE_WORD_ACCESS
Laura Abbottd4932f92014-10-09 15:26:44 -070027 select GENERIC_ALLOCATOR
Catalin Marinas8c2c3df2012-04-20 14:45:54 +010028 select GENERIC_CLOCKEVENTS
Lorenzo Pieralisi1f850082013-09-04 10:55:17 +010029 select GENERIC_CLOCKEVENTS_BROADCAST if SMP
Ard Biesheuvel3be1a5c2014-03-04 01:10:04 +000030 select GENERIC_CPU_AUTOPROBE
Mark Salterbf4b5582014-04-07 15:39:52 -070031 select GENERIC_EARLY_IOREMAP
Catalin Marinas8c2c3df2012-04-20 14:45:54 +010032 select GENERIC_IRQ_PROBE
33 select GENERIC_IRQ_SHOW
Arnd Bergmanncb61f672014-11-19 14:09:07 +010034 select GENERIC_PCI_IOMAP
Stephen Boyd65cd4f62013-07-18 16:21:18 -070035 select GENERIC_SCHED_CLOCK
Catalin Marinas8c2c3df2012-04-20 14:45:54 +010036 select GENERIC_SMP_IDLE_THREAD
Will Deacon12a0ef72013-11-06 17:20:22 +000037 select GENERIC_STRNCPY_FROM_USER
38 select GENERIC_STRNLEN_USER
Catalin Marinas8c2c3df2012-04-20 14:45:54 +010039 select GENERIC_TIME_VSYSCALL
Marc Zyngiera1ddc742014-08-26 11:03:17 +010040 select HANDLE_DOMAIN_IRQ
Catalin Marinas8c2c3df2012-04-20 14:45:54 +010041 select HARDIRQS_SW_RESEND
Steve Capper5284e1b2014-10-24 13:22:20 +010042 select HAVE_ALIGNED_STRUCT_PAGE if SLUB
AKASHI Takahiro875cbf32014-07-04 08:28:30 +010043 select HAVE_ARCH_AUDITSYSCALL
Yalin Wang8e7a4ce2014-11-03 03:02:23 +010044 select HAVE_ARCH_BITREVERSE
Jiang Liu9732caf2014-01-07 22:17:13 +080045 select HAVE_ARCH_JUMP_LABEL
Vijaya Kumar K95292472014-01-28 11:20:22 +000046 select HAVE_ARCH_KGDB
AKASHI Takahiroa1ae65b2014-11-28 05:26:39 +000047 select HAVE_ARCH_SECCOMP_FILTER
Catalin Marinas8c2c3df2012-04-20 14:45:54 +010048 select HAVE_ARCH_TRACEHOOK
Zi Shen Lime54bcde2014-08-26 21:15:30 -070049 select HAVE_BPF_JIT
AKASHI Takahiroaf64d2a2014-04-30 10:54:32 +010050 select HAVE_C_RECORDMCOUNT
Laura Abbottc0c264a2014-06-25 23:55:03 +010051 select HAVE_CC_STACKPROTECTOR
Steve Capper5284e1b2014-10-24 13:22:20 +010052 select HAVE_CMPXCHG_DOUBLE
Catalin Marinas9b2a60c2012-10-08 16:28:13 -070053 select HAVE_DEBUG_BUGVERBOSE
Catalin Marinasb69ec422012-10-08 16:28:11 -070054 select HAVE_DEBUG_KMEMLEAK
Catalin Marinas8c2c3df2012-04-20 14:45:54 +010055 select HAVE_DMA_API_DEBUG
56 select HAVE_DMA_ATTRS
Laura Abbott6ac21042013-12-12 19:28:33 +000057 select HAVE_DMA_CONTIGUOUS
AKASHI Takahirobd7d38d2014-04-30 10:54:34 +010058 select HAVE_DYNAMIC_FTRACE
Will Deacon50afc332013-12-16 17:50:08 +000059 select HAVE_EFFICIENT_UNALIGNED_ACCESS
AKASHI Takahiroaf64d2a2014-04-30 10:54:32 +010060 select HAVE_FTRACE_MCOUNT_RECORD
AKASHI Takahiro819e50e2014-04-30 18:54:33 +090061 select HAVE_FUNCTION_TRACER
62 select HAVE_FUNCTION_GRAPH_TRACER
Catalin Marinas8c2c3df2012-04-20 14:45:54 +010063 select HAVE_GENERIC_DMA_COHERENT
Catalin Marinas8c2c3df2012-04-20 14:45:54 +010064 select HAVE_HW_BREAKPOINT if PERF_EVENTS
Catalin Marinas8c2c3df2012-04-20 14:45:54 +010065 select HAVE_MEMBLOCK
Mark Rutland55834a72014-02-07 17:12:45 +000066 select HAVE_PATA_PLATFORM
Catalin Marinas8c2c3df2012-04-20 14:45:54 +010067 select HAVE_PERF_EVENTS
Jean Pihet2ee0d7f2014-02-03 19:18:27 +010068 select HAVE_PERF_REGS
69 select HAVE_PERF_USER_STACK_DUMP
Steve Capper5e5f6dc2014-10-09 15:29:23 -070070 select HAVE_RCU_TABLE_FREE
AKASHI Takahiro055b1212014-04-30 10:54:36 +010071 select HAVE_SYSCALL_TRACEPOINTS
Catalin Marinas8c2c3df2012-04-20 14:45:54 +010072 select IRQ_DOMAIN
Catalin Marinasfea2aca2012-10-16 11:26:57 +010073 select MODULES_USE_ELF_RELA
Catalin Marinas8c2c3df2012-04-20 14:45:54 +010074 select NO_BOOTMEM
75 select OF
76 select OF_EARLY_FLATTREE
Marek Szyprowski9bf14b72014-02-28 14:42:55 +010077 select OF_RESERVED_MEM
Catalin Marinas8c2c3df2012-04-20 14:45:54 +010078 select PERF_USE_VMALLOC
Catalin Marinasaa1e8ec2013-02-28 18:14:37 +000079 select POWER_RESET
80 select POWER_SUPPLY
Catalin Marinas8c2c3df2012-04-20 14:45:54 +010081 select RTC_LIB
82 select SPARSE_IRQ
Catalin Marinas7ac57a82012-10-08 16:28:16 -070083 select SYSCTL_EXCEPTION_TRACE
Larry Bassel6c81fe72014-05-30 12:34:15 -070084 select HAVE_CONTEXT_TRACKING
Catalin Marinas8c2c3df2012-04-20 14:45:54 +010085 help
86 ARM 64-bit (AArch64) Linux support.
87
88config 64BIT
89 def_bool y
90
91config ARCH_PHYS_ADDR_T_64BIT
92 def_bool y
93
94config MMU
95 def_bool y
96
Uwe Kleine-Königce816fa2014-04-07 15:39:19 -070097config NO_IOPORT_MAP
Liviu Dudaud1e6dc92014-09-29 15:29:31 +010098 def_bool y if !PCI
Catalin Marinas8c2c3df2012-04-20 14:45:54 +010099
100config STACKTRACE_SUPPORT
101 def_bool y
102
103config LOCKDEP_SUPPORT
104 def_bool y
105
106config TRACE_IRQFLAGS_SUPPORT
107 def_bool y
108
Will Deaconc209f792014-03-14 17:47:05 +0000109config RWSEM_XCHGADD_ALGORITHM
Catalin Marinas8c2c3df2012-04-20 14:45:54 +0100110 def_bool y
111
112config GENERIC_HWEIGHT
113 def_bool y
114
115config GENERIC_CSUM
116 def_bool y
117
118config GENERIC_CALIBRATE_DELAY
119 def_bool y
120
Catalin Marinas19e76402014-02-27 12:09:22 +0000121config ZONE_DMA
Catalin Marinas8c2c3df2012-04-20 14:45:54 +0100122 def_bool y
123
Steve Capper29e56942014-10-09 15:29:25 -0700124config HAVE_GENERIC_RCU_GUP
125 def_bool y
126
Catalin Marinas8c2c3df2012-04-20 14:45:54 +0100127config ARCH_DMA_ADDR_T_64BIT
128 def_bool y
129
130config NEED_DMA_MAP_STATE
131 def_bool y
132
133config NEED_SG_DMA_LENGTH
134 def_bool y
135
136config SWIOTLB
137 def_bool y
138
139config IOMMU_HELPER
140 def_bool SWIOTLB
141
Ard Biesheuvel4cfb3612013-07-09 14:18:12 +0100142config KERNEL_MODE_NEON
143 def_bool y
144
Rob Herring92cc15f2014-04-18 17:19:59 -0500145config FIX_EARLYCON_MEM
146 def_bool y
147
Kirill A. Shutemov9f25e6a2015-04-14 15:45:39 -0700148config PGTABLE_LEVELS
149 int
150 default 2 if ARM64_64K_PAGES && ARM64_VA_BITS_42
151 default 3 if ARM64_64K_PAGES && ARM64_VA_BITS_48
152 default 3 if ARM64_4K_PAGES && ARM64_VA_BITS_39
153 default 4 if ARM64_4K_PAGES && ARM64_VA_BITS_48
154
Catalin Marinas8c2c3df2012-04-20 14:45:54 +0100155source "init/Kconfig"
156
157source "kernel/Kconfig.freezer"
158
Catalin Marinas1ae90e72012-09-05 17:47:44 +0100159menu "Platform selection"
160
Alim Akhtar6f56eef2014-11-22 22:41:52 +0900161config ARCH_EXYNOS
162 bool
163 help
164 This enables support for Samsung Exynos SoC family
165
166config ARCH_EXYNOS7
167 bool "ARMv8 based Samsung Exynos7"
168 select ARCH_EXYNOS
169 select COMMON_CLK_SAMSUNG
170 select HAVE_S3C2410_WATCHDOG if WATCHDOG
171 select HAVE_S3C_RTC if RTC_CLASS
172 select PINCTRL
173 select PINCTRL_EXYNOS
174
175 help
176 This enables support for Samsung Exynos7 SoC family
177
Olof Johansson5118a6a2015-01-27 16:19:11 -0800178config ARCH_FSL_LS2085A
179 bool "Freescale LS2085A SOC"
180 help
181 This enables support for Freescale LS2085A SOC.
182
Bintian Wang85fe9462015-01-06 09:30:36 +0800183config ARCH_HISI
184 bool "Hisilicon SoC Family"
185 help
186 This enables support for Hisilicon ARMv8 SoC family
187
Eddie Huang4727a6f2015-12-01 10:14:00 +0100188config ARCH_MEDIATEK
189 bool "Mediatek MT65xx & MT81xx ARMv8 SoC"
190 select ARM_GIC
Yingjoe Chen0a233cd2015-03-06 14:24:50 +0800191 select PINCTRL
Eddie Huang4727a6f2015-12-01 10:14:00 +0100192 help
193 Support for Mediatek MT65xx & MT81xx ARMv8 SoCs
194
Abhimanyu Kapurd7f64a42013-10-15 21:11:09 -0700195config ARCH_QCOM
196 bool "Qualcomm Platforms"
197 select PINCTRL
198 help
199 This enables support for the ARMv8 based Qualcomm chipsets.
200
Suravee Suthikulpanit41904362014-11-26 11:51:09 +0700201config ARCH_SEATTLE
202 bool "AMD Seattle SoC Family"
203 help
204 This enables support for AMD Seattle SOC Family
205
Paul Walmsleyd035fdf2015-01-07 01:17:33 -0700206config ARCH_TEGRA
207 bool "NVIDIA Tegra SoC Family"
208 select ARCH_HAS_RESET_CONTROLLER
209 select ARCH_REQUIRE_GPIOLIB
210 select CLKDEV_LOOKUP
211 select CLKSRC_MMIO
212 select CLKSRC_OF
213 select GENERIC_CLOCKEVENTS
214 select HAVE_CLK
Paul Walmsleyd035fdf2015-01-07 01:17:33 -0700215 select PINCTRL
216 select RESET_CONTROLLER
217 help
218 This enables support for the NVIDIA Tegra SoC family.
219
220config ARCH_TEGRA_132_SOC
221 bool "NVIDIA Tegra132 SoC"
222 depends on ARCH_TEGRA
223 select PINCTRL_TEGRA124
Paul Walmsleyd035fdf2015-01-07 01:17:33 -0700224 select USB_ULPI if USB_PHY
225 select USB_ULPI_VIEWPORT if USB_PHY
226 help
227 Enable support for NVIDIA Tegra132 SoC, based on the Denver
228 ARMv8 CPU. The Tegra132 SoC is similar to the Tegra124 SoC,
229 but contains an NVIDIA Denver CPU complex in place of
230 Tegra124's "4+1" Cortex-A15 CPU complex.
231
Zhizhou Zhangc4bb7992015-03-11 02:27:08 +0000232config ARCH_SPRD
233 bool "Spreadtrum SoC platform"
234 help
235 Support for Spreadtrum ARM based SoCs
236
Radha Mohan Chintakuntla28f74202014-04-08 18:47:51 +0530237config ARCH_THUNDER
238 bool "Cavium Inc. Thunder SoC Family"
239 help
240 This enables support for Cavium's Thunder Family of SoCs.
241
Catalin Marinas1ae90e72012-09-05 17:47:44 +0100242config ARCH_VEXPRESS
243 bool "ARMv8 software model (Versatile Express)"
244 select ARCH_REQUIRE_GPIOLIB
245 select COMMON_CLK_VERSATILE
Catalin Marinasaa1e8ec2013-02-28 18:14:37 +0000246 select POWER_RESET_VEXPRESS
Catalin Marinas1ae90e72012-09-05 17:47:44 +0100247 select VEXPRESS_CONFIG
248 help
249 This enables support for the ARMv8 software model (Versatile
250 Express).
Catalin Marinas8c2c3df2012-04-20 14:45:54 +0100251
Vinayak Kale15942852013-04-24 10:06:57 +0100252config ARCH_XGENE
253 bool "AppliedMicro X-Gene SOC Family"
254 help
255 This enables support for AppliedMicro X-Gene SOC Family
256
Michal Simek5d1b79d2015-03-09 09:41:04 +0100257config ARCH_ZYNQMP
258 bool "Xilinx ZynqMP Family"
259 help
260 This enables support for Xilinx ZynqMP Family
261
Catalin Marinas8c2c3df2012-04-20 14:45:54 +0100262endmenu
263
264menu "Bus support"
265
Liviu Dudaud1e6dc92014-09-29 15:29:31 +0100266config PCI
267 bool "PCI support"
268 help
269 This feature enables support for PCI bus system. If you say Y
270 here, the kernel will include drivers and infrastructure code
271 to support PCI bus devices.
272
273config PCI_DOMAINS
274 def_bool PCI
275
276config PCI_DOMAINS_GENERIC
277 def_bool PCI
278
279config PCI_SYSCALL
280 def_bool PCI
281
282source "drivers/pci/Kconfig"
283source "drivers/pci/pcie/Kconfig"
284source "drivers/pci/hotplug/Kconfig"
285
Catalin Marinas8c2c3df2012-04-20 14:45:54 +0100286endmenu
287
288menu "Kernel Features"
289
Andre Przywarac0a01b82014-11-14 15:54:12 +0000290menu "ARM errata workarounds via the alternatives framework"
291
292config ARM64_ERRATUM_826319
293 bool "Cortex-A53: 826319: System might deadlock if a write cannot complete until read data is accepted"
294 default y
295 help
296 This option adds an alternative code sequence to work around ARM
297 erratum 826319 on Cortex-A53 parts up to r0p2 with an AMBA 4 ACE or
298 AXI master interface and an L2 cache.
299
300 If a Cortex-A53 uses an AMBA AXI4 ACE interface to other processors
301 and is unable to accept a certain write via this interface, it will
302 not progress on read data presented on the read data channel and the
303 system can deadlock.
304
305 The workaround promotes data cache clean instructions to
306 data cache clean-and-invalidate.
307 Please note that this does not necessarily enable the workaround,
308 as it depends on the alternative framework, which will only patch
309 the kernel if an affected CPU is detected.
310
311 If unsure, say Y.
312
313config ARM64_ERRATUM_827319
314 bool "Cortex-A53: 827319: Data cache clean instructions might cause overlapping transactions to the interconnect"
315 default y
316 help
317 This option adds an alternative code sequence to work around ARM
318 erratum 827319 on Cortex-A53 parts up to r0p2 with an AMBA 5 CHI
319 master interface and an L2 cache.
320
321 Under certain conditions this erratum can cause a clean line eviction
322 to occur at the same time as another transaction to the same address
323 on the AMBA 5 CHI interface, which can cause data corruption if the
324 interconnect reorders the two transactions.
325
326 The workaround promotes data cache clean instructions to
327 data cache clean-and-invalidate.
328 Please note that this does not necessarily enable the workaround,
329 as it depends on the alternative framework, which will only patch
330 the kernel if an affected CPU is detected.
331
332 If unsure, say Y.
333
334config ARM64_ERRATUM_824069
335 bool "Cortex-A53: 824069: Cache line might not be marked as clean after a CleanShared snoop"
336 default y
337 help
338 This option adds an alternative code sequence to work around ARM
339 erratum 824069 on Cortex-A53 parts up to r0p2 when it is connected
340 to a coherent interconnect.
341
342 If a Cortex-A53 processor is executing a store or prefetch for
343 write instruction at the same time as a processor in another
344 cluster is executing a cache maintenance operation to the same
345 address, then this erratum might cause a clean cache line to be
346 incorrectly marked as dirty.
347
348 The workaround promotes data cache clean instructions to
349 data cache clean-and-invalidate.
350 Please note that this option does not necessarily enable the
351 workaround, as it depends on the alternative framework, which will
352 only patch the kernel if an affected CPU is detected.
353
354 If unsure, say Y.
355
356config ARM64_ERRATUM_819472
357 bool "Cortex-A53: 819472: Store exclusive instructions might cause data corruption"
358 default y
359 help
360 This option adds an alternative code sequence to work around ARM
361 erratum 819472 on Cortex-A53 parts up to r0p1 with an L2 cache
362 present when it is connected to a coherent interconnect.
363
364 If the processor is executing a load and store exclusive sequence at
365 the same time as a processor in another cluster is executing a cache
366 maintenance operation to the same address, then this erratum might
367 cause data corruption.
368
369 The workaround promotes data cache clean instructions to
370 data cache clean-and-invalidate.
371 Please note that this does not necessarily enable the workaround,
372 as it depends on the alternative framework, which will only patch
373 the kernel if an affected CPU is detected.
374
375 If unsure, say Y.
376
377config ARM64_ERRATUM_832075
378 bool "Cortex-A57: 832075: possible deadlock on mixing exclusive memory accesses with device loads"
379 default y
380 help
381 This option adds an alternative code sequence to work around ARM
382 erratum 832075 on Cortex-A57 parts up to r1p2.
383
384 Affected Cortex-A57 parts might deadlock when exclusive load/store
385 instructions to Write-Back memory are mixed with Device loads.
386
387 The workaround is to promote device loads to use Load-Acquire
388 semantics.
389 Please note that this does not necessarily enable the workaround,
390 as it depends on the alternative framework, which will only patch
391 the kernel if an affected CPU is detected.
392
393 If unsure, say Y.
394
Will Deacon905e8c52015-03-23 19:07:02 +0000395config ARM64_ERRATUM_845719
396 bool "Cortex-A53: 845719: a load might read incorrect data"
397 depends on COMPAT
398 default y
399 help
400 This option adds an alternative code sequence to work around ARM
401 erratum 845719 on Cortex-A53 parts up to r0p4.
402
403 When running a compat (AArch32) userspace on an affected Cortex-A53
404 part, a load at EL0 from a virtual address that matches the bottom 32
405 bits of the virtual address used by a recent load at (AArch64) EL1
406 might return incorrect data.
407
408 The workaround is to write the contextidr_el1 register on exception
409 return to a 32-bit task.
410 Please note that this does not necessarily enable the workaround,
411 as it depends on the alternative framework, which will only patch
412 the kernel if an affected CPU is detected.
413
414 If unsure, say Y.
415
Andre Przywarac0a01b82014-11-14 15:54:12 +0000416endmenu
417
418
Jungseok Leee41ceed2014-05-12 10:40:38 +0100419choice
420 prompt "Page size"
421 default ARM64_4K_PAGES
422 help
423 Page size (translation granule) configuration.
424
425config ARM64_4K_PAGES
426 bool "4KB"
427 help
428 This feature enables 4KB pages support.
429
Catalin Marinas8c2c3df2012-04-20 14:45:54 +0100430config ARM64_64K_PAGES
Jungseok Leee41ceed2014-05-12 10:40:38 +0100431 bool "64KB"
Catalin Marinas8c2c3df2012-04-20 14:45:54 +0100432 help
433 This feature enables 64KB pages support (4KB by default)
434 allowing only two levels of page tables and faster TLB
435 look-up. AArch32 emulation is not available when this feature
436 is enabled.
437
Jungseok Leee41ceed2014-05-12 10:40:38 +0100438endchoice
439
440choice
441 prompt "Virtual address space size"
442 default ARM64_VA_BITS_39 if ARM64_4K_PAGES
443 default ARM64_VA_BITS_42 if ARM64_64K_PAGES
444 help
445 Allows choosing one of multiple possible virtual address
446 space sizes. The level of translation table is determined by
447 a combination of page size and virtual address space size.
448
449config ARM64_VA_BITS_39
450 bool "39-bit"
451 depends on ARM64_4K_PAGES
452
453config ARM64_VA_BITS_42
454 bool "42-bit"
455 depends on ARM64_64K_PAGES
456
Jungseok Leec79b9542014-05-12 18:40:51 +0900457config ARM64_VA_BITS_48
458 bool "48-bit"
Jungseok Leec79b9542014-05-12 18:40:51 +0900459
Jungseok Leee41ceed2014-05-12 10:40:38 +0100460endchoice
461
462config ARM64_VA_BITS
463 int
464 default 39 if ARM64_VA_BITS_39
465 default 42 if ARM64_VA_BITS_42
Jungseok Leec79b9542014-05-12 18:40:51 +0900466 default 48 if ARM64_VA_BITS_48
Jungseok Leee41ceed2014-05-12 10:40:38 +0100467
Will Deacona8720132013-10-11 14:52:19 +0100468config CPU_BIG_ENDIAN
469 bool "Build big-endian kernel"
470 help
471 Say Y if you plan on running a kernel in big-endian mode.
472
Catalin Marinas8c2c3df2012-04-20 14:45:54 +0100473config SMP
474 bool "Symmetric Multi-Processing"
Catalin Marinas8c2c3df2012-04-20 14:45:54 +0100475 help
476 This enables support for systems with more than one CPU. If
477 you say N here, the kernel will run on single and
478 multiprocessor machines, but will use only one CPU of a
479 multiprocessor machine. If you say Y here, the kernel will run
480 on many, but not all, single processor machines. On a single
481 processor machine, the kernel will run faster if you say N
482 here.
483
484 If you don't know what to do here, say N.
485
Mark Brownf6e763b2014-03-04 07:51:17 +0000486config SCHED_MC
487 bool "Multi-core scheduler support"
488 depends on SMP
489 help
490 Multi-core scheduler support improves the CPU scheduler's decision
491 making when dealing with multi-core CPU chips at a cost of slightly
492 increased overhead in some places. If unsure say N here.
493
494config SCHED_SMT
495 bool "SMT scheduler support"
496 depends on SMP
497 help
498 Improves the CPU scheduler's decision making when dealing with
499 MultiThreading at a cost of slightly increased overhead in some
500 places. If unsure say N here.
501
Catalin Marinas8c2c3df2012-04-20 14:45:54 +0100502config NR_CPUS
Ganapatrao Kulkarni62aa9652015-03-18 11:01:18 +0000503 int "Maximum number of CPUs (2-4096)"
504 range 2 4096
Catalin Marinas8c2c3df2012-04-20 14:45:54 +0100505 depends on SMP
Vinayak Kale15942852013-04-24 10:06:57 +0100506 # These have to remain sorted largest to smallest
Robert Richtere3672642014-09-08 12:44:48 +0100507 default "64"
Catalin Marinas8c2c3df2012-04-20 14:45:54 +0100508
Mark Rutland9327e2c2013-10-24 20:30:18 +0100509config HOTPLUG_CPU
510 bool "Support for hot-pluggable CPUs"
511 depends on SMP
512 help
513 Say Y here to experiment with turning CPUs off and on. CPUs
514 can be controlled through /sys/devices/system/cpu.
515
Catalin Marinas8c2c3df2012-04-20 14:45:54 +0100516source kernel/Kconfig.preempt
517
Mark Rutland137650aa2015-03-13 16:14:34 +0000518config UP_LATE_INIT
519 def_bool y
520 depends on !SMP
521
Catalin Marinas8c2c3df2012-04-20 14:45:54 +0100522config HZ
523 int
524 default 100
525
526config ARCH_HAS_HOLES_MEMORYMODEL
527 def_bool y if SPARSEMEM
528
529config ARCH_SPARSEMEM_ENABLE
530 def_bool y
531 select SPARSEMEM_VMEMMAP_ENABLE
532
533config ARCH_SPARSEMEM_DEFAULT
534 def_bool ARCH_SPARSEMEM_ENABLE
535
536config ARCH_SELECT_MEMORY_MODEL
537 def_bool ARCH_SPARSEMEM_ENABLE
538
539config HAVE_ARCH_PFN_VALID
540 def_bool ARCH_HAS_HOLES_MEMORYMODEL || !SPARSEMEM
541
542config HW_PERF_EVENTS
543 bool "Enable hardware performance counter support for perf events"
544 depends on PERF_EVENTS
545 default y
546 help
547 Enable hardware performance counter support for perf events. If
548 disabled, perf events will use software events only.
549
Steve Capper084bd292013-04-10 13:48:00 +0100550config SYS_SUPPORTS_HUGETLBFS
551 def_bool y
552
553config ARCH_WANT_GENERAL_HUGETLB
554 def_bool y
555
556config ARCH_WANT_HUGE_PMD_SHARE
557 def_bool y if !ARM64_64K_PAGES
558
Steve Capperaf074842013-04-19 16:23:57 +0100559config HAVE_ARCH_TRANSPARENT_HUGEPAGE
560 def_bool y
561
Catalin Marinasa41dc0e2014-04-03 17:48:54 +0100562config ARCH_HAS_CACHE_LINE_SIZE
563 def_bool y
564
Catalin Marinas8c2c3df2012-04-20 14:45:54 +0100565source "mm/Kconfig"
566
AKASHI Takahiroa1ae65b2014-11-28 05:26:39 +0000567config SECCOMP
568 bool "Enable seccomp to safely compute untrusted bytecode"
569 ---help---
570 This kernel feature is useful for number crunching applications
571 that may need to compute untrusted bytecode during their
572 execution. By using pipes or other transports made available to
573 the process as file descriptors supporting the read/write
574 syscalls, it's possible to isolate those applications in
575 their own address space using seccomp. Once seccomp is
576 enabled via prctl(PR_SET_SECCOMP), it cannot be disabled
577 and the task is only allowed to execute a few safe syscalls
578 defined by each seccomp mode.
579
Stefano Stabelliniaa42aa12013-06-03 17:05:43 +0000580config XEN_DOM0
581 def_bool y
582 depends on XEN
583
584config XEN
Julien Grallc2ba1f72014-09-17 14:07:06 -0700585 bool "Xen guest support on ARM64"
Stefano Stabelliniaa42aa12013-06-03 17:05:43 +0000586 depends on ARM64 && OF
Stefano Stabellini83862cc2013-10-10 13:40:44 +0000587 select SWIOTLB_XEN
Stefano Stabelliniaa42aa12013-06-03 17:05:43 +0000588 help
589 Say Y if you want to run Linux in a Virtual Machine on Xen on ARM64.
590
Steve Capperd03bb142013-04-25 15:19:21 +0100591config FORCE_MAX_ZONEORDER
592 int
593 default "14" if (ARM64_64K_PAGES && TRANSPARENT_HUGEPAGE)
594 default "11"
595
Will Deacon1b907f42014-11-20 16:51:10 +0000596menuconfig ARMV8_DEPRECATED
597 bool "Emulate deprecated/obsolete ARMv8 instructions"
598 depends on COMPAT
599 help
600 Legacy software support may require certain instructions
601 that have been deprecated or obsoleted in the architecture.
602
603 Enable this config to enable selective emulation of these
604 features.
605
606 If unsure, say Y
607
608if ARMV8_DEPRECATED
609
610config SWP_EMULATION
611 bool "Emulate SWP/SWPB instructions"
612 help
613 ARMv8 obsoletes the use of A32 SWP/SWPB instructions such that
614 they are always undefined. Say Y here to enable software
615 emulation of these instructions for userspace using LDXR/STXR.
616
617 In some older versions of glibc [<=2.8] SWP is used during futex
618 trylock() operations with the assumption that the code will not
619 be preempted. This invalid assumption may be more likely to fail
620 with SWP emulation enabled, leading to deadlock of the user
621 application.
622
623 NOTE: when accessing uncached shared regions, LDXR/STXR rely
624 on an external transaction monitoring block called a global
625 monitor to maintain update atomicity. If your system does not
626 implement a global monitor, this option can cause programs that
627 perform SWP operations to uncached memory to deadlock.
628
629 If unsure, say Y
630
631config CP15_BARRIER_EMULATION
632 bool "Emulate CP15 Barrier instructions"
633 help
634 The CP15 barrier instructions - CP15ISB, CP15DSB, and
635 CP15DMB - are deprecated in ARMv8 (and ARMv7). It is
636 strongly recommended to use the ISB, DSB, and DMB
637 instructions instead.
638
639 Say Y here to enable software emulation of these
640 instructions for AArch32 userspace code. When this option is
641 enabled, CP15 barrier usage is traced which can help
642 identify software that needs updating.
643
644 If unsure, say Y
645
Suzuki K. Poulose2d888f42015-01-21 12:43:11 +0000646config SETEND_EMULATION
647 bool "Emulate SETEND instruction"
648 help
649 The SETEND instruction alters the data-endianness of the
650 AArch32 EL0, and is deprecated in ARMv8.
651
652 Say Y here to enable software emulation of the instruction
653 for AArch32 userspace code.
654
655 Note: All the cpus on the system must have mixed endian support at EL0
656 for this feature to be enabled. If a new CPU - which doesn't support mixed
657 endian - is hotplugged in after this feature has been enabled, there could
658 be unexpected results in the applications.
659
660 If unsure, say Y
Will Deacon1b907f42014-11-20 16:51:10 +0000661endif
662
Catalin Marinas8c2c3df2012-04-20 14:45:54 +0100663endmenu
664
665menu "Boot options"
666
667config CMDLINE
668 string "Default kernel command string"
669 default ""
670 help
671 Provide a set of default command-line options at build time by
672 entering them here. As a minimum, you should specify the the
673 root device (e.g. root=/dev/nfs).
674
675config CMDLINE_FORCE
676 bool "Always use the default kernel command string"
677 help
678 Always use the default kernel command string, even if the boot
679 loader passes other arguments to the kernel.
680 This is useful if you cannot or don't want to change the
681 command-line options your boot loader passes to the kernel.
682
Ard Biesheuvelf4f75ad52014-07-02 14:54:43 +0200683config EFI_STUB
684 bool
685
Mark Salterf84d0272014-04-15 21:59:30 -0400686config EFI
687 bool "UEFI runtime support"
688 depends on OF && !CPU_BIG_ENDIAN
689 select LIBFDT
690 select UCS2_STRING
691 select EFI_PARAMS_FROM_FDT
Ard Biesheuvele15dd492014-07-04 19:41:53 +0200692 select EFI_RUNTIME_WRAPPERS
Ard Biesheuvelf4f75ad52014-07-02 14:54:43 +0200693 select EFI_STUB
694 select EFI_ARMSTUB
Mark Salterf84d0272014-04-15 21:59:30 -0400695 default y
696 help
697 This option provides support for runtime services provided
698 by UEFI firmware (such as non-volatile variables, realtime
Mark Salter3c7f2552014-04-15 22:47:52 -0400699 clock, and platform reset). A UEFI stub is also provided to
700 allow the kernel to be booted as an EFI application. This
701 is only useful on systems that have UEFI firmware.
Mark Salterf84d0272014-04-15 21:59:30 -0400702
Yi Lid1ae8c02014-10-04 23:46:43 +0800703config DMI
704 bool "Enable support for SMBIOS (DMI) tables"
705 depends on EFI
706 default y
707 help
708 This enables SMBIOS/DMI feature for systems.
709
710 This option is only useful on systems that have UEFI firmware.
711 However, even with this option, the resultant kernel should
712 continue to boot on existing non-UEFI platforms.
713
Catalin Marinas8c2c3df2012-04-20 14:45:54 +0100714endmenu
715
716menu "Userspace binary formats"
717
718source "fs/Kconfig.binfmt"
719
720config COMPAT
721 bool "Kernel support for 32-bit EL0"
Alexander Grafa8fcd8b2015-03-16 16:32:23 +0000722 depends on !ARM64_64K_PAGES || EXPERT
Catalin Marinas8c2c3df2012-04-20 14:45:54 +0100723 select COMPAT_BINFMT_ELF
Catalin Marinasaf1839e2012-10-08 16:28:08 -0700724 select HAVE_UID16
Al Viro84b9e9b2012-12-25 16:29:11 -0500725 select OLD_SIGSUSPEND3
Al Viro51682032012-12-25 19:31:29 -0500726 select COMPAT_OLD_SIGACTION
Catalin Marinas8c2c3df2012-04-20 14:45:54 +0100727 help
728 This option enables support for a 32-bit EL0 running under a 64-bit
729 kernel at EL1. AArch32-specific components such as system calls,
730 the user helper functions, VFP support and the ptrace interface are
731 handled appropriately by the kernel.
732
Alexander Grafa8fcd8b2015-03-16 16:32:23 +0000733 If you also enabled CONFIG_ARM64_64K_PAGES, please be aware that you
734 will only be able to execute AArch32 binaries that were compiled with
735 64k aligned segments.
736
Catalin Marinas8c2c3df2012-04-20 14:45:54 +0100737 If you want to execute 32-bit userspace applications, say Y.
738
739config SYSVIPC_COMPAT
740 def_bool y
741 depends on COMPAT && SYSVIPC
742
743endmenu
744
Lorenzo Pieralisi166936b2013-11-07 18:37:14 +0000745menu "Power management options"
746
747source "kernel/power/Kconfig"
748
749config ARCH_SUSPEND_POSSIBLE
750 def_bool y
751
Lorenzo Pieralisi166936b2013-11-07 18:37:14 +0000752endmenu
753
Lorenzo Pieralisi13072202013-07-17 14:54:21 +0100754menu "CPU Power Management"
755
756source "drivers/cpuidle/Kconfig"
757
Rob Herring52e7e812014-02-24 11:27:57 +0900758source "drivers/cpufreq/Kconfig"
759
760endmenu
761
Catalin Marinas8c2c3df2012-04-20 14:45:54 +0100762source "net/Kconfig"
763
764source "drivers/Kconfig"
765
Mark Salterf84d0272014-04-15 21:59:30 -0400766source "drivers/firmware/Kconfig"
767
Graeme Gregoryb6a02172015-03-24 14:02:53 +0000768source "drivers/acpi/Kconfig"
769
Catalin Marinas8c2c3df2012-04-20 14:45:54 +0100770source "fs/Kconfig"
771
Marc Zyngierc3eb5b12013-07-04 13:34:32 +0100772source "arch/arm64/kvm/Kconfig"
773
Catalin Marinas8c2c3df2012-04-20 14:45:54 +0100774source "arch/arm64/Kconfig.debug"
775
776source "security/Kconfig"
777
778source "crypto/Kconfig"
Ard Biesheuvel2c988332014-03-06 16:23:33 +0800779if CRYPTO
780source "arch/arm64/crypto/Kconfig"
781endif
Catalin Marinas8c2c3df2012-04-20 14:45:54 +0100782
783source "lib/Kconfig"