blob: fc016048cd5a325bff99da0ac4975e5abe662746 [file] [log] [blame]
Jesse Barnes79e53942008-11-07 14:24:08 -08001/*
2 * Copyright 2006 Dave Airlie <airlied@linux.ie>
3 * Copyright © 2006-2007 Intel Corporation
4 * Jesse Barnes <jesse.barnes@intel.com>
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice (including the next
14 * paragraph) shall be included in all copies or substantial portions of the
15 * Software.
16 *
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
22 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
23 * DEALINGS IN THE SOFTWARE.
24 *
25 * Authors:
26 * Eric Anholt <eric@anholt.net>
27 */
28#include <linux/i2c.h>
Tejun Heo5a0e3ad2010-03-24 17:04:11 +090029#include <linux/slab.h>
Jesse Barnes79e53942008-11-07 14:24:08 -080030#include <linux/delay.h>
31#include "drmP.h"
32#include "drm.h"
33#include "drm_crtc.h"
ling.ma@intel.com2b8d33f72009-07-29 11:31:18 +080034#include "drm_edid.h"
Chris Wilsonea5b2132010-08-04 13:50:23 +010035#include "intel_drv.h"
Jesse Barnes79e53942008-11-07 14:24:08 -080036#include "i915_drm.h"
37#include "i915_drv.h"
38#include "intel_sdvo_regs.h"
39
Zhenyu Wang14571b42010-03-30 14:06:33 +080040#define SDVO_TMDS_MASK (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_TMDS1)
41#define SDVO_RGB_MASK (SDVO_OUTPUT_RGB0 | SDVO_OUTPUT_RGB1)
42#define SDVO_LVDS_MASK (SDVO_OUTPUT_LVDS0 | SDVO_OUTPUT_LVDS1)
43#define SDVO_TV_MASK (SDVO_OUTPUT_CVBS0 | SDVO_OUTPUT_SVID0)
44
45#define SDVO_OUTPUT_MASK (SDVO_TMDS_MASK | SDVO_RGB_MASK | SDVO_LVDS_MASK |\
46 SDVO_TV_MASK)
47
48#define IS_TV(c) (c->output_flag & SDVO_TV_MASK)
49#define IS_LVDS(c) (c->output_flag & SDVO_LVDS_MASK)
Chris Wilson32aad862010-08-04 13:50:25 +010050#define IS_TV_OR_LVDS(c) (c->output_flag & (SDVO_TV_MASK | SDVO_LVDS_MASK))
Zhenyu Wang14571b42010-03-30 14:06:33 +080051
Jesse Barnes79e53942008-11-07 14:24:08 -080052
Chris Wilson2e88e402010-08-07 11:01:27 +010053static const char *tv_format_names[] = {
Zhao Yakuice6feab2009-08-24 13:50:26 +080054 "NTSC_M" , "NTSC_J" , "NTSC_443",
55 "PAL_B" , "PAL_D" , "PAL_G" ,
56 "PAL_H" , "PAL_I" , "PAL_M" ,
57 "PAL_N" , "PAL_NC" , "PAL_60" ,
58 "SECAM_B" , "SECAM_D" , "SECAM_G" ,
59 "SECAM_K" , "SECAM_K1", "SECAM_L" ,
60 "SECAM_60"
61};
62
63#define TV_FORMAT_NUM (sizeof(tv_format_names) / sizeof(*tv_format_names))
64
Chris Wilsonea5b2132010-08-04 13:50:23 +010065struct intel_sdvo {
66 struct intel_encoder base;
67
Chris Wilsonf899fc62010-07-20 15:44:45 -070068 struct i2c_adapter *i2c;
Keith Packardf9c10a92009-05-30 12:16:25 -070069 u8 slave_addr;
Jesse Barnese2f0ba92009-02-02 15:11:52 -080070
Chris Wilsone957d772010-09-24 12:52:03 +010071 struct i2c_adapter ddc;
72
Jesse Barnese2f0ba92009-02-02 15:11:52 -080073 /* Register for the SDVO device: SDVOB or SDVOC */
Eric Anholtc751ce42010-03-25 11:48:48 -070074 int sdvo_reg;
Jesse Barnes79e53942008-11-07 14:24:08 -080075
Jesse Barnese2f0ba92009-02-02 15:11:52 -080076 /* Active outputs controlled by this SDVO output */
77 uint16_t controlled_output;
Jesse Barnes79e53942008-11-07 14:24:08 -080078
Jesse Barnese2f0ba92009-02-02 15:11:52 -080079 /*
80 * Capabilities of the SDVO device returned by
81 * i830_sdvo_get_capabilities()
82 */
Jesse Barnes79e53942008-11-07 14:24:08 -080083 struct intel_sdvo_caps caps;
Jesse Barnese2f0ba92009-02-02 15:11:52 -080084
85 /* Pixel clock limitations reported by the SDVO device, in kHz */
Jesse Barnes79e53942008-11-07 14:24:08 -080086 int pixel_clock_min, pixel_clock_max;
87
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +080088 /*
89 * For multiple function SDVO device,
90 * this is for current attached outputs.
91 */
92 uint16_t attached_output;
93
Jesse Barnese2f0ba92009-02-02 15:11:52 -080094 /**
95 * This is set if we're going to treat the device as TV-out.
96 *
97 * While we have these nice friendly flags for output types that ought
98 * to decide this for us, the S-Video output on our HDMI+S-Video card
99 * shows up as RGB1 (VGA).
100 */
101 bool is_tv;
102
Zhao Yakuice6feab2009-08-24 13:50:26 +0800103 /* This is for current tv format name */
Chris Wilson40039752010-08-04 13:50:26 +0100104 int tv_format_index;
Zhao Yakuice6feab2009-08-24 13:50:26 +0800105
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800106 /**
107 * This is set if we treat the device as HDMI, instead of DVI.
108 */
109 bool is_hdmi;
Chris Wilsonda79de92010-11-22 11:12:46 +0000110 bool has_hdmi_monitor;
111 bool has_hdmi_audio;
ling.ma@intel.com12682a92009-06-30 11:35:35 +0800112
Ma Ling7086c872009-05-13 11:20:06 +0800113 /**
Chris Wilson6c9547f2010-08-25 10:05:17 +0100114 * This is set if we detect output of sdvo device as LVDS and
115 * have a valid fixed mode to use with the panel.
Ma Ling7086c872009-05-13 11:20:06 +0800116 */
117 bool is_lvds;
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800118
119 /**
ling.ma@intel.com12682a92009-06-30 11:35:35 +0800120 * This is sdvo fixed pannel mode pointer
121 */
122 struct drm_display_mode *sdvo_lvds_fixed_mode;
123
Eric Anholtc751ce42010-03-25 11:48:48 -0700124 /* DDC bus used by this SDVO encoder */
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800125 uint8_t ddc_bus;
126
Chris Wilson6c9547f2010-08-25 10:05:17 +0100127 /* Input timings for adjusted_mode */
128 struct intel_sdvo_dtd input_dtd;
Zhenyu Wang14571b42010-03-30 14:06:33 +0800129};
130
131struct intel_sdvo_connector {
Chris Wilson615fb932010-08-04 13:50:24 +0100132 struct intel_connector base;
133
Zhenyu Wang14571b42010-03-30 14:06:33 +0800134 /* Mark the type of connector */
135 uint16_t output_flag;
136
Chris Wilson7f36e7e2010-09-19 09:29:33 +0100137 int force_audio;
138
Zhenyu Wang14571b42010-03-30 14:06:33 +0800139 /* This contains all current supported TV format */
Chris Wilson40039752010-08-04 13:50:26 +0100140 u8 tv_format_supported[TV_FORMAT_NUM];
Zhenyu Wang14571b42010-03-30 14:06:33 +0800141 int format_supported_num;
Chris Wilsonc5521702010-08-04 13:50:28 +0100142 struct drm_property *tv_format;
Zhenyu Wang14571b42010-03-30 14:06:33 +0800143
Chris Wilson7f36e7e2010-09-19 09:29:33 +0100144 struct drm_property *force_audio_property;
145
Zhao Yakuib9219c52009-09-10 15:45:46 +0800146 /* add the property for the SDVO-TV */
Chris Wilsonc5521702010-08-04 13:50:28 +0100147 struct drm_property *left;
148 struct drm_property *right;
149 struct drm_property *top;
150 struct drm_property *bottom;
151 struct drm_property *hpos;
152 struct drm_property *vpos;
153 struct drm_property *contrast;
154 struct drm_property *saturation;
155 struct drm_property *hue;
156 struct drm_property *sharpness;
157 struct drm_property *flicker_filter;
158 struct drm_property *flicker_filter_adaptive;
159 struct drm_property *flicker_filter_2d;
160 struct drm_property *tv_chroma_filter;
161 struct drm_property *tv_luma_filter;
Chris Wilsone0442182010-08-04 13:50:29 +0100162 struct drm_property *dot_crawl;
Zhao Yakuib9219c52009-09-10 15:45:46 +0800163
164 /* add the property for the SDVO-TV/LVDS */
Chris Wilsonc5521702010-08-04 13:50:28 +0100165 struct drm_property *brightness;
Zhao Yakuib9219c52009-09-10 15:45:46 +0800166
167 /* Add variable to record current setting for the above property */
168 u32 left_margin, right_margin, top_margin, bottom_margin;
Chris Wilsonc5521702010-08-04 13:50:28 +0100169
Zhao Yakuib9219c52009-09-10 15:45:46 +0800170 /* this is to get the range of margin.*/
171 u32 max_hscan, max_vscan;
172 u32 max_hpos, cur_hpos;
173 u32 max_vpos, cur_vpos;
174 u32 cur_brightness, max_brightness;
175 u32 cur_contrast, max_contrast;
176 u32 cur_saturation, max_saturation;
177 u32 cur_hue, max_hue;
Chris Wilsonc5521702010-08-04 13:50:28 +0100178 u32 cur_sharpness, max_sharpness;
179 u32 cur_flicker_filter, max_flicker_filter;
180 u32 cur_flicker_filter_adaptive, max_flicker_filter_adaptive;
181 u32 cur_flicker_filter_2d, max_flicker_filter_2d;
182 u32 cur_tv_chroma_filter, max_tv_chroma_filter;
183 u32 cur_tv_luma_filter, max_tv_luma_filter;
Chris Wilsone0442182010-08-04 13:50:29 +0100184 u32 cur_dot_crawl, max_dot_crawl;
Jesse Barnes79e53942008-11-07 14:24:08 -0800185};
186
Chris Wilson890f3352010-09-14 16:46:59 +0100187static struct intel_sdvo *to_intel_sdvo(struct drm_encoder *encoder)
Chris Wilsonea5b2132010-08-04 13:50:23 +0100188{
Chris Wilson4ef69c72010-09-09 15:14:28 +0100189 return container_of(encoder, struct intel_sdvo, base.base);
Chris Wilsonea5b2132010-08-04 13:50:23 +0100190}
191
Chris Wilsondf0e9242010-09-09 16:20:55 +0100192static struct intel_sdvo *intel_attached_sdvo(struct drm_connector *connector)
193{
194 return container_of(intel_attached_encoder(connector),
195 struct intel_sdvo, base);
196}
197
Chris Wilson615fb932010-08-04 13:50:24 +0100198static struct intel_sdvo_connector *to_intel_sdvo_connector(struct drm_connector *connector)
199{
200 return container_of(to_intel_connector(connector), struct intel_sdvo_connector, base);
201}
202
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +0800203static bool
Chris Wilsonea5b2132010-08-04 13:50:23 +0100204intel_sdvo_output_setup(struct intel_sdvo *intel_sdvo, uint16_t flags);
Chris Wilson32aad862010-08-04 13:50:25 +0100205static bool
206intel_sdvo_tv_create_property(struct intel_sdvo *intel_sdvo,
207 struct intel_sdvo_connector *intel_sdvo_connector,
208 int type);
209static bool
210intel_sdvo_create_enhance_property(struct intel_sdvo *intel_sdvo,
211 struct intel_sdvo_connector *intel_sdvo_connector);
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +0800212
Jesse Barnes79e53942008-11-07 14:24:08 -0800213/**
214 * Writes the SDVOB or SDVOC with the given value, but always writes both
215 * SDVOB and SDVOC to work around apparent hardware issues (according to
216 * comments in the BIOS).
217 */
Chris Wilsonea5b2132010-08-04 13:50:23 +0100218static void intel_sdvo_write_sdvox(struct intel_sdvo *intel_sdvo, u32 val)
Jesse Barnes79e53942008-11-07 14:24:08 -0800219{
Chris Wilson4ef69c72010-09-09 15:14:28 +0100220 struct drm_device *dev = intel_sdvo->base.base.dev;
Jesse Barnes79e53942008-11-07 14:24:08 -0800221 struct drm_i915_private *dev_priv = dev->dev_private;
Jesse Barnes79e53942008-11-07 14:24:08 -0800222 u32 bval = val, cval = val;
223 int i;
224
Chris Wilsonea5b2132010-08-04 13:50:23 +0100225 if (intel_sdvo->sdvo_reg == PCH_SDVOB) {
226 I915_WRITE(intel_sdvo->sdvo_reg, val);
227 I915_READ(intel_sdvo->sdvo_reg);
Zhao Yakui461ed3c2010-03-30 15:11:33 +0800228 return;
229 }
230
Chris Wilsonea5b2132010-08-04 13:50:23 +0100231 if (intel_sdvo->sdvo_reg == SDVOB) {
Jesse Barnes79e53942008-11-07 14:24:08 -0800232 cval = I915_READ(SDVOC);
233 } else {
234 bval = I915_READ(SDVOB);
235 }
236 /*
237 * Write the registers twice for luck. Sometimes,
238 * writing them only once doesn't appear to 'stick'.
239 * The BIOS does this too. Yay, magic
240 */
241 for (i = 0; i < 2; i++)
242 {
243 I915_WRITE(SDVOB, bval);
244 I915_READ(SDVOB);
245 I915_WRITE(SDVOC, cval);
246 I915_READ(SDVOC);
247 }
248}
249
Chris Wilson32aad862010-08-04 13:50:25 +0100250static bool intel_sdvo_read_byte(struct intel_sdvo *intel_sdvo, u8 addr, u8 *ch)
Jesse Barnes79e53942008-11-07 14:24:08 -0800251{
Jesse Barnes79e53942008-11-07 14:24:08 -0800252 struct i2c_msg msgs[] = {
253 {
Chris Wilsone957d772010-09-24 12:52:03 +0100254 .addr = intel_sdvo->slave_addr,
Jesse Barnes79e53942008-11-07 14:24:08 -0800255 .flags = 0,
256 .len = 1,
Chris Wilsone957d772010-09-24 12:52:03 +0100257 .buf = &addr,
Jesse Barnes79e53942008-11-07 14:24:08 -0800258 },
259 {
Chris Wilsone957d772010-09-24 12:52:03 +0100260 .addr = intel_sdvo->slave_addr,
Jesse Barnes79e53942008-11-07 14:24:08 -0800261 .flags = I2C_M_RD,
262 .len = 1,
Chris Wilsone957d772010-09-24 12:52:03 +0100263 .buf = ch,
Jesse Barnes79e53942008-11-07 14:24:08 -0800264 }
265 };
Chris Wilson32aad862010-08-04 13:50:25 +0100266 int ret;
Jesse Barnes79e53942008-11-07 14:24:08 -0800267
Chris Wilsonf899fc62010-07-20 15:44:45 -0700268 if ((ret = i2c_transfer(intel_sdvo->i2c, msgs, 2)) == 2)
Jesse Barnes79e53942008-11-07 14:24:08 -0800269 return true;
Jesse Barnes79e53942008-11-07 14:24:08 -0800270
Zhao Yakui8a4c47f2009-07-20 13:48:04 +0800271 DRM_DEBUG_KMS("i2c transfer returned %d\n", ret);
Jesse Barnes79e53942008-11-07 14:24:08 -0800272 return false;
273}
274
Jesse Barnes79e53942008-11-07 14:24:08 -0800275#define SDVO_CMD_NAME_ENTRY(cmd) {cmd, #cmd}
276/** Mapping of command numbers to names, for debug output */
Tobias Klauser005568b2009-02-09 22:02:42 +0100277static const struct _sdvo_cmd_name {
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800278 u8 cmd;
Chris Wilson2e88e402010-08-07 11:01:27 +0100279 const char *name;
Jesse Barnes79e53942008-11-07 14:24:08 -0800280} sdvo_cmd_names[] = {
281 SDVO_CMD_NAME_ENTRY(SDVO_CMD_RESET),
282 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_DEVICE_CAPS),
283 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FIRMWARE_REV),
284 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TRAINED_INPUTS),
285 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ACTIVE_OUTPUTS),
286 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ACTIVE_OUTPUTS),
287 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_IN_OUT_MAP),
288 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_IN_OUT_MAP),
289 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ATTACHED_DISPLAYS),
290 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HOT_PLUG_SUPPORT),
291 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ACTIVE_HOT_PLUG),
292 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ACTIVE_HOT_PLUG),
293 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INTERRUPT_EVENT_SOURCE),
294 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TARGET_INPUT),
295 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TARGET_OUTPUT),
296 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_TIMINGS_PART1),
297 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_TIMINGS_PART2),
298 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART1),
299 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART2),
300 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART1),
301 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OUTPUT_TIMINGS_PART1),
302 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OUTPUT_TIMINGS_PART2),
303 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_TIMINGS_PART1),
304 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_TIMINGS_PART2),
305 SDVO_CMD_NAME_ENTRY(SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING),
306 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1),
307 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2),
308 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE),
309 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_PIXEL_CLOCK_RANGE),
310 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_CLOCK_RATE_MULTS),
311 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_CLOCK_RATE_MULT),
312 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CLOCK_RATE_MULT),
313 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_TV_FORMATS),
314 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_FORMAT),
315 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_FORMAT),
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800316 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_POWER_STATES),
317 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_POWER_STATE),
318 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ENCODER_POWER_STATE),
319 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_DISPLAY_POWER_STATE),
Jesse Barnes79e53942008-11-07 14:24:08 -0800320 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CONTROL_BUS_SWITCH),
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800321 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT),
322 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SCALED_HDTV_RESOLUTION_SUPPORT),
323 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS),
Chris Wilsonc5521702010-08-04 13:50:28 +0100324
Zhao Yakuib9219c52009-09-10 15:45:46 +0800325 /* Add the op code for SDVO enhancements */
Chris Wilsonc5521702010-08-04 13:50:28 +0100326 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_HPOS),
327 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HPOS),
328 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HPOS),
329 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_VPOS),
330 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_VPOS),
331 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_VPOS),
Zhao Yakuib9219c52009-09-10 15:45:46 +0800332 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_SATURATION),
333 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SATURATION),
334 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_SATURATION),
335 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_HUE),
336 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HUE),
337 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HUE),
338 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_CONTRAST),
339 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_CONTRAST),
340 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CONTRAST),
341 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_BRIGHTNESS),
342 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_BRIGHTNESS),
343 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_BRIGHTNESS),
344 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_OVERSCAN_H),
345 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OVERSCAN_H),
346 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OVERSCAN_H),
347 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_OVERSCAN_V),
348 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OVERSCAN_V),
349 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OVERSCAN_V),
Chris Wilsonc5521702010-08-04 13:50:28 +0100350 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER),
351 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER),
352 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER),
353 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER_ADAPTIVE),
354 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER_ADAPTIVE),
355 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER_ADAPTIVE),
356 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER_2D),
357 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER_2D),
358 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER_2D),
359 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_SHARPNESS),
360 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SHARPNESS),
361 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_SHARPNESS),
362 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_DOT_CRAWL),
363 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_DOT_CRAWL),
364 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_TV_CHROMA_FILTER),
365 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_CHROMA_FILTER),
366 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_CHROMA_FILTER),
367 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_TV_LUMA_FILTER),
368 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_LUMA_FILTER),
369 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_LUMA_FILTER),
370
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800371 /* HDMI op code */
372 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPP_ENCODE),
373 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ENCODE),
374 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ENCODE),
375 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_PIXEL_REPLI),
376 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PIXEL_REPLI),
377 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_COLORIMETRY_CAP),
378 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_COLORIMETRY),
379 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_COLORIMETRY),
380 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_AUDIO_ENCRYPT_PREFER),
381 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_AUDIO_STAT),
382 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_AUDIO_STAT),
383 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_INDEX),
384 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_INDEX),
385 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_INFO),
386 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_AV_SPLIT),
387 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_AV_SPLIT),
388 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_TXRATE),
389 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_TXRATE),
390 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_DATA),
391 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_DATA),
Jesse Barnes79e53942008-11-07 14:24:08 -0800392};
393
Zhao Yakui461ed3c2010-03-30 15:11:33 +0800394#define IS_SDVOB(reg) (reg == SDVOB || reg == PCH_SDVOB)
Chris Wilsonea5b2132010-08-04 13:50:23 +0100395#define SDVO_NAME(svdo) (IS_SDVOB((svdo)->sdvo_reg) ? "SDVOB" : "SDVOC")
Jesse Barnes79e53942008-11-07 14:24:08 -0800396
Chris Wilsonea5b2132010-08-04 13:50:23 +0100397static void intel_sdvo_debug_write(struct intel_sdvo *intel_sdvo, u8 cmd,
Chris Wilson32aad862010-08-04 13:50:25 +0100398 const void *args, int args_len)
Jesse Barnes79e53942008-11-07 14:24:08 -0800399{
Jesse Barnes79e53942008-11-07 14:24:08 -0800400 int i;
401
Zhao Yakui8a4c47f2009-07-20 13:48:04 +0800402 DRM_DEBUG_KMS("%s: W: %02X ",
Chris Wilsonea5b2132010-08-04 13:50:23 +0100403 SDVO_NAME(intel_sdvo), cmd);
Jesse Barnes79e53942008-11-07 14:24:08 -0800404 for (i = 0; i < args_len; i++)
yakui_zhao342dc382009-06-02 14:12:00 +0800405 DRM_LOG_KMS("%02X ", ((u8 *)args)[i]);
Jesse Barnes79e53942008-11-07 14:24:08 -0800406 for (; i < 8; i++)
yakui_zhao342dc382009-06-02 14:12:00 +0800407 DRM_LOG_KMS(" ");
Kulikov Vasiliy04ad3272010-06-28 15:54:56 +0400408 for (i = 0; i < ARRAY_SIZE(sdvo_cmd_names); i++) {
Jesse Barnes79e53942008-11-07 14:24:08 -0800409 if (cmd == sdvo_cmd_names[i].cmd) {
yakui_zhao342dc382009-06-02 14:12:00 +0800410 DRM_LOG_KMS("(%s)", sdvo_cmd_names[i].name);
Jesse Barnes79e53942008-11-07 14:24:08 -0800411 break;
412 }
413 }
Kulikov Vasiliy04ad3272010-06-28 15:54:56 +0400414 if (i == ARRAY_SIZE(sdvo_cmd_names))
yakui_zhao342dc382009-06-02 14:12:00 +0800415 DRM_LOG_KMS("(%02X)", cmd);
416 DRM_LOG_KMS("\n");
Jesse Barnes79e53942008-11-07 14:24:08 -0800417}
Jesse Barnes79e53942008-11-07 14:24:08 -0800418
Jesse Barnes79e53942008-11-07 14:24:08 -0800419static const char *cmd_status_names[] = {
420 "Power on",
421 "Success",
422 "Not supported",
423 "Invalid arg",
424 "Pending",
425 "Target not specified",
426 "Scaling not supported"
427};
428
Chris Wilsone957d772010-09-24 12:52:03 +0100429static bool intel_sdvo_write_cmd(struct intel_sdvo *intel_sdvo, u8 cmd,
430 const void *args, int args_len)
431{
432 u8 buf[args_len*2 + 2], status;
433 struct i2c_msg msgs[args_len + 3];
434 int i, ret;
435
436 intel_sdvo_debug_write(intel_sdvo, cmd, args, args_len);
437
438 for (i = 0; i < args_len; i++) {
439 msgs[i].addr = intel_sdvo->slave_addr;
440 msgs[i].flags = 0;
441 msgs[i].len = 2;
442 msgs[i].buf = buf + 2 *i;
443 buf[2*i + 0] = SDVO_I2C_ARG_0 - i;
444 buf[2*i + 1] = ((u8*)args)[i];
445 }
446 msgs[i].addr = intel_sdvo->slave_addr;
447 msgs[i].flags = 0;
448 msgs[i].len = 2;
449 msgs[i].buf = buf + 2*i;
450 buf[2*i + 0] = SDVO_I2C_OPCODE;
451 buf[2*i + 1] = cmd;
452
453 /* the following two are to read the response */
454 status = SDVO_I2C_CMD_STATUS;
455 msgs[i+1].addr = intel_sdvo->slave_addr;
456 msgs[i+1].flags = 0;
457 msgs[i+1].len = 1;
458 msgs[i+1].buf = &status;
459
460 msgs[i+2].addr = intel_sdvo->slave_addr;
461 msgs[i+2].flags = I2C_M_RD;
462 msgs[i+2].len = 1;
463 msgs[i+2].buf = &status;
464
465 ret = i2c_transfer(intel_sdvo->i2c, msgs, i+3);
466 if (ret < 0) {
467 DRM_DEBUG_KMS("I2c transfer returned %d\n", ret);
468 return false;
469 }
470 if (ret != i+3) {
471 /* failure in I2C transfer */
472 DRM_DEBUG_KMS("I2c transfer returned %d/%d\n", ret, i+3);
473 return false;
474 }
475
476 i = 3;
477 while (status == SDVO_CMD_STATUS_PENDING && i--) {
478 if (!intel_sdvo_read_byte(intel_sdvo,
479 SDVO_I2C_CMD_STATUS,
480 &status))
481 return false;
482 }
483 if (status != SDVO_CMD_STATUS_SUCCESS) {
484 DRM_DEBUG_KMS("command returns response %s [%d]\n",
485 status <= SDVO_CMD_STATUS_SCALING_NOT_SUPP ? cmd_status_names[status] : "???",
486 status);
487 return false;
488 }
489
490 return true;
491}
492
Chris Wilsonb5c616a2010-09-09 19:06:13 +0100493static bool intel_sdvo_read_response(struct intel_sdvo *intel_sdvo,
494 void *response, int response_len)
Jesse Barnes79e53942008-11-07 14:24:08 -0800495{
Chris Wilsonb5c616a2010-09-09 19:06:13 +0100496 u8 retry = 5;
497 u8 status;
Zhenyu Wang33b52962009-03-24 14:02:40 +0800498 int i;
Jesse Barnes79e53942008-11-07 14:24:08 -0800499
Chris Wilsonb5c616a2010-09-09 19:06:13 +0100500 /*
501 * The documentation states that all commands will be
502 * processed within 15µs, and that we need only poll
503 * the status byte a maximum of 3 times in order for the
504 * command to be complete.
505 *
506 * Check 5 times in case the hardware failed to read the docs.
507 */
508 do {
509 if (!intel_sdvo_read_byte(intel_sdvo,
510 SDVO_I2C_CMD_STATUS,
511 &status))
512 return false;
513 } while (status == SDVO_CMD_STATUS_PENDING && --retry);
514
Chris Wilsonea5b2132010-08-04 13:50:23 +0100515 DRM_DEBUG_KMS("%s: R: ", SDVO_NAME(intel_sdvo));
Jesse Barnes79e53942008-11-07 14:24:08 -0800516 if (status <= SDVO_CMD_STATUS_SCALING_NOT_SUPP)
yakui_zhao342dc382009-06-02 14:12:00 +0800517 DRM_LOG_KMS("(%s)", cmd_status_names[status]);
Jesse Barnes79e53942008-11-07 14:24:08 -0800518 else
yakui_zhao342dc382009-06-02 14:12:00 +0800519 DRM_LOG_KMS("(??? %d)", status);
Jesse Barnes79e53942008-11-07 14:24:08 -0800520
Chris Wilsonb5c616a2010-09-09 19:06:13 +0100521 if (status != SDVO_CMD_STATUS_SUCCESS)
522 goto log_fail;
Jesse Barnes79e53942008-11-07 14:24:08 -0800523
Chris Wilsonb5c616a2010-09-09 19:06:13 +0100524 /* Read the command response */
525 for (i = 0; i < response_len; i++) {
526 if (!intel_sdvo_read_byte(intel_sdvo,
527 SDVO_I2C_RETURN_0 + i,
528 &((u8 *)response)[i]))
529 goto log_fail;
Chris Wilsone957d772010-09-24 12:52:03 +0100530 DRM_LOG_KMS(" %02X", ((u8 *)response)[i]);
Jesse Barnes79e53942008-11-07 14:24:08 -0800531 }
Chris Wilsonb5c616a2010-09-09 19:06:13 +0100532 DRM_LOG_KMS("\n");
Chris Wilsonb5c616a2010-09-09 19:06:13 +0100533 return true;
534
535log_fail:
536 DRM_LOG_KMS("\n");
537 return false;
Jesse Barnes79e53942008-11-07 14:24:08 -0800538}
539
Hannes Ederb358d0a2008-12-18 21:18:47 +0100540static int intel_sdvo_get_pixel_multiplier(struct drm_display_mode *mode)
Jesse Barnes79e53942008-11-07 14:24:08 -0800541{
542 if (mode->clock >= 100000)
543 return 1;
544 else if (mode->clock >= 50000)
545 return 2;
546 else
547 return 4;
548}
549
Chris Wilsone957d772010-09-24 12:52:03 +0100550static bool intel_sdvo_set_control_bus_switch(struct intel_sdvo *intel_sdvo,
551 u8 ddc_bus)
Jesse Barnes79e53942008-11-07 14:24:08 -0800552{
Chris Wilsone957d772010-09-24 12:52:03 +0100553 return intel_sdvo_write_cmd(intel_sdvo,
554 SDVO_CMD_SET_CONTROL_BUS_SWITCH,
555 &ddc_bus, 1);
Jesse Barnes79e53942008-11-07 14:24:08 -0800556}
557
Chris Wilson32aad862010-08-04 13:50:25 +0100558static bool intel_sdvo_set_value(struct intel_sdvo *intel_sdvo, u8 cmd, const void *data, int len)
559{
Chris Wilsone957d772010-09-24 12:52:03 +0100560 return intel_sdvo_write_cmd(intel_sdvo, cmd, data, len);
Chris Wilson32aad862010-08-04 13:50:25 +0100561}
562
563static bool
564intel_sdvo_get_value(struct intel_sdvo *intel_sdvo, u8 cmd, void *value, int len)
565{
566 if (!intel_sdvo_write_cmd(intel_sdvo, cmd, NULL, 0))
567 return false;
568
569 return intel_sdvo_read_response(intel_sdvo, value, len);
570}
571
572static bool intel_sdvo_set_target_input(struct intel_sdvo *intel_sdvo)
Jesse Barnes79e53942008-11-07 14:24:08 -0800573{
574 struct intel_sdvo_set_target_input_args targets = {0};
Chris Wilson32aad862010-08-04 13:50:25 +0100575 return intel_sdvo_set_value(intel_sdvo,
576 SDVO_CMD_SET_TARGET_INPUT,
577 &targets, sizeof(targets));
Jesse Barnes79e53942008-11-07 14:24:08 -0800578}
579
580/**
581 * Return whether each input is trained.
582 *
583 * This function is making an assumption about the layout of the response,
584 * which should be checked against the docs.
585 */
Chris Wilsonea5b2132010-08-04 13:50:23 +0100586static bool intel_sdvo_get_trained_inputs(struct intel_sdvo *intel_sdvo, bool *input_1, bool *input_2)
Jesse Barnes79e53942008-11-07 14:24:08 -0800587{
588 struct intel_sdvo_get_trained_inputs_response response;
Jesse Barnes79e53942008-11-07 14:24:08 -0800589
Chris Wilson32aad862010-08-04 13:50:25 +0100590 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_TRAINED_INPUTS,
591 &response, sizeof(response)))
Jesse Barnes79e53942008-11-07 14:24:08 -0800592 return false;
593
594 *input_1 = response.input0_trained;
595 *input_2 = response.input1_trained;
596 return true;
597}
598
Chris Wilsonea5b2132010-08-04 13:50:23 +0100599static bool intel_sdvo_set_active_outputs(struct intel_sdvo *intel_sdvo,
Jesse Barnes79e53942008-11-07 14:24:08 -0800600 u16 outputs)
601{
Chris Wilson32aad862010-08-04 13:50:25 +0100602 return intel_sdvo_set_value(intel_sdvo,
603 SDVO_CMD_SET_ACTIVE_OUTPUTS,
604 &outputs, sizeof(outputs));
Jesse Barnes79e53942008-11-07 14:24:08 -0800605}
606
Chris Wilsonea5b2132010-08-04 13:50:23 +0100607static bool intel_sdvo_set_encoder_power_state(struct intel_sdvo *intel_sdvo,
Jesse Barnes79e53942008-11-07 14:24:08 -0800608 int mode)
609{
Chris Wilson32aad862010-08-04 13:50:25 +0100610 u8 state = SDVO_ENCODER_STATE_ON;
Jesse Barnes79e53942008-11-07 14:24:08 -0800611
612 switch (mode) {
613 case DRM_MODE_DPMS_ON:
614 state = SDVO_ENCODER_STATE_ON;
615 break;
616 case DRM_MODE_DPMS_STANDBY:
617 state = SDVO_ENCODER_STATE_STANDBY;
618 break;
619 case DRM_MODE_DPMS_SUSPEND:
620 state = SDVO_ENCODER_STATE_SUSPEND;
621 break;
622 case DRM_MODE_DPMS_OFF:
623 state = SDVO_ENCODER_STATE_OFF;
624 break;
625 }
626
Chris Wilson32aad862010-08-04 13:50:25 +0100627 return intel_sdvo_set_value(intel_sdvo,
628 SDVO_CMD_SET_ENCODER_POWER_STATE, &state, sizeof(state));
Jesse Barnes79e53942008-11-07 14:24:08 -0800629}
630
Chris Wilsonea5b2132010-08-04 13:50:23 +0100631static bool intel_sdvo_get_input_pixel_clock_range(struct intel_sdvo *intel_sdvo,
Jesse Barnes79e53942008-11-07 14:24:08 -0800632 int *clock_min,
633 int *clock_max)
634{
635 struct intel_sdvo_pixel_clock_range clocks;
Jesse Barnes79e53942008-11-07 14:24:08 -0800636
Chris Wilson32aad862010-08-04 13:50:25 +0100637 if (!intel_sdvo_get_value(intel_sdvo,
638 SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE,
639 &clocks, sizeof(clocks)))
Jesse Barnes79e53942008-11-07 14:24:08 -0800640 return false;
641
642 /* Convert the values from units of 10 kHz to kHz. */
643 *clock_min = clocks.min * 10;
644 *clock_max = clocks.max * 10;
Jesse Barnes79e53942008-11-07 14:24:08 -0800645 return true;
646}
647
Chris Wilsonea5b2132010-08-04 13:50:23 +0100648static bool intel_sdvo_set_target_output(struct intel_sdvo *intel_sdvo,
Jesse Barnes79e53942008-11-07 14:24:08 -0800649 u16 outputs)
650{
Chris Wilson32aad862010-08-04 13:50:25 +0100651 return intel_sdvo_set_value(intel_sdvo,
652 SDVO_CMD_SET_TARGET_OUTPUT,
653 &outputs, sizeof(outputs));
Jesse Barnes79e53942008-11-07 14:24:08 -0800654}
655
Chris Wilsonea5b2132010-08-04 13:50:23 +0100656static bool intel_sdvo_set_timing(struct intel_sdvo *intel_sdvo, u8 cmd,
Jesse Barnes79e53942008-11-07 14:24:08 -0800657 struct intel_sdvo_dtd *dtd)
658{
Chris Wilson32aad862010-08-04 13:50:25 +0100659 return intel_sdvo_set_value(intel_sdvo, cmd, &dtd->part1, sizeof(dtd->part1)) &&
660 intel_sdvo_set_value(intel_sdvo, cmd + 1, &dtd->part2, sizeof(dtd->part2));
Jesse Barnes79e53942008-11-07 14:24:08 -0800661}
662
Chris Wilsonea5b2132010-08-04 13:50:23 +0100663static bool intel_sdvo_set_input_timing(struct intel_sdvo *intel_sdvo,
Jesse Barnes79e53942008-11-07 14:24:08 -0800664 struct intel_sdvo_dtd *dtd)
665{
Chris Wilsonea5b2132010-08-04 13:50:23 +0100666 return intel_sdvo_set_timing(intel_sdvo,
Jesse Barnes79e53942008-11-07 14:24:08 -0800667 SDVO_CMD_SET_INPUT_TIMINGS_PART1, dtd);
668}
669
Chris Wilsonea5b2132010-08-04 13:50:23 +0100670static bool intel_sdvo_set_output_timing(struct intel_sdvo *intel_sdvo,
Jesse Barnes79e53942008-11-07 14:24:08 -0800671 struct intel_sdvo_dtd *dtd)
672{
Chris Wilsonea5b2132010-08-04 13:50:23 +0100673 return intel_sdvo_set_timing(intel_sdvo,
Jesse Barnes79e53942008-11-07 14:24:08 -0800674 SDVO_CMD_SET_OUTPUT_TIMINGS_PART1, dtd);
675}
676
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800677static bool
Chris Wilsonea5b2132010-08-04 13:50:23 +0100678intel_sdvo_create_preferred_input_timing(struct intel_sdvo *intel_sdvo,
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800679 uint16_t clock,
680 uint16_t width,
681 uint16_t height)
682{
683 struct intel_sdvo_preferred_input_timing_args args;
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800684
Zhenyu Wange642c6f2009-03-24 14:02:42 +0800685 memset(&args, 0, sizeof(args));
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800686 args.clock = clock;
687 args.width = width;
688 args.height = height;
Zhenyu Wange642c6f2009-03-24 14:02:42 +0800689 args.interlace = 0;
ling.ma@intel.com12682a92009-06-30 11:35:35 +0800690
Chris Wilsonea5b2132010-08-04 13:50:23 +0100691 if (intel_sdvo->is_lvds &&
692 (intel_sdvo->sdvo_lvds_fixed_mode->hdisplay != width ||
693 intel_sdvo->sdvo_lvds_fixed_mode->vdisplay != height))
ling.ma@intel.com12682a92009-06-30 11:35:35 +0800694 args.scaled = 1;
695
Chris Wilson32aad862010-08-04 13:50:25 +0100696 return intel_sdvo_set_value(intel_sdvo,
697 SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING,
698 &args, sizeof(args));
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800699}
700
Chris Wilsonea5b2132010-08-04 13:50:23 +0100701static bool intel_sdvo_get_preferred_input_timing(struct intel_sdvo *intel_sdvo,
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800702 struct intel_sdvo_dtd *dtd)
703{
Chris Wilson32aad862010-08-04 13:50:25 +0100704 return intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1,
705 &dtd->part1, sizeof(dtd->part1)) &&
706 intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2,
707 &dtd->part2, sizeof(dtd->part2));
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800708}
Jesse Barnes79e53942008-11-07 14:24:08 -0800709
Chris Wilsonea5b2132010-08-04 13:50:23 +0100710static bool intel_sdvo_set_clock_rate_mult(struct intel_sdvo *intel_sdvo, u8 val)
Jesse Barnes79e53942008-11-07 14:24:08 -0800711{
Chris Wilson32aad862010-08-04 13:50:25 +0100712 return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_CLOCK_RATE_MULT, &val, 1);
Jesse Barnes79e53942008-11-07 14:24:08 -0800713}
714
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800715static void intel_sdvo_get_dtd_from_mode(struct intel_sdvo_dtd *dtd,
Chris Wilson32aad862010-08-04 13:50:25 +0100716 const struct drm_display_mode *mode)
Jesse Barnes79e53942008-11-07 14:24:08 -0800717{
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800718 uint16_t width, height;
719 uint16_t h_blank_len, h_sync_len, v_blank_len, v_sync_len;
720 uint16_t h_sync_offset, v_sync_offset;
Jesse Barnes79e53942008-11-07 14:24:08 -0800721
722 width = mode->crtc_hdisplay;
723 height = mode->crtc_vdisplay;
724
725 /* do some mode translations */
726 h_blank_len = mode->crtc_hblank_end - mode->crtc_hblank_start;
727 h_sync_len = mode->crtc_hsync_end - mode->crtc_hsync_start;
728
729 v_blank_len = mode->crtc_vblank_end - mode->crtc_vblank_start;
730 v_sync_len = mode->crtc_vsync_end - mode->crtc_vsync_start;
731
732 h_sync_offset = mode->crtc_hsync_start - mode->crtc_hblank_start;
733 v_sync_offset = mode->crtc_vsync_start - mode->crtc_vblank_start;
734
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800735 dtd->part1.clock = mode->clock / 10;
736 dtd->part1.h_active = width & 0xff;
737 dtd->part1.h_blank = h_blank_len & 0xff;
738 dtd->part1.h_high = (((width >> 8) & 0xf) << 4) |
Jesse Barnes79e53942008-11-07 14:24:08 -0800739 ((h_blank_len >> 8) & 0xf);
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800740 dtd->part1.v_active = height & 0xff;
741 dtd->part1.v_blank = v_blank_len & 0xff;
742 dtd->part1.v_high = (((height >> 8) & 0xf) << 4) |
Jesse Barnes79e53942008-11-07 14:24:08 -0800743 ((v_blank_len >> 8) & 0xf);
744
Zhenyu Wang171a9e92009-03-24 14:02:41 +0800745 dtd->part2.h_sync_off = h_sync_offset & 0xff;
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800746 dtd->part2.h_sync_width = h_sync_len & 0xff;
747 dtd->part2.v_sync_off_width = (v_sync_offset & 0xf) << 4 |
Jesse Barnes79e53942008-11-07 14:24:08 -0800748 (v_sync_len & 0xf);
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800749 dtd->part2.sync_off_width_high = ((h_sync_offset & 0x300) >> 2) |
Jesse Barnes79e53942008-11-07 14:24:08 -0800750 ((h_sync_len & 0x300) >> 4) | ((v_sync_offset & 0x30) >> 2) |
751 ((v_sync_len & 0x30) >> 4);
752
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800753 dtd->part2.dtd_flags = 0x18;
Jesse Barnes79e53942008-11-07 14:24:08 -0800754 if (mode->flags & DRM_MODE_FLAG_PHSYNC)
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800755 dtd->part2.dtd_flags |= 0x2;
Jesse Barnes79e53942008-11-07 14:24:08 -0800756 if (mode->flags & DRM_MODE_FLAG_PVSYNC)
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800757 dtd->part2.dtd_flags |= 0x4;
Jesse Barnes79e53942008-11-07 14:24:08 -0800758
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800759 dtd->part2.sdvo_flags = 0;
760 dtd->part2.v_sync_off_high = v_sync_offset & 0xc0;
761 dtd->part2.reserved = 0;
762}
Jesse Barnes79e53942008-11-07 14:24:08 -0800763
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800764static void intel_sdvo_get_mode_from_dtd(struct drm_display_mode * mode,
Chris Wilson32aad862010-08-04 13:50:25 +0100765 const struct intel_sdvo_dtd *dtd)
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800766{
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800767 mode->hdisplay = dtd->part1.h_active;
768 mode->hdisplay += ((dtd->part1.h_high >> 4) & 0x0f) << 8;
769 mode->hsync_start = mode->hdisplay + dtd->part2.h_sync_off;
Zhenyu Wang171a9e92009-03-24 14:02:41 +0800770 mode->hsync_start += (dtd->part2.sync_off_width_high & 0xc0) << 2;
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800771 mode->hsync_end = mode->hsync_start + dtd->part2.h_sync_width;
772 mode->hsync_end += (dtd->part2.sync_off_width_high & 0x30) << 4;
773 mode->htotal = mode->hdisplay + dtd->part1.h_blank;
774 mode->htotal += (dtd->part1.h_high & 0xf) << 8;
775
776 mode->vdisplay = dtd->part1.v_active;
777 mode->vdisplay += ((dtd->part1.v_high >> 4) & 0x0f) << 8;
778 mode->vsync_start = mode->vdisplay;
779 mode->vsync_start += (dtd->part2.v_sync_off_width >> 4) & 0xf;
Zhenyu Wang171a9e92009-03-24 14:02:41 +0800780 mode->vsync_start += (dtd->part2.sync_off_width_high & 0x0c) << 2;
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800781 mode->vsync_start += dtd->part2.v_sync_off_high & 0xc0;
782 mode->vsync_end = mode->vsync_start +
783 (dtd->part2.v_sync_off_width & 0xf);
784 mode->vsync_end += (dtd->part2.sync_off_width_high & 0x3) << 4;
785 mode->vtotal = mode->vdisplay + dtd->part1.v_blank;
786 mode->vtotal += (dtd->part1.v_high & 0xf) << 8;
787
788 mode->clock = dtd->part1.clock * 10;
789
Zhenyu Wang171a9e92009-03-24 14:02:41 +0800790 mode->flags &= ~(DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC);
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800791 if (dtd->part2.dtd_flags & 0x2)
792 mode->flags |= DRM_MODE_FLAG_PHSYNC;
793 if (dtd->part2.dtd_flags & 0x4)
794 mode->flags |= DRM_MODE_FLAG_PVSYNC;
795}
796
Chris Wilsone27d8532010-10-22 09:15:22 +0100797static bool intel_sdvo_check_supp_encode(struct intel_sdvo *intel_sdvo)
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800798{
Chris Wilsone27d8532010-10-22 09:15:22 +0100799 struct intel_sdvo_encode encode;
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800800
Chris Wilsone27d8532010-10-22 09:15:22 +0100801 return intel_sdvo_get_value(intel_sdvo,
802 SDVO_CMD_GET_SUPP_ENCODE,
803 &encode, sizeof(encode));
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800804}
805
Chris Wilsonea5b2132010-08-04 13:50:23 +0100806static bool intel_sdvo_set_encode(struct intel_sdvo *intel_sdvo,
Eric Anholtc751ce42010-03-25 11:48:48 -0700807 uint8_t mode)
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800808{
Chris Wilson32aad862010-08-04 13:50:25 +0100809 return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_ENCODE, &mode, 1);
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800810}
811
Chris Wilsonea5b2132010-08-04 13:50:23 +0100812static bool intel_sdvo_set_colorimetry(struct intel_sdvo *intel_sdvo,
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800813 uint8_t mode)
814{
Chris Wilson32aad862010-08-04 13:50:25 +0100815 return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_COLORIMETRY, &mode, 1);
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800816}
817
818#if 0
Chris Wilsonea5b2132010-08-04 13:50:23 +0100819static void intel_sdvo_dump_hdmi_buf(struct intel_sdvo *intel_sdvo)
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800820{
821 int i, j;
822 uint8_t set_buf_index[2];
823 uint8_t av_split;
824 uint8_t buf_size;
825 uint8_t buf[48];
826 uint8_t *pos;
827
Chris Wilson32aad862010-08-04 13:50:25 +0100828 intel_sdvo_get_value(encoder, SDVO_CMD_GET_HBUF_AV_SPLIT, &av_split, 1);
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800829
830 for (i = 0; i <= av_split; i++) {
831 set_buf_index[0] = i; set_buf_index[1] = 0;
Eric Anholtc751ce42010-03-25 11:48:48 -0700832 intel_sdvo_write_cmd(encoder, SDVO_CMD_SET_HBUF_INDEX,
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800833 set_buf_index, 2);
Eric Anholtc751ce42010-03-25 11:48:48 -0700834 intel_sdvo_write_cmd(encoder, SDVO_CMD_GET_HBUF_INFO, NULL, 0);
835 intel_sdvo_read_response(encoder, &buf_size, 1);
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800836
837 pos = buf;
838 for (j = 0; j <= buf_size; j += 8) {
Eric Anholtc751ce42010-03-25 11:48:48 -0700839 intel_sdvo_write_cmd(encoder, SDVO_CMD_GET_HBUF_DATA,
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800840 NULL, 0);
Eric Anholtc751ce42010-03-25 11:48:48 -0700841 intel_sdvo_read_response(encoder, pos, 8);
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800842 pos += 8;
843 }
844 }
845}
846#endif
847
David Härdeman3c17fe42010-09-24 21:44:32 +0200848static bool intel_sdvo_set_avi_infoframe(struct intel_sdvo *intel_sdvo)
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800849{
850 struct dip_infoframe avi_if = {
851 .type = DIP_TYPE_AVI,
David Härdeman3c17fe42010-09-24 21:44:32 +0200852 .ver = DIP_VERSION_AVI,
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800853 .len = DIP_LEN_AVI,
854 };
David Härdeman3c17fe42010-09-24 21:44:32 +0200855 uint8_t tx_rate = SDVO_HBUF_TX_VSYNC;
856 uint8_t set_buf_index[2] = { 1, 0 };
857 uint64_t *data = (uint64_t *)&avi_if;
858 unsigned i;
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800859
David Härdeman3c17fe42010-09-24 21:44:32 +0200860 intel_dip_infoframe_csum(&avi_if);
861
862 if (!intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_SET_HBUF_INDEX,
863 set_buf_index, 2))
864 return false;
865
866 for (i = 0; i < sizeof(avi_if); i += 8) {
867 if (!intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_SET_HBUF_DATA,
868 data, 8))
869 return false;
870 data++;
871 }
872
873 return intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_SET_HBUF_TXRATE,
874 &tx_rate, 1);
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800875}
876
Chris Wilson32aad862010-08-04 13:50:25 +0100877static bool intel_sdvo_set_tv_format(struct intel_sdvo *intel_sdvo)
Zhenyu Wang7026d4a2009-03-24 14:02:43 +0800878{
Zhao Yakuice6feab2009-08-24 13:50:26 +0800879 struct intel_sdvo_tv_format format;
Chris Wilson40039752010-08-04 13:50:26 +0100880 uint32_t format_map;
Zhao Yakuice6feab2009-08-24 13:50:26 +0800881
Chris Wilson40039752010-08-04 13:50:26 +0100882 format_map = 1 << intel_sdvo->tv_format_index;
Zhao Yakuice6feab2009-08-24 13:50:26 +0800883 memset(&format, 0, sizeof(format));
Chris Wilson32aad862010-08-04 13:50:25 +0100884 memcpy(&format, &format_map, min(sizeof(format), sizeof(format_map)));
Zhao Yakuice6feab2009-08-24 13:50:26 +0800885
Chris Wilson32aad862010-08-04 13:50:25 +0100886 BUILD_BUG_ON(sizeof(format) != 6);
887 return intel_sdvo_set_value(intel_sdvo,
888 SDVO_CMD_SET_TV_FORMAT,
889 &format, sizeof(format));
890}
Zhao Yakuice6feab2009-08-24 13:50:26 +0800891
Chris Wilson32aad862010-08-04 13:50:25 +0100892static bool
893intel_sdvo_set_output_timings_from_mode(struct intel_sdvo *intel_sdvo,
894 struct drm_display_mode *mode)
895{
896 struct intel_sdvo_dtd output_dtd;
897
898 if (!intel_sdvo_set_target_output(intel_sdvo,
899 intel_sdvo->attached_output))
900 return false;
901
902 intel_sdvo_get_dtd_from_mode(&output_dtd, mode);
903 if (!intel_sdvo_set_output_timing(intel_sdvo, &output_dtd))
904 return false;
905
906 return true;
907}
908
909static bool
910intel_sdvo_set_input_timings_for_mode(struct intel_sdvo *intel_sdvo,
911 struct drm_display_mode *mode,
912 struct drm_display_mode *adjusted_mode)
913{
Chris Wilson32aad862010-08-04 13:50:25 +0100914 /* Reset the input timing to the screen. Assume always input 0. */
915 if (!intel_sdvo_set_target_input(intel_sdvo))
916 return false;
917
918 if (!intel_sdvo_create_preferred_input_timing(intel_sdvo,
919 mode->clock / 10,
920 mode->hdisplay,
921 mode->vdisplay))
922 return false;
923
924 if (!intel_sdvo_get_preferred_input_timing(intel_sdvo,
Chris Wilson6c9547f2010-08-25 10:05:17 +0100925 &intel_sdvo->input_dtd))
Chris Wilson32aad862010-08-04 13:50:25 +0100926 return false;
927
Chris Wilson6c9547f2010-08-25 10:05:17 +0100928 intel_sdvo_get_mode_from_dtd(adjusted_mode, &intel_sdvo->input_dtd);
Chris Wilson32aad862010-08-04 13:50:25 +0100929
930 drm_mode_set_crtcinfo(adjusted_mode, 0);
Chris Wilson32aad862010-08-04 13:50:25 +0100931 return true;
Zhenyu Wang7026d4a2009-03-24 14:02:43 +0800932}
933
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800934static bool intel_sdvo_mode_fixup(struct drm_encoder *encoder,
935 struct drm_display_mode *mode,
936 struct drm_display_mode *adjusted_mode)
937{
Chris Wilson890f3352010-09-14 16:46:59 +0100938 struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder);
Chris Wilson6c9547f2010-08-25 10:05:17 +0100939 int multiplier;
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800940
Chris Wilson32aad862010-08-04 13:50:25 +0100941 /* We need to construct preferred input timings based on our
942 * output timings. To do that, we have to set the output
943 * timings, even though this isn't really the right place in
944 * the sequence to do it. Oh well.
945 */
Chris Wilsonea5b2132010-08-04 13:50:23 +0100946 if (intel_sdvo->is_tv) {
Chris Wilson32aad862010-08-04 13:50:25 +0100947 if (!intel_sdvo_set_output_timings_from_mode(intel_sdvo, mode))
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800948 return false;
Chris Wilson32aad862010-08-04 13:50:25 +0100949
Pavel Roskinc74696b2010-09-02 14:46:34 -0400950 (void) intel_sdvo_set_input_timings_for_mode(intel_sdvo,
951 mode,
952 adjusted_mode);
Chris Wilsonea5b2132010-08-04 13:50:23 +0100953 } else if (intel_sdvo->is_lvds) {
Chris Wilson32aad862010-08-04 13:50:25 +0100954 if (!intel_sdvo_set_output_timings_from_mode(intel_sdvo,
Chris Wilson6c9547f2010-08-25 10:05:17 +0100955 intel_sdvo->sdvo_lvds_fixed_mode))
ling.ma@intel.com12682a92009-06-30 11:35:35 +0800956 return false;
ling.ma@intel.com12682a92009-06-30 11:35:35 +0800957
Pavel Roskinc74696b2010-09-02 14:46:34 -0400958 (void) intel_sdvo_set_input_timings_for_mode(intel_sdvo,
959 mode,
960 adjusted_mode);
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800961 }
Chris Wilson32aad862010-08-04 13:50:25 +0100962
963 /* Make the CRTC code factor in the SDVO pixel multiplier. The
Chris Wilson6c9547f2010-08-25 10:05:17 +0100964 * SDVO device will factor out the multiplier during mode_set.
Chris Wilson32aad862010-08-04 13:50:25 +0100965 */
Chris Wilson6c9547f2010-08-25 10:05:17 +0100966 multiplier = intel_sdvo_get_pixel_multiplier(adjusted_mode);
967 intel_mode_set_pixel_multiplier(adjusted_mode, multiplier);
Chris Wilson32aad862010-08-04 13:50:25 +0100968
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800969 return true;
970}
971
972static void intel_sdvo_mode_set(struct drm_encoder *encoder,
973 struct drm_display_mode *mode,
974 struct drm_display_mode *adjusted_mode)
975{
976 struct drm_device *dev = encoder->dev;
977 struct drm_i915_private *dev_priv = dev->dev_private;
978 struct drm_crtc *crtc = encoder->crtc;
979 struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
Chris Wilson890f3352010-09-14 16:46:59 +0100980 struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder);
Chris Wilson6c9547f2010-08-25 10:05:17 +0100981 u32 sdvox;
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800982 struct intel_sdvo_in_out_map in_out;
983 struct intel_sdvo_dtd input_dtd;
Chris Wilson6c9547f2010-08-25 10:05:17 +0100984 int pixel_multiplier = intel_mode_get_pixel_multiplier(adjusted_mode);
985 int rate;
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800986
987 if (!mode)
988 return;
989
990 /* First, set the input mapping for the first input to our controlled
991 * output. This is only correct if we're a single-input device, in
992 * which case the first input is the output from the appropriate SDVO
993 * channel on the motherboard. In a two-input device, the first input
994 * will be SDVOB and the second SDVOC.
995 */
Chris Wilsonea5b2132010-08-04 13:50:23 +0100996 in_out.in0 = intel_sdvo->attached_output;
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800997 in_out.in1 = 0;
998
Pavel Roskinc74696b2010-09-02 14:46:34 -0400999 intel_sdvo_set_value(intel_sdvo,
1000 SDVO_CMD_SET_IN_OUT_MAP,
1001 &in_out, sizeof(in_out));
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001002
Chris Wilson6c9547f2010-08-25 10:05:17 +01001003 /* Set the output timings to the screen */
1004 if (!intel_sdvo_set_target_output(intel_sdvo,
1005 intel_sdvo->attached_output))
1006 return;
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001007
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001008 /* We have tried to get input timing in mode_fixup, and filled into
Chris Wilson6c9547f2010-08-25 10:05:17 +01001009 * adjusted_mode.
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001010 */
Chris Wilson6c9547f2010-08-25 10:05:17 +01001011 if (intel_sdvo->is_tv || intel_sdvo->is_lvds) {
1012 input_dtd = intel_sdvo->input_dtd;
1013 } else {
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001014 /* Set the output timing to the screen */
Chris Wilson32aad862010-08-04 13:50:25 +01001015 if (!intel_sdvo_set_target_output(intel_sdvo,
1016 intel_sdvo->attached_output))
1017 return;
1018
Chris Wilson6c9547f2010-08-25 10:05:17 +01001019 intel_sdvo_get_dtd_from_mode(&input_dtd, adjusted_mode);
Pavel Roskinc74696b2010-09-02 14:46:34 -04001020 (void) intel_sdvo_set_output_timing(intel_sdvo, &input_dtd);
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001021 }
Jesse Barnes79e53942008-11-07 14:24:08 -08001022
1023 /* Set the input timing to the screen. Assume always input 0. */
Chris Wilson32aad862010-08-04 13:50:25 +01001024 if (!intel_sdvo_set_target_input(intel_sdvo))
1025 return;
Jesse Barnes79e53942008-11-07 14:24:08 -08001026
Chris Wilson97aaf912011-01-04 20:10:52 +00001027 if (intel_sdvo->has_hdmi_monitor) {
1028 intel_sdvo_set_encode(intel_sdvo, SDVO_ENCODE_HDMI);
1029 intel_sdvo_set_colorimetry(intel_sdvo,
1030 SDVO_COLORIMETRY_RGB256);
1031 intel_sdvo_set_avi_infoframe(intel_sdvo);
1032 } else
1033 intel_sdvo_set_encode(intel_sdvo, SDVO_ENCODE_DVI);
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001034
Chris Wilson6c9547f2010-08-25 10:05:17 +01001035 if (intel_sdvo->is_tv &&
1036 !intel_sdvo_set_tv_format(intel_sdvo))
1037 return;
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001038
Pavel Roskinc74696b2010-09-02 14:46:34 -04001039 (void) intel_sdvo_set_input_timing(intel_sdvo, &input_dtd);
Jesse Barnes79e53942008-11-07 14:24:08 -08001040
Chris Wilson6c9547f2010-08-25 10:05:17 +01001041 switch (pixel_multiplier) {
1042 default:
Chris Wilson32aad862010-08-04 13:50:25 +01001043 case 1: rate = SDVO_CLOCK_RATE_MULT_1X; break;
1044 case 2: rate = SDVO_CLOCK_RATE_MULT_2X; break;
1045 case 4: rate = SDVO_CLOCK_RATE_MULT_4X; break;
Jesse Barnes79e53942008-11-07 14:24:08 -08001046 }
Chris Wilson32aad862010-08-04 13:50:25 +01001047 if (!intel_sdvo_set_clock_rate_mult(intel_sdvo, rate))
1048 return;
Jesse Barnes79e53942008-11-07 14:24:08 -08001049
1050 /* Set the SDVO control regs. */
Chris Wilsona6c45cf2010-09-17 00:32:17 +01001051 if (INTEL_INFO(dev)->gen >= 4) {
Chris Wilson6714afb2010-12-17 04:10:51 +00001052 sdvox = 0;
1053 if (INTEL_INFO(dev)->gen < 5)
1054 sdvox |= SDVO_BORDER_ENABLE;
Adam Jackson81a14b42010-07-16 14:46:32 -04001055 if (adjusted_mode->flags & DRM_MODE_FLAG_PVSYNC)
1056 sdvox |= SDVO_VSYNC_ACTIVE_HIGH;
1057 if (adjusted_mode->flags & DRM_MODE_FLAG_PHSYNC)
1058 sdvox |= SDVO_HSYNC_ACTIVE_HIGH;
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001059 } else {
Chris Wilson6c9547f2010-08-25 10:05:17 +01001060 sdvox = I915_READ(intel_sdvo->sdvo_reg);
Chris Wilsonea5b2132010-08-04 13:50:23 +01001061 switch (intel_sdvo->sdvo_reg) {
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001062 case SDVOB:
1063 sdvox &= SDVOB_PRESERVE_MASK;
1064 break;
1065 case SDVOC:
1066 sdvox &= SDVOC_PRESERVE_MASK;
1067 break;
1068 }
1069 sdvox |= (9 << 19) | SDVO_BORDER_ENABLE;
1070 }
Jesse Barnes79e53942008-11-07 14:24:08 -08001071 if (intel_crtc->pipe == 1)
1072 sdvox |= SDVO_PIPE_B_SELECT;
Chris Wilsonda79de92010-11-22 11:12:46 +00001073 if (intel_sdvo->has_hdmi_audio)
Chris Wilson6c9547f2010-08-25 10:05:17 +01001074 sdvox |= SDVO_AUDIO_ENABLE;
Jesse Barnes79e53942008-11-07 14:24:08 -08001075
Chris Wilsona6c45cf2010-09-17 00:32:17 +01001076 if (INTEL_INFO(dev)->gen >= 4) {
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001077 /* done in crtc_mode_set as the dpll_md reg must be written early */
1078 } else if (IS_I945G(dev) || IS_I945GM(dev) || IS_G33(dev)) {
1079 /* done in crtc_mode_set as it lives inside the dpll register */
Jesse Barnes79e53942008-11-07 14:24:08 -08001080 } else {
Chris Wilson6c9547f2010-08-25 10:05:17 +01001081 sdvox |= (pixel_multiplier - 1) << SDVO_PORT_MULTIPLY_SHIFT;
Jesse Barnes79e53942008-11-07 14:24:08 -08001082 }
1083
Chris Wilson6714afb2010-12-17 04:10:51 +00001084 if (input_dtd.part2.sdvo_flags & SDVO_NEED_TO_STALL &&
1085 INTEL_INFO(dev)->gen < 5)
ling.ma@intel.com12682a92009-06-30 11:35:35 +08001086 sdvox |= SDVO_STALL_SELECT;
Chris Wilsonea5b2132010-08-04 13:50:23 +01001087 intel_sdvo_write_sdvox(intel_sdvo, sdvox);
Jesse Barnes79e53942008-11-07 14:24:08 -08001088}
1089
1090static void intel_sdvo_dpms(struct drm_encoder *encoder, int mode)
1091{
1092 struct drm_device *dev = encoder->dev;
1093 struct drm_i915_private *dev_priv = dev->dev_private;
Chris Wilson890f3352010-09-14 16:46:59 +01001094 struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder);
Jesse Barnes9d0498a2010-08-18 13:20:54 -07001095 struct intel_crtc *intel_crtc = to_intel_crtc(encoder->crtc);
Jesse Barnes79e53942008-11-07 14:24:08 -08001096 u32 temp;
1097
1098 if (mode != DRM_MODE_DPMS_ON) {
Chris Wilsonea5b2132010-08-04 13:50:23 +01001099 intel_sdvo_set_active_outputs(intel_sdvo, 0);
Jesse Barnes79e53942008-11-07 14:24:08 -08001100 if (0)
Chris Wilsonea5b2132010-08-04 13:50:23 +01001101 intel_sdvo_set_encoder_power_state(intel_sdvo, mode);
Jesse Barnes79e53942008-11-07 14:24:08 -08001102
1103 if (mode == DRM_MODE_DPMS_OFF) {
Chris Wilsonea5b2132010-08-04 13:50:23 +01001104 temp = I915_READ(intel_sdvo->sdvo_reg);
Jesse Barnes79e53942008-11-07 14:24:08 -08001105 if ((temp & SDVO_ENABLE) != 0) {
Chris Wilsonea5b2132010-08-04 13:50:23 +01001106 intel_sdvo_write_sdvox(intel_sdvo, temp & ~SDVO_ENABLE);
Jesse Barnes79e53942008-11-07 14:24:08 -08001107 }
1108 }
1109 } else {
1110 bool input1, input2;
1111 int i;
1112 u8 status;
1113
Chris Wilsonea5b2132010-08-04 13:50:23 +01001114 temp = I915_READ(intel_sdvo->sdvo_reg);
Jesse Barnes79e53942008-11-07 14:24:08 -08001115 if ((temp & SDVO_ENABLE) == 0)
Chris Wilsonea5b2132010-08-04 13:50:23 +01001116 intel_sdvo_write_sdvox(intel_sdvo, temp | SDVO_ENABLE);
Jesse Barnes79e53942008-11-07 14:24:08 -08001117 for (i = 0; i < 2; i++)
Jesse Barnes9d0498a2010-08-18 13:20:54 -07001118 intel_wait_for_vblank(dev, intel_crtc->pipe);
Jesse Barnes79e53942008-11-07 14:24:08 -08001119
Chris Wilson32aad862010-08-04 13:50:25 +01001120 status = intel_sdvo_get_trained_inputs(intel_sdvo, &input1, &input2);
Jesse Barnes79e53942008-11-07 14:24:08 -08001121 /* Warn if the device reported failure to sync.
1122 * A lot of SDVO devices fail to notify of sync, but it's
1123 * a given it the status is a success, we succeeded.
1124 */
1125 if (status == SDVO_CMD_STATUS_SUCCESS && !input1) {
Zhao Yakui8a4c47f2009-07-20 13:48:04 +08001126 DRM_DEBUG_KMS("First %s output reported failure to "
Chris Wilsonea5b2132010-08-04 13:50:23 +01001127 "sync\n", SDVO_NAME(intel_sdvo));
Jesse Barnes79e53942008-11-07 14:24:08 -08001128 }
1129
1130 if (0)
Chris Wilsonea5b2132010-08-04 13:50:23 +01001131 intel_sdvo_set_encoder_power_state(intel_sdvo, mode);
1132 intel_sdvo_set_active_outputs(intel_sdvo, intel_sdvo->attached_output);
Jesse Barnes79e53942008-11-07 14:24:08 -08001133 }
1134 return;
1135}
1136
Jesse Barnes79e53942008-11-07 14:24:08 -08001137static int intel_sdvo_mode_valid(struct drm_connector *connector,
1138 struct drm_display_mode *mode)
1139{
Chris Wilsondf0e9242010-09-09 16:20:55 +01001140 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
Jesse Barnes79e53942008-11-07 14:24:08 -08001141
1142 if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
1143 return MODE_NO_DBLESCAN;
1144
Chris Wilsonea5b2132010-08-04 13:50:23 +01001145 if (intel_sdvo->pixel_clock_min > mode->clock)
Jesse Barnes79e53942008-11-07 14:24:08 -08001146 return MODE_CLOCK_LOW;
1147
Chris Wilsonea5b2132010-08-04 13:50:23 +01001148 if (intel_sdvo->pixel_clock_max < mode->clock)
Jesse Barnes79e53942008-11-07 14:24:08 -08001149 return MODE_CLOCK_HIGH;
1150
Chris Wilson85454232010-08-08 14:28:23 +01001151 if (intel_sdvo->is_lvds) {
Chris Wilsonea5b2132010-08-04 13:50:23 +01001152 if (mode->hdisplay > intel_sdvo->sdvo_lvds_fixed_mode->hdisplay)
ling.ma@intel.com12682a92009-06-30 11:35:35 +08001153 return MODE_PANEL;
1154
Chris Wilsonea5b2132010-08-04 13:50:23 +01001155 if (mode->vdisplay > intel_sdvo->sdvo_lvds_fixed_mode->vdisplay)
ling.ma@intel.com12682a92009-06-30 11:35:35 +08001156 return MODE_PANEL;
1157 }
1158
Jesse Barnes79e53942008-11-07 14:24:08 -08001159 return MODE_OK;
1160}
1161
Chris Wilsonea5b2132010-08-04 13:50:23 +01001162static bool intel_sdvo_get_capabilities(struct intel_sdvo *intel_sdvo, struct intel_sdvo_caps *caps)
Jesse Barnes79e53942008-11-07 14:24:08 -08001163{
Chris Wilsone957d772010-09-24 12:52:03 +01001164 if (!intel_sdvo_get_value(intel_sdvo,
1165 SDVO_CMD_GET_DEVICE_CAPS,
1166 caps, sizeof(*caps)))
1167 return false;
1168
1169 DRM_DEBUG_KMS("SDVO capabilities:\n"
1170 " vendor_id: %d\n"
1171 " device_id: %d\n"
1172 " device_rev_id: %d\n"
1173 " sdvo_version_major: %d\n"
1174 " sdvo_version_minor: %d\n"
1175 " sdvo_inputs_mask: %d\n"
1176 " smooth_scaling: %d\n"
1177 " sharp_scaling: %d\n"
1178 " up_scaling: %d\n"
1179 " down_scaling: %d\n"
1180 " stall_support: %d\n"
1181 " output_flags: %d\n",
1182 caps->vendor_id,
1183 caps->device_id,
1184 caps->device_rev_id,
1185 caps->sdvo_version_major,
1186 caps->sdvo_version_minor,
1187 caps->sdvo_inputs_mask,
1188 caps->smooth_scaling,
1189 caps->sharp_scaling,
1190 caps->up_scaling,
1191 caps->down_scaling,
1192 caps->stall_support,
1193 caps->output_flags);
1194
1195 return true;
Jesse Barnes79e53942008-11-07 14:24:08 -08001196}
1197
Zhenyu Wangd2a82a62010-03-29 21:22:55 +08001198/* No use! */
1199#if 0
Jesse Barnes79e53942008-11-07 14:24:08 -08001200struct drm_connector* intel_sdvo_find(struct drm_device *dev, int sdvoB)
1201{
1202 struct drm_connector *connector = NULL;
Chris Wilsonea5b2132010-08-04 13:50:23 +01001203 struct intel_sdvo *iout = NULL;
1204 struct intel_sdvo *sdvo;
Jesse Barnes79e53942008-11-07 14:24:08 -08001205
1206 /* find the sdvo connector */
1207 list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
Chris Wilsonea5b2132010-08-04 13:50:23 +01001208 iout = to_intel_sdvo(connector);
Jesse Barnes79e53942008-11-07 14:24:08 -08001209
1210 if (iout->type != INTEL_OUTPUT_SDVO)
1211 continue;
1212
1213 sdvo = iout->dev_priv;
1214
Eric Anholtc751ce42010-03-25 11:48:48 -07001215 if (sdvo->sdvo_reg == SDVOB && sdvoB)
Jesse Barnes79e53942008-11-07 14:24:08 -08001216 return connector;
1217
Eric Anholtc751ce42010-03-25 11:48:48 -07001218 if (sdvo->sdvo_reg == SDVOC && !sdvoB)
Jesse Barnes79e53942008-11-07 14:24:08 -08001219 return connector;
1220
1221 }
1222
1223 return NULL;
1224}
1225
1226int intel_sdvo_supports_hotplug(struct drm_connector *connector)
1227{
1228 u8 response[2];
1229 u8 status;
Chris Wilsonea5b2132010-08-04 13:50:23 +01001230 struct intel_sdvo *intel_sdvo;
Zhao Yakui8a4c47f2009-07-20 13:48:04 +08001231 DRM_DEBUG_KMS("\n");
Jesse Barnes79e53942008-11-07 14:24:08 -08001232
1233 if (!connector)
1234 return 0;
1235
Chris Wilsonea5b2132010-08-04 13:50:23 +01001236 intel_sdvo = to_intel_sdvo(connector);
Jesse Barnes79e53942008-11-07 14:24:08 -08001237
Chris Wilson32aad862010-08-04 13:50:25 +01001238 return intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_HOT_PLUG_SUPPORT,
1239 &response, 2) && response[0];
Jesse Barnes79e53942008-11-07 14:24:08 -08001240}
1241
1242void intel_sdvo_set_hotplug(struct drm_connector *connector, int on)
1243{
1244 u8 response[2];
1245 u8 status;
Chris Wilsonea5b2132010-08-04 13:50:23 +01001246 struct intel_sdvo *intel_sdvo = to_intel_sdvo(connector);
Jesse Barnes79e53942008-11-07 14:24:08 -08001247
Chris Wilsonea5b2132010-08-04 13:50:23 +01001248 intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_GET_ACTIVE_HOT_PLUG, NULL, 0);
1249 intel_sdvo_read_response(intel_sdvo, &response, 2);
Jesse Barnes79e53942008-11-07 14:24:08 -08001250
1251 if (on) {
Chris Wilsonea5b2132010-08-04 13:50:23 +01001252 intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_GET_HOT_PLUG_SUPPORT, NULL, 0);
1253 status = intel_sdvo_read_response(intel_sdvo, &response, 2);
Jesse Barnes79e53942008-11-07 14:24:08 -08001254
Chris Wilsonea5b2132010-08-04 13:50:23 +01001255 intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_SET_ACTIVE_HOT_PLUG, &response, 2);
Jesse Barnes79e53942008-11-07 14:24:08 -08001256 } else {
1257 response[0] = 0;
1258 response[1] = 0;
Chris Wilsonea5b2132010-08-04 13:50:23 +01001259 intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_SET_ACTIVE_HOT_PLUG, &response, 2);
Jesse Barnes79e53942008-11-07 14:24:08 -08001260 }
1261
Chris Wilsonea5b2132010-08-04 13:50:23 +01001262 intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_GET_ACTIVE_HOT_PLUG, NULL, 0);
1263 intel_sdvo_read_response(intel_sdvo, &response, 2);
Jesse Barnes79e53942008-11-07 14:24:08 -08001264}
Zhenyu Wangd2a82a62010-03-29 21:22:55 +08001265#endif
Jesse Barnes79e53942008-11-07 14:24:08 -08001266
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08001267static bool
Chris Wilsonea5b2132010-08-04 13:50:23 +01001268intel_sdvo_multifunc_encoder(struct intel_sdvo *intel_sdvo)
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08001269{
Chris Wilsonbc652122011-01-25 13:28:29 +00001270 /* Is there more than one type of output? */
1271 int caps = intel_sdvo->caps.output_flags & 0xf;
1272 return caps & -caps;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08001273}
1274
Chris Wilsonf899fc62010-07-20 15:44:45 -07001275static struct edid *
Chris Wilsone957d772010-09-24 12:52:03 +01001276intel_sdvo_get_edid(struct drm_connector *connector)
Chris Wilsonf899fc62010-07-20 15:44:45 -07001277{
Chris Wilsone957d772010-09-24 12:52:03 +01001278 struct intel_sdvo *sdvo = intel_attached_sdvo(connector);
1279 return drm_get_edid(connector, &sdvo->ddc);
Chris Wilsonf899fc62010-07-20 15:44:45 -07001280}
1281
Chris Wilsonff482d82010-09-15 10:40:38 +01001282/* Mac mini hack -- use the same DDC as the analog connector */
1283static struct edid *
1284intel_sdvo_get_analog_edid(struct drm_connector *connector)
1285{
Chris Wilsonf899fc62010-07-20 15:44:45 -07001286 struct drm_i915_private *dev_priv = connector->dev->dev_private;
Chris Wilsonff482d82010-09-15 10:40:38 +01001287
Chris Wilson0c1dab82010-11-23 22:37:01 +00001288 return drm_get_edid(connector,
1289 &dev_priv->gmbus[dev_priv->crt_ddc_pin].adapter);
Chris Wilsonff482d82010-09-15 10:40:38 +01001290}
1291
ling.ma@intel.com2b8d33f72009-07-29 11:31:18 +08001292enum drm_connector_status
Adam Jackson149c36a2010-04-29 14:05:18 -04001293intel_sdvo_hdmi_sink_detect(struct drm_connector *connector)
Ma Ling9dff6af2009-04-02 13:13:26 +08001294{
Chris Wilsondf0e9242010-09-09 16:20:55 +01001295 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
Chris Wilson9d1a9032010-09-14 17:58:19 +01001296 enum drm_connector_status status;
1297 struct edid *edid;
Ma Ling9dff6af2009-04-02 13:13:26 +08001298
Chris Wilsone957d772010-09-24 12:52:03 +01001299 edid = intel_sdvo_get_edid(connector);
Keith Packard57cdaf92009-09-04 13:07:54 +08001300
Chris Wilsonea5b2132010-08-04 13:50:23 +01001301 if (edid == NULL && intel_sdvo_multifunc_encoder(intel_sdvo)) {
Chris Wilsone957d772010-09-24 12:52:03 +01001302 u8 ddc, saved_ddc = intel_sdvo->ddc_bus;
Chris Wilson9d1a9032010-09-14 17:58:19 +01001303
Zhao Yakui7c3f0a22010-01-08 10:58:20 +08001304 /*
1305 * Don't use the 1 as the argument of DDC bus switch to get
1306 * the EDID. It is used for SDVO SPD ROM.
1307 */
Chris Wilson9d1a9032010-09-14 17:58:19 +01001308 for (ddc = intel_sdvo->ddc_bus >> 1; ddc > 1; ddc >>= 1) {
Chris Wilsone957d772010-09-24 12:52:03 +01001309 intel_sdvo->ddc_bus = ddc;
1310 edid = intel_sdvo_get_edid(connector);
1311 if (edid)
Zhao Yakui7c3f0a22010-01-08 10:58:20 +08001312 break;
Zhao Yakui7c3f0a22010-01-08 10:58:20 +08001313 }
Chris Wilsone957d772010-09-24 12:52:03 +01001314 /*
1315 * If we found the EDID on the other bus,
1316 * assume that is the correct DDC bus.
1317 */
1318 if (edid == NULL)
1319 intel_sdvo->ddc_bus = saved_ddc;
Zhao Yakui7c3f0a22010-01-08 10:58:20 +08001320 }
Chris Wilson9d1a9032010-09-14 17:58:19 +01001321
1322 /*
1323 * When there is no edid and no monitor is connected with VGA
1324 * port, try to use the CRT ddc to read the EDID for DVI-connector.
Keith Packard57cdaf92009-09-04 13:07:54 +08001325 */
Chris Wilsonff482d82010-09-15 10:40:38 +01001326 if (edid == NULL)
1327 edid = intel_sdvo_get_analog_edid(connector);
Adam Jackson149c36a2010-04-29 14:05:18 -04001328
Chris Wilson2f551c82010-09-15 10:42:50 +01001329 status = connector_status_unknown;
Ma Ling9dff6af2009-04-02 13:13:26 +08001330 if (edid != NULL) {
Adam Jackson149c36a2010-04-29 14:05:18 -04001331 /* DDC bus is shared, match EDID to connector type */
Chris Wilson9d1a9032010-09-14 17:58:19 +01001332 if (edid->input & DRM_EDID_INPUT_DIGITAL) {
1333 status = connector_status_connected;
Chris Wilsonda79de92010-11-22 11:12:46 +00001334 if (intel_sdvo->is_hdmi) {
1335 intel_sdvo->has_hdmi_monitor = drm_detect_hdmi_monitor(edid);
1336 intel_sdvo->has_hdmi_audio = drm_detect_monitor_audio(edid);
1337 }
Chris Wilson9d1a9032010-09-14 17:58:19 +01001338 }
Zhenyu Wangd2a82a62010-03-29 21:22:55 +08001339 connector->display_info.raw_edid = NULL;
Chris Wilson9d1a9032010-09-14 17:58:19 +01001340 kfree(edid);
1341 }
Chris Wilson7f36e7e2010-09-19 09:29:33 +01001342
1343 if (status == connector_status_connected) {
1344 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1345 if (intel_sdvo_connector->force_audio)
Chris Wilsonda79de92010-11-22 11:12:46 +00001346 intel_sdvo->has_hdmi_audio = intel_sdvo_connector->force_audio > 0;
Chris Wilson7f36e7e2010-09-19 09:29:33 +01001347 }
1348
ling.ma@intel.com2b8d33f72009-07-29 11:31:18 +08001349 return status;
Ma Ling9dff6af2009-04-02 13:13:26 +08001350}
1351
Chris Wilson7b334fc2010-09-09 23:51:02 +01001352static enum drm_connector_status
Chris Wilson930a9e22010-09-14 11:07:23 +01001353intel_sdvo_detect(struct drm_connector *connector, bool force)
Jesse Barnes79e53942008-11-07 14:24:08 -08001354{
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08001355 uint16_t response;
Chris Wilsondf0e9242010-09-09 16:20:55 +01001356 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
Chris Wilson615fb932010-08-04 13:50:24 +01001357 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
Zhenyu Wang14571b42010-03-30 14:06:33 +08001358 enum drm_connector_status ret;
Jesse Barnes79e53942008-11-07 14:24:08 -08001359
Chris Wilson32aad862010-08-04 13:50:25 +01001360 if (!intel_sdvo_write_cmd(intel_sdvo,
Chris Wilsone957d772010-09-24 12:52:03 +01001361 SDVO_CMD_GET_ATTACHED_DISPLAYS, NULL, 0))
Chris Wilson32aad862010-08-04 13:50:25 +01001362 return connector_status_unknown;
Chris Wilsonba84cd12010-11-24 17:37:17 +00001363
1364 /* add 30ms delay when the output type might be TV */
1365 if (intel_sdvo->caps.output_flags &
1366 (SDVO_OUTPUT_SVID0 | SDVO_OUTPUT_CVBS0))
Zhao Yakuid09c23d2009-11-06 15:39:56 +08001367 mdelay(30);
Chris Wilsonba84cd12010-11-24 17:37:17 +00001368
Chris Wilson32aad862010-08-04 13:50:25 +01001369 if (!intel_sdvo_read_response(intel_sdvo, &response, 2))
1370 return connector_status_unknown;
Jesse Barnes79e53942008-11-07 14:24:08 -08001371
Chris Wilsone957d772010-09-24 12:52:03 +01001372 DRM_DEBUG_KMS("SDVO response %d %d [%x]\n",
1373 response & 0xff, response >> 8,
1374 intel_sdvo_connector->output_flag);
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001375
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08001376 if (response == 0)
Jesse Barnes79e53942008-11-07 14:24:08 -08001377 return connector_status_disconnected;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08001378
Chris Wilsonea5b2132010-08-04 13:50:23 +01001379 intel_sdvo->attached_output = response;
Zhenyu Wang14571b42010-03-30 14:06:33 +08001380
Chris Wilson97aaf912011-01-04 20:10:52 +00001381 intel_sdvo->has_hdmi_monitor = false;
1382 intel_sdvo->has_hdmi_audio = false;
1383
Chris Wilson615fb932010-08-04 13:50:24 +01001384 if ((intel_sdvo_connector->output_flag & response) == 0)
Zhenyu Wang14571b42010-03-30 14:06:33 +08001385 ret = connector_status_disconnected;
Adam Jackson149c36a2010-04-29 14:05:18 -04001386 else if (response & SDVO_TMDS_MASK)
1387 ret = intel_sdvo_hdmi_sink_detect(connector);
Zhenyu Wang14571b42010-03-30 14:06:33 +08001388 else
1389 ret = connector_status_connected;
1390
1391 /* May update encoder flag for like clock for SDVO TV, etc.*/
1392 if (ret == connector_status_connected) {
Chris Wilsonea5b2132010-08-04 13:50:23 +01001393 intel_sdvo->is_tv = false;
1394 intel_sdvo->is_lvds = false;
1395 intel_sdvo->base.needs_tv_clock = false;
Zhenyu Wang14571b42010-03-30 14:06:33 +08001396
1397 if (response & SDVO_TV_MASK) {
Chris Wilsonea5b2132010-08-04 13:50:23 +01001398 intel_sdvo->is_tv = true;
1399 intel_sdvo->base.needs_tv_clock = true;
Zhenyu Wang14571b42010-03-30 14:06:33 +08001400 }
1401 if (response & SDVO_LVDS_MASK)
Chris Wilson85454232010-08-08 14:28:23 +01001402 intel_sdvo->is_lvds = intel_sdvo->sdvo_lvds_fixed_mode != NULL;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08001403 }
Zhenyu Wang14571b42010-03-30 14:06:33 +08001404
1405 return ret;
Jesse Barnes79e53942008-11-07 14:24:08 -08001406}
1407
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001408static void intel_sdvo_get_ddc_modes(struct drm_connector *connector)
Jesse Barnes79e53942008-11-07 14:24:08 -08001409{
Chris Wilsonff482d82010-09-15 10:40:38 +01001410 struct edid *edid;
Jesse Barnes79e53942008-11-07 14:24:08 -08001411
1412 /* set the bus switch and get the modes */
Chris Wilsone957d772010-09-24 12:52:03 +01001413 edid = intel_sdvo_get_edid(connector);
Jesse Barnes79e53942008-11-07 14:24:08 -08001414
Keith Packard57cdaf92009-09-04 13:07:54 +08001415 /*
1416 * Mac mini hack. On this device, the DVI-I connector shares one DDC
1417 * link between analog and digital outputs. So, if the regular SDVO
1418 * DDC fails, check to see if the analog output is disconnected, in
1419 * which case we'll look there for the digital DDC data.
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001420 */
Chris Wilsonf899fc62010-07-20 15:44:45 -07001421 if (edid == NULL)
1422 edid = intel_sdvo_get_analog_edid(connector);
1423
Chris Wilsonff482d82010-09-15 10:40:38 +01001424 if (edid != NULL) {
Chris Wilson0c1dab82010-11-23 22:37:01 +00001425 if (edid->input & DRM_EDID_INPUT_DIGITAL) {
1426 drm_mode_connector_update_edid_property(connector, edid);
1427 drm_add_edid_modes(connector, edid);
1428 }
Chris Wilsonff482d82010-09-15 10:40:38 +01001429 connector->display_info.raw_edid = NULL;
1430 kfree(edid);
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001431 }
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001432}
1433
1434/*
1435 * Set of SDVO TV modes.
1436 * Note! This is in reply order (see loop in get_tv_modes).
1437 * XXX: all 60Hz refresh?
1438 */
1439struct drm_display_mode sdvo_tv_modes[] = {
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001440 { DRM_MODE("320x200", DRM_MODE_TYPE_DRIVER, 5815, 320, 321, 384,
1441 416, 0, 200, 201, 232, 233, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001442 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001443 { DRM_MODE("320x240", DRM_MODE_TYPE_DRIVER, 6814, 320, 321, 384,
1444 416, 0, 240, 241, 272, 273, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001445 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001446 { DRM_MODE("400x300", DRM_MODE_TYPE_DRIVER, 9910, 400, 401, 464,
1447 496, 0, 300, 301, 332, 333, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001448 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001449 { DRM_MODE("640x350", DRM_MODE_TYPE_DRIVER, 16913, 640, 641, 704,
1450 736, 0, 350, 351, 382, 383, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001451 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001452 { DRM_MODE("640x400", DRM_MODE_TYPE_DRIVER, 19121, 640, 641, 704,
1453 736, 0, 400, 401, 432, 433, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001454 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001455 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 22654, 640, 641, 704,
1456 736, 0, 480, 481, 512, 513, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001457 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001458 { DRM_MODE("704x480", DRM_MODE_TYPE_DRIVER, 24624, 704, 705, 768,
1459 800, 0, 480, 481, 512, 513, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001460 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001461 { DRM_MODE("704x576", DRM_MODE_TYPE_DRIVER, 29232, 704, 705, 768,
1462 800, 0, 576, 577, 608, 609, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001463 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001464 { DRM_MODE("720x350", DRM_MODE_TYPE_DRIVER, 18751, 720, 721, 784,
1465 816, 0, 350, 351, 382, 383, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001466 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001467 { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 21199, 720, 721, 784,
1468 816, 0, 400, 401, 432, 433, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001469 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001470 { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 25116, 720, 721, 784,
1471 816, 0, 480, 481, 512, 513, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001472 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001473 { DRM_MODE("720x540", DRM_MODE_TYPE_DRIVER, 28054, 720, 721, 784,
1474 816, 0, 540, 541, 572, 573, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001475 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001476 { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 29816, 720, 721, 784,
1477 816, 0, 576, 577, 608, 609, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001478 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001479 { DRM_MODE("768x576", DRM_MODE_TYPE_DRIVER, 31570, 768, 769, 832,
1480 864, 0, 576, 577, 608, 609, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001481 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001482 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 34030, 800, 801, 864,
1483 896, 0, 600, 601, 632, 633, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001484 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001485 { DRM_MODE("832x624", DRM_MODE_TYPE_DRIVER, 36581, 832, 833, 896,
1486 928, 0, 624, 625, 656, 657, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001487 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001488 { DRM_MODE("920x766", DRM_MODE_TYPE_DRIVER, 48707, 920, 921, 984,
1489 1016, 0, 766, 767, 798, 799, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001490 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001491 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 53827, 1024, 1025, 1088,
1492 1120, 0, 768, 769, 800, 801, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001493 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001494 { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 87265, 1280, 1281, 1344,
1495 1376, 0, 1024, 1025, 1056, 1057, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001496 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1497};
1498
1499static void intel_sdvo_get_tv_modes(struct drm_connector *connector)
1500{
Chris Wilsondf0e9242010-09-09 16:20:55 +01001501 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001502 struct intel_sdvo_sdtv_resolution_request tv_res;
Zhao Yakuice6feab2009-08-24 13:50:26 +08001503 uint32_t reply = 0, format_map = 0;
1504 int i;
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001505
1506 /* Read the list of supported input resolutions for the selected TV
1507 * format.
1508 */
Chris Wilson40039752010-08-04 13:50:26 +01001509 format_map = 1 << intel_sdvo->tv_format_index;
Zhao Yakuice6feab2009-08-24 13:50:26 +08001510 memcpy(&tv_res, &format_map,
Chris Wilson32aad862010-08-04 13:50:25 +01001511 min(sizeof(format_map), sizeof(struct intel_sdvo_sdtv_resolution_request)));
Zhao Yakuice6feab2009-08-24 13:50:26 +08001512
Chris Wilson32aad862010-08-04 13:50:25 +01001513 if (!intel_sdvo_set_target_output(intel_sdvo, intel_sdvo->attached_output))
1514 return;
Zhao Yakuice6feab2009-08-24 13:50:26 +08001515
Chris Wilson32aad862010-08-04 13:50:25 +01001516 BUILD_BUG_ON(sizeof(tv_res) != 3);
Chris Wilsone957d772010-09-24 12:52:03 +01001517 if (!intel_sdvo_write_cmd(intel_sdvo,
1518 SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT,
Chris Wilson32aad862010-08-04 13:50:25 +01001519 &tv_res, sizeof(tv_res)))
1520 return;
1521 if (!intel_sdvo_read_response(intel_sdvo, &reply, 3))
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001522 return;
1523
1524 for (i = 0; i < ARRAY_SIZE(sdvo_tv_modes); i++)
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001525 if (reply & (1 << i)) {
1526 struct drm_display_mode *nmode;
1527 nmode = drm_mode_duplicate(connector->dev,
Chris Wilson32aad862010-08-04 13:50:25 +01001528 &sdvo_tv_modes[i]);
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001529 if (nmode)
1530 drm_mode_probed_add(connector, nmode);
1531 }
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001532}
1533
Ma Ling7086c872009-05-13 11:20:06 +08001534static void intel_sdvo_get_lvds_modes(struct drm_connector *connector)
1535{
Chris Wilsondf0e9242010-09-09 16:20:55 +01001536 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
Ma Ling7086c872009-05-13 11:20:06 +08001537 struct drm_i915_private *dev_priv = connector->dev->dev_private;
ling.ma@intel.com12682a92009-06-30 11:35:35 +08001538 struct drm_display_mode *newmode;
Ma Ling7086c872009-05-13 11:20:06 +08001539
1540 /*
1541 * Attempt to get the mode list from DDC.
1542 * Assume that the preferred modes are
1543 * arranged in priority order.
1544 */
Chris Wilsonf899fc62010-07-20 15:44:45 -07001545 intel_ddc_get_modes(connector, intel_sdvo->i2c);
Ma Ling7086c872009-05-13 11:20:06 +08001546 if (list_empty(&connector->probed_modes) == false)
ling.ma@intel.com12682a92009-06-30 11:35:35 +08001547 goto end;
Ma Ling7086c872009-05-13 11:20:06 +08001548
1549 /* Fetch modes from VBT */
1550 if (dev_priv->sdvo_lvds_vbt_mode != NULL) {
Ma Ling7086c872009-05-13 11:20:06 +08001551 newmode = drm_mode_duplicate(connector->dev,
1552 dev_priv->sdvo_lvds_vbt_mode);
1553 if (newmode != NULL) {
1554 /* Guarantee the mode is preferred */
1555 newmode->type = (DRM_MODE_TYPE_PREFERRED |
1556 DRM_MODE_TYPE_DRIVER);
1557 drm_mode_probed_add(connector, newmode);
1558 }
1559 }
ling.ma@intel.com12682a92009-06-30 11:35:35 +08001560
1561end:
1562 list_for_each_entry(newmode, &connector->probed_modes, head) {
1563 if (newmode->type & DRM_MODE_TYPE_PREFERRED) {
Chris Wilsonea5b2132010-08-04 13:50:23 +01001564 intel_sdvo->sdvo_lvds_fixed_mode =
ling.ma@intel.com12682a92009-06-30 11:35:35 +08001565 drm_mode_duplicate(connector->dev, newmode);
Chris Wilson6c9547f2010-08-25 10:05:17 +01001566
1567 drm_mode_set_crtcinfo(intel_sdvo->sdvo_lvds_fixed_mode,
1568 0);
1569
Chris Wilson85454232010-08-08 14:28:23 +01001570 intel_sdvo->is_lvds = true;
ling.ma@intel.com12682a92009-06-30 11:35:35 +08001571 break;
1572 }
1573 }
1574
Ma Ling7086c872009-05-13 11:20:06 +08001575}
1576
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001577static int intel_sdvo_get_modes(struct drm_connector *connector)
1578{
Chris Wilson615fb932010-08-04 13:50:24 +01001579 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001580
Chris Wilson615fb932010-08-04 13:50:24 +01001581 if (IS_TV(intel_sdvo_connector))
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001582 intel_sdvo_get_tv_modes(connector);
Chris Wilson615fb932010-08-04 13:50:24 +01001583 else if (IS_LVDS(intel_sdvo_connector))
Ma Ling7086c872009-05-13 11:20:06 +08001584 intel_sdvo_get_lvds_modes(connector);
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001585 else
1586 intel_sdvo_get_ddc_modes(connector);
1587
Chris Wilson32aad862010-08-04 13:50:25 +01001588 return !list_empty(&connector->probed_modes);
Jesse Barnes79e53942008-11-07 14:24:08 -08001589}
1590
Chris Wilsonfcc8d672010-08-04 13:50:27 +01001591static void
1592intel_sdvo_destroy_enhance_property(struct drm_connector *connector)
Zhao Yakuib9219c52009-09-10 15:45:46 +08001593{
Chris Wilson615fb932010-08-04 13:50:24 +01001594 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
Zhao Yakuib9219c52009-09-10 15:45:46 +08001595 struct drm_device *dev = connector->dev;
1596
Chris Wilsonc5521702010-08-04 13:50:28 +01001597 if (intel_sdvo_connector->left)
1598 drm_property_destroy(dev, intel_sdvo_connector->left);
1599 if (intel_sdvo_connector->right)
1600 drm_property_destroy(dev, intel_sdvo_connector->right);
1601 if (intel_sdvo_connector->top)
1602 drm_property_destroy(dev, intel_sdvo_connector->top);
1603 if (intel_sdvo_connector->bottom)
1604 drm_property_destroy(dev, intel_sdvo_connector->bottom);
1605 if (intel_sdvo_connector->hpos)
1606 drm_property_destroy(dev, intel_sdvo_connector->hpos);
1607 if (intel_sdvo_connector->vpos)
1608 drm_property_destroy(dev, intel_sdvo_connector->vpos);
1609 if (intel_sdvo_connector->saturation)
1610 drm_property_destroy(dev, intel_sdvo_connector->saturation);
1611 if (intel_sdvo_connector->contrast)
1612 drm_property_destroy(dev, intel_sdvo_connector->contrast);
1613 if (intel_sdvo_connector->hue)
1614 drm_property_destroy(dev, intel_sdvo_connector->hue);
1615 if (intel_sdvo_connector->sharpness)
1616 drm_property_destroy(dev, intel_sdvo_connector->sharpness);
1617 if (intel_sdvo_connector->flicker_filter)
1618 drm_property_destroy(dev, intel_sdvo_connector->flicker_filter);
1619 if (intel_sdvo_connector->flicker_filter_2d)
1620 drm_property_destroy(dev, intel_sdvo_connector->flicker_filter_2d);
1621 if (intel_sdvo_connector->flicker_filter_adaptive)
1622 drm_property_destroy(dev, intel_sdvo_connector->flicker_filter_adaptive);
1623 if (intel_sdvo_connector->tv_luma_filter)
1624 drm_property_destroy(dev, intel_sdvo_connector->tv_luma_filter);
1625 if (intel_sdvo_connector->tv_chroma_filter)
1626 drm_property_destroy(dev, intel_sdvo_connector->tv_chroma_filter);
Chris Wilsone0442182010-08-04 13:50:29 +01001627 if (intel_sdvo_connector->dot_crawl)
1628 drm_property_destroy(dev, intel_sdvo_connector->dot_crawl);
Chris Wilsonc5521702010-08-04 13:50:28 +01001629 if (intel_sdvo_connector->brightness)
1630 drm_property_destroy(dev, intel_sdvo_connector->brightness);
Zhao Yakuib9219c52009-09-10 15:45:46 +08001631}
1632
Jesse Barnes79e53942008-11-07 14:24:08 -08001633static void intel_sdvo_destroy(struct drm_connector *connector)
1634{
Chris Wilson615fb932010-08-04 13:50:24 +01001635 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
Jesse Barnes79e53942008-11-07 14:24:08 -08001636
Chris Wilsonc5521702010-08-04 13:50:28 +01001637 if (intel_sdvo_connector->tv_format)
Zhao Yakuice6feab2009-08-24 13:50:26 +08001638 drm_property_destroy(connector->dev,
Chris Wilsonc5521702010-08-04 13:50:28 +01001639 intel_sdvo_connector->tv_format);
Zhao Yakuice6feab2009-08-24 13:50:26 +08001640
Zhenyu Wangd2a82a62010-03-29 21:22:55 +08001641 intel_sdvo_destroy_enhance_property(connector);
Jesse Barnes79e53942008-11-07 14:24:08 -08001642 drm_sysfs_connector_remove(connector);
1643 drm_connector_cleanup(connector);
Zhenyu Wangd2a82a62010-03-29 21:22:55 +08001644 kfree(connector);
Jesse Barnes79e53942008-11-07 14:24:08 -08001645}
1646
Zhao Yakuice6feab2009-08-24 13:50:26 +08001647static int
1648intel_sdvo_set_property(struct drm_connector *connector,
1649 struct drm_property *property,
1650 uint64_t val)
1651{
Chris Wilsondf0e9242010-09-09 16:20:55 +01001652 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
Chris Wilson615fb932010-08-04 13:50:24 +01001653 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
Zhao Yakuib9219c52009-09-10 15:45:46 +08001654 uint16_t temp_value;
Chris Wilson32aad862010-08-04 13:50:25 +01001655 uint8_t cmd;
1656 int ret;
Zhao Yakuice6feab2009-08-24 13:50:26 +08001657
1658 ret = drm_connector_property_set_value(connector, property, val);
Chris Wilson32aad862010-08-04 13:50:25 +01001659 if (ret)
1660 return ret;
Zhao Yakuice6feab2009-08-24 13:50:26 +08001661
Chris Wilson7f36e7e2010-09-19 09:29:33 +01001662 if (property == intel_sdvo_connector->force_audio_property) {
1663 if (val == intel_sdvo_connector->force_audio)
1664 return 0;
1665
1666 intel_sdvo_connector->force_audio = val;
1667
Chris Wilsonda79de92010-11-22 11:12:46 +00001668 if (val > 0 && intel_sdvo->has_hdmi_audio)
Chris Wilson7f36e7e2010-09-19 09:29:33 +01001669 return 0;
Chris Wilsonda79de92010-11-22 11:12:46 +00001670 if (val < 0 && !intel_sdvo->has_hdmi_audio)
Chris Wilson7f36e7e2010-09-19 09:29:33 +01001671 return 0;
1672
Chris Wilsonda79de92010-11-22 11:12:46 +00001673 intel_sdvo->has_hdmi_audio = val > 0;
Chris Wilson7f36e7e2010-09-19 09:29:33 +01001674 goto done;
1675 }
1676
Chris Wilsonc5521702010-08-04 13:50:28 +01001677#define CHECK_PROPERTY(name, NAME) \
1678 if (intel_sdvo_connector->name == property) { \
1679 if (intel_sdvo_connector->cur_##name == temp_value) return 0; \
1680 if (intel_sdvo_connector->max_##name < temp_value) return -EINVAL; \
1681 cmd = SDVO_CMD_SET_##NAME; \
1682 intel_sdvo_connector->cur_##name = temp_value; \
1683 goto set_value; \
1684 }
1685
1686 if (property == intel_sdvo_connector->tv_format) {
Chris Wilson32aad862010-08-04 13:50:25 +01001687 if (val >= TV_FORMAT_NUM)
1688 return -EINVAL;
1689
Chris Wilson40039752010-08-04 13:50:26 +01001690 if (intel_sdvo->tv_format_index ==
Chris Wilson615fb932010-08-04 13:50:24 +01001691 intel_sdvo_connector->tv_format_supported[val])
Chris Wilson32aad862010-08-04 13:50:25 +01001692 return 0;
Zhao Yakuice6feab2009-08-24 13:50:26 +08001693
Chris Wilson40039752010-08-04 13:50:26 +01001694 intel_sdvo->tv_format_index = intel_sdvo_connector->tv_format_supported[val];
Chris Wilsonc5521702010-08-04 13:50:28 +01001695 goto done;
Chris Wilson32aad862010-08-04 13:50:25 +01001696 } else if (IS_TV_OR_LVDS(intel_sdvo_connector)) {
Zhao Yakuib9219c52009-09-10 15:45:46 +08001697 temp_value = val;
Chris Wilsonc5521702010-08-04 13:50:28 +01001698 if (intel_sdvo_connector->left == property) {
Zhao Yakuib9219c52009-09-10 15:45:46 +08001699 drm_connector_property_set_value(connector,
Chris Wilsonc5521702010-08-04 13:50:28 +01001700 intel_sdvo_connector->right, val);
Chris Wilson615fb932010-08-04 13:50:24 +01001701 if (intel_sdvo_connector->left_margin == temp_value)
Chris Wilson32aad862010-08-04 13:50:25 +01001702 return 0;
Zhao Yakuib9219c52009-09-10 15:45:46 +08001703
Chris Wilson615fb932010-08-04 13:50:24 +01001704 intel_sdvo_connector->left_margin = temp_value;
1705 intel_sdvo_connector->right_margin = temp_value;
1706 temp_value = intel_sdvo_connector->max_hscan -
Chris Wilsonc5521702010-08-04 13:50:28 +01001707 intel_sdvo_connector->left_margin;
Zhao Yakuib9219c52009-09-10 15:45:46 +08001708 cmd = SDVO_CMD_SET_OVERSCAN_H;
Chris Wilsonc5521702010-08-04 13:50:28 +01001709 goto set_value;
1710 } else if (intel_sdvo_connector->right == property) {
Zhao Yakuib9219c52009-09-10 15:45:46 +08001711 drm_connector_property_set_value(connector,
Chris Wilsonc5521702010-08-04 13:50:28 +01001712 intel_sdvo_connector->left, val);
Chris Wilson615fb932010-08-04 13:50:24 +01001713 if (intel_sdvo_connector->right_margin == temp_value)
Chris Wilson32aad862010-08-04 13:50:25 +01001714 return 0;
Zhao Yakuib9219c52009-09-10 15:45:46 +08001715
Chris Wilson615fb932010-08-04 13:50:24 +01001716 intel_sdvo_connector->left_margin = temp_value;
1717 intel_sdvo_connector->right_margin = temp_value;
1718 temp_value = intel_sdvo_connector->max_hscan -
1719 intel_sdvo_connector->left_margin;
Zhao Yakuib9219c52009-09-10 15:45:46 +08001720 cmd = SDVO_CMD_SET_OVERSCAN_H;
Chris Wilsonc5521702010-08-04 13:50:28 +01001721 goto set_value;
1722 } else if (intel_sdvo_connector->top == property) {
Zhao Yakuib9219c52009-09-10 15:45:46 +08001723 drm_connector_property_set_value(connector,
Chris Wilsonc5521702010-08-04 13:50:28 +01001724 intel_sdvo_connector->bottom, val);
Chris Wilson615fb932010-08-04 13:50:24 +01001725 if (intel_sdvo_connector->top_margin == temp_value)
Chris Wilson32aad862010-08-04 13:50:25 +01001726 return 0;
Zhao Yakuib9219c52009-09-10 15:45:46 +08001727
Chris Wilson615fb932010-08-04 13:50:24 +01001728 intel_sdvo_connector->top_margin = temp_value;
1729 intel_sdvo_connector->bottom_margin = temp_value;
1730 temp_value = intel_sdvo_connector->max_vscan -
Chris Wilsonc5521702010-08-04 13:50:28 +01001731 intel_sdvo_connector->top_margin;
Zhao Yakuib9219c52009-09-10 15:45:46 +08001732 cmd = SDVO_CMD_SET_OVERSCAN_V;
Chris Wilsonc5521702010-08-04 13:50:28 +01001733 goto set_value;
1734 } else if (intel_sdvo_connector->bottom == property) {
Zhao Yakuib9219c52009-09-10 15:45:46 +08001735 drm_connector_property_set_value(connector,
Chris Wilsonc5521702010-08-04 13:50:28 +01001736 intel_sdvo_connector->top, val);
Chris Wilson615fb932010-08-04 13:50:24 +01001737 if (intel_sdvo_connector->bottom_margin == temp_value)
Chris Wilson32aad862010-08-04 13:50:25 +01001738 return 0;
1739
Chris Wilson615fb932010-08-04 13:50:24 +01001740 intel_sdvo_connector->top_margin = temp_value;
1741 intel_sdvo_connector->bottom_margin = temp_value;
1742 temp_value = intel_sdvo_connector->max_vscan -
Chris Wilsonc5521702010-08-04 13:50:28 +01001743 intel_sdvo_connector->top_margin;
Zhao Yakuib9219c52009-09-10 15:45:46 +08001744 cmd = SDVO_CMD_SET_OVERSCAN_V;
Chris Wilsonc5521702010-08-04 13:50:28 +01001745 goto set_value;
Zhao Yakuib9219c52009-09-10 15:45:46 +08001746 }
Chris Wilsonc5521702010-08-04 13:50:28 +01001747 CHECK_PROPERTY(hpos, HPOS)
1748 CHECK_PROPERTY(vpos, VPOS)
1749 CHECK_PROPERTY(saturation, SATURATION)
1750 CHECK_PROPERTY(contrast, CONTRAST)
1751 CHECK_PROPERTY(hue, HUE)
1752 CHECK_PROPERTY(brightness, BRIGHTNESS)
1753 CHECK_PROPERTY(sharpness, SHARPNESS)
1754 CHECK_PROPERTY(flicker_filter, FLICKER_FILTER)
1755 CHECK_PROPERTY(flicker_filter_2d, FLICKER_FILTER_2D)
1756 CHECK_PROPERTY(flicker_filter_adaptive, FLICKER_FILTER_ADAPTIVE)
1757 CHECK_PROPERTY(tv_chroma_filter, TV_CHROMA_FILTER)
1758 CHECK_PROPERTY(tv_luma_filter, TV_LUMA_FILTER)
Chris Wilsone0442182010-08-04 13:50:29 +01001759 CHECK_PROPERTY(dot_crawl, DOT_CRAWL)
Zhao Yakuib9219c52009-09-10 15:45:46 +08001760 }
Chris Wilsonc5521702010-08-04 13:50:28 +01001761
1762 return -EINVAL; /* unknown property */
1763
1764set_value:
1765 if (!intel_sdvo_set_value(intel_sdvo, cmd, &temp_value, 2))
1766 return -EIO;
1767
1768
1769done:
Chris Wilsondf0e9242010-09-09 16:20:55 +01001770 if (intel_sdvo->base.base.crtc) {
1771 struct drm_crtc *crtc = intel_sdvo->base.base.crtc;
Zhao Yakuice6feab2009-08-24 13:50:26 +08001772 drm_crtc_helper_set_mode(crtc, &crtc->mode, crtc->x,
Chris Wilsonc5521702010-08-04 13:50:28 +01001773 crtc->y, crtc->fb);
1774 }
1775
Chris Wilson32aad862010-08-04 13:50:25 +01001776 return 0;
Chris Wilsonc5521702010-08-04 13:50:28 +01001777#undef CHECK_PROPERTY
Zhao Yakuice6feab2009-08-24 13:50:26 +08001778}
1779
Jesse Barnes79e53942008-11-07 14:24:08 -08001780static const struct drm_encoder_helper_funcs intel_sdvo_helper_funcs = {
1781 .dpms = intel_sdvo_dpms,
1782 .mode_fixup = intel_sdvo_mode_fixup,
1783 .prepare = intel_encoder_prepare,
1784 .mode_set = intel_sdvo_mode_set,
1785 .commit = intel_encoder_commit,
1786};
1787
1788static const struct drm_connector_funcs intel_sdvo_connector_funcs = {
Keith Packardc9fb15f2009-05-30 20:42:28 -07001789 .dpms = drm_helper_connector_dpms,
Jesse Barnes79e53942008-11-07 14:24:08 -08001790 .detect = intel_sdvo_detect,
1791 .fill_modes = drm_helper_probe_single_connector_modes,
Zhao Yakuice6feab2009-08-24 13:50:26 +08001792 .set_property = intel_sdvo_set_property,
Jesse Barnes79e53942008-11-07 14:24:08 -08001793 .destroy = intel_sdvo_destroy,
1794};
1795
1796static const struct drm_connector_helper_funcs intel_sdvo_connector_helper_funcs = {
1797 .get_modes = intel_sdvo_get_modes,
1798 .mode_valid = intel_sdvo_mode_valid,
Chris Wilsondf0e9242010-09-09 16:20:55 +01001799 .best_encoder = intel_best_encoder,
Jesse Barnes79e53942008-11-07 14:24:08 -08001800};
1801
Hannes Ederb358d0a2008-12-18 21:18:47 +01001802static void intel_sdvo_enc_destroy(struct drm_encoder *encoder)
Jesse Barnes79e53942008-11-07 14:24:08 -08001803{
Chris Wilson890f3352010-09-14 16:46:59 +01001804 struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder);
Zhenyu Wangd2a82a62010-03-29 21:22:55 +08001805
Chris Wilsonea5b2132010-08-04 13:50:23 +01001806 if (intel_sdvo->sdvo_lvds_fixed_mode != NULL)
Zhenyu Wangd2a82a62010-03-29 21:22:55 +08001807 drm_mode_destroy(encoder->dev,
Chris Wilsonea5b2132010-08-04 13:50:23 +01001808 intel_sdvo->sdvo_lvds_fixed_mode);
Zhenyu Wangd2a82a62010-03-29 21:22:55 +08001809
Chris Wilsone957d772010-09-24 12:52:03 +01001810 i2c_del_adapter(&intel_sdvo->ddc);
Chris Wilsonea5b2132010-08-04 13:50:23 +01001811 intel_encoder_destroy(encoder);
Jesse Barnes79e53942008-11-07 14:24:08 -08001812}
1813
1814static const struct drm_encoder_funcs intel_sdvo_enc_funcs = {
1815 .destroy = intel_sdvo_enc_destroy,
1816};
1817
Chris Wilsonb66d8422010-08-12 15:26:41 +01001818static void
1819intel_sdvo_guess_ddc_bus(struct intel_sdvo *sdvo)
1820{
1821 uint16_t mask = 0;
1822 unsigned int num_bits;
1823
1824 /* Make a mask of outputs less than or equal to our own priority in the
1825 * list.
1826 */
1827 switch (sdvo->controlled_output) {
1828 case SDVO_OUTPUT_LVDS1:
1829 mask |= SDVO_OUTPUT_LVDS1;
1830 case SDVO_OUTPUT_LVDS0:
1831 mask |= SDVO_OUTPUT_LVDS0;
1832 case SDVO_OUTPUT_TMDS1:
1833 mask |= SDVO_OUTPUT_TMDS1;
1834 case SDVO_OUTPUT_TMDS0:
1835 mask |= SDVO_OUTPUT_TMDS0;
1836 case SDVO_OUTPUT_RGB1:
1837 mask |= SDVO_OUTPUT_RGB1;
1838 case SDVO_OUTPUT_RGB0:
1839 mask |= SDVO_OUTPUT_RGB0;
1840 break;
1841 }
1842
1843 /* Count bits to find what number we are in the priority list. */
1844 mask &= sdvo->caps.output_flags;
1845 num_bits = hweight16(mask);
1846 /* If more than 3 outputs, default to DDC bus 3 for now. */
1847 if (num_bits > 3)
1848 num_bits = 3;
1849
1850 /* Corresponds to SDVO_CONTROL_BUS_DDCx */
1851 sdvo->ddc_bus = 1 << num_bits;
1852}
Jesse Barnes79e53942008-11-07 14:24:08 -08001853
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001854/**
1855 * Choose the appropriate DDC bus for control bus switch command for this
1856 * SDVO output based on the controlled output.
1857 *
1858 * DDC bus number assignment is in a priority order of RGB outputs, then TMDS
1859 * outputs, then LVDS outputs.
1860 */
1861static void
Adam Jacksonb1083332010-04-23 16:07:40 -04001862intel_sdvo_select_ddc_bus(struct drm_i915_private *dev_priv,
Chris Wilsonea5b2132010-08-04 13:50:23 +01001863 struct intel_sdvo *sdvo, u32 reg)
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001864{
Adam Jacksonb1083332010-04-23 16:07:40 -04001865 struct sdvo_device_mapping *mapping;
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001866
Adam Jacksonb1083332010-04-23 16:07:40 -04001867 if (IS_SDVOB(reg))
1868 mapping = &(dev_priv->sdvo_mappings[0]);
1869 else
1870 mapping = &(dev_priv->sdvo_mappings[1]);
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001871
Chris Wilsonb66d8422010-08-12 15:26:41 +01001872 if (mapping->initialized)
1873 sdvo->ddc_bus = 1 << ((mapping->ddc_pin & 0xf0) >> 4);
1874 else
1875 intel_sdvo_guess_ddc_bus(sdvo);
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001876}
1877
Chris Wilsone957d772010-09-24 12:52:03 +01001878static void
1879intel_sdvo_select_i2c_bus(struct drm_i915_private *dev_priv,
1880 struct intel_sdvo *sdvo, u32 reg)
1881{
1882 struct sdvo_device_mapping *mapping;
1883 u8 pin, speed;
1884
1885 if (IS_SDVOB(reg))
1886 mapping = &dev_priv->sdvo_mappings[0];
1887 else
1888 mapping = &dev_priv->sdvo_mappings[1];
1889
1890 pin = GMBUS_PORT_DPB;
1891 speed = GMBUS_RATE_1MHZ >> 8;
1892 if (mapping->initialized) {
1893 pin = mapping->i2c_pin;
1894 speed = mapping->i2c_speed;
1895 }
1896
Chris Wilson63abf3e2010-12-08 16:48:21 +00001897 if (pin < GMBUS_NUM_PORTS) {
1898 sdvo->i2c = &dev_priv->gmbus[pin].adapter;
1899 intel_gmbus_set_speed(sdvo->i2c, speed);
1900 intel_gmbus_force_bit(sdvo->i2c, true);
1901 } else
1902 sdvo->i2c = &dev_priv->gmbus[GMBUS_PORT_DPB].adapter;
Chris Wilsone957d772010-09-24 12:52:03 +01001903}
1904
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001905static bool
Chris Wilsone27d8532010-10-22 09:15:22 +01001906intel_sdvo_is_hdmi_connector(struct intel_sdvo *intel_sdvo, int device)
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001907{
Chris Wilson97aaf912011-01-04 20:10:52 +00001908 return intel_sdvo_check_supp_encode(intel_sdvo);
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001909}
1910
yakui_zhao714605e2009-05-31 17:18:07 +08001911static u8
Eric Anholtc751ce42010-03-25 11:48:48 -07001912intel_sdvo_get_slave_addr(struct drm_device *dev, int sdvo_reg)
yakui_zhao714605e2009-05-31 17:18:07 +08001913{
1914 struct drm_i915_private *dev_priv = dev->dev_private;
1915 struct sdvo_device_mapping *my_mapping, *other_mapping;
1916
Zhao Yakui461ed3c2010-03-30 15:11:33 +08001917 if (IS_SDVOB(sdvo_reg)) {
yakui_zhao714605e2009-05-31 17:18:07 +08001918 my_mapping = &dev_priv->sdvo_mappings[0];
1919 other_mapping = &dev_priv->sdvo_mappings[1];
1920 } else {
1921 my_mapping = &dev_priv->sdvo_mappings[1];
1922 other_mapping = &dev_priv->sdvo_mappings[0];
1923 }
1924
1925 /* If the BIOS described our SDVO device, take advantage of it. */
1926 if (my_mapping->slave_addr)
1927 return my_mapping->slave_addr;
1928
1929 /* If the BIOS only described a different SDVO device, use the
1930 * address that it isn't using.
1931 */
1932 if (other_mapping->slave_addr) {
1933 if (other_mapping->slave_addr == 0x70)
1934 return 0x72;
1935 else
1936 return 0x70;
1937 }
1938
1939 /* No SDVO device info is found for another DVO port,
1940 * so use mapping assumption we had before BIOS parsing.
1941 */
Zhao Yakui461ed3c2010-03-30 15:11:33 +08001942 if (IS_SDVOB(sdvo_reg))
yakui_zhao714605e2009-05-31 17:18:07 +08001943 return 0x70;
1944 else
1945 return 0x72;
1946}
1947
Zhenyu Wang14571b42010-03-30 14:06:33 +08001948static void
Chris Wilsondf0e9242010-09-09 16:20:55 +01001949intel_sdvo_connector_init(struct intel_sdvo_connector *connector,
1950 struct intel_sdvo *encoder)
Zhenyu Wang14571b42010-03-30 14:06:33 +08001951{
Chris Wilsondf0e9242010-09-09 16:20:55 +01001952 drm_connector_init(encoder->base.base.dev,
1953 &connector->base.base,
1954 &intel_sdvo_connector_funcs,
1955 connector->base.base.connector_type);
Zhao Yakui6070a4a2010-02-08 21:35:12 +08001956
Chris Wilsondf0e9242010-09-09 16:20:55 +01001957 drm_connector_helper_add(&connector->base.base,
1958 &intel_sdvo_connector_helper_funcs);
Zhenyu Wang14571b42010-03-30 14:06:33 +08001959
Chris Wilsondf0e9242010-09-09 16:20:55 +01001960 connector->base.base.interlace_allowed = 0;
1961 connector->base.base.doublescan_allowed = 0;
1962 connector->base.base.display_info.subpixel_order = SubPixelHorizontalRGB;
Zhenyu Wang14571b42010-03-30 14:06:33 +08001963
Chris Wilsondf0e9242010-09-09 16:20:55 +01001964 intel_connector_attach_encoder(&connector->base, &encoder->base);
1965 drm_sysfs_connector_add(&connector->base.base);
Zhenyu Wang14571b42010-03-30 14:06:33 +08001966}
1967
Chris Wilson7f36e7e2010-09-19 09:29:33 +01001968static void
1969intel_sdvo_add_hdmi_properties(struct intel_sdvo_connector *connector)
1970{
1971 struct drm_device *dev = connector->base.base.dev;
1972
1973 connector->force_audio_property =
1974 drm_property_create(dev, DRM_MODE_PROP_RANGE, "force_audio", 2);
1975 if (connector->force_audio_property) {
1976 connector->force_audio_property->values[0] = -1;
1977 connector->force_audio_property->values[1] = 1;
1978 drm_connector_attach_property(&connector->base.base,
1979 connector->force_audio_property, 0);
1980 }
1981}
1982
Zhenyu Wang14571b42010-03-30 14:06:33 +08001983static bool
Chris Wilsonea5b2132010-08-04 13:50:23 +01001984intel_sdvo_dvi_init(struct intel_sdvo *intel_sdvo, int device)
Zhenyu Wang14571b42010-03-30 14:06:33 +08001985{
Chris Wilson4ef69c72010-09-09 15:14:28 +01001986 struct drm_encoder *encoder = &intel_sdvo->base.base;
Zhenyu Wang14571b42010-03-30 14:06:33 +08001987 struct drm_connector *connector;
1988 struct intel_connector *intel_connector;
Chris Wilson615fb932010-08-04 13:50:24 +01001989 struct intel_sdvo_connector *intel_sdvo_connector;
Zhenyu Wang14571b42010-03-30 14:06:33 +08001990
Chris Wilson615fb932010-08-04 13:50:24 +01001991 intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL);
1992 if (!intel_sdvo_connector)
Zhenyu Wang14571b42010-03-30 14:06:33 +08001993 return false;
1994
Zhenyu Wang14571b42010-03-30 14:06:33 +08001995 if (device == 0) {
Chris Wilsonea5b2132010-08-04 13:50:23 +01001996 intel_sdvo->controlled_output |= SDVO_OUTPUT_TMDS0;
Chris Wilson615fb932010-08-04 13:50:24 +01001997 intel_sdvo_connector->output_flag = SDVO_OUTPUT_TMDS0;
Zhenyu Wang14571b42010-03-30 14:06:33 +08001998 } else if (device == 1) {
Chris Wilsonea5b2132010-08-04 13:50:23 +01001999 intel_sdvo->controlled_output |= SDVO_OUTPUT_TMDS1;
Chris Wilson615fb932010-08-04 13:50:24 +01002000 intel_sdvo_connector->output_flag = SDVO_OUTPUT_TMDS1;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002001 }
2002
Chris Wilson615fb932010-08-04 13:50:24 +01002003 intel_connector = &intel_sdvo_connector->base;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002004 connector = &intel_connector->base;
Dave Airlieeb1f8e42010-05-07 06:42:51 +00002005 connector->polled = DRM_CONNECTOR_POLL_CONNECT | DRM_CONNECTOR_POLL_DISCONNECT;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002006 encoder->encoder_type = DRM_MODE_ENCODER_TMDS;
2007 connector->connector_type = DRM_MODE_CONNECTOR_DVID;
2008
Chris Wilsone27d8532010-10-22 09:15:22 +01002009 if (intel_sdvo_is_hdmi_connector(intel_sdvo, device)) {
Zhenyu Wang14571b42010-03-30 14:06:33 +08002010 connector->connector_type = DRM_MODE_CONNECTOR_HDMIA;
Chris Wilsone27d8532010-10-22 09:15:22 +01002011 intel_sdvo->is_hdmi = true;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002012 }
Chris Wilsonea5b2132010-08-04 13:50:23 +01002013 intel_sdvo->base.clone_mask = ((1 << INTEL_SDVO_NON_TV_CLONE_BIT) |
2014 (1 << INTEL_ANALOG_CLONE_BIT));
Zhenyu Wang14571b42010-03-30 14:06:33 +08002015
Chris Wilsondf0e9242010-09-09 16:20:55 +01002016 intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo);
Chris Wilsonf797d222010-12-23 09:43:48 +00002017 if (intel_sdvo->is_hdmi)
2018 intel_sdvo_add_hdmi_properties(intel_sdvo_connector);
Zhenyu Wang14571b42010-03-30 14:06:33 +08002019
2020 return true;
2021}
2022
2023static bool
Chris Wilsonea5b2132010-08-04 13:50:23 +01002024intel_sdvo_tv_init(struct intel_sdvo *intel_sdvo, int type)
Zhenyu Wang14571b42010-03-30 14:06:33 +08002025{
Chris Wilson4ef69c72010-09-09 15:14:28 +01002026 struct drm_encoder *encoder = &intel_sdvo->base.base;
2027 struct drm_connector *connector;
2028 struct intel_connector *intel_connector;
2029 struct intel_sdvo_connector *intel_sdvo_connector;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002030
Chris Wilson615fb932010-08-04 13:50:24 +01002031 intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL);
2032 if (!intel_sdvo_connector)
2033 return false;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002034
Chris Wilson615fb932010-08-04 13:50:24 +01002035 intel_connector = &intel_sdvo_connector->base;
Chris Wilson4ef69c72010-09-09 15:14:28 +01002036 connector = &intel_connector->base;
2037 encoder->encoder_type = DRM_MODE_ENCODER_TVDAC;
2038 connector->connector_type = DRM_MODE_CONNECTOR_SVIDEO;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002039
Chris Wilson4ef69c72010-09-09 15:14:28 +01002040 intel_sdvo->controlled_output |= type;
2041 intel_sdvo_connector->output_flag = type;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002042
Chris Wilson4ef69c72010-09-09 15:14:28 +01002043 intel_sdvo->is_tv = true;
2044 intel_sdvo->base.needs_tv_clock = true;
2045 intel_sdvo->base.clone_mask = 1 << INTEL_SDVO_TV_CLONE_BIT;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002046
Chris Wilsondf0e9242010-09-09 16:20:55 +01002047 intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo);
Zhenyu Wang14571b42010-03-30 14:06:33 +08002048
Chris Wilson4ef69c72010-09-09 15:14:28 +01002049 if (!intel_sdvo_tv_create_property(intel_sdvo, intel_sdvo_connector, type))
Chris Wilson32aad862010-08-04 13:50:25 +01002050 goto err;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002051
Chris Wilson4ef69c72010-09-09 15:14:28 +01002052 if (!intel_sdvo_create_enhance_property(intel_sdvo, intel_sdvo_connector))
Chris Wilson32aad862010-08-04 13:50:25 +01002053 goto err;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002054
Chris Wilson4ef69c72010-09-09 15:14:28 +01002055 return true;
Chris Wilson32aad862010-08-04 13:50:25 +01002056
2057err:
Chris Wilson123d5c02010-09-23 16:15:21 +01002058 intel_sdvo_destroy(connector);
Chris Wilson32aad862010-08-04 13:50:25 +01002059 return false;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002060}
2061
2062static bool
Chris Wilsonea5b2132010-08-04 13:50:23 +01002063intel_sdvo_analog_init(struct intel_sdvo *intel_sdvo, int device)
Zhenyu Wang14571b42010-03-30 14:06:33 +08002064{
Chris Wilson4ef69c72010-09-09 15:14:28 +01002065 struct drm_encoder *encoder = &intel_sdvo->base.base;
2066 struct drm_connector *connector;
2067 struct intel_connector *intel_connector;
2068 struct intel_sdvo_connector *intel_sdvo_connector;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002069
Chris Wilson615fb932010-08-04 13:50:24 +01002070 intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL);
2071 if (!intel_sdvo_connector)
2072 return false;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002073
Chris Wilson615fb932010-08-04 13:50:24 +01002074 intel_connector = &intel_sdvo_connector->base;
2075 connector = &intel_connector->base;
Chris Wilson4ef69c72010-09-09 15:14:28 +01002076 connector->polled = DRM_CONNECTOR_POLL_CONNECT;
2077 encoder->encoder_type = DRM_MODE_ENCODER_DAC;
2078 connector->connector_type = DRM_MODE_CONNECTOR_VGA;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002079
Chris Wilson4ef69c72010-09-09 15:14:28 +01002080 if (device == 0) {
2081 intel_sdvo->controlled_output |= SDVO_OUTPUT_RGB0;
2082 intel_sdvo_connector->output_flag = SDVO_OUTPUT_RGB0;
2083 } else if (device == 1) {
2084 intel_sdvo->controlled_output |= SDVO_OUTPUT_RGB1;
2085 intel_sdvo_connector->output_flag = SDVO_OUTPUT_RGB1;
2086 }
Zhenyu Wang14571b42010-03-30 14:06:33 +08002087
Chris Wilson4ef69c72010-09-09 15:14:28 +01002088 intel_sdvo->base.clone_mask = ((1 << INTEL_SDVO_NON_TV_CLONE_BIT) |
2089 (1 << INTEL_ANALOG_CLONE_BIT));
2090
Chris Wilsondf0e9242010-09-09 16:20:55 +01002091 intel_sdvo_connector_init(intel_sdvo_connector,
2092 intel_sdvo);
Chris Wilson4ef69c72010-09-09 15:14:28 +01002093 return true;
2094}
2095
2096static bool
2097intel_sdvo_lvds_init(struct intel_sdvo *intel_sdvo, int device)
2098{
2099 struct drm_encoder *encoder = &intel_sdvo->base.base;
2100 struct drm_connector *connector;
2101 struct intel_connector *intel_connector;
2102 struct intel_sdvo_connector *intel_sdvo_connector;
2103
2104 intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL);
2105 if (!intel_sdvo_connector)
2106 return false;
2107
2108 intel_connector = &intel_sdvo_connector->base;
2109 connector = &intel_connector->base;
2110 encoder->encoder_type = DRM_MODE_ENCODER_LVDS;
2111 connector->connector_type = DRM_MODE_CONNECTOR_LVDS;
2112
2113 if (device == 0) {
2114 intel_sdvo->controlled_output |= SDVO_OUTPUT_LVDS0;
2115 intel_sdvo_connector->output_flag = SDVO_OUTPUT_LVDS0;
2116 } else if (device == 1) {
2117 intel_sdvo->controlled_output |= SDVO_OUTPUT_LVDS1;
2118 intel_sdvo_connector->output_flag = SDVO_OUTPUT_LVDS1;
2119 }
2120
2121 intel_sdvo->base.clone_mask = ((1 << INTEL_ANALOG_CLONE_BIT) |
Chris Wilsonea5b2132010-08-04 13:50:23 +01002122 (1 << INTEL_SDVO_LVDS_CLONE_BIT));
Zhenyu Wang14571b42010-03-30 14:06:33 +08002123
Chris Wilsondf0e9242010-09-09 16:20:55 +01002124 intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo);
Chris Wilson4ef69c72010-09-09 15:14:28 +01002125 if (!intel_sdvo_create_enhance_property(intel_sdvo, intel_sdvo_connector))
Chris Wilson32aad862010-08-04 13:50:25 +01002126 goto err;
2127
2128 return true;
2129
2130err:
Chris Wilson123d5c02010-09-23 16:15:21 +01002131 intel_sdvo_destroy(connector);
Chris Wilson32aad862010-08-04 13:50:25 +01002132 return false;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002133}
Zhao Yakui6070a4a2010-02-08 21:35:12 +08002134
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002135static bool
Chris Wilsonea5b2132010-08-04 13:50:23 +01002136intel_sdvo_output_setup(struct intel_sdvo *intel_sdvo, uint16_t flags)
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002137{
Chris Wilsonea5b2132010-08-04 13:50:23 +01002138 intel_sdvo->is_tv = false;
2139 intel_sdvo->base.needs_tv_clock = false;
2140 intel_sdvo->is_lvds = false;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002141
Zhenyu Wang14571b42010-03-30 14:06:33 +08002142 /* SDVO requires XXX1 function may not exist unless it has XXX0 function.*/
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002143
Zhenyu Wang14571b42010-03-30 14:06:33 +08002144 if (flags & SDVO_OUTPUT_TMDS0)
Chris Wilsonea5b2132010-08-04 13:50:23 +01002145 if (!intel_sdvo_dvi_init(intel_sdvo, 0))
Zhenyu Wang14571b42010-03-30 14:06:33 +08002146 return false;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002147
Zhenyu Wang14571b42010-03-30 14:06:33 +08002148 if ((flags & SDVO_TMDS_MASK) == SDVO_TMDS_MASK)
Chris Wilsonea5b2132010-08-04 13:50:23 +01002149 if (!intel_sdvo_dvi_init(intel_sdvo, 1))
Zhenyu Wang14571b42010-03-30 14:06:33 +08002150 return false;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002151
Zhenyu Wang14571b42010-03-30 14:06:33 +08002152 /* TV has no XXX1 function block */
Zhenyu Wanga1f4b7ff2010-03-29 23:16:13 +08002153 if (flags & SDVO_OUTPUT_SVID0)
Chris Wilsonea5b2132010-08-04 13:50:23 +01002154 if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_SVID0))
Zhenyu Wang14571b42010-03-30 14:06:33 +08002155 return false;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002156
Zhenyu Wang14571b42010-03-30 14:06:33 +08002157 if (flags & SDVO_OUTPUT_CVBS0)
Chris Wilsonea5b2132010-08-04 13:50:23 +01002158 if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_CVBS0))
Zhenyu Wang14571b42010-03-30 14:06:33 +08002159 return false;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002160
Zhenyu Wang14571b42010-03-30 14:06:33 +08002161 if (flags & SDVO_OUTPUT_RGB0)
Chris Wilsonea5b2132010-08-04 13:50:23 +01002162 if (!intel_sdvo_analog_init(intel_sdvo, 0))
Zhenyu Wang14571b42010-03-30 14:06:33 +08002163 return false;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002164
Zhenyu Wang14571b42010-03-30 14:06:33 +08002165 if ((flags & SDVO_RGB_MASK) == SDVO_RGB_MASK)
Chris Wilsonea5b2132010-08-04 13:50:23 +01002166 if (!intel_sdvo_analog_init(intel_sdvo, 1))
Zhenyu Wang14571b42010-03-30 14:06:33 +08002167 return false;
Zhao Yakui2dd87382010-01-27 16:32:46 +08002168
Zhenyu Wang14571b42010-03-30 14:06:33 +08002169 if (flags & SDVO_OUTPUT_LVDS0)
Chris Wilsonea5b2132010-08-04 13:50:23 +01002170 if (!intel_sdvo_lvds_init(intel_sdvo, 0))
Zhenyu Wang14571b42010-03-30 14:06:33 +08002171 return false;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002172
Zhenyu Wang14571b42010-03-30 14:06:33 +08002173 if ((flags & SDVO_LVDS_MASK) == SDVO_LVDS_MASK)
Chris Wilsonea5b2132010-08-04 13:50:23 +01002174 if (!intel_sdvo_lvds_init(intel_sdvo, 1))
Zhenyu Wang14571b42010-03-30 14:06:33 +08002175 return false;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002176
Zhenyu Wang14571b42010-03-30 14:06:33 +08002177 if ((flags & SDVO_OUTPUT_MASK) == 0) {
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002178 unsigned char bytes[2];
2179
Chris Wilsonea5b2132010-08-04 13:50:23 +01002180 intel_sdvo->controlled_output = 0;
2181 memcpy(bytes, &intel_sdvo->caps.output_flags, 2);
Dave Airlie51c8b402009-08-20 13:38:04 +10002182 DRM_DEBUG_KMS("%s: Unknown SDVO output type (0x%02x%02x)\n",
Chris Wilsonea5b2132010-08-04 13:50:23 +01002183 SDVO_NAME(intel_sdvo),
Dave Airlie51c8b402009-08-20 13:38:04 +10002184 bytes[0], bytes[1]);
Zhenyu Wang14571b42010-03-30 14:06:33 +08002185 return false;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002186 }
Chris Wilsonea5b2132010-08-04 13:50:23 +01002187 intel_sdvo->base.crtc_mask = (1 << 0) | (1 << 1);
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002188
Zhenyu Wang14571b42010-03-30 14:06:33 +08002189 return true;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002190}
2191
Chris Wilson32aad862010-08-04 13:50:25 +01002192static bool intel_sdvo_tv_create_property(struct intel_sdvo *intel_sdvo,
2193 struct intel_sdvo_connector *intel_sdvo_connector,
2194 int type)
Zhao Yakuice6feab2009-08-24 13:50:26 +08002195{
Chris Wilson4ef69c72010-09-09 15:14:28 +01002196 struct drm_device *dev = intel_sdvo->base.base.dev;
Zhao Yakuice6feab2009-08-24 13:50:26 +08002197 struct intel_sdvo_tv_format format;
2198 uint32_t format_map, i;
Zhao Yakuice6feab2009-08-24 13:50:26 +08002199
Chris Wilson32aad862010-08-04 13:50:25 +01002200 if (!intel_sdvo_set_target_output(intel_sdvo, type))
2201 return false;
Zhao Yakuice6feab2009-08-24 13:50:26 +08002202
Chris Wilson32aad862010-08-04 13:50:25 +01002203 if (!intel_sdvo_get_value(intel_sdvo,
2204 SDVO_CMD_GET_SUPPORTED_TV_FORMATS,
2205 &format, sizeof(format)))
2206 return false;
Zhao Yakuice6feab2009-08-24 13:50:26 +08002207
Chris Wilson32aad862010-08-04 13:50:25 +01002208 memcpy(&format_map, &format, min(sizeof(format_map), sizeof(format)));
Zhao Yakuice6feab2009-08-24 13:50:26 +08002209
2210 if (format_map == 0)
Chris Wilson32aad862010-08-04 13:50:25 +01002211 return false;
Zhao Yakuice6feab2009-08-24 13:50:26 +08002212
Chris Wilson615fb932010-08-04 13:50:24 +01002213 intel_sdvo_connector->format_supported_num = 0;
Zhao Yakuice6feab2009-08-24 13:50:26 +08002214 for (i = 0 ; i < TV_FORMAT_NUM; i++)
Chris Wilson40039752010-08-04 13:50:26 +01002215 if (format_map & (1 << i))
2216 intel_sdvo_connector->tv_format_supported[intel_sdvo_connector->format_supported_num++] = i;
Zhao Yakuice6feab2009-08-24 13:50:26 +08002217
2218
Chris Wilsonc5521702010-08-04 13:50:28 +01002219 intel_sdvo_connector->tv_format =
Chris Wilson32aad862010-08-04 13:50:25 +01002220 drm_property_create(dev, DRM_MODE_PROP_ENUM,
2221 "mode", intel_sdvo_connector->format_supported_num);
Chris Wilsonc5521702010-08-04 13:50:28 +01002222 if (!intel_sdvo_connector->tv_format)
Chris Wilsonfcc8d672010-08-04 13:50:27 +01002223 return false;
Zhao Yakuice6feab2009-08-24 13:50:26 +08002224
Chris Wilson615fb932010-08-04 13:50:24 +01002225 for (i = 0; i < intel_sdvo_connector->format_supported_num; i++)
Zhao Yakuice6feab2009-08-24 13:50:26 +08002226 drm_property_add_enum(
Chris Wilsonc5521702010-08-04 13:50:28 +01002227 intel_sdvo_connector->tv_format, i,
Chris Wilson40039752010-08-04 13:50:26 +01002228 i, tv_format_names[intel_sdvo_connector->tv_format_supported[i]]);
Zhao Yakuice6feab2009-08-24 13:50:26 +08002229
Chris Wilson40039752010-08-04 13:50:26 +01002230 intel_sdvo->tv_format_index = intel_sdvo_connector->tv_format_supported[0];
Chris Wilson32aad862010-08-04 13:50:25 +01002231 drm_connector_attach_property(&intel_sdvo_connector->base.base,
Chris Wilsonc5521702010-08-04 13:50:28 +01002232 intel_sdvo_connector->tv_format, 0);
Chris Wilson32aad862010-08-04 13:50:25 +01002233 return true;
Zhao Yakuice6feab2009-08-24 13:50:26 +08002234
2235}
2236
Chris Wilsonc5521702010-08-04 13:50:28 +01002237#define ENHANCEMENT(name, NAME) do { \
2238 if (enhancements.name) { \
2239 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_MAX_##NAME, &data_value, 4) || \
2240 !intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_##NAME, &response, 2)) \
2241 return false; \
2242 intel_sdvo_connector->max_##name = data_value[0]; \
2243 intel_sdvo_connector->cur_##name = response; \
2244 intel_sdvo_connector->name = \
2245 drm_property_create(dev, DRM_MODE_PROP_RANGE, #name, 2); \
2246 if (!intel_sdvo_connector->name) return false; \
2247 intel_sdvo_connector->name->values[0] = 0; \
2248 intel_sdvo_connector->name->values[1] = data_value[0]; \
2249 drm_connector_attach_property(connector, \
2250 intel_sdvo_connector->name, \
2251 intel_sdvo_connector->cur_##name); \
2252 DRM_DEBUG_KMS(#name ": max %d, default %d, current %d\n", \
2253 data_value[0], data_value[1], response); \
2254 } \
2255} while(0)
2256
2257static bool
2258intel_sdvo_create_enhance_property_tv(struct intel_sdvo *intel_sdvo,
2259 struct intel_sdvo_connector *intel_sdvo_connector,
2260 struct intel_sdvo_enhancements_reply enhancements)
Zhao Yakuib9219c52009-09-10 15:45:46 +08002261{
Chris Wilson4ef69c72010-09-09 15:14:28 +01002262 struct drm_device *dev = intel_sdvo->base.base.dev;
Chris Wilson32aad862010-08-04 13:50:25 +01002263 struct drm_connector *connector = &intel_sdvo_connector->base.base;
Zhao Yakuib9219c52009-09-10 15:45:46 +08002264 uint16_t response, data_value[2];
2265
Chris Wilsonc5521702010-08-04 13:50:28 +01002266 /* when horizontal overscan is supported, Add the left/right property */
2267 if (enhancements.overscan_h) {
2268 if (!intel_sdvo_get_value(intel_sdvo,
2269 SDVO_CMD_GET_MAX_OVERSCAN_H,
2270 &data_value, 4))
2271 return false;
2272
2273 if (!intel_sdvo_get_value(intel_sdvo,
2274 SDVO_CMD_GET_OVERSCAN_H,
2275 &response, 2))
2276 return false;
2277
2278 intel_sdvo_connector->max_hscan = data_value[0];
2279 intel_sdvo_connector->left_margin = data_value[0] - response;
2280 intel_sdvo_connector->right_margin = intel_sdvo_connector->left_margin;
2281 intel_sdvo_connector->left =
2282 drm_property_create(dev, DRM_MODE_PROP_RANGE,
2283 "left_margin", 2);
2284 if (!intel_sdvo_connector->left)
2285 return false;
2286
2287 intel_sdvo_connector->left->values[0] = 0;
2288 intel_sdvo_connector->left->values[1] = data_value[0];
2289 drm_connector_attach_property(connector,
2290 intel_sdvo_connector->left,
2291 intel_sdvo_connector->left_margin);
2292
2293 intel_sdvo_connector->right =
2294 drm_property_create(dev, DRM_MODE_PROP_RANGE,
2295 "right_margin", 2);
2296 if (!intel_sdvo_connector->right)
2297 return false;
2298
2299 intel_sdvo_connector->right->values[0] = 0;
2300 intel_sdvo_connector->right->values[1] = data_value[0];
2301 drm_connector_attach_property(connector,
2302 intel_sdvo_connector->right,
2303 intel_sdvo_connector->right_margin);
2304 DRM_DEBUG_KMS("h_overscan: max %d, "
2305 "default %d, current %d\n",
2306 data_value[0], data_value[1], response);
2307 }
2308
2309 if (enhancements.overscan_v) {
2310 if (!intel_sdvo_get_value(intel_sdvo,
2311 SDVO_CMD_GET_MAX_OVERSCAN_V,
2312 &data_value, 4))
2313 return false;
2314
2315 if (!intel_sdvo_get_value(intel_sdvo,
2316 SDVO_CMD_GET_OVERSCAN_V,
2317 &response, 2))
2318 return false;
2319
2320 intel_sdvo_connector->max_vscan = data_value[0];
2321 intel_sdvo_connector->top_margin = data_value[0] - response;
2322 intel_sdvo_connector->bottom_margin = intel_sdvo_connector->top_margin;
2323 intel_sdvo_connector->top =
2324 drm_property_create(dev, DRM_MODE_PROP_RANGE,
2325 "top_margin", 2);
2326 if (!intel_sdvo_connector->top)
2327 return false;
2328
2329 intel_sdvo_connector->top->values[0] = 0;
2330 intel_sdvo_connector->top->values[1] = data_value[0];
2331 drm_connector_attach_property(connector,
2332 intel_sdvo_connector->top,
2333 intel_sdvo_connector->top_margin);
2334
2335 intel_sdvo_connector->bottom =
2336 drm_property_create(dev, DRM_MODE_PROP_RANGE,
2337 "bottom_margin", 2);
2338 if (!intel_sdvo_connector->bottom)
2339 return false;
2340
2341 intel_sdvo_connector->bottom->values[0] = 0;
2342 intel_sdvo_connector->bottom->values[1] = data_value[0];
2343 drm_connector_attach_property(connector,
2344 intel_sdvo_connector->bottom,
2345 intel_sdvo_connector->bottom_margin);
2346 DRM_DEBUG_KMS("v_overscan: max %d, "
2347 "default %d, current %d\n",
2348 data_value[0], data_value[1], response);
2349 }
2350
2351 ENHANCEMENT(hpos, HPOS);
2352 ENHANCEMENT(vpos, VPOS);
2353 ENHANCEMENT(saturation, SATURATION);
2354 ENHANCEMENT(contrast, CONTRAST);
2355 ENHANCEMENT(hue, HUE);
2356 ENHANCEMENT(sharpness, SHARPNESS);
2357 ENHANCEMENT(brightness, BRIGHTNESS);
2358 ENHANCEMENT(flicker_filter, FLICKER_FILTER);
2359 ENHANCEMENT(flicker_filter_adaptive, FLICKER_FILTER_ADAPTIVE);
2360 ENHANCEMENT(flicker_filter_2d, FLICKER_FILTER_2D);
2361 ENHANCEMENT(tv_chroma_filter, TV_CHROMA_FILTER);
2362 ENHANCEMENT(tv_luma_filter, TV_LUMA_FILTER);
2363
Chris Wilsone0442182010-08-04 13:50:29 +01002364 if (enhancements.dot_crawl) {
2365 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_DOT_CRAWL, &response, 2))
2366 return false;
2367
2368 intel_sdvo_connector->max_dot_crawl = 1;
2369 intel_sdvo_connector->cur_dot_crawl = response & 0x1;
2370 intel_sdvo_connector->dot_crawl =
2371 drm_property_create(dev, DRM_MODE_PROP_RANGE, "dot_crawl", 2);
2372 if (!intel_sdvo_connector->dot_crawl)
2373 return false;
2374
2375 intel_sdvo_connector->dot_crawl->values[0] = 0;
2376 intel_sdvo_connector->dot_crawl->values[1] = 1;
2377 drm_connector_attach_property(connector,
2378 intel_sdvo_connector->dot_crawl,
2379 intel_sdvo_connector->cur_dot_crawl);
2380 DRM_DEBUG_KMS("dot crawl: current %d\n", response);
2381 }
2382
Chris Wilsonc5521702010-08-04 13:50:28 +01002383 return true;
2384}
2385
2386static bool
2387intel_sdvo_create_enhance_property_lvds(struct intel_sdvo *intel_sdvo,
2388 struct intel_sdvo_connector *intel_sdvo_connector,
2389 struct intel_sdvo_enhancements_reply enhancements)
2390{
Chris Wilson4ef69c72010-09-09 15:14:28 +01002391 struct drm_device *dev = intel_sdvo->base.base.dev;
Chris Wilsonc5521702010-08-04 13:50:28 +01002392 struct drm_connector *connector = &intel_sdvo_connector->base.base;
2393 uint16_t response, data_value[2];
2394
2395 ENHANCEMENT(brightness, BRIGHTNESS);
2396
2397 return true;
2398}
2399#undef ENHANCEMENT
2400
2401static bool intel_sdvo_create_enhance_property(struct intel_sdvo *intel_sdvo,
2402 struct intel_sdvo_connector *intel_sdvo_connector)
2403{
2404 union {
2405 struct intel_sdvo_enhancements_reply reply;
2406 uint16_t response;
2407 } enhancements;
2408
Chris Wilsoncf9a2f32010-09-23 16:17:33 +01002409 enhancements.response = 0;
2410 intel_sdvo_get_value(intel_sdvo,
2411 SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS,
2412 &enhancements, sizeof(enhancements));
Chris Wilsonc5521702010-08-04 13:50:28 +01002413 if (enhancements.response == 0) {
Zhao Yakuib9219c52009-09-10 15:45:46 +08002414 DRM_DEBUG_KMS("No enhancement is supported\n");
Chris Wilson32aad862010-08-04 13:50:25 +01002415 return true;
Zhao Yakuib9219c52009-09-10 15:45:46 +08002416 }
Chris Wilson32aad862010-08-04 13:50:25 +01002417
Chris Wilsonc5521702010-08-04 13:50:28 +01002418 if (IS_TV(intel_sdvo_connector))
2419 return intel_sdvo_create_enhance_property_tv(intel_sdvo, intel_sdvo_connector, enhancements.reply);
2420 else if(IS_LVDS(intel_sdvo_connector))
2421 return intel_sdvo_create_enhance_property_lvds(intel_sdvo, intel_sdvo_connector, enhancements.reply);
2422 else
2423 return true;
Chris Wilsone957d772010-09-24 12:52:03 +01002424}
Chris Wilson32aad862010-08-04 13:50:25 +01002425
Chris Wilsone957d772010-09-24 12:52:03 +01002426static int intel_sdvo_ddc_proxy_xfer(struct i2c_adapter *adapter,
2427 struct i2c_msg *msgs,
2428 int num)
2429{
2430 struct intel_sdvo *sdvo = adapter->algo_data;
2431
2432 if (!intel_sdvo_set_control_bus_switch(sdvo, sdvo->ddc_bus))
2433 return -EIO;
2434
2435 return sdvo->i2c->algo->master_xfer(sdvo->i2c, msgs, num);
2436}
2437
2438static u32 intel_sdvo_ddc_proxy_func(struct i2c_adapter *adapter)
2439{
2440 struct intel_sdvo *sdvo = adapter->algo_data;
2441 return sdvo->i2c->algo->functionality(sdvo->i2c);
2442}
2443
2444static const struct i2c_algorithm intel_sdvo_ddc_proxy = {
2445 .master_xfer = intel_sdvo_ddc_proxy_xfer,
2446 .functionality = intel_sdvo_ddc_proxy_func
2447};
2448
2449static bool
2450intel_sdvo_init_ddc_proxy(struct intel_sdvo *sdvo,
2451 struct drm_device *dev)
2452{
2453 sdvo->ddc.owner = THIS_MODULE;
2454 sdvo->ddc.class = I2C_CLASS_DDC;
2455 snprintf(sdvo->ddc.name, I2C_NAME_SIZE, "SDVO DDC proxy");
2456 sdvo->ddc.dev.parent = &dev->pdev->dev;
2457 sdvo->ddc.algo_data = sdvo;
2458 sdvo->ddc.algo = &intel_sdvo_ddc_proxy;
2459
2460 return i2c_add_adapter(&sdvo->ddc) == 0;
Zhao Yakuib9219c52009-09-10 15:45:46 +08002461}
2462
Eric Anholtc751ce42010-03-25 11:48:48 -07002463bool intel_sdvo_init(struct drm_device *dev, int sdvo_reg)
Jesse Barnes79e53942008-11-07 14:24:08 -08002464{
Jesse Barnesb01f2c32009-12-11 11:07:17 -08002465 struct drm_i915_private *dev_priv = dev->dev_private;
Eric Anholt21d40d32010-03-25 11:11:14 -07002466 struct intel_encoder *intel_encoder;
Chris Wilsonea5b2132010-08-04 13:50:23 +01002467 struct intel_sdvo *intel_sdvo;
Jesse Barnes79e53942008-11-07 14:24:08 -08002468 int i;
Jesse Barnes79e53942008-11-07 14:24:08 -08002469
Chris Wilsonea5b2132010-08-04 13:50:23 +01002470 intel_sdvo = kzalloc(sizeof(struct intel_sdvo), GFP_KERNEL);
2471 if (!intel_sdvo)
Eric Anholt7d573822009-01-02 13:33:00 -08002472 return false;
Jesse Barnes79e53942008-11-07 14:24:08 -08002473
Chris Wilsone957d772010-09-24 12:52:03 +01002474 if (!intel_sdvo_init_ddc_proxy(intel_sdvo, dev)) {
2475 kfree(intel_sdvo);
2476 return false;
2477 }
2478
Chris Wilsonea5b2132010-08-04 13:50:23 +01002479 intel_sdvo->sdvo_reg = sdvo_reg;
Keith Packard308cd3a2009-06-14 11:56:18 -07002480
Chris Wilsonea5b2132010-08-04 13:50:23 +01002481 intel_encoder = &intel_sdvo->base;
Eric Anholt21d40d32010-03-25 11:11:14 -07002482 intel_encoder->type = INTEL_OUTPUT_SDVO;
Chris Wilson373a3cf2010-09-15 12:03:59 +01002483 /* encoder type will be decided later */
2484 drm_encoder_init(dev, &intel_encoder->base, &intel_sdvo_enc_funcs, 0);
Jesse Barnes79e53942008-11-07 14:24:08 -08002485
Chris Wilsone957d772010-09-24 12:52:03 +01002486 intel_sdvo->slave_addr = intel_sdvo_get_slave_addr(dev, sdvo_reg) >> 1;
2487 intel_sdvo_select_i2c_bus(dev_priv, intel_sdvo, sdvo_reg);
Jesse Barnes79e53942008-11-07 14:24:08 -08002488
Jesse Barnes79e53942008-11-07 14:24:08 -08002489 /* Read the regs to test if we can talk to the device */
2490 for (i = 0; i < 0x40; i++) {
Chris Wilsonf899fc62010-07-20 15:44:45 -07002491 u8 byte;
2492
2493 if (!intel_sdvo_read_byte(intel_sdvo, i, &byte)) {
Zhao Yakui8a4c47f2009-07-20 13:48:04 +08002494 DRM_DEBUG_KMS("No SDVO device found on SDVO%c\n",
Zhao Yakui461ed3c2010-03-30 15:11:33 +08002495 IS_SDVOB(sdvo_reg) ? 'B' : 'C');
Chris Wilsonf899fc62010-07-20 15:44:45 -07002496 goto err;
Jesse Barnes79e53942008-11-07 14:24:08 -08002497 }
2498 }
2499
Chris Wilsonf899fc62010-07-20 15:44:45 -07002500 if (IS_SDVOB(sdvo_reg))
Jesse Barnesb01f2c32009-12-11 11:07:17 -08002501 dev_priv->hotplug_supported_mask |= SDVOB_HOTPLUG_INT_STATUS;
Chris Wilsonf899fc62010-07-20 15:44:45 -07002502 else
Jesse Barnesb01f2c32009-12-11 11:07:17 -08002503 dev_priv->hotplug_supported_mask |= SDVOC_HOTPLUG_INT_STATUS;
Ma Ling619ac3b2009-05-18 16:12:46 +08002504
Chris Wilson4ef69c72010-09-09 15:14:28 +01002505 drm_encoder_helper_add(&intel_encoder->base, &intel_sdvo_helper_funcs);
Zhenyu Wang14571b42010-03-30 14:06:33 +08002506
André Goddard Rosaaf901ca2009-11-14 13:09:05 -02002507 /* In default case sdvo lvds is false */
Chris Wilson32aad862010-08-04 13:50:25 +01002508 if (!intel_sdvo_get_capabilities(intel_sdvo, &intel_sdvo->caps))
Chris Wilsonf899fc62010-07-20 15:44:45 -07002509 goto err;
Jesse Barnes79e53942008-11-07 14:24:08 -08002510
Chris Wilsonea5b2132010-08-04 13:50:23 +01002511 if (intel_sdvo_output_setup(intel_sdvo,
2512 intel_sdvo->caps.output_flags) != true) {
Dave Airlie51c8b402009-08-20 13:38:04 +10002513 DRM_DEBUG_KMS("SDVO output failed to setup on SDVO%c\n",
Zhao Yakui461ed3c2010-03-30 15:11:33 +08002514 IS_SDVOB(sdvo_reg) ? 'B' : 'C');
Chris Wilsonf899fc62010-07-20 15:44:45 -07002515 goto err;
Jesse Barnes79e53942008-11-07 14:24:08 -08002516 }
2517
Chris Wilsonea5b2132010-08-04 13:50:23 +01002518 intel_sdvo_select_ddc_bus(dev_priv, intel_sdvo, sdvo_reg);
Jesse Barnese2f0ba92009-02-02 15:11:52 -08002519
Jesse Barnes79e53942008-11-07 14:24:08 -08002520 /* Set the input timing to the screen. Assume always input 0. */
Chris Wilson32aad862010-08-04 13:50:25 +01002521 if (!intel_sdvo_set_target_input(intel_sdvo))
Chris Wilsonf899fc62010-07-20 15:44:45 -07002522 goto err;
Jesse Barnes79e53942008-11-07 14:24:08 -08002523
Chris Wilson32aad862010-08-04 13:50:25 +01002524 if (!intel_sdvo_get_input_pixel_clock_range(intel_sdvo,
2525 &intel_sdvo->pixel_clock_min,
2526 &intel_sdvo->pixel_clock_max))
Chris Wilsonf899fc62010-07-20 15:44:45 -07002527 goto err;
Jesse Barnes79e53942008-11-07 14:24:08 -08002528
Zhao Yakui8a4c47f2009-07-20 13:48:04 +08002529 DRM_DEBUG_KMS("%s device VID/DID: %02X:%02X.%02X, "
yakui_zhao342dc382009-06-02 14:12:00 +08002530 "clock range %dMHz - %dMHz, "
2531 "input 1: %c, input 2: %c, "
2532 "output 1: %c, output 2: %c\n",
Chris Wilsonea5b2132010-08-04 13:50:23 +01002533 SDVO_NAME(intel_sdvo),
2534 intel_sdvo->caps.vendor_id, intel_sdvo->caps.device_id,
2535 intel_sdvo->caps.device_rev_id,
2536 intel_sdvo->pixel_clock_min / 1000,
2537 intel_sdvo->pixel_clock_max / 1000,
2538 (intel_sdvo->caps.sdvo_inputs_mask & 0x1) ? 'Y' : 'N',
2539 (intel_sdvo->caps.sdvo_inputs_mask & 0x2) ? 'Y' : 'N',
yakui_zhao342dc382009-06-02 14:12:00 +08002540 /* check currently supported outputs */
Chris Wilsonea5b2132010-08-04 13:50:23 +01002541 intel_sdvo->caps.output_flags &
Jesse Barnes79e53942008-11-07 14:24:08 -08002542 (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_RGB0) ? 'Y' : 'N',
Chris Wilsonea5b2132010-08-04 13:50:23 +01002543 intel_sdvo->caps.output_flags &
Jesse Barnes79e53942008-11-07 14:24:08 -08002544 (SDVO_OUTPUT_TMDS1 | SDVO_OUTPUT_RGB1) ? 'Y' : 'N');
Eric Anholt7d573822009-01-02 13:33:00 -08002545 return true;
Jesse Barnes79e53942008-11-07 14:24:08 -08002546
Chris Wilsonf899fc62010-07-20 15:44:45 -07002547err:
Chris Wilson373a3cf2010-09-15 12:03:59 +01002548 drm_encoder_cleanup(&intel_encoder->base);
Chris Wilsone957d772010-09-24 12:52:03 +01002549 i2c_del_adapter(&intel_sdvo->ddc);
Chris Wilsonea5b2132010-08-04 13:50:23 +01002550 kfree(intel_sdvo);
Jesse Barnes79e53942008-11-07 14:24:08 -08002551
Eric Anholt7d573822009-01-02 13:33:00 -08002552 return false;
Jesse Barnes79e53942008-11-07 14:24:08 -08002553}