Ron Rindjunsky | 1053d35 | 2008-05-05 10:22:43 +0800 | [diff] [blame] | 1 | /****************************************************************************** |
| 2 | * |
Wey-Yi Guy | fb4961d | 2012-01-06 13:16:33 -0800 | [diff] [blame] | 3 | * Copyright(c) 2003 - 2012 Intel Corporation. All rights reserved. |
Ron Rindjunsky | 1053d35 | 2008-05-05 10:22:43 +0800 | [diff] [blame] | 4 | * |
| 5 | * Portions of this file are derived from the ipw3945 project, as well |
| 6 | * as portions of the ieee80211 subsystem header files. |
| 7 | * |
| 8 | * This program is free software; you can redistribute it and/or modify it |
| 9 | * under the terms of version 2 of the GNU General Public License as |
| 10 | * published by the Free Software Foundation. |
| 11 | * |
| 12 | * This program is distributed in the hope that it will be useful, but WITHOUT |
| 13 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or |
| 14 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for |
| 15 | * more details. |
| 16 | * |
| 17 | * You should have received a copy of the GNU General Public License along with |
| 18 | * this program; if not, write to the Free Software Foundation, Inc., |
| 19 | * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA |
| 20 | * |
| 21 | * The full GNU General Public License is included in this distribution in the |
| 22 | * file called LICENSE. |
| 23 | * |
| 24 | * Contact Information: |
Winkler, Tomas | 759ef89 | 2008-12-09 11:28:58 -0800 | [diff] [blame] | 25 | * Intel Linux Wireless <ilw@linux.intel.com> |
Ron Rindjunsky | 1053d35 | 2008-05-05 10:22:43 +0800 | [diff] [blame] | 26 | * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 |
| 27 | * |
| 28 | *****************************************************************************/ |
Tomas Winkler | fd4abac | 2008-05-15 13:54:07 +0800 | [diff] [blame] | 29 | #include <linux/etherdevice.h> |
Tejun Heo | 5a0e3ad | 2010-03-24 17:04:11 +0900 | [diff] [blame] | 30 | #include <linux/slab.h> |
Emmanuel Grumbach | 253a634 | 2011-07-11 07:39:46 -0700 | [diff] [blame] | 31 | #include <linux/sched.h> |
Emmanuel Grumbach | 253a634 | 2011-07-11 07:39:46 -0700 | [diff] [blame] | 32 | |
Emmanuel Grumbach | 522376d | 2011-09-06 09:31:19 -0700 | [diff] [blame] | 33 | #include "iwl-debug.h" |
| 34 | #include "iwl-csr.h" |
| 35 | #include "iwl-prph.h" |
Ron Rindjunsky | 1053d35 | 2008-05-05 10:22:43 +0800 | [diff] [blame] | 36 | #include "iwl-io.h" |
Emmanuel Grumbach | ed277c9 | 2012-02-09 16:08:15 +0200 | [diff] [blame] | 37 | #include "iwl-op-mode.h" |
Johannes Berg | 6468a01 | 2012-05-16 19:13:54 +0200 | [diff] [blame] | 38 | #include "internal.h" |
Johannes Berg | 6238b00 | 2012-04-02 15:04:33 +0200 | [diff] [blame] | 39 | /* FIXME: need to abstract out TX command (once we know what it looks like) */ |
Johannes Berg | 1023fdc | 2012-05-15 12:16:34 +0200 | [diff] [blame] | 40 | #include "dvm/commands.h" |
Ron Rindjunsky | 1053d35 | 2008-05-05 10:22:43 +0800 | [diff] [blame] | 41 | |
Emmanuel Grumbach | 522376d | 2011-09-06 09:31:19 -0700 | [diff] [blame] | 42 | #define IWL_TX_CRC_SIZE 4 |
| 43 | #define IWL_TX_DELIMITER_SIZE 4 |
| 44 | |
Emmanuel Grumbach | 48d42c4 | 2011-07-10 10:47:01 +0300 | [diff] [blame] | 45 | /** |
| 46 | * iwl_trans_txq_update_byte_cnt_tbl - Set up entry in Tx byte-count array |
| 47 | */ |
Emmanuel Grumbach | 6d8f6ee | 2011-08-25 23:11:06 -0700 | [diff] [blame] | 48 | void iwl_trans_txq_update_byte_cnt_tbl(struct iwl_trans *trans, |
Johannes Berg | 20d3b64 | 2012-05-16 22:54:29 +0200 | [diff] [blame] | 49 | struct iwl_tx_queue *txq, |
| 50 | u16 byte_cnt) |
Emmanuel Grumbach | 48d42c4 | 2011-07-10 10:47:01 +0300 | [diff] [blame] | 51 | { |
Emmanuel Grumbach | 105183b | 2011-08-25 23:11:02 -0700 | [diff] [blame] | 52 | struct iwlagn_scd_bc_tbl *scd_bc_tbl; |
Johannes Berg | 20d3b64 | 2012-05-16 22:54:29 +0200 | [diff] [blame] | 53 | struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans); |
Emmanuel Grumbach | 48d42c4 | 2011-07-10 10:47:01 +0300 | [diff] [blame] | 54 | int write_ptr = txq->q.write_ptr; |
| 55 | int txq_id = txq->q.id; |
| 56 | u8 sec_ctl = 0; |
| 57 | u8 sta_id = 0; |
| 58 | u16 len = byte_cnt + IWL_TX_CRC_SIZE + IWL_TX_DELIMITER_SIZE; |
| 59 | __le16 bc_ent; |
Emmanuel Grumbach | 132f98c | 2011-09-20 15:37:24 -0700 | [diff] [blame] | 60 | struct iwl_tx_cmd *tx_cmd = |
Johannes Berg | bf8440e | 2012-03-19 17:12:06 +0100 | [diff] [blame] | 61 | (void *) txq->entries[txq->q.write_ptr].cmd->payload; |
Emmanuel Grumbach | 48d42c4 | 2011-07-10 10:47:01 +0300 | [diff] [blame] | 62 | |
Emmanuel Grumbach | 105183b | 2011-08-25 23:11:02 -0700 | [diff] [blame] | 63 | scd_bc_tbl = trans_pcie->scd_bc_tbls.addr; |
| 64 | |
Emmanuel Grumbach | 48d42c4 | 2011-07-10 10:47:01 +0300 | [diff] [blame] | 65 | WARN_ON(len > 0xFFF || write_ptr >= TFD_QUEUE_SIZE_MAX); |
| 66 | |
Emmanuel Grumbach | 132f98c | 2011-09-20 15:37:24 -0700 | [diff] [blame] | 67 | sta_id = tx_cmd->sta_id; |
| 68 | sec_ctl = tx_cmd->sec_ctl; |
Emmanuel Grumbach | 48d42c4 | 2011-07-10 10:47:01 +0300 | [diff] [blame] | 69 | |
| 70 | switch (sec_ctl & TX_CMD_SEC_MSK) { |
| 71 | case TX_CMD_SEC_CCM: |
| 72 | len += CCMP_MIC_LEN; |
| 73 | break; |
| 74 | case TX_CMD_SEC_TKIP: |
| 75 | len += TKIP_ICV_LEN; |
| 76 | break; |
| 77 | case TX_CMD_SEC_WEP: |
| 78 | len += WEP_IV_LEN + WEP_ICV_LEN; |
| 79 | break; |
| 80 | } |
| 81 | |
| 82 | bc_ent = cpu_to_le16((len & 0xFFF) | (sta_id << 12)); |
| 83 | |
| 84 | scd_bc_tbl[txq_id].tfd_offset[write_ptr] = bc_ent; |
| 85 | |
| 86 | if (write_ptr < TFD_QUEUE_SIZE_BC_DUP) |
| 87 | scd_bc_tbl[txq_id]. |
| 88 | tfd_offset[TFD_QUEUE_SIZE_MAX + write_ptr] = bc_ent; |
| 89 | } |
| 90 | |
Tomas Winkler | fd4abac | 2008-05-15 13:54:07 +0800 | [diff] [blame] | 91 | /** |
| 92 | * iwl_txq_update_write_ptr - Send new write index to hardware |
| 93 | */ |
Emmanuel Grumbach | fd65693 | 2011-08-25 23:11:19 -0700 | [diff] [blame] | 94 | void iwl_txq_update_write_ptr(struct iwl_trans *trans, struct iwl_tx_queue *txq) |
Tomas Winkler | fd4abac | 2008-05-15 13:54:07 +0800 | [diff] [blame] | 95 | { |
| 96 | u32 reg = 0; |
Tomas Winkler | fd4abac | 2008-05-15 13:54:07 +0800 | [diff] [blame] | 97 | int txq_id = txq->q.id; |
| 98 | |
| 99 | if (txq->need_update == 0) |
Abhijeet Kolekar | 7bfedc5 | 2010-02-03 13:47:56 -0800 | [diff] [blame] | 100 | return; |
Tomas Winkler | fd4abac | 2008-05-15 13:54:07 +0800 | [diff] [blame] | 101 | |
Emmanuel Grumbach | 035f7ff | 2012-03-26 08:57:01 -0700 | [diff] [blame] | 102 | if (trans->cfg->base_params->shadow_reg_enable) { |
Wey-Yi Guy | f81c1f4 | 2010-11-10 09:56:50 -0800 | [diff] [blame] | 103 | /* shadow register enabled */ |
Emmanuel Grumbach | 1042db2 | 2012-01-03 16:56:15 +0200 | [diff] [blame] | 104 | iwl_write32(trans, HBUS_TARG_WRPTR, |
Tomas Winkler | fd4abac | 2008-05-15 13:54:07 +0800 | [diff] [blame] | 105 | txq->q.write_ptr | (txq_id << 8)); |
Wey-Yi Guy | f81c1f4 | 2010-11-10 09:56:50 -0800 | [diff] [blame] | 106 | } else { |
Don Fry | 47107e8 | 2012-03-15 13:27:06 -0700 | [diff] [blame] | 107 | struct iwl_trans_pcie *trans_pcie = |
| 108 | IWL_TRANS_GET_PCIE_TRANS(trans); |
Wey-Yi Guy | f81c1f4 | 2010-11-10 09:56:50 -0800 | [diff] [blame] | 109 | /* if we're trying to save power */ |
Don Fry | 01d651d | 2012-03-23 08:34:31 -0700 | [diff] [blame] | 110 | if (test_bit(STATUS_TPOWER_PMI, &trans_pcie->status)) { |
Wey-Yi Guy | f81c1f4 | 2010-11-10 09:56:50 -0800 | [diff] [blame] | 111 | /* wake up nic if it's powered down ... |
| 112 | * uCode will wake up, and interrupt us again, so next |
| 113 | * time we'll skip this part. */ |
Emmanuel Grumbach | 1042db2 | 2012-01-03 16:56:15 +0200 | [diff] [blame] | 114 | reg = iwl_read32(trans, CSR_UCODE_DRV_GP1); |
Tomas Winkler | fd4abac | 2008-05-15 13:54:07 +0800 | [diff] [blame] | 115 | |
Wey-Yi Guy | f81c1f4 | 2010-11-10 09:56:50 -0800 | [diff] [blame] | 116 | if (reg & CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP) { |
Emmanuel Grumbach | fd65693 | 2011-08-25 23:11:19 -0700 | [diff] [blame] | 117 | IWL_DEBUG_INFO(trans, |
Wey-Yi Guy | f81c1f4 | 2010-11-10 09:56:50 -0800 | [diff] [blame] | 118 | "Tx queue %d requesting wakeup," |
| 119 | " GP1 = 0x%x\n", txq_id, reg); |
Emmanuel Grumbach | 1042db2 | 2012-01-03 16:56:15 +0200 | [diff] [blame] | 120 | iwl_set_bit(trans, CSR_GP_CNTRL, |
Wey-Yi Guy | f81c1f4 | 2010-11-10 09:56:50 -0800 | [diff] [blame] | 121 | CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ); |
| 122 | return; |
| 123 | } |
| 124 | |
Emmanuel Grumbach | 1042db2 | 2012-01-03 16:56:15 +0200 | [diff] [blame] | 125 | iwl_write_direct32(trans, HBUS_TARG_WRPTR, |
Wey-Yi Guy | f81c1f4 | 2010-11-10 09:56:50 -0800 | [diff] [blame] | 126 | txq->q.write_ptr | (txq_id << 8)); |
| 127 | |
| 128 | /* |
| 129 | * else not in power-save mode, |
| 130 | * uCode will never sleep when we're |
| 131 | * trying to tx (during RFKILL, we're not trying to tx). |
| 132 | */ |
| 133 | } else |
Emmanuel Grumbach | 1042db2 | 2012-01-03 16:56:15 +0200 | [diff] [blame] | 134 | iwl_write32(trans, HBUS_TARG_WRPTR, |
Wey-Yi Guy | f81c1f4 | 2010-11-10 09:56:50 -0800 | [diff] [blame] | 135 | txq->q.write_ptr | (txq_id << 8)); |
| 136 | } |
Tomas Winkler | fd4abac | 2008-05-15 13:54:07 +0800 | [diff] [blame] | 137 | txq->need_update = 0; |
Tomas Winkler | fd4abac | 2008-05-15 13:54:07 +0800 | [diff] [blame] | 138 | } |
Tomas Winkler | fd4abac | 2008-05-15 13:54:07 +0800 | [diff] [blame] | 139 | |
Johannes Berg | 214d14d | 2011-05-04 07:50:44 -0700 | [diff] [blame] | 140 | static inline dma_addr_t iwl_tfd_tb_get_addr(struct iwl_tfd *tfd, u8 idx) |
| 141 | { |
| 142 | struct iwl_tfd_tb *tb = &tfd->tbs[idx]; |
| 143 | |
| 144 | dma_addr_t addr = get_unaligned_le32(&tb->lo); |
| 145 | if (sizeof(dma_addr_t) > sizeof(u32)) |
| 146 | addr |= |
| 147 | ((dma_addr_t)(le16_to_cpu(tb->hi_n_len) & 0xF) << 16) << 16; |
| 148 | |
| 149 | return addr; |
| 150 | } |
| 151 | |
| 152 | static inline u16 iwl_tfd_tb_get_len(struct iwl_tfd *tfd, u8 idx) |
| 153 | { |
| 154 | struct iwl_tfd_tb *tb = &tfd->tbs[idx]; |
| 155 | |
| 156 | return le16_to_cpu(tb->hi_n_len) >> 4; |
| 157 | } |
| 158 | |
| 159 | static inline void iwl_tfd_set_tb(struct iwl_tfd *tfd, u8 idx, |
| 160 | dma_addr_t addr, u16 len) |
| 161 | { |
| 162 | struct iwl_tfd_tb *tb = &tfd->tbs[idx]; |
| 163 | u16 hi_n_len = len << 4; |
| 164 | |
| 165 | put_unaligned_le32(addr, &tb->lo); |
| 166 | if (sizeof(dma_addr_t) > sizeof(u32)) |
| 167 | hi_n_len |= ((addr >> 16) >> 16) & 0xF; |
| 168 | |
| 169 | tb->hi_n_len = cpu_to_le16(hi_n_len); |
| 170 | |
| 171 | tfd->num_tbs = idx + 1; |
| 172 | } |
| 173 | |
| 174 | static inline u8 iwl_tfd_get_num_tbs(struct iwl_tfd *tfd) |
| 175 | { |
| 176 | return tfd->num_tbs & 0x1f; |
| 177 | } |
| 178 | |
Emmanuel Grumbach | eec373f | 2012-05-16 22:54:23 +0200 | [diff] [blame] | 179 | static void iwl_unmap_tfd(struct iwl_trans *trans, struct iwl_cmd_meta *meta, |
| 180 | struct iwl_tfd *tfd, enum dma_data_direction dma_dir) |
Johannes Berg | 214d14d | 2011-05-04 07:50:44 -0700 | [diff] [blame] | 181 | { |
Johannes Berg | 214d14d | 2011-05-04 07:50:44 -0700 | [diff] [blame] | 182 | int i; |
| 183 | int num_tbs; |
| 184 | |
Johannes Berg | 214d14d | 2011-05-04 07:50:44 -0700 | [diff] [blame] | 185 | /* Sanity check on number of chunks */ |
| 186 | num_tbs = iwl_tfd_get_num_tbs(tfd); |
| 187 | |
| 188 | if (num_tbs >= IWL_NUM_OF_TBS) { |
Emmanuel Grumbach | 6d8f6ee | 2011-08-25 23:11:06 -0700 | [diff] [blame] | 189 | IWL_ERR(trans, "Too many chunks: %i\n", num_tbs); |
Johannes Berg | 214d14d | 2011-05-04 07:50:44 -0700 | [diff] [blame] | 190 | /* @todo issue fatal error, it is quite serious situation */ |
| 191 | return; |
| 192 | } |
| 193 | |
| 194 | /* Unmap tx_cmd */ |
| 195 | if (num_tbs) |
Emmanuel Grumbach | 1042db2 | 2012-01-03 16:56:15 +0200 | [diff] [blame] | 196 | dma_unmap_single(trans->dev, |
Johannes Berg | 4ce7cc2 | 2011-05-13 11:57:40 -0700 | [diff] [blame] | 197 | dma_unmap_addr(meta, mapping), |
| 198 | dma_unmap_len(meta, len), |
Emmanuel Grumbach | 795414d | 2011-06-18 08:12:57 -0700 | [diff] [blame] | 199 | DMA_BIDIRECTIONAL); |
Johannes Berg | 214d14d | 2011-05-04 07:50:44 -0700 | [diff] [blame] | 200 | |
| 201 | /* Unmap chunks, if any. */ |
| 202 | for (i = 1; i < num_tbs; i++) |
Emmanuel Grumbach | 1042db2 | 2012-01-03 16:56:15 +0200 | [diff] [blame] | 203 | dma_unmap_single(trans->dev, iwl_tfd_tb_get_addr(tfd, i), |
Johannes Berg | e815407 | 2011-06-27 07:54:49 -0700 | [diff] [blame] | 204 | iwl_tfd_tb_get_len(tfd, i), dma_dir); |
Emmanuel Grumbach | ebed633 | 2012-05-16 22:35:58 +0200 | [diff] [blame] | 205 | |
| 206 | tfd->num_tbs = 0; |
Johannes Berg | 4ce7cc2 | 2011-05-13 11:57:40 -0700 | [diff] [blame] | 207 | } |
| 208 | |
| 209 | /** |
Emmanuel Grumbach | bc2529c | 2012-05-16 22:54:22 +0200 | [diff] [blame] | 210 | * iwl_txq_free_tfd - Free all chunks referenced by TFD [txq->q.read_ptr] |
Emmanuel Grumbach | 6d8f6ee | 2011-08-25 23:11:06 -0700 | [diff] [blame] | 211 | * @trans - transport private data |
Johannes Berg | 4ce7cc2 | 2011-05-13 11:57:40 -0700 | [diff] [blame] | 212 | * @txq - tx queue |
Emmanuel Grumbach | ebed633 | 2012-05-16 22:35:58 +0200 | [diff] [blame] | 213 | * @dma_dir - the direction of the DMA mapping |
Johannes Berg | 4ce7cc2 | 2011-05-13 11:57:40 -0700 | [diff] [blame] | 214 | * |
| 215 | * Does NOT advance any TFD circular buffer read/write indexes |
| 216 | * Does NOT free the TFD itself (which is within circular buffer) |
| 217 | */ |
Emmanuel Grumbach | bc2529c | 2012-05-16 22:54:22 +0200 | [diff] [blame] | 218 | void iwl_txq_free_tfd(struct iwl_trans *trans, struct iwl_tx_queue *txq, |
| 219 | enum dma_data_direction dma_dir) |
Johannes Berg | 4ce7cc2 | 2011-05-13 11:57:40 -0700 | [diff] [blame] | 220 | { |
| 221 | struct iwl_tfd *tfd_tmp = txq->tfds; |
Johannes Berg | 4ce7cc2 | 2011-05-13 11:57:40 -0700 | [diff] [blame] | 222 | |
Emmanuel Grumbach | ebed633 | 2012-05-16 22:35:58 +0200 | [diff] [blame] | 223 | /* rd_ptr is bounded by n_bd and idx is bounded by n_window */ |
| 224 | int rd_ptr = txq->q.read_ptr; |
| 225 | int idx = get_cmd_index(&txq->q, rd_ptr); |
| 226 | |
Johannes Berg | 015c15e | 2012-03-05 11:24:24 -0800 | [diff] [blame] | 227 | lockdep_assert_held(&txq->lock); |
| 228 | |
Emmanuel Grumbach | ebed633 | 2012-05-16 22:35:58 +0200 | [diff] [blame] | 229 | /* We have only q->n_window txq->entries, but we use q->n_bd tfds */ |
Emmanuel Grumbach | eec373f | 2012-05-16 22:54:23 +0200 | [diff] [blame] | 230 | iwl_unmap_tfd(trans, &txq->entries[idx].meta, &tfd_tmp[rd_ptr], |
| 231 | dma_dir); |
Johannes Berg | 214d14d | 2011-05-04 07:50:44 -0700 | [diff] [blame] | 232 | |
| 233 | /* free SKB */ |
Johannes Berg | bf8440e | 2012-03-19 17:12:06 +0100 | [diff] [blame] | 234 | if (txq->entries) { |
Johannes Berg | 214d14d | 2011-05-04 07:50:44 -0700 | [diff] [blame] | 235 | struct sk_buff *skb; |
| 236 | |
Emmanuel Grumbach | ebed633 | 2012-05-16 22:35:58 +0200 | [diff] [blame] | 237 | skb = txq->entries[idx].skb; |
Johannes Berg | 214d14d | 2011-05-04 07:50:44 -0700 | [diff] [blame] | 238 | |
Emmanuel Grumbach | 909e9b2 | 2011-09-15 11:46:30 -0700 | [diff] [blame] | 239 | /* Can be called from irqs-disabled context |
| 240 | * If skb is not NULL, it means that the whole queue is being |
| 241 | * freed and that the queue is not empty - free the skb |
| 242 | */ |
Johannes Berg | 214d14d | 2011-05-04 07:50:44 -0700 | [diff] [blame] | 243 | if (skb) { |
Emmanuel Grumbach | ed277c9 | 2012-02-09 16:08:15 +0200 | [diff] [blame] | 244 | iwl_op_mode_free_skb(trans->op_mode, skb); |
Emmanuel Grumbach | ebed633 | 2012-05-16 22:35:58 +0200 | [diff] [blame] | 245 | txq->entries[idx].skb = NULL; |
Johannes Berg | 214d14d | 2011-05-04 07:50:44 -0700 | [diff] [blame] | 246 | } |
| 247 | } |
| 248 | } |
| 249 | |
Emmanuel Grumbach | 6d8f6ee | 2011-08-25 23:11:06 -0700 | [diff] [blame] | 250 | int iwlagn_txq_attach_buf_to_tfd(struct iwl_trans *trans, |
Johannes Berg | 214d14d | 2011-05-04 07:50:44 -0700 | [diff] [blame] | 251 | struct iwl_tx_queue *txq, |
| 252 | dma_addr_t addr, u16 len, |
Johannes Berg | 4c42db0 | 2011-05-04 07:50:48 -0700 | [diff] [blame] | 253 | u8 reset) |
Johannes Berg | 214d14d | 2011-05-04 07:50:44 -0700 | [diff] [blame] | 254 | { |
| 255 | struct iwl_queue *q; |
| 256 | struct iwl_tfd *tfd, *tfd_tmp; |
| 257 | u32 num_tbs; |
| 258 | |
| 259 | q = &txq->q; |
Johannes Berg | 4ce7cc2 | 2011-05-13 11:57:40 -0700 | [diff] [blame] | 260 | tfd_tmp = txq->tfds; |
Johannes Berg | 214d14d | 2011-05-04 07:50:44 -0700 | [diff] [blame] | 261 | tfd = &tfd_tmp[q->write_ptr]; |
| 262 | |
| 263 | if (reset) |
| 264 | memset(tfd, 0, sizeof(*tfd)); |
| 265 | |
| 266 | num_tbs = iwl_tfd_get_num_tbs(tfd); |
| 267 | |
| 268 | /* Each TFD can point to a maximum 20 Tx buffers */ |
| 269 | if (num_tbs >= IWL_NUM_OF_TBS) { |
Emmanuel Grumbach | 6d8f6ee | 2011-08-25 23:11:06 -0700 | [diff] [blame] | 270 | IWL_ERR(trans, "Error can not send more than %d chunks\n", |
Johannes Berg | 20d3b64 | 2012-05-16 22:54:29 +0200 | [diff] [blame] | 271 | IWL_NUM_OF_TBS); |
Johannes Berg | 214d14d | 2011-05-04 07:50:44 -0700 | [diff] [blame] | 272 | return -EINVAL; |
| 273 | } |
| 274 | |
| 275 | if (WARN_ON(addr & ~DMA_BIT_MASK(36))) |
| 276 | return -EINVAL; |
| 277 | |
| 278 | if (unlikely(addr & ~IWL_TX_DMA_MASK)) |
Emmanuel Grumbach | 6d8f6ee | 2011-08-25 23:11:06 -0700 | [diff] [blame] | 279 | IWL_ERR(trans, "Unaligned address = %llx\n", |
Johannes Berg | 20d3b64 | 2012-05-16 22:54:29 +0200 | [diff] [blame] | 280 | (unsigned long long)addr); |
Johannes Berg | 214d14d | 2011-05-04 07:50:44 -0700 | [diff] [blame] | 281 | |
| 282 | iwl_tfd_set_tb(tfd, num_tbs, addr, len); |
| 283 | |
| 284 | return 0; |
| 285 | } |
| 286 | |
Tomas Winkler | fd4abac | 2008-05-15 13:54:07 +0800 | [diff] [blame] | 287 | /*************** DMA-QUEUE-GENERAL-FUNCTIONS ***** |
| 288 | * DMA services |
| 289 | * |
| 290 | * Theory of operation |
| 291 | * |
| 292 | * A Tx or Rx queue resides in host DRAM, and is comprised of a circular buffer |
| 293 | * of buffer descriptors, each of which points to one or more data buffers for |
| 294 | * the device to read from or fill. Driver and device exchange status of each |
| 295 | * queue via "read" and "write" pointers. Driver keeps minimum of 2 empty |
| 296 | * entries in each circular buffer, to protect against confusing empty and full |
| 297 | * queue states. |
| 298 | * |
| 299 | * The device reads or writes the data in the queues via the device's several |
| 300 | * DMA/FIFO channels. Each queue is mapped to a single DMA channel. |
| 301 | * |
| 302 | * For Tx queue, there are low mark and high mark limits. If, after queuing |
| 303 | * the packet for Tx, free space become < low mark, Tx queue stopped. When |
| 304 | * reclaiming packets (on 'tx done IRQ), if free space become > high mark, |
| 305 | * Tx queue resumed. |
| 306 | * |
Tomas Winkler | fd4abac | 2008-05-15 13:54:07 +0800 | [diff] [blame] | 307 | ***************************************************/ |
| 308 | |
| 309 | int iwl_queue_space(const struct iwl_queue *q) |
| 310 | { |
| 311 | int s = q->read_ptr - q->write_ptr; |
| 312 | |
| 313 | if (q->read_ptr > q->write_ptr) |
| 314 | s -= q->n_bd; |
| 315 | |
| 316 | if (s <= 0) |
| 317 | s += q->n_window; |
| 318 | /* keep some reserve to not confuse empty and full situations */ |
| 319 | s -= 2; |
| 320 | if (s < 0) |
| 321 | s = 0; |
| 322 | return s; |
| 323 | } |
Tomas Winkler | fd4abac | 2008-05-15 13:54:07 +0800 | [diff] [blame] | 324 | |
Ron Rindjunsky | 1053d35 | 2008-05-05 10:22:43 +0800 | [diff] [blame] | 325 | /** |
Ron Rindjunsky | 1053d35 | 2008-05-05 10:22:43 +0800 | [diff] [blame] | 326 | * iwl_queue_init - Initialize queue's high/low-water and read/write indexes |
| 327 | */ |
Emmanuel Grumbach | 6d8f6ee | 2011-08-25 23:11:06 -0700 | [diff] [blame] | 328 | int iwl_queue_init(struct iwl_queue *q, int count, int slots_num, u32 id) |
Ron Rindjunsky | 1053d35 | 2008-05-05 10:22:43 +0800 | [diff] [blame] | 329 | { |
| 330 | q->n_bd = count; |
| 331 | q->n_window = slots_num; |
| 332 | q->id = id; |
| 333 | |
| 334 | /* count must be power-of-two size, otherwise iwl_queue_inc_wrap |
| 335 | * and iwl_queue_dec_wrap are broken. */ |
Johannes Berg | 3e41ace | 2011-04-18 09:12:37 -0700 | [diff] [blame] | 336 | if (WARN_ON(!is_power_of_2(count))) |
| 337 | return -EINVAL; |
Ron Rindjunsky | 1053d35 | 2008-05-05 10:22:43 +0800 | [diff] [blame] | 338 | |
| 339 | /* slots_num must be power-of-two size, otherwise |
| 340 | * get_cmd_index is broken. */ |
Johannes Berg | 3e41ace | 2011-04-18 09:12:37 -0700 | [diff] [blame] | 341 | if (WARN_ON(!is_power_of_2(slots_num))) |
| 342 | return -EINVAL; |
Ron Rindjunsky | 1053d35 | 2008-05-05 10:22:43 +0800 | [diff] [blame] | 343 | |
| 344 | q->low_mark = q->n_window / 4; |
| 345 | if (q->low_mark < 4) |
| 346 | q->low_mark = 4; |
| 347 | |
| 348 | q->high_mark = q->n_window / 8; |
| 349 | if (q->high_mark < 2) |
| 350 | q->high_mark = 2; |
| 351 | |
| 352 | q->write_ptr = q->read_ptr = 0; |
| 353 | |
| 354 | return 0; |
| 355 | } |
| 356 | |
Emmanuel Grumbach | 6d8f6ee | 2011-08-25 23:11:06 -0700 | [diff] [blame] | 357 | static void iwlagn_txq_inval_byte_cnt_tbl(struct iwl_trans *trans, |
Emmanuel Grumbach | 48d42c4 | 2011-07-10 10:47:01 +0300 | [diff] [blame] | 358 | struct iwl_tx_queue *txq) |
| 359 | { |
Emmanuel Grumbach | 105183b | 2011-08-25 23:11:02 -0700 | [diff] [blame] | 360 | struct iwl_trans_pcie *trans_pcie = |
| 361 | IWL_TRANS_GET_PCIE_TRANS(trans); |
Emmanuel Grumbach | 6d8f6ee | 2011-08-25 23:11:06 -0700 | [diff] [blame] | 362 | struct iwlagn_scd_bc_tbl *scd_bc_tbl = trans_pcie->scd_bc_tbls.addr; |
Emmanuel Grumbach | 48d42c4 | 2011-07-10 10:47:01 +0300 | [diff] [blame] | 363 | int txq_id = txq->q.id; |
| 364 | int read_ptr = txq->q.read_ptr; |
| 365 | u8 sta_id = 0; |
| 366 | __le16 bc_ent; |
Emmanuel Grumbach | 132f98c | 2011-09-20 15:37:24 -0700 | [diff] [blame] | 367 | struct iwl_tx_cmd *tx_cmd = |
Johannes Berg | bf8440e | 2012-03-19 17:12:06 +0100 | [diff] [blame] | 368 | (void *)txq->entries[txq->q.read_ptr].cmd->payload; |
Emmanuel Grumbach | 48d42c4 | 2011-07-10 10:47:01 +0300 | [diff] [blame] | 369 | |
| 370 | WARN_ON(read_ptr >= TFD_QUEUE_SIZE_MAX); |
| 371 | |
Meenakshi Venkataraman | c6f600f | 2012-03-08 11:29:12 -0800 | [diff] [blame] | 372 | if (txq_id != trans_pcie->cmd_queue) |
Emmanuel Grumbach | 132f98c | 2011-09-20 15:37:24 -0700 | [diff] [blame] | 373 | sta_id = tx_cmd->sta_id; |
Emmanuel Grumbach | 48d42c4 | 2011-07-10 10:47:01 +0300 | [diff] [blame] | 374 | |
| 375 | bc_ent = cpu_to_le16(1 | (sta_id << 12)); |
| 376 | scd_bc_tbl[txq_id].tfd_offset[read_ptr] = bc_ent; |
| 377 | |
| 378 | if (read_ptr < TFD_QUEUE_SIZE_BC_DUP) |
| 379 | scd_bc_tbl[txq_id]. |
| 380 | tfd_offset[TFD_QUEUE_SIZE_MAX + read_ptr] = bc_ent; |
| 381 | } |
| 382 | |
Emmanuel Grumbach | 1ce8658 | 2012-06-04 16:48:17 +0300 | [diff] [blame^] | 383 | static int iwl_txq_set_ratid_map(struct iwl_trans *trans, u16 ra_tid, |
| 384 | u16 txq_id) |
Emmanuel Grumbach | 48d42c4 | 2011-07-10 10:47:01 +0300 | [diff] [blame] | 385 | { |
Johannes Berg | 20d3b64 | 2012-05-16 22:54:29 +0200 | [diff] [blame] | 386 | struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans); |
Emmanuel Grumbach | 48d42c4 | 2011-07-10 10:47:01 +0300 | [diff] [blame] | 387 | u32 tbl_dw_addr; |
| 388 | u32 tbl_dw; |
| 389 | u16 scd_q2ratid; |
| 390 | |
| 391 | scd_q2ratid = ra_tid & SCD_QUEUE_RA_TID_MAP_RATID_MSK; |
| 392 | |
Emmanuel Grumbach | 105183b | 2011-08-25 23:11:02 -0700 | [diff] [blame] | 393 | tbl_dw_addr = trans_pcie->scd_base_addr + |
Emmanuel Grumbach | 48d42c4 | 2011-07-10 10:47:01 +0300 | [diff] [blame] | 394 | SCD_TRANS_TBL_OFFSET_QUEUE(txq_id); |
| 395 | |
Emmanuel Grumbach | 1042db2 | 2012-01-03 16:56:15 +0200 | [diff] [blame] | 396 | tbl_dw = iwl_read_targ_mem(trans, tbl_dw_addr); |
Emmanuel Grumbach | 48d42c4 | 2011-07-10 10:47:01 +0300 | [diff] [blame] | 397 | |
| 398 | if (txq_id & 0x1) |
| 399 | tbl_dw = (scd_q2ratid << 16) | (tbl_dw & 0x0000FFFF); |
| 400 | else |
| 401 | tbl_dw = scd_q2ratid | (tbl_dw & 0xFFFF0000); |
| 402 | |
Emmanuel Grumbach | 1042db2 | 2012-01-03 16:56:15 +0200 | [diff] [blame] | 403 | iwl_write_targ_mem(trans, tbl_dw_addr, tbl_dw); |
Emmanuel Grumbach | 48d42c4 | 2011-07-10 10:47:01 +0300 | [diff] [blame] | 404 | |
| 405 | return 0; |
| 406 | } |
| 407 | |
Emmanuel Grumbach | 1ce8658 | 2012-06-04 16:48:17 +0300 | [diff] [blame^] | 408 | static inline void iwl_txq_set_inactive(struct iwl_trans *trans, u16 txq_id) |
Emmanuel Grumbach | 48d42c4 | 2011-07-10 10:47:01 +0300 | [diff] [blame] | 409 | { |
| 410 | /* Simply stop the queue, but don't change any configuration; |
| 411 | * the SCD_ACT_EN bit is the write-enable mask for the ACTIVE bit. */ |
Emmanuel Grumbach | 1042db2 | 2012-01-03 16:56:15 +0200 | [diff] [blame] | 412 | iwl_write_prph(trans, |
Emmanuel Grumbach | 48d42c4 | 2011-07-10 10:47:01 +0300 | [diff] [blame] | 413 | SCD_QUEUE_STATUS_BITS(txq_id), |
| 414 | (0 << SCD_QUEUE_STTS_REG_POS_ACTIVE)| |
| 415 | (1 << SCD_QUEUE_STTS_REG_POS_SCD_ACT_EN)); |
| 416 | } |
| 417 | |
Emmanuel Grumbach | 4beaf6c | 2012-05-29 11:29:10 +0300 | [diff] [blame] | 418 | void __iwl_trans_pcie_txq_enable(struct iwl_trans *trans, int txq_id, |
| 419 | int fifo, int sta_id, int tid, |
| 420 | int frame_limit, u16 ssn) |
Johannes Berg | 70a18c5 | 2012-03-05 11:24:44 -0800 | [diff] [blame] | 421 | { |
Johannes Berg | 9eae88f | 2012-03-15 13:26:52 -0700 | [diff] [blame] | 422 | struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans); |
Emmanuel Grumbach | 4beaf6c | 2012-05-29 11:29:10 +0300 | [diff] [blame] | 423 | |
| 424 | lockdep_assert_held(&trans_pcie->irq_lock); |
Emmanuel Grumbach | 48d42c4 | 2011-07-10 10:47:01 +0300 | [diff] [blame] | 425 | |
Johannes Berg | 9eae88f | 2012-03-15 13:26:52 -0700 | [diff] [blame] | 426 | if (test_and_set_bit(txq_id, trans_pcie->queue_used)) |
| 427 | WARN_ONCE(1, "queue %d already used - expect issues", txq_id); |
Emmanuel Grumbach | 48d42c4 | 2011-07-10 10:47:01 +0300 | [diff] [blame] | 428 | |
Emmanuel Grumbach | 48d42c4 | 2011-07-10 10:47:01 +0300 | [diff] [blame] | 429 | /* Stop this Tx queue before configuring it */ |
Emmanuel Grumbach | 1ce8658 | 2012-06-04 16:48:17 +0300 | [diff] [blame^] | 430 | iwl_txq_set_inactive(trans, txq_id); |
Emmanuel Grumbach | 48d42c4 | 2011-07-10 10:47:01 +0300 | [diff] [blame] | 431 | |
Emmanuel Grumbach | 4beaf6c | 2012-05-29 11:29:10 +0300 | [diff] [blame] | 432 | /* Set this queue as a chain-building queue unless it is CMD queue */ |
| 433 | if (txq_id != trans_pcie->cmd_queue) |
| 434 | iwl_set_bits_prph(trans, SCD_QUEUECHAIN_SEL, BIT(txq_id)); |
Emmanuel Grumbach | 48d42c4 | 2011-07-10 10:47:01 +0300 | [diff] [blame] | 435 | |
Emmanuel Grumbach | 4beaf6c | 2012-05-29 11:29:10 +0300 | [diff] [blame] | 436 | /* If this queue is mapped to a certain station: it is an AGG queue */ |
| 437 | if (sta_id != IWL_INVALID_STATION) { |
| 438 | u16 ra_tid = BUILD_RAxTID(sta_id, tid); |
Emmanuel Grumbach | 48d42c4 | 2011-07-10 10:47:01 +0300 | [diff] [blame] | 439 | |
Emmanuel Grumbach | 4beaf6c | 2012-05-29 11:29:10 +0300 | [diff] [blame] | 440 | /* Map receiver-address / traffic-ID to this queue */ |
Emmanuel Grumbach | 1ce8658 | 2012-06-04 16:48:17 +0300 | [diff] [blame^] | 441 | iwl_txq_set_ratid_map(trans, ra_tid, txq_id); |
Emmanuel Grumbach | 4beaf6c | 2012-05-29 11:29:10 +0300 | [diff] [blame] | 442 | |
| 443 | /* enable aggregations for the queue */ |
| 444 | iwl_set_bits_prph(trans, SCD_AGGR_SEL, BIT(txq_id)); |
Emmanuel Grumbach | 1ce8658 | 2012-06-04 16:48:17 +0300 | [diff] [blame^] | 445 | } else { |
| 446 | /* |
| 447 | * disable aggregations for the queue, this will also make the |
| 448 | * ra_tid mapping configuration irrelevant since it is now a |
| 449 | * non-AGG queue. |
| 450 | */ |
| 451 | iwl_clear_bits_prph(trans, SCD_AGGR_SEL, BIT(txq_id)); |
Emmanuel Grumbach | 4beaf6c | 2012-05-29 11:29:10 +0300 | [diff] [blame] | 452 | } |
Emmanuel Grumbach | 48d42c4 | 2011-07-10 10:47:01 +0300 | [diff] [blame] | 453 | |
| 454 | /* Place first TFD at index corresponding to start sequence number. |
| 455 | * Assumes that ssn_idx is valid (!= 0xFFF) */ |
Emmanuel Grumbach | 822e8b2 | 2011-11-21 13:25:31 +0200 | [diff] [blame] | 456 | trans_pcie->txq[txq_id].q.read_ptr = (ssn & 0xff); |
| 457 | trans_pcie->txq[txq_id].q.write_ptr = (ssn & 0xff); |
Emmanuel Grumbach | 1ce8658 | 2012-06-04 16:48:17 +0300 | [diff] [blame^] | 458 | |
| 459 | iwl_write_direct32(trans, HBUS_TARG_WRPTR, |
| 460 | (ssn & 0xff) | (txq_id << 8)); |
| 461 | iwl_write_prph(trans, SCD_QUEUE_RDPTR(txq_id), ssn); |
Emmanuel Grumbach | 48d42c4 | 2011-07-10 10:47:01 +0300 | [diff] [blame] | 462 | |
| 463 | /* Set up Tx window size and frame limit for this queue */ |
Emmanuel Grumbach | 1042db2 | 2012-01-03 16:56:15 +0200 | [diff] [blame] | 464 | iwl_write_targ_mem(trans, trans_pcie->scd_base_addr + |
Emmanuel Grumbach | 4beaf6c | 2012-05-29 11:29:10 +0300 | [diff] [blame] | 465 | SCD_CONTEXT_QUEUE_OFFSET(txq_id), 0); |
| 466 | iwl_write_targ_mem(trans, trans_pcie->scd_base_addr + |
Johannes Berg | 9eae88f | 2012-03-15 13:26:52 -0700 | [diff] [blame] | 467 | SCD_CONTEXT_QUEUE_OFFSET(txq_id) + sizeof(u32), |
| 468 | ((frame_limit << SCD_QUEUE_CTX_REG2_WIN_SIZE_POS) & |
| 469 | SCD_QUEUE_CTX_REG2_WIN_SIZE_MSK) | |
| 470 | ((frame_limit << SCD_QUEUE_CTX_REG2_FRAME_LIMIT_POS) & |
| 471 | SCD_QUEUE_CTX_REG2_FRAME_LIMIT_MSK)); |
Emmanuel Grumbach | 48d42c4 | 2011-07-10 10:47:01 +0300 | [diff] [blame] | 472 | |
Emmanuel Grumbach | 48d42c4 | 2011-07-10 10:47:01 +0300 | [diff] [blame] | 473 | /* Set up Status area in SRAM, map to Tx DMA/FIFO, activate the queue */ |
Emmanuel Grumbach | 1ce8658 | 2012-06-04 16:48:17 +0300 | [diff] [blame^] | 474 | iwl_write_prph(trans, SCD_QUEUE_STATUS_BITS(txq_id), |
| 475 | (1 << SCD_QUEUE_STTS_REG_POS_ACTIVE) | |
| 476 | (fifo << SCD_QUEUE_STTS_REG_POS_TXF) | |
| 477 | (1 << SCD_QUEUE_STTS_REG_POS_WSL) | |
| 478 | SCD_QUEUE_STTS_REG_MSK); |
| 479 | IWL_DEBUG_TX_QUEUES(trans, "Activate queue %d on FIFO %d WrPtr: %d\n", |
| 480 | txq_id, fifo, ssn & 0xff); |
Emmanuel Grumbach | 4beaf6c | 2012-05-29 11:29:10 +0300 | [diff] [blame] | 481 | } |
| 482 | |
| 483 | void iwl_trans_pcie_txq_enable(struct iwl_trans *trans, int txq_id, int fifo, |
| 484 | int sta_id, int tid, int frame_limit, u16 ssn) |
| 485 | { |
| 486 | struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans); |
| 487 | unsigned long flags; |
| 488 | |
| 489 | spin_lock_irqsave(&trans_pcie->irq_lock, flags); |
| 490 | |
| 491 | __iwl_trans_pcie_txq_enable(trans, txq_id, fifo, sta_id, |
| 492 | tid, frame_limit, ssn); |
Emmanuel Grumbach | a0eaad7 | 2011-08-25 23:11:00 -0700 | [diff] [blame] | 493 | |
Johannes Berg | 7b11488 | 2012-02-05 13:55:11 -0800 | [diff] [blame] | 494 | spin_unlock_irqrestore(&trans_pcie->irq_lock, flags); |
Emmanuel Grumbach | 48d42c4 | 2011-07-10 10:47:01 +0300 | [diff] [blame] | 495 | } |
| 496 | |
Emmanuel Grumbach | d0624be | 2012-05-29 13:07:30 +0300 | [diff] [blame] | 497 | void iwl_trans_pcie_txq_disable(struct iwl_trans *trans, int txq_id) |
Emmanuel Grumbach | 288712a | 2011-08-25 23:11:25 -0700 | [diff] [blame] | 498 | { |
Emmanuel Grumbach | 8ad71be | 2011-08-25 23:11:32 -0700 | [diff] [blame] | 499 | struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans); |
Emmanuel Grumbach | 1ce8658 | 2012-06-04 16:48:17 +0300 | [diff] [blame^] | 500 | u16 rd_ptr, wr_ptr; |
| 501 | int n_bd = trans_pcie->txq[txq_id].q.n_bd; |
Emmanuel Grumbach | 288712a | 2011-08-25 23:11:25 -0700 | [diff] [blame] | 502 | |
Johannes Berg | 9eae88f | 2012-03-15 13:26:52 -0700 | [diff] [blame] | 503 | if (!test_and_clear_bit(txq_id, trans_pcie->queue_used)) { |
| 504 | WARN_ONCE(1, "queue %d not used", txq_id); |
| 505 | return; |
Emmanuel Grumbach | bc23773 | 2011-11-21 13:25:31 +0200 | [diff] [blame] | 506 | } |
| 507 | |
Emmanuel Grumbach | 1ce8658 | 2012-06-04 16:48:17 +0300 | [diff] [blame^] | 508 | rd_ptr = iwl_read_prph(trans, SCD_QUEUE_RDPTR(txq_id)) & (n_bd - 1); |
| 509 | wr_ptr = iwl_read_prph(trans, SCD_QUEUE_WRPTR(txq_id)); |
Emmanuel Grumbach | 48d42c4 | 2011-07-10 10:47:01 +0300 | [diff] [blame] | 510 | |
Emmanuel Grumbach | 1ce8658 | 2012-06-04 16:48:17 +0300 | [diff] [blame^] | 511 | WARN_ONCE(rd_ptr != wr_ptr, "queue %d isn't empty: [%d,%d]", |
| 512 | txq_id, rd_ptr, wr_ptr); |
Emmanuel Grumbach | 48d42c4 | 2011-07-10 10:47:01 +0300 | [diff] [blame] | 513 | |
Emmanuel Grumbach | 1ce8658 | 2012-06-04 16:48:17 +0300 | [diff] [blame^] | 514 | iwl_txq_set_inactive(trans, txq_id); |
| 515 | IWL_DEBUG_TX_QUEUES(trans, "Deactivate queue %d\n", txq_id); |
Emmanuel Grumbach | 48d42c4 | 2011-07-10 10:47:01 +0300 | [diff] [blame] | 516 | } |
| 517 | |
Tomas Winkler | fd4abac | 2008-05-15 13:54:07 +0800 | [diff] [blame] | 518 | /*************** HOST COMMAND QUEUE FUNCTIONS *****/ |
| 519 | |
| 520 | /** |
| 521 | * iwl_enqueue_hcmd - enqueue a uCode command |
| 522 | * @priv: device private data point |
| 523 | * @cmd: a point to the ucode command structure |
| 524 | * |
| 525 | * The function returns < 0 values to indicate the operation is |
| 526 | * failed. On success, it turns the index (> 0) of command in the |
| 527 | * command queue. |
| 528 | */ |
Emmanuel Grumbach | 6d8f6ee | 2011-08-25 23:11:06 -0700 | [diff] [blame] | 529 | static int iwl_enqueue_hcmd(struct iwl_trans *trans, struct iwl_host_cmd *cmd) |
Tomas Winkler | fd4abac | 2008-05-15 13:54:07 +0800 | [diff] [blame] | 530 | { |
Emmanuel Grumbach | 8ad71be | 2011-08-25 23:11:32 -0700 | [diff] [blame] | 531 | struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans); |
Meenakshi Venkataraman | c6f600f | 2012-03-08 11:29:12 -0800 | [diff] [blame] | 532 | struct iwl_tx_queue *txq = &trans_pcie->txq[trans_pcie->cmd_queue]; |
Tomas Winkler | fd4abac | 2008-05-15 13:54:07 +0800 | [diff] [blame] | 533 | struct iwl_queue *q = &txq->q; |
Johannes Berg | c2acea8 | 2009-07-24 11:13:05 -0700 | [diff] [blame] | 534 | struct iwl_device_cmd *out_cmd; |
| 535 | struct iwl_cmd_meta *out_meta; |
Tomas Winkler | f367422 | 2008-08-04 16:00:44 +0800 | [diff] [blame] | 536 | dma_addr_t phys_addr; |
Tomas Winkler | fd4abac | 2008-05-15 13:54:07 +0800 | [diff] [blame] | 537 | u32 idx; |
Johannes Berg | 4ce7cc2 | 2011-05-13 11:57:40 -0700 | [diff] [blame] | 538 | u16 copy_size, cmd_size; |
Johannes Berg | 4ce7cc2 | 2011-05-13 11:57:40 -0700 | [diff] [blame] | 539 | bool had_nocopy = false; |
| 540 | int i; |
| 541 | u8 *cmd_dest; |
| 542 | #ifdef CONFIG_IWLWIFI_DEVICE_TRACING |
| 543 | const void *trace_bufs[IWL_MAX_CMD_TFDS + 1] = {}; |
| 544 | int trace_lens[IWL_MAX_CMD_TFDS + 1] = {}; |
| 545 | int trace_idx; |
| 546 | #endif |
Tomas Winkler | fd4abac | 2008-05-15 13:54:07 +0800 | [diff] [blame] | 547 | |
Johannes Berg | 4ce7cc2 | 2011-05-13 11:57:40 -0700 | [diff] [blame] | 548 | copy_size = sizeof(out_cmd->hdr); |
| 549 | cmd_size = sizeof(out_cmd->hdr); |
| 550 | |
| 551 | /* need one for the header if the first is NOCOPY */ |
| 552 | BUILD_BUG_ON(IWL_MAX_CMD_TFDS > IWL_NUM_OF_TBS - 1); |
| 553 | |
| 554 | for (i = 0; i < IWL_MAX_CMD_TFDS; i++) { |
| 555 | if (!cmd->len[i]) |
| 556 | continue; |
| 557 | if (cmd->dataflags[i] & IWL_HCMD_DFL_NOCOPY) { |
| 558 | had_nocopy = true; |
| 559 | } else { |
| 560 | /* NOCOPY must not be followed by normal! */ |
| 561 | if (WARN_ON(had_nocopy)) |
| 562 | return -EINVAL; |
| 563 | copy_size += cmd->len[i]; |
| 564 | } |
| 565 | cmd_size += cmd->len[i]; |
| 566 | } |
Tomas Winkler | fd4abac | 2008-05-15 13:54:07 +0800 | [diff] [blame] | 567 | |
Johannes Berg | 3e41ace | 2011-04-18 09:12:37 -0700 | [diff] [blame] | 568 | /* |
| 569 | * If any of the command structures end up being larger than |
Johannes Berg | 4ce7cc2 | 2011-05-13 11:57:40 -0700 | [diff] [blame] | 570 | * the TFD_MAX_PAYLOAD_SIZE and they aren't dynamically |
| 571 | * allocated into separate TFDs, then we will need to |
| 572 | * increase the size of the buffers. |
Johannes Berg | 3e41ace | 2011-04-18 09:12:37 -0700 | [diff] [blame] | 573 | */ |
Johannes Berg | 4ce7cc2 | 2011-05-13 11:57:40 -0700 | [diff] [blame] | 574 | if (WARN_ON(copy_size > TFD_MAX_PAYLOAD_SIZE)) |
Johannes Berg | 3e41ace | 2011-04-18 09:12:37 -0700 | [diff] [blame] | 575 | return -EINVAL; |
Tomas Winkler | fd4abac | 2008-05-15 13:54:07 +0800 | [diff] [blame] | 576 | |
Johannes Berg | 015c15e | 2012-03-05 11:24:24 -0800 | [diff] [blame] | 577 | spin_lock_bh(&txq->lock); |
Stanislaw Gruszka | 3598e17 | 2011-03-31 17:36:26 +0200 | [diff] [blame] | 578 | |
Johannes Berg | c2acea8 | 2009-07-24 11:13:05 -0700 | [diff] [blame] | 579 | if (iwl_queue_space(q) < ((cmd->flags & CMD_ASYNC) ? 2 : 1)) { |
Johannes Berg | 015c15e | 2012-03-05 11:24:24 -0800 | [diff] [blame] | 580 | spin_unlock_bh(&txq->lock); |
Stanislaw Gruszka | 3598e17 | 2011-03-31 17:36:26 +0200 | [diff] [blame] | 581 | |
Emmanuel Grumbach | 6d8f6ee | 2011-08-25 23:11:06 -0700 | [diff] [blame] | 582 | IWL_ERR(trans, "No space in command queue\n"); |
Johannes Berg | 0e78184 | 2012-03-06 13:30:49 -0800 | [diff] [blame] | 583 | iwl_op_mode_cmd_queue_full(trans->op_mode); |
Tomas Winkler | fd4abac | 2008-05-15 13:54:07 +0800 | [diff] [blame] | 584 | return -ENOSPC; |
| 585 | } |
| 586 | |
Johannes Berg | 4ce7cc2 | 2011-05-13 11:57:40 -0700 | [diff] [blame] | 587 | idx = get_cmd_index(q, q->write_ptr); |
Johannes Berg | bf8440e | 2012-03-19 17:12:06 +0100 | [diff] [blame] | 588 | out_cmd = txq->entries[idx].cmd; |
| 589 | out_meta = &txq->entries[idx].meta; |
Johannes Berg | c2acea8 | 2009-07-24 11:13:05 -0700 | [diff] [blame] | 590 | |
Daniel C Halperin | 8ce73f3 | 2009-07-31 14:28:06 -0700 | [diff] [blame] | 591 | memset(out_meta, 0, sizeof(*out_meta)); /* re-initialize to NULL */ |
Johannes Berg | c2acea8 | 2009-07-24 11:13:05 -0700 | [diff] [blame] | 592 | if (cmd->flags & CMD_WANT_SKB) |
| 593 | out_meta->source = cmd; |
Tomas Winkler | fd4abac | 2008-05-15 13:54:07 +0800 | [diff] [blame] | 594 | |
Johannes Berg | 4ce7cc2 | 2011-05-13 11:57:40 -0700 | [diff] [blame] | 595 | /* set up the header */ |
| 596 | |
Tomas Winkler | fd4abac | 2008-05-15 13:54:07 +0800 | [diff] [blame] | 597 | out_cmd->hdr.cmd = cmd->id; |
Tomas Winkler | fd4abac | 2008-05-15 13:54:07 +0800 | [diff] [blame] | 598 | out_cmd->hdr.flags = 0; |
Emmanuel Grumbach | cefeaa5 | 2011-08-25 23:10:40 -0700 | [diff] [blame] | 599 | out_cmd->hdr.sequence = |
Meenakshi Venkataraman | c6f600f | 2012-03-08 11:29:12 -0800 | [diff] [blame] | 600 | cpu_to_le16(QUEUE_TO_SEQ(trans_pcie->cmd_queue) | |
Emmanuel Grumbach | cefeaa5 | 2011-08-25 23:10:40 -0700 | [diff] [blame] | 601 | INDEX_TO_SEQ(q->write_ptr)); |
Tomas Winkler | fd4abac | 2008-05-15 13:54:07 +0800 | [diff] [blame] | 602 | |
Johannes Berg | 4ce7cc2 | 2011-05-13 11:57:40 -0700 | [diff] [blame] | 603 | /* and copy the data that needs to be copied */ |
| 604 | |
Emmanuel Grumbach | 132f98c | 2011-09-20 15:37:24 -0700 | [diff] [blame] | 605 | cmd_dest = out_cmd->payload; |
Johannes Berg | 4ce7cc2 | 2011-05-13 11:57:40 -0700 | [diff] [blame] | 606 | for (i = 0; i < IWL_MAX_CMD_TFDS; i++) { |
| 607 | if (!cmd->len[i]) |
| 608 | continue; |
| 609 | if (cmd->dataflags[i] & IWL_HCMD_DFL_NOCOPY) |
| 610 | break; |
| 611 | memcpy(cmd_dest, cmd->data[i], cmd->len[i]); |
| 612 | cmd_dest += cmd->len[i]; |
Esti Kummer | ded2ae7 | 2008-08-04 16:00:45 +0800 | [diff] [blame] | 613 | } |
Johannes Berg | 4ce7cc2 | 2011-05-13 11:57:40 -0700 | [diff] [blame] | 614 | |
Johannes Berg | d9fb646 | 2012-03-26 08:23:39 -0700 | [diff] [blame] | 615 | IWL_DEBUG_HC(trans, |
Johannes Berg | 20d3b64 | 2012-05-16 22:54:29 +0200 | [diff] [blame] | 616 | "Sending command %s (#%x), seq: 0x%04X, %d bytes at %d[%d]:%d\n", |
| 617 | trans_pcie_get_cmd_string(trans_pcie, out_cmd->hdr.cmd), |
| 618 | out_cmd->hdr.cmd, le16_to_cpu(out_cmd->hdr.sequence), |
| 619 | cmd_size, q->write_ptr, idx, trans_pcie->cmd_queue); |
Johannes Berg | 4ce7cc2 | 2011-05-13 11:57:40 -0700 | [diff] [blame] | 620 | |
Emmanuel Grumbach | 1042db2 | 2012-01-03 16:56:15 +0200 | [diff] [blame] | 621 | phys_addr = dma_map_single(trans->dev, &out_cmd->hdr, copy_size, |
Johannes Berg | 20d3b64 | 2012-05-16 22:54:29 +0200 | [diff] [blame] | 622 | DMA_BIDIRECTIONAL); |
Emmanuel Grumbach | 1042db2 | 2012-01-03 16:56:15 +0200 | [diff] [blame] | 623 | if (unlikely(dma_mapping_error(trans->dev, phys_addr))) { |
Johannes Berg | 2c46f72 | 2011-04-28 07:27:10 -0700 | [diff] [blame] | 624 | idx = -ENOMEM; |
| 625 | goto out; |
| 626 | } |
| 627 | |
FUJITA Tomonori | 2e72444 | 2010-06-03 14:19:20 +0900 | [diff] [blame] | 628 | dma_unmap_addr_set(out_meta, mapping, phys_addr); |
Johannes Berg | 4ce7cc2 | 2011-05-13 11:57:40 -0700 | [diff] [blame] | 629 | dma_unmap_len_set(out_meta, len, copy_size); |
| 630 | |
Johannes Berg | 20d3b64 | 2012-05-16 22:54:29 +0200 | [diff] [blame] | 631 | iwlagn_txq_attach_buf_to_tfd(trans, txq, phys_addr, copy_size, 1); |
Johannes Berg | 4ce7cc2 | 2011-05-13 11:57:40 -0700 | [diff] [blame] | 632 | #ifdef CONFIG_IWLWIFI_DEVICE_TRACING |
| 633 | trace_bufs[0] = &out_cmd->hdr; |
| 634 | trace_lens[0] = copy_size; |
| 635 | trace_idx = 1; |
| 636 | #endif |
| 637 | |
| 638 | for (i = 0; i < IWL_MAX_CMD_TFDS; i++) { |
| 639 | if (!cmd->len[i]) |
| 640 | continue; |
| 641 | if (!(cmd->dataflags[i] & IWL_HCMD_DFL_NOCOPY)) |
| 642 | continue; |
Johannes Berg | 20d3b64 | 2012-05-16 22:54:29 +0200 | [diff] [blame] | 643 | phys_addr = dma_map_single(trans->dev, (void *)cmd->data[i], |
John W. Linville | 3be3fdb | 2011-06-28 13:53:32 -0400 | [diff] [blame] | 644 | cmd->len[i], DMA_BIDIRECTIONAL); |
Emmanuel Grumbach | 1042db2 | 2012-01-03 16:56:15 +0200 | [diff] [blame] | 645 | if (dma_mapping_error(trans->dev, phys_addr)) { |
Emmanuel Grumbach | eec373f | 2012-05-16 22:54:23 +0200 | [diff] [blame] | 646 | iwl_unmap_tfd(trans, out_meta, |
| 647 | &txq->tfds[q->write_ptr], |
| 648 | DMA_BIDIRECTIONAL); |
Johannes Berg | 4ce7cc2 | 2011-05-13 11:57:40 -0700 | [diff] [blame] | 649 | idx = -ENOMEM; |
| 650 | goto out; |
| 651 | } |
| 652 | |
Emmanuel Grumbach | 6d8f6ee | 2011-08-25 23:11:06 -0700 | [diff] [blame] | 653 | iwlagn_txq_attach_buf_to_tfd(trans, txq, phys_addr, |
Johannes Berg | 4ce7cc2 | 2011-05-13 11:57:40 -0700 | [diff] [blame] | 654 | cmd->len[i], 0); |
| 655 | #ifdef CONFIG_IWLWIFI_DEVICE_TRACING |
| 656 | trace_bufs[trace_idx] = cmd->data[i]; |
| 657 | trace_lens[trace_idx] = cmd->len[i]; |
| 658 | trace_idx++; |
| 659 | #endif |
| 660 | } |
Reinette Chatre | df833b1 | 2009-04-21 10:55:48 -0700 | [diff] [blame] | 661 | |
Emmanuel Grumbach | afaf6b5 | 2011-07-08 08:46:09 -0700 | [diff] [blame] | 662 | out_meta->flags = cmd->flags; |
Johannes Berg | 2c46f72 | 2011-04-28 07:27:10 -0700 | [diff] [blame] | 663 | |
| 664 | txq->need_update = 1; |
| 665 | |
Johannes Berg | 4ce7cc2 | 2011-05-13 11:57:40 -0700 | [diff] [blame] | 666 | /* check that tracing gets all possible blocks */ |
| 667 | BUILD_BUG_ON(IWL_MAX_CMD_TFDS + 1 != 3); |
| 668 | #ifdef CONFIG_IWLWIFI_DEVICE_TRACING |
Johannes Berg | 6c1011e | 2012-03-06 13:30:48 -0800 | [diff] [blame] | 669 | trace_iwlwifi_dev_hcmd(trans->dev, cmd->flags, |
Johannes Berg | 4ce7cc2 | 2011-05-13 11:57:40 -0700 | [diff] [blame] | 670 | trace_bufs[0], trace_lens[0], |
| 671 | trace_bufs[1], trace_lens[1], |
| 672 | trace_bufs[2], trace_lens[2]); |
| 673 | #endif |
Reinette Chatre | df833b1 | 2009-04-21 10:55:48 -0700 | [diff] [blame] | 674 | |
Johannes Berg | 7c5ba4a | 2012-04-09 17:46:54 -0700 | [diff] [blame] | 675 | /* start timer if queue currently empty */ |
| 676 | if (q->read_ptr == q->write_ptr && trans_pcie->wd_timeout) |
| 677 | mod_timer(&txq->stuck_timer, jiffies + trans_pcie->wd_timeout); |
| 678 | |
Tomas Winkler | fd4abac | 2008-05-15 13:54:07 +0800 | [diff] [blame] | 679 | /* Increment and update queue's write index */ |
| 680 | q->write_ptr = iwl_queue_inc_wrap(q->write_ptr, q->n_bd); |
Emmanuel Grumbach | fd65693 | 2011-08-25 23:11:19 -0700 | [diff] [blame] | 681 | iwl_txq_update_write_ptr(trans, txq); |
Tomas Winkler | fd4abac | 2008-05-15 13:54:07 +0800 | [diff] [blame] | 682 | |
Johannes Berg | 2c46f72 | 2011-04-28 07:27:10 -0700 | [diff] [blame] | 683 | out: |
Johannes Berg | 015c15e | 2012-03-05 11:24:24 -0800 | [diff] [blame] | 684 | spin_unlock_bh(&txq->lock); |
Abhijeet Kolekar | 7bfedc5 | 2010-02-03 13:47:56 -0800 | [diff] [blame] | 685 | return idx; |
Tomas Winkler | fd4abac | 2008-05-15 13:54:07 +0800 | [diff] [blame] | 686 | } |
| 687 | |
Johannes Berg | 7c5ba4a | 2012-04-09 17:46:54 -0700 | [diff] [blame] | 688 | static inline void iwl_queue_progress(struct iwl_trans_pcie *trans_pcie, |
| 689 | struct iwl_tx_queue *txq) |
| 690 | { |
| 691 | if (!trans_pcie->wd_timeout) |
| 692 | return; |
| 693 | |
| 694 | /* |
| 695 | * if empty delete timer, otherwise move timer forward |
| 696 | * since we're making progress on this queue |
| 697 | */ |
| 698 | if (txq->q.read_ptr == txq->q.write_ptr) |
| 699 | del_timer(&txq->stuck_timer); |
| 700 | else |
| 701 | mod_timer(&txq->stuck_timer, jiffies + trans_pcie->wd_timeout); |
| 702 | } |
| 703 | |
Tomas Winkler | 17b8892 | 2008-05-29 16:35:12 +0800 | [diff] [blame] | 704 | /** |
| 705 | * iwl_hcmd_queue_reclaim - Reclaim TX command queue entries already Tx'd |
| 706 | * |
| 707 | * When FW advances 'R' index, all entries between old and new 'R' index |
| 708 | * need to be reclaimed. As result, some free space forms. If there is |
| 709 | * enough free space (> low mark), wake the stack that feeds us. |
| 710 | */ |
Emmanuel Grumbach | 3e10cae | 2011-09-06 09:31:18 -0700 | [diff] [blame] | 711 | static void iwl_hcmd_queue_reclaim(struct iwl_trans *trans, int txq_id, |
| 712 | int idx) |
Tomas Winkler | 17b8892 | 2008-05-29 16:35:12 +0800 | [diff] [blame] | 713 | { |
Emmanuel Grumbach | 3e10cae | 2011-09-06 09:31:18 -0700 | [diff] [blame] | 714 | struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans); |
Emmanuel Grumbach | 8ad71be | 2011-08-25 23:11:32 -0700 | [diff] [blame] | 715 | struct iwl_tx_queue *txq = &trans_pcie->txq[txq_id]; |
Tomas Winkler | 17b8892 | 2008-05-29 16:35:12 +0800 | [diff] [blame] | 716 | struct iwl_queue *q = &txq->q; |
| 717 | int nfreed = 0; |
| 718 | |
Johannes Berg | 015c15e | 2012-03-05 11:24:24 -0800 | [diff] [blame] | 719 | lockdep_assert_held(&txq->lock); |
| 720 | |
Tomas Winkler | 499b188 | 2008-10-14 12:32:48 -0700 | [diff] [blame] | 721 | if ((idx >= q->n_bd) || (iwl_queue_used(q, idx) == 0)) { |
Johannes Berg | 20d3b64 | 2012-05-16 22:54:29 +0200 | [diff] [blame] | 722 | IWL_ERR(trans, |
| 723 | "%s: Read index for DMA queue txq id (%d), index %d is out of range [0-%d] %d %d.\n", |
| 724 | __func__, txq_id, idx, q->n_bd, |
| 725 | q->write_ptr, q->read_ptr); |
Tomas Winkler | 17b8892 | 2008-05-29 16:35:12 +0800 | [diff] [blame] | 726 | return; |
| 727 | } |
| 728 | |
Tomas Winkler | 499b188 | 2008-10-14 12:32:48 -0700 | [diff] [blame] | 729 | for (idx = iwl_queue_inc_wrap(idx, q->n_bd); q->read_ptr != idx; |
| 730 | q->read_ptr = iwl_queue_inc_wrap(q->read_ptr, q->n_bd)) { |
| 731 | |
| 732 | if (nfreed++ > 0) { |
Johannes Berg | 20d3b64 | 2012-05-16 22:54:29 +0200 | [diff] [blame] | 733 | IWL_ERR(trans, "HCMD skipped: index (%d) %d %d\n", |
| 734 | idx, q->write_ptr, q->read_ptr); |
Emmanuel Grumbach | bcb9321 | 2012-02-09 16:08:15 +0200 | [diff] [blame] | 735 | iwl_op_mode_nic_error(trans->op_mode); |
Tomas Winkler | 17b8892 | 2008-05-29 16:35:12 +0800 | [diff] [blame] | 736 | } |
Gregory Greenman | da99c4b | 2008-08-04 16:00:40 +0800 | [diff] [blame] | 737 | |
Tomas Winkler | 17b8892 | 2008-05-29 16:35:12 +0800 | [diff] [blame] | 738 | } |
Johannes Berg | 7c5ba4a | 2012-04-09 17:46:54 -0700 | [diff] [blame] | 739 | |
| 740 | iwl_queue_progress(trans_pcie, txq); |
Tomas Winkler | 17b8892 | 2008-05-29 16:35:12 +0800 | [diff] [blame] | 741 | } |
| 742 | |
| 743 | /** |
| 744 | * iwl_tx_cmd_complete - Pull unused buffers off the queue and reclaim them |
| 745 | * @rxb: Rx buffer to reclaim |
Emmanuel Grumbach | 247c61d | 2011-09-20 15:37:23 -0700 | [diff] [blame] | 746 | * @handler_status: return value of the handler of the command |
| 747 | * (put in setup_rx_handlers) |
Tomas Winkler | 17b8892 | 2008-05-29 16:35:12 +0800 | [diff] [blame] | 748 | * |
| 749 | * If an Rx buffer has an async callback associated with it the callback |
| 750 | * will be executed. The attached skb (if present) will only be freed |
| 751 | * if the callback returns 1 |
| 752 | */ |
Johannes Berg | 48a2d66 | 2012-03-05 11:24:39 -0800 | [diff] [blame] | 753 | void iwl_tx_cmd_complete(struct iwl_trans *trans, struct iwl_rx_cmd_buffer *rxb, |
Emmanuel Grumbach | 247c61d | 2011-09-20 15:37:23 -0700 | [diff] [blame] | 754 | int handler_status) |
Tomas Winkler | 17b8892 | 2008-05-29 16:35:12 +0800 | [diff] [blame] | 755 | { |
Zhu Yi | 2f30122 | 2009-10-09 17:19:45 +0800 | [diff] [blame] | 756 | struct iwl_rx_packet *pkt = rxb_addr(rxb); |
Tomas Winkler | 17b8892 | 2008-05-29 16:35:12 +0800 | [diff] [blame] | 757 | u16 sequence = le16_to_cpu(pkt->hdr.sequence); |
| 758 | int txq_id = SEQ_TO_QUEUE(sequence); |
| 759 | int index = SEQ_TO_INDEX(sequence); |
Tomas Winkler | 17b8892 | 2008-05-29 16:35:12 +0800 | [diff] [blame] | 760 | int cmd_index; |
Johannes Berg | c2acea8 | 2009-07-24 11:13:05 -0700 | [diff] [blame] | 761 | struct iwl_device_cmd *cmd; |
| 762 | struct iwl_cmd_meta *meta; |
Emmanuel Grumbach | 8ad71be | 2011-08-25 23:11:32 -0700 | [diff] [blame] | 763 | struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans); |
Meenakshi Venkataraman | c6f600f | 2012-03-08 11:29:12 -0800 | [diff] [blame] | 764 | struct iwl_tx_queue *txq = &trans_pcie->txq[trans_pcie->cmd_queue]; |
Tomas Winkler | 17b8892 | 2008-05-29 16:35:12 +0800 | [diff] [blame] | 765 | |
| 766 | /* If a Tx command is being handled and it isn't in the actual |
| 767 | * command queue then there a command routing bug has been introduced |
| 768 | * in the queue management code. */ |
Meenakshi Venkataraman | c6f600f | 2012-03-08 11:29:12 -0800 | [diff] [blame] | 769 | if (WARN(txq_id != trans_pcie->cmd_queue, |
Johannes Berg | 13bb948 | 2010-08-23 10:46:33 +0200 | [diff] [blame] | 770 | "wrong command queue %d (should be %d), sequence 0x%X readp=%d writep=%d\n", |
Johannes Berg | 20d3b64 | 2012-05-16 22:54:29 +0200 | [diff] [blame] | 771 | txq_id, trans_pcie->cmd_queue, sequence, |
| 772 | trans_pcie->txq[trans_pcie->cmd_queue].q.read_ptr, |
| 773 | trans_pcie->txq[trans_pcie->cmd_queue].q.write_ptr)) { |
Emmanuel Grumbach | 3e10cae | 2011-09-06 09:31:18 -0700 | [diff] [blame] | 774 | iwl_print_hex_error(trans, pkt, 32); |
Johannes Berg | 55d6a3c | 2008-09-23 19:18:43 +0200 | [diff] [blame] | 775 | return; |
Winkler, Tomas | 01ef9323 | 2008-11-07 09:58:45 -0800 | [diff] [blame] | 776 | } |
Tomas Winkler | 17b8892 | 2008-05-29 16:35:12 +0800 | [diff] [blame] | 777 | |
Johannes Berg | 015c15e | 2012-03-05 11:24:24 -0800 | [diff] [blame] | 778 | spin_lock(&txq->lock); |
| 779 | |
Johannes Berg | 4ce7cc2 | 2011-05-13 11:57:40 -0700 | [diff] [blame] | 780 | cmd_index = get_cmd_index(&txq->q, index); |
Johannes Berg | bf8440e | 2012-03-19 17:12:06 +0100 | [diff] [blame] | 781 | cmd = txq->entries[cmd_index].cmd; |
| 782 | meta = &txq->entries[cmd_index].meta; |
Tomas Winkler | 17b8892 | 2008-05-29 16:35:12 +0800 | [diff] [blame] | 783 | |
Emmanuel Grumbach | eec373f | 2012-05-16 22:54:23 +0200 | [diff] [blame] | 784 | iwl_unmap_tfd(trans, meta, &txq->tfds[index], DMA_BIDIRECTIONAL); |
Reinette Chatre | c33de62 | 2009-10-30 14:36:10 -0700 | [diff] [blame] | 785 | |
Tomas Winkler | 17b8892 | 2008-05-29 16:35:12 +0800 | [diff] [blame] | 786 | /* Input error checking is done when commands are added to queue. */ |
Johannes Berg | c2acea8 | 2009-07-24 11:13:05 -0700 | [diff] [blame] | 787 | if (meta->flags & CMD_WANT_SKB) { |
Johannes Berg | 48a2d66 | 2012-03-05 11:24:39 -0800 | [diff] [blame] | 788 | struct page *p = rxb_steal_page(rxb); |
Stanislaw Gruszka | 2624e96 | 2011-04-20 16:02:58 +0200 | [diff] [blame] | 789 | |
Johannes Berg | 65b94a4 | 2012-03-05 11:24:38 -0800 | [diff] [blame] | 790 | meta->source->resp_pkt = pkt; |
| 791 | meta->source->_rx_page_addr = (unsigned long)page_address(p); |
Johannes Berg | b2cf410 | 2012-04-09 17:46:51 -0700 | [diff] [blame] | 792 | meta->source->_rx_page_order = trans_pcie->rx_page_order; |
Johannes Berg | 65b94a4 | 2012-03-05 11:24:38 -0800 | [diff] [blame] | 793 | meta->source->handler_status = handler_status; |
Stanislaw Gruszka | 2624e96 | 2011-04-20 16:02:58 +0200 | [diff] [blame] | 794 | } |
Tomas Winkler | 17b8892 | 2008-05-29 16:35:12 +0800 | [diff] [blame] | 795 | |
Emmanuel Grumbach | 3e10cae | 2011-09-06 09:31:18 -0700 | [diff] [blame] | 796 | iwl_hcmd_queue_reclaim(trans, txq_id, index); |
Tomas Winkler | 17b8892 | 2008-05-29 16:35:12 +0800 | [diff] [blame] | 797 | |
Johannes Berg | c2acea8 | 2009-07-24 11:13:05 -0700 | [diff] [blame] | 798 | if (!(meta->flags & CMD_ASYNC)) { |
Don Fry | 74fda97 | 2012-03-20 16:36:54 -0700 | [diff] [blame] | 799 | if (!test_bit(STATUS_HCMD_ACTIVE, &trans_pcie->status)) { |
Wey-Yi Guy | 05c89b9 | 2011-10-10 07:26:48 -0700 | [diff] [blame] | 800 | IWL_WARN(trans, |
| 801 | "HCMD_ACTIVE already clear for command %s\n", |
Johannes Berg | d9fb646 | 2012-03-26 08:23:39 -0700 | [diff] [blame] | 802 | trans_pcie_get_cmd_string(trans_pcie, |
| 803 | cmd->hdr.cmd)); |
Wey-Yi Guy | 05c89b9 | 2011-10-10 07:26:48 -0700 | [diff] [blame] | 804 | } |
Don Fry | 74fda97 | 2012-03-20 16:36:54 -0700 | [diff] [blame] | 805 | clear_bit(STATUS_HCMD_ACTIVE, &trans_pcie->status); |
Emmanuel Grumbach | 6d8f6ee | 2011-08-25 23:11:06 -0700 | [diff] [blame] | 806 | IWL_DEBUG_INFO(trans, "Clearing HCMD_ACTIVE for command %s\n", |
Johannes Berg | d9fb646 | 2012-03-26 08:23:39 -0700 | [diff] [blame] | 807 | trans_pcie_get_cmd_string(trans_pcie, |
| 808 | cmd->hdr.cmd)); |
Meenakshi Venkataraman | 69a10b2 | 2012-03-10 13:00:09 -0800 | [diff] [blame] | 809 | wake_up(&trans->wait_command_queue); |
Tomas Winkler | 17b8892 | 2008-05-29 16:35:12 +0800 | [diff] [blame] | 810 | } |
Stanislaw Gruszka | 3598e17 | 2011-03-31 17:36:26 +0200 | [diff] [blame] | 811 | |
Zhu Yi | dd48744 | 2010-03-22 02:28:41 -0700 | [diff] [blame] | 812 | meta->flags = 0; |
Stanislaw Gruszka | 3598e17 | 2011-03-31 17:36:26 +0200 | [diff] [blame] | 813 | |
Johannes Berg | 015c15e | 2012-03-05 11:24:24 -0800 | [diff] [blame] | 814 | spin_unlock(&txq->lock); |
Tomas Winkler | 17b8892 | 2008-05-29 16:35:12 +0800 | [diff] [blame] | 815 | } |
Emmanuel Grumbach | 253a634 | 2011-07-11 07:39:46 -0700 | [diff] [blame] | 816 | |
Emmanuel Grumbach | 253a634 | 2011-07-11 07:39:46 -0700 | [diff] [blame] | 817 | #define HOST_COMPLETE_TIMEOUT (2 * HZ) |
| 818 | |
Emmanuel Grumbach | 6d8f6ee | 2011-08-25 23:11:06 -0700 | [diff] [blame] | 819 | static int iwl_send_cmd_async(struct iwl_trans *trans, struct iwl_host_cmd *cmd) |
Emmanuel Grumbach | 253a634 | 2011-07-11 07:39:46 -0700 | [diff] [blame] | 820 | { |
Johannes Berg | d9fb646 | 2012-03-26 08:23:39 -0700 | [diff] [blame] | 821 | struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans); |
Emmanuel Grumbach | 253a634 | 2011-07-11 07:39:46 -0700 | [diff] [blame] | 822 | int ret; |
| 823 | |
| 824 | /* An asynchronous command can not expect an SKB to be set. */ |
| 825 | if (WARN_ON(cmd->flags & CMD_WANT_SKB)) |
| 826 | return -EINVAL; |
| 827 | |
Emmanuel Grumbach | 253a634 | 2011-07-11 07:39:46 -0700 | [diff] [blame] | 828 | |
Emmanuel Grumbach | 6d8f6ee | 2011-08-25 23:11:06 -0700 | [diff] [blame] | 829 | ret = iwl_enqueue_hcmd(trans, cmd); |
Emmanuel Grumbach | 253a634 | 2011-07-11 07:39:46 -0700 | [diff] [blame] | 830 | if (ret < 0) { |
Johannes Berg | 721c32f | 2012-03-06 13:30:40 -0800 | [diff] [blame] | 831 | IWL_ERR(trans, |
Todd Previte | b36b110 | 2011-11-10 06:55:02 -0800 | [diff] [blame] | 832 | "Error sending %s: enqueue_hcmd failed: %d\n", |
Johannes Berg | d9fb646 | 2012-03-26 08:23:39 -0700 | [diff] [blame] | 833 | trans_pcie_get_cmd_string(trans_pcie, cmd->id), ret); |
Emmanuel Grumbach | 253a634 | 2011-07-11 07:39:46 -0700 | [diff] [blame] | 834 | return ret; |
| 835 | } |
| 836 | return 0; |
| 837 | } |
| 838 | |
Emmanuel Grumbach | 6d8f6ee | 2011-08-25 23:11:06 -0700 | [diff] [blame] | 839 | static int iwl_send_cmd_sync(struct iwl_trans *trans, struct iwl_host_cmd *cmd) |
Emmanuel Grumbach | 253a634 | 2011-07-11 07:39:46 -0700 | [diff] [blame] | 840 | { |
Emmanuel Grumbach | 8ad71be | 2011-08-25 23:11:32 -0700 | [diff] [blame] | 841 | struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans); |
Emmanuel Grumbach | 253a634 | 2011-07-11 07:39:46 -0700 | [diff] [blame] | 842 | int cmd_idx; |
| 843 | int ret; |
| 844 | |
Emmanuel Grumbach | 6d8f6ee | 2011-08-25 23:11:06 -0700 | [diff] [blame] | 845 | IWL_DEBUG_INFO(trans, "Attempting to send sync command %s\n", |
Johannes Berg | d9fb646 | 2012-03-26 08:23:39 -0700 | [diff] [blame] | 846 | trans_pcie_get_cmd_string(trans_pcie, cmd->id)); |
Emmanuel Grumbach | 253a634 | 2011-07-11 07:39:46 -0700 | [diff] [blame] | 847 | |
Johannes Berg | 2cc39c9 | 2012-03-06 13:30:41 -0800 | [diff] [blame] | 848 | if (WARN_ON(test_and_set_bit(STATUS_HCMD_ACTIVE, |
Don Fry | 74fda97 | 2012-03-20 16:36:54 -0700 | [diff] [blame] | 849 | &trans_pcie->status))) { |
Johannes Berg | 2cc39c9 | 2012-03-06 13:30:41 -0800 | [diff] [blame] | 850 | IWL_ERR(trans, "Command %s: a command is already active!\n", |
Johannes Berg | d9fb646 | 2012-03-26 08:23:39 -0700 | [diff] [blame] | 851 | trans_pcie_get_cmd_string(trans_pcie, cmd->id)); |
Johannes Berg | 2cc39c9 | 2012-03-06 13:30:41 -0800 | [diff] [blame] | 852 | return -EIO; |
| 853 | } |
| 854 | |
Emmanuel Grumbach | 6d8f6ee | 2011-08-25 23:11:06 -0700 | [diff] [blame] | 855 | IWL_DEBUG_INFO(trans, "Setting HCMD_ACTIVE for command %s\n", |
Johannes Berg | d9fb646 | 2012-03-26 08:23:39 -0700 | [diff] [blame] | 856 | trans_pcie_get_cmd_string(trans_pcie, cmd->id)); |
Emmanuel Grumbach | 253a634 | 2011-07-11 07:39:46 -0700 | [diff] [blame] | 857 | |
Emmanuel Grumbach | 6d8f6ee | 2011-08-25 23:11:06 -0700 | [diff] [blame] | 858 | cmd_idx = iwl_enqueue_hcmd(trans, cmd); |
Emmanuel Grumbach | 253a634 | 2011-07-11 07:39:46 -0700 | [diff] [blame] | 859 | if (cmd_idx < 0) { |
| 860 | ret = cmd_idx; |
Don Fry | 74fda97 | 2012-03-20 16:36:54 -0700 | [diff] [blame] | 861 | clear_bit(STATUS_HCMD_ACTIVE, &trans_pcie->status); |
Johannes Berg | 721c32f | 2012-03-06 13:30:40 -0800 | [diff] [blame] | 862 | IWL_ERR(trans, |
Todd Previte | b36b110 | 2011-11-10 06:55:02 -0800 | [diff] [blame] | 863 | "Error sending %s: enqueue_hcmd failed: %d\n", |
Johannes Berg | d9fb646 | 2012-03-26 08:23:39 -0700 | [diff] [blame] | 864 | trans_pcie_get_cmd_string(trans_pcie, cmd->id), ret); |
Emmanuel Grumbach | 253a634 | 2011-07-11 07:39:46 -0700 | [diff] [blame] | 865 | return ret; |
| 866 | } |
| 867 | |
Meenakshi Venkataraman | 69a10b2 | 2012-03-10 13:00:09 -0800 | [diff] [blame] | 868 | ret = wait_event_timeout(trans->wait_command_queue, |
Johannes Berg | 20d3b64 | 2012-05-16 22:54:29 +0200 | [diff] [blame] | 869 | !test_bit(STATUS_HCMD_ACTIVE, |
| 870 | &trans_pcie->status), |
| 871 | HOST_COMPLETE_TIMEOUT); |
Emmanuel Grumbach | 253a634 | 2011-07-11 07:39:46 -0700 | [diff] [blame] | 872 | if (!ret) { |
Don Fry | 74fda97 | 2012-03-20 16:36:54 -0700 | [diff] [blame] | 873 | if (test_bit(STATUS_HCMD_ACTIVE, &trans_pcie->status)) { |
Wey-Yi Guy | d10630a | 2011-10-10 07:26:46 -0700 | [diff] [blame] | 874 | struct iwl_tx_queue *txq = |
Meenakshi Venkataraman | c6f600f | 2012-03-08 11:29:12 -0800 | [diff] [blame] | 875 | &trans_pcie->txq[trans_pcie->cmd_queue]; |
Wey-Yi Guy | d10630a | 2011-10-10 07:26:46 -0700 | [diff] [blame] | 876 | struct iwl_queue *q = &txq->q; |
| 877 | |
Johannes Berg | 721c32f | 2012-03-06 13:30:40 -0800 | [diff] [blame] | 878 | IWL_ERR(trans, |
Emmanuel Grumbach | 253a634 | 2011-07-11 07:39:46 -0700 | [diff] [blame] | 879 | "Error sending %s: time out after %dms.\n", |
Johannes Berg | d9fb646 | 2012-03-26 08:23:39 -0700 | [diff] [blame] | 880 | trans_pcie_get_cmd_string(trans_pcie, cmd->id), |
Emmanuel Grumbach | 253a634 | 2011-07-11 07:39:46 -0700 | [diff] [blame] | 881 | jiffies_to_msecs(HOST_COMPLETE_TIMEOUT)); |
| 882 | |
Johannes Berg | 721c32f | 2012-03-06 13:30:40 -0800 | [diff] [blame] | 883 | IWL_ERR(trans, |
Wey-Yi Guy | d10630a | 2011-10-10 07:26:46 -0700 | [diff] [blame] | 884 | "Current CMD queue read_ptr %d write_ptr %d\n", |
| 885 | q->read_ptr, q->write_ptr); |
| 886 | |
Don Fry | 74fda97 | 2012-03-20 16:36:54 -0700 | [diff] [blame] | 887 | clear_bit(STATUS_HCMD_ACTIVE, &trans_pcie->status); |
Johannes Berg | d9fb646 | 2012-03-26 08:23:39 -0700 | [diff] [blame] | 888 | IWL_DEBUG_INFO(trans, |
| 889 | "Clearing HCMD_ACTIVE for command %s\n", |
| 890 | trans_pcie_get_cmd_string(trans_pcie, |
| 891 | cmd->id)); |
Emmanuel Grumbach | 253a634 | 2011-07-11 07:39:46 -0700 | [diff] [blame] | 892 | ret = -ETIMEDOUT; |
| 893 | goto cancel; |
| 894 | } |
| 895 | } |
| 896 | |
Johannes Berg | 65b94a4 | 2012-03-05 11:24:38 -0800 | [diff] [blame] | 897 | if ((cmd->flags & CMD_WANT_SKB) && !cmd->resp_pkt) { |
Emmanuel Grumbach | 6d8f6ee | 2011-08-25 23:11:06 -0700 | [diff] [blame] | 898 | IWL_ERR(trans, "Error: Response NULL in '%s'\n", |
Johannes Berg | d9fb646 | 2012-03-26 08:23:39 -0700 | [diff] [blame] | 899 | trans_pcie_get_cmd_string(trans_pcie, cmd->id)); |
Emmanuel Grumbach | 253a634 | 2011-07-11 07:39:46 -0700 | [diff] [blame] | 900 | ret = -EIO; |
| 901 | goto cancel; |
| 902 | } |
| 903 | |
| 904 | return 0; |
| 905 | |
| 906 | cancel: |
| 907 | if (cmd->flags & CMD_WANT_SKB) { |
| 908 | /* |
| 909 | * Cancel the CMD_WANT_SKB flag for the cmd in the |
| 910 | * TX cmd queue. Otherwise in case the cmd comes |
| 911 | * in later, it will possibly set an invalid |
| 912 | * address (cmd->meta.source). |
| 913 | */ |
Johannes Berg | bf8440e | 2012-03-19 17:12:06 +0100 | [diff] [blame] | 914 | trans_pcie->txq[trans_pcie->cmd_queue]. |
| 915 | entries[cmd_idx].meta.flags &= ~CMD_WANT_SKB; |
Emmanuel Grumbach | 253a634 | 2011-07-11 07:39:46 -0700 | [diff] [blame] | 916 | } |
Emmanuel Grumbach | 9cac494 | 2011-11-10 06:55:20 -0800 | [diff] [blame] | 917 | |
Johannes Berg | 65b94a4 | 2012-03-05 11:24:38 -0800 | [diff] [blame] | 918 | if (cmd->resp_pkt) { |
| 919 | iwl_free_resp(cmd); |
| 920 | cmd->resp_pkt = NULL; |
Emmanuel Grumbach | 253a634 | 2011-07-11 07:39:46 -0700 | [diff] [blame] | 921 | } |
| 922 | |
| 923 | return ret; |
| 924 | } |
| 925 | |
Emmanuel Grumbach | 6d8f6ee | 2011-08-25 23:11:06 -0700 | [diff] [blame] | 926 | int iwl_trans_pcie_send_cmd(struct iwl_trans *trans, struct iwl_host_cmd *cmd) |
Emmanuel Grumbach | 253a634 | 2011-07-11 07:39:46 -0700 | [diff] [blame] | 927 | { |
| 928 | if (cmd->flags & CMD_ASYNC) |
Emmanuel Grumbach | 6d8f6ee | 2011-08-25 23:11:06 -0700 | [diff] [blame] | 929 | return iwl_send_cmd_async(trans, cmd); |
Emmanuel Grumbach | 253a634 | 2011-07-11 07:39:46 -0700 | [diff] [blame] | 930 | |
Emmanuel Grumbach | 6d8f6ee | 2011-08-25 23:11:06 -0700 | [diff] [blame] | 931 | return iwl_send_cmd_sync(trans, cmd); |
Emmanuel Grumbach | 253a634 | 2011-07-11 07:39:46 -0700 | [diff] [blame] | 932 | } |
| 933 | |
Emmanuel Grumbach | a0eaad7 | 2011-08-25 23:11:00 -0700 | [diff] [blame] | 934 | /* Frees buffers until index _not_ inclusive */ |
Emmanuel Grumbach | 464021f | 2011-08-25 23:11:26 -0700 | [diff] [blame] | 935 | int iwl_tx_queue_reclaim(struct iwl_trans *trans, int txq_id, int index, |
| 936 | struct sk_buff_head *skbs) |
Emmanuel Grumbach | a0eaad7 | 2011-08-25 23:11:00 -0700 | [diff] [blame] | 937 | { |
Emmanuel Grumbach | 8ad71be | 2011-08-25 23:11:32 -0700 | [diff] [blame] | 938 | struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans); |
| 939 | struct iwl_tx_queue *txq = &trans_pcie->txq[txq_id]; |
Emmanuel Grumbach | a0eaad7 | 2011-08-25 23:11:00 -0700 | [diff] [blame] | 940 | struct iwl_queue *q = &txq->q; |
Emmanuel Grumbach | a0eaad7 | 2011-08-25 23:11:00 -0700 | [diff] [blame] | 941 | int last_to_free; |
Emmanuel Grumbach | 464021f | 2011-08-25 23:11:26 -0700 | [diff] [blame] | 942 | int freed = 0; |
Emmanuel Grumbach | a0eaad7 | 2011-08-25 23:11:00 -0700 | [diff] [blame] | 943 | |
Emmanuel Grumbach | 39644e9 | 2011-09-15 11:46:29 -0700 | [diff] [blame] | 944 | /* This function is not meant to release cmd queue*/ |
Meenakshi Venkataraman | c6f600f | 2012-03-08 11:29:12 -0800 | [diff] [blame] | 945 | if (WARN_ON(txq_id == trans_pcie->cmd_queue)) |
Emmanuel Grumbach | 39644e9 | 2011-09-15 11:46:29 -0700 | [diff] [blame] | 946 | return 0; |
| 947 | |
Johannes Berg | 015c15e | 2012-03-05 11:24:24 -0800 | [diff] [blame] | 948 | lockdep_assert_held(&txq->lock); |
| 949 | |
Emmanuel Grumbach | a0eaad7 | 2011-08-25 23:11:00 -0700 | [diff] [blame] | 950 | /*Since we free until index _not_ inclusive, the one before index is |
| 951 | * the last we will free. This one must be used */ |
| 952 | last_to_free = iwl_queue_dec_wrap(index, q->n_bd); |
| 953 | |
| 954 | if ((index >= q->n_bd) || |
| 955 | (iwl_queue_used(q, last_to_free) == 0)) { |
Johannes Berg | 20d3b64 | 2012-05-16 22:54:29 +0200 | [diff] [blame] | 956 | IWL_ERR(trans, |
| 957 | "%s: Read index for DMA queue txq id (%d), last_to_free %d is out of range [0-%d] %d %d.\n", |
| 958 | __func__, txq_id, last_to_free, q->n_bd, |
| 959 | q->write_ptr, q->read_ptr); |
Emmanuel Grumbach | 464021f | 2011-08-25 23:11:26 -0700 | [diff] [blame] | 960 | return 0; |
Emmanuel Grumbach | a0eaad7 | 2011-08-25 23:11:00 -0700 | [diff] [blame] | 961 | } |
| 962 | |
Emmanuel Grumbach | a0eaad7 | 2011-08-25 23:11:00 -0700 | [diff] [blame] | 963 | if (WARN_ON(!skb_queue_empty(skbs))) |
Emmanuel Grumbach | 464021f | 2011-08-25 23:11:26 -0700 | [diff] [blame] | 964 | return 0; |
Emmanuel Grumbach | a0eaad7 | 2011-08-25 23:11:00 -0700 | [diff] [blame] | 965 | |
| 966 | for (; |
| 967 | q->read_ptr != index; |
| 968 | q->read_ptr = iwl_queue_inc_wrap(q->read_ptr, q->n_bd)) { |
| 969 | |
Johannes Berg | bf8440e | 2012-03-19 17:12:06 +0100 | [diff] [blame] | 970 | if (WARN_ON_ONCE(txq->entries[txq->q.read_ptr].skb == NULL)) |
Emmanuel Grumbach | a0eaad7 | 2011-08-25 23:11:00 -0700 | [diff] [blame] | 971 | continue; |
| 972 | |
Johannes Berg | bf8440e | 2012-03-19 17:12:06 +0100 | [diff] [blame] | 973 | __skb_queue_tail(skbs, txq->entries[txq->q.read_ptr].skb); |
Emmanuel Grumbach | a0eaad7 | 2011-08-25 23:11:00 -0700 | [diff] [blame] | 974 | |
Johannes Berg | bf8440e | 2012-03-19 17:12:06 +0100 | [diff] [blame] | 975 | txq->entries[txq->q.read_ptr].skb = NULL; |
Emmanuel Grumbach | a0eaad7 | 2011-08-25 23:11:00 -0700 | [diff] [blame] | 976 | |
Emmanuel Grumbach | 6d8f6ee | 2011-08-25 23:11:06 -0700 | [diff] [blame] | 977 | iwlagn_txq_inval_byte_cnt_tbl(trans, txq); |
Emmanuel Grumbach | a0eaad7 | 2011-08-25 23:11:00 -0700 | [diff] [blame] | 978 | |
Emmanuel Grumbach | bc2529c | 2012-05-16 22:54:22 +0200 | [diff] [blame] | 979 | iwl_txq_free_tfd(trans, txq, DMA_TO_DEVICE); |
Emmanuel Grumbach | 464021f | 2011-08-25 23:11:26 -0700 | [diff] [blame] | 980 | freed++; |
Emmanuel Grumbach | a0eaad7 | 2011-08-25 23:11:00 -0700 | [diff] [blame] | 981 | } |
Johannes Berg | 7c5ba4a | 2012-04-09 17:46:54 -0700 | [diff] [blame] | 982 | |
| 983 | iwl_queue_progress(trans_pcie, txq); |
| 984 | |
Emmanuel Grumbach | 464021f | 2011-08-25 23:11:26 -0700 | [diff] [blame] | 985 | return freed; |
Emmanuel Grumbach | a0eaad7 | 2011-08-25 23:11:00 -0700 | [diff] [blame] | 986 | } |