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Linus Torvalds1da177e2005-04-16 15:20:36 -07001/*
2 * File: msi.c
3 * Purpose: PCI Message Signaled Interrupt (MSI)
4 *
5 * Copyright (C) 2003-2004 Intel
6 * Copyright (C) Tom Long Nguyen (tom.l.nguyen@intel.com)
Christoph Hellwigaff17162016-07-12 18:20:17 +09007 * Copyright (C) 2016 Christoph Hellwig.
Linus Torvalds1da177e2005-04-16 15:20:36 -07008 */
9
Eric W. Biederman1ce03372006-10-04 02:16:41 -070010#include <linux/err.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070011#include <linux/mm.h>
12#include <linux/irq.h>
13#include <linux/interrupt.h>
Paul Gortmaker363c75d2011-05-27 09:37:25 -040014#include <linux/export.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070015#include <linux/ioport.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070016#include <linux/pci.h>
17#include <linux/proc_fs.h>
Eric W. Biederman3b7d1922006-10-04 02:16:59 -070018#include <linux/msi.h>
Dan Williams4fdadeb2007-04-26 18:21:38 -070019#include <linux/smp.h>
Hidetoshi Seto500559a2009-08-10 10:14:15 +090020#include <linux/errno.h>
21#include <linux/io.h>
Tejun Heo5a0e3ad2010-03-24 17:04:11 +090022#include <linux/slab.h>
Jiang Liu3878eae2014-11-11 21:02:18 +080023#include <linux/irqdomain.h>
David Daneyb6eec9b2015-10-08 15:10:49 -070024#include <linux/of_irq.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070025
26#include "pci.h"
Linus Torvalds1da177e2005-04-16 15:20:36 -070027
Linus Torvalds1da177e2005-04-16 15:20:36 -070028static int pci_msi_enable = 1;
Yijing Wang38737d82014-10-27 10:44:36 +080029int pci_msi_ignore_mask;
Linus Torvalds1da177e2005-04-16 15:20:36 -070030
Bjorn Helgaas527eee22013-04-17 17:44:48 -060031#define msix_table_size(flags) ((flags & PCI_MSIX_FLAGS_QSIZE) + 1)
32
Jiang Liu8e047ad2014-11-15 22:24:07 +080033#ifdef CONFIG_PCI_MSI_IRQ_DOMAIN
34static struct irq_domain *pci_msi_default_domain;
35static DEFINE_MUTEX(pci_msi_domain_lock);
36
37struct irq_domain * __weak arch_get_pci_msi_domain(struct pci_dev *dev)
38{
39 return pci_msi_default_domain;
40}
41
Marc Zyngier020c3122014-11-15 10:49:12 +000042static struct irq_domain *pci_msi_get_domain(struct pci_dev *dev)
43{
Marc Zyngierd8a1cb72015-07-28 14:46:14 +010044 struct irq_domain *domain;
Marc Zyngier020c3122014-11-15 10:49:12 +000045
Marc Zyngierd8a1cb72015-07-28 14:46:14 +010046 domain = dev_get_msi_domain(&dev->dev);
47 if (domain)
48 return domain;
Marc Zyngier020c3122014-11-15 10:49:12 +000049
Marc Zyngierd8a1cb72015-07-28 14:46:14 +010050 return arch_get_pci_msi_domain(dev);
Marc Zyngier020c3122014-11-15 10:49:12 +000051}
52
Jiang Liu8e047ad2014-11-15 22:24:07 +080053static int pci_msi_setup_msi_irqs(struct pci_dev *dev, int nvec, int type)
54{
55 struct irq_domain *domain;
56
Marc Zyngier020c3122014-11-15 10:49:12 +000057 domain = pci_msi_get_domain(dev);
Marc Zyngier3845d292015-12-04 10:28:14 -060058 if (domain && irq_domain_is_hierarchy(domain))
Jiang Liu8e047ad2014-11-15 22:24:07 +080059 return pci_msi_domain_alloc_irqs(domain, dev, nvec, type);
60
61 return arch_setup_msi_irqs(dev, nvec, type);
62}
63
64static void pci_msi_teardown_msi_irqs(struct pci_dev *dev)
65{
66 struct irq_domain *domain;
67
Marc Zyngier020c3122014-11-15 10:49:12 +000068 domain = pci_msi_get_domain(dev);
Marc Zyngier3845d292015-12-04 10:28:14 -060069 if (domain && irq_domain_is_hierarchy(domain))
Jiang Liu8e047ad2014-11-15 22:24:07 +080070 pci_msi_domain_free_irqs(domain, dev);
71 else
72 arch_teardown_msi_irqs(dev);
73}
74#else
75#define pci_msi_setup_msi_irqs arch_setup_msi_irqs
76#define pci_msi_teardown_msi_irqs arch_teardown_msi_irqs
77#endif
Bjorn Helgaas527eee22013-04-17 17:44:48 -060078
Adrian Bunk6a9e7f22007-12-11 23:19:41 +010079/* Arch hooks */
80
Thomas Petazzoni4287d822013-08-09 22:27:06 +020081int __weak arch_setup_msi_irq(struct pci_dev *dev, struct msi_desc *desc)
82{
Lorenzo Pieralisi2291ec02015-08-03 22:04:06 -050083 struct msi_controller *chip = dev->bus->msi;
Thierry Reding0cbdcfc2013-08-09 22:27:08 +020084 int err;
85
86 if (!chip || !chip->setup_irq)
87 return -EINVAL;
88
89 err = chip->setup_irq(chip, dev, desc);
90 if (err < 0)
91 return err;
92
93 irq_set_chip_data(desc->irq, chip);
94
95 return 0;
Thomas Petazzoni4287d822013-08-09 22:27:06 +020096}
97
98void __weak arch_teardown_msi_irq(unsigned int irq)
99{
Yijing Wangc2791b82014-11-11 17:45:45 -0700100 struct msi_controller *chip = irq_get_chip_data(irq);
Thierry Reding0cbdcfc2013-08-09 22:27:08 +0200101
102 if (!chip || !chip->teardown_irq)
103 return;
104
105 chip->teardown_irq(chip, irq);
Thomas Petazzoni4287d822013-08-09 22:27:06 +0200106}
107
Thomas Petazzoni4287d822013-08-09 22:27:06 +0200108int __weak arch_setup_msi_irqs(struct pci_dev *dev, int nvec, int type)
Adrian Bunk6a9e7f22007-12-11 23:19:41 +0100109{
Lucas Stach339e5b42015-09-18 13:58:34 -0500110 struct msi_controller *chip = dev->bus->msi;
Adrian Bunk6a9e7f22007-12-11 23:19:41 +0100111 struct msi_desc *entry;
112 int ret;
113
Lucas Stach339e5b42015-09-18 13:58:34 -0500114 if (chip && chip->setup_irqs)
115 return chip->setup_irqs(chip, dev, nvec, type);
Matthew Wilcox1c8d7b02009-03-17 08:54:10 -0400116 /*
117 * If an architecture wants to support multiple MSI, it needs to
118 * override arch_setup_msi_irqs()
119 */
120 if (type == PCI_CAP_ID_MSI && nvec > 1)
121 return 1;
122
Jiang Liu5004e982015-07-09 16:00:41 +0800123 for_each_pci_msi_entry(entry, dev) {
Adrian Bunk6a9e7f22007-12-11 23:19:41 +0100124 ret = arch_setup_msi_irq(dev, entry);
Michael Ellermanb5fbf532009-02-11 22:27:02 +1100125 if (ret < 0)
Adrian Bunk6a9e7f22007-12-11 23:19:41 +0100126 return ret;
Michael Ellermanb5fbf532009-02-11 22:27:02 +1100127 if (ret > 0)
128 return -ENOSPC;
Adrian Bunk6a9e7f22007-12-11 23:19:41 +0100129 }
130
131 return 0;
132}
133
Thomas Petazzoni4287d822013-08-09 22:27:06 +0200134/*
135 * We have a default implementation available as a separate non-weak
136 * function, as it is used by the Xen x86 PCI code
137 */
Thomas Gleixner1525bf02010-10-06 16:05:35 -0400138void default_teardown_msi_irqs(struct pci_dev *dev)
Adrian Bunk6a9e7f22007-12-11 23:19:41 +0100139{
Jiang Liu63a7b172014-11-06 22:20:32 +0800140 int i;
Adrian Bunk6a9e7f22007-12-11 23:19:41 +0100141 struct msi_desc *entry;
142
Jiang Liu5004e982015-07-09 16:00:41 +0800143 for_each_pci_msi_entry(entry, dev)
Jiang Liu63a7b172014-11-06 22:20:32 +0800144 if (entry->irq)
145 for (i = 0; i < entry->nvec_used; i++)
146 arch_teardown_msi_irq(entry->irq + i);
Adrian Bunk6a9e7f22007-12-11 23:19:41 +0100147}
148
Thomas Petazzoni4287d822013-08-09 22:27:06 +0200149void __weak arch_teardown_msi_irqs(struct pci_dev *dev)
150{
151 return default_teardown_msi_irqs(dev);
152}
Konrad Rzeszutek Wilk76ccc292011-12-16 17:38:18 -0500153
DuanZhenzhongac8344c2013-12-04 13:09:16 +0800154static void default_restore_msi_irq(struct pci_dev *dev, int irq)
Konrad Rzeszutek Wilk76ccc292011-12-16 17:38:18 -0500155{
156 struct msi_desc *entry;
157
158 entry = NULL;
159 if (dev->msix_enabled) {
Jiang Liu5004e982015-07-09 16:00:41 +0800160 for_each_pci_msi_entry(entry, dev) {
Konrad Rzeszutek Wilk76ccc292011-12-16 17:38:18 -0500161 if (irq == entry->irq)
162 break;
163 }
164 } else if (dev->msi_enabled) {
165 entry = irq_get_msi_desc(irq);
166 }
167
168 if (entry)
Jiang Liu83a18912014-11-09 23:10:34 +0800169 __pci_write_msi_msg(entry, &entry->msg);
Konrad Rzeszutek Wilk76ccc292011-12-16 17:38:18 -0500170}
Thomas Petazzoni4287d822013-08-09 22:27:06 +0200171
DuanZhenzhongac8344c2013-12-04 13:09:16 +0800172void __weak arch_restore_msi_irqs(struct pci_dev *dev)
Thomas Petazzoni4287d822013-08-09 22:27:06 +0200173{
DuanZhenzhongac8344c2013-12-04 13:09:16 +0800174 return default_restore_msi_irqs(dev);
Thomas Petazzoni4287d822013-08-09 22:27:06 +0200175}
Konrad Rzeszutek Wilk76ccc292011-12-16 17:38:18 -0500176
Matthew Wilcoxbffac3c2009-01-21 19:19:19 -0500177static inline __attribute_const__ u32 msi_mask(unsigned x)
178{
Matthew Wilcox0b49ec32009-02-08 20:27:47 -0700179 /* Don't shift by >= width of type */
180 if (x >= 5)
181 return 0xffffffff;
182 return (1 << (1 << x)) - 1;
Matthew Wilcoxbffac3c2009-01-21 19:19:19 -0500183}
184
Matthew Wilcoxce6fce42008-07-25 15:42:58 -0600185/*
186 * PCI 2.3 does not specify mask bits for each MSI interrupt. Attempting to
187 * mask all MSI interrupts by clearing the MSI enable bit does not work
188 * reliably as devices without an INTx disable bit will then generate a
189 * level IRQ which will never be cleared.
Matthew Wilcoxce6fce42008-07-25 15:42:58 -0600190 */
Thomas Gleixner23ed8d52014-11-23 11:55:58 +0100191u32 __pci_msi_desc_mask_irq(struct msi_desc *desc, u32 mask, u32 flag)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700192{
Matthew Wilcoxf2440d92009-03-17 08:54:09 -0400193 u32 mask_bits = desc->masked;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700194
Yijing Wang38737d82014-10-27 10:44:36 +0800195 if (pci_msi_ignore_mask || !desc->msi_attrib.maskbit)
Hidetoshi Seto12abb8b2009-06-24 12:08:09 +0900196 return 0;
Matthew Wilcoxf2440d92009-03-17 08:54:09 -0400197
198 mask_bits &= ~mask;
199 mask_bits |= flag;
Jiang Liue39758e2015-07-09 16:00:43 +0800200 pci_write_config_dword(msi_desc_to_pci_dev(desc), desc->mask_pos,
201 mask_bits);
Hidetoshi Seto12abb8b2009-06-24 12:08:09 +0900202
203 return mask_bits;
204}
205
206static void msi_mask_irq(struct msi_desc *desc, u32 mask, u32 flag)
207{
Thomas Gleixner23ed8d52014-11-23 11:55:58 +0100208 desc->masked = __pci_msi_desc_mask_irq(desc, mask, flag);
Matthew Wilcoxf2440d92009-03-17 08:54:09 -0400209}
210
Christoph Hellwig5eb6d662016-07-12 18:20:14 +0900211static void __iomem *pci_msix_desc_addr(struct msi_desc *desc)
212{
213 return desc->mask_base +
214 desc->msi_attrib.entry_nr * PCI_MSIX_ENTRY_SIZE;
215}
216
Matthew Wilcoxf2440d92009-03-17 08:54:09 -0400217/*
218 * This internal function does not flush PCI writes to the device.
219 * All users must ensure that they read from the device before either
220 * assuming that the device state is up to date, or returning out of this
221 * file. This saves a few milliseconds when initialising devices with lots
222 * of MSI-X interrupts.
223 */
Thomas Gleixner23ed8d52014-11-23 11:55:58 +0100224u32 __pci_msix_desc_mask_irq(struct msi_desc *desc, u32 flag)
Matthew Wilcoxf2440d92009-03-17 08:54:09 -0400225{
226 u32 mask_bits = desc->masked;
Yijing Wang38737d82014-10-27 10:44:36 +0800227
228 if (pci_msi_ignore_mask)
229 return 0;
230
Sheng Yang8d805282010-11-11 15:46:55 +0800231 mask_bits &= ~PCI_MSIX_ENTRY_CTRL_MASKBIT;
232 if (flag)
233 mask_bits |= PCI_MSIX_ENTRY_CTRL_MASKBIT;
Christoph Hellwig5eb6d662016-07-12 18:20:14 +0900234 writel(mask_bits, pci_msix_desc_addr(desc) + PCI_MSIX_ENTRY_VECTOR_CTRL);
Hidetoshi Seto12abb8b2009-06-24 12:08:09 +0900235
236 return mask_bits;
237}
238
239static void msix_mask_irq(struct msi_desc *desc, u32 flag)
240{
Thomas Gleixner23ed8d52014-11-23 11:55:58 +0100241 desc->masked = __pci_msix_desc_mask_irq(desc, flag);
Matthew Wilcoxf2440d92009-03-17 08:54:09 -0400242}
243
Thomas Gleixner1c9db522010-09-28 16:46:51 +0200244static void msi_set_mask_bit(struct irq_data *data, u32 flag)
Matthew Wilcoxf2440d92009-03-17 08:54:09 -0400245{
Jiang Liuc391f262015-06-01 16:05:41 +0800246 struct msi_desc *desc = irq_data_get_msi_desc(data);
Matthew Wilcoxf2440d92009-03-17 08:54:09 -0400247
248 if (desc->msi_attrib.is_msix) {
249 msix_mask_irq(desc, flag);
250 readl(desc->mask_base); /* Flush write to device */
Matthew Wilcox24d27552009-03-17 08:54:06 -0400251 } else {
Yijing Wanga281b782014-07-08 10:08:55 +0800252 unsigned offset = data->irq - desc->irq;
Matthew Wilcox1c8d7b02009-03-17 08:54:10 -0400253 msi_mask_irq(desc, 1 << offset, flag << offset);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700254 }
Matthew Wilcoxf2440d92009-03-17 08:54:09 -0400255}
256
Thomas Gleixner23ed8d52014-11-23 11:55:58 +0100257/**
258 * pci_msi_mask_irq - Generic irq chip callback to mask PCI/MSI interrupts
259 * @data: pointer to irqdata associated to that interrupt
260 */
261void pci_msi_mask_irq(struct irq_data *data)
Matthew Wilcoxf2440d92009-03-17 08:54:09 -0400262{
Thomas Gleixner1c9db522010-09-28 16:46:51 +0200263 msi_set_mask_bit(data, 1);
Matthew Wilcoxf2440d92009-03-17 08:54:09 -0400264}
Jake Oshinsa4289dc2015-12-10 17:52:59 +0000265EXPORT_SYMBOL_GPL(pci_msi_mask_irq);
Matthew Wilcoxf2440d92009-03-17 08:54:09 -0400266
Thomas Gleixner23ed8d52014-11-23 11:55:58 +0100267/**
268 * pci_msi_unmask_irq - Generic irq chip callback to unmask PCI/MSI interrupts
269 * @data: pointer to irqdata associated to that interrupt
270 */
271void pci_msi_unmask_irq(struct irq_data *data)
Matthew Wilcoxf2440d92009-03-17 08:54:09 -0400272{
Thomas Gleixner1c9db522010-09-28 16:46:51 +0200273 msi_set_mask_bit(data, 0);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700274}
Jake Oshinsa4289dc2015-12-10 17:52:59 +0000275EXPORT_SYMBOL_GPL(pci_msi_unmask_irq);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700276
DuanZhenzhongac8344c2013-12-04 13:09:16 +0800277void default_restore_msi_irqs(struct pci_dev *dev)
278{
279 struct msi_desc *entry;
280
Jiang Liu5004e982015-07-09 16:00:41 +0800281 for_each_pci_msi_entry(entry, dev)
DuanZhenzhongac8344c2013-12-04 13:09:16 +0800282 default_restore_msi_irq(dev, entry->irq);
DuanZhenzhongac8344c2013-12-04 13:09:16 +0800283}
284
Jiang Liu891d4a42014-11-09 23:10:33 +0800285void __pci_read_msi_msg(struct msi_desc *entry, struct msi_msg *msg)
Eric W. Biederman0366f8f2006-10-04 02:16:33 -0700286{
Jiang Liue39758e2015-07-09 16:00:43 +0800287 struct pci_dev *dev = msi_desc_to_pci_dev(entry);
288
289 BUG_ON(dev->current_state != PCI_D0);
Eric W. Biederman0366f8f2006-10-04 02:16:33 -0700290
Ben Hutchings30da5522010-07-23 14:56:28 +0100291 if (entry->msi_attrib.is_msix) {
Christoph Hellwig5eb6d662016-07-12 18:20:14 +0900292 void __iomem *base = pci_msix_desc_addr(entry);
Ben Hutchings30da5522010-07-23 14:56:28 +0100293
294 msg->address_lo = readl(base + PCI_MSIX_ENTRY_LOWER_ADDR);
295 msg->address_hi = readl(base + PCI_MSIX_ENTRY_UPPER_ADDR);
296 msg->data = readl(base + PCI_MSIX_ENTRY_DATA);
297 } else {
Bjorn Helgaasf5322162013-04-17 17:34:36 -0600298 int pos = dev->msi_cap;
Ben Hutchings30da5522010-07-23 14:56:28 +0100299 u16 data;
300
Bjorn Helgaas9925ad02013-04-17 17:39:57 -0600301 pci_read_config_dword(dev, pos + PCI_MSI_ADDRESS_LO,
302 &msg->address_lo);
Ben Hutchings30da5522010-07-23 14:56:28 +0100303 if (entry->msi_attrib.is_64) {
Bjorn Helgaas9925ad02013-04-17 17:39:57 -0600304 pci_read_config_dword(dev, pos + PCI_MSI_ADDRESS_HI,
305 &msg->address_hi);
Bjorn Helgaas2f221342013-04-17 17:41:13 -0600306 pci_read_config_word(dev, pos + PCI_MSI_DATA_64, &data);
Ben Hutchings30da5522010-07-23 14:56:28 +0100307 } else {
308 msg->address_hi = 0;
Bjorn Helgaas2f221342013-04-17 17:41:13 -0600309 pci_read_config_word(dev, pos + PCI_MSI_DATA_32, &data);
Ben Hutchings30da5522010-07-23 14:56:28 +0100310 }
311 msg->data = data;
312 }
Eric W. Biederman0366f8f2006-10-04 02:16:33 -0700313}
314
Jiang Liu83a18912014-11-09 23:10:34 +0800315void __pci_write_msi_msg(struct msi_desc *entry, struct msi_msg *msg)
Yinghai Lu3145e942008-12-05 18:58:34 -0800316{
Jiang Liue39758e2015-07-09 16:00:43 +0800317 struct pci_dev *dev = msi_desc_to_pci_dev(entry);
318
319 if (dev->current_state != PCI_D0) {
Ben Hutchingsfcd097f2010-06-17 20:16:36 +0100320 /* Don't touch the hardware now */
321 } else if (entry->msi_attrib.is_msix) {
Christoph Hellwig5eb6d662016-07-12 18:20:14 +0900322 void __iomem *base = pci_msix_desc_addr(entry);
Matthew Wilcox24d27552009-03-17 08:54:06 -0400323
Hidetoshi Seto2c21fd42009-06-23 17:40:04 +0900324 writel(msg->address_lo, base + PCI_MSIX_ENTRY_LOWER_ADDR);
325 writel(msg->address_hi, base + PCI_MSIX_ENTRY_UPPER_ADDR);
326 writel(msg->data, base + PCI_MSIX_ENTRY_DATA);
Matthew Wilcox24d27552009-03-17 08:54:06 -0400327 } else {
Bjorn Helgaasf5322162013-04-17 17:34:36 -0600328 int pos = dev->msi_cap;
Matthew Wilcox1c8d7b02009-03-17 08:54:10 -0400329 u16 msgctl;
330
Bjorn Helgaasf84ecd22013-04-17 17:38:32 -0600331 pci_read_config_word(dev, pos + PCI_MSI_FLAGS, &msgctl);
Matthew Wilcox1c8d7b02009-03-17 08:54:10 -0400332 msgctl &= ~PCI_MSI_FLAGS_QSIZE;
333 msgctl |= entry->msi_attrib.multiple << 4;
Bjorn Helgaasf84ecd22013-04-17 17:38:32 -0600334 pci_write_config_word(dev, pos + PCI_MSI_FLAGS, msgctl);
Eric W. Biederman0366f8f2006-10-04 02:16:33 -0700335
Bjorn Helgaas9925ad02013-04-17 17:39:57 -0600336 pci_write_config_dword(dev, pos + PCI_MSI_ADDRESS_LO,
337 msg->address_lo);
Eric W. Biederman0366f8f2006-10-04 02:16:33 -0700338 if (entry->msi_attrib.is_64) {
Bjorn Helgaas9925ad02013-04-17 17:39:57 -0600339 pci_write_config_dword(dev, pos + PCI_MSI_ADDRESS_HI,
340 msg->address_hi);
Bjorn Helgaas2f221342013-04-17 17:41:13 -0600341 pci_write_config_word(dev, pos + PCI_MSI_DATA_64,
342 msg->data);
Eric W. Biederman0366f8f2006-10-04 02:16:33 -0700343 } else {
Bjorn Helgaas2f221342013-04-17 17:41:13 -0600344 pci_write_config_word(dev, pos + PCI_MSI_DATA_32,
345 msg->data);
Eric W. Biederman0366f8f2006-10-04 02:16:33 -0700346 }
Eric W. Biederman0366f8f2006-10-04 02:16:33 -0700347 }
Eric W. Biederman392ee1e2007-03-08 13:04:57 -0700348 entry->msg = *msg;
Eric W. Biederman0366f8f2006-10-04 02:16:33 -0700349}
350
Jiang Liu83a18912014-11-09 23:10:34 +0800351void pci_write_msi_msg(unsigned int irq, struct msi_msg *msg)
Yinghai Lu3145e942008-12-05 18:58:34 -0800352{
Thomas Gleixnerdced35a2011-03-28 17:49:12 +0200353 struct msi_desc *entry = irq_get_msi_desc(irq);
Yinghai Lu3145e942008-12-05 18:58:34 -0800354
Jiang Liu83a18912014-11-09 23:10:34 +0800355 __pci_write_msi_msg(entry, msg);
Yinghai Lu3145e942008-12-05 18:58:34 -0800356}
Jiang Liu83a18912014-11-09 23:10:34 +0800357EXPORT_SYMBOL_GPL(pci_write_msi_msg);
Yinghai Lu3145e942008-12-05 18:58:34 -0800358
Hidetoshi Setof56e4482009-08-06 11:32:51 +0900359static void free_msi_irqs(struct pci_dev *dev)
360{
Jiang Liu5004e982015-07-09 16:00:41 +0800361 struct list_head *msi_list = dev_to_msi_list(&dev->dev);
Hidetoshi Setof56e4482009-08-06 11:32:51 +0900362 struct msi_desc *entry, *tmp;
Greg Kroah-Hartman1c51b502013-12-19 12:30:17 -0800363 struct attribute **msi_attrs;
364 struct device_attribute *dev_attr;
Jiang Liu63a7b172014-11-06 22:20:32 +0800365 int i, count = 0;
Hidetoshi Setof56e4482009-08-06 11:32:51 +0900366
Jiang Liu5004e982015-07-09 16:00:41 +0800367 for_each_pci_msi_entry(entry, dev)
Jiang Liu63a7b172014-11-06 22:20:32 +0800368 if (entry->irq)
369 for (i = 0; i < entry->nvec_used; i++)
370 BUG_ON(irq_has_action(entry->irq + i));
Hidetoshi Setof56e4482009-08-06 11:32:51 +0900371
Jiang Liu8e047ad2014-11-15 22:24:07 +0800372 pci_msi_teardown_msi_irqs(dev);
Hidetoshi Setof56e4482009-08-06 11:32:51 +0900373
Jiang Liu5004e982015-07-09 16:00:41 +0800374 list_for_each_entry_safe(entry, tmp, msi_list, list) {
Hidetoshi Setof56e4482009-08-06 11:32:51 +0900375 if (entry->msi_attrib.is_msix) {
Jiang Liu5004e982015-07-09 16:00:41 +0800376 if (list_is_last(&entry->list, msi_list))
Hidetoshi Setof56e4482009-08-06 11:32:51 +0900377 iounmap(entry->mask_base);
378 }
Neil Horman424eb392012-01-03 10:29:54 -0500379
Hidetoshi Setof56e4482009-08-06 11:32:51 +0900380 list_del(&entry->list);
381 kfree(entry);
382 }
Greg Kroah-Hartman1c51b502013-12-19 12:30:17 -0800383
384 if (dev->msi_irq_groups) {
385 sysfs_remove_groups(&dev->dev.kobj, dev->msi_irq_groups);
386 msi_attrs = dev->msi_irq_groups[0]->attrs;
Alexei Starovoitovb701c0b2014-06-04 15:49:50 -0700387 while (msi_attrs[count]) {
Greg Kroah-Hartman1c51b502013-12-19 12:30:17 -0800388 dev_attr = container_of(msi_attrs[count],
389 struct device_attribute, attr);
390 kfree(dev_attr->attr.name);
391 kfree(dev_attr);
392 ++count;
393 }
394 kfree(msi_attrs);
395 kfree(dev->msi_irq_groups[0]);
396 kfree(dev->msi_irq_groups);
397 dev->msi_irq_groups = NULL;
398 }
Hidetoshi Setof56e4482009-08-06 11:32:51 +0900399}
Satoru Takeuchic54c1872007-01-18 13:50:05 +0900400
David Millerba698ad2007-10-25 01:16:30 -0700401static void pci_intx_for_msi(struct pci_dev *dev, int enable)
402{
403 if (!(dev->dev_flags & PCI_DEV_FLAGS_MSI_INTX_DISABLE_BUG))
404 pci_intx(dev, enable);
405}
406
Michael Ellerman8fed4b62007-01-25 19:34:08 +1100407static void __pci_restore_msi_state(struct pci_dev *dev)
Shaohua Li41017f02006-02-08 17:11:38 +0800408{
Shaohua Li41017f02006-02-08 17:11:38 +0800409 u16 control;
Eric W. Biederman392ee1e2007-03-08 13:04:57 -0700410 struct msi_desc *entry;
Shaohua Li41017f02006-02-08 17:11:38 +0800411
Eric W. Biedermanb1cbf4e2007-03-05 00:30:10 -0800412 if (!dev->msi_enabled)
413 return;
414
Thomas Gleixnerdced35a2011-03-28 17:49:12 +0200415 entry = irq_get_msi_desc(dev->irq);
Shaohua Li41017f02006-02-08 17:11:38 +0800416
David Millerba698ad2007-10-25 01:16:30 -0700417 pci_intx_for_msi(dev, 0);
Michael S. Tsirkin61b64ab2015-05-07 09:52:21 -0500418 pci_msi_set_enable(dev, 0);
DuanZhenzhongac8344c2013-12-04 13:09:16 +0800419 arch_restore_msi_irqs(dev);
Eric W. Biederman392ee1e2007-03-08 13:04:57 -0700420
Bjorn Helgaasf5322162013-04-17 17:34:36 -0600421 pci_read_config_word(dev, dev->msi_cap + PCI_MSI_FLAGS, &control);
Yijing Wang31ea5d42014-06-19 16:30:30 +0800422 msi_mask_irq(entry, msi_mask(entry->msi_attrib.multi_cap),
423 entry->masked);
Jesse Barnesabad2ec2008-08-07 08:52:37 -0700424 control &= ~PCI_MSI_FLAGS_QSIZE;
Matthew Wilcox1c8d7b02009-03-17 08:54:10 -0400425 control |= (entry->msi_attrib.multiple << 4) | PCI_MSI_FLAGS_ENABLE;
Bjorn Helgaasf5322162013-04-17 17:34:36 -0600426 pci_write_config_word(dev, dev->msi_cap + PCI_MSI_FLAGS, control);
Michael Ellerman8fed4b62007-01-25 19:34:08 +1100427}
428
429static void __pci_restore_msix_state(struct pci_dev *dev)
Shaohua Li41017f02006-02-08 17:11:38 +0800430{
Shaohua Li41017f02006-02-08 17:11:38 +0800431 struct msi_desc *entry;
Shaohua Li41017f02006-02-08 17:11:38 +0800432
Eric W. Biedermanded86d82007-01-28 12:42:52 -0700433 if (!dev->msix_enabled)
434 return;
Jiang Liu5004e982015-07-09 16:00:41 +0800435 BUG_ON(list_empty(dev_to_msi_list(&dev->dev)));
Eric W. Biedermanded86d82007-01-28 12:42:52 -0700436
Shaohua Li41017f02006-02-08 17:11:38 +0800437 /* route the table */
David Millerba698ad2007-10-25 01:16:30 -0700438 pci_intx_for_msi(dev, 0);
Michael S. Tsirkin61b64ab2015-05-07 09:52:21 -0500439 pci_msix_clear_and_set_ctrl(dev, 0,
Yijing Wang66f0d0c2014-06-19 16:29:53 +0800440 PCI_MSIX_FLAGS_ENABLE | PCI_MSIX_FLAGS_MASKALL);
Shaohua Li41017f02006-02-08 17:11:38 +0800441
DuanZhenzhongac8344c2013-12-04 13:09:16 +0800442 arch_restore_msi_irqs(dev);
Jiang Liu5004e982015-07-09 16:00:41 +0800443 for_each_pci_msi_entry(entry, dev)
Matthew Wilcoxf2440d92009-03-17 08:54:09 -0400444 msix_mask_irq(entry, entry->masked);
Shaohua Li41017f02006-02-08 17:11:38 +0800445
Michael S. Tsirkin61b64ab2015-05-07 09:52:21 -0500446 pci_msix_clear_and_set_ctrl(dev, PCI_MSIX_FLAGS_MASKALL, 0);
Shaohua Li41017f02006-02-08 17:11:38 +0800447}
Michael Ellerman8fed4b62007-01-25 19:34:08 +1100448
449void pci_restore_msi_state(struct pci_dev *dev)
450{
451 __pci_restore_msi_state(dev);
452 __pci_restore_msix_state(dev);
453}
Linas Vepstas94688cf2007-11-07 15:43:59 -0600454EXPORT_SYMBOL_GPL(pci_restore_msi_state);
Shaohua Li41017f02006-02-08 17:11:38 +0800455
Greg Kroah-Hartman1c51b502013-12-19 12:30:17 -0800456static ssize_t msi_mode_show(struct device *dev, struct device_attribute *attr,
Neil Hormanda8d1c82011-10-06 14:08:18 -0400457 char *buf)
458{
Greg Kroah-Hartman1c51b502013-12-19 12:30:17 -0800459 struct msi_desc *entry;
460 unsigned long irq;
461 int retval;
462
463 retval = kstrtoul(attr->attr.name, 10, &irq);
464 if (retval)
465 return retval;
466
Yijing Wange11ece52014-07-08 10:09:19 +0800467 entry = irq_get_msi_desc(irq);
468 if (entry)
469 return sprintf(buf, "%s\n",
470 entry->msi_attrib.is_msix ? "msix" : "msi");
471
Greg Kroah-Hartman1c51b502013-12-19 12:30:17 -0800472 return -ENODEV;
Neil Hormanda8d1c82011-10-06 14:08:18 -0400473}
474
Neil Hormanda8d1c82011-10-06 14:08:18 -0400475static int populate_msi_sysfs(struct pci_dev *pdev)
476{
Greg Kroah-Hartman1c51b502013-12-19 12:30:17 -0800477 struct attribute **msi_attrs;
478 struct attribute *msi_attr;
479 struct device_attribute *msi_dev_attr;
480 struct attribute_group *msi_irq_group;
481 const struct attribute_group **msi_irq_groups;
Neil Hormanda8d1c82011-10-06 14:08:18 -0400482 struct msi_desc *entry;
Greg Kroah-Hartman1c51b502013-12-19 12:30:17 -0800483 int ret = -ENOMEM;
484 int num_msi = 0;
Neil Hormanda8d1c82011-10-06 14:08:18 -0400485 int count = 0;
Romain Bezuta8676062015-09-24 01:31:16 +0200486 int i;
Neil Hormanda8d1c82011-10-06 14:08:18 -0400487
Greg Kroah-Hartman1c51b502013-12-19 12:30:17 -0800488 /* Determine how many msi entries we have */
Jiang Liu5004e982015-07-09 16:00:41 +0800489 for_each_pci_msi_entry(entry, pdev)
Romain Bezuta8676062015-09-24 01:31:16 +0200490 num_msi += entry->nvec_used;
Greg Kroah-Hartman1c51b502013-12-19 12:30:17 -0800491 if (!num_msi)
492 return 0;
493
494 /* Dynamically create the MSI attributes for the PCI device */
495 msi_attrs = kzalloc(sizeof(void *) * (num_msi + 1), GFP_KERNEL);
496 if (!msi_attrs)
497 return -ENOMEM;
Jiang Liu5004e982015-07-09 16:00:41 +0800498 for_each_pci_msi_entry(entry, pdev) {
Romain Bezuta8676062015-09-24 01:31:16 +0200499 for (i = 0; i < entry->nvec_used; i++) {
500 msi_dev_attr = kzalloc(sizeof(*msi_dev_attr), GFP_KERNEL);
501 if (!msi_dev_attr)
502 goto error_attrs;
503 msi_attrs[count] = &msi_dev_attr->attr;
Greg Kroah-Hartman86bb4f62014-02-13 10:47:20 -0700504
Romain Bezuta8676062015-09-24 01:31:16 +0200505 sysfs_attr_init(&msi_dev_attr->attr);
506 msi_dev_attr->attr.name = kasprintf(GFP_KERNEL, "%d",
507 entry->irq + i);
508 if (!msi_dev_attr->attr.name)
509 goto error_attrs;
510 msi_dev_attr->attr.mode = S_IRUGO;
511 msi_dev_attr->show = msi_mode_show;
512 ++count;
513 }
Greg Kroah-Hartman1c51b502013-12-19 12:30:17 -0800514 }
515
516 msi_irq_group = kzalloc(sizeof(*msi_irq_group), GFP_KERNEL);
517 if (!msi_irq_group)
518 goto error_attrs;
519 msi_irq_group->name = "msi_irqs";
520 msi_irq_group->attrs = msi_attrs;
521
522 msi_irq_groups = kzalloc(sizeof(void *) * 2, GFP_KERNEL);
523 if (!msi_irq_groups)
524 goto error_irq_group;
525 msi_irq_groups[0] = msi_irq_group;
526
527 ret = sysfs_create_groups(&pdev->dev.kobj, msi_irq_groups);
528 if (ret)
529 goto error_irq_groups;
530 pdev->msi_irq_groups = msi_irq_groups;
Neil Hormanda8d1c82011-10-06 14:08:18 -0400531
532 return 0;
533
Greg Kroah-Hartman1c51b502013-12-19 12:30:17 -0800534error_irq_groups:
535 kfree(msi_irq_groups);
536error_irq_group:
537 kfree(msi_irq_group);
538error_attrs:
539 count = 0;
540 msi_attr = msi_attrs[count];
541 while (msi_attr) {
542 msi_dev_attr = container_of(msi_attr, struct device_attribute, attr);
543 kfree(msi_attr->name);
544 kfree(msi_dev_attr);
545 ++count;
546 msi_attr = msi_attrs[count];
Neil Hormanda8d1c82011-10-06 14:08:18 -0400547 }
Greg Kroah-Hartman29237752014-02-13 10:47:35 -0700548 kfree(msi_attrs);
Neil Hormanda8d1c82011-10-06 14:08:18 -0400549 return ret;
550}
551
Jiang Liu63a7b172014-11-06 22:20:32 +0800552static struct msi_desc *msi_setup_entry(struct pci_dev *dev, int nvec)
Yijing Wangd873b4d2014-07-08 10:07:23 +0800553{
554 u16 control;
555 struct msi_desc *entry;
556
557 /* MSI Entry Initialization */
Jiang Liuaa48b6f2015-07-09 16:00:47 +0800558 entry = alloc_msi_entry(&dev->dev);
Yijing Wangd873b4d2014-07-08 10:07:23 +0800559 if (!entry)
560 return NULL;
561
562 pci_read_config_word(dev, dev->msi_cap + PCI_MSI_FLAGS, &control);
563
564 entry->msi_attrib.is_msix = 0;
565 entry->msi_attrib.is_64 = !!(control & PCI_MSI_FLAGS_64BIT);
566 entry->msi_attrib.entry_nr = 0;
567 entry->msi_attrib.maskbit = !!(control & PCI_MSI_FLAGS_MASKBIT);
568 entry->msi_attrib.default_irq = dev->irq; /* Save IOAPIC IRQ */
Yijing Wangd873b4d2014-07-08 10:07:23 +0800569 entry->msi_attrib.multi_cap = (control & PCI_MSI_FLAGS_QMASK) >> 1;
Jiang Liu63a7b172014-11-06 22:20:32 +0800570 entry->msi_attrib.multiple = ilog2(__roundup_pow_of_two(nvec));
571 entry->nvec_used = nvec;
Christoph Hellwig4ef33682016-07-12 18:20:18 +0900572 entry->affinity = dev->irq_affinity;
Yijing Wangd873b4d2014-07-08 10:07:23 +0800573
574 if (control & PCI_MSI_FLAGS_64BIT)
575 entry->mask_pos = dev->msi_cap + PCI_MSI_MASK_64;
576 else
577 entry->mask_pos = dev->msi_cap + PCI_MSI_MASK_32;
578
579 /* Save the initial mask status */
580 if (entry->msi_attrib.maskbit)
581 pci_read_config_dword(dev, entry->mask_pos, &entry->masked);
582
583 return entry;
584}
585
Benjamin Herrenschmidtf144d142014-10-03 15:13:24 +1000586static int msi_verify_entries(struct pci_dev *dev)
587{
588 struct msi_desc *entry;
589
Jiang Liu5004e982015-07-09 16:00:41 +0800590 for_each_pci_msi_entry(entry, dev) {
Benjamin Herrenschmidtf144d142014-10-03 15:13:24 +1000591 if (!dev->no_64bit_msi || !entry->msg.address_hi)
592 continue;
593 dev_err(&dev->dev, "Device has broken 64-bit MSI but arch"
594 " tried to assign one above 4G\n");
595 return -EIO;
596 }
597 return 0;
598}
599
Linus Torvalds1da177e2005-04-16 15:20:36 -0700600/**
601 * msi_capability_init - configure device's MSI capability structure
602 * @dev: pointer to the pci_dev data structure of MSI device function
Matthew Wilcox1c8d7b02009-03-17 08:54:10 -0400603 * @nvec: number of interrupts to allocate
Linus Torvalds1da177e2005-04-16 15:20:36 -0700604 *
Matthew Wilcox1c8d7b02009-03-17 08:54:10 -0400605 * Setup the MSI capability structure of the device with the requested
606 * number of interrupts. A return value of zero indicates the successful
607 * setup of an entry with the new MSI irq. A negative return value indicates
608 * an error, and a positive return value indicates the number of interrupts
609 * which could have been allocated.
610 */
611static int msi_capability_init(struct pci_dev *dev, int nvec)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700612{
613 struct msi_desc *entry;
Gavin Shanf4651362013-04-04 16:54:32 +0000614 int ret;
Matthew Wilcoxf2440d92009-03-17 08:54:09 -0400615 unsigned mask;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700616
Michael S. Tsirkin61b64ab2015-05-07 09:52:21 -0500617 pci_msi_set_enable(dev, 0); /* Disable MSI during set up */
Matthew Wilcox110828c2009-06-16 06:31:45 -0600618
Jiang Liu63a7b172014-11-06 22:20:32 +0800619 entry = msi_setup_entry(dev, nvec);
Eric W. Biedermanf7feaca2007-01-28 12:56:37 -0700620 if (!entry)
621 return -ENOMEM;
Eric W. Biederman1ce03372006-10-04 02:16:41 -0700622
Matthew Wilcoxf2440d92009-03-17 08:54:09 -0400623 /* All MSIs are unmasked by default, Mask them all */
Yijing Wang31ea5d42014-06-19 16:30:30 +0800624 mask = msi_mask(entry->msi_attrib.multi_cap);
Matthew Wilcoxf2440d92009-03-17 08:54:09 -0400625 msi_mask_irq(entry, mask, mask);
626
Jiang Liu5004e982015-07-09 16:00:41 +0800627 list_add_tail(&entry->list, dev_to_msi_list(&dev->dev));
Michael Ellerman9c831332007-04-18 19:39:21 +1000628
Linus Torvalds1da177e2005-04-16 15:20:36 -0700629 /* Configure MSI capability structure */
Jiang Liu8e047ad2014-11-15 22:24:07 +0800630 ret = pci_msi_setup_msi_irqs(dev, nvec, PCI_CAP_ID_MSI);
Michael Ellerman7fe37302007-04-18 19:39:21 +1000631 if (ret) {
Hidetoshi Seto7ba19302009-06-23 17:39:27 +0900632 msi_mask_irq(entry, mask, ~mask);
Hidetoshi Setof56e4482009-08-06 11:32:51 +0900633 free_msi_irqs(dev);
Michael Ellerman7fe37302007-04-18 19:39:21 +1000634 return ret;
Mark Maulefd58e552006-04-10 21:17:48 -0500635 }
Eric W. Biedermanf7feaca2007-01-28 12:56:37 -0700636
Benjamin Herrenschmidtf144d142014-10-03 15:13:24 +1000637 ret = msi_verify_entries(dev);
638 if (ret) {
639 msi_mask_irq(entry, mask, ~mask);
640 free_msi_irqs(dev);
641 return ret;
642 }
643
Neil Hormanda8d1c82011-10-06 14:08:18 -0400644 ret = populate_msi_sysfs(dev);
645 if (ret) {
646 msi_mask_irq(entry, mask, ~mask);
647 free_msi_irqs(dev);
648 return ret;
649 }
650
Linus Torvalds1da177e2005-04-16 15:20:36 -0700651 /* Set MSI enabled bits */
David Millerba698ad2007-10-25 01:16:30 -0700652 pci_intx_for_msi(dev, 0);
Michael S. Tsirkin61b64ab2015-05-07 09:52:21 -0500653 pci_msi_set_enable(dev, 1);
Eric W. Biedermanb1cbf4e2007-03-05 00:30:10 -0800654 dev->msi_enabled = 1;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700655
Jiang Liu5f226992015-07-30 14:00:08 -0500656 pcibios_free_irq(dev);
Michael Ellerman7fe37302007-04-18 19:39:21 +1000657 dev->irq = entry->irq;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700658 return 0;
659}
660
Gavin Shan520fe9d2013-04-04 16:54:33 +0000661static void __iomem *msix_map_region(struct pci_dev *dev, unsigned nr_entries)
Hidetoshi Seto5a05a9d2009-08-06 11:34:34 +0900662{
Kenji Kaneshige4302e0f2010-06-17 10:42:44 +0900663 resource_size_t phys_addr;
Hidetoshi Seto5a05a9d2009-08-06 11:34:34 +0900664 u32 table_offset;
Yijing Wang6a878e52015-01-28 09:52:17 +0800665 unsigned long flags;
Hidetoshi Seto5a05a9d2009-08-06 11:34:34 +0900666 u8 bir;
667
Bjorn Helgaas909094c2013-04-17 17:43:40 -0600668 pci_read_config_dword(dev, dev->msix_cap + PCI_MSIX_TABLE,
669 &table_offset);
Bjorn Helgaas4d187602013-04-17 18:10:07 -0600670 bir = (u8)(table_offset & PCI_MSIX_TABLE_BIR);
Yijing Wang6a878e52015-01-28 09:52:17 +0800671 flags = pci_resource_flags(dev, bir);
672 if (!flags || (flags & IORESOURCE_UNSET))
673 return NULL;
674
Bjorn Helgaas4d187602013-04-17 18:10:07 -0600675 table_offset &= PCI_MSIX_TABLE_OFFSET;
Hidetoshi Seto5a05a9d2009-08-06 11:34:34 +0900676 phys_addr = pci_resource_start(dev, bir) + table_offset;
677
678 return ioremap_nocache(phys_addr, nr_entries * PCI_MSIX_ENTRY_SIZE);
679}
680
Gavin Shan520fe9d2013-04-04 16:54:33 +0000681static int msix_setup_entries(struct pci_dev *dev, void __iomem *base,
682 struct msix_entry *entries, int nvec)
Hidetoshi Setod9d70702009-08-06 11:35:48 +0900683{
Christoph Hellwig4ef33682016-07-12 18:20:18 +0900684 const struct cpumask *mask = NULL;
Hidetoshi Setod9d70702009-08-06 11:35:48 +0900685 struct msi_desc *entry;
Christoph Hellwig4ef33682016-07-12 18:20:18 +0900686 int cpu = -1, i;
Hidetoshi Setod9d70702009-08-06 11:35:48 +0900687
688 for (i = 0; i < nvec; i++) {
Christoph Hellwig4ef33682016-07-12 18:20:18 +0900689 if (dev->irq_affinity) {
690 cpu = cpumask_next(cpu, dev->irq_affinity);
691 if (cpu >= nr_cpu_ids)
692 cpu = cpumask_first(dev->irq_affinity);
693 mask = cpumask_of(cpu);
694 }
695
Jiang Liuaa48b6f2015-07-09 16:00:47 +0800696 entry = alloc_msi_entry(&dev->dev);
Hidetoshi Setod9d70702009-08-06 11:35:48 +0900697 if (!entry) {
698 if (!i)
699 iounmap(base);
700 else
701 free_msi_irqs(dev);
702 /* No enough memory. Don't try again */
703 return -ENOMEM;
704 }
705
706 entry->msi_attrib.is_msix = 1;
707 entry->msi_attrib.is_64 = 1;
Christoph Hellwig3ac020e2016-07-12 18:20:16 +0900708 if (entries)
709 entry->msi_attrib.entry_nr = entries[i].entry;
710 else
711 entry->msi_attrib.entry_nr = i;
Hidetoshi Setod9d70702009-08-06 11:35:48 +0900712 entry->msi_attrib.default_irq = dev->irq;
Hidetoshi Setod9d70702009-08-06 11:35:48 +0900713 entry->mask_base = base;
Jiang Liu63a7b172014-11-06 22:20:32 +0800714 entry->nvec_used = 1;
Christoph Hellwig4ef33682016-07-12 18:20:18 +0900715 entry->affinity = mask;
Hidetoshi Setod9d70702009-08-06 11:35:48 +0900716
Jiang Liu5004e982015-07-09 16:00:41 +0800717 list_add_tail(&entry->list, dev_to_msi_list(&dev->dev));
Hidetoshi Setod9d70702009-08-06 11:35:48 +0900718 }
719
720 return 0;
721}
722
Hidetoshi Seto75cb3422009-08-06 11:35:10 +0900723static void msix_program_entries(struct pci_dev *dev,
Gavin Shan520fe9d2013-04-04 16:54:33 +0000724 struct msix_entry *entries)
Hidetoshi Seto75cb3422009-08-06 11:35:10 +0900725{
726 struct msi_desc *entry;
727 int i = 0;
728
Jiang Liu5004e982015-07-09 16:00:41 +0800729 for_each_pci_msi_entry(entry, dev) {
Christoph Hellwig3ac020e2016-07-12 18:20:16 +0900730 if (entries)
731 entries[i++].vector = entry->irq;
Christoph Hellwig12eb21d2016-07-12 18:20:15 +0900732 entry->masked = readl(pci_msix_desc_addr(entry) +
733 PCI_MSIX_ENTRY_VECTOR_CTRL);
Hidetoshi Seto75cb3422009-08-06 11:35:10 +0900734 msix_mask_irq(entry, 1);
Hidetoshi Seto75cb3422009-08-06 11:35:10 +0900735 }
736}
737
Linus Torvalds1da177e2005-04-16 15:20:36 -0700738/**
739 * msix_capability_init - configure device's MSI-X capability
740 * @dev: pointer to the pci_dev data structure of MSI-X device function
Randy Dunlap8f7020d2005-10-23 11:57:38 -0700741 * @entries: pointer to an array of struct msix_entry entries
742 * @nvec: number of @entries
Linus Torvalds1da177e2005-04-16 15:20:36 -0700743 *
Steven Coleeaae4b32005-05-03 18:38:30 -0600744 * Setup the MSI-X capability structure of device function with a
Eric W. Biederman1ce03372006-10-04 02:16:41 -0700745 * single MSI-X irq. A return of zero indicates the successful setup of
746 * requested MSI-X entries with allocated irqs or non-zero for otherwise.
Linus Torvalds1da177e2005-04-16 15:20:36 -0700747 **/
748static int msix_capability_init(struct pci_dev *dev,
749 struct msix_entry *entries, int nvec)
750{
Gavin Shan520fe9d2013-04-04 16:54:33 +0000751 int ret;
Hidetoshi Seto5a05a9d2009-08-06 11:34:34 +0900752 u16 control;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700753 void __iomem *base;
754
Matthew Wilcoxf5982822009-06-18 19:15:59 -0700755 /* Ensure MSI-X is disabled while it is set up */
Michael S. Tsirkin61b64ab2015-05-07 09:52:21 -0500756 pci_msix_clear_and_set_ctrl(dev, PCI_MSIX_FLAGS_ENABLE, 0);
Matthew Wilcoxf5982822009-06-18 19:15:59 -0700757
Yijing Wang66f0d0c2014-06-19 16:29:53 +0800758 pci_read_config_word(dev, dev->msix_cap + PCI_MSIX_FLAGS, &control);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700759 /* Request & Map MSI-X table region */
Bjorn Helgaas527eee22013-04-17 17:44:48 -0600760 base = msix_map_region(dev, msix_table_size(control));
Hidetoshi Seto5a05a9d2009-08-06 11:34:34 +0900761 if (!base)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700762 return -ENOMEM;
763
Gavin Shan520fe9d2013-04-04 16:54:33 +0000764 ret = msix_setup_entries(dev, base, entries, nvec);
Hidetoshi Setod9d70702009-08-06 11:35:48 +0900765 if (ret)
766 return ret;
Michael Ellerman9c831332007-04-18 19:39:21 +1000767
Jiang Liu8e047ad2014-11-15 22:24:07 +0800768 ret = pci_msi_setup_msi_irqs(dev, nvec, PCI_CAP_ID_MSIX);
Hidetoshi Seto583871d2009-08-06 11:33:39 +0900769 if (ret)
Alexander Gordeev2adc7902013-12-16 09:34:56 +0100770 goto out_avail;
Michael Ellerman9c831332007-04-18 19:39:21 +1000771
Benjamin Herrenschmidtf144d142014-10-03 15:13:24 +1000772 /* Check if all MSI entries honor device restrictions */
773 ret = msi_verify_entries(dev);
774 if (ret)
775 goto out_free;
776
Matthew Wilcoxf5982822009-06-18 19:15:59 -0700777 /*
778 * Some devices require MSI-X to be enabled before we can touch the
779 * MSI-X registers. We need to mask all the vectors to prevent
780 * interrupts coming in before they're fully set up.
781 */
Michael S. Tsirkin61b64ab2015-05-07 09:52:21 -0500782 pci_msix_clear_and_set_ctrl(dev, 0,
Yijing Wang66f0d0c2014-06-19 16:29:53 +0800783 PCI_MSIX_FLAGS_MASKALL | PCI_MSIX_FLAGS_ENABLE);
Matthew Wilcoxf5982822009-06-18 19:15:59 -0700784
Hidetoshi Seto75cb3422009-08-06 11:35:10 +0900785 msix_program_entries(dev, entries);
Matthew Wilcoxf5982822009-06-18 19:15:59 -0700786
Neil Hormanda8d1c82011-10-06 14:08:18 -0400787 ret = populate_msi_sysfs(dev);
Alexander Gordeev2adc7902013-12-16 09:34:56 +0100788 if (ret)
789 goto out_free;
Neil Hormanda8d1c82011-10-06 14:08:18 -0400790
Matthew Wilcoxf5982822009-06-18 19:15:59 -0700791 /* Set MSI-X enabled bits and unmask the function */
David Millerba698ad2007-10-25 01:16:30 -0700792 pci_intx_for_msi(dev, 0);
Eric W. Biedermanb1cbf4e2007-03-05 00:30:10 -0800793 dev->msix_enabled = 1;
Michael S. Tsirkin61b64ab2015-05-07 09:52:21 -0500794 pci_msix_clear_and_set_ctrl(dev, PCI_MSIX_FLAGS_MASKALL, 0);
Matthew Wilcox8d181012009-05-08 07:13:33 -0600795
Jiang Liu5f226992015-07-30 14:00:08 -0500796 pcibios_free_irq(dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700797 return 0;
Hidetoshi Seto583871d2009-08-06 11:33:39 +0900798
Alexander Gordeev2adc7902013-12-16 09:34:56 +0100799out_avail:
Hidetoshi Seto583871d2009-08-06 11:33:39 +0900800 if (ret < 0) {
801 /*
802 * If we had some success, report the number of irqs
803 * we succeeded in setting up.
804 */
Hidetoshi Setod9d70702009-08-06 11:35:48 +0900805 struct msi_desc *entry;
Hidetoshi Seto583871d2009-08-06 11:33:39 +0900806 int avail = 0;
807
Jiang Liu5004e982015-07-09 16:00:41 +0800808 for_each_pci_msi_entry(entry, dev) {
Hidetoshi Seto583871d2009-08-06 11:33:39 +0900809 if (entry->irq != 0)
810 avail++;
811 }
812 if (avail != 0)
813 ret = avail;
814 }
815
Alexander Gordeev2adc7902013-12-16 09:34:56 +0100816out_free:
Hidetoshi Seto583871d2009-08-06 11:33:39 +0900817 free_msi_irqs(dev);
818
819 return ret;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700820}
821
822/**
Alexander Gordeeva06cd742014-09-23 12:45:58 -0600823 * pci_msi_supported - check whether MSI may be enabled on a device
Brice Goglin24334a12006-08-31 01:55:07 -0400824 * @dev: pointer to the pci_dev data structure of MSI device function
Michael Ellermanc9953a72007-04-05 17:19:08 +1000825 * @nvec: how many MSIs have been requested ?
Brice Goglin24334a12006-08-31 01:55:07 -0400826 *
Bjorn Helgaasf7625982013-11-14 11:28:18 -0700827 * Look at global flags, the device itself, and its parent buses
Michael Ellerman17bbc122007-04-05 17:19:07 +1000828 * to determine if MSI/-X are supported for the device. If MSI/-X is
Alexander Gordeeva06cd742014-09-23 12:45:58 -0600829 * supported return 1, else return 0.
Brice Goglin24334a12006-08-31 01:55:07 -0400830 **/
Alexander Gordeeva06cd742014-09-23 12:45:58 -0600831static int pci_msi_supported(struct pci_dev *dev, int nvec)
Brice Goglin24334a12006-08-31 01:55:07 -0400832{
833 struct pci_bus *bus;
834
Brice Goglin0306ebf2006-10-05 10:24:31 +0200835 /* MSI must be globally enabled and supported by the device */
Alexander Gordeev27e20602014-09-23 14:25:11 -0600836 if (!pci_msi_enable)
Alexander Gordeeva06cd742014-09-23 12:45:58 -0600837 return 0;
Alexander Gordeev27e20602014-09-23 14:25:11 -0600838
839 if (!dev || dev->no_msi || dev->current_state != PCI_D0)
Alexander Gordeeva06cd742014-09-23 12:45:58 -0600840 return 0;
Brice Goglin24334a12006-08-31 01:55:07 -0400841
Michael Ellerman314e77b2007-04-05 17:19:12 +1000842 /*
843 * You can't ask to have 0 or less MSIs configured.
844 * a) it's stupid ..
845 * b) the list manipulation code assumes nvec >= 1.
846 */
847 if (nvec < 1)
Alexander Gordeeva06cd742014-09-23 12:45:58 -0600848 return 0;
Michael Ellerman314e77b2007-04-05 17:19:12 +1000849
Hidetoshi Seto500559a2009-08-10 10:14:15 +0900850 /*
851 * Any bridge which does NOT route MSI transactions from its
852 * secondary bus to its primary bus must set NO_MSI flag on
Brice Goglin0306ebf2006-10-05 10:24:31 +0200853 * the secondary pci_bus.
854 * We expect only arch-specific PCI host bus controller driver
855 * or quirks for specific PCI bridges to be setting NO_MSI.
856 */
Brice Goglin24334a12006-08-31 01:55:07 -0400857 for (bus = dev->bus; bus; bus = bus->parent)
858 if (bus->bus_flags & PCI_BUS_FLAGS_NO_MSI)
Alexander Gordeeva06cd742014-09-23 12:45:58 -0600859 return 0;
Brice Goglin24334a12006-08-31 01:55:07 -0400860
Alexander Gordeeva06cd742014-09-23 12:45:58 -0600861 return 1;
Brice Goglin24334a12006-08-31 01:55:07 -0400862}
863
864/**
Alexander Gordeevd1ac1d22013-12-30 08:28:13 +0100865 * pci_msi_vec_count - Return the number of MSI vectors a device can send
866 * @dev: device to report about
867 *
868 * This function returns the number of MSI vectors a device requested via
869 * Multiple Message Capable register. It returns a negative errno if the
870 * device is not capable sending MSI interrupts. Otherwise, the call succeeds
871 * and returns a power of two, up to a maximum of 2^5 (32), according to the
872 * MSI specification.
873 **/
874int pci_msi_vec_count(struct pci_dev *dev)
875{
876 int ret;
877 u16 msgctl;
878
879 if (!dev->msi_cap)
880 return -EINVAL;
881
882 pci_read_config_word(dev, dev->msi_cap + PCI_MSI_FLAGS, &msgctl);
883 ret = 1 << ((msgctl & PCI_MSI_FLAGS_QMASK) >> 1);
884
885 return ret;
886}
887EXPORT_SYMBOL(pci_msi_vec_count);
888
Matthew Wilcoxf2440d92009-03-17 08:54:09 -0400889void pci_msi_shutdown(struct pci_dev *dev)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700890{
Matthew Wilcoxf2440d92009-03-17 08:54:09 -0400891 struct msi_desc *desc;
892 u32 mask;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700893
Michael Ellerman128bc5f2007-03-22 21:51:39 +1100894 if (!pci_msi_enable || !dev || !dev->msi_enabled)
Eric W. Biedermanded86d82007-01-28 12:42:52 -0700895 return;
896
Jiang Liu5004e982015-07-09 16:00:41 +0800897 BUG_ON(list_empty(dev_to_msi_list(&dev->dev)));
Jiang Liu4a7cc832015-07-09 16:00:44 +0800898 desc = first_pci_msi_entry(dev);
Matthew Wilcox110828c2009-06-16 06:31:45 -0600899
Michael S. Tsirkin61b64ab2015-05-07 09:52:21 -0500900 pci_msi_set_enable(dev, 0);
David Millerba698ad2007-10-25 01:16:30 -0700901 pci_intx_for_msi(dev, 1);
Eric W. Biedermanb1cbf4e2007-03-05 00:30:10 -0800902 dev->msi_enabled = 0;
Eric W. Biederman7bd007e2006-10-04 02:16:31 -0700903
Hidetoshi Seto12abb8b2009-06-24 12:08:09 +0900904 /* Return the device with MSI unmasked as initial states */
Yijing Wang31ea5d42014-06-19 16:30:30 +0800905 mask = msi_mask(desc->msi_attrib.multi_cap);
Hidetoshi Seto12abb8b2009-06-24 12:08:09 +0900906 /* Keep cached state to be restored */
Thomas Gleixner23ed8d52014-11-23 11:55:58 +0100907 __pci_msi_desc_mask_irq(desc, mask, ~mask);
Michael Ellermane387b9e2007-03-22 21:51:27 +1100908
909 /* Restore dev->irq to its default pin-assertion irq */
Matthew Wilcoxf2440d92009-03-17 08:54:09 -0400910 dev->irq = desc->msi_attrib.default_irq;
Jiang Liu5f226992015-07-30 14:00:08 -0500911 pcibios_alloc_irq(dev);
Yinghai Lud52877c2008-04-23 14:58:09 -0700912}
Matthew Wilcox24d27552009-03-17 08:54:06 -0400913
Hidetoshi Seto500559a2009-08-10 10:14:15 +0900914void pci_disable_msi(struct pci_dev *dev)
Yinghai Lud52877c2008-04-23 14:58:09 -0700915{
Yinghai Lud52877c2008-04-23 14:58:09 -0700916 if (!pci_msi_enable || !dev || !dev->msi_enabled)
917 return;
918
919 pci_msi_shutdown(dev);
Hidetoshi Setof56e4482009-08-06 11:32:51 +0900920 free_msi_irqs(dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700921}
Michael Ellerman4cc086f2007-03-22 21:51:34 +1100922EXPORT_SYMBOL(pci_disable_msi);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700923
Linus Torvalds1da177e2005-04-16 15:20:36 -0700924/**
Alexander Gordeevff1aa432013-12-30 08:28:15 +0100925 * pci_msix_vec_count - return the number of device's MSI-X table entries
Rafael J. Wysockia52e2e32009-01-24 00:21:14 +0100926 * @dev: pointer to the pci_dev data structure of MSI-X device function
Alexander Gordeevff1aa432013-12-30 08:28:15 +0100927 * This function returns the number of device's MSI-X table entries and
928 * therefore the number of MSI-X vectors device is capable of sending.
929 * It returns a negative errno if the device is not capable of sending MSI-X
930 * interrupts.
931 **/
932int pci_msix_vec_count(struct pci_dev *dev)
Rafael J. Wysockia52e2e32009-01-24 00:21:14 +0100933{
Rafael J. Wysockia52e2e32009-01-24 00:21:14 +0100934 u16 control;
935
Gavin Shan520fe9d2013-04-04 16:54:33 +0000936 if (!dev->msix_cap)
Alexander Gordeevff1aa432013-12-30 08:28:15 +0100937 return -EINVAL;
Rafael J. Wysockia52e2e32009-01-24 00:21:14 +0100938
Bjorn Helgaasf84ecd22013-04-17 17:38:32 -0600939 pci_read_config_word(dev, dev->msix_cap + PCI_MSIX_FLAGS, &control);
Bjorn Helgaas527eee22013-04-17 17:44:48 -0600940 return msix_table_size(control);
Rafael J. Wysockia52e2e32009-01-24 00:21:14 +0100941}
Alexander Gordeevff1aa432013-12-30 08:28:15 +0100942EXPORT_SYMBOL(pci_msix_vec_count);
Rafael J. Wysockia52e2e32009-01-24 00:21:14 +0100943
944/**
Linus Torvalds1da177e2005-04-16 15:20:36 -0700945 * pci_enable_msix - configure device's MSI-X capability structure
946 * @dev: pointer to the pci_dev data structure of MSI-X device function
Christoph Hellwig3ac020e2016-07-12 18:20:16 +0900947 * @entries: pointer to an array of MSI-X entries (optional)
Eric W. Biederman1ce03372006-10-04 02:16:41 -0700948 * @nvec: number of MSI-X irqs requested for allocation by device driver
Linus Torvalds1da177e2005-04-16 15:20:36 -0700949 *
950 * Setup the MSI-X capability structure of device function with the number
Eric W. Biederman1ce03372006-10-04 02:16:41 -0700951 * of requested irqs upon its software driver call to request for
Linus Torvalds1da177e2005-04-16 15:20:36 -0700952 * MSI-X mode enabled on its hardware device function. A return of zero
953 * indicates the successful configuration of MSI-X capability structure
Eric W. Biederman1ce03372006-10-04 02:16:41 -0700954 * with new allocated MSI-X irqs. A return of < 0 indicates a failure.
Linus Torvalds1da177e2005-04-16 15:20:36 -0700955 * Or a return of > 0 indicates that driver request is exceeding the number
Michael S. Tsirkin57fbf522009-05-07 11:28:41 +0300956 * of irqs or MSI-X vectors available. Driver should use the returned value to
957 * re-send its request.
Linus Torvalds1da177e2005-04-16 15:20:36 -0700958 **/
Hidetoshi Seto500559a2009-08-10 10:14:15 +0900959int pci_enable_msix(struct pci_dev *dev, struct msix_entry *entries, int nvec)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700960{
Bjorn Helgaas5ec09402014-09-23 14:38:28 -0600961 int nr_entries;
Eric W. Biedermanded86d82007-01-28 12:42:52 -0700962 int i, j;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700963
Alexander Gordeeva06cd742014-09-23 12:45:58 -0600964 if (!pci_msi_supported(dev, nvec))
965 return -EINVAL;
Michael Ellermanc9953a72007-04-05 17:19:08 +1000966
Alexander Gordeevff1aa432013-12-30 08:28:15 +0100967 nr_entries = pci_msix_vec_count(dev);
968 if (nr_entries < 0)
969 return nr_entries;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700970 if (nvec > nr_entries)
Michael S. Tsirkin57fbf522009-05-07 11:28:41 +0300971 return nr_entries;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700972
Christoph Hellwig3ac020e2016-07-12 18:20:16 +0900973 if (entries) {
974 /* Check for any invalid entries */
975 for (i = 0; i < nvec; i++) {
976 if (entries[i].entry >= nr_entries)
977 return -EINVAL; /* invalid entry */
978 for (j = i + 1; j < nvec; j++) {
979 if (entries[i].entry == entries[j].entry)
980 return -EINVAL; /* duplicate entry */
981 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700982 }
983 }
Eric W. Biedermanded86d82007-01-28 12:42:52 -0700984 WARN_ON(!!dev->msix_enabled);
Eric W. Biederman7bd007e2006-10-04 02:16:31 -0700985
Eric W. Biederman1ce03372006-10-04 02:16:41 -0700986 /* Check whether driver already requested for MSI irq */
Hidetoshi Seto500559a2009-08-10 10:14:15 +0900987 if (dev->msi_enabled) {
Ryan Desfosses227f0642014-04-18 20:13:50 -0400988 dev_info(&dev->dev, "can't enable MSI-X (MSI IRQ already assigned)\n");
Linus Torvalds1da177e2005-04-16 15:20:36 -0700989 return -EINVAL;
990 }
Bjorn Helgaas5ec09402014-09-23 14:38:28 -0600991 return msix_capability_init(dev, entries, nvec);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700992}
Michael Ellerman4cc086f2007-03-22 21:51:34 +1100993EXPORT_SYMBOL(pci_enable_msix);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700994
Hidetoshi Seto500559a2009-08-10 10:14:15 +0900995void pci_msix_shutdown(struct pci_dev *dev)
Michael Ellermanfc4afc72007-03-22 21:51:33 +1100996{
Hidetoshi Seto12abb8b2009-06-24 12:08:09 +0900997 struct msi_desc *entry;
998
Michael Ellerman128bc5f2007-03-22 21:51:39 +1100999 if (!pci_msi_enable || !dev || !dev->msix_enabled)
Eric W. Biedermanded86d82007-01-28 12:42:52 -07001000 return;
1001
Hidetoshi Seto12abb8b2009-06-24 12:08:09 +09001002 /* Return the device with MSI-X masked as initial states */
Jiang Liu5004e982015-07-09 16:00:41 +08001003 for_each_pci_msi_entry(entry, dev) {
Hidetoshi Seto12abb8b2009-06-24 12:08:09 +09001004 /* Keep cached states to be restored */
Thomas Gleixner23ed8d52014-11-23 11:55:58 +01001005 __pci_msix_desc_mask_irq(entry, 1);
Hidetoshi Seto12abb8b2009-06-24 12:08:09 +09001006 }
1007
Michael S. Tsirkin61b64ab2015-05-07 09:52:21 -05001008 pci_msix_clear_and_set_ctrl(dev, PCI_MSIX_FLAGS_ENABLE, 0);
David Millerba698ad2007-10-25 01:16:30 -07001009 pci_intx_for_msi(dev, 1);
Eric W. Biedermanb1cbf4e2007-03-05 00:30:10 -08001010 dev->msix_enabled = 0;
Jiang Liu5f226992015-07-30 14:00:08 -05001011 pcibios_alloc_irq(dev);
Yinghai Lud52877c2008-04-23 14:58:09 -07001012}
Hidetoshi Setoc9018512009-08-06 11:31:27 +09001013
Hidetoshi Seto500559a2009-08-10 10:14:15 +09001014void pci_disable_msix(struct pci_dev *dev)
Yinghai Lud52877c2008-04-23 14:58:09 -07001015{
1016 if (!pci_msi_enable || !dev || !dev->msix_enabled)
1017 return;
1018
1019 pci_msix_shutdown(dev);
Hidetoshi Setof56e4482009-08-06 11:32:51 +09001020 free_msi_irqs(dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001021}
Michael Ellerman4cc086f2007-03-22 21:51:34 +11001022EXPORT_SYMBOL(pci_disable_msix);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001023
Matthew Wilcox309e57d2006-03-05 22:33:34 -07001024void pci_no_msi(void)
1025{
1026 pci_msi_enable = 0;
1027}
Michael Ellermanc9953a72007-04-05 17:19:08 +10001028
Andrew Patterson07ae95f2008-11-10 15:31:05 -07001029/**
1030 * pci_msi_enabled - is MSI enabled?
1031 *
1032 * Returns true if MSI has not been disabled by the command-line option
1033 * pci=nomsi.
1034 **/
1035int pci_msi_enabled(void)
1036{
1037 return pci_msi_enable;
1038}
1039EXPORT_SYMBOL(pci_msi_enabled);
1040
Christoph Hellwig4ef33682016-07-12 18:20:18 +09001041static int __pci_enable_msi_range(struct pci_dev *dev, int minvec, int maxvec,
1042 unsigned int flags)
Alexander Gordeev302a2522013-12-30 08:28:16 +01001043{
Alexander Gordeev034cd972014-04-14 15:28:35 +02001044 int nvec;
Alexander Gordeev302a2522013-12-30 08:28:16 +01001045 int rc;
1046
Alexander Gordeeva06cd742014-09-23 12:45:58 -06001047 if (!pci_msi_supported(dev, minvec))
1048 return -EINVAL;
Alexander Gordeev034cd972014-04-14 15:28:35 +02001049
1050 WARN_ON(!!dev->msi_enabled);
1051
1052 /* Check whether driver already requested MSI-X irqs */
1053 if (dev->msix_enabled) {
1054 dev_info(&dev->dev,
1055 "can't enable MSI (MSI-X already enabled)\n");
1056 return -EINVAL;
1057 }
1058
Alexander Gordeev302a2522013-12-30 08:28:16 +01001059 if (maxvec < minvec)
1060 return -ERANGE;
1061
Alexander Gordeev034cd972014-04-14 15:28:35 +02001062 nvec = pci_msi_vec_count(dev);
1063 if (nvec < 0)
1064 return nvec;
Christoph Hellwig4ef33682016-07-12 18:20:18 +09001065 if (nvec < minvec)
Alexander Gordeev034cd972014-04-14 15:28:35 +02001066 return -EINVAL;
Christoph Hellwig4ef33682016-07-12 18:20:18 +09001067
1068 if (nvec > maxvec)
Alexander Gordeev034cd972014-04-14 15:28:35 +02001069 nvec = maxvec;
1070
Christoph Hellwig4ef33682016-07-12 18:20:18 +09001071 for (;;) {
1072 if (!(flags & PCI_IRQ_NOAFFINITY)) {
1073 dev->irq_affinity = irq_create_affinity_mask(&nvec);
1074 if (nvec < minvec)
Alexander Gordeev302a2522013-12-30 08:28:16 +01001075 return -ENOSPC;
Alexander Gordeev302a2522013-12-30 08:28:16 +01001076 }
Alexander Gordeev302a2522013-12-30 08:28:16 +01001077
Christoph Hellwig4ef33682016-07-12 18:20:18 +09001078 rc = msi_capability_init(dev, nvec);
1079 if (rc == 0)
1080 return nvec;
1081
1082 kfree(dev->irq_affinity);
1083 dev->irq_affinity = NULL;
1084
1085 if (rc < 0)
1086 return rc;
1087 if (rc < minvec)
1088 return -ENOSPC;
1089
1090 nvec = rc;
1091 }
1092}
1093
1094/**
1095 * pci_enable_msi_range - configure device's MSI capability structure
1096 * @dev: device to configure
1097 * @minvec: minimal number of interrupts to configure
1098 * @maxvec: maximum number of interrupts to configure
1099 *
1100 * This function tries to allocate a maximum possible number of interrupts in a
1101 * range between @minvec and @maxvec. It returns a negative errno if an error
1102 * occurs. If it succeeds, it returns the actual number of interrupts allocated
1103 * and updates the @dev's irq member to the lowest new interrupt number;
1104 * the other interrupt numbers allocated to this device are consecutive.
1105 **/
1106int pci_enable_msi_range(struct pci_dev *dev, int minvec, int maxvec)
1107{
1108 return __pci_enable_msi_range(dev, minvec, maxvec, PCI_IRQ_NOAFFINITY);
Alexander Gordeev302a2522013-12-30 08:28:16 +01001109}
1110EXPORT_SYMBOL(pci_enable_msi_range);
1111
Christoph Hellwig4ef33682016-07-12 18:20:18 +09001112static int __pci_enable_msix_range(struct pci_dev *dev,
1113 struct msix_entry *entries, int minvec, int maxvec,
1114 unsigned int flags)
1115{
1116 int nvec = maxvec;
1117 int rc;
1118
1119 if (maxvec < minvec)
1120 return -ERANGE;
1121
1122 for (;;) {
1123 if (!(flags & PCI_IRQ_NOAFFINITY)) {
1124 dev->irq_affinity = irq_create_affinity_mask(&nvec);
1125 if (nvec < minvec)
1126 return -ENOSPC;
1127 }
1128
1129 rc = pci_enable_msix(dev, entries, nvec);
1130 if (rc == 0)
1131 return nvec;
1132
1133 kfree(dev->irq_affinity);
1134 dev->irq_affinity = NULL;
1135
1136 if (rc < 0)
1137 return rc;
1138 if (rc < minvec)
1139 return -ENOSPC;
1140
1141 nvec = rc;
1142 }
1143}
1144
Alexander Gordeev302a2522013-12-30 08:28:16 +01001145/**
1146 * pci_enable_msix_range - configure device's MSI-X capability structure
1147 * @dev: pointer to the pci_dev data structure of MSI-X device function
1148 * @entries: pointer to an array of MSI-X entries
1149 * @minvec: minimum number of MSI-X irqs requested
1150 * @maxvec: maximum number of MSI-X irqs requested
1151 *
1152 * Setup the MSI-X capability structure of device function with a maximum
1153 * possible number of interrupts in the range between @minvec and @maxvec
1154 * upon its software driver call to request for MSI-X mode enabled on its
1155 * hardware device function. It returns a negative errno if an error occurs.
1156 * If it succeeds, it returns the actual number of interrupts allocated and
1157 * indicates the successful configuration of MSI-X capability structure
1158 * with new allocated MSI-X interrupts.
1159 **/
1160int pci_enable_msix_range(struct pci_dev *dev, struct msix_entry *entries,
Christoph Hellwig4ef33682016-07-12 18:20:18 +09001161 int minvec, int maxvec)
Alexander Gordeev302a2522013-12-30 08:28:16 +01001162{
Christoph Hellwig4ef33682016-07-12 18:20:18 +09001163 return __pci_enable_msix_range(dev, entries, minvec, maxvec,
1164 PCI_IRQ_NOAFFINITY);
Alexander Gordeev302a2522013-12-30 08:28:16 +01001165}
1166EXPORT_SYMBOL(pci_enable_msix_range);
Jiang Liu3878eae2014-11-11 21:02:18 +08001167
Christoph Hellwigaff17162016-07-12 18:20:17 +09001168/**
1169 * pci_alloc_irq_vectors - allocate multiple IRQs for a device
1170 * @dev: PCI device to operate on
1171 * @min_vecs: minimum number of vectors required (must be >= 1)
1172 * @max_vecs: maximum (desired) number of vectors
1173 * @flags: flags or quirks for the allocation
1174 *
1175 * Allocate up to @max_vecs interrupt vectors for @dev, using MSI-X or MSI
1176 * vectors if available, and fall back to a single legacy vector
1177 * if neither is available. Return the number of vectors allocated,
1178 * (which might be smaller than @max_vecs) if successful, or a negative
1179 * error code on error. If less than @min_vecs interrupt vectors are
1180 * available for @dev the function will fail with -ENOSPC.
1181 *
1182 * To get the Linux IRQ number used for a vector that can be passed to
1183 * request_irq() use the pci_irq_vector() helper.
1184 */
1185int pci_alloc_irq_vectors(struct pci_dev *dev, unsigned int min_vecs,
1186 unsigned int max_vecs, unsigned int flags)
1187{
1188 int vecs = -ENOSPC;
1189
1190 if (!(flags & PCI_IRQ_NOMSIX)) {
Christoph Hellwig4ef33682016-07-12 18:20:18 +09001191 vecs = __pci_enable_msix_range(dev, NULL, min_vecs, max_vecs,
1192 flags);
Christoph Hellwigaff17162016-07-12 18:20:17 +09001193 if (vecs > 0)
1194 return vecs;
1195 }
1196
1197 if (!(flags & PCI_IRQ_NOMSI)) {
Christoph Hellwig4ef33682016-07-12 18:20:18 +09001198 vecs = __pci_enable_msi_range(dev, min_vecs, max_vecs, flags);
Christoph Hellwigaff17162016-07-12 18:20:17 +09001199 if (vecs > 0)
1200 return vecs;
1201 }
1202
1203 /* use legacy irq if allowed */
1204 if (!(flags & PCI_IRQ_NOLEGACY) && min_vecs == 1)
1205 return 1;
1206 return vecs;
1207}
1208EXPORT_SYMBOL(pci_alloc_irq_vectors);
1209
1210/**
1211 * pci_free_irq_vectors - free previously allocated IRQs for a device
1212 * @dev: PCI device to operate on
1213 *
1214 * Undoes the allocations and enabling in pci_alloc_irq_vectors().
1215 */
1216void pci_free_irq_vectors(struct pci_dev *dev)
1217{
1218 pci_disable_msix(dev);
1219 pci_disable_msi(dev);
1220}
1221EXPORT_SYMBOL(pci_free_irq_vectors);
1222
1223/**
1224 * pci_irq_vector - return Linux IRQ number of a device vector
1225 * @dev: PCI device to operate on
1226 * @nr: device-relative interrupt vector index (0-based).
1227 */
1228int pci_irq_vector(struct pci_dev *dev, unsigned int nr)
1229{
1230 if (dev->msix_enabled) {
1231 struct msi_desc *entry;
1232 int i = 0;
1233
1234 for_each_pci_msi_entry(entry, dev) {
1235 if (i == nr)
1236 return entry->irq;
1237 i++;
1238 }
1239 WARN_ON_ONCE(1);
1240 return -EINVAL;
1241 }
1242
1243 if (dev->msi_enabled) {
1244 struct msi_desc *entry = first_pci_msi_entry(dev);
1245
1246 if (WARN_ON_ONCE(nr >= entry->nvec_used))
1247 return -EINVAL;
1248 } else {
1249 if (WARN_ON_ONCE(nr > 0))
1250 return -EINVAL;
1251 }
1252
1253 return dev->irq + nr;
1254}
1255EXPORT_SYMBOL(pci_irq_vector);
1256
Jiang Liu25a98bd2015-07-09 16:00:45 +08001257struct pci_dev *msi_desc_to_pci_dev(struct msi_desc *desc)
1258{
1259 return to_pci_dev(desc->dev);
1260}
Jake Oshinsa4289dc2015-12-10 17:52:59 +00001261EXPORT_SYMBOL(msi_desc_to_pci_dev);
Jiang Liu25a98bd2015-07-09 16:00:45 +08001262
Jiang Liuc179c9b2015-07-09 16:00:36 +08001263void *msi_desc_to_pci_sysdata(struct msi_desc *desc)
1264{
1265 struct pci_dev *dev = msi_desc_to_pci_dev(desc);
1266
1267 return dev->bus->sysdata;
1268}
1269EXPORT_SYMBOL_GPL(msi_desc_to_pci_sysdata);
1270
Jiang Liu3878eae2014-11-11 21:02:18 +08001271#ifdef CONFIG_PCI_MSI_IRQ_DOMAIN
1272/**
1273 * pci_msi_domain_write_msg - Helper to write MSI message to PCI config space
1274 * @irq_data: Pointer to interrupt data of the MSI interrupt
1275 * @msg: Pointer to the message
1276 */
1277void pci_msi_domain_write_msg(struct irq_data *irq_data, struct msi_msg *msg)
1278{
Jiang Liu507a8832015-06-01 16:05:42 +08001279 struct msi_desc *desc = irq_data_get_msi_desc(irq_data);
Jiang Liu3878eae2014-11-11 21:02:18 +08001280
1281 /*
1282 * For MSI-X desc->irq is always equal to irq_data->irq. For
1283 * MSI only the first interrupt of MULTI MSI passes the test.
1284 */
1285 if (desc->irq == irq_data->irq)
1286 __pci_write_msi_msg(desc, msg);
1287}
1288
1289/**
1290 * pci_msi_domain_calc_hwirq - Generate a unique ID for an MSI source
1291 * @dev: Pointer to the PCI device
1292 * @desc: Pointer to the msi descriptor
1293 *
1294 * The ID number is only used within the irqdomain.
1295 */
1296irq_hw_number_t pci_msi_domain_calc_hwirq(struct pci_dev *dev,
1297 struct msi_desc *desc)
1298{
1299 return (irq_hw_number_t)desc->msi_attrib.entry_nr |
1300 PCI_DEVID(dev->bus->number, dev->devfn) << 11 |
1301 (pci_domain_nr(dev->bus) & 0xFFFFFFFF) << 27;
1302}
1303
1304static inline bool pci_msi_desc_is_multi_msi(struct msi_desc *desc)
1305{
1306 return !desc->msi_attrib.is_msix && desc->nvec_used > 1;
1307}
1308
1309/**
1310 * pci_msi_domain_check_cap - Verify that @domain supports the capabilities for @dev
1311 * @domain: The interrupt domain to check
1312 * @info: The domain info for verification
1313 * @dev: The device to check
1314 *
1315 * Returns:
1316 * 0 if the functionality is supported
1317 * 1 if Multi MSI is requested, but the domain does not support it
1318 * -ENOTSUPP otherwise
1319 */
1320int pci_msi_domain_check_cap(struct irq_domain *domain,
1321 struct msi_domain_info *info, struct device *dev)
1322{
1323 struct msi_desc *desc = first_pci_msi_entry(to_pci_dev(dev));
1324
1325 /* Special handling to support pci_enable_msi_range() */
1326 if (pci_msi_desc_is_multi_msi(desc) &&
1327 !(info->flags & MSI_FLAG_MULTI_PCI_MSI))
1328 return 1;
1329 else if (desc->msi_attrib.is_msix && !(info->flags & MSI_FLAG_PCI_MSIX))
1330 return -ENOTSUPP;
1331
1332 return 0;
1333}
1334
1335static int pci_msi_domain_handle_error(struct irq_domain *domain,
1336 struct msi_desc *desc, int error)
1337{
1338 /* Special handling to support pci_enable_msi_range() */
1339 if (pci_msi_desc_is_multi_msi(desc) && error == -ENOSPC)
1340 return 1;
1341
1342 return error;
1343}
1344
1345#ifdef GENERIC_MSI_DOMAIN_OPS
1346static void pci_msi_domain_set_desc(msi_alloc_info_t *arg,
1347 struct msi_desc *desc)
1348{
1349 arg->desc = desc;
1350 arg->hwirq = pci_msi_domain_calc_hwirq(msi_desc_to_pci_dev(desc),
1351 desc);
1352}
1353#else
1354#define pci_msi_domain_set_desc NULL
1355#endif
1356
1357static struct msi_domain_ops pci_msi_domain_ops_default = {
1358 .set_desc = pci_msi_domain_set_desc,
1359 .msi_check = pci_msi_domain_check_cap,
1360 .handle_error = pci_msi_domain_handle_error,
1361};
1362
1363static void pci_msi_domain_update_dom_ops(struct msi_domain_info *info)
1364{
1365 struct msi_domain_ops *ops = info->ops;
1366
1367 if (ops == NULL) {
1368 info->ops = &pci_msi_domain_ops_default;
1369 } else {
1370 if (ops->set_desc == NULL)
1371 ops->set_desc = pci_msi_domain_set_desc;
1372 if (ops->msi_check == NULL)
1373 ops->msi_check = pci_msi_domain_check_cap;
1374 if (ops->handle_error == NULL)
1375 ops->handle_error = pci_msi_domain_handle_error;
1376 }
1377}
1378
1379static void pci_msi_domain_update_chip_ops(struct msi_domain_info *info)
1380{
1381 struct irq_chip *chip = info->chip;
1382
1383 BUG_ON(!chip);
1384 if (!chip->irq_write_msi_msg)
1385 chip->irq_write_msi_msg = pci_msi_domain_write_msg;
Marc Zyngier0701c532015-10-13 19:14:45 +01001386 if (!chip->irq_mask)
1387 chip->irq_mask = pci_msi_mask_irq;
1388 if (!chip->irq_unmask)
1389 chip->irq_unmask = pci_msi_unmask_irq;
Jiang Liu3878eae2014-11-11 21:02:18 +08001390}
1391
1392/**
Marc Zyngierbe5436c2015-10-13 12:51:44 +01001393 * pci_msi_create_irq_domain - Create a MSI interrupt domain
1394 * @fwnode: Optional fwnode of the interrupt controller
Jiang Liu3878eae2014-11-11 21:02:18 +08001395 * @info: MSI domain info
1396 * @parent: Parent irq domain
1397 *
1398 * Updates the domain and chip ops and creates a MSI interrupt domain.
1399 *
1400 * Returns:
1401 * A domain pointer or NULL in case of failure.
1402 */
Marc Zyngierbe5436c2015-10-13 12:51:44 +01001403struct irq_domain *pci_msi_create_irq_domain(struct fwnode_handle *fwnode,
Jiang Liu3878eae2014-11-11 21:02:18 +08001404 struct msi_domain_info *info,
1405 struct irq_domain *parent)
1406{
Marc Zyngier03808392015-07-28 14:46:09 +01001407 struct irq_domain *domain;
1408
Jiang Liu3878eae2014-11-11 21:02:18 +08001409 if (info->flags & MSI_FLAG_USE_DEF_DOM_OPS)
1410 pci_msi_domain_update_dom_ops(info);
1411 if (info->flags & MSI_FLAG_USE_DEF_CHIP_OPS)
1412 pci_msi_domain_update_chip_ops(info);
1413
Marc Zyngierbe5436c2015-10-13 12:51:44 +01001414 domain = msi_create_irq_domain(fwnode, info, parent);
Marc Zyngier03808392015-07-28 14:46:09 +01001415 if (!domain)
1416 return NULL;
1417
1418 domain->bus_token = DOMAIN_BUS_PCI_MSI;
1419 return domain;
Jiang Liu3878eae2014-11-11 21:02:18 +08001420}
Jake Oshinsa4289dc2015-12-10 17:52:59 +00001421EXPORT_SYMBOL_GPL(pci_msi_create_irq_domain);
Jiang Liu3878eae2014-11-11 21:02:18 +08001422
1423/**
1424 * pci_msi_domain_alloc_irqs - Allocate interrupts for @dev in @domain
1425 * @domain: The interrupt domain to allocate from
1426 * @dev: The device for which to allocate
1427 * @nvec: The number of interrupts to allocate
1428 * @type: Unused to allow simpler migration from the arch_XXX interfaces
1429 *
1430 * Returns:
1431 * A virtual interrupt number or an error code in case of failure
1432 */
1433int pci_msi_domain_alloc_irqs(struct irq_domain *domain, struct pci_dev *dev,
1434 int nvec, int type)
1435{
1436 return msi_domain_alloc_irqs(domain, &dev->dev, nvec);
1437}
1438
1439/**
1440 * pci_msi_domain_free_irqs - Free interrupts for @dev in @domain
1441 * @domain: The interrupt domain
1442 * @dev: The device for which to free interrupts
1443 */
1444void pci_msi_domain_free_irqs(struct irq_domain *domain, struct pci_dev *dev)
1445{
1446 msi_domain_free_irqs(domain, &dev->dev);
1447}
Jiang Liu8e047ad2014-11-15 22:24:07 +08001448
1449/**
1450 * pci_msi_create_default_irq_domain - Create a default MSI interrupt domain
Marc Zyngierbe5436c2015-10-13 12:51:44 +01001451 * @fwnode: Optional fwnode of the interrupt controller
Jiang Liu8e047ad2014-11-15 22:24:07 +08001452 * @info: MSI domain info
1453 * @parent: Parent irq domain
1454 *
1455 * Returns: A domain pointer or NULL in case of failure. If successful
1456 * the default PCI/MSI irqdomain pointer is updated.
1457 */
Marc Zyngierbe5436c2015-10-13 12:51:44 +01001458struct irq_domain *pci_msi_create_default_irq_domain(struct fwnode_handle *fwnode,
Jiang Liu8e047ad2014-11-15 22:24:07 +08001459 struct msi_domain_info *info, struct irq_domain *parent)
1460{
1461 struct irq_domain *domain;
1462
1463 mutex_lock(&pci_msi_domain_lock);
1464 if (pci_msi_default_domain) {
1465 pr_err("PCI: default irq domain for PCI MSI has already been created.\n");
1466 domain = NULL;
1467 } else {
Marc Zyngierbe5436c2015-10-13 12:51:44 +01001468 domain = pci_msi_create_irq_domain(fwnode, info, parent);
Jiang Liu8e047ad2014-11-15 22:24:07 +08001469 pci_msi_default_domain = domain;
1470 }
1471 mutex_unlock(&pci_msi_domain_lock);
1472
1473 return domain;
1474}
David Daneyb6eec9b2015-10-08 15:10:49 -07001475
1476static int get_msi_id_cb(struct pci_dev *pdev, u16 alias, void *data)
1477{
1478 u32 *pa = data;
1479
1480 *pa = alias;
1481 return 0;
1482}
1483/**
1484 * pci_msi_domain_get_msi_rid - Get the MSI requester id (RID)
1485 * @domain: The interrupt domain
1486 * @pdev: The PCI device.
1487 *
1488 * The RID for a device is formed from the alias, with a firmware
1489 * supplied mapping applied
1490 *
1491 * Returns: The RID.
1492 */
1493u32 pci_msi_domain_get_msi_rid(struct irq_domain *domain, struct pci_dev *pdev)
1494{
1495 struct device_node *of_node;
1496 u32 rid = 0;
1497
1498 pci_for_each_dma_alias(pdev, get_msi_id_cb, &rid);
1499
1500 of_node = irq_domain_get_of_node(domain);
1501 if (of_node)
1502 rid = of_msi_map_rid(&pdev->dev, of_node, rid);
1503
1504 return rid;
1505}
Marc Zyngier54fa97e2015-10-02 14:43:06 +01001506
1507/**
1508 * pci_msi_get_device_domain - Get the MSI domain for a given PCI device
1509 * @pdev: The PCI device
1510 *
1511 * Use the firmware data to find a device-specific MSI domain
1512 * (i.e. not one that is ste as a default).
1513 *
1514 * Returns: The coresponding MSI domain or NULL if none has been found.
1515 */
1516struct irq_domain *pci_msi_get_device_domain(struct pci_dev *pdev)
1517{
1518 u32 rid = 0;
1519
1520 pci_for_each_dma_alias(pdev, get_msi_id_cb, &rid);
1521 return of_msi_map_get_device_domain(&pdev->dev, rid);
1522}
Jiang Liu3878eae2014-11-11 21:02:18 +08001523#endif /* CONFIG_PCI_MSI_IRQ_DOMAIN */