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Jeff Garzik1fdffbc2006-02-09 05:15:27 -05001/*
Dave Jonesf3a03b02007-07-16 11:23:03 -04002 * libata-sff.c - helper library for PCI IDE BMDMA
Jeff Garzik1fdffbc2006-02-09 05:15:27 -05003 *
4 * Maintained by: Jeff Garzik <jgarzik@pobox.com>
5 * Please ALWAYS copy linux-ide@vger.kernel.org
6 * on emails.
7 *
8 * Copyright 2003-2006 Red Hat, Inc. All rights reserved.
9 * Copyright 2003-2006 Jeff Garzik
10 *
11 *
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2, or (at your option)
15 * any later version.
16 *
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; see the file COPYING. If not, write to
24 * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
25 *
26 *
27 * libata documentation is available via 'make {ps|pdf}docs',
28 * as Documentation/DocBook/libata.*
29 *
30 * Hardware documentation available from http://www.t13.org/ and
31 * http://www.sata-io.org/
32 *
33 */
34
Jeff Garzik1fdffbc2006-02-09 05:15:27 -050035#include <linux/kernel.h>
Tejun Heo5a0e3ad2010-03-24 17:04:11 +090036#include <linux/gfp.h>
Jeff Garzik1fdffbc2006-02-09 05:15:27 -050037#include <linux/pci.h>
38#include <linux/libata.h>
Tejun Heo624d5c52008-03-25 22:16:41 +090039#include <linux/highmem.h>
Jeff Garzik1fdffbc2006-02-09 05:15:27 -050040
41#include "libata.h"
42
Tejun Heo624d5c52008-03-25 22:16:41 +090043const struct ata_port_operations ata_sff_port_ops = {
44 .inherits = &ata_base_port_ops,
45
Tejun Heo9363c382008-04-07 22:47:16 +090046 .qc_prep = ata_sff_qc_prep,
47 .qc_issue = ata_sff_qc_issue,
Tejun Heo4c9bf4e2008-04-07 22:47:20 +090048 .qc_fill_rtf = ata_sff_qc_fill_rtf,
Tejun Heo624d5c52008-03-25 22:16:41 +090049
Tejun Heo9363c382008-04-07 22:47:16 +090050 .freeze = ata_sff_freeze,
51 .thaw = ata_sff_thaw,
Tejun Heo0aa11132008-04-07 22:47:18 +090052 .prereset = ata_sff_prereset,
Tejun Heo9363c382008-04-07 22:47:16 +090053 .softreset = ata_sff_softreset,
Tejun Heo57c9efd2008-04-07 22:47:19 +090054 .hardreset = sata_sff_hardreset,
Tejun Heo203c75b2008-04-07 22:47:18 +090055 .postreset = ata_sff_postreset,
Alan Cox3d47aa82009-03-24 10:23:19 +000056 .drain_fifo = ata_sff_drain_fifo,
Tejun Heo9363c382008-04-07 22:47:16 +090057 .error_handler = ata_sff_error_handler,
58 .post_internal_cmd = ata_sff_post_internal_cmd,
Tejun Heo624d5c52008-03-25 22:16:41 +090059
Tejun Heo5682ed32008-04-07 22:47:16 +090060 .sff_dev_select = ata_sff_dev_select,
61 .sff_check_status = ata_sff_check_status,
62 .sff_tf_load = ata_sff_tf_load,
63 .sff_tf_read = ata_sff_tf_read,
64 .sff_exec_command = ata_sff_exec_command,
65 .sff_data_xfer = ata_sff_data_xfer,
Tejun Heo288623a2008-04-07 22:47:17 +090066 .sff_irq_clear = ata_sff_irq_clear,
Tejun Heo624d5c52008-03-25 22:16:41 +090067
Alan Coxc96f1732009-03-24 10:23:46 +000068 .lost_interrupt = ata_sff_lost_interrupt,
69
Tejun Heo624d5c52008-03-25 22:16:41 +090070 .port_start = ata_sff_port_start,
71};
Alan Cox0fe40ff2009-01-05 14:16:13 +000072EXPORT_SYMBOL_GPL(ata_sff_port_ops);
Tejun Heo624d5c52008-03-25 22:16:41 +090073
74const struct ata_port_operations ata_bmdma_port_ops = {
75 .inherits = &ata_sff_port_ops,
76
Tejun Heo9363c382008-04-07 22:47:16 +090077 .mode_filter = ata_bmdma_mode_filter,
Tejun Heo624d5c52008-03-25 22:16:41 +090078
79 .bmdma_setup = ata_bmdma_setup,
80 .bmdma_start = ata_bmdma_start,
81 .bmdma_stop = ata_bmdma_stop,
82 .bmdma_status = ata_bmdma_status,
Tejun Heo624d5c52008-03-25 22:16:41 +090083};
Alan Cox0fe40ff2009-01-05 14:16:13 +000084EXPORT_SYMBOL_GPL(ata_bmdma_port_ops);
Tejun Heo624d5c52008-03-25 22:16:41 +090085
Alan Cox871af122009-01-05 14:16:39 +000086const struct ata_port_operations ata_bmdma32_port_ops = {
87 .inherits = &ata_bmdma_port_ops,
88
89 .sff_data_xfer = ata_sff_data_xfer32,
Alan Coxe3cf95d2009-04-09 17:31:17 +010090 .port_start = ata_sff_port_start32,
Alan Cox871af122009-01-05 14:16:39 +000091};
92EXPORT_SYMBOL_GPL(ata_bmdma32_port_ops);
93
Tejun Heo624d5c52008-03-25 22:16:41 +090094/**
95 * ata_fill_sg - Fill PCI IDE PRD table
96 * @qc: Metadata associated with taskfile to be transferred
97 *
98 * Fill PCI IDE PRD (scatter-gather) table with segments
99 * associated with the current disk command.
100 *
101 * LOCKING:
102 * spin_lock_irqsave(host lock)
103 *
104 */
105static void ata_fill_sg(struct ata_queued_cmd *qc)
106{
107 struct ata_port *ap = qc->ap;
108 struct scatterlist *sg;
109 unsigned int si, pi;
110
111 pi = 0;
112 for_each_sg(qc->sg, sg, qc->n_elem, si) {
113 u32 addr, offset;
114 u32 sg_len, len;
115
116 /* determine if physical DMA addr spans 64K boundary.
117 * Note h/w doesn't support 64-bit, so we unconditionally
118 * truncate dma_addr_t to u32.
119 */
120 addr = (u32) sg_dma_address(sg);
121 sg_len = sg_dma_len(sg);
122
123 while (sg_len) {
124 offset = addr & 0xffff;
125 len = sg_len;
126 if ((offset + sg_len) > 0x10000)
127 len = 0x10000 - offset;
128
129 ap->prd[pi].addr = cpu_to_le32(addr);
130 ap->prd[pi].flags_len = cpu_to_le32(len & 0xffff);
131 VPRINTK("PRD[%u] = (0x%X, 0x%X)\n", pi, addr, len);
132
133 pi++;
134 sg_len -= len;
135 addr += len;
136 }
137 }
138
139 ap->prd[pi - 1].flags_len |= cpu_to_le32(ATA_PRD_EOT);
140}
141
142/**
143 * ata_fill_sg_dumb - Fill PCI IDE PRD table
144 * @qc: Metadata associated with taskfile to be transferred
145 *
146 * Fill PCI IDE PRD (scatter-gather) table with segments
147 * associated with the current disk command. Perform the fill
148 * so that we avoid writing any length 64K records for
149 * controllers that don't follow the spec.
150 *
151 * LOCKING:
152 * spin_lock_irqsave(host lock)
153 *
154 */
155static void ata_fill_sg_dumb(struct ata_queued_cmd *qc)
156{
157 struct ata_port *ap = qc->ap;
158 struct scatterlist *sg;
159 unsigned int si, pi;
160
161 pi = 0;
162 for_each_sg(qc->sg, sg, qc->n_elem, si) {
163 u32 addr, offset;
164 u32 sg_len, len, blen;
165
166 /* determine if physical DMA addr spans 64K boundary.
167 * Note h/w doesn't support 64-bit, so we unconditionally
168 * truncate dma_addr_t to u32.
169 */
170 addr = (u32) sg_dma_address(sg);
171 sg_len = sg_dma_len(sg);
172
173 while (sg_len) {
174 offset = addr & 0xffff;
175 len = sg_len;
176 if ((offset + sg_len) > 0x10000)
177 len = 0x10000 - offset;
178
179 blen = len & 0xffff;
180 ap->prd[pi].addr = cpu_to_le32(addr);
181 if (blen == 0) {
Alan Cox0fe40ff2009-01-05 14:16:13 +0000182 /* Some PATA chipsets like the CS5530 can't
183 cope with 0x0000 meaning 64K as the spec
184 says */
Tejun Heo624d5c52008-03-25 22:16:41 +0900185 ap->prd[pi].flags_len = cpu_to_le32(0x8000);
186 blen = 0x8000;
187 ap->prd[++pi].addr = cpu_to_le32(addr + 0x8000);
188 }
189 ap->prd[pi].flags_len = cpu_to_le32(blen);
190 VPRINTK("PRD[%u] = (0x%X, 0x%X)\n", pi, addr, len);
191
192 pi++;
193 sg_len -= len;
194 addr += len;
195 }
196 }
197
198 ap->prd[pi - 1].flags_len |= cpu_to_le32(ATA_PRD_EOT);
199}
200
201/**
Tejun Heo9363c382008-04-07 22:47:16 +0900202 * ata_sff_qc_prep - Prepare taskfile for submission
Tejun Heo624d5c52008-03-25 22:16:41 +0900203 * @qc: Metadata associated with taskfile to be prepared
204 *
205 * Prepare ATA taskfile for submission.
206 *
207 * LOCKING:
208 * spin_lock_irqsave(host lock)
209 */
Tejun Heo9363c382008-04-07 22:47:16 +0900210void ata_sff_qc_prep(struct ata_queued_cmd *qc)
Tejun Heo624d5c52008-03-25 22:16:41 +0900211{
212 if (!(qc->flags & ATA_QCFLAG_DMAMAP))
213 return;
214
215 ata_fill_sg(qc);
216}
Alan Cox0fe40ff2009-01-05 14:16:13 +0000217EXPORT_SYMBOL_GPL(ata_sff_qc_prep);
Tejun Heo624d5c52008-03-25 22:16:41 +0900218
219/**
Tejun Heo9363c382008-04-07 22:47:16 +0900220 * ata_sff_dumb_qc_prep - Prepare taskfile for submission
Tejun Heo624d5c52008-03-25 22:16:41 +0900221 * @qc: Metadata associated with taskfile to be prepared
222 *
223 * Prepare ATA taskfile for submission.
224 *
225 * LOCKING:
226 * spin_lock_irqsave(host lock)
227 */
Tejun Heo9363c382008-04-07 22:47:16 +0900228void ata_sff_dumb_qc_prep(struct ata_queued_cmd *qc)
Tejun Heo624d5c52008-03-25 22:16:41 +0900229{
230 if (!(qc->flags & ATA_QCFLAG_DMAMAP))
231 return;
232
233 ata_fill_sg_dumb(qc);
234}
Alan Cox0fe40ff2009-01-05 14:16:13 +0000235EXPORT_SYMBOL_GPL(ata_sff_dumb_qc_prep);
Tejun Heo624d5c52008-03-25 22:16:41 +0900236
Jeff Garzik1fdffbc2006-02-09 05:15:27 -0500237/**
Tejun Heo9363c382008-04-07 22:47:16 +0900238 * ata_sff_check_status - Read device status reg & clear interrupt
Tejun Heo272f7882008-03-25 22:16:40 +0900239 * @ap: port where the device is
240 *
241 * Reads ATA taskfile status register for currently-selected device
242 * and return its value. This also clears pending interrupts
243 * from this device
244 *
245 * LOCKING:
246 * Inherited from caller.
247 */
Tejun Heo9363c382008-04-07 22:47:16 +0900248u8 ata_sff_check_status(struct ata_port *ap)
Tejun Heo272f7882008-03-25 22:16:40 +0900249{
250 return ioread8(ap->ioaddr.status_addr);
251}
Alan Cox0fe40ff2009-01-05 14:16:13 +0000252EXPORT_SYMBOL_GPL(ata_sff_check_status);
Tejun Heo272f7882008-03-25 22:16:40 +0900253
254/**
Tejun Heo9363c382008-04-07 22:47:16 +0900255 * ata_sff_altstatus - Read device alternate status reg
Tejun Heo272f7882008-03-25 22:16:40 +0900256 * @ap: port where the device is
257 *
258 * Reads ATA taskfile alternate status register for
259 * currently-selected device and return its value.
260 *
261 * Note: may NOT be used as the check_altstatus() entry in
262 * ata_port_operations.
263 *
264 * LOCKING:
265 * Inherited from caller.
266 */
Alan Coxa57c1ba2008-05-29 22:10:58 +0100267static u8 ata_sff_altstatus(struct ata_port *ap)
Tejun Heo272f7882008-03-25 22:16:40 +0900268{
Tejun Heo5682ed32008-04-07 22:47:16 +0900269 if (ap->ops->sff_check_altstatus)
270 return ap->ops->sff_check_altstatus(ap);
Tejun Heo272f7882008-03-25 22:16:40 +0900271
272 return ioread8(ap->ioaddr.altstatus_addr);
273}
274
275/**
Alan Coxa57c1ba2008-05-29 22:10:58 +0100276 * ata_sff_irq_status - Check if the device is busy
277 * @ap: port where the device is
278 *
279 * Determine if the port is currently busy. Uses altstatus
280 * if available in order to avoid clearing shared IRQ status
281 * when finding an IRQ source. Non ctl capable devices don't
282 * share interrupt lines fortunately for us.
283 *
284 * LOCKING:
285 * Inherited from caller.
286 */
287static u8 ata_sff_irq_status(struct ata_port *ap)
288{
289 u8 status;
290
291 if (ap->ops->sff_check_altstatus || ap->ioaddr.altstatus_addr) {
292 status = ata_sff_altstatus(ap);
293 /* Not us: We are busy */
294 if (status & ATA_BUSY)
Alan Cox0fe40ff2009-01-05 14:16:13 +0000295 return status;
Alan Coxa57c1ba2008-05-29 22:10:58 +0100296 }
297 /* Clear INTRQ latch */
Hugh Dickins6311c902008-06-05 14:44:39 +0100298 status = ap->ops->sff_check_status(ap);
Alan Coxa57c1ba2008-05-29 22:10:58 +0100299 return status;
300}
301
302/**
303 * ata_sff_sync - Flush writes
304 * @ap: Port to wait for.
305 *
306 * CAUTION:
307 * If we have an mmio device with no ctl and no altstatus
308 * method this will fail. No such devices are known to exist.
309 *
310 * LOCKING:
311 * Inherited from caller.
312 */
313
314static void ata_sff_sync(struct ata_port *ap)
315{
316 if (ap->ops->sff_check_altstatus)
317 ap->ops->sff_check_altstatus(ap);
318 else if (ap->ioaddr.altstatus_addr)
319 ioread8(ap->ioaddr.altstatus_addr);
320}
321
322/**
323 * ata_sff_pause - Flush writes and wait 400nS
324 * @ap: Port to pause for.
325 *
326 * CAUTION:
327 * If we have an mmio device with no ctl and no altstatus
328 * method this will fail. No such devices are known to exist.
329 *
330 * LOCKING:
331 * Inherited from caller.
332 */
333
334void ata_sff_pause(struct ata_port *ap)
335{
336 ata_sff_sync(ap);
337 ndelay(400);
338}
Alan Cox0fe40ff2009-01-05 14:16:13 +0000339EXPORT_SYMBOL_GPL(ata_sff_pause);
Alan Coxa57c1ba2008-05-29 22:10:58 +0100340
341/**
342 * ata_sff_dma_pause - Pause before commencing DMA
343 * @ap: Port to pause for.
344 *
345 * Perform I/O fencing and ensure sufficient cycle delays occur
346 * for the HDMA1:0 transition
347 */
Alan Cox0fe40ff2009-01-05 14:16:13 +0000348
Alan Coxa57c1ba2008-05-29 22:10:58 +0100349void ata_sff_dma_pause(struct ata_port *ap)
350{
351 if (ap->ops->sff_check_altstatus || ap->ioaddr.altstatus_addr) {
352 /* An altstatus read will cause the needed delay without
353 messing up the IRQ status */
354 ata_sff_altstatus(ap);
355 return;
356 }
357 /* There are no DMA controllers without ctl. BUG here to ensure
358 we never violate the HDMA1:0 transition timing and risk
359 corruption. */
360 BUG();
361}
Alan Cox0fe40ff2009-01-05 14:16:13 +0000362EXPORT_SYMBOL_GPL(ata_sff_dma_pause);
Alan Coxa57c1ba2008-05-29 22:10:58 +0100363
364/**
Tejun Heo9363c382008-04-07 22:47:16 +0900365 * ata_sff_busy_sleep - sleep until BSY clears, or timeout
Tejun Heo624d5c52008-03-25 22:16:41 +0900366 * @ap: port containing status register to be polled
Tejun Heo341c2c92008-05-20 02:17:51 +0900367 * @tmout_pat: impatience timeout in msecs
368 * @tmout: overall timeout in msecs
Tejun Heo624d5c52008-03-25 22:16:41 +0900369 *
370 * Sleep until ATA Status register bit BSY clears,
371 * or a timeout occurs.
372 *
373 * LOCKING:
374 * Kernel thread context (may sleep).
375 *
376 * RETURNS:
377 * 0 on success, -errno otherwise.
378 */
Tejun Heo9363c382008-04-07 22:47:16 +0900379int ata_sff_busy_sleep(struct ata_port *ap,
380 unsigned long tmout_pat, unsigned long tmout)
Tejun Heo624d5c52008-03-25 22:16:41 +0900381{
382 unsigned long timer_start, timeout;
383 u8 status;
384
Tejun Heo9363c382008-04-07 22:47:16 +0900385 status = ata_sff_busy_wait(ap, ATA_BUSY, 300);
Tejun Heo624d5c52008-03-25 22:16:41 +0900386 timer_start = jiffies;
Tejun Heo341c2c92008-05-20 02:17:51 +0900387 timeout = ata_deadline(timer_start, tmout_pat);
Tejun Heo624d5c52008-03-25 22:16:41 +0900388 while (status != 0xff && (status & ATA_BUSY) &&
389 time_before(jiffies, timeout)) {
390 msleep(50);
Tejun Heo9363c382008-04-07 22:47:16 +0900391 status = ata_sff_busy_wait(ap, ATA_BUSY, 3);
Tejun Heo624d5c52008-03-25 22:16:41 +0900392 }
393
394 if (status != 0xff && (status & ATA_BUSY))
395 ata_port_printk(ap, KERN_WARNING,
396 "port is slow to respond, please be patient "
397 "(Status 0x%x)\n", status);
398
Tejun Heo341c2c92008-05-20 02:17:51 +0900399 timeout = ata_deadline(timer_start, tmout);
Tejun Heo624d5c52008-03-25 22:16:41 +0900400 while (status != 0xff && (status & ATA_BUSY) &&
401 time_before(jiffies, timeout)) {
402 msleep(50);
Tejun Heo5682ed32008-04-07 22:47:16 +0900403 status = ap->ops->sff_check_status(ap);
Tejun Heo624d5c52008-03-25 22:16:41 +0900404 }
405
406 if (status == 0xff)
407 return -ENODEV;
408
409 if (status & ATA_BUSY) {
410 ata_port_printk(ap, KERN_ERR, "port failed to respond "
411 "(%lu secs, Status 0x%x)\n",
Tejun Heo341c2c92008-05-20 02:17:51 +0900412 DIV_ROUND_UP(tmout, 1000), status);
Tejun Heo624d5c52008-03-25 22:16:41 +0900413 return -EBUSY;
414 }
415
416 return 0;
417}
Alan Cox0fe40ff2009-01-05 14:16:13 +0000418EXPORT_SYMBOL_GPL(ata_sff_busy_sleep);
Tejun Heo624d5c52008-03-25 22:16:41 +0900419
Tejun Heoaa2731a2008-04-07 22:47:19 +0900420static int ata_sff_check_ready(struct ata_link *link)
421{
422 u8 status = link->ap->ops->sff_check_status(link->ap);
423
Tejun Heo78ab88f2008-05-01 23:41:41 +0900424 return ata_check_ready(status);
Tejun Heoaa2731a2008-04-07 22:47:19 +0900425}
426
Tejun Heo624d5c52008-03-25 22:16:41 +0900427/**
Tejun Heo9363c382008-04-07 22:47:16 +0900428 * ata_sff_wait_ready - sleep until BSY clears, or timeout
Tejun Heo705e76b2008-04-07 22:47:19 +0900429 * @link: SFF link to wait ready status for
Tejun Heo624d5c52008-03-25 22:16:41 +0900430 * @deadline: deadline jiffies for the operation
431 *
432 * Sleep until ATA Status register bit BSY clears, or timeout
433 * occurs.
434 *
435 * LOCKING:
436 * Kernel thread context (may sleep).
437 *
438 * RETURNS:
439 * 0 on success, -errno otherwise.
440 */
Tejun Heo705e76b2008-04-07 22:47:19 +0900441int ata_sff_wait_ready(struct ata_link *link, unsigned long deadline)
Tejun Heo624d5c52008-03-25 22:16:41 +0900442{
Tejun Heoaa2731a2008-04-07 22:47:19 +0900443 return ata_wait_ready(link, deadline, ata_sff_check_ready);
Tejun Heo624d5c52008-03-25 22:16:41 +0900444}
Alan Cox0fe40ff2009-01-05 14:16:13 +0000445EXPORT_SYMBOL_GPL(ata_sff_wait_ready);
Tejun Heo624d5c52008-03-25 22:16:41 +0900446
447/**
Sergei Shtylyov41dec292010-05-07 22:47:50 +0400448 * ata_sff_set_devctl - Write device control reg
449 * @ap: port where the device is
450 * @ctl: value to write
451 *
452 * Writes ATA taskfile device control register.
453 *
454 * Note: may NOT be used as the sff_set_devctl() entry in
455 * ata_port_operations.
456 *
457 * LOCKING:
458 * Inherited from caller.
459 */
460static void ata_sff_set_devctl(struct ata_port *ap, u8 ctl)
461{
462 if (ap->ops->sff_set_devctl)
463 ap->ops->sff_set_devctl(ap, ctl);
464 else
465 iowrite8(ctl, ap->ioaddr.ctl_addr);
466}
467
468/**
Tejun Heo9363c382008-04-07 22:47:16 +0900469 * ata_sff_dev_select - Select device 0/1 on ATA bus
Tejun Heo624d5c52008-03-25 22:16:41 +0900470 * @ap: ATA channel to manipulate
471 * @device: ATA device (numbered from zero) to select
472 *
473 * Use the method defined in the ATA specification to
474 * make either device 0, or device 1, active on the
475 * ATA channel. Works with both PIO and MMIO.
476 *
477 * May be used as the dev_select() entry in ata_port_operations.
478 *
479 * LOCKING:
480 * caller.
481 */
Tejun Heo9363c382008-04-07 22:47:16 +0900482void ata_sff_dev_select(struct ata_port *ap, unsigned int device)
Tejun Heo624d5c52008-03-25 22:16:41 +0900483{
484 u8 tmp;
485
486 if (device == 0)
487 tmp = ATA_DEVICE_OBS;
488 else
489 tmp = ATA_DEVICE_OBS | ATA_DEV1;
490
491 iowrite8(tmp, ap->ioaddr.device_addr);
Tejun Heo9363c382008-04-07 22:47:16 +0900492 ata_sff_pause(ap); /* needed; also flushes, for mmio */
Tejun Heo624d5c52008-03-25 22:16:41 +0900493}
Alan Cox0fe40ff2009-01-05 14:16:13 +0000494EXPORT_SYMBOL_GPL(ata_sff_dev_select);
Tejun Heo624d5c52008-03-25 22:16:41 +0900495
496/**
497 * ata_dev_select - Select device 0/1 on ATA bus
498 * @ap: ATA channel to manipulate
499 * @device: ATA device (numbered from zero) to select
500 * @wait: non-zero to wait for Status register BSY bit to clear
501 * @can_sleep: non-zero if context allows sleeping
502 *
503 * Use the method defined in the ATA specification to
504 * make either device 0, or device 1, active on the
505 * ATA channel.
506 *
Tejun Heo9363c382008-04-07 22:47:16 +0900507 * This is a high-level version of ata_sff_dev_select(), which
508 * additionally provides the services of inserting the proper
509 * pauses and status polling, where needed.
Tejun Heo624d5c52008-03-25 22:16:41 +0900510 *
511 * LOCKING:
512 * caller.
513 */
Tejun Heoc7a82092010-05-10 21:41:29 +0200514static void ata_dev_select(struct ata_port *ap, unsigned int device,
Tejun Heo624d5c52008-03-25 22:16:41 +0900515 unsigned int wait, unsigned int can_sleep)
516{
517 if (ata_msg_probe(ap))
518 ata_port_printk(ap, KERN_INFO, "ata_dev_select: ENTER, "
519 "device %u, wait %u\n", device, wait);
520
521 if (wait)
522 ata_wait_idle(ap);
523
Tejun Heo5682ed32008-04-07 22:47:16 +0900524 ap->ops->sff_dev_select(ap, device);
Tejun Heo624d5c52008-03-25 22:16:41 +0900525
526 if (wait) {
527 if (can_sleep && ap->link.device[device].class == ATA_DEV_ATAPI)
528 msleep(150);
529 ata_wait_idle(ap);
530 }
531}
532
533/**
Tejun Heo9363c382008-04-07 22:47:16 +0900534 * ata_sff_irq_on - Enable interrupts on a port.
Tejun Heo90088bb2006-10-09 11:10:26 +0900535 * @ap: Port on which interrupts are enabled.
536 *
537 * Enable interrupts on a legacy IDE device using MMIO or PIO,
538 * wait for idle, clear any pending interrupts.
539 *
Sergei Shtylyove42a5422010-05-07 22:49:02 +0400540 * Note: may NOT be used as the sff_irq_on() entry in
541 * ata_port_operations.
542 *
Tejun Heo90088bb2006-10-09 11:10:26 +0900543 * LOCKING:
544 * Inherited from caller.
545 */
Sergei Shtylyove42a5422010-05-07 22:49:02 +0400546void ata_sff_irq_on(struct ata_port *ap)
Tejun Heo90088bb2006-10-09 11:10:26 +0900547{
548 struct ata_ioports *ioaddr = &ap->ioaddr;
Sergei Shtylyove42a5422010-05-07 22:49:02 +0400549
550 if (ap->ops->sff_irq_on) {
551 ap->ops->sff_irq_on(ap);
552 return;
553 }
Tejun Heo90088bb2006-10-09 11:10:26 +0900554
555 ap->ctl &= ~ATA_NIEN;
556 ap->last_ctl = ap->ctl;
557
Sergei Shtylyove42a5422010-05-07 22:49:02 +0400558 if (ap->ops->sff_set_devctl || ioaddr->ctl_addr)
559 ata_sff_set_devctl(ap, ap->ctl);
560 ata_wait_idle(ap);
Tejun Heo90088bb2006-10-09 11:10:26 +0900561
Tejun Heo5682ed32008-04-07 22:47:16 +0900562 ap->ops->sff_irq_clear(ap);
Tejun Heo90088bb2006-10-09 11:10:26 +0900563}
Alan Cox0fe40ff2009-01-05 14:16:13 +0000564EXPORT_SYMBOL_GPL(ata_sff_irq_on);
Tejun Heo90088bb2006-10-09 11:10:26 +0900565
566/**
Tejun Heo9363c382008-04-07 22:47:16 +0900567 * ata_sff_irq_clear - Clear PCI IDE BMDMA interrupt.
Tejun Heo272f7882008-03-25 22:16:40 +0900568 * @ap: Port associated with this ATA transaction.
569 *
570 * Clear interrupt and error flags in DMA status register.
571 *
572 * May be used as the irq_clear() entry in ata_port_operations.
573 *
574 * LOCKING:
575 * spin_lock_irqsave(host lock)
576 */
Tejun Heo9363c382008-04-07 22:47:16 +0900577void ata_sff_irq_clear(struct ata_port *ap)
Tejun Heo272f7882008-03-25 22:16:40 +0900578{
579 void __iomem *mmio = ap->ioaddr.bmdma_addr;
580
581 if (!mmio)
582 return;
583
584 iowrite8(ioread8(mmio + ATA_DMA_STATUS), mmio + ATA_DMA_STATUS);
585}
Alan Cox0fe40ff2009-01-05 14:16:13 +0000586EXPORT_SYMBOL_GPL(ata_sff_irq_clear);
Tejun Heo272f7882008-03-25 22:16:40 +0900587
588/**
Tejun Heo9363c382008-04-07 22:47:16 +0900589 * ata_sff_tf_load - send taskfile registers to host controller
Jeff Garzik1fdffbc2006-02-09 05:15:27 -0500590 * @ap: Port to which output is sent
591 * @tf: ATA taskfile register set
592 *
593 * Outputs ATA taskfile to standard ATA host controller.
594 *
595 * LOCKING:
596 * Inherited from caller.
597 */
Tejun Heo9363c382008-04-07 22:47:16 +0900598void ata_sff_tf_load(struct ata_port *ap, const struct ata_taskfile *tf)
Jeff Garzik1fdffbc2006-02-09 05:15:27 -0500599{
Tejun Heo0d5ff562007-02-01 15:06:36 +0900600 struct ata_ioports *ioaddr = &ap->ioaddr;
601 unsigned int is_addr = tf->flags & ATA_TFLAG_ISADDR;
602
603 if (tf->ctl != ap->last_ctl) {
Tejun Heof659f0e42008-03-06 13:12:54 +0900604 if (ioaddr->ctl_addr)
605 iowrite8(tf->ctl, ioaddr->ctl_addr);
Tejun Heo0d5ff562007-02-01 15:06:36 +0900606 ap->last_ctl = tf->ctl;
Tejun Heo0d5ff562007-02-01 15:06:36 +0900607 }
608
609 if (is_addr && (tf->flags & ATA_TFLAG_LBA48)) {
Tejun Heoefcb3cf2009-01-09 19:19:14 +0900610 WARN_ON_ONCE(!ioaddr->ctl_addr);
Tejun Heo0d5ff562007-02-01 15:06:36 +0900611 iowrite8(tf->hob_feature, ioaddr->feature_addr);
612 iowrite8(tf->hob_nsect, ioaddr->nsect_addr);
613 iowrite8(tf->hob_lbal, ioaddr->lbal_addr);
614 iowrite8(tf->hob_lbam, ioaddr->lbam_addr);
615 iowrite8(tf->hob_lbah, ioaddr->lbah_addr);
616 VPRINTK("hob: feat 0x%X nsect 0x%X, lba 0x%X 0x%X 0x%X\n",
617 tf->hob_feature,
618 tf->hob_nsect,
619 tf->hob_lbal,
620 tf->hob_lbam,
621 tf->hob_lbah);
622 }
623
624 if (is_addr) {
625 iowrite8(tf->feature, ioaddr->feature_addr);
626 iowrite8(tf->nsect, ioaddr->nsect_addr);
627 iowrite8(tf->lbal, ioaddr->lbal_addr);
628 iowrite8(tf->lbam, ioaddr->lbam_addr);
629 iowrite8(tf->lbah, ioaddr->lbah_addr);
630 VPRINTK("feat 0x%X nsect 0x%X lba 0x%X 0x%X 0x%X\n",
631 tf->feature,
632 tf->nsect,
633 tf->lbal,
634 tf->lbam,
635 tf->lbah);
636 }
637
638 if (tf->flags & ATA_TFLAG_DEVICE) {
639 iowrite8(tf->device, ioaddr->device_addr);
640 VPRINTK("device 0x%X\n", tf->device);
641 }
Jeff Garzik1fdffbc2006-02-09 05:15:27 -0500642}
Alan Cox0fe40ff2009-01-05 14:16:13 +0000643EXPORT_SYMBOL_GPL(ata_sff_tf_load);
Jeff Garzik1fdffbc2006-02-09 05:15:27 -0500644
645/**
Tejun Heo9363c382008-04-07 22:47:16 +0900646 * ata_sff_tf_read - input device's ATA taskfile shadow registers
Jeff Garzik1fdffbc2006-02-09 05:15:27 -0500647 * @ap: Port from which input is read
648 * @tf: ATA taskfile register set for storing input
649 *
650 * Reads ATA taskfile registers for currently-selected device
Alan Cox76548ed2007-11-19 14:34:56 +0000651 * into @tf. Assumes the device has a fully SFF compliant task file
652 * layout and behaviour. If you device does not (eg has a different
653 * status method) then you will need to provide a replacement tf_read
Jeff Garzik1fdffbc2006-02-09 05:15:27 -0500654 *
Jeff Garzik1fdffbc2006-02-09 05:15:27 -0500655 * LOCKING:
656 * Inherited from caller.
657 */
Tejun Heo9363c382008-04-07 22:47:16 +0900658void ata_sff_tf_read(struct ata_port *ap, struct ata_taskfile *tf)
Jeff Garzik1fdffbc2006-02-09 05:15:27 -0500659{
Tejun Heo0d5ff562007-02-01 15:06:36 +0900660 struct ata_ioports *ioaddr = &ap->ioaddr;
Jeff Garzik1fdffbc2006-02-09 05:15:27 -0500661
Tejun Heo9363c382008-04-07 22:47:16 +0900662 tf->command = ata_sff_check_status(ap);
Tejun Heo0d5ff562007-02-01 15:06:36 +0900663 tf->feature = ioread8(ioaddr->error_addr);
664 tf->nsect = ioread8(ioaddr->nsect_addr);
665 tf->lbal = ioread8(ioaddr->lbal_addr);
666 tf->lbam = ioread8(ioaddr->lbam_addr);
667 tf->lbah = ioread8(ioaddr->lbah_addr);
668 tf->device = ioread8(ioaddr->device_addr);
Jeff Garzik1fdffbc2006-02-09 05:15:27 -0500669
Tejun Heo0d5ff562007-02-01 15:06:36 +0900670 if (tf->flags & ATA_TFLAG_LBA48) {
Tejun Heof659f0e42008-03-06 13:12:54 +0900671 if (likely(ioaddr->ctl_addr)) {
672 iowrite8(tf->ctl | ATA_HOB, ioaddr->ctl_addr);
673 tf->hob_feature = ioread8(ioaddr->error_addr);
674 tf->hob_nsect = ioread8(ioaddr->nsect_addr);
675 tf->hob_lbal = ioread8(ioaddr->lbal_addr);
676 tf->hob_lbam = ioread8(ioaddr->lbam_addr);
677 tf->hob_lbah = ioread8(ioaddr->lbah_addr);
678 iowrite8(tf->ctl, ioaddr->ctl_addr);
679 ap->last_ctl = tf->ctl;
680 } else
Tejun Heoefcb3cf2009-01-09 19:19:14 +0900681 WARN_ON_ONCE(1);
Tejun Heo0d5ff562007-02-01 15:06:36 +0900682 }
Jeff Garzik1fdffbc2006-02-09 05:15:27 -0500683}
Alan Cox0fe40ff2009-01-05 14:16:13 +0000684EXPORT_SYMBOL_GPL(ata_sff_tf_read);
Jeff Garzik1fdffbc2006-02-09 05:15:27 -0500685
Jeff Garzik1fdffbc2006-02-09 05:15:27 -0500686/**
Tejun Heo9363c382008-04-07 22:47:16 +0900687 * ata_sff_exec_command - issue ATA command to host controller
Tejun Heo272f7882008-03-25 22:16:40 +0900688 * @ap: port to which command is being issued
689 * @tf: ATA taskfile register set
Jeff Garzik1fdffbc2006-02-09 05:15:27 -0500690 *
Tejun Heo272f7882008-03-25 22:16:40 +0900691 * Issues ATA command, with proper synchronization with interrupt
692 * handler / other threads.
Jeff Garzik2cc432e2006-03-23 00:32:03 -0500693 *
694 * LOCKING:
Jeff Garzikcca39742006-08-24 03:19:22 -0400695 * spin_lock_irqsave(host lock)
Jeff Garzik2cc432e2006-03-23 00:32:03 -0500696 */
Tejun Heo9363c382008-04-07 22:47:16 +0900697void ata_sff_exec_command(struct ata_port *ap, const struct ata_taskfile *tf)
Jeff Garzik2cc432e2006-03-23 00:32:03 -0500698{
Tejun Heo272f7882008-03-25 22:16:40 +0900699 DPRINTK("ata%u: cmd 0x%X\n", ap->print_id, tf->command);
Jeff Garzik2cc432e2006-03-23 00:32:03 -0500700
Tejun Heo272f7882008-03-25 22:16:40 +0900701 iowrite8(tf->command, ap->ioaddr.command_addr);
Tejun Heo9363c382008-04-07 22:47:16 +0900702 ata_sff_pause(ap);
Jeff Garzik2cc432e2006-03-23 00:32:03 -0500703}
Alan Cox0fe40ff2009-01-05 14:16:13 +0000704EXPORT_SYMBOL_GPL(ata_sff_exec_command);
Jeff Garzik2cc432e2006-03-23 00:32:03 -0500705
Tejun Heo6d97dbd2006-05-15 20:58:24 +0900706/**
Tejun Heo624d5c52008-03-25 22:16:41 +0900707 * ata_tf_to_host - issue ATA taskfile to host controller
708 * @ap: port to which command is being issued
709 * @tf: ATA taskfile register set
710 *
711 * Issues ATA taskfile register set to ATA host controller,
712 * with proper synchronization with interrupt handler and
713 * other threads.
714 *
715 * LOCKING:
716 * spin_lock_irqsave(host lock)
717 */
718static inline void ata_tf_to_host(struct ata_port *ap,
719 const struct ata_taskfile *tf)
720{
Tejun Heo5682ed32008-04-07 22:47:16 +0900721 ap->ops->sff_tf_load(ap, tf);
722 ap->ops->sff_exec_command(ap, tf);
Tejun Heo624d5c52008-03-25 22:16:41 +0900723}
724
725/**
Tejun Heo9363c382008-04-07 22:47:16 +0900726 * ata_sff_data_xfer - Transfer data by PIO
Tejun Heo624d5c52008-03-25 22:16:41 +0900727 * @dev: device to target
728 * @buf: data buffer
729 * @buflen: buffer length
730 * @rw: read/write
731 *
732 * Transfer data from/to the device data register by PIO.
733 *
734 * LOCKING:
735 * Inherited from caller.
736 *
737 * RETURNS:
738 * Bytes consumed.
739 */
Tejun Heo9363c382008-04-07 22:47:16 +0900740unsigned int ata_sff_data_xfer(struct ata_device *dev, unsigned char *buf,
741 unsigned int buflen, int rw)
Tejun Heo624d5c52008-03-25 22:16:41 +0900742{
743 struct ata_port *ap = dev->link->ap;
744 void __iomem *data_addr = ap->ioaddr.data_addr;
745 unsigned int words = buflen >> 1;
746
747 /* Transfer multiple of 2 bytes */
748 if (rw == READ)
749 ioread16_rep(data_addr, buf, words);
750 else
751 iowrite16_rep(data_addr, buf, words);
752
Sergei Shtylyov2102d742009-02-15 23:30:38 +0400753 /* Transfer trailing byte, if any. */
Tejun Heo624d5c52008-03-25 22:16:41 +0900754 if (unlikely(buflen & 0x01)) {
Sergei Shtylyov2102d742009-02-15 23:30:38 +0400755 unsigned char pad[2];
Tejun Heo624d5c52008-03-25 22:16:41 +0900756
Sergei Shtylyov2102d742009-02-15 23:30:38 +0400757 /* Point buf to the tail of buffer */
758 buf += buflen - 1;
759
760 /*
761 * Use io*16_rep() accessors here as well to avoid pointlessly
Krzysztof Halasa972b94f2009-11-11 00:55:27 +0100762 * swapping bytes to and from on the big endian machines...
Sergei Shtylyov2102d742009-02-15 23:30:38 +0400763 */
Tejun Heo624d5c52008-03-25 22:16:41 +0900764 if (rw == READ) {
Sergei Shtylyov2102d742009-02-15 23:30:38 +0400765 ioread16_rep(data_addr, pad, 1);
766 *buf = pad[0];
Tejun Heo624d5c52008-03-25 22:16:41 +0900767 } else {
Sergei Shtylyov2102d742009-02-15 23:30:38 +0400768 pad[0] = *buf;
769 iowrite16_rep(data_addr, pad, 1);
Tejun Heo624d5c52008-03-25 22:16:41 +0900770 }
771 words++;
772 }
773
774 return words << 1;
775}
Alan Cox0fe40ff2009-01-05 14:16:13 +0000776EXPORT_SYMBOL_GPL(ata_sff_data_xfer);
Tejun Heo624d5c52008-03-25 22:16:41 +0900777
778/**
Alan Cox871af122009-01-05 14:16:39 +0000779 * ata_sff_data_xfer32 - Transfer data by PIO
780 * @dev: device to target
781 * @buf: data buffer
782 * @buflen: buffer length
783 * @rw: read/write
784 *
785 * Transfer data from/to the device data register by PIO using 32bit
786 * I/O operations.
787 *
788 * LOCKING:
789 * Inherited from caller.
790 *
791 * RETURNS:
792 * Bytes consumed.
793 */
794
795unsigned int ata_sff_data_xfer32(struct ata_device *dev, unsigned char *buf,
796 unsigned int buflen, int rw)
797{
798 struct ata_port *ap = dev->link->ap;
799 void __iomem *data_addr = ap->ioaddr.data_addr;
800 unsigned int words = buflen >> 2;
801 int slop = buflen & 3;
Krzysztof Halasa972b94f2009-11-11 00:55:27 +0100802
Alan Coxe3cf95d2009-04-09 17:31:17 +0100803 if (!(ap->pflags & ATA_PFLAG_PIO32))
804 return ata_sff_data_xfer(dev, buf, buflen, rw);
Alan Cox871af122009-01-05 14:16:39 +0000805
806 /* Transfer multiple of 4 bytes */
807 if (rw == READ)
808 ioread32_rep(data_addr, buf, words);
809 else
810 iowrite32_rep(data_addr, buf, words);
811
Sergei Shtylyovd1b35252009-02-15 23:24:24 +0400812 /* Transfer trailing bytes, if any */
Alan Cox871af122009-01-05 14:16:39 +0000813 if (unlikely(slop)) {
Sergei Shtylyovd1b35252009-02-15 23:24:24 +0400814 unsigned char pad[4];
815
816 /* Point buf to the tail of buffer */
817 buf += buflen - slop;
818
819 /*
820 * Use io*_rep() accessors here as well to avoid pointlessly
Krzysztof Halasa972b94f2009-11-11 00:55:27 +0100821 * swapping bytes to and from on the big endian machines...
Sergei Shtylyovd1b35252009-02-15 23:24:24 +0400822 */
Alan Cox871af122009-01-05 14:16:39 +0000823 if (rw == READ) {
Sergei Shtylyovd1b35252009-02-15 23:24:24 +0400824 if (slop < 3)
825 ioread16_rep(data_addr, pad, 1);
826 else
827 ioread32_rep(data_addr, pad, 1);
828 memcpy(buf, pad, slop);
Alan Cox871af122009-01-05 14:16:39 +0000829 } else {
Sergei Shtylyovd1b35252009-02-15 23:24:24 +0400830 memcpy(pad, buf, slop);
831 if (slop < 3)
832 iowrite16_rep(data_addr, pad, 1);
833 else
834 iowrite32_rep(data_addr, pad, 1);
Alan Cox871af122009-01-05 14:16:39 +0000835 }
Alan Cox871af122009-01-05 14:16:39 +0000836 }
Sergei Shtylyovd1b35252009-02-15 23:24:24 +0400837 return (buflen + 1) & ~1;
Alan Cox871af122009-01-05 14:16:39 +0000838}
839EXPORT_SYMBOL_GPL(ata_sff_data_xfer32);
840
841/**
Tejun Heo9363c382008-04-07 22:47:16 +0900842 * ata_sff_data_xfer_noirq - Transfer data by PIO
Tejun Heo624d5c52008-03-25 22:16:41 +0900843 * @dev: device to target
844 * @buf: data buffer
845 * @buflen: buffer length
846 * @rw: read/write
847 *
848 * Transfer data from/to the device data register by PIO. Do the
849 * transfer with interrupts disabled.
850 *
851 * LOCKING:
852 * Inherited from caller.
853 *
854 * RETURNS:
855 * Bytes consumed.
856 */
Tejun Heo9363c382008-04-07 22:47:16 +0900857unsigned int ata_sff_data_xfer_noirq(struct ata_device *dev, unsigned char *buf,
858 unsigned int buflen, int rw)
Tejun Heo624d5c52008-03-25 22:16:41 +0900859{
860 unsigned long flags;
861 unsigned int consumed;
862
863 local_irq_save(flags);
Tejun Heo9363c382008-04-07 22:47:16 +0900864 consumed = ata_sff_data_xfer(dev, buf, buflen, rw);
Tejun Heo624d5c52008-03-25 22:16:41 +0900865 local_irq_restore(flags);
866
867 return consumed;
868}
Alan Cox0fe40ff2009-01-05 14:16:13 +0000869EXPORT_SYMBOL_GPL(ata_sff_data_xfer_noirq);
Tejun Heo624d5c52008-03-25 22:16:41 +0900870
871/**
872 * ata_pio_sector - Transfer a sector of data.
873 * @qc: Command on going
874 *
875 * Transfer qc->sect_size bytes of data from/to the ATA device.
876 *
877 * LOCKING:
878 * Inherited from caller.
879 */
880static void ata_pio_sector(struct ata_queued_cmd *qc)
881{
882 int do_write = (qc->tf.flags & ATA_TFLAG_WRITE);
883 struct ata_port *ap = qc->ap;
884 struct page *page;
885 unsigned int offset;
886 unsigned char *buf;
887
888 if (qc->curbytes == qc->nbytes - qc->sect_size)
889 ap->hsm_task_state = HSM_ST_LAST;
890
891 page = sg_page(qc->cursg);
892 offset = qc->cursg->offset + qc->cursg_ofs;
893
894 /* get the current page and offset */
895 page = nth_page(page, (offset >> PAGE_SHIFT));
896 offset %= PAGE_SIZE;
897
898 DPRINTK("data %s\n", qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
899
900 if (PageHighMem(page)) {
901 unsigned long flags;
902
903 /* FIXME: use a bounce buffer */
904 local_irq_save(flags);
905 buf = kmap_atomic(page, KM_IRQ0);
906
907 /* do the actual data transfer */
Tejun Heo5682ed32008-04-07 22:47:16 +0900908 ap->ops->sff_data_xfer(qc->dev, buf + offset, qc->sect_size,
909 do_write);
Tejun Heo624d5c52008-03-25 22:16:41 +0900910
911 kunmap_atomic(buf, KM_IRQ0);
912 local_irq_restore(flags);
913 } else {
914 buf = page_address(page);
Tejun Heo5682ed32008-04-07 22:47:16 +0900915 ap->ops->sff_data_xfer(qc->dev, buf + offset, qc->sect_size,
916 do_write);
Tejun Heo624d5c52008-03-25 22:16:41 +0900917 }
918
Sebastian Andrzej Siewior3842e832010-03-21 22:52:23 +0100919 if (!do_write && !PageSlab(page))
Catalin Marinas2d68b7f2010-02-04 01:04:50 -0500920 flush_dcache_page(page);
921
Tejun Heo624d5c52008-03-25 22:16:41 +0900922 qc->curbytes += qc->sect_size;
923 qc->cursg_ofs += qc->sect_size;
924
925 if (qc->cursg_ofs == qc->cursg->length) {
926 qc->cursg = sg_next(qc->cursg);
927 qc->cursg_ofs = 0;
928 }
929}
930
931/**
932 * ata_pio_sectors - Transfer one or many sectors.
933 * @qc: Command on going
934 *
935 * Transfer one or many sectors of data from/to the
936 * ATA device for the DRQ request.
937 *
938 * LOCKING:
939 * Inherited from caller.
940 */
941static void ata_pio_sectors(struct ata_queued_cmd *qc)
942{
943 if (is_multi_taskfile(&qc->tf)) {
944 /* READ/WRITE MULTIPLE */
945 unsigned int nsect;
946
Tejun Heoefcb3cf2009-01-09 19:19:14 +0900947 WARN_ON_ONCE(qc->dev->multi_count == 0);
Tejun Heo624d5c52008-03-25 22:16:41 +0900948
949 nsect = min((qc->nbytes - qc->curbytes) / qc->sect_size,
950 qc->dev->multi_count);
951 while (nsect--)
952 ata_pio_sector(qc);
953 } else
954 ata_pio_sector(qc);
955
Alan Coxa57c1ba2008-05-29 22:10:58 +0100956 ata_sff_sync(qc->ap); /* flush */
Tejun Heo624d5c52008-03-25 22:16:41 +0900957}
958
959/**
960 * atapi_send_cdb - Write CDB bytes to hardware
961 * @ap: Port to which ATAPI device is attached.
962 * @qc: Taskfile currently active
963 *
964 * When device has indicated its readiness to accept
965 * a CDB, this function is called. Send the CDB.
966 *
967 * LOCKING:
968 * caller.
969 */
970static void atapi_send_cdb(struct ata_port *ap, struct ata_queued_cmd *qc)
971{
972 /* send SCSI cdb */
973 DPRINTK("send cdb\n");
Tejun Heoefcb3cf2009-01-09 19:19:14 +0900974 WARN_ON_ONCE(qc->dev->cdb_len < 12);
Tejun Heo624d5c52008-03-25 22:16:41 +0900975
Tejun Heo5682ed32008-04-07 22:47:16 +0900976 ap->ops->sff_data_xfer(qc->dev, qc->cdb, qc->dev->cdb_len, 1);
Alan Coxa57c1ba2008-05-29 22:10:58 +0100977 ata_sff_sync(ap);
978 /* FIXME: If the CDB is for DMA do we need to do the transition delay
979 or is bmdma_start guaranteed to do it ? */
Tejun Heo624d5c52008-03-25 22:16:41 +0900980 switch (qc->tf.protocol) {
981 case ATAPI_PROT_PIO:
982 ap->hsm_task_state = HSM_ST;
983 break;
984 case ATAPI_PROT_NODATA:
985 ap->hsm_task_state = HSM_ST_LAST;
986 break;
987 case ATAPI_PROT_DMA:
988 ap->hsm_task_state = HSM_ST_LAST;
989 /* initiate bmdma */
990 ap->ops->bmdma_start(qc);
991 break;
992 }
993}
994
995/**
996 * __atapi_pio_bytes - Transfer data from/to the ATAPI device.
997 * @qc: Command on going
998 * @bytes: number of bytes
999 *
1000 * Transfer Transfer data from/to the ATAPI device.
1001 *
1002 * LOCKING:
1003 * Inherited from caller.
1004 *
1005 */
1006static int __atapi_pio_bytes(struct ata_queued_cmd *qc, unsigned int bytes)
1007{
1008 int rw = (qc->tf.flags & ATA_TFLAG_WRITE) ? WRITE : READ;
1009 struct ata_port *ap = qc->ap;
1010 struct ata_device *dev = qc->dev;
1011 struct ata_eh_info *ehi = &dev->link->eh_info;
1012 struct scatterlist *sg;
1013 struct page *page;
1014 unsigned char *buf;
1015 unsigned int offset, count, consumed;
1016
1017next_sg:
1018 sg = qc->cursg;
1019 if (unlikely(!sg)) {
1020 ata_ehi_push_desc(ehi, "unexpected or too much trailing data "
1021 "buf=%u cur=%u bytes=%u",
1022 qc->nbytes, qc->curbytes, bytes);
1023 return -1;
1024 }
1025
1026 page = sg_page(sg);
1027 offset = sg->offset + qc->cursg_ofs;
1028
1029 /* get the current page and offset */
1030 page = nth_page(page, (offset >> PAGE_SHIFT));
1031 offset %= PAGE_SIZE;
1032
1033 /* don't overrun current sg */
1034 count = min(sg->length - qc->cursg_ofs, bytes);
1035
1036 /* don't cross page boundaries */
1037 count = min(count, (unsigned int)PAGE_SIZE - offset);
1038
1039 DPRINTK("data %s\n", qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
1040
1041 if (PageHighMem(page)) {
1042 unsigned long flags;
1043
1044 /* FIXME: use bounce buffer */
1045 local_irq_save(flags);
1046 buf = kmap_atomic(page, KM_IRQ0);
1047
1048 /* do the actual data transfer */
Alan Cox0fe40ff2009-01-05 14:16:13 +00001049 consumed = ap->ops->sff_data_xfer(dev, buf + offset,
1050 count, rw);
Tejun Heo624d5c52008-03-25 22:16:41 +09001051
1052 kunmap_atomic(buf, KM_IRQ0);
1053 local_irq_restore(flags);
1054 } else {
1055 buf = page_address(page);
Alan Cox0fe40ff2009-01-05 14:16:13 +00001056 consumed = ap->ops->sff_data_xfer(dev, buf + offset,
1057 count, rw);
Tejun Heo624d5c52008-03-25 22:16:41 +09001058 }
1059
1060 bytes -= min(bytes, consumed);
1061 qc->curbytes += count;
1062 qc->cursg_ofs += count;
1063
1064 if (qc->cursg_ofs == sg->length) {
1065 qc->cursg = sg_next(qc->cursg);
1066 qc->cursg_ofs = 0;
1067 }
1068
Christian Borntraegera0f79f72009-01-13 10:38:36 +01001069 /*
1070 * There used to be a WARN_ON_ONCE(qc->cursg && count != consumed);
1071 * Unfortunately __atapi_pio_bytes doesn't know enough to do the WARN
1072 * check correctly as it doesn't know if it is the last request being
1073 * made. Somebody should implement a proper sanity check.
1074 */
Tejun Heo624d5c52008-03-25 22:16:41 +09001075 if (bytes)
1076 goto next_sg;
1077 return 0;
1078}
1079
1080/**
1081 * atapi_pio_bytes - Transfer data from/to the ATAPI device.
1082 * @qc: Command on going
1083 *
1084 * Transfer Transfer data from/to the ATAPI device.
1085 *
1086 * LOCKING:
1087 * Inherited from caller.
1088 */
1089static void atapi_pio_bytes(struct ata_queued_cmd *qc)
1090{
1091 struct ata_port *ap = qc->ap;
1092 struct ata_device *dev = qc->dev;
1093 struct ata_eh_info *ehi = &dev->link->eh_info;
1094 unsigned int ireason, bc_lo, bc_hi, bytes;
1095 int i_write, do_write = (qc->tf.flags & ATA_TFLAG_WRITE) ? 1 : 0;
1096
1097 /* Abuse qc->result_tf for temp storage of intermediate TF
1098 * here to save some kernel stack usage.
1099 * For normal completion, qc->result_tf is not relevant. For
1100 * error, qc->result_tf is later overwritten by ata_qc_complete().
1101 * So, the correctness of qc->result_tf is not affected.
1102 */
Tejun Heo5682ed32008-04-07 22:47:16 +09001103 ap->ops->sff_tf_read(ap, &qc->result_tf);
Tejun Heo624d5c52008-03-25 22:16:41 +09001104 ireason = qc->result_tf.nsect;
1105 bc_lo = qc->result_tf.lbam;
1106 bc_hi = qc->result_tf.lbah;
1107 bytes = (bc_hi << 8) | bc_lo;
1108
1109 /* shall be cleared to zero, indicating xfer of data */
1110 if (unlikely(ireason & (1 << 0)))
1111 goto atapi_check;
1112
1113 /* make sure transfer direction matches expected */
1114 i_write = ((ireason & (1 << 1)) == 0) ? 1 : 0;
1115 if (unlikely(do_write != i_write))
1116 goto atapi_check;
1117
1118 if (unlikely(!bytes))
1119 goto atapi_check;
1120
1121 VPRINTK("ata%u: xfering %d bytes\n", ap->print_id, bytes);
1122
1123 if (unlikely(__atapi_pio_bytes(qc, bytes)))
1124 goto err_out;
Alan Coxa57c1ba2008-05-29 22:10:58 +01001125 ata_sff_sync(ap); /* flush */
Tejun Heo624d5c52008-03-25 22:16:41 +09001126
1127 return;
1128
1129 atapi_check:
1130 ata_ehi_push_desc(ehi, "ATAPI check failed (ireason=0x%x bytes=%u)",
1131 ireason, bytes);
1132 err_out:
1133 qc->err_mask |= AC_ERR_HSM;
1134 ap->hsm_task_state = HSM_ST_ERR;
1135}
1136
1137/**
1138 * ata_hsm_ok_in_wq - Check if the qc can be handled in the workqueue.
1139 * @ap: the target ata_port
1140 * @qc: qc on going
1141 *
1142 * RETURNS:
1143 * 1 if ok in workqueue, 0 otherwise.
1144 */
Alan Cox0fe40ff2009-01-05 14:16:13 +00001145static inline int ata_hsm_ok_in_wq(struct ata_port *ap,
1146 struct ata_queued_cmd *qc)
Tejun Heo624d5c52008-03-25 22:16:41 +09001147{
1148 if (qc->tf.flags & ATA_TFLAG_POLLING)
1149 return 1;
1150
1151 if (ap->hsm_task_state == HSM_ST_FIRST) {
1152 if (qc->tf.protocol == ATA_PROT_PIO &&
Alan Cox0fe40ff2009-01-05 14:16:13 +00001153 (qc->tf.flags & ATA_TFLAG_WRITE))
Tejun Heo624d5c52008-03-25 22:16:41 +09001154 return 1;
1155
1156 if (ata_is_atapi(qc->tf.protocol) &&
Alan Cox0fe40ff2009-01-05 14:16:13 +00001157 !(qc->dev->flags & ATA_DFLAG_CDB_INTR))
Tejun Heo624d5c52008-03-25 22:16:41 +09001158 return 1;
1159 }
1160
1161 return 0;
1162}
1163
1164/**
1165 * ata_hsm_qc_complete - finish a qc running on standard HSM
1166 * @qc: Command to complete
1167 * @in_wq: 1 if called from workqueue, 0 otherwise
1168 *
1169 * Finish @qc which is running on standard HSM.
1170 *
1171 * LOCKING:
1172 * If @in_wq is zero, spin_lock_irqsave(host lock).
1173 * Otherwise, none on entry and grabs host lock.
1174 */
1175static void ata_hsm_qc_complete(struct ata_queued_cmd *qc, int in_wq)
1176{
1177 struct ata_port *ap = qc->ap;
1178 unsigned long flags;
1179
1180 if (ap->ops->error_handler) {
1181 if (in_wq) {
1182 spin_lock_irqsave(ap->lock, flags);
1183
1184 /* EH might have kicked in while host lock is
1185 * released.
1186 */
1187 qc = ata_qc_from_tag(ap, qc->tag);
1188 if (qc) {
1189 if (likely(!(qc->err_mask & AC_ERR_HSM))) {
Sergei Shtylyove42a5422010-05-07 22:49:02 +04001190 ata_sff_irq_on(ap);
Tejun Heo624d5c52008-03-25 22:16:41 +09001191 ata_qc_complete(qc);
1192 } else
1193 ata_port_freeze(ap);
1194 }
1195
1196 spin_unlock_irqrestore(ap->lock, flags);
1197 } else {
1198 if (likely(!(qc->err_mask & AC_ERR_HSM)))
1199 ata_qc_complete(qc);
1200 else
1201 ata_port_freeze(ap);
1202 }
1203 } else {
1204 if (in_wq) {
1205 spin_lock_irqsave(ap->lock, flags);
Sergei Shtylyove42a5422010-05-07 22:49:02 +04001206 ata_sff_irq_on(ap);
Tejun Heo624d5c52008-03-25 22:16:41 +09001207 ata_qc_complete(qc);
1208 spin_unlock_irqrestore(ap->lock, flags);
1209 } else
1210 ata_qc_complete(qc);
1211 }
1212}
1213
1214/**
Tejun Heo9363c382008-04-07 22:47:16 +09001215 * ata_sff_hsm_move - move the HSM to the next state.
Tejun Heo624d5c52008-03-25 22:16:41 +09001216 * @ap: the target ata_port
1217 * @qc: qc on going
1218 * @status: current device status
1219 * @in_wq: 1 if called from workqueue, 0 otherwise
1220 *
1221 * RETURNS:
1222 * 1 when poll next status needed, 0 otherwise.
1223 */
Tejun Heo9363c382008-04-07 22:47:16 +09001224int ata_sff_hsm_move(struct ata_port *ap, struct ata_queued_cmd *qc,
1225 u8 status, int in_wq)
Tejun Heo624d5c52008-03-25 22:16:41 +09001226{
Tejun Heoa836d3e2008-06-28 01:39:43 +09001227 struct ata_eh_info *ehi = &ap->link.eh_info;
Tejun Heo624d5c52008-03-25 22:16:41 +09001228 unsigned long flags = 0;
1229 int poll_next;
1230
Tejun Heoefcb3cf2009-01-09 19:19:14 +09001231 WARN_ON_ONCE((qc->flags & ATA_QCFLAG_ACTIVE) == 0);
Tejun Heo624d5c52008-03-25 22:16:41 +09001232
Tejun Heo9363c382008-04-07 22:47:16 +09001233 /* Make sure ata_sff_qc_issue() does not throw things
Tejun Heo624d5c52008-03-25 22:16:41 +09001234 * like DMA polling into the workqueue. Notice that
1235 * in_wq is not equivalent to (qc->tf.flags & ATA_TFLAG_POLLING).
1236 */
Tejun Heoefcb3cf2009-01-09 19:19:14 +09001237 WARN_ON_ONCE(in_wq != ata_hsm_ok_in_wq(ap, qc));
Tejun Heo624d5c52008-03-25 22:16:41 +09001238
1239fsm_start:
1240 DPRINTK("ata%u: protocol %d task_state %d (dev_stat 0x%X)\n",
1241 ap->print_id, qc->tf.protocol, ap->hsm_task_state, status);
1242
1243 switch (ap->hsm_task_state) {
1244 case HSM_ST_FIRST:
1245 /* Send first data block or PACKET CDB */
1246
1247 /* If polling, we will stay in the work queue after
1248 * sending the data. Otherwise, interrupt handler
1249 * takes over after sending the data.
1250 */
1251 poll_next = (qc->tf.flags & ATA_TFLAG_POLLING);
1252
1253 /* check device status */
1254 if (unlikely((status & ATA_DRQ) == 0)) {
1255 /* handle BSY=0, DRQ=0 as error */
1256 if (likely(status & (ATA_ERR | ATA_DF)))
1257 /* device stops HSM for abort/error */
1258 qc->err_mask |= AC_ERR_DEV;
Tejun Heoa836d3e2008-06-28 01:39:43 +09001259 else {
Tejun Heo624d5c52008-03-25 22:16:41 +09001260 /* HSM violation. Let EH handle this */
Tejun Heoa836d3e2008-06-28 01:39:43 +09001261 ata_ehi_push_desc(ehi,
1262 "ST_FIRST: !(DRQ|ERR|DF)");
Tejun Heo624d5c52008-03-25 22:16:41 +09001263 qc->err_mask |= AC_ERR_HSM;
Tejun Heoa836d3e2008-06-28 01:39:43 +09001264 }
Tejun Heo624d5c52008-03-25 22:16:41 +09001265
1266 ap->hsm_task_state = HSM_ST_ERR;
1267 goto fsm_start;
1268 }
1269
1270 /* Device should not ask for data transfer (DRQ=1)
1271 * when it finds something wrong.
1272 * We ignore DRQ here and stop the HSM by
1273 * changing hsm_task_state to HSM_ST_ERR and
1274 * let the EH abort the command or reset the device.
1275 */
1276 if (unlikely(status & (ATA_ERR | ATA_DF))) {
1277 /* Some ATAPI tape drives forget to clear the ERR bit
1278 * when doing the next command (mostly request sense).
1279 * We ignore ERR here to workaround and proceed sending
1280 * the CDB.
1281 */
1282 if (!(qc->dev->horkage & ATA_HORKAGE_STUCK_ERR)) {
Tejun Heoa836d3e2008-06-28 01:39:43 +09001283 ata_ehi_push_desc(ehi, "ST_FIRST: "
1284 "DRQ=1 with device error, "
1285 "dev_stat 0x%X", status);
Tejun Heo624d5c52008-03-25 22:16:41 +09001286 qc->err_mask |= AC_ERR_HSM;
1287 ap->hsm_task_state = HSM_ST_ERR;
1288 goto fsm_start;
1289 }
1290 }
1291
1292 /* Send the CDB (atapi) or the first data block (ata pio out).
1293 * During the state transition, interrupt handler shouldn't
1294 * be invoked before the data transfer is complete and
1295 * hsm_task_state is changed. Hence, the following locking.
1296 */
1297 if (in_wq)
1298 spin_lock_irqsave(ap->lock, flags);
1299
1300 if (qc->tf.protocol == ATA_PROT_PIO) {
1301 /* PIO data out protocol.
1302 * send first data block.
1303 */
1304
1305 /* ata_pio_sectors() might change the state
1306 * to HSM_ST_LAST. so, the state is changed here
1307 * before ata_pio_sectors().
1308 */
1309 ap->hsm_task_state = HSM_ST;
1310 ata_pio_sectors(qc);
1311 } else
1312 /* send CDB */
1313 atapi_send_cdb(ap, qc);
1314
1315 if (in_wq)
1316 spin_unlock_irqrestore(ap->lock, flags);
1317
1318 /* if polling, ata_pio_task() handles the rest.
1319 * otherwise, interrupt handler takes over from here.
1320 */
1321 break;
1322
1323 case HSM_ST:
1324 /* complete command or read/write the data register */
1325 if (qc->tf.protocol == ATAPI_PROT_PIO) {
1326 /* ATAPI PIO protocol */
1327 if ((status & ATA_DRQ) == 0) {
1328 /* No more data to transfer or device error.
1329 * Device error will be tagged in HSM_ST_LAST.
1330 */
1331 ap->hsm_task_state = HSM_ST_LAST;
1332 goto fsm_start;
1333 }
1334
1335 /* Device should not ask for data transfer (DRQ=1)
1336 * when it finds something wrong.
1337 * We ignore DRQ here and stop the HSM by
1338 * changing hsm_task_state to HSM_ST_ERR and
1339 * let the EH abort the command or reset the device.
1340 */
1341 if (unlikely(status & (ATA_ERR | ATA_DF))) {
Tejun Heoa836d3e2008-06-28 01:39:43 +09001342 ata_ehi_push_desc(ehi, "ST-ATAPI: "
1343 "DRQ=1 with device error, "
1344 "dev_stat 0x%X", status);
Tejun Heo624d5c52008-03-25 22:16:41 +09001345 qc->err_mask |= AC_ERR_HSM;
1346 ap->hsm_task_state = HSM_ST_ERR;
1347 goto fsm_start;
1348 }
1349
1350 atapi_pio_bytes(qc);
1351
1352 if (unlikely(ap->hsm_task_state == HSM_ST_ERR))
1353 /* bad ireason reported by device */
1354 goto fsm_start;
1355
1356 } else {
1357 /* ATA PIO protocol */
1358 if (unlikely((status & ATA_DRQ) == 0)) {
1359 /* handle BSY=0, DRQ=0 as error */
Tejun Heo6a6b97d2008-11-13 10:04:46 +09001360 if (likely(status & (ATA_ERR | ATA_DF))) {
Tejun Heo624d5c52008-03-25 22:16:41 +09001361 /* device stops HSM for abort/error */
1362 qc->err_mask |= AC_ERR_DEV;
Tejun Heo6a6b97d2008-11-13 10:04:46 +09001363
1364 /* If diagnostic failed and this is
1365 * IDENTIFY, it's likely a phantom
1366 * device. Mark hint.
1367 */
1368 if (qc->dev->horkage &
1369 ATA_HORKAGE_DIAGNOSTIC)
1370 qc->err_mask |=
1371 AC_ERR_NODEV_HINT;
1372 } else {
Tejun Heo624d5c52008-03-25 22:16:41 +09001373 /* HSM violation. Let EH handle this.
1374 * Phantom devices also trigger this
1375 * condition. Mark hint.
1376 */
Tejun Heoa836d3e2008-06-28 01:39:43 +09001377 ata_ehi_push_desc(ehi, "ST-ATA: "
Tejun Heo80ee6f52009-01-23 14:12:59 +09001378 "DRQ=0 without device error, "
Tejun Heoa836d3e2008-06-28 01:39:43 +09001379 "dev_stat 0x%X", status);
Tejun Heo624d5c52008-03-25 22:16:41 +09001380 qc->err_mask |= AC_ERR_HSM |
1381 AC_ERR_NODEV_HINT;
Tejun Heoa836d3e2008-06-28 01:39:43 +09001382 }
Tejun Heo624d5c52008-03-25 22:16:41 +09001383
1384 ap->hsm_task_state = HSM_ST_ERR;
1385 goto fsm_start;
1386 }
1387
1388 /* For PIO reads, some devices may ask for
1389 * data transfer (DRQ=1) alone with ERR=1.
1390 * We respect DRQ here and transfer one
1391 * block of junk data before changing the
1392 * hsm_task_state to HSM_ST_ERR.
1393 *
1394 * For PIO writes, ERR=1 DRQ=1 doesn't make
1395 * sense since the data block has been
1396 * transferred to the device.
1397 */
1398 if (unlikely(status & (ATA_ERR | ATA_DF))) {
1399 /* data might be corrputed */
1400 qc->err_mask |= AC_ERR_DEV;
1401
1402 if (!(qc->tf.flags & ATA_TFLAG_WRITE)) {
1403 ata_pio_sectors(qc);
1404 status = ata_wait_idle(ap);
1405 }
1406
Tejun Heoa836d3e2008-06-28 01:39:43 +09001407 if (status & (ATA_BUSY | ATA_DRQ)) {
1408 ata_ehi_push_desc(ehi, "ST-ATA: "
1409 "BUSY|DRQ persists on ERR|DF, "
1410 "dev_stat 0x%X", status);
Tejun Heo624d5c52008-03-25 22:16:41 +09001411 qc->err_mask |= AC_ERR_HSM;
Tejun Heoa836d3e2008-06-28 01:39:43 +09001412 }
Tejun Heo624d5c52008-03-25 22:16:41 +09001413
Tejun Heob9199302009-01-25 10:26:00 +09001414 /* There are oddball controllers with
1415 * status register stuck at 0x7f and
1416 * lbal/m/h at zero which makes it
1417 * pass all other presence detection
1418 * mechanisms we have. Set NODEV_HINT
1419 * for it. Kernel bz#7241.
1420 */
1421 if (status == 0x7f)
1422 qc->err_mask |= AC_ERR_NODEV_HINT;
1423
Tejun Heo624d5c52008-03-25 22:16:41 +09001424 /* ata_pio_sectors() might change the
1425 * state to HSM_ST_LAST. so, the state
1426 * is changed after ata_pio_sectors().
1427 */
1428 ap->hsm_task_state = HSM_ST_ERR;
1429 goto fsm_start;
1430 }
1431
1432 ata_pio_sectors(qc);
1433
1434 if (ap->hsm_task_state == HSM_ST_LAST &&
1435 (!(qc->tf.flags & ATA_TFLAG_WRITE))) {
1436 /* all data read */
1437 status = ata_wait_idle(ap);
1438 goto fsm_start;
1439 }
1440 }
1441
1442 poll_next = 1;
1443 break;
1444
1445 case HSM_ST_LAST:
1446 if (unlikely(!ata_ok(status))) {
1447 qc->err_mask |= __ac_err_mask(status);
1448 ap->hsm_task_state = HSM_ST_ERR;
1449 goto fsm_start;
1450 }
1451
1452 /* no more data to transfer */
1453 DPRINTK("ata%u: dev %u command complete, drv_stat 0x%x\n",
1454 ap->print_id, qc->dev->devno, status);
1455
Tejun Heoefcb3cf2009-01-09 19:19:14 +09001456 WARN_ON_ONCE(qc->err_mask & (AC_ERR_DEV | AC_ERR_HSM));
Tejun Heo624d5c52008-03-25 22:16:41 +09001457
1458 ap->hsm_task_state = HSM_ST_IDLE;
1459
1460 /* complete taskfile transaction */
1461 ata_hsm_qc_complete(qc, in_wq);
1462
1463 poll_next = 0;
1464 break;
1465
1466 case HSM_ST_ERR:
Tejun Heo624d5c52008-03-25 22:16:41 +09001467 ap->hsm_task_state = HSM_ST_IDLE;
1468
1469 /* complete taskfile transaction */
1470 ata_hsm_qc_complete(qc, in_wq);
1471
1472 poll_next = 0;
1473 break;
1474 default:
1475 poll_next = 0;
1476 BUG();
1477 }
1478
1479 return poll_next;
1480}
Alan Cox0fe40ff2009-01-05 14:16:13 +00001481EXPORT_SYMBOL_GPL(ata_sff_hsm_move);
Tejun Heo624d5c52008-03-25 22:16:41 +09001482
1483void ata_pio_task(struct work_struct *work)
1484{
1485 struct ata_port *ap =
1486 container_of(work, struct ata_port, port_task.work);
1487 struct ata_queued_cmd *qc = ap->port_task_data;
1488 u8 status;
1489 int poll_next;
1490
1491fsm_start:
Tejun Heoefcb3cf2009-01-09 19:19:14 +09001492 WARN_ON_ONCE(ap->hsm_task_state == HSM_ST_IDLE);
Tejun Heo624d5c52008-03-25 22:16:41 +09001493
1494 /*
1495 * This is purely heuristic. This is a fast path.
1496 * Sometimes when we enter, BSY will be cleared in
1497 * a chk-status or two. If not, the drive is probably seeking
1498 * or something. Snooze for a couple msecs, then
1499 * chk-status again. If still busy, queue delayed work.
1500 */
Tejun Heo9363c382008-04-07 22:47:16 +09001501 status = ata_sff_busy_wait(ap, ATA_BUSY, 5);
Tejun Heo624d5c52008-03-25 22:16:41 +09001502 if (status & ATA_BUSY) {
1503 msleep(2);
Tejun Heo9363c382008-04-07 22:47:16 +09001504 status = ata_sff_busy_wait(ap, ATA_BUSY, 10);
Tejun Heo624d5c52008-03-25 22:16:41 +09001505 if (status & ATA_BUSY) {
1506 ata_pio_queue_task(ap, qc, ATA_SHORT_PAUSE);
1507 return;
1508 }
1509 }
1510
1511 /* move the HSM */
Tejun Heo9363c382008-04-07 22:47:16 +09001512 poll_next = ata_sff_hsm_move(ap, qc, status, 1);
Tejun Heo624d5c52008-03-25 22:16:41 +09001513
1514 /* another command or interrupt handler
1515 * may be running at this point.
1516 */
1517 if (poll_next)
1518 goto fsm_start;
1519}
1520
1521/**
Tejun Heo9363c382008-04-07 22:47:16 +09001522 * ata_sff_qc_issue - issue taskfile to device in proto-dependent manner
Tejun Heo624d5c52008-03-25 22:16:41 +09001523 * @qc: command to issue to device
1524 *
1525 * Using various libata functions and hooks, this function
1526 * starts an ATA command. ATA commands are grouped into
1527 * classes called "protocols", and issuing each type of protocol
1528 * is slightly different.
1529 *
1530 * May be used as the qc_issue() entry in ata_port_operations.
1531 *
1532 * LOCKING:
1533 * spin_lock_irqsave(host lock)
1534 *
1535 * RETURNS:
1536 * Zero on success, AC_ERR_* mask on failure
1537 */
Tejun Heo9363c382008-04-07 22:47:16 +09001538unsigned int ata_sff_qc_issue(struct ata_queued_cmd *qc)
Tejun Heo624d5c52008-03-25 22:16:41 +09001539{
1540 struct ata_port *ap = qc->ap;
1541
1542 /* Use polling pio if the LLD doesn't handle
1543 * interrupt driven pio and atapi CDB interrupt.
1544 */
1545 if (ap->flags & ATA_FLAG_PIO_POLLING) {
1546 switch (qc->tf.protocol) {
1547 case ATA_PROT_PIO:
1548 case ATA_PROT_NODATA:
1549 case ATAPI_PROT_PIO:
1550 case ATAPI_PROT_NODATA:
1551 qc->tf.flags |= ATA_TFLAG_POLLING;
1552 break;
1553 case ATAPI_PROT_DMA:
1554 if (qc->dev->flags & ATA_DFLAG_CDB_INTR)
1555 /* see ata_dma_blacklisted() */
1556 BUG();
1557 break;
1558 default:
1559 break;
1560 }
1561 }
1562
1563 /* select the device */
1564 ata_dev_select(ap, qc->dev->devno, 1, 0);
1565
1566 /* start the command */
1567 switch (qc->tf.protocol) {
1568 case ATA_PROT_NODATA:
1569 if (qc->tf.flags & ATA_TFLAG_POLLING)
1570 ata_qc_set_polling(qc);
1571
1572 ata_tf_to_host(ap, &qc->tf);
1573 ap->hsm_task_state = HSM_ST_LAST;
1574
1575 if (qc->tf.flags & ATA_TFLAG_POLLING)
1576 ata_pio_queue_task(ap, qc, 0);
1577
1578 break;
1579
1580 case ATA_PROT_DMA:
Tejun Heoefcb3cf2009-01-09 19:19:14 +09001581 WARN_ON_ONCE(qc->tf.flags & ATA_TFLAG_POLLING);
Tejun Heo624d5c52008-03-25 22:16:41 +09001582
Tejun Heo5682ed32008-04-07 22:47:16 +09001583 ap->ops->sff_tf_load(ap, &qc->tf); /* load tf registers */
Tejun Heo624d5c52008-03-25 22:16:41 +09001584 ap->ops->bmdma_setup(qc); /* set up bmdma */
1585 ap->ops->bmdma_start(qc); /* initiate bmdma */
1586 ap->hsm_task_state = HSM_ST_LAST;
1587 break;
1588
1589 case ATA_PROT_PIO:
1590 if (qc->tf.flags & ATA_TFLAG_POLLING)
1591 ata_qc_set_polling(qc);
1592
1593 ata_tf_to_host(ap, &qc->tf);
1594
1595 if (qc->tf.flags & ATA_TFLAG_WRITE) {
1596 /* PIO data out protocol */
1597 ap->hsm_task_state = HSM_ST_FIRST;
1598 ata_pio_queue_task(ap, qc, 0);
1599
1600 /* always send first data block using
1601 * the ata_pio_task() codepath.
1602 */
1603 } else {
1604 /* PIO data in protocol */
1605 ap->hsm_task_state = HSM_ST;
1606
1607 if (qc->tf.flags & ATA_TFLAG_POLLING)
1608 ata_pio_queue_task(ap, qc, 0);
1609
1610 /* if polling, ata_pio_task() handles the rest.
1611 * otherwise, interrupt handler takes over from here.
1612 */
1613 }
1614
1615 break;
1616
1617 case ATAPI_PROT_PIO:
1618 case ATAPI_PROT_NODATA:
1619 if (qc->tf.flags & ATA_TFLAG_POLLING)
1620 ata_qc_set_polling(qc);
1621
1622 ata_tf_to_host(ap, &qc->tf);
1623
1624 ap->hsm_task_state = HSM_ST_FIRST;
1625
1626 /* send cdb by polling if no cdb interrupt */
1627 if ((!(qc->dev->flags & ATA_DFLAG_CDB_INTR)) ||
1628 (qc->tf.flags & ATA_TFLAG_POLLING))
1629 ata_pio_queue_task(ap, qc, 0);
1630 break;
1631
1632 case ATAPI_PROT_DMA:
Tejun Heoefcb3cf2009-01-09 19:19:14 +09001633 WARN_ON_ONCE(qc->tf.flags & ATA_TFLAG_POLLING);
Tejun Heo624d5c52008-03-25 22:16:41 +09001634
Tejun Heo5682ed32008-04-07 22:47:16 +09001635 ap->ops->sff_tf_load(ap, &qc->tf); /* load tf registers */
Tejun Heo624d5c52008-03-25 22:16:41 +09001636 ap->ops->bmdma_setup(qc); /* set up bmdma */
1637 ap->hsm_task_state = HSM_ST_FIRST;
1638
1639 /* send cdb by polling if no cdb interrupt */
1640 if (!(qc->dev->flags & ATA_DFLAG_CDB_INTR))
1641 ata_pio_queue_task(ap, qc, 0);
1642 break;
1643
1644 default:
Tejun Heoefcb3cf2009-01-09 19:19:14 +09001645 WARN_ON_ONCE(1);
Tejun Heo624d5c52008-03-25 22:16:41 +09001646 return AC_ERR_SYSTEM;
1647 }
1648
1649 return 0;
1650}
Alan Cox0fe40ff2009-01-05 14:16:13 +00001651EXPORT_SYMBOL_GPL(ata_sff_qc_issue);
Tejun Heo624d5c52008-03-25 22:16:41 +09001652
1653/**
Tejun Heo22183bf2008-04-07 22:47:20 +09001654 * ata_sff_qc_fill_rtf - fill result TF using ->sff_tf_read
1655 * @qc: qc to fill result TF for
1656 *
1657 * @qc is finished and result TF needs to be filled. Fill it
1658 * using ->sff_tf_read.
1659 *
1660 * LOCKING:
1661 * spin_lock_irqsave(host lock)
1662 *
1663 * RETURNS:
1664 * true indicating that result TF is successfully filled.
1665 */
1666bool ata_sff_qc_fill_rtf(struct ata_queued_cmd *qc)
1667{
1668 qc->ap->ops->sff_tf_read(qc->ap, &qc->result_tf);
1669 return true;
1670}
Alan Cox0fe40ff2009-01-05 14:16:13 +00001671EXPORT_SYMBOL_GPL(ata_sff_qc_fill_rtf);
Tejun Heo22183bf2008-04-07 22:47:20 +09001672
1673/**
Tejun Heo9363c382008-04-07 22:47:16 +09001674 * ata_sff_host_intr - Handle host interrupt for given (port, task)
Tejun Heo624d5c52008-03-25 22:16:41 +09001675 * @ap: Port on which interrupt arrived (possibly...)
1676 * @qc: Taskfile currently active in engine
1677 *
1678 * Handle host interrupt for given queued command. Currently,
1679 * only DMA interrupts are handled. All other commands are
1680 * handled via polling with interrupts disabled (nIEN bit).
1681 *
1682 * LOCKING:
1683 * spin_lock_irqsave(host lock)
1684 *
1685 * RETURNS:
1686 * One if interrupt was handled, zero if not (shared irq).
1687 */
Alan Coxc96f1732009-03-24 10:23:46 +00001688unsigned int ata_sff_host_intr(struct ata_port *ap,
Tejun Heo9363c382008-04-07 22:47:16 +09001689 struct ata_queued_cmd *qc)
Tejun Heo624d5c52008-03-25 22:16:41 +09001690{
1691 struct ata_eh_info *ehi = &ap->link.eh_info;
1692 u8 status, host_stat = 0;
Tejun Heo332ac7f2010-03-23 12:24:08 +09001693 bool bmdma_stopped = false;
Tejun Heo624d5c52008-03-25 22:16:41 +09001694
1695 VPRINTK("ata%u: protocol %d task_state %d\n",
1696 ap->print_id, qc->tf.protocol, ap->hsm_task_state);
1697
1698 /* Check whether we are expecting interrupt in this state */
1699 switch (ap->hsm_task_state) {
1700 case HSM_ST_FIRST:
1701 /* Some pre-ATAPI-4 devices assert INTRQ
1702 * at this state when ready to receive CDB.
1703 */
1704
1705 /* Check the ATA_DFLAG_CDB_INTR flag is enough here.
1706 * The flag was turned on only for atapi devices. No
1707 * need to check ata_is_atapi(qc->tf.protocol) again.
1708 */
1709 if (!(qc->dev->flags & ATA_DFLAG_CDB_INTR))
1710 goto idle_irq;
1711 break;
1712 case HSM_ST_LAST:
1713 if (qc->tf.protocol == ATA_PROT_DMA ||
1714 qc->tf.protocol == ATAPI_PROT_DMA) {
1715 /* check status of DMA engine */
1716 host_stat = ap->ops->bmdma_status(ap);
1717 VPRINTK("ata%u: host_stat 0x%X\n",
1718 ap->print_id, host_stat);
1719
1720 /* if it's not our irq... */
1721 if (!(host_stat & ATA_DMA_INTR))
1722 goto idle_irq;
1723
1724 /* before we do anything else, clear DMA-Start bit */
1725 ap->ops->bmdma_stop(qc);
Tejun Heo332ac7f2010-03-23 12:24:08 +09001726 bmdma_stopped = true;
Tejun Heo624d5c52008-03-25 22:16:41 +09001727
1728 if (unlikely(host_stat & ATA_DMA_ERR)) {
1729 /* error when transfering data to/from memory */
1730 qc->err_mask |= AC_ERR_HOST_BUS;
1731 ap->hsm_task_state = HSM_ST_ERR;
1732 }
1733 }
1734 break;
1735 case HSM_ST:
1736 break;
1737 default:
1738 goto idle_irq;
1739 }
1740
Tejun Heo624d5c52008-03-25 22:16:41 +09001741
Alan Coxa57c1ba2008-05-29 22:10:58 +01001742 /* check main status, clearing INTRQ if needed */
1743 status = ata_sff_irq_status(ap);
Tejun Heo332ac7f2010-03-23 12:24:08 +09001744 if (status & ATA_BUSY) {
1745 if (bmdma_stopped) {
1746 /* BMDMA engine is already stopped, we're screwed */
1747 qc->err_mask |= AC_ERR_HSM;
1748 ap->hsm_task_state = HSM_ST_ERR;
1749 } else
1750 goto idle_irq;
1751 }
Tejun Heo624d5c52008-03-25 22:16:41 +09001752
1753 /* ack bmdma irq events */
Tejun Heo5682ed32008-04-07 22:47:16 +09001754 ap->ops->sff_irq_clear(ap);
Tejun Heo624d5c52008-03-25 22:16:41 +09001755
Tejun Heo9363c382008-04-07 22:47:16 +09001756 ata_sff_hsm_move(ap, qc, status, 0);
Tejun Heo624d5c52008-03-25 22:16:41 +09001757
1758 if (unlikely(qc->err_mask) && (qc->tf.protocol == ATA_PROT_DMA ||
1759 qc->tf.protocol == ATAPI_PROT_DMA))
1760 ata_ehi_push_desc(ehi, "BMDMA stat 0x%x", host_stat);
1761
1762 return 1; /* irq handled */
1763
1764idle_irq:
1765 ap->stats.idle_irq++;
1766
1767#ifdef ATA_IRQ_TRAP
1768 if ((ap->stats.idle_irq % 1000) == 0) {
Tejun Heo5682ed32008-04-07 22:47:16 +09001769 ap->ops->sff_check_status(ap);
1770 ap->ops->sff_irq_clear(ap);
Tejun Heo624d5c52008-03-25 22:16:41 +09001771 ata_port_printk(ap, KERN_WARNING, "irq trap\n");
1772 return 1;
1773 }
1774#endif
1775 return 0; /* irq not handled */
1776}
Alan Cox0fe40ff2009-01-05 14:16:13 +00001777EXPORT_SYMBOL_GPL(ata_sff_host_intr);
Tejun Heo624d5c52008-03-25 22:16:41 +09001778
1779/**
Tejun Heo9363c382008-04-07 22:47:16 +09001780 * ata_sff_interrupt - Default ATA host interrupt handler
Tejun Heo624d5c52008-03-25 22:16:41 +09001781 * @irq: irq line (unused)
1782 * @dev_instance: pointer to our ata_host information structure
1783 *
1784 * Default interrupt handler for PCI IDE devices. Calls
Tejun Heo9363c382008-04-07 22:47:16 +09001785 * ata_sff_host_intr() for each port that is not disabled.
Tejun Heo624d5c52008-03-25 22:16:41 +09001786 *
1787 * LOCKING:
1788 * Obtains host lock during operation.
1789 *
1790 * RETURNS:
1791 * IRQ_NONE or IRQ_HANDLED.
1792 */
Tejun Heo9363c382008-04-07 22:47:16 +09001793irqreturn_t ata_sff_interrupt(int irq, void *dev_instance)
Tejun Heo624d5c52008-03-25 22:16:41 +09001794{
1795 struct ata_host *host = dev_instance;
Tejun Heo332ac7f2010-03-23 12:24:08 +09001796 bool retried = false;
Tejun Heo624d5c52008-03-25 22:16:41 +09001797 unsigned int i;
Tejun Heo332ac7f2010-03-23 12:24:08 +09001798 unsigned int handled, idle, polling;
Tejun Heo624d5c52008-03-25 22:16:41 +09001799 unsigned long flags;
1800
1801 /* TODO: make _irqsave conditional on x86 PCI IDE legacy mode */
1802 spin_lock_irqsave(&host->lock, flags);
1803
Tejun Heo332ac7f2010-03-23 12:24:08 +09001804retry:
1805 handled = idle = polling = 0;
Tejun Heo624d5c52008-03-25 22:16:41 +09001806 for (i = 0; i < host->n_ports; i++) {
Tejun Heod88ec2e2010-01-19 10:46:32 +09001807 struct ata_port *ap = host->ports[i];
1808 struct ata_queued_cmd *qc;
Tejun Heo624d5c52008-03-25 22:16:41 +09001809
Tejun Heod88ec2e2010-01-19 10:46:32 +09001810 qc = ata_qc_from_tag(ap, ap->link.active_tag);
Tejun Heo27943622010-01-19 10:49:19 +09001811 if (qc) {
1812 if (!(qc->tf.flags & ATA_TFLAG_POLLING))
1813 handled |= ata_sff_host_intr(ap, qc);
1814 else
1815 polling |= 1 << i;
Tejun Heo332ac7f2010-03-23 12:24:08 +09001816 } else
1817 idle |= 1 << i;
Tejun Heo27943622010-01-19 10:49:19 +09001818 }
1819
1820 /*
1821 * If no port was expecting IRQ but the controller is actually
1822 * asserting IRQ line, nobody cared will ensue. Check IRQ
1823 * pending status if available and clear spurious IRQ.
1824 */
Tejun Heo332ac7f2010-03-23 12:24:08 +09001825 if (!handled && !retried) {
1826 bool retry = false;
1827
Tejun Heo27943622010-01-19 10:49:19 +09001828 for (i = 0; i < host->n_ports; i++) {
1829 struct ata_port *ap = host->ports[i];
1830
1831 if (polling & (1 << i))
1832 continue;
1833
1834 if (!ap->ops->sff_irq_check ||
1835 !ap->ops->sff_irq_check(ap))
1836 continue;
1837
Tejun Heo332ac7f2010-03-23 12:24:08 +09001838 if (idle & (1 << i)) {
1839 ap->ops->sff_check_status(ap);
1840 ap->ops->sff_irq_clear(ap);
1841 } else {
1842 /* clear INTRQ and check if BUSY cleared */
1843 if (!(ap->ops->sff_check_status(ap) & ATA_BUSY))
1844 retry |= true;
1845 /*
1846 * With command in flight, we can't do
1847 * sff_irq_clear() w/o racing with completion.
1848 */
1849 }
1850 }
1851
1852 if (retry) {
1853 retried = true;
1854 goto retry;
Tejun Heo27943622010-01-19 10:49:19 +09001855 }
Tejun Heo624d5c52008-03-25 22:16:41 +09001856 }
1857
1858 spin_unlock_irqrestore(&host->lock, flags);
1859
1860 return IRQ_RETVAL(handled);
1861}
Alan Cox0fe40ff2009-01-05 14:16:13 +00001862EXPORT_SYMBOL_GPL(ata_sff_interrupt);
Tejun Heo624d5c52008-03-25 22:16:41 +09001863
1864/**
Alan Coxc96f1732009-03-24 10:23:46 +00001865 * ata_sff_lost_interrupt - Check for an apparent lost interrupt
1866 * @ap: port that appears to have timed out
1867 *
1868 * Called from the libata error handlers when the core code suspects
1869 * an interrupt has been lost. If it has complete anything we can and
1870 * then return. Interface must support altstatus for this faster
1871 * recovery to occur.
1872 *
1873 * Locking:
1874 * Caller holds host lock
1875 */
1876
1877void ata_sff_lost_interrupt(struct ata_port *ap)
1878{
1879 u8 status;
1880 struct ata_queued_cmd *qc;
1881
1882 /* Only one outstanding command per SFF channel */
1883 qc = ata_qc_from_tag(ap, ap->link.active_tag);
Tejun Heo3e4ec342010-05-10 21:41:30 +02001884 /* We cannot lose an interrupt on a non-existent or polled command */
1885 if (!qc || qc->tf.flags & ATA_TFLAG_POLLING)
Alan Coxc96f1732009-03-24 10:23:46 +00001886 return;
1887 /* See if the controller thinks it is still busy - if so the command
1888 isn't a lost IRQ but is still in progress */
1889 status = ata_sff_altstatus(ap);
1890 if (status & ATA_BUSY)
1891 return;
1892
1893 /* There was a command running, we are no longer busy and we have
1894 no interrupt. */
1895 ata_port_printk(ap, KERN_WARNING, "lost interrupt (Status 0x%x)\n",
1896 status);
1897 /* Run the host interrupt logic as if the interrupt had not been
1898 lost */
1899 ata_sff_host_intr(ap, qc);
1900}
1901EXPORT_SYMBOL_GPL(ata_sff_lost_interrupt);
1902
1903/**
Tejun Heo9363c382008-04-07 22:47:16 +09001904 * ata_sff_freeze - Freeze SFF controller port
Tejun Heo6d97dbd2006-05-15 20:58:24 +09001905 * @ap: port to freeze
1906 *
1907 * Freeze BMDMA controller port.
1908 *
1909 * LOCKING:
1910 * Inherited from caller.
1911 */
Tejun Heo9363c382008-04-07 22:47:16 +09001912void ata_sff_freeze(struct ata_port *ap)
Tejun Heo6d97dbd2006-05-15 20:58:24 +09001913{
Tejun Heo6d97dbd2006-05-15 20:58:24 +09001914 ap->ctl |= ATA_NIEN;
1915 ap->last_ctl = ap->ctl;
1916
Sergei Shtylyov41dec292010-05-07 22:47:50 +04001917 if (ap->ops->sff_set_devctl || ap->ioaddr.ctl_addr)
1918 ata_sff_set_devctl(ap, ap->ctl);
Tejun Heo0f0a3ad2006-11-17 12:24:22 +09001919
1920 /* Under certain circumstances, some controllers raise IRQ on
1921 * ATA_NIEN manipulation. Also, many controllers fail to mask
1922 * previously pending IRQ on ATA_NIEN assertion. Clear it.
1923 */
Tejun Heo5682ed32008-04-07 22:47:16 +09001924 ap->ops->sff_check_status(ap);
Tejun Heo0f0a3ad2006-11-17 12:24:22 +09001925
Tejun Heo5682ed32008-04-07 22:47:16 +09001926 ap->ops->sff_irq_clear(ap);
Tejun Heo6d97dbd2006-05-15 20:58:24 +09001927}
Alan Cox0fe40ff2009-01-05 14:16:13 +00001928EXPORT_SYMBOL_GPL(ata_sff_freeze);
Tejun Heo6d97dbd2006-05-15 20:58:24 +09001929
1930/**
Tejun Heo9363c382008-04-07 22:47:16 +09001931 * ata_sff_thaw - Thaw SFF controller port
Tejun Heo6d97dbd2006-05-15 20:58:24 +09001932 * @ap: port to thaw
1933 *
Tejun Heo9363c382008-04-07 22:47:16 +09001934 * Thaw SFF controller port.
Tejun Heo6d97dbd2006-05-15 20:58:24 +09001935 *
1936 * LOCKING:
1937 * Inherited from caller.
1938 */
Tejun Heo9363c382008-04-07 22:47:16 +09001939void ata_sff_thaw(struct ata_port *ap)
Tejun Heo6d97dbd2006-05-15 20:58:24 +09001940{
1941 /* clear & re-enable interrupts */
Tejun Heo5682ed32008-04-07 22:47:16 +09001942 ap->ops->sff_check_status(ap);
1943 ap->ops->sff_irq_clear(ap);
Sergei Shtylyove42a5422010-05-07 22:49:02 +04001944 ata_sff_irq_on(ap);
Tejun Heo6d97dbd2006-05-15 20:58:24 +09001945}
Alan Cox0fe40ff2009-01-05 14:16:13 +00001946EXPORT_SYMBOL_GPL(ata_sff_thaw);
Tejun Heo6d97dbd2006-05-15 20:58:24 +09001947
1948/**
Tejun Heo0aa11132008-04-07 22:47:18 +09001949 * ata_sff_prereset - prepare SFF link for reset
1950 * @link: SFF link to be reset
1951 * @deadline: deadline jiffies for the operation
1952 *
1953 * SFF link @link is about to be reset. Initialize it. It first
1954 * calls ata_std_prereset() and wait for !BSY if the port is
1955 * being softreset.
1956 *
1957 * LOCKING:
1958 * Kernel thread context (may sleep)
1959 *
1960 * RETURNS:
1961 * 0 on success, -errno otherwise.
1962 */
1963int ata_sff_prereset(struct ata_link *link, unsigned long deadline)
1964{
Tejun Heo0aa11132008-04-07 22:47:18 +09001965 struct ata_eh_context *ehc = &link->eh_context;
1966 int rc;
1967
1968 rc = ata_std_prereset(link, deadline);
1969 if (rc)
1970 return rc;
1971
1972 /* if we're about to do hardreset, nothing more to do */
1973 if (ehc->i.action & ATA_EH_HARDRESET)
1974 return 0;
1975
1976 /* wait for !BSY if we don't know that no device is attached */
1977 if (!ata_link_offline(link)) {
Tejun Heo705e76b2008-04-07 22:47:19 +09001978 rc = ata_sff_wait_ready(link, deadline);
Tejun Heo0aa11132008-04-07 22:47:18 +09001979 if (rc && rc != -ENODEV) {
1980 ata_link_printk(link, KERN_WARNING, "device not ready "
1981 "(errno=%d), forcing hardreset\n", rc);
1982 ehc->i.action |= ATA_EH_HARDRESET;
1983 }
1984 }
1985
1986 return 0;
1987}
Alan Cox0fe40ff2009-01-05 14:16:13 +00001988EXPORT_SYMBOL_GPL(ata_sff_prereset);
Tejun Heo0aa11132008-04-07 22:47:18 +09001989
1990/**
Tejun Heo624d5c52008-03-25 22:16:41 +09001991 * ata_devchk - PATA device presence detection
1992 * @ap: ATA channel to examine
1993 * @device: Device to examine (starting at zero)
1994 *
1995 * This technique was originally described in
1996 * Hale Landis's ATADRVR (www.ata-atapi.com), and
1997 * later found its way into the ATA/ATAPI spec.
1998 *
1999 * Write a pattern to the ATA shadow registers,
2000 * and if a device is present, it will respond by
2001 * correctly storing and echoing back the
2002 * ATA shadow register contents.
2003 *
2004 * LOCKING:
2005 * caller.
2006 */
2007static unsigned int ata_devchk(struct ata_port *ap, unsigned int device)
2008{
2009 struct ata_ioports *ioaddr = &ap->ioaddr;
2010 u8 nsect, lbal;
2011
Tejun Heo5682ed32008-04-07 22:47:16 +09002012 ap->ops->sff_dev_select(ap, device);
Tejun Heo624d5c52008-03-25 22:16:41 +09002013
2014 iowrite8(0x55, ioaddr->nsect_addr);
2015 iowrite8(0xaa, ioaddr->lbal_addr);
2016
2017 iowrite8(0xaa, ioaddr->nsect_addr);
2018 iowrite8(0x55, ioaddr->lbal_addr);
2019
2020 iowrite8(0x55, ioaddr->nsect_addr);
2021 iowrite8(0xaa, ioaddr->lbal_addr);
2022
2023 nsect = ioread8(ioaddr->nsect_addr);
2024 lbal = ioread8(ioaddr->lbal_addr);
2025
2026 if ((nsect == 0x55) && (lbal == 0xaa))
2027 return 1; /* we found a device */
2028
2029 return 0; /* nothing found */
2030}
2031
2032/**
Tejun Heo9363c382008-04-07 22:47:16 +09002033 * ata_sff_dev_classify - Parse returned ATA device signature
Tejun Heo624d5c52008-03-25 22:16:41 +09002034 * @dev: ATA device to classify (starting at zero)
2035 * @present: device seems present
2036 * @r_err: Value of error register on completion
2037 *
2038 * After an event -- SRST, E.D.D., or SATA COMRESET -- occurs,
2039 * an ATA/ATAPI-defined set of values is placed in the ATA
2040 * shadow registers, indicating the results of device detection
2041 * and diagnostics.
2042 *
2043 * Select the ATA device, and read the values from the ATA shadow
2044 * registers. Then parse according to the Error register value,
2045 * and the spec-defined values examined by ata_dev_classify().
2046 *
2047 * LOCKING:
2048 * caller.
2049 *
2050 * RETURNS:
2051 * Device type - %ATA_DEV_ATA, %ATA_DEV_ATAPI or %ATA_DEV_NONE.
2052 */
Tejun Heo9363c382008-04-07 22:47:16 +09002053unsigned int ata_sff_dev_classify(struct ata_device *dev, int present,
Tejun Heo624d5c52008-03-25 22:16:41 +09002054 u8 *r_err)
2055{
2056 struct ata_port *ap = dev->link->ap;
2057 struct ata_taskfile tf;
2058 unsigned int class;
2059 u8 err;
2060
Tejun Heo5682ed32008-04-07 22:47:16 +09002061 ap->ops->sff_dev_select(ap, dev->devno);
Tejun Heo624d5c52008-03-25 22:16:41 +09002062
2063 memset(&tf, 0, sizeof(tf));
2064
Tejun Heo5682ed32008-04-07 22:47:16 +09002065 ap->ops->sff_tf_read(ap, &tf);
Tejun Heo624d5c52008-03-25 22:16:41 +09002066 err = tf.feature;
2067 if (r_err)
2068 *r_err = err;
2069
2070 /* see if device passed diags: continue and warn later */
2071 if (err == 0)
2072 /* diagnostic fail : do nothing _YET_ */
2073 dev->horkage |= ATA_HORKAGE_DIAGNOSTIC;
2074 else if (err == 1)
2075 /* do nothing */ ;
2076 else if ((dev->devno == 0) && (err == 0x81))
2077 /* do nothing */ ;
2078 else
2079 return ATA_DEV_NONE;
2080
2081 /* determine if device is ATA or ATAPI */
2082 class = ata_dev_classify(&tf);
2083
2084 if (class == ATA_DEV_UNKNOWN) {
2085 /* If the device failed diagnostic, it's likely to
2086 * have reported incorrect device signature too.
2087 * Assume ATA device if the device seems present but
2088 * device signature is invalid with diagnostic
2089 * failure.
2090 */
2091 if (present && (dev->horkage & ATA_HORKAGE_DIAGNOSTIC))
2092 class = ATA_DEV_ATA;
2093 else
2094 class = ATA_DEV_NONE;
Tejun Heo5682ed32008-04-07 22:47:16 +09002095 } else if ((class == ATA_DEV_ATA) &&
2096 (ap->ops->sff_check_status(ap) == 0))
Tejun Heo624d5c52008-03-25 22:16:41 +09002097 class = ATA_DEV_NONE;
2098
2099 return class;
2100}
Alan Cox0fe40ff2009-01-05 14:16:13 +00002101EXPORT_SYMBOL_GPL(ata_sff_dev_classify);
Tejun Heo624d5c52008-03-25 22:16:41 +09002102
Tejun Heo705e76b2008-04-07 22:47:19 +09002103/**
2104 * ata_sff_wait_after_reset - wait for devices to become ready after reset
2105 * @link: SFF link which is just reset
2106 * @devmask: mask of present devices
2107 * @deadline: deadline jiffies for the operation
2108 *
2109 * Wait devices attached to SFF @link to become ready after
2110 * reset. It contains preceding 150ms wait to avoid accessing TF
2111 * status register too early.
2112 *
2113 * LOCKING:
2114 * Kernel thread context (may sleep).
2115 *
2116 * RETURNS:
2117 * 0 on success, -ENODEV if some or all of devices in @devmask
2118 * don't seem to exist. -errno on other errors.
2119 */
2120int ata_sff_wait_after_reset(struct ata_link *link, unsigned int devmask,
2121 unsigned long deadline)
Tejun Heo624d5c52008-03-25 22:16:41 +09002122{
Tejun Heo705e76b2008-04-07 22:47:19 +09002123 struct ata_port *ap = link->ap;
Tejun Heo624d5c52008-03-25 22:16:41 +09002124 struct ata_ioports *ioaddr = &ap->ioaddr;
2125 unsigned int dev0 = devmask & (1 << 0);
2126 unsigned int dev1 = devmask & (1 << 1);
2127 int rc, ret = 0;
2128
Tejun Heo341c2c92008-05-20 02:17:51 +09002129 msleep(ATA_WAIT_AFTER_RESET);
Tejun Heo705e76b2008-04-07 22:47:19 +09002130
2131 /* always check readiness of the master device */
2132 rc = ata_sff_wait_ready(link, deadline);
2133 /* -ENODEV means the odd clown forgot the D7 pulldown resistor
2134 * and TF status is 0xff, bail out on it too.
Tejun Heo624d5c52008-03-25 22:16:41 +09002135 */
Tejun Heo705e76b2008-04-07 22:47:19 +09002136 if (rc)
2137 return rc;
Tejun Heo624d5c52008-03-25 22:16:41 +09002138
2139 /* if device 1 was found in ata_devchk, wait for register
2140 * access briefly, then wait for BSY to clear.
2141 */
2142 if (dev1) {
2143 int i;
2144
Tejun Heo5682ed32008-04-07 22:47:16 +09002145 ap->ops->sff_dev_select(ap, 1);
Tejun Heo624d5c52008-03-25 22:16:41 +09002146
2147 /* Wait for register access. Some ATAPI devices fail
2148 * to set nsect/lbal after reset, so don't waste too
2149 * much time on it. We're gonna wait for !BSY anyway.
2150 */
2151 for (i = 0; i < 2; i++) {
2152 u8 nsect, lbal;
2153
2154 nsect = ioread8(ioaddr->nsect_addr);
2155 lbal = ioread8(ioaddr->lbal_addr);
2156 if ((nsect == 1) && (lbal == 1))
2157 break;
2158 msleep(50); /* give drive a breather */
2159 }
2160
Tejun Heo705e76b2008-04-07 22:47:19 +09002161 rc = ata_sff_wait_ready(link, deadline);
Tejun Heo624d5c52008-03-25 22:16:41 +09002162 if (rc) {
2163 if (rc != -ENODEV)
2164 return rc;
2165 ret = rc;
2166 }
2167 }
2168
2169 /* is all this really necessary? */
Tejun Heo5682ed32008-04-07 22:47:16 +09002170 ap->ops->sff_dev_select(ap, 0);
Tejun Heo624d5c52008-03-25 22:16:41 +09002171 if (dev1)
Tejun Heo5682ed32008-04-07 22:47:16 +09002172 ap->ops->sff_dev_select(ap, 1);
Tejun Heo624d5c52008-03-25 22:16:41 +09002173 if (dev0)
Tejun Heo5682ed32008-04-07 22:47:16 +09002174 ap->ops->sff_dev_select(ap, 0);
Tejun Heo624d5c52008-03-25 22:16:41 +09002175
2176 return ret;
2177}
Alan Cox0fe40ff2009-01-05 14:16:13 +00002178EXPORT_SYMBOL_GPL(ata_sff_wait_after_reset);
Tejun Heo624d5c52008-03-25 22:16:41 +09002179
Tejun Heo624d5c52008-03-25 22:16:41 +09002180static int ata_bus_softreset(struct ata_port *ap, unsigned int devmask,
2181 unsigned long deadline)
2182{
2183 struct ata_ioports *ioaddr = &ap->ioaddr;
2184
2185 DPRINTK("ata%u: bus reset via SRST\n", ap->print_id);
2186
2187 /* software reset. causes dev0 to be selected */
2188 iowrite8(ap->ctl, ioaddr->ctl_addr);
2189 udelay(20); /* FIXME: flush */
2190 iowrite8(ap->ctl | ATA_SRST, ioaddr->ctl_addr);
2191 udelay(20); /* FIXME: flush */
2192 iowrite8(ap->ctl, ioaddr->ctl_addr);
Stuart MENEFYe3e43852009-03-10 11:38:13 +00002193 ap->last_ctl = ap->ctl;
Tejun Heo624d5c52008-03-25 22:16:41 +09002194
Tejun Heo705e76b2008-04-07 22:47:19 +09002195 /* wait the port to become ready */
2196 return ata_sff_wait_after_reset(&ap->link, devmask, deadline);
Tejun Heo624d5c52008-03-25 22:16:41 +09002197}
2198
2199/**
Tejun Heo9363c382008-04-07 22:47:16 +09002200 * ata_sff_softreset - reset host port via ATA SRST
Tejun Heo624d5c52008-03-25 22:16:41 +09002201 * @link: ATA link to reset
2202 * @classes: resulting classes of attached devices
2203 * @deadline: deadline jiffies for the operation
2204 *
2205 * Reset host port using ATA SRST.
2206 *
2207 * LOCKING:
2208 * Kernel thread context (may sleep)
2209 *
2210 * RETURNS:
2211 * 0 on success, -errno otherwise.
2212 */
Tejun Heo9363c382008-04-07 22:47:16 +09002213int ata_sff_softreset(struct ata_link *link, unsigned int *classes,
Tejun Heo624d5c52008-03-25 22:16:41 +09002214 unsigned long deadline)
2215{
2216 struct ata_port *ap = link->ap;
2217 unsigned int slave_possible = ap->flags & ATA_FLAG_SLAVE_POSS;
2218 unsigned int devmask = 0;
2219 int rc;
2220 u8 err;
2221
2222 DPRINTK("ENTER\n");
2223
Tejun Heo624d5c52008-03-25 22:16:41 +09002224 /* determine if device 0/1 are present */
2225 if (ata_devchk(ap, 0))
2226 devmask |= (1 << 0);
2227 if (slave_possible && ata_devchk(ap, 1))
2228 devmask |= (1 << 1);
2229
2230 /* select device 0 again */
Tejun Heo5682ed32008-04-07 22:47:16 +09002231 ap->ops->sff_dev_select(ap, 0);
Tejun Heo624d5c52008-03-25 22:16:41 +09002232
2233 /* issue bus reset */
2234 DPRINTK("about to softreset, devmask=%x\n", devmask);
2235 rc = ata_bus_softreset(ap, devmask, deadline);
2236 /* if link is occupied, -ENODEV too is an error */
2237 if (rc && (rc != -ENODEV || sata_scr_valid(link))) {
2238 ata_link_printk(link, KERN_ERR, "SRST failed (errno=%d)\n", rc);
2239 return rc;
2240 }
2241
2242 /* determine by signature whether we have ATA or ATAPI devices */
Tejun Heo9363c382008-04-07 22:47:16 +09002243 classes[0] = ata_sff_dev_classify(&link->device[0],
Tejun Heo624d5c52008-03-25 22:16:41 +09002244 devmask & (1 << 0), &err);
2245 if (slave_possible && err != 0x81)
Tejun Heo9363c382008-04-07 22:47:16 +09002246 classes[1] = ata_sff_dev_classify(&link->device[1],
Tejun Heo624d5c52008-03-25 22:16:41 +09002247 devmask & (1 << 1), &err);
2248
Tejun Heo624d5c52008-03-25 22:16:41 +09002249 DPRINTK("EXIT, classes[0]=%u [1]=%u\n", classes[0], classes[1]);
2250 return 0;
2251}
Alan Cox0fe40ff2009-01-05 14:16:13 +00002252EXPORT_SYMBOL_GPL(ata_sff_softreset);
Tejun Heo624d5c52008-03-25 22:16:41 +09002253
2254/**
Tejun Heo9363c382008-04-07 22:47:16 +09002255 * sata_sff_hardreset - reset host port via SATA phy reset
Tejun Heo624d5c52008-03-25 22:16:41 +09002256 * @link: link to reset
2257 * @class: resulting class of attached device
2258 * @deadline: deadline jiffies for the operation
2259 *
2260 * SATA phy-reset host port using DET bits of SControl register,
2261 * wait for !BSY and classify the attached device.
2262 *
2263 * LOCKING:
2264 * Kernel thread context (may sleep)
2265 *
2266 * RETURNS:
2267 * 0 on success, -errno otherwise.
2268 */
Tejun Heo9363c382008-04-07 22:47:16 +09002269int sata_sff_hardreset(struct ata_link *link, unsigned int *class,
Tejun Heo624d5c52008-03-25 22:16:41 +09002270 unsigned long deadline)
2271{
Tejun Heo9dadd452008-04-07 22:47:19 +09002272 struct ata_eh_context *ehc = &link->eh_context;
2273 const unsigned long *timing = sata_ehc_deb_timing(ehc);
2274 bool online;
Tejun Heo624d5c52008-03-25 22:16:41 +09002275 int rc;
2276
Tejun Heo9dadd452008-04-07 22:47:19 +09002277 rc = sata_link_hardreset(link, timing, deadline, &online,
2278 ata_sff_check_ready);
Tejun Heo9dadd452008-04-07 22:47:19 +09002279 if (online)
2280 *class = ata_sff_dev_classify(link->device, 1, NULL);
Tejun Heo624d5c52008-03-25 22:16:41 +09002281
2282 DPRINTK("EXIT, class=%u\n", *class);
Tejun Heo9dadd452008-04-07 22:47:19 +09002283 return rc;
Tejun Heo624d5c52008-03-25 22:16:41 +09002284}
Alan Cox0fe40ff2009-01-05 14:16:13 +00002285EXPORT_SYMBOL_GPL(sata_sff_hardreset);
Tejun Heo624d5c52008-03-25 22:16:41 +09002286
2287/**
Tejun Heo203c75b2008-04-07 22:47:18 +09002288 * ata_sff_postreset - SFF postreset callback
2289 * @link: the target SFF ata_link
2290 * @classes: classes of attached devices
2291 *
2292 * This function is invoked after a successful reset. It first
2293 * calls ata_std_postreset() and performs SFF specific postreset
2294 * processing.
2295 *
2296 * LOCKING:
2297 * Kernel thread context (may sleep)
2298 */
2299void ata_sff_postreset(struct ata_link *link, unsigned int *classes)
2300{
2301 struct ata_port *ap = link->ap;
2302
2303 ata_std_postreset(link, classes);
2304
2305 /* is double-select really necessary? */
2306 if (classes[0] != ATA_DEV_NONE)
2307 ap->ops->sff_dev_select(ap, 1);
2308 if (classes[1] != ATA_DEV_NONE)
2309 ap->ops->sff_dev_select(ap, 0);
2310
2311 /* bail out if no device is present */
2312 if (classes[0] == ATA_DEV_NONE && classes[1] == ATA_DEV_NONE) {
2313 DPRINTK("EXIT, no device\n");
2314 return;
2315 }
2316
2317 /* set up device control */
Sergei Shtylyov41dec292010-05-07 22:47:50 +04002318 if (ap->ops->sff_set_devctl || ap->ioaddr.ctl_addr) {
2319 ata_sff_set_devctl(ap, ap->ctl);
Stuart MENEFYe3e43852009-03-10 11:38:13 +00002320 ap->last_ctl = ap->ctl;
2321 }
Tejun Heo203c75b2008-04-07 22:47:18 +09002322}
Alan Cox0fe40ff2009-01-05 14:16:13 +00002323EXPORT_SYMBOL_GPL(ata_sff_postreset);
Tejun Heo203c75b2008-04-07 22:47:18 +09002324
2325/**
Alan Cox3d47aa82009-03-24 10:23:19 +00002326 * ata_sff_drain_fifo - Stock FIFO drain logic for SFF controllers
2327 * @qc: command
2328 *
2329 * Drain the FIFO and device of any stuck data following a command
Daniel Mack3ad2f3f2010-02-03 08:01:28 +08002330 * failing to complete. In some cases this is necessary before a
Alan Cox3d47aa82009-03-24 10:23:19 +00002331 * reset will recover the device.
2332 *
2333 */
2334
2335void ata_sff_drain_fifo(struct ata_queued_cmd *qc)
2336{
2337 int count;
2338 struct ata_port *ap;
2339
2340 /* We only need to flush incoming data when a command was running */
2341 if (qc == NULL || qc->dma_dir == DMA_TO_DEVICE)
2342 return;
2343
2344 ap = qc->ap;
2345 /* Drain up to 64K of data before we give up this recovery method */
2346 for (count = 0; (ap->ops->sff_check_status(ap) & ATA_DRQ)
Robert Hancock9a8fd682009-12-08 20:48:10 -06002347 && count < 65536; count += 2)
Alan Cox3d47aa82009-03-24 10:23:19 +00002348 ioread16(ap->ioaddr.data_addr);
2349
2350 /* Can become DEBUG later */
2351 if (count)
2352 ata_port_printk(ap, KERN_DEBUG,
2353 "drained %d bytes to clear DRQ.\n", count);
2354
2355}
2356EXPORT_SYMBOL_GPL(ata_sff_drain_fifo);
2357
2358/**
Tejun Heo9363c382008-04-07 22:47:16 +09002359 * ata_sff_error_handler - Stock error handler for BMDMA controller
Tejun Heo6d97dbd2006-05-15 20:58:24 +09002360 * @ap: port to handle error for
Tejun Heo6d97dbd2006-05-15 20:58:24 +09002361 *
Tejun Heo9363c382008-04-07 22:47:16 +09002362 * Stock error handler for SFF controller. It can handle both
Tejun Heo6d97dbd2006-05-15 20:58:24 +09002363 * PATA and SATA controllers. Many controllers should be able to
2364 * use this EH as-is or with some added handling before and
2365 * after.
2366 *
Tejun Heo6d97dbd2006-05-15 20:58:24 +09002367 * LOCKING:
2368 * Kernel thread context (may sleep)
2369 */
Tejun Heo9363c382008-04-07 22:47:16 +09002370void ata_sff_error_handler(struct ata_port *ap)
Tejun Heo6d97dbd2006-05-15 20:58:24 +09002371{
Tejun Heoa1efdab2008-03-25 12:22:50 +09002372 ata_reset_fn_t softreset = ap->ops->softreset;
2373 ata_reset_fn_t hardreset = ap->ops->hardreset;
Tejun Heo6d97dbd2006-05-15 20:58:24 +09002374 struct ata_queued_cmd *qc;
2375 unsigned long flags;
Tejun Heo2a7adff2010-05-10 21:41:28 +02002376 bool thaw = false;
Tejun Heo6d97dbd2006-05-15 20:58:24 +09002377
Tejun Heo9af5c9c2007-08-06 18:36:22 +09002378 qc = __ata_qc_from_tag(ap, ap->link.active_tag);
Tejun Heo6d97dbd2006-05-15 20:58:24 +09002379 if (qc && !(qc->flags & ATA_QCFLAG_FAILED))
2380 qc = NULL;
2381
2382 /* reset PIO HSM and stop DMA engine */
Jeff Garzikba6a1302006-06-22 23:46:10 -04002383 spin_lock_irqsave(ap->lock, flags);
Tejun Heo6d97dbd2006-05-15 20:58:24 +09002384
Tejun Heo6d97dbd2006-05-15 20:58:24 +09002385 ap->hsm_task_state = HSM_ST_IDLE;
2386
Tejun Heoed82f962008-03-25 21:34:39 +09002387 if (ap->ioaddr.bmdma_addr &&
2388 qc && (qc->tf.protocol == ATA_PROT_DMA ||
Tejun Heo0dc36882007-12-18 16:34:43 -05002389 qc->tf.protocol == ATAPI_PROT_DMA)) {
Tejun Heo6d97dbd2006-05-15 20:58:24 +09002390 u8 host_stat;
2391
Robert Hancockfbbb2622006-10-27 19:08:41 -07002392 host_stat = ap->ops->bmdma_status(ap);
Tejun Heo6d97dbd2006-05-15 20:58:24 +09002393
Tejun Heo6d97dbd2006-05-15 20:58:24 +09002394 /* BMDMA controllers indicate host bus error by
2395 * setting DMA_ERR bit and timing out. As it wasn't
2396 * really a timeout event, adjust error mask and
2397 * cancel frozen state.
2398 */
Alan Cox3d47aa82009-03-24 10:23:19 +00002399 if (qc->err_mask == AC_ERR_TIMEOUT
2400 && (host_stat & ATA_DMA_ERR)) {
Tejun Heo6d97dbd2006-05-15 20:58:24 +09002401 qc->err_mask = AC_ERR_HOST_BUS;
Tejun Heo2a7adff2010-05-10 21:41:28 +02002402 thaw = true;
Tejun Heo6d97dbd2006-05-15 20:58:24 +09002403 }
2404
2405 ap->ops->bmdma_stop(qc);
Tejun Heo2a7adff2010-05-10 21:41:28 +02002406
2407 /* if we're gonna thaw, make sure IRQ is clear */
2408 if (thaw) {
2409 ap->ops->sff_check_status(ap);
2410 ap->ops->sff_irq_clear(ap);
2411
2412 spin_unlock_irqrestore(ap->lock, flags);
2413 ata_eh_thaw_port(ap);
2414 spin_lock_irqsave(ap->lock, flags);
2415 }
Tejun Heo6d97dbd2006-05-15 20:58:24 +09002416 }
2417
Alan Cox3d47aa82009-03-24 10:23:19 +00002418 /* We *MUST* do FIFO draining before we issue a reset as several
2419 * devices helpfully clear their internal state and will lock solid
2420 * if we touch the data port post reset. Pass qc in case anyone wants
2421 * to do different PIO/DMA recovery or has per command fixups
2422 */
2423 if (ap->ops->drain_fifo)
2424 ap->ops->drain_fifo(qc);
Tejun Heo6d97dbd2006-05-15 20:58:24 +09002425
Jeff Garzikba6a1302006-06-22 23:46:10 -04002426 spin_unlock_irqrestore(ap->lock, flags);
Tejun Heo6d97dbd2006-05-15 20:58:24 +09002427
Tejun Heo6d97dbd2006-05-15 20:58:24 +09002428 /* PIO and DMA engines have been stopped, perform recovery */
Tejun Heo6d97dbd2006-05-15 20:58:24 +09002429
Tejun Heo57c9efd2008-04-07 22:47:19 +09002430 /* Ignore ata_sff_softreset if ctl isn't accessible and
2431 * built-in hardresets if SCR access isn't available.
Tejun Heoa1efdab2008-03-25 12:22:50 +09002432 */
Tejun Heo9363c382008-04-07 22:47:16 +09002433 if (softreset == ata_sff_softreset && !ap->ioaddr.ctl_addr)
Tejun Heoa1efdab2008-03-25 12:22:50 +09002434 softreset = NULL;
Tejun Heo57c9efd2008-04-07 22:47:19 +09002435 if (ata_is_builtin_hardreset(hardreset) && !sata_scr_valid(&ap->link))
Tejun Heoa1efdab2008-03-25 12:22:50 +09002436 hardreset = NULL;
Tejun Heo6d97dbd2006-05-15 20:58:24 +09002437
Tejun Heoa1efdab2008-03-25 12:22:50 +09002438 ata_do_eh(ap, ap->ops->prereset, softreset, hardreset,
2439 ap->ops->postreset);
Tejun Heo6d97dbd2006-05-15 20:58:24 +09002440}
Alan Cox0fe40ff2009-01-05 14:16:13 +00002441EXPORT_SYMBOL_GPL(ata_sff_error_handler);
Tejun Heo6d97dbd2006-05-15 20:58:24 +09002442
2443/**
Tejun Heo9363c382008-04-07 22:47:16 +09002444 * ata_sff_post_internal_cmd - Stock post_internal_cmd for SFF controller
Tejun Heo6d97dbd2006-05-15 20:58:24 +09002445 * @qc: internal command to clean up
2446 *
2447 * LOCKING:
2448 * Kernel thread context (may sleep)
2449 */
Tejun Heo9363c382008-04-07 22:47:16 +09002450void ata_sff_post_internal_cmd(struct ata_queued_cmd *qc)
Tejun Heo6d97dbd2006-05-15 20:58:24 +09002451{
Tejun Heo570106d2008-10-20 13:10:21 +09002452 struct ata_port *ap = qc->ap;
2453 unsigned long flags;
2454
2455 spin_lock_irqsave(ap->lock, flags);
2456
2457 ap->hsm_task_state = HSM_ST_IDLE;
2458
2459 if (ap->ioaddr.bmdma_addr)
Benjamin Herrenschmidt294264a2009-12-02 11:36:28 +11002460 ap->ops->bmdma_stop(qc);
Tejun Heo570106d2008-10-20 13:10:21 +09002461
2462 spin_unlock_irqrestore(ap->lock, flags);
Tejun Heo6d97dbd2006-05-15 20:58:24 +09002463}
Alan Cox0fe40ff2009-01-05 14:16:13 +00002464EXPORT_SYMBOL_GPL(ata_sff_post_internal_cmd);
Tejun Heo6d97dbd2006-05-15 20:58:24 +09002465
Alan Coxd92e74d2007-06-07 16:19:15 +01002466/**
2467 * ata_sff_port_start - Set port up for dma.
2468 * @ap: Port to initialize
2469 *
2470 * Called just after data structures for each port are
2471 * initialized. Allocates space for PRD table if the device
2472 * is DMA capable SFF.
2473 *
2474 * May be used as the port_start() entry in ata_port_operations.
2475 *
2476 * LOCKING:
2477 * Inherited from caller.
2478 */
Alan Coxd92e74d2007-06-07 16:19:15 +01002479int ata_sff_port_start(struct ata_port *ap)
2480{
2481 if (ap->ioaddr.bmdma_addr)
2482 return ata_port_start(ap);
2483 return 0;
2484}
Alan Cox0fe40ff2009-01-05 14:16:13 +00002485EXPORT_SYMBOL_GPL(ata_sff_port_start);
Alan Coxd92e74d2007-06-07 16:19:15 +01002486
Tejun Heo272f7882008-03-25 22:16:40 +09002487/**
Alan Coxe3cf95d2009-04-09 17:31:17 +01002488 * ata_sff_port_start32 - Set port up for dma.
2489 * @ap: Port to initialize
2490 *
2491 * Called just after data structures for each port are
2492 * initialized. Allocates space for PRD table if the device
2493 * is DMA capable SFF.
2494 *
2495 * May be used as the port_start() entry in ata_port_operations for
2496 * devices that are capable of 32bit PIO.
2497 *
2498 * LOCKING:
2499 * Inherited from caller.
2500 */
2501int ata_sff_port_start32(struct ata_port *ap)
2502{
2503 ap->pflags |= ATA_PFLAG_PIO32 | ATA_PFLAG_PIO32CHANGE;
2504 if (ap->ioaddr.bmdma_addr)
2505 return ata_port_start(ap);
2506 return 0;
2507}
2508EXPORT_SYMBOL_GPL(ata_sff_port_start32);
2509
2510/**
Tejun Heo9363c382008-04-07 22:47:16 +09002511 * ata_sff_std_ports - initialize ioaddr with standard port offsets.
Tejun Heo624d5c52008-03-25 22:16:41 +09002512 * @ioaddr: IO address structure to be initialized
2513 *
2514 * Utility function which initializes data_addr, error_addr,
2515 * feature_addr, nsect_addr, lbal_addr, lbam_addr, lbah_addr,
2516 * device_addr, status_addr, and command_addr to standard offsets
2517 * relative to cmd_addr.
2518 *
2519 * Does not set ctl_addr, altstatus_addr, bmdma_addr, or scr_addr.
2520 */
Tejun Heo9363c382008-04-07 22:47:16 +09002521void ata_sff_std_ports(struct ata_ioports *ioaddr)
Tejun Heo624d5c52008-03-25 22:16:41 +09002522{
2523 ioaddr->data_addr = ioaddr->cmd_addr + ATA_REG_DATA;
2524 ioaddr->error_addr = ioaddr->cmd_addr + ATA_REG_ERR;
2525 ioaddr->feature_addr = ioaddr->cmd_addr + ATA_REG_FEATURE;
2526 ioaddr->nsect_addr = ioaddr->cmd_addr + ATA_REG_NSECT;
2527 ioaddr->lbal_addr = ioaddr->cmd_addr + ATA_REG_LBAL;
2528 ioaddr->lbam_addr = ioaddr->cmd_addr + ATA_REG_LBAM;
2529 ioaddr->lbah_addr = ioaddr->cmd_addr + ATA_REG_LBAH;
2530 ioaddr->device_addr = ioaddr->cmd_addr + ATA_REG_DEVICE;
2531 ioaddr->status_addr = ioaddr->cmd_addr + ATA_REG_STATUS;
2532 ioaddr->command_addr = ioaddr->cmd_addr + ATA_REG_CMD;
2533}
Alan Cox0fe40ff2009-01-05 14:16:13 +00002534EXPORT_SYMBOL_GPL(ata_sff_std_ports);
Tejun Heo624d5c52008-03-25 22:16:41 +09002535
Tejun Heo9363c382008-04-07 22:47:16 +09002536unsigned long ata_bmdma_mode_filter(struct ata_device *adev,
2537 unsigned long xfer_mask)
Tejun Heo071ce342008-03-25 22:16:42 +09002538{
2539 /* Filter out DMA modes if the device has been configured by
2540 the BIOS as PIO only */
2541
2542 if (adev->link->ap->ioaddr.bmdma_addr == NULL)
2543 xfer_mask &= ~(ATA_MASK_MWDMA | ATA_MASK_UDMA);
2544 return xfer_mask;
2545}
Alan Cox0fe40ff2009-01-05 14:16:13 +00002546EXPORT_SYMBOL_GPL(ata_bmdma_mode_filter);
Tejun Heo071ce342008-03-25 22:16:42 +09002547
Tejun Heo624d5c52008-03-25 22:16:41 +09002548/**
Tejun Heo272f7882008-03-25 22:16:40 +09002549 * ata_bmdma_setup - Set up PCI IDE BMDMA transaction
2550 * @qc: Info associated with this ATA transaction.
2551 *
2552 * LOCKING:
2553 * spin_lock_irqsave(host lock)
2554 */
2555void ata_bmdma_setup(struct ata_queued_cmd *qc)
2556{
2557 struct ata_port *ap = qc->ap;
2558 unsigned int rw = (qc->tf.flags & ATA_TFLAG_WRITE);
2559 u8 dmactl;
2560
2561 /* load PRD table addr. */
2562 mb(); /* make sure PRD table writes are visible to controller */
2563 iowrite32(ap->prd_dma, ap->ioaddr.bmdma_addr + ATA_DMA_TABLE_OFS);
2564
2565 /* specify data direction, triple-check start bit is clear */
2566 dmactl = ioread8(ap->ioaddr.bmdma_addr + ATA_DMA_CMD);
2567 dmactl &= ~(ATA_DMA_WR | ATA_DMA_START);
2568 if (!rw)
2569 dmactl |= ATA_DMA_WR;
2570 iowrite8(dmactl, ap->ioaddr.bmdma_addr + ATA_DMA_CMD);
2571
2572 /* issue r/w command */
Tejun Heo5682ed32008-04-07 22:47:16 +09002573 ap->ops->sff_exec_command(ap, &qc->tf);
Tejun Heo272f7882008-03-25 22:16:40 +09002574}
Alan Cox0fe40ff2009-01-05 14:16:13 +00002575EXPORT_SYMBOL_GPL(ata_bmdma_setup);
Tejun Heo272f7882008-03-25 22:16:40 +09002576
2577/**
2578 * ata_bmdma_start - Start a PCI IDE BMDMA transaction
2579 * @qc: Info associated with this ATA transaction.
2580 *
2581 * LOCKING:
2582 * spin_lock_irqsave(host lock)
2583 */
2584void ata_bmdma_start(struct ata_queued_cmd *qc)
2585{
2586 struct ata_port *ap = qc->ap;
2587 u8 dmactl;
2588
2589 /* start host DMA transaction */
2590 dmactl = ioread8(ap->ioaddr.bmdma_addr + ATA_DMA_CMD);
2591 iowrite8(dmactl | ATA_DMA_START, ap->ioaddr.bmdma_addr + ATA_DMA_CMD);
2592
2593 /* Strictly, one may wish to issue an ioread8() here, to
2594 * flush the mmio write. However, control also passes
2595 * to the hardware at this point, and it will interrupt
2596 * us when we are to resume control. So, in effect,
2597 * we don't care when the mmio write flushes.
2598 * Further, a read of the DMA status register _immediately_
2599 * following the write may not be what certain flaky hardware
2600 * is expected, so I think it is best to not add a readb()
2601 * without first all the MMIO ATA cards/mobos.
2602 * Or maybe I'm just being paranoid.
2603 *
2604 * FIXME: The posting of this write means I/O starts are
2605 * unneccessarily delayed for MMIO
2606 */
2607}
Alan Cox0fe40ff2009-01-05 14:16:13 +00002608EXPORT_SYMBOL_GPL(ata_bmdma_start);
Tejun Heo272f7882008-03-25 22:16:40 +09002609
2610/**
2611 * ata_bmdma_stop - Stop PCI IDE BMDMA transfer
2612 * @qc: Command we are ending DMA for
2613 *
2614 * Clears the ATA_DMA_START flag in the dma control register
2615 *
2616 * May be used as the bmdma_stop() entry in ata_port_operations.
2617 *
2618 * LOCKING:
2619 * spin_lock_irqsave(host lock)
2620 */
2621void ata_bmdma_stop(struct ata_queued_cmd *qc)
2622{
2623 struct ata_port *ap = qc->ap;
2624 void __iomem *mmio = ap->ioaddr.bmdma_addr;
2625
2626 /* clear start/stop bit */
2627 iowrite8(ioread8(mmio + ATA_DMA_CMD) & ~ATA_DMA_START,
2628 mmio + ATA_DMA_CMD);
2629
2630 /* one-PIO-cycle guaranteed wait, per spec, for HDMA1:0 transition */
Alan Coxa57c1ba2008-05-29 22:10:58 +01002631 ata_sff_dma_pause(ap);
Tejun Heo272f7882008-03-25 22:16:40 +09002632}
Alan Cox0fe40ff2009-01-05 14:16:13 +00002633EXPORT_SYMBOL_GPL(ata_bmdma_stop);
Tejun Heo272f7882008-03-25 22:16:40 +09002634
2635/**
2636 * ata_bmdma_status - Read PCI IDE BMDMA status
2637 * @ap: Port associated with this ATA transaction.
2638 *
2639 * Read and return BMDMA status register.
2640 *
2641 * May be used as the bmdma_status() entry in ata_port_operations.
2642 *
2643 * LOCKING:
2644 * spin_lock_irqsave(host lock)
2645 */
2646u8 ata_bmdma_status(struct ata_port *ap)
2647{
2648 return ioread8(ap->ioaddr.bmdma_addr + ATA_DMA_STATUS);
2649}
Alan Cox0fe40ff2009-01-05 14:16:13 +00002650EXPORT_SYMBOL_GPL(ata_bmdma_status);
Tejun Heo272f7882008-03-25 22:16:40 +09002651
Jeff Garzik1fdffbc2006-02-09 05:15:27 -05002652#ifdef CONFIG_PCI
Alan4112e162007-01-08 12:10:05 +00002653
Tejun Heo272f7882008-03-25 22:16:40 +09002654/**
Tejun Heo9363c382008-04-07 22:47:16 +09002655 * ata_pci_bmdma_clear_simplex - attempt to kick device out of simplex
Tejun Heo272f7882008-03-25 22:16:40 +09002656 * @pdev: PCI device
2657 *
2658 * Some PCI ATA devices report simplex mode but in fact can be told to
2659 * enter non simplex mode. This implements the necessary logic to
2660 * perform the task on such devices. Calling it on other devices will
2661 * have -undefined- behaviour.
2662 */
Tejun Heo9363c382008-04-07 22:47:16 +09002663int ata_pci_bmdma_clear_simplex(struct pci_dev *pdev)
Alan4112e162007-01-08 12:10:05 +00002664{
Tejun Heo272f7882008-03-25 22:16:40 +09002665 unsigned long bmdma = pci_resource_start(pdev, 4);
2666 u8 simplex;
Jeff Garzika84471f2007-02-26 05:51:33 -05002667
Tejun Heo272f7882008-03-25 22:16:40 +09002668 if (bmdma == 0)
2669 return -ENOENT;
2670
2671 simplex = inb(bmdma + 0x02);
2672 outb(simplex & 0x60, bmdma + 0x02);
2673 simplex = inb(bmdma + 0x02);
2674 if (simplex & 0x80)
2675 return -EOPNOTSUPP;
2676 return 0;
2677}
Alan Cox0fe40ff2009-01-05 14:16:13 +00002678EXPORT_SYMBOL_GPL(ata_pci_bmdma_clear_simplex);
Tejun Heo272f7882008-03-25 22:16:40 +09002679
Jeff Garzik1fdffbc2006-02-09 05:15:27 -05002680/**
Tejun Heo9363c382008-04-07 22:47:16 +09002681 * ata_pci_bmdma_init - acquire PCI BMDMA resources and init ATA host
Tejun Heo0f834de2007-04-17 23:44:07 +09002682 * @host: target ATA host
2683 *
2684 * Acquire PCI BMDMA resources and initialize @host accordingly.
2685 *
2686 * LOCKING:
2687 * Inherited from calling layer (may sleep).
2688 *
2689 * RETURNS:
2690 * 0 on success, -errno otherwise.
2691 */
Tejun Heo9363c382008-04-07 22:47:16 +09002692int ata_pci_bmdma_init(struct ata_host *host)
Jeff Garzik1fdffbc2006-02-09 05:15:27 -05002693{
Tejun Heo0f834de2007-04-17 23:44:07 +09002694 struct device *gdev = host->dev;
2695 struct pci_dev *pdev = to_pci_dev(gdev);
2696 int i, rc;
Jeff Garzik1fdffbc2006-02-09 05:15:27 -05002697
Alan Cox6fdc99a2007-07-26 18:41:30 +01002698 /* No BAR4 allocation: No DMA */
2699 if (pci_resource_start(pdev, 4) == 0)
2700 return 0;
2701
Tejun Heo0f834de2007-04-17 23:44:07 +09002702 /* TODO: If we get no DMA mask we should fall back to PIO */
2703 rc = pci_set_dma_mask(pdev, ATA_DMA_MASK);
2704 if (rc)
2705 return rc;
2706 rc = pci_set_consistent_dma_mask(pdev, ATA_DMA_MASK);
2707 if (rc)
2708 return rc;
2709
2710 /* request and iomap DMA region */
Tejun Heo35a10a82008-01-04 18:42:21 +09002711 rc = pcim_iomap_regions(pdev, 1 << 4, dev_driver_string(gdev));
Tejun Heo0f834de2007-04-17 23:44:07 +09002712 if (rc) {
2713 dev_printk(KERN_ERR, gdev, "failed to request/iomap BAR4\n");
2714 return -ENOMEM;
2715 }
2716 host->iomap = pcim_iomap_table(pdev);
2717
Tejun Heo1626aeb2007-05-04 12:43:58 +02002718 for (i = 0; i < 2; i++) {
Tejun Heo0f834de2007-04-17 23:44:07 +09002719 struct ata_port *ap = host->ports[i];
Tejun Heo0f834de2007-04-17 23:44:07 +09002720 void __iomem *bmdma = host->iomap[4] + 8 * i;
2721
2722 if (ata_port_is_dummy(ap))
2723 continue;
2724
Tejun Heo21b0ad42007-04-17 23:44:07 +09002725 ap->ioaddr.bmdma_addr = bmdma;
Tejun Heo0f834de2007-04-17 23:44:07 +09002726 if ((!(ap->flags & ATA_FLAG_IGN_SIMPLEX)) &&
2727 (ioread8(bmdma + 2) & 0x80))
2728 host->flags |= ATA_HOST_SIMPLEX;
Tejun Heocbcdd872007-08-18 13:14:55 +09002729
2730 ata_port_desc(ap, "bmdma 0x%llx",
Alan Cox0fe40ff2009-01-05 14:16:13 +00002731 (unsigned long long)pci_resource_start(pdev, 4) + 8 * i);
Tejun Heo0d5ff562007-02-01 15:06:36 +09002732 }
2733
Tejun Heo0f834de2007-04-17 23:44:07 +09002734 return 0;
Jeff Garzik1fdffbc2006-02-09 05:15:27 -05002735}
Alan Cox0fe40ff2009-01-05 14:16:13 +00002736EXPORT_SYMBOL_GPL(ata_pci_bmdma_init);
Jeff Garzik1fdffbc2006-02-09 05:15:27 -05002737
Tejun Heo272f7882008-03-25 22:16:40 +09002738static int ata_resources_present(struct pci_dev *pdev, int port)
2739{
2740 int i;
2741
2742 /* Check the PCI resources for this channel are enabled */
2743 port = port * 2;
Alan Cox0fe40ff2009-01-05 14:16:13 +00002744 for (i = 0; i < 2; i++) {
Tejun Heo272f7882008-03-25 22:16:40 +09002745 if (pci_resource_start(pdev, port + i) == 0 ||
2746 pci_resource_len(pdev, port + i) == 0)
2747 return 0;
2748 }
2749 return 1;
2750}
2751
Tejun Heod491b272007-04-17 23:44:07 +09002752/**
Tejun Heo9363c382008-04-07 22:47:16 +09002753 * ata_pci_sff_init_host - acquire native PCI ATA resources and init host
Tejun Heod491b272007-04-17 23:44:07 +09002754 * @host: target ATA host
Tejun Heod491b272007-04-17 23:44:07 +09002755 *
Tejun Heo1626aeb2007-05-04 12:43:58 +02002756 * Acquire native PCI ATA resources for @host and initialize the
2757 * first two ports of @host accordingly. Ports marked dummy are
2758 * skipped and allocation failure makes the port dummy.
Tejun Heod491b272007-04-17 23:44:07 +09002759 *
Tejun Heod583bc12007-07-04 18:02:07 +09002760 * Note that native PCI resources are valid even for legacy hosts
2761 * as we fix up pdev resources array early in boot, so this
2762 * function can be used for both native and legacy SFF hosts.
2763 *
Tejun Heod491b272007-04-17 23:44:07 +09002764 * LOCKING:
2765 * Inherited from calling layer (may sleep).
2766 *
2767 * RETURNS:
Tejun Heo1626aeb2007-05-04 12:43:58 +02002768 * 0 if at least one port is initialized, -ENODEV if no port is
2769 * available.
Tejun Heod491b272007-04-17 23:44:07 +09002770 */
Tejun Heo9363c382008-04-07 22:47:16 +09002771int ata_pci_sff_init_host(struct ata_host *host)
Tejun Heod491b272007-04-17 23:44:07 +09002772{
2773 struct device *gdev = host->dev;
2774 struct pci_dev *pdev = to_pci_dev(gdev);
Tejun Heo1626aeb2007-05-04 12:43:58 +02002775 unsigned int mask = 0;
Tejun Heod491b272007-04-17 23:44:07 +09002776 int i, rc;
2777
Tejun Heod491b272007-04-17 23:44:07 +09002778 /* request, iomap BARs and init port addresses accordingly */
2779 for (i = 0; i < 2; i++) {
2780 struct ata_port *ap = host->ports[i];
2781 int base = i * 2;
2782 void __iomem * const *iomap;
2783
Tejun Heo1626aeb2007-05-04 12:43:58 +02002784 if (ata_port_is_dummy(ap))
Tejun Heod491b272007-04-17 23:44:07 +09002785 continue;
2786
Tejun Heo1626aeb2007-05-04 12:43:58 +02002787 /* Discard disabled ports. Some controllers show
2788 * their unused channels this way. Disabled ports are
2789 * made dummy.
2790 */
2791 if (!ata_resources_present(pdev, i)) {
2792 ap->ops = &ata_dummy_port_ops;
2793 continue;
2794 }
2795
Tejun Heo35a10a82008-01-04 18:42:21 +09002796 rc = pcim_iomap_regions(pdev, 0x3 << base,
2797 dev_driver_string(gdev));
Tejun Heod491b272007-04-17 23:44:07 +09002798 if (rc) {
Tejun Heo1626aeb2007-05-04 12:43:58 +02002799 dev_printk(KERN_WARNING, gdev,
2800 "failed to request/iomap BARs for port %d "
2801 "(errno=%d)\n", i, rc);
Tejun Heod491b272007-04-17 23:44:07 +09002802 if (rc == -EBUSY)
2803 pcim_pin_device(pdev);
Tejun Heo1626aeb2007-05-04 12:43:58 +02002804 ap->ops = &ata_dummy_port_ops;
2805 continue;
Tejun Heod491b272007-04-17 23:44:07 +09002806 }
2807 host->iomap = iomap = pcim_iomap_table(pdev);
2808
2809 ap->ioaddr.cmd_addr = iomap[base];
2810 ap->ioaddr.altstatus_addr =
2811 ap->ioaddr.ctl_addr = (void __iomem *)
2812 ((unsigned long)iomap[base + 1] | ATA_PCI_CTL_OFS);
Tejun Heo9363c382008-04-07 22:47:16 +09002813 ata_sff_std_ports(&ap->ioaddr);
Tejun Heo1626aeb2007-05-04 12:43:58 +02002814
Tejun Heocbcdd872007-08-18 13:14:55 +09002815 ata_port_desc(ap, "cmd 0x%llx ctl 0x%llx",
2816 (unsigned long long)pci_resource_start(pdev, base),
2817 (unsigned long long)pci_resource_start(pdev, base + 1));
2818
Tejun Heo1626aeb2007-05-04 12:43:58 +02002819 mask |= 1 << i;
2820 }
2821
2822 if (!mask) {
2823 dev_printk(KERN_ERR, gdev, "no available native port\n");
2824 return -ENODEV;
Tejun Heod491b272007-04-17 23:44:07 +09002825 }
2826
2827 return 0;
2828}
Alan Cox0fe40ff2009-01-05 14:16:13 +00002829EXPORT_SYMBOL_GPL(ata_pci_sff_init_host);
Tejun Heod491b272007-04-17 23:44:07 +09002830
Tejun Heo21b0ad42007-04-17 23:44:07 +09002831/**
Tejun Heo9363c382008-04-07 22:47:16 +09002832 * ata_pci_sff_prepare_host - helper to prepare native PCI ATA host
Tejun Heo21b0ad42007-04-17 23:44:07 +09002833 * @pdev: target PCI device
Tejun Heo1626aeb2007-05-04 12:43:58 +02002834 * @ppi: array of port_info, must be enough for two ports
Tejun Heo21b0ad42007-04-17 23:44:07 +09002835 * @r_host: out argument for the initialized ATA host
2836 *
2837 * Helper to allocate ATA host for @pdev, acquire all native PCI
2838 * resources and initialize it accordingly in one go.
2839 *
2840 * LOCKING:
2841 * Inherited from calling layer (may sleep).
2842 *
2843 * RETURNS:
2844 * 0 on success, -errno otherwise.
2845 */
Tejun Heo9363c382008-04-07 22:47:16 +09002846int ata_pci_sff_prepare_host(struct pci_dev *pdev,
Alan Cox0fe40ff2009-01-05 14:16:13 +00002847 const struct ata_port_info * const *ppi,
Tejun Heod583bc12007-07-04 18:02:07 +09002848 struct ata_host **r_host)
Tejun Heo21b0ad42007-04-17 23:44:07 +09002849{
2850 struct ata_host *host;
Tejun Heo21b0ad42007-04-17 23:44:07 +09002851 int rc;
2852
2853 if (!devres_open_group(&pdev->dev, NULL, GFP_KERNEL))
2854 return -ENOMEM;
2855
2856 host = ata_host_alloc_pinfo(&pdev->dev, ppi, 2);
2857 if (!host) {
2858 dev_printk(KERN_ERR, &pdev->dev,
2859 "failed to allocate ATA host\n");
2860 rc = -ENOMEM;
2861 goto err_out;
2862 }
2863
Tejun Heo9363c382008-04-07 22:47:16 +09002864 rc = ata_pci_sff_init_host(host);
Tejun Heo21b0ad42007-04-17 23:44:07 +09002865 if (rc)
2866 goto err_out;
2867
2868 /* init DMA related stuff */
Tejun Heo9363c382008-04-07 22:47:16 +09002869 rc = ata_pci_bmdma_init(host);
Tejun Heo21b0ad42007-04-17 23:44:07 +09002870 if (rc)
2871 goto err_bmdma;
2872
2873 devres_remove_group(&pdev->dev, NULL);
2874 *r_host = host;
2875 return 0;
2876
Alan Cox0fe40ff2009-01-05 14:16:13 +00002877err_bmdma:
Tejun Heo21b0ad42007-04-17 23:44:07 +09002878 /* This is necessary because PCI and iomap resources are
2879 * merged and releasing the top group won't release the
2880 * acquired resources if some of those have been acquired
2881 * before entering this function.
2882 */
2883 pcim_iounmap_regions(pdev, 0xf);
Alan Cox0fe40ff2009-01-05 14:16:13 +00002884err_out:
Tejun Heo21b0ad42007-04-17 23:44:07 +09002885 devres_release_group(&pdev->dev, NULL);
2886 return rc;
2887}
Alan Cox0fe40ff2009-01-05 14:16:13 +00002888EXPORT_SYMBOL_GPL(ata_pci_sff_prepare_host);
Tejun Heo21b0ad42007-04-17 23:44:07 +09002889
Jeff Garzik1fdffbc2006-02-09 05:15:27 -05002890/**
Tejun Heo9363c382008-04-07 22:47:16 +09002891 * ata_pci_sff_activate_host - start SFF host, request IRQ and register it
Tejun Heo4e6b79f2008-01-18 18:36:28 +09002892 * @host: target SFF ATA host
2893 * @irq_handler: irq_handler used when requesting IRQ(s)
2894 * @sht: scsi_host_template to use when registering the host
2895 *
2896 * This is the counterpart of ata_host_activate() for SFF ATA
2897 * hosts. This separate helper is necessary because SFF hosts
2898 * use two separate interrupts in legacy mode.
2899 *
2900 * LOCKING:
2901 * Inherited from calling layer (may sleep).
2902 *
2903 * RETURNS:
2904 * 0 on success, -errno otherwise.
2905 */
Tejun Heo9363c382008-04-07 22:47:16 +09002906int ata_pci_sff_activate_host(struct ata_host *host,
Tejun Heo4e6b79f2008-01-18 18:36:28 +09002907 irq_handler_t irq_handler,
2908 struct scsi_host_template *sht)
2909{
2910 struct device *dev = host->dev;
2911 struct pci_dev *pdev = to_pci_dev(dev);
2912 const char *drv_name = dev_driver_string(host->dev);
2913 int legacy_mode = 0, rc;
2914
2915 rc = ata_host_start(host);
2916 if (rc)
2917 return rc;
2918
2919 if ((pdev->class >> 8) == PCI_CLASS_STORAGE_IDE) {
2920 u8 tmp8, mask;
2921
2922 /* TODO: What if one channel is in native mode ... */
2923 pci_read_config_byte(pdev, PCI_CLASS_PROG, &tmp8);
2924 mask = (1 << 2) | (1 << 0);
2925 if ((tmp8 & mask) != mask)
2926 legacy_mode = 1;
2927#if defined(CONFIG_NO_ATA_LEGACY)
2928 /* Some platforms with PCI limits cannot address compat
2929 port space. In that case we punt if their firmware has
2930 left a device in compatibility mode */
2931 if (legacy_mode) {
2932 printk(KERN_ERR "ata: Compatibility mode ATA is not supported on this platform, skipping.\n");
2933 return -EOPNOTSUPP;
2934 }
2935#endif
2936 }
2937
2938 if (!devres_open_group(dev, NULL, GFP_KERNEL))
2939 return -ENOMEM;
2940
2941 if (!legacy_mode && pdev->irq) {
2942 rc = devm_request_irq(dev, pdev->irq, irq_handler,
2943 IRQF_SHARED, drv_name, host);
2944 if (rc)
2945 goto out;
2946
2947 ata_port_desc(host->ports[0], "irq %d", pdev->irq);
2948 ata_port_desc(host->ports[1], "irq %d", pdev->irq);
2949 } else if (legacy_mode) {
2950 if (!ata_port_is_dummy(host->ports[0])) {
2951 rc = devm_request_irq(dev, ATA_PRIMARY_IRQ(pdev),
2952 irq_handler, IRQF_SHARED,
2953 drv_name, host);
2954 if (rc)
2955 goto out;
2956
2957 ata_port_desc(host->ports[0], "irq %d",
2958 ATA_PRIMARY_IRQ(pdev));
2959 }
2960
2961 if (!ata_port_is_dummy(host->ports[1])) {
2962 rc = devm_request_irq(dev, ATA_SECONDARY_IRQ(pdev),
2963 irq_handler, IRQF_SHARED,
2964 drv_name, host);
2965 if (rc)
2966 goto out;
2967
2968 ata_port_desc(host->ports[1], "irq %d",
2969 ATA_SECONDARY_IRQ(pdev));
2970 }
2971 }
2972
2973 rc = ata_host_register(host, sht);
Alan Cox0fe40ff2009-01-05 14:16:13 +00002974out:
Tejun Heo4e6b79f2008-01-18 18:36:28 +09002975 if (rc == 0)
2976 devres_remove_group(dev, NULL);
2977 else
2978 devres_release_group(dev, NULL);
2979
2980 return rc;
2981}
Alan Cox0fe40ff2009-01-05 14:16:13 +00002982EXPORT_SYMBOL_GPL(ata_pci_sff_activate_host);
Tejun Heo4e6b79f2008-01-18 18:36:28 +09002983
2984/**
Tejun Heo9363c382008-04-07 22:47:16 +09002985 * ata_pci_sff_init_one - Initialize/register PCI IDE host controller
Jeff Garzik1fdffbc2006-02-09 05:15:27 -05002986 * @pdev: Controller to be initialized
Tejun Heo1626aeb2007-05-04 12:43:58 +02002987 * @ppi: array of port_info, must be enough for two ports
Tejun Heo1bd5b712008-03-25 12:22:49 +09002988 * @sht: scsi_host_template to use when registering the host
Tejun Heo887125e2008-03-25 12:22:49 +09002989 * @host_priv: host private_data
Alan Cox16ea0fc2010-02-23 02:26:06 -05002990 * @hflag: host flags
Jeff Garzik1fdffbc2006-02-09 05:15:27 -05002991 *
2992 * This is a helper function which can be called from a driver's
2993 * xxx_init_one() probe function if the hardware uses traditional
2994 * IDE taskfile registers.
2995 *
2996 * This function calls pci_enable_device(), reserves its register
2997 * regions, sets the dma mask, enables bus master mode, and calls
2998 * ata_device_add()
2999 *
Alan Cox2ec7df02006-08-10 16:59:10 +09003000 * ASSUMPTION:
3001 * Nobody makes a single channel controller that appears solely as
3002 * the secondary legacy port on PCI.
3003 *
Jeff Garzik1fdffbc2006-02-09 05:15:27 -05003004 * LOCKING:
3005 * Inherited from PCI layer (may sleep).
3006 *
3007 * RETURNS:
3008 * Zero on success, negative on errno-based value on error.
3009 */
Tejun Heo9363c382008-04-07 22:47:16 +09003010int ata_pci_sff_init_one(struct pci_dev *pdev,
Alan Cox16ea0fc2010-02-23 02:26:06 -05003011 const struct ata_port_info * const *ppi,
3012 struct scsi_host_template *sht, void *host_priv, int hflag)
Jeff Garzik1fdffbc2006-02-09 05:15:27 -05003013{
Tejun Heof0d36ef2007-01-20 16:00:28 +09003014 struct device *dev = &pdev->dev;
Tejun Heo1626aeb2007-05-04 12:43:58 +02003015 const struct ata_port_info *pi = NULL;
Tejun Heo0f834de2007-04-17 23:44:07 +09003016 struct ata_host *host = NULL;
Tejun Heo1626aeb2007-05-04 12:43:58 +02003017 int i, rc;
Jeff Garzik1fdffbc2006-02-09 05:15:27 -05003018
3019 DPRINTK("ENTER\n");
3020
Tejun Heo1626aeb2007-05-04 12:43:58 +02003021 /* look up the first valid port_info */
3022 for (i = 0; i < 2 && ppi[i]; i++) {
3023 if (ppi[i]->port_ops != &ata_dummy_port_ops) {
3024 pi = ppi[i];
3025 break;
3026 }
3027 }
3028
3029 if (!pi) {
3030 dev_printk(KERN_ERR, &pdev->dev,
3031 "no valid port_info specified\n");
3032 return -EINVAL;
3033 }
3034
Tejun Heof0d36ef2007-01-20 16:00:28 +09003035 if (!devres_open_group(dev, NULL, GFP_KERNEL))
3036 return -ENOMEM;
3037
Tejun Heof0d36ef2007-01-20 16:00:28 +09003038 rc = pcim_enable_device(pdev);
Jeff Garzik1fdffbc2006-02-09 05:15:27 -05003039 if (rc)
Tejun Heo4e6b79f2008-01-18 18:36:28 +09003040 goto out;
Jeff Garzik1fdffbc2006-02-09 05:15:27 -05003041
Tejun Heo4e6b79f2008-01-18 18:36:28 +09003042 /* prepare and activate SFF host */
Tejun Heo9363c382008-04-07 22:47:16 +09003043 rc = ata_pci_sff_prepare_host(pdev, ppi, &host);
Tejun Heod583bc12007-07-04 18:02:07 +09003044 if (rc)
Tejun Heo4e6b79f2008-01-18 18:36:28 +09003045 goto out;
Tejun Heo887125e2008-03-25 12:22:49 +09003046 host->private_data = host_priv;
Alan Cox16ea0fc2010-02-23 02:26:06 -05003047 host->flags |= hflag;
Tejun Heod491b272007-04-17 23:44:07 +09003048
Tejun Heod491b272007-04-17 23:44:07 +09003049 pci_set_master(pdev);
Tejun Heo9363c382008-04-07 22:47:16 +09003050 rc = ata_pci_sff_activate_host(host, ata_sff_interrupt, sht);
Alan Cox0fe40ff2009-01-05 14:16:13 +00003051out:
Tejun Heo4e6b79f2008-01-18 18:36:28 +09003052 if (rc == 0)
3053 devres_remove_group(&pdev->dev, NULL);
3054 else
3055 devres_release_group(&pdev->dev, NULL);
Tejun Heod491b272007-04-17 23:44:07 +09003056
Jeff Garzik1fdffbc2006-02-09 05:15:27 -05003057 return rc;
3058}
Tejun Heo9363c382008-04-07 22:47:16 +09003059EXPORT_SYMBOL_GPL(ata_pci_sff_init_one);
Alan Cox0fe40ff2009-01-05 14:16:13 +00003060
Tejun Heo624d5c52008-03-25 22:16:41 +09003061#endif /* CONFIG_PCI */