blob: e6308f420a5c0c9d9c8c59597a6041ea568facbd [file] [log] [blame]
Kalle Valo5e3dd152013-06-12 20:52:10 +03001/*
2 * Copyright (c) 2005-2011 Atheros Communications Inc.
3 * Copyright (c) 2011-2013 Qualcomm Atheros, Inc.
4 *
5 * Permission to use, copy, modify, and/or distribute this software for any
6 * purpose with or without fee is hereby granted, provided that the above
7 * copyright notice and this permission notice appear in all copies.
8 *
9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
10 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
11 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
12 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
13 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
14 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
15 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
16 */
17
18#ifndef _CORE_H_
19#define _CORE_H_
20
21#include <linux/completion.h>
22#include <linux/if_ether.h>
23#include <linux/types.h>
24#include <linux/pci.h>
25
Michal Kazioredb82362013-07-05 16:15:14 +030026#include "htt.h"
Kalle Valo5e3dd152013-06-12 20:52:10 +030027#include "htc.h"
28#include "hw.h"
29#include "targaddrs.h"
30#include "wmi.h"
31#include "../ath.h"
32#include "../regd.h"
Janusz Dziedzic9702c682013-11-20 09:59:41 +020033#include "../dfs_pattern_detector.h"
Kalle Valo5e3dd152013-06-12 20:52:10 +030034
35#define MS(_v, _f) (((_v) & _f##_MASK) >> _f##_LSB)
36#define SM(_v, _f) (((_v) << _f##_LSB) & _f##_MASK)
37#define WO(_f) ((_f##_OFFSET) >> 2)
38
39#define ATH10K_SCAN_ID 0
40#define WMI_READY_TIMEOUT (5 * HZ)
41#define ATH10K_FLUSH_TIMEOUT_HZ (5*HZ)
Michal Kazior2e1dea42013-07-31 10:32:40 +020042#define ATH10K_NUM_CHANS 38
Kalle Valo5e3dd152013-06-12 20:52:10 +030043
44/* Antenna noise floor */
45#define ATH10K_DEFAULT_NOISE_FLOOR -95
46
Bartosz Markowski71098612013-11-14 09:01:15 +010047#define ATH10K_MAX_NUM_MGMT_PENDING 128
Bartosz Markowski5e00d312013-09-26 17:47:12 +020048
Kalle Valo5a13e762014-01-20 11:01:46 +020049/* number of failed packets */
50#define ATH10K_KICKOUT_THRESHOLD 50
51
52/*
53 * Use insanely high numbers to make sure that the firmware implementation
54 * won't start, we have the same functionality already in hostapd. Unit
55 * is seconds.
56 */
57#define ATH10K_KEEPALIVE_MIN_IDLE 3747
58#define ATH10K_KEEPALIVE_MAX_IDLE 3895
59#define ATH10K_KEEPALIVE_MAX_UNRESPONSIVE 3900
60
Kalle Valo5e3dd152013-06-12 20:52:10 +030061struct ath10k;
62
Kalle Valo5e3dd152013-06-12 20:52:10 +030063struct ath10k_skb_cb {
64 dma_addr_t paddr;
65 bool is_mapped;
66 bool is_aborted;
Bartosz Markowski5e00d312013-09-26 17:47:12 +020067 u8 vdev_id;
Kalle Valo5e3dd152013-06-12 20:52:10 +030068
69 struct {
Kalle Valo5e3dd152013-06-12 20:52:10 +030070 u8 tid;
71 bool is_offchan;
Michal Kazior1f8bb152013-09-18 14:43:22 +020072
73 u8 frag_len;
74 u8 pad_len;
Kalle Valo5e3dd152013-06-12 20:52:10 +030075 } __packed htt;
Kalle Valo5e3dd152013-06-12 20:52:10 +030076} __packed;
77
78static inline struct ath10k_skb_cb *ATH10K_SKB_CB(struct sk_buff *skb)
79{
80 BUILD_BUG_ON(sizeof(struct ath10k_skb_cb) >
81 IEEE80211_TX_INFO_DRIVER_DATA_SIZE);
82 return (struct ath10k_skb_cb *)&IEEE80211_SKB_CB(skb)->driver_data;
83}
84
85static inline int ath10k_skb_map(struct device *dev, struct sk_buff *skb)
86{
87 if (ATH10K_SKB_CB(skb)->is_mapped)
88 return -EINVAL;
89
90 ATH10K_SKB_CB(skb)->paddr = dma_map_single(dev, skb->data, skb->len,
91 DMA_TO_DEVICE);
92
93 if (unlikely(dma_mapping_error(dev, ATH10K_SKB_CB(skb)->paddr)))
94 return -EIO;
95
96 ATH10K_SKB_CB(skb)->is_mapped = true;
97 return 0;
98}
99
100static inline int ath10k_skb_unmap(struct device *dev, struct sk_buff *skb)
101{
102 if (!ATH10K_SKB_CB(skb)->is_mapped)
103 return -EINVAL;
104
105 dma_unmap_single(dev, ATH10K_SKB_CB(skb)->paddr, skb->len,
106 DMA_TO_DEVICE);
107 ATH10K_SKB_CB(skb)->is_mapped = false;
108 return 0;
109}
110
111static inline u32 host_interest_item_address(u32 item_offset)
112{
113 return QCA988X_HOST_INTEREST_ADDRESS + item_offset;
114}
115
116struct ath10k_bmi {
117 bool done_sent;
118};
119
Bartosz Markowskib3effe62013-09-26 17:47:11 +0200120#define ATH10K_MAX_MEM_REQS 16
121
122struct ath10k_mem_chunk {
123 void *vaddr;
124 dma_addr_t paddr;
125 u32 len;
126 u32 req_id;
127};
128
Kalle Valo5e3dd152013-06-12 20:52:10 +0300129struct ath10k_wmi {
130 enum ath10k_htc_ep_id eid;
131 struct completion service_ready;
132 struct completion unified_ready;
Michal Kaziorbe8b3942013-09-13 14:16:54 +0200133 wait_queue_head_t tx_credits_wq;
Bartosz Markowskice428702013-09-26 17:47:05 +0200134 struct wmi_cmd_map *cmd;
Bartosz Markowski6d1506e2013-09-26 17:47:15 +0200135 struct wmi_vdev_param_map *vdev_param;
Bartosz Markowski226a3392013-09-26 17:47:16 +0200136 struct wmi_pdev_param_map *pdev_param;
Bartosz Markowskib3effe62013-09-26 17:47:11 +0200137
138 u32 num_mem_chunks;
139 struct ath10k_mem_chunk mem_chunks[ATH10K_MAX_MEM_REQS];
Kalle Valo5e3dd152013-06-12 20:52:10 +0300140};
141
142struct ath10k_peer_stat {
143 u8 peer_macaddr[ETH_ALEN];
144 u32 peer_rssi;
145 u32 peer_tx_rate;
146};
147
148struct ath10k_target_stats {
149 /* PDEV stats */
150 s32 ch_noise_floor;
151 u32 tx_frame_count;
152 u32 rx_frame_count;
153 u32 rx_clear_count;
154 u32 cycle_count;
155 u32 phy_err_count;
156 u32 chan_tx_power;
157
158 /* PDEV TX stats */
159 s32 comp_queued;
160 s32 comp_delivered;
161 s32 msdu_enqued;
162 s32 mpdu_enqued;
163 s32 wmm_drop;
164 s32 local_enqued;
165 s32 local_freed;
166 s32 hw_queued;
167 s32 hw_reaped;
168 s32 underrun;
169 s32 tx_abort;
170 s32 mpdus_requed;
171 u32 tx_ko;
172 u32 data_rc;
173 u32 self_triggers;
174 u32 sw_retry_failure;
175 u32 illgl_rate_phy_err;
176 u32 pdev_cont_xretry;
177 u32 pdev_tx_timeout;
178 u32 pdev_resets;
179 u32 phy_underrun;
180 u32 txop_ovf;
181
182 /* PDEV RX stats */
183 s32 mid_ppdu_route_change;
184 s32 status_rcvd;
185 s32 r0_frags;
186 s32 r1_frags;
187 s32 r2_frags;
188 s32 r3_frags;
189 s32 htt_msdus;
190 s32 htt_mpdus;
191 s32 loc_msdus;
192 s32 loc_mpdus;
193 s32 oversize_amsdu;
194 s32 phy_errs;
195 s32 phy_err_drop;
196 s32 mpdu_errs;
197
198 /* VDEV STATS */
199
200 /* PEER STATS */
201 u8 peers;
202 struct ath10k_peer_stat peer_stat[TARGET_NUM_PEERS];
203
204 /* TODO: Beacon filter stats */
205
206};
207
Janusz Dziedzic9702c682013-11-20 09:59:41 +0200208struct ath10k_dfs_stats {
209 u32 phy_errors;
210 u32 pulses_total;
211 u32 pulses_detected;
212 u32 pulses_discarded;
213 u32 radar_detected;
214};
215
Kalle Valo5e3dd152013-06-12 20:52:10 +0300216#define ATH10K_MAX_NUM_PEER_IDS (1 << 11) /* htt rx_desc limit */
217
218struct ath10k_peer {
219 struct list_head list;
220 int vdev_id;
221 u8 addr[ETH_ALEN];
222 DECLARE_BITMAP(peer_ids, ATH10K_MAX_NUM_PEER_IDS);
223 struct ieee80211_key_conf *keys[WMI_MAX_KEY_INDEX + 1];
224};
225
226#define ATH10K_VDEV_SETUP_TIMEOUT_HZ (5*HZ)
227
228struct ath10k_vif {
Michal Kazior05791192013-10-16 15:44:45 +0300229 struct list_head list;
230
Kalle Valo5e3dd152013-06-12 20:52:10 +0300231 u32 vdev_id;
232 enum wmi_vdev_type vdev_type;
233 enum wmi_vdev_subtype vdev_subtype;
234 u32 beacon_interval;
235 u32 dtim_period;
Michal Kaziored543882013-09-13 14:16:56 +0200236 struct sk_buff *beacon;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300237
238 struct ath10k *ar;
239 struct ieee80211_vif *vif;
240
Michal Kaziorcc4827b2013-10-16 15:44:45 +0300241 struct work_struct wep_key_work;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300242 struct ieee80211_key_conf *wep_keys[WMI_MAX_KEY_INDEX + 1];
Michal Kaziorcc4827b2013-10-16 15:44:45 +0300243 u8 def_wep_key_idx;
244 u8 def_wep_key_newidx;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300245
246 u16 tx_seq_no;
247
248 union {
249 struct {
250 u8 bssid[ETH_ALEN];
251 u32 uapsd;
252 } sta;
253 struct {
254 /* 127 stations; wmi limit */
255 u8 tim_bitmap[16];
256 u8 tim_len;
257 u32 ssid_len;
258 u8 ssid[IEEE80211_MAX_SSID_LEN];
259 bool hidden_ssid;
260 /* P2P_IE with NoA attribute for P2P_GO case */
261 u32 noa_len;
262 u8 *noa_data;
263 } ap;
264 struct {
265 u8 bssid[ETH_ALEN];
266 } ibss;
267 } u;
Janusz Dziedzic51ab1a02014-01-08 09:08:33 +0100268
269 u8 fixed_rate;
270 u8 fixed_nss;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300271};
272
273struct ath10k_vif_iter {
274 u32 vdev_id;
275 struct ath10k_vif *arvif;
276};
277
278struct ath10k_debug {
279 struct dentry *debugfs_phy;
280
281 struct ath10k_target_stats target_stats;
282 u32 wmi_service_bitmap[WMI_SERVICE_BM_SIZE];
283
284 struct completion event_stats_compl;
Kalle Valoa3d135e2013-09-03 11:44:10 +0300285
286 unsigned long htt_stats_mask;
287 struct delayed_work htt_stats_dwork;
Janusz Dziedzic9702c682013-11-20 09:59:41 +0200288 struct ath10k_dfs_stats dfs_stats;
289 struct ath_dfs_pool_stats dfs_pool_stats;
Kalle Valof118a3e2014-01-03 12:59:31 +0200290
291 u32 fw_dbglog_mask;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300292};
293
Michal Kaziorf7843d72013-07-16 09:38:52 +0200294enum ath10k_state {
295 ATH10K_STATE_OFF = 0,
296 ATH10K_STATE_ON,
Michal Kazioraffd3212013-07-16 09:54:35 +0200297
298 /* When doing firmware recovery the device is first powered down.
299 * mac80211 is supposed to call in to start() hook later on. It is
300 * however possible that driver unloading and firmware crash overlap.
301 * mac80211 can wait on conf_mutex in stop() while the device is
302 * stopped in ath10k_core_restart() work holding conf_mutex. The state
303 * RESTARTED means that the device is up and mac80211 has started hw
304 * reconfiguration. Once mac80211 is done with the reconfiguration we
305 * set the state to STATE_ON in restart_complete(). */
306 ATH10K_STATE_RESTARTING,
307 ATH10K_STATE_RESTARTED,
308
309 /* The device has crashed while restarting hw. This state is like ON
310 * but commands are blocked in HTC and -ECOMM response is given. This
311 * prevents completion timeouts and makes the driver more responsive to
312 * userspace commands. This is also prevents recursive recovery. */
313 ATH10K_STATE_WEDGED,
Michal Kaziorf7843d72013-07-16 09:38:52 +0200314};
315
Michal Kazior0d9b0432013-08-09 10:13:33 +0200316enum ath10k_fw_features {
317 /* wmi_mgmt_rx_hdr contains extra RSSI information */
318 ATH10K_FW_FEATURE_EXT_WMI_MGMT_RX = 0,
319
Bartosz Markowskice428702013-09-26 17:47:05 +0200320 /* firmware from 10X branch */
321 ATH10K_FW_FEATURE_WMI_10X = 1,
322
Bartosz Markowski5e00d312013-09-26 17:47:12 +0200323 /* firmware support tx frame management over WMI, otherwise it's HTT */
324 ATH10K_FW_FEATURE_HAS_WMI_MGMT_TX = 2,
325
Bartosz Markowskid3541812013-12-10 16:20:40 +0100326 /* Firmware does not support P2P */
327 ATH10K_FW_FEATURE_NO_P2P = 3,
328
Michal Kazior0d9b0432013-08-09 10:13:33 +0200329 /* keep last */
330 ATH10K_FW_FEATURE_COUNT,
331};
332
Marek Puzyniake8a50f82013-11-20 09:59:47 +0200333enum ath10k_dev_flags {
334 /* Indicates that ath10k device is during CAC phase of DFS */
335 ATH10K_CAC_RUNNING,
Kalle Valo650b91f2013-11-20 10:00:49 +0200336 ATH10K_FLAG_FIRST_BOOT_DONE,
Marek Puzyniake8a50f82013-11-20 09:59:47 +0200337};
338
Kalle Valo5e3dd152013-06-12 20:52:10 +0300339struct ath10k {
340 struct ath_common ath_common;
341 struct ieee80211_hw *hw;
342 struct device *dev;
343 u8 mac_addr[ETH_ALEN];
344
Kalle Valoe01ae682013-09-01 11:22:14 +0300345 u32 chip_id;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300346 u32 target_version;
347 u8 fw_version_major;
348 u32 fw_version_minor;
349 u16 fw_version_release;
350 u16 fw_version_build;
351 u32 phy_capability;
352 u32 hw_min_tx_power;
353 u32 hw_max_tx_power;
354 u32 ht_cap_info;
355 u32 vht_cap_info;
Michal Kazior8865bee42013-07-24 12:36:46 +0200356 u32 num_rf_chains;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300357
Michal Kazior0d9b0432013-08-09 10:13:33 +0200358 DECLARE_BITMAP(fw_features, ATH10K_FW_FEATURE_COUNT);
359
Kalle Valo5e3dd152013-06-12 20:52:10 +0300360 struct targetdef *targetdef;
361 struct hostdef *hostdef;
362
363 bool p2p;
364
365 struct {
366 void *priv;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300367 const struct ath10k_hif_ops *ops;
368 } hif;
369
Kalle Valo5e3dd152013-06-12 20:52:10 +0300370 wait_queue_head_t event_queue;
371 bool is_target_paused;
372
373 struct ath10k_bmi bmi;
Michal Kazioredb82362013-07-05 16:15:14 +0300374 struct ath10k_wmi wmi;
Michal Kaziorcd003fa2013-07-05 16:15:13 +0300375 struct ath10k_htc htc;
Michal Kazioredb82362013-07-05 16:15:14 +0300376 struct ath10k_htt htt;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300377
378 struct ath10k_hw_params {
379 u32 id;
380 const char *name;
381 u32 patch_load_addr;
382
383 struct ath10k_hw_params_fw {
384 const char *dir;
385 const char *fw;
386 const char *otp;
387 const char *board;
388 } fw;
389 } hw_params;
390
Kalle Valo36527912013-09-27 19:54:55 +0300391 const struct firmware *board;
Kalle Valo958df3a2013-09-27 19:55:01 +0300392 const void *board_data;
393 size_t board_len;
394
Michal Kazior29385052013-07-16 09:38:58 +0200395 const struct firmware *otp;
Kalle Valo958df3a2013-09-27 19:55:01 +0300396 const void *otp_data;
397 size_t otp_len;
398
Michal Kazior29385052013-07-16 09:38:58 +0200399 const struct firmware *firmware;
Kalle Valo958df3a2013-09-27 19:55:01 +0300400 const void *firmware_data;
401 size_t firmware_len;
Michal Kazior29385052013-07-16 09:38:58 +0200402
Kalle Valo1a222432013-09-27 19:55:07 +0300403 int fw_api;
404
Kalle Valo5e3dd152013-06-12 20:52:10 +0300405 struct {
406 struct completion started;
407 struct completion completed;
408 struct completion on_channel;
409 struct timer_list timeout;
410 bool is_roc;
411 bool in_progress;
412 bool aborting;
413 int vdev_id;
414 int roc_freq;
415 } scan;
416
417 struct {
418 struct ieee80211_supported_band sbands[IEEE80211_NUM_BANDS];
419 } mac;
420
421 /* should never be NULL; needed for regular htt rx */
422 struct ieee80211_channel *rx_channel;
423
424 /* valid during scan; needed for mgmt rx during scan */
425 struct ieee80211_channel *scan_channel;
426
427 int free_vdev_map;
428 int monitor_vdev_id;
429 bool monitor_enabled;
430 bool monitor_present;
431 unsigned int filter_flags;
Marek Puzyniake8a50f82013-11-20 09:59:47 +0200432 unsigned long dev_flags;
Marek Puzyniak7d9b40b2013-11-20 10:00:28 +0200433 u32 dfs_block_radar_events;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300434
435 struct wmi_pdev_set_wmm_params_arg wmm_params;
436 struct completion install_key_done;
437
438 struct completion vdev_setup_done;
439
440 struct workqueue_struct *workqueue;
441
442 /* prevents concurrent FW reconfiguration */
443 struct mutex conf_mutex;
444
445 /* protects shared structure data */
446 spinlock_t data_lock;
447
Michal Kazior05791192013-10-16 15:44:45 +0300448 struct list_head arvifs;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300449 struct list_head peers;
450 wait_queue_head_t peer_mapping_wq;
451
Bartosz Markowski0e759f32014-01-02 14:38:33 +0100452 /* number of created peers; protected by data_lock */
453 int num_peers;
454
Kalle Valo5e3dd152013-06-12 20:52:10 +0300455 struct work_struct offchan_tx_work;
456 struct sk_buff_head offchan_tx_queue;
457 struct completion offchan_tx_completed;
458 struct sk_buff *offchan_tx_skb;
459
Bartosz Markowski5e00d312013-09-26 17:47:12 +0200460 struct work_struct wmi_mgmt_tx_work;
461 struct sk_buff_head wmi_mgmt_tx_queue;
462
Michal Kaziorf7843d72013-07-16 09:38:52 +0200463 enum ath10k_state state;
464
Michal Kazioraffd3212013-07-16 09:54:35 +0200465 struct work_struct restart_work;
466
Michal Kazior2e1dea42013-07-31 10:32:40 +0200467 /* cycle count is reported twice for each visited channel during scan.
468 * access protected by data_lock */
469 u32 survey_last_rx_clear_count;
470 u32 survey_last_cycle_count;
471 struct survey_info survey[ATH10K_NUM_CHANS];
472
Janusz Dziedzic9702c682013-11-20 09:59:41 +0200473 struct dfs_pattern_detector *dfs_detector;
474
Kalle Valo5e3dd152013-06-12 20:52:10 +0300475#ifdef CONFIG_ATH10K_DEBUGFS
476 struct ath10k_debug debug;
477#endif
478};
479
480struct ath10k *ath10k_core_create(void *hif_priv, struct device *dev,
Kalle Valo5e3dd152013-06-12 20:52:10 +0300481 const struct ath10k_hif_ops *hif_ops);
482void ath10k_core_destroy(struct ath10k *ar);
483
Michal Kaziordd30a362013-07-16 09:38:51 +0200484int ath10k_core_start(struct ath10k *ar);
485void ath10k_core_stop(struct ath10k *ar);
Kalle Valoe01ae682013-09-01 11:22:14 +0300486int ath10k_core_register(struct ath10k *ar, u32 chip_id);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300487void ath10k_core_unregister(struct ath10k *ar);
488
Kalle Valo5e3dd152013-06-12 20:52:10 +0300489#endif /* _CORE_H_ */