blob: 6165f2735b35c403e634c1e4ce44ddd357e14fa6 [file] [log] [blame]
Kalle Valo5e3dd152013-06-12 20:52:10 +03001/*
2 * Copyright (c) 2005-2011 Atheros Communications Inc.
3 * Copyright (c) 2011-2013 Qualcomm Atheros, Inc.
4 *
5 * Permission to use, copy, modify, and/or distribute this software for any
6 * purpose with or without fee is hereby granted, provided that the above
7 * copyright notice and this permission notice appear in all copies.
8 *
9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
10 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
11 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
12 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
13 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
14 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
15 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
16 */
17
18#include <linux/module.h>
19#include <linux/firmware.h>
Toshi Kikuchi5aabff02014-12-02 10:55:54 +020020#include <linux/of.h>
Kalle Valo5e3dd152013-06-12 20:52:10 +030021
22#include "core.h"
23#include "mac.h"
24#include "htc.h"
25#include "hif.h"
26#include "wmi.h"
27#include "bmi.h"
28#include "debug.h"
29#include "htt.h"
Kalle Valo43d2a302014-09-10 18:23:30 +030030#include "testmode.h"
Kalle Valo5e3dd152013-06-12 20:52:10 +030031
32unsigned int ath10k_debug_mask;
33static bool uart_print;
34static unsigned int ath10k_p2p;
Rajkumar Manoharan8868b122014-11-17 16:44:14 +020035static bool skip_otp;
36
Kalle Valo5e3dd152013-06-12 20:52:10 +030037module_param_named(debug_mask, ath10k_debug_mask, uint, 0644);
38module_param(uart_print, bool, 0644);
39module_param_named(p2p, ath10k_p2p, uint, 0644);
Rajkumar Manoharan8868b122014-11-17 16:44:14 +020040module_param(skip_otp, bool, 0644);
41
Kalle Valo5e3dd152013-06-12 20:52:10 +030042MODULE_PARM_DESC(debug_mask, "Debugging mask");
43MODULE_PARM_DESC(uart_print, "Uart target debugging");
44MODULE_PARM_DESC(p2p, "Enable ath10k P2P support");
Rajkumar Manoharan8868b122014-11-17 16:44:14 +020045MODULE_PARM_DESC(skip_otp, "Skip otp failure for calibration in testmode");
Kalle Valo5e3dd152013-06-12 20:52:10 +030046
47static const struct ath10k_hw_params ath10k_hw_params_list[] = {
48 {
Kalle Valo5e3dd152013-06-12 20:52:10 +030049 .id = QCA988X_HW_2_0_VERSION,
50 .name = "qca988x hw2.0",
51 .patch_load_addr = QCA988X_HW_2_0_PATCH_LOAD_ADDR,
52 .fw = {
53 .dir = QCA988X_HW_2_0_FW_DIR,
54 .fw = QCA988X_HW_2_0_FW_FILE,
55 .otp = QCA988X_HW_2_0_OTP_FILE,
56 .board = QCA988X_HW_2_0_BOARD_DATA_FILE,
57 },
58 },
59};
60
61static void ath10k_send_suspend_complete(struct ath10k *ar)
62{
Michal Kazior7aa7a722014-08-25 12:09:38 +020063 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot suspend complete\n");
Kalle Valo5e3dd152013-06-12 20:52:10 +030064
Marek Puzyniak9042e172014-02-10 17:14:23 +010065 complete(&ar->target_suspend);
Kalle Valo5e3dd152013-06-12 20:52:10 +030066}
67
Kalle Valo5e3dd152013-06-12 20:52:10 +030068static int ath10k_init_configure_target(struct ath10k *ar)
69{
70 u32 param_host;
71 int ret;
72
73 /* tell target which HTC version it is used*/
74 ret = ath10k_bmi_write32(ar, hi_app_host_interest,
75 HTC_PROTOCOL_VERSION);
76 if (ret) {
Michal Kazior7aa7a722014-08-25 12:09:38 +020077 ath10k_err(ar, "settings HTC version failed\n");
Kalle Valo5e3dd152013-06-12 20:52:10 +030078 return ret;
79 }
80
81 /* set the firmware mode to STA/IBSS/AP */
82 ret = ath10k_bmi_read32(ar, hi_option_flag, &param_host);
83 if (ret) {
Michal Kazior7aa7a722014-08-25 12:09:38 +020084 ath10k_err(ar, "setting firmware mode (1/2) failed\n");
Kalle Valo5e3dd152013-06-12 20:52:10 +030085 return ret;
86 }
87
88 /* TODO following parameters need to be re-visited. */
89 /* num_device */
90 param_host |= (1 << HI_OPTION_NUM_DEV_SHIFT);
91 /* Firmware mode */
92 /* FIXME: Why FW_MODE_AP ??.*/
93 param_host |= (HI_OPTION_FW_MODE_AP << HI_OPTION_FW_MODE_SHIFT);
94 /* mac_addr_method */
95 param_host |= (1 << HI_OPTION_MAC_ADDR_METHOD_SHIFT);
96 /* firmware_bridge */
97 param_host |= (0 << HI_OPTION_FW_BRIDGE_SHIFT);
98 /* fwsubmode */
99 param_host |= (0 << HI_OPTION_FW_SUBMODE_SHIFT);
100
101 ret = ath10k_bmi_write32(ar, hi_option_flag, param_host);
102 if (ret) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200103 ath10k_err(ar, "setting firmware mode (2/2) failed\n");
Kalle Valo5e3dd152013-06-12 20:52:10 +0300104 return ret;
105 }
106
107 /* We do all byte-swapping on the host */
108 ret = ath10k_bmi_write32(ar, hi_be, 0);
109 if (ret) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200110 ath10k_err(ar, "setting host CPU BE mode failed\n");
Kalle Valo5e3dd152013-06-12 20:52:10 +0300111 return ret;
112 }
113
114 /* FW descriptor/Data swap flags */
115 ret = ath10k_bmi_write32(ar, hi_fw_swap, 0);
116
117 if (ret) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200118 ath10k_err(ar, "setting FW data/desc swap flags failed\n");
Kalle Valo5e3dd152013-06-12 20:52:10 +0300119 return ret;
120 }
121
122 return 0;
123}
124
125static const struct firmware *ath10k_fetch_fw_file(struct ath10k *ar,
126 const char *dir,
127 const char *file)
128{
129 char filename[100];
130 const struct firmware *fw;
131 int ret;
132
133 if (file == NULL)
134 return ERR_PTR(-ENOENT);
135
136 if (dir == NULL)
137 dir = ".";
138
139 snprintf(filename, sizeof(filename), "%s/%s", dir, file);
140 ret = request_firmware(&fw, filename, ar->dev);
141 if (ret)
142 return ERR_PTR(ret);
143
144 return fw;
145}
146
Kalle Valoa58227e2014-10-13 09:40:59 +0300147static int ath10k_push_board_ext_data(struct ath10k *ar, const void *data,
148 size_t data_len)
Kalle Valo5e3dd152013-06-12 20:52:10 +0300149{
150 u32 board_data_size = QCA988X_BOARD_DATA_SZ;
151 u32 board_ext_data_size = QCA988X_BOARD_EXT_DATA_SZ;
152 u32 board_ext_data_addr;
153 int ret;
154
155 ret = ath10k_bmi_read32(ar, hi_board_ext_data, &board_ext_data_addr);
156 if (ret) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200157 ath10k_err(ar, "could not read board ext data addr (%d)\n",
158 ret);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300159 return ret;
160 }
161
Michal Kazior7aa7a722014-08-25 12:09:38 +0200162 ath10k_dbg(ar, ATH10K_DBG_BOOT,
Kalle Valoeffea962013-09-08 17:55:44 +0300163 "boot push board extended data addr 0x%x\n",
Kalle Valo5e3dd152013-06-12 20:52:10 +0300164 board_ext_data_addr);
165
166 if (board_ext_data_addr == 0)
167 return 0;
168
Kalle Valoa58227e2014-10-13 09:40:59 +0300169 if (data_len != (board_data_size + board_ext_data_size)) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200170 ath10k_err(ar, "invalid board (ext) data sizes %zu != %d+%d\n",
Kalle Valoa58227e2014-10-13 09:40:59 +0300171 data_len, board_data_size, board_ext_data_size);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300172 return -EINVAL;
173 }
174
175 ret = ath10k_bmi_write_memory(ar, board_ext_data_addr,
Kalle Valoa58227e2014-10-13 09:40:59 +0300176 data + board_data_size,
Kalle Valo5e3dd152013-06-12 20:52:10 +0300177 board_ext_data_size);
178 if (ret) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200179 ath10k_err(ar, "could not write board ext data (%d)\n", ret);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300180 return ret;
181 }
182
183 ret = ath10k_bmi_write32(ar, hi_board_ext_data_config,
184 (board_ext_data_size << 16) | 1);
185 if (ret) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200186 ath10k_err(ar, "could not write board ext data bit (%d)\n",
187 ret);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300188 return ret;
189 }
190
191 return 0;
192}
193
Kalle Valoa58227e2014-10-13 09:40:59 +0300194static int ath10k_download_board_data(struct ath10k *ar, const void *data,
195 size_t data_len)
Kalle Valo5e3dd152013-06-12 20:52:10 +0300196{
197 u32 board_data_size = QCA988X_BOARD_DATA_SZ;
198 u32 address;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300199 int ret;
200
Kalle Valoa58227e2014-10-13 09:40:59 +0300201 ret = ath10k_push_board_ext_data(ar, data, data_len);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300202 if (ret) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200203 ath10k_err(ar, "could not push board ext data (%d)\n", ret);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300204 goto exit;
205 }
206
207 ret = ath10k_bmi_read32(ar, hi_board_data, &address);
208 if (ret) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200209 ath10k_err(ar, "could not read board data addr (%d)\n", ret);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300210 goto exit;
211 }
212
Kalle Valoa58227e2014-10-13 09:40:59 +0300213 ret = ath10k_bmi_write_memory(ar, address, data,
Kalle Valo958df3a2013-09-27 19:55:01 +0300214 min_t(u32, board_data_size,
Kalle Valoa58227e2014-10-13 09:40:59 +0300215 data_len));
Kalle Valo5e3dd152013-06-12 20:52:10 +0300216 if (ret) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200217 ath10k_err(ar, "could not write board data (%d)\n", ret);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300218 goto exit;
219 }
220
221 ret = ath10k_bmi_write32(ar, hi_board_data_initialized, 1);
222 if (ret) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200223 ath10k_err(ar, "could not write board data bit (%d)\n", ret);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300224 goto exit;
225 }
226
227exit:
Kalle Valo5e3dd152013-06-12 20:52:10 +0300228 return ret;
229}
230
Kalle Valoa58227e2014-10-13 09:40:59 +0300231static int ath10k_download_cal_file(struct ath10k *ar)
232{
233 int ret;
234
235 if (!ar->cal_file)
236 return -ENOENT;
237
238 if (IS_ERR(ar->cal_file))
239 return PTR_ERR(ar->cal_file);
240
241 ret = ath10k_download_board_data(ar, ar->cal_file->data,
242 ar->cal_file->size);
243 if (ret) {
244 ath10k_err(ar, "failed to download cal_file data: %d\n", ret);
245 return ret;
246 }
247
248 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot cal file downloaded\n");
249
250 return 0;
251}
252
Toshi Kikuchi5aabff02014-12-02 10:55:54 +0200253static int ath10k_download_cal_dt(struct ath10k *ar)
254{
255 struct device_node *node;
256 int data_len;
257 void *data;
258 int ret;
259
260 node = ar->dev->of_node;
261 if (!node)
262 /* Device Tree is optional, don't print any warnings if
263 * there's no node for ath10k.
264 */
265 return -ENOENT;
266
267 if (!of_get_property(node, "qcom,ath10k-calibration-data",
268 &data_len)) {
269 /* The calibration data node is optional */
270 return -ENOENT;
271 }
272
273 if (data_len != QCA988X_CAL_DATA_LEN) {
274 ath10k_warn(ar, "invalid calibration data length in DT: %d\n",
275 data_len);
276 ret = -EMSGSIZE;
277 goto out;
278 }
279
280 data = kmalloc(data_len, GFP_KERNEL);
281 if (!data) {
282 ret = -ENOMEM;
283 goto out;
284 }
285
286 ret = of_property_read_u8_array(node, "qcom,ath10k-calibration-data",
287 data, data_len);
288 if (ret) {
289 ath10k_warn(ar, "failed to read calibration data from DT: %d\n",
290 ret);
291 goto out_free;
292 }
293
294 ret = ath10k_download_board_data(ar, data, data_len);
295 if (ret) {
296 ath10k_warn(ar, "failed to download calibration data from Device Tree: %d\n",
297 ret);
298 goto out_free;
299 }
300
301 ret = 0;
302
303out_free:
304 kfree(data);
305
306out:
307 return ret;
308}
309
Kalle Valo5e3dd152013-06-12 20:52:10 +0300310static int ath10k_download_and_run_otp(struct ath10k *ar)
311{
Kalle Valod6d4a582014-03-11 17:33:19 +0200312 u32 result, address = ar->hw_params.patch_load_addr;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300313 int ret;
314
Kalle Valoa58227e2014-10-13 09:40:59 +0300315 ret = ath10k_download_board_data(ar, ar->board_data, ar->board_len);
Kalle Valo83091552014-10-13 09:40:53 +0300316 if (ret) {
317 ath10k_err(ar, "failed to download board data: %d\n", ret);
318 return ret;
319 }
320
Kalle Valo5e3dd152013-06-12 20:52:10 +0300321 /* OTP is optional */
322
Kalle Valo7f06ea12014-03-11 17:33:28 +0200323 if (!ar->otp_data || !ar->otp_len) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200324 ath10k_warn(ar, "Not running otp, calibration will be incorrect (otp-data %p otp_len %zd)!\n",
Ben Greear36a8f412014-03-24 12:20:42 -0700325 ar->otp_data, ar->otp_len);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300326 return 0;
Kalle Valo7f06ea12014-03-11 17:33:28 +0200327 }
328
Michal Kazior7aa7a722014-08-25 12:09:38 +0200329 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot upload otp to 0x%x len %zd\n",
Kalle Valo7f06ea12014-03-11 17:33:28 +0200330 address, ar->otp_len);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300331
Kalle Valo958df3a2013-09-27 19:55:01 +0300332 ret = ath10k_bmi_fast_download(ar, address, ar->otp_data, ar->otp_len);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300333 if (ret) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200334 ath10k_err(ar, "could not write otp (%d)\n", ret);
Kalle Valo7f06ea12014-03-11 17:33:28 +0200335 return ret;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300336 }
337
Kalle Valod6d4a582014-03-11 17:33:19 +0200338 ret = ath10k_bmi_execute(ar, address, 0, &result);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300339 if (ret) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200340 ath10k_err(ar, "could not execute otp (%d)\n", ret);
Kalle Valo7f06ea12014-03-11 17:33:28 +0200341 return ret;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300342 }
343
Michal Kazior7aa7a722014-08-25 12:09:38 +0200344 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot otp execute result %d\n", result);
Kalle Valo7f06ea12014-03-11 17:33:28 +0200345
Rajkumar Manoharan8868b122014-11-17 16:44:14 +0200346 if (!skip_otp && result != 0) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200347 ath10k_err(ar, "otp calibration failed: %d", result);
Kalle Valo7f06ea12014-03-11 17:33:28 +0200348 return -EINVAL;
349 }
350
351 return 0;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300352}
353
Kalle Valo43d2a302014-09-10 18:23:30 +0300354static int ath10k_download_fw(struct ath10k *ar, enum ath10k_firmware_mode mode)
Kalle Valo5e3dd152013-06-12 20:52:10 +0300355{
Kalle Valo43d2a302014-09-10 18:23:30 +0300356 u32 address, data_len;
357 const char *mode_name;
358 const void *data;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300359 int ret;
360
Kalle Valo5e3dd152013-06-12 20:52:10 +0300361 address = ar->hw_params.patch_load_addr;
362
Kalle Valo43d2a302014-09-10 18:23:30 +0300363 switch (mode) {
364 case ATH10K_FIRMWARE_MODE_NORMAL:
365 data = ar->firmware_data;
366 data_len = ar->firmware_len;
367 mode_name = "normal";
368 break;
369 case ATH10K_FIRMWARE_MODE_UTF:
370 data = ar->testmode.utf->data;
371 data_len = ar->testmode.utf->size;
372 mode_name = "utf";
373 break;
374 default:
375 ath10k_err(ar, "unknown firmware mode: %d\n", mode);
376 return -EINVAL;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300377 }
378
Kalle Valo43d2a302014-09-10 18:23:30 +0300379 ath10k_dbg(ar, ATH10K_DBG_BOOT,
380 "boot uploading firmware image %p len %d mode %s\n",
381 data, data_len, mode_name);
382
383 ret = ath10k_bmi_fast_download(ar, address, data, data_len);
384 if (ret) {
385 ath10k_err(ar, "failed to download %s firmware: %d\n",
386 mode_name, ret);
387 return ret;
388 }
389
Michal Kazior29385052013-07-16 09:38:58 +0200390 return ret;
391}
392
393static void ath10k_core_free_firmware_files(struct ath10k *ar)
394{
Kalle Valo36527912013-09-27 19:54:55 +0300395 if (ar->board && !IS_ERR(ar->board))
396 release_firmware(ar->board);
Michal Kazior29385052013-07-16 09:38:58 +0200397
398 if (ar->otp && !IS_ERR(ar->otp))
399 release_firmware(ar->otp);
400
401 if (ar->firmware && !IS_ERR(ar->firmware))
402 release_firmware(ar->firmware);
403
Kalle Valoa58227e2014-10-13 09:40:59 +0300404 if (ar->cal_file && !IS_ERR(ar->cal_file))
405 release_firmware(ar->cal_file);
406
Kalle Valo36527912013-09-27 19:54:55 +0300407 ar->board = NULL;
Kalle Valo958df3a2013-09-27 19:55:01 +0300408 ar->board_data = NULL;
409 ar->board_len = 0;
410
Michal Kazior29385052013-07-16 09:38:58 +0200411 ar->otp = NULL;
Kalle Valo958df3a2013-09-27 19:55:01 +0300412 ar->otp_data = NULL;
413 ar->otp_len = 0;
414
Michal Kazior29385052013-07-16 09:38:58 +0200415 ar->firmware = NULL;
Kalle Valo958df3a2013-09-27 19:55:01 +0300416 ar->firmware_data = NULL;
417 ar->firmware_len = 0;
Kalle Valoa58227e2014-10-13 09:40:59 +0300418
419 ar->cal_file = NULL;
420}
421
422static int ath10k_fetch_cal_file(struct ath10k *ar)
423{
424 char filename[100];
425
426 /* cal-<bus>-<id>.bin */
427 scnprintf(filename, sizeof(filename), "cal-%s-%s.bin",
428 ath10k_bus_str(ar->hif.bus), dev_name(ar->dev));
429
430 ar->cal_file = ath10k_fetch_fw_file(ar, ATH10K_FW_DIR, filename);
431 if (IS_ERR(ar->cal_file))
432 /* calibration file is optional, don't print any warnings */
433 return PTR_ERR(ar->cal_file);
434
435 ath10k_dbg(ar, ATH10K_DBG_BOOT, "found calibration file %s/%s\n",
436 ATH10K_FW_DIR, filename);
437
438 return 0;
Michal Kazior29385052013-07-16 09:38:58 +0200439}
440
Kalle Valo1a222432013-09-27 19:55:07 +0300441static int ath10k_core_fetch_firmware_api_1(struct ath10k *ar)
Michal Kazior29385052013-07-16 09:38:58 +0200442{
443 int ret = 0;
444
445 if (ar->hw_params.fw.fw == NULL) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200446 ath10k_err(ar, "firmware file not defined\n");
Michal Kazior29385052013-07-16 09:38:58 +0200447 return -EINVAL;
448 }
449
450 if (ar->hw_params.fw.board == NULL) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200451 ath10k_err(ar, "board data file not defined");
Michal Kazior29385052013-07-16 09:38:58 +0200452 return -EINVAL;
453 }
454
Kalle Valo36527912013-09-27 19:54:55 +0300455 ar->board = ath10k_fetch_fw_file(ar,
456 ar->hw_params.fw.dir,
457 ar->hw_params.fw.board);
458 if (IS_ERR(ar->board)) {
459 ret = PTR_ERR(ar->board);
Michal Kazior7aa7a722014-08-25 12:09:38 +0200460 ath10k_err(ar, "could not fetch board data (%d)\n", ret);
Michal Kazior29385052013-07-16 09:38:58 +0200461 goto err;
462 }
463
Kalle Valo958df3a2013-09-27 19:55:01 +0300464 ar->board_data = ar->board->data;
465 ar->board_len = ar->board->size;
466
Michal Kazior29385052013-07-16 09:38:58 +0200467 ar->firmware = ath10k_fetch_fw_file(ar,
468 ar->hw_params.fw.dir,
469 ar->hw_params.fw.fw);
470 if (IS_ERR(ar->firmware)) {
471 ret = PTR_ERR(ar->firmware);
Michal Kazior7aa7a722014-08-25 12:09:38 +0200472 ath10k_err(ar, "could not fetch firmware (%d)\n", ret);
Michal Kazior29385052013-07-16 09:38:58 +0200473 goto err;
474 }
475
Kalle Valo958df3a2013-09-27 19:55:01 +0300476 ar->firmware_data = ar->firmware->data;
477 ar->firmware_len = ar->firmware->size;
478
Michal Kazior29385052013-07-16 09:38:58 +0200479 /* OTP may be undefined. If so, don't fetch it at all */
480 if (ar->hw_params.fw.otp == NULL)
481 return 0;
482
483 ar->otp = ath10k_fetch_fw_file(ar,
484 ar->hw_params.fw.dir,
485 ar->hw_params.fw.otp);
486 if (IS_ERR(ar->otp)) {
487 ret = PTR_ERR(ar->otp);
Michal Kazior7aa7a722014-08-25 12:09:38 +0200488 ath10k_err(ar, "could not fetch otp (%d)\n", ret);
Michal Kazior29385052013-07-16 09:38:58 +0200489 goto err;
490 }
491
Kalle Valo958df3a2013-09-27 19:55:01 +0300492 ar->otp_data = ar->otp->data;
493 ar->otp_len = ar->otp->size;
494
Michal Kazior29385052013-07-16 09:38:58 +0200495 return 0;
496
497err:
498 ath10k_core_free_firmware_files(ar);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300499 return ret;
500}
501
Kalle Valo1a222432013-09-27 19:55:07 +0300502static int ath10k_core_fetch_firmware_api_n(struct ath10k *ar, const char *name)
503{
504 size_t magic_len, len, ie_len;
505 int ie_id, i, index, bit, ret;
506 struct ath10k_fw_ie *hdr;
507 const u8 *data;
508 __le32 *timestamp;
509
510 /* first fetch the firmware file (firmware-*.bin) */
511 ar->firmware = ath10k_fetch_fw_file(ar, ar->hw_params.fw.dir, name);
512 if (IS_ERR(ar->firmware)) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200513 ath10k_err(ar, "could not fetch firmware file '%s/%s': %ld\n",
Ben Greear53c02282014-03-24 12:20:41 -0700514 ar->hw_params.fw.dir, name, PTR_ERR(ar->firmware));
Kalle Valo1a222432013-09-27 19:55:07 +0300515 return PTR_ERR(ar->firmware);
516 }
517
518 data = ar->firmware->data;
519 len = ar->firmware->size;
520
521 /* magic also includes the null byte, check that as well */
522 magic_len = strlen(ATH10K_FIRMWARE_MAGIC) + 1;
523
524 if (len < magic_len) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200525 ath10k_err(ar, "firmware file '%s/%s' too small to contain magic: %zu\n",
Ben Greear53c02282014-03-24 12:20:41 -0700526 ar->hw_params.fw.dir, name, len);
Michal Kazior9bab1cc2013-10-04 08:13:20 +0200527 ret = -EINVAL;
528 goto err;
Kalle Valo1a222432013-09-27 19:55:07 +0300529 }
530
531 if (memcmp(data, ATH10K_FIRMWARE_MAGIC, magic_len) != 0) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200532 ath10k_err(ar, "invalid firmware magic\n");
Michal Kazior9bab1cc2013-10-04 08:13:20 +0200533 ret = -EINVAL;
534 goto err;
Kalle Valo1a222432013-09-27 19:55:07 +0300535 }
536
537 /* jump over the padding */
538 magic_len = ALIGN(magic_len, 4);
539
540 len -= magic_len;
541 data += magic_len;
542
543 /* loop elements */
544 while (len > sizeof(struct ath10k_fw_ie)) {
545 hdr = (struct ath10k_fw_ie *)data;
546
547 ie_id = le32_to_cpu(hdr->id);
548 ie_len = le32_to_cpu(hdr->len);
549
550 len -= sizeof(*hdr);
551 data += sizeof(*hdr);
552
553 if (len < ie_len) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200554 ath10k_err(ar, "invalid length for FW IE %d (%zu < %zu)\n",
Kalle Valo1a222432013-09-27 19:55:07 +0300555 ie_id, len, ie_len);
Michal Kazior9bab1cc2013-10-04 08:13:20 +0200556 ret = -EINVAL;
557 goto err;
Kalle Valo1a222432013-09-27 19:55:07 +0300558 }
559
560 switch (ie_id) {
561 case ATH10K_FW_IE_FW_VERSION:
562 if (ie_len > sizeof(ar->hw->wiphy->fw_version) - 1)
563 break;
564
565 memcpy(ar->hw->wiphy->fw_version, data, ie_len);
566 ar->hw->wiphy->fw_version[ie_len] = '\0';
567
Michal Kazior7aa7a722014-08-25 12:09:38 +0200568 ath10k_dbg(ar, ATH10K_DBG_BOOT,
Kalle Valo1a222432013-09-27 19:55:07 +0300569 "found fw version %s\n",
570 ar->hw->wiphy->fw_version);
571 break;
572 case ATH10K_FW_IE_TIMESTAMP:
573 if (ie_len != sizeof(u32))
574 break;
575
576 timestamp = (__le32 *)data;
577
Michal Kazior7aa7a722014-08-25 12:09:38 +0200578 ath10k_dbg(ar, ATH10K_DBG_BOOT, "found fw timestamp %d\n",
Kalle Valo1a222432013-09-27 19:55:07 +0300579 le32_to_cpup(timestamp));
580 break;
581 case ATH10K_FW_IE_FEATURES:
Michal Kazior7aa7a722014-08-25 12:09:38 +0200582 ath10k_dbg(ar, ATH10K_DBG_BOOT,
Kalle Valo1a222432013-09-27 19:55:07 +0300583 "found firmware features ie (%zd B)\n",
584 ie_len);
585
586 for (i = 0; i < ATH10K_FW_FEATURE_COUNT; i++) {
587 index = i / 8;
588 bit = i % 8;
589
590 if (index == ie_len)
591 break;
592
Ben Greearf591a1a2014-02-04 19:51:38 +0200593 if (data[index] & (1 << bit)) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200594 ath10k_dbg(ar, ATH10K_DBG_BOOT,
Ben Greearf591a1a2014-02-04 19:51:38 +0200595 "Enabling feature bit: %i\n",
596 i);
Kalle Valo1a222432013-09-27 19:55:07 +0300597 __set_bit(i, ar->fw_features);
Ben Greearf591a1a2014-02-04 19:51:38 +0200598 }
Kalle Valo1a222432013-09-27 19:55:07 +0300599 }
600
Michal Kazior7aa7a722014-08-25 12:09:38 +0200601 ath10k_dbg_dump(ar, ATH10K_DBG_BOOT, "features", "",
Kalle Valo1a222432013-09-27 19:55:07 +0300602 ar->fw_features,
603 sizeof(ar->fw_features));
604 break;
605 case ATH10K_FW_IE_FW_IMAGE:
Michal Kazior7aa7a722014-08-25 12:09:38 +0200606 ath10k_dbg(ar, ATH10K_DBG_BOOT,
Kalle Valo1a222432013-09-27 19:55:07 +0300607 "found fw image ie (%zd B)\n",
608 ie_len);
609
610 ar->firmware_data = data;
611 ar->firmware_len = ie_len;
612
613 break;
614 case ATH10K_FW_IE_OTP_IMAGE:
Michal Kazior7aa7a722014-08-25 12:09:38 +0200615 ath10k_dbg(ar, ATH10K_DBG_BOOT,
Kalle Valo1a222432013-09-27 19:55:07 +0300616 "found otp image ie (%zd B)\n",
617 ie_len);
618
619 ar->otp_data = data;
620 ar->otp_len = ie_len;
621
622 break;
623 default:
Michal Kazior7aa7a722014-08-25 12:09:38 +0200624 ath10k_warn(ar, "Unknown FW IE: %u\n",
Kalle Valo1a222432013-09-27 19:55:07 +0300625 le32_to_cpu(hdr->id));
626 break;
627 }
628
629 /* jump over the padding */
630 ie_len = ALIGN(ie_len, 4);
631
632 len -= ie_len;
633 data += ie_len;
Fengguang Wue05634e2013-10-08 21:48:15 +0300634 }
Kalle Valo1a222432013-09-27 19:55:07 +0300635
636 if (!ar->firmware_data || !ar->firmware_len) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200637 ath10k_warn(ar, "No ATH10K_FW_IE_FW_IMAGE found from '%s/%s', skipping\n",
Ben Greear53c02282014-03-24 12:20:41 -0700638 ar->hw_params.fw.dir, name);
Kalle Valo1a222432013-09-27 19:55:07 +0300639 ret = -ENOMEDIUM;
640 goto err;
641 }
642
Michal Kazior24c88f72014-07-25 13:32:17 +0200643 if (test_bit(ATH10K_FW_FEATURE_WMI_10_2, ar->fw_features) &&
644 !test_bit(ATH10K_FW_FEATURE_WMI_10X, ar->fw_features)) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200645 ath10k_err(ar, "feature bits corrupted: 10.2 feature requires 10.x feature to be set as well");
Michal Kazior24c88f72014-07-25 13:32:17 +0200646 ret = -EINVAL;
647 goto err;
648 }
649
Kalle Valo1a222432013-09-27 19:55:07 +0300650 /* now fetch the board file */
651 if (ar->hw_params.fw.board == NULL) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200652 ath10k_err(ar, "board data file not defined");
Kalle Valo1a222432013-09-27 19:55:07 +0300653 ret = -EINVAL;
654 goto err;
655 }
656
657 ar->board = ath10k_fetch_fw_file(ar,
658 ar->hw_params.fw.dir,
659 ar->hw_params.fw.board);
660 if (IS_ERR(ar->board)) {
661 ret = PTR_ERR(ar->board);
Michal Kazior7aa7a722014-08-25 12:09:38 +0200662 ath10k_err(ar, "could not fetch board data '%s/%s' (%d)\n",
Ben Greear53c02282014-03-24 12:20:41 -0700663 ar->hw_params.fw.dir, ar->hw_params.fw.board,
664 ret);
Kalle Valo1a222432013-09-27 19:55:07 +0300665 goto err;
666 }
667
668 ar->board_data = ar->board->data;
669 ar->board_len = ar->board->size;
670
671 return 0;
672
673err:
674 ath10k_core_free_firmware_files(ar);
675 return ret;
676}
677
678static int ath10k_core_fetch_firmware_files(struct ath10k *ar)
679{
680 int ret;
681
Kalle Valoa58227e2014-10-13 09:40:59 +0300682 /* calibration file is optional, don't check for any errors */
683 ath10k_fetch_cal_file(ar);
684
Michal Kazior24c88f72014-07-25 13:32:17 +0200685 ar->fw_api = 3;
Michal Kazior7aa7a722014-08-25 12:09:38 +0200686 ath10k_dbg(ar, ATH10K_DBG_BOOT, "trying fw api %d\n", ar->fw_api);
Michal Kazior24c88f72014-07-25 13:32:17 +0200687
688 ret = ath10k_core_fetch_firmware_api_n(ar, ATH10K_FW_API3_FILE);
689 if (ret == 0)
690 goto success;
691
Ben Greear53c02282014-03-24 12:20:41 -0700692 ar->fw_api = 2;
Michal Kazior7aa7a722014-08-25 12:09:38 +0200693 ath10k_dbg(ar, ATH10K_DBG_BOOT, "trying fw api %d\n", ar->fw_api);
Ben Greear53c02282014-03-24 12:20:41 -0700694
Kalle Valo1a222432013-09-27 19:55:07 +0300695 ret = ath10k_core_fetch_firmware_api_n(ar, ATH10K_FW_API2_FILE);
Ben Greear53c02282014-03-24 12:20:41 -0700696 if (ret == 0)
697 goto success;
698
699 ar->fw_api = 1;
Michal Kazior7aa7a722014-08-25 12:09:38 +0200700 ath10k_dbg(ar, ATH10K_DBG_BOOT, "trying fw api %d\n", ar->fw_api);
Kalle Valo1a222432013-09-27 19:55:07 +0300701
702 ret = ath10k_core_fetch_firmware_api_1(ar);
703 if (ret)
704 return ret;
705
Ben Greear53c02282014-03-24 12:20:41 -0700706success:
Michal Kazior7aa7a722014-08-25 12:09:38 +0200707 ath10k_dbg(ar, ATH10K_DBG_BOOT, "using fw api %d\n", ar->fw_api);
Kalle Valo1a222432013-09-27 19:55:07 +0300708
709 return 0;
710}
711
Kalle Valo83091552014-10-13 09:40:53 +0300712static int ath10k_download_cal_data(struct ath10k *ar)
Kalle Valo5e3dd152013-06-12 20:52:10 +0300713{
714 int ret;
715
Kalle Valoa58227e2014-10-13 09:40:59 +0300716 ret = ath10k_download_cal_file(ar);
717 if (ret == 0) {
718 ar->cal_mode = ATH10K_CAL_MODE_FILE;
719 goto done;
720 }
721
722 ath10k_dbg(ar, ATH10K_DBG_BOOT,
Toshi Kikuchi5aabff02014-12-02 10:55:54 +0200723 "boot did not find a calibration file, try DT next: %d\n",
724 ret);
725
726 ret = ath10k_download_cal_dt(ar);
727 if (ret == 0) {
728 ar->cal_mode = ATH10K_CAL_MODE_DT;
729 goto done;
730 }
731
732 ath10k_dbg(ar, ATH10K_DBG_BOOT,
733 "boot did not find DT entry, try OTP next: %d\n",
Kalle Valoa58227e2014-10-13 09:40:59 +0300734 ret);
735
Kalle Valo5e3dd152013-06-12 20:52:10 +0300736 ret = ath10k_download_and_run_otp(ar);
Ben Greear36a8f412014-03-24 12:20:42 -0700737 if (ret) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200738 ath10k_err(ar, "failed to run otp: %d\n", ret);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300739 return ret;
Ben Greear36a8f412014-03-24 12:20:42 -0700740 }
Kalle Valo5e3dd152013-06-12 20:52:10 +0300741
Kalle Valoa58227e2014-10-13 09:40:59 +0300742 ar->cal_mode = ATH10K_CAL_MODE_OTP;
743
744done:
745 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot using calibration mode %s\n",
746 ath10k_cal_mode_str(ar->cal_mode));
747 return 0;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300748}
749
750static int ath10k_init_uart(struct ath10k *ar)
751{
752 int ret;
753
754 /*
755 * Explicitly setting UART prints to zero as target turns it on
756 * based on scratch registers.
757 */
758 ret = ath10k_bmi_write32(ar, hi_serial_enable, 0);
759 if (ret) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200760 ath10k_warn(ar, "could not disable UART prints (%d)\n", ret);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300761 return ret;
762 }
763
Kalle Valoc8c39af2013-11-20 10:00:41 +0200764 if (!uart_print)
Kalle Valo5e3dd152013-06-12 20:52:10 +0300765 return 0;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300766
767 ret = ath10k_bmi_write32(ar, hi_dbg_uart_txpin, 7);
768 if (ret) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200769 ath10k_warn(ar, "could not enable UART prints (%d)\n", ret);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300770 return ret;
771 }
772
773 ret = ath10k_bmi_write32(ar, hi_serial_enable, 1);
774 if (ret) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200775 ath10k_warn(ar, "could not enable UART prints (%d)\n", ret);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300776 return ret;
777 }
778
Bartosz Markowski03fc1372013-09-03 14:24:02 +0200779 /* Set the UART baud rate to 19200. */
780 ret = ath10k_bmi_write32(ar, hi_desired_baud_rate, 19200);
781 if (ret) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200782 ath10k_warn(ar, "could not set the baud rate (%d)\n", ret);
Bartosz Markowski03fc1372013-09-03 14:24:02 +0200783 return ret;
784 }
785
Michal Kazior7aa7a722014-08-25 12:09:38 +0200786 ath10k_info(ar, "UART prints enabled\n");
Kalle Valo5e3dd152013-06-12 20:52:10 +0300787 return 0;
788}
789
790static int ath10k_init_hw_params(struct ath10k *ar)
791{
792 const struct ath10k_hw_params *uninitialized_var(hw_params);
793 int i;
794
795 for (i = 0; i < ARRAY_SIZE(ath10k_hw_params_list); i++) {
796 hw_params = &ath10k_hw_params_list[i];
797
798 if (hw_params->id == ar->target_version)
799 break;
800 }
801
802 if (i == ARRAY_SIZE(ath10k_hw_params_list)) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200803 ath10k_err(ar, "Unsupported hardware version: 0x%x\n",
Kalle Valo5e3dd152013-06-12 20:52:10 +0300804 ar->target_version);
805 return -EINVAL;
806 }
807
808 ar->hw_params = *hw_params;
809
Michal Kazior7aa7a722014-08-25 12:09:38 +0200810 ath10k_dbg(ar, ATH10K_DBG_BOOT, "Hardware name %s version 0x%x\n",
Kalle Valoc8c39af2013-11-20 10:00:41 +0200811 ar->hw_params.name, ar->target_version);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300812
813 return 0;
814}
815
Michal Kazioraffd3212013-07-16 09:54:35 +0200816static void ath10k_core_restart(struct work_struct *work)
817{
818 struct ath10k *ar = container_of(work, struct ath10k, restart_work);
819
Michal Kazior7962b0d2014-10-28 10:34:38 +0100820 set_bit(ATH10K_FLAG_CRASH_FLUSH, &ar->dev_flags);
821
822 /* Place a barrier to make sure the compiler doesn't reorder
823 * CRASH_FLUSH and calling other functions.
824 */
825 barrier();
826
827 ieee80211_stop_queues(ar->hw);
828 ath10k_drain_tx(ar);
829 complete_all(&ar->scan.started);
830 complete_all(&ar->scan.completed);
831 complete_all(&ar->scan.on_channel);
832 complete_all(&ar->offchan_tx_completed);
833 complete_all(&ar->install_key_done);
834 complete_all(&ar->vdev_setup_done);
835 wake_up(&ar->htt.empty_tx_wq);
836 wake_up(&ar->wmi.tx_credits_wq);
837 wake_up(&ar->peer_mapping_wq);
838
Michal Kazioraffd3212013-07-16 09:54:35 +0200839 mutex_lock(&ar->conf_mutex);
840
841 switch (ar->state) {
842 case ATH10K_STATE_ON:
Michal Kazioraffd3212013-07-16 09:54:35 +0200843 ar->state = ATH10K_STATE_RESTARTING;
Michal Kazior61e9aab2014-08-22 14:33:18 +0200844 ath10k_hif_stop(ar);
Michal Kazior5c81c7f2014-08-05 14:54:44 +0200845 ath10k_scan_finish(ar);
Michal Kazioraffd3212013-07-16 09:54:35 +0200846 ieee80211_restart_hw(ar->hw);
847 break;
848 case ATH10K_STATE_OFF:
Michal Kazior5e90de82013-10-16 16:46:05 +0300849 /* this can happen if driver is being unloaded
850 * or if the crash happens during FW probing */
Michal Kazior7aa7a722014-08-25 12:09:38 +0200851 ath10k_warn(ar, "cannot restart a device that hasn't been started\n");
Michal Kazioraffd3212013-07-16 09:54:35 +0200852 break;
853 case ATH10K_STATE_RESTARTING:
Michal Kaziorc5058f52014-05-26 12:46:03 +0300854 /* hw restart might be requested from multiple places */
855 break;
Michal Kazioraffd3212013-07-16 09:54:35 +0200856 case ATH10K_STATE_RESTARTED:
857 ar->state = ATH10K_STATE_WEDGED;
858 /* fall through */
859 case ATH10K_STATE_WEDGED:
Michal Kazior7aa7a722014-08-25 12:09:38 +0200860 ath10k_warn(ar, "device is wedged, will not restart\n");
Michal Kazioraffd3212013-07-16 09:54:35 +0200861 break;
Kalle Valo43d2a302014-09-10 18:23:30 +0300862 case ATH10K_STATE_UTF:
863 ath10k_warn(ar, "firmware restart in UTF mode not supported\n");
864 break;
Michal Kazioraffd3212013-07-16 09:54:35 +0200865 }
866
867 mutex_unlock(&ar->conf_mutex);
868}
869
Michal Kaziorcfd10612014-11-25 15:16:05 +0100870static void ath10k_core_init_max_sta_count(struct ath10k *ar)
871{
872 if (test_bit(ATH10K_FW_FEATURE_WMI_10X, ar->fw_features)) {
873 ar->max_num_peers = TARGET_10X_NUM_PEERS;
874 ar->max_num_stations = TARGET_10X_NUM_STATIONS;
875 } else {
876 ar->max_num_peers = TARGET_NUM_PEERS;
877 ar->max_num_stations = TARGET_NUM_STATIONS;
878 }
879}
880
Kalle Valo43d2a302014-09-10 18:23:30 +0300881int ath10k_core_start(struct ath10k *ar, enum ath10k_firmware_mode mode)
Kalle Valo5e3dd152013-06-12 20:52:10 +0300882{
Kalle Valo5e3dd152013-06-12 20:52:10 +0300883 int status;
884
Kalle Valo60631c52013-10-08 21:45:25 +0300885 lockdep_assert_held(&ar->conf_mutex);
886
Michal Kazior7962b0d2014-10-28 10:34:38 +0100887 clear_bit(ATH10K_FLAG_CRASH_FLUSH, &ar->dev_flags);
888
Michal Kazior64d151d2013-07-16 09:38:53 +0200889 ath10k_bmi_start(ar);
890
Kalle Valo5e3dd152013-06-12 20:52:10 +0300891 if (ath10k_init_configure_target(ar)) {
892 status = -EINVAL;
893 goto err;
894 }
895
Kalle Valo83091552014-10-13 09:40:53 +0300896 status = ath10k_download_cal_data(ar);
897 if (status)
898 goto err;
899
900 status = ath10k_download_fw(ar, mode);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300901 if (status)
902 goto err;
903
904 status = ath10k_init_uart(ar);
905 if (status)
906 goto err;
907
Michal Kaziorcd003fa2013-07-05 16:15:13 +0300908 ar->htc.htc_ops.target_send_suspend_complete =
909 ath10k_send_suspend_complete;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300910
Michal Kaziorcd003fa2013-07-05 16:15:13 +0300911 status = ath10k_htc_init(ar);
912 if (status) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200913 ath10k_err(ar, "could not init HTC (%d)\n", status);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300914 goto err;
915 }
916
917 status = ath10k_bmi_done(ar);
918 if (status)
Michal Kaziorcd003fa2013-07-05 16:15:13 +0300919 goto err;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300920
921 status = ath10k_wmi_attach(ar);
922 if (status) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200923 ath10k_err(ar, "WMI attach failed: %d\n", status);
Michal Kaziorcd003fa2013-07-05 16:15:13 +0300924 goto err;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300925 }
926
Michal Kazior95bf21f2014-05-16 17:15:39 +0300927 status = ath10k_htt_init(ar);
928 if (status) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200929 ath10k_err(ar, "failed to init htt: %d\n", status);
Michal Kazior95bf21f2014-05-16 17:15:39 +0300930 goto err_wmi_detach;
931 }
932
933 status = ath10k_htt_tx_alloc(&ar->htt);
934 if (status) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200935 ath10k_err(ar, "failed to alloc htt tx: %d\n", status);
Michal Kazior95bf21f2014-05-16 17:15:39 +0300936 goto err_wmi_detach;
937 }
938
939 status = ath10k_htt_rx_alloc(&ar->htt);
940 if (status) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200941 ath10k_err(ar, "failed to alloc htt rx: %d\n", status);
Michal Kazior95bf21f2014-05-16 17:15:39 +0300942 goto err_htt_tx_detach;
943 }
944
Michal Kazior67e3c632013-11-08 08:05:18 +0100945 status = ath10k_hif_start(ar);
946 if (status) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200947 ath10k_err(ar, "could not start HIF: %d\n", status);
Michal Kazior95bf21f2014-05-16 17:15:39 +0300948 goto err_htt_rx_detach;
Michal Kazior67e3c632013-11-08 08:05:18 +0100949 }
950
951 status = ath10k_htc_wait_target(&ar->htc);
952 if (status) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200953 ath10k_err(ar, "failed to connect to HTC: %d\n", status);
Michal Kazior67e3c632013-11-08 08:05:18 +0100954 goto err_hif_stop;
955 }
Kalle Valo5e3dd152013-06-12 20:52:10 +0300956
Kalle Valo43d2a302014-09-10 18:23:30 +0300957 if (mode == ATH10K_FIRMWARE_MODE_NORMAL) {
958 status = ath10k_htt_connect(&ar->htt);
959 if (status) {
960 ath10k_err(ar, "failed to connect htt (%d)\n", status);
961 goto err_hif_stop;
962 }
Kalle Valo5e3dd152013-06-12 20:52:10 +0300963 }
964
Michal Kazior95bf21f2014-05-16 17:15:39 +0300965 status = ath10k_wmi_connect(ar);
966 if (status) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200967 ath10k_err(ar, "could not connect wmi: %d\n", status);
Michal Kazior95bf21f2014-05-16 17:15:39 +0300968 goto err_hif_stop;
969 }
970
971 status = ath10k_htc_start(&ar->htc);
972 if (status) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200973 ath10k_err(ar, "failed to start htc: %d\n", status);
Michal Kazior95bf21f2014-05-16 17:15:39 +0300974 goto err_hif_stop;
975 }
976
Kalle Valo43d2a302014-09-10 18:23:30 +0300977 if (mode == ATH10K_FIRMWARE_MODE_NORMAL) {
978 status = ath10k_wmi_wait_for_service_ready(ar);
979 if (status <= 0) {
980 ath10k_warn(ar, "wmi service ready event not received");
981 status = -ETIMEDOUT;
982 goto err_hif_stop;
983 }
Michal Kazior95bf21f2014-05-16 17:15:39 +0300984 }
Kalle Valo5e3dd152013-06-12 20:52:10 +0300985
Michal Kazior7aa7a722014-08-25 12:09:38 +0200986 ath10k_dbg(ar, ATH10K_DBG_BOOT, "firmware %s booted\n",
Kalle Valoc8c39af2013-11-20 10:00:41 +0200987 ar->hw->wiphy->fw_version);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300988
Kalle Valo5e3dd152013-06-12 20:52:10 +0300989 status = ath10k_wmi_cmd_init(ar);
990 if (status) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200991 ath10k_err(ar, "could not send WMI init command (%d)\n",
992 status);
Michal Kaziorb7967dc2014-08-07 11:03:31 +0200993 goto err_hif_stop;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300994 }
995
996 status = ath10k_wmi_wait_for_unified_ready(ar);
997 if (status <= 0) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200998 ath10k_err(ar, "wmi unified ready event not received\n");
Kalle Valo5e3dd152013-06-12 20:52:10 +0300999 status = -ETIMEDOUT;
Michal Kaziorb7967dc2014-08-07 11:03:31 +02001000 goto err_hif_stop;
Kalle Valo5e3dd152013-06-12 20:52:10 +03001001 }
1002
Kalle Valo43d2a302014-09-10 18:23:30 +03001003 /* we don't care about HTT in UTF mode */
1004 if (mode == ATH10K_FIRMWARE_MODE_NORMAL) {
1005 status = ath10k_htt_setup(&ar->htt);
1006 if (status) {
1007 ath10k_err(ar, "failed to setup htt: %d\n", status);
1008 goto err_hif_stop;
1009 }
Michal Kazior95bf21f2014-05-16 17:15:39 +03001010 }
Kalle Valo5e3dd152013-06-12 20:52:10 +03001011
Kalle Valodb66ea02013-09-03 11:44:03 +03001012 status = ath10k_debug_start(ar);
1013 if (status)
Michal Kaziorb7967dc2014-08-07 11:03:31 +02001014 goto err_hif_stop;
Kalle Valodb66ea02013-09-03 11:44:03 +03001015
Bartosz Markowskidfa413d2014-06-02 21:19:45 +03001016 if (test_bit(ATH10K_FW_FEATURE_WMI_10X, ar->fw_features))
Ben Greear16c11172014-09-23 14:17:16 -07001017 ar->free_vdev_map = (1LL << TARGET_10X_NUM_VDEVS) - 1;
Bartosz Markowskidfa413d2014-06-02 21:19:45 +03001018 else
Ben Greear16c11172014-09-23 14:17:16 -07001019 ar->free_vdev_map = (1LL << TARGET_NUM_VDEVS) - 1;
Bartosz Markowskidfa413d2014-06-02 21:19:45 +03001020
Michal Kazior05791192013-10-16 15:44:45 +03001021 INIT_LIST_HEAD(&ar->arvifs);
Michal Kazior1a1b8a82013-07-16 09:38:55 +02001022
Michal Kaziordd30a362013-07-16 09:38:51 +02001023 return 0;
1024
Michal Kazior67e3c632013-11-08 08:05:18 +01001025err_hif_stop:
1026 ath10k_hif_stop(ar);
Michal Kazior95bf21f2014-05-16 17:15:39 +03001027err_htt_rx_detach:
1028 ath10k_htt_rx_free(&ar->htt);
1029err_htt_tx_detach:
1030 ath10k_htt_tx_free(&ar->htt);
Michal Kaziordd30a362013-07-16 09:38:51 +02001031err_wmi_detach:
1032 ath10k_wmi_detach(ar);
1033err:
1034 return status;
1035}
Michal Kazior818bdd12013-07-16 09:38:57 +02001036EXPORT_SYMBOL(ath10k_core_start);
Michal Kaziordd30a362013-07-16 09:38:51 +02001037
Marek Puzyniak00f54822014-02-10 17:14:24 +01001038int ath10k_wait_for_suspend(struct ath10k *ar, u32 suspend_opt)
1039{
1040 int ret;
1041
1042 reinit_completion(&ar->target_suspend);
1043
1044 ret = ath10k_wmi_pdev_suspend_target(ar, suspend_opt);
1045 if (ret) {
Michal Kazior7aa7a722014-08-25 12:09:38 +02001046 ath10k_warn(ar, "could not suspend target (%d)\n", ret);
Marek Puzyniak00f54822014-02-10 17:14:24 +01001047 return ret;
1048 }
1049
1050 ret = wait_for_completion_timeout(&ar->target_suspend, 1 * HZ);
1051
1052 if (ret == 0) {
Michal Kazior7aa7a722014-08-25 12:09:38 +02001053 ath10k_warn(ar, "suspend timed out - target pause event never came\n");
Marek Puzyniak00f54822014-02-10 17:14:24 +01001054 return -ETIMEDOUT;
1055 }
1056
1057 return 0;
1058}
1059
Michal Kaziordd30a362013-07-16 09:38:51 +02001060void ath10k_core_stop(struct ath10k *ar)
1061{
Kalle Valo60631c52013-10-08 21:45:25 +03001062 lockdep_assert_held(&ar->conf_mutex);
1063
Marek Puzyniak00f54822014-02-10 17:14:24 +01001064 /* try to suspend target */
Kalle Valo43d2a302014-09-10 18:23:30 +03001065 if (ar->state != ATH10K_STATE_RESTARTING &&
1066 ar->state != ATH10K_STATE_UTF)
Michal Kazior216a1832014-04-23 19:30:04 +03001067 ath10k_wait_for_suspend(ar, WMI_PDEV_SUSPEND_AND_DISABLE_INTR);
1068
Kalle Valodb66ea02013-09-03 11:44:03 +03001069 ath10k_debug_stop(ar);
Michal Kazior95bf21f2014-05-16 17:15:39 +03001070 ath10k_hif_stop(ar);
1071 ath10k_htt_tx_free(&ar->htt);
1072 ath10k_htt_rx_free(&ar->htt);
Michal Kaziordd30a362013-07-16 09:38:51 +02001073 ath10k_wmi_detach(ar);
1074}
Michal Kazior818bdd12013-07-16 09:38:57 +02001075EXPORT_SYMBOL(ath10k_core_stop);
1076
1077/* mac80211 manages fw/hw initialization through start/stop hooks. However in
1078 * order to know what hw capabilities should be advertised to mac80211 it is
1079 * necessary to load the firmware (and tear it down immediately since start
1080 * hook will try to init it again) before registering */
1081static int ath10k_core_probe_fw(struct ath10k *ar)
1082{
Michal Kazior29385052013-07-16 09:38:58 +02001083 struct bmi_target_info target_info;
1084 int ret = 0;
Michal Kazior818bdd12013-07-16 09:38:57 +02001085
1086 ret = ath10k_hif_power_up(ar);
1087 if (ret) {
Michal Kazior7aa7a722014-08-25 12:09:38 +02001088 ath10k_err(ar, "could not start pci hif (%d)\n", ret);
Michal Kazior818bdd12013-07-16 09:38:57 +02001089 return ret;
1090 }
1091
Michal Kazior29385052013-07-16 09:38:58 +02001092 memset(&target_info, 0, sizeof(target_info));
1093 ret = ath10k_bmi_get_target_info(ar, &target_info);
1094 if (ret) {
Michal Kazior7aa7a722014-08-25 12:09:38 +02001095 ath10k_err(ar, "could not get target info (%d)\n", ret);
Michal Kazior29385052013-07-16 09:38:58 +02001096 ath10k_hif_power_down(ar);
1097 return ret;
1098 }
1099
1100 ar->target_version = target_info.version;
1101 ar->hw->wiphy->hw_version = target_info.version;
1102
1103 ret = ath10k_init_hw_params(ar);
1104 if (ret) {
Michal Kazior7aa7a722014-08-25 12:09:38 +02001105 ath10k_err(ar, "could not get hw params (%d)\n", ret);
Michal Kazior29385052013-07-16 09:38:58 +02001106 ath10k_hif_power_down(ar);
1107 return ret;
1108 }
1109
1110 ret = ath10k_core_fetch_firmware_files(ar);
1111 if (ret) {
Michal Kazior7aa7a722014-08-25 12:09:38 +02001112 ath10k_err(ar, "could not fetch firmware files (%d)\n", ret);
Michal Kazior29385052013-07-16 09:38:58 +02001113 ath10k_hif_power_down(ar);
1114 return ret;
1115 }
1116
Michal Kaziorcfd10612014-11-25 15:16:05 +01001117 ath10k_core_init_max_sta_count(ar);
1118
Kalle Valo60631c52013-10-08 21:45:25 +03001119 mutex_lock(&ar->conf_mutex);
1120
Kalle Valo43d2a302014-09-10 18:23:30 +03001121 ret = ath10k_core_start(ar, ATH10K_FIRMWARE_MODE_NORMAL);
Michal Kazior818bdd12013-07-16 09:38:57 +02001122 if (ret) {
Michal Kazior7aa7a722014-08-25 12:09:38 +02001123 ath10k_err(ar, "could not init core (%d)\n", ret);
Michal Kazior29385052013-07-16 09:38:58 +02001124 ath10k_core_free_firmware_files(ar);
Michal Kazior818bdd12013-07-16 09:38:57 +02001125 ath10k_hif_power_down(ar);
Kalle Valo60631c52013-10-08 21:45:25 +03001126 mutex_unlock(&ar->conf_mutex);
Michal Kazior818bdd12013-07-16 09:38:57 +02001127 return ret;
1128 }
1129
Michal Kazior8079de02014-08-22 14:23:29 +02001130 ath10k_print_driver_info(ar);
Michal Kazior818bdd12013-07-16 09:38:57 +02001131 ath10k_core_stop(ar);
Kalle Valo60631c52013-10-08 21:45:25 +03001132
1133 mutex_unlock(&ar->conf_mutex);
1134
Michal Kazior818bdd12013-07-16 09:38:57 +02001135 ath10k_hif_power_down(ar);
1136 return 0;
1137}
Michal Kaziordd30a362013-07-16 09:38:51 +02001138
Kalle Valoe01ae682013-09-01 11:22:14 +03001139static int ath10k_core_check_chip_id(struct ath10k *ar)
1140{
1141 u32 hw_revision = MS(ar->chip_id, SOC_CHIP_ID_REV);
1142
Michal Kazior7aa7a722014-08-25 12:09:38 +02001143 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot chip_id 0x%08x hw_revision 0x%x\n",
Kalle Valoeffea962013-09-08 17:55:44 +03001144 ar->chip_id, hw_revision);
1145
Kalle Valoe01ae682013-09-01 11:22:14 +03001146 /* Check that we are not using hw1.0 (some of them have same pci id
1147 * as hw2.0) before doing anything else as ath10k crashes horribly
1148 * due to missing hw1.0 workarounds. */
1149 switch (hw_revision) {
1150 case QCA988X_HW_1_0_CHIP_ID_REV:
Michal Kazior7aa7a722014-08-25 12:09:38 +02001151 ath10k_err(ar, "ERROR: qca988x hw1.0 is not supported\n");
Kalle Valoe01ae682013-09-01 11:22:14 +03001152 return -EOPNOTSUPP;
1153
1154 case QCA988X_HW_2_0_CHIP_ID_REV:
1155 /* known hardware revision, continue normally */
1156 return 0;
1157
1158 default:
Michal Kazior7aa7a722014-08-25 12:09:38 +02001159 ath10k_warn(ar, "Warning: hardware revision unknown (0x%x), expect problems\n",
Kalle Valoe01ae682013-09-01 11:22:14 +03001160 ar->chip_id);
1161 return 0;
1162 }
1163
1164 return 0;
1165}
1166
Michal Kazior6782cb62014-05-23 12:28:47 +02001167static void ath10k_core_register_work(struct work_struct *work)
Michal Kaziordd30a362013-07-16 09:38:51 +02001168{
Michal Kazior6782cb62014-05-23 12:28:47 +02001169 struct ath10k *ar = container_of(work, struct ath10k, register_work);
Michal Kaziordd30a362013-07-16 09:38:51 +02001170 int status;
1171
Michal Kazior818bdd12013-07-16 09:38:57 +02001172 status = ath10k_core_probe_fw(ar);
1173 if (status) {
Michal Kazior7aa7a722014-08-25 12:09:38 +02001174 ath10k_err(ar, "could not probe fw (%d)\n", status);
Michal Kazior6782cb62014-05-23 12:28:47 +02001175 goto err;
Michal Kazior818bdd12013-07-16 09:38:57 +02001176 }
Michal Kaziordd30a362013-07-16 09:38:51 +02001177
Kalle Valo5e3dd152013-06-12 20:52:10 +03001178 status = ath10k_mac_register(ar);
Michal Kazior818bdd12013-07-16 09:38:57 +02001179 if (status) {
Michal Kazior7aa7a722014-08-25 12:09:38 +02001180 ath10k_err(ar, "could not register to mac80211 (%d)\n", status);
Michal Kazior29385052013-07-16 09:38:58 +02001181 goto err_release_fw;
Michal Kazior818bdd12013-07-16 09:38:57 +02001182 }
Kalle Valo5e3dd152013-06-12 20:52:10 +03001183
Michal Kaziore13cf7a2014-09-04 09:13:08 +02001184 status = ath10k_debug_register(ar);
Kalle Valo5e3dd152013-06-12 20:52:10 +03001185 if (status) {
Michal Kazior7aa7a722014-08-25 12:09:38 +02001186 ath10k_err(ar, "unable to initialize debugfs\n");
Kalle Valo5e3dd152013-06-12 20:52:10 +03001187 goto err_unregister_mac;
1188 }
1189
Simon Wunderlich855aed12014-08-02 09:12:54 +03001190 status = ath10k_spectral_create(ar);
1191 if (status) {
Michal Kazior7aa7a722014-08-25 12:09:38 +02001192 ath10k_err(ar, "failed to initialize spectral\n");
Simon Wunderlich855aed12014-08-02 09:12:54 +03001193 goto err_debug_destroy;
1194 }
1195
Michal Kazior6782cb62014-05-23 12:28:47 +02001196 set_bit(ATH10K_FLAG_CORE_REGISTERED, &ar->dev_flags);
1197 return;
Kalle Valo5e3dd152013-06-12 20:52:10 +03001198
Simon Wunderlich855aed12014-08-02 09:12:54 +03001199err_debug_destroy:
1200 ath10k_debug_destroy(ar);
Kalle Valo5e3dd152013-06-12 20:52:10 +03001201err_unregister_mac:
1202 ath10k_mac_unregister(ar);
Michal Kazior29385052013-07-16 09:38:58 +02001203err_release_fw:
1204 ath10k_core_free_firmware_files(ar);
Michal Kazior6782cb62014-05-23 12:28:47 +02001205err:
Michal Kaziora491a922014-07-14 16:07:29 +03001206 /* TODO: It's probably a good idea to release device from the driver
1207 * but calling device_release_driver() here will cause a deadlock.
1208 */
Michal Kazior6782cb62014-05-23 12:28:47 +02001209 return;
1210}
1211
1212int ath10k_core_register(struct ath10k *ar, u32 chip_id)
1213{
1214 int status;
1215
1216 ar->chip_id = chip_id;
1217
1218 status = ath10k_core_check_chip_id(ar);
1219 if (status) {
Michal Kazior7aa7a722014-08-25 12:09:38 +02001220 ath10k_err(ar, "Unsupported chip id 0x%08x\n", ar->chip_id);
Michal Kazior6782cb62014-05-23 12:28:47 +02001221 return status;
1222 }
1223
1224 queue_work(ar->workqueue, &ar->register_work);
1225
1226 return 0;
Kalle Valo5e3dd152013-06-12 20:52:10 +03001227}
1228EXPORT_SYMBOL(ath10k_core_register);
1229
1230void ath10k_core_unregister(struct ath10k *ar)
1231{
Michal Kazior6782cb62014-05-23 12:28:47 +02001232 cancel_work_sync(&ar->register_work);
1233
1234 if (!test_bit(ATH10K_FLAG_CORE_REGISTERED, &ar->dev_flags))
1235 return;
1236
Simon Wunderlich804eef1472014-08-12 17:12:17 +02001237 /* Stop spectral before unregistering from mac80211 to remove the
1238 * relayfs debugfs file cleanly. Otherwise the parent debugfs tree
1239 * would be already be free'd recursively, leading to a double free.
1240 */
1241 ath10k_spectral_destroy(ar);
1242
Kalle Valo5e3dd152013-06-12 20:52:10 +03001243 /* We must unregister from mac80211 before we stop HTC and HIF.
1244 * Otherwise we will fail to submit commands to FW and mac80211 will be
1245 * unhappy about callback failures. */
1246 ath10k_mac_unregister(ar);
Kalle Valodb66ea02013-09-03 11:44:03 +03001247
Kalle Valo43d2a302014-09-10 18:23:30 +03001248 ath10k_testmode_destroy(ar);
1249
Michal Kazior29385052013-07-16 09:38:58 +02001250 ath10k_core_free_firmware_files(ar);
Ben Greear6f1f56e2013-11-04 09:18:16 -08001251
Michal Kaziore13cf7a2014-09-04 09:13:08 +02001252 ath10k_debug_unregister(ar);
Kalle Valo5e3dd152013-06-12 20:52:10 +03001253}
1254EXPORT_SYMBOL(ath10k_core_unregister);
1255
Michal Kaziore7b54192014-08-07 11:03:27 +02001256struct ath10k *ath10k_core_create(size_t priv_size, struct device *dev,
Kalle Valoe07db352014-10-13 09:40:47 +03001257 enum ath10k_bus bus,
Michal Kazior0d0a6932014-05-23 12:28:45 +02001258 const struct ath10k_hif_ops *hif_ops)
1259{
1260 struct ath10k *ar;
Michal Kaziore13cf7a2014-09-04 09:13:08 +02001261 int ret;
Michal Kazior0d0a6932014-05-23 12:28:45 +02001262
Michal Kaziore7b54192014-08-07 11:03:27 +02001263 ar = ath10k_mac_create(priv_size);
Michal Kazior0d0a6932014-05-23 12:28:45 +02001264 if (!ar)
1265 return NULL;
1266
1267 ar->ath_common.priv = ar;
1268 ar->ath_common.hw = ar->hw;
1269
1270 ar->p2p = !!ath10k_p2p;
1271 ar->dev = dev;
1272
Michal Kazior0d0a6932014-05-23 12:28:45 +02001273 ar->hif.ops = hif_ops;
Kalle Valoe07db352014-10-13 09:40:47 +03001274 ar->hif.bus = bus;
Michal Kazior0d0a6932014-05-23 12:28:45 +02001275
1276 init_completion(&ar->scan.started);
1277 init_completion(&ar->scan.completed);
1278 init_completion(&ar->scan.on_channel);
1279 init_completion(&ar->target_suspend);
1280
1281 init_completion(&ar->install_key_done);
1282 init_completion(&ar->vdev_setup_done);
1283
Michal Kazior5c81c7f2014-08-05 14:54:44 +02001284 INIT_DELAYED_WORK(&ar->scan.timeout, ath10k_scan_timeout_work);
Michal Kazior0d0a6932014-05-23 12:28:45 +02001285
1286 ar->workqueue = create_singlethread_workqueue("ath10k_wq");
1287 if (!ar->workqueue)
Michal Kaziore13cf7a2014-09-04 09:13:08 +02001288 goto err_free_mac;
Michal Kazior0d0a6932014-05-23 12:28:45 +02001289
1290 mutex_init(&ar->conf_mutex);
1291 spin_lock_init(&ar->data_lock);
1292
1293 INIT_LIST_HEAD(&ar->peers);
1294 init_waitqueue_head(&ar->peer_mapping_wq);
Michal Kazior7962b0d2014-10-28 10:34:38 +01001295 init_waitqueue_head(&ar->htt.empty_tx_wq);
1296 init_waitqueue_head(&ar->wmi.tx_credits_wq);
Michal Kazior0d0a6932014-05-23 12:28:45 +02001297
1298 init_completion(&ar->offchan_tx_completed);
1299 INIT_WORK(&ar->offchan_tx_work, ath10k_offchan_tx_work);
1300 skb_queue_head_init(&ar->offchan_tx_queue);
1301
1302 INIT_WORK(&ar->wmi_mgmt_tx_work, ath10k_mgmt_over_wmi_tx_work);
1303 skb_queue_head_init(&ar->wmi_mgmt_tx_queue);
1304
Michal Kazior6782cb62014-05-23 12:28:47 +02001305 INIT_WORK(&ar->register_work, ath10k_core_register_work);
Michal Kazior0d0a6932014-05-23 12:28:45 +02001306 INIT_WORK(&ar->restart_work, ath10k_core_restart);
1307
Michal Kaziore13cf7a2014-09-04 09:13:08 +02001308 ret = ath10k_debug_create(ar);
1309 if (ret)
1310 goto err_free_wq;
1311
Michal Kazior0d0a6932014-05-23 12:28:45 +02001312 return ar;
1313
Michal Kaziore13cf7a2014-09-04 09:13:08 +02001314err_free_wq:
1315 destroy_workqueue(ar->workqueue);
1316
1317err_free_mac:
Michal Kazior0d0a6932014-05-23 12:28:45 +02001318 ath10k_mac_destroy(ar);
Michal Kaziore13cf7a2014-09-04 09:13:08 +02001319
Michal Kazior0d0a6932014-05-23 12:28:45 +02001320 return NULL;
1321}
1322EXPORT_SYMBOL(ath10k_core_create);
1323
1324void ath10k_core_destroy(struct ath10k *ar)
1325{
1326 flush_workqueue(ar->workqueue);
1327 destroy_workqueue(ar->workqueue);
1328
Michal Kaziore13cf7a2014-09-04 09:13:08 +02001329 ath10k_debug_destroy(ar);
Michal Kazior0d0a6932014-05-23 12:28:45 +02001330 ath10k_mac_destroy(ar);
1331}
1332EXPORT_SYMBOL(ath10k_core_destroy);
1333
Kalle Valo5e3dd152013-06-12 20:52:10 +03001334MODULE_AUTHOR("Qualcomm Atheros");
1335MODULE_DESCRIPTION("Core module for QCA988X PCIe devices.");
1336MODULE_LICENSE("Dual BSD/GPL");