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Johannes Berg8ca151b2013-01-24 14:25:36 +01001/******************************************************************************
2 *
3 * This file is provided under a dual BSD/GPLv2 license. When using or
4 * redistributing this file, you may do so under either license.
5 *
6 * GPL LICENSE SUMMARY
7 *
Emmanuel Grumbach51368bf2013-12-30 13:15:54 +02008 * Copyright(c) 2012 - 2014 Intel Corporation. All rights reserved.
Johannes Berg8ca151b2013-01-24 14:25:36 +01009 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of version 2 of the GNU General Public License as
12 * published by the Free Software Foundation.
13 *
14 * This program is distributed in the hope that it will be useful, but
15 * WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
17 * General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110,
22 * USA
23 *
24 * The full GNU General Public License is included in this distribution
Emmanuel Grumbach410dc5a2013-02-18 09:22:28 +020025 * in the file called COPYING.
Johannes Berg8ca151b2013-01-24 14:25:36 +010026 *
27 * Contact Information:
28 * Intel Linux Wireless <ilw@linux.intel.com>
29 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
30 *
31 * BSD LICENSE
32 *
Emmanuel Grumbach51368bf2013-12-30 13:15:54 +020033 * Copyright(c) 2012 - 2014 Intel Corporation. All rights reserved.
Johannes Berg8ca151b2013-01-24 14:25:36 +010034 * All rights reserved.
35 *
36 * Redistribution and use in source and binary forms, with or without
37 * modification, are permitted provided that the following conditions
38 * are met:
39 *
40 * * Redistributions of source code must retain the above copyright
41 * notice, this list of conditions and the following disclaimer.
42 * * Redistributions in binary form must reproduce the above copyright
43 * notice, this list of conditions and the following disclaimer in
44 * the documentation and/or other materials provided with the
45 * distribution.
46 * * Neither the name Intel Corporation nor the names of its
47 * contributors may be used to endorse or promote products derived
48 * from this software without specific prior written permission.
49 *
50 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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55 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
56 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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59 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
60 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
61 *
62 *****************************************************************************/
63
64#ifndef __fw_api_h__
65#define __fw_api_h__
66
67#include "fw-api-rs.h"
68#include "fw-api-tx.h"
69#include "fw-api-sta.h"
70#include "fw-api-mac.h"
71#include "fw-api-power.h"
72#include "fw-api-d3.h"
Emmanuel Grumbach5b7ff612014-03-11 19:27:45 +020073#include "fw-api-coex.h"
Haim Dreyfusse820c2d2014-04-06 11:19:09 +030074#include "fw-api-scan.h"
Johannes Berg8ca151b2013-01-24 14:25:36 +010075
Eytan Lifshitz19e737c2013-09-09 13:30:15 +020076/* maximal number of Tx queues in any platform */
77#define IWL_MVM_MAX_QUEUES 20
78
79/* Tx queue numbers */
Johannes Berg8ca151b2013-01-24 14:25:36 +010080enum {
81 IWL_MVM_OFFCHANNEL_QUEUE = 8,
82 IWL_MVM_CMD_QUEUE = 9,
Johannes Berg8ca151b2013-01-24 14:25:36 +010083};
84
Eytan Lifshitz19e737c2013-09-09 13:30:15 +020085#define IWL_MVM_CMD_FIFO 7
86
Johannes Berg8ca151b2013-01-24 14:25:36 +010087#define IWL_MVM_STATION_COUNT 16
88
Arik Nemtsovcf7b4912014-05-15 11:44:40 +030089#define IWL_MVM_TDLS_STA_COUNT 4
90
Johannes Berg8ca151b2013-01-24 14:25:36 +010091/* commands */
92enum {
93 MVM_ALIVE = 0x1,
94 REPLY_ERROR = 0x2,
95
96 INIT_COMPLETE_NOTIF = 0x4,
97
98 /* PHY context commands */
99 PHY_CONTEXT_CMD = 0x8,
100 DBG_CFG = 0x9,
Emmanuel Grumbachb9fae2d2014-02-17 11:24:10 +0200101 ANTENNA_COUPLING_NOTIFICATION = 0xa,
Johannes Berg8ca151b2013-01-24 14:25:36 +0100102
103 /* station table */
Max Stepanov5a258aa2013-04-07 09:11:21 +0300104 ADD_STA_KEY = 0x17,
Johannes Berg8ca151b2013-01-24 14:25:36 +0100105 ADD_STA = 0x18,
106 REMOVE_STA = 0x19,
107
108 /* TX */
109 TX_CMD = 0x1c,
110 TXPATH_FLUSH = 0x1e,
111 MGMT_MCAST_KEY = 0x1f,
112
113 /* global key */
114 WEP_KEY = 0x20,
115
116 /* MAC and Binding commands */
117 MAC_CONTEXT_CMD = 0x28,
118 TIME_EVENT_CMD = 0x29, /* both CMD and response */
119 TIME_EVENT_NOTIFICATION = 0x2a,
120 BINDING_CONTEXT_CMD = 0x2b,
121 TIME_QUOTA_CMD = 0x2c,
Johannes Berg4ac6cb52013-08-08 09:30:13 +0200122 NON_QOS_TX_COUNTER_CMD = 0x2d,
Johannes Berg8ca151b2013-01-24 14:25:36 +0100123
124 LQ_CMD = 0x4e,
125
126 /* Calibration */
127 TEMPERATURE_NOTIFICATION = 0x62,
128 CALIBRATION_CFG_CMD = 0x65,
129 CALIBRATION_RES_NOTIFICATION = 0x66,
130 CALIBRATION_COMPLETE_NOTIFICATION = 0x67,
131 RADIO_VERSION_NOTIFICATION = 0x68,
132
133 /* Scan offload */
134 SCAN_OFFLOAD_REQUEST_CMD = 0x51,
135 SCAN_OFFLOAD_ABORT_CMD = 0x52,
Ariej Marjieh720befbf2014-07-07 09:04:58 +0300136 HOT_SPOT_CMD = 0x53,
Johannes Berg8ca151b2013-01-24 14:25:36 +0100137 SCAN_OFFLOAD_COMPLETE = 0x6D,
138 SCAN_OFFLOAD_UPDATE_PROFILES_CMD = 0x6E,
139 SCAN_OFFLOAD_CONFIG_CMD = 0x6f,
David Spinadel35a000b2013-08-28 09:29:43 +0300140 MATCH_FOUND_NOTIFICATION = 0xd9,
David Spinadelfb98be52014-05-04 12:51:10 +0300141 SCAN_ITERATION_COMPLETE = 0xe7,
Johannes Berg8ca151b2013-01-24 14:25:36 +0100142
143 /* Phy */
144 PHY_CONFIGURATION_CMD = 0x6a,
145 CALIB_RES_NOTIF_PHY_DB = 0x6b,
146 /* PHY_DB_CMD = 0x6c, */
147
Alexander Bondare811ada2013-03-10 15:29:44 +0200148 /* Power - legacy power table command */
Johannes Berg8ca151b2013-01-24 14:25:36 +0100149 POWER_TABLE_CMD = 0x77,
Alexander Bondar175a70b2013-04-14 20:59:37 +0300150 PSM_UAPSD_AP_MISBEHAVING_NOTIFICATION = 0x78,
Johannes Berg8ca151b2013-01-24 14:25:36 +0100151
Eytan Lifshitz9ee718a2013-05-19 19:14:41 +0300152 /* Thermal Throttling*/
153 REPLY_THERMAL_MNG_BACKOFF = 0x7e,
154
Johannes Berg8ca151b2013-01-24 14:25:36 +0100155 /* Scanning */
156 SCAN_REQUEST_CMD = 0x80,
157 SCAN_ABORT_CMD = 0x81,
158 SCAN_START_NOTIFICATION = 0x82,
159 SCAN_RESULTS_NOTIFICATION = 0x83,
160 SCAN_COMPLETE_NOTIFICATION = 0x84,
161
162 /* NVM */
163 NVM_ACCESS_CMD = 0x88,
164
165 SET_CALIB_DEFAULT_CMD = 0x8e,
166
Ilan Peer571765c2013-03-05 15:26:03 +0200167 BEACON_NOTIFICATION = 0x90,
Johannes Berg8ca151b2013-01-24 14:25:36 +0100168 BEACON_TEMPLATE_CMD = 0x91,
169 TX_ANT_CONFIGURATION_CMD = 0x98,
170 STATISTICS_NOTIFICATION = 0x9d,
Johannes Berg3e56ead2013-02-15 22:23:18 +0100171 EOSP_NOTIFICATION = 0x9e,
Matti Gottlieb88f2fd72013-07-09 15:25:46 +0300172 REDUCE_TX_POWER_CMD = 0x9f,
Johannes Berg8ca151b2013-01-24 14:25:36 +0100173
174 /* RF-KILL commands and notifications */
175 CARD_STATE_CMD = 0xa0,
176 CARD_STATE_NOTIFICATION = 0xa1,
177
Hila Gonend64048e2013-03-13 18:00:03 +0200178 MISSED_BEACONS_NOTIFICATION = 0xa2,
179
Alexander Bondare811ada2013-03-10 15:29:44 +0200180 /* Power - new power table command */
181 MAC_PM_POWER_TABLE = 0xa9,
182
Johannes Berg8ca151b2013-01-24 14:25:36 +0100183 REPLY_RX_PHY_CMD = 0xc0,
184 REPLY_RX_MPDU_CMD = 0xc1,
185 BA_NOTIF = 0xc5,
186
Emmanuel Grumbachfb3ceb82013-01-14 15:04:01 +0200187 /* BT Coex */
188 BT_COEX_PRIO_TABLE = 0xcc,
189 BT_COEX_PROT_ENV = 0xcd,
190 BT_PROFILE_NOTIFICATION = 0xce,
Emmanuel Grumbach430a3bb2014-04-02 09:55:16 +0300191 BT_CONFIG = 0x9b,
192 BT_COEX_UPDATE_SW_BOOST = 0x5a,
193 BT_COEX_UPDATE_CORUN_LUT = 0x5b,
194 BT_COEX_UPDATE_REDUCED_TXP = 0x5c,
Emmanuel Grumbachdac94da2013-06-18 07:35:27 +0300195 BT_COEX_CI = 0x5d,
Emmanuel Grumbachfb3ceb82013-01-14 15:04:01 +0200196
Lilach Edelstein1f3b0ff2013-10-06 13:03:32 +0200197 REPLY_SF_CFG_CMD = 0xd1,
Hila Gonen7df15b12012-12-12 11:16:19 +0200198 REPLY_BEACON_FILTERING_CMD = 0xd2,
199
Johannes Berg8ca151b2013-01-24 14:25:36 +0100200 REPLY_DEBUG_CMD = 0xf0,
201 DEBUG_LOG_MSG = 0xf7,
202
Eliad Pellerc87163b2014-01-08 10:11:11 +0200203 BCAST_FILTER_CMD = 0xcf,
Emmanuel Grumbach51b6b9e2013-05-02 15:01:24 +0300204 MCAST_FILTER_CMD = 0xd0,
205
Johannes Berg8ca151b2013-01-24 14:25:36 +0100206 /* D3 commands/notifications */
207 D3_CONFIG_CMD = 0xd3,
208 PROT_OFFLOAD_CONFIG_CMD = 0xd4,
209 OFFLOADS_QUERY_CMD = 0xd5,
210 REMOTE_WAKE_CONFIG_CMD = 0xd6,
Arik Nemtsov98ee7782013-10-02 16:58:09 +0300211 D0I3_END_CMD = 0xed,
Johannes Berg8ca151b2013-01-24 14:25:36 +0100212
213 /* for WoWLAN in particular */
214 WOWLAN_PATTERNS = 0xe0,
215 WOWLAN_CONFIGURATION = 0xe1,
216 WOWLAN_TSC_RSC_PARAM = 0xe2,
217 WOWLAN_TKIP_PARAM = 0xe3,
218 WOWLAN_KEK_KCK_MATERIAL = 0xe4,
219 WOWLAN_GET_STATUSES = 0xe5,
220 WOWLAN_TX_POWER_PER_DB = 0xe6,
221
222 /* and for NetDetect */
223 NET_DETECT_CONFIG_CMD = 0x54,
224 NET_DETECT_PROFILES_QUERY_CMD = 0x56,
225 NET_DETECT_PROFILES_CMD = 0x57,
226 NET_DETECT_HOTSPOTS_CMD = 0x58,
227 NET_DETECT_HOTSPOTS_QUERY_CMD = 0x59,
228
229 REPLY_MAX = 0xff,
230};
231
232/**
233 * struct iwl_cmd_response - generic response struct for most commands
234 * @status: status of the command asked, changes for each one
235 */
236struct iwl_cmd_response {
237 __le32 status;
238};
239
240/*
241 * struct iwl_tx_ant_cfg_cmd
242 * @valid: valid antenna configuration
243 */
244struct iwl_tx_ant_cfg_cmd {
245 __le32 valid;
246} __packed;
247
Matti Gottlieb88f2fd72013-07-09 15:25:46 +0300248/**
249 * struct iwl_reduce_tx_power_cmd - TX power reduction command
250 * REDUCE_TX_POWER_CMD = 0x9f
251 * @flags: (reserved for future implementation)
252 * @mac_context_id: id of the mac ctx for which we are reducing TX power.
253 * @pwr_restriction: TX power restriction in dBms.
254 */
255struct iwl_reduce_tx_power_cmd {
256 u8 flags;
257 u8 mac_context_id;
258 __le16 pwr_restriction;
259} __packed; /* TX_REDUCED_POWER_API_S_VER_1 */
260
Johannes Berg8ca151b2013-01-24 14:25:36 +0100261/*
262 * Calibration control struct.
263 * Sent as part of the phy configuration command.
264 * @flow_trigger: bitmap for which calibrations to perform according to
265 * flow triggers.
266 * @event_trigger: bitmap for which calibrations to perform according to
267 * event triggers.
268 */
269struct iwl_calib_ctrl {
270 __le32 flow_trigger;
271 __le32 event_trigger;
272} __packed;
273
274/* This enum defines the bitmap of various calibrations to enable in both
275 * init ucode and runtime ucode through CALIBRATION_CFG_CMD.
276 */
277enum iwl_calib_cfg {
278 IWL_CALIB_CFG_XTAL_IDX = BIT(0),
279 IWL_CALIB_CFG_TEMPERATURE_IDX = BIT(1),
280 IWL_CALIB_CFG_VOLTAGE_READ_IDX = BIT(2),
281 IWL_CALIB_CFG_PAPD_IDX = BIT(3),
282 IWL_CALIB_CFG_TX_PWR_IDX = BIT(4),
283 IWL_CALIB_CFG_DC_IDX = BIT(5),
284 IWL_CALIB_CFG_BB_FILTER_IDX = BIT(6),
285 IWL_CALIB_CFG_LO_LEAKAGE_IDX = BIT(7),
286 IWL_CALIB_CFG_TX_IQ_IDX = BIT(8),
287 IWL_CALIB_CFG_TX_IQ_SKEW_IDX = BIT(9),
288 IWL_CALIB_CFG_RX_IQ_IDX = BIT(10),
289 IWL_CALIB_CFG_RX_IQ_SKEW_IDX = BIT(11),
290 IWL_CALIB_CFG_SENSITIVITY_IDX = BIT(12),
291 IWL_CALIB_CFG_CHAIN_NOISE_IDX = BIT(13),
292 IWL_CALIB_CFG_DISCONNECTED_ANT_IDX = BIT(14),
293 IWL_CALIB_CFG_ANT_COUPLING_IDX = BIT(15),
294 IWL_CALIB_CFG_DAC_IDX = BIT(16),
295 IWL_CALIB_CFG_ABS_IDX = BIT(17),
296 IWL_CALIB_CFG_AGC_IDX = BIT(18),
297};
298
299/*
300 * Phy configuration command.
301 */
302struct iwl_phy_cfg_cmd {
303 __le32 phy_cfg;
304 struct iwl_calib_ctrl calib_control;
305} __packed;
306
307#define PHY_CFG_RADIO_TYPE (BIT(0) | BIT(1))
308#define PHY_CFG_RADIO_STEP (BIT(2) | BIT(3))
309#define PHY_CFG_RADIO_DASH (BIT(4) | BIT(5))
310#define PHY_CFG_PRODUCT_NUMBER (BIT(6) | BIT(7))
311#define PHY_CFG_TX_CHAIN_A BIT(8)
312#define PHY_CFG_TX_CHAIN_B BIT(9)
313#define PHY_CFG_TX_CHAIN_C BIT(10)
314#define PHY_CFG_RX_CHAIN_A BIT(12)
315#define PHY_CFG_RX_CHAIN_B BIT(13)
316#define PHY_CFG_RX_CHAIN_C BIT(14)
317
318
319/* Target of the NVM_ACCESS_CMD */
320enum {
321 NVM_ACCESS_TARGET_CACHE = 0,
322 NVM_ACCESS_TARGET_OTP = 1,
323 NVM_ACCESS_TARGET_EEPROM = 2,
324};
325
Emmanuel Grumbachb9545b42013-03-06 11:34:44 +0200326/* Section types for NVM_ACCESS_CMD */
Johannes Berg8ca151b2013-01-24 14:25:36 +0100327enum {
Eran Hararyae2b21b2014-01-09 08:08:24 +0200328 NVM_SECTION_TYPE_SW = 1,
Eran Harary77db0a32014-02-04 14:21:38 +0200329 NVM_SECTION_TYPE_REGULATORY = 3,
Eran Hararyae2b21b2014-01-09 08:08:24 +0200330 NVM_SECTION_TYPE_CALIBRATION = 4,
331 NVM_SECTION_TYPE_PRODUCTION = 5,
Eran Harary77db0a32014-02-04 14:21:38 +0200332 NVM_SECTION_TYPE_MAC_OVERRIDE = 11,
333 NVM_MAX_NUM_SECTIONS = 12,
Johannes Berg8ca151b2013-01-24 14:25:36 +0100334};
335
336/**
337 * struct iwl_nvm_access_cmd_ver2 - Request the device to send an NVM section
338 * @op_code: 0 - read, 1 - write
339 * @target: NVM_ACCESS_TARGET_*
340 * @type: NVM_SECTION_TYPE_*
341 * @offset: offset in bytes into the section
342 * @length: in bytes, to read/write
343 * @data: if write operation, the data to write. On read its empty
344 */
Emmanuel Grumbachb9545b42013-03-06 11:34:44 +0200345struct iwl_nvm_access_cmd {
Johannes Berg8ca151b2013-01-24 14:25:36 +0100346 u8 op_code;
347 u8 target;
348 __le16 type;
349 __le16 offset;
350 __le16 length;
351 u8 data[];
352} __packed; /* NVM_ACCESS_CMD_API_S_VER_2 */
353
354/**
355 * struct iwl_nvm_access_resp_ver2 - response to NVM_ACCESS_CMD
356 * @offset: offset in bytes into the section
357 * @length: in bytes, either how much was written or read
358 * @type: NVM_SECTION_TYPE_*
359 * @status: 0 for success, fail otherwise
360 * @data: if read operation, the data returned. Empty on write.
361 */
Emmanuel Grumbachb9545b42013-03-06 11:34:44 +0200362struct iwl_nvm_access_resp {
Johannes Berg8ca151b2013-01-24 14:25:36 +0100363 __le16 offset;
364 __le16 length;
365 __le16 type;
366 __le16 status;
367 u8 data[];
368} __packed; /* NVM_ACCESS_CMD_RESP_API_S_VER_2 */
369
370/* MVM_ALIVE 0x1 */
371
372/* alive response is_valid values */
373#define ALIVE_RESP_UCODE_OK BIT(0)
374#define ALIVE_RESP_RFKILL BIT(1)
375
376/* alive response ver_type values */
377enum {
378 FW_TYPE_HW = 0,
379 FW_TYPE_PROT = 1,
380 FW_TYPE_AP = 2,
381 FW_TYPE_WOWLAN = 3,
382 FW_TYPE_TIMING = 4,
383 FW_TYPE_WIPAN = 5
384};
385
386/* alive response ver_subtype values */
387enum {
388 FW_SUBTYPE_FULL_FEATURE = 0,
389 FW_SUBTYPE_BOOTSRAP = 1, /* Not valid */
390 FW_SUBTYPE_REDUCED = 2,
391 FW_SUBTYPE_ALIVE_ONLY = 3,
392 FW_SUBTYPE_WOWLAN = 4,
393 FW_SUBTYPE_AP_SUBTYPE = 5,
394 FW_SUBTYPE_WIPAN = 6,
395 FW_SUBTYPE_INITIALIZE = 9
396};
397
398#define IWL_ALIVE_STATUS_ERR 0xDEAD
399#define IWL_ALIVE_STATUS_OK 0xCAFE
400
401#define IWL_ALIVE_FLG_RFKILL BIT(0)
402
403struct mvm_alive_resp {
404 __le16 status;
405 __le16 flags;
406 u8 ucode_minor;
407 u8 ucode_major;
408 __le16 id;
409 u8 api_minor;
410 u8 api_major;
411 u8 ver_subtype;
412 u8 ver_type;
413 u8 mac;
414 u8 opt;
415 __le16 reserved2;
416 __le32 timestamp;
417 __le32 error_event_table_ptr; /* SRAM address for error log */
418 __le32 log_event_table_ptr; /* SRAM address for event log */
419 __le32 cpu_register_ptr;
420 __le32 dbgm_config_ptr;
421 __le32 alive_counter_ptr;
422 __le32 scd_base_ptr; /* SRAM address for SCD */
423} __packed; /* ALIVE_RES_API_S_VER_1 */
424
Eran Harary01a9ca52014-02-03 09:29:57 +0200425struct mvm_alive_resp_ver2 {
426 __le16 status;
427 __le16 flags;
428 u8 ucode_minor;
429 u8 ucode_major;
430 __le16 id;
431 u8 api_minor;
432 u8 api_major;
433 u8 ver_subtype;
434 u8 ver_type;
435 u8 mac;
436 u8 opt;
437 __le16 reserved2;
438 __le32 timestamp;
439 __le32 error_event_table_ptr; /* SRAM address for error log */
440 __le32 log_event_table_ptr; /* SRAM address for LMAC event log */
441 __le32 cpu_register_ptr;
442 __le32 dbgm_config_ptr;
443 __le32 alive_counter_ptr;
444 __le32 scd_base_ptr; /* SRAM address for SCD */
445 __le32 st_fwrd_addr; /* pointer to Store and forward */
446 __le32 st_fwrd_size;
447 u8 umac_minor; /* UMAC version: minor */
448 u8 umac_major; /* UMAC version: major */
449 __le16 umac_id; /* UMAC version: id */
450 __le32 error_info_addr; /* SRAM address for UMAC error log */
451 __le32 dbg_print_buff_addr;
452} __packed; /* ALIVE_RES_API_S_VER_2 */
453
Johannes Berg8ca151b2013-01-24 14:25:36 +0100454/* Error response/notification */
455enum {
456 FW_ERR_UNKNOWN_CMD = 0x0,
457 FW_ERR_INVALID_CMD_PARAM = 0x1,
458 FW_ERR_SERVICE = 0x2,
459 FW_ERR_ARC_MEMORY = 0x3,
460 FW_ERR_ARC_CODE = 0x4,
461 FW_ERR_WATCH_DOG = 0x5,
462 FW_ERR_WEP_GRP_KEY_INDX = 0x10,
463 FW_ERR_WEP_KEY_SIZE = 0x11,
464 FW_ERR_OBSOLETE_FUNC = 0x12,
465 FW_ERR_UNEXPECTED = 0xFE,
466 FW_ERR_FATAL = 0xFF
467};
468
469/**
470 * struct iwl_error_resp - FW error indication
471 * ( REPLY_ERROR = 0x2 )
472 * @error_type: one of FW_ERR_*
473 * @cmd_id: the command ID for which the error occured
474 * @bad_cmd_seq_num: sequence number of the erroneous command
475 * @error_service: which service created the error, applicable only if
476 * error_type = 2, otherwise 0
477 * @timestamp: TSF in usecs.
478 */
479struct iwl_error_resp {
480 __le32 error_type;
481 u8 cmd_id;
482 u8 reserved1;
483 __le16 bad_cmd_seq_num;
484 __le32 error_service;
485 __le64 timestamp;
486} __packed;
487
488
489/* Common PHY, MAC and Bindings definitions */
490
491#define MAX_MACS_IN_BINDING (3)
492#define MAX_BINDINGS (4)
493#define AUX_BINDING_INDEX (3)
494#define MAX_PHYS (4)
495
496/* Used to extract ID and color from the context dword */
497#define FW_CTXT_ID_POS (0)
498#define FW_CTXT_ID_MSK (0xff << FW_CTXT_ID_POS)
499#define FW_CTXT_COLOR_POS (8)
500#define FW_CTXT_COLOR_MSK (0xff << FW_CTXT_COLOR_POS)
501#define FW_CTXT_INVALID (0xffffffff)
502
503#define FW_CMD_ID_AND_COLOR(_id, _color) ((_id << FW_CTXT_ID_POS) |\
504 (_color << FW_CTXT_COLOR_POS))
505
506/* Possible actions on PHYs, MACs and Bindings */
507enum {
508 FW_CTXT_ACTION_STUB = 0,
509 FW_CTXT_ACTION_ADD,
510 FW_CTXT_ACTION_MODIFY,
511 FW_CTXT_ACTION_REMOVE,
512 FW_CTXT_ACTION_NUM
513}; /* COMMON_CONTEXT_ACTION_API_E_VER_1 */
514
515/* Time Events */
516
517/* Time Event types, according to MAC type */
518enum iwl_time_event_type {
519 /* BSS Station Events */
520 TE_BSS_STA_AGGRESSIVE_ASSOC,
521 TE_BSS_STA_ASSOC,
522 TE_BSS_EAP_DHCP_PROT,
523 TE_BSS_QUIET_PERIOD,
524
525 /* P2P Device Events */
526 TE_P2P_DEVICE_DISCOVERABLE,
527 TE_P2P_DEVICE_LISTEN,
528 TE_P2P_DEVICE_ACTION_SCAN,
529 TE_P2P_DEVICE_FULL_SCAN,
530
531 /* P2P Client Events */
532 TE_P2P_CLIENT_AGGRESSIVE_ASSOC,
533 TE_P2P_CLIENT_ASSOC,
534 TE_P2P_CLIENT_QUIET_PERIOD,
535
536 /* P2P GO Events */
537 TE_P2P_GO_ASSOC_PROT,
538 TE_P2P_GO_REPETITIVE_NOA,
539 TE_P2P_GO_CT_WINDOW,
540
541 /* WiDi Sync Events */
542 TE_WIDI_TX_SYNC,
543
Andrei Otcheretianski7f0a7c62014-05-04 11:48:12 +0300544 /* Channel Switch NoA */
545 TE_P2P_GO_CSA_NOA,
546
Johannes Berg8ca151b2013-01-24 14:25:36 +0100547 TE_MAX
548}; /* MAC_EVENT_TYPE_API_E_VER_1 */
549
Eytan Lifshitzf8f03c32013-08-07 19:36:42 +0300550
551
552/* Time event - defines for command API v1 */
Johannes Berg8ca151b2013-01-24 14:25:36 +0100553
554/*
Eytan Lifshitzf8f03c32013-08-07 19:36:42 +0300555 * @TE_V1_FRAG_NONE: fragmentation of the time event is NOT allowed.
556 * @TE_V1_FRAG_SINGLE: fragmentation of the time event is allowed, but only
557 * the first fragment is scheduled.
558 * @TE_V1_FRAG_DUAL: fragmentation of the time event is allowed, but only
559 * the first 2 fragments are scheduled.
560 * @TE_V1_FRAG_ENDLESS: fragmentation of the time event is allowed, and any
561 * number of fragments are valid.
Johannes Berg8ca151b2013-01-24 14:25:36 +0100562 *
563 * Other than the constant defined above, specifying a fragmentation value 'x'
564 * means that the event can be fragmented but only the first 'x' will be
565 * scheduled.
566 */
567enum {
Eytan Lifshitzf8f03c32013-08-07 19:36:42 +0300568 TE_V1_FRAG_NONE = 0,
569 TE_V1_FRAG_SINGLE = 1,
570 TE_V1_FRAG_DUAL = 2,
571 TE_V1_FRAG_ENDLESS = 0xffffffff
Johannes Berg8ca151b2013-01-24 14:25:36 +0100572};
573
Johannes Berg8ca151b2013-01-24 14:25:36 +0100574/* If a Time Event can be fragmented, this is the max number of fragments */
Eytan Lifshitzf8f03c32013-08-07 19:36:42 +0300575#define TE_V1_FRAG_MAX_MSK 0x0fffffff
576/* Repeat the time event endlessly (until removed) */
577#define TE_V1_REPEAT_ENDLESS 0xffffffff
578/* If a Time Event has bounded repetitions, this is the maximal value */
579#define TE_V1_REPEAT_MAX_MSK_V1 0x0fffffff
580
581/* Time Event dependencies: none, on another TE, or in a specific time */
582enum {
583 TE_V1_INDEPENDENT = 0,
584 TE_V1_DEP_OTHER = BIT(0),
585 TE_V1_DEP_TSF = BIT(1),
586 TE_V1_EVENT_SOCIOPATHIC = BIT(2),
587}; /* MAC_EVENT_DEPENDENCY_POLICY_API_E_VER_2 */
588
589/*
590 * @TE_V1_NOTIF_NONE: no notifications
591 * @TE_V1_NOTIF_HOST_EVENT_START: request/receive notification on event start
592 * @TE_V1_NOTIF_HOST_EVENT_END:request/receive notification on event end
593 * @TE_V1_NOTIF_INTERNAL_EVENT_START: internal FW use
594 * @TE_V1_NOTIF_INTERNAL_EVENT_END: internal FW use.
595 * @TE_V1_NOTIF_HOST_FRAG_START: request/receive notification on frag start
596 * @TE_V1_NOTIF_HOST_FRAG_END:request/receive notification on frag end
597 * @TE_V1_NOTIF_INTERNAL_FRAG_START: internal FW use.
598 * @TE_V1_NOTIF_INTERNAL_FRAG_END: internal FW use.
599 *
600 * Supported Time event notifications configuration.
601 * A notification (both event and fragment) includes a status indicating weather
602 * the FW was able to schedule the event or not. For fragment start/end
603 * notification the status is always success. There is no start/end fragment
604 * notification for monolithic events.
605 */
606enum {
607 TE_V1_NOTIF_NONE = 0,
608 TE_V1_NOTIF_HOST_EVENT_START = BIT(0),
609 TE_V1_NOTIF_HOST_EVENT_END = BIT(1),
610 TE_V1_NOTIF_INTERNAL_EVENT_START = BIT(2),
611 TE_V1_NOTIF_INTERNAL_EVENT_END = BIT(3),
612 TE_V1_NOTIF_HOST_FRAG_START = BIT(4),
613 TE_V1_NOTIF_HOST_FRAG_END = BIT(5),
614 TE_V1_NOTIF_INTERNAL_FRAG_START = BIT(6),
615 TE_V1_NOTIF_INTERNAL_FRAG_END = BIT(7),
616}; /* MAC_EVENT_ACTION_API_E_VER_2 */
617
Emmanuel Grumbacha373f672014-03-30 08:40:46 +0300618/* Time event - defines for command API */
Eytan Lifshitzf8f03c32013-08-07 19:36:42 +0300619
620/*
621 * @TE_V2_FRAG_NONE: fragmentation of the time event is NOT allowed.
622 * @TE_V2_FRAG_SINGLE: fragmentation of the time event is allowed, but only
623 * the first fragment is scheduled.
624 * @TE_V2_FRAG_DUAL: fragmentation of the time event is allowed, but only
625 * the first 2 fragments are scheduled.
626 * @TE_V2_FRAG_ENDLESS: fragmentation of the time event is allowed, and any
627 * number of fragments are valid.
628 *
629 * Other than the constant defined above, specifying a fragmentation value 'x'
630 * means that the event can be fragmented but only the first 'x' will be
631 * scheduled.
632 */
633enum {
634 TE_V2_FRAG_NONE = 0,
635 TE_V2_FRAG_SINGLE = 1,
636 TE_V2_FRAG_DUAL = 2,
637 TE_V2_FRAG_MAX = 0xfe,
638 TE_V2_FRAG_ENDLESS = 0xff
639};
640
641/* Repeat the time event endlessly (until removed) */
642#define TE_V2_REPEAT_ENDLESS 0xff
643/* If a Time Event has bounded repetitions, this is the maximal value */
644#define TE_V2_REPEAT_MAX 0xfe
645
646#define TE_V2_PLACEMENT_POS 12
647#define TE_V2_ABSENCE_POS 15
648
Emmanuel Grumbacha373f672014-03-30 08:40:46 +0300649/* Time event policy values
Eytan Lifshitzf8f03c32013-08-07 19:36:42 +0300650 * A notification (both event and fragment) includes a status indicating weather
651 * the FW was able to schedule the event or not. For fragment start/end
652 * notification the status is always success. There is no start/end fragment
653 * notification for monolithic events.
654 *
655 * @TE_V2_DEFAULT_POLICY: independent, social, present, unoticable
656 * @TE_V2_NOTIF_HOST_EVENT_START: request/receive notification on event start
657 * @TE_V2_NOTIF_HOST_EVENT_END:request/receive notification on event end
658 * @TE_V2_NOTIF_INTERNAL_EVENT_START: internal FW use
659 * @TE_V2_NOTIF_INTERNAL_EVENT_END: internal FW use.
660 * @TE_V2_NOTIF_HOST_FRAG_START: request/receive notification on frag start
661 * @TE_V2_NOTIF_HOST_FRAG_END:request/receive notification on frag end
662 * @TE_V2_NOTIF_INTERNAL_FRAG_START: internal FW use.
663 * @TE_V2_NOTIF_INTERNAL_FRAG_END: internal FW use.
664 * @TE_V2_DEP_OTHER: depends on another time event
665 * @TE_V2_DEP_TSF: depends on a specific time
666 * @TE_V2_EVENT_SOCIOPATHIC: can't co-exist with other events of tha same MAC
667 * @TE_V2_ABSENCE: are we present or absent during the Time Event.
668 */
669enum {
670 TE_V2_DEFAULT_POLICY = 0x0,
671
672 /* notifications (event start/stop, fragment start/stop) */
673 TE_V2_NOTIF_HOST_EVENT_START = BIT(0),
674 TE_V2_NOTIF_HOST_EVENT_END = BIT(1),
675 TE_V2_NOTIF_INTERNAL_EVENT_START = BIT(2),
676 TE_V2_NOTIF_INTERNAL_EVENT_END = BIT(3),
677
678 TE_V2_NOTIF_HOST_FRAG_START = BIT(4),
679 TE_V2_NOTIF_HOST_FRAG_END = BIT(5),
680 TE_V2_NOTIF_INTERNAL_FRAG_START = BIT(6),
681 TE_V2_NOTIF_INTERNAL_FRAG_END = BIT(7),
Emmanuel Grumbach1f6bf072014-02-16 15:36:00 +0200682 T2_V2_START_IMMEDIATELY = BIT(11),
Eytan Lifshitzf8f03c32013-08-07 19:36:42 +0300683
684 TE_V2_NOTIF_MSK = 0xff,
685
686 /* placement characteristics */
687 TE_V2_DEP_OTHER = BIT(TE_V2_PLACEMENT_POS),
688 TE_V2_DEP_TSF = BIT(TE_V2_PLACEMENT_POS + 1),
689 TE_V2_EVENT_SOCIOPATHIC = BIT(TE_V2_PLACEMENT_POS + 2),
690
691 /* are we present or absent during the Time Event. */
692 TE_V2_ABSENCE = BIT(TE_V2_ABSENCE_POS),
693};
694
695/**
Emmanuel Grumbacha373f672014-03-30 08:40:46 +0300696 * struct iwl_time_event_cmd_api - configuring Time Events
Eytan Lifshitzf8f03c32013-08-07 19:36:42 +0300697 * with struct MAC_TIME_EVENT_DATA_API_S_VER_2 (see also
698 * with version 1. determined by IWL_UCODE_TLV_FLAGS)
699 * ( TIME_EVENT_CMD = 0x29 )
700 * @id_and_color: ID and color of the relevant MAC
701 * @action: action to perform, one of FW_CTXT_ACTION_*
702 * @id: this field has two meanings, depending on the action:
703 * If the action is ADD, then it means the type of event to add.
704 * For all other actions it is the unique event ID assigned when the
705 * event was added by the FW.
706 * @apply_time: When to start the Time Event (in GP2)
707 * @max_delay: maximum delay to event's start (apply time), in TU
708 * @depends_on: the unique ID of the event we depend on (if any)
709 * @interval: interval between repetitions, in TU
710 * @duration: duration of event in TU
711 * @repeat: how many repetitions to do, can be TE_REPEAT_ENDLESS
712 * @max_frags: maximal number of fragments the Time Event can be divided to
713 * @policy: defines whether uCode shall notify the host or other uCode modules
714 * on event and/or fragment start and/or end
715 * using one of TE_INDEPENDENT, TE_DEP_OTHER, TE_DEP_TSF
716 * TE_EVENT_SOCIOPATHIC
717 * using TE_ABSENCE and using TE_NOTIF_*
718 */
Emmanuel Grumbacha373f672014-03-30 08:40:46 +0300719struct iwl_time_event_cmd {
Eytan Lifshitzf8f03c32013-08-07 19:36:42 +0300720 /* COMMON_INDEX_HDR_API_S_VER_1 */
721 __le32 id_and_color;
722 __le32 action;
723 __le32 id;
724 /* MAC_TIME_EVENT_DATA_API_S_VER_2 */
725 __le32 apply_time;
726 __le32 max_delay;
727 __le32 depends_on;
728 __le32 interval;
729 __le32 duration;
730 u8 repeat;
731 u8 max_frags;
732 __le16 policy;
733} __packed; /* MAC_TIME_EVENT_CMD_API_S_VER_2 */
734
Johannes Berg8ca151b2013-01-24 14:25:36 +0100735/**
736 * struct iwl_time_event_resp - response structure to iwl_time_event_cmd
737 * @status: bit 0 indicates success, all others specify errors
738 * @id: the Time Event type
739 * @unique_id: the unique ID assigned (in ADD) or given (others) to the TE
740 * @id_and_color: ID and color of the relevant MAC
741 */
742struct iwl_time_event_resp {
743 __le32 status;
744 __le32 id;
745 __le32 unique_id;
746 __le32 id_and_color;
747} __packed; /* MAC_TIME_EVENT_RSP_API_S_VER_1 */
748
749/**
750 * struct iwl_time_event_notif - notifications of time event start/stop
751 * ( TIME_EVENT_NOTIFICATION = 0x2a )
752 * @timestamp: action timestamp in GP2
753 * @session_id: session's unique id
754 * @unique_id: unique id of the Time Event itself
755 * @id_and_color: ID and color of the relevant MAC
756 * @action: one of TE_NOTIF_START or TE_NOTIF_END
757 * @status: true if scheduled, false otherwise (not executed)
758 */
759struct iwl_time_event_notif {
760 __le32 timestamp;
761 __le32 session_id;
762 __le32 unique_id;
763 __le32 id_and_color;
764 __le32 action;
765 __le32 status;
766} __packed; /* MAC_TIME_EVENT_NTFY_API_S_VER_1 */
767
768
769/* Bindings and Time Quota */
770
771/**
772 * struct iwl_binding_cmd - configuring bindings
773 * ( BINDING_CONTEXT_CMD = 0x2b )
774 * @id_and_color: ID and color of the relevant Binding
775 * @action: action to perform, one of FW_CTXT_ACTION_*
776 * @macs: array of MAC id and colors which belong to the binding
777 * @phy: PHY id and color which belongs to the binding
778 */
779struct iwl_binding_cmd {
780 /* COMMON_INDEX_HDR_API_S_VER_1 */
781 __le32 id_and_color;
782 __le32 action;
783 /* BINDING_DATA_API_S_VER_1 */
784 __le32 macs[MAX_MACS_IN_BINDING];
785 __le32 phy;
786} __packed; /* BINDING_CMD_API_S_VER_1 */
787
Ilan Peer35adfd62013-02-04 13:16:24 +0200788/* The maximal number of fragments in the FW's schedule session */
789#define IWL_MVM_MAX_QUOTA 128
790
Johannes Berg8ca151b2013-01-24 14:25:36 +0100791/**
792 * struct iwl_time_quota_data - configuration of time quota per binding
793 * @id_and_color: ID and color of the relevant Binding
794 * @quota: absolute time quota in TU. The scheduler will try to divide the
795 * remainig quota (after Time Events) according to this quota.
796 * @max_duration: max uninterrupted context duration in TU
797 */
798struct iwl_time_quota_data {
799 __le32 id_and_color;
800 __le32 quota;
801 __le32 max_duration;
802} __packed; /* TIME_QUOTA_DATA_API_S_VER_1 */
803
804/**
805 * struct iwl_time_quota_cmd - configuration of time quota between bindings
806 * ( TIME_QUOTA_CMD = 0x2c )
807 * @quotas: allocations per binding
808 */
809struct iwl_time_quota_cmd {
810 struct iwl_time_quota_data quotas[MAX_BINDINGS];
811} __packed; /* TIME_QUOTA_ALLOCATION_CMD_API_S_VER_1 */
812
813
814/* PHY context */
815
816/* Supported bands */
817#define PHY_BAND_5 (0)
818#define PHY_BAND_24 (1)
819
820/* Supported channel width, vary if there is VHT support */
821#define PHY_VHT_CHANNEL_MODE20 (0x0)
822#define PHY_VHT_CHANNEL_MODE40 (0x1)
823#define PHY_VHT_CHANNEL_MODE80 (0x2)
824#define PHY_VHT_CHANNEL_MODE160 (0x3)
825
826/*
827 * Control channel position:
828 * For legacy set bit means upper channel, otherwise lower.
829 * For VHT - bit-2 marks if the control is lower/upper relative to center-freq
830 * bits-1:0 mark the distance from the center freq. for 20Mhz, offset is 0.
831 * center_freq
832 * |
833 * 40Mhz |_______|_______|
834 * 80Mhz |_______|_______|_______|_______|
835 * 160Mhz |_______|_______|_______|_______|_______|_______|_______|_______|
836 * code 011 010 001 000 | 100 101 110 111
837 */
838#define PHY_VHT_CTRL_POS_1_BELOW (0x0)
839#define PHY_VHT_CTRL_POS_2_BELOW (0x1)
840#define PHY_VHT_CTRL_POS_3_BELOW (0x2)
841#define PHY_VHT_CTRL_POS_4_BELOW (0x3)
842#define PHY_VHT_CTRL_POS_1_ABOVE (0x4)
843#define PHY_VHT_CTRL_POS_2_ABOVE (0x5)
844#define PHY_VHT_CTRL_POS_3_ABOVE (0x6)
845#define PHY_VHT_CTRL_POS_4_ABOVE (0x7)
846
847/*
848 * @band: PHY_BAND_*
849 * @channel: channel number
850 * @width: PHY_[VHT|LEGACY]_CHANNEL_*
851 * @ctrl channel: PHY_[VHT|LEGACY]_CTRL_*
852 */
853struct iwl_fw_channel_info {
854 u8 band;
855 u8 channel;
856 u8 width;
857 u8 ctrl_pos;
858} __packed;
859
860#define PHY_RX_CHAIN_DRIVER_FORCE_POS (0)
861#define PHY_RX_CHAIN_DRIVER_FORCE_MSK \
862 (0x1 << PHY_RX_CHAIN_DRIVER_FORCE_POS)
863#define PHY_RX_CHAIN_VALID_POS (1)
864#define PHY_RX_CHAIN_VALID_MSK \
865 (0x7 << PHY_RX_CHAIN_VALID_POS)
866#define PHY_RX_CHAIN_FORCE_SEL_POS (4)
867#define PHY_RX_CHAIN_FORCE_SEL_MSK \
868 (0x7 << PHY_RX_CHAIN_FORCE_SEL_POS)
869#define PHY_RX_CHAIN_FORCE_MIMO_SEL_POS (7)
870#define PHY_RX_CHAIN_FORCE_MIMO_SEL_MSK \
871 (0x7 << PHY_RX_CHAIN_FORCE_MIMO_SEL_POS)
872#define PHY_RX_CHAIN_CNT_POS (10)
873#define PHY_RX_CHAIN_CNT_MSK \
874 (0x3 << PHY_RX_CHAIN_CNT_POS)
875#define PHY_RX_CHAIN_MIMO_CNT_POS (12)
876#define PHY_RX_CHAIN_MIMO_CNT_MSK \
877 (0x3 << PHY_RX_CHAIN_MIMO_CNT_POS)
878#define PHY_RX_CHAIN_MIMO_FORCE_POS (14)
879#define PHY_RX_CHAIN_MIMO_FORCE_MSK \
880 (0x1 << PHY_RX_CHAIN_MIMO_FORCE_POS)
881
882/* TODO: fix the value, make it depend on firmware at runtime? */
883#define NUM_PHY_CTX 3
884
885/* TODO: complete missing documentation */
886/**
887 * struct iwl_phy_context_cmd - config of the PHY context
888 * ( PHY_CONTEXT_CMD = 0x8 )
889 * @id_and_color: ID and color of the relevant Binding
890 * @action: action to perform, one of FW_CTXT_ACTION_*
891 * @apply_time: 0 means immediate apply and context switch.
892 * other value means apply new params after X usecs
893 * @tx_param_color: ???
894 * @channel_info:
895 * @txchain_info: ???
896 * @rxchain_info: ???
897 * @acquisition_data: ???
898 * @dsp_cfg_flags: set to 0
899 */
900struct iwl_phy_context_cmd {
901 /* COMMON_INDEX_HDR_API_S_VER_1 */
902 __le32 id_and_color;
903 __le32 action;
904 /* PHY_CONTEXT_DATA_API_S_VER_1 */
905 __le32 apply_time;
906 __le32 tx_param_color;
907 struct iwl_fw_channel_info ci;
908 __le32 txchain_info;
909 __le32 rxchain_info;
910 __le32 acquisition_data;
911 __le32 dsp_cfg_flags;
912} __packed; /* PHY_CONTEXT_CMD_API_VER_1 */
913
Ariej Marjieh720befbf2014-07-07 09:04:58 +0300914/*
915 * Aux ROC command
916 *
917 * Command requests the firmware to create a time event for a certain duration
918 * and remain on the given channel. This is done by using the Aux framework in
919 * the FW.
920 * The command was first used for Hot Spot issues - but can be used regardless
921 * to Hot Spot.
922 *
923 * ( HOT_SPOT_CMD 0x53 )
924 *
925 * @id_and_color: ID and color of the MAC
926 * @action: action to perform, one of FW_CTXT_ACTION_*
927 * @event_unique_id: If the action FW_CTXT_ACTION_REMOVE then the
928 * event_unique_id should be the id of the time event assigned by ucode.
929 * Otherwise ignore the event_unique_id.
930 * @sta_id_and_color: station id and color, resumed during "Remain On Channel"
931 * activity.
932 * @channel_info: channel info
933 * @node_addr: Our MAC Address
934 * @reserved: reserved for alignment
935 * @apply_time: GP2 value to start (should always be the current GP2 value)
936 * @apply_time_max_delay: Maximum apply time delay value in TU. Defines max
937 * time by which start of the event is allowed to be postponed.
938 * @duration: event duration in TU To calculate event duration:
939 * timeEventDuration = min(duration, remainingQuota)
940 */
941struct iwl_hs20_roc_req {
942 /* COMMON_INDEX_HDR_API_S_VER_1 hdr */
943 __le32 id_and_color;
944 __le32 action;
945 __le32 event_unique_id;
946 __le32 sta_id_and_color;
947 struct iwl_fw_channel_info channel_info;
948 u8 node_addr[ETH_ALEN];
949 __le16 reserved;
950 __le32 apply_time;
951 __le32 apply_time_max_delay;
952 __le32 duration;
953} __packed; /* HOT_SPOT_CMD_API_S_VER_1 */
954
955/*
956 * values for AUX ROC result values
957 */
958enum iwl_mvm_hot_spot {
959 HOT_SPOT_RSP_STATUS_OK,
960 HOT_SPOT_RSP_STATUS_TOO_MANY_EVENTS,
961 HOT_SPOT_MAX_NUM_OF_SESSIONS,
962};
963
964/*
965 * Aux ROC command response
966 *
967 * In response to iwl_hs20_roc_req the FW sends this command to notify the
968 * driver the uid of the timevent.
969 *
970 * ( HOT_SPOT_CMD 0x53 )
971 *
972 * @event_unique_id: Unique ID of time event assigned by ucode
973 * @status: Return status 0 is success, all the rest used for specific errors
974 */
975struct iwl_hs20_roc_res {
976 __le32 event_unique_id;
977 __le32 status;
978} __packed; /* HOT_SPOT_RSP_API_S_VER_1 */
979
Johannes Berg8ca151b2013-01-24 14:25:36 +0100980#define IWL_RX_INFO_PHY_CNT 8
Avri Altmana2d7b872013-07-09 01:42:17 +0300981#define IWL_RX_INFO_ENERGY_ANT_ABC_IDX 1
982#define IWL_RX_INFO_ENERGY_ANT_A_MSK 0x000000ff
983#define IWL_RX_INFO_ENERGY_ANT_B_MSK 0x0000ff00
984#define IWL_RX_INFO_ENERGY_ANT_C_MSK 0x00ff0000
985#define IWL_RX_INFO_ENERGY_ANT_A_POS 0
986#define IWL_RX_INFO_ENERGY_ANT_B_POS 8
987#define IWL_RX_INFO_ENERGY_ANT_C_POS 16
988
Johannes Berg8ca151b2013-01-24 14:25:36 +0100989#define IWL_RX_INFO_AGC_IDX 1
990#define IWL_RX_INFO_RSSI_AB_IDX 2
Emmanuel Grumbach8101a7f2013-02-28 11:54:28 +0200991#define IWL_OFDM_AGC_A_MSK 0x0000007f
992#define IWL_OFDM_AGC_A_POS 0
993#define IWL_OFDM_AGC_B_MSK 0x00003f80
994#define IWL_OFDM_AGC_B_POS 7
995#define IWL_OFDM_AGC_CODE_MSK 0x3fe00000
996#define IWL_OFDM_AGC_CODE_POS 20
Johannes Berg8ca151b2013-01-24 14:25:36 +0100997#define IWL_OFDM_RSSI_INBAND_A_MSK 0x00ff
Johannes Berg8ca151b2013-01-24 14:25:36 +0100998#define IWL_OFDM_RSSI_A_POS 0
Emmanuel Grumbach8101a7f2013-02-28 11:54:28 +0200999#define IWL_OFDM_RSSI_ALLBAND_A_MSK 0xff00
1000#define IWL_OFDM_RSSI_ALLBAND_A_POS 8
Johannes Berg8ca151b2013-01-24 14:25:36 +01001001#define IWL_OFDM_RSSI_INBAND_B_MSK 0xff0000
Johannes Berg8ca151b2013-01-24 14:25:36 +01001002#define IWL_OFDM_RSSI_B_POS 16
Emmanuel Grumbach8101a7f2013-02-28 11:54:28 +02001003#define IWL_OFDM_RSSI_ALLBAND_B_MSK 0xff000000
1004#define IWL_OFDM_RSSI_ALLBAND_B_POS 24
Johannes Berg8ca151b2013-01-24 14:25:36 +01001005
1006/**
1007 * struct iwl_rx_phy_info - phy info
1008 * (REPLY_RX_PHY_CMD = 0xc0)
1009 * @non_cfg_phy_cnt: non configurable DSP phy data byte count
1010 * @cfg_phy_cnt: configurable DSP phy data byte count
1011 * @stat_id: configurable DSP phy data set ID
1012 * @reserved1:
1013 * @system_timestamp: GP2 at on air rise
1014 * @timestamp: TSF at on air rise
1015 * @beacon_time_stamp: beacon at on-air rise
1016 * @phy_flags: general phy flags: band, modulation, ...
1017 * @channel: channel number
1018 * @non_cfg_phy_buf: for various implementations of non_cfg_phy
1019 * @rate_n_flags: RATE_MCS_*
1020 * @byte_count: frame's byte-count
1021 * @frame_time: frame's time on the air, based on byte count and frame rate
1022 * calculation
Emmanuel Grumbach6bfcb7e2013-03-03 10:19:45 +02001023 * @mac_active_msk: what MACs were active when the frame was received
Johannes Berg8ca151b2013-01-24 14:25:36 +01001024 *
1025 * Before each Rx, the device sends this data. It contains PHY information
1026 * about the reception of the packet.
1027 */
1028struct iwl_rx_phy_info {
1029 u8 non_cfg_phy_cnt;
1030 u8 cfg_phy_cnt;
1031 u8 stat_id;
1032 u8 reserved1;
1033 __le32 system_timestamp;
1034 __le64 timestamp;
1035 __le32 beacon_time_stamp;
1036 __le16 phy_flags;
1037 __le16 channel;
1038 __le32 non_cfg_phy[IWL_RX_INFO_PHY_CNT];
1039 __le32 rate_n_flags;
1040 __le32 byte_count;
Emmanuel Grumbach6bfcb7e2013-03-03 10:19:45 +02001041 __le16 mac_active_msk;
Johannes Berg8ca151b2013-01-24 14:25:36 +01001042 __le16 frame_time;
1043} __packed;
1044
1045struct iwl_rx_mpdu_res_start {
1046 __le16 byte_count;
1047 __le16 reserved;
1048} __packed;
1049
1050/**
1051 * enum iwl_rx_phy_flags - to parse %iwl_rx_phy_info phy_flags
1052 * @RX_RES_PHY_FLAGS_BAND_24: true if the packet was received on 2.4 band
1053 * @RX_RES_PHY_FLAGS_MOD_CCK:
1054 * @RX_RES_PHY_FLAGS_SHORT_PREAMBLE: true if packet's preamble was short
1055 * @RX_RES_PHY_FLAGS_NARROW_BAND:
1056 * @RX_RES_PHY_FLAGS_ANTENNA: antenna on which the packet was received
1057 * @RX_RES_PHY_FLAGS_AGG: set if the packet was part of an A-MPDU
1058 * @RX_RES_PHY_FLAGS_OFDM_HT: The frame was an HT frame
1059 * @RX_RES_PHY_FLAGS_OFDM_GF: The frame used GF preamble
1060 * @RX_RES_PHY_FLAGS_OFDM_VHT: The frame was a VHT frame
1061 */
1062enum iwl_rx_phy_flags {
1063 RX_RES_PHY_FLAGS_BAND_24 = BIT(0),
1064 RX_RES_PHY_FLAGS_MOD_CCK = BIT(1),
1065 RX_RES_PHY_FLAGS_SHORT_PREAMBLE = BIT(2),
1066 RX_RES_PHY_FLAGS_NARROW_BAND = BIT(3),
1067 RX_RES_PHY_FLAGS_ANTENNA = (0x7 << 4),
1068 RX_RES_PHY_FLAGS_ANTENNA_POS = 4,
1069 RX_RES_PHY_FLAGS_AGG = BIT(7),
1070 RX_RES_PHY_FLAGS_OFDM_HT = BIT(8),
1071 RX_RES_PHY_FLAGS_OFDM_GF = BIT(9),
1072 RX_RES_PHY_FLAGS_OFDM_VHT = BIT(10),
1073};
1074
1075/**
1076 * enum iwl_mvm_rx_status - written by fw for each Rx packet
1077 * @RX_MPDU_RES_STATUS_CRC_OK: CRC is fine
1078 * @RX_MPDU_RES_STATUS_OVERRUN_OK: there was no RXE overflow
1079 * @RX_MPDU_RES_STATUS_SRC_STA_FOUND:
1080 * @RX_MPDU_RES_STATUS_KEY_VALID:
1081 * @RX_MPDU_RES_STATUS_KEY_PARAM_OK:
1082 * @RX_MPDU_RES_STATUS_ICV_OK: ICV is fine, if not, the packet is destroyed
1083 * @RX_MPDU_RES_STATUS_MIC_OK: used for CCM alg only. TKIP MIC is checked
1084 * in the driver.
1085 * @RX_MPDU_RES_STATUS_TTAK_OK: TTAK is fine
1086 * @RX_MPDU_RES_STATUS_MNG_FRAME_REPLAY_ERR: valid for alg = CCM_CMAC or
1087 * alg = CCM only. Checks replay attack for 11w frames. Relevant only if
1088 * %RX_MPDU_RES_STATUS_ROBUST_MNG_FRAME is set.
1089 * @RX_MPDU_RES_STATUS_SEC_NO_ENC: this frame is not encrypted
1090 * @RX_MPDU_RES_STATUS_SEC_WEP_ENC: this frame is encrypted using WEP
1091 * @RX_MPDU_RES_STATUS_SEC_CCM_ENC: this frame is encrypted using CCM
1092 * @RX_MPDU_RES_STATUS_SEC_TKIP_ENC: this frame is encrypted using TKIP
1093 * @RX_MPDU_RES_STATUS_SEC_CCM_CMAC_ENC: this frame is encrypted using CCM_CMAC
1094 * @RX_MPDU_RES_STATUS_SEC_ENC_ERR: this frame couldn't be decrypted
1095 * @RX_MPDU_RES_STATUS_SEC_ENC_MSK: bitmask of the encryption algorithm
1096 * @RX_MPDU_RES_STATUS_DEC_DONE: this frame has been successfully decrypted
1097 * @RX_MPDU_RES_STATUS_PROTECT_FRAME_BIT_CMP:
1098 * @RX_MPDU_RES_STATUS_EXT_IV_BIT_CMP:
1099 * @RX_MPDU_RES_STATUS_KEY_ID_CMP_BIT:
1100 * @RX_MPDU_RES_STATUS_ROBUST_MNG_FRAME: this frame is an 11w management frame
1101 * @RX_MPDU_RES_STATUS_HASH_INDEX_MSK:
1102 * @RX_MPDU_RES_STATUS_STA_ID_MSK:
1103 * @RX_MPDU_RES_STATUS_RRF_KILL:
1104 * @RX_MPDU_RES_STATUS_FILTERING_MSK:
1105 * @RX_MPDU_RES_STATUS2_FILTERING_MSK:
1106 */
1107enum iwl_mvm_rx_status {
1108 RX_MPDU_RES_STATUS_CRC_OK = BIT(0),
1109 RX_MPDU_RES_STATUS_OVERRUN_OK = BIT(1),
1110 RX_MPDU_RES_STATUS_SRC_STA_FOUND = BIT(2),
1111 RX_MPDU_RES_STATUS_KEY_VALID = BIT(3),
1112 RX_MPDU_RES_STATUS_KEY_PARAM_OK = BIT(4),
1113 RX_MPDU_RES_STATUS_ICV_OK = BIT(5),
1114 RX_MPDU_RES_STATUS_MIC_OK = BIT(6),
1115 RX_MPDU_RES_STATUS_TTAK_OK = BIT(7),
1116 RX_MPDU_RES_STATUS_MNG_FRAME_REPLAY_ERR = BIT(7),
1117 RX_MPDU_RES_STATUS_SEC_NO_ENC = (0 << 8),
1118 RX_MPDU_RES_STATUS_SEC_WEP_ENC = (1 << 8),
1119 RX_MPDU_RES_STATUS_SEC_CCM_ENC = (2 << 8),
1120 RX_MPDU_RES_STATUS_SEC_TKIP_ENC = (3 << 8),
Max Stepanove36e5432013-08-27 19:56:13 +03001121 RX_MPDU_RES_STATUS_SEC_EXT_ENC = (4 << 8),
Johannes Berg8ca151b2013-01-24 14:25:36 +01001122 RX_MPDU_RES_STATUS_SEC_CCM_CMAC_ENC = (6 << 8),
1123 RX_MPDU_RES_STATUS_SEC_ENC_ERR = (7 << 8),
1124 RX_MPDU_RES_STATUS_SEC_ENC_MSK = (7 << 8),
1125 RX_MPDU_RES_STATUS_DEC_DONE = BIT(11),
1126 RX_MPDU_RES_STATUS_PROTECT_FRAME_BIT_CMP = BIT(12),
1127 RX_MPDU_RES_STATUS_EXT_IV_BIT_CMP = BIT(13),
1128 RX_MPDU_RES_STATUS_KEY_ID_CMP_BIT = BIT(14),
1129 RX_MPDU_RES_STATUS_ROBUST_MNG_FRAME = BIT(15),
1130 RX_MPDU_RES_STATUS_HASH_INDEX_MSK = (0x3F0000),
1131 RX_MPDU_RES_STATUS_STA_ID_MSK = (0x1f000000),
1132 RX_MPDU_RES_STATUS_RRF_KILL = BIT(29),
1133 RX_MPDU_RES_STATUS_FILTERING_MSK = (0xc00000),
1134 RX_MPDU_RES_STATUS2_FILTERING_MSK = (0xc0000000),
1135};
1136
1137/**
1138 * struct iwl_radio_version_notif - information on the radio version
1139 * ( RADIO_VERSION_NOTIFICATION = 0x68 )
1140 * @radio_flavor:
1141 * @radio_step:
1142 * @radio_dash:
1143 */
1144struct iwl_radio_version_notif {
1145 __le32 radio_flavor;
1146 __le32 radio_step;
1147 __le32 radio_dash;
1148} __packed; /* RADIO_VERSION_NOTOFICATION_S_VER_1 */
1149
1150enum iwl_card_state_flags {
1151 CARD_ENABLED = 0x00,
1152 HW_CARD_DISABLED = 0x01,
1153 SW_CARD_DISABLED = 0x02,
1154 CT_KILL_CARD_DISABLED = 0x04,
1155 HALT_CARD_DISABLED = 0x08,
1156 CARD_DISABLED_MSK = 0x0f,
1157 CARD_IS_RX_ON = 0x10,
1158};
1159
1160/**
1161 * struct iwl_radio_version_notif - information on the radio version
1162 * ( CARD_STATE_NOTIFICATION = 0xa1 )
1163 * @flags: %iwl_card_state_flags
1164 */
1165struct iwl_card_state_notif {
1166 __le32 flags;
1167} __packed; /* CARD_STATE_NTFY_API_S_VER_1 */
1168
1169/**
Hila Gonend64048e2013-03-13 18:00:03 +02001170 * struct iwl_missed_beacons_notif - information on missed beacons
1171 * ( MISSED_BEACONS_NOTIFICATION = 0xa2 )
1172 * @mac_id: interface ID
1173 * @consec_missed_beacons_since_last_rx: number of consecutive missed
1174 * beacons since last RX.
1175 * @consec_missed_beacons: number of consecutive missed beacons
1176 * @num_expected_beacons:
1177 * @num_recvd_beacons:
1178 */
1179struct iwl_missed_beacons_notif {
1180 __le32 mac_id;
1181 __le32 consec_missed_beacons_since_last_rx;
1182 __le32 consec_missed_beacons;
1183 __le32 num_expected_beacons;
1184 __le32 num_recvd_beacons;
1185} __packed; /* MISSED_BEACON_NTFY_API_S_VER_3 */
1186
1187/**
Johannes Berg8ca151b2013-01-24 14:25:36 +01001188 * struct iwl_set_calib_default_cmd - set default value for calibration.
1189 * ( SET_CALIB_DEFAULT_CMD = 0x8e )
1190 * @calib_index: the calibration to set value for
1191 * @length: of data
1192 * @data: the value to set for the calibration result
1193 */
1194struct iwl_set_calib_default_cmd {
1195 __le16 calib_index;
1196 __le16 length;
1197 u8 data[0];
1198} __packed; /* PHY_CALIB_OVERRIDE_VALUES_S */
1199
Emmanuel Grumbach51b6b9e2013-05-02 15:01:24 +03001200#define MAX_PORT_ID_NUM 2
Eliad Pellere59647e2013-11-28 14:08:50 +02001201#define MAX_MCAST_FILTERING_ADDRESSES 256
Emmanuel Grumbach51b6b9e2013-05-02 15:01:24 +03001202
1203/**
1204 * struct iwl_mcast_filter_cmd - configure multicast filter.
1205 * @filter_own: Set 1 to filter out multicast packets sent by station itself
1206 * @port_id: Multicast MAC addresses array specifier. This is a strange way
1207 * to identify network interface adopted in host-device IF.
1208 * It is used by FW as index in array of addresses. This array has
1209 * MAX_PORT_ID_NUM members.
1210 * @count: Number of MAC addresses in the array
1211 * @pass_all: Set 1 to pass all multicast packets.
1212 * @bssid: current association BSSID.
1213 * @addr_list: Place holder for array of MAC addresses.
1214 * IMPORTANT: add padding if necessary to ensure DWORD alignment.
1215 */
1216struct iwl_mcast_filter_cmd {
1217 u8 filter_own;
1218 u8 port_id;
1219 u8 count;
1220 u8 pass_all;
1221 u8 bssid[6];
1222 u8 reserved[2];
1223 u8 addr_list[0];
1224} __packed; /* MCAST_FILTERING_CMD_API_S_VER_1 */
1225
Eliad Pellerc87163b2014-01-08 10:11:11 +02001226#define MAX_BCAST_FILTERS 8
1227#define MAX_BCAST_FILTER_ATTRS 2
1228
1229/**
1230 * enum iwl_mvm_bcast_filter_attr_offset - written by fw for each Rx packet
1231 * @BCAST_FILTER_OFFSET_PAYLOAD_START: offset is from payload start.
1232 * @BCAST_FILTER_OFFSET_IP_END: offset is from ip header end (i.e.
1233 * start of ip payload).
1234 */
1235enum iwl_mvm_bcast_filter_attr_offset {
1236 BCAST_FILTER_OFFSET_PAYLOAD_START = 0,
1237 BCAST_FILTER_OFFSET_IP_END = 1,
1238};
1239
1240/**
1241 * struct iwl_fw_bcast_filter_attr - broadcast filter attribute
1242 * @offset_type: &enum iwl_mvm_bcast_filter_attr_offset.
1243 * @offset: starting offset of this pattern.
1244 * @val: value to match - big endian (MSB is the first
1245 * byte to match from offset pos).
1246 * @mask: mask to match (big endian).
1247 */
1248struct iwl_fw_bcast_filter_attr {
1249 u8 offset_type;
1250 u8 offset;
1251 __le16 reserved1;
1252 __be32 val;
1253 __be32 mask;
1254} __packed; /* BCAST_FILTER_ATT_S_VER_1 */
1255
1256/**
1257 * enum iwl_mvm_bcast_filter_frame_type - filter frame type
1258 * @BCAST_FILTER_FRAME_TYPE_ALL: consider all frames.
1259 * @BCAST_FILTER_FRAME_TYPE_IPV4: consider only ipv4 frames
1260 */
1261enum iwl_mvm_bcast_filter_frame_type {
1262 BCAST_FILTER_FRAME_TYPE_ALL = 0,
1263 BCAST_FILTER_FRAME_TYPE_IPV4 = 1,
1264};
1265
1266/**
1267 * struct iwl_fw_bcast_filter - broadcast filter
1268 * @discard: discard frame (1) or let it pass (0).
1269 * @frame_type: &enum iwl_mvm_bcast_filter_frame_type.
1270 * @num_attrs: number of valid attributes in this filter.
1271 * @attrs: attributes of this filter. a filter is considered matched
1272 * only when all its attributes are matched (i.e. AND relationship)
1273 */
1274struct iwl_fw_bcast_filter {
1275 u8 discard;
1276 u8 frame_type;
1277 u8 num_attrs;
1278 u8 reserved1;
1279 struct iwl_fw_bcast_filter_attr attrs[MAX_BCAST_FILTER_ATTRS];
1280} __packed; /* BCAST_FILTER_S_VER_1 */
1281
1282/**
1283 * struct iwl_fw_bcast_mac - per-mac broadcast filtering configuration.
1284 * @default_discard: default action for this mac (discard (1) / pass (0)).
1285 * @attached_filters: bitmap of relevant filters for this mac.
1286 */
1287struct iwl_fw_bcast_mac {
1288 u8 default_discard;
1289 u8 reserved1;
1290 __le16 attached_filters;
1291} __packed; /* BCAST_MAC_CONTEXT_S_VER_1 */
1292
1293/**
1294 * struct iwl_bcast_filter_cmd - broadcast filtering configuration
1295 * @disable: enable (0) / disable (1)
1296 * @max_bcast_filters: max number of filters (MAX_BCAST_FILTERS)
1297 * @max_macs: max number of macs (NUM_MAC_INDEX_DRIVER)
1298 * @filters: broadcast filters
1299 * @macs: broadcast filtering configuration per-mac
1300 */
1301struct iwl_bcast_filter_cmd {
1302 u8 disable;
1303 u8 max_bcast_filters;
1304 u8 max_macs;
1305 u8 reserved1;
1306 struct iwl_fw_bcast_filter filters[MAX_BCAST_FILTERS];
1307 struct iwl_fw_bcast_mac macs[NUM_MAC_INDEX_DRIVER];
1308} __packed; /* BCAST_FILTERING_HCMD_API_S_VER_1 */
1309
Eytan Lifshitz9ee718a2013-05-19 19:14:41 +03001310struct mvm_statistics_dbg {
1311 __le32 burst_check;
1312 __le32 burst_count;
1313 __le32 wait_for_silence_timeout_cnt;
1314 __le32 reserved[3];
1315} __packed; /* STATISTICS_DEBUG_API_S_VER_2 */
1316
1317struct mvm_statistics_div {
1318 __le32 tx_on_a;
1319 __le32 tx_on_b;
1320 __le32 exec_time;
1321 __le32 probe_time;
1322 __le32 rssi_ant;
1323 __le32 reserved2;
1324} __packed; /* STATISTICS_SLOW_DIV_API_S_VER_2 */
1325
1326struct mvm_statistics_general_common {
1327 __le32 temperature; /* radio temperature */
1328 __le32 temperature_m; /* radio voltage */
1329 struct mvm_statistics_dbg dbg;
1330 __le32 sleep_time;
1331 __le32 slots_out;
1332 __le32 slots_idle;
1333 __le32 ttl_timestamp;
1334 struct mvm_statistics_div div;
1335 __le32 rx_enable_counter;
1336 /*
1337 * num_of_sos_states:
1338 * count the number of times we have to re-tune
1339 * in order to get out of bad PHY status
1340 */
1341 __le32 num_of_sos_states;
1342} __packed; /* STATISTICS_GENERAL_API_S_VER_5 */
1343
1344struct mvm_statistics_rx_non_phy {
1345 __le32 bogus_cts; /* CTS received when not expecting CTS */
1346 __le32 bogus_ack; /* ACK received when not expecting ACK */
1347 __le32 non_bssid_frames; /* number of frames with BSSID that
1348 * doesn't belong to the STA BSSID */
1349 __le32 filtered_frames; /* count frames that were dumped in the
1350 * filtering process */
1351 __le32 non_channel_beacons; /* beacons with our bss id but not on
1352 * our serving channel */
1353 __le32 channel_beacons; /* beacons with our bss id and in our
1354 * serving channel */
1355 __le32 num_missed_bcon; /* number of missed beacons */
1356 __le32 adc_rx_saturation_time; /* count in 0.8us units the time the
1357 * ADC was in saturation */
1358 __le32 ina_detection_search_time;/* total time (in 0.8us) searched
1359 * for INA */
1360 __le32 beacon_silence_rssi_a; /* RSSI silence after beacon frame */
1361 __le32 beacon_silence_rssi_b; /* RSSI silence after beacon frame */
1362 __le32 beacon_silence_rssi_c; /* RSSI silence after beacon frame */
1363 __le32 interference_data_flag; /* flag for interference data
1364 * availability. 1 when data is
1365 * available. */
1366 __le32 channel_load; /* counts RX Enable time in uSec */
1367 __le32 dsp_false_alarms; /* DSP false alarm (both OFDM
1368 * and CCK) counter */
1369 __le32 beacon_rssi_a;
1370 __le32 beacon_rssi_b;
1371 __le32 beacon_rssi_c;
1372 __le32 beacon_energy_a;
1373 __le32 beacon_energy_b;
1374 __le32 beacon_energy_c;
1375 __le32 num_bt_kills;
1376 __le32 mac_id;
1377 __le32 directed_data_mpdu;
1378} __packed; /* STATISTICS_RX_NON_PHY_API_S_VER_3 */
1379
1380struct mvm_statistics_rx_phy {
1381 __le32 ina_cnt;
1382 __le32 fina_cnt;
1383 __le32 plcp_err;
1384 __le32 crc32_err;
1385 __le32 overrun_err;
1386 __le32 early_overrun_err;
1387 __le32 crc32_good;
1388 __le32 false_alarm_cnt;
1389 __le32 fina_sync_err_cnt;
1390 __le32 sfd_timeout;
1391 __le32 fina_timeout;
1392 __le32 unresponded_rts;
1393 __le32 rxe_frame_limit_overrun;
1394 __le32 sent_ack_cnt;
1395 __le32 sent_cts_cnt;
1396 __le32 sent_ba_rsp_cnt;
1397 __le32 dsp_self_kill;
1398 __le32 mh_format_err;
1399 __le32 re_acq_main_rssi_sum;
1400 __le32 reserved;
1401} __packed; /* STATISTICS_RX_PHY_API_S_VER_2 */
1402
1403struct mvm_statistics_rx_ht_phy {
1404 __le32 plcp_err;
1405 __le32 overrun_err;
1406 __le32 early_overrun_err;
1407 __le32 crc32_good;
1408 __le32 crc32_err;
1409 __le32 mh_format_err;
1410 __le32 agg_crc32_good;
1411 __le32 agg_mpdu_cnt;
1412 __le32 agg_cnt;
1413 __le32 unsupport_mcs;
1414} __packed; /* STATISTICS_HT_RX_PHY_API_S_VER_1 */
1415
1416#define MAX_CHAINS 3
1417
1418struct mvm_statistics_tx_non_phy_agg {
1419 __le32 ba_timeout;
1420 __le32 ba_reschedule_frames;
1421 __le32 scd_query_agg_frame_cnt;
1422 __le32 scd_query_no_agg;
1423 __le32 scd_query_agg;
1424 __le32 scd_query_mismatch;
1425 __le32 frame_not_ready;
1426 __le32 underrun;
1427 __le32 bt_prio_kill;
1428 __le32 rx_ba_rsp_cnt;
1429 __s8 txpower[MAX_CHAINS];
1430 __s8 reserved;
1431 __le32 reserved2;
1432} __packed; /* STATISTICS_TX_NON_PHY_AGG_API_S_VER_1 */
1433
1434struct mvm_statistics_tx_channel_width {
1435 __le32 ext_cca_narrow_ch20[1];
1436 __le32 ext_cca_narrow_ch40[2];
1437 __le32 ext_cca_narrow_ch80[3];
1438 __le32 ext_cca_narrow_ch160[4];
1439 __le32 last_tx_ch_width_indx;
1440 __le32 rx_detected_per_ch_width[4];
1441 __le32 success_per_ch_width[4];
1442 __le32 fail_per_ch_width[4];
1443}; /* STATISTICS_TX_CHANNEL_WIDTH_API_S_VER_1 */
1444
1445struct mvm_statistics_tx {
1446 __le32 preamble_cnt;
1447 __le32 rx_detected_cnt;
1448 __le32 bt_prio_defer_cnt;
1449 __le32 bt_prio_kill_cnt;
1450 __le32 few_bytes_cnt;
1451 __le32 cts_timeout;
1452 __le32 ack_timeout;
1453 __le32 expected_ack_cnt;
1454 __le32 actual_ack_cnt;
1455 __le32 dump_msdu_cnt;
1456 __le32 burst_abort_next_frame_mismatch_cnt;
1457 __le32 burst_abort_missing_next_frame_cnt;
1458 __le32 cts_timeout_collision;
1459 __le32 ack_or_ba_timeout_collision;
1460 struct mvm_statistics_tx_non_phy_agg agg;
1461 struct mvm_statistics_tx_channel_width channel_width;
1462} __packed; /* STATISTICS_TX_API_S_VER_4 */
1463
1464
1465struct mvm_statistics_bt_activity {
1466 __le32 hi_priority_tx_req_cnt;
1467 __le32 hi_priority_tx_denied_cnt;
1468 __le32 lo_priority_tx_req_cnt;
1469 __le32 lo_priority_tx_denied_cnt;
1470 __le32 hi_priority_rx_req_cnt;
1471 __le32 hi_priority_rx_denied_cnt;
1472 __le32 lo_priority_rx_req_cnt;
1473 __le32 lo_priority_rx_denied_cnt;
1474} __packed; /* STATISTICS_BT_ACTIVITY_API_S_VER_1 */
1475
1476struct mvm_statistics_general {
1477 struct mvm_statistics_general_common common;
1478 __le32 beacon_filtered;
1479 __le32 missed_beacons;
Andrei Otcheretianskia20fd392013-07-21 17:23:59 +03001480 __s8 beacon_filter_average_energy;
Eytan Lifshitz9ee718a2013-05-19 19:14:41 +03001481 __s8 beacon_filter_reason;
1482 __s8 beacon_filter_current_energy;
1483 __s8 beacon_filter_reserved;
1484 __le32 beacon_filter_delta_time;
1485 struct mvm_statistics_bt_activity bt_activity;
1486} __packed; /* STATISTICS_GENERAL_API_S_VER_5 */
1487
1488struct mvm_statistics_rx {
1489 struct mvm_statistics_rx_phy ofdm;
1490 struct mvm_statistics_rx_phy cck;
1491 struct mvm_statistics_rx_non_phy general;
1492 struct mvm_statistics_rx_ht_phy ofdm_ht;
1493} __packed; /* STATISTICS_RX_API_S_VER_3 */
1494
1495/*
1496 * STATISTICS_NOTIFICATION = 0x9d (notification only, not a command)
1497 *
1498 * By default, uCode issues this notification after receiving a beacon
1499 * while associated. To disable this behavior, set DISABLE_NOTIF flag in the
1500 * REPLY_STATISTICS_CMD 0x9c, above.
1501 *
1502 * Statistics counters continue to increment beacon after beacon, but are
1503 * cleared when changing channels or when driver issues REPLY_STATISTICS_CMD
1504 * 0x9c with CLEAR_STATS bit set (see above).
1505 *
1506 * uCode also issues this notification during scans. uCode clears statistics
1507 * appropriately so that each notification contains statistics for only the
1508 * one channel that has just been scanned.
1509 */
1510
1511struct iwl_notif_statistics { /* STATISTICS_NTFY_API_S_VER_8 */
1512 __le32 flag;
1513 struct mvm_statistics_rx rx;
1514 struct mvm_statistics_tx tx;
1515 struct mvm_statistics_general general;
1516} __packed;
1517
Lilach Edelstein1f3b0ff2013-10-06 13:03:32 +02001518/***********************************
1519 * Smart Fifo API
1520 ***********************************/
1521/* Smart Fifo state */
1522enum iwl_sf_state {
1523 SF_LONG_DELAY_ON = 0, /* should never be called by driver */
1524 SF_FULL_ON,
1525 SF_UNINIT,
1526 SF_INIT_OFF,
1527 SF_HW_NUM_STATES
1528};
1529
1530/* Smart Fifo possible scenario */
1531enum iwl_sf_scenario {
1532 SF_SCENARIO_SINGLE_UNICAST,
1533 SF_SCENARIO_AGG_UNICAST,
1534 SF_SCENARIO_MULTICAST,
1535 SF_SCENARIO_BA_RESP,
1536 SF_SCENARIO_TX_RESP,
1537 SF_NUM_SCENARIO
1538};
1539
1540#define SF_TRANSIENT_STATES_NUMBER 2 /* SF_LONG_DELAY_ON and SF_FULL_ON */
1541#define SF_NUM_TIMEOUT_TYPES 2 /* Aging timer and Idle timer */
1542
1543/* smart FIFO default values */
1544#define SF_W_MARK_SISO 4096
1545#define SF_W_MARK_MIMO2 8192
1546#define SF_W_MARK_MIMO3 6144
1547#define SF_W_MARK_LEGACY 4096
1548#define SF_W_MARK_SCAN 4096
1549
1550/* SF Scenarios timers for FULL_ON state (aligned to 32 uSec) */
1551#define SF_SINGLE_UNICAST_IDLE_TIMER 320 /* 300 uSec */
1552#define SF_SINGLE_UNICAST_AGING_TIMER 2016 /* 2 mSec */
1553#define SF_AGG_UNICAST_IDLE_TIMER 320 /* 300 uSec */
1554#define SF_AGG_UNICAST_AGING_TIMER 2016 /* 2 mSec */
1555#define SF_MCAST_IDLE_TIMER 2016 /* 2 mSec */
1556#define SF_MCAST_AGING_TIMER 10016 /* 10 mSec */
1557#define SF_BA_IDLE_TIMER 320 /* 300 uSec */
1558#define SF_BA_AGING_TIMER 2016 /* 2 mSec */
1559#define SF_TX_RE_IDLE_TIMER 320 /* 300 uSec */
1560#define SF_TX_RE_AGING_TIMER 2016 /* 2 mSec */
1561
1562#define SF_LONG_DELAY_AGING_TIMER 1000000 /* 1 Sec */
1563
1564/**
1565 * Smart Fifo configuration command.
1566 * @state: smart fifo state, types listed in iwl_sf_sate.
1567 * @watermark: Minimum allowed availabe free space in RXF for transient state.
1568 * @long_delay_timeouts: aging and idle timer values for each scenario
1569 * in long delay state.
1570 * @full_on_timeouts: timer values for each scenario in full on state.
1571 */
1572struct iwl_sf_cfg_cmd {
1573 enum iwl_sf_state state;
1574 __le32 watermark[SF_TRANSIENT_STATES_NUMBER];
1575 __le32 long_delay_timeouts[SF_NUM_SCENARIO][SF_NUM_TIMEOUT_TYPES];
1576 __le32 full_on_timeouts[SF_NUM_SCENARIO][SF_NUM_TIMEOUT_TYPES];
1577} __packed; /* SF_CFG_API_S_VER_2 */
1578
Johannes Berg8ca151b2013-01-24 14:25:36 +01001579#endif /* __fw_api_h__ */