blob: 17ddcb00bd26bd28c542ecebb5d331ff4ef0e0f5 [file] [log] [blame]
Chris Wilson1d8e1c72010-08-07 11:01:28 +01001/*
2 * Copyright © 2006-2010 Intel Corporation
3 * Copyright (c) 2006 Dave Airlie <airlied@linux.ie>
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
14 * Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
22 * DEALINGS IN THE SOFTWARE.
23 *
24 * Authors:
25 * Eric Anholt <eric@anholt.net>
26 * Dave Airlie <airlied@linux.ie>
27 * Jesse Barnes <jesse.barnes@intel.com>
28 * Chris Wilson <chris@chris-wilson.co.uk>
29 */
30
Joe Perchesa70491c2012-03-18 13:00:11 -070031#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
32
Carsten Emde7bd90902012-03-15 15:56:25 +010033#include <linux/moduleparam.h>
Chris Wilson1d8e1c72010-08-07 11:01:28 +010034#include "intel_drv.h"
35
Takashi Iwaiba3820a2011-03-10 14:02:12 +010036#define PCI_LBPC 0xf4 /* legacy/combination backlight modes */
37
Chris Wilson1d8e1c72010-08-07 11:01:28 +010038void
Ville Syrjälä4c6df4b2013-09-02 21:13:39 +030039intel_fixed_panel_mode(const struct drm_display_mode *fixed_mode,
Chris Wilson1d8e1c72010-08-07 11:01:28 +010040 struct drm_display_mode *adjusted_mode)
41{
Ville Syrjälä4c6df4b2013-09-02 21:13:39 +030042 drm_mode_copy(adjusted_mode, fixed_mode);
Imre Deaka52690e2013-08-27 12:24:09 +030043
44 drm_mode_set_crtcinfo(adjusted_mode, 0);
Chris Wilson1d8e1c72010-08-07 11:01:28 +010045}
46
47/* adjusted_mode has been preset to be the panel's fixed mode */
48void
Jesse Barnesb074cec2013-04-25 12:55:02 -070049intel_pch_panel_fitting(struct intel_crtc *intel_crtc,
50 struct intel_crtc_config *pipe_config,
51 int fitting_mode)
Chris Wilson1d8e1c72010-08-07 11:01:28 +010052{
Ville Syrjälä37327ab2013-09-04 18:25:28 +030053 struct drm_display_mode *adjusted_mode;
Chris Wilson1d8e1c72010-08-07 11:01:28 +010054 int x, y, width, height;
55
Jesse Barnesb074cec2013-04-25 12:55:02 -070056 adjusted_mode = &pipe_config->adjusted_mode;
57
Chris Wilson1d8e1c72010-08-07 11:01:28 +010058 x = y = width = height = 0;
59
60 /* Native modes don't need fitting */
Ville Syrjälä37327ab2013-09-04 18:25:28 +030061 if (adjusted_mode->hdisplay == pipe_config->pipe_src_w &&
62 adjusted_mode->vdisplay == pipe_config->pipe_src_h)
Chris Wilson1d8e1c72010-08-07 11:01:28 +010063 goto done;
64
65 switch (fitting_mode) {
66 case DRM_MODE_SCALE_CENTER:
Ville Syrjälä37327ab2013-09-04 18:25:28 +030067 width = pipe_config->pipe_src_w;
68 height = pipe_config->pipe_src_h;
Chris Wilson1d8e1c72010-08-07 11:01:28 +010069 x = (adjusted_mode->hdisplay - width + 1)/2;
70 y = (adjusted_mode->vdisplay - height + 1)/2;
71 break;
72
73 case DRM_MODE_SCALE_ASPECT:
74 /* Scale but preserve the aspect ratio */
75 {
Daniel Vetter9084e7d2013-09-16 23:43:45 +020076 u32 scaled_width = adjusted_mode->hdisplay
77 * pipe_config->pipe_src_h;
78 u32 scaled_height = pipe_config->pipe_src_w
79 * adjusted_mode->vdisplay;
Chris Wilson1d8e1c72010-08-07 11:01:28 +010080 if (scaled_width > scaled_height) { /* pillar */
Ville Syrjälä37327ab2013-09-04 18:25:28 +030081 width = scaled_height / pipe_config->pipe_src_h;
Adam Jackson302983e2011-07-13 16:32:32 -040082 if (width & 1)
Akshay Joshi0206e352011-08-16 15:34:10 -040083 width++;
Chris Wilson1d8e1c72010-08-07 11:01:28 +010084 x = (adjusted_mode->hdisplay - width + 1) / 2;
85 y = 0;
86 height = adjusted_mode->vdisplay;
87 } else if (scaled_width < scaled_height) { /* letter */
Ville Syrjälä37327ab2013-09-04 18:25:28 +030088 height = scaled_width / pipe_config->pipe_src_w;
Adam Jackson302983e2011-07-13 16:32:32 -040089 if (height & 1)
90 height++;
Chris Wilson1d8e1c72010-08-07 11:01:28 +010091 y = (adjusted_mode->vdisplay - height + 1) / 2;
92 x = 0;
93 width = adjusted_mode->hdisplay;
94 } else {
95 x = y = 0;
96 width = adjusted_mode->hdisplay;
97 height = adjusted_mode->vdisplay;
98 }
99 }
100 break;
101
Chris Wilson1d8e1c72010-08-07 11:01:28 +0100102 case DRM_MODE_SCALE_FULLSCREEN:
103 x = y = 0;
104 width = adjusted_mode->hdisplay;
105 height = adjusted_mode->vdisplay;
106 break;
Jesse Barnesab3e67f2013-04-25 12:55:03 -0700107
108 default:
109 WARN(1, "bad panel fit mode: %d\n", fitting_mode);
110 return;
Chris Wilson1d8e1c72010-08-07 11:01:28 +0100111 }
112
113done:
Jesse Barnesb074cec2013-04-25 12:55:02 -0700114 pipe_config->pch_pfit.pos = (x << 16) | y;
115 pipe_config->pch_pfit.size = (width << 16) | height;
Chris Wilsonfd4daa92013-08-27 17:04:17 +0100116 pipe_config->pch_pfit.enabled = pipe_config->pch_pfit.size != 0;
Chris Wilson1d8e1c72010-08-07 11:01:28 +0100117}
Chris Wilsona9573552010-08-22 13:18:16 +0100118
Jesse Barnes2dd24552013-04-25 12:55:01 -0700119static void
120centre_horizontally(struct drm_display_mode *mode,
121 int width)
122{
123 u32 border, sync_pos, blank_width, sync_width;
124
125 /* keep the hsync and hblank widths constant */
126 sync_width = mode->crtc_hsync_end - mode->crtc_hsync_start;
127 blank_width = mode->crtc_hblank_end - mode->crtc_hblank_start;
128 sync_pos = (blank_width - sync_width + 1) / 2;
129
130 border = (mode->hdisplay - width + 1) / 2;
131 border += border & 1; /* make the border even */
132
133 mode->crtc_hdisplay = width;
134 mode->crtc_hblank_start = width + border;
135 mode->crtc_hblank_end = mode->crtc_hblank_start + blank_width;
136
137 mode->crtc_hsync_start = mode->crtc_hblank_start + sync_pos;
138 mode->crtc_hsync_end = mode->crtc_hsync_start + sync_width;
139}
140
141static void
142centre_vertically(struct drm_display_mode *mode,
143 int height)
144{
145 u32 border, sync_pos, blank_width, sync_width;
146
147 /* keep the vsync and vblank widths constant */
148 sync_width = mode->crtc_vsync_end - mode->crtc_vsync_start;
149 blank_width = mode->crtc_vblank_end - mode->crtc_vblank_start;
150 sync_pos = (blank_width - sync_width + 1) / 2;
151
152 border = (mode->vdisplay - height + 1) / 2;
153
154 mode->crtc_vdisplay = height;
155 mode->crtc_vblank_start = height + border;
156 mode->crtc_vblank_end = mode->crtc_vblank_start + blank_width;
157
158 mode->crtc_vsync_start = mode->crtc_vblank_start + sync_pos;
159 mode->crtc_vsync_end = mode->crtc_vsync_start + sync_width;
160}
161
162static inline u32 panel_fitter_scaling(u32 source, u32 target)
163{
164 /*
165 * Floating point operation is not supported. So the FACTOR
166 * is defined, which can avoid the floating point computation
167 * when calculating the panel ratio.
168 */
169#define ACCURACY 12
170#define FACTOR (1 << ACCURACY)
171 u32 ratio = source * FACTOR / target;
172 return (FACTOR * ratio + FACTOR/2) / FACTOR;
173}
174
Daniel Vetter9084e7d2013-09-16 23:43:45 +0200175static void i965_scale_aspect(struct intel_crtc_config *pipe_config,
176 u32 *pfit_control)
177{
178 struct drm_display_mode *adjusted_mode = &pipe_config->adjusted_mode;
179 u32 scaled_width = adjusted_mode->hdisplay *
180 pipe_config->pipe_src_h;
181 u32 scaled_height = pipe_config->pipe_src_w *
182 adjusted_mode->vdisplay;
183
184 /* 965+ is easy, it does everything in hw */
185 if (scaled_width > scaled_height)
186 *pfit_control |= PFIT_ENABLE |
187 PFIT_SCALING_PILLAR;
188 else if (scaled_width < scaled_height)
189 *pfit_control |= PFIT_ENABLE |
190 PFIT_SCALING_LETTER;
191 else if (adjusted_mode->hdisplay != pipe_config->pipe_src_w)
192 *pfit_control |= PFIT_ENABLE | PFIT_SCALING_AUTO;
193}
194
195static void i9xx_scale_aspect(struct intel_crtc_config *pipe_config,
196 u32 *pfit_control, u32 *pfit_pgm_ratios,
197 u32 *border)
198{
199 struct drm_display_mode *adjusted_mode = &pipe_config->adjusted_mode;
200 u32 scaled_width = adjusted_mode->hdisplay *
201 pipe_config->pipe_src_h;
202 u32 scaled_height = pipe_config->pipe_src_w *
203 adjusted_mode->vdisplay;
204 u32 bits;
205
206 /*
207 * For earlier chips we have to calculate the scaling
208 * ratio by hand and program it into the
209 * PFIT_PGM_RATIO register
210 */
211 if (scaled_width > scaled_height) { /* pillar */
212 centre_horizontally(adjusted_mode,
213 scaled_height /
214 pipe_config->pipe_src_h);
215
216 *border = LVDS_BORDER_ENABLE;
217 if (pipe_config->pipe_src_h != adjusted_mode->vdisplay) {
218 bits = panel_fitter_scaling(pipe_config->pipe_src_h,
219 adjusted_mode->vdisplay);
220
221 *pfit_pgm_ratios |= (bits << PFIT_HORIZ_SCALE_SHIFT |
222 bits << PFIT_VERT_SCALE_SHIFT);
223 *pfit_control |= (PFIT_ENABLE |
224 VERT_INTERP_BILINEAR |
225 HORIZ_INTERP_BILINEAR);
226 }
227 } else if (scaled_width < scaled_height) { /* letter */
228 centre_vertically(adjusted_mode,
229 scaled_width /
230 pipe_config->pipe_src_w);
231
232 *border = LVDS_BORDER_ENABLE;
233 if (pipe_config->pipe_src_w != adjusted_mode->hdisplay) {
234 bits = panel_fitter_scaling(pipe_config->pipe_src_w,
235 adjusted_mode->hdisplay);
236
237 *pfit_pgm_ratios |= (bits << PFIT_HORIZ_SCALE_SHIFT |
238 bits << PFIT_VERT_SCALE_SHIFT);
239 *pfit_control |= (PFIT_ENABLE |
240 VERT_INTERP_BILINEAR |
241 HORIZ_INTERP_BILINEAR);
242 }
243 } else {
244 /* Aspects match, Let hw scale both directions */
245 *pfit_control |= (PFIT_ENABLE |
246 VERT_AUTO_SCALE | HORIZ_AUTO_SCALE |
247 VERT_INTERP_BILINEAR |
248 HORIZ_INTERP_BILINEAR);
249 }
250}
251
Jesse Barnes2dd24552013-04-25 12:55:01 -0700252void intel_gmch_panel_fitting(struct intel_crtc *intel_crtc,
253 struct intel_crtc_config *pipe_config,
254 int fitting_mode)
255{
256 struct drm_device *dev = intel_crtc->base.dev;
Jesse Barnes2dd24552013-04-25 12:55:01 -0700257 u32 pfit_control = 0, pfit_pgm_ratios = 0, border = 0;
Ville Syrjälä37327ab2013-09-04 18:25:28 +0300258 struct drm_display_mode *adjusted_mode;
Jesse Barnes2dd24552013-04-25 12:55:01 -0700259
Jesse Barnes2dd24552013-04-25 12:55:01 -0700260 adjusted_mode = &pipe_config->adjusted_mode;
261
262 /* Native modes don't need fitting */
Ville Syrjälä37327ab2013-09-04 18:25:28 +0300263 if (adjusted_mode->hdisplay == pipe_config->pipe_src_w &&
264 adjusted_mode->vdisplay == pipe_config->pipe_src_h)
Jesse Barnes2dd24552013-04-25 12:55:01 -0700265 goto out;
266
267 switch (fitting_mode) {
268 case DRM_MODE_SCALE_CENTER:
269 /*
270 * For centered modes, we have to calculate border widths &
271 * heights and modify the values programmed into the CRTC.
272 */
Ville Syrjälä37327ab2013-09-04 18:25:28 +0300273 centre_horizontally(adjusted_mode, pipe_config->pipe_src_w);
274 centre_vertically(adjusted_mode, pipe_config->pipe_src_h);
Jesse Barnes2dd24552013-04-25 12:55:01 -0700275 border = LVDS_BORDER_ENABLE;
276 break;
277 case DRM_MODE_SCALE_ASPECT:
278 /* Scale but preserve the aspect ratio */
Daniel Vetter9084e7d2013-09-16 23:43:45 +0200279 if (INTEL_INFO(dev)->gen >= 4)
280 i965_scale_aspect(pipe_config, &pfit_control);
281 else
282 i9xx_scale_aspect(pipe_config, &pfit_control,
283 &pfit_pgm_ratios, &border);
Jesse Barnes2dd24552013-04-25 12:55:01 -0700284 break;
Jesse Barnes2dd24552013-04-25 12:55:01 -0700285 case DRM_MODE_SCALE_FULLSCREEN:
286 /*
287 * Full scaling, even if it changes the aspect ratio.
288 * Fortunately this is all done for us in hw.
289 */
Ville Syrjälä37327ab2013-09-04 18:25:28 +0300290 if (pipe_config->pipe_src_h != adjusted_mode->vdisplay ||
291 pipe_config->pipe_src_w != adjusted_mode->hdisplay) {
Jesse Barnes2dd24552013-04-25 12:55:01 -0700292 pfit_control |= PFIT_ENABLE;
293 if (INTEL_INFO(dev)->gen >= 4)
294 pfit_control |= PFIT_SCALING_AUTO;
295 else
296 pfit_control |= (VERT_AUTO_SCALE |
297 VERT_INTERP_BILINEAR |
298 HORIZ_AUTO_SCALE |
299 HORIZ_INTERP_BILINEAR);
300 }
301 break;
Jesse Barnesab3e67f2013-04-25 12:55:03 -0700302 default:
303 WARN(1, "bad panel fit mode: %d\n", fitting_mode);
304 return;
Jesse Barnes2dd24552013-04-25 12:55:01 -0700305 }
306
307 /* 965+ wants fuzzy fitting */
308 /* FIXME: handle multiple panels by failing gracefully */
309 if (INTEL_INFO(dev)->gen >= 4)
310 pfit_control |= ((intel_crtc->pipe << PFIT_PIPE_SHIFT) |
311 PFIT_FILTER_FUZZY);
312
313out:
314 if ((pfit_control & PFIT_ENABLE) == 0) {
315 pfit_control = 0;
316 pfit_pgm_ratios = 0;
317 }
318
319 /* Make sure pre-965 set dither correctly for 18bpp panels. */
320 if (INTEL_INFO(dev)->gen < 4 && pipe_config->pipe_bpp == 18)
321 pfit_control |= PANEL_8TO6_DITHER_ENABLE;
322
Daniel Vetter2deefda2013-04-25 22:52:17 +0200323 pipe_config->gmch_pfit.control = pfit_control;
324 pipe_config->gmch_pfit.pgm_ratios = pfit_pgm_ratios;
Daniel Vetter68fc8742013-04-25 22:52:16 +0200325 pipe_config->gmch_pfit.lvds_border_bits = border;
Jesse Barnes2dd24552013-04-25 12:55:01 -0700326}
327
Takashi Iwaiba3820a2011-03-10 14:02:12 +0100328static int is_backlight_combination_mode(struct drm_device *dev)
329{
330 struct drm_i915_private *dev_priv = dev->dev_private;
331
Jani Nikulad9c638d2013-09-24 16:44:39 +0300332 if (IS_GEN4(dev))
Takashi Iwaiba3820a2011-03-10 14:02:12 +0100333 return I915_READ(BLC_PWM_CTL2) & BLM_COMBINATION_MODE;
334
335 if (IS_GEN2(dev))
336 return I915_READ(BLC_PWM_CTL) & BLM_LEGACY_MODE;
337
338 return 0;
339}
340
Jani Nikulad6540632013-04-12 15:18:36 +0300341/* XXX: query mode clock or hardware clock and program max PWM appropriately
342 * when it's 0.
343 */
Jesse Barnes752aa882013-10-31 18:55:49 +0200344static u32 i915_read_blc_pwm_ctl(struct drm_device *dev, enum pipe pipe)
Chris Wilson0b0b0532010-11-23 09:45:50 +0000345{
Jani Nikulabfd75902012-12-04 16:36:28 +0200346 struct drm_i915_private *dev_priv = dev->dev_private;
Chris Wilson0b0b0532010-11-23 09:45:50 +0000347 u32 val;
348
Ville Syrjälädf0a6792013-05-22 11:36:40 +0300349 WARN_ON_SMP(!spin_is_locked(&dev_priv->backlight.lock));
Jani Nikula8ba2d182013-04-12 15:18:37 +0300350
Chris Wilson0b0b0532010-11-23 09:45:50 +0000351 /* Restore the CTL value if it lost, e.g. GPU reset */
352
353 if (HAS_PCH_SPLIT(dev_priv->dev)) {
354 val = I915_READ(BLC_PWM_PCH_CTL2);
Daniel Vetterf4c956a2012-11-02 19:55:02 +0100355 if (dev_priv->regfile.saveBLC_PWM_CTL2 == 0) {
356 dev_priv->regfile.saveBLC_PWM_CTL2 = val;
Chris Wilson0b0b0532010-11-23 09:45:50 +0000357 } else if (val == 0) {
Daniel Vetterf4c956a2012-11-02 19:55:02 +0100358 val = dev_priv->regfile.saveBLC_PWM_CTL2;
Jani Nikulabfd75902012-12-04 16:36:28 +0200359 I915_WRITE(BLC_PWM_PCH_CTL2, val);
Chris Wilson0b0b0532010-11-23 09:45:50 +0000360 }
361 } else {
362 val = I915_READ(BLC_PWM_CTL);
Daniel Vetterf4c956a2012-11-02 19:55:02 +0100363 if (dev_priv->regfile.saveBLC_PWM_CTL == 0) {
364 dev_priv->regfile.saveBLC_PWM_CTL = val;
Jani Nikulabfd75902012-12-04 16:36:28 +0200365 if (INTEL_INFO(dev)->gen >= 4)
366 dev_priv->regfile.saveBLC_PWM_CTL2 =
367 I915_READ(BLC_PWM_CTL2);
Chris Wilson0b0b0532010-11-23 09:45:50 +0000368 } else if (val == 0) {
Daniel Vetterf4c956a2012-11-02 19:55:02 +0100369 val = dev_priv->regfile.saveBLC_PWM_CTL;
Jani Nikulabfd75902012-12-04 16:36:28 +0200370 I915_WRITE(BLC_PWM_CTL, val);
371 if (INTEL_INFO(dev)->gen >= 4)
372 I915_WRITE(BLC_PWM_CTL2,
373 dev_priv->regfile.saveBLC_PWM_CTL2);
Chris Wilson0b0b0532010-11-23 09:45:50 +0000374 }
Jesse Barnesafc85b92013-09-25 14:04:32 -0700375
376 if (IS_VALLEYVIEW(dev) && !val)
377 val = 0x0f42ffff;
Chris Wilson0b0b0532010-11-23 09:45:50 +0000378 }
379
380 return val;
381}
382
Jesse Barnes752aa882013-10-31 18:55:49 +0200383static u32 intel_panel_get_max_backlight(struct drm_device *dev,
384 enum pipe pipe)
Chris Wilsona9573552010-08-22 13:18:16 +0100385{
Chris Wilsona9573552010-08-22 13:18:16 +0100386 u32 max;
387
Jesse Barnes752aa882013-10-31 18:55:49 +0200388 max = i915_read_blc_pwm_ctl(dev, pipe);
Chris Wilson0b0b0532010-11-23 09:45:50 +0000389
Chris Wilsona9573552010-08-22 13:18:16 +0100390 if (HAS_PCH_SPLIT(dev)) {
Chris Wilson0b0b0532010-11-23 09:45:50 +0000391 max >>= 16;
Chris Wilsona9573552010-08-22 13:18:16 +0100392 } else {
Keith Packardca884792011-11-18 11:09:24 -0800393 if (INTEL_INFO(dev)->gen < 4)
Chris Wilsona9573552010-08-22 13:18:16 +0100394 max >>= 17;
Keith Packardca884792011-11-18 11:09:24 -0800395 else
Chris Wilsona9573552010-08-22 13:18:16 +0100396 max >>= 16;
Takashi Iwaiba3820a2011-03-10 14:02:12 +0100397
398 if (is_backlight_combination_mode(dev))
399 max *= 0xff;
Chris Wilsona9573552010-08-22 13:18:16 +0100400 }
401
Chris Wilsona9573552010-08-22 13:18:16 +0100402 DRM_DEBUG_DRIVER("max backlight PWM = %d\n", max);
Jani Nikulad6540632013-04-12 15:18:36 +0300403
Chris Wilsona9573552010-08-22 13:18:16 +0100404 return max;
405}
406
Carsten Emde4dca20e2012-03-15 15:56:26 +0100407static int i915_panel_invert_brightness;
408MODULE_PARM_DESC(invert_brightness, "Invert backlight brightness "
409 "(-1 force normal, 0 machine defaults, 1 force inversion), please "
Carsten Emde7bd90902012-03-15 15:56:25 +0100410 "report PCI device ID, subsystem vendor and subsystem device ID "
411 "to dri-devel@lists.freedesktop.org, if your machine needs it. "
412 "It will then be included in an upcoming module version.");
Carsten Emde4dca20e2012-03-15 15:56:26 +0100413module_param_named(invert_brightness, i915_panel_invert_brightness, int, 0600);
Jesse Barnes752aa882013-10-31 18:55:49 +0200414static u32 intel_panel_compute_brightness(struct drm_device *dev,
415 enum pipe pipe, u32 val)
Carsten Emde7bd90902012-03-15 15:56:25 +0100416{
Carsten Emde4dca20e2012-03-15 15:56:26 +0100417 struct drm_i915_private *dev_priv = dev->dev_private;
418
419 if (i915_panel_invert_brightness < 0)
420 return val;
421
422 if (i915_panel_invert_brightness > 0 ||
Jani Nikulad6540632013-04-12 15:18:36 +0300423 dev_priv->quirks & QUIRK_INVERT_BRIGHTNESS) {
Jesse Barnes752aa882013-10-31 18:55:49 +0200424 u32 max = intel_panel_get_max_backlight(dev, pipe);
Jani Nikulad6540632013-04-12 15:18:36 +0300425 if (max)
426 return max - val;
427 }
Carsten Emde7bd90902012-03-15 15:56:25 +0100428
429 return val;
430}
431
Jesse Barnes752aa882013-10-31 18:55:49 +0200432static u32 intel_panel_get_backlight(struct drm_device *dev,
433 enum pipe pipe)
Chris Wilsona9573552010-08-22 13:18:16 +0100434{
435 struct drm_i915_private *dev_priv = dev->dev_private;
436 u32 val;
Jani Nikula8ba2d182013-04-12 15:18:37 +0300437 unsigned long flags;
438
439 spin_lock_irqsave(&dev_priv->backlight.lock, flags);
Chris Wilsona9573552010-08-22 13:18:16 +0100440
441 if (HAS_PCH_SPLIT(dev)) {
442 val = I915_READ(BLC_PWM_CPU_CTL) & BACKLIGHT_DUTY_CYCLE_MASK;
443 } else {
444 val = I915_READ(BLC_PWM_CTL) & BACKLIGHT_DUTY_CYCLE_MASK;
Keith Packardca884792011-11-18 11:09:24 -0800445 if (INTEL_INFO(dev)->gen < 4)
Chris Wilsona9573552010-08-22 13:18:16 +0100446 val >>= 1;
Takashi Iwaiba3820a2011-03-10 14:02:12 +0100447
Akshay Joshi0206e352011-08-16 15:34:10 -0400448 if (is_backlight_combination_mode(dev)) {
Takashi Iwaiba3820a2011-03-10 14:02:12 +0100449 u8 lbpc;
450
Takashi Iwaiba3820a2011-03-10 14:02:12 +0100451 pci_read_config_byte(dev->pdev, PCI_LBPC, &lbpc);
452 val *= lbpc;
453 }
Chris Wilsona9573552010-08-22 13:18:16 +0100454 }
455
Jesse Barnes752aa882013-10-31 18:55:49 +0200456 val = intel_panel_compute_brightness(dev, pipe, val);
Jani Nikula8ba2d182013-04-12 15:18:37 +0300457
458 spin_unlock_irqrestore(&dev_priv->backlight.lock, flags);
459
Chris Wilsona9573552010-08-22 13:18:16 +0100460 DRM_DEBUG_DRIVER("get backlight PWM = %d\n", val);
461 return val;
462}
463
464static void intel_pch_panel_set_backlight(struct drm_device *dev, u32 level)
465{
466 struct drm_i915_private *dev_priv = dev->dev_private;
467 u32 val = I915_READ(BLC_PWM_CPU_CTL) & ~BACKLIGHT_DUTY_CYCLE_MASK;
468 I915_WRITE(BLC_PWM_CPU_CTL, val | level);
469}
470
Daniel Vetter9084e7d2013-09-16 23:43:45 +0200471static void intel_panel_actually_set_backlight(struct drm_device *dev,
Jesse Barnes752aa882013-10-31 18:55:49 +0200472 enum pipe pipe, u32 level)
Chris Wilsona9573552010-08-22 13:18:16 +0100473{
474 struct drm_i915_private *dev_priv = dev->dev_private;
475 u32 tmp;
476
477 DRM_DEBUG_DRIVER("set backlight PWM = %d\n", level);
Jesse Barnes752aa882013-10-31 18:55:49 +0200478 level = intel_panel_compute_brightness(dev, pipe, level);
Chris Wilsona9573552010-08-22 13:18:16 +0100479
480 if (HAS_PCH_SPLIT(dev))
481 return intel_pch_panel_set_backlight(dev, level);
Takashi Iwaiba3820a2011-03-10 14:02:12 +0100482
Akshay Joshi0206e352011-08-16 15:34:10 -0400483 if (is_backlight_combination_mode(dev)) {
Jesse Barnes752aa882013-10-31 18:55:49 +0200484 u32 max = intel_panel_get_max_backlight(dev, pipe);
Takashi Iwaiba3820a2011-03-10 14:02:12 +0100485 u8 lbpc;
486
Jani Nikulad6540632013-04-12 15:18:36 +0300487 /* we're screwed, but keep behaviour backwards compatible */
488 if (!max)
489 max = 1;
490
Takashi Iwaiba3820a2011-03-10 14:02:12 +0100491 lbpc = level * 0xfe / max + 1;
492 level /= lbpc;
493 pci_write_config_byte(dev->pdev, PCI_LBPC, lbpc);
494 }
495
Chris Wilsona9573552010-08-22 13:18:16 +0100496 tmp = I915_READ(BLC_PWM_CTL);
Daniel Vettera7269152012-11-20 14:50:08 +0100497 if (INTEL_INFO(dev)->gen < 4)
Chris Wilsona9573552010-08-22 13:18:16 +0100498 level <<= 1;
Keith Packardca884792011-11-18 11:09:24 -0800499 tmp &= ~BACKLIGHT_DUTY_CYCLE_MASK;
Chris Wilsona9573552010-08-22 13:18:16 +0100500 I915_WRITE(BLC_PWM_CTL, tmp | level);
501}
Chris Wilson47356eb2011-01-11 17:06:04 +0000502
Jani Nikulad6540632013-04-12 15:18:36 +0300503/* set backlight brightness to level in range [0..max] */
Jesse Barnes752aa882013-10-31 18:55:49 +0200504void intel_panel_set_backlight(struct intel_connector *connector, u32 level,
505 u32 max)
Takashi Iwaif52c6192011-10-14 11:45:40 +0200506{
Jesse Barnes752aa882013-10-31 18:55:49 +0200507 struct drm_device *dev = connector->base.dev;
Takashi Iwaif52c6192011-10-14 11:45:40 +0200508 struct drm_i915_private *dev_priv = dev->dev_private;
Jesse Barnes752aa882013-10-31 18:55:49 +0200509 enum pipe pipe = intel_get_pipe_from_connector(connector);
Jani Nikulad6540632013-04-12 15:18:36 +0300510 u32 freq;
Jani Nikula8ba2d182013-04-12 15:18:37 +0300511 unsigned long flags;
512
Jesse Barnes752aa882013-10-31 18:55:49 +0200513 if (pipe == INVALID_PIPE)
514 return;
515
Jani Nikula8ba2d182013-04-12 15:18:37 +0300516 spin_lock_irqsave(&dev_priv->backlight.lock, flags);
Jani Nikulad6540632013-04-12 15:18:36 +0300517
Jesse Barnes752aa882013-10-31 18:55:49 +0200518 freq = intel_panel_get_max_backlight(dev, pipe);
Jani Nikulad6540632013-04-12 15:18:36 +0300519 if (!freq) {
520 /* we are screwed, bail out */
Jani Nikula8ba2d182013-04-12 15:18:37 +0300521 goto out;
Jani Nikulad6540632013-04-12 15:18:36 +0300522 }
523
Aaron Lu22505b82013-08-02 09:16:03 +0800524 /* scale to hardware, but be careful to not overflow */
525 if (freq < max)
526 level = level * freq / max;
527 else
528 level = freq / max * level;
Takashi Iwaif52c6192011-10-14 11:45:40 +0200529
Jani Nikula31ad8ec2013-04-02 15:48:09 +0300530 dev_priv->backlight.level = level;
531 if (dev_priv->backlight.device)
532 dev_priv->backlight.device->props.brightness = level;
Jani Nikulab6b3ba52013-03-12 11:44:15 +0200533
Jani Nikula31ad8ec2013-04-02 15:48:09 +0300534 if (dev_priv->backlight.enabled)
Jesse Barnes752aa882013-10-31 18:55:49 +0200535 intel_panel_actually_set_backlight(dev, pipe, level);
Jani Nikula8ba2d182013-04-12 15:18:37 +0300536out:
537 spin_unlock_irqrestore(&dev_priv->backlight.lock, flags);
Takashi Iwaif52c6192011-10-14 11:45:40 +0200538}
539
Jesse Barnes752aa882013-10-31 18:55:49 +0200540void intel_panel_disable_backlight(struct intel_connector *connector)
Chris Wilson47356eb2011-01-11 17:06:04 +0000541{
Jesse Barnes752aa882013-10-31 18:55:49 +0200542 struct drm_device *dev = connector->base.dev;
Chris Wilson47356eb2011-01-11 17:06:04 +0000543 struct drm_i915_private *dev_priv = dev->dev_private;
Jesse Barnes752aa882013-10-31 18:55:49 +0200544 enum pipe pipe = intel_get_pipe_from_connector(connector);
Jani Nikula8ba2d182013-04-12 15:18:37 +0300545 unsigned long flags;
546
Jesse Barnes752aa882013-10-31 18:55:49 +0200547 if (pipe == INVALID_PIPE)
548 return;
549
Jani Nikula3f577572013-07-25 14:31:30 +0300550 /*
551 * Do not disable backlight on the vgaswitcheroo path. When switching
552 * away from i915, the other client may depend on i915 to handle the
553 * backlight. This will leave the backlight on unnecessarily when
554 * another client is not activated.
555 */
556 if (dev->switch_power_state == DRM_SWITCH_POWER_CHANGING) {
557 DRM_DEBUG_DRIVER("Skipping backlight disable on vga switch\n");
558 return;
559 }
560
Jani Nikula8ba2d182013-04-12 15:18:37 +0300561 spin_lock_irqsave(&dev_priv->backlight.lock, flags);
Chris Wilson47356eb2011-01-11 17:06:04 +0000562
Jani Nikula31ad8ec2013-04-02 15:48:09 +0300563 dev_priv->backlight.enabled = false;
Jesse Barnes752aa882013-10-31 18:55:49 +0200564 intel_panel_actually_set_backlight(dev, pipe, 0);
Daniel Vetter24ded202012-06-05 12:14:54 +0200565
566 if (INTEL_INFO(dev)->gen >= 4) {
Paulo Zanonia4f32fc2012-07-14 11:57:12 -0300567 uint32_t reg, tmp;
Daniel Vetter24ded202012-06-05 12:14:54 +0200568
569 reg = HAS_PCH_SPLIT(dev) ? BLC_PWM_CPU_CTL2 : BLC_PWM_CTL2;
570
571 I915_WRITE(reg, I915_READ(reg) & ~BLM_PWM_ENABLE);
Paulo Zanonia4f32fc2012-07-14 11:57:12 -0300572
573 if (HAS_PCH_SPLIT(dev)) {
574 tmp = I915_READ(BLC_PWM_PCH_CTL1);
575 tmp &= ~BLM_PCH_PWM_ENABLE;
576 I915_WRITE(BLC_PWM_PCH_CTL1, tmp);
577 }
Daniel Vetter24ded202012-06-05 12:14:54 +0200578 }
Jani Nikula8ba2d182013-04-12 15:18:37 +0300579
580 spin_unlock_irqrestore(&dev_priv->backlight.lock, flags);
Chris Wilson47356eb2011-01-11 17:06:04 +0000581}
582
Jesse Barnes752aa882013-10-31 18:55:49 +0200583void intel_panel_enable_backlight(struct intel_connector *connector)
Chris Wilson47356eb2011-01-11 17:06:04 +0000584{
Jesse Barnes752aa882013-10-31 18:55:49 +0200585 struct drm_device *dev = connector->base.dev;
Chris Wilson47356eb2011-01-11 17:06:04 +0000586 struct drm_i915_private *dev_priv = dev->dev_private;
Jesse Barnes752aa882013-10-31 18:55:49 +0200587 enum pipe pipe = intel_get_pipe_from_connector(connector);
Jani Nikula35ffda42013-04-25 16:49:25 +0300588 enum transcoder cpu_transcoder =
589 intel_pipe_to_cpu_transcoder(dev_priv, pipe);
Jani Nikula8ba2d182013-04-12 15:18:37 +0300590 unsigned long flags;
591
Jesse Barnes752aa882013-10-31 18:55:49 +0200592 if (pipe == INVALID_PIPE)
593 return;
594
Damien Lespiau6f2bcce2013-10-16 12:29:54 +0100595 DRM_DEBUG_KMS("pipe %c\n", pipe_name(pipe));
Chris Wilson540b5d02013-10-13 12:56:31 +0100596
Jani Nikula8ba2d182013-04-12 15:18:37 +0300597 spin_lock_irqsave(&dev_priv->backlight.lock, flags);
Chris Wilson47356eb2011-01-11 17:06:04 +0000598
Jani Nikula31ad8ec2013-04-02 15:48:09 +0300599 if (dev_priv->backlight.level == 0) {
Jesse Barnes752aa882013-10-31 18:55:49 +0200600 dev_priv->backlight.level = intel_panel_get_max_backlight(dev,
601 pipe);
Jani Nikula31ad8ec2013-04-02 15:48:09 +0300602 if (dev_priv->backlight.device)
603 dev_priv->backlight.device->props.brightness =
604 dev_priv->backlight.level;
Jani Nikulab6b3ba52013-03-12 11:44:15 +0200605 }
Chris Wilson47356eb2011-01-11 17:06:04 +0000606
Daniel Vetter24ded202012-06-05 12:14:54 +0200607 if (INTEL_INFO(dev)->gen >= 4) {
608 uint32_t reg, tmp;
609
610 reg = HAS_PCH_SPLIT(dev) ? BLC_PWM_CPU_CTL2 : BLC_PWM_CTL2;
611
612
613 tmp = I915_READ(reg);
614
615 /* Note that this can also get called through dpms changes. And
616 * we don't track the backlight dpms state, hence check whether
617 * we have to do anything first. */
618 if (tmp & BLM_PWM_ENABLE)
Takashi Iwai770c1232012-08-11 08:56:42 +0200619 goto set_level;
Daniel Vetter24ded202012-06-05 12:14:54 +0200620
Ben Widawsky7eb552a2013-03-13 14:05:41 -0700621 if (INTEL_INFO(dev)->num_pipes == 3)
Daniel Vetter24ded202012-06-05 12:14:54 +0200622 tmp &= ~BLM_PIPE_SELECT_IVB;
623 else
624 tmp &= ~BLM_PIPE_SELECT;
625
Jani Nikula35ffda42013-04-25 16:49:25 +0300626 if (cpu_transcoder == TRANSCODER_EDP)
627 tmp |= BLM_TRANSCODER_EDP;
628 else
629 tmp |= BLM_PIPE(cpu_transcoder);
Daniel Vetter24ded202012-06-05 12:14:54 +0200630 tmp &= ~BLM_PWM_ENABLE;
631
632 I915_WRITE(reg, tmp);
633 POSTING_READ(reg);
634 I915_WRITE(reg, tmp | BLM_PWM_ENABLE);
Paulo Zanonia4f32fc2012-07-14 11:57:12 -0300635
Kamal Mostafae85843b2013-07-19 15:02:01 -0700636 if (HAS_PCH_SPLIT(dev) &&
637 !(dev_priv->quirks & QUIRK_NO_PCH_PWM_ENABLE)) {
Paulo Zanonia4f32fc2012-07-14 11:57:12 -0300638 tmp = I915_READ(BLC_PWM_PCH_CTL1);
639 tmp |= BLM_PCH_PWM_ENABLE;
640 tmp &= ~BLM_PCH_OVERRIDE_ENABLE;
641 I915_WRITE(BLC_PWM_PCH_CTL1, tmp);
642 }
Daniel Vetter24ded202012-06-05 12:14:54 +0200643 }
Takashi Iwai770c1232012-08-11 08:56:42 +0200644
645set_level:
Daniel Vetterb1289372013-03-22 15:44:46 +0100646 /* Call below after setting BLC_PWM_CPU_CTL2 and BLC_PWM_PCH_CTL1.
647 * BLC_PWM_CPU_CTL may be cleared to zero automatically when these
648 * registers are set.
Takashi Iwai770c1232012-08-11 08:56:42 +0200649 */
Daniel Vetterecb135a2013-04-03 11:25:32 +0200650 dev_priv->backlight.enabled = true;
Jesse Barnes752aa882013-10-31 18:55:49 +0200651 intel_panel_actually_set_backlight(dev, pipe,
652 dev_priv->backlight.level);
Jani Nikula8ba2d182013-04-12 15:18:37 +0300653
654 spin_unlock_irqrestore(&dev_priv->backlight.lock, flags);
Chris Wilson47356eb2011-01-11 17:06:04 +0000655}
656
Jesse Barnesafc85b92013-09-25 14:04:32 -0700657/* FIXME: use VBT vals to init PWM_CTL and PWM_CTL2 correctly */
658static void intel_panel_init_backlight_regs(struct drm_device *dev)
659{
660 struct drm_i915_private *dev_priv = dev->dev_private;
661
662 if (IS_VALLEYVIEW(dev)) {
663 u32 cur_val = I915_READ(BLC_PWM_CTL) &
664 BACKLIGHT_DUTY_CYCLE_MASK;
665 I915_WRITE(BLC_PWM_CTL, (0xf42 << 16) | cur_val);
666 }
667}
668
Matthew Garrettaaa6fd22011-08-12 12:11:33 +0200669static void intel_panel_init_backlight(struct drm_device *dev)
Chris Wilson47356eb2011-01-11 17:06:04 +0000670{
671 struct drm_i915_private *dev_priv = dev->dev_private;
672
Jesse Barnesafc85b92013-09-25 14:04:32 -0700673 intel_panel_init_backlight_regs(dev);
674
Jesse Barnes752aa882013-10-31 18:55:49 +0200675 dev_priv->backlight.level = intel_panel_get_backlight(dev, 0);
Jani Nikula31ad8ec2013-04-02 15:48:09 +0300676 dev_priv->backlight.enabled = dev_priv->backlight.level != 0;
Chris Wilson47356eb2011-01-11 17:06:04 +0000677}
Chris Wilsonfe16d942011-02-12 10:29:38 +0000678
679enum drm_connector_status
680intel_panel_detect(struct drm_device *dev)
681{
682 struct drm_i915_private *dev_priv = dev->dev_private;
683
684 /* Assume that the BIOS does not lie through the OpRegion... */
Daniel Vettera7269152012-11-20 14:50:08 +0100685 if (!i915_panel_ignore_lid && dev_priv->opregion.lid_state) {
Chris Wilsonfe16d942011-02-12 10:29:38 +0000686 return ioread32(dev_priv->opregion.lid_state) & 0x1 ?
687 connector_status_connected :
688 connector_status_disconnected;
Daniel Vettera7269152012-11-20 14:50:08 +0100689 }
Chris Wilsonfe16d942011-02-12 10:29:38 +0000690
Daniel Vettera7269152012-11-20 14:50:08 +0100691 switch (i915_panel_ignore_lid) {
692 case -2:
693 return connector_status_connected;
694 case -1:
695 return connector_status_disconnected;
696 default:
697 return connector_status_unknown;
698 }
Chris Wilsonfe16d942011-02-12 10:29:38 +0000699}
Matthew Garrettaaa6fd22011-08-12 12:11:33 +0200700
Jani Nikula912e8b12013-09-18 17:19:45 +0300701#if IS_ENABLED(CONFIG_BACKLIGHT_CLASS_DEVICE)
Matthew Garrettaaa6fd22011-08-12 12:11:33 +0200702static int intel_panel_update_status(struct backlight_device *bd)
703{
Jesse Barnes752aa882013-10-31 18:55:49 +0200704 struct intel_connector *connector = bl_get_data(bd);
705 struct drm_device *dev = connector->base.dev;
706
707 mutex_lock(&dev->mode_config.mutex);
Chris Wilson540b5d02013-10-13 12:56:31 +0100708 DRM_DEBUG_KMS("updating intel_backlight, brightness=%d/%d\n",
709 bd->props.brightness, bd->props.max_brightness);
Jesse Barnes752aa882013-10-31 18:55:49 +0200710 intel_panel_set_backlight(connector, bd->props.brightness,
Jani Nikulad6540632013-04-12 15:18:36 +0300711 bd->props.max_brightness);
Jesse Barnes752aa882013-10-31 18:55:49 +0200712 mutex_unlock(&dev->mode_config.mutex);
Matthew Garrettaaa6fd22011-08-12 12:11:33 +0200713 return 0;
714}
715
716static int intel_panel_get_brightness(struct backlight_device *bd)
717{
Jesse Barnes752aa882013-10-31 18:55:49 +0200718 struct intel_connector *connector = bl_get_data(bd);
719 struct drm_device *dev = connector->base.dev;
720 enum pipe pipe;
721
722 mutex_lock(&dev->mode_config.mutex);
723 pipe = intel_get_pipe_from_connector(connector);
724 mutex_unlock(&dev->mode_config.mutex);
725 if (pipe == INVALID_PIPE)
726 return 0;
727
728 return intel_panel_get_backlight(connector->base.dev, pipe);
Matthew Garrettaaa6fd22011-08-12 12:11:33 +0200729}
730
731static const struct backlight_ops intel_panel_bl_ops = {
732 .update_status = intel_panel_update_status,
733 .get_brightness = intel_panel_get_brightness,
734};
735
Jani Nikula0657b6b2012-10-19 14:51:46 +0300736int intel_panel_setup_backlight(struct drm_connector *connector)
Matthew Garrettaaa6fd22011-08-12 12:11:33 +0200737{
Jani Nikula0657b6b2012-10-19 14:51:46 +0300738 struct drm_device *dev = connector->dev;
Matthew Garrettaaa6fd22011-08-12 12:11:33 +0200739 struct drm_i915_private *dev_priv = dev->dev_private;
740 struct backlight_properties props;
Jani Nikula8ba2d182013-04-12 15:18:37 +0300741 unsigned long flags;
Matthew Garrettaaa6fd22011-08-12 12:11:33 +0200742
743 intel_panel_init_backlight(dev);
744
Jani Nikuladc652f92013-04-12 15:18:38 +0300745 if (WARN_ON(dev_priv->backlight.device))
746 return -ENODEV;
747
Corentin Charyaf437cf2012-05-22 10:29:46 +0100748 memset(&props, 0, sizeof(props));
Matthew Garrettaaa6fd22011-08-12 12:11:33 +0200749 props.type = BACKLIGHT_RAW;
Jani Nikula31ad8ec2013-04-02 15:48:09 +0300750 props.brightness = dev_priv->backlight.level;
Jani Nikula8ba2d182013-04-12 15:18:37 +0300751
752 spin_lock_irqsave(&dev_priv->backlight.lock, flags);
Jesse Barnes752aa882013-10-31 18:55:49 +0200753 props.max_brightness = intel_panel_get_max_backlight(dev, 0);
Jani Nikula8ba2d182013-04-12 15:18:37 +0300754 spin_unlock_irqrestore(&dev_priv->backlight.lock, flags);
755
Jani Nikula28dcc2d2012-09-03 16:25:12 +0300756 if (props.max_brightness == 0) {
Jani Nikulae86b6182012-10-25 10:57:38 +0300757 DRM_DEBUG_DRIVER("Failed to get maximum backlight value\n");
Jani Nikula28dcc2d2012-09-03 16:25:12 +0300758 return -ENODEV;
759 }
Jani Nikula31ad8ec2013-04-02 15:48:09 +0300760 dev_priv->backlight.device =
Matthew Garrettaaa6fd22011-08-12 12:11:33 +0200761 backlight_device_register("intel_backlight",
Jesse Barnes752aa882013-10-31 18:55:49 +0200762 &connector->kdev,
763 to_intel_connector(connector),
Matthew Garrettaaa6fd22011-08-12 12:11:33 +0200764 &intel_panel_bl_ops, &props);
765
Jani Nikula31ad8ec2013-04-02 15:48:09 +0300766 if (IS_ERR(dev_priv->backlight.device)) {
Matthew Garrettaaa6fd22011-08-12 12:11:33 +0200767 DRM_ERROR("Failed to register backlight: %ld\n",
Jani Nikula31ad8ec2013-04-02 15:48:09 +0300768 PTR_ERR(dev_priv->backlight.device));
769 dev_priv->backlight.device = NULL;
Matthew Garrettaaa6fd22011-08-12 12:11:33 +0200770 return -ENODEV;
771 }
Matthew Garrettaaa6fd22011-08-12 12:11:33 +0200772 return 0;
773}
774
775void intel_panel_destroy_backlight(struct drm_device *dev)
776{
777 struct drm_i915_private *dev_priv = dev->dev_private;
Jani Nikuladc652f92013-04-12 15:18:38 +0300778 if (dev_priv->backlight.device) {
Jani Nikula31ad8ec2013-04-02 15:48:09 +0300779 backlight_device_unregister(dev_priv->backlight.device);
Jani Nikuladc652f92013-04-12 15:18:38 +0300780 dev_priv->backlight.device = NULL;
781 }
Matthew Garrettaaa6fd22011-08-12 12:11:33 +0200782}
783#else
Jani Nikula0657b6b2012-10-19 14:51:46 +0300784int intel_panel_setup_backlight(struct drm_connector *connector)
Matthew Garrettaaa6fd22011-08-12 12:11:33 +0200785{
Jani Nikula0657b6b2012-10-19 14:51:46 +0300786 intel_panel_init_backlight(connector->dev);
Matthew Garrettaaa6fd22011-08-12 12:11:33 +0200787 return 0;
788}
789
790void intel_panel_destroy_backlight(struct drm_device *dev)
791{
792 return;
793}
794#endif
Jani Nikula1d508702012-10-19 14:51:49 +0300795
Jani Nikuladd06f902012-10-19 14:51:50 +0300796int intel_panel_init(struct intel_panel *panel,
797 struct drm_display_mode *fixed_mode)
Jani Nikula1d508702012-10-19 14:51:49 +0300798{
Jani Nikuladd06f902012-10-19 14:51:50 +0300799 panel->fixed_mode = fixed_mode;
800
Jani Nikula1d508702012-10-19 14:51:49 +0300801 return 0;
802}
803
804void intel_panel_fini(struct intel_panel *panel)
805{
Jani Nikuladd06f902012-10-19 14:51:50 +0300806 struct intel_connector *intel_connector =
807 container_of(panel, struct intel_connector, panel);
808
809 if (panel->fixed_mode)
810 drm_mode_destroy(intel_connector->base.dev, panel->fixed_mode);
Jani Nikula1d508702012-10-19 14:51:49 +0300811}