Ron Rindjunsky | 1053d35 | 2008-05-05 10:22:43 +0800 | [diff] [blame] | 1 | /****************************************************************************** |
| 2 | * |
Johannes Berg | 128e63e | 2013-01-21 21:39:26 +0100 | [diff] [blame] | 3 | * Copyright(c) 2003 - 2013 Intel Corporation. All rights reserved. |
Ron Rindjunsky | 1053d35 | 2008-05-05 10:22:43 +0800 | [diff] [blame] | 4 | * |
| 5 | * Portions of this file are derived from the ipw3945 project, as well |
| 6 | * as portions of the ieee80211 subsystem header files. |
| 7 | * |
| 8 | * This program is free software; you can redistribute it and/or modify it |
| 9 | * under the terms of version 2 of the GNU General Public License as |
| 10 | * published by the Free Software Foundation. |
| 11 | * |
| 12 | * This program is distributed in the hope that it will be useful, but WITHOUT |
| 13 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or |
| 14 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for |
| 15 | * more details. |
| 16 | * |
| 17 | * You should have received a copy of the GNU General Public License along with |
| 18 | * this program; if not, write to the Free Software Foundation, Inc., |
| 19 | * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA |
| 20 | * |
| 21 | * The full GNU General Public License is included in this distribution in the |
| 22 | * file called LICENSE. |
| 23 | * |
| 24 | * Contact Information: |
Winkler, Tomas | 759ef89 | 2008-12-09 11:28:58 -0800 | [diff] [blame] | 25 | * Intel Linux Wireless <ilw@linux.intel.com> |
Ron Rindjunsky | 1053d35 | 2008-05-05 10:22:43 +0800 | [diff] [blame] | 26 | * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 |
| 27 | * |
| 28 | *****************************************************************************/ |
Tomas Winkler | fd4abac | 2008-05-15 13:54:07 +0800 | [diff] [blame] | 29 | #include <linux/etherdevice.h> |
Tejun Heo | 5a0e3ad | 2010-03-24 17:04:11 +0900 | [diff] [blame] | 30 | #include <linux/slab.h> |
Emmanuel Grumbach | 253a634 | 2011-07-11 07:39:46 -0700 | [diff] [blame] | 31 | #include <linux/sched.h> |
Emmanuel Grumbach | 253a634 | 2011-07-11 07:39:46 -0700 | [diff] [blame] | 32 | |
Emmanuel Grumbach | 522376d | 2011-09-06 09:31:19 -0700 | [diff] [blame] | 33 | #include "iwl-debug.h" |
| 34 | #include "iwl-csr.h" |
| 35 | #include "iwl-prph.h" |
Ron Rindjunsky | 1053d35 | 2008-05-05 10:22:43 +0800 | [diff] [blame] | 36 | #include "iwl-io.h" |
Emmanuel Grumbach | ed277c9 | 2012-02-09 16:08:15 +0200 | [diff] [blame] | 37 | #include "iwl-op-mode.h" |
Johannes Berg | 6468a01 | 2012-05-16 19:13:54 +0200 | [diff] [blame] | 38 | #include "internal.h" |
Johannes Berg | 6238b00 | 2012-04-02 15:04:33 +0200 | [diff] [blame] | 39 | /* FIXME: need to abstract out TX command (once we know what it looks like) */ |
Johannes Berg | 1023fdc | 2012-05-15 12:16:34 +0200 | [diff] [blame] | 40 | #include "dvm/commands.h" |
Ron Rindjunsky | 1053d35 | 2008-05-05 10:22:43 +0800 | [diff] [blame] | 41 | |
Emmanuel Grumbach | 522376d | 2011-09-06 09:31:19 -0700 | [diff] [blame] | 42 | #define IWL_TX_CRC_SIZE 4 |
| 43 | #define IWL_TX_DELIMITER_SIZE 4 |
| 44 | |
Emmanuel Grumbach | f02831b | 2012-11-14 14:44:18 +0200 | [diff] [blame] | 45 | /*************** DMA-QUEUE-GENERAL-FUNCTIONS ***** |
| 46 | * DMA services |
| 47 | * |
| 48 | * Theory of operation |
| 49 | * |
| 50 | * A Tx or Rx queue resides in host DRAM, and is comprised of a circular buffer |
| 51 | * of buffer descriptors, each of which points to one or more data buffers for |
| 52 | * the device to read from or fill. Driver and device exchange status of each |
| 53 | * queue via "read" and "write" pointers. Driver keeps minimum of 2 empty |
| 54 | * entries in each circular buffer, to protect against confusing empty and full |
| 55 | * queue states. |
| 56 | * |
| 57 | * The device reads or writes the data in the queues via the device's several |
| 58 | * DMA/FIFO channels. Each queue is mapped to a single DMA channel. |
| 59 | * |
| 60 | * For Tx queue, there are low mark and high mark limits. If, after queuing |
| 61 | * the packet for Tx, free space become < low mark, Tx queue stopped. When |
| 62 | * reclaiming packets (on 'tx done IRQ), if free space become > high mark, |
| 63 | * Tx queue resumed. |
| 64 | * |
| 65 | ***************************************************/ |
| 66 | static int iwl_queue_space(const struct iwl_queue *q) |
| 67 | { |
Ido Yariv | a9b2924 | 2013-07-15 11:51:48 -0400 | [diff] [blame] | 68 | unsigned int max; |
| 69 | unsigned int used; |
Emmanuel Grumbach | f02831b | 2012-11-14 14:44:18 +0200 | [diff] [blame] | 70 | |
Ido Yariv | a9b2924 | 2013-07-15 11:51:48 -0400 | [diff] [blame] | 71 | /* |
| 72 | * To avoid ambiguity between empty and completely full queues, there |
| 73 | * should always be less than q->n_bd elements in the queue. |
| 74 | * If q->n_window is smaller than q->n_bd, there is no need to reserve |
| 75 | * any queue entries for this purpose. |
| 76 | */ |
| 77 | if (q->n_window < q->n_bd) |
| 78 | max = q->n_window; |
| 79 | else |
| 80 | max = q->n_bd - 1; |
Emmanuel Grumbach | f02831b | 2012-11-14 14:44:18 +0200 | [diff] [blame] | 81 | |
Ido Yariv | a9b2924 | 2013-07-15 11:51:48 -0400 | [diff] [blame] | 82 | /* |
| 83 | * q->n_bd is a power of 2, so the following is equivalent to modulo by |
| 84 | * q->n_bd and is well defined for negative dividends. |
| 85 | */ |
| 86 | used = (q->write_ptr - q->read_ptr) & (q->n_bd - 1); |
| 87 | |
| 88 | if (WARN_ON(used > max)) |
| 89 | return 0; |
| 90 | |
| 91 | return max - used; |
Emmanuel Grumbach | f02831b | 2012-11-14 14:44:18 +0200 | [diff] [blame] | 92 | } |
| 93 | |
| 94 | /* |
| 95 | * iwl_queue_init - Initialize queue's high/low-water and read/write indexes |
| 96 | */ |
| 97 | static int iwl_queue_init(struct iwl_queue *q, int count, int slots_num, u32 id) |
| 98 | { |
| 99 | q->n_bd = count; |
| 100 | q->n_window = slots_num; |
| 101 | q->id = id; |
| 102 | |
| 103 | /* count must be power-of-two size, otherwise iwl_queue_inc_wrap |
| 104 | * and iwl_queue_dec_wrap are broken. */ |
| 105 | if (WARN_ON(!is_power_of_2(count))) |
| 106 | return -EINVAL; |
| 107 | |
| 108 | /* slots_num must be power-of-two size, otherwise |
| 109 | * get_cmd_index is broken. */ |
| 110 | if (WARN_ON(!is_power_of_2(slots_num))) |
| 111 | return -EINVAL; |
| 112 | |
| 113 | q->low_mark = q->n_window / 4; |
| 114 | if (q->low_mark < 4) |
| 115 | q->low_mark = 4; |
| 116 | |
| 117 | q->high_mark = q->n_window / 8; |
| 118 | if (q->high_mark < 2) |
| 119 | q->high_mark = 2; |
| 120 | |
| 121 | q->write_ptr = 0; |
| 122 | q->read_ptr = 0; |
| 123 | |
| 124 | return 0; |
| 125 | } |
| 126 | |
Emmanuel Grumbach | f02831b | 2012-11-14 14:44:18 +0200 | [diff] [blame] | 127 | static int iwl_pcie_alloc_dma_ptr(struct iwl_trans *trans, |
| 128 | struct iwl_dma_ptr *ptr, size_t size) |
| 129 | { |
| 130 | if (WARN_ON(ptr->addr)) |
| 131 | return -EINVAL; |
| 132 | |
| 133 | ptr->addr = dma_alloc_coherent(trans->dev, size, |
| 134 | &ptr->dma, GFP_KERNEL); |
| 135 | if (!ptr->addr) |
| 136 | return -ENOMEM; |
| 137 | ptr->size = size; |
| 138 | return 0; |
| 139 | } |
| 140 | |
| 141 | static void iwl_pcie_free_dma_ptr(struct iwl_trans *trans, |
| 142 | struct iwl_dma_ptr *ptr) |
| 143 | { |
| 144 | if (unlikely(!ptr->addr)) |
| 145 | return; |
| 146 | |
| 147 | dma_free_coherent(trans->dev, ptr->size, ptr->addr, ptr->dma); |
| 148 | memset(ptr, 0, sizeof(*ptr)); |
| 149 | } |
| 150 | |
| 151 | static void iwl_pcie_txq_stuck_timer(unsigned long data) |
| 152 | { |
| 153 | struct iwl_txq *txq = (void *)data; |
| 154 | struct iwl_queue *q = &txq->q; |
| 155 | struct iwl_trans_pcie *trans_pcie = txq->trans_pcie; |
| 156 | struct iwl_trans *trans = iwl_trans_pcie_get_trans(trans_pcie); |
| 157 | u32 scd_sram_addr = trans_pcie->scd_base_addr + |
| 158 | SCD_TX_STTS_QUEUE_OFFSET(txq->q.id); |
| 159 | u8 buf[16]; |
| 160 | int i; |
| 161 | |
| 162 | spin_lock(&txq->lock); |
| 163 | /* check if triggered erroneously */ |
| 164 | if (txq->q.read_ptr == txq->q.write_ptr) { |
| 165 | spin_unlock(&txq->lock); |
| 166 | return; |
| 167 | } |
| 168 | spin_unlock(&txq->lock); |
| 169 | |
| 170 | IWL_ERR(trans, "Queue %d stuck for %u ms.\n", txq->q.id, |
| 171 | jiffies_to_msecs(trans_pcie->wd_timeout)); |
| 172 | IWL_ERR(trans, "Current SW read_ptr %d write_ptr %d\n", |
| 173 | txq->q.read_ptr, txq->q.write_ptr); |
| 174 | |
Emmanuel Grumbach | 4fd442d | 2012-12-24 14:27:11 +0200 | [diff] [blame] | 175 | iwl_trans_read_mem_bytes(trans, scd_sram_addr, buf, sizeof(buf)); |
Emmanuel Grumbach | f02831b | 2012-11-14 14:44:18 +0200 | [diff] [blame] | 176 | |
| 177 | iwl_print_hex_error(trans, buf, sizeof(buf)); |
| 178 | |
| 179 | for (i = 0; i < FH_TCSR_CHNL_NUM; i++) |
| 180 | IWL_ERR(trans, "FH TRBs(%d) = 0x%08x\n", i, |
| 181 | iwl_read_direct32(trans, FH_TX_TRB_REG(i))); |
| 182 | |
| 183 | for (i = 0; i < trans->cfg->base_params->num_of_queues; i++) { |
| 184 | u32 status = iwl_read_prph(trans, SCD_QUEUE_STATUS_BITS(i)); |
| 185 | u8 fifo = (status >> SCD_QUEUE_STTS_REG_POS_TXF) & 0x7; |
| 186 | bool active = !!(status & BIT(SCD_QUEUE_STTS_REG_POS_ACTIVE)); |
| 187 | u32 tbl_dw = |
Emmanuel Grumbach | 4fd442d | 2012-12-24 14:27:11 +0200 | [diff] [blame] | 188 | iwl_trans_read_mem32(trans, |
| 189 | trans_pcie->scd_base_addr + |
| 190 | SCD_TRANS_TBL_OFFSET_QUEUE(i)); |
Emmanuel Grumbach | f02831b | 2012-11-14 14:44:18 +0200 | [diff] [blame] | 191 | |
| 192 | if (i & 0x1) |
| 193 | tbl_dw = (tbl_dw & 0xFFFF0000) >> 16; |
| 194 | else |
| 195 | tbl_dw = tbl_dw & 0x0000FFFF; |
| 196 | |
| 197 | IWL_ERR(trans, |
| 198 | "Q %d is %sactive and mapped to fifo %d ra_tid 0x%04x [%d,%d]\n", |
| 199 | i, active ? "" : "in", fifo, tbl_dw, |
| 200 | iwl_read_prph(trans, |
| 201 | SCD_QUEUE_RDPTR(i)) & (txq->q.n_bd - 1), |
| 202 | iwl_read_prph(trans, SCD_QUEUE_WRPTR(i))); |
| 203 | } |
| 204 | |
| 205 | for (i = q->read_ptr; i != q->write_ptr; |
Johannes Berg | 38c0f334 | 2013-02-27 13:18:50 +0100 | [diff] [blame] | 206 | i = iwl_queue_inc_wrap(i, q->n_bd)) |
Emmanuel Grumbach | f02831b | 2012-11-14 14:44:18 +0200 | [diff] [blame] | 207 | IWL_ERR(trans, "scratch %d = 0x%08x\n", i, |
Johannes Berg | 38c0f334 | 2013-02-27 13:18:50 +0100 | [diff] [blame] | 208 | le32_to_cpu(txq->scratchbufs[i].scratch)); |
Emmanuel Grumbach | f02831b | 2012-11-14 14:44:18 +0200 | [diff] [blame] | 209 | |
Arik Nemtsov | 2a988e9 | 2013-12-01 13:50:40 +0200 | [diff] [blame] | 210 | iwl_trans_fw_error(trans); |
Emmanuel Grumbach | f02831b | 2012-11-14 14:44:18 +0200 | [diff] [blame] | 211 | } |
| 212 | |
Emmanuel Grumbach | 990aa6d | 2012-11-14 12:39:52 +0200 | [diff] [blame] | 213 | /* |
| 214 | * iwl_pcie_txq_update_byte_cnt_tbl - Set up entry in Tx byte-count array |
Emmanuel Grumbach | 48d42c4 | 2011-07-10 10:47:01 +0300 | [diff] [blame] | 215 | */ |
Emmanuel Grumbach | f02831b | 2012-11-14 14:44:18 +0200 | [diff] [blame] | 216 | static void iwl_pcie_txq_update_byte_cnt_tbl(struct iwl_trans *trans, |
| 217 | struct iwl_txq *txq, u16 byte_cnt) |
Emmanuel Grumbach | 48d42c4 | 2011-07-10 10:47:01 +0300 | [diff] [blame] | 218 | { |
Emmanuel Grumbach | 105183b | 2011-08-25 23:11:02 -0700 | [diff] [blame] | 219 | struct iwlagn_scd_bc_tbl *scd_bc_tbl; |
Johannes Berg | 20d3b64 | 2012-05-16 22:54:29 +0200 | [diff] [blame] | 220 | struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans); |
Emmanuel Grumbach | 48d42c4 | 2011-07-10 10:47:01 +0300 | [diff] [blame] | 221 | int write_ptr = txq->q.write_ptr; |
| 222 | int txq_id = txq->q.id; |
| 223 | u8 sec_ctl = 0; |
| 224 | u8 sta_id = 0; |
| 225 | u16 len = byte_cnt + IWL_TX_CRC_SIZE + IWL_TX_DELIMITER_SIZE; |
| 226 | __le16 bc_ent; |
Emmanuel Grumbach | 132f98c | 2011-09-20 15:37:24 -0700 | [diff] [blame] | 227 | struct iwl_tx_cmd *tx_cmd = |
Johannes Berg | bf8440e | 2012-03-19 17:12:06 +0100 | [diff] [blame] | 228 | (void *) txq->entries[txq->q.write_ptr].cmd->payload; |
Emmanuel Grumbach | 48d42c4 | 2011-07-10 10:47:01 +0300 | [diff] [blame] | 229 | |
Emmanuel Grumbach | 105183b | 2011-08-25 23:11:02 -0700 | [diff] [blame] | 230 | scd_bc_tbl = trans_pcie->scd_bc_tbls.addr; |
| 231 | |
Emmanuel Grumbach | 48d42c4 | 2011-07-10 10:47:01 +0300 | [diff] [blame] | 232 | WARN_ON(len > 0xFFF || write_ptr >= TFD_QUEUE_SIZE_MAX); |
| 233 | |
Emmanuel Grumbach | 132f98c | 2011-09-20 15:37:24 -0700 | [diff] [blame] | 234 | sta_id = tx_cmd->sta_id; |
| 235 | sec_ctl = tx_cmd->sec_ctl; |
Emmanuel Grumbach | 48d42c4 | 2011-07-10 10:47:01 +0300 | [diff] [blame] | 236 | |
| 237 | switch (sec_ctl & TX_CMD_SEC_MSK) { |
| 238 | case TX_CMD_SEC_CCM: |
Johannes Berg | 4325f6c | 2013-05-08 13:09:08 +0200 | [diff] [blame] | 239 | len += IEEE80211_CCMP_MIC_LEN; |
Emmanuel Grumbach | 48d42c4 | 2011-07-10 10:47:01 +0300 | [diff] [blame] | 240 | break; |
| 241 | case TX_CMD_SEC_TKIP: |
Johannes Berg | 4325f6c | 2013-05-08 13:09:08 +0200 | [diff] [blame] | 242 | len += IEEE80211_TKIP_ICV_LEN; |
Emmanuel Grumbach | 48d42c4 | 2011-07-10 10:47:01 +0300 | [diff] [blame] | 243 | break; |
| 244 | case TX_CMD_SEC_WEP: |
Johannes Berg | 4325f6c | 2013-05-08 13:09:08 +0200 | [diff] [blame] | 245 | len += IEEE80211_WEP_IV_LEN + IEEE80211_WEP_ICV_LEN; |
Emmanuel Grumbach | 48d42c4 | 2011-07-10 10:47:01 +0300 | [diff] [blame] | 246 | break; |
| 247 | } |
| 248 | |
Emmanuel Grumbach | 046db34 | 2012-12-05 15:07:54 +0200 | [diff] [blame] | 249 | if (trans_pcie->bc_table_dword) |
| 250 | len = DIV_ROUND_UP(len, 4); |
| 251 | |
| 252 | bc_ent = cpu_to_le16(len | (sta_id << 12)); |
Emmanuel Grumbach | 48d42c4 | 2011-07-10 10:47:01 +0300 | [diff] [blame] | 253 | |
| 254 | scd_bc_tbl[txq_id].tfd_offset[write_ptr] = bc_ent; |
| 255 | |
| 256 | if (write_ptr < TFD_QUEUE_SIZE_BC_DUP) |
| 257 | scd_bc_tbl[txq_id]. |
| 258 | tfd_offset[TFD_QUEUE_SIZE_MAX + write_ptr] = bc_ent; |
| 259 | } |
| 260 | |
Emmanuel Grumbach | f02831b | 2012-11-14 14:44:18 +0200 | [diff] [blame] | 261 | static void iwl_pcie_txq_inval_byte_cnt_tbl(struct iwl_trans *trans, |
| 262 | struct iwl_txq *txq) |
| 263 | { |
| 264 | struct iwl_trans_pcie *trans_pcie = |
| 265 | IWL_TRANS_GET_PCIE_TRANS(trans); |
| 266 | struct iwlagn_scd_bc_tbl *scd_bc_tbl = trans_pcie->scd_bc_tbls.addr; |
| 267 | int txq_id = txq->q.id; |
| 268 | int read_ptr = txq->q.read_ptr; |
| 269 | u8 sta_id = 0; |
| 270 | __le16 bc_ent; |
| 271 | struct iwl_tx_cmd *tx_cmd = |
| 272 | (void *)txq->entries[txq->q.read_ptr].cmd->payload; |
| 273 | |
| 274 | WARN_ON(read_ptr >= TFD_QUEUE_SIZE_MAX); |
| 275 | |
| 276 | if (txq_id != trans_pcie->cmd_queue) |
| 277 | sta_id = tx_cmd->sta_id; |
| 278 | |
| 279 | bc_ent = cpu_to_le16(1 | (sta_id << 12)); |
| 280 | scd_bc_tbl[txq_id].tfd_offset[read_ptr] = bc_ent; |
| 281 | |
| 282 | if (read_ptr < TFD_QUEUE_SIZE_BC_DUP) |
| 283 | scd_bc_tbl[txq_id]. |
| 284 | tfd_offset[TFD_QUEUE_SIZE_MAX + read_ptr] = bc_ent; |
| 285 | } |
| 286 | |
Emmanuel Grumbach | 990aa6d | 2012-11-14 12:39:52 +0200 | [diff] [blame] | 287 | /* |
| 288 | * iwl_pcie_txq_inc_wr_ptr - Send new write index to hardware |
Tomas Winkler | fd4abac | 2008-05-15 13:54:07 +0800 | [diff] [blame] | 289 | */ |
Emmanuel Grumbach | 990aa6d | 2012-11-14 12:39:52 +0200 | [diff] [blame] | 290 | void iwl_pcie_txq_inc_wr_ptr(struct iwl_trans *trans, struct iwl_txq *txq) |
Tomas Winkler | fd4abac | 2008-05-15 13:54:07 +0800 | [diff] [blame] | 291 | { |
| 292 | u32 reg = 0; |
Tomas Winkler | fd4abac | 2008-05-15 13:54:07 +0800 | [diff] [blame] | 293 | int txq_id = txq->q.id; |
| 294 | |
| 295 | if (txq->need_update == 0) |
Abhijeet Kolekar | 7bfedc5 | 2010-02-03 13:47:56 -0800 | [diff] [blame] | 296 | return; |
Tomas Winkler | fd4abac | 2008-05-15 13:54:07 +0800 | [diff] [blame] | 297 | |
Emmanuel Grumbach | 035f7ff | 2012-03-26 08:57:01 -0700 | [diff] [blame] | 298 | if (trans->cfg->base_params->shadow_reg_enable) { |
Wey-Yi Guy | f81c1f4 | 2010-11-10 09:56:50 -0800 | [diff] [blame] | 299 | /* shadow register enabled */ |
Emmanuel Grumbach | 1042db2 | 2012-01-03 16:56:15 +0200 | [diff] [blame] | 300 | iwl_write32(trans, HBUS_TARG_WRPTR, |
Tomas Winkler | fd4abac | 2008-05-15 13:54:07 +0800 | [diff] [blame] | 301 | txq->q.write_ptr | (txq_id << 8)); |
Wey-Yi Guy | f81c1f4 | 2010-11-10 09:56:50 -0800 | [diff] [blame] | 302 | } else { |
| 303 | /* if we're trying to save power */ |
Arik Nemtsov | eb7ff77 | 2013-12-01 12:30:38 +0200 | [diff] [blame] | 304 | if (test_bit(STATUS_TPOWER_PMI, &trans->status)) { |
Wey-Yi Guy | f81c1f4 | 2010-11-10 09:56:50 -0800 | [diff] [blame] | 305 | /* wake up nic if it's powered down ... |
| 306 | * uCode will wake up, and interrupt us again, so next |
| 307 | * time we'll skip this part. */ |
Emmanuel Grumbach | 1042db2 | 2012-01-03 16:56:15 +0200 | [diff] [blame] | 308 | reg = iwl_read32(trans, CSR_UCODE_DRV_GP1); |
Tomas Winkler | fd4abac | 2008-05-15 13:54:07 +0800 | [diff] [blame] | 309 | |
Wey-Yi Guy | f81c1f4 | 2010-11-10 09:56:50 -0800 | [diff] [blame] | 310 | if (reg & CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP) { |
Emmanuel Grumbach | fd65693 | 2011-08-25 23:11:19 -0700 | [diff] [blame] | 311 | IWL_DEBUG_INFO(trans, |
Wey-Yi Guy | f81c1f4 | 2010-11-10 09:56:50 -0800 | [diff] [blame] | 312 | "Tx queue %d requesting wakeup," |
| 313 | " GP1 = 0x%x\n", txq_id, reg); |
Emmanuel Grumbach | 1042db2 | 2012-01-03 16:56:15 +0200 | [diff] [blame] | 314 | iwl_set_bit(trans, CSR_GP_CNTRL, |
Wey-Yi Guy | f81c1f4 | 2010-11-10 09:56:50 -0800 | [diff] [blame] | 315 | CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ); |
| 316 | return; |
| 317 | } |
| 318 | |
Emmanuel Grumbach | 1c3fea8 | 2013-01-02 12:12:25 +0200 | [diff] [blame] | 319 | IWL_DEBUG_TX(trans, "Q:%d WR: 0x%x\n", txq_id, |
| 320 | txq->q.write_ptr); |
| 321 | |
Emmanuel Grumbach | 1042db2 | 2012-01-03 16:56:15 +0200 | [diff] [blame] | 322 | iwl_write_direct32(trans, HBUS_TARG_WRPTR, |
Wey-Yi Guy | f81c1f4 | 2010-11-10 09:56:50 -0800 | [diff] [blame] | 323 | txq->q.write_ptr | (txq_id << 8)); |
| 324 | |
| 325 | /* |
| 326 | * else not in power-save mode, |
| 327 | * uCode will never sleep when we're |
| 328 | * trying to tx (during RFKILL, we're not trying to tx). |
| 329 | */ |
| 330 | } else |
Emmanuel Grumbach | 1042db2 | 2012-01-03 16:56:15 +0200 | [diff] [blame] | 331 | iwl_write32(trans, HBUS_TARG_WRPTR, |
Wey-Yi Guy | f81c1f4 | 2010-11-10 09:56:50 -0800 | [diff] [blame] | 332 | txq->q.write_ptr | (txq_id << 8)); |
| 333 | } |
Tomas Winkler | fd4abac | 2008-05-15 13:54:07 +0800 | [diff] [blame] | 334 | txq->need_update = 0; |
Tomas Winkler | fd4abac | 2008-05-15 13:54:07 +0800 | [diff] [blame] | 335 | } |
Tomas Winkler | fd4abac | 2008-05-15 13:54:07 +0800 | [diff] [blame] | 336 | |
Emmanuel Grumbach | f02831b | 2012-11-14 14:44:18 +0200 | [diff] [blame] | 337 | static inline dma_addr_t iwl_pcie_tfd_tb_get_addr(struct iwl_tfd *tfd, u8 idx) |
Johannes Berg | 214d14d | 2011-05-04 07:50:44 -0700 | [diff] [blame] | 338 | { |
| 339 | struct iwl_tfd_tb *tb = &tfd->tbs[idx]; |
| 340 | |
| 341 | dma_addr_t addr = get_unaligned_le32(&tb->lo); |
| 342 | if (sizeof(dma_addr_t) > sizeof(u32)) |
| 343 | addr |= |
| 344 | ((dma_addr_t)(le16_to_cpu(tb->hi_n_len) & 0xF) << 16) << 16; |
| 345 | |
| 346 | return addr; |
| 347 | } |
| 348 | |
Emmanuel Grumbach | f02831b | 2012-11-14 14:44:18 +0200 | [diff] [blame] | 349 | static inline u16 iwl_pcie_tfd_tb_get_len(struct iwl_tfd *tfd, u8 idx) |
Johannes Berg | 214d14d | 2011-05-04 07:50:44 -0700 | [diff] [blame] | 350 | { |
| 351 | struct iwl_tfd_tb *tb = &tfd->tbs[idx]; |
| 352 | |
| 353 | return le16_to_cpu(tb->hi_n_len) >> 4; |
| 354 | } |
| 355 | |
Emmanuel Grumbach | f02831b | 2012-11-14 14:44:18 +0200 | [diff] [blame] | 356 | static inline void iwl_pcie_tfd_set_tb(struct iwl_tfd *tfd, u8 idx, |
| 357 | dma_addr_t addr, u16 len) |
Johannes Berg | 214d14d | 2011-05-04 07:50:44 -0700 | [diff] [blame] | 358 | { |
| 359 | struct iwl_tfd_tb *tb = &tfd->tbs[idx]; |
| 360 | u16 hi_n_len = len << 4; |
| 361 | |
| 362 | put_unaligned_le32(addr, &tb->lo); |
| 363 | if (sizeof(dma_addr_t) > sizeof(u32)) |
| 364 | hi_n_len |= ((addr >> 16) >> 16) & 0xF; |
| 365 | |
| 366 | tb->hi_n_len = cpu_to_le16(hi_n_len); |
| 367 | |
| 368 | tfd->num_tbs = idx + 1; |
| 369 | } |
| 370 | |
Emmanuel Grumbach | f02831b | 2012-11-14 14:44:18 +0200 | [diff] [blame] | 371 | static inline u8 iwl_pcie_tfd_get_num_tbs(struct iwl_tfd *tfd) |
Johannes Berg | 214d14d | 2011-05-04 07:50:44 -0700 | [diff] [blame] | 372 | { |
| 373 | return tfd->num_tbs & 0x1f; |
| 374 | } |
| 375 | |
Emmanuel Grumbach | f02831b | 2012-11-14 14:44:18 +0200 | [diff] [blame] | 376 | static void iwl_pcie_tfd_unmap(struct iwl_trans *trans, |
Johannes Berg | 9889175 | 2013-02-26 11:28:19 +0100 | [diff] [blame] | 377 | struct iwl_cmd_meta *meta, |
| 378 | struct iwl_tfd *tfd) |
Johannes Berg | 214d14d | 2011-05-04 07:50:44 -0700 | [diff] [blame] | 379 | { |
Johannes Berg | 214d14d | 2011-05-04 07:50:44 -0700 | [diff] [blame] | 380 | int i; |
| 381 | int num_tbs; |
| 382 | |
Johannes Berg | 214d14d | 2011-05-04 07:50:44 -0700 | [diff] [blame] | 383 | /* Sanity check on number of chunks */ |
Emmanuel Grumbach | f02831b | 2012-11-14 14:44:18 +0200 | [diff] [blame] | 384 | num_tbs = iwl_pcie_tfd_get_num_tbs(tfd); |
Johannes Berg | 214d14d | 2011-05-04 07:50:44 -0700 | [diff] [blame] | 385 | |
| 386 | if (num_tbs >= IWL_NUM_OF_TBS) { |
Emmanuel Grumbach | 6d8f6ee | 2011-08-25 23:11:06 -0700 | [diff] [blame] | 387 | IWL_ERR(trans, "Too many chunks: %i\n", num_tbs); |
Johannes Berg | 214d14d | 2011-05-04 07:50:44 -0700 | [diff] [blame] | 388 | /* @todo issue fatal error, it is quite serious situation */ |
| 389 | return; |
| 390 | } |
| 391 | |
Johannes Berg | 38c0f334 | 2013-02-27 13:18:50 +0100 | [diff] [blame] | 392 | /* first TB is never freed - it's the scratchbuf data */ |
Johannes Berg | 214d14d | 2011-05-04 07:50:44 -0700 | [diff] [blame] | 393 | |
Johannes Berg | 214d14d | 2011-05-04 07:50:44 -0700 | [diff] [blame] | 394 | for (i = 1; i < num_tbs; i++) |
Emmanuel Grumbach | f02831b | 2012-11-14 14:44:18 +0200 | [diff] [blame] | 395 | dma_unmap_single(trans->dev, iwl_pcie_tfd_tb_get_addr(tfd, i), |
Johannes Berg | 9889175 | 2013-02-26 11:28:19 +0100 | [diff] [blame] | 396 | iwl_pcie_tfd_tb_get_len(tfd, i), |
| 397 | DMA_TO_DEVICE); |
Emmanuel Grumbach | ebed633 | 2012-05-16 22:35:58 +0200 | [diff] [blame] | 398 | |
| 399 | tfd->num_tbs = 0; |
Johannes Berg | 4ce7cc2 | 2011-05-13 11:57:40 -0700 | [diff] [blame] | 400 | } |
| 401 | |
Emmanuel Grumbach | 990aa6d | 2012-11-14 12:39:52 +0200 | [diff] [blame] | 402 | /* |
| 403 | * iwl_pcie_txq_free_tfd - Free all chunks referenced by TFD [txq->q.read_ptr] |
Emmanuel Grumbach | 6d8f6ee | 2011-08-25 23:11:06 -0700 | [diff] [blame] | 404 | * @trans - transport private data |
Johannes Berg | 4ce7cc2 | 2011-05-13 11:57:40 -0700 | [diff] [blame] | 405 | * @txq - tx queue |
Emmanuel Grumbach | ebed633 | 2012-05-16 22:35:58 +0200 | [diff] [blame] | 406 | * @dma_dir - the direction of the DMA mapping |
Johannes Berg | 4ce7cc2 | 2011-05-13 11:57:40 -0700 | [diff] [blame] | 407 | * |
| 408 | * Does NOT advance any TFD circular buffer read/write indexes |
| 409 | * Does NOT free the TFD itself (which is within circular buffer) |
| 410 | */ |
Johannes Berg | 9889175 | 2013-02-26 11:28:19 +0100 | [diff] [blame] | 411 | static void iwl_pcie_txq_free_tfd(struct iwl_trans *trans, struct iwl_txq *txq) |
Johannes Berg | 4ce7cc2 | 2011-05-13 11:57:40 -0700 | [diff] [blame] | 412 | { |
| 413 | struct iwl_tfd *tfd_tmp = txq->tfds; |
Johannes Berg | 4ce7cc2 | 2011-05-13 11:57:40 -0700 | [diff] [blame] | 414 | |
Emmanuel Grumbach | ebed633 | 2012-05-16 22:35:58 +0200 | [diff] [blame] | 415 | /* rd_ptr is bounded by n_bd and idx is bounded by n_window */ |
| 416 | int rd_ptr = txq->q.read_ptr; |
| 417 | int idx = get_cmd_index(&txq->q, rd_ptr); |
| 418 | |
Johannes Berg | 015c15e | 2012-03-05 11:24:24 -0800 | [diff] [blame] | 419 | lockdep_assert_held(&txq->lock); |
| 420 | |
Emmanuel Grumbach | ebed633 | 2012-05-16 22:35:58 +0200 | [diff] [blame] | 421 | /* We have only q->n_window txq->entries, but we use q->n_bd tfds */ |
Johannes Berg | 9889175 | 2013-02-26 11:28:19 +0100 | [diff] [blame] | 422 | iwl_pcie_tfd_unmap(trans, &txq->entries[idx].meta, &tfd_tmp[rd_ptr]); |
Johannes Berg | 214d14d | 2011-05-04 07:50:44 -0700 | [diff] [blame] | 423 | |
| 424 | /* free SKB */ |
Johannes Berg | bf8440e | 2012-03-19 17:12:06 +0100 | [diff] [blame] | 425 | if (txq->entries) { |
Johannes Berg | 214d14d | 2011-05-04 07:50:44 -0700 | [diff] [blame] | 426 | struct sk_buff *skb; |
| 427 | |
Emmanuel Grumbach | ebed633 | 2012-05-16 22:35:58 +0200 | [diff] [blame] | 428 | skb = txq->entries[idx].skb; |
Johannes Berg | 214d14d | 2011-05-04 07:50:44 -0700 | [diff] [blame] | 429 | |
Emmanuel Grumbach | 909e9b2 | 2011-09-15 11:46:30 -0700 | [diff] [blame] | 430 | /* Can be called from irqs-disabled context |
| 431 | * If skb is not NULL, it means that the whole queue is being |
| 432 | * freed and that the queue is not empty - free the skb |
| 433 | */ |
Johannes Berg | 214d14d | 2011-05-04 07:50:44 -0700 | [diff] [blame] | 434 | if (skb) { |
Emmanuel Grumbach | ed277c9 | 2012-02-09 16:08:15 +0200 | [diff] [blame] | 435 | iwl_op_mode_free_skb(trans->op_mode, skb); |
Emmanuel Grumbach | ebed633 | 2012-05-16 22:35:58 +0200 | [diff] [blame] | 436 | txq->entries[idx].skb = NULL; |
Johannes Berg | 214d14d | 2011-05-04 07:50:44 -0700 | [diff] [blame] | 437 | } |
| 438 | } |
| 439 | } |
| 440 | |
Emmanuel Grumbach | f02831b | 2012-11-14 14:44:18 +0200 | [diff] [blame] | 441 | static int iwl_pcie_txq_build_tfd(struct iwl_trans *trans, struct iwl_txq *txq, |
| 442 | dma_addr_t addr, u16 len, u8 reset) |
Johannes Berg | 214d14d | 2011-05-04 07:50:44 -0700 | [diff] [blame] | 443 | { |
| 444 | struct iwl_queue *q; |
| 445 | struct iwl_tfd *tfd, *tfd_tmp; |
| 446 | u32 num_tbs; |
| 447 | |
| 448 | q = &txq->q; |
Johannes Berg | 4ce7cc2 | 2011-05-13 11:57:40 -0700 | [diff] [blame] | 449 | tfd_tmp = txq->tfds; |
Johannes Berg | 214d14d | 2011-05-04 07:50:44 -0700 | [diff] [blame] | 450 | tfd = &tfd_tmp[q->write_ptr]; |
| 451 | |
| 452 | if (reset) |
| 453 | memset(tfd, 0, sizeof(*tfd)); |
| 454 | |
Emmanuel Grumbach | f02831b | 2012-11-14 14:44:18 +0200 | [diff] [blame] | 455 | num_tbs = iwl_pcie_tfd_get_num_tbs(tfd); |
Johannes Berg | 214d14d | 2011-05-04 07:50:44 -0700 | [diff] [blame] | 456 | |
| 457 | /* Each TFD can point to a maximum 20 Tx buffers */ |
| 458 | if (num_tbs >= IWL_NUM_OF_TBS) { |
Emmanuel Grumbach | 6d8f6ee | 2011-08-25 23:11:06 -0700 | [diff] [blame] | 459 | IWL_ERR(trans, "Error can not send more than %d chunks\n", |
Johannes Berg | 20d3b64 | 2012-05-16 22:54:29 +0200 | [diff] [blame] | 460 | IWL_NUM_OF_TBS); |
Johannes Berg | 214d14d | 2011-05-04 07:50:44 -0700 | [diff] [blame] | 461 | return -EINVAL; |
| 462 | } |
| 463 | |
Eliad Peller | 1092b9b | 2013-07-16 17:53:43 +0300 | [diff] [blame] | 464 | if (WARN(addr & ~IWL_TX_DMA_MASK, |
| 465 | "Unaligned address = %llx\n", (unsigned long long)addr)) |
Johannes Berg | 214d14d | 2011-05-04 07:50:44 -0700 | [diff] [blame] | 466 | return -EINVAL; |
| 467 | |
Emmanuel Grumbach | f02831b | 2012-11-14 14:44:18 +0200 | [diff] [blame] | 468 | iwl_pcie_tfd_set_tb(tfd, num_tbs, addr, len); |
Johannes Berg | 214d14d | 2011-05-04 07:50:44 -0700 | [diff] [blame] | 469 | |
| 470 | return 0; |
| 471 | } |
| 472 | |
Emmanuel Grumbach | f02831b | 2012-11-14 14:44:18 +0200 | [diff] [blame] | 473 | static int iwl_pcie_txq_alloc(struct iwl_trans *trans, |
| 474 | struct iwl_txq *txq, int slots_num, |
| 475 | u32 txq_id) |
Tomas Winkler | fd4abac | 2008-05-15 13:54:07 +0800 | [diff] [blame] | 476 | { |
Emmanuel Grumbach | f02831b | 2012-11-14 14:44:18 +0200 | [diff] [blame] | 477 | struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans); |
| 478 | size_t tfd_sz = sizeof(struct iwl_tfd) * TFD_QUEUE_SIZE_MAX; |
Johannes Berg | 38c0f334 | 2013-02-27 13:18:50 +0100 | [diff] [blame] | 479 | size_t scratchbuf_sz; |
Emmanuel Grumbach | f02831b | 2012-11-14 14:44:18 +0200 | [diff] [blame] | 480 | int i; |
Tomas Winkler | fd4abac | 2008-05-15 13:54:07 +0800 | [diff] [blame] | 481 | |
Emmanuel Grumbach | f02831b | 2012-11-14 14:44:18 +0200 | [diff] [blame] | 482 | if (WARN_ON(txq->entries || txq->tfds)) |
| 483 | return -EINVAL; |
Tomas Winkler | fd4abac | 2008-05-15 13:54:07 +0800 | [diff] [blame] | 484 | |
Emmanuel Grumbach | f02831b | 2012-11-14 14:44:18 +0200 | [diff] [blame] | 485 | setup_timer(&txq->stuck_timer, iwl_pcie_txq_stuck_timer, |
| 486 | (unsigned long)txq); |
| 487 | txq->trans_pcie = trans_pcie; |
| 488 | |
| 489 | txq->q.n_window = slots_num; |
| 490 | |
| 491 | txq->entries = kcalloc(slots_num, |
| 492 | sizeof(struct iwl_pcie_txq_entry), |
| 493 | GFP_KERNEL); |
| 494 | |
| 495 | if (!txq->entries) |
| 496 | goto error; |
| 497 | |
| 498 | if (txq_id == trans_pcie->cmd_queue) |
| 499 | for (i = 0; i < slots_num; i++) { |
| 500 | txq->entries[i].cmd = |
| 501 | kmalloc(sizeof(struct iwl_device_cmd), |
| 502 | GFP_KERNEL); |
| 503 | if (!txq->entries[i].cmd) |
| 504 | goto error; |
| 505 | } |
| 506 | |
| 507 | /* Circular buffer of transmit frame descriptors (TFDs), |
| 508 | * shared with device */ |
| 509 | txq->tfds = dma_alloc_coherent(trans->dev, tfd_sz, |
| 510 | &txq->q.dma_addr, GFP_KERNEL); |
Joe Perches | d0320f7 | 2013-03-14 13:07:21 +0000 | [diff] [blame] | 511 | if (!txq->tfds) |
Emmanuel Grumbach | f02831b | 2012-11-14 14:44:18 +0200 | [diff] [blame] | 512 | goto error; |
Johannes Berg | 38c0f334 | 2013-02-27 13:18:50 +0100 | [diff] [blame] | 513 | |
| 514 | BUILD_BUG_ON(IWL_HCMD_SCRATCHBUF_SIZE != sizeof(*txq->scratchbufs)); |
| 515 | BUILD_BUG_ON(offsetof(struct iwl_pcie_txq_scratch_buf, scratch) != |
| 516 | sizeof(struct iwl_cmd_header) + |
| 517 | offsetof(struct iwl_tx_cmd, scratch)); |
| 518 | |
| 519 | scratchbuf_sz = sizeof(*txq->scratchbufs) * slots_num; |
| 520 | |
| 521 | txq->scratchbufs = dma_alloc_coherent(trans->dev, scratchbuf_sz, |
| 522 | &txq->scratchbufs_dma, |
| 523 | GFP_KERNEL); |
| 524 | if (!txq->scratchbufs) |
| 525 | goto err_free_tfds; |
| 526 | |
Emmanuel Grumbach | f02831b | 2012-11-14 14:44:18 +0200 | [diff] [blame] | 527 | txq->q.id = txq_id; |
| 528 | |
| 529 | return 0; |
Johannes Berg | 38c0f334 | 2013-02-27 13:18:50 +0100 | [diff] [blame] | 530 | err_free_tfds: |
| 531 | dma_free_coherent(trans->dev, tfd_sz, txq->tfds, txq->q.dma_addr); |
Emmanuel Grumbach | f02831b | 2012-11-14 14:44:18 +0200 | [diff] [blame] | 532 | error: |
| 533 | if (txq->entries && txq_id == trans_pcie->cmd_queue) |
| 534 | for (i = 0; i < slots_num; i++) |
| 535 | kfree(txq->entries[i].cmd); |
| 536 | kfree(txq->entries); |
| 537 | txq->entries = NULL; |
| 538 | |
| 539 | return -ENOMEM; |
| 540 | |
| 541 | } |
| 542 | |
| 543 | static int iwl_pcie_txq_init(struct iwl_trans *trans, struct iwl_txq *txq, |
| 544 | int slots_num, u32 txq_id) |
| 545 | { |
| 546 | int ret; |
| 547 | |
| 548 | txq->need_update = 0; |
| 549 | |
| 550 | /* TFD_QUEUE_SIZE_MAX must be power-of-two size, otherwise |
| 551 | * iwl_queue_inc_wrap and iwl_queue_dec_wrap are broken. */ |
| 552 | BUILD_BUG_ON(TFD_QUEUE_SIZE_MAX & (TFD_QUEUE_SIZE_MAX - 1)); |
| 553 | |
| 554 | /* Initialize queue's high/low-water marks, and head/tail indexes */ |
| 555 | ret = iwl_queue_init(&txq->q, TFD_QUEUE_SIZE_MAX, slots_num, |
| 556 | txq_id); |
| 557 | if (ret) |
| 558 | return ret; |
| 559 | |
| 560 | spin_lock_init(&txq->lock); |
| 561 | |
| 562 | /* |
| 563 | * Tell nic where to find circular buffer of Tx Frame Descriptors for |
| 564 | * given Tx queue, and enable the DMA channel used for that queue. |
| 565 | * Circular buffer (TFD queue in DRAM) physical base address */ |
| 566 | iwl_write_direct32(trans, FH_MEM_CBBC_QUEUE(txq_id), |
| 567 | txq->q.dma_addr >> 8); |
| 568 | |
| 569 | return 0; |
Tomas Winkler | fd4abac | 2008-05-15 13:54:07 +0800 | [diff] [blame] | 570 | } |
Tomas Winkler | fd4abac | 2008-05-15 13:54:07 +0800 | [diff] [blame] | 571 | |
Emmanuel Grumbach | 990aa6d | 2012-11-14 12:39:52 +0200 | [diff] [blame] | 572 | /* |
Emmanuel Grumbach | f02831b | 2012-11-14 14:44:18 +0200 | [diff] [blame] | 573 | * iwl_pcie_txq_unmap - Unmap any remaining DMA mappings and free skb's |
Ron Rindjunsky | 1053d35 | 2008-05-05 10:22:43 +0800 | [diff] [blame] | 574 | */ |
Emmanuel Grumbach | f02831b | 2012-11-14 14:44:18 +0200 | [diff] [blame] | 575 | static void iwl_pcie_txq_unmap(struct iwl_trans *trans, int txq_id) |
Ron Rindjunsky | 1053d35 | 2008-05-05 10:22:43 +0800 | [diff] [blame] | 576 | { |
Emmanuel Grumbach | f02831b | 2012-11-14 14:44:18 +0200 | [diff] [blame] | 577 | struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans); |
| 578 | struct iwl_txq *txq = &trans_pcie->txq[txq_id]; |
| 579 | struct iwl_queue *q = &txq->q; |
Ron Rindjunsky | 1053d35 | 2008-05-05 10:22:43 +0800 | [diff] [blame] | 580 | |
Emmanuel Grumbach | f02831b | 2012-11-14 14:44:18 +0200 | [diff] [blame] | 581 | if (!q->n_bd) |
| 582 | return; |
Ron Rindjunsky | 1053d35 | 2008-05-05 10:22:43 +0800 | [diff] [blame] | 583 | |
Emmanuel Grumbach | f02831b | 2012-11-14 14:44:18 +0200 | [diff] [blame] | 584 | spin_lock_bh(&txq->lock); |
| 585 | while (q->write_ptr != q->read_ptr) { |
Emmanuel Grumbach | b967613 | 2013-06-13 11:45:59 +0300 | [diff] [blame] | 586 | IWL_DEBUG_TX_REPLY(trans, "Q %d Free %d\n", |
| 587 | txq_id, q->read_ptr); |
Johannes Berg | 9889175 | 2013-02-26 11:28:19 +0100 | [diff] [blame] | 588 | iwl_pcie_txq_free_tfd(trans, txq); |
Emmanuel Grumbach | f02831b | 2012-11-14 14:44:18 +0200 | [diff] [blame] | 589 | q->read_ptr = iwl_queue_inc_wrap(q->read_ptr, q->n_bd); |
| 590 | } |
Emmanuel Grumbach | b967613 | 2013-06-13 11:45:59 +0300 | [diff] [blame] | 591 | txq->active = false; |
Emmanuel Grumbach | f02831b | 2012-11-14 14:44:18 +0200 | [diff] [blame] | 592 | spin_unlock_bh(&txq->lock); |
Emmanuel Grumbach | 8a487b1 | 2013-06-13 13:10:00 +0300 | [diff] [blame] | 593 | |
| 594 | /* just in case - this queue may have been stopped */ |
| 595 | iwl_wake_queue(trans, txq); |
Emmanuel Grumbach | f02831b | 2012-11-14 14:44:18 +0200 | [diff] [blame] | 596 | } |
Ron Rindjunsky | 1053d35 | 2008-05-05 10:22:43 +0800 | [diff] [blame] | 597 | |
Emmanuel Grumbach | f02831b | 2012-11-14 14:44:18 +0200 | [diff] [blame] | 598 | /* |
| 599 | * iwl_pcie_txq_free - Deallocate DMA queue. |
| 600 | * @txq: Transmit queue to deallocate. |
| 601 | * |
| 602 | * Empty queue by removing and destroying all BD's. |
| 603 | * Free all buffers. |
| 604 | * 0-fill, but do not free "txq" descriptor structure. |
| 605 | */ |
| 606 | static void iwl_pcie_txq_free(struct iwl_trans *trans, int txq_id) |
| 607 | { |
| 608 | struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans); |
| 609 | struct iwl_txq *txq = &trans_pcie->txq[txq_id]; |
| 610 | struct device *dev = trans->dev; |
| 611 | int i; |
Ron Rindjunsky | 1053d35 | 2008-05-05 10:22:43 +0800 | [diff] [blame] | 612 | |
Emmanuel Grumbach | f02831b | 2012-11-14 14:44:18 +0200 | [diff] [blame] | 613 | if (WARN_ON(!txq)) |
| 614 | return; |
| 615 | |
| 616 | iwl_pcie_txq_unmap(trans, txq_id); |
| 617 | |
| 618 | /* De-alloc array of command/tx buffers */ |
| 619 | if (txq_id == trans_pcie->cmd_queue) |
| 620 | for (i = 0; i < txq->q.n_window; i++) { |
| 621 | kfree(txq->entries[i].cmd); |
Emmanuel Grumbach | f02831b | 2012-11-14 14:44:18 +0200 | [diff] [blame] | 622 | kfree(txq->entries[i].free_buf); |
| 623 | } |
| 624 | |
| 625 | /* De-alloc circular buffer of TFDs */ |
| 626 | if (txq->q.n_bd) { |
| 627 | dma_free_coherent(dev, sizeof(struct iwl_tfd) * |
| 628 | txq->q.n_bd, txq->tfds, txq->q.dma_addr); |
Johannes Berg | d21fa2d | 2013-01-08 00:25:21 +0100 | [diff] [blame] | 629 | txq->q.dma_addr = 0; |
Johannes Berg | 38c0f334 | 2013-02-27 13:18:50 +0100 | [diff] [blame] | 630 | |
| 631 | dma_free_coherent(dev, |
| 632 | sizeof(*txq->scratchbufs) * txq->q.n_window, |
| 633 | txq->scratchbufs, txq->scratchbufs_dma); |
Emmanuel Grumbach | f02831b | 2012-11-14 14:44:18 +0200 | [diff] [blame] | 634 | } |
| 635 | |
| 636 | kfree(txq->entries); |
| 637 | txq->entries = NULL; |
| 638 | |
| 639 | del_timer_sync(&txq->stuck_timer); |
| 640 | |
| 641 | /* 0-fill queue descriptor structure */ |
| 642 | memset(txq, 0, sizeof(*txq)); |
| 643 | } |
| 644 | |
| 645 | /* |
| 646 | * Activate/Deactivate Tx DMA/FIFO channels according tx fifos mask |
| 647 | */ |
| 648 | static void iwl_pcie_txq_set_sched(struct iwl_trans *trans, u32 mask) |
| 649 | { |
| 650 | struct iwl_trans_pcie __maybe_unused *trans_pcie = |
| 651 | IWL_TRANS_GET_PCIE_TRANS(trans); |
| 652 | |
| 653 | iwl_write_prph(trans, SCD_TXFACT, mask); |
| 654 | } |
| 655 | |
| 656 | void iwl_pcie_tx_start(struct iwl_trans *trans, u32 scd_base_addr) |
| 657 | { |
| 658 | struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans); |
Johannes Berg | 22dc3c9 | 2013-01-09 00:47:07 +0100 | [diff] [blame] | 659 | int nq = trans->cfg->base_params->num_of_queues; |
Emmanuel Grumbach | f02831b | 2012-11-14 14:44:18 +0200 | [diff] [blame] | 660 | int chan; |
| 661 | u32 reg_val; |
Johannes Berg | 22dc3c9 | 2013-01-09 00:47:07 +0100 | [diff] [blame] | 662 | int clear_dwords = (SCD_TRANS_TBL_OFFSET_QUEUE(nq) - |
| 663 | SCD_CONTEXT_MEM_LOWER_BOUND) / sizeof(u32); |
Emmanuel Grumbach | f02831b | 2012-11-14 14:44:18 +0200 | [diff] [blame] | 664 | |
| 665 | /* make sure all queue are not stopped/used */ |
| 666 | memset(trans_pcie->queue_stopped, 0, sizeof(trans_pcie->queue_stopped)); |
| 667 | memset(trans_pcie->queue_used, 0, sizeof(trans_pcie->queue_used)); |
| 668 | |
| 669 | trans_pcie->scd_base_addr = |
| 670 | iwl_read_prph(trans, SCD_SRAM_BASE_ADDR); |
| 671 | |
| 672 | WARN_ON(scd_base_addr != 0 && |
| 673 | scd_base_addr != trans_pcie->scd_base_addr); |
| 674 | |
Johannes Berg | 22dc3c9 | 2013-01-09 00:47:07 +0100 | [diff] [blame] | 675 | /* reset context data, TX status and translation data */ |
| 676 | iwl_trans_write_mem(trans, trans_pcie->scd_base_addr + |
| 677 | SCD_CONTEXT_MEM_LOWER_BOUND, |
| 678 | NULL, clear_dwords); |
Emmanuel Grumbach | f02831b | 2012-11-14 14:44:18 +0200 | [diff] [blame] | 679 | |
| 680 | iwl_write_prph(trans, SCD_DRAM_BASE_ADDR, |
| 681 | trans_pcie->scd_bc_tbls.dma >> 10); |
| 682 | |
| 683 | /* The chain extension of the SCD doesn't work well. This feature is |
| 684 | * enabled by default by the HW, so we need to disable it manually. |
| 685 | */ |
| 686 | iwl_write_prph(trans, SCD_CHAINEXT_EN, 0); |
| 687 | |
| 688 | iwl_trans_ac_txq_enable(trans, trans_pcie->cmd_queue, |
| 689 | trans_pcie->cmd_fifo); |
| 690 | |
| 691 | /* Activate all Tx DMA/FIFO channels */ |
| 692 | iwl_pcie_txq_set_sched(trans, IWL_MASK(0, 7)); |
| 693 | |
| 694 | /* Enable DMA channel */ |
| 695 | for (chan = 0; chan < FH_TCSR_CHNL_NUM; chan++) |
| 696 | iwl_write_direct32(trans, FH_TCSR_CHNL_TX_CONFIG_REG(chan), |
| 697 | FH_TCSR_TX_CONFIG_REG_VAL_DMA_CHNL_ENABLE | |
| 698 | FH_TCSR_TX_CONFIG_REG_VAL_DMA_CREDIT_ENABLE); |
| 699 | |
| 700 | /* Update FH chicken bits */ |
| 701 | reg_val = iwl_read_direct32(trans, FH_TX_CHICKEN_BITS_REG); |
| 702 | iwl_write_direct32(trans, FH_TX_CHICKEN_BITS_REG, |
| 703 | reg_val | FH_TX_CHICKEN_BITS_SCD_AUTO_RETRY_EN); |
| 704 | |
| 705 | /* Enable L1-Active */ |
| 706 | iwl_clear_bits_prph(trans, APMG_PCIDEV_STT_REG, |
| 707 | APMG_PCIDEV_STT_VAL_L1_ACT_DIS); |
| 708 | } |
| 709 | |
Johannes Berg | ddaf5a5 | 2013-01-08 11:25:44 +0100 | [diff] [blame] | 710 | void iwl_trans_pcie_tx_reset(struct iwl_trans *trans) |
| 711 | { |
| 712 | struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans); |
| 713 | int txq_id; |
| 714 | |
| 715 | for (txq_id = 0; txq_id < trans->cfg->base_params->num_of_queues; |
| 716 | txq_id++) { |
| 717 | struct iwl_txq *txq = &trans_pcie->txq[txq_id]; |
| 718 | |
| 719 | iwl_write_direct32(trans, FH_MEM_CBBC_QUEUE(txq_id), |
| 720 | txq->q.dma_addr >> 8); |
| 721 | iwl_pcie_txq_unmap(trans, txq_id); |
| 722 | txq->q.read_ptr = 0; |
| 723 | txq->q.write_ptr = 0; |
| 724 | } |
| 725 | |
| 726 | /* Tell NIC where to find the "keep warm" buffer */ |
| 727 | iwl_write_direct32(trans, FH_KW_MEM_ADDR_REG, |
| 728 | trans_pcie->kw.dma >> 4); |
| 729 | |
| 730 | iwl_pcie_tx_start(trans, trans_pcie->scd_base_addr); |
| 731 | } |
| 732 | |
Emmanuel Grumbach | f02831b | 2012-11-14 14:44:18 +0200 | [diff] [blame] | 733 | /* |
| 734 | * iwl_pcie_tx_stop - Stop all Tx DMA channels |
| 735 | */ |
| 736 | int iwl_pcie_tx_stop(struct iwl_trans *trans) |
| 737 | { |
| 738 | struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans); |
| 739 | int ch, txq_id, ret; |
Emmanuel Grumbach | f02831b | 2012-11-14 14:44:18 +0200 | [diff] [blame] | 740 | |
| 741 | /* Turn off all Tx DMA fifos */ |
Emmanuel Grumbach | 7b70bd6 | 2013-12-11 10:22:28 +0200 | [diff] [blame^] | 742 | spin_lock(&trans_pcie->irq_lock); |
Emmanuel Grumbach | f02831b | 2012-11-14 14:44:18 +0200 | [diff] [blame] | 743 | |
| 744 | iwl_pcie_txq_set_sched(trans, 0); |
| 745 | |
| 746 | /* Stop each Tx DMA channel, and wait for it to be idle */ |
| 747 | for (ch = 0; ch < FH_TCSR_CHNL_NUM; ch++) { |
| 748 | iwl_write_direct32(trans, |
| 749 | FH_TCSR_CHNL_TX_CONFIG_REG(ch), 0x0); |
| 750 | ret = iwl_poll_direct_bit(trans, FH_TSSR_TX_STATUS_REG, |
| 751 | FH_TSSR_TX_STATUS_REG_MSK_CHNL_IDLE(ch), 1000); |
| 752 | if (ret < 0) |
| 753 | IWL_ERR(trans, |
| 754 | "Failing on timeout while stopping DMA channel %d [0x%08x]\n", |
| 755 | ch, |
| 756 | iwl_read_direct32(trans, |
| 757 | FH_TSSR_TX_STATUS_REG)); |
| 758 | } |
Emmanuel Grumbach | 7b70bd6 | 2013-12-11 10:22:28 +0200 | [diff] [blame^] | 759 | spin_unlock(&trans_pcie->irq_lock); |
Emmanuel Grumbach | f02831b | 2012-11-14 14:44:18 +0200 | [diff] [blame] | 760 | |
| 761 | if (!trans_pcie->txq) { |
| 762 | IWL_WARN(trans, |
| 763 | "Stopping tx queues that aren't allocated...\n"); |
| 764 | return 0; |
| 765 | } |
| 766 | |
| 767 | /* Unmap DMA from host system and free skb's */ |
| 768 | for (txq_id = 0; txq_id < trans->cfg->base_params->num_of_queues; |
| 769 | txq_id++) |
| 770 | iwl_pcie_txq_unmap(trans, txq_id); |
Ron Rindjunsky | 1053d35 | 2008-05-05 10:22:43 +0800 | [diff] [blame] | 771 | |
| 772 | return 0; |
| 773 | } |
| 774 | |
Emmanuel Grumbach | f02831b | 2012-11-14 14:44:18 +0200 | [diff] [blame] | 775 | /* |
| 776 | * iwl_trans_tx_free - Free TXQ Context |
| 777 | * |
| 778 | * Destroy all TX DMA queues and structures |
| 779 | */ |
| 780 | void iwl_pcie_tx_free(struct iwl_trans *trans) |
Emmanuel Grumbach | 48d42c4 | 2011-07-10 10:47:01 +0300 | [diff] [blame] | 781 | { |
Emmanuel Grumbach | f02831b | 2012-11-14 14:44:18 +0200 | [diff] [blame] | 782 | int txq_id; |
| 783 | struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans); |
Emmanuel Grumbach | 48d42c4 | 2011-07-10 10:47:01 +0300 | [diff] [blame] | 784 | |
Emmanuel Grumbach | f02831b | 2012-11-14 14:44:18 +0200 | [diff] [blame] | 785 | /* Tx queues */ |
| 786 | if (trans_pcie->txq) { |
| 787 | for (txq_id = 0; |
| 788 | txq_id < trans->cfg->base_params->num_of_queues; txq_id++) |
| 789 | iwl_pcie_txq_free(trans, txq_id); |
| 790 | } |
Emmanuel Grumbach | 48d42c4 | 2011-07-10 10:47:01 +0300 | [diff] [blame] | 791 | |
Emmanuel Grumbach | f02831b | 2012-11-14 14:44:18 +0200 | [diff] [blame] | 792 | kfree(trans_pcie->txq); |
| 793 | trans_pcie->txq = NULL; |
Emmanuel Grumbach | 48d42c4 | 2011-07-10 10:47:01 +0300 | [diff] [blame] | 794 | |
Emmanuel Grumbach | f02831b | 2012-11-14 14:44:18 +0200 | [diff] [blame] | 795 | iwl_pcie_free_dma_ptr(trans, &trans_pcie->kw); |
Emmanuel Grumbach | 48d42c4 | 2011-07-10 10:47:01 +0300 | [diff] [blame] | 796 | |
Emmanuel Grumbach | f02831b | 2012-11-14 14:44:18 +0200 | [diff] [blame] | 797 | iwl_pcie_free_dma_ptr(trans, &trans_pcie->scd_bc_tbls); |
Emmanuel Grumbach | 48d42c4 | 2011-07-10 10:47:01 +0300 | [diff] [blame] | 798 | } |
| 799 | |
Emmanuel Grumbach | f02831b | 2012-11-14 14:44:18 +0200 | [diff] [blame] | 800 | /* |
| 801 | * iwl_pcie_tx_alloc - allocate TX context |
| 802 | * Allocate all Tx DMA structures and initialize them |
| 803 | */ |
| 804 | static int iwl_pcie_tx_alloc(struct iwl_trans *trans) |
| 805 | { |
| 806 | int ret; |
| 807 | int txq_id, slots_num; |
| 808 | struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans); |
| 809 | |
| 810 | u16 scd_bc_tbls_size = trans->cfg->base_params->num_of_queues * |
| 811 | sizeof(struct iwlagn_scd_bc_tbl); |
| 812 | |
| 813 | /*It is not allowed to alloc twice, so warn when this happens. |
| 814 | * We cannot rely on the previous allocation, so free and fail */ |
| 815 | if (WARN_ON(trans_pcie->txq)) { |
| 816 | ret = -EINVAL; |
| 817 | goto error; |
| 818 | } |
| 819 | |
| 820 | ret = iwl_pcie_alloc_dma_ptr(trans, &trans_pcie->scd_bc_tbls, |
| 821 | scd_bc_tbls_size); |
| 822 | if (ret) { |
| 823 | IWL_ERR(trans, "Scheduler BC Table allocation failed\n"); |
| 824 | goto error; |
| 825 | } |
| 826 | |
| 827 | /* Alloc keep-warm buffer */ |
| 828 | ret = iwl_pcie_alloc_dma_ptr(trans, &trans_pcie->kw, IWL_KW_SIZE); |
| 829 | if (ret) { |
| 830 | IWL_ERR(trans, "Keep Warm allocation failed\n"); |
| 831 | goto error; |
| 832 | } |
| 833 | |
| 834 | trans_pcie->txq = kcalloc(trans->cfg->base_params->num_of_queues, |
| 835 | sizeof(struct iwl_txq), GFP_KERNEL); |
| 836 | if (!trans_pcie->txq) { |
| 837 | IWL_ERR(trans, "Not enough memory for txq\n"); |
Dan Carpenter | 2ab9ba0 | 2013-08-11 02:03:21 +0300 | [diff] [blame] | 838 | ret = -ENOMEM; |
Emmanuel Grumbach | f02831b | 2012-11-14 14:44:18 +0200 | [diff] [blame] | 839 | goto error; |
| 840 | } |
| 841 | |
| 842 | /* Alloc and init all Tx queues, including the command queue (#4/#9) */ |
| 843 | for (txq_id = 0; txq_id < trans->cfg->base_params->num_of_queues; |
| 844 | txq_id++) { |
| 845 | slots_num = (txq_id == trans_pcie->cmd_queue) ? |
| 846 | TFD_CMD_SLOTS : TFD_TX_CMD_SLOTS; |
| 847 | ret = iwl_pcie_txq_alloc(trans, &trans_pcie->txq[txq_id], |
| 848 | slots_num, txq_id); |
| 849 | if (ret) { |
| 850 | IWL_ERR(trans, "Tx %d queue alloc failed\n", txq_id); |
| 851 | goto error; |
| 852 | } |
| 853 | } |
| 854 | |
| 855 | return 0; |
| 856 | |
| 857 | error: |
| 858 | iwl_pcie_tx_free(trans); |
| 859 | |
| 860 | return ret; |
| 861 | } |
| 862 | int iwl_pcie_tx_init(struct iwl_trans *trans) |
| 863 | { |
| 864 | struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans); |
| 865 | int ret; |
| 866 | int txq_id, slots_num; |
Emmanuel Grumbach | f02831b | 2012-11-14 14:44:18 +0200 | [diff] [blame] | 867 | bool alloc = false; |
| 868 | |
| 869 | if (!trans_pcie->txq) { |
| 870 | ret = iwl_pcie_tx_alloc(trans); |
| 871 | if (ret) |
| 872 | goto error; |
| 873 | alloc = true; |
| 874 | } |
| 875 | |
Emmanuel Grumbach | 7b70bd6 | 2013-12-11 10:22:28 +0200 | [diff] [blame^] | 876 | spin_lock(&trans_pcie->irq_lock); |
Emmanuel Grumbach | f02831b | 2012-11-14 14:44:18 +0200 | [diff] [blame] | 877 | |
| 878 | /* Turn off all Tx DMA fifos */ |
| 879 | iwl_write_prph(trans, SCD_TXFACT, 0); |
| 880 | |
| 881 | /* Tell NIC where to find the "keep warm" buffer */ |
| 882 | iwl_write_direct32(trans, FH_KW_MEM_ADDR_REG, |
| 883 | trans_pcie->kw.dma >> 4); |
| 884 | |
Emmanuel Grumbach | 7b70bd6 | 2013-12-11 10:22:28 +0200 | [diff] [blame^] | 885 | spin_unlock(&trans_pcie->irq_lock); |
Emmanuel Grumbach | f02831b | 2012-11-14 14:44:18 +0200 | [diff] [blame] | 886 | |
| 887 | /* Alloc and init all Tx queues, including the command queue (#4/#9) */ |
| 888 | for (txq_id = 0; txq_id < trans->cfg->base_params->num_of_queues; |
| 889 | txq_id++) { |
| 890 | slots_num = (txq_id == trans_pcie->cmd_queue) ? |
| 891 | TFD_CMD_SLOTS : TFD_TX_CMD_SLOTS; |
| 892 | ret = iwl_pcie_txq_init(trans, &trans_pcie->txq[txq_id], |
| 893 | slots_num, txq_id); |
| 894 | if (ret) { |
| 895 | IWL_ERR(trans, "Tx %d queue init failed\n", txq_id); |
| 896 | goto error; |
| 897 | } |
| 898 | } |
| 899 | |
| 900 | return 0; |
| 901 | error: |
| 902 | /*Upon error, free only if we allocated something */ |
| 903 | if (alloc) |
| 904 | iwl_pcie_tx_free(trans); |
| 905 | return ret; |
| 906 | } |
| 907 | |
| 908 | static inline void iwl_pcie_txq_progress(struct iwl_trans_pcie *trans_pcie, |
| 909 | struct iwl_txq *txq) |
| 910 | { |
| 911 | if (!trans_pcie->wd_timeout) |
| 912 | return; |
| 913 | |
| 914 | /* |
| 915 | * if empty delete timer, otherwise move timer forward |
| 916 | * since we're making progress on this queue |
| 917 | */ |
| 918 | if (txq->q.read_ptr == txq->q.write_ptr) |
| 919 | del_timer(&txq->stuck_timer); |
| 920 | else |
| 921 | mod_timer(&txq->stuck_timer, jiffies + trans_pcie->wd_timeout); |
| 922 | } |
| 923 | |
| 924 | /* Frees buffers until index _not_ inclusive */ |
Emmanuel Grumbach | f6d497c | 2012-11-14 23:32:57 +0200 | [diff] [blame] | 925 | void iwl_trans_pcie_reclaim(struct iwl_trans *trans, int txq_id, int ssn, |
| 926 | struct sk_buff_head *skbs) |
Emmanuel Grumbach | f02831b | 2012-11-14 14:44:18 +0200 | [diff] [blame] | 927 | { |
| 928 | struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans); |
| 929 | struct iwl_txq *txq = &trans_pcie->txq[txq_id]; |
Emmanuel Grumbach | f6d497c | 2012-11-14 23:32:57 +0200 | [diff] [blame] | 930 | /* n_bd is usually 256 => n_bd - 1 = 0xff */ |
| 931 | int tfd_num = ssn & (txq->q.n_bd - 1); |
Emmanuel Grumbach | f02831b | 2012-11-14 14:44:18 +0200 | [diff] [blame] | 932 | struct iwl_queue *q = &txq->q; |
| 933 | int last_to_free; |
Emmanuel Grumbach | f02831b | 2012-11-14 14:44:18 +0200 | [diff] [blame] | 934 | |
| 935 | /* This function is not meant to release cmd queue*/ |
| 936 | if (WARN_ON(txq_id == trans_pcie->cmd_queue)) |
Emmanuel Grumbach | f6d497c | 2012-11-14 23:32:57 +0200 | [diff] [blame] | 937 | return; |
Emmanuel Grumbach | f02831b | 2012-11-14 14:44:18 +0200 | [diff] [blame] | 938 | |
Johannes Berg | 2bfb509 | 2012-12-27 21:43:48 +0100 | [diff] [blame] | 939 | spin_lock_bh(&txq->lock); |
Emmanuel Grumbach | f6d497c | 2012-11-14 23:32:57 +0200 | [diff] [blame] | 940 | |
Emmanuel Grumbach | b967613 | 2013-06-13 11:45:59 +0300 | [diff] [blame] | 941 | if (!txq->active) { |
| 942 | IWL_DEBUG_TX_QUEUES(trans, "Q %d inactive - ignoring idx %d\n", |
| 943 | txq_id, ssn); |
| 944 | goto out; |
| 945 | } |
| 946 | |
Emmanuel Grumbach | f6d497c | 2012-11-14 23:32:57 +0200 | [diff] [blame] | 947 | if (txq->q.read_ptr == tfd_num) |
| 948 | goto out; |
| 949 | |
| 950 | IWL_DEBUG_TX_REPLY(trans, "[Q %d] %d -> %d (%d)\n", |
| 951 | txq_id, txq->q.read_ptr, tfd_num, ssn); |
Emmanuel Grumbach | f02831b | 2012-11-14 14:44:18 +0200 | [diff] [blame] | 952 | |
| 953 | /*Since we free until index _not_ inclusive, the one before index is |
| 954 | * the last we will free. This one must be used */ |
Emmanuel Grumbach | f6d497c | 2012-11-14 23:32:57 +0200 | [diff] [blame] | 955 | last_to_free = iwl_queue_dec_wrap(tfd_num, q->n_bd); |
Emmanuel Grumbach | f02831b | 2012-11-14 14:44:18 +0200 | [diff] [blame] | 956 | |
Emmanuel Grumbach | 6ca6ebc | 2012-11-14 23:38:08 +0200 | [diff] [blame] | 957 | if (!iwl_queue_used(q, last_to_free)) { |
Emmanuel Grumbach | f02831b | 2012-11-14 14:44:18 +0200 | [diff] [blame] | 958 | IWL_ERR(trans, |
| 959 | "%s: Read index for DMA queue txq id (%d), last_to_free %d is out of range [0-%d] %d %d.\n", |
| 960 | __func__, txq_id, last_to_free, q->n_bd, |
| 961 | q->write_ptr, q->read_ptr); |
Emmanuel Grumbach | f6d497c | 2012-11-14 23:32:57 +0200 | [diff] [blame] | 962 | goto out; |
Emmanuel Grumbach | f02831b | 2012-11-14 14:44:18 +0200 | [diff] [blame] | 963 | } |
| 964 | |
| 965 | if (WARN_ON(!skb_queue_empty(skbs))) |
Emmanuel Grumbach | f6d497c | 2012-11-14 23:32:57 +0200 | [diff] [blame] | 966 | goto out; |
Emmanuel Grumbach | f02831b | 2012-11-14 14:44:18 +0200 | [diff] [blame] | 967 | |
| 968 | for (; |
Emmanuel Grumbach | f6d497c | 2012-11-14 23:32:57 +0200 | [diff] [blame] | 969 | q->read_ptr != tfd_num; |
Emmanuel Grumbach | f02831b | 2012-11-14 14:44:18 +0200 | [diff] [blame] | 970 | q->read_ptr = iwl_queue_inc_wrap(q->read_ptr, q->n_bd)) { |
| 971 | |
| 972 | if (WARN_ON_ONCE(txq->entries[txq->q.read_ptr].skb == NULL)) |
| 973 | continue; |
| 974 | |
| 975 | __skb_queue_tail(skbs, txq->entries[txq->q.read_ptr].skb); |
| 976 | |
| 977 | txq->entries[txq->q.read_ptr].skb = NULL; |
| 978 | |
| 979 | iwl_pcie_txq_inval_byte_cnt_tbl(trans, txq); |
| 980 | |
Johannes Berg | 9889175 | 2013-02-26 11:28:19 +0100 | [diff] [blame] | 981 | iwl_pcie_txq_free_tfd(trans, txq); |
Emmanuel Grumbach | f02831b | 2012-11-14 14:44:18 +0200 | [diff] [blame] | 982 | } |
| 983 | |
| 984 | iwl_pcie_txq_progress(trans_pcie, txq); |
| 985 | |
Emmanuel Grumbach | f6d497c | 2012-11-14 23:32:57 +0200 | [diff] [blame] | 986 | if (iwl_queue_space(&txq->q) > txq->q.low_mark) |
| 987 | iwl_wake_queue(trans, txq); |
| 988 | out: |
Johannes Berg | 2bfb509 | 2012-12-27 21:43:48 +0100 | [diff] [blame] | 989 | spin_unlock_bh(&txq->lock); |
Emmanuel Grumbach | f02831b | 2012-11-14 14:44:18 +0200 | [diff] [blame] | 990 | } |
| 991 | |
| 992 | /* |
| 993 | * iwl_pcie_cmdq_reclaim - Reclaim TX command queue entries already Tx'd |
| 994 | * |
| 995 | * When FW advances 'R' index, all entries between old and new 'R' index |
| 996 | * need to be reclaimed. As result, some free space forms. If there is |
| 997 | * enough free space (> low mark), wake the stack that feeds us. |
| 998 | */ |
| 999 | static void iwl_pcie_cmdq_reclaim(struct iwl_trans *trans, int txq_id, int idx) |
| 1000 | { |
| 1001 | struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans); |
| 1002 | struct iwl_txq *txq = &trans_pcie->txq[txq_id]; |
| 1003 | struct iwl_queue *q = &txq->q; |
| 1004 | int nfreed = 0; |
| 1005 | |
| 1006 | lockdep_assert_held(&txq->lock); |
| 1007 | |
Emmanuel Grumbach | 6ca6ebc | 2012-11-14 23:38:08 +0200 | [diff] [blame] | 1008 | if ((idx >= q->n_bd) || (!iwl_queue_used(q, idx))) { |
Emmanuel Grumbach | f02831b | 2012-11-14 14:44:18 +0200 | [diff] [blame] | 1009 | IWL_ERR(trans, |
| 1010 | "%s: Read index for DMA queue txq id (%d), index %d is out of range [0-%d] %d %d.\n", |
| 1011 | __func__, txq_id, idx, q->n_bd, |
| 1012 | q->write_ptr, q->read_ptr); |
| 1013 | return; |
| 1014 | } |
| 1015 | |
| 1016 | for (idx = iwl_queue_inc_wrap(idx, q->n_bd); q->read_ptr != idx; |
| 1017 | q->read_ptr = iwl_queue_inc_wrap(q->read_ptr, q->n_bd)) { |
| 1018 | |
| 1019 | if (nfreed++ > 0) { |
| 1020 | IWL_ERR(trans, "HCMD skipped: index (%d) %d %d\n", |
| 1021 | idx, q->write_ptr, q->read_ptr); |
Arik Nemtsov | 2a988e9 | 2013-12-01 13:50:40 +0200 | [diff] [blame] | 1022 | iwl_trans_fw_error(trans); |
Emmanuel Grumbach | f02831b | 2012-11-14 14:44:18 +0200 | [diff] [blame] | 1023 | } |
| 1024 | } |
| 1025 | |
| 1026 | iwl_pcie_txq_progress(trans_pcie, txq); |
| 1027 | } |
| 1028 | |
| 1029 | static int iwl_pcie_txq_set_ratid_map(struct iwl_trans *trans, u16 ra_tid, |
Emmanuel Grumbach | 1ce8658 | 2012-06-04 16:48:17 +0300 | [diff] [blame] | 1030 | u16 txq_id) |
Emmanuel Grumbach | 48d42c4 | 2011-07-10 10:47:01 +0300 | [diff] [blame] | 1031 | { |
Johannes Berg | 20d3b64 | 2012-05-16 22:54:29 +0200 | [diff] [blame] | 1032 | struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans); |
Emmanuel Grumbach | 48d42c4 | 2011-07-10 10:47:01 +0300 | [diff] [blame] | 1033 | u32 tbl_dw_addr; |
| 1034 | u32 tbl_dw; |
| 1035 | u16 scd_q2ratid; |
| 1036 | |
| 1037 | scd_q2ratid = ra_tid & SCD_QUEUE_RA_TID_MAP_RATID_MSK; |
| 1038 | |
Emmanuel Grumbach | 105183b | 2011-08-25 23:11:02 -0700 | [diff] [blame] | 1039 | tbl_dw_addr = trans_pcie->scd_base_addr + |
Emmanuel Grumbach | 48d42c4 | 2011-07-10 10:47:01 +0300 | [diff] [blame] | 1040 | SCD_TRANS_TBL_OFFSET_QUEUE(txq_id); |
| 1041 | |
Emmanuel Grumbach | 4fd442d | 2012-12-24 14:27:11 +0200 | [diff] [blame] | 1042 | tbl_dw = iwl_trans_read_mem32(trans, tbl_dw_addr); |
Emmanuel Grumbach | 48d42c4 | 2011-07-10 10:47:01 +0300 | [diff] [blame] | 1043 | |
| 1044 | if (txq_id & 0x1) |
| 1045 | tbl_dw = (scd_q2ratid << 16) | (tbl_dw & 0x0000FFFF); |
| 1046 | else |
| 1047 | tbl_dw = scd_q2ratid | (tbl_dw & 0xFFFF0000); |
| 1048 | |
Emmanuel Grumbach | 4fd442d | 2012-12-24 14:27:11 +0200 | [diff] [blame] | 1049 | iwl_trans_write_mem32(trans, tbl_dw_addr, tbl_dw); |
Emmanuel Grumbach | 48d42c4 | 2011-07-10 10:47:01 +0300 | [diff] [blame] | 1050 | |
| 1051 | return 0; |
| 1052 | } |
| 1053 | |
Emmanuel Grumbach | f02831b | 2012-11-14 14:44:18 +0200 | [diff] [blame] | 1054 | static inline void iwl_pcie_txq_set_inactive(struct iwl_trans *trans, |
| 1055 | u16 txq_id) |
Emmanuel Grumbach | 48d42c4 | 2011-07-10 10:47:01 +0300 | [diff] [blame] | 1056 | { |
| 1057 | /* Simply stop the queue, but don't change any configuration; |
| 1058 | * the SCD_ACT_EN bit is the write-enable mask for the ACTIVE bit. */ |
Emmanuel Grumbach | 1042db2 | 2012-01-03 16:56:15 +0200 | [diff] [blame] | 1059 | iwl_write_prph(trans, |
Emmanuel Grumbach | 48d42c4 | 2011-07-10 10:47:01 +0300 | [diff] [blame] | 1060 | SCD_QUEUE_STATUS_BITS(txq_id), |
| 1061 | (0 << SCD_QUEUE_STTS_REG_POS_ACTIVE)| |
| 1062 | (1 << SCD_QUEUE_STTS_REG_POS_SCD_ACT_EN)); |
| 1063 | } |
| 1064 | |
Emmanuel Grumbach | bd5f6a3 | 2013-04-28 14:05:22 +0300 | [diff] [blame] | 1065 | /* Receiver address (actually, Rx station's index into station table), |
| 1066 | * combined with Traffic ID (QOS priority), in format used by Tx Scheduler */ |
| 1067 | #define BUILD_RAxTID(sta_id, tid) (((sta_id) << 4) + (tid)) |
| 1068 | |
Emmanuel Grumbach | f02831b | 2012-11-14 14:44:18 +0200 | [diff] [blame] | 1069 | void iwl_trans_pcie_txq_enable(struct iwl_trans *trans, int txq_id, int fifo, |
| 1070 | int sta_id, int tid, int frame_limit, u16 ssn) |
Johannes Berg | 70a18c5 | 2012-03-05 11:24:44 -0800 | [diff] [blame] | 1071 | { |
Johannes Berg | 9eae88f | 2012-03-15 13:26:52 -0700 | [diff] [blame] | 1072 | struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans); |
Emmanuel Grumbach | 4beaf6c | 2012-05-29 11:29:10 +0300 | [diff] [blame] | 1073 | |
Johannes Berg | 9eae88f | 2012-03-15 13:26:52 -0700 | [diff] [blame] | 1074 | if (test_and_set_bit(txq_id, trans_pcie->queue_used)) |
| 1075 | WARN_ONCE(1, "queue %d already used - expect issues", txq_id); |
Emmanuel Grumbach | 48d42c4 | 2011-07-10 10:47:01 +0300 | [diff] [blame] | 1076 | |
Emmanuel Grumbach | 48d42c4 | 2011-07-10 10:47:01 +0300 | [diff] [blame] | 1077 | /* Stop this Tx queue before configuring it */ |
Emmanuel Grumbach | f02831b | 2012-11-14 14:44:18 +0200 | [diff] [blame] | 1078 | iwl_pcie_txq_set_inactive(trans, txq_id); |
Emmanuel Grumbach | 48d42c4 | 2011-07-10 10:47:01 +0300 | [diff] [blame] | 1079 | |
Emmanuel Grumbach | 4beaf6c | 2012-05-29 11:29:10 +0300 | [diff] [blame] | 1080 | /* Set this queue as a chain-building queue unless it is CMD queue */ |
| 1081 | if (txq_id != trans_pcie->cmd_queue) |
| 1082 | iwl_set_bits_prph(trans, SCD_QUEUECHAIN_SEL, BIT(txq_id)); |
Emmanuel Grumbach | 48d42c4 | 2011-07-10 10:47:01 +0300 | [diff] [blame] | 1083 | |
Emmanuel Grumbach | 4beaf6c | 2012-05-29 11:29:10 +0300 | [diff] [blame] | 1084 | /* If this queue is mapped to a certain station: it is an AGG queue */ |
Emmanuel Grumbach | 881acd8 | 2013-03-19 16:16:00 +0200 | [diff] [blame] | 1085 | if (sta_id >= 0) { |
Emmanuel Grumbach | 4beaf6c | 2012-05-29 11:29:10 +0300 | [diff] [blame] | 1086 | u16 ra_tid = BUILD_RAxTID(sta_id, tid); |
Emmanuel Grumbach | 48d42c4 | 2011-07-10 10:47:01 +0300 | [diff] [blame] | 1087 | |
Emmanuel Grumbach | 4beaf6c | 2012-05-29 11:29:10 +0300 | [diff] [blame] | 1088 | /* Map receiver-address / traffic-ID to this queue */ |
Emmanuel Grumbach | f02831b | 2012-11-14 14:44:18 +0200 | [diff] [blame] | 1089 | iwl_pcie_txq_set_ratid_map(trans, ra_tid, txq_id); |
Emmanuel Grumbach | 4beaf6c | 2012-05-29 11:29:10 +0300 | [diff] [blame] | 1090 | |
| 1091 | /* enable aggregations for the queue */ |
| 1092 | iwl_set_bits_prph(trans, SCD_AGGR_SEL, BIT(txq_id)); |
Johannes Berg | 68972c4 | 2013-06-11 19:05:27 +0200 | [diff] [blame] | 1093 | trans_pcie->txq[txq_id].ampdu = true; |
Emmanuel Grumbach | 1ce8658 | 2012-06-04 16:48:17 +0300 | [diff] [blame] | 1094 | } else { |
| 1095 | /* |
| 1096 | * disable aggregations for the queue, this will also make the |
| 1097 | * ra_tid mapping configuration irrelevant since it is now a |
| 1098 | * non-AGG queue. |
| 1099 | */ |
| 1100 | iwl_clear_bits_prph(trans, SCD_AGGR_SEL, BIT(txq_id)); |
Emmanuel Grumbach | f477252 | 2013-07-24 14:15:21 +0300 | [diff] [blame] | 1101 | |
| 1102 | ssn = trans_pcie->txq[txq_id].q.read_ptr; |
Emmanuel Grumbach | 4beaf6c | 2012-05-29 11:29:10 +0300 | [diff] [blame] | 1103 | } |
Emmanuel Grumbach | 48d42c4 | 2011-07-10 10:47:01 +0300 | [diff] [blame] | 1104 | |
| 1105 | /* Place first TFD at index corresponding to start sequence number. |
| 1106 | * Assumes that ssn_idx is valid (!= 0xFFF) */ |
Emmanuel Grumbach | 822e8b2 | 2011-11-21 13:25:31 +0200 | [diff] [blame] | 1107 | trans_pcie->txq[txq_id].q.read_ptr = (ssn & 0xff); |
| 1108 | trans_pcie->txq[txq_id].q.write_ptr = (ssn & 0xff); |
Emmanuel Grumbach | 1ce8658 | 2012-06-04 16:48:17 +0300 | [diff] [blame] | 1109 | |
| 1110 | iwl_write_direct32(trans, HBUS_TARG_WRPTR, |
| 1111 | (ssn & 0xff) | (txq_id << 8)); |
| 1112 | iwl_write_prph(trans, SCD_QUEUE_RDPTR(txq_id), ssn); |
Emmanuel Grumbach | 48d42c4 | 2011-07-10 10:47:01 +0300 | [diff] [blame] | 1113 | |
| 1114 | /* Set up Tx window size and frame limit for this queue */ |
Emmanuel Grumbach | 4fd442d | 2012-12-24 14:27:11 +0200 | [diff] [blame] | 1115 | iwl_trans_write_mem32(trans, trans_pcie->scd_base_addr + |
Emmanuel Grumbach | 4beaf6c | 2012-05-29 11:29:10 +0300 | [diff] [blame] | 1116 | SCD_CONTEXT_QUEUE_OFFSET(txq_id), 0); |
Emmanuel Grumbach | 4fd442d | 2012-12-24 14:27:11 +0200 | [diff] [blame] | 1117 | iwl_trans_write_mem32(trans, trans_pcie->scd_base_addr + |
Johannes Berg | 9eae88f | 2012-03-15 13:26:52 -0700 | [diff] [blame] | 1118 | SCD_CONTEXT_QUEUE_OFFSET(txq_id) + sizeof(u32), |
| 1119 | ((frame_limit << SCD_QUEUE_CTX_REG2_WIN_SIZE_POS) & |
| 1120 | SCD_QUEUE_CTX_REG2_WIN_SIZE_MSK) | |
| 1121 | ((frame_limit << SCD_QUEUE_CTX_REG2_FRAME_LIMIT_POS) & |
| 1122 | SCD_QUEUE_CTX_REG2_FRAME_LIMIT_MSK)); |
Emmanuel Grumbach | 48d42c4 | 2011-07-10 10:47:01 +0300 | [diff] [blame] | 1123 | |
Emmanuel Grumbach | 48d42c4 | 2011-07-10 10:47:01 +0300 | [diff] [blame] | 1124 | /* Set up Status area in SRAM, map to Tx DMA/FIFO, activate the queue */ |
Emmanuel Grumbach | 1ce8658 | 2012-06-04 16:48:17 +0300 | [diff] [blame] | 1125 | iwl_write_prph(trans, SCD_QUEUE_STATUS_BITS(txq_id), |
| 1126 | (1 << SCD_QUEUE_STTS_REG_POS_ACTIVE) | |
| 1127 | (fifo << SCD_QUEUE_STTS_REG_POS_TXF) | |
| 1128 | (1 << SCD_QUEUE_STTS_REG_POS_WSL) | |
| 1129 | SCD_QUEUE_STTS_REG_MSK); |
Emmanuel Grumbach | b967613 | 2013-06-13 11:45:59 +0300 | [diff] [blame] | 1130 | trans_pcie->txq[txq_id].active = true; |
Emmanuel Grumbach | 1ce8658 | 2012-06-04 16:48:17 +0300 | [diff] [blame] | 1131 | IWL_DEBUG_TX_QUEUES(trans, "Activate queue %d on FIFO %d WrPtr: %d\n", |
| 1132 | txq_id, fifo, ssn & 0xff); |
Emmanuel Grumbach | 4beaf6c | 2012-05-29 11:29:10 +0300 | [diff] [blame] | 1133 | } |
| 1134 | |
Emmanuel Grumbach | f02831b | 2012-11-14 14:44:18 +0200 | [diff] [blame] | 1135 | void iwl_trans_pcie_txq_disable(struct iwl_trans *trans, int txq_id) |
Emmanuel Grumbach | 288712a | 2011-08-25 23:11:25 -0700 | [diff] [blame] | 1136 | { |
Emmanuel Grumbach | 8ad71be | 2011-08-25 23:11:32 -0700 | [diff] [blame] | 1137 | struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans); |
Emmanuel Grumbach | 986ea6c | 2012-09-30 16:25:43 +0200 | [diff] [blame] | 1138 | u32 stts_addr = trans_pcie->scd_base_addr + |
| 1139 | SCD_TX_STTS_QUEUE_OFFSET(txq_id); |
| 1140 | static const u32 zero_val[4] = {}; |
Emmanuel Grumbach | 288712a | 2011-08-25 23:11:25 -0700 | [diff] [blame] | 1141 | |
Johannes Berg | 9eae88f | 2012-03-15 13:26:52 -0700 | [diff] [blame] | 1142 | if (!test_and_clear_bit(txq_id, trans_pcie->queue_used)) { |
| 1143 | WARN_ONCE(1, "queue %d not used", txq_id); |
| 1144 | return; |
Emmanuel Grumbach | bc23773 | 2011-11-21 13:25:31 +0200 | [diff] [blame] | 1145 | } |
| 1146 | |
Emmanuel Grumbach | f02831b | 2012-11-14 14:44:18 +0200 | [diff] [blame] | 1147 | iwl_pcie_txq_set_inactive(trans, txq_id); |
Emmanuel Grumbach | ac928f8 | 2012-10-14 16:36:36 +0200 | [diff] [blame] | 1148 | |
Emmanuel Grumbach | 4fd442d | 2012-12-24 14:27:11 +0200 | [diff] [blame] | 1149 | iwl_trans_write_mem(trans, stts_addr, (void *)zero_val, |
| 1150 | ARRAY_SIZE(zero_val)); |
Emmanuel Grumbach | 986ea6c | 2012-09-30 16:25:43 +0200 | [diff] [blame] | 1151 | |
Emmanuel Grumbach | 990aa6d | 2012-11-14 12:39:52 +0200 | [diff] [blame] | 1152 | iwl_pcie_txq_unmap(trans, txq_id); |
Johannes Berg | 68972c4 | 2013-06-11 19:05:27 +0200 | [diff] [blame] | 1153 | trans_pcie->txq[txq_id].ampdu = false; |
Emmanuel Grumbach | 6c3fd3f | 2012-10-18 12:38:37 +0200 | [diff] [blame] | 1154 | |
Emmanuel Grumbach | 1ce8658 | 2012-06-04 16:48:17 +0300 | [diff] [blame] | 1155 | IWL_DEBUG_TX_QUEUES(trans, "Deactivate queue %d\n", txq_id); |
Emmanuel Grumbach | 48d42c4 | 2011-07-10 10:47:01 +0300 | [diff] [blame] | 1156 | } |
| 1157 | |
Tomas Winkler | fd4abac | 2008-05-15 13:54:07 +0800 | [diff] [blame] | 1158 | /*************** HOST COMMAND QUEUE FUNCTIONS *****/ |
| 1159 | |
Emmanuel Grumbach | 990aa6d | 2012-11-14 12:39:52 +0200 | [diff] [blame] | 1160 | /* |
Emmanuel Grumbach | f02831b | 2012-11-14 14:44:18 +0200 | [diff] [blame] | 1161 | * iwl_pcie_enqueue_hcmd - enqueue a uCode command |
Tomas Winkler | fd4abac | 2008-05-15 13:54:07 +0800 | [diff] [blame] | 1162 | * @priv: device private data point |
Eliad Peller | e89044d | 2013-07-16 17:33:26 +0300 | [diff] [blame] | 1163 | * @cmd: a pointer to the ucode command structure |
Tomas Winkler | fd4abac | 2008-05-15 13:54:07 +0800 | [diff] [blame] | 1164 | * |
Eliad Peller | e89044d | 2013-07-16 17:33:26 +0300 | [diff] [blame] | 1165 | * The function returns < 0 values to indicate the operation |
| 1166 | * failed. On success, it returns the index (>= 0) of command in the |
Tomas Winkler | fd4abac | 2008-05-15 13:54:07 +0800 | [diff] [blame] | 1167 | * command queue. |
| 1168 | */ |
Emmanuel Grumbach | f02831b | 2012-11-14 14:44:18 +0200 | [diff] [blame] | 1169 | static int iwl_pcie_enqueue_hcmd(struct iwl_trans *trans, |
| 1170 | struct iwl_host_cmd *cmd) |
Tomas Winkler | fd4abac | 2008-05-15 13:54:07 +0800 | [diff] [blame] | 1171 | { |
Emmanuel Grumbach | 8ad71be | 2011-08-25 23:11:32 -0700 | [diff] [blame] | 1172 | struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans); |
Emmanuel Grumbach | 990aa6d | 2012-11-14 12:39:52 +0200 | [diff] [blame] | 1173 | struct iwl_txq *txq = &trans_pcie->txq[trans_pcie->cmd_queue]; |
Tomas Winkler | fd4abac | 2008-05-15 13:54:07 +0800 | [diff] [blame] | 1174 | struct iwl_queue *q = &txq->q; |
Johannes Berg | c2acea8 | 2009-07-24 11:13:05 -0700 | [diff] [blame] | 1175 | struct iwl_device_cmd *out_cmd; |
| 1176 | struct iwl_cmd_meta *out_meta; |
Johannes Berg | f4feb8a | 2012-10-19 14:24:43 +0200 | [diff] [blame] | 1177 | void *dup_buf = NULL; |
Tomas Winkler | f367422 | 2008-08-04 16:00:44 +0800 | [diff] [blame] | 1178 | dma_addr_t phys_addr; |
Johannes Berg | f4feb8a | 2012-10-19 14:24:43 +0200 | [diff] [blame] | 1179 | int idx; |
Johannes Berg | 38c0f334 | 2013-02-27 13:18:50 +0100 | [diff] [blame] | 1180 | u16 copy_size, cmd_size, scratch_size; |
Johannes Berg | 4ce7cc2 | 2011-05-13 11:57:40 -0700 | [diff] [blame] | 1181 | bool had_nocopy = false; |
| 1182 | int i; |
Emmanuel Grumbach | 9679142 | 2012-07-24 01:58:32 +0300 | [diff] [blame] | 1183 | u32 cmd_pos; |
Johannes Berg | 1afbfb6 | 2013-02-26 11:32:26 +0100 | [diff] [blame] | 1184 | const u8 *cmddata[IWL_MAX_CMD_TBS_PER_TFD]; |
| 1185 | u16 cmdlen[IWL_MAX_CMD_TBS_PER_TFD]; |
Tomas Winkler | fd4abac | 2008-05-15 13:54:07 +0800 | [diff] [blame] | 1186 | |
Johannes Berg | 4ce7cc2 | 2011-05-13 11:57:40 -0700 | [diff] [blame] | 1187 | copy_size = sizeof(out_cmd->hdr); |
| 1188 | cmd_size = sizeof(out_cmd->hdr); |
| 1189 | |
| 1190 | /* need one for the header if the first is NOCOPY */ |
Johannes Berg | 1afbfb6 | 2013-02-26 11:32:26 +0100 | [diff] [blame] | 1191 | BUILD_BUG_ON(IWL_MAX_CMD_TBS_PER_TFD > IWL_NUM_OF_TBS - 1); |
Johannes Berg | 4ce7cc2 | 2011-05-13 11:57:40 -0700 | [diff] [blame] | 1192 | |
Johannes Berg | 1afbfb6 | 2013-02-26 11:32:26 +0100 | [diff] [blame] | 1193 | for (i = 0; i < IWL_MAX_CMD_TBS_PER_TFD; i++) { |
Johannes Berg | 8a964f4 | 2013-02-25 16:01:34 +0100 | [diff] [blame] | 1194 | cmddata[i] = cmd->data[i]; |
| 1195 | cmdlen[i] = cmd->len[i]; |
| 1196 | |
Johannes Berg | 4ce7cc2 | 2011-05-13 11:57:40 -0700 | [diff] [blame] | 1197 | if (!cmd->len[i]) |
| 1198 | continue; |
Johannes Berg | 8a964f4 | 2013-02-25 16:01:34 +0100 | [diff] [blame] | 1199 | |
Johannes Berg | 38c0f334 | 2013-02-27 13:18:50 +0100 | [diff] [blame] | 1200 | /* need at least IWL_HCMD_SCRATCHBUF_SIZE copied */ |
| 1201 | if (copy_size < IWL_HCMD_SCRATCHBUF_SIZE) { |
| 1202 | int copy = IWL_HCMD_SCRATCHBUF_SIZE - copy_size; |
Johannes Berg | 8a964f4 | 2013-02-25 16:01:34 +0100 | [diff] [blame] | 1203 | |
| 1204 | if (copy > cmdlen[i]) |
| 1205 | copy = cmdlen[i]; |
| 1206 | cmdlen[i] -= copy; |
| 1207 | cmddata[i] += copy; |
| 1208 | copy_size += copy; |
| 1209 | } |
| 1210 | |
Johannes Berg | 4ce7cc2 | 2011-05-13 11:57:40 -0700 | [diff] [blame] | 1211 | if (cmd->dataflags[i] & IWL_HCMD_DFL_NOCOPY) { |
| 1212 | had_nocopy = true; |
Johannes Berg | f4feb8a | 2012-10-19 14:24:43 +0200 | [diff] [blame] | 1213 | if (WARN_ON(cmd->dataflags[i] & IWL_HCMD_DFL_DUP)) { |
| 1214 | idx = -EINVAL; |
| 1215 | goto free_dup_buf; |
| 1216 | } |
| 1217 | } else if (cmd->dataflags[i] & IWL_HCMD_DFL_DUP) { |
| 1218 | /* |
| 1219 | * This is also a chunk that isn't copied |
| 1220 | * to the static buffer so set had_nocopy. |
| 1221 | */ |
| 1222 | had_nocopy = true; |
| 1223 | |
| 1224 | /* only allowed once */ |
| 1225 | if (WARN_ON(dup_buf)) { |
| 1226 | idx = -EINVAL; |
| 1227 | goto free_dup_buf; |
| 1228 | } |
| 1229 | |
Johannes Berg | 8a964f4 | 2013-02-25 16:01:34 +0100 | [diff] [blame] | 1230 | dup_buf = kmemdup(cmddata[i], cmdlen[i], |
Johannes Berg | f4feb8a | 2012-10-19 14:24:43 +0200 | [diff] [blame] | 1231 | GFP_ATOMIC); |
| 1232 | if (!dup_buf) |
| 1233 | return -ENOMEM; |
Johannes Berg | 4ce7cc2 | 2011-05-13 11:57:40 -0700 | [diff] [blame] | 1234 | } else { |
| 1235 | /* NOCOPY must not be followed by normal! */ |
Johannes Berg | f4feb8a | 2012-10-19 14:24:43 +0200 | [diff] [blame] | 1236 | if (WARN_ON(had_nocopy)) { |
| 1237 | idx = -EINVAL; |
| 1238 | goto free_dup_buf; |
| 1239 | } |
Johannes Berg | 8a964f4 | 2013-02-25 16:01:34 +0100 | [diff] [blame] | 1240 | copy_size += cmdlen[i]; |
Johannes Berg | 4ce7cc2 | 2011-05-13 11:57:40 -0700 | [diff] [blame] | 1241 | } |
| 1242 | cmd_size += cmd->len[i]; |
| 1243 | } |
Tomas Winkler | fd4abac | 2008-05-15 13:54:07 +0800 | [diff] [blame] | 1244 | |
Johannes Berg | 3e41ace | 2011-04-18 09:12:37 -0700 | [diff] [blame] | 1245 | /* |
| 1246 | * If any of the command structures end up being larger than |
Johannes Berg | 4ce7cc2 | 2011-05-13 11:57:40 -0700 | [diff] [blame] | 1247 | * the TFD_MAX_PAYLOAD_SIZE and they aren't dynamically |
| 1248 | * allocated into separate TFDs, then we will need to |
| 1249 | * increase the size of the buffers. |
Johannes Berg | 3e41ace | 2011-04-18 09:12:37 -0700 | [diff] [blame] | 1250 | */ |
Johannes Berg | 2a79e45 | 2012-09-26 13:32:13 +0200 | [diff] [blame] | 1251 | if (WARN(copy_size > TFD_MAX_PAYLOAD_SIZE, |
| 1252 | "Command %s (%#x) is too large (%d bytes)\n", |
Emmanuel Grumbach | 990aa6d | 2012-11-14 12:39:52 +0200 | [diff] [blame] | 1253 | get_cmd_string(trans_pcie, cmd->id), cmd->id, copy_size)) { |
Johannes Berg | f4feb8a | 2012-10-19 14:24:43 +0200 | [diff] [blame] | 1254 | idx = -EINVAL; |
| 1255 | goto free_dup_buf; |
| 1256 | } |
Tomas Winkler | fd4abac | 2008-05-15 13:54:07 +0800 | [diff] [blame] | 1257 | |
Johannes Berg | 015c15e | 2012-03-05 11:24:24 -0800 | [diff] [blame] | 1258 | spin_lock_bh(&txq->lock); |
Stanislaw Gruszka | 3598e17 | 2011-03-31 17:36:26 +0200 | [diff] [blame] | 1259 | |
Johannes Berg | c2acea8 | 2009-07-24 11:13:05 -0700 | [diff] [blame] | 1260 | if (iwl_queue_space(q) < ((cmd->flags & CMD_ASYNC) ? 2 : 1)) { |
Johannes Berg | 015c15e | 2012-03-05 11:24:24 -0800 | [diff] [blame] | 1261 | spin_unlock_bh(&txq->lock); |
Stanislaw Gruszka | 3598e17 | 2011-03-31 17:36:26 +0200 | [diff] [blame] | 1262 | |
Emmanuel Grumbach | 6d8f6ee | 2011-08-25 23:11:06 -0700 | [diff] [blame] | 1263 | IWL_ERR(trans, "No space in command queue\n"); |
Johannes Berg | 0e78184 | 2012-03-06 13:30:49 -0800 | [diff] [blame] | 1264 | iwl_op_mode_cmd_queue_full(trans->op_mode); |
Johannes Berg | f4feb8a | 2012-10-19 14:24:43 +0200 | [diff] [blame] | 1265 | idx = -ENOSPC; |
| 1266 | goto free_dup_buf; |
Tomas Winkler | fd4abac | 2008-05-15 13:54:07 +0800 | [diff] [blame] | 1267 | } |
| 1268 | |
Johannes Berg | 4ce7cc2 | 2011-05-13 11:57:40 -0700 | [diff] [blame] | 1269 | idx = get_cmd_index(q, q->write_ptr); |
Johannes Berg | bf8440e | 2012-03-19 17:12:06 +0100 | [diff] [blame] | 1270 | out_cmd = txq->entries[idx].cmd; |
| 1271 | out_meta = &txq->entries[idx].meta; |
Johannes Berg | c2acea8 | 2009-07-24 11:13:05 -0700 | [diff] [blame] | 1272 | |
Daniel C Halperin | 8ce73f3 | 2009-07-31 14:28:06 -0700 | [diff] [blame] | 1273 | memset(out_meta, 0, sizeof(*out_meta)); /* re-initialize to NULL */ |
Johannes Berg | c2acea8 | 2009-07-24 11:13:05 -0700 | [diff] [blame] | 1274 | if (cmd->flags & CMD_WANT_SKB) |
| 1275 | out_meta->source = cmd; |
Tomas Winkler | fd4abac | 2008-05-15 13:54:07 +0800 | [diff] [blame] | 1276 | |
Johannes Berg | 4ce7cc2 | 2011-05-13 11:57:40 -0700 | [diff] [blame] | 1277 | /* set up the header */ |
| 1278 | |
Tomas Winkler | fd4abac | 2008-05-15 13:54:07 +0800 | [diff] [blame] | 1279 | out_cmd->hdr.cmd = cmd->id; |
Tomas Winkler | fd4abac | 2008-05-15 13:54:07 +0800 | [diff] [blame] | 1280 | out_cmd->hdr.flags = 0; |
Emmanuel Grumbach | cefeaa5 | 2011-08-25 23:10:40 -0700 | [diff] [blame] | 1281 | out_cmd->hdr.sequence = |
Meenakshi Venkataraman | c6f600f | 2012-03-08 11:29:12 -0800 | [diff] [blame] | 1282 | cpu_to_le16(QUEUE_TO_SEQ(trans_pcie->cmd_queue) | |
Emmanuel Grumbach | cefeaa5 | 2011-08-25 23:10:40 -0700 | [diff] [blame] | 1283 | INDEX_TO_SEQ(q->write_ptr)); |
Tomas Winkler | fd4abac | 2008-05-15 13:54:07 +0800 | [diff] [blame] | 1284 | |
Johannes Berg | 4ce7cc2 | 2011-05-13 11:57:40 -0700 | [diff] [blame] | 1285 | /* and copy the data that needs to be copied */ |
Emmanuel Grumbach | 9679142 | 2012-07-24 01:58:32 +0300 | [diff] [blame] | 1286 | cmd_pos = offsetof(struct iwl_device_cmd, payload); |
Johannes Berg | 8a964f4 | 2013-02-25 16:01:34 +0100 | [diff] [blame] | 1287 | copy_size = sizeof(out_cmd->hdr); |
Johannes Berg | 1afbfb6 | 2013-02-26 11:32:26 +0100 | [diff] [blame] | 1288 | for (i = 0; i < IWL_MAX_CMD_TBS_PER_TFD; i++) { |
Johannes Berg | 8a964f4 | 2013-02-25 16:01:34 +0100 | [diff] [blame] | 1289 | int copy = 0; |
| 1290 | |
Emmanuel Grumbach | cc904c7 | 2013-03-14 08:35:06 +0200 | [diff] [blame] | 1291 | if (!cmd->len[i]) |
Johannes Berg | 4ce7cc2 | 2011-05-13 11:57:40 -0700 | [diff] [blame] | 1292 | continue; |
Johannes Berg | 8a964f4 | 2013-02-25 16:01:34 +0100 | [diff] [blame] | 1293 | |
Johannes Berg | 38c0f334 | 2013-02-27 13:18:50 +0100 | [diff] [blame] | 1294 | /* need at least IWL_HCMD_SCRATCHBUF_SIZE copied */ |
| 1295 | if (copy_size < IWL_HCMD_SCRATCHBUF_SIZE) { |
| 1296 | copy = IWL_HCMD_SCRATCHBUF_SIZE - copy_size; |
Johannes Berg | 8a964f4 | 2013-02-25 16:01:34 +0100 | [diff] [blame] | 1297 | |
| 1298 | if (copy > cmd->len[i]) |
| 1299 | copy = cmd->len[i]; |
| 1300 | } |
| 1301 | |
| 1302 | /* copy everything if not nocopy/dup */ |
| 1303 | if (!(cmd->dataflags[i] & (IWL_HCMD_DFL_NOCOPY | |
| 1304 | IWL_HCMD_DFL_DUP))) |
| 1305 | copy = cmd->len[i]; |
| 1306 | |
| 1307 | if (copy) { |
| 1308 | memcpy((u8 *)out_cmd + cmd_pos, cmd->data[i], copy); |
| 1309 | cmd_pos += copy; |
| 1310 | copy_size += copy; |
| 1311 | } |
Emmanuel Grumbach | 9679142 | 2012-07-24 01:58:32 +0300 | [diff] [blame] | 1312 | } |
| 1313 | |
Johannes Berg | d9fb646 | 2012-03-26 08:23:39 -0700 | [diff] [blame] | 1314 | IWL_DEBUG_HC(trans, |
Johannes Berg | 20d3b64 | 2012-05-16 22:54:29 +0200 | [diff] [blame] | 1315 | "Sending command %s (#%x), seq: 0x%04X, %d bytes at %d[%d]:%d\n", |
Emmanuel Grumbach | 990aa6d | 2012-11-14 12:39:52 +0200 | [diff] [blame] | 1316 | get_cmd_string(trans_pcie, out_cmd->hdr.cmd), |
Johannes Berg | 20d3b64 | 2012-05-16 22:54:29 +0200 | [diff] [blame] | 1317 | out_cmd->hdr.cmd, le16_to_cpu(out_cmd->hdr.sequence), |
| 1318 | cmd_size, q->write_ptr, idx, trans_pcie->cmd_queue); |
Johannes Berg | 4ce7cc2 | 2011-05-13 11:57:40 -0700 | [diff] [blame] | 1319 | |
Johannes Berg | 38c0f334 | 2013-02-27 13:18:50 +0100 | [diff] [blame] | 1320 | /* start the TFD with the scratchbuf */ |
| 1321 | scratch_size = min_t(int, copy_size, IWL_HCMD_SCRATCHBUF_SIZE); |
| 1322 | memcpy(&txq->scratchbufs[q->write_ptr], &out_cmd->hdr, scratch_size); |
| 1323 | iwl_pcie_txq_build_tfd(trans, txq, |
| 1324 | iwl_pcie_get_scratchbuf_dma(txq, q->write_ptr), |
| 1325 | scratch_size, 1); |
Johannes Berg | 8a964f4 | 2013-02-25 16:01:34 +0100 | [diff] [blame] | 1326 | |
Johannes Berg | 38c0f334 | 2013-02-27 13:18:50 +0100 | [diff] [blame] | 1327 | /* map first command fragment, if any remains */ |
| 1328 | if (copy_size > scratch_size) { |
| 1329 | phys_addr = dma_map_single(trans->dev, |
| 1330 | ((u8 *)&out_cmd->hdr) + scratch_size, |
| 1331 | copy_size - scratch_size, |
| 1332 | DMA_TO_DEVICE); |
| 1333 | if (dma_mapping_error(trans->dev, phys_addr)) { |
| 1334 | iwl_pcie_tfd_unmap(trans, out_meta, |
| 1335 | &txq->tfds[q->write_ptr]); |
| 1336 | idx = -ENOMEM; |
| 1337 | goto out; |
| 1338 | } |
| 1339 | |
| 1340 | iwl_pcie_txq_build_tfd(trans, txq, phys_addr, |
| 1341 | copy_size - scratch_size, 0); |
Johannes Berg | 2c46f72 | 2011-04-28 07:27:10 -0700 | [diff] [blame] | 1342 | } |
| 1343 | |
Johannes Berg | 8a964f4 | 2013-02-25 16:01:34 +0100 | [diff] [blame] | 1344 | /* map the remaining (adjusted) nocopy/dup fragments */ |
Johannes Berg | 1afbfb6 | 2013-02-26 11:32:26 +0100 | [diff] [blame] | 1345 | for (i = 0; i < IWL_MAX_CMD_TBS_PER_TFD; i++) { |
Johannes Berg | 8a964f4 | 2013-02-25 16:01:34 +0100 | [diff] [blame] | 1346 | const void *data = cmddata[i]; |
Johannes Berg | f4feb8a | 2012-10-19 14:24:43 +0200 | [diff] [blame] | 1347 | |
Johannes Berg | 8a964f4 | 2013-02-25 16:01:34 +0100 | [diff] [blame] | 1348 | if (!cmdlen[i]) |
Johannes Berg | 4ce7cc2 | 2011-05-13 11:57:40 -0700 | [diff] [blame] | 1349 | continue; |
Johannes Berg | f4feb8a | 2012-10-19 14:24:43 +0200 | [diff] [blame] | 1350 | if (!(cmd->dataflags[i] & (IWL_HCMD_DFL_NOCOPY | |
| 1351 | IWL_HCMD_DFL_DUP))) |
Johannes Berg | 4ce7cc2 | 2011-05-13 11:57:40 -0700 | [diff] [blame] | 1352 | continue; |
Johannes Berg | f4feb8a | 2012-10-19 14:24:43 +0200 | [diff] [blame] | 1353 | if (cmd->dataflags[i] & IWL_HCMD_DFL_DUP) |
| 1354 | data = dup_buf; |
| 1355 | phys_addr = dma_map_single(trans->dev, (void *)data, |
Johannes Berg | 9889175 | 2013-02-26 11:28:19 +0100 | [diff] [blame] | 1356 | cmdlen[i], DMA_TO_DEVICE); |
Emmanuel Grumbach | 1042db2 | 2012-01-03 16:56:15 +0200 | [diff] [blame] | 1357 | if (dma_mapping_error(trans->dev, phys_addr)) { |
Emmanuel Grumbach | f02831b | 2012-11-14 14:44:18 +0200 | [diff] [blame] | 1358 | iwl_pcie_tfd_unmap(trans, out_meta, |
Johannes Berg | 9889175 | 2013-02-26 11:28:19 +0100 | [diff] [blame] | 1359 | &txq->tfds[q->write_ptr]); |
Johannes Berg | 4ce7cc2 | 2011-05-13 11:57:40 -0700 | [diff] [blame] | 1360 | idx = -ENOMEM; |
| 1361 | goto out; |
| 1362 | } |
| 1363 | |
Johannes Berg | 8a964f4 | 2013-02-25 16:01:34 +0100 | [diff] [blame] | 1364 | iwl_pcie_txq_build_tfd(trans, txq, phys_addr, cmdlen[i], 0); |
Johannes Berg | 4ce7cc2 | 2011-05-13 11:57:40 -0700 | [diff] [blame] | 1365 | } |
Reinette Chatre | df833b1 | 2009-04-21 10:55:48 -0700 | [diff] [blame] | 1366 | |
Emmanuel Grumbach | afaf6b5 | 2011-07-08 08:46:09 -0700 | [diff] [blame] | 1367 | out_meta->flags = cmd->flags; |
Johannes Berg | f4feb8a | 2012-10-19 14:24:43 +0200 | [diff] [blame] | 1368 | if (WARN_ON_ONCE(txq->entries[idx].free_buf)) |
| 1369 | kfree(txq->entries[idx].free_buf); |
| 1370 | txq->entries[idx].free_buf = dup_buf; |
Johannes Berg | 2c46f72 | 2011-04-28 07:27:10 -0700 | [diff] [blame] | 1371 | |
| 1372 | txq->need_update = 1; |
| 1373 | |
Johannes Berg | 8a964f4 | 2013-02-25 16:01:34 +0100 | [diff] [blame] | 1374 | trace_iwlwifi_dev_hcmd(trans->dev, cmd, cmd_size, &out_cmd->hdr); |
Reinette Chatre | df833b1 | 2009-04-21 10:55:48 -0700 | [diff] [blame] | 1375 | |
Johannes Berg | 7c5ba4a | 2012-04-09 17:46:54 -0700 | [diff] [blame] | 1376 | /* start timer if queue currently empty */ |
| 1377 | if (q->read_ptr == q->write_ptr && trans_pcie->wd_timeout) |
| 1378 | mod_timer(&txq->stuck_timer, jiffies + trans_pcie->wd_timeout); |
| 1379 | |
Tomas Winkler | fd4abac | 2008-05-15 13:54:07 +0800 | [diff] [blame] | 1380 | /* Increment and update queue's write index */ |
| 1381 | q->write_ptr = iwl_queue_inc_wrap(q->write_ptr, q->n_bd); |
Emmanuel Grumbach | 990aa6d | 2012-11-14 12:39:52 +0200 | [diff] [blame] | 1382 | iwl_pcie_txq_inc_wr_ptr(trans, txq); |
Tomas Winkler | fd4abac | 2008-05-15 13:54:07 +0800 | [diff] [blame] | 1383 | |
Johannes Berg | 2c46f72 | 2011-04-28 07:27:10 -0700 | [diff] [blame] | 1384 | out: |
Johannes Berg | 015c15e | 2012-03-05 11:24:24 -0800 | [diff] [blame] | 1385 | spin_unlock_bh(&txq->lock); |
Johannes Berg | f4feb8a | 2012-10-19 14:24:43 +0200 | [diff] [blame] | 1386 | free_dup_buf: |
| 1387 | if (idx < 0) |
| 1388 | kfree(dup_buf); |
Abhijeet Kolekar | 7bfedc5 | 2010-02-03 13:47:56 -0800 | [diff] [blame] | 1389 | return idx; |
Tomas Winkler | fd4abac | 2008-05-15 13:54:07 +0800 | [diff] [blame] | 1390 | } |
| 1391 | |
Emmanuel Grumbach | 990aa6d | 2012-11-14 12:39:52 +0200 | [diff] [blame] | 1392 | /* |
| 1393 | * iwl_pcie_hcmd_complete - Pull unused buffers off the queue and reclaim them |
Tomas Winkler | 17b8892 | 2008-05-29 16:35:12 +0800 | [diff] [blame] | 1394 | * @rxb: Rx buffer to reclaim |
Emmanuel Grumbach | 247c61d | 2011-09-20 15:37:23 -0700 | [diff] [blame] | 1395 | * @handler_status: return value of the handler of the command |
| 1396 | * (put in setup_rx_handlers) |
Tomas Winkler | 17b8892 | 2008-05-29 16:35:12 +0800 | [diff] [blame] | 1397 | * |
| 1398 | * If an Rx buffer has an async callback associated with it the callback |
| 1399 | * will be executed. The attached skb (if present) will only be freed |
| 1400 | * if the callback returns 1 |
| 1401 | */ |
Emmanuel Grumbach | 990aa6d | 2012-11-14 12:39:52 +0200 | [diff] [blame] | 1402 | void iwl_pcie_hcmd_complete(struct iwl_trans *trans, |
| 1403 | struct iwl_rx_cmd_buffer *rxb, int handler_status) |
Tomas Winkler | 17b8892 | 2008-05-29 16:35:12 +0800 | [diff] [blame] | 1404 | { |
Zhu Yi | 2f30122 | 2009-10-09 17:19:45 +0800 | [diff] [blame] | 1405 | struct iwl_rx_packet *pkt = rxb_addr(rxb); |
Tomas Winkler | 17b8892 | 2008-05-29 16:35:12 +0800 | [diff] [blame] | 1406 | u16 sequence = le16_to_cpu(pkt->hdr.sequence); |
| 1407 | int txq_id = SEQ_TO_QUEUE(sequence); |
| 1408 | int index = SEQ_TO_INDEX(sequence); |
Tomas Winkler | 17b8892 | 2008-05-29 16:35:12 +0800 | [diff] [blame] | 1409 | int cmd_index; |
Johannes Berg | c2acea8 | 2009-07-24 11:13:05 -0700 | [diff] [blame] | 1410 | struct iwl_device_cmd *cmd; |
| 1411 | struct iwl_cmd_meta *meta; |
Emmanuel Grumbach | 8ad71be | 2011-08-25 23:11:32 -0700 | [diff] [blame] | 1412 | struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans); |
Emmanuel Grumbach | 990aa6d | 2012-11-14 12:39:52 +0200 | [diff] [blame] | 1413 | struct iwl_txq *txq = &trans_pcie->txq[trans_pcie->cmd_queue]; |
Tomas Winkler | 17b8892 | 2008-05-29 16:35:12 +0800 | [diff] [blame] | 1414 | |
| 1415 | /* If a Tx command is being handled and it isn't in the actual |
| 1416 | * command queue then there a command routing bug has been introduced |
| 1417 | * in the queue management code. */ |
Meenakshi Venkataraman | c6f600f | 2012-03-08 11:29:12 -0800 | [diff] [blame] | 1418 | if (WARN(txq_id != trans_pcie->cmd_queue, |
Johannes Berg | 13bb948 | 2010-08-23 10:46:33 +0200 | [diff] [blame] | 1419 | "wrong command queue %d (should be %d), sequence 0x%X readp=%d writep=%d\n", |
Johannes Berg | 20d3b64 | 2012-05-16 22:54:29 +0200 | [diff] [blame] | 1420 | txq_id, trans_pcie->cmd_queue, sequence, |
| 1421 | trans_pcie->txq[trans_pcie->cmd_queue].q.read_ptr, |
| 1422 | trans_pcie->txq[trans_pcie->cmd_queue].q.write_ptr)) { |
Emmanuel Grumbach | 3e10cae | 2011-09-06 09:31:18 -0700 | [diff] [blame] | 1423 | iwl_print_hex_error(trans, pkt, 32); |
Johannes Berg | 55d6a3c | 2008-09-23 19:18:43 +0200 | [diff] [blame] | 1424 | return; |
Winkler, Tomas | 01ef9323 | 2008-11-07 09:58:45 -0800 | [diff] [blame] | 1425 | } |
Tomas Winkler | 17b8892 | 2008-05-29 16:35:12 +0800 | [diff] [blame] | 1426 | |
Johannes Berg | 2bfb509 | 2012-12-27 21:43:48 +0100 | [diff] [blame] | 1427 | spin_lock_bh(&txq->lock); |
Johannes Berg | 015c15e | 2012-03-05 11:24:24 -0800 | [diff] [blame] | 1428 | |
Johannes Berg | 4ce7cc2 | 2011-05-13 11:57:40 -0700 | [diff] [blame] | 1429 | cmd_index = get_cmd_index(&txq->q, index); |
Johannes Berg | bf8440e | 2012-03-19 17:12:06 +0100 | [diff] [blame] | 1430 | cmd = txq->entries[cmd_index].cmd; |
| 1431 | meta = &txq->entries[cmd_index].meta; |
Tomas Winkler | 17b8892 | 2008-05-29 16:35:12 +0800 | [diff] [blame] | 1432 | |
Johannes Berg | 9889175 | 2013-02-26 11:28:19 +0100 | [diff] [blame] | 1433 | iwl_pcie_tfd_unmap(trans, meta, &txq->tfds[index]); |
Reinette Chatre | c33de62 | 2009-10-30 14:36:10 -0700 | [diff] [blame] | 1434 | |
Tomas Winkler | 17b8892 | 2008-05-29 16:35:12 +0800 | [diff] [blame] | 1435 | /* Input error checking is done when commands are added to queue. */ |
Johannes Berg | c2acea8 | 2009-07-24 11:13:05 -0700 | [diff] [blame] | 1436 | if (meta->flags & CMD_WANT_SKB) { |
Johannes Berg | 48a2d66 | 2012-03-05 11:24:39 -0800 | [diff] [blame] | 1437 | struct page *p = rxb_steal_page(rxb); |
Stanislaw Gruszka | 2624e96 | 2011-04-20 16:02:58 +0200 | [diff] [blame] | 1438 | |
Johannes Berg | 65b94a4 | 2012-03-05 11:24:38 -0800 | [diff] [blame] | 1439 | meta->source->resp_pkt = pkt; |
| 1440 | meta->source->_rx_page_addr = (unsigned long)page_address(p); |
Johannes Berg | b2cf410 | 2012-04-09 17:46:51 -0700 | [diff] [blame] | 1441 | meta->source->_rx_page_order = trans_pcie->rx_page_order; |
Johannes Berg | 65b94a4 | 2012-03-05 11:24:38 -0800 | [diff] [blame] | 1442 | meta->source->handler_status = handler_status; |
Stanislaw Gruszka | 2624e96 | 2011-04-20 16:02:58 +0200 | [diff] [blame] | 1443 | } |
Tomas Winkler | 17b8892 | 2008-05-29 16:35:12 +0800 | [diff] [blame] | 1444 | |
Emmanuel Grumbach | f02831b | 2012-11-14 14:44:18 +0200 | [diff] [blame] | 1445 | iwl_pcie_cmdq_reclaim(trans, txq_id, index); |
Tomas Winkler | 17b8892 | 2008-05-29 16:35:12 +0800 | [diff] [blame] | 1446 | |
Johannes Berg | c2acea8 | 2009-07-24 11:13:05 -0700 | [diff] [blame] | 1447 | if (!(meta->flags & CMD_ASYNC)) { |
Arik Nemtsov | eb7ff77 | 2013-12-01 12:30:38 +0200 | [diff] [blame] | 1448 | if (!test_bit(STATUS_SYNC_HCMD_ACTIVE, &trans->status)) { |
Wey-Yi Guy | 05c89b9 | 2011-10-10 07:26:48 -0700 | [diff] [blame] | 1449 | IWL_WARN(trans, |
| 1450 | "HCMD_ACTIVE already clear for command %s\n", |
Emmanuel Grumbach | 990aa6d | 2012-11-14 12:39:52 +0200 | [diff] [blame] | 1451 | get_cmd_string(trans_pcie, cmd->hdr.cmd)); |
Wey-Yi Guy | 05c89b9 | 2011-10-10 07:26:48 -0700 | [diff] [blame] | 1452 | } |
Arik Nemtsov | eb7ff77 | 2013-12-01 12:30:38 +0200 | [diff] [blame] | 1453 | clear_bit(STATUS_SYNC_HCMD_ACTIVE, &trans->status); |
Emmanuel Grumbach | 6d8f6ee | 2011-08-25 23:11:06 -0700 | [diff] [blame] | 1454 | IWL_DEBUG_INFO(trans, "Clearing HCMD_ACTIVE for command %s\n", |
Emmanuel Grumbach | 990aa6d | 2012-11-14 12:39:52 +0200 | [diff] [blame] | 1455 | get_cmd_string(trans_pcie, cmd->hdr.cmd)); |
Emmanuel Grumbach | f946b52 | 2012-10-25 17:25:52 +0200 | [diff] [blame] | 1456 | wake_up(&trans_pcie->wait_command_queue); |
Tomas Winkler | 17b8892 | 2008-05-29 16:35:12 +0800 | [diff] [blame] | 1457 | } |
Stanislaw Gruszka | 3598e17 | 2011-03-31 17:36:26 +0200 | [diff] [blame] | 1458 | |
Zhu Yi | dd48744 | 2010-03-22 02:28:41 -0700 | [diff] [blame] | 1459 | meta->flags = 0; |
Stanislaw Gruszka | 3598e17 | 2011-03-31 17:36:26 +0200 | [diff] [blame] | 1460 | |
Johannes Berg | 2bfb509 | 2012-12-27 21:43:48 +0100 | [diff] [blame] | 1461 | spin_unlock_bh(&txq->lock); |
Tomas Winkler | 17b8892 | 2008-05-29 16:35:12 +0800 | [diff] [blame] | 1462 | } |
Emmanuel Grumbach | 253a634 | 2011-07-11 07:39:46 -0700 | [diff] [blame] | 1463 | |
Johannes Berg | 9439eac | 2013-10-09 09:59:25 +0200 | [diff] [blame] | 1464 | #define HOST_COMPLETE_TIMEOUT (2 * HZ) |
| 1465 | #define COMMAND_POKE_TIMEOUT (HZ / 10) |
Emmanuel Grumbach | 253a634 | 2011-07-11 07:39:46 -0700 | [diff] [blame] | 1466 | |
Emmanuel Grumbach | f02831b | 2012-11-14 14:44:18 +0200 | [diff] [blame] | 1467 | static int iwl_pcie_send_hcmd_async(struct iwl_trans *trans, |
| 1468 | struct iwl_host_cmd *cmd) |
Emmanuel Grumbach | 253a634 | 2011-07-11 07:39:46 -0700 | [diff] [blame] | 1469 | { |
Johannes Berg | d9fb646 | 2012-03-26 08:23:39 -0700 | [diff] [blame] | 1470 | struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans); |
Emmanuel Grumbach | 253a634 | 2011-07-11 07:39:46 -0700 | [diff] [blame] | 1471 | int ret; |
| 1472 | |
| 1473 | /* An asynchronous command can not expect an SKB to be set. */ |
| 1474 | if (WARN_ON(cmd->flags & CMD_WANT_SKB)) |
| 1475 | return -EINVAL; |
| 1476 | |
Emmanuel Grumbach | f02831b | 2012-11-14 14:44:18 +0200 | [diff] [blame] | 1477 | ret = iwl_pcie_enqueue_hcmd(trans, cmd); |
Emmanuel Grumbach | 253a634 | 2011-07-11 07:39:46 -0700 | [diff] [blame] | 1478 | if (ret < 0) { |
Johannes Berg | 721c32f | 2012-03-06 13:30:40 -0800 | [diff] [blame] | 1479 | IWL_ERR(trans, |
Todd Previte | b36b110 | 2011-11-10 06:55:02 -0800 | [diff] [blame] | 1480 | "Error sending %s: enqueue_hcmd failed: %d\n", |
Emmanuel Grumbach | 990aa6d | 2012-11-14 12:39:52 +0200 | [diff] [blame] | 1481 | get_cmd_string(trans_pcie, cmd->id), ret); |
Emmanuel Grumbach | 253a634 | 2011-07-11 07:39:46 -0700 | [diff] [blame] | 1482 | return ret; |
| 1483 | } |
| 1484 | return 0; |
| 1485 | } |
| 1486 | |
Emmanuel Grumbach | f02831b | 2012-11-14 14:44:18 +0200 | [diff] [blame] | 1487 | static int iwl_pcie_send_hcmd_sync(struct iwl_trans *trans, |
| 1488 | struct iwl_host_cmd *cmd) |
Emmanuel Grumbach | 253a634 | 2011-07-11 07:39:46 -0700 | [diff] [blame] | 1489 | { |
Emmanuel Grumbach | 8ad71be | 2011-08-25 23:11:32 -0700 | [diff] [blame] | 1490 | struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans); |
Emmanuel Grumbach | 253a634 | 2011-07-11 07:39:46 -0700 | [diff] [blame] | 1491 | int cmd_idx; |
| 1492 | int ret; |
Johannes Berg | 9439eac | 2013-10-09 09:59:25 +0200 | [diff] [blame] | 1493 | int timeout = HOST_COMPLETE_TIMEOUT; |
Emmanuel Grumbach | 253a634 | 2011-07-11 07:39:46 -0700 | [diff] [blame] | 1494 | |
Emmanuel Grumbach | 6d8f6ee | 2011-08-25 23:11:06 -0700 | [diff] [blame] | 1495 | IWL_DEBUG_INFO(trans, "Attempting to send sync command %s\n", |
Emmanuel Grumbach | 990aa6d | 2012-11-14 12:39:52 +0200 | [diff] [blame] | 1496 | get_cmd_string(trans_pcie, cmd->id)); |
Emmanuel Grumbach | 253a634 | 2011-07-11 07:39:46 -0700 | [diff] [blame] | 1497 | |
Arik Nemtsov | eb7ff77 | 2013-12-01 12:30:38 +0200 | [diff] [blame] | 1498 | if (WARN(test_and_set_bit(STATUS_SYNC_HCMD_ACTIVE, |
| 1499 | &trans->status), |
Johannes Berg | bcbb8c9 | 2013-10-28 15:50:55 +0100 | [diff] [blame] | 1500 | "Command %s: a command is already active!\n", |
| 1501 | get_cmd_string(trans_pcie, cmd->id))) |
Johannes Berg | 2cc39c9 | 2012-03-06 13:30:41 -0800 | [diff] [blame] | 1502 | return -EIO; |
Johannes Berg | 2cc39c9 | 2012-03-06 13:30:41 -0800 | [diff] [blame] | 1503 | |
Emmanuel Grumbach | 6d8f6ee | 2011-08-25 23:11:06 -0700 | [diff] [blame] | 1504 | IWL_DEBUG_INFO(trans, "Setting HCMD_ACTIVE for command %s\n", |
Emmanuel Grumbach | 990aa6d | 2012-11-14 12:39:52 +0200 | [diff] [blame] | 1505 | get_cmd_string(trans_pcie, cmd->id)); |
Emmanuel Grumbach | 253a634 | 2011-07-11 07:39:46 -0700 | [diff] [blame] | 1506 | |
Emmanuel Grumbach | f02831b | 2012-11-14 14:44:18 +0200 | [diff] [blame] | 1507 | cmd_idx = iwl_pcie_enqueue_hcmd(trans, cmd); |
Emmanuel Grumbach | 253a634 | 2011-07-11 07:39:46 -0700 | [diff] [blame] | 1508 | if (cmd_idx < 0) { |
| 1509 | ret = cmd_idx; |
Arik Nemtsov | eb7ff77 | 2013-12-01 12:30:38 +0200 | [diff] [blame] | 1510 | clear_bit(STATUS_SYNC_HCMD_ACTIVE, &trans->status); |
Johannes Berg | 721c32f | 2012-03-06 13:30:40 -0800 | [diff] [blame] | 1511 | IWL_ERR(trans, |
Todd Previte | b36b110 | 2011-11-10 06:55:02 -0800 | [diff] [blame] | 1512 | "Error sending %s: enqueue_hcmd failed: %d\n", |
Emmanuel Grumbach | 990aa6d | 2012-11-14 12:39:52 +0200 | [diff] [blame] | 1513 | get_cmd_string(trans_pcie, cmd->id), ret); |
Emmanuel Grumbach | 253a634 | 2011-07-11 07:39:46 -0700 | [diff] [blame] | 1514 | return ret; |
| 1515 | } |
| 1516 | |
Johannes Berg | 9439eac | 2013-10-09 09:59:25 +0200 | [diff] [blame] | 1517 | while (timeout > 0) { |
| 1518 | unsigned long flags; |
| 1519 | |
| 1520 | timeout -= COMMAND_POKE_TIMEOUT; |
| 1521 | ret = wait_event_timeout(trans_pcie->wait_command_queue, |
Arik Nemtsov | eb7ff77 | 2013-12-01 12:30:38 +0200 | [diff] [blame] | 1522 | !test_bit(STATUS_SYNC_HCMD_ACTIVE, |
| 1523 | &trans->status), |
Johannes Berg | 9439eac | 2013-10-09 09:59:25 +0200 | [diff] [blame] | 1524 | COMMAND_POKE_TIMEOUT); |
| 1525 | if (ret) |
| 1526 | break; |
| 1527 | /* poke the device - it may have lost the command */ |
| 1528 | if (iwl_trans_grab_nic_access(trans, true, &flags)) { |
| 1529 | iwl_trans_release_nic_access(trans, &flags); |
| 1530 | IWL_DEBUG_INFO(trans, |
| 1531 | "Tried to wake NIC for command %s\n", |
| 1532 | get_cmd_string(trans_pcie, cmd->id)); |
| 1533 | } else { |
| 1534 | IWL_ERR(trans, "Failed to poke NIC for command %s\n", |
| 1535 | get_cmd_string(trans_pcie, cmd->id)); |
| 1536 | break; |
| 1537 | } |
| 1538 | } |
| 1539 | |
Emmanuel Grumbach | 253a634 | 2011-07-11 07:39:46 -0700 | [diff] [blame] | 1540 | if (!ret) { |
Johannes Berg | 6dde8c4 | 2013-10-31 18:30:38 +0100 | [diff] [blame] | 1541 | struct iwl_txq *txq = &trans_pcie->txq[trans_pcie->cmd_queue]; |
| 1542 | struct iwl_queue *q = &txq->q; |
Wey-Yi Guy | d10630a | 2011-10-10 07:26:46 -0700 | [diff] [blame] | 1543 | |
Johannes Berg | 6dde8c4 | 2013-10-31 18:30:38 +0100 | [diff] [blame] | 1544 | IWL_ERR(trans, "Error sending %s: time out after %dms.\n", |
| 1545 | get_cmd_string(trans_pcie, cmd->id), |
| 1546 | jiffies_to_msecs(HOST_COMPLETE_TIMEOUT)); |
Emmanuel Grumbach | 253a634 | 2011-07-11 07:39:46 -0700 | [diff] [blame] | 1547 | |
Johannes Berg | 6dde8c4 | 2013-10-31 18:30:38 +0100 | [diff] [blame] | 1548 | IWL_ERR(trans, "Current CMD queue read_ptr %d write_ptr %d\n", |
| 1549 | q->read_ptr, q->write_ptr); |
Wey-Yi Guy | d10630a | 2011-10-10 07:26:46 -0700 | [diff] [blame] | 1550 | |
Arik Nemtsov | eb7ff77 | 2013-12-01 12:30:38 +0200 | [diff] [blame] | 1551 | clear_bit(STATUS_SYNC_HCMD_ACTIVE, &trans->status); |
Johannes Berg | 6dde8c4 | 2013-10-31 18:30:38 +0100 | [diff] [blame] | 1552 | IWL_DEBUG_INFO(trans, "Clearing HCMD_ACTIVE for command %s\n", |
| 1553 | get_cmd_string(trans_pcie, cmd->id)); |
| 1554 | ret = -ETIMEDOUT; |
Emmanuel Grumbach | 42550a5 | 2013-09-11 14:16:20 +0300 | [diff] [blame] | 1555 | |
Arik Nemtsov | 2a988e9 | 2013-12-01 13:50:40 +0200 | [diff] [blame] | 1556 | iwl_trans_fw_error(trans); |
Emmanuel Grumbach | 42550a5 | 2013-09-11 14:16:20 +0300 | [diff] [blame] | 1557 | |
Johannes Berg | 6dde8c4 | 2013-10-31 18:30:38 +0100 | [diff] [blame] | 1558 | goto cancel; |
Emmanuel Grumbach | 253a634 | 2011-07-11 07:39:46 -0700 | [diff] [blame] | 1559 | } |
| 1560 | |
Arik Nemtsov | eb7ff77 | 2013-12-01 12:30:38 +0200 | [diff] [blame] | 1561 | if (test_bit(STATUS_FW_ERROR, &trans->status)) { |
Johannes Berg | d18aa87 | 2012-11-06 16:36:21 +0100 | [diff] [blame] | 1562 | IWL_ERR(trans, "FW error in SYNC CMD %s\n", |
Emmanuel Grumbach | 990aa6d | 2012-11-14 12:39:52 +0200 | [diff] [blame] | 1563 | get_cmd_string(trans_pcie, cmd->id)); |
Johannes Berg | b656fa3 | 2013-05-03 11:56:17 +0200 | [diff] [blame] | 1564 | dump_stack(); |
Johannes Berg | d18aa87 | 2012-11-06 16:36:21 +0100 | [diff] [blame] | 1565 | ret = -EIO; |
| 1566 | goto cancel; |
| 1567 | } |
| 1568 | |
Eran Harary | 1094fa2 | 2013-06-02 12:40:34 +0300 | [diff] [blame] | 1569 | if (!(cmd->flags & CMD_SEND_IN_RFKILL) && |
Arik Nemtsov | eb7ff77 | 2013-12-01 12:30:38 +0200 | [diff] [blame] | 1570 | test_bit(STATUS_RFKILL, &trans->status)) { |
Emmanuel Grumbach | f946b52 | 2012-10-25 17:25:52 +0200 | [diff] [blame] | 1571 | IWL_DEBUG_RF_KILL(trans, "RFKILL in SYNC CMD... no rsp\n"); |
| 1572 | ret = -ERFKILL; |
| 1573 | goto cancel; |
| 1574 | } |
| 1575 | |
Johannes Berg | 65b94a4 | 2012-03-05 11:24:38 -0800 | [diff] [blame] | 1576 | if ((cmd->flags & CMD_WANT_SKB) && !cmd->resp_pkt) { |
Emmanuel Grumbach | 6d8f6ee | 2011-08-25 23:11:06 -0700 | [diff] [blame] | 1577 | IWL_ERR(trans, "Error: Response NULL in '%s'\n", |
Emmanuel Grumbach | 990aa6d | 2012-11-14 12:39:52 +0200 | [diff] [blame] | 1578 | get_cmd_string(trans_pcie, cmd->id)); |
Emmanuel Grumbach | 253a634 | 2011-07-11 07:39:46 -0700 | [diff] [blame] | 1579 | ret = -EIO; |
| 1580 | goto cancel; |
| 1581 | } |
| 1582 | |
| 1583 | return 0; |
| 1584 | |
| 1585 | cancel: |
| 1586 | if (cmd->flags & CMD_WANT_SKB) { |
| 1587 | /* |
| 1588 | * Cancel the CMD_WANT_SKB flag for the cmd in the |
| 1589 | * TX cmd queue. Otherwise in case the cmd comes |
| 1590 | * in later, it will possibly set an invalid |
| 1591 | * address (cmd->meta.source). |
| 1592 | */ |
Johannes Berg | bf8440e | 2012-03-19 17:12:06 +0100 | [diff] [blame] | 1593 | trans_pcie->txq[trans_pcie->cmd_queue]. |
| 1594 | entries[cmd_idx].meta.flags &= ~CMD_WANT_SKB; |
Emmanuel Grumbach | 253a634 | 2011-07-11 07:39:46 -0700 | [diff] [blame] | 1595 | } |
Emmanuel Grumbach | 9cac494 | 2011-11-10 06:55:20 -0800 | [diff] [blame] | 1596 | |
Johannes Berg | 65b94a4 | 2012-03-05 11:24:38 -0800 | [diff] [blame] | 1597 | if (cmd->resp_pkt) { |
| 1598 | iwl_free_resp(cmd); |
| 1599 | cmd->resp_pkt = NULL; |
Emmanuel Grumbach | 253a634 | 2011-07-11 07:39:46 -0700 | [diff] [blame] | 1600 | } |
| 1601 | |
| 1602 | return ret; |
| 1603 | } |
| 1604 | |
Emmanuel Grumbach | f02831b | 2012-11-14 14:44:18 +0200 | [diff] [blame] | 1605 | int iwl_trans_pcie_send_hcmd(struct iwl_trans *trans, struct iwl_host_cmd *cmd) |
Emmanuel Grumbach | 253a634 | 2011-07-11 07:39:46 -0700 | [diff] [blame] | 1606 | { |
Eran Harary | 4f59334 | 2013-05-13 07:53:26 +0300 | [diff] [blame] | 1607 | if (!(cmd->flags & CMD_SEND_IN_RFKILL) && |
Arik Nemtsov | eb7ff77 | 2013-12-01 12:30:38 +0200 | [diff] [blame] | 1608 | test_bit(STATUS_RFKILL, &trans->status)) { |
Emmanuel Grumbach | 754d7d9 | 2013-03-13 22:16:20 +0200 | [diff] [blame] | 1609 | IWL_DEBUG_RF_KILL(trans, "Dropping CMD 0x%x: RF KILL\n", |
| 1610 | cmd->id); |
Emmanuel Grumbach | f946b52 | 2012-10-25 17:25:52 +0200 | [diff] [blame] | 1611 | return -ERFKILL; |
Emmanuel Grumbach | 754d7d9 | 2013-03-13 22:16:20 +0200 | [diff] [blame] | 1612 | } |
Emmanuel Grumbach | f946b52 | 2012-10-25 17:25:52 +0200 | [diff] [blame] | 1613 | |
Emmanuel Grumbach | 253a634 | 2011-07-11 07:39:46 -0700 | [diff] [blame] | 1614 | if (cmd->flags & CMD_ASYNC) |
Emmanuel Grumbach | f02831b | 2012-11-14 14:44:18 +0200 | [diff] [blame] | 1615 | return iwl_pcie_send_hcmd_async(trans, cmd); |
Emmanuel Grumbach | 253a634 | 2011-07-11 07:39:46 -0700 | [diff] [blame] | 1616 | |
Emmanuel Grumbach | f946b52 | 2012-10-25 17:25:52 +0200 | [diff] [blame] | 1617 | /* We still can fail on RFKILL that can be asserted while we wait */ |
Emmanuel Grumbach | f02831b | 2012-11-14 14:44:18 +0200 | [diff] [blame] | 1618 | return iwl_pcie_send_hcmd_sync(trans, cmd); |
Emmanuel Grumbach | 253a634 | 2011-07-11 07:39:46 -0700 | [diff] [blame] | 1619 | } |
| 1620 | |
Emmanuel Grumbach | f02831b | 2012-11-14 14:44:18 +0200 | [diff] [blame] | 1621 | int iwl_trans_pcie_tx(struct iwl_trans *trans, struct sk_buff *skb, |
| 1622 | struct iwl_device_cmd *dev_cmd, int txq_id) |
Emmanuel Grumbach | a0eaad7 | 2011-08-25 23:11:00 -0700 | [diff] [blame] | 1623 | { |
Emmanuel Grumbach | 8ad71be | 2011-08-25 23:11:32 -0700 | [diff] [blame] | 1624 | struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans); |
Emmanuel Grumbach | f02831b | 2012-11-14 14:44:18 +0200 | [diff] [blame] | 1625 | struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data; |
| 1626 | struct iwl_tx_cmd *tx_cmd = (struct iwl_tx_cmd *)dev_cmd->payload; |
| 1627 | struct iwl_cmd_meta *out_meta; |
| 1628 | struct iwl_txq *txq; |
| 1629 | struct iwl_queue *q; |
Johannes Berg | 38c0f334 | 2013-02-27 13:18:50 +0100 | [diff] [blame] | 1630 | dma_addr_t tb0_phys, tb1_phys, scratch_phys; |
| 1631 | void *tb1_addr; |
| 1632 | u16 len, tb1_len, tb2_len; |
Emmanuel Grumbach | f02831b | 2012-11-14 14:44:18 +0200 | [diff] [blame] | 1633 | u8 wait_write_ptr = 0; |
| 1634 | __le16 fc = hdr->frame_control; |
| 1635 | u8 hdr_len = ieee80211_hdrlen(fc); |
Johannes Berg | 68972c4 | 2013-06-11 19:05:27 +0200 | [diff] [blame] | 1636 | u16 wifi_seq; |
Emmanuel Grumbach | a0eaad7 | 2011-08-25 23:11:00 -0700 | [diff] [blame] | 1637 | |
Emmanuel Grumbach | f02831b | 2012-11-14 14:44:18 +0200 | [diff] [blame] | 1638 | txq = &trans_pcie->txq[txq_id]; |
| 1639 | q = &txq->q; |
Emmanuel Grumbach | 39644e9 | 2011-09-15 11:46:29 -0700 | [diff] [blame] | 1640 | |
Johannes Berg | 961de6a | 2013-07-04 18:00:08 +0200 | [diff] [blame] | 1641 | if (WARN_ONCE(!test_bit(txq_id, trans_pcie->queue_used), |
| 1642 | "TX on unused queue %d\n", txq_id)) |
Emmanuel Grumbach | f02831b | 2012-11-14 14:44:18 +0200 | [diff] [blame] | 1643 | return -EINVAL; |
Emmanuel Grumbach | a0eaad7 | 2011-08-25 23:11:00 -0700 | [diff] [blame] | 1644 | |
Emmanuel Grumbach | f02831b | 2012-11-14 14:44:18 +0200 | [diff] [blame] | 1645 | spin_lock(&txq->lock); |
Emmanuel Grumbach | a0eaad7 | 2011-08-25 23:11:00 -0700 | [diff] [blame] | 1646 | |
Emmanuel Grumbach | f02831b | 2012-11-14 14:44:18 +0200 | [diff] [blame] | 1647 | /* In AGG mode, the index in the ring must correspond to the WiFi |
| 1648 | * sequence number. This is a HW requirements to help the SCD to parse |
| 1649 | * the BA. |
| 1650 | * Check here that the packets are in the right place on the ring. |
| 1651 | */ |
Johannes Berg | 9a88658 | 2013-02-15 19:25:00 +0100 | [diff] [blame] | 1652 | wifi_seq = IEEE80211_SEQ_TO_SN(le16_to_cpu(hdr->seq_ctrl)); |
Eliad Peller | 1092b9b | 2013-07-16 17:53:43 +0300 | [diff] [blame] | 1653 | WARN_ONCE(txq->ampdu && |
Johannes Berg | 68972c4 | 2013-06-11 19:05:27 +0200 | [diff] [blame] | 1654 | (wifi_seq & 0xff) != q->write_ptr, |
Emmanuel Grumbach | f02831b | 2012-11-14 14:44:18 +0200 | [diff] [blame] | 1655 | "Q: %d WiFi Seq %d tfdNum %d", |
| 1656 | txq_id, wifi_seq, q->write_ptr); |
Emmanuel Grumbach | a0eaad7 | 2011-08-25 23:11:00 -0700 | [diff] [blame] | 1657 | |
Emmanuel Grumbach | f02831b | 2012-11-14 14:44:18 +0200 | [diff] [blame] | 1658 | /* Set up driver data for this TFD */ |
| 1659 | txq->entries[q->write_ptr].skb = skb; |
| 1660 | txq->entries[q->write_ptr].cmd = dev_cmd; |
Emmanuel Grumbach | a0eaad7 | 2011-08-25 23:11:00 -0700 | [diff] [blame] | 1661 | |
Emmanuel Grumbach | f02831b | 2012-11-14 14:44:18 +0200 | [diff] [blame] | 1662 | dev_cmd->hdr.sequence = |
| 1663 | cpu_to_le16((u16)(QUEUE_TO_SEQ(txq_id) | |
| 1664 | INDEX_TO_SEQ(q->write_ptr))); |
Emmanuel Grumbach | a0eaad7 | 2011-08-25 23:11:00 -0700 | [diff] [blame] | 1665 | |
Johannes Berg | 38c0f334 | 2013-02-27 13:18:50 +0100 | [diff] [blame] | 1666 | tb0_phys = iwl_pcie_get_scratchbuf_dma(txq, q->write_ptr); |
| 1667 | scratch_phys = tb0_phys + sizeof(struct iwl_cmd_header) + |
| 1668 | offsetof(struct iwl_tx_cmd, scratch); |
| 1669 | |
| 1670 | tx_cmd->dram_lsb_ptr = cpu_to_le32(scratch_phys); |
| 1671 | tx_cmd->dram_msb_ptr = iwl_get_dma_hi_addr(scratch_phys); |
| 1672 | |
Emmanuel Grumbach | f02831b | 2012-11-14 14:44:18 +0200 | [diff] [blame] | 1673 | /* Set up first empty entry in queue's array of Tx/cmd buffers */ |
| 1674 | out_meta = &txq->entries[q->write_ptr].meta; |
Emmanuel Grumbach | a0eaad7 | 2011-08-25 23:11:00 -0700 | [diff] [blame] | 1675 | |
Emmanuel Grumbach | f02831b | 2012-11-14 14:44:18 +0200 | [diff] [blame] | 1676 | /* |
Johannes Berg | 38c0f334 | 2013-02-27 13:18:50 +0100 | [diff] [blame] | 1677 | * The second TB (tb1) points to the remainder of the TX command |
| 1678 | * and the 802.11 header - dword aligned size |
| 1679 | * (This calculation modifies the TX command, so do it before the |
| 1680 | * setup of the first TB) |
Emmanuel Grumbach | f02831b | 2012-11-14 14:44:18 +0200 | [diff] [blame] | 1681 | */ |
Johannes Berg | 38c0f334 | 2013-02-27 13:18:50 +0100 | [diff] [blame] | 1682 | len = sizeof(struct iwl_tx_cmd) + sizeof(struct iwl_cmd_header) + |
| 1683 | hdr_len - IWL_HCMD_SCRATCHBUF_SIZE; |
Eliad Peller | 1092b9b | 2013-07-16 17:53:43 +0300 | [diff] [blame] | 1684 | tb1_len = ALIGN(len, 4); |
Emmanuel Grumbach | a0eaad7 | 2011-08-25 23:11:00 -0700 | [diff] [blame] | 1685 | |
Emmanuel Grumbach | f02831b | 2012-11-14 14:44:18 +0200 | [diff] [blame] | 1686 | /* Tell NIC about any 2-byte padding after MAC header */ |
Johannes Berg | 38c0f334 | 2013-02-27 13:18:50 +0100 | [diff] [blame] | 1687 | if (tb1_len != len) |
Emmanuel Grumbach | f02831b | 2012-11-14 14:44:18 +0200 | [diff] [blame] | 1688 | tx_cmd->tx_flags |= TX_CMD_FLG_MH_PAD_MSK; |
| 1689 | |
Johannes Berg | 38c0f334 | 2013-02-27 13:18:50 +0100 | [diff] [blame] | 1690 | /* The first TB points to the scratchbuf data - min_copy bytes */ |
| 1691 | memcpy(&txq->scratchbufs[q->write_ptr], &dev_cmd->hdr, |
| 1692 | IWL_HCMD_SCRATCHBUF_SIZE); |
| 1693 | iwl_pcie_txq_build_tfd(trans, txq, tb0_phys, |
| 1694 | IWL_HCMD_SCRATCHBUF_SIZE, 1); |
| 1695 | |
| 1696 | /* there must be data left over for TB1 or this code must be changed */ |
| 1697 | BUILD_BUG_ON(sizeof(struct iwl_tx_cmd) < IWL_HCMD_SCRATCHBUF_SIZE); |
| 1698 | |
| 1699 | /* map the data for TB1 */ |
| 1700 | tb1_addr = ((u8 *)&dev_cmd->hdr) + IWL_HCMD_SCRATCHBUF_SIZE; |
| 1701 | tb1_phys = dma_map_single(trans->dev, tb1_addr, tb1_len, DMA_TO_DEVICE); |
| 1702 | if (unlikely(dma_mapping_error(trans->dev, tb1_phys))) |
Emmanuel Grumbach | f02831b | 2012-11-14 14:44:18 +0200 | [diff] [blame] | 1703 | goto out_err; |
Johannes Berg | 38c0f334 | 2013-02-27 13:18:50 +0100 | [diff] [blame] | 1704 | iwl_pcie_txq_build_tfd(trans, txq, tb1_phys, tb1_len, 0); |
| 1705 | |
| 1706 | /* |
| 1707 | * Set up TFD's third entry to point directly to remainder |
| 1708 | * of skb, if any (802.11 null frames have no payload). |
| 1709 | */ |
| 1710 | tb2_len = skb->len - hdr_len; |
| 1711 | if (tb2_len > 0) { |
| 1712 | dma_addr_t tb2_phys = dma_map_single(trans->dev, |
| 1713 | skb->data + hdr_len, |
| 1714 | tb2_len, DMA_TO_DEVICE); |
| 1715 | if (unlikely(dma_mapping_error(trans->dev, tb2_phys))) { |
| 1716 | iwl_pcie_tfd_unmap(trans, out_meta, |
| 1717 | &txq->tfds[q->write_ptr]); |
| 1718 | goto out_err; |
| 1719 | } |
| 1720 | iwl_pcie_txq_build_tfd(trans, txq, tb2_phys, tb2_len, 0); |
| 1721 | } |
| 1722 | |
| 1723 | /* Set up entry for this TFD in Tx byte-count array */ |
| 1724 | iwl_pcie_txq_update_byte_cnt_tbl(trans, txq, le16_to_cpu(tx_cmd->len)); |
| 1725 | |
| 1726 | trace_iwlwifi_dev_tx(trans->dev, skb, |
| 1727 | &txq->tfds[txq->q.write_ptr], |
| 1728 | sizeof(struct iwl_tfd), |
| 1729 | &dev_cmd->hdr, IWL_HCMD_SCRATCHBUF_SIZE + tb1_len, |
| 1730 | skb->data + hdr_len, tb2_len); |
| 1731 | trace_iwlwifi_dev_tx_data(trans->dev, skb, |
| 1732 | skb->data + hdr_len, tb2_len); |
Emmanuel Grumbach | f02831b | 2012-11-14 14:44:18 +0200 | [diff] [blame] | 1733 | |
| 1734 | if (!ieee80211_has_morefrags(fc)) { |
| 1735 | txq->need_update = 1; |
| 1736 | } else { |
| 1737 | wait_write_ptr = 1; |
| 1738 | txq->need_update = 0; |
Emmanuel Grumbach | a0eaad7 | 2011-08-25 23:11:00 -0700 | [diff] [blame] | 1739 | } |
Johannes Berg | 7c5ba4a | 2012-04-09 17:46:54 -0700 | [diff] [blame] | 1740 | |
Emmanuel Grumbach | f02831b | 2012-11-14 14:44:18 +0200 | [diff] [blame] | 1741 | /* start timer if queue currently empty */ |
| 1742 | if (txq->need_update && q->read_ptr == q->write_ptr && |
| 1743 | trans_pcie->wd_timeout) |
| 1744 | mod_timer(&txq->stuck_timer, jiffies + trans_pcie->wd_timeout); |
| 1745 | |
| 1746 | /* Tell device the write index *just past* this latest filled TFD */ |
| 1747 | q->write_ptr = iwl_queue_inc_wrap(q->write_ptr, q->n_bd); |
| 1748 | iwl_pcie_txq_inc_wr_ptr(trans, txq); |
| 1749 | |
| 1750 | /* |
| 1751 | * At this point the frame is "transmitted" successfully |
| 1752 | * and we will get a TX status notification eventually, |
| 1753 | * regardless of the value of ret. "ret" only indicates |
| 1754 | * whether or not we should update the write pointer. |
| 1755 | */ |
| 1756 | if (iwl_queue_space(q) < q->high_mark) { |
| 1757 | if (wait_write_ptr) { |
| 1758 | txq->need_update = 1; |
| 1759 | iwl_pcie_txq_inc_wr_ptr(trans, txq); |
| 1760 | } else { |
| 1761 | iwl_stop_queue(trans, txq); |
| 1762 | } |
| 1763 | } |
| 1764 | spin_unlock(&txq->lock); |
| 1765 | return 0; |
| 1766 | out_err: |
| 1767 | spin_unlock(&txq->lock); |
| 1768 | return -1; |
Emmanuel Grumbach | a0eaad7 | 2011-08-25 23:11:00 -0700 | [diff] [blame] | 1769 | } |