blob: f4f03dcc153049358b7167695c27fff60af55d46 [file] [log] [blame]
Rafał Miłecki74338742009-11-03 00:53:02 +01001/*
2 * Permission is hereby granted, free of charge, to any person obtaining a
3 * copy of this software and associated documentation files (the "Software"),
4 * to deal in the Software without restriction, including without limitation
5 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
6 * and/or sell copies of the Software, and to permit persons to whom the
7 * Software is furnished to do so, subject to the following conditions:
8 *
9 * The above copyright notice and this permission notice shall be included in
10 * all copies or substantial portions of the Software.
11 *
12 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
13 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
14 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
15 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
16 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
17 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
18 * OTHER DEALINGS IN THE SOFTWARE.
19 *
20 * Authors: Rafał Miłecki <zajec5@gmail.com>
Alex Deucher56278a82009-12-28 13:58:44 -050021 * Alex Deucher <alexdeucher@gmail.com>
Rafał Miłecki74338742009-11-03 00:53:02 +010022 */
David Howells760285e2012-10-02 18:01:07 +010023#include <drm/drmP.h>
Rafał Miłecki74338742009-11-03 00:53:02 +010024#include "radeon.h"
Dave Airlief7352612010-02-18 15:58:36 +100025#include "avivod.h"
Alex Deucher8a83ec52011-04-12 14:49:23 -040026#include "atom.h"
Oleg Chernovskiy99736702014-12-08 00:10:45 +030027#include "r600_dpm.h"
Alex Deucherce8f5372010-05-07 15:10:16 -040028#include <linux/power_supply.h>
Alex Deucher21a81222010-07-02 12:58:16 -040029#include <linux/hwmon.h>
30#include <linux/hwmon-sysfs.h>
Rafał Miłecki74338742009-11-03 00:53:02 +010031
Rafał Miłeckic913e232009-12-22 23:02:16 +010032#define RADEON_IDLE_LOOP_MS 100
33#define RADEON_RECLOCK_DELAY_MS 200
Rafał Miłecki73a6d3f2010-01-08 00:22:47 +010034#define RADEON_WAIT_VBLANK_TIMEOUT 200
Rafał Miłeckic913e232009-12-22 23:02:16 +010035
Rafał Miłeckif712d0c2010-06-07 18:29:44 -040036static const char *radeon_pm_state_type_name[5] = {
Alex Deuchereb2c27a2012-10-01 18:28:09 -040037 "",
Rafał Miłeckif712d0c2010-06-07 18:29:44 -040038 "Powersave",
39 "Battery",
40 "Balanced",
41 "Performance",
42};
43
Alex Deucherce8f5372010-05-07 15:10:16 -040044static void radeon_dynpm_idle_work_handler(struct work_struct *work);
Rafał Miłeckic913e232009-12-22 23:02:16 +010045static int radeon_debugfs_pm_init(struct radeon_device *rdev);
Alex Deucherce8f5372010-05-07 15:10:16 -040046static bool radeon_pm_in_vbl(struct radeon_device *rdev);
47static bool radeon_pm_debug_check_in_vbl(struct radeon_device *rdev, bool finish);
48static void radeon_pm_update_profile(struct radeon_device *rdev);
49static void radeon_pm_set_clocks(struct radeon_device *rdev);
50
Alex Deuchera4c9e2e2011-11-04 10:09:41 -040051int radeon_pm_get_type_index(struct radeon_device *rdev,
52 enum radeon_pm_state_type ps_type,
53 int instance)
54{
55 int i;
56 int found_instance = -1;
57
58 for (i = 0; i < rdev->pm.num_power_states; i++) {
59 if (rdev->pm.power_state[i].type == ps_type) {
60 found_instance++;
61 if (found_instance == instance)
62 return i;
63 }
64 }
65 /* return default if no match */
66 return rdev->pm.default_power_state_index;
67}
68
Alex Deucherc4917072012-07-31 17:14:35 -040069void radeon_pm_acpi_event_handler(struct radeon_device *rdev)
Alex Deucherce8f5372010-05-07 15:10:16 -040070{
Alex Deucher1c71bda2013-09-09 19:11:52 -040071 if ((rdev->pm.pm_method == PM_METHOD_DPM) && rdev->pm.dpm_enabled) {
72 mutex_lock(&rdev->pm.mutex);
73 if (power_supply_is_system_supplied() > 0)
74 rdev->pm.dpm.ac_power = true;
75 else
76 rdev->pm.dpm.ac_power = false;
Alex Deucher96682952014-06-18 14:23:46 -040077 if (rdev->family == CHIP_ARUBA) {
78 if (rdev->asic->dpm.enable_bapm)
79 radeon_dpm_enable_bapm(rdev, rdev->pm.dpm.ac_power);
80 }
Alex Deucher1c71bda2013-09-09 19:11:52 -040081 mutex_unlock(&rdev->pm.mutex);
82 } else if (rdev->pm.pm_method == PM_METHOD_PROFILE) {
Alex Deucherc4917072012-07-31 17:14:35 -040083 if (rdev->pm.profile == PM_PROFILE_AUTO) {
84 mutex_lock(&rdev->pm.mutex);
85 radeon_pm_update_profile(rdev);
86 radeon_pm_set_clocks(rdev);
87 mutex_unlock(&rdev->pm.mutex);
Alex Deucherce8f5372010-05-07 15:10:16 -040088 }
89 }
Alex Deucherce8f5372010-05-07 15:10:16 -040090}
Alex Deucherce8f5372010-05-07 15:10:16 -040091
92static void radeon_pm_update_profile(struct radeon_device *rdev)
93{
94 switch (rdev->pm.profile) {
95 case PM_PROFILE_DEFAULT:
96 rdev->pm.profile_index = PM_PROFILE_DEFAULT_IDX;
97 break;
98 case PM_PROFILE_AUTO:
99 if (power_supply_is_system_supplied() > 0) {
100 if (rdev->pm.active_crtc_count > 1)
101 rdev->pm.profile_index = PM_PROFILE_HIGH_MH_IDX;
102 else
103 rdev->pm.profile_index = PM_PROFILE_HIGH_SH_IDX;
104 } else {
105 if (rdev->pm.active_crtc_count > 1)
Alex Deucherc9e75b22010-06-02 17:56:01 -0400106 rdev->pm.profile_index = PM_PROFILE_MID_MH_IDX;
Alex Deucherce8f5372010-05-07 15:10:16 -0400107 else
Alex Deucherc9e75b22010-06-02 17:56:01 -0400108 rdev->pm.profile_index = PM_PROFILE_MID_SH_IDX;
Alex Deucherce8f5372010-05-07 15:10:16 -0400109 }
110 break;
111 case PM_PROFILE_LOW:
112 if (rdev->pm.active_crtc_count > 1)
113 rdev->pm.profile_index = PM_PROFILE_LOW_MH_IDX;
114 else
115 rdev->pm.profile_index = PM_PROFILE_LOW_SH_IDX;
116 break;
Alex Deucherc9e75b22010-06-02 17:56:01 -0400117 case PM_PROFILE_MID:
118 if (rdev->pm.active_crtc_count > 1)
119 rdev->pm.profile_index = PM_PROFILE_MID_MH_IDX;
120 else
121 rdev->pm.profile_index = PM_PROFILE_MID_SH_IDX;
122 break;
Alex Deucherce8f5372010-05-07 15:10:16 -0400123 case PM_PROFILE_HIGH:
124 if (rdev->pm.active_crtc_count > 1)
125 rdev->pm.profile_index = PM_PROFILE_HIGH_MH_IDX;
126 else
127 rdev->pm.profile_index = PM_PROFILE_HIGH_SH_IDX;
128 break;
129 }
130
131 if (rdev->pm.active_crtc_count == 0) {
132 rdev->pm.requested_power_state_index =
133 rdev->pm.profiles[rdev->pm.profile_index].dpms_off_ps_idx;
134 rdev->pm.requested_clock_mode_index =
135 rdev->pm.profiles[rdev->pm.profile_index].dpms_off_cm_idx;
136 } else {
137 rdev->pm.requested_power_state_index =
138 rdev->pm.profiles[rdev->pm.profile_index].dpms_on_ps_idx;
139 rdev->pm.requested_clock_mode_index =
140 rdev->pm.profiles[rdev->pm.profile_index].dpms_on_cm_idx;
141 }
142}
Rafał Miłeckic913e232009-12-22 23:02:16 +0100143
Matthew Garrett5876dd22010-04-26 15:52:20 -0400144static void radeon_unmap_vram_bos(struct radeon_device *rdev)
145{
146 struct radeon_bo *bo, *n;
147
148 if (list_empty(&rdev->gem.objects))
149 return;
150
151 list_for_each_entry_safe(bo, n, &rdev->gem.objects, list) {
152 if (bo->tbo.mem.mem_type == TTM_PL_VRAM)
153 ttm_bo_unmap_virtual(&bo->tbo);
154 }
Matthew Garrett5876dd22010-04-26 15:52:20 -0400155}
156
Alex Deucherce8f5372010-05-07 15:10:16 -0400157static void radeon_sync_with_vblank(struct radeon_device *rdev)
158{
159 if (rdev->pm.active_crtcs) {
160 rdev->pm.vblank_sync = false;
161 wait_event_timeout(
162 rdev->irq.vblank_queue, rdev->pm.vblank_sync,
163 msecs_to_jiffies(RADEON_WAIT_VBLANK_TIMEOUT));
164 }
165}
166
167static void radeon_set_power_state(struct radeon_device *rdev)
168{
169 u32 sclk, mclk;
Alex Deucher92645872010-05-27 17:01:41 -0400170 bool misc_after = false;
Alex Deucherce8f5372010-05-07 15:10:16 -0400171
172 if ((rdev->pm.requested_clock_mode_index == rdev->pm.current_clock_mode_index) &&
173 (rdev->pm.requested_power_state_index == rdev->pm.current_power_state_index))
174 return;
175
176 if (radeon_gui_idle(rdev)) {
177 sclk = rdev->pm.power_state[rdev->pm.requested_power_state_index].
178 clock_info[rdev->pm.requested_clock_mode_index].sclk;
Alex Deucher9ace9f72011-01-06 21:19:26 -0500179 if (sclk > rdev->pm.default_sclk)
180 sclk = rdev->pm.default_sclk;
Alex Deucherce8f5372010-05-07 15:10:16 -0400181
Alex Deucher27810fb2012-10-01 19:25:11 -0400182 /* starting with BTC, there is one state that is used for both
183 * MH and SH. Difference is that we always use the high clock index for
Alex Deucher7ae764b2013-02-11 08:44:48 -0500184 * mclk and vddci.
Alex Deucher27810fb2012-10-01 19:25:11 -0400185 */
186 if ((rdev->pm.pm_method == PM_METHOD_PROFILE) &&
187 (rdev->family >= CHIP_BARTS) &&
188 rdev->pm.active_crtc_count &&
189 ((rdev->pm.profile_index == PM_PROFILE_MID_MH_IDX) ||
190 (rdev->pm.profile_index == PM_PROFILE_LOW_MH_IDX)))
191 mclk = rdev->pm.power_state[rdev->pm.requested_power_state_index].
192 clock_info[rdev->pm.profiles[PM_PROFILE_HIGH_MH_IDX].dpms_on_cm_idx].mclk;
193 else
194 mclk = rdev->pm.power_state[rdev->pm.requested_power_state_index].
195 clock_info[rdev->pm.requested_clock_mode_index].mclk;
196
Alex Deucher9ace9f72011-01-06 21:19:26 -0500197 if (mclk > rdev->pm.default_mclk)
198 mclk = rdev->pm.default_mclk;
Alex Deucherce8f5372010-05-07 15:10:16 -0400199
Alex Deucher92645872010-05-27 17:01:41 -0400200 /* upvolt before raising clocks, downvolt after lowering clocks */
201 if (sclk < rdev->pm.current_sclk)
202 misc_after = true;
203
204 radeon_sync_with_vblank(rdev);
Alex Deucherce8f5372010-05-07 15:10:16 -0400205
206 if (rdev->pm.pm_method == PM_METHOD_DYNPM) {
Alex Deucherce8f5372010-05-07 15:10:16 -0400207 if (!radeon_pm_in_vbl(rdev))
208 return;
Alex Deucherce8f5372010-05-07 15:10:16 -0400209 }
210
Alex Deucher92645872010-05-27 17:01:41 -0400211 radeon_pm_prepare(rdev);
212
213 if (!misc_after)
214 /* voltage, pcie lanes, etc.*/
215 radeon_pm_misc(rdev);
216
217 /* set engine clock */
218 if (sclk != rdev->pm.current_sclk) {
219 radeon_pm_debug_check_in_vbl(rdev, false);
220 radeon_set_engine_clock(rdev, sclk);
221 radeon_pm_debug_check_in_vbl(rdev, true);
222 rdev->pm.current_sclk = sclk;
Dave Airlied9fdaaf2010-08-02 10:42:55 +1000223 DRM_DEBUG_DRIVER("Setting: e: %d\n", sclk);
Alex Deucher92645872010-05-27 17:01:41 -0400224 }
225
226 /* set memory clock */
Alex Deucher798bcf72012-02-23 17:53:48 -0500227 if (rdev->asic->pm.set_memory_clock && (mclk != rdev->pm.current_mclk)) {
Alex Deucher92645872010-05-27 17:01:41 -0400228 radeon_pm_debug_check_in_vbl(rdev, false);
229 radeon_set_memory_clock(rdev, mclk);
230 radeon_pm_debug_check_in_vbl(rdev, true);
231 rdev->pm.current_mclk = mclk;
Dave Airlied9fdaaf2010-08-02 10:42:55 +1000232 DRM_DEBUG_DRIVER("Setting: m: %d\n", mclk);
Alex Deucher92645872010-05-27 17:01:41 -0400233 }
234
235 if (misc_after)
236 /* voltage, pcie lanes, etc.*/
237 radeon_pm_misc(rdev);
238
239 radeon_pm_finish(rdev);
240
Alex Deucherce8f5372010-05-07 15:10:16 -0400241 rdev->pm.current_power_state_index = rdev->pm.requested_power_state_index;
242 rdev->pm.current_clock_mode_index = rdev->pm.requested_clock_mode_index;
243 } else
Dave Airlied9fdaaf2010-08-02 10:42:55 +1000244 DRM_DEBUG_DRIVER("pm: GUI not idle!!!\n");
Alex Deucherce8f5372010-05-07 15:10:16 -0400245}
246
247static void radeon_pm_set_clocks(struct radeon_device *rdev)
Alex Deuchera4248162010-04-24 14:50:23 -0400248{
Jerome Glisse5f8f6352012-12-17 11:04:32 -0500249 int i, r;
Matthew Garrett2aba6312010-04-26 15:45:23 -0400250
Alex Deucher4e186b22010-08-13 10:53:35 -0400251 /* no need to take locks, etc. if nothing's going to change */
252 if ((rdev->pm.requested_clock_mode_index == rdev->pm.current_clock_mode_index) &&
253 (rdev->pm.requested_power_state_index == rdev->pm.current_power_state_index))
254 return;
255
Christian Königdb7fce32012-05-11 14:57:18 +0200256 down_write(&rdev->pm.mclk_lock);
Christian Königd6999bc2012-05-09 15:34:45 +0200257 mutex_lock(&rdev->ring_lock);
Alex Deucher4f3218c2010-04-29 16:14:02 -0400258
Alex Deucher95f5a3a2012-08-10 13:12:08 -0400259 /* wait for the rings to drain */
260 for (i = 0; i < RADEON_NUM_RINGS; i++) {
261 struct radeon_ring *ring = &rdev->ring[i];
Jerome Glisse5f8f6352012-12-17 11:04:32 -0500262 if (!ring->ready) {
263 continue;
264 }
Christian König37615522014-02-18 15:58:31 +0100265 r = radeon_fence_wait_empty(rdev, i);
Jerome Glisse5f8f6352012-12-17 11:04:32 -0500266 if (r) {
267 /* needs a GPU reset dont reset here */
268 mutex_unlock(&rdev->ring_lock);
269 up_write(&rdev->pm.mclk_lock);
Jerome Glisse5f8f6352012-12-17 11:04:32 -0500270 return;
271 }
Alex Deucher4f3218c2010-04-29 16:14:02 -0400272 }
Alex Deucher95f5a3a2012-08-10 13:12:08 -0400273
Matthew Garrett5876dd22010-04-26 15:52:20 -0400274 radeon_unmap_vram_bos(rdev);
275
Alex Deucherce8f5372010-05-07 15:10:16 -0400276 if (rdev->irq.installed) {
Matthew Garrett2aba6312010-04-26 15:45:23 -0400277 for (i = 0; i < rdev->num_crtc; i++) {
278 if (rdev->pm.active_crtcs & (1 << i)) {
279 rdev->pm.req_vblank |= (1 << i);
280 drm_vblank_get(rdev->ddev, i);
281 }
282 }
283 }
Alex Deucher539d2412010-04-29 00:22:43 -0400284
Alex Deucherce8f5372010-05-07 15:10:16 -0400285 radeon_set_power_state(rdev);
Alex Deuchera4248162010-04-24 14:50:23 -0400286
Alex Deucherce8f5372010-05-07 15:10:16 -0400287 if (rdev->irq.installed) {
Matthew Garrett2aba6312010-04-26 15:45:23 -0400288 for (i = 0; i < rdev->num_crtc; i++) {
289 if (rdev->pm.req_vblank & (1 << i)) {
290 rdev->pm.req_vblank &= ~(1 << i);
291 drm_vblank_put(rdev->ddev, i);
292 }
293 }
294 }
Matthew Garrett5876dd22010-04-26 15:52:20 -0400295
Alex Deuchera4248162010-04-24 14:50:23 -0400296 /* update display watermarks based on new power state */
297 radeon_update_bandwidth_info(rdev);
298 if (rdev->pm.active_crtc_count)
299 radeon_bandwidth_update(rdev);
300
Alex Deucherce8f5372010-05-07 15:10:16 -0400301 rdev->pm.dynpm_planned_action = DYNPM_ACTION_NONE;
Matthew Garrett2aba6312010-04-26 15:45:23 -0400302
Christian Königd6999bc2012-05-09 15:34:45 +0200303 mutex_unlock(&rdev->ring_lock);
Christian Königdb7fce32012-05-11 14:57:18 +0200304 up_write(&rdev->pm.mclk_lock);
Alex Deuchera4248162010-04-24 14:50:23 -0400305}
306
Rafał Miłeckif712d0c2010-06-07 18:29:44 -0400307static void radeon_pm_print_states(struct radeon_device *rdev)
308{
309 int i, j;
310 struct radeon_power_state *power_state;
311 struct radeon_pm_clock_info *clock_info;
312
Dave Airlied9fdaaf2010-08-02 10:42:55 +1000313 DRM_DEBUG_DRIVER("%d Power State(s)\n", rdev->pm.num_power_states);
Rafał Miłeckif712d0c2010-06-07 18:29:44 -0400314 for (i = 0; i < rdev->pm.num_power_states; i++) {
315 power_state = &rdev->pm.power_state[i];
Dave Airlied9fdaaf2010-08-02 10:42:55 +1000316 DRM_DEBUG_DRIVER("State %d: %s\n", i,
Rafał Miłeckif712d0c2010-06-07 18:29:44 -0400317 radeon_pm_state_type_name[power_state->type]);
318 if (i == rdev->pm.default_power_state_index)
Dave Airlied9fdaaf2010-08-02 10:42:55 +1000319 DRM_DEBUG_DRIVER("\tDefault");
Rafał Miłeckif712d0c2010-06-07 18:29:44 -0400320 if ((rdev->flags & RADEON_IS_PCIE) && !(rdev->flags & RADEON_IS_IGP))
Dave Airlied9fdaaf2010-08-02 10:42:55 +1000321 DRM_DEBUG_DRIVER("\t%d PCIE Lanes\n", power_state->pcie_lanes);
Rafał Miłeckif712d0c2010-06-07 18:29:44 -0400322 if (power_state->flags & RADEON_PM_STATE_SINGLE_DISPLAY_ONLY)
Dave Airlied9fdaaf2010-08-02 10:42:55 +1000323 DRM_DEBUG_DRIVER("\tSingle display only\n");
324 DRM_DEBUG_DRIVER("\t%d Clock Mode(s)\n", power_state->num_clock_modes);
Rafał Miłeckif712d0c2010-06-07 18:29:44 -0400325 for (j = 0; j < power_state->num_clock_modes; j++) {
326 clock_info = &(power_state->clock_info[j]);
327 if (rdev->flags & RADEON_IS_IGP)
Alex Deuchereb2c27a2012-10-01 18:28:09 -0400328 DRM_DEBUG_DRIVER("\t\t%d e: %d\n",
329 j,
330 clock_info->sclk * 10);
Rafał Miłeckif712d0c2010-06-07 18:29:44 -0400331 else
Alex Deuchereb2c27a2012-10-01 18:28:09 -0400332 DRM_DEBUG_DRIVER("\t\t%d e: %d\tm: %d\tv: %d\n",
333 j,
334 clock_info->sclk * 10,
335 clock_info->mclk * 10,
336 clock_info->voltage.voltage);
Rafał Miłeckif712d0c2010-06-07 18:29:44 -0400337 }
338 }
339}
340
Alex Deucherce8f5372010-05-07 15:10:16 -0400341static ssize_t radeon_get_pm_profile(struct device *dev,
342 struct device_attribute *attr,
343 char *buf)
Alex Deuchera4248162010-04-24 14:50:23 -0400344{
Jean Delvare3e4e2122013-09-10 10:30:44 +0200345 struct drm_device *ddev = dev_get_drvdata(dev);
Alex Deuchera4248162010-04-24 14:50:23 -0400346 struct radeon_device *rdev = ddev->dev_private;
Alex Deucherce8f5372010-05-07 15:10:16 -0400347 int cp = rdev->pm.profile;
Alex Deuchera4248162010-04-24 14:50:23 -0400348
Alex Deucherce8f5372010-05-07 15:10:16 -0400349 return snprintf(buf, PAGE_SIZE, "%s\n",
350 (cp == PM_PROFILE_AUTO) ? "auto" :
351 (cp == PM_PROFILE_LOW) ? "low" :
Daniel J Blueman12e27be2010-07-28 12:25:58 +0100352 (cp == PM_PROFILE_MID) ? "mid" :
Alex Deucherce8f5372010-05-07 15:10:16 -0400353 (cp == PM_PROFILE_HIGH) ? "high" : "default");
Alex Deuchera4248162010-04-24 14:50:23 -0400354}
355
Alex Deucherce8f5372010-05-07 15:10:16 -0400356static ssize_t radeon_set_pm_profile(struct device *dev,
357 struct device_attribute *attr,
358 const char *buf,
359 size_t count)
Alex Deuchera4248162010-04-24 14:50:23 -0400360{
Jean Delvare3e4e2122013-09-10 10:30:44 +0200361 struct drm_device *ddev = dev_get_drvdata(dev);
Alex Deuchera4248162010-04-24 14:50:23 -0400362 struct radeon_device *rdev = ddev->dev_private;
Alex Deuchera4248162010-04-24 14:50:23 -0400363
Alex Deucher4f2f2032014-05-19 19:21:29 -0400364 /* Can't set profile when the card is off */
365 if ((rdev->flags & RADEON_IS_PX) &&
366 (ddev->switch_power_state != DRM_SWITCH_POWER_ON))
367 return -EINVAL;
368
Alex Deuchera4248162010-04-24 14:50:23 -0400369 mutex_lock(&rdev->pm.mutex);
Alex Deucherce8f5372010-05-07 15:10:16 -0400370 if (rdev->pm.pm_method == PM_METHOD_PROFILE) {
371 if (strncmp("default", buf, strlen("default")) == 0)
372 rdev->pm.profile = PM_PROFILE_DEFAULT;
373 else if (strncmp("auto", buf, strlen("auto")) == 0)
374 rdev->pm.profile = PM_PROFILE_AUTO;
375 else if (strncmp("low", buf, strlen("low")) == 0)
376 rdev->pm.profile = PM_PROFILE_LOW;
Alex Deucherc9e75b22010-06-02 17:56:01 -0400377 else if (strncmp("mid", buf, strlen("mid")) == 0)
378 rdev->pm.profile = PM_PROFILE_MID;
Alex Deucherce8f5372010-05-07 15:10:16 -0400379 else if (strncmp("high", buf, strlen("high")) == 0)
380 rdev->pm.profile = PM_PROFILE_HIGH;
381 else {
Thomas Renninger1783e4b2011-03-23 15:14:09 +0000382 count = -EINVAL;
Alex Deucherce8f5372010-05-07 15:10:16 -0400383 goto fail;
Alex Deuchera4248162010-04-24 14:50:23 -0400384 }
Alex Deucherce8f5372010-05-07 15:10:16 -0400385 radeon_pm_update_profile(rdev);
386 radeon_pm_set_clocks(rdev);
Thomas Renninger1783e4b2011-03-23 15:14:09 +0000387 } else
388 count = -EINVAL;
389
Alex Deucherce8f5372010-05-07 15:10:16 -0400390fail:
Alex Deuchera4248162010-04-24 14:50:23 -0400391 mutex_unlock(&rdev->pm.mutex);
392
393 return count;
394}
395
Alex Deucherce8f5372010-05-07 15:10:16 -0400396static ssize_t radeon_get_pm_method(struct device *dev,
397 struct device_attribute *attr,
398 char *buf)
Alex Deuchera4248162010-04-24 14:50:23 -0400399{
Jean Delvare3e4e2122013-09-10 10:30:44 +0200400 struct drm_device *ddev = dev_get_drvdata(dev);
Alex Deuchera4248162010-04-24 14:50:23 -0400401 struct radeon_device *rdev = ddev->dev_private;
Alex Deucherce8f5372010-05-07 15:10:16 -0400402 int pm = rdev->pm.pm_method;
Alex Deuchera4248162010-04-24 14:50:23 -0400403
404 return snprintf(buf, PAGE_SIZE, "%s\n",
Alex Deucherda321c82013-04-12 13:55:22 -0400405 (pm == PM_METHOD_DYNPM) ? "dynpm" :
406 (pm == PM_METHOD_PROFILE) ? "profile" : "dpm");
Alex Deuchera4248162010-04-24 14:50:23 -0400407}
408
Alex Deucherce8f5372010-05-07 15:10:16 -0400409static ssize_t radeon_set_pm_method(struct device *dev,
410 struct device_attribute *attr,
411 const char *buf,
412 size_t count)
Alex Deuchera4248162010-04-24 14:50:23 -0400413{
Jean Delvare3e4e2122013-09-10 10:30:44 +0200414 struct drm_device *ddev = dev_get_drvdata(dev);
Alex Deuchera4248162010-04-24 14:50:23 -0400415 struct radeon_device *rdev = ddev->dev_private;
Alex Deuchera4248162010-04-24 14:50:23 -0400416
Alex Deucher4f2f2032014-05-19 19:21:29 -0400417 /* Can't set method when the card is off */
418 if ((rdev->flags & RADEON_IS_PX) &&
419 (ddev->switch_power_state != DRM_SWITCH_POWER_ON)) {
420 count = -EINVAL;
421 goto fail;
422 }
423
Alex Deucherda321c82013-04-12 13:55:22 -0400424 /* we don't support the legacy modes with dpm */
425 if (rdev->pm.pm_method == PM_METHOD_DPM) {
426 count = -EINVAL;
427 goto fail;
428 }
Alex Deucherce8f5372010-05-07 15:10:16 -0400429
430 if (strncmp("dynpm", buf, strlen("dynpm")) == 0) {
Alex Deuchera4248162010-04-24 14:50:23 -0400431 mutex_lock(&rdev->pm.mutex);
Alex Deucherce8f5372010-05-07 15:10:16 -0400432 rdev->pm.pm_method = PM_METHOD_DYNPM;
433 rdev->pm.dynpm_state = DYNPM_STATE_PAUSED;
434 rdev->pm.dynpm_planned_action = DYNPM_ACTION_DEFAULT;
Alex Deuchera4248162010-04-24 14:50:23 -0400435 mutex_unlock(&rdev->pm.mutex);
Alex Deucherce8f5372010-05-07 15:10:16 -0400436 } else if (strncmp("profile", buf, strlen("profile")) == 0) {
437 mutex_lock(&rdev->pm.mutex);
Alex Deucherce8f5372010-05-07 15:10:16 -0400438 /* disable dynpm */
439 rdev->pm.dynpm_state = DYNPM_STATE_DISABLED;
440 rdev->pm.dynpm_planned_action = DYNPM_ACTION_NONE;
Rafael J. Wysocki3f53eb62010-06-17 23:02:27 +0000441 rdev->pm.pm_method = PM_METHOD_PROFILE;
Alex Deucherce8f5372010-05-07 15:10:16 -0400442 mutex_unlock(&rdev->pm.mutex);
Tejun Heo32c87fc2011-01-03 14:49:32 +0100443 cancel_delayed_work_sync(&rdev->pm.dynpm_idle_work);
Alex Deucherce8f5372010-05-07 15:10:16 -0400444 } else {
Thomas Renninger1783e4b2011-03-23 15:14:09 +0000445 count = -EINVAL;
Alex Deucherce8f5372010-05-07 15:10:16 -0400446 goto fail;
447 }
448 radeon_pm_compute_clocks(rdev);
449fail:
Alex Deuchera4248162010-04-24 14:50:23 -0400450 return count;
451}
452
Alex Deucherda321c82013-04-12 13:55:22 -0400453static ssize_t radeon_get_dpm_state(struct device *dev,
454 struct device_attribute *attr,
455 char *buf)
456{
Jean Delvare3e4e2122013-09-10 10:30:44 +0200457 struct drm_device *ddev = dev_get_drvdata(dev);
Alex Deucherda321c82013-04-12 13:55:22 -0400458 struct radeon_device *rdev = ddev->dev_private;
459 enum radeon_pm_state_type pm = rdev->pm.dpm.user_state;
460
461 return snprintf(buf, PAGE_SIZE, "%s\n",
462 (pm == POWER_STATE_TYPE_BATTERY) ? "battery" :
463 (pm == POWER_STATE_TYPE_BALANCED) ? "balanced" : "performance");
464}
465
466static ssize_t radeon_set_dpm_state(struct device *dev,
467 struct device_attribute *attr,
468 const char *buf,
469 size_t count)
470{
Jean Delvare3e4e2122013-09-10 10:30:44 +0200471 struct drm_device *ddev = dev_get_drvdata(dev);
Alex Deucherda321c82013-04-12 13:55:22 -0400472 struct radeon_device *rdev = ddev->dev_private;
473
474 mutex_lock(&rdev->pm.mutex);
475 if (strncmp("battery", buf, strlen("battery")) == 0)
476 rdev->pm.dpm.user_state = POWER_STATE_TYPE_BATTERY;
477 else if (strncmp("balanced", buf, strlen("balanced")) == 0)
478 rdev->pm.dpm.user_state = POWER_STATE_TYPE_BALANCED;
479 else if (strncmp("performance", buf, strlen("performance")) == 0)
480 rdev->pm.dpm.user_state = POWER_STATE_TYPE_PERFORMANCE;
481 else {
482 mutex_unlock(&rdev->pm.mutex);
483 count = -EINVAL;
484 goto fail;
485 }
486 mutex_unlock(&rdev->pm.mutex);
Pali Rohárb07a6572014-08-11 19:01:58 +0200487
488 /* Can't set dpm state when the card is off */
489 if (!(rdev->flags & RADEON_IS_PX) ||
490 (ddev->switch_power_state == DRM_SWITCH_POWER_ON))
491 radeon_pm_compute_clocks(rdev);
492
Alex Deucherda321c82013-04-12 13:55:22 -0400493fail:
494 return count;
495}
496
Alex Deucher70d01a52013-07-02 18:38:02 -0400497static ssize_t radeon_get_dpm_forced_performance_level(struct device *dev,
498 struct device_attribute *attr,
499 char *buf)
500{
Jean Delvare3e4e2122013-09-10 10:30:44 +0200501 struct drm_device *ddev = dev_get_drvdata(dev);
Alex Deucher70d01a52013-07-02 18:38:02 -0400502 struct radeon_device *rdev = ddev->dev_private;
503 enum radeon_dpm_forced_level level = rdev->pm.dpm.forced_level;
504
Alex Deucher4f2f2032014-05-19 19:21:29 -0400505 if ((rdev->flags & RADEON_IS_PX) &&
506 (ddev->switch_power_state != DRM_SWITCH_POWER_ON))
507 return snprintf(buf, PAGE_SIZE, "off\n");
508
Alex Deucher70d01a52013-07-02 18:38:02 -0400509 return snprintf(buf, PAGE_SIZE, "%s\n",
510 (level == RADEON_DPM_FORCED_LEVEL_AUTO) ? "auto" :
511 (level == RADEON_DPM_FORCED_LEVEL_LOW) ? "low" : "high");
512}
513
514static ssize_t radeon_set_dpm_forced_performance_level(struct device *dev,
515 struct device_attribute *attr,
516 const char *buf,
517 size_t count)
518{
Jean Delvare3e4e2122013-09-10 10:30:44 +0200519 struct drm_device *ddev = dev_get_drvdata(dev);
Alex Deucher70d01a52013-07-02 18:38:02 -0400520 struct radeon_device *rdev = ddev->dev_private;
521 enum radeon_dpm_forced_level level;
522 int ret = 0;
523
Alex Deucher4f2f2032014-05-19 19:21:29 -0400524 /* Can't force performance level when the card is off */
525 if ((rdev->flags & RADEON_IS_PX) &&
526 (ddev->switch_power_state != DRM_SWITCH_POWER_ON))
527 return -EINVAL;
528
Alex Deucher70d01a52013-07-02 18:38:02 -0400529 mutex_lock(&rdev->pm.mutex);
530 if (strncmp("low", buf, strlen("low")) == 0) {
531 level = RADEON_DPM_FORCED_LEVEL_LOW;
532 } else if (strncmp("high", buf, strlen("high")) == 0) {
533 level = RADEON_DPM_FORCED_LEVEL_HIGH;
534 } else if (strncmp("auto", buf, strlen("auto")) == 0) {
535 level = RADEON_DPM_FORCED_LEVEL_AUTO;
536 } else {
Alex Deucher70d01a52013-07-02 18:38:02 -0400537 count = -EINVAL;
538 goto fail;
539 }
540 if (rdev->asic->dpm.force_performance_level) {
Alex Deucher0a17af372013-10-23 17:22:29 -0400541 if (rdev->pm.dpm.thermal_active) {
542 count = -EINVAL;
543 goto fail;
544 }
Alex Deucher70d01a52013-07-02 18:38:02 -0400545 ret = radeon_dpm_force_performance_level(rdev, level);
546 if (ret)
547 count = -EINVAL;
548 }
Alex Deucher70d01a52013-07-02 18:38:02 -0400549fail:
Alex Deucher0a17af372013-10-23 17:22:29 -0400550 mutex_unlock(&rdev->pm.mutex);
551
Alex Deucher70d01a52013-07-02 18:38:02 -0400552 return count;
553}
554
Oleg Chernovskiy99736702014-12-08 00:10:45 +0300555static ssize_t radeon_hwmon_get_pwm1_enable(struct device *dev,
556 struct device_attribute *attr,
557 char *buf)
558{
559 struct radeon_device *rdev = dev_get_drvdata(dev);
560 u32 pwm_mode = 0;
561
562 if (rdev->asic->dpm.fan_ctrl_get_mode)
563 pwm_mode = rdev->asic->dpm.fan_ctrl_get_mode(rdev);
564
565 /* never 0 (full-speed), fuse or smc-controlled always */
566 return sprintf(buf, "%i\n", pwm_mode == FDO_PWM_MODE_STATIC ? 1 : 2);
567}
568
569static ssize_t radeon_hwmon_set_pwm1_enable(struct device *dev,
570 struct device_attribute *attr,
571 const char *buf,
572 size_t count)
573{
574 struct radeon_device *rdev = dev_get_drvdata(dev);
575 int err;
576 int value;
577
578 if(!rdev->asic->dpm.fan_ctrl_set_mode)
579 return -EINVAL;
580
581 err = kstrtoint(buf, 10, &value);
582 if (err)
583 return err;
584
Alex Deucher082452e2015-02-04 17:18:55 -0500585 switch (value) {
Oleg Chernovskiy99736702014-12-08 00:10:45 +0300586 case 1: /* manual, percent-based */
587 rdev->asic->dpm.fan_ctrl_set_mode(rdev, FDO_PWM_MODE_STATIC);
588 break;
589 default: /* disable */
590 rdev->asic->dpm.fan_ctrl_set_mode(rdev, 0);
591 break;
592 }
593
594 return count;
595}
596
597static ssize_t radeon_hwmon_get_pwm1_min(struct device *dev,
598 struct device_attribute *attr,
599 char *buf)
600{
601 return sprintf(buf, "%i\n", 0);
602}
603
604static ssize_t radeon_hwmon_get_pwm1_max(struct device *dev,
605 struct device_attribute *attr,
606 char *buf)
607{
Alex Deucher082452e2015-02-04 17:18:55 -0500608 return sprintf(buf, "%i\n", 255);
Oleg Chernovskiy99736702014-12-08 00:10:45 +0300609}
610
611static ssize_t radeon_hwmon_set_pwm1(struct device *dev,
612 struct device_attribute *attr,
613 const char *buf, size_t count)
614{
615 struct radeon_device *rdev = dev_get_drvdata(dev);
616 int err;
617 u32 value;
618
619 err = kstrtou32(buf, 10, &value);
620 if (err)
621 return err;
622
Alex Deucher082452e2015-02-04 17:18:55 -0500623 value = (value * 100) / 255;
624
Oleg Chernovskiy99736702014-12-08 00:10:45 +0300625 err = rdev->asic->dpm.set_fan_speed_percent(rdev, value);
626 if (err)
627 return err;
628
629 return count;
630}
631
632static ssize_t radeon_hwmon_get_pwm1(struct device *dev,
633 struct device_attribute *attr,
634 char *buf)
635{
636 struct radeon_device *rdev = dev_get_drvdata(dev);
637 int err;
638 u32 speed;
639
640 err = rdev->asic->dpm.get_fan_speed_percent(rdev, &speed);
641 if (err)
642 return err;
643
Alex Deucher082452e2015-02-04 17:18:55 -0500644 speed = (speed * 255) / 100;
645
Oleg Chernovskiy99736702014-12-08 00:10:45 +0300646 return sprintf(buf, "%i\n", speed);
647}
648
Alex Deucherce8f5372010-05-07 15:10:16 -0400649static DEVICE_ATTR(power_profile, S_IRUGO | S_IWUSR, radeon_get_pm_profile, radeon_set_pm_profile);
650static DEVICE_ATTR(power_method, S_IRUGO | S_IWUSR, radeon_get_pm_method, radeon_set_pm_method);
Alex Deucherda321c82013-04-12 13:55:22 -0400651static DEVICE_ATTR(power_dpm_state, S_IRUGO | S_IWUSR, radeon_get_dpm_state, radeon_set_dpm_state);
Alex Deucher70d01a52013-07-02 18:38:02 -0400652static DEVICE_ATTR(power_dpm_force_performance_level, S_IRUGO | S_IWUSR,
653 radeon_get_dpm_forced_performance_level,
654 radeon_set_dpm_forced_performance_level);
Alex Deuchera4248162010-04-24 14:50:23 -0400655
Alex Deucher21a81222010-07-02 12:58:16 -0400656static ssize_t radeon_hwmon_show_temp(struct device *dev,
657 struct device_attribute *attr,
658 char *buf)
659{
Guenter Roeckec39f642013-11-22 21:52:00 -0800660 struct radeon_device *rdev = dev_get_drvdata(dev);
Alex Deucher4f2f2032014-05-19 19:21:29 -0400661 struct drm_device *ddev = rdev->ddev;
Alex Deucher20d391d2011-02-01 16:12:34 -0500662 int temp;
Alex Deucher21a81222010-07-02 12:58:16 -0400663
Alex Deucher4f2f2032014-05-19 19:21:29 -0400664 /* Can't get temperature when the card is off */
665 if ((rdev->flags & RADEON_IS_PX) &&
666 (ddev->switch_power_state != DRM_SWITCH_POWER_ON))
667 return -EINVAL;
668
Alex Deucher6bd1c382013-06-21 14:38:03 -0400669 if (rdev->asic->pm.get_temperature)
670 temp = radeon_get_temperature(rdev);
671 else
Alex Deucher21a81222010-07-02 12:58:16 -0400672 temp = 0;
Alex Deucher21a81222010-07-02 12:58:16 -0400673
674 return snprintf(buf, PAGE_SIZE, "%d\n", temp);
675}
676
Jean Delvare6ea4e842013-09-10 10:32:41 +0200677static ssize_t radeon_hwmon_show_temp_thresh(struct device *dev,
678 struct device_attribute *attr,
679 char *buf)
680{
Sergey Senozhatskye4158f12013-12-13 02:25:57 +0300681 struct radeon_device *rdev = dev_get_drvdata(dev);
Jean Delvare6ea4e842013-09-10 10:32:41 +0200682 int hyst = to_sensor_dev_attr(attr)->index;
683 int temp;
684
685 if (hyst)
686 temp = rdev->pm.dpm.thermal.min_temp;
687 else
688 temp = rdev->pm.dpm.thermal.max_temp;
689
690 return snprintf(buf, PAGE_SIZE, "%d\n", temp);
691}
692
Alex Deucher21a81222010-07-02 12:58:16 -0400693static SENSOR_DEVICE_ATTR(temp1_input, S_IRUGO, radeon_hwmon_show_temp, NULL, 0);
Jean Delvare6ea4e842013-09-10 10:32:41 +0200694static SENSOR_DEVICE_ATTR(temp1_crit, S_IRUGO, radeon_hwmon_show_temp_thresh, NULL, 0);
695static SENSOR_DEVICE_ATTR(temp1_crit_hyst, S_IRUGO, radeon_hwmon_show_temp_thresh, NULL, 1);
Oleg Chernovskiy99736702014-12-08 00:10:45 +0300696static SENSOR_DEVICE_ATTR(pwm1, S_IRUGO | S_IWUSR, radeon_hwmon_get_pwm1, radeon_hwmon_set_pwm1, 0);
697static SENSOR_DEVICE_ATTR(pwm1_enable, S_IRUGO | S_IWUSR, radeon_hwmon_get_pwm1_enable, radeon_hwmon_set_pwm1_enable, 0);
698static SENSOR_DEVICE_ATTR(pwm1_min, S_IRUGO, radeon_hwmon_get_pwm1_min, NULL, 0);
699static SENSOR_DEVICE_ATTR(pwm1_max, S_IRUGO, radeon_hwmon_get_pwm1_max, NULL, 0);
700
Alex Deucher21a81222010-07-02 12:58:16 -0400701
702static struct attribute *hwmon_attributes[] = {
703 &sensor_dev_attr_temp1_input.dev_attr.attr,
Jean Delvare6ea4e842013-09-10 10:32:41 +0200704 &sensor_dev_attr_temp1_crit.dev_attr.attr,
705 &sensor_dev_attr_temp1_crit_hyst.dev_attr.attr,
Oleg Chernovskiy99736702014-12-08 00:10:45 +0300706 &sensor_dev_attr_pwm1.dev_attr.attr,
707 &sensor_dev_attr_pwm1_enable.dev_attr.attr,
708 &sensor_dev_attr_pwm1_min.dev_attr.attr,
709 &sensor_dev_attr_pwm1_max.dev_attr.attr,
Alex Deucher21a81222010-07-02 12:58:16 -0400710 NULL
711};
712
Jean Delvare6ea4e842013-09-10 10:32:41 +0200713static umode_t hwmon_attributes_visible(struct kobject *kobj,
714 struct attribute *attr, int index)
715{
716 struct device *dev = container_of(kobj, struct device, kobj);
Sergey Senozhatskye4158f12013-12-13 02:25:57 +0300717 struct radeon_device *rdev = dev_get_drvdata(dev);
Oleg Chernovskiy99736702014-12-08 00:10:45 +0300718 umode_t effective_mode = attr->mode;
Jean Delvare6ea4e842013-09-10 10:32:41 +0200719
Alex Deucher2a7d44f2015-10-19 09:30:42 -0400720 /* Skip attributes if DPM is not enabled */
Jean Delvare6ea4e842013-09-10 10:32:41 +0200721 if (rdev->pm.pm_method != PM_METHOD_DPM &&
722 (attr == &sensor_dev_attr_temp1_crit.dev_attr.attr ||
Alex Deucher2a7d44f2015-10-19 09:30:42 -0400723 attr == &sensor_dev_attr_temp1_crit_hyst.dev_attr.attr ||
724 attr == &sensor_dev_attr_pwm1.dev_attr.attr ||
725 attr == &sensor_dev_attr_pwm1_enable.dev_attr.attr ||
726 attr == &sensor_dev_attr_pwm1_max.dev_attr.attr ||
727 attr == &sensor_dev_attr_pwm1_min.dev_attr.attr))
Jean Delvare6ea4e842013-09-10 10:32:41 +0200728 return 0;
729
Oleg Chernovskiy99736702014-12-08 00:10:45 +0300730 /* Skip fan attributes if fan is not present */
731 if (rdev->pm.no_fan &&
732 (attr == &sensor_dev_attr_pwm1.dev_attr.attr ||
733 attr == &sensor_dev_attr_pwm1_enable.dev_attr.attr ||
734 attr == &sensor_dev_attr_pwm1_max.dev_attr.attr ||
735 attr == &sensor_dev_attr_pwm1_min.dev_attr.attr))
736 return 0;
737
738 /* mask fan attributes if we have no bindings for this asic to expose */
739 if ((!rdev->asic->dpm.get_fan_speed_percent &&
740 attr == &sensor_dev_attr_pwm1.dev_attr.attr) || /* can't query fan */
741 (!rdev->asic->dpm.fan_ctrl_get_mode &&
742 attr == &sensor_dev_attr_pwm1_enable.dev_attr.attr)) /* can't query state */
743 effective_mode &= ~S_IRUGO;
744
745 if ((!rdev->asic->dpm.set_fan_speed_percent &&
746 attr == &sensor_dev_attr_pwm1.dev_attr.attr) || /* can't manage fan */
747 (!rdev->asic->dpm.fan_ctrl_set_mode &&
748 attr == &sensor_dev_attr_pwm1_enable.dev_attr.attr)) /* can't manage state */
749 effective_mode &= ~S_IWUSR;
750
751 /* hide max/min values if we can't both query and manage the fan */
752 if ((!rdev->asic->dpm.set_fan_speed_percent &&
753 !rdev->asic->dpm.get_fan_speed_percent) &&
754 (attr == &sensor_dev_attr_pwm1_max.dev_attr.attr ||
755 attr == &sensor_dev_attr_pwm1_min.dev_attr.attr))
756 return 0;
757
758 return effective_mode;
Jean Delvare6ea4e842013-09-10 10:32:41 +0200759}
760
Alex Deucher21a81222010-07-02 12:58:16 -0400761static const struct attribute_group hwmon_attrgroup = {
762 .attrs = hwmon_attributes,
Jean Delvare6ea4e842013-09-10 10:32:41 +0200763 .is_visible = hwmon_attributes_visible,
Alex Deucher21a81222010-07-02 12:58:16 -0400764};
765
Guenter Roeckec39f642013-11-22 21:52:00 -0800766static const struct attribute_group *hwmon_groups[] = {
767 &hwmon_attrgroup,
768 NULL
769};
770
Dan Carpenter0d18abe2010-08-09 21:59:42 +0200771static int radeon_hwmon_init(struct radeon_device *rdev)
Alex Deucher21a81222010-07-02 12:58:16 -0400772{
Dan Carpenter0d18abe2010-08-09 21:59:42 +0200773 int err = 0;
Alex Deucher21a81222010-07-02 12:58:16 -0400774
775 switch (rdev->pm.int_thermal_type) {
776 case THERMAL_TYPE_RV6XX:
777 case THERMAL_TYPE_RV770:
778 case THERMAL_TYPE_EVERGREEN:
Alex Deucher457558e2011-05-25 17:49:54 -0400779 case THERMAL_TYPE_NI:
Alex Deuchere33df252010-11-22 17:56:32 -0500780 case THERMAL_TYPE_SUMO:
Alex Deucher1bd47d22012-03-20 17:18:10 -0400781 case THERMAL_TYPE_SI:
Alex Deucher286d9cc2013-06-21 15:50:47 -0400782 case THERMAL_TYPE_CI:
783 case THERMAL_TYPE_KV:
Alex Deucher6bd1c382013-06-21 14:38:03 -0400784 if (rdev->asic->pm.get_temperature == NULL)
Alex Deucher5d7486c2012-03-20 17:18:29 -0400785 return err;
Alex Deuchercb3e4e72014-04-15 12:44:32 -0400786 rdev->pm.int_hwmon_dev = hwmon_device_register_with_groups(rdev->dev,
787 "radeon", rdev,
788 hwmon_groups);
789 if (IS_ERR(rdev->pm.int_hwmon_dev)) {
790 err = PTR_ERR(rdev->pm.int_hwmon_dev);
Dan Carpenter0d18abe2010-08-09 21:59:42 +0200791 dev_err(rdev->dev,
792 "Unable to register hwmon device: %d\n", err);
Dan Carpenter0d18abe2010-08-09 21:59:42 +0200793 }
Alex Deucher21a81222010-07-02 12:58:16 -0400794 break;
795 default:
796 break;
797 }
Dan Carpenter0d18abe2010-08-09 21:59:42 +0200798
799 return err;
Alex Deucher21a81222010-07-02 12:58:16 -0400800}
801
Alex Deuchercb3e4e72014-04-15 12:44:32 -0400802static void radeon_hwmon_fini(struct radeon_device *rdev)
803{
804 if (rdev->pm.int_hwmon_dev)
805 hwmon_device_unregister(rdev->pm.int_hwmon_dev);
806}
807
Alex Deucherda321c82013-04-12 13:55:22 -0400808static void radeon_dpm_thermal_work_handler(struct work_struct *work)
809{
810 struct radeon_device *rdev =
811 container_of(work, struct radeon_device,
812 pm.dpm.thermal.work);
813 /* switch to the thermal state */
814 enum radeon_pm_state_type dpm_state = POWER_STATE_TYPE_INTERNAL_THERMAL;
815
816 if (!rdev->pm.dpm_enabled)
817 return;
818
819 if (rdev->asic->pm.get_temperature) {
820 int temp = radeon_get_temperature(rdev);
821
822 if (temp < rdev->pm.dpm.thermal.min_temp)
823 /* switch back the user state */
824 dpm_state = rdev->pm.dpm.user_state;
825 } else {
826 if (rdev->pm.dpm.thermal.high_to_low)
827 /* switch back the user state */
828 dpm_state = rdev->pm.dpm.user_state;
829 }
Alex Deucher60320342013-07-24 14:59:48 -0400830 mutex_lock(&rdev->pm.mutex);
831 if (dpm_state == POWER_STATE_TYPE_INTERNAL_THERMAL)
832 rdev->pm.dpm.thermal_active = true;
833 else
834 rdev->pm.dpm.thermal_active = false;
835 rdev->pm.dpm.state = dpm_state;
836 mutex_unlock(&rdev->pm.mutex);
837
838 radeon_pm_compute_clocks(rdev);
Alex Deucherda321c82013-04-12 13:55:22 -0400839}
840
Alex Deucher3899ca82015-03-18 17:05:10 -0400841static bool radeon_dpm_single_display(struct radeon_device *rdev)
Alex Deucherda321c82013-04-12 13:55:22 -0400842{
Alex Deucher48783062013-07-08 11:35:06 -0400843 bool single_display = (rdev->pm.dpm.new_active_crtc_count < 2) ?
844 true : false;
845
846 /* check if the vblank period is too short to adjust the mclk */
847 if (single_display && rdev->asic->dpm.vblank_too_short) {
848 if (radeon_dpm_vblank_too_short(rdev))
849 single_display = false;
850 }
Alex Deucherda321c82013-04-12 13:55:22 -0400851
Alex Deucher951caa62015-02-18 00:59:45 -0500852 /* 120hz tends to be problematic even if they are under the
853 * vblank limit.
854 */
855 if (single_display && (r600_dpm_get_vrefresh(rdev) >= 120))
856 single_display = false;
857
Alex Deucher3899ca82015-03-18 17:05:10 -0400858 return single_display;
859}
860
861static struct radeon_ps *radeon_dpm_pick_power_state(struct radeon_device *rdev,
862 enum radeon_pm_state_type dpm_state)
863{
864 int i;
865 struct radeon_ps *ps;
866 u32 ui_class;
867 bool single_display = radeon_dpm_single_display(rdev);
868
Alex Deucheredcaa5b2013-07-05 11:48:31 -0400869 /* certain older asics have a separare 3D performance state,
870 * so try that first if the user selected performance
871 */
872 if (dpm_state == POWER_STATE_TYPE_PERFORMANCE)
873 dpm_state = POWER_STATE_TYPE_INTERNAL_3DPERF;
Alex Deucherda321c82013-04-12 13:55:22 -0400874 /* balanced states don't exist at the moment */
875 if (dpm_state == POWER_STATE_TYPE_BALANCED)
876 dpm_state = POWER_STATE_TYPE_PERFORMANCE;
877
Alex Deucheredcaa5b2013-07-05 11:48:31 -0400878restart_search:
Alex Deucherda321c82013-04-12 13:55:22 -0400879 /* Pick the best power state based on current conditions */
880 for (i = 0; i < rdev->pm.dpm.num_ps; i++) {
881 ps = &rdev->pm.dpm.ps[i];
882 ui_class = ps->class & ATOM_PPLIB_CLASSIFICATION_UI_MASK;
883 switch (dpm_state) {
884 /* user states */
885 case POWER_STATE_TYPE_BATTERY:
886 if (ui_class == ATOM_PPLIB_CLASSIFICATION_UI_BATTERY) {
887 if (ps->caps & ATOM_PPLIB_SINGLE_DISPLAY_ONLY) {
Alex Deucher48783062013-07-08 11:35:06 -0400888 if (single_display)
Alex Deucherda321c82013-04-12 13:55:22 -0400889 return ps;
890 } else
891 return ps;
892 }
893 break;
894 case POWER_STATE_TYPE_BALANCED:
895 if (ui_class == ATOM_PPLIB_CLASSIFICATION_UI_BALANCED) {
896 if (ps->caps & ATOM_PPLIB_SINGLE_DISPLAY_ONLY) {
Alex Deucher48783062013-07-08 11:35:06 -0400897 if (single_display)
Alex Deucherda321c82013-04-12 13:55:22 -0400898 return ps;
899 } else
900 return ps;
901 }
902 break;
903 case POWER_STATE_TYPE_PERFORMANCE:
904 if (ui_class == ATOM_PPLIB_CLASSIFICATION_UI_PERFORMANCE) {
905 if (ps->caps & ATOM_PPLIB_SINGLE_DISPLAY_ONLY) {
Alex Deucher48783062013-07-08 11:35:06 -0400906 if (single_display)
Alex Deucherda321c82013-04-12 13:55:22 -0400907 return ps;
908 } else
909 return ps;
910 }
911 break;
912 /* internal states */
913 case POWER_STATE_TYPE_INTERNAL_UVD:
Alex Deucherd4d32782013-06-11 17:55:39 -0400914 if (rdev->pm.dpm.uvd_ps)
915 return rdev->pm.dpm.uvd_ps;
916 else
917 break;
Alex Deucherda321c82013-04-12 13:55:22 -0400918 case POWER_STATE_TYPE_INTERNAL_UVD_SD:
919 if (ps->class & ATOM_PPLIB_CLASSIFICATION_SDSTATE)
920 return ps;
921 break;
922 case POWER_STATE_TYPE_INTERNAL_UVD_HD:
923 if (ps->class & ATOM_PPLIB_CLASSIFICATION_HDSTATE)
924 return ps;
925 break;
926 case POWER_STATE_TYPE_INTERNAL_UVD_HD2:
927 if (ps->class & ATOM_PPLIB_CLASSIFICATION_HD2STATE)
928 return ps;
929 break;
930 case POWER_STATE_TYPE_INTERNAL_UVD_MVC:
931 if (ps->class2 & ATOM_PPLIB_CLASSIFICATION2_MVC)
932 return ps;
933 break;
934 case POWER_STATE_TYPE_INTERNAL_BOOT:
935 return rdev->pm.dpm.boot_ps;
936 case POWER_STATE_TYPE_INTERNAL_THERMAL:
937 if (ps->class & ATOM_PPLIB_CLASSIFICATION_THERMAL)
938 return ps;
939 break;
940 case POWER_STATE_TYPE_INTERNAL_ACPI:
941 if (ps->class & ATOM_PPLIB_CLASSIFICATION_ACPI)
942 return ps;
943 break;
944 case POWER_STATE_TYPE_INTERNAL_ULV:
945 if (ps->class2 & ATOM_PPLIB_CLASSIFICATION2_ULV)
946 return ps;
947 break;
Alex Deucheredcaa5b2013-07-05 11:48:31 -0400948 case POWER_STATE_TYPE_INTERNAL_3DPERF:
949 if (ps->class & ATOM_PPLIB_CLASSIFICATION_3DPERFORMANCE)
950 return ps;
951 break;
Alex Deucherda321c82013-04-12 13:55:22 -0400952 default:
953 break;
954 }
955 }
956 /* use a fallback state if we didn't match */
957 switch (dpm_state) {
958 case POWER_STATE_TYPE_INTERNAL_UVD_SD:
Alex Deucherce3537d2013-07-24 12:12:49 -0400959 dpm_state = POWER_STATE_TYPE_INTERNAL_UVD_HD;
960 goto restart_search;
Alex Deucherda321c82013-04-12 13:55:22 -0400961 case POWER_STATE_TYPE_INTERNAL_UVD_HD:
962 case POWER_STATE_TYPE_INTERNAL_UVD_HD2:
963 case POWER_STATE_TYPE_INTERNAL_UVD_MVC:
Alex Deucherd4d32782013-06-11 17:55:39 -0400964 if (rdev->pm.dpm.uvd_ps) {
965 return rdev->pm.dpm.uvd_ps;
966 } else {
967 dpm_state = POWER_STATE_TYPE_PERFORMANCE;
968 goto restart_search;
969 }
Alex Deucherda321c82013-04-12 13:55:22 -0400970 case POWER_STATE_TYPE_INTERNAL_THERMAL:
971 dpm_state = POWER_STATE_TYPE_INTERNAL_ACPI;
972 goto restart_search;
973 case POWER_STATE_TYPE_INTERNAL_ACPI:
974 dpm_state = POWER_STATE_TYPE_BATTERY;
975 goto restart_search;
976 case POWER_STATE_TYPE_BATTERY:
Alex Deucheredcaa5b2013-07-05 11:48:31 -0400977 case POWER_STATE_TYPE_BALANCED:
978 case POWER_STATE_TYPE_INTERNAL_3DPERF:
Alex Deucherda321c82013-04-12 13:55:22 -0400979 dpm_state = POWER_STATE_TYPE_PERFORMANCE;
980 goto restart_search;
981 default:
982 break;
983 }
984
985 return NULL;
986}
987
988static void radeon_dpm_change_power_state_locked(struct radeon_device *rdev)
989{
990 int i;
991 struct radeon_ps *ps;
992 enum radeon_pm_state_type dpm_state;
Alex Deucher84dd1922013-01-16 12:52:04 -0500993 int ret;
Alex Deucher3899ca82015-03-18 17:05:10 -0400994 bool single_display = radeon_dpm_single_display(rdev);
Alex Deucherda321c82013-04-12 13:55:22 -0400995
996 /* if dpm init failed */
997 if (!rdev->pm.dpm_enabled)
998 return;
999
1000 if (rdev->pm.dpm.user_state != rdev->pm.dpm.state) {
1001 /* add other state override checks here */
Alex Deucher8a227552013-06-21 15:12:57 -04001002 if ((!rdev->pm.dpm.thermal_active) &&
1003 (!rdev->pm.dpm.uvd_active))
Alex Deucherda321c82013-04-12 13:55:22 -04001004 rdev->pm.dpm.state = rdev->pm.dpm.user_state;
1005 }
1006 dpm_state = rdev->pm.dpm.state;
1007
1008 ps = radeon_dpm_pick_power_state(rdev, dpm_state);
1009 if (ps)
Alex Deucher89c9bc52013-01-16 14:40:26 -05001010 rdev->pm.dpm.requested_ps = ps;
Alex Deucherda321c82013-04-12 13:55:22 -04001011 else
1012 return;
1013
Alex Deucherd22b7e42012-11-29 19:27:56 -05001014 /* no need to reprogram if nothing changed unless we are on BTC+ */
Alex Deucherda321c82013-04-12 13:55:22 -04001015 if (rdev->pm.dpm.current_ps == rdev->pm.dpm.requested_ps) {
Alex Deucherb62d6282013-08-20 20:29:05 -04001016 /* vce just modifies an existing state so force a change */
1017 if (ps->vce_active != rdev->pm.dpm.vce_active)
1018 goto force;
Alex Deucher3899ca82015-03-18 17:05:10 -04001019 /* user has made a display change (such as timing) */
1020 if (rdev->pm.dpm.single_display != single_display)
1021 goto force;
Alex Deucherd22b7e42012-11-29 19:27:56 -05001022 if ((rdev->family < CHIP_BARTS) || (rdev->flags & RADEON_IS_IGP)) {
1023 /* for pre-BTC and APUs if the num crtcs changed but state is the same,
1024 * all we need to do is update the display configuration.
1025 */
1026 if (rdev->pm.dpm.new_active_crtcs != rdev->pm.dpm.current_active_crtcs) {
1027 /* update display watermarks based on new power state */
1028 radeon_bandwidth_update(rdev);
1029 /* update displays */
1030 radeon_dpm_display_configuration_changed(rdev);
1031 rdev->pm.dpm.current_active_crtcs = rdev->pm.dpm.new_active_crtcs;
1032 rdev->pm.dpm.current_active_crtc_count = rdev->pm.dpm.new_active_crtc_count;
1033 }
1034 return;
1035 } else {
1036 /* for BTC+ if the num crtcs hasn't changed and state is the same,
1037 * nothing to do, if the num crtcs is > 1 and state is the same,
1038 * update display configuration.
1039 */
1040 if (rdev->pm.dpm.new_active_crtcs ==
1041 rdev->pm.dpm.current_active_crtcs) {
1042 return;
1043 } else {
1044 if ((rdev->pm.dpm.current_active_crtc_count > 1) &&
1045 (rdev->pm.dpm.new_active_crtc_count > 1)) {
1046 /* update display watermarks based on new power state */
1047 radeon_bandwidth_update(rdev);
1048 /* update displays */
1049 radeon_dpm_display_configuration_changed(rdev);
1050 rdev->pm.dpm.current_active_crtcs = rdev->pm.dpm.new_active_crtcs;
1051 rdev->pm.dpm.current_active_crtc_count = rdev->pm.dpm.new_active_crtc_count;
1052 return;
1053 }
1054 }
Alex Deucherda321c82013-04-12 13:55:22 -04001055 }
Alex Deucherda321c82013-04-12 13:55:22 -04001056 }
1057
Alex Deucherb62d6282013-08-20 20:29:05 -04001058force:
Alex Deucher033a37d2013-10-23 18:35:43 -04001059 if (radeon_dpm == 1) {
1060 printk("switching from power state:\n");
1061 radeon_dpm_print_power_state(rdev, rdev->pm.dpm.current_ps);
1062 printk("switching to power state:\n");
1063 radeon_dpm_print_power_state(rdev, rdev->pm.dpm.requested_ps);
1064 }
Alex Deucherb62d6282013-08-20 20:29:05 -04001065
Alex Deucherda321c82013-04-12 13:55:22 -04001066 down_write(&rdev->pm.mclk_lock);
1067 mutex_lock(&rdev->ring_lock);
1068
Alex Deucherb62d6282013-08-20 20:29:05 -04001069 /* update whether vce is active */
1070 ps->vce_active = rdev->pm.dpm.vce_active;
1071
Alex Deucher89c9bc52013-01-16 14:40:26 -05001072 ret = radeon_dpm_pre_set_power_state(rdev);
1073 if (ret)
1074 goto done;
Alex Deucher84dd1922013-01-16 12:52:04 -05001075
Alex Deucherda321c82013-04-12 13:55:22 -04001076 /* update display watermarks based on new power state */
1077 radeon_bandwidth_update(rdev);
1078 /* update displays */
1079 radeon_dpm_display_configuration_changed(rdev);
1080
1081 rdev->pm.dpm.current_active_crtcs = rdev->pm.dpm.new_active_crtcs;
1082 rdev->pm.dpm.current_active_crtc_count = rdev->pm.dpm.new_active_crtc_count;
Alex Deucher3899ca82015-03-18 17:05:10 -04001083 rdev->pm.dpm.single_display = single_display;
Alex Deucherda321c82013-04-12 13:55:22 -04001084
1085 /* wait for the rings to drain */
1086 for (i = 0; i < RADEON_NUM_RINGS; i++) {
1087 struct radeon_ring *ring = &rdev->ring[i];
1088 if (ring->ready)
Christian König37615522014-02-18 15:58:31 +01001089 radeon_fence_wait_empty(rdev, i);
Alex Deucherda321c82013-04-12 13:55:22 -04001090 }
1091
1092 /* program the new power state */
1093 radeon_dpm_set_power_state(rdev);
1094
1095 /* update current power state */
1096 rdev->pm.dpm.current_ps = rdev->pm.dpm.requested_ps;
1097
Alex Deucher89c9bc52013-01-16 14:40:26 -05001098 radeon_dpm_post_set_power_state(rdev);
Alex Deucher84dd1922013-01-16 12:52:04 -05001099
Alex Deucher1cd8b212013-09-13 14:07:03 -04001100 if (rdev->asic->dpm.force_performance_level) {
Alex Deucher14ac88a2013-10-23 17:31:42 -04001101 if (rdev->pm.dpm.thermal_active) {
1102 enum radeon_dpm_forced_level level = rdev->pm.dpm.forced_level;
Alex Deucher1cd8b212013-09-13 14:07:03 -04001103 /* force low perf level for thermal */
1104 radeon_dpm_force_performance_level(rdev, RADEON_DPM_FORCED_LEVEL_LOW);
Alex Deucher14ac88a2013-10-23 17:31:42 -04001105 /* save the user's level */
1106 rdev->pm.dpm.forced_level = level;
1107 } else {
1108 /* otherwise, user selected level */
1109 radeon_dpm_force_performance_level(rdev, rdev->pm.dpm.forced_level);
1110 }
Alex Deucher60320342013-07-24 14:59:48 -04001111 }
1112
Alex Deucher84dd1922013-01-16 12:52:04 -05001113done:
Alex Deucherda321c82013-04-12 13:55:22 -04001114 mutex_unlock(&rdev->ring_lock);
1115 up_write(&rdev->pm.mclk_lock);
Alex Deucherda321c82013-04-12 13:55:22 -04001116}
1117
Alex Deucherce3537d2013-07-24 12:12:49 -04001118void radeon_dpm_enable_uvd(struct radeon_device *rdev, bool enable)
1119{
1120 enum radeon_pm_state_type dpm_state;
1121
Alex Deucher9e9d9762013-07-31 18:13:23 -04001122 if (rdev->asic->dpm.powergate_uvd) {
Alex Deucherce3537d2013-07-24 12:12:49 -04001123 mutex_lock(&rdev->pm.mutex);
Christian König8158eb92014-01-10 16:05:05 +01001124 /* don't powergate anything if we
1125 have active but pause streams */
1126 enable |= rdev->pm.dpm.sd > 0;
1127 enable |= rdev->pm.dpm.hd > 0;
Alex Deucher9e9d9762013-07-31 18:13:23 -04001128 /* enable/disable UVD */
1129 radeon_dpm_powergate_uvd(rdev, !enable);
Alex Deucherce3537d2013-07-24 12:12:49 -04001130 mutex_unlock(&rdev->pm.mutex);
1131 } else {
Alex Deucher9e9d9762013-07-31 18:13:23 -04001132 if (enable) {
1133 mutex_lock(&rdev->pm.mutex);
1134 rdev->pm.dpm.uvd_active = true;
Alex Deucher0690a222014-06-07 11:31:25 -04001135 /* disable this for now */
1136#if 0
Alex Deucher9e9d9762013-07-31 18:13:23 -04001137 if ((rdev->pm.dpm.sd == 1) && (rdev->pm.dpm.hd == 0))
1138 dpm_state = POWER_STATE_TYPE_INTERNAL_UVD_SD;
1139 else if ((rdev->pm.dpm.sd == 2) && (rdev->pm.dpm.hd == 0))
1140 dpm_state = POWER_STATE_TYPE_INTERNAL_UVD_HD;
1141 else if ((rdev->pm.dpm.sd == 0) && (rdev->pm.dpm.hd == 1))
1142 dpm_state = POWER_STATE_TYPE_INTERNAL_UVD_HD;
1143 else if ((rdev->pm.dpm.sd == 0) && (rdev->pm.dpm.hd == 2))
1144 dpm_state = POWER_STATE_TYPE_INTERNAL_UVD_HD2;
1145 else
Alex Deucher0690a222014-06-07 11:31:25 -04001146#endif
Alex Deucher9e9d9762013-07-31 18:13:23 -04001147 dpm_state = POWER_STATE_TYPE_INTERNAL_UVD;
1148 rdev->pm.dpm.state = dpm_state;
1149 mutex_unlock(&rdev->pm.mutex);
1150 } else {
1151 mutex_lock(&rdev->pm.mutex);
1152 rdev->pm.dpm.uvd_active = false;
1153 mutex_unlock(&rdev->pm.mutex);
1154 }
Alex Deucherce3537d2013-07-24 12:12:49 -04001155
Alex Deucher9e9d9762013-07-31 18:13:23 -04001156 radeon_pm_compute_clocks(rdev);
1157 }
Alex Deucherce3537d2013-07-24 12:12:49 -04001158}
1159
Alex Deucher03afe6f2013-08-23 11:56:26 -04001160void radeon_dpm_enable_vce(struct radeon_device *rdev, bool enable)
1161{
1162 if (enable) {
1163 mutex_lock(&rdev->pm.mutex);
1164 rdev->pm.dpm.vce_active = true;
1165 /* XXX select vce level based on ring/task */
1166 rdev->pm.dpm.vce_level = RADEON_VCE_LEVEL_AC_ALL;
1167 mutex_unlock(&rdev->pm.mutex);
1168 } else {
1169 mutex_lock(&rdev->pm.mutex);
1170 rdev->pm.dpm.vce_active = false;
1171 mutex_unlock(&rdev->pm.mutex);
1172 }
1173
1174 radeon_pm_compute_clocks(rdev);
1175}
1176
Alex Deucherda321c82013-04-12 13:55:22 -04001177static void radeon_pm_suspend_old(struct radeon_device *rdev)
Alex Deucher56278a82009-12-28 13:58:44 -05001178{
Alex Deucherce8f5372010-05-07 15:10:16 -04001179 mutex_lock(&rdev->pm.mutex);
Rafael J. Wysocki3f53eb62010-06-17 23:02:27 +00001180 if (rdev->pm.pm_method == PM_METHOD_DYNPM) {
Rafael J. Wysocki3f53eb62010-06-17 23:02:27 +00001181 if (rdev->pm.dynpm_state == DYNPM_STATE_ACTIVE)
1182 rdev->pm.dynpm_state = DYNPM_STATE_SUSPENDED;
Rafael J. Wysocki3f53eb62010-06-17 23:02:27 +00001183 }
Alex Deucherce8f5372010-05-07 15:10:16 -04001184 mutex_unlock(&rdev->pm.mutex);
Tejun Heo32c87fc2011-01-03 14:49:32 +01001185
1186 cancel_delayed_work_sync(&rdev->pm.dynpm_idle_work);
Alex Deucher56278a82009-12-28 13:58:44 -05001187}
1188
Alex Deucherda321c82013-04-12 13:55:22 -04001189static void radeon_pm_suspend_dpm(struct radeon_device *rdev)
1190{
1191 mutex_lock(&rdev->pm.mutex);
1192 /* disable dpm */
1193 radeon_dpm_disable(rdev);
1194 /* reset the power state */
1195 rdev->pm.dpm.current_ps = rdev->pm.dpm.requested_ps = rdev->pm.dpm.boot_ps;
1196 rdev->pm.dpm_enabled = false;
1197 mutex_unlock(&rdev->pm.mutex);
1198}
1199
1200void radeon_pm_suspend(struct radeon_device *rdev)
1201{
1202 if (rdev->pm.pm_method == PM_METHOD_DPM)
1203 radeon_pm_suspend_dpm(rdev);
1204 else
1205 radeon_pm_suspend_old(rdev);
1206}
1207
1208static void radeon_pm_resume_old(struct radeon_device *rdev)
Rafał Miłeckid0d6cb82010-03-02 22:06:52 +01001209{
Alex Deuchered18a362011-01-06 21:19:32 -05001210 /* set up the default clocks if the MC ucode is loaded */
Alex Deucher2e3b3b12012-09-14 10:59:26 -04001211 if ((rdev->family >= CHIP_BARTS) &&
Alex Deucher36099182013-09-21 14:37:49 -04001212 (rdev->family <= CHIP_CAYMAN) &&
Alex Deucher2e3b3b12012-09-14 10:59:26 -04001213 rdev->mc_fw) {
Alex Deuchered18a362011-01-06 21:19:32 -05001214 if (rdev->pm.default_vddc)
Alex Deucher8a83ec52011-04-12 14:49:23 -04001215 radeon_atom_set_voltage(rdev, rdev->pm.default_vddc,
1216 SET_VOLTAGE_TYPE_ASIC_VDDC);
Alex Deucher2feea492011-04-12 14:49:24 -04001217 if (rdev->pm.default_vddci)
1218 radeon_atom_set_voltage(rdev, rdev->pm.default_vddci,
1219 SET_VOLTAGE_TYPE_ASIC_VDDCI);
Alex Deuchered18a362011-01-06 21:19:32 -05001220 if (rdev->pm.default_sclk)
1221 radeon_set_engine_clock(rdev, rdev->pm.default_sclk);
1222 if (rdev->pm.default_mclk)
1223 radeon_set_memory_clock(rdev, rdev->pm.default_mclk);
1224 }
Alex Deucherf8ed8b42010-06-07 17:49:51 -04001225 /* asic init will reset the default power state */
1226 mutex_lock(&rdev->pm.mutex);
1227 rdev->pm.current_power_state_index = rdev->pm.default_power_state_index;
1228 rdev->pm.current_clock_mode_index = 0;
Alex Deucher9ace9f72011-01-06 21:19:26 -05001229 rdev->pm.current_sclk = rdev->pm.default_sclk;
1230 rdev->pm.current_mclk = rdev->pm.default_mclk;
Michel Dänzer37016952014-01-08 11:40:20 +09001231 if (rdev->pm.power_state) {
1232 rdev->pm.current_vddc = rdev->pm.power_state[rdev->pm.default_power_state_index].clock_info[0].voltage.voltage;
1233 rdev->pm.current_vddci = rdev->pm.power_state[rdev->pm.default_power_state_index].clock_info[0].voltage.vddci;
1234 }
Rafael J. Wysocki3f53eb62010-06-17 23:02:27 +00001235 if (rdev->pm.pm_method == PM_METHOD_DYNPM
1236 && rdev->pm.dynpm_state == DYNPM_STATE_SUSPENDED) {
1237 rdev->pm.dynpm_state = DYNPM_STATE_ACTIVE;
Tejun Heo32c87fc2011-01-03 14:49:32 +01001238 schedule_delayed_work(&rdev->pm.dynpm_idle_work,
1239 msecs_to_jiffies(RADEON_IDLE_LOOP_MS));
Rafael J. Wysocki3f53eb62010-06-17 23:02:27 +00001240 }
Alex Deucherf8ed8b42010-06-07 17:49:51 -04001241 mutex_unlock(&rdev->pm.mutex);
Alex Deucherce8f5372010-05-07 15:10:16 -04001242 radeon_pm_compute_clocks(rdev);
Rafał Miłeckid0d6cb82010-03-02 22:06:52 +01001243}
1244
Alex Deucherda321c82013-04-12 13:55:22 -04001245static void radeon_pm_resume_dpm(struct radeon_device *rdev)
Rafał Miłecki74338742009-11-03 00:53:02 +01001246{
Dave Airlie26481fb2010-05-18 19:00:14 +10001247 int ret;
Dan Carpenter0d18abe2010-08-09 21:59:42 +02001248
Alex Deucherda321c82013-04-12 13:55:22 -04001249 /* asic init will reset to the boot state */
1250 mutex_lock(&rdev->pm.mutex);
1251 rdev->pm.dpm.current_ps = rdev->pm.dpm.requested_ps = rdev->pm.dpm.boot_ps;
1252 radeon_dpm_setup_asic(rdev);
1253 ret = radeon_dpm_enable(rdev);
1254 mutex_unlock(&rdev->pm.mutex);
Alex Deuchere14cd2b2013-12-19 16:17:47 -05001255 if (ret)
1256 goto dpm_resume_fail;
Alex Deuchere14cd2b2013-12-19 16:17:47 -05001257 rdev->pm.dpm_enabled = true;
Alex Deuchere14cd2b2013-12-19 16:17:47 -05001258 return;
1259
1260dpm_resume_fail:
1261 DRM_ERROR("radeon: dpm resume failed\n");
1262 if ((rdev->family >= CHIP_BARTS) &&
1263 (rdev->family <= CHIP_CAYMAN) &&
1264 rdev->mc_fw) {
1265 if (rdev->pm.default_vddc)
1266 radeon_atom_set_voltage(rdev, rdev->pm.default_vddc,
1267 SET_VOLTAGE_TYPE_ASIC_VDDC);
1268 if (rdev->pm.default_vddci)
1269 radeon_atom_set_voltage(rdev, rdev->pm.default_vddci,
1270 SET_VOLTAGE_TYPE_ASIC_VDDCI);
1271 if (rdev->pm.default_sclk)
1272 radeon_set_engine_clock(rdev, rdev->pm.default_sclk);
1273 if (rdev->pm.default_mclk)
1274 radeon_set_memory_clock(rdev, rdev->pm.default_mclk);
Alex Deucherda321c82013-04-12 13:55:22 -04001275 }
1276}
1277
1278void radeon_pm_resume(struct radeon_device *rdev)
1279{
1280 if (rdev->pm.pm_method == PM_METHOD_DPM)
1281 radeon_pm_resume_dpm(rdev);
1282 else
1283 radeon_pm_resume_old(rdev);
1284}
1285
1286static int radeon_pm_init_old(struct radeon_device *rdev)
1287{
1288 int ret;
1289
Alex Deucherf8ed8b42010-06-07 17:49:51 -04001290 rdev->pm.profile = PM_PROFILE_DEFAULT;
Alex Deucherce8f5372010-05-07 15:10:16 -04001291 rdev->pm.dynpm_state = DYNPM_STATE_DISABLED;
1292 rdev->pm.dynpm_planned_action = DYNPM_ACTION_NONE;
1293 rdev->pm.dynpm_can_upclock = true;
1294 rdev->pm.dynpm_can_downclock = true;
Alex Deucher9ace9f72011-01-06 21:19:26 -05001295 rdev->pm.default_sclk = rdev->clock.default_sclk;
1296 rdev->pm.default_mclk = rdev->clock.default_mclk;
Alex Deucherf8ed8b42010-06-07 17:49:51 -04001297 rdev->pm.current_sclk = rdev->clock.default_sclk;
1298 rdev->pm.current_mclk = rdev->clock.default_mclk;
Alex Deucher21a81222010-07-02 12:58:16 -04001299 rdev->pm.int_thermal_type = THERMAL_TYPE_NONE;
Rafał Miłeckic913e232009-12-22 23:02:16 +01001300
Alex Deucher56278a82009-12-28 13:58:44 -05001301 if (rdev->bios) {
1302 if (rdev->is_atom_bios)
1303 radeon_atombios_get_power_modes(rdev);
1304 else
1305 radeon_combios_get_power_modes(rdev);
Rafał Miłeckif712d0c2010-06-07 18:29:44 -04001306 radeon_pm_print_states(rdev);
Alex Deucherce8f5372010-05-07 15:10:16 -04001307 radeon_pm_init_profile(rdev);
Alex Deuchered18a362011-01-06 21:19:32 -05001308 /* set up the default clocks if the MC ucode is loaded */
Alex Deucher2e3b3b12012-09-14 10:59:26 -04001309 if ((rdev->family >= CHIP_BARTS) &&
Alex Deucher36099182013-09-21 14:37:49 -04001310 (rdev->family <= CHIP_CAYMAN) &&
Alex Deucher2e3b3b12012-09-14 10:59:26 -04001311 rdev->mc_fw) {
Alex Deuchered18a362011-01-06 21:19:32 -05001312 if (rdev->pm.default_vddc)
Alex Deucher8a83ec52011-04-12 14:49:23 -04001313 radeon_atom_set_voltage(rdev, rdev->pm.default_vddc,
1314 SET_VOLTAGE_TYPE_ASIC_VDDC);
Alex Deucher4639dd22011-07-25 18:50:08 -04001315 if (rdev->pm.default_vddci)
1316 radeon_atom_set_voltage(rdev, rdev->pm.default_vddci,
1317 SET_VOLTAGE_TYPE_ASIC_VDDCI);
Alex Deuchered18a362011-01-06 21:19:32 -05001318 if (rdev->pm.default_sclk)
1319 radeon_set_engine_clock(rdev, rdev->pm.default_sclk);
1320 if (rdev->pm.default_mclk)
1321 radeon_set_memory_clock(rdev, rdev->pm.default_mclk);
1322 }
Alex Deucher56278a82009-12-28 13:58:44 -05001323 }
1324
Alex Deucher21a81222010-07-02 12:58:16 -04001325 /* set up the internal thermal sensor if applicable */
Dan Carpenter0d18abe2010-08-09 21:59:42 +02001326 ret = radeon_hwmon_init(rdev);
1327 if (ret)
1328 return ret;
Tejun Heo32c87fc2011-01-03 14:49:32 +01001329
1330 INIT_DELAYED_WORK(&rdev->pm.dynpm_idle_work, radeon_dynpm_idle_work_handler);
1331
Alex Deucherce8f5372010-05-07 15:10:16 -04001332 if (rdev->pm.num_power_states > 1) {
Alex Deucherce8f5372010-05-07 15:10:16 -04001333 if (radeon_debugfs_pm_init(rdev)) {
1334 DRM_ERROR("Failed to register debugfs file for PM!\n");
1335 }
1336
1337 DRM_INFO("radeon: power management initialized\n");
Rafał Miłecki74338742009-11-03 00:53:02 +01001338 }
1339
1340 return 0;
1341}
1342
Alex Deucherda321c82013-04-12 13:55:22 -04001343static void radeon_dpm_print_power_states(struct radeon_device *rdev)
1344{
1345 int i;
1346
1347 for (i = 0; i < rdev->pm.dpm.num_ps; i++) {
1348 printk("== power state %d ==\n", i);
1349 radeon_dpm_print_power_state(rdev, &rdev->pm.dpm.ps[i]);
1350 }
1351}
1352
1353static int radeon_pm_init_dpm(struct radeon_device *rdev)
1354{
1355 int ret;
1356
Alex Deucher1cd8b212013-09-13 14:07:03 -04001357 /* default to balanced state */
Alex Deucheredcaa5b2013-07-05 11:48:31 -04001358 rdev->pm.dpm.state = POWER_STATE_TYPE_BALANCED;
1359 rdev->pm.dpm.user_state = POWER_STATE_TYPE_BALANCED;
Alex Deucher1cd8b212013-09-13 14:07:03 -04001360 rdev->pm.dpm.forced_level = RADEON_DPM_FORCED_LEVEL_AUTO;
Alex Deucherda321c82013-04-12 13:55:22 -04001361 rdev->pm.default_sclk = rdev->clock.default_sclk;
1362 rdev->pm.default_mclk = rdev->clock.default_mclk;
1363 rdev->pm.current_sclk = rdev->clock.default_sclk;
1364 rdev->pm.current_mclk = rdev->clock.default_mclk;
1365 rdev->pm.int_thermal_type = THERMAL_TYPE_NONE;
1366
1367 if (rdev->bios && rdev->is_atom_bios)
1368 radeon_atombios_get_power_modes(rdev);
1369 else
1370 return -EINVAL;
1371
1372 /* set up the internal thermal sensor if applicable */
1373 ret = radeon_hwmon_init(rdev);
1374 if (ret)
1375 return ret;
1376
1377 INIT_WORK(&rdev->pm.dpm.thermal.work, radeon_dpm_thermal_work_handler);
1378 mutex_lock(&rdev->pm.mutex);
1379 radeon_dpm_init(rdev);
1380 rdev->pm.dpm.current_ps = rdev->pm.dpm.requested_ps = rdev->pm.dpm.boot_ps;
Alex Deucher033a37d2013-10-23 18:35:43 -04001381 if (radeon_dpm == 1)
1382 radeon_dpm_print_power_states(rdev);
Alex Deucherda321c82013-04-12 13:55:22 -04001383 radeon_dpm_setup_asic(rdev);
1384 ret = radeon_dpm_enable(rdev);
1385 mutex_unlock(&rdev->pm.mutex);
Alex Deuchere14cd2b2013-12-19 16:17:47 -05001386 if (ret)
1387 goto dpm_failed;
Alex Deucherda321c82013-04-12 13:55:22 -04001388 rdev->pm.dpm_enabled = true;
Alex Deucherda321c82013-04-12 13:55:22 -04001389
Alex Deucherbb5abf92013-12-18 13:39:58 -05001390 if (radeon_debugfs_pm_init(rdev)) {
1391 DRM_ERROR("Failed to register debugfs file for dpm!\n");
Alex Deucherda321c82013-04-12 13:55:22 -04001392 }
1393
Alex Deucherbb5abf92013-12-18 13:39:58 -05001394 DRM_INFO("radeon: dpm initialized\n");
1395
Alex Deucherda321c82013-04-12 13:55:22 -04001396 return 0;
Alex Deuchere14cd2b2013-12-19 16:17:47 -05001397
1398dpm_failed:
1399 rdev->pm.dpm_enabled = false;
1400 if ((rdev->family >= CHIP_BARTS) &&
1401 (rdev->family <= CHIP_CAYMAN) &&
1402 rdev->mc_fw) {
1403 if (rdev->pm.default_vddc)
1404 radeon_atom_set_voltage(rdev, rdev->pm.default_vddc,
1405 SET_VOLTAGE_TYPE_ASIC_VDDC);
1406 if (rdev->pm.default_vddci)
1407 radeon_atom_set_voltage(rdev, rdev->pm.default_vddci,
1408 SET_VOLTAGE_TYPE_ASIC_VDDCI);
1409 if (rdev->pm.default_sclk)
1410 radeon_set_engine_clock(rdev, rdev->pm.default_sclk);
1411 if (rdev->pm.default_mclk)
1412 radeon_set_memory_clock(rdev, rdev->pm.default_mclk);
1413 }
1414 DRM_ERROR("radeon: dpm initialization failed\n");
1415 return ret;
Alex Deucherda321c82013-04-12 13:55:22 -04001416}
1417
Alex Deucher4369a692015-01-08 10:46:33 -05001418struct radeon_dpm_quirk {
1419 u32 chip_vendor;
1420 u32 chip_device;
1421 u32 subsys_vendor;
1422 u32 subsys_device;
1423};
1424
1425/* cards with dpm stability problems */
1426static struct radeon_dpm_quirk radeon_dpm_quirk_list[] = {
1427 /* TURKS - https://bugs.launchpad.net/ubuntu/+source/linux/+bug/1386534 */
1428 { PCI_VENDOR_ID_ATI, 0x6759, 0x1682, 0x3195 },
1429 /* TURKS - https://bugzilla.kernel.org/show_bug.cgi?id=83731 */
1430 { PCI_VENDOR_ID_ATI, 0x6840, 0x1179, 0xfb81 },
1431 { 0, 0, 0, 0 },
1432};
1433
Alex Deucherda321c82013-04-12 13:55:22 -04001434int radeon_pm_init(struct radeon_device *rdev)
1435{
Alex Deucher4369a692015-01-08 10:46:33 -05001436 struct radeon_dpm_quirk *p = radeon_dpm_quirk_list;
1437 bool disable_dpm = false;
1438
1439 /* Apply dpm quirks */
1440 while (p && p->chip_device != 0) {
1441 if (rdev->pdev->vendor == p->chip_vendor &&
1442 rdev->pdev->device == p->chip_device &&
1443 rdev->pdev->subsystem_vendor == p->subsys_vendor &&
1444 rdev->pdev->subsystem_device == p->subsys_device) {
1445 disable_dpm = true;
1446 break;
1447 }
1448 ++p;
1449 }
1450
Alex Deucherda321c82013-04-12 13:55:22 -04001451 /* enable dpm on rv6xx+ */
1452 switch (rdev->family) {
Alex Deucher4a6369e2013-04-12 14:04:10 -04001453 case CHIP_RV610:
1454 case CHIP_RV630:
1455 case CHIP_RV620:
1456 case CHIP_RV635:
1457 case CHIP_RV670:
Alex Deucher9d670062013-04-12 13:59:22 -04001458 case CHIP_RS780:
1459 case CHIP_RS880:
Alex Deucher76e6dce2014-04-18 09:08:11 -04001460 case CHIP_RV770:
Alex Deucher8a53fa22013-08-07 16:09:08 -04001461 /* DPM requires the RLC, RV770+ dGPU requires SMC */
Alex Deucher761bfb92013-08-06 13:34:00 -04001462 if (!rdev->rlc_fw)
1463 rdev->pm.pm_method = PM_METHOD_PROFILE;
Alex Deucher8a53fa22013-08-07 16:09:08 -04001464 else if ((rdev->family >= CHIP_RV770) &&
1465 (!(rdev->flags & RADEON_IS_IGP)) &&
1466 (!rdev->smc_fw))
1467 rdev->pm.pm_method = PM_METHOD_PROFILE;
Alex Deucher761bfb92013-08-06 13:34:00 -04001468 else if (radeon_dpm == 1)
Alex Deucher9d670062013-04-12 13:59:22 -04001469 rdev->pm.pm_method = PM_METHOD_DPM;
1470 else
1471 rdev->pm.pm_method = PM_METHOD_PROFILE;
1472 break;
Alex Deucherab70b1d2013-11-01 15:16:02 -04001473 case CHIP_RV730:
1474 case CHIP_RV710:
1475 case CHIP_RV740:
Alex Deucher59f7a2f2013-11-01 15:11:34 -04001476 case CHIP_CEDAR:
1477 case CHIP_REDWOOD:
1478 case CHIP_JUNIPER:
1479 case CHIP_CYPRESS:
1480 case CHIP_HEMLOCK:
Alex Deucher5a16f762013-10-23 17:11:06 -04001481 case CHIP_PALM:
1482 case CHIP_SUMO:
1483 case CHIP_SUMO2:
Alex Deucherc08abf12014-07-14 12:01:40 -04001484 case CHIP_BARTS:
1485 case CHIP_TURKS:
1486 case CHIP_CAICOS:
Alex Deucher8f500af2014-07-07 17:13:37 -04001487 case CHIP_CAYMAN:
Alex Deucher3a118982013-11-14 10:21:29 -05001488 case CHIP_ARUBA:
Alex Deucher68bc7782013-10-23 17:14:06 -04001489 case CHIP_TAHITI:
1490 case CHIP_PITCAIRN:
1491 case CHIP_VERDE:
1492 case CHIP_OLAND:
1493 case CHIP_HAINAN:
Alex Deucher4f22dde2013-12-19 17:37:33 -05001494 case CHIP_BONAIRE:
Alex Deuchere308b1d2013-12-19 17:39:17 -05001495 case CHIP_KABINI:
1496 case CHIP_KAVERI:
Alex Deucher4f22dde2013-12-19 17:37:33 -05001497 case CHIP_HAWAII:
Samuel Li7d032a42014-04-30 18:40:51 -04001498 case CHIP_MULLINS:
Alex Deucher5a16f762013-10-23 17:11:06 -04001499 /* DPM requires the RLC, RV770+ dGPU requires SMC */
1500 if (!rdev->rlc_fw)
1501 rdev->pm.pm_method = PM_METHOD_PROFILE;
1502 else if ((rdev->family >= CHIP_RV770) &&
1503 (!(rdev->flags & RADEON_IS_IGP)) &&
1504 (!rdev->smc_fw))
1505 rdev->pm.pm_method = PM_METHOD_PROFILE;
Alex Deucher4369a692015-01-08 10:46:33 -05001506 else if (disable_dpm && (radeon_dpm == -1))
1507 rdev->pm.pm_method = PM_METHOD_PROFILE;
Alex Deucher5a16f762013-10-23 17:11:06 -04001508 else if (radeon_dpm == 0)
1509 rdev->pm.pm_method = PM_METHOD_PROFILE;
1510 else
1511 rdev->pm.pm_method = PM_METHOD_DPM;
1512 break;
Alex Deucherda321c82013-04-12 13:55:22 -04001513 default:
1514 /* default to profile method */
1515 rdev->pm.pm_method = PM_METHOD_PROFILE;
1516 break;
1517 }
1518
1519 if (rdev->pm.pm_method == PM_METHOD_DPM)
1520 return radeon_pm_init_dpm(rdev);
1521 else
1522 return radeon_pm_init_old(rdev);
1523}
1524
Alex Deucher914a8982013-12-19 11:37:22 -05001525int radeon_pm_late_init(struct radeon_device *rdev)
1526{
1527 int ret = 0;
1528
1529 if (rdev->pm.pm_method == PM_METHOD_DPM) {
Alex Deucher51a47262015-09-30 16:45:52 -04001530 if (rdev->pm.dpm_enabled) {
Alex Deucher49abb262015-10-23 10:38:52 -04001531 if (!rdev->pm.sysfs_initialized) {
1532 ret = device_create_file(rdev->dev, &dev_attr_power_dpm_state);
1533 if (ret)
1534 DRM_ERROR("failed to create device file for dpm state\n");
1535 ret = device_create_file(rdev->dev, &dev_attr_power_dpm_force_performance_level);
1536 if (ret)
1537 DRM_ERROR("failed to create device file for dpm state\n");
1538 /* XXX: these are noops for dpm but are here for backwards compat */
1539 ret = device_create_file(rdev->dev, &dev_attr_power_profile);
1540 if (ret)
1541 DRM_ERROR("failed to create device file for power profile\n");
1542 ret = device_create_file(rdev->dev, &dev_attr_power_method);
1543 if (ret)
1544 DRM_ERROR("failed to create device file for power method\n");
Alex Deucher24dd2f62015-11-10 13:01:35 -05001545 rdev->pm.sysfs_initialized = true;
Alex Deucher49abb262015-10-23 10:38:52 -04001546 }
Alex Deucher51a47262015-09-30 16:45:52 -04001547
1548 mutex_lock(&rdev->pm.mutex);
1549 ret = radeon_dpm_late_enable(rdev);
1550 mutex_unlock(&rdev->pm.mutex);
1551 if (ret) {
1552 rdev->pm.dpm_enabled = false;
1553 DRM_ERROR("radeon_pm_late_init failed, disabling dpm\n");
1554 } else {
1555 /* set the dpm state for PX since there won't be
1556 * a modeset to call this.
1557 */
1558 radeon_pm_compute_clocks(rdev);
1559 }
1560 }
1561 } else {
Alex Deucher49abb262015-10-23 10:38:52 -04001562 if ((rdev->pm.num_power_states > 1) &&
1563 (!rdev->pm.sysfs_initialized)) {
Alex Deucher51a47262015-09-30 16:45:52 -04001564 /* where's the best place to put these? */
1565 ret = device_create_file(rdev->dev, &dev_attr_power_profile);
1566 if (ret)
1567 DRM_ERROR("failed to create device file for power profile\n");
1568 ret = device_create_file(rdev->dev, &dev_attr_power_method);
1569 if (ret)
1570 DRM_ERROR("failed to create device file for power method\n");
Alex Deucher49abb262015-10-23 10:38:52 -04001571 if (!ret)
1572 rdev->pm.sysfs_initialized = true;
Alex Deucher51a47262015-09-30 16:45:52 -04001573 }
Alex Deucher914a8982013-12-19 11:37:22 -05001574 }
1575 return ret;
1576}
1577
Alex Deucherda321c82013-04-12 13:55:22 -04001578static void radeon_pm_fini_old(struct radeon_device *rdev)
Alex Deucher29fb52c2010-03-11 10:01:17 -05001579{
Alex Deucherce8f5372010-05-07 15:10:16 -04001580 if (rdev->pm.num_power_states > 1) {
Alex Deuchera4248162010-04-24 14:50:23 -04001581 mutex_lock(&rdev->pm.mutex);
Alex Deucherce8f5372010-05-07 15:10:16 -04001582 if (rdev->pm.pm_method == PM_METHOD_PROFILE) {
1583 rdev->pm.profile = PM_PROFILE_DEFAULT;
1584 radeon_pm_update_profile(rdev);
1585 radeon_pm_set_clocks(rdev);
1586 } else if (rdev->pm.pm_method == PM_METHOD_DYNPM) {
Alex Deucherce8f5372010-05-07 15:10:16 -04001587 /* reset default clocks */
1588 rdev->pm.dynpm_state = DYNPM_STATE_DISABLED;
1589 rdev->pm.dynpm_planned_action = DYNPM_ACTION_DEFAULT;
1590 radeon_pm_set_clocks(rdev);
1591 }
Alex Deuchera4248162010-04-24 14:50:23 -04001592 mutex_unlock(&rdev->pm.mutex);
Tejun Heo32c87fc2011-01-03 14:49:32 +01001593
1594 cancel_delayed_work_sync(&rdev->pm.dynpm_idle_work);
Alex Deucher58e21df2010-03-22 13:31:08 -04001595
Alex Deucherce8f5372010-05-07 15:10:16 -04001596 device_remove_file(rdev->dev, &dev_attr_power_profile);
1597 device_remove_file(rdev->dev, &dev_attr_power_method);
Alex Deucherce8f5372010-05-07 15:10:16 -04001598 }
Alex Deuchera4248162010-04-24 14:50:23 -04001599
Alex Deuchercb3e4e72014-04-15 12:44:32 -04001600 radeon_hwmon_fini(rdev);
Fabian Frederick9c244872014-07-04 21:37:09 +02001601 kfree(rdev->pm.power_state);
Alex Deucher29fb52c2010-03-11 10:01:17 -05001602}
1603
Alex Deucherda321c82013-04-12 13:55:22 -04001604static void radeon_pm_fini_dpm(struct radeon_device *rdev)
1605{
1606 if (rdev->pm.num_power_states > 1) {
1607 mutex_lock(&rdev->pm.mutex);
1608 radeon_dpm_disable(rdev);
1609 mutex_unlock(&rdev->pm.mutex);
1610
1611 device_remove_file(rdev->dev, &dev_attr_power_dpm_state);
Alex Deucher70d01a52013-07-02 18:38:02 -04001612 device_remove_file(rdev->dev, &dev_attr_power_dpm_force_performance_level);
Alex Deucherda321c82013-04-12 13:55:22 -04001613 /* XXX backwards compat */
1614 device_remove_file(rdev->dev, &dev_attr_power_profile);
1615 device_remove_file(rdev->dev, &dev_attr_power_method);
1616 }
1617 radeon_dpm_fini(rdev);
1618
Alex Deuchercb3e4e72014-04-15 12:44:32 -04001619 radeon_hwmon_fini(rdev);
Fabian Frederick9c244872014-07-04 21:37:09 +02001620 kfree(rdev->pm.power_state);
Alex Deucherda321c82013-04-12 13:55:22 -04001621}
1622
1623void radeon_pm_fini(struct radeon_device *rdev)
1624{
1625 if (rdev->pm.pm_method == PM_METHOD_DPM)
1626 radeon_pm_fini_dpm(rdev);
1627 else
1628 radeon_pm_fini_old(rdev);
1629}
1630
1631static void radeon_pm_compute_clocks_old(struct radeon_device *rdev)
Rafał Miłeckic913e232009-12-22 23:02:16 +01001632{
1633 struct drm_device *ddev = rdev->ddev;
Alex Deuchera48b9b42010-04-22 14:03:55 -04001634 struct drm_crtc *crtc;
Rafał Miłeckic913e232009-12-22 23:02:16 +01001635 struct radeon_crtc *radeon_crtc;
Rafał Miłeckic913e232009-12-22 23:02:16 +01001636
Alex Deucherce8f5372010-05-07 15:10:16 -04001637 if (rdev->pm.num_power_states < 2)
1638 return;
1639
Rafał Miłeckic913e232009-12-22 23:02:16 +01001640 mutex_lock(&rdev->pm.mutex);
1641
1642 rdev->pm.active_crtcs = 0;
Alex Deuchera48b9b42010-04-22 14:03:55 -04001643 rdev->pm.active_crtc_count = 0;
Alex Deucher3ed9a332014-04-15 12:44:33 -04001644 if (rdev->num_crtc && rdev->mode_info.mode_config_initialized) {
1645 list_for_each_entry(crtc,
1646 &ddev->mode_config.crtc_list, head) {
1647 radeon_crtc = to_radeon_crtc(crtc);
1648 if (radeon_crtc->enabled) {
1649 rdev->pm.active_crtcs |= (1 << radeon_crtc->crtc_id);
1650 rdev->pm.active_crtc_count++;
1651 }
Rafał Miłeckic913e232009-12-22 23:02:16 +01001652 }
1653 }
1654
Alex Deucherce8f5372010-05-07 15:10:16 -04001655 if (rdev->pm.pm_method == PM_METHOD_PROFILE) {
1656 radeon_pm_update_profile(rdev);
1657 radeon_pm_set_clocks(rdev);
1658 } else if (rdev->pm.pm_method == PM_METHOD_DYNPM) {
1659 if (rdev->pm.dynpm_state != DYNPM_STATE_DISABLED) {
1660 if (rdev->pm.active_crtc_count > 1) {
1661 if (rdev->pm.dynpm_state == DYNPM_STATE_ACTIVE) {
1662 cancel_delayed_work(&rdev->pm.dynpm_idle_work);
Alex Deucherd7311172010-05-03 01:13:14 -04001663
Alex Deucherce8f5372010-05-07 15:10:16 -04001664 rdev->pm.dynpm_state = DYNPM_STATE_PAUSED;
1665 rdev->pm.dynpm_planned_action = DYNPM_ACTION_DEFAULT;
1666 radeon_pm_get_dynpm_state(rdev);
1667 radeon_pm_set_clocks(rdev);
Rafał Miłeckic913e232009-12-22 23:02:16 +01001668
Dave Airlied9fdaaf2010-08-02 10:42:55 +10001669 DRM_DEBUG_DRIVER("radeon: dynamic power management deactivated\n");
Alex Deucherce8f5372010-05-07 15:10:16 -04001670 }
1671 } else if (rdev->pm.active_crtc_count == 1) {
1672 /* TODO: Increase clocks if needed for current mode */
Rafał Miłeckic913e232009-12-22 23:02:16 +01001673
Alex Deucherce8f5372010-05-07 15:10:16 -04001674 if (rdev->pm.dynpm_state == DYNPM_STATE_MINIMUM) {
1675 rdev->pm.dynpm_state = DYNPM_STATE_ACTIVE;
1676 rdev->pm.dynpm_planned_action = DYNPM_ACTION_UPCLOCK;
1677 radeon_pm_get_dynpm_state(rdev);
1678 radeon_pm_set_clocks(rdev);
Rafał Miłeckic913e232009-12-22 23:02:16 +01001679
Tejun Heo32c87fc2011-01-03 14:49:32 +01001680 schedule_delayed_work(&rdev->pm.dynpm_idle_work,
1681 msecs_to_jiffies(RADEON_IDLE_LOOP_MS));
Alex Deucherce8f5372010-05-07 15:10:16 -04001682 } else if (rdev->pm.dynpm_state == DYNPM_STATE_PAUSED) {
1683 rdev->pm.dynpm_state = DYNPM_STATE_ACTIVE;
Tejun Heo32c87fc2011-01-03 14:49:32 +01001684 schedule_delayed_work(&rdev->pm.dynpm_idle_work,
1685 msecs_to_jiffies(RADEON_IDLE_LOOP_MS));
Dave Airlied9fdaaf2010-08-02 10:42:55 +10001686 DRM_DEBUG_DRIVER("radeon: dynamic power management activated\n");
Alex Deucherce8f5372010-05-07 15:10:16 -04001687 }
1688 } else { /* count == 0 */
1689 if (rdev->pm.dynpm_state != DYNPM_STATE_MINIMUM) {
1690 cancel_delayed_work(&rdev->pm.dynpm_idle_work);
Rafał Miłeckic913e232009-12-22 23:02:16 +01001691
Alex Deucherce8f5372010-05-07 15:10:16 -04001692 rdev->pm.dynpm_state = DYNPM_STATE_MINIMUM;
1693 rdev->pm.dynpm_planned_action = DYNPM_ACTION_MINIMUM;
1694 radeon_pm_get_dynpm_state(rdev);
1695 radeon_pm_set_clocks(rdev);
1696 }
1697 }
Rafał Miłeckic913e232009-12-22 23:02:16 +01001698 }
Rafał Miłeckic913e232009-12-22 23:02:16 +01001699 }
Rafał Miłecki73a6d3f2010-01-08 00:22:47 +01001700
1701 mutex_unlock(&rdev->pm.mutex);
Rafał Miłeckic913e232009-12-22 23:02:16 +01001702}
1703
Alex Deucherda321c82013-04-12 13:55:22 -04001704static void radeon_pm_compute_clocks_dpm(struct radeon_device *rdev)
1705{
1706 struct drm_device *ddev = rdev->ddev;
1707 struct drm_crtc *crtc;
1708 struct radeon_crtc *radeon_crtc;
1709
Alex Deucher6c7bcce2013-12-18 14:07:14 -05001710 if (!rdev->pm.dpm_enabled)
1711 return;
1712
Alex Deucherda321c82013-04-12 13:55:22 -04001713 mutex_lock(&rdev->pm.mutex);
1714
Alex Deucher5ca302f2012-11-30 10:56:57 -05001715 /* update active crtc counts */
Alex Deucherda321c82013-04-12 13:55:22 -04001716 rdev->pm.dpm.new_active_crtcs = 0;
1717 rdev->pm.dpm.new_active_crtc_count = 0;
Alex Deucher3ed9a332014-04-15 12:44:33 -04001718 if (rdev->num_crtc && rdev->mode_info.mode_config_initialized) {
1719 list_for_each_entry(crtc,
1720 &ddev->mode_config.crtc_list, head) {
1721 radeon_crtc = to_radeon_crtc(crtc);
1722 if (crtc->enabled) {
1723 rdev->pm.dpm.new_active_crtcs |= (1 << radeon_crtc->crtc_id);
1724 rdev->pm.dpm.new_active_crtc_count++;
1725 }
Alex Deucherda321c82013-04-12 13:55:22 -04001726 }
1727 }
1728
Alex Deucher5ca302f2012-11-30 10:56:57 -05001729 /* update battery/ac status */
1730 if (power_supply_is_system_supplied() > 0)
1731 rdev->pm.dpm.ac_power = true;
1732 else
1733 rdev->pm.dpm.ac_power = false;
1734
Alex Deucherda321c82013-04-12 13:55:22 -04001735 radeon_dpm_change_power_state_locked(rdev);
1736
1737 mutex_unlock(&rdev->pm.mutex);
Alex Deucher8a227552013-06-21 15:12:57 -04001738
Alex Deucherda321c82013-04-12 13:55:22 -04001739}
1740
1741void radeon_pm_compute_clocks(struct radeon_device *rdev)
1742{
1743 if (rdev->pm.pm_method == PM_METHOD_DPM)
1744 radeon_pm_compute_clocks_dpm(rdev);
1745 else
1746 radeon_pm_compute_clocks_old(rdev);
1747}
1748
Alex Deucherce8f5372010-05-07 15:10:16 -04001749static bool radeon_pm_in_vbl(struct radeon_device *rdev)
Dave Airlief7352612010-02-18 15:58:36 +10001750{
Mario Kleiner75fa0b02010-10-05 19:57:37 -04001751 int crtc, vpos, hpos, vbl_status;
Dave Airlief7352612010-02-18 15:58:36 +10001752 bool in_vbl = true;
1753
Mario Kleiner75fa0b02010-10-05 19:57:37 -04001754 /* Iterate over all active crtc's. All crtc's must be in vblank,
1755 * otherwise return in_vbl == false.
1756 */
1757 for (crtc = 0; (crtc < rdev->num_crtc) && in_vbl; crtc++) {
1758 if (rdev->pm.active_crtcs & (1 << crtc)) {
Ville Syrjälä3bb403b2015-09-14 22:43:44 +03001759 vbl_status = radeon_get_crtc_scanoutpos(rdev->ddev, crtc, 0,
1760 &vpos, &hpos, NULL, NULL,
1761 &rdev->mode_info.crtcs[crtc]->base.hwmode);
Mario Kleinerf5a80202010-10-23 04:42:17 +02001762 if ((vbl_status & DRM_SCANOUTPOS_VALID) &&
Daniel Vetter3d3cbd82014-09-10 17:36:11 +02001763 !(vbl_status & DRM_SCANOUTPOS_IN_VBLANK))
Dave Airlief7352612010-02-18 15:58:36 +10001764 in_vbl = false;
1765 }
1766 }
Matthew Garrettf81f2022010-04-28 12:13:06 -04001767
1768 return in_vbl;
1769}
1770
Alex Deucherce8f5372010-05-07 15:10:16 -04001771static bool radeon_pm_debug_check_in_vbl(struct radeon_device *rdev, bool finish)
Matthew Garrettf81f2022010-04-28 12:13:06 -04001772{
1773 u32 stat_crtc = 0;
1774 bool in_vbl = radeon_pm_in_vbl(rdev);
1775
Dave Airlief7352612010-02-18 15:58:36 +10001776 if (in_vbl == false)
Dave Airlied9fdaaf2010-08-02 10:42:55 +10001777 DRM_DEBUG_DRIVER("not in vbl for pm change %08x at %s\n", stat_crtc,
Alex Deucherbae6b5622010-04-22 13:38:05 -04001778 finish ? "exit" : "entry");
Dave Airlief7352612010-02-18 15:58:36 +10001779 return in_vbl;
1780}
Rafał Miłeckic913e232009-12-22 23:02:16 +01001781
Alex Deucherce8f5372010-05-07 15:10:16 -04001782static void radeon_dynpm_idle_work_handler(struct work_struct *work)
Rafał Miłeckic913e232009-12-22 23:02:16 +01001783{
1784 struct radeon_device *rdev;
Matthew Garrettd9932a32010-04-26 16:02:26 -04001785 int resched;
Rafał Miłeckic913e232009-12-22 23:02:16 +01001786 rdev = container_of(work, struct radeon_device,
Alex Deucherce8f5372010-05-07 15:10:16 -04001787 pm.dynpm_idle_work.work);
Rafał Miłeckic913e232009-12-22 23:02:16 +01001788
Matthew Garrettd9932a32010-04-26 16:02:26 -04001789 resched = ttm_bo_lock_delayed_workqueue(&rdev->mman.bdev);
Rafał Miłeckic913e232009-12-22 23:02:16 +01001790 mutex_lock(&rdev->pm.mutex);
Alex Deucherce8f5372010-05-07 15:10:16 -04001791 if (rdev->pm.dynpm_state == DYNPM_STATE_ACTIVE) {
Rafał Miłeckic913e232009-12-22 23:02:16 +01001792 int not_processed = 0;
Alex Deucher74652802011-08-25 13:39:48 -04001793 int i;
Rafał Miłeckic913e232009-12-22 23:02:16 +01001794
Alex Deucher74652802011-08-25 13:39:48 -04001795 for (i = 0; i < RADEON_NUM_RINGS; ++i) {
Alex Deucher0ec06122012-06-14 15:54:57 -04001796 struct radeon_ring *ring = &rdev->ring[i];
1797
1798 if (ring->ready) {
1799 not_processed += radeon_fence_count_emitted(rdev, i);
1800 if (not_processed >= 3)
1801 break;
1802 }
Rafał Miłeckic913e232009-12-22 23:02:16 +01001803 }
Rafał Miłeckic913e232009-12-22 23:02:16 +01001804
1805 if (not_processed >= 3) { /* should upclock */
Alex Deucherce8f5372010-05-07 15:10:16 -04001806 if (rdev->pm.dynpm_planned_action == DYNPM_ACTION_DOWNCLOCK) {
1807 rdev->pm.dynpm_planned_action = DYNPM_ACTION_NONE;
1808 } else if (rdev->pm.dynpm_planned_action == DYNPM_ACTION_NONE &&
1809 rdev->pm.dynpm_can_upclock) {
1810 rdev->pm.dynpm_planned_action =
1811 DYNPM_ACTION_UPCLOCK;
1812 rdev->pm.dynpm_action_timeout = jiffies +
Rafał Miłeckic913e232009-12-22 23:02:16 +01001813 msecs_to_jiffies(RADEON_RECLOCK_DELAY_MS);
1814 }
1815 } else if (not_processed == 0) { /* should downclock */
Alex Deucherce8f5372010-05-07 15:10:16 -04001816 if (rdev->pm.dynpm_planned_action == DYNPM_ACTION_UPCLOCK) {
1817 rdev->pm.dynpm_planned_action = DYNPM_ACTION_NONE;
1818 } else if (rdev->pm.dynpm_planned_action == DYNPM_ACTION_NONE &&
1819 rdev->pm.dynpm_can_downclock) {
1820 rdev->pm.dynpm_planned_action =
1821 DYNPM_ACTION_DOWNCLOCK;
1822 rdev->pm.dynpm_action_timeout = jiffies +
Rafał Miłeckic913e232009-12-22 23:02:16 +01001823 msecs_to_jiffies(RADEON_RECLOCK_DELAY_MS);
1824 }
1825 }
1826
Alex Deucherd7311172010-05-03 01:13:14 -04001827 /* Note, radeon_pm_set_clocks is called with static_switch set
1828 * to false since we want to wait for vbl to avoid flicker.
1829 */
Alex Deucherce8f5372010-05-07 15:10:16 -04001830 if (rdev->pm.dynpm_planned_action != DYNPM_ACTION_NONE &&
1831 jiffies > rdev->pm.dynpm_action_timeout) {
1832 radeon_pm_get_dynpm_state(rdev);
1833 radeon_pm_set_clocks(rdev);
Rafał Miłeckic913e232009-12-22 23:02:16 +01001834 }
Rafael J. Wysocki3f53eb62010-06-17 23:02:27 +00001835
Tejun Heo32c87fc2011-01-03 14:49:32 +01001836 schedule_delayed_work(&rdev->pm.dynpm_idle_work,
1837 msecs_to_jiffies(RADEON_IDLE_LOOP_MS));
Rafał Miłeckic913e232009-12-22 23:02:16 +01001838 }
1839 mutex_unlock(&rdev->pm.mutex);
Matthew Garrettd9932a32010-04-26 16:02:26 -04001840 ttm_bo_unlock_delayed_workqueue(&rdev->mman.bdev, resched);
Rafał Miłeckic913e232009-12-22 23:02:16 +01001841}
1842
Rafał Miłecki74338742009-11-03 00:53:02 +01001843/*
1844 * Debugfs info
1845 */
1846#if defined(CONFIG_DEBUG_FS)
1847
1848static int radeon_debugfs_pm_info(struct seq_file *m, void *data)
1849{
1850 struct drm_info_node *node = (struct drm_info_node *) m->private;
1851 struct drm_device *dev = node->minor->dev;
1852 struct radeon_device *rdev = dev->dev_private;
Alex Deucher4f2f2032014-05-19 19:21:29 -04001853 struct drm_device *ddev = rdev->ddev;
Rafał Miłecki74338742009-11-03 00:53:02 +01001854
Alex Deucher4f2f2032014-05-19 19:21:29 -04001855 if ((rdev->flags & RADEON_IS_PX) &&
1856 (ddev->switch_power_state != DRM_SWITCH_POWER_ON)) {
1857 seq_printf(m, "PX asic powered off\n");
1858 } else if (rdev->pm.dpm_enabled) {
Alex Deucher1316b792013-06-28 09:28:39 -04001859 mutex_lock(&rdev->pm.mutex);
1860 if (rdev->asic->dpm.debugfs_print_current_performance_level)
1861 radeon_dpm_debugfs_print_current_performance_level(rdev, m);
1862 else
Alex Deucher71375922013-07-02 09:11:39 -04001863 seq_printf(m, "Debugfs support not implemented for this asic\n");
Alex Deucher1316b792013-06-28 09:28:39 -04001864 mutex_unlock(&rdev->pm.mutex);
1865 } else {
1866 seq_printf(m, "default engine clock: %u0 kHz\n", rdev->pm.default_sclk);
1867 /* radeon_get_engine_clock is not reliable on APUs so just print the current clock */
1868 if ((rdev->family >= CHIP_PALM) && (rdev->flags & RADEON_IS_IGP))
1869 seq_printf(m, "current engine clock: %u0 kHz\n", rdev->pm.current_sclk);
1870 else
1871 seq_printf(m, "current engine clock: %u0 kHz\n", radeon_get_engine_clock(rdev));
1872 seq_printf(m, "default memory clock: %u0 kHz\n", rdev->pm.default_mclk);
1873 if (rdev->asic->pm.get_memory_clock)
1874 seq_printf(m, "current memory clock: %u0 kHz\n", radeon_get_memory_clock(rdev));
1875 if (rdev->pm.current_vddc)
1876 seq_printf(m, "voltage: %u mV\n", rdev->pm.current_vddc);
1877 if (rdev->asic->pm.get_pcie_lanes)
1878 seq_printf(m, "PCIE lanes: %d\n", radeon_get_pcie_lanes(rdev));
1879 }
Rafał Miłecki74338742009-11-03 00:53:02 +01001880
1881 return 0;
1882}
1883
1884static struct drm_info_list radeon_pm_info_list[] = {
1885 {"radeon_pm_info", radeon_debugfs_pm_info, 0, NULL},
1886};
1887#endif
1888
Rafał Miłeckic913e232009-12-22 23:02:16 +01001889static int radeon_debugfs_pm_init(struct radeon_device *rdev)
Rafał Miłecki74338742009-11-03 00:53:02 +01001890{
1891#if defined(CONFIG_DEBUG_FS)
1892 return radeon_debugfs_add_files(rdev, radeon_pm_info_list, ARRAY_SIZE(radeon_pm_info_list));
1893#else
1894 return 0;
1895#endif
1896}