blob: c812513e079d678238a77a00ac397e1835791490 [file] [log] [blame]
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001/*
2 * drivers/net/ethernet/mellanox/mlxsw/spectrum.c
3 * Copyright (c) 2015 Mellanox Technologies. All rights reserved.
4 * Copyright (c) 2015 Jiri Pirko <jiri@mellanox.com>
5 * Copyright (c) 2015 Ido Schimmel <idosch@mellanox.com>
6 * Copyright (c) 2015 Elad Raz <eladr@mellanox.com>
7 *
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions are met:
10 *
11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the distribution.
16 * 3. Neither the names of the copyright holders nor the names of its
17 * contributors may be used to endorse or promote products derived from
18 * this software without specific prior written permission.
19 *
20 * Alternatively, this software may be distributed under the terms of the
21 * GNU General Public License ("GPL") version 2 as published by the Free
22 * Software Foundation.
23 *
24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
27 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
28 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
29 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
30 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
31 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
32 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
33 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
34 * POSSIBILITY OF SUCH DAMAGE.
35 */
36
37#include <linux/kernel.h>
38#include <linux/module.h>
39#include <linux/types.h>
40#include <linux/netdevice.h>
41#include <linux/etherdevice.h>
42#include <linux/ethtool.h>
43#include <linux/slab.h>
44#include <linux/device.h>
45#include <linux/skbuff.h>
46#include <linux/if_vlan.h>
47#include <linux/if_bridge.h>
48#include <linux/workqueue.h>
49#include <linux/jiffies.h>
50#include <linux/bitops.h>
Ido Schimmel7f71eb42015-12-15 16:03:37 +010051#include <linux/list.h>
Ido Schimmel80bedf12016-06-20 23:03:59 +020052#include <linux/notifier.h>
Ido Schimmel90183b92016-04-06 17:10:08 +020053#include <linux/dcbnl.h>
Ido Schimmel99724c12016-07-04 08:23:14 +020054#include <linux/inetdevice.h>
Jiri Pirko56ade8f2015-10-16 14:01:37 +020055#include <net/switchdev.h>
56#include <generated/utsrelease.h>
57
58#include "spectrum.h"
59#include "core.h"
60#include "reg.h"
61#include "port.h"
62#include "trap.h"
63#include "txheader.h"
64
65static const char mlxsw_sp_driver_name[] = "mlxsw_spectrum";
66static const char mlxsw_sp_driver_version[] = "1.0";
67
68/* tx_hdr_version
69 * Tx header version.
70 * Must be set to 1.
71 */
72MLXSW_ITEM32(tx, hdr, version, 0x00, 28, 4);
73
74/* tx_hdr_ctl
75 * Packet control type.
76 * 0 - Ethernet control (e.g. EMADs, LACP)
77 * 1 - Ethernet data
78 */
79MLXSW_ITEM32(tx, hdr, ctl, 0x00, 26, 2);
80
81/* tx_hdr_proto
82 * Packet protocol type. Must be set to 1 (Ethernet).
83 */
84MLXSW_ITEM32(tx, hdr, proto, 0x00, 21, 3);
85
86/* tx_hdr_rx_is_router
87 * Packet is sent from the router. Valid for data packets only.
88 */
89MLXSW_ITEM32(tx, hdr, rx_is_router, 0x00, 19, 1);
90
91/* tx_hdr_fid_valid
92 * Indicates if the 'fid' field is valid and should be used for
93 * forwarding lookup. Valid for data packets only.
94 */
95MLXSW_ITEM32(tx, hdr, fid_valid, 0x00, 16, 1);
96
97/* tx_hdr_swid
98 * Switch partition ID. Must be set to 0.
99 */
100MLXSW_ITEM32(tx, hdr, swid, 0x00, 12, 3);
101
102/* tx_hdr_control_tclass
103 * Indicates if the packet should use the control TClass and not one
104 * of the data TClasses.
105 */
106MLXSW_ITEM32(tx, hdr, control_tclass, 0x00, 6, 1);
107
108/* tx_hdr_etclass
109 * Egress TClass to be used on the egress device on the egress port.
110 */
111MLXSW_ITEM32(tx, hdr, etclass, 0x00, 0, 4);
112
113/* tx_hdr_port_mid
114 * Destination local port for unicast packets.
115 * Destination multicast ID for multicast packets.
116 *
117 * Control packets are directed to a specific egress port, while data
118 * packets are transmitted through the CPU port (0) into the switch partition,
119 * where forwarding rules are applied.
120 */
121MLXSW_ITEM32(tx, hdr, port_mid, 0x04, 16, 16);
122
123/* tx_hdr_fid
124 * Forwarding ID used for L2 forwarding lookup. Valid only if 'fid_valid' is
125 * set, otherwise calculated based on the packet's VID using VID to FID mapping.
126 * Valid for data packets only.
127 */
128MLXSW_ITEM32(tx, hdr, fid, 0x08, 0, 16);
129
130/* tx_hdr_type
131 * 0 - Data packets
132 * 6 - Control packets
133 */
134MLXSW_ITEM32(tx, hdr, type, 0x0C, 0, 4);
135
136static void mlxsw_sp_txhdr_construct(struct sk_buff *skb,
137 const struct mlxsw_tx_info *tx_info)
138{
139 char *txhdr = skb_push(skb, MLXSW_TXHDR_LEN);
140
141 memset(txhdr, 0, MLXSW_TXHDR_LEN);
142
143 mlxsw_tx_hdr_version_set(txhdr, MLXSW_TXHDR_VERSION_1);
144 mlxsw_tx_hdr_ctl_set(txhdr, MLXSW_TXHDR_ETH_CTL);
145 mlxsw_tx_hdr_proto_set(txhdr, MLXSW_TXHDR_PROTO_ETH);
146 mlxsw_tx_hdr_swid_set(txhdr, 0);
147 mlxsw_tx_hdr_control_tclass_set(txhdr, 1);
148 mlxsw_tx_hdr_port_mid_set(txhdr, tx_info->local_port);
149 mlxsw_tx_hdr_type_set(txhdr, MLXSW_TXHDR_TYPE_CONTROL);
150}
151
152static int mlxsw_sp_base_mac_get(struct mlxsw_sp *mlxsw_sp)
153{
154 char spad_pl[MLXSW_REG_SPAD_LEN];
155 int err;
156
157 err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(spad), spad_pl);
158 if (err)
159 return err;
160 mlxsw_reg_spad_base_mac_memcpy_from(spad_pl, mlxsw_sp->base_mac);
161 return 0;
162}
163
164static int mlxsw_sp_port_admin_status_set(struct mlxsw_sp_port *mlxsw_sp_port,
165 bool is_up)
166{
167 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
168 char paos_pl[MLXSW_REG_PAOS_LEN];
169
170 mlxsw_reg_paos_pack(paos_pl, mlxsw_sp_port->local_port,
171 is_up ? MLXSW_PORT_ADMIN_STATUS_UP :
172 MLXSW_PORT_ADMIN_STATUS_DOWN);
173 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(paos), paos_pl);
174}
175
176static int mlxsw_sp_port_oper_status_get(struct mlxsw_sp_port *mlxsw_sp_port,
177 bool *p_is_up)
178{
179 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
180 char paos_pl[MLXSW_REG_PAOS_LEN];
181 u8 oper_status;
182 int err;
183
184 mlxsw_reg_paos_pack(paos_pl, mlxsw_sp_port->local_port, 0);
185 err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(paos), paos_pl);
186 if (err)
187 return err;
188 oper_status = mlxsw_reg_paos_oper_status_get(paos_pl);
189 *p_is_up = oper_status == MLXSW_PORT_ADMIN_STATUS_UP ? true : false;
190 return 0;
191}
192
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200193static int mlxsw_sp_port_dev_addr_set(struct mlxsw_sp_port *mlxsw_sp_port,
194 unsigned char *addr)
195{
196 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
197 char ppad_pl[MLXSW_REG_PPAD_LEN];
198
199 mlxsw_reg_ppad_pack(ppad_pl, true, mlxsw_sp_port->local_port);
200 mlxsw_reg_ppad_mac_memcpy_to(ppad_pl, addr);
201 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ppad), ppad_pl);
202}
203
204static int mlxsw_sp_port_dev_addr_init(struct mlxsw_sp_port *mlxsw_sp_port)
205{
206 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
207 unsigned char *addr = mlxsw_sp_port->dev->dev_addr;
208
209 ether_addr_copy(addr, mlxsw_sp->base_mac);
210 addr[ETH_ALEN - 1] += mlxsw_sp_port->local_port;
211 return mlxsw_sp_port_dev_addr_set(mlxsw_sp_port, addr);
212}
213
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200214static int mlxsw_sp_port_mtu_set(struct mlxsw_sp_port *mlxsw_sp_port, u16 mtu)
215{
216 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
217 char pmtu_pl[MLXSW_REG_PMTU_LEN];
218 int max_mtu;
219 int err;
220
221 mtu += MLXSW_TXHDR_LEN + ETH_HLEN;
222 mlxsw_reg_pmtu_pack(pmtu_pl, mlxsw_sp_port->local_port, 0);
223 err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(pmtu), pmtu_pl);
224 if (err)
225 return err;
226 max_mtu = mlxsw_reg_pmtu_max_mtu_get(pmtu_pl);
227
228 if (mtu > max_mtu)
229 return -EINVAL;
230
231 mlxsw_reg_pmtu_pack(pmtu_pl, mlxsw_sp_port->local_port, mtu);
232 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(pmtu), pmtu_pl);
233}
234
Ido Schimmelbe945352016-06-09 09:51:39 +0200235static int __mlxsw_sp_port_swid_set(struct mlxsw_sp *mlxsw_sp, u8 local_port,
236 u8 swid)
237{
238 char pspa_pl[MLXSW_REG_PSPA_LEN];
239
240 mlxsw_reg_pspa_pack(pspa_pl, swid, local_port);
241 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(pspa), pspa_pl);
242}
243
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200244static int mlxsw_sp_port_swid_set(struct mlxsw_sp_port *mlxsw_sp_port, u8 swid)
245{
246 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200247
Ido Schimmelbe945352016-06-09 09:51:39 +0200248 return __mlxsw_sp_port_swid_set(mlxsw_sp, mlxsw_sp_port->local_port,
249 swid);
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200250}
251
252static int mlxsw_sp_port_vp_mode_set(struct mlxsw_sp_port *mlxsw_sp_port,
253 bool enable)
254{
255 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
256 char svpe_pl[MLXSW_REG_SVPE_LEN];
257
258 mlxsw_reg_svpe_pack(svpe_pl, mlxsw_sp_port->local_port, enable);
259 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(svpe), svpe_pl);
260}
261
262int mlxsw_sp_port_vid_to_fid_set(struct mlxsw_sp_port *mlxsw_sp_port,
263 enum mlxsw_reg_svfa_mt mt, bool valid, u16 fid,
264 u16 vid)
265{
266 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
267 char svfa_pl[MLXSW_REG_SVFA_LEN];
268
269 mlxsw_reg_svfa_pack(svfa_pl, mlxsw_sp_port->local_port, mt, valid,
270 fid, vid);
271 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(svfa), svfa_pl);
272}
273
274static int mlxsw_sp_port_vid_learning_set(struct mlxsw_sp_port *mlxsw_sp_port,
275 u16 vid, bool learn_enable)
276{
277 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
278 char *spvmlr_pl;
279 int err;
280
281 spvmlr_pl = kmalloc(MLXSW_REG_SPVMLR_LEN, GFP_KERNEL);
282 if (!spvmlr_pl)
283 return -ENOMEM;
284 mlxsw_reg_spvmlr_pack(spvmlr_pl, mlxsw_sp_port->local_port, vid, vid,
285 learn_enable);
286 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(spvmlr), spvmlr_pl);
287 kfree(spvmlr_pl);
288 return err;
289}
290
291static int
292mlxsw_sp_port_system_port_mapping_set(struct mlxsw_sp_port *mlxsw_sp_port)
293{
294 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
295 char sspr_pl[MLXSW_REG_SSPR_LEN];
296
297 mlxsw_reg_sspr_pack(sspr_pl, mlxsw_sp_port->local_port);
298 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sspr), sspr_pl);
299}
300
Ido Schimmeld664b412016-06-09 09:51:40 +0200301static int mlxsw_sp_port_module_info_get(struct mlxsw_sp *mlxsw_sp,
302 u8 local_port, u8 *p_module,
303 u8 *p_width, u8 *p_lane)
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200304{
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200305 char pmlp_pl[MLXSW_REG_PMLP_LEN];
306 int err;
307
Ido Schimmel558c2d52016-02-26 17:32:29 +0100308 mlxsw_reg_pmlp_pack(pmlp_pl, local_port);
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200309 err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(pmlp), pmlp_pl);
310 if (err)
311 return err;
Ido Schimmel558c2d52016-02-26 17:32:29 +0100312 *p_module = mlxsw_reg_pmlp_module_get(pmlp_pl, 0);
313 *p_width = mlxsw_reg_pmlp_width_get(pmlp_pl);
Ido Schimmel2bf9a582016-04-05 10:20:04 +0200314 *p_lane = mlxsw_reg_pmlp_tx_lane_get(pmlp_pl, 0);
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200315 return 0;
316}
317
Ido Schimmel18f1e702016-02-26 17:32:31 +0100318static int mlxsw_sp_port_module_map(struct mlxsw_sp *mlxsw_sp, u8 local_port,
319 u8 module, u8 width, u8 lane)
320{
321 char pmlp_pl[MLXSW_REG_PMLP_LEN];
322 int i;
323
324 mlxsw_reg_pmlp_pack(pmlp_pl, local_port);
325 mlxsw_reg_pmlp_width_set(pmlp_pl, width);
326 for (i = 0; i < width; i++) {
327 mlxsw_reg_pmlp_module_set(pmlp_pl, i, module);
328 mlxsw_reg_pmlp_tx_lane_set(pmlp_pl, i, lane + i); /* Rx & Tx */
329 }
330
331 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(pmlp), pmlp_pl);
332}
333
Ido Schimmel3e9b27b2016-02-26 17:32:28 +0100334static int mlxsw_sp_port_module_unmap(struct mlxsw_sp *mlxsw_sp, u8 local_port)
335{
336 char pmlp_pl[MLXSW_REG_PMLP_LEN];
337
338 mlxsw_reg_pmlp_pack(pmlp_pl, local_port);
339 mlxsw_reg_pmlp_width_set(pmlp_pl, 0);
340 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(pmlp), pmlp_pl);
341}
342
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200343static int mlxsw_sp_port_open(struct net_device *dev)
344{
345 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
346 int err;
347
348 err = mlxsw_sp_port_admin_status_set(mlxsw_sp_port, true);
349 if (err)
350 return err;
351 netif_start_queue(dev);
352 return 0;
353}
354
355static int mlxsw_sp_port_stop(struct net_device *dev)
356{
357 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
358
359 netif_stop_queue(dev);
360 return mlxsw_sp_port_admin_status_set(mlxsw_sp_port, false);
361}
362
363static netdev_tx_t mlxsw_sp_port_xmit(struct sk_buff *skb,
364 struct net_device *dev)
365{
366 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
367 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
368 struct mlxsw_sp_port_pcpu_stats *pcpu_stats;
369 const struct mlxsw_tx_info tx_info = {
370 .local_port = mlxsw_sp_port->local_port,
371 .is_emad = false,
372 };
373 u64 len;
374 int err;
375
Jiri Pirko307c2432016-04-08 19:11:22 +0200376 if (mlxsw_core_skb_transmit_busy(mlxsw_sp->core, &tx_info))
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200377 return NETDEV_TX_BUSY;
378
379 if (unlikely(skb_headroom(skb) < MLXSW_TXHDR_LEN)) {
380 struct sk_buff *skb_orig = skb;
381
382 skb = skb_realloc_headroom(skb, MLXSW_TXHDR_LEN);
383 if (!skb) {
384 this_cpu_inc(mlxsw_sp_port->pcpu_stats->tx_dropped);
385 dev_kfree_skb_any(skb_orig);
386 return NETDEV_TX_OK;
387 }
388 }
389
390 if (eth_skb_pad(skb)) {
391 this_cpu_inc(mlxsw_sp_port->pcpu_stats->tx_dropped);
392 return NETDEV_TX_OK;
393 }
394
395 mlxsw_sp_txhdr_construct(skb, &tx_info);
Nogah Frankel63dcdd32016-06-17 15:09:05 +0200396 /* TX header is consumed by HW on the way so we shouldn't count its
397 * bytes as being sent.
398 */
399 len = skb->len - MLXSW_TXHDR_LEN;
400
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200401 /* Due to a race we might fail here because of a full queue. In that
402 * unlikely case we simply drop the packet.
403 */
Jiri Pirko307c2432016-04-08 19:11:22 +0200404 err = mlxsw_core_skb_transmit(mlxsw_sp->core, skb, &tx_info);
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200405
406 if (!err) {
407 pcpu_stats = this_cpu_ptr(mlxsw_sp_port->pcpu_stats);
408 u64_stats_update_begin(&pcpu_stats->syncp);
409 pcpu_stats->tx_packets++;
410 pcpu_stats->tx_bytes += len;
411 u64_stats_update_end(&pcpu_stats->syncp);
412 } else {
413 this_cpu_inc(mlxsw_sp_port->pcpu_stats->tx_dropped);
414 dev_kfree_skb_any(skb);
415 }
416 return NETDEV_TX_OK;
417}
418
Jiri Pirkoc5b9b512015-12-03 12:12:22 +0100419static void mlxsw_sp_set_rx_mode(struct net_device *dev)
420{
421}
422
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200423static int mlxsw_sp_port_set_mac_address(struct net_device *dev, void *p)
424{
425 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
426 struct sockaddr *addr = p;
427 int err;
428
429 if (!is_valid_ether_addr(addr->sa_data))
430 return -EADDRNOTAVAIL;
431
432 err = mlxsw_sp_port_dev_addr_set(mlxsw_sp_port, addr->sa_data);
433 if (err)
434 return err;
435 memcpy(dev->dev_addr, addr->sa_data, dev->addr_len);
436 return 0;
437}
438
Ido Schimmel9f7ec052016-04-06 17:10:14 +0200439static void mlxsw_sp_pg_buf_pack(char *pbmc_pl, int pg_index, int mtu,
Ido Schimmeld81a6bd2016-04-06 17:10:16 +0200440 bool pause_en, bool pfc_en, u16 delay)
Ido Schimmel8e8dfe92016-04-06 17:10:10 +0200441{
442 u16 pg_size = 2 * MLXSW_SP_BYTES_TO_CELLS(mtu);
443
Ido Schimmeld81a6bd2016-04-06 17:10:16 +0200444 delay = pfc_en ? mlxsw_sp_pfc_delay_get(mtu, delay) :
445 MLXSW_SP_PAUSE_DELAY;
Ido Schimmel9f7ec052016-04-06 17:10:14 +0200446
Ido Schimmeld81a6bd2016-04-06 17:10:16 +0200447 if (pause_en || pfc_en)
Ido Schimmel9f7ec052016-04-06 17:10:14 +0200448 mlxsw_reg_pbmc_lossless_buffer_pack(pbmc_pl, pg_index,
Ido Schimmeld81a6bd2016-04-06 17:10:16 +0200449 pg_size + delay, pg_size);
450 else
Ido Schimmel9f7ec052016-04-06 17:10:14 +0200451 mlxsw_reg_pbmc_lossy_buffer_pack(pbmc_pl, pg_index, pg_size);
Ido Schimmel8e8dfe92016-04-06 17:10:10 +0200452}
453
454int __mlxsw_sp_port_headroom_set(struct mlxsw_sp_port *mlxsw_sp_port, int mtu,
Ido Schimmeld81a6bd2016-04-06 17:10:16 +0200455 u8 *prio_tc, bool pause_en,
456 struct ieee_pfc *my_pfc)
Ido Schimmelff6551e2016-04-06 17:10:03 +0200457{
458 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
Ido Schimmeld81a6bd2016-04-06 17:10:16 +0200459 u8 pfc_en = !!my_pfc ? my_pfc->pfc_en : 0;
460 u16 delay = !!my_pfc ? my_pfc->delay : 0;
Ido Schimmelff6551e2016-04-06 17:10:03 +0200461 char pbmc_pl[MLXSW_REG_PBMC_LEN];
Ido Schimmel8e8dfe92016-04-06 17:10:10 +0200462 int i, j, err;
Ido Schimmelff6551e2016-04-06 17:10:03 +0200463
464 mlxsw_reg_pbmc_pack(pbmc_pl, mlxsw_sp_port->local_port, 0, 0);
465 err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(pbmc), pbmc_pl);
466 if (err)
467 return err;
Ido Schimmel8e8dfe92016-04-06 17:10:10 +0200468
469 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
470 bool configure = false;
Ido Schimmeld81a6bd2016-04-06 17:10:16 +0200471 bool pfc = false;
Ido Schimmel8e8dfe92016-04-06 17:10:10 +0200472
473 for (j = 0; j < IEEE_8021QAZ_MAX_TCS; j++) {
474 if (prio_tc[j] == i) {
Ido Schimmeld81a6bd2016-04-06 17:10:16 +0200475 pfc = pfc_en & BIT(j);
Ido Schimmel8e8dfe92016-04-06 17:10:10 +0200476 configure = true;
477 break;
478 }
479 }
480
481 if (!configure)
482 continue;
Ido Schimmeld81a6bd2016-04-06 17:10:16 +0200483 mlxsw_sp_pg_buf_pack(pbmc_pl, i, mtu, pause_en, pfc, delay);
Ido Schimmel8e8dfe92016-04-06 17:10:10 +0200484 }
485
Ido Schimmelff6551e2016-04-06 17:10:03 +0200486 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(pbmc), pbmc_pl);
487}
488
Ido Schimmel8e8dfe92016-04-06 17:10:10 +0200489static int mlxsw_sp_port_headroom_set(struct mlxsw_sp_port *mlxsw_sp_port,
Ido Schimmel9f7ec052016-04-06 17:10:14 +0200490 int mtu, bool pause_en)
Ido Schimmel8e8dfe92016-04-06 17:10:10 +0200491{
492 u8 def_prio_tc[IEEE_8021QAZ_MAX_TCS] = {0};
493 bool dcb_en = !!mlxsw_sp_port->dcb.ets;
Ido Schimmeld81a6bd2016-04-06 17:10:16 +0200494 struct ieee_pfc *my_pfc;
Ido Schimmel8e8dfe92016-04-06 17:10:10 +0200495 u8 *prio_tc;
496
497 prio_tc = dcb_en ? mlxsw_sp_port->dcb.ets->prio_tc : def_prio_tc;
Ido Schimmeld81a6bd2016-04-06 17:10:16 +0200498 my_pfc = dcb_en ? mlxsw_sp_port->dcb.pfc : NULL;
Ido Schimmel8e8dfe92016-04-06 17:10:10 +0200499
Ido Schimmel9f7ec052016-04-06 17:10:14 +0200500 return __mlxsw_sp_port_headroom_set(mlxsw_sp_port, mtu, prio_tc,
Ido Schimmeld81a6bd2016-04-06 17:10:16 +0200501 pause_en, my_pfc);
Ido Schimmel8e8dfe92016-04-06 17:10:10 +0200502}
503
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200504static int mlxsw_sp_port_change_mtu(struct net_device *dev, int mtu)
505{
506 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
Ido Schimmel9f7ec052016-04-06 17:10:14 +0200507 bool pause_en = mlxsw_sp_port_is_pause_en(mlxsw_sp_port);
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200508 int err;
509
Ido Schimmel9f7ec052016-04-06 17:10:14 +0200510 err = mlxsw_sp_port_headroom_set(mlxsw_sp_port, mtu, pause_en);
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200511 if (err)
512 return err;
Ido Schimmelff6551e2016-04-06 17:10:03 +0200513 err = mlxsw_sp_port_mtu_set(mlxsw_sp_port, mtu);
514 if (err)
515 goto err_port_mtu_set;
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200516 dev->mtu = mtu;
517 return 0;
Ido Schimmelff6551e2016-04-06 17:10:03 +0200518
519err_port_mtu_set:
Ido Schimmel9f7ec052016-04-06 17:10:14 +0200520 mlxsw_sp_port_headroom_set(mlxsw_sp_port, dev->mtu, pause_en);
Ido Schimmelff6551e2016-04-06 17:10:03 +0200521 return err;
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200522}
523
524static struct rtnl_link_stats64 *
525mlxsw_sp_port_get_stats64(struct net_device *dev,
526 struct rtnl_link_stats64 *stats)
527{
528 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
529 struct mlxsw_sp_port_pcpu_stats *p;
530 u64 rx_packets, rx_bytes, tx_packets, tx_bytes;
531 u32 tx_dropped = 0;
532 unsigned int start;
533 int i;
534
535 for_each_possible_cpu(i) {
536 p = per_cpu_ptr(mlxsw_sp_port->pcpu_stats, i);
537 do {
538 start = u64_stats_fetch_begin_irq(&p->syncp);
539 rx_packets = p->rx_packets;
540 rx_bytes = p->rx_bytes;
541 tx_packets = p->tx_packets;
542 tx_bytes = p->tx_bytes;
543 } while (u64_stats_fetch_retry_irq(&p->syncp, start));
544
545 stats->rx_packets += rx_packets;
546 stats->rx_bytes += rx_bytes;
547 stats->tx_packets += tx_packets;
548 stats->tx_bytes += tx_bytes;
549 /* tx_dropped is u32, updated without syncp protection. */
550 tx_dropped += p->tx_dropped;
551 }
552 stats->tx_dropped = tx_dropped;
553 return stats;
554}
555
556int mlxsw_sp_port_vlan_set(struct mlxsw_sp_port *mlxsw_sp_port, u16 vid_begin,
557 u16 vid_end, bool is_member, bool untagged)
558{
559 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
560 char *spvm_pl;
561 int err;
562
563 spvm_pl = kmalloc(MLXSW_REG_SPVM_LEN, GFP_KERNEL);
564 if (!spvm_pl)
565 return -ENOMEM;
566
567 mlxsw_reg_spvm_pack(spvm_pl, mlxsw_sp_port->local_port, vid_begin,
568 vid_end, is_member, untagged);
569 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(spvm), spvm_pl);
570 kfree(spvm_pl);
571 return err;
572}
573
574static int mlxsw_sp_port_vp_mode_trans(struct mlxsw_sp_port *mlxsw_sp_port)
575{
576 enum mlxsw_reg_svfa_mt mt = MLXSW_REG_SVFA_MT_PORT_VID_TO_FID;
577 u16 vid, last_visited_vid;
578 int err;
579
580 for_each_set_bit(vid, mlxsw_sp_port->active_vlans, VLAN_N_VID) {
581 err = mlxsw_sp_port_vid_to_fid_set(mlxsw_sp_port, mt, true, vid,
582 vid);
583 if (err) {
584 last_visited_vid = vid;
585 goto err_port_vid_to_fid_set;
586 }
587 }
588
589 err = mlxsw_sp_port_vp_mode_set(mlxsw_sp_port, true);
590 if (err) {
591 last_visited_vid = VLAN_N_VID;
592 goto err_port_vid_to_fid_set;
593 }
594
595 return 0;
596
597err_port_vid_to_fid_set:
598 for_each_set_bit(vid, mlxsw_sp_port->active_vlans, last_visited_vid)
599 mlxsw_sp_port_vid_to_fid_set(mlxsw_sp_port, mt, false, vid,
600 vid);
601 return err;
602}
603
604static int mlxsw_sp_port_vlan_mode_trans(struct mlxsw_sp_port *mlxsw_sp_port)
605{
606 enum mlxsw_reg_svfa_mt mt = MLXSW_REG_SVFA_MT_PORT_VID_TO_FID;
607 u16 vid;
608 int err;
609
610 err = mlxsw_sp_port_vp_mode_set(mlxsw_sp_port, false);
611 if (err)
612 return err;
613
614 for_each_set_bit(vid, mlxsw_sp_port->active_vlans, VLAN_N_VID) {
615 err = mlxsw_sp_port_vid_to_fid_set(mlxsw_sp_port, mt, false,
616 vid, vid);
617 if (err)
618 return err;
619 }
620
621 return 0;
622}
623
Ido Schimmel7f71eb42015-12-15 16:03:37 +0100624static struct mlxsw_sp_port *
Ido Schimmel0355b592016-06-20 23:04:13 +0200625mlxsw_sp_port_vport_create(struct mlxsw_sp_port *mlxsw_sp_port, u16 vid)
Ido Schimmel7f71eb42015-12-15 16:03:37 +0100626{
627 struct mlxsw_sp_port *mlxsw_sp_vport;
628
629 mlxsw_sp_vport = kzalloc(sizeof(*mlxsw_sp_vport), GFP_KERNEL);
630 if (!mlxsw_sp_vport)
631 return NULL;
632
633 /* dev will be set correctly after the VLAN device is linked
634 * with the real device. In case of bridge SELF invocation, dev
635 * will remain as is.
636 */
637 mlxsw_sp_vport->dev = mlxsw_sp_port->dev;
638 mlxsw_sp_vport->mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
639 mlxsw_sp_vport->local_port = mlxsw_sp_port->local_port;
640 mlxsw_sp_vport->stp_state = BR_STATE_FORWARDING;
Ido Schimmel272c4472015-12-15 16:03:47 +0100641 mlxsw_sp_vport->lagged = mlxsw_sp_port->lagged;
642 mlxsw_sp_vport->lag_id = mlxsw_sp_port->lag_id;
Ido Schimmel0355b592016-06-20 23:04:13 +0200643 mlxsw_sp_vport->vport.vid = vid;
Ido Schimmel7f71eb42015-12-15 16:03:37 +0100644
645 list_add(&mlxsw_sp_vport->vport.list, &mlxsw_sp_port->vports_list);
646
647 return mlxsw_sp_vport;
648}
649
650static void mlxsw_sp_port_vport_destroy(struct mlxsw_sp_port *mlxsw_sp_vport)
651{
652 list_del(&mlxsw_sp_vport->vport.list);
653 kfree(mlxsw_sp_vport);
654}
655
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200656int mlxsw_sp_port_add_vid(struct net_device *dev, __be16 __always_unused proto,
657 u16 vid)
658{
659 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
Ido Schimmel7f71eb42015-12-15 16:03:37 +0100660 struct mlxsw_sp_port *mlxsw_sp_vport;
Ido Schimmel52697a92016-07-02 11:00:09 +0200661 bool untagged = vid == 1;
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200662 int err;
663
664 /* VLAN 0 is added to HW filter when device goes up, but it is
665 * reserved in our case, so simply return.
666 */
667 if (!vid)
668 return 0;
669
Ido Schimmel7f71eb42015-12-15 16:03:37 +0100670 if (mlxsw_sp_port_vport_find(mlxsw_sp_port, vid)) {
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200671 netdev_warn(dev, "VID=%d already configured\n", vid);
672 return 0;
673 }
674
Ido Schimmel0355b592016-06-20 23:04:13 +0200675 mlxsw_sp_vport = mlxsw_sp_port_vport_create(mlxsw_sp_port, vid);
Ido Schimmel7f71eb42015-12-15 16:03:37 +0100676 if (!mlxsw_sp_vport) {
677 netdev_err(dev, "Failed to create vPort for VID=%d\n", vid);
Ido Schimmel0355b592016-06-20 23:04:13 +0200678 return -ENOMEM;
Ido Schimmel7f71eb42015-12-15 16:03:37 +0100679 }
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200680
681 /* When adding the first VLAN interface on a bridged port we need to
682 * transition all the active 802.1Q bridge VLANs to use explicit
683 * {Port, VID} to FID mappings and set the port's mode to Virtual mode.
684 */
Ido Schimmel7f71eb42015-12-15 16:03:37 +0100685 if (list_is_singular(&mlxsw_sp_port->vports_list)) {
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200686 err = mlxsw_sp_port_vp_mode_trans(mlxsw_sp_port);
687 if (err) {
688 netdev_err(dev, "Failed to set to Virtual mode\n");
Ido Schimmel7f71eb42015-12-15 16:03:37 +0100689 goto err_port_vp_mode_trans;
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200690 }
691 }
692
Ido Schimmel7f71eb42015-12-15 16:03:37 +0100693 err = mlxsw_sp_port_vid_learning_set(mlxsw_sp_vport, vid, false);
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200694 if (err) {
695 netdev_err(dev, "Failed to disable learning for VID=%d\n", vid);
696 goto err_port_vid_learning_set;
697 }
698
Ido Schimmel52697a92016-07-02 11:00:09 +0200699 err = mlxsw_sp_port_vlan_set(mlxsw_sp_vport, vid, vid, true, untagged);
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200700 if (err) {
701 netdev_err(dev, "Failed to set VLAN membership for VID=%d\n",
702 vid);
703 goto err_port_add_vid;
704 }
705
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200706 return 0;
707
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200708err_port_add_vid:
Ido Schimmel7f71eb42015-12-15 16:03:37 +0100709 mlxsw_sp_port_vid_learning_set(mlxsw_sp_vport, vid, true);
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200710err_port_vid_learning_set:
Ido Schimmel7f71eb42015-12-15 16:03:37 +0100711 if (list_is_singular(&mlxsw_sp_port->vports_list))
712 mlxsw_sp_port_vlan_mode_trans(mlxsw_sp_port);
713err_port_vp_mode_trans:
Ido Schimmel7f71eb42015-12-15 16:03:37 +0100714 mlxsw_sp_port_vport_destroy(mlxsw_sp_vport);
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200715 return err;
716}
717
Ido Schimmel32d863f2016-07-02 11:00:10 +0200718static int mlxsw_sp_port_kill_vid(struct net_device *dev,
719 __be16 __always_unused proto, u16 vid)
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200720{
721 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
Ido Schimmel7f71eb42015-12-15 16:03:37 +0100722 struct mlxsw_sp_port *mlxsw_sp_vport;
Ido Schimmel1c800752016-06-20 23:04:20 +0200723 struct mlxsw_sp_fid *f;
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200724 int err;
725
726 /* VLAN 0 is removed from HW filter when device goes down, but
727 * it is reserved in our case, so simply return.
728 */
729 if (!vid)
730 return 0;
731
Ido Schimmel7f71eb42015-12-15 16:03:37 +0100732 mlxsw_sp_vport = mlxsw_sp_port_vport_find(mlxsw_sp_port, vid);
733 if (!mlxsw_sp_vport) {
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200734 netdev_warn(dev, "VID=%d does not exist\n", vid);
735 return 0;
736 }
737
Ido Schimmel7f71eb42015-12-15 16:03:37 +0100738 err = mlxsw_sp_port_vlan_set(mlxsw_sp_vport, vid, vid, false, false);
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200739 if (err) {
740 netdev_err(dev, "Failed to set VLAN membership for VID=%d\n",
741 vid);
742 return err;
743 }
744
Ido Schimmel7f71eb42015-12-15 16:03:37 +0100745 err = mlxsw_sp_port_vid_learning_set(mlxsw_sp_vport, vid, true);
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200746 if (err) {
747 netdev_err(dev, "Failed to enable learning for VID=%d\n", vid);
748 return err;
749 }
750
Ido Schimmel1c800752016-06-20 23:04:20 +0200751 /* Drop FID reference. If this was the last reference the
752 * resources will be freed.
753 */
754 f = mlxsw_sp_vport_fid_get(mlxsw_sp_vport);
755 if (f && !WARN_ON(!f->leave))
756 f->leave(mlxsw_sp_vport);
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200757
758 /* When removing the last VLAN interface on a bridged port we need to
759 * transition all active 802.1Q bridge VLANs to use VID to FID
760 * mappings and set port's mode to VLAN mode.
761 */
Ido Schimmel7f71eb42015-12-15 16:03:37 +0100762 if (list_is_singular(&mlxsw_sp_port->vports_list)) {
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200763 err = mlxsw_sp_port_vlan_mode_trans(mlxsw_sp_port);
764 if (err) {
765 netdev_err(dev, "Failed to set to VLAN mode\n");
766 return err;
767 }
768 }
769
Ido Schimmel7f71eb42015-12-15 16:03:37 +0100770 mlxsw_sp_port_vport_destroy(mlxsw_sp_vport);
771
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200772 return 0;
773}
774
Ido Schimmel2bf9a582016-04-05 10:20:04 +0200775static int mlxsw_sp_port_get_phys_port_name(struct net_device *dev, char *name,
776 size_t len)
777{
778 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
Ido Schimmeld664b412016-06-09 09:51:40 +0200779 u8 module = mlxsw_sp_port->mapping.module;
780 u8 width = mlxsw_sp_port->mapping.width;
781 u8 lane = mlxsw_sp_port->mapping.lane;
Ido Schimmel2bf9a582016-04-05 10:20:04 +0200782 int err;
783
Ido Schimmel2bf9a582016-04-05 10:20:04 +0200784 if (!mlxsw_sp_port->split)
785 err = snprintf(name, len, "p%d", module + 1);
786 else
787 err = snprintf(name, len, "p%ds%d", module + 1,
788 lane / width);
789
790 if (err >= len)
791 return -EINVAL;
792
793 return 0;
794}
795
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200796static const struct net_device_ops mlxsw_sp_port_netdev_ops = {
797 .ndo_open = mlxsw_sp_port_open,
798 .ndo_stop = mlxsw_sp_port_stop,
799 .ndo_start_xmit = mlxsw_sp_port_xmit,
Jiri Pirkoc5b9b512015-12-03 12:12:22 +0100800 .ndo_set_rx_mode = mlxsw_sp_set_rx_mode,
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200801 .ndo_set_mac_address = mlxsw_sp_port_set_mac_address,
802 .ndo_change_mtu = mlxsw_sp_port_change_mtu,
803 .ndo_get_stats64 = mlxsw_sp_port_get_stats64,
804 .ndo_vlan_rx_add_vid = mlxsw_sp_port_add_vid,
805 .ndo_vlan_rx_kill_vid = mlxsw_sp_port_kill_vid,
Jiri Pirko6cf3c972016-07-05 11:27:39 +0200806 .ndo_neigh_construct = mlxsw_sp_router_neigh_construct,
807 .ndo_neigh_destroy = mlxsw_sp_router_neigh_destroy,
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200808 .ndo_fdb_add = switchdev_port_fdb_add,
809 .ndo_fdb_del = switchdev_port_fdb_del,
810 .ndo_fdb_dump = switchdev_port_fdb_dump,
811 .ndo_bridge_setlink = switchdev_port_bridge_setlink,
812 .ndo_bridge_getlink = switchdev_port_bridge_getlink,
813 .ndo_bridge_dellink = switchdev_port_bridge_dellink,
Ido Schimmel2bf9a582016-04-05 10:20:04 +0200814 .ndo_get_phys_port_name = mlxsw_sp_port_get_phys_port_name,
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200815};
816
817static void mlxsw_sp_port_get_drvinfo(struct net_device *dev,
818 struct ethtool_drvinfo *drvinfo)
819{
820 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
821 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
822
823 strlcpy(drvinfo->driver, mlxsw_sp_driver_name, sizeof(drvinfo->driver));
824 strlcpy(drvinfo->version, mlxsw_sp_driver_version,
825 sizeof(drvinfo->version));
826 snprintf(drvinfo->fw_version, sizeof(drvinfo->fw_version),
827 "%d.%d.%d",
828 mlxsw_sp->bus_info->fw_rev.major,
829 mlxsw_sp->bus_info->fw_rev.minor,
830 mlxsw_sp->bus_info->fw_rev.subminor);
831 strlcpy(drvinfo->bus_info, mlxsw_sp->bus_info->device_name,
832 sizeof(drvinfo->bus_info));
833}
834
Ido Schimmel9f7ec052016-04-06 17:10:14 +0200835static void mlxsw_sp_port_get_pauseparam(struct net_device *dev,
836 struct ethtool_pauseparam *pause)
837{
838 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
839
840 pause->rx_pause = mlxsw_sp_port->link.rx_pause;
841 pause->tx_pause = mlxsw_sp_port->link.tx_pause;
842}
843
844static int mlxsw_sp_port_pause_set(struct mlxsw_sp_port *mlxsw_sp_port,
845 struct ethtool_pauseparam *pause)
846{
847 char pfcc_pl[MLXSW_REG_PFCC_LEN];
848
849 mlxsw_reg_pfcc_pack(pfcc_pl, mlxsw_sp_port->local_port);
850 mlxsw_reg_pfcc_pprx_set(pfcc_pl, pause->rx_pause);
851 mlxsw_reg_pfcc_pptx_set(pfcc_pl, pause->tx_pause);
852
853 return mlxsw_reg_write(mlxsw_sp_port->mlxsw_sp->core, MLXSW_REG(pfcc),
854 pfcc_pl);
855}
856
857static int mlxsw_sp_port_set_pauseparam(struct net_device *dev,
858 struct ethtool_pauseparam *pause)
859{
860 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
861 bool pause_en = pause->tx_pause || pause->rx_pause;
862 int err;
863
Ido Schimmeld81a6bd2016-04-06 17:10:16 +0200864 if (mlxsw_sp_port->dcb.pfc && mlxsw_sp_port->dcb.pfc->pfc_en) {
865 netdev_err(dev, "PFC already enabled on port\n");
866 return -EINVAL;
867 }
868
Ido Schimmel9f7ec052016-04-06 17:10:14 +0200869 if (pause->autoneg) {
870 netdev_err(dev, "PAUSE frames autonegotiation isn't supported\n");
871 return -EINVAL;
872 }
873
874 err = mlxsw_sp_port_headroom_set(mlxsw_sp_port, dev->mtu, pause_en);
875 if (err) {
876 netdev_err(dev, "Failed to configure port's headroom\n");
877 return err;
878 }
879
880 err = mlxsw_sp_port_pause_set(mlxsw_sp_port, pause);
881 if (err) {
882 netdev_err(dev, "Failed to set PAUSE parameters\n");
883 goto err_port_pause_configure;
884 }
885
886 mlxsw_sp_port->link.rx_pause = pause->rx_pause;
887 mlxsw_sp_port->link.tx_pause = pause->tx_pause;
888
889 return 0;
890
891err_port_pause_configure:
892 pause_en = mlxsw_sp_port_is_pause_en(mlxsw_sp_port);
893 mlxsw_sp_port_headroom_set(mlxsw_sp_port, dev->mtu, pause_en);
894 return err;
895}
896
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200897struct mlxsw_sp_port_hw_stats {
898 char str[ETH_GSTRING_LEN];
899 u64 (*getter)(char *payload);
900};
901
902static const struct mlxsw_sp_port_hw_stats mlxsw_sp_port_hw_stats[] = {
903 {
904 .str = "a_frames_transmitted_ok",
905 .getter = mlxsw_reg_ppcnt_a_frames_transmitted_ok_get,
906 },
907 {
908 .str = "a_frames_received_ok",
909 .getter = mlxsw_reg_ppcnt_a_frames_received_ok_get,
910 },
911 {
912 .str = "a_frame_check_sequence_errors",
913 .getter = mlxsw_reg_ppcnt_a_frame_check_sequence_errors_get,
914 },
915 {
916 .str = "a_alignment_errors",
917 .getter = mlxsw_reg_ppcnt_a_alignment_errors_get,
918 },
919 {
920 .str = "a_octets_transmitted_ok",
921 .getter = mlxsw_reg_ppcnt_a_octets_transmitted_ok_get,
922 },
923 {
924 .str = "a_octets_received_ok",
925 .getter = mlxsw_reg_ppcnt_a_octets_received_ok_get,
926 },
927 {
928 .str = "a_multicast_frames_xmitted_ok",
929 .getter = mlxsw_reg_ppcnt_a_multicast_frames_xmitted_ok_get,
930 },
931 {
932 .str = "a_broadcast_frames_xmitted_ok",
933 .getter = mlxsw_reg_ppcnt_a_broadcast_frames_xmitted_ok_get,
934 },
935 {
936 .str = "a_multicast_frames_received_ok",
937 .getter = mlxsw_reg_ppcnt_a_multicast_frames_received_ok_get,
938 },
939 {
940 .str = "a_broadcast_frames_received_ok",
941 .getter = mlxsw_reg_ppcnt_a_broadcast_frames_received_ok_get,
942 },
943 {
944 .str = "a_in_range_length_errors",
945 .getter = mlxsw_reg_ppcnt_a_in_range_length_errors_get,
946 },
947 {
948 .str = "a_out_of_range_length_field",
949 .getter = mlxsw_reg_ppcnt_a_out_of_range_length_field_get,
950 },
951 {
952 .str = "a_frame_too_long_errors",
953 .getter = mlxsw_reg_ppcnt_a_frame_too_long_errors_get,
954 },
955 {
956 .str = "a_symbol_error_during_carrier",
957 .getter = mlxsw_reg_ppcnt_a_symbol_error_during_carrier_get,
958 },
959 {
960 .str = "a_mac_control_frames_transmitted",
961 .getter = mlxsw_reg_ppcnt_a_mac_control_frames_transmitted_get,
962 },
963 {
964 .str = "a_mac_control_frames_received",
965 .getter = mlxsw_reg_ppcnt_a_mac_control_frames_received_get,
966 },
967 {
968 .str = "a_unsupported_opcodes_received",
969 .getter = mlxsw_reg_ppcnt_a_unsupported_opcodes_received_get,
970 },
971 {
972 .str = "a_pause_mac_ctrl_frames_received",
973 .getter = mlxsw_reg_ppcnt_a_pause_mac_ctrl_frames_received_get,
974 },
975 {
976 .str = "a_pause_mac_ctrl_frames_xmitted",
977 .getter = mlxsw_reg_ppcnt_a_pause_mac_ctrl_frames_transmitted_get,
978 },
979};
980
981#define MLXSW_SP_PORT_HW_STATS_LEN ARRAY_SIZE(mlxsw_sp_port_hw_stats)
982
983static void mlxsw_sp_port_get_strings(struct net_device *dev,
984 u32 stringset, u8 *data)
985{
986 u8 *p = data;
987 int i;
988
989 switch (stringset) {
990 case ETH_SS_STATS:
991 for (i = 0; i < MLXSW_SP_PORT_HW_STATS_LEN; i++) {
992 memcpy(p, mlxsw_sp_port_hw_stats[i].str,
993 ETH_GSTRING_LEN);
994 p += ETH_GSTRING_LEN;
995 }
996 break;
997 }
998}
999
Ido Schimmel3a66ee32015-11-27 13:45:55 +01001000static int mlxsw_sp_port_set_phys_id(struct net_device *dev,
1001 enum ethtool_phys_id_state state)
1002{
1003 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
1004 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
1005 char mlcr_pl[MLXSW_REG_MLCR_LEN];
1006 bool active;
1007
1008 switch (state) {
1009 case ETHTOOL_ID_ACTIVE:
1010 active = true;
1011 break;
1012 case ETHTOOL_ID_INACTIVE:
1013 active = false;
1014 break;
1015 default:
1016 return -EOPNOTSUPP;
1017 }
1018
1019 mlxsw_reg_mlcr_pack(mlcr_pl, mlxsw_sp_port->local_port, active);
1020 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(mlcr), mlcr_pl);
1021}
1022
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001023static void mlxsw_sp_port_get_stats(struct net_device *dev,
1024 struct ethtool_stats *stats, u64 *data)
1025{
1026 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
1027 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
1028 char ppcnt_pl[MLXSW_REG_PPCNT_LEN];
1029 int i;
1030 int err;
1031
Ido Schimmel34dba0a2016-04-06 17:10:15 +02001032 mlxsw_reg_ppcnt_pack(ppcnt_pl, mlxsw_sp_port->local_port,
1033 MLXSW_REG_PPCNT_IEEE_8023_CNT, 0);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001034 err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(ppcnt), ppcnt_pl);
1035 for (i = 0; i < MLXSW_SP_PORT_HW_STATS_LEN; i++)
1036 data[i] = !err ? mlxsw_sp_port_hw_stats[i].getter(ppcnt_pl) : 0;
1037}
1038
1039static int mlxsw_sp_port_get_sset_count(struct net_device *dev, int sset)
1040{
1041 switch (sset) {
1042 case ETH_SS_STATS:
1043 return MLXSW_SP_PORT_HW_STATS_LEN;
1044 default:
1045 return -EOPNOTSUPP;
1046 }
1047}
1048
1049struct mlxsw_sp_port_link_mode {
1050 u32 mask;
1051 u32 supported;
1052 u32 advertised;
1053 u32 speed;
1054};
1055
1056static const struct mlxsw_sp_port_link_mode mlxsw_sp_port_link_mode[] = {
1057 {
1058 .mask = MLXSW_REG_PTYS_ETH_SPEED_100BASE_T,
1059 .supported = SUPPORTED_100baseT_Full,
1060 .advertised = ADVERTISED_100baseT_Full,
1061 .speed = 100,
1062 },
1063 {
1064 .mask = MLXSW_REG_PTYS_ETH_SPEED_100BASE_TX,
1065 .speed = 100,
1066 },
1067 {
1068 .mask = MLXSW_REG_PTYS_ETH_SPEED_SGMII |
1069 MLXSW_REG_PTYS_ETH_SPEED_1000BASE_KX,
1070 .supported = SUPPORTED_1000baseKX_Full,
1071 .advertised = ADVERTISED_1000baseKX_Full,
1072 .speed = 1000,
1073 },
1074 {
1075 .mask = MLXSW_REG_PTYS_ETH_SPEED_10GBASE_T,
1076 .supported = SUPPORTED_10000baseT_Full,
1077 .advertised = ADVERTISED_10000baseT_Full,
1078 .speed = 10000,
1079 },
1080 {
1081 .mask = MLXSW_REG_PTYS_ETH_SPEED_10GBASE_CX4 |
1082 MLXSW_REG_PTYS_ETH_SPEED_10GBASE_KX4,
1083 .supported = SUPPORTED_10000baseKX4_Full,
1084 .advertised = ADVERTISED_10000baseKX4_Full,
1085 .speed = 10000,
1086 },
1087 {
1088 .mask = MLXSW_REG_PTYS_ETH_SPEED_10GBASE_KR |
1089 MLXSW_REG_PTYS_ETH_SPEED_10GBASE_CR |
1090 MLXSW_REG_PTYS_ETH_SPEED_10GBASE_SR |
1091 MLXSW_REG_PTYS_ETH_SPEED_10GBASE_ER_LR,
1092 .supported = SUPPORTED_10000baseKR_Full,
1093 .advertised = ADVERTISED_10000baseKR_Full,
1094 .speed = 10000,
1095 },
1096 {
1097 .mask = MLXSW_REG_PTYS_ETH_SPEED_20GBASE_KR2,
1098 .supported = SUPPORTED_20000baseKR2_Full,
1099 .advertised = ADVERTISED_20000baseKR2_Full,
1100 .speed = 20000,
1101 },
1102 {
1103 .mask = MLXSW_REG_PTYS_ETH_SPEED_40GBASE_CR4,
1104 .supported = SUPPORTED_40000baseCR4_Full,
1105 .advertised = ADVERTISED_40000baseCR4_Full,
1106 .speed = 40000,
1107 },
1108 {
1109 .mask = MLXSW_REG_PTYS_ETH_SPEED_40GBASE_KR4,
1110 .supported = SUPPORTED_40000baseKR4_Full,
1111 .advertised = ADVERTISED_40000baseKR4_Full,
1112 .speed = 40000,
1113 },
1114 {
1115 .mask = MLXSW_REG_PTYS_ETH_SPEED_40GBASE_SR4,
1116 .supported = SUPPORTED_40000baseSR4_Full,
1117 .advertised = ADVERTISED_40000baseSR4_Full,
1118 .speed = 40000,
1119 },
1120 {
1121 .mask = MLXSW_REG_PTYS_ETH_SPEED_40GBASE_LR4_ER4,
1122 .supported = SUPPORTED_40000baseLR4_Full,
1123 .advertised = ADVERTISED_40000baseLR4_Full,
1124 .speed = 40000,
1125 },
1126 {
1127 .mask = MLXSW_REG_PTYS_ETH_SPEED_25GBASE_CR |
1128 MLXSW_REG_PTYS_ETH_SPEED_25GBASE_KR |
1129 MLXSW_REG_PTYS_ETH_SPEED_25GBASE_SR,
1130 .speed = 25000,
1131 },
1132 {
1133 .mask = MLXSW_REG_PTYS_ETH_SPEED_50GBASE_KR4 |
1134 MLXSW_REG_PTYS_ETH_SPEED_50GBASE_CR2 |
1135 MLXSW_REG_PTYS_ETH_SPEED_50GBASE_KR2,
1136 .speed = 50000,
1137 },
1138 {
1139 .mask = MLXSW_REG_PTYS_ETH_SPEED_56GBASE_R4,
1140 .supported = SUPPORTED_56000baseKR4_Full,
1141 .advertised = ADVERTISED_56000baseKR4_Full,
1142 .speed = 56000,
1143 },
1144 {
1145 .mask = MLXSW_REG_PTYS_ETH_SPEED_100GBASE_CR4 |
1146 MLXSW_REG_PTYS_ETH_SPEED_100GBASE_SR4 |
1147 MLXSW_REG_PTYS_ETH_SPEED_100GBASE_KR4 |
1148 MLXSW_REG_PTYS_ETH_SPEED_100GBASE_LR4_ER4,
1149 .speed = 100000,
1150 },
1151};
1152
1153#define MLXSW_SP_PORT_LINK_MODE_LEN ARRAY_SIZE(mlxsw_sp_port_link_mode)
1154
1155static u32 mlxsw_sp_from_ptys_supported_port(u32 ptys_eth_proto)
1156{
1157 if (ptys_eth_proto & (MLXSW_REG_PTYS_ETH_SPEED_10GBASE_CR |
1158 MLXSW_REG_PTYS_ETH_SPEED_10GBASE_SR |
1159 MLXSW_REG_PTYS_ETH_SPEED_40GBASE_CR4 |
1160 MLXSW_REG_PTYS_ETH_SPEED_40GBASE_SR4 |
1161 MLXSW_REG_PTYS_ETH_SPEED_100GBASE_SR4 |
1162 MLXSW_REG_PTYS_ETH_SPEED_SGMII))
1163 return SUPPORTED_FIBRE;
1164
1165 if (ptys_eth_proto & (MLXSW_REG_PTYS_ETH_SPEED_10GBASE_KR |
1166 MLXSW_REG_PTYS_ETH_SPEED_10GBASE_KX4 |
1167 MLXSW_REG_PTYS_ETH_SPEED_40GBASE_KR4 |
1168 MLXSW_REG_PTYS_ETH_SPEED_100GBASE_KR4 |
1169 MLXSW_REG_PTYS_ETH_SPEED_1000BASE_KX))
1170 return SUPPORTED_Backplane;
1171 return 0;
1172}
1173
1174static u32 mlxsw_sp_from_ptys_supported_link(u32 ptys_eth_proto)
1175{
1176 u32 modes = 0;
1177 int i;
1178
1179 for (i = 0; i < MLXSW_SP_PORT_LINK_MODE_LEN; i++) {
1180 if (ptys_eth_proto & mlxsw_sp_port_link_mode[i].mask)
1181 modes |= mlxsw_sp_port_link_mode[i].supported;
1182 }
1183 return modes;
1184}
1185
1186static u32 mlxsw_sp_from_ptys_advert_link(u32 ptys_eth_proto)
1187{
1188 u32 modes = 0;
1189 int i;
1190
1191 for (i = 0; i < MLXSW_SP_PORT_LINK_MODE_LEN; i++) {
1192 if (ptys_eth_proto & mlxsw_sp_port_link_mode[i].mask)
1193 modes |= mlxsw_sp_port_link_mode[i].advertised;
1194 }
1195 return modes;
1196}
1197
1198static void mlxsw_sp_from_ptys_speed_duplex(bool carrier_ok, u32 ptys_eth_proto,
1199 struct ethtool_cmd *cmd)
1200{
1201 u32 speed = SPEED_UNKNOWN;
1202 u8 duplex = DUPLEX_UNKNOWN;
1203 int i;
1204
1205 if (!carrier_ok)
1206 goto out;
1207
1208 for (i = 0; i < MLXSW_SP_PORT_LINK_MODE_LEN; i++) {
1209 if (ptys_eth_proto & mlxsw_sp_port_link_mode[i].mask) {
1210 speed = mlxsw_sp_port_link_mode[i].speed;
1211 duplex = DUPLEX_FULL;
1212 break;
1213 }
1214 }
1215out:
1216 ethtool_cmd_speed_set(cmd, speed);
1217 cmd->duplex = duplex;
1218}
1219
1220static u8 mlxsw_sp_port_connector_port(u32 ptys_eth_proto)
1221{
1222 if (ptys_eth_proto & (MLXSW_REG_PTYS_ETH_SPEED_10GBASE_SR |
1223 MLXSW_REG_PTYS_ETH_SPEED_40GBASE_SR4 |
1224 MLXSW_REG_PTYS_ETH_SPEED_100GBASE_SR4 |
1225 MLXSW_REG_PTYS_ETH_SPEED_SGMII))
1226 return PORT_FIBRE;
1227
1228 if (ptys_eth_proto & (MLXSW_REG_PTYS_ETH_SPEED_10GBASE_CR |
1229 MLXSW_REG_PTYS_ETH_SPEED_40GBASE_CR4 |
1230 MLXSW_REG_PTYS_ETH_SPEED_100GBASE_CR4))
1231 return PORT_DA;
1232
1233 if (ptys_eth_proto & (MLXSW_REG_PTYS_ETH_SPEED_10GBASE_KR |
1234 MLXSW_REG_PTYS_ETH_SPEED_10GBASE_KX4 |
1235 MLXSW_REG_PTYS_ETH_SPEED_40GBASE_KR4 |
1236 MLXSW_REG_PTYS_ETH_SPEED_100GBASE_KR4))
1237 return PORT_NONE;
1238
1239 return PORT_OTHER;
1240}
1241
1242static int mlxsw_sp_port_get_settings(struct net_device *dev,
1243 struct ethtool_cmd *cmd)
1244{
1245 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
1246 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
1247 char ptys_pl[MLXSW_REG_PTYS_LEN];
1248 u32 eth_proto_cap;
1249 u32 eth_proto_admin;
1250 u32 eth_proto_oper;
1251 int err;
1252
1253 mlxsw_reg_ptys_pack(ptys_pl, mlxsw_sp_port->local_port, 0);
1254 err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(ptys), ptys_pl);
1255 if (err) {
1256 netdev_err(dev, "Failed to get proto");
1257 return err;
1258 }
1259 mlxsw_reg_ptys_unpack(ptys_pl, &eth_proto_cap,
1260 &eth_proto_admin, &eth_proto_oper);
1261
1262 cmd->supported = mlxsw_sp_from_ptys_supported_port(eth_proto_cap) |
1263 mlxsw_sp_from_ptys_supported_link(eth_proto_cap) |
1264 SUPPORTED_Pause | SUPPORTED_Asym_Pause;
1265 cmd->advertising = mlxsw_sp_from_ptys_advert_link(eth_proto_admin);
1266 mlxsw_sp_from_ptys_speed_duplex(netif_carrier_ok(dev),
1267 eth_proto_oper, cmd);
1268
1269 eth_proto_oper = eth_proto_oper ? eth_proto_oper : eth_proto_cap;
1270 cmd->port = mlxsw_sp_port_connector_port(eth_proto_oper);
1271 cmd->lp_advertising = mlxsw_sp_from_ptys_advert_link(eth_proto_oper);
1272
1273 cmd->transceiver = XCVR_INTERNAL;
1274 return 0;
1275}
1276
1277static u32 mlxsw_sp_to_ptys_advert_link(u32 advertising)
1278{
1279 u32 ptys_proto = 0;
1280 int i;
1281
1282 for (i = 0; i < MLXSW_SP_PORT_LINK_MODE_LEN; i++) {
1283 if (advertising & mlxsw_sp_port_link_mode[i].advertised)
1284 ptys_proto |= mlxsw_sp_port_link_mode[i].mask;
1285 }
1286 return ptys_proto;
1287}
1288
1289static u32 mlxsw_sp_to_ptys_speed(u32 speed)
1290{
1291 u32 ptys_proto = 0;
1292 int i;
1293
1294 for (i = 0; i < MLXSW_SP_PORT_LINK_MODE_LEN; i++) {
1295 if (speed == mlxsw_sp_port_link_mode[i].speed)
1296 ptys_proto |= mlxsw_sp_port_link_mode[i].mask;
1297 }
1298 return ptys_proto;
1299}
1300
Ido Schimmel18f1e702016-02-26 17:32:31 +01001301static u32 mlxsw_sp_to_ptys_upper_speed(u32 upper_speed)
1302{
1303 u32 ptys_proto = 0;
1304 int i;
1305
1306 for (i = 0; i < MLXSW_SP_PORT_LINK_MODE_LEN; i++) {
1307 if (mlxsw_sp_port_link_mode[i].speed <= upper_speed)
1308 ptys_proto |= mlxsw_sp_port_link_mode[i].mask;
1309 }
1310 return ptys_proto;
1311}
1312
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001313static int mlxsw_sp_port_set_settings(struct net_device *dev,
1314 struct ethtool_cmd *cmd)
1315{
1316 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
1317 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
1318 char ptys_pl[MLXSW_REG_PTYS_LEN];
1319 u32 speed;
1320 u32 eth_proto_new;
1321 u32 eth_proto_cap;
1322 u32 eth_proto_admin;
1323 bool is_up;
1324 int err;
1325
1326 speed = ethtool_cmd_speed(cmd);
1327
1328 eth_proto_new = cmd->autoneg == AUTONEG_ENABLE ?
1329 mlxsw_sp_to_ptys_advert_link(cmd->advertising) :
1330 mlxsw_sp_to_ptys_speed(speed);
1331
1332 mlxsw_reg_ptys_pack(ptys_pl, mlxsw_sp_port->local_port, 0);
1333 err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(ptys), ptys_pl);
1334 if (err) {
1335 netdev_err(dev, "Failed to get proto");
1336 return err;
1337 }
1338 mlxsw_reg_ptys_unpack(ptys_pl, &eth_proto_cap, &eth_proto_admin, NULL);
1339
1340 eth_proto_new = eth_proto_new & eth_proto_cap;
1341 if (!eth_proto_new) {
1342 netdev_err(dev, "Not supported proto admin requested");
1343 return -EINVAL;
1344 }
1345 if (eth_proto_new == eth_proto_admin)
1346 return 0;
1347
1348 mlxsw_reg_ptys_pack(ptys_pl, mlxsw_sp_port->local_port, eth_proto_new);
1349 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ptys), ptys_pl);
1350 if (err) {
1351 netdev_err(dev, "Failed to set proto admin");
1352 return err;
1353 }
1354
1355 err = mlxsw_sp_port_oper_status_get(mlxsw_sp_port, &is_up);
1356 if (err) {
1357 netdev_err(dev, "Failed to get oper status");
1358 return err;
1359 }
1360 if (!is_up)
1361 return 0;
1362
1363 err = mlxsw_sp_port_admin_status_set(mlxsw_sp_port, false);
1364 if (err) {
1365 netdev_err(dev, "Failed to set admin status");
1366 return err;
1367 }
1368
1369 err = mlxsw_sp_port_admin_status_set(mlxsw_sp_port, true);
1370 if (err) {
1371 netdev_err(dev, "Failed to set admin status");
1372 return err;
1373 }
1374
1375 return 0;
1376}
1377
1378static const struct ethtool_ops mlxsw_sp_port_ethtool_ops = {
1379 .get_drvinfo = mlxsw_sp_port_get_drvinfo,
1380 .get_link = ethtool_op_get_link,
Ido Schimmel9f7ec052016-04-06 17:10:14 +02001381 .get_pauseparam = mlxsw_sp_port_get_pauseparam,
1382 .set_pauseparam = mlxsw_sp_port_set_pauseparam,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001383 .get_strings = mlxsw_sp_port_get_strings,
Ido Schimmel3a66ee32015-11-27 13:45:55 +01001384 .set_phys_id = mlxsw_sp_port_set_phys_id,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001385 .get_ethtool_stats = mlxsw_sp_port_get_stats,
1386 .get_sset_count = mlxsw_sp_port_get_sset_count,
1387 .get_settings = mlxsw_sp_port_get_settings,
1388 .set_settings = mlxsw_sp_port_set_settings,
1389};
1390
Ido Schimmel18f1e702016-02-26 17:32:31 +01001391static int
1392mlxsw_sp_port_speed_by_width_set(struct mlxsw_sp_port *mlxsw_sp_port, u8 width)
1393{
1394 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
1395 u32 upper_speed = MLXSW_SP_PORT_BASE_SPEED * width;
1396 char ptys_pl[MLXSW_REG_PTYS_LEN];
1397 u32 eth_proto_admin;
1398
1399 eth_proto_admin = mlxsw_sp_to_ptys_upper_speed(upper_speed);
1400 mlxsw_reg_ptys_pack(ptys_pl, mlxsw_sp_port->local_port,
1401 eth_proto_admin);
1402 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ptys), ptys_pl);
1403}
1404
Ido Schimmel8e8dfe92016-04-06 17:10:10 +02001405int mlxsw_sp_port_ets_set(struct mlxsw_sp_port *mlxsw_sp_port,
1406 enum mlxsw_reg_qeec_hr hr, u8 index, u8 next_index,
1407 bool dwrr, u8 dwrr_weight)
Ido Schimmel90183b92016-04-06 17:10:08 +02001408{
1409 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
1410 char qeec_pl[MLXSW_REG_QEEC_LEN];
1411
1412 mlxsw_reg_qeec_pack(qeec_pl, mlxsw_sp_port->local_port, hr, index,
1413 next_index);
1414 mlxsw_reg_qeec_de_set(qeec_pl, true);
1415 mlxsw_reg_qeec_dwrr_set(qeec_pl, dwrr);
1416 mlxsw_reg_qeec_dwrr_weight_set(qeec_pl, dwrr_weight);
1417 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(qeec), qeec_pl);
1418}
1419
Ido Schimmelcc7cf512016-04-06 17:10:11 +02001420int mlxsw_sp_port_ets_maxrate_set(struct mlxsw_sp_port *mlxsw_sp_port,
1421 enum mlxsw_reg_qeec_hr hr, u8 index,
1422 u8 next_index, u32 maxrate)
Ido Schimmel90183b92016-04-06 17:10:08 +02001423{
1424 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
1425 char qeec_pl[MLXSW_REG_QEEC_LEN];
1426
1427 mlxsw_reg_qeec_pack(qeec_pl, mlxsw_sp_port->local_port, hr, index,
1428 next_index);
1429 mlxsw_reg_qeec_mase_set(qeec_pl, true);
1430 mlxsw_reg_qeec_max_shaper_rate_set(qeec_pl, maxrate);
1431 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(qeec), qeec_pl);
1432}
1433
Ido Schimmel8e8dfe92016-04-06 17:10:10 +02001434int mlxsw_sp_port_prio_tc_set(struct mlxsw_sp_port *mlxsw_sp_port,
1435 u8 switch_prio, u8 tclass)
Ido Schimmel90183b92016-04-06 17:10:08 +02001436{
1437 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
1438 char qtct_pl[MLXSW_REG_QTCT_LEN];
1439
1440 mlxsw_reg_qtct_pack(qtct_pl, mlxsw_sp_port->local_port, switch_prio,
1441 tclass);
1442 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(qtct), qtct_pl);
1443}
1444
1445static int mlxsw_sp_port_ets_init(struct mlxsw_sp_port *mlxsw_sp_port)
1446{
1447 int err, i;
1448
1449 /* Setup the elements hierarcy, so that each TC is linked to
1450 * one subgroup, which are all member in the same group.
1451 */
1452 err = mlxsw_sp_port_ets_set(mlxsw_sp_port,
1453 MLXSW_REG_QEEC_HIERARCY_GROUP, 0, 0, false,
1454 0);
1455 if (err)
1456 return err;
1457 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
1458 err = mlxsw_sp_port_ets_set(mlxsw_sp_port,
1459 MLXSW_REG_QEEC_HIERARCY_SUBGROUP, i,
1460 0, false, 0);
1461 if (err)
1462 return err;
1463 }
1464 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
1465 err = mlxsw_sp_port_ets_set(mlxsw_sp_port,
1466 MLXSW_REG_QEEC_HIERARCY_TC, i, i,
1467 false, 0);
1468 if (err)
1469 return err;
1470 }
1471
1472 /* Make sure the max shaper is disabled in all hierarcies that
1473 * support it.
1474 */
1475 err = mlxsw_sp_port_ets_maxrate_set(mlxsw_sp_port,
1476 MLXSW_REG_QEEC_HIERARCY_PORT, 0, 0,
1477 MLXSW_REG_QEEC_MAS_DIS);
1478 if (err)
1479 return err;
1480 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
1481 err = mlxsw_sp_port_ets_maxrate_set(mlxsw_sp_port,
1482 MLXSW_REG_QEEC_HIERARCY_SUBGROUP,
1483 i, 0,
1484 MLXSW_REG_QEEC_MAS_DIS);
1485 if (err)
1486 return err;
1487 }
1488 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
1489 err = mlxsw_sp_port_ets_maxrate_set(mlxsw_sp_port,
1490 MLXSW_REG_QEEC_HIERARCY_TC,
1491 i, i,
1492 MLXSW_REG_QEEC_MAS_DIS);
1493 if (err)
1494 return err;
1495 }
1496
1497 /* Map all priorities to traffic class 0. */
1498 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
1499 err = mlxsw_sp_port_prio_tc_set(mlxsw_sp_port, i, 0);
1500 if (err)
1501 return err;
1502 }
1503
1504 return 0;
1505}
1506
Ido Schimmelbe945352016-06-09 09:51:39 +02001507static int mlxsw_sp_port_create(struct mlxsw_sp *mlxsw_sp, u8 local_port,
Ido Schimmeld664b412016-06-09 09:51:40 +02001508 bool split, u8 module, u8 width, u8 lane)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001509{
1510 struct mlxsw_sp_port *mlxsw_sp_port;
1511 struct net_device *dev;
Ido Schimmelbd40e9d2015-12-15 16:03:36 +01001512 size_t bytes;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001513 int err;
1514
1515 dev = alloc_etherdev(sizeof(struct mlxsw_sp_port));
1516 if (!dev)
1517 return -ENOMEM;
1518 mlxsw_sp_port = netdev_priv(dev);
1519 mlxsw_sp_port->dev = dev;
1520 mlxsw_sp_port->mlxsw_sp = mlxsw_sp;
1521 mlxsw_sp_port->local_port = local_port;
Ido Schimmel18f1e702016-02-26 17:32:31 +01001522 mlxsw_sp_port->split = split;
Ido Schimmeld664b412016-06-09 09:51:40 +02001523 mlxsw_sp_port->mapping.module = module;
1524 mlxsw_sp_port->mapping.width = width;
1525 mlxsw_sp_port->mapping.lane = lane;
Ido Schimmelbd40e9d2015-12-15 16:03:36 +01001526 bytes = DIV_ROUND_UP(VLAN_N_VID, BITS_PER_BYTE);
1527 mlxsw_sp_port->active_vlans = kzalloc(bytes, GFP_KERNEL);
1528 if (!mlxsw_sp_port->active_vlans) {
1529 err = -ENOMEM;
1530 goto err_port_active_vlans_alloc;
1531 }
Elad Razfc1273a2016-01-06 13:01:11 +01001532 mlxsw_sp_port->untagged_vlans = kzalloc(bytes, GFP_KERNEL);
1533 if (!mlxsw_sp_port->untagged_vlans) {
1534 err = -ENOMEM;
1535 goto err_port_untagged_vlans_alloc;
1536 }
Ido Schimmel7f71eb42015-12-15 16:03:37 +01001537 INIT_LIST_HEAD(&mlxsw_sp_port->vports_list);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001538
1539 mlxsw_sp_port->pcpu_stats =
1540 netdev_alloc_pcpu_stats(struct mlxsw_sp_port_pcpu_stats);
1541 if (!mlxsw_sp_port->pcpu_stats) {
1542 err = -ENOMEM;
1543 goto err_alloc_stats;
1544 }
1545
1546 dev->netdev_ops = &mlxsw_sp_port_netdev_ops;
1547 dev->ethtool_ops = &mlxsw_sp_port_ethtool_ops;
1548
1549 err = mlxsw_sp_port_dev_addr_init(mlxsw_sp_port);
1550 if (err) {
1551 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Unable to init port mac address\n",
1552 mlxsw_sp_port->local_port);
1553 goto err_dev_addr_init;
1554 }
1555
1556 netif_carrier_off(dev);
1557
1558 dev->features |= NETIF_F_NETNS_LOCAL | NETIF_F_LLTX | NETIF_F_SG |
1559 NETIF_F_HW_VLAN_CTAG_FILTER;
1560
1561 /* Each packet needs to have a Tx header (metadata) on top all other
1562 * headers.
1563 */
1564 dev->hard_header_len += MLXSW_TXHDR_LEN;
1565
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001566 err = mlxsw_sp_port_system_port_mapping_set(mlxsw_sp_port);
1567 if (err) {
1568 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to set system port mapping\n",
1569 mlxsw_sp_port->local_port);
1570 goto err_port_system_port_mapping_set;
1571 }
1572
1573 err = mlxsw_sp_port_swid_set(mlxsw_sp_port, 0);
1574 if (err) {
1575 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to set SWID\n",
1576 mlxsw_sp_port->local_port);
1577 goto err_port_swid_set;
1578 }
1579
Ido Schimmel18f1e702016-02-26 17:32:31 +01001580 err = mlxsw_sp_port_speed_by_width_set(mlxsw_sp_port, width);
1581 if (err) {
1582 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to enable speeds\n",
1583 mlxsw_sp_port->local_port);
1584 goto err_port_speed_by_width_set;
1585 }
1586
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001587 err = mlxsw_sp_port_mtu_set(mlxsw_sp_port, ETH_DATA_LEN);
1588 if (err) {
1589 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to set MTU\n",
1590 mlxsw_sp_port->local_port);
1591 goto err_port_mtu_set;
1592 }
1593
1594 err = mlxsw_sp_port_admin_status_set(mlxsw_sp_port, false);
1595 if (err)
1596 goto err_port_admin_status_set;
1597
1598 err = mlxsw_sp_port_buffers_init(mlxsw_sp_port);
1599 if (err) {
1600 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to initialize buffers\n",
1601 mlxsw_sp_port->local_port);
1602 goto err_port_buffers_init;
1603 }
1604
Ido Schimmel90183b92016-04-06 17:10:08 +02001605 err = mlxsw_sp_port_ets_init(mlxsw_sp_port);
1606 if (err) {
1607 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to initialize ETS\n",
1608 mlxsw_sp_port->local_port);
1609 goto err_port_ets_init;
1610 }
1611
Ido Schimmelf00817d2016-04-06 17:10:09 +02001612 /* ETS and buffers must be initialized before DCB. */
1613 err = mlxsw_sp_port_dcb_init(mlxsw_sp_port);
1614 if (err) {
1615 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to initialize DCB\n",
1616 mlxsw_sp_port->local_port);
1617 goto err_port_dcb_init;
1618 }
1619
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001620 mlxsw_sp_port_switchdev_init(mlxsw_sp_port);
1621 err = register_netdev(dev);
1622 if (err) {
1623 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to register netdev\n",
1624 mlxsw_sp_port->local_port);
1625 goto err_register_netdev;
1626 }
1627
Jiri Pirko932762b2016-04-08 19:11:21 +02001628 err = mlxsw_core_port_init(mlxsw_sp->core, &mlxsw_sp_port->core_port,
1629 mlxsw_sp_port->local_port, dev,
1630 mlxsw_sp_port->split, module);
1631 if (err) {
1632 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to init core port\n",
1633 mlxsw_sp_port->local_port);
1634 goto err_core_port_init;
1635 }
Jiri Pirkoc4745502016-02-26 17:32:26 +01001636
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001637 err = mlxsw_sp_port_vlan_init(mlxsw_sp_port);
1638 if (err)
1639 goto err_port_vlan_init;
1640
1641 mlxsw_sp->ports[local_port] = mlxsw_sp_port;
1642 return 0;
1643
1644err_port_vlan_init:
Jiri Pirko932762b2016-04-08 19:11:21 +02001645 mlxsw_core_port_fini(&mlxsw_sp_port->core_port);
1646err_core_port_init:
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001647 unregister_netdev(dev);
1648err_register_netdev:
Ido Schimmelf00817d2016-04-06 17:10:09 +02001649err_port_dcb_init:
Ido Schimmel90183b92016-04-06 17:10:08 +02001650err_port_ets_init:
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001651err_port_buffers_init:
1652err_port_admin_status_set:
1653err_port_mtu_set:
Ido Schimmel18f1e702016-02-26 17:32:31 +01001654err_port_speed_by_width_set:
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001655err_port_swid_set:
1656err_port_system_port_mapping_set:
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001657err_dev_addr_init:
1658 free_percpu(mlxsw_sp_port->pcpu_stats);
1659err_alloc_stats:
Elad Razfc1273a2016-01-06 13:01:11 +01001660 kfree(mlxsw_sp_port->untagged_vlans);
1661err_port_untagged_vlans_alloc:
Ido Schimmelbd40e9d2015-12-15 16:03:36 +01001662 kfree(mlxsw_sp_port->active_vlans);
1663err_port_active_vlans_alloc:
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001664 free_netdev(dev);
1665 return err;
1666}
1667
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001668static void mlxsw_sp_port_remove(struct mlxsw_sp *mlxsw_sp, u8 local_port)
1669{
1670 struct mlxsw_sp_port *mlxsw_sp_port = mlxsw_sp->ports[local_port];
1671
1672 if (!mlxsw_sp_port)
1673 return;
Ido Schimmela1333182016-02-26 17:32:30 +01001674 mlxsw_sp->ports[local_port] = NULL;
Jiri Pirko932762b2016-04-08 19:11:21 +02001675 mlxsw_core_port_fini(&mlxsw_sp_port->core_port);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001676 unregister_netdev(mlxsw_sp_port->dev); /* This calls ndo_stop */
Ido Schimmelf00817d2016-04-06 17:10:09 +02001677 mlxsw_sp_port_dcb_fini(mlxsw_sp_port);
Ido Schimmel32d863f2016-07-02 11:00:10 +02001678 mlxsw_sp_port_kill_vid(mlxsw_sp_port->dev, 0, 1);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001679 mlxsw_sp_port_switchdev_fini(mlxsw_sp_port);
Ido Schimmel3e9b27b2016-02-26 17:32:28 +01001680 mlxsw_sp_port_swid_set(mlxsw_sp_port, MLXSW_PORT_SWID_DISABLED_PORT);
1681 mlxsw_sp_port_module_unmap(mlxsw_sp, mlxsw_sp_port->local_port);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001682 free_percpu(mlxsw_sp_port->pcpu_stats);
Elad Razfc1273a2016-01-06 13:01:11 +01001683 kfree(mlxsw_sp_port->untagged_vlans);
Ido Schimmelbd40e9d2015-12-15 16:03:36 +01001684 kfree(mlxsw_sp_port->active_vlans);
Ido Schimmel32d863f2016-07-02 11:00:10 +02001685 WARN_ON_ONCE(!list_empty(&mlxsw_sp_port->vports_list));
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001686 free_netdev(mlxsw_sp_port->dev);
1687}
1688
1689static void mlxsw_sp_ports_remove(struct mlxsw_sp *mlxsw_sp)
1690{
1691 int i;
1692
1693 for (i = 1; i < MLXSW_PORT_MAX_PORTS; i++)
1694 mlxsw_sp_port_remove(mlxsw_sp, i);
1695 kfree(mlxsw_sp->ports);
1696}
1697
1698static int mlxsw_sp_ports_create(struct mlxsw_sp *mlxsw_sp)
1699{
Ido Schimmeld664b412016-06-09 09:51:40 +02001700 u8 module, width, lane;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001701 size_t alloc_size;
1702 int i;
1703 int err;
1704
1705 alloc_size = sizeof(struct mlxsw_sp_port *) * MLXSW_PORT_MAX_PORTS;
1706 mlxsw_sp->ports = kzalloc(alloc_size, GFP_KERNEL);
1707 if (!mlxsw_sp->ports)
1708 return -ENOMEM;
1709
1710 for (i = 1; i < MLXSW_PORT_MAX_PORTS; i++) {
Ido Schimmel558c2d52016-02-26 17:32:29 +01001711 err = mlxsw_sp_port_module_info_get(mlxsw_sp, i, &module,
Ido Schimmeld664b412016-06-09 09:51:40 +02001712 &width, &lane);
Ido Schimmel558c2d52016-02-26 17:32:29 +01001713 if (err)
1714 goto err_port_module_info_get;
1715 if (!width)
1716 continue;
1717 mlxsw_sp->port_to_module[i] = module;
Ido Schimmeld664b412016-06-09 09:51:40 +02001718 err = mlxsw_sp_port_create(mlxsw_sp, i, false, module, width,
1719 lane);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001720 if (err)
1721 goto err_port_create;
1722 }
1723 return 0;
1724
1725err_port_create:
Ido Schimmel558c2d52016-02-26 17:32:29 +01001726err_port_module_info_get:
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001727 for (i--; i >= 1; i--)
1728 mlxsw_sp_port_remove(mlxsw_sp, i);
1729 kfree(mlxsw_sp->ports);
1730 return err;
1731}
1732
Ido Schimmel18f1e702016-02-26 17:32:31 +01001733static u8 mlxsw_sp_cluster_base_port_get(u8 local_port)
1734{
1735 u8 offset = (local_port - 1) % MLXSW_SP_PORTS_PER_CLUSTER_MAX;
1736
1737 return local_port - offset;
1738}
1739
Ido Schimmelbe945352016-06-09 09:51:39 +02001740static int mlxsw_sp_port_split_create(struct mlxsw_sp *mlxsw_sp, u8 base_port,
1741 u8 module, unsigned int count)
1742{
1743 u8 width = MLXSW_PORT_MODULE_MAX_WIDTH / count;
1744 int err, i;
1745
1746 for (i = 0; i < count; i++) {
1747 err = mlxsw_sp_port_module_map(mlxsw_sp, base_port + i, module,
1748 width, i * width);
1749 if (err)
1750 goto err_port_module_map;
1751 }
1752
1753 for (i = 0; i < count; i++) {
1754 err = __mlxsw_sp_port_swid_set(mlxsw_sp, base_port + i, 0);
1755 if (err)
1756 goto err_port_swid_set;
1757 }
1758
1759 for (i = 0; i < count; i++) {
1760 err = mlxsw_sp_port_create(mlxsw_sp, base_port + i, true,
Ido Schimmeld664b412016-06-09 09:51:40 +02001761 module, width, i * width);
Ido Schimmelbe945352016-06-09 09:51:39 +02001762 if (err)
1763 goto err_port_create;
1764 }
1765
1766 return 0;
1767
1768err_port_create:
1769 for (i--; i >= 0; i--)
1770 mlxsw_sp_port_remove(mlxsw_sp, base_port + i);
1771 i = count;
1772err_port_swid_set:
1773 for (i--; i >= 0; i--)
1774 __mlxsw_sp_port_swid_set(mlxsw_sp, base_port + i,
1775 MLXSW_PORT_SWID_DISABLED_PORT);
1776 i = count;
1777err_port_module_map:
1778 for (i--; i >= 0; i--)
1779 mlxsw_sp_port_module_unmap(mlxsw_sp, base_port + i);
1780 return err;
1781}
1782
1783static void mlxsw_sp_port_unsplit_create(struct mlxsw_sp *mlxsw_sp,
1784 u8 base_port, unsigned int count)
1785{
1786 u8 local_port, module, width = MLXSW_PORT_MODULE_MAX_WIDTH;
1787 int i;
1788
1789 /* Split by four means we need to re-create two ports, otherwise
1790 * only one.
1791 */
1792 count = count / 2;
1793
1794 for (i = 0; i < count; i++) {
1795 local_port = base_port + i * 2;
1796 module = mlxsw_sp->port_to_module[local_port];
1797
1798 mlxsw_sp_port_module_map(mlxsw_sp, local_port, module, width,
1799 0);
1800 }
1801
1802 for (i = 0; i < count; i++)
1803 __mlxsw_sp_port_swid_set(mlxsw_sp, base_port + i * 2, 0);
1804
1805 for (i = 0; i < count; i++) {
1806 local_port = base_port + i * 2;
1807 module = mlxsw_sp->port_to_module[local_port];
1808
1809 mlxsw_sp_port_create(mlxsw_sp, local_port, false, module,
Ido Schimmeld664b412016-06-09 09:51:40 +02001810 width, 0);
Ido Schimmelbe945352016-06-09 09:51:39 +02001811 }
1812}
1813
Jiri Pirkob2f10572016-04-08 19:11:23 +02001814static int mlxsw_sp_port_split(struct mlxsw_core *mlxsw_core, u8 local_port,
1815 unsigned int count)
Ido Schimmel18f1e702016-02-26 17:32:31 +01001816{
Jiri Pirkob2f10572016-04-08 19:11:23 +02001817 struct mlxsw_sp *mlxsw_sp = mlxsw_core_driver_priv(mlxsw_core);
Ido Schimmel18f1e702016-02-26 17:32:31 +01001818 struct mlxsw_sp_port *mlxsw_sp_port;
Ido Schimmel18f1e702016-02-26 17:32:31 +01001819 u8 module, cur_width, base_port;
1820 int i;
1821 int err;
1822
1823 mlxsw_sp_port = mlxsw_sp->ports[local_port];
1824 if (!mlxsw_sp_port) {
1825 dev_err(mlxsw_sp->bus_info->dev, "Port number \"%d\" does not exist\n",
1826 local_port);
1827 return -EINVAL;
1828 }
1829
Ido Schimmeld664b412016-06-09 09:51:40 +02001830 module = mlxsw_sp_port->mapping.module;
1831 cur_width = mlxsw_sp_port->mapping.width;
1832
Ido Schimmel18f1e702016-02-26 17:32:31 +01001833 if (count != 2 && count != 4) {
1834 netdev_err(mlxsw_sp_port->dev, "Port can only be split into 2 or 4 ports\n");
1835 return -EINVAL;
1836 }
1837
Ido Schimmel18f1e702016-02-26 17:32:31 +01001838 if (cur_width != MLXSW_PORT_MODULE_MAX_WIDTH) {
1839 netdev_err(mlxsw_sp_port->dev, "Port cannot be split further\n");
1840 return -EINVAL;
1841 }
1842
1843 /* Make sure we have enough slave (even) ports for the split. */
1844 if (count == 2) {
1845 base_port = local_port;
1846 if (mlxsw_sp->ports[base_port + 1]) {
1847 netdev_err(mlxsw_sp_port->dev, "Invalid split configuration\n");
1848 return -EINVAL;
1849 }
1850 } else {
1851 base_port = mlxsw_sp_cluster_base_port_get(local_port);
1852 if (mlxsw_sp->ports[base_port + 1] ||
1853 mlxsw_sp->ports[base_port + 3]) {
1854 netdev_err(mlxsw_sp_port->dev, "Invalid split configuration\n");
1855 return -EINVAL;
1856 }
1857 }
1858
1859 for (i = 0; i < count; i++)
1860 mlxsw_sp_port_remove(mlxsw_sp, base_port + i);
1861
Ido Schimmelbe945352016-06-09 09:51:39 +02001862 err = mlxsw_sp_port_split_create(mlxsw_sp, base_port, module, count);
1863 if (err) {
1864 dev_err(mlxsw_sp->bus_info->dev, "Failed to create split ports\n");
1865 goto err_port_split_create;
Ido Schimmel18f1e702016-02-26 17:32:31 +01001866 }
1867
1868 return 0;
1869
Ido Schimmelbe945352016-06-09 09:51:39 +02001870err_port_split_create:
1871 mlxsw_sp_port_unsplit_create(mlxsw_sp, base_port, count);
Ido Schimmel18f1e702016-02-26 17:32:31 +01001872 return err;
1873}
1874
Jiri Pirkob2f10572016-04-08 19:11:23 +02001875static int mlxsw_sp_port_unsplit(struct mlxsw_core *mlxsw_core, u8 local_port)
Ido Schimmel18f1e702016-02-26 17:32:31 +01001876{
Jiri Pirkob2f10572016-04-08 19:11:23 +02001877 struct mlxsw_sp *mlxsw_sp = mlxsw_core_driver_priv(mlxsw_core);
Ido Schimmel18f1e702016-02-26 17:32:31 +01001878 struct mlxsw_sp_port *mlxsw_sp_port;
Ido Schimmeld664b412016-06-09 09:51:40 +02001879 u8 cur_width, base_port;
Ido Schimmel18f1e702016-02-26 17:32:31 +01001880 unsigned int count;
1881 int i;
Ido Schimmel18f1e702016-02-26 17:32:31 +01001882
1883 mlxsw_sp_port = mlxsw_sp->ports[local_port];
1884 if (!mlxsw_sp_port) {
1885 dev_err(mlxsw_sp->bus_info->dev, "Port number \"%d\" does not exist\n",
1886 local_port);
1887 return -EINVAL;
1888 }
1889
1890 if (!mlxsw_sp_port->split) {
1891 netdev_err(mlxsw_sp_port->dev, "Port wasn't split\n");
1892 return -EINVAL;
1893 }
1894
Ido Schimmeld664b412016-06-09 09:51:40 +02001895 cur_width = mlxsw_sp_port->mapping.width;
Ido Schimmel18f1e702016-02-26 17:32:31 +01001896 count = cur_width == 1 ? 4 : 2;
1897
1898 base_port = mlxsw_sp_cluster_base_port_get(local_port);
1899
1900 /* Determine which ports to remove. */
1901 if (count == 2 && local_port >= base_port + 2)
1902 base_port = base_port + 2;
1903
1904 for (i = 0; i < count; i++)
1905 mlxsw_sp_port_remove(mlxsw_sp, base_port + i);
1906
Ido Schimmelbe945352016-06-09 09:51:39 +02001907 mlxsw_sp_port_unsplit_create(mlxsw_sp, base_port, count);
Ido Schimmel18f1e702016-02-26 17:32:31 +01001908
1909 return 0;
1910}
1911
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001912static void mlxsw_sp_pude_event_func(const struct mlxsw_reg_info *reg,
1913 char *pude_pl, void *priv)
1914{
1915 struct mlxsw_sp *mlxsw_sp = priv;
1916 struct mlxsw_sp_port *mlxsw_sp_port;
1917 enum mlxsw_reg_pude_oper_status status;
1918 u8 local_port;
1919
1920 local_port = mlxsw_reg_pude_local_port_get(pude_pl);
1921 mlxsw_sp_port = mlxsw_sp->ports[local_port];
Ido Schimmelbbf2a472016-07-02 11:00:14 +02001922 if (!mlxsw_sp_port)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001923 return;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001924
1925 status = mlxsw_reg_pude_oper_status_get(pude_pl);
1926 if (status == MLXSW_PORT_OPER_STATUS_UP) {
1927 netdev_info(mlxsw_sp_port->dev, "link up\n");
1928 netif_carrier_on(mlxsw_sp_port->dev);
1929 } else {
1930 netdev_info(mlxsw_sp_port->dev, "link down\n");
1931 netif_carrier_off(mlxsw_sp_port->dev);
1932 }
1933}
1934
1935static struct mlxsw_event_listener mlxsw_sp_pude_event = {
1936 .func = mlxsw_sp_pude_event_func,
1937 .trap_id = MLXSW_TRAP_ID_PUDE,
1938};
1939
1940static int mlxsw_sp_event_register(struct mlxsw_sp *mlxsw_sp,
1941 enum mlxsw_event_trap_id trap_id)
1942{
1943 struct mlxsw_event_listener *el;
1944 char hpkt_pl[MLXSW_REG_HPKT_LEN];
1945 int err;
1946
1947 switch (trap_id) {
1948 case MLXSW_TRAP_ID_PUDE:
1949 el = &mlxsw_sp_pude_event;
1950 break;
1951 }
1952 err = mlxsw_core_event_listener_register(mlxsw_sp->core, el, mlxsw_sp);
1953 if (err)
1954 return err;
1955
1956 mlxsw_reg_hpkt_pack(hpkt_pl, MLXSW_REG_HPKT_ACTION_FORWARD, trap_id);
1957 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(hpkt), hpkt_pl);
1958 if (err)
1959 goto err_event_trap_set;
1960
1961 return 0;
1962
1963err_event_trap_set:
1964 mlxsw_core_event_listener_unregister(mlxsw_sp->core, el, mlxsw_sp);
1965 return err;
1966}
1967
1968static void mlxsw_sp_event_unregister(struct mlxsw_sp *mlxsw_sp,
1969 enum mlxsw_event_trap_id trap_id)
1970{
1971 struct mlxsw_event_listener *el;
1972
1973 switch (trap_id) {
1974 case MLXSW_TRAP_ID_PUDE:
1975 el = &mlxsw_sp_pude_event;
1976 break;
1977 }
1978 mlxsw_core_event_listener_unregister(mlxsw_sp->core, el, mlxsw_sp);
1979}
1980
1981static void mlxsw_sp_rx_listener_func(struct sk_buff *skb, u8 local_port,
1982 void *priv)
1983{
1984 struct mlxsw_sp *mlxsw_sp = priv;
1985 struct mlxsw_sp_port *mlxsw_sp_port = mlxsw_sp->ports[local_port];
1986 struct mlxsw_sp_port_pcpu_stats *pcpu_stats;
1987
1988 if (unlikely(!mlxsw_sp_port)) {
1989 dev_warn_ratelimited(mlxsw_sp->bus_info->dev, "Port %d: skb received for non-existent port\n",
1990 local_port);
1991 return;
1992 }
1993
1994 skb->dev = mlxsw_sp_port->dev;
1995
1996 pcpu_stats = this_cpu_ptr(mlxsw_sp_port->pcpu_stats);
1997 u64_stats_update_begin(&pcpu_stats->syncp);
1998 pcpu_stats->rx_packets++;
1999 pcpu_stats->rx_bytes += skb->len;
2000 u64_stats_update_end(&pcpu_stats->syncp);
2001
2002 skb->protocol = eth_type_trans(skb, skb->dev);
2003 netif_receive_skb(skb);
2004}
2005
2006static const struct mlxsw_rx_listener mlxsw_sp_rx_listener[] = {
2007 {
2008 .func = mlxsw_sp_rx_listener_func,
2009 .local_port = MLXSW_PORT_DONT_CARE,
2010 .trap_id = MLXSW_TRAP_ID_FDB_MC,
2011 },
2012 /* Traps for specific L2 packet types, not trapped as FDB MC */
2013 {
2014 .func = mlxsw_sp_rx_listener_func,
2015 .local_port = MLXSW_PORT_DONT_CARE,
2016 .trap_id = MLXSW_TRAP_ID_STP,
2017 },
2018 {
2019 .func = mlxsw_sp_rx_listener_func,
2020 .local_port = MLXSW_PORT_DONT_CARE,
2021 .trap_id = MLXSW_TRAP_ID_LACP,
2022 },
2023 {
2024 .func = mlxsw_sp_rx_listener_func,
2025 .local_port = MLXSW_PORT_DONT_CARE,
2026 .trap_id = MLXSW_TRAP_ID_EAPOL,
2027 },
2028 {
2029 .func = mlxsw_sp_rx_listener_func,
2030 .local_port = MLXSW_PORT_DONT_CARE,
2031 .trap_id = MLXSW_TRAP_ID_LLDP,
2032 },
2033 {
2034 .func = mlxsw_sp_rx_listener_func,
2035 .local_port = MLXSW_PORT_DONT_CARE,
2036 .trap_id = MLXSW_TRAP_ID_MMRP,
2037 },
2038 {
2039 .func = mlxsw_sp_rx_listener_func,
2040 .local_port = MLXSW_PORT_DONT_CARE,
2041 .trap_id = MLXSW_TRAP_ID_MVRP,
2042 },
2043 {
2044 .func = mlxsw_sp_rx_listener_func,
2045 .local_port = MLXSW_PORT_DONT_CARE,
2046 .trap_id = MLXSW_TRAP_ID_RPVST,
2047 },
2048 {
2049 .func = mlxsw_sp_rx_listener_func,
2050 .local_port = MLXSW_PORT_DONT_CARE,
2051 .trap_id = MLXSW_TRAP_ID_DHCP,
2052 },
2053 {
2054 .func = mlxsw_sp_rx_listener_func,
2055 .local_port = MLXSW_PORT_DONT_CARE,
2056 .trap_id = MLXSW_TRAP_ID_IGMP_QUERY,
2057 },
2058 {
2059 .func = mlxsw_sp_rx_listener_func,
2060 .local_port = MLXSW_PORT_DONT_CARE,
2061 .trap_id = MLXSW_TRAP_ID_IGMP_V1_REPORT,
2062 },
2063 {
2064 .func = mlxsw_sp_rx_listener_func,
2065 .local_port = MLXSW_PORT_DONT_CARE,
2066 .trap_id = MLXSW_TRAP_ID_IGMP_V2_REPORT,
2067 },
2068 {
2069 .func = mlxsw_sp_rx_listener_func,
2070 .local_port = MLXSW_PORT_DONT_CARE,
2071 .trap_id = MLXSW_TRAP_ID_IGMP_V2_LEAVE,
2072 },
2073 {
2074 .func = mlxsw_sp_rx_listener_func,
2075 .local_port = MLXSW_PORT_DONT_CARE,
2076 .trap_id = MLXSW_TRAP_ID_IGMP_V3_REPORT,
2077 },
Jiri Pirko7b27ce72016-07-02 11:00:20 +02002078 {
2079 .func = mlxsw_sp_rx_listener_func,
2080 .local_port = MLXSW_PORT_DONT_CARE,
2081 .trap_id = MLXSW_TRAP_ID_ARPBC,
2082 },
2083 {
2084 .func = mlxsw_sp_rx_listener_func,
2085 .local_port = MLXSW_PORT_DONT_CARE,
2086 .trap_id = MLXSW_TRAP_ID_ARPUC,
2087 },
2088 {
2089 .func = mlxsw_sp_rx_listener_func,
2090 .local_port = MLXSW_PORT_DONT_CARE,
2091 .trap_id = MLXSW_TRAP_ID_IP2ME,
2092 },
2093 {
2094 .func = mlxsw_sp_rx_listener_func,
2095 .local_port = MLXSW_PORT_DONT_CARE,
2096 .trap_id = MLXSW_TRAP_ID_RTR_INGRESS0,
2097 },
2098 {
2099 .func = mlxsw_sp_rx_listener_func,
2100 .local_port = MLXSW_PORT_DONT_CARE,
2101 .trap_id = MLXSW_TRAP_ID_HOST_MISS_IPV4,
2102 },
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002103};
2104
2105static int mlxsw_sp_traps_init(struct mlxsw_sp *mlxsw_sp)
2106{
2107 char htgt_pl[MLXSW_REG_HTGT_LEN];
2108 char hpkt_pl[MLXSW_REG_HPKT_LEN];
2109 int i;
2110 int err;
2111
2112 mlxsw_reg_htgt_pack(htgt_pl, MLXSW_REG_HTGT_TRAP_GROUP_RX);
2113 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(htgt), htgt_pl);
2114 if (err)
2115 return err;
2116
2117 mlxsw_reg_htgt_pack(htgt_pl, MLXSW_REG_HTGT_TRAP_GROUP_CTRL);
2118 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(htgt), htgt_pl);
2119 if (err)
2120 return err;
2121
2122 for (i = 0; i < ARRAY_SIZE(mlxsw_sp_rx_listener); i++) {
2123 err = mlxsw_core_rx_listener_register(mlxsw_sp->core,
2124 &mlxsw_sp_rx_listener[i],
2125 mlxsw_sp);
2126 if (err)
2127 goto err_rx_listener_register;
2128
2129 mlxsw_reg_hpkt_pack(hpkt_pl, MLXSW_REG_HPKT_ACTION_TRAP_TO_CPU,
2130 mlxsw_sp_rx_listener[i].trap_id);
2131 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(hpkt), hpkt_pl);
2132 if (err)
2133 goto err_rx_trap_set;
2134 }
2135 return 0;
2136
2137err_rx_trap_set:
2138 mlxsw_core_rx_listener_unregister(mlxsw_sp->core,
2139 &mlxsw_sp_rx_listener[i],
2140 mlxsw_sp);
2141err_rx_listener_register:
2142 for (i--; i >= 0; i--) {
Ido Schimmel10f00aa2016-07-02 11:00:19 +02002143 mlxsw_reg_hpkt_pack(hpkt_pl, MLXSW_REG_HPKT_ACTION_DISCARD,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002144 mlxsw_sp_rx_listener[i].trap_id);
2145 mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(hpkt), hpkt_pl);
2146
2147 mlxsw_core_rx_listener_unregister(mlxsw_sp->core,
2148 &mlxsw_sp_rx_listener[i],
2149 mlxsw_sp);
2150 }
2151 return err;
2152}
2153
2154static void mlxsw_sp_traps_fini(struct mlxsw_sp *mlxsw_sp)
2155{
2156 char hpkt_pl[MLXSW_REG_HPKT_LEN];
2157 int i;
2158
2159 for (i = 0; i < ARRAY_SIZE(mlxsw_sp_rx_listener); i++) {
Ido Schimmel10f00aa2016-07-02 11:00:19 +02002160 mlxsw_reg_hpkt_pack(hpkt_pl, MLXSW_REG_HPKT_ACTION_DISCARD,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002161 mlxsw_sp_rx_listener[i].trap_id);
2162 mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(hpkt), hpkt_pl);
2163
2164 mlxsw_core_rx_listener_unregister(mlxsw_sp->core,
2165 &mlxsw_sp_rx_listener[i],
2166 mlxsw_sp);
2167 }
2168}
2169
2170static int __mlxsw_sp_flood_init(struct mlxsw_core *mlxsw_core,
2171 enum mlxsw_reg_sfgc_type type,
2172 enum mlxsw_reg_sfgc_bridge_type bridge_type)
2173{
2174 enum mlxsw_flood_table_type table_type;
2175 enum mlxsw_sp_flood_table flood_table;
2176 char sfgc_pl[MLXSW_REG_SFGC_LEN];
2177
Ido Schimmel19ae6122015-12-15 16:03:39 +01002178 if (bridge_type == MLXSW_REG_SFGC_BRIDGE_TYPE_VFID)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002179 table_type = MLXSW_REG_SFGC_TABLE_TYPE_FID;
Ido Schimmel19ae6122015-12-15 16:03:39 +01002180 else
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002181 table_type = MLXSW_REG_SFGC_TABLE_TYPE_FID_OFFEST;
Ido Schimmel19ae6122015-12-15 16:03:39 +01002182
2183 if (type == MLXSW_REG_SFGC_TYPE_UNKNOWN_UNICAST)
2184 flood_table = MLXSW_SP_FLOOD_TABLE_UC;
2185 else
2186 flood_table = MLXSW_SP_FLOOD_TABLE_BM;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002187
2188 mlxsw_reg_sfgc_pack(sfgc_pl, type, bridge_type, table_type,
2189 flood_table);
2190 return mlxsw_reg_write(mlxsw_core, MLXSW_REG(sfgc), sfgc_pl);
2191}
2192
2193static int mlxsw_sp_flood_init(struct mlxsw_sp *mlxsw_sp)
2194{
2195 int type, err;
2196
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002197 for (type = 0; type < MLXSW_REG_SFGC_TYPE_MAX; type++) {
2198 if (type == MLXSW_REG_SFGC_TYPE_RESERVED)
2199 continue;
2200
2201 err = __mlxsw_sp_flood_init(mlxsw_sp->core, type,
2202 MLXSW_REG_SFGC_BRIDGE_TYPE_VFID);
2203 if (err)
2204 return err;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002205
2206 err = __mlxsw_sp_flood_init(mlxsw_sp->core, type,
2207 MLXSW_REG_SFGC_BRIDGE_TYPE_1Q_FID);
2208 if (err)
2209 return err;
2210 }
2211
2212 return 0;
2213}
2214
Jiri Pirko0d65fc12015-12-03 12:12:28 +01002215static int mlxsw_sp_lag_init(struct mlxsw_sp *mlxsw_sp)
2216{
2217 char slcr_pl[MLXSW_REG_SLCR_LEN];
2218
2219 mlxsw_reg_slcr_pack(slcr_pl, MLXSW_REG_SLCR_LAG_HASH_SMAC |
2220 MLXSW_REG_SLCR_LAG_HASH_DMAC |
2221 MLXSW_REG_SLCR_LAG_HASH_ETHERTYPE |
2222 MLXSW_REG_SLCR_LAG_HASH_VLANID |
2223 MLXSW_REG_SLCR_LAG_HASH_SIP |
2224 MLXSW_REG_SLCR_LAG_HASH_DIP |
2225 MLXSW_REG_SLCR_LAG_HASH_SPORT |
2226 MLXSW_REG_SLCR_LAG_HASH_DPORT |
2227 MLXSW_REG_SLCR_LAG_HASH_IPPROTO);
2228 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(slcr), slcr_pl);
2229}
2230
Jiri Pirkob2f10572016-04-08 19:11:23 +02002231static int mlxsw_sp_init(struct mlxsw_core *mlxsw_core,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002232 const struct mlxsw_bus_info *mlxsw_bus_info)
2233{
Jiri Pirkob2f10572016-04-08 19:11:23 +02002234 struct mlxsw_sp *mlxsw_sp = mlxsw_core_driver_priv(mlxsw_core);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002235 int err;
2236
2237 mlxsw_sp->core = mlxsw_core;
2238 mlxsw_sp->bus_info = mlxsw_bus_info;
Ido Schimmel14d39462016-06-20 23:04:15 +02002239 INIT_LIST_HEAD(&mlxsw_sp->fids);
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02002240 INIT_LIST_HEAD(&mlxsw_sp->vfids.list);
Elad Raz3a49b4f2016-01-10 21:06:28 +01002241 INIT_LIST_HEAD(&mlxsw_sp->br_mids.list);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002242
2243 err = mlxsw_sp_base_mac_get(mlxsw_sp);
2244 if (err) {
2245 dev_err(mlxsw_sp->bus_info->dev, "Failed to get base mac\n");
2246 return err;
2247 }
2248
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002249 err = mlxsw_sp_event_register(mlxsw_sp, MLXSW_TRAP_ID_PUDE);
2250 if (err) {
2251 dev_err(mlxsw_sp->bus_info->dev, "Failed to register for PUDE events\n");
Ido Schimmelbbf2a472016-07-02 11:00:14 +02002252 return err;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002253 }
2254
2255 err = mlxsw_sp_traps_init(mlxsw_sp);
2256 if (err) {
2257 dev_err(mlxsw_sp->bus_info->dev, "Failed to set traps for RX\n");
2258 goto err_rx_listener_register;
2259 }
2260
2261 err = mlxsw_sp_flood_init(mlxsw_sp);
2262 if (err) {
2263 dev_err(mlxsw_sp->bus_info->dev, "Failed to initialize flood tables\n");
2264 goto err_flood_init;
2265 }
2266
2267 err = mlxsw_sp_buffers_init(mlxsw_sp);
2268 if (err) {
2269 dev_err(mlxsw_sp->bus_info->dev, "Failed to initialize buffers\n");
2270 goto err_buffers_init;
2271 }
2272
Jiri Pirko0d65fc12015-12-03 12:12:28 +01002273 err = mlxsw_sp_lag_init(mlxsw_sp);
2274 if (err) {
2275 dev_err(mlxsw_sp->bus_info->dev, "Failed to initialize LAG\n");
2276 goto err_lag_init;
2277 }
2278
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002279 err = mlxsw_sp_switchdev_init(mlxsw_sp);
2280 if (err) {
2281 dev_err(mlxsw_sp->bus_info->dev, "Failed to initialize switchdev\n");
2282 goto err_switchdev_init;
2283 }
2284
Ido Schimmel464dce12016-07-02 11:00:15 +02002285 err = mlxsw_sp_router_init(mlxsw_sp);
2286 if (err) {
2287 dev_err(mlxsw_sp->bus_info->dev, "Failed to initialize router\n");
2288 goto err_router_init;
2289 }
2290
Ido Schimmelbbf2a472016-07-02 11:00:14 +02002291 err = mlxsw_sp_ports_create(mlxsw_sp);
2292 if (err) {
2293 dev_err(mlxsw_sp->bus_info->dev, "Failed to create ports\n");
2294 goto err_ports_create;
2295 }
2296
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002297 return 0;
2298
Ido Schimmelbbf2a472016-07-02 11:00:14 +02002299err_ports_create:
Ido Schimmel464dce12016-07-02 11:00:15 +02002300 mlxsw_sp_router_fini(mlxsw_sp);
2301err_router_init:
Ido Schimmelbbf2a472016-07-02 11:00:14 +02002302 mlxsw_sp_switchdev_fini(mlxsw_sp);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002303err_switchdev_init:
Jiri Pirko0d65fc12015-12-03 12:12:28 +01002304err_lag_init:
Jiri Pirko0f433fa2016-04-14 18:19:24 +02002305 mlxsw_sp_buffers_fini(mlxsw_sp);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002306err_buffers_init:
2307err_flood_init:
2308 mlxsw_sp_traps_fini(mlxsw_sp);
2309err_rx_listener_register:
2310 mlxsw_sp_event_unregister(mlxsw_sp, MLXSW_TRAP_ID_PUDE);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002311 return err;
2312}
2313
Jiri Pirkob2f10572016-04-08 19:11:23 +02002314static void mlxsw_sp_fini(struct mlxsw_core *mlxsw_core)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002315{
Jiri Pirkob2f10572016-04-08 19:11:23 +02002316 struct mlxsw_sp *mlxsw_sp = mlxsw_core_driver_priv(mlxsw_core);
Ido Schimmelfa3054f2016-07-02 11:00:16 +02002317 int i;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002318
Ido Schimmelbbf2a472016-07-02 11:00:14 +02002319 mlxsw_sp_ports_remove(mlxsw_sp);
Ido Schimmel464dce12016-07-02 11:00:15 +02002320 mlxsw_sp_router_fini(mlxsw_sp);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002321 mlxsw_sp_switchdev_fini(mlxsw_sp);
Jiri Pirko5113bfd2016-05-06 22:20:59 +02002322 mlxsw_sp_buffers_fini(mlxsw_sp);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002323 mlxsw_sp_traps_fini(mlxsw_sp);
2324 mlxsw_sp_event_unregister(mlxsw_sp, MLXSW_TRAP_ID_PUDE);
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02002325 WARN_ON(!list_empty(&mlxsw_sp->vfids.list));
Ido Schimmel14d39462016-06-20 23:04:15 +02002326 WARN_ON(!list_empty(&mlxsw_sp->fids));
Ido Schimmelfa3054f2016-07-02 11:00:16 +02002327 for (i = 0; i < MLXSW_SP_RIF_MAX; i++)
2328 WARN_ON_ONCE(mlxsw_sp->rifs[i]);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002329}
2330
2331static struct mlxsw_config_profile mlxsw_sp_config_profile = {
2332 .used_max_vepa_channels = 1,
2333 .max_vepa_channels = 0,
2334 .used_max_lag = 1,
Jiri Pirko0d65fc12015-12-03 12:12:28 +01002335 .max_lag = MLXSW_SP_LAG_MAX,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002336 .used_max_port_per_lag = 1,
Jiri Pirko0d65fc12015-12-03 12:12:28 +01002337 .max_port_per_lag = MLXSW_SP_PORT_PER_LAG_MAX,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002338 .used_max_mid = 1,
Elad Raz53ae6282016-01-10 21:06:26 +01002339 .max_mid = MLXSW_SP_MID_MAX,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002340 .used_max_pgt = 1,
2341 .max_pgt = 0,
2342 .used_max_system_port = 1,
2343 .max_system_port = 64,
2344 .used_max_vlan_groups = 1,
2345 .max_vlan_groups = 127,
2346 .used_max_regions = 1,
2347 .max_regions = 400,
2348 .used_flood_tables = 1,
2349 .used_flood_mode = 1,
2350 .flood_mode = 3,
2351 .max_fid_offset_flood_tables = 2,
2352 .fid_offset_flood_table_size = VLAN_N_VID - 1,
Ido Schimmel19ae6122015-12-15 16:03:39 +01002353 .max_fid_flood_tables = 2,
2354 .fid_flood_table_size = MLXSW_SP_VFID_MAX,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002355 .used_max_ib_mc = 1,
2356 .max_ib_mc = 0,
2357 .used_max_pkey = 1,
2358 .max_pkey = 0,
Jiri Pirkoc6022422016-07-05 11:27:46 +02002359 .used_kvd_sizes = 1,
2360 .kvd_linear_size = MLXSW_SP_KVD_LINEAR_SIZE,
2361 .kvd_hash_single_size = MLXSW_SP_KVD_HASH_SINGLE_SIZE,
2362 .kvd_hash_double_size = MLXSW_SP_KVD_HASH_DOUBLE_SIZE,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002363 .swid_config = {
2364 {
2365 .used_type = 1,
2366 .type = MLXSW_PORT_SWID_TYPE_ETH,
2367 }
2368 },
2369};
2370
2371static struct mlxsw_driver mlxsw_sp_driver = {
Jiri Pirko2d0ed392016-04-14 18:19:30 +02002372 .kind = MLXSW_DEVICE_KIND_SPECTRUM,
2373 .owner = THIS_MODULE,
2374 .priv_size = sizeof(struct mlxsw_sp),
2375 .init = mlxsw_sp_init,
2376 .fini = mlxsw_sp_fini,
2377 .port_split = mlxsw_sp_port_split,
2378 .port_unsplit = mlxsw_sp_port_unsplit,
2379 .sb_pool_get = mlxsw_sp_sb_pool_get,
2380 .sb_pool_set = mlxsw_sp_sb_pool_set,
2381 .sb_port_pool_get = mlxsw_sp_sb_port_pool_get,
2382 .sb_port_pool_set = mlxsw_sp_sb_port_pool_set,
2383 .sb_tc_pool_bind_get = mlxsw_sp_sb_tc_pool_bind_get,
2384 .sb_tc_pool_bind_set = mlxsw_sp_sb_tc_pool_bind_set,
2385 .sb_occ_snapshot = mlxsw_sp_sb_occ_snapshot,
2386 .sb_occ_max_clear = mlxsw_sp_sb_occ_max_clear,
2387 .sb_occ_port_pool_get = mlxsw_sp_sb_occ_port_pool_get,
2388 .sb_occ_tc_port_bind_get = mlxsw_sp_sb_occ_tc_port_bind_get,
2389 .txhdr_construct = mlxsw_sp_txhdr_construct,
2390 .txhdr_len = MLXSW_TXHDR_LEN,
2391 .profile = &mlxsw_sp_config_profile,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002392};
2393
Jiri Pirko7ce856a2016-07-04 08:23:12 +02002394static bool mlxsw_sp_port_dev_check(const struct net_device *dev)
2395{
2396 return dev->netdev_ops == &mlxsw_sp_port_netdev_ops;
2397}
2398
2399static struct mlxsw_sp_port *mlxsw_sp_port_dev_lower_find(struct net_device *dev)
2400{
2401 struct net_device *lower_dev;
2402 struct list_head *iter;
2403
2404 if (mlxsw_sp_port_dev_check(dev))
2405 return netdev_priv(dev);
2406
2407 netdev_for_each_all_lower_dev(dev, lower_dev, iter) {
2408 if (mlxsw_sp_port_dev_check(lower_dev))
2409 return netdev_priv(lower_dev);
2410 }
2411 return NULL;
2412}
2413
2414static struct mlxsw_sp *mlxsw_sp_lower_get(struct net_device *dev)
2415{
2416 struct mlxsw_sp_port *mlxsw_sp_port;
2417
2418 mlxsw_sp_port = mlxsw_sp_port_dev_lower_find(dev);
2419 return mlxsw_sp_port ? mlxsw_sp_port->mlxsw_sp : NULL;
2420}
2421
2422static struct mlxsw_sp_port *mlxsw_sp_port_dev_lower_find_rcu(struct net_device *dev)
2423{
2424 struct net_device *lower_dev;
2425 struct list_head *iter;
2426
2427 if (mlxsw_sp_port_dev_check(dev))
2428 return netdev_priv(dev);
2429
2430 netdev_for_each_all_lower_dev_rcu(dev, lower_dev, iter) {
2431 if (mlxsw_sp_port_dev_check(lower_dev))
2432 return netdev_priv(lower_dev);
2433 }
2434 return NULL;
2435}
2436
2437struct mlxsw_sp_port *mlxsw_sp_port_lower_dev_hold(struct net_device *dev)
2438{
2439 struct mlxsw_sp_port *mlxsw_sp_port;
2440
2441 rcu_read_lock();
2442 mlxsw_sp_port = mlxsw_sp_port_dev_lower_find_rcu(dev);
2443 if (mlxsw_sp_port)
2444 dev_hold(mlxsw_sp_port->dev);
2445 rcu_read_unlock();
2446 return mlxsw_sp_port;
2447}
2448
2449void mlxsw_sp_port_dev_put(struct mlxsw_sp_port *mlxsw_sp_port)
2450{
2451 dev_put(mlxsw_sp_port->dev);
2452}
2453
Ido Schimmel99724c12016-07-04 08:23:14 +02002454static bool mlxsw_sp_rif_should_config(struct mlxsw_sp_rif *r,
2455 unsigned long event)
2456{
2457 switch (event) {
2458 case NETDEV_UP:
2459 if (!r)
2460 return true;
2461 r->ref_count++;
2462 return false;
2463 case NETDEV_DOWN:
2464 if (r && --r->ref_count == 0)
2465 return true;
2466 /* It is possible we already removed the RIF ourselves
2467 * if it was assigned to a netdev that is now a bridge
2468 * or LAG slave.
2469 */
2470 return false;
2471 }
2472
2473 return false;
2474}
2475
2476static int mlxsw_sp_avail_rif_get(struct mlxsw_sp *mlxsw_sp)
2477{
2478 int i;
2479
2480 for (i = 0; i < MLXSW_SP_RIF_MAX; i++)
2481 if (!mlxsw_sp->rifs[i])
2482 return i;
2483
2484 return MLXSW_SP_RIF_MAX;
2485}
2486
2487static void mlxsw_sp_vport_rif_sp_attr_get(struct mlxsw_sp_port *mlxsw_sp_vport,
2488 bool *p_lagged, u16 *p_system_port)
2489{
2490 u8 local_port = mlxsw_sp_vport->local_port;
2491
2492 *p_lagged = mlxsw_sp_vport->lagged;
2493 *p_system_port = *p_lagged ? mlxsw_sp_vport->lag_id : local_port;
2494}
2495
2496static int mlxsw_sp_vport_rif_sp_op(struct mlxsw_sp_port *mlxsw_sp_vport,
2497 struct net_device *l3_dev, u16 rif,
2498 bool create)
2499{
2500 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_vport->mlxsw_sp;
2501 bool lagged = mlxsw_sp_vport->lagged;
2502 char ritr_pl[MLXSW_REG_RITR_LEN];
2503 u16 system_port;
2504
2505 mlxsw_reg_ritr_pack(ritr_pl, create, MLXSW_REG_RITR_SP_IF, rif,
2506 l3_dev->mtu, l3_dev->dev_addr);
2507
2508 mlxsw_sp_vport_rif_sp_attr_get(mlxsw_sp_vport, &lagged, &system_port);
2509 mlxsw_reg_ritr_sp_if_pack(ritr_pl, lagged, system_port,
2510 mlxsw_sp_vport_vid_get(mlxsw_sp_vport));
2511
2512 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ritr), ritr_pl);
2513}
2514
2515static void mlxsw_sp_vport_rif_sp_leave(struct mlxsw_sp_port *mlxsw_sp_vport);
2516
2517static struct mlxsw_sp_fid *
2518mlxsw_sp_rfid_alloc(u16 fid, struct net_device *l3_dev)
2519{
2520 struct mlxsw_sp_fid *f;
2521
2522 f = kzalloc(sizeof(*f), GFP_KERNEL);
2523 if (!f)
2524 return NULL;
2525
2526 f->leave = mlxsw_sp_vport_rif_sp_leave;
2527 f->ref_count = 0;
2528 f->dev = l3_dev;
2529 f->fid = fid;
2530
2531 return f;
2532}
2533
2534static struct mlxsw_sp_rif *
2535mlxsw_sp_rif_alloc(u16 rif, struct net_device *l3_dev, struct mlxsw_sp_fid *f)
2536{
2537 struct mlxsw_sp_rif *r;
2538
2539 r = kzalloc(sizeof(*r), GFP_KERNEL);
2540 if (!r)
2541 return NULL;
2542
2543 ether_addr_copy(r->addr, l3_dev->dev_addr);
2544 r->mtu = l3_dev->mtu;
2545 r->ref_count = 1;
2546 r->dev = l3_dev;
2547 r->rif = rif;
2548 r->f = f;
2549
2550 return r;
2551}
2552
2553static struct mlxsw_sp_rif *
2554mlxsw_sp_vport_rif_sp_create(struct mlxsw_sp_port *mlxsw_sp_vport,
2555 struct net_device *l3_dev)
2556{
2557 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_vport->mlxsw_sp;
2558 struct mlxsw_sp_fid *f;
2559 struct mlxsw_sp_rif *r;
2560 u16 fid, rif;
2561 int err;
2562
2563 rif = mlxsw_sp_avail_rif_get(mlxsw_sp);
2564 if (rif == MLXSW_SP_RIF_MAX)
2565 return ERR_PTR(-ERANGE);
2566
2567 err = mlxsw_sp_vport_rif_sp_op(mlxsw_sp_vport, l3_dev, rif, true);
2568 if (err)
2569 return ERR_PTR(err);
2570
2571 fid = mlxsw_sp_rif_sp_to_fid(rif);
2572 err = mlxsw_sp_rif_fdb_op(mlxsw_sp, l3_dev->dev_addr, fid, true);
2573 if (err)
2574 goto err_rif_fdb_op;
2575
2576 f = mlxsw_sp_rfid_alloc(fid, l3_dev);
2577 if (!f) {
2578 err = -ENOMEM;
2579 goto err_rfid_alloc;
2580 }
2581
2582 r = mlxsw_sp_rif_alloc(rif, l3_dev, f);
2583 if (!r) {
2584 err = -ENOMEM;
2585 goto err_rif_alloc;
2586 }
2587
2588 f->r = r;
2589 mlxsw_sp->rifs[rif] = r;
2590
2591 return r;
2592
2593err_rif_alloc:
2594 kfree(f);
2595err_rfid_alloc:
2596 mlxsw_sp_rif_fdb_op(mlxsw_sp, l3_dev->dev_addr, fid, false);
2597err_rif_fdb_op:
2598 mlxsw_sp_vport_rif_sp_op(mlxsw_sp_vport, l3_dev, rif, false);
2599 return ERR_PTR(err);
2600}
2601
2602static void mlxsw_sp_vport_rif_sp_destroy(struct mlxsw_sp_port *mlxsw_sp_vport,
2603 struct mlxsw_sp_rif *r)
2604{
2605 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_vport->mlxsw_sp;
2606 struct net_device *l3_dev = r->dev;
2607 struct mlxsw_sp_fid *f = r->f;
2608 u16 fid = f->fid;
2609 u16 rif = r->rif;
2610
2611 mlxsw_sp->rifs[rif] = NULL;
2612 f->r = NULL;
2613
2614 kfree(r);
2615
2616 kfree(f);
2617
2618 mlxsw_sp_rif_fdb_op(mlxsw_sp, l3_dev->dev_addr, fid, false);
2619
2620 mlxsw_sp_vport_rif_sp_op(mlxsw_sp_vport, l3_dev, rif, false);
2621}
2622
2623static int mlxsw_sp_vport_rif_sp_join(struct mlxsw_sp_port *mlxsw_sp_vport,
2624 struct net_device *l3_dev)
2625{
2626 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_vport->mlxsw_sp;
2627 struct mlxsw_sp_rif *r;
2628
2629 r = mlxsw_sp_rif_find_by_dev(mlxsw_sp, l3_dev);
2630 if (!r) {
2631 r = mlxsw_sp_vport_rif_sp_create(mlxsw_sp_vport, l3_dev);
2632 if (IS_ERR(r))
2633 return PTR_ERR(r);
2634 }
2635
2636 mlxsw_sp_vport_fid_set(mlxsw_sp_vport, r->f);
2637 r->f->ref_count++;
2638
2639 netdev_dbg(mlxsw_sp_vport->dev, "Joined FID=%d\n", r->f->fid);
2640
2641 return 0;
2642}
2643
2644static void mlxsw_sp_vport_rif_sp_leave(struct mlxsw_sp_port *mlxsw_sp_vport)
2645{
2646 struct mlxsw_sp_fid *f = mlxsw_sp_vport_fid_get(mlxsw_sp_vport);
2647
2648 netdev_dbg(mlxsw_sp_vport->dev, "Left FID=%d\n", f->fid);
2649
2650 mlxsw_sp_vport_fid_set(mlxsw_sp_vport, NULL);
2651 if (--f->ref_count == 0)
2652 mlxsw_sp_vport_rif_sp_destroy(mlxsw_sp_vport, f->r);
2653}
2654
2655static int mlxsw_sp_inetaddr_vport_event(struct net_device *l3_dev,
2656 struct net_device *port_dev,
2657 unsigned long event, u16 vid)
2658{
2659 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(port_dev);
2660 struct mlxsw_sp_port *mlxsw_sp_vport;
2661
2662 mlxsw_sp_vport = mlxsw_sp_port_vport_find(mlxsw_sp_port, vid);
2663 if (WARN_ON(!mlxsw_sp_vport))
2664 return -EINVAL;
2665
2666 switch (event) {
2667 case NETDEV_UP:
2668 return mlxsw_sp_vport_rif_sp_join(mlxsw_sp_vport, l3_dev);
2669 case NETDEV_DOWN:
2670 mlxsw_sp_vport_rif_sp_leave(mlxsw_sp_vport);
2671 break;
2672 }
2673
2674 return 0;
2675}
2676
2677static int mlxsw_sp_inetaddr_port_event(struct net_device *port_dev,
2678 unsigned long event)
2679{
2680 if (netif_is_bridge_port(port_dev) || netif_is_lag_port(port_dev))
2681 return 0;
2682
2683 return mlxsw_sp_inetaddr_vport_event(port_dev, port_dev, event, 1);
2684}
2685
2686static int __mlxsw_sp_inetaddr_lag_event(struct net_device *l3_dev,
2687 struct net_device *lag_dev,
2688 unsigned long event, u16 vid)
2689{
2690 struct net_device *port_dev;
2691 struct list_head *iter;
2692 int err;
2693
2694 netdev_for_each_lower_dev(lag_dev, port_dev, iter) {
2695 if (mlxsw_sp_port_dev_check(port_dev)) {
2696 err = mlxsw_sp_inetaddr_vport_event(l3_dev, port_dev,
2697 event, vid);
2698 if (err)
2699 return err;
2700 }
2701 }
2702
2703 return 0;
2704}
2705
2706static int mlxsw_sp_inetaddr_lag_event(struct net_device *lag_dev,
2707 unsigned long event)
2708{
2709 if (netif_is_bridge_port(lag_dev))
2710 return 0;
2711
2712 return __mlxsw_sp_inetaddr_lag_event(lag_dev, lag_dev, event, 1);
2713}
2714
Ido Schimmel99f44bb2016-07-04 08:23:17 +02002715static struct mlxsw_sp_fid *mlxsw_sp_bridge_fid_get(struct mlxsw_sp *mlxsw_sp,
2716 struct net_device *l3_dev)
2717{
2718 u16 fid;
2719
2720 if (is_vlan_dev(l3_dev))
2721 fid = vlan_dev_vlan_id(l3_dev);
2722 else if (mlxsw_sp->master_bridge.dev == l3_dev)
2723 fid = 1;
2724 else
2725 return mlxsw_sp_vfid_find(mlxsw_sp, l3_dev);
2726
2727 return mlxsw_sp_fid_find(mlxsw_sp, fid);
2728}
2729
2730static enum mlxsw_reg_ritr_if_type mlxsw_sp_rif_type_get(u16 fid)
2731{
2732 if (mlxsw_sp_fid_is_vfid(fid))
2733 return MLXSW_REG_RITR_FID_IF;
2734 else
2735 return MLXSW_REG_RITR_VLAN_IF;
2736}
2737
2738static int mlxsw_sp_rif_bridge_op(struct mlxsw_sp *mlxsw_sp,
2739 struct net_device *l3_dev,
2740 u16 fid, u16 rif,
2741 bool create)
2742{
2743 enum mlxsw_reg_ritr_if_type rif_type;
2744 char ritr_pl[MLXSW_REG_RITR_LEN];
2745
2746 rif_type = mlxsw_sp_rif_type_get(fid);
2747 mlxsw_reg_ritr_pack(ritr_pl, create, rif_type, rif, l3_dev->mtu,
2748 l3_dev->dev_addr);
2749 mlxsw_reg_ritr_fid_set(ritr_pl, rif_type, fid);
2750
2751 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ritr), ritr_pl);
2752}
2753
2754static int mlxsw_sp_rif_bridge_create(struct mlxsw_sp *mlxsw_sp,
2755 struct net_device *l3_dev,
2756 struct mlxsw_sp_fid *f)
2757{
2758 struct mlxsw_sp_rif *r;
2759 u16 rif;
2760 int err;
2761
2762 rif = mlxsw_sp_avail_rif_get(mlxsw_sp);
2763 if (rif == MLXSW_SP_RIF_MAX)
2764 return -ERANGE;
2765
2766 err = mlxsw_sp_rif_bridge_op(mlxsw_sp, l3_dev, f->fid, rif, true);
2767 if (err)
2768 return err;
2769
2770 err = mlxsw_sp_rif_fdb_op(mlxsw_sp, l3_dev->dev_addr, f->fid, true);
2771 if (err)
2772 goto err_rif_fdb_op;
2773
2774 r = mlxsw_sp_rif_alloc(rif, l3_dev, f);
2775 if (!r) {
2776 err = -ENOMEM;
2777 goto err_rif_alloc;
2778 }
2779
2780 f->r = r;
2781 mlxsw_sp->rifs[rif] = r;
2782
2783 netdev_dbg(l3_dev, "RIF=%d created\n", rif);
2784
2785 return 0;
2786
2787err_rif_alloc:
2788 mlxsw_sp_rif_fdb_op(mlxsw_sp, l3_dev->dev_addr, f->fid, false);
2789err_rif_fdb_op:
2790 mlxsw_sp_rif_bridge_op(mlxsw_sp, l3_dev, f->fid, rif, false);
2791 return err;
2792}
2793
2794void mlxsw_sp_rif_bridge_destroy(struct mlxsw_sp *mlxsw_sp,
2795 struct mlxsw_sp_rif *r)
2796{
2797 struct net_device *l3_dev = r->dev;
2798 struct mlxsw_sp_fid *f = r->f;
2799 u16 rif = r->rif;
2800
2801 mlxsw_sp->rifs[rif] = NULL;
2802 f->r = NULL;
2803
2804 kfree(r);
2805
2806 mlxsw_sp_rif_fdb_op(mlxsw_sp, l3_dev->dev_addr, f->fid, false);
2807
2808 mlxsw_sp_rif_bridge_op(mlxsw_sp, l3_dev, f->fid, rif, false);
2809
2810 netdev_dbg(l3_dev, "RIF=%d destroyed\n", rif);
2811}
2812
2813static int mlxsw_sp_inetaddr_bridge_event(struct net_device *l3_dev,
2814 struct net_device *br_dev,
2815 unsigned long event)
2816{
2817 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_lower_get(l3_dev);
2818 struct mlxsw_sp_fid *f;
2819
2820 /* FID can either be an actual FID if the L3 device is the
2821 * VLAN-aware bridge or a VLAN device on top. Otherwise, the
2822 * L3 device is a VLAN-unaware bridge and we get a vFID.
2823 */
2824 f = mlxsw_sp_bridge_fid_get(mlxsw_sp, l3_dev);
2825 if (WARN_ON(!f))
2826 return -EINVAL;
2827
2828 switch (event) {
2829 case NETDEV_UP:
2830 return mlxsw_sp_rif_bridge_create(mlxsw_sp, l3_dev, f);
2831 case NETDEV_DOWN:
2832 mlxsw_sp_rif_bridge_destroy(mlxsw_sp, f->r);
2833 break;
2834 }
2835
2836 return 0;
2837}
2838
Ido Schimmel99724c12016-07-04 08:23:14 +02002839static int mlxsw_sp_inetaddr_vlan_event(struct net_device *vlan_dev,
2840 unsigned long event)
2841{
2842 struct net_device *real_dev = vlan_dev_real_dev(vlan_dev);
Ido Schimmel99f44bb2016-07-04 08:23:17 +02002843 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_lower_get(vlan_dev);
Ido Schimmel99724c12016-07-04 08:23:14 +02002844 u16 vid = vlan_dev_vlan_id(vlan_dev);
2845
2846 if (mlxsw_sp_port_dev_check(real_dev))
2847 return mlxsw_sp_inetaddr_vport_event(vlan_dev, real_dev, event,
2848 vid);
2849 else if (netif_is_lag_master(real_dev))
2850 return __mlxsw_sp_inetaddr_lag_event(vlan_dev, real_dev, event,
2851 vid);
Ido Schimmel99f44bb2016-07-04 08:23:17 +02002852 else if (netif_is_bridge_master(real_dev) &&
2853 mlxsw_sp->master_bridge.dev == real_dev)
2854 return mlxsw_sp_inetaddr_bridge_event(vlan_dev, real_dev,
2855 event);
Ido Schimmel99724c12016-07-04 08:23:14 +02002856
2857 return 0;
2858}
2859
2860static int mlxsw_sp_inetaddr_event(struct notifier_block *unused,
2861 unsigned long event, void *ptr)
2862{
2863 struct in_ifaddr *ifa = (struct in_ifaddr *) ptr;
2864 struct net_device *dev = ifa->ifa_dev->dev;
2865 struct mlxsw_sp *mlxsw_sp;
2866 struct mlxsw_sp_rif *r;
2867 int err = 0;
2868
2869 mlxsw_sp = mlxsw_sp_lower_get(dev);
2870 if (!mlxsw_sp)
2871 goto out;
2872
2873 r = mlxsw_sp_rif_find_by_dev(mlxsw_sp, dev);
2874 if (!mlxsw_sp_rif_should_config(r, event))
2875 goto out;
2876
2877 if (mlxsw_sp_port_dev_check(dev))
2878 err = mlxsw_sp_inetaddr_port_event(dev, event);
2879 else if (netif_is_lag_master(dev))
2880 err = mlxsw_sp_inetaddr_lag_event(dev, event);
Ido Schimmel99f44bb2016-07-04 08:23:17 +02002881 else if (netif_is_bridge_master(dev))
2882 err = mlxsw_sp_inetaddr_bridge_event(dev, dev, event);
Ido Schimmel99724c12016-07-04 08:23:14 +02002883 else if (is_vlan_dev(dev))
2884 err = mlxsw_sp_inetaddr_vlan_event(dev, event);
2885
2886out:
2887 return notifier_from_errno(err);
2888}
2889
Ido Schimmel6e095fd2016-07-04 08:23:13 +02002890static int mlxsw_sp_rif_edit(struct mlxsw_sp *mlxsw_sp, u16 rif,
2891 const char *mac, int mtu)
2892{
2893 char ritr_pl[MLXSW_REG_RITR_LEN];
2894 int err;
2895
2896 mlxsw_reg_ritr_rif_pack(ritr_pl, rif);
2897 err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(ritr), ritr_pl);
2898 if (err)
2899 return err;
2900
2901 mlxsw_reg_ritr_mtu_set(ritr_pl, mtu);
2902 mlxsw_reg_ritr_if_mac_memcpy_to(ritr_pl, mac);
2903 mlxsw_reg_ritr_op_set(ritr_pl, MLXSW_REG_RITR_RIF_CREATE);
2904 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ritr), ritr_pl);
2905}
2906
2907static int mlxsw_sp_netdevice_router_port_event(struct net_device *dev)
2908{
2909 struct mlxsw_sp *mlxsw_sp;
2910 struct mlxsw_sp_rif *r;
2911 int err;
2912
2913 mlxsw_sp = mlxsw_sp_lower_get(dev);
2914 if (!mlxsw_sp)
2915 return 0;
2916
2917 r = mlxsw_sp_rif_find_by_dev(mlxsw_sp, dev);
2918 if (!r)
2919 return 0;
2920
2921 err = mlxsw_sp_rif_fdb_op(mlxsw_sp, r->addr, r->f->fid, false);
2922 if (err)
2923 return err;
2924
2925 err = mlxsw_sp_rif_edit(mlxsw_sp, r->rif, dev->dev_addr, dev->mtu);
2926 if (err)
2927 goto err_rif_edit;
2928
2929 err = mlxsw_sp_rif_fdb_op(mlxsw_sp, dev->dev_addr, r->f->fid, true);
2930 if (err)
2931 goto err_rif_fdb_op;
2932
2933 ether_addr_copy(r->addr, dev->dev_addr);
2934 r->mtu = dev->mtu;
2935
2936 netdev_dbg(dev, "Updated RIF=%d\n", r->rif);
2937
2938 return 0;
2939
2940err_rif_fdb_op:
2941 mlxsw_sp_rif_edit(mlxsw_sp, r->rif, r->addr, r->mtu);
2942err_rif_edit:
2943 mlxsw_sp_rif_fdb_op(mlxsw_sp, r->addr, r->f->fid, true);
2944 return err;
2945}
2946
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02002947static bool mlxsw_sp_lag_port_fid_member(struct mlxsw_sp_port *lag_port,
2948 u16 fid)
2949{
2950 if (mlxsw_sp_fid_is_vfid(fid))
2951 return mlxsw_sp_port_vport_find_by_fid(lag_port, fid);
2952 else
2953 return test_bit(fid, lag_port->active_vlans);
2954}
2955
2956static bool mlxsw_sp_port_fdb_should_flush(struct mlxsw_sp_port *mlxsw_sp_port,
2957 u16 fid)
Ido Schimmel039c49a2016-01-27 15:20:18 +01002958{
2959 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02002960 u8 local_port = mlxsw_sp_port->local_port;
2961 u16 lag_id = mlxsw_sp_port->lag_id;
2962 int i, count = 0;
Ido Schimmel039c49a2016-01-27 15:20:18 +01002963
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02002964 if (!mlxsw_sp_port->lagged)
2965 return true;
Ido Schimmel039c49a2016-01-27 15:20:18 +01002966
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02002967 for (i = 0; i < MLXSW_SP_PORT_PER_LAG_MAX; i++) {
2968 struct mlxsw_sp_port *lag_port;
2969
2970 lag_port = mlxsw_sp_port_lagged_get(mlxsw_sp, lag_id, i);
2971 if (!lag_port || lag_port->local_port == local_port)
2972 continue;
2973 if (mlxsw_sp_lag_port_fid_member(lag_port, fid))
2974 count++;
2975 }
2976
2977 return !count;
Ido Schimmel039c49a2016-01-27 15:20:18 +01002978}
2979
2980static int
2981mlxsw_sp_port_fdb_flush_by_port_fid(const struct mlxsw_sp_port *mlxsw_sp_port,
2982 u16 fid)
2983{
2984 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
2985 char sfdf_pl[MLXSW_REG_SFDF_LEN];
2986
2987 mlxsw_reg_sfdf_pack(sfdf_pl, MLXSW_REG_SFDF_FLUSH_PER_PORT_AND_FID);
2988 mlxsw_reg_sfdf_fid_set(sfdf_pl, fid);
2989 mlxsw_reg_sfdf_port_fid_system_port_set(sfdf_pl,
2990 mlxsw_sp_port->local_port);
2991
Ido Schimmel22305372016-06-20 23:04:21 +02002992 netdev_dbg(mlxsw_sp_port->dev, "FDB flushed using Port=%d, FID=%d\n",
2993 mlxsw_sp_port->local_port, fid);
2994
Ido Schimmel039c49a2016-01-27 15:20:18 +01002995 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sfdf), sfdf_pl);
2996}
2997
2998static int
Ido Schimmel039c49a2016-01-27 15:20:18 +01002999mlxsw_sp_port_fdb_flush_by_lag_id_fid(const struct mlxsw_sp_port *mlxsw_sp_port,
3000 u16 fid)
3001{
3002 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
3003 char sfdf_pl[MLXSW_REG_SFDF_LEN];
3004
3005 mlxsw_reg_sfdf_pack(sfdf_pl, MLXSW_REG_SFDF_FLUSH_PER_LAG_AND_FID);
3006 mlxsw_reg_sfdf_fid_set(sfdf_pl, fid);
3007 mlxsw_reg_sfdf_lag_fid_lag_id_set(sfdf_pl, mlxsw_sp_port->lag_id);
3008
Ido Schimmel22305372016-06-20 23:04:21 +02003009 netdev_dbg(mlxsw_sp_port->dev, "FDB flushed using LAG ID=%d, FID=%d\n",
3010 mlxsw_sp_port->lag_id, fid);
3011
Ido Schimmel039c49a2016-01-27 15:20:18 +01003012 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sfdf), sfdf_pl);
3013}
3014
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02003015int mlxsw_sp_port_fdb_flush(struct mlxsw_sp_port *mlxsw_sp_port, u16 fid)
Ido Schimmel039c49a2016-01-27 15:20:18 +01003016{
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02003017 if (!mlxsw_sp_port_fdb_should_flush(mlxsw_sp_port, fid))
3018 return 0;
Ido Schimmel039c49a2016-01-27 15:20:18 +01003019
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02003020 if (mlxsw_sp_port->lagged)
3021 return mlxsw_sp_port_fdb_flush_by_lag_id_fid(mlxsw_sp_port,
Ido Schimmel039c49a2016-01-27 15:20:18 +01003022 fid);
3023 else
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02003024 return mlxsw_sp_port_fdb_flush_by_port_fid(mlxsw_sp_port, fid);
Ido Schimmel039c49a2016-01-27 15:20:18 +01003025}
3026
Ido Schimmel701b1862016-07-04 08:23:16 +02003027static void mlxsw_sp_master_bridge_gone_sync(struct mlxsw_sp *mlxsw_sp)
3028{
3029 struct mlxsw_sp_fid *f, *tmp;
3030
3031 list_for_each_entry_safe(f, tmp, &mlxsw_sp->fids, list)
3032 if (--f->ref_count == 0)
3033 mlxsw_sp_fid_destroy(mlxsw_sp, f);
3034 else
3035 WARN_ON_ONCE(1);
3036}
3037
Ido Schimmel7117a572016-06-20 23:04:06 +02003038static bool mlxsw_sp_master_bridge_check(struct mlxsw_sp *mlxsw_sp,
3039 struct net_device *br_dev)
3040{
3041 return !mlxsw_sp->master_bridge.dev ||
3042 mlxsw_sp->master_bridge.dev == br_dev;
3043}
3044
3045static void mlxsw_sp_master_bridge_inc(struct mlxsw_sp *mlxsw_sp,
3046 struct net_device *br_dev)
3047{
3048 mlxsw_sp->master_bridge.dev = br_dev;
3049 mlxsw_sp->master_bridge.ref_count++;
3050}
3051
3052static void mlxsw_sp_master_bridge_dec(struct mlxsw_sp *mlxsw_sp)
3053{
Ido Schimmel701b1862016-07-04 08:23:16 +02003054 if (--mlxsw_sp->master_bridge.ref_count == 0) {
Ido Schimmel7117a572016-06-20 23:04:06 +02003055 mlxsw_sp->master_bridge.dev = NULL;
Ido Schimmel701b1862016-07-04 08:23:16 +02003056 /* It's possible upper VLAN devices are still holding
3057 * references to underlying FIDs. Drop the reference
3058 * and release the resources if it was the last one.
3059 * If it wasn't, then something bad happened.
3060 */
3061 mlxsw_sp_master_bridge_gone_sync(mlxsw_sp);
3062 }
Ido Schimmel7117a572016-06-20 23:04:06 +02003063}
3064
3065static int mlxsw_sp_port_bridge_join(struct mlxsw_sp_port *mlxsw_sp_port,
3066 struct net_device *br_dev)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003067{
3068 struct net_device *dev = mlxsw_sp_port->dev;
3069 int err;
3070
3071 /* When port is not bridged untagged packets are tagged with
3072 * PVID=VID=1, thereby creating an implicit VLAN interface in
3073 * the device. Remove it and let bridge code take care of its
3074 * own VLANs.
3075 */
3076 err = mlxsw_sp_port_kill_vid(dev, 0, 1);
Ido Schimmel6c72a3d2016-01-04 10:42:26 +01003077 if (err)
3078 return err;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003079
Ido Schimmel7117a572016-06-20 23:04:06 +02003080 mlxsw_sp_master_bridge_inc(mlxsw_sp_port->mlxsw_sp, br_dev);
3081
Ido Schimmel6c72a3d2016-01-04 10:42:26 +01003082 mlxsw_sp_port->learning = 1;
3083 mlxsw_sp_port->learning_sync = 1;
3084 mlxsw_sp_port->uc_flood = 1;
3085 mlxsw_sp_port->bridged = 1;
3086
3087 return 0;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003088}
3089
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02003090static void mlxsw_sp_port_bridge_leave(struct mlxsw_sp_port *mlxsw_sp_port)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003091{
3092 struct net_device *dev = mlxsw_sp_port->dev;
Ido Schimmel5a8f4522016-01-04 10:42:25 +01003093
Ido Schimmel28a01d22016-02-18 11:30:02 +01003094 mlxsw_sp_port_pvid_set(mlxsw_sp_port, 1);
3095
Ido Schimmel7117a572016-06-20 23:04:06 +02003096 mlxsw_sp_master_bridge_dec(mlxsw_sp_port->mlxsw_sp);
3097
Ido Schimmel6c72a3d2016-01-04 10:42:26 +01003098 mlxsw_sp_port->learning = 0;
3099 mlxsw_sp_port->learning_sync = 0;
3100 mlxsw_sp_port->uc_flood = 0;
Ido Schimmel5a8f4522016-01-04 10:42:25 +01003101 mlxsw_sp_port->bridged = 0;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003102
3103 /* Add implicit VLAN interface in the device, so that untagged
3104 * packets will be classified to the default vFID.
3105 */
Ido Schimmel82e6db02016-06-20 23:04:04 +02003106 mlxsw_sp_port_add_vid(dev, 0, 1);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003107}
3108
Jiri Pirko0d65fc12015-12-03 12:12:28 +01003109static int mlxsw_sp_lag_create(struct mlxsw_sp *mlxsw_sp, u16 lag_id)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003110{
Jiri Pirko0d65fc12015-12-03 12:12:28 +01003111 char sldr_pl[MLXSW_REG_SLDR_LEN];
3112
3113 mlxsw_reg_sldr_lag_create_pack(sldr_pl, lag_id);
3114 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sldr), sldr_pl);
3115}
3116
3117static int mlxsw_sp_lag_destroy(struct mlxsw_sp *mlxsw_sp, u16 lag_id)
3118{
3119 char sldr_pl[MLXSW_REG_SLDR_LEN];
3120
3121 mlxsw_reg_sldr_lag_destroy_pack(sldr_pl, lag_id);
3122 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sldr), sldr_pl);
3123}
3124
3125static int mlxsw_sp_lag_col_port_add(struct mlxsw_sp_port *mlxsw_sp_port,
3126 u16 lag_id, u8 port_index)
3127{
3128 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
3129 char slcor_pl[MLXSW_REG_SLCOR_LEN];
3130
3131 mlxsw_reg_slcor_port_add_pack(slcor_pl, mlxsw_sp_port->local_port,
3132 lag_id, port_index);
3133 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(slcor), slcor_pl);
3134}
3135
3136static int mlxsw_sp_lag_col_port_remove(struct mlxsw_sp_port *mlxsw_sp_port,
3137 u16 lag_id)
3138{
3139 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
3140 char slcor_pl[MLXSW_REG_SLCOR_LEN];
3141
3142 mlxsw_reg_slcor_port_remove_pack(slcor_pl, mlxsw_sp_port->local_port,
3143 lag_id);
3144 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(slcor), slcor_pl);
3145}
3146
3147static int mlxsw_sp_lag_col_port_enable(struct mlxsw_sp_port *mlxsw_sp_port,
3148 u16 lag_id)
3149{
3150 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
3151 char slcor_pl[MLXSW_REG_SLCOR_LEN];
3152
3153 mlxsw_reg_slcor_col_enable_pack(slcor_pl, mlxsw_sp_port->local_port,
3154 lag_id);
3155 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(slcor), slcor_pl);
3156}
3157
3158static int mlxsw_sp_lag_col_port_disable(struct mlxsw_sp_port *mlxsw_sp_port,
3159 u16 lag_id)
3160{
3161 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
3162 char slcor_pl[MLXSW_REG_SLCOR_LEN];
3163
3164 mlxsw_reg_slcor_col_disable_pack(slcor_pl, mlxsw_sp_port->local_port,
3165 lag_id);
3166 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(slcor), slcor_pl);
3167}
3168
3169static int mlxsw_sp_lag_index_get(struct mlxsw_sp *mlxsw_sp,
3170 struct net_device *lag_dev,
3171 u16 *p_lag_id)
3172{
3173 struct mlxsw_sp_upper *lag;
3174 int free_lag_id = -1;
3175 int i;
3176
3177 for (i = 0; i < MLXSW_SP_LAG_MAX; i++) {
3178 lag = mlxsw_sp_lag_get(mlxsw_sp, i);
3179 if (lag->ref_count) {
3180 if (lag->dev == lag_dev) {
3181 *p_lag_id = i;
3182 return 0;
3183 }
3184 } else if (free_lag_id < 0) {
3185 free_lag_id = i;
3186 }
3187 }
3188 if (free_lag_id < 0)
3189 return -EBUSY;
3190 *p_lag_id = free_lag_id;
3191 return 0;
3192}
3193
3194static bool
3195mlxsw_sp_master_lag_check(struct mlxsw_sp *mlxsw_sp,
3196 struct net_device *lag_dev,
3197 struct netdev_lag_upper_info *lag_upper_info)
3198{
3199 u16 lag_id;
3200
3201 if (mlxsw_sp_lag_index_get(mlxsw_sp, lag_dev, &lag_id) != 0)
3202 return false;
3203 if (lag_upper_info->tx_type != NETDEV_LAG_TX_TYPE_HASH)
3204 return false;
3205 return true;
3206}
3207
3208static int mlxsw_sp_port_lag_index_get(struct mlxsw_sp *mlxsw_sp,
3209 u16 lag_id, u8 *p_port_index)
3210{
3211 int i;
3212
3213 for (i = 0; i < MLXSW_SP_PORT_PER_LAG_MAX; i++) {
3214 if (!mlxsw_sp_port_lagged_get(mlxsw_sp, lag_id, i)) {
3215 *p_port_index = i;
3216 return 0;
3217 }
3218 }
3219 return -EBUSY;
3220}
3221
Ido Schimmel86bf95b2016-07-02 11:00:11 +02003222static void
3223mlxsw_sp_port_pvid_vport_lag_join(struct mlxsw_sp_port *mlxsw_sp_port,
3224 u16 lag_id)
3225{
3226 struct mlxsw_sp_port *mlxsw_sp_vport;
Ido Schimmel11943ff2016-07-02 11:00:12 +02003227 struct mlxsw_sp_fid *f;
Ido Schimmel86bf95b2016-07-02 11:00:11 +02003228
3229 mlxsw_sp_vport = mlxsw_sp_port_vport_find(mlxsw_sp_port, 1);
3230 if (WARN_ON(!mlxsw_sp_vport))
3231 return;
3232
Ido Schimmel11943ff2016-07-02 11:00:12 +02003233 /* If vPort is assigned a RIF, then leave it since it's no
3234 * longer valid.
3235 */
3236 f = mlxsw_sp_vport_fid_get(mlxsw_sp_vport);
3237 if (f)
3238 f->leave(mlxsw_sp_vport);
3239
Ido Schimmel86bf95b2016-07-02 11:00:11 +02003240 mlxsw_sp_vport->lag_id = lag_id;
3241 mlxsw_sp_vport->lagged = 1;
3242}
3243
3244static void
3245mlxsw_sp_port_pvid_vport_lag_leave(struct mlxsw_sp_port *mlxsw_sp_port)
3246{
3247 struct mlxsw_sp_port *mlxsw_sp_vport;
Ido Schimmel11943ff2016-07-02 11:00:12 +02003248 struct mlxsw_sp_fid *f;
Ido Schimmel86bf95b2016-07-02 11:00:11 +02003249
3250 mlxsw_sp_vport = mlxsw_sp_port_vport_find(mlxsw_sp_port, 1);
3251 if (WARN_ON(!mlxsw_sp_vport))
3252 return;
3253
Ido Schimmel11943ff2016-07-02 11:00:12 +02003254 f = mlxsw_sp_vport_fid_get(mlxsw_sp_vport);
3255 if (f)
3256 f->leave(mlxsw_sp_vport);
3257
Ido Schimmel86bf95b2016-07-02 11:00:11 +02003258 mlxsw_sp_vport->lagged = 0;
3259}
3260
Jiri Pirko0d65fc12015-12-03 12:12:28 +01003261static int mlxsw_sp_port_lag_join(struct mlxsw_sp_port *mlxsw_sp_port,
3262 struct net_device *lag_dev)
3263{
3264 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
3265 struct mlxsw_sp_upper *lag;
3266 u16 lag_id;
3267 u8 port_index;
3268 int err;
3269
3270 err = mlxsw_sp_lag_index_get(mlxsw_sp, lag_dev, &lag_id);
3271 if (err)
3272 return err;
3273 lag = mlxsw_sp_lag_get(mlxsw_sp, lag_id);
3274 if (!lag->ref_count) {
3275 err = mlxsw_sp_lag_create(mlxsw_sp, lag_id);
3276 if (err)
3277 return err;
3278 lag->dev = lag_dev;
3279 }
3280
3281 err = mlxsw_sp_port_lag_index_get(mlxsw_sp, lag_id, &port_index);
3282 if (err)
3283 return err;
3284 err = mlxsw_sp_lag_col_port_add(mlxsw_sp_port, lag_id, port_index);
3285 if (err)
3286 goto err_col_port_add;
3287 err = mlxsw_sp_lag_col_port_enable(mlxsw_sp_port, lag_id);
3288 if (err)
3289 goto err_col_port_enable;
3290
3291 mlxsw_core_lag_mapping_set(mlxsw_sp->core, lag_id, port_index,
3292 mlxsw_sp_port->local_port);
3293 mlxsw_sp_port->lag_id = lag_id;
3294 mlxsw_sp_port->lagged = 1;
3295 lag->ref_count++;
Ido Schimmel86bf95b2016-07-02 11:00:11 +02003296
3297 mlxsw_sp_port_pvid_vport_lag_join(mlxsw_sp_port, lag_id);
3298
Jiri Pirko0d65fc12015-12-03 12:12:28 +01003299 return 0;
3300
Ido Schimmel51554db2016-05-06 22:18:39 +02003301err_col_port_enable:
3302 mlxsw_sp_lag_col_port_remove(mlxsw_sp_port, lag_id);
Jiri Pirko0d65fc12015-12-03 12:12:28 +01003303err_col_port_add:
3304 if (!lag->ref_count)
3305 mlxsw_sp_lag_destroy(mlxsw_sp, lag_id);
Jiri Pirko0d65fc12015-12-03 12:12:28 +01003306 return err;
3307}
3308
Ido Schimmel82e6db02016-06-20 23:04:04 +02003309static void mlxsw_sp_port_lag_leave(struct mlxsw_sp_port *mlxsw_sp_port,
3310 struct net_device *lag_dev)
Jiri Pirko0d65fc12015-12-03 12:12:28 +01003311{
3312 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
Jiri Pirko0d65fc12015-12-03 12:12:28 +01003313 u16 lag_id = mlxsw_sp_port->lag_id;
Ido Schimmel1c800752016-06-20 23:04:20 +02003314 struct mlxsw_sp_upper *lag;
Jiri Pirko0d65fc12015-12-03 12:12:28 +01003315
3316 if (!mlxsw_sp_port->lagged)
Ido Schimmel82e6db02016-06-20 23:04:04 +02003317 return;
Jiri Pirko0d65fc12015-12-03 12:12:28 +01003318 lag = mlxsw_sp_lag_get(mlxsw_sp, lag_id);
3319 WARN_ON(lag->ref_count == 0);
3320
Ido Schimmel82e6db02016-06-20 23:04:04 +02003321 mlxsw_sp_lag_col_port_disable(mlxsw_sp_port, lag_id);
3322 mlxsw_sp_lag_col_port_remove(mlxsw_sp_port, lag_id);
Jiri Pirko0d65fc12015-12-03 12:12:28 +01003323
Ido Schimmel4dc236c2016-01-27 15:20:16 +01003324 if (mlxsw_sp_port->bridged) {
3325 mlxsw_sp_port_active_vlans_del(mlxsw_sp_port);
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02003326 mlxsw_sp_port_bridge_leave(mlxsw_sp_port);
Ido Schimmel4dc236c2016-01-27 15:20:16 +01003327 }
3328
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02003329 if (lag->ref_count == 1)
Ido Schimmel82e6db02016-06-20 23:04:04 +02003330 mlxsw_sp_lag_destroy(mlxsw_sp, lag_id);
Jiri Pirko0d65fc12015-12-03 12:12:28 +01003331
3332 mlxsw_core_lag_mapping_clear(mlxsw_sp->core, lag_id,
3333 mlxsw_sp_port->local_port);
3334 mlxsw_sp_port->lagged = 0;
3335 lag->ref_count--;
Ido Schimmel86bf95b2016-07-02 11:00:11 +02003336
3337 mlxsw_sp_port_pvid_vport_lag_leave(mlxsw_sp_port);
Jiri Pirko0d65fc12015-12-03 12:12:28 +01003338}
3339
Jiri Pirko74581202015-12-03 12:12:30 +01003340static int mlxsw_sp_lag_dist_port_add(struct mlxsw_sp_port *mlxsw_sp_port,
3341 u16 lag_id)
3342{
3343 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
3344 char sldr_pl[MLXSW_REG_SLDR_LEN];
3345
3346 mlxsw_reg_sldr_lag_add_port_pack(sldr_pl, lag_id,
3347 mlxsw_sp_port->local_port);
3348 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sldr), sldr_pl);
3349}
3350
3351static int mlxsw_sp_lag_dist_port_remove(struct mlxsw_sp_port *mlxsw_sp_port,
3352 u16 lag_id)
3353{
3354 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
3355 char sldr_pl[MLXSW_REG_SLDR_LEN];
3356
3357 mlxsw_reg_sldr_lag_remove_port_pack(sldr_pl, lag_id,
3358 mlxsw_sp_port->local_port);
3359 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sldr), sldr_pl);
3360}
3361
3362static int mlxsw_sp_port_lag_tx_en_set(struct mlxsw_sp_port *mlxsw_sp_port,
3363 bool lag_tx_enabled)
3364{
3365 if (lag_tx_enabled)
3366 return mlxsw_sp_lag_dist_port_add(mlxsw_sp_port,
3367 mlxsw_sp_port->lag_id);
3368 else
3369 return mlxsw_sp_lag_dist_port_remove(mlxsw_sp_port,
3370 mlxsw_sp_port->lag_id);
3371}
3372
3373static int mlxsw_sp_port_lag_changed(struct mlxsw_sp_port *mlxsw_sp_port,
3374 struct netdev_lag_lower_state_info *info)
3375{
3376 return mlxsw_sp_port_lag_tx_en_set(mlxsw_sp_port, info->tx_enabled);
3377}
3378
Ido Schimmel9589a7b52015-12-15 16:03:43 +01003379static int mlxsw_sp_port_vlan_link(struct mlxsw_sp_port *mlxsw_sp_port,
3380 struct net_device *vlan_dev)
3381{
3382 struct mlxsw_sp_port *mlxsw_sp_vport;
3383 u16 vid = vlan_dev_vlan_id(vlan_dev);
3384
3385 mlxsw_sp_vport = mlxsw_sp_port_vport_find(mlxsw_sp_port, vid);
Ido Schimmel423b9372016-06-20 23:04:03 +02003386 if (WARN_ON(!mlxsw_sp_vport))
Ido Schimmel9589a7b52015-12-15 16:03:43 +01003387 return -EINVAL;
Ido Schimmel9589a7b52015-12-15 16:03:43 +01003388
3389 mlxsw_sp_vport->dev = vlan_dev;
3390
3391 return 0;
3392}
3393
Ido Schimmel82e6db02016-06-20 23:04:04 +02003394static void mlxsw_sp_port_vlan_unlink(struct mlxsw_sp_port *mlxsw_sp_port,
3395 struct net_device *vlan_dev)
Ido Schimmel9589a7b52015-12-15 16:03:43 +01003396{
3397 struct mlxsw_sp_port *mlxsw_sp_vport;
3398 u16 vid = vlan_dev_vlan_id(vlan_dev);
3399
3400 mlxsw_sp_vport = mlxsw_sp_port_vport_find(mlxsw_sp_port, vid);
Ido Schimmel423b9372016-06-20 23:04:03 +02003401 if (WARN_ON(!mlxsw_sp_vport))
Ido Schimmel82e6db02016-06-20 23:04:04 +02003402 return;
Ido Schimmel9589a7b52015-12-15 16:03:43 +01003403
3404 mlxsw_sp_vport->dev = mlxsw_sp_port->dev;
Ido Schimmel9589a7b52015-12-15 16:03:43 +01003405}
3406
Jiri Pirko74581202015-12-03 12:12:30 +01003407static int mlxsw_sp_netdevice_port_upper_event(struct net_device *dev,
3408 unsigned long event, void *ptr)
Jiri Pirko0d65fc12015-12-03 12:12:28 +01003409{
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003410 struct netdev_notifier_changeupper_info *info;
3411 struct mlxsw_sp_port *mlxsw_sp_port;
3412 struct net_device *upper_dev;
3413 struct mlxsw_sp *mlxsw_sp;
Ido Schimmel80bedf12016-06-20 23:03:59 +02003414 int err = 0;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003415
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003416 mlxsw_sp_port = netdev_priv(dev);
3417 mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
3418 info = ptr;
3419
3420 switch (event) {
3421 case NETDEV_PRECHANGEUPPER:
3422 upper_dev = info->upper_dev;
Ido Schimmel59fe9b32016-06-20 23:04:00 +02003423 if (!is_vlan_dev(upper_dev) &&
3424 !netif_is_lag_master(upper_dev) &&
3425 !netif_is_bridge_master(upper_dev))
3426 return -EINVAL;
Ido Schimmel6ec43902016-06-20 23:04:01 +02003427 if (!info->linking)
Jiri Pirko0d65fc12015-12-03 12:12:28 +01003428 break;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003429 /* HW limitation forbids to put ports to multiple bridges. */
Jiri Pirko0d65fc12015-12-03 12:12:28 +01003430 if (netif_is_bridge_master(upper_dev) &&
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003431 !mlxsw_sp_master_bridge_check(mlxsw_sp, upper_dev))
Ido Schimmel80bedf12016-06-20 23:03:59 +02003432 return -EINVAL;
Jiri Pirko0d65fc12015-12-03 12:12:28 +01003433 if (netif_is_lag_master(upper_dev) &&
3434 !mlxsw_sp_master_lag_check(mlxsw_sp, upper_dev,
3435 info->upper_info))
Ido Schimmel80bedf12016-06-20 23:03:59 +02003436 return -EINVAL;
Ido Schimmel6ec43902016-06-20 23:04:01 +02003437 if (netif_is_lag_master(upper_dev) && vlan_uses_dev(dev))
3438 return -EINVAL;
3439 if (netif_is_lag_port(dev) && is_vlan_dev(upper_dev) &&
3440 !netif_is_lag_master(vlan_dev_real_dev(upper_dev)))
3441 return -EINVAL;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003442 break;
3443 case NETDEV_CHANGEUPPER:
3444 upper_dev = info->upper_dev;
Ido Schimmel9589a7b52015-12-15 16:03:43 +01003445 if (is_vlan_dev(upper_dev)) {
Ido Schimmel80bedf12016-06-20 23:03:59 +02003446 if (info->linking)
Ido Schimmel9589a7b52015-12-15 16:03:43 +01003447 err = mlxsw_sp_port_vlan_link(mlxsw_sp_port,
3448 upper_dev);
Ido Schimmel80bedf12016-06-20 23:03:59 +02003449 else
Ido Schimmel82e6db02016-06-20 23:04:04 +02003450 mlxsw_sp_port_vlan_unlink(mlxsw_sp_port,
3451 upper_dev);
Ido Schimmel9589a7b52015-12-15 16:03:43 +01003452 } else if (netif_is_bridge_master(upper_dev)) {
Ido Schimmel7117a572016-06-20 23:04:06 +02003453 if (info->linking)
3454 err = mlxsw_sp_port_bridge_join(mlxsw_sp_port,
3455 upper_dev);
3456 else
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02003457 mlxsw_sp_port_bridge_leave(mlxsw_sp_port);
Jiri Pirko0d65fc12015-12-03 12:12:28 +01003458 } else if (netif_is_lag_master(upper_dev)) {
Ido Schimmel80bedf12016-06-20 23:03:59 +02003459 if (info->linking)
Jiri Pirko0d65fc12015-12-03 12:12:28 +01003460 err = mlxsw_sp_port_lag_join(mlxsw_sp_port,
3461 upper_dev);
Ido Schimmel80bedf12016-06-20 23:03:59 +02003462 else
Ido Schimmel82e6db02016-06-20 23:04:04 +02003463 mlxsw_sp_port_lag_leave(mlxsw_sp_port,
3464 upper_dev);
Ido Schimmel59fe9b32016-06-20 23:04:00 +02003465 } else {
3466 err = -EINVAL;
3467 WARN_ON(1);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003468 }
3469 break;
3470 }
3471
Ido Schimmel80bedf12016-06-20 23:03:59 +02003472 return err;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003473}
3474
Jiri Pirko74581202015-12-03 12:12:30 +01003475static int mlxsw_sp_netdevice_port_lower_event(struct net_device *dev,
3476 unsigned long event, void *ptr)
3477{
3478 struct netdev_notifier_changelowerstate_info *info;
3479 struct mlxsw_sp_port *mlxsw_sp_port;
3480 int err;
3481
3482 mlxsw_sp_port = netdev_priv(dev);
3483 info = ptr;
3484
3485 switch (event) {
3486 case NETDEV_CHANGELOWERSTATE:
3487 if (netif_is_lag_port(dev) && mlxsw_sp_port->lagged) {
3488 err = mlxsw_sp_port_lag_changed(mlxsw_sp_port,
3489 info->lower_state_info);
3490 if (err)
3491 netdev_err(dev, "Failed to reflect link aggregation lower state change\n");
3492 }
3493 break;
3494 }
3495
Ido Schimmel80bedf12016-06-20 23:03:59 +02003496 return 0;
Jiri Pirko74581202015-12-03 12:12:30 +01003497}
3498
3499static int mlxsw_sp_netdevice_port_event(struct net_device *dev,
3500 unsigned long event, void *ptr)
3501{
3502 switch (event) {
3503 case NETDEV_PRECHANGEUPPER:
3504 case NETDEV_CHANGEUPPER:
3505 return mlxsw_sp_netdevice_port_upper_event(dev, event, ptr);
3506 case NETDEV_CHANGELOWERSTATE:
3507 return mlxsw_sp_netdevice_port_lower_event(dev, event, ptr);
3508 }
3509
Ido Schimmel80bedf12016-06-20 23:03:59 +02003510 return 0;
Jiri Pirko74581202015-12-03 12:12:30 +01003511}
3512
Jiri Pirko0d65fc12015-12-03 12:12:28 +01003513static int mlxsw_sp_netdevice_lag_event(struct net_device *lag_dev,
3514 unsigned long event, void *ptr)
3515{
3516 struct net_device *dev;
3517 struct list_head *iter;
3518 int ret;
3519
3520 netdev_for_each_lower_dev(lag_dev, dev, iter) {
3521 if (mlxsw_sp_port_dev_check(dev)) {
3522 ret = mlxsw_sp_netdevice_port_event(dev, event, ptr);
Ido Schimmel80bedf12016-06-20 23:03:59 +02003523 if (ret)
Jiri Pirko0d65fc12015-12-03 12:12:28 +01003524 return ret;
3525 }
3526 }
3527
Ido Schimmel80bedf12016-06-20 23:03:59 +02003528 return 0;
Jiri Pirko0d65fc12015-12-03 12:12:28 +01003529}
3530
Ido Schimmel701b1862016-07-04 08:23:16 +02003531static int mlxsw_sp_master_bridge_vlan_link(struct mlxsw_sp *mlxsw_sp,
3532 struct net_device *vlan_dev)
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01003533{
Ido Schimmel701b1862016-07-04 08:23:16 +02003534 u16 fid = vlan_dev_vlan_id(vlan_dev);
Ido Schimmeld0ec8752016-06-20 23:04:12 +02003535 struct mlxsw_sp_fid *f;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01003536
Ido Schimmel701b1862016-07-04 08:23:16 +02003537 f = mlxsw_sp_fid_find(mlxsw_sp, fid);
3538 if (!f) {
3539 f = mlxsw_sp_fid_create(mlxsw_sp, fid);
3540 if (IS_ERR(f))
3541 return PTR_ERR(f);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01003542 }
3543
Ido Schimmel701b1862016-07-04 08:23:16 +02003544 f->ref_count++;
3545
3546 return 0;
3547}
3548
3549static void mlxsw_sp_master_bridge_vlan_unlink(struct mlxsw_sp *mlxsw_sp,
3550 struct net_device *vlan_dev)
3551{
3552 u16 fid = vlan_dev_vlan_id(vlan_dev);
3553 struct mlxsw_sp_fid *f;
3554
3555 f = mlxsw_sp_fid_find(mlxsw_sp, fid);
Ido Schimmel99f44bb2016-07-04 08:23:17 +02003556 if (f && f->r)
3557 mlxsw_sp_rif_bridge_destroy(mlxsw_sp, f->r);
Ido Schimmel701b1862016-07-04 08:23:16 +02003558 if (f && --f->ref_count == 0)
3559 mlxsw_sp_fid_destroy(mlxsw_sp, f);
3560}
3561
3562static int mlxsw_sp_netdevice_bridge_event(struct net_device *br_dev,
3563 unsigned long event, void *ptr)
3564{
3565 struct netdev_notifier_changeupper_info *info;
3566 struct net_device *upper_dev;
3567 struct mlxsw_sp *mlxsw_sp;
3568 int err;
3569
3570 mlxsw_sp = mlxsw_sp_lower_get(br_dev);
3571 if (!mlxsw_sp)
3572 return 0;
3573 if (br_dev != mlxsw_sp->master_bridge.dev)
3574 return 0;
3575
3576 info = ptr;
3577
3578 switch (event) {
3579 case NETDEV_CHANGEUPPER:
3580 upper_dev = info->upper_dev;
3581 if (!is_vlan_dev(upper_dev))
3582 break;
3583 if (info->linking) {
3584 err = mlxsw_sp_master_bridge_vlan_link(mlxsw_sp,
3585 upper_dev);
3586 if (err)
3587 return err;
3588 } else {
3589 mlxsw_sp_master_bridge_vlan_unlink(mlxsw_sp, upper_dev);
3590 }
3591 break;
3592 }
3593
3594 return 0;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01003595}
3596
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02003597static u16 mlxsw_sp_avail_vfid_get(const struct mlxsw_sp *mlxsw_sp)
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01003598{
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02003599 return find_first_zero_bit(mlxsw_sp->vfids.mapped,
Ido Schimmel99724c12016-07-04 08:23:14 +02003600 MLXSW_SP_VFID_MAX);
3601}
3602
3603static int mlxsw_sp_vfid_op(struct mlxsw_sp *mlxsw_sp, u16 fid, bool create)
3604{
3605 char sfmr_pl[MLXSW_REG_SFMR_LEN];
3606
3607 mlxsw_reg_sfmr_pack(sfmr_pl, !create, fid, 0);
3608 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sfmr), sfmr_pl);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01003609}
3610
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02003611static void mlxsw_sp_vport_vfid_leave(struct mlxsw_sp_port *mlxsw_sp_vport);
Ido Schimmel1c800752016-06-20 23:04:20 +02003612
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02003613static struct mlxsw_sp_fid *mlxsw_sp_vfid_create(struct mlxsw_sp *mlxsw_sp,
3614 struct net_device *br_dev)
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01003615{
3616 struct device *dev = mlxsw_sp->bus_info->dev;
Ido Schimmeld0ec8752016-06-20 23:04:12 +02003617 struct mlxsw_sp_fid *f;
Ido Schimmelc7e920b2016-06-20 23:04:09 +02003618 u16 vfid, fid;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01003619 int err;
3620
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02003621 vfid = mlxsw_sp_avail_vfid_get(mlxsw_sp);
Ido Schimmelc7e920b2016-06-20 23:04:09 +02003622 if (vfid == MLXSW_SP_VFID_MAX) {
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01003623 dev_err(dev, "No available vFIDs\n");
3624 return ERR_PTR(-ERANGE);
3625 }
3626
Ido Schimmelc7e920b2016-06-20 23:04:09 +02003627 fid = mlxsw_sp_vfid_to_fid(vfid);
3628 err = mlxsw_sp_vfid_op(mlxsw_sp, fid, true);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01003629 if (err) {
Ido Schimmelc7e920b2016-06-20 23:04:09 +02003630 dev_err(dev, "Failed to create FID=%d\n", fid);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01003631 return ERR_PTR(err);
3632 }
3633
Ido Schimmelc7e920b2016-06-20 23:04:09 +02003634 f = kzalloc(sizeof(*f), GFP_KERNEL);
3635 if (!f)
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01003636 goto err_allocate_vfid;
3637
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02003638 f->leave = mlxsw_sp_vport_vfid_leave;
Ido Schimmeld0ec8752016-06-20 23:04:12 +02003639 f->fid = fid;
3640 f->dev = br_dev;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01003641
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02003642 list_add(&f->list, &mlxsw_sp->vfids.list);
3643 set_bit(vfid, mlxsw_sp->vfids.mapped);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01003644
Ido Schimmelc7e920b2016-06-20 23:04:09 +02003645 return f;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01003646
3647err_allocate_vfid:
Ido Schimmelc7e920b2016-06-20 23:04:09 +02003648 mlxsw_sp_vfid_op(mlxsw_sp, fid, false);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01003649 return ERR_PTR(-ENOMEM);
3650}
3651
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02003652static void mlxsw_sp_vfid_destroy(struct mlxsw_sp *mlxsw_sp,
3653 struct mlxsw_sp_fid *f)
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01003654{
Ido Schimmeld0ec8752016-06-20 23:04:12 +02003655 u16 vfid = mlxsw_sp_fid_to_vfid(f->fid);
Ido Schimmel99f44bb2016-07-04 08:23:17 +02003656 u16 fid = f->fid;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01003657
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02003658 clear_bit(vfid, mlxsw_sp->vfids.mapped);
Ido Schimmeld0ec8752016-06-20 23:04:12 +02003659 list_del(&f->list);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01003660
Ido Schimmel99f44bb2016-07-04 08:23:17 +02003661 if (f->r)
3662 mlxsw_sp_rif_bridge_destroy(mlxsw_sp, f->r);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01003663
Ido Schimmeld0ec8752016-06-20 23:04:12 +02003664 kfree(f);
Ido Schimmel99f44bb2016-07-04 08:23:17 +02003665
3666 mlxsw_sp_vfid_op(mlxsw_sp, fid, false);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01003667}
3668
Ido Schimmel99724c12016-07-04 08:23:14 +02003669static int mlxsw_sp_vport_fid_map(struct mlxsw_sp_port *mlxsw_sp_vport, u16 fid,
3670 bool valid)
3671{
3672 enum mlxsw_reg_svfa_mt mt = MLXSW_REG_SVFA_MT_PORT_VID_TO_FID;
3673 u16 vid = mlxsw_sp_vport_vid_get(mlxsw_sp_vport);
3674
3675 return mlxsw_sp_port_vid_to_fid_set(mlxsw_sp_vport, mt, valid, fid,
3676 vid);
3677}
3678
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02003679static int mlxsw_sp_vport_vfid_join(struct mlxsw_sp_port *mlxsw_sp_vport,
3680 struct net_device *br_dev)
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01003681{
Ido Schimmel0355b592016-06-20 23:04:13 +02003682 struct mlxsw_sp_fid *f;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01003683 int err;
3684
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02003685 f = mlxsw_sp_vfid_find(mlxsw_sp_vport->mlxsw_sp, br_dev);
Ido Schimmel0355b592016-06-20 23:04:13 +02003686 if (!f) {
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02003687 f = mlxsw_sp_vfid_create(mlxsw_sp_vport->mlxsw_sp, br_dev);
Ido Schimmel0355b592016-06-20 23:04:13 +02003688 if (IS_ERR(f))
3689 return PTR_ERR(f);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01003690 }
3691
Ido Schimmel0355b592016-06-20 23:04:13 +02003692 err = mlxsw_sp_vport_flood_set(mlxsw_sp_vport, f->fid, true);
3693 if (err)
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01003694 goto err_vport_flood_set;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01003695
Ido Schimmel0355b592016-06-20 23:04:13 +02003696 err = mlxsw_sp_vport_fid_map(mlxsw_sp_vport, f->fid, true);
3697 if (err)
3698 goto err_vport_fid_map;
Ido Schimmel6a9863a2016-02-15 13:19:54 +01003699
Ido Schimmel41b996c2016-06-20 23:04:17 +02003700 mlxsw_sp_vport_fid_set(mlxsw_sp_vport, f);
Ido Schimmel0355b592016-06-20 23:04:13 +02003701 f->ref_count++;
Ido Schimmel039c49a2016-01-27 15:20:18 +01003702
Ido Schimmel22305372016-06-20 23:04:21 +02003703 netdev_dbg(mlxsw_sp_vport->dev, "Joined FID=%d\n", f->fid);
3704
Ido Schimmel0355b592016-06-20 23:04:13 +02003705 return 0;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01003706
Ido Schimmel9c4d4422016-06-20 23:04:10 +02003707err_vport_fid_map:
Ido Schimmel0355b592016-06-20 23:04:13 +02003708 mlxsw_sp_vport_flood_set(mlxsw_sp_vport, f->fid, false);
3709err_vport_flood_set:
3710 if (!f->ref_count)
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02003711 mlxsw_sp_vfid_destroy(mlxsw_sp_vport->mlxsw_sp, f);
Ido Schimmel0355b592016-06-20 23:04:13 +02003712 return err;
3713}
3714
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02003715static void mlxsw_sp_vport_vfid_leave(struct mlxsw_sp_port *mlxsw_sp_vport)
Ido Schimmel0355b592016-06-20 23:04:13 +02003716{
Ido Schimmel41b996c2016-06-20 23:04:17 +02003717 struct mlxsw_sp_fid *f = mlxsw_sp_vport_fid_get(mlxsw_sp_vport);
Ido Schimmel0355b592016-06-20 23:04:13 +02003718
Ido Schimmel22305372016-06-20 23:04:21 +02003719 netdev_dbg(mlxsw_sp_vport->dev, "Left FID=%d\n", f->fid);
3720
Ido Schimmel0355b592016-06-20 23:04:13 +02003721 mlxsw_sp_vport_fid_map(mlxsw_sp_vport, f->fid, false);
3722
3723 mlxsw_sp_vport_flood_set(mlxsw_sp_vport, f->fid, false);
3724
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02003725 mlxsw_sp_port_fdb_flush(mlxsw_sp_vport, f->fid);
3726
Ido Schimmel41b996c2016-06-20 23:04:17 +02003727 mlxsw_sp_vport_fid_set(mlxsw_sp_vport, NULL);
Ido Schimmel0355b592016-06-20 23:04:13 +02003728 if (--f->ref_count == 0)
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02003729 mlxsw_sp_vfid_destroy(mlxsw_sp_vport->mlxsw_sp, f);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01003730}
3731
3732static int mlxsw_sp_vport_bridge_join(struct mlxsw_sp_port *mlxsw_sp_vport,
3733 struct net_device *br_dev)
3734{
Ido Schimmel99724c12016-07-04 08:23:14 +02003735 struct mlxsw_sp_fid *f = mlxsw_sp_vport_fid_get(mlxsw_sp_vport);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01003736 u16 vid = mlxsw_sp_vport_vid_get(mlxsw_sp_vport);
3737 struct net_device *dev = mlxsw_sp_vport->dev;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01003738 int err;
3739
Ido Schimmel99724c12016-07-04 08:23:14 +02003740 if (f && !WARN_ON(!f->leave))
3741 f->leave(mlxsw_sp_vport);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01003742
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02003743 err = mlxsw_sp_vport_vfid_join(mlxsw_sp_vport, br_dev);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01003744 if (err) {
Ido Schimmel0355b592016-06-20 23:04:13 +02003745 netdev_err(dev, "Failed to join vFID\n");
Ido Schimmel99724c12016-07-04 08:23:14 +02003746 return err;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01003747 }
3748
3749 err = mlxsw_sp_port_vid_learning_set(mlxsw_sp_vport, vid, true);
3750 if (err) {
3751 netdev_err(dev, "Failed to enable learning\n");
3752 goto err_port_vid_learning_set;
3753 }
3754
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01003755 mlxsw_sp_vport->learning = 1;
3756 mlxsw_sp_vport->learning_sync = 1;
3757 mlxsw_sp_vport->uc_flood = 1;
3758 mlxsw_sp_vport->bridged = 1;
3759
3760 return 0;
3761
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01003762err_port_vid_learning_set:
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02003763 mlxsw_sp_vport_vfid_leave(mlxsw_sp_vport);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01003764 return err;
3765}
3766
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02003767static void mlxsw_sp_vport_bridge_leave(struct mlxsw_sp_port *mlxsw_sp_vport)
Ido Schimmel0355b592016-06-20 23:04:13 +02003768{
3769 u16 vid = mlxsw_sp_vport_vid_get(mlxsw_sp_vport);
Ido Schimmel0355b592016-06-20 23:04:13 +02003770
3771 mlxsw_sp_port_vid_learning_set(mlxsw_sp_vport, vid, false);
3772
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02003773 mlxsw_sp_vport_vfid_leave(mlxsw_sp_vport);
Ido Schimmel0355b592016-06-20 23:04:13 +02003774
Ido Schimmel0355b592016-06-20 23:04:13 +02003775 mlxsw_sp_vport->learning = 0;
3776 mlxsw_sp_vport->learning_sync = 0;
3777 mlxsw_sp_vport->uc_flood = 0;
3778 mlxsw_sp_vport->bridged = 0;
3779}
3780
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01003781static bool
3782mlxsw_sp_port_master_bridge_check(const struct mlxsw_sp_port *mlxsw_sp_port,
3783 const struct net_device *br_dev)
3784{
3785 struct mlxsw_sp_port *mlxsw_sp_vport;
3786
3787 list_for_each_entry(mlxsw_sp_vport, &mlxsw_sp_port->vports_list,
3788 vport.list) {
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02003789 struct net_device *dev = mlxsw_sp_vport_dev_get(mlxsw_sp_vport);
Ido Schimmel56918b62016-06-20 23:04:18 +02003790
3791 if (dev && dev == br_dev)
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01003792 return false;
3793 }
3794
3795 return true;
3796}
3797
3798static int mlxsw_sp_netdevice_vport_event(struct net_device *dev,
3799 unsigned long event, void *ptr,
3800 u16 vid)
3801{
3802 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
3803 struct netdev_notifier_changeupper_info *info = ptr;
3804 struct mlxsw_sp_port *mlxsw_sp_vport;
3805 struct net_device *upper_dev;
Ido Schimmel80bedf12016-06-20 23:03:59 +02003806 int err = 0;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01003807
3808 mlxsw_sp_vport = mlxsw_sp_port_vport_find(mlxsw_sp_port, vid);
3809
3810 switch (event) {
3811 case NETDEV_PRECHANGEUPPER:
3812 upper_dev = info->upper_dev;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01003813 if (!netif_is_bridge_master(upper_dev))
Ido Schimmel80bedf12016-06-20 23:03:59 +02003814 return -EINVAL;
Ido Schimmelddbe9932016-06-20 23:04:02 +02003815 if (!info->linking)
3816 break;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01003817 /* We can't have multiple VLAN interfaces configured on
3818 * the same port and being members in the same bridge.
3819 */
3820 if (!mlxsw_sp_port_master_bridge_check(mlxsw_sp_port,
3821 upper_dev))
Ido Schimmel80bedf12016-06-20 23:03:59 +02003822 return -EINVAL;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01003823 break;
3824 case NETDEV_CHANGEUPPER:
3825 upper_dev = info->upper_dev;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01003826 if (info->linking) {
Ido Schimmel423b9372016-06-20 23:04:03 +02003827 if (WARN_ON(!mlxsw_sp_vport))
Ido Schimmel80bedf12016-06-20 23:03:59 +02003828 return -EINVAL;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01003829 err = mlxsw_sp_vport_bridge_join(mlxsw_sp_vport,
3830 upper_dev);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01003831 } else {
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01003832 if (!mlxsw_sp_vport)
Ido Schimmel80bedf12016-06-20 23:03:59 +02003833 return 0;
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02003834 mlxsw_sp_vport_bridge_leave(mlxsw_sp_vport);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01003835 }
3836 }
3837
Ido Schimmel80bedf12016-06-20 23:03:59 +02003838 return err;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01003839}
3840
Ido Schimmel272c4472015-12-15 16:03:47 +01003841static int mlxsw_sp_netdevice_lag_vport_event(struct net_device *lag_dev,
3842 unsigned long event, void *ptr,
3843 u16 vid)
3844{
3845 struct net_device *dev;
3846 struct list_head *iter;
3847 int ret;
3848
3849 netdev_for_each_lower_dev(lag_dev, dev, iter) {
3850 if (mlxsw_sp_port_dev_check(dev)) {
3851 ret = mlxsw_sp_netdevice_vport_event(dev, event, ptr,
3852 vid);
Ido Schimmel80bedf12016-06-20 23:03:59 +02003853 if (ret)
Ido Schimmel272c4472015-12-15 16:03:47 +01003854 return ret;
3855 }
3856 }
3857
Ido Schimmel80bedf12016-06-20 23:03:59 +02003858 return 0;
Ido Schimmel272c4472015-12-15 16:03:47 +01003859}
3860
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01003861static int mlxsw_sp_netdevice_vlan_event(struct net_device *vlan_dev,
3862 unsigned long event, void *ptr)
3863{
3864 struct net_device *real_dev = vlan_dev_real_dev(vlan_dev);
3865 u16 vid = vlan_dev_vlan_id(vlan_dev);
3866
Ido Schimmel272c4472015-12-15 16:03:47 +01003867 if (mlxsw_sp_port_dev_check(real_dev))
3868 return mlxsw_sp_netdevice_vport_event(real_dev, event, ptr,
3869 vid);
3870 else if (netif_is_lag_master(real_dev))
3871 return mlxsw_sp_netdevice_lag_vport_event(real_dev, event, ptr,
3872 vid);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01003873
Ido Schimmel80bedf12016-06-20 23:03:59 +02003874 return 0;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01003875}
3876
Jiri Pirko0d65fc12015-12-03 12:12:28 +01003877static int mlxsw_sp_netdevice_event(struct notifier_block *unused,
3878 unsigned long event, void *ptr)
3879{
3880 struct net_device *dev = netdev_notifier_info_to_dev(ptr);
Ido Schimmel80bedf12016-06-20 23:03:59 +02003881 int err = 0;
Jiri Pirko0d65fc12015-12-03 12:12:28 +01003882
Ido Schimmel6e095fd2016-07-04 08:23:13 +02003883 if (event == NETDEV_CHANGEADDR || event == NETDEV_CHANGEMTU)
3884 err = mlxsw_sp_netdevice_router_port_event(dev);
3885 else if (mlxsw_sp_port_dev_check(dev))
Ido Schimmel80bedf12016-06-20 23:03:59 +02003886 err = mlxsw_sp_netdevice_port_event(dev, event, ptr);
3887 else if (netif_is_lag_master(dev))
3888 err = mlxsw_sp_netdevice_lag_event(dev, event, ptr);
Ido Schimmel701b1862016-07-04 08:23:16 +02003889 else if (netif_is_bridge_master(dev))
3890 err = mlxsw_sp_netdevice_bridge_event(dev, event, ptr);
Ido Schimmel80bedf12016-06-20 23:03:59 +02003891 else if (is_vlan_dev(dev))
3892 err = mlxsw_sp_netdevice_vlan_event(dev, event, ptr);
Jiri Pirko0d65fc12015-12-03 12:12:28 +01003893
Ido Schimmel80bedf12016-06-20 23:03:59 +02003894 return notifier_from_errno(err);
Jiri Pirko0d65fc12015-12-03 12:12:28 +01003895}
3896
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003897static struct notifier_block mlxsw_sp_netdevice_nb __read_mostly = {
3898 .notifier_call = mlxsw_sp_netdevice_event,
3899};
3900
Ido Schimmel99724c12016-07-04 08:23:14 +02003901static struct notifier_block mlxsw_sp_inetaddr_nb __read_mostly = {
3902 .notifier_call = mlxsw_sp_inetaddr_event,
3903 .priority = 10, /* Must be called before FIB notifier block */
3904};
3905
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003906static int __init mlxsw_sp_module_init(void)
3907{
3908 int err;
3909
3910 register_netdevice_notifier(&mlxsw_sp_netdevice_nb);
Ido Schimmel99724c12016-07-04 08:23:14 +02003911 register_inetaddr_notifier(&mlxsw_sp_inetaddr_nb);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003912 err = mlxsw_core_driver_register(&mlxsw_sp_driver);
3913 if (err)
3914 goto err_core_driver_register;
3915 return 0;
3916
3917err_core_driver_register:
3918 unregister_netdevice_notifier(&mlxsw_sp_netdevice_nb);
3919 return err;
3920}
3921
3922static void __exit mlxsw_sp_module_exit(void)
3923{
3924 mlxsw_core_driver_unregister(&mlxsw_sp_driver);
Ido Schimmel99724c12016-07-04 08:23:14 +02003925 unregister_inetaddr_notifier(&mlxsw_sp_inetaddr_nb);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003926 unregister_netdevice_notifier(&mlxsw_sp_netdevice_nb);
3927}
3928
3929module_init(mlxsw_sp_module_init);
3930module_exit(mlxsw_sp_module_exit);
3931
3932MODULE_LICENSE("Dual BSD/GPL");
3933MODULE_AUTHOR("Jiri Pirko <jiri@mellanox.com>");
3934MODULE_DESCRIPTION("Mellanox Spectrum driver");
3935MODULE_MLXSW_DRIVER_ALIAS(MLXSW_DEVICE_KIND_SPECTRUM);