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Graeme Gregory518fb722011-05-02 16:20:08 -05001/*
2 * tps65910.c -- TI tps65910
3 *
4 * Copyright 2010 Texas Instruments Inc.
5 *
6 * Author: Graeme Gregory <gg@slimlogic.co.uk>
7 * Author: Jorge Eduardo Candelaria <jedu@slimlogic.co.uk>
8 *
9 * This program is free software; you can redistribute it and/or modify it
10 * under the terms of the GNU General Public License as published by the
11 * Free Software Foundation; either version 2 of the License, or (at your
12 * option) any later version.
13 *
14 */
15
16#include <linux/kernel.h>
17#include <linux/module.h>
18#include <linux/init.h>
19#include <linux/err.h>
20#include <linux/platform_device.h>
21#include <linux/regulator/driver.h>
22#include <linux/regulator/machine.h>
Graeme Gregory518fb722011-05-02 16:20:08 -050023#include <linux/slab.h>
24#include <linux/gpio.h>
25#include <linux/mfd/tps65910.h>
Rhyland Klein67901782012-05-08 11:42:41 -070026#include <linux/regulator/of_regulator.h>
Graeme Gregory518fb722011-05-02 16:20:08 -050027
Graeme Gregory518fb722011-05-02 16:20:08 -050028#define TPS65910_SUPPLY_STATE_ENABLED 0x1
Laxman Dewangan1e0c66f2012-01-28 15:07:57 +053029#define EXT_SLEEP_CONTROL (TPS65910_SLEEP_CONTROL_EXT_INPUT_EN1 | \
30 TPS65910_SLEEP_CONTROL_EXT_INPUT_EN2 | \
Laxman Dewanganf30b0712012-03-07 18:21:49 +053031 TPS65910_SLEEP_CONTROL_EXT_INPUT_EN3 | \
32 TPS65911_SLEEP_CONTROL_EXT_INPUT_SLEEP)
Graeme Gregory518fb722011-05-02 16:20:08 -050033
Axel Lind9fe28f2012-06-21 18:48:00 +080034/* supported VIO voltages in microvolts */
35static const unsigned int VIO_VSEL_table[] = {
36 1500000, 1800000, 2500000, 3300000,
Graeme Gregory518fb722011-05-02 16:20:08 -050037};
38
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -050039/* VSEL tables for TPS65910 specific LDOs and dcdc's */
40
Axel Lind9fe28f2012-06-21 18:48:00 +080041/* supported VDD3 voltages in microvolts */
42static const unsigned int VDD3_VSEL_table[] = {
43 5000000,
Graeme Gregory518fb722011-05-02 16:20:08 -050044};
45
Axel Lind9fe28f2012-06-21 18:48:00 +080046/* supported VDIG1 voltages in microvolts */
47static const unsigned int VDIG1_VSEL_table[] = {
48 1200000, 1500000, 1800000, 2700000,
Graeme Gregory518fb722011-05-02 16:20:08 -050049};
50
Axel Lind9fe28f2012-06-21 18:48:00 +080051/* supported VDIG2 voltages in microvolts */
52static const unsigned int VDIG2_VSEL_table[] = {
53 1000000, 1100000, 1200000, 1800000,
Graeme Gregory518fb722011-05-02 16:20:08 -050054};
55
Axel Lind9fe28f2012-06-21 18:48:00 +080056/* supported VPLL voltages in microvolts */
57static const unsigned int VPLL_VSEL_table[] = {
58 1000000, 1100000, 1800000, 2500000,
Graeme Gregory518fb722011-05-02 16:20:08 -050059};
60
Axel Lind9fe28f2012-06-21 18:48:00 +080061/* supported VDAC voltages in microvolts */
62static const unsigned int VDAC_VSEL_table[] = {
63 1800000, 2600000, 2800000, 2850000,
Graeme Gregory518fb722011-05-02 16:20:08 -050064};
65
Axel Lind9fe28f2012-06-21 18:48:00 +080066/* supported VAUX1 voltages in microvolts */
67static const unsigned int VAUX1_VSEL_table[] = {
68 1800000, 2500000, 2800000, 2850000,
Graeme Gregory518fb722011-05-02 16:20:08 -050069};
70
Axel Lind9fe28f2012-06-21 18:48:00 +080071/* supported VAUX2 voltages in microvolts */
72static const unsigned int VAUX2_VSEL_table[] = {
73 1800000, 2800000, 2900000, 3300000,
Graeme Gregory518fb722011-05-02 16:20:08 -050074};
75
Axel Lind9fe28f2012-06-21 18:48:00 +080076/* supported VAUX33 voltages in microvolts */
77static const unsigned int VAUX33_VSEL_table[] = {
78 1800000, 2000000, 2800000, 3300000,
Graeme Gregory518fb722011-05-02 16:20:08 -050079};
80
Axel Lind9fe28f2012-06-21 18:48:00 +080081/* supported VMMC voltages in microvolts */
82static const unsigned int VMMC_VSEL_table[] = {
83 1800000, 2800000, 3000000, 3300000,
Graeme Gregory518fb722011-05-02 16:20:08 -050084};
85
86struct tps_info {
87 const char *name;
Laxman Dewangan7d38a3c2012-01-20 16:36:22 +053088 u8 n_voltages;
Axel Lind9fe28f2012-06-21 18:48:00 +080089 const unsigned int *voltage_table;
Laxman Dewangan0651eed2012-03-13 11:35:20 +053090 int enable_time_us;
Graeme Gregory518fb722011-05-02 16:20:08 -050091};
92
93static struct tps_info tps65910_regs[] = {
94 {
Laxman Dewangan33a69432012-05-19 20:04:06 +053095 .name = "vrtc",
Laxman Dewangan0651eed2012-03-13 11:35:20 +053096 .enable_time_us = 2200,
Graeme Gregory518fb722011-05-02 16:20:08 -050097 },
98 {
Laxman Dewangan33a69432012-05-19 20:04:06 +053099 .name = "vio",
Laxman Dewangan7d38a3c2012-01-20 16:36:22 +0530100 .n_voltages = ARRAY_SIZE(VIO_VSEL_table),
101 .voltage_table = VIO_VSEL_table,
Laxman Dewangan0651eed2012-03-13 11:35:20 +0530102 .enable_time_us = 350,
Graeme Gregory518fb722011-05-02 16:20:08 -0500103 },
104 {
Laxman Dewangan33a69432012-05-19 20:04:06 +0530105 .name = "vdd1",
Laxman Dewangan0651eed2012-03-13 11:35:20 +0530106 .enable_time_us = 350,
Graeme Gregory518fb722011-05-02 16:20:08 -0500107 },
108 {
Laxman Dewangan33a69432012-05-19 20:04:06 +0530109 .name = "vdd2",
Laxman Dewangan0651eed2012-03-13 11:35:20 +0530110 .enable_time_us = 350,
Graeme Gregory518fb722011-05-02 16:20:08 -0500111 },
112 {
Laxman Dewangan33a69432012-05-19 20:04:06 +0530113 .name = "vdd3",
Laxman Dewangan7d38a3c2012-01-20 16:36:22 +0530114 .n_voltages = ARRAY_SIZE(VDD3_VSEL_table),
115 .voltage_table = VDD3_VSEL_table,
Laxman Dewangan0651eed2012-03-13 11:35:20 +0530116 .enable_time_us = 200,
Graeme Gregory518fb722011-05-02 16:20:08 -0500117 },
118 {
Laxman Dewangan33a69432012-05-19 20:04:06 +0530119 .name = "vdig1",
Laxman Dewangan7d38a3c2012-01-20 16:36:22 +0530120 .n_voltages = ARRAY_SIZE(VDIG1_VSEL_table),
121 .voltage_table = VDIG1_VSEL_table,
Laxman Dewangan0651eed2012-03-13 11:35:20 +0530122 .enable_time_us = 100,
Graeme Gregory518fb722011-05-02 16:20:08 -0500123 },
124 {
Laxman Dewangan33a69432012-05-19 20:04:06 +0530125 .name = "vdig2",
Laxman Dewangan7d38a3c2012-01-20 16:36:22 +0530126 .n_voltages = ARRAY_SIZE(VDIG2_VSEL_table),
127 .voltage_table = VDIG2_VSEL_table,
Laxman Dewangan0651eed2012-03-13 11:35:20 +0530128 .enable_time_us = 100,
Graeme Gregory518fb722011-05-02 16:20:08 -0500129 },
130 {
Laxman Dewangan33a69432012-05-19 20:04:06 +0530131 .name = "vpll",
Laxman Dewangan7d38a3c2012-01-20 16:36:22 +0530132 .n_voltages = ARRAY_SIZE(VPLL_VSEL_table),
133 .voltage_table = VPLL_VSEL_table,
Laxman Dewangan0651eed2012-03-13 11:35:20 +0530134 .enable_time_us = 100,
Graeme Gregory518fb722011-05-02 16:20:08 -0500135 },
136 {
Laxman Dewangan33a69432012-05-19 20:04:06 +0530137 .name = "vdac",
Laxman Dewangan7d38a3c2012-01-20 16:36:22 +0530138 .n_voltages = ARRAY_SIZE(VDAC_VSEL_table),
139 .voltage_table = VDAC_VSEL_table,
Laxman Dewangan0651eed2012-03-13 11:35:20 +0530140 .enable_time_us = 100,
Graeme Gregory518fb722011-05-02 16:20:08 -0500141 },
142 {
Laxman Dewangan33a69432012-05-19 20:04:06 +0530143 .name = "vaux1",
Laxman Dewangan7d38a3c2012-01-20 16:36:22 +0530144 .n_voltages = ARRAY_SIZE(VAUX1_VSEL_table),
145 .voltage_table = VAUX1_VSEL_table,
Laxman Dewangan0651eed2012-03-13 11:35:20 +0530146 .enable_time_us = 100,
Graeme Gregory518fb722011-05-02 16:20:08 -0500147 },
148 {
Laxman Dewangan33a69432012-05-19 20:04:06 +0530149 .name = "vaux2",
Laxman Dewangan7d38a3c2012-01-20 16:36:22 +0530150 .n_voltages = ARRAY_SIZE(VAUX2_VSEL_table),
151 .voltage_table = VAUX2_VSEL_table,
Laxman Dewangan0651eed2012-03-13 11:35:20 +0530152 .enable_time_us = 100,
Graeme Gregory518fb722011-05-02 16:20:08 -0500153 },
154 {
Laxman Dewangan33a69432012-05-19 20:04:06 +0530155 .name = "vaux33",
Laxman Dewangan7d38a3c2012-01-20 16:36:22 +0530156 .n_voltages = ARRAY_SIZE(VAUX33_VSEL_table),
157 .voltage_table = VAUX33_VSEL_table,
Laxman Dewangan0651eed2012-03-13 11:35:20 +0530158 .enable_time_us = 100,
Graeme Gregory518fb722011-05-02 16:20:08 -0500159 },
160 {
Laxman Dewangan33a69432012-05-19 20:04:06 +0530161 .name = "vmmc",
Laxman Dewangan7d38a3c2012-01-20 16:36:22 +0530162 .n_voltages = ARRAY_SIZE(VMMC_VSEL_table),
163 .voltage_table = VMMC_VSEL_table,
Laxman Dewangan0651eed2012-03-13 11:35:20 +0530164 .enable_time_us = 100,
Graeme Gregory518fb722011-05-02 16:20:08 -0500165 },
166};
167
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500168static struct tps_info tps65911_regs[] = {
169 {
Laxman Dewangan33a69432012-05-19 20:04:06 +0530170 .name = "vrtc",
Laxman Dewangan0651eed2012-03-13 11:35:20 +0530171 .enable_time_us = 2200,
Laxman Dewanganc2f8efd2012-01-18 20:46:56 +0530172 },
173 {
Laxman Dewangan33a69432012-05-19 20:04:06 +0530174 .name = "vio",
Laxman Dewangan7d38a3c2012-01-20 16:36:22 +0530175 .n_voltages = ARRAY_SIZE(VIO_VSEL_table),
176 .voltage_table = VIO_VSEL_table,
Laxman Dewangan0651eed2012-03-13 11:35:20 +0530177 .enable_time_us = 350,
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500178 },
179 {
Laxman Dewangan33a69432012-05-19 20:04:06 +0530180 .name = "vdd1",
Laxman Dewangan7d38a3c2012-01-20 16:36:22 +0530181 .n_voltages = 73,
Laxman Dewangan0651eed2012-03-13 11:35:20 +0530182 .enable_time_us = 350,
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500183 },
184 {
Laxman Dewangan33a69432012-05-19 20:04:06 +0530185 .name = "vdd2",
Laxman Dewangan7d38a3c2012-01-20 16:36:22 +0530186 .n_voltages = 73,
Laxman Dewangan0651eed2012-03-13 11:35:20 +0530187 .enable_time_us = 350,
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500188 },
189 {
Laxman Dewangan33a69432012-05-19 20:04:06 +0530190 .name = "vddctrl",
Laxman Dewangan7d38a3c2012-01-20 16:36:22 +0530191 .n_voltages = 65,
Laxman Dewangan0651eed2012-03-13 11:35:20 +0530192 .enable_time_us = 900,
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500193 },
194 {
Laxman Dewangan33a69432012-05-19 20:04:06 +0530195 .name = "ldo1",
Laxman Dewangan7d38a3c2012-01-20 16:36:22 +0530196 .n_voltages = 47,
Laxman Dewangan0651eed2012-03-13 11:35:20 +0530197 .enable_time_us = 420,
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500198 },
199 {
Laxman Dewangan33a69432012-05-19 20:04:06 +0530200 .name = "ldo2",
Laxman Dewangan7d38a3c2012-01-20 16:36:22 +0530201 .n_voltages = 47,
Laxman Dewangan0651eed2012-03-13 11:35:20 +0530202 .enable_time_us = 420,
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500203 },
204 {
Laxman Dewangan33a69432012-05-19 20:04:06 +0530205 .name = "ldo3",
Laxman Dewangan7d38a3c2012-01-20 16:36:22 +0530206 .n_voltages = 24,
Laxman Dewangan0651eed2012-03-13 11:35:20 +0530207 .enable_time_us = 230,
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500208 },
209 {
Laxman Dewangan33a69432012-05-19 20:04:06 +0530210 .name = "ldo4",
Laxman Dewangan7d38a3c2012-01-20 16:36:22 +0530211 .n_voltages = 47,
Laxman Dewangan0651eed2012-03-13 11:35:20 +0530212 .enable_time_us = 230,
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500213 },
214 {
Laxman Dewangan33a69432012-05-19 20:04:06 +0530215 .name = "ldo5",
Laxman Dewangan7d38a3c2012-01-20 16:36:22 +0530216 .n_voltages = 24,
Laxman Dewangan0651eed2012-03-13 11:35:20 +0530217 .enable_time_us = 230,
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500218 },
219 {
Laxman Dewangan33a69432012-05-19 20:04:06 +0530220 .name = "ldo6",
Laxman Dewangan7d38a3c2012-01-20 16:36:22 +0530221 .n_voltages = 24,
Laxman Dewangan0651eed2012-03-13 11:35:20 +0530222 .enable_time_us = 230,
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500223 },
224 {
Laxman Dewangan33a69432012-05-19 20:04:06 +0530225 .name = "ldo7",
Laxman Dewangan7d38a3c2012-01-20 16:36:22 +0530226 .n_voltages = 24,
Laxman Dewangan0651eed2012-03-13 11:35:20 +0530227 .enable_time_us = 230,
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500228 },
229 {
Laxman Dewangan33a69432012-05-19 20:04:06 +0530230 .name = "ldo8",
Laxman Dewangan7d38a3c2012-01-20 16:36:22 +0530231 .n_voltages = 24,
Laxman Dewangan0651eed2012-03-13 11:35:20 +0530232 .enable_time_us = 230,
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500233 },
234};
235
Laxman Dewangan1e0c66f2012-01-28 15:07:57 +0530236#define EXT_CONTROL_REG_BITS(id, regs_offs, bits) (((regs_offs) << 8) | (bits))
237static unsigned int tps65910_ext_sleep_control[] = {
238 0,
239 EXT_CONTROL_REG_BITS(VIO, 1, 0),
240 EXT_CONTROL_REG_BITS(VDD1, 1, 1),
241 EXT_CONTROL_REG_BITS(VDD2, 1, 2),
242 EXT_CONTROL_REG_BITS(VDD3, 1, 3),
243 EXT_CONTROL_REG_BITS(VDIG1, 0, 1),
244 EXT_CONTROL_REG_BITS(VDIG2, 0, 2),
245 EXT_CONTROL_REG_BITS(VPLL, 0, 6),
246 EXT_CONTROL_REG_BITS(VDAC, 0, 7),
247 EXT_CONTROL_REG_BITS(VAUX1, 0, 3),
248 EXT_CONTROL_REG_BITS(VAUX2, 0, 4),
249 EXT_CONTROL_REG_BITS(VAUX33, 0, 5),
250 EXT_CONTROL_REG_BITS(VMMC, 0, 0),
251};
252
253static unsigned int tps65911_ext_sleep_control[] = {
254 0,
255 EXT_CONTROL_REG_BITS(VIO, 1, 0),
256 EXT_CONTROL_REG_BITS(VDD1, 1, 1),
257 EXT_CONTROL_REG_BITS(VDD2, 1, 2),
258 EXT_CONTROL_REG_BITS(VDDCTRL, 1, 3),
259 EXT_CONTROL_REG_BITS(LDO1, 0, 1),
260 EXT_CONTROL_REG_BITS(LDO2, 0, 2),
261 EXT_CONTROL_REG_BITS(LDO3, 0, 7),
262 EXT_CONTROL_REG_BITS(LDO4, 0, 6),
263 EXT_CONTROL_REG_BITS(LDO5, 0, 3),
264 EXT_CONTROL_REG_BITS(LDO6, 0, 0),
265 EXT_CONTROL_REG_BITS(LDO7, 0, 5),
266 EXT_CONTROL_REG_BITS(LDO8, 0, 4),
267};
268
Graeme Gregory518fb722011-05-02 16:20:08 -0500269struct tps65910_reg {
Axel Lin39aa9b62011-07-11 09:57:43 +0800270 struct regulator_desc *desc;
Graeme Gregory518fb722011-05-02 16:20:08 -0500271 struct tps65910 *mfd;
Axel Lin39aa9b62011-07-11 09:57:43 +0800272 struct regulator_dev **rdev;
273 struct tps_info **info;
Graeme Gregory518fb722011-05-02 16:20:08 -0500274 struct mutex mutex;
Axel Lin39aa9b62011-07-11 09:57:43 +0800275 int num_regulators;
Graeme Gregory518fb722011-05-02 16:20:08 -0500276 int mode;
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500277 int (*get_ctrl_reg)(int);
Laxman Dewangan1e0c66f2012-01-28 15:07:57 +0530278 unsigned int *ext_sleep_control;
279 unsigned int board_ext_control[TPS65910_NUM_REGS];
Graeme Gregory518fb722011-05-02 16:20:08 -0500280};
281
282static inline int tps65910_read(struct tps65910_reg *pmic, u8 reg)
283{
Rhyland Klein3f7e8272012-05-08 11:42:38 -0700284 unsigned int val;
Graeme Gregory518fb722011-05-02 16:20:08 -0500285 int err;
286
Rhyland Klein3f7e8272012-05-08 11:42:38 -0700287 err = tps65910_reg_read(pmic->mfd, reg, &val);
Graeme Gregory518fb722011-05-02 16:20:08 -0500288 if (err)
289 return err;
290
291 return val;
292}
293
Graeme Gregory518fb722011-05-02 16:20:08 -0500294static int tps65910_modify_bits(struct tps65910_reg *pmic, u8 reg,
295 u8 set_mask, u8 clear_mask)
296{
297 int err, data;
298
299 mutex_lock(&pmic->mutex);
300
301 data = tps65910_read(pmic, reg);
302 if (data < 0) {
303 dev_err(pmic->mfd->dev, "Read from reg 0x%x failed\n", reg);
304 err = data;
305 goto out;
306 }
307
308 data &= ~clear_mask;
309 data |= set_mask;
Rhyland Klein3f7e8272012-05-08 11:42:38 -0700310 err = tps65910_reg_write(pmic->mfd, reg, data);
Graeme Gregory518fb722011-05-02 16:20:08 -0500311 if (err)
312 dev_err(pmic->mfd->dev, "Write for reg 0x%x failed\n", reg);
313
314out:
315 mutex_unlock(&pmic->mutex);
316 return err;
317}
318
Rhyland Klein3f7e8272012-05-08 11:42:38 -0700319static int tps65910_reg_read_locked(struct tps65910_reg *pmic, u8 reg)
Graeme Gregory518fb722011-05-02 16:20:08 -0500320{
321 int data;
322
323 mutex_lock(&pmic->mutex);
324
325 data = tps65910_read(pmic, reg);
326 if (data < 0)
327 dev_err(pmic->mfd->dev, "Read from reg 0x%x failed\n", reg);
328
329 mutex_unlock(&pmic->mutex);
330 return data;
331}
332
Rhyland Klein3f7e8272012-05-08 11:42:38 -0700333static int tps65910_reg_write_locked(struct tps65910_reg *pmic, u8 reg, u8 val)
Graeme Gregory518fb722011-05-02 16:20:08 -0500334{
335 int err;
336
337 mutex_lock(&pmic->mutex);
338
Rhyland Klein3f7e8272012-05-08 11:42:38 -0700339 err = tps65910_reg_write(pmic->mfd, reg, val);
Graeme Gregory518fb722011-05-02 16:20:08 -0500340 if (err < 0)
341 dev_err(pmic->mfd->dev, "Write for reg 0x%x failed\n", reg);
342
343 mutex_unlock(&pmic->mutex);
344 return err;
345}
346
347static int tps65910_get_ctrl_register(int id)
348{
349 switch (id) {
350 case TPS65910_REG_VRTC:
351 return TPS65910_VRTC;
352 case TPS65910_REG_VIO:
353 return TPS65910_VIO;
354 case TPS65910_REG_VDD1:
355 return TPS65910_VDD1;
356 case TPS65910_REG_VDD2:
357 return TPS65910_VDD2;
358 case TPS65910_REG_VDD3:
359 return TPS65910_VDD3;
360 case TPS65910_REG_VDIG1:
361 return TPS65910_VDIG1;
362 case TPS65910_REG_VDIG2:
363 return TPS65910_VDIG2;
364 case TPS65910_REG_VPLL:
365 return TPS65910_VPLL;
366 case TPS65910_REG_VDAC:
367 return TPS65910_VDAC;
368 case TPS65910_REG_VAUX1:
369 return TPS65910_VAUX1;
370 case TPS65910_REG_VAUX2:
371 return TPS65910_VAUX2;
372 case TPS65910_REG_VAUX33:
373 return TPS65910_VAUX33;
374 case TPS65910_REG_VMMC:
375 return TPS65910_VMMC;
376 default:
377 return -EINVAL;
378 }
379}
380
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500381static int tps65911_get_ctrl_register(int id)
382{
383 switch (id) {
384 case TPS65910_REG_VRTC:
385 return TPS65910_VRTC;
386 case TPS65910_REG_VIO:
387 return TPS65910_VIO;
388 case TPS65910_REG_VDD1:
389 return TPS65910_VDD1;
390 case TPS65910_REG_VDD2:
391 return TPS65910_VDD2;
392 case TPS65911_REG_VDDCTRL:
393 return TPS65911_VDDCTRL;
394 case TPS65911_REG_LDO1:
395 return TPS65911_LDO1;
396 case TPS65911_REG_LDO2:
397 return TPS65911_LDO2;
398 case TPS65911_REG_LDO3:
399 return TPS65911_LDO3;
400 case TPS65911_REG_LDO4:
401 return TPS65911_LDO4;
402 case TPS65911_REG_LDO5:
403 return TPS65911_LDO5;
404 case TPS65911_REG_LDO6:
405 return TPS65911_LDO6;
406 case TPS65911_REG_LDO7:
407 return TPS65911_LDO7;
408 case TPS65911_REG_LDO8:
409 return TPS65911_LDO8;
410 default:
411 return -EINVAL;
412 }
413}
414
Laxman Dewangan0651eed2012-03-13 11:35:20 +0530415static int tps65910_enable_time(struct regulator_dev *dev)
416{
417 struct tps65910_reg *pmic = rdev_get_drvdata(dev);
418 int id = rdev_get_id(dev);
419 return pmic->info[id]->enable_time_us;
420}
Graeme Gregory518fb722011-05-02 16:20:08 -0500421
422static int tps65910_set_mode(struct regulator_dev *dev, unsigned int mode)
423{
424 struct tps65910_reg *pmic = rdev_get_drvdata(dev);
425 struct tps65910 *mfd = pmic->mfd;
426 int reg, value, id = rdev_get_id(dev);
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500427
428 reg = pmic->get_ctrl_reg(id);
Graeme Gregory518fb722011-05-02 16:20:08 -0500429 if (reg < 0)
430 return reg;
431
432 switch (mode) {
433 case REGULATOR_MODE_NORMAL:
434 return tps65910_modify_bits(pmic, reg, LDO_ST_ON_BIT,
435 LDO_ST_MODE_BIT);
436 case REGULATOR_MODE_IDLE:
437 value = LDO_ST_ON_BIT | LDO_ST_MODE_BIT;
Rhyland Klein3f7e8272012-05-08 11:42:38 -0700438 return tps65910_reg_set_bits(mfd, reg, value);
Graeme Gregory518fb722011-05-02 16:20:08 -0500439 case REGULATOR_MODE_STANDBY:
Rhyland Klein3f7e8272012-05-08 11:42:38 -0700440 return tps65910_reg_clear_bits(mfd, reg, LDO_ST_ON_BIT);
Graeme Gregory518fb722011-05-02 16:20:08 -0500441 }
442
443 return -EINVAL;
444}
445
446static unsigned int tps65910_get_mode(struct regulator_dev *dev)
447{
448 struct tps65910_reg *pmic = rdev_get_drvdata(dev);
449 int reg, value, id = rdev_get_id(dev);
450
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500451 reg = pmic->get_ctrl_reg(id);
Graeme Gregory518fb722011-05-02 16:20:08 -0500452 if (reg < 0)
453 return reg;
454
Rhyland Klein3f7e8272012-05-08 11:42:38 -0700455 value = tps65910_reg_read_locked(pmic, reg);
Graeme Gregory518fb722011-05-02 16:20:08 -0500456 if (value < 0)
457 return value;
458
Axel Lin58599392012-03-13 07:15:27 +0800459 if (!(value & LDO_ST_ON_BIT))
Graeme Gregory518fb722011-05-02 16:20:08 -0500460 return REGULATOR_MODE_STANDBY;
461 else if (value & LDO_ST_MODE_BIT)
462 return REGULATOR_MODE_IDLE;
463 else
464 return REGULATOR_MODE_NORMAL;
465}
466
Laxman Dewangan18039e02012-03-14 13:00:58 +0530467static int tps65910_get_voltage_dcdc_sel(struct regulator_dev *dev)
Graeme Gregory518fb722011-05-02 16:20:08 -0500468{
469 struct tps65910_reg *pmic = rdev_get_drvdata(dev);
Laxman Dewangan18039e02012-03-14 13:00:58 +0530470 int id = rdev_get_id(dev);
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500471 int opvsel = 0, srvsel = 0, vselmax = 0, mult = 0, sr = 0;
Graeme Gregory518fb722011-05-02 16:20:08 -0500472
473 switch (id) {
474 case TPS65910_REG_VDD1:
Rhyland Klein3f7e8272012-05-08 11:42:38 -0700475 opvsel = tps65910_reg_read_locked(pmic, TPS65910_VDD1_OP);
476 mult = tps65910_reg_read_locked(pmic, TPS65910_VDD1);
Graeme Gregory518fb722011-05-02 16:20:08 -0500477 mult = (mult & VDD1_VGAIN_SEL_MASK) >> VDD1_VGAIN_SEL_SHIFT;
Rhyland Klein3f7e8272012-05-08 11:42:38 -0700478 srvsel = tps65910_reg_read_locked(pmic, TPS65910_VDD1_SR);
Graeme Gregory518fb722011-05-02 16:20:08 -0500479 sr = opvsel & VDD1_OP_CMD_MASK;
480 opvsel &= VDD1_OP_SEL_MASK;
481 srvsel &= VDD1_SR_SEL_MASK;
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500482 vselmax = 75;
Graeme Gregory518fb722011-05-02 16:20:08 -0500483 break;
484 case TPS65910_REG_VDD2:
Rhyland Klein3f7e8272012-05-08 11:42:38 -0700485 opvsel = tps65910_reg_read_locked(pmic, TPS65910_VDD2_OP);
486 mult = tps65910_reg_read_locked(pmic, TPS65910_VDD2);
Graeme Gregory518fb722011-05-02 16:20:08 -0500487 mult = (mult & VDD2_VGAIN_SEL_MASK) >> VDD2_VGAIN_SEL_SHIFT;
Rhyland Klein3f7e8272012-05-08 11:42:38 -0700488 srvsel = tps65910_reg_read_locked(pmic, TPS65910_VDD2_SR);
Graeme Gregory518fb722011-05-02 16:20:08 -0500489 sr = opvsel & VDD2_OP_CMD_MASK;
490 opvsel &= VDD2_OP_SEL_MASK;
491 srvsel &= VDD2_SR_SEL_MASK;
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500492 vselmax = 75;
493 break;
494 case TPS65911_REG_VDDCTRL:
Rhyland Klein3f7e8272012-05-08 11:42:38 -0700495 opvsel = tps65910_reg_read_locked(pmic, TPS65911_VDDCTRL_OP);
496 srvsel = tps65910_reg_read_locked(pmic, TPS65911_VDDCTRL_SR);
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500497 sr = opvsel & VDDCTRL_OP_CMD_MASK;
498 opvsel &= VDDCTRL_OP_SEL_MASK;
499 srvsel &= VDDCTRL_SR_SEL_MASK;
500 vselmax = 64;
Graeme Gregory518fb722011-05-02 16:20:08 -0500501 break;
502 }
503
504 /* multiplier 0 == 1 but 2,3 normal */
505 if (!mult)
506 mult=1;
507
508 if (sr) {
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500509 /* normalise to valid range */
510 if (srvsel < 3)
511 srvsel = 3;
512 if (srvsel > vselmax)
513 srvsel = vselmax;
Laxman Dewangan18039e02012-03-14 13:00:58 +0530514 return srvsel - 3;
Graeme Gregory518fb722011-05-02 16:20:08 -0500515 } else {
516
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500517 /* normalise to valid range*/
518 if (opvsel < 3)
519 opvsel = 3;
520 if (opvsel > vselmax)
521 opvsel = vselmax;
Laxman Dewangan18039e02012-03-14 13:00:58 +0530522 return opvsel - 3;
Graeme Gregory518fb722011-05-02 16:20:08 -0500523 }
Laxman Dewangan18039e02012-03-14 13:00:58 +0530524 return -EINVAL;
Graeme Gregory518fb722011-05-02 16:20:08 -0500525}
526
Axel Lin1f904fd2012-05-09 09:22:47 +0800527static int tps65910_get_voltage_sel(struct regulator_dev *dev)
Graeme Gregory518fb722011-05-02 16:20:08 -0500528{
529 struct tps65910_reg *pmic = rdev_get_drvdata(dev);
Axel Lin1f904fd2012-05-09 09:22:47 +0800530 int reg, value, id = rdev_get_id(dev);
Graeme Gregory518fb722011-05-02 16:20:08 -0500531
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500532 reg = pmic->get_ctrl_reg(id);
Graeme Gregory518fb722011-05-02 16:20:08 -0500533 if (reg < 0)
534 return reg;
535
Rhyland Klein3f7e8272012-05-08 11:42:38 -0700536 value = tps65910_reg_read_locked(pmic, reg);
Graeme Gregory518fb722011-05-02 16:20:08 -0500537 if (value < 0)
538 return value;
539
540 switch (id) {
541 case TPS65910_REG_VIO:
542 case TPS65910_REG_VDIG1:
543 case TPS65910_REG_VDIG2:
544 case TPS65910_REG_VPLL:
545 case TPS65910_REG_VDAC:
546 case TPS65910_REG_VAUX1:
547 case TPS65910_REG_VAUX2:
548 case TPS65910_REG_VAUX33:
549 case TPS65910_REG_VMMC:
550 value &= LDO_SEL_MASK;
551 value >>= LDO_SEL_SHIFT;
552 break;
553 default:
554 return -EINVAL;
555 }
556
Axel Lin1f904fd2012-05-09 09:22:47 +0800557 return value;
Graeme Gregory518fb722011-05-02 16:20:08 -0500558}
559
560static int tps65910_get_voltage_vdd3(struct regulator_dev *dev)
561{
Axel Lind9fe28f2012-06-21 18:48:00 +0800562 return dev->desc->volt_table[0];
Graeme Gregory518fb722011-05-02 16:20:08 -0500563}
564
Axel Lin1f904fd2012-05-09 09:22:47 +0800565static int tps65911_get_voltage_sel(struct regulator_dev *dev)
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500566{
567 struct tps65910_reg *pmic = rdev_get_drvdata(dev);
Axel Lin1f904fd2012-05-09 09:22:47 +0800568 int id = rdev_get_id(dev);
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500569 u8 value, reg;
570
571 reg = pmic->get_ctrl_reg(id);
572
Rhyland Klein3f7e8272012-05-08 11:42:38 -0700573 value = tps65910_reg_read_locked(pmic, reg);
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500574
575 switch (id) {
576 case TPS65911_REG_LDO1:
577 case TPS65911_REG_LDO2:
578 case TPS65911_REG_LDO4:
579 value &= LDO1_SEL_MASK;
580 value >>= LDO_SEL_SHIFT;
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500581 break;
582 case TPS65911_REG_LDO3:
583 case TPS65911_REG_LDO5:
584 case TPS65911_REG_LDO6:
585 case TPS65911_REG_LDO7:
586 case TPS65911_REG_LDO8:
587 value &= LDO3_SEL_MASK;
588 value >>= LDO_SEL_SHIFT;
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500589 break;
590 case TPS65910_REG_VIO:
Laxman Dewangane882eae2012-02-17 18:56:11 +0530591 value &= LDO_SEL_MASK;
592 value >>= LDO_SEL_SHIFT;
Axel Lin1f904fd2012-05-09 09:22:47 +0800593 break;
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500594 default:
595 return -EINVAL;
596 }
597
Axel Lin1f904fd2012-05-09 09:22:47 +0800598 return value;
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500599}
600
Axel Lin94732b92012-03-09 10:22:20 +0800601static int tps65910_set_voltage_dcdc_sel(struct regulator_dev *dev,
602 unsigned selector)
Graeme Gregory518fb722011-05-02 16:20:08 -0500603{
604 struct tps65910_reg *pmic = rdev_get_drvdata(dev);
605 int id = rdev_get_id(dev), vsel;
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500606 int dcdc_mult = 0;
Graeme Gregory518fb722011-05-02 16:20:08 -0500607
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500608 switch (id) {
609 case TPS65910_REG_VDD1:
Afzal Mohammed780dc9b2011-11-08 18:54:10 +0530610 dcdc_mult = (selector / VDD1_2_NUM_VOLT_FINE) + 1;
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500611 if (dcdc_mult == 1)
612 dcdc_mult--;
Afzal Mohammed780dc9b2011-11-08 18:54:10 +0530613 vsel = (selector % VDD1_2_NUM_VOLT_FINE) + 3;
Graeme Gregory518fb722011-05-02 16:20:08 -0500614
Graeme Gregory518fb722011-05-02 16:20:08 -0500615 tps65910_modify_bits(pmic, TPS65910_VDD1,
616 (dcdc_mult << VDD1_VGAIN_SEL_SHIFT),
617 VDD1_VGAIN_SEL_MASK);
Rhyland Klein3f7e8272012-05-08 11:42:38 -0700618 tps65910_reg_write_locked(pmic, TPS65910_VDD1_OP, vsel);
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500619 break;
620 case TPS65910_REG_VDD2:
Afzal Mohammed780dc9b2011-11-08 18:54:10 +0530621 dcdc_mult = (selector / VDD1_2_NUM_VOLT_FINE) + 1;
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500622 if (dcdc_mult == 1)
623 dcdc_mult--;
Afzal Mohammed780dc9b2011-11-08 18:54:10 +0530624 vsel = (selector % VDD1_2_NUM_VOLT_FINE) + 3;
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500625
Graeme Gregory518fb722011-05-02 16:20:08 -0500626 tps65910_modify_bits(pmic, TPS65910_VDD2,
627 (dcdc_mult << VDD2_VGAIN_SEL_SHIFT),
628 VDD1_VGAIN_SEL_MASK);
Rhyland Klein3f7e8272012-05-08 11:42:38 -0700629 tps65910_reg_write_locked(pmic, TPS65910_VDD2_OP, vsel);
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500630 break;
631 case TPS65911_REG_VDDCTRL:
Laxman Dewanganc4632ae2012-03-07 16:39:05 +0530632 vsel = selector + 3;
Rhyland Klein3f7e8272012-05-08 11:42:38 -0700633 tps65910_reg_write_locked(pmic, TPS65911_VDDCTRL_OP, vsel);
Graeme Gregory518fb722011-05-02 16:20:08 -0500634 }
635
636 return 0;
637}
638
Axel Lin94732b92012-03-09 10:22:20 +0800639static int tps65910_set_voltage_sel(struct regulator_dev *dev,
640 unsigned selector)
Graeme Gregory518fb722011-05-02 16:20:08 -0500641{
642 struct tps65910_reg *pmic = rdev_get_drvdata(dev);
643 int reg, id = rdev_get_id(dev);
644
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500645 reg = pmic->get_ctrl_reg(id);
Graeme Gregory518fb722011-05-02 16:20:08 -0500646 if (reg < 0)
647 return reg;
648
649 switch (id) {
650 case TPS65910_REG_VIO:
651 case TPS65910_REG_VDIG1:
652 case TPS65910_REG_VDIG2:
653 case TPS65910_REG_VPLL:
654 case TPS65910_REG_VDAC:
655 case TPS65910_REG_VAUX1:
656 case TPS65910_REG_VAUX2:
657 case TPS65910_REG_VAUX33:
658 case TPS65910_REG_VMMC:
659 return tps65910_modify_bits(pmic, reg,
660 (selector << LDO_SEL_SHIFT), LDO_SEL_MASK);
661 }
662
663 return -EINVAL;
664}
665
Axel Lin94732b92012-03-09 10:22:20 +0800666static int tps65911_set_voltage_sel(struct regulator_dev *dev,
667 unsigned selector)
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500668{
669 struct tps65910_reg *pmic = rdev_get_drvdata(dev);
670 int reg, id = rdev_get_id(dev);
671
672 reg = pmic->get_ctrl_reg(id);
673 if (reg < 0)
674 return reg;
675
676 switch (id) {
677 case TPS65911_REG_LDO1:
678 case TPS65911_REG_LDO2:
679 case TPS65911_REG_LDO4:
680 return tps65910_modify_bits(pmic, reg,
681 (selector << LDO_SEL_SHIFT), LDO1_SEL_MASK);
682 case TPS65911_REG_LDO3:
683 case TPS65911_REG_LDO5:
684 case TPS65911_REG_LDO6:
685 case TPS65911_REG_LDO7:
686 case TPS65911_REG_LDO8:
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500687 return tps65910_modify_bits(pmic, reg,
688 (selector << LDO_SEL_SHIFT), LDO3_SEL_MASK);
Laxman Dewangane882eae2012-02-17 18:56:11 +0530689 case TPS65910_REG_VIO:
690 return tps65910_modify_bits(pmic, reg,
691 (selector << LDO_SEL_SHIFT), LDO_SEL_MASK);
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500692 }
693
694 return -EINVAL;
695}
696
697
Graeme Gregory518fb722011-05-02 16:20:08 -0500698static int tps65910_list_voltage_dcdc(struct regulator_dev *dev,
699 unsigned selector)
700{
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500701 int volt, mult = 1, id = rdev_get_id(dev);
Graeme Gregory518fb722011-05-02 16:20:08 -0500702
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500703 switch (id) {
704 case TPS65910_REG_VDD1:
705 case TPS65910_REG_VDD2:
Afzal Mohammed780dc9b2011-11-08 18:54:10 +0530706 mult = (selector / VDD1_2_NUM_VOLT_FINE) + 1;
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500707 volt = VDD1_2_MIN_VOLT +
Afzal Mohammed780dc9b2011-11-08 18:54:10 +0530708 (selector % VDD1_2_NUM_VOLT_FINE) * VDD1_2_OFFSET;
Axel Lind04156b2011-07-10 21:44:09 +0800709 break;
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500710 case TPS65911_REG_VDDCTRL:
711 volt = VDDCTRL_MIN_VOLT + (selector * VDDCTRL_OFFSET);
Axel Lind04156b2011-07-10 21:44:09 +0800712 break;
713 default:
714 BUG();
715 return -EINVAL;
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500716 }
Graeme Gregory518fb722011-05-02 16:20:08 -0500717
718 return volt * 100 * mult;
719}
720
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500721static int tps65911_list_voltage(struct regulator_dev *dev, unsigned selector)
722{
723 struct tps65910_reg *pmic = rdev_get_drvdata(dev);
724 int step_mv = 0, id = rdev_get_id(dev);
725
726 switch(id) {
727 case TPS65911_REG_LDO1:
728 case TPS65911_REG_LDO2:
729 case TPS65911_REG_LDO4:
730 /* The first 5 values of the selector correspond to 1V */
731 if (selector < 5)
732 selector = 0;
733 else
734 selector -= 4;
735
736 step_mv = 50;
737 break;
738 case TPS65911_REG_LDO3:
739 case TPS65911_REG_LDO5:
740 case TPS65911_REG_LDO6:
741 case TPS65911_REG_LDO7:
742 case TPS65911_REG_LDO8:
743 /* The first 3 values of the selector correspond to 1V */
744 if (selector < 3)
745 selector = 0;
746 else
747 selector -= 2;
748
749 step_mv = 100;
750 break;
751 case TPS65910_REG_VIO:
Axel Lind9fe28f2012-06-21 18:48:00 +0800752 return pmic->info[id]->voltage_table[selector];
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500753 default:
754 return -EINVAL;
755 }
756
757 return (LDO_MIN_VOLT + selector * step_mv) * 1000;
758}
759
Graeme Gregory518fb722011-05-02 16:20:08 -0500760/* Regulator ops (except VRTC) */
761static struct regulator_ops tps65910_ops_dcdc = {
Axel Lina40a9c42012-04-17 14:34:46 +0800762 .is_enabled = regulator_is_enabled_regmap,
763 .enable = regulator_enable_regmap,
764 .disable = regulator_disable_regmap,
Laxman Dewangan0651eed2012-03-13 11:35:20 +0530765 .enable_time = tps65910_enable_time,
Graeme Gregory518fb722011-05-02 16:20:08 -0500766 .set_mode = tps65910_set_mode,
767 .get_mode = tps65910_get_mode,
Laxman Dewangan18039e02012-03-14 13:00:58 +0530768 .get_voltage_sel = tps65910_get_voltage_dcdc_sel,
Axel Lin94732b92012-03-09 10:22:20 +0800769 .set_voltage_sel = tps65910_set_voltage_dcdc_sel,
Axel Lin01bc3a12012-06-20 22:40:10 +0800770 .set_voltage_time_sel = regulator_set_voltage_time_sel,
Graeme Gregory518fb722011-05-02 16:20:08 -0500771 .list_voltage = tps65910_list_voltage_dcdc,
772};
773
774static struct regulator_ops tps65910_ops_vdd3 = {
Axel Lina40a9c42012-04-17 14:34:46 +0800775 .is_enabled = regulator_is_enabled_regmap,
776 .enable = regulator_enable_regmap,
777 .disable = regulator_disable_regmap,
Laxman Dewangan0651eed2012-03-13 11:35:20 +0530778 .enable_time = tps65910_enable_time,
Graeme Gregory518fb722011-05-02 16:20:08 -0500779 .set_mode = tps65910_set_mode,
780 .get_mode = tps65910_get_mode,
781 .get_voltage = tps65910_get_voltage_vdd3,
Axel Lind9fe28f2012-06-21 18:48:00 +0800782 .list_voltage = regulator_list_voltage_table,
Graeme Gregory518fb722011-05-02 16:20:08 -0500783};
784
785static struct regulator_ops tps65910_ops = {
Axel Lina40a9c42012-04-17 14:34:46 +0800786 .is_enabled = regulator_is_enabled_regmap,
787 .enable = regulator_enable_regmap,
788 .disable = regulator_disable_regmap,
Laxman Dewangan0651eed2012-03-13 11:35:20 +0530789 .enable_time = tps65910_enable_time,
Graeme Gregory518fb722011-05-02 16:20:08 -0500790 .set_mode = tps65910_set_mode,
791 .get_mode = tps65910_get_mode,
Axel Lin1f904fd2012-05-09 09:22:47 +0800792 .get_voltage_sel = tps65910_get_voltage_sel,
Axel Lin94732b92012-03-09 10:22:20 +0800793 .set_voltage_sel = tps65910_set_voltage_sel,
Axel Lind9fe28f2012-06-21 18:48:00 +0800794 .list_voltage = regulator_list_voltage_table,
Graeme Gregory518fb722011-05-02 16:20:08 -0500795};
796
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500797static struct regulator_ops tps65911_ops = {
Axel Lina40a9c42012-04-17 14:34:46 +0800798 .is_enabled = regulator_is_enabled_regmap,
799 .enable = regulator_enable_regmap,
800 .disable = regulator_disable_regmap,
Laxman Dewangan0651eed2012-03-13 11:35:20 +0530801 .enable_time = tps65910_enable_time,
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500802 .set_mode = tps65910_set_mode,
803 .get_mode = tps65910_get_mode,
Axel Lin1f904fd2012-05-09 09:22:47 +0800804 .get_voltage_sel = tps65911_get_voltage_sel,
Axel Lin94732b92012-03-09 10:22:20 +0800805 .set_voltage_sel = tps65911_set_voltage_sel,
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500806 .list_voltage = tps65911_list_voltage,
807};
808
Laxman Dewangan1e0c66f2012-01-28 15:07:57 +0530809static int tps65910_set_ext_sleep_config(struct tps65910_reg *pmic,
810 int id, int ext_sleep_config)
811{
812 struct tps65910 *mfd = pmic->mfd;
813 u8 regoffs = (pmic->ext_sleep_control[id] >> 8) & 0xFF;
814 u8 bit_pos = (1 << pmic->ext_sleep_control[id] & 0xFF);
815 int ret;
816
817 /*
818 * Regulator can not be control from multiple external input EN1, EN2
819 * and EN3 together.
820 */
821 if (ext_sleep_config & EXT_SLEEP_CONTROL) {
822 int en_count;
823 en_count = ((ext_sleep_config &
824 TPS65910_SLEEP_CONTROL_EXT_INPUT_EN1) != 0);
825 en_count += ((ext_sleep_config &
826 TPS65910_SLEEP_CONTROL_EXT_INPUT_EN2) != 0);
827 en_count += ((ext_sleep_config &
828 TPS65910_SLEEP_CONTROL_EXT_INPUT_EN3) != 0);
Laxman Dewanganf30b0712012-03-07 18:21:49 +0530829 en_count += ((ext_sleep_config &
830 TPS65911_SLEEP_CONTROL_EXT_INPUT_SLEEP) != 0);
Laxman Dewangan1e0c66f2012-01-28 15:07:57 +0530831 if (en_count > 1) {
832 dev_err(mfd->dev,
833 "External sleep control flag is not proper\n");
834 return -EINVAL;
835 }
836 }
837
838 pmic->board_ext_control[id] = ext_sleep_config;
839
840 /* External EN1 control */
841 if (ext_sleep_config & TPS65910_SLEEP_CONTROL_EXT_INPUT_EN1)
Rhyland Klein3f7e8272012-05-08 11:42:38 -0700842 ret = tps65910_reg_set_bits(mfd,
Laxman Dewangan1e0c66f2012-01-28 15:07:57 +0530843 TPS65910_EN1_LDO_ASS + regoffs, bit_pos);
844 else
Rhyland Klein3f7e8272012-05-08 11:42:38 -0700845 ret = tps65910_reg_clear_bits(mfd,
Laxman Dewangan1e0c66f2012-01-28 15:07:57 +0530846 TPS65910_EN1_LDO_ASS + regoffs, bit_pos);
847 if (ret < 0) {
848 dev_err(mfd->dev,
849 "Error in configuring external control EN1\n");
850 return ret;
851 }
852
853 /* External EN2 control */
854 if (ext_sleep_config & TPS65910_SLEEP_CONTROL_EXT_INPUT_EN2)
Rhyland Klein3f7e8272012-05-08 11:42:38 -0700855 ret = tps65910_reg_set_bits(mfd,
Laxman Dewangan1e0c66f2012-01-28 15:07:57 +0530856 TPS65910_EN2_LDO_ASS + regoffs, bit_pos);
857 else
Rhyland Klein3f7e8272012-05-08 11:42:38 -0700858 ret = tps65910_reg_clear_bits(mfd,
Laxman Dewangan1e0c66f2012-01-28 15:07:57 +0530859 TPS65910_EN2_LDO_ASS + regoffs, bit_pos);
860 if (ret < 0) {
861 dev_err(mfd->dev,
862 "Error in configuring external control EN2\n");
863 return ret;
864 }
865
866 /* External EN3 control for TPS65910 LDO only */
867 if ((tps65910_chip_id(mfd) == TPS65910) &&
868 (id >= TPS65910_REG_VDIG1)) {
869 if (ext_sleep_config & TPS65910_SLEEP_CONTROL_EXT_INPUT_EN3)
Rhyland Klein3f7e8272012-05-08 11:42:38 -0700870 ret = tps65910_reg_set_bits(mfd,
Laxman Dewangan1e0c66f2012-01-28 15:07:57 +0530871 TPS65910_EN3_LDO_ASS + regoffs, bit_pos);
872 else
Rhyland Klein3f7e8272012-05-08 11:42:38 -0700873 ret = tps65910_reg_clear_bits(mfd,
Laxman Dewangan1e0c66f2012-01-28 15:07:57 +0530874 TPS65910_EN3_LDO_ASS + regoffs, bit_pos);
875 if (ret < 0) {
876 dev_err(mfd->dev,
877 "Error in configuring external control EN3\n");
878 return ret;
879 }
880 }
881
882 /* Return if no external control is selected */
883 if (!(ext_sleep_config & EXT_SLEEP_CONTROL)) {
884 /* Clear all sleep controls */
Rhyland Klein3f7e8272012-05-08 11:42:38 -0700885 ret = tps65910_reg_clear_bits(mfd,
Laxman Dewangan1e0c66f2012-01-28 15:07:57 +0530886 TPS65910_SLEEP_KEEP_LDO_ON + regoffs, bit_pos);
887 if (!ret)
Rhyland Klein3f7e8272012-05-08 11:42:38 -0700888 ret = tps65910_reg_clear_bits(mfd,
Laxman Dewangan1e0c66f2012-01-28 15:07:57 +0530889 TPS65910_SLEEP_SET_LDO_OFF + regoffs, bit_pos);
890 if (ret < 0)
891 dev_err(mfd->dev,
892 "Error in configuring SLEEP register\n");
893 return ret;
894 }
895
896 /*
897 * For regulator that has separate operational and sleep register make
898 * sure that operational is used and clear sleep register to turn
899 * regulator off when external control is inactive
900 */
901 if ((id == TPS65910_REG_VDD1) ||
902 (id == TPS65910_REG_VDD2) ||
903 ((id == TPS65911_REG_VDDCTRL) &&
904 (tps65910_chip_id(mfd) == TPS65911))) {
905 int op_reg_add = pmic->get_ctrl_reg(id) + 1;
906 int sr_reg_add = pmic->get_ctrl_reg(id) + 2;
Rhyland Klein3f7e8272012-05-08 11:42:38 -0700907 int opvsel = tps65910_reg_read_locked(pmic, op_reg_add);
908 int srvsel = tps65910_reg_read_locked(pmic, sr_reg_add);
Laxman Dewangan1e0c66f2012-01-28 15:07:57 +0530909 if (opvsel & VDD1_OP_CMD_MASK) {
910 u8 reg_val = srvsel & VDD1_OP_SEL_MASK;
Rhyland Klein3f7e8272012-05-08 11:42:38 -0700911 ret = tps65910_reg_write_locked(pmic, op_reg_add,
912 reg_val);
Laxman Dewangan1e0c66f2012-01-28 15:07:57 +0530913 if (ret < 0) {
914 dev_err(mfd->dev,
915 "Error in configuring op register\n");
916 return ret;
917 }
918 }
Rhyland Klein3f7e8272012-05-08 11:42:38 -0700919 ret = tps65910_reg_write_locked(pmic, sr_reg_add, 0);
Laxman Dewangan1e0c66f2012-01-28 15:07:57 +0530920 if (ret < 0) {
921 dev_err(mfd->dev, "Error in settting sr register\n");
922 return ret;
923 }
924 }
925
Rhyland Klein3f7e8272012-05-08 11:42:38 -0700926 ret = tps65910_reg_clear_bits(mfd,
Laxman Dewangan1e0c66f2012-01-28 15:07:57 +0530927 TPS65910_SLEEP_KEEP_LDO_ON + regoffs, bit_pos);
Laxman Dewanganf30b0712012-03-07 18:21:49 +0530928 if (!ret) {
929 if (ext_sleep_config & TPS65911_SLEEP_CONTROL_EXT_INPUT_SLEEP)
Rhyland Klein3f7e8272012-05-08 11:42:38 -0700930 ret = tps65910_reg_set_bits(mfd,
Laxman Dewanganf30b0712012-03-07 18:21:49 +0530931 TPS65910_SLEEP_SET_LDO_OFF + regoffs, bit_pos);
932 else
Rhyland Klein3f7e8272012-05-08 11:42:38 -0700933 ret = tps65910_reg_clear_bits(mfd,
Laxman Dewanganf30b0712012-03-07 18:21:49 +0530934 TPS65910_SLEEP_SET_LDO_OFF + regoffs, bit_pos);
935 }
Laxman Dewangan1e0c66f2012-01-28 15:07:57 +0530936 if (ret < 0)
937 dev_err(mfd->dev,
938 "Error in configuring SLEEP register\n");
Laxman Dewanganf30b0712012-03-07 18:21:49 +0530939
Laxman Dewangan1e0c66f2012-01-28 15:07:57 +0530940 return ret;
941}
942
Rhyland Klein67901782012-05-08 11:42:41 -0700943#ifdef CONFIG_OF
944
945static struct of_regulator_match tps65910_matches[] = {
Laxman Dewangan33a69432012-05-19 20:04:06 +0530946 { .name = "vrtc", .driver_data = (void *) &tps65910_regs[0] },
947 { .name = "vio", .driver_data = (void *) &tps65910_regs[1] },
948 { .name = "vdd1", .driver_data = (void *) &tps65910_regs[2] },
949 { .name = "vdd2", .driver_data = (void *) &tps65910_regs[3] },
950 { .name = "vdd3", .driver_data = (void *) &tps65910_regs[4] },
951 { .name = "vdig1", .driver_data = (void *) &tps65910_regs[5] },
952 { .name = "vdig2", .driver_data = (void *) &tps65910_regs[6] },
953 { .name = "vpll", .driver_data = (void *) &tps65910_regs[7] },
954 { .name = "vdac", .driver_data = (void *) &tps65910_regs[8] },
955 { .name = "vaux1", .driver_data = (void *) &tps65910_regs[9] },
956 { .name = "vaux2", .driver_data = (void *) &tps65910_regs[10] },
957 { .name = "vaux33", .driver_data = (void *) &tps65910_regs[11] },
958 { .name = "vmmc", .driver_data = (void *) &tps65910_regs[12] },
Rhyland Klein67901782012-05-08 11:42:41 -0700959};
960
961static struct of_regulator_match tps65911_matches[] = {
Laxman Dewangan33a69432012-05-19 20:04:06 +0530962 { .name = "vrtc", .driver_data = (void *) &tps65911_regs[0] },
963 { .name = "vio", .driver_data = (void *) &tps65911_regs[1] },
964 { .name = "vdd1", .driver_data = (void *) &tps65911_regs[2] },
965 { .name = "vdd2", .driver_data = (void *) &tps65911_regs[3] },
966 { .name = "vddctrl", .driver_data = (void *) &tps65911_regs[4] },
967 { .name = "ldo1", .driver_data = (void *) &tps65911_regs[5] },
968 { .name = "ldo2", .driver_data = (void *) &tps65911_regs[6] },
969 { .name = "ldo3", .driver_data = (void *) &tps65911_regs[7] },
970 { .name = "ldo4", .driver_data = (void *) &tps65911_regs[8] },
971 { .name = "ldo5", .driver_data = (void *) &tps65911_regs[9] },
972 { .name = "ldo6", .driver_data = (void *) &tps65911_regs[10] },
973 { .name = "ldo7", .driver_data = (void *) &tps65911_regs[11] },
974 { .name = "ldo8", .driver_data = (void *) &tps65911_regs[12] },
Rhyland Klein67901782012-05-08 11:42:41 -0700975};
976
977static struct tps65910_board *tps65910_parse_dt_reg_data(
Laxman Dewangan84df8c12012-05-20 21:48:50 +0530978 struct platform_device *pdev,
979 struct of_regulator_match **tps65910_reg_matches)
Rhyland Klein67901782012-05-08 11:42:41 -0700980{
981 struct tps65910_board *pmic_plat_data;
982 struct tps65910 *tps65910 = dev_get_drvdata(pdev->dev.parent);
983 struct device_node *np = pdev->dev.parent->of_node;
984 struct device_node *regulators;
985 struct of_regulator_match *matches;
986 unsigned int prop;
987 int idx = 0, ret, count;
988
989 pmic_plat_data = devm_kzalloc(&pdev->dev, sizeof(*pmic_plat_data),
990 GFP_KERNEL);
991
992 if (!pmic_plat_data) {
993 dev_err(&pdev->dev, "Failure to alloc pdata for regulators.\n");
994 return NULL;
995 }
996
997 regulators = of_find_node_by_name(np, "regulators");
Laxman Dewangan92ab9532012-05-20 21:48:49 +0530998 if (!regulators) {
999 dev_err(&pdev->dev, "regulator node not found\n");
1000 return NULL;
1001 }
Rhyland Klein67901782012-05-08 11:42:41 -07001002
1003 switch (tps65910_chip_id(tps65910)) {
1004 case TPS65910:
1005 count = ARRAY_SIZE(tps65910_matches);
1006 matches = tps65910_matches;
1007 break;
1008 case TPS65911:
1009 count = ARRAY_SIZE(tps65911_matches);
1010 matches = tps65911_matches;
1011 break;
1012 default:
Laxman Dewangan7e9a57e2012-05-20 21:48:48 +05301013 dev_err(&pdev->dev, "Invalid tps chip version\n");
Rhyland Klein67901782012-05-08 11:42:41 -07001014 return NULL;
1015 }
1016
1017 ret = of_regulator_match(pdev->dev.parent, regulators, matches, count);
1018 if (ret < 0) {
1019 dev_err(&pdev->dev, "Error parsing regulator init data: %d\n",
1020 ret);
1021 return NULL;
1022 }
1023
Laxman Dewangan84df8c12012-05-20 21:48:50 +05301024 *tps65910_reg_matches = matches;
1025
Rhyland Klein67901782012-05-08 11:42:41 -07001026 for (idx = 0; idx < count; idx++) {
1027 if (!matches[idx].init_data || !matches[idx].of_node)
1028 continue;
1029
1030 pmic_plat_data->tps65910_pmic_init_data[idx] =
1031 matches[idx].init_data;
1032
1033 ret = of_property_read_u32(matches[idx].of_node,
1034 "ti,regulator-ext-sleep-control", &prop);
1035 if (!ret)
1036 pmic_plat_data->regulator_ext_sleep_control[idx] = prop;
1037 }
1038
1039 return pmic_plat_data;
1040}
1041#else
1042static inline struct tps65910_board *tps65910_parse_dt_reg_data(
Laxman Dewangan84df8c12012-05-20 21:48:50 +05301043 struct platform_device *pdev,
1044 struct of_regulator_match **tps65910_reg_matches)
Rhyland Klein67901782012-05-08 11:42:41 -07001045{
Laxman Dewangan84df8c12012-05-20 21:48:50 +05301046 *tps65910_reg_matches = NULL;
Mark Brown74ea0e52012-06-15 19:04:33 +01001047 return NULL;
Rhyland Klein67901782012-05-08 11:42:41 -07001048}
1049#endif
1050
Graeme Gregory518fb722011-05-02 16:20:08 -05001051static __devinit int tps65910_probe(struct platform_device *pdev)
1052{
1053 struct tps65910 *tps65910 = dev_get_drvdata(pdev->dev.parent);
Mark Brownc1727082012-04-04 00:50:22 +01001054 struct regulator_config config = { };
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -05001055 struct tps_info *info;
Graeme Gregory518fb722011-05-02 16:20:08 -05001056 struct regulator_init_data *reg_data;
1057 struct regulator_dev *rdev;
1058 struct tps65910_reg *pmic;
1059 struct tps65910_board *pmic_plat_data;
Laxman Dewangan84df8c12012-05-20 21:48:50 +05301060 struct of_regulator_match *tps65910_reg_matches = NULL;
Graeme Gregory518fb722011-05-02 16:20:08 -05001061 int i, err;
1062
1063 pmic_plat_data = dev_get_platdata(tps65910->dev);
Rhyland Klein67901782012-05-08 11:42:41 -07001064 if (!pmic_plat_data && tps65910->dev->of_node)
Laxman Dewangan84df8c12012-05-20 21:48:50 +05301065 pmic_plat_data = tps65910_parse_dt_reg_data(pdev,
1066 &tps65910_reg_matches);
Rhyland Klein67901782012-05-08 11:42:41 -07001067
Laxman Dewangan7e9a57e2012-05-20 21:48:48 +05301068 if (!pmic_plat_data) {
1069 dev_err(&pdev->dev, "Platform data not found\n");
Graeme Gregory518fb722011-05-02 16:20:08 -05001070 return -EINVAL;
Laxman Dewangan7e9a57e2012-05-20 21:48:48 +05301071 }
Graeme Gregory518fb722011-05-02 16:20:08 -05001072
Axel Lin9eb0c422012-04-11 14:40:18 +08001073 pmic = devm_kzalloc(&pdev->dev, sizeof(*pmic), GFP_KERNEL);
Laxman Dewangan7e9a57e2012-05-20 21:48:48 +05301074 if (!pmic) {
1075 dev_err(&pdev->dev, "Memory allocation failed for pmic\n");
Graeme Gregory518fb722011-05-02 16:20:08 -05001076 return -ENOMEM;
Laxman Dewangan7e9a57e2012-05-20 21:48:48 +05301077 }
Graeme Gregory518fb722011-05-02 16:20:08 -05001078
1079 mutex_init(&pmic->mutex);
1080 pmic->mfd = tps65910;
1081 platform_set_drvdata(pdev, pmic);
1082
1083 /* Give control of all register to control port */
Rhyland Klein3f7e8272012-05-08 11:42:38 -07001084 tps65910_reg_set_bits(pmic->mfd, TPS65910_DEVCTRL,
Graeme Gregory518fb722011-05-02 16:20:08 -05001085 DEVCTRL_SR_CTL_I2C_SEL_MASK);
1086
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -05001087 switch(tps65910_chip_id(tps65910)) {
1088 case TPS65910:
1089 pmic->get_ctrl_reg = &tps65910_get_ctrl_register;
Axel Lin39aa9b62011-07-11 09:57:43 +08001090 pmic->num_regulators = ARRAY_SIZE(tps65910_regs);
Laxman Dewangan1e0c66f2012-01-28 15:07:57 +05301091 pmic->ext_sleep_control = tps65910_ext_sleep_control;
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -05001092 info = tps65910_regs;
Axel Lind04156b2011-07-10 21:44:09 +08001093 break;
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -05001094 case TPS65911:
1095 pmic->get_ctrl_reg = &tps65911_get_ctrl_register;
Axel Lin39aa9b62011-07-11 09:57:43 +08001096 pmic->num_regulators = ARRAY_SIZE(tps65911_regs);
Laxman Dewangan1e0c66f2012-01-28 15:07:57 +05301097 pmic->ext_sleep_control = tps65911_ext_sleep_control;
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -05001098 info = tps65911_regs;
Axel Lind04156b2011-07-10 21:44:09 +08001099 break;
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -05001100 default:
Laxman Dewangan7e9a57e2012-05-20 21:48:48 +05301101 dev_err(&pdev->dev, "Invalid tps chip version\n");
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -05001102 return -ENODEV;
1103 }
1104
Laxman Dewangan68d8c1c2012-05-19 20:04:09 +05301105 pmic->desc = devm_kzalloc(&pdev->dev, pmic->num_regulators *
Axel Lin39aa9b62011-07-11 09:57:43 +08001106 sizeof(struct regulator_desc), GFP_KERNEL);
1107 if (!pmic->desc) {
Laxman Dewangan68d8c1c2012-05-19 20:04:09 +05301108 dev_err(&pdev->dev, "Memory alloc fails for desc\n");
1109 return -ENOMEM;
Axel Lin39aa9b62011-07-11 09:57:43 +08001110 }
1111
Laxman Dewangan68d8c1c2012-05-19 20:04:09 +05301112 pmic->info = devm_kzalloc(&pdev->dev, pmic->num_regulators *
Axel Lin39aa9b62011-07-11 09:57:43 +08001113 sizeof(struct tps_info *), GFP_KERNEL);
1114 if (!pmic->info) {
Laxman Dewangan68d8c1c2012-05-19 20:04:09 +05301115 dev_err(&pdev->dev, "Memory alloc fails for info\n");
1116 return -ENOMEM;
Axel Lin39aa9b62011-07-11 09:57:43 +08001117 }
1118
Laxman Dewangan68d8c1c2012-05-19 20:04:09 +05301119 pmic->rdev = devm_kzalloc(&pdev->dev, pmic->num_regulators *
Axel Lin39aa9b62011-07-11 09:57:43 +08001120 sizeof(struct regulator_dev *), GFP_KERNEL);
1121 if (!pmic->rdev) {
Laxman Dewangan68d8c1c2012-05-19 20:04:09 +05301122 dev_err(&pdev->dev, "Memory alloc fails for rdev\n");
1123 return -ENOMEM;
Axel Lin39aa9b62011-07-11 09:57:43 +08001124 }
1125
Kyle Mannac1fc1482011-11-03 12:08:06 -05001126 for (i = 0; i < pmic->num_regulators && i < TPS65910_NUM_REGS;
1127 i++, info++) {
1128
1129 reg_data = pmic_plat_data->tps65910_pmic_init_data[i];
1130
1131 /* Regulator API handles empty constraints but not NULL
1132 * constraints */
1133 if (!reg_data)
1134 continue;
1135
Graeme Gregory518fb722011-05-02 16:20:08 -05001136 /* Register the regulators */
1137 pmic->info[i] = info;
1138
1139 pmic->desc[i].name = info->name;
Axel Lin77fa44d2011-05-12 13:47:50 +08001140 pmic->desc[i].id = i;
Laxman Dewangan7d38a3c2012-01-20 16:36:22 +05301141 pmic->desc[i].n_voltages = info->n_voltages;
Graeme Gregory518fb722011-05-02 16:20:08 -05001142
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -05001143 if (i == TPS65910_REG_VDD1 || i == TPS65910_REG_VDD2) {
Graeme Gregory518fb722011-05-02 16:20:08 -05001144 pmic->desc[i].ops = &tps65910_ops_dcdc;
Afzal Mohammed780dc9b2011-11-08 18:54:10 +05301145 pmic->desc[i].n_voltages = VDD1_2_NUM_VOLT_FINE *
1146 VDD1_2_NUM_VOLT_COARSE;
Axel Lin01bc3a12012-06-20 22:40:10 +08001147 pmic->desc[i].ramp_delay = 12500;
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -05001148 } else if (i == TPS65910_REG_VDD3) {
Axel Lin01bc3a12012-06-20 22:40:10 +08001149 if (tps65910_chip_id(tps65910) == TPS65910) {
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -05001150 pmic->desc[i].ops = &tps65910_ops_vdd3;
Axel Lind9fe28f2012-06-21 18:48:00 +08001151 pmic->desc[i].volt_table = info->voltage_table;
Axel Lin01bc3a12012-06-20 22:40:10 +08001152 } else {
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -05001153 pmic->desc[i].ops = &tps65910_ops_dcdc;
Axel Lin01bc3a12012-06-20 22:40:10 +08001154 pmic->desc[i].ramp_delay = 5000;
1155 }
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -05001156 } else {
Axel Lind9fe28f2012-06-21 18:48:00 +08001157 if (tps65910_chip_id(tps65910) == TPS65910) {
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -05001158 pmic->desc[i].ops = &tps65910_ops;
Axel Lind9fe28f2012-06-21 18:48:00 +08001159 pmic->desc[i].volt_table = info->voltage_table;
1160 } else {
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -05001161 pmic->desc[i].ops = &tps65911_ops;
Axel Lind9fe28f2012-06-21 18:48:00 +08001162 }
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -05001163 }
Graeme Gregory518fb722011-05-02 16:20:08 -05001164
Laxman Dewangan1e0c66f2012-01-28 15:07:57 +05301165 err = tps65910_set_ext_sleep_config(pmic, i,
1166 pmic_plat_data->regulator_ext_sleep_control[i]);
1167 /*
1168 * Failing on regulator for configuring externally control
1169 * is not a serious issue, just throw warning.
1170 */
1171 if (err < 0)
1172 dev_warn(tps65910->dev,
1173 "Failed to initialise ext control config\n");
1174
Graeme Gregory518fb722011-05-02 16:20:08 -05001175 pmic->desc[i].type = REGULATOR_VOLTAGE;
1176 pmic->desc[i].owner = THIS_MODULE;
Axel Lina40a9c42012-04-17 14:34:46 +08001177 pmic->desc[i].enable_reg = pmic->get_ctrl_reg(i);
1178 pmic->desc[i].enable_mask = TPS65910_SUPPLY_STATE_ENABLED;
Graeme Gregory518fb722011-05-02 16:20:08 -05001179
Mark Brownc1727082012-04-04 00:50:22 +01001180 config.dev = tps65910->dev;
1181 config.init_data = reg_data;
1182 config.driver_data = pmic;
Axel Lina40a9c42012-04-17 14:34:46 +08001183 config.regmap = tps65910->regmap;
Mark Brownc1727082012-04-04 00:50:22 +01001184
Laxman Dewangan84df8c12012-05-20 21:48:50 +05301185 if (tps65910_reg_matches)
1186 config.of_node = tps65910_reg_matches[i].of_node;
Rhyland Klein67901782012-05-08 11:42:41 -07001187
Mark Brownc1727082012-04-04 00:50:22 +01001188 rdev = regulator_register(&pmic->desc[i], &config);
Graeme Gregory518fb722011-05-02 16:20:08 -05001189 if (IS_ERR(rdev)) {
1190 dev_err(tps65910->dev,
1191 "failed to register %s regulator\n",
1192 pdev->name);
1193 err = PTR_ERR(rdev);
Axel Lin39aa9b62011-07-11 09:57:43 +08001194 goto err_unregister_regulator;
Graeme Gregory518fb722011-05-02 16:20:08 -05001195 }
1196
1197 /* Save regulator for cleanup */
1198 pmic->rdev[i] = rdev;
1199 }
1200 return 0;
1201
Axel Lin39aa9b62011-07-11 09:57:43 +08001202err_unregister_regulator:
Graeme Gregory518fb722011-05-02 16:20:08 -05001203 while (--i >= 0)
1204 regulator_unregister(pmic->rdev[i]);
Graeme Gregory518fb722011-05-02 16:20:08 -05001205 return err;
1206}
1207
1208static int __devexit tps65910_remove(struct platform_device *pdev)
1209{
Axel Lin39aa9b62011-07-11 09:57:43 +08001210 struct tps65910_reg *pmic = platform_get_drvdata(pdev);
Graeme Gregory518fb722011-05-02 16:20:08 -05001211 int i;
1212
Axel Lin39aa9b62011-07-11 09:57:43 +08001213 for (i = 0; i < pmic->num_regulators; i++)
1214 regulator_unregister(pmic->rdev[i]);
Graeme Gregory518fb722011-05-02 16:20:08 -05001215
Graeme Gregory518fb722011-05-02 16:20:08 -05001216 return 0;
1217}
1218
Laxman Dewangan1e0c66f2012-01-28 15:07:57 +05301219static void tps65910_shutdown(struct platform_device *pdev)
1220{
1221 struct tps65910_reg *pmic = platform_get_drvdata(pdev);
1222 int i;
1223
1224 /*
1225 * Before bootloader jumps to kernel, it makes sure that required
1226 * external control signals are in desired state so that given rails
1227 * can be configure accordingly.
1228 * If rails are configured to be controlled from external control
1229 * then before shutting down/rebooting the system, the external
1230 * control configuration need to be remove from the rails so that
1231 * its output will be available as per register programming even
1232 * if external controls are removed. This is require when the POR
1233 * value of the control signals are not in active state and before
1234 * bootloader initializes it, the system requires the rail output
1235 * to be active for booting.
1236 */
1237 for (i = 0; i < pmic->num_regulators; i++) {
1238 int err;
1239 if (!pmic->rdev[i])
1240 continue;
1241
1242 err = tps65910_set_ext_sleep_config(pmic, i, 0);
1243 if (err < 0)
1244 dev_err(&pdev->dev,
1245 "Error in clearing external control\n");
1246 }
1247}
1248
Graeme Gregory518fb722011-05-02 16:20:08 -05001249static struct platform_driver tps65910_driver = {
1250 .driver = {
1251 .name = "tps65910-pmic",
1252 .owner = THIS_MODULE,
1253 },
1254 .probe = tps65910_probe,
1255 .remove = __devexit_p(tps65910_remove),
Laxman Dewangan1e0c66f2012-01-28 15:07:57 +05301256 .shutdown = tps65910_shutdown,
Graeme Gregory518fb722011-05-02 16:20:08 -05001257};
1258
1259static int __init tps65910_init(void)
1260{
1261 return platform_driver_register(&tps65910_driver);
1262}
1263subsys_initcall(tps65910_init);
1264
1265static void __exit tps65910_cleanup(void)
1266{
1267 platform_driver_unregister(&tps65910_driver);
1268}
1269module_exit(tps65910_cleanup);
1270
1271MODULE_AUTHOR("Graeme Gregory <gg@slimlogic.co.uk>");
Axel Linae0e6542012-02-21 10:14:55 +08001272MODULE_DESCRIPTION("TPS65910/TPS65911 voltage regulator driver");
Graeme Gregory518fb722011-05-02 16:20:08 -05001273MODULE_LICENSE("GPL v2");
1274MODULE_ALIAS("platform:tps65910-pmic");