Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 1 | /* |
| 2 | * tps65910.c -- TI tps65910 |
| 3 | * |
| 4 | * Copyright 2010 Texas Instruments Inc. |
| 5 | * |
| 6 | * Author: Graeme Gregory <gg@slimlogic.co.uk> |
| 7 | * Author: Jorge Eduardo Candelaria <jedu@slimlogic.co.uk> |
| 8 | * |
| 9 | * This program is free software; you can redistribute it and/or modify it |
| 10 | * under the terms of the GNU General Public License as published by the |
| 11 | * Free Software Foundation; either version 2 of the License, or (at your |
| 12 | * option) any later version. |
| 13 | * |
| 14 | */ |
| 15 | |
| 16 | #include <linux/kernel.h> |
| 17 | #include <linux/module.h> |
| 18 | #include <linux/init.h> |
| 19 | #include <linux/err.h> |
| 20 | #include <linux/platform_device.h> |
| 21 | #include <linux/regulator/driver.h> |
| 22 | #include <linux/regulator/machine.h> |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 23 | #include <linux/slab.h> |
| 24 | #include <linux/gpio.h> |
| 25 | #include <linux/mfd/tps65910.h> |
Rhyland Klein | 6790178 | 2012-05-08 11:42:41 -0700 | [diff] [blame] | 26 | #include <linux/regulator/of_regulator.h> |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 27 | |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 28 | #define TPS65910_SUPPLY_STATE_ENABLED 0x1 |
Laxman Dewangan | 1e0c66f | 2012-01-28 15:07:57 +0530 | [diff] [blame] | 29 | #define EXT_SLEEP_CONTROL (TPS65910_SLEEP_CONTROL_EXT_INPUT_EN1 | \ |
| 30 | TPS65910_SLEEP_CONTROL_EXT_INPUT_EN2 | \ |
Laxman Dewangan | f30b071 | 2012-03-07 18:21:49 +0530 | [diff] [blame] | 31 | TPS65910_SLEEP_CONTROL_EXT_INPUT_EN3 | \ |
| 32 | TPS65911_SLEEP_CONTROL_EXT_INPUT_SLEEP) |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 33 | |
Axel Lin | d9fe28f | 2012-06-21 18:48:00 +0800 | [diff] [blame^] | 34 | /* supported VIO voltages in microvolts */ |
| 35 | static const unsigned int VIO_VSEL_table[] = { |
| 36 | 1500000, 1800000, 2500000, 3300000, |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 37 | }; |
| 38 | |
Jorge Eduardo Candelaria | a320e3c | 2011-05-16 18:35:03 -0500 | [diff] [blame] | 39 | /* VSEL tables for TPS65910 specific LDOs and dcdc's */ |
| 40 | |
Axel Lin | d9fe28f | 2012-06-21 18:48:00 +0800 | [diff] [blame^] | 41 | /* supported VDD3 voltages in microvolts */ |
| 42 | static const unsigned int VDD3_VSEL_table[] = { |
| 43 | 5000000, |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 44 | }; |
| 45 | |
Axel Lin | d9fe28f | 2012-06-21 18:48:00 +0800 | [diff] [blame^] | 46 | /* supported VDIG1 voltages in microvolts */ |
| 47 | static const unsigned int VDIG1_VSEL_table[] = { |
| 48 | 1200000, 1500000, 1800000, 2700000, |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 49 | }; |
| 50 | |
Axel Lin | d9fe28f | 2012-06-21 18:48:00 +0800 | [diff] [blame^] | 51 | /* supported VDIG2 voltages in microvolts */ |
| 52 | static const unsigned int VDIG2_VSEL_table[] = { |
| 53 | 1000000, 1100000, 1200000, 1800000, |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 54 | }; |
| 55 | |
Axel Lin | d9fe28f | 2012-06-21 18:48:00 +0800 | [diff] [blame^] | 56 | /* supported VPLL voltages in microvolts */ |
| 57 | static const unsigned int VPLL_VSEL_table[] = { |
| 58 | 1000000, 1100000, 1800000, 2500000, |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 59 | }; |
| 60 | |
Axel Lin | d9fe28f | 2012-06-21 18:48:00 +0800 | [diff] [blame^] | 61 | /* supported VDAC voltages in microvolts */ |
| 62 | static const unsigned int VDAC_VSEL_table[] = { |
| 63 | 1800000, 2600000, 2800000, 2850000, |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 64 | }; |
| 65 | |
Axel Lin | d9fe28f | 2012-06-21 18:48:00 +0800 | [diff] [blame^] | 66 | /* supported VAUX1 voltages in microvolts */ |
| 67 | static const unsigned int VAUX1_VSEL_table[] = { |
| 68 | 1800000, 2500000, 2800000, 2850000, |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 69 | }; |
| 70 | |
Axel Lin | d9fe28f | 2012-06-21 18:48:00 +0800 | [diff] [blame^] | 71 | /* supported VAUX2 voltages in microvolts */ |
| 72 | static const unsigned int VAUX2_VSEL_table[] = { |
| 73 | 1800000, 2800000, 2900000, 3300000, |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 74 | }; |
| 75 | |
Axel Lin | d9fe28f | 2012-06-21 18:48:00 +0800 | [diff] [blame^] | 76 | /* supported VAUX33 voltages in microvolts */ |
| 77 | static const unsigned int VAUX33_VSEL_table[] = { |
| 78 | 1800000, 2000000, 2800000, 3300000, |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 79 | }; |
| 80 | |
Axel Lin | d9fe28f | 2012-06-21 18:48:00 +0800 | [diff] [blame^] | 81 | /* supported VMMC voltages in microvolts */ |
| 82 | static const unsigned int VMMC_VSEL_table[] = { |
| 83 | 1800000, 2800000, 3000000, 3300000, |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 84 | }; |
| 85 | |
| 86 | struct tps_info { |
| 87 | const char *name; |
Laxman Dewangan | 7d38a3c | 2012-01-20 16:36:22 +0530 | [diff] [blame] | 88 | u8 n_voltages; |
Axel Lin | d9fe28f | 2012-06-21 18:48:00 +0800 | [diff] [blame^] | 89 | const unsigned int *voltage_table; |
Laxman Dewangan | 0651eed | 2012-03-13 11:35:20 +0530 | [diff] [blame] | 90 | int enable_time_us; |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 91 | }; |
| 92 | |
| 93 | static struct tps_info tps65910_regs[] = { |
| 94 | { |
Laxman Dewangan | 33a6943 | 2012-05-19 20:04:06 +0530 | [diff] [blame] | 95 | .name = "vrtc", |
Laxman Dewangan | 0651eed | 2012-03-13 11:35:20 +0530 | [diff] [blame] | 96 | .enable_time_us = 2200, |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 97 | }, |
| 98 | { |
Laxman Dewangan | 33a6943 | 2012-05-19 20:04:06 +0530 | [diff] [blame] | 99 | .name = "vio", |
Laxman Dewangan | 7d38a3c | 2012-01-20 16:36:22 +0530 | [diff] [blame] | 100 | .n_voltages = ARRAY_SIZE(VIO_VSEL_table), |
| 101 | .voltage_table = VIO_VSEL_table, |
Laxman Dewangan | 0651eed | 2012-03-13 11:35:20 +0530 | [diff] [blame] | 102 | .enable_time_us = 350, |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 103 | }, |
| 104 | { |
Laxman Dewangan | 33a6943 | 2012-05-19 20:04:06 +0530 | [diff] [blame] | 105 | .name = "vdd1", |
Laxman Dewangan | 0651eed | 2012-03-13 11:35:20 +0530 | [diff] [blame] | 106 | .enable_time_us = 350, |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 107 | }, |
| 108 | { |
Laxman Dewangan | 33a6943 | 2012-05-19 20:04:06 +0530 | [diff] [blame] | 109 | .name = "vdd2", |
Laxman Dewangan | 0651eed | 2012-03-13 11:35:20 +0530 | [diff] [blame] | 110 | .enable_time_us = 350, |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 111 | }, |
| 112 | { |
Laxman Dewangan | 33a6943 | 2012-05-19 20:04:06 +0530 | [diff] [blame] | 113 | .name = "vdd3", |
Laxman Dewangan | 7d38a3c | 2012-01-20 16:36:22 +0530 | [diff] [blame] | 114 | .n_voltages = ARRAY_SIZE(VDD3_VSEL_table), |
| 115 | .voltage_table = VDD3_VSEL_table, |
Laxman Dewangan | 0651eed | 2012-03-13 11:35:20 +0530 | [diff] [blame] | 116 | .enable_time_us = 200, |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 117 | }, |
| 118 | { |
Laxman Dewangan | 33a6943 | 2012-05-19 20:04:06 +0530 | [diff] [blame] | 119 | .name = "vdig1", |
Laxman Dewangan | 7d38a3c | 2012-01-20 16:36:22 +0530 | [diff] [blame] | 120 | .n_voltages = ARRAY_SIZE(VDIG1_VSEL_table), |
| 121 | .voltage_table = VDIG1_VSEL_table, |
Laxman Dewangan | 0651eed | 2012-03-13 11:35:20 +0530 | [diff] [blame] | 122 | .enable_time_us = 100, |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 123 | }, |
| 124 | { |
Laxman Dewangan | 33a6943 | 2012-05-19 20:04:06 +0530 | [diff] [blame] | 125 | .name = "vdig2", |
Laxman Dewangan | 7d38a3c | 2012-01-20 16:36:22 +0530 | [diff] [blame] | 126 | .n_voltages = ARRAY_SIZE(VDIG2_VSEL_table), |
| 127 | .voltage_table = VDIG2_VSEL_table, |
Laxman Dewangan | 0651eed | 2012-03-13 11:35:20 +0530 | [diff] [blame] | 128 | .enable_time_us = 100, |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 129 | }, |
| 130 | { |
Laxman Dewangan | 33a6943 | 2012-05-19 20:04:06 +0530 | [diff] [blame] | 131 | .name = "vpll", |
Laxman Dewangan | 7d38a3c | 2012-01-20 16:36:22 +0530 | [diff] [blame] | 132 | .n_voltages = ARRAY_SIZE(VPLL_VSEL_table), |
| 133 | .voltage_table = VPLL_VSEL_table, |
Laxman Dewangan | 0651eed | 2012-03-13 11:35:20 +0530 | [diff] [blame] | 134 | .enable_time_us = 100, |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 135 | }, |
| 136 | { |
Laxman Dewangan | 33a6943 | 2012-05-19 20:04:06 +0530 | [diff] [blame] | 137 | .name = "vdac", |
Laxman Dewangan | 7d38a3c | 2012-01-20 16:36:22 +0530 | [diff] [blame] | 138 | .n_voltages = ARRAY_SIZE(VDAC_VSEL_table), |
| 139 | .voltage_table = VDAC_VSEL_table, |
Laxman Dewangan | 0651eed | 2012-03-13 11:35:20 +0530 | [diff] [blame] | 140 | .enable_time_us = 100, |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 141 | }, |
| 142 | { |
Laxman Dewangan | 33a6943 | 2012-05-19 20:04:06 +0530 | [diff] [blame] | 143 | .name = "vaux1", |
Laxman Dewangan | 7d38a3c | 2012-01-20 16:36:22 +0530 | [diff] [blame] | 144 | .n_voltages = ARRAY_SIZE(VAUX1_VSEL_table), |
| 145 | .voltage_table = VAUX1_VSEL_table, |
Laxman Dewangan | 0651eed | 2012-03-13 11:35:20 +0530 | [diff] [blame] | 146 | .enable_time_us = 100, |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 147 | }, |
| 148 | { |
Laxman Dewangan | 33a6943 | 2012-05-19 20:04:06 +0530 | [diff] [blame] | 149 | .name = "vaux2", |
Laxman Dewangan | 7d38a3c | 2012-01-20 16:36:22 +0530 | [diff] [blame] | 150 | .n_voltages = ARRAY_SIZE(VAUX2_VSEL_table), |
| 151 | .voltage_table = VAUX2_VSEL_table, |
Laxman Dewangan | 0651eed | 2012-03-13 11:35:20 +0530 | [diff] [blame] | 152 | .enable_time_us = 100, |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 153 | }, |
| 154 | { |
Laxman Dewangan | 33a6943 | 2012-05-19 20:04:06 +0530 | [diff] [blame] | 155 | .name = "vaux33", |
Laxman Dewangan | 7d38a3c | 2012-01-20 16:36:22 +0530 | [diff] [blame] | 156 | .n_voltages = ARRAY_SIZE(VAUX33_VSEL_table), |
| 157 | .voltage_table = VAUX33_VSEL_table, |
Laxman Dewangan | 0651eed | 2012-03-13 11:35:20 +0530 | [diff] [blame] | 158 | .enable_time_us = 100, |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 159 | }, |
| 160 | { |
Laxman Dewangan | 33a6943 | 2012-05-19 20:04:06 +0530 | [diff] [blame] | 161 | .name = "vmmc", |
Laxman Dewangan | 7d38a3c | 2012-01-20 16:36:22 +0530 | [diff] [blame] | 162 | .n_voltages = ARRAY_SIZE(VMMC_VSEL_table), |
| 163 | .voltage_table = VMMC_VSEL_table, |
Laxman Dewangan | 0651eed | 2012-03-13 11:35:20 +0530 | [diff] [blame] | 164 | .enable_time_us = 100, |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 165 | }, |
| 166 | }; |
| 167 | |
Jorge Eduardo Candelaria | a320e3c | 2011-05-16 18:35:03 -0500 | [diff] [blame] | 168 | static struct tps_info tps65911_regs[] = { |
| 169 | { |
Laxman Dewangan | 33a6943 | 2012-05-19 20:04:06 +0530 | [diff] [blame] | 170 | .name = "vrtc", |
Laxman Dewangan | 0651eed | 2012-03-13 11:35:20 +0530 | [diff] [blame] | 171 | .enable_time_us = 2200, |
Laxman Dewangan | c2f8efd | 2012-01-18 20:46:56 +0530 | [diff] [blame] | 172 | }, |
| 173 | { |
Laxman Dewangan | 33a6943 | 2012-05-19 20:04:06 +0530 | [diff] [blame] | 174 | .name = "vio", |
Laxman Dewangan | 7d38a3c | 2012-01-20 16:36:22 +0530 | [diff] [blame] | 175 | .n_voltages = ARRAY_SIZE(VIO_VSEL_table), |
| 176 | .voltage_table = VIO_VSEL_table, |
Laxman Dewangan | 0651eed | 2012-03-13 11:35:20 +0530 | [diff] [blame] | 177 | .enable_time_us = 350, |
Jorge Eduardo Candelaria | a320e3c | 2011-05-16 18:35:03 -0500 | [diff] [blame] | 178 | }, |
| 179 | { |
Laxman Dewangan | 33a6943 | 2012-05-19 20:04:06 +0530 | [diff] [blame] | 180 | .name = "vdd1", |
Laxman Dewangan | 7d38a3c | 2012-01-20 16:36:22 +0530 | [diff] [blame] | 181 | .n_voltages = 73, |
Laxman Dewangan | 0651eed | 2012-03-13 11:35:20 +0530 | [diff] [blame] | 182 | .enable_time_us = 350, |
Jorge Eduardo Candelaria | a320e3c | 2011-05-16 18:35:03 -0500 | [diff] [blame] | 183 | }, |
| 184 | { |
Laxman Dewangan | 33a6943 | 2012-05-19 20:04:06 +0530 | [diff] [blame] | 185 | .name = "vdd2", |
Laxman Dewangan | 7d38a3c | 2012-01-20 16:36:22 +0530 | [diff] [blame] | 186 | .n_voltages = 73, |
Laxman Dewangan | 0651eed | 2012-03-13 11:35:20 +0530 | [diff] [blame] | 187 | .enable_time_us = 350, |
Jorge Eduardo Candelaria | a320e3c | 2011-05-16 18:35:03 -0500 | [diff] [blame] | 188 | }, |
| 189 | { |
Laxman Dewangan | 33a6943 | 2012-05-19 20:04:06 +0530 | [diff] [blame] | 190 | .name = "vddctrl", |
Laxman Dewangan | 7d38a3c | 2012-01-20 16:36:22 +0530 | [diff] [blame] | 191 | .n_voltages = 65, |
Laxman Dewangan | 0651eed | 2012-03-13 11:35:20 +0530 | [diff] [blame] | 192 | .enable_time_us = 900, |
Jorge Eduardo Candelaria | a320e3c | 2011-05-16 18:35:03 -0500 | [diff] [blame] | 193 | }, |
| 194 | { |
Laxman Dewangan | 33a6943 | 2012-05-19 20:04:06 +0530 | [diff] [blame] | 195 | .name = "ldo1", |
Laxman Dewangan | 7d38a3c | 2012-01-20 16:36:22 +0530 | [diff] [blame] | 196 | .n_voltages = 47, |
Laxman Dewangan | 0651eed | 2012-03-13 11:35:20 +0530 | [diff] [blame] | 197 | .enable_time_us = 420, |
Jorge Eduardo Candelaria | a320e3c | 2011-05-16 18:35:03 -0500 | [diff] [blame] | 198 | }, |
| 199 | { |
Laxman Dewangan | 33a6943 | 2012-05-19 20:04:06 +0530 | [diff] [blame] | 200 | .name = "ldo2", |
Laxman Dewangan | 7d38a3c | 2012-01-20 16:36:22 +0530 | [diff] [blame] | 201 | .n_voltages = 47, |
Laxman Dewangan | 0651eed | 2012-03-13 11:35:20 +0530 | [diff] [blame] | 202 | .enable_time_us = 420, |
Jorge Eduardo Candelaria | a320e3c | 2011-05-16 18:35:03 -0500 | [diff] [blame] | 203 | }, |
| 204 | { |
Laxman Dewangan | 33a6943 | 2012-05-19 20:04:06 +0530 | [diff] [blame] | 205 | .name = "ldo3", |
Laxman Dewangan | 7d38a3c | 2012-01-20 16:36:22 +0530 | [diff] [blame] | 206 | .n_voltages = 24, |
Laxman Dewangan | 0651eed | 2012-03-13 11:35:20 +0530 | [diff] [blame] | 207 | .enable_time_us = 230, |
Jorge Eduardo Candelaria | a320e3c | 2011-05-16 18:35:03 -0500 | [diff] [blame] | 208 | }, |
| 209 | { |
Laxman Dewangan | 33a6943 | 2012-05-19 20:04:06 +0530 | [diff] [blame] | 210 | .name = "ldo4", |
Laxman Dewangan | 7d38a3c | 2012-01-20 16:36:22 +0530 | [diff] [blame] | 211 | .n_voltages = 47, |
Laxman Dewangan | 0651eed | 2012-03-13 11:35:20 +0530 | [diff] [blame] | 212 | .enable_time_us = 230, |
Jorge Eduardo Candelaria | a320e3c | 2011-05-16 18:35:03 -0500 | [diff] [blame] | 213 | }, |
| 214 | { |
Laxman Dewangan | 33a6943 | 2012-05-19 20:04:06 +0530 | [diff] [blame] | 215 | .name = "ldo5", |
Laxman Dewangan | 7d38a3c | 2012-01-20 16:36:22 +0530 | [diff] [blame] | 216 | .n_voltages = 24, |
Laxman Dewangan | 0651eed | 2012-03-13 11:35:20 +0530 | [diff] [blame] | 217 | .enable_time_us = 230, |
Jorge Eduardo Candelaria | a320e3c | 2011-05-16 18:35:03 -0500 | [diff] [blame] | 218 | }, |
| 219 | { |
Laxman Dewangan | 33a6943 | 2012-05-19 20:04:06 +0530 | [diff] [blame] | 220 | .name = "ldo6", |
Laxman Dewangan | 7d38a3c | 2012-01-20 16:36:22 +0530 | [diff] [blame] | 221 | .n_voltages = 24, |
Laxman Dewangan | 0651eed | 2012-03-13 11:35:20 +0530 | [diff] [blame] | 222 | .enable_time_us = 230, |
Jorge Eduardo Candelaria | a320e3c | 2011-05-16 18:35:03 -0500 | [diff] [blame] | 223 | }, |
| 224 | { |
Laxman Dewangan | 33a6943 | 2012-05-19 20:04:06 +0530 | [diff] [blame] | 225 | .name = "ldo7", |
Laxman Dewangan | 7d38a3c | 2012-01-20 16:36:22 +0530 | [diff] [blame] | 226 | .n_voltages = 24, |
Laxman Dewangan | 0651eed | 2012-03-13 11:35:20 +0530 | [diff] [blame] | 227 | .enable_time_us = 230, |
Jorge Eduardo Candelaria | a320e3c | 2011-05-16 18:35:03 -0500 | [diff] [blame] | 228 | }, |
| 229 | { |
Laxman Dewangan | 33a6943 | 2012-05-19 20:04:06 +0530 | [diff] [blame] | 230 | .name = "ldo8", |
Laxman Dewangan | 7d38a3c | 2012-01-20 16:36:22 +0530 | [diff] [blame] | 231 | .n_voltages = 24, |
Laxman Dewangan | 0651eed | 2012-03-13 11:35:20 +0530 | [diff] [blame] | 232 | .enable_time_us = 230, |
Jorge Eduardo Candelaria | a320e3c | 2011-05-16 18:35:03 -0500 | [diff] [blame] | 233 | }, |
| 234 | }; |
| 235 | |
Laxman Dewangan | 1e0c66f | 2012-01-28 15:07:57 +0530 | [diff] [blame] | 236 | #define EXT_CONTROL_REG_BITS(id, regs_offs, bits) (((regs_offs) << 8) | (bits)) |
| 237 | static unsigned int tps65910_ext_sleep_control[] = { |
| 238 | 0, |
| 239 | EXT_CONTROL_REG_BITS(VIO, 1, 0), |
| 240 | EXT_CONTROL_REG_BITS(VDD1, 1, 1), |
| 241 | EXT_CONTROL_REG_BITS(VDD2, 1, 2), |
| 242 | EXT_CONTROL_REG_BITS(VDD3, 1, 3), |
| 243 | EXT_CONTROL_REG_BITS(VDIG1, 0, 1), |
| 244 | EXT_CONTROL_REG_BITS(VDIG2, 0, 2), |
| 245 | EXT_CONTROL_REG_BITS(VPLL, 0, 6), |
| 246 | EXT_CONTROL_REG_BITS(VDAC, 0, 7), |
| 247 | EXT_CONTROL_REG_BITS(VAUX1, 0, 3), |
| 248 | EXT_CONTROL_REG_BITS(VAUX2, 0, 4), |
| 249 | EXT_CONTROL_REG_BITS(VAUX33, 0, 5), |
| 250 | EXT_CONTROL_REG_BITS(VMMC, 0, 0), |
| 251 | }; |
| 252 | |
| 253 | static unsigned int tps65911_ext_sleep_control[] = { |
| 254 | 0, |
| 255 | EXT_CONTROL_REG_BITS(VIO, 1, 0), |
| 256 | EXT_CONTROL_REG_BITS(VDD1, 1, 1), |
| 257 | EXT_CONTROL_REG_BITS(VDD2, 1, 2), |
| 258 | EXT_CONTROL_REG_BITS(VDDCTRL, 1, 3), |
| 259 | EXT_CONTROL_REG_BITS(LDO1, 0, 1), |
| 260 | EXT_CONTROL_REG_BITS(LDO2, 0, 2), |
| 261 | EXT_CONTROL_REG_BITS(LDO3, 0, 7), |
| 262 | EXT_CONTROL_REG_BITS(LDO4, 0, 6), |
| 263 | EXT_CONTROL_REG_BITS(LDO5, 0, 3), |
| 264 | EXT_CONTROL_REG_BITS(LDO6, 0, 0), |
| 265 | EXT_CONTROL_REG_BITS(LDO7, 0, 5), |
| 266 | EXT_CONTROL_REG_BITS(LDO8, 0, 4), |
| 267 | }; |
| 268 | |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 269 | struct tps65910_reg { |
Axel Lin | 39aa9b6 | 2011-07-11 09:57:43 +0800 | [diff] [blame] | 270 | struct regulator_desc *desc; |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 271 | struct tps65910 *mfd; |
Axel Lin | 39aa9b6 | 2011-07-11 09:57:43 +0800 | [diff] [blame] | 272 | struct regulator_dev **rdev; |
| 273 | struct tps_info **info; |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 274 | struct mutex mutex; |
Axel Lin | 39aa9b6 | 2011-07-11 09:57:43 +0800 | [diff] [blame] | 275 | int num_regulators; |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 276 | int mode; |
Jorge Eduardo Candelaria | a320e3c | 2011-05-16 18:35:03 -0500 | [diff] [blame] | 277 | int (*get_ctrl_reg)(int); |
Laxman Dewangan | 1e0c66f | 2012-01-28 15:07:57 +0530 | [diff] [blame] | 278 | unsigned int *ext_sleep_control; |
| 279 | unsigned int board_ext_control[TPS65910_NUM_REGS]; |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 280 | }; |
| 281 | |
| 282 | static inline int tps65910_read(struct tps65910_reg *pmic, u8 reg) |
| 283 | { |
Rhyland Klein | 3f7e827 | 2012-05-08 11:42:38 -0700 | [diff] [blame] | 284 | unsigned int val; |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 285 | int err; |
| 286 | |
Rhyland Klein | 3f7e827 | 2012-05-08 11:42:38 -0700 | [diff] [blame] | 287 | err = tps65910_reg_read(pmic->mfd, reg, &val); |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 288 | if (err) |
| 289 | return err; |
| 290 | |
| 291 | return val; |
| 292 | } |
| 293 | |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 294 | static int tps65910_modify_bits(struct tps65910_reg *pmic, u8 reg, |
| 295 | u8 set_mask, u8 clear_mask) |
| 296 | { |
| 297 | int err, data; |
| 298 | |
| 299 | mutex_lock(&pmic->mutex); |
| 300 | |
| 301 | data = tps65910_read(pmic, reg); |
| 302 | if (data < 0) { |
| 303 | dev_err(pmic->mfd->dev, "Read from reg 0x%x failed\n", reg); |
| 304 | err = data; |
| 305 | goto out; |
| 306 | } |
| 307 | |
| 308 | data &= ~clear_mask; |
| 309 | data |= set_mask; |
Rhyland Klein | 3f7e827 | 2012-05-08 11:42:38 -0700 | [diff] [blame] | 310 | err = tps65910_reg_write(pmic->mfd, reg, data); |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 311 | if (err) |
| 312 | dev_err(pmic->mfd->dev, "Write for reg 0x%x failed\n", reg); |
| 313 | |
| 314 | out: |
| 315 | mutex_unlock(&pmic->mutex); |
| 316 | return err; |
| 317 | } |
| 318 | |
Rhyland Klein | 3f7e827 | 2012-05-08 11:42:38 -0700 | [diff] [blame] | 319 | static int tps65910_reg_read_locked(struct tps65910_reg *pmic, u8 reg) |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 320 | { |
| 321 | int data; |
| 322 | |
| 323 | mutex_lock(&pmic->mutex); |
| 324 | |
| 325 | data = tps65910_read(pmic, reg); |
| 326 | if (data < 0) |
| 327 | dev_err(pmic->mfd->dev, "Read from reg 0x%x failed\n", reg); |
| 328 | |
| 329 | mutex_unlock(&pmic->mutex); |
| 330 | return data; |
| 331 | } |
| 332 | |
Rhyland Klein | 3f7e827 | 2012-05-08 11:42:38 -0700 | [diff] [blame] | 333 | static int tps65910_reg_write_locked(struct tps65910_reg *pmic, u8 reg, u8 val) |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 334 | { |
| 335 | int err; |
| 336 | |
| 337 | mutex_lock(&pmic->mutex); |
| 338 | |
Rhyland Klein | 3f7e827 | 2012-05-08 11:42:38 -0700 | [diff] [blame] | 339 | err = tps65910_reg_write(pmic->mfd, reg, val); |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 340 | if (err < 0) |
| 341 | dev_err(pmic->mfd->dev, "Write for reg 0x%x failed\n", reg); |
| 342 | |
| 343 | mutex_unlock(&pmic->mutex); |
| 344 | return err; |
| 345 | } |
| 346 | |
| 347 | static int tps65910_get_ctrl_register(int id) |
| 348 | { |
| 349 | switch (id) { |
| 350 | case TPS65910_REG_VRTC: |
| 351 | return TPS65910_VRTC; |
| 352 | case TPS65910_REG_VIO: |
| 353 | return TPS65910_VIO; |
| 354 | case TPS65910_REG_VDD1: |
| 355 | return TPS65910_VDD1; |
| 356 | case TPS65910_REG_VDD2: |
| 357 | return TPS65910_VDD2; |
| 358 | case TPS65910_REG_VDD3: |
| 359 | return TPS65910_VDD3; |
| 360 | case TPS65910_REG_VDIG1: |
| 361 | return TPS65910_VDIG1; |
| 362 | case TPS65910_REG_VDIG2: |
| 363 | return TPS65910_VDIG2; |
| 364 | case TPS65910_REG_VPLL: |
| 365 | return TPS65910_VPLL; |
| 366 | case TPS65910_REG_VDAC: |
| 367 | return TPS65910_VDAC; |
| 368 | case TPS65910_REG_VAUX1: |
| 369 | return TPS65910_VAUX1; |
| 370 | case TPS65910_REG_VAUX2: |
| 371 | return TPS65910_VAUX2; |
| 372 | case TPS65910_REG_VAUX33: |
| 373 | return TPS65910_VAUX33; |
| 374 | case TPS65910_REG_VMMC: |
| 375 | return TPS65910_VMMC; |
| 376 | default: |
| 377 | return -EINVAL; |
| 378 | } |
| 379 | } |
| 380 | |
Jorge Eduardo Candelaria | a320e3c | 2011-05-16 18:35:03 -0500 | [diff] [blame] | 381 | static int tps65911_get_ctrl_register(int id) |
| 382 | { |
| 383 | switch (id) { |
| 384 | case TPS65910_REG_VRTC: |
| 385 | return TPS65910_VRTC; |
| 386 | case TPS65910_REG_VIO: |
| 387 | return TPS65910_VIO; |
| 388 | case TPS65910_REG_VDD1: |
| 389 | return TPS65910_VDD1; |
| 390 | case TPS65910_REG_VDD2: |
| 391 | return TPS65910_VDD2; |
| 392 | case TPS65911_REG_VDDCTRL: |
| 393 | return TPS65911_VDDCTRL; |
| 394 | case TPS65911_REG_LDO1: |
| 395 | return TPS65911_LDO1; |
| 396 | case TPS65911_REG_LDO2: |
| 397 | return TPS65911_LDO2; |
| 398 | case TPS65911_REG_LDO3: |
| 399 | return TPS65911_LDO3; |
| 400 | case TPS65911_REG_LDO4: |
| 401 | return TPS65911_LDO4; |
| 402 | case TPS65911_REG_LDO5: |
| 403 | return TPS65911_LDO5; |
| 404 | case TPS65911_REG_LDO6: |
| 405 | return TPS65911_LDO6; |
| 406 | case TPS65911_REG_LDO7: |
| 407 | return TPS65911_LDO7; |
| 408 | case TPS65911_REG_LDO8: |
| 409 | return TPS65911_LDO8; |
| 410 | default: |
| 411 | return -EINVAL; |
| 412 | } |
| 413 | } |
| 414 | |
Laxman Dewangan | 0651eed | 2012-03-13 11:35:20 +0530 | [diff] [blame] | 415 | static int tps65910_enable_time(struct regulator_dev *dev) |
| 416 | { |
| 417 | struct tps65910_reg *pmic = rdev_get_drvdata(dev); |
| 418 | int id = rdev_get_id(dev); |
| 419 | return pmic->info[id]->enable_time_us; |
| 420 | } |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 421 | |
| 422 | static int tps65910_set_mode(struct regulator_dev *dev, unsigned int mode) |
| 423 | { |
| 424 | struct tps65910_reg *pmic = rdev_get_drvdata(dev); |
| 425 | struct tps65910 *mfd = pmic->mfd; |
| 426 | int reg, value, id = rdev_get_id(dev); |
Jorge Eduardo Candelaria | a320e3c | 2011-05-16 18:35:03 -0500 | [diff] [blame] | 427 | |
| 428 | reg = pmic->get_ctrl_reg(id); |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 429 | if (reg < 0) |
| 430 | return reg; |
| 431 | |
| 432 | switch (mode) { |
| 433 | case REGULATOR_MODE_NORMAL: |
| 434 | return tps65910_modify_bits(pmic, reg, LDO_ST_ON_BIT, |
| 435 | LDO_ST_MODE_BIT); |
| 436 | case REGULATOR_MODE_IDLE: |
| 437 | value = LDO_ST_ON_BIT | LDO_ST_MODE_BIT; |
Rhyland Klein | 3f7e827 | 2012-05-08 11:42:38 -0700 | [diff] [blame] | 438 | return tps65910_reg_set_bits(mfd, reg, value); |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 439 | case REGULATOR_MODE_STANDBY: |
Rhyland Klein | 3f7e827 | 2012-05-08 11:42:38 -0700 | [diff] [blame] | 440 | return tps65910_reg_clear_bits(mfd, reg, LDO_ST_ON_BIT); |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 441 | } |
| 442 | |
| 443 | return -EINVAL; |
| 444 | } |
| 445 | |
| 446 | static unsigned int tps65910_get_mode(struct regulator_dev *dev) |
| 447 | { |
| 448 | struct tps65910_reg *pmic = rdev_get_drvdata(dev); |
| 449 | int reg, value, id = rdev_get_id(dev); |
| 450 | |
Jorge Eduardo Candelaria | a320e3c | 2011-05-16 18:35:03 -0500 | [diff] [blame] | 451 | reg = pmic->get_ctrl_reg(id); |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 452 | if (reg < 0) |
| 453 | return reg; |
| 454 | |
Rhyland Klein | 3f7e827 | 2012-05-08 11:42:38 -0700 | [diff] [blame] | 455 | value = tps65910_reg_read_locked(pmic, reg); |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 456 | if (value < 0) |
| 457 | return value; |
| 458 | |
Axel Lin | 5859939 | 2012-03-13 07:15:27 +0800 | [diff] [blame] | 459 | if (!(value & LDO_ST_ON_BIT)) |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 460 | return REGULATOR_MODE_STANDBY; |
| 461 | else if (value & LDO_ST_MODE_BIT) |
| 462 | return REGULATOR_MODE_IDLE; |
| 463 | else |
| 464 | return REGULATOR_MODE_NORMAL; |
| 465 | } |
| 466 | |
Laxman Dewangan | 18039e0 | 2012-03-14 13:00:58 +0530 | [diff] [blame] | 467 | static int tps65910_get_voltage_dcdc_sel(struct regulator_dev *dev) |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 468 | { |
| 469 | struct tps65910_reg *pmic = rdev_get_drvdata(dev); |
Laxman Dewangan | 18039e0 | 2012-03-14 13:00:58 +0530 | [diff] [blame] | 470 | int id = rdev_get_id(dev); |
Jorge Eduardo Candelaria | a320e3c | 2011-05-16 18:35:03 -0500 | [diff] [blame] | 471 | int opvsel = 0, srvsel = 0, vselmax = 0, mult = 0, sr = 0; |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 472 | |
| 473 | switch (id) { |
| 474 | case TPS65910_REG_VDD1: |
Rhyland Klein | 3f7e827 | 2012-05-08 11:42:38 -0700 | [diff] [blame] | 475 | opvsel = tps65910_reg_read_locked(pmic, TPS65910_VDD1_OP); |
| 476 | mult = tps65910_reg_read_locked(pmic, TPS65910_VDD1); |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 477 | mult = (mult & VDD1_VGAIN_SEL_MASK) >> VDD1_VGAIN_SEL_SHIFT; |
Rhyland Klein | 3f7e827 | 2012-05-08 11:42:38 -0700 | [diff] [blame] | 478 | srvsel = tps65910_reg_read_locked(pmic, TPS65910_VDD1_SR); |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 479 | sr = opvsel & VDD1_OP_CMD_MASK; |
| 480 | opvsel &= VDD1_OP_SEL_MASK; |
| 481 | srvsel &= VDD1_SR_SEL_MASK; |
Jorge Eduardo Candelaria | a320e3c | 2011-05-16 18:35:03 -0500 | [diff] [blame] | 482 | vselmax = 75; |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 483 | break; |
| 484 | case TPS65910_REG_VDD2: |
Rhyland Klein | 3f7e827 | 2012-05-08 11:42:38 -0700 | [diff] [blame] | 485 | opvsel = tps65910_reg_read_locked(pmic, TPS65910_VDD2_OP); |
| 486 | mult = tps65910_reg_read_locked(pmic, TPS65910_VDD2); |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 487 | mult = (mult & VDD2_VGAIN_SEL_MASK) >> VDD2_VGAIN_SEL_SHIFT; |
Rhyland Klein | 3f7e827 | 2012-05-08 11:42:38 -0700 | [diff] [blame] | 488 | srvsel = tps65910_reg_read_locked(pmic, TPS65910_VDD2_SR); |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 489 | sr = opvsel & VDD2_OP_CMD_MASK; |
| 490 | opvsel &= VDD2_OP_SEL_MASK; |
| 491 | srvsel &= VDD2_SR_SEL_MASK; |
Jorge Eduardo Candelaria | a320e3c | 2011-05-16 18:35:03 -0500 | [diff] [blame] | 492 | vselmax = 75; |
| 493 | break; |
| 494 | case TPS65911_REG_VDDCTRL: |
Rhyland Klein | 3f7e827 | 2012-05-08 11:42:38 -0700 | [diff] [blame] | 495 | opvsel = tps65910_reg_read_locked(pmic, TPS65911_VDDCTRL_OP); |
| 496 | srvsel = tps65910_reg_read_locked(pmic, TPS65911_VDDCTRL_SR); |
Jorge Eduardo Candelaria | a320e3c | 2011-05-16 18:35:03 -0500 | [diff] [blame] | 497 | sr = opvsel & VDDCTRL_OP_CMD_MASK; |
| 498 | opvsel &= VDDCTRL_OP_SEL_MASK; |
| 499 | srvsel &= VDDCTRL_SR_SEL_MASK; |
| 500 | vselmax = 64; |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 501 | break; |
| 502 | } |
| 503 | |
| 504 | /* multiplier 0 == 1 but 2,3 normal */ |
| 505 | if (!mult) |
| 506 | mult=1; |
| 507 | |
| 508 | if (sr) { |
Jorge Eduardo Candelaria | a320e3c | 2011-05-16 18:35:03 -0500 | [diff] [blame] | 509 | /* normalise to valid range */ |
| 510 | if (srvsel < 3) |
| 511 | srvsel = 3; |
| 512 | if (srvsel > vselmax) |
| 513 | srvsel = vselmax; |
Laxman Dewangan | 18039e0 | 2012-03-14 13:00:58 +0530 | [diff] [blame] | 514 | return srvsel - 3; |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 515 | } else { |
| 516 | |
Jorge Eduardo Candelaria | a320e3c | 2011-05-16 18:35:03 -0500 | [diff] [blame] | 517 | /* normalise to valid range*/ |
| 518 | if (opvsel < 3) |
| 519 | opvsel = 3; |
| 520 | if (opvsel > vselmax) |
| 521 | opvsel = vselmax; |
Laxman Dewangan | 18039e0 | 2012-03-14 13:00:58 +0530 | [diff] [blame] | 522 | return opvsel - 3; |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 523 | } |
Laxman Dewangan | 18039e0 | 2012-03-14 13:00:58 +0530 | [diff] [blame] | 524 | return -EINVAL; |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 525 | } |
| 526 | |
Axel Lin | 1f904fd | 2012-05-09 09:22:47 +0800 | [diff] [blame] | 527 | static int tps65910_get_voltage_sel(struct regulator_dev *dev) |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 528 | { |
| 529 | struct tps65910_reg *pmic = rdev_get_drvdata(dev); |
Axel Lin | 1f904fd | 2012-05-09 09:22:47 +0800 | [diff] [blame] | 530 | int reg, value, id = rdev_get_id(dev); |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 531 | |
Jorge Eduardo Candelaria | a320e3c | 2011-05-16 18:35:03 -0500 | [diff] [blame] | 532 | reg = pmic->get_ctrl_reg(id); |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 533 | if (reg < 0) |
| 534 | return reg; |
| 535 | |
Rhyland Klein | 3f7e827 | 2012-05-08 11:42:38 -0700 | [diff] [blame] | 536 | value = tps65910_reg_read_locked(pmic, reg); |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 537 | if (value < 0) |
| 538 | return value; |
| 539 | |
| 540 | switch (id) { |
| 541 | case TPS65910_REG_VIO: |
| 542 | case TPS65910_REG_VDIG1: |
| 543 | case TPS65910_REG_VDIG2: |
| 544 | case TPS65910_REG_VPLL: |
| 545 | case TPS65910_REG_VDAC: |
| 546 | case TPS65910_REG_VAUX1: |
| 547 | case TPS65910_REG_VAUX2: |
| 548 | case TPS65910_REG_VAUX33: |
| 549 | case TPS65910_REG_VMMC: |
| 550 | value &= LDO_SEL_MASK; |
| 551 | value >>= LDO_SEL_SHIFT; |
| 552 | break; |
| 553 | default: |
| 554 | return -EINVAL; |
| 555 | } |
| 556 | |
Axel Lin | 1f904fd | 2012-05-09 09:22:47 +0800 | [diff] [blame] | 557 | return value; |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 558 | } |
| 559 | |
| 560 | static int tps65910_get_voltage_vdd3(struct regulator_dev *dev) |
| 561 | { |
Axel Lin | d9fe28f | 2012-06-21 18:48:00 +0800 | [diff] [blame^] | 562 | return dev->desc->volt_table[0]; |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 563 | } |
| 564 | |
Axel Lin | 1f904fd | 2012-05-09 09:22:47 +0800 | [diff] [blame] | 565 | static int tps65911_get_voltage_sel(struct regulator_dev *dev) |
Jorge Eduardo Candelaria | a320e3c | 2011-05-16 18:35:03 -0500 | [diff] [blame] | 566 | { |
| 567 | struct tps65910_reg *pmic = rdev_get_drvdata(dev); |
Axel Lin | 1f904fd | 2012-05-09 09:22:47 +0800 | [diff] [blame] | 568 | int id = rdev_get_id(dev); |
Jorge Eduardo Candelaria | a320e3c | 2011-05-16 18:35:03 -0500 | [diff] [blame] | 569 | u8 value, reg; |
| 570 | |
| 571 | reg = pmic->get_ctrl_reg(id); |
| 572 | |
Rhyland Klein | 3f7e827 | 2012-05-08 11:42:38 -0700 | [diff] [blame] | 573 | value = tps65910_reg_read_locked(pmic, reg); |
Jorge Eduardo Candelaria | a320e3c | 2011-05-16 18:35:03 -0500 | [diff] [blame] | 574 | |
| 575 | switch (id) { |
| 576 | case TPS65911_REG_LDO1: |
| 577 | case TPS65911_REG_LDO2: |
| 578 | case TPS65911_REG_LDO4: |
| 579 | value &= LDO1_SEL_MASK; |
| 580 | value >>= LDO_SEL_SHIFT; |
Jorge Eduardo Candelaria | a320e3c | 2011-05-16 18:35:03 -0500 | [diff] [blame] | 581 | break; |
| 582 | case TPS65911_REG_LDO3: |
| 583 | case TPS65911_REG_LDO5: |
| 584 | case TPS65911_REG_LDO6: |
| 585 | case TPS65911_REG_LDO7: |
| 586 | case TPS65911_REG_LDO8: |
| 587 | value &= LDO3_SEL_MASK; |
| 588 | value >>= LDO_SEL_SHIFT; |
Jorge Eduardo Candelaria | a320e3c | 2011-05-16 18:35:03 -0500 | [diff] [blame] | 589 | break; |
| 590 | case TPS65910_REG_VIO: |
Laxman Dewangan | e882eae | 2012-02-17 18:56:11 +0530 | [diff] [blame] | 591 | value &= LDO_SEL_MASK; |
| 592 | value >>= LDO_SEL_SHIFT; |
Axel Lin | 1f904fd | 2012-05-09 09:22:47 +0800 | [diff] [blame] | 593 | break; |
Jorge Eduardo Candelaria | a320e3c | 2011-05-16 18:35:03 -0500 | [diff] [blame] | 594 | default: |
| 595 | return -EINVAL; |
| 596 | } |
| 597 | |
Axel Lin | 1f904fd | 2012-05-09 09:22:47 +0800 | [diff] [blame] | 598 | return value; |
Jorge Eduardo Candelaria | a320e3c | 2011-05-16 18:35:03 -0500 | [diff] [blame] | 599 | } |
| 600 | |
Axel Lin | 94732b9 | 2012-03-09 10:22:20 +0800 | [diff] [blame] | 601 | static int tps65910_set_voltage_dcdc_sel(struct regulator_dev *dev, |
| 602 | unsigned selector) |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 603 | { |
| 604 | struct tps65910_reg *pmic = rdev_get_drvdata(dev); |
| 605 | int id = rdev_get_id(dev), vsel; |
Jorge Eduardo Candelaria | a320e3c | 2011-05-16 18:35:03 -0500 | [diff] [blame] | 606 | int dcdc_mult = 0; |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 607 | |
Jorge Eduardo Candelaria | a320e3c | 2011-05-16 18:35:03 -0500 | [diff] [blame] | 608 | switch (id) { |
| 609 | case TPS65910_REG_VDD1: |
Afzal Mohammed | 780dc9b | 2011-11-08 18:54:10 +0530 | [diff] [blame] | 610 | dcdc_mult = (selector / VDD1_2_NUM_VOLT_FINE) + 1; |
Jorge Eduardo Candelaria | a320e3c | 2011-05-16 18:35:03 -0500 | [diff] [blame] | 611 | if (dcdc_mult == 1) |
| 612 | dcdc_mult--; |
Afzal Mohammed | 780dc9b | 2011-11-08 18:54:10 +0530 | [diff] [blame] | 613 | vsel = (selector % VDD1_2_NUM_VOLT_FINE) + 3; |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 614 | |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 615 | tps65910_modify_bits(pmic, TPS65910_VDD1, |
| 616 | (dcdc_mult << VDD1_VGAIN_SEL_SHIFT), |
| 617 | VDD1_VGAIN_SEL_MASK); |
Rhyland Klein | 3f7e827 | 2012-05-08 11:42:38 -0700 | [diff] [blame] | 618 | tps65910_reg_write_locked(pmic, TPS65910_VDD1_OP, vsel); |
Jorge Eduardo Candelaria | a320e3c | 2011-05-16 18:35:03 -0500 | [diff] [blame] | 619 | break; |
| 620 | case TPS65910_REG_VDD2: |
Afzal Mohammed | 780dc9b | 2011-11-08 18:54:10 +0530 | [diff] [blame] | 621 | dcdc_mult = (selector / VDD1_2_NUM_VOLT_FINE) + 1; |
Jorge Eduardo Candelaria | a320e3c | 2011-05-16 18:35:03 -0500 | [diff] [blame] | 622 | if (dcdc_mult == 1) |
| 623 | dcdc_mult--; |
Afzal Mohammed | 780dc9b | 2011-11-08 18:54:10 +0530 | [diff] [blame] | 624 | vsel = (selector % VDD1_2_NUM_VOLT_FINE) + 3; |
Jorge Eduardo Candelaria | a320e3c | 2011-05-16 18:35:03 -0500 | [diff] [blame] | 625 | |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 626 | tps65910_modify_bits(pmic, TPS65910_VDD2, |
| 627 | (dcdc_mult << VDD2_VGAIN_SEL_SHIFT), |
| 628 | VDD1_VGAIN_SEL_MASK); |
Rhyland Klein | 3f7e827 | 2012-05-08 11:42:38 -0700 | [diff] [blame] | 629 | tps65910_reg_write_locked(pmic, TPS65910_VDD2_OP, vsel); |
Jorge Eduardo Candelaria | a320e3c | 2011-05-16 18:35:03 -0500 | [diff] [blame] | 630 | break; |
| 631 | case TPS65911_REG_VDDCTRL: |
Laxman Dewangan | c4632ae | 2012-03-07 16:39:05 +0530 | [diff] [blame] | 632 | vsel = selector + 3; |
Rhyland Klein | 3f7e827 | 2012-05-08 11:42:38 -0700 | [diff] [blame] | 633 | tps65910_reg_write_locked(pmic, TPS65911_VDDCTRL_OP, vsel); |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 634 | } |
| 635 | |
| 636 | return 0; |
| 637 | } |
| 638 | |
Axel Lin | 94732b9 | 2012-03-09 10:22:20 +0800 | [diff] [blame] | 639 | static int tps65910_set_voltage_sel(struct regulator_dev *dev, |
| 640 | unsigned selector) |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 641 | { |
| 642 | struct tps65910_reg *pmic = rdev_get_drvdata(dev); |
| 643 | int reg, id = rdev_get_id(dev); |
| 644 | |
Jorge Eduardo Candelaria | a320e3c | 2011-05-16 18:35:03 -0500 | [diff] [blame] | 645 | reg = pmic->get_ctrl_reg(id); |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 646 | if (reg < 0) |
| 647 | return reg; |
| 648 | |
| 649 | switch (id) { |
| 650 | case TPS65910_REG_VIO: |
| 651 | case TPS65910_REG_VDIG1: |
| 652 | case TPS65910_REG_VDIG2: |
| 653 | case TPS65910_REG_VPLL: |
| 654 | case TPS65910_REG_VDAC: |
| 655 | case TPS65910_REG_VAUX1: |
| 656 | case TPS65910_REG_VAUX2: |
| 657 | case TPS65910_REG_VAUX33: |
| 658 | case TPS65910_REG_VMMC: |
| 659 | return tps65910_modify_bits(pmic, reg, |
| 660 | (selector << LDO_SEL_SHIFT), LDO_SEL_MASK); |
| 661 | } |
| 662 | |
| 663 | return -EINVAL; |
| 664 | } |
| 665 | |
Axel Lin | 94732b9 | 2012-03-09 10:22:20 +0800 | [diff] [blame] | 666 | static int tps65911_set_voltage_sel(struct regulator_dev *dev, |
| 667 | unsigned selector) |
Jorge Eduardo Candelaria | a320e3c | 2011-05-16 18:35:03 -0500 | [diff] [blame] | 668 | { |
| 669 | struct tps65910_reg *pmic = rdev_get_drvdata(dev); |
| 670 | int reg, id = rdev_get_id(dev); |
| 671 | |
| 672 | reg = pmic->get_ctrl_reg(id); |
| 673 | if (reg < 0) |
| 674 | return reg; |
| 675 | |
| 676 | switch (id) { |
| 677 | case TPS65911_REG_LDO1: |
| 678 | case TPS65911_REG_LDO2: |
| 679 | case TPS65911_REG_LDO4: |
| 680 | return tps65910_modify_bits(pmic, reg, |
| 681 | (selector << LDO_SEL_SHIFT), LDO1_SEL_MASK); |
| 682 | case TPS65911_REG_LDO3: |
| 683 | case TPS65911_REG_LDO5: |
| 684 | case TPS65911_REG_LDO6: |
| 685 | case TPS65911_REG_LDO7: |
| 686 | case TPS65911_REG_LDO8: |
Jorge Eduardo Candelaria | a320e3c | 2011-05-16 18:35:03 -0500 | [diff] [blame] | 687 | return tps65910_modify_bits(pmic, reg, |
| 688 | (selector << LDO_SEL_SHIFT), LDO3_SEL_MASK); |
Laxman Dewangan | e882eae | 2012-02-17 18:56:11 +0530 | [diff] [blame] | 689 | case TPS65910_REG_VIO: |
| 690 | return tps65910_modify_bits(pmic, reg, |
| 691 | (selector << LDO_SEL_SHIFT), LDO_SEL_MASK); |
Jorge Eduardo Candelaria | a320e3c | 2011-05-16 18:35:03 -0500 | [diff] [blame] | 692 | } |
| 693 | |
| 694 | return -EINVAL; |
| 695 | } |
| 696 | |
| 697 | |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 698 | static int tps65910_list_voltage_dcdc(struct regulator_dev *dev, |
| 699 | unsigned selector) |
| 700 | { |
Jorge Eduardo Candelaria | a320e3c | 2011-05-16 18:35:03 -0500 | [diff] [blame] | 701 | int volt, mult = 1, id = rdev_get_id(dev); |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 702 | |
Jorge Eduardo Candelaria | a320e3c | 2011-05-16 18:35:03 -0500 | [diff] [blame] | 703 | switch (id) { |
| 704 | case TPS65910_REG_VDD1: |
| 705 | case TPS65910_REG_VDD2: |
Afzal Mohammed | 780dc9b | 2011-11-08 18:54:10 +0530 | [diff] [blame] | 706 | mult = (selector / VDD1_2_NUM_VOLT_FINE) + 1; |
Jorge Eduardo Candelaria | a320e3c | 2011-05-16 18:35:03 -0500 | [diff] [blame] | 707 | volt = VDD1_2_MIN_VOLT + |
Afzal Mohammed | 780dc9b | 2011-11-08 18:54:10 +0530 | [diff] [blame] | 708 | (selector % VDD1_2_NUM_VOLT_FINE) * VDD1_2_OFFSET; |
Axel Lin | d04156b | 2011-07-10 21:44:09 +0800 | [diff] [blame] | 709 | break; |
Jorge Eduardo Candelaria | a320e3c | 2011-05-16 18:35:03 -0500 | [diff] [blame] | 710 | case TPS65911_REG_VDDCTRL: |
| 711 | volt = VDDCTRL_MIN_VOLT + (selector * VDDCTRL_OFFSET); |
Axel Lin | d04156b | 2011-07-10 21:44:09 +0800 | [diff] [blame] | 712 | break; |
| 713 | default: |
| 714 | BUG(); |
| 715 | return -EINVAL; |
Jorge Eduardo Candelaria | a320e3c | 2011-05-16 18:35:03 -0500 | [diff] [blame] | 716 | } |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 717 | |
| 718 | return volt * 100 * mult; |
| 719 | } |
| 720 | |
Jorge Eduardo Candelaria | a320e3c | 2011-05-16 18:35:03 -0500 | [diff] [blame] | 721 | static int tps65911_list_voltage(struct regulator_dev *dev, unsigned selector) |
| 722 | { |
| 723 | struct tps65910_reg *pmic = rdev_get_drvdata(dev); |
| 724 | int step_mv = 0, id = rdev_get_id(dev); |
| 725 | |
| 726 | switch(id) { |
| 727 | case TPS65911_REG_LDO1: |
| 728 | case TPS65911_REG_LDO2: |
| 729 | case TPS65911_REG_LDO4: |
| 730 | /* The first 5 values of the selector correspond to 1V */ |
| 731 | if (selector < 5) |
| 732 | selector = 0; |
| 733 | else |
| 734 | selector -= 4; |
| 735 | |
| 736 | step_mv = 50; |
| 737 | break; |
| 738 | case TPS65911_REG_LDO3: |
| 739 | case TPS65911_REG_LDO5: |
| 740 | case TPS65911_REG_LDO6: |
| 741 | case TPS65911_REG_LDO7: |
| 742 | case TPS65911_REG_LDO8: |
| 743 | /* The first 3 values of the selector correspond to 1V */ |
| 744 | if (selector < 3) |
| 745 | selector = 0; |
| 746 | else |
| 747 | selector -= 2; |
| 748 | |
| 749 | step_mv = 100; |
| 750 | break; |
| 751 | case TPS65910_REG_VIO: |
Axel Lin | d9fe28f | 2012-06-21 18:48:00 +0800 | [diff] [blame^] | 752 | return pmic->info[id]->voltage_table[selector]; |
Jorge Eduardo Candelaria | a320e3c | 2011-05-16 18:35:03 -0500 | [diff] [blame] | 753 | default: |
| 754 | return -EINVAL; |
| 755 | } |
| 756 | |
| 757 | return (LDO_MIN_VOLT + selector * step_mv) * 1000; |
| 758 | } |
| 759 | |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 760 | /* Regulator ops (except VRTC) */ |
| 761 | static struct regulator_ops tps65910_ops_dcdc = { |
Axel Lin | a40a9c4 | 2012-04-17 14:34:46 +0800 | [diff] [blame] | 762 | .is_enabled = regulator_is_enabled_regmap, |
| 763 | .enable = regulator_enable_regmap, |
| 764 | .disable = regulator_disable_regmap, |
Laxman Dewangan | 0651eed | 2012-03-13 11:35:20 +0530 | [diff] [blame] | 765 | .enable_time = tps65910_enable_time, |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 766 | .set_mode = tps65910_set_mode, |
| 767 | .get_mode = tps65910_get_mode, |
Laxman Dewangan | 18039e0 | 2012-03-14 13:00:58 +0530 | [diff] [blame] | 768 | .get_voltage_sel = tps65910_get_voltage_dcdc_sel, |
Axel Lin | 94732b9 | 2012-03-09 10:22:20 +0800 | [diff] [blame] | 769 | .set_voltage_sel = tps65910_set_voltage_dcdc_sel, |
Axel Lin | 01bc3a1 | 2012-06-20 22:40:10 +0800 | [diff] [blame] | 770 | .set_voltage_time_sel = regulator_set_voltage_time_sel, |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 771 | .list_voltage = tps65910_list_voltage_dcdc, |
| 772 | }; |
| 773 | |
| 774 | static struct regulator_ops tps65910_ops_vdd3 = { |
Axel Lin | a40a9c4 | 2012-04-17 14:34:46 +0800 | [diff] [blame] | 775 | .is_enabled = regulator_is_enabled_regmap, |
| 776 | .enable = regulator_enable_regmap, |
| 777 | .disable = regulator_disable_regmap, |
Laxman Dewangan | 0651eed | 2012-03-13 11:35:20 +0530 | [diff] [blame] | 778 | .enable_time = tps65910_enable_time, |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 779 | .set_mode = tps65910_set_mode, |
| 780 | .get_mode = tps65910_get_mode, |
| 781 | .get_voltage = tps65910_get_voltage_vdd3, |
Axel Lin | d9fe28f | 2012-06-21 18:48:00 +0800 | [diff] [blame^] | 782 | .list_voltage = regulator_list_voltage_table, |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 783 | }; |
| 784 | |
| 785 | static struct regulator_ops tps65910_ops = { |
Axel Lin | a40a9c4 | 2012-04-17 14:34:46 +0800 | [diff] [blame] | 786 | .is_enabled = regulator_is_enabled_regmap, |
| 787 | .enable = regulator_enable_regmap, |
| 788 | .disable = regulator_disable_regmap, |
Laxman Dewangan | 0651eed | 2012-03-13 11:35:20 +0530 | [diff] [blame] | 789 | .enable_time = tps65910_enable_time, |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 790 | .set_mode = tps65910_set_mode, |
| 791 | .get_mode = tps65910_get_mode, |
Axel Lin | 1f904fd | 2012-05-09 09:22:47 +0800 | [diff] [blame] | 792 | .get_voltage_sel = tps65910_get_voltage_sel, |
Axel Lin | 94732b9 | 2012-03-09 10:22:20 +0800 | [diff] [blame] | 793 | .set_voltage_sel = tps65910_set_voltage_sel, |
Axel Lin | d9fe28f | 2012-06-21 18:48:00 +0800 | [diff] [blame^] | 794 | .list_voltage = regulator_list_voltage_table, |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 795 | }; |
| 796 | |
Jorge Eduardo Candelaria | a320e3c | 2011-05-16 18:35:03 -0500 | [diff] [blame] | 797 | static struct regulator_ops tps65911_ops = { |
Axel Lin | a40a9c4 | 2012-04-17 14:34:46 +0800 | [diff] [blame] | 798 | .is_enabled = regulator_is_enabled_regmap, |
| 799 | .enable = regulator_enable_regmap, |
| 800 | .disable = regulator_disable_regmap, |
Laxman Dewangan | 0651eed | 2012-03-13 11:35:20 +0530 | [diff] [blame] | 801 | .enable_time = tps65910_enable_time, |
Jorge Eduardo Candelaria | a320e3c | 2011-05-16 18:35:03 -0500 | [diff] [blame] | 802 | .set_mode = tps65910_set_mode, |
| 803 | .get_mode = tps65910_get_mode, |
Axel Lin | 1f904fd | 2012-05-09 09:22:47 +0800 | [diff] [blame] | 804 | .get_voltage_sel = tps65911_get_voltage_sel, |
Axel Lin | 94732b9 | 2012-03-09 10:22:20 +0800 | [diff] [blame] | 805 | .set_voltage_sel = tps65911_set_voltage_sel, |
Jorge Eduardo Candelaria | a320e3c | 2011-05-16 18:35:03 -0500 | [diff] [blame] | 806 | .list_voltage = tps65911_list_voltage, |
| 807 | }; |
| 808 | |
Laxman Dewangan | 1e0c66f | 2012-01-28 15:07:57 +0530 | [diff] [blame] | 809 | static int tps65910_set_ext_sleep_config(struct tps65910_reg *pmic, |
| 810 | int id, int ext_sleep_config) |
| 811 | { |
| 812 | struct tps65910 *mfd = pmic->mfd; |
| 813 | u8 regoffs = (pmic->ext_sleep_control[id] >> 8) & 0xFF; |
| 814 | u8 bit_pos = (1 << pmic->ext_sleep_control[id] & 0xFF); |
| 815 | int ret; |
| 816 | |
| 817 | /* |
| 818 | * Regulator can not be control from multiple external input EN1, EN2 |
| 819 | * and EN3 together. |
| 820 | */ |
| 821 | if (ext_sleep_config & EXT_SLEEP_CONTROL) { |
| 822 | int en_count; |
| 823 | en_count = ((ext_sleep_config & |
| 824 | TPS65910_SLEEP_CONTROL_EXT_INPUT_EN1) != 0); |
| 825 | en_count += ((ext_sleep_config & |
| 826 | TPS65910_SLEEP_CONTROL_EXT_INPUT_EN2) != 0); |
| 827 | en_count += ((ext_sleep_config & |
| 828 | TPS65910_SLEEP_CONTROL_EXT_INPUT_EN3) != 0); |
Laxman Dewangan | f30b071 | 2012-03-07 18:21:49 +0530 | [diff] [blame] | 829 | en_count += ((ext_sleep_config & |
| 830 | TPS65911_SLEEP_CONTROL_EXT_INPUT_SLEEP) != 0); |
Laxman Dewangan | 1e0c66f | 2012-01-28 15:07:57 +0530 | [diff] [blame] | 831 | if (en_count > 1) { |
| 832 | dev_err(mfd->dev, |
| 833 | "External sleep control flag is not proper\n"); |
| 834 | return -EINVAL; |
| 835 | } |
| 836 | } |
| 837 | |
| 838 | pmic->board_ext_control[id] = ext_sleep_config; |
| 839 | |
| 840 | /* External EN1 control */ |
| 841 | if (ext_sleep_config & TPS65910_SLEEP_CONTROL_EXT_INPUT_EN1) |
Rhyland Klein | 3f7e827 | 2012-05-08 11:42:38 -0700 | [diff] [blame] | 842 | ret = tps65910_reg_set_bits(mfd, |
Laxman Dewangan | 1e0c66f | 2012-01-28 15:07:57 +0530 | [diff] [blame] | 843 | TPS65910_EN1_LDO_ASS + regoffs, bit_pos); |
| 844 | else |
Rhyland Klein | 3f7e827 | 2012-05-08 11:42:38 -0700 | [diff] [blame] | 845 | ret = tps65910_reg_clear_bits(mfd, |
Laxman Dewangan | 1e0c66f | 2012-01-28 15:07:57 +0530 | [diff] [blame] | 846 | TPS65910_EN1_LDO_ASS + regoffs, bit_pos); |
| 847 | if (ret < 0) { |
| 848 | dev_err(mfd->dev, |
| 849 | "Error in configuring external control EN1\n"); |
| 850 | return ret; |
| 851 | } |
| 852 | |
| 853 | /* External EN2 control */ |
| 854 | if (ext_sleep_config & TPS65910_SLEEP_CONTROL_EXT_INPUT_EN2) |
Rhyland Klein | 3f7e827 | 2012-05-08 11:42:38 -0700 | [diff] [blame] | 855 | ret = tps65910_reg_set_bits(mfd, |
Laxman Dewangan | 1e0c66f | 2012-01-28 15:07:57 +0530 | [diff] [blame] | 856 | TPS65910_EN2_LDO_ASS + regoffs, bit_pos); |
| 857 | else |
Rhyland Klein | 3f7e827 | 2012-05-08 11:42:38 -0700 | [diff] [blame] | 858 | ret = tps65910_reg_clear_bits(mfd, |
Laxman Dewangan | 1e0c66f | 2012-01-28 15:07:57 +0530 | [diff] [blame] | 859 | TPS65910_EN2_LDO_ASS + regoffs, bit_pos); |
| 860 | if (ret < 0) { |
| 861 | dev_err(mfd->dev, |
| 862 | "Error in configuring external control EN2\n"); |
| 863 | return ret; |
| 864 | } |
| 865 | |
| 866 | /* External EN3 control for TPS65910 LDO only */ |
| 867 | if ((tps65910_chip_id(mfd) == TPS65910) && |
| 868 | (id >= TPS65910_REG_VDIG1)) { |
| 869 | if (ext_sleep_config & TPS65910_SLEEP_CONTROL_EXT_INPUT_EN3) |
Rhyland Klein | 3f7e827 | 2012-05-08 11:42:38 -0700 | [diff] [blame] | 870 | ret = tps65910_reg_set_bits(mfd, |
Laxman Dewangan | 1e0c66f | 2012-01-28 15:07:57 +0530 | [diff] [blame] | 871 | TPS65910_EN3_LDO_ASS + regoffs, bit_pos); |
| 872 | else |
Rhyland Klein | 3f7e827 | 2012-05-08 11:42:38 -0700 | [diff] [blame] | 873 | ret = tps65910_reg_clear_bits(mfd, |
Laxman Dewangan | 1e0c66f | 2012-01-28 15:07:57 +0530 | [diff] [blame] | 874 | TPS65910_EN3_LDO_ASS + regoffs, bit_pos); |
| 875 | if (ret < 0) { |
| 876 | dev_err(mfd->dev, |
| 877 | "Error in configuring external control EN3\n"); |
| 878 | return ret; |
| 879 | } |
| 880 | } |
| 881 | |
| 882 | /* Return if no external control is selected */ |
| 883 | if (!(ext_sleep_config & EXT_SLEEP_CONTROL)) { |
| 884 | /* Clear all sleep controls */ |
Rhyland Klein | 3f7e827 | 2012-05-08 11:42:38 -0700 | [diff] [blame] | 885 | ret = tps65910_reg_clear_bits(mfd, |
Laxman Dewangan | 1e0c66f | 2012-01-28 15:07:57 +0530 | [diff] [blame] | 886 | TPS65910_SLEEP_KEEP_LDO_ON + regoffs, bit_pos); |
| 887 | if (!ret) |
Rhyland Klein | 3f7e827 | 2012-05-08 11:42:38 -0700 | [diff] [blame] | 888 | ret = tps65910_reg_clear_bits(mfd, |
Laxman Dewangan | 1e0c66f | 2012-01-28 15:07:57 +0530 | [diff] [blame] | 889 | TPS65910_SLEEP_SET_LDO_OFF + regoffs, bit_pos); |
| 890 | if (ret < 0) |
| 891 | dev_err(mfd->dev, |
| 892 | "Error in configuring SLEEP register\n"); |
| 893 | return ret; |
| 894 | } |
| 895 | |
| 896 | /* |
| 897 | * For regulator that has separate operational and sleep register make |
| 898 | * sure that operational is used and clear sleep register to turn |
| 899 | * regulator off when external control is inactive |
| 900 | */ |
| 901 | if ((id == TPS65910_REG_VDD1) || |
| 902 | (id == TPS65910_REG_VDD2) || |
| 903 | ((id == TPS65911_REG_VDDCTRL) && |
| 904 | (tps65910_chip_id(mfd) == TPS65911))) { |
| 905 | int op_reg_add = pmic->get_ctrl_reg(id) + 1; |
| 906 | int sr_reg_add = pmic->get_ctrl_reg(id) + 2; |
Rhyland Klein | 3f7e827 | 2012-05-08 11:42:38 -0700 | [diff] [blame] | 907 | int opvsel = tps65910_reg_read_locked(pmic, op_reg_add); |
| 908 | int srvsel = tps65910_reg_read_locked(pmic, sr_reg_add); |
Laxman Dewangan | 1e0c66f | 2012-01-28 15:07:57 +0530 | [diff] [blame] | 909 | if (opvsel & VDD1_OP_CMD_MASK) { |
| 910 | u8 reg_val = srvsel & VDD1_OP_SEL_MASK; |
Rhyland Klein | 3f7e827 | 2012-05-08 11:42:38 -0700 | [diff] [blame] | 911 | ret = tps65910_reg_write_locked(pmic, op_reg_add, |
| 912 | reg_val); |
Laxman Dewangan | 1e0c66f | 2012-01-28 15:07:57 +0530 | [diff] [blame] | 913 | if (ret < 0) { |
| 914 | dev_err(mfd->dev, |
| 915 | "Error in configuring op register\n"); |
| 916 | return ret; |
| 917 | } |
| 918 | } |
Rhyland Klein | 3f7e827 | 2012-05-08 11:42:38 -0700 | [diff] [blame] | 919 | ret = tps65910_reg_write_locked(pmic, sr_reg_add, 0); |
Laxman Dewangan | 1e0c66f | 2012-01-28 15:07:57 +0530 | [diff] [blame] | 920 | if (ret < 0) { |
| 921 | dev_err(mfd->dev, "Error in settting sr register\n"); |
| 922 | return ret; |
| 923 | } |
| 924 | } |
| 925 | |
Rhyland Klein | 3f7e827 | 2012-05-08 11:42:38 -0700 | [diff] [blame] | 926 | ret = tps65910_reg_clear_bits(mfd, |
Laxman Dewangan | 1e0c66f | 2012-01-28 15:07:57 +0530 | [diff] [blame] | 927 | TPS65910_SLEEP_KEEP_LDO_ON + regoffs, bit_pos); |
Laxman Dewangan | f30b071 | 2012-03-07 18:21:49 +0530 | [diff] [blame] | 928 | if (!ret) { |
| 929 | if (ext_sleep_config & TPS65911_SLEEP_CONTROL_EXT_INPUT_SLEEP) |
Rhyland Klein | 3f7e827 | 2012-05-08 11:42:38 -0700 | [diff] [blame] | 930 | ret = tps65910_reg_set_bits(mfd, |
Laxman Dewangan | f30b071 | 2012-03-07 18:21:49 +0530 | [diff] [blame] | 931 | TPS65910_SLEEP_SET_LDO_OFF + regoffs, bit_pos); |
| 932 | else |
Rhyland Klein | 3f7e827 | 2012-05-08 11:42:38 -0700 | [diff] [blame] | 933 | ret = tps65910_reg_clear_bits(mfd, |
Laxman Dewangan | f30b071 | 2012-03-07 18:21:49 +0530 | [diff] [blame] | 934 | TPS65910_SLEEP_SET_LDO_OFF + regoffs, bit_pos); |
| 935 | } |
Laxman Dewangan | 1e0c66f | 2012-01-28 15:07:57 +0530 | [diff] [blame] | 936 | if (ret < 0) |
| 937 | dev_err(mfd->dev, |
| 938 | "Error in configuring SLEEP register\n"); |
Laxman Dewangan | f30b071 | 2012-03-07 18:21:49 +0530 | [diff] [blame] | 939 | |
Laxman Dewangan | 1e0c66f | 2012-01-28 15:07:57 +0530 | [diff] [blame] | 940 | return ret; |
| 941 | } |
| 942 | |
Rhyland Klein | 6790178 | 2012-05-08 11:42:41 -0700 | [diff] [blame] | 943 | #ifdef CONFIG_OF |
| 944 | |
| 945 | static struct of_regulator_match tps65910_matches[] = { |
Laxman Dewangan | 33a6943 | 2012-05-19 20:04:06 +0530 | [diff] [blame] | 946 | { .name = "vrtc", .driver_data = (void *) &tps65910_regs[0] }, |
| 947 | { .name = "vio", .driver_data = (void *) &tps65910_regs[1] }, |
| 948 | { .name = "vdd1", .driver_data = (void *) &tps65910_regs[2] }, |
| 949 | { .name = "vdd2", .driver_data = (void *) &tps65910_regs[3] }, |
| 950 | { .name = "vdd3", .driver_data = (void *) &tps65910_regs[4] }, |
| 951 | { .name = "vdig1", .driver_data = (void *) &tps65910_regs[5] }, |
| 952 | { .name = "vdig2", .driver_data = (void *) &tps65910_regs[6] }, |
| 953 | { .name = "vpll", .driver_data = (void *) &tps65910_regs[7] }, |
| 954 | { .name = "vdac", .driver_data = (void *) &tps65910_regs[8] }, |
| 955 | { .name = "vaux1", .driver_data = (void *) &tps65910_regs[9] }, |
| 956 | { .name = "vaux2", .driver_data = (void *) &tps65910_regs[10] }, |
| 957 | { .name = "vaux33", .driver_data = (void *) &tps65910_regs[11] }, |
| 958 | { .name = "vmmc", .driver_data = (void *) &tps65910_regs[12] }, |
Rhyland Klein | 6790178 | 2012-05-08 11:42:41 -0700 | [diff] [blame] | 959 | }; |
| 960 | |
| 961 | static struct of_regulator_match tps65911_matches[] = { |
Laxman Dewangan | 33a6943 | 2012-05-19 20:04:06 +0530 | [diff] [blame] | 962 | { .name = "vrtc", .driver_data = (void *) &tps65911_regs[0] }, |
| 963 | { .name = "vio", .driver_data = (void *) &tps65911_regs[1] }, |
| 964 | { .name = "vdd1", .driver_data = (void *) &tps65911_regs[2] }, |
| 965 | { .name = "vdd2", .driver_data = (void *) &tps65911_regs[3] }, |
| 966 | { .name = "vddctrl", .driver_data = (void *) &tps65911_regs[4] }, |
| 967 | { .name = "ldo1", .driver_data = (void *) &tps65911_regs[5] }, |
| 968 | { .name = "ldo2", .driver_data = (void *) &tps65911_regs[6] }, |
| 969 | { .name = "ldo3", .driver_data = (void *) &tps65911_regs[7] }, |
| 970 | { .name = "ldo4", .driver_data = (void *) &tps65911_regs[8] }, |
| 971 | { .name = "ldo5", .driver_data = (void *) &tps65911_regs[9] }, |
| 972 | { .name = "ldo6", .driver_data = (void *) &tps65911_regs[10] }, |
| 973 | { .name = "ldo7", .driver_data = (void *) &tps65911_regs[11] }, |
| 974 | { .name = "ldo8", .driver_data = (void *) &tps65911_regs[12] }, |
Rhyland Klein | 6790178 | 2012-05-08 11:42:41 -0700 | [diff] [blame] | 975 | }; |
| 976 | |
| 977 | static struct tps65910_board *tps65910_parse_dt_reg_data( |
Laxman Dewangan | 84df8c1 | 2012-05-20 21:48:50 +0530 | [diff] [blame] | 978 | struct platform_device *pdev, |
| 979 | struct of_regulator_match **tps65910_reg_matches) |
Rhyland Klein | 6790178 | 2012-05-08 11:42:41 -0700 | [diff] [blame] | 980 | { |
| 981 | struct tps65910_board *pmic_plat_data; |
| 982 | struct tps65910 *tps65910 = dev_get_drvdata(pdev->dev.parent); |
| 983 | struct device_node *np = pdev->dev.parent->of_node; |
| 984 | struct device_node *regulators; |
| 985 | struct of_regulator_match *matches; |
| 986 | unsigned int prop; |
| 987 | int idx = 0, ret, count; |
| 988 | |
| 989 | pmic_plat_data = devm_kzalloc(&pdev->dev, sizeof(*pmic_plat_data), |
| 990 | GFP_KERNEL); |
| 991 | |
| 992 | if (!pmic_plat_data) { |
| 993 | dev_err(&pdev->dev, "Failure to alloc pdata for regulators.\n"); |
| 994 | return NULL; |
| 995 | } |
| 996 | |
| 997 | regulators = of_find_node_by_name(np, "regulators"); |
Laxman Dewangan | 92ab953 | 2012-05-20 21:48:49 +0530 | [diff] [blame] | 998 | if (!regulators) { |
| 999 | dev_err(&pdev->dev, "regulator node not found\n"); |
| 1000 | return NULL; |
| 1001 | } |
Rhyland Klein | 6790178 | 2012-05-08 11:42:41 -0700 | [diff] [blame] | 1002 | |
| 1003 | switch (tps65910_chip_id(tps65910)) { |
| 1004 | case TPS65910: |
| 1005 | count = ARRAY_SIZE(tps65910_matches); |
| 1006 | matches = tps65910_matches; |
| 1007 | break; |
| 1008 | case TPS65911: |
| 1009 | count = ARRAY_SIZE(tps65911_matches); |
| 1010 | matches = tps65911_matches; |
| 1011 | break; |
| 1012 | default: |
Laxman Dewangan | 7e9a57e | 2012-05-20 21:48:48 +0530 | [diff] [blame] | 1013 | dev_err(&pdev->dev, "Invalid tps chip version\n"); |
Rhyland Klein | 6790178 | 2012-05-08 11:42:41 -0700 | [diff] [blame] | 1014 | return NULL; |
| 1015 | } |
| 1016 | |
| 1017 | ret = of_regulator_match(pdev->dev.parent, regulators, matches, count); |
| 1018 | if (ret < 0) { |
| 1019 | dev_err(&pdev->dev, "Error parsing regulator init data: %d\n", |
| 1020 | ret); |
| 1021 | return NULL; |
| 1022 | } |
| 1023 | |
Laxman Dewangan | 84df8c1 | 2012-05-20 21:48:50 +0530 | [diff] [blame] | 1024 | *tps65910_reg_matches = matches; |
| 1025 | |
Rhyland Klein | 6790178 | 2012-05-08 11:42:41 -0700 | [diff] [blame] | 1026 | for (idx = 0; idx < count; idx++) { |
| 1027 | if (!matches[idx].init_data || !matches[idx].of_node) |
| 1028 | continue; |
| 1029 | |
| 1030 | pmic_plat_data->tps65910_pmic_init_data[idx] = |
| 1031 | matches[idx].init_data; |
| 1032 | |
| 1033 | ret = of_property_read_u32(matches[idx].of_node, |
| 1034 | "ti,regulator-ext-sleep-control", &prop); |
| 1035 | if (!ret) |
| 1036 | pmic_plat_data->regulator_ext_sleep_control[idx] = prop; |
| 1037 | } |
| 1038 | |
| 1039 | return pmic_plat_data; |
| 1040 | } |
| 1041 | #else |
| 1042 | static inline struct tps65910_board *tps65910_parse_dt_reg_data( |
Laxman Dewangan | 84df8c1 | 2012-05-20 21:48:50 +0530 | [diff] [blame] | 1043 | struct platform_device *pdev, |
| 1044 | struct of_regulator_match **tps65910_reg_matches) |
Rhyland Klein | 6790178 | 2012-05-08 11:42:41 -0700 | [diff] [blame] | 1045 | { |
Laxman Dewangan | 84df8c1 | 2012-05-20 21:48:50 +0530 | [diff] [blame] | 1046 | *tps65910_reg_matches = NULL; |
Mark Brown | 74ea0e5 | 2012-06-15 19:04:33 +0100 | [diff] [blame] | 1047 | return NULL; |
Rhyland Klein | 6790178 | 2012-05-08 11:42:41 -0700 | [diff] [blame] | 1048 | } |
| 1049 | #endif |
| 1050 | |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 1051 | static __devinit int tps65910_probe(struct platform_device *pdev) |
| 1052 | { |
| 1053 | struct tps65910 *tps65910 = dev_get_drvdata(pdev->dev.parent); |
Mark Brown | c172708 | 2012-04-04 00:50:22 +0100 | [diff] [blame] | 1054 | struct regulator_config config = { }; |
Jorge Eduardo Candelaria | a320e3c | 2011-05-16 18:35:03 -0500 | [diff] [blame] | 1055 | struct tps_info *info; |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 1056 | struct regulator_init_data *reg_data; |
| 1057 | struct regulator_dev *rdev; |
| 1058 | struct tps65910_reg *pmic; |
| 1059 | struct tps65910_board *pmic_plat_data; |
Laxman Dewangan | 84df8c1 | 2012-05-20 21:48:50 +0530 | [diff] [blame] | 1060 | struct of_regulator_match *tps65910_reg_matches = NULL; |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 1061 | int i, err; |
| 1062 | |
| 1063 | pmic_plat_data = dev_get_platdata(tps65910->dev); |
Rhyland Klein | 6790178 | 2012-05-08 11:42:41 -0700 | [diff] [blame] | 1064 | if (!pmic_plat_data && tps65910->dev->of_node) |
Laxman Dewangan | 84df8c1 | 2012-05-20 21:48:50 +0530 | [diff] [blame] | 1065 | pmic_plat_data = tps65910_parse_dt_reg_data(pdev, |
| 1066 | &tps65910_reg_matches); |
Rhyland Klein | 6790178 | 2012-05-08 11:42:41 -0700 | [diff] [blame] | 1067 | |
Laxman Dewangan | 7e9a57e | 2012-05-20 21:48:48 +0530 | [diff] [blame] | 1068 | if (!pmic_plat_data) { |
| 1069 | dev_err(&pdev->dev, "Platform data not found\n"); |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 1070 | return -EINVAL; |
Laxman Dewangan | 7e9a57e | 2012-05-20 21:48:48 +0530 | [diff] [blame] | 1071 | } |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 1072 | |
Axel Lin | 9eb0c42 | 2012-04-11 14:40:18 +0800 | [diff] [blame] | 1073 | pmic = devm_kzalloc(&pdev->dev, sizeof(*pmic), GFP_KERNEL); |
Laxman Dewangan | 7e9a57e | 2012-05-20 21:48:48 +0530 | [diff] [blame] | 1074 | if (!pmic) { |
| 1075 | dev_err(&pdev->dev, "Memory allocation failed for pmic\n"); |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 1076 | return -ENOMEM; |
Laxman Dewangan | 7e9a57e | 2012-05-20 21:48:48 +0530 | [diff] [blame] | 1077 | } |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 1078 | |
| 1079 | mutex_init(&pmic->mutex); |
| 1080 | pmic->mfd = tps65910; |
| 1081 | platform_set_drvdata(pdev, pmic); |
| 1082 | |
| 1083 | /* Give control of all register to control port */ |
Rhyland Klein | 3f7e827 | 2012-05-08 11:42:38 -0700 | [diff] [blame] | 1084 | tps65910_reg_set_bits(pmic->mfd, TPS65910_DEVCTRL, |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 1085 | DEVCTRL_SR_CTL_I2C_SEL_MASK); |
| 1086 | |
Jorge Eduardo Candelaria | a320e3c | 2011-05-16 18:35:03 -0500 | [diff] [blame] | 1087 | switch(tps65910_chip_id(tps65910)) { |
| 1088 | case TPS65910: |
| 1089 | pmic->get_ctrl_reg = &tps65910_get_ctrl_register; |
Axel Lin | 39aa9b6 | 2011-07-11 09:57:43 +0800 | [diff] [blame] | 1090 | pmic->num_regulators = ARRAY_SIZE(tps65910_regs); |
Laxman Dewangan | 1e0c66f | 2012-01-28 15:07:57 +0530 | [diff] [blame] | 1091 | pmic->ext_sleep_control = tps65910_ext_sleep_control; |
Jorge Eduardo Candelaria | a320e3c | 2011-05-16 18:35:03 -0500 | [diff] [blame] | 1092 | info = tps65910_regs; |
Axel Lin | d04156b | 2011-07-10 21:44:09 +0800 | [diff] [blame] | 1093 | break; |
Jorge Eduardo Candelaria | a320e3c | 2011-05-16 18:35:03 -0500 | [diff] [blame] | 1094 | case TPS65911: |
| 1095 | pmic->get_ctrl_reg = &tps65911_get_ctrl_register; |
Axel Lin | 39aa9b6 | 2011-07-11 09:57:43 +0800 | [diff] [blame] | 1096 | pmic->num_regulators = ARRAY_SIZE(tps65911_regs); |
Laxman Dewangan | 1e0c66f | 2012-01-28 15:07:57 +0530 | [diff] [blame] | 1097 | pmic->ext_sleep_control = tps65911_ext_sleep_control; |
Jorge Eduardo Candelaria | a320e3c | 2011-05-16 18:35:03 -0500 | [diff] [blame] | 1098 | info = tps65911_regs; |
Axel Lin | d04156b | 2011-07-10 21:44:09 +0800 | [diff] [blame] | 1099 | break; |
Jorge Eduardo Candelaria | a320e3c | 2011-05-16 18:35:03 -0500 | [diff] [blame] | 1100 | default: |
Laxman Dewangan | 7e9a57e | 2012-05-20 21:48:48 +0530 | [diff] [blame] | 1101 | dev_err(&pdev->dev, "Invalid tps chip version\n"); |
Jorge Eduardo Candelaria | a320e3c | 2011-05-16 18:35:03 -0500 | [diff] [blame] | 1102 | return -ENODEV; |
| 1103 | } |
| 1104 | |
Laxman Dewangan | 68d8c1c | 2012-05-19 20:04:09 +0530 | [diff] [blame] | 1105 | pmic->desc = devm_kzalloc(&pdev->dev, pmic->num_regulators * |
Axel Lin | 39aa9b6 | 2011-07-11 09:57:43 +0800 | [diff] [blame] | 1106 | sizeof(struct regulator_desc), GFP_KERNEL); |
| 1107 | if (!pmic->desc) { |
Laxman Dewangan | 68d8c1c | 2012-05-19 20:04:09 +0530 | [diff] [blame] | 1108 | dev_err(&pdev->dev, "Memory alloc fails for desc\n"); |
| 1109 | return -ENOMEM; |
Axel Lin | 39aa9b6 | 2011-07-11 09:57:43 +0800 | [diff] [blame] | 1110 | } |
| 1111 | |
Laxman Dewangan | 68d8c1c | 2012-05-19 20:04:09 +0530 | [diff] [blame] | 1112 | pmic->info = devm_kzalloc(&pdev->dev, pmic->num_regulators * |
Axel Lin | 39aa9b6 | 2011-07-11 09:57:43 +0800 | [diff] [blame] | 1113 | sizeof(struct tps_info *), GFP_KERNEL); |
| 1114 | if (!pmic->info) { |
Laxman Dewangan | 68d8c1c | 2012-05-19 20:04:09 +0530 | [diff] [blame] | 1115 | dev_err(&pdev->dev, "Memory alloc fails for info\n"); |
| 1116 | return -ENOMEM; |
Axel Lin | 39aa9b6 | 2011-07-11 09:57:43 +0800 | [diff] [blame] | 1117 | } |
| 1118 | |
Laxman Dewangan | 68d8c1c | 2012-05-19 20:04:09 +0530 | [diff] [blame] | 1119 | pmic->rdev = devm_kzalloc(&pdev->dev, pmic->num_regulators * |
Axel Lin | 39aa9b6 | 2011-07-11 09:57:43 +0800 | [diff] [blame] | 1120 | sizeof(struct regulator_dev *), GFP_KERNEL); |
| 1121 | if (!pmic->rdev) { |
Laxman Dewangan | 68d8c1c | 2012-05-19 20:04:09 +0530 | [diff] [blame] | 1122 | dev_err(&pdev->dev, "Memory alloc fails for rdev\n"); |
| 1123 | return -ENOMEM; |
Axel Lin | 39aa9b6 | 2011-07-11 09:57:43 +0800 | [diff] [blame] | 1124 | } |
| 1125 | |
Kyle Manna | c1fc148 | 2011-11-03 12:08:06 -0500 | [diff] [blame] | 1126 | for (i = 0; i < pmic->num_regulators && i < TPS65910_NUM_REGS; |
| 1127 | i++, info++) { |
| 1128 | |
| 1129 | reg_data = pmic_plat_data->tps65910_pmic_init_data[i]; |
| 1130 | |
| 1131 | /* Regulator API handles empty constraints but not NULL |
| 1132 | * constraints */ |
| 1133 | if (!reg_data) |
| 1134 | continue; |
| 1135 | |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 1136 | /* Register the regulators */ |
| 1137 | pmic->info[i] = info; |
| 1138 | |
| 1139 | pmic->desc[i].name = info->name; |
Axel Lin | 77fa44d | 2011-05-12 13:47:50 +0800 | [diff] [blame] | 1140 | pmic->desc[i].id = i; |
Laxman Dewangan | 7d38a3c | 2012-01-20 16:36:22 +0530 | [diff] [blame] | 1141 | pmic->desc[i].n_voltages = info->n_voltages; |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 1142 | |
Jorge Eduardo Candelaria | a320e3c | 2011-05-16 18:35:03 -0500 | [diff] [blame] | 1143 | if (i == TPS65910_REG_VDD1 || i == TPS65910_REG_VDD2) { |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 1144 | pmic->desc[i].ops = &tps65910_ops_dcdc; |
Afzal Mohammed | 780dc9b | 2011-11-08 18:54:10 +0530 | [diff] [blame] | 1145 | pmic->desc[i].n_voltages = VDD1_2_NUM_VOLT_FINE * |
| 1146 | VDD1_2_NUM_VOLT_COARSE; |
Axel Lin | 01bc3a1 | 2012-06-20 22:40:10 +0800 | [diff] [blame] | 1147 | pmic->desc[i].ramp_delay = 12500; |
Jorge Eduardo Candelaria | a320e3c | 2011-05-16 18:35:03 -0500 | [diff] [blame] | 1148 | } else if (i == TPS65910_REG_VDD3) { |
Axel Lin | 01bc3a1 | 2012-06-20 22:40:10 +0800 | [diff] [blame] | 1149 | if (tps65910_chip_id(tps65910) == TPS65910) { |
Jorge Eduardo Candelaria | a320e3c | 2011-05-16 18:35:03 -0500 | [diff] [blame] | 1150 | pmic->desc[i].ops = &tps65910_ops_vdd3; |
Axel Lin | d9fe28f | 2012-06-21 18:48:00 +0800 | [diff] [blame^] | 1151 | pmic->desc[i].volt_table = info->voltage_table; |
Axel Lin | 01bc3a1 | 2012-06-20 22:40:10 +0800 | [diff] [blame] | 1152 | } else { |
Jorge Eduardo Candelaria | a320e3c | 2011-05-16 18:35:03 -0500 | [diff] [blame] | 1153 | pmic->desc[i].ops = &tps65910_ops_dcdc; |
Axel Lin | 01bc3a1 | 2012-06-20 22:40:10 +0800 | [diff] [blame] | 1154 | pmic->desc[i].ramp_delay = 5000; |
| 1155 | } |
Jorge Eduardo Candelaria | a320e3c | 2011-05-16 18:35:03 -0500 | [diff] [blame] | 1156 | } else { |
Axel Lin | d9fe28f | 2012-06-21 18:48:00 +0800 | [diff] [blame^] | 1157 | if (tps65910_chip_id(tps65910) == TPS65910) { |
Jorge Eduardo Candelaria | a320e3c | 2011-05-16 18:35:03 -0500 | [diff] [blame] | 1158 | pmic->desc[i].ops = &tps65910_ops; |
Axel Lin | d9fe28f | 2012-06-21 18:48:00 +0800 | [diff] [blame^] | 1159 | pmic->desc[i].volt_table = info->voltage_table; |
| 1160 | } else { |
Jorge Eduardo Candelaria | a320e3c | 2011-05-16 18:35:03 -0500 | [diff] [blame] | 1161 | pmic->desc[i].ops = &tps65911_ops; |
Axel Lin | d9fe28f | 2012-06-21 18:48:00 +0800 | [diff] [blame^] | 1162 | } |
Jorge Eduardo Candelaria | a320e3c | 2011-05-16 18:35:03 -0500 | [diff] [blame] | 1163 | } |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 1164 | |
Laxman Dewangan | 1e0c66f | 2012-01-28 15:07:57 +0530 | [diff] [blame] | 1165 | err = tps65910_set_ext_sleep_config(pmic, i, |
| 1166 | pmic_plat_data->regulator_ext_sleep_control[i]); |
| 1167 | /* |
| 1168 | * Failing on regulator for configuring externally control |
| 1169 | * is not a serious issue, just throw warning. |
| 1170 | */ |
| 1171 | if (err < 0) |
| 1172 | dev_warn(tps65910->dev, |
| 1173 | "Failed to initialise ext control config\n"); |
| 1174 | |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 1175 | pmic->desc[i].type = REGULATOR_VOLTAGE; |
| 1176 | pmic->desc[i].owner = THIS_MODULE; |
Axel Lin | a40a9c4 | 2012-04-17 14:34:46 +0800 | [diff] [blame] | 1177 | pmic->desc[i].enable_reg = pmic->get_ctrl_reg(i); |
| 1178 | pmic->desc[i].enable_mask = TPS65910_SUPPLY_STATE_ENABLED; |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 1179 | |
Mark Brown | c172708 | 2012-04-04 00:50:22 +0100 | [diff] [blame] | 1180 | config.dev = tps65910->dev; |
| 1181 | config.init_data = reg_data; |
| 1182 | config.driver_data = pmic; |
Axel Lin | a40a9c4 | 2012-04-17 14:34:46 +0800 | [diff] [blame] | 1183 | config.regmap = tps65910->regmap; |
Mark Brown | c172708 | 2012-04-04 00:50:22 +0100 | [diff] [blame] | 1184 | |
Laxman Dewangan | 84df8c1 | 2012-05-20 21:48:50 +0530 | [diff] [blame] | 1185 | if (tps65910_reg_matches) |
| 1186 | config.of_node = tps65910_reg_matches[i].of_node; |
Rhyland Klein | 6790178 | 2012-05-08 11:42:41 -0700 | [diff] [blame] | 1187 | |
Mark Brown | c172708 | 2012-04-04 00:50:22 +0100 | [diff] [blame] | 1188 | rdev = regulator_register(&pmic->desc[i], &config); |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 1189 | if (IS_ERR(rdev)) { |
| 1190 | dev_err(tps65910->dev, |
| 1191 | "failed to register %s regulator\n", |
| 1192 | pdev->name); |
| 1193 | err = PTR_ERR(rdev); |
Axel Lin | 39aa9b6 | 2011-07-11 09:57:43 +0800 | [diff] [blame] | 1194 | goto err_unregister_regulator; |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 1195 | } |
| 1196 | |
| 1197 | /* Save regulator for cleanup */ |
| 1198 | pmic->rdev[i] = rdev; |
| 1199 | } |
| 1200 | return 0; |
| 1201 | |
Axel Lin | 39aa9b6 | 2011-07-11 09:57:43 +0800 | [diff] [blame] | 1202 | err_unregister_regulator: |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 1203 | while (--i >= 0) |
| 1204 | regulator_unregister(pmic->rdev[i]); |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 1205 | return err; |
| 1206 | } |
| 1207 | |
| 1208 | static int __devexit tps65910_remove(struct platform_device *pdev) |
| 1209 | { |
Axel Lin | 39aa9b6 | 2011-07-11 09:57:43 +0800 | [diff] [blame] | 1210 | struct tps65910_reg *pmic = platform_get_drvdata(pdev); |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 1211 | int i; |
| 1212 | |
Axel Lin | 39aa9b6 | 2011-07-11 09:57:43 +0800 | [diff] [blame] | 1213 | for (i = 0; i < pmic->num_regulators; i++) |
| 1214 | regulator_unregister(pmic->rdev[i]); |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 1215 | |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 1216 | return 0; |
| 1217 | } |
| 1218 | |
Laxman Dewangan | 1e0c66f | 2012-01-28 15:07:57 +0530 | [diff] [blame] | 1219 | static void tps65910_shutdown(struct platform_device *pdev) |
| 1220 | { |
| 1221 | struct tps65910_reg *pmic = platform_get_drvdata(pdev); |
| 1222 | int i; |
| 1223 | |
| 1224 | /* |
| 1225 | * Before bootloader jumps to kernel, it makes sure that required |
| 1226 | * external control signals are in desired state so that given rails |
| 1227 | * can be configure accordingly. |
| 1228 | * If rails are configured to be controlled from external control |
| 1229 | * then before shutting down/rebooting the system, the external |
| 1230 | * control configuration need to be remove from the rails so that |
| 1231 | * its output will be available as per register programming even |
| 1232 | * if external controls are removed. This is require when the POR |
| 1233 | * value of the control signals are not in active state and before |
| 1234 | * bootloader initializes it, the system requires the rail output |
| 1235 | * to be active for booting. |
| 1236 | */ |
| 1237 | for (i = 0; i < pmic->num_regulators; i++) { |
| 1238 | int err; |
| 1239 | if (!pmic->rdev[i]) |
| 1240 | continue; |
| 1241 | |
| 1242 | err = tps65910_set_ext_sleep_config(pmic, i, 0); |
| 1243 | if (err < 0) |
| 1244 | dev_err(&pdev->dev, |
| 1245 | "Error in clearing external control\n"); |
| 1246 | } |
| 1247 | } |
| 1248 | |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 1249 | static struct platform_driver tps65910_driver = { |
| 1250 | .driver = { |
| 1251 | .name = "tps65910-pmic", |
| 1252 | .owner = THIS_MODULE, |
| 1253 | }, |
| 1254 | .probe = tps65910_probe, |
| 1255 | .remove = __devexit_p(tps65910_remove), |
Laxman Dewangan | 1e0c66f | 2012-01-28 15:07:57 +0530 | [diff] [blame] | 1256 | .shutdown = tps65910_shutdown, |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 1257 | }; |
| 1258 | |
| 1259 | static int __init tps65910_init(void) |
| 1260 | { |
| 1261 | return platform_driver_register(&tps65910_driver); |
| 1262 | } |
| 1263 | subsys_initcall(tps65910_init); |
| 1264 | |
| 1265 | static void __exit tps65910_cleanup(void) |
| 1266 | { |
| 1267 | platform_driver_unregister(&tps65910_driver); |
| 1268 | } |
| 1269 | module_exit(tps65910_cleanup); |
| 1270 | |
| 1271 | MODULE_AUTHOR("Graeme Gregory <gg@slimlogic.co.uk>"); |
Axel Lin | ae0e654 | 2012-02-21 10:14:55 +0800 | [diff] [blame] | 1272 | MODULE_DESCRIPTION("TPS65910/TPS65911 voltage regulator driver"); |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 1273 | MODULE_LICENSE("GPL v2"); |
| 1274 | MODULE_ALIAS("platform:tps65910-pmic"); |