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Linus Torvalds1da177e2005-04-16 15:20:36 -07001/*
2 * File: msi.c
3 * Purpose: PCI Message Signaled Interrupt (MSI)
4 *
5 * Copyright (C) 2003-2004 Intel
6 * Copyright (C) Tom Long Nguyen (tom.l.nguyen@intel.com)
7 */
8
Eric W. Biederman1ce03372006-10-04 02:16:41 -07009#include <linux/err.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070010#include <linux/mm.h>
11#include <linux/irq.h>
12#include <linux/interrupt.h>
Paul Gortmaker363c75d2011-05-27 09:37:25 -040013#include <linux/export.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070014#include <linux/ioport.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070015#include <linux/pci.h>
16#include <linux/proc_fs.h>
Eric W. Biederman3b7d1922006-10-04 02:16:59 -070017#include <linux/msi.h>
Dan Williams4fdadeb2007-04-26 18:21:38 -070018#include <linux/smp.h>
Hidetoshi Seto500559a2009-08-10 10:14:15 +090019#include <linux/errno.h>
20#include <linux/io.h>
Tejun Heo5a0e3ad2010-03-24 17:04:11 +090021#include <linux/slab.h>
Jiang Liu3878eae2014-11-11 21:02:18 +080022#include <linux/irqdomain.h>
David Daneyb6eec9b2015-10-08 15:10:49 -070023#include <linux/of_irq.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070024
25#include "pci.h"
Linus Torvalds1da177e2005-04-16 15:20:36 -070026
Linus Torvalds1da177e2005-04-16 15:20:36 -070027static int pci_msi_enable = 1;
Yijing Wang38737d82014-10-27 10:44:36 +080028int pci_msi_ignore_mask;
Linus Torvalds1da177e2005-04-16 15:20:36 -070029
Bjorn Helgaas527eee22013-04-17 17:44:48 -060030#define msix_table_size(flags) ((flags & PCI_MSIX_FLAGS_QSIZE) + 1)
31
Jiang Liu8e047ad2014-11-15 22:24:07 +080032#ifdef CONFIG_PCI_MSI_IRQ_DOMAIN
33static struct irq_domain *pci_msi_default_domain;
34static DEFINE_MUTEX(pci_msi_domain_lock);
35
36struct irq_domain * __weak arch_get_pci_msi_domain(struct pci_dev *dev)
37{
38 return pci_msi_default_domain;
39}
40
Marc Zyngier020c3122014-11-15 10:49:12 +000041static struct irq_domain *pci_msi_get_domain(struct pci_dev *dev)
42{
Marc Zyngierd8a1cb72015-07-28 14:46:14 +010043 struct irq_domain *domain;
Marc Zyngier020c3122014-11-15 10:49:12 +000044
Marc Zyngierd8a1cb72015-07-28 14:46:14 +010045 domain = dev_get_msi_domain(&dev->dev);
46 if (domain)
47 return domain;
Marc Zyngier020c3122014-11-15 10:49:12 +000048
Marc Zyngierd8a1cb72015-07-28 14:46:14 +010049 return arch_get_pci_msi_domain(dev);
Marc Zyngier020c3122014-11-15 10:49:12 +000050}
51
Jiang Liu8e047ad2014-11-15 22:24:07 +080052static int pci_msi_setup_msi_irqs(struct pci_dev *dev, int nvec, int type)
53{
54 struct irq_domain *domain;
55
Marc Zyngier020c3122014-11-15 10:49:12 +000056 domain = pci_msi_get_domain(dev);
Marc Zyngier3845d292015-12-04 10:28:14 -060057 if (domain && irq_domain_is_hierarchy(domain))
Jiang Liu8e047ad2014-11-15 22:24:07 +080058 return pci_msi_domain_alloc_irqs(domain, dev, nvec, type);
59
60 return arch_setup_msi_irqs(dev, nvec, type);
61}
62
63static void pci_msi_teardown_msi_irqs(struct pci_dev *dev)
64{
65 struct irq_domain *domain;
66
Marc Zyngier020c3122014-11-15 10:49:12 +000067 domain = pci_msi_get_domain(dev);
Marc Zyngier3845d292015-12-04 10:28:14 -060068 if (domain && irq_domain_is_hierarchy(domain))
Jiang Liu8e047ad2014-11-15 22:24:07 +080069 pci_msi_domain_free_irqs(domain, dev);
70 else
71 arch_teardown_msi_irqs(dev);
72}
73#else
74#define pci_msi_setup_msi_irqs arch_setup_msi_irqs
75#define pci_msi_teardown_msi_irqs arch_teardown_msi_irqs
76#endif
Bjorn Helgaas527eee22013-04-17 17:44:48 -060077
Adrian Bunk6a9e7f22007-12-11 23:19:41 +010078/* Arch hooks */
79
Thomas Petazzoni4287d822013-08-09 22:27:06 +020080int __weak arch_setup_msi_irq(struct pci_dev *dev, struct msi_desc *desc)
81{
Lorenzo Pieralisi2291ec02015-08-03 22:04:06 -050082 struct msi_controller *chip = dev->bus->msi;
Thierry Reding0cbdcfc2013-08-09 22:27:08 +020083 int err;
84
85 if (!chip || !chip->setup_irq)
86 return -EINVAL;
87
88 err = chip->setup_irq(chip, dev, desc);
89 if (err < 0)
90 return err;
91
92 irq_set_chip_data(desc->irq, chip);
93
94 return 0;
Thomas Petazzoni4287d822013-08-09 22:27:06 +020095}
96
97void __weak arch_teardown_msi_irq(unsigned int irq)
98{
Yijing Wangc2791b82014-11-11 17:45:45 -070099 struct msi_controller *chip = irq_get_chip_data(irq);
Thierry Reding0cbdcfc2013-08-09 22:27:08 +0200100
101 if (!chip || !chip->teardown_irq)
102 return;
103
104 chip->teardown_irq(chip, irq);
Thomas Petazzoni4287d822013-08-09 22:27:06 +0200105}
106
Thomas Petazzoni4287d822013-08-09 22:27:06 +0200107int __weak arch_setup_msi_irqs(struct pci_dev *dev, int nvec, int type)
Adrian Bunk6a9e7f22007-12-11 23:19:41 +0100108{
Lucas Stach339e5b42015-09-18 13:58:34 -0500109 struct msi_controller *chip = dev->bus->msi;
Adrian Bunk6a9e7f22007-12-11 23:19:41 +0100110 struct msi_desc *entry;
111 int ret;
112
Lucas Stach339e5b42015-09-18 13:58:34 -0500113 if (chip && chip->setup_irqs)
114 return chip->setup_irqs(chip, dev, nvec, type);
Matthew Wilcox1c8d7b02009-03-17 08:54:10 -0400115 /*
116 * If an architecture wants to support multiple MSI, it needs to
117 * override arch_setup_msi_irqs()
118 */
119 if (type == PCI_CAP_ID_MSI && nvec > 1)
120 return 1;
121
Jiang Liu5004e982015-07-09 16:00:41 +0800122 for_each_pci_msi_entry(entry, dev) {
Adrian Bunk6a9e7f22007-12-11 23:19:41 +0100123 ret = arch_setup_msi_irq(dev, entry);
Michael Ellermanb5fbf532009-02-11 22:27:02 +1100124 if (ret < 0)
Adrian Bunk6a9e7f22007-12-11 23:19:41 +0100125 return ret;
Michael Ellermanb5fbf532009-02-11 22:27:02 +1100126 if (ret > 0)
127 return -ENOSPC;
Adrian Bunk6a9e7f22007-12-11 23:19:41 +0100128 }
129
130 return 0;
131}
132
Thomas Petazzoni4287d822013-08-09 22:27:06 +0200133/*
134 * We have a default implementation available as a separate non-weak
135 * function, as it is used by the Xen x86 PCI code
136 */
Thomas Gleixner1525bf02010-10-06 16:05:35 -0400137void default_teardown_msi_irqs(struct pci_dev *dev)
Adrian Bunk6a9e7f22007-12-11 23:19:41 +0100138{
Jiang Liu63a7b172014-11-06 22:20:32 +0800139 int i;
Adrian Bunk6a9e7f22007-12-11 23:19:41 +0100140 struct msi_desc *entry;
141
Jiang Liu5004e982015-07-09 16:00:41 +0800142 for_each_pci_msi_entry(entry, dev)
Jiang Liu63a7b172014-11-06 22:20:32 +0800143 if (entry->irq)
144 for (i = 0; i < entry->nvec_used; i++)
145 arch_teardown_msi_irq(entry->irq + i);
Adrian Bunk6a9e7f22007-12-11 23:19:41 +0100146}
147
Thomas Petazzoni4287d822013-08-09 22:27:06 +0200148void __weak arch_teardown_msi_irqs(struct pci_dev *dev)
149{
150 return default_teardown_msi_irqs(dev);
151}
Konrad Rzeszutek Wilk76ccc292011-12-16 17:38:18 -0500152
DuanZhenzhongac8344c2013-12-04 13:09:16 +0800153static void default_restore_msi_irq(struct pci_dev *dev, int irq)
Konrad Rzeszutek Wilk76ccc292011-12-16 17:38:18 -0500154{
155 struct msi_desc *entry;
156
157 entry = NULL;
158 if (dev->msix_enabled) {
Jiang Liu5004e982015-07-09 16:00:41 +0800159 for_each_pci_msi_entry(entry, dev) {
Konrad Rzeszutek Wilk76ccc292011-12-16 17:38:18 -0500160 if (irq == entry->irq)
161 break;
162 }
163 } else if (dev->msi_enabled) {
164 entry = irq_get_msi_desc(irq);
165 }
166
167 if (entry)
Jiang Liu83a18912014-11-09 23:10:34 +0800168 __pci_write_msi_msg(entry, &entry->msg);
Konrad Rzeszutek Wilk76ccc292011-12-16 17:38:18 -0500169}
Thomas Petazzoni4287d822013-08-09 22:27:06 +0200170
DuanZhenzhongac8344c2013-12-04 13:09:16 +0800171void __weak arch_restore_msi_irqs(struct pci_dev *dev)
Thomas Petazzoni4287d822013-08-09 22:27:06 +0200172{
DuanZhenzhongac8344c2013-12-04 13:09:16 +0800173 return default_restore_msi_irqs(dev);
Thomas Petazzoni4287d822013-08-09 22:27:06 +0200174}
Konrad Rzeszutek Wilk76ccc292011-12-16 17:38:18 -0500175
Matthew Wilcoxbffac3c2009-01-21 19:19:19 -0500176static inline __attribute_const__ u32 msi_mask(unsigned x)
177{
Matthew Wilcox0b49ec32009-02-08 20:27:47 -0700178 /* Don't shift by >= width of type */
179 if (x >= 5)
180 return 0xffffffff;
181 return (1 << (1 << x)) - 1;
Matthew Wilcoxbffac3c2009-01-21 19:19:19 -0500182}
183
Matthew Wilcoxce6fce42008-07-25 15:42:58 -0600184/*
185 * PCI 2.3 does not specify mask bits for each MSI interrupt. Attempting to
186 * mask all MSI interrupts by clearing the MSI enable bit does not work
187 * reliably as devices without an INTx disable bit will then generate a
188 * level IRQ which will never be cleared.
Matthew Wilcoxce6fce42008-07-25 15:42:58 -0600189 */
Thomas Gleixner23ed8d52014-11-23 11:55:58 +0100190u32 __pci_msi_desc_mask_irq(struct msi_desc *desc, u32 mask, u32 flag)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700191{
Matthew Wilcoxf2440d92009-03-17 08:54:09 -0400192 u32 mask_bits = desc->masked;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700193
Yijing Wang38737d82014-10-27 10:44:36 +0800194 if (pci_msi_ignore_mask || !desc->msi_attrib.maskbit)
Hidetoshi Seto12abb8b2009-06-24 12:08:09 +0900195 return 0;
Matthew Wilcoxf2440d92009-03-17 08:54:09 -0400196
197 mask_bits &= ~mask;
198 mask_bits |= flag;
Jiang Liue39758e2015-07-09 16:00:43 +0800199 pci_write_config_dword(msi_desc_to_pci_dev(desc), desc->mask_pos,
200 mask_bits);
Hidetoshi Seto12abb8b2009-06-24 12:08:09 +0900201
202 return mask_bits;
203}
204
205static void msi_mask_irq(struct msi_desc *desc, u32 mask, u32 flag)
206{
Thomas Gleixner23ed8d52014-11-23 11:55:58 +0100207 desc->masked = __pci_msi_desc_mask_irq(desc, mask, flag);
Matthew Wilcoxf2440d92009-03-17 08:54:09 -0400208}
209
210/*
211 * This internal function does not flush PCI writes to the device.
212 * All users must ensure that they read from the device before either
213 * assuming that the device state is up to date, or returning out of this
214 * file. This saves a few milliseconds when initialising devices with lots
215 * of MSI-X interrupts.
216 */
Thomas Gleixner23ed8d52014-11-23 11:55:58 +0100217u32 __pci_msix_desc_mask_irq(struct msi_desc *desc, u32 flag)
Matthew Wilcoxf2440d92009-03-17 08:54:09 -0400218{
219 u32 mask_bits = desc->masked;
220 unsigned offset = desc->msi_attrib.entry_nr * PCI_MSIX_ENTRY_SIZE +
Hidetoshi Seto2c21fd42009-06-23 17:40:04 +0900221 PCI_MSIX_ENTRY_VECTOR_CTRL;
Yijing Wang38737d82014-10-27 10:44:36 +0800222
223 if (pci_msi_ignore_mask)
224 return 0;
225
Sheng Yang8d805282010-11-11 15:46:55 +0800226 mask_bits &= ~PCI_MSIX_ENTRY_CTRL_MASKBIT;
227 if (flag)
228 mask_bits |= PCI_MSIX_ENTRY_CTRL_MASKBIT;
Matthew Wilcoxf2440d92009-03-17 08:54:09 -0400229 writel(mask_bits, desc->mask_base + offset);
Hidetoshi Seto12abb8b2009-06-24 12:08:09 +0900230
231 return mask_bits;
232}
233
234static void msix_mask_irq(struct msi_desc *desc, u32 flag)
235{
Thomas Gleixner23ed8d52014-11-23 11:55:58 +0100236 desc->masked = __pci_msix_desc_mask_irq(desc, flag);
Matthew Wilcoxf2440d92009-03-17 08:54:09 -0400237}
238
Thomas Gleixner1c9db522010-09-28 16:46:51 +0200239static void msi_set_mask_bit(struct irq_data *data, u32 flag)
Matthew Wilcoxf2440d92009-03-17 08:54:09 -0400240{
Jiang Liuc391f262015-06-01 16:05:41 +0800241 struct msi_desc *desc = irq_data_get_msi_desc(data);
Matthew Wilcoxf2440d92009-03-17 08:54:09 -0400242
243 if (desc->msi_attrib.is_msix) {
244 msix_mask_irq(desc, flag);
245 readl(desc->mask_base); /* Flush write to device */
Matthew Wilcox24d27552009-03-17 08:54:06 -0400246 } else {
Yijing Wanga281b782014-07-08 10:08:55 +0800247 unsigned offset = data->irq - desc->irq;
Matthew Wilcox1c8d7b02009-03-17 08:54:10 -0400248 msi_mask_irq(desc, 1 << offset, flag << offset);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700249 }
Matthew Wilcoxf2440d92009-03-17 08:54:09 -0400250}
251
Thomas Gleixner23ed8d52014-11-23 11:55:58 +0100252/**
253 * pci_msi_mask_irq - Generic irq chip callback to mask PCI/MSI interrupts
254 * @data: pointer to irqdata associated to that interrupt
255 */
256void pci_msi_mask_irq(struct irq_data *data)
Matthew Wilcoxf2440d92009-03-17 08:54:09 -0400257{
Thomas Gleixner1c9db522010-09-28 16:46:51 +0200258 msi_set_mask_bit(data, 1);
Matthew Wilcoxf2440d92009-03-17 08:54:09 -0400259}
Jake Oshinsa4289dc2015-12-10 17:52:59 +0000260EXPORT_SYMBOL_GPL(pci_msi_mask_irq);
Matthew Wilcoxf2440d92009-03-17 08:54:09 -0400261
Thomas Gleixner23ed8d52014-11-23 11:55:58 +0100262/**
263 * pci_msi_unmask_irq - Generic irq chip callback to unmask PCI/MSI interrupts
264 * @data: pointer to irqdata associated to that interrupt
265 */
266void pci_msi_unmask_irq(struct irq_data *data)
Matthew Wilcoxf2440d92009-03-17 08:54:09 -0400267{
Thomas Gleixner1c9db522010-09-28 16:46:51 +0200268 msi_set_mask_bit(data, 0);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700269}
Jake Oshinsa4289dc2015-12-10 17:52:59 +0000270EXPORT_SYMBOL_GPL(pci_msi_unmask_irq);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700271
DuanZhenzhongac8344c2013-12-04 13:09:16 +0800272void default_restore_msi_irqs(struct pci_dev *dev)
273{
274 struct msi_desc *entry;
275
Jiang Liu5004e982015-07-09 16:00:41 +0800276 for_each_pci_msi_entry(entry, dev)
DuanZhenzhongac8344c2013-12-04 13:09:16 +0800277 default_restore_msi_irq(dev, entry->irq);
DuanZhenzhongac8344c2013-12-04 13:09:16 +0800278}
279
Jiang Liu891d4a42014-11-09 23:10:33 +0800280void __pci_read_msi_msg(struct msi_desc *entry, struct msi_msg *msg)
Eric W. Biederman0366f8f2006-10-04 02:16:33 -0700281{
Jiang Liue39758e2015-07-09 16:00:43 +0800282 struct pci_dev *dev = msi_desc_to_pci_dev(entry);
283
284 BUG_ON(dev->current_state != PCI_D0);
Eric W. Biederman0366f8f2006-10-04 02:16:33 -0700285
Ben Hutchings30da5522010-07-23 14:56:28 +0100286 if (entry->msi_attrib.is_msix) {
287 void __iomem *base = entry->mask_base +
288 entry->msi_attrib.entry_nr * PCI_MSIX_ENTRY_SIZE;
289
290 msg->address_lo = readl(base + PCI_MSIX_ENTRY_LOWER_ADDR);
291 msg->address_hi = readl(base + PCI_MSIX_ENTRY_UPPER_ADDR);
292 msg->data = readl(base + PCI_MSIX_ENTRY_DATA);
293 } else {
Bjorn Helgaasf5322162013-04-17 17:34:36 -0600294 int pos = dev->msi_cap;
Ben Hutchings30da5522010-07-23 14:56:28 +0100295 u16 data;
296
Bjorn Helgaas9925ad02013-04-17 17:39:57 -0600297 pci_read_config_dword(dev, pos + PCI_MSI_ADDRESS_LO,
298 &msg->address_lo);
Ben Hutchings30da5522010-07-23 14:56:28 +0100299 if (entry->msi_attrib.is_64) {
Bjorn Helgaas9925ad02013-04-17 17:39:57 -0600300 pci_read_config_dword(dev, pos + PCI_MSI_ADDRESS_HI,
301 &msg->address_hi);
Bjorn Helgaas2f221342013-04-17 17:41:13 -0600302 pci_read_config_word(dev, pos + PCI_MSI_DATA_64, &data);
Ben Hutchings30da5522010-07-23 14:56:28 +0100303 } else {
304 msg->address_hi = 0;
Bjorn Helgaas2f221342013-04-17 17:41:13 -0600305 pci_read_config_word(dev, pos + PCI_MSI_DATA_32, &data);
Ben Hutchings30da5522010-07-23 14:56:28 +0100306 }
307 msg->data = data;
308 }
Eric W. Biederman0366f8f2006-10-04 02:16:33 -0700309}
310
Jiang Liu83a18912014-11-09 23:10:34 +0800311void __pci_write_msi_msg(struct msi_desc *entry, struct msi_msg *msg)
Yinghai Lu3145e942008-12-05 18:58:34 -0800312{
Jiang Liue39758e2015-07-09 16:00:43 +0800313 struct pci_dev *dev = msi_desc_to_pci_dev(entry);
314
315 if (dev->current_state != PCI_D0) {
Ben Hutchingsfcd097f2010-06-17 20:16:36 +0100316 /* Don't touch the hardware now */
317 } else if (entry->msi_attrib.is_msix) {
Matthew Wilcox24d27552009-03-17 08:54:06 -0400318 void __iomem *base;
319 base = entry->mask_base +
320 entry->msi_attrib.entry_nr * PCI_MSIX_ENTRY_SIZE;
321
Hidetoshi Seto2c21fd42009-06-23 17:40:04 +0900322 writel(msg->address_lo, base + PCI_MSIX_ENTRY_LOWER_ADDR);
323 writel(msg->address_hi, base + PCI_MSIX_ENTRY_UPPER_ADDR);
324 writel(msg->data, base + PCI_MSIX_ENTRY_DATA);
Matthew Wilcox24d27552009-03-17 08:54:06 -0400325 } else {
Bjorn Helgaasf5322162013-04-17 17:34:36 -0600326 int pos = dev->msi_cap;
Matthew Wilcox1c8d7b02009-03-17 08:54:10 -0400327 u16 msgctl;
328
Bjorn Helgaasf84ecd22013-04-17 17:38:32 -0600329 pci_read_config_word(dev, pos + PCI_MSI_FLAGS, &msgctl);
Matthew Wilcox1c8d7b02009-03-17 08:54:10 -0400330 msgctl &= ~PCI_MSI_FLAGS_QSIZE;
331 msgctl |= entry->msi_attrib.multiple << 4;
Bjorn Helgaasf84ecd22013-04-17 17:38:32 -0600332 pci_write_config_word(dev, pos + PCI_MSI_FLAGS, msgctl);
Eric W. Biederman0366f8f2006-10-04 02:16:33 -0700333
Bjorn Helgaas9925ad02013-04-17 17:39:57 -0600334 pci_write_config_dword(dev, pos + PCI_MSI_ADDRESS_LO,
335 msg->address_lo);
Eric W. Biederman0366f8f2006-10-04 02:16:33 -0700336 if (entry->msi_attrib.is_64) {
Bjorn Helgaas9925ad02013-04-17 17:39:57 -0600337 pci_write_config_dword(dev, pos + PCI_MSI_ADDRESS_HI,
338 msg->address_hi);
Bjorn Helgaas2f221342013-04-17 17:41:13 -0600339 pci_write_config_word(dev, pos + PCI_MSI_DATA_64,
340 msg->data);
Eric W. Biederman0366f8f2006-10-04 02:16:33 -0700341 } else {
Bjorn Helgaas2f221342013-04-17 17:41:13 -0600342 pci_write_config_word(dev, pos + PCI_MSI_DATA_32,
343 msg->data);
Eric W. Biederman0366f8f2006-10-04 02:16:33 -0700344 }
Eric W. Biederman0366f8f2006-10-04 02:16:33 -0700345 }
Eric W. Biederman392ee1e2007-03-08 13:04:57 -0700346 entry->msg = *msg;
Eric W. Biederman0366f8f2006-10-04 02:16:33 -0700347}
348
Jiang Liu83a18912014-11-09 23:10:34 +0800349void pci_write_msi_msg(unsigned int irq, struct msi_msg *msg)
Yinghai Lu3145e942008-12-05 18:58:34 -0800350{
Thomas Gleixnerdced35a2011-03-28 17:49:12 +0200351 struct msi_desc *entry = irq_get_msi_desc(irq);
Yinghai Lu3145e942008-12-05 18:58:34 -0800352
Jiang Liu83a18912014-11-09 23:10:34 +0800353 __pci_write_msi_msg(entry, msg);
Yinghai Lu3145e942008-12-05 18:58:34 -0800354}
Jiang Liu83a18912014-11-09 23:10:34 +0800355EXPORT_SYMBOL_GPL(pci_write_msi_msg);
Yinghai Lu3145e942008-12-05 18:58:34 -0800356
Hidetoshi Setof56e4482009-08-06 11:32:51 +0900357static void free_msi_irqs(struct pci_dev *dev)
358{
Jiang Liu5004e982015-07-09 16:00:41 +0800359 struct list_head *msi_list = dev_to_msi_list(&dev->dev);
Hidetoshi Setof56e4482009-08-06 11:32:51 +0900360 struct msi_desc *entry, *tmp;
Greg Kroah-Hartman1c51b502013-12-19 12:30:17 -0800361 struct attribute **msi_attrs;
362 struct device_attribute *dev_attr;
Jiang Liu63a7b172014-11-06 22:20:32 +0800363 int i, count = 0;
Hidetoshi Setof56e4482009-08-06 11:32:51 +0900364
Jiang Liu5004e982015-07-09 16:00:41 +0800365 for_each_pci_msi_entry(entry, dev)
Jiang Liu63a7b172014-11-06 22:20:32 +0800366 if (entry->irq)
367 for (i = 0; i < entry->nvec_used; i++)
368 BUG_ON(irq_has_action(entry->irq + i));
Hidetoshi Setof56e4482009-08-06 11:32:51 +0900369
Jiang Liu8e047ad2014-11-15 22:24:07 +0800370 pci_msi_teardown_msi_irqs(dev);
Hidetoshi Setof56e4482009-08-06 11:32:51 +0900371
Jiang Liu5004e982015-07-09 16:00:41 +0800372 list_for_each_entry_safe(entry, tmp, msi_list, list) {
Hidetoshi Setof56e4482009-08-06 11:32:51 +0900373 if (entry->msi_attrib.is_msix) {
Jiang Liu5004e982015-07-09 16:00:41 +0800374 if (list_is_last(&entry->list, msi_list))
Hidetoshi Setof56e4482009-08-06 11:32:51 +0900375 iounmap(entry->mask_base);
376 }
Neil Horman424eb392012-01-03 10:29:54 -0500377
Hidetoshi Setof56e4482009-08-06 11:32:51 +0900378 list_del(&entry->list);
379 kfree(entry);
380 }
Greg Kroah-Hartman1c51b502013-12-19 12:30:17 -0800381
382 if (dev->msi_irq_groups) {
383 sysfs_remove_groups(&dev->dev.kobj, dev->msi_irq_groups);
384 msi_attrs = dev->msi_irq_groups[0]->attrs;
Alexei Starovoitovb701c0b2014-06-04 15:49:50 -0700385 while (msi_attrs[count]) {
Greg Kroah-Hartman1c51b502013-12-19 12:30:17 -0800386 dev_attr = container_of(msi_attrs[count],
387 struct device_attribute, attr);
388 kfree(dev_attr->attr.name);
389 kfree(dev_attr);
390 ++count;
391 }
392 kfree(msi_attrs);
393 kfree(dev->msi_irq_groups[0]);
394 kfree(dev->msi_irq_groups);
395 dev->msi_irq_groups = NULL;
396 }
Hidetoshi Setof56e4482009-08-06 11:32:51 +0900397}
Satoru Takeuchic54c1872007-01-18 13:50:05 +0900398
David Millerba698ad2007-10-25 01:16:30 -0700399static void pci_intx_for_msi(struct pci_dev *dev, int enable)
400{
401 if (!(dev->dev_flags & PCI_DEV_FLAGS_MSI_INTX_DISABLE_BUG))
402 pci_intx(dev, enable);
403}
404
Michael Ellerman8fed4b62007-01-25 19:34:08 +1100405static void __pci_restore_msi_state(struct pci_dev *dev)
Shaohua Li41017f02006-02-08 17:11:38 +0800406{
Shaohua Li41017f02006-02-08 17:11:38 +0800407 u16 control;
Eric W. Biederman392ee1e2007-03-08 13:04:57 -0700408 struct msi_desc *entry;
Shaohua Li41017f02006-02-08 17:11:38 +0800409
Eric W. Biedermanb1cbf4e2007-03-05 00:30:10 -0800410 if (!dev->msi_enabled)
411 return;
412
Thomas Gleixnerdced35a2011-03-28 17:49:12 +0200413 entry = irq_get_msi_desc(dev->irq);
Shaohua Li41017f02006-02-08 17:11:38 +0800414
David Millerba698ad2007-10-25 01:16:30 -0700415 pci_intx_for_msi(dev, 0);
Michael S. Tsirkin61b64ab2015-05-07 09:52:21 -0500416 pci_msi_set_enable(dev, 0);
DuanZhenzhongac8344c2013-12-04 13:09:16 +0800417 arch_restore_msi_irqs(dev);
Eric W. Biederman392ee1e2007-03-08 13:04:57 -0700418
Bjorn Helgaasf5322162013-04-17 17:34:36 -0600419 pci_read_config_word(dev, dev->msi_cap + PCI_MSI_FLAGS, &control);
Yijing Wang31ea5d42014-06-19 16:30:30 +0800420 msi_mask_irq(entry, msi_mask(entry->msi_attrib.multi_cap),
421 entry->masked);
Jesse Barnesabad2ec2008-08-07 08:52:37 -0700422 control &= ~PCI_MSI_FLAGS_QSIZE;
Matthew Wilcox1c8d7b02009-03-17 08:54:10 -0400423 control |= (entry->msi_attrib.multiple << 4) | PCI_MSI_FLAGS_ENABLE;
Bjorn Helgaasf5322162013-04-17 17:34:36 -0600424 pci_write_config_word(dev, dev->msi_cap + PCI_MSI_FLAGS, control);
Michael Ellerman8fed4b62007-01-25 19:34:08 +1100425}
426
427static void __pci_restore_msix_state(struct pci_dev *dev)
Shaohua Li41017f02006-02-08 17:11:38 +0800428{
Shaohua Li41017f02006-02-08 17:11:38 +0800429 struct msi_desc *entry;
Shaohua Li41017f02006-02-08 17:11:38 +0800430
Eric W. Biedermanded86d82007-01-28 12:42:52 -0700431 if (!dev->msix_enabled)
432 return;
Jiang Liu5004e982015-07-09 16:00:41 +0800433 BUG_ON(list_empty(dev_to_msi_list(&dev->dev)));
Eric W. Biedermanded86d82007-01-28 12:42:52 -0700434
Shaohua Li41017f02006-02-08 17:11:38 +0800435 /* route the table */
David Millerba698ad2007-10-25 01:16:30 -0700436 pci_intx_for_msi(dev, 0);
Michael S. Tsirkin61b64ab2015-05-07 09:52:21 -0500437 pci_msix_clear_and_set_ctrl(dev, 0,
Yijing Wang66f0d0c2014-06-19 16:29:53 +0800438 PCI_MSIX_FLAGS_ENABLE | PCI_MSIX_FLAGS_MASKALL);
Shaohua Li41017f02006-02-08 17:11:38 +0800439
DuanZhenzhongac8344c2013-12-04 13:09:16 +0800440 arch_restore_msi_irqs(dev);
Jiang Liu5004e982015-07-09 16:00:41 +0800441 for_each_pci_msi_entry(entry, dev)
Matthew Wilcoxf2440d92009-03-17 08:54:09 -0400442 msix_mask_irq(entry, entry->masked);
Shaohua Li41017f02006-02-08 17:11:38 +0800443
Michael S. Tsirkin61b64ab2015-05-07 09:52:21 -0500444 pci_msix_clear_and_set_ctrl(dev, PCI_MSIX_FLAGS_MASKALL, 0);
Shaohua Li41017f02006-02-08 17:11:38 +0800445}
Michael Ellerman8fed4b62007-01-25 19:34:08 +1100446
447void pci_restore_msi_state(struct pci_dev *dev)
448{
449 __pci_restore_msi_state(dev);
450 __pci_restore_msix_state(dev);
451}
Linas Vepstas94688cf2007-11-07 15:43:59 -0600452EXPORT_SYMBOL_GPL(pci_restore_msi_state);
Shaohua Li41017f02006-02-08 17:11:38 +0800453
Greg Kroah-Hartman1c51b502013-12-19 12:30:17 -0800454static ssize_t msi_mode_show(struct device *dev, struct device_attribute *attr,
Neil Hormanda8d1c82011-10-06 14:08:18 -0400455 char *buf)
456{
Greg Kroah-Hartman1c51b502013-12-19 12:30:17 -0800457 struct msi_desc *entry;
458 unsigned long irq;
459 int retval;
460
461 retval = kstrtoul(attr->attr.name, 10, &irq);
462 if (retval)
463 return retval;
464
Yijing Wange11ece52014-07-08 10:09:19 +0800465 entry = irq_get_msi_desc(irq);
466 if (entry)
467 return sprintf(buf, "%s\n",
468 entry->msi_attrib.is_msix ? "msix" : "msi");
469
Greg Kroah-Hartman1c51b502013-12-19 12:30:17 -0800470 return -ENODEV;
Neil Hormanda8d1c82011-10-06 14:08:18 -0400471}
472
Neil Hormanda8d1c82011-10-06 14:08:18 -0400473static int populate_msi_sysfs(struct pci_dev *pdev)
474{
Greg Kroah-Hartman1c51b502013-12-19 12:30:17 -0800475 struct attribute **msi_attrs;
476 struct attribute *msi_attr;
477 struct device_attribute *msi_dev_attr;
478 struct attribute_group *msi_irq_group;
479 const struct attribute_group **msi_irq_groups;
Neil Hormanda8d1c82011-10-06 14:08:18 -0400480 struct msi_desc *entry;
Greg Kroah-Hartman1c51b502013-12-19 12:30:17 -0800481 int ret = -ENOMEM;
482 int num_msi = 0;
Neil Hormanda8d1c82011-10-06 14:08:18 -0400483 int count = 0;
Romain Bezuta8676062015-09-24 01:31:16 +0200484 int i;
Neil Hormanda8d1c82011-10-06 14:08:18 -0400485
Greg Kroah-Hartman1c51b502013-12-19 12:30:17 -0800486 /* Determine how many msi entries we have */
Jiang Liu5004e982015-07-09 16:00:41 +0800487 for_each_pci_msi_entry(entry, pdev)
Romain Bezuta8676062015-09-24 01:31:16 +0200488 num_msi += entry->nvec_used;
Greg Kroah-Hartman1c51b502013-12-19 12:30:17 -0800489 if (!num_msi)
490 return 0;
491
492 /* Dynamically create the MSI attributes for the PCI device */
493 msi_attrs = kzalloc(sizeof(void *) * (num_msi + 1), GFP_KERNEL);
494 if (!msi_attrs)
495 return -ENOMEM;
Jiang Liu5004e982015-07-09 16:00:41 +0800496 for_each_pci_msi_entry(entry, pdev) {
Romain Bezuta8676062015-09-24 01:31:16 +0200497 for (i = 0; i < entry->nvec_used; i++) {
498 msi_dev_attr = kzalloc(sizeof(*msi_dev_attr), GFP_KERNEL);
499 if (!msi_dev_attr)
500 goto error_attrs;
501 msi_attrs[count] = &msi_dev_attr->attr;
Greg Kroah-Hartman86bb4f62014-02-13 10:47:20 -0700502
Romain Bezuta8676062015-09-24 01:31:16 +0200503 sysfs_attr_init(&msi_dev_attr->attr);
504 msi_dev_attr->attr.name = kasprintf(GFP_KERNEL, "%d",
505 entry->irq + i);
506 if (!msi_dev_attr->attr.name)
507 goto error_attrs;
508 msi_dev_attr->attr.mode = S_IRUGO;
509 msi_dev_attr->show = msi_mode_show;
510 ++count;
511 }
Greg Kroah-Hartman1c51b502013-12-19 12:30:17 -0800512 }
513
514 msi_irq_group = kzalloc(sizeof(*msi_irq_group), GFP_KERNEL);
515 if (!msi_irq_group)
516 goto error_attrs;
517 msi_irq_group->name = "msi_irqs";
518 msi_irq_group->attrs = msi_attrs;
519
520 msi_irq_groups = kzalloc(sizeof(void *) * 2, GFP_KERNEL);
521 if (!msi_irq_groups)
522 goto error_irq_group;
523 msi_irq_groups[0] = msi_irq_group;
524
525 ret = sysfs_create_groups(&pdev->dev.kobj, msi_irq_groups);
526 if (ret)
527 goto error_irq_groups;
528 pdev->msi_irq_groups = msi_irq_groups;
Neil Hormanda8d1c82011-10-06 14:08:18 -0400529
530 return 0;
531
Greg Kroah-Hartman1c51b502013-12-19 12:30:17 -0800532error_irq_groups:
533 kfree(msi_irq_groups);
534error_irq_group:
535 kfree(msi_irq_group);
536error_attrs:
537 count = 0;
538 msi_attr = msi_attrs[count];
539 while (msi_attr) {
540 msi_dev_attr = container_of(msi_attr, struct device_attribute, attr);
541 kfree(msi_attr->name);
542 kfree(msi_dev_attr);
543 ++count;
544 msi_attr = msi_attrs[count];
Neil Hormanda8d1c82011-10-06 14:08:18 -0400545 }
Greg Kroah-Hartman29237752014-02-13 10:47:35 -0700546 kfree(msi_attrs);
Neil Hormanda8d1c82011-10-06 14:08:18 -0400547 return ret;
548}
549
Jiang Liu63a7b172014-11-06 22:20:32 +0800550static struct msi_desc *msi_setup_entry(struct pci_dev *dev, int nvec)
Yijing Wangd873b4d2014-07-08 10:07:23 +0800551{
552 u16 control;
553 struct msi_desc *entry;
554
555 /* MSI Entry Initialization */
Jiang Liuaa48b6f2015-07-09 16:00:47 +0800556 entry = alloc_msi_entry(&dev->dev);
Yijing Wangd873b4d2014-07-08 10:07:23 +0800557 if (!entry)
558 return NULL;
559
560 pci_read_config_word(dev, dev->msi_cap + PCI_MSI_FLAGS, &control);
561
562 entry->msi_attrib.is_msix = 0;
563 entry->msi_attrib.is_64 = !!(control & PCI_MSI_FLAGS_64BIT);
564 entry->msi_attrib.entry_nr = 0;
565 entry->msi_attrib.maskbit = !!(control & PCI_MSI_FLAGS_MASKBIT);
566 entry->msi_attrib.default_irq = dev->irq; /* Save IOAPIC IRQ */
Yijing Wangd873b4d2014-07-08 10:07:23 +0800567 entry->msi_attrib.multi_cap = (control & PCI_MSI_FLAGS_QMASK) >> 1;
Jiang Liu63a7b172014-11-06 22:20:32 +0800568 entry->msi_attrib.multiple = ilog2(__roundup_pow_of_two(nvec));
569 entry->nvec_used = nvec;
Yijing Wangd873b4d2014-07-08 10:07:23 +0800570
571 if (control & PCI_MSI_FLAGS_64BIT)
572 entry->mask_pos = dev->msi_cap + PCI_MSI_MASK_64;
573 else
574 entry->mask_pos = dev->msi_cap + PCI_MSI_MASK_32;
575
576 /* Save the initial mask status */
577 if (entry->msi_attrib.maskbit)
578 pci_read_config_dword(dev, entry->mask_pos, &entry->masked);
579
580 return entry;
581}
582
Benjamin Herrenschmidtf144d142014-10-03 15:13:24 +1000583static int msi_verify_entries(struct pci_dev *dev)
584{
585 struct msi_desc *entry;
586
Jiang Liu5004e982015-07-09 16:00:41 +0800587 for_each_pci_msi_entry(entry, dev) {
Benjamin Herrenschmidtf144d142014-10-03 15:13:24 +1000588 if (!dev->no_64bit_msi || !entry->msg.address_hi)
589 continue;
590 dev_err(&dev->dev, "Device has broken 64-bit MSI but arch"
591 " tried to assign one above 4G\n");
592 return -EIO;
593 }
594 return 0;
595}
596
Linus Torvalds1da177e2005-04-16 15:20:36 -0700597/**
598 * msi_capability_init - configure device's MSI capability structure
599 * @dev: pointer to the pci_dev data structure of MSI device function
Matthew Wilcox1c8d7b02009-03-17 08:54:10 -0400600 * @nvec: number of interrupts to allocate
Linus Torvalds1da177e2005-04-16 15:20:36 -0700601 *
Matthew Wilcox1c8d7b02009-03-17 08:54:10 -0400602 * Setup the MSI capability structure of the device with the requested
603 * number of interrupts. A return value of zero indicates the successful
604 * setup of an entry with the new MSI irq. A negative return value indicates
605 * an error, and a positive return value indicates the number of interrupts
606 * which could have been allocated.
607 */
608static int msi_capability_init(struct pci_dev *dev, int nvec)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700609{
610 struct msi_desc *entry;
Gavin Shanf4651362013-04-04 16:54:32 +0000611 int ret;
Matthew Wilcoxf2440d92009-03-17 08:54:09 -0400612 unsigned mask;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700613
Michael S. Tsirkin61b64ab2015-05-07 09:52:21 -0500614 pci_msi_set_enable(dev, 0); /* Disable MSI during set up */
Matthew Wilcox110828c2009-06-16 06:31:45 -0600615
Jiang Liu63a7b172014-11-06 22:20:32 +0800616 entry = msi_setup_entry(dev, nvec);
Eric W. Biedermanf7feaca2007-01-28 12:56:37 -0700617 if (!entry)
618 return -ENOMEM;
Eric W. Biederman1ce03372006-10-04 02:16:41 -0700619
Matthew Wilcoxf2440d92009-03-17 08:54:09 -0400620 /* All MSIs are unmasked by default, Mask them all */
Yijing Wang31ea5d42014-06-19 16:30:30 +0800621 mask = msi_mask(entry->msi_attrib.multi_cap);
Matthew Wilcoxf2440d92009-03-17 08:54:09 -0400622 msi_mask_irq(entry, mask, mask);
623
Jiang Liu5004e982015-07-09 16:00:41 +0800624 list_add_tail(&entry->list, dev_to_msi_list(&dev->dev));
Michael Ellerman9c831332007-04-18 19:39:21 +1000625
Linus Torvalds1da177e2005-04-16 15:20:36 -0700626 /* Configure MSI capability structure */
Jiang Liu8e047ad2014-11-15 22:24:07 +0800627 ret = pci_msi_setup_msi_irqs(dev, nvec, PCI_CAP_ID_MSI);
Michael Ellerman7fe37302007-04-18 19:39:21 +1000628 if (ret) {
Hidetoshi Seto7ba19302009-06-23 17:39:27 +0900629 msi_mask_irq(entry, mask, ~mask);
Hidetoshi Setof56e4482009-08-06 11:32:51 +0900630 free_msi_irqs(dev);
Michael Ellerman7fe37302007-04-18 19:39:21 +1000631 return ret;
Mark Maulefd58e552006-04-10 21:17:48 -0500632 }
Eric W. Biedermanf7feaca2007-01-28 12:56:37 -0700633
Benjamin Herrenschmidtf144d142014-10-03 15:13:24 +1000634 ret = msi_verify_entries(dev);
635 if (ret) {
636 msi_mask_irq(entry, mask, ~mask);
637 free_msi_irqs(dev);
638 return ret;
639 }
640
Neil Hormanda8d1c82011-10-06 14:08:18 -0400641 ret = populate_msi_sysfs(dev);
642 if (ret) {
643 msi_mask_irq(entry, mask, ~mask);
644 free_msi_irqs(dev);
645 return ret;
646 }
647
Linus Torvalds1da177e2005-04-16 15:20:36 -0700648 /* Set MSI enabled bits */
David Millerba698ad2007-10-25 01:16:30 -0700649 pci_intx_for_msi(dev, 0);
Michael S. Tsirkin61b64ab2015-05-07 09:52:21 -0500650 pci_msi_set_enable(dev, 1);
Eric W. Biedermanb1cbf4e2007-03-05 00:30:10 -0800651 dev->msi_enabled = 1;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700652
Jiang Liu5f226992015-07-30 14:00:08 -0500653 pcibios_free_irq(dev);
Michael Ellerman7fe37302007-04-18 19:39:21 +1000654 dev->irq = entry->irq;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700655 return 0;
656}
657
Gavin Shan520fe9d2013-04-04 16:54:33 +0000658static void __iomem *msix_map_region(struct pci_dev *dev, unsigned nr_entries)
Hidetoshi Seto5a05a9d2009-08-06 11:34:34 +0900659{
Kenji Kaneshige4302e0f2010-06-17 10:42:44 +0900660 resource_size_t phys_addr;
Hidetoshi Seto5a05a9d2009-08-06 11:34:34 +0900661 u32 table_offset;
Yijing Wang6a878e52015-01-28 09:52:17 +0800662 unsigned long flags;
Hidetoshi Seto5a05a9d2009-08-06 11:34:34 +0900663 u8 bir;
664
Bjorn Helgaas909094c2013-04-17 17:43:40 -0600665 pci_read_config_dword(dev, dev->msix_cap + PCI_MSIX_TABLE,
666 &table_offset);
Bjorn Helgaas4d187602013-04-17 18:10:07 -0600667 bir = (u8)(table_offset & PCI_MSIX_TABLE_BIR);
Yijing Wang6a878e52015-01-28 09:52:17 +0800668 flags = pci_resource_flags(dev, bir);
669 if (!flags || (flags & IORESOURCE_UNSET))
670 return NULL;
671
Bjorn Helgaas4d187602013-04-17 18:10:07 -0600672 table_offset &= PCI_MSIX_TABLE_OFFSET;
Hidetoshi Seto5a05a9d2009-08-06 11:34:34 +0900673 phys_addr = pci_resource_start(dev, bir) + table_offset;
674
675 return ioremap_nocache(phys_addr, nr_entries * PCI_MSIX_ENTRY_SIZE);
676}
677
Gavin Shan520fe9d2013-04-04 16:54:33 +0000678static int msix_setup_entries(struct pci_dev *dev, void __iomem *base,
679 struct msix_entry *entries, int nvec)
Hidetoshi Setod9d70702009-08-06 11:35:48 +0900680{
681 struct msi_desc *entry;
682 int i;
683
684 for (i = 0; i < nvec; i++) {
Jiang Liuaa48b6f2015-07-09 16:00:47 +0800685 entry = alloc_msi_entry(&dev->dev);
Hidetoshi Setod9d70702009-08-06 11:35:48 +0900686 if (!entry) {
687 if (!i)
688 iounmap(base);
689 else
690 free_msi_irqs(dev);
691 /* No enough memory. Don't try again */
692 return -ENOMEM;
693 }
694
695 entry->msi_attrib.is_msix = 1;
696 entry->msi_attrib.is_64 = 1;
697 entry->msi_attrib.entry_nr = entries[i].entry;
698 entry->msi_attrib.default_irq = dev->irq;
Hidetoshi Setod9d70702009-08-06 11:35:48 +0900699 entry->mask_base = base;
Jiang Liu63a7b172014-11-06 22:20:32 +0800700 entry->nvec_used = 1;
Hidetoshi Setod9d70702009-08-06 11:35:48 +0900701
Jiang Liu5004e982015-07-09 16:00:41 +0800702 list_add_tail(&entry->list, dev_to_msi_list(&dev->dev));
Hidetoshi Setod9d70702009-08-06 11:35:48 +0900703 }
704
705 return 0;
706}
707
Hidetoshi Seto75cb3422009-08-06 11:35:10 +0900708static void msix_program_entries(struct pci_dev *dev,
Gavin Shan520fe9d2013-04-04 16:54:33 +0000709 struct msix_entry *entries)
Hidetoshi Seto75cb3422009-08-06 11:35:10 +0900710{
711 struct msi_desc *entry;
712 int i = 0;
713
Jiang Liu5004e982015-07-09 16:00:41 +0800714 for_each_pci_msi_entry(entry, dev) {
Hidetoshi Seto75cb3422009-08-06 11:35:10 +0900715 int offset = entries[i].entry * PCI_MSIX_ENTRY_SIZE +
716 PCI_MSIX_ENTRY_VECTOR_CTRL;
717
718 entries[i].vector = entry->irq;
Hidetoshi Seto75cb3422009-08-06 11:35:10 +0900719 entry->masked = readl(entry->mask_base + offset);
720 msix_mask_irq(entry, 1);
721 i++;
722 }
723}
724
Linus Torvalds1da177e2005-04-16 15:20:36 -0700725/**
726 * msix_capability_init - configure device's MSI-X capability
727 * @dev: pointer to the pci_dev data structure of MSI-X device function
Randy Dunlap8f7020d2005-10-23 11:57:38 -0700728 * @entries: pointer to an array of struct msix_entry entries
729 * @nvec: number of @entries
Linus Torvalds1da177e2005-04-16 15:20:36 -0700730 *
Steven Coleeaae4b32005-05-03 18:38:30 -0600731 * Setup the MSI-X capability structure of device function with a
Eric W. Biederman1ce03372006-10-04 02:16:41 -0700732 * single MSI-X irq. A return of zero indicates the successful setup of
733 * requested MSI-X entries with allocated irqs or non-zero for otherwise.
Linus Torvalds1da177e2005-04-16 15:20:36 -0700734 **/
735static int msix_capability_init(struct pci_dev *dev,
736 struct msix_entry *entries, int nvec)
737{
Gavin Shan520fe9d2013-04-04 16:54:33 +0000738 int ret;
Hidetoshi Seto5a05a9d2009-08-06 11:34:34 +0900739 u16 control;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700740 void __iomem *base;
741
Matthew Wilcoxf5982822009-06-18 19:15:59 -0700742 /* Ensure MSI-X is disabled while it is set up */
Michael S. Tsirkin61b64ab2015-05-07 09:52:21 -0500743 pci_msix_clear_and_set_ctrl(dev, PCI_MSIX_FLAGS_ENABLE, 0);
Matthew Wilcoxf5982822009-06-18 19:15:59 -0700744
Yijing Wang66f0d0c2014-06-19 16:29:53 +0800745 pci_read_config_word(dev, dev->msix_cap + PCI_MSIX_FLAGS, &control);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700746 /* Request & Map MSI-X table region */
Bjorn Helgaas527eee22013-04-17 17:44:48 -0600747 base = msix_map_region(dev, msix_table_size(control));
Hidetoshi Seto5a05a9d2009-08-06 11:34:34 +0900748 if (!base)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700749 return -ENOMEM;
750
Gavin Shan520fe9d2013-04-04 16:54:33 +0000751 ret = msix_setup_entries(dev, base, entries, nvec);
Hidetoshi Setod9d70702009-08-06 11:35:48 +0900752 if (ret)
753 return ret;
Michael Ellerman9c831332007-04-18 19:39:21 +1000754
Jiang Liu8e047ad2014-11-15 22:24:07 +0800755 ret = pci_msi_setup_msi_irqs(dev, nvec, PCI_CAP_ID_MSIX);
Hidetoshi Seto583871d2009-08-06 11:33:39 +0900756 if (ret)
Alexander Gordeev2adc7902013-12-16 09:34:56 +0100757 goto out_avail;
Michael Ellerman9c831332007-04-18 19:39:21 +1000758
Benjamin Herrenschmidtf144d142014-10-03 15:13:24 +1000759 /* Check if all MSI entries honor device restrictions */
760 ret = msi_verify_entries(dev);
761 if (ret)
762 goto out_free;
763
Matthew Wilcoxf5982822009-06-18 19:15:59 -0700764 /*
765 * Some devices require MSI-X to be enabled before we can touch the
766 * MSI-X registers. We need to mask all the vectors to prevent
767 * interrupts coming in before they're fully set up.
768 */
Michael S. Tsirkin61b64ab2015-05-07 09:52:21 -0500769 pci_msix_clear_and_set_ctrl(dev, 0,
Yijing Wang66f0d0c2014-06-19 16:29:53 +0800770 PCI_MSIX_FLAGS_MASKALL | PCI_MSIX_FLAGS_ENABLE);
Matthew Wilcoxf5982822009-06-18 19:15:59 -0700771
Hidetoshi Seto75cb3422009-08-06 11:35:10 +0900772 msix_program_entries(dev, entries);
Matthew Wilcoxf5982822009-06-18 19:15:59 -0700773
Neil Hormanda8d1c82011-10-06 14:08:18 -0400774 ret = populate_msi_sysfs(dev);
Alexander Gordeev2adc7902013-12-16 09:34:56 +0100775 if (ret)
776 goto out_free;
Neil Hormanda8d1c82011-10-06 14:08:18 -0400777
Matthew Wilcoxf5982822009-06-18 19:15:59 -0700778 /* Set MSI-X enabled bits and unmask the function */
David Millerba698ad2007-10-25 01:16:30 -0700779 pci_intx_for_msi(dev, 0);
Eric W. Biedermanb1cbf4e2007-03-05 00:30:10 -0800780 dev->msix_enabled = 1;
Michael S. Tsirkin61b64ab2015-05-07 09:52:21 -0500781 pci_msix_clear_and_set_ctrl(dev, PCI_MSIX_FLAGS_MASKALL, 0);
Matthew Wilcox8d181012009-05-08 07:13:33 -0600782
Jiang Liu5f226992015-07-30 14:00:08 -0500783 pcibios_free_irq(dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700784 return 0;
Hidetoshi Seto583871d2009-08-06 11:33:39 +0900785
Alexander Gordeev2adc7902013-12-16 09:34:56 +0100786out_avail:
Hidetoshi Seto583871d2009-08-06 11:33:39 +0900787 if (ret < 0) {
788 /*
789 * If we had some success, report the number of irqs
790 * we succeeded in setting up.
791 */
Hidetoshi Setod9d70702009-08-06 11:35:48 +0900792 struct msi_desc *entry;
Hidetoshi Seto583871d2009-08-06 11:33:39 +0900793 int avail = 0;
794
Jiang Liu5004e982015-07-09 16:00:41 +0800795 for_each_pci_msi_entry(entry, dev) {
Hidetoshi Seto583871d2009-08-06 11:33:39 +0900796 if (entry->irq != 0)
797 avail++;
798 }
799 if (avail != 0)
800 ret = avail;
801 }
802
Alexander Gordeev2adc7902013-12-16 09:34:56 +0100803out_free:
Hidetoshi Seto583871d2009-08-06 11:33:39 +0900804 free_msi_irqs(dev);
805
806 return ret;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700807}
808
809/**
Alexander Gordeeva06cd742014-09-23 12:45:58 -0600810 * pci_msi_supported - check whether MSI may be enabled on a device
Brice Goglin24334a12006-08-31 01:55:07 -0400811 * @dev: pointer to the pci_dev data structure of MSI device function
Michael Ellermanc9953a72007-04-05 17:19:08 +1000812 * @nvec: how many MSIs have been requested ?
Brice Goglin24334a12006-08-31 01:55:07 -0400813 *
Bjorn Helgaasf7625982013-11-14 11:28:18 -0700814 * Look at global flags, the device itself, and its parent buses
Michael Ellerman17bbc122007-04-05 17:19:07 +1000815 * to determine if MSI/-X are supported for the device. If MSI/-X is
Alexander Gordeeva06cd742014-09-23 12:45:58 -0600816 * supported return 1, else return 0.
Brice Goglin24334a12006-08-31 01:55:07 -0400817 **/
Alexander Gordeeva06cd742014-09-23 12:45:58 -0600818static int pci_msi_supported(struct pci_dev *dev, int nvec)
Brice Goglin24334a12006-08-31 01:55:07 -0400819{
820 struct pci_bus *bus;
821
Brice Goglin0306ebf2006-10-05 10:24:31 +0200822 /* MSI must be globally enabled and supported by the device */
Alexander Gordeev27e20602014-09-23 14:25:11 -0600823 if (!pci_msi_enable)
Alexander Gordeeva06cd742014-09-23 12:45:58 -0600824 return 0;
Alexander Gordeev27e20602014-09-23 14:25:11 -0600825
826 if (!dev || dev->no_msi || dev->current_state != PCI_D0)
Alexander Gordeeva06cd742014-09-23 12:45:58 -0600827 return 0;
Brice Goglin24334a12006-08-31 01:55:07 -0400828
Michael Ellerman314e77b2007-04-05 17:19:12 +1000829 /*
830 * You can't ask to have 0 or less MSIs configured.
831 * a) it's stupid ..
832 * b) the list manipulation code assumes nvec >= 1.
833 */
834 if (nvec < 1)
Alexander Gordeeva06cd742014-09-23 12:45:58 -0600835 return 0;
Michael Ellerman314e77b2007-04-05 17:19:12 +1000836
Hidetoshi Seto500559a2009-08-10 10:14:15 +0900837 /*
838 * Any bridge which does NOT route MSI transactions from its
839 * secondary bus to its primary bus must set NO_MSI flag on
Brice Goglin0306ebf2006-10-05 10:24:31 +0200840 * the secondary pci_bus.
841 * We expect only arch-specific PCI host bus controller driver
842 * or quirks for specific PCI bridges to be setting NO_MSI.
843 */
Brice Goglin24334a12006-08-31 01:55:07 -0400844 for (bus = dev->bus; bus; bus = bus->parent)
845 if (bus->bus_flags & PCI_BUS_FLAGS_NO_MSI)
Alexander Gordeeva06cd742014-09-23 12:45:58 -0600846 return 0;
Brice Goglin24334a12006-08-31 01:55:07 -0400847
Alexander Gordeeva06cd742014-09-23 12:45:58 -0600848 return 1;
Brice Goglin24334a12006-08-31 01:55:07 -0400849}
850
851/**
Alexander Gordeevd1ac1d22013-12-30 08:28:13 +0100852 * pci_msi_vec_count - Return the number of MSI vectors a device can send
853 * @dev: device to report about
854 *
855 * This function returns the number of MSI vectors a device requested via
856 * Multiple Message Capable register. It returns a negative errno if the
857 * device is not capable sending MSI interrupts. Otherwise, the call succeeds
858 * and returns a power of two, up to a maximum of 2^5 (32), according to the
859 * MSI specification.
860 **/
861int pci_msi_vec_count(struct pci_dev *dev)
862{
863 int ret;
864 u16 msgctl;
865
866 if (!dev->msi_cap)
867 return -EINVAL;
868
869 pci_read_config_word(dev, dev->msi_cap + PCI_MSI_FLAGS, &msgctl);
870 ret = 1 << ((msgctl & PCI_MSI_FLAGS_QMASK) >> 1);
871
872 return ret;
873}
874EXPORT_SYMBOL(pci_msi_vec_count);
875
Matthew Wilcoxf2440d92009-03-17 08:54:09 -0400876void pci_msi_shutdown(struct pci_dev *dev)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700877{
Matthew Wilcoxf2440d92009-03-17 08:54:09 -0400878 struct msi_desc *desc;
879 u32 mask;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700880
Michael Ellerman128bc5f2007-03-22 21:51:39 +1100881 if (!pci_msi_enable || !dev || !dev->msi_enabled)
Eric W. Biedermanded86d82007-01-28 12:42:52 -0700882 return;
883
Jiang Liu5004e982015-07-09 16:00:41 +0800884 BUG_ON(list_empty(dev_to_msi_list(&dev->dev)));
Jiang Liu4a7cc832015-07-09 16:00:44 +0800885 desc = first_pci_msi_entry(dev);
Matthew Wilcox110828c2009-06-16 06:31:45 -0600886
Michael S. Tsirkin61b64ab2015-05-07 09:52:21 -0500887 pci_msi_set_enable(dev, 0);
David Millerba698ad2007-10-25 01:16:30 -0700888 pci_intx_for_msi(dev, 1);
Eric W. Biedermanb1cbf4e2007-03-05 00:30:10 -0800889 dev->msi_enabled = 0;
Eric W. Biederman7bd007e2006-10-04 02:16:31 -0700890
Hidetoshi Seto12abb8b2009-06-24 12:08:09 +0900891 /* Return the device with MSI unmasked as initial states */
Yijing Wang31ea5d42014-06-19 16:30:30 +0800892 mask = msi_mask(desc->msi_attrib.multi_cap);
Hidetoshi Seto12abb8b2009-06-24 12:08:09 +0900893 /* Keep cached state to be restored */
Thomas Gleixner23ed8d52014-11-23 11:55:58 +0100894 __pci_msi_desc_mask_irq(desc, mask, ~mask);
Michael Ellermane387b9e2007-03-22 21:51:27 +1100895
896 /* Restore dev->irq to its default pin-assertion irq */
Matthew Wilcoxf2440d92009-03-17 08:54:09 -0400897 dev->irq = desc->msi_attrib.default_irq;
Jiang Liu5f226992015-07-30 14:00:08 -0500898 pcibios_alloc_irq(dev);
Yinghai Lud52877c2008-04-23 14:58:09 -0700899}
Matthew Wilcox24d27552009-03-17 08:54:06 -0400900
Hidetoshi Seto500559a2009-08-10 10:14:15 +0900901void pci_disable_msi(struct pci_dev *dev)
Yinghai Lud52877c2008-04-23 14:58:09 -0700902{
Yinghai Lud52877c2008-04-23 14:58:09 -0700903 if (!pci_msi_enable || !dev || !dev->msi_enabled)
904 return;
905
906 pci_msi_shutdown(dev);
Hidetoshi Setof56e4482009-08-06 11:32:51 +0900907 free_msi_irqs(dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700908}
Michael Ellerman4cc086f2007-03-22 21:51:34 +1100909EXPORT_SYMBOL(pci_disable_msi);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700910
Linus Torvalds1da177e2005-04-16 15:20:36 -0700911/**
Alexander Gordeevff1aa432013-12-30 08:28:15 +0100912 * pci_msix_vec_count - return the number of device's MSI-X table entries
Rafael J. Wysockia52e2e32009-01-24 00:21:14 +0100913 * @dev: pointer to the pci_dev data structure of MSI-X device function
Alexander Gordeevff1aa432013-12-30 08:28:15 +0100914 * This function returns the number of device's MSI-X table entries and
915 * therefore the number of MSI-X vectors device is capable of sending.
916 * It returns a negative errno if the device is not capable of sending MSI-X
917 * interrupts.
918 **/
919int pci_msix_vec_count(struct pci_dev *dev)
Rafael J. Wysockia52e2e32009-01-24 00:21:14 +0100920{
Rafael J. Wysockia52e2e32009-01-24 00:21:14 +0100921 u16 control;
922
Gavin Shan520fe9d2013-04-04 16:54:33 +0000923 if (!dev->msix_cap)
Alexander Gordeevff1aa432013-12-30 08:28:15 +0100924 return -EINVAL;
Rafael J. Wysockia52e2e32009-01-24 00:21:14 +0100925
Bjorn Helgaasf84ecd22013-04-17 17:38:32 -0600926 pci_read_config_word(dev, dev->msix_cap + PCI_MSIX_FLAGS, &control);
Bjorn Helgaas527eee22013-04-17 17:44:48 -0600927 return msix_table_size(control);
Rafael J. Wysockia52e2e32009-01-24 00:21:14 +0100928}
Alexander Gordeevff1aa432013-12-30 08:28:15 +0100929EXPORT_SYMBOL(pci_msix_vec_count);
Rafael J. Wysockia52e2e32009-01-24 00:21:14 +0100930
931/**
Linus Torvalds1da177e2005-04-16 15:20:36 -0700932 * pci_enable_msix - configure device's MSI-X capability structure
933 * @dev: pointer to the pci_dev data structure of MSI-X device function
Greg Kroah-Hartman70549ad2005-06-06 23:07:46 -0700934 * @entries: pointer to an array of MSI-X entries
Eric W. Biederman1ce03372006-10-04 02:16:41 -0700935 * @nvec: number of MSI-X irqs requested for allocation by device driver
Linus Torvalds1da177e2005-04-16 15:20:36 -0700936 *
937 * Setup the MSI-X capability structure of device function with the number
Eric W. Biederman1ce03372006-10-04 02:16:41 -0700938 * of requested irqs upon its software driver call to request for
Linus Torvalds1da177e2005-04-16 15:20:36 -0700939 * MSI-X mode enabled on its hardware device function. A return of zero
940 * indicates the successful configuration of MSI-X capability structure
Eric W. Biederman1ce03372006-10-04 02:16:41 -0700941 * with new allocated MSI-X irqs. A return of < 0 indicates a failure.
Linus Torvalds1da177e2005-04-16 15:20:36 -0700942 * Or a return of > 0 indicates that driver request is exceeding the number
Michael S. Tsirkin57fbf522009-05-07 11:28:41 +0300943 * of irqs or MSI-X vectors available. Driver should use the returned value to
944 * re-send its request.
Linus Torvalds1da177e2005-04-16 15:20:36 -0700945 **/
Hidetoshi Seto500559a2009-08-10 10:14:15 +0900946int pci_enable_msix(struct pci_dev *dev, struct msix_entry *entries, int nvec)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700947{
Bjorn Helgaas5ec09402014-09-23 14:38:28 -0600948 int nr_entries;
Eric W. Biedermanded86d82007-01-28 12:42:52 -0700949 int i, j;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700950
Alexander Gordeeva06cd742014-09-23 12:45:58 -0600951 if (!pci_msi_supported(dev, nvec))
952 return -EINVAL;
Michael Ellermanc9953a72007-04-05 17:19:08 +1000953
Alexander Gordeev27e20602014-09-23 14:25:11 -0600954 if (!entries)
955 return -EINVAL;
956
Alexander Gordeevff1aa432013-12-30 08:28:15 +0100957 nr_entries = pci_msix_vec_count(dev);
958 if (nr_entries < 0)
959 return nr_entries;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700960 if (nvec > nr_entries)
Michael S. Tsirkin57fbf522009-05-07 11:28:41 +0300961 return nr_entries;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700962
963 /* Check for any invalid entries */
964 for (i = 0; i < nvec; i++) {
965 if (entries[i].entry >= nr_entries)
966 return -EINVAL; /* invalid entry */
967 for (j = i + 1; j < nvec; j++) {
968 if (entries[i].entry == entries[j].entry)
969 return -EINVAL; /* duplicate entry */
970 }
971 }
Eric W. Biedermanded86d82007-01-28 12:42:52 -0700972 WARN_ON(!!dev->msix_enabled);
Eric W. Biederman7bd007e2006-10-04 02:16:31 -0700973
Eric W. Biederman1ce03372006-10-04 02:16:41 -0700974 /* Check whether driver already requested for MSI irq */
Hidetoshi Seto500559a2009-08-10 10:14:15 +0900975 if (dev->msi_enabled) {
Ryan Desfosses227f0642014-04-18 20:13:50 -0400976 dev_info(&dev->dev, "can't enable MSI-X (MSI IRQ already assigned)\n");
Linus Torvalds1da177e2005-04-16 15:20:36 -0700977 return -EINVAL;
978 }
Bjorn Helgaas5ec09402014-09-23 14:38:28 -0600979 return msix_capability_init(dev, entries, nvec);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700980}
Michael Ellerman4cc086f2007-03-22 21:51:34 +1100981EXPORT_SYMBOL(pci_enable_msix);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700982
Hidetoshi Seto500559a2009-08-10 10:14:15 +0900983void pci_msix_shutdown(struct pci_dev *dev)
Michael Ellermanfc4afc72007-03-22 21:51:33 +1100984{
Hidetoshi Seto12abb8b2009-06-24 12:08:09 +0900985 struct msi_desc *entry;
986
Michael Ellerman128bc5f2007-03-22 21:51:39 +1100987 if (!pci_msi_enable || !dev || !dev->msix_enabled)
Eric W. Biedermanded86d82007-01-28 12:42:52 -0700988 return;
989
Hidetoshi Seto12abb8b2009-06-24 12:08:09 +0900990 /* Return the device with MSI-X masked as initial states */
Jiang Liu5004e982015-07-09 16:00:41 +0800991 for_each_pci_msi_entry(entry, dev) {
Hidetoshi Seto12abb8b2009-06-24 12:08:09 +0900992 /* Keep cached states to be restored */
Thomas Gleixner23ed8d52014-11-23 11:55:58 +0100993 __pci_msix_desc_mask_irq(entry, 1);
Hidetoshi Seto12abb8b2009-06-24 12:08:09 +0900994 }
995
Michael S. Tsirkin61b64ab2015-05-07 09:52:21 -0500996 pci_msix_clear_and_set_ctrl(dev, PCI_MSIX_FLAGS_ENABLE, 0);
David Millerba698ad2007-10-25 01:16:30 -0700997 pci_intx_for_msi(dev, 1);
Eric W. Biedermanb1cbf4e2007-03-05 00:30:10 -0800998 dev->msix_enabled = 0;
Jiang Liu5f226992015-07-30 14:00:08 -0500999 pcibios_alloc_irq(dev);
Yinghai Lud52877c2008-04-23 14:58:09 -07001000}
Hidetoshi Setoc9018512009-08-06 11:31:27 +09001001
Hidetoshi Seto500559a2009-08-10 10:14:15 +09001002void pci_disable_msix(struct pci_dev *dev)
Yinghai Lud52877c2008-04-23 14:58:09 -07001003{
1004 if (!pci_msi_enable || !dev || !dev->msix_enabled)
1005 return;
1006
1007 pci_msix_shutdown(dev);
Hidetoshi Setof56e4482009-08-06 11:32:51 +09001008 free_msi_irqs(dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001009}
Michael Ellerman4cc086f2007-03-22 21:51:34 +11001010EXPORT_SYMBOL(pci_disable_msix);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001011
Matthew Wilcox309e57d2006-03-05 22:33:34 -07001012void pci_no_msi(void)
1013{
1014 pci_msi_enable = 0;
1015}
Michael Ellermanc9953a72007-04-05 17:19:08 +10001016
Andrew Patterson07ae95f2008-11-10 15:31:05 -07001017/**
1018 * pci_msi_enabled - is MSI enabled?
1019 *
1020 * Returns true if MSI has not been disabled by the command-line option
1021 * pci=nomsi.
1022 **/
1023int pci_msi_enabled(void)
1024{
1025 return pci_msi_enable;
1026}
1027EXPORT_SYMBOL(pci_msi_enabled);
1028
Alexander Gordeev302a2522013-12-30 08:28:16 +01001029/**
1030 * pci_enable_msi_range - configure device's MSI capability structure
1031 * @dev: device to configure
1032 * @minvec: minimal number of interrupts to configure
1033 * @maxvec: maximum number of interrupts to configure
1034 *
1035 * This function tries to allocate a maximum possible number of interrupts in a
1036 * range between @minvec and @maxvec. It returns a negative errno if an error
1037 * occurs. If it succeeds, it returns the actual number of interrupts allocated
1038 * and updates the @dev's irq member to the lowest new interrupt number;
1039 * the other interrupt numbers allocated to this device are consecutive.
1040 **/
1041int pci_enable_msi_range(struct pci_dev *dev, int minvec, int maxvec)
1042{
Alexander Gordeev034cd972014-04-14 15:28:35 +02001043 int nvec;
Alexander Gordeev302a2522013-12-30 08:28:16 +01001044 int rc;
1045
Alexander Gordeeva06cd742014-09-23 12:45:58 -06001046 if (!pci_msi_supported(dev, minvec))
1047 return -EINVAL;
Alexander Gordeev034cd972014-04-14 15:28:35 +02001048
1049 WARN_ON(!!dev->msi_enabled);
1050
1051 /* Check whether driver already requested MSI-X irqs */
1052 if (dev->msix_enabled) {
1053 dev_info(&dev->dev,
1054 "can't enable MSI (MSI-X already enabled)\n");
1055 return -EINVAL;
1056 }
1057
Alexander Gordeev302a2522013-12-30 08:28:16 +01001058 if (maxvec < minvec)
1059 return -ERANGE;
1060
Alexander Gordeev034cd972014-04-14 15:28:35 +02001061 nvec = pci_msi_vec_count(dev);
1062 if (nvec < 0)
1063 return nvec;
1064 else if (nvec < minvec)
1065 return -EINVAL;
1066 else if (nvec > maxvec)
1067 nvec = maxvec;
1068
Alexander Gordeev302a2522013-12-30 08:28:16 +01001069 do {
Alexander Gordeev034cd972014-04-14 15:28:35 +02001070 rc = msi_capability_init(dev, nvec);
Alexander Gordeev302a2522013-12-30 08:28:16 +01001071 if (rc < 0) {
1072 return rc;
1073 } else if (rc > 0) {
1074 if (rc < minvec)
1075 return -ENOSPC;
1076 nvec = rc;
1077 }
1078 } while (rc);
1079
1080 return nvec;
1081}
1082EXPORT_SYMBOL(pci_enable_msi_range);
1083
1084/**
1085 * pci_enable_msix_range - configure device's MSI-X capability structure
1086 * @dev: pointer to the pci_dev data structure of MSI-X device function
1087 * @entries: pointer to an array of MSI-X entries
1088 * @minvec: minimum number of MSI-X irqs requested
1089 * @maxvec: maximum number of MSI-X irqs requested
1090 *
1091 * Setup the MSI-X capability structure of device function with a maximum
1092 * possible number of interrupts in the range between @minvec and @maxvec
1093 * upon its software driver call to request for MSI-X mode enabled on its
1094 * hardware device function. It returns a negative errno if an error occurs.
1095 * If it succeeds, it returns the actual number of interrupts allocated and
1096 * indicates the successful configuration of MSI-X capability structure
1097 * with new allocated MSI-X interrupts.
1098 **/
1099int pci_enable_msix_range(struct pci_dev *dev, struct msix_entry *entries,
1100 int minvec, int maxvec)
1101{
1102 int nvec = maxvec;
1103 int rc;
1104
1105 if (maxvec < minvec)
1106 return -ERANGE;
1107
1108 do {
1109 rc = pci_enable_msix(dev, entries, nvec);
1110 if (rc < 0) {
1111 return rc;
1112 } else if (rc > 0) {
1113 if (rc < minvec)
1114 return -ENOSPC;
1115 nvec = rc;
1116 }
1117 } while (rc);
1118
1119 return nvec;
1120}
1121EXPORT_SYMBOL(pci_enable_msix_range);
Jiang Liu3878eae2014-11-11 21:02:18 +08001122
Jiang Liu25a98bd2015-07-09 16:00:45 +08001123struct pci_dev *msi_desc_to_pci_dev(struct msi_desc *desc)
1124{
1125 return to_pci_dev(desc->dev);
1126}
Jake Oshinsa4289dc2015-12-10 17:52:59 +00001127EXPORT_SYMBOL(msi_desc_to_pci_dev);
Jiang Liu25a98bd2015-07-09 16:00:45 +08001128
Jiang Liuc179c9b2015-07-09 16:00:36 +08001129void *msi_desc_to_pci_sysdata(struct msi_desc *desc)
1130{
1131 struct pci_dev *dev = msi_desc_to_pci_dev(desc);
1132
1133 return dev->bus->sysdata;
1134}
1135EXPORT_SYMBOL_GPL(msi_desc_to_pci_sysdata);
1136
Jiang Liu3878eae2014-11-11 21:02:18 +08001137#ifdef CONFIG_PCI_MSI_IRQ_DOMAIN
1138/**
1139 * pci_msi_domain_write_msg - Helper to write MSI message to PCI config space
1140 * @irq_data: Pointer to interrupt data of the MSI interrupt
1141 * @msg: Pointer to the message
1142 */
1143void pci_msi_domain_write_msg(struct irq_data *irq_data, struct msi_msg *msg)
1144{
Jiang Liu507a8832015-06-01 16:05:42 +08001145 struct msi_desc *desc = irq_data_get_msi_desc(irq_data);
Jiang Liu3878eae2014-11-11 21:02:18 +08001146
1147 /*
1148 * For MSI-X desc->irq is always equal to irq_data->irq. For
1149 * MSI only the first interrupt of MULTI MSI passes the test.
1150 */
1151 if (desc->irq == irq_data->irq)
1152 __pci_write_msi_msg(desc, msg);
1153}
1154
1155/**
1156 * pci_msi_domain_calc_hwirq - Generate a unique ID for an MSI source
1157 * @dev: Pointer to the PCI device
1158 * @desc: Pointer to the msi descriptor
1159 *
1160 * The ID number is only used within the irqdomain.
1161 */
1162irq_hw_number_t pci_msi_domain_calc_hwirq(struct pci_dev *dev,
1163 struct msi_desc *desc)
1164{
1165 return (irq_hw_number_t)desc->msi_attrib.entry_nr |
1166 PCI_DEVID(dev->bus->number, dev->devfn) << 11 |
1167 (pci_domain_nr(dev->bus) & 0xFFFFFFFF) << 27;
1168}
1169
1170static inline bool pci_msi_desc_is_multi_msi(struct msi_desc *desc)
1171{
1172 return !desc->msi_attrib.is_msix && desc->nvec_used > 1;
1173}
1174
1175/**
1176 * pci_msi_domain_check_cap - Verify that @domain supports the capabilities for @dev
1177 * @domain: The interrupt domain to check
1178 * @info: The domain info for verification
1179 * @dev: The device to check
1180 *
1181 * Returns:
1182 * 0 if the functionality is supported
1183 * 1 if Multi MSI is requested, but the domain does not support it
1184 * -ENOTSUPP otherwise
1185 */
1186int pci_msi_domain_check_cap(struct irq_domain *domain,
1187 struct msi_domain_info *info, struct device *dev)
1188{
1189 struct msi_desc *desc = first_pci_msi_entry(to_pci_dev(dev));
1190
1191 /* Special handling to support pci_enable_msi_range() */
1192 if (pci_msi_desc_is_multi_msi(desc) &&
1193 !(info->flags & MSI_FLAG_MULTI_PCI_MSI))
1194 return 1;
1195 else if (desc->msi_attrib.is_msix && !(info->flags & MSI_FLAG_PCI_MSIX))
1196 return -ENOTSUPP;
1197
1198 return 0;
1199}
1200
1201static int pci_msi_domain_handle_error(struct irq_domain *domain,
1202 struct msi_desc *desc, int error)
1203{
1204 /* Special handling to support pci_enable_msi_range() */
1205 if (pci_msi_desc_is_multi_msi(desc) && error == -ENOSPC)
1206 return 1;
1207
1208 return error;
1209}
1210
1211#ifdef GENERIC_MSI_DOMAIN_OPS
1212static void pci_msi_domain_set_desc(msi_alloc_info_t *arg,
1213 struct msi_desc *desc)
1214{
1215 arg->desc = desc;
1216 arg->hwirq = pci_msi_domain_calc_hwirq(msi_desc_to_pci_dev(desc),
1217 desc);
1218}
1219#else
1220#define pci_msi_domain_set_desc NULL
1221#endif
1222
1223static struct msi_domain_ops pci_msi_domain_ops_default = {
1224 .set_desc = pci_msi_domain_set_desc,
1225 .msi_check = pci_msi_domain_check_cap,
1226 .handle_error = pci_msi_domain_handle_error,
1227};
1228
1229static void pci_msi_domain_update_dom_ops(struct msi_domain_info *info)
1230{
1231 struct msi_domain_ops *ops = info->ops;
1232
1233 if (ops == NULL) {
1234 info->ops = &pci_msi_domain_ops_default;
1235 } else {
1236 if (ops->set_desc == NULL)
1237 ops->set_desc = pci_msi_domain_set_desc;
1238 if (ops->msi_check == NULL)
1239 ops->msi_check = pci_msi_domain_check_cap;
1240 if (ops->handle_error == NULL)
1241 ops->handle_error = pci_msi_domain_handle_error;
1242 }
1243}
1244
1245static void pci_msi_domain_update_chip_ops(struct msi_domain_info *info)
1246{
1247 struct irq_chip *chip = info->chip;
1248
1249 BUG_ON(!chip);
1250 if (!chip->irq_write_msi_msg)
1251 chip->irq_write_msi_msg = pci_msi_domain_write_msg;
Marc Zyngier0701c532015-10-13 19:14:45 +01001252 if (!chip->irq_mask)
1253 chip->irq_mask = pci_msi_mask_irq;
1254 if (!chip->irq_unmask)
1255 chip->irq_unmask = pci_msi_unmask_irq;
Jiang Liu3878eae2014-11-11 21:02:18 +08001256}
1257
1258/**
Marc Zyngierbe5436c2015-10-13 12:51:44 +01001259 * pci_msi_create_irq_domain - Create a MSI interrupt domain
1260 * @fwnode: Optional fwnode of the interrupt controller
Jiang Liu3878eae2014-11-11 21:02:18 +08001261 * @info: MSI domain info
1262 * @parent: Parent irq domain
1263 *
1264 * Updates the domain and chip ops and creates a MSI interrupt domain.
1265 *
1266 * Returns:
1267 * A domain pointer or NULL in case of failure.
1268 */
Marc Zyngierbe5436c2015-10-13 12:51:44 +01001269struct irq_domain *pci_msi_create_irq_domain(struct fwnode_handle *fwnode,
Jiang Liu3878eae2014-11-11 21:02:18 +08001270 struct msi_domain_info *info,
1271 struct irq_domain *parent)
1272{
Marc Zyngier03808392015-07-28 14:46:09 +01001273 struct irq_domain *domain;
1274
Jiang Liu3878eae2014-11-11 21:02:18 +08001275 if (info->flags & MSI_FLAG_USE_DEF_DOM_OPS)
1276 pci_msi_domain_update_dom_ops(info);
1277 if (info->flags & MSI_FLAG_USE_DEF_CHIP_OPS)
1278 pci_msi_domain_update_chip_ops(info);
1279
Marc Zyngierbe5436c2015-10-13 12:51:44 +01001280 domain = msi_create_irq_domain(fwnode, info, parent);
Marc Zyngier03808392015-07-28 14:46:09 +01001281 if (!domain)
1282 return NULL;
1283
1284 domain->bus_token = DOMAIN_BUS_PCI_MSI;
1285 return domain;
Jiang Liu3878eae2014-11-11 21:02:18 +08001286}
Jake Oshinsa4289dc2015-12-10 17:52:59 +00001287EXPORT_SYMBOL_GPL(pci_msi_create_irq_domain);
Jiang Liu3878eae2014-11-11 21:02:18 +08001288
1289/**
1290 * pci_msi_domain_alloc_irqs - Allocate interrupts for @dev in @domain
1291 * @domain: The interrupt domain to allocate from
1292 * @dev: The device for which to allocate
1293 * @nvec: The number of interrupts to allocate
1294 * @type: Unused to allow simpler migration from the arch_XXX interfaces
1295 *
1296 * Returns:
1297 * A virtual interrupt number or an error code in case of failure
1298 */
1299int pci_msi_domain_alloc_irqs(struct irq_domain *domain, struct pci_dev *dev,
1300 int nvec, int type)
1301{
1302 return msi_domain_alloc_irqs(domain, &dev->dev, nvec);
1303}
1304
1305/**
1306 * pci_msi_domain_free_irqs - Free interrupts for @dev in @domain
1307 * @domain: The interrupt domain
1308 * @dev: The device for which to free interrupts
1309 */
1310void pci_msi_domain_free_irqs(struct irq_domain *domain, struct pci_dev *dev)
1311{
1312 msi_domain_free_irqs(domain, &dev->dev);
1313}
Jiang Liu8e047ad2014-11-15 22:24:07 +08001314
1315/**
1316 * pci_msi_create_default_irq_domain - Create a default MSI interrupt domain
Marc Zyngierbe5436c2015-10-13 12:51:44 +01001317 * @fwnode: Optional fwnode of the interrupt controller
Jiang Liu8e047ad2014-11-15 22:24:07 +08001318 * @info: MSI domain info
1319 * @parent: Parent irq domain
1320 *
1321 * Returns: A domain pointer or NULL in case of failure. If successful
1322 * the default PCI/MSI irqdomain pointer is updated.
1323 */
Marc Zyngierbe5436c2015-10-13 12:51:44 +01001324struct irq_domain *pci_msi_create_default_irq_domain(struct fwnode_handle *fwnode,
Jiang Liu8e047ad2014-11-15 22:24:07 +08001325 struct msi_domain_info *info, struct irq_domain *parent)
1326{
1327 struct irq_domain *domain;
1328
1329 mutex_lock(&pci_msi_domain_lock);
1330 if (pci_msi_default_domain) {
1331 pr_err("PCI: default irq domain for PCI MSI has already been created.\n");
1332 domain = NULL;
1333 } else {
Marc Zyngierbe5436c2015-10-13 12:51:44 +01001334 domain = pci_msi_create_irq_domain(fwnode, info, parent);
Jiang Liu8e047ad2014-11-15 22:24:07 +08001335 pci_msi_default_domain = domain;
1336 }
1337 mutex_unlock(&pci_msi_domain_lock);
1338
1339 return domain;
1340}
David Daneyb6eec9b2015-10-08 15:10:49 -07001341
1342static int get_msi_id_cb(struct pci_dev *pdev, u16 alias, void *data)
1343{
1344 u32 *pa = data;
1345
1346 *pa = alias;
1347 return 0;
1348}
1349/**
1350 * pci_msi_domain_get_msi_rid - Get the MSI requester id (RID)
1351 * @domain: The interrupt domain
1352 * @pdev: The PCI device.
1353 *
1354 * The RID for a device is formed from the alias, with a firmware
1355 * supplied mapping applied
1356 *
1357 * Returns: The RID.
1358 */
1359u32 pci_msi_domain_get_msi_rid(struct irq_domain *domain, struct pci_dev *pdev)
1360{
1361 struct device_node *of_node;
1362 u32 rid = 0;
1363
1364 pci_for_each_dma_alias(pdev, get_msi_id_cb, &rid);
1365
1366 of_node = irq_domain_get_of_node(domain);
1367 if (of_node)
1368 rid = of_msi_map_rid(&pdev->dev, of_node, rid);
1369
1370 return rid;
1371}
Marc Zyngier54fa97e2015-10-02 14:43:06 +01001372
1373/**
1374 * pci_msi_get_device_domain - Get the MSI domain for a given PCI device
1375 * @pdev: The PCI device
1376 *
1377 * Use the firmware data to find a device-specific MSI domain
1378 * (i.e. not one that is ste as a default).
1379 *
1380 * Returns: The coresponding MSI domain or NULL if none has been found.
1381 */
1382struct irq_domain *pci_msi_get_device_domain(struct pci_dev *pdev)
1383{
1384 u32 rid = 0;
1385
1386 pci_for_each_dma_alias(pdev, get_msi_id_cb, &rid);
1387 return of_msi_map_get_device_domain(&pdev->dev, rid);
1388}
Jiang Liu3878eae2014-11-11 21:02:18 +08001389#endif /* CONFIG_PCI_MSI_IRQ_DOMAIN */