Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1 | /* |
| 2 | * File: msi.c |
| 3 | * Purpose: PCI Message Signaled Interrupt (MSI) |
| 4 | * |
| 5 | * Copyright (C) 2003-2004 Intel |
| 6 | * Copyright (C) Tom Long Nguyen (tom.l.nguyen@intel.com) |
| 7 | */ |
| 8 | |
Eric W. Biederman | 1ce0337 | 2006-10-04 02:16:41 -0700 | [diff] [blame] | 9 | #include <linux/err.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 10 | #include <linux/mm.h> |
| 11 | #include <linux/irq.h> |
| 12 | #include <linux/interrupt.h> |
Paul Gortmaker | 363c75d | 2011-05-27 09:37:25 -0400 | [diff] [blame] | 13 | #include <linux/export.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 14 | #include <linux/ioport.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 15 | #include <linux/pci.h> |
| 16 | #include <linux/proc_fs.h> |
Eric W. Biederman | 3b7d192 | 2006-10-04 02:16:59 -0700 | [diff] [blame] | 17 | #include <linux/msi.h> |
Dan Williams | 4fdadeb | 2007-04-26 18:21:38 -0700 | [diff] [blame] | 18 | #include <linux/smp.h> |
Hidetoshi Seto | 500559a | 2009-08-10 10:14:15 +0900 | [diff] [blame] | 19 | #include <linux/errno.h> |
| 20 | #include <linux/io.h> |
Tejun Heo | 5a0e3ad | 2010-03-24 17:04:11 +0900 | [diff] [blame] | 21 | #include <linux/slab.h> |
Jiang Liu | 3878eae | 2014-11-11 21:02:18 +0800 | [diff] [blame] | 22 | #include <linux/irqdomain.h> |
David Daney | b6eec9b | 2015-10-08 15:10:49 -0700 | [diff] [blame] | 23 | #include <linux/of_irq.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 24 | |
| 25 | #include "pci.h" |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 26 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 27 | static int pci_msi_enable = 1; |
Yijing Wang | 38737d8 | 2014-10-27 10:44:36 +0800 | [diff] [blame] | 28 | int pci_msi_ignore_mask; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 29 | |
Bjorn Helgaas | 527eee2 | 2013-04-17 17:44:48 -0600 | [diff] [blame] | 30 | #define msix_table_size(flags) ((flags & PCI_MSIX_FLAGS_QSIZE) + 1) |
| 31 | |
Jiang Liu | 8e047ad | 2014-11-15 22:24:07 +0800 | [diff] [blame] | 32 | #ifdef CONFIG_PCI_MSI_IRQ_DOMAIN |
| 33 | static struct irq_domain *pci_msi_default_domain; |
| 34 | static DEFINE_MUTEX(pci_msi_domain_lock); |
| 35 | |
| 36 | struct irq_domain * __weak arch_get_pci_msi_domain(struct pci_dev *dev) |
| 37 | { |
| 38 | return pci_msi_default_domain; |
| 39 | } |
| 40 | |
Marc Zyngier | 020c312 | 2014-11-15 10:49:12 +0000 | [diff] [blame] | 41 | static struct irq_domain *pci_msi_get_domain(struct pci_dev *dev) |
| 42 | { |
Marc Zyngier | d8a1cb7 | 2015-07-28 14:46:14 +0100 | [diff] [blame] | 43 | struct irq_domain *domain; |
Marc Zyngier | 020c312 | 2014-11-15 10:49:12 +0000 | [diff] [blame] | 44 | |
Marc Zyngier | d8a1cb7 | 2015-07-28 14:46:14 +0100 | [diff] [blame] | 45 | domain = dev_get_msi_domain(&dev->dev); |
| 46 | if (domain) |
| 47 | return domain; |
Marc Zyngier | 020c312 | 2014-11-15 10:49:12 +0000 | [diff] [blame] | 48 | |
Marc Zyngier | d8a1cb7 | 2015-07-28 14:46:14 +0100 | [diff] [blame] | 49 | return arch_get_pci_msi_domain(dev); |
Marc Zyngier | 020c312 | 2014-11-15 10:49:12 +0000 | [diff] [blame] | 50 | } |
| 51 | |
Jiang Liu | 8e047ad | 2014-11-15 22:24:07 +0800 | [diff] [blame] | 52 | static int pci_msi_setup_msi_irqs(struct pci_dev *dev, int nvec, int type) |
| 53 | { |
| 54 | struct irq_domain *domain; |
| 55 | |
Marc Zyngier | 020c312 | 2014-11-15 10:49:12 +0000 | [diff] [blame] | 56 | domain = pci_msi_get_domain(dev); |
Marc Zyngier | 3845d29 | 2015-12-04 10:28:14 -0600 | [diff] [blame] | 57 | if (domain && irq_domain_is_hierarchy(domain)) |
Jiang Liu | 8e047ad | 2014-11-15 22:24:07 +0800 | [diff] [blame] | 58 | return pci_msi_domain_alloc_irqs(domain, dev, nvec, type); |
| 59 | |
| 60 | return arch_setup_msi_irqs(dev, nvec, type); |
| 61 | } |
| 62 | |
| 63 | static void pci_msi_teardown_msi_irqs(struct pci_dev *dev) |
| 64 | { |
| 65 | struct irq_domain *domain; |
| 66 | |
Marc Zyngier | 020c312 | 2014-11-15 10:49:12 +0000 | [diff] [blame] | 67 | domain = pci_msi_get_domain(dev); |
Marc Zyngier | 3845d29 | 2015-12-04 10:28:14 -0600 | [diff] [blame] | 68 | if (domain && irq_domain_is_hierarchy(domain)) |
Jiang Liu | 8e047ad | 2014-11-15 22:24:07 +0800 | [diff] [blame] | 69 | pci_msi_domain_free_irqs(domain, dev); |
| 70 | else |
| 71 | arch_teardown_msi_irqs(dev); |
| 72 | } |
| 73 | #else |
| 74 | #define pci_msi_setup_msi_irqs arch_setup_msi_irqs |
| 75 | #define pci_msi_teardown_msi_irqs arch_teardown_msi_irqs |
| 76 | #endif |
Bjorn Helgaas | 527eee2 | 2013-04-17 17:44:48 -0600 | [diff] [blame] | 77 | |
Adrian Bunk | 6a9e7f2 | 2007-12-11 23:19:41 +0100 | [diff] [blame] | 78 | /* Arch hooks */ |
| 79 | |
Thomas Petazzoni | 4287d82 | 2013-08-09 22:27:06 +0200 | [diff] [blame] | 80 | int __weak arch_setup_msi_irq(struct pci_dev *dev, struct msi_desc *desc) |
| 81 | { |
Lorenzo Pieralisi | 2291ec0 | 2015-08-03 22:04:06 -0500 | [diff] [blame] | 82 | struct msi_controller *chip = dev->bus->msi; |
Thierry Reding | 0cbdcfc | 2013-08-09 22:27:08 +0200 | [diff] [blame] | 83 | int err; |
| 84 | |
| 85 | if (!chip || !chip->setup_irq) |
| 86 | return -EINVAL; |
| 87 | |
| 88 | err = chip->setup_irq(chip, dev, desc); |
| 89 | if (err < 0) |
| 90 | return err; |
| 91 | |
| 92 | irq_set_chip_data(desc->irq, chip); |
| 93 | |
| 94 | return 0; |
Thomas Petazzoni | 4287d82 | 2013-08-09 22:27:06 +0200 | [diff] [blame] | 95 | } |
| 96 | |
| 97 | void __weak arch_teardown_msi_irq(unsigned int irq) |
| 98 | { |
Yijing Wang | c2791b8 | 2014-11-11 17:45:45 -0700 | [diff] [blame] | 99 | struct msi_controller *chip = irq_get_chip_data(irq); |
Thierry Reding | 0cbdcfc | 2013-08-09 22:27:08 +0200 | [diff] [blame] | 100 | |
| 101 | if (!chip || !chip->teardown_irq) |
| 102 | return; |
| 103 | |
| 104 | chip->teardown_irq(chip, irq); |
Thomas Petazzoni | 4287d82 | 2013-08-09 22:27:06 +0200 | [diff] [blame] | 105 | } |
| 106 | |
Thomas Petazzoni | 4287d82 | 2013-08-09 22:27:06 +0200 | [diff] [blame] | 107 | int __weak arch_setup_msi_irqs(struct pci_dev *dev, int nvec, int type) |
Adrian Bunk | 6a9e7f2 | 2007-12-11 23:19:41 +0100 | [diff] [blame] | 108 | { |
Lucas Stach | 339e5b4 | 2015-09-18 13:58:34 -0500 | [diff] [blame] | 109 | struct msi_controller *chip = dev->bus->msi; |
Adrian Bunk | 6a9e7f2 | 2007-12-11 23:19:41 +0100 | [diff] [blame] | 110 | struct msi_desc *entry; |
| 111 | int ret; |
| 112 | |
Lucas Stach | 339e5b4 | 2015-09-18 13:58:34 -0500 | [diff] [blame] | 113 | if (chip && chip->setup_irqs) |
| 114 | return chip->setup_irqs(chip, dev, nvec, type); |
Matthew Wilcox | 1c8d7b0 | 2009-03-17 08:54:10 -0400 | [diff] [blame] | 115 | /* |
| 116 | * If an architecture wants to support multiple MSI, it needs to |
| 117 | * override arch_setup_msi_irqs() |
| 118 | */ |
| 119 | if (type == PCI_CAP_ID_MSI && nvec > 1) |
| 120 | return 1; |
| 121 | |
Jiang Liu | 5004e98 | 2015-07-09 16:00:41 +0800 | [diff] [blame] | 122 | for_each_pci_msi_entry(entry, dev) { |
Adrian Bunk | 6a9e7f2 | 2007-12-11 23:19:41 +0100 | [diff] [blame] | 123 | ret = arch_setup_msi_irq(dev, entry); |
Michael Ellerman | b5fbf53 | 2009-02-11 22:27:02 +1100 | [diff] [blame] | 124 | if (ret < 0) |
Adrian Bunk | 6a9e7f2 | 2007-12-11 23:19:41 +0100 | [diff] [blame] | 125 | return ret; |
Michael Ellerman | b5fbf53 | 2009-02-11 22:27:02 +1100 | [diff] [blame] | 126 | if (ret > 0) |
| 127 | return -ENOSPC; |
Adrian Bunk | 6a9e7f2 | 2007-12-11 23:19:41 +0100 | [diff] [blame] | 128 | } |
| 129 | |
| 130 | return 0; |
| 131 | } |
| 132 | |
Thomas Petazzoni | 4287d82 | 2013-08-09 22:27:06 +0200 | [diff] [blame] | 133 | /* |
| 134 | * We have a default implementation available as a separate non-weak |
| 135 | * function, as it is used by the Xen x86 PCI code |
| 136 | */ |
Thomas Gleixner | 1525bf0 | 2010-10-06 16:05:35 -0400 | [diff] [blame] | 137 | void default_teardown_msi_irqs(struct pci_dev *dev) |
Adrian Bunk | 6a9e7f2 | 2007-12-11 23:19:41 +0100 | [diff] [blame] | 138 | { |
Jiang Liu | 63a7b17 | 2014-11-06 22:20:32 +0800 | [diff] [blame] | 139 | int i; |
Adrian Bunk | 6a9e7f2 | 2007-12-11 23:19:41 +0100 | [diff] [blame] | 140 | struct msi_desc *entry; |
| 141 | |
Jiang Liu | 5004e98 | 2015-07-09 16:00:41 +0800 | [diff] [blame] | 142 | for_each_pci_msi_entry(entry, dev) |
Jiang Liu | 63a7b17 | 2014-11-06 22:20:32 +0800 | [diff] [blame] | 143 | if (entry->irq) |
| 144 | for (i = 0; i < entry->nvec_used; i++) |
| 145 | arch_teardown_msi_irq(entry->irq + i); |
Adrian Bunk | 6a9e7f2 | 2007-12-11 23:19:41 +0100 | [diff] [blame] | 146 | } |
| 147 | |
Thomas Petazzoni | 4287d82 | 2013-08-09 22:27:06 +0200 | [diff] [blame] | 148 | void __weak arch_teardown_msi_irqs(struct pci_dev *dev) |
| 149 | { |
| 150 | return default_teardown_msi_irqs(dev); |
| 151 | } |
Konrad Rzeszutek Wilk | 76ccc29 | 2011-12-16 17:38:18 -0500 | [diff] [blame] | 152 | |
DuanZhenzhong | ac8344c | 2013-12-04 13:09:16 +0800 | [diff] [blame] | 153 | static void default_restore_msi_irq(struct pci_dev *dev, int irq) |
Konrad Rzeszutek Wilk | 76ccc29 | 2011-12-16 17:38:18 -0500 | [diff] [blame] | 154 | { |
| 155 | struct msi_desc *entry; |
| 156 | |
| 157 | entry = NULL; |
| 158 | if (dev->msix_enabled) { |
Jiang Liu | 5004e98 | 2015-07-09 16:00:41 +0800 | [diff] [blame] | 159 | for_each_pci_msi_entry(entry, dev) { |
Konrad Rzeszutek Wilk | 76ccc29 | 2011-12-16 17:38:18 -0500 | [diff] [blame] | 160 | if (irq == entry->irq) |
| 161 | break; |
| 162 | } |
| 163 | } else if (dev->msi_enabled) { |
| 164 | entry = irq_get_msi_desc(irq); |
| 165 | } |
| 166 | |
| 167 | if (entry) |
Jiang Liu | 83a1891 | 2014-11-09 23:10:34 +0800 | [diff] [blame] | 168 | __pci_write_msi_msg(entry, &entry->msg); |
Konrad Rzeszutek Wilk | 76ccc29 | 2011-12-16 17:38:18 -0500 | [diff] [blame] | 169 | } |
Thomas Petazzoni | 4287d82 | 2013-08-09 22:27:06 +0200 | [diff] [blame] | 170 | |
DuanZhenzhong | ac8344c | 2013-12-04 13:09:16 +0800 | [diff] [blame] | 171 | void __weak arch_restore_msi_irqs(struct pci_dev *dev) |
Thomas Petazzoni | 4287d82 | 2013-08-09 22:27:06 +0200 | [diff] [blame] | 172 | { |
DuanZhenzhong | ac8344c | 2013-12-04 13:09:16 +0800 | [diff] [blame] | 173 | return default_restore_msi_irqs(dev); |
Thomas Petazzoni | 4287d82 | 2013-08-09 22:27:06 +0200 | [diff] [blame] | 174 | } |
Konrad Rzeszutek Wilk | 76ccc29 | 2011-12-16 17:38:18 -0500 | [diff] [blame] | 175 | |
Matthew Wilcox | bffac3c | 2009-01-21 19:19:19 -0500 | [diff] [blame] | 176 | static inline __attribute_const__ u32 msi_mask(unsigned x) |
| 177 | { |
Matthew Wilcox | 0b49ec3 | 2009-02-08 20:27:47 -0700 | [diff] [blame] | 178 | /* Don't shift by >= width of type */ |
| 179 | if (x >= 5) |
| 180 | return 0xffffffff; |
| 181 | return (1 << (1 << x)) - 1; |
Matthew Wilcox | bffac3c | 2009-01-21 19:19:19 -0500 | [diff] [blame] | 182 | } |
| 183 | |
Matthew Wilcox | ce6fce4 | 2008-07-25 15:42:58 -0600 | [diff] [blame] | 184 | /* |
| 185 | * PCI 2.3 does not specify mask bits for each MSI interrupt. Attempting to |
| 186 | * mask all MSI interrupts by clearing the MSI enable bit does not work |
| 187 | * reliably as devices without an INTx disable bit will then generate a |
| 188 | * level IRQ which will never be cleared. |
Matthew Wilcox | ce6fce4 | 2008-07-25 15:42:58 -0600 | [diff] [blame] | 189 | */ |
Thomas Gleixner | 23ed8d5 | 2014-11-23 11:55:58 +0100 | [diff] [blame] | 190 | u32 __pci_msi_desc_mask_irq(struct msi_desc *desc, u32 mask, u32 flag) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 191 | { |
Matthew Wilcox | f2440d9 | 2009-03-17 08:54:09 -0400 | [diff] [blame] | 192 | u32 mask_bits = desc->masked; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 193 | |
Yijing Wang | 38737d8 | 2014-10-27 10:44:36 +0800 | [diff] [blame] | 194 | if (pci_msi_ignore_mask || !desc->msi_attrib.maskbit) |
Hidetoshi Seto | 12abb8b | 2009-06-24 12:08:09 +0900 | [diff] [blame] | 195 | return 0; |
Matthew Wilcox | f2440d9 | 2009-03-17 08:54:09 -0400 | [diff] [blame] | 196 | |
| 197 | mask_bits &= ~mask; |
| 198 | mask_bits |= flag; |
Jiang Liu | e39758e | 2015-07-09 16:00:43 +0800 | [diff] [blame] | 199 | pci_write_config_dword(msi_desc_to_pci_dev(desc), desc->mask_pos, |
| 200 | mask_bits); |
Hidetoshi Seto | 12abb8b | 2009-06-24 12:08:09 +0900 | [diff] [blame] | 201 | |
| 202 | return mask_bits; |
| 203 | } |
| 204 | |
| 205 | static void msi_mask_irq(struct msi_desc *desc, u32 mask, u32 flag) |
| 206 | { |
Thomas Gleixner | 23ed8d5 | 2014-11-23 11:55:58 +0100 | [diff] [blame] | 207 | desc->masked = __pci_msi_desc_mask_irq(desc, mask, flag); |
Matthew Wilcox | f2440d9 | 2009-03-17 08:54:09 -0400 | [diff] [blame] | 208 | } |
| 209 | |
| 210 | /* |
| 211 | * This internal function does not flush PCI writes to the device. |
| 212 | * All users must ensure that they read from the device before either |
| 213 | * assuming that the device state is up to date, or returning out of this |
| 214 | * file. This saves a few milliseconds when initialising devices with lots |
| 215 | * of MSI-X interrupts. |
| 216 | */ |
Thomas Gleixner | 23ed8d5 | 2014-11-23 11:55:58 +0100 | [diff] [blame] | 217 | u32 __pci_msix_desc_mask_irq(struct msi_desc *desc, u32 flag) |
Matthew Wilcox | f2440d9 | 2009-03-17 08:54:09 -0400 | [diff] [blame] | 218 | { |
| 219 | u32 mask_bits = desc->masked; |
| 220 | unsigned offset = desc->msi_attrib.entry_nr * PCI_MSIX_ENTRY_SIZE + |
Hidetoshi Seto | 2c21fd4 | 2009-06-23 17:40:04 +0900 | [diff] [blame] | 221 | PCI_MSIX_ENTRY_VECTOR_CTRL; |
Yijing Wang | 38737d8 | 2014-10-27 10:44:36 +0800 | [diff] [blame] | 222 | |
| 223 | if (pci_msi_ignore_mask) |
| 224 | return 0; |
| 225 | |
Sheng Yang | 8d80528 | 2010-11-11 15:46:55 +0800 | [diff] [blame] | 226 | mask_bits &= ~PCI_MSIX_ENTRY_CTRL_MASKBIT; |
| 227 | if (flag) |
| 228 | mask_bits |= PCI_MSIX_ENTRY_CTRL_MASKBIT; |
Matthew Wilcox | f2440d9 | 2009-03-17 08:54:09 -0400 | [diff] [blame] | 229 | writel(mask_bits, desc->mask_base + offset); |
Hidetoshi Seto | 12abb8b | 2009-06-24 12:08:09 +0900 | [diff] [blame] | 230 | |
| 231 | return mask_bits; |
| 232 | } |
| 233 | |
| 234 | static void msix_mask_irq(struct msi_desc *desc, u32 flag) |
| 235 | { |
Thomas Gleixner | 23ed8d5 | 2014-11-23 11:55:58 +0100 | [diff] [blame] | 236 | desc->masked = __pci_msix_desc_mask_irq(desc, flag); |
Matthew Wilcox | f2440d9 | 2009-03-17 08:54:09 -0400 | [diff] [blame] | 237 | } |
| 238 | |
Thomas Gleixner | 1c9db52 | 2010-09-28 16:46:51 +0200 | [diff] [blame] | 239 | static void msi_set_mask_bit(struct irq_data *data, u32 flag) |
Matthew Wilcox | f2440d9 | 2009-03-17 08:54:09 -0400 | [diff] [blame] | 240 | { |
Jiang Liu | c391f26 | 2015-06-01 16:05:41 +0800 | [diff] [blame] | 241 | struct msi_desc *desc = irq_data_get_msi_desc(data); |
Matthew Wilcox | f2440d9 | 2009-03-17 08:54:09 -0400 | [diff] [blame] | 242 | |
| 243 | if (desc->msi_attrib.is_msix) { |
| 244 | msix_mask_irq(desc, flag); |
| 245 | readl(desc->mask_base); /* Flush write to device */ |
Matthew Wilcox | 24d2755 | 2009-03-17 08:54:06 -0400 | [diff] [blame] | 246 | } else { |
Yijing Wang | a281b78 | 2014-07-08 10:08:55 +0800 | [diff] [blame] | 247 | unsigned offset = data->irq - desc->irq; |
Matthew Wilcox | 1c8d7b0 | 2009-03-17 08:54:10 -0400 | [diff] [blame] | 248 | msi_mask_irq(desc, 1 << offset, flag << offset); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 249 | } |
Matthew Wilcox | f2440d9 | 2009-03-17 08:54:09 -0400 | [diff] [blame] | 250 | } |
| 251 | |
Thomas Gleixner | 23ed8d5 | 2014-11-23 11:55:58 +0100 | [diff] [blame] | 252 | /** |
| 253 | * pci_msi_mask_irq - Generic irq chip callback to mask PCI/MSI interrupts |
| 254 | * @data: pointer to irqdata associated to that interrupt |
| 255 | */ |
| 256 | void pci_msi_mask_irq(struct irq_data *data) |
Matthew Wilcox | f2440d9 | 2009-03-17 08:54:09 -0400 | [diff] [blame] | 257 | { |
Thomas Gleixner | 1c9db52 | 2010-09-28 16:46:51 +0200 | [diff] [blame] | 258 | msi_set_mask_bit(data, 1); |
Matthew Wilcox | f2440d9 | 2009-03-17 08:54:09 -0400 | [diff] [blame] | 259 | } |
Jake Oshins | a4289dc | 2015-12-10 17:52:59 +0000 | [diff] [blame] | 260 | EXPORT_SYMBOL_GPL(pci_msi_mask_irq); |
Matthew Wilcox | f2440d9 | 2009-03-17 08:54:09 -0400 | [diff] [blame] | 261 | |
Thomas Gleixner | 23ed8d5 | 2014-11-23 11:55:58 +0100 | [diff] [blame] | 262 | /** |
| 263 | * pci_msi_unmask_irq - Generic irq chip callback to unmask PCI/MSI interrupts |
| 264 | * @data: pointer to irqdata associated to that interrupt |
| 265 | */ |
| 266 | void pci_msi_unmask_irq(struct irq_data *data) |
Matthew Wilcox | f2440d9 | 2009-03-17 08:54:09 -0400 | [diff] [blame] | 267 | { |
Thomas Gleixner | 1c9db52 | 2010-09-28 16:46:51 +0200 | [diff] [blame] | 268 | msi_set_mask_bit(data, 0); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 269 | } |
Jake Oshins | a4289dc | 2015-12-10 17:52:59 +0000 | [diff] [blame] | 270 | EXPORT_SYMBOL_GPL(pci_msi_unmask_irq); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 271 | |
DuanZhenzhong | ac8344c | 2013-12-04 13:09:16 +0800 | [diff] [blame] | 272 | void default_restore_msi_irqs(struct pci_dev *dev) |
| 273 | { |
| 274 | struct msi_desc *entry; |
| 275 | |
Jiang Liu | 5004e98 | 2015-07-09 16:00:41 +0800 | [diff] [blame] | 276 | for_each_pci_msi_entry(entry, dev) |
DuanZhenzhong | ac8344c | 2013-12-04 13:09:16 +0800 | [diff] [blame] | 277 | default_restore_msi_irq(dev, entry->irq); |
DuanZhenzhong | ac8344c | 2013-12-04 13:09:16 +0800 | [diff] [blame] | 278 | } |
| 279 | |
Jiang Liu | 891d4a4 | 2014-11-09 23:10:33 +0800 | [diff] [blame] | 280 | void __pci_read_msi_msg(struct msi_desc *entry, struct msi_msg *msg) |
Eric W. Biederman | 0366f8f | 2006-10-04 02:16:33 -0700 | [diff] [blame] | 281 | { |
Jiang Liu | e39758e | 2015-07-09 16:00:43 +0800 | [diff] [blame] | 282 | struct pci_dev *dev = msi_desc_to_pci_dev(entry); |
| 283 | |
| 284 | BUG_ON(dev->current_state != PCI_D0); |
Eric W. Biederman | 0366f8f | 2006-10-04 02:16:33 -0700 | [diff] [blame] | 285 | |
Ben Hutchings | 30da552 | 2010-07-23 14:56:28 +0100 | [diff] [blame] | 286 | if (entry->msi_attrib.is_msix) { |
| 287 | void __iomem *base = entry->mask_base + |
| 288 | entry->msi_attrib.entry_nr * PCI_MSIX_ENTRY_SIZE; |
| 289 | |
| 290 | msg->address_lo = readl(base + PCI_MSIX_ENTRY_LOWER_ADDR); |
| 291 | msg->address_hi = readl(base + PCI_MSIX_ENTRY_UPPER_ADDR); |
| 292 | msg->data = readl(base + PCI_MSIX_ENTRY_DATA); |
| 293 | } else { |
Bjorn Helgaas | f532216 | 2013-04-17 17:34:36 -0600 | [diff] [blame] | 294 | int pos = dev->msi_cap; |
Ben Hutchings | 30da552 | 2010-07-23 14:56:28 +0100 | [diff] [blame] | 295 | u16 data; |
| 296 | |
Bjorn Helgaas | 9925ad0 | 2013-04-17 17:39:57 -0600 | [diff] [blame] | 297 | pci_read_config_dword(dev, pos + PCI_MSI_ADDRESS_LO, |
| 298 | &msg->address_lo); |
Ben Hutchings | 30da552 | 2010-07-23 14:56:28 +0100 | [diff] [blame] | 299 | if (entry->msi_attrib.is_64) { |
Bjorn Helgaas | 9925ad0 | 2013-04-17 17:39:57 -0600 | [diff] [blame] | 300 | pci_read_config_dword(dev, pos + PCI_MSI_ADDRESS_HI, |
| 301 | &msg->address_hi); |
Bjorn Helgaas | 2f22134 | 2013-04-17 17:41:13 -0600 | [diff] [blame] | 302 | pci_read_config_word(dev, pos + PCI_MSI_DATA_64, &data); |
Ben Hutchings | 30da552 | 2010-07-23 14:56:28 +0100 | [diff] [blame] | 303 | } else { |
| 304 | msg->address_hi = 0; |
Bjorn Helgaas | 2f22134 | 2013-04-17 17:41:13 -0600 | [diff] [blame] | 305 | pci_read_config_word(dev, pos + PCI_MSI_DATA_32, &data); |
Ben Hutchings | 30da552 | 2010-07-23 14:56:28 +0100 | [diff] [blame] | 306 | } |
| 307 | msg->data = data; |
| 308 | } |
Eric W. Biederman | 0366f8f | 2006-10-04 02:16:33 -0700 | [diff] [blame] | 309 | } |
| 310 | |
Jiang Liu | 83a1891 | 2014-11-09 23:10:34 +0800 | [diff] [blame] | 311 | void __pci_write_msi_msg(struct msi_desc *entry, struct msi_msg *msg) |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 312 | { |
Jiang Liu | e39758e | 2015-07-09 16:00:43 +0800 | [diff] [blame] | 313 | struct pci_dev *dev = msi_desc_to_pci_dev(entry); |
| 314 | |
| 315 | if (dev->current_state != PCI_D0) { |
Ben Hutchings | fcd097f | 2010-06-17 20:16:36 +0100 | [diff] [blame] | 316 | /* Don't touch the hardware now */ |
| 317 | } else if (entry->msi_attrib.is_msix) { |
Matthew Wilcox | 24d2755 | 2009-03-17 08:54:06 -0400 | [diff] [blame] | 318 | void __iomem *base; |
| 319 | base = entry->mask_base + |
| 320 | entry->msi_attrib.entry_nr * PCI_MSIX_ENTRY_SIZE; |
| 321 | |
Hidetoshi Seto | 2c21fd4 | 2009-06-23 17:40:04 +0900 | [diff] [blame] | 322 | writel(msg->address_lo, base + PCI_MSIX_ENTRY_LOWER_ADDR); |
| 323 | writel(msg->address_hi, base + PCI_MSIX_ENTRY_UPPER_ADDR); |
| 324 | writel(msg->data, base + PCI_MSIX_ENTRY_DATA); |
Matthew Wilcox | 24d2755 | 2009-03-17 08:54:06 -0400 | [diff] [blame] | 325 | } else { |
Bjorn Helgaas | f532216 | 2013-04-17 17:34:36 -0600 | [diff] [blame] | 326 | int pos = dev->msi_cap; |
Matthew Wilcox | 1c8d7b0 | 2009-03-17 08:54:10 -0400 | [diff] [blame] | 327 | u16 msgctl; |
| 328 | |
Bjorn Helgaas | f84ecd2 | 2013-04-17 17:38:32 -0600 | [diff] [blame] | 329 | pci_read_config_word(dev, pos + PCI_MSI_FLAGS, &msgctl); |
Matthew Wilcox | 1c8d7b0 | 2009-03-17 08:54:10 -0400 | [diff] [blame] | 330 | msgctl &= ~PCI_MSI_FLAGS_QSIZE; |
| 331 | msgctl |= entry->msi_attrib.multiple << 4; |
Bjorn Helgaas | f84ecd2 | 2013-04-17 17:38:32 -0600 | [diff] [blame] | 332 | pci_write_config_word(dev, pos + PCI_MSI_FLAGS, msgctl); |
Eric W. Biederman | 0366f8f | 2006-10-04 02:16:33 -0700 | [diff] [blame] | 333 | |
Bjorn Helgaas | 9925ad0 | 2013-04-17 17:39:57 -0600 | [diff] [blame] | 334 | pci_write_config_dword(dev, pos + PCI_MSI_ADDRESS_LO, |
| 335 | msg->address_lo); |
Eric W. Biederman | 0366f8f | 2006-10-04 02:16:33 -0700 | [diff] [blame] | 336 | if (entry->msi_attrib.is_64) { |
Bjorn Helgaas | 9925ad0 | 2013-04-17 17:39:57 -0600 | [diff] [blame] | 337 | pci_write_config_dword(dev, pos + PCI_MSI_ADDRESS_HI, |
| 338 | msg->address_hi); |
Bjorn Helgaas | 2f22134 | 2013-04-17 17:41:13 -0600 | [diff] [blame] | 339 | pci_write_config_word(dev, pos + PCI_MSI_DATA_64, |
| 340 | msg->data); |
Eric W. Biederman | 0366f8f | 2006-10-04 02:16:33 -0700 | [diff] [blame] | 341 | } else { |
Bjorn Helgaas | 2f22134 | 2013-04-17 17:41:13 -0600 | [diff] [blame] | 342 | pci_write_config_word(dev, pos + PCI_MSI_DATA_32, |
| 343 | msg->data); |
Eric W. Biederman | 0366f8f | 2006-10-04 02:16:33 -0700 | [diff] [blame] | 344 | } |
Eric W. Biederman | 0366f8f | 2006-10-04 02:16:33 -0700 | [diff] [blame] | 345 | } |
Eric W. Biederman | 392ee1e | 2007-03-08 13:04:57 -0700 | [diff] [blame] | 346 | entry->msg = *msg; |
Eric W. Biederman | 0366f8f | 2006-10-04 02:16:33 -0700 | [diff] [blame] | 347 | } |
| 348 | |
Jiang Liu | 83a1891 | 2014-11-09 23:10:34 +0800 | [diff] [blame] | 349 | void pci_write_msi_msg(unsigned int irq, struct msi_msg *msg) |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 350 | { |
Thomas Gleixner | dced35a | 2011-03-28 17:49:12 +0200 | [diff] [blame] | 351 | struct msi_desc *entry = irq_get_msi_desc(irq); |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 352 | |
Jiang Liu | 83a1891 | 2014-11-09 23:10:34 +0800 | [diff] [blame] | 353 | __pci_write_msi_msg(entry, msg); |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 354 | } |
Jiang Liu | 83a1891 | 2014-11-09 23:10:34 +0800 | [diff] [blame] | 355 | EXPORT_SYMBOL_GPL(pci_write_msi_msg); |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 356 | |
Hidetoshi Seto | f56e448 | 2009-08-06 11:32:51 +0900 | [diff] [blame] | 357 | static void free_msi_irqs(struct pci_dev *dev) |
| 358 | { |
Jiang Liu | 5004e98 | 2015-07-09 16:00:41 +0800 | [diff] [blame] | 359 | struct list_head *msi_list = dev_to_msi_list(&dev->dev); |
Hidetoshi Seto | f56e448 | 2009-08-06 11:32:51 +0900 | [diff] [blame] | 360 | struct msi_desc *entry, *tmp; |
Greg Kroah-Hartman | 1c51b50 | 2013-12-19 12:30:17 -0800 | [diff] [blame] | 361 | struct attribute **msi_attrs; |
| 362 | struct device_attribute *dev_attr; |
Jiang Liu | 63a7b17 | 2014-11-06 22:20:32 +0800 | [diff] [blame] | 363 | int i, count = 0; |
Hidetoshi Seto | f56e448 | 2009-08-06 11:32:51 +0900 | [diff] [blame] | 364 | |
Jiang Liu | 5004e98 | 2015-07-09 16:00:41 +0800 | [diff] [blame] | 365 | for_each_pci_msi_entry(entry, dev) |
Jiang Liu | 63a7b17 | 2014-11-06 22:20:32 +0800 | [diff] [blame] | 366 | if (entry->irq) |
| 367 | for (i = 0; i < entry->nvec_used; i++) |
| 368 | BUG_ON(irq_has_action(entry->irq + i)); |
Hidetoshi Seto | f56e448 | 2009-08-06 11:32:51 +0900 | [diff] [blame] | 369 | |
Jiang Liu | 8e047ad | 2014-11-15 22:24:07 +0800 | [diff] [blame] | 370 | pci_msi_teardown_msi_irqs(dev); |
Hidetoshi Seto | f56e448 | 2009-08-06 11:32:51 +0900 | [diff] [blame] | 371 | |
Jiang Liu | 5004e98 | 2015-07-09 16:00:41 +0800 | [diff] [blame] | 372 | list_for_each_entry_safe(entry, tmp, msi_list, list) { |
Hidetoshi Seto | f56e448 | 2009-08-06 11:32:51 +0900 | [diff] [blame] | 373 | if (entry->msi_attrib.is_msix) { |
Jiang Liu | 5004e98 | 2015-07-09 16:00:41 +0800 | [diff] [blame] | 374 | if (list_is_last(&entry->list, msi_list)) |
Hidetoshi Seto | f56e448 | 2009-08-06 11:32:51 +0900 | [diff] [blame] | 375 | iounmap(entry->mask_base); |
| 376 | } |
Neil Horman | 424eb39 | 2012-01-03 10:29:54 -0500 | [diff] [blame] | 377 | |
Hidetoshi Seto | f56e448 | 2009-08-06 11:32:51 +0900 | [diff] [blame] | 378 | list_del(&entry->list); |
| 379 | kfree(entry); |
| 380 | } |
Greg Kroah-Hartman | 1c51b50 | 2013-12-19 12:30:17 -0800 | [diff] [blame] | 381 | |
| 382 | if (dev->msi_irq_groups) { |
| 383 | sysfs_remove_groups(&dev->dev.kobj, dev->msi_irq_groups); |
| 384 | msi_attrs = dev->msi_irq_groups[0]->attrs; |
Alexei Starovoitov | b701c0b | 2014-06-04 15:49:50 -0700 | [diff] [blame] | 385 | while (msi_attrs[count]) { |
Greg Kroah-Hartman | 1c51b50 | 2013-12-19 12:30:17 -0800 | [diff] [blame] | 386 | dev_attr = container_of(msi_attrs[count], |
| 387 | struct device_attribute, attr); |
| 388 | kfree(dev_attr->attr.name); |
| 389 | kfree(dev_attr); |
| 390 | ++count; |
| 391 | } |
| 392 | kfree(msi_attrs); |
| 393 | kfree(dev->msi_irq_groups[0]); |
| 394 | kfree(dev->msi_irq_groups); |
| 395 | dev->msi_irq_groups = NULL; |
| 396 | } |
Hidetoshi Seto | f56e448 | 2009-08-06 11:32:51 +0900 | [diff] [blame] | 397 | } |
Satoru Takeuchi | c54c187 | 2007-01-18 13:50:05 +0900 | [diff] [blame] | 398 | |
David Miller | ba698ad | 2007-10-25 01:16:30 -0700 | [diff] [blame] | 399 | static void pci_intx_for_msi(struct pci_dev *dev, int enable) |
| 400 | { |
| 401 | if (!(dev->dev_flags & PCI_DEV_FLAGS_MSI_INTX_DISABLE_BUG)) |
| 402 | pci_intx(dev, enable); |
| 403 | } |
| 404 | |
Michael Ellerman | 8fed4b6 | 2007-01-25 19:34:08 +1100 | [diff] [blame] | 405 | static void __pci_restore_msi_state(struct pci_dev *dev) |
Shaohua Li | 41017f0 | 2006-02-08 17:11:38 +0800 | [diff] [blame] | 406 | { |
Shaohua Li | 41017f0 | 2006-02-08 17:11:38 +0800 | [diff] [blame] | 407 | u16 control; |
Eric W. Biederman | 392ee1e | 2007-03-08 13:04:57 -0700 | [diff] [blame] | 408 | struct msi_desc *entry; |
Shaohua Li | 41017f0 | 2006-02-08 17:11:38 +0800 | [diff] [blame] | 409 | |
Eric W. Biederman | b1cbf4e | 2007-03-05 00:30:10 -0800 | [diff] [blame] | 410 | if (!dev->msi_enabled) |
| 411 | return; |
| 412 | |
Thomas Gleixner | dced35a | 2011-03-28 17:49:12 +0200 | [diff] [blame] | 413 | entry = irq_get_msi_desc(dev->irq); |
Shaohua Li | 41017f0 | 2006-02-08 17:11:38 +0800 | [diff] [blame] | 414 | |
David Miller | ba698ad | 2007-10-25 01:16:30 -0700 | [diff] [blame] | 415 | pci_intx_for_msi(dev, 0); |
Michael S. Tsirkin | 61b64ab | 2015-05-07 09:52:21 -0500 | [diff] [blame] | 416 | pci_msi_set_enable(dev, 0); |
DuanZhenzhong | ac8344c | 2013-12-04 13:09:16 +0800 | [diff] [blame] | 417 | arch_restore_msi_irqs(dev); |
Eric W. Biederman | 392ee1e | 2007-03-08 13:04:57 -0700 | [diff] [blame] | 418 | |
Bjorn Helgaas | f532216 | 2013-04-17 17:34:36 -0600 | [diff] [blame] | 419 | pci_read_config_word(dev, dev->msi_cap + PCI_MSI_FLAGS, &control); |
Yijing Wang | 31ea5d4 | 2014-06-19 16:30:30 +0800 | [diff] [blame] | 420 | msi_mask_irq(entry, msi_mask(entry->msi_attrib.multi_cap), |
| 421 | entry->masked); |
Jesse Barnes | abad2ec | 2008-08-07 08:52:37 -0700 | [diff] [blame] | 422 | control &= ~PCI_MSI_FLAGS_QSIZE; |
Matthew Wilcox | 1c8d7b0 | 2009-03-17 08:54:10 -0400 | [diff] [blame] | 423 | control |= (entry->msi_attrib.multiple << 4) | PCI_MSI_FLAGS_ENABLE; |
Bjorn Helgaas | f532216 | 2013-04-17 17:34:36 -0600 | [diff] [blame] | 424 | pci_write_config_word(dev, dev->msi_cap + PCI_MSI_FLAGS, control); |
Michael Ellerman | 8fed4b6 | 2007-01-25 19:34:08 +1100 | [diff] [blame] | 425 | } |
| 426 | |
| 427 | static void __pci_restore_msix_state(struct pci_dev *dev) |
Shaohua Li | 41017f0 | 2006-02-08 17:11:38 +0800 | [diff] [blame] | 428 | { |
Shaohua Li | 41017f0 | 2006-02-08 17:11:38 +0800 | [diff] [blame] | 429 | struct msi_desc *entry; |
Shaohua Li | 41017f0 | 2006-02-08 17:11:38 +0800 | [diff] [blame] | 430 | |
Eric W. Biederman | ded86d8 | 2007-01-28 12:42:52 -0700 | [diff] [blame] | 431 | if (!dev->msix_enabled) |
| 432 | return; |
Jiang Liu | 5004e98 | 2015-07-09 16:00:41 +0800 | [diff] [blame] | 433 | BUG_ON(list_empty(dev_to_msi_list(&dev->dev))); |
Eric W. Biederman | ded86d8 | 2007-01-28 12:42:52 -0700 | [diff] [blame] | 434 | |
Shaohua Li | 41017f0 | 2006-02-08 17:11:38 +0800 | [diff] [blame] | 435 | /* route the table */ |
David Miller | ba698ad | 2007-10-25 01:16:30 -0700 | [diff] [blame] | 436 | pci_intx_for_msi(dev, 0); |
Michael S. Tsirkin | 61b64ab | 2015-05-07 09:52:21 -0500 | [diff] [blame] | 437 | pci_msix_clear_and_set_ctrl(dev, 0, |
Yijing Wang | 66f0d0c | 2014-06-19 16:29:53 +0800 | [diff] [blame] | 438 | PCI_MSIX_FLAGS_ENABLE | PCI_MSIX_FLAGS_MASKALL); |
Shaohua Li | 41017f0 | 2006-02-08 17:11:38 +0800 | [diff] [blame] | 439 | |
DuanZhenzhong | ac8344c | 2013-12-04 13:09:16 +0800 | [diff] [blame] | 440 | arch_restore_msi_irqs(dev); |
Jiang Liu | 5004e98 | 2015-07-09 16:00:41 +0800 | [diff] [blame] | 441 | for_each_pci_msi_entry(entry, dev) |
Matthew Wilcox | f2440d9 | 2009-03-17 08:54:09 -0400 | [diff] [blame] | 442 | msix_mask_irq(entry, entry->masked); |
Shaohua Li | 41017f0 | 2006-02-08 17:11:38 +0800 | [diff] [blame] | 443 | |
Michael S. Tsirkin | 61b64ab | 2015-05-07 09:52:21 -0500 | [diff] [blame] | 444 | pci_msix_clear_and_set_ctrl(dev, PCI_MSIX_FLAGS_MASKALL, 0); |
Shaohua Li | 41017f0 | 2006-02-08 17:11:38 +0800 | [diff] [blame] | 445 | } |
Michael Ellerman | 8fed4b6 | 2007-01-25 19:34:08 +1100 | [diff] [blame] | 446 | |
| 447 | void pci_restore_msi_state(struct pci_dev *dev) |
| 448 | { |
| 449 | __pci_restore_msi_state(dev); |
| 450 | __pci_restore_msix_state(dev); |
| 451 | } |
Linas Vepstas | 94688cf | 2007-11-07 15:43:59 -0600 | [diff] [blame] | 452 | EXPORT_SYMBOL_GPL(pci_restore_msi_state); |
Shaohua Li | 41017f0 | 2006-02-08 17:11:38 +0800 | [diff] [blame] | 453 | |
Greg Kroah-Hartman | 1c51b50 | 2013-12-19 12:30:17 -0800 | [diff] [blame] | 454 | static ssize_t msi_mode_show(struct device *dev, struct device_attribute *attr, |
Neil Horman | da8d1c8 | 2011-10-06 14:08:18 -0400 | [diff] [blame] | 455 | char *buf) |
| 456 | { |
Greg Kroah-Hartman | 1c51b50 | 2013-12-19 12:30:17 -0800 | [diff] [blame] | 457 | struct msi_desc *entry; |
| 458 | unsigned long irq; |
| 459 | int retval; |
| 460 | |
| 461 | retval = kstrtoul(attr->attr.name, 10, &irq); |
| 462 | if (retval) |
| 463 | return retval; |
| 464 | |
Yijing Wang | e11ece5 | 2014-07-08 10:09:19 +0800 | [diff] [blame] | 465 | entry = irq_get_msi_desc(irq); |
| 466 | if (entry) |
| 467 | return sprintf(buf, "%s\n", |
| 468 | entry->msi_attrib.is_msix ? "msix" : "msi"); |
| 469 | |
Greg Kroah-Hartman | 1c51b50 | 2013-12-19 12:30:17 -0800 | [diff] [blame] | 470 | return -ENODEV; |
Neil Horman | da8d1c8 | 2011-10-06 14:08:18 -0400 | [diff] [blame] | 471 | } |
| 472 | |
Neil Horman | da8d1c8 | 2011-10-06 14:08:18 -0400 | [diff] [blame] | 473 | static int populate_msi_sysfs(struct pci_dev *pdev) |
| 474 | { |
Greg Kroah-Hartman | 1c51b50 | 2013-12-19 12:30:17 -0800 | [diff] [blame] | 475 | struct attribute **msi_attrs; |
| 476 | struct attribute *msi_attr; |
| 477 | struct device_attribute *msi_dev_attr; |
| 478 | struct attribute_group *msi_irq_group; |
| 479 | const struct attribute_group **msi_irq_groups; |
Neil Horman | da8d1c8 | 2011-10-06 14:08:18 -0400 | [diff] [blame] | 480 | struct msi_desc *entry; |
Greg Kroah-Hartman | 1c51b50 | 2013-12-19 12:30:17 -0800 | [diff] [blame] | 481 | int ret = -ENOMEM; |
| 482 | int num_msi = 0; |
Neil Horman | da8d1c8 | 2011-10-06 14:08:18 -0400 | [diff] [blame] | 483 | int count = 0; |
Romain Bezut | a867606 | 2015-09-24 01:31:16 +0200 | [diff] [blame] | 484 | int i; |
Neil Horman | da8d1c8 | 2011-10-06 14:08:18 -0400 | [diff] [blame] | 485 | |
Greg Kroah-Hartman | 1c51b50 | 2013-12-19 12:30:17 -0800 | [diff] [blame] | 486 | /* Determine how many msi entries we have */ |
Jiang Liu | 5004e98 | 2015-07-09 16:00:41 +0800 | [diff] [blame] | 487 | for_each_pci_msi_entry(entry, pdev) |
Romain Bezut | a867606 | 2015-09-24 01:31:16 +0200 | [diff] [blame] | 488 | num_msi += entry->nvec_used; |
Greg Kroah-Hartman | 1c51b50 | 2013-12-19 12:30:17 -0800 | [diff] [blame] | 489 | if (!num_msi) |
| 490 | return 0; |
| 491 | |
| 492 | /* Dynamically create the MSI attributes for the PCI device */ |
| 493 | msi_attrs = kzalloc(sizeof(void *) * (num_msi + 1), GFP_KERNEL); |
| 494 | if (!msi_attrs) |
| 495 | return -ENOMEM; |
Jiang Liu | 5004e98 | 2015-07-09 16:00:41 +0800 | [diff] [blame] | 496 | for_each_pci_msi_entry(entry, pdev) { |
Romain Bezut | a867606 | 2015-09-24 01:31:16 +0200 | [diff] [blame] | 497 | for (i = 0; i < entry->nvec_used; i++) { |
| 498 | msi_dev_attr = kzalloc(sizeof(*msi_dev_attr), GFP_KERNEL); |
| 499 | if (!msi_dev_attr) |
| 500 | goto error_attrs; |
| 501 | msi_attrs[count] = &msi_dev_attr->attr; |
Greg Kroah-Hartman | 86bb4f6 | 2014-02-13 10:47:20 -0700 | [diff] [blame] | 502 | |
Romain Bezut | a867606 | 2015-09-24 01:31:16 +0200 | [diff] [blame] | 503 | sysfs_attr_init(&msi_dev_attr->attr); |
| 504 | msi_dev_attr->attr.name = kasprintf(GFP_KERNEL, "%d", |
| 505 | entry->irq + i); |
| 506 | if (!msi_dev_attr->attr.name) |
| 507 | goto error_attrs; |
| 508 | msi_dev_attr->attr.mode = S_IRUGO; |
| 509 | msi_dev_attr->show = msi_mode_show; |
| 510 | ++count; |
| 511 | } |
Greg Kroah-Hartman | 1c51b50 | 2013-12-19 12:30:17 -0800 | [diff] [blame] | 512 | } |
| 513 | |
| 514 | msi_irq_group = kzalloc(sizeof(*msi_irq_group), GFP_KERNEL); |
| 515 | if (!msi_irq_group) |
| 516 | goto error_attrs; |
| 517 | msi_irq_group->name = "msi_irqs"; |
| 518 | msi_irq_group->attrs = msi_attrs; |
| 519 | |
| 520 | msi_irq_groups = kzalloc(sizeof(void *) * 2, GFP_KERNEL); |
| 521 | if (!msi_irq_groups) |
| 522 | goto error_irq_group; |
| 523 | msi_irq_groups[0] = msi_irq_group; |
| 524 | |
| 525 | ret = sysfs_create_groups(&pdev->dev.kobj, msi_irq_groups); |
| 526 | if (ret) |
| 527 | goto error_irq_groups; |
| 528 | pdev->msi_irq_groups = msi_irq_groups; |
Neil Horman | da8d1c8 | 2011-10-06 14:08:18 -0400 | [diff] [blame] | 529 | |
| 530 | return 0; |
| 531 | |
Greg Kroah-Hartman | 1c51b50 | 2013-12-19 12:30:17 -0800 | [diff] [blame] | 532 | error_irq_groups: |
| 533 | kfree(msi_irq_groups); |
| 534 | error_irq_group: |
| 535 | kfree(msi_irq_group); |
| 536 | error_attrs: |
| 537 | count = 0; |
| 538 | msi_attr = msi_attrs[count]; |
| 539 | while (msi_attr) { |
| 540 | msi_dev_attr = container_of(msi_attr, struct device_attribute, attr); |
| 541 | kfree(msi_attr->name); |
| 542 | kfree(msi_dev_attr); |
| 543 | ++count; |
| 544 | msi_attr = msi_attrs[count]; |
Neil Horman | da8d1c8 | 2011-10-06 14:08:18 -0400 | [diff] [blame] | 545 | } |
Greg Kroah-Hartman | 2923775 | 2014-02-13 10:47:35 -0700 | [diff] [blame] | 546 | kfree(msi_attrs); |
Neil Horman | da8d1c8 | 2011-10-06 14:08:18 -0400 | [diff] [blame] | 547 | return ret; |
| 548 | } |
| 549 | |
Jiang Liu | 63a7b17 | 2014-11-06 22:20:32 +0800 | [diff] [blame] | 550 | static struct msi_desc *msi_setup_entry(struct pci_dev *dev, int nvec) |
Yijing Wang | d873b4d | 2014-07-08 10:07:23 +0800 | [diff] [blame] | 551 | { |
| 552 | u16 control; |
| 553 | struct msi_desc *entry; |
| 554 | |
| 555 | /* MSI Entry Initialization */ |
Jiang Liu | aa48b6f | 2015-07-09 16:00:47 +0800 | [diff] [blame] | 556 | entry = alloc_msi_entry(&dev->dev); |
Yijing Wang | d873b4d | 2014-07-08 10:07:23 +0800 | [diff] [blame] | 557 | if (!entry) |
| 558 | return NULL; |
| 559 | |
| 560 | pci_read_config_word(dev, dev->msi_cap + PCI_MSI_FLAGS, &control); |
| 561 | |
| 562 | entry->msi_attrib.is_msix = 0; |
| 563 | entry->msi_attrib.is_64 = !!(control & PCI_MSI_FLAGS_64BIT); |
| 564 | entry->msi_attrib.entry_nr = 0; |
| 565 | entry->msi_attrib.maskbit = !!(control & PCI_MSI_FLAGS_MASKBIT); |
| 566 | entry->msi_attrib.default_irq = dev->irq; /* Save IOAPIC IRQ */ |
Yijing Wang | d873b4d | 2014-07-08 10:07:23 +0800 | [diff] [blame] | 567 | entry->msi_attrib.multi_cap = (control & PCI_MSI_FLAGS_QMASK) >> 1; |
Jiang Liu | 63a7b17 | 2014-11-06 22:20:32 +0800 | [diff] [blame] | 568 | entry->msi_attrib.multiple = ilog2(__roundup_pow_of_two(nvec)); |
| 569 | entry->nvec_used = nvec; |
Yijing Wang | d873b4d | 2014-07-08 10:07:23 +0800 | [diff] [blame] | 570 | |
| 571 | if (control & PCI_MSI_FLAGS_64BIT) |
| 572 | entry->mask_pos = dev->msi_cap + PCI_MSI_MASK_64; |
| 573 | else |
| 574 | entry->mask_pos = dev->msi_cap + PCI_MSI_MASK_32; |
| 575 | |
| 576 | /* Save the initial mask status */ |
| 577 | if (entry->msi_attrib.maskbit) |
| 578 | pci_read_config_dword(dev, entry->mask_pos, &entry->masked); |
| 579 | |
| 580 | return entry; |
| 581 | } |
| 582 | |
Benjamin Herrenschmidt | f144d14 | 2014-10-03 15:13:24 +1000 | [diff] [blame] | 583 | static int msi_verify_entries(struct pci_dev *dev) |
| 584 | { |
| 585 | struct msi_desc *entry; |
| 586 | |
Jiang Liu | 5004e98 | 2015-07-09 16:00:41 +0800 | [diff] [blame] | 587 | for_each_pci_msi_entry(entry, dev) { |
Benjamin Herrenschmidt | f144d14 | 2014-10-03 15:13:24 +1000 | [diff] [blame] | 588 | if (!dev->no_64bit_msi || !entry->msg.address_hi) |
| 589 | continue; |
| 590 | dev_err(&dev->dev, "Device has broken 64-bit MSI but arch" |
| 591 | " tried to assign one above 4G\n"); |
| 592 | return -EIO; |
| 593 | } |
| 594 | return 0; |
| 595 | } |
| 596 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 597 | /** |
| 598 | * msi_capability_init - configure device's MSI capability structure |
| 599 | * @dev: pointer to the pci_dev data structure of MSI device function |
Matthew Wilcox | 1c8d7b0 | 2009-03-17 08:54:10 -0400 | [diff] [blame] | 600 | * @nvec: number of interrupts to allocate |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 601 | * |
Matthew Wilcox | 1c8d7b0 | 2009-03-17 08:54:10 -0400 | [diff] [blame] | 602 | * Setup the MSI capability structure of the device with the requested |
| 603 | * number of interrupts. A return value of zero indicates the successful |
| 604 | * setup of an entry with the new MSI irq. A negative return value indicates |
| 605 | * an error, and a positive return value indicates the number of interrupts |
| 606 | * which could have been allocated. |
| 607 | */ |
| 608 | static int msi_capability_init(struct pci_dev *dev, int nvec) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 609 | { |
| 610 | struct msi_desc *entry; |
Gavin Shan | f465136 | 2013-04-04 16:54:32 +0000 | [diff] [blame] | 611 | int ret; |
Matthew Wilcox | f2440d9 | 2009-03-17 08:54:09 -0400 | [diff] [blame] | 612 | unsigned mask; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 613 | |
Michael S. Tsirkin | 61b64ab | 2015-05-07 09:52:21 -0500 | [diff] [blame] | 614 | pci_msi_set_enable(dev, 0); /* Disable MSI during set up */ |
Matthew Wilcox | 110828c | 2009-06-16 06:31:45 -0600 | [diff] [blame] | 615 | |
Jiang Liu | 63a7b17 | 2014-11-06 22:20:32 +0800 | [diff] [blame] | 616 | entry = msi_setup_entry(dev, nvec); |
Eric W. Biederman | f7feaca | 2007-01-28 12:56:37 -0700 | [diff] [blame] | 617 | if (!entry) |
| 618 | return -ENOMEM; |
Eric W. Biederman | 1ce0337 | 2006-10-04 02:16:41 -0700 | [diff] [blame] | 619 | |
Matthew Wilcox | f2440d9 | 2009-03-17 08:54:09 -0400 | [diff] [blame] | 620 | /* All MSIs are unmasked by default, Mask them all */ |
Yijing Wang | 31ea5d4 | 2014-06-19 16:30:30 +0800 | [diff] [blame] | 621 | mask = msi_mask(entry->msi_attrib.multi_cap); |
Matthew Wilcox | f2440d9 | 2009-03-17 08:54:09 -0400 | [diff] [blame] | 622 | msi_mask_irq(entry, mask, mask); |
| 623 | |
Jiang Liu | 5004e98 | 2015-07-09 16:00:41 +0800 | [diff] [blame] | 624 | list_add_tail(&entry->list, dev_to_msi_list(&dev->dev)); |
Michael Ellerman | 9c83133 | 2007-04-18 19:39:21 +1000 | [diff] [blame] | 625 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 626 | /* Configure MSI capability structure */ |
Jiang Liu | 8e047ad | 2014-11-15 22:24:07 +0800 | [diff] [blame] | 627 | ret = pci_msi_setup_msi_irqs(dev, nvec, PCI_CAP_ID_MSI); |
Michael Ellerman | 7fe3730 | 2007-04-18 19:39:21 +1000 | [diff] [blame] | 628 | if (ret) { |
Hidetoshi Seto | 7ba1930 | 2009-06-23 17:39:27 +0900 | [diff] [blame] | 629 | msi_mask_irq(entry, mask, ~mask); |
Hidetoshi Seto | f56e448 | 2009-08-06 11:32:51 +0900 | [diff] [blame] | 630 | free_msi_irqs(dev); |
Michael Ellerman | 7fe3730 | 2007-04-18 19:39:21 +1000 | [diff] [blame] | 631 | return ret; |
Mark Maule | fd58e55 | 2006-04-10 21:17:48 -0500 | [diff] [blame] | 632 | } |
Eric W. Biederman | f7feaca | 2007-01-28 12:56:37 -0700 | [diff] [blame] | 633 | |
Benjamin Herrenschmidt | f144d14 | 2014-10-03 15:13:24 +1000 | [diff] [blame] | 634 | ret = msi_verify_entries(dev); |
| 635 | if (ret) { |
| 636 | msi_mask_irq(entry, mask, ~mask); |
| 637 | free_msi_irqs(dev); |
| 638 | return ret; |
| 639 | } |
| 640 | |
Neil Horman | da8d1c8 | 2011-10-06 14:08:18 -0400 | [diff] [blame] | 641 | ret = populate_msi_sysfs(dev); |
| 642 | if (ret) { |
| 643 | msi_mask_irq(entry, mask, ~mask); |
| 644 | free_msi_irqs(dev); |
| 645 | return ret; |
| 646 | } |
| 647 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 648 | /* Set MSI enabled bits */ |
David Miller | ba698ad | 2007-10-25 01:16:30 -0700 | [diff] [blame] | 649 | pci_intx_for_msi(dev, 0); |
Michael S. Tsirkin | 61b64ab | 2015-05-07 09:52:21 -0500 | [diff] [blame] | 650 | pci_msi_set_enable(dev, 1); |
Eric W. Biederman | b1cbf4e | 2007-03-05 00:30:10 -0800 | [diff] [blame] | 651 | dev->msi_enabled = 1; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 652 | |
Jiang Liu | 5f22699 | 2015-07-30 14:00:08 -0500 | [diff] [blame] | 653 | pcibios_free_irq(dev); |
Michael Ellerman | 7fe3730 | 2007-04-18 19:39:21 +1000 | [diff] [blame] | 654 | dev->irq = entry->irq; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 655 | return 0; |
| 656 | } |
| 657 | |
Gavin Shan | 520fe9d | 2013-04-04 16:54:33 +0000 | [diff] [blame] | 658 | static void __iomem *msix_map_region(struct pci_dev *dev, unsigned nr_entries) |
Hidetoshi Seto | 5a05a9d | 2009-08-06 11:34:34 +0900 | [diff] [blame] | 659 | { |
Kenji Kaneshige | 4302e0f | 2010-06-17 10:42:44 +0900 | [diff] [blame] | 660 | resource_size_t phys_addr; |
Hidetoshi Seto | 5a05a9d | 2009-08-06 11:34:34 +0900 | [diff] [blame] | 661 | u32 table_offset; |
Yijing Wang | 6a878e5 | 2015-01-28 09:52:17 +0800 | [diff] [blame] | 662 | unsigned long flags; |
Hidetoshi Seto | 5a05a9d | 2009-08-06 11:34:34 +0900 | [diff] [blame] | 663 | u8 bir; |
| 664 | |
Bjorn Helgaas | 909094c | 2013-04-17 17:43:40 -0600 | [diff] [blame] | 665 | pci_read_config_dword(dev, dev->msix_cap + PCI_MSIX_TABLE, |
| 666 | &table_offset); |
Bjorn Helgaas | 4d18760 | 2013-04-17 18:10:07 -0600 | [diff] [blame] | 667 | bir = (u8)(table_offset & PCI_MSIX_TABLE_BIR); |
Yijing Wang | 6a878e5 | 2015-01-28 09:52:17 +0800 | [diff] [blame] | 668 | flags = pci_resource_flags(dev, bir); |
| 669 | if (!flags || (flags & IORESOURCE_UNSET)) |
| 670 | return NULL; |
| 671 | |
Bjorn Helgaas | 4d18760 | 2013-04-17 18:10:07 -0600 | [diff] [blame] | 672 | table_offset &= PCI_MSIX_TABLE_OFFSET; |
Hidetoshi Seto | 5a05a9d | 2009-08-06 11:34:34 +0900 | [diff] [blame] | 673 | phys_addr = pci_resource_start(dev, bir) + table_offset; |
| 674 | |
| 675 | return ioremap_nocache(phys_addr, nr_entries * PCI_MSIX_ENTRY_SIZE); |
| 676 | } |
| 677 | |
Gavin Shan | 520fe9d | 2013-04-04 16:54:33 +0000 | [diff] [blame] | 678 | static int msix_setup_entries(struct pci_dev *dev, void __iomem *base, |
| 679 | struct msix_entry *entries, int nvec) |
Hidetoshi Seto | d9d7070 | 2009-08-06 11:35:48 +0900 | [diff] [blame] | 680 | { |
| 681 | struct msi_desc *entry; |
| 682 | int i; |
| 683 | |
| 684 | for (i = 0; i < nvec; i++) { |
Jiang Liu | aa48b6f | 2015-07-09 16:00:47 +0800 | [diff] [blame] | 685 | entry = alloc_msi_entry(&dev->dev); |
Hidetoshi Seto | d9d7070 | 2009-08-06 11:35:48 +0900 | [diff] [blame] | 686 | if (!entry) { |
| 687 | if (!i) |
| 688 | iounmap(base); |
| 689 | else |
| 690 | free_msi_irqs(dev); |
| 691 | /* No enough memory. Don't try again */ |
| 692 | return -ENOMEM; |
| 693 | } |
| 694 | |
| 695 | entry->msi_attrib.is_msix = 1; |
| 696 | entry->msi_attrib.is_64 = 1; |
| 697 | entry->msi_attrib.entry_nr = entries[i].entry; |
| 698 | entry->msi_attrib.default_irq = dev->irq; |
Hidetoshi Seto | d9d7070 | 2009-08-06 11:35:48 +0900 | [diff] [blame] | 699 | entry->mask_base = base; |
Jiang Liu | 63a7b17 | 2014-11-06 22:20:32 +0800 | [diff] [blame] | 700 | entry->nvec_used = 1; |
Hidetoshi Seto | d9d7070 | 2009-08-06 11:35:48 +0900 | [diff] [blame] | 701 | |
Jiang Liu | 5004e98 | 2015-07-09 16:00:41 +0800 | [diff] [blame] | 702 | list_add_tail(&entry->list, dev_to_msi_list(&dev->dev)); |
Hidetoshi Seto | d9d7070 | 2009-08-06 11:35:48 +0900 | [diff] [blame] | 703 | } |
| 704 | |
| 705 | return 0; |
| 706 | } |
| 707 | |
Hidetoshi Seto | 75cb342 | 2009-08-06 11:35:10 +0900 | [diff] [blame] | 708 | static void msix_program_entries(struct pci_dev *dev, |
Gavin Shan | 520fe9d | 2013-04-04 16:54:33 +0000 | [diff] [blame] | 709 | struct msix_entry *entries) |
Hidetoshi Seto | 75cb342 | 2009-08-06 11:35:10 +0900 | [diff] [blame] | 710 | { |
| 711 | struct msi_desc *entry; |
| 712 | int i = 0; |
| 713 | |
Jiang Liu | 5004e98 | 2015-07-09 16:00:41 +0800 | [diff] [blame] | 714 | for_each_pci_msi_entry(entry, dev) { |
Hidetoshi Seto | 75cb342 | 2009-08-06 11:35:10 +0900 | [diff] [blame] | 715 | int offset = entries[i].entry * PCI_MSIX_ENTRY_SIZE + |
| 716 | PCI_MSIX_ENTRY_VECTOR_CTRL; |
| 717 | |
| 718 | entries[i].vector = entry->irq; |
Hidetoshi Seto | 75cb342 | 2009-08-06 11:35:10 +0900 | [diff] [blame] | 719 | entry->masked = readl(entry->mask_base + offset); |
| 720 | msix_mask_irq(entry, 1); |
| 721 | i++; |
| 722 | } |
| 723 | } |
| 724 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 725 | /** |
| 726 | * msix_capability_init - configure device's MSI-X capability |
| 727 | * @dev: pointer to the pci_dev data structure of MSI-X device function |
Randy Dunlap | 8f7020d | 2005-10-23 11:57:38 -0700 | [diff] [blame] | 728 | * @entries: pointer to an array of struct msix_entry entries |
| 729 | * @nvec: number of @entries |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 730 | * |
Steven Cole | eaae4b3 | 2005-05-03 18:38:30 -0600 | [diff] [blame] | 731 | * Setup the MSI-X capability structure of device function with a |
Eric W. Biederman | 1ce0337 | 2006-10-04 02:16:41 -0700 | [diff] [blame] | 732 | * single MSI-X irq. A return of zero indicates the successful setup of |
| 733 | * requested MSI-X entries with allocated irqs or non-zero for otherwise. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 734 | **/ |
| 735 | static int msix_capability_init(struct pci_dev *dev, |
| 736 | struct msix_entry *entries, int nvec) |
| 737 | { |
Gavin Shan | 520fe9d | 2013-04-04 16:54:33 +0000 | [diff] [blame] | 738 | int ret; |
Hidetoshi Seto | 5a05a9d | 2009-08-06 11:34:34 +0900 | [diff] [blame] | 739 | u16 control; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 740 | void __iomem *base; |
| 741 | |
Matthew Wilcox | f598282 | 2009-06-18 19:15:59 -0700 | [diff] [blame] | 742 | /* Ensure MSI-X is disabled while it is set up */ |
Michael S. Tsirkin | 61b64ab | 2015-05-07 09:52:21 -0500 | [diff] [blame] | 743 | pci_msix_clear_and_set_ctrl(dev, PCI_MSIX_FLAGS_ENABLE, 0); |
Matthew Wilcox | f598282 | 2009-06-18 19:15:59 -0700 | [diff] [blame] | 744 | |
Yijing Wang | 66f0d0c | 2014-06-19 16:29:53 +0800 | [diff] [blame] | 745 | pci_read_config_word(dev, dev->msix_cap + PCI_MSIX_FLAGS, &control); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 746 | /* Request & Map MSI-X table region */ |
Bjorn Helgaas | 527eee2 | 2013-04-17 17:44:48 -0600 | [diff] [blame] | 747 | base = msix_map_region(dev, msix_table_size(control)); |
Hidetoshi Seto | 5a05a9d | 2009-08-06 11:34:34 +0900 | [diff] [blame] | 748 | if (!base) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 749 | return -ENOMEM; |
| 750 | |
Gavin Shan | 520fe9d | 2013-04-04 16:54:33 +0000 | [diff] [blame] | 751 | ret = msix_setup_entries(dev, base, entries, nvec); |
Hidetoshi Seto | d9d7070 | 2009-08-06 11:35:48 +0900 | [diff] [blame] | 752 | if (ret) |
| 753 | return ret; |
Michael Ellerman | 9c83133 | 2007-04-18 19:39:21 +1000 | [diff] [blame] | 754 | |
Jiang Liu | 8e047ad | 2014-11-15 22:24:07 +0800 | [diff] [blame] | 755 | ret = pci_msi_setup_msi_irqs(dev, nvec, PCI_CAP_ID_MSIX); |
Hidetoshi Seto | 583871d | 2009-08-06 11:33:39 +0900 | [diff] [blame] | 756 | if (ret) |
Alexander Gordeev | 2adc790 | 2013-12-16 09:34:56 +0100 | [diff] [blame] | 757 | goto out_avail; |
Michael Ellerman | 9c83133 | 2007-04-18 19:39:21 +1000 | [diff] [blame] | 758 | |
Benjamin Herrenschmidt | f144d14 | 2014-10-03 15:13:24 +1000 | [diff] [blame] | 759 | /* Check if all MSI entries honor device restrictions */ |
| 760 | ret = msi_verify_entries(dev); |
| 761 | if (ret) |
| 762 | goto out_free; |
| 763 | |
Matthew Wilcox | f598282 | 2009-06-18 19:15:59 -0700 | [diff] [blame] | 764 | /* |
| 765 | * Some devices require MSI-X to be enabled before we can touch the |
| 766 | * MSI-X registers. We need to mask all the vectors to prevent |
| 767 | * interrupts coming in before they're fully set up. |
| 768 | */ |
Michael S. Tsirkin | 61b64ab | 2015-05-07 09:52:21 -0500 | [diff] [blame] | 769 | pci_msix_clear_and_set_ctrl(dev, 0, |
Yijing Wang | 66f0d0c | 2014-06-19 16:29:53 +0800 | [diff] [blame] | 770 | PCI_MSIX_FLAGS_MASKALL | PCI_MSIX_FLAGS_ENABLE); |
Matthew Wilcox | f598282 | 2009-06-18 19:15:59 -0700 | [diff] [blame] | 771 | |
Hidetoshi Seto | 75cb342 | 2009-08-06 11:35:10 +0900 | [diff] [blame] | 772 | msix_program_entries(dev, entries); |
Matthew Wilcox | f598282 | 2009-06-18 19:15:59 -0700 | [diff] [blame] | 773 | |
Neil Horman | da8d1c8 | 2011-10-06 14:08:18 -0400 | [diff] [blame] | 774 | ret = populate_msi_sysfs(dev); |
Alexander Gordeev | 2adc790 | 2013-12-16 09:34:56 +0100 | [diff] [blame] | 775 | if (ret) |
| 776 | goto out_free; |
Neil Horman | da8d1c8 | 2011-10-06 14:08:18 -0400 | [diff] [blame] | 777 | |
Matthew Wilcox | f598282 | 2009-06-18 19:15:59 -0700 | [diff] [blame] | 778 | /* Set MSI-X enabled bits and unmask the function */ |
David Miller | ba698ad | 2007-10-25 01:16:30 -0700 | [diff] [blame] | 779 | pci_intx_for_msi(dev, 0); |
Eric W. Biederman | b1cbf4e | 2007-03-05 00:30:10 -0800 | [diff] [blame] | 780 | dev->msix_enabled = 1; |
Michael S. Tsirkin | 61b64ab | 2015-05-07 09:52:21 -0500 | [diff] [blame] | 781 | pci_msix_clear_and_set_ctrl(dev, PCI_MSIX_FLAGS_MASKALL, 0); |
Matthew Wilcox | 8d18101 | 2009-05-08 07:13:33 -0600 | [diff] [blame] | 782 | |
Jiang Liu | 5f22699 | 2015-07-30 14:00:08 -0500 | [diff] [blame] | 783 | pcibios_free_irq(dev); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 784 | return 0; |
Hidetoshi Seto | 583871d | 2009-08-06 11:33:39 +0900 | [diff] [blame] | 785 | |
Alexander Gordeev | 2adc790 | 2013-12-16 09:34:56 +0100 | [diff] [blame] | 786 | out_avail: |
Hidetoshi Seto | 583871d | 2009-08-06 11:33:39 +0900 | [diff] [blame] | 787 | if (ret < 0) { |
| 788 | /* |
| 789 | * If we had some success, report the number of irqs |
| 790 | * we succeeded in setting up. |
| 791 | */ |
Hidetoshi Seto | d9d7070 | 2009-08-06 11:35:48 +0900 | [diff] [blame] | 792 | struct msi_desc *entry; |
Hidetoshi Seto | 583871d | 2009-08-06 11:33:39 +0900 | [diff] [blame] | 793 | int avail = 0; |
| 794 | |
Jiang Liu | 5004e98 | 2015-07-09 16:00:41 +0800 | [diff] [blame] | 795 | for_each_pci_msi_entry(entry, dev) { |
Hidetoshi Seto | 583871d | 2009-08-06 11:33:39 +0900 | [diff] [blame] | 796 | if (entry->irq != 0) |
| 797 | avail++; |
| 798 | } |
| 799 | if (avail != 0) |
| 800 | ret = avail; |
| 801 | } |
| 802 | |
Alexander Gordeev | 2adc790 | 2013-12-16 09:34:56 +0100 | [diff] [blame] | 803 | out_free: |
Hidetoshi Seto | 583871d | 2009-08-06 11:33:39 +0900 | [diff] [blame] | 804 | free_msi_irqs(dev); |
| 805 | |
| 806 | return ret; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 807 | } |
| 808 | |
| 809 | /** |
Alexander Gordeev | a06cd74 | 2014-09-23 12:45:58 -0600 | [diff] [blame] | 810 | * pci_msi_supported - check whether MSI may be enabled on a device |
Brice Goglin | 24334a1 | 2006-08-31 01:55:07 -0400 | [diff] [blame] | 811 | * @dev: pointer to the pci_dev data structure of MSI device function |
Michael Ellerman | c9953a7 | 2007-04-05 17:19:08 +1000 | [diff] [blame] | 812 | * @nvec: how many MSIs have been requested ? |
Brice Goglin | 24334a1 | 2006-08-31 01:55:07 -0400 | [diff] [blame] | 813 | * |
Bjorn Helgaas | f762598 | 2013-11-14 11:28:18 -0700 | [diff] [blame] | 814 | * Look at global flags, the device itself, and its parent buses |
Michael Ellerman | 17bbc12 | 2007-04-05 17:19:07 +1000 | [diff] [blame] | 815 | * to determine if MSI/-X are supported for the device. If MSI/-X is |
Alexander Gordeev | a06cd74 | 2014-09-23 12:45:58 -0600 | [diff] [blame] | 816 | * supported return 1, else return 0. |
Brice Goglin | 24334a1 | 2006-08-31 01:55:07 -0400 | [diff] [blame] | 817 | **/ |
Alexander Gordeev | a06cd74 | 2014-09-23 12:45:58 -0600 | [diff] [blame] | 818 | static int pci_msi_supported(struct pci_dev *dev, int nvec) |
Brice Goglin | 24334a1 | 2006-08-31 01:55:07 -0400 | [diff] [blame] | 819 | { |
| 820 | struct pci_bus *bus; |
| 821 | |
Brice Goglin | 0306ebf | 2006-10-05 10:24:31 +0200 | [diff] [blame] | 822 | /* MSI must be globally enabled and supported by the device */ |
Alexander Gordeev | 27e2060 | 2014-09-23 14:25:11 -0600 | [diff] [blame] | 823 | if (!pci_msi_enable) |
Alexander Gordeev | a06cd74 | 2014-09-23 12:45:58 -0600 | [diff] [blame] | 824 | return 0; |
Alexander Gordeev | 27e2060 | 2014-09-23 14:25:11 -0600 | [diff] [blame] | 825 | |
| 826 | if (!dev || dev->no_msi || dev->current_state != PCI_D0) |
Alexander Gordeev | a06cd74 | 2014-09-23 12:45:58 -0600 | [diff] [blame] | 827 | return 0; |
Brice Goglin | 24334a1 | 2006-08-31 01:55:07 -0400 | [diff] [blame] | 828 | |
Michael Ellerman | 314e77b | 2007-04-05 17:19:12 +1000 | [diff] [blame] | 829 | /* |
| 830 | * You can't ask to have 0 or less MSIs configured. |
| 831 | * a) it's stupid .. |
| 832 | * b) the list manipulation code assumes nvec >= 1. |
| 833 | */ |
| 834 | if (nvec < 1) |
Alexander Gordeev | a06cd74 | 2014-09-23 12:45:58 -0600 | [diff] [blame] | 835 | return 0; |
Michael Ellerman | 314e77b | 2007-04-05 17:19:12 +1000 | [diff] [blame] | 836 | |
Hidetoshi Seto | 500559a | 2009-08-10 10:14:15 +0900 | [diff] [blame] | 837 | /* |
| 838 | * Any bridge which does NOT route MSI transactions from its |
| 839 | * secondary bus to its primary bus must set NO_MSI flag on |
Brice Goglin | 0306ebf | 2006-10-05 10:24:31 +0200 | [diff] [blame] | 840 | * the secondary pci_bus. |
| 841 | * We expect only arch-specific PCI host bus controller driver |
| 842 | * or quirks for specific PCI bridges to be setting NO_MSI. |
| 843 | */ |
Brice Goglin | 24334a1 | 2006-08-31 01:55:07 -0400 | [diff] [blame] | 844 | for (bus = dev->bus; bus; bus = bus->parent) |
| 845 | if (bus->bus_flags & PCI_BUS_FLAGS_NO_MSI) |
Alexander Gordeev | a06cd74 | 2014-09-23 12:45:58 -0600 | [diff] [blame] | 846 | return 0; |
Brice Goglin | 24334a1 | 2006-08-31 01:55:07 -0400 | [diff] [blame] | 847 | |
Alexander Gordeev | a06cd74 | 2014-09-23 12:45:58 -0600 | [diff] [blame] | 848 | return 1; |
Brice Goglin | 24334a1 | 2006-08-31 01:55:07 -0400 | [diff] [blame] | 849 | } |
| 850 | |
| 851 | /** |
Alexander Gordeev | d1ac1d2 | 2013-12-30 08:28:13 +0100 | [diff] [blame] | 852 | * pci_msi_vec_count - Return the number of MSI vectors a device can send |
| 853 | * @dev: device to report about |
| 854 | * |
| 855 | * This function returns the number of MSI vectors a device requested via |
| 856 | * Multiple Message Capable register. It returns a negative errno if the |
| 857 | * device is not capable sending MSI interrupts. Otherwise, the call succeeds |
| 858 | * and returns a power of two, up to a maximum of 2^5 (32), according to the |
| 859 | * MSI specification. |
| 860 | **/ |
| 861 | int pci_msi_vec_count(struct pci_dev *dev) |
| 862 | { |
| 863 | int ret; |
| 864 | u16 msgctl; |
| 865 | |
| 866 | if (!dev->msi_cap) |
| 867 | return -EINVAL; |
| 868 | |
| 869 | pci_read_config_word(dev, dev->msi_cap + PCI_MSI_FLAGS, &msgctl); |
| 870 | ret = 1 << ((msgctl & PCI_MSI_FLAGS_QMASK) >> 1); |
| 871 | |
| 872 | return ret; |
| 873 | } |
| 874 | EXPORT_SYMBOL(pci_msi_vec_count); |
| 875 | |
Matthew Wilcox | f2440d9 | 2009-03-17 08:54:09 -0400 | [diff] [blame] | 876 | void pci_msi_shutdown(struct pci_dev *dev) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 877 | { |
Matthew Wilcox | f2440d9 | 2009-03-17 08:54:09 -0400 | [diff] [blame] | 878 | struct msi_desc *desc; |
| 879 | u32 mask; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 880 | |
Michael Ellerman | 128bc5f | 2007-03-22 21:51:39 +1100 | [diff] [blame] | 881 | if (!pci_msi_enable || !dev || !dev->msi_enabled) |
Eric W. Biederman | ded86d8 | 2007-01-28 12:42:52 -0700 | [diff] [blame] | 882 | return; |
| 883 | |
Jiang Liu | 5004e98 | 2015-07-09 16:00:41 +0800 | [diff] [blame] | 884 | BUG_ON(list_empty(dev_to_msi_list(&dev->dev))); |
Jiang Liu | 4a7cc83 | 2015-07-09 16:00:44 +0800 | [diff] [blame] | 885 | desc = first_pci_msi_entry(dev); |
Matthew Wilcox | 110828c | 2009-06-16 06:31:45 -0600 | [diff] [blame] | 886 | |
Michael S. Tsirkin | 61b64ab | 2015-05-07 09:52:21 -0500 | [diff] [blame] | 887 | pci_msi_set_enable(dev, 0); |
David Miller | ba698ad | 2007-10-25 01:16:30 -0700 | [diff] [blame] | 888 | pci_intx_for_msi(dev, 1); |
Eric W. Biederman | b1cbf4e | 2007-03-05 00:30:10 -0800 | [diff] [blame] | 889 | dev->msi_enabled = 0; |
Eric W. Biederman | 7bd007e | 2006-10-04 02:16:31 -0700 | [diff] [blame] | 890 | |
Hidetoshi Seto | 12abb8b | 2009-06-24 12:08:09 +0900 | [diff] [blame] | 891 | /* Return the device with MSI unmasked as initial states */ |
Yijing Wang | 31ea5d4 | 2014-06-19 16:30:30 +0800 | [diff] [blame] | 892 | mask = msi_mask(desc->msi_attrib.multi_cap); |
Hidetoshi Seto | 12abb8b | 2009-06-24 12:08:09 +0900 | [diff] [blame] | 893 | /* Keep cached state to be restored */ |
Thomas Gleixner | 23ed8d5 | 2014-11-23 11:55:58 +0100 | [diff] [blame] | 894 | __pci_msi_desc_mask_irq(desc, mask, ~mask); |
Michael Ellerman | e387b9e | 2007-03-22 21:51:27 +1100 | [diff] [blame] | 895 | |
| 896 | /* Restore dev->irq to its default pin-assertion irq */ |
Matthew Wilcox | f2440d9 | 2009-03-17 08:54:09 -0400 | [diff] [blame] | 897 | dev->irq = desc->msi_attrib.default_irq; |
Jiang Liu | 5f22699 | 2015-07-30 14:00:08 -0500 | [diff] [blame] | 898 | pcibios_alloc_irq(dev); |
Yinghai Lu | d52877c | 2008-04-23 14:58:09 -0700 | [diff] [blame] | 899 | } |
Matthew Wilcox | 24d2755 | 2009-03-17 08:54:06 -0400 | [diff] [blame] | 900 | |
Hidetoshi Seto | 500559a | 2009-08-10 10:14:15 +0900 | [diff] [blame] | 901 | void pci_disable_msi(struct pci_dev *dev) |
Yinghai Lu | d52877c | 2008-04-23 14:58:09 -0700 | [diff] [blame] | 902 | { |
Yinghai Lu | d52877c | 2008-04-23 14:58:09 -0700 | [diff] [blame] | 903 | if (!pci_msi_enable || !dev || !dev->msi_enabled) |
| 904 | return; |
| 905 | |
| 906 | pci_msi_shutdown(dev); |
Hidetoshi Seto | f56e448 | 2009-08-06 11:32:51 +0900 | [diff] [blame] | 907 | free_msi_irqs(dev); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 908 | } |
Michael Ellerman | 4cc086f | 2007-03-22 21:51:34 +1100 | [diff] [blame] | 909 | EXPORT_SYMBOL(pci_disable_msi); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 910 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 911 | /** |
Alexander Gordeev | ff1aa43 | 2013-12-30 08:28:15 +0100 | [diff] [blame] | 912 | * pci_msix_vec_count - return the number of device's MSI-X table entries |
Rafael J. Wysocki | a52e2e3 | 2009-01-24 00:21:14 +0100 | [diff] [blame] | 913 | * @dev: pointer to the pci_dev data structure of MSI-X device function |
Alexander Gordeev | ff1aa43 | 2013-12-30 08:28:15 +0100 | [diff] [blame] | 914 | * This function returns the number of device's MSI-X table entries and |
| 915 | * therefore the number of MSI-X vectors device is capable of sending. |
| 916 | * It returns a negative errno if the device is not capable of sending MSI-X |
| 917 | * interrupts. |
| 918 | **/ |
| 919 | int pci_msix_vec_count(struct pci_dev *dev) |
Rafael J. Wysocki | a52e2e3 | 2009-01-24 00:21:14 +0100 | [diff] [blame] | 920 | { |
Rafael J. Wysocki | a52e2e3 | 2009-01-24 00:21:14 +0100 | [diff] [blame] | 921 | u16 control; |
| 922 | |
Gavin Shan | 520fe9d | 2013-04-04 16:54:33 +0000 | [diff] [blame] | 923 | if (!dev->msix_cap) |
Alexander Gordeev | ff1aa43 | 2013-12-30 08:28:15 +0100 | [diff] [blame] | 924 | return -EINVAL; |
Rafael J. Wysocki | a52e2e3 | 2009-01-24 00:21:14 +0100 | [diff] [blame] | 925 | |
Bjorn Helgaas | f84ecd2 | 2013-04-17 17:38:32 -0600 | [diff] [blame] | 926 | pci_read_config_word(dev, dev->msix_cap + PCI_MSIX_FLAGS, &control); |
Bjorn Helgaas | 527eee2 | 2013-04-17 17:44:48 -0600 | [diff] [blame] | 927 | return msix_table_size(control); |
Rafael J. Wysocki | a52e2e3 | 2009-01-24 00:21:14 +0100 | [diff] [blame] | 928 | } |
Alexander Gordeev | ff1aa43 | 2013-12-30 08:28:15 +0100 | [diff] [blame] | 929 | EXPORT_SYMBOL(pci_msix_vec_count); |
Rafael J. Wysocki | a52e2e3 | 2009-01-24 00:21:14 +0100 | [diff] [blame] | 930 | |
| 931 | /** |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 932 | * pci_enable_msix - configure device's MSI-X capability structure |
| 933 | * @dev: pointer to the pci_dev data structure of MSI-X device function |
Greg Kroah-Hartman | 70549ad | 2005-06-06 23:07:46 -0700 | [diff] [blame] | 934 | * @entries: pointer to an array of MSI-X entries |
Eric W. Biederman | 1ce0337 | 2006-10-04 02:16:41 -0700 | [diff] [blame] | 935 | * @nvec: number of MSI-X irqs requested for allocation by device driver |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 936 | * |
| 937 | * Setup the MSI-X capability structure of device function with the number |
Eric W. Biederman | 1ce0337 | 2006-10-04 02:16:41 -0700 | [diff] [blame] | 938 | * of requested irqs upon its software driver call to request for |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 939 | * MSI-X mode enabled on its hardware device function. A return of zero |
| 940 | * indicates the successful configuration of MSI-X capability structure |
Eric W. Biederman | 1ce0337 | 2006-10-04 02:16:41 -0700 | [diff] [blame] | 941 | * with new allocated MSI-X irqs. A return of < 0 indicates a failure. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 942 | * Or a return of > 0 indicates that driver request is exceeding the number |
Michael S. Tsirkin | 57fbf52 | 2009-05-07 11:28:41 +0300 | [diff] [blame] | 943 | * of irqs or MSI-X vectors available. Driver should use the returned value to |
| 944 | * re-send its request. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 945 | **/ |
Hidetoshi Seto | 500559a | 2009-08-10 10:14:15 +0900 | [diff] [blame] | 946 | int pci_enable_msix(struct pci_dev *dev, struct msix_entry *entries, int nvec) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 947 | { |
Bjorn Helgaas | 5ec0940 | 2014-09-23 14:38:28 -0600 | [diff] [blame] | 948 | int nr_entries; |
Eric W. Biederman | ded86d8 | 2007-01-28 12:42:52 -0700 | [diff] [blame] | 949 | int i, j; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 950 | |
Alexander Gordeev | a06cd74 | 2014-09-23 12:45:58 -0600 | [diff] [blame] | 951 | if (!pci_msi_supported(dev, nvec)) |
| 952 | return -EINVAL; |
Michael Ellerman | c9953a7 | 2007-04-05 17:19:08 +1000 | [diff] [blame] | 953 | |
Alexander Gordeev | 27e2060 | 2014-09-23 14:25:11 -0600 | [diff] [blame] | 954 | if (!entries) |
| 955 | return -EINVAL; |
| 956 | |
Alexander Gordeev | ff1aa43 | 2013-12-30 08:28:15 +0100 | [diff] [blame] | 957 | nr_entries = pci_msix_vec_count(dev); |
| 958 | if (nr_entries < 0) |
| 959 | return nr_entries; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 960 | if (nvec > nr_entries) |
Michael S. Tsirkin | 57fbf52 | 2009-05-07 11:28:41 +0300 | [diff] [blame] | 961 | return nr_entries; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 962 | |
| 963 | /* Check for any invalid entries */ |
| 964 | for (i = 0; i < nvec; i++) { |
| 965 | if (entries[i].entry >= nr_entries) |
| 966 | return -EINVAL; /* invalid entry */ |
| 967 | for (j = i + 1; j < nvec; j++) { |
| 968 | if (entries[i].entry == entries[j].entry) |
| 969 | return -EINVAL; /* duplicate entry */ |
| 970 | } |
| 971 | } |
Eric W. Biederman | ded86d8 | 2007-01-28 12:42:52 -0700 | [diff] [blame] | 972 | WARN_ON(!!dev->msix_enabled); |
Eric W. Biederman | 7bd007e | 2006-10-04 02:16:31 -0700 | [diff] [blame] | 973 | |
Eric W. Biederman | 1ce0337 | 2006-10-04 02:16:41 -0700 | [diff] [blame] | 974 | /* Check whether driver already requested for MSI irq */ |
Hidetoshi Seto | 500559a | 2009-08-10 10:14:15 +0900 | [diff] [blame] | 975 | if (dev->msi_enabled) { |
Ryan Desfosses | 227f064 | 2014-04-18 20:13:50 -0400 | [diff] [blame] | 976 | dev_info(&dev->dev, "can't enable MSI-X (MSI IRQ already assigned)\n"); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 977 | return -EINVAL; |
| 978 | } |
Bjorn Helgaas | 5ec0940 | 2014-09-23 14:38:28 -0600 | [diff] [blame] | 979 | return msix_capability_init(dev, entries, nvec); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 980 | } |
Michael Ellerman | 4cc086f | 2007-03-22 21:51:34 +1100 | [diff] [blame] | 981 | EXPORT_SYMBOL(pci_enable_msix); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 982 | |
Hidetoshi Seto | 500559a | 2009-08-10 10:14:15 +0900 | [diff] [blame] | 983 | void pci_msix_shutdown(struct pci_dev *dev) |
Michael Ellerman | fc4afc7 | 2007-03-22 21:51:33 +1100 | [diff] [blame] | 984 | { |
Hidetoshi Seto | 12abb8b | 2009-06-24 12:08:09 +0900 | [diff] [blame] | 985 | struct msi_desc *entry; |
| 986 | |
Michael Ellerman | 128bc5f | 2007-03-22 21:51:39 +1100 | [diff] [blame] | 987 | if (!pci_msi_enable || !dev || !dev->msix_enabled) |
Eric W. Biederman | ded86d8 | 2007-01-28 12:42:52 -0700 | [diff] [blame] | 988 | return; |
| 989 | |
Hidetoshi Seto | 12abb8b | 2009-06-24 12:08:09 +0900 | [diff] [blame] | 990 | /* Return the device with MSI-X masked as initial states */ |
Jiang Liu | 5004e98 | 2015-07-09 16:00:41 +0800 | [diff] [blame] | 991 | for_each_pci_msi_entry(entry, dev) { |
Hidetoshi Seto | 12abb8b | 2009-06-24 12:08:09 +0900 | [diff] [blame] | 992 | /* Keep cached states to be restored */ |
Thomas Gleixner | 23ed8d5 | 2014-11-23 11:55:58 +0100 | [diff] [blame] | 993 | __pci_msix_desc_mask_irq(entry, 1); |
Hidetoshi Seto | 12abb8b | 2009-06-24 12:08:09 +0900 | [diff] [blame] | 994 | } |
| 995 | |
Michael S. Tsirkin | 61b64ab | 2015-05-07 09:52:21 -0500 | [diff] [blame] | 996 | pci_msix_clear_and_set_ctrl(dev, PCI_MSIX_FLAGS_ENABLE, 0); |
David Miller | ba698ad | 2007-10-25 01:16:30 -0700 | [diff] [blame] | 997 | pci_intx_for_msi(dev, 1); |
Eric W. Biederman | b1cbf4e | 2007-03-05 00:30:10 -0800 | [diff] [blame] | 998 | dev->msix_enabled = 0; |
Jiang Liu | 5f22699 | 2015-07-30 14:00:08 -0500 | [diff] [blame] | 999 | pcibios_alloc_irq(dev); |
Yinghai Lu | d52877c | 2008-04-23 14:58:09 -0700 | [diff] [blame] | 1000 | } |
Hidetoshi Seto | c901851 | 2009-08-06 11:31:27 +0900 | [diff] [blame] | 1001 | |
Hidetoshi Seto | 500559a | 2009-08-10 10:14:15 +0900 | [diff] [blame] | 1002 | void pci_disable_msix(struct pci_dev *dev) |
Yinghai Lu | d52877c | 2008-04-23 14:58:09 -0700 | [diff] [blame] | 1003 | { |
| 1004 | if (!pci_msi_enable || !dev || !dev->msix_enabled) |
| 1005 | return; |
| 1006 | |
| 1007 | pci_msix_shutdown(dev); |
Hidetoshi Seto | f56e448 | 2009-08-06 11:32:51 +0900 | [diff] [blame] | 1008 | free_msi_irqs(dev); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1009 | } |
Michael Ellerman | 4cc086f | 2007-03-22 21:51:34 +1100 | [diff] [blame] | 1010 | EXPORT_SYMBOL(pci_disable_msix); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1011 | |
Matthew Wilcox | 309e57d | 2006-03-05 22:33:34 -0700 | [diff] [blame] | 1012 | void pci_no_msi(void) |
| 1013 | { |
| 1014 | pci_msi_enable = 0; |
| 1015 | } |
Michael Ellerman | c9953a7 | 2007-04-05 17:19:08 +1000 | [diff] [blame] | 1016 | |
Andrew Patterson | 07ae95f | 2008-11-10 15:31:05 -0700 | [diff] [blame] | 1017 | /** |
| 1018 | * pci_msi_enabled - is MSI enabled? |
| 1019 | * |
| 1020 | * Returns true if MSI has not been disabled by the command-line option |
| 1021 | * pci=nomsi. |
| 1022 | **/ |
| 1023 | int pci_msi_enabled(void) |
| 1024 | { |
| 1025 | return pci_msi_enable; |
| 1026 | } |
| 1027 | EXPORT_SYMBOL(pci_msi_enabled); |
| 1028 | |
Alexander Gordeev | 302a252 | 2013-12-30 08:28:16 +0100 | [diff] [blame] | 1029 | /** |
| 1030 | * pci_enable_msi_range - configure device's MSI capability structure |
| 1031 | * @dev: device to configure |
| 1032 | * @minvec: minimal number of interrupts to configure |
| 1033 | * @maxvec: maximum number of interrupts to configure |
| 1034 | * |
| 1035 | * This function tries to allocate a maximum possible number of interrupts in a |
| 1036 | * range between @minvec and @maxvec. It returns a negative errno if an error |
| 1037 | * occurs. If it succeeds, it returns the actual number of interrupts allocated |
| 1038 | * and updates the @dev's irq member to the lowest new interrupt number; |
| 1039 | * the other interrupt numbers allocated to this device are consecutive. |
| 1040 | **/ |
| 1041 | int pci_enable_msi_range(struct pci_dev *dev, int minvec, int maxvec) |
| 1042 | { |
Alexander Gordeev | 034cd97 | 2014-04-14 15:28:35 +0200 | [diff] [blame] | 1043 | int nvec; |
Alexander Gordeev | 302a252 | 2013-12-30 08:28:16 +0100 | [diff] [blame] | 1044 | int rc; |
| 1045 | |
Alexander Gordeev | a06cd74 | 2014-09-23 12:45:58 -0600 | [diff] [blame] | 1046 | if (!pci_msi_supported(dev, minvec)) |
| 1047 | return -EINVAL; |
Alexander Gordeev | 034cd97 | 2014-04-14 15:28:35 +0200 | [diff] [blame] | 1048 | |
| 1049 | WARN_ON(!!dev->msi_enabled); |
| 1050 | |
| 1051 | /* Check whether driver already requested MSI-X irqs */ |
| 1052 | if (dev->msix_enabled) { |
| 1053 | dev_info(&dev->dev, |
| 1054 | "can't enable MSI (MSI-X already enabled)\n"); |
| 1055 | return -EINVAL; |
| 1056 | } |
| 1057 | |
Alexander Gordeev | 302a252 | 2013-12-30 08:28:16 +0100 | [diff] [blame] | 1058 | if (maxvec < minvec) |
| 1059 | return -ERANGE; |
| 1060 | |
Alexander Gordeev | 034cd97 | 2014-04-14 15:28:35 +0200 | [diff] [blame] | 1061 | nvec = pci_msi_vec_count(dev); |
| 1062 | if (nvec < 0) |
| 1063 | return nvec; |
| 1064 | else if (nvec < minvec) |
| 1065 | return -EINVAL; |
| 1066 | else if (nvec > maxvec) |
| 1067 | nvec = maxvec; |
| 1068 | |
Alexander Gordeev | 302a252 | 2013-12-30 08:28:16 +0100 | [diff] [blame] | 1069 | do { |
Alexander Gordeev | 034cd97 | 2014-04-14 15:28:35 +0200 | [diff] [blame] | 1070 | rc = msi_capability_init(dev, nvec); |
Alexander Gordeev | 302a252 | 2013-12-30 08:28:16 +0100 | [diff] [blame] | 1071 | if (rc < 0) { |
| 1072 | return rc; |
| 1073 | } else if (rc > 0) { |
| 1074 | if (rc < minvec) |
| 1075 | return -ENOSPC; |
| 1076 | nvec = rc; |
| 1077 | } |
| 1078 | } while (rc); |
| 1079 | |
| 1080 | return nvec; |
| 1081 | } |
| 1082 | EXPORT_SYMBOL(pci_enable_msi_range); |
| 1083 | |
| 1084 | /** |
| 1085 | * pci_enable_msix_range - configure device's MSI-X capability structure |
| 1086 | * @dev: pointer to the pci_dev data structure of MSI-X device function |
| 1087 | * @entries: pointer to an array of MSI-X entries |
| 1088 | * @minvec: minimum number of MSI-X irqs requested |
| 1089 | * @maxvec: maximum number of MSI-X irqs requested |
| 1090 | * |
| 1091 | * Setup the MSI-X capability structure of device function with a maximum |
| 1092 | * possible number of interrupts in the range between @minvec and @maxvec |
| 1093 | * upon its software driver call to request for MSI-X mode enabled on its |
| 1094 | * hardware device function. It returns a negative errno if an error occurs. |
| 1095 | * If it succeeds, it returns the actual number of interrupts allocated and |
| 1096 | * indicates the successful configuration of MSI-X capability structure |
| 1097 | * with new allocated MSI-X interrupts. |
| 1098 | **/ |
| 1099 | int pci_enable_msix_range(struct pci_dev *dev, struct msix_entry *entries, |
| 1100 | int minvec, int maxvec) |
| 1101 | { |
| 1102 | int nvec = maxvec; |
| 1103 | int rc; |
| 1104 | |
| 1105 | if (maxvec < minvec) |
| 1106 | return -ERANGE; |
| 1107 | |
| 1108 | do { |
| 1109 | rc = pci_enable_msix(dev, entries, nvec); |
| 1110 | if (rc < 0) { |
| 1111 | return rc; |
| 1112 | } else if (rc > 0) { |
| 1113 | if (rc < minvec) |
| 1114 | return -ENOSPC; |
| 1115 | nvec = rc; |
| 1116 | } |
| 1117 | } while (rc); |
| 1118 | |
| 1119 | return nvec; |
| 1120 | } |
| 1121 | EXPORT_SYMBOL(pci_enable_msix_range); |
Jiang Liu | 3878eae | 2014-11-11 21:02:18 +0800 | [diff] [blame] | 1122 | |
Jiang Liu | 25a98bd | 2015-07-09 16:00:45 +0800 | [diff] [blame] | 1123 | struct pci_dev *msi_desc_to_pci_dev(struct msi_desc *desc) |
| 1124 | { |
| 1125 | return to_pci_dev(desc->dev); |
| 1126 | } |
Jake Oshins | a4289dc | 2015-12-10 17:52:59 +0000 | [diff] [blame] | 1127 | EXPORT_SYMBOL(msi_desc_to_pci_dev); |
Jiang Liu | 25a98bd | 2015-07-09 16:00:45 +0800 | [diff] [blame] | 1128 | |
Jiang Liu | c179c9b | 2015-07-09 16:00:36 +0800 | [diff] [blame] | 1129 | void *msi_desc_to_pci_sysdata(struct msi_desc *desc) |
| 1130 | { |
| 1131 | struct pci_dev *dev = msi_desc_to_pci_dev(desc); |
| 1132 | |
| 1133 | return dev->bus->sysdata; |
| 1134 | } |
| 1135 | EXPORT_SYMBOL_GPL(msi_desc_to_pci_sysdata); |
| 1136 | |
Jiang Liu | 3878eae | 2014-11-11 21:02:18 +0800 | [diff] [blame] | 1137 | #ifdef CONFIG_PCI_MSI_IRQ_DOMAIN |
| 1138 | /** |
| 1139 | * pci_msi_domain_write_msg - Helper to write MSI message to PCI config space |
| 1140 | * @irq_data: Pointer to interrupt data of the MSI interrupt |
| 1141 | * @msg: Pointer to the message |
| 1142 | */ |
| 1143 | void pci_msi_domain_write_msg(struct irq_data *irq_data, struct msi_msg *msg) |
| 1144 | { |
Jiang Liu | 507a883 | 2015-06-01 16:05:42 +0800 | [diff] [blame] | 1145 | struct msi_desc *desc = irq_data_get_msi_desc(irq_data); |
Jiang Liu | 3878eae | 2014-11-11 21:02:18 +0800 | [diff] [blame] | 1146 | |
| 1147 | /* |
| 1148 | * For MSI-X desc->irq is always equal to irq_data->irq. For |
| 1149 | * MSI only the first interrupt of MULTI MSI passes the test. |
| 1150 | */ |
| 1151 | if (desc->irq == irq_data->irq) |
| 1152 | __pci_write_msi_msg(desc, msg); |
| 1153 | } |
| 1154 | |
| 1155 | /** |
| 1156 | * pci_msi_domain_calc_hwirq - Generate a unique ID for an MSI source |
| 1157 | * @dev: Pointer to the PCI device |
| 1158 | * @desc: Pointer to the msi descriptor |
| 1159 | * |
| 1160 | * The ID number is only used within the irqdomain. |
| 1161 | */ |
| 1162 | irq_hw_number_t pci_msi_domain_calc_hwirq(struct pci_dev *dev, |
| 1163 | struct msi_desc *desc) |
| 1164 | { |
| 1165 | return (irq_hw_number_t)desc->msi_attrib.entry_nr | |
| 1166 | PCI_DEVID(dev->bus->number, dev->devfn) << 11 | |
| 1167 | (pci_domain_nr(dev->bus) & 0xFFFFFFFF) << 27; |
| 1168 | } |
| 1169 | |
| 1170 | static inline bool pci_msi_desc_is_multi_msi(struct msi_desc *desc) |
| 1171 | { |
| 1172 | return !desc->msi_attrib.is_msix && desc->nvec_used > 1; |
| 1173 | } |
| 1174 | |
| 1175 | /** |
| 1176 | * pci_msi_domain_check_cap - Verify that @domain supports the capabilities for @dev |
| 1177 | * @domain: The interrupt domain to check |
| 1178 | * @info: The domain info for verification |
| 1179 | * @dev: The device to check |
| 1180 | * |
| 1181 | * Returns: |
| 1182 | * 0 if the functionality is supported |
| 1183 | * 1 if Multi MSI is requested, but the domain does not support it |
| 1184 | * -ENOTSUPP otherwise |
| 1185 | */ |
| 1186 | int pci_msi_domain_check_cap(struct irq_domain *domain, |
| 1187 | struct msi_domain_info *info, struct device *dev) |
| 1188 | { |
| 1189 | struct msi_desc *desc = first_pci_msi_entry(to_pci_dev(dev)); |
| 1190 | |
| 1191 | /* Special handling to support pci_enable_msi_range() */ |
| 1192 | if (pci_msi_desc_is_multi_msi(desc) && |
| 1193 | !(info->flags & MSI_FLAG_MULTI_PCI_MSI)) |
| 1194 | return 1; |
| 1195 | else if (desc->msi_attrib.is_msix && !(info->flags & MSI_FLAG_PCI_MSIX)) |
| 1196 | return -ENOTSUPP; |
| 1197 | |
| 1198 | return 0; |
| 1199 | } |
| 1200 | |
| 1201 | static int pci_msi_domain_handle_error(struct irq_domain *domain, |
| 1202 | struct msi_desc *desc, int error) |
| 1203 | { |
| 1204 | /* Special handling to support pci_enable_msi_range() */ |
| 1205 | if (pci_msi_desc_is_multi_msi(desc) && error == -ENOSPC) |
| 1206 | return 1; |
| 1207 | |
| 1208 | return error; |
| 1209 | } |
| 1210 | |
| 1211 | #ifdef GENERIC_MSI_DOMAIN_OPS |
| 1212 | static void pci_msi_domain_set_desc(msi_alloc_info_t *arg, |
| 1213 | struct msi_desc *desc) |
| 1214 | { |
| 1215 | arg->desc = desc; |
| 1216 | arg->hwirq = pci_msi_domain_calc_hwirq(msi_desc_to_pci_dev(desc), |
| 1217 | desc); |
| 1218 | } |
| 1219 | #else |
| 1220 | #define pci_msi_domain_set_desc NULL |
| 1221 | #endif |
| 1222 | |
| 1223 | static struct msi_domain_ops pci_msi_domain_ops_default = { |
| 1224 | .set_desc = pci_msi_domain_set_desc, |
| 1225 | .msi_check = pci_msi_domain_check_cap, |
| 1226 | .handle_error = pci_msi_domain_handle_error, |
| 1227 | }; |
| 1228 | |
| 1229 | static void pci_msi_domain_update_dom_ops(struct msi_domain_info *info) |
| 1230 | { |
| 1231 | struct msi_domain_ops *ops = info->ops; |
| 1232 | |
| 1233 | if (ops == NULL) { |
| 1234 | info->ops = &pci_msi_domain_ops_default; |
| 1235 | } else { |
| 1236 | if (ops->set_desc == NULL) |
| 1237 | ops->set_desc = pci_msi_domain_set_desc; |
| 1238 | if (ops->msi_check == NULL) |
| 1239 | ops->msi_check = pci_msi_domain_check_cap; |
| 1240 | if (ops->handle_error == NULL) |
| 1241 | ops->handle_error = pci_msi_domain_handle_error; |
| 1242 | } |
| 1243 | } |
| 1244 | |
| 1245 | static void pci_msi_domain_update_chip_ops(struct msi_domain_info *info) |
| 1246 | { |
| 1247 | struct irq_chip *chip = info->chip; |
| 1248 | |
| 1249 | BUG_ON(!chip); |
| 1250 | if (!chip->irq_write_msi_msg) |
| 1251 | chip->irq_write_msi_msg = pci_msi_domain_write_msg; |
Marc Zyngier | 0701c53 | 2015-10-13 19:14:45 +0100 | [diff] [blame] | 1252 | if (!chip->irq_mask) |
| 1253 | chip->irq_mask = pci_msi_mask_irq; |
| 1254 | if (!chip->irq_unmask) |
| 1255 | chip->irq_unmask = pci_msi_unmask_irq; |
Jiang Liu | 3878eae | 2014-11-11 21:02:18 +0800 | [diff] [blame] | 1256 | } |
| 1257 | |
| 1258 | /** |
Marc Zyngier | be5436c | 2015-10-13 12:51:44 +0100 | [diff] [blame] | 1259 | * pci_msi_create_irq_domain - Create a MSI interrupt domain |
| 1260 | * @fwnode: Optional fwnode of the interrupt controller |
Jiang Liu | 3878eae | 2014-11-11 21:02:18 +0800 | [diff] [blame] | 1261 | * @info: MSI domain info |
| 1262 | * @parent: Parent irq domain |
| 1263 | * |
| 1264 | * Updates the domain and chip ops and creates a MSI interrupt domain. |
| 1265 | * |
| 1266 | * Returns: |
| 1267 | * A domain pointer or NULL in case of failure. |
| 1268 | */ |
Marc Zyngier | be5436c | 2015-10-13 12:51:44 +0100 | [diff] [blame] | 1269 | struct irq_domain *pci_msi_create_irq_domain(struct fwnode_handle *fwnode, |
Jiang Liu | 3878eae | 2014-11-11 21:02:18 +0800 | [diff] [blame] | 1270 | struct msi_domain_info *info, |
| 1271 | struct irq_domain *parent) |
| 1272 | { |
Marc Zyngier | 0380839 | 2015-07-28 14:46:09 +0100 | [diff] [blame] | 1273 | struct irq_domain *domain; |
| 1274 | |
Jiang Liu | 3878eae | 2014-11-11 21:02:18 +0800 | [diff] [blame] | 1275 | if (info->flags & MSI_FLAG_USE_DEF_DOM_OPS) |
| 1276 | pci_msi_domain_update_dom_ops(info); |
| 1277 | if (info->flags & MSI_FLAG_USE_DEF_CHIP_OPS) |
| 1278 | pci_msi_domain_update_chip_ops(info); |
| 1279 | |
Marc Zyngier | be5436c | 2015-10-13 12:51:44 +0100 | [diff] [blame] | 1280 | domain = msi_create_irq_domain(fwnode, info, parent); |
Marc Zyngier | 0380839 | 2015-07-28 14:46:09 +0100 | [diff] [blame] | 1281 | if (!domain) |
| 1282 | return NULL; |
| 1283 | |
| 1284 | domain->bus_token = DOMAIN_BUS_PCI_MSI; |
| 1285 | return domain; |
Jiang Liu | 3878eae | 2014-11-11 21:02:18 +0800 | [diff] [blame] | 1286 | } |
Jake Oshins | a4289dc | 2015-12-10 17:52:59 +0000 | [diff] [blame] | 1287 | EXPORT_SYMBOL_GPL(pci_msi_create_irq_domain); |
Jiang Liu | 3878eae | 2014-11-11 21:02:18 +0800 | [diff] [blame] | 1288 | |
| 1289 | /** |
| 1290 | * pci_msi_domain_alloc_irqs - Allocate interrupts for @dev in @domain |
| 1291 | * @domain: The interrupt domain to allocate from |
| 1292 | * @dev: The device for which to allocate |
| 1293 | * @nvec: The number of interrupts to allocate |
| 1294 | * @type: Unused to allow simpler migration from the arch_XXX interfaces |
| 1295 | * |
| 1296 | * Returns: |
| 1297 | * A virtual interrupt number or an error code in case of failure |
| 1298 | */ |
| 1299 | int pci_msi_domain_alloc_irqs(struct irq_domain *domain, struct pci_dev *dev, |
| 1300 | int nvec, int type) |
| 1301 | { |
| 1302 | return msi_domain_alloc_irqs(domain, &dev->dev, nvec); |
| 1303 | } |
| 1304 | |
| 1305 | /** |
| 1306 | * pci_msi_domain_free_irqs - Free interrupts for @dev in @domain |
| 1307 | * @domain: The interrupt domain |
| 1308 | * @dev: The device for which to free interrupts |
| 1309 | */ |
| 1310 | void pci_msi_domain_free_irqs(struct irq_domain *domain, struct pci_dev *dev) |
| 1311 | { |
| 1312 | msi_domain_free_irqs(domain, &dev->dev); |
| 1313 | } |
Jiang Liu | 8e047ad | 2014-11-15 22:24:07 +0800 | [diff] [blame] | 1314 | |
| 1315 | /** |
| 1316 | * pci_msi_create_default_irq_domain - Create a default MSI interrupt domain |
Marc Zyngier | be5436c | 2015-10-13 12:51:44 +0100 | [diff] [blame] | 1317 | * @fwnode: Optional fwnode of the interrupt controller |
Jiang Liu | 8e047ad | 2014-11-15 22:24:07 +0800 | [diff] [blame] | 1318 | * @info: MSI domain info |
| 1319 | * @parent: Parent irq domain |
| 1320 | * |
| 1321 | * Returns: A domain pointer or NULL in case of failure. If successful |
| 1322 | * the default PCI/MSI irqdomain pointer is updated. |
| 1323 | */ |
Marc Zyngier | be5436c | 2015-10-13 12:51:44 +0100 | [diff] [blame] | 1324 | struct irq_domain *pci_msi_create_default_irq_domain(struct fwnode_handle *fwnode, |
Jiang Liu | 8e047ad | 2014-11-15 22:24:07 +0800 | [diff] [blame] | 1325 | struct msi_domain_info *info, struct irq_domain *parent) |
| 1326 | { |
| 1327 | struct irq_domain *domain; |
| 1328 | |
| 1329 | mutex_lock(&pci_msi_domain_lock); |
| 1330 | if (pci_msi_default_domain) { |
| 1331 | pr_err("PCI: default irq domain for PCI MSI has already been created.\n"); |
| 1332 | domain = NULL; |
| 1333 | } else { |
Marc Zyngier | be5436c | 2015-10-13 12:51:44 +0100 | [diff] [blame] | 1334 | domain = pci_msi_create_irq_domain(fwnode, info, parent); |
Jiang Liu | 8e047ad | 2014-11-15 22:24:07 +0800 | [diff] [blame] | 1335 | pci_msi_default_domain = domain; |
| 1336 | } |
| 1337 | mutex_unlock(&pci_msi_domain_lock); |
| 1338 | |
| 1339 | return domain; |
| 1340 | } |
David Daney | b6eec9b | 2015-10-08 15:10:49 -0700 | [diff] [blame] | 1341 | |
| 1342 | static int get_msi_id_cb(struct pci_dev *pdev, u16 alias, void *data) |
| 1343 | { |
| 1344 | u32 *pa = data; |
| 1345 | |
| 1346 | *pa = alias; |
| 1347 | return 0; |
| 1348 | } |
| 1349 | /** |
| 1350 | * pci_msi_domain_get_msi_rid - Get the MSI requester id (RID) |
| 1351 | * @domain: The interrupt domain |
| 1352 | * @pdev: The PCI device. |
| 1353 | * |
| 1354 | * The RID for a device is formed from the alias, with a firmware |
| 1355 | * supplied mapping applied |
| 1356 | * |
| 1357 | * Returns: The RID. |
| 1358 | */ |
| 1359 | u32 pci_msi_domain_get_msi_rid(struct irq_domain *domain, struct pci_dev *pdev) |
| 1360 | { |
| 1361 | struct device_node *of_node; |
| 1362 | u32 rid = 0; |
| 1363 | |
| 1364 | pci_for_each_dma_alias(pdev, get_msi_id_cb, &rid); |
| 1365 | |
| 1366 | of_node = irq_domain_get_of_node(domain); |
| 1367 | if (of_node) |
| 1368 | rid = of_msi_map_rid(&pdev->dev, of_node, rid); |
| 1369 | |
| 1370 | return rid; |
| 1371 | } |
Marc Zyngier | 54fa97e | 2015-10-02 14:43:06 +0100 | [diff] [blame] | 1372 | |
| 1373 | /** |
| 1374 | * pci_msi_get_device_domain - Get the MSI domain for a given PCI device |
| 1375 | * @pdev: The PCI device |
| 1376 | * |
| 1377 | * Use the firmware data to find a device-specific MSI domain |
| 1378 | * (i.e. not one that is ste as a default). |
| 1379 | * |
| 1380 | * Returns: The coresponding MSI domain or NULL if none has been found. |
| 1381 | */ |
| 1382 | struct irq_domain *pci_msi_get_device_domain(struct pci_dev *pdev) |
| 1383 | { |
| 1384 | u32 rid = 0; |
| 1385 | |
| 1386 | pci_for_each_dma_alias(pdev, get_msi_id_cb, &rid); |
| 1387 | return of_msi_map_get_device_domain(&pdev->dev, rid); |
| 1388 | } |
Jiang Liu | 3878eae | 2014-11-11 21:02:18 +0800 | [diff] [blame] | 1389 | #endif /* CONFIG_PCI_MSI_IRQ_DOMAIN */ |