blob: ec90651d661aab90a0a0ec96a214896fb4c99ae5 [file] [log] [blame]
Govindraj.Rb6126332010-09-27 20:20:49 +05301/*
2 * Driver for OMAP-UART controller.
3 * Based on drivers/serial/8250.c
4 *
5 * Copyright (C) 2010 Texas Instruments.
6 *
7 * Authors:
8 * Govindraj R <govindraj.raja@ti.com>
9 * Thara Gopinath <thara@ti.com>
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; either version 2 of the License, or
14 * (at your option) any later version.
15 *
Lucas De Marchi25985ed2011-03-30 22:57:33 -030016 * Note: This driver is made separate from 8250 driver as we cannot
Govindraj.Rb6126332010-09-27 20:20:49 +053017 * over load 8250 driver with omap platform specific configuration for
18 * features like DMA, it makes easier to implement features like DMA and
19 * hardware flow control and software flow control configuration with
20 * this driver as required for the omap-platform.
21 */
22
Thomas Weber364a6ec2011-02-01 08:30:41 +010023#if defined(CONFIG_SERIAL_OMAP_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
24#define SUPPORT_SYSRQ
25#endif
26
Govindraj.Rb6126332010-09-27 20:20:49 +053027#include <linux/module.h>
28#include <linux/init.h>
29#include <linux/console.h>
30#include <linux/serial_reg.h>
31#include <linux/delay.h>
32#include <linux/slab.h>
33#include <linux/tty.h>
34#include <linux/tty_flip.h>
Felipe Balbid21e4002012-09-06 15:45:38 +030035#include <linux/platform_device.h>
Govindraj.Rb6126332010-09-27 20:20:49 +053036#include <linux/io.h>
Govindraj.Rb6126332010-09-27 20:20:49 +053037#include <linux/clk.h>
38#include <linux/serial_core.h>
39#include <linux/irq.h>
Govindraj.Rfcdca752011-02-28 18:12:23 +053040#include <linux/pm_runtime.h>
Rajendra Nayakd92b0df2011-12-14 17:25:45 +053041#include <linux/of.h>
NeilBrown9574f362012-07-30 10:30:26 +100042#include <linux/gpio.h>
Tony Lindgren3dbc5ce2012-09-07 10:59:40 -070043#include <linux/pinctrl/consumer.h>
Tony Lindgrend9ba5732012-12-14 09:09:11 -080044#include <linux/platform_data/serial-omap.h>
Govindraj.Rb6126332010-09-27 20:20:49 +053045
Russell Kingf91b55ab2012-10-06 10:50:58 +010046#define OMAP_MAX_HSUART_PORTS 6
47
Govindraj.R7c77c8d2012-04-03 19:12:34 +053048#define UART_BUILD_REVISION(x, y) (((x) << 8) | (y))
49
50#define OMAP_UART_REV_42 0x0402
51#define OMAP_UART_REV_46 0x0406
52#define OMAP_UART_REV_52 0x0502
53#define OMAP_UART_REV_63 0x0603
54
Russell Kingf91b55ab2012-10-06 10:50:58 +010055#define UART_ERRATA_i202_MDR1_ACCESS BIT(0)
56#define UART_ERRATA_i291_DMA_FORCEIDLE BIT(1)
57
Rajendra Nayak8fe789d2011-12-14 17:25:44 +053058#define DEFAULT_CLK_SPEED 48000000 /* 48Mhz*/
59
Paul Walmsley0ba5f662012-01-25 19:50:36 -070060/* SCR register bitmasks */
61#define OMAP_UART_SCR_RX_TRIG_GRANU1_MASK (1 << 7)
Russell Kingf91b55ab2012-10-06 10:50:58 +010062#define OMAP_UART_SCR_TX_EMPTY (1 << 3)
Paul Walmsley0ba5f662012-01-25 19:50:36 -070063
64/* FCR register bitmasks */
Paul Walmsley0ba5f662012-01-25 19:50:36 -070065#define OMAP_UART_FCR_RX_FIFO_TRIG_MASK (0x3 << 6)
Felipe Balbi6721ab72012-09-06 15:45:40 +030066#define OMAP_UART_FCR_TX_FIFO_TRIG_MASK (0x3 << 4)
Paul Walmsley0ba5f662012-01-25 19:50:36 -070067
Govindraj.R7c77c8d2012-04-03 19:12:34 +053068/* MVR register bitmasks */
69#define OMAP_UART_MVR_SCHEME_SHIFT 30
70
71#define OMAP_UART_LEGACY_MVR_MAJ_MASK 0xf0
72#define OMAP_UART_LEGACY_MVR_MAJ_SHIFT 4
73#define OMAP_UART_LEGACY_MVR_MIN_MASK 0x0f
74
75#define OMAP_UART_MVR_MAJ_MASK 0x700
76#define OMAP_UART_MVR_MAJ_SHIFT 8
77#define OMAP_UART_MVR_MIN_MASK 0x3f
78
Russell Kingf91b55ab2012-10-06 10:50:58 +010079#define OMAP_UART_DMA_CH_FREE -1
80
81#define MSR_SAVE_FLAGS UART_MSR_ANY_DELTA
82#define OMAP_MODE13X_SPEED 230400
83
84/* WER = 0x7F
85 * Enable module level wakeup in WER reg
86 */
87#define OMAP_UART_WER_MOD_WKUP 0X7F
88
89/* Enable XON/XOFF flow control on output */
Russell King3af08bd2012-10-05 13:32:08 +010090#define OMAP_UART_SW_TX 0x08
Russell Kingf91b55ab2012-10-06 10:50:58 +010091
92/* Enable XON/XOFF flow control on input */
Russell King3af08bd2012-10-05 13:32:08 +010093#define OMAP_UART_SW_RX 0x02
Russell Kingf91b55ab2012-10-06 10:50:58 +010094
95#define OMAP_UART_SW_CLR 0xF0
96
97#define OMAP_UART_TCR_TRIG 0x0F
98
99struct uart_omap_dma {
100 u8 uart_dma_tx;
101 u8 uart_dma_rx;
102 int rx_dma_channel;
103 int tx_dma_channel;
104 dma_addr_t rx_buf_dma_phys;
105 dma_addr_t tx_buf_dma_phys;
106 unsigned int uart_base;
107 /*
108 * Buffer for rx dma.It is not required for tx because the buffer
109 * comes from port structure.
110 */
111 unsigned char *rx_buf;
112 unsigned int prev_rx_dma_pos;
113 int tx_buf_size;
114 int tx_dma_used;
115 int rx_dma_used;
116 spinlock_t tx_lock;
117 spinlock_t rx_lock;
118 /* timer to poll activity on rx dma */
119 struct timer_list rx_timer;
120 unsigned int rx_buf_size;
121 unsigned int rx_poll_rate;
122 unsigned int rx_timeout;
123};
124
Felipe Balbid37c6ce2012-09-06 15:45:39 +0300125struct uart_omap_port {
126 struct uart_port port;
127 struct uart_omap_dma uart_dma;
128 struct device *dev;
129
130 unsigned char ier;
131 unsigned char lcr;
132 unsigned char mcr;
133 unsigned char fcr;
134 unsigned char efr;
135 unsigned char dll;
136 unsigned char dlh;
137 unsigned char mdr1;
138 unsigned char scr;
139
140 int use_dma;
141 /*
142 * Some bits in registers are cleared on a read, so they must
143 * be saved whenever the register is read but the bits will not
144 * be immediately processed.
145 */
146 unsigned int lsr_break_flag;
147 unsigned char msr_saved_flags;
148 char name[20];
149 unsigned long port_activity;
Shubhrajyoti D39aee512012-10-03 17:24:36 +0530150 int context_loss_cnt;
Felipe Balbid37c6ce2012-09-06 15:45:39 +0300151 u32 errata;
152 u8 wakeups_enabled;
Felipe Balbid37c6ce2012-09-06 15:45:39 +0300153
Felipe Balbie36851d2012-09-07 18:34:19 +0300154 int DTR_gpio;
155 int DTR_inverted;
156 int DTR_active;
157
Felipe Balbid37c6ce2012-09-06 15:45:39 +0300158 struct pm_qos_request pm_qos_request;
159 u32 latency;
160 u32 calc_latency;
161 struct work_struct qos_work;
Tony Lindgren3dbc5ce2012-09-07 10:59:40 -0700162 struct pinctrl *pins;
Felipe Balbid37c6ce2012-09-06 15:45:39 +0300163};
164
165#define to_uart_omap_port(p) ((container_of((p), struct uart_omap_port, port)))
166
Govindraj.Rb6126332010-09-27 20:20:49 +0530167static struct uart_omap_port *ui[OMAP_MAX_HSUART_PORTS];
168
169/* Forward declaration of functions */
Govindraj.R94734742011-11-07 19:00:33 +0530170static void serial_omap_mdr1_errataset(struct uart_omap_port *up, u8 mdr1);
Govindraj.Rb6126332010-09-27 20:20:49 +0530171
Govindraj.R2fd14962011-11-09 17:41:21 +0530172static struct workqueue_struct *serial_omap_uart_wq;
Govindraj.Rb6126332010-09-27 20:20:49 +0530173
174static inline unsigned int serial_in(struct uart_omap_port *up, int offset)
175{
176 offset <<= up->port.regshift;
177 return readw(up->port.membase + offset);
178}
179
180static inline void serial_out(struct uart_omap_port *up, int offset, int value)
181{
182 offset <<= up->port.regshift;
183 writew(value, up->port.membase + offset);
184}
185
186static inline void serial_omap_clear_fifos(struct uart_omap_port *up)
187{
188 serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO);
189 serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO |
190 UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT);
191 serial_out(up, UART_FCR, 0);
192}
193
Felipe Balbie5b57c02012-08-23 13:32:42 +0300194static int serial_omap_get_context_loss_count(struct uart_omap_port *up)
195{
Felipe Balbid8ee4ea2012-09-06 15:45:20 +0300196 struct omap_uart_port_info *pdata = up->dev->platform_data;
Felipe Balbie5b57c02012-08-23 13:32:42 +0300197
Felipe Balbice2f08d2012-09-07 21:10:33 +0300198 if (!pdata || !pdata->get_context_loss_count)
Felipe Balbie5b57c02012-08-23 13:32:42 +0300199 return 0;
200
Felipe Balbid8ee4ea2012-09-06 15:45:20 +0300201 return pdata->get_context_loss_count(up->dev);
Felipe Balbie5b57c02012-08-23 13:32:42 +0300202}
203
204static void serial_omap_set_forceidle(struct uart_omap_port *up)
205{
Felipe Balbid8ee4ea2012-09-06 15:45:20 +0300206 struct omap_uart_port_info *pdata = up->dev->platform_data;
Felipe Balbie5b57c02012-08-23 13:32:42 +0300207
Felipe Balbice2f08d2012-09-07 21:10:33 +0300208 if (!pdata || !pdata->set_forceidle)
209 return;
210
211 pdata->set_forceidle(up->dev);
Felipe Balbie5b57c02012-08-23 13:32:42 +0300212}
213
214static void serial_omap_set_noidle(struct uart_omap_port *up)
215{
Felipe Balbid8ee4ea2012-09-06 15:45:20 +0300216 struct omap_uart_port_info *pdata = up->dev->platform_data;
Felipe Balbie5b57c02012-08-23 13:32:42 +0300217
Felipe Balbice2f08d2012-09-07 21:10:33 +0300218 if (!pdata || !pdata->set_noidle)
219 return;
220
221 pdata->set_noidle(up->dev);
Felipe Balbie5b57c02012-08-23 13:32:42 +0300222}
223
224static void serial_omap_enable_wakeup(struct uart_omap_port *up, bool enable)
225{
Felipe Balbid8ee4ea2012-09-06 15:45:20 +0300226 struct omap_uart_port_info *pdata = up->dev->platform_data;
Felipe Balbie5b57c02012-08-23 13:32:42 +0300227
Felipe Balbice2f08d2012-09-07 21:10:33 +0300228 if (!pdata || !pdata->enable_wakeup)
229 return;
230
231 pdata->enable_wakeup(up->dev, enable);
Felipe Balbie5b57c02012-08-23 13:32:42 +0300232}
233
Govindraj.Rb6126332010-09-27 20:20:49 +0530234/*
235 * serial_omap_get_divisor - calculate divisor value
236 * @port: uart port info
237 * @baud: baudrate for which divisor needs to be calculated.
238 *
239 * We have written our own function to get the divisor so as to support
240 * 13x mode. 3Mbps Baudrate as an different divisor.
241 * Reference OMAP TRM Chapter 17:
242 * Table 17-1. UART Mode Baud Rates, Divisor Values, and Error Rates
243 * referring to oversampling - divisor value
244 * baudrate 460,800 to 3,686,400 all have divisor 13
245 * except 3,000,000 which has divisor value 16
246 */
247static unsigned int
248serial_omap_get_divisor(struct uart_port *port, unsigned int baud)
249{
250 unsigned int divisor;
251
252 if (baud > OMAP_MODE13X_SPEED && baud != 3000000)
253 divisor = 13;
254 else
255 divisor = 16;
256 return port->uartclk/(baud * divisor);
257}
258
Govindraj.Rb6126332010-09-27 20:20:49 +0530259static void serial_omap_enable_ms(struct uart_port *port)
260{
Felipe Balbic990f352012-08-23 13:32:41 +0300261 struct uart_omap_port *up = to_uart_omap_port(port);
Govindraj.Rb6126332010-09-27 20:20:49 +0530262
Rajendra Nayakba774332011-12-14 17:25:43 +0530263 dev_dbg(up->port.dev, "serial_omap_enable_ms+%d\n", up->port.line);
Govindraj.Rfcdca752011-02-28 18:12:23 +0530264
Felipe Balbid8ee4ea2012-09-06 15:45:20 +0300265 pm_runtime_get_sync(up->dev);
Govindraj.Rb6126332010-09-27 20:20:49 +0530266 up->ier |= UART_IER_MSI;
267 serial_out(up, UART_IER, up->ier);
Felipe Balbi660ac5f2012-09-06 15:45:26 +0300268 pm_runtime_mark_last_busy(up->dev);
269 pm_runtime_put_autosuspend(up->dev);
Govindraj.Rb6126332010-09-27 20:20:49 +0530270}
271
272static void serial_omap_stop_tx(struct uart_port *port)
273{
Felipe Balbic990f352012-08-23 13:32:41 +0300274 struct uart_omap_port *up = to_uart_omap_port(port);
Govindraj.Rb6126332010-09-27 20:20:49 +0530275
Felipe Balbid8ee4ea2012-09-06 15:45:20 +0300276 pm_runtime_get_sync(up->dev);
Govindraj.Rb6126332010-09-27 20:20:49 +0530277 if (up->ier & UART_IER_THRI) {
278 up->ier &= ~UART_IER_THRI;
279 serial_out(up, UART_IER, up->ier);
280 }
Govindraj.Rfcdca752011-02-28 18:12:23 +0530281
Felipe Balbi49457432012-09-06 15:45:21 +0300282 serial_omap_set_forceidle(up);
Paul Walmsleybe4b0282012-01-25 19:50:52 -0700283
Felipe Balbid8ee4ea2012-09-06 15:45:20 +0300284 pm_runtime_mark_last_busy(up->dev);
285 pm_runtime_put_autosuspend(up->dev);
Govindraj.Rb6126332010-09-27 20:20:49 +0530286}
287
288static void serial_omap_stop_rx(struct uart_port *port)
289{
Felipe Balbic990f352012-08-23 13:32:41 +0300290 struct uart_omap_port *up = to_uart_omap_port(port);
Govindraj.Rb6126332010-09-27 20:20:49 +0530291
Felipe Balbid8ee4ea2012-09-06 15:45:20 +0300292 pm_runtime_get_sync(up->dev);
Govindraj.Rb6126332010-09-27 20:20:49 +0530293 up->ier &= ~UART_IER_RLSI;
294 up->port.read_status_mask &= ~UART_LSR_DR;
295 serial_out(up, UART_IER, up->ier);
Felipe Balbid8ee4ea2012-09-06 15:45:20 +0300296 pm_runtime_mark_last_busy(up->dev);
297 pm_runtime_put_autosuspend(up->dev);
Govindraj.Rb6126332010-09-27 20:20:49 +0530298}
299
Felipe Balbibf63a082012-09-06 15:45:25 +0300300static void transmit_chars(struct uart_omap_port *up, unsigned int lsr)
Govindraj.Rb6126332010-09-27 20:20:49 +0530301{
302 struct circ_buf *xmit = &up->port.state->xmit;
303 int count;
304
Felipe Balbibf63a082012-09-06 15:45:25 +0300305 if (!(lsr & UART_LSR_THRE))
306 return;
307
Govindraj.Rb6126332010-09-27 20:20:49 +0530308 if (up->port.x_char) {
309 serial_out(up, UART_TX, up->port.x_char);
310 up->port.icount.tx++;
311 up->port.x_char = 0;
312 return;
313 }
314 if (uart_circ_empty(xmit) || uart_tx_stopped(&up->port)) {
315 serial_omap_stop_tx(&up->port);
316 return;
317 }
Greg Kroah-Hartmanaf681ca2012-01-26 11:14:42 -0800318 count = up->port.fifosize / 4;
Govindraj.Rb6126332010-09-27 20:20:49 +0530319 do {
320 serial_out(up, UART_TX, xmit->buf[xmit->tail]);
321 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
322 up->port.icount.tx++;
323 if (uart_circ_empty(xmit))
324 break;
325 } while (--count > 0);
326
Ruchika Kharwar0324a822012-09-06 15:45:34 +0300327 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS) {
328 spin_unlock(&up->port.lock);
Govindraj.Rb6126332010-09-27 20:20:49 +0530329 uart_write_wakeup(&up->port);
Ruchika Kharwar0324a822012-09-06 15:45:34 +0300330 spin_lock(&up->port.lock);
331 }
Govindraj.Rb6126332010-09-27 20:20:49 +0530332
333 if (uart_circ_empty(xmit))
334 serial_omap_stop_tx(&up->port);
335}
336
337static inline void serial_omap_enable_ier_thri(struct uart_omap_port *up)
338{
339 if (!(up->ier & UART_IER_THRI)) {
340 up->ier |= UART_IER_THRI;
341 serial_out(up, UART_IER, up->ier);
342 }
343}
344
345static void serial_omap_start_tx(struct uart_port *port)
346{
Felipe Balbic990f352012-08-23 13:32:41 +0300347 struct uart_omap_port *up = to_uart_omap_port(port);
Govindraj.Rb6126332010-09-27 20:20:49 +0530348
Felipe Balbi49457432012-09-06 15:45:21 +0300349 pm_runtime_get_sync(up->dev);
350 serial_omap_enable_ier_thri(up);
351 serial_omap_set_noidle(up);
352 pm_runtime_mark_last_busy(up->dev);
353 pm_runtime_put_autosuspend(up->dev);
Govindraj.Rb6126332010-09-27 20:20:49 +0530354}
355
Russell King3af08bd2012-10-05 13:32:08 +0100356static void serial_omap_throttle(struct uart_port *port)
357{
358 struct uart_omap_port *up = to_uart_omap_port(port);
359 unsigned long flags;
360
361 pm_runtime_get_sync(up->dev);
362 spin_lock_irqsave(&up->port.lock, flags);
363 up->ier &= ~(UART_IER_RLSI | UART_IER_RDI);
364 serial_out(up, UART_IER, up->ier);
365 spin_unlock_irqrestore(&up->port.lock, flags);
366 pm_runtime_mark_last_busy(up->dev);
367 pm_runtime_put_autosuspend(up->dev);
368}
369
370static void serial_omap_unthrottle(struct uart_port *port)
371{
372 struct uart_omap_port *up = to_uart_omap_port(port);
373 unsigned long flags;
374
375 pm_runtime_get_sync(up->dev);
376 spin_lock_irqsave(&up->port.lock, flags);
377 up->ier |= UART_IER_RLSI | UART_IER_RDI;
378 serial_out(up, UART_IER, up->ier);
379 spin_unlock_irqrestore(&up->port.lock, flags);
380 pm_runtime_mark_last_busy(up->dev);
381 pm_runtime_put_autosuspend(up->dev);
382}
383
Govindraj.Rb6126332010-09-27 20:20:49 +0530384static unsigned int check_modem_status(struct uart_omap_port *up)
385{
386 unsigned int status;
387
388 status = serial_in(up, UART_MSR);
389 status |= up->msr_saved_flags;
390 up->msr_saved_flags = 0;
391 if ((status & UART_MSR_ANY_DELTA) == 0)
392 return status;
393
394 if (status & UART_MSR_ANY_DELTA && up->ier & UART_IER_MSI &&
395 up->port.state != NULL) {
396 if (status & UART_MSR_TERI)
397 up->port.icount.rng++;
398 if (status & UART_MSR_DDSR)
399 up->port.icount.dsr++;
400 if (status & UART_MSR_DDCD)
401 uart_handle_dcd_change
402 (&up->port, status & UART_MSR_DCD);
403 if (status & UART_MSR_DCTS)
404 uart_handle_cts_change
405 (&up->port, status & UART_MSR_CTS);
406 wake_up_interruptible(&up->port.state->port.delta_msr_wait);
407 }
408
409 return status;
410}
411
Felipe Balbi72256cb2012-09-06 15:45:24 +0300412static void serial_omap_rlsi(struct uart_omap_port *up, unsigned int lsr)
413{
414 unsigned int flag;
Shubhrajyoti D9a12fcf2012-09-21 20:07:19 +0530415 unsigned char ch = 0;
416
417 if (likely(lsr & UART_LSR_DR))
418 ch = serial_in(up, UART_RX);
Felipe Balbi72256cb2012-09-06 15:45:24 +0300419
420 up->port.icount.rx++;
421 flag = TTY_NORMAL;
422
423 if (lsr & UART_LSR_BI) {
424 flag = TTY_BREAK;
425 lsr &= ~(UART_LSR_FE | UART_LSR_PE);
426 up->port.icount.brk++;
427 /*
428 * We do the SysRQ and SAK checking
429 * here because otherwise the break
430 * may get masked by ignore_status_mask
431 * or read_status_mask.
432 */
433 if (uart_handle_break(&up->port))
434 return;
435
436 }
437
438 if (lsr & UART_LSR_PE) {
439 flag = TTY_PARITY;
440 up->port.icount.parity++;
441 }
442
443 if (lsr & UART_LSR_FE) {
444 flag = TTY_FRAME;
445 up->port.icount.frame++;
446 }
447
448 if (lsr & UART_LSR_OE)
449 up->port.icount.overrun++;
450
451#ifdef CONFIG_SERIAL_OMAP_CONSOLE
452 if (up->port.line == up->port.cons->index) {
453 /* Recover the break flag from console xmit */
454 lsr |= up->lsr_break_flag;
455 }
456#endif
457 uart_insert_char(&up->port, lsr, UART_LSR_OE, 0, flag);
458}
459
460static void serial_omap_rdi(struct uart_omap_port *up, unsigned int lsr)
461{
462 unsigned char ch = 0;
463 unsigned int flag;
464
465 if (!(lsr & UART_LSR_DR))
466 return;
467
468 ch = serial_in(up, UART_RX);
469 flag = TTY_NORMAL;
470 up->port.icount.rx++;
471
472 if (uart_handle_sysrq_char(&up->port, ch))
473 return;
474
475 uart_insert_char(&up->port, lsr, UART_LSR_OE, ch, flag);
476}
477
Govindraj.Rb6126332010-09-27 20:20:49 +0530478/**
479 * serial_omap_irq() - This handles the interrupt from one port
480 * @irq: uart port irq number
481 * @dev_id: uart port info
482 */
Felipe Balbi52c55132012-09-06 15:45:33 +0300483static irqreturn_t serial_omap_irq(int irq, void *dev_id)
Govindraj.Rb6126332010-09-27 20:20:49 +0530484{
485 struct uart_omap_port *up = dev_id;
Felipe Balbi72256cb2012-09-06 15:45:24 +0300486 struct tty_struct *tty = up->port.state->port.tty;
Govindraj.Rb6126332010-09-27 20:20:49 +0530487 unsigned int iir, lsr;
Felipe Balbi81b75ae2012-09-06 15:45:23 +0300488 unsigned int type;
Felipe Balbi81b75ae2012-09-06 15:45:23 +0300489 irqreturn_t ret = IRQ_NONE;
Felipe Balbi72256cb2012-09-06 15:45:24 +0300490 int max_count = 256;
Govindraj.Rb6126332010-09-27 20:20:49 +0530491
Felipe Balbi6c3a30c2012-09-06 15:45:30 +0300492 spin_lock(&up->port.lock);
Felipe Balbi81b75ae2012-09-06 15:45:23 +0300493 pm_runtime_get_sync(up->dev);
Felipe Balbi81b75ae2012-09-06 15:45:23 +0300494
Felipe Balbi72256cb2012-09-06 15:45:24 +0300495 do {
Felipe Balbi81b75ae2012-09-06 15:45:23 +0300496 iir = serial_in(up, UART_IIR);
Felipe Balbi72256cb2012-09-06 15:45:24 +0300497 if (iir & UART_IIR_NO_INT)
498 break;
Govindraj.Rb6126332010-09-27 20:20:49 +0530499
Felipe Balbi72256cb2012-09-06 15:45:24 +0300500 ret = IRQ_HANDLED;
501 lsr = serial_in(up, UART_LSR);
502
503 /* extract IRQ type from IIR register */
504 type = iir & 0x3e;
505
506 switch (type) {
507 case UART_IIR_MSI:
508 check_modem_status(up);
509 break;
510 case UART_IIR_THRI:
Felipe Balbibf63a082012-09-06 15:45:25 +0300511 transmit_chars(up, lsr);
Felipe Balbi72256cb2012-09-06 15:45:24 +0300512 break;
513 case UART_IIR_RX_TIMEOUT:
514 /* FALLTHROUGH */
515 case UART_IIR_RDI:
516 serial_omap_rdi(up, lsr);
517 break;
518 case UART_IIR_RLSI:
519 serial_omap_rlsi(up, lsr);
520 break;
521 case UART_IIR_CTS_RTS_DSR:
522 /* simply try again */
523 break;
524 case UART_IIR_XOFF:
525 /* FALLTHROUGH */
526 default:
527 break;
528 }
529 } while (!(iir & UART_IIR_NO_INT) && max_count--);
530
Felipe Balbi6c3a30c2012-09-06 15:45:30 +0300531 spin_unlock(&up->port.lock);
Felipe Balbi72256cb2012-09-06 15:45:24 +0300532
533 tty_flip_buffer_push(tty);
534
Felipe Balbid8ee4ea2012-09-06 15:45:20 +0300535 pm_runtime_mark_last_busy(up->dev);
536 pm_runtime_put_autosuspend(up->dev);
Govindraj.Rb6126332010-09-27 20:20:49 +0530537 up->port_activity = jiffies;
Felipe Balbi81b75ae2012-09-06 15:45:23 +0300538
539 return ret;
Govindraj.Rb6126332010-09-27 20:20:49 +0530540}
541
542static unsigned int serial_omap_tx_empty(struct uart_port *port)
543{
Felipe Balbic990f352012-08-23 13:32:41 +0300544 struct uart_omap_port *up = to_uart_omap_port(port);
Govindraj.Rb6126332010-09-27 20:20:49 +0530545 unsigned long flags = 0;
546 unsigned int ret = 0;
547
Felipe Balbid8ee4ea2012-09-06 15:45:20 +0300548 pm_runtime_get_sync(up->dev);
Rajendra Nayakba774332011-12-14 17:25:43 +0530549 dev_dbg(up->port.dev, "serial_omap_tx_empty+%d\n", up->port.line);
Govindraj.Rb6126332010-09-27 20:20:49 +0530550 spin_lock_irqsave(&up->port.lock, flags);
551 ret = serial_in(up, UART_LSR) & UART_LSR_TEMT ? TIOCSER_TEMT : 0;
552 spin_unlock_irqrestore(&up->port.lock, flags);
Felipe Balbi660ac5f2012-09-06 15:45:26 +0300553 pm_runtime_mark_last_busy(up->dev);
554 pm_runtime_put_autosuspend(up->dev);
Govindraj.Rb6126332010-09-27 20:20:49 +0530555 return ret;
556}
557
558static unsigned int serial_omap_get_mctrl(struct uart_port *port)
559{
Felipe Balbic990f352012-08-23 13:32:41 +0300560 struct uart_omap_port *up = to_uart_omap_port(port);
Shubhrajyoti D514f31d2011-11-21 15:43:28 +0530561 unsigned int status;
Govindraj.Rb6126332010-09-27 20:20:49 +0530562 unsigned int ret = 0;
563
Felipe Balbid8ee4ea2012-09-06 15:45:20 +0300564 pm_runtime_get_sync(up->dev);
Govindraj.Rb6126332010-09-27 20:20:49 +0530565 status = check_modem_status(up);
Felipe Balbi660ac5f2012-09-06 15:45:26 +0300566 pm_runtime_mark_last_busy(up->dev);
567 pm_runtime_put_autosuspend(up->dev);
Govindraj.Rfcdca752011-02-28 18:12:23 +0530568
Rajendra Nayakba774332011-12-14 17:25:43 +0530569 dev_dbg(up->port.dev, "serial_omap_get_mctrl+%d\n", up->port.line);
Govindraj.Rb6126332010-09-27 20:20:49 +0530570
571 if (status & UART_MSR_DCD)
572 ret |= TIOCM_CAR;
573 if (status & UART_MSR_RI)
574 ret |= TIOCM_RNG;
575 if (status & UART_MSR_DSR)
576 ret |= TIOCM_DSR;
577 if (status & UART_MSR_CTS)
578 ret |= TIOCM_CTS;
579 return ret;
580}
581
582static void serial_omap_set_mctrl(struct uart_port *port, unsigned int mctrl)
583{
Felipe Balbic990f352012-08-23 13:32:41 +0300584 struct uart_omap_port *up = to_uart_omap_port(port);
Russell King9363f8f2012-10-05 12:23:28 +0100585 unsigned char mcr = 0, old_mcr;
Govindraj.Rb6126332010-09-27 20:20:49 +0530586
Rajendra Nayakba774332011-12-14 17:25:43 +0530587 dev_dbg(up->port.dev, "serial_omap_set_mctrl+%d\n", up->port.line);
Govindraj.Rb6126332010-09-27 20:20:49 +0530588 if (mctrl & TIOCM_RTS)
589 mcr |= UART_MCR_RTS;
590 if (mctrl & TIOCM_DTR)
591 mcr |= UART_MCR_DTR;
592 if (mctrl & TIOCM_OUT1)
593 mcr |= UART_MCR_OUT1;
594 if (mctrl & TIOCM_OUT2)
595 mcr |= UART_MCR_OUT2;
596 if (mctrl & TIOCM_LOOP)
597 mcr |= UART_MCR_LOOP;
598
Felipe Balbid8ee4ea2012-09-06 15:45:20 +0300599 pm_runtime_get_sync(up->dev);
Russell King9363f8f2012-10-05 12:23:28 +0100600 old_mcr = serial_in(up, UART_MCR);
601 old_mcr &= ~(UART_MCR_LOOP | UART_MCR_OUT2 | UART_MCR_OUT1 |
602 UART_MCR_DTR | UART_MCR_RTS);
603 up->mcr = old_mcr | mcr;
Govindraj.Rc538d202011-11-07 18:57:03 +0530604 serial_out(up, UART_MCR, up->mcr);
Felipe Balbi660ac5f2012-09-06 15:45:26 +0300605 pm_runtime_mark_last_busy(up->dev);
606 pm_runtime_put_autosuspend(up->dev);
NeilBrown9574f362012-07-30 10:30:26 +1000607
608 if (gpio_is_valid(up->DTR_gpio) &&
609 !!(mctrl & TIOCM_DTR) != up->DTR_active) {
610 up->DTR_active = !up->DTR_active;
611 if (gpio_cansleep(up->DTR_gpio))
612 schedule_work(&up->qos_work);
613 else
614 gpio_set_value(up->DTR_gpio,
615 up->DTR_active != up->DTR_inverted);
616 }
Govindraj.Rb6126332010-09-27 20:20:49 +0530617}
618
619static void serial_omap_break_ctl(struct uart_port *port, int break_state)
620{
Felipe Balbic990f352012-08-23 13:32:41 +0300621 struct uart_omap_port *up = to_uart_omap_port(port);
Govindraj.Rb6126332010-09-27 20:20:49 +0530622 unsigned long flags = 0;
623
Rajendra Nayakba774332011-12-14 17:25:43 +0530624 dev_dbg(up->port.dev, "serial_omap_break_ctl+%d\n", up->port.line);
Felipe Balbid8ee4ea2012-09-06 15:45:20 +0300625 pm_runtime_get_sync(up->dev);
Govindraj.Rb6126332010-09-27 20:20:49 +0530626 spin_lock_irqsave(&up->port.lock, flags);
627 if (break_state == -1)
628 up->lcr |= UART_LCR_SBC;
629 else
630 up->lcr &= ~UART_LCR_SBC;
631 serial_out(up, UART_LCR, up->lcr);
632 spin_unlock_irqrestore(&up->port.lock, flags);
Felipe Balbi660ac5f2012-09-06 15:45:26 +0300633 pm_runtime_mark_last_busy(up->dev);
634 pm_runtime_put_autosuspend(up->dev);
Govindraj.Rb6126332010-09-27 20:20:49 +0530635}
636
637static int serial_omap_startup(struct uart_port *port)
638{
Felipe Balbic990f352012-08-23 13:32:41 +0300639 struct uart_omap_port *up = to_uart_omap_port(port);
Govindraj.Rb6126332010-09-27 20:20:49 +0530640 unsigned long flags = 0;
641 int retval;
642
643 /*
644 * Allocate the IRQ
645 */
646 retval = request_irq(up->port.irq, serial_omap_irq, up->port.irqflags,
647 up->name, up);
648 if (retval)
649 return retval;
650
Rajendra Nayakba774332011-12-14 17:25:43 +0530651 dev_dbg(up->port.dev, "serial_omap_startup+%d\n", up->port.line);
Govindraj.Rb6126332010-09-27 20:20:49 +0530652
Felipe Balbid8ee4ea2012-09-06 15:45:20 +0300653 pm_runtime_get_sync(up->dev);
Govindraj.Rb6126332010-09-27 20:20:49 +0530654 /*
655 * Clear the FIFO buffers and disable them.
656 * (they will be reenabled in set_termios())
657 */
658 serial_omap_clear_fifos(up);
659 /* For Hardware flow control */
660 serial_out(up, UART_MCR, UART_MCR_RTS);
661
662 /*
663 * Clear the interrupt registers.
664 */
665 (void) serial_in(up, UART_LSR);
666 if (serial_in(up, UART_LSR) & UART_LSR_DR)
667 (void) serial_in(up, UART_RX);
668 (void) serial_in(up, UART_IIR);
669 (void) serial_in(up, UART_MSR);
670
671 /*
672 * Now, initialize the UART
673 */
674 serial_out(up, UART_LCR, UART_LCR_WLEN8);
675 spin_lock_irqsave(&up->port.lock, flags);
676 /*
677 * Most PC uarts need OUT2 raised to enable interrupts.
678 */
679 up->port.mctrl |= TIOCM_OUT2;
680 serial_omap_set_mctrl(&up->port, up->port.mctrl);
681 spin_unlock_irqrestore(&up->port.lock, flags);
682
683 up->msr_saved_flags = 0;
Govindraj.Rb6126332010-09-27 20:20:49 +0530684 /*
685 * Finally, enable interrupts. Note: Modem status interrupts
686 * are set via set_termios(), which will be occurring imminently
687 * anyway, so we don't enable them here.
688 */
689 up->ier = UART_IER_RLSI | UART_IER_RDI;
690 serial_out(up, UART_IER, up->ier);
691
Jarkko Nikula78841462011-01-24 17:51:22 +0200692 /* Enable module level wake up */
693 serial_out(up, UART_OMAP_WER, OMAP_UART_WER_MOD_WKUP);
694
Felipe Balbid8ee4ea2012-09-06 15:45:20 +0300695 pm_runtime_mark_last_busy(up->dev);
696 pm_runtime_put_autosuspend(up->dev);
Govindraj.Rb6126332010-09-27 20:20:49 +0530697 up->port_activity = jiffies;
698 return 0;
699}
700
701static void serial_omap_shutdown(struct uart_port *port)
702{
Felipe Balbic990f352012-08-23 13:32:41 +0300703 struct uart_omap_port *up = to_uart_omap_port(port);
Govindraj.Rb6126332010-09-27 20:20:49 +0530704 unsigned long flags = 0;
705
Rajendra Nayakba774332011-12-14 17:25:43 +0530706 dev_dbg(up->port.dev, "serial_omap_shutdown+%d\n", up->port.line);
Govindraj.Rfcdca752011-02-28 18:12:23 +0530707
Felipe Balbid8ee4ea2012-09-06 15:45:20 +0300708 pm_runtime_get_sync(up->dev);
Govindraj.Rb6126332010-09-27 20:20:49 +0530709 /*
710 * Disable interrupts from this port
711 */
712 up->ier = 0;
713 serial_out(up, UART_IER, 0);
714
715 spin_lock_irqsave(&up->port.lock, flags);
716 up->port.mctrl &= ~TIOCM_OUT2;
717 serial_omap_set_mctrl(&up->port, up->port.mctrl);
718 spin_unlock_irqrestore(&up->port.lock, flags);
719
720 /*
721 * Disable break condition and FIFOs
722 */
723 serial_out(up, UART_LCR, serial_in(up, UART_LCR) & ~UART_LCR_SBC);
724 serial_omap_clear_fifos(up);
725
726 /*
727 * Read data port to reset things, and then free the irq
728 */
729 if (serial_in(up, UART_LSR) & UART_LSR_DR)
730 (void) serial_in(up, UART_RX);
Govindraj.Rfcdca752011-02-28 18:12:23 +0530731
Felipe Balbi660ac5f2012-09-06 15:45:26 +0300732 pm_runtime_mark_last_busy(up->dev);
733 pm_runtime_put_autosuspend(up->dev);
Govindraj.Rb6126332010-09-27 20:20:49 +0530734 free_irq(up->port.irq, up);
735}
736
Govindraj.R2fd14962011-11-09 17:41:21 +0530737static void serial_omap_uart_qos_work(struct work_struct *work)
738{
739 struct uart_omap_port *up = container_of(work, struct uart_omap_port,
740 qos_work);
741
742 pm_qos_update_request(&up->pm_qos_request, up->latency);
NeilBrown9574f362012-07-30 10:30:26 +1000743 if (gpio_is_valid(up->DTR_gpio))
744 gpio_set_value_cansleep(up->DTR_gpio,
745 up->DTR_active != up->DTR_inverted);
Govindraj.R2fd14962011-11-09 17:41:21 +0530746}
747
Govindraj.Rb6126332010-09-27 20:20:49 +0530748static void
749serial_omap_set_termios(struct uart_port *port, struct ktermios *termios,
750 struct ktermios *old)
751{
Felipe Balbic990f352012-08-23 13:32:41 +0300752 struct uart_omap_port *up = to_uart_omap_port(port);
Govindraj.Rb6126332010-09-27 20:20:49 +0530753 unsigned char cval = 0;
Govindraj.Rb6126332010-09-27 20:20:49 +0530754 unsigned long flags = 0;
755 unsigned int baud, quot;
756
757 switch (termios->c_cflag & CSIZE) {
758 case CS5:
759 cval = UART_LCR_WLEN5;
760 break;
761 case CS6:
762 cval = UART_LCR_WLEN6;
763 break;
764 case CS7:
765 cval = UART_LCR_WLEN7;
766 break;
767 default:
768 case CS8:
769 cval = UART_LCR_WLEN8;
770 break;
771 }
772
773 if (termios->c_cflag & CSTOPB)
774 cval |= UART_LCR_STOP;
775 if (termios->c_cflag & PARENB)
776 cval |= UART_LCR_PARITY;
777 if (!(termios->c_cflag & PARODD))
778 cval |= UART_LCR_EPAR;
Enric Balletbo i Serrafdbc7352012-12-06 09:45:04 +0100779 if (termios->c_cflag & CMSPAR)
780 cval |= UART_LCR_SPAR;
Govindraj.Rb6126332010-09-27 20:20:49 +0530781
782 /*
783 * Ask the core to calculate the divisor for us.
784 */
785
786 baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/13);
787 quot = serial_omap_get_divisor(port, baud);
788
Govindraj.R2fd14962011-11-09 17:41:21 +0530789 /* calculate wakeup latency constraint */
Paul Walmsley19723452012-01-25 19:50:56 -0700790 up->calc_latency = (USEC_PER_SEC * up->port.fifosize) / (baud / 8);
Govindraj.R2fd14962011-11-09 17:41:21 +0530791 up->latency = up->calc_latency;
792 schedule_work(&up->qos_work);
793
Govindraj.Rc538d202011-11-07 18:57:03 +0530794 up->dll = quot & 0xff;
795 up->dlh = quot >> 8;
796 up->mdr1 = UART_OMAP_MDR1_DISABLE;
797
Govindraj.Rb6126332010-09-27 20:20:49 +0530798 up->fcr = UART_FCR_R_TRIG_01 | UART_FCR_T_TRIG_01 |
799 UART_FCR_ENABLE_FIFO;
Govindraj.Rb6126332010-09-27 20:20:49 +0530800
801 /*
802 * Ok, we're now changing the port state. Do it with
803 * interrupts disabled.
804 */
Felipe Balbid8ee4ea2012-09-06 15:45:20 +0300805 pm_runtime_get_sync(up->dev);
Govindraj.Rb6126332010-09-27 20:20:49 +0530806 spin_lock_irqsave(&up->port.lock, flags);
807
808 /*
809 * Update the per-port timeout.
810 */
811 uart_update_timeout(port, termios->c_cflag, baud);
812
813 up->port.read_status_mask = UART_LSR_OE | UART_LSR_THRE | UART_LSR_DR;
814 if (termios->c_iflag & INPCK)
815 up->port.read_status_mask |= UART_LSR_FE | UART_LSR_PE;
816 if (termios->c_iflag & (BRKINT | PARMRK))
817 up->port.read_status_mask |= UART_LSR_BI;
818
819 /*
820 * Characters to ignore
821 */
822 up->port.ignore_status_mask = 0;
823 if (termios->c_iflag & IGNPAR)
824 up->port.ignore_status_mask |= UART_LSR_PE | UART_LSR_FE;
825 if (termios->c_iflag & IGNBRK) {
826 up->port.ignore_status_mask |= UART_LSR_BI;
827 /*
828 * If we're ignoring parity and break indicators,
829 * ignore overruns too (for real raw support).
830 */
831 if (termios->c_iflag & IGNPAR)
832 up->port.ignore_status_mask |= UART_LSR_OE;
833 }
834
835 /*
836 * ignore all characters if CREAD is not set
837 */
838 if ((termios->c_cflag & CREAD) == 0)
839 up->port.ignore_status_mask |= UART_LSR_DR;
840
841 /*
842 * Modem status interrupts
843 */
844 up->ier &= ~UART_IER_MSI;
845 if (UART_ENABLE_MS(&up->port, termios->c_cflag))
846 up->ier |= UART_IER_MSI;
847 serial_out(up, UART_IER, up->ier);
848 serial_out(up, UART_LCR, cval); /* reset DLAB */
Govindraj.Rc538d202011-11-07 18:57:03 +0530849 up->lcr = cval;
Govindraj.R32212892011-11-07 18:58:55 +0530850 up->scr = OMAP_UART_SCR_TX_EMPTY;
Govindraj.Rb6126332010-09-27 20:20:49 +0530851
852 /* FIFOs and DMA Settings */
853
854 /* FCR can be changed only when the
855 * baud clock is not running
856 * DLL_REG and DLH_REG set to 0.
857 */
Andrei Emeltchenko662b083a2010-11-30 14:11:49 -0800858 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_A);
Govindraj.Rb6126332010-09-27 20:20:49 +0530859 serial_out(up, UART_DLL, 0);
860 serial_out(up, UART_DLM, 0);
861 serial_out(up, UART_LCR, 0);
862
Andrei Emeltchenko662b083a2010-11-30 14:11:49 -0800863 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B);
Govindraj.Rb6126332010-09-27 20:20:49 +0530864
Russell King08bd4902012-10-05 13:54:53 +0100865 up->efr = serial_in(up, UART_EFR) & ~UART_EFR_ECB;
Russell Kingd864c032012-10-06 00:51:17 +0100866 up->efr &= ~UART_EFR_SCD;
Govindraj.Rb6126332010-09-27 20:20:49 +0530867 serial_out(up, UART_EFR, up->efr | UART_EFR_ECB);
868
Andrei Emeltchenko662b083a2010-11-30 14:11:49 -0800869 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_A);
Russell King08bd4902012-10-05 13:54:53 +0100870 up->mcr = serial_in(up, UART_MCR) & ~UART_MCR_TCRTLR;
Govindraj.Rb6126332010-09-27 20:20:49 +0530871 serial_out(up, UART_MCR, up->mcr | UART_MCR_TCRTLR);
872 /* FIFO ENABLE, DMA MODE */
Paul Walmsley0ba5f662012-01-25 19:50:36 -0700873
874 up->scr |= OMAP_UART_SCR_RX_TRIG_GRANU1_MASK;
Paul Walmsley0a697b22012-01-21 00:27:40 -0700875
Felipe Balbi6721ab72012-09-06 15:45:40 +0300876 /* Set receive FIFO threshold to 16 characters and
877 * transmit FIFO threshold to 16 spaces
878 */
Felipe Balbi49457432012-09-06 15:45:21 +0300879 up->fcr &= ~OMAP_UART_FCR_RX_FIFO_TRIG_MASK;
Felipe Balbi6721ab72012-09-06 15:45:40 +0300880 up->fcr &= ~OMAP_UART_FCR_TX_FIFO_TRIG_MASK;
881 up->fcr |= UART_FCR6_R_TRIGGER_16 | UART_FCR6_T_TRIGGER_24 |
882 UART_FCR_ENABLE_FIFO;
Greg Kroah-Hartman8a74e9f2012-01-26 11:15:18 -0800883
Paul Walmsley0ba5f662012-01-25 19:50:36 -0700884 serial_out(up, UART_FCR, up->fcr);
885 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B);
886
Govindraj.Rc538d202011-11-07 18:57:03 +0530887 serial_out(up, UART_OMAP_SCR, up->scr);
888
Russell King08bd4902012-10-05 13:54:53 +0100889 /* Reset UART_MCR_TCRTLR: this must be done with the EFR_ECB bit set */
Andrei Emeltchenko662b083a2010-11-30 14:11:49 -0800890 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_A);
Govindraj.Rb6126332010-09-27 20:20:49 +0530891 serial_out(up, UART_MCR, up->mcr);
Russell King08bd4902012-10-05 13:54:53 +0100892 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B);
893 serial_out(up, UART_EFR, up->efr);
894 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_A);
Govindraj.Rb6126332010-09-27 20:20:49 +0530895
896 /* Protocol, Baud Rate, and Interrupt Settings */
897
Govindraj.R94734742011-11-07 19:00:33 +0530898 if (up->errata & UART_ERRATA_i202_MDR1_ACCESS)
899 serial_omap_mdr1_errataset(up, up->mdr1);
900 else
901 serial_out(up, UART_OMAP_MDR1, up->mdr1);
902
Andrei Emeltchenko662b083a2010-11-30 14:11:49 -0800903 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B);
Govindraj.Rb6126332010-09-27 20:20:49 +0530904 serial_out(up, UART_EFR, up->efr | UART_EFR_ECB);
905
906 serial_out(up, UART_LCR, 0);
907 serial_out(up, UART_IER, 0);
Andrei Emeltchenko662b083a2010-11-30 14:11:49 -0800908 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B);
Govindraj.Rb6126332010-09-27 20:20:49 +0530909
Govindraj.Rc538d202011-11-07 18:57:03 +0530910 serial_out(up, UART_DLL, up->dll); /* LS of divisor */
911 serial_out(up, UART_DLM, up->dlh); /* MS of divisor */
Govindraj.Rb6126332010-09-27 20:20:49 +0530912
913 serial_out(up, UART_LCR, 0);
914 serial_out(up, UART_IER, up->ier);
Andrei Emeltchenko662b083a2010-11-30 14:11:49 -0800915 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B);
Govindraj.Rb6126332010-09-27 20:20:49 +0530916
917 serial_out(up, UART_EFR, up->efr);
918 serial_out(up, UART_LCR, cval);
919
920 if (baud > 230400 && baud != 3000000)
Govindraj.Rc538d202011-11-07 18:57:03 +0530921 up->mdr1 = UART_OMAP_MDR1_13X_MODE;
Govindraj.Rb6126332010-09-27 20:20:49 +0530922 else
Govindraj.Rc538d202011-11-07 18:57:03 +0530923 up->mdr1 = UART_OMAP_MDR1_16X_MODE;
924
Govindraj.R94734742011-11-07 19:00:33 +0530925 if (up->errata & UART_ERRATA_i202_MDR1_ACCESS)
926 serial_omap_mdr1_errataset(up, up->mdr1);
927 else
928 serial_out(up, UART_OMAP_MDR1, up->mdr1);
Govindraj.Rb6126332010-09-27 20:20:49 +0530929
Russell Kingc533e512012-10-06 09:34:36 +0100930 /* Configure flow control */
Russell Kingc7d059c2012-10-06 09:12:44 +0100931 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B);
Govindraj.Rb6126332010-09-27 20:20:49 +0530932
Russell Kingc533e512012-10-06 09:34:36 +0100933 /* XON1/XOFF1 accessible mode B, TCRTLR=0, ECB=0 */
934 serial_out(up, UART_XON1, termios->c_cc[VSTART]);
935 serial_out(up, UART_XOFF1, termios->c_cc[VSTOP]);
Govindraj.Rb6126332010-09-27 20:20:49 +0530936
Russell Kingc533e512012-10-06 09:34:36 +0100937 /* Enable access to TCR/TLR */
Russell Kingc7d059c2012-10-06 09:12:44 +0100938 serial_out(up, UART_EFR, up->efr | UART_EFR_ECB);
939 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_A);
940 serial_out(up, UART_MCR, up->mcr | UART_MCR_TCRTLR);
Govindraj.Rb6126332010-09-27 20:20:49 +0530941
Russell Kingc7d059c2012-10-06 09:12:44 +0100942 serial_out(up, UART_TI752_TCR, OMAP_UART_TCR_TRIG);
Govindraj.Rb6126332010-09-27 20:20:49 +0530943
Russell King08bd4902012-10-05 13:54:53 +0100944 if (termios->c_cflag & CRTSCTS && up->port.flags & UPF_HARD_FLOW) {
Russell King08bd4902012-10-05 13:54:53 +0100945 /* Enable AUTORTS and AUTOCTS */
946 up->efr |= UART_EFR_CTS | UART_EFR_RTS;
947
Russell King1fe8aa82012-10-06 09:04:03 +0100948 /* Ensure MCR RTS is asserted */
949 up->mcr |= UART_MCR_RTS;
Russell King0d5b1662012-10-05 23:48:28 +0100950 } else {
951 /* Disable AUTORTS and AUTOCTS */
952 up->efr &= ~(UART_EFR_CTS | UART_EFR_RTS);
Govindraj.Rb6126332010-09-27 20:20:49 +0530953 }
954
Russell King01d70bb2012-10-15 16:50:59 +0100955 if (up->port.flags & UPF_SOFT_FLOW) {
Russell King01d70bb2012-10-15 16:50:59 +0100956 /* clear SW control mode bits */
957 up->efr &= OMAP_UART_SW_CLR;
958
959 /*
960 * IXON Flag:
Russell King01d70bb2012-10-15 16:50:59 +0100961 * Enable XON/XOFF flow control on input.
962 * Receiver compares XON1, XOFF1.
963 */
Russell King3af08bd2012-10-05 13:32:08 +0100964 if (termios->c_iflag & IXON)
Russell King01d70bb2012-10-15 16:50:59 +0100965 up->efr |= OMAP_UART_SW_RX;
966
Russell King01d70bb2012-10-15 16:50:59 +0100967 /*
Russell King3af08bd2012-10-05 13:32:08 +0100968 * IXOFF Flag:
969 * Enable XON/XOFF flow control on output.
970 * Transmit XON1, XOFF1
971 */
972 if (termios->c_iflag & IXOFF)
973 up->efr |= OMAP_UART_SW_TX;
974
975 /*
Russell King01d70bb2012-10-15 16:50:59 +0100976 * IXANY Flag:
977 * Enable any character to restart output.
978 * Operation resumes after receiving any
979 * character after recognition of the XOFF character
980 */
981 if (termios->c_iflag & IXANY)
982 up->mcr |= UART_MCR_XONANY;
983 else
984 up->mcr &= ~UART_MCR_XONANY;
Russell King01d70bb2012-10-15 16:50:59 +0100985 }
Russell Kingc7d059c2012-10-06 09:12:44 +0100986 serial_out(up, UART_MCR, up->mcr);
Russell King18f360f2012-10-06 09:08:20 +0100987 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B);
988 serial_out(up, UART_EFR, up->efr);
989 serial_out(up, UART_LCR, up->lcr);
990
Govindraj.Rb6126332010-09-27 20:20:49 +0530991 serial_omap_set_mctrl(&up->port, up->port.mctrl);
Govindraj.Rb6126332010-09-27 20:20:49 +0530992
993 spin_unlock_irqrestore(&up->port.lock, flags);
Felipe Balbi660ac5f2012-09-06 15:45:26 +0300994 pm_runtime_mark_last_busy(up->dev);
995 pm_runtime_put_autosuspend(up->dev);
Rajendra Nayakba774332011-12-14 17:25:43 +0530996 dev_dbg(up->port.dev, "serial_omap_set_termios+%d\n", up->port.line);
Govindraj.Rb6126332010-09-27 20:20:49 +0530997}
998
Felipe Balbi9727faf2012-09-06 15:45:35 +0300999static int serial_omap_set_wake(struct uart_port *port, unsigned int state)
1000{
1001 struct uart_omap_port *up = to_uart_omap_port(port);
1002
1003 serial_omap_enable_wakeup(up, state);
1004
1005 return 0;
1006}
1007
Govindraj.Rb6126332010-09-27 20:20:49 +05301008static void
1009serial_omap_pm(struct uart_port *port, unsigned int state,
1010 unsigned int oldstate)
1011{
Felipe Balbic990f352012-08-23 13:32:41 +03001012 struct uart_omap_port *up = to_uart_omap_port(port);
Govindraj.Rb6126332010-09-27 20:20:49 +05301013 unsigned char efr;
1014
Rajendra Nayakba774332011-12-14 17:25:43 +05301015 dev_dbg(up->port.dev, "serial_omap_pm+%d\n", up->port.line);
Govindraj.Rfcdca752011-02-28 18:12:23 +05301016
Felipe Balbid8ee4ea2012-09-06 15:45:20 +03001017 pm_runtime_get_sync(up->dev);
Andrei Emeltchenko662b083a2010-11-30 14:11:49 -08001018 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B);
Govindraj.Rb6126332010-09-27 20:20:49 +05301019 efr = serial_in(up, UART_EFR);
1020 serial_out(up, UART_EFR, efr | UART_EFR_ECB);
1021 serial_out(up, UART_LCR, 0);
1022
1023 serial_out(up, UART_IER, (state != 0) ? UART_IERX_SLEEP : 0);
Andrei Emeltchenko662b083a2010-11-30 14:11:49 -08001024 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B);
Govindraj.Rb6126332010-09-27 20:20:49 +05301025 serial_out(up, UART_EFR, efr);
1026 serial_out(up, UART_LCR, 0);
Govindraj.Rfcdca752011-02-28 18:12:23 +05301027
Felipe Balbid8ee4ea2012-09-06 15:45:20 +03001028 if (!device_may_wakeup(up->dev)) {
Govindraj.Rfcdca752011-02-28 18:12:23 +05301029 if (!state)
Felipe Balbid8ee4ea2012-09-06 15:45:20 +03001030 pm_runtime_forbid(up->dev);
Govindraj.Rfcdca752011-02-28 18:12:23 +05301031 else
Felipe Balbid8ee4ea2012-09-06 15:45:20 +03001032 pm_runtime_allow(up->dev);
Govindraj.Rfcdca752011-02-28 18:12:23 +05301033 }
1034
Felipe Balbi660ac5f2012-09-06 15:45:26 +03001035 pm_runtime_mark_last_busy(up->dev);
1036 pm_runtime_put_autosuspend(up->dev);
Govindraj.Rb6126332010-09-27 20:20:49 +05301037}
1038
1039static void serial_omap_release_port(struct uart_port *port)
1040{
1041 dev_dbg(port->dev, "serial_omap_release_port+\n");
1042}
1043
1044static int serial_omap_request_port(struct uart_port *port)
1045{
1046 dev_dbg(port->dev, "serial_omap_request_port+\n");
1047 return 0;
1048}
1049
1050static void serial_omap_config_port(struct uart_port *port, int flags)
1051{
Felipe Balbic990f352012-08-23 13:32:41 +03001052 struct uart_omap_port *up = to_uart_omap_port(port);
Govindraj.Rb6126332010-09-27 20:20:49 +05301053
1054 dev_dbg(up->port.dev, "serial_omap_config_port+%d\n",
Rajendra Nayakba774332011-12-14 17:25:43 +05301055 up->port.line);
Govindraj.Rb6126332010-09-27 20:20:49 +05301056 up->port.type = PORT_OMAP;
Russell King3af08bd2012-10-05 13:32:08 +01001057 up->port.flags |= UPF_SOFT_FLOW | UPF_HARD_FLOW;
Govindraj.Rb6126332010-09-27 20:20:49 +05301058}
1059
1060static int
1061serial_omap_verify_port(struct uart_port *port, struct serial_struct *ser)
1062{
1063 /* we don't want the core code to modify any port params */
1064 dev_dbg(port->dev, "serial_omap_verify_port+\n");
1065 return -EINVAL;
1066}
1067
1068static const char *
1069serial_omap_type(struct uart_port *port)
1070{
Felipe Balbic990f352012-08-23 13:32:41 +03001071 struct uart_omap_port *up = to_uart_omap_port(port);
Govindraj.Rb6126332010-09-27 20:20:49 +05301072
Rajendra Nayakba774332011-12-14 17:25:43 +05301073 dev_dbg(up->port.dev, "serial_omap_type+%d\n", up->port.line);
Govindraj.Rb6126332010-09-27 20:20:49 +05301074 return up->name;
1075}
1076
Govindraj.Rb6126332010-09-27 20:20:49 +05301077#define BOTH_EMPTY (UART_LSR_TEMT | UART_LSR_THRE)
1078
1079static inline void wait_for_xmitr(struct uart_omap_port *up)
1080{
1081 unsigned int status, tmout = 10000;
1082
1083 /* Wait up to 10ms for the character(s) to be sent. */
1084 do {
1085 status = serial_in(up, UART_LSR);
1086
1087 if (status & UART_LSR_BI)
1088 up->lsr_break_flag = UART_LSR_BI;
1089
1090 if (--tmout == 0)
1091 break;
1092 udelay(1);
1093 } while ((status & BOTH_EMPTY) != BOTH_EMPTY);
1094
1095 /* Wait up to 1s for flow control if necessary */
1096 if (up->port.flags & UPF_CONS_FLOW) {
1097 tmout = 1000000;
1098 for (tmout = 1000000; tmout; tmout--) {
1099 unsigned int msr = serial_in(up, UART_MSR);
1100
1101 up->msr_saved_flags |= msr & MSR_SAVE_FLAGS;
1102 if (msr & UART_MSR_CTS)
1103 break;
1104
1105 udelay(1);
1106 }
1107 }
1108}
1109
Cosmin Cojocar1b41dbc2010-12-05 16:15:10 +01001110#ifdef CONFIG_CONSOLE_POLL
1111
1112static void serial_omap_poll_put_char(struct uart_port *port, unsigned char ch)
1113{
Felipe Balbic990f352012-08-23 13:32:41 +03001114 struct uart_omap_port *up = to_uart_omap_port(port);
Govindraj.Rfcdca752011-02-28 18:12:23 +05301115
Felipe Balbid8ee4ea2012-09-06 15:45:20 +03001116 pm_runtime_get_sync(up->dev);
Cosmin Cojocar1b41dbc2010-12-05 16:15:10 +01001117 wait_for_xmitr(up);
1118 serial_out(up, UART_TX, ch);
Felipe Balbi660ac5f2012-09-06 15:45:26 +03001119 pm_runtime_mark_last_busy(up->dev);
1120 pm_runtime_put_autosuspend(up->dev);
Cosmin Cojocar1b41dbc2010-12-05 16:15:10 +01001121}
1122
1123static int serial_omap_poll_get_char(struct uart_port *port)
1124{
Felipe Balbic990f352012-08-23 13:32:41 +03001125 struct uart_omap_port *up = to_uart_omap_port(port);
Govindraj.Rfcdca752011-02-28 18:12:23 +05301126 unsigned int status;
Cosmin Cojocar1b41dbc2010-12-05 16:15:10 +01001127
Felipe Balbid8ee4ea2012-09-06 15:45:20 +03001128 pm_runtime_get_sync(up->dev);
Govindraj.Rfcdca752011-02-28 18:12:23 +05301129 status = serial_in(up, UART_LSR);
Felipe Balbia6b19c32012-09-06 15:45:36 +03001130 if (!(status & UART_LSR_DR)) {
1131 status = NO_POLL_CHAR;
1132 goto out;
1133 }
Cosmin Cojocar1b41dbc2010-12-05 16:15:10 +01001134
Govindraj.Rfcdca752011-02-28 18:12:23 +05301135 status = serial_in(up, UART_RX);
Felipe Balbia6b19c32012-09-06 15:45:36 +03001136
1137out:
Felipe Balbi660ac5f2012-09-06 15:45:26 +03001138 pm_runtime_mark_last_busy(up->dev);
1139 pm_runtime_put_autosuspend(up->dev);
Felipe Balbia6b19c32012-09-06 15:45:36 +03001140
Govindraj.Rfcdca752011-02-28 18:12:23 +05301141 return status;
Cosmin Cojocar1b41dbc2010-12-05 16:15:10 +01001142}
1143
1144#endif /* CONFIG_CONSOLE_POLL */
1145
1146#ifdef CONFIG_SERIAL_OMAP_CONSOLE
1147
Shubhrajyoti D40477d02012-10-03 17:24:38 +05301148static struct uart_omap_port *serial_omap_console_ports[OMAP_MAX_HSUART_PORTS];
Cosmin Cojocar1b41dbc2010-12-05 16:15:10 +01001149
1150static struct uart_driver serial_omap_reg;
1151
Govindraj.Rb6126332010-09-27 20:20:49 +05301152static void serial_omap_console_putchar(struct uart_port *port, int ch)
1153{
Felipe Balbic990f352012-08-23 13:32:41 +03001154 struct uart_omap_port *up = to_uart_omap_port(port);
Govindraj.Rb6126332010-09-27 20:20:49 +05301155
1156 wait_for_xmitr(up);
1157 serial_out(up, UART_TX, ch);
1158}
1159
1160static void
1161serial_omap_console_write(struct console *co, const char *s,
1162 unsigned int count)
1163{
1164 struct uart_omap_port *up = serial_omap_console_ports[co->index];
1165 unsigned long flags;
1166 unsigned int ier;
1167 int locked = 1;
1168
Felipe Balbid8ee4ea2012-09-06 15:45:20 +03001169 pm_runtime_get_sync(up->dev);
Govindraj.Rfcdca752011-02-28 18:12:23 +05301170
Govindraj.Rb6126332010-09-27 20:20:49 +05301171 local_irq_save(flags);
1172 if (up->port.sysrq)
1173 locked = 0;
1174 else if (oops_in_progress)
1175 locked = spin_trylock(&up->port.lock);
1176 else
1177 spin_lock(&up->port.lock);
1178
1179 /*
1180 * First save the IER then disable the interrupts
1181 */
1182 ier = serial_in(up, UART_IER);
1183 serial_out(up, UART_IER, 0);
1184
1185 uart_console_write(&up->port, s, count, serial_omap_console_putchar);
1186
1187 /*
1188 * Finally, wait for transmitter to become empty
1189 * and restore the IER
1190 */
1191 wait_for_xmitr(up);
1192 serial_out(up, UART_IER, ier);
1193 /*
1194 * The receive handling will happen properly because the
1195 * receive ready bit will still be set; it is not cleared
1196 * on read. However, modem control will not, we must
1197 * call it if we have saved something in the saved flags
1198 * while processing with interrupts off.
1199 */
1200 if (up->msr_saved_flags)
1201 check_modem_status(up);
1202
Felipe Balbid8ee4ea2012-09-06 15:45:20 +03001203 pm_runtime_mark_last_busy(up->dev);
1204 pm_runtime_put_autosuspend(up->dev);
Govindraj.Rb6126332010-09-27 20:20:49 +05301205 if (locked)
1206 spin_unlock(&up->port.lock);
1207 local_irq_restore(flags);
1208}
1209
1210static int __init
1211serial_omap_console_setup(struct console *co, char *options)
1212{
1213 struct uart_omap_port *up;
1214 int baud = 115200;
1215 int bits = 8;
1216 int parity = 'n';
1217 int flow = 'n';
1218
1219 if (serial_omap_console_ports[co->index] == NULL)
1220 return -ENODEV;
1221 up = serial_omap_console_ports[co->index];
1222
1223 if (options)
1224 uart_parse_options(options, &baud, &parity, &bits, &flow);
1225
1226 return uart_set_options(&up->port, co, baud, parity, bits, flow);
1227}
1228
1229static struct console serial_omap_console = {
1230 .name = OMAP_SERIAL_NAME,
1231 .write = serial_omap_console_write,
1232 .device = uart_console_device,
1233 .setup = serial_omap_console_setup,
1234 .flags = CON_PRINTBUFFER,
1235 .index = -1,
1236 .data = &serial_omap_reg,
1237};
1238
1239static void serial_omap_add_console_port(struct uart_omap_port *up)
1240{
Rajendra Nayakba774332011-12-14 17:25:43 +05301241 serial_omap_console_ports[up->port.line] = up;
Govindraj.Rb6126332010-09-27 20:20:49 +05301242}
1243
1244#define OMAP_CONSOLE (&serial_omap_console)
1245
1246#else
1247
1248#define OMAP_CONSOLE NULL
1249
1250static inline void serial_omap_add_console_port(struct uart_omap_port *up)
1251{}
1252
1253#endif
1254
1255static struct uart_ops serial_omap_pops = {
1256 .tx_empty = serial_omap_tx_empty,
1257 .set_mctrl = serial_omap_set_mctrl,
1258 .get_mctrl = serial_omap_get_mctrl,
1259 .stop_tx = serial_omap_stop_tx,
1260 .start_tx = serial_omap_start_tx,
Russell King3af08bd2012-10-05 13:32:08 +01001261 .throttle = serial_omap_throttle,
1262 .unthrottle = serial_omap_unthrottle,
Govindraj.Rb6126332010-09-27 20:20:49 +05301263 .stop_rx = serial_omap_stop_rx,
1264 .enable_ms = serial_omap_enable_ms,
1265 .break_ctl = serial_omap_break_ctl,
1266 .startup = serial_omap_startup,
1267 .shutdown = serial_omap_shutdown,
1268 .set_termios = serial_omap_set_termios,
1269 .pm = serial_omap_pm,
Felipe Balbi9727faf2012-09-06 15:45:35 +03001270 .set_wake = serial_omap_set_wake,
Govindraj.Rb6126332010-09-27 20:20:49 +05301271 .type = serial_omap_type,
1272 .release_port = serial_omap_release_port,
1273 .request_port = serial_omap_request_port,
1274 .config_port = serial_omap_config_port,
1275 .verify_port = serial_omap_verify_port,
Cosmin Cojocar1b41dbc2010-12-05 16:15:10 +01001276#ifdef CONFIG_CONSOLE_POLL
1277 .poll_put_char = serial_omap_poll_put_char,
1278 .poll_get_char = serial_omap_poll_get_char,
1279#endif
Govindraj.Rb6126332010-09-27 20:20:49 +05301280};
1281
1282static struct uart_driver serial_omap_reg = {
1283 .owner = THIS_MODULE,
1284 .driver_name = "OMAP-SERIAL",
1285 .dev_name = OMAP_SERIAL_NAME,
1286 .nr = OMAP_MAX_HSUART_PORTS,
1287 .cons = OMAP_CONSOLE,
1288};
1289
Shubhrajyoti D3bc4f0d2012-01-16 15:52:36 +05301290#ifdef CONFIG_PM_SLEEP
Govindraj.Rfcdca752011-02-28 18:12:23 +05301291static int serial_omap_suspend(struct device *dev)
Govindraj.Rb6126332010-09-27 20:20:49 +05301292{
Govindraj.Rfcdca752011-02-28 18:12:23 +05301293 struct uart_omap_port *up = dev_get_drvdata(dev);
Govindraj.Rb6126332010-09-27 20:20:49 +05301294
Sourav Poddarac57e7f2012-09-18 17:05:54 +05301295 uart_suspend_port(&serial_omap_reg, &up->port);
Linus Torvalds033d9952012-10-02 09:54:49 -07001296 flush_work(&up->qos_work);
Govindraj.R2fd14962011-11-09 17:41:21 +05301297
Govindraj.Rb6126332010-09-27 20:20:49 +05301298 return 0;
1299}
1300
Govindraj.Rfcdca752011-02-28 18:12:23 +05301301static int serial_omap_resume(struct device *dev)
Govindraj.Rb6126332010-09-27 20:20:49 +05301302{
Govindraj.Rfcdca752011-02-28 18:12:23 +05301303 struct uart_omap_port *up = dev_get_drvdata(dev);
Govindraj.Rb6126332010-09-27 20:20:49 +05301304
Sourav Poddarac57e7f2012-09-18 17:05:54 +05301305 uart_resume_port(&serial_omap_reg, &up->port);
1306
Govindraj.Rb6126332010-09-27 20:20:49 +05301307 return 0;
1308}
Govindraj.Rfcdca752011-02-28 18:12:23 +05301309#endif
Govindraj.Rb6126332010-09-27 20:20:49 +05301310
Bill Pemberton9671f092012-11-19 13:21:50 -05001311static void omap_serial_fill_features_erratas(struct uart_omap_port *up)
Govindraj.R7c77c8d2012-04-03 19:12:34 +05301312{
1313 u32 mvr, scheme;
1314 u16 revision, major, minor;
1315
1316 mvr = serial_in(up, UART_OMAP_MVER);
1317
1318 /* Check revision register scheme */
1319 scheme = mvr >> OMAP_UART_MVR_SCHEME_SHIFT;
1320
1321 switch (scheme) {
1322 case 0: /* Legacy Scheme: OMAP2/3 */
1323 /* MINOR_REV[0:4], MAJOR_REV[4:7] */
1324 major = (mvr & OMAP_UART_LEGACY_MVR_MAJ_MASK) >>
1325 OMAP_UART_LEGACY_MVR_MAJ_SHIFT;
1326 minor = (mvr & OMAP_UART_LEGACY_MVR_MIN_MASK);
1327 break;
1328 case 1:
1329 /* New Scheme: OMAP4+ */
1330 /* MINOR_REV[0:5], MAJOR_REV[8:10] */
1331 major = (mvr & OMAP_UART_MVR_MAJ_MASK) >>
1332 OMAP_UART_MVR_MAJ_SHIFT;
1333 minor = (mvr & OMAP_UART_MVR_MIN_MASK);
1334 break;
1335 default:
Felipe Balbid8ee4ea2012-09-06 15:45:20 +03001336 dev_warn(up->dev,
Govindraj.R7c77c8d2012-04-03 19:12:34 +05301337 "Unknown %s revision, defaulting to highest\n",
1338 up->name);
1339 /* highest possible revision */
1340 major = 0xff;
1341 minor = 0xff;
1342 }
1343
1344 /* normalize revision for the driver */
1345 revision = UART_BUILD_REVISION(major, minor);
1346
1347 switch (revision) {
1348 case OMAP_UART_REV_46:
1349 up->errata |= (UART_ERRATA_i202_MDR1_ACCESS |
1350 UART_ERRATA_i291_DMA_FORCEIDLE);
1351 break;
1352 case OMAP_UART_REV_52:
1353 up->errata |= (UART_ERRATA_i202_MDR1_ACCESS |
1354 UART_ERRATA_i291_DMA_FORCEIDLE);
1355 break;
1356 case OMAP_UART_REV_63:
1357 up->errata |= UART_ERRATA_i202_MDR1_ACCESS;
1358 break;
1359 default:
1360 break;
1361 }
1362}
1363
Bill Pemberton9671f092012-11-19 13:21:50 -05001364static struct omap_uart_port_info *of_get_uart_port_info(struct device *dev)
Rajendra Nayakd92b0df2011-12-14 17:25:45 +05301365{
1366 struct omap_uart_port_info *omap_up_info;
1367
1368 omap_up_info = devm_kzalloc(dev, sizeof(*omap_up_info), GFP_KERNEL);
1369 if (!omap_up_info)
1370 return NULL; /* out of memory */
1371
1372 of_property_read_u32(dev->of_node, "clock-frequency",
1373 &omap_up_info->uartclk);
1374 return omap_up_info;
1375}
1376
Bill Pemberton9671f092012-11-19 13:21:50 -05001377static int serial_omap_probe(struct platform_device *pdev)
Govindraj.Rb6126332010-09-27 20:20:49 +05301378{
1379 struct uart_omap_port *up;
Felipe Balbi49457432012-09-06 15:45:21 +03001380 struct resource *mem, *irq;
Govindraj.Rb6126332010-09-27 20:20:49 +05301381 struct omap_uart_port_info *omap_up_info = pdev->dev.platform_data;
NeilBrown9574f362012-07-30 10:30:26 +10001382 int ret;
Govindraj.Rb6126332010-09-27 20:20:49 +05301383
Rajendra Nayakd92b0df2011-12-14 17:25:45 +05301384 if (pdev->dev.of_node)
1385 omap_up_info = of_get_uart_port_info(&pdev->dev);
1386
Govindraj.Rb6126332010-09-27 20:20:49 +05301387 mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1388 if (!mem) {
1389 dev_err(&pdev->dev, "no mem resource?\n");
1390 return -ENODEV;
1391 }
1392
1393 irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
1394 if (!irq) {
1395 dev_err(&pdev->dev, "no irq resource?\n");
1396 return -ENODEV;
1397 }
1398
Shubhrajyoti D388bc262012-03-21 17:22:22 +05301399 if (!devm_request_mem_region(&pdev->dev, mem->start, resource_size(mem),
Joe Perches28f65c112011-06-09 09:13:32 -07001400 pdev->dev.driver->name)) {
Govindraj.Rb6126332010-09-27 20:20:49 +05301401 dev_err(&pdev->dev, "memory region already claimed\n");
1402 return -EBUSY;
1403 }
1404
NeilBrown9574f362012-07-30 10:30:26 +10001405 if (gpio_is_valid(omap_up_info->DTR_gpio) &&
1406 omap_up_info->DTR_present) {
1407 ret = gpio_request(omap_up_info->DTR_gpio, "omap-serial");
1408 if (ret < 0)
1409 return ret;
1410 ret = gpio_direction_output(omap_up_info->DTR_gpio,
1411 omap_up_info->DTR_inverted);
1412 if (ret < 0)
1413 return ret;
1414 }
1415
Shubhrajyoti D388bc262012-03-21 17:22:22 +05301416 up = devm_kzalloc(&pdev->dev, sizeof(*up), GFP_KERNEL);
1417 if (!up)
1418 return -ENOMEM;
1419
NeilBrown9574f362012-07-30 10:30:26 +10001420 if (gpio_is_valid(omap_up_info->DTR_gpio) &&
1421 omap_up_info->DTR_present) {
1422 up->DTR_gpio = omap_up_info->DTR_gpio;
1423 up->DTR_inverted = omap_up_info->DTR_inverted;
1424 } else
1425 up->DTR_gpio = -EINVAL;
1426 up->DTR_active = 0;
1427
Felipe Balbid8ee4ea2012-09-06 15:45:20 +03001428 up->dev = &pdev->dev;
Govindraj.Rb6126332010-09-27 20:20:49 +05301429 up->port.dev = &pdev->dev;
1430 up->port.type = PORT_OMAP;
1431 up->port.iotype = UPIO_MEM;
1432 up->port.irq = irq->start;
1433
1434 up->port.regshift = 2;
1435 up->port.fifosize = 64;
1436 up->port.ops = &serial_omap_pops;
Govindraj.Rb6126332010-09-27 20:20:49 +05301437
Rajendra Nayakd92b0df2011-12-14 17:25:45 +05301438 if (pdev->dev.of_node)
1439 up->port.line = of_alias_get_id(pdev->dev.of_node, "serial");
1440 else
1441 up->port.line = pdev->id;
1442
1443 if (up->port.line < 0) {
1444 dev_err(&pdev->dev, "failed to get alias/pdev id, errno %d\n",
1445 up->port.line);
1446 ret = -ENODEV;
Shubhrajyoti D388bc262012-03-21 17:22:22 +05301447 goto err_port_line;
Rajendra Nayakd92b0df2011-12-14 17:25:45 +05301448 }
1449
Tony Lindgren3dbc5ce2012-09-07 10:59:40 -07001450 up->pins = devm_pinctrl_get_select_default(&pdev->dev);
1451 if (IS_ERR(up->pins)) {
1452 dev_warn(&pdev->dev, "did not get pins for uart%i error: %li\n",
1453 up->port.line, PTR_ERR(up->pins));
1454 up->pins = NULL;
1455 }
1456
Rajendra Nayakd92b0df2011-12-14 17:25:45 +05301457 sprintf(up->name, "OMAP UART%d", up->port.line);
Govindraj.Redd70ad2011-10-11 14:55:41 +05301458 up->port.mapbase = mem->start;
Shubhrajyoti D388bc262012-03-21 17:22:22 +05301459 up->port.membase = devm_ioremap(&pdev->dev, mem->start,
1460 resource_size(mem));
Govindraj.Redd70ad2011-10-11 14:55:41 +05301461 if (!up->port.membase) {
1462 dev_err(&pdev->dev, "can't ioremap UART\n");
1463 ret = -ENOMEM;
Shubhrajyoti D388bc262012-03-21 17:22:22 +05301464 goto err_ioremap;
Govindraj.Redd70ad2011-10-11 14:55:41 +05301465 }
1466
Govindraj.Rb6126332010-09-27 20:20:49 +05301467 up->port.flags = omap_up_info->flags;
Govindraj.Rb6126332010-09-27 20:20:49 +05301468 up->port.uartclk = omap_up_info->uartclk;
Rajendra Nayak8fe789d2011-12-14 17:25:44 +05301469 if (!up->port.uartclk) {
1470 up->port.uartclk = DEFAULT_CLK_SPEED;
1471 dev_warn(&pdev->dev, "No clock speed specified: using default:"
1472 "%d\n", DEFAULT_CLK_SPEED);
1473 }
Govindraj.Rb6126332010-09-27 20:20:49 +05301474
Govindraj.R2fd14962011-11-09 17:41:21 +05301475 up->latency = PM_QOS_CPU_DMA_LAT_DEFAULT_VALUE;
1476 up->calc_latency = PM_QOS_CPU_DMA_LAT_DEFAULT_VALUE;
1477 pm_qos_add_request(&up->pm_qos_request,
1478 PM_QOS_CPU_DMA_LATENCY, up->latency);
1479 serial_omap_uart_wq = create_singlethread_workqueue(up->name);
1480 INIT_WORK(&up->qos_work, serial_omap_uart_qos_work);
1481
Felipe Balbi93220dc2012-09-06 15:45:27 +03001482 platform_set_drvdata(pdev, up);
Ruchika Kharwar856e35b2012-09-06 15:45:31 +03001483 pm_runtime_enable(&pdev->dev);
Govindraj.Rfcdca752011-02-28 18:12:23 +05301484 pm_runtime_use_autosuspend(&pdev->dev);
1485 pm_runtime_set_autosuspend_delay(&pdev->dev,
Deepak Kc86845db2011-11-09 17:33:38 +05301486 omap_up_info->autosuspend_timeout);
Govindraj.Rfcdca752011-02-28 18:12:23 +05301487
1488 pm_runtime_irq_safe(&pdev->dev);
Govindraj.Rfcdca752011-02-28 18:12:23 +05301489 pm_runtime_get_sync(&pdev->dev);
1490
Govindraj.R7c77c8d2012-04-03 19:12:34 +05301491 omap_serial_fill_features_erratas(up);
1492
Rajendra Nayakba774332011-12-14 17:25:43 +05301493 ui[up->port.line] = up;
Govindraj.Rb6126332010-09-27 20:20:49 +05301494 serial_omap_add_console_port(up);
1495
1496 ret = uart_add_one_port(&serial_omap_reg, &up->port);
1497 if (ret != 0)
Shubhrajyoti D388bc262012-03-21 17:22:22 +05301498 goto err_add_port;
Govindraj.Rb6126332010-09-27 20:20:49 +05301499
Felipe Balbi660ac5f2012-09-06 15:45:26 +03001500 pm_runtime_mark_last_busy(up->dev);
1501 pm_runtime_put_autosuspend(up->dev);
Govindraj.Rb6126332010-09-27 20:20:49 +05301502 return 0;
Shubhrajyoti D388bc262012-03-21 17:22:22 +05301503
1504err_add_port:
1505 pm_runtime_put(&pdev->dev);
1506 pm_runtime_disable(&pdev->dev);
1507err_ioremap:
1508err_port_line:
Govindraj.Rb6126332010-09-27 20:20:49 +05301509 dev_err(&pdev->dev, "[UART%d]: failure [%s]: %d\n",
1510 pdev->id, __func__, ret);
Govindraj.Rb6126332010-09-27 20:20:49 +05301511 return ret;
1512}
1513
Bill Pembertonae8d8a12012-11-19 13:26:18 -05001514static int serial_omap_remove(struct platform_device *dev)
Govindraj.Rb6126332010-09-27 20:20:49 +05301515{
1516 struct uart_omap_port *up = platform_get_drvdata(dev);
1517
Felipe Balbi7e9c8e72012-09-06 15:45:29 +03001518 pm_runtime_put_sync(up->dev);
Felipe Balbi1b42c8b2012-09-06 15:45:28 +03001519 pm_runtime_disable(up->dev);
1520 uart_remove_one_port(&serial_omap_reg, &up->port);
1521 pm_qos_remove_request(&up->pm_qos_request);
Govindraj.Rfcdca752011-02-28 18:12:23 +05301522
Govindraj.Rb6126332010-09-27 20:20:49 +05301523 return 0;
1524}
1525
Govindraj.R94734742011-11-07 19:00:33 +05301526/*
1527 * Work Around for Errata i202 (2430, 3430, 3630, 4430 and 4460)
1528 * The access to uart register after MDR1 Access
1529 * causes UART to corrupt data.
1530 *
1531 * Need a delay =
1532 * 5 L4 clock cycles + 5 UART functional clock cycle (@48MHz = ~0.2uS)
1533 * give 10 times as much
1534 */
1535static void serial_omap_mdr1_errataset(struct uart_omap_port *up, u8 mdr1)
1536{
1537 u8 timeout = 255;
1538
1539 serial_out(up, UART_OMAP_MDR1, mdr1);
1540 udelay(2);
1541 serial_out(up, UART_FCR, up->fcr | UART_FCR_CLEAR_XMIT |
1542 UART_FCR_CLEAR_RCVR);
1543 /*
1544 * Wait for FIFO to empty: when empty, RX_FIFO_E bit is 0 and
1545 * TX_FIFO_E bit is 1.
1546 */
1547 while (UART_LSR_THRE != (serial_in(up, UART_LSR) &
1548 (UART_LSR_THRE | UART_LSR_DR))) {
1549 timeout--;
1550 if (!timeout) {
1551 /* Should *never* happen. we warn and carry on */
Felipe Balbid8ee4ea2012-09-06 15:45:20 +03001552 dev_crit(up->dev, "Errata i202: timedout %x\n",
Govindraj.R94734742011-11-07 19:00:33 +05301553 serial_in(up, UART_LSR));
1554 break;
1555 }
1556 udelay(1);
1557 }
1558}
1559
Shubhrajyoti Db5148852012-01-16 15:52:37 +05301560#ifdef CONFIG_PM_RUNTIME
Govindraj.R9f9ac1e2011-11-07 18:56:12 +05301561static void serial_omap_restore_context(struct uart_omap_port *up)
1562{
Govindraj.R94734742011-11-07 19:00:33 +05301563 if (up->errata & UART_ERRATA_i202_MDR1_ACCESS)
1564 serial_omap_mdr1_errataset(up, UART_OMAP_MDR1_DISABLE);
1565 else
1566 serial_out(up, UART_OMAP_MDR1, UART_OMAP_MDR1_DISABLE);
1567
Govindraj.R9f9ac1e2011-11-07 18:56:12 +05301568 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B); /* Config B mode */
1569 serial_out(up, UART_EFR, UART_EFR_ECB);
1570 serial_out(up, UART_LCR, 0x0); /* Operational mode */
1571 serial_out(up, UART_IER, 0x0);
1572 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B); /* Config B mode */
Govindraj.Rc538d202011-11-07 18:57:03 +05301573 serial_out(up, UART_DLL, up->dll);
1574 serial_out(up, UART_DLM, up->dlh);
Govindraj.R9f9ac1e2011-11-07 18:56:12 +05301575 serial_out(up, UART_LCR, 0x0); /* Operational mode */
1576 serial_out(up, UART_IER, up->ier);
1577 serial_out(up, UART_FCR, up->fcr);
1578 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_A);
1579 serial_out(up, UART_MCR, up->mcr);
1580 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B); /* Config B mode */
Govindraj.Rc538d202011-11-07 18:57:03 +05301581 serial_out(up, UART_OMAP_SCR, up->scr);
Govindraj.R9f9ac1e2011-11-07 18:56:12 +05301582 serial_out(up, UART_EFR, up->efr);
1583 serial_out(up, UART_LCR, up->lcr);
Govindraj.R94734742011-11-07 19:00:33 +05301584 if (up->errata & UART_ERRATA_i202_MDR1_ACCESS)
1585 serial_omap_mdr1_errataset(up, up->mdr1);
1586 else
1587 serial_out(up, UART_OMAP_MDR1, up->mdr1);
Govindraj.R9f9ac1e2011-11-07 18:56:12 +05301588}
1589
Govindraj.Rfcdca752011-02-28 18:12:23 +05301590static int serial_omap_runtime_suspend(struct device *dev)
1591{
Govindraj.Rec3bebc2011-10-11 19:11:27 +05301592 struct uart_omap_port *up = dev_get_drvdata(dev);
1593 struct omap_uart_port_info *pdata = dev->platform_data;
1594
1595 if (!up)
1596 return -EINVAL;
1597
Felipe Balbie5b57c02012-08-23 13:32:42 +03001598 if (!pdata)
Govindraj.R62f3ec5f2011-10-13 14:11:09 +05301599 return 0;
1600
Felipe Balbie5b57c02012-08-23 13:32:42 +03001601 up->context_loss_cnt = serial_omap_get_context_loss_count(up);
Govindraj.Rec3bebc2011-10-11 19:11:27 +05301602
Govindraj.R62f3ec5f2011-10-13 14:11:09 +05301603 if (device_may_wakeup(dev)) {
1604 if (!up->wakeups_enabled) {
Felipe Balbie5b57c02012-08-23 13:32:42 +03001605 serial_omap_enable_wakeup(up, true);
Govindraj.R62f3ec5f2011-10-13 14:11:09 +05301606 up->wakeups_enabled = true;
1607 }
1608 } else {
1609 if (up->wakeups_enabled) {
Felipe Balbie5b57c02012-08-23 13:32:42 +03001610 serial_omap_enable_wakeup(up, false);
Govindraj.R62f3ec5f2011-10-13 14:11:09 +05301611 up->wakeups_enabled = false;
1612 }
1613 }
1614
Govindraj.R2fd14962011-11-09 17:41:21 +05301615 up->latency = PM_QOS_CPU_DMA_LAT_DEFAULT_VALUE;
1616 schedule_work(&up->qos_work);
1617
Govindraj.Rfcdca752011-02-28 18:12:23 +05301618 return 0;
1619}
1620
1621static int serial_omap_runtime_resume(struct device *dev)
1622{
Govindraj.R9f9ac1e2011-11-07 18:56:12 +05301623 struct uart_omap_port *up = dev_get_drvdata(dev);
1624
Shubhrajyoti D39aee512012-10-03 17:24:36 +05301625 int loss_cnt = serial_omap_get_context_loss_count(up);
Govindraj.Rec3bebc2011-10-11 19:11:27 +05301626
Shubhrajyoti D39aee512012-10-03 17:24:36 +05301627 if (loss_cnt < 0) {
1628 dev_err(dev, "serial_omap_get_context_loss_count failed : %d\n",
1629 loss_cnt);
Sourav Poddarac57e7f2012-09-18 17:05:54 +05301630 serial_omap_restore_context(up);
Shubhrajyoti D39aee512012-10-03 17:24:36 +05301631 } else if (up->context_loss_cnt != loss_cnt) {
1632 serial_omap_restore_context(up);
1633 }
Sourav Poddarac57e7f2012-09-18 17:05:54 +05301634 up->latency = up->calc_latency;
1635 schedule_work(&up->qos_work);
Govindraj.R9f9ac1e2011-11-07 18:56:12 +05301636
Govindraj.Rfcdca752011-02-28 18:12:23 +05301637 return 0;
1638}
1639#endif
1640
1641static const struct dev_pm_ops serial_omap_dev_pm_ops = {
1642 SET_SYSTEM_SLEEP_PM_OPS(serial_omap_suspend, serial_omap_resume)
1643 SET_RUNTIME_PM_OPS(serial_omap_runtime_suspend,
1644 serial_omap_runtime_resume, NULL)
1645};
1646
Rajendra Nayakd92b0df2011-12-14 17:25:45 +05301647#if defined(CONFIG_OF)
1648static const struct of_device_id omap_serial_of_match[] = {
1649 { .compatible = "ti,omap2-uart" },
1650 { .compatible = "ti,omap3-uart" },
1651 { .compatible = "ti,omap4-uart" },
1652 {},
1653};
1654MODULE_DEVICE_TABLE(of, omap_serial_of_match);
1655#endif
1656
Govindraj.Rb6126332010-09-27 20:20:49 +05301657static struct platform_driver serial_omap_driver = {
1658 .probe = serial_omap_probe,
Bill Pemberton2d47b712012-11-19 13:21:34 -05001659 .remove = serial_omap_remove,
Govindraj.Rb6126332010-09-27 20:20:49 +05301660 .driver = {
1661 .name = DRIVER_NAME,
Govindraj.Rfcdca752011-02-28 18:12:23 +05301662 .pm = &serial_omap_dev_pm_ops,
Rajendra Nayakd92b0df2011-12-14 17:25:45 +05301663 .of_match_table = of_match_ptr(omap_serial_of_match),
Govindraj.Rb6126332010-09-27 20:20:49 +05301664 },
1665};
1666
1667static int __init serial_omap_init(void)
1668{
1669 int ret;
1670
1671 ret = uart_register_driver(&serial_omap_reg);
1672 if (ret != 0)
1673 return ret;
1674 ret = platform_driver_register(&serial_omap_driver);
1675 if (ret != 0)
1676 uart_unregister_driver(&serial_omap_reg);
1677 return ret;
1678}
1679
1680static void __exit serial_omap_exit(void)
1681{
1682 platform_driver_unregister(&serial_omap_driver);
1683 uart_unregister_driver(&serial_omap_reg);
1684}
1685
1686module_init(serial_omap_init);
1687module_exit(serial_omap_exit);
1688
1689MODULE_DESCRIPTION("OMAP High Speed UART driver");
1690MODULE_LICENSE("GPL");
1691MODULE_AUTHOR("Texas Instruments Inc");