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Eli Cohend29b7962014-10-02 12:19:43 +03001/*
Saeed Mahameede2816822015-05-28 22:28:40 +03002 * Copyright (c) 2013-2015, Mellanox Technologies, Ltd. All rights reserved.
Eli Cohend29b7962014-10-02 12:19:43 +03003 *
4 * This software is available to you under a choice of one of two
5 * licenses. You may choose to be licensed under the terms of the GNU
6 * General Public License (GPL) Version 2, available from the file
7 * COPYING in the main directory of this source tree, or the
8 * OpenIB.org BSD license below:
9 *
10 * Redistribution and use in source and binary forms, with or
11 * without modification, are permitted provided that the following
12 * conditions are met:
13 *
14 * - Redistributions of source code must retain the above
15 * copyright notice, this list of conditions and the following
16 * disclaimer.
17 *
18 * - Redistributions in binary form must reproduce the above
19 * copyright notice, this list of conditions and the following
20 * disclaimer in the documentation and/or other materials
21 * provided with the distribution.
22 *
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
30 * SOFTWARE.
Saeed Mahameede2816822015-05-28 22:28:40 +030031*/
Eli Cohend29b7962014-10-02 12:19:43 +030032#ifndef MLX5_IFC_H
33#define MLX5_IFC_H
34
Ilan Tayarie29341f2017-03-13 20:05:45 +020035#include "mlx5_ifc_fpga.h"
36
Eli Cohend29b7962014-10-02 12:19:43 +030037enum {
Saeed Mahameede2816822015-05-28 22:28:40 +030038 MLX5_EVENT_TYPE_CODING_COMPLETION_EVENTS = 0x0,
39 MLX5_EVENT_TYPE_CODING_PATH_MIGRATED_SUCCEEDED = 0x1,
40 MLX5_EVENT_TYPE_CODING_COMMUNICATION_ESTABLISHED = 0x2,
41 MLX5_EVENT_TYPE_CODING_SEND_QUEUE_DRAINED = 0x3,
42 MLX5_EVENT_TYPE_CODING_LAST_WQE_REACHED = 0x13,
43 MLX5_EVENT_TYPE_CODING_SRQ_LIMIT = 0x14,
44 MLX5_EVENT_TYPE_CODING_DCT_ALL_CONNECTIONS_CLOSED = 0x1c,
45 MLX5_EVENT_TYPE_CODING_DCT_ACCESS_KEY_VIOLATION = 0x1d,
46 MLX5_EVENT_TYPE_CODING_CQ_ERROR = 0x4,
47 MLX5_EVENT_TYPE_CODING_LOCAL_WQ_CATASTROPHIC_ERROR = 0x5,
48 MLX5_EVENT_TYPE_CODING_PATH_MIGRATION_FAILED = 0x7,
49 MLX5_EVENT_TYPE_CODING_PAGE_FAULT_EVENT = 0xc,
50 MLX5_EVENT_TYPE_CODING_INVALID_REQUEST_LOCAL_WQ_ERROR = 0x10,
51 MLX5_EVENT_TYPE_CODING_LOCAL_ACCESS_VIOLATION_WQ_ERROR = 0x11,
52 MLX5_EVENT_TYPE_CODING_LOCAL_SRQ_CATASTROPHIC_ERROR = 0x12,
53 MLX5_EVENT_TYPE_CODING_INTERNAL_ERROR = 0x8,
54 MLX5_EVENT_TYPE_CODING_PORT_STATE_CHANGE = 0x9,
55 MLX5_EVENT_TYPE_CODING_GPIO_EVENT = 0x15,
56 MLX5_EVENT_TYPE_CODING_REMOTE_CONFIGURATION_PROTOCOL_EVENT = 0x19,
57 MLX5_EVENT_TYPE_CODING_DOORBELL_BLUEFLAME_CONGESTION_EVENT = 0x1a,
58 MLX5_EVENT_TYPE_CODING_STALL_VL_EVENT = 0x1b,
59 MLX5_EVENT_TYPE_CODING_DROPPED_PACKET_LOGGED_EVENT = 0x1f,
60 MLX5_EVENT_TYPE_CODING_COMMAND_INTERFACE_COMPLETION = 0xa,
Ilan Tayarie29341f2017-03-13 20:05:45 +020061 MLX5_EVENT_TYPE_CODING_PAGE_REQUEST = 0xb,
62 MLX5_EVENT_TYPE_CODING_FPGA_ERROR = 0x20,
Saeed Mahameede2816822015-05-28 22:28:40 +030063};
64
65enum {
66 MLX5_MODIFY_TIR_BITMASK_LRO = 0x0,
67 MLX5_MODIFY_TIR_BITMASK_INDIRECT_TABLE = 0x1,
68 MLX5_MODIFY_TIR_BITMASK_HASH = 0x2,
69 MLX5_MODIFY_TIR_BITMASK_TUNNELED_OFFLOAD_EN = 0x3
70};
71
72enum {
Eran Ben Elishaf91e6d82015-12-14 16:34:09 +020073 MLX5_SET_HCA_CAP_OP_MOD_GENERAL_DEVICE = 0x0,
74 MLX5_SET_HCA_CAP_OP_MOD_ATOMIC = 0x3,
75};
76
77enum {
Eli Cohend29b7962014-10-02 12:19:43 +030078 MLX5_CMD_OP_QUERY_HCA_CAP = 0x100,
79 MLX5_CMD_OP_QUERY_ADAPTER = 0x101,
80 MLX5_CMD_OP_INIT_HCA = 0x102,
81 MLX5_CMD_OP_TEARDOWN_HCA = 0x103,
82 MLX5_CMD_OP_ENABLE_HCA = 0x104,
83 MLX5_CMD_OP_DISABLE_HCA = 0x105,
84 MLX5_CMD_OP_QUERY_PAGES = 0x107,
85 MLX5_CMD_OP_MANAGE_PAGES = 0x108,
86 MLX5_CMD_OP_SET_HCA_CAP = 0x109,
Saeed Mahameede2816822015-05-28 22:28:40 +030087 MLX5_CMD_OP_QUERY_ISSI = 0x10a,
88 MLX5_CMD_OP_SET_ISSI = 0x10b,
Saeed Mahameed0dbc6fe2016-11-17 13:45:59 +020089 MLX5_CMD_OP_SET_DRIVER_VERSION = 0x10d,
Eli Cohend29b7962014-10-02 12:19:43 +030090 MLX5_CMD_OP_CREATE_MKEY = 0x200,
91 MLX5_CMD_OP_QUERY_MKEY = 0x201,
92 MLX5_CMD_OP_DESTROY_MKEY = 0x202,
93 MLX5_CMD_OP_QUERY_SPECIAL_CONTEXTS = 0x203,
94 MLX5_CMD_OP_PAGE_FAULT_RESUME = 0x204,
95 MLX5_CMD_OP_CREATE_EQ = 0x301,
96 MLX5_CMD_OP_DESTROY_EQ = 0x302,
97 MLX5_CMD_OP_QUERY_EQ = 0x303,
98 MLX5_CMD_OP_GEN_EQE = 0x304,
99 MLX5_CMD_OP_CREATE_CQ = 0x400,
100 MLX5_CMD_OP_DESTROY_CQ = 0x401,
101 MLX5_CMD_OP_QUERY_CQ = 0x402,
102 MLX5_CMD_OP_MODIFY_CQ = 0x403,
103 MLX5_CMD_OP_CREATE_QP = 0x500,
104 MLX5_CMD_OP_DESTROY_QP = 0x501,
105 MLX5_CMD_OP_RST2INIT_QP = 0x502,
106 MLX5_CMD_OP_INIT2RTR_QP = 0x503,
107 MLX5_CMD_OP_RTR2RTS_QP = 0x504,
108 MLX5_CMD_OP_RTS2RTS_QP = 0x505,
109 MLX5_CMD_OP_SQERR2RTS_QP = 0x506,
110 MLX5_CMD_OP_2ERR_QP = 0x507,
111 MLX5_CMD_OP_2RST_QP = 0x50a,
112 MLX5_CMD_OP_QUERY_QP = 0x50b,
Saeed Mahameede2816822015-05-28 22:28:40 +0300113 MLX5_CMD_OP_SQD_RTS_QP = 0x50c,
Eli Cohend29b7962014-10-02 12:19:43 +0300114 MLX5_CMD_OP_INIT2INIT_QP = 0x50e,
115 MLX5_CMD_OP_CREATE_PSV = 0x600,
116 MLX5_CMD_OP_DESTROY_PSV = 0x601,
117 MLX5_CMD_OP_CREATE_SRQ = 0x700,
118 MLX5_CMD_OP_DESTROY_SRQ = 0x701,
119 MLX5_CMD_OP_QUERY_SRQ = 0x702,
120 MLX5_CMD_OP_ARM_RQ = 0x703,
Saeed Mahameede2816822015-05-28 22:28:40 +0300121 MLX5_CMD_OP_CREATE_XRC_SRQ = 0x705,
122 MLX5_CMD_OP_DESTROY_XRC_SRQ = 0x706,
123 MLX5_CMD_OP_QUERY_XRC_SRQ = 0x707,
124 MLX5_CMD_OP_ARM_XRC_SRQ = 0x708,
Eli Cohend29b7962014-10-02 12:19:43 +0300125 MLX5_CMD_OP_CREATE_DCT = 0x710,
126 MLX5_CMD_OP_DESTROY_DCT = 0x711,
127 MLX5_CMD_OP_DRAIN_DCT = 0x712,
128 MLX5_CMD_OP_QUERY_DCT = 0x713,
129 MLX5_CMD_OP_ARM_DCT_FOR_KEY_VIOLATION = 0x714,
Saeed Mahameed74862162016-06-09 15:11:34 +0300130 MLX5_CMD_OP_CREATE_XRQ = 0x717,
131 MLX5_CMD_OP_DESTROY_XRQ = 0x718,
132 MLX5_CMD_OP_QUERY_XRQ = 0x719,
133 MLX5_CMD_OP_ARM_XRQ = 0x71a,
Eli Cohend29b7962014-10-02 12:19:43 +0300134 MLX5_CMD_OP_QUERY_VPORT_STATE = 0x750,
135 MLX5_CMD_OP_MODIFY_VPORT_STATE = 0x751,
136 MLX5_CMD_OP_QUERY_ESW_VPORT_CONTEXT = 0x752,
137 MLX5_CMD_OP_MODIFY_ESW_VPORT_CONTEXT = 0x753,
138 MLX5_CMD_OP_QUERY_NIC_VPORT_CONTEXT = 0x754,
139 MLX5_CMD_OP_MODIFY_NIC_VPORT_CONTEXT = 0x755,
Saeed Mahameede2816822015-05-28 22:28:40 +0300140 MLX5_CMD_OP_QUERY_ROCE_ADDRESS = 0x760,
Eli Cohend29b7962014-10-02 12:19:43 +0300141 MLX5_CMD_OP_SET_ROCE_ADDRESS = 0x761,
Saeed Mahameede2816822015-05-28 22:28:40 +0300142 MLX5_CMD_OP_QUERY_HCA_VPORT_CONTEXT = 0x762,
143 MLX5_CMD_OP_MODIFY_HCA_VPORT_CONTEXT = 0x763,
144 MLX5_CMD_OP_QUERY_HCA_VPORT_GID = 0x764,
145 MLX5_CMD_OP_QUERY_HCA_VPORT_PKEY = 0x765,
Eli Cohend29b7962014-10-02 12:19:43 +0300146 MLX5_CMD_OP_QUERY_VPORT_COUNTER = 0x770,
147 MLX5_CMD_OP_ALLOC_Q_COUNTER = 0x771,
148 MLX5_CMD_OP_DEALLOC_Q_COUNTER = 0x772,
149 MLX5_CMD_OP_QUERY_Q_COUNTER = 0x773,
Eran Ben Elisha37e92a92017-11-13 10:11:27 +0200150 MLX5_CMD_OP_SET_PP_RATE_LIMIT = 0x780,
Saeed Mahameed74862162016-06-09 15:11:34 +0300151 MLX5_CMD_OP_QUERY_RATE_LIMIT = 0x781,
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +0300152 MLX5_CMD_OP_CREATE_SCHEDULING_ELEMENT = 0x782,
153 MLX5_CMD_OP_DESTROY_SCHEDULING_ELEMENT = 0x783,
154 MLX5_CMD_OP_QUERY_SCHEDULING_ELEMENT = 0x784,
155 MLX5_CMD_OP_MODIFY_SCHEDULING_ELEMENT = 0x785,
156 MLX5_CMD_OP_CREATE_QOS_PARA_VPORT = 0x786,
157 MLX5_CMD_OP_DESTROY_QOS_PARA_VPORT = 0x787,
Eli Cohend29b7962014-10-02 12:19:43 +0300158 MLX5_CMD_OP_ALLOC_PD = 0x800,
159 MLX5_CMD_OP_DEALLOC_PD = 0x801,
160 MLX5_CMD_OP_ALLOC_UAR = 0x802,
161 MLX5_CMD_OP_DEALLOC_UAR = 0x803,
162 MLX5_CMD_OP_CONFIG_INT_MODERATION = 0x804,
163 MLX5_CMD_OP_ACCESS_REG = 0x805,
164 MLX5_CMD_OP_ATTACH_TO_MCG = 0x806,
Saeed Mahameed20bb5662016-07-17 02:01:45 +0300165 MLX5_CMD_OP_DETACH_FROM_MCG = 0x807,
Eli Cohend29b7962014-10-02 12:19:43 +0300166 MLX5_CMD_OP_GET_DROPPED_PACKET_LOG = 0x80a,
167 MLX5_CMD_OP_MAD_IFC = 0x50d,
168 MLX5_CMD_OP_QUERY_MAD_DEMUX = 0x80b,
169 MLX5_CMD_OP_SET_MAD_DEMUX = 0x80c,
170 MLX5_CMD_OP_NOP = 0x80d,
171 MLX5_CMD_OP_ALLOC_XRCD = 0x80e,
172 MLX5_CMD_OP_DEALLOC_XRCD = 0x80f,
Saeed Mahameede2816822015-05-28 22:28:40 +0300173 MLX5_CMD_OP_ALLOC_TRANSPORT_DOMAIN = 0x816,
174 MLX5_CMD_OP_DEALLOC_TRANSPORT_DOMAIN = 0x817,
175 MLX5_CMD_OP_QUERY_CONG_STATUS = 0x822,
176 MLX5_CMD_OP_MODIFY_CONG_STATUS = 0x823,
177 MLX5_CMD_OP_QUERY_CONG_PARAMS = 0x824,
178 MLX5_CMD_OP_MODIFY_CONG_PARAMS = 0x825,
179 MLX5_CMD_OP_QUERY_CONG_STATISTICS = 0x826,
180 MLX5_CMD_OP_ADD_VXLAN_UDP_DPORT = 0x827,
181 MLX5_CMD_OP_DELETE_VXLAN_UDP_DPORT = 0x828,
182 MLX5_CMD_OP_SET_L2_TABLE_ENTRY = 0x829,
183 MLX5_CMD_OP_QUERY_L2_TABLE_ENTRY = 0x82a,
184 MLX5_CMD_OP_DELETE_L2_TABLE_ENTRY = 0x82b,
Tariq Toukan928cfe82016-02-22 18:17:29 +0200185 MLX5_CMD_OP_SET_WOL_ROL = 0x830,
186 MLX5_CMD_OP_QUERY_WOL_ROL = 0x831,
Aviv Heller84df61e2016-05-10 13:47:50 +0300187 MLX5_CMD_OP_CREATE_LAG = 0x840,
188 MLX5_CMD_OP_MODIFY_LAG = 0x841,
189 MLX5_CMD_OP_QUERY_LAG = 0x842,
190 MLX5_CMD_OP_DESTROY_LAG = 0x843,
191 MLX5_CMD_OP_CREATE_VPORT_LAG = 0x844,
192 MLX5_CMD_OP_DESTROY_VPORT_LAG = 0x845,
Eli Cohend29b7962014-10-02 12:19:43 +0300193 MLX5_CMD_OP_CREATE_TIR = 0x900,
194 MLX5_CMD_OP_MODIFY_TIR = 0x901,
195 MLX5_CMD_OP_DESTROY_TIR = 0x902,
196 MLX5_CMD_OP_QUERY_TIR = 0x903,
Eli Cohend29b7962014-10-02 12:19:43 +0300197 MLX5_CMD_OP_CREATE_SQ = 0x904,
198 MLX5_CMD_OP_MODIFY_SQ = 0x905,
199 MLX5_CMD_OP_DESTROY_SQ = 0x906,
200 MLX5_CMD_OP_QUERY_SQ = 0x907,
201 MLX5_CMD_OP_CREATE_RQ = 0x908,
202 MLX5_CMD_OP_MODIFY_RQ = 0x909,
Maor Gottliebc1e0bfc2017-05-30 10:29:11 +0300203 MLX5_CMD_OP_SET_DELAY_DROP_PARAMS = 0x910,
Eli Cohend29b7962014-10-02 12:19:43 +0300204 MLX5_CMD_OP_DESTROY_RQ = 0x90a,
205 MLX5_CMD_OP_QUERY_RQ = 0x90b,
206 MLX5_CMD_OP_CREATE_RMP = 0x90c,
207 MLX5_CMD_OP_MODIFY_RMP = 0x90d,
208 MLX5_CMD_OP_DESTROY_RMP = 0x90e,
209 MLX5_CMD_OP_QUERY_RMP = 0x90f,
Saeed Mahameede2816822015-05-28 22:28:40 +0300210 MLX5_CMD_OP_CREATE_TIS = 0x912,
211 MLX5_CMD_OP_MODIFY_TIS = 0x913,
212 MLX5_CMD_OP_DESTROY_TIS = 0x914,
213 MLX5_CMD_OP_QUERY_TIS = 0x915,
214 MLX5_CMD_OP_CREATE_RQT = 0x916,
215 MLX5_CMD_OP_MODIFY_RQT = 0x917,
216 MLX5_CMD_OP_DESTROY_RQT = 0x918,
217 MLX5_CMD_OP_QUERY_RQT = 0x919,
Maor Gottlieb2cc43b42016-01-11 10:25:59 +0200218 MLX5_CMD_OP_SET_FLOW_TABLE_ROOT = 0x92f,
Saeed Mahameede2816822015-05-28 22:28:40 +0300219 MLX5_CMD_OP_CREATE_FLOW_TABLE = 0x930,
220 MLX5_CMD_OP_DESTROY_FLOW_TABLE = 0x931,
221 MLX5_CMD_OP_QUERY_FLOW_TABLE = 0x932,
222 MLX5_CMD_OP_CREATE_FLOW_GROUP = 0x933,
223 MLX5_CMD_OP_DESTROY_FLOW_GROUP = 0x934,
224 MLX5_CMD_OP_QUERY_FLOW_GROUP = 0x935,
225 MLX5_CMD_OP_SET_FLOW_TABLE_ENTRY = 0x936,
226 MLX5_CMD_OP_QUERY_FLOW_TABLE_ENTRY = 0x937,
Maor Gottlieb34a40e62016-01-11 10:26:00 +0200227 MLX5_CMD_OP_DELETE_FLOW_TABLE_ENTRY = 0x938,
Amir Vadai9dc0b282016-05-13 12:55:39 +0000228 MLX5_CMD_OP_ALLOC_FLOW_COUNTER = 0x939,
229 MLX5_CMD_OP_DEALLOC_FLOW_COUNTER = 0x93a,
230 MLX5_CMD_OP_QUERY_FLOW_COUNTER = 0x93b,
Shahar Klein86d56a12016-06-10 00:07:30 +0300231 MLX5_CMD_OP_MODIFY_FLOW_TABLE = 0x93c,
Hadar Hen Zion7adbde22016-08-03 15:08:33 +0300232 MLX5_CMD_OP_ALLOC_ENCAP_HEADER = 0x93d,
233 MLX5_CMD_OP_DEALLOC_ENCAP_HEADER = 0x93e,
Or Gerlitz2a69cb92017-01-19 19:31:25 +0200234 MLX5_CMD_OP_ALLOC_MODIFY_HEADER_CONTEXT = 0x940,
235 MLX5_CMD_OP_DEALLOC_MODIFY_HEADER_CONTEXT = 0x941,
Ilan Tayari60621182017-03-27 14:52:09 +0300236 MLX5_CMD_OP_FPGA_CREATE_QP = 0x960,
237 MLX5_CMD_OP_FPGA_MODIFY_QP = 0x961,
238 MLX5_CMD_OP_FPGA_QUERY_QP = 0x962,
239 MLX5_CMD_OP_FPGA_DESTROY_QP = 0x963,
240 MLX5_CMD_OP_FPGA_QUERY_QP_COUNTERS = 0x964,
Shahar Klein86d56a12016-06-10 00:07:30 +0300241 MLX5_CMD_OP_MAX
Saeed Mahameede2816822015-05-28 22:28:40 +0300242};
243
244struct mlx5_ifc_flow_table_fields_supported_bits {
245 u8 outer_dmac[0x1];
246 u8 outer_smac[0x1];
247 u8 outer_ether_type[0x1];
Ariel Levkovich19cc7522017-04-03 13:11:03 +0300248 u8 outer_ip_version[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300249 u8 outer_first_prio[0x1];
250 u8 outer_first_cfi[0x1];
251 u8 outer_first_vid[0x1];
Or Gerlitza8ade552017-06-07 17:49:56 +0300252 u8 outer_ipv4_ttl[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300253 u8 outer_second_prio[0x1];
254 u8 outer_second_cfi[0x1];
255 u8 outer_second_vid[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200256 u8 reserved_at_b[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300257 u8 outer_sip[0x1];
258 u8 outer_dip[0x1];
259 u8 outer_frag[0x1];
260 u8 outer_ip_protocol[0x1];
261 u8 outer_ip_ecn[0x1];
262 u8 outer_ip_dscp[0x1];
263 u8 outer_udp_sport[0x1];
264 u8 outer_udp_dport[0x1];
265 u8 outer_tcp_sport[0x1];
266 u8 outer_tcp_dport[0x1];
267 u8 outer_tcp_flags[0x1];
268 u8 outer_gre_protocol[0x1];
269 u8 outer_gre_key[0x1];
270 u8 outer_vxlan_vni[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200271 u8 reserved_at_1a[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +0300272 u8 source_eswitch_port[0x1];
273
274 u8 inner_dmac[0x1];
275 u8 inner_smac[0x1];
276 u8 inner_ether_type[0x1];
Ariel Levkovich19cc7522017-04-03 13:11:03 +0300277 u8 inner_ip_version[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300278 u8 inner_first_prio[0x1];
279 u8 inner_first_cfi[0x1];
280 u8 inner_first_vid[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200281 u8 reserved_at_27[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300282 u8 inner_second_prio[0x1];
283 u8 inner_second_cfi[0x1];
284 u8 inner_second_vid[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200285 u8 reserved_at_2b[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300286 u8 inner_sip[0x1];
287 u8 inner_dip[0x1];
288 u8 inner_frag[0x1];
289 u8 inner_ip_protocol[0x1];
290 u8 inner_ip_ecn[0x1];
291 u8 inner_ip_dscp[0x1];
292 u8 inner_udp_sport[0x1];
293 u8 inner_udp_dport[0x1];
294 u8 inner_tcp_sport[0x1];
295 u8 inner_tcp_dport[0x1];
296 u8 inner_tcp_flags[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200297 u8 reserved_at_37[0x9];
Boris Pismenny3346c482017-08-20 15:13:08 +0300298 u8 reserved_at_40[0x17];
299 u8 outer_esp_spi[0x1];
300 u8 reserved_at_58[0x2];
Yishai Hadasa550ddf2017-08-17 15:52:33 +0300301 u8 bth_dst_qp[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300302
Yishai Hadasa550ddf2017-08-17 15:52:33 +0300303 u8 reserved_at_5b[0x25];
Saeed Mahameede2816822015-05-28 22:28:40 +0300304};
305
306struct mlx5_ifc_flow_table_prop_layout_bits {
307 u8 ft_support[0x1];
Amir Vadai9dc0b282016-05-13 12:55:39 +0000308 u8 reserved_at_1[0x1];
309 u8 flow_counter[0x1];
Maor Gottlieb26a81452015-12-10 17:12:39 +0200310 u8 flow_modify_en[0x1];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +0200311 u8 modify_root[0x1];
Maor Gottlieb34a40e62016-01-11 10:26:00 +0200312 u8 identified_miss_table_mode[0x1];
313 u8 flow_table_modify[0x1];
Hadar Hen Zion7adbde22016-08-03 15:08:33 +0300314 u8 encap[0x1];
315 u8 decap[0x1];
316 u8 reserved_at_9[0x17];
Saeed Mahameede2816822015-05-28 22:28:40 +0300317
Matan Barakb4ff3a32016-02-09 14:57:42 +0200318 u8 reserved_at_20[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +0300319 u8 log_max_ft_size[0x6];
Or Gerlitz2a69cb92017-01-19 19:31:25 +0200320 u8 log_max_modify_header_context[0x8];
321 u8 max_modify_header_actions[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +0300322 u8 max_ft_level[0x8];
323
Matan Barakb4ff3a32016-02-09 14:57:42 +0200324 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +0300325
Matan Barakb4ff3a32016-02-09 14:57:42 +0200326 u8 reserved_at_60[0x18];
Maor Gottlieb26a81452015-12-10 17:12:39 +0200327 u8 log_max_ft_num[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +0300328
Matan Barakb4ff3a32016-02-09 14:57:42 +0200329 u8 reserved_at_80[0x18];
Maor Gottlieb26a81452015-12-10 17:12:39 +0200330 u8 log_max_destination[0x8];
331
Raed Salem16f1c5b2017-07-30 11:02:51 +0300332 u8 log_max_flow_counter[0x8];
333 u8 reserved_at_a8[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +0300334 u8 log_max_flow[0x8];
335
Matan Barakb4ff3a32016-02-09 14:57:42 +0200336 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +0300337
338 struct mlx5_ifc_flow_table_fields_supported_bits ft_field_support;
339
340 struct mlx5_ifc_flow_table_fields_supported_bits ft_field_bitmask_support;
341};
342
343struct mlx5_ifc_odp_per_transport_service_cap_bits {
344 u8 send[0x1];
345 u8 receive[0x1];
346 u8 write[0x1];
347 u8 read[0x1];
Artemy Kovalyov17d2f882017-01-02 11:37:47 +0200348 u8 atomic[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300349 u8 srq_receive[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200350 u8 reserved_at_6[0x1a];
Saeed Mahameede2816822015-05-28 22:28:40 +0300351};
352
Maor Gottliebb4d1f032016-01-11 10:26:05 +0200353struct mlx5_ifc_ipv4_layout_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +0200354 u8 reserved_at_0[0x60];
Maor Gottliebb4d1f032016-01-11 10:26:05 +0200355
356 u8 ipv4[0x20];
357};
358
359struct mlx5_ifc_ipv6_layout_bits {
360 u8 ipv6[16][0x8];
361};
362
363union mlx5_ifc_ipv6_layout_ipv4_layout_auto_bits {
364 struct mlx5_ifc_ipv6_layout_bits ipv6_layout;
365 struct mlx5_ifc_ipv4_layout_bits ipv4_layout;
Matan Barakb4ff3a32016-02-09 14:57:42 +0200366 u8 reserved_at_0[0x80];
Maor Gottliebb4d1f032016-01-11 10:26:05 +0200367};
368
Saeed Mahameede2816822015-05-28 22:28:40 +0300369struct mlx5_ifc_fte_match_set_lyr_2_4_bits {
370 u8 smac_47_16[0x20];
371
372 u8 smac_15_0[0x10];
373 u8 ethertype[0x10];
374
375 u8 dmac_47_16[0x20];
376
377 u8 dmac_15_0[0x10];
378 u8 first_prio[0x3];
379 u8 first_cfi[0x1];
380 u8 first_vid[0xc];
381
382 u8 ip_protocol[0x8];
383 u8 ip_dscp[0x6];
384 u8 ip_ecn[0x2];
Mohamad Haj Yahia10543362016-10-09 16:25:43 +0300385 u8 cvlan_tag[0x1];
386 u8 svlan_tag[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300387 u8 frag[0x1];
Ariel Levkovich19cc7522017-04-03 13:11:03 +0300388 u8 ip_version[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +0300389 u8 tcp_flags[0x9];
390
391 u8 tcp_sport[0x10];
392 u8 tcp_dport[0x10];
393
Or Gerlitza8ade552017-06-07 17:49:56 +0300394 u8 reserved_at_c0[0x18];
395 u8 ttl_hoplimit[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +0300396
397 u8 udp_sport[0x10];
398 u8 udp_dport[0x10];
399
Maor Gottliebb4d1f032016-01-11 10:26:05 +0200400 union mlx5_ifc_ipv6_layout_ipv4_layout_auto_bits src_ipv4_src_ipv6;
Saeed Mahameede2816822015-05-28 22:28:40 +0300401
Maor Gottliebb4d1f032016-01-11 10:26:05 +0200402 union mlx5_ifc_ipv6_layout_ipv4_layout_auto_bits dst_ipv4_dst_ipv6;
Saeed Mahameede2816822015-05-28 22:28:40 +0300403};
404
405struct mlx5_ifc_fte_match_set_misc_bits {
Saeed Mahameed74862162016-06-09 15:11:34 +0300406 u8 reserved_at_0[0x8];
407 u8 source_sqn[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +0300408
Matan Barakb4ff3a32016-02-09 14:57:42 +0200409 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +0300410 u8 source_port[0x10];
411
412 u8 outer_second_prio[0x3];
413 u8 outer_second_cfi[0x1];
414 u8 outer_second_vid[0xc];
415 u8 inner_second_prio[0x3];
416 u8 inner_second_cfi[0x1];
417 u8 inner_second_vid[0xc];
418
Mohamad Haj Yahia10543362016-10-09 16:25:43 +0300419 u8 outer_second_cvlan_tag[0x1];
420 u8 inner_second_cvlan_tag[0x1];
421 u8 outer_second_svlan_tag[0x1];
422 u8 inner_second_svlan_tag[0x1];
423 u8 reserved_at_64[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +0300424 u8 gre_protocol[0x10];
425
426 u8 gre_key_h[0x18];
427 u8 gre_key_l[0x8];
428
429 u8 vxlan_vni[0x18];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200430 u8 reserved_at_b8[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +0300431
Matan Barakb4ff3a32016-02-09 14:57:42 +0200432 u8 reserved_at_c0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +0300433
Matan Barakb4ff3a32016-02-09 14:57:42 +0200434 u8 reserved_at_e0[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +0300435 u8 outer_ipv6_flow_label[0x14];
436
Matan Barakb4ff3a32016-02-09 14:57:42 +0200437 u8 reserved_at_100[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +0300438 u8 inner_ipv6_flow_label[0x14];
439
Yishai Hadasa550ddf2017-08-17 15:52:33 +0300440 u8 reserved_at_120[0x28];
441 u8 bth_dst_qp[0x18];
Boris Pismenny3346c482017-08-20 15:13:08 +0300442 u8 reserved_at_160[0x20];
443 u8 outer_esp_spi[0x20];
444 u8 reserved_at_1a0[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +0300445};
446
447struct mlx5_ifc_cmd_pas_bits {
448 u8 pa_h[0x20];
449
450 u8 pa_l[0x14];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200451 u8 reserved_at_34[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +0300452};
453
454struct mlx5_ifc_uint64_bits {
455 u8 hi[0x20];
456
457 u8 lo[0x20];
458};
459
460enum {
461 MLX5_ADS_STAT_RATE_NO_LIMIT = 0x0,
462 MLX5_ADS_STAT_RATE_2_5GBPS = 0x7,
463 MLX5_ADS_STAT_RATE_10GBPS = 0x8,
464 MLX5_ADS_STAT_RATE_30GBPS = 0x9,
465 MLX5_ADS_STAT_RATE_5GBPS = 0xa,
466 MLX5_ADS_STAT_RATE_20GBPS = 0xb,
467 MLX5_ADS_STAT_RATE_40GBPS = 0xc,
468 MLX5_ADS_STAT_RATE_60GBPS = 0xd,
469 MLX5_ADS_STAT_RATE_80GBPS = 0xe,
470 MLX5_ADS_STAT_RATE_120GBPS = 0xf,
471};
472
473struct mlx5_ifc_ads_bits {
474 u8 fl[0x1];
475 u8 free_ar[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200476 u8 reserved_at_2[0xe];
Saeed Mahameede2816822015-05-28 22:28:40 +0300477 u8 pkey_index[0x10];
478
Matan Barakb4ff3a32016-02-09 14:57:42 +0200479 u8 reserved_at_20[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +0300480 u8 grh[0x1];
481 u8 mlid[0x7];
482 u8 rlid[0x10];
483
484 u8 ack_timeout[0x5];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200485 u8 reserved_at_45[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +0300486 u8 src_addr_index[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200487 u8 reserved_at_50[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +0300488 u8 stat_rate[0x4];
489 u8 hop_limit[0x8];
490
Matan Barakb4ff3a32016-02-09 14:57:42 +0200491 u8 reserved_at_60[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +0300492 u8 tclass[0x8];
493 u8 flow_label[0x14];
494
495 u8 rgid_rip[16][0x8];
496
Matan Barakb4ff3a32016-02-09 14:57:42 +0200497 u8 reserved_at_100[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +0300498 u8 f_dscp[0x1];
499 u8 f_ecn[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200500 u8 reserved_at_106[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300501 u8 f_eth_prio[0x1];
502 u8 ecn[0x2];
503 u8 dscp[0x6];
504 u8 udp_sport[0x10];
505
506 u8 dei_cfi[0x1];
507 u8 eth_prio[0x3];
508 u8 sl[0x4];
Daniel Jurgens32f69e42018-01-04 17:25:36 +0200509 u8 vhca_port_num[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +0300510 u8 rmac_47_32[0x10];
511
512 u8 rmac_31_0[0x20];
513};
514
515struct mlx5_ifc_flow_table_nic_cap_bits {
Maor Gottliebb3638e12016-03-07 18:51:46 +0200516 u8 nic_rx_multi_path_tirs[0x1];
Maor Gottliebcea824d2016-05-31 14:09:09 +0300517 u8 nic_rx_multi_path_tirs_fts[0x1];
518 u8 allow_sniffer_and_nic_rx_shared_tir[0x1];
519 u8 reserved_at_3[0x1fd];
Saeed Mahameede2816822015-05-28 22:28:40 +0300520
521 struct mlx5_ifc_flow_table_prop_layout_bits flow_table_properties_nic_receive;
522
Matan Barakb4ff3a32016-02-09 14:57:42 +0200523 u8 reserved_at_400[0x200];
Saeed Mahameede2816822015-05-28 22:28:40 +0300524
525 struct mlx5_ifc_flow_table_prop_layout_bits flow_table_properties_nic_receive_sniffer;
526
527 struct mlx5_ifc_flow_table_prop_layout_bits flow_table_properties_nic_transmit;
528
Matan Barakb4ff3a32016-02-09 14:57:42 +0200529 u8 reserved_at_a00[0x200];
Saeed Mahameede2816822015-05-28 22:28:40 +0300530
531 struct mlx5_ifc_flow_table_prop_layout_bits flow_table_properties_nic_transmit_sniffer;
532
Matan Barakb4ff3a32016-02-09 14:57:42 +0200533 u8 reserved_at_e00[0x7200];
Saeed Mahameede2816822015-05-28 22:28:40 +0300534};
535
Saeed Mahameed495716b2015-12-01 18:03:19 +0200536struct mlx5_ifc_flow_table_eswitch_cap_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +0200537 u8 reserved_at_0[0x200];
Saeed Mahameed495716b2015-12-01 18:03:19 +0200538
539 struct mlx5_ifc_flow_table_prop_layout_bits flow_table_properties_nic_esw_fdb;
540
541 struct mlx5_ifc_flow_table_prop_layout_bits flow_table_properties_esw_acl_ingress;
542
543 struct mlx5_ifc_flow_table_prop_layout_bits flow_table_properties_esw_acl_egress;
544
Matan Barakb4ff3a32016-02-09 14:57:42 +0200545 u8 reserved_at_800[0x7800];
Saeed Mahameed495716b2015-12-01 18:03:19 +0200546};
547
Saeed Mahameedd6666752015-12-01 18:03:22 +0200548struct mlx5_ifc_e_switch_cap_bits {
549 u8 vport_svlan_strip[0x1];
550 u8 vport_cvlan_strip[0x1];
551 u8 vport_svlan_insert[0x1];
552 u8 vport_cvlan_insert_if_not_exist[0x1];
553 u8 vport_cvlan_insert_overwrite[0x1];
Noa Osherovich23898c72016-06-10 00:07:37 +0300554 u8 reserved_at_5[0x19];
555 u8 nic_vport_node_guid_modify[0x1];
556 u8 nic_vport_port_guid_modify[0x1];
Saeed Mahameedd6666752015-12-01 18:03:22 +0200557
Hadar Hen Zion7adbde22016-08-03 15:08:33 +0300558 u8 vxlan_encap_decap[0x1];
559 u8 nvgre_encap_decap[0x1];
560 u8 reserved_at_22[0x9];
561 u8 log_max_encap_headers[0x5];
562 u8 reserved_2b[0x6];
563 u8 max_encap_header_size[0xa];
564
565 u8 reserved_40[0x7c0];
566
Saeed Mahameedd6666752015-12-01 18:03:22 +0200567};
568
Saeed Mahameed74862162016-06-09 15:11:34 +0300569struct mlx5_ifc_qos_cap_bits {
570 u8 packet_pacing[0x1];
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +0300571 u8 esw_scheduling[0x1];
Mohamad Haj Yahiac9497c92016-12-15 14:02:53 +0200572 u8 esw_bw_share[0x1];
573 u8 esw_rate_limit[0x1];
574 u8 reserved_at_4[0x1c];
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +0300575
576 u8 reserved_at_20[0x20];
577
Saeed Mahameed74862162016-06-09 15:11:34 +0300578 u8 packet_pacing_max_rate[0x20];
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +0300579
Saeed Mahameed74862162016-06-09 15:11:34 +0300580 u8 packet_pacing_min_rate[0x20];
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +0300581
582 u8 reserved_at_80[0x10];
Saeed Mahameed74862162016-06-09 15:11:34 +0300583 u8 packet_pacing_rate_table_size[0x10];
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +0300584
585 u8 esw_element_type[0x10];
586 u8 esw_tsar_type[0x10];
587
588 u8 reserved_at_c0[0x10];
589 u8 max_qos_para_vport[0x10];
590
591 u8 max_tsar_bw_share[0x20];
592
593 u8 reserved_at_100[0x700];
Saeed Mahameed74862162016-06-09 15:11:34 +0300594};
595
Saeed Mahameede2816822015-05-28 22:28:40 +0300596struct mlx5_ifc_per_protocol_networking_offload_caps_bits {
597 u8 csum_cap[0x1];
598 u8 vlan_cap[0x1];
599 u8 lro_cap[0x1];
600 u8 lro_psh_flag[0x1];
601 u8 lro_time_stamp[0x1];
Saeed Mahameed2b31f7a2016-11-28 18:04:50 +0200602 u8 reserved_at_5[0x2];
603 u8 wqe_vlan_insert[0x1];
Tariq Toukan66189962015-11-12 19:35:26 +0200604 u8 self_lb_en_modifiable[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200605 u8 reserved_at_9[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +0300606 u8 max_lso_cap[0x5];
Leon Romanovskyc226dc22016-10-31 12:15:20 +0200607 u8 multi_pkt_send_wqe[0x2];
Hadar Hen Zioncff92d72016-07-24 16:12:40 +0300608 u8 wqe_inline_mode[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +0300609 u8 rss_ind_tbl_cap[0x4];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +0300610 u8 reg_umr_sq[0x1];
611 u8 scatter_fcs[0x1];
Bodong Wang050da902017-08-17 15:52:35 +0300612 u8 enhanced_multi_pkt_send_wqe[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300613 u8 tunnel_lso_const_out_ip_id[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200614 u8 reserved_at_1c[0x2];
Gal Pressman27299842017-08-13 13:34:42 +0300615 u8 tunnel_stateless_gre[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300616 u8 tunnel_stateless_vxlan[0x1];
617
Ilan Tayari547eede2017-04-18 16:04:28 +0300618 u8 swp[0x1];
619 u8 swp_csum[0x1];
620 u8 swp_lso[0x1];
Maor Gottlieb4d350f12017-10-19 08:25:54 +0300621 u8 reserved_at_23[0x1b];
622 u8 max_geneve_opt_len[0x1];
623 u8 tunnel_stateless_geneve_rx[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300624
Matan Barakb4ff3a32016-02-09 14:57:42 +0200625 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +0300626 u8 lro_min_mss_size[0x10];
627
Matan Barakb4ff3a32016-02-09 14:57:42 +0200628 u8 reserved_at_60[0x120];
Saeed Mahameede2816822015-05-28 22:28:40 +0300629
630 u8 lro_timer_supported_periods[4][0x20];
631
Matan Barakb4ff3a32016-02-09 14:57:42 +0200632 u8 reserved_at_200[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +0300633};
634
635struct mlx5_ifc_roce_cap_bits {
636 u8 roce_apm[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200637 u8 reserved_at_1[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +0300638
Matan Barakb4ff3a32016-02-09 14:57:42 +0200639 u8 reserved_at_20[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +0300640
Matan Barakb4ff3a32016-02-09 14:57:42 +0200641 u8 reserved_at_80[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +0300642 u8 l3_type[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200643 u8 reserved_at_90[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +0300644 u8 roce_version[0x8];
645
Matan Barakb4ff3a32016-02-09 14:57:42 +0200646 u8 reserved_at_a0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +0300647 u8 r_roce_dest_udp_port[0x10];
648
649 u8 r_roce_max_src_udp_port[0x10];
650 u8 r_roce_min_src_udp_port[0x10];
651
Matan Barakb4ff3a32016-02-09 14:57:42 +0200652 u8 reserved_at_e0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +0300653 u8 roce_address_table_size[0x10];
654
Matan Barakb4ff3a32016-02-09 14:57:42 +0200655 u8 reserved_at_100[0x700];
Saeed Mahameede2816822015-05-28 22:28:40 +0300656};
657
658enum {
659 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_1_BYTE = 0x0,
660 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_2_BYTES = 0x2,
661 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_4_BYTES = 0x4,
662 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_8_BYTES = 0x8,
663 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_16_BYTES = 0x10,
664 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_32_BYTES = 0x20,
665 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_64_BYTES = 0x40,
666 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_128_BYTES = 0x80,
667 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_256_BYTES = 0x100,
668};
669
670enum {
671 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_1_BYTE = 0x1,
672 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_2_BYTES = 0x2,
673 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_4_BYTES = 0x4,
674 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_8_BYTES = 0x8,
675 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_16_BYTES = 0x10,
676 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_32_BYTES = 0x20,
677 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_64_BYTES = 0x40,
678 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_128_BYTES = 0x80,
679 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_256_BYTES = 0x100,
680};
681
682struct mlx5_ifc_atomic_caps_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +0200683 u8 reserved_at_0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +0300684
Or Gerlitzbd108382017-05-28 15:24:17 +0300685 u8 atomic_req_8B_endianness_mode[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200686 u8 reserved_at_42[0x4];
Or Gerlitzbd108382017-05-28 15:24:17 +0300687 u8 supported_atomic_req_8B_endianness_mode_1[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300688
Matan Barakb4ff3a32016-02-09 14:57:42 +0200689 u8 reserved_at_47[0x19];
Saeed Mahameede2816822015-05-28 22:28:40 +0300690
Matan Barakb4ff3a32016-02-09 14:57:42 +0200691 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +0300692
Matan Barakb4ff3a32016-02-09 14:57:42 +0200693 u8 reserved_at_80[0x10];
Eran Ben Elishaf91e6d82015-12-14 16:34:09 +0200694 u8 atomic_operations[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +0300695
Matan Barakb4ff3a32016-02-09 14:57:42 +0200696 u8 reserved_at_a0[0x10];
Eran Ben Elishaf91e6d82015-12-14 16:34:09 +0200697 u8 atomic_size_qp[0x10];
698
Matan Barakb4ff3a32016-02-09 14:57:42 +0200699 u8 reserved_at_c0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +0300700 u8 atomic_size_dc[0x10];
701
Matan Barakb4ff3a32016-02-09 14:57:42 +0200702 u8 reserved_at_e0[0x720];
Saeed Mahameede2816822015-05-28 22:28:40 +0300703};
704
705struct mlx5_ifc_odp_cap_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +0200706 u8 reserved_at_0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +0300707
708 u8 sig[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200709 u8 reserved_at_41[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +0300710
Matan Barakb4ff3a32016-02-09 14:57:42 +0200711 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +0300712
713 struct mlx5_ifc_odp_per_transport_service_cap_bits rc_odp_caps;
714
715 struct mlx5_ifc_odp_per_transport_service_cap_bits uc_odp_caps;
716
717 struct mlx5_ifc_odp_per_transport_service_cap_bits ud_odp_caps;
718
Matan Barakb4ff3a32016-02-09 14:57:42 +0200719 u8 reserved_at_e0[0x720];
Saeed Mahameede2816822015-05-28 22:28:40 +0300720};
721
Sagi Grimberg3f0393a2016-02-23 10:25:23 +0200722struct mlx5_ifc_calc_op {
723 u8 reserved_at_0[0x10];
724 u8 reserved_at_10[0x9];
725 u8 op_swap_endianness[0x1];
726 u8 op_min[0x1];
727 u8 op_xor[0x1];
728 u8 op_or[0x1];
729 u8 op_and[0x1];
730 u8 op_max[0x1];
731 u8 op_add[0x1];
732};
733
734struct mlx5_ifc_vector_calc_cap_bits {
735 u8 calc_matrix[0x1];
736 u8 reserved_at_1[0x1f];
737 u8 reserved_at_20[0x8];
738 u8 max_vec_count[0x8];
739 u8 reserved_at_30[0xd];
740 u8 max_chunk_size[0x3];
741 struct mlx5_ifc_calc_op calc0;
742 struct mlx5_ifc_calc_op calc1;
743 struct mlx5_ifc_calc_op calc2;
744 struct mlx5_ifc_calc_op calc3;
745
746 u8 reserved_at_e0[0x720];
747};
748
Saeed Mahameede2816822015-05-28 22:28:40 +0300749enum {
750 MLX5_WQ_TYPE_LINKED_LIST = 0x0,
751 MLX5_WQ_TYPE_CYCLIC = 0x1,
Saeed Mahameed7d5e1422016-04-11 23:10:22 +0300752 MLX5_WQ_TYPE_LINKED_LIST_STRIDING_RQ = 0x2,
Noa Osherovichccc87082017-10-17 18:01:13 +0300753 MLX5_WQ_TYPE_CYCLIC_STRIDING_RQ = 0x3,
Saeed Mahameede2816822015-05-28 22:28:40 +0300754};
755
756enum {
757 MLX5_WQ_END_PAD_MODE_NONE = 0x0,
758 MLX5_WQ_END_PAD_MODE_ALIGN = 0x1,
759};
760
761enum {
762 MLX5_CMD_HCA_CAP_GID_TABLE_SIZE_8_GID_ENTRIES = 0x0,
763 MLX5_CMD_HCA_CAP_GID_TABLE_SIZE_16_GID_ENTRIES = 0x1,
764 MLX5_CMD_HCA_CAP_GID_TABLE_SIZE_32_GID_ENTRIES = 0x2,
765 MLX5_CMD_HCA_CAP_GID_TABLE_SIZE_64_GID_ENTRIES = 0x3,
766 MLX5_CMD_HCA_CAP_GID_TABLE_SIZE_128_GID_ENTRIES = 0x4,
767};
768
769enum {
770 MLX5_CMD_HCA_CAP_PKEY_TABLE_SIZE_128_ENTRIES = 0x0,
771 MLX5_CMD_HCA_CAP_PKEY_TABLE_SIZE_256_ENTRIES = 0x1,
772 MLX5_CMD_HCA_CAP_PKEY_TABLE_SIZE_512_ENTRIES = 0x2,
773 MLX5_CMD_HCA_CAP_PKEY_TABLE_SIZE_1K_ENTRIES = 0x3,
774 MLX5_CMD_HCA_CAP_PKEY_TABLE_SIZE_2K_ENTRIES = 0x4,
775 MLX5_CMD_HCA_CAP_PKEY_TABLE_SIZE_4K_ENTRIES = 0x5,
776};
777
778enum {
779 MLX5_CMD_HCA_CAP_PORT_TYPE_IB = 0x0,
780 MLX5_CMD_HCA_CAP_PORT_TYPE_ETHERNET = 0x1,
781};
782
783enum {
784 MLX5_CMD_HCA_CAP_CMDIF_CHECKSUM_DISABLED = 0x0,
785 MLX5_CMD_HCA_CAP_CMDIF_CHECKSUM_INITIAL_STATE = 0x1,
786 MLX5_CMD_HCA_CAP_CMDIF_CHECKSUM_ENABLED = 0x3,
787};
788
789enum {
790 MLX5_CAP_PORT_TYPE_IB = 0x0,
791 MLX5_CAP_PORT_TYPE_ETH = 0x1,
Eli Cohend29b7962014-10-02 12:19:43 +0300792};
793
Max Gurtovoy1410a902017-05-28 10:53:10 +0300794enum {
795 MLX5_CAP_UMR_FENCE_STRONG = 0x0,
796 MLX5_CAP_UMR_FENCE_SMALL = 0x1,
797 MLX5_CAP_UMR_FENCE_NONE = 0x2,
798};
799
Eli Cohenb7755162014-10-02 12:19:44 +0300800struct mlx5_ifc_cmd_hca_cap_bits {
Daniel Jurgens32f69e42018-01-04 17:25:36 +0200801 u8 reserved_at_0[0x30];
802 u8 vhca_id[0x10];
803
804 u8 reserved_at_40[0x40];
Eli Cohenb7755162014-10-02 12:19:44 +0300805
806 u8 log_max_srq_sz[0x8];
807 u8 log_max_qp_sz[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200808 u8 reserved_at_90[0xb];
Eli Cohenb7755162014-10-02 12:19:44 +0300809 u8 log_max_qp[0x5];
810
Matan Barakb4ff3a32016-02-09 14:57:42 +0200811 u8 reserved_at_a0[0xb];
Saeed Mahameede2816822015-05-28 22:28:40 +0300812 u8 log_max_srq[0x5];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200813 u8 reserved_at_b0[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +0300814
Matan Barakb4ff3a32016-02-09 14:57:42 +0200815 u8 reserved_at_c0[0x8];
Eli Cohenb7755162014-10-02 12:19:44 +0300816 u8 log_max_cq_sz[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200817 u8 reserved_at_d0[0xb];
Eli Cohenb7755162014-10-02 12:19:44 +0300818 u8 log_max_cq[0x5];
819
820 u8 log_max_eq_sz[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200821 u8 reserved_at_e8[0x2];
Eli Cohenb7755162014-10-02 12:19:44 +0300822 u8 log_max_mkey[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200823 u8 reserved_at_f0[0xc];
Eli Cohenb7755162014-10-02 12:19:44 +0300824 u8 log_max_eq[0x4];
825
826 u8 max_indirection[0x8];
Artemy Kovalyovbcda1ac2017-01-02 11:37:41 +0200827 u8 fixed_buffer_size[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300828 u8 log_max_mrw_sz[0x7];
Majd Dibbiny8812c242017-02-09 14:20:12 +0200829 u8 force_teardown[0x1];
830 u8 reserved_at_111[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300831 u8 log_max_bsf_list_size[0x6];
Artemy Kovalyovbcda1ac2017-01-02 11:37:41 +0200832 u8 umr_extended_translation_offset[0x1];
833 u8 null_mkey[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300834 u8 log_max_klm_list_size[0x6];
835
Matan Barakb4ff3a32016-02-09 14:57:42 +0200836 u8 reserved_at_120[0xa];
Eli Cohenb7755162014-10-02 12:19:44 +0300837 u8 log_max_ra_req_dc[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200838 u8 reserved_at_130[0xa];
Eli Cohenb7755162014-10-02 12:19:44 +0300839 u8 log_max_ra_res_dc[0x6];
840
Matan Barakb4ff3a32016-02-09 14:57:42 +0200841 u8 reserved_at_140[0xa];
Eli Cohenb7755162014-10-02 12:19:44 +0300842 u8 log_max_ra_req_qp[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200843 u8 reserved_at_150[0xa];
Eli Cohenb7755162014-10-02 12:19:44 +0300844 u8 log_max_ra_res_qp[0x6];
845
Daniel Jurgensf32f5bd2015-11-19 17:12:26 +0200846 u8 end_pad[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300847 u8 cc_query_allowed[0x1];
848 u8 cc_modify_allowed[0x1];
Daniel Jurgensf32f5bd2015-11-19 17:12:26 +0200849 u8 start_pad[0x1];
850 u8 cache_line_128byte[0x1];
Huy Nguyenc02762e2017-07-18 16:03:17 -0500851 u8 reserved_at_165[0xa];
852 u8 qcam_reg[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300853 u8 gid_table_size[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +0300854
Saeed Mahameede2816822015-05-28 22:28:40 +0300855 u8 out_of_seq_cnt[0x1];
856 u8 vport_counters[0x1];
Saeed Mahameed74862162016-06-09 15:11:34 +0300857 u8 retransmission_q_counters[0x1];
Alex Vesker83b502a2016-08-04 17:32:02 +0300858 u8 reserved_at_183[0x1];
859 u8 modify_rq_counter_set_id[0x1];
Maor Gottliebc1e0bfc2017-05-30 10:29:11 +0300860 u8 rq_delay_drop[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300861 u8 max_qp_cnt[0xa];
862 u8 pkey_table_size[0x10];
863
Saeed Mahameede2816822015-05-28 22:28:40 +0300864 u8 vport_group_manager[0x1];
865 u8 vhca_group_manager[0x1];
866 u8 ib_virt[0x1];
867 u8 eth_virt[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200868 u8 reserved_at_1a4[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300869 u8 ets[0x1];
870 u8 nic_flow_table[0x1];
Saeed Mahameed54f0a412015-12-01 18:03:10 +0200871 u8 eswitch_flow_table[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300872 u8 early_vf_enable[0x1];
Gal Pressmancfdcbcea2016-12-08 15:52:00 +0200873 u8 mcam_reg[0x1];
874 u8 pcam_reg[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300875 u8 local_ca_ack_delay[0x5];
Huy Nguyen4ce3bf22016-11-17 13:45:56 +0200876 u8 port_module_event[0x1];
Parav Pandit58dcb602017-06-19 07:19:37 +0300877 u8 enhanced_error_q_counters[0x1];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +0300878 u8 ports_check[0x1];
Max Gurtovoy7b135582017-01-02 11:37:38 +0200879 u8 reserved_at_1b3[0x1];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +0300880 u8 disable_link_up[0x1];
881 u8 beacon_led[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300882 u8 port_type[0x2];
Eli Cohenb7755162014-10-02 12:19:44 +0300883 u8 num_ports[0x8];
884
Eugenia Emantayevf9a1ef72016-10-10 16:05:53 +0300885 u8 reserved_at_1c0[0x1];
886 u8 pps[0x1];
887 u8 pps_modify[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300888 u8 log_max_msg[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300889 u8 reserved_at_1c8[0x4];
Saeed Mahameed4f3961e2016-02-22 18:17:25 +0200890 u8 max_tc[0x4];
Saeed Mahameed74862162016-06-09 15:11:34 +0300891 u8 reserved_at_1d0[0x1];
892 u8 dcbx[0x1];
Maor Gottlieb246ac982017-05-30 10:29:12 +0300893 u8 general_notification_event[0x1];
894 u8 reserved_at_1d3[0x2];
Ilan Tayarie29341f2017-03-13 20:05:45 +0200895 u8 fpga[0x1];
Tariq Toukan928cfe82016-02-22 18:17:29 +0200896 u8 rol_s[0x1];
897 u8 rol_g[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300898 u8 reserved_at_1d8[0x1];
Tariq Toukan928cfe82016-02-22 18:17:29 +0200899 u8 wol_s[0x1];
900 u8 wol_g[0x1];
901 u8 wol_a[0x1];
902 u8 wol_b[0x1];
903 u8 wol_m[0x1];
904 u8 wol_u[0x1];
905 u8 wol_p[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300906
907 u8 stat_rate_support[0x10];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300908 u8 reserved_at_1f0[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +0300909 u8 cqe_version[0x4];
Eli Cohenb7755162014-10-02 12:19:44 +0300910
Saeed Mahameede2816822015-05-28 22:28:40 +0300911 u8 compact_address_vector[0x1];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +0300912 u8 striding_rq[0x1];
Erez Shitrit500a3d02017-04-13 06:36:51 +0300913 u8 reserved_at_202[0x1];
914 u8 ipoib_enhanced_offloads[0x1];
Erez Shitrit1015c2e2016-02-21 16:27:16 +0200915 u8 ipoib_basic_offloads[0x1];
Max Gurtovoy1410a902017-05-28 10:53:10 +0300916 u8 reserved_at_205[0x5];
917 u8 umr_fence[0x2];
918 u8 reserved_at_20c[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +0300919 u8 drain_sigerr[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300920 u8 cmdif_checksum[0x2];
921 u8 sigerr_cqe[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300922 u8 reserved_at_213[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300923 u8 wq_signature[0x1];
924 u8 sctr_data_cqe[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300925 u8 reserved_at_216[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300926 u8 sho[0x1];
927 u8 tph[0x1];
928 u8 rf[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300929 u8 dct[0x1];
Saeed Mahameed74862162016-06-09 15:11:34 +0300930 u8 qos[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300931 u8 eth_net_offloads[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300932 u8 roce[0x1];
933 u8 atomic[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300934 u8 reserved_at_21f[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300935
936 u8 cq_oi[0x1];
937 u8 cq_resize[0x1];
938 u8 cq_moderation[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300939 u8 reserved_at_223[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +0300940 u8 cq_eq_remap[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300941 u8 pg[0x1];
942 u8 block_lb_mc[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300943 u8 reserved_at_229[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300944 u8 scqe_break_moderation[0x1];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +0300945 u8 cq_period_start_from_cqe[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300946 u8 cd[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300947 u8 reserved_at_22d[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300948 u8 apm[0x1];
Sagi Grimberg3f0393a2016-02-23 10:25:23 +0200949 u8 vector_calc[0x1];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +0300950 u8 umr_ptr_rlky[0x1];
Matan Barakd2370e02016-02-29 18:05:30 +0200951 u8 imaicl[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300952 u8 reserved_at_232[0x4];
Eli Cohenb7755162014-10-02 12:19:44 +0300953 u8 qkv[0x1];
954 u8 pkv[0x1];
Haggai Eranb11a4f92016-02-29 15:45:03 +0200955 u8 set_deth_sqpn[0x1];
956 u8 reserved_at_239[0x3];
Eli Cohenb7755162014-10-02 12:19:44 +0300957 u8 xrc[0x1];
958 u8 ud[0x1];
959 u8 uc[0x1];
960 u8 rc[0x1];
961
Eli Cohena6d51b62017-01-03 23:55:23 +0200962 u8 uar_4k[0x1];
963 u8 reserved_at_241[0x9];
Eli Cohenb7755162014-10-02 12:19:44 +0300964 u8 uar_sz[0x6];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300965 u8 reserved_at_250[0x8];
Eli Cohenb7755162014-10-02 12:19:44 +0300966 u8 log_pg_sz[0x8];
967
968 u8 bf[0x1];
Saeed Mahameed0dbc6fe2016-11-17 13:45:59 +0200969 u8 driver_version[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300970 u8 pad_tx_eth_packet[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300971 u8 reserved_at_263[0x8];
Eli Cohenb7755162014-10-02 12:19:44 +0300972 u8 log_bf_reg_size[0x5];
Aviv Heller84df61e2016-05-10 13:47:50 +0300973
974 u8 reserved_at_270[0xb];
975 u8 lag_master[0x1];
976 u8 num_lag_ports[0x4];
Eli Cohenb7755162014-10-02 12:19:44 +0300977
Tariq Toukane1c9c622016-04-11 23:10:21 +0300978 u8 reserved_at_280[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +0300979 u8 max_wqe_sz_sq[0x10];
980
Tariq Toukane1c9c622016-04-11 23:10:21 +0300981 u8 reserved_at_2a0[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +0300982 u8 max_wqe_sz_rq[0x10];
983
Rabie Louloua8ffcc72017-07-09 13:39:30 +0300984 u8 max_flow_counter_31_16[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +0300985 u8 max_wqe_sz_sq_dc[0x10];
986
Tariq Toukane1c9c622016-04-11 23:10:21 +0300987 u8 reserved_at_2e0[0x7];
Eli Cohenb7755162014-10-02 12:19:44 +0300988 u8 max_qp_mcg[0x19];
989
Tariq Toukane1c9c622016-04-11 23:10:21 +0300990 u8 reserved_at_300[0x18];
Eli Cohenb7755162014-10-02 12:19:44 +0300991 u8 log_max_mcg[0x8];
992
Tariq Toukane1c9c622016-04-11 23:10:21 +0300993 u8 reserved_at_320[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +0300994 u8 log_max_transport_domain[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300995 u8 reserved_at_328[0x3];
Eli Cohenb7755162014-10-02 12:19:44 +0300996 u8 log_max_pd[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300997 u8 reserved_at_330[0xb];
Eli Cohenb7755162014-10-02 12:19:44 +0300998 u8 log_max_xrcd[0x5];
999
Amir Vadaia351a1b02016-07-14 10:32:38 +03001000 u8 reserved_at_340[0x8];
1001 u8 log_max_flow_counter_bulk[0x8];
Rabie Louloua8ffcc72017-07-09 13:39:30 +03001002 u8 max_flow_counter_15_0[0x10];
Amir Vadaia351a1b02016-07-14 10:32:38 +03001003
Eli Cohenb7755162014-10-02 12:19:44 +03001004
Tariq Toukane1c9c622016-04-11 23:10:21 +03001005 u8 reserved_at_360[0x3];
Eli Cohenb7755162014-10-02 12:19:44 +03001006 u8 log_max_rq[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001007 u8 reserved_at_368[0x3];
Eli Cohenb7755162014-10-02 12:19:44 +03001008 u8 log_max_sq[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001009 u8 reserved_at_370[0x3];
Eli Cohenb7755162014-10-02 12:19:44 +03001010 u8 log_max_tir[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001011 u8 reserved_at_378[0x3];
Eli Cohenb7755162014-10-02 12:19:44 +03001012 u8 log_max_tis[0x5];
1013
Saeed Mahameede2816822015-05-28 22:28:40 +03001014 u8 basic_cyclic_rcv_wqe[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001015 u8 reserved_at_381[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03001016 u8 log_max_rmp[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001017 u8 reserved_at_388[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001018 u8 log_max_rqt[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001019 u8 reserved_at_390[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001020 u8 log_max_rqt_size[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001021 u8 reserved_at_398[0x3];
Eli Cohenb7755162014-10-02 12:19:44 +03001022 u8 log_max_tis_per_sq[0x5];
1023
Tariq Toukane1c9c622016-04-11 23:10:21 +03001024 u8 reserved_at_3a0[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001025 u8 log_max_stride_sz_rq[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001026 u8 reserved_at_3a8[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001027 u8 log_min_stride_sz_rq[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001028 u8 reserved_at_3b0[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001029 u8 log_max_stride_sz_sq[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001030 u8 reserved_at_3b8[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001031 u8 log_min_stride_sz_sq[0x5];
Eli Cohenb7755162014-10-02 12:19:44 +03001032
Or Gerlitz40817cd2017-06-25 12:38:45 +03001033 u8 hairpin[0x1];
1034 u8 reserved_at_3c1[0x2];
1035 u8 log_max_hairpin_queues[0x5];
1036 u8 reserved_at_3c8[0x3];
1037 u8 log_max_hairpin_wq_data_sz[0x5];
Or Gerlitz4d533e02018-01-04 12:26:21 +02001038 u8 reserved_at_3d0[0x3];
1039 u8 log_max_hairpin_num_packets[0x5];
1040 u8 reserved_at_3d8[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001041 u8 log_max_wq_sz[0x5];
1042
Saeed Mahameed54f0a412015-12-01 18:03:10 +02001043 u8 nic_vport_change_event[0x1];
Eran Ben Elisha8978cc92018-01-09 11:41:10 +02001044 u8 disable_local_lb_uc[0x1];
1045 u8 disable_local_lb_mc[0x1];
Or Gerlitz40817cd2017-06-25 12:38:45 +03001046 u8 log_min_hairpin_wq_data_sz[0x5];
1047 u8 reserved_at_3e8[0x3];
Saeed Mahameed54f0a412015-12-01 18:03:10 +02001048 u8 log_max_vlan_list[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001049 u8 reserved_at_3f0[0x3];
Saeed Mahameed54f0a412015-12-01 18:03:10 +02001050 u8 log_max_current_mc_list[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001051 u8 reserved_at_3f8[0x3];
Saeed Mahameed54f0a412015-12-01 18:03:10 +02001052 u8 log_max_current_uc_list[0x5];
1053
Tariq Toukane1c9c622016-04-11 23:10:21 +03001054 u8 reserved_at_400[0x80];
Saeed Mahameed54f0a412015-12-01 18:03:10 +02001055
Tariq Toukane1c9c622016-04-11 23:10:21 +03001056 u8 reserved_at_480[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001057 u8 log_max_l2_table[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001058 u8 reserved_at_488[0x8];
Eli Cohenb7755162014-10-02 12:19:44 +03001059 u8 log_uar_page_sz[0x10];
1060
Tariq Toukane1c9c622016-04-11 23:10:21 +03001061 u8 reserved_at_4a0[0x20];
Linus Torvalds048ccca2016-01-23 18:45:06 -08001062 u8 device_frequency_mhz[0x20];
Eran Ben Elishab0844442015-12-29 14:58:30 +02001063 u8 device_frequency_khz[0x20];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001064
Eli Cohena6d51b62017-01-03 23:55:23 +02001065 u8 reserved_at_500[0x20];
1066 u8 num_of_uars_per_page[0x20];
1067 u8 reserved_at_540[0x40];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001068
Guy Levi0ff8e792017-10-19 08:25:51 +03001069 u8 reserved_at_580[0x3d];
1070 u8 cqe_128_always[0x1];
1071 u8 cqe_compression_128[0x1];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03001072 u8 cqe_compression[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +03001073
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03001074 u8 cqe_compression_timeout[0x10];
1075 u8 cqe_compression_max_num[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +03001076
Saeed Mahameed74862162016-06-09 15:11:34 +03001077 u8 reserved_at_5e0[0x10];
1078 u8 tag_matching[0x1];
1079 u8 rndv_offload_rc[0x1];
1080 u8 rndv_offload_dc[0x1];
1081 u8 log_tag_matching_list_sz[0x5];
Max Gurtovoy7b135582017-01-02 11:37:38 +02001082 u8 reserved_at_5f8[0x3];
Saeed Mahameed74862162016-06-09 15:11:34 +03001083 u8 log_max_xrq[0x5];
1084
Daniel Jurgens32f69e42018-01-04 17:25:36 +02001085 u8 affiliate_nic_vport_criteria[0x8];
1086 u8 native_port_num[0x8];
1087 u8 num_vhca_ports[0x8];
1088 u8 reserved_at_618[0x6];
1089 u8 sw_owner_id[0x1];
Daniel Jurgens8737f812018-01-04 17:25:32 +02001090 u8 reserved_at_61f[0x1e1];
Saeed Mahameede2816822015-05-28 22:28:40 +03001091};
1092
Saeed Mahameed81848732015-12-01 18:03:20 +02001093enum mlx5_flow_destination_type {
1094 MLX5_FLOW_DESTINATION_TYPE_VPORT = 0x0,
1095 MLX5_FLOW_DESTINATION_TYPE_FLOW_TABLE = 0x1,
1096 MLX5_FLOW_DESTINATION_TYPE_TIR = 0x2,
Amir Vadaibd5251db2016-05-13 12:55:40 +00001097
Aviad Yehezkel5f418372018-02-18 13:17:17 +02001098 MLX5_FLOW_DESTINATION_TYPE_PORT = 0x99,
Amir Vadaibd5251db2016-05-13 12:55:40 +00001099 MLX5_FLOW_DESTINATION_TYPE_COUNTER = 0x100,
Saeed Mahameede2816822015-05-28 22:28:40 +03001100};
1101
1102struct mlx5_ifc_dest_format_struct_bits {
1103 u8 destination_type[0x8];
1104 u8 destination_id[0x18];
1105
Matan Barakb4ff3a32016-02-09 14:57:42 +02001106 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03001107};
1108
Amir Vadai9dc0b282016-05-13 12:55:39 +00001109struct mlx5_ifc_flow_counter_list_bits {
Rabie Louloua8ffcc72017-07-09 13:39:30 +03001110 u8 flow_counter_id[0x20];
Amir Vadai9dc0b282016-05-13 12:55:39 +00001111
1112 u8 reserved_at_20[0x20];
1113};
1114
1115union mlx5_ifc_dest_format_struct_flow_counter_list_auto_bits {
1116 struct mlx5_ifc_dest_format_struct_bits dest_format_struct;
1117 struct mlx5_ifc_flow_counter_list_bits flow_counter_list;
1118 u8 reserved_at_0[0x40];
1119};
1120
Saeed Mahameede2816822015-05-28 22:28:40 +03001121struct mlx5_ifc_fte_match_param_bits {
1122 struct mlx5_ifc_fte_match_set_lyr_2_4_bits outer_headers;
1123
1124 struct mlx5_ifc_fte_match_set_misc_bits misc_parameters;
1125
1126 struct mlx5_ifc_fte_match_set_lyr_2_4_bits inner_headers;
1127
Matan Barakb4ff3a32016-02-09 14:57:42 +02001128 u8 reserved_at_600[0xa00];
Saeed Mahameede2816822015-05-28 22:28:40 +03001129};
1130
1131enum {
1132 MLX5_RX_HASH_FIELD_SELECT_SELECTED_FIELDS_SRC_IP = 0x0,
1133 MLX5_RX_HASH_FIELD_SELECT_SELECTED_FIELDS_DST_IP = 0x1,
1134 MLX5_RX_HASH_FIELD_SELECT_SELECTED_FIELDS_L4_SPORT = 0x2,
1135 MLX5_RX_HASH_FIELD_SELECT_SELECTED_FIELDS_L4_DPORT = 0x3,
1136 MLX5_RX_HASH_FIELD_SELECT_SELECTED_FIELDS_IPSEC_SPI = 0x4,
1137};
1138
1139struct mlx5_ifc_rx_hash_field_select_bits {
1140 u8 l3_prot_type[0x1];
1141 u8 l4_prot_type[0x1];
1142 u8 selected_fields[0x1e];
1143};
1144
1145enum {
1146 MLX5_WQ_WQ_TYPE_WQ_LINKED_LIST = 0x0,
1147 MLX5_WQ_WQ_TYPE_WQ_CYCLIC = 0x1,
1148};
1149
1150enum {
1151 MLX5_WQ_END_PADDING_MODE_END_PAD_NONE = 0x0,
1152 MLX5_WQ_END_PADDING_MODE_END_PAD_ALIGN = 0x1,
1153};
1154
1155struct mlx5_ifc_wq_bits {
1156 u8 wq_type[0x4];
1157 u8 wq_signature[0x1];
1158 u8 end_padding_mode[0x2];
1159 u8 cd_slave[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001160 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03001161
1162 u8 hds_skip_first_sge[0x1];
1163 u8 log2_hds_buf_size[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001164 u8 reserved_at_24[0x7];
Saeed Mahameede2816822015-05-28 22:28:40 +03001165 u8 page_offset[0x5];
1166 u8 lwm[0x10];
1167
Matan Barakb4ff3a32016-02-09 14:57:42 +02001168 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03001169 u8 pd[0x18];
1170
Matan Barakb4ff3a32016-02-09 14:57:42 +02001171 u8 reserved_at_60[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03001172 u8 uar_page[0x18];
1173
1174 u8 dbr_addr[0x40];
1175
1176 u8 hw_counter[0x20];
1177
1178 u8 sw_counter[0x20];
1179
Matan Barakb4ff3a32016-02-09 14:57:42 +02001180 u8 reserved_at_100[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03001181 u8 log_wq_stride[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001182 u8 reserved_at_110[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001183 u8 log_wq_pg_sz[0x5];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001184 u8 reserved_at_118[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001185 u8 log_wq_sz[0x5];
1186
Or Gerlitz4d533e02018-01-04 12:26:21 +02001187 u8 reserved_at_120[0x3];
1188 u8 log_hairpin_num_packets[0x5];
1189 u8 reserved_at_128[0x3];
Or Gerlitz40817cd2017-06-25 12:38:45 +03001190 u8 log_hairpin_data_sz[0x5];
1191 u8 reserved_at_130[0x5];
1192
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03001193 u8 log_wqe_num_of_strides[0x3];
1194 u8 two_byte_shift_en[0x1];
1195 u8 reserved_at_139[0x4];
1196 u8 log_wqe_stride_size[0x3];
1197
1198 u8 reserved_at_140[0x4c0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001199
1200 struct mlx5_ifc_cmd_pas_bits pas[0];
1201};
1202
1203struct mlx5_ifc_rq_num_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001204 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03001205 u8 rq_num[0x18];
1206};
1207
1208struct mlx5_ifc_mac_address_layout_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001209 u8 reserved_at_0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03001210 u8 mac_addr_47_32[0x10];
1211
1212 u8 mac_addr_31_0[0x20];
1213};
1214
Saeed Mahameedc0046cf2015-12-01 18:03:15 +02001215struct mlx5_ifc_vlan_layout_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001216 u8 reserved_at_0[0x14];
Saeed Mahameedc0046cf2015-12-01 18:03:15 +02001217 u8 vlan[0x0c];
1218
Matan Barakb4ff3a32016-02-09 14:57:42 +02001219 u8 reserved_at_20[0x20];
Saeed Mahameedc0046cf2015-12-01 18:03:15 +02001220};
1221
Saeed Mahameede2816822015-05-28 22:28:40 +03001222struct mlx5_ifc_cong_control_r_roce_ecn_np_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001223 u8 reserved_at_0[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001224
1225 u8 min_time_between_cnps[0x20];
1226
Matan Barakb4ff3a32016-02-09 14:57:42 +02001227 u8 reserved_at_c0[0x12];
Saeed Mahameede2816822015-05-28 22:28:40 +03001228 u8 cnp_dscp[0x6];
Parav Pandit4a2da0b2017-05-30 10:05:15 +03001229 u8 reserved_at_d8[0x4];
1230 u8 cnp_prio_mode[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03001231 u8 cnp_802p_prio[0x3];
1232
Matan Barakb4ff3a32016-02-09 14:57:42 +02001233 u8 reserved_at_e0[0x720];
Saeed Mahameede2816822015-05-28 22:28:40 +03001234};
1235
1236struct mlx5_ifc_cong_control_r_roce_ecn_rp_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001237 u8 reserved_at_0[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03001238
Matan Barakb4ff3a32016-02-09 14:57:42 +02001239 u8 reserved_at_60[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03001240 u8 clamp_tgt_rate[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001241 u8 reserved_at_65[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001242 u8 clamp_tgt_rate_after_time_inc[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001243 u8 reserved_at_69[0x17];
Saeed Mahameede2816822015-05-28 22:28:40 +03001244
Matan Barakb4ff3a32016-02-09 14:57:42 +02001245 u8 reserved_at_80[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03001246
1247 u8 rpg_time_reset[0x20];
1248
1249 u8 rpg_byte_reset[0x20];
1250
1251 u8 rpg_threshold[0x20];
1252
1253 u8 rpg_max_rate[0x20];
1254
1255 u8 rpg_ai_rate[0x20];
1256
1257 u8 rpg_hai_rate[0x20];
1258
1259 u8 rpg_gd[0x20];
1260
1261 u8 rpg_min_dec_fac[0x20];
1262
1263 u8 rpg_min_rate[0x20];
1264
Matan Barakb4ff3a32016-02-09 14:57:42 +02001265 u8 reserved_at_1c0[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001266
1267 u8 rate_to_set_on_first_cnp[0x20];
1268
1269 u8 dce_tcp_g[0x20];
1270
1271 u8 dce_tcp_rtt[0x20];
1272
1273 u8 rate_reduce_monitor_period[0x20];
1274
Matan Barakb4ff3a32016-02-09 14:57:42 +02001275 u8 reserved_at_320[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03001276
1277 u8 initial_alpha_value[0x20];
1278
Matan Barakb4ff3a32016-02-09 14:57:42 +02001279 u8 reserved_at_360[0x4a0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001280};
1281
1282struct mlx5_ifc_cong_control_802_1qau_rp_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001283 u8 reserved_at_0[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03001284
1285 u8 rppp_max_rps[0x20];
1286
1287 u8 rpg_time_reset[0x20];
1288
1289 u8 rpg_byte_reset[0x20];
1290
1291 u8 rpg_threshold[0x20];
1292
1293 u8 rpg_max_rate[0x20];
1294
1295 u8 rpg_ai_rate[0x20];
1296
1297 u8 rpg_hai_rate[0x20];
1298
1299 u8 rpg_gd[0x20];
1300
1301 u8 rpg_min_dec_fac[0x20];
1302
1303 u8 rpg_min_rate[0x20];
1304
Matan Barakb4ff3a32016-02-09 14:57:42 +02001305 u8 reserved_at_1c0[0x640];
Saeed Mahameede2816822015-05-28 22:28:40 +03001306};
1307
1308enum {
1309 MLX5_RESIZE_FIELD_SELECT_RESIZE_FIELD_SELECT_LOG_CQ_SIZE = 0x1,
1310 MLX5_RESIZE_FIELD_SELECT_RESIZE_FIELD_SELECT_PAGE_OFFSET = 0x2,
1311 MLX5_RESIZE_FIELD_SELECT_RESIZE_FIELD_SELECT_LOG_PAGE_SIZE = 0x4,
1312};
1313
1314struct mlx5_ifc_resize_field_select_bits {
1315 u8 resize_field_select[0x20];
1316};
1317
1318enum {
1319 MLX5_MODIFY_FIELD_SELECT_MODIFY_FIELD_SELECT_CQ_PERIOD = 0x1,
1320 MLX5_MODIFY_FIELD_SELECT_MODIFY_FIELD_SELECT_CQ_MAX_COUNT = 0x2,
1321 MLX5_MODIFY_FIELD_SELECT_MODIFY_FIELD_SELECT_OI = 0x4,
1322 MLX5_MODIFY_FIELD_SELECT_MODIFY_FIELD_SELECT_C_EQN = 0x8,
1323};
1324
1325struct mlx5_ifc_modify_field_select_bits {
1326 u8 modify_field_select[0x20];
1327};
1328
1329struct mlx5_ifc_field_select_r_roce_np_bits {
1330 u8 field_select_r_roce_np[0x20];
1331};
1332
1333struct mlx5_ifc_field_select_r_roce_rp_bits {
1334 u8 field_select_r_roce_rp[0x20];
1335};
1336
1337enum {
1338 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPPP_MAX_RPS = 0x4,
1339 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_TIME_RESET = 0x8,
1340 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_BYTE_RESET = 0x10,
1341 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_THRESHOLD = 0x20,
1342 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_MAX_RATE = 0x40,
1343 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_AI_RATE = 0x80,
1344 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_HAI_RATE = 0x100,
1345 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_GD = 0x200,
1346 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_MIN_DEC_FAC = 0x400,
1347 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_MIN_RATE = 0x800,
1348};
1349
1350struct mlx5_ifc_field_select_802_1qau_rp_bits {
1351 u8 field_select_8021qaurp[0x20];
1352};
1353
1354struct mlx5_ifc_phys_layer_cntrs_bits {
1355 u8 time_since_last_clear_high[0x20];
1356
1357 u8 time_since_last_clear_low[0x20];
1358
1359 u8 symbol_errors_high[0x20];
1360
1361 u8 symbol_errors_low[0x20];
1362
1363 u8 sync_headers_errors_high[0x20];
1364
1365 u8 sync_headers_errors_low[0x20];
1366
1367 u8 edpl_bip_errors_lane0_high[0x20];
1368
1369 u8 edpl_bip_errors_lane0_low[0x20];
1370
1371 u8 edpl_bip_errors_lane1_high[0x20];
1372
1373 u8 edpl_bip_errors_lane1_low[0x20];
1374
1375 u8 edpl_bip_errors_lane2_high[0x20];
1376
1377 u8 edpl_bip_errors_lane2_low[0x20];
1378
1379 u8 edpl_bip_errors_lane3_high[0x20];
1380
1381 u8 edpl_bip_errors_lane3_low[0x20];
1382
1383 u8 fc_fec_corrected_blocks_lane0_high[0x20];
1384
1385 u8 fc_fec_corrected_blocks_lane0_low[0x20];
1386
1387 u8 fc_fec_corrected_blocks_lane1_high[0x20];
1388
1389 u8 fc_fec_corrected_blocks_lane1_low[0x20];
1390
1391 u8 fc_fec_corrected_blocks_lane2_high[0x20];
1392
1393 u8 fc_fec_corrected_blocks_lane2_low[0x20];
1394
1395 u8 fc_fec_corrected_blocks_lane3_high[0x20];
1396
1397 u8 fc_fec_corrected_blocks_lane3_low[0x20];
1398
1399 u8 fc_fec_uncorrectable_blocks_lane0_high[0x20];
1400
1401 u8 fc_fec_uncorrectable_blocks_lane0_low[0x20];
1402
1403 u8 fc_fec_uncorrectable_blocks_lane1_high[0x20];
1404
1405 u8 fc_fec_uncorrectable_blocks_lane1_low[0x20];
1406
1407 u8 fc_fec_uncorrectable_blocks_lane2_high[0x20];
1408
1409 u8 fc_fec_uncorrectable_blocks_lane2_low[0x20];
1410
1411 u8 fc_fec_uncorrectable_blocks_lane3_high[0x20];
1412
1413 u8 fc_fec_uncorrectable_blocks_lane3_low[0x20];
1414
1415 u8 rs_fec_corrected_blocks_high[0x20];
1416
1417 u8 rs_fec_corrected_blocks_low[0x20];
1418
1419 u8 rs_fec_uncorrectable_blocks_high[0x20];
1420
1421 u8 rs_fec_uncorrectable_blocks_low[0x20];
1422
1423 u8 rs_fec_no_errors_blocks_high[0x20];
1424
1425 u8 rs_fec_no_errors_blocks_low[0x20];
1426
1427 u8 rs_fec_single_error_blocks_high[0x20];
1428
1429 u8 rs_fec_single_error_blocks_low[0x20];
1430
1431 u8 rs_fec_corrected_symbols_total_high[0x20];
1432
1433 u8 rs_fec_corrected_symbols_total_low[0x20];
1434
1435 u8 rs_fec_corrected_symbols_lane0_high[0x20];
1436
1437 u8 rs_fec_corrected_symbols_lane0_low[0x20];
1438
1439 u8 rs_fec_corrected_symbols_lane1_high[0x20];
1440
1441 u8 rs_fec_corrected_symbols_lane1_low[0x20];
1442
1443 u8 rs_fec_corrected_symbols_lane2_high[0x20];
1444
1445 u8 rs_fec_corrected_symbols_lane2_low[0x20];
1446
1447 u8 rs_fec_corrected_symbols_lane3_high[0x20];
1448
1449 u8 rs_fec_corrected_symbols_lane3_low[0x20];
1450
1451 u8 link_down_events[0x20];
1452
1453 u8 successful_recovery_events[0x20];
1454
Matan Barakb4ff3a32016-02-09 14:57:42 +02001455 u8 reserved_at_640[0x180];
Saeed Mahameede2816822015-05-28 22:28:40 +03001456};
1457
Gal Pressmand8dc0502016-09-27 17:04:51 +03001458struct mlx5_ifc_phys_layer_statistical_cntrs_bits {
1459 u8 time_since_last_clear_high[0x20];
1460
1461 u8 time_since_last_clear_low[0x20];
1462
1463 u8 phy_received_bits_high[0x20];
1464
1465 u8 phy_received_bits_low[0x20];
1466
1467 u8 phy_symbol_errors_high[0x20];
1468
1469 u8 phy_symbol_errors_low[0x20];
1470
1471 u8 phy_corrected_bits_high[0x20];
1472
1473 u8 phy_corrected_bits_low[0x20];
1474
1475 u8 phy_corrected_bits_lane0_high[0x20];
1476
1477 u8 phy_corrected_bits_lane0_low[0x20];
1478
1479 u8 phy_corrected_bits_lane1_high[0x20];
1480
1481 u8 phy_corrected_bits_lane1_low[0x20];
1482
1483 u8 phy_corrected_bits_lane2_high[0x20];
1484
1485 u8 phy_corrected_bits_lane2_low[0x20];
1486
1487 u8 phy_corrected_bits_lane3_high[0x20];
1488
1489 u8 phy_corrected_bits_lane3_low[0x20];
1490
1491 u8 reserved_at_200[0x5c0];
1492};
1493
Meny Yossefi1c64bf62016-02-18 18:15:00 +02001494struct mlx5_ifc_ib_port_cntrs_grp_data_layout_bits {
1495 u8 symbol_error_counter[0x10];
1496
1497 u8 link_error_recovery_counter[0x8];
1498
1499 u8 link_downed_counter[0x8];
1500
1501 u8 port_rcv_errors[0x10];
1502
1503 u8 port_rcv_remote_physical_errors[0x10];
1504
1505 u8 port_rcv_switch_relay_errors[0x10];
1506
1507 u8 port_xmit_discards[0x10];
1508
1509 u8 port_xmit_constraint_errors[0x8];
1510
1511 u8 port_rcv_constraint_errors[0x8];
1512
1513 u8 reserved_at_70[0x8];
1514
1515 u8 link_overrun_errors[0x8];
1516
1517 u8 reserved_at_80[0x10];
1518
1519 u8 vl_15_dropped[0x10];
1520
Tim Wright133bea02017-05-01 17:30:08 +01001521 u8 reserved_at_a0[0x80];
1522
1523 u8 port_xmit_wait[0x20];
Meny Yossefi1c64bf62016-02-18 18:15:00 +02001524};
1525
Saeed Mahameede2816822015-05-28 22:28:40 +03001526struct mlx5_ifc_eth_per_traffic_grp_data_layout_bits {
1527 u8 transmit_queue_high[0x20];
1528
1529 u8 transmit_queue_low[0x20];
1530
Matan Barakb4ff3a32016-02-09 14:57:42 +02001531 u8 reserved_at_40[0x780];
Saeed Mahameede2816822015-05-28 22:28:40 +03001532};
1533
1534struct mlx5_ifc_eth_per_prio_grp_data_layout_bits {
1535 u8 rx_octets_high[0x20];
1536
1537 u8 rx_octets_low[0x20];
1538
Matan Barakb4ff3a32016-02-09 14:57:42 +02001539 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001540
1541 u8 rx_frames_high[0x20];
1542
1543 u8 rx_frames_low[0x20];
1544
1545 u8 tx_octets_high[0x20];
1546
1547 u8 tx_octets_low[0x20];
1548
Matan Barakb4ff3a32016-02-09 14:57:42 +02001549 u8 reserved_at_180[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001550
1551 u8 tx_frames_high[0x20];
1552
1553 u8 tx_frames_low[0x20];
1554
1555 u8 rx_pause_high[0x20];
1556
1557 u8 rx_pause_low[0x20];
1558
1559 u8 rx_pause_duration_high[0x20];
1560
1561 u8 rx_pause_duration_low[0x20];
1562
1563 u8 tx_pause_high[0x20];
1564
1565 u8 tx_pause_low[0x20];
1566
1567 u8 tx_pause_duration_high[0x20];
1568
1569 u8 tx_pause_duration_low[0x20];
1570
1571 u8 rx_pause_transition_high[0x20];
1572
1573 u8 rx_pause_transition_low[0x20];
1574
Matan Barakb4ff3a32016-02-09 14:57:42 +02001575 u8 reserved_at_3c0[0x400];
Saeed Mahameede2816822015-05-28 22:28:40 +03001576};
1577
1578struct mlx5_ifc_eth_extended_cntrs_grp_data_layout_bits {
1579 u8 port_transmit_wait_high[0x20];
1580
1581 u8 port_transmit_wait_low[0x20];
1582
Gal Pressman2dba0792017-06-18 14:56:45 +03001583 u8 reserved_at_40[0x100];
1584
1585 u8 rx_buffer_almost_full_high[0x20];
1586
1587 u8 rx_buffer_almost_full_low[0x20];
1588
1589 u8 rx_buffer_full_high[0x20];
1590
1591 u8 rx_buffer_full_low[0x20];
1592
1593 u8 reserved_at_1c0[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03001594};
1595
1596struct mlx5_ifc_eth_3635_cntrs_grp_data_layout_bits {
1597 u8 dot3stats_alignment_errors_high[0x20];
1598
1599 u8 dot3stats_alignment_errors_low[0x20];
1600
1601 u8 dot3stats_fcs_errors_high[0x20];
1602
1603 u8 dot3stats_fcs_errors_low[0x20];
1604
1605 u8 dot3stats_single_collision_frames_high[0x20];
1606
1607 u8 dot3stats_single_collision_frames_low[0x20];
1608
1609 u8 dot3stats_multiple_collision_frames_high[0x20];
1610
1611 u8 dot3stats_multiple_collision_frames_low[0x20];
1612
1613 u8 dot3stats_sqe_test_errors_high[0x20];
1614
1615 u8 dot3stats_sqe_test_errors_low[0x20];
1616
1617 u8 dot3stats_deferred_transmissions_high[0x20];
1618
1619 u8 dot3stats_deferred_transmissions_low[0x20];
1620
1621 u8 dot3stats_late_collisions_high[0x20];
1622
1623 u8 dot3stats_late_collisions_low[0x20];
1624
1625 u8 dot3stats_excessive_collisions_high[0x20];
1626
1627 u8 dot3stats_excessive_collisions_low[0x20];
1628
1629 u8 dot3stats_internal_mac_transmit_errors_high[0x20];
1630
1631 u8 dot3stats_internal_mac_transmit_errors_low[0x20];
1632
1633 u8 dot3stats_carrier_sense_errors_high[0x20];
1634
1635 u8 dot3stats_carrier_sense_errors_low[0x20];
1636
1637 u8 dot3stats_frame_too_longs_high[0x20];
1638
1639 u8 dot3stats_frame_too_longs_low[0x20];
1640
1641 u8 dot3stats_internal_mac_receive_errors_high[0x20];
1642
1643 u8 dot3stats_internal_mac_receive_errors_low[0x20];
1644
1645 u8 dot3stats_symbol_errors_high[0x20];
1646
1647 u8 dot3stats_symbol_errors_low[0x20];
1648
1649 u8 dot3control_in_unknown_opcodes_high[0x20];
1650
1651 u8 dot3control_in_unknown_opcodes_low[0x20];
1652
1653 u8 dot3in_pause_frames_high[0x20];
1654
1655 u8 dot3in_pause_frames_low[0x20];
1656
1657 u8 dot3out_pause_frames_high[0x20];
1658
1659 u8 dot3out_pause_frames_low[0x20];
1660
Matan Barakb4ff3a32016-02-09 14:57:42 +02001661 u8 reserved_at_400[0x3c0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001662};
1663
1664struct mlx5_ifc_eth_2819_cntrs_grp_data_layout_bits {
1665 u8 ether_stats_drop_events_high[0x20];
1666
1667 u8 ether_stats_drop_events_low[0x20];
1668
1669 u8 ether_stats_octets_high[0x20];
1670
1671 u8 ether_stats_octets_low[0x20];
1672
1673 u8 ether_stats_pkts_high[0x20];
1674
1675 u8 ether_stats_pkts_low[0x20];
1676
1677 u8 ether_stats_broadcast_pkts_high[0x20];
1678
1679 u8 ether_stats_broadcast_pkts_low[0x20];
1680
1681 u8 ether_stats_multicast_pkts_high[0x20];
1682
1683 u8 ether_stats_multicast_pkts_low[0x20];
1684
1685 u8 ether_stats_crc_align_errors_high[0x20];
1686
1687 u8 ether_stats_crc_align_errors_low[0x20];
1688
1689 u8 ether_stats_undersize_pkts_high[0x20];
1690
1691 u8 ether_stats_undersize_pkts_low[0x20];
1692
1693 u8 ether_stats_oversize_pkts_high[0x20];
1694
1695 u8 ether_stats_oversize_pkts_low[0x20];
1696
1697 u8 ether_stats_fragments_high[0x20];
1698
1699 u8 ether_stats_fragments_low[0x20];
1700
1701 u8 ether_stats_jabbers_high[0x20];
1702
1703 u8 ether_stats_jabbers_low[0x20];
1704
1705 u8 ether_stats_collisions_high[0x20];
1706
1707 u8 ether_stats_collisions_low[0x20];
1708
1709 u8 ether_stats_pkts64octets_high[0x20];
1710
1711 u8 ether_stats_pkts64octets_low[0x20];
1712
1713 u8 ether_stats_pkts65to127octets_high[0x20];
1714
1715 u8 ether_stats_pkts65to127octets_low[0x20];
1716
1717 u8 ether_stats_pkts128to255octets_high[0x20];
1718
1719 u8 ether_stats_pkts128to255octets_low[0x20];
1720
1721 u8 ether_stats_pkts256to511octets_high[0x20];
1722
1723 u8 ether_stats_pkts256to511octets_low[0x20];
1724
1725 u8 ether_stats_pkts512to1023octets_high[0x20];
1726
1727 u8 ether_stats_pkts512to1023octets_low[0x20];
1728
1729 u8 ether_stats_pkts1024to1518octets_high[0x20];
1730
1731 u8 ether_stats_pkts1024to1518octets_low[0x20];
1732
1733 u8 ether_stats_pkts1519to2047octets_high[0x20];
1734
1735 u8 ether_stats_pkts1519to2047octets_low[0x20];
1736
1737 u8 ether_stats_pkts2048to4095octets_high[0x20];
1738
1739 u8 ether_stats_pkts2048to4095octets_low[0x20];
1740
1741 u8 ether_stats_pkts4096to8191octets_high[0x20];
1742
1743 u8 ether_stats_pkts4096to8191octets_low[0x20];
1744
1745 u8 ether_stats_pkts8192to10239octets_high[0x20];
1746
1747 u8 ether_stats_pkts8192to10239octets_low[0x20];
1748
Matan Barakb4ff3a32016-02-09 14:57:42 +02001749 u8 reserved_at_540[0x280];
Saeed Mahameede2816822015-05-28 22:28:40 +03001750};
1751
1752struct mlx5_ifc_eth_2863_cntrs_grp_data_layout_bits {
1753 u8 if_in_octets_high[0x20];
1754
1755 u8 if_in_octets_low[0x20];
1756
1757 u8 if_in_ucast_pkts_high[0x20];
1758
1759 u8 if_in_ucast_pkts_low[0x20];
1760
1761 u8 if_in_discards_high[0x20];
1762
1763 u8 if_in_discards_low[0x20];
1764
1765 u8 if_in_errors_high[0x20];
1766
1767 u8 if_in_errors_low[0x20];
1768
1769 u8 if_in_unknown_protos_high[0x20];
1770
1771 u8 if_in_unknown_protos_low[0x20];
1772
1773 u8 if_out_octets_high[0x20];
1774
1775 u8 if_out_octets_low[0x20];
1776
1777 u8 if_out_ucast_pkts_high[0x20];
1778
1779 u8 if_out_ucast_pkts_low[0x20];
1780
1781 u8 if_out_discards_high[0x20];
1782
1783 u8 if_out_discards_low[0x20];
1784
1785 u8 if_out_errors_high[0x20];
1786
1787 u8 if_out_errors_low[0x20];
1788
1789 u8 if_in_multicast_pkts_high[0x20];
1790
1791 u8 if_in_multicast_pkts_low[0x20];
1792
1793 u8 if_in_broadcast_pkts_high[0x20];
1794
1795 u8 if_in_broadcast_pkts_low[0x20];
1796
1797 u8 if_out_multicast_pkts_high[0x20];
1798
1799 u8 if_out_multicast_pkts_low[0x20];
1800
1801 u8 if_out_broadcast_pkts_high[0x20];
1802
1803 u8 if_out_broadcast_pkts_low[0x20];
1804
Matan Barakb4ff3a32016-02-09 14:57:42 +02001805 u8 reserved_at_340[0x480];
Saeed Mahameede2816822015-05-28 22:28:40 +03001806};
1807
1808struct mlx5_ifc_eth_802_3_cntrs_grp_data_layout_bits {
1809 u8 a_frames_transmitted_ok_high[0x20];
1810
1811 u8 a_frames_transmitted_ok_low[0x20];
1812
1813 u8 a_frames_received_ok_high[0x20];
1814
1815 u8 a_frames_received_ok_low[0x20];
1816
1817 u8 a_frame_check_sequence_errors_high[0x20];
1818
1819 u8 a_frame_check_sequence_errors_low[0x20];
1820
1821 u8 a_alignment_errors_high[0x20];
1822
1823 u8 a_alignment_errors_low[0x20];
1824
1825 u8 a_octets_transmitted_ok_high[0x20];
1826
1827 u8 a_octets_transmitted_ok_low[0x20];
1828
1829 u8 a_octets_received_ok_high[0x20];
1830
1831 u8 a_octets_received_ok_low[0x20];
1832
1833 u8 a_multicast_frames_xmitted_ok_high[0x20];
1834
1835 u8 a_multicast_frames_xmitted_ok_low[0x20];
1836
1837 u8 a_broadcast_frames_xmitted_ok_high[0x20];
1838
1839 u8 a_broadcast_frames_xmitted_ok_low[0x20];
1840
1841 u8 a_multicast_frames_received_ok_high[0x20];
1842
1843 u8 a_multicast_frames_received_ok_low[0x20];
1844
1845 u8 a_broadcast_frames_received_ok_high[0x20];
1846
1847 u8 a_broadcast_frames_received_ok_low[0x20];
1848
1849 u8 a_in_range_length_errors_high[0x20];
1850
1851 u8 a_in_range_length_errors_low[0x20];
1852
1853 u8 a_out_of_range_length_field_high[0x20];
1854
1855 u8 a_out_of_range_length_field_low[0x20];
1856
1857 u8 a_frame_too_long_errors_high[0x20];
1858
1859 u8 a_frame_too_long_errors_low[0x20];
1860
1861 u8 a_symbol_error_during_carrier_high[0x20];
1862
1863 u8 a_symbol_error_during_carrier_low[0x20];
1864
1865 u8 a_mac_control_frames_transmitted_high[0x20];
1866
1867 u8 a_mac_control_frames_transmitted_low[0x20];
1868
1869 u8 a_mac_control_frames_received_high[0x20];
1870
1871 u8 a_mac_control_frames_received_low[0x20];
1872
1873 u8 a_unsupported_opcodes_received_high[0x20];
1874
1875 u8 a_unsupported_opcodes_received_low[0x20];
1876
1877 u8 a_pause_mac_ctrl_frames_received_high[0x20];
1878
1879 u8 a_pause_mac_ctrl_frames_received_low[0x20];
1880
1881 u8 a_pause_mac_ctrl_frames_transmitted_high[0x20];
1882
1883 u8 a_pause_mac_ctrl_frames_transmitted_low[0x20];
1884
Matan Barakb4ff3a32016-02-09 14:57:42 +02001885 u8 reserved_at_4c0[0x300];
Saeed Mahameede2816822015-05-28 22:28:40 +03001886};
1887
Gal Pressman8ed1a632016-11-17 13:46:01 +02001888struct mlx5_ifc_pcie_perf_cntrs_grp_data_layout_bits {
1889 u8 life_time_counter_high[0x20];
1890
1891 u8 life_time_counter_low[0x20];
1892
1893 u8 rx_errors[0x20];
1894
1895 u8 tx_errors[0x20];
1896
1897 u8 l0_to_recovery_eieos[0x20];
1898
1899 u8 l0_to_recovery_ts[0x20];
1900
1901 u8 l0_to_recovery_framing[0x20];
1902
1903 u8 l0_to_recovery_retrain[0x20];
1904
1905 u8 crc_error_dllp[0x20];
1906
1907 u8 crc_error_tlp[0x20];
1908
Eran Ben Elishaefae7f72017-05-12 02:47:02 +03001909 u8 tx_overflow_buffer_pkt_high[0x20];
1910
1911 u8 tx_overflow_buffer_pkt_low[0x20];
Gal Pressman5405fa22017-06-15 18:29:23 +03001912
1913 u8 outbound_stalled_reads[0x20];
1914
1915 u8 outbound_stalled_writes[0x20];
1916
1917 u8 outbound_stalled_reads_events[0x20];
1918
1919 u8 outbound_stalled_writes_events[0x20];
1920
1921 u8 reserved_at_200[0x5c0];
Gal Pressman8ed1a632016-11-17 13:46:01 +02001922};
1923
Saeed Mahameede2816822015-05-28 22:28:40 +03001924struct mlx5_ifc_cmd_inter_comp_event_bits {
1925 u8 command_completion_vector[0x20];
1926
Matan Barakb4ff3a32016-02-09 14:57:42 +02001927 u8 reserved_at_20[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001928};
1929
1930struct mlx5_ifc_stall_vl_event_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001931 u8 reserved_at_0[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03001932 u8 port_num[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001933 u8 reserved_at_19[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001934 u8 vl[0x4];
1935
Matan Barakb4ff3a32016-02-09 14:57:42 +02001936 u8 reserved_at_20[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001937};
1938
1939struct mlx5_ifc_db_bf_congestion_event_bits {
1940 u8 event_subtype[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001941 u8 reserved_at_8[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03001942 u8 congestion_level[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001943 u8 reserved_at_18[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03001944
Matan Barakb4ff3a32016-02-09 14:57:42 +02001945 u8 reserved_at_20[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001946};
1947
1948struct mlx5_ifc_gpio_event_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001949 u8 reserved_at_0[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03001950
1951 u8 gpio_event_hi[0x20];
1952
1953 u8 gpio_event_lo[0x20];
1954
Matan Barakb4ff3a32016-02-09 14:57:42 +02001955 u8 reserved_at_a0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03001956};
1957
1958struct mlx5_ifc_port_state_change_event_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001959 u8 reserved_at_0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03001960
1961 u8 port_num[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001962 u8 reserved_at_44[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03001963
Matan Barakb4ff3a32016-02-09 14:57:42 +02001964 u8 reserved_at_60[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03001965};
1966
1967struct mlx5_ifc_dropped_packet_logged_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001968 u8 reserved_at_0[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001969};
1970
1971enum {
1972 MLX5_CQ_ERROR_SYNDROME_CQ_OVERRUN = 0x1,
1973 MLX5_CQ_ERROR_SYNDROME_CQ_ACCESS_VIOLATION_ERROR = 0x2,
1974};
1975
1976struct mlx5_ifc_cq_error_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001977 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03001978 u8 cqn[0x18];
1979
Matan Barakb4ff3a32016-02-09 14:57:42 +02001980 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03001981
Matan Barakb4ff3a32016-02-09 14:57:42 +02001982 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03001983 u8 syndrome[0x8];
1984
Matan Barakb4ff3a32016-02-09 14:57:42 +02001985 u8 reserved_at_60[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03001986};
1987
1988struct mlx5_ifc_rdma_page_fault_event_bits {
1989 u8 bytes_committed[0x20];
1990
1991 u8 r_key[0x20];
1992
Matan Barakb4ff3a32016-02-09 14:57:42 +02001993 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03001994 u8 packet_len[0x10];
1995
1996 u8 rdma_op_len[0x20];
1997
1998 u8 rdma_va[0x40];
1999
Matan Barakb4ff3a32016-02-09 14:57:42 +02002000 u8 reserved_at_c0[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03002001 u8 rdma[0x1];
2002 u8 write[0x1];
2003 u8 requestor[0x1];
2004 u8 qp_number[0x18];
2005};
2006
2007struct mlx5_ifc_wqe_associated_page_fault_event_bits {
2008 u8 bytes_committed[0x20];
2009
Matan Barakb4ff3a32016-02-09 14:57:42 +02002010 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03002011 u8 wqe_index[0x10];
2012
Matan Barakb4ff3a32016-02-09 14:57:42 +02002013 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03002014 u8 len[0x10];
2015
Matan Barakb4ff3a32016-02-09 14:57:42 +02002016 u8 reserved_at_60[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03002017
Matan Barakb4ff3a32016-02-09 14:57:42 +02002018 u8 reserved_at_c0[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03002019 u8 rdma[0x1];
2020 u8 write_read[0x1];
2021 u8 requestor[0x1];
2022 u8 qpn[0x18];
2023};
2024
2025struct mlx5_ifc_qp_events_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002026 u8 reserved_at_0[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002027
2028 u8 type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002029 u8 reserved_at_a8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002030
Matan Barakb4ff3a32016-02-09 14:57:42 +02002031 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002032 u8 qpn_rqn_sqn[0x18];
2033};
2034
2035struct mlx5_ifc_dct_events_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002036 u8 reserved_at_0[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002037
Matan Barakb4ff3a32016-02-09 14:57:42 +02002038 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002039 u8 dct_number[0x18];
2040};
2041
2042struct mlx5_ifc_comp_event_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002043 u8 reserved_at_0[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002044
Matan Barakb4ff3a32016-02-09 14:57:42 +02002045 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002046 u8 cq_number[0x18];
2047};
2048
2049enum {
2050 MLX5_QPC_STATE_RST = 0x0,
2051 MLX5_QPC_STATE_INIT = 0x1,
2052 MLX5_QPC_STATE_RTR = 0x2,
2053 MLX5_QPC_STATE_RTS = 0x3,
2054 MLX5_QPC_STATE_SQER = 0x4,
2055 MLX5_QPC_STATE_ERR = 0x6,
2056 MLX5_QPC_STATE_SQD = 0x7,
2057 MLX5_QPC_STATE_SUSPENDED = 0x9,
2058};
2059
2060enum {
2061 MLX5_QPC_ST_RC = 0x0,
2062 MLX5_QPC_ST_UC = 0x1,
2063 MLX5_QPC_ST_UD = 0x2,
2064 MLX5_QPC_ST_XRC = 0x3,
2065 MLX5_QPC_ST_DCI = 0x5,
2066 MLX5_QPC_ST_QP0 = 0x7,
2067 MLX5_QPC_ST_QP1 = 0x8,
2068 MLX5_QPC_ST_RAW_DATAGRAM = 0x9,
2069 MLX5_QPC_ST_REG_UMR = 0xc,
2070};
2071
2072enum {
2073 MLX5_QPC_PM_STATE_ARMED = 0x0,
2074 MLX5_QPC_PM_STATE_REARM = 0x1,
2075 MLX5_QPC_PM_STATE_RESERVED = 0x2,
2076 MLX5_QPC_PM_STATE_MIGRATED = 0x3,
2077};
2078
2079enum {
Artemy Kovalyov6e446362017-08-15 11:59:02 +03002080 MLX5_QPC_OFFLOAD_TYPE_RNDV = 0x1,
2081};
2082
2083enum {
Saeed Mahameede2816822015-05-28 22:28:40 +03002084 MLX5_QPC_END_PADDING_MODE_SCATTER_AS_IS = 0x0,
2085 MLX5_QPC_END_PADDING_MODE_PAD_TO_CACHE_LINE_ALIGNMENT = 0x1,
2086};
2087
2088enum {
2089 MLX5_QPC_MTU_256_BYTES = 0x1,
2090 MLX5_QPC_MTU_512_BYTES = 0x2,
2091 MLX5_QPC_MTU_1K_BYTES = 0x3,
2092 MLX5_QPC_MTU_2K_BYTES = 0x4,
2093 MLX5_QPC_MTU_4K_BYTES = 0x5,
2094 MLX5_QPC_MTU_RAW_ETHERNET_QP = 0x7,
2095};
2096
2097enum {
2098 MLX5_QPC_ATOMIC_MODE_IB_SPEC = 0x1,
2099 MLX5_QPC_ATOMIC_MODE_ONLY_8B = 0x2,
2100 MLX5_QPC_ATOMIC_MODE_UP_TO_8B = 0x3,
2101 MLX5_QPC_ATOMIC_MODE_UP_TO_16B = 0x4,
2102 MLX5_QPC_ATOMIC_MODE_UP_TO_32B = 0x5,
2103 MLX5_QPC_ATOMIC_MODE_UP_TO_64B = 0x6,
2104 MLX5_QPC_ATOMIC_MODE_UP_TO_128B = 0x7,
2105 MLX5_QPC_ATOMIC_MODE_UP_TO_256B = 0x8,
2106};
2107
2108enum {
2109 MLX5_QPC_CS_REQ_DISABLE = 0x0,
2110 MLX5_QPC_CS_REQ_UP_TO_32B = 0x11,
2111 MLX5_QPC_CS_REQ_UP_TO_64B = 0x22,
2112};
2113
2114enum {
2115 MLX5_QPC_CS_RES_DISABLE = 0x0,
2116 MLX5_QPC_CS_RES_UP_TO_32B = 0x1,
2117 MLX5_QPC_CS_RES_UP_TO_64B = 0x2,
2118};
2119
2120struct mlx5_ifc_qpc_bits {
2121 u8 state[0x4];
Aviv Heller84df61e2016-05-10 13:47:50 +03002122 u8 lag_tx_port_affinity[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002123 u8 st[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002124 u8 reserved_at_10[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002125 u8 pm_state[0x2];
Artemy Kovalyov6e446362017-08-15 11:59:02 +03002126 u8 reserved_at_15[0x3];
2127 u8 offload_type[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002128 u8 end_padding_mode[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002129 u8 reserved_at_1e[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002130
2131 u8 wq_signature[0x1];
2132 u8 block_lb_mc[0x1];
2133 u8 atomic_like_write_en[0x1];
2134 u8 latency_sensitive[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002135 u8 reserved_at_24[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002136 u8 drain_sigerr[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002137 u8 reserved_at_26[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002138 u8 pd[0x18];
2139
2140 u8 mtu[0x3];
2141 u8 log_msg_max[0x5];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002142 u8 reserved_at_48[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002143 u8 log_rq_size[0x4];
2144 u8 log_rq_stride[0x3];
2145 u8 no_sq[0x1];
2146 u8 log_sq_size[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002147 u8 reserved_at_55[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03002148 u8 rlky[0x1];
Erez Shitrit1015c2e2016-02-21 16:27:16 +02002149 u8 ulp_stateless_offload_mode[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002150
2151 u8 counter_set_id[0x8];
2152 u8 uar_page[0x18];
2153
Matan Barakb4ff3a32016-02-09 14:57:42 +02002154 u8 reserved_at_80[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002155 u8 user_index[0x18];
2156
Matan Barakb4ff3a32016-02-09 14:57:42 +02002157 u8 reserved_at_a0[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002158 u8 log_page_size[0x5];
2159 u8 remote_qpn[0x18];
2160
2161 struct mlx5_ifc_ads_bits primary_address_path;
2162
2163 struct mlx5_ifc_ads_bits secondary_address_path;
2164
2165 u8 log_ack_req_freq[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002166 u8 reserved_at_384[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002167 u8 log_sra_max[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002168 u8 reserved_at_38b[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002169 u8 retry_count[0x3];
2170 u8 rnr_retry[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002171 u8 reserved_at_393[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002172 u8 fre[0x1];
2173 u8 cur_rnr_retry[0x3];
2174 u8 cur_retry_count[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002175 u8 reserved_at_39b[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03002176
Matan Barakb4ff3a32016-02-09 14:57:42 +02002177 u8 reserved_at_3a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002178
Matan Barakb4ff3a32016-02-09 14:57:42 +02002179 u8 reserved_at_3c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002180 u8 next_send_psn[0x18];
2181
Matan Barakb4ff3a32016-02-09 14:57:42 +02002182 u8 reserved_at_3e0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002183 u8 cqn_snd[0x18];
2184
Saeed Mahameed09a7d9e2016-07-19 01:17:59 +03002185 u8 reserved_at_400[0x8];
2186 u8 deth_sqpn[0x18];
2187
2188 u8 reserved_at_420[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002189
Matan Barakb4ff3a32016-02-09 14:57:42 +02002190 u8 reserved_at_440[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002191 u8 last_acked_psn[0x18];
2192
Matan Barakb4ff3a32016-02-09 14:57:42 +02002193 u8 reserved_at_460[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002194 u8 ssn[0x18];
2195
Matan Barakb4ff3a32016-02-09 14:57:42 +02002196 u8 reserved_at_480[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002197 u8 log_rra_max[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002198 u8 reserved_at_48b[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002199 u8 atomic_mode[0x4];
2200 u8 rre[0x1];
2201 u8 rwe[0x1];
2202 u8 rae[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002203 u8 reserved_at_493[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002204 u8 page_offset[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002205 u8 reserved_at_49a[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002206 u8 cd_slave_receive[0x1];
2207 u8 cd_slave_send[0x1];
2208 u8 cd_master[0x1];
2209
Matan Barakb4ff3a32016-02-09 14:57:42 +02002210 u8 reserved_at_4a0[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002211 u8 min_rnr_nak[0x5];
2212 u8 next_rcv_psn[0x18];
2213
Matan Barakb4ff3a32016-02-09 14:57:42 +02002214 u8 reserved_at_4c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002215 u8 xrcd[0x18];
2216
Matan Barakb4ff3a32016-02-09 14:57:42 +02002217 u8 reserved_at_4e0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002218 u8 cqn_rcv[0x18];
2219
2220 u8 dbr_addr[0x40];
2221
2222 u8 q_key[0x20];
2223
Matan Barakb4ff3a32016-02-09 14:57:42 +02002224 u8 reserved_at_560[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03002225 u8 rq_type[0x3];
Saeed Mahameed74862162016-06-09 15:11:34 +03002226 u8 srqn_rmpn_xrqn[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002227
Matan Barakb4ff3a32016-02-09 14:57:42 +02002228 u8 reserved_at_580[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002229 u8 rmsn[0x18];
2230
2231 u8 hw_sq_wqebb_counter[0x10];
2232 u8 sw_sq_wqebb_counter[0x10];
2233
2234 u8 hw_rq_counter[0x20];
2235
2236 u8 sw_rq_counter[0x20];
2237
Matan Barakb4ff3a32016-02-09 14:57:42 +02002238 u8 reserved_at_600[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002239
Matan Barakb4ff3a32016-02-09 14:57:42 +02002240 u8 reserved_at_620[0xf];
Saeed Mahameede2816822015-05-28 22:28:40 +03002241 u8 cgs[0x1];
2242 u8 cs_req[0x8];
2243 u8 cs_res[0x8];
2244
2245 u8 dc_access_key[0x40];
2246
Matan Barakb4ff3a32016-02-09 14:57:42 +02002247 u8 reserved_at_680[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002248};
2249
2250struct mlx5_ifc_roce_addr_layout_bits {
2251 u8 source_l3_address[16][0x8];
2252
Matan Barakb4ff3a32016-02-09 14:57:42 +02002253 u8 reserved_at_80[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002254 u8 vlan_valid[0x1];
2255 u8 vlan_id[0xc];
2256 u8 source_mac_47_32[0x10];
2257
2258 u8 source_mac_31_0[0x20];
2259
Matan Barakb4ff3a32016-02-09 14:57:42 +02002260 u8 reserved_at_c0[0x14];
Saeed Mahameede2816822015-05-28 22:28:40 +03002261 u8 roce_l3_type[0x4];
2262 u8 roce_version[0x8];
2263
Matan Barakb4ff3a32016-02-09 14:57:42 +02002264 u8 reserved_at_e0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002265};
2266
2267union mlx5_ifc_hca_cap_union_bits {
2268 struct mlx5_ifc_cmd_hca_cap_bits cmd_hca_cap;
2269 struct mlx5_ifc_odp_cap_bits odp_cap;
2270 struct mlx5_ifc_atomic_caps_bits atomic_caps;
2271 struct mlx5_ifc_roce_cap_bits roce_cap;
2272 struct mlx5_ifc_per_protocol_networking_offload_caps_bits per_protocol_networking_offload_caps;
2273 struct mlx5_ifc_flow_table_nic_cap_bits flow_table_nic_cap;
Saeed Mahameed495716b2015-12-01 18:03:19 +02002274 struct mlx5_ifc_flow_table_eswitch_cap_bits flow_table_eswitch_cap;
Saeed Mahameedd6666752015-12-01 18:03:22 +02002275 struct mlx5_ifc_e_switch_cap_bits e_switch_cap;
Sagi Grimberg3f0393a2016-02-23 10:25:23 +02002276 struct mlx5_ifc_vector_calc_cap_bits vector_calc_cap;
Saeed Mahameed74862162016-06-09 15:11:34 +03002277 struct mlx5_ifc_qos_cap_bits qos_cap;
Ilan Tayarie29341f2017-03-13 20:05:45 +02002278 struct mlx5_ifc_fpga_cap_bits fpga_cap;
Matan Barakb4ff3a32016-02-09 14:57:42 +02002279 u8 reserved_at_0[0x8000];
Saeed Mahameede2816822015-05-28 22:28:40 +03002280};
2281
2282enum {
2283 MLX5_FLOW_CONTEXT_ACTION_ALLOW = 0x1,
2284 MLX5_FLOW_CONTEXT_ACTION_DROP = 0x2,
2285 MLX5_FLOW_CONTEXT_ACTION_FWD_DEST = 0x4,
Amir Vadai9dc0b282016-05-13 12:55:39 +00002286 MLX5_FLOW_CONTEXT_ACTION_COUNT = 0x8,
Hadar Hen Zion7adbde22016-08-03 15:08:33 +03002287 MLX5_FLOW_CONTEXT_ACTION_ENCAP = 0x10,
2288 MLX5_FLOW_CONTEXT_ACTION_DECAP = 0x20,
Or Gerlitz2a69cb92017-01-19 19:31:25 +02002289 MLX5_FLOW_CONTEXT_ACTION_MOD_HDR = 0x40,
Saeed Mahameede2816822015-05-28 22:28:40 +03002290};
2291
2292struct mlx5_ifc_flow_context_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002293 u8 reserved_at_0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002294
2295 u8 group_id[0x20];
2296
Matan Barakb4ff3a32016-02-09 14:57:42 +02002297 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002298 u8 flow_tag[0x18];
2299
Matan Barakb4ff3a32016-02-09 14:57:42 +02002300 u8 reserved_at_60[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03002301 u8 action[0x10];
2302
Matan Barakb4ff3a32016-02-09 14:57:42 +02002303 u8 reserved_at_80[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002304 u8 destination_list_size[0x18];
2305
Amir Vadai9dc0b282016-05-13 12:55:39 +00002306 u8 reserved_at_a0[0x8];
2307 u8 flow_counter_list_size[0x18];
2308
Hadar Hen Zion7adbde22016-08-03 15:08:33 +03002309 u8 encap_id[0x20];
2310
Or Gerlitz2a69cb92017-01-19 19:31:25 +02002311 u8 modify_header_id[0x20];
2312
2313 u8 reserved_at_100[0x100];
Saeed Mahameede2816822015-05-28 22:28:40 +03002314
2315 struct mlx5_ifc_fte_match_param_bits match_value;
2316
Matan Barakb4ff3a32016-02-09 14:57:42 +02002317 u8 reserved_at_1200[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03002318
Amir Vadai9dc0b282016-05-13 12:55:39 +00002319 union mlx5_ifc_dest_format_struct_flow_counter_list_auto_bits destination[0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002320};
2321
2322enum {
2323 MLX5_XRC_SRQC_STATE_GOOD = 0x0,
2324 MLX5_XRC_SRQC_STATE_ERROR = 0x1,
2325};
2326
2327struct mlx5_ifc_xrc_srqc_bits {
2328 u8 state[0x4];
2329 u8 log_xrc_srq_size[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002330 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002331
2332 u8 wq_signature[0x1];
2333 u8 cont_srq[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002334 u8 reserved_at_22[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002335 u8 rlky[0x1];
2336 u8 basic_cyclic_rcv_wqe[0x1];
2337 u8 log_rq_stride[0x3];
2338 u8 xrcd[0x18];
2339
2340 u8 page_offset[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002341 u8 reserved_at_46[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002342 u8 cqn[0x18];
2343
Matan Barakb4ff3a32016-02-09 14:57:42 +02002344 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002345
2346 u8 user_index_equal_xrc_srqn[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002347 u8 reserved_at_81[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002348 u8 log_page_size[0x6];
2349 u8 user_index[0x18];
2350
Matan Barakb4ff3a32016-02-09 14:57:42 +02002351 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002352
Matan Barakb4ff3a32016-02-09 14:57:42 +02002353 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002354 u8 pd[0x18];
2355
2356 u8 lwm[0x10];
2357 u8 wqe_cnt[0x10];
2358
Matan Barakb4ff3a32016-02-09 14:57:42 +02002359 u8 reserved_at_100[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03002360
2361 u8 db_record_addr_h[0x20];
2362
2363 u8 db_record_addr_l[0x1e];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002364 u8 reserved_at_17e[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002365
Matan Barakb4ff3a32016-02-09 14:57:42 +02002366 u8 reserved_at_180[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03002367};
2368
2369struct mlx5_ifc_traffic_counter_bits {
2370 u8 packets[0x40];
2371
2372 u8 octets[0x40];
2373};
2374
2375struct mlx5_ifc_tisc_bits {
Aviv Heller84df61e2016-05-10 13:47:50 +03002376 u8 strict_lag_tx_port_affinity[0x1];
2377 u8 reserved_at_1[0x3];
2378 u8 lag_tx_port_affinity[0x04];
2379
2380 u8 reserved_at_8[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002381 u8 prio[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002382 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03002383
Matan Barakb4ff3a32016-02-09 14:57:42 +02002384 u8 reserved_at_20[0x100];
Saeed Mahameede2816822015-05-28 22:28:40 +03002385
Matan Barakb4ff3a32016-02-09 14:57:42 +02002386 u8 reserved_at_120[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002387 u8 transport_domain[0x18];
2388
Erez Shitrit500a3d02017-04-13 06:36:51 +03002389 u8 reserved_at_140[0x8];
2390 u8 underlay_qpn[0x18];
2391 u8 reserved_at_160[0x3a0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002392};
2393
2394enum {
2395 MLX5_TIRC_DISP_TYPE_DIRECT = 0x0,
2396 MLX5_TIRC_DISP_TYPE_INDIRECT = 0x1,
2397};
2398
2399enum {
2400 MLX5_TIRC_LRO_ENABLE_MASK_IPV4_LRO = 0x1,
2401 MLX5_TIRC_LRO_ENABLE_MASK_IPV6_LRO = 0x2,
2402};
2403
2404enum {
Saeed Mahameed2be69672015-07-23 23:35:56 +03002405 MLX5_RX_HASH_FN_NONE = 0x0,
2406 MLX5_RX_HASH_FN_INVERTED_XOR8 = 0x1,
2407 MLX5_RX_HASH_FN_TOEPLITZ = 0x2,
Saeed Mahameede2816822015-05-28 22:28:40 +03002408};
2409
2410enum {
2411 MLX5_TIRC_SELF_LB_BLOCK_BLOCK_UNICAST_ = 0x1,
2412 MLX5_TIRC_SELF_LB_BLOCK_BLOCK_MULTICAST_ = 0x2,
2413};
2414
2415struct mlx5_ifc_tirc_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002416 u8 reserved_at_0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002417
2418 u8 disp_type[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002419 u8 reserved_at_24[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03002420
Matan Barakb4ff3a32016-02-09 14:57:42 +02002421 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03002422
Matan Barakb4ff3a32016-02-09 14:57:42 +02002423 u8 reserved_at_80[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002424 u8 lro_timeout_period_usecs[0x10];
2425 u8 lro_enable_mask[0x4];
2426 u8 lro_max_ip_payload_size[0x8];
2427
Matan Barakb4ff3a32016-02-09 14:57:42 +02002428 u8 reserved_at_a0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03002429
Matan Barakb4ff3a32016-02-09 14:57:42 +02002430 u8 reserved_at_e0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002431 u8 inline_rqn[0x18];
2432
2433 u8 rx_hash_symmetric[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002434 u8 reserved_at_101[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002435 u8 tunneled_offload_en[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002436 u8 reserved_at_103[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03002437 u8 indirect_table[0x18];
2438
2439 u8 rx_hash_fn[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002440 u8 reserved_at_124[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002441 u8 self_lb_block[0x2];
2442 u8 transport_domain[0x18];
2443
2444 u8 rx_hash_toeplitz_key[10][0x20];
2445
2446 struct mlx5_ifc_rx_hash_field_select_bits rx_hash_field_selector_outer;
2447
2448 struct mlx5_ifc_rx_hash_field_select_bits rx_hash_field_selector_inner;
2449
Matan Barakb4ff3a32016-02-09 14:57:42 +02002450 u8 reserved_at_2c0[0x4c0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002451};
2452
2453enum {
2454 MLX5_SRQC_STATE_GOOD = 0x0,
2455 MLX5_SRQC_STATE_ERROR = 0x1,
2456};
2457
2458struct mlx5_ifc_srqc_bits {
2459 u8 state[0x4];
2460 u8 log_srq_size[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002461 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002462
2463 u8 wq_signature[0x1];
2464 u8 cont_srq[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002465 u8 reserved_at_22[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002466 u8 rlky[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002467 u8 reserved_at_24[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002468 u8 log_rq_stride[0x3];
2469 u8 xrcd[0x18];
2470
2471 u8 page_offset[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002472 u8 reserved_at_46[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002473 u8 cqn[0x18];
2474
Matan Barakb4ff3a32016-02-09 14:57:42 +02002475 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002476
Matan Barakb4ff3a32016-02-09 14:57:42 +02002477 u8 reserved_at_80[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002478 u8 log_page_size[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002479 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002480
Matan Barakb4ff3a32016-02-09 14:57:42 +02002481 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002482
Matan Barakb4ff3a32016-02-09 14:57:42 +02002483 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002484 u8 pd[0x18];
2485
2486 u8 lwm[0x10];
2487 u8 wqe_cnt[0x10];
2488
Matan Barakb4ff3a32016-02-09 14:57:42 +02002489 u8 reserved_at_100[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03002490
Haggai Abramonvsky01949d02015-06-04 19:30:38 +03002491 u8 dbr_addr[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03002492
Matan Barakb4ff3a32016-02-09 14:57:42 +02002493 u8 reserved_at_180[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03002494};
2495
2496enum {
2497 MLX5_SQC_STATE_RST = 0x0,
2498 MLX5_SQC_STATE_RDY = 0x1,
2499 MLX5_SQC_STATE_ERR = 0x3,
2500};
2501
2502struct mlx5_ifc_sqc_bits {
2503 u8 rlky[0x1];
2504 u8 cd_master[0x1];
2505 u8 fre[0x1];
2506 u8 flush_in_error_en[0x1];
Bodong Wang795b6092017-08-17 15:52:34 +03002507 u8 allow_multi_pkt_send_wqe[0x1];
Hadar Hen Zioncff92d72016-07-24 16:12:40 +03002508 u8 min_wqe_inline_mode[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002509 u8 state[0x4];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03002510 u8 reg_umr[0x1];
Ilan Tayari547eede2017-04-18 16:04:28 +03002511 u8 allow_swp[0x1];
Or Gerlitz40817cd2017-06-25 12:38:45 +03002512 u8 hairpin[0x1];
2513 u8 reserved_at_f[0x11];
Saeed Mahameede2816822015-05-28 22:28:40 +03002514
Matan Barakb4ff3a32016-02-09 14:57:42 +02002515 u8 reserved_at_20[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002516 u8 user_index[0x18];
2517
Matan Barakb4ff3a32016-02-09 14:57:42 +02002518 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002519 u8 cqn[0x18];
2520
Or Gerlitz40817cd2017-06-25 12:38:45 +03002521 u8 reserved_at_60[0x8];
2522 u8 hairpin_peer_rq[0x18];
2523
2524 u8 reserved_at_80[0x10];
2525 u8 hairpin_peer_vhca[0x10];
2526
2527 u8 reserved_at_a0[0x50];
Saeed Mahameede2816822015-05-28 22:28:40 +03002528
Saeed Mahameed74862162016-06-09 15:11:34 +03002529 u8 packet_pacing_rate_limit_index[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03002530 u8 tis_lst_sz[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002531 u8 reserved_at_110[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03002532
Matan Barakb4ff3a32016-02-09 14:57:42 +02002533 u8 reserved_at_120[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03002534
Matan Barakb4ff3a32016-02-09 14:57:42 +02002535 u8 reserved_at_160[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002536 u8 tis_num_0[0x18];
2537
2538 struct mlx5_ifc_wq_bits wq;
2539};
2540
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +03002541enum {
2542 SCHEDULING_CONTEXT_ELEMENT_TYPE_TSAR = 0x0,
2543 SCHEDULING_CONTEXT_ELEMENT_TYPE_VPORT = 0x1,
2544 SCHEDULING_CONTEXT_ELEMENT_TYPE_VPORT_TC = 0x2,
2545 SCHEDULING_CONTEXT_ELEMENT_TYPE_PARA_VPORT_TC = 0x3,
2546};
2547
2548struct mlx5_ifc_scheduling_context_bits {
2549 u8 element_type[0x8];
2550 u8 reserved_at_8[0x18];
2551
2552 u8 element_attributes[0x20];
2553
2554 u8 parent_element_id[0x20];
2555
2556 u8 reserved_at_60[0x40];
2557
2558 u8 bw_share[0x20];
2559
2560 u8 max_average_bw[0x20];
2561
2562 u8 reserved_at_e0[0x120];
2563};
2564
Saeed Mahameede2816822015-05-28 22:28:40 +03002565struct mlx5_ifc_rqtc_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002566 u8 reserved_at_0[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002567
Matan Barakb4ff3a32016-02-09 14:57:42 +02002568 u8 reserved_at_a0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03002569 u8 rqt_max_size[0x10];
2570
Matan Barakb4ff3a32016-02-09 14:57:42 +02002571 u8 reserved_at_c0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03002572 u8 rqt_actual_size[0x10];
2573
Matan Barakb4ff3a32016-02-09 14:57:42 +02002574 u8 reserved_at_e0[0x6a0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002575
2576 struct mlx5_ifc_rq_num_bits rq_num[0];
2577};
2578
2579enum {
2580 MLX5_RQC_MEM_RQ_TYPE_MEMORY_RQ_INLINE = 0x0,
2581 MLX5_RQC_MEM_RQ_TYPE_MEMORY_RQ_RMP = 0x1,
2582};
2583
2584enum {
2585 MLX5_RQC_STATE_RST = 0x0,
2586 MLX5_RQC_STATE_RDY = 0x1,
2587 MLX5_RQC_STATE_ERR = 0x3,
2588};
2589
2590struct mlx5_ifc_rqc_bits {
2591 u8 rlky[0x1];
Maor Gottlieb03404e82017-05-30 10:29:13 +03002592 u8 delay_drop_en[0x1];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03002593 u8 scatter_fcs[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002594 u8 vsd[0x1];
2595 u8 mem_rq_type[0x4];
2596 u8 state[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002597 u8 reserved_at_c[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002598 u8 flush_in_error_en[0x1];
Or Gerlitz40817cd2017-06-25 12:38:45 +03002599 u8 hairpin[0x1];
2600 u8 reserved_at_f[0x11];
Saeed Mahameede2816822015-05-28 22:28:40 +03002601
Matan Barakb4ff3a32016-02-09 14:57:42 +02002602 u8 reserved_at_20[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002603 u8 user_index[0x18];
2604
Matan Barakb4ff3a32016-02-09 14:57:42 +02002605 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002606 u8 cqn[0x18];
2607
2608 u8 counter_set_id[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002609 u8 reserved_at_68[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002610
Matan Barakb4ff3a32016-02-09 14:57:42 +02002611 u8 reserved_at_80[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002612 u8 rmpn[0x18];
2613
Or Gerlitz40817cd2017-06-25 12:38:45 +03002614 u8 reserved_at_a0[0x8];
2615 u8 hairpin_peer_sq[0x18];
2616
2617 u8 reserved_at_c0[0x10];
2618 u8 hairpin_peer_vhca[0x10];
2619
2620 u8 reserved_at_e0[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002621
2622 struct mlx5_ifc_wq_bits wq;
2623};
2624
2625enum {
2626 MLX5_RMPC_STATE_RDY = 0x1,
2627 MLX5_RMPC_STATE_ERR = 0x3,
2628};
2629
2630struct mlx5_ifc_rmpc_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002631 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002632 u8 state[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002633 u8 reserved_at_c[0x14];
Saeed Mahameede2816822015-05-28 22:28:40 +03002634
2635 u8 basic_cyclic_rcv_wqe[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002636 u8 reserved_at_21[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03002637
Matan Barakb4ff3a32016-02-09 14:57:42 +02002638 u8 reserved_at_40[0x140];
Saeed Mahameede2816822015-05-28 22:28:40 +03002639
2640 struct mlx5_ifc_wq_bits wq;
2641};
2642
Saeed Mahameede2816822015-05-28 22:28:40 +03002643struct mlx5_ifc_nic_vport_context_bits {
Hadar Hen Zioncff92d72016-07-24 16:12:40 +03002644 u8 reserved_at_0[0x5];
2645 u8 min_wqe_inline_mode[0x3];
Huy Nguyenbded7472017-05-30 09:42:53 +03002646 u8 reserved_at_8[0x15];
2647 u8 disable_mc_local_lb[0x1];
2648 u8 disable_uc_local_lb[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002649 u8 roce_en[0x1];
2650
Saeed Mahameedd82b7312015-12-01 18:03:14 +02002651 u8 arm_change_event[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002652 u8 reserved_at_21[0x1a];
Saeed Mahameedd82b7312015-12-01 18:03:14 +02002653 u8 event_on_mtu[0x1];
2654 u8 event_on_promisc_change[0x1];
2655 u8 event_on_vlan_change[0x1];
2656 u8 event_on_mc_address_change[0x1];
2657 u8 event_on_uc_address_change[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002658
Daniel Jurgens32f69e42018-01-04 17:25:36 +02002659 u8 reserved_at_40[0xc];
2660
2661 u8 affiliation_criteria[0x4];
2662 u8 affiliated_vhca_id[0x10];
2663
2664 u8 reserved_at_60[0xd0];
Saeed Mahameedd82b7312015-12-01 18:03:14 +02002665
2666 u8 mtu[0x10];
2667
Achiad Shochat9efa7522015-12-23 18:47:20 +02002668 u8 system_image_guid[0x40];
2669 u8 port_guid[0x40];
2670 u8 node_guid[0x40];
2671
Matan Barakb4ff3a32016-02-09 14:57:42 +02002672 u8 reserved_at_200[0x140];
Achiad Shochat9efa7522015-12-23 18:47:20 +02002673 u8 qkey_violation_counter[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002674 u8 reserved_at_350[0x430];
Saeed Mahameedd82b7312015-12-01 18:03:14 +02002675
2676 u8 promisc_uc[0x1];
2677 u8 promisc_mc[0x1];
2678 u8 promisc_all[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002679 u8 reserved_at_783[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002680 u8 allowed_list_type[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002681 u8 reserved_at_788[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03002682 u8 allowed_list_size[0xc];
2683
2684 struct mlx5_ifc_mac_address_layout_bits permanent_address;
2685
Matan Barakb4ff3a32016-02-09 14:57:42 +02002686 u8 reserved_at_7e0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002687
2688 u8 current_uc_mac_address[0][0x40];
2689};
2690
2691enum {
2692 MLX5_MKC_ACCESS_MODE_PA = 0x0,
2693 MLX5_MKC_ACCESS_MODE_MTT = 0x1,
2694 MLX5_MKC_ACCESS_MODE_KLMS = 0x2,
Artemy Kovalyovbcda1ac2017-01-02 11:37:41 +02002695 MLX5_MKC_ACCESS_MODE_KSM = 0x3,
Saeed Mahameede2816822015-05-28 22:28:40 +03002696};
2697
2698struct mlx5_ifc_mkc_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002699 u8 reserved_at_0[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002700 u8 free[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002701 u8 reserved_at_2[0xd];
Saeed Mahameede2816822015-05-28 22:28:40 +03002702 u8 small_fence_on_rdma_read_response[0x1];
2703 u8 umr_en[0x1];
2704 u8 a[0x1];
2705 u8 rw[0x1];
2706 u8 rr[0x1];
2707 u8 lw[0x1];
2708 u8 lr[0x1];
2709 u8 access_mode[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002710 u8 reserved_at_18[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002711
2712 u8 qpn[0x18];
2713 u8 mkey_7_0[0x8];
2714
Matan Barakb4ff3a32016-02-09 14:57:42 +02002715 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002716
2717 u8 length64[0x1];
2718 u8 bsf_en[0x1];
2719 u8 sync_umr[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002720 u8 reserved_at_63[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002721 u8 expected_sigerr_count[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002722 u8 reserved_at_66[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002723 u8 en_rinval[0x1];
2724 u8 pd[0x18];
2725
2726 u8 start_addr[0x40];
2727
2728 u8 len[0x40];
2729
2730 u8 bsf_octword_size[0x20];
2731
Matan Barakb4ff3a32016-02-09 14:57:42 +02002732 u8 reserved_at_120[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03002733
2734 u8 translations_octword_size[0x20];
2735
Matan Barakb4ff3a32016-02-09 14:57:42 +02002736 u8 reserved_at_1c0[0x1b];
Saeed Mahameede2816822015-05-28 22:28:40 +03002737 u8 log_page_size[0x5];
2738
Matan Barakb4ff3a32016-02-09 14:57:42 +02002739 u8 reserved_at_1e0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002740};
2741
2742struct mlx5_ifc_pkey_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002743 u8 reserved_at_0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03002744 u8 pkey[0x10];
2745};
2746
2747struct mlx5_ifc_array128_auto_bits {
2748 u8 array128_auto[16][0x8];
2749};
2750
2751struct mlx5_ifc_hca_vport_context_bits {
2752 u8 field_select[0x20];
2753
Matan Barakb4ff3a32016-02-09 14:57:42 +02002754 u8 reserved_at_20[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002755
2756 u8 sm_virt_aware[0x1];
2757 u8 has_smi[0x1];
2758 u8 has_raw[0x1];
2759 u8 grh_required[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002760 u8 reserved_at_104[0xc];
Majd Dibbiny707c4602015-06-04 19:30:41 +03002761 u8 port_physical_state[0x4];
2762 u8 vport_state_policy[0x4];
2763 u8 port_state[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002764 u8 vport_state[0x4];
2765
Matan Barakb4ff3a32016-02-09 14:57:42 +02002766 u8 reserved_at_120[0x20];
Majd Dibbiny707c4602015-06-04 19:30:41 +03002767
2768 u8 system_image_guid[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03002769
2770 u8 port_guid[0x40];
2771
2772 u8 node_guid[0x40];
2773
2774 u8 cap_mask1[0x20];
2775
2776 u8 cap_mask1_field_select[0x20];
2777
2778 u8 cap_mask2[0x20];
2779
2780 u8 cap_mask2_field_select[0x20];
2781
Matan Barakb4ff3a32016-02-09 14:57:42 +02002782 u8 reserved_at_280[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03002783
2784 u8 lid[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002785 u8 reserved_at_310[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002786 u8 init_type_reply[0x4];
2787 u8 lmc[0x3];
2788 u8 subnet_timeout[0x5];
2789
2790 u8 sm_lid[0x10];
2791 u8 sm_sl[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002792 u8 reserved_at_334[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03002793
2794 u8 qkey_violation_counter[0x10];
2795 u8 pkey_violation_counter[0x10];
2796
Matan Barakb4ff3a32016-02-09 14:57:42 +02002797 u8 reserved_at_360[0xca0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002798};
2799
Saeed Mahameedd6666752015-12-01 18:03:22 +02002800struct mlx5_ifc_esw_vport_context_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002801 u8 reserved_at_0[0x3];
Saeed Mahameedd6666752015-12-01 18:03:22 +02002802 u8 vport_svlan_strip[0x1];
2803 u8 vport_cvlan_strip[0x1];
2804 u8 vport_svlan_insert[0x1];
2805 u8 vport_cvlan_insert[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002806 u8 reserved_at_8[0x18];
Saeed Mahameedd6666752015-12-01 18:03:22 +02002807
Matan Barakb4ff3a32016-02-09 14:57:42 +02002808 u8 reserved_at_20[0x20];
Saeed Mahameedd6666752015-12-01 18:03:22 +02002809
2810 u8 svlan_cfi[0x1];
2811 u8 svlan_pcp[0x3];
2812 u8 svlan_id[0xc];
2813 u8 cvlan_cfi[0x1];
2814 u8 cvlan_pcp[0x3];
2815 u8 cvlan_id[0xc];
2816
Matan Barakb4ff3a32016-02-09 14:57:42 +02002817 u8 reserved_at_60[0x7a0];
Saeed Mahameedd6666752015-12-01 18:03:22 +02002818};
2819
Saeed Mahameede2816822015-05-28 22:28:40 +03002820enum {
2821 MLX5_EQC_STATUS_OK = 0x0,
2822 MLX5_EQC_STATUS_EQ_WRITE_FAILURE = 0xa,
2823};
2824
2825enum {
2826 MLX5_EQC_ST_ARMED = 0x9,
2827 MLX5_EQC_ST_FIRED = 0xa,
2828};
2829
2830struct mlx5_ifc_eqc_bits {
2831 u8 status[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002832 u8 reserved_at_4[0x9];
Saeed Mahameede2816822015-05-28 22:28:40 +03002833 u8 ec[0x1];
2834 u8 oi[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002835 u8 reserved_at_f[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03002836 u8 st[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002837 u8 reserved_at_18[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002838
Matan Barakb4ff3a32016-02-09 14:57:42 +02002839 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002840
Matan Barakb4ff3a32016-02-09 14:57:42 +02002841 u8 reserved_at_40[0x14];
Saeed Mahameede2816822015-05-28 22:28:40 +03002842 u8 page_offset[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002843 u8 reserved_at_5a[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03002844
Matan Barakb4ff3a32016-02-09 14:57:42 +02002845 u8 reserved_at_60[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002846 u8 log_eq_size[0x5];
2847 u8 uar_page[0x18];
2848
Matan Barakb4ff3a32016-02-09 14:57:42 +02002849 u8 reserved_at_80[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002850
Matan Barakb4ff3a32016-02-09 14:57:42 +02002851 u8 reserved_at_a0[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002852 u8 intr[0x8];
2853
Matan Barakb4ff3a32016-02-09 14:57:42 +02002854 u8 reserved_at_c0[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002855 u8 log_page_size[0x5];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002856 u8 reserved_at_c8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002857
Matan Barakb4ff3a32016-02-09 14:57:42 +02002858 u8 reserved_at_e0[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03002859
Matan Barakb4ff3a32016-02-09 14:57:42 +02002860 u8 reserved_at_140[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002861 u8 consumer_counter[0x18];
2862
Matan Barakb4ff3a32016-02-09 14:57:42 +02002863 u8 reserved_at_160[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002864 u8 producer_counter[0x18];
2865
Matan Barakb4ff3a32016-02-09 14:57:42 +02002866 u8 reserved_at_180[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03002867};
2868
2869enum {
2870 MLX5_DCTC_STATE_ACTIVE = 0x0,
2871 MLX5_DCTC_STATE_DRAINING = 0x1,
2872 MLX5_DCTC_STATE_DRAINED = 0x2,
2873};
2874
2875enum {
2876 MLX5_DCTC_CS_RES_DISABLE = 0x0,
2877 MLX5_DCTC_CS_RES_NA = 0x1,
2878 MLX5_DCTC_CS_RES_UP_TO_64B = 0x2,
2879};
2880
2881enum {
2882 MLX5_DCTC_MTU_256_BYTES = 0x1,
2883 MLX5_DCTC_MTU_512_BYTES = 0x2,
2884 MLX5_DCTC_MTU_1K_BYTES = 0x3,
2885 MLX5_DCTC_MTU_2K_BYTES = 0x4,
2886 MLX5_DCTC_MTU_4K_BYTES = 0x5,
2887};
2888
2889struct mlx5_ifc_dctc_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002890 u8 reserved_at_0[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002891 u8 state[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002892 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002893
Matan Barakb4ff3a32016-02-09 14:57:42 +02002894 u8 reserved_at_20[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002895 u8 user_index[0x18];
2896
Matan Barakb4ff3a32016-02-09 14:57:42 +02002897 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002898 u8 cqn[0x18];
2899
2900 u8 counter_set_id[0x8];
2901 u8 atomic_mode[0x4];
2902 u8 rre[0x1];
2903 u8 rwe[0x1];
2904 u8 rae[0x1];
2905 u8 atomic_like_write_en[0x1];
2906 u8 latency_sensitive[0x1];
2907 u8 rlky[0x1];
2908 u8 free_ar[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002909 u8 reserved_at_73[0xd];
Saeed Mahameede2816822015-05-28 22:28:40 +03002910
Matan Barakb4ff3a32016-02-09 14:57:42 +02002911 u8 reserved_at_80[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002912 u8 cs_res[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002913 u8 reserved_at_90[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002914 u8 min_rnr_nak[0x5];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002915 u8 reserved_at_98[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002916
Matan Barakb4ff3a32016-02-09 14:57:42 +02002917 u8 reserved_at_a0[0x8];
Saeed Mahameed74862162016-06-09 15:11:34 +03002918 u8 srqn_xrqn[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002919
Matan Barakb4ff3a32016-02-09 14:57:42 +02002920 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002921 u8 pd[0x18];
2922
2923 u8 tclass[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002924 u8 reserved_at_e8[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002925 u8 flow_label[0x14];
2926
2927 u8 dc_access_key[0x40];
2928
Matan Barakb4ff3a32016-02-09 14:57:42 +02002929 u8 reserved_at_140[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03002930 u8 mtu[0x3];
2931 u8 port[0x8];
2932 u8 pkey_index[0x10];
2933
Matan Barakb4ff3a32016-02-09 14:57:42 +02002934 u8 reserved_at_160[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002935 u8 my_addr_index[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002936 u8 reserved_at_170[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002937 u8 hop_limit[0x8];
2938
2939 u8 dc_access_key_violation_count[0x20];
2940
Matan Barakb4ff3a32016-02-09 14:57:42 +02002941 u8 reserved_at_1a0[0x14];
Saeed Mahameede2816822015-05-28 22:28:40 +03002942 u8 dei_cfi[0x1];
2943 u8 eth_prio[0x3];
2944 u8 ecn[0x2];
2945 u8 dscp[0x6];
2946
Matan Barakb4ff3a32016-02-09 14:57:42 +02002947 u8 reserved_at_1c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03002948};
2949
2950enum {
2951 MLX5_CQC_STATUS_OK = 0x0,
2952 MLX5_CQC_STATUS_CQ_OVERFLOW = 0x9,
2953 MLX5_CQC_STATUS_CQ_WRITE_FAIL = 0xa,
2954};
2955
2956enum {
2957 MLX5_CQC_CQE_SZ_64_BYTES = 0x0,
2958 MLX5_CQC_CQE_SZ_128_BYTES = 0x1,
2959};
2960
2961enum {
2962 MLX5_CQC_ST_SOLICITED_NOTIFICATION_REQUEST_ARMED = 0x6,
2963 MLX5_CQC_ST_NOTIFICATION_REQUEST_ARMED = 0x9,
2964 MLX5_CQC_ST_FIRED = 0xa,
2965};
2966
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03002967enum {
2968 MLX5_CQ_PERIOD_MODE_START_FROM_EQE = 0x0,
2969 MLX5_CQ_PERIOD_MODE_START_FROM_CQE = 0x1,
Saeed Mahameed74862162016-06-09 15:11:34 +03002970 MLX5_CQ_PERIOD_NUM_MODES
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03002971};
2972
Saeed Mahameede2816822015-05-28 22:28:40 +03002973struct mlx5_ifc_cqc_bits {
2974 u8 status[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002975 u8 reserved_at_4[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002976 u8 cqe_sz[0x3];
2977 u8 cc[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002978 u8 reserved_at_c[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002979 u8 scqe_break_moderation_en[0x1];
2980 u8 oi[0x1];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03002981 u8 cq_period_mode[0x2];
2982 u8 cqe_comp_en[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002983 u8 mini_cqe_res_format[0x2];
2984 u8 st[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002985 u8 reserved_at_18[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002986
Matan Barakb4ff3a32016-02-09 14:57:42 +02002987 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002988
Matan Barakb4ff3a32016-02-09 14:57:42 +02002989 u8 reserved_at_40[0x14];
Saeed Mahameede2816822015-05-28 22:28:40 +03002990 u8 page_offset[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002991 u8 reserved_at_5a[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03002992
Matan Barakb4ff3a32016-02-09 14:57:42 +02002993 u8 reserved_at_60[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002994 u8 log_cq_size[0x5];
2995 u8 uar_page[0x18];
2996
Matan Barakb4ff3a32016-02-09 14:57:42 +02002997 u8 reserved_at_80[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002998 u8 cq_period[0xc];
2999 u8 cq_max_count[0x10];
3000
Matan Barakb4ff3a32016-02-09 14:57:42 +02003001 u8 reserved_at_a0[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003002 u8 c_eqn[0x8];
3003
Matan Barakb4ff3a32016-02-09 14:57:42 +02003004 u8 reserved_at_c0[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03003005 u8 log_page_size[0x5];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003006 u8 reserved_at_c8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003007
Matan Barakb4ff3a32016-02-09 14:57:42 +02003008 u8 reserved_at_e0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003009
Matan Barakb4ff3a32016-02-09 14:57:42 +02003010 u8 reserved_at_100[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003011 u8 last_notified_index[0x18];
3012
Matan Barakb4ff3a32016-02-09 14:57:42 +02003013 u8 reserved_at_120[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003014 u8 last_solicit_index[0x18];
3015
Matan Barakb4ff3a32016-02-09 14:57:42 +02003016 u8 reserved_at_140[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003017 u8 consumer_counter[0x18];
3018
Matan Barakb4ff3a32016-02-09 14:57:42 +02003019 u8 reserved_at_160[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003020 u8 producer_counter[0x18];
3021
Matan Barakb4ff3a32016-02-09 14:57:42 +02003022 u8 reserved_at_180[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003023
3024 u8 dbr_addr[0x40];
3025};
3026
3027union mlx5_ifc_cong_control_roce_ecn_auto_bits {
3028 struct mlx5_ifc_cong_control_802_1qau_rp_bits cong_control_802_1qau_rp;
3029 struct mlx5_ifc_cong_control_r_roce_ecn_rp_bits cong_control_r_roce_ecn_rp;
3030 struct mlx5_ifc_cong_control_r_roce_ecn_np_bits cong_control_r_roce_ecn_np;
Matan Barakb4ff3a32016-02-09 14:57:42 +02003031 u8 reserved_at_0[0x800];
Saeed Mahameede2816822015-05-28 22:28:40 +03003032};
3033
3034struct mlx5_ifc_query_adapter_param_block_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02003035 u8 reserved_at_0[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003036
Matan Barakb4ff3a32016-02-09 14:57:42 +02003037 u8 reserved_at_c0[0x8];
Majd Dibbiny211e6c82015-06-04 19:30:42 +03003038 u8 ieee_vendor_id[0x18];
3039
Matan Barakb4ff3a32016-02-09 14:57:42 +02003040 u8 reserved_at_e0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003041 u8 vsd_vendor_id[0x10];
3042
3043 u8 vsd[208][0x8];
3044
3045 u8 vsd_contd_psid[16][0x8];
3046};
3047
Saeed Mahameed74862162016-06-09 15:11:34 +03003048enum {
3049 MLX5_XRQC_STATE_GOOD = 0x0,
3050 MLX5_XRQC_STATE_ERROR = 0x1,
3051};
3052
3053enum {
3054 MLX5_XRQC_TOPOLOGY_NO_SPECIAL_TOPOLOGY = 0x0,
3055 MLX5_XRQC_TOPOLOGY_TAG_MATCHING = 0x1,
3056};
3057
3058enum {
3059 MLX5_XRQC_OFFLOAD_RNDV = 0x1,
3060};
3061
3062struct mlx5_ifc_tag_matching_topology_context_bits {
3063 u8 log_matching_list_sz[0x4];
3064 u8 reserved_at_4[0xc];
3065 u8 append_next_index[0x10];
3066
3067 u8 sw_phase_cnt[0x10];
3068 u8 hw_phase_cnt[0x10];
3069
3070 u8 reserved_at_40[0x40];
3071};
3072
3073struct mlx5_ifc_xrqc_bits {
3074 u8 state[0x4];
3075 u8 rlkey[0x1];
3076 u8 reserved_at_5[0xf];
3077 u8 topology[0x4];
3078 u8 reserved_at_18[0x4];
3079 u8 offload[0x4];
3080
3081 u8 reserved_at_20[0x8];
3082 u8 user_index[0x18];
3083
3084 u8 reserved_at_40[0x8];
3085 u8 cqn[0x18];
3086
3087 u8 reserved_at_60[0xa0];
3088
3089 struct mlx5_ifc_tag_matching_topology_context_bits tag_matching_topology_context;
3090
Artemy Kovalyov6e446362017-08-15 11:59:02 +03003091 u8 reserved_at_180[0x280];
Saeed Mahameed74862162016-06-09 15:11:34 +03003092
3093 struct mlx5_ifc_wq_bits wq;
3094};
3095
Saeed Mahameede2816822015-05-28 22:28:40 +03003096union mlx5_ifc_modify_field_select_resize_field_select_auto_bits {
3097 struct mlx5_ifc_modify_field_select_bits modify_field_select;
3098 struct mlx5_ifc_resize_field_select_bits resize_field_select;
Matan Barakb4ff3a32016-02-09 14:57:42 +02003099 u8 reserved_at_0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003100};
3101
3102union mlx5_ifc_field_select_802_1_r_roce_auto_bits {
3103 struct mlx5_ifc_field_select_802_1qau_rp_bits field_select_802_1qau_rp;
3104 struct mlx5_ifc_field_select_r_roce_rp_bits field_select_r_roce_rp;
3105 struct mlx5_ifc_field_select_r_roce_np_bits field_select_r_roce_np;
Matan Barakb4ff3a32016-02-09 14:57:42 +02003106 u8 reserved_at_0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003107};
3108
3109union mlx5_ifc_eth_cntrs_grp_data_layout_auto_bits {
3110 struct mlx5_ifc_eth_802_3_cntrs_grp_data_layout_bits eth_802_3_cntrs_grp_data_layout;
3111 struct mlx5_ifc_eth_2863_cntrs_grp_data_layout_bits eth_2863_cntrs_grp_data_layout;
3112 struct mlx5_ifc_eth_2819_cntrs_grp_data_layout_bits eth_2819_cntrs_grp_data_layout;
3113 struct mlx5_ifc_eth_3635_cntrs_grp_data_layout_bits eth_3635_cntrs_grp_data_layout;
3114 struct mlx5_ifc_eth_extended_cntrs_grp_data_layout_bits eth_extended_cntrs_grp_data_layout;
3115 struct mlx5_ifc_eth_per_prio_grp_data_layout_bits eth_per_prio_grp_data_layout;
3116 struct mlx5_ifc_eth_per_traffic_grp_data_layout_bits eth_per_traffic_grp_data_layout;
Meny Yossefi1c64bf62016-02-18 18:15:00 +02003117 struct mlx5_ifc_ib_port_cntrs_grp_data_layout_bits ib_port_cntrs_grp_data_layout;
Saeed Mahameede2816822015-05-28 22:28:40 +03003118 struct mlx5_ifc_phys_layer_cntrs_bits phys_layer_cntrs;
Gal Pressmand8dc0502016-09-27 17:04:51 +03003119 struct mlx5_ifc_phys_layer_statistical_cntrs_bits phys_layer_statistical_cntrs;
Matan Barakb4ff3a32016-02-09 14:57:42 +02003120 u8 reserved_at_0[0x7c0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003121};
3122
Gal Pressman8ed1a632016-11-17 13:46:01 +02003123union mlx5_ifc_pcie_cntrs_grp_data_layout_auto_bits {
3124 struct mlx5_ifc_pcie_perf_cntrs_grp_data_layout_bits pcie_perf_cntrs_grp_data_layout;
3125 u8 reserved_at_0[0x7c0];
3126};
3127
Saeed Mahameede2816822015-05-28 22:28:40 +03003128union mlx5_ifc_event_auto_bits {
3129 struct mlx5_ifc_comp_event_bits comp_event;
3130 struct mlx5_ifc_dct_events_bits dct_events;
3131 struct mlx5_ifc_qp_events_bits qp_events;
3132 struct mlx5_ifc_wqe_associated_page_fault_event_bits wqe_associated_page_fault_event;
3133 struct mlx5_ifc_rdma_page_fault_event_bits rdma_page_fault_event;
3134 struct mlx5_ifc_cq_error_bits cq_error;
3135 struct mlx5_ifc_dropped_packet_logged_bits dropped_packet_logged;
3136 struct mlx5_ifc_port_state_change_event_bits port_state_change_event;
3137 struct mlx5_ifc_gpio_event_bits gpio_event;
3138 struct mlx5_ifc_db_bf_congestion_event_bits db_bf_congestion_event;
3139 struct mlx5_ifc_stall_vl_event_bits stall_vl_event;
3140 struct mlx5_ifc_cmd_inter_comp_event_bits cmd_inter_comp_event;
Matan Barakb4ff3a32016-02-09 14:57:42 +02003141 u8 reserved_at_0[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003142};
3143
3144struct mlx5_ifc_health_buffer_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02003145 u8 reserved_at_0[0x100];
Saeed Mahameede2816822015-05-28 22:28:40 +03003146
3147 u8 assert_existptr[0x20];
3148
3149 u8 assert_callra[0x20];
3150
Matan Barakb4ff3a32016-02-09 14:57:42 +02003151 u8 reserved_at_140[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003152
3153 u8 fw_version[0x20];
3154
3155 u8 hw_id[0x20];
3156
Matan Barakb4ff3a32016-02-09 14:57:42 +02003157 u8 reserved_at_1c0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003158
3159 u8 irisc_index[0x8];
3160 u8 synd[0x8];
3161 u8 ext_synd[0x10];
3162};
3163
3164struct mlx5_ifc_register_loopback_control_bits {
3165 u8 no_lb[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003166 u8 reserved_at_1[0x7];
Saeed Mahameede2816822015-05-28 22:28:40 +03003167 u8 port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003168 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003169
Matan Barakb4ff3a32016-02-09 14:57:42 +02003170 u8 reserved_at_20[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03003171};
3172
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +03003173struct mlx5_ifc_vport_tc_element_bits {
3174 u8 traffic_class[0x4];
3175 u8 reserved_at_4[0xc];
3176 u8 vport_number[0x10];
3177};
3178
3179struct mlx5_ifc_vport_element_bits {
3180 u8 reserved_at_0[0x10];
3181 u8 vport_number[0x10];
3182};
3183
3184enum {
3185 TSAR_ELEMENT_TSAR_TYPE_DWRR = 0x0,
3186 TSAR_ELEMENT_TSAR_TYPE_ROUND_ROBIN = 0x1,
3187 TSAR_ELEMENT_TSAR_TYPE_ETS = 0x2,
3188};
3189
3190struct mlx5_ifc_tsar_element_bits {
3191 u8 reserved_at_0[0x8];
3192 u8 tsar_type[0x8];
3193 u8 reserved_at_10[0x10];
3194};
3195
Majd Dibbiny8812c242017-02-09 14:20:12 +02003196enum {
3197 MLX5_TEARDOWN_HCA_OUT_FORCE_STATE_SUCCESS = 0x0,
3198 MLX5_TEARDOWN_HCA_OUT_FORCE_STATE_FAIL = 0x1,
3199};
3200
Saeed Mahameede2816822015-05-28 22:28:40 +03003201struct mlx5_ifc_teardown_hca_out_bits {
3202 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003203 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003204
3205 u8 syndrome[0x20];
3206
Majd Dibbiny8812c242017-02-09 14:20:12 +02003207 u8 reserved_at_40[0x3f];
3208
3209 u8 force_state[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03003210};
3211
3212enum {
3213 MLX5_TEARDOWN_HCA_IN_PROFILE_GRACEFUL_CLOSE = 0x0,
Majd Dibbiny8812c242017-02-09 14:20:12 +02003214 MLX5_TEARDOWN_HCA_IN_PROFILE_FORCE_CLOSE = 0x1,
Saeed Mahameede2816822015-05-28 22:28:40 +03003215};
3216
3217struct mlx5_ifc_teardown_hca_in_bits {
3218 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003219 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003220
Matan Barakb4ff3a32016-02-09 14:57:42 +02003221 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003222 u8 op_mod[0x10];
3223
Matan Barakb4ff3a32016-02-09 14:57:42 +02003224 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003225 u8 profile[0x10];
3226
Matan Barakb4ff3a32016-02-09 14:57:42 +02003227 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003228};
3229
3230struct mlx5_ifc_sqerr2rts_qp_out_bits {
3231 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003232 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003233
3234 u8 syndrome[0x20];
3235
Matan Barakb4ff3a32016-02-09 14:57:42 +02003236 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003237};
3238
3239struct mlx5_ifc_sqerr2rts_qp_in_bits {
3240 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003241 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003242
Matan Barakb4ff3a32016-02-09 14:57:42 +02003243 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003244 u8 op_mod[0x10];
3245
Matan Barakb4ff3a32016-02-09 14:57:42 +02003246 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003247 u8 qpn[0x18];
3248
Matan Barakb4ff3a32016-02-09 14:57:42 +02003249 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003250
3251 u8 opt_param_mask[0x20];
3252
Matan Barakb4ff3a32016-02-09 14:57:42 +02003253 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003254
3255 struct mlx5_ifc_qpc_bits qpc;
3256
Matan Barakb4ff3a32016-02-09 14:57:42 +02003257 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03003258};
3259
3260struct mlx5_ifc_sqd2rts_qp_out_bits {
3261 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003262 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003263
3264 u8 syndrome[0x20];
3265
Matan Barakb4ff3a32016-02-09 14:57:42 +02003266 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003267};
3268
3269struct mlx5_ifc_sqd2rts_qp_in_bits {
3270 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003271 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003272
Matan Barakb4ff3a32016-02-09 14:57:42 +02003273 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003274 u8 op_mod[0x10];
3275
Matan Barakb4ff3a32016-02-09 14:57:42 +02003276 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003277 u8 qpn[0x18];
3278
Matan Barakb4ff3a32016-02-09 14:57:42 +02003279 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003280
3281 u8 opt_param_mask[0x20];
3282
Matan Barakb4ff3a32016-02-09 14:57:42 +02003283 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003284
3285 struct mlx5_ifc_qpc_bits qpc;
3286
Matan Barakb4ff3a32016-02-09 14:57:42 +02003287 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03003288};
3289
3290struct mlx5_ifc_set_roce_address_out_bits {
3291 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003292 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003293
3294 u8 syndrome[0x20];
3295
Matan Barakb4ff3a32016-02-09 14:57:42 +02003296 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003297};
3298
3299struct mlx5_ifc_set_roce_address_in_bits {
3300 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003301 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003302
Matan Barakb4ff3a32016-02-09 14:57:42 +02003303 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003304 u8 op_mod[0x10];
3305
3306 u8 roce_address_index[0x10];
Daniel Jurgens32f69e42018-01-04 17:25:36 +02003307 u8 reserved_at_50[0xc];
3308 u8 vhca_port_num[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03003309
Matan Barakb4ff3a32016-02-09 14:57:42 +02003310 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003311
3312 struct mlx5_ifc_roce_addr_layout_bits roce_address;
3313};
3314
3315struct mlx5_ifc_set_mad_demux_out_bits {
3316 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003317 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003318
3319 u8 syndrome[0x20];
3320
Matan Barakb4ff3a32016-02-09 14:57:42 +02003321 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003322};
3323
3324enum {
3325 MLX5_SET_MAD_DEMUX_IN_DEMUX_MODE_PASS_ALL = 0x0,
3326 MLX5_SET_MAD_DEMUX_IN_DEMUX_MODE_SELECTIVE = 0x2,
3327};
3328
3329struct mlx5_ifc_set_mad_demux_in_bits {
3330 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003331 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003332
Matan Barakb4ff3a32016-02-09 14:57:42 +02003333 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003334 u8 op_mod[0x10];
3335
Matan Barakb4ff3a32016-02-09 14:57:42 +02003336 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003337
Matan Barakb4ff3a32016-02-09 14:57:42 +02003338 u8 reserved_at_60[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03003339 u8 demux_mode[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003340 u8 reserved_at_68[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003341};
3342
3343struct mlx5_ifc_set_l2_table_entry_out_bits {
3344 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003345 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003346
3347 u8 syndrome[0x20];
3348
Matan Barakb4ff3a32016-02-09 14:57:42 +02003349 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003350};
3351
3352struct mlx5_ifc_set_l2_table_entry_in_bits {
3353 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003354 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003355
Matan Barakb4ff3a32016-02-09 14:57:42 +02003356 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003357 u8 op_mod[0x10];
3358
Matan Barakb4ff3a32016-02-09 14:57:42 +02003359 u8 reserved_at_40[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03003360
Matan Barakb4ff3a32016-02-09 14:57:42 +02003361 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003362 u8 table_index[0x18];
3363
Matan Barakb4ff3a32016-02-09 14:57:42 +02003364 u8 reserved_at_c0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003365
Matan Barakb4ff3a32016-02-09 14:57:42 +02003366 u8 reserved_at_e0[0x13];
Saeed Mahameede2816822015-05-28 22:28:40 +03003367 u8 vlan_valid[0x1];
3368 u8 vlan[0xc];
3369
3370 struct mlx5_ifc_mac_address_layout_bits mac_address;
3371
Matan Barakb4ff3a32016-02-09 14:57:42 +02003372 u8 reserved_at_140[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003373};
3374
3375struct mlx5_ifc_set_issi_out_bits {
3376 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003377 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003378
3379 u8 syndrome[0x20];
3380
Matan Barakb4ff3a32016-02-09 14:57:42 +02003381 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003382};
3383
3384struct mlx5_ifc_set_issi_in_bits {
3385 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003386 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003387
Matan Barakb4ff3a32016-02-09 14:57:42 +02003388 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003389 u8 op_mod[0x10];
3390
Matan Barakb4ff3a32016-02-09 14:57:42 +02003391 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003392 u8 current_issi[0x10];
3393
Matan Barakb4ff3a32016-02-09 14:57:42 +02003394 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003395};
3396
3397struct mlx5_ifc_set_hca_cap_out_bits {
3398 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003399 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003400
3401 u8 syndrome[0x20];
3402
Matan Barakb4ff3a32016-02-09 14:57:42 +02003403 u8 reserved_at_40[0x40];
Eli Cohenb7755162014-10-02 12:19:44 +03003404};
3405
3406struct mlx5_ifc_set_hca_cap_in_bits {
3407 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003408 u8 reserved_at_10[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +03003409
Matan Barakb4ff3a32016-02-09 14:57:42 +02003410 u8 reserved_at_20[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +03003411 u8 op_mod[0x10];
3412
Matan Barakb4ff3a32016-02-09 14:57:42 +02003413 u8 reserved_at_40[0x40];
Eli Cohenb7755162014-10-02 12:19:44 +03003414
Saeed Mahameede2816822015-05-28 22:28:40 +03003415 union mlx5_ifc_hca_cap_union_bits capability;
3416};
3417
Maor Gottlieb26a81452015-12-10 17:12:39 +02003418enum {
3419 MLX5_SET_FTE_MODIFY_ENABLE_MASK_ACTION = 0x0,
3420 MLX5_SET_FTE_MODIFY_ENABLE_MASK_FLOW_TAG = 0x1,
3421 MLX5_SET_FTE_MODIFY_ENABLE_MASK_DESTINATION_LIST = 0x2,
3422 MLX5_SET_FTE_MODIFY_ENABLE_MASK_FLOW_COUNTERS = 0x3
3423};
3424
Saeed Mahameede2816822015-05-28 22:28:40 +03003425struct mlx5_ifc_set_fte_out_bits {
3426 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003427 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003428
3429 u8 syndrome[0x20];
3430
Matan Barakb4ff3a32016-02-09 14:57:42 +02003431 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003432};
3433
3434struct mlx5_ifc_set_fte_in_bits {
3435 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003436 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003437
Matan Barakb4ff3a32016-02-09 14:57:42 +02003438 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003439 u8 op_mod[0x10];
3440
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03003441 u8 other_vport[0x1];
3442 u8 reserved_at_41[0xf];
3443 u8 vport_number[0x10];
3444
3445 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003446
3447 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003448 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003449
Matan Barakb4ff3a32016-02-09 14:57:42 +02003450 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003451 u8 table_id[0x18];
3452
Matan Barakb4ff3a32016-02-09 14:57:42 +02003453 u8 reserved_at_c0[0x18];
Maor Gottlieb26a81452015-12-10 17:12:39 +02003454 u8 modify_enable_mask[0x8];
3455
Matan Barakb4ff3a32016-02-09 14:57:42 +02003456 u8 reserved_at_e0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003457
3458 u8 flow_index[0x20];
3459
Matan Barakb4ff3a32016-02-09 14:57:42 +02003460 u8 reserved_at_120[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003461
3462 struct mlx5_ifc_flow_context_bits flow_context;
3463};
3464
3465struct mlx5_ifc_rts2rts_qp_out_bits {
3466 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003467 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003468
3469 u8 syndrome[0x20];
3470
Matan Barakb4ff3a32016-02-09 14:57:42 +02003471 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003472};
3473
3474struct mlx5_ifc_rts2rts_qp_in_bits {
3475 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003476 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003477
Matan Barakb4ff3a32016-02-09 14:57:42 +02003478 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003479 u8 op_mod[0x10];
3480
Matan Barakb4ff3a32016-02-09 14:57:42 +02003481 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003482 u8 qpn[0x18];
3483
Matan Barakb4ff3a32016-02-09 14:57:42 +02003484 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003485
3486 u8 opt_param_mask[0x20];
3487
Matan Barakb4ff3a32016-02-09 14:57:42 +02003488 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003489
3490 struct mlx5_ifc_qpc_bits qpc;
3491
Matan Barakb4ff3a32016-02-09 14:57:42 +02003492 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03003493};
3494
3495struct mlx5_ifc_rtr2rts_qp_out_bits {
3496 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003497 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003498
3499 u8 syndrome[0x20];
3500
Matan Barakb4ff3a32016-02-09 14:57:42 +02003501 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003502};
3503
3504struct mlx5_ifc_rtr2rts_qp_in_bits {
3505 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003506 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003507
Matan Barakb4ff3a32016-02-09 14:57:42 +02003508 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003509 u8 op_mod[0x10];
3510
Matan Barakb4ff3a32016-02-09 14:57:42 +02003511 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003512 u8 qpn[0x18];
3513
Matan Barakb4ff3a32016-02-09 14:57:42 +02003514 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003515
3516 u8 opt_param_mask[0x20];
3517
Matan Barakb4ff3a32016-02-09 14:57:42 +02003518 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003519
3520 struct mlx5_ifc_qpc_bits qpc;
3521
Matan Barakb4ff3a32016-02-09 14:57:42 +02003522 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03003523};
3524
3525struct mlx5_ifc_rst2init_qp_out_bits {
3526 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003527 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003528
3529 u8 syndrome[0x20];
3530
Matan Barakb4ff3a32016-02-09 14:57:42 +02003531 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003532};
3533
3534struct mlx5_ifc_rst2init_qp_in_bits {
3535 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003536 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003537
Matan Barakb4ff3a32016-02-09 14:57:42 +02003538 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003539 u8 op_mod[0x10];
3540
Matan Barakb4ff3a32016-02-09 14:57:42 +02003541 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003542 u8 qpn[0x18];
3543
Matan Barakb4ff3a32016-02-09 14:57:42 +02003544 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003545
3546 u8 opt_param_mask[0x20];
3547
Matan Barakb4ff3a32016-02-09 14:57:42 +02003548 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003549
3550 struct mlx5_ifc_qpc_bits qpc;
3551
Matan Barakb4ff3a32016-02-09 14:57:42 +02003552 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03003553};
3554
Saeed Mahameed74862162016-06-09 15:11:34 +03003555struct mlx5_ifc_query_xrq_out_bits {
3556 u8 status[0x8];
3557 u8 reserved_at_8[0x18];
3558
3559 u8 syndrome[0x20];
3560
3561 u8 reserved_at_40[0x40];
3562
3563 struct mlx5_ifc_xrqc_bits xrq_context;
3564};
3565
3566struct mlx5_ifc_query_xrq_in_bits {
3567 u8 opcode[0x10];
3568 u8 reserved_at_10[0x10];
3569
3570 u8 reserved_at_20[0x10];
3571 u8 op_mod[0x10];
3572
3573 u8 reserved_at_40[0x8];
3574 u8 xrqn[0x18];
3575
3576 u8 reserved_at_60[0x20];
3577};
3578
Saeed Mahameede2816822015-05-28 22:28:40 +03003579struct mlx5_ifc_query_xrc_srq_out_bits {
3580 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003581 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003582
3583 u8 syndrome[0x20];
3584
Matan Barakb4ff3a32016-02-09 14:57:42 +02003585 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003586
3587 struct mlx5_ifc_xrc_srqc_bits xrc_srq_context_entry;
3588
Matan Barakb4ff3a32016-02-09 14:57:42 +02003589 u8 reserved_at_280[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03003590
3591 u8 pas[0][0x40];
3592};
3593
3594struct mlx5_ifc_query_xrc_srq_in_bits {
3595 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003596 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003597
Matan Barakb4ff3a32016-02-09 14:57:42 +02003598 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003599 u8 op_mod[0x10];
3600
Matan Barakb4ff3a32016-02-09 14:57:42 +02003601 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003602 u8 xrc_srqn[0x18];
3603
Matan Barakb4ff3a32016-02-09 14:57:42 +02003604 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003605};
3606
3607enum {
3608 MLX5_QUERY_VPORT_STATE_OUT_STATE_DOWN = 0x0,
3609 MLX5_QUERY_VPORT_STATE_OUT_STATE_UP = 0x1,
3610};
3611
3612struct mlx5_ifc_query_vport_state_out_bits {
3613 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003614 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003615
3616 u8 syndrome[0x20];
3617
Matan Barakb4ff3a32016-02-09 14:57:42 +02003618 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003619
Matan Barakb4ff3a32016-02-09 14:57:42 +02003620 u8 reserved_at_60[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003621 u8 admin_state[0x4];
3622 u8 state[0x4];
3623};
3624
3625enum {
3626 MLX5_QUERY_VPORT_STATE_IN_OP_MOD_VNIC_VPORT = 0x0,
Saeed Mahameede7546512015-12-01 18:03:13 +02003627 MLX5_QUERY_VPORT_STATE_IN_OP_MOD_ESW_VPORT = 0x1,
Saeed Mahameede2816822015-05-28 22:28:40 +03003628};
3629
3630struct mlx5_ifc_query_vport_state_in_bits {
3631 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003632 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003633
Matan Barakb4ff3a32016-02-09 14:57:42 +02003634 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003635 u8 op_mod[0x10];
3636
3637 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003638 u8 reserved_at_41[0xf];
Saeed Mahameede2816822015-05-28 22:28:40 +03003639 u8 vport_number[0x10];
3640
Matan Barakb4ff3a32016-02-09 14:57:42 +02003641 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003642};
3643
3644struct mlx5_ifc_query_vport_counter_out_bits {
3645 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003646 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003647
3648 u8 syndrome[0x20];
3649
Matan Barakb4ff3a32016-02-09 14:57:42 +02003650 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003651
3652 struct mlx5_ifc_traffic_counter_bits received_errors;
3653
3654 struct mlx5_ifc_traffic_counter_bits transmit_errors;
3655
3656 struct mlx5_ifc_traffic_counter_bits received_ib_unicast;
3657
3658 struct mlx5_ifc_traffic_counter_bits transmitted_ib_unicast;
3659
3660 struct mlx5_ifc_traffic_counter_bits received_ib_multicast;
3661
3662 struct mlx5_ifc_traffic_counter_bits transmitted_ib_multicast;
3663
3664 struct mlx5_ifc_traffic_counter_bits received_eth_broadcast;
3665
3666 struct mlx5_ifc_traffic_counter_bits transmitted_eth_broadcast;
3667
3668 struct mlx5_ifc_traffic_counter_bits received_eth_unicast;
3669
3670 struct mlx5_ifc_traffic_counter_bits transmitted_eth_unicast;
3671
3672 struct mlx5_ifc_traffic_counter_bits received_eth_multicast;
3673
3674 struct mlx5_ifc_traffic_counter_bits transmitted_eth_multicast;
3675
Matan Barakb4ff3a32016-02-09 14:57:42 +02003676 u8 reserved_at_680[0xa00];
Saeed Mahameede2816822015-05-28 22:28:40 +03003677};
3678
3679enum {
3680 MLX5_QUERY_VPORT_COUNTER_IN_OP_MOD_VPORT_COUNTERS = 0x0,
3681};
3682
3683struct mlx5_ifc_query_vport_counter_in_bits {
3684 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003685 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003686
Matan Barakb4ff3a32016-02-09 14:57:42 +02003687 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003688 u8 op_mod[0x10];
3689
3690 u8 other_vport[0x1];
Meny Yossefib54ba272016-02-18 18:14:59 +02003691 u8 reserved_at_41[0xb];
3692 u8 port_num[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03003693 u8 vport_number[0x10];
3694
Matan Barakb4ff3a32016-02-09 14:57:42 +02003695 u8 reserved_at_60[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03003696
3697 u8 clear[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003698 u8 reserved_at_c1[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03003699
Matan Barakb4ff3a32016-02-09 14:57:42 +02003700 u8 reserved_at_e0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003701};
3702
3703struct mlx5_ifc_query_tis_out_bits {
3704 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003705 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003706
3707 u8 syndrome[0x20];
3708
Matan Barakb4ff3a32016-02-09 14:57:42 +02003709 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003710
3711 struct mlx5_ifc_tisc_bits tis_context;
3712};
3713
3714struct mlx5_ifc_query_tis_in_bits {
3715 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003716 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003717
Matan Barakb4ff3a32016-02-09 14:57:42 +02003718 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003719 u8 op_mod[0x10];
3720
Matan Barakb4ff3a32016-02-09 14:57:42 +02003721 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003722 u8 tisn[0x18];
3723
Matan Barakb4ff3a32016-02-09 14:57:42 +02003724 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003725};
3726
3727struct mlx5_ifc_query_tir_out_bits {
3728 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003729 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003730
3731 u8 syndrome[0x20];
3732
Matan Barakb4ff3a32016-02-09 14:57:42 +02003733 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003734
3735 struct mlx5_ifc_tirc_bits tir_context;
3736};
3737
3738struct mlx5_ifc_query_tir_in_bits {
3739 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003740 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003741
Matan Barakb4ff3a32016-02-09 14:57:42 +02003742 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003743 u8 op_mod[0x10];
3744
Matan Barakb4ff3a32016-02-09 14:57:42 +02003745 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003746 u8 tirn[0x18];
3747
Matan Barakb4ff3a32016-02-09 14:57:42 +02003748 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003749};
3750
3751struct mlx5_ifc_query_srq_out_bits {
3752 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003753 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003754
3755 u8 syndrome[0x20];
3756
Matan Barakb4ff3a32016-02-09 14:57:42 +02003757 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003758
3759 struct mlx5_ifc_srqc_bits srq_context_entry;
3760
Matan Barakb4ff3a32016-02-09 14:57:42 +02003761 u8 reserved_at_280[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03003762
3763 u8 pas[0][0x40];
3764};
3765
3766struct mlx5_ifc_query_srq_in_bits {
3767 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003768 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003769
Matan Barakb4ff3a32016-02-09 14:57:42 +02003770 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003771 u8 op_mod[0x10];
3772
Matan Barakb4ff3a32016-02-09 14:57:42 +02003773 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003774 u8 srqn[0x18];
3775
Matan Barakb4ff3a32016-02-09 14:57:42 +02003776 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003777};
3778
3779struct mlx5_ifc_query_sq_out_bits {
3780 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003781 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003782
3783 u8 syndrome[0x20];
3784
Matan Barakb4ff3a32016-02-09 14:57:42 +02003785 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003786
3787 struct mlx5_ifc_sqc_bits sq_context;
3788};
3789
3790struct mlx5_ifc_query_sq_in_bits {
3791 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003792 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003793
Matan Barakb4ff3a32016-02-09 14:57:42 +02003794 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003795 u8 op_mod[0x10];
3796
Matan Barakb4ff3a32016-02-09 14:57:42 +02003797 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003798 u8 sqn[0x18];
3799
Matan Barakb4ff3a32016-02-09 14:57:42 +02003800 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003801};
3802
3803struct mlx5_ifc_query_special_contexts_out_bits {
3804 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003805 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003806
3807 u8 syndrome[0x20];
3808
Saeed Mahameedec22eb52016-07-16 06:28:36 +03003809 u8 dump_fill_mkey[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003810
3811 u8 resd_lkey[0x20];
Artemy Kovalyovbcda1ac2017-01-02 11:37:41 +02003812
3813 u8 null_mkey[0x20];
3814
3815 u8 reserved_at_a0[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03003816};
3817
3818struct mlx5_ifc_query_special_contexts_in_bits {
3819 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003820 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003821
Matan Barakb4ff3a32016-02-09 14:57:42 +02003822 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003823 u8 op_mod[0x10];
3824
Matan Barakb4ff3a32016-02-09 14:57:42 +02003825 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003826};
3827
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +03003828struct mlx5_ifc_query_scheduling_element_out_bits {
3829 u8 opcode[0x10];
3830 u8 reserved_at_10[0x10];
3831
3832 u8 reserved_at_20[0x10];
3833 u8 op_mod[0x10];
3834
3835 u8 reserved_at_40[0xc0];
3836
3837 struct mlx5_ifc_scheduling_context_bits scheduling_context;
3838
3839 u8 reserved_at_300[0x100];
3840};
3841
3842enum {
3843 SCHEDULING_HIERARCHY_E_SWITCH = 0x2,
3844};
3845
3846struct mlx5_ifc_query_scheduling_element_in_bits {
3847 u8 opcode[0x10];
3848 u8 reserved_at_10[0x10];
3849
3850 u8 reserved_at_20[0x10];
3851 u8 op_mod[0x10];
3852
3853 u8 scheduling_hierarchy[0x8];
3854 u8 reserved_at_48[0x18];
3855
3856 u8 scheduling_element_id[0x20];
3857
3858 u8 reserved_at_80[0x180];
3859};
3860
Saeed Mahameede2816822015-05-28 22:28:40 +03003861struct mlx5_ifc_query_rqt_out_bits {
3862 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003863 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003864
3865 u8 syndrome[0x20];
3866
Matan Barakb4ff3a32016-02-09 14:57:42 +02003867 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003868
3869 struct mlx5_ifc_rqtc_bits rqt_context;
3870};
3871
3872struct mlx5_ifc_query_rqt_in_bits {
3873 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003874 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003875
Matan Barakb4ff3a32016-02-09 14:57:42 +02003876 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003877 u8 op_mod[0x10];
3878
Matan Barakb4ff3a32016-02-09 14:57:42 +02003879 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003880 u8 rqtn[0x18];
3881
Matan Barakb4ff3a32016-02-09 14:57:42 +02003882 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003883};
3884
3885struct mlx5_ifc_query_rq_out_bits {
3886 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003887 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003888
3889 u8 syndrome[0x20];
3890
Matan Barakb4ff3a32016-02-09 14:57:42 +02003891 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003892
3893 struct mlx5_ifc_rqc_bits rq_context;
3894};
3895
3896struct mlx5_ifc_query_rq_in_bits {
3897 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003898 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003899
Matan Barakb4ff3a32016-02-09 14:57:42 +02003900 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003901 u8 op_mod[0x10];
3902
Matan Barakb4ff3a32016-02-09 14:57:42 +02003903 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003904 u8 rqn[0x18];
3905
Matan Barakb4ff3a32016-02-09 14:57:42 +02003906 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003907};
3908
3909struct mlx5_ifc_query_roce_address_out_bits {
3910 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003911 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003912
3913 u8 syndrome[0x20];
3914
Matan Barakb4ff3a32016-02-09 14:57:42 +02003915 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003916
3917 struct mlx5_ifc_roce_addr_layout_bits roce_address;
3918};
3919
3920struct mlx5_ifc_query_roce_address_in_bits {
3921 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003922 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003923
Matan Barakb4ff3a32016-02-09 14:57:42 +02003924 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003925 u8 op_mod[0x10];
3926
3927 u8 roce_address_index[0x10];
Daniel Jurgens32f69e42018-01-04 17:25:36 +02003928 u8 reserved_at_50[0xc];
3929 u8 vhca_port_num[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03003930
Matan Barakb4ff3a32016-02-09 14:57:42 +02003931 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003932};
3933
3934struct mlx5_ifc_query_rmp_out_bits {
3935 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003936 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003937
3938 u8 syndrome[0x20];
3939
Matan Barakb4ff3a32016-02-09 14:57:42 +02003940 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003941
3942 struct mlx5_ifc_rmpc_bits rmp_context;
3943};
3944
3945struct mlx5_ifc_query_rmp_in_bits {
3946 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003947 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003948
Matan Barakb4ff3a32016-02-09 14:57:42 +02003949 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003950 u8 op_mod[0x10];
3951
Matan Barakb4ff3a32016-02-09 14:57:42 +02003952 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003953 u8 rmpn[0x18];
3954
Matan Barakb4ff3a32016-02-09 14:57:42 +02003955 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003956};
3957
3958struct mlx5_ifc_query_qp_out_bits {
3959 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003960 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003961
3962 u8 syndrome[0x20];
3963
Matan Barakb4ff3a32016-02-09 14:57:42 +02003964 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003965
3966 u8 opt_param_mask[0x20];
3967
Matan Barakb4ff3a32016-02-09 14:57:42 +02003968 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003969
3970 struct mlx5_ifc_qpc_bits qpc;
3971
Matan Barakb4ff3a32016-02-09 14:57:42 +02003972 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03003973
3974 u8 pas[0][0x40];
3975};
3976
3977struct mlx5_ifc_query_qp_in_bits {
3978 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003979 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003980
Matan Barakb4ff3a32016-02-09 14:57:42 +02003981 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003982 u8 op_mod[0x10];
3983
Matan Barakb4ff3a32016-02-09 14:57:42 +02003984 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003985 u8 qpn[0x18];
3986
Matan Barakb4ff3a32016-02-09 14:57:42 +02003987 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003988};
3989
3990struct mlx5_ifc_query_q_counter_out_bits {
3991 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003992 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003993
3994 u8 syndrome[0x20];
3995
Matan Barakb4ff3a32016-02-09 14:57:42 +02003996 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003997
3998 u8 rx_write_requests[0x20];
3999
Matan Barakb4ff3a32016-02-09 14:57:42 +02004000 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004001
4002 u8 rx_read_requests[0x20];
4003
Matan Barakb4ff3a32016-02-09 14:57:42 +02004004 u8 reserved_at_e0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004005
4006 u8 rx_atomic_requests[0x20];
4007
Matan Barakb4ff3a32016-02-09 14:57:42 +02004008 u8 reserved_at_120[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004009
4010 u8 rx_dct_connect[0x20];
4011
Matan Barakb4ff3a32016-02-09 14:57:42 +02004012 u8 reserved_at_160[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004013
4014 u8 out_of_buffer[0x20];
4015
Matan Barakb4ff3a32016-02-09 14:57:42 +02004016 u8 reserved_at_1a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004017
4018 u8 out_of_sequence[0x20];
4019
Saeed Mahameed74862162016-06-09 15:11:34 +03004020 u8 reserved_at_1e0[0x20];
4021
4022 u8 duplicate_request[0x20];
4023
4024 u8 reserved_at_220[0x20];
4025
4026 u8 rnr_nak_retry_err[0x20];
4027
4028 u8 reserved_at_260[0x20];
4029
4030 u8 packet_seq_err[0x20];
4031
4032 u8 reserved_at_2a0[0x20];
4033
4034 u8 implied_nak_seq_err[0x20];
4035
4036 u8 reserved_at_2e0[0x20];
4037
4038 u8 local_ack_timeout_err[0x20];
4039
Parav Pandit58dcb602017-06-19 07:19:37 +03004040 u8 reserved_at_320[0xa0];
4041
4042 u8 resp_local_length_error[0x20];
4043
4044 u8 req_local_length_error[0x20];
4045
4046 u8 resp_local_qp_error[0x20];
4047
4048 u8 local_operation_error[0x20];
4049
4050 u8 resp_local_protection[0x20];
4051
4052 u8 req_local_protection[0x20];
4053
4054 u8 resp_cqe_error[0x20];
4055
4056 u8 req_cqe_error[0x20];
4057
4058 u8 req_mw_binding[0x20];
4059
4060 u8 req_bad_response[0x20];
4061
4062 u8 req_remote_invalid_request[0x20];
4063
4064 u8 resp_remote_invalid_request[0x20];
4065
4066 u8 req_remote_access_errors[0x20];
4067
4068 u8 resp_remote_access_errors[0x20];
4069
4070 u8 req_remote_operation_errors[0x20];
4071
4072 u8 req_transport_retries_exceeded[0x20];
4073
4074 u8 cq_overflow[0x20];
4075
4076 u8 resp_cqe_flush_error[0x20];
4077
4078 u8 req_cqe_flush_error[0x20];
4079
4080 u8 reserved_at_620[0x1e0];
Saeed Mahameede2816822015-05-28 22:28:40 +03004081};
4082
4083struct mlx5_ifc_query_q_counter_in_bits {
4084 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004085 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004086
Matan Barakb4ff3a32016-02-09 14:57:42 +02004087 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004088 u8 op_mod[0x10];
4089
Matan Barakb4ff3a32016-02-09 14:57:42 +02004090 u8 reserved_at_40[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03004091
4092 u8 clear[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004093 u8 reserved_at_c1[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03004094
Matan Barakb4ff3a32016-02-09 14:57:42 +02004095 u8 reserved_at_e0[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004096 u8 counter_set_id[0x8];
4097};
4098
4099struct mlx5_ifc_query_pages_out_bits {
4100 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004101 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004102
4103 u8 syndrome[0x20];
4104
Matan Barakb4ff3a32016-02-09 14:57:42 +02004105 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004106 u8 function_id[0x10];
4107
4108 u8 num_pages[0x20];
4109};
4110
4111enum {
4112 MLX5_QUERY_PAGES_IN_OP_MOD_BOOT_PAGES = 0x1,
4113 MLX5_QUERY_PAGES_IN_OP_MOD_INIT_PAGES = 0x2,
4114 MLX5_QUERY_PAGES_IN_OP_MOD_REGULAR_PAGES = 0x3,
4115};
4116
4117struct mlx5_ifc_query_pages_in_bits {
4118 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004119 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004120
Matan Barakb4ff3a32016-02-09 14:57:42 +02004121 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004122 u8 op_mod[0x10];
4123
Matan Barakb4ff3a32016-02-09 14:57:42 +02004124 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004125 u8 function_id[0x10];
4126
Matan Barakb4ff3a32016-02-09 14:57:42 +02004127 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004128};
4129
4130struct mlx5_ifc_query_nic_vport_context_out_bits {
4131 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004132 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004133
4134 u8 syndrome[0x20];
4135
Matan Barakb4ff3a32016-02-09 14:57:42 +02004136 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004137
4138 struct mlx5_ifc_nic_vport_context_bits nic_vport_context;
4139};
4140
4141struct mlx5_ifc_query_nic_vport_context_in_bits {
4142 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004143 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004144
Matan Barakb4ff3a32016-02-09 14:57:42 +02004145 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004146 u8 op_mod[0x10];
4147
4148 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004149 u8 reserved_at_41[0xf];
Saeed Mahameede2816822015-05-28 22:28:40 +03004150 u8 vport_number[0x10];
4151
Matan Barakb4ff3a32016-02-09 14:57:42 +02004152 u8 reserved_at_60[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03004153 u8 allowed_list_type[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004154 u8 reserved_at_68[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004155};
4156
4157struct mlx5_ifc_query_mkey_out_bits {
4158 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004159 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004160
4161 u8 syndrome[0x20];
4162
Matan Barakb4ff3a32016-02-09 14:57:42 +02004163 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004164
4165 struct mlx5_ifc_mkc_bits memory_key_mkey_entry;
4166
Matan Barakb4ff3a32016-02-09 14:57:42 +02004167 u8 reserved_at_280[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03004168
4169 u8 bsf0_klm0_pas_mtt0_1[16][0x8];
4170
4171 u8 bsf1_klm1_pas_mtt2_3[16][0x8];
4172};
4173
4174struct mlx5_ifc_query_mkey_in_bits {
4175 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004176 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004177
Matan Barakb4ff3a32016-02-09 14:57:42 +02004178 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004179 u8 op_mod[0x10];
4180
Matan Barakb4ff3a32016-02-09 14:57:42 +02004181 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004182 u8 mkey_index[0x18];
4183
4184 u8 pg_access[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004185 u8 reserved_at_61[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03004186};
4187
4188struct mlx5_ifc_query_mad_demux_out_bits {
4189 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004190 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004191
4192 u8 syndrome[0x20];
4193
Matan Barakb4ff3a32016-02-09 14:57:42 +02004194 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004195
4196 u8 mad_dumux_parameters_block[0x20];
4197};
4198
4199struct mlx5_ifc_query_mad_demux_in_bits {
4200 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004201 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004202
Matan Barakb4ff3a32016-02-09 14:57:42 +02004203 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004204 u8 op_mod[0x10];
4205
Matan Barakb4ff3a32016-02-09 14:57:42 +02004206 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004207};
4208
4209struct mlx5_ifc_query_l2_table_entry_out_bits {
4210 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004211 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004212
4213 u8 syndrome[0x20];
4214
Matan Barakb4ff3a32016-02-09 14:57:42 +02004215 u8 reserved_at_40[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03004216
Matan Barakb4ff3a32016-02-09 14:57:42 +02004217 u8 reserved_at_e0[0x13];
Saeed Mahameede2816822015-05-28 22:28:40 +03004218 u8 vlan_valid[0x1];
4219 u8 vlan[0xc];
4220
4221 struct mlx5_ifc_mac_address_layout_bits mac_address;
4222
Matan Barakb4ff3a32016-02-09 14:57:42 +02004223 u8 reserved_at_140[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03004224};
4225
4226struct mlx5_ifc_query_l2_table_entry_in_bits {
4227 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004228 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004229
Matan Barakb4ff3a32016-02-09 14:57:42 +02004230 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004231 u8 op_mod[0x10];
4232
Matan Barakb4ff3a32016-02-09 14:57:42 +02004233 u8 reserved_at_40[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03004234
Matan Barakb4ff3a32016-02-09 14:57:42 +02004235 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004236 u8 table_index[0x18];
4237
Matan Barakb4ff3a32016-02-09 14:57:42 +02004238 u8 reserved_at_c0[0x140];
Saeed Mahameede2816822015-05-28 22:28:40 +03004239};
4240
4241struct mlx5_ifc_query_issi_out_bits {
4242 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004243 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004244
4245 u8 syndrome[0x20];
4246
Matan Barakb4ff3a32016-02-09 14:57:42 +02004247 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004248 u8 current_issi[0x10];
4249
Matan Barakb4ff3a32016-02-09 14:57:42 +02004250 u8 reserved_at_60[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03004251
Matan Barakb4ff3a32016-02-09 14:57:42 +02004252 u8 reserved_at_100[76][0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004253 u8 supported_issi_dw0[0x20];
4254};
4255
4256struct mlx5_ifc_query_issi_in_bits {
4257 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004258 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004259
Matan Barakb4ff3a32016-02-09 14:57:42 +02004260 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004261 u8 op_mod[0x10];
4262
Matan Barakb4ff3a32016-02-09 14:57:42 +02004263 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004264};
4265
Saeed Mahameed0dbc6fe2016-11-17 13:45:59 +02004266struct mlx5_ifc_set_driver_version_out_bits {
4267 u8 status[0x8];
4268 u8 reserved_0[0x18];
4269
4270 u8 syndrome[0x20];
4271 u8 reserved_1[0x40];
4272};
4273
4274struct mlx5_ifc_set_driver_version_in_bits {
4275 u8 opcode[0x10];
4276 u8 reserved_0[0x10];
4277
4278 u8 reserved_1[0x10];
4279 u8 op_mod[0x10];
4280
4281 u8 reserved_2[0x40];
4282 u8 driver_version[64][0x8];
4283};
4284
Saeed Mahameede2816822015-05-28 22:28:40 +03004285struct mlx5_ifc_query_hca_vport_pkey_out_bits {
4286 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004287 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004288
4289 u8 syndrome[0x20];
4290
Matan Barakb4ff3a32016-02-09 14:57:42 +02004291 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004292
4293 struct mlx5_ifc_pkey_bits pkey[0];
4294};
4295
4296struct mlx5_ifc_query_hca_vport_pkey_in_bits {
4297 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004298 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004299
Matan Barakb4ff3a32016-02-09 14:57:42 +02004300 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004301 u8 op_mod[0x10];
4302
4303 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004304 u8 reserved_at_41[0xb];
Majd Dibbiny707c4602015-06-04 19:30:41 +03004305 u8 port_num[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03004306 u8 vport_number[0x10];
4307
Matan Barakb4ff3a32016-02-09 14:57:42 +02004308 u8 reserved_at_60[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004309 u8 pkey_index[0x10];
4310};
4311
Eli Coheneff901d2016-03-11 22:58:42 +02004312enum {
4313 MLX5_HCA_VPORT_SEL_PORT_GUID = 1 << 0,
4314 MLX5_HCA_VPORT_SEL_NODE_GUID = 1 << 1,
4315 MLX5_HCA_VPORT_SEL_STATE_POLICY = 1 << 2,
4316};
4317
Saeed Mahameede2816822015-05-28 22:28:40 +03004318struct mlx5_ifc_query_hca_vport_gid_out_bits {
4319 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004320 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004321
4322 u8 syndrome[0x20];
4323
Matan Barakb4ff3a32016-02-09 14:57:42 +02004324 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004325
4326 u8 gids_num[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004327 u8 reserved_at_70[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004328
4329 struct mlx5_ifc_array128_auto_bits gid[0];
4330};
4331
4332struct mlx5_ifc_query_hca_vport_gid_in_bits {
4333 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004334 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004335
Matan Barakb4ff3a32016-02-09 14:57:42 +02004336 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004337 u8 op_mod[0x10];
4338
4339 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004340 u8 reserved_at_41[0xb];
Majd Dibbiny707c4602015-06-04 19:30:41 +03004341 u8 port_num[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03004342 u8 vport_number[0x10];
4343
Matan Barakb4ff3a32016-02-09 14:57:42 +02004344 u8 reserved_at_60[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004345 u8 gid_index[0x10];
4346};
4347
4348struct mlx5_ifc_query_hca_vport_context_out_bits {
4349 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004350 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004351
4352 u8 syndrome[0x20];
4353
Matan Barakb4ff3a32016-02-09 14:57:42 +02004354 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004355
4356 struct mlx5_ifc_hca_vport_context_bits hca_vport_context;
4357};
4358
4359struct mlx5_ifc_query_hca_vport_context_in_bits {
4360 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004361 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004362
Matan Barakb4ff3a32016-02-09 14:57:42 +02004363 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004364 u8 op_mod[0x10];
4365
4366 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004367 u8 reserved_at_41[0xb];
Majd Dibbiny707c4602015-06-04 19:30:41 +03004368 u8 port_num[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03004369 u8 vport_number[0x10];
4370
Matan Barakb4ff3a32016-02-09 14:57:42 +02004371 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004372};
4373
4374struct mlx5_ifc_query_hca_cap_out_bits {
4375 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004376 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004377
4378 u8 syndrome[0x20];
4379
Matan Barakb4ff3a32016-02-09 14:57:42 +02004380 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004381
4382 union mlx5_ifc_hca_cap_union_bits capability;
Eli Cohenb7755162014-10-02 12:19:44 +03004383};
4384
4385struct mlx5_ifc_query_hca_cap_in_bits {
4386 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004387 u8 reserved_at_10[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +03004388
Matan Barakb4ff3a32016-02-09 14:57:42 +02004389 u8 reserved_at_20[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +03004390 u8 op_mod[0x10];
4391
Matan Barakb4ff3a32016-02-09 14:57:42 +02004392 u8 reserved_at_40[0x40];
Eli Cohenb7755162014-10-02 12:19:44 +03004393};
4394
Saeed Mahameede2816822015-05-28 22:28:40 +03004395struct mlx5_ifc_query_flow_table_out_bits {
Eli Cohenb7755162014-10-02 12:19:44 +03004396 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004397 u8 reserved_at_8[0x18];
Eli Cohenb7755162014-10-02 12:19:44 +03004398
4399 u8 syndrome[0x20];
4400
Matan Barakb4ff3a32016-02-09 14:57:42 +02004401 u8 reserved_at_40[0x80];
Eli Cohenb7755162014-10-02 12:19:44 +03004402
Matan Barakb4ff3a32016-02-09 14:57:42 +02004403 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004404 u8 level[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004405 u8 reserved_at_d0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004406 u8 log_size[0x8];
4407
Matan Barakb4ff3a32016-02-09 14:57:42 +02004408 u8 reserved_at_e0[0x120];
Eli Cohenb7755162014-10-02 12:19:44 +03004409};
4410
Saeed Mahameede2816822015-05-28 22:28:40 +03004411struct mlx5_ifc_query_flow_table_in_bits {
4412 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004413 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004414
Matan Barakb4ff3a32016-02-09 14:57:42 +02004415 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004416 u8 op_mod[0x10];
4417
Matan Barakb4ff3a32016-02-09 14:57:42 +02004418 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004419
4420 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004421 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004422
Matan Barakb4ff3a32016-02-09 14:57:42 +02004423 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004424 u8 table_id[0x18];
4425
Matan Barakb4ff3a32016-02-09 14:57:42 +02004426 u8 reserved_at_c0[0x140];
Saeed Mahameede2816822015-05-28 22:28:40 +03004427};
4428
4429struct mlx5_ifc_query_fte_out_bits {
4430 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004431 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004432
4433 u8 syndrome[0x20];
4434
Matan Barakb4ff3a32016-02-09 14:57:42 +02004435 u8 reserved_at_40[0x1c0];
Saeed Mahameede2816822015-05-28 22:28:40 +03004436
4437 struct mlx5_ifc_flow_context_bits flow_context;
4438};
4439
4440struct mlx5_ifc_query_fte_in_bits {
4441 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004442 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004443
Matan Barakb4ff3a32016-02-09 14:57:42 +02004444 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004445 u8 op_mod[0x10];
4446
Matan Barakb4ff3a32016-02-09 14:57:42 +02004447 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004448
4449 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004450 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004451
Matan Barakb4ff3a32016-02-09 14:57:42 +02004452 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004453 u8 table_id[0x18];
4454
Matan Barakb4ff3a32016-02-09 14:57:42 +02004455 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004456
4457 u8 flow_index[0x20];
4458
Matan Barakb4ff3a32016-02-09 14:57:42 +02004459 u8 reserved_at_120[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03004460};
4461
4462enum {
4463 MLX5_QUERY_FLOW_GROUP_OUT_MATCH_CRITERIA_ENABLE_OUTER_HEADERS = 0x0,
4464 MLX5_QUERY_FLOW_GROUP_OUT_MATCH_CRITERIA_ENABLE_MISC_PARAMETERS = 0x1,
4465 MLX5_QUERY_FLOW_GROUP_OUT_MATCH_CRITERIA_ENABLE_INNER_HEADERS = 0x2,
4466};
4467
4468struct mlx5_ifc_query_flow_group_out_bits {
4469 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004470 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004471
4472 u8 syndrome[0x20];
4473
Matan Barakb4ff3a32016-02-09 14:57:42 +02004474 u8 reserved_at_40[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03004475
4476 u8 start_flow_index[0x20];
4477
Matan Barakb4ff3a32016-02-09 14:57:42 +02004478 u8 reserved_at_100[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004479
4480 u8 end_flow_index[0x20];
4481
Matan Barakb4ff3a32016-02-09 14:57:42 +02004482 u8 reserved_at_140[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03004483
Matan Barakb4ff3a32016-02-09 14:57:42 +02004484 u8 reserved_at_1e0[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004485 u8 match_criteria_enable[0x8];
4486
4487 struct mlx5_ifc_fte_match_param_bits match_criteria;
4488
Matan Barakb4ff3a32016-02-09 14:57:42 +02004489 u8 reserved_at_1200[0xe00];
Saeed Mahameede2816822015-05-28 22:28:40 +03004490};
4491
4492struct mlx5_ifc_query_flow_group_in_bits {
4493 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004494 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004495
Matan Barakb4ff3a32016-02-09 14:57:42 +02004496 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004497 u8 op_mod[0x10];
4498
Matan Barakb4ff3a32016-02-09 14:57:42 +02004499 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004500
4501 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004502 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004503
Matan Barakb4ff3a32016-02-09 14:57:42 +02004504 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004505 u8 table_id[0x18];
4506
4507 u8 group_id[0x20];
4508
Matan Barakb4ff3a32016-02-09 14:57:42 +02004509 u8 reserved_at_e0[0x120];
Saeed Mahameede2816822015-05-28 22:28:40 +03004510};
4511
Amir Vadai9dc0b282016-05-13 12:55:39 +00004512struct mlx5_ifc_query_flow_counter_out_bits {
4513 u8 status[0x8];
4514 u8 reserved_at_8[0x18];
4515
4516 u8 syndrome[0x20];
4517
4518 u8 reserved_at_40[0x40];
4519
4520 struct mlx5_ifc_traffic_counter_bits flow_statistics[0];
4521};
4522
4523struct mlx5_ifc_query_flow_counter_in_bits {
4524 u8 opcode[0x10];
4525 u8 reserved_at_10[0x10];
4526
4527 u8 reserved_at_20[0x10];
4528 u8 op_mod[0x10];
4529
4530 u8 reserved_at_40[0x80];
4531
4532 u8 clear[0x1];
4533 u8 reserved_at_c1[0xf];
4534 u8 num_of_counters[0x10];
4535
Rabie Louloua8ffcc72017-07-09 13:39:30 +03004536 u8 flow_counter_id[0x20];
Amir Vadai9dc0b282016-05-13 12:55:39 +00004537};
4538
Saeed Mahameedd6666752015-12-01 18:03:22 +02004539struct mlx5_ifc_query_esw_vport_context_out_bits {
4540 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004541 u8 reserved_at_8[0x18];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004542
4543 u8 syndrome[0x20];
4544
Matan Barakb4ff3a32016-02-09 14:57:42 +02004545 u8 reserved_at_40[0x40];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004546
4547 struct mlx5_ifc_esw_vport_context_bits esw_vport_context;
4548};
4549
4550struct mlx5_ifc_query_esw_vport_context_in_bits {
4551 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004552 u8 reserved_at_10[0x10];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004553
Matan Barakb4ff3a32016-02-09 14:57:42 +02004554 u8 reserved_at_20[0x10];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004555 u8 op_mod[0x10];
4556
4557 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004558 u8 reserved_at_41[0xf];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004559 u8 vport_number[0x10];
4560
Matan Barakb4ff3a32016-02-09 14:57:42 +02004561 u8 reserved_at_60[0x20];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004562};
4563
4564struct mlx5_ifc_modify_esw_vport_context_out_bits {
4565 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004566 u8 reserved_at_8[0x18];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004567
4568 u8 syndrome[0x20];
4569
Matan Barakb4ff3a32016-02-09 14:57:42 +02004570 u8 reserved_at_40[0x40];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004571};
4572
4573struct mlx5_ifc_esw_vport_context_fields_select_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02004574 u8 reserved_at_0[0x1c];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004575 u8 vport_cvlan_insert[0x1];
4576 u8 vport_svlan_insert[0x1];
4577 u8 vport_cvlan_strip[0x1];
4578 u8 vport_svlan_strip[0x1];
4579};
4580
4581struct mlx5_ifc_modify_esw_vport_context_in_bits {
4582 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004583 u8 reserved_at_10[0x10];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004584
Matan Barakb4ff3a32016-02-09 14:57:42 +02004585 u8 reserved_at_20[0x10];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004586 u8 op_mod[0x10];
4587
4588 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004589 u8 reserved_at_41[0xf];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004590 u8 vport_number[0x10];
4591
4592 struct mlx5_ifc_esw_vport_context_fields_select_bits field_select;
4593
4594 struct mlx5_ifc_esw_vport_context_bits esw_vport_context;
4595};
4596
Saeed Mahameede2816822015-05-28 22:28:40 +03004597struct mlx5_ifc_query_eq_out_bits {
Eli Cohenb7755162014-10-02 12:19:44 +03004598 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004599 u8 reserved_at_8[0x18];
Eli Cohenb7755162014-10-02 12:19:44 +03004600
4601 u8 syndrome[0x20];
4602
Matan Barakb4ff3a32016-02-09 14:57:42 +02004603 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004604
4605 struct mlx5_ifc_eqc_bits eq_context_entry;
4606
Matan Barakb4ff3a32016-02-09 14:57:42 +02004607 u8 reserved_at_280[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004608
4609 u8 event_bitmask[0x40];
4610
Matan Barakb4ff3a32016-02-09 14:57:42 +02004611 u8 reserved_at_300[0x580];
Saeed Mahameede2816822015-05-28 22:28:40 +03004612
4613 u8 pas[0][0x40];
4614};
4615
4616struct mlx5_ifc_query_eq_in_bits {
4617 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004618 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004619
Matan Barakb4ff3a32016-02-09 14:57:42 +02004620 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004621 u8 op_mod[0x10];
4622
Matan Barakb4ff3a32016-02-09 14:57:42 +02004623 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004624 u8 eq_number[0x8];
4625
Matan Barakb4ff3a32016-02-09 14:57:42 +02004626 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004627};
4628
Hadar Hen Zion7adbde22016-08-03 15:08:33 +03004629struct mlx5_ifc_encap_header_in_bits {
4630 u8 reserved_at_0[0x5];
4631 u8 header_type[0x3];
4632 u8 reserved_at_8[0xe];
4633 u8 encap_header_size[0xa];
4634
4635 u8 reserved_at_20[0x10];
4636 u8 encap_header[2][0x8];
4637
4638 u8 more_encap_header[0][0x8];
4639};
4640
4641struct mlx5_ifc_query_encap_header_out_bits {
4642 u8 status[0x8];
4643 u8 reserved_at_8[0x18];
4644
4645 u8 syndrome[0x20];
4646
4647 u8 reserved_at_40[0xa0];
4648
4649 struct mlx5_ifc_encap_header_in_bits encap_header[0];
4650};
4651
4652struct mlx5_ifc_query_encap_header_in_bits {
4653 u8 opcode[0x10];
4654 u8 reserved_at_10[0x10];
4655
4656 u8 reserved_at_20[0x10];
4657 u8 op_mod[0x10];
4658
4659 u8 encap_id[0x20];
4660
4661 u8 reserved_at_60[0xa0];
4662};
4663
4664struct mlx5_ifc_alloc_encap_header_out_bits {
4665 u8 status[0x8];
4666 u8 reserved_at_8[0x18];
4667
4668 u8 syndrome[0x20];
4669
4670 u8 encap_id[0x20];
4671
4672 u8 reserved_at_60[0x20];
4673};
4674
4675struct mlx5_ifc_alloc_encap_header_in_bits {
4676 u8 opcode[0x10];
4677 u8 reserved_at_10[0x10];
4678
4679 u8 reserved_at_20[0x10];
4680 u8 op_mod[0x10];
4681
4682 u8 reserved_at_40[0xa0];
4683
4684 struct mlx5_ifc_encap_header_in_bits encap_header;
4685};
4686
4687struct mlx5_ifc_dealloc_encap_header_out_bits {
4688 u8 status[0x8];
4689 u8 reserved_at_8[0x18];
4690
4691 u8 syndrome[0x20];
4692
4693 u8 reserved_at_40[0x40];
4694};
4695
4696struct mlx5_ifc_dealloc_encap_header_in_bits {
4697 u8 opcode[0x10];
4698 u8 reserved_at_10[0x10];
4699
4700 u8 reserved_20[0x10];
4701 u8 op_mod[0x10];
4702
4703 u8 encap_id[0x20];
4704
4705 u8 reserved_60[0x20];
4706};
4707
Or Gerlitz2a69cb92017-01-19 19:31:25 +02004708struct mlx5_ifc_set_action_in_bits {
4709 u8 action_type[0x4];
4710 u8 field[0xc];
4711 u8 reserved_at_10[0x3];
4712 u8 offset[0x5];
4713 u8 reserved_at_18[0x3];
4714 u8 length[0x5];
4715
4716 u8 data[0x20];
4717};
4718
4719struct mlx5_ifc_add_action_in_bits {
4720 u8 action_type[0x4];
4721 u8 field[0xc];
4722 u8 reserved_at_10[0x10];
4723
4724 u8 data[0x20];
4725};
4726
4727union mlx5_ifc_set_action_in_add_action_in_auto_bits {
4728 struct mlx5_ifc_set_action_in_bits set_action_in;
4729 struct mlx5_ifc_add_action_in_bits add_action_in;
4730 u8 reserved_at_0[0x40];
4731};
4732
4733enum {
4734 MLX5_ACTION_TYPE_SET = 0x1,
4735 MLX5_ACTION_TYPE_ADD = 0x2,
4736};
4737
4738enum {
4739 MLX5_ACTION_IN_FIELD_OUT_SMAC_47_16 = 0x1,
4740 MLX5_ACTION_IN_FIELD_OUT_SMAC_15_0 = 0x2,
4741 MLX5_ACTION_IN_FIELD_OUT_ETHERTYPE = 0x3,
4742 MLX5_ACTION_IN_FIELD_OUT_DMAC_47_16 = 0x4,
4743 MLX5_ACTION_IN_FIELD_OUT_DMAC_15_0 = 0x5,
4744 MLX5_ACTION_IN_FIELD_OUT_IP_DSCP = 0x6,
4745 MLX5_ACTION_IN_FIELD_OUT_TCP_FLAGS = 0x7,
4746 MLX5_ACTION_IN_FIELD_OUT_TCP_SPORT = 0x8,
4747 MLX5_ACTION_IN_FIELD_OUT_TCP_DPORT = 0x9,
4748 MLX5_ACTION_IN_FIELD_OUT_IP_TTL = 0xa,
4749 MLX5_ACTION_IN_FIELD_OUT_UDP_SPORT = 0xb,
4750 MLX5_ACTION_IN_FIELD_OUT_UDP_DPORT = 0xc,
4751 MLX5_ACTION_IN_FIELD_OUT_SIPV6_127_96 = 0xd,
4752 MLX5_ACTION_IN_FIELD_OUT_SIPV6_95_64 = 0xe,
4753 MLX5_ACTION_IN_FIELD_OUT_SIPV6_63_32 = 0xf,
4754 MLX5_ACTION_IN_FIELD_OUT_SIPV6_31_0 = 0x10,
4755 MLX5_ACTION_IN_FIELD_OUT_DIPV6_127_96 = 0x11,
4756 MLX5_ACTION_IN_FIELD_OUT_DIPV6_95_64 = 0x12,
4757 MLX5_ACTION_IN_FIELD_OUT_DIPV6_63_32 = 0x13,
4758 MLX5_ACTION_IN_FIELD_OUT_DIPV6_31_0 = 0x14,
4759 MLX5_ACTION_IN_FIELD_OUT_SIPV4 = 0x15,
4760 MLX5_ACTION_IN_FIELD_OUT_DIPV4 = 0x16,
Or Gerlitz0c0316f2017-06-13 11:09:57 +03004761 MLX5_ACTION_IN_FIELD_OUT_IPV6_HOPLIMIT = 0x47,
Or Gerlitz2a69cb92017-01-19 19:31:25 +02004762};
4763
4764struct mlx5_ifc_alloc_modify_header_context_out_bits {
4765 u8 status[0x8];
4766 u8 reserved_at_8[0x18];
4767
4768 u8 syndrome[0x20];
4769
4770 u8 modify_header_id[0x20];
4771
4772 u8 reserved_at_60[0x20];
4773};
4774
4775struct mlx5_ifc_alloc_modify_header_context_in_bits {
4776 u8 opcode[0x10];
4777 u8 reserved_at_10[0x10];
4778
4779 u8 reserved_at_20[0x10];
4780 u8 op_mod[0x10];
4781
4782 u8 reserved_at_40[0x20];
4783
4784 u8 table_type[0x8];
4785 u8 reserved_at_68[0x10];
4786 u8 num_of_actions[0x8];
4787
4788 union mlx5_ifc_set_action_in_add_action_in_auto_bits actions[0];
4789};
4790
4791struct mlx5_ifc_dealloc_modify_header_context_out_bits {
4792 u8 status[0x8];
4793 u8 reserved_at_8[0x18];
4794
4795 u8 syndrome[0x20];
4796
4797 u8 reserved_at_40[0x40];
4798};
4799
4800struct mlx5_ifc_dealloc_modify_header_context_in_bits {
4801 u8 opcode[0x10];
4802 u8 reserved_at_10[0x10];
4803
4804 u8 reserved_at_20[0x10];
4805 u8 op_mod[0x10];
4806
4807 u8 modify_header_id[0x20];
4808
4809 u8 reserved_at_60[0x20];
4810};
4811
Saeed Mahameede2816822015-05-28 22:28:40 +03004812struct mlx5_ifc_query_dct_out_bits {
4813 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004814 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004815
4816 u8 syndrome[0x20];
4817
Matan Barakb4ff3a32016-02-09 14:57:42 +02004818 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004819
4820 struct mlx5_ifc_dctc_bits dct_context_entry;
4821
Matan Barakb4ff3a32016-02-09 14:57:42 +02004822 u8 reserved_at_280[0x180];
Saeed Mahameede2816822015-05-28 22:28:40 +03004823};
4824
4825struct mlx5_ifc_query_dct_in_bits {
4826 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004827 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004828
Matan Barakb4ff3a32016-02-09 14:57:42 +02004829 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004830 u8 op_mod[0x10];
4831
Matan Barakb4ff3a32016-02-09 14:57:42 +02004832 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004833 u8 dctn[0x18];
4834
Matan Barakb4ff3a32016-02-09 14:57:42 +02004835 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004836};
4837
4838struct mlx5_ifc_query_cq_out_bits {
4839 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004840 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004841
4842 u8 syndrome[0x20];
4843
Matan Barakb4ff3a32016-02-09 14:57:42 +02004844 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004845
4846 struct mlx5_ifc_cqc_bits cq_context;
4847
Matan Barakb4ff3a32016-02-09 14:57:42 +02004848 u8 reserved_at_280[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03004849
4850 u8 pas[0][0x40];
4851};
4852
4853struct mlx5_ifc_query_cq_in_bits {
4854 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004855 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004856
Matan Barakb4ff3a32016-02-09 14:57:42 +02004857 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004858 u8 op_mod[0x10];
4859
Matan Barakb4ff3a32016-02-09 14:57:42 +02004860 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004861 u8 cqn[0x18];
4862
Matan Barakb4ff3a32016-02-09 14:57:42 +02004863 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004864};
4865
4866struct mlx5_ifc_query_cong_status_out_bits {
4867 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004868 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004869
4870 u8 syndrome[0x20];
4871
Matan Barakb4ff3a32016-02-09 14:57:42 +02004872 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004873
4874 u8 enable[0x1];
4875 u8 tag_enable[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004876 u8 reserved_at_62[0x1e];
Saeed Mahameede2816822015-05-28 22:28:40 +03004877};
4878
4879struct mlx5_ifc_query_cong_status_in_bits {
4880 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004881 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004882
Matan Barakb4ff3a32016-02-09 14:57:42 +02004883 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004884 u8 op_mod[0x10];
4885
Matan Barakb4ff3a32016-02-09 14:57:42 +02004886 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004887 u8 priority[0x4];
4888 u8 cong_protocol[0x4];
4889
Matan Barakb4ff3a32016-02-09 14:57:42 +02004890 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004891};
4892
4893struct mlx5_ifc_query_cong_statistics_out_bits {
4894 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004895 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004896
4897 u8 syndrome[0x20];
4898
Matan Barakb4ff3a32016-02-09 14:57:42 +02004899 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004900
Parav Pandite1f24a72017-04-16 07:29:29 +03004901 u8 rp_cur_flows[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004902
4903 u8 sum_flows[0x20];
4904
Parav Pandite1f24a72017-04-16 07:29:29 +03004905 u8 rp_cnp_ignored_high[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004906
Parav Pandite1f24a72017-04-16 07:29:29 +03004907 u8 rp_cnp_ignored_low[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004908
Parav Pandite1f24a72017-04-16 07:29:29 +03004909 u8 rp_cnp_handled_high[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004910
Parav Pandite1f24a72017-04-16 07:29:29 +03004911 u8 rp_cnp_handled_low[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004912
Matan Barakb4ff3a32016-02-09 14:57:42 +02004913 u8 reserved_at_140[0x100];
Saeed Mahameede2816822015-05-28 22:28:40 +03004914
4915 u8 time_stamp_high[0x20];
4916
4917 u8 time_stamp_low[0x20];
4918
4919 u8 accumulators_period[0x20];
4920
Parav Pandite1f24a72017-04-16 07:29:29 +03004921 u8 np_ecn_marked_roce_packets_high[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004922
Parav Pandite1f24a72017-04-16 07:29:29 +03004923 u8 np_ecn_marked_roce_packets_low[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004924
Parav Pandite1f24a72017-04-16 07:29:29 +03004925 u8 np_cnp_sent_high[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004926
Parav Pandite1f24a72017-04-16 07:29:29 +03004927 u8 np_cnp_sent_low[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004928
Matan Barakb4ff3a32016-02-09 14:57:42 +02004929 u8 reserved_at_320[0x560];
Saeed Mahameede2816822015-05-28 22:28:40 +03004930};
4931
4932struct mlx5_ifc_query_cong_statistics_in_bits {
4933 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004934 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004935
Matan Barakb4ff3a32016-02-09 14:57:42 +02004936 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004937 u8 op_mod[0x10];
4938
4939 u8 clear[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004940 u8 reserved_at_41[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03004941
Matan Barakb4ff3a32016-02-09 14:57:42 +02004942 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004943};
4944
4945struct mlx5_ifc_query_cong_params_out_bits {
4946 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004947 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004948
4949 u8 syndrome[0x20];
4950
Matan Barakb4ff3a32016-02-09 14:57:42 +02004951 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004952
4953 union mlx5_ifc_cong_control_roce_ecn_auto_bits congestion_parameters;
4954};
4955
4956struct mlx5_ifc_query_cong_params_in_bits {
4957 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004958 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004959
Matan Barakb4ff3a32016-02-09 14:57:42 +02004960 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004961 u8 op_mod[0x10];
4962
Matan Barakb4ff3a32016-02-09 14:57:42 +02004963 u8 reserved_at_40[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03004964 u8 cong_protocol[0x4];
4965
Matan Barakb4ff3a32016-02-09 14:57:42 +02004966 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004967};
4968
4969struct mlx5_ifc_query_adapter_out_bits {
4970 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004971 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004972
4973 u8 syndrome[0x20];
4974
Matan Barakb4ff3a32016-02-09 14:57:42 +02004975 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004976
4977 struct mlx5_ifc_query_adapter_param_block_bits query_adapter_struct;
4978};
4979
4980struct mlx5_ifc_query_adapter_in_bits {
4981 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004982 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004983
Matan Barakb4ff3a32016-02-09 14:57:42 +02004984 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004985 u8 op_mod[0x10];
4986
Matan Barakb4ff3a32016-02-09 14:57:42 +02004987 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004988};
4989
4990struct mlx5_ifc_qp_2rst_out_bits {
4991 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004992 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004993
4994 u8 syndrome[0x20];
4995
Matan Barakb4ff3a32016-02-09 14:57:42 +02004996 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004997};
4998
4999struct mlx5_ifc_qp_2rst_in_bits {
5000 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005001 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005002
Matan Barakb4ff3a32016-02-09 14:57:42 +02005003 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005004 u8 op_mod[0x10];
5005
Matan Barakb4ff3a32016-02-09 14:57:42 +02005006 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005007 u8 qpn[0x18];
5008
Matan Barakb4ff3a32016-02-09 14:57:42 +02005009 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005010};
5011
5012struct mlx5_ifc_qp_2err_out_bits {
5013 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005014 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005015
5016 u8 syndrome[0x20];
5017
Matan Barakb4ff3a32016-02-09 14:57:42 +02005018 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005019};
5020
5021struct mlx5_ifc_qp_2err_in_bits {
5022 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005023 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005024
Matan Barakb4ff3a32016-02-09 14:57:42 +02005025 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005026 u8 op_mod[0x10];
5027
Matan Barakb4ff3a32016-02-09 14:57:42 +02005028 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005029 u8 qpn[0x18];
5030
Matan Barakb4ff3a32016-02-09 14:57:42 +02005031 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005032};
5033
5034struct mlx5_ifc_page_fault_resume_out_bits {
5035 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005036 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005037
5038 u8 syndrome[0x20];
5039
Matan Barakb4ff3a32016-02-09 14:57:42 +02005040 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005041};
5042
5043struct mlx5_ifc_page_fault_resume_in_bits {
5044 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005045 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005046
Matan Barakb4ff3a32016-02-09 14:57:42 +02005047 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005048 u8 op_mod[0x10];
5049
5050 u8 error[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005051 u8 reserved_at_41[0x4];
Artemy Kovalyov223cdc72017-01-02 11:37:45 +02005052 u8 page_fault_type[0x3];
5053 u8 wq_number[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005054
Artemy Kovalyov223cdc72017-01-02 11:37:45 +02005055 u8 reserved_at_60[0x8];
5056 u8 token[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005057};
5058
5059struct mlx5_ifc_nop_out_bits {
5060 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005061 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005062
5063 u8 syndrome[0x20];
5064
Matan Barakb4ff3a32016-02-09 14:57:42 +02005065 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005066};
5067
5068struct mlx5_ifc_nop_in_bits {
5069 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005070 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005071
Matan Barakb4ff3a32016-02-09 14:57:42 +02005072 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005073 u8 op_mod[0x10];
5074
Matan Barakb4ff3a32016-02-09 14:57:42 +02005075 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005076};
5077
5078struct mlx5_ifc_modify_vport_state_out_bits {
5079 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005080 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005081
5082 u8 syndrome[0x20];
5083
Matan Barakb4ff3a32016-02-09 14:57:42 +02005084 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005085};
5086
5087struct mlx5_ifc_modify_vport_state_in_bits {
5088 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005089 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005090
Matan Barakb4ff3a32016-02-09 14:57:42 +02005091 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005092 u8 op_mod[0x10];
5093
5094 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005095 u8 reserved_at_41[0xf];
Saeed Mahameede2816822015-05-28 22:28:40 +03005096 u8 vport_number[0x10];
5097
Matan Barakb4ff3a32016-02-09 14:57:42 +02005098 u8 reserved_at_60[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005099 u8 admin_state[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005100 u8 reserved_at_7c[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03005101};
5102
5103struct mlx5_ifc_modify_tis_out_bits {
5104 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005105 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005106
5107 u8 syndrome[0x20];
5108
Matan Barakb4ff3a32016-02-09 14:57:42 +02005109 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005110};
5111
majd@mellanox.com75850d02016-01-14 19:13:06 +02005112struct mlx5_ifc_modify_tis_bitmask_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02005113 u8 reserved_at_0[0x20];
majd@mellanox.com75850d02016-01-14 19:13:06 +02005114
Aviv Heller84df61e2016-05-10 13:47:50 +03005115 u8 reserved_at_20[0x1d];
5116 u8 lag_tx_port_affinity[0x1];
5117 u8 strict_lag_tx_port_affinity[0x1];
majd@mellanox.com75850d02016-01-14 19:13:06 +02005118 u8 prio[0x1];
5119};
5120
Saeed Mahameede2816822015-05-28 22:28:40 +03005121struct mlx5_ifc_modify_tis_in_bits {
5122 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005123 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005124
Matan Barakb4ff3a32016-02-09 14:57:42 +02005125 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005126 u8 op_mod[0x10];
5127
Matan Barakb4ff3a32016-02-09 14:57:42 +02005128 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005129 u8 tisn[0x18];
5130
Matan Barakb4ff3a32016-02-09 14:57:42 +02005131 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005132
majd@mellanox.com75850d02016-01-14 19:13:06 +02005133 struct mlx5_ifc_modify_tis_bitmask_bits bitmask;
Saeed Mahameede2816822015-05-28 22:28:40 +03005134
Matan Barakb4ff3a32016-02-09 14:57:42 +02005135 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005136
5137 struct mlx5_ifc_tisc_bits ctx;
5138};
5139
Achiad Shochatd9eea402015-08-04 14:05:42 +03005140struct mlx5_ifc_modify_tir_bitmask_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02005141 u8 reserved_at_0[0x20];
Achiad Shochatd9eea402015-08-04 14:05:42 +03005142
Matan Barakb4ff3a32016-02-09 14:57:42 +02005143 u8 reserved_at_20[0x1b];
Tariq Toukan66189962015-11-12 19:35:26 +02005144 u8 self_lb_en[0x1];
Tariq Toukanbdfc0282016-02-29 21:17:12 +02005145 u8 reserved_at_3c[0x1];
5146 u8 hash[0x1];
5147 u8 reserved_at_3e[0x1];
Achiad Shochatd9eea402015-08-04 14:05:42 +03005148 u8 lro[0x1];
5149};
5150
Saeed Mahameede2816822015-05-28 22:28:40 +03005151struct mlx5_ifc_modify_tir_out_bits {
5152 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005153 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005154
5155 u8 syndrome[0x20];
5156
Matan Barakb4ff3a32016-02-09 14:57:42 +02005157 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005158};
5159
5160struct mlx5_ifc_modify_tir_in_bits {
5161 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005162 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005163
Matan Barakb4ff3a32016-02-09 14:57:42 +02005164 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005165 u8 op_mod[0x10];
5166
Matan Barakb4ff3a32016-02-09 14:57:42 +02005167 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005168 u8 tirn[0x18];
5169
Matan Barakb4ff3a32016-02-09 14:57:42 +02005170 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005171
Achiad Shochatd9eea402015-08-04 14:05:42 +03005172 struct mlx5_ifc_modify_tir_bitmask_bits bitmask;
Saeed Mahameede2816822015-05-28 22:28:40 +03005173
Matan Barakb4ff3a32016-02-09 14:57:42 +02005174 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005175
5176 struct mlx5_ifc_tirc_bits ctx;
5177};
5178
5179struct mlx5_ifc_modify_sq_out_bits {
5180 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005181 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005182
5183 u8 syndrome[0x20];
5184
Matan Barakb4ff3a32016-02-09 14:57:42 +02005185 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005186};
5187
5188struct mlx5_ifc_modify_sq_in_bits {
5189 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005190 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005191
Matan Barakb4ff3a32016-02-09 14:57:42 +02005192 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005193 u8 op_mod[0x10];
5194
5195 u8 sq_state[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005196 u8 reserved_at_44[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03005197 u8 sqn[0x18];
5198
Matan Barakb4ff3a32016-02-09 14:57:42 +02005199 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005200
5201 u8 modify_bitmask[0x40];
5202
Matan Barakb4ff3a32016-02-09 14:57:42 +02005203 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005204
5205 struct mlx5_ifc_sqc_bits ctx;
5206};
5207
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +03005208struct mlx5_ifc_modify_scheduling_element_out_bits {
5209 u8 status[0x8];
5210 u8 reserved_at_8[0x18];
5211
5212 u8 syndrome[0x20];
5213
5214 u8 reserved_at_40[0x1c0];
5215};
5216
5217enum {
5218 MODIFY_SCHEDULING_ELEMENT_IN_MODIFY_BITMASK_BW_SHARE = 0x1,
5219 MODIFY_SCHEDULING_ELEMENT_IN_MODIFY_BITMASK_MAX_AVERAGE_BW = 0x2,
5220};
5221
5222struct mlx5_ifc_modify_scheduling_element_in_bits {
5223 u8 opcode[0x10];
5224 u8 reserved_at_10[0x10];
5225
5226 u8 reserved_at_20[0x10];
5227 u8 op_mod[0x10];
5228
5229 u8 scheduling_hierarchy[0x8];
5230 u8 reserved_at_48[0x18];
5231
5232 u8 scheduling_element_id[0x20];
5233
5234 u8 reserved_at_80[0x20];
5235
5236 u8 modify_bitmask[0x20];
5237
5238 u8 reserved_at_c0[0x40];
5239
5240 struct mlx5_ifc_scheduling_context_bits scheduling_context;
5241
5242 u8 reserved_at_300[0x100];
5243};
5244
Saeed Mahameede2816822015-05-28 22:28:40 +03005245struct mlx5_ifc_modify_rqt_out_bits {
5246 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005247 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005248
5249 u8 syndrome[0x20];
5250
Matan Barakb4ff3a32016-02-09 14:57:42 +02005251 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005252};
5253
Achiad Shochat5c503682015-08-04 14:05:43 +03005254struct mlx5_ifc_rqt_bitmask_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02005255 u8 reserved_at_0[0x20];
Achiad Shochat5c503682015-08-04 14:05:43 +03005256
Matan Barakb4ff3a32016-02-09 14:57:42 +02005257 u8 reserved_at_20[0x1f];
Achiad Shochat5c503682015-08-04 14:05:43 +03005258 u8 rqn_list[0x1];
5259};
5260
Saeed Mahameede2816822015-05-28 22:28:40 +03005261struct mlx5_ifc_modify_rqt_in_bits {
5262 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005263 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005264
Matan Barakb4ff3a32016-02-09 14:57:42 +02005265 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005266 u8 op_mod[0x10];
5267
Matan Barakb4ff3a32016-02-09 14:57:42 +02005268 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005269 u8 rqtn[0x18];
5270
Matan Barakb4ff3a32016-02-09 14:57:42 +02005271 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005272
Achiad Shochat5c503682015-08-04 14:05:43 +03005273 struct mlx5_ifc_rqt_bitmask_bits bitmask;
Saeed Mahameede2816822015-05-28 22:28:40 +03005274
Matan Barakb4ff3a32016-02-09 14:57:42 +02005275 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005276
5277 struct mlx5_ifc_rqtc_bits ctx;
5278};
5279
5280struct mlx5_ifc_modify_rq_out_bits {
5281 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005282 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005283
5284 u8 syndrome[0x20];
5285
Matan Barakb4ff3a32016-02-09 14:57:42 +02005286 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005287};
5288
Alex Vesker83b502a2016-08-04 17:32:02 +03005289enum {
5290 MLX5_MODIFY_RQ_IN_MODIFY_BITMASK_VSD = 1ULL << 1,
Guy Ergas102722f2017-02-20 16:18:17 +02005291 MLX5_MODIFY_RQ_IN_MODIFY_BITMASK_SCATTER_FCS = 1ULL << 2,
Majd Dibbiny23a69642017-01-18 15:25:10 +02005292 MLX5_MODIFY_RQ_IN_MODIFY_BITMASK_RQ_COUNTER_SET_ID = 1ULL << 3,
Alex Vesker83b502a2016-08-04 17:32:02 +03005293};
5294
Saeed Mahameede2816822015-05-28 22:28:40 +03005295struct mlx5_ifc_modify_rq_in_bits {
5296 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005297 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005298
Matan Barakb4ff3a32016-02-09 14:57:42 +02005299 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005300 u8 op_mod[0x10];
5301
5302 u8 rq_state[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005303 u8 reserved_at_44[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03005304 u8 rqn[0x18];
5305
Matan Barakb4ff3a32016-02-09 14:57:42 +02005306 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005307
5308 u8 modify_bitmask[0x40];
5309
Matan Barakb4ff3a32016-02-09 14:57:42 +02005310 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005311
5312 struct mlx5_ifc_rqc_bits ctx;
5313};
5314
5315struct mlx5_ifc_modify_rmp_out_bits {
5316 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005317 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005318
5319 u8 syndrome[0x20];
5320
Matan Barakb4ff3a32016-02-09 14:57:42 +02005321 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005322};
5323
Haggai Abramonvsky01949d02015-06-04 19:30:38 +03005324struct mlx5_ifc_rmp_bitmask_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02005325 u8 reserved_at_0[0x20];
Haggai Abramonvsky01949d02015-06-04 19:30:38 +03005326
Matan Barakb4ff3a32016-02-09 14:57:42 +02005327 u8 reserved_at_20[0x1f];
Haggai Abramonvsky01949d02015-06-04 19:30:38 +03005328 u8 lwm[0x1];
5329};
5330
Saeed Mahameede2816822015-05-28 22:28:40 +03005331struct mlx5_ifc_modify_rmp_in_bits {
5332 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005333 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005334
Matan Barakb4ff3a32016-02-09 14:57:42 +02005335 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005336 u8 op_mod[0x10];
5337
5338 u8 rmp_state[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005339 u8 reserved_at_44[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03005340 u8 rmpn[0x18];
5341
Matan Barakb4ff3a32016-02-09 14:57:42 +02005342 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005343
Haggai Abramonvsky01949d02015-06-04 19:30:38 +03005344 struct mlx5_ifc_rmp_bitmask_bits bitmask;
Saeed Mahameede2816822015-05-28 22:28:40 +03005345
Matan Barakb4ff3a32016-02-09 14:57:42 +02005346 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005347
5348 struct mlx5_ifc_rmpc_bits ctx;
5349};
5350
5351struct mlx5_ifc_modify_nic_vport_context_out_bits {
5352 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005353 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005354
5355 u8 syndrome[0x20];
5356
Matan Barakb4ff3a32016-02-09 14:57:42 +02005357 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005358};
5359
5360struct mlx5_ifc_modify_nic_vport_field_select_bits {
Daniel Jurgens32f69e42018-01-04 17:25:36 +02005361 u8 reserved_at_0[0x12];
5362 u8 affiliation[0x1];
5363 u8 reserved_at_e[0x1];
Huy Nguyenbded7472017-05-30 09:42:53 +03005364 u8 disable_uc_local_lb[0x1];
5365 u8 disable_mc_local_lb[0x1];
Noa Osherovich23898c72016-06-10 00:07:37 +03005366 u8 node_guid[0x1];
5367 u8 port_guid[0x1];
Hadar Hen Zion9def7122016-08-03 17:27:30 +03005368 u8 min_inline[0x1];
Saeed Mahameedd82b7312015-12-01 18:03:14 +02005369 u8 mtu[0x1];
5370 u8 change_event[0x1];
5371 u8 promisc[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03005372 u8 permanent_address[0x1];
5373 u8 addresses_list[0x1];
5374 u8 roce_en[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005375 u8 reserved_at_1f[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03005376};
5377
5378struct mlx5_ifc_modify_nic_vport_context_in_bits {
5379 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005380 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005381
Matan Barakb4ff3a32016-02-09 14:57:42 +02005382 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005383 u8 op_mod[0x10];
5384
5385 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005386 u8 reserved_at_41[0xf];
Saeed Mahameede2816822015-05-28 22:28:40 +03005387 u8 vport_number[0x10];
5388
5389 struct mlx5_ifc_modify_nic_vport_field_select_bits field_select;
5390
Matan Barakb4ff3a32016-02-09 14:57:42 +02005391 u8 reserved_at_80[0x780];
Saeed Mahameede2816822015-05-28 22:28:40 +03005392
5393 struct mlx5_ifc_nic_vport_context_bits nic_vport_context;
5394};
5395
5396struct mlx5_ifc_modify_hca_vport_context_out_bits {
5397 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005398 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005399
5400 u8 syndrome[0x20];
5401
Matan Barakb4ff3a32016-02-09 14:57:42 +02005402 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005403};
5404
5405struct mlx5_ifc_modify_hca_vport_context_in_bits {
5406 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005407 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005408
Matan Barakb4ff3a32016-02-09 14:57:42 +02005409 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005410 u8 op_mod[0x10];
5411
5412 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005413 u8 reserved_at_41[0xb];
Majd Dibbiny707c4602015-06-04 19:30:41 +03005414 u8 port_num[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03005415 u8 vport_number[0x10];
5416
Matan Barakb4ff3a32016-02-09 14:57:42 +02005417 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005418
5419 struct mlx5_ifc_hca_vport_context_bits hca_vport_context;
5420};
5421
5422struct mlx5_ifc_modify_cq_out_bits {
5423 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005424 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005425
5426 u8 syndrome[0x20];
5427
Matan Barakb4ff3a32016-02-09 14:57:42 +02005428 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005429};
5430
5431enum {
5432 MLX5_MODIFY_CQ_IN_OP_MOD_MODIFY_CQ = 0x0,
5433 MLX5_MODIFY_CQ_IN_OP_MOD_RESIZE_CQ = 0x1,
5434};
5435
5436struct mlx5_ifc_modify_cq_in_bits {
5437 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005438 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005439
Matan Barakb4ff3a32016-02-09 14:57:42 +02005440 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005441 u8 op_mod[0x10];
5442
Matan Barakb4ff3a32016-02-09 14:57:42 +02005443 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005444 u8 cqn[0x18];
5445
5446 union mlx5_ifc_modify_field_select_resize_field_select_auto_bits modify_field_select_resize_field_select;
5447
5448 struct mlx5_ifc_cqc_bits cq_context;
5449
Matan Barakb4ff3a32016-02-09 14:57:42 +02005450 u8 reserved_at_280[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03005451
5452 u8 pas[0][0x40];
5453};
5454
5455struct mlx5_ifc_modify_cong_status_out_bits {
5456 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005457 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005458
5459 u8 syndrome[0x20];
5460
Matan Barakb4ff3a32016-02-09 14:57:42 +02005461 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005462};
5463
5464struct mlx5_ifc_modify_cong_status_in_bits {
5465 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005466 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005467
Matan Barakb4ff3a32016-02-09 14:57:42 +02005468 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005469 u8 op_mod[0x10];
5470
Matan Barakb4ff3a32016-02-09 14:57:42 +02005471 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005472 u8 priority[0x4];
5473 u8 cong_protocol[0x4];
5474
5475 u8 enable[0x1];
5476 u8 tag_enable[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005477 u8 reserved_at_62[0x1e];
Saeed Mahameede2816822015-05-28 22:28:40 +03005478};
5479
5480struct mlx5_ifc_modify_cong_params_out_bits {
5481 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005482 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005483
5484 u8 syndrome[0x20];
5485
Matan Barakb4ff3a32016-02-09 14:57:42 +02005486 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005487};
5488
5489struct mlx5_ifc_modify_cong_params_in_bits {
5490 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005491 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005492
Matan Barakb4ff3a32016-02-09 14:57:42 +02005493 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005494 u8 op_mod[0x10];
5495
Matan Barakb4ff3a32016-02-09 14:57:42 +02005496 u8 reserved_at_40[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03005497 u8 cong_protocol[0x4];
5498
5499 union mlx5_ifc_field_select_802_1_r_roce_auto_bits field_select;
5500
Matan Barakb4ff3a32016-02-09 14:57:42 +02005501 u8 reserved_at_80[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03005502
5503 union mlx5_ifc_cong_control_roce_ecn_auto_bits congestion_parameters;
5504};
5505
5506struct mlx5_ifc_manage_pages_out_bits {
5507 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005508 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005509
5510 u8 syndrome[0x20];
5511
5512 u8 output_num_entries[0x20];
5513
Matan Barakb4ff3a32016-02-09 14:57:42 +02005514 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005515
5516 u8 pas[0][0x40];
5517};
5518
5519enum {
5520 MLX5_MANAGE_PAGES_IN_OP_MOD_ALLOCATION_FAIL = 0x0,
5521 MLX5_MANAGE_PAGES_IN_OP_MOD_ALLOCATION_SUCCESS = 0x1,
5522 MLX5_MANAGE_PAGES_IN_OP_MOD_HCA_RETURN_PAGES = 0x2,
5523};
5524
5525struct mlx5_ifc_manage_pages_in_bits {
5526 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005527 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005528
Matan Barakb4ff3a32016-02-09 14:57:42 +02005529 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005530 u8 op_mod[0x10];
5531
Matan Barakb4ff3a32016-02-09 14:57:42 +02005532 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005533 u8 function_id[0x10];
5534
5535 u8 input_num_entries[0x20];
5536
5537 u8 pas[0][0x40];
5538};
5539
5540struct mlx5_ifc_mad_ifc_out_bits {
5541 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005542 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005543
5544 u8 syndrome[0x20];
5545
Matan Barakb4ff3a32016-02-09 14:57:42 +02005546 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005547
5548 u8 response_mad_packet[256][0x8];
5549};
5550
5551struct mlx5_ifc_mad_ifc_in_bits {
5552 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005553 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005554
Matan Barakb4ff3a32016-02-09 14:57:42 +02005555 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005556 u8 op_mod[0x10];
5557
5558 u8 remote_lid[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005559 u8 reserved_at_50[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005560 u8 port[0x8];
5561
Matan Barakb4ff3a32016-02-09 14:57:42 +02005562 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005563
5564 u8 mad[256][0x8];
5565};
5566
5567struct mlx5_ifc_init_hca_out_bits {
5568 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005569 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005570
5571 u8 syndrome[0x20];
5572
Matan Barakb4ff3a32016-02-09 14:57:42 +02005573 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005574};
5575
5576struct mlx5_ifc_init_hca_in_bits {
5577 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005578 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005579
Matan Barakb4ff3a32016-02-09 14:57:42 +02005580 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005581 u8 op_mod[0x10];
5582
Matan Barakb4ff3a32016-02-09 14:57:42 +02005583 u8 reserved_at_40[0x40];
Daniel Jurgens8737f812018-01-04 17:25:32 +02005584 u8 sw_owner_id[4][0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005585};
5586
5587struct mlx5_ifc_init2rtr_qp_out_bits {
5588 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005589 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005590
5591 u8 syndrome[0x20];
5592
Matan Barakb4ff3a32016-02-09 14:57:42 +02005593 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005594};
5595
5596struct mlx5_ifc_init2rtr_qp_in_bits {
5597 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005598 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005599
Matan Barakb4ff3a32016-02-09 14:57:42 +02005600 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005601 u8 op_mod[0x10];
5602
Matan Barakb4ff3a32016-02-09 14:57:42 +02005603 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005604 u8 qpn[0x18];
5605
Matan Barakb4ff3a32016-02-09 14:57:42 +02005606 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005607
5608 u8 opt_param_mask[0x20];
5609
Matan Barakb4ff3a32016-02-09 14:57:42 +02005610 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005611
5612 struct mlx5_ifc_qpc_bits qpc;
5613
Matan Barakb4ff3a32016-02-09 14:57:42 +02005614 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03005615};
5616
5617struct mlx5_ifc_init2init_qp_out_bits {
5618 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005619 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005620
5621 u8 syndrome[0x20];
5622
Matan Barakb4ff3a32016-02-09 14:57:42 +02005623 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005624};
5625
5626struct mlx5_ifc_init2init_qp_in_bits {
5627 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005628 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005629
Matan Barakb4ff3a32016-02-09 14:57:42 +02005630 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005631 u8 op_mod[0x10];
5632
Matan Barakb4ff3a32016-02-09 14:57:42 +02005633 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005634 u8 qpn[0x18];
5635
Matan Barakb4ff3a32016-02-09 14:57:42 +02005636 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005637
5638 u8 opt_param_mask[0x20];
5639
Matan Barakb4ff3a32016-02-09 14:57:42 +02005640 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005641
5642 struct mlx5_ifc_qpc_bits qpc;
5643
Matan Barakb4ff3a32016-02-09 14:57:42 +02005644 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03005645};
5646
5647struct mlx5_ifc_get_dropped_packet_log_out_bits {
5648 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005649 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005650
5651 u8 syndrome[0x20];
5652
Matan Barakb4ff3a32016-02-09 14:57:42 +02005653 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005654
5655 u8 packet_headers_log[128][0x8];
5656
5657 u8 packet_syndrome[64][0x8];
5658};
5659
5660struct mlx5_ifc_get_dropped_packet_log_in_bits {
5661 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005662 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005663
Matan Barakb4ff3a32016-02-09 14:57:42 +02005664 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005665 u8 op_mod[0x10];
5666
Matan Barakb4ff3a32016-02-09 14:57:42 +02005667 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005668};
5669
5670struct mlx5_ifc_gen_eqe_in_bits {
5671 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005672 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005673
Matan Barakb4ff3a32016-02-09 14:57:42 +02005674 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005675 u8 op_mod[0x10];
5676
Matan Barakb4ff3a32016-02-09 14:57:42 +02005677 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005678 u8 eq_number[0x8];
5679
Matan Barakb4ff3a32016-02-09 14:57:42 +02005680 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005681
5682 u8 eqe[64][0x8];
5683};
5684
5685struct mlx5_ifc_gen_eq_out_bits {
5686 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005687 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005688
5689 u8 syndrome[0x20];
5690
Matan Barakb4ff3a32016-02-09 14:57:42 +02005691 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005692};
5693
5694struct mlx5_ifc_enable_hca_out_bits {
5695 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005696 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005697
5698 u8 syndrome[0x20];
5699
Matan Barakb4ff3a32016-02-09 14:57:42 +02005700 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005701};
5702
5703struct mlx5_ifc_enable_hca_in_bits {
5704 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005705 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005706
Matan Barakb4ff3a32016-02-09 14:57:42 +02005707 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005708 u8 op_mod[0x10];
5709
Matan Barakb4ff3a32016-02-09 14:57:42 +02005710 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005711 u8 function_id[0x10];
5712
Matan Barakb4ff3a32016-02-09 14:57:42 +02005713 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005714};
5715
5716struct mlx5_ifc_drain_dct_out_bits {
5717 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005718 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005719
5720 u8 syndrome[0x20];
5721
Matan Barakb4ff3a32016-02-09 14:57:42 +02005722 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005723};
5724
5725struct mlx5_ifc_drain_dct_in_bits {
5726 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005727 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005728
Matan Barakb4ff3a32016-02-09 14:57:42 +02005729 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005730 u8 op_mod[0x10];
5731
Matan Barakb4ff3a32016-02-09 14:57:42 +02005732 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005733 u8 dctn[0x18];
5734
Matan Barakb4ff3a32016-02-09 14:57:42 +02005735 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005736};
5737
5738struct mlx5_ifc_disable_hca_out_bits {
5739 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005740 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005741
5742 u8 syndrome[0x20];
5743
Matan Barakb4ff3a32016-02-09 14:57:42 +02005744 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005745};
5746
5747struct mlx5_ifc_disable_hca_in_bits {
5748 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005749 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005750
Matan Barakb4ff3a32016-02-09 14:57:42 +02005751 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005752 u8 op_mod[0x10];
5753
Matan Barakb4ff3a32016-02-09 14:57:42 +02005754 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005755 u8 function_id[0x10];
5756
Matan Barakb4ff3a32016-02-09 14:57:42 +02005757 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005758};
5759
5760struct mlx5_ifc_detach_from_mcg_out_bits {
5761 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005762 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005763
5764 u8 syndrome[0x20];
5765
Matan Barakb4ff3a32016-02-09 14:57:42 +02005766 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005767};
5768
5769struct mlx5_ifc_detach_from_mcg_in_bits {
5770 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005771 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005772
Matan Barakb4ff3a32016-02-09 14:57:42 +02005773 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005774 u8 op_mod[0x10];
5775
Matan Barakb4ff3a32016-02-09 14:57:42 +02005776 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005777 u8 qpn[0x18];
5778
Matan Barakb4ff3a32016-02-09 14:57:42 +02005779 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005780
5781 u8 multicast_gid[16][0x8];
5782};
5783
Saeed Mahameed74862162016-06-09 15:11:34 +03005784struct mlx5_ifc_destroy_xrq_out_bits {
5785 u8 status[0x8];
5786 u8 reserved_at_8[0x18];
5787
5788 u8 syndrome[0x20];
5789
5790 u8 reserved_at_40[0x40];
5791};
5792
5793struct mlx5_ifc_destroy_xrq_in_bits {
5794 u8 opcode[0x10];
5795 u8 reserved_at_10[0x10];
5796
5797 u8 reserved_at_20[0x10];
5798 u8 op_mod[0x10];
5799
5800 u8 reserved_at_40[0x8];
5801 u8 xrqn[0x18];
5802
5803 u8 reserved_at_60[0x20];
5804};
5805
Saeed Mahameede2816822015-05-28 22:28:40 +03005806struct mlx5_ifc_destroy_xrc_srq_out_bits {
5807 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005808 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005809
5810 u8 syndrome[0x20];
5811
Matan Barakb4ff3a32016-02-09 14:57:42 +02005812 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005813};
5814
5815struct mlx5_ifc_destroy_xrc_srq_in_bits {
5816 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005817 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005818
Matan Barakb4ff3a32016-02-09 14:57:42 +02005819 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005820 u8 op_mod[0x10];
5821
Matan Barakb4ff3a32016-02-09 14:57:42 +02005822 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005823 u8 xrc_srqn[0x18];
5824
Matan Barakb4ff3a32016-02-09 14:57:42 +02005825 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005826};
5827
5828struct mlx5_ifc_destroy_tis_out_bits {
5829 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005830 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005831
5832 u8 syndrome[0x20];
5833
Matan Barakb4ff3a32016-02-09 14:57:42 +02005834 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005835};
5836
5837struct mlx5_ifc_destroy_tis_in_bits {
5838 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005839 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005840
Matan Barakb4ff3a32016-02-09 14:57:42 +02005841 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005842 u8 op_mod[0x10];
5843
Matan Barakb4ff3a32016-02-09 14:57:42 +02005844 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005845 u8 tisn[0x18];
5846
Matan Barakb4ff3a32016-02-09 14:57:42 +02005847 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005848};
5849
5850struct mlx5_ifc_destroy_tir_out_bits {
5851 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005852 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005853
5854 u8 syndrome[0x20];
5855
Matan Barakb4ff3a32016-02-09 14:57:42 +02005856 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005857};
5858
5859struct mlx5_ifc_destroy_tir_in_bits {
5860 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005861 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005862
Matan Barakb4ff3a32016-02-09 14:57:42 +02005863 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005864 u8 op_mod[0x10];
5865
Matan Barakb4ff3a32016-02-09 14:57:42 +02005866 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005867 u8 tirn[0x18];
5868
Matan Barakb4ff3a32016-02-09 14:57:42 +02005869 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005870};
5871
5872struct mlx5_ifc_destroy_srq_out_bits {
5873 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005874 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005875
5876 u8 syndrome[0x20];
5877
Matan Barakb4ff3a32016-02-09 14:57:42 +02005878 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005879};
5880
5881struct mlx5_ifc_destroy_srq_in_bits {
5882 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005883 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005884
Matan Barakb4ff3a32016-02-09 14:57:42 +02005885 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005886 u8 op_mod[0x10];
5887
Matan Barakb4ff3a32016-02-09 14:57:42 +02005888 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005889 u8 srqn[0x18];
5890
Matan Barakb4ff3a32016-02-09 14:57:42 +02005891 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005892};
5893
5894struct mlx5_ifc_destroy_sq_out_bits {
5895 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005896 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005897
5898 u8 syndrome[0x20];
5899
Matan Barakb4ff3a32016-02-09 14:57:42 +02005900 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005901};
5902
5903struct mlx5_ifc_destroy_sq_in_bits {
5904 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005905 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005906
Matan Barakb4ff3a32016-02-09 14:57:42 +02005907 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005908 u8 op_mod[0x10];
5909
Matan Barakb4ff3a32016-02-09 14:57:42 +02005910 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005911 u8 sqn[0x18];
5912
Matan Barakb4ff3a32016-02-09 14:57:42 +02005913 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005914};
5915
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +03005916struct mlx5_ifc_destroy_scheduling_element_out_bits {
5917 u8 status[0x8];
5918 u8 reserved_at_8[0x18];
5919
5920 u8 syndrome[0x20];
5921
5922 u8 reserved_at_40[0x1c0];
5923};
5924
5925struct mlx5_ifc_destroy_scheduling_element_in_bits {
5926 u8 opcode[0x10];
5927 u8 reserved_at_10[0x10];
5928
5929 u8 reserved_at_20[0x10];
5930 u8 op_mod[0x10];
5931
5932 u8 scheduling_hierarchy[0x8];
5933 u8 reserved_at_48[0x18];
5934
5935 u8 scheduling_element_id[0x20];
5936
5937 u8 reserved_at_80[0x180];
5938};
5939
Saeed Mahameede2816822015-05-28 22:28:40 +03005940struct mlx5_ifc_destroy_rqt_out_bits {
5941 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005942 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005943
5944 u8 syndrome[0x20];
5945
Matan Barakb4ff3a32016-02-09 14:57:42 +02005946 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005947};
5948
5949struct mlx5_ifc_destroy_rqt_in_bits {
5950 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005951 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005952
Matan Barakb4ff3a32016-02-09 14:57:42 +02005953 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005954 u8 op_mod[0x10];
5955
Matan Barakb4ff3a32016-02-09 14:57:42 +02005956 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005957 u8 rqtn[0x18];
5958
Matan Barakb4ff3a32016-02-09 14:57:42 +02005959 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005960};
5961
5962struct mlx5_ifc_destroy_rq_out_bits {
5963 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005964 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005965
5966 u8 syndrome[0x20];
5967
Matan Barakb4ff3a32016-02-09 14:57:42 +02005968 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005969};
5970
5971struct mlx5_ifc_destroy_rq_in_bits {
5972 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005973 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005974
Matan Barakb4ff3a32016-02-09 14:57:42 +02005975 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005976 u8 op_mod[0x10];
5977
Matan Barakb4ff3a32016-02-09 14:57:42 +02005978 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005979 u8 rqn[0x18];
5980
Matan Barakb4ff3a32016-02-09 14:57:42 +02005981 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005982};
5983
Maor Gottliebc1e0bfc2017-05-30 10:29:11 +03005984struct mlx5_ifc_set_delay_drop_params_in_bits {
5985 u8 opcode[0x10];
5986 u8 reserved_at_10[0x10];
5987
5988 u8 reserved_at_20[0x10];
5989 u8 op_mod[0x10];
5990
5991 u8 reserved_at_40[0x20];
5992
5993 u8 reserved_at_60[0x10];
5994 u8 delay_drop_timeout[0x10];
5995};
5996
5997struct mlx5_ifc_set_delay_drop_params_out_bits {
5998 u8 status[0x8];
5999 u8 reserved_at_8[0x18];
6000
6001 u8 syndrome[0x20];
6002
6003 u8 reserved_at_40[0x40];
6004};
6005
Saeed Mahameede2816822015-05-28 22:28:40 +03006006struct mlx5_ifc_destroy_rmp_out_bits {
6007 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006008 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006009
6010 u8 syndrome[0x20];
6011
Matan Barakb4ff3a32016-02-09 14:57:42 +02006012 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006013};
6014
6015struct mlx5_ifc_destroy_rmp_in_bits {
6016 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006017 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006018
Matan Barakb4ff3a32016-02-09 14:57:42 +02006019 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006020 u8 op_mod[0x10];
6021
Matan Barakb4ff3a32016-02-09 14:57:42 +02006022 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006023 u8 rmpn[0x18];
6024
Matan Barakb4ff3a32016-02-09 14:57:42 +02006025 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006026};
6027
6028struct mlx5_ifc_destroy_qp_out_bits {
6029 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006030 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006031
6032 u8 syndrome[0x20];
6033
Matan Barakb4ff3a32016-02-09 14:57:42 +02006034 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006035};
6036
6037struct mlx5_ifc_destroy_qp_in_bits {
6038 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006039 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006040
Matan Barakb4ff3a32016-02-09 14:57:42 +02006041 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006042 u8 op_mod[0x10];
6043
Matan Barakb4ff3a32016-02-09 14:57:42 +02006044 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006045 u8 qpn[0x18];
6046
Matan Barakb4ff3a32016-02-09 14:57:42 +02006047 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006048};
6049
6050struct mlx5_ifc_destroy_psv_out_bits {
6051 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006052 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006053
6054 u8 syndrome[0x20];
6055
Matan Barakb4ff3a32016-02-09 14:57:42 +02006056 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006057};
6058
6059struct mlx5_ifc_destroy_psv_in_bits {
6060 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006061 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006062
Matan Barakb4ff3a32016-02-09 14:57:42 +02006063 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006064 u8 op_mod[0x10];
6065
Matan Barakb4ff3a32016-02-09 14:57:42 +02006066 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006067 u8 psvn[0x18];
6068
Matan Barakb4ff3a32016-02-09 14:57:42 +02006069 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006070};
6071
6072struct mlx5_ifc_destroy_mkey_out_bits {
6073 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006074 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006075
6076 u8 syndrome[0x20];
6077
Matan Barakb4ff3a32016-02-09 14:57:42 +02006078 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006079};
6080
6081struct mlx5_ifc_destroy_mkey_in_bits {
6082 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006083 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006084
Matan Barakb4ff3a32016-02-09 14:57:42 +02006085 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006086 u8 op_mod[0x10];
6087
Matan Barakb4ff3a32016-02-09 14:57:42 +02006088 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006089 u8 mkey_index[0x18];
6090
Matan Barakb4ff3a32016-02-09 14:57:42 +02006091 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006092};
6093
6094struct mlx5_ifc_destroy_flow_table_out_bits {
6095 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006096 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006097
6098 u8 syndrome[0x20];
6099
Matan Barakb4ff3a32016-02-09 14:57:42 +02006100 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006101};
6102
6103struct mlx5_ifc_destroy_flow_table_in_bits {
6104 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006105 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006106
Matan Barakb4ff3a32016-02-09 14:57:42 +02006107 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006108 u8 op_mod[0x10];
6109
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03006110 u8 other_vport[0x1];
6111 u8 reserved_at_41[0xf];
6112 u8 vport_number[0x10];
6113
6114 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006115
6116 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006117 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006118
Matan Barakb4ff3a32016-02-09 14:57:42 +02006119 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006120 u8 table_id[0x18];
6121
Matan Barakb4ff3a32016-02-09 14:57:42 +02006122 u8 reserved_at_c0[0x140];
Saeed Mahameede2816822015-05-28 22:28:40 +03006123};
6124
6125struct mlx5_ifc_destroy_flow_group_out_bits {
6126 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006127 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006128
6129 u8 syndrome[0x20];
6130
Matan Barakb4ff3a32016-02-09 14:57:42 +02006131 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006132};
6133
6134struct mlx5_ifc_destroy_flow_group_in_bits {
6135 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006136 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006137
Matan Barakb4ff3a32016-02-09 14:57:42 +02006138 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006139 u8 op_mod[0x10];
6140
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03006141 u8 other_vport[0x1];
6142 u8 reserved_at_41[0xf];
6143 u8 vport_number[0x10];
6144
6145 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006146
6147 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006148 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006149
Matan Barakb4ff3a32016-02-09 14:57:42 +02006150 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006151 u8 table_id[0x18];
6152
6153 u8 group_id[0x20];
6154
Matan Barakb4ff3a32016-02-09 14:57:42 +02006155 u8 reserved_at_e0[0x120];
Saeed Mahameede2816822015-05-28 22:28:40 +03006156};
6157
6158struct mlx5_ifc_destroy_eq_out_bits {
6159 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006160 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006161
6162 u8 syndrome[0x20];
6163
Matan Barakb4ff3a32016-02-09 14:57:42 +02006164 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006165};
6166
6167struct mlx5_ifc_destroy_eq_in_bits {
6168 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006169 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006170
Matan Barakb4ff3a32016-02-09 14:57:42 +02006171 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006172 u8 op_mod[0x10];
6173
Matan Barakb4ff3a32016-02-09 14:57:42 +02006174 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006175 u8 eq_number[0x8];
6176
Matan Barakb4ff3a32016-02-09 14:57:42 +02006177 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006178};
6179
6180struct mlx5_ifc_destroy_dct_out_bits {
6181 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006182 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006183
6184 u8 syndrome[0x20];
6185
Matan Barakb4ff3a32016-02-09 14:57:42 +02006186 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006187};
6188
6189struct mlx5_ifc_destroy_dct_in_bits {
6190 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006191 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006192
Matan Barakb4ff3a32016-02-09 14:57:42 +02006193 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006194 u8 op_mod[0x10];
6195
Matan Barakb4ff3a32016-02-09 14:57:42 +02006196 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006197 u8 dctn[0x18];
6198
Matan Barakb4ff3a32016-02-09 14:57:42 +02006199 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006200};
6201
6202struct mlx5_ifc_destroy_cq_out_bits {
6203 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006204 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006205
6206 u8 syndrome[0x20];
6207
Matan Barakb4ff3a32016-02-09 14:57:42 +02006208 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006209};
6210
6211struct mlx5_ifc_destroy_cq_in_bits {
6212 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006213 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006214
Matan Barakb4ff3a32016-02-09 14:57:42 +02006215 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006216 u8 op_mod[0x10];
6217
Matan Barakb4ff3a32016-02-09 14:57:42 +02006218 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006219 u8 cqn[0x18];
6220
Matan Barakb4ff3a32016-02-09 14:57:42 +02006221 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006222};
6223
6224struct mlx5_ifc_delete_vxlan_udp_dport_out_bits {
6225 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006226 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006227
6228 u8 syndrome[0x20];
6229
Matan Barakb4ff3a32016-02-09 14:57:42 +02006230 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006231};
6232
6233struct mlx5_ifc_delete_vxlan_udp_dport_in_bits {
6234 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006235 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006236
Matan Barakb4ff3a32016-02-09 14:57:42 +02006237 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006238 u8 op_mod[0x10];
6239
Matan Barakb4ff3a32016-02-09 14:57:42 +02006240 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006241
Matan Barakb4ff3a32016-02-09 14:57:42 +02006242 u8 reserved_at_60[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006243 u8 vxlan_udp_port[0x10];
6244};
6245
6246struct mlx5_ifc_delete_l2_table_entry_out_bits {
6247 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006248 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006249
6250 u8 syndrome[0x20];
6251
Matan Barakb4ff3a32016-02-09 14:57:42 +02006252 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006253};
6254
6255struct mlx5_ifc_delete_l2_table_entry_in_bits {
6256 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006257 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006258
Matan Barakb4ff3a32016-02-09 14:57:42 +02006259 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006260 u8 op_mod[0x10];
6261
Matan Barakb4ff3a32016-02-09 14:57:42 +02006262 u8 reserved_at_40[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03006263
Matan Barakb4ff3a32016-02-09 14:57:42 +02006264 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006265 u8 table_index[0x18];
6266
Matan Barakb4ff3a32016-02-09 14:57:42 +02006267 u8 reserved_at_c0[0x140];
Saeed Mahameede2816822015-05-28 22:28:40 +03006268};
6269
6270struct mlx5_ifc_delete_fte_out_bits {
6271 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006272 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006273
6274 u8 syndrome[0x20];
6275
Matan Barakb4ff3a32016-02-09 14:57:42 +02006276 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006277};
6278
6279struct mlx5_ifc_delete_fte_in_bits {
6280 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006281 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006282
Matan Barakb4ff3a32016-02-09 14:57:42 +02006283 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006284 u8 op_mod[0x10];
6285
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03006286 u8 other_vport[0x1];
6287 u8 reserved_at_41[0xf];
6288 u8 vport_number[0x10];
6289
6290 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006291
6292 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006293 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006294
Matan Barakb4ff3a32016-02-09 14:57:42 +02006295 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006296 u8 table_id[0x18];
6297
Matan Barakb4ff3a32016-02-09 14:57:42 +02006298 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006299
6300 u8 flow_index[0x20];
6301
Matan Barakb4ff3a32016-02-09 14:57:42 +02006302 u8 reserved_at_120[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03006303};
6304
6305struct mlx5_ifc_dealloc_xrcd_out_bits {
6306 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006307 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006308
6309 u8 syndrome[0x20];
6310
Matan Barakb4ff3a32016-02-09 14:57:42 +02006311 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006312};
6313
6314struct mlx5_ifc_dealloc_xrcd_in_bits {
6315 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006316 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006317
Matan Barakb4ff3a32016-02-09 14:57:42 +02006318 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006319 u8 op_mod[0x10];
6320
Matan Barakb4ff3a32016-02-09 14:57:42 +02006321 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006322 u8 xrcd[0x18];
6323
Matan Barakb4ff3a32016-02-09 14:57:42 +02006324 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006325};
6326
6327struct mlx5_ifc_dealloc_uar_out_bits {
6328 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006329 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006330
6331 u8 syndrome[0x20];
6332
Matan Barakb4ff3a32016-02-09 14:57:42 +02006333 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006334};
6335
6336struct mlx5_ifc_dealloc_uar_in_bits {
6337 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006338 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006339
Matan Barakb4ff3a32016-02-09 14:57:42 +02006340 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006341 u8 op_mod[0x10];
6342
Matan Barakb4ff3a32016-02-09 14:57:42 +02006343 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006344 u8 uar[0x18];
6345
Matan Barakb4ff3a32016-02-09 14:57:42 +02006346 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006347};
6348
6349struct mlx5_ifc_dealloc_transport_domain_out_bits {
6350 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006351 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006352
6353 u8 syndrome[0x20];
6354
Matan Barakb4ff3a32016-02-09 14:57:42 +02006355 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006356};
6357
6358struct mlx5_ifc_dealloc_transport_domain_in_bits {
6359 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006360 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006361
Matan Barakb4ff3a32016-02-09 14:57:42 +02006362 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006363 u8 op_mod[0x10];
6364
Matan Barakb4ff3a32016-02-09 14:57:42 +02006365 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006366 u8 transport_domain[0x18];
6367
Matan Barakb4ff3a32016-02-09 14:57:42 +02006368 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006369};
6370
6371struct mlx5_ifc_dealloc_q_counter_out_bits {
6372 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006373 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006374
6375 u8 syndrome[0x20];
6376
Matan Barakb4ff3a32016-02-09 14:57:42 +02006377 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006378};
6379
6380struct mlx5_ifc_dealloc_q_counter_in_bits {
6381 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006382 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006383
Matan Barakb4ff3a32016-02-09 14:57:42 +02006384 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006385 u8 op_mod[0x10];
6386
Matan Barakb4ff3a32016-02-09 14:57:42 +02006387 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006388 u8 counter_set_id[0x8];
6389
Matan Barakb4ff3a32016-02-09 14:57:42 +02006390 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006391};
6392
6393struct mlx5_ifc_dealloc_pd_out_bits {
6394 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006395 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006396
6397 u8 syndrome[0x20];
6398
Matan Barakb4ff3a32016-02-09 14:57:42 +02006399 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006400};
6401
6402struct mlx5_ifc_dealloc_pd_in_bits {
6403 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006404 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006405
Matan Barakb4ff3a32016-02-09 14:57:42 +02006406 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006407 u8 op_mod[0x10];
6408
Matan Barakb4ff3a32016-02-09 14:57:42 +02006409 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006410 u8 pd[0x18];
6411
Matan Barakb4ff3a32016-02-09 14:57:42 +02006412 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006413};
6414
Amir Vadai9dc0b282016-05-13 12:55:39 +00006415struct mlx5_ifc_dealloc_flow_counter_out_bits {
6416 u8 status[0x8];
6417 u8 reserved_at_8[0x18];
6418
6419 u8 syndrome[0x20];
6420
6421 u8 reserved_at_40[0x40];
6422};
6423
6424struct mlx5_ifc_dealloc_flow_counter_in_bits {
6425 u8 opcode[0x10];
6426 u8 reserved_at_10[0x10];
6427
6428 u8 reserved_at_20[0x10];
6429 u8 op_mod[0x10];
6430
Rabie Louloua8ffcc72017-07-09 13:39:30 +03006431 u8 flow_counter_id[0x20];
Amir Vadai9dc0b282016-05-13 12:55:39 +00006432
6433 u8 reserved_at_60[0x20];
6434};
6435
Saeed Mahameed74862162016-06-09 15:11:34 +03006436struct mlx5_ifc_create_xrq_out_bits {
6437 u8 status[0x8];
6438 u8 reserved_at_8[0x18];
6439
6440 u8 syndrome[0x20];
6441
6442 u8 reserved_at_40[0x8];
6443 u8 xrqn[0x18];
6444
6445 u8 reserved_at_60[0x20];
6446};
6447
6448struct mlx5_ifc_create_xrq_in_bits {
6449 u8 opcode[0x10];
6450 u8 reserved_at_10[0x10];
6451
6452 u8 reserved_at_20[0x10];
6453 u8 op_mod[0x10];
6454
6455 u8 reserved_at_40[0x40];
6456
6457 struct mlx5_ifc_xrqc_bits xrq_context;
6458};
6459
Saeed Mahameede2816822015-05-28 22:28:40 +03006460struct mlx5_ifc_create_xrc_srq_out_bits {
6461 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006462 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006463
6464 u8 syndrome[0x20];
6465
Matan Barakb4ff3a32016-02-09 14:57:42 +02006466 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006467 u8 xrc_srqn[0x18];
6468
Matan Barakb4ff3a32016-02-09 14:57:42 +02006469 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006470};
6471
6472struct mlx5_ifc_create_xrc_srq_in_bits {
6473 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006474 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006475
Matan Barakb4ff3a32016-02-09 14:57:42 +02006476 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006477 u8 op_mod[0x10];
6478
Matan Barakb4ff3a32016-02-09 14:57:42 +02006479 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006480
6481 struct mlx5_ifc_xrc_srqc_bits xrc_srq_context_entry;
6482
Matan Barakb4ff3a32016-02-09 14:57:42 +02006483 u8 reserved_at_280[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03006484
6485 u8 pas[0][0x40];
6486};
6487
6488struct mlx5_ifc_create_tis_out_bits {
6489 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006490 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006491
6492 u8 syndrome[0x20];
6493
Matan Barakb4ff3a32016-02-09 14:57:42 +02006494 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006495 u8 tisn[0x18];
6496
Matan Barakb4ff3a32016-02-09 14:57:42 +02006497 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006498};
6499
6500struct mlx5_ifc_create_tis_in_bits {
6501 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006502 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006503
Matan Barakb4ff3a32016-02-09 14:57:42 +02006504 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006505 u8 op_mod[0x10];
6506
Matan Barakb4ff3a32016-02-09 14:57:42 +02006507 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03006508
6509 struct mlx5_ifc_tisc_bits ctx;
6510};
6511
6512struct mlx5_ifc_create_tir_out_bits {
6513 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006514 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006515
6516 u8 syndrome[0x20];
6517
Matan Barakb4ff3a32016-02-09 14:57:42 +02006518 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006519 u8 tirn[0x18];
6520
Matan Barakb4ff3a32016-02-09 14:57:42 +02006521 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006522};
6523
6524struct mlx5_ifc_create_tir_in_bits {
6525 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006526 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006527
Matan Barakb4ff3a32016-02-09 14:57:42 +02006528 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006529 u8 op_mod[0x10];
6530
Matan Barakb4ff3a32016-02-09 14:57:42 +02006531 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03006532
6533 struct mlx5_ifc_tirc_bits ctx;
6534};
6535
6536struct mlx5_ifc_create_srq_out_bits {
6537 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006538 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006539
6540 u8 syndrome[0x20];
6541
Matan Barakb4ff3a32016-02-09 14:57:42 +02006542 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006543 u8 srqn[0x18];
6544
Matan Barakb4ff3a32016-02-09 14:57:42 +02006545 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006546};
6547
6548struct mlx5_ifc_create_srq_in_bits {
6549 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006550 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006551
Matan Barakb4ff3a32016-02-09 14:57:42 +02006552 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006553 u8 op_mod[0x10];
6554
Matan Barakb4ff3a32016-02-09 14:57:42 +02006555 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006556
6557 struct mlx5_ifc_srqc_bits srq_context_entry;
6558
Matan Barakb4ff3a32016-02-09 14:57:42 +02006559 u8 reserved_at_280[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03006560
6561 u8 pas[0][0x40];
6562};
6563
6564struct mlx5_ifc_create_sq_out_bits {
6565 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006566 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006567
6568 u8 syndrome[0x20];
6569
Matan Barakb4ff3a32016-02-09 14:57:42 +02006570 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006571 u8 sqn[0x18];
6572
Matan Barakb4ff3a32016-02-09 14:57:42 +02006573 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006574};
6575
6576struct mlx5_ifc_create_sq_in_bits {
6577 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006578 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006579
Matan Barakb4ff3a32016-02-09 14:57:42 +02006580 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006581 u8 op_mod[0x10];
6582
Matan Barakb4ff3a32016-02-09 14:57:42 +02006583 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03006584
6585 struct mlx5_ifc_sqc_bits ctx;
6586};
6587
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +03006588struct mlx5_ifc_create_scheduling_element_out_bits {
6589 u8 status[0x8];
6590 u8 reserved_at_8[0x18];
6591
6592 u8 syndrome[0x20];
6593
6594 u8 reserved_at_40[0x40];
6595
6596 u8 scheduling_element_id[0x20];
6597
6598 u8 reserved_at_a0[0x160];
6599};
6600
6601struct mlx5_ifc_create_scheduling_element_in_bits {
6602 u8 opcode[0x10];
6603 u8 reserved_at_10[0x10];
6604
6605 u8 reserved_at_20[0x10];
6606 u8 op_mod[0x10];
6607
6608 u8 scheduling_hierarchy[0x8];
6609 u8 reserved_at_48[0x18];
6610
6611 u8 reserved_at_60[0xa0];
6612
6613 struct mlx5_ifc_scheduling_context_bits scheduling_context;
6614
6615 u8 reserved_at_300[0x100];
6616};
6617
Saeed Mahameede2816822015-05-28 22:28:40 +03006618struct mlx5_ifc_create_rqt_out_bits {
6619 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006620 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006621
6622 u8 syndrome[0x20];
6623
Matan Barakb4ff3a32016-02-09 14:57:42 +02006624 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006625 u8 rqtn[0x18];
6626
Matan Barakb4ff3a32016-02-09 14:57:42 +02006627 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006628};
6629
6630struct mlx5_ifc_create_rqt_in_bits {
6631 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006632 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006633
Matan Barakb4ff3a32016-02-09 14:57:42 +02006634 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006635 u8 op_mod[0x10];
6636
Matan Barakb4ff3a32016-02-09 14:57:42 +02006637 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03006638
6639 struct mlx5_ifc_rqtc_bits rqt_context;
6640};
6641
6642struct mlx5_ifc_create_rq_out_bits {
6643 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006644 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006645
6646 u8 syndrome[0x20];
6647
Matan Barakb4ff3a32016-02-09 14:57:42 +02006648 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006649 u8 rqn[0x18];
6650
Matan Barakb4ff3a32016-02-09 14:57:42 +02006651 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006652};
6653
6654struct mlx5_ifc_create_rq_in_bits {
6655 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006656 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006657
Matan Barakb4ff3a32016-02-09 14:57:42 +02006658 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006659 u8 op_mod[0x10];
6660
Matan Barakb4ff3a32016-02-09 14:57:42 +02006661 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03006662
6663 struct mlx5_ifc_rqc_bits ctx;
6664};
6665
6666struct mlx5_ifc_create_rmp_out_bits {
6667 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006668 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006669
6670 u8 syndrome[0x20];
6671
Matan Barakb4ff3a32016-02-09 14:57:42 +02006672 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006673 u8 rmpn[0x18];
6674
Matan Barakb4ff3a32016-02-09 14:57:42 +02006675 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006676};
6677
6678struct mlx5_ifc_create_rmp_in_bits {
6679 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006680 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006681
Matan Barakb4ff3a32016-02-09 14:57:42 +02006682 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006683 u8 op_mod[0x10];
6684
Matan Barakb4ff3a32016-02-09 14:57:42 +02006685 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03006686
6687 struct mlx5_ifc_rmpc_bits ctx;
6688};
6689
6690struct mlx5_ifc_create_qp_out_bits {
6691 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006692 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006693
6694 u8 syndrome[0x20];
6695
Matan Barakb4ff3a32016-02-09 14:57:42 +02006696 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006697 u8 qpn[0x18];
6698
Matan Barakb4ff3a32016-02-09 14:57:42 +02006699 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006700};
6701
6702struct mlx5_ifc_create_qp_in_bits {
6703 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006704 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006705
Matan Barakb4ff3a32016-02-09 14:57:42 +02006706 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006707 u8 op_mod[0x10];
6708
Matan Barakb4ff3a32016-02-09 14:57:42 +02006709 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006710
6711 u8 opt_param_mask[0x20];
6712
Matan Barakb4ff3a32016-02-09 14:57:42 +02006713 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006714
6715 struct mlx5_ifc_qpc_bits qpc;
6716
Matan Barakb4ff3a32016-02-09 14:57:42 +02006717 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03006718
6719 u8 pas[0][0x40];
6720};
6721
6722struct mlx5_ifc_create_psv_out_bits {
6723 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006724 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006725
6726 u8 syndrome[0x20];
6727
Matan Barakb4ff3a32016-02-09 14:57:42 +02006728 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006729
Matan Barakb4ff3a32016-02-09 14:57:42 +02006730 u8 reserved_at_80[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006731 u8 psv0_index[0x18];
6732
Matan Barakb4ff3a32016-02-09 14:57:42 +02006733 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006734 u8 psv1_index[0x18];
6735
Matan Barakb4ff3a32016-02-09 14:57:42 +02006736 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006737 u8 psv2_index[0x18];
6738
Matan Barakb4ff3a32016-02-09 14:57:42 +02006739 u8 reserved_at_e0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006740 u8 psv3_index[0x18];
6741};
6742
6743struct mlx5_ifc_create_psv_in_bits {
6744 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006745 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006746
Matan Barakb4ff3a32016-02-09 14:57:42 +02006747 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006748 u8 op_mod[0x10];
6749
6750 u8 num_psv[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006751 u8 reserved_at_44[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03006752 u8 pd[0x18];
6753
Matan Barakb4ff3a32016-02-09 14:57:42 +02006754 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006755};
6756
6757struct mlx5_ifc_create_mkey_out_bits {
6758 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006759 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006760
6761 u8 syndrome[0x20];
6762
Matan Barakb4ff3a32016-02-09 14:57:42 +02006763 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006764 u8 mkey_index[0x18];
6765
Matan Barakb4ff3a32016-02-09 14:57:42 +02006766 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006767};
6768
6769struct mlx5_ifc_create_mkey_in_bits {
6770 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006771 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006772
Matan Barakb4ff3a32016-02-09 14:57:42 +02006773 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006774 u8 op_mod[0x10];
6775
Matan Barakb4ff3a32016-02-09 14:57:42 +02006776 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006777
6778 u8 pg_access[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006779 u8 reserved_at_61[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03006780
6781 struct mlx5_ifc_mkc_bits memory_key_mkey_entry;
6782
Matan Barakb4ff3a32016-02-09 14:57:42 +02006783 u8 reserved_at_280[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03006784
6785 u8 translations_octword_actual_size[0x20];
6786
Matan Barakb4ff3a32016-02-09 14:57:42 +02006787 u8 reserved_at_320[0x560];
Saeed Mahameede2816822015-05-28 22:28:40 +03006788
6789 u8 klm_pas_mtt[0][0x20];
6790};
6791
6792struct mlx5_ifc_create_flow_table_out_bits {
6793 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006794 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006795
6796 u8 syndrome[0x20];
6797
Matan Barakb4ff3a32016-02-09 14:57:42 +02006798 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006799 u8 table_id[0x18];
6800
Matan Barakb4ff3a32016-02-09 14:57:42 +02006801 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006802};
6803
Maor Gottlieb0c90e9c2017-03-12 11:35:23 +02006804struct mlx5_ifc_flow_table_context_bits {
6805 u8 encap_en[0x1];
6806 u8 decap_en[0x1];
6807 u8 reserved_at_2[0x2];
6808 u8 table_miss_action[0x4];
6809 u8 level[0x8];
6810 u8 reserved_at_10[0x8];
6811 u8 log_size[0x8];
6812
6813 u8 reserved_at_20[0x8];
6814 u8 table_miss_id[0x18];
6815
6816 u8 reserved_at_40[0x8];
6817 u8 lag_master_next_table_id[0x18];
6818
6819 u8 reserved_at_60[0xe0];
6820};
6821
Saeed Mahameede2816822015-05-28 22:28:40 +03006822struct mlx5_ifc_create_flow_table_in_bits {
6823 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006824 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006825
Matan Barakb4ff3a32016-02-09 14:57:42 +02006826 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006827 u8 op_mod[0x10];
6828
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03006829 u8 other_vport[0x1];
6830 u8 reserved_at_41[0xf];
6831 u8 vport_number[0x10];
6832
6833 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006834
6835 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006836 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006837
Matan Barakb4ff3a32016-02-09 14:57:42 +02006838 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006839
Maor Gottlieb0c90e9c2017-03-12 11:35:23 +02006840 struct mlx5_ifc_flow_table_context_bits flow_table_context;
Saeed Mahameede2816822015-05-28 22:28:40 +03006841};
6842
6843struct mlx5_ifc_create_flow_group_out_bits {
6844 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006845 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006846
6847 u8 syndrome[0x20];
6848
Matan Barakb4ff3a32016-02-09 14:57:42 +02006849 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006850 u8 group_id[0x18];
6851
Matan Barakb4ff3a32016-02-09 14:57:42 +02006852 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006853};
6854
6855enum {
6856 MLX5_CREATE_FLOW_GROUP_IN_MATCH_CRITERIA_ENABLE_OUTER_HEADERS = 0x0,
6857 MLX5_CREATE_FLOW_GROUP_IN_MATCH_CRITERIA_ENABLE_MISC_PARAMETERS = 0x1,
6858 MLX5_CREATE_FLOW_GROUP_IN_MATCH_CRITERIA_ENABLE_INNER_HEADERS = 0x2,
6859};
6860
6861struct mlx5_ifc_create_flow_group_in_bits {
6862 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006863 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006864
Matan Barakb4ff3a32016-02-09 14:57:42 +02006865 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006866 u8 op_mod[0x10];
6867
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03006868 u8 other_vport[0x1];
6869 u8 reserved_at_41[0xf];
6870 u8 vport_number[0x10];
6871
6872 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006873
6874 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006875 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006876
Matan Barakb4ff3a32016-02-09 14:57:42 +02006877 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006878 u8 table_id[0x18];
6879
Matan Barakb4ff3a32016-02-09 14:57:42 +02006880 u8 reserved_at_c0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006881
6882 u8 start_flow_index[0x20];
6883
Matan Barakb4ff3a32016-02-09 14:57:42 +02006884 u8 reserved_at_100[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006885
6886 u8 end_flow_index[0x20];
6887
Matan Barakb4ff3a32016-02-09 14:57:42 +02006888 u8 reserved_at_140[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03006889
Matan Barakb4ff3a32016-02-09 14:57:42 +02006890 u8 reserved_at_1e0[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006891 u8 match_criteria_enable[0x8];
6892
6893 struct mlx5_ifc_fte_match_param_bits match_criteria;
6894
Matan Barakb4ff3a32016-02-09 14:57:42 +02006895 u8 reserved_at_1200[0xe00];
Saeed Mahameede2816822015-05-28 22:28:40 +03006896};
6897
6898struct mlx5_ifc_create_eq_out_bits {
6899 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006900 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006901
6902 u8 syndrome[0x20];
6903
Matan Barakb4ff3a32016-02-09 14:57:42 +02006904 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006905 u8 eq_number[0x8];
6906
Matan Barakb4ff3a32016-02-09 14:57:42 +02006907 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006908};
6909
6910struct mlx5_ifc_create_eq_in_bits {
6911 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006912 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006913
Matan Barakb4ff3a32016-02-09 14:57:42 +02006914 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006915 u8 op_mod[0x10];
6916
Matan Barakb4ff3a32016-02-09 14:57:42 +02006917 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006918
6919 struct mlx5_ifc_eqc_bits eq_context_entry;
6920
Matan Barakb4ff3a32016-02-09 14:57:42 +02006921 u8 reserved_at_280[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006922
6923 u8 event_bitmask[0x40];
6924
Matan Barakb4ff3a32016-02-09 14:57:42 +02006925 u8 reserved_at_300[0x580];
Saeed Mahameede2816822015-05-28 22:28:40 +03006926
6927 u8 pas[0][0x40];
6928};
6929
6930struct mlx5_ifc_create_dct_out_bits {
6931 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006932 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006933
6934 u8 syndrome[0x20];
6935
Matan Barakb4ff3a32016-02-09 14:57:42 +02006936 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006937 u8 dctn[0x18];
6938
Matan Barakb4ff3a32016-02-09 14:57:42 +02006939 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006940};
6941
6942struct mlx5_ifc_create_dct_in_bits {
6943 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006944 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006945
Matan Barakb4ff3a32016-02-09 14:57:42 +02006946 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006947 u8 op_mod[0x10];
6948
Matan Barakb4ff3a32016-02-09 14:57:42 +02006949 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006950
6951 struct mlx5_ifc_dctc_bits dct_context_entry;
6952
Matan Barakb4ff3a32016-02-09 14:57:42 +02006953 u8 reserved_at_280[0x180];
Saeed Mahameede2816822015-05-28 22:28:40 +03006954};
6955
6956struct mlx5_ifc_create_cq_out_bits {
6957 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006958 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006959
6960 u8 syndrome[0x20];
6961
Matan Barakb4ff3a32016-02-09 14:57:42 +02006962 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006963 u8 cqn[0x18];
6964
Matan Barakb4ff3a32016-02-09 14:57:42 +02006965 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006966};
6967
6968struct mlx5_ifc_create_cq_in_bits {
6969 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006970 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006971
Matan Barakb4ff3a32016-02-09 14:57:42 +02006972 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006973 u8 op_mod[0x10];
6974
Matan Barakb4ff3a32016-02-09 14:57:42 +02006975 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006976
6977 struct mlx5_ifc_cqc_bits cq_context;
6978
Matan Barakb4ff3a32016-02-09 14:57:42 +02006979 u8 reserved_at_280[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03006980
6981 u8 pas[0][0x40];
6982};
6983
6984struct mlx5_ifc_config_int_moderation_out_bits {
6985 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006986 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006987
6988 u8 syndrome[0x20];
6989
Matan Barakb4ff3a32016-02-09 14:57:42 +02006990 u8 reserved_at_40[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03006991 u8 min_delay[0xc];
6992 u8 int_vector[0x10];
6993
Matan Barakb4ff3a32016-02-09 14:57:42 +02006994 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006995};
6996
6997enum {
6998 MLX5_CONFIG_INT_MODERATION_IN_OP_MOD_WRITE = 0x0,
6999 MLX5_CONFIG_INT_MODERATION_IN_OP_MOD_READ = 0x1,
7000};
7001
7002struct mlx5_ifc_config_int_moderation_in_bits {
7003 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007004 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007005
Matan Barakb4ff3a32016-02-09 14:57:42 +02007006 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007007 u8 op_mod[0x10];
7008
Matan Barakb4ff3a32016-02-09 14:57:42 +02007009 u8 reserved_at_40[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007010 u8 min_delay[0xc];
7011 u8 int_vector[0x10];
7012
Matan Barakb4ff3a32016-02-09 14:57:42 +02007013 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007014};
7015
7016struct mlx5_ifc_attach_to_mcg_out_bits {
7017 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007018 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007019
7020 u8 syndrome[0x20];
7021
Matan Barakb4ff3a32016-02-09 14:57:42 +02007022 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007023};
7024
7025struct mlx5_ifc_attach_to_mcg_in_bits {
7026 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007027 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007028
Matan Barakb4ff3a32016-02-09 14:57:42 +02007029 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007030 u8 op_mod[0x10];
7031
Matan Barakb4ff3a32016-02-09 14:57:42 +02007032 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007033 u8 qpn[0x18];
7034
Matan Barakb4ff3a32016-02-09 14:57:42 +02007035 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007036
7037 u8 multicast_gid[16][0x8];
7038};
7039
Saeed Mahameed74862162016-06-09 15:11:34 +03007040struct mlx5_ifc_arm_xrq_out_bits {
7041 u8 status[0x8];
7042 u8 reserved_at_8[0x18];
7043
7044 u8 syndrome[0x20];
7045
7046 u8 reserved_at_40[0x40];
7047};
7048
7049struct mlx5_ifc_arm_xrq_in_bits {
7050 u8 opcode[0x10];
7051 u8 reserved_at_10[0x10];
7052
7053 u8 reserved_at_20[0x10];
7054 u8 op_mod[0x10];
7055
7056 u8 reserved_at_40[0x8];
7057 u8 xrqn[0x18];
7058
7059 u8 reserved_at_60[0x10];
7060 u8 lwm[0x10];
7061};
7062
Saeed Mahameede2816822015-05-28 22:28:40 +03007063struct mlx5_ifc_arm_xrc_srq_out_bits {
7064 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007065 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007066
7067 u8 syndrome[0x20];
7068
Matan Barakb4ff3a32016-02-09 14:57:42 +02007069 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007070};
7071
7072enum {
7073 MLX5_ARM_XRC_SRQ_IN_OP_MOD_XRC_SRQ = 0x1,
7074};
7075
7076struct mlx5_ifc_arm_xrc_srq_in_bits {
7077 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007078 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007079
Matan Barakb4ff3a32016-02-09 14:57:42 +02007080 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007081 u8 op_mod[0x10];
7082
Matan Barakb4ff3a32016-02-09 14:57:42 +02007083 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007084 u8 xrc_srqn[0x18];
7085
Matan Barakb4ff3a32016-02-09 14:57:42 +02007086 u8 reserved_at_60[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007087 u8 lwm[0x10];
7088};
7089
7090struct mlx5_ifc_arm_rq_out_bits {
7091 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007092 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007093
7094 u8 syndrome[0x20];
7095
Matan Barakb4ff3a32016-02-09 14:57:42 +02007096 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007097};
7098
7099enum {
Saeed Mahameed74862162016-06-09 15:11:34 +03007100 MLX5_ARM_RQ_IN_OP_MOD_SRQ = 0x1,
7101 MLX5_ARM_RQ_IN_OP_MOD_XRQ = 0x2,
Saeed Mahameede2816822015-05-28 22:28:40 +03007102};
7103
7104struct mlx5_ifc_arm_rq_in_bits {
7105 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007106 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007107
Matan Barakb4ff3a32016-02-09 14:57:42 +02007108 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007109 u8 op_mod[0x10];
7110
Matan Barakb4ff3a32016-02-09 14:57:42 +02007111 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007112 u8 srq_number[0x18];
7113
Matan Barakb4ff3a32016-02-09 14:57:42 +02007114 u8 reserved_at_60[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007115 u8 lwm[0x10];
7116};
7117
7118struct mlx5_ifc_arm_dct_out_bits {
7119 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007120 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007121
7122 u8 syndrome[0x20];
7123
Matan Barakb4ff3a32016-02-09 14:57:42 +02007124 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007125};
7126
7127struct mlx5_ifc_arm_dct_in_bits {
7128 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007129 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007130
Matan Barakb4ff3a32016-02-09 14:57:42 +02007131 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007132 u8 op_mod[0x10];
7133
Matan Barakb4ff3a32016-02-09 14:57:42 +02007134 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007135 u8 dct_number[0x18];
7136
Matan Barakb4ff3a32016-02-09 14:57:42 +02007137 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007138};
7139
7140struct mlx5_ifc_alloc_xrcd_out_bits {
7141 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007142 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007143
7144 u8 syndrome[0x20];
7145
Matan Barakb4ff3a32016-02-09 14:57:42 +02007146 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007147 u8 xrcd[0x18];
7148
Matan Barakb4ff3a32016-02-09 14:57:42 +02007149 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007150};
7151
7152struct mlx5_ifc_alloc_xrcd_in_bits {
7153 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007154 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007155
Matan Barakb4ff3a32016-02-09 14:57:42 +02007156 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007157 u8 op_mod[0x10];
7158
Matan Barakb4ff3a32016-02-09 14:57:42 +02007159 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007160};
7161
7162struct mlx5_ifc_alloc_uar_out_bits {
7163 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007164 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007165
7166 u8 syndrome[0x20];
7167
Matan Barakb4ff3a32016-02-09 14:57:42 +02007168 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007169 u8 uar[0x18];
7170
Matan Barakb4ff3a32016-02-09 14:57:42 +02007171 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007172};
7173
7174struct mlx5_ifc_alloc_uar_in_bits {
7175 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007176 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007177
Matan Barakb4ff3a32016-02-09 14:57:42 +02007178 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007179 u8 op_mod[0x10];
7180
Matan Barakb4ff3a32016-02-09 14:57:42 +02007181 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007182};
7183
7184struct mlx5_ifc_alloc_transport_domain_out_bits {
7185 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007186 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007187
7188 u8 syndrome[0x20];
7189
Matan Barakb4ff3a32016-02-09 14:57:42 +02007190 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007191 u8 transport_domain[0x18];
7192
Matan Barakb4ff3a32016-02-09 14:57:42 +02007193 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007194};
7195
7196struct mlx5_ifc_alloc_transport_domain_in_bits {
7197 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007198 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007199
Matan Barakb4ff3a32016-02-09 14:57:42 +02007200 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007201 u8 op_mod[0x10];
7202
Matan Barakb4ff3a32016-02-09 14:57:42 +02007203 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007204};
7205
7206struct mlx5_ifc_alloc_q_counter_out_bits {
7207 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007208 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007209
7210 u8 syndrome[0x20];
7211
Matan Barakb4ff3a32016-02-09 14:57:42 +02007212 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007213 u8 counter_set_id[0x8];
7214
Matan Barakb4ff3a32016-02-09 14:57:42 +02007215 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007216};
7217
7218struct mlx5_ifc_alloc_q_counter_in_bits {
7219 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007220 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007221
Matan Barakb4ff3a32016-02-09 14:57:42 +02007222 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007223 u8 op_mod[0x10];
7224
Matan Barakb4ff3a32016-02-09 14:57:42 +02007225 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007226};
7227
7228struct mlx5_ifc_alloc_pd_out_bits {
7229 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007230 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007231
7232 u8 syndrome[0x20];
7233
Matan Barakb4ff3a32016-02-09 14:57:42 +02007234 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007235 u8 pd[0x18];
7236
Matan Barakb4ff3a32016-02-09 14:57:42 +02007237 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007238};
7239
7240struct mlx5_ifc_alloc_pd_in_bits {
7241 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007242 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007243
Matan Barakb4ff3a32016-02-09 14:57:42 +02007244 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007245 u8 op_mod[0x10];
7246
Matan Barakb4ff3a32016-02-09 14:57:42 +02007247 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007248};
7249
Amir Vadai9dc0b282016-05-13 12:55:39 +00007250struct mlx5_ifc_alloc_flow_counter_out_bits {
7251 u8 status[0x8];
7252 u8 reserved_at_8[0x18];
7253
7254 u8 syndrome[0x20];
7255
Rabie Louloua8ffcc72017-07-09 13:39:30 +03007256 u8 flow_counter_id[0x20];
Amir Vadai9dc0b282016-05-13 12:55:39 +00007257
7258 u8 reserved_at_60[0x20];
7259};
7260
7261struct mlx5_ifc_alloc_flow_counter_in_bits {
7262 u8 opcode[0x10];
7263 u8 reserved_at_10[0x10];
7264
7265 u8 reserved_at_20[0x10];
7266 u8 op_mod[0x10];
7267
7268 u8 reserved_at_40[0x40];
7269};
7270
Saeed Mahameede2816822015-05-28 22:28:40 +03007271struct mlx5_ifc_add_vxlan_udp_dport_out_bits {
7272 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007273 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007274
7275 u8 syndrome[0x20];
7276
Matan Barakb4ff3a32016-02-09 14:57:42 +02007277 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007278};
7279
7280struct mlx5_ifc_add_vxlan_udp_dport_in_bits {
7281 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007282 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007283
Matan Barakb4ff3a32016-02-09 14:57:42 +02007284 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007285 u8 op_mod[0x10];
7286
Matan Barakb4ff3a32016-02-09 14:57:42 +02007287 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007288
Matan Barakb4ff3a32016-02-09 14:57:42 +02007289 u8 reserved_at_60[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007290 u8 vxlan_udp_port[0x10];
7291};
7292
Eran Ben Elisha37e92a92017-11-13 10:11:27 +02007293struct mlx5_ifc_set_pp_rate_limit_out_bits {
Saeed Mahameed74862162016-06-09 15:11:34 +03007294 u8 status[0x8];
7295 u8 reserved_at_8[0x18];
7296
7297 u8 syndrome[0x20];
7298
7299 u8 reserved_at_40[0x40];
7300};
7301
Eran Ben Elisha37e92a92017-11-13 10:11:27 +02007302struct mlx5_ifc_set_pp_rate_limit_in_bits {
Saeed Mahameed74862162016-06-09 15:11:34 +03007303 u8 opcode[0x10];
7304 u8 reserved_at_10[0x10];
7305
7306 u8 reserved_at_20[0x10];
7307 u8 op_mod[0x10];
7308
7309 u8 reserved_at_40[0x10];
7310 u8 rate_limit_index[0x10];
7311
7312 u8 reserved_at_60[0x20];
7313
7314 u8 rate_limit[0x20];
Eran Ben Elisha37e92a92017-11-13 10:11:27 +02007315
7316 u8 reserved_at_a0[0x160];
Saeed Mahameed74862162016-06-09 15:11:34 +03007317};
7318
Saeed Mahameede2816822015-05-28 22:28:40 +03007319struct mlx5_ifc_access_register_out_bits {
7320 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007321 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007322
7323 u8 syndrome[0x20];
7324
Matan Barakb4ff3a32016-02-09 14:57:42 +02007325 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007326
7327 u8 register_data[0][0x20];
7328};
7329
7330enum {
7331 MLX5_ACCESS_REGISTER_IN_OP_MOD_WRITE = 0x0,
7332 MLX5_ACCESS_REGISTER_IN_OP_MOD_READ = 0x1,
7333};
7334
7335struct mlx5_ifc_access_register_in_bits {
7336 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007337 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007338
Matan Barakb4ff3a32016-02-09 14:57:42 +02007339 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007340 u8 op_mod[0x10];
7341
Matan Barakb4ff3a32016-02-09 14:57:42 +02007342 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007343 u8 register_id[0x10];
7344
7345 u8 argument[0x20];
7346
7347 u8 register_data[0][0x20];
7348};
7349
7350struct mlx5_ifc_sltp_reg_bits {
7351 u8 status[0x4];
7352 u8 version[0x4];
7353 u8 local_port[0x8];
7354 u8 pnat[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007355 u8 reserved_at_12[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03007356 u8 lane[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007357 u8 reserved_at_18[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007358
Matan Barakb4ff3a32016-02-09 14:57:42 +02007359 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007360
Matan Barakb4ff3a32016-02-09 14:57:42 +02007361 u8 reserved_at_40[0x7];
Saeed Mahameede2816822015-05-28 22:28:40 +03007362 u8 polarity[0x1];
7363 u8 ob_tap0[0x8];
7364 u8 ob_tap1[0x8];
7365 u8 ob_tap2[0x8];
7366
Matan Barakb4ff3a32016-02-09 14:57:42 +02007367 u8 reserved_at_60[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03007368 u8 ob_preemp_mode[0x4];
7369 u8 ob_reg[0x8];
7370 u8 ob_bias[0x8];
7371
Matan Barakb4ff3a32016-02-09 14:57:42 +02007372 u8 reserved_at_80[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007373};
7374
7375struct mlx5_ifc_slrg_reg_bits {
7376 u8 status[0x4];
7377 u8 version[0x4];
7378 u8 local_port[0x8];
7379 u8 pnat[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007380 u8 reserved_at_12[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03007381 u8 lane[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007382 u8 reserved_at_18[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007383
7384 u8 time_to_link_up[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007385 u8 reserved_at_30[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03007386 u8 grade_lane_speed[0x4];
7387
7388 u8 grade_version[0x8];
7389 u8 grade[0x18];
7390
Matan Barakb4ff3a32016-02-09 14:57:42 +02007391 u8 reserved_at_60[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007392 u8 height_grade_type[0x4];
7393 u8 height_grade[0x18];
7394
7395 u8 height_dz[0x10];
7396 u8 height_dv[0x10];
7397
Matan Barakb4ff3a32016-02-09 14:57:42 +02007398 u8 reserved_at_a0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007399 u8 height_sigma[0x10];
7400
Matan Barakb4ff3a32016-02-09 14:57:42 +02007401 u8 reserved_at_c0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007402
Matan Barakb4ff3a32016-02-09 14:57:42 +02007403 u8 reserved_at_e0[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007404 u8 phase_grade_type[0x4];
7405 u8 phase_grade[0x18];
7406
Matan Barakb4ff3a32016-02-09 14:57:42 +02007407 u8 reserved_at_100[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007408 u8 phase_eo_pos[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007409 u8 reserved_at_110[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007410 u8 phase_eo_neg[0x8];
7411
7412 u8 ffe_set_tested[0x10];
7413 u8 test_errors_per_lane[0x10];
7414};
7415
7416struct mlx5_ifc_pvlc_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007417 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007418 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007419 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007420
Matan Barakb4ff3a32016-02-09 14:57:42 +02007421 u8 reserved_at_20[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007422 u8 vl_hw_cap[0x4];
7423
Matan Barakb4ff3a32016-02-09 14:57:42 +02007424 u8 reserved_at_40[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007425 u8 vl_admin[0x4];
7426
Matan Barakb4ff3a32016-02-09 14:57:42 +02007427 u8 reserved_at_60[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007428 u8 vl_operational[0x4];
7429};
7430
7431struct mlx5_ifc_pude_reg_bits {
7432 u8 swid[0x8];
7433 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007434 u8 reserved_at_10[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007435 u8 admin_status[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007436 u8 reserved_at_18[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007437 u8 oper_status[0x4];
7438
Matan Barakb4ff3a32016-02-09 14:57:42 +02007439 u8 reserved_at_20[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03007440};
7441
7442struct mlx5_ifc_ptys_reg_bits {
Bodong Wange7e31ca2016-09-07 19:07:58 +03007443 u8 reserved_at_0[0x1];
Saeed Mahameed74862162016-06-09 15:11:34 +03007444 u8 an_disable_admin[0x1];
Bodong Wange7e31ca2016-09-07 19:07:58 +03007445 u8 an_disable_cap[0x1];
7446 u8 reserved_at_3[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03007447 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007448 u8 reserved_at_10[0xd];
Saeed Mahameede2816822015-05-28 22:28:40 +03007449 u8 proto_mask[0x3];
7450
Saeed Mahameed74862162016-06-09 15:11:34 +03007451 u8 an_status[0x4];
7452 u8 reserved_at_24[0x3c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007453
7454 u8 eth_proto_capability[0x20];
7455
7456 u8 ib_link_width_capability[0x10];
7457 u8 ib_proto_capability[0x10];
7458
Matan Barakb4ff3a32016-02-09 14:57:42 +02007459 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007460
7461 u8 eth_proto_admin[0x20];
7462
7463 u8 ib_link_width_admin[0x10];
7464 u8 ib_proto_admin[0x10];
7465
Matan Barakb4ff3a32016-02-09 14:57:42 +02007466 u8 reserved_at_100[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007467
7468 u8 eth_proto_oper[0x20];
7469
7470 u8 ib_link_width_oper[0x10];
7471 u8 ib_proto_oper[0x10];
7472
Eran Ben Elisha5b4793f2017-02-13 14:00:59 +02007473 u8 reserved_at_160[0x1c];
7474 u8 connector_type[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007475
7476 u8 eth_proto_lp_advertise[0x20];
7477
Matan Barakb4ff3a32016-02-09 14:57:42 +02007478 u8 reserved_at_1a0[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03007479};
7480
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03007481struct mlx5_ifc_mlcr_reg_bits {
7482 u8 reserved_at_0[0x8];
7483 u8 local_port[0x8];
7484 u8 reserved_at_10[0x20];
7485
7486 u8 beacon_duration[0x10];
7487 u8 reserved_at_40[0x10];
7488
7489 u8 beacon_remain[0x10];
7490};
7491
Saeed Mahameede2816822015-05-28 22:28:40 +03007492struct mlx5_ifc_ptas_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007493 u8 reserved_at_0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007494
7495 u8 algorithm_options[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007496 u8 reserved_at_30[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007497 u8 repetitions_mode[0x4];
7498 u8 num_of_repetitions[0x8];
7499
7500 u8 grade_version[0x8];
7501 u8 height_grade_type[0x4];
7502 u8 phase_grade_type[0x4];
7503 u8 height_grade_weight[0x8];
7504 u8 phase_grade_weight[0x8];
7505
7506 u8 gisim_measure_bits[0x10];
7507 u8 adaptive_tap_measure_bits[0x10];
7508
7509 u8 ber_bath_high_error_threshold[0x10];
7510 u8 ber_bath_mid_error_threshold[0x10];
7511
7512 u8 ber_bath_low_error_threshold[0x10];
7513 u8 one_ratio_high_threshold[0x10];
7514
7515 u8 one_ratio_high_mid_threshold[0x10];
7516 u8 one_ratio_low_mid_threshold[0x10];
7517
7518 u8 one_ratio_low_threshold[0x10];
7519 u8 ndeo_error_threshold[0x10];
7520
7521 u8 mixer_offset_step_size[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007522 u8 reserved_at_110[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007523 u8 mix90_phase_for_voltage_bath[0x8];
7524
7525 u8 mixer_offset_start[0x10];
7526 u8 mixer_offset_end[0x10];
7527
Matan Barakb4ff3a32016-02-09 14:57:42 +02007528 u8 reserved_at_140[0x15];
Saeed Mahameede2816822015-05-28 22:28:40 +03007529 u8 ber_test_time[0xb];
7530};
7531
7532struct mlx5_ifc_pspa_reg_bits {
7533 u8 swid[0x8];
7534 u8 local_port[0x8];
7535 u8 sub_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007536 u8 reserved_at_18[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007537
Matan Barakb4ff3a32016-02-09 14:57:42 +02007538 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007539};
7540
7541struct mlx5_ifc_pqdr_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007542 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007543 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007544 u8 reserved_at_10[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03007545 u8 prio[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007546 u8 reserved_at_18[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03007547 u8 mode[0x2];
7548
Matan Barakb4ff3a32016-02-09 14:57:42 +02007549 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007550
Matan Barakb4ff3a32016-02-09 14:57:42 +02007551 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007552 u8 min_threshold[0x10];
7553
Matan Barakb4ff3a32016-02-09 14:57:42 +02007554 u8 reserved_at_60[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007555 u8 max_threshold[0x10];
7556
Matan Barakb4ff3a32016-02-09 14:57:42 +02007557 u8 reserved_at_80[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007558 u8 mark_probability_denominator[0x10];
7559
Matan Barakb4ff3a32016-02-09 14:57:42 +02007560 u8 reserved_at_a0[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03007561};
7562
7563struct mlx5_ifc_ppsc_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007564 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007565 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007566 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007567
Matan Barakb4ff3a32016-02-09 14:57:42 +02007568 u8 reserved_at_20[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03007569
Matan Barakb4ff3a32016-02-09 14:57:42 +02007570 u8 reserved_at_80[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007571 u8 wrps_admin[0x4];
7572
Matan Barakb4ff3a32016-02-09 14:57:42 +02007573 u8 reserved_at_a0[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007574 u8 wrps_status[0x4];
7575
Matan Barakb4ff3a32016-02-09 14:57:42 +02007576 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007577 u8 up_threshold[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007578 u8 reserved_at_d0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007579 u8 down_threshold[0x8];
7580
Matan Barakb4ff3a32016-02-09 14:57:42 +02007581 u8 reserved_at_e0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007582
Matan Barakb4ff3a32016-02-09 14:57:42 +02007583 u8 reserved_at_100[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007584 u8 srps_admin[0x4];
7585
Matan Barakb4ff3a32016-02-09 14:57:42 +02007586 u8 reserved_at_120[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007587 u8 srps_status[0x4];
7588
Matan Barakb4ff3a32016-02-09 14:57:42 +02007589 u8 reserved_at_140[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007590};
7591
7592struct mlx5_ifc_pplr_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007593 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007594 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007595 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007596
Matan Barakb4ff3a32016-02-09 14:57:42 +02007597 u8 reserved_at_20[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007598 u8 lb_cap[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007599 u8 reserved_at_30[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007600 u8 lb_en[0x8];
7601};
7602
7603struct mlx5_ifc_pplm_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007604 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007605 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007606 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007607
Matan Barakb4ff3a32016-02-09 14:57:42 +02007608 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007609
7610 u8 port_profile_mode[0x8];
7611 u8 static_port_profile[0x8];
7612 u8 active_port_profile[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007613 u8 reserved_at_58[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007614
7615 u8 retransmission_active[0x8];
7616 u8 fec_mode_active[0x18];
7617
Matan Barakb4ff3a32016-02-09 14:57:42 +02007618 u8 reserved_at_80[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007619};
7620
7621struct mlx5_ifc_ppcnt_reg_bits {
7622 u8 swid[0x8];
7623 u8 local_port[0x8];
7624 u8 pnat[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007625 u8 reserved_at_12[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007626 u8 grp[0x6];
7627
7628 u8 clr[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007629 u8 reserved_at_21[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007630 u8 prio_tc[0x3];
7631
7632 union mlx5_ifc_eth_cntrs_grp_data_layout_auto_bits counter_set;
7633};
7634
Gal Pressman8ed1a632016-11-17 13:46:01 +02007635struct mlx5_ifc_mpcnt_reg_bits {
7636 u8 reserved_at_0[0x8];
7637 u8 pcie_index[0x8];
7638 u8 reserved_at_10[0xa];
7639 u8 grp[0x6];
7640
7641 u8 clr[0x1];
7642 u8 reserved_at_21[0x1f];
7643
7644 union mlx5_ifc_pcie_cntrs_grp_data_layout_auto_bits counter_set;
7645};
7646
Saeed Mahameede2816822015-05-28 22:28:40 +03007647struct mlx5_ifc_ppad_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007648 u8 reserved_at_0[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03007649 u8 single_mac[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007650 u8 reserved_at_4[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007651 u8 local_port[0x8];
7652 u8 mac_47_32[0x10];
7653
7654 u8 mac_31_0[0x20];
7655
Matan Barakb4ff3a32016-02-09 14:57:42 +02007656 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007657};
7658
7659struct mlx5_ifc_pmtu_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007660 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007661 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007662 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007663
7664 u8 max_mtu[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007665 u8 reserved_at_30[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007666
7667 u8 admin_mtu[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007668 u8 reserved_at_50[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007669
7670 u8 oper_mtu[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007671 u8 reserved_at_70[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007672};
7673
7674struct mlx5_ifc_pmpr_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007675 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007676 u8 module[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007677 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007678
Matan Barakb4ff3a32016-02-09 14:57:42 +02007679 u8 reserved_at_20[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007680 u8 attenuation_5g[0x8];
7681
Matan Barakb4ff3a32016-02-09 14:57:42 +02007682 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007683 u8 attenuation_7g[0x8];
7684
Matan Barakb4ff3a32016-02-09 14:57:42 +02007685 u8 reserved_at_60[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007686 u8 attenuation_12g[0x8];
7687};
7688
7689struct mlx5_ifc_pmpe_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007690 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007691 u8 module[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007692 u8 reserved_at_10[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03007693 u8 module_status[0x4];
7694
Matan Barakb4ff3a32016-02-09 14:57:42 +02007695 u8 reserved_at_20[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03007696};
7697
7698struct mlx5_ifc_pmpc_reg_bits {
7699 u8 module_state_updated[32][0x8];
7700};
7701
7702struct mlx5_ifc_pmlpn_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007703 u8 reserved_at_0[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007704 u8 mlpn_status[0x4];
7705 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007706 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007707
7708 u8 e[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007709 u8 reserved_at_21[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03007710};
7711
7712struct mlx5_ifc_pmlp_reg_bits {
7713 u8 rxtx[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007714 u8 reserved_at_1[0x7];
Saeed Mahameede2816822015-05-28 22:28:40 +03007715 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007716 u8 reserved_at_10[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007717 u8 width[0x8];
7718
7719 u8 lane0_module_mapping[0x20];
7720
7721 u8 lane1_module_mapping[0x20];
7722
7723 u8 lane2_module_mapping[0x20];
7724
7725 u8 lane3_module_mapping[0x20];
7726
Matan Barakb4ff3a32016-02-09 14:57:42 +02007727 u8 reserved_at_a0[0x160];
Saeed Mahameede2816822015-05-28 22:28:40 +03007728};
7729
7730struct mlx5_ifc_pmaos_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007731 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007732 u8 module[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007733 u8 reserved_at_10[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007734 u8 admin_status[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007735 u8 reserved_at_18[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007736 u8 oper_status[0x4];
7737
7738 u8 ase[0x1];
7739 u8 ee[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007740 u8 reserved_at_22[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007741 u8 e[0x2];
7742
Matan Barakb4ff3a32016-02-09 14:57:42 +02007743 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007744};
7745
7746struct mlx5_ifc_plpc_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007747 u8 reserved_at_0[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007748 u8 profile_id[0xc];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007749 u8 reserved_at_10[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007750 u8 proto_mask[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007751 u8 reserved_at_18[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007752
Matan Barakb4ff3a32016-02-09 14:57:42 +02007753 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007754 u8 lane_speed[0x10];
7755
Matan Barakb4ff3a32016-02-09 14:57:42 +02007756 u8 reserved_at_40[0x17];
Saeed Mahameede2816822015-05-28 22:28:40 +03007757 u8 lpbf[0x1];
7758 u8 fec_mode_policy[0x8];
7759
7760 u8 retransmission_capability[0x8];
7761 u8 fec_mode_capability[0x18];
7762
7763 u8 retransmission_support_admin[0x8];
7764 u8 fec_mode_support_admin[0x18];
7765
7766 u8 retransmission_request_admin[0x8];
7767 u8 fec_mode_request_admin[0x18];
7768
Matan Barakb4ff3a32016-02-09 14:57:42 +02007769 u8 reserved_at_c0[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03007770};
7771
7772struct mlx5_ifc_plib_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007773 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007774 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007775 u8 reserved_at_10[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007776 u8 ib_port[0x8];
7777
Matan Barakb4ff3a32016-02-09 14:57:42 +02007778 u8 reserved_at_20[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03007779};
7780
7781struct mlx5_ifc_plbf_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007782 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007783 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007784 u8 reserved_at_10[0xd];
Saeed Mahameede2816822015-05-28 22:28:40 +03007785 u8 lbf_mode[0x3];
7786
Matan Barakb4ff3a32016-02-09 14:57:42 +02007787 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007788};
7789
7790struct mlx5_ifc_pipg_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007791 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007792 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007793 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007794
7795 u8 dic[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007796 u8 reserved_at_21[0x19];
Saeed Mahameede2816822015-05-28 22:28:40 +03007797 u8 ipg[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007798 u8 reserved_at_3e[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03007799};
7800
7801struct mlx5_ifc_pifr_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007802 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007803 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007804 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007805
Matan Barakb4ff3a32016-02-09 14:57:42 +02007806 u8 reserved_at_20[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03007807
7808 u8 port_filter[8][0x20];
7809
7810 u8 port_filter_update_en[8][0x20];
7811};
7812
7813struct mlx5_ifc_pfcc_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007814 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007815 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007816 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007817
7818 u8 ppan[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007819 u8 reserved_at_24[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007820 u8 prio_mask_tx[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007821 u8 reserved_at_30[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007822 u8 prio_mask_rx[0x8];
7823
7824 u8 pptx[0x1];
7825 u8 aptx[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007826 u8 reserved_at_42[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03007827 u8 pfctx[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007828 u8 reserved_at_50[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007829
7830 u8 pprx[0x1];
7831 u8 aprx[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007832 u8 reserved_at_62[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03007833 u8 pfcrx[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007834 u8 reserved_at_70[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007835
Matan Barakb4ff3a32016-02-09 14:57:42 +02007836 u8 reserved_at_80[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03007837};
7838
7839struct mlx5_ifc_pelc_reg_bits {
7840 u8 op[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007841 u8 reserved_at_4[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007842 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007843 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007844
7845 u8 op_admin[0x8];
7846 u8 op_capability[0x8];
7847 u8 op_request[0x8];
7848 u8 op_active[0x8];
7849
7850 u8 admin[0x40];
7851
7852 u8 capability[0x40];
7853
7854 u8 request[0x40];
7855
7856 u8 active[0x40];
7857
Matan Barakb4ff3a32016-02-09 14:57:42 +02007858 u8 reserved_at_140[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03007859};
7860
7861struct mlx5_ifc_peir_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007862 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007863 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007864 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007865
Matan Barakb4ff3a32016-02-09 14:57:42 +02007866 u8 reserved_at_20[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03007867 u8 error_count[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007868 u8 reserved_at_30[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007869
Matan Barakb4ff3a32016-02-09 14:57:42 +02007870 u8 reserved_at_40[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03007871 u8 lane[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007872 u8 reserved_at_50[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007873 u8 error_type[0x8];
7874};
7875
Gal Pressmancfdcbcea2016-12-08 15:52:00 +02007876struct mlx5_ifc_pcam_enhanced_features_bits {
Gal Pressman2dba0792017-06-18 14:56:45 +03007877 u8 reserved_at_0[0x7b];
Gal Pressmancfdcbcea2016-12-08 15:52:00 +02007878
Gal Pressman2dba0792017-06-18 14:56:45 +03007879 u8 rx_buffer_fullness_counters[0x1];
Eran Ben Elisha5b4793f2017-02-13 14:00:59 +02007880 u8 ptys_connector_type[0x1];
7881 u8 reserved_at_7d[0x1];
Gal Pressmancfdcbcea2016-12-08 15:52:00 +02007882 u8 ppcnt_discard_group[0x1];
7883 u8 ppcnt_statistical_group[0x1];
7884};
7885
7886struct mlx5_ifc_pcam_reg_bits {
7887 u8 reserved_at_0[0x8];
7888 u8 feature_group[0x8];
7889 u8 reserved_at_10[0x8];
7890 u8 access_reg_group[0x8];
7891
7892 u8 reserved_at_20[0x20];
7893
7894 union {
7895 u8 reserved_at_0[0x80];
7896 } port_access_reg_cap_mask;
7897
7898 u8 reserved_at_c0[0x80];
7899
7900 union {
7901 struct mlx5_ifc_pcam_enhanced_features_bits enhanced_features;
7902 u8 reserved_at_0[0x80];
7903 } feature_cap_mask;
7904
7905 u8 reserved_at_1c0[0xc0];
7906};
7907
7908struct mlx5_ifc_mcam_enhanced_features_bits {
Gal Pressman5405fa22017-06-15 18:29:23 +03007909 u8 reserved_at_0[0x7b];
7910 u8 pcie_outbound_stalled[0x1];
Eran Ben Elishaefae7f72017-05-12 02:47:02 +03007911 u8 tx_overflow_buffer_pkt[0x1];
Eugenia Emantayevfa367682017-05-25 16:09:34 +03007912 u8 mtpps_enh_out_per_adj[0x1];
7913 u8 mtpps_fs[0x1];
Gal Pressmancfdcbcea2016-12-08 15:52:00 +02007914 u8 pcie_performance_group[0x1];
7915};
7916
Or Gerlitz0ab87742017-06-11 15:25:38 +03007917struct mlx5_ifc_mcam_access_reg_bits {
7918 u8 reserved_at_0[0x1c];
7919 u8 mcda[0x1];
7920 u8 mcc[0x1];
7921 u8 mcqi[0x1];
7922 u8 reserved_at_1f[0x1];
7923
7924 u8 regs_95_to_64[0x20];
7925 u8 regs_63_to_32[0x20];
7926 u8 regs_31_to_0[0x20];
7927};
7928
Gal Pressmancfdcbcea2016-12-08 15:52:00 +02007929struct mlx5_ifc_mcam_reg_bits {
7930 u8 reserved_at_0[0x8];
7931 u8 feature_group[0x8];
7932 u8 reserved_at_10[0x8];
7933 u8 access_reg_group[0x8];
7934
7935 u8 reserved_at_20[0x20];
7936
7937 union {
Or Gerlitz0ab87742017-06-11 15:25:38 +03007938 struct mlx5_ifc_mcam_access_reg_bits access_regs;
Gal Pressmancfdcbcea2016-12-08 15:52:00 +02007939 u8 reserved_at_0[0x80];
7940 } mng_access_reg_cap_mask;
7941
7942 u8 reserved_at_c0[0x80];
7943
7944 union {
7945 struct mlx5_ifc_mcam_enhanced_features_bits enhanced_features;
7946 u8 reserved_at_0[0x80];
7947 } mng_feature_cap_mask;
7948
7949 u8 reserved_at_1c0[0x80];
7950};
7951
Huy Nguyenc02762e2017-07-18 16:03:17 -05007952struct mlx5_ifc_qcam_access_reg_cap_mask {
7953 u8 qcam_access_reg_cap_mask_127_to_20[0x6C];
7954 u8 qpdpm[0x1];
7955 u8 qcam_access_reg_cap_mask_18_to_4[0x0F];
7956 u8 qdpm[0x1];
7957 u8 qpts[0x1];
7958 u8 qcap[0x1];
7959 u8 qcam_access_reg_cap_mask_0[0x1];
7960};
7961
7962struct mlx5_ifc_qcam_qos_feature_cap_mask {
7963 u8 qcam_qos_feature_cap_mask_127_to_1[0x7F];
7964 u8 qpts_trust_both[0x1];
7965};
7966
7967struct mlx5_ifc_qcam_reg_bits {
7968 u8 reserved_at_0[0x8];
7969 u8 feature_group[0x8];
7970 u8 reserved_at_10[0x8];
7971 u8 access_reg_group[0x8];
7972 u8 reserved_at_20[0x20];
7973
7974 union {
7975 struct mlx5_ifc_qcam_access_reg_cap_mask reg_cap;
7976 u8 reserved_at_0[0x80];
7977 } qos_access_reg_cap_mask;
7978
7979 u8 reserved_at_c0[0x80];
7980
7981 union {
7982 struct mlx5_ifc_qcam_qos_feature_cap_mask feature_cap;
7983 u8 reserved_at_0[0x80];
7984 } qos_feature_cap_mask;
7985
7986 u8 reserved_at_1c0[0x80];
7987};
7988
Saeed Mahameede2816822015-05-28 22:28:40 +03007989struct mlx5_ifc_pcap_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007990 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007991 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007992 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007993
7994 u8 port_capability_mask[4][0x20];
7995};
7996
7997struct mlx5_ifc_paos_reg_bits {
7998 u8 swid[0x8];
7999 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008000 u8 reserved_at_10[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03008001 u8 admin_status[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008002 u8 reserved_at_18[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03008003 u8 oper_status[0x4];
8004
8005 u8 ase[0x1];
8006 u8 ee[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008007 u8 reserved_at_22[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03008008 u8 e[0x2];
8009
Matan Barakb4ff3a32016-02-09 14:57:42 +02008010 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03008011};
8012
8013struct mlx5_ifc_pamp_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02008014 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03008015 u8 opamp_group[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008016 u8 reserved_at_10[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03008017 u8 opamp_group_type[0x4];
8018
8019 u8 start_index[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008020 u8 reserved_at_30[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03008021 u8 num_of_indices[0xc];
8022
8023 u8 index_data[18][0x10];
8024};
8025
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03008026struct mlx5_ifc_pcmr_reg_bits {
8027 u8 reserved_at_0[0x8];
8028 u8 local_port[0x8];
8029 u8 reserved_at_10[0x2e];
8030 u8 fcs_cap[0x1];
8031 u8 reserved_at_3f[0x1f];
8032 u8 fcs_chk[0x1];
8033 u8 reserved_at_5f[0x1];
8034};
8035
Saeed Mahameede2816822015-05-28 22:28:40 +03008036struct mlx5_ifc_lane_2_module_mapping_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02008037 u8 reserved_at_0[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03008038 u8 rx_lane[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008039 u8 reserved_at_8[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03008040 u8 tx_lane[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008041 u8 reserved_at_10[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03008042 u8 module[0x8];
8043};
8044
8045struct mlx5_ifc_bufferx_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02008046 u8 reserved_at_0[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03008047 u8 lossy[0x1];
8048 u8 epsb[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008049 u8 reserved_at_8[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03008050 u8 size[0xc];
8051
8052 u8 xoff_threshold[0x10];
8053 u8 xon_threshold[0x10];
8054};
8055
8056struct mlx5_ifc_set_node_in_bits {
8057 u8 node_description[64][0x8];
8058};
8059
8060struct mlx5_ifc_register_power_settings_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02008061 u8 reserved_at_0[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03008062 u8 power_settings_level[0x8];
8063
Matan Barakb4ff3a32016-02-09 14:57:42 +02008064 u8 reserved_at_20[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03008065};
8066
8067struct mlx5_ifc_register_host_endianness_bits {
8068 u8 he[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008069 u8 reserved_at_1[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03008070
Matan Barakb4ff3a32016-02-09 14:57:42 +02008071 u8 reserved_at_20[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03008072};
8073
8074struct mlx5_ifc_umr_pointer_desc_argument_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02008075 u8 reserved_at_0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03008076
8077 u8 mkey[0x20];
8078
8079 u8 addressh_63_32[0x20];
8080
8081 u8 addressl_31_0[0x20];
8082};
8083
8084struct mlx5_ifc_ud_adrs_vector_bits {
8085 u8 dc_key[0x40];
8086
8087 u8 ext[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008088 u8 reserved_at_41[0x7];
Saeed Mahameede2816822015-05-28 22:28:40 +03008089 u8 destination_qp_dct[0x18];
8090
8091 u8 static_rate[0x4];
8092 u8 sl_eth_prio[0x4];
8093 u8 fl[0x1];
8094 u8 mlid[0x7];
8095 u8 rlid_udp_sport[0x10];
8096
Matan Barakb4ff3a32016-02-09 14:57:42 +02008097 u8 reserved_at_80[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03008098
8099 u8 rmac_47_16[0x20];
8100
8101 u8 rmac_15_0[0x10];
8102 u8 tclass[0x8];
8103 u8 hop_limit[0x8];
8104
Matan Barakb4ff3a32016-02-09 14:57:42 +02008105 u8 reserved_at_e0[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03008106 u8 grh[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008107 u8 reserved_at_e2[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03008108 u8 src_addr_index[0x8];
8109 u8 flow_label[0x14];
8110
8111 u8 rgid_rip[16][0x8];
8112};
8113
8114struct mlx5_ifc_pages_req_event_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02008115 u8 reserved_at_0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03008116 u8 function_id[0x10];
8117
8118 u8 num_pages[0x20];
8119
Matan Barakb4ff3a32016-02-09 14:57:42 +02008120 u8 reserved_at_40[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03008121};
8122
8123struct mlx5_ifc_eqe_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02008124 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03008125 u8 event_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008126 u8 reserved_at_10[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03008127 u8 event_sub_type[0x8];
8128
Matan Barakb4ff3a32016-02-09 14:57:42 +02008129 u8 reserved_at_20[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03008130
8131 union mlx5_ifc_event_auto_bits event_data;
8132
Matan Barakb4ff3a32016-02-09 14:57:42 +02008133 u8 reserved_at_1e0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03008134 u8 signature[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008135 u8 reserved_at_1f8[0x7];
Saeed Mahameede2816822015-05-28 22:28:40 +03008136 u8 owner[0x1];
8137};
8138
8139enum {
8140 MLX5_CMD_QUEUE_ENTRY_TYPE_PCIE_CMD_IF_TRANSPORT = 0x7,
8141};
8142
8143struct mlx5_ifc_cmd_queue_entry_bits {
8144 u8 type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008145 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03008146
8147 u8 input_length[0x20];
8148
8149 u8 input_mailbox_pointer_63_32[0x20];
8150
8151 u8 input_mailbox_pointer_31_9[0x17];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008152 u8 reserved_at_77[0x9];
Saeed Mahameede2816822015-05-28 22:28:40 +03008153
8154 u8 command_input_inline_data[16][0x8];
8155
8156 u8 command_output_inline_data[16][0x8];
8157
8158 u8 output_mailbox_pointer_63_32[0x20];
8159
8160 u8 output_mailbox_pointer_31_9[0x17];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008161 u8 reserved_at_1b7[0x9];
Saeed Mahameede2816822015-05-28 22:28:40 +03008162
8163 u8 output_length[0x20];
8164
8165 u8 token[0x8];
8166 u8 signature[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008167 u8 reserved_at_1f0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03008168 u8 status[0x7];
8169 u8 ownership[0x1];
8170};
8171
8172struct mlx5_ifc_cmd_out_bits {
8173 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008174 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03008175
8176 u8 syndrome[0x20];
8177
8178 u8 command_output[0x20];
8179};
8180
8181struct mlx5_ifc_cmd_in_bits {
8182 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008183 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03008184
Matan Barakb4ff3a32016-02-09 14:57:42 +02008185 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03008186 u8 op_mod[0x10];
8187
8188 u8 command[0][0x20];
8189};
8190
8191struct mlx5_ifc_cmd_if_box_bits {
8192 u8 mailbox_data[512][0x8];
8193
Matan Barakb4ff3a32016-02-09 14:57:42 +02008194 u8 reserved_at_1000[0x180];
Saeed Mahameede2816822015-05-28 22:28:40 +03008195
8196 u8 next_pointer_63_32[0x20];
8197
8198 u8 next_pointer_31_10[0x16];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008199 u8 reserved_at_11b6[0xa];
Saeed Mahameede2816822015-05-28 22:28:40 +03008200
8201 u8 block_number[0x20];
8202
Matan Barakb4ff3a32016-02-09 14:57:42 +02008203 u8 reserved_at_11e0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03008204 u8 token[0x8];
8205 u8 ctrl_signature[0x8];
8206 u8 signature[0x8];
8207};
8208
8209struct mlx5_ifc_mtt_bits {
8210 u8 ptag_63_32[0x20];
8211
8212 u8 ptag_31_8[0x18];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008213 u8 reserved_at_38[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03008214 u8 wr_en[0x1];
8215 u8 rd_en[0x1];
8216};
8217
Tariq Toukan928cfe82016-02-22 18:17:29 +02008218struct mlx5_ifc_query_wol_rol_out_bits {
8219 u8 status[0x8];
8220 u8 reserved_at_8[0x18];
8221
8222 u8 syndrome[0x20];
8223
8224 u8 reserved_at_40[0x10];
8225 u8 rol_mode[0x8];
8226 u8 wol_mode[0x8];
8227
8228 u8 reserved_at_60[0x20];
8229};
8230
8231struct mlx5_ifc_query_wol_rol_in_bits {
8232 u8 opcode[0x10];
8233 u8 reserved_at_10[0x10];
8234
8235 u8 reserved_at_20[0x10];
8236 u8 op_mod[0x10];
8237
8238 u8 reserved_at_40[0x40];
8239};
8240
8241struct mlx5_ifc_set_wol_rol_out_bits {
8242 u8 status[0x8];
8243 u8 reserved_at_8[0x18];
8244
8245 u8 syndrome[0x20];
8246
8247 u8 reserved_at_40[0x40];
8248};
8249
8250struct mlx5_ifc_set_wol_rol_in_bits {
8251 u8 opcode[0x10];
8252 u8 reserved_at_10[0x10];
8253
8254 u8 reserved_at_20[0x10];
8255 u8 op_mod[0x10];
8256
8257 u8 rol_mode_valid[0x1];
8258 u8 wol_mode_valid[0x1];
8259 u8 reserved_at_42[0xe];
8260 u8 rol_mode[0x8];
8261 u8 wol_mode[0x8];
8262
8263 u8 reserved_at_60[0x20];
8264};
8265
Saeed Mahameede2816822015-05-28 22:28:40 +03008266enum {
8267 MLX5_INITIAL_SEG_NIC_INTERFACE_FULL_DRIVER = 0x0,
8268 MLX5_INITIAL_SEG_NIC_INTERFACE_DISABLED = 0x1,
8269 MLX5_INITIAL_SEG_NIC_INTERFACE_NO_DRAM_NIC = 0x2,
8270};
8271
8272enum {
8273 MLX5_INITIAL_SEG_NIC_INTERFACE_SUPPORTED_FULL_DRIVER = 0x0,
8274 MLX5_INITIAL_SEG_NIC_INTERFACE_SUPPORTED_DISABLED = 0x1,
8275 MLX5_INITIAL_SEG_NIC_INTERFACE_SUPPORTED_NO_DRAM_NIC = 0x2,
8276};
8277
8278enum {
8279 MLX5_INITIAL_SEG_HEALTH_SYNDROME_FW_INTERNAL_ERR = 0x1,
8280 MLX5_INITIAL_SEG_HEALTH_SYNDROME_DEAD_IRISC = 0x7,
8281 MLX5_INITIAL_SEG_HEALTH_SYNDROME_HW_FATAL_ERR = 0x8,
8282 MLX5_INITIAL_SEG_HEALTH_SYNDROME_FW_CRC_ERR = 0x9,
8283 MLX5_INITIAL_SEG_HEALTH_SYNDROME_ICM_FETCH_PCI_ERR = 0xa,
8284 MLX5_INITIAL_SEG_HEALTH_SYNDROME_ICM_PAGE_ERR = 0xb,
8285 MLX5_INITIAL_SEG_HEALTH_SYNDROME_ASYNCHRONOUS_EQ_BUF_OVERRUN = 0xc,
8286 MLX5_INITIAL_SEG_HEALTH_SYNDROME_EQ_IN_ERR = 0xd,
8287 MLX5_INITIAL_SEG_HEALTH_SYNDROME_EQ_INV = 0xe,
8288 MLX5_INITIAL_SEG_HEALTH_SYNDROME_FFSER_ERR = 0xf,
8289 MLX5_INITIAL_SEG_HEALTH_SYNDROME_HIGH_TEMP_ERR = 0x10,
8290};
8291
8292struct mlx5_ifc_initial_seg_bits {
8293 u8 fw_rev_minor[0x10];
8294 u8 fw_rev_major[0x10];
8295
8296 u8 cmd_interface_rev[0x10];
8297 u8 fw_rev_subminor[0x10];
8298
Matan Barakb4ff3a32016-02-09 14:57:42 +02008299 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03008300
8301 u8 cmdq_phy_addr_63_32[0x20];
8302
8303 u8 cmdq_phy_addr_31_12[0x14];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008304 u8 reserved_at_b4[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03008305 u8 nic_interface[0x2];
8306 u8 log_cmdq_size[0x4];
8307 u8 log_cmdq_stride[0x4];
8308
8309 u8 command_doorbell_vector[0x20];
8310
Matan Barakb4ff3a32016-02-09 14:57:42 +02008311 u8 reserved_at_e0[0xf00];
Saeed Mahameede2816822015-05-28 22:28:40 +03008312
8313 u8 initializing[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008314 u8 reserved_at_fe1[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03008315 u8 nic_interface_supported[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008316 u8 reserved_at_fe8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03008317
8318 struct mlx5_ifc_health_buffer_bits health_buffer;
8319
8320 u8 no_dram_nic_offset[0x20];
8321
Matan Barakb4ff3a32016-02-09 14:57:42 +02008322 u8 reserved_at_1220[0x6e40];
Saeed Mahameede2816822015-05-28 22:28:40 +03008323
Matan Barakb4ff3a32016-02-09 14:57:42 +02008324 u8 reserved_at_8060[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03008325 u8 clear_int[0x1];
8326
8327 u8 health_syndrome[0x8];
8328 u8 health_counter[0x18];
8329
Matan Barakb4ff3a32016-02-09 14:57:42 +02008330 u8 reserved_at_80a0[0x17fc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03008331};
8332
Eugenia Emantayevf9a1ef72016-10-10 16:05:53 +03008333struct mlx5_ifc_mtpps_reg_bits {
8334 u8 reserved_at_0[0xc];
8335 u8 cap_number_of_pps_pins[0x4];
8336 u8 reserved_at_10[0x4];
8337 u8 cap_max_num_of_pps_in_pins[0x4];
8338 u8 reserved_at_18[0x4];
8339 u8 cap_max_num_of_pps_out_pins[0x4];
8340
8341 u8 reserved_at_20[0x24];
8342 u8 cap_pin_3_mode[0x4];
8343 u8 reserved_at_48[0x4];
8344 u8 cap_pin_2_mode[0x4];
8345 u8 reserved_at_50[0x4];
8346 u8 cap_pin_1_mode[0x4];
8347 u8 reserved_at_58[0x4];
8348 u8 cap_pin_0_mode[0x4];
8349
8350 u8 reserved_at_60[0x4];
8351 u8 cap_pin_7_mode[0x4];
8352 u8 reserved_at_68[0x4];
8353 u8 cap_pin_6_mode[0x4];
8354 u8 reserved_at_70[0x4];
8355 u8 cap_pin_5_mode[0x4];
8356 u8 reserved_at_78[0x4];
8357 u8 cap_pin_4_mode[0x4];
8358
Eugenia Emantayevfa367682017-05-25 16:09:34 +03008359 u8 field_select[0x20];
8360 u8 reserved_at_a0[0x60];
Eugenia Emantayevf9a1ef72016-10-10 16:05:53 +03008361
8362 u8 enable[0x1];
8363 u8 reserved_at_101[0xb];
8364 u8 pattern[0x4];
8365 u8 reserved_at_110[0x4];
8366 u8 pin_mode[0x4];
8367 u8 pin[0x8];
8368
8369 u8 reserved_at_120[0x20];
8370
8371 u8 time_stamp[0x40];
8372
8373 u8 out_pulse_duration[0x10];
8374 u8 out_periodic_adjustment[0x10];
Eugenia Emantayevfa367682017-05-25 16:09:34 +03008375 u8 enhanced_out_periodic_adjustment[0x20];
Eugenia Emantayevf9a1ef72016-10-10 16:05:53 +03008376
Eugenia Emantayevfa367682017-05-25 16:09:34 +03008377 u8 reserved_at_1c0[0x20];
Eugenia Emantayevf9a1ef72016-10-10 16:05:53 +03008378};
8379
8380struct mlx5_ifc_mtppse_reg_bits {
8381 u8 reserved_at_0[0x18];
8382 u8 pin[0x8];
8383 u8 event_arm[0x1];
8384 u8 reserved_at_21[0x1b];
8385 u8 event_generation_mode[0x4];
8386 u8 reserved_at_40[0x40];
8387};
8388
Or Gerlitz47176282017-04-18 13:35:39 +03008389struct mlx5_ifc_mcqi_cap_bits {
8390 u8 supported_info_bitmask[0x20];
8391
8392 u8 component_size[0x20];
8393
8394 u8 max_component_size[0x20];
8395
8396 u8 log_mcda_word_size[0x4];
8397 u8 reserved_at_64[0xc];
8398 u8 mcda_max_write_size[0x10];
8399
8400 u8 rd_en[0x1];
8401 u8 reserved_at_81[0x1];
8402 u8 match_chip_id[0x1];
8403 u8 match_psid[0x1];
8404 u8 check_user_timestamp[0x1];
8405 u8 match_base_guid_mac[0x1];
8406 u8 reserved_at_86[0x1a];
8407};
8408
8409struct mlx5_ifc_mcqi_reg_bits {
8410 u8 read_pending_component[0x1];
8411 u8 reserved_at_1[0xf];
8412 u8 component_index[0x10];
8413
8414 u8 reserved_at_20[0x20];
8415
8416 u8 reserved_at_40[0x1b];
8417 u8 info_type[0x5];
8418
8419 u8 info_size[0x20];
8420
8421 u8 offset[0x20];
8422
8423 u8 reserved_at_a0[0x10];
8424 u8 data_size[0x10];
8425
8426 u8 data[0][0x20];
8427};
8428
8429struct mlx5_ifc_mcc_reg_bits {
8430 u8 reserved_at_0[0x4];
8431 u8 time_elapsed_since_last_cmd[0xc];
8432 u8 reserved_at_10[0x8];
8433 u8 instruction[0x8];
8434
8435 u8 reserved_at_20[0x10];
8436 u8 component_index[0x10];
8437
8438 u8 reserved_at_40[0x8];
8439 u8 update_handle[0x18];
8440
8441 u8 handle_owner_type[0x4];
8442 u8 handle_owner_host_id[0x4];
8443 u8 reserved_at_68[0x1];
8444 u8 control_progress[0x7];
8445 u8 error_code[0x8];
8446 u8 reserved_at_78[0x4];
8447 u8 control_state[0x4];
8448
8449 u8 component_size[0x20];
8450
8451 u8 reserved_at_a0[0x60];
8452};
8453
8454struct mlx5_ifc_mcda_reg_bits {
8455 u8 reserved_at_0[0x8];
8456 u8 update_handle[0x18];
8457
8458 u8 offset[0x20];
8459
8460 u8 reserved_at_40[0x10];
8461 u8 size[0x10];
8462
8463 u8 reserved_at_60[0x20];
8464
8465 u8 data[0][0x20];
8466};
8467
Saeed Mahameede2816822015-05-28 22:28:40 +03008468union mlx5_ifc_ports_control_registers_document_bits {
8469 struct mlx5_ifc_bufferx_reg_bits bufferx_reg;
8470 struct mlx5_ifc_eth_2819_cntrs_grp_data_layout_bits eth_2819_cntrs_grp_data_layout;
8471 struct mlx5_ifc_eth_2863_cntrs_grp_data_layout_bits eth_2863_cntrs_grp_data_layout;
8472 struct mlx5_ifc_eth_3635_cntrs_grp_data_layout_bits eth_3635_cntrs_grp_data_layout;
8473 struct mlx5_ifc_eth_802_3_cntrs_grp_data_layout_bits eth_802_3_cntrs_grp_data_layout;
8474 struct mlx5_ifc_eth_extended_cntrs_grp_data_layout_bits eth_extended_cntrs_grp_data_layout;
8475 struct mlx5_ifc_eth_per_prio_grp_data_layout_bits eth_per_prio_grp_data_layout;
8476 struct mlx5_ifc_eth_per_traffic_grp_data_layout_bits eth_per_traffic_grp_data_layout;
8477 struct mlx5_ifc_lane_2_module_mapping_bits lane_2_module_mapping;
8478 struct mlx5_ifc_pamp_reg_bits pamp_reg;
8479 struct mlx5_ifc_paos_reg_bits paos_reg;
8480 struct mlx5_ifc_pcap_reg_bits pcap_reg;
8481 struct mlx5_ifc_peir_reg_bits peir_reg;
8482 struct mlx5_ifc_pelc_reg_bits pelc_reg;
8483 struct mlx5_ifc_pfcc_reg_bits pfcc_reg;
Meny Yossefi1c64bf62016-02-18 18:15:00 +02008484 struct mlx5_ifc_ib_port_cntrs_grp_data_layout_bits ib_port_cntrs_grp_data_layout;
Saeed Mahameede2816822015-05-28 22:28:40 +03008485 struct mlx5_ifc_phys_layer_cntrs_bits phys_layer_cntrs;
8486 struct mlx5_ifc_pifr_reg_bits pifr_reg;
8487 struct mlx5_ifc_pipg_reg_bits pipg_reg;
8488 struct mlx5_ifc_plbf_reg_bits plbf_reg;
8489 struct mlx5_ifc_plib_reg_bits plib_reg;
8490 struct mlx5_ifc_plpc_reg_bits plpc_reg;
8491 struct mlx5_ifc_pmaos_reg_bits pmaos_reg;
8492 struct mlx5_ifc_pmlp_reg_bits pmlp_reg;
8493 struct mlx5_ifc_pmlpn_reg_bits pmlpn_reg;
8494 struct mlx5_ifc_pmpc_reg_bits pmpc_reg;
8495 struct mlx5_ifc_pmpe_reg_bits pmpe_reg;
8496 struct mlx5_ifc_pmpr_reg_bits pmpr_reg;
8497 struct mlx5_ifc_pmtu_reg_bits pmtu_reg;
8498 struct mlx5_ifc_ppad_reg_bits ppad_reg;
8499 struct mlx5_ifc_ppcnt_reg_bits ppcnt_reg;
Gal Pressman8ed1a632016-11-17 13:46:01 +02008500 struct mlx5_ifc_mpcnt_reg_bits mpcnt_reg;
Saeed Mahameede2816822015-05-28 22:28:40 +03008501 struct mlx5_ifc_pplm_reg_bits pplm_reg;
8502 struct mlx5_ifc_pplr_reg_bits pplr_reg;
8503 struct mlx5_ifc_ppsc_reg_bits ppsc_reg;
8504 struct mlx5_ifc_pqdr_reg_bits pqdr_reg;
8505 struct mlx5_ifc_pspa_reg_bits pspa_reg;
8506 struct mlx5_ifc_ptas_reg_bits ptas_reg;
8507 struct mlx5_ifc_ptys_reg_bits ptys_reg;
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03008508 struct mlx5_ifc_mlcr_reg_bits mlcr_reg;
Saeed Mahameede2816822015-05-28 22:28:40 +03008509 struct mlx5_ifc_pude_reg_bits pude_reg;
8510 struct mlx5_ifc_pvlc_reg_bits pvlc_reg;
8511 struct mlx5_ifc_slrg_reg_bits slrg_reg;
8512 struct mlx5_ifc_sltp_reg_bits sltp_reg;
Eugenia Emantayevf9a1ef72016-10-10 16:05:53 +03008513 struct mlx5_ifc_mtpps_reg_bits mtpps_reg;
8514 struct mlx5_ifc_mtppse_reg_bits mtppse_reg;
Ilan Tayaria9956d32017-04-18 13:10:41 +03008515 struct mlx5_ifc_fpga_access_reg_bits fpga_access_reg;
Ilan Tayarie29341f2017-03-13 20:05:45 +02008516 struct mlx5_ifc_fpga_ctrl_bits fpga_ctrl_bits;
8517 struct mlx5_ifc_fpga_cap_bits fpga_cap_bits;
Or Gerlitz47176282017-04-18 13:35:39 +03008518 struct mlx5_ifc_mcqi_reg_bits mcqi_reg;
8519 struct mlx5_ifc_mcc_reg_bits mcc_reg;
8520 struct mlx5_ifc_mcda_reg_bits mcda_reg;
Matan Barakb4ff3a32016-02-09 14:57:42 +02008521 u8 reserved_at_0[0x60e0];
Saeed Mahameede2816822015-05-28 22:28:40 +03008522};
8523
8524union mlx5_ifc_debug_enhancements_document_bits {
8525 struct mlx5_ifc_health_buffer_bits health_buffer;
Matan Barakb4ff3a32016-02-09 14:57:42 +02008526 u8 reserved_at_0[0x200];
Saeed Mahameede2816822015-05-28 22:28:40 +03008527};
8528
8529union mlx5_ifc_uplink_pci_interface_document_bits {
8530 struct mlx5_ifc_initial_seg_bits initial_seg;
Matan Barakb4ff3a32016-02-09 14:57:42 +02008531 u8 reserved_at_0[0x20060];
Eli Cohenb7755162014-10-02 12:19:44 +03008532};
8533
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008534struct mlx5_ifc_set_flow_table_root_out_bits {
8535 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008536 u8 reserved_at_8[0x18];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008537
8538 u8 syndrome[0x20];
8539
Matan Barakb4ff3a32016-02-09 14:57:42 +02008540 u8 reserved_at_40[0x40];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008541};
8542
8543struct mlx5_ifc_set_flow_table_root_in_bits {
8544 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008545 u8 reserved_at_10[0x10];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008546
Matan Barakb4ff3a32016-02-09 14:57:42 +02008547 u8 reserved_at_20[0x10];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008548 u8 op_mod[0x10];
8549
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03008550 u8 other_vport[0x1];
8551 u8 reserved_at_41[0xf];
8552 u8 vport_number[0x10];
8553
8554 u8 reserved_at_60[0x20];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008555
8556 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008557 u8 reserved_at_88[0x18];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008558
Matan Barakb4ff3a32016-02-09 14:57:42 +02008559 u8 reserved_at_a0[0x8];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008560 u8 table_id[0x18];
8561
Erez Shitrit500a3d02017-04-13 06:36:51 +03008562 u8 reserved_at_c0[0x8];
8563 u8 underlay_qpn[0x18];
8564 u8 reserved_at_e0[0x120];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008565};
8566
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008567enum {
Aviv Heller84df61e2016-05-10 13:47:50 +03008568 MLX5_MODIFY_FLOW_TABLE_MISS_TABLE_ID = (1UL << 0),
8569 MLX5_MODIFY_FLOW_TABLE_LAG_NEXT_TABLE_ID = (1UL << 15),
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008570};
8571
8572struct mlx5_ifc_modify_flow_table_out_bits {
8573 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008574 u8 reserved_at_8[0x18];
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008575
8576 u8 syndrome[0x20];
8577
Matan Barakb4ff3a32016-02-09 14:57:42 +02008578 u8 reserved_at_40[0x40];
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008579};
8580
8581struct mlx5_ifc_modify_flow_table_in_bits {
8582 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008583 u8 reserved_at_10[0x10];
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008584
Matan Barakb4ff3a32016-02-09 14:57:42 +02008585 u8 reserved_at_20[0x10];
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008586 u8 op_mod[0x10];
8587
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03008588 u8 other_vport[0x1];
8589 u8 reserved_at_41[0xf];
8590 u8 vport_number[0x10];
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008591
Matan Barakb4ff3a32016-02-09 14:57:42 +02008592 u8 reserved_at_60[0x10];
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008593 u8 modify_field_select[0x10];
8594
8595 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008596 u8 reserved_at_88[0x18];
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008597
Matan Barakb4ff3a32016-02-09 14:57:42 +02008598 u8 reserved_at_a0[0x8];
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008599 u8 table_id[0x18];
8600
Maor Gottlieb0c90e9c2017-03-12 11:35:23 +02008601 struct mlx5_ifc_flow_table_context_bits flow_table_context;
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008602};
8603
Saeed Mahameed4f3961e2016-02-22 18:17:25 +02008604struct mlx5_ifc_ets_tcn_config_reg_bits {
8605 u8 g[0x1];
8606 u8 b[0x1];
8607 u8 r[0x1];
8608 u8 reserved_at_3[0x9];
8609 u8 group[0x4];
8610 u8 reserved_at_10[0x9];
8611 u8 bw_allocation[0x7];
8612
8613 u8 reserved_at_20[0xc];
8614 u8 max_bw_units[0x4];
8615 u8 reserved_at_30[0x8];
8616 u8 max_bw_value[0x8];
8617};
8618
8619struct mlx5_ifc_ets_global_config_reg_bits {
8620 u8 reserved_at_0[0x2];
8621 u8 r[0x1];
8622 u8 reserved_at_3[0x1d];
8623
8624 u8 reserved_at_20[0xc];
8625 u8 max_bw_units[0x4];
8626 u8 reserved_at_30[0x8];
8627 u8 max_bw_value[0x8];
8628};
8629
8630struct mlx5_ifc_qetc_reg_bits {
8631 u8 reserved_at_0[0x8];
8632 u8 port_number[0x8];
8633 u8 reserved_at_10[0x30];
8634
8635 struct mlx5_ifc_ets_tcn_config_reg_bits tc_configuration[0x8];
8636 struct mlx5_ifc_ets_global_config_reg_bits global_configuration;
8637};
8638
Huy Nguyen415a64a2017-07-18 16:08:46 -05008639struct mlx5_ifc_qpdpm_dscp_reg_bits {
8640 u8 e[0x1];
8641 u8 reserved_at_01[0x0b];
8642 u8 prio[0x04];
8643};
8644
8645struct mlx5_ifc_qpdpm_reg_bits {
8646 u8 reserved_at_0[0x8];
8647 u8 local_port[0x8];
8648 u8 reserved_at_10[0x10];
8649 struct mlx5_ifc_qpdpm_dscp_reg_bits dscp[64];
8650};
8651
8652struct mlx5_ifc_qpts_reg_bits {
8653 u8 reserved_at_0[0x8];
8654 u8 local_port[0x8];
8655 u8 reserved_at_10[0x2d];
8656 u8 trust_state[0x3];
8657};
8658
Saeed Mahameed4f3961e2016-02-22 18:17:25 +02008659struct mlx5_ifc_qtct_reg_bits {
8660 u8 reserved_at_0[0x8];
8661 u8 port_number[0x8];
8662 u8 reserved_at_10[0xd];
8663 u8 prio[0x3];
8664
8665 u8 reserved_at_20[0x1d];
8666 u8 tclass[0x3];
8667};
8668
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03008669struct mlx5_ifc_mcia_reg_bits {
8670 u8 l[0x1];
8671 u8 reserved_at_1[0x7];
8672 u8 module[0x8];
8673 u8 reserved_at_10[0x8];
8674 u8 status[0x8];
8675
8676 u8 i2c_device_address[0x8];
8677 u8 page_number[0x8];
8678 u8 device_address[0x10];
8679
8680 u8 reserved_at_40[0x10];
8681 u8 size[0x10];
8682
8683 u8 reserved_at_60[0x20];
8684
8685 u8 dword_0[0x20];
8686 u8 dword_1[0x20];
8687 u8 dword_2[0x20];
8688 u8 dword_3[0x20];
8689 u8 dword_4[0x20];
8690 u8 dword_5[0x20];
8691 u8 dword_6[0x20];
8692 u8 dword_7[0x20];
8693 u8 dword_8[0x20];
8694 u8 dword_9[0x20];
8695 u8 dword_10[0x20];
8696 u8 dword_11[0x20];
8697};
8698
Saeed Mahameed74862162016-06-09 15:11:34 +03008699struct mlx5_ifc_dcbx_param_bits {
8700 u8 dcbx_cee_cap[0x1];
8701 u8 dcbx_ieee_cap[0x1];
8702 u8 dcbx_standby_cap[0x1];
8703 u8 reserved_at_0[0x5];
8704 u8 port_number[0x8];
8705 u8 reserved_at_10[0xa];
8706 u8 max_application_table_size[6];
8707 u8 reserved_at_20[0x15];
8708 u8 version_oper[0x3];
8709 u8 reserved_at_38[5];
8710 u8 version_admin[0x3];
8711 u8 willing_admin[0x1];
8712 u8 reserved_at_41[0x3];
8713 u8 pfc_cap_oper[0x4];
8714 u8 reserved_at_48[0x4];
8715 u8 pfc_cap_admin[0x4];
8716 u8 reserved_at_50[0x4];
8717 u8 num_of_tc_oper[0x4];
8718 u8 reserved_at_58[0x4];
8719 u8 num_of_tc_admin[0x4];
8720 u8 remote_willing[0x1];
8721 u8 reserved_at_61[3];
8722 u8 remote_pfc_cap[4];
8723 u8 reserved_at_68[0x14];
8724 u8 remote_num_of_tc[0x4];
8725 u8 reserved_at_80[0x18];
8726 u8 error[0x8];
8727 u8 reserved_at_a0[0x160];
8728};
Aviv Heller84df61e2016-05-10 13:47:50 +03008729
8730struct mlx5_ifc_lagc_bits {
8731 u8 reserved_at_0[0x1d];
8732 u8 lag_state[0x3];
8733
8734 u8 reserved_at_20[0x14];
8735 u8 tx_remap_affinity_2[0x4];
8736 u8 reserved_at_38[0x4];
8737 u8 tx_remap_affinity_1[0x4];
8738};
8739
8740struct mlx5_ifc_create_lag_out_bits {
8741 u8 status[0x8];
8742 u8 reserved_at_8[0x18];
8743
8744 u8 syndrome[0x20];
8745
8746 u8 reserved_at_40[0x40];
8747};
8748
8749struct mlx5_ifc_create_lag_in_bits {
8750 u8 opcode[0x10];
8751 u8 reserved_at_10[0x10];
8752
8753 u8 reserved_at_20[0x10];
8754 u8 op_mod[0x10];
8755
8756 struct mlx5_ifc_lagc_bits ctx;
8757};
8758
8759struct mlx5_ifc_modify_lag_out_bits {
8760 u8 status[0x8];
8761 u8 reserved_at_8[0x18];
8762
8763 u8 syndrome[0x20];
8764
8765 u8 reserved_at_40[0x40];
8766};
8767
8768struct mlx5_ifc_modify_lag_in_bits {
8769 u8 opcode[0x10];
8770 u8 reserved_at_10[0x10];
8771
8772 u8 reserved_at_20[0x10];
8773 u8 op_mod[0x10];
8774
8775 u8 reserved_at_40[0x20];
8776 u8 field_select[0x20];
8777
8778 struct mlx5_ifc_lagc_bits ctx;
8779};
8780
8781struct mlx5_ifc_query_lag_out_bits {
8782 u8 status[0x8];
8783 u8 reserved_at_8[0x18];
8784
8785 u8 syndrome[0x20];
8786
8787 u8 reserved_at_40[0x40];
8788
8789 struct mlx5_ifc_lagc_bits ctx;
8790};
8791
8792struct mlx5_ifc_query_lag_in_bits {
8793 u8 opcode[0x10];
8794 u8 reserved_at_10[0x10];
8795
8796 u8 reserved_at_20[0x10];
8797 u8 op_mod[0x10];
8798
8799 u8 reserved_at_40[0x40];
8800};
8801
8802struct mlx5_ifc_destroy_lag_out_bits {
8803 u8 status[0x8];
8804 u8 reserved_at_8[0x18];
8805
8806 u8 syndrome[0x20];
8807
8808 u8 reserved_at_40[0x40];
8809};
8810
8811struct mlx5_ifc_destroy_lag_in_bits {
8812 u8 opcode[0x10];
8813 u8 reserved_at_10[0x10];
8814
8815 u8 reserved_at_20[0x10];
8816 u8 op_mod[0x10];
8817
8818 u8 reserved_at_40[0x40];
8819};
8820
8821struct mlx5_ifc_create_vport_lag_out_bits {
8822 u8 status[0x8];
8823 u8 reserved_at_8[0x18];
8824
8825 u8 syndrome[0x20];
8826
8827 u8 reserved_at_40[0x40];
8828};
8829
8830struct mlx5_ifc_create_vport_lag_in_bits {
8831 u8 opcode[0x10];
8832 u8 reserved_at_10[0x10];
8833
8834 u8 reserved_at_20[0x10];
8835 u8 op_mod[0x10];
8836
8837 u8 reserved_at_40[0x40];
8838};
8839
8840struct mlx5_ifc_destroy_vport_lag_out_bits {
8841 u8 status[0x8];
8842 u8 reserved_at_8[0x18];
8843
8844 u8 syndrome[0x20];
8845
8846 u8 reserved_at_40[0x40];
8847};
8848
8849struct mlx5_ifc_destroy_vport_lag_in_bits {
8850 u8 opcode[0x10];
8851 u8 reserved_at_10[0x10];
8852
8853 u8 reserved_at_20[0x10];
8854 u8 op_mod[0x10];
8855
8856 u8 reserved_at_40[0x40];
8857};
8858
Eli Cohend29b7962014-10-02 12:19:43 +03008859#endif /* MLX5_IFC_H */