blob: 07930cc1fa60c519035340a4992b6c965e90cd1b [file] [log] [blame]
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001/*
2 * drivers/net/ethernet/mellanox/mlxsw/spectrum.c
3 * Copyright (c) 2015 Mellanox Technologies. All rights reserved.
4 * Copyright (c) 2015 Jiri Pirko <jiri@mellanox.com>
5 * Copyright (c) 2015 Ido Schimmel <idosch@mellanox.com>
6 * Copyright (c) 2015 Elad Raz <eladr@mellanox.com>
7 *
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions are met:
10 *
11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the distribution.
16 * 3. Neither the names of the copyright holders nor the names of its
17 * contributors may be used to endorse or promote products derived from
18 * this software without specific prior written permission.
19 *
20 * Alternatively, this software may be distributed under the terms of the
21 * GNU General Public License ("GPL") version 2 as published by the Free
22 * Software Foundation.
23 *
24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
27 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
28 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
29 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
30 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
31 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
32 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
33 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
34 * POSSIBILITY OF SUCH DAMAGE.
35 */
36
37#include <linux/kernel.h>
38#include <linux/module.h>
39#include <linux/types.h>
40#include <linux/netdevice.h>
41#include <linux/etherdevice.h>
42#include <linux/ethtool.h>
43#include <linux/slab.h>
44#include <linux/device.h>
45#include <linux/skbuff.h>
46#include <linux/if_vlan.h>
47#include <linux/if_bridge.h>
48#include <linux/workqueue.h>
49#include <linux/jiffies.h>
50#include <linux/bitops.h>
Ido Schimmel7f71eb42015-12-15 16:03:37 +010051#include <linux/list.h>
Ido Schimmel80bedf12016-06-20 23:03:59 +020052#include <linux/notifier.h>
Ido Schimmel90183b92016-04-06 17:10:08 +020053#include <linux/dcbnl.h>
Ido Schimmel99724c12016-07-04 08:23:14 +020054#include <linux/inetdevice.h>
Jiri Pirko56ade8f2015-10-16 14:01:37 +020055#include <net/switchdev.h>
56#include <generated/utsrelease.h>
Yotam Gigi763b4b72016-07-21 12:03:17 +020057#include <net/pkt_cls.h>
58#include <net/tc_act/tc_mirred.h>
Jiri Pirkoe7322632016-09-01 10:37:43 +020059#include <net/netevent.h>
Jiri Pirko56ade8f2015-10-16 14:01:37 +020060
61#include "spectrum.h"
62#include "core.h"
63#include "reg.h"
64#include "port.h"
65#include "trap.h"
66#include "txheader.h"
67
68static const char mlxsw_sp_driver_name[] = "mlxsw_spectrum";
69static const char mlxsw_sp_driver_version[] = "1.0";
70
71/* tx_hdr_version
72 * Tx header version.
73 * Must be set to 1.
74 */
75MLXSW_ITEM32(tx, hdr, version, 0x00, 28, 4);
76
77/* tx_hdr_ctl
78 * Packet control type.
79 * 0 - Ethernet control (e.g. EMADs, LACP)
80 * 1 - Ethernet data
81 */
82MLXSW_ITEM32(tx, hdr, ctl, 0x00, 26, 2);
83
84/* tx_hdr_proto
85 * Packet protocol type. Must be set to 1 (Ethernet).
86 */
87MLXSW_ITEM32(tx, hdr, proto, 0x00, 21, 3);
88
89/* tx_hdr_rx_is_router
90 * Packet is sent from the router. Valid for data packets only.
91 */
92MLXSW_ITEM32(tx, hdr, rx_is_router, 0x00, 19, 1);
93
94/* tx_hdr_fid_valid
95 * Indicates if the 'fid' field is valid and should be used for
96 * forwarding lookup. Valid for data packets only.
97 */
98MLXSW_ITEM32(tx, hdr, fid_valid, 0x00, 16, 1);
99
100/* tx_hdr_swid
101 * Switch partition ID. Must be set to 0.
102 */
103MLXSW_ITEM32(tx, hdr, swid, 0x00, 12, 3);
104
105/* tx_hdr_control_tclass
106 * Indicates if the packet should use the control TClass and not one
107 * of the data TClasses.
108 */
109MLXSW_ITEM32(tx, hdr, control_tclass, 0x00, 6, 1);
110
111/* tx_hdr_etclass
112 * Egress TClass to be used on the egress device on the egress port.
113 */
114MLXSW_ITEM32(tx, hdr, etclass, 0x00, 0, 4);
115
116/* tx_hdr_port_mid
117 * Destination local port for unicast packets.
118 * Destination multicast ID for multicast packets.
119 *
120 * Control packets are directed to a specific egress port, while data
121 * packets are transmitted through the CPU port (0) into the switch partition,
122 * where forwarding rules are applied.
123 */
124MLXSW_ITEM32(tx, hdr, port_mid, 0x04, 16, 16);
125
126/* tx_hdr_fid
127 * Forwarding ID used for L2 forwarding lookup. Valid only if 'fid_valid' is
128 * set, otherwise calculated based on the packet's VID using VID to FID mapping.
129 * Valid for data packets only.
130 */
131MLXSW_ITEM32(tx, hdr, fid, 0x08, 0, 16);
132
133/* tx_hdr_type
134 * 0 - Data packets
135 * 6 - Control packets
136 */
137MLXSW_ITEM32(tx, hdr, type, 0x0C, 0, 4);
138
Yotam Gigi763b4b72016-07-21 12:03:17 +0200139static bool mlxsw_sp_port_dev_check(const struct net_device *dev);
140
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200141static void mlxsw_sp_txhdr_construct(struct sk_buff *skb,
142 const struct mlxsw_tx_info *tx_info)
143{
144 char *txhdr = skb_push(skb, MLXSW_TXHDR_LEN);
145
146 memset(txhdr, 0, MLXSW_TXHDR_LEN);
147
148 mlxsw_tx_hdr_version_set(txhdr, MLXSW_TXHDR_VERSION_1);
149 mlxsw_tx_hdr_ctl_set(txhdr, MLXSW_TXHDR_ETH_CTL);
150 mlxsw_tx_hdr_proto_set(txhdr, MLXSW_TXHDR_PROTO_ETH);
151 mlxsw_tx_hdr_swid_set(txhdr, 0);
152 mlxsw_tx_hdr_control_tclass_set(txhdr, 1);
153 mlxsw_tx_hdr_port_mid_set(txhdr, tx_info->local_port);
154 mlxsw_tx_hdr_type_set(txhdr, MLXSW_TXHDR_TYPE_CONTROL);
155}
156
157static int mlxsw_sp_base_mac_get(struct mlxsw_sp *mlxsw_sp)
158{
159 char spad_pl[MLXSW_REG_SPAD_LEN];
160 int err;
161
162 err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(spad), spad_pl);
163 if (err)
164 return err;
165 mlxsw_reg_spad_base_mac_memcpy_from(spad_pl, mlxsw_sp->base_mac);
166 return 0;
167}
168
Yotam Gigi763b4b72016-07-21 12:03:17 +0200169static int mlxsw_sp_span_init(struct mlxsw_sp *mlxsw_sp)
170{
171 struct mlxsw_resources *resources;
172 int i;
173
174 resources = mlxsw_core_resources_get(mlxsw_sp->core);
175 if (!resources->max_span_valid)
176 return -EIO;
177
178 mlxsw_sp->span.entries_count = resources->max_span;
179 mlxsw_sp->span.entries = kcalloc(mlxsw_sp->span.entries_count,
180 sizeof(struct mlxsw_sp_span_entry),
181 GFP_KERNEL);
182 if (!mlxsw_sp->span.entries)
183 return -ENOMEM;
184
185 for (i = 0; i < mlxsw_sp->span.entries_count; i++)
186 INIT_LIST_HEAD(&mlxsw_sp->span.entries[i].bound_ports_list);
187
188 return 0;
189}
190
191static void mlxsw_sp_span_fini(struct mlxsw_sp *mlxsw_sp)
192{
193 int i;
194
195 for (i = 0; i < mlxsw_sp->span.entries_count; i++) {
196 struct mlxsw_sp_span_entry *curr = &mlxsw_sp->span.entries[i];
197
198 WARN_ON_ONCE(!list_empty(&curr->bound_ports_list));
199 }
200 kfree(mlxsw_sp->span.entries);
201}
202
203static struct mlxsw_sp_span_entry *
204mlxsw_sp_span_entry_create(struct mlxsw_sp_port *port)
205{
206 struct mlxsw_sp *mlxsw_sp = port->mlxsw_sp;
207 struct mlxsw_sp_span_entry *span_entry;
208 char mpat_pl[MLXSW_REG_MPAT_LEN];
209 u8 local_port = port->local_port;
210 int index;
211 int i;
212 int err;
213
214 /* find a free entry to use */
215 index = -1;
216 for (i = 0; i < mlxsw_sp->span.entries_count; i++) {
217 if (!mlxsw_sp->span.entries[i].used) {
218 index = i;
219 span_entry = &mlxsw_sp->span.entries[i];
220 break;
221 }
222 }
223 if (index < 0)
224 return NULL;
225
226 /* create a new port analayzer entry for local_port */
227 mlxsw_reg_mpat_pack(mpat_pl, index, local_port, true);
228 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(mpat), mpat_pl);
229 if (err)
230 return NULL;
231
232 span_entry->used = true;
233 span_entry->id = index;
234 span_entry->ref_count = 0;
235 span_entry->local_port = local_port;
236 return span_entry;
237}
238
239static void mlxsw_sp_span_entry_destroy(struct mlxsw_sp *mlxsw_sp,
240 struct mlxsw_sp_span_entry *span_entry)
241{
242 u8 local_port = span_entry->local_port;
243 char mpat_pl[MLXSW_REG_MPAT_LEN];
244 int pa_id = span_entry->id;
245
246 mlxsw_reg_mpat_pack(mpat_pl, pa_id, local_port, false);
247 mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(mpat), mpat_pl);
248 span_entry->used = false;
249}
250
251struct mlxsw_sp_span_entry *mlxsw_sp_span_entry_find(struct mlxsw_sp_port *port)
252{
253 struct mlxsw_sp *mlxsw_sp = port->mlxsw_sp;
254 int i;
255
256 for (i = 0; i < mlxsw_sp->span.entries_count; i++) {
257 struct mlxsw_sp_span_entry *curr = &mlxsw_sp->span.entries[i];
258
259 if (curr->used && curr->local_port == port->local_port)
260 return curr;
261 }
262 return NULL;
263}
264
265struct mlxsw_sp_span_entry *mlxsw_sp_span_entry_get(struct mlxsw_sp_port *port)
266{
267 struct mlxsw_sp_span_entry *span_entry;
268
269 span_entry = mlxsw_sp_span_entry_find(port);
270 if (span_entry) {
271 span_entry->ref_count++;
272 return span_entry;
273 }
274
275 return mlxsw_sp_span_entry_create(port);
276}
277
278static int mlxsw_sp_span_entry_put(struct mlxsw_sp *mlxsw_sp,
279 struct mlxsw_sp_span_entry *span_entry)
280{
281 if (--span_entry->ref_count == 0)
282 mlxsw_sp_span_entry_destroy(mlxsw_sp, span_entry);
283 return 0;
284}
285
286static bool mlxsw_sp_span_is_egress_mirror(struct mlxsw_sp_port *port)
287{
288 struct mlxsw_sp *mlxsw_sp = port->mlxsw_sp;
289 struct mlxsw_sp_span_inspected_port *p;
290 int i;
291
292 for (i = 0; i < mlxsw_sp->span.entries_count; i++) {
293 struct mlxsw_sp_span_entry *curr = &mlxsw_sp->span.entries[i];
294
295 list_for_each_entry(p, &curr->bound_ports_list, list)
296 if (p->local_port == port->local_port &&
297 p->type == MLXSW_SP_SPAN_EGRESS)
298 return true;
299 }
300
301 return false;
302}
303
304static int mlxsw_sp_span_mtu_to_buffsize(int mtu)
305{
306 return MLXSW_SP_BYTES_TO_CELLS(mtu * 5 / 2) + 1;
307}
308
309static int mlxsw_sp_span_port_mtu_update(struct mlxsw_sp_port *port, u16 mtu)
310{
311 struct mlxsw_sp *mlxsw_sp = port->mlxsw_sp;
312 char sbib_pl[MLXSW_REG_SBIB_LEN];
313 int err;
314
315 /* If port is egress mirrored, the shared buffer size should be
316 * updated according to the mtu value
317 */
318 if (mlxsw_sp_span_is_egress_mirror(port)) {
319 mlxsw_reg_sbib_pack(sbib_pl, port->local_port,
320 mlxsw_sp_span_mtu_to_buffsize(mtu));
321 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sbib), sbib_pl);
322 if (err) {
323 netdev_err(port->dev, "Could not update shared buffer for mirroring\n");
324 return err;
325 }
326 }
327
328 return 0;
329}
330
331static struct mlxsw_sp_span_inspected_port *
332mlxsw_sp_span_entry_bound_port_find(struct mlxsw_sp_port *port,
333 struct mlxsw_sp_span_entry *span_entry)
334{
335 struct mlxsw_sp_span_inspected_port *p;
336
337 list_for_each_entry(p, &span_entry->bound_ports_list, list)
338 if (port->local_port == p->local_port)
339 return p;
340 return NULL;
341}
342
343static int
344mlxsw_sp_span_inspected_port_bind(struct mlxsw_sp_port *port,
345 struct mlxsw_sp_span_entry *span_entry,
346 enum mlxsw_sp_span_type type)
347{
348 struct mlxsw_sp_span_inspected_port *inspected_port;
349 struct mlxsw_sp *mlxsw_sp = port->mlxsw_sp;
350 char mpar_pl[MLXSW_REG_MPAR_LEN];
351 char sbib_pl[MLXSW_REG_SBIB_LEN];
352 int pa_id = span_entry->id;
353 int err;
354
355 /* if it is an egress SPAN, bind a shared buffer to it */
356 if (type == MLXSW_SP_SPAN_EGRESS) {
357 mlxsw_reg_sbib_pack(sbib_pl, port->local_port,
358 mlxsw_sp_span_mtu_to_buffsize(port->dev->mtu));
359 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sbib), sbib_pl);
360 if (err) {
361 netdev_err(port->dev, "Could not create shared buffer for mirroring\n");
362 return err;
363 }
364 }
365
366 /* bind the port to the SPAN entry */
367 mlxsw_reg_mpar_pack(mpar_pl, port->local_port, type, true, pa_id);
368 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(mpar), mpar_pl);
369 if (err)
370 goto err_mpar_reg_write;
371
372 inspected_port = kzalloc(sizeof(*inspected_port), GFP_KERNEL);
373 if (!inspected_port) {
374 err = -ENOMEM;
375 goto err_inspected_port_alloc;
376 }
377 inspected_port->local_port = port->local_port;
378 inspected_port->type = type;
379 list_add_tail(&inspected_port->list, &span_entry->bound_ports_list);
380
381 return 0;
382
383err_mpar_reg_write:
384err_inspected_port_alloc:
385 if (type == MLXSW_SP_SPAN_EGRESS) {
386 mlxsw_reg_sbib_pack(sbib_pl, port->local_port, 0);
387 mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sbib), sbib_pl);
388 }
389 return err;
390}
391
392static void
393mlxsw_sp_span_inspected_port_unbind(struct mlxsw_sp_port *port,
394 struct mlxsw_sp_span_entry *span_entry,
395 enum mlxsw_sp_span_type type)
396{
397 struct mlxsw_sp_span_inspected_port *inspected_port;
398 struct mlxsw_sp *mlxsw_sp = port->mlxsw_sp;
399 char mpar_pl[MLXSW_REG_MPAR_LEN];
400 char sbib_pl[MLXSW_REG_SBIB_LEN];
401 int pa_id = span_entry->id;
402
403 inspected_port = mlxsw_sp_span_entry_bound_port_find(port, span_entry);
404 if (!inspected_port)
405 return;
406
407 /* remove the inspected port */
408 mlxsw_reg_mpar_pack(mpar_pl, port->local_port, type, false, pa_id);
409 mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(mpar), mpar_pl);
410
411 /* remove the SBIB buffer if it was egress SPAN */
412 if (type == MLXSW_SP_SPAN_EGRESS) {
413 mlxsw_reg_sbib_pack(sbib_pl, port->local_port, 0);
414 mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sbib), sbib_pl);
415 }
416
417 mlxsw_sp_span_entry_put(mlxsw_sp, span_entry);
418
419 list_del(&inspected_port->list);
420 kfree(inspected_port);
421}
422
423static int mlxsw_sp_span_mirror_add(struct mlxsw_sp_port *from,
424 struct mlxsw_sp_port *to,
425 enum mlxsw_sp_span_type type)
426{
427 struct mlxsw_sp *mlxsw_sp = from->mlxsw_sp;
428 struct mlxsw_sp_span_entry *span_entry;
429 int err;
430
431 span_entry = mlxsw_sp_span_entry_get(to);
432 if (!span_entry)
433 return -ENOENT;
434
435 netdev_dbg(from->dev, "Adding inspected port to SPAN entry %d\n",
436 span_entry->id);
437
438 err = mlxsw_sp_span_inspected_port_bind(from, span_entry, type);
439 if (err)
440 goto err_port_bind;
441
442 return 0;
443
444err_port_bind:
445 mlxsw_sp_span_entry_put(mlxsw_sp, span_entry);
446 return err;
447}
448
449static void mlxsw_sp_span_mirror_remove(struct mlxsw_sp_port *from,
450 struct mlxsw_sp_port *to,
451 enum mlxsw_sp_span_type type)
452{
453 struct mlxsw_sp_span_entry *span_entry;
454
455 span_entry = mlxsw_sp_span_entry_find(to);
456 if (!span_entry) {
457 netdev_err(from->dev, "no span entry found\n");
458 return;
459 }
460
461 netdev_dbg(from->dev, "removing inspected port from SPAN entry %d\n",
462 span_entry->id);
463 mlxsw_sp_span_inspected_port_unbind(from, span_entry, type);
464}
465
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200466static int mlxsw_sp_port_admin_status_set(struct mlxsw_sp_port *mlxsw_sp_port,
467 bool is_up)
468{
469 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
470 char paos_pl[MLXSW_REG_PAOS_LEN];
471
472 mlxsw_reg_paos_pack(paos_pl, mlxsw_sp_port->local_port,
473 is_up ? MLXSW_PORT_ADMIN_STATUS_UP :
474 MLXSW_PORT_ADMIN_STATUS_DOWN);
475 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(paos), paos_pl);
476}
477
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200478static int mlxsw_sp_port_dev_addr_set(struct mlxsw_sp_port *mlxsw_sp_port,
479 unsigned char *addr)
480{
481 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
482 char ppad_pl[MLXSW_REG_PPAD_LEN];
483
484 mlxsw_reg_ppad_pack(ppad_pl, true, mlxsw_sp_port->local_port);
485 mlxsw_reg_ppad_mac_memcpy_to(ppad_pl, addr);
486 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ppad), ppad_pl);
487}
488
489static int mlxsw_sp_port_dev_addr_init(struct mlxsw_sp_port *mlxsw_sp_port)
490{
491 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
492 unsigned char *addr = mlxsw_sp_port->dev->dev_addr;
493
494 ether_addr_copy(addr, mlxsw_sp->base_mac);
495 addr[ETH_ALEN - 1] += mlxsw_sp_port->local_port;
496 return mlxsw_sp_port_dev_addr_set(mlxsw_sp_port, addr);
497}
498
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200499static int mlxsw_sp_port_mtu_set(struct mlxsw_sp_port *mlxsw_sp_port, u16 mtu)
500{
501 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
502 char pmtu_pl[MLXSW_REG_PMTU_LEN];
503 int max_mtu;
504 int err;
505
506 mtu += MLXSW_TXHDR_LEN + ETH_HLEN;
507 mlxsw_reg_pmtu_pack(pmtu_pl, mlxsw_sp_port->local_port, 0);
508 err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(pmtu), pmtu_pl);
509 if (err)
510 return err;
511 max_mtu = mlxsw_reg_pmtu_max_mtu_get(pmtu_pl);
512
513 if (mtu > max_mtu)
514 return -EINVAL;
515
516 mlxsw_reg_pmtu_pack(pmtu_pl, mlxsw_sp_port->local_port, mtu);
517 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(pmtu), pmtu_pl);
518}
519
Ido Schimmelbe945352016-06-09 09:51:39 +0200520static int __mlxsw_sp_port_swid_set(struct mlxsw_sp *mlxsw_sp, u8 local_port,
521 u8 swid)
522{
523 char pspa_pl[MLXSW_REG_PSPA_LEN];
524
525 mlxsw_reg_pspa_pack(pspa_pl, swid, local_port);
526 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(pspa), pspa_pl);
527}
528
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200529static int mlxsw_sp_port_swid_set(struct mlxsw_sp_port *mlxsw_sp_port, u8 swid)
530{
531 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200532
Ido Schimmelbe945352016-06-09 09:51:39 +0200533 return __mlxsw_sp_port_swid_set(mlxsw_sp, mlxsw_sp_port->local_port,
534 swid);
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200535}
536
537static int mlxsw_sp_port_vp_mode_set(struct mlxsw_sp_port *mlxsw_sp_port,
538 bool enable)
539{
540 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
541 char svpe_pl[MLXSW_REG_SVPE_LEN];
542
543 mlxsw_reg_svpe_pack(svpe_pl, mlxsw_sp_port->local_port, enable);
544 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(svpe), svpe_pl);
545}
546
547int mlxsw_sp_port_vid_to_fid_set(struct mlxsw_sp_port *mlxsw_sp_port,
548 enum mlxsw_reg_svfa_mt mt, bool valid, u16 fid,
549 u16 vid)
550{
551 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
552 char svfa_pl[MLXSW_REG_SVFA_LEN];
553
554 mlxsw_reg_svfa_pack(svfa_pl, mlxsw_sp_port->local_port, mt, valid,
555 fid, vid);
556 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(svfa), svfa_pl);
557}
558
Ido Schimmel584d73d2016-08-24 12:00:26 +0200559int __mlxsw_sp_port_vid_learning_set(struct mlxsw_sp_port *mlxsw_sp_port,
560 u16 vid_begin, u16 vid_end,
561 bool learn_enable)
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200562{
563 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
564 char *spvmlr_pl;
565 int err;
566
567 spvmlr_pl = kmalloc(MLXSW_REG_SPVMLR_LEN, GFP_KERNEL);
568 if (!spvmlr_pl)
569 return -ENOMEM;
Ido Schimmel584d73d2016-08-24 12:00:26 +0200570 mlxsw_reg_spvmlr_pack(spvmlr_pl, mlxsw_sp_port->local_port, vid_begin,
571 vid_end, learn_enable);
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200572 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(spvmlr), spvmlr_pl);
573 kfree(spvmlr_pl);
574 return err;
575}
576
Ido Schimmel584d73d2016-08-24 12:00:26 +0200577static int mlxsw_sp_port_vid_learning_set(struct mlxsw_sp_port *mlxsw_sp_port,
578 u16 vid, bool learn_enable)
579{
580 return __mlxsw_sp_port_vid_learning_set(mlxsw_sp_port, vid, vid,
581 learn_enable);
582}
583
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200584static int
585mlxsw_sp_port_system_port_mapping_set(struct mlxsw_sp_port *mlxsw_sp_port)
586{
587 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
588 char sspr_pl[MLXSW_REG_SSPR_LEN];
589
590 mlxsw_reg_sspr_pack(sspr_pl, mlxsw_sp_port->local_port);
591 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sspr), sspr_pl);
592}
593
Ido Schimmeld664b412016-06-09 09:51:40 +0200594static int mlxsw_sp_port_module_info_get(struct mlxsw_sp *mlxsw_sp,
595 u8 local_port, u8 *p_module,
596 u8 *p_width, u8 *p_lane)
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200597{
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200598 char pmlp_pl[MLXSW_REG_PMLP_LEN];
599 int err;
600
Ido Schimmel558c2d52016-02-26 17:32:29 +0100601 mlxsw_reg_pmlp_pack(pmlp_pl, local_port);
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200602 err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(pmlp), pmlp_pl);
603 if (err)
604 return err;
Ido Schimmel558c2d52016-02-26 17:32:29 +0100605 *p_module = mlxsw_reg_pmlp_module_get(pmlp_pl, 0);
606 *p_width = mlxsw_reg_pmlp_width_get(pmlp_pl);
Ido Schimmel2bf9a582016-04-05 10:20:04 +0200607 *p_lane = mlxsw_reg_pmlp_tx_lane_get(pmlp_pl, 0);
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200608 return 0;
609}
610
Ido Schimmel18f1e702016-02-26 17:32:31 +0100611static int mlxsw_sp_port_module_map(struct mlxsw_sp *mlxsw_sp, u8 local_port,
612 u8 module, u8 width, u8 lane)
613{
614 char pmlp_pl[MLXSW_REG_PMLP_LEN];
615 int i;
616
617 mlxsw_reg_pmlp_pack(pmlp_pl, local_port);
618 mlxsw_reg_pmlp_width_set(pmlp_pl, width);
619 for (i = 0; i < width; i++) {
620 mlxsw_reg_pmlp_module_set(pmlp_pl, i, module);
621 mlxsw_reg_pmlp_tx_lane_set(pmlp_pl, i, lane + i); /* Rx & Tx */
622 }
623
624 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(pmlp), pmlp_pl);
625}
626
Ido Schimmel3e9b27b2016-02-26 17:32:28 +0100627static int mlxsw_sp_port_module_unmap(struct mlxsw_sp *mlxsw_sp, u8 local_port)
628{
629 char pmlp_pl[MLXSW_REG_PMLP_LEN];
630
631 mlxsw_reg_pmlp_pack(pmlp_pl, local_port);
632 mlxsw_reg_pmlp_width_set(pmlp_pl, 0);
633 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(pmlp), pmlp_pl);
634}
635
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200636static int mlxsw_sp_port_open(struct net_device *dev)
637{
638 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
639 int err;
640
641 err = mlxsw_sp_port_admin_status_set(mlxsw_sp_port, true);
642 if (err)
643 return err;
644 netif_start_queue(dev);
645 return 0;
646}
647
648static int mlxsw_sp_port_stop(struct net_device *dev)
649{
650 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
651
652 netif_stop_queue(dev);
653 return mlxsw_sp_port_admin_status_set(mlxsw_sp_port, false);
654}
655
656static netdev_tx_t mlxsw_sp_port_xmit(struct sk_buff *skb,
657 struct net_device *dev)
658{
659 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
660 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
661 struct mlxsw_sp_port_pcpu_stats *pcpu_stats;
662 const struct mlxsw_tx_info tx_info = {
663 .local_port = mlxsw_sp_port->local_port,
664 .is_emad = false,
665 };
666 u64 len;
667 int err;
668
Jiri Pirko307c2432016-04-08 19:11:22 +0200669 if (mlxsw_core_skb_transmit_busy(mlxsw_sp->core, &tx_info))
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200670 return NETDEV_TX_BUSY;
671
672 if (unlikely(skb_headroom(skb) < MLXSW_TXHDR_LEN)) {
673 struct sk_buff *skb_orig = skb;
674
675 skb = skb_realloc_headroom(skb, MLXSW_TXHDR_LEN);
676 if (!skb) {
677 this_cpu_inc(mlxsw_sp_port->pcpu_stats->tx_dropped);
678 dev_kfree_skb_any(skb_orig);
679 return NETDEV_TX_OK;
680 }
681 }
682
683 if (eth_skb_pad(skb)) {
684 this_cpu_inc(mlxsw_sp_port->pcpu_stats->tx_dropped);
685 return NETDEV_TX_OK;
686 }
687
688 mlxsw_sp_txhdr_construct(skb, &tx_info);
Nogah Frankel63dcdd32016-06-17 15:09:05 +0200689 /* TX header is consumed by HW on the way so we shouldn't count its
690 * bytes as being sent.
691 */
692 len = skb->len - MLXSW_TXHDR_LEN;
693
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200694 /* Due to a race we might fail here because of a full queue. In that
695 * unlikely case we simply drop the packet.
696 */
Jiri Pirko307c2432016-04-08 19:11:22 +0200697 err = mlxsw_core_skb_transmit(mlxsw_sp->core, skb, &tx_info);
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200698
699 if (!err) {
700 pcpu_stats = this_cpu_ptr(mlxsw_sp_port->pcpu_stats);
701 u64_stats_update_begin(&pcpu_stats->syncp);
702 pcpu_stats->tx_packets++;
703 pcpu_stats->tx_bytes += len;
704 u64_stats_update_end(&pcpu_stats->syncp);
705 } else {
706 this_cpu_inc(mlxsw_sp_port->pcpu_stats->tx_dropped);
707 dev_kfree_skb_any(skb);
708 }
709 return NETDEV_TX_OK;
710}
711
Jiri Pirkoc5b9b512015-12-03 12:12:22 +0100712static void mlxsw_sp_set_rx_mode(struct net_device *dev)
713{
714}
715
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200716static int mlxsw_sp_port_set_mac_address(struct net_device *dev, void *p)
717{
718 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
719 struct sockaddr *addr = p;
720 int err;
721
722 if (!is_valid_ether_addr(addr->sa_data))
723 return -EADDRNOTAVAIL;
724
725 err = mlxsw_sp_port_dev_addr_set(mlxsw_sp_port, addr->sa_data);
726 if (err)
727 return err;
728 memcpy(dev->dev_addr, addr->sa_data, dev->addr_len);
729 return 0;
730}
731
Ido Schimmel9f7ec052016-04-06 17:10:14 +0200732static void mlxsw_sp_pg_buf_pack(char *pbmc_pl, int pg_index, int mtu,
Ido Schimmeld81a6bd2016-04-06 17:10:16 +0200733 bool pause_en, bool pfc_en, u16 delay)
Ido Schimmel8e8dfe92016-04-06 17:10:10 +0200734{
735 u16 pg_size = 2 * MLXSW_SP_BYTES_TO_CELLS(mtu);
736
Ido Schimmeld81a6bd2016-04-06 17:10:16 +0200737 delay = pfc_en ? mlxsw_sp_pfc_delay_get(mtu, delay) :
738 MLXSW_SP_PAUSE_DELAY;
Ido Schimmel9f7ec052016-04-06 17:10:14 +0200739
Ido Schimmeld81a6bd2016-04-06 17:10:16 +0200740 if (pause_en || pfc_en)
Ido Schimmel9f7ec052016-04-06 17:10:14 +0200741 mlxsw_reg_pbmc_lossless_buffer_pack(pbmc_pl, pg_index,
Ido Schimmeld81a6bd2016-04-06 17:10:16 +0200742 pg_size + delay, pg_size);
743 else
Ido Schimmel9f7ec052016-04-06 17:10:14 +0200744 mlxsw_reg_pbmc_lossy_buffer_pack(pbmc_pl, pg_index, pg_size);
Ido Schimmel8e8dfe92016-04-06 17:10:10 +0200745}
746
747int __mlxsw_sp_port_headroom_set(struct mlxsw_sp_port *mlxsw_sp_port, int mtu,
Ido Schimmeld81a6bd2016-04-06 17:10:16 +0200748 u8 *prio_tc, bool pause_en,
749 struct ieee_pfc *my_pfc)
Ido Schimmelff6551e2016-04-06 17:10:03 +0200750{
751 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
Ido Schimmeld81a6bd2016-04-06 17:10:16 +0200752 u8 pfc_en = !!my_pfc ? my_pfc->pfc_en : 0;
753 u16 delay = !!my_pfc ? my_pfc->delay : 0;
Ido Schimmelff6551e2016-04-06 17:10:03 +0200754 char pbmc_pl[MLXSW_REG_PBMC_LEN];
Ido Schimmel8e8dfe92016-04-06 17:10:10 +0200755 int i, j, err;
Ido Schimmelff6551e2016-04-06 17:10:03 +0200756
757 mlxsw_reg_pbmc_pack(pbmc_pl, mlxsw_sp_port->local_port, 0, 0);
758 err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(pbmc), pbmc_pl);
759 if (err)
760 return err;
Ido Schimmel8e8dfe92016-04-06 17:10:10 +0200761
762 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
763 bool configure = false;
Ido Schimmeld81a6bd2016-04-06 17:10:16 +0200764 bool pfc = false;
Ido Schimmel8e8dfe92016-04-06 17:10:10 +0200765
766 for (j = 0; j < IEEE_8021QAZ_MAX_TCS; j++) {
767 if (prio_tc[j] == i) {
Ido Schimmeld81a6bd2016-04-06 17:10:16 +0200768 pfc = pfc_en & BIT(j);
Ido Schimmel8e8dfe92016-04-06 17:10:10 +0200769 configure = true;
770 break;
771 }
772 }
773
774 if (!configure)
775 continue;
Ido Schimmeld81a6bd2016-04-06 17:10:16 +0200776 mlxsw_sp_pg_buf_pack(pbmc_pl, i, mtu, pause_en, pfc, delay);
Ido Schimmel8e8dfe92016-04-06 17:10:10 +0200777 }
778
Ido Schimmelff6551e2016-04-06 17:10:03 +0200779 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(pbmc), pbmc_pl);
780}
781
Ido Schimmel8e8dfe92016-04-06 17:10:10 +0200782static int mlxsw_sp_port_headroom_set(struct mlxsw_sp_port *mlxsw_sp_port,
Ido Schimmel9f7ec052016-04-06 17:10:14 +0200783 int mtu, bool pause_en)
Ido Schimmel8e8dfe92016-04-06 17:10:10 +0200784{
785 u8 def_prio_tc[IEEE_8021QAZ_MAX_TCS] = {0};
786 bool dcb_en = !!mlxsw_sp_port->dcb.ets;
Ido Schimmeld81a6bd2016-04-06 17:10:16 +0200787 struct ieee_pfc *my_pfc;
Ido Schimmel8e8dfe92016-04-06 17:10:10 +0200788 u8 *prio_tc;
789
790 prio_tc = dcb_en ? mlxsw_sp_port->dcb.ets->prio_tc : def_prio_tc;
Ido Schimmeld81a6bd2016-04-06 17:10:16 +0200791 my_pfc = dcb_en ? mlxsw_sp_port->dcb.pfc : NULL;
Ido Schimmel8e8dfe92016-04-06 17:10:10 +0200792
Ido Schimmel9f7ec052016-04-06 17:10:14 +0200793 return __mlxsw_sp_port_headroom_set(mlxsw_sp_port, mtu, prio_tc,
Ido Schimmeld81a6bd2016-04-06 17:10:16 +0200794 pause_en, my_pfc);
Ido Schimmel8e8dfe92016-04-06 17:10:10 +0200795}
796
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200797static int mlxsw_sp_port_change_mtu(struct net_device *dev, int mtu)
798{
799 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
Ido Schimmel9f7ec052016-04-06 17:10:14 +0200800 bool pause_en = mlxsw_sp_port_is_pause_en(mlxsw_sp_port);
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200801 int err;
802
Ido Schimmel9f7ec052016-04-06 17:10:14 +0200803 err = mlxsw_sp_port_headroom_set(mlxsw_sp_port, mtu, pause_en);
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200804 if (err)
805 return err;
Yotam Gigi763b4b72016-07-21 12:03:17 +0200806 err = mlxsw_sp_span_port_mtu_update(mlxsw_sp_port, mtu);
807 if (err)
808 goto err_span_port_mtu_update;
Ido Schimmelff6551e2016-04-06 17:10:03 +0200809 err = mlxsw_sp_port_mtu_set(mlxsw_sp_port, mtu);
810 if (err)
811 goto err_port_mtu_set;
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200812 dev->mtu = mtu;
813 return 0;
Ido Schimmelff6551e2016-04-06 17:10:03 +0200814
815err_port_mtu_set:
Yotam Gigi763b4b72016-07-21 12:03:17 +0200816 mlxsw_sp_span_port_mtu_update(mlxsw_sp_port, dev->mtu);
817err_span_port_mtu_update:
Ido Schimmel9f7ec052016-04-06 17:10:14 +0200818 mlxsw_sp_port_headroom_set(mlxsw_sp_port, dev->mtu, pause_en);
Ido Schimmelff6551e2016-04-06 17:10:03 +0200819 return err;
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200820}
821
822static struct rtnl_link_stats64 *
823mlxsw_sp_port_get_stats64(struct net_device *dev,
824 struct rtnl_link_stats64 *stats)
825{
826 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
827 struct mlxsw_sp_port_pcpu_stats *p;
828 u64 rx_packets, rx_bytes, tx_packets, tx_bytes;
829 u32 tx_dropped = 0;
830 unsigned int start;
831 int i;
832
833 for_each_possible_cpu(i) {
834 p = per_cpu_ptr(mlxsw_sp_port->pcpu_stats, i);
835 do {
836 start = u64_stats_fetch_begin_irq(&p->syncp);
837 rx_packets = p->rx_packets;
838 rx_bytes = p->rx_bytes;
839 tx_packets = p->tx_packets;
840 tx_bytes = p->tx_bytes;
841 } while (u64_stats_fetch_retry_irq(&p->syncp, start));
842
843 stats->rx_packets += rx_packets;
844 stats->rx_bytes += rx_bytes;
845 stats->tx_packets += tx_packets;
846 stats->tx_bytes += tx_bytes;
847 /* tx_dropped is u32, updated without syncp protection. */
848 tx_dropped += p->tx_dropped;
849 }
850 stats->tx_dropped = tx_dropped;
851 return stats;
852}
853
854int mlxsw_sp_port_vlan_set(struct mlxsw_sp_port *mlxsw_sp_port, u16 vid_begin,
855 u16 vid_end, bool is_member, bool untagged)
856{
857 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
858 char *spvm_pl;
859 int err;
860
861 spvm_pl = kmalloc(MLXSW_REG_SPVM_LEN, GFP_KERNEL);
862 if (!spvm_pl)
863 return -ENOMEM;
864
865 mlxsw_reg_spvm_pack(spvm_pl, mlxsw_sp_port->local_port, vid_begin,
866 vid_end, is_member, untagged);
867 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(spvm), spvm_pl);
868 kfree(spvm_pl);
869 return err;
870}
871
872static int mlxsw_sp_port_vp_mode_trans(struct mlxsw_sp_port *mlxsw_sp_port)
873{
874 enum mlxsw_reg_svfa_mt mt = MLXSW_REG_SVFA_MT_PORT_VID_TO_FID;
875 u16 vid, last_visited_vid;
876 int err;
877
878 for_each_set_bit(vid, mlxsw_sp_port->active_vlans, VLAN_N_VID) {
879 err = mlxsw_sp_port_vid_to_fid_set(mlxsw_sp_port, mt, true, vid,
880 vid);
881 if (err) {
882 last_visited_vid = vid;
883 goto err_port_vid_to_fid_set;
884 }
885 }
886
887 err = mlxsw_sp_port_vp_mode_set(mlxsw_sp_port, true);
888 if (err) {
889 last_visited_vid = VLAN_N_VID;
890 goto err_port_vid_to_fid_set;
891 }
892
893 return 0;
894
895err_port_vid_to_fid_set:
896 for_each_set_bit(vid, mlxsw_sp_port->active_vlans, last_visited_vid)
897 mlxsw_sp_port_vid_to_fid_set(mlxsw_sp_port, mt, false, vid,
898 vid);
899 return err;
900}
901
902static int mlxsw_sp_port_vlan_mode_trans(struct mlxsw_sp_port *mlxsw_sp_port)
903{
904 enum mlxsw_reg_svfa_mt mt = MLXSW_REG_SVFA_MT_PORT_VID_TO_FID;
905 u16 vid;
906 int err;
907
908 err = mlxsw_sp_port_vp_mode_set(mlxsw_sp_port, false);
909 if (err)
910 return err;
911
912 for_each_set_bit(vid, mlxsw_sp_port->active_vlans, VLAN_N_VID) {
913 err = mlxsw_sp_port_vid_to_fid_set(mlxsw_sp_port, mt, false,
914 vid, vid);
915 if (err)
916 return err;
917 }
918
919 return 0;
920}
921
Ido Schimmel7f71eb42015-12-15 16:03:37 +0100922static struct mlxsw_sp_port *
Ido Schimmel0355b592016-06-20 23:04:13 +0200923mlxsw_sp_port_vport_create(struct mlxsw_sp_port *mlxsw_sp_port, u16 vid)
Ido Schimmel7f71eb42015-12-15 16:03:37 +0100924{
925 struct mlxsw_sp_port *mlxsw_sp_vport;
926
927 mlxsw_sp_vport = kzalloc(sizeof(*mlxsw_sp_vport), GFP_KERNEL);
928 if (!mlxsw_sp_vport)
929 return NULL;
930
931 /* dev will be set correctly after the VLAN device is linked
932 * with the real device. In case of bridge SELF invocation, dev
933 * will remain as is.
934 */
935 mlxsw_sp_vport->dev = mlxsw_sp_port->dev;
936 mlxsw_sp_vport->mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
937 mlxsw_sp_vport->local_port = mlxsw_sp_port->local_port;
938 mlxsw_sp_vport->stp_state = BR_STATE_FORWARDING;
Ido Schimmel272c4472015-12-15 16:03:47 +0100939 mlxsw_sp_vport->lagged = mlxsw_sp_port->lagged;
940 mlxsw_sp_vport->lag_id = mlxsw_sp_port->lag_id;
Ido Schimmel0355b592016-06-20 23:04:13 +0200941 mlxsw_sp_vport->vport.vid = vid;
Ido Schimmel7f71eb42015-12-15 16:03:37 +0100942
943 list_add(&mlxsw_sp_vport->vport.list, &mlxsw_sp_port->vports_list);
944
945 return mlxsw_sp_vport;
946}
947
948static void mlxsw_sp_port_vport_destroy(struct mlxsw_sp_port *mlxsw_sp_vport)
949{
950 list_del(&mlxsw_sp_vport->vport.list);
951 kfree(mlxsw_sp_vport);
952}
953
Ido Schimmel05978482016-08-17 16:39:30 +0200954static int mlxsw_sp_port_add_vid(struct net_device *dev,
955 __be16 __always_unused proto, u16 vid)
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200956{
957 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
Ido Schimmel7f71eb42015-12-15 16:03:37 +0100958 struct mlxsw_sp_port *mlxsw_sp_vport;
Ido Schimmel52697a92016-07-02 11:00:09 +0200959 bool untagged = vid == 1;
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200960 int err;
961
962 /* VLAN 0 is added to HW filter when device goes up, but it is
963 * reserved in our case, so simply return.
964 */
965 if (!vid)
966 return 0;
967
Ido Schimmelfa66d7e2016-08-17 16:39:29 +0200968 if (mlxsw_sp_port_vport_find(mlxsw_sp_port, vid))
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200969 return 0;
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200970
Ido Schimmel0355b592016-06-20 23:04:13 +0200971 mlxsw_sp_vport = mlxsw_sp_port_vport_create(mlxsw_sp_port, vid);
Ido Schimmelfa66d7e2016-08-17 16:39:29 +0200972 if (!mlxsw_sp_vport)
Ido Schimmel0355b592016-06-20 23:04:13 +0200973 return -ENOMEM;
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200974
975 /* When adding the first VLAN interface on a bridged port we need to
976 * transition all the active 802.1Q bridge VLANs to use explicit
977 * {Port, VID} to FID mappings and set the port's mode to Virtual mode.
978 */
Ido Schimmel7f71eb42015-12-15 16:03:37 +0100979 if (list_is_singular(&mlxsw_sp_port->vports_list)) {
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200980 err = mlxsw_sp_port_vp_mode_trans(mlxsw_sp_port);
Ido Schimmelfa66d7e2016-08-17 16:39:29 +0200981 if (err)
Ido Schimmel7f71eb42015-12-15 16:03:37 +0100982 goto err_port_vp_mode_trans;
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200983 }
984
Ido Schimmel52697a92016-07-02 11:00:09 +0200985 err = mlxsw_sp_port_vlan_set(mlxsw_sp_vport, vid, vid, true, untagged);
Ido Schimmelfa66d7e2016-08-17 16:39:29 +0200986 if (err)
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200987 goto err_port_add_vid;
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200988
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200989 return 0;
990
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200991err_port_add_vid:
Ido Schimmel7f71eb42015-12-15 16:03:37 +0100992 if (list_is_singular(&mlxsw_sp_port->vports_list))
993 mlxsw_sp_port_vlan_mode_trans(mlxsw_sp_port);
994err_port_vp_mode_trans:
Ido Schimmel7f71eb42015-12-15 16:03:37 +0100995 mlxsw_sp_port_vport_destroy(mlxsw_sp_vport);
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200996 return err;
997}
998
Ido Schimmel32d863f2016-07-02 11:00:10 +0200999static int mlxsw_sp_port_kill_vid(struct net_device *dev,
1000 __be16 __always_unused proto, u16 vid)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001001{
1002 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
Ido Schimmel7f71eb42015-12-15 16:03:37 +01001003 struct mlxsw_sp_port *mlxsw_sp_vport;
Ido Schimmel1c800752016-06-20 23:04:20 +02001004 struct mlxsw_sp_fid *f;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001005
1006 /* VLAN 0 is removed from HW filter when device goes down, but
1007 * it is reserved in our case, so simply return.
1008 */
1009 if (!vid)
1010 return 0;
1011
Ido Schimmel7f71eb42015-12-15 16:03:37 +01001012 mlxsw_sp_vport = mlxsw_sp_port_vport_find(mlxsw_sp_port, vid);
Ido Schimmel7a355832016-08-17 16:39:28 +02001013 if (WARN_ON(!mlxsw_sp_vport))
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001014 return 0;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001015
Ido Schimmel7a355832016-08-17 16:39:28 +02001016 mlxsw_sp_port_vlan_set(mlxsw_sp_vport, vid, vid, false, false);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001017
Ido Schimmel1c800752016-06-20 23:04:20 +02001018 /* Drop FID reference. If this was the last reference the
1019 * resources will be freed.
1020 */
1021 f = mlxsw_sp_vport_fid_get(mlxsw_sp_vport);
1022 if (f && !WARN_ON(!f->leave))
1023 f->leave(mlxsw_sp_vport);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001024
1025 /* When removing the last VLAN interface on a bridged port we need to
1026 * transition all active 802.1Q bridge VLANs to use VID to FID
1027 * mappings and set port's mode to VLAN mode.
1028 */
Ido Schimmel7a355832016-08-17 16:39:28 +02001029 if (list_is_singular(&mlxsw_sp_port->vports_list))
1030 mlxsw_sp_port_vlan_mode_trans(mlxsw_sp_port);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001031
Ido Schimmel7f71eb42015-12-15 16:03:37 +01001032 mlxsw_sp_port_vport_destroy(mlxsw_sp_vport);
1033
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001034 return 0;
1035}
1036
Ido Schimmel2bf9a582016-04-05 10:20:04 +02001037static int mlxsw_sp_port_get_phys_port_name(struct net_device *dev, char *name,
1038 size_t len)
1039{
1040 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
Ido Schimmeld664b412016-06-09 09:51:40 +02001041 u8 module = mlxsw_sp_port->mapping.module;
1042 u8 width = mlxsw_sp_port->mapping.width;
1043 u8 lane = mlxsw_sp_port->mapping.lane;
Ido Schimmel2bf9a582016-04-05 10:20:04 +02001044 int err;
1045
Ido Schimmel2bf9a582016-04-05 10:20:04 +02001046 if (!mlxsw_sp_port->split)
1047 err = snprintf(name, len, "p%d", module + 1);
1048 else
1049 err = snprintf(name, len, "p%ds%d", module + 1,
1050 lane / width);
1051
1052 if (err >= len)
1053 return -EINVAL;
1054
1055 return 0;
1056}
1057
Yotam Gigi763b4b72016-07-21 12:03:17 +02001058static struct mlxsw_sp_port_mall_tc_entry *
1059mlxsw_sp_port_mirror_entry_find(struct mlxsw_sp_port *port,
1060 unsigned long cookie) {
1061 struct mlxsw_sp_port_mall_tc_entry *mall_tc_entry;
1062
1063 list_for_each_entry(mall_tc_entry, &port->mall_tc_list, list)
1064 if (mall_tc_entry->cookie == cookie)
1065 return mall_tc_entry;
1066
1067 return NULL;
1068}
1069
1070static int
1071mlxsw_sp_port_add_cls_matchall_mirror(struct mlxsw_sp_port *mlxsw_sp_port,
1072 struct tc_cls_matchall_offload *cls,
1073 const struct tc_action *a,
1074 bool ingress)
1075{
1076 struct mlxsw_sp_port_mall_tc_entry *mall_tc_entry;
1077 struct net *net = dev_net(mlxsw_sp_port->dev);
1078 enum mlxsw_sp_span_type span_type;
1079 struct mlxsw_sp_port *to_port;
1080 struct net_device *to_dev;
1081 int ifindex;
1082 int err;
1083
1084 ifindex = tcf_mirred_ifindex(a);
1085 to_dev = __dev_get_by_index(net, ifindex);
1086 if (!to_dev) {
1087 netdev_err(mlxsw_sp_port->dev, "Could not find requested device\n");
1088 return -EINVAL;
1089 }
1090
1091 if (!mlxsw_sp_port_dev_check(to_dev)) {
1092 netdev_err(mlxsw_sp_port->dev, "Cannot mirror to a non-spectrum port");
1093 return -ENOTSUPP;
1094 }
1095 to_port = netdev_priv(to_dev);
1096
1097 mall_tc_entry = kzalloc(sizeof(*mall_tc_entry), GFP_KERNEL);
1098 if (!mall_tc_entry)
1099 return -ENOMEM;
1100
1101 mall_tc_entry->cookie = cls->cookie;
1102 mall_tc_entry->type = MLXSW_SP_PORT_MALL_MIRROR;
1103 mall_tc_entry->mirror.to_local_port = to_port->local_port;
1104 mall_tc_entry->mirror.ingress = ingress;
1105 list_add_tail(&mall_tc_entry->list, &mlxsw_sp_port->mall_tc_list);
1106
1107 span_type = ingress ? MLXSW_SP_SPAN_INGRESS : MLXSW_SP_SPAN_EGRESS;
1108 err = mlxsw_sp_span_mirror_add(mlxsw_sp_port, to_port, span_type);
1109 if (err)
1110 goto err_mirror_add;
1111 return 0;
1112
1113err_mirror_add:
1114 list_del(&mall_tc_entry->list);
1115 kfree(mall_tc_entry);
1116 return err;
1117}
1118
1119static int mlxsw_sp_port_add_cls_matchall(struct mlxsw_sp_port *mlxsw_sp_port,
1120 __be16 protocol,
1121 struct tc_cls_matchall_offload *cls,
1122 bool ingress)
1123{
Yotam Gigi763b4b72016-07-21 12:03:17 +02001124 const struct tc_action *a;
WANG Cong22dc13c2016-08-13 22:35:00 -07001125 LIST_HEAD(actions);
Yotam Gigi763b4b72016-07-21 12:03:17 +02001126 int err;
1127
Ido Schimmel86cb13e2016-07-25 13:12:33 +03001128 if (!tc_single_action(cls->exts)) {
Yotam Gigi763b4b72016-07-21 12:03:17 +02001129 netdev_err(mlxsw_sp_port->dev, "only singular actions are supported\n");
1130 return -ENOTSUPP;
1131 }
1132
WANG Cong22dc13c2016-08-13 22:35:00 -07001133 tcf_exts_to_list(cls->exts, &actions);
1134 list_for_each_entry(a, &actions, list) {
Ido Schimmel86cb13e2016-07-25 13:12:33 +03001135 if (!is_tcf_mirred_mirror(a) || protocol != htons(ETH_P_ALL))
1136 return -ENOTSUPP;
1137
Yotam Gigi763b4b72016-07-21 12:03:17 +02001138 err = mlxsw_sp_port_add_cls_matchall_mirror(mlxsw_sp_port, cls,
1139 a, ingress);
1140 if (err)
1141 return err;
Yotam Gigi763b4b72016-07-21 12:03:17 +02001142 }
1143
1144 return 0;
1145}
1146
1147static void mlxsw_sp_port_del_cls_matchall(struct mlxsw_sp_port *mlxsw_sp_port,
1148 struct tc_cls_matchall_offload *cls)
1149{
1150 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
1151 struct mlxsw_sp_port_mall_tc_entry *mall_tc_entry;
1152 enum mlxsw_sp_span_type span_type;
1153 struct mlxsw_sp_port *to_port;
1154
1155 mall_tc_entry = mlxsw_sp_port_mirror_entry_find(mlxsw_sp_port,
1156 cls->cookie);
1157 if (!mall_tc_entry) {
1158 netdev_dbg(mlxsw_sp_port->dev, "tc entry not found on port\n");
1159 return;
1160 }
1161
1162 switch (mall_tc_entry->type) {
1163 case MLXSW_SP_PORT_MALL_MIRROR:
1164 to_port = mlxsw_sp->ports[mall_tc_entry->mirror.to_local_port];
1165 span_type = mall_tc_entry->mirror.ingress ?
1166 MLXSW_SP_SPAN_INGRESS : MLXSW_SP_SPAN_EGRESS;
1167
1168 mlxsw_sp_span_mirror_remove(mlxsw_sp_port, to_port, span_type);
1169 break;
1170 default:
1171 WARN_ON(1);
1172 }
1173
1174 list_del(&mall_tc_entry->list);
1175 kfree(mall_tc_entry);
1176}
1177
1178static int mlxsw_sp_setup_tc(struct net_device *dev, u32 handle,
1179 __be16 proto, struct tc_to_netdev *tc)
1180{
1181 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
1182 bool ingress = TC_H_MAJ(handle) == TC_H_MAJ(TC_H_INGRESS);
1183
1184 if (tc->type == TC_SETUP_MATCHALL) {
1185 switch (tc->cls_mall->command) {
1186 case TC_CLSMATCHALL_REPLACE:
1187 return mlxsw_sp_port_add_cls_matchall(mlxsw_sp_port,
1188 proto,
1189 tc->cls_mall,
1190 ingress);
1191 case TC_CLSMATCHALL_DESTROY:
1192 mlxsw_sp_port_del_cls_matchall(mlxsw_sp_port,
1193 tc->cls_mall);
1194 return 0;
1195 default:
1196 return -EINVAL;
1197 }
1198 }
1199
1200 return -ENOTSUPP;
1201}
1202
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001203static const struct net_device_ops mlxsw_sp_port_netdev_ops = {
1204 .ndo_open = mlxsw_sp_port_open,
1205 .ndo_stop = mlxsw_sp_port_stop,
1206 .ndo_start_xmit = mlxsw_sp_port_xmit,
Yotam Gigi763b4b72016-07-21 12:03:17 +02001207 .ndo_setup_tc = mlxsw_sp_setup_tc,
Jiri Pirkoc5b9b512015-12-03 12:12:22 +01001208 .ndo_set_rx_mode = mlxsw_sp_set_rx_mode,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001209 .ndo_set_mac_address = mlxsw_sp_port_set_mac_address,
1210 .ndo_change_mtu = mlxsw_sp_port_change_mtu,
1211 .ndo_get_stats64 = mlxsw_sp_port_get_stats64,
1212 .ndo_vlan_rx_add_vid = mlxsw_sp_port_add_vid,
1213 .ndo_vlan_rx_kill_vid = mlxsw_sp_port_kill_vid,
Jiri Pirko6cf3c972016-07-05 11:27:39 +02001214 .ndo_neigh_construct = mlxsw_sp_router_neigh_construct,
1215 .ndo_neigh_destroy = mlxsw_sp_router_neigh_destroy,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001216 .ndo_fdb_add = switchdev_port_fdb_add,
1217 .ndo_fdb_del = switchdev_port_fdb_del,
1218 .ndo_fdb_dump = switchdev_port_fdb_dump,
1219 .ndo_bridge_setlink = switchdev_port_bridge_setlink,
1220 .ndo_bridge_getlink = switchdev_port_bridge_getlink,
1221 .ndo_bridge_dellink = switchdev_port_bridge_dellink,
Ido Schimmel2bf9a582016-04-05 10:20:04 +02001222 .ndo_get_phys_port_name = mlxsw_sp_port_get_phys_port_name,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001223};
1224
1225static void mlxsw_sp_port_get_drvinfo(struct net_device *dev,
1226 struct ethtool_drvinfo *drvinfo)
1227{
1228 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
1229 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
1230
1231 strlcpy(drvinfo->driver, mlxsw_sp_driver_name, sizeof(drvinfo->driver));
1232 strlcpy(drvinfo->version, mlxsw_sp_driver_version,
1233 sizeof(drvinfo->version));
1234 snprintf(drvinfo->fw_version, sizeof(drvinfo->fw_version),
1235 "%d.%d.%d",
1236 mlxsw_sp->bus_info->fw_rev.major,
1237 mlxsw_sp->bus_info->fw_rev.minor,
1238 mlxsw_sp->bus_info->fw_rev.subminor);
1239 strlcpy(drvinfo->bus_info, mlxsw_sp->bus_info->device_name,
1240 sizeof(drvinfo->bus_info));
1241}
1242
Ido Schimmel9f7ec052016-04-06 17:10:14 +02001243static void mlxsw_sp_port_get_pauseparam(struct net_device *dev,
1244 struct ethtool_pauseparam *pause)
1245{
1246 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
1247
1248 pause->rx_pause = mlxsw_sp_port->link.rx_pause;
1249 pause->tx_pause = mlxsw_sp_port->link.tx_pause;
1250}
1251
1252static int mlxsw_sp_port_pause_set(struct mlxsw_sp_port *mlxsw_sp_port,
1253 struct ethtool_pauseparam *pause)
1254{
1255 char pfcc_pl[MLXSW_REG_PFCC_LEN];
1256
1257 mlxsw_reg_pfcc_pack(pfcc_pl, mlxsw_sp_port->local_port);
1258 mlxsw_reg_pfcc_pprx_set(pfcc_pl, pause->rx_pause);
1259 mlxsw_reg_pfcc_pptx_set(pfcc_pl, pause->tx_pause);
1260
1261 return mlxsw_reg_write(mlxsw_sp_port->mlxsw_sp->core, MLXSW_REG(pfcc),
1262 pfcc_pl);
1263}
1264
1265static int mlxsw_sp_port_set_pauseparam(struct net_device *dev,
1266 struct ethtool_pauseparam *pause)
1267{
1268 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
1269 bool pause_en = pause->tx_pause || pause->rx_pause;
1270 int err;
1271
Ido Schimmeld81a6bd2016-04-06 17:10:16 +02001272 if (mlxsw_sp_port->dcb.pfc && mlxsw_sp_port->dcb.pfc->pfc_en) {
1273 netdev_err(dev, "PFC already enabled on port\n");
1274 return -EINVAL;
1275 }
1276
Ido Schimmel9f7ec052016-04-06 17:10:14 +02001277 if (pause->autoneg) {
1278 netdev_err(dev, "PAUSE frames autonegotiation isn't supported\n");
1279 return -EINVAL;
1280 }
1281
1282 err = mlxsw_sp_port_headroom_set(mlxsw_sp_port, dev->mtu, pause_en);
1283 if (err) {
1284 netdev_err(dev, "Failed to configure port's headroom\n");
1285 return err;
1286 }
1287
1288 err = mlxsw_sp_port_pause_set(mlxsw_sp_port, pause);
1289 if (err) {
1290 netdev_err(dev, "Failed to set PAUSE parameters\n");
1291 goto err_port_pause_configure;
1292 }
1293
1294 mlxsw_sp_port->link.rx_pause = pause->rx_pause;
1295 mlxsw_sp_port->link.tx_pause = pause->tx_pause;
1296
1297 return 0;
1298
1299err_port_pause_configure:
1300 pause_en = mlxsw_sp_port_is_pause_en(mlxsw_sp_port);
1301 mlxsw_sp_port_headroom_set(mlxsw_sp_port, dev->mtu, pause_en);
1302 return err;
1303}
1304
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001305struct mlxsw_sp_port_hw_stats {
1306 char str[ETH_GSTRING_LEN];
1307 u64 (*getter)(char *payload);
1308};
1309
Ido Schimmel7ed674b2016-07-19 15:35:53 +02001310static struct mlxsw_sp_port_hw_stats mlxsw_sp_port_hw_stats[] = {
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001311 {
1312 .str = "a_frames_transmitted_ok",
1313 .getter = mlxsw_reg_ppcnt_a_frames_transmitted_ok_get,
1314 },
1315 {
1316 .str = "a_frames_received_ok",
1317 .getter = mlxsw_reg_ppcnt_a_frames_received_ok_get,
1318 },
1319 {
1320 .str = "a_frame_check_sequence_errors",
1321 .getter = mlxsw_reg_ppcnt_a_frame_check_sequence_errors_get,
1322 },
1323 {
1324 .str = "a_alignment_errors",
1325 .getter = mlxsw_reg_ppcnt_a_alignment_errors_get,
1326 },
1327 {
1328 .str = "a_octets_transmitted_ok",
1329 .getter = mlxsw_reg_ppcnt_a_octets_transmitted_ok_get,
1330 },
1331 {
1332 .str = "a_octets_received_ok",
1333 .getter = mlxsw_reg_ppcnt_a_octets_received_ok_get,
1334 },
1335 {
1336 .str = "a_multicast_frames_xmitted_ok",
1337 .getter = mlxsw_reg_ppcnt_a_multicast_frames_xmitted_ok_get,
1338 },
1339 {
1340 .str = "a_broadcast_frames_xmitted_ok",
1341 .getter = mlxsw_reg_ppcnt_a_broadcast_frames_xmitted_ok_get,
1342 },
1343 {
1344 .str = "a_multicast_frames_received_ok",
1345 .getter = mlxsw_reg_ppcnt_a_multicast_frames_received_ok_get,
1346 },
1347 {
1348 .str = "a_broadcast_frames_received_ok",
1349 .getter = mlxsw_reg_ppcnt_a_broadcast_frames_received_ok_get,
1350 },
1351 {
1352 .str = "a_in_range_length_errors",
1353 .getter = mlxsw_reg_ppcnt_a_in_range_length_errors_get,
1354 },
1355 {
1356 .str = "a_out_of_range_length_field",
1357 .getter = mlxsw_reg_ppcnt_a_out_of_range_length_field_get,
1358 },
1359 {
1360 .str = "a_frame_too_long_errors",
1361 .getter = mlxsw_reg_ppcnt_a_frame_too_long_errors_get,
1362 },
1363 {
1364 .str = "a_symbol_error_during_carrier",
1365 .getter = mlxsw_reg_ppcnt_a_symbol_error_during_carrier_get,
1366 },
1367 {
1368 .str = "a_mac_control_frames_transmitted",
1369 .getter = mlxsw_reg_ppcnt_a_mac_control_frames_transmitted_get,
1370 },
1371 {
1372 .str = "a_mac_control_frames_received",
1373 .getter = mlxsw_reg_ppcnt_a_mac_control_frames_received_get,
1374 },
1375 {
1376 .str = "a_unsupported_opcodes_received",
1377 .getter = mlxsw_reg_ppcnt_a_unsupported_opcodes_received_get,
1378 },
1379 {
1380 .str = "a_pause_mac_ctrl_frames_received",
1381 .getter = mlxsw_reg_ppcnt_a_pause_mac_ctrl_frames_received_get,
1382 },
1383 {
1384 .str = "a_pause_mac_ctrl_frames_xmitted",
1385 .getter = mlxsw_reg_ppcnt_a_pause_mac_ctrl_frames_transmitted_get,
1386 },
1387};
1388
1389#define MLXSW_SP_PORT_HW_STATS_LEN ARRAY_SIZE(mlxsw_sp_port_hw_stats)
1390
Ido Schimmel7ed674b2016-07-19 15:35:53 +02001391static struct mlxsw_sp_port_hw_stats mlxsw_sp_port_hw_prio_stats[] = {
1392 {
1393 .str = "rx_octets_prio",
1394 .getter = mlxsw_reg_ppcnt_rx_octets_get,
1395 },
1396 {
1397 .str = "rx_frames_prio",
1398 .getter = mlxsw_reg_ppcnt_rx_frames_get,
1399 },
1400 {
1401 .str = "tx_octets_prio",
1402 .getter = mlxsw_reg_ppcnt_tx_octets_get,
1403 },
1404 {
1405 .str = "tx_frames_prio",
1406 .getter = mlxsw_reg_ppcnt_tx_frames_get,
1407 },
1408 {
1409 .str = "rx_pause_prio",
1410 .getter = mlxsw_reg_ppcnt_rx_pause_get,
1411 },
1412 {
1413 .str = "rx_pause_duration_prio",
1414 .getter = mlxsw_reg_ppcnt_rx_pause_duration_get,
1415 },
1416 {
1417 .str = "tx_pause_prio",
1418 .getter = mlxsw_reg_ppcnt_tx_pause_get,
1419 },
1420 {
1421 .str = "tx_pause_duration_prio",
1422 .getter = mlxsw_reg_ppcnt_tx_pause_duration_get,
1423 },
1424};
1425
1426#define MLXSW_SP_PORT_HW_PRIO_STATS_LEN ARRAY_SIZE(mlxsw_sp_port_hw_prio_stats)
1427
Ido Schimmeldf4750e2016-07-19 15:35:54 +02001428static u64 mlxsw_reg_ppcnt_tc_transmit_queue_bytes_get(char *ppcnt_pl)
1429{
1430 u64 transmit_queue = mlxsw_reg_ppcnt_tc_transmit_queue_get(ppcnt_pl);
1431
1432 return MLXSW_SP_CELLS_TO_BYTES(transmit_queue);
1433}
1434
1435static struct mlxsw_sp_port_hw_stats mlxsw_sp_port_hw_tc_stats[] = {
1436 {
1437 .str = "tc_transmit_queue_tc",
1438 .getter = mlxsw_reg_ppcnt_tc_transmit_queue_bytes_get,
1439 },
1440 {
1441 .str = "tc_no_buffer_discard_uc_tc",
1442 .getter = mlxsw_reg_ppcnt_tc_no_buffer_discard_uc_get,
1443 },
1444};
1445
1446#define MLXSW_SP_PORT_HW_TC_STATS_LEN ARRAY_SIZE(mlxsw_sp_port_hw_tc_stats)
1447
Ido Schimmel7ed674b2016-07-19 15:35:53 +02001448#define MLXSW_SP_PORT_ETHTOOL_STATS_LEN (MLXSW_SP_PORT_HW_STATS_LEN + \
Ido Schimmeldf4750e2016-07-19 15:35:54 +02001449 (MLXSW_SP_PORT_HW_PRIO_STATS_LEN + \
1450 MLXSW_SP_PORT_HW_TC_STATS_LEN) * \
Ido Schimmel7ed674b2016-07-19 15:35:53 +02001451 IEEE_8021QAZ_MAX_TCS)
1452
1453static void mlxsw_sp_port_get_prio_strings(u8 **p, int prio)
1454{
1455 int i;
1456
1457 for (i = 0; i < MLXSW_SP_PORT_HW_PRIO_STATS_LEN; i++) {
1458 snprintf(*p, ETH_GSTRING_LEN, "%s_%d",
1459 mlxsw_sp_port_hw_prio_stats[i].str, prio);
1460 *p += ETH_GSTRING_LEN;
1461 }
1462}
1463
Ido Schimmeldf4750e2016-07-19 15:35:54 +02001464static void mlxsw_sp_port_get_tc_strings(u8 **p, int tc)
1465{
1466 int i;
1467
1468 for (i = 0; i < MLXSW_SP_PORT_HW_TC_STATS_LEN; i++) {
1469 snprintf(*p, ETH_GSTRING_LEN, "%s_%d",
1470 mlxsw_sp_port_hw_tc_stats[i].str, tc);
1471 *p += ETH_GSTRING_LEN;
1472 }
1473}
1474
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001475static void mlxsw_sp_port_get_strings(struct net_device *dev,
1476 u32 stringset, u8 *data)
1477{
1478 u8 *p = data;
1479 int i;
1480
1481 switch (stringset) {
1482 case ETH_SS_STATS:
1483 for (i = 0; i < MLXSW_SP_PORT_HW_STATS_LEN; i++) {
1484 memcpy(p, mlxsw_sp_port_hw_stats[i].str,
1485 ETH_GSTRING_LEN);
1486 p += ETH_GSTRING_LEN;
1487 }
Ido Schimmel7ed674b2016-07-19 15:35:53 +02001488
1489 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++)
1490 mlxsw_sp_port_get_prio_strings(&p, i);
1491
Ido Schimmeldf4750e2016-07-19 15:35:54 +02001492 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++)
1493 mlxsw_sp_port_get_tc_strings(&p, i);
1494
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001495 break;
1496 }
1497}
1498
Ido Schimmel3a66ee32015-11-27 13:45:55 +01001499static int mlxsw_sp_port_set_phys_id(struct net_device *dev,
1500 enum ethtool_phys_id_state state)
1501{
1502 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
1503 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
1504 char mlcr_pl[MLXSW_REG_MLCR_LEN];
1505 bool active;
1506
1507 switch (state) {
1508 case ETHTOOL_ID_ACTIVE:
1509 active = true;
1510 break;
1511 case ETHTOOL_ID_INACTIVE:
1512 active = false;
1513 break;
1514 default:
1515 return -EOPNOTSUPP;
1516 }
1517
1518 mlxsw_reg_mlcr_pack(mlcr_pl, mlxsw_sp_port->local_port, active);
1519 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(mlcr), mlcr_pl);
1520}
1521
Ido Schimmel7ed674b2016-07-19 15:35:53 +02001522static int
1523mlxsw_sp_get_hw_stats_by_group(struct mlxsw_sp_port_hw_stats **p_hw_stats,
1524 int *p_len, enum mlxsw_reg_ppcnt_grp grp)
1525{
1526 switch (grp) {
1527 case MLXSW_REG_PPCNT_IEEE_8023_CNT:
1528 *p_hw_stats = mlxsw_sp_port_hw_stats;
1529 *p_len = MLXSW_SP_PORT_HW_STATS_LEN;
1530 break;
1531 case MLXSW_REG_PPCNT_PRIO_CNT:
1532 *p_hw_stats = mlxsw_sp_port_hw_prio_stats;
1533 *p_len = MLXSW_SP_PORT_HW_PRIO_STATS_LEN;
1534 break;
Ido Schimmeldf4750e2016-07-19 15:35:54 +02001535 case MLXSW_REG_PPCNT_TC_CNT:
1536 *p_hw_stats = mlxsw_sp_port_hw_tc_stats;
1537 *p_len = MLXSW_SP_PORT_HW_TC_STATS_LEN;
1538 break;
Ido Schimmel7ed674b2016-07-19 15:35:53 +02001539 default:
1540 WARN_ON(1);
1541 return -ENOTSUPP;
1542 }
1543 return 0;
1544}
1545
1546static void __mlxsw_sp_port_get_stats(struct net_device *dev,
1547 enum mlxsw_reg_ppcnt_grp grp, int prio,
1548 u64 *data, int data_index)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001549{
1550 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
1551 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
Ido Schimmel7ed674b2016-07-19 15:35:53 +02001552 struct mlxsw_sp_port_hw_stats *hw_stats;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001553 char ppcnt_pl[MLXSW_REG_PPCNT_LEN];
Ido Schimmel7ed674b2016-07-19 15:35:53 +02001554 int i, len;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001555 int err;
1556
Ido Schimmel7ed674b2016-07-19 15:35:53 +02001557 err = mlxsw_sp_get_hw_stats_by_group(&hw_stats, &len, grp);
1558 if (err)
1559 return;
1560 mlxsw_reg_ppcnt_pack(ppcnt_pl, mlxsw_sp_port->local_port, grp, prio);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001561 err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(ppcnt), ppcnt_pl);
Ido Schimmel7ed674b2016-07-19 15:35:53 +02001562 for (i = 0; i < len; i++)
1563 data[data_index + i] = !err ? hw_stats[i].getter(ppcnt_pl) : 0;
1564}
1565
1566static void mlxsw_sp_port_get_stats(struct net_device *dev,
1567 struct ethtool_stats *stats, u64 *data)
1568{
1569 int i, data_index = 0;
1570
1571 /* IEEE 802.3 Counters */
1572 __mlxsw_sp_port_get_stats(dev, MLXSW_REG_PPCNT_IEEE_8023_CNT, 0,
1573 data, data_index);
1574 data_index = MLXSW_SP_PORT_HW_STATS_LEN;
1575
1576 /* Per-Priority Counters */
1577 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
1578 __mlxsw_sp_port_get_stats(dev, MLXSW_REG_PPCNT_PRIO_CNT, i,
1579 data, data_index);
1580 data_index += MLXSW_SP_PORT_HW_PRIO_STATS_LEN;
1581 }
Ido Schimmeldf4750e2016-07-19 15:35:54 +02001582
1583 /* Per-TC Counters */
1584 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
1585 __mlxsw_sp_port_get_stats(dev, MLXSW_REG_PPCNT_TC_CNT, i,
1586 data, data_index);
1587 data_index += MLXSW_SP_PORT_HW_TC_STATS_LEN;
1588 }
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001589}
1590
1591static int mlxsw_sp_port_get_sset_count(struct net_device *dev, int sset)
1592{
1593 switch (sset) {
1594 case ETH_SS_STATS:
Ido Schimmel7ed674b2016-07-19 15:35:53 +02001595 return MLXSW_SP_PORT_ETHTOOL_STATS_LEN;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001596 default:
1597 return -EOPNOTSUPP;
1598 }
1599}
1600
1601struct mlxsw_sp_port_link_mode {
1602 u32 mask;
1603 u32 supported;
1604 u32 advertised;
1605 u32 speed;
1606};
1607
1608static const struct mlxsw_sp_port_link_mode mlxsw_sp_port_link_mode[] = {
1609 {
1610 .mask = MLXSW_REG_PTYS_ETH_SPEED_100BASE_T,
1611 .supported = SUPPORTED_100baseT_Full,
1612 .advertised = ADVERTISED_100baseT_Full,
1613 .speed = 100,
1614 },
1615 {
1616 .mask = MLXSW_REG_PTYS_ETH_SPEED_100BASE_TX,
1617 .speed = 100,
1618 },
1619 {
1620 .mask = MLXSW_REG_PTYS_ETH_SPEED_SGMII |
1621 MLXSW_REG_PTYS_ETH_SPEED_1000BASE_KX,
1622 .supported = SUPPORTED_1000baseKX_Full,
1623 .advertised = ADVERTISED_1000baseKX_Full,
1624 .speed = 1000,
1625 },
1626 {
1627 .mask = MLXSW_REG_PTYS_ETH_SPEED_10GBASE_T,
1628 .supported = SUPPORTED_10000baseT_Full,
1629 .advertised = ADVERTISED_10000baseT_Full,
1630 .speed = 10000,
1631 },
1632 {
1633 .mask = MLXSW_REG_PTYS_ETH_SPEED_10GBASE_CX4 |
1634 MLXSW_REG_PTYS_ETH_SPEED_10GBASE_KX4,
1635 .supported = SUPPORTED_10000baseKX4_Full,
1636 .advertised = ADVERTISED_10000baseKX4_Full,
1637 .speed = 10000,
1638 },
1639 {
1640 .mask = MLXSW_REG_PTYS_ETH_SPEED_10GBASE_KR |
1641 MLXSW_REG_PTYS_ETH_SPEED_10GBASE_CR |
1642 MLXSW_REG_PTYS_ETH_SPEED_10GBASE_SR |
1643 MLXSW_REG_PTYS_ETH_SPEED_10GBASE_ER_LR,
1644 .supported = SUPPORTED_10000baseKR_Full,
1645 .advertised = ADVERTISED_10000baseKR_Full,
1646 .speed = 10000,
1647 },
1648 {
1649 .mask = MLXSW_REG_PTYS_ETH_SPEED_20GBASE_KR2,
1650 .supported = SUPPORTED_20000baseKR2_Full,
1651 .advertised = ADVERTISED_20000baseKR2_Full,
1652 .speed = 20000,
1653 },
1654 {
1655 .mask = MLXSW_REG_PTYS_ETH_SPEED_40GBASE_CR4,
1656 .supported = SUPPORTED_40000baseCR4_Full,
1657 .advertised = ADVERTISED_40000baseCR4_Full,
1658 .speed = 40000,
1659 },
1660 {
1661 .mask = MLXSW_REG_PTYS_ETH_SPEED_40GBASE_KR4,
1662 .supported = SUPPORTED_40000baseKR4_Full,
1663 .advertised = ADVERTISED_40000baseKR4_Full,
1664 .speed = 40000,
1665 },
1666 {
1667 .mask = MLXSW_REG_PTYS_ETH_SPEED_40GBASE_SR4,
1668 .supported = SUPPORTED_40000baseSR4_Full,
1669 .advertised = ADVERTISED_40000baseSR4_Full,
1670 .speed = 40000,
1671 },
1672 {
1673 .mask = MLXSW_REG_PTYS_ETH_SPEED_40GBASE_LR4_ER4,
1674 .supported = SUPPORTED_40000baseLR4_Full,
1675 .advertised = ADVERTISED_40000baseLR4_Full,
1676 .speed = 40000,
1677 },
1678 {
1679 .mask = MLXSW_REG_PTYS_ETH_SPEED_25GBASE_CR |
1680 MLXSW_REG_PTYS_ETH_SPEED_25GBASE_KR |
1681 MLXSW_REG_PTYS_ETH_SPEED_25GBASE_SR,
1682 .speed = 25000,
1683 },
1684 {
1685 .mask = MLXSW_REG_PTYS_ETH_SPEED_50GBASE_KR4 |
1686 MLXSW_REG_PTYS_ETH_SPEED_50GBASE_CR2 |
1687 MLXSW_REG_PTYS_ETH_SPEED_50GBASE_KR2,
1688 .speed = 50000,
1689 },
1690 {
1691 .mask = MLXSW_REG_PTYS_ETH_SPEED_56GBASE_R4,
1692 .supported = SUPPORTED_56000baseKR4_Full,
1693 .advertised = ADVERTISED_56000baseKR4_Full,
1694 .speed = 56000,
1695 },
1696 {
1697 .mask = MLXSW_REG_PTYS_ETH_SPEED_100GBASE_CR4 |
1698 MLXSW_REG_PTYS_ETH_SPEED_100GBASE_SR4 |
1699 MLXSW_REG_PTYS_ETH_SPEED_100GBASE_KR4 |
1700 MLXSW_REG_PTYS_ETH_SPEED_100GBASE_LR4_ER4,
1701 .speed = 100000,
1702 },
1703};
1704
1705#define MLXSW_SP_PORT_LINK_MODE_LEN ARRAY_SIZE(mlxsw_sp_port_link_mode)
1706
1707static u32 mlxsw_sp_from_ptys_supported_port(u32 ptys_eth_proto)
1708{
1709 if (ptys_eth_proto & (MLXSW_REG_PTYS_ETH_SPEED_10GBASE_CR |
1710 MLXSW_REG_PTYS_ETH_SPEED_10GBASE_SR |
1711 MLXSW_REG_PTYS_ETH_SPEED_40GBASE_CR4 |
1712 MLXSW_REG_PTYS_ETH_SPEED_40GBASE_SR4 |
1713 MLXSW_REG_PTYS_ETH_SPEED_100GBASE_SR4 |
1714 MLXSW_REG_PTYS_ETH_SPEED_SGMII))
1715 return SUPPORTED_FIBRE;
1716
1717 if (ptys_eth_proto & (MLXSW_REG_PTYS_ETH_SPEED_10GBASE_KR |
1718 MLXSW_REG_PTYS_ETH_SPEED_10GBASE_KX4 |
1719 MLXSW_REG_PTYS_ETH_SPEED_40GBASE_KR4 |
1720 MLXSW_REG_PTYS_ETH_SPEED_100GBASE_KR4 |
1721 MLXSW_REG_PTYS_ETH_SPEED_1000BASE_KX))
1722 return SUPPORTED_Backplane;
1723 return 0;
1724}
1725
1726static u32 mlxsw_sp_from_ptys_supported_link(u32 ptys_eth_proto)
1727{
1728 u32 modes = 0;
1729 int i;
1730
1731 for (i = 0; i < MLXSW_SP_PORT_LINK_MODE_LEN; i++) {
1732 if (ptys_eth_proto & mlxsw_sp_port_link_mode[i].mask)
1733 modes |= mlxsw_sp_port_link_mode[i].supported;
1734 }
1735 return modes;
1736}
1737
1738static u32 mlxsw_sp_from_ptys_advert_link(u32 ptys_eth_proto)
1739{
1740 u32 modes = 0;
1741 int i;
1742
1743 for (i = 0; i < MLXSW_SP_PORT_LINK_MODE_LEN; i++) {
1744 if (ptys_eth_proto & mlxsw_sp_port_link_mode[i].mask)
1745 modes |= mlxsw_sp_port_link_mode[i].advertised;
1746 }
1747 return modes;
1748}
1749
1750static void mlxsw_sp_from_ptys_speed_duplex(bool carrier_ok, u32 ptys_eth_proto,
1751 struct ethtool_cmd *cmd)
1752{
1753 u32 speed = SPEED_UNKNOWN;
1754 u8 duplex = DUPLEX_UNKNOWN;
1755 int i;
1756
1757 if (!carrier_ok)
1758 goto out;
1759
1760 for (i = 0; i < MLXSW_SP_PORT_LINK_MODE_LEN; i++) {
1761 if (ptys_eth_proto & mlxsw_sp_port_link_mode[i].mask) {
1762 speed = mlxsw_sp_port_link_mode[i].speed;
1763 duplex = DUPLEX_FULL;
1764 break;
1765 }
1766 }
1767out:
1768 ethtool_cmd_speed_set(cmd, speed);
1769 cmd->duplex = duplex;
1770}
1771
1772static u8 mlxsw_sp_port_connector_port(u32 ptys_eth_proto)
1773{
1774 if (ptys_eth_proto & (MLXSW_REG_PTYS_ETH_SPEED_10GBASE_SR |
1775 MLXSW_REG_PTYS_ETH_SPEED_40GBASE_SR4 |
1776 MLXSW_REG_PTYS_ETH_SPEED_100GBASE_SR4 |
1777 MLXSW_REG_PTYS_ETH_SPEED_SGMII))
1778 return PORT_FIBRE;
1779
1780 if (ptys_eth_proto & (MLXSW_REG_PTYS_ETH_SPEED_10GBASE_CR |
1781 MLXSW_REG_PTYS_ETH_SPEED_40GBASE_CR4 |
1782 MLXSW_REG_PTYS_ETH_SPEED_100GBASE_CR4))
1783 return PORT_DA;
1784
1785 if (ptys_eth_proto & (MLXSW_REG_PTYS_ETH_SPEED_10GBASE_KR |
1786 MLXSW_REG_PTYS_ETH_SPEED_10GBASE_KX4 |
1787 MLXSW_REG_PTYS_ETH_SPEED_40GBASE_KR4 |
1788 MLXSW_REG_PTYS_ETH_SPEED_100GBASE_KR4))
1789 return PORT_NONE;
1790
1791 return PORT_OTHER;
1792}
1793
1794static int mlxsw_sp_port_get_settings(struct net_device *dev,
1795 struct ethtool_cmd *cmd)
1796{
1797 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
1798 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
1799 char ptys_pl[MLXSW_REG_PTYS_LEN];
1800 u32 eth_proto_cap;
1801 u32 eth_proto_admin;
1802 u32 eth_proto_oper;
Ido Schimmel4149b972016-09-12 13:26:24 +02001803 u8 autoneg_status;
1804 u32 eth_proto_lp;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001805 int err;
1806
1807 mlxsw_reg_ptys_pack(ptys_pl, mlxsw_sp_port->local_port, 0);
1808 err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(ptys), ptys_pl);
1809 if (err) {
1810 netdev_err(dev, "Failed to get proto");
1811 return err;
1812 }
1813 mlxsw_reg_ptys_unpack(ptys_pl, &eth_proto_cap,
1814 &eth_proto_admin, &eth_proto_oper);
Ido Schimmel4149b972016-09-12 13:26:24 +02001815 eth_proto_lp = mlxsw_reg_ptys_eth_proto_lp_advertise_get(ptys_pl);
1816 autoneg_status = mlxsw_reg_ptys_an_status_get(ptys_pl);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001817
1818 cmd->supported = mlxsw_sp_from_ptys_supported_port(eth_proto_cap) |
1819 mlxsw_sp_from_ptys_supported_link(eth_proto_cap) |
Ido Schimmelc3f15762016-07-15 11:14:59 +02001820 SUPPORTED_Pause | SUPPORTED_Asym_Pause |
1821 SUPPORTED_Autoneg;
Ido Schimmel0c83f882016-09-12 13:26:23 +02001822 if (mlxsw_sp_port->link.autoneg) {
1823 cmd->advertising =
1824 mlxsw_sp_from_ptys_advert_link(eth_proto_admin);
1825 cmd->advertising |= ADVERTISED_Autoneg;
1826 cmd->autoneg = AUTONEG_ENABLE;
1827 }
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001828 mlxsw_sp_from_ptys_speed_duplex(netif_carrier_ok(dev),
1829 eth_proto_oper, cmd);
1830
1831 eth_proto_oper = eth_proto_oper ? eth_proto_oper : eth_proto_cap;
1832 cmd->port = mlxsw_sp_port_connector_port(eth_proto_oper);
Ido Schimmel4149b972016-09-12 13:26:24 +02001833
1834 if (autoneg_status == MLXSW_REG_PTYS_AN_STATUS_OK && eth_proto_lp)
1835 cmd->lp_advertising =
1836 mlxsw_sp_from_ptys_advert_link(eth_proto_lp);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001837
1838 cmd->transceiver = XCVR_INTERNAL;
1839 return 0;
1840}
1841
1842static u32 mlxsw_sp_to_ptys_advert_link(u32 advertising)
1843{
1844 u32 ptys_proto = 0;
1845 int i;
1846
1847 for (i = 0; i < MLXSW_SP_PORT_LINK_MODE_LEN; i++) {
1848 if (advertising & mlxsw_sp_port_link_mode[i].advertised)
1849 ptys_proto |= mlxsw_sp_port_link_mode[i].mask;
1850 }
1851 return ptys_proto;
1852}
1853
1854static u32 mlxsw_sp_to_ptys_speed(u32 speed)
1855{
1856 u32 ptys_proto = 0;
1857 int i;
1858
1859 for (i = 0; i < MLXSW_SP_PORT_LINK_MODE_LEN; i++) {
1860 if (speed == mlxsw_sp_port_link_mode[i].speed)
1861 ptys_proto |= mlxsw_sp_port_link_mode[i].mask;
1862 }
1863 return ptys_proto;
1864}
1865
Ido Schimmel18f1e702016-02-26 17:32:31 +01001866static u32 mlxsw_sp_to_ptys_upper_speed(u32 upper_speed)
1867{
1868 u32 ptys_proto = 0;
1869 int i;
1870
1871 for (i = 0; i < MLXSW_SP_PORT_LINK_MODE_LEN; i++) {
1872 if (mlxsw_sp_port_link_mode[i].speed <= upper_speed)
1873 ptys_proto |= mlxsw_sp_port_link_mode[i].mask;
1874 }
1875 return ptys_proto;
1876}
1877
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001878static int mlxsw_sp_port_set_settings(struct net_device *dev,
1879 struct ethtool_cmd *cmd)
1880{
1881 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
1882 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
1883 char ptys_pl[MLXSW_REG_PTYS_LEN];
1884 u32 speed;
1885 u32 eth_proto_new;
1886 u32 eth_proto_cap;
1887 u32 eth_proto_admin;
Ido Schimmel0c83f882016-09-12 13:26:23 +02001888 bool autoneg;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001889 int err;
1890
Ido Schimmel0c83f882016-09-12 13:26:23 +02001891 autoneg = cmd->autoneg == AUTONEG_ENABLE;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001892 speed = ethtool_cmd_speed(cmd);
1893
Ido Schimmel0c83f882016-09-12 13:26:23 +02001894 eth_proto_new = autoneg ?
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001895 mlxsw_sp_to_ptys_advert_link(cmd->advertising) :
1896 mlxsw_sp_to_ptys_speed(speed);
1897
1898 mlxsw_reg_ptys_pack(ptys_pl, mlxsw_sp_port->local_port, 0);
1899 err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(ptys), ptys_pl);
1900 if (err) {
1901 netdev_err(dev, "Failed to get proto");
1902 return err;
1903 }
1904 mlxsw_reg_ptys_unpack(ptys_pl, &eth_proto_cap, &eth_proto_admin, NULL);
1905
1906 eth_proto_new = eth_proto_new & eth_proto_cap;
1907 if (!eth_proto_new) {
1908 netdev_err(dev, "Not supported proto admin requested");
1909 return -EINVAL;
1910 }
1911 if (eth_proto_new == eth_proto_admin)
1912 return 0;
1913
1914 mlxsw_reg_ptys_pack(ptys_pl, mlxsw_sp_port->local_port, eth_proto_new);
1915 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ptys), ptys_pl);
1916 if (err) {
1917 netdev_err(dev, "Failed to set proto admin");
1918 return err;
1919 }
1920
Ido Schimmel6277d462016-07-15 11:14:58 +02001921 if (!netif_running(dev))
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001922 return 0;
1923
Ido Schimmel0c83f882016-09-12 13:26:23 +02001924 mlxsw_sp_port->link.autoneg = autoneg;
1925
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001926 err = mlxsw_sp_port_admin_status_set(mlxsw_sp_port, false);
1927 if (err) {
1928 netdev_err(dev, "Failed to set admin status");
1929 return err;
1930 }
1931
1932 err = mlxsw_sp_port_admin_status_set(mlxsw_sp_port, true);
1933 if (err) {
1934 netdev_err(dev, "Failed to set admin status");
1935 return err;
1936 }
1937
1938 return 0;
1939}
1940
1941static const struct ethtool_ops mlxsw_sp_port_ethtool_ops = {
1942 .get_drvinfo = mlxsw_sp_port_get_drvinfo,
1943 .get_link = ethtool_op_get_link,
Ido Schimmel9f7ec052016-04-06 17:10:14 +02001944 .get_pauseparam = mlxsw_sp_port_get_pauseparam,
1945 .set_pauseparam = mlxsw_sp_port_set_pauseparam,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001946 .get_strings = mlxsw_sp_port_get_strings,
Ido Schimmel3a66ee32015-11-27 13:45:55 +01001947 .set_phys_id = mlxsw_sp_port_set_phys_id,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001948 .get_ethtool_stats = mlxsw_sp_port_get_stats,
1949 .get_sset_count = mlxsw_sp_port_get_sset_count,
1950 .get_settings = mlxsw_sp_port_get_settings,
1951 .set_settings = mlxsw_sp_port_set_settings,
1952};
1953
Ido Schimmel18f1e702016-02-26 17:32:31 +01001954static int
1955mlxsw_sp_port_speed_by_width_set(struct mlxsw_sp_port *mlxsw_sp_port, u8 width)
1956{
1957 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
1958 u32 upper_speed = MLXSW_SP_PORT_BASE_SPEED * width;
1959 char ptys_pl[MLXSW_REG_PTYS_LEN];
1960 u32 eth_proto_admin;
1961
1962 eth_proto_admin = mlxsw_sp_to_ptys_upper_speed(upper_speed);
1963 mlxsw_reg_ptys_pack(ptys_pl, mlxsw_sp_port->local_port,
1964 eth_proto_admin);
1965 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ptys), ptys_pl);
1966}
1967
Ido Schimmel8e8dfe92016-04-06 17:10:10 +02001968int mlxsw_sp_port_ets_set(struct mlxsw_sp_port *mlxsw_sp_port,
1969 enum mlxsw_reg_qeec_hr hr, u8 index, u8 next_index,
1970 bool dwrr, u8 dwrr_weight)
Ido Schimmel90183b92016-04-06 17:10:08 +02001971{
1972 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
1973 char qeec_pl[MLXSW_REG_QEEC_LEN];
1974
1975 mlxsw_reg_qeec_pack(qeec_pl, mlxsw_sp_port->local_port, hr, index,
1976 next_index);
1977 mlxsw_reg_qeec_de_set(qeec_pl, true);
1978 mlxsw_reg_qeec_dwrr_set(qeec_pl, dwrr);
1979 mlxsw_reg_qeec_dwrr_weight_set(qeec_pl, dwrr_weight);
1980 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(qeec), qeec_pl);
1981}
1982
Ido Schimmelcc7cf512016-04-06 17:10:11 +02001983int mlxsw_sp_port_ets_maxrate_set(struct mlxsw_sp_port *mlxsw_sp_port,
1984 enum mlxsw_reg_qeec_hr hr, u8 index,
1985 u8 next_index, u32 maxrate)
Ido Schimmel90183b92016-04-06 17:10:08 +02001986{
1987 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
1988 char qeec_pl[MLXSW_REG_QEEC_LEN];
1989
1990 mlxsw_reg_qeec_pack(qeec_pl, mlxsw_sp_port->local_port, hr, index,
1991 next_index);
1992 mlxsw_reg_qeec_mase_set(qeec_pl, true);
1993 mlxsw_reg_qeec_max_shaper_rate_set(qeec_pl, maxrate);
1994 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(qeec), qeec_pl);
1995}
1996
Ido Schimmel8e8dfe92016-04-06 17:10:10 +02001997int mlxsw_sp_port_prio_tc_set(struct mlxsw_sp_port *mlxsw_sp_port,
1998 u8 switch_prio, u8 tclass)
Ido Schimmel90183b92016-04-06 17:10:08 +02001999{
2000 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
2001 char qtct_pl[MLXSW_REG_QTCT_LEN];
2002
2003 mlxsw_reg_qtct_pack(qtct_pl, mlxsw_sp_port->local_port, switch_prio,
2004 tclass);
2005 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(qtct), qtct_pl);
2006}
2007
2008static int mlxsw_sp_port_ets_init(struct mlxsw_sp_port *mlxsw_sp_port)
2009{
2010 int err, i;
2011
2012 /* Setup the elements hierarcy, so that each TC is linked to
2013 * one subgroup, which are all member in the same group.
2014 */
2015 err = mlxsw_sp_port_ets_set(mlxsw_sp_port,
2016 MLXSW_REG_QEEC_HIERARCY_GROUP, 0, 0, false,
2017 0);
2018 if (err)
2019 return err;
2020 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
2021 err = mlxsw_sp_port_ets_set(mlxsw_sp_port,
2022 MLXSW_REG_QEEC_HIERARCY_SUBGROUP, i,
2023 0, false, 0);
2024 if (err)
2025 return err;
2026 }
2027 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
2028 err = mlxsw_sp_port_ets_set(mlxsw_sp_port,
2029 MLXSW_REG_QEEC_HIERARCY_TC, i, i,
2030 false, 0);
2031 if (err)
2032 return err;
2033 }
2034
2035 /* Make sure the max shaper is disabled in all hierarcies that
2036 * support it.
2037 */
2038 err = mlxsw_sp_port_ets_maxrate_set(mlxsw_sp_port,
2039 MLXSW_REG_QEEC_HIERARCY_PORT, 0, 0,
2040 MLXSW_REG_QEEC_MAS_DIS);
2041 if (err)
2042 return err;
2043 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
2044 err = mlxsw_sp_port_ets_maxrate_set(mlxsw_sp_port,
2045 MLXSW_REG_QEEC_HIERARCY_SUBGROUP,
2046 i, 0,
2047 MLXSW_REG_QEEC_MAS_DIS);
2048 if (err)
2049 return err;
2050 }
2051 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
2052 err = mlxsw_sp_port_ets_maxrate_set(mlxsw_sp_port,
2053 MLXSW_REG_QEEC_HIERARCY_TC,
2054 i, i,
2055 MLXSW_REG_QEEC_MAS_DIS);
2056 if (err)
2057 return err;
2058 }
2059
2060 /* Map all priorities to traffic class 0. */
2061 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
2062 err = mlxsw_sp_port_prio_tc_set(mlxsw_sp_port, i, 0);
2063 if (err)
2064 return err;
2065 }
2066
2067 return 0;
2068}
2069
Ido Schimmel05978482016-08-17 16:39:30 +02002070static int mlxsw_sp_port_pvid_vport_create(struct mlxsw_sp_port *mlxsw_sp_port)
2071{
2072 mlxsw_sp_port->pvid = 1;
2073
2074 return mlxsw_sp_port_add_vid(mlxsw_sp_port->dev, 0, 1);
2075}
2076
2077static int mlxsw_sp_port_pvid_vport_destroy(struct mlxsw_sp_port *mlxsw_sp_port)
2078{
2079 return mlxsw_sp_port_kill_vid(mlxsw_sp_port->dev, 0, 1);
2080}
2081
Ido Schimmelbe945352016-06-09 09:51:39 +02002082static int mlxsw_sp_port_create(struct mlxsw_sp *mlxsw_sp, u8 local_port,
Ido Schimmeld664b412016-06-09 09:51:40 +02002083 bool split, u8 module, u8 width, u8 lane)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002084{
2085 struct mlxsw_sp_port *mlxsw_sp_port;
2086 struct net_device *dev;
Ido Schimmelbd40e9d2015-12-15 16:03:36 +01002087 size_t bytes;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002088 int err;
2089
2090 dev = alloc_etherdev(sizeof(struct mlxsw_sp_port));
2091 if (!dev)
2092 return -ENOMEM;
2093 mlxsw_sp_port = netdev_priv(dev);
2094 mlxsw_sp_port->dev = dev;
2095 mlxsw_sp_port->mlxsw_sp = mlxsw_sp;
2096 mlxsw_sp_port->local_port = local_port;
Ido Schimmel18f1e702016-02-26 17:32:31 +01002097 mlxsw_sp_port->split = split;
Ido Schimmeld664b412016-06-09 09:51:40 +02002098 mlxsw_sp_port->mapping.module = module;
2099 mlxsw_sp_port->mapping.width = width;
2100 mlxsw_sp_port->mapping.lane = lane;
Ido Schimmel0c83f882016-09-12 13:26:23 +02002101 mlxsw_sp_port->link.autoneg = 1;
Ido Schimmelbd40e9d2015-12-15 16:03:36 +01002102 bytes = DIV_ROUND_UP(VLAN_N_VID, BITS_PER_BYTE);
2103 mlxsw_sp_port->active_vlans = kzalloc(bytes, GFP_KERNEL);
2104 if (!mlxsw_sp_port->active_vlans) {
2105 err = -ENOMEM;
2106 goto err_port_active_vlans_alloc;
2107 }
Elad Razfc1273a2016-01-06 13:01:11 +01002108 mlxsw_sp_port->untagged_vlans = kzalloc(bytes, GFP_KERNEL);
2109 if (!mlxsw_sp_port->untagged_vlans) {
2110 err = -ENOMEM;
2111 goto err_port_untagged_vlans_alloc;
2112 }
Ido Schimmel7f71eb42015-12-15 16:03:37 +01002113 INIT_LIST_HEAD(&mlxsw_sp_port->vports_list);
Yotam Gigi763b4b72016-07-21 12:03:17 +02002114 INIT_LIST_HEAD(&mlxsw_sp_port->mall_tc_list);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002115
2116 mlxsw_sp_port->pcpu_stats =
2117 netdev_alloc_pcpu_stats(struct mlxsw_sp_port_pcpu_stats);
2118 if (!mlxsw_sp_port->pcpu_stats) {
2119 err = -ENOMEM;
2120 goto err_alloc_stats;
2121 }
2122
2123 dev->netdev_ops = &mlxsw_sp_port_netdev_ops;
2124 dev->ethtool_ops = &mlxsw_sp_port_ethtool_ops;
2125
Ido Schimmel3247ff22016-09-08 08:16:02 +02002126 err = mlxsw_sp_port_swid_set(mlxsw_sp_port, 0);
2127 if (err) {
2128 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to set SWID\n",
2129 mlxsw_sp_port->local_port);
2130 goto err_port_swid_set;
2131 }
2132
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002133 err = mlxsw_sp_port_dev_addr_init(mlxsw_sp_port);
2134 if (err) {
2135 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Unable to init port mac address\n",
2136 mlxsw_sp_port->local_port);
2137 goto err_dev_addr_init;
2138 }
2139
2140 netif_carrier_off(dev);
2141
2142 dev->features |= NETIF_F_NETNS_LOCAL | NETIF_F_LLTX | NETIF_F_SG |
Yotam Gigi763b4b72016-07-21 12:03:17 +02002143 NETIF_F_HW_VLAN_CTAG_FILTER | NETIF_F_HW_TC;
2144 dev->hw_features |= NETIF_F_HW_TC;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002145
2146 /* Each packet needs to have a Tx header (metadata) on top all other
2147 * headers.
2148 */
2149 dev->hard_header_len += MLXSW_TXHDR_LEN;
2150
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002151 err = mlxsw_sp_port_system_port_mapping_set(mlxsw_sp_port);
2152 if (err) {
2153 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to set system port mapping\n",
2154 mlxsw_sp_port->local_port);
2155 goto err_port_system_port_mapping_set;
2156 }
2157
Ido Schimmel18f1e702016-02-26 17:32:31 +01002158 err = mlxsw_sp_port_speed_by_width_set(mlxsw_sp_port, width);
2159 if (err) {
2160 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to enable speeds\n",
2161 mlxsw_sp_port->local_port);
2162 goto err_port_speed_by_width_set;
2163 }
2164
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002165 err = mlxsw_sp_port_mtu_set(mlxsw_sp_port, ETH_DATA_LEN);
2166 if (err) {
2167 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to set MTU\n",
2168 mlxsw_sp_port->local_port);
2169 goto err_port_mtu_set;
2170 }
2171
2172 err = mlxsw_sp_port_admin_status_set(mlxsw_sp_port, false);
2173 if (err)
2174 goto err_port_admin_status_set;
2175
2176 err = mlxsw_sp_port_buffers_init(mlxsw_sp_port);
2177 if (err) {
2178 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to initialize buffers\n",
2179 mlxsw_sp_port->local_port);
2180 goto err_port_buffers_init;
2181 }
2182
Ido Schimmel90183b92016-04-06 17:10:08 +02002183 err = mlxsw_sp_port_ets_init(mlxsw_sp_port);
2184 if (err) {
2185 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to initialize ETS\n",
2186 mlxsw_sp_port->local_port);
2187 goto err_port_ets_init;
2188 }
2189
Ido Schimmelf00817d2016-04-06 17:10:09 +02002190 /* ETS and buffers must be initialized before DCB. */
2191 err = mlxsw_sp_port_dcb_init(mlxsw_sp_port);
2192 if (err) {
2193 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to initialize DCB\n",
2194 mlxsw_sp_port->local_port);
2195 goto err_port_dcb_init;
2196 }
2197
Ido Schimmel05978482016-08-17 16:39:30 +02002198 err = mlxsw_sp_port_pvid_vport_create(mlxsw_sp_port);
2199 if (err) {
2200 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to create PVID vPort\n",
2201 mlxsw_sp_port->local_port);
2202 goto err_port_pvid_vport_create;
2203 }
2204
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002205 mlxsw_sp_port_switchdev_init(mlxsw_sp_port);
Ido Schimmel2f258442016-08-17 16:39:31 +02002206 mlxsw_sp->ports[local_port] = mlxsw_sp_port;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002207 err = register_netdev(dev);
2208 if (err) {
2209 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to register netdev\n",
2210 mlxsw_sp_port->local_port);
2211 goto err_register_netdev;
2212 }
2213
Jiri Pirko932762b2016-04-08 19:11:21 +02002214 err = mlxsw_core_port_init(mlxsw_sp->core, &mlxsw_sp_port->core_port,
2215 mlxsw_sp_port->local_port, dev,
2216 mlxsw_sp_port->split, module);
2217 if (err) {
2218 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to init core port\n",
2219 mlxsw_sp_port->local_port);
2220 goto err_core_port_init;
2221 }
Jiri Pirkoc4745502016-02-26 17:32:26 +01002222
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002223 return 0;
2224
Jiri Pirko932762b2016-04-08 19:11:21 +02002225err_core_port_init:
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002226 unregister_netdev(dev);
2227err_register_netdev:
Ido Schimmel2f258442016-08-17 16:39:31 +02002228 mlxsw_sp->ports[local_port] = NULL;
Ido Schimmel05832722016-08-17 16:39:35 +02002229 mlxsw_sp_port_switchdev_fini(mlxsw_sp_port);
Ido Schimmel05978482016-08-17 16:39:30 +02002230 mlxsw_sp_port_pvid_vport_destroy(mlxsw_sp_port);
2231err_port_pvid_vport_create:
Ido Schimmel4de34eb2016-08-04 17:36:22 +03002232 mlxsw_sp_port_dcb_fini(mlxsw_sp_port);
Ido Schimmelf00817d2016-04-06 17:10:09 +02002233err_port_dcb_init:
Ido Schimmel90183b92016-04-06 17:10:08 +02002234err_port_ets_init:
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002235err_port_buffers_init:
2236err_port_admin_status_set:
2237err_port_mtu_set:
Ido Schimmel18f1e702016-02-26 17:32:31 +01002238err_port_speed_by_width_set:
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002239err_port_system_port_mapping_set:
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002240err_dev_addr_init:
Ido Schimmel3247ff22016-09-08 08:16:02 +02002241 mlxsw_sp_port_swid_set(mlxsw_sp_port, MLXSW_PORT_SWID_DISABLED_PORT);
2242err_port_swid_set:
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002243 free_percpu(mlxsw_sp_port->pcpu_stats);
2244err_alloc_stats:
Elad Razfc1273a2016-01-06 13:01:11 +01002245 kfree(mlxsw_sp_port->untagged_vlans);
2246err_port_untagged_vlans_alloc:
Ido Schimmelbd40e9d2015-12-15 16:03:36 +01002247 kfree(mlxsw_sp_port->active_vlans);
2248err_port_active_vlans_alloc:
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002249 free_netdev(dev);
2250 return err;
2251}
2252
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002253static void mlxsw_sp_port_remove(struct mlxsw_sp *mlxsw_sp, u8 local_port)
2254{
2255 struct mlxsw_sp_port *mlxsw_sp_port = mlxsw_sp->ports[local_port];
2256
2257 if (!mlxsw_sp_port)
2258 return;
Jiri Pirko932762b2016-04-08 19:11:21 +02002259 mlxsw_core_port_fini(&mlxsw_sp_port->core_port);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002260 unregister_netdev(mlxsw_sp_port->dev); /* This calls ndo_stop */
Ido Schimmel2f258442016-08-17 16:39:31 +02002261 mlxsw_sp->ports[local_port] = NULL;
Ido Schimmel05832722016-08-17 16:39:35 +02002262 mlxsw_sp_port_switchdev_fini(mlxsw_sp_port);
Ido Schimmel05978482016-08-17 16:39:30 +02002263 mlxsw_sp_port_pvid_vport_destroy(mlxsw_sp_port);
Ido Schimmelf00817d2016-04-06 17:10:09 +02002264 mlxsw_sp_port_dcb_fini(mlxsw_sp_port);
Ido Schimmel3e9b27b2016-02-26 17:32:28 +01002265 mlxsw_sp_port_swid_set(mlxsw_sp_port, MLXSW_PORT_SWID_DISABLED_PORT);
2266 mlxsw_sp_port_module_unmap(mlxsw_sp, mlxsw_sp_port->local_port);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002267 free_percpu(mlxsw_sp_port->pcpu_stats);
Elad Razfc1273a2016-01-06 13:01:11 +01002268 kfree(mlxsw_sp_port->untagged_vlans);
Ido Schimmelbd40e9d2015-12-15 16:03:36 +01002269 kfree(mlxsw_sp_port->active_vlans);
Ido Schimmel32d863f2016-07-02 11:00:10 +02002270 WARN_ON_ONCE(!list_empty(&mlxsw_sp_port->vports_list));
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002271 free_netdev(mlxsw_sp_port->dev);
2272}
2273
2274static void mlxsw_sp_ports_remove(struct mlxsw_sp *mlxsw_sp)
2275{
2276 int i;
2277
2278 for (i = 1; i < MLXSW_PORT_MAX_PORTS; i++)
2279 mlxsw_sp_port_remove(mlxsw_sp, i);
2280 kfree(mlxsw_sp->ports);
2281}
2282
2283static int mlxsw_sp_ports_create(struct mlxsw_sp *mlxsw_sp)
2284{
Ido Schimmeld664b412016-06-09 09:51:40 +02002285 u8 module, width, lane;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002286 size_t alloc_size;
2287 int i;
2288 int err;
2289
2290 alloc_size = sizeof(struct mlxsw_sp_port *) * MLXSW_PORT_MAX_PORTS;
2291 mlxsw_sp->ports = kzalloc(alloc_size, GFP_KERNEL);
2292 if (!mlxsw_sp->ports)
2293 return -ENOMEM;
2294
2295 for (i = 1; i < MLXSW_PORT_MAX_PORTS; i++) {
Ido Schimmel558c2d52016-02-26 17:32:29 +01002296 err = mlxsw_sp_port_module_info_get(mlxsw_sp, i, &module,
Ido Schimmeld664b412016-06-09 09:51:40 +02002297 &width, &lane);
Ido Schimmel558c2d52016-02-26 17:32:29 +01002298 if (err)
2299 goto err_port_module_info_get;
2300 if (!width)
2301 continue;
2302 mlxsw_sp->port_to_module[i] = module;
Ido Schimmeld664b412016-06-09 09:51:40 +02002303 err = mlxsw_sp_port_create(mlxsw_sp, i, false, module, width,
2304 lane);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002305 if (err)
2306 goto err_port_create;
2307 }
2308 return 0;
2309
2310err_port_create:
Ido Schimmel558c2d52016-02-26 17:32:29 +01002311err_port_module_info_get:
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002312 for (i--; i >= 1; i--)
2313 mlxsw_sp_port_remove(mlxsw_sp, i);
2314 kfree(mlxsw_sp->ports);
2315 return err;
2316}
2317
Ido Schimmel18f1e702016-02-26 17:32:31 +01002318static u8 mlxsw_sp_cluster_base_port_get(u8 local_port)
2319{
2320 u8 offset = (local_port - 1) % MLXSW_SP_PORTS_PER_CLUSTER_MAX;
2321
2322 return local_port - offset;
2323}
2324
Ido Schimmelbe945352016-06-09 09:51:39 +02002325static int mlxsw_sp_port_split_create(struct mlxsw_sp *mlxsw_sp, u8 base_port,
2326 u8 module, unsigned int count)
2327{
2328 u8 width = MLXSW_PORT_MODULE_MAX_WIDTH / count;
2329 int err, i;
2330
2331 for (i = 0; i < count; i++) {
2332 err = mlxsw_sp_port_module_map(mlxsw_sp, base_port + i, module,
2333 width, i * width);
2334 if (err)
2335 goto err_port_module_map;
2336 }
2337
2338 for (i = 0; i < count; i++) {
2339 err = __mlxsw_sp_port_swid_set(mlxsw_sp, base_port + i, 0);
2340 if (err)
2341 goto err_port_swid_set;
2342 }
2343
2344 for (i = 0; i < count; i++) {
2345 err = mlxsw_sp_port_create(mlxsw_sp, base_port + i, true,
Ido Schimmeld664b412016-06-09 09:51:40 +02002346 module, width, i * width);
Ido Schimmelbe945352016-06-09 09:51:39 +02002347 if (err)
2348 goto err_port_create;
2349 }
2350
2351 return 0;
2352
2353err_port_create:
2354 for (i--; i >= 0; i--)
2355 mlxsw_sp_port_remove(mlxsw_sp, base_port + i);
2356 i = count;
2357err_port_swid_set:
2358 for (i--; i >= 0; i--)
2359 __mlxsw_sp_port_swid_set(mlxsw_sp, base_port + i,
2360 MLXSW_PORT_SWID_DISABLED_PORT);
2361 i = count;
2362err_port_module_map:
2363 for (i--; i >= 0; i--)
2364 mlxsw_sp_port_module_unmap(mlxsw_sp, base_port + i);
2365 return err;
2366}
2367
2368static void mlxsw_sp_port_unsplit_create(struct mlxsw_sp *mlxsw_sp,
2369 u8 base_port, unsigned int count)
2370{
2371 u8 local_port, module, width = MLXSW_PORT_MODULE_MAX_WIDTH;
2372 int i;
2373
2374 /* Split by four means we need to re-create two ports, otherwise
2375 * only one.
2376 */
2377 count = count / 2;
2378
2379 for (i = 0; i < count; i++) {
2380 local_port = base_port + i * 2;
2381 module = mlxsw_sp->port_to_module[local_port];
2382
2383 mlxsw_sp_port_module_map(mlxsw_sp, local_port, module, width,
2384 0);
2385 }
2386
2387 for (i = 0; i < count; i++)
2388 __mlxsw_sp_port_swid_set(mlxsw_sp, base_port + i * 2, 0);
2389
2390 for (i = 0; i < count; i++) {
2391 local_port = base_port + i * 2;
2392 module = mlxsw_sp->port_to_module[local_port];
2393
2394 mlxsw_sp_port_create(mlxsw_sp, local_port, false, module,
Ido Schimmeld664b412016-06-09 09:51:40 +02002395 width, 0);
Ido Schimmelbe945352016-06-09 09:51:39 +02002396 }
2397}
2398
Jiri Pirkob2f10572016-04-08 19:11:23 +02002399static int mlxsw_sp_port_split(struct mlxsw_core *mlxsw_core, u8 local_port,
2400 unsigned int count)
Ido Schimmel18f1e702016-02-26 17:32:31 +01002401{
Jiri Pirkob2f10572016-04-08 19:11:23 +02002402 struct mlxsw_sp *mlxsw_sp = mlxsw_core_driver_priv(mlxsw_core);
Ido Schimmel18f1e702016-02-26 17:32:31 +01002403 struct mlxsw_sp_port *mlxsw_sp_port;
Ido Schimmel18f1e702016-02-26 17:32:31 +01002404 u8 module, cur_width, base_port;
2405 int i;
2406 int err;
2407
2408 mlxsw_sp_port = mlxsw_sp->ports[local_port];
2409 if (!mlxsw_sp_port) {
2410 dev_err(mlxsw_sp->bus_info->dev, "Port number \"%d\" does not exist\n",
2411 local_port);
2412 return -EINVAL;
2413 }
2414
Ido Schimmeld664b412016-06-09 09:51:40 +02002415 module = mlxsw_sp_port->mapping.module;
2416 cur_width = mlxsw_sp_port->mapping.width;
2417
Ido Schimmel18f1e702016-02-26 17:32:31 +01002418 if (count != 2 && count != 4) {
2419 netdev_err(mlxsw_sp_port->dev, "Port can only be split into 2 or 4 ports\n");
2420 return -EINVAL;
2421 }
2422
Ido Schimmel18f1e702016-02-26 17:32:31 +01002423 if (cur_width != MLXSW_PORT_MODULE_MAX_WIDTH) {
2424 netdev_err(mlxsw_sp_port->dev, "Port cannot be split further\n");
2425 return -EINVAL;
2426 }
2427
2428 /* Make sure we have enough slave (even) ports for the split. */
2429 if (count == 2) {
2430 base_port = local_port;
2431 if (mlxsw_sp->ports[base_port + 1]) {
2432 netdev_err(mlxsw_sp_port->dev, "Invalid split configuration\n");
2433 return -EINVAL;
2434 }
2435 } else {
2436 base_port = mlxsw_sp_cluster_base_port_get(local_port);
2437 if (mlxsw_sp->ports[base_port + 1] ||
2438 mlxsw_sp->ports[base_port + 3]) {
2439 netdev_err(mlxsw_sp_port->dev, "Invalid split configuration\n");
2440 return -EINVAL;
2441 }
2442 }
2443
2444 for (i = 0; i < count; i++)
2445 mlxsw_sp_port_remove(mlxsw_sp, base_port + i);
2446
Ido Schimmelbe945352016-06-09 09:51:39 +02002447 err = mlxsw_sp_port_split_create(mlxsw_sp, base_port, module, count);
2448 if (err) {
2449 dev_err(mlxsw_sp->bus_info->dev, "Failed to create split ports\n");
2450 goto err_port_split_create;
Ido Schimmel18f1e702016-02-26 17:32:31 +01002451 }
2452
2453 return 0;
2454
Ido Schimmelbe945352016-06-09 09:51:39 +02002455err_port_split_create:
2456 mlxsw_sp_port_unsplit_create(mlxsw_sp, base_port, count);
Ido Schimmel18f1e702016-02-26 17:32:31 +01002457 return err;
2458}
2459
Jiri Pirkob2f10572016-04-08 19:11:23 +02002460static int mlxsw_sp_port_unsplit(struct mlxsw_core *mlxsw_core, u8 local_port)
Ido Schimmel18f1e702016-02-26 17:32:31 +01002461{
Jiri Pirkob2f10572016-04-08 19:11:23 +02002462 struct mlxsw_sp *mlxsw_sp = mlxsw_core_driver_priv(mlxsw_core);
Ido Schimmel18f1e702016-02-26 17:32:31 +01002463 struct mlxsw_sp_port *mlxsw_sp_port;
Ido Schimmeld664b412016-06-09 09:51:40 +02002464 u8 cur_width, base_port;
Ido Schimmel18f1e702016-02-26 17:32:31 +01002465 unsigned int count;
2466 int i;
Ido Schimmel18f1e702016-02-26 17:32:31 +01002467
2468 mlxsw_sp_port = mlxsw_sp->ports[local_port];
2469 if (!mlxsw_sp_port) {
2470 dev_err(mlxsw_sp->bus_info->dev, "Port number \"%d\" does not exist\n",
2471 local_port);
2472 return -EINVAL;
2473 }
2474
2475 if (!mlxsw_sp_port->split) {
2476 netdev_err(mlxsw_sp_port->dev, "Port wasn't split\n");
2477 return -EINVAL;
2478 }
2479
Ido Schimmeld664b412016-06-09 09:51:40 +02002480 cur_width = mlxsw_sp_port->mapping.width;
Ido Schimmel18f1e702016-02-26 17:32:31 +01002481 count = cur_width == 1 ? 4 : 2;
2482
2483 base_port = mlxsw_sp_cluster_base_port_get(local_port);
2484
2485 /* Determine which ports to remove. */
2486 if (count == 2 && local_port >= base_port + 2)
2487 base_port = base_port + 2;
2488
2489 for (i = 0; i < count; i++)
2490 mlxsw_sp_port_remove(mlxsw_sp, base_port + i);
2491
Ido Schimmelbe945352016-06-09 09:51:39 +02002492 mlxsw_sp_port_unsplit_create(mlxsw_sp, base_port, count);
Ido Schimmel18f1e702016-02-26 17:32:31 +01002493
2494 return 0;
2495}
2496
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002497static void mlxsw_sp_pude_event_func(const struct mlxsw_reg_info *reg,
2498 char *pude_pl, void *priv)
2499{
2500 struct mlxsw_sp *mlxsw_sp = priv;
2501 struct mlxsw_sp_port *mlxsw_sp_port;
2502 enum mlxsw_reg_pude_oper_status status;
2503 u8 local_port;
2504
2505 local_port = mlxsw_reg_pude_local_port_get(pude_pl);
2506 mlxsw_sp_port = mlxsw_sp->ports[local_port];
Ido Schimmelbbf2a472016-07-02 11:00:14 +02002507 if (!mlxsw_sp_port)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002508 return;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002509
2510 status = mlxsw_reg_pude_oper_status_get(pude_pl);
2511 if (status == MLXSW_PORT_OPER_STATUS_UP) {
2512 netdev_info(mlxsw_sp_port->dev, "link up\n");
2513 netif_carrier_on(mlxsw_sp_port->dev);
2514 } else {
2515 netdev_info(mlxsw_sp_port->dev, "link down\n");
2516 netif_carrier_off(mlxsw_sp_port->dev);
2517 }
2518}
2519
2520static struct mlxsw_event_listener mlxsw_sp_pude_event = {
2521 .func = mlxsw_sp_pude_event_func,
2522 .trap_id = MLXSW_TRAP_ID_PUDE,
2523};
2524
2525static int mlxsw_sp_event_register(struct mlxsw_sp *mlxsw_sp,
2526 enum mlxsw_event_trap_id trap_id)
2527{
2528 struct mlxsw_event_listener *el;
2529 char hpkt_pl[MLXSW_REG_HPKT_LEN];
2530 int err;
2531
2532 switch (trap_id) {
2533 case MLXSW_TRAP_ID_PUDE:
2534 el = &mlxsw_sp_pude_event;
2535 break;
2536 }
2537 err = mlxsw_core_event_listener_register(mlxsw_sp->core, el, mlxsw_sp);
2538 if (err)
2539 return err;
2540
2541 mlxsw_reg_hpkt_pack(hpkt_pl, MLXSW_REG_HPKT_ACTION_FORWARD, trap_id);
2542 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(hpkt), hpkt_pl);
2543 if (err)
2544 goto err_event_trap_set;
2545
2546 return 0;
2547
2548err_event_trap_set:
2549 mlxsw_core_event_listener_unregister(mlxsw_sp->core, el, mlxsw_sp);
2550 return err;
2551}
2552
2553static void mlxsw_sp_event_unregister(struct mlxsw_sp *mlxsw_sp,
2554 enum mlxsw_event_trap_id trap_id)
2555{
2556 struct mlxsw_event_listener *el;
2557
2558 switch (trap_id) {
2559 case MLXSW_TRAP_ID_PUDE:
2560 el = &mlxsw_sp_pude_event;
2561 break;
2562 }
2563 mlxsw_core_event_listener_unregister(mlxsw_sp->core, el, mlxsw_sp);
2564}
2565
2566static void mlxsw_sp_rx_listener_func(struct sk_buff *skb, u8 local_port,
2567 void *priv)
2568{
2569 struct mlxsw_sp *mlxsw_sp = priv;
2570 struct mlxsw_sp_port *mlxsw_sp_port = mlxsw_sp->ports[local_port];
2571 struct mlxsw_sp_port_pcpu_stats *pcpu_stats;
2572
2573 if (unlikely(!mlxsw_sp_port)) {
2574 dev_warn_ratelimited(mlxsw_sp->bus_info->dev, "Port %d: skb received for non-existent port\n",
2575 local_port);
2576 return;
2577 }
2578
2579 skb->dev = mlxsw_sp_port->dev;
2580
2581 pcpu_stats = this_cpu_ptr(mlxsw_sp_port->pcpu_stats);
2582 u64_stats_update_begin(&pcpu_stats->syncp);
2583 pcpu_stats->rx_packets++;
2584 pcpu_stats->rx_bytes += skb->len;
2585 u64_stats_update_end(&pcpu_stats->syncp);
2586
2587 skb->protocol = eth_type_trans(skb, skb->dev);
2588 netif_receive_skb(skb);
2589}
2590
Ido Schimmel1c6c6d22016-08-25 18:42:40 +02002591static void mlxsw_sp_rx_listener_mark_func(struct sk_buff *skb, u8 local_port,
2592 void *priv)
2593{
2594 skb->offload_fwd_mark = 1;
2595 return mlxsw_sp_rx_listener_func(skb, local_port, priv);
2596}
2597
Ido Schimmel63a81142016-08-25 18:42:39 +02002598#define MLXSW_SP_RXL(_func, _trap_id, _action) \
2599 { \
2600 .func = _func, \
2601 .local_port = MLXSW_PORT_DONT_CARE, \
2602 .trap_id = MLXSW_TRAP_ID_##_trap_id, \
2603 .action = MLXSW_REG_HPKT_ACTION_##_action, \
Ido Schimmel93393b32016-08-25 18:42:38 +02002604 }
2605
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002606static const struct mlxsw_rx_listener mlxsw_sp_rx_listener[] = {
Ido Schimmel63a81142016-08-25 18:42:39 +02002607 MLXSW_SP_RXL(mlxsw_sp_rx_listener_func, FDB_MC, TRAP_TO_CPU),
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002608 /* Traps for specific L2 packet types, not trapped as FDB MC */
Ido Schimmel63a81142016-08-25 18:42:39 +02002609 MLXSW_SP_RXL(mlxsw_sp_rx_listener_func, STP, TRAP_TO_CPU),
2610 MLXSW_SP_RXL(mlxsw_sp_rx_listener_func, LACP, TRAP_TO_CPU),
2611 MLXSW_SP_RXL(mlxsw_sp_rx_listener_func, EAPOL, TRAP_TO_CPU),
2612 MLXSW_SP_RXL(mlxsw_sp_rx_listener_func, LLDP, TRAP_TO_CPU),
2613 MLXSW_SP_RXL(mlxsw_sp_rx_listener_func, MMRP, TRAP_TO_CPU),
2614 MLXSW_SP_RXL(mlxsw_sp_rx_listener_func, MVRP, TRAP_TO_CPU),
2615 MLXSW_SP_RXL(mlxsw_sp_rx_listener_func, RPVST, TRAP_TO_CPU),
Ido Schimmel1c6c6d22016-08-25 18:42:40 +02002616 MLXSW_SP_RXL(mlxsw_sp_rx_listener_mark_func, DHCP, MIRROR_TO_CPU),
2617 MLXSW_SP_RXL(mlxsw_sp_rx_listener_mark_func, IGMP_QUERY, MIRROR_TO_CPU),
Ido Schimmel63a81142016-08-25 18:42:39 +02002618 MLXSW_SP_RXL(mlxsw_sp_rx_listener_func, IGMP_V1_REPORT, TRAP_TO_CPU),
2619 MLXSW_SP_RXL(mlxsw_sp_rx_listener_func, IGMP_V2_REPORT, TRAP_TO_CPU),
2620 MLXSW_SP_RXL(mlxsw_sp_rx_listener_func, IGMP_V2_LEAVE, TRAP_TO_CPU),
2621 MLXSW_SP_RXL(mlxsw_sp_rx_listener_func, IGMP_V3_REPORT, TRAP_TO_CPU),
Ido Schimmel1c6c6d22016-08-25 18:42:40 +02002622 MLXSW_SP_RXL(mlxsw_sp_rx_listener_mark_func, ARPBC, MIRROR_TO_CPU),
2623 MLXSW_SP_RXL(mlxsw_sp_rx_listener_mark_func, ARPUC, MIRROR_TO_CPU),
Ido Schimmel93393b32016-08-25 18:42:38 +02002624 /* L3 traps */
Ido Schimmel63a81142016-08-25 18:42:39 +02002625 MLXSW_SP_RXL(mlxsw_sp_rx_listener_func, MTUERROR, TRAP_TO_CPU),
2626 MLXSW_SP_RXL(mlxsw_sp_rx_listener_func, TTLERROR, TRAP_TO_CPU),
2627 MLXSW_SP_RXL(mlxsw_sp_rx_listener_func, LBERROR, TRAP_TO_CPU),
Ido Schimmel1c6c6d22016-08-25 18:42:40 +02002628 MLXSW_SP_RXL(mlxsw_sp_rx_listener_mark_func, OSPF, TRAP_TO_CPU),
Ido Schimmel63a81142016-08-25 18:42:39 +02002629 MLXSW_SP_RXL(mlxsw_sp_rx_listener_func, IP2ME, TRAP_TO_CPU),
2630 MLXSW_SP_RXL(mlxsw_sp_rx_listener_func, RTR_INGRESS0, TRAP_TO_CPU),
2631 MLXSW_SP_RXL(mlxsw_sp_rx_listener_func, HOST_MISS_IPV4, TRAP_TO_CPU),
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002632};
2633
2634static int mlxsw_sp_traps_init(struct mlxsw_sp *mlxsw_sp)
2635{
2636 char htgt_pl[MLXSW_REG_HTGT_LEN];
2637 char hpkt_pl[MLXSW_REG_HPKT_LEN];
2638 int i;
2639 int err;
2640
2641 mlxsw_reg_htgt_pack(htgt_pl, MLXSW_REG_HTGT_TRAP_GROUP_RX);
2642 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(htgt), htgt_pl);
2643 if (err)
2644 return err;
2645
2646 mlxsw_reg_htgt_pack(htgt_pl, MLXSW_REG_HTGT_TRAP_GROUP_CTRL);
2647 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(htgt), htgt_pl);
2648 if (err)
2649 return err;
2650
2651 for (i = 0; i < ARRAY_SIZE(mlxsw_sp_rx_listener); i++) {
2652 err = mlxsw_core_rx_listener_register(mlxsw_sp->core,
2653 &mlxsw_sp_rx_listener[i],
2654 mlxsw_sp);
2655 if (err)
2656 goto err_rx_listener_register;
2657
Ido Schimmel63a81142016-08-25 18:42:39 +02002658 mlxsw_reg_hpkt_pack(hpkt_pl, mlxsw_sp_rx_listener[i].action,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002659 mlxsw_sp_rx_listener[i].trap_id);
2660 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(hpkt), hpkt_pl);
2661 if (err)
2662 goto err_rx_trap_set;
2663 }
2664 return 0;
2665
2666err_rx_trap_set:
2667 mlxsw_core_rx_listener_unregister(mlxsw_sp->core,
2668 &mlxsw_sp_rx_listener[i],
2669 mlxsw_sp);
2670err_rx_listener_register:
2671 for (i--; i >= 0; i--) {
Ido Schimmel10f00aa2016-07-02 11:00:19 +02002672 mlxsw_reg_hpkt_pack(hpkt_pl, MLXSW_REG_HPKT_ACTION_DISCARD,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002673 mlxsw_sp_rx_listener[i].trap_id);
2674 mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(hpkt), hpkt_pl);
2675
2676 mlxsw_core_rx_listener_unregister(mlxsw_sp->core,
2677 &mlxsw_sp_rx_listener[i],
2678 mlxsw_sp);
2679 }
2680 return err;
2681}
2682
2683static void mlxsw_sp_traps_fini(struct mlxsw_sp *mlxsw_sp)
2684{
2685 char hpkt_pl[MLXSW_REG_HPKT_LEN];
2686 int i;
2687
2688 for (i = 0; i < ARRAY_SIZE(mlxsw_sp_rx_listener); i++) {
Ido Schimmel10f00aa2016-07-02 11:00:19 +02002689 mlxsw_reg_hpkt_pack(hpkt_pl, MLXSW_REG_HPKT_ACTION_DISCARD,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002690 mlxsw_sp_rx_listener[i].trap_id);
2691 mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(hpkt), hpkt_pl);
2692
2693 mlxsw_core_rx_listener_unregister(mlxsw_sp->core,
2694 &mlxsw_sp_rx_listener[i],
2695 mlxsw_sp);
2696 }
2697}
2698
2699static int __mlxsw_sp_flood_init(struct mlxsw_core *mlxsw_core,
2700 enum mlxsw_reg_sfgc_type type,
2701 enum mlxsw_reg_sfgc_bridge_type bridge_type)
2702{
2703 enum mlxsw_flood_table_type table_type;
2704 enum mlxsw_sp_flood_table flood_table;
2705 char sfgc_pl[MLXSW_REG_SFGC_LEN];
2706
Ido Schimmel19ae6122015-12-15 16:03:39 +01002707 if (bridge_type == MLXSW_REG_SFGC_BRIDGE_TYPE_VFID)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002708 table_type = MLXSW_REG_SFGC_TABLE_TYPE_FID;
Ido Schimmel19ae6122015-12-15 16:03:39 +01002709 else
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002710 table_type = MLXSW_REG_SFGC_TABLE_TYPE_FID_OFFEST;
Ido Schimmel19ae6122015-12-15 16:03:39 +01002711
2712 if (type == MLXSW_REG_SFGC_TYPE_UNKNOWN_UNICAST)
2713 flood_table = MLXSW_SP_FLOOD_TABLE_UC;
2714 else
2715 flood_table = MLXSW_SP_FLOOD_TABLE_BM;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002716
2717 mlxsw_reg_sfgc_pack(sfgc_pl, type, bridge_type, table_type,
2718 flood_table);
2719 return mlxsw_reg_write(mlxsw_core, MLXSW_REG(sfgc), sfgc_pl);
2720}
2721
2722static int mlxsw_sp_flood_init(struct mlxsw_sp *mlxsw_sp)
2723{
2724 int type, err;
2725
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002726 for (type = 0; type < MLXSW_REG_SFGC_TYPE_MAX; type++) {
2727 if (type == MLXSW_REG_SFGC_TYPE_RESERVED)
2728 continue;
2729
2730 err = __mlxsw_sp_flood_init(mlxsw_sp->core, type,
2731 MLXSW_REG_SFGC_BRIDGE_TYPE_VFID);
2732 if (err)
2733 return err;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002734
2735 err = __mlxsw_sp_flood_init(mlxsw_sp->core, type,
2736 MLXSW_REG_SFGC_BRIDGE_TYPE_1Q_FID);
2737 if (err)
2738 return err;
2739 }
2740
2741 return 0;
2742}
2743
Jiri Pirko0d65fc12015-12-03 12:12:28 +01002744static int mlxsw_sp_lag_init(struct mlxsw_sp *mlxsw_sp)
2745{
2746 char slcr_pl[MLXSW_REG_SLCR_LEN];
2747
2748 mlxsw_reg_slcr_pack(slcr_pl, MLXSW_REG_SLCR_LAG_HASH_SMAC |
2749 MLXSW_REG_SLCR_LAG_HASH_DMAC |
2750 MLXSW_REG_SLCR_LAG_HASH_ETHERTYPE |
2751 MLXSW_REG_SLCR_LAG_HASH_VLANID |
2752 MLXSW_REG_SLCR_LAG_HASH_SIP |
2753 MLXSW_REG_SLCR_LAG_HASH_DIP |
2754 MLXSW_REG_SLCR_LAG_HASH_SPORT |
2755 MLXSW_REG_SLCR_LAG_HASH_DPORT |
2756 MLXSW_REG_SLCR_LAG_HASH_IPPROTO);
2757 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(slcr), slcr_pl);
2758}
2759
Jiri Pirkob2f10572016-04-08 19:11:23 +02002760static int mlxsw_sp_init(struct mlxsw_core *mlxsw_core,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002761 const struct mlxsw_bus_info *mlxsw_bus_info)
2762{
Jiri Pirkob2f10572016-04-08 19:11:23 +02002763 struct mlxsw_sp *mlxsw_sp = mlxsw_core_driver_priv(mlxsw_core);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002764 int err;
2765
2766 mlxsw_sp->core = mlxsw_core;
2767 mlxsw_sp->bus_info = mlxsw_bus_info;
Ido Schimmel14d39462016-06-20 23:04:15 +02002768 INIT_LIST_HEAD(&mlxsw_sp->fids);
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02002769 INIT_LIST_HEAD(&mlxsw_sp->vfids.list);
Elad Raz3a49b4f2016-01-10 21:06:28 +01002770 INIT_LIST_HEAD(&mlxsw_sp->br_mids.list);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002771
2772 err = mlxsw_sp_base_mac_get(mlxsw_sp);
2773 if (err) {
2774 dev_err(mlxsw_sp->bus_info->dev, "Failed to get base mac\n");
2775 return err;
2776 }
2777
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002778 err = mlxsw_sp_event_register(mlxsw_sp, MLXSW_TRAP_ID_PUDE);
2779 if (err) {
2780 dev_err(mlxsw_sp->bus_info->dev, "Failed to register for PUDE events\n");
Ido Schimmelbbf2a472016-07-02 11:00:14 +02002781 return err;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002782 }
2783
2784 err = mlxsw_sp_traps_init(mlxsw_sp);
2785 if (err) {
2786 dev_err(mlxsw_sp->bus_info->dev, "Failed to set traps for RX\n");
2787 goto err_rx_listener_register;
2788 }
2789
2790 err = mlxsw_sp_flood_init(mlxsw_sp);
2791 if (err) {
2792 dev_err(mlxsw_sp->bus_info->dev, "Failed to initialize flood tables\n");
2793 goto err_flood_init;
2794 }
2795
2796 err = mlxsw_sp_buffers_init(mlxsw_sp);
2797 if (err) {
2798 dev_err(mlxsw_sp->bus_info->dev, "Failed to initialize buffers\n");
2799 goto err_buffers_init;
2800 }
2801
Jiri Pirko0d65fc12015-12-03 12:12:28 +01002802 err = mlxsw_sp_lag_init(mlxsw_sp);
2803 if (err) {
2804 dev_err(mlxsw_sp->bus_info->dev, "Failed to initialize LAG\n");
2805 goto err_lag_init;
2806 }
2807
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002808 err = mlxsw_sp_switchdev_init(mlxsw_sp);
2809 if (err) {
2810 dev_err(mlxsw_sp->bus_info->dev, "Failed to initialize switchdev\n");
2811 goto err_switchdev_init;
2812 }
2813
Ido Schimmel464dce12016-07-02 11:00:15 +02002814 err = mlxsw_sp_router_init(mlxsw_sp);
2815 if (err) {
2816 dev_err(mlxsw_sp->bus_info->dev, "Failed to initialize router\n");
2817 goto err_router_init;
2818 }
2819
Yotam Gigi763b4b72016-07-21 12:03:17 +02002820 err = mlxsw_sp_span_init(mlxsw_sp);
2821 if (err) {
2822 dev_err(mlxsw_sp->bus_info->dev, "Failed to init span system\n");
2823 goto err_span_init;
2824 }
2825
Ido Schimmelbbf2a472016-07-02 11:00:14 +02002826 err = mlxsw_sp_ports_create(mlxsw_sp);
2827 if (err) {
2828 dev_err(mlxsw_sp->bus_info->dev, "Failed to create ports\n");
2829 goto err_ports_create;
2830 }
2831
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002832 return 0;
2833
Ido Schimmelbbf2a472016-07-02 11:00:14 +02002834err_ports_create:
Yotam Gigi763b4b72016-07-21 12:03:17 +02002835 mlxsw_sp_span_fini(mlxsw_sp);
2836err_span_init:
Ido Schimmel464dce12016-07-02 11:00:15 +02002837 mlxsw_sp_router_fini(mlxsw_sp);
2838err_router_init:
Ido Schimmelbbf2a472016-07-02 11:00:14 +02002839 mlxsw_sp_switchdev_fini(mlxsw_sp);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002840err_switchdev_init:
Jiri Pirko0d65fc12015-12-03 12:12:28 +01002841err_lag_init:
Jiri Pirko0f433fa2016-04-14 18:19:24 +02002842 mlxsw_sp_buffers_fini(mlxsw_sp);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002843err_buffers_init:
2844err_flood_init:
2845 mlxsw_sp_traps_fini(mlxsw_sp);
2846err_rx_listener_register:
2847 mlxsw_sp_event_unregister(mlxsw_sp, MLXSW_TRAP_ID_PUDE);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002848 return err;
2849}
2850
Jiri Pirkob2f10572016-04-08 19:11:23 +02002851static void mlxsw_sp_fini(struct mlxsw_core *mlxsw_core)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002852{
Jiri Pirkob2f10572016-04-08 19:11:23 +02002853 struct mlxsw_sp *mlxsw_sp = mlxsw_core_driver_priv(mlxsw_core);
Ido Schimmelfa3054f2016-07-02 11:00:16 +02002854 int i;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002855
Ido Schimmelbbf2a472016-07-02 11:00:14 +02002856 mlxsw_sp_ports_remove(mlxsw_sp);
Yotam Gigi763b4b72016-07-21 12:03:17 +02002857 mlxsw_sp_span_fini(mlxsw_sp);
Ido Schimmel464dce12016-07-02 11:00:15 +02002858 mlxsw_sp_router_fini(mlxsw_sp);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002859 mlxsw_sp_switchdev_fini(mlxsw_sp);
Jiri Pirko5113bfd2016-05-06 22:20:59 +02002860 mlxsw_sp_buffers_fini(mlxsw_sp);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002861 mlxsw_sp_traps_fini(mlxsw_sp);
2862 mlxsw_sp_event_unregister(mlxsw_sp, MLXSW_TRAP_ID_PUDE);
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02002863 WARN_ON(!list_empty(&mlxsw_sp->vfids.list));
Ido Schimmel14d39462016-06-20 23:04:15 +02002864 WARN_ON(!list_empty(&mlxsw_sp->fids));
Ido Schimmelfa3054f2016-07-02 11:00:16 +02002865 for (i = 0; i < MLXSW_SP_RIF_MAX; i++)
2866 WARN_ON_ONCE(mlxsw_sp->rifs[i]);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002867}
2868
2869static struct mlxsw_config_profile mlxsw_sp_config_profile = {
2870 .used_max_vepa_channels = 1,
2871 .max_vepa_channels = 0,
2872 .used_max_lag = 1,
Jiri Pirko0d65fc12015-12-03 12:12:28 +01002873 .max_lag = MLXSW_SP_LAG_MAX,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002874 .used_max_port_per_lag = 1,
Jiri Pirko0d65fc12015-12-03 12:12:28 +01002875 .max_port_per_lag = MLXSW_SP_PORT_PER_LAG_MAX,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002876 .used_max_mid = 1,
Elad Raz53ae6282016-01-10 21:06:26 +01002877 .max_mid = MLXSW_SP_MID_MAX,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002878 .used_max_pgt = 1,
2879 .max_pgt = 0,
2880 .used_max_system_port = 1,
2881 .max_system_port = 64,
2882 .used_max_vlan_groups = 1,
2883 .max_vlan_groups = 127,
2884 .used_max_regions = 1,
2885 .max_regions = 400,
2886 .used_flood_tables = 1,
2887 .used_flood_mode = 1,
2888 .flood_mode = 3,
2889 .max_fid_offset_flood_tables = 2,
2890 .fid_offset_flood_table_size = VLAN_N_VID - 1,
Ido Schimmel19ae6122015-12-15 16:03:39 +01002891 .max_fid_flood_tables = 2,
2892 .fid_flood_table_size = MLXSW_SP_VFID_MAX,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002893 .used_max_ib_mc = 1,
2894 .max_ib_mc = 0,
2895 .used_max_pkey = 1,
2896 .max_pkey = 0,
Jiri Pirkoc6022422016-07-05 11:27:46 +02002897 .used_kvd_sizes = 1,
2898 .kvd_linear_size = MLXSW_SP_KVD_LINEAR_SIZE,
2899 .kvd_hash_single_size = MLXSW_SP_KVD_HASH_SINGLE_SIZE,
2900 .kvd_hash_double_size = MLXSW_SP_KVD_HASH_DOUBLE_SIZE,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002901 .swid_config = {
2902 {
2903 .used_type = 1,
2904 .type = MLXSW_PORT_SWID_TYPE_ETH,
2905 }
2906 },
Nogah Frankel57d316b2016-07-21 12:03:09 +02002907 .resource_query_enable = 1,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002908};
2909
2910static struct mlxsw_driver mlxsw_sp_driver = {
Jiri Pirko2d0ed392016-04-14 18:19:30 +02002911 .kind = MLXSW_DEVICE_KIND_SPECTRUM,
2912 .owner = THIS_MODULE,
2913 .priv_size = sizeof(struct mlxsw_sp),
2914 .init = mlxsw_sp_init,
2915 .fini = mlxsw_sp_fini,
2916 .port_split = mlxsw_sp_port_split,
2917 .port_unsplit = mlxsw_sp_port_unsplit,
2918 .sb_pool_get = mlxsw_sp_sb_pool_get,
2919 .sb_pool_set = mlxsw_sp_sb_pool_set,
2920 .sb_port_pool_get = mlxsw_sp_sb_port_pool_get,
2921 .sb_port_pool_set = mlxsw_sp_sb_port_pool_set,
2922 .sb_tc_pool_bind_get = mlxsw_sp_sb_tc_pool_bind_get,
2923 .sb_tc_pool_bind_set = mlxsw_sp_sb_tc_pool_bind_set,
2924 .sb_occ_snapshot = mlxsw_sp_sb_occ_snapshot,
2925 .sb_occ_max_clear = mlxsw_sp_sb_occ_max_clear,
2926 .sb_occ_port_pool_get = mlxsw_sp_sb_occ_port_pool_get,
2927 .sb_occ_tc_port_bind_get = mlxsw_sp_sb_occ_tc_port_bind_get,
2928 .txhdr_construct = mlxsw_sp_txhdr_construct,
2929 .txhdr_len = MLXSW_TXHDR_LEN,
2930 .profile = &mlxsw_sp_config_profile,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002931};
2932
Jiri Pirko7ce856a2016-07-04 08:23:12 +02002933static bool mlxsw_sp_port_dev_check(const struct net_device *dev)
2934{
2935 return dev->netdev_ops == &mlxsw_sp_port_netdev_ops;
2936}
2937
2938static struct mlxsw_sp_port *mlxsw_sp_port_dev_lower_find(struct net_device *dev)
2939{
2940 struct net_device *lower_dev;
2941 struct list_head *iter;
2942
2943 if (mlxsw_sp_port_dev_check(dev))
2944 return netdev_priv(dev);
2945
2946 netdev_for_each_all_lower_dev(dev, lower_dev, iter) {
2947 if (mlxsw_sp_port_dev_check(lower_dev))
2948 return netdev_priv(lower_dev);
2949 }
2950 return NULL;
2951}
2952
2953static struct mlxsw_sp *mlxsw_sp_lower_get(struct net_device *dev)
2954{
2955 struct mlxsw_sp_port *mlxsw_sp_port;
2956
2957 mlxsw_sp_port = mlxsw_sp_port_dev_lower_find(dev);
2958 return mlxsw_sp_port ? mlxsw_sp_port->mlxsw_sp : NULL;
2959}
2960
2961static struct mlxsw_sp_port *mlxsw_sp_port_dev_lower_find_rcu(struct net_device *dev)
2962{
2963 struct net_device *lower_dev;
2964 struct list_head *iter;
2965
2966 if (mlxsw_sp_port_dev_check(dev))
2967 return netdev_priv(dev);
2968
2969 netdev_for_each_all_lower_dev_rcu(dev, lower_dev, iter) {
2970 if (mlxsw_sp_port_dev_check(lower_dev))
2971 return netdev_priv(lower_dev);
2972 }
2973 return NULL;
2974}
2975
2976struct mlxsw_sp_port *mlxsw_sp_port_lower_dev_hold(struct net_device *dev)
2977{
2978 struct mlxsw_sp_port *mlxsw_sp_port;
2979
2980 rcu_read_lock();
2981 mlxsw_sp_port = mlxsw_sp_port_dev_lower_find_rcu(dev);
2982 if (mlxsw_sp_port)
2983 dev_hold(mlxsw_sp_port->dev);
2984 rcu_read_unlock();
2985 return mlxsw_sp_port;
2986}
2987
2988void mlxsw_sp_port_dev_put(struct mlxsw_sp_port *mlxsw_sp_port)
2989{
2990 dev_put(mlxsw_sp_port->dev);
2991}
2992
Ido Schimmel99724c12016-07-04 08:23:14 +02002993static bool mlxsw_sp_rif_should_config(struct mlxsw_sp_rif *r,
2994 unsigned long event)
2995{
2996 switch (event) {
2997 case NETDEV_UP:
2998 if (!r)
2999 return true;
3000 r->ref_count++;
3001 return false;
3002 case NETDEV_DOWN:
3003 if (r && --r->ref_count == 0)
3004 return true;
3005 /* It is possible we already removed the RIF ourselves
3006 * if it was assigned to a netdev that is now a bridge
3007 * or LAG slave.
3008 */
3009 return false;
3010 }
3011
3012 return false;
3013}
3014
3015static int mlxsw_sp_avail_rif_get(struct mlxsw_sp *mlxsw_sp)
3016{
3017 int i;
3018
3019 for (i = 0; i < MLXSW_SP_RIF_MAX; i++)
3020 if (!mlxsw_sp->rifs[i])
3021 return i;
3022
3023 return MLXSW_SP_RIF_MAX;
3024}
3025
3026static void mlxsw_sp_vport_rif_sp_attr_get(struct mlxsw_sp_port *mlxsw_sp_vport,
3027 bool *p_lagged, u16 *p_system_port)
3028{
3029 u8 local_port = mlxsw_sp_vport->local_port;
3030
3031 *p_lagged = mlxsw_sp_vport->lagged;
3032 *p_system_port = *p_lagged ? mlxsw_sp_vport->lag_id : local_port;
3033}
3034
3035static int mlxsw_sp_vport_rif_sp_op(struct mlxsw_sp_port *mlxsw_sp_vport,
3036 struct net_device *l3_dev, u16 rif,
3037 bool create)
3038{
3039 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_vport->mlxsw_sp;
3040 bool lagged = mlxsw_sp_vport->lagged;
3041 char ritr_pl[MLXSW_REG_RITR_LEN];
3042 u16 system_port;
3043
3044 mlxsw_reg_ritr_pack(ritr_pl, create, MLXSW_REG_RITR_SP_IF, rif,
3045 l3_dev->mtu, l3_dev->dev_addr);
3046
3047 mlxsw_sp_vport_rif_sp_attr_get(mlxsw_sp_vport, &lagged, &system_port);
3048 mlxsw_reg_ritr_sp_if_pack(ritr_pl, lagged, system_port,
3049 mlxsw_sp_vport_vid_get(mlxsw_sp_vport));
3050
3051 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ritr), ritr_pl);
3052}
3053
3054static void mlxsw_sp_vport_rif_sp_leave(struct mlxsw_sp_port *mlxsw_sp_vport);
3055
3056static struct mlxsw_sp_fid *
3057mlxsw_sp_rfid_alloc(u16 fid, struct net_device *l3_dev)
3058{
3059 struct mlxsw_sp_fid *f;
3060
3061 f = kzalloc(sizeof(*f), GFP_KERNEL);
3062 if (!f)
3063 return NULL;
3064
3065 f->leave = mlxsw_sp_vport_rif_sp_leave;
3066 f->ref_count = 0;
3067 f->dev = l3_dev;
3068 f->fid = fid;
3069
3070 return f;
3071}
3072
3073static struct mlxsw_sp_rif *
3074mlxsw_sp_rif_alloc(u16 rif, struct net_device *l3_dev, struct mlxsw_sp_fid *f)
3075{
3076 struct mlxsw_sp_rif *r;
3077
3078 r = kzalloc(sizeof(*r), GFP_KERNEL);
3079 if (!r)
3080 return NULL;
3081
3082 ether_addr_copy(r->addr, l3_dev->dev_addr);
3083 r->mtu = l3_dev->mtu;
3084 r->ref_count = 1;
3085 r->dev = l3_dev;
3086 r->rif = rif;
3087 r->f = f;
3088
3089 return r;
3090}
3091
3092static struct mlxsw_sp_rif *
3093mlxsw_sp_vport_rif_sp_create(struct mlxsw_sp_port *mlxsw_sp_vport,
3094 struct net_device *l3_dev)
3095{
3096 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_vport->mlxsw_sp;
3097 struct mlxsw_sp_fid *f;
3098 struct mlxsw_sp_rif *r;
3099 u16 fid, rif;
3100 int err;
3101
3102 rif = mlxsw_sp_avail_rif_get(mlxsw_sp);
3103 if (rif == MLXSW_SP_RIF_MAX)
3104 return ERR_PTR(-ERANGE);
3105
3106 err = mlxsw_sp_vport_rif_sp_op(mlxsw_sp_vport, l3_dev, rif, true);
3107 if (err)
3108 return ERR_PTR(err);
3109
3110 fid = mlxsw_sp_rif_sp_to_fid(rif);
3111 err = mlxsw_sp_rif_fdb_op(mlxsw_sp, l3_dev->dev_addr, fid, true);
3112 if (err)
3113 goto err_rif_fdb_op;
3114
3115 f = mlxsw_sp_rfid_alloc(fid, l3_dev);
3116 if (!f) {
3117 err = -ENOMEM;
3118 goto err_rfid_alloc;
3119 }
3120
3121 r = mlxsw_sp_rif_alloc(rif, l3_dev, f);
3122 if (!r) {
3123 err = -ENOMEM;
3124 goto err_rif_alloc;
3125 }
3126
3127 f->r = r;
3128 mlxsw_sp->rifs[rif] = r;
3129
3130 return r;
3131
3132err_rif_alloc:
3133 kfree(f);
3134err_rfid_alloc:
3135 mlxsw_sp_rif_fdb_op(mlxsw_sp, l3_dev->dev_addr, fid, false);
3136err_rif_fdb_op:
3137 mlxsw_sp_vport_rif_sp_op(mlxsw_sp_vport, l3_dev, rif, false);
3138 return ERR_PTR(err);
3139}
3140
3141static void mlxsw_sp_vport_rif_sp_destroy(struct mlxsw_sp_port *mlxsw_sp_vport,
3142 struct mlxsw_sp_rif *r)
3143{
3144 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_vport->mlxsw_sp;
3145 struct net_device *l3_dev = r->dev;
3146 struct mlxsw_sp_fid *f = r->f;
3147 u16 fid = f->fid;
3148 u16 rif = r->rif;
3149
3150 mlxsw_sp->rifs[rif] = NULL;
3151 f->r = NULL;
3152
3153 kfree(r);
3154
3155 kfree(f);
3156
3157 mlxsw_sp_rif_fdb_op(mlxsw_sp, l3_dev->dev_addr, fid, false);
3158
3159 mlxsw_sp_vport_rif_sp_op(mlxsw_sp_vport, l3_dev, rif, false);
3160}
3161
3162static int mlxsw_sp_vport_rif_sp_join(struct mlxsw_sp_port *mlxsw_sp_vport,
3163 struct net_device *l3_dev)
3164{
3165 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_vport->mlxsw_sp;
3166 struct mlxsw_sp_rif *r;
3167
3168 r = mlxsw_sp_rif_find_by_dev(mlxsw_sp, l3_dev);
3169 if (!r) {
3170 r = mlxsw_sp_vport_rif_sp_create(mlxsw_sp_vport, l3_dev);
3171 if (IS_ERR(r))
3172 return PTR_ERR(r);
3173 }
3174
3175 mlxsw_sp_vport_fid_set(mlxsw_sp_vport, r->f);
3176 r->f->ref_count++;
3177
3178 netdev_dbg(mlxsw_sp_vport->dev, "Joined FID=%d\n", r->f->fid);
3179
3180 return 0;
3181}
3182
3183static void mlxsw_sp_vport_rif_sp_leave(struct mlxsw_sp_port *mlxsw_sp_vport)
3184{
3185 struct mlxsw_sp_fid *f = mlxsw_sp_vport_fid_get(mlxsw_sp_vport);
3186
3187 netdev_dbg(mlxsw_sp_vport->dev, "Left FID=%d\n", f->fid);
3188
3189 mlxsw_sp_vport_fid_set(mlxsw_sp_vport, NULL);
3190 if (--f->ref_count == 0)
3191 mlxsw_sp_vport_rif_sp_destroy(mlxsw_sp_vport, f->r);
3192}
3193
3194static int mlxsw_sp_inetaddr_vport_event(struct net_device *l3_dev,
3195 struct net_device *port_dev,
3196 unsigned long event, u16 vid)
3197{
3198 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(port_dev);
3199 struct mlxsw_sp_port *mlxsw_sp_vport;
3200
3201 mlxsw_sp_vport = mlxsw_sp_port_vport_find(mlxsw_sp_port, vid);
3202 if (WARN_ON(!mlxsw_sp_vport))
3203 return -EINVAL;
3204
3205 switch (event) {
3206 case NETDEV_UP:
3207 return mlxsw_sp_vport_rif_sp_join(mlxsw_sp_vport, l3_dev);
3208 case NETDEV_DOWN:
3209 mlxsw_sp_vport_rif_sp_leave(mlxsw_sp_vport);
3210 break;
3211 }
3212
3213 return 0;
3214}
3215
3216static int mlxsw_sp_inetaddr_port_event(struct net_device *port_dev,
3217 unsigned long event)
3218{
3219 if (netif_is_bridge_port(port_dev) || netif_is_lag_port(port_dev))
3220 return 0;
3221
3222 return mlxsw_sp_inetaddr_vport_event(port_dev, port_dev, event, 1);
3223}
3224
3225static int __mlxsw_sp_inetaddr_lag_event(struct net_device *l3_dev,
3226 struct net_device *lag_dev,
3227 unsigned long event, u16 vid)
3228{
3229 struct net_device *port_dev;
3230 struct list_head *iter;
3231 int err;
3232
3233 netdev_for_each_lower_dev(lag_dev, port_dev, iter) {
3234 if (mlxsw_sp_port_dev_check(port_dev)) {
3235 err = mlxsw_sp_inetaddr_vport_event(l3_dev, port_dev,
3236 event, vid);
3237 if (err)
3238 return err;
3239 }
3240 }
3241
3242 return 0;
3243}
3244
3245static int mlxsw_sp_inetaddr_lag_event(struct net_device *lag_dev,
3246 unsigned long event)
3247{
3248 if (netif_is_bridge_port(lag_dev))
3249 return 0;
3250
3251 return __mlxsw_sp_inetaddr_lag_event(lag_dev, lag_dev, event, 1);
3252}
3253
Ido Schimmel99f44bb2016-07-04 08:23:17 +02003254static struct mlxsw_sp_fid *mlxsw_sp_bridge_fid_get(struct mlxsw_sp *mlxsw_sp,
3255 struct net_device *l3_dev)
3256{
3257 u16 fid;
3258
3259 if (is_vlan_dev(l3_dev))
3260 fid = vlan_dev_vlan_id(l3_dev);
3261 else if (mlxsw_sp->master_bridge.dev == l3_dev)
3262 fid = 1;
3263 else
3264 return mlxsw_sp_vfid_find(mlxsw_sp, l3_dev);
3265
3266 return mlxsw_sp_fid_find(mlxsw_sp, fid);
3267}
3268
Ido Schimmelf888f582016-08-24 11:18:51 +02003269static enum mlxsw_flood_table_type mlxsw_sp_flood_table_type_get(u16 fid)
3270{
3271 return mlxsw_sp_fid_is_vfid(fid) ? MLXSW_REG_SFGC_TABLE_TYPE_FID :
3272 MLXSW_REG_SFGC_TABLE_TYPE_FID_OFFEST;
3273}
3274
3275static u16 mlxsw_sp_flood_table_index_get(u16 fid)
3276{
3277 return mlxsw_sp_fid_is_vfid(fid) ? mlxsw_sp_fid_to_vfid(fid) : fid;
3278}
3279
3280static int mlxsw_sp_router_port_flood_set(struct mlxsw_sp *mlxsw_sp, u16 fid,
3281 bool set)
3282{
3283 enum mlxsw_flood_table_type table_type;
3284 char *sftr_pl;
3285 u16 index;
3286 int err;
3287
3288 sftr_pl = kmalloc(MLXSW_REG_SFTR_LEN, GFP_KERNEL);
3289 if (!sftr_pl)
3290 return -ENOMEM;
3291
3292 table_type = mlxsw_sp_flood_table_type_get(fid);
3293 index = mlxsw_sp_flood_table_index_get(fid);
3294 mlxsw_reg_sftr_pack(sftr_pl, MLXSW_SP_FLOOD_TABLE_BM, index, table_type,
3295 1, MLXSW_PORT_ROUTER_PORT, set);
3296 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sftr), sftr_pl);
3297
3298 kfree(sftr_pl);
3299 return err;
3300}
3301
Ido Schimmel99f44bb2016-07-04 08:23:17 +02003302static enum mlxsw_reg_ritr_if_type mlxsw_sp_rif_type_get(u16 fid)
3303{
3304 if (mlxsw_sp_fid_is_vfid(fid))
3305 return MLXSW_REG_RITR_FID_IF;
3306 else
3307 return MLXSW_REG_RITR_VLAN_IF;
3308}
3309
3310static int mlxsw_sp_rif_bridge_op(struct mlxsw_sp *mlxsw_sp,
3311 struct net_device *l3_dev,
3312 u16 fid, u16 rif,
3313 bool create)
3314{
3315 enum mlxsw_reg_ritr_if_type rif_type;
3316 char ritr_pl[MLXSW_REG_RITR_LEN];
3317
3318 rif_type = mlxsw_sp_rif_type_get(fid);
3319 mlxsw_reg_ritr_pack(ritr_pl, create, rif_type, rif, l3_dev->mtu,
3320 l3_dev->dev_addr);
3321 mlxsw_reg_ritr_fid_set(ritr_pl, rif_type, fid);
3322
3323 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ritr), ritr_pl);
3324}
3325
3326static int mlxsw_sp_rif_bridge_create(struct mlxsw_sp *mlxsw_sp,
3327 struct net_device *l3_dev,
3328 struct mlxsw_sp_fid *f)
3329{
3330 struct mlxsw_sp_rif *r;
3331 u16 rif;
3332 int err;
3333
3334 rif = mlxsw_sp_avail_rif_get(mlxsw_sp);
3335 if (rif == MLXSW_SP_RIF_MAX)
3336 return -ERANGE;
3337
Ido Schimmelf888f582016-08-24 11:18:51 +02003338 err = mlxsw_sp_router_port_flood_set(mlxsw_sp, f->fid, true);
Ido Schimmel99f44bb2016-07-04 08:23:17 +02003339 if (err)
3340 return err;
3341
Ido Schimmelf888f582016-08-24 11:18:51 +02003342 err = mlxsw_sp_rif_bridge_op(mlxsw_sp, l3_dev, f->fid, rif, true);
3343 if (err)
3344 goto err_rif_bridge_op;
3345
Ido Schimmel99f44bb2016-07-04 08:23:17 +02003346 err = mlxsw_sp_rif_fdb_op(mlxsw_sp, l3_dev->dev_addr, f->fid, true);
3347 if (err)
3348 goto err_rif_fdb_op;
3349
3350 r = mlxsw_sp_rif_alloc(rif, l3_dev, f);
3351 if (!r) {
3352 err = -ENOMEM;
3353 goto err_rif_alloc;
3354 }
3355
3356 f->r = r;
3357 mlxsw_sp->rifs[rif] = r;
3358
3359 netdev_dbg(l3_dev, "RIF=%d created\n", rif);
3360
3361 return 0;
3362
3363err_rif_alloc:
3364 mlxsw_sp_rif_fdb_op(mlxsw_sp, l3_dev->dev_addr, f->fid, false);
3365err_rif_fdb_op:
3366 mlxsw_sp_rif_bridge_op(mlxsw_sp, l3_dev, f->fid, rif, false);
Ido Schimmelf888f582016-08-24 11:18:51 +02003367err_rif_bridge_op:
3368 mlxsw_sp_router_port_flood_set(mlxsw_sp, f->fid, false);
Ido Schimmel99f44bb2016-07-04 08:23:17 +02003369 return err;
3370}
3371
3372void mlxsw_sp_rif_bridge_destroy(struct mlxsw_sp *mlxsw_sp,
3373 struct mlxsw_sp_rif *r)
3374{
3375 struct net_device *l3_dev = r->dev;
3376 struct mlxsw_sp_fid *f = r->f;
3377 u16 rif = r->rif;
3378
3379 mlxsw_sp->rifs[rif] = NULL;
3380 f->r = NULL;
3381
3382 kfree(r);
3383
3384 mlxsw_sp_rif_fdb_op(mlxsw_sp, l3_dev->dev_addr, f->fid, false);
3385
3386 mlxsw_sp_rif_bridge_op(mlxsw_sp, l3_dev, f->fid, rif, false);
3387
Ido Schimmelf888f582016-08-24 11:18:51 +02003388 mlxsw_sp_router_port_flood_set(mlxsw_sp, f->fid, false);
3389
Ido Schimmel99f44bb2016-07-04 08:23:17 +02003390 netdev_dbg(l3_dev, "RIF=%d destroyed\n", rif);
3391}
3392
3393static int mlxsw_sp_inetaddr_bridge_event(struct net_device *l3_dev,
3394 struct net_device *br_dev,
3395 unsigned long event)
3396{
3397 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_lower_get(l3_dev);
3398 struct mlxsw_sp_fid *f;
3399
3400 /* FID can either be an actual FID if the L3 device is the
3401 * VLAN-aware bridge or a VLAN device on top. Otherwise, the
3402 * L3 device is a VLAN-unaware bridge and we get a vFID.
3403 */
3404 f = mlxsw_sp_bridge_fid_get(mlxsw_sp, l3_dev);
3405 if (WARN_ON(!f))
3406 return -EINVAL;
3407
3408 switch (event) {
3409 case NETDEV_UP:
3410 return mlxsw_sp_rif_bridge_create(mlxsw_sp, l3_dev, f);
3411 case NETDEV_DOWN:
3412 mlxsw_sp_rif_bridge_destroy(mlxsw_sp, f->r);
3413 break;
3414 }
3415
3416 return 0;
3417}
3418
Ido Schimmel99724c12016-07-04 08:23:14 +02003419static int mlxsw_sp_inetaddr_vlan_event(struct net_device *vlan_dev,
3420 unsigned long event)
3421{
3422 struct net_device *real_dev = vlan_dev_real_dev(vlan_dev);
Ido Schimmel99f44bb2016-07-04 08:23:17 +02003423 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_lower_get(vlan_dev);
Ido Schimmel99724c12016-07-04 08:23:14 +02003424 u16 vid = vlan_dev_vlan_id(vlan_dev);
3425
3426 if (mlxsw_sp_port_dev_check(real_dev))
3427 return mlxsw_sp_inetaddr_vport_event(vlan_dev, real_dev, event,
3428 vid);
3429 else if (netif_is_lag_master(real_dev))
3430 return __mlxsw_sp_inetaddr_lag_event(vlan_dev, real_dev, event,
3431 vid);
Ido Schimmel99f44bb2016-07-04 08:23:17 +02003432 else if (netif_is_bridge_master(real_dev) &&
3433 mlxsw_sp->master_bridge.dev == real_dev)
3434 return mlxsw_sp_inetaddr_bridge_event(vlan_dev, real_dev,
3435 event);
Ido Schimmel99724c12016-07-04 08:23:14 +02003436
3437 return 0;
3438}
3439
3440static int mlxsw_sp_inetaddr_event(struct notifier_block *unused,
3441 unsigned long event, void *ptr)
3442{
3443 struct in_ifaddr *ifa = (struct in_ifaddr *) ptr;
3444 struct net_device *dev = ifa->ifa_dev->dev;
3445 struct mlxsw_sp *mlxsw_sp;
3446 struct mlxsw_sp_rif *r;
3447 int err = 0;
3448
3449 mlxsw_sp = mlxsw_sp_lower_get(dev);
3450 if (!mlxsw_sp)
3451 goto out;
3452
3453 r = mlxsw_sp_rif_find_by_dev(mlxsw_sp, dev);
3454 if (!mlxsw_sp_rif_should_config(r, event))
3455 goto out;
3456
3457 if (mlxsw_sp_port_dev_check(dev))
3458 err = mlxsw_sp_inetaddr_port_event(dev, event);
3459 else if (netif_is_lag_master(dev))
3460 err = mlxsw_sp_inetaddr_lag_event(dev, event);
Ido Schimmel99f44bb2016-07-04 08:23:17 +02003461 else if (netif_is_bridge_master(dev))
3462 err = mlxsw_sp_inetaddr_bridge_event(dev, dev, event);
Ido Schimmel99724c12016-07-04 08:23:14 +02003463 else if (is_vlan_dev(dev))
3464 err = mlxsw_sp_inetaddr_vlan_event(dev, event);
3465
3466out:
3467 return notifier_from_errno(err);
3468}
3469
Ido Schimmel6e095fd2016-07-04 08:23:13 +02003470static int mlxsw_sp_rif_edit(struct mlxsw_sp *mlxsw_sp, u16 rif,
3471 const char *mac, int mtu)
3472{
3473 char ritr_pl[MLXSW_REG_RITR_LEN];
3474 int err;
3475
3476 mlxsw_reg_ritr_rif_pack(ritr_pl, rif);
3477 err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(ritr), ritr_pl);
3478 if (err)
3479 return err;
3480
3481 mlxsw_reg_ritr_mtu_set(ritr_pl, mtu);
3482 mlxsw_reg_ritr_if_mac_memcpy_to(ritr_pl, mac);
3483 mlxsw_reg_ritr_op_set(ritr_pl, MLXSW_REG_RITR_RIF_CREATE);
3484 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ritr), ritr_pl);
3485}
3486
3487static int mlxsw_sp_netdevice_router_port_event(struct net_device *dev)
3488{
3489 struct mlxsw_sp *mlxsw_sp;
3490 struct mlxsw_sp_rif *r;
3491 int err;
3492
3493 mlxsw_sp = mlxsw_sp_lower_get(dev);
3494 if (!mlxsw_sp)
3495 return 0;
3496
3497 r = mlxsw_sp_rif_find_by_dev(mlxsw_sp, dev);
3498 if (!r)
3499 return 0;
3500
3501 err = mlxsw_sp_rif_fdb_op(mlxsw_sp, r->addr, r->f->fid, false);
3502 if (err)
3503 return err;
3504
3505 err = mlxsw_sp_rif_edit(mlxsw_sp, r->rif, dev->dev_addr, dev->mtu);
3506 if (err)
3507 goto err_rif_edit;
3508
3509 err = mlxsw_sp_rif_fdb_op(mlxsw_sp, dev->dev_addr, r->f->fid, true);
3510 if (err)
3511 goto err_rif_fdb_op;
3512
3513 ether_addr_copy(r->addr, dev->dev_addr);
3514 r->mtu = dev->mtu;
3515
3516 netdev_dbg(dev, "Updated RIF=%d\n", r->rif);
3517
3518 return 0;
3519
3520err_rif_fdb_op:
3521 mlxsw_sp_rif_edit(mlxsw_sp, r->rif, r->addr, r->mtu);
3522err_rif_edit:
3523 mlxsw_sp_rif_fdb_op(mlxsw_sp, r->addr, r->f->fid, true);
3524 return err;
3525}
3526
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02003527static bool mlxsw_sp_lag_port_fid_member(struct mlxsw_sp_port *lag_port,
3528 u16 fid)
3529{
3530 if (mlxsw_sp_fid_is_vfid(fid))
3531 return mlxsw_sp_port_vport_find_by_fid(lag_port, fid);
3532 else
3533 return test_bit(fid, lag_port->active_vlans);
3534}
3535
3536static bool mlxsw_sp_port_fdb_should_flush(struct mlxsw_sp_port *mlxsw_sp_port,
3537 u16 fid)
Ido Schimmel039c49a2016-01-27 15:20:18 +01003538{
3539 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02003540 u8 local_port = mlxsw_sp_port->local_port;
3541 u16 lag_id = mlxsw_sp_port->lag_id;
3542 int i, count = 0;
Ido Schimmel039c49a2016-01-27 15:20:18 +01003543
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02003544 if (!mlxsw_sp_port->lagged)
3545 return true;
Ido Schimmel039c49a2016-01-27 15:20:18 +01003546
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02003547 for (i = 0; i < MLXSW_SP_PORT_PER_LAG_MAX; i++) {
3548 struct mlxsw_sp_port *lag_port;
3549
3550 lag_port = mlxsw_sp_port_lagged_get(mlxsw_sp, lag_id, i);
3551 if (!lag_port || lag_port->local_port == local_port)
3552 continue;
3553 if (mlxsw_sp_lag_port_fid_member(lag_port, fid))
3554 count++;
3555 }
3556
3557 return !count;
Ido Schimmel039c49a2016-01-27 15:20:18 +01003558}
3559
3560static int
3561mlxsw_sp_port_fdb_flush_by_port_fid(const struct mlxsw_sp_port *mlxsw_sp_port,
3562 u16 fid)
3563{
3564 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
3565 char sfdf_pl[MLXSW_REG_SFDF_LEN];
3566
3567 mlxsw_reg_sfdf_pack(sfdf_pl, MLXSW_REG_SFDF_FLUSH_PER_PORT_AND_FID);
3568 mlxsw_reg_sfdf_fid_set(sfdf_pl, fid);
3569 mlxsw_reg_sfdf_port_fid_system_port_set(sfdf_pl,
3570 mlxsw_sp_port->local_port);
3571
Ido Schimmel22305372016-06-20 23:04:21 +02003572 netdev_dbg(mlxsw_sp_port->dev, "FDB flushed using Port=%d, FID=%d\n",
3573 mlxsw_sp_port->local_port, fid);
3574
Ido Schimmel039c49a2016-01-27 15:20:18 +01003575 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sfdf), sfdf_pl);
3576}
3577
3578static int
Ido Schimmel039c49a2016-01-27 15:20:18 +01003579mlxsw_sp_port_fdb_flush_by_lag_id_fid(const struct mlxsw_sp_port *mlxsw_sp_port,
3580 u16 fid)
3581{
3582 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
3583 char sfdf_pl[MLXSW_REG_SFDF_LEN];
3584
3585 mlxsw_reg_sfdf_pack(sfdf_pl, MLXSW_REG_SFDF_FLUSH_PER_LAG_AND_FID);
3586 mlxsw_reg_sfdf_fid_set(sfdf_pl, fid);
3587 mlxsw_reg_sfdf_lag_fid_lag_id_set(sfdf_pl, mlxsw_sp_port->lag_id);
3588
Ido Schimmel22305372016-06-20 23:04:21 +02003589 netdev_dbg(mlxsw_sp_port->dev, "FDB flushed using LAG ID=%d, FID=%d\n",
3590 mlxsw_sp_port->lag_id, fid);
3591
Ido Schimmel039c49a2016-01-27 15:20:18 +01003592 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sfdf), sfdf_pl);
3593}
3594
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02003595int mlxsw_sp_port_fdb_flush(struct mlxsw_sp_port *mlxsw_sp_port, u16 fid)
Ido Schimmel039c49a2016-01-27 15:20:18 +01003596{
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02003597 if (!mlxsw_sp_port_fdb_should_flush(mlxsw_sp_port, fid))
3598 return 0;
Ido Schimmel039c49a2016-01-27 15:20:18 +01003599
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02003600 if (mlxsw_sp_port->lagged)
3601 return mlxsw_sp_port_fdb_flush_by_lag_id_fid(mlxsw_sp_port,
Ido Schimmel039c49a2016-01-27 15:20:18 +01003602 fid);
3603 else
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02003604 return mlxsw_sp_port_fdb_flush_by_port_fid(mlxsw_sp_port, fid);
Ido Schimmel039c49a2016-01-27 15:20:18 +01003605}
3606
Ido Schimmel701b1862016-07-04 08:23:16 +02003607static void mlxsw_sp_master_bridge_gone_sync(struct mlxsw_sp *mlxsw_sp)
3608{
3609 struct mlxsw_sp_fid *f, *tmp;
3610
3611 list_for_each_entry_safe(f, tmp, &mlxsw_sp->fids, list)
3612 if (--f->ref_count == 0)
3613 mlxsw_sp_fid_destroy(mlxsw_sp, f);
3614 else
3615 WARN_ON_ONCE(1);
3616}
3617
Ido Schimmel7117a572016-06-20 23:04:06 +02003618static bool mlxsw_sp_master_bridge_check(struct mlxsw_sp *mlxsw_sp,
3619 struct net_device *br_dev)
3620{
3621 return !mlxsw_sp->master_bridge.dev ||
3622 mlxsw_sp->master_bridge.dev == br_dev;
3623}
3624
3625static void mlxsw_sp_master_bridge_inc(struct mlxsw_sp *mlxsw_sp,
3626 struct net_device *br_dev)
3627{
3628 mlxsw_sp->master_bridge.dev = br_dev;
3629 mlxsw_sp->master_bridge.ref_count++;
3630}
3631
3632static void mlxsw_sp_master_bridge_dec(struct mlxsw_sp *mlxsw_sp)
3633{
Ido Schimmel701b1862016-07-04 08:23:16 +02003634 if (--mlxsw_sp->master_bridge.ref_count == 0) {
Ido Schimmel7117a572016-06-20 23:04:06 +02003635 mlxsw_sp->master_bridge.dev = NULL;
Ido Schimmel701b1862016-07-04 08:23:16 +02003636 /* It's possible upper VLAN devices are still holding
3637 * references to underlying FIDs. Drop the reference
3638 * and release the resources if it was the last one.
3639 * If it wasn't, then something bad happened.
3640 */
3641 mlxsw_sp_master_bridge_gone_sync(mlxsw_sp);
3642 }
Ido Schimmel7117a572016-06-20 23:04:06 +02003643}
3644
3645static int mlxsw_sp_port_bridge_join(struct mlxsw_sp_port *mlxsw_sp_port,
3646 struct net_device *br_dev)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003647{
3648 struct net_device *dev = mlxsw_sp_port->dev;
3649 int err;
3650
3651 /* When port is not bridged untagged packets are tagged with
3652 * PVID=VID=1, thereby creating an implicit VLAN interface in
3653 * the device. Remove it and let bridge code take care of its
3654 * own VLANs.
3655 */
3656 err = mlxsw_sp_port_kill_vid(dev, 0, 1);
Ido Schimmel6c72a3d2016-01-04 10:42:26 +01003657 if (err)
3658 return err;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003659
Ido Schimmel7117a572016-06-20 23:04:06 +02003660 mlxsw_sp_master_bridge_inc(mlxsw_sp_port->mlxsw_sp, br_dev);
3661
Ido Schimmel6c72a3d2016-01-04 10:42:26 +01003662 mlxsw_sp_port->learning = 1;
3663 mlxsw_sp_port->learning_sync = 1;
3664 mlxsw_sp_port->uc_flood = 1;
3665 mlxsw_sp_port->bridged = 1;
3666
3667 return 0;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003668}
3669
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02003670static void mlxsw_sp_port_bridge_leave(struct mlxsw_sp_port *mlxsw_sp_port)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003671{
3672 struct net_device *dev = mlxsw_sp_port->dev;
Ido Schimmel5a8f4522016-01-04 10:42:25 +01003673
Ido Schimmel28a01d22016-02-18 11:30:02 +01003674 mlxsw_sp_port_pvid_set(mlxsw_sp_port, 1);
3675
Ido Schimmel7117a572016-06-20 23:04:06 +02003676 mlxsw_sp_master_bridge_dec(mlxsw_sp_port->mlxsw_sp);
3677
Ido Schimmel6c72a3d2016-01-04 10:42:26 +01003678 mlxsw_sp_port->learning = 0;
3679 mlxsw_sp_port->learning_sync = 0;
3680 mlxsw_sp_port->uc_flood = 0;
Ido Schimmel5a8f4522016-01-04 10:42:25 +01003681 mlxsw_sp_port->bridged = 0;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003682
3683 /* Add implicit VLAN interface in the device, so that untagged
3684 * packets will be classified to the default vFID.
3685 */
Ido Schimmel82e6db02016-06-20 23:04:04 +02003686 mlxsw_sp_port_add_vid(dev, 0, 1);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003687}
3688
Jiri Pirko0d65fc12015-12-03 12:12:28 +01003689static int mlxsw_sp_lag_create(struct mlxsw_sp *mlxsw_sp, u16 lag_id)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003690{
Jiri Pirko0d65fc12015-12-03 12:12:28 +01003691 char sldr_pl[MLXSW_REG_SLDR_LEN];
3692
3693 mlxsw_reg_sldr_lag_create_pack(sldr_pl, lag_id);
3694 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sldr), sldr_pl);
3695}
3696
3697static int mlxsw_sp_lag_destroy(struct mlxsw_sp *mlxsw_sp, u16 lag_id)
3698{
3699 char sldr_pl[MLXSW_REG_SLDR_LEN];
3700
3701 mlxsw_reg_sldr_lag_destroy_pack(sldr_pl, lag_id);
3702 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sldr), sldr_pl);
3703}
3704
3705static int mlxsw_sp_lag_col_port_add(struct mlxsw_sp_port *mlxsw_sp_port,
3706 u16 lag_id, u8 port_index)
3707{
3708 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
3709 char slcor_pl[MLXSW_REG_SLCOR_LEN];
3710
3711 mlxsw_reg_slcor_port_add_pack(slcor_pl, mlxsw_sp_port->local_port,
3712 lag_id, port_index);
3713 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(slcor), slcor_pl);
3714}
3715
3716static int mlxsw_sp_lag_col_port_remove(struct mlxsw_sp_port *mlxsw_sp_port,
3717 u16 lag_id)
3718{
3719 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
3720 char slcor_pl[MLXSW_REG_SLCOR_LEN];
3721
3722 mlxsw_reg_slcor_port_remove_pack(slcor_pl, mlxsw_sp_port->local_port,
3723 lag_id);
3724 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(slcor), slcor_pl);
3725}
3726
3727static int mlxsw_sp_lag_col_port_enable(struct mlxsw_sp_port *mlxsw_sp_port,
3728 u16 lag_id)
3729{
3730 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
3731 char slcor_pl[MLXSW_REG_SLCOR_LEN];
3732
3733 mlxsw_reg_slcor_col_enable_pack(slcor_pl, mlxsw_sp_port->local_port,
3734 lag_id);
3735 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(slcor), slcor_pl);
3736}
3737
3738static int mlxsw_sp_lag_col_port_disable(struct mlxsw_sp_port *mlxsw_sp_port,
3739 u16 lag_id)
3740{
3741 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
3742 char slcor_pl[MLXSW_REG_SLCOR_LEN];
3743
3744 mlxsw_reg_slcor_col_disable_pack(slcor_pl, mlxsw_sp_port->local_port,
3745 lag_id);
3746 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(slcor), slcor_pl);
3747}
3748
3749static int mlxsw_sp_lag_index_get(struct mlxsw_sp *mlxsw_sp,
3750 struct net_device *lag_dev,
3751 u16 *p_lag_id)
3752{
3753 struct mlxsw_sp_upper *lag;
3754 int free_lag_id = -1;
3755 int i;
3756
3757 for (i = 0; i < MLXSW_SP_LAG_MAX; i++) {
3758 lag = mlxsw_sp_lag_get(mlxsw_sp, i);
3759 if (lag->ref_count) {
3760 if (lag->dev == lag_dev) {
3761 *p_lag_id = i;
3762 return 0;
3763 }
3764 } else if (free_lag_id < 0) {
3765 free_lag_id = i;
3766 }
3767 }
3768 if (free_lag_id < 0)
3769 return -EBUSY;
3770 *p_lag_id = free_lag_id;
3771 return 0;
3772}
3773
3774static bool
3775mlxsw_sp_master_lag_check(struct mlxsw_sp *mlxsw_sp,
3776 struct net_device *lag_dev,
3777 struct netdev_lag_upper_info *lag_upper_info)
3778{
3779 u16 lag_id;
3780
3781 if (mlxsw_sp_lag_index_get(mlxsw_sp, lag_dev, &lag_id) != 0)
3782 return false;
3783 if (lag_upper_info->tx_type != NETDEV_LAG_TX_TYPE_HASH)
3784 return false;
3785 return true;
3786}
3787
3788static int mlxsw_sp_port_lag_index_get(struct mlxsw_sp *mlxsw_sp,
3789 u16 lag_id, u8 *p_port_index)
3790{
3791 int i;
3792
3793 for (i = 0; i < MLXSW_SP_PORT_PER_LAG_MAX; i++) {
3794 if (!mlxsw_sp_port_lagged_get(mlxsw_sp, lag_id, i)) {
3795 *p_port_index = i;
3796 return 0;
3797 }
3798 }
3799 return -EBUSY;
3800}
3801
Ido Schimmel86bf95b2016-07-02 11:00:11 +02003802static void
3803mlxsw_sp_port_pvid_vport_lag_join(struct mlxsw_sp_port *mlxsw_sp_port,
3804 u16 lag_id)
3805{
3806 struct mlxsw_sp_port *mlxsw_sp_vport;
Ido Schimmel11943ff2016-07-02 11:00:12 +02003807 struct mlxsw_sp_fid *f;
Ido Schimmel86bf95b2016-07-02 11:00:11 +02003808
3809 mlxsw_sp_vport = mlxsw_sp_port_vport_find(mlxsw_sp_port, 1);
3810 if (WARN_ON(!mlxsw_sp_vport))
3811 return;
3812
Ido Schimmel11943ff2016-07-02 11:00:12 +02003813 /* If vPort is assigned a RIF, then leave it since it's no
3814 * longer valid.
3815 */
3816 f = mlxsw_sp_vport_fid_get(mlxsw_sp_vport);
3817 if (f)
3818 f->leave(mlxsw_sp_vport);
3819
Ido Schimmel86bf95b2016-07-02 11:00:11 +02003820 mlxsw_sp_vport->lag_id = lag_id;
3821 mlxsw_sp_vport->lagged = 1;
3822}
3823
3824static void
3825mlxsw_sp_port_pvid_vport_lag_leave(struct mlxsw_sp_port *mlxsw_sp_port)
3826{
3827 struct mlxsw_sp_port *mlxsw_sp_vport;
Ido Schimmel11943ff2016-07-02 11:00:12 +02003828 struct mlxsw_sp_fid *f;
Ido Schimmel86bf95b2016-07-02 11:00:11 +02003829
3830 mlxsw_sp_vport = mlxsw_sp_port_vport_find(mlxsw_sp_port, 1);
3831 if (WARN_ON(!mlxsw_sp_vport))
3832 return;
3833
Ido Schimmel11943ff2016-07-02 11:00:12 +02003834 f = mlxsw_sp_vport_fid_get(mlxsw_sp_vport);
3835 if (f)
3836 f->leave(mlxsw_sp_vport);
3837
Ido Schimmel86bf95b2016-07-02 11:00:11 +02003838 mlxsw_sp_vport->lagged = 0;
3839}
3840
Jiri Pirko0d65fc12015-12-03 12:12:28 +01003841static int mlxsw_sp_port_lag_join(struct mlxsw_sp_port *mlxsw_sp_port,
3842 struct net_device *lag_dev)
3843{
3844 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
3845 struct mlxsw_sp_upper *lag;
3846 u16 lag_id;
3847 u8 port_index;
3848 int err;
3849
3850 err = mlxsw_sp_lag_index_get(mlxsw_sp, lag_dev, &lag_id);
3851 if (err)
3852 return err;
3853 lag = mlxsw_sp_lag_get(mlxsw_sp, lag_id);
3854 if (!lag->ref_count) {
3855 err = mlxsw_sp_lag_create(mlxsw_sp, lag_id);
3856 if (err)
3857 return err;
3858 lag->dev = lag_dev;
3859 }
3860
3861 err = mlxsw_sp_port_lag_index_get(mlxsw_sp, lag_id, &port_index);
3862 if (err)
3863 return err;
3864 err = mlxsw_sp_lag_col_port_add(mlxsw_sp_port, lag_id, port_index);
3865 if (err)
3866 goto err_col_port_add;
3867 err = mlxsw_sp_lag_col_port_enable(mlxsw_sp_port, lag_id);
3868 if (err)
3869 goto err_col_port_enable;
3870
3871 mlxsw_core_lag_mapping_set(mlxsw_sp->core, lag_id, port_index,
3872 mlxsw_sp_port->local_port);
3873 mlxsw_sp_port->lag_id = lag_id;
3874 mlxsw_sp_port->lagged = 1;
3875 lag->ref_count++;
Ido Schimmel86bf95b2016-07-02 11:00:11 +02003876
3877 mlxsw_sp_port_pvid_vport_lag_join(mlxsw_sp_port, lag_id);
3878
Jiri Pirko0d65fc12015-12-03 12:12:28 +01003879 return 0;
3880
Ido Schimmel51554db2016-05-06 22:18:39 +02003881err_col_port_enable:
3882 mlxsw_sp_lag_col_port_remove(mlxsw_sp_port, lag_id);
Jiri Pirko0d65fc12015-12-03 12:12:28 +01003883err_col_port_add:
3884 if (!lag->ref_count)
3885 mlxsw_sp_lag_destroy(mlxsw_sp, lag_id);
Jiri Pirko0d65fc12015-12-03 12:12:28 +01003886 return err;
3887}
3888
Ido Schimmel82e6db02016-06-20 23:04:04 +02003889static void mlxsw_sp_port_lag_leave(struct mlxsw_sp_port *mlxsw_sp_port,
3890 struct net_device *lag_dev)
Jiri Pirko0d65fc12015-12-03 12:12:28 +01003891{
3892 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
Jiri Pirko0d65fc12015-12-03 12:12:28 +01003893 u16 lag_id = mlxsw_sp_port->lag_id;
Ido Schimmel1c800752016-06-20 23:04:20 +02003894 struct mlxsw_sp_upper *lag;
Jiri Pirko0d65fc12015-12-03 12:12:28 +01003895
3896 if (!mlxsw_sp_port->lagged)
Ido Schimmel82e6db02016-06-20 23:04:04 +02003897 return;
Jiri Pirko0d65fc12015-12-03 12:12:28 +01003898 lag = mlxsw_sp_lag_get(mlxsw_sp, lag_id);
3899 WARN_ON(lag->ref_count == 0);
3900
Ido Schimmel82e6db02016-06-20 23:04:04 +02003901 mlxsw_sp_lag_col_port_disable(mlxsw_sp_port, lag_id);
3902 mlxsw_sp_lag_col_port_remove(mlxsw_sp_port, lag_id);
Jiri Pirko0d65fc12015-12-03 12:12:28 +01003903
Ido Schimmel4dc236c2016-01-27 15:20:16 +01003904 if (mlxsw_sp_port->bridged) {
3905 mlxsw_sp_port_active_vlans_del(mlxsw_sp_port);
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02003906 mlxsw_sp_port_bridge_leave(mlxsw_sp_port);
Ido Schimmel4dc236c2016-01-27 15:20:16 +01003907 }
3908
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02003909 if (lag->ref_count == 1)
Ido Schimmel82e6db02016-06-20 23:04:04 +02003910 mlxsw_sp_lag_destroy(mlxsw_sp, lag_id);
Jiri Pirko0d65fc12015-12-03 12:12:28 +01003911
3912 mlxsw_core_lag_mapping_clear(mlxsw_sp->core, lag_id,
3913 mlxsw_sp_port->local_port);
3914 mlxsw_sp_port->lagged = 0;
3915 lag->ref_count--;
Ido Schimmel86bf95b2016-07-02 11:00:11 +02003916
3917 mlxsw_sp_port_pvid_vport_lag_leave(mlxsw_sp_port);
Jiri Pirko0d65fc12015-12-03 12:12:28 +01003918}
3919
Jiri Pirko74581202015-12-03 12:12:30 +01003920static int mlxsw_sp_lag_dist_port_add(struct mlxsw_sp_port *mlxsw_sp_port,
3921 u16 lag_id)
3922{
3923 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
3924 char sldr_pl[MLXSW_REG_SLDR_LEN];
3925
3926 mlxsw_reg_sldr_lag_add_port_pack(sldr_pl, lag_id,
3927 mlxsw_sp_port->local_port);
3928 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sldr), sldr_pl);
3929}
3930
3931static int mlxsw_sp_lag_dist_port_remove(struct mlxsw_sp_port *mlxsw_sp_port,
3932 u16 lag_id)
3933{
3934 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
3935 char sldr_pl[MLXSW_REG_SLDR_LEN];
3936
3937 mlxsw_reg_sldr_lag_remove_port_pack(sldr_pl, lag_id,
3938 mlxsw_sp_port->local_port);
3939 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sldr), sldr_pl);
3940}
3941
3942static int mlxsw_sp_port_lag_tx_en_set(struct mlxsw_sp_port *mlxsw_sp_port,
3943 bool lag_tx_enabled)
3944{
3945 if (lag_tx_enabled)
3946 return mlxsw_sp_lag_dist_port_add(mlxsw_sp_port,
3947 mlxsw_sp_port->lag_id);
3948 else
3949 return mlxsw_sp_lag_dist_port_remove(mlxsw_sp_port,
3950 mlxsw_sp_port->lag_id);
3951}
3952
3953static int mlxsw_sp_port_lag_changed(struct mlxsw_sp_port *mlxsw_sp_port,
3954 struct netdev_lag_lower_state_info *info)
3955{
3956 return mlxsw_sp_port_lag_tx_en_set(mlxsw_sp_port, info->tx_enabled);
3957}
3958
Ido Schimmel9589a7b52015-12-15 16:03:43 +01003959static int mlxsw_sp_port_vlan_link(struct mlxsw_sp_port *mlxsw_sp_port,
3960 struct net_device *vlan_dev)
3961{
3962 struct mlxsw_sp_port *mlxsw_sp_vport;
3963 u16 vid = vlan_dev_vlan_id(vlan_dev);
3964
3965 mlxsw_sp_vport = mlxsw_sp_port_vport_find(mlxsw_sp_port, vid);
Ido Schimmel423b9372016-06-20 23:04:03 +02003966 if (WARN_ON(!mlxsw_sp_vport))
Ido Schimmel9589a7b52015-12-15 16:03:43 +01003967 return -EINVAL;
Ido Schimmel9589a7b52015-12-15 16:03:43 +01003968
3969 mlxsw_sp_vport->dev = vlan_dev;
3970
3971 return 0;
3972}
3973
Ido Schimmel82e6db02016-06-20 23:04:04 +02003974static void mlxsw_sp_port_vlan_unlink(struct mlxsw_sp_port *mlxsw_sp_port,
3975 struct net_device *vlan_dev)
Ido Schimmel9589a7b52015-12-15 16:03:43 +01003976{
3977 struct mlxsw_sp_port *mlxsw_sp_vport;
3978 u16 vid = vlan_dev_vlan_id(vlan_dev);
3979
3980 mlxsw_sp_vport = mlxsw_sp_port_vport_find(mlxsw_sp_port, vid);
Ido Schimmel423b9372016-06-20 23:04:03 +02003981 if (WARN_ON(!mlxsw_sp_vport))
Ido Schimmel82e6db02016-06-20 23:04:04 +02003982 return;
Ido Schimmel9589a7b52015-12-15 16:03:43 +01003983
3984 mlxsw_sp_vport->dev = mlxsw_sp_port->dev;
Ido Schimmel9589a7b52015-12-15 16:03:43 +01003985}
3986
Jiri Pirko74581202015-12-03 12:12:30 +01003987static int mlxsw_sp_netdevice_port_upper_event(struct net_device *dev,
3988 unsigned long event, void *ptr)
Jiri Pirko0d65fc12015-12-03 12:12:28 +01003989{
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003990 struct netdev_notifier_changeupper_info *info;
3991 struct mlxsw_sp_port *mlxsw_sp_port;
3992 struct net_device *upper_dev;
3993 struct mlxsw_sp *mlxsw_sp;
Ido Schimmel80bedf12016-06-20 23:03:59 +02003994 int err = 0;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003995
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003996 mlxsw_sp_port = netdev_priv(dev);
3997 mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
3998 info = ptr;
3999
4000 switch (event) {
4001 case NETDEV_PRECHANGEUPPER:
4002 upper_dev = info->upper_dev;
Ido Schimmel59fe9b32016-06-20 23:04:00 +02004003 if (!is_vlan_dev(upper_dev) &&
4004 !netif_is_lag_master(upper_dev) &&
4005 !netif_is_bridge_master(upper_dev))
4006 return -EINVAL;
Ido Schimmel6ec43902016-06-20 23:04:01 +02004007 if (!info->linking)
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004008 break;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004009 /* HW limitation forbids to put ports to multiple bridges. */
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004010 if (netif_is_bridge_master(upper_dev) &&
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004011 !mlxsw_sp_master_bridge_check(mlxsw_sp, upper_dev))
Ido Schimmel80bedf12016-06-20 23:03:59 +02004012 return -EINVAL;
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004013 if (netif_is_lag_master(upper_dev) &&
4014 !mlxsw_sp_master_lag_check(mlxsw_sp, upper_dev,
4015 info->upper_info))
Ido Schimmel80bedf12016-06-20 23:03:59 +02004016 return -EINVAL;
Ido Schimmel6ec43902016-06-20 23:04:01 +02004017 if (netif_is_lag_master(upper_dev) && vlan_uses_dev(dev))
4018 return -EINVAL;
4019 if (netif_is_lag_port(dev) && is_vlan_dev(upper_dev) &&
4020 !netif_is_lag_master(vlan_dev_real_dev(upper_dev)))
4021 return -EINVAL;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004022 break;
4023 case NETDEV_CHANGEUPPER:
4024 upper_dev = info->upper_dev;
Ido Schimmel9589a7b52015-12-15 16:03:43 +01004025 if (is_vlan_dev(upper_dev)) {
Ido Schimmel80bedf12016-06-20 23:03:59 +02004026 if (info->linking)
Ido Schimmel9589a7b52015-12-15 16:03:43 +01004027 err = mlxsw_sp_port_vlan_link(mlxsw_sp_port,
4028 upper_dev);
Ido Schimmel80bedf12016-06-20 23:03:59 +02004029 else
Ido Schimmel82e6db02016-06-20 23:04:04 +02004030 mlxsw_sp_port_vlan_unlink(mlxsw_sp_port,
4031 upper_dev);
Ido Schimmel9589a7b52015-12-15 16:03:43 +01004032 } else if (netif_is_bridge_master(upper_dev)) {
Ido Schimmel7117a572016-06-20 23:04:06 +02004033 if (info->linking)
4034 err = mlxsw_sp_port_bridge_join(mlxsw_sp_port,
4035 upper_dev);
4036 else
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02004037 mlxsw_sp_port_bridge_leave(mlxsw_sp_port);
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004038 } else if (netif_is_lag_master(upper_dev)) {
Ido Schimmel80bedf12016-06-20 23:03:59 +02004039 if (info->linking)
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004040 err = mlxsw_sp_port_lag_join(mlxsw_sp_port,
4041 upper_dev);
Ido Schimmel80bedf12016-06-20 23:03:59 +02004042 else
Ido Schimmel82e6db02016-06-20 23:04:04 +02004043 mlxsw_sp_port_lag_leave(mlxsw_sp_port,
4044 upper_dev);
Ido Schimmel59fe9b32016-06-20 23:04:00 +02004045 } else {
4046 err = -EINVAL;
4047 WARN_ON(1);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004048 }
4049 break;
4050 }
4051
Ido Schimmel80bedf12016-06-20 23:03:59 +02004052 return err;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004053}
4054
Jiri Pirko74581202015-12-03 12:12:30 +01004055static int mlxsw_sp_netdevice_port_lower_event(struct net_device *dev,
4056 unsigned long event, void *ptr)
4057{
4058 struct netdev_notifier_changelowerstate_info *info;
4059 struct mlxsw_sp_port *mlxsw_sp_port;
4060 int err;
4061
4062 mlxsw_sp_port = netdev_priv(dev);
4063 info = ptr;
4064
4065 switch (event) {
4066 case NETDEV_CHANGELOWERSTATE:
4067 if (netif_is_lag_port(dev) && mlxsw_sp_port->lagged) {
4068 err = mlxsw_sp_port_lag_changed(mlxsw_sp_port,
4069 info->lower_state_info);
4070 if (err)
4071 netdev_err(dev, "Failed to reflect link aggregation lower state change\n");
4072 }
4073 break;
4074 }
4075
Ido Schimmel80bedf12016-06-20 23:03:59 +02004076 return 0;
Jiri Pirko74581202015-12-03 12:12:30 +01004077}
4078
4079static int mlxsw_sp_netdevice_port_event(struct net_device *dev,
4080 unsigned long event, void *ptr)
4081{
4082 switch (event) {
4083 case NETDEV_PRECHANGEUPPER:
4084 case NETDEV_CHANGEUPPER:
4085 return mlxsw_sp_netdevice_port_upper_event(dev, event, ptr);
4086 case NETDEV_CHANGELOWERSTATE:
4087 return mlxsw_sp_netdevice_port_lower_event(dev, event, ptr);
4088 }
4089
Ido Schimmel80bedf12016-06-20 23:03:59 +02004090 return 0;
Jiri Pirko74581202015-12-03 12:12:30 +01004091}
4092
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004093static int mlxsw_sp_netdevice_lag_event(struct net_device *lag_dev,
4094 unsigned long event, void *ptr)
4095{
4096 struct net_device *dev;
4097 struct list_head *iter;
4098 int ret;
4099
4100 netdev_for_each_lower_dev(lag_dev, dev, iter) {
4101 if (mlxsw_sp_port_dev_check(dev)) {
4102 ret = mlxsw_sp_netdevice_port_event(dev, event, ptr);
Ido Schimmel80bedf12016-06-20 23:03:59 +02004103 if (ret)
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004104 return ret;
4105 }
4106 }
4107
Ido Schimmel80bedf12016-06-20 23:03:59 +02004108 return 0;
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004109}
4110
Ido Schimmel701b1862016-07-04 08:23:16 +02004111static int mlxsw_sp_master_bridge_vlan_link(struct mlxsw_sp *mlxsw_sp,
4112 struct net_device *vlan_dev)
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004113{
Ido Schimmel701b1862016-07-04 08:23:16 +02004114 u16 fid = vlan_dev_vlan_id(vlan_dev);
Ido Schimmeld0ec8752016-06-20 23:04:12 +02004115 struct mlxsw_sp_fid *f;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004116
Ido Schimmel701b1862016-07-04 08:23:16 +02004117 f = mlxsw_sp_fid_find(mlxsw_sp, fid);
4118 if (!f) {
4119 f = mlxsw_sp_fid_create(mlxsw_sp, fid);
4120 if (IS_ERR(f))
4121 return PTR_ERR(f);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004122 }
4123
Ido Schimmel701b1862016-07-04 08:23:16 +02004124 f->ref_count++;
4125
4126 return 0;
4127}
4128
4129static void mlxsw_sp_master_bridge_vlan_unlink(struct mlxsw_sp *mlxsw_sp,
4130 struct net_device *vlan_dev)
4131{
4132 u16 fid = vlan_dev_vlan_id(vlan_dev);
4133 struct mlxsw_sp_fid *f;
4134
4135 f = mlxsw_sp_fid_find(mlxsw_sp, fid);
Ido Schimmel99f44bb2016-07-04 08:23:17 +02004136 if (f && f->r)
4137 mlxsw_sp_rif_bridge_destroy(mlxsw_sp, f->r);
Ido Schimmel701b1862016-07-04 08:23:16 +02004138 if (f && --f->ref_count == 0)
4139 mlxsw_sp_fid_destroy(mlxsw_sp, f);
4140}
4141
4142static int mlxsw_sp_netdevice_bridge_event(struct net_device *br_dev,
4143 unsigned long event, void *ptr)
4144{
4145 struct netdev_notifier_changeupper_info *info;
4146 struct net_device *upper_dev;
4147 struct mlxsw_sp *mlxsw_sp;
4148 int err;
4149
4150 mlxsw_sp = mlxsw_sp_lower_get(br_dev);
4151 if (!mlxsw_sp)
4152 return 0;
4153 if (br_dev != mlxsw_sp->master_bridge.dev)
4154 return 0;
4155
4156 info = ptr;
4157
4158 switch (event) {
4159 case NETDEV_CHANGEUPPER:
4160 upper_dev = info->upper_dev;
4161 if (!is_vlan_dev(upper_dev))
4162 break;
4163 if (info->linking) {
4164 err = mlxsw_sp_master_bridge_vlan_link(mlxsw_sp,
4165 upper_dev);
4166 if (err)
4167 return err;
4168 } else {
4169 mlxsw_sp_master_bridge_vlan_unlink(mlxsw_sp, upper_dev);
4170 }
4171 break;
4172 }
4173
4174 return 0;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004175}
4176
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004177static u16 mlxsw_sp_avail_vfid_get(const struct mlxsw_sp *mlxsw_sp)
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004178{
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004179 return find_first_zero_bit(mlxsw_sp->vfids.mapped,
Ido Schimmel99724c12016-07-04 08:23:14 +02004180 MLXSW_SP_VFID_MAX);
4181}
4182
4183static int mlxsw_sp_vfid_op(struct mlxsw_sp *mlxsw_sp, u16 fid, bool create)
4184{
4185 char sfmr_pl[MLXSW_REG_SFMR_LEN];
4186
4187 mlxsw_reg_sfmr_pack(sfmr_pl, !create, fid, 0);
4188 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sfmr), sfmr_pl);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004189}
4190
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004191static void mlxsw_sp_vport_vfid_leave(struct mlxsw_sp_port *mlxsw_sp_vport);
Ido Schimmel1c800752016-06-20 23:04:20 +02004192
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004193static struct mlxsw_sp_fid *mlxsw_sp_vfid_create(struct mlxsw_sp *mlxsw_sp,
4194 struct net_device *br_dev)
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004195{
4196 struct device *dev = mlxsw_sp->bus_info->dev;
Ido Schimmeld0ec8752016-06-20 23:04:12 +02004197 struct mlxsw_sp_fid *f;
Ido Schimmelc7e920b2016-06-20 23:04:09 +02004198 u16 vfid, fid;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004199 int err;
4200
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004201 vfid = mlxsw_sp_avail_vfid_get(mlxsw_sp);
Ido Schimmelc7e920b2016-06-20 23:04:09 +02004202 if (vfid == MLXSW_SP_VFID_MAX) {
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004203 dev_err(dev, "No available vFIDs\n");
4204 return ERR_PTR(-ERANGE);
4205 }
4206
Ido Schimmelc7e920b2016-06-20 23:04:09 +02004207 fid = mlxsw_sp_vfid_to_fid(vfid);
4208 err = mlxsw_sp_vfid_op(mlxsw_sp, fid, true);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004209 if (err) {
Ido Schimmelc7e920b2016-06-20 23:04:09 +02004210 dev_err(dev, "Failed to create FID=%d\n", fid);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004211 return ERR_PTR(err);
4212 }
4213
Ido Schimmelc7e920b2016-06-20 23:04:09 +02004214 f = kzalloc(sizeof(*f), GFP_KERNEL);
4215 if (!f)
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004216 goto err_allocate_vfid;
4217
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004218 f->leave = mlxsw_sp_vport_vfid_leave;
Ido Schimmeld0ec8752016-06-20 23:04:12 +02004219 f->fid = fid;
4220 f->dev = br_dev;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004221
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004222 list_add(&f->list, &mlxsw_sp->vfids.list);
4223 set_bit(vfid, mlxsw_sp->vfids.mapped);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004224
Ido Schimmelc7e920b2016-06-20 23:04:09 +02004225 return f;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004226
4227err_allocate_vfid:
Ido Schimmelc7e920b2016-06-20 23:04:09 +02004228 mlxsw_sp_vfid_op(mlxsw_sp, fid, false);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004229 return ERR_PTR(-ENOMEM);
4230}
4231
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004232static void mlxsw_sp_vfid_destroy(struct mlxsw_sp *mlxsw_sp,
4233 struct mlxsw_sp_fid *f)
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004234{
Ido Schimmeld0ec8752016-06-20 23:04:12 +02004235 u16 vfid = mlxsw_sp_fid_to_vfid(f->fid);
Ido Schimmel99f44bb2016-07-04 08:23:17 +02004236 u16 fid = f->fid;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004237
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004238 clear_bit(vfid, mlxsw_sp->vfids.mapped);
Ido Schimmeld0ec8752016-06-20 23:04:12 +02004239 list_del(&f->list);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004240
Ido Schimmel99f44bb2016-07-04 08:23:17 +02004241 if (f->r)
4242 mlxsw_sp_rif_bridge_destroy(mlxsw_sp, f->r);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004243
Ido Schimmeld0ec8752016-06-20 23:04:12 +02004244 kfree(f);
Ido Schimmel99f44bb2016-07-04 08:23:17 +02004245
4246 mlxsw_sp_vfid_op(mlxsw_sp, fid, false);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004247}
4248
Ido Schimmel99724c12016-07-04 08:23:14 +02004249static int mlxsw_sp_vport_fid_map(struct mlxsw_sp_port *mlxsw_sp_vport, u16 fid,
4250 bool valid)
4251{
4252 enum mlxsw_reg_svfa_mt mt = MLXSW_REG_SVFA_MT_PORT_VID_TO_FID;
4253 u16 vid = mlxsw_sp_vport_vid_get(mlxsw_sp_vport);
4254
4255 return mlxsw_sp_port_vid_to_fid_set(mlxsw_sp_vport, mt, valid, fid,
4256 vid);
4257}
4258
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004259static int mlxsw_sp_vport_vfid_join(struct mlxsw_sp_port *mlxsw_sp_vport,
4260 struct net_device *br_dev)
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004261{
Ido Schimmel0355b592016-06-20 23:04:13 +02004262 struct mlxsw_sp_fid *f;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004263 int err;
4264
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004265 f = mlxsw_sp_vfid_find(mlxsw_sp_vport->mlxsw_sp, br_dev);
Ido Schimmel0355b592016-06-20 23:04:13 +02004266 if (!f) {
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004267 f = mlxsw_sp_vfid_create(mlxsw_sp_vport->mlxsw_sp, br_dev);
Ido Schimmel0355b592016-06-20 23:04:13 +02004268 if (IS_ERR(f))
4269 return PTR_ERR(f);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004270 }
4271
Ido Schimmel0355b592016-06-20 23:04:13 +02004272 err = mlxsw_sp_vport_flood_set(mlxsw_sp_vport, f->fid, true);
4273 if (err)
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004274 goto err_vport_flood_set;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004275
Ido Schimmel0355b592016-06-20 23:04:13 +02004276 err = mlxsw_sp_vport_fid_map(mlxsw_sp_vport, f->fid, true);
4277 if (err)
4278 goto err_vport_fid_map;
Ido Schimmel6a9863a2016-02-15 13:19:54 +01004279
Ido Schimmel41b996c2016-06-20 23:04:17 +02004280 mlxsw_sp_vport_fid_set(mlxsw_sp_vport, f);
Ido Schimmel0355b592016-06-20 23:04:13 +02004281 f->ref_count++;
Ido Schimmel039c49a2016-01-27 15:20:18 +01004282
Ido Schimmel22305372016-06-20 23:04:21 +02004283 netdev_dbg(mlxsw_sp_vport->dev, "Joined FID=%d\n", f->fid);
4284
Ido Schimmel0355b592016-06-20 23:04:13 +02004285 return 0;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004286
Ido Schimmel9c4d4422016-06-20 23:04:10 +02004287err_vport_fid_map:
Ido Schimmel0355b592016-06-20 23:04:13 +02004288 mlxsw_sp_vport_flood_set(mlxsw_sp_vport, f->fid, false);
4289err_vport_flood_set:
4290 if (!f->ref_count)
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004291 mlxsw_sp_vfid_destroy(mlxsw_sp_vport->mlxsw_sp, f);
Ido Schimmel0355b592016-06-20 23:04:13 +02004292 return err;
4293}
4294
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004295static void mlxsw_sp_vport_vfid_leave(struct mlxsw_sp_port *mlxsw_sp_vport)
Ido Schimmel0355b592016-06-20 23:04:13 +02004296{
Ido Schimmel41b996c2016-06-20 23:04:17 +02004297 struct mlxsw_sp_fid *f = mlxsw_sp_vport_fid_get(mlxsw_sp_vport);
Ido Schimmel0355b592016-06-20 23:04:13 +02004298
Ido Schimmel22305372016-06-20 23:04:21 +02004299 netdev_dbg(mlxsw_sp_vport->dev, "Left FID=%d\n", f->fid);
4300
Ido Schimmel0355b592016-06-20 23:04:13 +02004301 mlxsw_sp_vport_fid_map(mlxsw_sp_vport, f->fid, false);
4302
4303 mlxsw_sp_vport_flood_set(mlxsw_sp_vport, f->fid, false);
4304
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02004305 mlxsw_sp_port_fdb_flush(mlxsw_sp_vport, f->fid);
4306
Ido Schimmel41b996c2016-06-20 23:04:17 +02004307 mlxsw_sp_vport_fid_set(mlxsw_sp_vport, NULL);
Ido Schimmel0355b592016-06-20 23:04:13 +02004308 if (--f->ref_count == 0)
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004309 mlxsw_sp_vfid_destroy(mlxsw_sp_vport->mlxsw_sp, f);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004310}
4311
4312static int mlxsw_sp_vport_bridge_join(struct mlxsw_sp_port *mlxsw_sp_vport,
4313 struct net_device *br_dev)
4314{
Ido Schimmel99724c12016-07-04 08:23:14 +02004315 struct mlxsw_sp_fid *f = mlxsw_sp_vport_fid_get(mlxsw_sp_vport);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004316 u16 vid = mlxsw_sp_vport_vid_get(mlxsw_sp_vport);
4317 struct net_device *dev = mlxsw_sp_vport->dev;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004318 int err;
4319
Ido Schimmel99724c12016-07-04 08:23:14 +02004320 if (f && !WARN_ON(!f->leave))
4321 f->leave(mlxsw_sp_vport);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004322
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004323 err = mlxsw_sp_vport_vfid_join(mlxsw_sp_vport, br_dev);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004324 if (err) {
Ido Schimmel0355b592016-06-20 23:04:13 +02004325 netdev_err(dev, "Failed to join vFID\n");
Ido Schimmel99724c12016-07-04 08:23:14 +02004326 return err;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004327 }
4328
4329 err = mlxsw_sp_port_vid_learning_set(mlxsw_sp_vport, vid, true);
4330 if (err) {
4331 netdev_err(dev, "Failed to enable learning\n");
4332 goto err_port_vid_learning_set;
4333 }
4334
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004335 mlxsw_sp_vport->learning = 1;
4336 mlxsw_sp_vport->learning_sync = 1;
4337 mlxsw_sp_vport->uc_flood = 1;
4338 mlxsw_sp_vport->bridged = 1;
4339
4340 return 0;
4341
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004342err_port_vid_learning_set:
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004343 mlxsw_sp_vport_vfid_leave(mlxsw_sp_vport);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004344 return err;
4345}
4346
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02004347static void mlxsw_sp_vport_bridge_leave(struct mlxsw_sp_port *mlxsw_sp_vport)
Ido Schimmel0355b592016-06-20 23:04:13 +02004348{
4349 u16 vid = mlxsw_sp_vport_vid_get(mlxsw_sp_vport);
Ido Schimmel0355b592016-06-20 23:04:13 +02004350
4351 mlxsw_sp_port_vid_learning_set(mlxsw_sp_vport, vid, false);
4352
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004353 mlxsw_sp_vport_vfid_leave(mlxsw_sp_vport);
Ido Schimmel0355b592016-06-20 23:04:13 +02004354
Ido Schimmel0355b592016-06-20 23:04:13 +02004355 mlxsw_sp_vport->learning = 0;
4356 mlxsw_sp_vport->learning_sync = 0;
4357 mlxsw_sp_vport->uc_flood = 0;
4358 mlxsw_sp_vport->bridged = 0;
4359}
4360
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004361static bool
4362mlxsw_sp_port_master_bridge_check(const struct mlxsw_sp_port *mlxsw_sp_port,
4363 const struct net_device *br_dev)
4364{
4365 struct mlxsw_sp_port *mlxsw_sp_vport;
4366
4367 list_for_each_entry(mlxsw_sp_vport, &mlxsw_sp_port->vports_list,
4368 vport.list) {
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004369 struct net_device *dev = mlxsw_sp_vport_dev_get(mlxsw_sp_vport);
Ido Schimmel56918b62016-06-20 23:04:18 +02004370
4371 if (dev && dev == br_dev)
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004372 return false;
4373 }
4374
4375 return true;
4376}
4377
4378static int mlxsw_sp_netdevice_vport_event(struct net_device *dev,
4379 unsigned long event, void *ptr,
4380 u16 vid)
4381{
4382 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
4383 struct netdev_notifier_changeupper_info *info = ptr;
4384 struct mlxsw_sp_port *mlxsw_sp_vport;
4385 struct net_device *upper_dev;
Ido Schimmel80bedf12016-06-20 23:03:59 +02004386 int err = 0;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004387
4388 mlxsw_sp_vport = mlxsw_sp_port_vport_find(mlxsw_sp_port, vid);
4389
4390 switch (event) {
4391 case NETDEV_PRECHANGEUPPER:
4392 upper_dev = info->upper_dev;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004393 if (!netif_is_bridge_master(upper_dev))
Ido Schimmel80bedf12016-06-20 23:03:59 +02004394 return -EINVAL;
Ido Schimmelddbe9932016-06-20 23:04:02 +02004395 if (!info->linking)
4396 break;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004397 /* We can't have multiple VLAN interfaces configured on
4398 * the same port and being members in the same bridge.
4399 */
4400 if (!mlxsw_sp_port_master_bridge_check(mlxsw_sp_port,
4401 upper_dev))
Ido Schimmel80bedf12016-06-20 23:03:59 +02004402 return -EINVAL;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004403 break;
4404 case NETDEV_CHANGEUPPER:
4405 upper_dev = info->upper_dev;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004406 if (info->linking) {
Ido Schimmel423b9372016-06-20 23:04:03 +02004407 if (WARN_ON(!mlxsw_sp_vport))
Ido Schimmel80bedf12016-06-20 23:03:59 +02004408 return -EINVAL;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004409 err = mlxsw_sp_vport_bridge_join(mlxsw_sp_vport,
4410 upper_dev);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004411 } else {
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004412 if (!mlxsw_sp_vport)
Ido Schimmel80bedf12016-06-20 23:03:59 +02004413 return 0;
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02004414 mlxsw_sp_vport_bridge_leave(mlxsw_sp_vport);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004415 }
4416 }
4417
Ido Schimmel80bedf12016-06-20 23:03:59 +02004418 return err;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004419}
4420
Ido Schimmel272c4472015-12-15 16:03:47 +01004421static int mlxsw_sp_netdevice_lag_vport_event(struct net_device *lag_dev,
4422 unsigned long event, void *ptr,
4423 u16 vid)
4424{
4425 struct net_device *dev;
4426 struct list_head *iter;
4427 int ret;
4428
4429 netdev_for_each_lower_dev(lag_dev, dev, iter) {
4430 if (mlxsw_sp_port_dev_check(dev)) {
4431 ret = mlxsw_sp_netdevice_vport_event(dev, event, ptr,
4432 vid);
Ido Schimmel80bedf12016-06-20 23:03:59 +02004433 if (ret)
Ido Schimmel272c4472015-12-15 16:03:47 +01004434 return ret;
4435 }
4436 }
4437
Ido Schimmel80bedf12016-06-20 23:03:59 +02004438 return 0;
Ido Schimmel272c4472015-12-15 16:03:47 +01004439}
4440
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004441static int mlxsw_sp_netdevice_vlan_event(struct net_device *vlan_dev,
4442 unsigned long event, void *ptr)
4443{
4444 struct net_device *real_dev = vlan_dev_real_dev(vlan_dev);
4445 u16 vid = vlan_dev_vlan_id(vlan_dev);
4446
Ido Schimmel272c4472015-12-15 16:03:47 +01004447 if (mlxsw_sp_port_dev_check(real_dev))
4448 return mlxsw_sp_netdevice_vport_event(real_dev, event, ptr,
4449 vid);
4450 else if (netif_is_lag_master(real_dev))
4451 return mlxsw_sp_netdevice_lag_vport_event(real_dev, event, ptr,
4452 vid);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004453
Ido Schimmel80bedf12016-06-20 23:03:59 +02004454 return 0;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004455}
4456
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004457static int mlxsw_sp_netdevice_event(struct notifier_block *unused,
4458 unsigned long event, void *ptr)
4459{
4460 struct net_device *dev = netdev_notifier_info_to_dev(ptr);
Ido Schimmel80bedf12016-06-20 23:03:59 +02004461 int err = 0;
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004462
Ido Schimmel6e095fd2016-07-04 08:23:13 +02004463 if (event == NETDEV_CHANGEADDR || event == NETDEV_CHANGEMTU)
4464 err = mlxsw_sp_netdevice_router_port_event(dev);
4465 else if (mlxsw_sp_port_dev_check(dev))
Ido Schimmel80bedf12016-06-20 23:03:59 +02004466 err = mlxsw_sp_netdevice_port_event(dev, event, ptr);
4467 else if (netif_is_lag_master(dev))
4468 err = mlxsw_sp_netdevice_lag_event(dev, event, ptr);
Ido Schimmel701b1862016-07-04 08:23:16 +02004469 else if (netif_is_bridge_master(dev))
4470 err = mlxsw_sp_netdevice_bridge_event(dev, event, ptr);
Ido Schimmel80bedf12016-06-20 23:03:59 +02004471 else if (is_vlan_dev(dev))
4472 err = mlxsw_sp_netdevice_vlan_event(dev, event, ptr);
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004473
Ido Schimmel80bedf12016-06-20 23:03:59 +02004474 return notifier_from_errno(err);
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004475}
4476
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004477static struct notifier_block mlxsw_sp_netdevice_nb __read_mostly = {
4478 .notifier_call = mlxsw_sp_netdevice_event,
4479};
4480
Ido Schimmel99724c12016-07-04 08:23:14 +02004481static struct notifier_block mlxsw_sp_inetaddr_nb __read_mostly = {
4482 .notifier_call = mlxsw_sp_inetaddr_event,
4483 .priority = 10, /* Must be called before FIB notifier block */
4484};
4485
Jiri Pirkoe7322632016-09-01 10:37:43 +02004486static struct notifier_block mlxsw_sp_router_netevent_nb __read_mostly = {
4487 .notifier_call = mlxsw_sp_router_netevent_event,
4488};
4489
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004490static int __init mlxsw_sp_module_init(void)
4491{
4492 int err;
4493
4494 register_netdevice_notifier(&mlxsw_sp_netdevice_nb);
Ido Schimmel99724c12016-07-04 08:23:14 +02004495 register_inetaddr_notifier(&mlxsw_sp_inetaddr_nb);
Jiri Pirkoe7322632016-09-01 10:37:43 +02004496 register_netevent_notifier(&mlxsw_sp_router_netevent_nb);
4497
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004498 err = mlxsw_core_driver_register(&mlxsw_sp_driver);
4499 if (err)
4500 goto err_core_driver_register;
4501 return 0;
4502
4503err_core_driver_register:
Jiri Pirkoe7322632016-09-01 10:37:43 +02004504 unregister_netevent_notifier(&mlxsw_sp_router_netevent_nb);
Jiri Pirkode7d6292016-09-01 10:37:42 +02004505 unregister_inetaddr_notifier(&mlxsw_sp_inetaddr_nb);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004506 unregister_netdevice_notifier(&mlxsw_sp_netdevice_nb);
4507 return err;
4508}
4509
4510static void __exit mlxsw_sp_module_exit(void)
4511{
4512 mlxsw_core_driver_unregister(&mlxsw_sp_driver);
Jiri Pirkoe7322632016-09-01 10:37:43 +02004513 unregister_netevent_notifier(&mlxsw_sp_router_netevent_nb);
Ido Schimmel99724c12016-07-04 08:23:14 +02004514 unregister_inetaddr_notifier(&mlxsw_sp_inetaddr_nb);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004515 unregister_netdevice_notifier(&mlxsw_sp_netdevice_nb);
4516}
4517
4518module_init(mlxsw_sp_module_init);
4519module_exit(mlxsw_sp_module_exit);
4520
4521MODULE_LICENSE("Dual BSD/GPL");
4522MODULE_AUTHOR("Jiri Pirko <jiri@mellanox.com>");
4523MODULE_DESCRIPTION("Mellanox Spectrum driver");
4524MODULE_MLXSW_DRIVER_ALIAS(MLXSW_DEVICE_KIND_SPECTRUM);