blob: 40f969c72de86e596edadb911c121869e65bf8e9 [file] [log] [blame]
Kalle Valo5e3dd152013-06-12 20:52:10 +03001/*
2 * Copyright (c) 2005-2011 Atheros Communications Inc.
3 * Copyright (c) 2011-2013 Qualcomm Atheros, Inc.
4 *
5 * Permission to use, copy, modify, and/or distribute this software for any
6 * purpose with or without fee is hereby granted, provided that the above
7 * copyright notice and this permission notice appear in all copies.
8 *
9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
10 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
11 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
12 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
13 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
14 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
15 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
16 */
17
Michal Kazioredb82362013-07-05 16:15:14 +030018#include "core.h"
Kalle Valo5e3dd152013-06-12 20:52:10 +030019#include "htc.h"
20#include "htt.h"
21#include "txrx.h"
22#include "debug.h"
Kalle Valoa9bf0502013-09-03 11:43:55 +030023#include "trace.h"
Michal Kazioraa5b4fb2014-07-23 12:20:33 +020024#include "mac.h"
Kalle Valo5e3dd152013-06-12 20:52:10 +030025
26#include <linux/log2.h>
27
Michal Kaziorc5450702015-01-24 12:14:48 +020028#define HTT_RX_RING_SIZE HTT_RX_RING_SIZE_MAX
29#define HTT_RX_RING_FILL_LEVEL (((HTT_RX_RING_SIZE) / 2) - 1)
Kalle Valo5e3dd152013-06-12 20:52:10 +030030
31/* when under memory pressure rx ring refill may fail and needs a retry */
32#define HTT_RX_RING_REFILL_RETRY_MS 50
33
Michal Kaziorf6dc2092013-09-26 10:12:22 +030034static int ath10k_htt_rx_get_csum_state(struct sk_buff *skb);
Michal Kazior6c5151a2014-02-27 18:50:04 +020035static void ath10k_htt_txrx_compl_task(unsigned long ptr);
Michal Kaziorf6dc2092013-09-26 10:12:22 +030036
Michal Kaziorc5450702015-01-24 12:14:48 +020037static struct sk_buff *
38ath10k_htt_rx_find_skb_paddr(struct ath10k *ar, u32 paddr)
39{
40 struct ath10k_skb_rxcb *rxcb;
41
42 hash_for_each_possible(ar->htt.rx_ring.skb_table, rxcb, hlist, paddr)
43 if (rxcb->paddr == paddr)
44 return ATH10K_RXCB_SKB(rxcb);
45
46 WARN_ON_ONCE(1);
47 return NULL;
48}
49
Kalle Valo5e3dd152013-06-12 20:52:10 +030050static void ath10k_htt_rx_ring_free(struct ath10k_htt *htt)
51{
52 struct sk_buff *skb;
Michal Kaziorc5450702015-01-24 12:14:48 +020053 struct ath10k_skb_rxcb *rxcb;
54 struct hlist_node *n;
Kalle Valo5e3dd152013-06-12 20:52:10 +030055 int i;
56
Michal Kaziorc5450702015-01-24 12:14:48 +020057 if (htt->rx_ring.in_ord_rx) {
58 hash_for_each_safe(htt->rx_ring.skb_table, i, n, rxcb, hlist) {
59 skb = ATH10K_RXCB_SKB(rxcb);
60 dma_unmap_single(htt->ar->dev, rxcb->paddr,
61 skb->len + skb_tailroom(skb),
62 DMA_FROM_DEVICE);
63 hash_del(&rxcb->hlist);
64 dev_kfree_skb_any(skb);
65 }
66 } else {
67 for (i = 0; i < htt->rx_ring.size; i++) {
68 skb = htt->rx_ring.netbufs_ring[i];
69 if (!skb)
70 continue;
71
72 rxcb = ATH10K_SKB_RXCB(skb);
73 dma_unmap_single(htt->ar->dev, rxcb->paddr,
74 skb->len + skb_tailroom(skb),
75 DMA_FROM_DEVICE);
76 dev_kfree_skb_any(skb);
77 }
Kalle Valo5e3dd152013-06-12 20:52:10 +030078 }
79
80 htt->rx_ring.fill_cnt = 0;
Michal Kaziorc5450702015-01-24 12:14:48 +020081 hash_init(htt->rx_ring.skb_table);
82 memset(htt->rx_ring.netbufs_ring, 0,
83 htt->rx_ring.size * sizeof(htt->rx_ring.netbufs_ring[0]));
Kalle Valo5e3dd152013-06-12 20:52:10 +030084}
85
86static int __ath10k_htt_rx_ring_fill_n(struct ath10k_htt *htt, int num)
87{
88 struct htt_rx_desc *rx_desc;
Michal Kaziorc5450702015-01-24 12:14:48 +020089 struct ath10k_skb_rxcb *rxcb;
Kalle Valo5e3dd152013-06-12 20:52:10 +030090 struct sk_buff *skb;
91 dma_addr_t paddr;
92 int ret = 0, idx;
93
Michal Kaziorc5450702015-01-24 12:14:48 +020094 /* The Full Rx Reorder firmware has no way of telling the host
95 * implicitly when it copied HTT Rx Ring buffers to MAC Rx Ring.
96 * To keep things simple make sure ring is always half empty. This
97 * guarantees there'll be no replenishment overruns possible.
98 */
99 BUILD_BUG_ON(HTT_RX_RING_FILL_LEVEL >= HTT_RX_RING_SIZE / 2);
100
Kalle Valo8cc7f262014-09-14 12:50:39 +0300101 idx = __le32_to_cpu(*htt->rx_ring.alloc_idx.vaddr);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300102 while (num > 0) {
103 skb = dev_alloc_skb(HTT_RX_BUF_SIZE + HTT_RX_DESC_ALIGN);
104 if (!skb) {
105 ret = -ENOMEM;
106 goto fail;
107 }
108
109 if (!IS_ALIGNED((unsigned long)skb->data, HTT_RX_DESC_ALIGN))
110 skb_pull(skb,
111 PTR_ALIGN(skb->data, HTT_RX_DESC_ALIGN) -
112 skb->data);
113
114 /* Clear rx_desc attention word before posting to Rx ring */
115 rx_desc = (struct htt_rx_desc *)skb->data;
116 rx_desc->attention.flags = __cpu_to_le32(0);
117
118 paddr = dma_map_single(htt->ar->dev, skb->data,
119 skb->len + skb_tailroom(skb),
120 DMA_FROM_DEVICE);
121
122 if (unlikely(dma_mapping_error(htt->ar->dev, paddr))) {
123 dev_kfree_skb_any(skb);
124 ret = -ENOMEM;
125 goto fail;
126 }
127
Michal Kaziorc5450702015-01-24 12:14:48 +0200128 rxcb = ATH10K_SKB_RXCB(skb);
129 rxcb->paddr = paddr;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300130 htt->rx_ring.netbufs_ring[idx] = skb;
131 htt->rx_ring.paddrs_ring[idx] = __cpu_to_le32(paddr);
132 htt->rx_ring.fill_cnt++;
133
Michal Kaziorc5450702015-01-24 12:14:48 +0200134 if (htt->rx_ring.in_ord_rx) {
135 hash_add(htt->rx_ring.skb_table,
136 &ATH10K_SKB_RXCB(skb)->hlist,
137 (u32)paddr);
138 }
139
Kalle Valo5e3dd152013-06-12 20:52:10 +0300140 num--;
141 idx++;
142 idx &= htt->rx_ring.size_mask;
143 }
144
145fail:
Vasanthakumar Thiagarajan5de6dfc2015-01-09 22:49:46 +0530146 /*
147 * Make sure the rx buffer is updated before available buffer
148 * index to avoid any potential rx ring corruption.
149 */
150 mb();
Kalle Valo8cc7f262014-09-14 12:50:39 +0300151 *htt->rx_ring.alloc_idx.vaddr = __cpu_to_le32(idx);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300152 return ret;
153}
154
155static int ath10k_htt_rx_ring_fill_n(struct ath10k_htt *htt, int num)
156{
157 lockdep_assert_held(&htt->rx_ring.lock);
158 return __ath10k_htt_rx_ring_fill_n(htt, num);
159}
160
161static void ath10k_htt_rx_msdu_buff_replenish(struct ath10k_htt *htt)
162{
Michal Kazior6e712d42013-09-24 10:18:36 +0200163 int ret, num_deficit, num_to_fill;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300164
Michal Kazior6e712d42013-09-24 10:18:36 +0200165 /* Refilling the whole RX ring buffer proves to be a bad idea. The
166 * reason is RX may take up significant amount of CPU cycles and starve
167 * other tasks, e.g. TX on an ethernet device while acting as a bridge
168 * with ath10k wlan interface. This ended up with very poor performance
169 * once CPU the host system was overwhelmed with RX on ath10k.
170 *
171 * By limiting the number of refills the replenishing occurs
172 * progressively. This in turns makes use of the fact tasklets are
173 * processed in FIFO order. This means actual RX processing can starve
174 * out refilling. If there's not enough buffers on RX ring FW will not
175 * report RX until it is refilled with enough buffers. This
176 * automatically balances load wrt to CPU power.
177 *
178 * This probably comes at a cost of lower maximum throughput but
Ben Greear3eafdfd2015-02-15 16:50:39 +0200179 * improves the average and stability. */
Kalle Valo5e3dd152013-06-12 20:52:10 +0300180 spin_lock_bh(&htt->rx_ring.lock);
Michal Kazior6e712d42013-09-24 10:18:36 +0200181 num_deficit = htt->rx_ring.fill_level - htt->rx_ring.fill_cnt;
182 num_to_fill = min(ATH10K_HTT_MAX_NUM_REFILL, num_deficit);
183 num_deficit -= num_to_fill;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300184 ret = ath10k_htt_rx_ring_fill_n(htt, num_to_fill);
185 if (ret == -ENOMEM) {
186 /*
187 * Failed to fill it to the desired level -
188 * we'll start a timer and try again next time.
189 * As long as enough buffers are left in the ring for
190 * another A-MPDU rx, no special recovery is needed.
191 */
192 mod_timer(&htt->rx_ring.refill_retry_timer, jiffies +
193 msecs_to_jiffies(HTT_RX_RING_REFILL_RETRY_MS));
Michal Kazior6e712d42013-09-24 10:18:36 +0200194 } else if (num_deficit > 0) {
195 tasklet_schedule(&htt->rx_replenish_task);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300196 }
197 spin_unlock_bh(&htt->rx_ring.lock);
198}
199
200static void ath10k_htt_rx_ring_refill_retry(unsigned long arg)
201{
202 struct ath10k_htt *htt = (struct ath10k_htt *)arg;
Kalle Valoaf762c02014-09-14 12:50:17 +0300203
Kalle Valo5e3dd152013-06-12 20:52:10 +0300204 ath10k_htt_rx_msdu_buff_replenish(htt);
205}
206
Michal Kaziorc5450702015-01-24 12:14:48 +0200207int ath10k_htt_rx_ring_refill(struct ath10k *ar)
Michal Kazior3e841fd2014-05-14 16:23:31 +0300208{
Michal Kaziorc5450702015-01-24 12:14:48 +0200209 struct ath10k_htt *htt = &ar->htt;
210 int ret;
Michal Kazior3e841fd2014-05-14 16:23:31 +0300211
Michal Kaziorc5450702015-01-24 12:14:48 +0200212 spin_lock_bh(&htt->rx_ring.lock);
213 ret = ath10k_htt_rx_ring_fill_n(htt, (htt->rx_ring.fill_level -
214 htt->rx_ring.fill_cnt));
215 spin_unlock_bh(&htt->rx_ring.lock);
Michal Kazior3e841fd2014-05-14 16:23:31 +0300216
Michal Kaziorc5450702015-01-24 12:14:48 +0200217 if (ret)
218 ath10k_htt_rx_ring_free(htt);
219
220 return ret;
Michal Kazior3e841fd2014-05-14 16:23:31 +0300221}
222
Michal Kazior95bf21f2014-05-16 17:15:39 +0300223void ath10k_htt_rx_free(struct ath10k_htt *htt)
Kalle Valo5e3dd152013-06-12 20:52:10 +0300224{
Kalle Valo5e3dd152013-06-12 20:52:10 +0300225 del_timer_sync(&htt->rx_ring.refill_retry_timer);
Michal Kazior6e712d42013-09-24 10:18:36 +0200226 tasklet_kill(&htt->rx_replenish_task);
Michal Kazior6c5151a2014-02-27 18:50:04 +0200227 tasklet_kill(&htt->txrx_compl_task);
228
229 skb_queue_purge(&htt->tx_compl_q);
230 skb_queue_purge(&htt->rx_compl_q);
Michal Kaziorc5450702015-01-24 12:14:48 +0200231 skb_queue_purge(&htt->rx_in_ord_compl_q);
Michal Kazior426e10e2016-03-06 16:14:43 +0200232 skb_queue_purge(&htt->tx_fetch_ind_q);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300233
Michal Kaziorc5450702015-01-24 12:14:48 +0200234 ath10k_htt_rx_ring_free(htt);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300235
236 dma_free_coherent(htt->ar->dev,
237 (htt->rx_ring.size *
238 sizeof(htt->rx_ring.paddrs_ring)),
239 htt->rx_ring.paddrs_ring,
240 htt->rx_ring.base_paddr);
241
242 dma_free_coherent(htt->ar->dev,
243 sizeof(*htt->rx_ring.alloc_idx.vaddr),
244 htt->rx_ring.alloc_idx.vaddr,
245 htt->rx_ring.alloc_idx.paddr);
246
247 kfree(htt->rx_ring.netbufs_ring);
248}
249
250static inline struct sk_buff *ath10k_htt_rx_netbuf_pop(struct ath10k_htt *htt)
251{
Michal Kazior7aa7a722014-08-25 12:09:38 +0200252 struct ath10k *ar = htt->ar;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300253 int idx;
254 struct sk_buff *msdu;
255
Michal Kazior45967082014-02-27 18:50:05 +0200256 lockdep_assert_held(&htt->rx_ring.lock);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300257
Michal Kazior8d60ee82014-02-27 18:50:05 +0200258 if (htt->rx_ring.fill_cnt == 0) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200259 ath10k_warn(ar, "tried to pop sk_buff from an empty rx ring\n");
Michal Kazior8d60ee82014-02-27 18:50:05 +0200260 return NULL;
261 }
Kalle Valo5e3dd152013-06-12 20:52:10 +0300262
263 idx = htt->rx_ring.sw_rd_idx.msdu_payld;
264 msdu = htt->rx_ring.netbufs_ring[idx];
Michal Kazior3e841fd2014-05-14 16:23:31 +0300265 htt->rx_ring.netbufs_ring[idx] = NULL;
Michal Kaziorc5450702015-01-24 12:14:48 +0200266 htt->rx_ring.paddrs_ring[idx] = 0;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300267
268 idx++;
269 idx &= htt->rx_ring.size_mask;
270 htt->rx_ring.sw_rd_idx.msdu_payld = idx;
271 htt->rx_ring.fill_cnt--;
272
Michal Kazior4de02802014-10-23 17:04:23 +0300273 dma_unmap_single(htt->ar->dev,
Michal Kazior8582bf32015-01-24 12:14:47 +0200274 ATH10K_SKB_RXCB(msdu)->paddr,
Michal Kazior4de02802014-10-23 17:04:23 +0300275 msdu->len + skb_tailroom(msdu),
276 DMA_FROM_DEVICE);
277 ath10k_dbg_dump(ar, ATH10K_DBG_HTT_DUMP, NULL, "htt rx netbuf pop: ",
278 msdu->data, msdu->len + skb_tailroom(msdu));
Michal Kazior4de02802014-10-23 17:04:23 +0300279
Kalle Valo5e3dd152013-06-12 20:52:10 +0300280 return msdu;
281}
282
Janusz Dziedzicd84dd602014-03-24 21:23:20 +0100283/* return: < 0 fatal error, 0 - non chained msdu, 1 chained msdu */
Kalle Valo5e3dd152013-06-12 20:52:10 +0300284static int ath10k_htt_rx_amsdu_pop(struct ath10k_htt *htt,
285 u8 **fw_desc, int *fw_desc_len,
Michal Kaziorf0e27702014-11-18 09:24:49 +0200286 struct sk_buff_head *amsdu)
Kalle Valo5e3dd152013-06-12 20:52:10 +0300287{
Michal Kazior7aa7a722014-08-25 12:09:38 +0200288 struct ath10k *ar = htt->ar;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300289 int msdu_len, msdu_chaining = 0;
Michal Kazior9aa505d2014-11-18 09:24:47 +0200290 struct sk_buff *msdu;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300291 struct htt_rx_desc *rx_desc;
292
Michal Kazior45967082014-02-27 18:50:05 +0200293 lockdep_assert_held(&htt->rx_ring.lock);
294
Michal Kazior9aa505d2014-11-18 09:24:47 +0200295 for (;;) {
Kalle Valo5e3dd152013-06-12 20:52:10 +0300296 int last_msdu, msdu_len_invalid, msdu_chained;
297
Michal Kazior9aa505d2014-11-18 09:24:47 +0200298 msdu = ath10k_htt_rx_netbuf_pop(htt);
299 if (!msdu) {
Michal Kazior9aa505d2014-11-18 09:24:47 +0200300 __skb_queue_purge(amsdu);
Michal Kaziore0bd7512014-11-18 09:24:48 +0200301 return -ENOENT;
Michal Kazior9aa505d2014-11-18 09:24:47 +0200302 }
303
304 __skb_queue_tail(amsdu, msdu);
305
Kalle Valo5e3dd152013-06-12 20:52:10 +0300306 rx_desc = (struct htt_rx_desc *)msdu->data;
307
308 /* FIXME: we must report msdu payload since this is what caller
309 * expects now */
310 skb_put(msdu, offsetof(struct htt_rx_desc, msdu_payload));
311 skb_pull(msdu, offsetof(struct htt_rx_desc, msdu_payload));
312
313 /*
314 * Sanity check - confirm the HW is finished filling in the
315 * rx data.
316 * If the HW and SW are working correctly, then it's guaranteed
317 * that the HW's MAC DMA is done before this point in the SW.
318 * To prevent the case that we handle a stale Rx descriptor,
319 * just assert for now until we have a way to recover.
320 */
321 if (!(__le32_to_cpu(rx_desc->attention.flags)
322 & RX_ATTENTION_FLAGS_MSDU_DONE)) {
Michal Kazior9aa505d2014-11-18 09:24:47 +0200323 __skb_queue_purge(amsdu);
Michal Kaziore0bd7512014-11-18 09:24:48 +0200324 return -EIO;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300325 }
326
327 /*
328 * Copy the FW rx descriptor for this MSDU from the rx
329 * indication message into the MSDU's netbuf. HL uses the
330 * same rx indication message definition as LL, and simply
331 * appends new info (fields from the HW rx desc, and the
332 * MSDU payload itself). So, the offset into the rx
333 * indication message only has to account for the standard
334 * offset of the per-MSDU FW rx desc info within the
335 * message, and how many bytes of the per-MSDU FW rx desc
336 * info have already been consumed. (And the endianness of
337 * the host, since for a big-endian host, the rx ind
338 * message contents, including the per-MSDU rx desc bytes,
339 * were byteswapped during upload.)
340 */
341 if (*fw_desc_len > 0) {
342 rx_desc->fw_desc.info0 = **fw_desc;
343 /*
344 * The target is expected to only provide the basic
345 * per-MSDU rx descriptors. Just to be sure, verify
346 * that the target has not attached extension data
347 * (e.g. LRO flow ID).
348 */
349
350 /* or more, if there's extension data */
351 (*fw_desc)++;
352 (*fw_desc_len)--;
353 } else {
354 /*
355 * When an oversized AMSDU happened, FW will lost
356 * some of MSDU status - in this case, the FW
357 * descriptors provided will be less than the
358 * actual MSDUs inside this MPDU. Mark the FW
359 * descriptors so that it will still deliver to
360 * upper stack, if no CRC error for this MPDU.
361 *
362 * FIX THIS - the FW descriptors are actually for
363 * MSDUs in the end of this A-MSDU instead of the
364 * beginning.
365 */
366 rx_desc->fw_desc.info0 = 0;
367 }
368
369 msdu_len_invalid = !!(__le32_to_cpu(rx_desc->attention.flags)
370 & (RX_ATTENTION_FLAGS_MPDU_LENGTH_ERR |
371 RX_ATTENTION_FLAGS_MSDU_LENGTH_ERR));
Peter Oh1f5dbfb2015-07-15 19:01:21 -0700372 msdu_len = MS(__le32_to_cpu(rx_desc->msdu_start.common.info0),
Kalle Valo5e3dd152013-06-12 20:52:10 +0300373 RX_MSDU_START_INFO0_MSDU_LENGTH);
374 msdu_chained = rx_desc->frag_info.ring2_more_count;
375
376 if (msdu_len_invalid)
377 msdu_len = 0;
378
379 skb_trim(msdu, 0);
380 skb_put(msdu, min(msdu_len, HTT_RX_MSDU_SIZE));
381 msdu_len -= msdu->len;
382
Michal Kazior9aa505d2014-11-18 09:24:47 +0200383 /* Note: Chained buffers do not contain rx descriptor */
Kalle Valo5e3dd152013-06-12 20:52:10 +0300384 while (msdu_chained--) {
Michal Kazior9aa505d2014-11-18 09:24:47 +0200385 msdu = ath10k_htt_rx_netbuf_pop(htt);
386 if (!msdu) {
Michal Kazior9aa505d2014-11-18 09:24:47 +0200387 __skb_queue_purge(amsdu);
Michal Kaziore0bd7512014-11-18 09:24:48 +0200388 return -ENOENT;
Michal Kaziorb30595a2014-10-23 17:04:24 +0300389 }
390
Michal Kazior9aa505d2014-11-18 09:24:47 +0200391 __skb_queue_tail(amsdu, msdu);
392 skb_trim(msdu, 0);
393 skb_put(msdu, min(msdu_len, HTT_RX_BUF_SIZE));
394 msdu_len -= msdu->len;
Michal Kaziorede9c8e2014-05-14 16:23:31 +0300395 msdu_chaining = 1;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300396 }
397
Peter Oh1f5dbfb2015-07-15 19:01:21 -0700398 last_msdu = __le32_to_cpu(rx_desc->msdu_end.common.info0) &
Kalle Valo5e3dd152013-06-12 20:52:10 +0300399 RX_MSDU_END_INFO0_LAST_MSDU;
400
Michal Kaziorb04e2042014-10-23 17:04:27 +0300401 trace_ath10k_htt_rx_desc(ar, &rx_desc->attention,
Rajkumar Manoharana0883cf2014-10-03 08:02:47 +0300402 sizeof(*rx_desc) - sizeof(u32));
Michal Kazior9aa505d2014-11-18 09:24:47 +0200403
404 if (last_msdu)
Kalle Valo5e3dd152013-06-12 20:52:10 +0300405 break;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300406 }
Kalle Valo5e3dd152013-06-12 20:52:10 +0300407
Michal Kazior9aa505d2014-11-18 09:24:47 +0200408 if (skb_queue_empty(amsdu))
Janusz Dziedzicd84dd602014-03-24 21:23:20 +0100409 msdu_chaining = -1;
410
Kalle Valo5e3dd152013-06-12 20:52:10 +0300411 /*
412 * Don't refill the ring yet.
413 *
414 * First, the elements popped here are still in use - it is not
415 * safe to overwrite them until the matching call to
416 * mpdu_desc_list_next. Second, for efficiency it is preferable to
417 * refill the rx ring with 1 PPDU's worth of rx buffers (something
418 * like 32 x 3 buffers), rather than one MPDU's worth of rx buffers
419 * (something like 3 buffers). Consequently, we'll rely on the txrx
420 * SW to tell us when it is done pulling all the PPDU's rx buffers
421 * out of the rx ring, and then refill it just once.
422 */
423
424 return msdu_chaining;
425}
426
Michal Kazior6e712d42013-09-24 10:18:36 +0200427static void ath10k_htt_rx_replenish_task(unsigned long ptr)
428{
429 struct ath10k_htt *htt = (struct ath10k_htt *)ptr;
Kalle Valoaf762c02014-09-14 12:50:17 +0300430
Michal Kazior6e712d42013-09-24 10:18:36 +0200431 ath10k_htt_rx_msdu_buff_replenish(htt);
432}
433
Michal Kaziorc5450702015-01-24 12:14:48 +0200434static struct sk_buff *ath10k_htt_rx_pop_paddr(struct ath10k_htt *htt,
435 u32 paddr)
436{
437 struct ath10k *ar = htt->ar;
438 struct ath10k_skb_rxcb *rxcb;
439 struct sk_buff *msdu;
440
441 lockdep_assert_held(&htt->rx_ring.lock);
442
443 msdu = ath10k_htt_rx_find_skb_paddr(ar, paddr);
444 if (!msdu)
445 return NULL;
446
447 rxcb = ATH10K_SKB_RXCB(msdu);
448 hash_del(&rxcb->hlist);
449 htt->rx_ring.fill_cnt--;
450
451 dma_unmap_single(htt->ar->dev, rxcb->paddr,
452 msdu->len + skb_tailroom(msdu),
453 DMA_FROM_DEVICE);
454 ath10k_dbg_dump(ar, ATH10K_DBG_HTT_DUMP, NULL, "htt rx netbuf pop: ",
455 msdu->data, msdu->len + skb_tailroom(msdu));
456
457 return msdu;
458}
459
460static int ath10k_htt_rx_pop_paddr_list(struct ath10k_htt *htt,
461 struct htt_rx_in_ord_ind *ev,
462 struct sk_buff_head *list)
463{
464 struct ath10k *ar = htt->ar;
465 struct htt_rx_in_ord_msdu_desc *msdu_desc = ev->msdu_descs;
466 struct htt_rx_desc *rxd;
467 struct sk_buff *msdu;
468 int msdu_count;
469 bool is_offload;
470 u32 paddr;
471
472 lockdep_assert_held(&htt->rx_ring.lock);
473
474 msdu_count = __le16_to_cpu(ev->msdu_count);
475 is_offload = !!(ev->info & HTT_RX_IN_ORD_IND_INFO_OFFLOAD_MASK);
476
477 while (msdu_count--) {
478 paddr = __le32_to_cpu(msdu_desc->msdu_paddr);
479
480 msdu = ath10k_htt_rx_pop_paddr(htt, paddr);
481 if (!msdu) {
482 __skb_queue_purge(list);
483 return -ENOENT;
484 }
485
486 __skb_queue_tail(list, msdu);
487
488 if (!is_offload) {
489 rxd = (void *)msdu->data;
490
491 trace_ath10k_htt_rx_desc(ar, rxd, sizeof(*rxd));
492
493 skb_put(msdu, sizeof(*rxd));
494 skb_pull(msdu, sizeof(*rxd));
495 skb_put(msdu, __le16_to_cpu(msdu_desc->msdu_len));
496
497 if (!(__le32_to_cpu(rxd->attention.flags) &
498 RX_ATTENTION_FLAGS_MSDU_DONE)) {
499 ath10k_warn(htt->ar, "tried to pop an incomplete frame, oops!\n");
500 return -EIO;
501 }
502 }
503
504 msdu_desc++;
505 }
506
507 return 0;
508}
509
Michal Kazior95bf21f2014-05-16 17:15:39 +0300510int ath10k_htt_rx_alloc(struct ath10k_htt *htt)
Kalle Valo5e3dd152013-06-12 20:52:10 +0300511{
Michal Kazior7aa7a722014-08-25 12:09:38 +0200512 struct ath10k *ar = htt->ar;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300513 dma_addr_t paddr;
514 void *vaddr;
Kalle Valobd8bdbb2014-09-14 12:50:00 +0300515 size_t size;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300516 struct timer_list *timer = &htt->rx_ring.refill_retry_timer;
517
Michal Kazior51fc7d72014-10-23 17:04:24 +0300518 htt->rx_confused = false;
519
Michal Kaziorfe2407a2014-11-27 11:12:43 +0100520 /* XXX: The fill level could be changed during runtime in response to
521 * the host processing latency. Is this really worth it?
522 */
523 htt->rx_ring.size = HTT_RX_RING_SIZE;
524 htt->rx_ring.size_mask = htt->rx_ring.size - 1;
525 htt->rx_ring.fill_level = HTT_RX_RING_FILL_LEVEL;
526
Kalle Valo5e3dd152013-06-12 20:52:10 +0300527 if (!is_power_of_2(htt->rx_ring.size)) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200528 ath10k_warn(ar, "htt rx ring size is not power of 2\n");
Kalle Valo5e3dd152013-06-12 20:52:10 +0300529 return -EINVAL;
530 }
531
Kalle Valo5e3dd152013-06-12 20:52:10 +0300532 htt->rx_ring.netbufs_ring =
Michal Kazior3e841fd2014-05-14 16:23:31 +0300533 kzalloc(htt->rx_ring.size * sizeof(struct sk_buff *),
Kalle Valo5e3dd152013-06-12 20:52:10 +0300534 GFP_KERNEL);
535 if (!htt->rx_ring.netbufs_ring)
536 goto err_netbuf;
537
Kalle Valobd8bdbb2014-09-14 12:50:00 +0300538 size = htt->rx_ring.size * sizeof(htt->rx_ring.paddrs_ring);
539
Felix Fietkaud6cb23b52015-11-24 11:36:52 +0100540 vaddr = dma_alloc_coherent(htt->ar->dev, size, &paddr, GFP_KERNEL);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300541 if (!vaddr)
542 goto err_dma_ring;
543
544 htt->rx_ring.paddrs_ring = vaddr;
545 htt->rx_ring.base_paddr = paddr;
546
547 vaddr = dma_alloc_coherent(htt->ar->dev,
548 sizeof(*htt->rx_ring.alloc_idx.vaddr),
Felix Fietkaud6cb23b52015-11-24 11:36:52 +0100549 &paddr, GFP_KERNEL);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300550 if (!vaddr)
551 goto err_dma_idx;
552
553 htt->rx_ring.alloc_idx.vaddr = vaddr;
554 htt->rx_ring.alloc_idx.paddr = paddr;
Michal Kaziorc5450702015-01-24 12:14:48 +0200555 htt->rx_ring.sw_rd_idx.msdu_payld = htt->rx_ring.size_mask;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300556 *htt->rx_ring.alloc_idx.vaddr = 0;
557
558 /* Initialize the Rx refill retry timer */
559 setup_timer(timer, ath10k_htt_rx_ring_refill_retry, (unsigned long)htt);
560
561 spin_lock_init(&htt->rx_ring.lock);
562
563 htt->rx_ring.fill_cnt = 0;
Michal Kaziorc5450702015-01-24 12:14:48 +0200564 htt->rx_ring.sw_rd_idx.msdu_payld = 0;
565 hash_init(htt->rx_ring.skb_table);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300566
Michal Kazior6e712d42013-09-24 10:18:36 +0200567 tasklet_init(&htt->rx_replenish_task, ath10k_htt_rx_replenish_task,
568 (unsigned long)htt);
569
Michal Kazior6c5151a2014-02-27 18:50:04 +0200570 skb_queue_head_init(&htt->tx_compl_q);
571 skb_queue_head_init(&htt->rx_compl_q);
Michal Kaziorc5450702015-01-24 12:14:48 +0200572 skb_queue_head_init(&htt->rx_in_ord_compl_q);
Michal Kazior426e10e2016-03-06 16:14:43 +0200573 skb_queue_head_init(&htt->tx_fetch_ind_q);
Michal Kazior6c5151a2014-02-27 18:50:04 +0200574
575 tasklet_init(&htt->txrx_compl_task, ath10k_htt_txrx_compl_task,
576 (unsigned long)htt);
577
Michal Kazior7aa7a722014-08-25 12:09:38 +0200578 ath10k_dbg(ar, ATH10K_DBG_BOOT, "htt rx ring size %d fill_level %d\n",
Kalle Valo5e3dd152013-06-12 20:52:10 +0300579 htt->rx_ring.size, htt->rx_ring.fill_level);
580 return 0;
581
Kalle Valo5e3dd152013-06-12 20:52:10 +0300582err_dma_idx:
583 dma_free_coherent(htt->ar->dev,
584 (htt->rx_ring.size *
585 sizeof(htt->rx_ring.paddrs_ring)),
586 htt->rx_ring.paddrs_ring,
587 htt->rx_ring.base_paddr);
588err_dma_ring:
589 kfree(htt->rx_ring.netbufs_ring);
590err_netbuf:
591 return -ENOMEM;
592}
593
Michal Kazior7aa7a722014-08-25 12:09:38 +0200594static int ath10k_htt_rx_crypto_param_len(struct ath10k *ar,
595 enum htt_rx_mpdu_encrypt_type type)
Kalle Valo5e3dd152013-06-12 20:52:10 +0300596{
597 switch (type) {
Kalle Valo5e3dd152013-06-12 20:52:10 +0300598 case HTT_RX_MPDU_ENCRYPT_NONE:
599 return 0;
Michal Kazior890d3b22014-10-23 17:04:22 +0300600 case HTT_RX_MPDU_ENCRYPT_WEP40:
601 case HTT_RX_MPDU_ENCRYPT_WEP104:
602 return IEEE80211_WEP_IV_LEN;
603 case HTT_RX_MPDU_ENCRYPT_TKIP_WITHOUT_MIC:
604 case HTT_RX_MPDU_ENCRYPT_TKIP_WPA:
605 return IEEE80211_TKIP_IV_LEN;
606 case HTT_RX_MPDU_ENCRYPT_AES_CCM_WPA2:
607 return IEEE80211_CCMP_HDR_LEN;
608 case HTT_RX_MPDU_ENCRYPT_WEP128:
609 case HTT_RX_MPDU_ENCRYPT_WAPI:
610 break;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300611 }
612
Michal Kazior890d3b22014-10-23 17:04:22 +0300613 ath10k_warn(ar, "unsupported encryption type %d\n", type);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300614 return 0;
615}
616
Michal Kazior890d3b22014-10-23 17:04:22 +0300617#define MICHAEL_MIC_LEN 8
618
Michal Kazior7aa7a722014-08-25 12:09:38 +0200619static int ath10k_htt_rx_crypto_tail_len(struct ath10k *ar,
620 enum htt_rx_mpdu_encrypt_type type)
Kalle Valo5e3dd152013-06-12 20:52:10 +0300621{
622 switch (type) {
623 case HTT_RX_MPDU_ENCRYPT_NONE:
Michal Kazior890d3b22014-10-23 17:04:22 +0300624 return 0;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300625 case HTT_RX_MPDU_ENCRYPT_WEP40:
626 case HTT_RX_MPDU_ENCRYPT_WEP104:
Michal Kazior890d3b22014-10-23 17:04:22 +0300627 return IEEE80211_WEP_ICV_LEN;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300628 case HTT_RX_MPDU_ENCRYPT_TKIP_WITHOUT_MIC:
629 case HTT_RX_MPDU_ENCRYPT_TKIP_WPA:
Michal Kazior890d3b22014-10-23 17:04:22 +0300630 return IEEE80211_TKIP_ICV_LEN;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300631 case HTT_RX_MPDU_ENCRYPT_AES_CCM_WPA2:
Michal Kazior890d3b22014-10-23 17:04:22 +0300632 return IEEE80211_CCMP_MIC_LEN;
633 case HTT_RX_MPDU_ENCRYPT_WEP128:
634 case HTT_RX_MPDU_ENCRYPT_WAPI:
635 break;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300636 }
637
Michal Kazior890d3b22014-10-23 17:04:22 +0300638 ath10k_warn(ar, "unsupported encryption type %d\n", type);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300639 return 0;
640}
641
Michal Kaziorf6dc2092013-09-26 10:12:22 +0300642struct amsdu_subframe_hdr {
643 u8 dst[ETH_ALEN];
644 u8 src[ETH_ALEN];
645 __be16 len;
646} __packed;
647
Michal Kazior6986fdd2015-08-27 14:47:33 +0200648#define GROUP_ID_IS_SU_MIMO(x) ((x) == 0 || (x) == 63)
649
Janusz Dziedzic87326c92014-03-24 21:23:19 +0100650static void ath10k_htt_rx_h_rates(struct ath10k *ar,
Michal Kaziorb9fd8a82014-11-18 09:24:49 +0200651 struct ieee80211_rx_status *status,
652 struct htt_rx_desc *rxd)
Janusz Dziedzic73539b42014-03-24 21:23:15 +0100653{
Michal Kazior5528e032015-03-30 09:51:56 +0300654 struct ieee80211_supported_band *sband;
655 u8 cck, rate, bw, sgi, mcs, nss;
Janusz Dziedzic73539b42014-03-24 21:23:15 +0100656 u8 preamble = 0;
Michal Kazior6986fdd2015-08-27 14:47:33 +0200657 u8 group_id;
Michal Kaziorb9fd8a82014-11-18 09:24:49 +0200658 u32 info1, info2, info3;
Janusz Dziedzic73539b42014-03-24 21:23:15 +0100659
Michal Kaziorb9fd8a82014-11-18 09:24:49 +0200660 info1 = __le32_to_cpu(rxd->ppdu_start.info1);
661 info2 = __le32_to_cpu(rxd->ppdu_start.info2);
662 info3 = __le32_to_cpu(rxd->ppdu_start.info3);
663
664 preamble = MS(info1, RX_PPDU_START_INFO1_PREAMBLE_TYPE);
Janusz Dziedzic73539b42014-03-24 21:23:15 +0100665
666 switch (preamble) {
667 case HTT_RX_LEGACY:
Michal Kazior5528e032015-03-30 09:51:56 +0300668 /* To get legacy rate index band is required. Since band can't
669 * be undefined check if freq is non-zero.
670 */
671 if (!status->freq)
672 return;
673
Michal Kaziorb9fd8a82014-11-18 09:24:49 +0200674 cck = info1 & RX_PPDU_START_INFO1_L_SIG_RATE_SELECT;
675 rate = MS(info1, RX_PPDU_START_INFO1_L_SIG_RATE);
Michal Kazior5528e032015-03-30 09:51:56 +0300676 rate &= ~RX_PPDU_START_RATE_FLAG;
Janusz Dziedzic73539b42014-03-24 21:23:15 +0100677
Michal Kazior5528e032015-03-30 09:51:56 +0300678 sband = &ar->mac.sbands[status->band];
Yanbo Li4b7f3532015-11-12 10:36:10 -0800679 status->rate_idx = ath10k_mac_hw_rate_to_idx(sband, rate, cck);
Janusz Dziedzic73539b42014-03-24 21:23:15 +0100680 break;
681 case HTT_RX_HT:
682 case HTT_RX_HT_WITH_TXBF:
Michal Kaziorb9fd8a82014-11-18 09:24:49 +0200683 /* HT-SIG - Table 20-11 in info2 and info3 */
684 mcs = info2 & 0x1F;
Janusz Dziedzic73539b42014-03-24 21:23:15 +0100685 nss = mcs >> 3;
Michal Kaziorb9fd8a82014-11-18 09:24:49 +0200686 bw = (info2 >> 7) & 1;
687 sgi = (info3 >> 7) & 1;
Janusz Dziedzic73539b42014-03-24 21:23:15 +0100688
689 status->rate_idx = mcs;
690 status->flag |= RX_FLAG_HT;
691 if (sgi)
692 status->flag |= RX_FLAG_SHORT_GI;
693 if (bw)
694 status->flag |= RX_FLAG_40MHZ;
695 break;
696 case HTT_RX_VHT:
697 case HTT_RX_VHT_WITH_TXBF:
Michal Kaziorb9fd8a82014-11-18 09:24:49 +0200698 /* VHT-SIG-A1 in info2, VHT-SIG-A2 in info3
Janusz Dziedzic73539b42014-03-24 21:23:15 +0100699 TODO check this */
Michal Kaziorb9fd8a82014-11-18 09:24:49 +0200700 bw = info2 & 3;
701 sgi = info3 & 1;
Michal Kazior6986fdd2015-08-27 14:47:33 +0200702 group_id = (info2 >> 4) & 0x3F;
703
704 if (GROUP_ID_IS_SU_MIMO(group_id)) {
705 mcs = (info3 >> 4) & 0x0F;
706 nss = ((info2 >> 10) & 0x07) + 1;
707 } else {
708 /* Hardware doesn't decode VHT-SIG-B into Rx descriptor
709 * so it's impossible to decode MCS. Also since
710 * firmware consumes Group Id Management frames host
711 * has no knowledge regarding group/user position
712 * mapping so it's impossible to pick the correct Nsts
713 * from VHT-SIG-A1.
714 *
715 * Bandwidth and SGI are valid so report the rateinfo
716 * on best-effort basis.
717 */
718 mcs = 0;
719 nss = 1;
720 }
Janusz Dziedzic73539b42014-03-24 21:23:15 +0100721
Manikanta Pubbisetty6ccea102015-09-02 17:05:27 +0300722 if (mcs > 0x09) {
723 ath10k_warn(ar, "invalid MCS received %u\n", mcs);
724 ath10k_warn(ar, "rxd %08x mpdu start %08x %08x msdu start %08x %08x ppdu start %08x %08x %08x %08x %08x\n",
725 __le32_to_cpu(rxd->attention.flags),
726 __le32_to_cpu(rxd->mpdu_start.info0),
727 __le32_to_cpu(rxd->mpdu_start.info1),
728 __le32_to_cpu(rxd->msdu_start.common.info0),
729 __le32_to_cpu(rxd->msdu_start.common.info1),
730 rxd->ppdu_start.info0,
731 __le32_to_cpu(rxd->ppdu_start.info1),
732 __le32_to_cpu(rxd->ppdu_start.info2),
733 __le32_to_cpu(rxd->ppdu_start.info3),
734 __le32_to_cpu(rxd->ppdu_start.info4));
735
736 ath10k_warn(ar, "msdu end %08x mpdu end %08x\n",
737 __le32_to_cpu(rxd->msdu_end.common.info0),
738 __le32_to_cpu(rxd->mpdu_end.info0));
739
740 ath10k_dbg_dump(ar, ATH10K_DBG_HTT_DUMP, NULL,
741 "rx desc msdu payload: ",
742 rxd->msdu_payload, 50);
743 }
744
Janusz Dziedzic73539b42014-03-24 21:23:15 +0100745 status->rate_idx = mcs;
746 status->vht_nss = nss;
747
748 if (sgi)
749 status->flag |= RX_FLAG_SHORT_GI;
750
751 switch (bw) {
752 /* 20MHZ */
753 case 0:
754 break;
755 /* 40MHZ */
756 case 1:
757 status->flag |= RX_FLAG_40MHZ;
758 break;
759 /* 80MHZ */
760 case 2:
761 status->vht_flag |= RX_VHT_FLAG_80MHZ;
762 }
763
764 status->flag |= RX_FLAG_VHT;
765 break;
766 default:
767 break;
768 }
769}
770
Michal Kazior500ff9f2015-03-31 10:26:21 +0000771static struct ieee80211_channel *
772ath10k_htt_rx_h_peer_channel(struct ath10k *ar, struct htt_rx_desc *rxd)
773{
774 struct ath10k_peer *peer;
775 struct ath10k_vif *arvif;
776 struct cfg80211_chan_def def;
777 u16 peer_id;
778
779 lockdep_assert_held(&ar->data_lock);
780
781 if (!rxd)
782 return NULL;
783
784 if (rxd->attention.flags &
785 __cpu_to_le32(RX_ATTENTION_FLAGS_PEER_IDX_INVALID))
786 return NULL;
787
Peter Oh1f5dbfb2015-07-15 19:01:21 -0700788 if (!(rxd->msdu_end.common.info0 &
Michal Kazior500ff9f2015-03-31 10:26:21 +0000789 __cpu_to_le32(RX_MSDU_END_INFO0_FIRST_MSDU)))
790 return NULL;
791
792 peer_id = MS(__le32_to_cpu(rxd->mpdu_start.info0),
793 RX_MPDU_START_INFO0_PEER_IDX);
794
795 peer = ath10k_peer_find_by_id(ar, peer_id);
796 if (!peer)
797 return NULL;
798
799 arvif = ath10k_get_arvif(ar, peer->vdev_id);
800 if (WARN_ON_ONCE(!arvif))
801 return NULL;
802
803 if (WARN_ON(ath10k_mac_vif_chan(arvif->vif, &def)))
804 return NULL;
805
806 return def.chan;
807}
808
809static struct ieee80211_channel *
810ath10k_htt_rx_h_vdev_channel(struct ath10k *ar, u32 vdev_id)
811{
812 struct ath10k_vif *arvif;
813 struct cfg80211_chan_def def;
814
815 lockdep_assert_held(&ar->data_lock);
816
817 list_for_each_entry(arvif, &ar->arvifs, list) {
818 if (arvif->vdev_id == vdev_id &&
819 ath10k_mac_vif_chan(arvif->vif, &def) == 0)
820 return def.chan;
821 }
822
823 return NULL;
824}
825
826static void
827ath10k_htt_rx_h_any_chan_iter(struct ieee80211_hw *hw,
828 struct ieee80211_chanctx_conf *conf,
829 void *data)
830{
831 struct cfg80211_chan_def *def = data;
832
833 *def = conf->def;
834}
835
836static struct ieee80211_channel *
837ath10k_htt_rx_h_any_channel(struct ath10k *ar)
838{
839 struct cfg80211_chan_def def = {};
840
841 ieee80211_iter_chan_contexts_atomic(ar->hw,
842 ath10k_htt_rx_h_any_chan_iter,
843 &def);
844
845 return def.chan;
846}
847
Janusz Dziedzic36653f02014-03-24 21:23:18 +0100848static bool ath10k_htt_rx_h_channel(struct ath10k *ar,
Michal Kazior500ff9f2015-03-31 10:26:21 +0000849 struct ieee80211_rx_status *status,
850 struct htt_rx_desc *rxd,
851 u32 vdev_id)
Janusz Dziedzic36653f02014-03-24 21:23:18 +0100852{
853 struct ieee80211_channel *ch;
854
855 spin_lock_bh(&ar->data_lock);
856 ch = ar->scan_channel;
857 if (!ch)
858 ch = ar->rx_channel;
Michal Kazior500ff9f2015-03-31 10:26:21 +0000859 if (!ch)
860 ch = ath10k_htt_rx_h_peer_channel(ar, rxd);
861 if (!ch)
862 ch = ath10k_htt_rx_h_vdev_channel(ar, vdev_id);
863 if (!ch)
864 ch = ath10k_htt_rx_h_any_channel(ar);
Janusz Dziedzic36653f02014-03-24 21:23:18 +0100865 spin_unlock_bh(&ar->data_lock);
866
867 if (!ch)
868 return false;
869
870 status->band = ch->band;
871 status->freq = ch->center_freq;
872
873 return true;
874}
875
Michal Kaziorb9fd8a82014-11-18 09:24:49 +0200876static void ath10k_htt_rx_h_signal(struct ath10k *ar,
877 struct ieee80211_rx_status *status,
878 struct htt_rx_desc *rxd)
879{
880 /* FIXME: Get real NF */
881 status->signal = ATH10K_DEFAULT_NOISE_FLOOR +
882 rxd->ppdu_start.rssi_comb;
883 status->flag &= ~RX_FLAG_NO_SIGNAL_VAL;
884}
885
886static void ath10k_htt_rx_h_mactime(struct ath10k *ar,
887 struct ieee80211_rx_status *status,
888 struct htt_rx_desc *rxd)
889{
890 /* FIXME: TSF is known only at the end of PPDU, in the last MPDU. This
891 * means all prior MSDUs in a PPDU are reported to mac80211 without the
892 * TSF. Is it worth holding frames until end of PPDU is known?
893 *
894 * FIXME: Can we get/compute 64bit TSF?
895 */
Michal Kazior3ec79e32015-01-24 12:14:48 +0200896 status->mactime = __le32_to_cpu(rxd->ppdu_end.common.tsf_timestamp);
Michal Kaziorb9fd8a82014-11-18 09:24:49 +0200897 status->flag |= RX_FLAG_MACTIME_END;
898}
899
900static void ath10k_htt_rx_h_ppdu(struct ath10k *ar,
901 struct sk_buff_head *amsdu,
Michal Kazior500ff9f2015-03-31 10:26:21 +0000902 struct ieee80211_rx_status *status,
903 u32 vdev_id)
Michal Kaziorb9fd8a82014-11-18 09:24:49 +0200904{
905 struct sk_buff *first;
906 struct htt_rx_desc *rxd;
907 bool is_first_ppdu;
908 bool is_last_ppdu;
909
910 if (skb_queue_empty(amsdu))
911 return;
912
913 first = skb_peek(amsdu);
914 rxd = (void *)first->data - sizeof(*rxd);
915
916 is_first_ppdu = !!(rxd->attention.flags &
917 __cpu_to_le32(RX_ATTENTION_FLAGS_FIRST_MPDU));
918 is_last_ppdu = !!(rxd->attention.flags &
919 __cpu_to_le32(RX_ATTENTION_FLAGS_LAST_MPDU));
920
921 if (is_first_ppdu) {
922 /* New PPDU starts so clear out the old per-PPDU status. */
923 status->freq = 0;
924 status->rate_idx = 0;
925 status->vht_nss = 0;
926 status->vht_flag &= ~RX_VHT_FLAG_80MHZ;
927 status->flag &= ~(RX_FLAG_HT |
928 RX_FLAG_VHT |
929 RX_FLAG_SHORT_GI |
930 RX_FLAG_40MHZ |
931 RX_FLAG_MACTIME_END);
932 status->flag |= RX_FLAG_NO_SIGNAL_VAL;
933
934 ath10k_htt_rx_h_signal(ar, status, rxd);
Michal Kazior500ff9f2015-03-31 10:26:21 +0000935 ath10k_htt_rx_h_channel(ar, status, rxd, vdev_id);
Michal Kaziorb9fd8a82014-11-18 09:24:49 +0200936 ath10k_htt_rx_h_rates(ar, status, rxd);
937 }
938
939 if (is_last_ppdu)
940 ath10k_htt_rx_h_mactime(ar, status, rxd);
941}
942
Janusz Dziedzic76f53292014-07-28 23:59:43 +0300943static const char * const tid_to_ac[] = {
944 "BE",
945 "BK",
946 "BK",
947 "BE",
948 "VI",
949 "VI",
950 "VO",
951 "VO",
952};
953
954static char *ath10k_get_tid(struct ieee80211_hdr *hdr, char *out, size_t size)
955{
956 u8 *qc;
957 int tid;
958
959 if (!ieee80211_is_data_qos(hdr->frame_control))
960 return "";
961
962 qc = ieee80211_get_qos_ctl(hdr);
963 tid = *qc & IEEE80211_QOS_CTL_TID_MASK;
964 if (tid < 8)
965 snprintf(out, size, "tid %d (%s)", tid, tid_to_ac[tid]);
966 else
967 snprintf(out, size, "tid %d", tid);
968
969 return out;
970}
971
Janusz Dziedzic85f6d7c2014-03-24 21:23:22 +0100972static void ath10k_process_rx(struct ath10k *ar,
973 struct ieee80211_rx_status *rx_status,
974 struct sk_buff *skb)
Janusz Dziedzic73539b42014-03-24 21:23:15 +0100975{
976 struct ieee80211_rx_status *status;
Janusz Dziedzic76f53292014-07-28 23:59:43 +0300977 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
978 char tid[32];
Janusz Dziedzic73539b42014-03-24 21:23:15 +0100979
Janusz Dziedzic85f6d7c2014-03-24 21:23:22 +0100980 status = IEEE80211_SKB_RXCB(skb);
981 *status = *rx_status;
Janusz Dziedzic73539b42014-03-24 21:23:15 +0100982
Michal Kazior7aa7a722014-08-25 12:09:38 +0200983 ath10k_dbg(ar, ATH10K_DBG_DATA,
Janusz Dziedzic76f53292014-07-28 23:59:43 +0300984 "rx skb %p len %u peer %pM %s %s sn %u %s%s%s%s%s %srate_idx %u vht_nss %u freq %u band %u flag 0x%x fcs-err %i mic-err %i amsdu-more %i\n",
Janusz Dziedzic85f6d7c2014-03-24 21:23:22 +0100985 skb,
986 skb->len,
Janusz Dziedzic76f53292014-07-28 23:59:43 +0300987 ieee80211_get_SA(hdr),
988 ath10k_get_tid(hdr, tid, sizeof(tid)),
989 is_multicast_ether_addr(ieee80211_get_DA(hdr)) ?
990 "mcast" : "ucast",
991 (__le16_to_cpu(hdr->seq_ctrl) & IEEE80211_SCTL_SEQ) >> 4,
Janusz Dziedzic73539b42014-03-24 21:23:15 +0100992 status->flag == 0 ? "legacy" : "",
993 status->flag & RX_FLAG_HT ? "ht" : "",
994 status->flag & RX_FLAG_VHT ? "vht" : "",
995 status->flag & RX_FLAG_40MHZ ? "40" : "",
996 status->vht_flag & RX_VHT_FLAG_80MHZ ? "80" : "",
997 status->flag & RX_FLAG_SHORT_GI ? "sgi " : "",
998 status->rate_idx,
999 status->vht_nss,
1000 status->freq,
Janusz Dziedzic87326c92014-03-24 21:23:19 +01001001 status->band, status->flag,
Janusz Dziedzic78433f92014-03-24 21:23:21 +01001002 !!(status->flag & RX_FLAG_FAILED_FCS_CRC),
Janusz Dziedzic76f53292014-07-28 23:59:43 +03001003 !!(status->flag & RX_FLAG_MMIC_ERROR),
1004 !!(status->flag & RX_FLAG_AMSDU_MORE));
Michal Kazior7aa7a722014-08-25 12:09:38 +02001005 ath10k_dbg_dump(ar, ATH10K_DBG_HTT_DUMP, NULL, "rx skb: ",
Janusz Dziedzic85f6d7c2014-03-24 21:23:22 +01001006 skb->data, skb->len);
Rajkumar Manoharan5ce8e7f2014-11-05 19:14:31 +05301007 trace_ath10k_rx_hdr(ar, skb->data, skb->len);
1008 trace_ath10k_rx_payload(ar, skb->data, skb->len);
Janusz Dziedzic73539b42014-03-24 21:23:15 +01001009
Janusz Dziedzic85f6d7c2014-03-24 21:23:22 +01001010 ieee80211_rx(ar->hw, skb);
Janusz Dziedzic73539b42014-03-24 21:23:15 +01001011}
1012
Michal Kazior48f4ca32015-05-19 14:09:34 +02001013static int ath10k_htt_rx_nwifi_hdrlen(struct ath10k *ar,
1014 struct ieee80211_hdr *hdr)
Michal Kaziord960c362014-02-25 09:29:57 +02001015{
Michal Kazior48f4ca32015-05-19 14:09:34 +02001016 int len = ieee80211_hdrlen(hdr->frame_control);
1017
1018 if (!test_bit(ATH10K_FW_FEATURE_NO_NWIFI_DECAP_4ADDR_PADDING,
1019 ar->fw_features))
1020 len = round_up(len, 4);
1021
1022 return len;
Michal Kaziord960c362014-02-25 09:29:57 +02001023}
1024
Michal Kazior581c25f2014-11-18 09:24:48 +02001025static void ath10k_htt_rx_h_undecap_raw(struct ath10k *ar,
1026 struct sk_buff *msdu,
1027 struct ieee80211_rx_status *status,
1028 enum htt_rx_mpdu_encrypt_type enctype,
1029 bool is_decrypted)
Kalle Valo5e3dd152013-06-12 20:52:10 +03001030{
Michal Kaziorf6dc2092013-09-26 10:12:22 +03001031 struct ieee80211_hdr *hdr;
Michal Kazior581c25f2014-11-18 09:24:48 +02001032 struct htt_rx_desc *rxd;
1033 size_t hdr_len;
1034 size_t crypto_len;
1035 bool is_first;
1036 bool is_last;
Kalle Valo5e3dd152013-06-12 20:52:10 +03001037
Michal Kazior581c25f2014-11-18 09:24:48 +02001038 rxd = (void *)msdu->data - sizeof(*rxd);
Peter Oh1f5dbfb2015-07-15 19:01:21 -07001039 is_first = !!(rxd->msdu_end.common.info0 &
Michal Kazior581c25f2014-11-18 09:24:48 +02001040 __cpu_to_le32(RX_MSDU_END_INFO0_FIRST_MSDU));
Peter Oh1f5dbfb2015-07-15 19:01:21 -07001041 is_last = !!(rxd->msdu_end.common.info0 &
Michal Kazior581c25f2014-11-18 09:24:48 +02001042 __cpu_to_le32(RX_MSDU_END_INFO0_LAST_MSDU));
Michal Kazior9aa505d2014-11-18 09:24:47 +02001043
Michal Kazior581c25f2014-11-18 09:24:48 +02001044 /* Delivered decapped frame:
1045 * [802.11 header]
1046 * [crypto param] <-- can be trimmed if !fcs_err &&
1047 * !decrypt_err && !peer_idx_invalid
1048 * [amsdu header] <-- only if A-MSDU
1049 * [rfc1042/llc]
1050 * [payload]
1051 * [FCS] <-- at end, needs to be trimmed
1052 */
Kalle Valo5e3dd152013-06-12 20:52:10 +03001053
Michal Kazior581c25f2014-11-18 09:24:48 +02001054 /* This probably shouldn't happen but warn just in case */
1055 if (unlikely(WARN_ON_ONCE(!is_first)))
1056 return;
1057
1058 /* This probably shouldn't happen but warn just in case */
1059 if (unlikely(WARN_ON_ONCE(!(is_first && is_last))))
1060 return;
1061
1062 skb_trim(msdu, msdu->len - FCS_LEN);
1063
1064 /* In most cases this will be true for sniffed frames. It makes sense
David Liuccec9032015-07-24 20:25:32 +03001065 * to deliver them as-is without stripping the crypto param. This is
1066 * necessary for software based decryption.
Michal Kazior581c25f2014-11-18 09:24:48 +02001067 *
1068 * If there's no error then the frame is decrypted. At least that is
1069 * the case for frames that come in via fragmented rx indication.
1070 */
1071 if (!is_decrypted)
1072 return;
1073
1074 /* The payload is decrypted so strip crypto params. Start from tail
1075 * since hdr is used to compute some stuff.
1076 */
1077
1078 hdr = (void *)msdu->data;
1079
1080 /* Tail */
1081 skb_trim(msdu, msdu->len - ath10k_htt_rx_crypto_tail_len(ar, enctype));
1082
1083 /* MMIC */
1084 if (!ieee80211_has_morefrags(hdr->frame_control) &&
1085 enctype == HTT_RX_MPDU_ENCRYPT_TKIP_WPA)
1086 skb_trim(msdu, msdu->len - 8);
1087
1088 /* Head */
Michal Kaziorf6dc2092013-09-26 10:12:22 +03001089 hdr_len = ieee80211_hdrlen(hdr->frame_control);
Michal Kazior581c25f2014-11-18 09:24:48 +02001090 crypto_len = ath10k_htt_rx_crypto_param_len(ar, enctype);
Kalle Valo5e3dd152013-06-12 20:52:10 +03001091
Michal Kazior581c25f2014-11-18 09:24:48 +02001092 memmove((void *)msdu->data + crypto_len,
1093 (void *)msdu->data, hdr_len);
1094 skb_pull(msdu, crypto_len);
Kalle Valo5e3dd152013-06-12 20:52:10 +03001095}
1096
Michal Kazior581c25f2014-11-18 09:24:48 +02001097static void ath10k_htt_rx_h_undecap_nwifi(struct ath10k *ar,
1098 struct sk_buff *msdu,
1099 struct ieee80211_rx_status *status,
1100 const u8 first_hdr[64])
Kalle Valo5e3dd152013-06-12 20:52:10 +03001101{
Kalle Valo5e3dd152013-06-12 20:52:10 +03001102 struct ieee80211_hdr *hdr;
Michal Kazior581c25f2014-11-18 09:24:48 +02001103 size_t hdr_len;
1104 u8 da[ETH_ALEN];
1105 u8 sa[ETH_ALEN];
Kalle Valo5e3dd152013-06-12 20:52:10 +03001106
Michal Kazior581c25f2014-11-18 09:24:48 +02001107 /* Delivered decapped frame:
1108 * [nwifi 802.11 header] <-- replaced with 802.11 hdr
1109 * [rfc1042/llc]
1110 *
1111 * Note: The nwifi header doesn't have QoS Control and is
1112 * (always?) a 3addr frame.
1113 *
1114 * Note2: There's no A-MSDU subframe header. Even if it's part
1115 * of an A-MSDU.
1116 */
1117
1118 /* pull decapped header and copy SA & DA */
Yanbo Lib8d55fc2015-11-16 22:22:02 +02001119 if ((ar->hw_params.hw_4addr_pad == ATH10K_HW_4ADDR_PAD_BEFORE) &&
1120 ieee80211_has_a4(((struct ieee80211_hdr *)first_hdr)->frame_control)) {
1121 /* The QCA99X0 4 address mode pad 2 bytes at the
1122 * beginning of MSDU
1123 */
1124 hdr = (struct ieee80211_hdr *)(msdu->data + 2);
1125 /* The skb length need be extended 2 as the 2 bytes at the tail
1126 * be excluded due to the padding
1127 */
1128 skb_put(msdu, 2);
1129 } else {
1130 hdr = (struct ieee80211_hdr *)(msdu->data);
1131 }
1132
Michal Kazior48f4ca32015-05-19 14:09:34 +02001133 hdr_len = ath10k_htt_rx_nwifi_hdrlen(ar, hdr);
Michal Kazior581c25f2014-11-18 09:24:48 +02001134 ether_addr_copy(da, ieee80211_get_DA(hdr));
1135 ether_addr_copy(sa, ieee80211_get_SA(hdr));
1136 skb_pull(msdu, hdr_len);
1137
1138 /* push original 802.11 header */
1139 hdr = (struct ieee80211_hdr *)first_hdr;
Michal Kaziore3fbf8d2013-09-26 10:12:23 +03001140 hdr_len = ieee80211_hdrlen(hdr->frame_control);
Michal Kazior581c25f2014-11-18 09:24:48 +02001141 memcpy(skb_push(msdu, hdr_len), hdr, hdr_len);
Kalle Valo5e3dd152013-06-12 20:52:10 +03001142
Michal Kazior581c25f2014-11-18 09:24:48 +02001143 /* original 802.11 header has a different DA and in
1144 * case of 4addr it may also have different SA
1145 */
1146 hdr = (struct ieee80211_hdr *)msdu->data;
1147 ether_addr_copy(ieee80211_get_DA(hdr), da);
1148 ether_addr_copy(ieee80211_get_SA(hdr), sa);
1149}
Michal Kaziorf6dc2092013-09-26 10:12:22 +03001150
Michal Kazior581c25f2014-11-18 09:24:48 +02001151static void *ath10k_htt_rx_h_find_rfc1042(struct ath10k *ar,
1152 struct sk_buff *msdu,
1153 enum htt_rx_mpdu_encrypt_type enctype)
1154{
1155 struct ieee80211_hdr *hdr;
1156 struct htt_rx_desc *rxd;
1157 size_t hdr_len, crypto_len;
1158 void *rfc1042;
1159 bool is_first, is_last, is_amsdu;
Michal Kazior784f69d2013-09-26 10:12:23 +03001160
Michal Kazior581c25f2014-11-18 09:24:48 +02001161 rxd = (void *)msdu->data - sizeof(*rxd);
1162 hdr = (void *)rxd->rx_hdr_status;
1163
Peter Oh1f5dbfb2015-07-15 19:01:21 -07001164 is_first = !!(rxd->msdu_end.common.info0 &
Michal Kazior581c25f2014-11-18 09:24:48 +02001165 __cpu_to_le32(RX_MSDU_END_INFO0_FIRST_MSDU));
Peter Oh1f5dbfb2015-07-15 19:01:21 -07001166 is_last = !!(rxd->msdu_end.common.info0 &
Michal Kazior581c25f2014-11-18 09:24:48 +02001167 __cpu_to_le32(RX_MSDU_END_INFO0_LAST_MSDU));
1168 is_amsdu = !(is_first && is_last);
1169
1170 rfc1042 = hdr;
1171
1172 if (is_first) {
Michal Kazior784f69d2013-09-26 10:12:23 +03001173 hdr_len = ieee80211_hdrlen(hdr->frame_control);
Michal Kazior581c25f2014-11-18 09:24:48 +02001174 crypto_len = ath10k_htt_rx_crypto_param_len(ar, enctype);
Michal Kaziore3fbf8d2013-09-26 10:12:23 +03001175
Michal Kazior581c25f2014-11-18 09:24:48 +02001176 rfc1042 += round_up(hdr_len, 4) +
1177 round_up(crypto_len, 4);
Kalle Valo5e3dd152013-06-12 20:52:10 +03001178 }
1179
Michal Kazior581c25f2014-11-18 09:24:48 +02001180 if (is_amsdu)
1181 rfc1042 += sizeof(struct amsdu_subframe_hdr);
Michal Kaziorf6dc2092013-09-26 10:12:22 +03001182
Michal Kazior581c25f2014-11-18 09:24:48 +02001183 return rfc1042;
1184}
1185
1186static void ath10k_htt_rx_h_undecap_eth(struct ath10k *ar,
1187 struct sk_buff *msdu,
1188 struct ieee80211_rx_status *status,
1189 const u8 first_hdr[64],
1190 enum htt_rx_mpdu_encrypt_type enctype)
1191{
1192 struct ieee80211_hdr *hdr;
1193 struct ethhdr *eth;
1194 size_t hdr_len;
1195 void *rfc1042;
1196 u8 da[ETH_ALEN];
1197 u8 sa[ETH_ALEN];
1198
1199 /* Delivered decapped frame:
1200 * [eth header] <-- replaced with 802.11 hdr & rfc1042/llc
1201 * [payload]
1202 */
1203
1204 rfc1042 = ath10k_htt_rx_h_find_rfc1042(ar, msdu, enctype);
1205 if (WARN_ON_ONCE(!rfc1042))
1206 return;
1207
1208 /* pull decapped header and copy SA & DA */
1209 eth = (struct ethhdr *)msdu->data;
1210 ether_addr_copy(da, eth->h_dest);
1211 ether_addr_copy(sa, eth->h_source);
1212 skb_pull(msdu, sizeof(struct ethhdr));
1213
1214 /* push rfc1042/llc/snap */
1215 memcpy(skb_push(msdu, sizeof(struct rfc1042_hdr)), rfc1042,
1216 sizeof(struct rfc1042_hdr));
1217
1218 /* push original 802.11 header */
1219 hdr = (struct ieee80211_hdr *)first_hdr;
1220 hdr_len = ieee80211_hdrlen(hdr->frame_control);
1221 memcpy(skb_push(msdu, hdr_len), hdr, hdr_len);
1222
1223 /* original 802.11 header has a different DA and in
1224 * case of 4addr it may also have different SA
1225 */
1226 hdr = (struct ieee80211_hdr *)msdu->data;
1227 ether_addr_copy(ieee80211_get_DA(hdr), da);
1228 ether_addr_copy(ieee80211_get_SA(hdr), sa);
1229}
1230
1231static void ath10k_htt_rx_h_undecap_snap(struct ath10k *ar,
1232 struct sk_buff *msdu,
1233 struct ieee80211_rx_status *status,
1234 const u8 first_hdr[64])
1235{
1236 struct ieee80211_hdr *hdr;
1237 size_t hdr_len;
1238
1239 /* Delivered decapped frame:
1240 * [amsdu header] <-- replaced with 802.11 hdr
1241 * [rfc1042/llc]
1242 * [payload]
1243 */
1244
1245 skb_pull(msdu, sizeof(struct amsdu_subframe_hdr));
1246
1247 hdr = (struct ieee80211_hdr *)first_hdr;
1248 hdr_len = ieee80211_hdrlen(hdr->frame_control);
1249 memcpy(skb_push(msdu, hdr_len), hdr, hdr_len);
1250}
1251
1252static void ath10k_htt_rx_h_undecap(struct ath10k *ar,
1253 struct sk_buff *msdu,
1254 struct ieee80211_rx_status *status,
1255 u8 first_hdr[64],
1256 enum htt_rx_mpdu_encrypt_type enctype,
1257 bool is_decrypted)
1258{
1259 struct htt_rx_desc *rxd;
1260 enum rx_msdu_decap_format decap;
Michal Kazior581c25f2014-11-18 09:24:48 +02001261
1262 /* First msdu's decapped header:
1263 * [802.11 header] <-- padded to 4 bytes long
1264 * [crypto param] <-- padded to 4 bytes long
1265 * [amsdu header] <-- only if A-MSDU
1266 * [rfc1042/llc]
1267 *
1268 * Other (2nd, 3rd, ..) msdu's decapped header:
1269 * [amsdu header] <-- only if A-MSDU
1270 * [rfc1042/llc]
1271 */
1272
1273 rxd = (void *)msdu->data - sizeof(*rxd);
Peter Oh1f5dbfb2015-07-15 19:01:21 -07001274 decap = MS(__le32_to_cpu(rxd->msdu_start.common.info1),
Michal Kazior581c25f2014-11-18 09:24:48 +02001275 RX_MSDU_START_INFO1_DECAP_FORMAT);
1276
1277 switch (decap) {
1278 case RX_MSDU_DECAP_RAW:
1279 ath10k_htt_rx_h_undecap_raw(ar, msdu, status, enctype,
1280 is_decrypted);
1281 break;
1282 case RX_MSDU_DECAP_NATIVE_WIFI:
1283 ath10k_htt_rx_h_undecap_nwifi(ar, msdu, status, first_hdr);
1284 break;
1285 case RX_MSDU_DECAP_ETHERNET2_DIX:
1286 ath10k_htt_rx_h_undecap_eth(ar, msdu, status, first_hdr, enctype);
1287 break;
1288 case RX_MSDU_DECAP_8023_SNAP_LLC:
1289 ath10k_htt_rx_h_undecap_snap(ar, msdu, status, first_hdr);
1290 break;
1291 }
Kalle Valo5e3dd152013-06-12 20:52:10 +03001292}
1293
Michal Kazior605f81a2013-07-31 10:47:56 +02001294static int ath10k_htt_rx_get_csum_state(struct sk_buff *skb)
1295{
1296 struct htt_rx_desc *rxd;
1297 u32 flags, info;
1298 bool is_ip4, is_ip6;
1299 bool is_tcp, is_udp;
1300 bool ip_csum_ok, tcpudp_csum_ok;
1301
1302 rxd = (void *)skb->data - sizeof(*rxd);
1303 flags = __le32_to_cpu(rxd->attention.flags);
Peter Oh1f5dbfb2015-07-15 19:01:21 -07001304 info = __le32_to_cpu(rxd->msdu_start.common.info1);
Michal Kazior605f81a2013-07-31 10:47:56 +02001305
1306 is_ip4 = !!(info & RX_MSDU_START_INFO1_IPV4_PROTO);
1307 is_ip6 = !!(info & RX_MSDU_START_INFO1_IPV6_PROTO);
1308 is_tcp = !!(info & RX_MSDU_START_INFO1_TCP_PROTO);
1309 is_udp = !!(info & RX_MSDU_START_INFO1_UDP_PROTO);
1310 ip_csum_ok = !(flags & RX_ATTENTION_FLAGS_IP_CHKSUM_FAIL);
1311 tcpudp_csum_ok = !(flags & RX_ATTENTION_FLAGS_TCP_UDP_CHKSUM_FAIL);
1312
1313 if (!is_ip4 && !is_ip6)
1314 return CHECKSUM_NONE;
1315 if (!is_tcp && !is_udp)
1316 return CHECKSUM_NONE;
1317 if (!ip_csum_ok)
1318 return CHECKSUM_NONE;
1319 if (!tcpudp_csum_ok)
1320 return CHECKSUM_NONE;
1321
1322 return CHECKSUM_UNNECESSARY;
1323}
1324
Michal Kazior581c25f2014-11-18 09:24:48 +02001325static void ath10k_htt_rx_h_csum_offload(struct sk_buff *msdu)
1326{
1327 msdu->ip_summed = ath10k_htt_rx_get_csum_state(msdu);
1328}
1329
1330static void ath10k_htt_rx_h_mpdu(struct ath10k *ar,
1331 struct sk_buff_head *amsdu,
1332 struct ieee80211_rx_status *status)
1333{
1334 struct sk_buff *first;
1335 struct sk_buff *last;
1336 struct sk_buff *msdu;
1337 struct htt_rx_desc *rxd;
1338 struct ieee80211_hdr *hdr;
1339 enum htt_rx_mpdu_encrypt_type enctype;
1340 u8 first_hdr[64];
1341 u8 *qos;
1342 size_t hdr_len;
1343 bool has_fcs_err;
1344 bool has_crypto_err;
1345 bool has_tkip_err;
1346 bool has_peer_idx_invalid;
1347 bool is_decrypted;
1348 u32 attention;
1349
1350 if (skb_queue_empty(amsdu))
1351 return;
1352
1353 first = skb_peek(amsdu);
1354 rxd = (void *)first->data - sizeof(*rxd);
1355
1356 enctype = MS(__le32_to_cpu(rxd->mpdu_start.info0),
1357 RX_MPDU_START_INFO0_ENCRYPT_TYPE);
1358
1359 /* First MSDU's Rx descriptor in an A-MSDU contains full 802.11
1360 * decapped header. It'll be used for undecapping of each MSDU.
1361 */
1362 hdr = (void *)rxd->rx_hdr_status;
1363 hdr_len = ieee80211_hdrlen(hdr->frame_control);
1364 memcpy(first_hdr, hdr, hdr_len);
1365
1366 /* Each A-MSDU subframe will use the original header as the base and be
1367 * reported as a separate MSDU so strip the A-MSDU bit from QoS Ctl.
1368 */
1369 hdr = (void *)first_hdr;
1370 qos = ieee80211_get_qos_ctl(hdr);
1371 qos[0] &= ~IEEE80211_QOS_CTL_A_MSDU_PRESENT;
1372
1373 /* Some attention flags are valid only in the last MSDU. */
1374 last = skb_peek_tail(amsdu);
1375 rxd = (void *)last->data - sizeof(*rxd);
1376 attention = __le32_to_cpu(rxd->attention.flags);
1377
1378 has_fcs_err = !!(attention & RX_ATTENTION_FLAGS_FCS_ERR);
1379 has_crypto_err = !!(attention & RX_ATTENTION_FLAGS_DECRYPT_ERR);
1380 has_tkip_err = !!(attention & RX_ATTENTION_FLAGS_TKIP_MIC_ERR);
1381 has_peer_idx_invalid = !!(attention & RX_ATTENTION_FLAGS_PEER_IDX_INVALID);
1382
1383 /* Note: If hardware captures an encrypted frame that it can't decrypt,
1384 * e.g. due to fcs error, missing peer or invalid key data it will
1385 * report the frame as raw.
1386 */
1387 is_decrypted = (enctype != HTT_RX_MPDU_ENCRYPT_NONE &&
1388 !has_fcs_err &&
1389 !has_crypto_err &&
1390 !has_peer_idx_invalid);
1391
1392 /* Clear per-MPDU flags while leaving per-PPDU flags intact. */
1393 status->flag &= ~(RX_FLAG_FAILED_FCS_CRC |
1394 RX_FLAG_MMIC_ERROR |
1395 RX_FLAG_DECRYPTED |
1396 RX_FLAG_IV_STRIPPED |
1397 RX_FLAG_MMIC_STRIPPED);
1398
1399 if (has_fcs_err)
1400 status->flag |= RX_FLAG_FAILED_FCS_CRC;
1401
1402 if (has_tkip_err)
1403 status->flag |= RX_FLAG_MMIC_ERROR;
1404
1405 if (is_decrypted)
1406 status->flag |= RX_FLAG_DECRYPTED |
1407 RX_FLAG_IV_STRIPPED |
1408 RX_FLAG_MMIC_STRIPPED;
1409
1410 skb_queue_walk(amsdu, msdu) {
1411 ath10k_htt_rx_h_csum_offload(msdu);
1412 ath10k_htt_rx_h_undecap(ar, msdu, status, first_hdr, enctype,
1413 is_decrypted);
1414
1415 /* Undecapping involves copying the original 802.11 header back
1416 * to sk_buff. If frame is protected and hardware has decrypted
1417 * it then remove the protected bit.
1418 */
1419 if (!is_decrypted)
1420 continue;
1421
1422 hdr = (void *)msdu->data;
1423 hdr->frame_control &= ~__cpu_to_le16(IEEE80211_FCTL_PROTECTED);
1424 }
1425}
1426
1427static void ath10k_htt_rx_h_deliver(struct ath10k *ar,
1428 struct sk_buff_head *amsdu,
1429 struct ieee80211_rx_status *status)
1430{
1431 struct sk_buff *msdu;
1432
1433 while ((msdu = __skb_dequeue(amsdu))) {
1434 /* Setup per-MSDU flags */
1435 if (skb_queue_empty(amsdu))
1436 status->flag &= ~RX_FLAG_AMSDU_MORE;
1437 else
1438 status->flag |= RX_FLAG_AMSDU_MORE;
1439
1440 ath10k_process_rx(ar, status, msdu);
1441 }
1442}
1443
Michal Kazior9aa505d2014-11-18 09:24:47 +02001444static int ath10k_unchain_msdu(struct sk_buff_head *amsdu)
Ben Greearbfa35362014-03-03 14:07:09 -08001445{
Michal Kazior9aa505d2014-11-18 09:24:47 +02001446 struct sk_buff *skb, *first;
Ben Greearbfa35362014-03-03 14:07:09 -08001447 int space;
1448 int total_len = 0;
1449
1450 /* TODO: Might could optimize this by using
1451 * skb_try_coalesce or similar method to
1452 * decrease copying, or maybe get mac80211 to
1453 * provide a way to just receive a list of
1454 * skb?
1455 */
1456
Michal Kazior9aa505d2014-11-18 09:24:47 +02001457 first = __skb_dequeue(amsdu);
Ben Greearbfa35362014-03-03 14:07:09 -08001458
1459 /* Allocate total length all at once. */
Michal Kazior9aa505d2014-11-18 09:24:47 +02001460 skb_queue_walk(amsdu, skb)
1461 total_len += skb->len;
Ben Greearbfa35362014-03-03 14:07:09 -08001462
Michal Kazior9aa505d2014-11-18 09:24:47 +02001463 space = total_len - skb_tailroom(first);
Ben Greearbfa35362014-03-03 14:07:09 -08001464 if ((space > 0) &&
Michal Kazior9aa505d2014-11-18 09:24:47 +02001465 (pskb_expand_head(first, 0, space, GFP_ATOMIC) < 0)) {
Ben Greearbfa35362014-03-03 14:07:09 -08001466 /* TODO: bump some rx-oom error stat */
1467 /* put it back together so we can free the
1468 * whole list at once.
1469 */
Michal Kazior9aa505d2014-11-18 09:24:47 +02001470 __skb_queue_head(amsdu, first);
Ben Greearbfa35362014-03-03 14:07:09 -08001471 return -1;
1472 }
1473
1474 /* Walk list again, copying contents into
1475 * msdu_head
1476 */
Michal Kazior9aa505d2014-11-18 09:24:47 +02001477 while ((skb = __skb_dequeue(amsdu))) {
1478 skb_copy_from_linear_data(skb, skb_put(first, skb->len),
1479 skb->len);
1480 dev_kfree_skb_any(skb);
Ben Greearbfa35362014-03-03 14:07:09 -08001481 }
1482
Michal Kazior9aa505d2014-11-18 09:24:47 +02001483 __skb_queue_head(amsdu, first);
Ben Greearbfa35362014-03-03 14:07:09 -08001484 return 0;
1485}
1486
Michal Kazior581c25f2014-11-18 09:24:48 +02001487static void ath10k_htt_rx_h_unchain(struct ath10k *ar,
1488 struct sk_buff_head *amsdu,
1489 bool chained)
Janusz Dziedzic2acc4eb2014-03-19 07:09:40 +01001490{
Michal Kazior581c25f2014-11-18 09:24:48 +02001491 struct sk_buff *first;
1492 struct htt_rx_desc *rxd;
1493 enum rx_msdu_decap_format decap;
Michal Kazior7aa7a722014-08-25 12:09:38 +02001494
Michal Kazior581c25f2014-11-18 09:24:48 +02001495 first = skb_peek(amsdu);
1496 rxd = (void *)first->data - sizeof(*rxd);
Peter Oh1f5dbfb2015-07-15 19:01:21 -07001497 decap = MS(__le32_to_cpu(rxd->msdu_start.common.info1),
Michal Kazior581c25f2014-11-18 09:24:48 +02001498 RX_MSDU_START_INFO1_DECAP_FORMAT);
1499
1500 if (!chained)
1501 return;
1502
1503 /* FIXME: Current unchaining logic can only handle simple case of raw
1504 * msdu chaining. If decapping is other than raw the chaining may be
1505 * more complex and this isn't handled by the current code. Don't even
1506 * try re-constructing such frames - it'll be pretty much garbage.
1507 */
1508 if (decap != RX_MSDU_DECAP_RAW ||
1509 skb_queue_len(amsdu) != 1 + rxd->frag_info.ring2_more_count) {
1510 __skb_queue_purge(amsdu);
1511 return;
1512 }
1513
1514 ath10k_unchain_msdu(amsdu);
1515}
1516
1517static bool ath10k_htt_rx_amsdu_allowed(struct ath10k *ar,
1518 struct sk_buff_head *amsdu,
1519 struct ieee80211_rx_status *rx_status)
1520{
1521 struct sk_buff *msdu;
1522 struct htt_rx_desc *rxd;
Michal Kaziord67d0a02014-11-24 15:34:08 +01001523 bool is_mgmt;
1524 bool has_fcs_err;
Michal Kazior581c25f2014-11-18 09:24:48 +02001525
1526 msdu = skb_peek(amsdu);
1527 rxd = (void *)msdu->data - sizeof(*rxd);
1528
1529 /* FIXME: It might be a good idea to do some fuzzy-testing to drop
1530 * invalid/dangerous frames.
1531 */
1532
1533 if (!rx_status->freq) {
1534 ath10k_warn(ar, "no channel configured; ignoring frame(s)!\n");
Janusz Dziedzic2acc4eb2014-03-19 07:09:40 +01001535 return false;
1536 }
1537
Michal Kaziord67d0a02014-11-24 15:34:08 +01001538 is_mgmt = !!(rxd->attention.flags &
1539 __cpu_to_le32(RX_ATTENTION_FLAGS_MGMT_TYPE));
1540 has_fcs_err = !!(rxd->attention.flags &
1541 __cpu_to_le32(RX_ATTENTION_FLAGS_FCS_ERR));
1542
Michal Kazior581c25f2014-11-18 09:24:48 +02001543 /* Management frames are handled via WMI events. The pros of such
1544 * approach is that channel is explicitly provided in WMI events
1545 * whereas HTT doesn't provide channel information for Rxed frames.
Michal Kaziord67d0a02014-11-24 15:34:08 +01001546 *
1547 * However some firmware revisions don't report corrupted frames via
1548 * WMI so don't drop them.
Michal Kazior581c25f2014-11-18 09:24:48 +02001549 */
Michal Kaziord67d0a02014-11-24 15:34:08 +01001550 if (is_mgmt && !has_fcs_err) {
Michal Kazior7aa7a722014-08-25 12:09:38 +02001551 ath10k_dbg(ar, ATH10K_DBG_HTT, "htt rx mgmt ctrl\n");
Janusz Dziedzic2acc4eb2014-03-19 07:09:40 +01001552 return false;
1553 }
1554
Michal Kazior581c25f2014-11-18 09:24:48 +02001555 if (test_bit(ATH10K_CAC_RUNNING, &ar->dev_flags)) {
1556 ath10k_dbg(ar, ATH10K_DBG_HTT, "htt rx cac running\n");
Janusz Dziedzic2acc4eb2014-03-19 07:09:40 +01001557 return false;
1558 }
1559
1560 return true;
1561}
1562
Michal Kazior581c25f2014-11-18 09:24:48 +02001563static void ath10k_htt_rx_h_filter(struct ath10k *ar,
1564 struct sk_buff_head *amsdu,
1565 struct ieee80211_rx_status *rx_status)
1566{
1567 if (skb_queue_empty(amsdu))
1568 return;
1569
1570 if (ath10k_htt_rx_amsdu_allowed(ar, amsdu, rx_status))
1571 return;
1572
1573 __skb_queue_purge(amsdu);
1574}
1575
Kalle Valo5e3dd152013-06-12 20:52:10 +03001576static void ath10k_htt_rx_handler(struct ath10k_htt *htt,
1577 struct htt_rx_indication *rx)
1578{
Michal Kazior7aa7a722014-08-25 12:09:38 +02001579 struct ath10k *ar = htt->ar;
Janusz Dziedzic6df92a32014-03-24 21:24:57 +01001580 struct ieee80211_rx_status *rx_status = &htt->rx_status;
Kalle Valo5e3dd152013-06-12 20:52:10 +03001581 struct htt_rx_indication_mpdu_range *mpdu_ranges;
Michal Kazior9aa505d2014-11-18 09:24:47 +02001582 struct sk_buff_head amsdu;
Kalle Valo5e3dd152013-06-12 20:52:10 +03001583 int num_mpdu_ranges;
1584 int fw_desc_len;
1585 u8 *fw_desc;
Michal Kaziord5406902014-11-18 09:24:47 +02001586 int i, ret, mpdu_count = 0;
Kalle Valo5e3dd152013-06-12 20:52:10 +03001587
Michal Kazior45967082014-02-27 18:50:05 +02001588 lockdep_assert_held(&htt->rx_ring.lock);
1589
Michal Kaziore0bd7512014-11-18 09:24:48 +02001590 if (htt->rx_confused)
1591 return;
1592
Kalle Valo5e3dd152013-06-12 20:52:10 +03001593 fw_desc_len = __le16_to_cpu(rx->prefix.fw_rx_desc_bytes);
1594 fw_desc = (u8 *)&rx->fw_desc;
1595
1596 num_mpdu_ranges = MS(__le32_to_cpu(rx->hdr.info1),
1597 HTT_RX_INDICATION_INFO1_NUM_MPDU_RANGES);
1598 mpdu_ranges = htt_rx_ind_get_mpdu_ranges(rx);
1599
Michal Kazior7aa7a722014-08-25 12:09:38 +02001600 ath10k_dbg_dump(ar, ATH10K_DBG_HTT_DUMP, NULL, "htt rx ind: ",
Kalle Valo5e3dd152013-06-12 20:52:10 +03001601 rx, sizeof(*rx) +
1602 (sizeof(struct htt_rx_indication_mpdu_range) *
1603 num_mpdu_ranges));
1604
Michal Kaziord5406902014-11-18 09:24:47 +02001605 for (i = 0; i < num_mpdu_ranges; i++)
1606 mpdu_count += mpdu_ranges[i].mpdu_count;
Janusz Dziedzicd84dd602014-03-24 21:23:20 +01001607
Michal Kaziord5406902014-11-18 09:24:47 +02001608 while (mpdu_count--) {
Michal Kaziord5406902014-11-18 09:24:47 +02001609 __skb_queue_head_init(&amsdu);
1610 ret = ath10k_htt_rx_amsdu_pop(htt, &fw_desc,
Michal Kaziorf0e27702014-11-18 09:24:49 +02001611 &fw_desc_len, &amsdu);
Michal Kaziord5406902014-11-18 09:24:47 +02001612 if (ret < 0) {
Michal Kaziore0bd7512014-11-18 09:24:48 +02001613 ath10k_warn(ar, "rx ring became corrupted: %d\n", ret);
Michal Kaziord5406902014-11-18 09:24:47 +02001614 __skb_queue_purge(&amsdu);
Michal Kaziore0bd7512014-11-18 09:24:48 +02001615 /* FIXME: It's probably a good idea to reboot the
1616 * device instead of leaving it inoperable.
1617 */
1618 htt->rx_confused = true;
1619 break;
Kalle Valo5e3dd152013-06-12 20:52:10 +03001620 }
Michal Kaziord5406902014-11-18 09:24:47 +02001621
Michal Kazior500ff9f2015-03-31 10:26:21 +00001622 ath10k_htt_rx_h_ppdu(ar, &amsdu, rx_status, 0xffff);
Michal Kazior581c25f2014-11-18 09:24:48 +02001623 ath10k_htt_rx_h_unchain(ar, &amsdu, ret > 0);
1624 ath10k_htt_rx_h_filter(ar, &amsdu, rx_status);
1625 ath10k_htt_rx_h_mpdu(ar, &amsdu, rx_status);
1626 ath10k_htt_rx_h_deliver(ar, &amsdu, rx_status);
Kalle Valo5e3dd152013-06-12 20:52:10 +03001627 }
1628
Michal Kazior6e712d42013-09-24 10:18:36 +02001629 tasklet_schedule(&htt->rx_replenish_task);
Kalle Valo5e3dd152013-06-12 20:52:10 +03001630}
1631
1632static void ath10k_htt_rx_frag_handler(struct ath10k_htt *htt,
Kalle Valo5b07e072014-09-14 12:50:06 +03001633 struct htt_rx_fragment_indication *frag)
Kalle Valo5e3dd152013-06-12 20:52:10 +03001634{
Michal Kazior7aa7a722014-08-25 12:09:38 +02001635 struct ath10k *ar = htt->ar;
Janusz Dziedzic6df92a32014-03-24 21:24:57 +01001636 struct ieee80211_rx_status *rx_status = &htt->rx_status;
Michal Kazior9aa505d2014-11-18 09:24:47 +02001637 struct sk_buff_head amsdu;
Janusz Dziedzicd84dd602014-03-24 21:23:20 +01001638 int ret;
Kalle Valo5e3dd152013-06-12 20:52:10 +03001639 u8 *fw_desc;
Michal Kazior581c25f2014-11-18 09:24:48 +02001640 int fw_desc_len;
Kalle Valo5e3dd152013-06-12 20:52:10 +03001641
1642 fw_desc_len = __le16_to_cpu(frag->fw_rx_desc_bytes);
1643 fw_desc = (u8 *)frag->fw_msdu_rx_desc;
1644
Michal Kazior9aa505d2014-11-18 09:24:47 +02001645 __skb_queue_head_init(&amsdu);
Michal Kazior45967082014-02-27 18:50:05 +02001646
1647 spin_lock_bh(&htt->rx_ring.lock);
Janusz Dziedzicd84dd602014-03-24 21:23:20 +01001648 ret = ath10k_htt_rx_amsdu_pop(htt, &fw_desc, &fw_desc_len,
Michal Kaziorf0e27702014-11-18 09:24:49 +02001649 &amsdu);
Michal Kazior45967082014-02-27 18:50:05 +02001650 spin_unlock_bh(&htt->rx_ring.lock);
Kalle Valo5e3dd152013-06-12 20:52:10 +03001651
Michal Kazior686687c2014-10-23 17:04:24 +03001652 tasklet_schedule(&htt->rx_replenish_task);
1653
Michal Kazior7aa7a722014-08-25 12:09:38 +02001654 ath10k_dbg(ar, ATH10K_DBG_HTT_DUMP, "htt rx frag ahead\n");
Kalle Valo5e3dd152013-06-12 20:52:10 +03001655
Janusz Dziedzicd84dd602014-03-24 21:23:20 +01001656 if (ret) {
Michal Kazior7aa7a722014-08-25 12:09:38 +02001657 ath10k_warn(ar, "failed to pop amsdu from httr rx ring for fragmented rx %d\n",
Janusz Dziedzicd84dd602014-03-24 21:23:20 +01001658 ret);
Michal Kazior9aa505d2014-11-18 09:24:47 +02001659 __skb_queue_purge(&amsdu);
Kalle Valo5e3dd152013-06-12 20:52:10 +03001660 return;
1661 }
1662
Michal Kazior9aa505d2014-11-18 09:24:47 +02001663 if (skb_queue_len(&amsdu) != 1) {
1664 ath10k_warn(ar, "failed to pop frag amsdu: too many msdus\n");
1665 __skb_queue_purge(&amsdu);
1666 return;
1667 }
1668
Michal Kazior500ff9f2015-03-31 10:26:21 +00001669 ath10k_htt_rx_h_ppdu(ar, &amsdu, rx_status, 0xffff);
Michal Kazior581c25f2014-11-18 09:24:48 +02001670 ath10k_htt_rx_h_filter(ar, &amsdu, rx_status);
1671 ath10k_htt_rx_h_mpdu(ar, &amsdu, rx_status);
1672 ath10k_htt_rx_h_deliver(ar, &amsdu, rx_status);
Kalle Valo5e3dd152013-06-12 20:52:10 +03001673
Kalle Valo5e3dd152013-06-12 20:52:10 +03001674 if (fw_desc_len > 0) {
Michal Kazior7aa7a722014-08-25 12:09:38 +02001675 ath10k_dbg(ar, ATH10K_DBG_HTT,
Kalle Valo5e3dd152013-06-12 20:52:10 +03001676 "expecting more fragmented rx in one indication %d\n",
1677 fw_desc_len);
1678 }
1679}
1680
Michal Kazior6c5151a2014-02-27 18:50:04 +02001681static void ath10k_htt_rx_frm_tx_compl(struct ath10k *ar,
1682 struct sk_buff *skb)
1683{
1684 struct ath10k_htt *htt = &ar->htt;
1685 struct htt_resp *resp = (struct htt_resp *)skb->data;
1686 struct htt_tx_done tx_done = {};
1687 int status = MS(resp->data_tx_completion.flags, HTT_DATA_TX_STATUS);
1688 __le16 msdu_id;
1689 int i;
1690
1691 switch (status) {
1692 case HTT_DATA_TX_STATUS_NO_ACK:
1693 tx_done.no_ack = true;
1694 break;
1695 case HTT_DATA_TX_STATUS_OK:
Sujith Manoharan55314fc2015-04-01 22:53:21 +03001696 tx_done.success = true;
Michal Kazior6c5151a2014-02-27 18:50:04 +02001697 break;
1698 case HTT_DATA_TX_STATUS_DISCARD:
1699 case HTT_DATA_TX_STATUS_POSTPONE:
1700 case HTT_DATA_TX_STATUS_DOWNLOAD_FAIL:
1701 tx_done.discard = true;
1702 break;
1703 default:
Michal Kazior7aa7a722014-08-25 12:09:38 +02001704 ath10k_warn(ar, "unhandled tx completion status %d\n", status);
Michal Kazior6c5151a2014-02-27 18:50:04 +02001705 tx_done.discard = true;
1706 break;
1707 }
1708
Michal Kazior7aa7a722014-08-25 12:09:38 +02001709 ath10k_dbg(ar, ATH10K_DBG_HTT, "htt tx completion num_msdus %d\n",
Michal Kazior6c5151a2014-02-27 18:50:04 +02001710 resp->data_tx_completion.num_msdus);
1711
1712 for (i = 0; i < resp->data_tx_completion.num_msdus; i++) {
1713 msdu_id = resp->data_tx_completion.msdus[i];
1714 tx_done.msdu_id = __le16_to_cpu(msdu_id);
1715 ath10k_txrx_tx_unref(htt, &tx_done);
1716 }
1717}
1718
Michal Kazioraa5b4fb2014-07-23 12:20:33 +02001719static void ath10k_htt_rx_addba(struct ath10k *ar, struct htt_resp *resp)
1720{
1721 struct htt_rx_addba *ev = &resp->rx_addba;
1722 struct ath10k_peer *peer;
1723 struct ath10k_vif *arvif;
1724 u16 info0, tid, peer_id;
1725
1726 info0 = __le16_to_cpu(ev->info0);
1727 tid = MS(info0, HTT_RX_BA_INFO0_TID);
1728 peer_id = MS(info0, HTT_RX_BA_INFO0_PEER_ID);
1729
Michal Kazior7aa7a722014-08-25 12:09:38 +02001730 ath10k_dbg(ar, ATH10K_DBG_HTT,
Michal Kazioraa5b4fb2014-07-23 12:20:33 +02001731 "htt rx addba tid %hu peer_id %hu size %hhu\n",
1732 tid, peer_id, ev->window_size);
1733
1734 spin_lock_bh(&ar->data_lock);
1735 peer = ath10k_peer_find_by_id(ar, peer_id);
1736 if (!peer) {
Michal Kazior7aa7a722014-08-25 12:09:38 +02001737 ath10k_warn(ar, "received addba event for invalid peer_id: %hu\n",
Michal Kazioraa5b4fb2014-07-23 12:20:33 +02001738 peer_id);
1739 spin_unlock_bh(&ar->data_lock);
1740 return;
1741 }
1742
1743 arvif = ath10k_get_arvif(ar, peer->vdev_id);
1744 if (!arvif) {
Michal Kazior7aa7a722014-08-25 12:09:38 +02001745 ath10k_warn(ar, "received addba event for invalid vdev_id: %u\n",
Michal Kazioraa5b4fb2014-07-23 12:20:33 +02001746 peer->vdev_id);
1747 spin_unlock_bh(&ar->data_lock);
1748 return;
1749 }
1750
Michal Kazior7aa7a722014-08-25 12:09:38 +02001751 ath10k_dbg(ar, ATH10K_DBG_HTT,
Michal Kazioraa5b4fb2014-07-23 12:20:33 +02001752 "htt rx start rx ba session sta %pM tid %hu size %hhu\n",
1753 peer->addr, tid, ev->window_size);
1754
1755 ieee80211_start_rx_ba_session_offl(arvif->vif, peer->addr, tid);
1756 spin_unlock_bh(&ar->data_lock);
1757}
1758
1759static void ath10k_htt_rx_delba(struct ath10k *ar, struct htt_resp *resp)
1760{
1761 struct htt_rx_delba *ev = &resp->rx_delba;
1762 struct ath10k_peer *peer;
1763 struct ath10k_vif *arvif;
1764 u16 info0, tid, peer_id;
1765
1766 info0 = __le16_to_cpu(ev->info0);
1767 tid = MS(info0, HTT_RX_BA_INFO0_TID);
1768 peer_id = MS(info0, HTT_RX_BA_INFO0_PEER_ID);
1769
Michal Kazior7aa7a722014-08-25 12:09:38 +02001770 ath10k_dbg(ar, ATH10K_DBG_HTT,
Michal Kazioraa5b4fb2014-07-23 12:20:33 +02001771 "htt rx delba tid %hu peer_id %hu\n",
1772 tid, peer_id);
1773
1774 spin_lock_bh(&ar->data_lock);
1775 peer = ath10k_peer_find_by_id(ar, peer_id);
1776 if (!peer) {
Michal Kazior7aa7a722014-08-25 12:09:38 +02001777 ath10k_warn(ar, "received addba event for invalid peer_id: %hu\n",
Michal Kazioraa5b4fb2014-07-23 12:20:33 +02001778 peer_id);
1779 spin_unlock_bh(&ar->data_lock);
1780 return;
1781 }
1782
1783 arvif = ath10k_get_arvif(ar, peer->vdev_id);
1784 if (!arvif) {
Michal Kazior7aa7a722014-08-25 12:09:38 +02001785 ath10k_warn(ar, "received addba event for invalid vdev_id: %u\n",
Michal Kazioraa5b4fb2014-07-23 12:20:33 +02001786 peer->vdev_id);
1787 spin_unlock_bh(&ar->data_lock);
1788 return;
1789 }
1790
Michal Kazior7aa7a722014-08-25 12:09:38 +02001791 ath10k_dbg(ar, ATH10K_DBG_HTT,
Michal Kazioraa5b4fb2014-07-23 12:20:33 +02001792 "htt rx stop rx ba session sta %pM tid %hu\n",
1793 peer->addr, tid);
1794
1795 ieee80211_stop_rx_ba_session_offl(arvif->vif, peer->addr, tid);
1796 spin_unlock_bh(&ar->data_lock);
1797}
1798
Michal Kaziorc5450702015-01-24 12:14:48 +02001799static int ath10k_htt_rx_extract_amsdu(struct sk_buff_head *list,
1800 struct sk_buff_head *amsdu)
1801{
1802 struct sk_buff *msdu;
1803 struct htt_rx_desc *rxd;
1804
1805 if (skb_queue_empty(list))
1806 return -ENOBUFS;
1807
1808 if (WARN_ON(!skb_queue_empty(amsdu)))
1809 return -EINVAL;
1810
1811 while ((msdu = __skb_dequeue(list))) {
1812 __skb_queue_tail(amsdu, msdu);
1813
1814 rxd = (void *)msdu->data - sizeof(*rxd);
Peter Oh1f5dbfb2015-07-15 19:01:21 -07001815 if (rxd->msdu_end.common.info0 &
Michal Kaziorc5450702015-01-24 12:14:48 +02001816 __cpu_to_le32(RX_MSDU_END_INFO0_LAST_MSDU))
1817 break;
1818 }
1819
1820 msdu = skb_peek_tail(amsdu);
1821 rxd = (void *)msdu->data - sizeof(*rxd);
Peter Oh1f5dbfb2015-07-15 19:01:21 -07001822 if (!(rxd->msdu_end.common.info0 &
Michal Kaziorc5450702015-01-24 12:14:48 +02001823 __cpu_to_le32(RX_MSDU_END_INFO0_LAST_MSDU))) {
1824 skb_queue_splice_init(amsdu, list);
1825 return -EAGAIN;
1826 }
1827
1828 return 0;
1829}
1830
1831static void ath10k_htt_rx_h_rx_offload_prot(struct ieee80211_rx_status *status,
1832 struct sk_buff *skb)
1833{
1834 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
1835
1836 if (!ieee80211_has_protected(hdr->frame_control))
1837 return;
1838
1839 /* Offloaded frames are already decrypted but firmware insists they are
1840 * protected in the 802.11 header. Strip the flag. Otherwise mac80211
1841 * will drop the frame.
1842 */
1843
1844 hdr->frame_control &= ~__cpu_to_le16(IEEE80211_FCTL_PROTECTED);
1845 status->flag |= RX_FLAG_DECRYPTED |
1846 RX_FLAG_IV_STRIPPED |
1847 RX_FLAG_MMIC_STRIPPED;
1848}
1849
1850static void ath10k_htt_rx_h_rx_offload(struct ath10k *ar,
1851 struct sk_buff_head *list)
1852{
1853 struct ath10k_htt *htt = &ar->htt;
1854 struct ieee80211_rx_status *status = &htt->rx_status;
1855 struct htt_rx_offload_msdu *rx;
1856 struct sk_buff *msdu;
1857 size_t offset;
1858
1859 while ((msdu = __skb_dequeue(list))) {
1860 /* Offloaded frames don't have Rx descriptor. Instead they have
1861 * a short meta information header.
1862 */
1863
1864 rx = (void *)msdu->data;
1865
1866 skb_put(msdu, sizeof(*rx));
1867 skb_pull(msdu, sizeof(*rx));
1868
1869 if (skb_tailroom(msdu) < __le16_to_cpu(rx->msdu_len)) {
1870 ath10k_warn(ar, "dropping frame: offloaded rx msdu is too long!\n");
1871 dev_kfree_skb_any(msdu);
1872 continue;
1873 }
1874
1875 skb_put(msdu, __le16_to_cpu(rx->msdu_len));
1876
1877 /* Offloaded rx header length isn't multiple of 2 nor 4 so the
1878 * actual payload is unaligned. Align the frame. Otherwise
1879 * mac80211 complains. This shouldn't reduce performance much
1880 * because these offloaded frames are rare.
1881 */
1882 offset = 4 - ((unsigned long)msdu->data & 3);
1883 skb_put(msdu, offset);
1884 memmove(msdu->data + offset, msdu->data, msdu->len);
1885 skb_pull(msdu, offset);
1886
1887 /* FIXME: The frame is NWifi. Re-construct QoS Control
1888 * if possible later.
1889 */
1890
1891 memset(status, 0, sizeof(*status));
1892 status->flag |= RX_FLAG_NO_SIGNAL_VAL;
1893
1894 ath10k_htt_rx_h_rx_offload_prot(status, msdu);
Michal Kazior500ff9f2015-03-31 10:26:21 +00001895 ath10k_htt_rx_h_channel(ar, status, NULL, rx->vdev_id);
Michal Kaziorc5450702015-01-24 12:14:48 +02001896 ath10k_process_rx(ar, status, msdu);
1897 }
1898}
1899
1900static void ath10k_htt_rx_in_ord_ind(struct ath10k *ar, struct sk_buff *skb)
1901{
1902 struct ath10k_htt *htt = &ar->htt;
1903 struct htt_resp *resp = (void *)skb->data;
1904 struct ieee80211_rx_status *status = &htt->rx_status;
1905 struct sk_buff_head list;
1906 struct sk_buff_head amsdu;
1907 u16 peer_id;
1908 u16 msdu_count;
1909 u8 vdev_id;
1910 u8 tid;
1911 bool offload;
1912 bool frag;
1913 int ret;
1914
1915 lockdep_assert_held(&htt->rx_ring.lock);
1916
1917 if (htt->rx_confused)
1918 return;
1919
1920 skb_pull(skb, sizeof(resp->hdr));
1921 skb_pull(skb, sizeof(resp->rx_in_ord_ind));
1922
1923 peer_id = __le16_to_cpu(resp->rx_in_ord_ind.peer_id);
1924 msdu_count = __le16_to_cpu(resp->rx_in_ord_ind.msdu_count);
1925 vdev_id = resp->rx_in_ord_ind.vdev_id;
1926 tid = SM(resp->rx_in_ord_ind.info, HTT_RX_IN_ORD_IND_INFO_TID);
1927 offload = !!(resp->rx_in_ord_ind.info &
1928 HTT_RX_IN_ORD_IND_INFO_OFFLOAD_MASK);
1929 frag = !!(resp->rx_in_ord_ind.info & HTT_RX_IN_ORD_IND_INFO_FRAG_MASK);
1930
1931 ath10k_dbg(ar, ATH10K_DBG_HTT,
1932 "htt rx in ord vdev %i peer %i tid %i offload %i frag %i msdu count %i\n",
1933 vdev_id, peer_id, tid, offload, frag, msdu_count);
1934
1935 if (skb->len < msdu_count * sizeof(*resp->rx_in_ord_ind.msdu_descs)) {
1936 ath10k_warn(ar, "dropping invalid in order rx indication\n");
1937 return;
1938 }
1939
1940 /* The event can deliver more than 1 A-MSDU. Each A-MSDU is later
1941 * extracted and processed.
1942 */
1943 __skb_queue_head_init(&list);
1944 ret = ath10k_htt_rx_pop_paddr_list(htt, &resp->rx_in_ord_ind, &list);
1945 if (ret < 0) {
1946 ath10k_warn(ar, "failed to pop paddr list: %d\n", ret);
1947 htt->rx_confused = true;
1948 return;
1949 }
1950
1951 /* Offloaded frames are very different and need to be handled
1952 * separately.
1953 */
1954 if (offload)
1955 ath10k_htt_rx_h_rx_offload(ar, &list);
1956
1957 while (!skb_queue_empty(&list)) {
1958 __skb_queue_head_init(&amsdu);
1959 ret = ath10k_htt_rx_extract_amsdu(&list, &amsdu);
1960 switch (ret) {
1961 case 0:
1962 /* Note: The in-order indication may report interleaved
1963 * frames from different PPDUs meaning reported rx rate
1964 * to mac80211 isn't accurate/reliable. It's still
1965 * better to report something than nothing though. This
1966 * should still give an idea about rx rate to the user.
1967 */
Michal Kazior500ff9f2015-03-31 10:26:21 +00001968 ath10k_htt_rx_h_ppdu(ar, &amsdu, status, vdev_id);
Michal Kaziorc5450702015-01-24 12:14:48 +02001969 ath10k_htt_rx_h_filter(ar, &amsdu, status);
1970 ath10k_htt_rx_h_mpdu(ar, &amsdu, status);
1971 ath10k_htt_rx_h_deliver(ar, &amsdu, status);
1972 break;
1973 case -EAGAIN:
1974 /* fall through */
1975 default:
1976 /* Should not happen. */
1977 ath10k_warn(ar, "failed to extract amsdu: %d\n", ret);
1978 htt->rx_confused = true;
1979 __skb_queue_purge(&list);
1980 return;
1981 }
1982 }
1983
1984 tasklet_schedule(&htt->rx_replenish_task);
1985}
1986
Michal Kazior839ae632016-03-06 16:14:32 +02001987static void ath10k_htt_rx_tx_fetch_resp_id_confirm(struct ath10k *ar,
1988 const __le32 *resp_ids,
1989 int num_resp_ids)
1990{
1991 int i;
1992 u32 resp_id;
1993
1994 ath10k_dbg(ar, ATH10K_DBG_HTT, "htt rx tx fetch confirm num_resp_ids %d\n",
1995 num_resp_ids);
1996
1997 for (i = 0; i < num_resp_ids; i++) {
1998 resp_id = le32_to_cpu(resp_ids[i]);
1999
2000 ath10k_dbg(ar, ATH10K_DBG_HTT, "htt rx tx fetch confirm resp_id %u\n",
2001 resp_id);
2002
2003 /* TODO: free resp_id */
2004 }
2005}
2006
2007static void ath10k_htt_rx_tx_fetch_ind(struct ath10k *ar, struct sk_buff *skb)
2008{
Michal Kazior426e10e2016-03-06 16:14:43 +02002009 struct ieee80211_hw *hw = ar->hw;
2010 struct ieee80211_txq *txq;
Michal Kazior839ae632016-03-06 16:14:32 +02002011 struct htt_resp *resp = (struct htt_resp *)skb->data;
2012 struct htt_tx_fetch_record *record;
2013 size_t len;
2014 size_t max_num_bytes;
2015 size_t max_num_msdus;
Michal Kazior426e10e2016-03-06 16:14:43 +02002016 size_t num_bytes;
2017 size_t num_msdus;
Michal Kazior839ae632016-03-06 16:14:32 +02002018 const __le32 *resp_ids;
2019 u16 num_records;
2020 u16 num_resp_ids;
2021 u16 peer_id;
2022 u8 tid;
Michal Kazior426e10e2016-03-06 16:14:43 +02002023 int ret;
Michal Kazior839ae632016-03-06 16:14:32 +02002024 int i;
2025
2026 ath10k_dbg(ar, ATH10K_DBG_HTT, "htt rx tx fetch ind\n");
2027
2028 len = sizeof(resp->hdr) + sizeof(resp->tx_fetch_ind);
2029 if (unlikely(skb->len < len)) {
2030 ath10k_warn(ar, "received corrupted tx_fetch_ind event: buffer too short\n");
2031 return;
2032 }
2033
2034 num_records = le16_to_cpu(resp->tx_fetch_ind.num_records);
2035 num_resp_ids = le16_to_cpu(resp->tx_fetch_ind.num_resp_ids);
2036
2037 len += sizeof(resp->tx_fetch_ind.records[0]) * num_records;
2038 len += sizeof(resp->tx_fetch_ind.resp_ids[0]) * num_resp_ids;
2039
2040 if (unlikely(skb->len < len)) {
2041 ath10k_warn(ar, "received corrupted tx_fetch_ind event: too many records/resp_ids\n");
2042 return;
2043 }
2044
2045 ath10k_dbg(ar, ATH10K_DBG_HTT, "htt rx tx fetch ind num records %hu num resps %hu seq %hu\n",
2046 num_records, num_resp_ids,
2047 le16_to_cpu(resp->tx_fetch_ind.fetch_seq_num));
2048
Michal Kazior426e10e2016-03-06 16:14:43 +02002049 if (!ar->htt.tx_q_state.enabled) {
2050 ath10k_warn(ar, "received unexpected tx_fetch_ind event: not enabled\n");
2051 return;
2052 }
2053
2054 if (ar->htt.tx_q_state.mode == HTT_TX_MODE_SWITCH_PUSH) {
2055 ath10k_warn(ar, "received unexpected tx_fetch_ind event: in push mode\n");
2056 return;
2057 }
2058
2059 rcu_read_lock();
Michal Kazior839ae632016-03-06 16:14:32 +02002060
2061 for (i = 0; i < num_records; i++) {
2062 record = &resp->tx_fetch_ind.records[i];
2063 peer_id = MS(le16_to_cpu(record->info),
2064 HTT_TX_FETCH_RECORD_INFO_PEER_ID);
2065 tid = MS(le16_to_cpu(record->info),
2066 HTT_TX_FETCH_RECORD_INFO_TID);
2067 max_num_msdus = le16_to_cpu(record->num_msdus);
2068 max_num_bytes = le32_to_cpu(record->num_bytes);
2069
2070 ath10k_dbg(ar, ATH10K_DBG_HTT, "htt rx tx fetch record %i peer_id %hu tid %hhu msdus %zu bytes %zu\n",
2071 i, peer_id, tid, max_num_msdus, max_num_bytes);
2072
2073 if (unlikely(peer_id >= ar->htt.tx_q_state.num_peers) ||
2074 unlikely(tid >= ar->htt.tx_q_state.num_tids)) {
2075 ath10k_warn(ar, "received out of range peer_id %hu tid %hhu\n",
2076 peer_id, tid);
2077 continue;
2078 }
2079
Michal Kazior426e10e2016-03-06 16:14:43 +02002080 spin_lock_bh(&ar->data_lock);
2081 txq = ath10k_mac_txq_lookup(ar, peer_id, tid);
2082 spin_unlock_bh(&ar->data_lock);
2083
2084 /* It is okay to release the lock and use txq because RCU read
2085 * lock is held.
2086 */
2087
2088 if (unlikely(!txq)) {
2089 ath10k_warn(ar, "failed to lookup txq for peer_id %hu tid %hhu\n",
2090 peer_id, tid);
2091 continue;
2092 }
2093
2094 num_msdus = 0;
2095 num_bytes = 0;
2096
2097 while (num_msdus < max_num_msdus &&
2098 num_bytes < max_num_bytes) {
2099 ret = ath10k_mac_tx_push_txq(hw, txq);
2100 if (ret < 0)
2101 break;
2102
2103 num_msdus++;
2104 num_bytes += ret;
2105 }
2106
2107 record->num_msdus = cpu_to_le16(num_msdus);
2108 record->num_bytes = cpu_to_le32(num_bytes);
2109
2110 ath10k_htt_tx_txq_recalc(hw, txq);
Michal Kazior839ae632016-03-06 16:14:32 +02002111 }
2112
Michal Kazior426e10e2016-03-06 16:14:43 +02002113 rcu_read_unlock();
2114
Michal Kazior839ae632016-03-06 16:14:32 +02002115 resp_ids = ath10k_htt_get_tx_fetch_ind_resp_ids(&resp->tx_fetch_ind);
2116 ath10k_htt_rx_tx_fetch_resp_id_confirm(ar, resp_ids, num_resp_ids);
2117
Michal Kazior426e10e2016-03-06 16:14:43 +02002118 ret = ath10k_htt_tx_fetch_resp(ar,
2119 resp->tx_fetch_ind.token,
2120 resp->tx_fetch_ind.fetch_seq_num,
2121 resp->tx_fetch_ind.records,
2122 num_records);
2123 if (unlikely(ret)) {
2124 ath10k_warn(ar, "failed to submit tx fetch resp for token 0x%08x: %d\n",
2125 le32_to_cpu(resp->tx_fetch_ind.token), ret);
2126 /* FIXME: request fw restart */
2127 }
2128
2129 ath10k_htt_tx_txq_sync(ar);
Michal Kazior839ae632016-03-06 16:14:32 +02002130}
2131
2132static void ath10k_htt_rx_tx_fetch_confirm(struct ath10k *ar,
2133 struct sk_buff *skb)
2134{
2135 const struct htt_resp *resp = (void *)skb->data;
2136 size_t len;
2137 int num_resp_ids;
2138
2139 ath10k_dbg(ar, ATH10K_DBG_HTT, "htt rx tx fetch confirm\n");
2140
2141 len = sizeof(resp->hdr) + sizeof(resp->tx_fetch_confirm);
2142 if (unlikely(skb->len < len)) {
2143 ath10k_warn(ar, "received corrupted tx_fetch_confirm event: buffer too short\n");
2144 return;
2145 }
2146
2147 num_resp_ids = le16_to_cpu(resp->tx_fetch_confirm.num_resp_ids);
2148 len += sizeof(resp->tx_fetch_confirm.resp_ids[0]) * num_resp_ids;
2149
2150 if (unlikely(skb->len < len)) {
2151 ath10k_warn(ar, "received corrupted tx_fetch_confirm event: resp_ids buffer overflow\n");
2152 return;
2153 }
2154
2155 ath10k_htt_rx_tx_fetch_resp_id_confirm(ar,
2156 resp->tx_fetch_confirm.resp_ids,
2157 num_resp_ids);
2158}
2159
2160static void ath10k_htt_rx_tx_mode_switch_ind(struct ath10k *ar,
2161 struct sk_buff *skb)
2162{
2163 const struct htt_resp *resp = (void *)skb->data;
2164 const struct htt_tx_mode_switch_record *record;
Michal Kazior426e10e2016-03-06 16:14:43 +02002165 struct ieee80211_txq *txq;
2166 struct ath10k_txq *artxq;
Michal Kazior839ae632016-03-06 16:14:32 +02002167 size_t len;
2168 size_t num_records;
2169 enum htt_tx_mode_switch_mode mode;
2170 bool enable;
2171 u16 info0;
2172 u16 info1;
2173 u16 threshold;
2174 u16 peer_id;
2175 u8 tid;
2176 int i;
2177
2178 ath10k_dbg(ar, ATH10K_DBG_HTT, "htt rx tx mode switch ind\n");
2179
2180 len = sizeof(resp->hdr) + sizeof(resp->tx_mode_switch_ind);
2181 if (unlikely(skb->len < len)) {
2182 ath10k_warn(ar, "received corrupted tx_mode_switch_ind event: buffer too short\n");
2183 return;
2184 }
2185
2186 info0 = le16_to_cpu(resp->tx_mode_switch_ind.info0);
2187 info1 = le16_to_cpu(resp->tx_mode_switch_ind.info1);
2188
2189 enable = !!(info0 & HTT_TX_MODE_SWITCH_IND_INFO0_ENABLE);
2190 num_records = MS(info0, HTT_TX_MODE_SWITCH_IND_INFO1_THRESHOLD);
2191 mode = MS(info1, HTT_TX_MODE_SWITCH_IND_INFO1_MODE);
2192 threshold = MS(info1, HTT_TX_MODE_SWITCH_IND_INFO1_THRESHOLD);
2193
2194 ath10k_dbg(ar, ATH10K_DBG_HTT,
2195 "htt rx tx mode switch ind info0 0x%04hx info1 0x%04hx enable %d num records %zd mode %d threshold %hu\n",
2196 info0, info1, enable, num_records, mode, threshold);
2197
2198 len += sizeof(resp->tx_mode_switch_ind.records[0]) * num_records;
2199
2200 if (unlikely(skb->len < len)) {
2201 ath10k_warn(ar, "received corrupted tx_mode_switch_mode_ind event: too many records\n");
2202 return;
2203 }
2204
2205 switch (mode) {
2206 case HTT_TX_MODE_SWITCH_PUSH:
2207 case HTT_TX_MODE_SWITCH_PUSH_PULL:
2208 break;
2209 default:
2210 ath10k_warn(ar, "received invalid tx_mode_switch_mode_ind mode %d, ignoring\n",
2211 mode);
2212 return;
2213 }
2214
2215 if (!enable)
2216 return;
2217
Michal Kazior426e10e2016-03-06 16:14:43 +02002218 ar->htt.tx_q_state.enabled = enable;
2219 ar->htt.tx_q_state.mode = mode;
2220 ar->htt.tx_q_state.num_push_allowed = threshold;
2221
2222 rcu_read_lock();
Michal Kazior839ae632016-03-06 16:14:32 +02002223
2224 for (i = 0; i < num_records; i++) {
2225 record = &resp->tx_mode_switch_ind.records[i];
2226 info0 = le16_to_cpu(record->info0);
2227 peer_id = MS(info0, HTT_TX_MODE_SWITCH_RECORD_INFO0_PEER_ID);
2228 tid = MS(info0, HTT_TX_MODE_SWITCH_RECORD_INFO0_TID);
2229
2230 if (unlikely(peer_id >= ar->htt.tx_q_state.num_peers) ||
2231 unlikely(tid >= ar->htt.tx_q_state.num_tids)) {
2232 ath10k_warn(ar, "received out of range peer_id %hu tid %hhu\n",
2233 peer_id, tid);
2234 continue;
2235 }
2236
Michal Kazior426e10e2016-03-06 16:14:43 +02002237 spin_lock_bh(&ar->data_lock);
2238 txq = ath10k_mac_txq_lookup(ar, peer_id, tid);
2239 spin_unlock_bh(&ar->data_lock);
2240
2241 /* It is okay to release the lock and use txq because RCU read
2242 * lock is held.
2243 */
2244
2245 if (unlikely(!txq)) {
2246 ath10k_warn(ar, "failed to lookup txq for peer_id %hu tid %hhu\n",
2247 peer_id, tid);
2248 continue;
2249 }
2250
2251 spin_lock_bh(&ar->htt.tx_lock);
2252 artxq = (void *)txq->drv_priv;
2253 artxq->num_push_allowed = le16_to_cpu(record->num_max_msdus);
2254 spin_unlock_bh(&ar->htt.tx_lock);
Michal Kazior839ae632016-03-06 16:14:32 +02002255 }
2256
Michal Kazior426e10e2016-03-06 16:14:43 +02002257 rcu_read_unlock();
2258
2259 ath10k_mac_tx_push_pending(ar);
Michal Kazior839ae632016-03-06 16:14:32 +02002260}
2261
Kalle Valo5e3dd152013-06-12 20:52:10 +03002262void ath10k_htt_t2h_msg_handler(struct ath10k *ar, struct sk_buff *skb)
2263{
Michal Kazioredb82362013-07-05 16:15:14 +03002264 struct ath10k_htt *htt = &ar->htt;
Kalle Valo5e3dd152013-06-12 20:52:10 +03002265 struct htt_resp *resp = (struct htt_resp *)skb->data;
Rajkumar Manoharan8348db22015-03-25 13:12:27 +02002266 enum htt_t2h_msg_type type;
Kalle Valo5e3dd152013-06-12 20:52:10 +03002267
2268 /* confirm alignment */
2269 if (!IS_ALIGNED((unsigned long)skb->data, 4))
Michal Kazior7aa7a722014-08-25 12:09:38 +02002270 ath10k_warn(ar, "unaligned htt message, expect trouble\n");
Kalle Valo5e3dd152013-06-12 20:52:10 +03002271
Michal Kazior7aa7a722014-08-25 12:09:38 +02002272 ath10k_dbg(ar, ATH10K_DBG_HTT, "htt rx, msg_type: 0x%0X\n",
Kalle Valo5e3dd152013-06-12 20:52:10 +03002273 resp->hdr.msg_type);
Rajkumar Manoharan8348db22015-03-25 13:12:27 +02002274
2275 if (resp->hdr.msg_type >= ar->htt.t2h_msg_types_max) {
2276 ath10k_dbg(ar, ATH10K_DBG_HTT, "htt rx, unsupported msg_type: 0x%0X\n max: 0x%0X",
2277 resp->hdr.msg_type, ar->htt.t2h_msg_types_max);
2278 dev_kfree_skb_any(skb);
2279 return;
2280 }
2281 type = ar->htt.t2h_msg_types[resp->hdr.msg_type];
2282
2283 switch (type) {
Kalle Valo5e3dd152013-06-12 20:52:10 +03002284 case HTT_T2H_MSG_TYPE_VERSION_CONF: {
2285 htt->target_version_major = resp->ver_resp.major;
2286 htt->target_version_minor = resp->ver_resp.minor;
2287 complete(&htt->target_version_received);
2288 break;
2289 }
Michal Kazior6c5151a2014-02-27 18:50:04 +02002290 case HTT_T2H_MSG_TYPE_RX_IND:
Rajkumar Manoharane7827e52016-02-12 11:40:58 +05302291 skb_queue_tail(&htt->rx_compl_q, skb);
Michal Kazior6c5151a2014-02-27 18:50:04 +02002292 tasklet_schedule(&htt->txrx_compl_task);
2293 return;
Kalle Valo5e3dd152013-06-12 20:52:10 +03002294 case HTT_T2H_MSG_TYPE_PEER_MAP: {
2295 struct htt_peer_map_event ev = {
2296 .vdev_id = resp->peer_map.vdev_id,
2297 .peer_id = __le16_to_cpu(resp->peer_map.peer_id),
2298 };
2299 memcpy(ev.addr, resp->peer_map.addr, sizeof(ev.addr));
2300 ath10k_peer_map_event(htt, &ev);
2301 break;
2302 }
2303 case HTT_T2H_MSG_TYPE_PEER_UNMAP: {
2304 struct htt_peer_unmap_event ev = {
2305 .peer_id = __le16_to_cpu(resp->peer_unmap.peer_id),
2306 };
2307 ath10k_peer_unmap_event(htt, &ev);
2308 break;
2309 }
2310 case HTT_T2H_MSG_TYPE_MGMT_TX_COMPLETION: {
2311 struct htt_tx_done tx_done = {};
2312 int status = __le32_to_cpu(resp->mgmt_tx_completion.status);
2313
2314 tx_done.msdu_id =
2315 __le32_to_cpu(resp->mgmt_tx_completion.desc_id);
2316
2317 switch (status) {
2318 case HTT_MGMT_TX_STATUS_OK:
Sujith Manoharan55314fc2015-04-01 22:53:21 +03002319 tx_done.success = true;
Kalle Valo5e3dd152013-06-12 20:52:10 +03002320 break;
2321 case HTT_MGMT_TX_STATUS_RETRY:
2322 tx_done.no_ack = true;
2323 break;
2324 case HTT_MGMT_TX_STATUS_DROP:
2325 tx_done.discard = true;
2326 break;
2327 }
2328
Michal Kazior0a89f8a2013-09-18 14:43:20 +02002329 ath10k_txrx_tx_unref(htt, &tx_done);
Michal Kazior29946872016-03-06 16:14:34 +02002330 ath10k_mac_tx_push_pending(ar);
Kalle Valo5e3dd152013-06-12 20:52:10 +03002331 break;
2332 }
Michal Kazior6c5151a2014-02-27 18:50:04 +02002333 case HTT_T2H_MSG_TYPE_TX_COMPL_IND:
Qi Zhou005fb162015-07-22 16:38:24 -04002334 skb_queue_tail(&htt->tx_compl_q, skb);
Michal Kazior6c5151a2014-02-27 18:50:04 +02002335 tasklet_schedule(&htt->txrx_compl_task);
2336 return;
Kalle Valo5e3dd152013-06-12 20:52:10 +03002337 case HTT_T2H_MSG_TYPE_SEC_IND: {
2338 struct ath10k *ar = htt->ar;
2339 struct htt_security_indication *ev = &resp->security_indication;
2340
Michal Kazior7aa7a722014-08-25 12:09:38 +02002341 ath10k_dbg(ar, ATH10K_DBG_HTT,
Kalle Valo5e3dd152013-06-12 20:52:10 +03002342 "sec ind peer_id %d unicast %d type %d\n",
2343 __le16_to_cpu(ev->peer_id),
2344 !!(ev->flags & HTT_SECURITY_IS_UNICAST),
2345 MS(ev->flags, HTT_SECURITY_TYPE));
2346 complete(&ar->install_key_done);
2347 break;
2348 }
2349 case HTT_T2H_MSG_TYPE_RX_FRAG_IND: {
Michal Kazior7aa7a722014-08-25 12:09:38 +02002350 ath10k_dbg_dump(ar, ATH10K_DBG_HTT_DUMP, NULL, "htt event: ",
Kalle Valo5e3dd152013-06-12 20:52:10 +03002351 skb->data, skb->len);
2352 ath10k_htt_rx_frag_handler(htt, &resp->rx_frag_ind);
2353 break;
2354 }
2355 case HTT_T2H_MSG_TYPE_TEST:
Kalle Valo5e3dd152013-06-12 20:52:10 +03002356 break;
Kalle Valo5e3dd152013-06-12 20:52:10 +03002357 case HTT_T2H_MSG_TYPE_STATS_CONF:
Michal Kaziord35a6c12014-09-02 11:00:21 +03002358 trace_ath10k_htt_stats(ar, skb->data, skb->len);
Kalle Valoa9bf0502013-09-03 11:43:55 +03002359 break;
2360 case HTT_T2H_MSG_TYPE_TX_INSPECT_IND:
Michal Kazior708b9bd2014-07-21 20:52:59 +03002361 /* Firmware can return tx frames if it's unable to fully
2362 * process them and suspects host may be able to fix it. ath10k
2363 * sends all tx frames as already inspected so this shouldn't
2364 * happen unless fw has a bug.
2365 */
Michal Kazior7aa7a722014-08-25 12:09:38 +02002366 ath10k_warn(ar, "received an unexpected htt tx inspect event\n");
Michal Kazior708b9bd2014-07-21 20:52:59 +03002367 break;
Kalle Valo5e3dd152013-06-12 20:52:10 +03002368 case HTT_T2H_MSG_TYPE_RX_ADDBA:
Michal Kazioraa5b4fb2014-07-23 12:20:33 +02002369 ath10k_htt_rx_addba(ar, resp);
2370 break;
Kalle Valo5e3dd152013-06-12 20:52:10 +03002371 case HTT_T2H_MSG_TYPE_RX_DELBA:
Michal Kazioraa5b4fb2014-07-23 12:20:33 +02002372 ath10k_htt_rx_delba(ar, resp);
2373 break;
Rajkumar Manoharanbfdd7932014-10-03 08:02:40 +03002374 case HTT_T2H_MSG_TYPE_PKTLOG: {
2375 struct ath10k_pktlog_hdr *hdr =
2376 (struct ath10k_pktlog_hdr *)resp->pktlog_msg.payload;
2377
2378 trace_ath10k_htt_pktlog(ar, resp->pktlog_msg.payload,
2379 sizeof(*hdr) +
2380 __le16_to_cpu(hdr->size));
2381 break;
2382 }
Michal Kazioraa5b4fb2014-07-23 12:20:33 +02002383 case HTT_T2H_MSG_TYPE_RX_FLUSH: {
2384 /* Ignore this event because mac80211 takes care of Rx
2385 * aggregation reordering.
2386 */
2387 break;
2388 }
Michal Kaziorc5450702015-01-24 12:14:48 +02002389 case HTT_T2H_MSG_TYPE_RX_IN_ORD_PADDR_IND: {
Rajkumar Manoharane7827e52016-02-12 11:40:58 +05302390 skb_queue_tail(&htt->rx_in_ord_compl_q, skb);
Michal Kaziorc5450702015-01-24 12:14:48 +02002391 tasklet_schedule(&htt->txrx_compl_task);
2392 return;
2393 }
2394 case HTT_T2H_MSG_TYPE_TX_CREDIT_UPDATE_IND:
Rajkumar Manoharan8348db22015-03-25 13:12:27 +02002395 break;
2396 case HTT_T2H_MSG_TYPE_CHAN_CHANGE:
Michal Kaziorc5450702015-01-24 12:14:48 +02002397 break;
David Liuccec9032015-07-24 20:25:32 +03002398 case HTT_T2H_MSG_TYPE_AGGR_CONF:
2399 break;
Raja Mani721ad3c2015-06-22 20:22:24 +05302400 case HTT_T2H_MSG_TYPE_TX_FETCH_IND:
Michal Kazior426e10e2016-03-06 16:14:43 +02002401 skb_queue_tail(&htt->tx_fetch_ind_q, skb);
2402 tasklet_schedule(&htt->txrx_compl_task);
2403 return;
Michal Kaziordf94e702016-01-21 14:13:23 +01002404 case HTT_T2H_MSG_TYPE_TX_FETCH_CONFIRM:
Michal Kazior839ae632016-03-06 16:14:32 +02002405 ath10k_htt_rx_tx_fetch_confirm(ar, skb);
2406 break;
Michal Kaziordf94e702016-01-21 14:13:23 +01002407 case HTT_T2H_MSG_TYPE_TX_MODE_SWITCH_IND:
Michal Kazior839ae632016-03-06 16:14:32 +02002408 ath10k_htt_rx_tx_mode_switch_ind(ar, skb);
Michal Kazior9b158732016-01-21 14:13:27 +01002409 break;
2410 case HTT_T2H_MSG_TYPE_EN_STATS:
Kalle Valo5e3dd152013-06-12 20:52:10 +03002411 default:
Michal Kazior2358a542014-10-02 13:32:55 +02002412 ath10k_warn(ar, "htt event (%d) not handled\n",
2413 resp->hdr.msg_type);
Michal Kazior7aa7a722014-08-25 12:09:38 +02002414 ath10k_dbg_dump(ar, ATH10K_DBG_HTT_DUMP, NULL, "htt event: ",
Kalle Valo5e3dd152013-06-12 20:52:10 +03002415 skb->data, skb->len);
2416 break;
2417 };
2418
2419 /* Free the indication buffer */
2420 dev_kfree_skb_any(skb);
2421}
Rajkumar Manoharan3f0f7ed2015-10-12 18:27:03 +05302422EXPORT_SYMBOL(ath10k_htt_t2h_msg_handler);
Michal Kazior6c5151a2014-02-27 18:50:04 +02002423
Vivek Natarajanafb0bf72015-10-30 14:57:58 +05302424void ath10k_htt_rx_pktlog_completion_handler(struct ath10k *ar,
2425 struct sk_buff *skb)
2426{
Ashok Raj Nagarajan53a5c9b2016-02-05 21:12:48 +05302427 trace_ath10k_htt_pktlog(ar, skb->data, skb->len);
Vivek Natarajanafb0bf72015-10-30 14:57:58 +05302428 dev_kfree_skb_any(skb);
2429}
2430EXPORT_SYMBOL(ath10k_htt_rx_pktlog_completion_handler);
2431
Michal Kazior6c5151a2014-02-27 18:50:04 +02002432static void ath10k_htt_txrx_compl_task(unsigned long ptr)
2433{
2434 struct ath10k_htt *htt = (struct ath10k_htt *)ptr;
Michal Kaziorc5450702015-01-24 12:14:48 +02002435 struct ath10k *ar = htt->ar;
Michal Kaziord742c962016-01-13 14:52:52 +01002436 struct sk_buff_head tx_q;
Rajkumar Manoharanda6416c2016-02-12 11:40:59 +05302437 struct sk_buff_head rx_q;
2438 struct sk_buff_head rx_ind_q;
Michal Kazior426e10e2016-03-06 16:14:43 +02002439 struct sk_buff_head tx_ind_q;
Michal Kazior6c5151a2014-02-27 18:50:04 +02002440 struct htt_resp *resp;
2441 struct sk_buff *skb;
Michal Kaziord742c962016-01-13 14:52:52 +01002442 unsigned long flags;
Michal Kazior6c5151a2014-02-27 18:50:04 +02002443
Michal Kaziord742c962016-01-13 14:52:52 +01002444 __skb_queue_head_init(&tx_q);
Rajkumar Manoharanda6416c2016-02-12 11:40:59 +05302445 __skb_queue_head_init(&rx_q);
2446 __skb_queue_head_init(&rx_ind_q);
Michal Kazior426e10e2016-03-06 16:14:43 +02002447 __skb_queue_head_init(&tx_ind_q);
Michal Kaziord742c962016-01-13 14:52:52 +01002448
2449 spin_lock_irqsave(&htt->tx_compl_q.lock, flags);
2450 skb_queue_splice_init(&htt->tx_compl_q, &tx_q);
2451 spin_unlock_irqrestore(&htt->tx_compl_q.lock, flags);
2452
Rajkumar Manoharanda6416c2016-02-12 11:40:59 +05302453 spin_lock_irqsave(&htt->rx_compl_q.lock, flags);
2454 skb_queue_splice_init(&htt->rx_compl_q, &rx_q);
2455 spin_unlock_irqrestore(&htt->rx_compl_q.lock, flags);
2456
2457 spin_lock_irqsave(&htt->rx_in_ord_compl_q.lock, flags);
2458 skb_queue_splice_init(&htt->rx_in_ord_compl_q, &rx_ind_q);
2459 spin_unlock_irqrestore(&htt->rx_in_ord_compl_q.lock, flags);
2460
Michal Kazior426e10e2016-03-06 16:14:43 +02002461 spin_lock_irqsave(&htt->tx_fetch_ind_q.lock, flags);
2462 skb_queue_splice_init(&htt->tx_fetch_ind_q, &tx_ind_q);
2463 spin_unlock_irqrestore(&htt->tx_fetch_ind_q.lock, flags);
2464
Michal Kaziord742c962016-01-13 14:52:52 +01002465 while ((skb = __skb_dequeue(&tx_q))) {
Michal Kazior6c5151a2014-02-27 18:50:04 +02002466 ath10k_htt_rx_frm_tx_compl(htt->ar, skb);
2467 dev_kfree_skb_any(skb);
2468 }
2469
Michal Kazior426e10e2016-03-06 16:14:43 +02002470 while ((skb = __skb_dequeue(&tx_ind_q))) {
2471 ath10k_htt_rx_tx_fetch_ind(ar, skb);
2472 dev_kfree_skb_any(skb);
2473 }
2474
Michal Kazior29946872016-03-06 16:14:34 +02002475 ath10k_mac_tx_push_pending(ar);
2476
Rajkumar Manoharanda6416c2016-02-12 11:40:59 +05302477 while ((skb = __skb_dequeue(&rx_q))) {
Michal Kazior6c5151a2014-02-27 18:50:04 +02002478 resp = (struct htt_resp *)skb->data;
Rajkumar Manoharane7827e52016-02-12 11:40:58 +05302479 spin_lock_bh(&htt->rx_ring.lock);
Michal Kazior6c5151a2014-02-27 18:50:04 +02002480 ath10k_htt_rx_handler(htt, &resp->rx_ind);
Rajkumar Manoharane7827e52016-02-12 11:40:58 +05302481 spin_unlock_bh(&htt->rx_ring.lock);
Michal Kazior6c5151a2014-02-27 18:50:04 +02002482 dev_kfree_skb_any(skb);
2483 }
Michal Kaziorc5450702015-01-24 12:14:48 +02002484
Rajkumar Manoharanda6416c2016-02-12 11:40:59 +05302485 while ((skb = __skb_dequeue(&rx_ind_q))) {
Rajkumar Manoharane7827e52016-02-12 11:40:58 +05302486 spin_lock_bh(&htt->rx_ring.lock);
Michal Kaziorc5450702015-01-24 12:14:48 +02002487 ath10k_htt_rx_in_ord_ind(ar, skb);
Rajkumar Manoharane7827e52016-02-12 11:40:58 +05302488 spin_unlock_bh(&htt->rx_ring.lock);
Michal Kaziorc5450702015-01-24 12:14:48 +02002489 dev_kfree_skb_any(skb);
2490 }
Michal Kazior6c5151a2014-02-27 18:50:04 +02002491}