blob: e43bf558f0cdba5d0d3d5e9fffe3d39583d96dae [file] [log] [blame]
Jesse Barnes79e53942008-11-07 14:24:08 -08001/*
2 * Copyright 2006 Dave Airlie <airlied@linux.ie>
3 * Copyright © 2006-2007 Intel Corporation
4 * Jesse Barnes <jesse.barnes@intel.com>
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice (including the next
14 * paragraph) shall be included in all copies or substantial portions of the
15 * Software.
16 *
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
22 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
23 * DEALINGS IN THE SOFTWARE.
24 *
25 * Authors:
26 * Eric Anholt <eric@anholt.net>
27 */
28#include <linux/i2c.h>
Tejun Heo5a0e3ad2010-03-24 17:04:11 +090029#include <linux/slab.h>
Jesse Barnes79e53942008-11-07 14:24:08 -080030#include <linux/delay.h>
Paul Gortmaker2d1a8a42011-08-30 18:16:33 -040031#include <linux/export.h>
David Howells760285e2012-10-02 18:01:07 +010032#include <drm/drmP.h>
33#include <drm/drm_crtc.h>
34#include <drm/drm_edid.h>
Chris Wilsonea5b2132010-08-04 13:50:23 +010035#include "intel_drv.h"
David Howells760285e2012-10-02 18:01:07 +010036#include <drm/i915_drm.h>
Jesse Barnes79e53942008-11-07 14:24:08 -080037#include "i915_drv.h"
38#include "intel_sdvo_regs.h"
39
Zhenyu Wang14571b42010-03-30 14:06:33 +080040#define SDVO_TMDS_MASK (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_TMDS1)
41#define SDVO_RGB_MASK (SDVO_OUTPUT_RGB0 | SDVO_OUTPUT_RGB1)
42#define SDVO_LVDS_MASK (SDVO_OUTPUT_LVDS0 | SDVO_OUTPUT_LVDS1)
Chris Wilsona0b1c7a2011-09-30 22:56:41 +010043#define SDVO_TV_MASK (SDVO_OUTPUT_CVBS0 | SDVO_OUTPUT_SVID0 | SDVO_OUTPUT_YPRPB0)
Zhenyu Wang14571b42010-03-30 14:06:33 +080044
45#define SDVO_OUTPUT_MASK (SDVO_TMDS_MASK | SDVO_RGB_MASK | SDVO_LVDS_MASK |\
Akshay Joshi0206e352011-08-16 15:34:10 -040046 SDVO_TV_MASK)
Zhenyu Wang14571b42010-03-30 14:06:33 +080047
48#define IS_TV(c) (c->output_flag & SDVO_TV_MASK)
Chris Wilson139467432011-02-09 20:01:16 +000049#define IS_TMDS(c) (c->output_flag & SDVO_TMDS_MASK)
Zhenyu Wang14571b42010-03-30 14:06:33 +080050#define IS_LVDS(c) (c->output_flag & SDVO_LVDS_MASK)
Chris Wilson32aad862010-08-04 13:50:25 +010051#define IS_TV_OR_LVDS(c) (c->output_flag & (SDVO_TV_MASK | SDVO_LVDS_MASK))
Chris Wilson52220082011-06-20 14:45:50 +010052#define IS_DIGITAL(c) (c->output_flag & (SDVO_TMDS_MASK | SDVO_LVDS_MASK))
Zhenyu Wang14571b42010-03-30 14:06:33 +080053
Jesse Barnes79e53942008-11-07 14:24:08 -080054
Chris Wilson2e88e402010-08-07 11:01:27 +010055static const char *tv_format_names[] = {
Zhao Yakuice6feab2009-08-24 13:50:26 +080056 "NTSC_M" , "NTSC_J" , "NTSC_443",
57 "PAL_B" , "PAL_D" , "PAL_G" ,
58 "PAL_H" , "PAL_I" , "PAL_M" ,
59 "PAL_N" , "PAL_NC" , "PAL_60" ,
60 "SECAM_B" , "SECAM_D" , "SECAM_G" ,
61 "SECAM_K" , "SECAM_K1", "SECAM_L" ,
62 "SECAM_60"
63};
64
65#define TV_FORMAT_NUM (sizeof(tv_format_names) / sizeof(*tv_format_names))
66
Chris Wilsonea5b2132010-08-04 13:50:23 +010067struct intel_sdvo {
68 struct intel_encoder base;
69
Chris Wilsonf899fc62010-07-20 15:44:45 -070070 struct i2c_adapter *i2c;
Keith Packardf9c10a92009-05-30 12:16:25 -070071 u8 slave_addr;
Jesse Barnese2f0ba92009-02-02 15:11:52 -080072
Chris Wilsone957d772010-09-24 12:52:03 +010073 struct i2c_adapter ddc;
74
Jesse Barnese2f0ba92009-02-02 15:11:52 -080075 /* Register for the SDVO device: SDVOB or SDVOC */
Daniel Vettereef4eac2012-03-23 23:43:35 +010076 uint32_t sdvo_reg;
Jesse Barnes79e53942008-11-07 14:24:08 -080077
Jesse Barnese2f0ba92009-02-02 15:11:52 -080078 /* Active outputs controlled by this SDVO output */
79 uint16_t controlled_output;
Jesse Barnes79e53942008-11-07 14:24:08 -080080
Jesse Barnese2f0ba92009-02-02 15:11:52 -080081 /*
82 * Capabilities of the SDVO device returned by
Damien Lespiau19d415a2013-06-10 13:28:42 +010083 * intel_sdvo_get_capabilities()
Jesse Barnese2f0ba92009-02-02 15:11:52 -080084 */
Jesse Barnes79e53942008-11-07 14:24:08 -080085 struct intel_sdvo_caps caps;
Jesse Barnese2f0ba92009-02-02 15:11:52 -080086
87 /* Pixel clock limitations reported by the SDVO device, in kHz */
Jesse Barnes79e53942008-11-07 14:24:08 -080088 int pixel_clock_min, pixel_clock_max;
89
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +080090 /*
91 * For multiple function SDVO device,
92 * this is for current attached outputs.
93 */
94 uint16_t attached_output;
95
Simon Farnsworthcc68c812011-09-21 17:13:30 +010096 /*
97 * Hotplug activation bits for this device
98 */
Jani Nikula5fa7ac92012-08-29 16:43:58 +030099 uint16_t hotplug_active;
Simon Farnsworthcc68c812011-09-21 17:13:30 +0100100
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800101 /**
Chris Wilsone953fd72011-02-21 22:23:52 +0000102 * This is used to select the color range of RBG outputs in HDMI mode.
103 * It is only valid when using TMDS encoding and 8 bit per color mode.
104 */
105 uint32_t color_range;
Ville Syrjälä55bc60d2013-01-17 16:31:29 +0200106 bool color_range_auto;
Chris Wilsone953fd72011-02-21 22:23:52 +0000107
108 /**
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800109 * This is set if we're going to treat the device as TV-out.
110 *
111 * While we have these nice friendly flags for output types that ought
112 * to decide this for us, the S-Video output on our HDMI+S-Video card
113 * shows up as RGB1 (VGA).
114 */
115 bool is_tv;
116
Daniel Vettereef4eac2012-03-23 23:43:35 +0100117 /* On different gens SDVOB is at different places. */
118 bool is_sdvob;
119
Zhao Yakuice6feab2009-08-24 13:50:26 +0800120 /* This is for current tv format name */
Chris Wilson40039752010-08-04 13:50:26 +0100121 int tv_format_index;
Zhao Yakuice6feab2009-08-24 13:50:26 +0800122
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800123 /**
124 * This is set if we treat the device as HDMI, instead of DVI.
125 */
126 bool is_hdmi;
Chris Wilsonda79de92010-11-22 11:12:46 +0000127 bool has_hdmi_monitor;
128 bool has_hdmi_audio;
Ville Syrjäläabedc072013-01-17 16:31:31 +0200129 bool rgb_quant_range_selectable;
ling.ma@intel.com12682a92009-06-30 11:35:35 +0800130
Ma Ling7086c872009-05-13 11:20:06 +0800131 /**
Chris Wilson6c9547f2010-08-25 10:05:17 +0100132 * This is set if we detect output of sdvo device as LVDS and
133 * have a valid fixed mode to use with the panel.
Ma Ling7086c872009-05-13 11:20:06 +0800134 */
135 bool is_lvds;
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800136
137 /**
ling.ma@intel.com12682a92009-06-30 11:35:35 +0800138 * This is sdvo fixed pannel mode pointer
139 */
140 struct drm_display_mode *sdvo_lvds_fixed_mode;
141
Eric Anholtc751ce42010-03-25 11:48:48 -0700142 /* DDC bus used by this SDVO encoder */
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800143 uint8_t ddc_bus;
Egbert Eiche7518232012-10-13 14:29:31 +0200144
145 /*
146 * the sdvo flag gets lost in round trip: dtd->adjusted_mode->dtd
147 */
148 uint8_t dtd_sdvo_flags;
Zhenyu Wang14571b42010-03-30 14:06:33 +0800149};
150
151struct intel_sdvo_connector {
Chris Wilson615fb932010-08-04 13:50:24 +0100152 struct intel_connector base;
153
Zhenyu Wang14571b42010-03-30 14:06:33 +0800154 /* Mark the type of connector */
155 uint16_t output_flag;
156
Daniel Vetterc3e5f672012-02-23 17:14:47 +0100157 enum hdmi_force_audio force_audio;
Chris Wilson7f36e7e2010-09-19 09:29:33 +0100158
Zhenyu Wang14571b42010-03-30 14:06:33 +0800159 /* This contains all current supported TV format */
Chris Wilson40039752010-08-04 13:50:26 +0100160 u8 tv_format_supported[TV_FORMAT_NUM];
Zhenyu Wang14571b42010-03-30 14:06:33 +0800161 int format_supported_num;
Chris Wilsonc5521702010-08-04 13:50:28 +0100162 struct drm_property *tv_format;
Zhenyu Wang14571b42010-03-30 14:06:33 +0800163
Zhao Yakuib9219c52009-09-10 15:45:46 +0800164 /* add the property for the SDVO-TV */
Chris Wilsonc5521702010-08-04 13:50:28 +0100165 struct drm_property *left;
166 struct drm_property *right;
167 struct drm_property *top;
168 struct drm_property *bottom;
169 struct drm_property *hpos;
170 struct drm_property *vpos;
171 struct drm_property *contrast;
172 struct drm_property *saturation;
173 struct drm_property *hue;
174 struct drm_property *sharpness;
175 struct drm_property *flicker_filter;
176 struct drm_property *flicker_filter_adaptive;
177 struct drm_property *flicker_filter_2d;
178 struct drm_property *tv_chroma_filter;
179 struct drm_property *tv_luma_filter;
Chris Wilsone0442182010-08-04 13:50:29 +0100180 struct drm_property *dot_crawl;
Zhao Yakuib9219c52009-09-10 15:45:46 +0800181
182 /* add the property for the SDVO-TV/LVDS */
Chris Wilsonc5521702010-08-04 13:50:28 +0100183 struct drm_property *brightness;
Zhao Yakuib9219c52009-09-10 15:45:46 +0800184
185 /* Add variable to record current setting for the above property */
186 u32 left_margin, right_margin, top_margin, bottom_margin;
Chris Wilsonc5521702010-08-04 13:50:28 +0100187
Zhao Yakuib9219c52009-09-10 15:45:46 +0800188 /* this is to get the range of margin.*/
189 u32 max_hscan, max_vscan;
190 u32 max_hpos, cur_hpos;
191 u32 max_vpos, cur_vpos;
192 u32 cur_brightness, max_brightness;
193 u32 cur_contrast, max_contrast;
194 u32 cur_saturation, max_saturation;
195 u32 cur_hue, max_hue;
Chris Wilsonc5521702010-08-04 13:50:28 +0100196 u32 cur_sharpness, max_sharpness;
197 u32 cur_flicker_filter, max_flicker_filter;
198 u32 cur_flicker_filter_adaptive, max_flicker_filter_adaptive;
199 u32 cur_flicker_filter_2d, max_flicker_filter_2d;
200 u32 cur_tv_chroma_filter, max_tv_chroma_filter;
201 u32 cur_tv_luma_filter, max_tv_luma_filter;
Chris Wilsone0442182010-08-04 13:50:29 +0100202 u32 cur_dot_crawl, max_dot_crawl;
Jesse Barnes79e53942008-11-07 14:24:08 -0800203};
204
Daniel Vetter8aca63a2013-07-21 21:37:01 +0200205static struct intel_sdvo *to_sdvo(struct intel_encoder *encoder)
Chris Wilsonea5b2132010-08-04 13:50:23 +0100206{
Daniel Vetter8aca63a2013-07-21 21:37:01 +0200207 return container_of(encoder, struct intel_sdvo, base);
Chris Wilsonea5b2132010-08-04 13:50:23 +0100208}
209
Chris Wilsondf0e9242010-09-09 16:20:55 +0100210static struct intel_sdvo *intel_attached_sdvo(struct drm_connector *connector)
211{
Daniel Vetter8aca63a2013-07-21 21:37:01 +0200212 return to_sdvo(intel_attached_encoder(connector));
Chris Wilsondf0e9242010-09-09 16:20:55 +0100213}
214
Chris Wilson615fb932010-08-04 13:50:24 +0100215static struct intel_sdvo_connector *to_intel_sdvo_connector(struct drm_connector *connector)
216{
217 return container_of(to_intel_connector(connector), struct intel_sdvo_connector, base);
218}
219
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +0800220static bool
Chris Wilsonea5b2132010-08-04 13:50:23 +0100221intel_sdvo_output_setup(struct intel_sdvo *intel_sdvo, uint16_t flags);
Chris Wilson32aad862010-08-04 13:50:25 +0100222static bool
223intel_sdvo_tv_create_property(struct intel_sdvo *intel_sdvo,
224 struct intel_sdvo_connector *intel_sdvo_connector,
225 int type);
226static bool
227intel_sdvo_create_enhance_property(struct intel_sdvo *intel_sdvo,
228 struct intel_sdvo_connector *intel_sdvo_connector);
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +0800229
Jesse Barnes79e53942008-11-07 14:24:08 -0800230/**
231 * Writes the SDVOB or SDVOC with the given value, but always writes both
232 * SDVOB and SDVOC to work around apparent hardware issues (according to
233 * comments in the BIOS).
234 */
Chris Wilsonea5b2132010-08-04 13:50:23 +0100235static void intel_sdvo_write_sdvox(struct intel_sdvo *intel_sdvo, u32 val)
Jesse Barnes79e53942008-11-07 14:24:08 -0800236{
Chris Wilson4ef69c72010-09-09 15:14:28 +0100237 struct drm_device *dev = intel_sdvo->base.base.dev;
Jesse Barnes79e53942008-11-07 14:24:08 -0800238 struct drm_i915_private *dev_priv = dev->dev_private;
Jesse Barnes79e53942008-11-07 14:24:08 -0800239 u32 bval = val, cval = val;
240 int i;
241
Chris Wilsonea5b2132010-08-04 13:50:23 +0100242 if (intel_sdvo->sdvo_reg == PCH_SDVOB) {
243 I915_WRITE(intel_sdvo->sdvo_reg, val);
244 I915_READ(intel_sdvo->sdvo_reg);
Zhao Yakui461ed3c2010-03-30 15:11:33 +0800245 return;
246 }
247
Paulo Zanonie2debe92013-02-18 19:00:27 -0300248 if (intel_sdvo->sdvo_reg == GEN3_SDVOB)
249 cval = I915_READ(GEN3_SDVOC);
250 else
251 bval = I915_READ(GEN3_SDVOB);
252
Jesse Barnes79e53942008-11-07 14:24:08 -0800253 /*
254 * Write the registers twice for luck. Sometimes,
255 * writing them only once doesn't appear to 'stick'.
256 * The BIOS does this too. Yay, magic
257 */
258 for (i = 0; i < 2; i++)
259 {
Paulo Zanonie2debe92013-02-18 19:00:27 -0300260 I915_WRITE(GEN3_SDVOB, bval);
261 I915_READ(GEN3_SDVOB);
262 I915_WRITE(GEN3_SDVOC, cval);
263 I915_READ(GEN3_SDVOC);
Jesse Barnes79e53942008-11-07 14:24:08 -0800264 }
265}
266
Chris Wilson32aad862010-08-04 13:50:25 +0100267static bool intel_sdvo_read_byte(struct intel_sdvo *intel_sdvo, u8 addr, u8 *ch)
Jesse Barnes79e53942008-11-07 14:24:08 -0800268{
Jesse Barnes79e53942008-11-07 14:24:08 -0800269 struct i2c_msg msgs[] = {
270 {
Chris Wilsone957d772010-09-24 12:52:03 +0100271 .addr = intel_sdvo->slave_addr,
Jesse Barnes79e53942008-11-07 14:24:08 -0800272 .flags = 0,
273 .len = 1,
Chris Wilsone957d772010-09-24 12:52:03 +0100274 .buf = &addr,
Jesse Barnes79e53942008-11-07 14:24:08 -0800275 },
276 {
Chris Wilsone957d772010-09-24 12:52:03 +0100277 .addr = intel_sdvo->slave_addr,
Jesse Barnes79e53942008-11-07 14:24:08 -0800278 .flags = I2C_M_RD,
279 .len = 1,
Chris Wilsone957d772010-09-24 12:52:03 +0100280 .buf = ch,
Jesse Barnes79e53942008-11-07 14:24:08 -0800281 }
282 };
Chris Wilson32aad862010-08-04 13:50:25 +0100283 int ret;
Jesse Barnes79e53942008-11-07 14:24:08 -0800284
Chris Wilsonf899fc62010-07-20 15:44:45 -0700285 if ((ret = i2c_transfer(intel_sdvo->i2c, msgs, 2)) == 2)
Jesse Barnes79e53942008-11-07 14:24:08 -0800286 return true;
Jesse Barnes79e53942008-11-07 14:24:08 -0800287
Zhao Yakui8a4c47f2009-07-20 13:48:04 +0800288 DRM_DEBUG_KMS("i2c transfer returned %d\n", ret);
Jesse Barnes79e53942008-11-07 14:24:08 -0800289 return false;
290}
291
Jesse Barnes79e53942008-11-07 14:24:08 -0800292#define SDVO_CMD_NAME_ENTRY(cmd) {cmd, #cmd}
293/** Mapping of command numbers to names, for debug output */
Tobias Klauser005568b2009-02-09 22:02:42 +0100294static const struct _sdvo_cmd_name {
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800295 u8 cmd;
Chris Wilson2e88e402010-08-07 11:01:27 +0100296 const char *name;
Jesse Barnes79e53942008-11-07 14:24:08 -0800297} sdvo_cmd_names[] = {
Akshay Joshi0206e352011-08-16 15:34:10 -0400298 SDVO_CMD_NAME_ENTRY(SDVO_CMD_RESET),
299 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_DEVICE_CAPS),
300 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FIRMWARE_REV),
301 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TRAINED_INPUTS),
302 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ACTIVE_OUTPUTS),
303 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ACTIVE_OUTPUTS),
304 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_IN_OUT_MAP),
305 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_IN_OUT_MAP),
306 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ATTACHED_DISPLAYS),
307 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HOT_PLUG_SUPPORT),
308 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ACTIVE_HOT_PLUG),
309 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ACTIVE_HOT_PLUG),
310 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INTERRUPT_EVENT_SOURCE),
311 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TARGET_INPUT),
312 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TARGET_OUTPUT),
313 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_TIMINGS_PART1),
314 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_TIMINGS_PART2),
315 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART1),
316 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART2),
317 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART1),
318 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OUTPUT_TIMINGS_PART1),
319 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OUTPUT_TIMINGS_PART2),
320 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_TIMINGS_PART1),
321 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_TIMINGS_PART2),
322 SDVO_CMD_NAME_ENTRY(SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING),
323 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1),
324 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2),
325 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE),
326 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_PIXEL_CLOCK_RANGE),
327 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_CLOCK_RATE_MULTS),
328 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_CLOCK_RATE_MULT),
329 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CLOCK_RATE_MULT),
330 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_TV_FORMATS),
331 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_FORMAT),
332 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_FORMAT),
333 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_POWER_STATES),
334 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_POWER_STATE),
335 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ENCODER_POWER_STATE),
336 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_DISPLAY_POWER_STATE),
337 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CONTROL_BUS_SWITCH),
338 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT),
339 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SCALED_HDTV_RESOLUTION_SUPPORT),
340 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS),
Chris Wilsonc5521702010-08-04 13:50:28 +0100341
Akshay Joshi0206e352011-08-16 15:34:10 -0400342 /* Add the op code for SDVO enhancements */
343 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_HPOS),
344 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HPOS),
345 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HPOS),
346 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_VPOS),
347 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_VPOS),
348 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_VPOS),
349 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_SATURATION),
350 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SATURATION),
351 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_SATURATION),
352 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_HUE),
353 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HUE),
354 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HUE),
355 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_CONTRAST),
356 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_CONTRAST),
357 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CONTRAST),
358 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_BRIGHTNESS),
359 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_BRIGHTNESS),
360 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_BRIGHTNESS),
361 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_OVERSCAN_H),
362 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OVERSCAN_H),
363 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OVERSCAN_H),
364 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_OVERSCAN_V),
365 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OVERSCAN_V),
366 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OVERSCAN_V),
367 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER),
368 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER),
369 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER),
370 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER_ADAPTIVE),
371 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER_ADAPTIVE),
372 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER_ADAPTIVE),
373 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER_2D),
374 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER_2D),
375 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER_2D),
376 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_SHARPNESS),
377 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SHARPNESS),
378 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_SHARPNESS),
379 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_DOT_CRAWL),
380 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_DOT_CRAWL),
381 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_TV_CHROMA_FILTER),
382 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_CHROMA_FILTER),
383 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_CHROMA_FILTER),
384 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_TV_LUMA_FILTER),
385 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_LUMA_FILTER),
386 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_LUMA_FILTER),
Chris Wilsonc5521702010-08-04 13:50:28 +0100387
Akshay Joshi0206e352011-08-16 15:34:10 -0400388 /* HDMI op code */
389 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPP_ENCODE),
390 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ENCODE),
391 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ENCODE),
392 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_PIXEL_REPLI),
393 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PIXEL_REPLI),
394 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_COLORIMETRY_CAP),
395 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_COLORIMETRY),
396 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_COLORIMETRY),
397 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_AUDIO_ENCRYPT_PREFER),
398 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_AUDIO_STAT),
399 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_AUDIO_STAT),
400 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_INDEX),
401 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_INDEX),
402 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_INFO),
403 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_AV_SPLIT),
404 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_AV_SPLIT),
405 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_TXRATE),
406 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_TXRATE),
407 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_DATA),
408 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_DATA),
Jesse Barnes79e53942008-11-07 14:24:08 -0800409};
410
Daniel Vettereef4eac2012-03-23 23:43:35 +0100411#define SDVO_NAME(svdo) ((svdo)->is_sdvob ? "SDVOB" : "SDVOC")
Jesse Barnes79e53942008-11-07 14:24:08 -0800412
Chris Wilsonea5b2132010-08-04 13:50:23 +0100413static void intel_sdvo_debug_write(struct intel_sdvo *intel_sdvo, u8 cmd,
Chris Wilson32aad862010-08-04 13:50:25 +0100414 const void *args, int args_len)
Jesse Barnes79e53942008-11-07 14:24:08 -0800415{
Daniel Vetter84fcb462013-11-27 16:03:01 +0100416 int i, pos = 0;
417#define BUF_LEN 256
418 char buffer[BUF_LEN];
Jesse Barnes79e53942008-11-07 14:24:08 -0800419
Daniel Vetter84fcb462013-11-27 16:03:01 +0100420#define BUF_PRINT(args...) \
421 pos += snprintf(buffer + pos, max_t(int, BUF_LEN - pos, 0), args)
422
423
424 for (i = 0; i < args_len; i++) {
425 BUF_PRINT("%02X ", ((u8 *)args)[i]);
426 }
427 for (; i < 8; i++) {
428 BUF_PRINT(" ");
429 }
Kulikov Vasiliy04ad3272010-06-28 15:54:56 +0400430 for (i = 0; i < ARRAY_SIZE(sdvo_cmd_names); i++) {
Jesse Barnes79e53942008-11-07 14:24:08 -0800431 if (cmd == sdvo_cmd_names[i].cmd) {
Daniel Vetter84fcb462013-11-27 16:03:01 +0100432 BUF_PRINT("(%s)", sdvo_cmd_names[i].name);
Jesse Barnes79e53942008-11-07 14:24:08 -0800433 break;
434 }
435 }
Daniel Vetter84fcb462013-11-27 16:03:01 +0100436 if (i == ARRAY_SIZE(sdvo_cmd_names)) {
437 BUF_PRINT("(%02X)", cmd);
438 }
439 BUG_ON(pos >= BUF_LEN - 1);
440#undef BUF_PRINT
441#undef BUF_LEN
442
443 DRM_DEBUG_KMS("%s: W: %02X %s\n", SDVO_NAME(intel_sdvo), cmd, buffer);
Jesse Barnes79e53942008-11-07 14:24:08 -0800444}
Jesse Barnes79e53942008-11-07 14:24:08 -0800445
Jesse Barnes79e53942008-11-07 14:24:08 -0800446static const char *cmd_status_names[] = {
447 "Power on",
448 "Success",
449 "Not supported",
450 "Invalid arg",
451 "Pending",
452 "Target not specified",
453 "Scaling not supported"
454};
455
Chris Wilsone957d772010-09-24 12:52:03 +0100456static bool intel_sdvo_write_cmd(struct intel_sdvo *intel_sdvo, u8 cmd,
457 const void *args, int args_len)
458{
Ben Widawsky3bf3f452012-04-16 14:07:41 -0700459 u8 *buf, status;
460 struct i2c_msg *msgs;
461 int i, ret = true;
462
Alan Cox0274df32012-07-25 13:51:04 +0100463 /* Would be simpler to allocate both in one go ? */
Mihnea Dobrescu-Balaur5c67eeb2013-03-10 14:22:48 +0200464 buf = kzalloc(args_len * 2 + 2, GFP_KERNEL);
Ben Widawsky3bf3f452012-04-16 14:07:41 -0700465 if (!buf)
466 return false;
467
468 msgs = kcalloc(args_len + 3, sizeof(*msgs), GFP_KERNEL);
Alan Cox0274df32012-07-25 13:51:04 +0100469 if (!msgs) {
470 kfree(buf);
Ben Widawsky3bf3f452012-04-16 14:07:41 -0700471 return false;
Alan Cox0274df32012-07-25 13:51:04 +0100472 }
Chris Wilsone957d772010-09-24 12:52:03 +0100473
474 intel_sdvo_debug_write(intel_sdvo, cmd, args, args_len);
475
476 for (i = 0; i < args_len; i++) {
477 msgs[i].addr = intel_sdvo->slave_addr;
478 msgs[i].flags = 0;
479 msgs[i].len = 2;
480 msgs[i].buf = buf + 2 *i;
481 buf[2*i + 0] = SDVO_I2C_ARG_0 - i;
482 buf[2*i + 1] = ((u8*)args)[i];
483 }
484 msgs[i].addr = intel_sdvo->slave_addr;
485 msgs[i].flags = 0;
486 msgs[i].len = 2;
487 msgs[i].buf = buf + 2*i;
488 buf[2*i + 0] = SDVO_I2C_OPCODE;
489 buf[2*i + 1] = cmd;
490
491 /* the following two are to read the response */
492 status = SDVO_I2C_CMD_STATUS;
493 msgs[i+1].addr = intel_sdvo->slave_addr;
494 msgs[i+1].flags = 0;
495 msgs[i+1].len = 1;
496 msgs[i+1].buf = &status;
497
498 msgs[i+2].addr = intel_sdvo->slave_addr;
499 msgs[i+2].flags = I2C_M_RD;
500 msgs[i+2].len = 1;
501 msgs[i+2].buf = &status;
502
503 ret = i2c_transfer(intel_sdvo->i2c, msgs, i+3);
504 if (ret < 0) {
505 DRM_DEBUG_KMS("I2c transfer returned %d\n", ret);
Ben Widawsky3bf3f452012-04-16 14:07:41 -0700506 ret = false;
507 goto out;
Chris Wilsone957d772010-09-24 12:52:03 +0100508 }
509 if (ret != i+3) {
510 /* failure in I2C transfer */
511 DRM_DEBUG_KMS("I2c transfer returned %d/%d\n", ret, i+3);
Ben Widawsky3bf3f452012-04-16 14:07:41 -0700512 ret = false;
Chris Wilsone957d772010-09-24 12:52:03 +0100513 }
514
Ben Widawsky3bf3f452012-04-16 14:07:41 -0700515out:
516 kfree(msgs);
517 kfree(buf);
518 return ret;
Chris Wilsone957d772010-09-24 12:52:03 +0100519}
520
Chris Wilsonb5c616a2010-09-09 19:06:13 +0100521static bool intel_sdvo_read_response(struct intel_sdvo *intel_sdvo,
522 void *response, int response_len)
Jesse Barnes79e53942008-11-07 14:24:08 -0800523{
Chris Wilsonfc373812012-11-23 11:57:56 +0000524 u8 retry = 15; /* 5 quick checks, followed by 10 long checks */
Chris Wilsonb5c616a2010-09-09 19:06:13 +0100525 u8 status;
Daniel Vetter84fcb462013-11-27 16:03:01 +0100526 int i, pos = 0;
527#define BUF_LEN 256
528 char buffer[BUF_LEN];
Jesse Barnes79e53942008-11-07 14:24:08 -0800529
Chris Wilsond121a5d2011-01-25 15:00:01 +0000530
Chris Wilsonb5c616a2010-09-09 19:06:13 +0100531 /*
532 * The documentation states that all commands will be
533 * processed within 15µs, and that we need only poll
534 * the status byte a maximum of 3 times in order for the
535 * command to be complete.
536 *
537 * Check 5 times in case the hardware failed to read the docs.
Chris Wilsonfc373812012-11-23 11:57:56 +0000538 *
539 * Also beware that the first response by many devices is to
540 * reply PENDING and stall for time. TVs are notorious for
541 * requiring longer than specified to complete their replies.
542 * Originally (in the DDX long ago), the delay was only ever 15ms
543 * with an additional delay of 30ms applied for TVs added later after
544 * many experiments. To accommodate both sets of delays, we do a
545 * sequence of slow checks if the device is falling behind and fails
546 * to reply within 5*15µs.
Chris Wilsonb5c616a2010-09-09 19:06:13 +0100547 */
Chris Wilsond121a5d2011-01-25 15:00:01 +0000548 if (!intel_sdvo_read_byte(intel_sdvo,
549 SDVO_I2C_CMD_STATUS,
550 &status))
551 goto log_fail;
552
Guillaume Clement1ad87e72013-08-10 21:57:57 +0200553 while ((status == SDVO_CMD_STATUS_PENDING ||
Chris Wilson46a3f4a2013-09-24 12:55:40 +0100554 status == SDVO_CMD_STATUS_TARGET_NOT_SPECIFIED) && --retry) {
Chris Wilsonfc373812012-11-23 11:57:56 +0000555 if (retry < 10)
556 msleep(15);
557 else
558 udelay(15);
559
Chris Wilsonb5c616a2010-09-09 19:06:13 +0100560 if (!intel_sdvo_read_byte(intel_sdvo,
561 SDVO_I2C_CMD_STATUS,
562 &status))
Chris Wilsond121a5d2011-01-25 15:00:01 +0000563 goto log_fail;
564 }
Chris Wilsonb5c616a2010-09-09 19:06:13 +0100565
Daniel Vetter84fcb462013-11-27 16:03:01 +0100566#define BUF_PRINT(args...) \
567 pos += snprintf(buffer + pos, max_t(int, BUF_LEN - pos, 0), args)
568
Jesse Barnes79e53942008-11-07 14:24:08 -0800569 if (status <= SDVO_CMD_STATUS_SCALING_NOT_SUPP)
Daniel Vetter84fcb462013-11-27 16:03:01 +0100570 BUF_PRINT("(%s)", cmd_status_names[status]);
Jesse Barnes79e53942008-11-07 14:24:08 -0800571 else
Daniel Vetter84fcb462013-11-27 16:03:01 +0100572 BUF_PRINT("(??? %d)", status);
Jesse Barnes79e53942008-11-07 14:24:08 -0800573
Chris Wilsonb5c616a2010-09-09 19:06:13 +0100574 if (status != SDVO_CMD_STATUS_SUCCESS)
575 goto log_fail;
Jesse Barnes79e53942008-11-07 14:24:08 -0800576
Chris Wilsonb5c616a2010-09-09 19:06:13 +0100577 /* Read the command response */
578 for (i = 0; i < response_len; i++) {
579 if (!intel_sdvo_read_byte(intel_sdvo,
580 SDVO_I2C_RETURN_0 + i,
581 &((u8 *)response)[i]))
582 goto log_fail;
Daniel Vetter84fcb462013-11-27 16:03:01 +0100583 BUF_PRINT(" %02X", ((u8 *)response)[i]);
Jesse Barnes79e53942008-11-07 14:24:08 -0800584 }
Daniel Vetter84fcb462013-11-27 16:03:01 +0100585 BUG_ON(pos >= BUF_LEN - 1);
586#undef BUF_PRINT
587#undef BUF_LEN
588
589 DRM_DEBUG_KMS("%s: R: %s\n", SDVO_NAME(intel_sdvo), buffer);
Chris Wilsonb5c616a2010-09-09 19:06:13 +0100590 return true;
591
592log_fail:
Daniel Vetter84fcb462013-11-27 16:03:01 +0100593 DRM_DEBUG_KMS("%s: R: ... failed\n", SDVO_NAME(intel_sdvo));
Chris Wilsonb5c616a2010-09-09 19:06:13 +0100594 return false;
Jesse Barnes79e53942008-11-07 14:24:08 -0800595}
596
Hannes Ederb358d0a2008-12-18 21:18:47 +0100597static int intel_sdvo_get_pixel_multiplier(struct drm_display_mode *mode)
Jesse Barnes79e53942008-11-07 14:24:08 -0800598{
599 if (mode->clock >= 100000)
600 return 1;
601 else if (mode->clock >= 50000)
602 return 2;
603 else
604 return 4;
605}
606
Chris Wilsone957d772010-09-24 12:52:03 +0100607static bool intel_sdvo_set_control_bus_switch(struct intel_sdvo *intel_sdvo,
608 u8 ddc_bus)
Jesse Barnes79e53942008-11-07 14:24:08 -0800609{
Chris Wilsond121a5d2011-01-25 15:00:01 +0000610 /* This must be the immediately preceding write before the i2c xfer */
Chris Wilsone957d772010-09-24 12:52:03 +0100611 return intel_sdvo_write_cmd(intel_sdvo,
612 SDVO_CMD_SET_CONTROL_BUS_SWITCH,
613 &ddc_bus, 1);
Jesse Barnes79e53942008-11-07 14:24:08 -0800614}
615
Chris Wilson32aad862010-08-04 13:50:25 +0100616static bool intel_sdvo_set_value(struct intel_sdvo *intel_sdvo, u8 cmd, const void *data, int len)
617{
Chris Wilsond121a5d2011-01-25 15:00:01 +0000618 if (!intel_sdvo_write_cmd(intel_sdvo, cmd, data, len))
619 return false;
620
621 return intel_sdvo_read_response(intel_sdvo, NULL, 0);
Chris Wilson32aad862010-08-04 13:50:25 +0100622}
623
624static bool
625intel_sdvo_get_value(struct intel_sdvo *intel_sdvo, u8 cmd, void *value, int len)
626{
627 if (!intel_sdvo_write_cmd(intel_sdvo, cmd, NULL, 0))
628 return false;
629
630 return intel_sdvo_read_response(intel_sdvo, value, len);
631}
632
633static bool intel_sdvo_set_target_input(struct intel_sdvo *intel_sdvo)
Jesse Barnes79e53942008-11-07 14:24:08 -0800634{
635 struct intel_sdvo_set_target_input_args targets = {0};
Chris Wilson32aad862010-08-04 13:50:25 +0100636 return intel_sdvo_set_value(intel_sdvo,
637 SDVO_CMD_SET_TARGET_INPUT,
638 &targets, sizeof(targets));
Jesse Barnes79e53942008-11-07 14:24:08 -0800639}
640
641/**
642 * Return whether each input is trained.
643 *
644 * This function is making an assumption about the layout of the response,
645 * which should be checked against the docs.
646 */
Chris Wilsonea5b2132010-08-04 13:50:23 +0100647static bool intel_sdvo_get_trained_inputs(struct intel_sdvo *intel_sdvo, bool *input_1, bool *input_2)
Jesse Barnes79e53942008-11-07 14:24:08 -0800648{
649 struct intel_sdvo_get_trained_inputs_response response;
Jesse Barnes79e53942008-11-07 14:24:08 -0800650
Chris Wilson1a3665c2011-01-25 13:59:37 +0000651 BUILD_BUG_ON(sizeof(response) != 1);
Chris Wilson32aad862010-08-04 13:50:25 +0100652 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_TRAINED_INPUTS,
653 &response, sizeof(response)))
Jesse Barnes79e53942008-11-07 14:24:08 -0800654 return false;
655
656 *input_1 = response.input0_trained;
657 *input_2 = response.input1_trained;
658 return true;
659}
660
Chris Wilsonea5b2132010-08-04 13:50:23 +0100661static bool intel_sdvo_set_active_outputs(struct intel_sdvo *intel_sdvo,
Jesse Barnes79e53942008-11-07 14:24:08 -0800662 u16 outputs)
663{
Chris Wilson32aad862010-08-04 13:50:25 +0100664 return intel_sdvo_set_value(intel_sdvo,
665 SDVO_CMD_SET_ACTIVE_OUTPUTS,
666 &outputs, sizeof(outputs));
Jesse Barnes79e53942008-11-07 14:24:08 -0800667}
668
Daniel Vetter4ac41f42012-07-02 14:54:00 +0200669static bool intel_sdvo_get_active_outputs(struct intel_sdvo *intel_sdvo,
670 u16 *outputs)
671{
672 return intel_sdvo_get_value(intel_sdvo,
673 SDVO_CMD_GET_ACTIVE_OUTPUTS,
674 outputs, sizeof(*outputs));
675}
676
Chris Wilsonea5b2132010-08-04 13:50:23 +0100677static bool intel_sdvo_set_encoder_power_state(struct intel_sdvo *intel_sdvo,
Jesse Barnes79e53942008-11-07 14:24:08 -0800678 int mode)
679{
Chris Wilson32aad862010-08-04 13:50:25 +0100680 u8 state = SDVO_ENCODER_STATE_ON;
Jesse Barnes79e53942008-11-07 14:24:08 -0800681
682 switch (mode) {
683 case DRM_MODE_DPMS_ON:
684 state = SDVO_ENCODER_STATE_ON;
685 break;
686 case DRM_MODE_DPMS_STANDBY:
687 state = SDVO_ENCODER_STATE_STANDBY;
688 break;
689 case DRM_MODE_DPMS_SUSPEND:
690 state = SDVO_ENCODER_STATE_SUSPEND;
691 break;
692 case DRM_MODE_DPMS_OFF:
693 state = SDVO_ENCODER_STATE_OFF;
694 break;
695 }
696
Chris Wilson32aad862010-08-04 13:50:25 +0100697 return intel_sdvo_set_value(intel_sdvo,
698 SDVO_CMD_SET_ENCODER_POWER_STATE, &state, sizeof(state));
Jesse Barnes79e53942008-11-07 14:24:08 -0800699}
700
Chris Wilsonea5b2132010-08-04 13:50:23 +0100701static bool intel_sdvo_get_input_pixel_clock_range(struct intel_sdvo *intel_sdvo,
Jesse Barnes79e53942008-11-07 14:24:08 -0800702 int *clock_min,
703 int *clock_max)
704{
705 struct intel_sdvo_pixel_clock_range clocks;
Jesse Barnes79e53942008-11-07 14:24:08 -0800706
Chris Wilson1a3665c2011-01-25 13:59:37 +0000707 BUILD_BUG_ON(sizeof(clocks) != 4);
Chris Wilson32aad862010-08-04 13:50:25 +0100708 if (!intel_sdvo_get_value(intel_sdvo,
709 SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE,
710 &clocks, sizeof(clocks)))
Jesse Barnes79e53942008-11-07 14:24:08 -0800711 return false;
712
713 /* Convert the values from units of 10 kHz to kHz. */
714 *clock_min = clocks.min * 10;
715 *clock_max = clocks.max * 10;
Jesse Barnes79e53942008-11-07 14:24:08 -0800716 return true;
717}
718
Chris Wilsonea5b2132010-08-04 13:50:23 +0100719static bool intel_sdvo_set_target_output(struct intel_sdvo *intel_sdvo,
Jesse Barnes79e53942008-11-07 14:24:08 -0800720 u16 outputs)
721{
Chris Wilson32aad862010-08-04 13:50:25 +0100722 return intel_sdvo_set_value(intel_sdvo,
723 SDVO_CMD_SET_TARGET_OUTPUT,
724 &outputs, sizeof(outputs));
Jesse Barnes79e53942008-11-07 14:24:08 -0800725}
726
Chris Wilsonea5b2132010-08-04 13:50:23 +0100727static bool intel_sdvo_set_timing(struct intel_sdvo *intel_sdvo, u8 cmd,
Jesse Barnes79e53942008-11-07 14:24:08 -0800728 struct intel_sdvo_dtd *dtd)
729{
Chris Wilson32aad862010-08-04 13:50:25 +0100730 return intel_sdvo_set_value(intel_sdvo, cmd, &dtd->part1, sizeof(dtd->part1)) &&
731 intel_sdvo_set_value(intel_sdvo, cmd + 1, &dtd->part2, sizeof(dtd->part2));
Jesse Barnes79e53942008-11-07 14:24:08 -0800732}
733
Jesse Barnes045ac3b2013-05-14 17:08:26 -0700734static bool intel_sdvo_get_timing(struct intel_sdvo *intel_sdvo, u8 cmd,
735 struct intel_sdvo_dtd *dtd)
736{
737 return intel_sdvo_get_value(intel_sdvo, cmd, &dtd->part1, sizeof(dtd->part1)) &&
738 intel_sdvo_get_value(intel_sdvo, cmd + 1, &dtd->part2, sizeof(dtd->part2));
739}
740
Chris Wilsonea5b2132010-08-04 13:50:23 +0100741static bool intel_sdvo_set_input_timing(struct intel_sdvo *intel_sdvo,
Jesse Barnes79e53942008-11-07 14:24:08 -0800742 struct intel_sdvo_dtd *dtd)
743{
Chris Wilsonea5b2132010-08-04 13:50:23 +0100744 return intel_sdvo_set_timing(intel_sdvo,
Jesse Barnes79e53942008-11-07 14:24:08 -0800745 SDVO_CMD_SET_INPUT_TIMINGS_PART1, dtd);
746}
747
Chris Wilsonea5b2132010-08-04 13:50:23 +0100748static bool intel_sdvo_set_output_timing(struct intel_sdvo *intel_sdvo,
Jesse Barnes79e53942008-11-07 14:24:08 -0800749 struct intel_sdvo_dtd *dtd)
750{
Chris Wilsonea5b2132010-08-04 13:50:23 +0100751 return intel_sdvo_set_timing(intel_sdvo,
Jesse Barnes79e53942008-11-07 14:24:08 -0800752 SDVO_CMD_SET_OUTPUT_TIMINGS_PART1, dtd);
753}
754
Jesse Barnes045ac3b2013-05-14 17:08:26 -0700755static bool intel_sdvo_get_input_timing(struct intel_sdvo *intel_sdvo,
756 struct intel_sdvo_dtd *dtd)
757{
758 return intel_sdvo_get_timing(intel_sdvo,
759 SDVO_CMD_GET_INPUT_TIMINGS_PART1, dtd);
760}
761
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800762static bool
Chris Wilsonea5b2132010-08-04 13:50:23 +0100763intel_sdvo_create_preferred_input_timing(struct intel_sdvo *intel_sdvo,
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800764 uint16_t clock,
765 uint16_t width,
766 uint16_t height)
767{
768 struct intel_sdvo_preferred_input_timing_args args;
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800769
Zhenyu Wange642c6f2009-03-24 14:02:42 +0800770 memset(&args, 0, sizeof(args));
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800771 args.clock = clock;
772 args.width = width;
773 args.height = height;
Zhenyu Wange642c6f2009-03-24 14:02:42 +0800774 args.interlace = 0;
ling.ma@intel.com12682a92009-06-30 11:35:35 +0800775
Chris Wilsonea5b2132010-08-04 13:50:23 +0100776 if (intel_sdvo->is_lvds &&
777 (intel_sdvo->sdvo_lvds_fixed_mode->hdisplay != width ||
778 intel_sdvo->sdvo_lvds_fixed_mode->vdisplay != height))
ling.ma@intel.com12682a92009-06-30 11:35:35 +0800779 args.scaled = 1;
780
Chris Wilson32aad862010-08-04 13:50:25 +0100781 return intel_sdvo_set_value(intel_sdvo,
782 SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING,
783 &args, sizeof(args));
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800784}
785
Chris Wilsonea5b2132010-08-04 13:50:23 +0100786static bool intel_sdvo_get_preferred_input_timing(struct intel_sdvo *intel_sdvo,
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800787 struct intel_sdvo_dtd *dtd)
788{
Chris Wilson1a3665c2011-01-25 13:59:37 +0000789 BUILD_BUG_ON(sizeof(dtd->part1) != 8);
790 BUILD_BUG_ON(sizeof(dtd->part2) != 8);
Chris Wilson32aad862010-08-04 13:50:25 +0100791 return intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1,
792 &dtd->part1, sizeof(dtd->part1)) &&
793 intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2,
794 &dtd->part2, sizeof(dtd->part2));
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800795}
Jesse Barnes79e53942008-11-07 14:24:08 -0800796
Chris Wilsonea5b2132010-08-04 13:50:23 +0100797static bool intel_sdvo_set_clock_rate_mult(struct intel_sdvo *intel_sdvo, u8 val)
Jesse Barnes79e53942008-11-07 14:24:08 -0800798{
Chris Wilson32aad862010-08-04 13:50:25 +0100799 return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_CLOCK_RATE_MULT, &val, 1);
Jesse Barnes79e53942008-11-07 14:24:08 -0800800}
801
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800802static void intel_sdvo_get_dtd_from_mode(struct intel_sdvo_dtd *dtd,
Chris Wilson32aad862010-08-04 13:50:25 +0100803 const struct drm_display_mode *mode)
Jesse Barnes79e53942008-11-07 14:24:08 -0800804{
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800805 uint16_t width, height;
806 uint16_t h_blank_len, h_sync_len, v_blank_len, v_sync_len;
807 uint16_t h_sync_offset, v_sync_offset;
Daniel Vetter66518192012-04-01 19:16:18 +0200808 int mode_clock;
Jesse Barnes79e53942008-11-07 14:24:08 -0800809
Daniel Vetter1c4a8142013-09-11 09:58:49 +0200810 memset(dtd, 0, sizeof(*dtd));
811
Daniel Vetterc6ebd4c2012-04-24 18:27:57 +0200812 width = mode->hdisplay;
813 height = mode->vdisplay;
Jesse Barnes79e53942008-11-07 14:24:08 -0800814
815 /* do some mode translations */
Daniel Vetterc6ebd4c2012-04-24 18:27:57 +0200816 h_blank_len = mode->htotal - mode->hdisplay;
817 h_sync_len = mode->hsync_end - mode->hsync_start;
Jesse Barnes79e53942008-11-07 14:24:08 -0800818
Daniel Vetterc6ebd4c2012-04-24 18:27:57 +0200819 v_blank_len = mode->vtotal - mode->vdisplay;
820 v_sync_len = mode->vsync_end - mode->vsync_start;
Jesse Barnes79e53942008-11-07 14:24:08 -0800821
Daniel Vetterc6ebd4c2012-04-24 18:27:57 +0200822 h_sync_offset = mode->hsync_start - mode->hdisplay;
823 v_sync_offset = mode->vsync_start - mode->vdisplay;
Jesse Barnes79e53942008-11-07 14:24:08 -0800824
Daniel Vetter66518192012-04-01 19:16:18 +0200825 mode_clock = mode->clock;
Daniel Vetter66518192012-04-01 19:16:18 +0200826 mode_clock /= 10;
827 dtd->part1.clock = mode_clock;
828
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800829 dtd->part1.h_active = width & 0xff;
830 dtd->part1.h_blank = h_blank_len & 0xff;
831 dtd->part1.h_high = (((width >> 8) & 0xf) << 4) |
Jesse Barnes79e53942008-11-07 14:24:08 -0800832 ((h_blank_len >> 8) & 0xf);
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800833 dtd->part1.v_active = height & 0xff;
834 dtd->part1.v_blank = v_blank_len & 0xff;
835 dtd->part1.v_high = (((height >> 8) & 0xf) << 4) |
Jesse Barnes79e53942008-11-07 14:24:08 -0800836 ((v_blank_len >> 8) & 0xf);
837
Zhenyu Wang171a9e92009-03-24 14:02:41 +0800838 dtd->part2.h_sync_off = h_sync_offset & 0xff;
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800839 dtd->part2.h_sync_width = h_sync_len & 0xff;
840 dtd->part2.v_sync_off_width = (v_sync_offset & 0xf) << 4 |
Jesse Barnes79e53942008-11-07 14:24:08 -0800841 (v_sync_len & 0xf);
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800842 dtd->part2.sync_off_width_high = ((h_sync_offset & 0x300) >> 2) |
Jesse Barnes79e53942008-11-07 14:24:08 -0800843 ((h_sync_len & 0x300) >> 4) | ((v_sync_offset & 0x30) >> 2) |
844 ((v_sync_len & 0x30) >> 4);
845
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800846 dtd->part2.dtd_flags = 0x18;
Daniel Vetter59d92bf2012-05-12 22:22:58 +0200847 if (mode->flags & DRM_MODE_FLAG_INTERLACE)
848 dtd->part2.dtd_flags |= DTD_FLAG_INTERLACE;
Jesse Barnes79e53942008-11-07 14:24:08 -0800849 if (mode->flags & DRM_MODE_FLAG_PHSYNC)
Daniel Vetter59d92bf2012-05-12 22:22:58 +0200850 dtd->part2.dtd_flags |= DTD_FLAG_HSYNC_POSITIVE;
Jesse Barnes79e53942008-11-07 14:24:08 -0800851 if (mode->flags & DRM_MODE_FLAG_PVSYNC)
Daniel Vetter59d92bf2012-05-12 22:22:58 +0200852 dtd->part2.dtd_flags |= DTD_FLAG_VSYNC_POSITIVE;
Jesse Barnes79e53942008-11-07 14:24:08 -0800853
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800854 dtd->part2.v_sync_off_high = v_sync_offset & 0xc0;
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800855}
Jesse Barnes79e53942008-11-07 14:24:08 -0800856
Daniel Vetter1c4a8142013-09-11 09:58:49 +0200857static void intel_sdvo_get_mode_from_dtd(struct drm_display_mode *pmode,
Chris Wilson32aad862010-08-04 13:50:25 +0100858 const struct intel_sdvo_dtd *dtd)
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800859{
Daniel Vetter1c4a8142013-09-11 09:58:49 +0200860 struct drm_display_mode mode = {};
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800861
Daniel Vetter1c4a8142013-09-11 09:58:49 +0200862 mode.hdisplay = dtd->part1.h_active;
863 mode.hdisplay += ((dtd->part1.h_high >> 4) & 0x0f) << 8;
864 mode.hsync_start = mode.hdisplay + dtd->part2.h_sync_off;
865 mode.hsync_start += (dtd->part2.sync_off_width_high & 0xc0) << 2;
866 mode.hsync_end = mode.hsync_start + dtd->part2.h_sync_width;
867 mode.hsync_end += (dtd->part2.sync_off_width_high & 0x30) << 4;
868 mode.htotal = mode.hdisplay + dtd->part1.h_blank;
869 mode.htotal += (dtd->part1.h_high & 0xf) << 8;
870
871 mode.vdisplay = dtd->part1.v_active;
872 mode.vdisplay += ((dtd->part1.v_high >> 4) & 0x0f) << 8;
873 mode.vsync_start = mode.vdisplay;
874 mode.vsync_start += (dtd->part2.v_sync_off_width >> 4) & 0xf;
875 mode.vsync_start += (dtd->part2.sync_off_width_high & 0x0c) << 2;
876 mode.vsync_start += dtd->part2.v_sync_off_high & 0xc0;
877 mode.vsync_end = mode.vsync_start +
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800878 (dtd->part2.v_sync_off_width & 0xf);
Daniel Vetter1c4a8142013-09-11 09:58:49 +0200879 mode.vsync_end += (dtd->part2.sync_off_width_high & 0x3) << 4;
880 mode.vtotal = mode.vdisplay + dtd->part1.v_blank;
881 mode.vtotal += (dtd->part1.v_high & 0xf) << 8;
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800882
Daniel Vetter1c4a8142013-09-11 09:58:49 +0200883 mode.clock = dtd->part1.clock * 10;
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800884
Daniel Vetter59d92bf2012-05-12 22:22:58 +0200885 if (dtd->part2.dtd_flags & DTD_FLAG_INTERLACE)
Daniel Vetter1c4a8142013-09-11 09:58:49 +0200886 mode.flags |= DRM_MODE_FLAG_INTERLACE;
Daniel Vetter59d92bf2012-05-12 22:22:58 +0200887 if (dtd->part2.dtd_flags & DTD_FLAG_HSYNC_POSITIVE)
Daniel Vetter1c4a8142013-09-11 09:58:49 +0200888 mode.flags |= DRM_MODE_FLAG_PHSYNC;
Daniel Vetter3cea2102013-09-10 10:02:48 +0200889 else
Daniel Vetter1c4a8142013-09-11 09:58:49 +0200890 mode.flags |= DRM_MODE_FLAG_NHSYNC;
Daniel Vetter59d92bf2012-05-12 22:22:58 +0200891 if (dtd->part2.dtd_flags & DTD_FLAG_VSYNC_POSITIVE)
Daniel Vetter1c4a8142013-09-11 09:58:49 +0200892 mode.flags |= DRM_MODE_FLAG_PVSYNC;
Daniel Vetter3cea2102013-09-10 10:02:48 +0200893 else
Daniel Vetter1c4a8142013-09-11 09:58:49 +0200894 mode.flags |= DRM_MODE_FLAG_NVSYNC;
895
896 drm_mode_set_crtcinfo(&mode, 0);
897
898 drm_mode_copy(pmode, &mode);
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800899}
900
Chris Wilsone27d8532010-10-22 09:15:22 +0100901static bool intel_sdvo_check_supp_encode(struct intel_sdvo *intel_sdvo)
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800902{
Chris Wilsone27d8532010-10-22 09:15:22 +0100903 struct intel_sdvo_encode encode;
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800904
Chris Wilson1a3665c2011-01-25 13:59:37 +0000905 BUILD_BUG_ON(sizeof(encode) != 2);
Chris Wilsone27d8532010-10-22 09:15:22 +0100906 return intel_sdvo_get_value(intel_sdvo,
907 SDVO_CMD_GET_SUPP_ENCODE,
908 &encode, sizeof(encode));
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800909}
910
Chris Wilsonea5b2132010-08-04 13:50:23 +0100911static bool intel_sdvo_set_encode(struct intel_sdvo *intel_sdvo,
Eric Anholtc751ce42010-03-25 11:48:48 -0700912 uint8_t mode)
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800913{
Chris Wilson32aad862010-08-04 13:50:25 +0100914 return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_ENCODE, &mode, 1);
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800915}
916
Chris Wilsonea5b2132010-08-04 13:50:23 +0100917static bool intel_sdvo_set_colorimetry(struct intel_sdvo *intel_sdvo,
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800918 uint8_t mode)
919{
Chris Wilson32aad862010-08-04 13:50:25 +0100920 return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_COLORIMETRY, &mode, 1);
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800921}
922
923#if 0
Chris Wilsonea5b2132010-08-04 13:50:23 +0100924static void intel_sdvo_dump_hdmi_buf(struct intel_sdvo *intel_sdvo)
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800925{
926 int i, j;
927 uint8_t set_buf_index[2];
928 uint8_t av_split;
929 uint8_t buf_size;
930 uint8_t buf[48];
931 uint8_t *pos;
932
Chris Wilson32aad862010-08-04 13:50:25 +0100933 intel_sdvo_get_value(encoder, SDVO_CMD_GET_HBUF_AV_SPLIT, &av_split, 1);
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800934
935 for (i = 0; i <= av_split; i++) {
936 set_buf_index[0] = i; set_buf_index[1] = 0;
Eric Anholtc751ce42010-03-25 11:48:48 -0700937 intel_sdvo_write_cmd(encoder, SDVO_CMD_SET_HBUF_INDEX,
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800938 set_buf_index, 2);
Eric Anholtc751ce42010-03-25 11:48:48 -0700939 intel_sdvo_write_cmd(encoder, SDVO_CMD_GET_HBUF_INFO, NULL, 0);
940 intel_sdvo_read_response(encoder, &buf_size, 1);
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800941
942 pos = buf;
943 for (j = 0; j <= buf_size; j += 8) {
Eric Anholtc751ce42010-03-25 11:48:48 -0700944 intel_sdvo_write_cmd(encoder, SDVO_CMD_GET_HBUF_DATA,
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800945 NULL, 0);
Eric Anholtc751ce42010-03-25 11:48:48 -0700946 intel_sdvo_read_response(encoder, pos, 8);
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800947 pos += 8;
948 }
949 }
950}
951#endif
952
Daniel Vetterb6e0e542012-10-21 12:52:39 +0200953static bool intel_sdvo_write_infoframe(struct intel_sdvo *intel_sdvo,
954 unsigned if_index, uint8_t tx_rate,
Ville Syrjäläfff63862013-12-10 15:19:08 +0200955 const uint8_t *data, unsigned length)
Daniel Vetterb6e0e542012-10-21 12:52:39 +0200956{
957 uint8_t set_buf_index[2] = { if_index, 0 };
958 uint8_t hbuf_size, tmp[8];
959 int i;
960
961 if (!intel_sdvo_set_value(intel_sdvo,
962 SDVO_CMD_SET_HBUF_INDEX,
963 set_buf_index, 2))
964 return false;
965
966 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_HBUF_INFO,
967 &hbuf_size, 1))
968 return false;
969
970 /* Buffer size is 0 based, hooray! */
971 hbuf_size++;
972
973 DRM_DEBUG_KMS("writing sdvo hbuf: %i, hbuf_size %i, hbuf_size: %i\n",
974 if_index, length, hbuf_size);
975
976 for (i = 0; i < hbuf_size; i += 8) {
977 memset(tmp, 0, 8);
978 if (i < length)
979 memcpy(tmp, data + i, min_t(unsigned, 8, length - i));
980
981 if (!intel_sdvo_set_value(intel_sdvo,
982 SDVO_CMD_SET_HBUF_DATA,
983 tmp, 8))
984 return false;
985 }
986
987 return intel_sdvo_set_value(intel_sdvo,
988 SDVO_CMD_SET_HBUF_TXRATE,
989 &tx_rate, 1);
990}
991
Ville Syrjäläabedc072013-01-17 16:31:31 +0200992static bool intel_sdvo_set_avi_infoframe(struct intel_sdvo *intel_sdvo,
993 const struct drm_display_mode *adjusted_mode)
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800994{
Damien Lespiau15dcd352013-08-06 20:32:20 +0100995 uint8_t sdvo_data[HDMI_INFOFRAME_SIZE(AVI)];
996 struct drm_crtc *crtc = intel_sdvo->base.base.crtc;
997 struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
998 union hdmi_infoframe frame;
999 int ret;
1000 ssize_t len;
1001
1002 ret = drm_hdmi_avi_infoframe_from_display_mode(&frame.avi,
1003 adjusted_mode);
1004 if (ret < 0) {
1005 DRM_ERROR("couldn't fill AVI infoframe\n");
1006 return false;
1007 }
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001008
Ville Syrjäläabedc072013-01-17 16:31:31 +02001009 if (intel_sdvo->rgb_quant_range_selectable) {
Daniel Vetter50f3b012013-03-27 00:44:56 +01001010 if (intel_crtc->config.limited_color_range)
Damien Lespiau15dcd352013-08-06 20:32:20 +01001011 frame.avi.quantization_range =
1012 HDMI_QUANTIZATION_RANGE_LIMITED;
Ville Syrjäläabedc072013-01-17 16:31:31 +02001013 else
Damien Lespiau15dcd352013-08-06 20:32:20 +01001014 frame.avi.quantization_range =
1015 HDMI_QUANTIZATION_RANGE_FULL;
Ville Syrjäläabedc072013-01-17 16:31:31 +02001016 }
1017
Damien Lespiau15dcd352013-08-06 20:32:20 +01001018 len = hdmi_infoframe_pack(&frame, sdvo_data, sizeof(sdvo_data));
1019 if (len < 0)
1020 return false;
Daniel Vetter81014b92012-05-12 20:22:00 +02001021
Daniel Vetterb6e0e542012-10-21 12:52:39 +02001022 return intel_sdvo_write_infoframe(intel_sdvo, SDVO_HBUF_INDEX_AVI_IF,
1023 SDVO_HBUF_TX_VSYNC,
1024 sdvo_data, sizeof(sdvo_data));
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001025}
1026
Chris Wilson32aad862010-08-04 13:50:25 +01001027static bool intel_sdvo_set_tv_format(struct intel_sdvo *intel_sdvo)
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001028{
Zhao Yakuice6feab2009-08-24 13:50:26 +08001029 struct intel_sdvo_tv_format format;
Chris Wilson40039752010-08-04 13:50:26 +01001030 uint32_t format_map;
Zhao Yakuice6feab2009-08-24 13:50:26 +08001031
Chris Wilson40039752010-08-04 13:50:26 +01001032 format_map = 1 << intel_sdvo->tv_format_index;
Zhao Yakuice6feab2009-08-24 13:50:26 +08001033 memset(&format, 0, sizeof(format));
Chris Wilson32aad862010-08-04 13:50:25 +01001034 memcpy(&format, &format_map, min(sizeof(format), sizeof(format_map)));
Zhao Yakuice6feab2009-08-24 13:50:26 +08001035
Chris Wilson32aad862010-08-04 13:50:25 +01001036 BUILD_BUG_ON(sizeof(format) != 6);
1037 return intel_sdvo_set_value(intel_sdvo,
1038 SDVO_CMD_SET_TV_FORMAT,
1039 &format, sizeof(format));
1040}
Zhao Yakuice6feab2009-08-24 13:50:26 +08001041
Chris Wilson32aad862010-08-04 13:50:25 +01001042static bool
1043intel_sdvo_set_output_timings_from_mode(struct intel_sdvo *intel_sdvo,
Laurent Pincharte811f5a2012-07-17 17:56:50 +02001044 const struct drm_display_mode *mode)
Chris Wilson32aad862010-08-04 13:50:25 +01001045{
1046 struct intel_sdvo_dtd output_dtd;
1047
1048 if (!intel_sdvo_set_target_output(intel_sdvo,
1049 intel_sdvo->attached_output))
1050 return false;
1051
1052 intel_sdvo_get_dtd_from_mode(&output_dtd, mode);
1053 if (!intel_sdvo_set_output_timing(intel_sdvo, &output_dtd))
1054 return false;
1055
1056 return true;
1057}
1058
Daniel Vetterc9a29692012-04-10 13:55:47 +02001059/* Asks the sdvo controller for the preferred input mode given the output mode.
1060 * Unfortunately we have to set up the full output mode to do that. */
Chris Wilson32aad862010-08-04 13:50:25 +01001061static bool
Daniel Vetterc9a29692012-04-10 13:55:47 +02001062intel_sdvo_get_preferred_input_mode(struct intel_sdvo *intel_sdvo,
Laurent Pincharte811f5a2012-07-17 17:56:50 +02001063 const struct drm_display_mode *mode,
Daniel Vetterc9a29692012-04-10 13:55:47 +02001064 struct drm_display_mode *adjusted_mode)
Chris Wilson32aad862010-08-04 13:50:25 +01001065{
Daniel Vetterc9a29692012-04-10 13:55:47 +02001066 struct intel_sdvo_dtd input_dtd;
1067
Chris Wilson32aad862010-08-04 13:50:25 +01001068 /* Reset the input timing to the screen. Assume always input 0. */
1069 if (!intel_sdvo_set_target_input(intel_sdvo))
1070 return false;
1071
1072 if (!intel_sdvo_create_preferred_input_timing(intel_sdvo,
1073 mode->clock / 10,
1074 mode->hdisplay,
1075 mode->vdisplay))
1076 return false;
1077
1078 if (!intel_sdvo_get_preferred_input_timing(intel_sdvo,
Daniel Vetterc9a29692012-04-10 13:55:47 +02001079 &input_dtd))
Chris Wilson32aad862010-08-04 13:50:25 +01001080 return false;
1081
Daniel Vetterc9a29692012-04-10 13:55:47 +02001082 intel_sdvo_get_mode_from_dtd(adjusted_mode, &input_dtd);
Egbert Eiche7518232012-10-13 14:29:31 +02001083 intel_sdvo->dtd_sdvo_flags = input_dtd.part2.sdvo_flags;
Chris Wilson32aad862010-08-04 13:50:25 +01001084
Chris Wilson32aad862010-08-04 13:50:25 +01001085 return true;
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001086}
1087
Daniel Vetter70484552013-04-30 14:01:41 +02001088static void i9xx_adjust_sdvo_tv_clock(struct intel_crtc_config *pipe_config)
1089{
Ville Syrjälä3c52f4e2013-09-06 23:28:59 +03001090 unsigned dotclock = pipe_config->port_clock;
Daniel Vetter70484552013-04-30 14:01:41 +02001091 struct dpll *clock = &pipe_config->dpll;
1092
1093 /* SDVO TV has fixed PLL values depend on its clock range,
1094 this mirrors vbios setting. */
1095 if (dotclock >= 100000 && dotclock < 140500) {
1096 clock->p1 = 2;
1097 clock->p2 = 10;
1098 clock->n = 3;
1099 clock->m1 = 16;
1100 clock->m2 = 8;
1101 } else if (dotclock >= 140500 && dotclock <= 200000) {
1102 clock->p1 = 1;
1103 clock->p2 = 10;
1104 clock->n = 6;
1105 clock->m1 = 12;
1106 clock->m2 = 8;
1107 } else {
1108 WARN(1, "SDVO TV clock out of range: %i\n", dotclock);
1109 }
1110
1111 pipe_config->clock_set = true;
1112}
1113
Daniel Vetter6cc5f342013-03-27 00:44:53 +01001114static bool intel_sdvo_compute_config(struct intel_encoder *encoder,
1115 struct intel_crtc_config *pipe_config)
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001116{
Daniel Vetter8aca63a2013-07-21 21:37:01 +02001117 struct intel_sdvo *intel_sdvo = to_sdvo(encoder);
Daniel Vetter6cc5f342013-03-27 00:44:53 +01001118 struct drm_display_mode *adjusted_mode = &pipe_config->adjusted_mode;
1119 struct drm_display_mode *mode = &pipe_config->requested_mode;
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001120
Daniel Vetter5d2d38d2013-03-27 00:45:01 +01001121 DRM_DEBUG_KMS("forcing bpc to 8 for SDVO\n");
1122 pipe_config->pipe_bpp = 8*3;
1123
Daniel Vetter5bfe2ac2013-03-27 00:44:55 +01001124 if (HAS_PCH_SPLIT(encoder->base.dev))
1125 pipe_config->has_pch_encoder = true;
1126
Chris Wilson32aad862010-08-04 13:50:25 +01001127 /* We need to construct preferred input timings based on our
1128 * output timings. To do that, we have to set the output
1129 * timings, even though this isn't really the right place in
1130 * the sequence to do it. Oh well.
1131 */
Chris Wilsonea5b2132010-08-04 13:50:23 +01001132 if (intel_sdvo->is_tv) {
Chris Wilson32aad862010-08-04 13:50:25 +01001133 if (!intel_sdvo_set_output_timings_from_mode(intel_sdvo, mode))
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001134 return false;
Chris Wilson32aad862010-08-04 13:50:25 +01001135
Daniel Vetterc9a29692012-04-10 13:55:47 +02001136 (void) intel_sdvo_get_preferred_input_mode(intel_sdvo,
1137 mode,
1138 adjusted_mode);
Daniel Vetter09ede542013-04-30 14:01:45 +02001139 pipe_config->sdvo_tv_clock = true;
Chris Wilsonea5b2132010-08-04 13:50:23 +01001140 } else if (intel_sdvo->is_lvds) {
Chris Wilson32aad862010-08-04 13:50:25 +01001141 if (!intel_sdvo_set_output_timings_from_mode(intel_sdvo,
Chris Wilson6c9547f2010-08-25 10:05:17 +01001142 intel_sdvo->sdvo_lvds_fixed_mode))
ling.ma@intel.com12682a92009-06-30 11:35:35 +08001143 return false;
ling.ma@intel.com12682a92009-06-30 11:35:35 +08001144
Daniel Vetterc9a29692012-04-10 13:55:47 +02001145 (void) intel_sdvo_get_preferred_input_mode(intel_sdvo,
1146 mode,
1147 adjusted_mode);
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001148 }
Chris Wilson32aad862010-08-04 13:50:25 +01001149
1150 /* Make the CRTC code factor in the SDVO pixel multiplier. The
Chris Wilson6c9547f2010-08-25 10:05:17 +01001151 * SDVO device will factor out the multiplier during mode_set.
Chris Wilson32aad862010-08-04 13:50:25 +01001152 */
Daniel Vetter6cc5f342013-03-27 00:44:53 +01001153 pipe_config->pixel_multiplier =
1154 intel_sdvo_get_pixel_multiplier(adjusted_mode);
Chris Wilson32aad862010-08-04 13:50:25 +01001155
Ville Syrjälä55bc60d2013-01-17 16:31:29 +02001156 if (intel_sdvo->color_range_auto) {
1157 /* See CEA-861-E - 5.1 Default Encoding Parameters */
Paulo Zanoni4f3a8bc2013-02-19 16:21:47 -03001158 /* FIXME: This bit is only valid when using TMDS encoding and 8
1159 * bit per color mode. */
Ville Syrjälä55bc60d2013-01-17 16:31:29 +02001160 if (intel_sdvo->has_hdmi_monitor &&
Thierry Reding18316c82012-12-20 15:41:44 +01001161 drm_match_cea_mode(adjusted_mode) > 1)
Daniel Vetter69f5acc2014-04-24 23:54:48 +02001162 pipe_config->limited_color_range = true;
1163 } else {
1164 if (intel_sdvo->has_hdmi_monitor &&
1165 intel_sdvo->color_range == HDMI_COLOR_RANGE_16_235)
1166 pipe_config->limited_color_range = true;
Ville Syrjälä55bc60d2013-01-17 16:31:29 +02001167 }
1168
Daniel Vetter70484552013-04-30 14:01:41 +02001169 /* Clock computation needs to happen after pixel multiplier. */
1170 if (intel_sdvo->is_tv)
1171 i9xx_adjust_sdvo_tv_clock(pipe_config);
1172
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001173 return true;
1174}
1175
Daniel Vetter192d47a2014-04-24 23:54:45 +02001176static void intel_sdvo_pre_enable(struct intel_encoder *intel_encoder)
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001177{
Daniel Vetter6cc5f342013-03-27 00:44:53 +01001178 struct drm_device *dev = intel_encoder->base.dev;
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001179 struct drm_i915_private *dev_priv = dev->dev_private;
Daniel Vettereeb47932013-09-03 20:40:36 +02001180 struct intel_crtc *crtc = to_intel_crtc(intel_encoder->base.crtc);
Daniel Vetter6cc5f342013-03-27 00:44:53 +01001181 struct drm_display_mode *adjusted_mode =
Daniel Vettereeb47932013-09-03 20:40:36 +02001182 &crtc->config.adjusted_mode;
1183 struct drm_display_mode *mode = &crtc->config.requested_mode;
Daniel Vetter8aca63a2013-07-21 21:37:01 +02001184 struct intel_sdvo *intel_sdvo = to_sdvo(intel_encoder);
Chris Wilson6c9547f2010-08-25 10:05:17 +01001185 u32 sdvox;
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001186 struct intel_sdvo_in_out_map in_out;
Daniel Vetter66518192012-04-01 19:16:18 +02001187 struct intel_sdvo_dtd input_dtd, output_dtd;
Chris Wilson6c9547f2010-08-25 10:05:17 +01001188 int rate;
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001189
1190 if (!mode)
1191 return;
1192
1193 /* First, set the input mapping for the first input to our controlled
1194 * output. This is only correct if we're a single-input device, in
1195 * which case the first input is the output from the appropriate SDVO
1196 * channel on the motherboard. In a two-input device, the first input
1197 * will be SDVOB and the second SDVOC.
1198 */
Chris Wilsonea5b2132010-08-04 13:50:23 +01001199 in_out.in0 = intel_sdvo->attached_output;
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001200 in_out.in1 = 0;
1201
Pavel Roskinc74696b2010-09-02 14:46:34 -04001202 intel_sdvo_set_value(intel_sdvo,
1203 SDVO_CMD_SET_IN_OUT_MAP,
1204 &in_out, sizeof(in_out));
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001205
Chris Wilson6c9547f2010-08-25 10:05:17 +01001206 /* Set the output timings to the screen */
1207 if (!intel_sdvo_set_target_output(intel_sdvo,
1208 intel_sdvo->attached_output))
1209 return;
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001210
Daniel Vetter66518192012-04-01 19:16:18 +02001211 /* lvds has a special fixed output timing. */
1212 if (intel_sdvo->is_lvds)
1213 intel_sdvo_get_dtd_from_mode(&output_dtd,
1214 intel_sdvo->sdvo_lvds_fixed_mode);
1215 else
1216 intel_sdvo_get_dtd_from_mode(&output_dtd, mode);
Daniel Vetterc8d4bb52012-04-10 13:55:48 +02001217 if (!intel_sdvo_set_output_timing(intel_sdvo, &output_dtd))
1218 DRM_INFO("Setting output timings on %s failed\n",
1219 SDVO_NAME(intel_sdvo));
Jesse Barnes79e53942008-11-07 14:24:08 -08001220
1221 /* Set the input timing to the screen. Assume always input 0. */
Chris Wilson32aad862010-08-04 13:50:25 +01001222 if (!intel_sdvo_set_target_input(intel_sdvo))
1223 return;
Jesse Barnes79e53942008-11-07 14:24:08 -08001224
Chris Wilson97aaf912011-01-04 20:10:52 +00001225 if (intel_sdvo->has_hdmi_monitor) {
1226 intel_sdvo_set_encode(intel_sdvo, SDVO_ENCODE_HDMI);
1227 intel_sdvo_set_colorimetry(intel_sdvo,
1228 SDVO_COLORIMETRY_RGB256);
Ville Syrjäläabedc072013-01-17 16:31:31 +02001229 intel_sdvo_set_avi_infoframe(intel_sdvo, adjusted_mode);
Chris Wilson97aaf912011-01-04 20:10:52 +00001230 } else
1231 intel_sdvo_set_encode(intel_sdvo, SDVO_ENCODE_DVI);
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001232
Chris Wilson6c9547f2010-08-25 10:05:17 +01001233 if (intel_sdvo->is_tv &&
1234 !intel_sdvo_set_tv_format(intel_sdvo))
1235 return;
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001236
Daniel Vetter66518192012-04-01 19:16:18 +02001237 intel_sdvo_get_dtd_from_mode(&input_dtd, adjusted_mode);
Daniel Vettereeb47932013-09-03 20:40:36 +02001238
Egbert Eiche7518232012-10-13 14:29:31 +02001239 if (intel_sdvo->is_tv || intel_sdvo->is_lvds)
1240 input_dtd.part2.sdvo_flags = intel_sdvo->dtd_sdvo_flags;
Daniel Vetterc8d4bb52012-04-10 13:55:48 +02001241 if (!intel_sdvo_set_input_timing(intel_sdvo, &input_dtd))
1242 DRM_INFO("Setting input timings on %s failed\n",
1243 SDVO_NAME(intel_sdvo));
Jesse Barnes79e53942008-11-07 14:24:08 -08001244
Daniel Vettereeb47932013-09-03 20:40:36 +02001245 switch (crtc->config.pixel_multiplier) {
Chris Wilson6c9547f2010-08-25 10:05:17 +01001246 default:
Daniel Vetteref1b4602013-06-01 17:17:04 +02001247 WARN(1, "unknown pixel mutlipler specified\n");
Chris Wilson32aad862010-08-04 13:50:25 +01001248 case 1: rate = SDVO_CLOCK_RATE_MULT_1X; break;
1249 case 2: rate = SDVO_CLOCK_RATE_MULT_2X; break;
1250 case 4: rate = SDVO_CLOCK_RATE_MULT_4X; break;
Jesse Barnes79e53942008-11-07 14:24:08 -08001251 }
Chris Wilson32aad862010-08-04 13:50:25 +01001252 if (!intel_sdvo_set_clock_rate_mult(intel_sdvo, rate))
1253 return;
Jesse Barnes79e53942008-11-07 14:24:08 -08001254
1255 /* Set the SDVO control regs. */
Chris Wilsona6c45cf2010-09-17 00:32:17 +01001256 if (INTEL_INFO(dev)->gen >= 4) {
Paulo Zanoniba68e082012-01-06 19:45:34 -02001257 /* The real mode polarity is set by the SDVO commands, using
1258 * struct intel_sdvo_dtd. */
1259 sdvox = SDVO_VSYNC_ACTIVE_HIGH | SDVO_HSYNC_ACTIVE_HIGH;
Daniel Vetter69f5acc2014-04-24 23:54:48 +02001260 if (!HAS_PCH_SPLIT(dev) && crtc->config.limited_color_range)
1261 sdvox |= HDMI_COLOR_RANGE_16_235;
Chris Wilson6714afb2010-12-17 04:10:51 +00001262 if (INTEL_INFO(dev)->gen < 5)
1263 sdvox |= SDVO_BORDER_ENABLE;
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001264 } else {
Chris Wilson6c9547f2010-08-25 10:05:17 +01001265 sdvox = I915_READ(intel_sdvo->sdvo_reg);
Chris Wilsonea5b2132010-08-04 13:50:23 +01001266 switch (intel_sdvo->sdvo_reg) {
Paulo Zanonie2debe92013-02-18 19:00:27 -03001267 case GEN3_SDVOB:
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001268 sdvox &= SDVOB_PRESERVE_MASK;
1269 break;
Paulo Zanonie2debe92013-02-18 19:00:27 -03001270 case GEN3_SDVOC:
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001271 sdvox &= SDVOC_PRESERVE_MASK;
1272 break;
1273 }
1274 sdvox |= (9 << 19) | SDVO_BORDER_ENABLE;
1275 }
Paulo Zanoni3573c412011-10-14 18:16:22 -03001276
1277 if (INTEL_PCH_TYPE(dev) >= PCH_CPT)
Daniel Vettereeb47932013-09-03 20:40:36 +02001278 sdvox |= SDVO_PIPE_SEL_CPT(crtc->pipe);
Paulo Zanoni3573c412011-10-14 18:16:22 -03001279 else
Daniel Vettereeb47932013-09-03 20:40:36 +02001280 sdvox |= SDVO_PIPE_SEL(crtc->pipe);
Paulo Zanoni3573c412011-10-14 18:16:22 -03001281
Chris Wilsonda79de92010-11-22 11:12:46 +00001282 if (intel_sdvo->has_hdmi_audio)
Chris Wilson6c9547f2010-08-25 10:05:17 +01001283 sdvox |= SDVO_AUDIO_ENABLE;
Jesse Barnes79e53942008-11-07 14:24:08 -08001284
Chris Wilsona6c45cf2010-09-17 00:32:17 +01001285 if (INTEL_INFO(dev)->gen >= 4) {
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001286 /* done in crtc_mode_set as the dpll_md reg must be written early */
1287 } else if (IS_I945G(dev) || IS_I945GM(dev) || IS_G33(dev)) {
1288 /* done in crtc_mode_set as it lives inside the dpll register */
Jesse Barnes79e53942008-11-07 14:24:08 -08001289 } else {
Daniel Vettereeb47932013-09-03 20:40:36 +02001290 sdvox |= (crtc->config.pixel_multiplier - 1)
Daniel Vetter6cc5f342013-03-27 00:44:53 +01001291 << SDVO_PORT_MULTIPLY_SHIFT;
Jesse Barnes79e53942008-11-07 14:24:08 -08001292 }
1293
Chris Wilson6714afb2010-12-17 04:10:51 +00001294 if (input_dtd.part2.sdvo_flags & SDVO_NEED_TO_STALL &&
1295 INTEL_INFO(dev)->gen < 5)
ling.ma@intel.com12682a92009-06-30 11:35:35 +08001296 sdvox |= SDVO_STALL_SELECT;
Chris Wilsonea5b2132010-08-04 13:50:23 +01001297 intel_sdvo_write_sdvox(intel_sdvo, sdvox);
Jesse Barnes79e53942008-11-07 14:24:08 -08001298}
1299
Daniel Vetter4ac41f42012-07-02 14:54:00 +02001300static bool intel_sdvo_connector_get_hw_state(struct intel_connector *connector)
Jesse Barnes79e53942008-11-07 14:24:08 -08001301{
Daniel Vetter4ac41f42012-07-02 14:54:00 +02001302 struct intel_sdvo_connector *intel_sdvo_connector =
1303 to_intel_sdvo_connector(&connector->base);
1304 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(&connector->base);
Damien Lespiau2f28c502013-06-10 13:49:25 +01001305 u16 active_outputs = 0;
Daniel Vetter4ac41f42012-07-02 14:54:00 +02001306
1307 intel_sdvo_get_active_outputs(intel_sdvo, &active_outputs);
1308
1309 if (active_outputs & intel_sdvo_connector->output_flag)
1310 return true;
1311 else
1312 return false;
1313}
1314
1315static bool intel_sdvo_get_hw_state(struct intel_encoder *encoder,
1316 enum pipe *pipe)
1317{
1318 struct drm_device *dev = encoder->base.dev;
Jesse Barnes79e53942008-11-07 14:24:08 -08001319 struct drm_i915_private *dev_priv = dev->dev_private;
Daniel Vetter8aca63a2013-07-21 21:37:01 +02001320 struct intel_sdvo *intel_sdvo = to_sdvo(encoder);
Damien Lespiau2f28c502013-06-10 13:49:25 +01001321 u16 active_outputs = 0;
Daniel Vetter4ac41f42012-07-02 14:54:00 +02001322 u32 tmp;
1323
1324 tmp = I915_READ(intel_sdvo->sdvo_reg);
Egbert Eich7a7d1fb2013-04-04 16:04:02 -04001325 intel_sdvo_get_active_outputs(intel_sdvo, &active_outputs);
Daniel Vetter4ac41f42012-07-02 14:54:00 +02001326
Egbert Eich7a7d1fb2013-04-04 16:04:02 -04001327 if (!(tmp & SDVO_ENABLE) && (active_outputs == 0))
Daniel Vetter4ac41f42012-07-02 14:54:00 +02001328 return false;
1329
1330 if (HAS_PCH_CPT(dev))
1331 *pipe = PORT_TO_PIPE_CPT(tmp);
1332 else
1333 *pipe = PORT_TO_PIPE(tmp);
1334
1335 return true;
1336}
1337
Jesse Barnes045ac3b2013-05-14 17:08:26 -07001338static void intel_sdvo_get_config(struct intel_encoder *encoder,
1339 struct intel_crtc_config *pipe_config)
1340{
Daniel Vetter6c49f242013-06-06 12:45:25 +02001341 struct drm_device *dev = encoder->base.dev;
1342 struct drm_i915_private *dev_priv = dev->dev_private;
Daniel Vetter8aca63a2013-07-21 21:37:01 +02001343 struct intel_sdvo *intel_sdvo = to_sdvo(encoder);
Jesse Barnes045ac3b2013-05-14 17:08:26 -07001344 struct intel_sdvo_dtd dtd;
Daniel Vetter6c49f242013-06-06 12:45:25 +02001345 int encoder_pixel_multiplier = 0;
Ville Syrjälä18442d02013-09-13 16:00:08 +03001346 int dotclock;
Daniel Vetter6c49f242013-06-06 12:45:25 +02001347 u32 flags = 0, sdvox;
1348 u8 val;
Jesse Barnes045ac3b2013-05-14 17:08:26 -07001349 bool ret;
1350
1351 ret = intel_sdvo_get_input_timing(intel_sdvo, &dtd);
1352 if (!ret) {
Daniel Vetterbb760062013-06-06 14:55:52 +02001353 /* Some sdvo encoders are not spec compliant and don't
1354 * implement the mandatory get_timings function. */
Jesse Barnes045ac3b2013-05-14 17:08:26 -07001355 DRM_DEBUG_DRIVER("failed to retrieve SDVO DTD\n");
Daniel Vetterbb760062013-06-06 14:55:52 +02001356 pipe_config->quirks |= PIPE_CONFIG_QUIRK_MODE_SYNC_FLAGS;
1357 } else {
1358 if (dtd.part2.dtd_flags & DTD_FLAG_HSYNC_POSITIVE)
1359 flags |= DRM_MODE_FLAG_PHSYNC;
1360 else
1361 flags |= DRM_MODE_FLAG_NHSYNC;
1362
1363 if (dtd.part2.dtd_flags & DTD_FLAG_VSYNC_POSITIVE)
1364 flags |= DRM_MODE_FLAG_PVSYNC;
1365 else
1366 flags |= DRM_MODE_FLAG_NVSYNC;
Jesse Barnes045ac3b2013-05-14 17:08:26 -07001367 }
1368
Jesse Barnes045ac3b2013-05-14 17:08:26 -07001369 pipe_config->adjusted_mode.flags |= flags;
Daniel Vetter6c49f242013-06-06 12:45:25 +02001370
Daniel Vetterfdafa9e2013-06-12 11:47:24 +02001371 /*
1372 * pixel multiplier readout is tricky: Only on i915g/gm it is stored in
1373 * the sdvo port register, on all other platforms it is part of the dpll
1374 * state. Since the general pipe state readout happens before the
1375 * encoder->get_config we so already have a valid pixel multplier on all
1376 * other platfroms.
1377 */
Daniel Vetter6c49f242013-06-06 12:45:25 +02001378 if (IS_I915G(dev) || IS_I915GM(dev)) {
1379 sdvox = I915_READ(intel_sdvo->sdvo_reg);
1380 pipe_config->pixel_multiplier =
1381 ((sdvox & SDVO_PORT_MULTIPLY_MASK)
1382 >> SDVO_PORT_MULTIPLY_SHIFT) + 1;
1383 }
1384
Ville Syrjälä18442d02013-09-13 16:00:08 +03001385 dotclock = pipe_config->port_clock / pipe_config->pixel_multiplier;
1386
1387 if (HAS_PCH_SPLIT(dev))
1388 ironlake_check_encoder_dotclock(pipe_config, dotclock);
1389
Damien Lespiau241bfc32013-09-25 16:45:37 +01001390 pipe_config->adjusted_mode.crtc_clock = dotclock;
Ville Syrjälä18442d02013-09-13 16:00:08 +03001391
Daniel Vetter6c49f242013-06-06 12:45:25 +02001392 /* Cross check the port pixel multiplier with the sdvo encoder state. */
Damien Lespiau53b91402013-07-12 16:24:40 +01001393 if (intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_CLOCK_RATE_MULT,
1394 &val, 1)) {
1395 switch (val) {
1396 case SDVO_CLOCK_RATE_MULT_1X:
1397 encoder_pixel_multiplier = 1;
1398 break;
1399 case SDVO_CLOCK_RATE_MULT_2X:
1400 encoder_pixel_multiplier = 2;
1401 break;
1402 case SDVO_CLOCK_RATE_MULT_4X:
1403 encoder_pixel_multiplier = 4;
1404 break;
1405 }
Daniel Vetter6c49f242013-06-06 12:45:25 +02001406 }
Daniel Vetterfdafa9e2013-06-12 11:47:24 +02001407
Daniel Vetter6c49f242013-06-06 12:45:25 +02001408 WARN(encoder_pixel_multiplier != pipe_config->pixel_multiplier,
1409 "SDVO pixel multiplier mismatch, port: %i, encoder: %i\n",
1410 pipe_config->pixel_multiplier, encoder_pixel_multiplier);
Jesse Barnes045ac3b2013-05-14 17:08:26 -07001411}
1412
Daniel Vetterce22c322012-07-01 15:31:04 +02001413static void intel_disable_sdvo(struct intel_encoder *encoder)
1414{
1415 struct drm_i915_private *dev_priv = encoder->base.dev->dev_private;
Daniel Vetter8aca63a2013-07-21 21:37:01 +02001416 struct intel_sdvo *intel_sdvo = to_sdvo(encoder);
Jesse Barnes79e53942008-11-07 14:24:08 -08001417 u32 temp;
1418
Daniel Vetterce22c322012-07-01 15:31:04 +02001419 intel_sdvo_set_active_outputs(intel_sdvo, 0);
1420 if (0)
1421 intel_sdvo_set_encoder_power_state(intel_sdvo,
1422 DRM_MODE_DPMS_OFF);
1423
1424 temp = I915_READ(intel_sdvo->sdvo_reg);
1425 if ((temp & SDVO_ENABLE) != 0) {
Chris Wilson776ca7c2012-11-21 10:44:23 +00001426 /* HW workaround for IBX, we need to move the port to
1427 * transcoder A before disabling it. */
1428 if (HAS_PCH_IBX(encoder->base.dev)) {
1429 struct drm_crtc *crtc = encoder->base.crtc;
1430 int pipe = crtc ? to_intel_crtc(crtc)->pipe : -1;
1431
1432 if (temp & SDVO_PIPE_B_SELECT) {
1433 temp &= ~SDVO_PIPE_B_SELECT;
1434 I915_WRITE(intel_sdvo->sdvo_reg, temp);
1435 POSTING_READ(intel_sdvo->sdvo_reg);
1436
1437 /* Again we need to write this twice. */
1438 I915_WRITE(intel_sdvo->sdvo_reg, temp);
1439 POSTING_READ(intel_sdvo->sdvo_reg);
1440
1441 /* Transcoder selection bits only update
1442 * effectively on vblank. */
1443 if (crtc)
1444 intel_wait_for_vblank(encoder->base.dev, pipe);
1445 else
1446 msleep(50);
1447 }
1448 }
1449
Daniel Vetterce22c322012-07-01 15:31:04 +02001450 intel_sdvo_write_sdvox(intel_sdvo, temp & ~SDVO_ENABLE);
1451 }
1452}
1453
1454static void intel_enable_sdvo(struct intel_encoder *encoder)
1455{
1456 struct drm_device *dev = encoder->base.dev;
1457 struct drm_i915_private *dev_priv = dev->dev_private;
Daniel Vetter8aca63a2013-07-21 21:37:01 +02001458 struct intel_sdvo *intel_sdvo = to_sdvo(encoder);
Daniel Vetterce22c322012-07-01 15:31:04 +02001459 struct intel_crtc *intel_crtc = to_intel_crtc(encoder->base.crtc);
1460 u32 temp;
1461 bool input1, input2;
1462 int i;
Jani Nikulad0a7b6d2014-03-21 14:56:32 +02001463 bool success;
Daniel Vetterce22c322012-07-01 15:31:04 +02001464
1465 temp = I915_READ(intel_sdvo->sdvo_reg);
Chris Wilson776ca7c2012-11-21 10:44:23 +00001466 if ((temp & SDVO_ENABLE) == 0) {
1467 /* HW workaround for IBX, we need to move the port
Paulo Zanonidc0fa712013-02-19 16:21:46 -03001468 * to transcoder A before disabling it, so restore it here. */
1469 if (HAS_PCH_IBX(dev))
1470 temp |= SDVO_PIPE_SEL(intel_crtc->pipe);
Chris Wilson776ca7c2012-11-21 10:44:23 +00001471
Daniel Vetterce22c322012-07-01 15:31:04 +02001472 intel_sdvo_write_sdvox(intel_sdvo, temp | SDVO_ENABLE);
Chris Wilson776ca7c2012-11-21 10:44:23 +00001473 }
Daniel Vetterce22c322012-07-01 15:31:04 +02001474 for (i = 0; i < 2; i++)
1475 intel_wait_for_vblank(dev, intel_crtc->pipe);
1476
Jani Nikulad0a7b6d2014-03-21 14:56:32 +02001477 success = intel_sdvo_get_trained_inputs(intel_sdvo, &input1, &input2);
Daniel Vetterce22c322012-07-01 15:31:04 +02001478 /* Warn if the device reported failure to sync.
1479 * A lot of SDVO devices fail to notify of sync, but it's
1480 * a given it the status is a success, we succeeded.
1481 */
Jani Nikulad0a7b6d2014-03-21 14:56:32 +02001482 if (success && !input1) {
Daniel Vetterce22c322012-07-01 15:31:04 +02001483 DRM_DEBUG_KMS("First %s output reported failure to "
1484 "sync\n", SDVO_NAME(intel_sdvo));
1485 }
1486
1487 if (0)
1488 intel_sdvo_set_encoder_power_state(intel_sdvo,
1489 DRM_MODE_DPMS_ON);
1490 intel_sdvo_set_active_outputs(intel_sdvo, intel_sdvo->attached_output);
1491}
1492
Jani Nikula6b1c087b2013-05-28 12:35:02 +03001493/* Special dpms function to support cloning between dvo/sdvo/crt. */
Daniel Vetterb2cabb02012-07-01 22:42:24 +02001494static void intel_sdvo_dpms(struct drm_connector *connector, int mode)
Jesse Barnes79e53942008-11-07 14:24:08 -08001495{
Daniel Vetterb2cabb02012-07-01 22:42:24 +02001496 struct drm_crtc *crtc;
1497 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1498
1499 /* dvo supports only 2 dpms states. */
1500 if (mode != DRM_MODE_DPMS_ON)
1501 mode = DRM_MODE_DPMS_OFF;
1502
1503 if (mode == connector->dpms)
1504 return;
1505
1506 connector->dpms = mode;
1507
1508 /* Only need to change hw state when actually enabled */
1509 crtc = intel_sdvo->base.base.crtc;
1510 if (!crtc) {
1511 intel_sdvo->base.connectors_active = false;
1512 return;
1513 }
Jesse Barnes79e53942008-11-07 14:24:08 -08001514
Jani Nikula6b1c087b2013-05-28 12:35:02 +03001515 /* We set active outputs manually below in case pipe dpms doesn't change
1516 * due to cloning. */
Jesse Barnes79e53942008-11-07 14:24:08 -08001517 if (mode != DRM_MODE_DPMS_ON) {
Chris Wilsonea5b2132010-08-04 13:50:23 +01001518 intel_sdvo_set_active_outputs(intel_sdvo, 0);
Jesse Barnes79e53942008-11-07 14:24:08 -08001519 if (0)
Chris Wilsonea5b2132010-08-04 13:50:23 +01001520 intel_sdvo_set_encoder_power_state(intel_sdvo, mode);
Jesse Barnes79e53942008-11-07 14:24:08 -08001521
Daniel Vetterb2cabb02012-07-01 22:42:24 +02001522 intel_sdvo->base.connectors_active = false;
1523
1524 intel_crtc_update_dpms(crtc);
Jesse Barnes79e53942008-11-07 14:24:08 -08001525 } else {
Daniel Vetterb2cabb02012-07-01 22:42:24 +02001526 intel_sdvo->base.connectors_active = true;
Jesse Barnes79e53942008-11-07 14:24:08 -08001527
Daniel Vetterb2cabb02012-07-01 22:42:24 +02001528 intel_crtc_update_dpms(crtc);
Jesse Barnes79e53942008-11-07 14:24:08 -08001529
1530 if (0)
Chris Wilsonea5b2132010-08-04 13:50:23 +01001531 intel_sdvo_set_encoder_power_state(intel_sdvo, mode);
1532 intel_sdvo_set_active_outputs(intel_sdvo, intel_sdvo->attached_output);
Jesse Barnes79e53942008-11-07 14:24:08 -08001533 }
Daniel Vetter0a91ca22012-07-02 21:54:27 +02001534
Daniel Vetterb9805142012-08-31 17:37:33 +02001535 intel_modeset_check_state(connector->dev);
Jesse Barnes79e53942008-11-07 14:24:08 -08001536}
1537
Damien Lespiauc19de8e2013-11-28 15:29:18 +00001538static enum drm_mode_status
1539intel_sdvo_mode_valid(struct drm_connector *connector,
1540 struct drm_display_mode *mode)
Jesse Barnes79e53942008-11-07 14:24:08 -08001541{
Chris Wilsondf0e9242010-09-09 16:20:55 +01001542 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
Jesse Barnes79e53942008-11-07 14:24:08 -08001543
1544 if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
1545 return MODE_NO_DBLESCAN;
1546
Chris Wilsonea5b2132010-08-04 13:50:23 +01001547 if (intel_sdvo->pixel_clock_min > mode->clock)
Jesse Barnes79e53942008-11-07 14:24:08 -08001548 return MODE_CLOCK_LOW;
1549
Chris Wilsonea5b2132010-08-04 13:50:23 +01001550 if (intel_sdvo->pixel_clock_max < mode->clock)
Jesse Barnes79e53942008-11-07 14:24:08 -08001551 return MODE_CLOCK_HIGH;
1552
Chris Wilson85454232010-08-08 14:28:23 +01001553 if (intel_sdvo->is_lvds) {
Chris Wilsonea5b2132010-08-04 13:50:23 +01001554 if (mode->hdisplay > intel_sdvo->sdvo_lvds_fixed_mode->hdisplay)
ling.ma@intel.com12682a92009-06-30 11:35:35 +08001555 return MODE_PANEL;
1556
Chris Wilsonea5b2132010-08-04 13:50:23 +01001557 if (mode->vdisplay > intel_sdvo->sdvo_lvds_fixed_mode->vdisplay)
ling.ma@intel.com12682a92009-06-30 11:35:35 +08001558 return MODE_PANEL;
1559 }
1560
Jesse Barnes79e53942008-11-07 14:24:08 -08001561 return MODE_OK;
1562}
1563
Chris Wilsonea5b2132010-08-04 13:50:23 +01001564static bool intel_sdvo_get_capabilities(struct intel_sdvo *intel_sdvo, struct intel_sdvo_caps *caps)
Jesse Barnes79e53942008-11-07 14:24:08 -08001565{
Chris Wilson1a3665c2011-01-25 13:59:37 +00001566 BUILD_BUG_ON(sizeof(*caps) != 8);
Chris Wilsone957d772010-09-24 12:52:03 +01001567 if (!intel_sdvo_get_value(intel_sdvo,
1568 SDVO_CMD_GET_DEVICE_CAPS,
1569 caps, sizeof(*caps)))
1570 return false;
1571
1572 DRM_DEBUG_KMS("SDVO capabilities:\n"
1573 " vendor_id: %d\n"
1574 " device_id: %d\n"
1575 " device_rev_id: %d\n"
1576 " sdvo_version_major: %d\n"
1577 " sdvo_version_minor: %d\n"
1578 " sdvo_inputs_mask: %d\n"
1579 " smooth_scaling: %d\n"
1580 " sharp_scaling: %d\n"
1581 " up_scaling: %d\n"
1582 " down_scaling: %d\n"
1583 " stall_support: %d\n"
1584 " output_flags: %d\n",
1585 caps->vendor_id,
1586 caps->device_id,
1587 caps->device_rev_id,
1588 caps->sdvo_version_major,
1589 caps->sdvo_version_minor,
1590 caps->sdvo_inputs_mask,
1591 caps->smooth_scaling,
1592 caps->sharp_scaling,
1593 caps->up_scaling,
1594 caps->down_scaling,
1595 caps->stall_support,
1596 caps->output_flags);
1597
1598 return true;
Jesse Barnes79e53942008-11-07 14:24:08 -08001599}
1600
Jani Nikula5fa7ac92012-08-29 16:43:58 +03001601static uint16_t intel_sdvo_get_hotplug_support(struct intel_sdvo *intel_sdvo)
Jesse Barnes79e53942008-11-07 14:24:08 -08001602{
Daniel Vetter768b1072012-05-04 11:29:56 +02001603 struct drm_device *dev = intel_sdvo->base.base.dev;
Jani Nikula5fa7ac92012-08-29 16:43:58 +03001604 uint16_t hotplug;
Jesse Barnes79e53942008-11-07 14:24:08 -08001605
Daniel Vetter768b1072012-05-04 11:29:56 +02001606 /* HW Erratum: SDVO Hotplug is broken on all i945G chips, there's noise
1607 * on the line. */
1608 if (IS_I945G(dev) || IS_I945GM(dev))
Jani Nikula5fa7ac92012-08-29 16:43:58 +03001609 return 0;
Daniel Vetter768b1072012-05-04 11:29:56 +02001610
Jani Nikula5fa7ac92012-08-29 16:43:58 +03001611 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_HOT_PLUG_SUPPORT,
1612 &hotplug, sizeof(hotplug)))
1613 return 0;
1614
1615 return hotplug;
Jesse Barnes79e53942008-11-07 14:24:08 -08001616}
1617
Simon Farnsworthcc68c812011-09-21 17:13:30 +01001618static void intel_sdvo_enable_hotplug(struct intel_encoder *encoder)
Jesse Barnes79e53942008-11-07 14:24:08 -08001619{
Daniel Vetter8aca63a2013-07-21 21:37:01 +02001620 struct intel_sdvo *intel_sdvo = to_sdvo(encoder);
Jesse Barnes79e53942008-11-07 14:24:08 -08001621
Jani Nikula5fa7ac92012-08-29 16:43:58 +03001622 intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_SET_ACTIVE_HOT_PLUG,
1623 &intel_sdvo->hotplug_active, 2);
Jesse Barnes79e53942008-11-07 14:24:08 -08001624}
1625
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08001626static bool
Chris Wilsonea5b2132010-08-04 13:50:23 +01001627intel_sdvo_multifunc_encoder(struct intel_sdvo *intel_sdvo)
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08001628{
Chris Wilsonbc652122011-01-25 13:28:29 +00001629 /* Is there more than one type of output? */
Adam Jackson22944882011-06-16 16:36:24 -04001630 return hweight16(intel_sdvo->caps.output_flags) > 1;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08001631}
1632
Chris Wilsonf899fc62010-07-20 15:44:45 -07001633static struct edid *
Chris Wilsone957d772010-09-24 12:52:03 +01001634intel_sdvo_get_edid(struct drm_connector *connector)
Chris Wilsonf899fc62010-07-20 15:44:45 -07001635{
Chris Wilsone957d772010-09-24 12:52:03 +01001636 struct intel_sdvo *sdvo = intel_attached_sdvo(connector);
1637 return drm_get_edid(connector, &sdvo->ddc);
Chris Wilsonf899fc62010-07-20 15:44:45 -07001638}
1639
Chris Wilsonff482d82010-09-15 10:40:38 +01001640/* Mac mini hack -- use the same DDC as the analog connector */
1641static struct edid *
1642intel_sdvo_get_analog_edid(struct drm_connector *connector)
1643{
Chris Wilsonf899fc62010-07-20 15:44:45 -07001644 struct drm_i915_private *dev_priv = connector->dev->dev_private;
Chris Wilsonff482d82010-09-15 10:40:38 +01001645
Chris Wilson0c1dab82010-11-23 22:37:01 +00001646 return drm_get_edid(connector,
Daniel Kurtz3bd7d902012-03-28 02:36:14 +08001647 intel_gmbus_get_adapter(dev_priv,
Rodrigo Vivi41aa3442013-05-09 20:03:18 -03001648 dev_priv->vbt.crt_ddc_pin));
Chris Wilsonff482d82010-09-15 10:40:38 +01001649}
1650
Ben Widawskyc43b5632012-04-16 14:07:40 -07001651static enum drm_connector_status
Adam Jackson8bf38482011-06-16 16:36:25 -04001652intel_sdvo_tmds_sink_detect(struct drm_connector *connector)
Ma Ling9dff6af2009-04-02 13:13:26 +08001653{
Chris Wilsondf0e9242010-09-09 16:20:55 +01001654 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
Chris Wilson9d1a9032010-09-14 17:58:19 +01001655 enum drm_connector_status status;
1656 struct edid *edid;
Ma Ling9dff6af2009-04-02 13:13:26 +08001657
Chris Wilsone957d772010-09-24 12:52:03 +01001658 edid = intel_sdvo_get_edid(connector);
Keith Packard57cdaf92009-09-04 13:07:54 +08001659
Chris Wilsonea5b2132010-08-04 13:50:23 +01001660 if (edid == NULL && intel_sdvo_multifunc_encoder(intel_sdvo)) {
Chris Wilsone957d772010-09-24 12:52:03 +01001661 u8 ddc, saved_ddc = intel_sdvo->ddc_bus;
Chris Wilson9d1a9032010-09-14 17:58:19 +01001662
Zhao Yakui7c3f0a22010-01-08 10:58:20 +08001663 /*
1664 * Don't use the 1 as the argument of DDC bus switch to get
1665 * the EDID. It is used for SDVO SPD ROM.
1666 */
Chris Wilson9d1a9032010-09-14 17:58:19 +01001667 for (ddc = intel_sdvo->ddc_bus >> 1; ddc > 1; ddc >>= 1) {
Chris Wilsone957d772010-09-24 12:52:03 +01001668 intel_sdvo->ddc_bus = ddc;
1669 edid = intel_sdvo_get_edid(connector);
1670 if (edid)
Zhao Yakui7c3f0a22010-01-08 10:58:20 +08001671 break;
Zhao Yakui7c3f0a22010-01-08 10:58:20 +08001672 }
Chris Wilsone957d772010-09-24 12:52:03 +01001673 /*
1674 * If we found the EDID on the other bus,
1675 * assume that is the correct DDC bus.
1676 */
1677 if (edid == NULL)
1678 intel_sdvo->ddc_bus = saved_ddc;
Zhao Yakui7c3f0a22010-01-08 10:58:20 +08001679 }
Chris Wilson9d1a9032010-09-14 17:58:19 +01001680
1681 /*
1682 * When there is no edid and no monitor is connected with VGA
1683 * port, try to use the CRT ddc to read the EDID for DVI-connector.
Keith Packard57cdaf92009-09-04 13:07:54 +08001684 */
Chris Wilsonff482d82010-09-15 10:40:38 +01001685 if (edid == NULL)
1686 edid = intel_sdvo_get_analog_edid(connector);
Adam Jackson149c36a2010-04-29 14:05:18 -04001687
Chris Wilson2f551c82010-09-15 10:42:50 +01001688 status = connector_status_unknown;
Ma Ling9dff6af2009-04-02 13:13:26 +08001689 if (edid != NULL) {
Adam Jackson149c36a2010-04-29 14:05:18 -04001690 /* DDC bus is shared, match EDID to connector type */
Chris Wilson9d1a9032010-09-14 17:58:19 +01001691 if (edid->input & DRM_EDID_INPUT_DIGITAL) {
1692 status = connector_status_connected;
Chris Wilsonda79de92010-11-22 11:12:46 +00001693 if (intel_sdvo->is_hdmi) {
1694 intel_sdvo->has_hdmi_monitor = drm_detect_hdmi_monitor(edid);
1695 intel_sdvo->has_hdmi_audio = drm_detect_monitor_audio(edid);
Ville Syrjäläabedc072013-01-17 16:31:31 +02001696 intel_sdvo->rgb_quant_range_selectable =
1697 drm_rgb_quant_range_selectable(edid);
Chris Wilsonda79de92010-11-22 11:12:46 +00001698 }
Chris Wilson139467432011-02-09 20:01:16 +00001699 } else
1700 status = connector_status_disconnected;
Chris Wilson9d1a9032010-09-14 17:58:19 +01001701 kfree(edid);
1702 }
Chris Wilson7f36e7e2010-09-19 09:29:33 +01001703
1704 if (status == connector_status_connected) {
1705 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
Daniel Vetterc3e5f672012-02-23 17:14:47 +01001706 if (intel_sdvo_connector->force_audio != HDMI_AUDIO_AUTO)
1707 intel_sdvo->has_hdmi_audio = (intel_sdvo_connector->force_audio == HDMI_AUDIO_ON);
Chris Wilson7f36e7e2010-09-19 09:29:33 +01001708 }
1709
ling.ma@intel.com2b8d33f72009-07-29 11:31:18 +08001710 return status;
Ma Ling9dff6af2009-04-02 13:13:26 +08001711}
1712
Chris Wilson52220082011-06-20 14:45:50 +01001713static bool
1714intel_sdvo_connector_matches_edid(struct intel_sdvo_connector *sdvo,
1715 struct edid *edid)
1716{
1717 bool monitor_is_digital = !!(edid->input & DRM_EDID_INPUT_DIGITAL);
1718 bool connector_is_digital = !!IS_DIGITAL(sdvo);
1719
1720 DRM_DEBUG_KMS("connector_is_digital? %d, monitor_is_digital? %d\n",
1721 connector_is_digital, monitor_is_digital);
1722 return connector_is_digital == monitor_is_digital;
1723}
1724
Chris Wilson7b334fc2010-09-09 23:51:02 +01001725static enum drm_connector_status
Chris Wilson930a9e22010-09-14 11:07:23 +01001726intel_sdvo_detect(struct drm_connector *connector, bool force)
Jesse Barnes79e53942008-11-07 14:24:08 -08001727{
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08001728 uint16_t response;
Chris Wilsondf0e9242010-09-09 16:20:55 +01001729 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
Chris Wilson615fb932010-08-04 13:50:24 +01001730 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
Zhenyu Wang14571b42010-03-30 14:06:33 +08001731 enum drm_connector_status ret;
Jesse Barnes79e53942008-11-07 14:24:08 -08001732
Chris Wilson164c8592013-07-20 20:27:08 +01001733 DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n",
1734 connector->base.id, drm_get_connector_name(connector));
1735
Chris Wilsonfc373812012-11-23 11:57:56 +00001736 if (!intel_sdvo_get_value(intel_sdvo,
1737 SDVO_CMD_GET_ATTACHED_DISPLAYS,
1738 &response, 2))
Chris Wilson32aad862010-08-04 13:50:25 +01001739 return connector_status_unknown;
Jesse Barnes79e53942008-11-07 14:24:08 -08001740
Chris Wilsone957d772010-09-24 12:52:03 +01001741 DRM_DEBUG_KMS("SDVO response %d %d [%x]\n",
1742 response & 0xff, response >> 8,
1743 intel_sdvo_connector->output_flag);
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001744
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08001745 if (response == 0)
Jesse Barnes79e53942008-11-07 14:24:08 -08001746 return connector_status_disconnected;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08001747
Chris Wilsonea5b2132010-08-04 13:50:23 +01001748 intel_sdvo->attached_output = response;
Zhenyu Wang14571b42010-03-30 14:06:33 +08001749
Chris Wilson97aaf912011-01-04 20:10:52 +00001750 intel_sdvo->has_hdmi_monitor = false;
1751 intel_sdvo->has_hdmi_audio = false;
Ville Syrjäläabedc072013-01-17 16:31:31 +02001752 intel_sdvo->rgb_quant_range_selectable = false;
Chris Wilson97aaf912011-01-04 20:10:52 +00001753
Chris Wilson615fb932010-08-04 13:50:24 +01001754 if ((intel_sdvo_connector->output_flag & response) == 0)
Zhenyu Wang14571b42010-03-30 14:06:33 +08001755 ret = connector_status_disconnected;
Chris Wilson139467432011-02-09 20:01:16 +00001756 else if (IS_TMDS(intel_sdvo_connector))
Adam Jackson8bf38482011-06-16 16:36:25 -04001757 ret = intel_sdvo_tmds_sink_detect(connector);
Chris Wilson139467432011-02-09 20:01:16 +00001758 else {
1759 struct edid *edid;
1760
1761 /* if we have an edid check it matches the connection */
1762 edid = intel_sdvo_get_edid(connector);
1763 if (edid == NULL)
1764 edid = intel_sdvo_get_analog_edid(connector);
1765 if (edid != NULL) {
Chris Wilson52220082011-06-20 14:45:50 +01001766 if (intel_sdvo_connector_matches_edid(intel_sdvo_connector,
1767 edid))
Chris Wilson139467432011-02-09 20:01:16 +00001768 ret = connector_status_connected;
Chris Wilson52220082011-06-20 14:45:50 +01001769 else
1770 ret = connector_status_disconnected;
1771
Chris Wilson139467432011-02-09 20:01:16 +00001772 kfree(edid);
1773 } else
1774 ret = connector_status_connected;
1775 }
Zhenyu Wang14571b42010-03-30 14:06:33 +08001776
1777 /* May update encoder flag for like clock for SDVO TV, etc.*/
1778 if (ret == connector_status_connected) {
Chris Wilsonea5b2132010-08-04 13:50:23 +01001779 intel_sdvo->is_tv = false;
1780 intel_sdvo->is_lvds = false;
Zhenyu Wang14571b42010-03-30 14:06:33 +08001781
Daniel Vetter09ede542013-04-30 14:01:45 +02001782 if (response & SDVO_TV_MASK)
Chris Wilsonea5b2132010-08-04 13:50:23 +01001783 intel_sdvo->is_tv = true;
Zhenyu Wang14571b42010-03-30 14:06:33 +08001784 if (response & SDVO_LVDS_MASK)
Chris Wilson85454232010-08-08 14:28:23 +01001785 intel_sdvo->is_lvds = intel_sdvo->sdvo_lvds_fixed_mode != NULL;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08001786 }
Zhenyu Wang14571b42010-03-30 14:06:33 +08001787
1788 return ret;
Jesse Barnes79e53942008-11-07 14:24:08 -08001789}
1790
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001791static void intel_sdvo_get_ddc_modes(struct drm_connector *connector)
Jesse Barnes79e53942008-11-07 14:24:08 -08001792{
Chris Wilsonff482d82010-09-15 10:40:38 +01001793 struct edid *edid;
Jesse Barnes79e53942008-11-07 14:24:08 -08001794
Chris Wilson46a3f4a2013-09-24 12:55:40 +01001795 DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n",
1796 connector->base.id, drm_get_connector_name(connector));
1797
Jesse Barnes79e53942008-11-07 14:24:08 -08001798 /* set the bus switch and get the modes */
Chris Wilsone957d772010-09-24 12:52:03 +01001799 edid = intel_sdvo_get_edid(connector);
Jesse Barnes79e53942008-11-07 14:24:08 -08001800
Keith Packard57cdaf92009-09-04 13:07:54 +08001801 /*
1802 * Mac mini hack. On this device, the DVI-I connector shares one DDC
1803 * link between analog and digital outputs. So, if the regular SDVO
1804 * DDC fails, check to see if the analog output is disconnected, in
1805 * which case we'll look there for the digital DDC data.
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001806 */
Chris Wilsonf899fc62010-07-20 15:44:45 -07001807 if (edid == NULL)
1808 edid = intel_sdvo_get_analog_edid(connector);
1809
Chris Wilsonff482d82010-09-15 10:40:38 +01001810 if (edid != NULL) {
Chris Wilson52220082011-06-20 14:45:50 +01001811 if (intel_sdvo_connector_matches_edid(to_intel_sdvo_connector(connector),
1812 edid)) {
Chris Wilson0c1dab82010-11-23 22:37:01 +00001813 drm_mode_connector_update_edid_property(connector, edid);
1814 drm_add_edid_modes(connector, edid);
1815 }
Chris Wilson139467432011-02-09 20:01:16 +00001816
Chris Wilsonff482d82010-09-15 10:40:38 +01001817 kfree(edid);
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001818 }
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001819}
1820
1821/*
1822 * Set of SDVO TV modes.
1823 * Note! This is in reply order (see loop in get_tv_modes).
1824 * XXX: all 60Hz refresh?
1825 */
Chris Wilsonb1f559e2011-01-26 09:49:47 +00001826static const struct drm_display_mode sdvo_tv_modes[] = {
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001827 { DRM_MODE("320x200", DRM_MODE_TYPE_DRIVER, 5815, 320, 321, 384,
1828 416, 0, 200, 201, 232, 233, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001829 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001830 { DRM_MODE("320x240", DRM_MODE_TYPE_DRIVER, 6814, 320, 321, 384,
1831 416, 0, 240, 241, 272, 273, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001832 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001833 { DRM_MODE("400x300", DRM_MODE_TYPE_DRIVER, 9910, 400, 401, 464,
1834 496, 0, 300, 301, 332, 333, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001835 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001836 { DRM_MODE("640x350", DRM_MODE_TYPE_DRIVER, 16913, 640, 641, 704,
1837 736, 0, 350, 351, 382, 383, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001838 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001839 { DRM_MODE("640x400", DRM_MODE_TYPE_DRIVER, 19121, 640, 641, 704,
1840 736, 0, 400, 401, 432, 433, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001841 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001842 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 22654, 640, 641, 704,
1843 736, 0, 480, 481, 512, 513, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001844 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001845 { DRM_MODE("704x480", DRM_MODE_TYPE_DRIVER, 24624, 704, 705, 768,
1846 800, 0, 480, 481, 512, 513, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001847 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001848 { DRM_MODE("704x576", DRM_MODE_TYPE_DRIVER, 29232, 704, 705, 768,
1849 800, 0, 576, 577, 608, 609, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001850 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001851 { DRM_MODE("720x350", DRM_MODE_TYPE_DRIVER, 18751, 720, 721, 784,
1852 816, 0, 350, 351, 382, 383, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001853 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001854 { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 21199, 720, 721, 784,
1855 816, 0, 400, 401, 432, 433, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001856 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001857 { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 25116, 720, 721, 784,
1858 816, 0, 480, 481, 512, 513, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001859 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001860 { DRM_MODE("720x540", DRM_MODE_TYPE_DRIVER, 28054, 720, 721, 784,
1861 816, 0, 540, 541, 572, 573, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001862 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001863 { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 29816, 720, 721, 784,
1864 816, 0, 576, 577, 608, 609, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001865 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001866 { DRM_MODE("768x576", DRM_MODE_TYPE_DRIVER, 31570, 768, 769, 832,
1867 864, 0, 576, 577, 608, 609, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001868 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001869 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 34030, 800, 801, 864,
1870 896, 0, 600, 601, 632, 633, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001871 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001872 { DRM_MODE("832x624", DRM_MODE_TYPE_DRIVER, 36581, 832, 833, 896,
1873 928, 0, 624, 625, 656, 657, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001874 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001875 { DRM_MODE("920x766", DRM_MODE_TYPE_DRIVER, 48707, 920, 921, 984,
1876 1016, 0, 766, 767, 798, 799, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001877 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001878 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 53827, 1024, 1025, 1088,
1879 1120, 0, 768, 769, 800, 801, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001880 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001881 { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 87265, 1280, 1281, 1344,
1882 1376, 0, 1024, 1025, 1056, 1057, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001883 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1884};
1885
1886static void intel_sdvo_get_tv_modes(struct drm_connector *connector)
1887{
Chris Wilsondf0e9242010-09-09 16:20:55 +01001888 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001889 struct intel_sdvo_sdtv_resolution_request tv_res;
Zhao Yakuice6feab2009-08-24 13:50:26 +08001890 uint32_t reply = 0, format_map = 0;
1891 int i;
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001892
Chris Wilson46a3f4a2013-09-24 12:55:40 +01001893 DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n",
1894 connector->base.id, drm_get_connector_name(connector));
1895
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001896 /* Read the list of supported input resolutions for the selected TV
1897 * format.
1898 */
Chris Wilson40039752010-08-04 13:50:26 +01001899 format_map = 1 << intel_sdvo->tv_format_index;
Zhao Yakuice6feab2009-08-24 13:50:26 +08001900 memcpy(&tv_res, &format_map,
Chris Wilson32aad862010-08-04 13:50:25 +01001901 min(sizeof(format_map), sizeof(struct intel_sdvo_sdtv_resolution_request)));
Zhao Yakuice6feab2009-08-24 13:50:26 +08001902
Chris Wilson32aad862010-08-04 13:50:25 +01001903 if (!intel_sdvo_set_target_output(intel_sdvo, intel_sdvo->attached_output))
1904 return;
Zhao Yakuice6feab2009-08-24 13:50:26 +08001905
Chris Wilson32aad862010-08-04 13:50:25 +01001906 BUILD_BUG_ON(sizeof(tv_res) != 3);
Chris Wilsone957d772010-09-24 12:52:03 +01001907 if (!intel_sdvo_write_cmd(intel_sdvo,
1908 SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT,
Chris Wilson32aad862010-08-04 13:50:25 +01001909 &tv_res, sizeof(tv_res)))
1910 return;
1911 if (!intel_sdvo_read_response(intel_sdvo, &reply, 3))
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001912 return;
1913
1914 for (i = 0; i < ARRAY_SIZE(sdvo_tv_modes); i++)
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001915 if (reply & (1 << i)) {
1916 struct drm_display_mode *nmode;
1917 nmode = drm_mode_duplicate(connector->dev,
Chris Wilson32aad862010-08-04 13:50:25 +01001918 &sdvo_tv_modes[i]);
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001919 if (nmode)
1920 drm_mode_probed_add(connector, nmode);
1921 }
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001922}
1923
Ma Ling7086c872009-05-13 11:20:06 +08001924static void intel_sdvo_get_lvds_modes(struct drm_connector *connector)
1925{
Chris Wilsondf0e9242010-09-09 16:20:55 +01001926 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
Ma Ling7086c872009-05-13 11:20:06 +08001927 struct drm_i915_private *dev_priv = connector->dev->dev_private;
ling.ma@intel.com12682a92009-06-30 11:35:35 +08001928 struct drm_display_mode *newmode;
Ma Ling7086c872009-05-13 11:20:06 +08001929
Chris Wilson46a3f4a2013-09-24 12:55:40 +01001930 DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n",
1931 connector->base.id, drm_get_connector_name(connector));
1932
Ma Ling7086c872009-05-13 11:20:06 +08001933 /*
Daniel Vetterc3456fb2013-06-10 09:47:58 +02001934 * Fetch modes from VBT. For SDVO prefer the VBT mode since some
Dave Airlie4300a0f2013-06-27 20:40:44 +10001935 * SDVO->LVDS transcoders can't cope with the EDID mode.
Ma Ling7086c872009-05-13 11:20:06 +08001936 */
Rodrigo Vivi41aa3442013-05-09 20:03:18 -03001937 if (dev_priv->vbt.sdvo_lvds_vbt_mode != NULL) {
Ma Ling7086c872009-05-13 11:20:06 +08001938 newmode = drm_mode_duplicate(connector->dev,
Rodrigo Vivi41aa3442013-05-09 20:03:18 -03001939 dev_priv->vbt.sdvo_lvds_vbt_mode);
Ma Ling7086c872009-05-13 11:20:06 +08001940 if (newmode != NULL) {
1941 /* Guarantee the mode is preferred */
1942 newmode->type = (DRM_MODE_TYPE_PREFERRED |
1943 DRM_MODE_TYPE_DRIVER);
1944 drm_mode_probed_add(connector, newmode);
1945 }
1946 }
ling.ma@intel.com12682a92009-06-30 11:35:35 +08001947
Dave Airlie4300a0f2013-06-27 20:40:44 +10001948 /*
1949 * Attempt to get the mode list from DDC.
1950 * Assume that the preferred modes are
1951 * arranged in priority order.
1952 */
1953 intel_ddc_get_modes(connector, &intel_sdvo->ddc);
1954
ling.ma@intel.com12682a92009-06-30 11:35:35 +08001955 list_for_each_entry(newmode, &connector->probed_modes, head) {
1956 if (newmode->type & DRM_MODE_TYPE_PREFERRED) {
Chris Wilsonea5b2132010-08-04 13:50:23 +01001957 intel_sdvo->sdvo_lvds_fixed_mode =
ling.ma@intel.com12682a92009-06-30 11:35:35 +08001958 drm_mode_duplicate(connector->dev, newmode);
Chris Wilson6c9547f2010-08-25 10:05:17 +01001959
Chris Wilson85454232010-08-08 14:28:23 +01001960 intel_sdvo->is_lvds = true;
ling.ma@intel.com12682a92009-06-30 11:35:35 +08001961 break;
1962 }
1963 }
Ma Ling7086c872009-05-13 11:20:06 +08001964}
1965
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001966static int intel_sdvo_get_modes(struct drm_connector *connector)
1967{
Chris Wilson615fb932010-08-04 13:50:24 +01001968 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001969
Chris Wilson615fb932010-08-04 13:50:24 +01001970 if (IS_TV(intel_sdvo_connector))
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001971 intel_sdvo_get_tv_modes(connector);
Chris Wilson615fb932010-08-04 13:50:24 +01001972 else if (IS_LVDS(intel_sdvo_connector))
Ma Ling7086c872009-05-13 11:20:06 +08001973 intel_sdvo_get_lvds_modes(connector);
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001974 else
1975 intel_sdvo_get_ddc_modes(connector);
1976
Chris Wilson32aad862010-08-04 13:50:25 +01001977 return !list_empty(&connector->probed_modes);
Jesse Barnes79e53942008-11-07 14:24:08 -08001978}
1979
Chris Wilsonfcc8d672010-08-04 13:50:27 +01001980static void
1981intel_sdvo_destroy_enhance_property(struct drm_connector *connector)
Zhao Yakuib9219c52009-09-10 15:45:46 +08001982{
Chris Wilson615fb932010-08-04 13:50:24 +01001983 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
Zhao Yakuib9219c52009-09-10 15:45:46 +08001984 struct drm_device *dev = connector->dev;
1985
Chris Wilsonc5521702010-08-04 13:50:28 +01001986 if (intel_sdvo_connector->left)
1987 drm_property_destroy(dev, intel_sdvo_connector->left);
1988 if (intel_sdvo_connector->right)
1989 drm_property_destroy(dev, intel_sdvo_connector->right);
1990 if (intel_sdvo_connector->top)
1991 drm_property_destroy(dev, intel_sdvo_connector->top);
1992 if (intel_sdvo_connector->bottom)
1993 drm_property_destroy(dev, intel_sdvo_connector->bottom);
1994 if (intel_sdvo_connector->hpos)
1995 drm_property_destroy(dev, intel_sdvo_connector->hpos);
1996 if (intel_sdvo_connector->vpos)
1997 drm_property_destroy(dev, intel_sdvo_connector->vpos);
1998 if (intel_sdvo_connector->saturation)
1999 drm_property_destroy(dev, intel_sdvo_connector->saturation);
2000 if (intel_sdvo_connector->contrast)
2001 drm_property_destroy(dev, intel_sdvo_connector->contrast);
2002 if (intel_sdvo_connector->hue)
2003 drm_property_destroy(dev, intel_sdvo_connector->hue);
2004 if (intel_sdvo_connector->sharpness)
2005 drm_property_destroy(dev, intel_sdvo_connector->sharpness);
2006 if (intel_sdvo_connector->flicker_filter)
2007 drm_property_destroy(dev, intel_sdvo_connector->flicker_filter);
2008 if (intel_sdvo_connector->flicker_filter_2d)
2009 drm_property_destroy(dev, intel_sdvo_connector->flicker_filter_2d);
2010 if (intel_sdvo_connector->flicker_filter_adaptive)
2011 drm_property_destroy(dev, intel_sdvo_connector->flicker_filter_adaptive);
2012 if (intel_sdvo_connector->tv_luma_filter)
2013 drm_property_destroy(dev, intel_sdvo_connector->tv_luma_filter);
2014 if (intel_sdvo_connector->tv_chroma_filter)
2015 drm_property_destroy(dev, intel_sdvo_connector->tv_chroma_filter);
Chris Wilsone0442182010-08-04 13:50:29 +01002016 if (intel_sdvo_connector->dot_crawl)
2017 drm_property_destroy(dev, intel_sdvo_connector->dot_crawl);
Chris Wilsonc5521702010-08-04 13:50:28 +01002018 if (intel_sdvo_connector->brightness)
2019 drm_property_destroy(dev, intel_sdvo_connector->brightness);
Zhao Yakuib9219c52009-09-10 15:45:46 +08002020}
2021
Jesse Barnes79e53942008-11-07 14:24:08 -08002022static void intel_sdvo_destroy(struct drm_connector *connector)
2023{
Chris Wilson615fb932010-08-04 13:50:24 +01002024 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
Jesse Barnes79e53942008-11-07 14:24:08 -08002025
Chris Wilsonc5521702010-08-04 13:50:28 +01002026 if (intel_sdvo_connector->tv_format)
Zhao Yakuice6feab2009-08-24 13:50:26 +08002027 drm_property_destroy(connector->dev,
Chris Wilsonc5521702010-08-04 13:50:28 +01002028 intel_sdvo_connector->tv_format);
Zhao Yakuice6feab2009-08-24 13:50:26 +08002029
Zhenyu Wangd2a82a62010-03-29 21:22:55 +08002030 intel_sdvo_destroy_enhance_property(connector);
Jesse Barnes79e53942008-11-07 14:24:08 -08002031 drm_connector_cleanup(connector);
Jani Nikula4b745b12012-11-12 18:31:36 +02002032 kfree(intel_sdvo_connector);
Jesse Barnes79e53942008-11-07 14:24:08 -08002033}
2034
Chris Wilson1aad7ac2011-02-09 18:46:58 +00002035static bool intel_sdvo_detect_hdmi_audio(struct drm_connector *connector)
2036{
2037 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
2038 struct edid *edid;
2039 bool has_audio = false;
2040
2041 if (!intel_sdvo->is_hdmi)
2042 return false;
2043
2044 edid = intel_sdvo_get_edid(connector);
2045 if (edid != NULL && edid->input & DRM_EDID_INPUT_DIGITAL)
2046 has_audio = drm_detect_monitor_audio(edid);
Jani Nikula38ab8a22012-08-15 12:32:36 +03002047 kfree(edid);
Chris Wilson1aad7ac2011-02-09 18:46:58 +00002048
2049 return has_audio;
2050}
2051
Zhao Yakuice6feab2009-08-24 13:50:26 +08002052static int
2053intel_sdvo_set_property(struct drm_connector *connector,
2054 struct drm_property *property,
2055 uint64_t val)
2056{
Chris Wilsondf0e9242010-09-09 16:20:55 +01002057 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
Chris Wilson615fb932010-08-04 13:50:24 +01002058 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
Chris Wilsone953fd72011-02-21 22:23:52 +00002059 struct drm_i915_private *dev_priv = connector->dev->dev_private;
Zhao Yakuib9219c52009-09-10 15:45:46 +08002060 uint16_t temp_value;
Chris Wilson32aad862010-08-04 13:50:25 +01002061 uint8_t cmd;
2062 int ret;
Zhao Yakuice6feab2009-08-24 13:50:26 +08002063
Rob Clark662595d2012-10-11 20:36:04 -05002064 ret = drm_object_property_set_value(&connector->base, property, val);
Chris Wilson32aad862010-08-04 13:50:25 +01002065 if (ret)
2066 return ret;
Zhao Yakuice6feab2009-08-24 13:50:26 +08002067
Chris Wilson3f43c482011-05-12 22:17:24 +01002068 if (property == dev_priv->force_audio_property) {
Chris Wilson1aad7ac2011-02-09 18:46:58 +00002069 int i = val;
2070 bool has_audio;
2071
2072 if (i == intel_sdvo_connector->force_audio)
Chris Wilson7f36e7e2010-09-19 09:29:33 +01002073 return 0;
2074
Chris Wilson1aad7ac2011-02-09 18:46:58 +00002075 intel_sdvo_connector->force_audio = i;
Chris Wilson7f36e7e2010-09-19 09:29:33 +01002076
Daniel Vetterc3e5f672012-02-23 17:14:47 +01002077 if (i == HDMI_AUDIO_AUTO)
Chris Wilson1aad7ac2011-02-09 18:46:58 +00002078 has_audio = intel_sdvo_detect_hdmi_audio(connector);
2079 else
Daniel Vetterc3e5f672012-02-23 17:14:47 +01002080 has_audio = (i == HDMI_AUDIO_ON);
Chris Wilson1aad7ac2011-02-09 18:46:58 +00002081
2082 if (has_audio == intel_sdvo->has_hdmi_audio)
Chris Wilson7f36e7e2010-09-19 09:29:33 +01002083 return 0;
2084
Chris Wilson1aad7ac2011-02-09 18:46:58 +00002085 intel_sdvo->has_hdmi_audio = has_audio;
Chris Wilson7f36e7e2010-09-19 09:29:33 +01002086 goto done;
2087 }
2088
Chris Wilsone953fd72011-02-21 22:23:52 +00002089 if (property == dev_priv->broadcast_rgb_property) {
Daniel Vetterae4edb82013-04-22 17:07:23 +02002090 bool old_auto = intel_sdvo->color_range_auto;
2091 uint32_t old_range = intel_sdvo->color_range;
2092
Ville Syrjälä55bc60d2013-01-17 16:31:29 +02002093 switch (val) {
2094 case INTEL_BROADCAST_RGB_AUTO:
2095 intel_sdvo->color_range_auto = true;
2096 break;
2097 case INTEL_BROADCAST_RGB_FULL:
2098 intel_sdvo->color_range_auto = false;
2099 intel_sdvo->color_range = 0;
2100 break;
2101 case INTEL_BROADCAST_RGB_LIMITED:
2102 intel_sdvo->color_range_auto = false;
Paulo Zanoni4f3a8bc2013-02-19 16:21:47 -03002103 /* FIXME: this bit is only valid when using TMDS
2104 * encoding and 8 bit per color mode. */
2105 intel_sdvo->color_range = HDMI_COLOR_RANGE_16_235;
Ville Syrjälä55bc60d2013-01-17 16:31:29 +02002106 break;
2107 default:
2108 return -EINVAL;
2109 }
Daniel Vetterae4edb82013-04-22 17:07:23 +02002110
2111 if (old_auto == intel_sdvo->color_range_auto &&
2112 old_range == intel_sdvo->color_range)
2113 return 0;
2114
Zhao Yakuice6feab2009-08-24 13:50:26 +08002115 goto done;
2116 }
2117
Chris Wilsonc5521702010-08-04 13:50:28 +01002118#define CHECK_PROPERTY(name, NAME) \
2119 if (intel_sdvo_connector->name == property) { \
2120 if (intel_sdvo_connector->cur_##name == temp_value) return 0; \
2121 if (intel_sdvo_connector->max_##name < temp_value) return -EINVAL; \
2122 cmd = SDVO_CMD_SET_##NAME; \
2123 intel_sdvo_connector->cur_##name = temp_value; \
2124 goto set_value; \
2125 }
2126
2127 if (property == intel_sdvo_connector->tv_format) {
Chris Wilson32aad862010-08-04 13:50:25 +01002128 if (val >= TV_FORMAT_NUM)
2129 return -EINVAL;
2130
Chris Wilson40039752010-08-04 13:50:26 +01002131 if (intel_sdvo->tv_format_index ==
Chris Wilson615fb932010-08-04 13:50:24 +01002132 intel_sdvo_connector->tv_format_supported[val])
Chris Wilson32aad862010-08-04 13:50:25 +01002133 return 0;
Zhao Yakuice6feab2009-08-24 13:50:26 +08002134
Chris Wilson40039752010-08-04 13:50:26 +01002135 intel_sdvo->tv_format_index = intel_sdvo_connector->tv_format_supported[val];
Chris Wilsonc5521702010-08-04 13:50:28 +01002136 goto done;
Chris Wilson32aad862010-08-04 13:50:25 +01002137 } else if (IS_TV_OR_LVDS(intel_sdvo_connector)) {
Zhao Yakuib9219c52009-09-10 15:45:46 +08002138 temp_value = val;
Chris Wilsonc5521702010-08-04 13:50:28 +01002139 if (intel_sdvo_connector->left == property) {
Rob Clark662595d2012-10-11 20:36:04 -05002140 drm_object_property_set_value(&connector->base,
Chris Wilsonc5521702010-08-04 13:50:28 +01002141 intel_sdvo_connector->right, val);
Chris Wilson615fb932010-08-04 13:50:24 +01002142 if (intel_sdvo_connector->left_margin == temp_value)
Chris Wilson32aad862010-08-04 13:50:25 +01002143 return 0;
Zhao Yakuib9219c52009-09-10 15:45:46 +08002144
Chris Wilson615fb932010-08-04 13:50:24 +01002145 intel_sdvo_connector->left_margin = temp_value;
2146 intel_sdvo_connector->right_margin = temp_value;
2147 temp_value = intel_sdvo_connector->max_hscan -
Chris Wilsonc5521702010-08-04 13:50:28 +01002148 intel_sdvo_connector->left_margin;
Zhao Yakuib9219c52009-09-10 15:45:46 +08002149 cmd = SDVO_CMD_SET_OVERSCAN_H;
Chris Wilsonc5521702010-08-04 13:50:28 +01002150 goto set_value;
2151 } else if (intel_sdvo_connector->right == property) {
Rob Clark662595d2012-10-11 20:36:04 -05002152 drm_object_property_set_value(&connector->base,
Chris Wilsonc5521702010-08-04 13:50:28 +01002153 intel_sdvo_connector->left, val);
Chris Wilson615fb932010-08-04 13:50:24 +01002154 if (intel_sdvo_connector->right_margin == temp_value)
Chris Wilson32aad862010-08-04 13:50:25 +01002155 return 0;
Zhao Yakuib9219c52009-09-10 15:45:46 +08002156
Chris Wilson615fb932010-08-04 13:50:24 +01002157 intel_sdvo_connector->left_margin = temp_value;
2158 intel_sdvo_connector->right_margin = temp_value;
2159 temp_value = intel_sdvo_connector->max_hscan -
2160 intel_sdvo_connector->left_margin;
Zhao Yakuib9219c52009-09-10 15:45:46 +08002161 cmd = SDVO_CMD_SET_OVERSCAN_H;
Chris Wilsonc5521702010-08-04 13:50:28 +01002162 goto set_value;
2163 } else if (intel_sdvo_connector->top == property) {
Rob Clark662595d2012-10-11 20:36:04 -05002164 drm_object_property_set_value(&connector->base,
Chris Wilsonc5521702010-08-04 13:50:28 +01002165 intel_sdvo_connector->bottom, val);
Chris Wilson615fb932010-08-04 13:50:24 +01002166 if (intel_sdvo_connector->top_margin == temp_value)
Chris Wilson32aad862010-08-04 13:50:25 +01002167 return 0;
Zhao Yakuib9219c52009-09-10 15:45:46 +08002168
Chris Wilson615fb932010-08-04 13:50:24 +01002169 intel_sdvo_connector->top_margin = temp_value;
2170 intel_sdvo_connector->bottom_margin = temp_value;
2171 temp_value = intel_sdvo_connector->max_vscan -
Chris Wilsonc5521702010-08-04 13:50:28 +01002172 intel_sdvo_connector->top_margin;
Zhao Yakuib9219c52009-09-10 15:45:46 +08002173 cmd = SDVO_CMD_SET_OVERSCAN_V;
Chris Wilsonc5521702010-08-04 13:50:28 +01002174 goto set_value;
2175 } else if (intel_sdvo_connector->bottom == property) {
Rob Clark662595d2012-10-11 20:36:04 -05002176 drm_object_property_set_value(&connector->base,
Chris Wilsonc5521702010-08-04 13:50:28 +01002177 intel_sdvo_connector->top, val);
Chris Wilson615fb932010-08-04 13:50:24 +01002178 if (intel_sdvo_connector->bottom_margin == temp_value)
Chris Wilson32aad862010-08-04 13:50:25 +01002179 return 0;
2180
Chris Wilson615fb932010-08-04 13:50:24 +01002181 intel_sdvo_connector->top_margin = temp_value;
2182 intel_sdvo_connector->bottom_margin = temp_value;
2183 temp_value = intel_sdvo_connector->max_vscan -
Chris Wilsonc5521702010-08-04 13:50:28 +01002184 intel_sdvo_connector->top_margin;
Zhao Yakuib9219c52009-09-10 15:45:46 +08002185 cmd = SDVO_CMD_SET_OVERSCAN_V;
Chris Wilsonc5521702010-08-04 13:50:28 +01002186 goto set_value;
Zhao Yakuib9219c52009-09-10 15:45:46 +08002187 }
Chris Wilsonc5521702010-08-04 13:50:28 +01002188 CHECK_PROPERTY(hpos, HPOS)
2189 CHECK_PROPERTY(vpos, VPOS)
2190 CHECK_PROPERTY(saturation, SATURATION)
2191 CHECK_PROPERTY(contrast, CONTRAST)
2192 CHECK_PROPERTY(hue, HUE)
2193 CHECK_PROPERTY(brightness, BRIGHTNESS)
2194 CHECK_PROPERTY(sharpness, SHARPNESS)
2195 CHECK_PROPERTY(flicker_filter, FLICKER_FILTER)
2196 CHECK_PROPERTY(flicker_filter_2d, FLICKER_FILTER_2D)
2197 CHECK_PROPERTY(flicker_filter_adaptive, FLICKER_FILTER_ADAPTIVE)
2198 CHECK_PROPERTY(tv_chroma_filter, TV_CHROMA_FILTER)
2199 CHECK_PROPERTY(tv_luma_filter, TV_LUMA_FILTER)
Chris Wilsone0442182010-08-04 13:50:29 +01002200 CHECK_PROPERTY(dot_crawl, DOT_CRAWL)
Zhao Yakuib9219c52009-09-10 15:45:46 +08002201 }
Chris Wilsonc5521702010-08-04 13:50:28 +01002202
2203 return -EINVAL; /* unknown property */
2204
2205set_value:
2206 if (!intel_sdvo_set_value(intel_sdvo, cmd, &temp_value, 2))
2207 return -EIO;
2208
2209
2210done:
Chris Wilsonc0c36b942012-12-19 16:08:43 +00002211 if (intel_sdvo->base.base.crtc)
2212 intel_crtc_restore_mode(intel_sdvo->base.base.crtc);
Chris Wilsonc5521702010-08-04 13:50:28 +01002213
Chris Wilson32aad862010-08-04 13:50:25 +01002214 return 0;
Chris Wilsonc5521702010-08-04 13:50:28 +01002215#undef CHECK_PROPERTY
Zhao Yakuice6feab2009-08-24 13:50:26 +08002216}
2217
Jesse Barnes79e53942008-11-07 14:24:08 -08002218static const struct drm_connector_funcs intel_sdvo_connector_funcs = {
Daniel Vetterb2cabb02012-07-01 22:42:24 +02002219 .dpms = intel_sdvo_dpms,
Jesse Barnes79e53942008-11-07 14:24:08 -08002220 .detect = intel_sdvo_detect,
2221 .fill_modes = drm_helper_probe_single_connector_modes,
Zhao Yakuice6feab2009-08-24 13:50:26 +08002222 .set_property = intel_sdvo_set_property,
Jesse Barnes79e53942008-11-07 14:24:08 -08002223 .destroy = intel_sdvo_destroy,
2224};
2225
2226static const struct drm_connector_helper_funcs intel_sdvo_connector_helper_funcs = {
2227 .get_modes = intel_sdvo_get_modes,
2228 .mode_valid = intel_sdvo_mode_valid,
Chris Wilsondf0e9242010-09-09 16:20:55 +01002229 .best_encoder = intel_best_encoder,
Jesse Barnes79e53942008-11-07 14:24:08 -08002230};
2231
Hannes Ederb358d0a2008-12-18 21:18:47 +01002232static void intel_sdvo_enc_destroy(struct drm_encoder *encoder)
Jesse Barnes79e53942008-11-07 14:24:08 -08002233{
Daniel Vetter8aca63a2013-07-21 21:37:01 +02002234 struct intel_sdvo *intel_sdvo = to_sdvo(to_intel_encoder(encoder));
Zhenyu Wangd2a82a62010-03-29 21:22:55 +08002235
Chris Wilsonea5b2132010-08-04 13:50:23 +01002236 if (intel_sdvo->sdvo_lvds_fixed_mode != NULL)
Zhenyu Wangd2a82a62010-03-29 21:22:55 +08002237 drm_mode_destroy(encoder->dev,
Chris Wilsonea5b2132010-08-04 13:50:23 +01002238 intel_sdvo->sdvo_lvds_fixed_mode);
Zhenyu Wangd2a82a62010-03-29 21:22:55 +08002239
Chris Wilsone957d772010-09-24 12:52:03 +01002240 i2c_del_adapter(&intel_sdvo->ddc);
Chris Wilsonea5b2132010-08-04 13:50:23 +01002241 intel_encoder_destroy(encoder);
Jesse Barnes79e53942008-11-07 14:24:08 -08002242}
2243
2244static const struct drm_encoder_funcs intel_sdvo_enc_funcs = {
2245 .destroy = intel_sdvo_enc_destroy,
2246};
2247
Chris Wilsonb66d8422010-08-12 15:26:41 +01002248static void
2249intel_sdvo_guess_ddc_bus(struct intel_sdvo *sdvo)
2250{
2251 uint16_t mask = 0;
2252 unsigned int num_bits;
2253
2254 /* Make a mask of outputs less than or equal to our own priority in the
2255 * list.
2256 */
2257 switch (sdvo->controlled_output) {
2258 case SDVO_OUTPUT_LVDS1:
2259 mask |= SDVO_OUTPUT_LVDS1;
2260 case SDVO_OUTPUT_LVDS0:
2261 mask |= SDVO_OUTPUT_LVDS0;
2262 case SDVO_OUTPUT_TMDS1:
2263 mask |= SDVO_OUTPUT_TMDS1;
2264 case SDVO_OUTPUT_TMDS0:
2265 mask |= SDVO_OUTPUT_TMDS0;
2266 case SDVO_OUTPUT_RGB1:
2267 mask |= SDVO_OUTPUT_RGB1;
2268 case SDVO_OUTPUT_RGB0:
2269 mask |= SDVO_OUTPUT_RGB0;
2270 break;
2271 }
2272
2273 /* Count bits to find what number we are in the priority list. */
2274 mask &= sdvo->caps.output_flags;
2275 num_bits = hweight16(mask);
2276 /* If more than 3 outputs, default to DDC bus 3 for now. */
2277 if (num_bits > 3)
2278 num_bits = 3;
2279
2280 /* Corresponds to SDVO_CONTROL_BUS_DDCx */
2281 sdvo->ddc_bus = 1 << num_bits;
2282}
Jesse Barnes79e53942008-11-07 14:24:08 -08002283
Jesse Barnese2f0ba92009-02-02 15:11:52 -08002284/**
2285 * Choose the appropriate DDC bus for control bus switch command for this
2286 * SDVO output based on the controlled output.
2287 *
2288 * DDC bus number assignment is in a priority order of RGB outputs, then TMDS
2289 * outputs, then LVDS outputs.
2290 */
2291static void
Adam Jacksonb1083332010-04-23 16:07:40 -04002292intel_sdvo_select_ddc_bus(struct drm_i915_private *dev_priv,
Chris Wilsonea5b2132010-08-04 13:50:23 +01002293 struct intel_sdvo *sdvo, u32 reg)
Jesse Barnese2f0ba92009-02-02 15:11:52 -08002294{
Adam Jacksonb1083332010-04-23 16:07:40 -04002295 struct sdvo_device_mapping *mapping;
Jesse Barnese2f0ba92009-02-02 15:11:52 -08002296
Daniel Vettereef4eac2012-03-23 23:43:35 +01002297 if (sdvo->is_sdvob)
Adam Jacksonb1083332010-04-23 16:07:40 -04002298 mapping = &(dev_priv->sdvo_mappings[0]);
2299 else
2300 mapping = &(dev_priv->sdvo_mappings[1]);
Jesse Barnese2f0ba92009-02-02 15:11:52 -08002301
Chris Wilsonb66d8422010-08-12 15:26:41 +01002302 if (mapping->initialized)
2303 sdvo->ddc_bus = 1 << ((mapping->ddc_pin & 0xf0) >> 4);
2304 else
2305 intel_sdvo_guess_ddc_bus(sdvo);
Jesse Barnese2f0ba92009-02-02 15:11:52 -08002306}
2307
Chris Wilsone957d772010-09-24 12:52:03 +01002308static void
2309intel_sdvo_select_i2c_bus(struct drm_i915_private *dev_priv,
2310 struct intel_sdvo *sdvo, u32 reg)
2311{
2312 struct sdvo_device_mapping *mapping;
Adam Jackson46eb3032011-06-16 16:36:23 -04002313 u8 pin;
Chris Wilsone957d772010-09-24 12:52:03 +01002314
Daniel Vettereef4eac2012-03-23 23:43:35 +01002315 if (sdvo->is_sdvob)
Chris Wilsone957d772010-09-24 12:52:03 +01002316 mapping = &dev_priv->sdvo_mappings[0];
2317 else
2318 mapping = &dev_priv->sdvo_mappings[1];
2319
Jani Nikula6cb16122012-10-22 16:12:17 +03002320 if (mapping->initialized && intel_gmbus_is_port_valid(mapping->i2c_pin))
Chris Wilsone957d772010-09-24 12:52:03 +01002321 pin = mapping->i2c_pin;
Jani Nikula6cb16122012-10-22 16:12:17 +03002322 else
2323 pin = GMBUS_PORT_DPB;
Chris Wilsone957d772010-09-24 12:52:03 +01002324
Jani Nikula6cb16122012-10-22 16:12:17 +03002325 sdvo->i2c = intel_gmbus_get_adapter(dev_priv, pin);
2326
2327 /* With gmbus we should be able to drive sdvo i2c at 2MHz, but somehow
2328 * our code totally fails once we start using gmbus. Hence fall back to
2329 * bit banging for now. */
2330 intel_gmbus_force_bit(sdvo->i2c, true);
Chris Wilsone957d772010-09-24 12:52:03 +01002331}
2332
Jani Nikulafbfcc4f2012-10-22 16:12:18 +03002333/* undo any changes intel_sdvo_select_i2c_bus() did to sdvo->i2c */
2334static void
2335intel_sdvo_unselect_i2c_bus(struct intel_sdvo *sdvo)
2336{
2337 intel_gmbus_force_bit(sdvo->i2c, false);
Jesse Barnese2f0ba92009-02-02 15:11:52 -08002338}
2339
2340static bool
Chris Wilsone27d8532010-10-22 09:15:22 +01002341intel_sdvo_is_hdmi_connector(struct intel_sdvo *intel_sdvo, int device)
Jesse Barnese2f0ba92009-02-02 15:11:52 -08002342{
Chris Wilson97aaf912011-01-04 20:10:52 +00002343 return intel_sdvo_check_supp_encode(intel_sdvo);
Jesse Barnese2f0ba92009-02-02 15:11:52 -08002344}
2345
yakui_zhao714605e2009-05-31 17:18:07 +08002346static u8
Daniel Vettereef4eac2012-03-23 23:43:35 +01002347intel_sdvo_get_slave_addr(struct drm_device *dev, struct intel_sdvo *sdvo)
yakui_zhao714605e2009-05-31 17:18:07 +08002348{
2349 struct drm_i915_private *dev_priv = dev->dev_private;
2350 struct sdvo_device_mapping *my_mapping, *other_mapping;
2351
Daniel Vettereef4eac2012-03-23 23:43:35 +01002352 if (sdvo->is_sdvob) {
yakui_zhao714605e2009-05-31 17:18:07 +08002353 my_mapping = &dev_priv->sdvo_mappings[0];
2354 other_mapping = &dev_priv->sdvo_mappings[1];
2355 } else {
2356 my_mapping = &dev_priv->sdvo_mappings[1];
2357 other_mapping = &dev_priv->sdvo_mappings[0];
2358 }
2359
2360 /* If the BIOS described our SDVO device, take advantage of it. */
2361 if (my_mapping->slave_addr)
2362 return my_mapping->slave_addr;
2363
2364 /* If the BIOS only described a different SDVO device, use the
2365 * address that it isn't using.
2366 */
2367 if (other_mapping->slave_addr) {
2368 if (other_mapping->slave_addr == 0x70)
2369 return 0x72;
2370 else
2371 return 0x70;
2372 }
2373
2374 /* No SDVO device info is found for another DVO port,
2375 * so use mapping assumption we had before BIOS parsing.
2376 */
Daniel Vettereef4eac2012-03-23 23:43:35 +01002377 if (sdvo->is_sdvob)
yakui_zhao714605e2009-05-31 17:18:07 +08002378 return 0x70;
2379 else
2380 return 0x72;
2381}
2382
Imre Deak931c1c22014-02-11 17:12:51 +02002383static void
2384intel_sdvo_connector_unregister(struct intel_connector *intel_connector)
2385{
2386 struct drm_connector *drm_connector;
2387 struct intel_sdvo *sdvo_encoder;
2388
2389 drm_connector = &intel_connector->base;
2390 sdvo_encoder = intel_attached_sdvo(&intel_connector->base);
2391
2392 sysfs_remove_link(&drm_connector->kdev->kobj,
2393 sdvo_encoder->ddc.dev.kobj.name);
2394 intel_connector_unregister(intel_connector);
2395}
2396
Imre Deakc3934542014-02-11 17:12:50 +02002397static int
Chris Wilsondf0e9242010-09-09 16:20:55 +01002398intel_sdvo_connector_init(struct intel_sdvo_connector *connector,
2399 struct intel_sdvo *encoder)
Zhenyu Wang14571b42010-03-30 14:06:33 +08002400{
Imre Deakc3934542014-02-11 17:12:50 +02002401 struct drm_connector *drm_connector;
2402 int ret;
2403
2404 drm_connector = &connector->base.base;
2405 ret = drm_connector_init(encoder->base.base.dev,
2406 drm_connector,
Chris Wilsondf0e9242010-09-09 16:20:55 +01002407 &intel_sdvo_connector_funcs,
2408 connector->base.base.connector_type);
Imre Deakc3934542014-02-11 17:12:50 +02002409 if (ret < 0)
2410 return ret;
Zhao Yakui6070a4a2010-02-08 21:35:12 +08002411
Imre Deakc3934542014-02-11 17:12:50 +02002412 drm_connector_helper_add(drm_connector,
Chris Wilsondf0e9242010-09-09 16:20:55 +01002413 &intel_sdvo_connector_helper_funcs);
Zhenyu Wang14571b42010-03-30 14:06:33 +08002414
Peter Ross8f4839e2012-01-28 14:49:25 +01002415 connector->base.base.interlace_allowed = 1;
Chris Wilsondf0e9242010-09-09 16:20:55 +01002416 connector->base.base.doublescan_allowed = 0;
2417 connector->base.base.display_info.subpixel_order = SubPixelHorizontalRGB;
Daniel Vetter4ac41f42012-07-02 14:54:00 +02002418 connector->base.get_hw_state = intel_sdvo_connector_get_hw_state;
Imre Deak931c1c22014-02-11 17:12:51 +02002419 connector->base.unregister = intel_sdvo_connector_unregister;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002420
Chris Wilsondf0e9242010-09-09 16:20:55 +01002421 intel_connector_attach_encoder(&connector->base, &encoder->base);
Imre Deakc3934542014-02-11 17:12:50 +02002422 ret = drm_sysfs_connector_add(drm_connector);
2423 if (ret < 0)
2424 goto err1;
2425
Egbert Eich4d43e9b2014-04-11 19:07:44 +02002426 ret = sysfs_create_link(&drm_connector->kdev->kobj,
2427 &encoder->ddc.dev.kobj,
Imre Deak931c1c22014-02-11 17:12:51 +02002428 encoder->ddc.dev.kobj.name);
2429 if (ret < 0)
2430 goto err2;
2431
Imre Deakc3934542014-02-11 17:12:50 +02002432 return 0;
2433
Imre Deak931c1c22014-02-11 17:12:51 +02002434err2:
2435 drm_sysfs_connector_remove(drm_connector);
Imre Deakc3934542014-02-11 17:12:50 +02002436err1:
2437 drm_connector_cleanup(drm_connector);
2438
2439 return ret;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002440}
2441
Chris Wilson7f36e7e2010-09-19 09:29:33 +01002442static void
Ville Syrjälä55bc60d2013-01-17 16:31:29 +02002443intel_sdvo_add_hdmi_properties(struct intel_sdvo *intel_sdvo,
2444 struct intel_sdvo_connector *connector)
Chris Wilson7f36e7e2010-09-19 09:29:33 +01002445{
2446 struct drm_device *dev = connector->base.base.dev;
2447
Chris Wilson3f43c482011-05-12 22:17:24 +01002448 intel_attach_force_audio_property(&connector->base.base);
Ville Syrjälä55bc60d2013-01-17 16:31:29 +02002449 if (INTEL_INFO(dev)->gen >= 4 && IS_MOBILE(dev)) {
Chris Wilsone953fd72011-02-21 22:23:52 +00002450 intel_attach_broadcast_rgb_property(&connector->base.base);
Ville Syrjälä55bc60d2013-01-17 16:31:29 +02002451 intel_sdvo->color_range_auto = true;
2452 }
Chris Wilson7f36e7e2010-09-19 09:29:33 +01002453}
2454
Zhenyu Wang14571b42010-03-30 14:06:33 +08002455static bool
Chris Wilsonea5b2132010-08-04 13:50:23 +01002456intel_sdvo_dvi_init(struct intel_sdvo *intel_sdvo, int device)
Zhenyu Wang14571b42010-03-30 14:06:33 +08002457{
Chris Wilson4ef69c72010-09-09 15:14:28 +01002458 struct drm_encoder *encoder = &intel_sdvo->base.base;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002459 struct drm_connector *connector;
Simon Farnsworthcc68c812011-09-21 17:13:30 +01002460 struct intel_encoder *intel_encoder = to_intel_encoder(encoder);
Zhenyu Wang14571b42010-03-30 14:06:33 +08002461 struct intel_connector *intel_connector;
Chris Wilson615fb932010-08-04 13:50:24 +01002462 struct intel_sdvo_connector *intel_sdvo_connector;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002463
Chris Wilson46a3f4a2013-09-24 12:55:40 +01002464 DRM_DEBUG_KMS("initialising DVI device %d\n", device);
2465
Daniel Vetterb14c5672013-09-19 12:18:32 +02002466 intel_sdvo_connector = kzalloc(sizeof(*intel_sdvo_connector), GFP_KERNEL);
Chris Wilson615fb932010-08-04 13:50:24 +01002467 if (!intel_sdvo_connector)
Zhenyu Wang14571b42010-03-30 14:06:33 +08002468 return false;
2469
Zhenyu Wang14571b42010-03-30 14:06:33 +08002470 if (device == 0) {
Chris Wilsonea5b2132010-08-04 13:50:23 +01002471 intel_sdvo->controlled_output |= SDVO_OUTPUT_TMDS0;
Chris Wilson615fb932010-08-04 13:50:24 +01002472 intel_sdvo_connector->output_flag = SDVO_OUTPUT_TMDS0;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002473 } else if (device == 1) {
Chris Wilsonea5b2132010-08-04 13:50:23 +01002474 intel_sdvo->controlled_output |= SDVO_OUTPUT_TMDS1;
Chris Wilson615fb932010-08-04 13:50:24 +01002475 intel_sdvo_connector->output_flag = SDVO_OUTPUT_TMDS1;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002476 }
2477
Chris Wilson615fb932010-08-04 13:50:24 +01002478 intel_connector = &intel_sdvo_connector->base;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002479 connector = &intel_connector->base;
Jani Nikula5fa7ac92012-08-29 16:43:58 +03002480 if (intel_sdvo_get_hotplug_support(intel_sdvo) &
2481 intel_sdvo_connector->output_flag) {
Jani Nikula5fa7ac92012-08-29 16:43:58 +03002482 intel_sdvo->hotplug_active |= intel_sdvo_connector->output_flag;
Simon Farnsworthcc68c812011-09-21 17:13:30 +01002483 /* Some SDVO devices have one-shot hotplug interrupts.
2484 * Ensure that they get re-enabled when an interrupt happens.
2485 */
2486 intel_encoder->hot_plug = intel_sdvo_enable_hotplug;
2487 intel_sdvo_enable_hotplug(intel_encoder);
Jani Nikula5fa7ac92012-08-29 16:43:58 +03002488 } else {
Egbert Eich821450c2013-04-16 13:36:55 +02002489 intel_connector->polled = DRM_CONNECTOR_POLL_CONNECT | DRM_CONNECTOR_POLL_DISCONNECT;
Jani Nikula5fa7ac92012-08-29 16:43:58 +03002490 }
Zhenyu Wang14571b42010-03-30 14:06:33 +08002491 encoder->encoder_type = DRM_MODE_ENCODER_TMDS;
2492 connector->connector_type = DRM_MODE_CONNECTOR_DVID;
2493
Chris Wilsone27d8532010-10-22 09:15:22 +01002494 if (intel_sdvo_is_hdmi_connector(intel_sdvo, device)) {
Zhenyu Wang14571b42010-03-30 14:06:33 +08002495 connector->connector_type = DRM_MODE_CONNECTOR_HDMIA;
Chris Wilsone27d8532010-10-22 09:15:22 +01002496 intel_sdvo->is_hdmi = true;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002497 }
Zhenyu Wang14571b42010-03-30 14:06:33 +08002498
Imre Deakc3934542014-02-11 17:12:50 +02002499 if (intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo) < 0) {
2500 kfree(intel_sdvo_connector);
2501 return false;
2502 }
2503
Chris Wilsonf797d222010-12-23 09:43:48 +00002504 if (intel_sdvo->is_hdmi)
Ville Syrjälä55bc60d2013-01-17 16:31:29 +02002505 intel_sdvo_add_hdmi_properties(intel_sdvo, intel_sdvo_connector);
Zhenyu Wang14571b42010-03-30 14:06:33 +08002506
2507 return true;
2508}
2509
2510static bool
Chris Wilsonea5b2132010-08-04 13:50:23 +01002511intel_sdvo_tv_init(struct intel_sdvo *intel_sdvo, int type)
Zhenyu Wang14571b42010-03-30 14:06:33 +08002512{
Chris Wilson4ef69c72010-09-09 15:14:28 +01002513 struct drm_encoder *encoder = &intel_sdvo->base.base;
2514 struct drm_connector *connector;
2515 struct intel_connector *intel_connector;
2516 struct intel_sdvo_connector *intel_sdvo_connector;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002517
Chris Wilson46a3f4a2013-09-24 12:55:40 +01002518 DRM_DEBUG_KMS("initialising TV type %d\n", type);
2519
Daniel Vetterb14c5672013-09-19 12:18:32 +02002520 intel_sdvo_connector = kzalloc(sizeof(*intel_sdvo_connector), GFP_KERNEL);
Chris Wilson615fb932010-08-04 13:50:24 +01002521 if (!intel_sdvo_connector)
2522 return false;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002523
Chris Wilson615fb932010-08-04 13:50:24 +01002524 intel_connector = &intel_sdvo_connector->base;
Chris Wilson4ef69c72010-09-09 15:14:28 +01002525 connector = &intel_connector->base;
2526 encoder->encoder_type = DRM_MODE_ENCODER_TVDAC;
2527 connector->connector_type = DRM_MODE_CONNECTOR_SVIDEO;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002528
Chris Wilson4ef69c72010-09-09 15:14:28 +01002529 intel_sdvo->controlled_output |= type;
2530 intel_sdvo_connector->output_flag = type;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002531
Chris Wilson4ef69c72010-09-09 15:14:28 +01002532 intel_sdvo->is_tv = true;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002533
Imre Deakc3934542014-02-11 17:12:50 +02002534 if (intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo) < 0) {
2535 kfree(intel_sdvo_connector);
2536 return false;
2537 }
Zhenyu Wang14571b42010-03-30 14:06:33 +08002538
Chris Wilson4ef69c72010-09-09 15:14:28 +01002539 if (!intel_sdvo_tv_create_property(intel_sdvo, intel_sdvo_connector, type))
Chris Wilson32aad862010-08-04 13:50:25 +01002540 goto err;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002541
Chris Wilson4ef69c72010-09-09 15:14:28 +01002542 if (!intel_sdvo_create_enhance_property(intel_sdvo, intel_sdvo_connector))
Chris Wilson32aad862010-08-04 13:50:25 +01002543 goto err;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002544
Chris Wilson4ef69c72010-09-09 15:14:28 +01002545 return true;
Chris Wilson32aad862010-08-04 13:50:25 +01002546
2547err:
Paulo Zanonid9255d52013-09-26 20:05:59 -03002548 drm_sysfs_connector_remove(connector);
Chris Wilson123d5c02010-09-23 16:15:21 +01002549 intel_sdvo_destroy(connector);
Chris Wilson32aad862010-08-04 13:50:25 +01002550 return false;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002551}
2552
2553static bool
Chris Wilsonea5b2132010-08-04 13:50:23 +01002554intel_sdvo_analog_init(struct intel_sdvo *intel_sdvo, int device)
Zhenyu Wang14571b42010-03-30 14:06:33 +08002555{
Chris Wilson4ef69c72010-09-09 15:14:28 +01002556 struct drm_encoder *encoder = &intel_sdvo->base.base;
2557 struct drm_connector *connector;
2558 struct intel_connector *intel_connector;
2559 struct intel_sdvo_connector *intel_sdvo_connector;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002560
Chris Wilson46a3f4a2013-09-24 12:55:40 +01002561 DRM_DEBUG_KMS("initialising analog device %d\n", device);
2562
Daniel Vetterb14c5672013-09-19 12:18:32 +02002563 intel_sdvo_connector = kzalloc(sizeof(*intel_sdvo_connector), GFP_KERNEL);
Chris Wilson615fb932010-08-04 13:50:24 +01002564 if (!intel_sdvo_connector)
2565 return false;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002566
Chris Wilson615fb932010-08-04 13:50:24 +01002567 intel_connector = &intel_sdvo_connector->base;
2568 connector = &intel_connector->base;
Egbert Eich821450c2013-04-16 13:36:55 +02002569 intel_connector->polled = DRM_CONNECTOR_POLL_CONNECT;
Chris Wilson4ef69c72010-09-09 15:14:28 +01002570 encoder->encoder_type = DRM_MODE_ENCODER_DAC;
2571 connector->connector_type = DRM_MODE_CONNECTOR_VGA;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002572
Chris Wilson4ef69c72010-09-09 15:14:28 +01002573 if (device == 0) {
2574 intel_sdvo->controlled_output |= SDVO_OUTPUT_RGB0;
2575 intel_sdvo_connector->output_flag = SDVO_OUTPUT_RGB0;
2576 } else if (device == 1) {
2577 intel_sdvo->controlled_output |= SDVO_OUTPUT_RGB1;
2578 intel_sdvo_connector->output_flag = SDVO_OUTPUT_RGB1;
2579 }
Zhenyu Wang14571b42010-03-30 14:06:33 +08002580
Imre Deakc3934542014-02-11 17:12:50 +02002581 if (intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo) < 0) {
2582 kfree(intel_sdvo_connector);
2583 return false;
2584 }
2585
Chris Wilson4ef69c72010-09-09 15:14:28 +01002586 return true;
2587}
2588
2589static bool
2590intel_sdvo_lvds_init(struct intel_sdvo *intel_sdvo, int device)
2591{
2592 struct drm_encoder *encoder = &intel_sdvo->base.base;
2593 struct drm_connector *connector;
2594 struct intel_connector *intel_connector;
2595 struct intel_sdvo_connector *intel_sdvo_connector;
2596
Chris Wilson46a3f4a2013-09-24 12:55:40 +01002597 DRM_DEBUG_KMS("initialising LVDS device %d\n", device);
2598
Daniel Vetterb14c5672013-09-19 12:18:32 +02002599 intel_sdvo_connector = kzalloc(sizeof(*intel_sdvo_connector), GFP_KERNEL);
Chris Wilson4ef69c72010-09-09 15:14:28 +01002600 if (!intel_sdvo_connector)
2601 return false;
2602
2603 intel_connector = &intel_sdvo_connector->base;
2604 connector = &intel_connector->base;
2605 encoder->encoder_type = DRM_MODE_ENCODER_LVDS;
2606 connector->connector_type = DRM_MODE_CONNECTOR_LVDS;
2607
2608 if (device == 0) {
2609 intel_sdvo->controlled_output |= SDVO_OUTPUT_LVDS0;
2610 intel_sdvo_connector->output_flag = SDVO_OUTPUT_LVDS0;
2611 } else if (device == 1) {
2612 intel_sdvo->controlled_output |= SDVO_OUTPUT_LVDS1;
2613 intel_sdvo_connector->output_flag = SDVO_OUTPUT_LVDS1;
2614 }
2615
Imre Deakc3934542014-02-11 17:12:50 +02002616 if (intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo) < 0) {
2617 kfree(intel_sdvo_connector);
2618 return false;
2619 }
2620
Chris Wilson4ef69c72010-09-09 15:14:28 +01002621 if (!intel_sdvo_create_enhance_property(intel_sdvo, intel_sdvo_connector))
Chris Wilson32aad862010-08-04 13:50:25 +01002622 goto err;
2623
2624 return true;
2625
2626err:
Paulo Zanonid9255d52013-09-26 20:05:59 -03002627 drm_sysfs_connector_remove(connector);
Chris Wilson123d5c02010-09-23 16:15:21 +01002628 intel_sdvo_destroy(connector);
Chris Wilson32aad862010-08-04 13:50:25 +01002629 return false;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002630}
Zhao Yakui6070a4a2010-02-08 21:35:12 +08002631
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002632static bool
Chris Wilsonea5b2132010-08-04 13:50:23 +01002633intel_sdvo_output_setup(struct intel_sdvo *intel_sdvo, uint16_t flags)
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002634{
Chris Wilsonea5b2132010-08-04 13:50:23 +01002635 intel_sdvo->is_tv = false;
Chris Wilsonea5b2132010-08-04 13:50:23 +01002636 intel_sdvo->is_lvds = false;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002637
Zhenyu Wang14571b42010-03-30 14:06:33 +08002638 /* SDVO requires XXX1 function may not exist unless it has XXX0 function.*/
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002639
Zhenyu Wang14571b42010-03-30 14:06:33 +08002640 if (flags & SDVO_OUTPUT_TMDS0)
Chris Wilsonea5b2132010-08-04 13:50:23 +01002641 if (!intel_sdvo_dvi_init(intel_sdvo, 0))
Zhenyu Wang14571b42010-03-30 14:06:33 +08002642 return false;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002643
Zhenyu Wang14571b42010-03-30 14:06:33 +08002644 if ((flags & SDVO_TMDS_MASK) == SDVO_TMDS_MASK)
Chris Wilsonea5b2132010-08-04 13:50:23 +01002645 if (!intel_sdvo_dvi_init(intel_sdvo, 1))
Zhenyu Wang14571b42010-03-30 14:06:33 +08002646 return false;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002647
Zhenyu Wang14571b42010-03-30 14:06:33 +08002648 /* TV has no XXX1 function block */
Zhenyu Wanga1f4b7ff2010-03-29 23:16:13 +08002649 if (flags & SDVO_OUTPUT_SVID0)
Chris Wilsonea5b2132010-08-04 13:50:23 +01002650 if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_SVID0))
Zhenyu Wang14571b42010-03-30 14:06:33 +08002651 return false;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002652
Zhenyu Wang14571b42010-03-30 14:06:33 +08002653 if (flags & SDVO_OUTPUT_CVBS0)
Chris Wilsonea5b2132010-08-04 13:50:23 +01002654 if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_CVBS0))
Zhenyu Wang14571b42010-03-30 14:06:33 +08002655 return false;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002656
Chris Wilsona0b1c7a2011-09-30 22:56:41 +01002657 if (flags & SDVO_OUTPUT_YPRPB0)
2658 if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_YPRPB0))
2659 return false;
2660
Zhenyu Wang14571b42010-03-30 14:06:33 +08002661 if (flags & SDVO_OUTPUT_RGB0)
Chris Wilsonea5b2132010-08-04 13:50:23 +01002662 if (!intel_sdvo_analog_init(intel_sdvo, 0))
Zhenyu Wang14571b42010-03-30 14:06:33 +08002663 return false;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002664
Zhenyu Wang14571b42010-03-30 14:06:33 +08002665 if ((flags & SDVO_RGB_MASK) == SDVO_RGB_MASK)
Chris Wilsonea5b2132010-08-04 13:50:23 +01002666 if (!intel_sdvo_analog_init(intel_sdvo, 1))
Zhenyu Wang14571b42010-03-30 14:06:33 +08002667 return false;
Zhao Yakui2dd87382010-01-27 16:32:46 +08002668
Zhenyu Wang14571b42010-03-30 14:06:33 +08002669 if (flags & SDVO_OUTPUT_LVDS0)
Chris Wilsonea5b2132010-08-04 13:50:23 +01002670 if (!intel_sdvo_lvds_init(intel_sdvo, 0))
Zhenyu Wang14571b42010-03-30 14:06:33 +08002671 return false;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002672
Zhenyu Wang14571b42010-03-30 14:06:33 +08002673 if ((flags & SDVO_LVDS_MASK) == SDVO_LVDS_MASK)
Chris Wilsonea5b2132010-08-04 13:50:23 +01002674 if (!intel_sdvo_lvds_init(intel_sdvo, 1))
Zhenyu Wang14571b42010-03-30 14:06:33 +08002675 return false;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002676
Zhenyu Wang14571b42010-03-30 14:06:33 +08002677 if ((flags & SDVO_OUTPUT_MASK) == 0) {
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002678 unsigned char bytes[2];
2679
Chris Wilsonea5b2132010-08-04 13:50:23 +01002680 intel_sdvo->controlled_output = 0;
2681 memcpy(bytes, &intel_sdvo->caps.output_flags, 2);
Dave Airlie51c8b402009-08-20 13:38:04 +10002682 DRM_DEBUG_KMS("%s: Unknown SDVO output type (0x%02x%02x)\n",
Chris Wilsonea5b2132010-08-04 13:50:23 +01002683 SDVO_NAME(intel_sdvo),
Dave Airlie51c8b402009-08-20 13:38:04 +10002684 bytes[0], bytes[1]);
Zhenyu Wang14571b42010-03-30 14:06:33 +08002685 return false;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002686 }
Jesse Barnes27f82272011-09-02 12:54:37 -07002687 intel_sdvo->base.crtc_mask = (1 << 0) | (1 << 1) | (1 << 2);
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002688
Zhenyu Wang14571b42010-03-30 14:06:33 +08002689 return true;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002690}
2691
Jani Nikulad0ddfbd2012-11-12 18:31:35 +02002692static void intel_sdvo_output_cleanup(struct intel_sdvo *intel_sdvo)
2693{
2694 struct drm_device *dev = intel_sdvo->base.base.dev;
2695 struct drm_connector *connector, *tmp;
2696
2697 list_for_each_entry_safe(connector, tmp,
2698 &dev->mode_config.connector_list, head) {
Paulo Zanonid9255d52013-09-26 20:05:59 -03002699 if (intel_attached_encoder(connector) == &intel_sdvo->base) {
2700 drm_sysfs_connector_remove(connector);
Jani Nikulad0ddfbd2012-11-12 18:31:35 +02002701 intel_sdvo_destroy(connector);
Paulo Zanonid9255d52013-09-26 20:05:59 -03002702 }
Jani Nikulad0ddfbd2012-11-12 18:31:35 +02002703 }
2704}
2705
Chris Wilson32aad862010-08-04 13:50:25 +01002706static bool intel_sdvo_tv_create_property(struct intel_sdvo *intel_sdvo,
2707 struct intel_sdvo_connector *intel_sdvo_connector,
2708 int type)
Zhao Yakuice6feab2009-08-24 13:50:26 +08002709{
Chris Wilson4ef69c72010-09-09 15:14:28 +01002710 struct drm_device *dev = intel_sdvo->base.base.dev;
Zhao Yakuice6feab2009-08-24 13:50:26 +08002711 struct intel_sdvo_tv_format format;
2712 uint32_t format_map, i;
Zhao Yakuice6feab2009-08-24 13:50:26 +08002713
Chris Wilson32aad862010-08-04 13:50:25 +01002714 if (!intel_sdvo_set_target_output(intel_sdvo, type))
2715 return false;
Zhao Yakuice6feab2009-08-24 13:50:26 +08002716
Chris Wilson1a3665c2011-01-25 13:59:37 +00002717 BUILD_BUG_ON(sizeof(format) != 6);
Chris Wilson32aad862010-08-04 13:50:25 +01002718 if (!intel_sdvo_get_value(intel_sdvo,
2719 SDVO_CMD_GET_SUPPORTED_TV_FORMATS,
2720 &format, sizeof(format)))
2721 return false;
Zhao Yakuice6feab2009-08-24 13:50:26 +08002722
Chris Wilson32aad862010-08-04 13:50:25 +01002723 memcpy(&format_map, &format, min(sizeof(format_map), sizeof(format)));
Zhao Yakuice6feab2009-08-24 13:50:26 +08002724
2725 if (format_map == 0)
Chris Wilson32aad862010-08-04 13:50:25 +01002726 return false;
Zhao Yakuice6feab2009-08-24 13:50:26 +08002727
Chris Wilson615fb932010-08-04 13:50:24 +01002728 intel_sdvo_connector->format_supported_num = 0;
Zhao Yakuice6feab2009-08-24 13:50:26 +08002729 for (i = 0 ; i < TV_FORMAT_NUM; i++)
Chris Wilson40039752010-08-04 13:50:26 +01002730 if (format_map & (1 << i))
2731 intel_sdvo_connector->tv_format_supported[intel_sdvo_connector->format_supported_num++] = i;
Zhao Yakuice6feab2009-08-24 13:50:26 +08002732
2733
Chris Wilsonc5521702010-08-04 13:50:28 +01002734 intel_sdvo_connector->tv_format =
Chris Wilson32aad862010-08-04 13:50:25 +01002735 drm_property_create(dev, DRM_MODE_PROP_ENUM,
2736 "mode", intel_sdvo_connector->format_supported_num);
Chris Wilsonc5521702010-08-04 13:50:28 +01002737 if (!intel_sdvo_connector->tv_format)
Chris Wilsonfcc8d672010-08-04 13:50:27 +01002738 return false;
Zhao Yakuice6feab2009-08-24 13:50:26 +08002739
Chris Wilson615fb932010-08-04 13:50:24 +01002740 for (i = 0; i < intel_sdvo_connector->format_supported_num; i++)
Zhao Yakuice6feab2009-08-24 13:50:26 +08002741 drm_property_add_enum(
Chris Wilsonc5521702010-08-04 13:50:28 +01002742 intel_sdvo_connector->tv_format, i,
Chris Wilson40039752010-08-04 13:50:26 +01002743 i, tv_format_names[intel_sdvo_connector->tv_format_supported[i]]);
Zhao Yakuice6feab2009-08-24 13:50:26 +08002744
Chris Wilson40039752010-08-04 13:50:26 +01002745 intel_sdvo->tv_format_index = intel_sdvo_connector->tv_format_supported[0];
Rob Clark662595d2012-10-11 20:36:04 -05002746 drm_object_attach_property(&intel_sdvo_connector->base.base.base,
Chris Wilsonc5521702010-08-04 13:50:28 +01002747 intel_sdvo_connector->tv_format, 0);
Chris Wilson32aad862010-08-04 13:50:25 +01002748 return true;
Zhao Yakuice6feab2009-08-24 13:50:26 +08002749
2750}
2751
Chris Wilsonc5521702010-08-04 13:50:28 +01002752#define ENHANCEMENT(name, NAME) do { \
2753 if (enhancements.name) { \
2754 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_MAX_##NAME, &data_value, 4) || \
2755 !intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_##NAME, &response, 2)) \
2756 return false; \
2757 intel_sdvo_connector->max_##name = data_value[0]; \
2758 intel_sdvo_connector->cur_##name = response; \
2759 intel_sdvo_connector->name = \
Sascha Hauerd9bc3c02012-02-06 10:58:18 +01002760 drm_property_create_range(dev, 0, #name, 0, data_value[0]); \
Chris Wilsonc5521702010-08-04 13:50:28 +01002761 if (!intel_sdvo_connector->name) return false; \
Rob Clark662595d2012-10-11 20:36:04 -05002762 drm_object_attach_property(&connector->base, \
Chris Wilsonc5521702010-08-04 13:50:28 +01002763 intel_sdvo_connector->name, \
2764 intel_sdvo_connector->cur_##name); \
2765 DRM_DEBUG_KMS(#name ": max %d, default %d, current %d\n", \
2766 data_value[0], data_value[1], response); \
2767 } \
Akshay Joshi0206e352011-08-16 15:34:10 -04002768} while (0)
Chris Wilsonc5521702010-08-04 13:50:28 +01002769
2770static bool
2771intel_sdvo_create_enhance_property_tv(struct intel_sdvo *intel_sdvo,
2772 struct intel_sdvo_connector *intel_sdvo_connector,
2773 struct intel_sdvo_enhancements_reply enhancements)
Zhao Yakuib9219c52009-09-10 15:45:46 +08002774{
Chris Wilson4ef69c72010-09-09 15:14:28 +01002775 struct drm_device *dev = intel_sdvo->base.base.dev;
Chris Wilson32aad862010-08-04 13:50:25 +01002776 struct drm_connector *connector = &intel_sdvo_connector->base.base;
Zhao Yakuib9219c52009-09-10 15:45:46 +08002777 uint16_t response, data_value[2];
2778
Chris Wilsonc5521702010-08-04 13:50:28 +01002779 /* when horizontal overscan is supported, Add the left/right property */
2780 if (enhancements.overscan_h) {
2781 if (!intel_sdvo_get_value(intel_sdvo,
2782 SDVO_CMD_GET_MAX_OVERSCAN_H,
2783 &data_value, 4))
2784 return false;
2785
2786 if (!intel_sdvo_get_value(intel_sdvo,
2787 SDVO_CMD_GET_OVERSCAN_H,
2788 &response, 2))
2789 return false;
2790
2791 intel_sdvo_connector->max_hscan = data_value[0];
2792 intel_sdvo_connector->left_margin = data_value[0] - response;
2793 intel_sdvo_connector->right_margin = intel_sdvo_connector->left_margin;
2794 intel_sdvo_connector->left =
Sascha Hauerd9bc3c02012-02-06 10:58:18 +01002795 drm_property_create_range(dev, 0, "left_margin", 0, data_value[0]);
Chris Wilsonc5521702010-08-04 13:50:28 +01002796 if (!intel_sdvo_connector->left)
2797 return false;
2798
Rob Clark662595d2012-10-11 20:36:04 -05002799 drm_object_attach_property(&connector->base,
Chris Wilsonc5521702010-08-04 13:50:28 +01002800 intel_sdvo_connector->left,
2801 intel_sdvo_connector->left_margin);
2802
2803 intel_sdvo_connector->right =
Sascha Hauerd9bc3c02012-02-06 10:58:18 +01002804 drm_property_create_range(dev, 0, "right_margin", 0, data_value[0]);
Chris Wilsonc5521702010-08-04 13:50:28 +01002805 if (!intel_sdvo_connector->right)
2806 return false;
2807
Rob Clark662595d2012-10-11 20:36:04 -05002808 drm_object_attach_property(&connector->base,
Chris Wilsonc5521702010-08-04 13:50:28 +01002809 intel_sdvo_connector->right,
2810 intel_sdvo_connector->right_margin);
2811 DRM_DEBUG_KMS("h_overscan: max %d, "
2812 "default %d, current %d\n",
2813 data_value[0], data_value[1], response);
2814 }
2815
2816 if (enhancements.overscan_v) {
2817 if (!intel_sdvo_get_value(intel_sdvo,
2818 SDVO_CMD_GET_MAX_OVERSCAN_V,
2819 &data_value, 4))
2820 return false;
2821
2822 if (!intel_sdvo_get_value(intel_sdvo,
2823 SDVO_CMD_GET_OVERSCAN_V,
2824 &response, 2))
2825 return false;
2826
2827 intel_sdvo_connector->max_vscan = data_value[0];
2828 intel_sdvo_connector->top_margin = data_value[0] - response;
2829 intel_sdvo_connector->bottom_margin = intel_sdvo_connector->top_margin;
2830 intel_sdvo_connector->top =
Sascha Hauerd9bc3c02012-02-06 10:58:18 +01002831 drm_property_create_range(dev, 0,
2832 "top_margin", 0, data_value[0]);
Chris Wilsonc5521702010-08-04 13:50:28 +01002833 if (!intel_sdvo_connector->top)
2834 return false;
2835
Rob Clark662595d2012-10-11 20:36:04 -05002836 drm_object_attach_property(&connector->base,
Chris Wilsonc5521702010-08-04 13:50:28 +01002837 intel_sdvo_connector->top,
2838 intel_sdvo_connector->top_margin);
2839
2840 intel_sdvo_connector->bottom =
Sascha Hauerd9bc3c02012-02-06 10:58:18 +01002841 drm_property_create_range(dev, 0,
2842 "bottom_margin", 0, data_value[0]);
Chris Wilsonc5521702010-08-04 13:50:28 +01002843 if (!intel_sdvo_connector->bottom)
2844 return false;
2845
Rob Clark662595d2012-10-11 20:36:04 -05002846 drm_object_attach_property(&connector->base,
Chris Wilsonc5521702010-08-04 13:50:28 +01002847 intel_sdvo_connector->bottom,
2848 intel_sdvo_connector->bottom_margin);
2849 DRM_DEBUG_KMS("v_overscan: max %d, "
2850 "default %d, current %d\n",
2851 data_value[0], data_value[1], response);
2852 }
2853
2854 ENHANCEMENT(hpos, HPOS);
2855 ENHANCEMENT(vpos, VPOS);
2856 ENHANCEMENT(saturation, SATURATION);
2857 ENHANCEMENT(contrast, CONTRAST);
2858 ENHANCEMENT(hue, HUE);
2859 ENHANCEMENT(sharpness, SHARPNESS);
2860 ENHANCEMENT(brightness, BRIGHTNESS);
2861 ENHANCEMENT(flicker_filter, FLICKER_FILTER);
2862 ENHANCEMENT(flicker_filter_adaptive, FLICKER_FILTER_ADAPTIVE);
2863 ENHANCEMENT(flicker_filter_2d, FLICKER_FILTER_2D);
2864 ENHANCEMENT(tv_chroma_filter, TV_CHROMA_FILTER);
2865 ENHANCEMENT(tv_luma_filter, TV_LUMA_FILTER);
2866
Chris Wilsone0442182010-08-04 13:50:29 +01002867 if (enhancements.dot_crawl) {
2868 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_DOT_CRAWL, &response, 2))
2869 return false;
2870
2871 intel_sdvo_connector->max_dot_crawl = 1;
2872 intel_sdvo_connector->cur_dot_crawl = response & 0x1;
2873 intel_sdvo_connector->dot_crawl =
Sascha Hauerd9bc3c02012-02-06 10:58:18 +01002874 drm_property_create_range(dev, 0, "dot_crawl", 0, 1);
Chris Wilsone0442182010-08-04 13:50:29 +01002875 if (!intel_sdvo_connector->dot_crawl)
2876 return false;
2877
Rob Clark662595d2012-10-11 20:36:04 -05002878 drm_object_attach_property(&connector->base,
Chris Wilsone0442182010-08-04 13:50:29 +01002879 intel_sdvo_connector->dot_crawl,
2880 intel_sdvo_connector->cur_dot_crawl);
2881 DRM_DEBUG_KMS("dot crawl: current %d\n", response);
2882 }
2883
Chris Wilsonc5521702010-08-04 13:50:28 +01002884 return true;
2885}
2886
2887static bool
2888intel_sdvo_create_enhance_property_lvds(struct intel_sdvo *intel_sdvo,
2889 struct intel_sdvo_connector *intel_sdvo_connector,
2890 struct intel_sdvo_enhancements_reply enhancements)
2891{
Chris Wilson4ef69c72010-09-09 15:14:28 +01002892 struct drm_device *dev = intel_sdvo->base.base.dev;
Chris Wilsonc5521702010-08-04 13:50:28 +01002893 struct drm_connector *connector = &intel_sdvo_connector->base.base;
2894 uint16_t response, data_value[2];
2895
2896 ENHANCEMENT(brightness, BRIGHTNESS);
2897
2898 return true;
2899}
2900#undef ENHANCEMENT
2901
2902static bool intel_sdvo_create_enhance_property(struct intel_sdvo *intel_sdvo,
2903 struct intel_sdvo_connector *intel_sdvo_connector)
2904{
2905 union {
2906 struct intel_sdvo_enhancements_reply reply;
2907 uint16_t response;
2908 } enhancements;
2909
Chris Wilson1a3665c2011-01-25 13:59:37 +00002910 BUILD_BUG_ON(sizeof(enhancements) != 2);
2911
Chris Wilsoncf9a2f32010-09-23 16:17:33 +01002912 enhancements.response = 0;
2913 intel_sdvo_get_value(intel_sdvo,
2914 SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS,
2915 &enhancements, sizeof(enhancements));
Chris Wilsonc5521702010-08-04 13:50:28 +01002916 if (enhancements.response == 0) {
Zhao Yakuib9219c52009-09-10 15:45:46 +08002917 DRM_DEBUG_KMS("No enhancement is supported\n");
Chris Wilson32aad862010-08-04 13:50:25 +01002918 return true;
Zhao Yakuib9219c52009-09-10 15:45:46 +08002919 }
Chris Wilson32aad862010-08-04 13:50:25 +01002920
Chris Wilsonc5521702010-08-04 13:50:28 +01002921 if (IS_TV(intel_sdvo_connector))
2922 return intel_sdvo_create_enhance_property_tv(intel_sdvo, intel_sdvo_connector, enhancements.reply);
Akshay Joshi0206e352011-08-16 15:34:10 -04002923 else if (IS_LVDS(intel_sdvo_connector))
Chris Wilsonc5521702010-08-04 13:50:28 +01002924 return intel_sdvo_create_enhance_property_lvds(intel_sdvo, intel_sdvo_connector, enhancements.reply);
2925 else
2926 return true;
Chris Wilsone957d772010-09-24 12:52:03 +01002927}
Chris Wilson32aad862010-08-04 13:50:25 +01002928
Chris Wilsone957d772010-09-24 12:52:03 +01002929static int intel_sdvo_ddc_proxy_xfer(struct i2c_adapter *adapter,
2930 struct i2c_msg *msgs,
2931 int num)
2932{
2933 struct intel_sdvo *sdvo = adapter->algo_data;
2934
2935 if (!intel_sdvo_set_control_bus_switch(sdvo, sdvo->ddc_bus))
2936 return -EIO;
2937
2938 return sdvo->i2c->algo->master_xfer(sdvo->i2c, msgs, num);
2939}
2940
2941static u32 intel_sdvo_ddc_proxy_func(struct i2c_adapter *adapter)
2942{
2943 struct intel_sdvo *sdvo = adapter->algo_data;
2944 return sdvo->i2c->algo->functionality(sdvo->i2c);
2945}
2946
2947static const struct i2c_algorithm intel_sdvo_ddc_proxy = {
2948 .master_xfer = intel_sdvo_ddc_proxy_xfer,
2949 .functionality = intel_sdvo_ddc_proxy_func
2950};
2951
2952static bool
2953intel_sdvo_init_ddc_proxy(struct intel_sdvo *sdvo,
2954 struct drm_device *dev)
2955{
2956 sdvo->ddc.owner = THIS_MODULE;
2957 sdvo->ddc.class = I2C_CLASS_DDC;
2958 snprintf(sdvo->ddc.name, I2C_NAME_SIZE, "SDVO DDC proxy");
2959 sdvo->ddc.dev.parent = &dev->pdev->dev;
2960 sdvo->ddc.algo_data = sdvo;
2961 sdvo->ddc.algo = &intel_sdvo_ddc_proxy;
2962
2963 return i2c_add_adapter(&sdvo->ddc) == 0;
Zhao Yakuib9219c52009-09-10 15:45:46 +08002964}
2965
Daniel Vettereef4eac2012-03-23 23:43:35 +01002966bool intel_sdvo_init(struct drm_device *dev, uint32_t sdvo_reg, bool is_sdvob)
Jesse Barnes79e53942008-11-07 14:24:08 -08002967{
Jesse Barnesb01f2c32009-12-11 11:07:17 -08002968 struct drm_i915_private *dev_priv = dev->dev_private;
Eric Anholt21d40d32010-03-25 11:11:14 -07002969 struct intel_encoder *intel_encoder;
Chris Wilsonea5b2132010-08-04 13:50:23 +01002970 struct intel_sdvo *intel_sdvo;
Jesse Barnes79e53942008-11-07 14:24:08 -08002971 int i;
Daniel Vetterb14c5672013-09-19 12:18:32 +02002972 intel_sdvo = kzalloc(sizeof(*intel_sdvo), GFP_KERNEL);
Chris Wilsonea5b2132010-08-04 13:50:23 +01002973 if (!intel_sdvo)
Eric Anholt7d573822009-01-02 13:33:00 -08002974 return false;
Jesse Barnes79e53942008-11-07 14:24:08 -08002975
Chris Wilson56184e32011-05-17 14:03:50 +01002976 intel_sdvo->sdvo_reg = sdvo_reg;
Daniel Vettereef4eac2012-03-23 23:43:35 +01002977 intel_sdvo->is_sdvob = is_sdvob;
2978 intel_sdvo->slave_addr = intel_sdvo_get_slave_addr(dev, intel_sdvo) >> 1;
Chris Wilson56184e32011-05-17 14:03:50 +01002979 intel_sdvo_select_i2c_bus(dev_priv, intel_sdvo, sdvo_reg);
Jani Nikulafbfcc4f2012-10-22 16:12:18 +03002980 if (!intel_sdvo_init_ddc_proxy(intel_sdvo, dev))
2981 goto err_i2c_bus;
Chris Wilsone957d772010-09-24 12:52:03 +01002982
Chris Wilson56184e32011-05-17 14:03:50 +01002983 /* encoder type will be decided later */
Chris Wilsonea5b2132010-08-04 13:50:23 +01002984 intel_encoder = &intel_sdvo->base;
Eric Anholt21d40d32010-03-25 11:11:14 -07002985 intel_encoder->type = INTEL_OUTPUT_SDVO;
Chris Wilson373a3cf2010-09-15 12:03:59 +01002986 drm_encoder_init(dev, &intel_encoder->base, &intel_sdvo_enc_funcs, 0);
Jesse Barnes79e53942008-11-07 14:24:08 -08002987
Jesse Barnes79e53942008-11-07 14:24:08 -08002988 /* Read the regs to test if we can talk to the device */
2989 for (i = 0; i < 0x40; i++) {
Chris Wilsonf899fc62010-07-20 15:44:45 -07002990 u8 byte;
2991
2992 if (!intel_sdvo_read_byte(intel_sdvo, i, &byte)) {
Daniel Vettereef4eac2012-03-23 23:43:35 +01002993 DRM_DEBUG_KMS("No SDVO device found on %s\n",
2994 SDVO_NAME(intel_sdvo));
Chris Wilsonf899fc62010-07-20 15:44:45 -07002995 goto err;
Jesse Barnes79e53942008-11-07 14:24:08 -08002996 }
2997 }
2998
Daniel Vetter6cc5f342013-03-27 00:44:53 +01002999 intel_encoder->compute_config = intel_sdvo_compute_config;
Daniel Vetterce22c322012-07-01 15:31:04 +02003000 intel_encoder->disable = intel_disable_sdvo;
Daniel Vetter192d47a2014-04-24 23:54:45 +02003001 intel_encoder->pre_enable = intel_sdvo_pre_enable;
Daniel Vetterce22c322012-07-01 15:31:04 +02003002 intel_encoder->enable = intel_enable_sdvo;
Daniel Vetter4ac41f42012-07-02 14:54:00 +02003003 intel_encoder->get_hw_state = intel_sdvo_get_hw_state;
Jesse Barnes045ac3b2013-05-14 17:08:26 -07003004 intel_encoder->get_config = intel_sdvo_get_config;
Daniel Vetterce22c322012-07-01 15:31:04 +02003005
André Goddard Rosaaf901ca2009-11-14 13:09:05 -02003006 /* In default case sdvo lvds is false */
Chris Wilson32aad862010-08-04 13:50:25 +01003007 if (!intel_sdvo_get_capabilities(intel_sdvo, &intel_sdvo->caps))
Chris Wilsonf899fc62010-07-20 15:44:45 -07003008 goto err;
Jesse Barnes79e53942008-11-07 14:24:08 -08003009
Chris Wilsonea5b2132010-08-04 13:50:23 +01003010 if (intel_sdvo_output_setup(intel_sdvo,
3011 intel_sdvo->caps.output_flags) != true) {
Daniel Vettereef4eac2012-03-23 23:43:35 +01003012 DRM_DEBUG_KMS("SDVO output failed to setup on %s\n",
3013 SDVO_NAME(intel_sdvo));
Jani Nikulad0ddfbd2012-11-12 18:31:35 +02003014 /* Output_setup can leave behind connectors! */
3015 goto err_output;
Jesse Barnes79e53942008-11-07 14:24:08 -08003016 }
3017
Chris Wilson7ba220c2013-06-09 16:02:04 +01003018 /* Only enable the hotplug irq if we need it, to work around noisy
3019 * hotplug lines.
3020 */
3021 if (intel_sdvo->hotplug_active) {
3022 intel_encoder->hpd_pin =
3023 intel_sdvo->is_sdvob ? HPD_SDVO_B : HPD_SDVO_C;
3024 }
3025
Daniel Vettere506d6f2012-11-13 17:24:43 +01003026 /*
3027 * Cloning SDVO with anything is often impossible, since the SDVO
3028 * encoder can request a special input timing mode. And even if that's
3029 * not the case we have evidence that cloning a plain unscaled mode with
3030 * VGA doesn't really work. Furthermore the cloning flags are way too
3031 * simplistic anyway to express such constraints, so just give up on
3032 * cloning for SDVO encoders.
3033 */
Ville Syrjäläbc079e82014-03-03 16:15:28 +02003034 intel_sdvo->base.cloneable = 0;
Daniel Vettere506d6f2012-11-13 17:24:43 +01003035
Chris Wilsonea5b2132010-08-04 13:50:23 +01003036 intel_sdvo_select_ddc_bus(dev_priv, intel_sdvo, sdvo_reg);
Jesse Barnese2f0ba92009-02-02 15:11:52 -08003037
Jesse Barnes79e53942008-11-07 14:24:08 -08003038 /* Set the input timing to the screen. Assume always input 0. */
Chris Wilson32aad862010-08-04 13:50:25 +01003039 if (!intel_sdvo_set_target_input(intel_sdvo))
Jani Nikulad0ddfbd2012-11-12 18:31:35 +02003040 goto err_output;
Jesse Barnes79e53942008-11-07 14:24:08 -08003041
Chris Wilson32aad862010-08-04 13:50:25 +01003042 if (!intel_sdvo_get_input_pixel_clock_range(intel_sdvo,
3043 &intel_sdvo->pixel_clock_min,
3044 &intel_sdvo->pixel_clock_max))
Jani Nikulad0ddfbd2012-11-12 18:31:35 +02003045 goto err_output;
Jesse Barnes79e53942008-11-07 14:24:08 -08003046
Zhao Yakui8a4c47f2009-07-20 13:48:04 +08003047 DRM_DEBUG_KMS("%s device VID/DID: %02X:%02X.%02X, "
yakui_zhao342dc382009-06-02 14:12:00 +08003048 "clock range %dMHz - %dMHz, "
3049 "input 1: %c, input 2: %c, "
3050 "output 1: %c, output 2: %c\n",
Chris Wilsonea5b2132010-08-04 13:50:23 +01003051 SDVO_NAME(intel_sdvo),
3052 intel_sdvo->caps.vendor_id, intel_sdvo->caps.device_id,
3053 intel_sdvo->caps.device_rev_id,
3054 intel_sdvo->pixel_clock_min / 1000,
3055 intel_sdvo->pixel_clock_max / 1000,
3056 (intel_sdvo->caps.sdvo_inputs_mask & 0x1) ? 'Y' : 'N',
3057 (intel_sdvo->caps.sdvo_inputs_mask & 0x2) ? 'Y' : 'N',
yakui_zhao342dc382009-06-02 14:12:00 +08003058 /* check currently supported outputs */
Chris Wilsonea5b2132010-08-04 13:50:23 +01003059 intel_sdvo->caps.output_flags &
Jesse Barnes79e53942008-11-07 14:24:08 -08003060 (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_RGB0) ? 'Y' : 'N',
Chris Wilsonea5b2132010-08-04 13:50:23 +01003061 intel_sdvo->caps.output_flags &
Jesse Barnes79e53942008-11-07 14:24:08 -08003062 (SDVO_OUTPUT_TMDS1 | SDVO_OUTPUT_RGB1) ? 'Y' : 'N');
Eric Anholt7d573822009-01-02 13:33:00 -08003063 return true;
Jesse Barnes79e53942008-11-07 14:24:08 -08003064
Jani Nikulad0ddfbd2012-11-12 18:31:35 +02003065err_output:
3066 intel_sdvo_output_cleanup(intel_sdvo);
3067
Chris Wilsonf899fc62010-07-20 15:44:45 -07003068err:
Chris Wilson373a3cf2010-09-15 12:03:59 +01003069 drm_encoder_cleanup(&intel_encoder->base);
Chris Wilsone957d772010-09-24 12:52:03 +01003070 i2c_del_adapter(&intel_sdvo->ddc);
Jani Nikulafbfcc4f2012-10-22 16:12:18 +03003071err_i2c_bus:
3072 intel_sdvo_unselect_i2c_bus(intel_sdvo);
Chris Wilsonea5b2132010-08-04 13:50:23 +01003073 kfree(intel_sdvo);
Jesse Barnes79e53942008-11-07 14:24:08 -08003074
Eric Anholt7d573822009-01-02 13:33:00 -08003075 return false;
Jesse Barnes79e53942008-11-07 14:24:08 -08003076}