blob: d49f5184632562469ef08ee9cddc3247bd63f3d9 [file] [log] [blame]
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001/*
2 * drivers/net/ethernet/mellanox/mlxsw/spectrum.c
3 * Copyright (c) 2015 Mellanox Technologies. All rights reserved.
4 * Copyright (c) 2015 Jiri Pirko <jiri@mellanox.com>
5 * Copyright (c) 2015 Ido Schimmel <idosch@mellanox.com>
6 * Copyright (c) 2015 Elad Raz <eladr@mellanox.com>
7 *
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions are met:
10 *
11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the distribution.
16 * 3. Neither the names of the copyright holders nor the names of its
17 * contributors may be used to endorse or promote products derived from
18 * this software without specific prior written permission.
19 *
20 * Alternatively, this software may be distributed under the terms of the
21 * GNU General Public License ("GPL") version 2 as published by the Free
22 * Software Foundation.
23 *
24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
27 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
28 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
29 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
30 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
31 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
32 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
33 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
34 * POSSIBILITY OF SUCH DAMAGE.
35 */
36
37#include <linux/kernel.h>
38#include <linux/module.h>
39#include <linux/types.h>
40#include <linux/netdevice.h>
41#include <linux/etherdevice.h>
42#include <linux/ethtool.h>
43#include <linux/slab.h>
44#include <linux/device.h>
45#include <linux/skbuff.h>
46#include <linux/if_vlan.h>
47#include <linux/if_bridge.h>
48#include <linux/workqueue.h>
49#include <linux/jiffies.h>
50#include <linux/bitops.h>
Ido Schimmel7f71eb42015-12-15 16:03:37 +010051#include <linux/list.h>
Ido Schimmel80bedf12016-06-20 23:03:59 +020052#include <linux/notifier.h>
Ido Schimmel90183b92016-04-06 17:10:08 +020053#include <linux/dcbnl.h>
Ido Schimmel99724c12016-07-04 08:23:14 +020054#include <linux/inetdevice.h>
Jiri Pirko56ade8f2015-10-16 14:01:37 +020055#include <net/switchdev.h>
56#include <generated/utsrelease.h>
Yotam Gigi763b4b72016-07-21 12:03:17 +020057#include <net/pkt_cls.h>
58#include <net/tc_act/tc_mirred.h>
Jiri Pirkoe7322632016-09-01 10:37:43 +020059#include <net/netevent.h>
Jiri Pirko56ade8f2015-10-16 14:01:37 +020060
61#include "spectrum.h"
62#include "core.h"
63#include "reg.h"
64#include "port.h"
65#include "trap.h"
66#include "txheader.h"
67
68static const char mlxsw_sp_driver_name[] = "mlxsw_spectrum";
69static const char mlxsw_sp_driver_version[] = "1.0";
70
71/* tx_hdr_version
72 * Tx header version.
73 * Must be set to 1.
74 */
75MLXSW_ITEM32(tx, hdr, version, 0x00, 28, 4);
76
77/* tx_hdr_ctl
78 * Packet control type.
79 * 0 - Ethernet control (e.g. EMADs, LACP)
80 * 1 - Ethernet data
81 */
82MLXSW_ITEM32(tx, hdr, ctl, 0x00, 26, 2);
83
84/* tx_hdr_proto
85 * Packet protocol type. Must be set to 1 (Ethernet).
86 */
87MLXSW_ITEM32(tx, hdr, proto, 0x00, 21, 3);
88
89/* tx_hdr_rx_is_router
90 * Packet is sent from the router. Valid for data packets only.
91 */
92MLXSW_ITEM32(tx, hdr, rx_is_router, 0x00, 19, 1);
93
94/* tx_hdr_fid_valid
95 * Indicates if the 'fid' field is valid and should be used for
96 * forwarding lookup. Valid for data packets only.
97 */
98MLXSW_ITEM32(tx, hdr, fid_valid, 0x00, 16, 1);
99
100/* tx_hdr_swid
101 * Switch partition ID. Must be set to 0.
102 */
103MLXSW_ITEM32(tx, hdr, swid, 0x00, 12, 3);
104
105/* tx_hdr_control_tclass
106 * Indicates if the packet should use the control TClass and not one
107 * of the data TClasses.
108 */
109MLXSW_ITEM32(tx, hdr, control_tclass, 0x00, 6, 1);
110
111/* tx_hdr_etclass
112 * Egress TClass to be used on the egress device on the egress port.
113 */
114MLXSW_ITEM32(tx, hdr, etclass, 0x00, 0, 4);
115
116/* tx_hdr_port_mid
117 * Destination local port for unicast packets.
118 * Destination multicast ID for multicast packets.
119 *
120 * Control packets are directed to a specific egress port, while data
121 * packets are transmitted through the CPU port (0) into the switch partition,
122 * where forwarding rules are applied.
123 */
124MLXSW_ITEM32(tx, hdr, port_mid, 0x04, 16, 16);
125
126/* tx_hdr_fid
127 * Forwarding ID used for L2 forwarding lookup. Valid only if 'fid_valid' is
128 * set, otherwise calculated based on the packet's VID using VID to FID mapping.
129 * Valid for data packets only.
130 */
131MLXSW_ITEM32(tx, hdr, fid, 0x08, 0, 16);
132
133/* tx_hdr_type
134 * 0 - Data packets
135 * 6 - Control packets
136 */
137MLXSW_ITEM32(tx, hdr, type, 0x0C, 0, 4);
138
Yotam Gigi763b4b72016-07-21 12:03:17 +0200139static bool mlxsw_sp_port_dev_check(const struct net_device *dev);
140
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200141static void mlxsw_sp_txhdr_construct(struct sk_buff *skb,
142 const struct mlxsw_tx_info *tx_info)
143{
144 char *txhdr = skb_push(skb, MLXSW_TXHDR_LEN);
145
146 memset(txhdr, 0, MLXSW_TXHDR_LEN);
147
148 mlxsw_tx_hdr_version_set(txhdr, MLXSW_TXHDR_VERSION_1);
149 mlxsw_tx_hdr_ctl_set(txhdr, MLXSW_TXHDR_ETH_CTL);
150 mlxsw_tx_hdr_proto_set(txhdr, MLXSW_TXHDR_PROTO_ETH);
151 mlxsw_tx_hdr_swid_set(txhdr, 0);
152 mlxsw_tx_hdr_control_tclass_set(txhdr, 1);
153 mlxsw_tx_hdr_port_mid_set(txhdr, tx_info->local_port);
154 mlxsw_tx_hdr_type_set(txhdr, MLXSW_TXHDR_TYPE_CONTROL);
155}
156
157static int mlxsw_sp_base_mac_get(struct mlxsw_sp *mlxsw_sp)
158{
159 char spad_pl[MLXSW_REG_SPAD_LEN];
160 int err;
161
162 err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(spad), spad_pl);
163 if (err)
164 return err;
165 mlxsw_reg_spad_base_mac_memcpy_from(spad_pl, mlxsw_sp->base_mac);
166 return 0;
167}
168
Yotam Gigi763b4b72016-07-21 12:03:17 +0200169static int mlxsw_sp_span_init(struct mlxsw_sp *mlxsw_sp)
170{
171 struct mlxsw_resources *resources;
172 int i;
173
174 resources = mlxsw_core_resources_get(mlxsw_sp->core);
175 if (!resources->max_span_valid)
176 return -EIO;
177
178 mlxsw_sp->span.entries_count = resources->max_span;
179 mlxsw_sp->span.entries = kcalloc(mlxsw_sp->span.entries_count,
180 sizeof(struct mlxsw_sp_span_entry),
181 GFP_KERNEL);
182 if (!mlxsw_sp->span.entries)
183 return -ENOMEM;
184
185 for (i = 0; i < mlxsw_sp->span.entries_count; i++)
186 INIT_LIST_HEAD(&mlxsw_sp->span.entries[i].bound_ports_list);
187
188 return 0;
189}
190
191static void mlxsw_sp_span_fini(struct mlxsw_sp *mlxsw_sp)
192{
193 int i;
194
195 for (i = 0; i < mlxsw_sp->span.entries_count; i++) {
196 struct mlxsw_sp_span_entry *curr = &mlxsw_sp->span.entries[i];
197
198 WARN_ON_ONCE(!list_empty(&curr->bound_ports_list));
199 }
200 kfree(mlxsw_sp->span.entries);
201}
202
203static struct mlxsw_sp_span_entry *
204mlxsw_sp_span_entry_create(struct mlxsw_sp_port *port)
205{
206 struct mlxsw_sp *mlxsw_sp = port->mlxsw_sp;
207 struct mlxsw_sp_span_entry *span_entry;
208 char mpat_pl[MLXSW_REG_MPAT_LEN];
209 u8 local_port = port->local_port;
210 int index;
211 int i;
212 int err;
213
214 /* find a free entry to use */
215 index = -1;
216 for (i = 0; i < mlxsw_sp->span.entries_count; i++) {
217 if (!mlxsw_sp->span.entries[i].used) {
218 index = i;
219 span_entry = &mlxsw_sp->span.entries[i];
220 break;
221 }
222 }
223 if (index < 0)
224 return NULL;
225
226 /* create a new port analayzer entry for local_port */
227 mlxsw_reg_mpat_pack(mpat_pl, index, local_port, true);
228 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(mpat), mpat_pl);
229 if (err)
230 return NULL;
231
232 span_entry->used = true;
233 span_entry->id = index;
234 span_entry->ref_count = 0;
235 span_entry->local_port = local_port;
236 return span_entry;
237}
238
239static void mlxsw_sp_span_entry_destroy(struct mlxsw_sp *mlxsw_sp,
240 struct mlxsw_sp_span_entry *span_entry)
241{
242 u8 local_port = span_entry->local_port;
243 char mpat_pl[MLXSW_REG_MPAT_LEN];
244 int pa_id = span_entry->id;
245
246 mlxsw_reg_mpat_pack(mpat_pl, pa_id, local_port, false);
247 mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(mpat), mpat_pl);
248 span_entry->used = false;
249}
250
251struct mlxsw_sp_span_entry *mlxsw_sp_span_entry_find(struct mlxsw_sp_port *port)
252{
253 struct mlxsw_sp *mlxsw_sp = port->mlxsw_sp;
254 int i;
255
256 for (i = 0; i < mlxsw_sp->span.entries_count; i++) {
257 struct mlxsw_sp_span_entry *curr = &mlxsw_sp->span.entries[i];
258
259 if (curr->used && curr->local_port == port->local_port)
260 return curr;
261 }
262 return NULL;
263}
264
265struct mlxsw_sp_span_entry *mlxsw_sp_span_entry_get(struct mlxsw_sp_port *port)
266{
267 struct mlxsw_sp_span_entry *span_entry;
268
269 span_entry = mlxsw_sp_span_entry_find(port);
270 if (span_entry) {
271 span_entry->ref_count++;
272 return span_entry;
273 }
274
275 return mlxsw_sp_span_entry_create(port);
276}
277
278static int mlxsw_sp_span_entry_put(struct mlxsw_sp *mlxsw_sp,
279 struct mlxsw_sp_span_entry *span_entry)
280{
281 if (--span_entry->ref_count == 0)
282 mlxsw_sp_span_entry_destroy(mlxsw_sp, span_entry);
283 return 0;
284}
285
286static bool mlxsw_sp_span_is_egress_mirror(struct mlxsw_sp_port *port)
287{
288 struct mlxsw_sp *mlxsw_sp = port->mlxsw_sp;
289 struct mlxsw_sp_span_inspected_port *p;
290 int i;
291
292 for (i = 0; i < mlxsw_sp->span.entries_count; i++) {
293 struct mlxsw_sp_span_entry *curr = &mlxsw_sp->span.entries[i];
294
295 list_for_each_entry(p, &curr->bound_ports_list, list)
296 if (p->local_port == port->local_port &&
297 p->type == MLXSW_SP_SPAN_EGRESS)
298 return true;
299 }
300
301 return false;
302}
303
304static int mlxsw_sp_span_mtu_to_buffsize(int mtu)
305{
306 return MLXSW_SP_BYTES_TO_CELLS(mtu * 5 / 2) + 1;
307}
308
309static int mlxsw_sp_span_port_mtu_update(struct mlxsw_sp_port *port, u16 mtu)
310{
311 struct mlxsw_sp *mlxsw_sp = port->mlxsw_sp;
312 char sbib_pl[MLXSW_REG_SBIB_LEN];
313 int err;
314
315 /* If port is egress mirrored, the shared buffer size should be
316 * updated according to the mtu value
317 */
318 if (mlxsw_sp_span_is_egress_mirror(port)) {
319 mlxsw_reg_sbib_pack(sbib_pl, port->local_port,
320 mlxsw_sp_span_mtu_to_buffsize(mtu));
321 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sbib), sbib_pl);
322 if (err) {
323 netdev_err(port->dev, "Could not update shared buffer for mirroring\n");
324 return err;
325 }
326 }
327
328 return 0;
329}
330
331static struct mlxsw_sp_span_inspected_port *
332mlxsw_sp_span_entry_bound_port_find(struct mlxsw_sp_port *port,
333 struct mlxsw_sp_span_entry *span_entry)
334{
335 struct mlxsw_sp_span_inspected_port *p;
336
337 list_for_each_entry(p, &span_entry->bound_ports_list, list)
338 if (port->local_port == p->local_port)
339 return p;
340 return NULL;
341}
342
343static int
344mlxsw_sp_span_inspected_port_bind(struct mlxsw_sp_port *port,
345 struct mlxsw_sp_span_entry *span_entry,
346 enum mlxsw_sp_span_type type)
347{
348 struct mlxsw_sp_span_inspected_port *inspected_port;
349 struct mlxsw_sp *mlxsw_sp = port->mlxsw_sp;
350 char mpar_pl[MLXSW_REG_MPAR_LEN];
351 char sbib_pl[MLXSW_REG_SBIB_LEN];
352 int pa_id = span_entry->id;
353 int err;
354
355 /* if it is an egress SPAN, bind a shared buffer to it */
356 if (type == MLXSW_SP_SPAN_EGRESS) {
357 mlxsw_reg_sbib_pack(sbib_pl, port->local_port,
358 mlxsw_sp_span_mtu_to_buffsize(port->dev->mtu));
359 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sbib), sbib_pl);
360 if (err) {
361 netdev_err(port->dev, "Could not create shared buffer for mirroring\n");
362 return err;
363 }
364 }
365
366 /* bind the port to the SPAN entry */
367 mlxsw_reg_mpar_pack(mpar_pl, port->local_port, type, true, pa_id);
368 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(mpar), mpar_pl);
369 if (err)
370 goto err_mpar_reg_write;
371
372 inspected_port = kzalloc(sizeof(*inspected_port), GFP_KERNEL);
373 if (!inspected_port) {
374 err = -ENOMEM;
375 goto err_inspected_port_alloc;
376 }
377 inspected_port->local_port = port->local_port;
378 inspected_port->type = type;
379 list_add_tail(&inspected_port->list, &span_entry->bound_ports_list);
380
381 return 0;
382
383err_mpar_reg_write:
384err_inspected_port_alloc:
385 if (type == MLXSW_SP_SPAN_EGRESS) {
386 mlxsw_reg_sbib_pack(sbib_pl, port->local_port, 0);
387 mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sbib), sbib_pl);
388 }
389 return err;
390}
391
392static void
393mlxsw_sp_span_inspected_port_unbind(struct mlxsw_sp_port *port,
394 struct mlxsw_sp_span_entry *span_entry,
395 enum mlxsw_sp_span_type type)
396{
397 struct mlxsw_sp_span_inspected_port *inspected_port;
398 struct mlxsw_sp *mlxsw_sp = port->mlxsw_sp;
399 char mpar_pl[MLXSW_REG_MPAR_LEN];
400 char sbib_pl[MLXSW_REG_SBIB_LEN];
401 int pa_id = span_entry->id;
402
403 inspected_port = mlxsw_sp_span_entry_bound_port_find(port, span_entry);
404 if (!inspected_port)
405 return;
406
407 /* remove the inspected port */
408 mlxsw_reg_mpar_pack(mpar_pl, port->local_port, type, false, pa_id);
409 mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(mpar), mpar_pl);
410
411 /* remove the SBIB buffer if it was egress SPAN */
412 if (type == MLXSW_SP_SPAN_EGRESS) {
413 mlxsw_reg_sbib_pack(sbib_pl, port->local_port, 0);
414 mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sbib), sbib_pl);
415 }
416
417 mlxsw_sp_span_entry_put(mlxsw_sp, span_entry);
418
419 list_del(&inspected_port->list);
420 kfree(inspected_port);
421}
422
423static int mlxsw_sp_span_mirror_add(struct mlxsw_sp_port *from,
424 struct mlxsw_sp_port *to,
425 enum mlxsw_sp_span_type type)
426{
427 struct mlxsw_sp *mlxsw_sp = from->mlxsw_sp;
428 struct mlxsw_sp_span_entry *span_entry;
429 int err;
430
431 span_entry = mlxsw_sp_span_entry_get(to);
432 if (!span_entry)
433 return -ENOENT;
434
435 netdev_dbg(from->dev, "Adding inspected port to SPAN entry %d\n",
436 span_entry->id);
437
438 err = mlxsw_sp_span_inspected_port_bind(from, span_entry, type);
439 if (err)
440 goto err_port_bind;
441
442 return 0;
443
444err_port_bind:
445 mlxsw_sp_span_entry_put(mlxsw_sp, span_entry);
446 return err;
447}
448
449static void mlxsw_sp_span_mirror_remove(struct mlxsw_sp_port *from,
450 struct mlxsw_sp_port *to,
451 enum mlxsw_sp_span_type type)
452{
453 struct mlxsw_sp_span_entry *span_entry;
454
455 span_entry = mlxsw_sp_span_entry_find(to);
456 if (!span_entry) {
457 netdev_err(from->dev, "no span entry found\n");
458 return;
459 }
460
461 netdev_dbg(from->dev, "removing inspected port from SPAN entry %d\n",
462 span_entry->id);
463 mlxsw_sp_span_inspected_port_unbind(from, span_entry, type);
464}
465
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200466static int mlxsw_sp_port_admin_status_set(struct mlxsw_sp_port *mlxsw_sp_port,
467 bool is_up)
468{
469 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
470 char paos_pl[MLXSW_REG_PAOS_LEN];
471
472 mlxsw_reg_paos_pack(paos_pl, mlxsw_sp_port->local_port,
473 is_up ? MLXSW_PORT_ADMIN_STATUS_UP :
474 MLXSW_PORT_ADMIN_STATUS_DOWN);
475 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(paos), paos_pl);
476}
477
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200478static int mlxsw_sp_port_dev_addr_set(struct mlxsw_sp_port *mlxsw_sp_port,
479 unsigned char *addr)
480{
481 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
482 char ppad_pl[MLXSW_REG_PPAD_LEN];
483
484 mlxsw_reg_ppad_pack(ppad_pl, true, mlxsw_sp_port->local_port);
485 mlxsw_reg_ppad_mac_memcpy_to(ppad_pl, addr);
486 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ppad), ppad_pl);
487}
488
489static int mlxsw_sp_port_dev_addr_init(struct mlxsw_sp_port *mlxsw_sp_port)
490{
491 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
492 unsigned char *addr = mlxsw_sp_port->dev->dev_addr;
493
494 ether_addr_copy(addr, mlxsw_sp->base_mac);
495 addr[ETH_ALEN - 1] += mlxsw_sp_port->local_port;
496 return mlxsw_sp_port_dev_addr_set(mlxsw_sp_port, addr);
497}
498
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200499static int mlxsw_sp_port_mtu_set(struct mlxsw_sp_port *mlxsw_sp_port, u16 mtu)
500{
501 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
502 char pmtu_pl[MLXSW_REG_PMTU_LEN];
503 int max_mtu;
504 int err;
505
506 mtu += MLXSW_TXHDR_LEN + ETH_HLEN;
507 mlxsw_reg_pmtu_pack(pmtu_pl, mlxsw_sp_port->local_port, 0);
508 err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(pmtu), pmtu_pl);
509 if (err)
510 return err;
511 max_mtu = mlxsw_reg_pmtu_max_mtu_get(pmtu_pl);
512
513 if (mtu > max_mtu)
514 return -EINVAL;
515
516 mlxsw_reg_pmtu_pack(pmtu_pl, mlxsw_sp_port->local_port, mtu);
517 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(pmtu), pmtu_pl);
518}
519
Ido Schimmelbe945352016-06-09 09:51:39 +0200520static int __mlxsw_sp_port_swid_set(struct mlxsw_sp *mlxsw_sp, u8 local_port,
521 u8 swid)
522{
523 char pspa_pl[MLXSW_REG_PSPA_LEN];
524
525 mlxsw_reg_pspa_pack(pspa_pl, swid, local_port);
526 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(pspa), pspa_pl);
527}
528
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200529static int mlxsw_sp_port_swid_set(struct mlxsw_sp_port *mlxsw_sp_port, u8 swid)
530{
531 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200532
Ido Schimmelbe945352016-06-09 09:51:39 +0200533 return __mlxsw_sp_port_swid_set(mlxsw_sp, mlxsw_sp_port->local_port,
534 swid);
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200535}
536
537static int mlxsw_sp_port_vp_mode_set(struct mlxsw_sp_port *mlxsw_sp_port,
538 bool enable)
539{
540 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
541 char svpe_pl[MLXSW_REG_SVPE_LEN];
542
543 mlxsw_reg_svpe_pack(svpe_pl, mlxsw_sp_port->local_port, enable);
544 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(svpe), svpe_pl);
545}
546
547int mlxsw_sp_port_vid_to_fid_set(struct mlxsw_sp_port *mlxsw_sp_port,
548 enum mlxsw_reg_svfa_mt mt, bool valid, u16 fid,
549 u16 vid)
550{
551 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
552 char svfa_pl[MLXSW_REG_SVFA_LEN];
553
554 mlxsw_reg_svfa_pack(svfa_pl, mlxsw_sp_port->local_port, mt, valid,
555 fid, vid);
556 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(svfa), svfa_pl);
557}
558
Ido Schimmel584d73d2016-08-24 12:00:26 +0200559int __mlxsw_sp_port_vid_learning_set(struct mlxsw_sp_port *mlxsw_sp_port,
560 u16 vid_begin, u16 vid_end,
561 bool learn_enable)
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200562{
563 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
564 char *spvmlr_pl;
565 int err;
566
567 spvmlr_pl = kmalloc(MLXSW_REG_SPVMLR_LEN, GFP_KERNEL);
568 if (!spvmlr_pl)
569 return -ENOMEM;
Ido Schimmel584d73d2016-08-24 12:00:26 +0200570 mlxsw_reg_spvmlr_pack(spvmlr_pl, mlxsw_sp_port->local_port, vid_begin,
571 vid_end, learn_enable);
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200572 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(spvmlr), spvmlr_pl);
573 kfree(spvmlr_pl);
574 return err;
575}
576
Ido Schimmel584d73d2016-08-24 12:00:26 +0200577static int mlxsw_sp_port_vid_learning_set(struct mlxsw_sp_port *mlxsw_sp_port,
578 u16 vid, bool learn_enable)
579{
580 return __mlxsw_sp_port_vid_learning_set(mlxsw_sp_port, vid, vid,
581 learn_enable);
582}
583
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200584static int
585mlxsw_sp_port_system_port_mapping_set(struct mlxsw_sp_port *mlxsw_sp_port)
586{
587 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
588 char sspr_pl[MLXSW_REG_SSPR_LEN];
589
590 mlxsw_reg_sspr_pack(sspr_pl, mlxsw_sp_port->local_port);
591 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sspr), sspr_pl);
592}
593
Ido Schimmeld664b412016-06-09 09:51:40 +0200594static int mlxsw_sp_port_module_info_get(struct mlxsw_sp *mlxsw_sp,
595 u8 local_port, u8 *p_module,
596 u8 *p_width, u8 *p_lane)
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200597{
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200598 char pmlp_pl[MLXSW_REG_PMLP_LEN];
599 int err;
600
Ido Schimmel558c2d52016-02-26 17:32:29 +0100601 mlxsw_reg_pmlp_pack(pmlp_pl, local_port);
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200602 err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(pmlp), pmlp_pl);
603 if (err)
604 return err;
Ido Schimmel558c2d52016-02-26 17:32:29 +0100605 *p_module = mlxsw_reg_pmlp_module_get(pmlp_pl, 0);
606 *p_width = mlxsw_reg_pmlp_width_get(pmlp_pl);
Ido Schimmel2bf9a582016-04-05 10:20:04 +0200607 *p_lane = mlxsw_reg_pmlp_tx_lane_get(pmlp_pl, 0);
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200608 return 0;
609}
610
Ido Schimmel18f1e702016-02-26 17:32:31 +0100611static int mlxsw_sp_port_module_map(struct mlxsw_sp *mlxsw_sp, u8 local_port,
612 u8 module, u8 width, u8 lane)
613{
614 char pmlp_pl[MLXSW_REG_PMLP_LEN];
615 int i;
616
617 mlxsw_reg_pmlp_pack(pmlp_pl, local_port);
618 mlxsw_reg_pmlp_width_set(pmlp_pl, width);
619 for (i = 0; i < width; i++) {
620 mlxsw_reg_pmlp_module_set(pmlp_pl, i, module);
621 mlxsw_reg_pmlp_tx_lane_set(pmlp_pl, i, lane + i); /* Rx & Tx */
622 }
623
624 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(pmlp), pmlp_pl);
625}
626
Ido Schimmel3e9b27b2016-02-26 17:32:28 +0100627static int mlxsw_sp_port_module_unmap(struct mlxsw_sp *mlxsw_sp, u8 local_port)
628{
629 char pmlp_pl[MLXSW_REG_PMLP_LEN];
630
631 mlxsw_reg_pmlp_pack(pmlp_pl, local_port);
632 mlxsw_reg_pmlp_width_set(pmlp_pl, 0);
633 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(pmlp), pmlp_pl);
634}
635
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200636static int mlxsw_sp_port_open(struct net_device *dev)
637{
638 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
639 int err;
640
641 err = mlxsw_sp_port_admin_status_set(mlxsw_sp_port, true);
642 if (err)
643 return err;
644 netif_start_queue(dev);
645 return 0;
646}
647
648static int mlxsw_sp_port_stop(struct net_device *dev)
649{
650 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
651
652 netif_stop_queue(dev);
653 return mlxsw_sp_port_admin_status_set(mlxsw_sp_port, false);
654}
655
656static netdev_tx_t mlxsw_sp_port_xmit(struct sk_buff *skb,
657 struct net_device *dev)
658{
659 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
660 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
661 struct mlxsw_sp_port_pcpu_stats *pcpu_stats;
662 const struct mlxsw_tx_info tx_info = {
663 .local_port = mlxsw_sp_port->local_port,
664 .is_emad = false,
665 };
666 u64 len;
667 int err;
668
Jiri Pirko307c2432016-04-08 19:11:22 +0200669 if (mlxsw_core_skb_transmit_busy(mlxsw_sp->core, &tx_info))
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200670 return NETDEV_TX_BUSY;
671
672 if (unlikely(skb_headroom(skb) < MLXSW_TXHDR_LEN)) {
673 struct sk_buff *skb_orig = skb;
674
675 skb = skb_realloc_headroom(skb, MLXSW_TXHDR_LEN);
676 if (!skb) {
677 this_cpu_inc(mlxsw_sp_port->pcpu_stats->tx_dropped);
678 dev_kfree_skb_any(skb_orig);
679 return NETDEV_TX_OK;
680 }
681 }
682
683 if (eth_skb_pad(skb)) {
684 this_cpu_inc(mlxsw_sp_port->pcpu_stats->tx_dropped);
685 return NETDEV_TX_OK;
686 }
687
688 mlxsw_sp_txhdr_construct(skb, &tx_info);
Nogah Frankel63dcdd32016-06-17 15:09:05 +0200689 /* TX header is consumed by HW on the way so we shouldn't count its
690 * bytes as being sent.
691 */
692 len = skb->len - MLXSW_TXHDR_LEN;
693
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200694 /* Due to a race we might fail here because of a full queue. In that
695 * unlikely case we simply drop the packet.
696 */
Jiri Pirko307c2432016-04-08 19:11:22 +0200697 err = mlxsw_core_skb_transmit(mlxsw_sp->core, skb, &tx_info);
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200698
699 if (!err) {
700 pcpu_stats = this_cpu_ptr(mlxsw_sp_port->pcpu_stats);
701 u64_stats_update_begin(&pcpu_stats->syncp);
702 pcpu_stats->tx_packets++;
703 pcpu_stats->tx_bytes += len;
704 u64_stats_update_end(&pcpu_stats->syncp);
705 } else {
706 this_cpu_inc(mlxsw_sp_port->pcpu_stats->tx_dropped);
707 dev_kfree_skb_any(skb);
708 }
709 return NETDEV_TX_OK;
710}
711
Jiri Pirkoc5b9b512015-12-03 12:12:22 +0100712static void mlxsw_sp_set_rx_mode(struct net_device *dev)
713{
714}
715
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200716static int mlxsw_sp_port_set_mac_address(struct net_device *dev, void *p)
717{
718 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
719 struct sockaddr *addr = p;
720 int err;
721
722 if (!is_valid_ether_addr(addr->sa_data))
723 return -EADDRNOTAVAIL;
724
725 err = mlxsw_sp_port_dev_addr_set(mlxsw_sp_port, addr->sa_data);
726 if (err)
727 return err;
728 memcpy(dev->dev_addr, addr->sa_data, dev->addr_len);
729 return 0;
730}
731
Ido Schimmel9f7ec052016-04-06 17:10:14 +0200732static void mlxsw_sp_pg_buf_pack(char *pbmc_pl, int pg_index, int mtu,
Ido Schimmeld81a6bd2016-04-06 17:10:16 +0200733 bool pause_en, bool pfc_en, u16 delay)
Ido Schimmel8e8dfe92016-04-06 17:10:10 +0200734{
735 u16 pg_size = 2 * MLXSW_SP_BYTES_TO_CELLS(mtu);
736
Ido Schimmeld81a6bd2016-04-06 17:10:16 +0200737 delay = pfc_en ? mlxsw_sp_pfc_delay_get(mtu, delay) :
738 MLXSW_SP_PAUSE_DELAY;
Ido Schimmel9f7ec052016-04-06 17:10:14 +0200739
Ido Schimmeld81a6bd2016-04-06 17:10:16 +0200740 if (pause_en || pfc_en)
Ido Schimmel9f7ec052016-04-06 17:10:14 +0200741 mlxsw_reg_pbmc_lossless_buffer_pack(pbmc_pl, pg_index,
Ido Schimmeld81a6bd2016-04-06 17:10:16 +0200742 pg_size + delay, pg_size);
743 else
Ido Schimmel9f7ec052016-04-06 17:10:14 +0200744 mlxsw_reg_pbmc_lossy_buffer_pack(pbmc_pl, pg_index, pg_size);
Ido Schimmel8e8dfe92016-04-06 17:10:10 +0200745}
746
747int __mlxsw_sp_port_headroom_set(struct mlxsw_sp_port *mlxsw_sp_port, int mtu,
Ido Schimmeld81a6bd2016-04-06 17:10:16 +0200748 u8 *prio_tc, bool pause_en,
749 struct ieee_pfc *my_pfc)
Ido Schimmelff6551e2016-04-06 17:10:03 +0200750{
751 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
Ido Schimmeld81a6bd2016-04-06 17:10:16 +0200752 u8 pfc_en = !!my_pfc ? my_pfc->pfc_en : 0;
753 u16 delay = !!my_pfc ? my_pfc->delay : 0;
Ido Schimmelff6551e2016-04-06 17:10:03 +0200754 char pbmc_pl[MLXSW_REG_PBMC_LEN];
Ido Schimmel8e8dfe92016-04-06 17:10:10 +0200755 int i, j, err;
Ido Schimmelff6551e2016-04-06 17:10:03 +0200756
757 mlxsw_reg_pbmc_pack(pbmc_pl, mlxsw_sp_port->local_port, 0, 0);
758 err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(pbmc), pbmc_pl);
759 if (err)
760 return err;
Ido Schimmel8e8dfe92016-04-06 17:10:10 +0200761
762 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
763 bool configure = false;
Ido Schimmeld81a6bd2016-04-06 17:10:16 +0200764 bool pfc = false;
Ido Schimmel8e8dfe92016-04-06 17:10:10 +0200765
766 for (j = 0; j < IEEE_8021QAZ_MAX_TCS; j++) {
767 if (prio_tc[j] == i) {
Ido Schimmeld81a6bd2016-04-06 17:10:16 +0200768 pfc = pfc_en & BIT(j);
Ido Schimmel8e8dfe92016-04-06 17:10:10 +0200769 configure = true;
770 break;
771 }
772 }
773
774 if (!configure)
775 continue;
Ido Schimmeld81a6bd2016-04-06 17:10:16 +0200776 mlxsw_sp_pg_buf_pack(pbmc_pl, i, mtu, pause_en, pfc, delay);
Ido Schimmel8e8dfe92016-04-06 17:10:10 +0200777 }
778
Ido Schimmelff6551e2016-04-06 17:10:03 +0200779 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(pbmc), pbmc_pl);
780}
781
Ido Schimmel8e8dfe92016-04-06 17:10:10 +0200782static int mlxsw_sp_port_headroom_set(struct mlxsw_sp_port *mlxsw_sp_port,
Ido Schimmel9f7ec052016-04-06 17:10:14 +0200783 int mtu, bool pause_en)
Ido Schimmel8e8dfe92016-04-06 17:10:10 +0200784{
785 u8 def_prio_tc[IEEE_8021QAZ_MAX_TCS] = {0};
786 bool dcb_en = !!mlxsw_sp_port->dcb.ets;
Ido Schimmeld81a6bd2016-04-06 17:10:16 +0200787 struct ieee_pfc *my_pfc;
Ido Schimmel8e8dfe92016-04-06 17:10:10 +0200788 u8 *prio_tc;
789
790 prio_tc = dcb_en ? mlxsw_sp_port->dcb.ets->prio_tc : def_prio_tc;
Ido Schimmeld81a6bd2016-04-06 17:10:16 +0200791 my_pfc = dcb_en ? mlxsw_sp_port->dcb.pfc : NULL;
Ido Schimmel8e8dfe92016-04-06 17:10:10 +0200792
Ido Schimmel9f7ec052016-04-06 17:10:14 +0200793 return __mlxsw_sp_port_headroom_set(mlxsw_sp_port, mtu, prio_tc,
Ido Schimmeld81a6bd2016-04-06 17:10:16 +0200794 pause_en, my_pfc);
Ido Schimmel8e8dfe92016-04-06 17:10:10 +0200795}
796
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200797static int mlxsw_sp_port_change_mtu(struct net_device *dev, int mtu)
798{
799 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
Ido Schimmel9f7ec052016-04-06 17:10:14 +0200800 bool pause_en = mlxsw_sp_port_is_pause_en(mlxsw_sp_port);
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200801 int err;
802
Ido Schimmel9f7ec052016-04-06 17:10:14 +0200803 err = mlxsw_sp_port_headroom_set(mlxsw_sp_port, mtu, pause_en);
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200804 if (err)
805 return err;
Yotam Gigi763b4b72016-07-21 12:03:17 +0200806 err = mlxsw_sp_span_port_mtu_update(mlxsw_sp_port, mtu);
807 if (err)
808 goto err_span_port_mtu_update;
Ido Schimmelff6551e2016-04-06 17:10:03 +0200809 err = mlxsw_sp_port_mtu_set(mlxsw_sp_port, mtu);
810 if (err)
811 goto err_port_mtu_set;
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200812 dev->mtu = mtu;
813 return 0;
Ido Schimmelff6551e2016-04-06 17:10:03 +0200814
815err_port_mtu_set:
Yotam Gigi763b4b72016-07-21 12:03:17 +0200816 mlxsw_sp_span_port_mtu_update(mlxsw_sp_port, dev->mtu);
817err_span_port_mtu_update:
Ido Schimmel9f7ec052016-04-06 17:10:14 +0200818 mlxsw_sp_port_headroom_set(mlxsw_sp_port, dev->mtu, pause_en);
Ido Schimmelff6551e2016-04-06 17:10:03 +0200819 return err;
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200820}
821
822static struct rtnl_link_stats64 *
823mlxsw_sp_port_get_stats64(struct net_device *dev,
824 struct rtnl_link_stats64 *stats)
825{
826 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
827 struct mlxsw_sp_port_pcpu_stats *p;
828 u64 rx_packets, rx_bytes, tx_packets, tx_bytes;
829 u32 tx_dropped = 0;
830 unsigned int start;
831 int i;
832
833 for_each_possible_cpu(i) {
834 p = per_cpu_ptr(mlxsw_sp_port->pcpu_stats, i);
835 do {
836 start = u64_stats_fetch_begin_irq(&p->syncp);
837 rx_packets = p->rx_packets;
838 rx_bytes = p->rx_bytes;
839 tx_packets = p->tx_packets;
840 tx_bytes = p->tx_bytes;
841 } while (u64_stats_fetch_retry_irq(&p->syncp, start));
842
843 stats->rx_packets += rx_packets;
844 stats->rx_bytes += rx_bytes;
845 stats->tx_packets += tx_packets;
846 stats->tx_bytes += tx_bytes;
847 /* tx_dropped is u32, updated without syncp protection. */
848 tx_dropped += p->tx_dropped;
849 }
850 stats->tx_dropped = tx_dropped;
851 return stats;
852}
853
854int mlxsw_sp_port_vlan_set(struct mlxsw_sp_port *mlxsw_sp_port, u16 vid_begin,
855 u16 vid_end, bool is_member, bool untagged)
856{
857 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
858 char *spvm_pl;
859 int err;
860
861 spvm_pl = kmalloc(MLXSW_REG_SPVM_LEN, GFP_KERNEL);
862 if (!spvm_pl)
863 return -ENOMEM;
864
865 mlxsw_reg_spvm_pack(spvm_pl, mlxsw_sp_port->local_port, vid_begin,
866 vid_end, is_member, untagged);
867 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(spvm), spvm_pl);
868 kfree(spvm_pl);
869 return err;
870}
871
872static int mlxsw_sp_port_vp_mode_trans(struct mlxsw_sp_port *mlxsw_sp_port)
873{
874 enum mlxsw_reg_svfa_mt mt = MLXSW_REG_SVFA_MT_PORT_VID_TO_FID;
875 u16 vid, last_visited_vid;
876 int err;
877
878 for_each_set_bit(vid, mlxsw_sp_port->active_vlans, VLAN_N_VID) {
879 err = mlxsw_sp_port_vid_to_fid_set(mlxsw_sp_port, mt, true, vid,
880 vid);
881 if (err) {
882 last_visited_vid = vid;
883 goto err_port_vid_to_fid_set;
884 }
885 }
886
887 err = mlxsw_sp_port_vp_mode_set(mlxsw_sp_port, true);
888 if (err) {
889 last_visited_vid = VLAN_N_VID;
890 goto err_port_vid_to_fid_set;
891 }
892
893 return 0;
894
895err_port_vid_to_fid_set:
896 for_each_set_bit(vid, mlxsw_sp_port->active_vlans, last_visited_vid)
897 mlxsw_sp_port_vid_to_fid_set(mlxsw_sp_port, mt, false, vid,
898 vid);
899 return err;
900}
901
902static int mlxsw_sp_port_vlan_mode_trans(struct mlxsw_sp_port *mlxsw_sp_port)
903{
904 enum mlxsw_reg_svfa_mt mt = MLXSW_REG_SVFA_MT_PORT_VID_TO_FID;
905 u16 vid;
906 int err;
907
908 err = mlxsw_sp_port_vp_mode_set(mlxsw_sp_port, false);
909 if (err)
910 return err;
911
912 for_each_set_bit(vid, mlxsw_sp_port->active_vlans, VLAN_N_VID) {
913 err = mlxsw_sp_port_vid_to_fid_set(mlxsw_sp_port, mt, false,
914 vid, vid);
915 if (err)
916 return err;
917 }
918
919 return 0;
920}
921
Ido Schimmel7f71eb42015-12-15 16:03:37 +0100922static struct mlxsw_sp_port *
Ido Schimmel0355b592016-06-20 23:04:13 +0200923mlxsw_sp_port_vport_create(struct mlxsw_sp_port *mlxsw_sp_port, u16 vid)
Ido Schimmel7f71eb42015-12-15 16:03:37 +0100924{
925 struct mlxsw_sp_port *mlxsw_sp_vport;
926
927 mlxsw_sp_vport = kzalloc(sizeof(*mlxsw_sp_vport), GFP_KERNEL);
928 if (!mlxsw_sp_vport)
929 return NULL;
930
931 /* dev will be set correctly after the VLAN device is linked
932 * with the real device. In case of bridge SELF invocation, dev
933 * will remain as is.
934 */
935 mlxsw_sp_vport->dev = mlxsw_sp_port->dev;
936 mlxsw_sp_vport->mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
937 mlxsw_sp_vport->local_port = mlxsw_sp_port->local_port;
938 mlxsw_sp_vport->stp_state = BR_STATE_FORWARDING;
Ido Schimmel272c4472015-12-15 16:03:47 +0100939 mlxsw_sp_vport->lagged = mlxsw_sp_port->lagged;
940 mlxsw_sp_vport->lag_id = mlxsw_sp_port->lag_id;
Ido Schimmel0355b592016-06-20 23:04:13 +0200941 mlxsw_sp_vport->vport.vid = vid;
Ido Schimmel7f71eb42015-12-15 16:03:37 +0100942
943 list_add(&mlxsw_sp_vport->vport.list, &mlxsw_sp_port->vports_list);
944
945 return mlxsw_sp_vport;
946}
947
948static void mlxsw_sp_port_vport_destroy(struct mlxsw_sp_port *mlxsw_sp_vport)
949{
950 list_del(&mlxsw_sp_vport->vport.list);
951 kfree(mlxsw_sp_vport);
952}
953
Ido Schimmel05978482016-08-17 16:39:30 +0200954static int mlxsw_sp_port_add_vid(struct net_device *dev,
955 __be16 __always_unused proto, u16 vid)
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200956{
957 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
Ido Schimmel7f71eb42015-12-15 16:03:37 +0100958 struct mlxsw_sp_port *mlxsw_sp_vport;
Ido Schimmel52697a92016-07-02 11:00:09 +0200959 bool untagged = vid == 1;
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200960 int err;
961
962 /* VLAN 0 is added to HW filter when device goes up, but it is
963 * reserved in our case, so simply return.
964 */
965 if (!vid)
966 return 0;
967
Ido Schimmelfa66d7e2016-08-17 16:39:29 +0200968 if (mlxsw_sp_port_vport_find(mlxsw_sp_port, vid))
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200969 return 0;
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200970
Ido Schimmel0355b592016-06-20 23:04:13 +0200971 mlxsw_sp_vport = mlxsw_sp_port_vport_create(mlxsw_sp_port, vid);
Ido Schimmelfa66d7e2016-08-17 16:39:29 +0200972 if (!mlxsw_sp_vport)
Ido Schimmel0355b592016-06-20 23:04:13 +0200973 return -ENOMEM;
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200974
975 /* When adding the first VLAN interface on a bridged port we need to
976 * transition all the active 802.1Q bridge VLANs to use explicit
977 * {Port, VID} to FID mappings and set the port's mode to Virtual mode.
978 */
Ido Schimmel7f71eb42015-12-15 16:03:37 +0100979 if (list_is_singular(&mlxsw_sp_port->vports_list)) {
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200980 err = mlxsw_sp_port_vp_mode_trans(mlxsw_sp_port);
Ido Schimmelfa66d7e2016-08-17 16:39:29 +0200981 if (err)
Ido Schimmel7f71eb42015-12-15 16:03:37 +0100982 goto err_port_vp_mode_trans;
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200983 }
984
Ido Schimmel52697a92016-07-02 11:00:09 +0200985 err = mlxsw_sp_port_vlan_set(mlxsw_sp_vport, vid, vid, true, untagged);
Ido Schimmelfa66d7e2016-08-17 16:39:29 +0200986 if (err)
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200987 goto err_port_add_vid;
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200988
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200989 return 0;
990
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200991err_port_add_vid:
Ido Schimmel7f71eb42015-12-15 16:03:37 +0100992 if (list_is_singular(&mlxsw_sp_port->vports_list))
993 mlxsw_sp_port_vlan_mode_trans(mlxsw_sp_port);
994err_port_vp_mode_trans:
Ido Schimmel7f71eb42015-12-15 16:03:37 +0100995 mlxsw_sp_port_vport_destroy(mlxsw_sp_vport);
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200996 return err;
997}
998
Ido Schimmel32d863f2016-07-02 11:00:10 +0200999static int mlxsw_sp_port_kill_vid(struct net_device *dev,
1000 __be16 __always_unused proto, u16 vid)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001001{
1002 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
Ido Schimmel7f71eb42015-12-15 16:03:37 +01001003 struct mlxsw_sp_port *mlxsw_sp_vport;
Ido Schimmel1c800752016-06-20 23:04:20 +02001004 struct mlxsw_sp_fid *f;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001005
1006 /* VLAN 0 is removed from HW filter when device goes down, but
1007 * it is reserved in our case, so simply return.
1008 */
1009 if (!vid)
1010 return 0;
1011
Ido Schimmel7f71eb42015-12-15 16:03:37 +01001012 mlxsw_sp_vport = mlxsw_sp_port_vport_find(mlxsw_sp_port, vid);
Ido Schimmel7a355832016-08-17 16:39:28 +02001013 if (WARN_ON(!mlxsw_sp_vport))
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001014 return 0;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001015
Ido Schimmel7a355832016-08-17 16:39:28 +02001016 mlxsw_sp_port_vlan_set(mlxsw_sp_vport, vid, vid, false, false);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001017
Ido Schimmel1c800752016-06-20 23:04:20 +02001018 /* Drop FID reference. If this was the last reference the
1019 * resources will be freed.
1020 */
1021 f = mlxsw_sp_vport_fid_get(mlxsw_sp_vport);
1022 if (f && !WARN_ON(!f->leave))
1023 f->leave(mlxsw_sp_vport);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001024
1025 /* When removing the last VLAN interface on a bridged port we need to
1026 * transition all active 802.1Q bridge VLANs to use VID to FID
1027 * mappings and set port's mode to VLAN mode.
1028 */
Ido Schimmel7a355832016-08-17 16:39:28 +02001029 if (list_is_singular(&mlxsw_sp_port->vports_list))
1030 mlxsw_sp_port_vlan_mode_trans(mlxsw_sp_port);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001031
Ido Schimmel7f71eb42015-12-15 16:03:37 +01001032 mlxsw_sp_port_vport_destroy(mlxsw_sp_vport);
1033
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001034 return 0;
1035}
1036
Ido Schimmel2bf9a582016-04-05 10:20:04 +02001037static int mlxsw_sp_port_get_phys_port_name(struct net_device *dev, char *name,
1038 size_t len)
1039{
1040 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
Ido Schimmeld664b412016-06-09 09:51:40 +02001041 u8 module = mlxsw_sp_port->mapping.module;
1042 u8 width = mlxsw_sp_port->mapping.width;
1043 u8 lane = mlxsw_sp_port->mapping.lane;
Ido Schimmel2bf9a582016-04-05 10:20:04 +02001044 int err;
1045
Ido Schimmel2bf9a582016-04-05 10:20:04 +02001046 if (!mlxsw_sp_port->split)
1047 err = snprintf(name, len, "p%d", module + 1);
1048 else
1049 err = snprintf(name, len, "p%ds%d", module + 1,
1050 lane / width);
1051
1052 if (err >= len)
1053 return -EINVAL;
1054
1055 return 0;
1056}
1057
Yotam Gigi763b4b72016-07-21 12:03:17 +02001058static struct mlxsw_sp_port_mall_tc_entry *
1059mlxsw_sp_port_mirror_entry_find(struct mlxsw_sp_port *port,
1060 unsigned long cookie) {
1061 struct mlxsw_sp_port_mall_tc_entry *mall_tc_entry;
1062
1063 list_for_each_entry(mall_tc_entry, &port->mall_tc_list, list)
1064 if (mall_tc_entry->cookie == cookie)
1065 return mall_tc_entry;
1066
1067 return NULL;
1068}
1069
1070static int
1071mlxsw_sp_port_add_cls_matchall_mirror(struct mlxsw_sp_port *mlxsw_sp_port,
1072 struct tc_cls_matchall_offload *cls,
1073 const struct tc_action *a,
1074 bool ingress)
1075{
1076 struct mlxsw_sp_port_mall_tc_entry *mall_tc_entry;
1077 struct net *net = dev_net(mlxsw_sp_port->dev);
1078 enum mlxsw_sp_span_type span_type;
1079 struct mlxsw_sp_port *to_port;
1080 struct net_device *to_dev;
1081 int ifindex;
1082 int err;
1083
1084 ifindex = tcf_mirred_ifindex(a);
1085 to_dev = __dev_get_by_index(net, ifindex);
1086 if (!to_dev) {
1087 netdev_err(mlxsw_sp_port->dev, "Could not find requested device\n");
1088 return -EINVAL;
1089 }
1090
1091 if (!mlxsw_sp_port_dev_check(to_dev)) {
1092 netdev_err(mlxsw_sp_port->dev, "Cannot mirror to a non-spectrum port");
1093 return -ENOTSUPP;
1094 }
1095 to_port = netdev_priv(to_dev);
1096
1097 mall_tc_entry = kzalloc(sizeof(*mall_tc_entry), GFP_KERNEL);
1098 if (!mall_tc_entry)
1099 return -ENOMEM;
1100
1101 mall_tc_entry->cookie = cls->cookie;
1102 mall_tc_entry->type = MLXSW_SP_PORT_MALL_MIRROR;
1103 mall_tc_entry->mirror.to_local_port = to_port->local_port;
1104 mall_tc_entry->mirror.ingress = ingress;
1105 list_add_tail(&mall_tc_entry->list, &mlxsw_sp_port->mall_tc_list);
1106
1107 span_type = ingress ? MLXSW_SP_SPAN_INGRESS : MLXSW_SP_SPAN_EGRESS;
1108 err = mlxsw_sp_span_mirror_add(mlxsw_sp_port, to_port, span_type);
1109 if (err)
1110 goto err_mirror_add;
1111 return 0;
1112
1113err_mirror_add:
1114 list_del(&mall_tc_entry->list);
1115 kfree(mall_tc_entry);
1116 return err;
1117}
1118
1119static int mlxsw_sp_port_add_cls_matchall(struct mlxsw_sp_port *mlxsw_sp_port,
1120 __be16 protocol,
1121 struct tc_cls_matchall_offload *cls,
1122 bool ingress)
1123{
Yotam Gigi763b4b72016-07-21 12:03:17 +02001124 const struct tc_action *a;
WANG Cong22dc13c2016-08-13 22:35:00 -07001125 LIST_HEAD(actions);
Yotam Gigi763b4b72016-07-21 12:03:17 +02001126 int err;
1127
Ido Schimmel86cb13e2016-07-25 13:12:33 +03001128 if (!tc_single_action(cls->exts)) {
Yotam Gigi763b4b72016-07-21 12:03:17 +02001129 netdev_err(mlxsw_sp_port->dev, "only singular actions are supported\n");
1130 return -ENOTSUPP;
1131 }
1132
WANG Cong22dc13c2016-08-13 22:35:00 -07001133 tcf_exts_to_list(cls->exts, &actions);
1134 list_for_each_entry(a, &actions, list) {
Ido Schimmel86cb13e2016-07-25 13:12:33 +03001135 if (!is_tcf_mirred_mirror(a) || protocol != htons(ETH_P_ALL))
1136 return -ENOTSUPP;
1137
Yotam Gigi763b4b72016-07-21 12:03:17 +02001138 err = mlxsw_sp_port_add_cls_matchall_mirror(mlxsw_sp_port, cls,
1139 a, ingress);
1140 if (err)
1141 return err;
Yotam Gigi763b4b72016-07-21 12:03:17 +02001142 }
1143
1144 return 0;
1145}
1146
1147static void mlxsw_sp_port_del_cls_matchall(struct mlxsw_sp_port *mlxsw_sp_port,
1148 struct tc_cls_matchall_offload *cls)
1149{
1150 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
1151 struct mlxsw_sp_port_mall_tc_entry *mall_tc_entry;
1152 enum mlxsw_sp_span_type span_type;
1153 struct mlxsw_sp_port *to_port;
1154
1155 mall_tc_entry = mlxsw_sp_port_mirror_entry_find(mlxsw_sp_port,
1156 cls->cookie);
1157 if (!mall_tc_entry) {
1158 netdev_dbg(mlxsw_sp_port->dev, "tc entry not found on port\n");
1159 return;
1160 }
1161
1162 switch (mall_tc_entry->type) {
1163 case MLXSW_SP_PORT_MALL_MIRROR:
1164 to_port = mlxsw_sp->ports[mall_tc_entry->mirror.to_local_port];
1165 span_type = mall_tc_entry->mirror.ingress ?
1166 MLXSW_SP_SPAN_INGRESS : MLXSW_SP_SPAN_EGRESS;
1167
1168 mlxsw_sp_span_mirror_remove(mlxsw_sp_port, to_port, span_type);
1169 break;
1170 default:
1171 WARN_ON(1);
1172 }
1173
1174 list_del(&mall_tc_entry->list);
1175 kfree(mall_tc_entry);
1176}
1177
1178static int mlxsw_sp_setup_tc(struct net_device *dev, u32 handle,
1179 __be16 proto, struct tc_to_netdev *tc)
1180{
1181 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
1182 bool ingress = TC_H_MAJ(handle) == TC_H_MAJ(TC_H_INGRESS);
1183
1184 if (tc->type == TC_SETUP_MATCHALL) {
1185 switch (tc->cls_mall->command) {
1186 case TC_CLSMATCHALL_REPLACE:
1187 return mlxsw_sp_port_add_cls_matchall(mlxsw_sp_port,
1188 proto,
1189 tc->cls_mall,
1190 ingress);
1191 case TC_CLSMATCHALL_DESTROY:
1192 mlxsw_sp_port_del_cls_matchall(mlxsw_sp_port,
1193 tc->cls_mall);
1194 return 0;
1195 default:
1196 return -EINVAL;
1197 }
1198 }
1199
1200 return -ENOTSUPP;
1201}
1202
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001203static const struct net_device_ops mlxsw_sp_port_netdev_ops = {
1204 .ndo_open = mlxsw_sp_port_open,
1205 .ndo_stop = mlxsw_sp_port_stop,
1206 .ndo_start_xmit = mlxsw_sp_port_xmit,
Yotam Gigi763b4b72016-07-21 12:03:17 +02001207 .ndo_setup_tc = mlxsw_sp_setup_tc,
Jiri Pirkoc5b9b512015-12-03 12:12:22 +01001208 .ndo_set_rx_mode = mlxsw_sp_set_rx_mode,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001209 .ndo_set_mac_address = mlxsw_sp_port_set_mac_address,
1210 .ndo_change_mtu = mlxsw_sp_port_change_mtu,
1211 .ndo_get_stats64 = mlxsw_sp_port_get_stats64,
1212 .ndo_vlan_rx_add_vid = mlxsw_sp_port_add_vid,
1213 .ndo_vlan_rx_kill_vid = mlxsw_sp_port_kill_vid,
Jiri Pirko6cf3c972016-07-05 11:27:39 +02001214 .ndo_neigh_construct = mlxsw_sp_router_neigh_construct,
1215 .ndo_neigh_destroy = mlxsw_sp_router_neigh_destroy,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001216 .ndo_fdb_add = switchdev_port_fdb_add,
1217 .ndo_fdb_del = switchdev_port_fdb_del,
1218 .ndo_fdb_dump = switchdev_port_fdb_dump,
1219 .ndo_bridge_setlink = switchdev_port_bridge_setlink,
1220 .ndo_bridge_getlink = switchdev_port_bridge_getlink,
1221 .ndo_bridge_dellink = switchdev_port_bridge_dellink,
Ido Schimmel2bf9a582016-04-05 10:20:04 +02001222 .ndo_get_phys_port_name = mlxsw_sp_port_get_phys_port_name,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001223};
1224
1225static void mlxsw_sp_port_get_drvinfo(struct net_device *dev,
1226 struct ethtool_drvinfo *drvinfo)
1227{
1228 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
1229 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
1230
1231 strlcpy(drvinfo->driver, mlxsw_sp_driver_name, sizeof(drvinfo->driver));
1232 strlcpy(drvinfo->version, mlxsw_sp_driver_version,
1233 sizeof(drvinfo->version));
1234 snprintf(drvinfo->fw_version, sizeof(drvinfo->fw_version),
1235 "%d.%d.%d",
1236 mlxsw_sp->bus_info->fw_rev.major,
1237 mlxsw_sp->bus_info->fw_rev.minor,
1238 mlxsw_sp->bus_info->fw_rev.subminor);
1239 strlcpy(drvinfo->bus_info, mlxsw_sp->bus_info->device_name,
1240 sizeof(drvinfo->bus_info));
1241}
1242
Ido Schimmel9f7ec052016-04-06 17:10:14 +02001243static void mlxsw_sp_port_get_pauseparam(struct net_device *dev,
1244 struct ethtool_pauseparam *pause)
1245{
1246 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
1247
1248 pause->rx_pause = mlxsw_sp_port->link.rx_pause;
1249 pause->tx_pause = mlxsw_sp_port->link.tx_pause;
1250}
1251
1252static int mlxsw_sp_port_pause_set(struct mlxsw_sp_port *mlxsw_sp_port,
1253 struct ethtool_pauseparam *pause)
1254{
1255 char pfcc_pl[MLXSW_REG_PFCC_LEN];
1256
1257 mlxsw_reg_pfcc_pack(pfcc_pl, mlxsw_sp_port->local_port);
1258 mlxsw_reg_pfcc_pprx_set(pfcc_pl, pause->rx_pause);
1259 mlxsw_reg_pfcc_pptx_set(pfcc_pl, pause->tx_pause);
1260
1261 return mlxsw_reg_write(mlxsw_sp_port->mlxsw_sp->core, MLXSW_REG(pfcc),
1262 pfcc_pl);
1263}
1264
1265static int mlxsw_sp_port_set_pauseparam(struct net_device *dev,
1266 struct ethtool_pauseparam *pause)
1267{
1268 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
1269 bool pause_en = pause->tx_pause || pause->rx_pause;
1270 int err;
1271
Ido Schimmeld81a6bd2016-04-06 17:10:16 +02001272 if (mlxsw_sp_port->dcb.pfc && mlxsw_sp_port->dcb.pfc->pfc_en) {
1273 netdev_err(dev, "PFC already enabled on port\n");
1274 return -EINVAL;
1275 }
1276
Ido Schimmel9f7ec052016-04-06 17:10:14 +02001277 if (pause->autoneg) {
1278 netdev_err(dev, "PAUSE frames autonegotiation isn't supported\n");
1279 return -EINVAL;
1280 }
1281
1282 err = mlxsw_sp_port_headroom_set(mlxsw_sp_port, dev->mtu, pause_en);
1283 if (err) {
1284 netdev_err(dev, "Failed to configure port's headroom\n");
1285 return err;
1286 }
1287
1288 err = mlxsw_sp_port_pause_set(mlxsw_sp_port, pause);
1289 if (err) {
1290 netdev_err(dev, "Failed to set PAUSE parameters\n");
1291 goto err_port_pause_configure;
1292 }
1293
1294 mlxsw_sp_port->link.rx_pause = pause->rx_pause;
1295 mlxsw_sp_port->link.tx_pause = pause->tx_pause;
1296
1297 return 0;
1298
1299err_port_pause_configure:
1300 pause_en = mlxsw_sp_port_is_pause_en(mlxsw_sp_port);
1301 mlxsw_sp_port_headroom_set(mlxsw_sp_port, dev->mtu, pause_en);
1302 return err;
1303}
1304
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001305struct mlxsw_sp_port_hw_stats {
1306 char str[ETH_GSTRING_LEN];
1307 u64 (*getter)(char *payload);
1308};
1309
Ido Schimmel7ed674b2016-07-19 15:35:53 +02001310static struct mlxsw_sp_port_hw_stats mlxsw_sp_port_hw_stats[] = {
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001311 {
1312 .str = "a_frames_transmitted_ok",
1313 .getter = mlxsw_reg_ppcnt_a_frames_transmitted_ok_get,
1314 },
1315 {
1316 .str = "a_frames_received_ok",
1317 .getter = mlxsw_reg_ppcnt_a_frames_received_ok_get,
1318 },
1319 {
1320 .str = "a_frame_check_sequence_errors",
1321 .getter = mlxsw_reg_ppcnt_a_frame_check_sequence_errors_get,
1322 },
1323 {
1324 .str = "a_alignment_errors",
1325 .getter = mlxsw_reg_ppcnt_a_alignment_errors_get,
1326 },
1327 {
1328 .str = "a_octets_transmitted_ok",
1329 .getter = mlxsw_reg_ppcnt_a_octets_transmitted_ok_get,
1330 },
1331 {
1332 .str = "a_octets_received_ok",
1333 .getter = mlxsw_reg_ppcnt_a_octets_received_ok_get,
1334 },
1335 {
1336 .str = "a_multicast_frames_xmitted_ok",
1337 .getter = mlxsw_reg_ppcnt_a_multicast_frames_xmitted_ok_get,
1338 },
1339 {
1340 .str = "a_broadcast_frames_xmitted_ok",
1341 .getter = mlxsw_reg_ppcnt_a_broadcast_frames_xmitted_ok_get,
1342 },
1343 {
1344 .str = "a_multicast_frames_received_ok",
1345 .getter = mlxsw_reg_ppcnt_a_multicast_frames_received_ok_get,
1346 },
1347 {
1348 .str = "a_broadcast_frames_received_ok",
1349 .getter = mlxsw_reg_ppcnt_a_broadcast_frames_received_ok_get,
1350 },
1351 {
1352 .str = "a_in_range_length_errors",
1353 .getter = mlxsw_reg_ppcnt_a_in_range_length_errors_get,
1354 },
1355 {
1356 .str = "a_out_of_range_length_field",
1357 .getter = mlxsw_reg_ppcnt_a_out_of_range_length_field_get,
1358 },
1359 {
1360 .str = "a_frame_too_long_errors",
1361 .getter = mlxsw_reg_ppcnt_a_frame_too_long_errors_get,
1362 },
1363 {
1364 .str = "a_symbol_error_during_carrier",
1365 .getter = mlxsw_reg_ppcnt_a_symbol_error_during_carrier_get,
1366 },
1367 {
1368 .str = "a_mac_control_frames_transmitted",
1369 .getter = mlxsw_reg_ppcnt_a_mac_control_frames_transmitted_get,
1370 },
1371 {
1372 .str = "a_mac_control_frames_received",
1373 .getter = mlxsw_reg_ppcnt_a_mac_control_frames_received_get,
1374 },
1375 {
1376 .str = "a_unsupported_opcodes_received",
1377 .getter = mlxsw_reg_ppcnt_a_unsupported_opcodes_received_get,
1378 },
1379 {
1380 .str = "a_pause_mac_ctrl_frames_received",
1381 .getter = mlxsw_reg_ppcnt_a_pause_mac_ctrl_frames_received_get,
1382 },
1383 {
1384 .str = "a_pause_mac_ctrl_frames_xmitted",
1385 .getter = mlxsw_reg_ppcnt_a_pause_mac_ctrl_frames_transmitted_get,
1386 },
1387};
1388
1389#define MLXSW_SP_PORT_HW_STATS_LEN ARRAY_SIZE(mlxsw_sp_port_hw_stats)
1390
Ido Schimmel7ed674b2016-07-19 15:35:53 +02001391static struct mlxsw_sp_port_hw_stats mlxsw_sp_port_hw_prio_stats[] = {
1392 {
1393 .str = "rx_octets_prio",
1394 .getter = mlxsw_reg_ppcnt_rx_octets_get,
1395 },
1396 {
1397 .str = "rx_frames_prio",
1398 .getter = mlxsw_reg_ppcnt_rx_frames_get,
1399 },
1400 {
1401 .str = "tx_octets_prio",
1402 .getter = mlxsw_reg_ppcnt_tx_octets_get,
1403 },
1404 {
1405 .str = "tx_frames_prio",
1406 .getter = mlxsw_reg_ppcnt_tx_frames_get,
1407 },
1408 {
1409 .str = "rx_pause_prio",
1410 .getter = mlxsw_reg_ppcnt_rx_pause_get,
1411 },
1412 {
1413 .str = "rx_pause_duration_prio",
1414 .getter = mlxsw_reg_ppcnt_rx_pause_duration_get,
1415 },
1416 {
1417 .str = "tx_pause_prio",
1418 .getter = mlxsw_reg_ppcnt_tx_pause_get,
1419 },
1420 {
1421 .str = "tx_pause_duration_prio",
1422 .getter = mlxsw_reg_ppcnt_tx_pause_duration_get,
1423 },
1424};
1425
1426#define MLXSW_SP_PORT_HW_PRIO_STATS_LEN ARRAY_SIZE(mlxsw_sp_port_hw_prio_stats)
1427
Ido Schimmeldf4750e2016-07-19 15:35:54 +02001428static u64 mlxsw_reg_ppcnt_tc_transmit_queue_bytes_get(char *ppcnt_pl)
1429{
1430 u64 transmit_queue = mlxsw_reg_ppcnt_tc_transmit_queue_get(ppcnt_pl);
1431
1432 return MLXSW_SP_CELLS_TO_BYTES(transmit_queue);
1433}
1434
1435static struct mlxsw_sp_port_hw_stats mlxsw_sp_port_hw_tc_stats[] = {
1436 {
1437 .str = "tc_transmit_queue_tc",
1438 .getter = mlxsw_reg_ppcnt_tc_transmit_queue_bytes_get,
1439 },
1440 {
1441 .str = "tc_no_buffer_discard_uc_tc",
1442 .getter = mlxsw_reg_ppcnt_tc_no_buffer_discard_uc_get,
1443 },
1444};
1445
1446#define MLXSW_SP_PORT_HW_TC_STATS_LEN ARRAY_SIZE(mlxsw_sp_port_hw_tc_stats)
1447
Ido Schimmel7ed674b2016-07-19 15:35:53 +02001448#define MLXSW_SP_PORT_ETHTOOL_STATS_LEN (MLXSW_SP_PORT_HW_STATS_LEN + \
Ido Schimmeldf4750e2016-07-19 15:35:54 +02001449 (MLXSW_SP_PORT_HW_PRIO_STATS_LEN + \
1450 MLXSW_SP_PORT_HW_TC_STATS_LEN) * \
Ido Schimmel7ed674b2016-07-19 15:35:53 +02001451 IEEE_8021QAZ_MAX_TCS)
1452
1453static void mlxsw_sp_port_get_prio_strings(u8 **p, int prio)
1454{
1455 int i;
1456
1457 for (i = 0; i < MLXSW_SP_PORT_HW_PRIO_STATS_LEN; i++) {
1458 snprintf(*p, ETH_GSTRING_LEN, "%s_%d",
1459 mlxsw_sp_port_hw_prio_stats[i].str, prio);
1460 *p += ETH_GSTRING_LEN;
1461 }
1462}
1463
Ido Schimmeldf4750e2016-07-19 15:35:54 +02001464static void mlxsw_sp_port_get_tc_strings(u8 **p, int tc)
1465{
1466 int i;
1467
1468 for (i = 0; i < MLXSW_SP_PORT_HW_TC_STATS_LEN; i++) {
1469 snprintf(*p, ETH_GSTRING_LEN, "%s_%d",
1470 mlxsw_sp_port_hw_tc_stats[i].str, tc);
1471 *p += ETH_GSTRING_LEN;
1472 }
1473}
1474
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001475static void mlxsw_sp_port_get_strings(struct net_device *dev,
1476 u32 stringset, u8 *data)
1477{
1478 u8 *p = data;
1479 int i;
1480
1481 switch (stringset) {
1482 case ETH_SS_STATS:
1483 for (i = 0; i < MLXSW_SP_PORT_HW_STATS_LEN; i++) {
1484 memcpy(p, mlxsw_sp_port_hw_stats[i].str,
1485 ETH_GSTRING_LEN);
1486 p += ETH_GSTRING_LEN;
1487 }
Ido Schimmel7ed674b2016-07-19 15:35:53 +02001488
1489 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++)
1490 mlxsw_sp_port_get_prio_strings(&p, i);
1491
Ido Schimmeldf4750e2016-07-19 15:35:54 +02001492 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++)
1493 mlxsw_sp_port_get_tc_strings(&p, i);
1494
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001495 break;
1496 }
1497}
1498
Ido Schimmel3a66ee32015-11-27 13:45:55 +01001499static int mlxsw_sp_port_set_phys_id(struct net_device *dev,
1500 enum ethtool_phys_id_state state)
1501{
1502 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
1503 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
1504 char mlcr_pl[MLXSW_REG_MLCR_LEN];
1505 bool active;
1506
1507 switch (state) {
1508 case ETHTOOL_ID_ACTIVE:
1509 active = true;
1510 break;
1511 case ETHTOOL_ID_INACTIVE:
1512 active = false;
1513 break;
1514 default:
1515 return -EOPNOTSUPP;
1516 }
1517
1518 mlxsw_reg_mlcr_pack(mlcr_pl, mlxsw_sp_port->local_port, active);
1519 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(mlcr), mlcr_pl);
1520}
1521
Ido Schimmel7ed674b2016-07-19 15:35:53 +02001522static int
1523mlxsw_sp_get_hw_stats_by_group(struct mlxsw_sp_port_hw_stats **p_hw_stats,
1524 int *p_len, enum mlxsw_reg_ppcnt_grp grp)
1525{
1526 switch (grp) {
1527 case MLXSW_REG_PPCNT_IEEE_8023_CNT:
1528 *p_hw_stats = mlxsw_sp_port_hw_stats;
1529 *p_len = MLXSW_SP_PORT_HW_STATS_LEN;
1530 break;
1531 case MLXSW_REG_PPCNT_PRIO_CNT:
1532 *p_hw_stats = mlxsw_sp_port_hw_prio_stats;
1533 *p_len = MLXSW_SP_PORT_HW_PRIO_STATS_LEN;
1534 break;
Ido Schimmeldf4750e2016-07-19 15:35:54 +02001535 case MLXSW_REG_PPCNT_TC_CNT:
1536 *p_hw_stats = mlxsw_sp_port_hw_tc_stats;
1537 *p_len = MLXSW_SP_PORT_HW_TC_STATS_LEN;
1538 break;
Ido Schimmel7ed674b2016-07-19 15:35:53 +02001539 default:
1540 WARN_ON(1);
1541 return -ENOTSUPP;
1542 }
1543 return 0;
1544}
1545
1546static void __mlxsw_sp_port_get_stats(struct net_device *dev,
1547 enum mlxsw_reg_ppcnt_grp grp, int prio,
1548 u64 *data, int data_index)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001549{
1550 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
1551 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
Ido Schimmel7ed674b2016-07-19 15:35:53 +02001552 struct mlxsw_sp_port_hw_stats *hw_stats;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001553 char ppcnt_pl[MLXSW_REG_PPCNT_LEN];
Ido Schimmel7ed674b2016-07-19 15:35:53 +02001554 int i, len;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001555 int err;
1556
Ido Schimmel7ed674b2016-07-19 15:35:53 +02001557 err = mlxsw_sp_get_hw_stats_by_group(&hw_stats, &len, grp);
1558 if (err)
1559 return;
1560 mlxsw_reg_ppcnt_pack(ppcnt_pl, mlxsw_sp_port->local_port, grp, prio);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001561 err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(ppcnt), ppcnt_pl);
Ido Schimmel7ed674b2016-07-19 15:35:53 +02001562 for (i = 0; i < len; i++)
1563 data[data_index + i] = !err ? hw_stats[i].getter(ppcnt_pl) : 0;
1564}
1565
1566static void mlxsw_sp_port_get_stats(struct net_device *dev,
1567 struct ethtool_stats *stats, u64 *data)
1568{
1569 int i, data_index = 0;
1570
1571 /* IEEE 802.3 Counters */
1572 __mlxsw_sp_port_get_stats(dev, MLXSW_REG_PPCNT_IEEE_8023_CNT, 0,
1573 data, data_index);
1574 data_index = MLXSW_SP_PORT_HW_STATS_LEN;
1575
1576 /* Per-Priority Counters */
1577 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
1578 __mlxsw_sp_port_get_stats(dev, MLXSW_REG_PPCNT_PRIO_CNT, i,
1579 data, data_index);
1580 data_index += MLXSW_SP_PORT_HW_PRIO_STATS_LEN;
1581 }
Ido Schimmeldf4750e2016-07-19 15:35:54 +02001582
1583 /* Per-TC Counters */
1584 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
1585 __mlxsw_sp_port_get_stats(dev, MLXSW_REG_PPCNT_TC_CNT, i,
1586 data, data_index);
1587 data_index += MLXSW_SP_PORT_HW_TC_STATS_LEN;
1588 }
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001589}
1590
1591static int mlxsw_sp_port_get_sset_count(struct net_device *dev, int sset)
1592{
1593 switch (sset) {
1594 case ETH_SS_STATS:
Ido Schimmel7ed674b2016-07-19 15:35:53 +02001595 return MLXSW_SP_PORT_ETHTOOL_STATS_LEN;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001596 default:
1597 return -EOPNOTSUPP;
1598 }
1599}
1600
1601struct mlxsw_sp_port_link_mode {
1602 u32 mask;
1603 u32 supported;
1604 u32 advertised;
1605 u32 speed;
1606};
1607
1608static const struct mlxsw_sp_port_link_mode mlxsw_sp_port_link_mode[] = {
1609 {
1610 .mask = MLXSW_REG_PTYS_ETH_SPEED_100BASE_T,
1611 .supported = SUPPORTED_100baseT_Full,
1612 .advertised = ADVERTISED_100baseT_Full,
1613 .speed = 100,
1614 },
1615 {
1616 .mask = MLXSW_REG_PTYS_ETH_SPEED_100BASE_TX,
1617 .speed = 100,
1618 },
1619 {
1620 .mask = MLXSW_REG_PTYS_ETH_SPEED_SGMII |
1621 MLXSW_REG_PTYS_ETH_SPEED_1000BASE_KX,
1622 .supported = SUPPORTED_1000baseKX_Full,
1623 .advertised = ADVERTISED_1000baseKX_Full,
1624 .speed = 1000,
1625 },
1626 {
1627 .mask = MLXSW_REG_PTYS_ETH_SPEED_10GBASE_T,
1628 .supported = SUPPORTED_10000baseT_Full,
1629 .advertised = ADVERTISED_10000baseT_Full,
1630 .speed = 10000,
1631 },
1632 {
1633 .mask = MLXSW_REG_PTYS_ETH_SPEED_10GBASE_CX4 |
1634 MLXSW_REG_PTYS_ETH_SPEED_10GBASE_KX4,
1635 .supported = SUPPORTED_10000baseKX4_Full,
1636 .advertised = ADVERTISED_10000baseKX4_Full,
1637 .speed = 10000,
1638 },
1639 {
1640 .mask = MLXSW_REG_PTYS_ETH_SPEED_10GBASE_KR |
1641 MLXSW_REG_PTYS_ETH_SPEED_10GBASE_CR |
1642 MLXSW_REG_PTYS_ETH_SPEED_10GBASE_SR |
1643 MLXSW_REG_PTYS_ETH_SPEED_10GBASE_ER_LR,
1644 .supported = SUPPORTED_10000baseKR_Full,
1645 .advertised = ADVERTISED_10000baseKR_Full,
1646 .speed = 10000,
1647 },
1648 {
1649 .mask = MLXSW_REG_PTYS_ETH_SPEED_20GBASE_KR2,
1650 .supported = SUPPORTED_20000baseKR2_Full,
1651 .advertised = ADVERTISED_20000baseKR2_Full,
1652 .speed = 20000,
1653 },
1654 {
1655 .mask = MLXSW_REG_PTYS_ETH_SPEED_40GBASE_CR4,
1656 .supported = SUPPORTED_40000baseCR4_Full,
1657 .advertised = ADVERTISED_40000baseCR4_Full,
1658 .speed = 40000,
1659 },
1660 {
1661 .mask = MLXSW_REG_PTYS_ETH_SPEED_40GBASE_KR4,
1662 .supported = SUPPORTED_40000baseKR4_Full,
1663 .advertised = ADVERTISED_40000baseKR4_Full,
1664 .speed = 40000,
1665 },
1666 {
1667 .mask = MLXSW_REG_PTYS_ETH_SPEED_40GBASE_SR4,
1668 .supported = SUPPORTED_40000baseSR4_Full,
1669 .advertised = ADVERTISED_40000baseSR4_Full,
1670 .speed = 40000,
1671 },
1672 {
1673 .mask = MLXSW_REG_PTYS_ETH_SPEED_40GBASE_LR4_ER4,
1674 .supported = SUPPORTED_40000baseLR4_Full,
1675 .advertised = ADVERTISED_40000baseLR4_Full,
1676 .speed = 40000,
1677 },
1678 {
1679 .mask = MLXSW_REG_PTYS_ETH_SPEED_25GBASE_CR |
1680 MLXSW_REG_PTYS_ETH_SPEED_25GBASE_KR |
1681 MLXSW_REG_PTYS_ETH_SPEED_25GBASE_SR,
1682 .speed = 25000,
1683 },
1684 {
1685 .mask = MLXSW_REG_PTYS_ETH_SPEED_50GBASE_KR4 |
1686 MLXSW_REG_PTYS_ETH_SPEED_50GBASE_CR2 |
1687 MLXSW_REG_PTYS_ETH_SPEED_50GBASE_KR2,
1688 .speed = 50000,
1689 },
1690 {
1691 .mask = MLXSW_REG_PTYS_ETH_SPEED_56GBASE_R4,
1692 .supported = SUPPORTED_56000baseKR4_Full,
1693 .advertised = ADVERTISED_56000baseKR4_Full,
1694 .speed = 56000,
1695 },
1696 {
1697 .mask = MLXSW_REG_PTYS_ETH_SPEED_100GBASE_CR4 |
1698 MLXSW_REG_PTYS_ETH_SPEED_100GBASE_SR4 |
1699 MLXSW_REG_PTYS_ETH_SPEED_100GBASE_KR4 |
1700 MLXSW_REG_PTYS_ETH_SPEED_100GBASE_LR4_ER4,
1701 .speed = 100000,
1702 },
1703};
1704
1705#define MLXSW_SP_PORT_LINK_MODE_LEN ARRAY_SIZE(mlxsw_sp_port_link_mode)
1706
1707static u32 mlxsw_sp_from_ptys_supported_port(u32 ptys_eth_proto)
1708{
Ido Schimmel91bdc7a2016-09-12 13:26:26 +02001709 u32 modes = 0;
1710
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001711 if (ptys_eth_proto & (MLXSW_REG_PTYS_ETH_SPEED_10GBASE_CR |
1712 MLXSW_REG_PTYS_ETH_SPEED_10GBASE_SR |
1713 MLXSW_REG_PTYS_ETH_SPEED_40GBASE_CR4 |
1714 MLXSW_REG_PTYS_ETH_SPEED_40GBASE_SR4 |
1715 MLXSW_REG_PTYS_ETH_SPEED_100GBASE_SR4 |
1716 MLXSW_REG_PTYS_ETH_SPEED_SGMII))
Ido Schimmel91bdc7a2016-09-12 13:26:26 +02001717 modes |= SUPPORTED_FIBRE;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001718
1719 if (ptys_eth_proto & (MLXSW_REG_PTYS_ETH_SPEED_10GBASE_KR |
1720 MLXSW_REG_PTYS_ETH_SPEED_10GBASE_KX4 |
1721 MLXSW_REG_PTYS_ETH_SPEED_40GBASE_KR4 |
1722 MLXSW_REG_PTYS_ETH_SPEED_100GBASE_KR4 |
1723 MLXSW_REG_PTYS_ETH_SPEED_1000BASE_KX))
Ido Schimmel91bdc7a2016-09-12 13:26:26 +02001724 modes |= SUPPORTED_Backplane;
1725 return modes;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001726}
1727
1728static u32 mlxsw_sp_from_ptys_supported_link(u32 ptys_eth_proto)
1729{
1730 u32 modes = 0;
1731 int i;
1732
1733 for (i = 0; i < MLXSW_SP_PORT_LINK_MODE_LEN; i++) {
1734 if (ptys_eth_proto & mlxsw_sp_port_link_mode[i].mask)
1735 modes |= mlxsw_sp_port_link_mode[i].supported;
1736 }
1737 return modes;
1738}
1739
1740static u32 mlxsw_sp_from_ptys_advert_link(u32 ptys_eth_proto)
1741{
1742 u32 modes = 0;
1743 int i;
1744
1745 for (i = 0; i < MLXSW_SP_PORT_LINK_MODE_LEN; i++) {
1746 if (ptys_eth_proto & mlxsw_sp_port_link_mode[i].mask)
1747 modes |= mlxsw_sp_port_link_mode[i].advertised;
1748 }
1749 return modes;
1750}
1751
1752static void mlxsw_sp_from_ptys_speed_duplex(bool carrier_ok, u32 ptys_eth_proto,
1753 struct ethtool_cmd *cmd)
1754{
1755 u32 speed = SPEED_UNKNOWN;
1756 u8 duplex = DUPLEX_UNKNOWN;
1757 int i;
1758
1759 if (!carrier_ok)
1760 goto out;
1761
1762 for (i = 0; i < MLXSW_SP_PORT_LINK_MODE_LEN; i++) {
1763 if (ptys_eth_proto & mlxsw_sp_port_link_mode[i].mask) {
1764 speed = mlxsw_sp_port_link_mode[i].speed;
1765 duplex = DUPLEX_FULL;
1766 break;
1767 }
1768 }
1769out:
1770 ethtool_cmd_speed_set(cmd, speed);
1771 cmd->duplex = duplex;
1772}
1773
1774static u8 mlxsw_sp_port_connector_port(u32 ptys_eth_proto)
1775{
1776 if (ptys_eth_proto & (MLXSW_REG_PTYS_ETH_SPEED_10GBASE_SR |
1777 MLXSW_REG_PTYS_ETH_SPEED_40GBASE_SR4 |
1778 MLXSW_REG_PTYS_ETH_SPEED_100GBASE_SR4 |
1779 MLXSW_REG_PTYS_ETH_SPEED_SGMII))
1780 return PORT_FIBRE;
1781
1782 if (ptys_eth_proto & (MLXSW_REG_PTYS_ETH_SPEED_10GBASE_CR |
1783 MLXSW_REG_PTYS_ETH_SPEED_40GBASE_CR4 |
1784 MLXSW_REG_PTYS_ETH_SPEED_100GBASE_CR4))
1785 return PORT_DA;
1786
1787 if (ptys_eth_proto & (MLXSW_REG_PTYS_ETH_SPEED_10GBASE_KR |
1788 MLXSW_REG_PTYS_ETH_SPEED_10GBASE_KX4 |
1789 MLXSW_REG_PTYS_ETH_SPEED_40GBASE_KR4 |
1790 MLXSW_REG_PTYS_ETH_SPEED_100GBASE_KR4))
1791 return PORT_NONE;
1792
1793 return PORT_OTHER;
1794}
1795
1796static int mlxsw_sp_port_get_settings(struct net_device *dev,
1797 struct ethtool_cmd *cmd)
1798{
1799 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
1800 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
1801 char ptys_pl[MLXSW_REG_PTYS_LEN];
1802 u32 eth_proto_cap;
1803 u32 eth_proto_admin;
1804 u32 eth_proto_oper;
Ido Schimmel4149b972016-09-12 13:26:24 +02001805 u8 autoneg_status;
1806 u32 eth_proto_lp;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001807 int err;
1808
1809 mlxsw_reg_ptys_pack(ptys_pl, mlxsw_sp_port->local_port, 0);
1810 err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(ptys), ptys_pl);
1811 if (err) {
1812 netdev_err(dev, "Failed to get proto");
1813 return err;
1814 }
1815 mlxsw_reg_ptys_unpack(ptys_pl, &eth_proto_cap,
1816 &eth_proto_admin, &eth_proto_oper);
Ido Schimmel4149b972016-09-12 13:26:24 +02001817 eth_proto_lp = mlxsw_reg_ptys_eth_proto_lp_advertise_get(ptys_pl);
1818 autoneg_status = mlxsw_reg_ptys_an_status_get(ptys_pl);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001819
1820 cmd->supported = mlxsw_sp_from_ptys_supported_port(eth_proto_cap) |
1821 mlxsw_sp_from_ptys_supported_link(eth_proto_cap) |
Ido Schimmelc3f15762016-07-15 11:14:59 +02001822 SUPPORTED_Pause | SUPPORTED_Asym_Pause |
1823 SUPPORTED_Autoneg;
Ido Schimmel0c83f882016-09-12 13:26:23 +02001824 if (mlxsw_sp_port->link.autoneg) {
1825 cmd->advertising =
1826 mlxsw_sp_from_ptys_advert_link(eth_proto_admin);
1827 cmd->advertising |= ADVERTISED_Autoneg;
1828 cmd->autoneg = AUTONEG_ENABLE;
1829 }
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001830 mlxsw_sp_from_ptys_speed_duplex(netif_carrier_ok(dev),
1831 eth_proto_oper, cmd);
1832
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001833 cmd->port = mlxsw_sp_port_connector_port(eth_proto_oper);
Ido Schimmel4149b972016-09-12 13:26:24 +02001834
1835 if (autoneg_status == MLXSW_REG_PTYS_AN_STATUS_OK && eth_proto_lp)
1836 cmd->lp_advertising =
1837 mlxsw_sp_from_ptys_advert_link(eth_proto_lp);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001838
1839 cmd->transceiver = XCVR_INTERNAL;
1840 return 0;
1841}
1842
1843static u32 mlxsw_sp_to_ptys_advert_link(u32 advertising)
1844{
1845 u32 ptys_proto = 0;
1846 int i;
1847
1848 for (i = 0; i < MLXSW_SP_PORT_LINK_MODE_LEN; i++) {
1849 if (advertising & mlxsw_sp_port_link_mode[i].advertised)
1850 ptys_proto |= mlxsw_sp_port_link_mode[i].mask;
1851 }
1852 return ptys_proto;
1853}
1854
1855static u32 mlxsw_sp_to_ptys_speed(u32 speed)
1856{
1857 u32 ptys_proto = 0;
1858 int i;
1859
1860 for (i = 0; i < MLXSW_SP_PORT_LINK_MODE_LEN; i++) {
1861 if (speed == mlxsw_sp_port_link_mode[i].speed)
1862 ptys_proto |= mlxsw_sp_port_link_mode[i].mask;
1863 }
1864 return ptys_proto;
1865}
1866
Ido Schimmel18f1e702016-02-26 17:32:31 +01001867static u32 mlxsw_sp_to_ptys_upper_speed(u32 upper_speed)
1868{
1869 u32 ptys_proto = 0;
1870 int i;
1871
1872 for (i = 0; i < MLXSW_SP_PORT_LINK_MODE_LEN; i++) {
1873 if (mlxsw_sp_port_link_mode[i].speed <= upper_speed)
1874 ptys_proto |= mlxsw_sp_port_link_mode[i].mask;
1875 }
1876 return ptys_proto;
1877}
1878
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001879static int mlxsw_sp_port_set_settings(struct net_device *dev,
1880 struct ethtool_cmd *cmd)
1881{
1882 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
1883 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
1884 char ptys_pl[MLXSW_REG_PTYS_LEN];
1885 u32 speed;
1886 u32 eth_proto_new;
1887 u32 eth_proto_cap;
1888 u32 eth_proto_admin;
Ido Schimmel0c83f882016-09-12 13:26:23 +02001889 bool autoneg;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001890 int err;
1891
Ido Schimmel0c83f882016-09-12 13:26:23 +02001892 autoneg = cmd->autoneg == AUTONEG_ENABLE;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001893 speed = ethtool_cmd_speed(cmd);
1894
Ido Schimmel0c83f882016-09-12 13:26:23 +02001895 eth_proto_new = autoneg ?
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001896 mlxsw_sp_to_ptys_advert_link(cmd->advertising) :
1897 mlxsw_sp_to_ptys_speed(speed);
1898
1899 mlxsw_reg_ptys_pack(ptys_pl, mlxsw_sp_port->local_port, 0);
1900 err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(ptys), ptys_pl);
1901 if (err) {
1902 netdev_err(dev, "Failed to get proto");
1903 return err;
1904 }
1905 mlxsw_reg_ptys_unpack(ptys_pl, &eth_proto_cap, &eth_proto_admin, NULL);
1906
1907 eth_proto_new = eth_proto_new & eth_proto_cap;
1908 if (!eth_proto_new) {
1909 netdev_err(dev, "Not supported proto admin requested");
1910 return -EINVAL;
1911 }
1912 if (eth_proto_new == eth_proto_admin)
1913 return 0;
1914
1915 mlxsw_reg_ptys_pack(ptys_pl, mlxsw_sp_port->local_port, eth_proto_new);
1916 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ptys), ptys_pl);
1917 if (err) {
1918 netdev_err(dev, "Failed to set proto admin");
1919 return err;
1920 }
1921
Ido Schimmel6277d462016-07-15 11:14:58 +02001922 if (!netif_running(dev))
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001923 return 0;
1924
Ido Schimmel0c83f882016-09-12 13:26:23 +02001925 mlxsw_sp_port->link.autoneg = autoneg;
1926
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001927 err = mlxsw_sp_port_admin_status_set(mlxsw_sp_port, false);
1928 if (err) {
1929 netdev_err(dev, "Failed to set admin status");
1930 return err;
1931 }
1932
1933 err = mlxsw_sp_port_admin_status_set(mlxsw_sp_port, true);
1934 if (err) {
1935 netdev_err(dev, "Failed to set admin status");
1936 return err;
1937 }
1938
1939 return 0;
1940}
1941
1942static const struct ethtool_ops mlxsw_sp_port_ethtool_ops = {
1943 .get_drvinfo = mlxsw_sp_port_get_drvinfo,
1944 .get_link = ethtool_op_get_link,
Ido Schimmel9f7ec052016-04-06 17:10:14 +02001945 .get_pauseparam = mlxsw_sp_port_get_pauseparam,
1946 .set_pauseparam = mlxsw_sp_port_set_pauseparam,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001947 .get_strings = mlxsw_sp_port_get_strings,
Ido Schimmel3a66ee32015-11-27 13:45:55 +01001948 .set_phys_id = mlxsw_sp_port_set_phys_id,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001949 .get_ethtool_stats = mlxsw_sp_port_get_stats,
1950 .get_sset_count = mlxsw_sp_port_get_sset_count,
1951 .get_settings = mlxsw_sp_port_get_settings,
1952 .set_settings = mlxsw_sp_port_set_settings,
1953};
1954
Ido Schimmel18f1e702016-02-26 17:32:31 +01001955static int
1956mlxsw_sp_port_speed_by_width_set(struct mlxsw_sp_port *mlxsw_sp_port, u8 width)
1957{
1958 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
1959 u32 upper_speed = MLXSW_SP_PORT_BASE_SPEED * width;
1960 char ptys_pl[MLXSW_REG_PTYS_LEN];
1961 u32 eth_proto_admin;
1962
1963 eth_proto_admin = mlxsw_sp_to_ptys_upper_speed(upper_speed);
1964 mlxsw_reg_ptys_pack(ptys_pl, mlxsw_sp_port->local_port,
1965 eth_proto_admin);
1966 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ptys), ptys_pl);
1967}
1968
Ido Schimmel8e8dfe92016-04-06 17:10:10 +02001969int mlxsw_sp_port_ets_set(struct mlxsw_sp_port *mlxsw_sp_port,
1970 enum mlxsw_reg_qeec_hr hr, u8 index, u8 next_index,
1971 bool dwrr, u8 dwrr_weight)
Ido Schimmel90183b92016-04-06 17:10:08 +02001972{
1973 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
1974 char qeec_pl[MLXSW_REG_QEEC_LEN];
1975
1976 mlxsw_reg_qeec_pack(qeec_pl, mlxsw_sp_port->local_port, hr, index,
1977 next_index);
1978 mlxsw_reg_qeec_de_set(qeec_pl, true);
1979 mlxsw_reg_qeec_dwrr_set(qeec_pl, dwrr);
1980 mlxsw_reg_qeec_dwrr_weight_set(qeec_pl, dwrr_weight);
1981 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(qeec), qeec_pl);
1982}
1983
Ido Schimmelcc7cf512016-04-06 17:10:11 +02001984int mlxsw_sp_port_ets_maxrate_set(struct mlxsw_sp_port *mlxsw_sp_port,
1985 enum mlxsw_reg_qeec_hr hr, u8 index,
1986 u8 next_index, u32 maxrate)
Ido Schimmel90183b92016-04-06 17:10:08 +02001987{
1988 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
1989 char qeec_pl[MLXSW_REG_QEEC_LEN];
1990
1991 mlxsw_reg_qeec_pack(qeec_pl, mlxsw_sp_port->local_port, hr, index,
1992 next_index);
1993 mlxsw_reg_qeec_mase_set(qeec_pl, true);
1994 mlxsw_reg_qeec_max_shaper_rate_set(qeec_pl, maxrate);
1995 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(qeec), qeec_pl);
1996}
1997
Ido Schimmel8e8dfe92016-04-06 17:10:10 +02001998int mlxsw_sp_port_prio_tc_set(struct mlxsw_sp_port *mlxsw_sp_port,
1999 u8 switch_prio, u8 tclass)
Ido Schimmel90183b92016-04-06 17:10:08 +02002000{
2001 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
2002 char qtct_pl[MLXSW_REG_QTCT_LEN];
2003
2004 mlxsw_reg_qtct_pack(qtct_pl, mlxsw_sp_port->local_port, switch_prio,
2005 tclass);
2006 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(qtct), qtct_pl);
2007}
2008
2009static int mlxsw_sp_port_ets_init(struct mlxsw_sp_port *mlxsw_sp_port)
2010{
2011 int err, i;
2012
2013 /* Setup the elements hierarcy, so that each TC is linked to
2014 * one subgroup, which are all member in the same group.
2015 */
2016 err = mlxsw_sp_port_ets_set(mlxsw_sp_port,
2017 MLXSW_REG_QEEC_HIERARCY_GROUP, 0, 0, false,
2018 0);
2019 if (err)
2020 return err;
2021 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
2022 err = mlxsw_sp_port_ets_set(mlxsw_sp_port,
2023 MLXSW_REG_QEEC_HIERARCY_SUBGROUP, i,
2024 0, false, 0);
2025 if (err)
2026 return err;
2027 }
2028 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
2029 err = mlxsw_sp_port_ets_set(mlxsw_sp_port,
2030 MLXSW_REG_QEEC_HIERARCY_TC, i, i,
2031 false, 0);
2032 if (err)
2033 return err;
2034 }
2035
2036 /* Make sure the max shaper is disabled in all hierarcies that
2037 * support it.
2038 */
2039 err = mlxsw_sp_port_ets_maxrate_set(mlxsw_sp_port,
2040 MLXSW_REG_QEEC_HIERARCY_PORT, 0, 0,
2041 MLXSW_REG_QEEC_MAS_DIS);
2042 if (err)
2043 return err;
2044 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
2045 err = mlxsw_sp_port_ets_maxrate_set(mlxsw_sp_port,
2046 MLXSW_REG_QEEC_HIERARCY_SUBGROUP,
2047 i, 0,
2048 MLXSW_REG_QEEC_MAS_DIS);
2049 if (err)
2050 return err;
2051 }
2052 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
2053 err = mlxsw_sp_port_ets_maxrate_set(mlxsw_sp_port,
2054 MLXSW_REG_QEEC_HIERARCY_TC,
2055 i, i,
2056 MLXSW_REG_QEEC_MAS_DIS);
2057 if (err)
2058 return err;
2059 }
2060
2061 /* Map all priorities to traffic class 0. */
2062 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
2063 err = mlxsw_sp_port_prio_tc_set(mlxsw_sp_port, i, 0);
2064 if (err)
2065 return err;
2066 }
2067
2068 return 0;
2069}
2070
Ido Schimmel05978482016-08-17 16:39:30 +02002071static int mlxsw_sp_port_pvid_vport_create(struct mlxsw_sp_port *mlxsw_sp_port)
2072{
2073 mlxsw_sp_port->pvid = 1;
2074
2075 return mlxsw_sp_port_add_vid(mlxsw_sp_port->dev, 0, 1);
2076}
2077
2078static int mlxsw_sp_port_pvid_vport_destroy(struct mlxsw_sp_port *mlxsw_sp_port)
2079{
2080 return mlxsw_sp_port_kill_vid(mlxsw_sp_port->dev, 0, 1);
2081}
2082
Ido Schimmelbe945352016-06-09 09:51:39 +02002083static int mlxsw_sp_port_create(struct mlxsw_sp *mlxsw_sp, u8 local_port,
Ido Schimmeld664b412016-06-09 09:51:40 +02002084 bool split, u8 module, u8 width, u8 lane)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002085{
2086 struct mlxsw_sp_port *mlxsw_sp_port;
2087 struct net_device *dev;
Ido Schimmelbd40e9d2015-12-15 16:03:36 +01002088 size_t bytes;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002089 int err;
2090
2091 dev = alloc_etherdev(sizeof(struct mlxsw_sp_port));
2092 if (!dev)
2093 return -ENOMEM;
2094 mlxsw_sp_port = netdev_priv(dev);
2095 mlxsw_sp_port->dev = dev;
2096 mlxsw_sp_port->mlxsw_sp = mlxsw_sp;
2097 mlxsw_sp_port->local_port = local_port;
Ido Schimmel18f1e702016-02-26 17:32:31 +01002098 mlxsw_sp_port->split = split;
Ido Schimmeld664b412016-06-09 09:51:40 +02002099 mlxsw_sp_port->mapping.module = module;
2100 mlxsw_sp_port->mapping.width = width;
2101 mlxsw_sp_port->mapping.lane = lane;
Ido Schimmel0c83f882016-09-12 13:26:23 +02002102 mlxsw_sp_port->link.autoneg = 1;
Ido Schimmelbd40e9d2015-12-15 16:03:36 +01002103 bytes = DIV_ROUND_UP(VLAN_N_VID, BITS_PER_BYTE);
2104 mlxsw_sp_port->active_vlans = kzalloc(bytes, GFP_KERNEL);
2105 if (!mlxsw_sp_port->active_vlans) {
2106 err = -ENOMEM;
2107 goto err_port_active_vlans_alloc;
2108 }
Elad Razfc1273a2016-01-06 13:01:11 +01002109 mlxsw_sp_port->untagged_vlans = kzalloc(bytes, GFP_KERNEL);
2110 if (!mlxsw_sp_port->untagged_vlans) {
2111 err = -ENOMEM;
2112 goto err_port_untagged_vlans_alloc;
2113 }
Ido Schimmel7f71eb42015-12-15 16:03:37 +01002114 INIT_LIST_HEAD(&mlxsw_sp_port->vports_list);
Yotam Gigi763b4b72016-07-21 12:03:17 +02002115 INIT_LIST_HEAD(&mlxsw_sp_port->mall_tc_list);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002116
2117 mlxsw_sp_port->pcpu_stats =
2118 netdev_alloc_pcpu_stats(struct mlxsw_sp_port_pcpu_stats);
2119 if (!mlxsw_sp_port->pcpu_stats) {
2120 err = -ENOMEM;
2121 goto err_alloc_stats;
2122 }
2123
2124 dev->netdev_ops = &mlxsw_sp_port_netdev_ops;
2125 dev->ethtool_ops = &mlxsw_sp_port_ethtool_ops;
2126
Ido Schimmel3247ff22016-09-08 08:16:02 +02002127 err = mlxsw_sp_port_swid_set(mlxsw_sp_port, 0);
2128 if (err) {
2129 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to set SWID\n",
2130 mlxsw_sp_port->local_port);
2131 goto err_port_swid_set;
2132 }
2133
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002134 err = mlxsw_sp_port_dev_addr_init(mlxsw_sp_port);
2135 if (err) {
2136 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Unable to init port mac address\n",
2137 mlxsw_sp_port->local_port);
2138 goto err_dev_addr_init;
2139 }
2140
2141 netif_carrier_off(dev);
2142
2143 dev->features |= NETIF_F_NETNS_LOCAL | NETIF_F_LLTX | NETIF_F_SG |
Yotam Gigi763b4b72016-07-21 12:03:17 +02002144 NETIF_F_HW_VLAN_CTAG_FILTER | NETIF_F_HW_TC;
2145 dev->hw_features |= NETIF_F_HW_TC;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002146
2147 /* Each packet needs to have a Tx header (metadata) on top all other
2148 * headers.
2149 */
2150 dev->hard_header_len += MLXSW_TXHDR_LEN;
2151
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002152 err = mlxsw_sp_port_system_port_mapping_set(mlxsw_sp_port);
2153 if (err) {
2154 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to set system port mapping\n",
2155 mlxsw_sp_port->local_port);
2156 goto err_port_system_port_mapping_set;
2157 }
2158
Ido Schimmel18f1e702016-02-26 17:32:31 +01002159 err = mlxsw_sp_port_speed_by_width_set(mlxsw_sp_port, width);
2160 if (err) {
2161 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to enable speeds\n",
2162 mlxsw_sp_port->local_port);
2163 goto err_port_speed_by_width_set;
2164 }
2165
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002166 err = mlxsw_sp_port_mtu_set(mlxsw_sp_port, ETH_DATA_LEN);
2167 if (err) {
2168 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to set MTU\n",
2169 mlxsw_sp_port->local_port);
2170 goto err_port_mtu_set;
2171 }
2172
2173 err = mlxsw_sp_port_admin_status_set(mlxsw_sp_port, false);
2174 if (err)
2175 goto err_port_admin_status_set;
2176
2177 err = mlxsw_sp_port_buffers_init(mlxsw_sp_port);
2178 if (err) {
2179 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to initialize buffers\n",
2180 mlxsw_sp_port->local_port);
2181 goto err_port_buffers_init;
2182 }
2183
Ido Schimmel90183b92016-04-06 17:10:08 +02002184 err = mlxsw_sp_port_ets_init(mlxsw_sp_port);
2185 if (err) {
2186 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to initialize ETS\n",
2187 mlxsw_sp_port->local_port);
2188 goto err_port_ets_init;
2189 }
2190
Ido Schimmelf00817d2016-04-06 17:10:09 +02002191 /* ETS and buffers must be initialized before DCB. */
2192 err = mlxsw_sp_port_dcb_init(mlxsw_sp_port);
2193 if (err) {
2194 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to initialize DCB\n",
2195 mlxsw_sp_port->local_port);
2196 goto err_port_dcb_init;
2197 }
2198
Ido Schimmel05978482016-08-17 16:39:30 +02002199 err = mlxsw_sp_port_pvid_vport_create(mlxsw_sp_port);
2200 if (err) {
2201 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to create PVID vPort\n",
2202 mlxsw_sp_port->local_port);
2203 goto err_port_pvid_vport_create;
2204 }
2205
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002206 mlxsw_sp_port_switchdev_init(mlxsw_sp_port);
Ido Schimmel2f258442016-08-17 16:39:31 +02002207 mlxsw_sp->ports[local_port] = mlxsw_sp_port;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002208 err = register_netdev(dev);
2209 if (err) {
2210 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to register netdev\n",
2211 mlxsw_sp_port->local_port);
2212 goto err_register_netdev;
2213 }
2214
Jiri Pirko932762b2016-04-08 19:11:21 +02002215 err = mlxsw_core_port_init(mlxsw_sp->core, &mlxsw_sp_port->core_port,
2216 mlxsw_sp_port->local_port, dev,
2217 mlxsw_sp_port->split, module);
2218 if (err) {
2219 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to init core port\n",
2220 mlxsw_sp_port->local_port);
2221 goto err_core_port_init;
2222 }
Jiri Pirkoc4745502016-02-26 17:32:26 +01002223
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002224 return 0;
2225
Jiri Pirko932762b2016-04-08 19:11:21 +02002226err_core_port_init:
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002227 unregister_netdev(dev);
2228err_register_netdev:
Ido Schimmel2f258442016-08-17 16:39:31 +02002229 mlxsw_sp->ports[local_port] = NULL;
Ido Schimmel05832722016-08-17 16:39:35 +02002230 mlxsw_sp_port_switchdev_fini(mlxsw_sp_port);
Ido Schimmel05978482016-08-17 16:39:30 +02002231 mlxsw_sp_port_pvid_vport_destroy(mlxsw_sp_port);
2232err_port_pvid_vport_create:
Ido Schimmel4de34eb2016-08-04 17:36:22 +03002233 mlxsw_sp_port_dcb_fini(mlxsw_sp_port);
Ido Schimmelf00817d2016-04-06 17:10:09 +02002234err_port_dcb_init:
Ido Schimmel90183b92016-04-06 17:10:08 +02002235err_port_ets_init:
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002236err_port_buffers_init:
2237err_port_admin_status_set:
2238err_port_mtu_set:
Ido Schimmel18f1e702016-02-26 17:32:31 +01002239err_port_speed_by_width_set:
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002240err_port_system_port_mapping_set:
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002241err_dev_addr_init:
Ido Schimmel3247ff22016-09-08 08:16:02 +02002242 mlxsw_sp_port_swid_set(mlxsw_sp_port, MLXSW_PORT_SWID_DISABLED_PORT);
2243err_port_swid_set:
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002244 free_percpu(mlxsw_sp_port->pcpu_stats);
2245err_alloc_stats:
Elad Razfc1273a2016-01-06 13:01:11 +01002246 kfree(mlxsw_sp_port->untagged_vlans);
2247err_port_untagged_vlans_alloc:
Ido Schimmelbd40e9d2015-12-15 16:03:36 +01002248 kfree(mlxsw_sp_port->active_vlans);
2249err_port_active_vlans_alloc:
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002250 free_netdev(dev);
2251 return err;
2252}
2253
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002254static void mlxsw_sp_port_remove(struct mlxsw_sp *mlxsw_sp, u8 local_port)
2255{
2256 struct mlxsw_sp_port *mlxsw_sp_port = mlxsw_sp->ports[local_port];
2257
2258 if (!mlxsw_sp_port)
2259 return;
Jiri Pirko932762b2016-04-08 19:11:21 +02002260 mlxsw_core_port_fini(&mlxsw_sp_port->core_port);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002261 unregister_netdev(mlxsw_sp_port->dev); /* This calls ndo_stop */
Ido Schimmel2f258442016-08-17 16:39:31 +02002262 mlxsw_sp->ports[local_port] = NULL;
Ido Schimmel05832722016-08-17 16:39:35 +02002263 mlxsw_sp_port_switchdev_fini(mlxsw_sp_port);
Ido Schimmel05978482016-08-17 16:39:30 +02002264 mlxsw_sp_port_pvid_vport_destroy(mlxsw_sp_port);
Ido Schimmelf00817d2016-04-06 17:10:09 +02002265 mlxsw_sp_port_dcb_fini(mlxsw_sp_port);
Ido Schimmel3e9b27b2016-02-26 17:32:28 +01002266 mlxsw_sp_port_swid_set(mlxsw_sp_port, MLXSW_PORT_SWID_DISABLED_PORT);
2267 mlxsw_sp_port_module_unmap(mlxsw_sp, mlxsw_sp_port->local_port);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002268 free_percpu(mlxsw_sp_port->pcpu_stats);
Elad Razfc1273a2016-01-06 13:01:11 +01002269 kfree(mlxsw_sp_port->untagged_vlans);
Ido Schimmelbd40e9d2015-12-15 16:03:36 +01002270 kfree(mlxsw_sp_port->active_vlans);
Ido Schimmel32d863f2016-07-02 11:00:10 +02002271 WARN_ON_ONCE(!list_empty(&mlxsw_sp_port->vports_list));
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002272 free_netdev(mlxsw_sp_port->dev);
2273}
2274
2275static void mlxsw_sp_ports_remove(struct mlxsw_sp *mlxsw_sp)
2276{
2277 int i;
2278
2279 for (i = 1; i < MLXSW_PORT_MAX_PORTS; i++)
2280 mlxsw_sp_port_remove(mlxsw_sp, i);
2281 kfree(mlxsw_sp->ports);
2282}
2283
2284static int mlxsw_sp_ports_create(struct mlxsw_sp *mlxsw_sp)
2285{
Ido Schimmeld664b412016-06-09 09:51:40 +02002286 u8 module, width, lane;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002287 size_t alloc_size;
2288 int i;
2289 int err;
2290
2291 alloc_size = sizeof(struct mlxsw_sp_port *) * MLXSW_PORT_MAX_PORTS;
2292 mlxsw_sp->ports = kzalloc(alloc_size, GFP_KERNEL);
2293 if (!mlxsw_sp->ports)
2294 return -ENOMEM;
2295
2296 for (i = 1; i < MLXSW_PORT_MAX_PORTS; i++) {
Ido Schimmel558c2d52016-02-26 17:32:29 +01002297 err = mlxsw_sp_port_module_info_get(mlxsw_sp, i, &module,
Ido Schimmeld664b412016-06-09 09:51:40 +02002298 &width, &lane);
Ido Schimmel558c2d52016-02-26 17:32:29 +01002299 if (err)
2300 goto err_port_module_info_get;
2301 if (!width)
2302 continue;
2303 mlxsw_sp->port_to_module[i] = module;
Ido Schimmeld664b412016-06-09 09:51:40 +02002304 err = mlxsw_sp_port_create(mlxsw_sp, i, false, module, width,
2305 lane);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002306 if (err)
2307 goto err_port_create;
2308 }
2309 return 0;
2310
2311err_port_create:
Ido Schimmel558c2d52016-02-26 17:32:29 +01002312err_port_module_info_get:
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002313 for (i--; i >= 1; i--)
2314 mlxsw_sp_port_remove(mlxsw_sp, i);
2315 kfree(mlxsw_sp->ports);
2316 return err;
2317}
2318
Ido Schimmel18f1e702016-02-26 17:32:31 +01002319static u8 mlxsw_sp_cluster_base_port_get(u8 local_port)
2320{
2321 u8 offset = (local_port - 1) % MLXSW_SP_PORTS_PER_CLUSTER_MAX;
2322
2323 return local_port - offset;
2324}
2325
Ido Schimmelbe945352016-06-09 09:51:39 +02002326static int mlxsw_sp_port_split_create(struct mlxsw_sp *mlxsw_sp, u8 base_port,
2327 u8 module, unsigned int count)
2328{
2329 u8 width = MLXSW_PORT_MODULE_MAX_WIDTH / count;
2330 int err, i;
2331
2332 for (i = 0; i < count; i++) {
2333 err = mlxsw_sp_port_module_map(mlxsw_sp, base_port + i, module,
2334 width, i * width);
2335 if (err)
2336 goto err_port_module_map;
2337 }
2338
2339 for (i = 0; i < count; i++) {
2340 err = __mlxsw_sp_port_swid_set(mlxsw_sp, base_port + i, 0);
2341 if (err)
2342 goto err_port_swid_set;
2343 }
2344
2345 for (i = 0; i < count; i++) {
2346 err = mlxsw_sp_port_create(mlxsw_sp, base_port + i, true,
Ido Schimmeld664b412016-06-09 09:51:40 +02002347 module, width, i * width);
Ido Schimmelbe945352016-06-09 09:51:39 +02002348 if (err)
2349 goto err_port_create;
2350 }
2351
2352 return 0;
2353
2354err_port_create:
2355 for (i--; i >= 0; i--)
2356 mlxsw_sp_port_remove(mlxsw_sp, base_port + i);
2357 i = count;
2358err_port_swid_set:
2359 for (i--; i >= 0; i--)
2360 __mlxsw_sp_port_swid_set(mlxsw_sp, base_port + i,
2361 MLXSW_PORT_SWID_DISABLED_PORT);
2362 i = count;
2363err_port_module_map:
2364 for (i--; i >= 0; i--)
2365 mlxsw_sp_port_module_unmap(mlxsw_sp, base_port + i);
2366 return err;
2367}
2368
2369static void mlxsw_sp_port_unsplit_create(struct mlxsw_sp *mlxsw_sp,
2370 u8 base_port, unsigned int count)
2371{
2372 u8 local_port, module, width = MLXSW_PORT_MODULE_MAX_WIDTH;
2373 int i;
2374
2375 /* Split by four means we need to re-create two ports, otherwise
2376 * only one.
2377 */
2378 count = count / 2;
2379
2380 for (i = 0; i < count; i++) {
2381 local_port = base_port + i * 2;
2382 module = mlxsw_sp->port_to_module[local_port];
2383
2384 mlxsw_sp_port_module_map(mlxsw_sp, local_port, module, width,
2385 0);
2386 }
2387
2388 for (i = 0; i < count; i++)
2389 __mlxsw_sp_port_swid_set(mlxsw_sp, base_port + i * 2, 0);
2390
2391 for (i = 0; i < count; i++) {
2392 local_port = base_port + i * 2;
2393 module = mlxsw_sp->port_to_module[local_port];
2394
2395 mlxsw_sp_port_create(mlxsw_sp, local_port, false, module,
Ido Schimmeld664b412016-06-09 09:51:40 +02002396 width, 0);
Ido Schimmelbe945352016-06-09 09:51:39 +02002397 }
2398}
2399
Jiri Pirkob2f10572016-04-08 19:11:23 +02002400static int mlxsw_sp_port_split(struct mlxsw_core *mlxsw_core, u8 local_port,
2401 unsigned int count)
Ido Schimmel18f1e702016-02-26 17:32:31 +01002402{
Jiri Pirkob2f10572016-04-08 19:11:23 +02002403 struct mlxsw_sp *mlxsw_sp = mlxsw_core_driver_priv(mlxsw_core);
Ido Schimmel18f1e702016-02-26 17:32:31 +01002404 struct mlxsw_sp_port *mlxsw_sp_port;
Ido Schimmel18f1e702016-02-26 17:32:31 +01002405 u8 module, cur_width, base_port;
2406 int i;
2407 int err;
2408
2409 mlxsw_sp_port = mlxsw_sp->ports[local_port];
2410 if (!mlxsw_sp_port) {
2411 dev_err(mlxsw_sp->bus_info->dev, "Port number \"%d\" does not exist\n",
2412 local_port);
2413 return -EINVAL;
2414 }
2415
Ido Schimmeld664b412016-06-09 09:51:40 +02002416 module = mlxsw_sp_port->mapping.module;
2417 cur_width = mlxsw_sp_port->mapping.width;
2418
Ido Schimmel18f1e702016-02-26 17:32:31 +01002419 if (count != 2 && count != 4) {
2420 netdev_err(mlxsw_sp_port->dev, "Port can only be split into 2 or 4 ports\n");
2421 return -EINVAL;
2422 }
2423
Ido Schimmel18f1e702016-02-26 17:32:31 +01002424 if (cur_width != MLXSW_PORT_MODULE_MAX_WIDTH) {
2425 netdev_err(mlxsw_sp_port->dev, "Port cannot be split further\n");
2426 return -EINVAL;
2427 }
2428
2429 /* Make sure we have enough slave (even) ports for the split. */
2430 if (count == 2) {
2431 base_port = local_port;
2432 if (mlxsw_sp->ports[base_port + 1]) {
2433 netdev_err(mlxsw_sp_port->dev, "Invalid split configuration\n");
2434 return -EINVAL;
2435 }
2436 } else {
2437 base_port = mlxsw_sp_cluster_base_port_get(local_port);
2438 if (mlxsw_sp->ports[base_port + 1] ||
2439 mlxsw_sp->ports[base_port + 3]) {
2440 netdev_err(mlxsw_sp_port->dev, "Invalid split configuration\n");
2441 return -EINVAL;
2442 }
2443 }
2444
2445 for (i = 0; i < count; i++)
2446 mlxsw_sp_port_remove(mlxsw_sp, base_port + i);
2447
Ido Schimmelbe945352016-06-09 09:51:39 +02002448 err = mlxsw_sp_port_split_create(mlxsw_sp, base_port, module, count);
2449 if (err) {
2450 dev_err(mlxsw_sp->bus_info->dev, "Failed to create split ports\n");
2451 goto err_port_split_create;
Ido Schimmel18f1e702016-02-26 17:32:31 +01002452 }
2453
2454 return 0;
2455
Ido Schimmelbe945352016-06-09 09:51:39 +02002456err_port_split_create:
2457 mlxsw_sp_port_unsplit_create(mlxsw_sp, base_port, count);
Ido Schimmel18f1e702016-02-26 17:32:31 +01002458 return err;
2459}
2460
Jiri Pirkob2f10572016-04-08 19:11:23 +02002461static int mlxsw_sp_port_unsplit(struct mlxsw_core *mlxsw_core, u8 local_port)
Ido Schimmel18f1e702016-02-26 17:32:31 +01002462{
Jiri Pirkob2f10572016-04-08 19:11:23 +02002463 struct mlxsw_sp *mlxsw_sp = mlxsw_core_driver_priv(mlxsw_core);
Ido Schimmel18f1e702016-02-26 17:32:31 +01002464 struct mlxsw_sp_port *mlxsw_sp_port;
Ido Schimmeld664b412016-06-09 09:51:40 +02002465 u8 cur_width, base_port;
Ido Schimmel18f1e702016-02-26 17:32:31 +01002466 unsigned int count;
2467 int i;
Ido Schimmel18f1e702016-02-26 17:32:31 +01002468
2469 mlxsw_sp_port = mlxsw_sp->ports[local_port];
2470 if (!mlxsw_sp_port) {
2471 dev_err(mlxsw_sp->bus_info->dev, "Port number \"%d\" does not exist\n",
2472 local_port);
2473 return -EINVAL;
2474 }
2475
2476 if (!mlxsw_sp_port->split) {
2477 netdev_err(mlxsw_sp_port->dev, "Port wasn't split\n");
2478 return -EINVAL;
2479 }
2480
Ido Schimmeld664b412016-06-09 09:51:40 +02002481 cur_width = mlxsw_sp_port->mapping.width;
Ido Schimmel18f1e702016-02-26 17:32:31 +01002482 count = cur_width == 1 ? 4 : 2;
2483
2484 base_port = mlxsw_sp_cluster_base_port_get(local_port);
2485
2486 /* Determine which ports to remove. */
2487 if (count == 2 && local_port >= base_port + 2)
2488 base_port = base_port + 2;
2489
2490 for (i = 0; i < count; i++)
2491 mlxsw_sp_port_remove(mlxsw_sp, base_port + i);
2492
Ido Schimmelbe945352016-06-09 09:51:39 +02002493 mlxsw_sp_port_unsplit_create(mlxsw_sp, base_port, count);
Ido Schimmel18f1e702016-02-26 17:32:31 +01002494
2495 return 0;
2496}
2497
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002498static void mlxsw_sp_pude_event_func(const struct mlxsw_reg_info *reg,
2499 char *pude_pl, void *priv)
2500{
2501 struct mlxsw_sp *mlxsw_sp = priv;
2502 struct mlxsw_sp_port *mlxsw_sp_port;
2503 enum mlxsw_reg_pude_oper_status status;
2504 u8 local_port;
2505
2506 local_port = mlxsw_reg_pude_local_port_get(pude_pl);
2507 mlxsw_sp_port = mlxsw_sp->ports[local_port];
Ido Schimmelbbf2a472016-07-02 11:00:14 +02002508 if (!mlxsw_sp_port)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002509 return;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002510
2511 status = mlxsw_reg_pude_oper_status_get(pude_pl);
2512 if (status == MLXSW_PORT_OPER_STATUS_UP) {
2513 netdev_info(mlxsw_sp_port->dev, "link up\n");
2514 netif_carrier_on(mlxsw_sp_port->dev);
2515 } else {
2516 netdev_info(mlxsw_sp_port->dev, "link down\n");
2517 netif_carrier_off(mlxsw_sp_port->dev);
2518 }
2519}
2520
2521static struct mlxsw_event_listener mlxsw_sp_pude_event = {
2522 .func = mlxsw_sp_pude_event_func,
2523 .trap_id = MLXSW_TRAP_ID_PUDE,
2524};
2525
2526static int mlxsw_sp_event_register(struct mlxsw_sp *mlxsw_sp,
2527 enum mlxsw_event_trap_id trap_id)
2528{
2529 struct mlxsw_event_listener *el;
2530 char hpkt_pl[MLXSW_REG_HPKT_LEN];
2531 int err;
2532
2533 switch (trap_id) {
2534 case MLXSW_TRAP_ID_PUDE:
2535 el = &mlxsw_sp_pude_event;
2536 break;
2537 }
2538 err = mlxsw_core_event_listener_register(mlxsw_sp->core, el, mlxsw_sp);
2539 if (err)
2540 return err;
2541
2542 mlxsw_reg_hpkt_pack(hpkt_pl, MLXSW_REG_HPKT_ACTION_FORWARD, trap_id);
2543 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(hpkt), hpkt_pl);
2544 if (err)
2545 goto err_event_trap_set;
2546
2547 return 0;
2548
2549err_event_trap_set:
2550 mlxsw_core_event_listener_unregister(mlxsw_sp->core, el, mlxsw_sp);
2551 return err;
2552}
2553
2554static void mlxsw_sp_event_unregister(struct mlxsw_sp *mlxsw_sp,
2555 enum mlxsw_event_trap_id trap_id)
2556{
2557 struct mlxsw_event_listener *el;
2558
2559 switch (trap_id) {
2560 case MLXSW_TRAP_ID_PUDE:
2561 el = &mlxsw_sp_pude_event;
2562 break;
2563 }
2564 mlxsw_core_event_listener_unregister(mlxsw_sp->core, el, mlxsw_sp);
2565}
2566
2567static void mlxsw_sp_rx_listener_func(struct sk_buff *skb, u8 local_port,
2568 void *priv)
2569{
2570 struct mlxsw_sp *mlxsw_sp = priv;
2571 struct mlxsw_sp_port *mlxsw_sp_port = mlxsw_sp->ports[local_port];
2572 struct mlxsw_sp_port_pcpu_stats *pcpu_stats;
2573
2574 if (unlikely(!mlxsw_sp_port)) {
2575 dev_warn_ratelimited(mlxsw_sp->bus_info->dev, "Port %d: skb received for non-existent port\n",
2576 local_port);
2577 return;
2578 }
2579
2580 skb->dev = mlxsw_sp_port->dev;
2581
2582 pcpu_stats = this_cpu_ptr(mlxsw_sp_port->pcpu_stats);
2583 u64_stats_update_begin(&pcpu_stats->syncp);
2584 pcpu_stats->rx_packets++;
2585 pcpu_stats->rx_bytes += skb->len;
2586 u64_stats_update_end(&pcpu_stats->syncp);
2587
2588 skb->protocol = eth_type_trans(skb, skb->dev);
2589 netif_receive_skb(skb);
2590}
2591
Ido Schimmel1c6c6d22016-08-25 18:42:40 +02002592static void mlxsw_sp_rx_listener_mark_func(struct sk_buff *skb, u8 local_port,
2593 void *priv)
2594{
2595 skb->offload_fwd_mark = 1;
2596 return mlxsw_sp_rx_listener_func(skb, local_port, priv);
2597}
2598
Ido Schimmel63a81142016-08-25 18:42:39 +02002599#define MLXSW_SP_RXL(_func, _trap_id, _action) \
2600 { \
2601 .func = _func, \
2602 .local_port = MLXSW_PORT_DONT_CARE, \
2603 .trap_id = MLXSW_TRAP_ID_##_trap_id, \
2604 .action = MLXSW_REG_HPKT_ACTION_##_action, \
Ido Schimmel93393b32016-08-25 18:42:38 +02002605 }
2606
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002607static const struct mlxsw_rx_listener mlxsw_sp_rx_listener[] = {
Ido Schimmel63a81142016-08-25 18:42:39 +02002608 MLXSW_SP_RXL(mlxsw_sp_rx_listener_func, FDB_MC, TRAP_TO_CPU),
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002609 /* Traps for specific L2 packet types, not trapped as FDB MC */
Ido Schimmel63a81142016-08-25 18:42:39 +02002610 MLXSW_SP_RXL(mlxsw_sp_rx_listener_func, STP, TRAP_TO_CPU),
2611 MLXSW_SP_RXL(mlxsw_sp_rx_listener_func, LACP, TRAP_TO_CPU),
2612 MLXSW_SP_RXL(mlxsw_sp_rx_listener_func, EAPOL, TRAP_TO_CPU),
2613 MLXSW_SP_RXL(mlxsw_sp_rx_listener_func, LLDP, TRAP_TO_CPU),
2614 MLXSW_SP_RXL(mlxsw_sp_rx_listener_func, MMRP, TRAP_TO_CPU),
2615 MLXSW_SP_RXL(mlxsw_sp_rx_listener_func, MVRP, TRAP_TO_CPU),
2616 MLXSW_SP_RXL(mlxsw_sp_rx_listener_func, RPVST, TRAP_TO_CPU),
Ido Schimmel1c6c6d22016-08-25 18:42:40 +02002617 MLXSW_SP_RXL(mlxsw_sp_rx_listener_mark_func, DHCP, MIRROR_TO_CPU),
2618 MLXSW_SP_RXL(mlxsw_sp_rx_listener_mark_func, IGMP_QUERY, MIRROR_TO_CPU),
Ido Schimmel63a81142016-08-25 18:42:39 +02002619 MLXSW_SP_RXL(mlxsw_sp_rx_listener_func, IGMP_V1_REPORT, TRAP_TO_CPU),
2620 MLXSW_SP_RXL(mlxsw_sp_rx_listener_func, IGMP_V2_REPORT, TRAP_TO_CPU),
2621 MLXSW_SP_RXL(mlxsw_sp_rx_listener_func, IGMP_V2_LEAVE, TRAP_TO_CPU),
2622 MLXSW_SP_RXL(mlxsw_sp_rx_listener_func, IGMP_V3_REPORT, TRAP_TO_CPU),
Ido Schimmel1c6c6d22016-08-25 18:42:40 +02002623 MLXSW_SP_RXL(mlxsw_sp_rx_listener_mark_func, ARPBC, MIRROR_TO_CPU),
2624 MLXSW_SP_RXL(mlxsw_sp_rx_listener_mark_func, ARPUC, MIRROR_TO_CPU),
Ido Schimmel93393b32016-08-25 18:42:38 +02002625 /* L3 traps */
Ido Schimmel63a81142016-08-25 18:42:39 +02002626 MLXSW_SP_RXL(mlxsw_sp_rx_listener_func, MTUERROR, TRAP_TO_CPU),
2627 MLXSW_SP_RXL(mlxsw_sp_rx_listener_func, TTLERROR, TRAP_TO_CPU),
2628 MLXSW_SP_RXL(mlxsw_sp_rx_listener_func, LBERROR, TRAP_TO_CPU),
Ido Schimmel1c6c6d22016-08-25 18:42:40 +02002629 MLXSW_SP_RXL(mlxsw_sp_rx_listener_mark_func, OSPF, TRAP_TO_CPU),
Ido Schimmel63a81142016-08-25 18:42:39 +02002630 MLXSW_SP_RXL(mlxsw_sp_rx_listener_func, IP2ME, TRAP_TO_CPU),
2631 MLXSW_SP_RXL(mlxsw_sp_rx_listener_func, RTR_INGRESS0, TRAP_TO_CPU),
2632 MLXSW_SP_RXL(mlxsw_sp_rx_listener_func, HOST_MISS_IPV4, TRAP_TO_CPU),
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002633};
2634
2635static int mlxsw_sp_traps_init(struct mlxsw_sp *mlxsw_sp)
2636{
2637 char htgt_pl[MLXSW_REG_HTGT_LEN];
2638 char hpkt_pl[MLXSW_REG_HPKT_LEN];
2639 int i;
2640 int err;
2641
2642 mlxsw_reg_htgt_pack(htgt_pl, MLXSW_REG_HTGT_TRAP_GROUP_RX);
2643 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(htgt), htgt_pl);
2644 if (err)
2645 return err;
2646
2647 mlxsw_reg_htgt_pack(htgt_pl, MLXSW_REG_HTGT_TRAP_GROUP_CTRL);
2648 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(htgt), htgt_pl);
2649 if (err)
2650 return err;
2651
2652 for (i = 0; i < ARRAY_SIZE(mlxsw_sp_rx_listener); i++) {
2653 err = mlxsw_core_rx_listener_register(mlxsw_sp->core,
2654 &mlxsw_sp_rx_listener[i],
2655 mlxsw_sp);
2656 if (err)
2657 goto err_rx_listener_register;
2658
Ido Schimmel63a81142016-08-25 18:42:39 +02002659 mlxsw_reg_hpkt_pack(hpkt_pl, mlxsw_sp_rx_listener[i].action,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002660 mlxsw_sp_rx_listener[i].trap_id);
2661 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(hpkt), hpkt_pl);
2662 if (err)
2663 goto err_rx_trap_set;
2664 }
2665 return 0;
2666
2667err_rx_trap_set:
2668 mlxsw_core_rx_listener_unregister(mlxsw_sp->core,
2669 &mlxsw_sp_rx_listener[i],
2670 mlxsw_sp);
2671err_rx_listener_register:
2672 for (i--; i >= 0; i--) {
Ido Schimmel10f00aa2016-07-02 11:00:19 +02002673 mlxsw_reg_hpkt_pack(hpkt_pl, MLXSW_REG_HPKT_ACTION_DISCARD,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002674 mlxsw_sp_rx_listener[i].trap_id);
2675 mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(hpkt), hpkt_pl);
2676
2677 mlxsw_core_rx_listener_unregister(mlxsw_sp->core,
2678 &mlxsw_sp_rx_listener[i],
2679 mlxsw_sp);
2680 }
2681 return err;
2682}
2683
2684static void mlxsw_sp_traps_fini(struct mlxsw_sp *mlxsw_sp)
2685{
2686 char hpkt_pl[MLXSW_REG_HPKT_LEN];
2687 int i;
2688
2689 for (i = 0; i < ARRAY_SIZE(mlxsw_sp_rx_listener); i++) {
Ido Schimmel10f00aa2016-07-02 11:00:19 +02002690 mlxsw_reg_hpkt_pack(hpkt_pl, MLXSW_REG_HPKT_ACTION_DISCARD,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002691 mlxsw_sp_rx_listener[i].trap_id);
2692 mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(hpkt), hpkt_pl);
2693
2694 mlxsw_core_rx_listener_unregister(mlxsw_sp->core,
2695 &mlxsw_sp_rx_listener[i],
2696 mlxsw_sp);
2697 }
2698}
2699
2700static int __mlxsw_sp_flood_init(struct mlxsw_core *mlxsw_core,
2701 enum mlxsw_reg_sfgc_type type,
2702 enum mlxsw_reg_sfgc_bridge_type bridge_type)
2703{
2704 enum mlxsw_flood_table_type table_type;
2705 enum mlxsw_sp_flood_table flood_table;
2706 char sfgc_pl[MLXSW_REG_SFGC_LEN];
2707
Ido Schimmel19ae6122015-12-15 16:03:39 +01002708 if (bridge_type == MLXSW_REG_SFGC_BRIDGE_TYPE_VFID)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002709 table_type = MLXSW_REG_SFGC_TABLE_TYPE_FID;
Ido Schimmel19ae6122015-12-15 16:03:39 +01002710 else
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002711 table_type = MLXSW_REG_SFGC_TABLE_TYPE_FID_OFFEST;
Ido Schimmel19ae6122015-12-15 16:03:39 +01002712
2713 if (type == MLXSW_REG_SFGC_TYPE_UNKNOWN_UNICAST)
2714 flood_table = MLXSW_SP_FLOOD_TABLE_UC;
2715 else
2716 flood_table = MLXSW_SP_FLOOD_TABLE_BM;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002717
2718 mlxsw_reg_sfgc_pack(sfgc_pl, type, bridge_type, table_type,
2719 flood_table);
2720 return mlxsw_reg_write(mlxsw_core, MLXSW_REG(sfgc), sfgc_pl);
2721}
2722
2723static int mlxsw_sp_flood_init(struct mlxsw_sp *mlxsw_sp)
2724{
2725 int type, err;
2726
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002727 for (type = 0; type < MLXSW_REG_SFGC_TYPE_MAX; type++) {
2728 if (type == MLXSW_REG_SFGC_TYPE_RESERVED)
2729 continue;
2730
2731 err = __mlxsw_sp_flood_init(mlxsw_sp->core, type,
2732 MLXSW_REG_SFGC_BRIDGE_TYPE_VFID);
2733 if (err)
2734 return err;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002735
2736 err = __mlxsw_sp_flood_init(mlxsw_sp->core, type,
2737 MLXSW_REG_SFGC_BRIDGE_TYPE_1Q_FID);
2738 if (err)
2739 return err;
2740 }
2741
2742 return 0;
2743}
2744
Jiri Pirko0d65fc12015-12-03 12:12:28 +01002745static int mlxsw_sp_lag_init(struct mlxsw_sp *mlxsw_sp)
2746{
2747 char slcr_pl[MLXSW_REG_SLCR_LEN];
2748
2749 mlxsw_reg_slcr_pack(slcr_pl, MLXSW_REG_SLCR_LAG_HASH_SMAC |
2750 MLXSW_REG_SLCR_LAG_HASH_DMAC |
2751 MLXSW_REG_SLCR_LAG_HASH_ETHERTYPE |
2752 MLXSW_REG_SLCR_LAG_HASH_VLANID |
2753 MLXSW_REG_SLCR_LAG_HASH_SIP |
2754 MLXSW_REG_SLCR_LAG_HASH_DIP |
2755 MLXSW_REG_SLCR_LAG_HASH_SPORT |
2756 MLXSW_REG_SLCR_LAG_HASH_DPORT |
2757 MLXSW_REG_SLCR_LAG_HASH_IPPROTO);
2758 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(slcr), slcr_pl);
2759}
2760
Jiri Pirkob2f10572016-04-08 19:11:23 +02002761static int mlxsw_sp_init(struct mlxsw_core *mlxsw_core,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002762 const struct mlxsw_bus_info *mlxsw_bus_info)
2763{
Jiri Pirkob2f10572016-04-08 19:11:23 +02002764 struct mlxsw_sp *mlxsw_sp = mlxsw_core_driver_priv(mlxsw_core);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002765 int err;
2766
2767 mlxsw_sp->core = mlxsw_core;
2768 mlxsw_sp->bus_info = mlxsw_bus_info;
Ido Schimmel14d39462016-06-20 23:04:15 +02002769 INIT_LIST_HEAD(&mlxsw_sp->fids);
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02002770 INIT_LIST_HEAD(&mlxsw_sp->vfids.list);
Elad Raz3a49b4f2016-01-10 21:06:28 +01002771 INIT_LIST_HEAD(&mlxsw_sp->br_mids.list);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002772
2773 err = mlxsw_sp_base_mac_get(mlxsw_sp);
2774 if (err) {
2775 dev_err(mlxsw_sp->bus_info->dev, "Failed to get base mac\n");
2776 return err;
2777 }
2778
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002779 err = mlxsw_sp_event_register(mlxsw_sp, MLXSW_TRAP_ID_PUDE);
2780 if (err) {
2781 dev_err(mlxsw_sp->bus_info->dev, "Failed to register for PUDE events\n");
Ido Schimmelbbf2a472016-07-02 11:00:14 +02002782 return err;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002783 }
2784
2785 err = mlxsw_sp_traps_init(mlxsw_sp);
2786 if (err) {
2787 dev_err(mlxsw_sp->bus_info->dev, "Failed to set traps for RX\n");
2788 goto err_rx_listener_register;
2789 }
2790
2791 err = mlxsw_sp_flood_init(mlxsw_sp);
2792 if (err) {
2793 dev_err(mlxsw_sp->bus_info->dev, "Failed to initialize flood tables\n");
2794 goto err_flood_init;
2795 }
2796
2797 err = mlxsw_sp_buffers_init(mlxsw_sp);
2798 if (err) {
2799 dev_err(mlxsw_sp->bus_info->dev, "Failed to initialize buffers\n");
2800 goto err_buffers_init;
2801 }
2802
Jiri Pirko0d65fc12015-12-03 12:12:28 +01002803 err = mlxsw_sp_lag_init(mlxsw_sp);
2804 if (err) {
2805 dev_err(mlxsw_sp->bus_info->dev, "Failed to initialize LAG\n");
2806 goto err_lag_init;
2807 }
2808
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002809 err = mlxsw_sp_switchdev_init(mlxsw_sp);
2810 if (err) {
2811 dev_err(mlxsw_sp->bus_info->dev, "Failed to initialize switchdev\n");
2812 goto err_switchdev_init;
2813 }
2814
Ido Schimmel464dce12016-07-02 11:00:15 +02002815 err = mlxsw_sp_router_init(mlxsw_sp);
2816 if (err) {
2817 dev_err(mlxsw_sp->bus_info->dev, "Failed to initialize router\n");
2818 goto err_router_init;
2819 }
2820
Yotam Gigi763b4b72016-07-21 12:03:17 +02002821 err = mlxsw_sp_span_init(mlxsw_sp);
2822 if (err) {
2823 dev_err(mlxsw_sp->bus_info->dev, "Failed to init span system\n");
2824 goto err_span_init;
2825 }
2826
Ido Schimmelbbf2a472016-07-02 11:00:14 +02002827 err = mlxsw_sp_ports_create(mlxsw_sp);
2828 if (err) {
2829 dev_err(mlxsw_sp->bus_info->dev, "Failed to create ports\n");
2830 goto err_ports_create;
2831 }
2832
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002833 return 0;
2834
Ido Schimmelbbf2a472016-07-02 11:00:14 +02002835err_ports_create:
Yotam Gigi763b4b72016-07-21 12:03:17 +02002836 mlxsw_sp_span_fini(mlxsw_sp);
2837err_span_init:
Ido Schimmel464dce12016-07-02 11:00:15 +02002838 mlxsw_sp_router_fini(mlxsw_sp);
2839err_router_init:
Ido Schimmelbbf2a472016-07-02 11:00:14 +02002840 mlxsw_sp_switchdev_fini(mlxsw_sp);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002841err_switchdev_init:
Jiri Pirko0d65fc12015-12-03 12:12:28 +01002842err_lag_init:
Jiri Pirko0f433fa2016-04-14 18:19:24 +02002843 mlxsw_sp_buffers_fini(mlxsw_sp);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002844err_buffers_init:
2845err_flood_init:
2846 mlxsw_sp_traps_fini(mlxsw_sp);
2847err_rx_listener_register:
2848 mlxsw_sp_event_unregister(mlxsw_sp, MLXSW_TRAP_ID_PUDE);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002849 return err;
2850}
2851
Jiri Pirkob2f10572016-04-08 19:11:23 +02002852static void mlxsw_sp_fini(struct mlxsw_core *mlxsw_core)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002853{
Jiri Pirkob2f10572016-04-08 19:11:23 +02002854 struct mlxsw_sp *mlxsw_sp = mlxsw_core_driver_priv(mlxsw_core);
Ido Schimmelfa3054f2016-07-02 11:00:16 +02002855 int i;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002856
Ido Schimmelbbf2a472016-07-02 11:00:14 +02002857 mlxsw_sp_ports_remove(mlxsw_sp);
Yotam Gigi763b4b72016-07-21 12:03:17 +02002858 mlxsw_sp_span_fini(mlxsw_sp);
Ido Schimmel464dce12016-07-02 11:00:15 +02002859 mlxsw_sp_router_fini(mlxsw_sp);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002860 mlxsw_sp_switchdev_fini(mlxsw_sp);
Jiri Pirko5113bfd2016-05-06 22:20:59 +02002861 mlxsw_sp_buffers_fini(mlxsw_sp);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002862 mlxsw_sp_traps_fini(mlxsw_sp);
2863 mlxsw_sp_event_unregister(mlxsw_sp, MLXSW_TRAP_ID_PUDE);
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02002864 WARN_ON(!list_empty(&mlxsw_sp->vfids.list));
Ido Schimmel14d39462016-06-20 23:04:15 +02002865 WARN_ON(!list_empty(&mlxsw_sp->fids));
Ido Schimmelfa3054f2016-07-02 11:00:16 +02002866 for (i = 0; i < MLXSW_SP_RIF_MAX; i++)
2867 WARN_ON_ONCE(mlxsw_sp->rifs[i]);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002868}
2869
2870static struct mlxsw_config_profile mlxsw_sp_config_profile = {
2871 .used_max_vepa_channels = 1,
2872 .max_vepa_channels = 0,
2873 .used_max_lag = 1,
Jiri Pirko0d65fc12015-12-03 12:12:28 +01002874 .max_lag = MLXSW_SP_LAG_MAX,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002875 .used_max_port_per_lag = 1,
Jiri Pirko0d65fc12015-12-03 12:12:28 +01002876 .max_port_per_lag = MLXSW_SP_PORT_PER_LAG_MAX,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002877 .used_max_mid = 1,
Elad Raz53ae6282016-01-10 21:06:26 +01002878 .max_mid = MLXSW_SP_MID_MAX,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002879 .used_max_pgt = 1,
2880 .max_pgt = 0,
2881 .used_max_system_port = 1,
2882 .max_system_port = 64,
2883 .used_max_vlan_groups = 1,
2884 .max_vlan_groups = 127,
2885 .used_max_regions = 1,
2886 .max_regions = 400,
2887 .used_flood_tables = 1,
2888 .used_flood_mode = 1,
2889 .flood_mode = 3,
2890 .max_fid_offset_flood_tables = 2,
2891 .fid_offset_flood_table_size = VLAN_N_VID - 1,
Ido Schimmel19ae6122015-12-15 16:03:39 +01002892 .max_fid_flood_tables = 2,
2893 .fid_flood_table_size = MLXSW_SP_VFID_MAX,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002894 .used_max_ib_mc = 1,
2895 .max_ib_mc = 0,
2896 .used_max_pkey = 1,
2897 .max_pkey = 0,
Jiri Pirkoc6022422016-07-05 11:27:46 +02002898 .used_kvd_sizes = 1,
2899 .kvd_linear_size = MLXSW_SP_KVD_LINEAR_SIZE,
2900 .kvd_hash_single_size = MLXSW_SP_KVD_HASH_SINGLE_SIZE,
2901 .kvd_hash_double_size = MLXSW_SP_KVD_HASH_DOUBLE_SIZE,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002902 .swid_config = {
2903 {
2904 .used_type = 1,
2905 .type = MLXSW_PORT_SWID_TYPE_ETH,
2906 }
2907 },
Nogah Frankel57d316b2016-07-21 12:03:09 +02002908 .resource_query_enable = 1,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002909};
2910
2911static struct mlxsw_driver mlxsw_sp_driver = {
Jiri Pirko2d0ed392016-04-14 18:19:30 +02002912 .kind = MLXSW_DEVICE_KIND_SPECTRUM,
2913 .owner = THIS_MODULE,
2914 .priv_size = sizeof(struct mlxsw_sp),
2915 .init = mlxsw_sp_init,
2916 .fini = mlxsw_sp_fini,
2917 .port_split = mlxsw_sp_port_split,
2918 .port_unsplit = mlxsw_sp_port_unsplit,
2919 .sb_pool_get = mlxsw_sp_sb_pool_get,
2920 .sb_pool_set = mlxsw_sp_sb_pool_set,
2921 .sb_port_pool_get = mlxsw_sp_sb_port_pool_get,
2922 .sb_port_pool_set = mlxsw_sp_sb_port_pool_set,
2923 .sb_tc_pool_bind_get = mlxsw_sp_sb_tc_pool_bind_get,
2924 .sb_tc_pool_bind_set = mlxsw_sp_sb_tc_pool_bind_set,
2925 .sb_occ_snapshot = mlxsw_sp_sb_occ_snapshot,
2926 .sb_occ_max_clear = mlxsw_sp_sb_occ_max_clear,
2927 .sb_occ_port_pool_get = mlxsw_sp_sb_occ_port_pool_get,
2928 .sb_occ_tc_port_bind_get = mlxsw_sp_sb_occ_tc_port_bind_get,
2929 .txhdr_construct = mlxsw_sp_txhdr_construct,
2930 .txhdr_len = MLXSW_TXHDR_LEN,
2931 .profile = &mlxsw_sp_config_profile,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002932};
2933
Jiri Pirko7ce856a2016-07-04 08:23:12 +02002934static bool mlxsw_sp_port_dev_check(const struct net_device *dev)
2935{
2936 return dev->netdev_ops == &mlxsw_sp_port_netdev_ops;
2937}
2938
2939static struct mlxsw_sp_port *mlxsw_sp_port_dev_lower_find(struct net_device *dev)
2940{
2941 struct net_device *lower_dev;
2942 struct list_head *iter;
2943
2944 if (mlxsw_sp_port_dev_check(dev))
2945 return netdev_priv(dev);
2946
2947 netdev_for_each_all_lower_dev(dev, lower_dev, iter) {
2948 if (mlxsw_sp_port_dev_check(lower_dev))
2949 return netdev_priv(lower_dev);
2950 }
2951 return NULL;
2952}
2953
2954static struct mlxsw_sp *mlxsw_sp_lower_get(struct net_device *dev)
2955{
2956 struct mlxsw_sp_port *mlxsw_sp_port;
2957
2958 mlxsw_sp_port = mlxsw_sp_port_dev_lower_find(dev);
2959 return mlxsw_sp_port ? mlxsw_sp_port->mlxsw_sp : NULL;
2960}
2961
2962static struct mlxsw_sp_port *mlxsw_sp_port_dev_lower_find_rcu(struct net_device *dev)
2963{
2964 struct net_device *lower_dev;
2965 struct list_head *iter;
2966
2967 if (mlxsw_sp_port_dev_check(dev))
2968 return netdev_priv(dev);
2969
2970 netdev_for_each_all_lower_dev_rcu(dev, lower_dev, iter) {
2971 if (mlxsw_sp_port_dev_check(lower_dev))
2972 return netdev_priv(lower_dev);
2973 }
2974 return NULL;
2975}
2976
2977struct mlxsw_sp_port *mlxsw_sp_port_lower_dev_hold(struct net_device *dev)
2978{
2979 struct mlxsw_sp_port *mlxsw_sp_port;
2980
2981 rcu_read_lock();
2982 mlxsw_sp_port = mlxsw_sp_port_dev_lower_find_rcu(dev);
2983 if (mlxsw_sp_port)
2984 dev_hold(mlxsw_sp_port->dev);
2985 rcu_read_unlock();
2986 return mlxsw_sp_port;
2987}
2988
2989void mlxsw_sp_port_dev_put(struct mlxsw_sp_port *mlxsw_sp_port)
2990{
2991 dev_put(mlxsw_sp_port->dev);
2992}
2993
Ido Schimmel99724c12016-07-04 08:23:14 +02002994static bool mlxsw_sp_rif_should_config(struct mlxsw_sp_rif *r,
2995 unsigned long event)
2996{
2997 switch (event) {
2998 case NETDEV_UP:
2999 if (!r)
3000 return true;
3001 r->ref_count++;
3002 return false;
3003 case NETDEV_DOWN:
3004 if (r && --r->ref_count == 0)
3005 return true;
3006 /* It is possible we already removed the RIF ourselves
3007 * if it was assigned to a netdev that is now a bridge
3008 * or LAG slave.
3009 */
3010 return false;
3011 }
3012
3013 return false;
3014}
3015
3016static int mlxsw_sp_avail_rif_get(struct mlxsw_sp *mlxsw_sp)
3017{
3018 int i;
3019
3020 for (i = 0; i < MLXSW_SP_RIF_MAX; i++)
3021 if (!mlxsw_sp->rifs[i])
3022 return i;
3023
3024 return MLXSW_SP_RIF_MAX;
3025}
3026
3027static void mlxsw_sp_vport_rif_sp_attr_get(struct mlxsw_sp_port *mlxsw_sp_vport,
3028 bool *p_lagged, u16 *p_system_port)
3029{
3030 u8 local_port = mlxsw_sp_vport->local_port;
3031
3032 *p_lagged = mlxsw_sp_vport->lagged;
3033 *p_system_port = *p_lagged ? mlxsw_sp_vport->lag_id : local_port;
3034}
3035
3036static int mlxsw_sp_vport_rif_sp_op(struct mlxsw_sp_port *mlxsw_sp_vport,
3037 struct net_device *l3_dev, u16 rif,
3038 bool create)
3039{
3040 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_vport->mlxsw_sp;
3041 bool lagged = mlxsw_sp_vport->lagged;
3042 char ritr_pl[MLXSW_REG_RITR_LEN];
3043 u16 system_port;
3044
3045 mlxsw_reg_ritr_pack(ritr_pl, create, MLXSW_REG_RITR_SP_IF, rif,
3046 l3_dev->mtu, l3_dev->dev_addr);
3047
3048 mlxsw_sp_vport_rif_sp_attr_get(mlxsw_sp_vport, &lagged, &system_port);
3049 mlxsw_reg_ritr_sp_if_pack(ritr_pl, lagged, system_port,
3050 mlxsw_sp_vport_vid_get(mlxsw_sp_vport));
3051
3052 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ritr), ritr_pl);
3053}
3054
3055static void mlxsw_sp_vport_rif_sp_leave(struct mlxsw_sp_port *mlxsw_sp_vport);
3056
3057static struct mlxsw_sp_fid *
3058mlxsw_sp_rfid_alloc(u16 fid, struct net_device *l3_dev)
3059{
3060 struct mlxsw_sp_fid *f;
3061
3062 f = kzalloc(sizeof(*f), GFP_KERNEL);
3063 if (!f)
3064 return NULL;
3065
3066 f->leave = mlxsw_sp_vport_rif_sp_leave;
3067 f->ref_count = 0;
3068 f->dev = l3_dev;
3069 f->fid = fid;
3070
3071 return f;
3072}
3073
3074static struct mlxsw_sp_rif *
3075mlxsw_sp_rif_alloc(u16 rif, struct net_device *l3_dev, struct mlxsw_sp_fid *f)
3076{
3077 struct mlxsw_sp_rif *r;
3078
3079 r = kzalloc(sizeof(*r), GFP_KERNEL);
3080 if (!r)
3081 return NULL;
3082
3083 ether_addr_copy(r->addr, l3_dev->dev_addr);
3084 r->mtu = l3_dev->mtu;
3085 r->ref_count = 1;
3086 r->dev = l3_dev;
3087 r->rif = rif;
3088 r->f = f;
3089
3090 return r;
3091}
3092
3093static struct mlxsw_sp_rif *
3094mlxsw_sp_vport_rif_sp_create(struct mlxsw_sp_port *mlxsw_sp_vport,
3095 struct net_device *l3_dev)
3096{
3097 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_vport->mlxsw_sp;
3098 struct mlxsw_sp_fid *f;
3099 struct mlxsw_sp_rif *r;
3100 u16 fid, rif;
3101 int err;
3102
3103 rif = mlxsw_sp_avail_rif_get(mlxsw_sp);
3104 if (rif == MLXSW_SP_RIF_MAX)
3105 return ERR_PTR(-ERANGE);
3106
3107 err = mlxsw_sp_vport_rif_sp_op(mlxsw_sp_vport, l3_dev, rif, true);
3108 if (err)
3109 return ERR_PTR(err);
3110
3111 fid = mlxsw_sp_rif_sp_to_fid(rif);
3112 err = mlxsw_sp_rif_fdb_op(mlxsw_sp, l3_dev->dev_addr, fid, true);
3113 if (err)
3114 goto err_rif_fdb_op;
3115
3116 f = mlxsw_sp_rfid_alloc(fid, l3_dev);
3117 if (!f) {
3118 err = -ENOMEM;
3119 goto err_rfid_alloc;
3120 }
3121
3122 r = mlxsw_sp_rif_alloc(rif, l3_dev, f);
3123 if (!r) {
3124 err = -ENOMEM;
3125 goto err_rif_alloc;
3126 }
3127
3128 f->r = r;
3129 mlxsw_sp->rifs[rif] = r;
3130
3131 return r;
3132
3133err_rif_alloc:
3134 kfree(f);
3135err_rfid_alloc:
3136 mlxsw_sp_rif_fdb_op(mlxsw_sp, l3_dev->dev_addr, fid, false);
3137err_rif_fdb_op:
3138 mlxsw_sp_vport_rif_sp_op(mlxsw_sp_vport, l3_dev, rif, false);
3139 return ERR_PTR(err);
3140}
3141
3142static void mlxsw_sp_vport_rif_sp_destroy(struct mlxsw_sp_port *mlxsw_sp_vport,
3143 struct mlxsw_sp_rif *r)
3144{
3145 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_vport->mlxsw_sp;
3146 struct net_device *l3_dev = r->dev;
3147 struct mlxsw_sp_fid *f = r->f;
3148 u16 fid = f->fid;
3149 u16 rif = r->rif;
3150
3151 mlxsw_sp->rifs[rif] = NULL;
3152 f->r = NULL;
3153
3154 kfree(r);
3155
3156 kfree(f);
3157
3158 mlxsw_sp_rif_fdb_op(mlxsw_sp, l3_dev->dev_addr, fid, false);
3159
3160 mlxsw_sp_vport_rif_sp_op(mlxsw_sp_vport, l3_dev, rif, false);
3161}
3162
3163static int mlxsw_sp_vport_rif_sp_join(struct mlxsw_sp_port *mlxsw_sp_vport,
3164 struct net_device *l3_dev)
3165{
3166 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_vport->mlxsw_sp;
3167 struct mlxsw_sp_rif *r;
3168
3169 r = mlxsw_sp_rif_find_by_dev(mlxsw_sp, l3_dev);
3170 if (!r) {
3171 r = mlxsw_sp_vport_rif_sp_create(mlxsw_sp_vport, l3_dev);
3172 if (IS_ERR(r))
3173 return PTR_ERR(r);
3174 }
3175
3176 mlxsw_sp_vport_fid_set(mlxsw_sp_vport, r->f);
3177 r->f->ref_count++;
3178
3179 netdev_dbg(mlxsw_sp_vport->dev, "Joined FID=%d\n", r->f->fid);
3180
3181 return 0;
3182}
3183
3184static void mlxsw_sp_vport_rif_sp_leave(struct mlxsw_sp_port *mlxsw_sp_vport)
3185{
3186 struct mlxsw_sp_fid *f = mlxsw_sp_vport_fid_get(mlxsw_sp_vport);
3187
3188 netdev_dbg(mlxsw_sp_vport->dev, "Left FID=%d\n", f->fid);
3189
3190 mlxsw_sp_vport_fid_set(mlxsw_sp_vport, NULL);
3191 if (--f->ref_count == 0)
3192 mlxsw_sp_vport_rif_sp_destroy(mlxsw_sp_vport, f->r);
3193}
3194
3195static int mlxsw_sp_inetaddr_vport_event(struct net_device *l3_dev,
3196 struct net_device *port_dev,
3197 unsigned long event, u16 vid)
3198{
3199 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(port_dev);
3200 struct mlxsw_sp_port *mlxsw_sp_vport;
3201
3202 mlxsw_sp_vport = mlxsw_sp_port_vport_find(mlxsw_sp_port, vid);
3203 if (WARN_ON(!mlxsw_sp_vport))
3204 return -EINVAL;
3205
3206 switch (event) {
3207 case NETDEV_UP:
3208 return mlxsw_sp_vport_rif_sp_join(mlxsw_sp_vport, l3_dev);
3209 case NETDEV_DOWN:
3210 mlxsw_sp_vport_rif_sp_leave(mlxsw_sp_vport);
3211 break;
3212 }
3213
3214 return 0;
3215}
3216
3217static int mlxsw_sp_inetaddr_port_event(struct net_device *port_dev,
3218 unsigned long event)
3219{
3220 if (netif_is_bridge_port(port_dev) || netif_is_lag_port(port_dev))
3221 return 0;
3222
3223 return mlxsw_sp_inetaddr_vport_event(port_dev, port_dev, event, 1);
3224}
3225
3226static int __mlxsw_sp_inetaddr_lag_event(struct net_device *l3_dev,
3227 struct net_device *lag_dev,
3228 unsigned long event, u16 vid)
3229{
3230 struct net_device *port_dev;
3231 struct list_head *iter;
3232 int err;
3233
3234 netdev_for_each_lower_dev(lag_dev, port_dev, iter) {
3235 if (mlxsw_sp_port_dev_check(port_dev)) {
3236 err = mlxsw_sp_inetaddr_vport_event(l3_dev, port_dev,
3237 event, vid);
3238 if (err)
3239 return err;
3240 }
3241 }
3242
3243 return 0;
3244}
3245
3246static int mlxsw_sp_inetaddr_lag_event(struct net_device *lag_dev,
3247 unsigned long event)
3248{
3249 if (netif_is_bridge_port(lag_dev))
3250 return 0;
3251
3252 return __mlxsw_sp_inetaddr_lag_event(lag_dev, lag_dev, event, 1);
3253}
3254
Ido Schimmel99f44bb2016-07-04 08:23:17 +02003255static struct mlxsw_sp_fid *mlxsw_sp_bridge_fid_get(struct mlxsw_sp *mlxsw_sp,
3256 struct net_device *l3_dev)
3257{
3258 u16 fid;
3259
3260 if (is_vlan_dev(l3_dev))
3261 fid = vlan_dev_vlan_id(l3_dev);
3262 else if (mlxsw_sp->master_bridge.dev == l3_dev)
3263 fid = 1;
3264 else
3265 return mlxsw_sp_vfid_find(mlxsw_sp, l3_dev);
3266
3267 return mlxsw_sp_fid_find(mlxsw_sp, fid);
3268}
3269
Ido Schimmelf888f582016-08-24 11:18:51 +02003270static enum mlxsw_flood_table_type mlxsw_sp_flood_table_type_get(u16 fid)
3271{
3272 return mlxsw_sp_fid_is_vfid(fid) ? MLXSW_REG_SFGC_TABLE_TYPE_FID :
3273 MLXSW_REG_SFGC_TABLE_TYPE_FID_OFFEST;
3274}
3275
3276static u16 mlxsw_sp_flood_table_index_get(u16 fid)
3277{
3278 return mlxsw_sp_fid_is_vfid(fid) ? mlxsw_sp_fid_to_vfid(fid) : fid;
3279}
3280
3281static int mlxsw_sp_router_port_flood_set(struct mlxsw_sp *mlxsw_sp, u16 fid,
3282 bool set)
3283{
3284 enum mlxsw_flood_table_type table_type;
3285 char *sftr_pl;
3286 u16 index;
3287 int err;
3288
3289 sftr_pl = kmalloc(MLXSW_REG_SFTR_LEN, GFP_KERNEL);
3290 if (!sftr_pl)
3291 return -ENOMEM;
3292
3293 table_type = mlxsw_sp_flood_table_type_get(fid);
3294 index = mlxsw_sp_flood_table_index_get(fid);
3295 mlxsw_reg_sftr_pack(sftr_pl, MLXSW_SP_FLOOD_TABLE_BM, index, table_type,
3296 1, MLXSW_PORT_ROUTER_PORT, set);
3297 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sftr), sftr_pl);
3298
3299 kfree(sftr_pl);
3300 return err;
3301}
3302
Ido Schimmel99f44bb2016-07-04 08:23:17 +02003303static enum mlxsw_reg_ritr_if_type mlxsw_sp_rif_type_get(u16 fid)
3304{
3305 if (mlxsw_sp_fid_is_vfid(fid))
3306 return MLXSW_REG_RITR_FID_IF;
3307 else
3308 return MLXSW_REG_RITR_VLAN_IF;
3309}
3310
3311static int mlxsw_sp_rif_bridge_op(struct mlxsw_sp *mlxsw_sp,
3312 struct net_device *l3_dev,
3313 u16 fid, u16 rif,
3314 bool create)
3315{
3316 enum mlxsw_reg_ritr_if_type rif_type;
3317 char ritr_pl[MLXSW_REG_RITR_LEN];
3318
3319 rif_type = mlxsw_sp_rif_type_get(fid);
3320 mlxsw_reg_ritr_pack(ritr_pl, create, rif_type, rif, l3_dev->mtu,
3321 l3_dev->dev_addr);
3322 mlxsw_reg_ritr_fid_set(ritr_pl, rif_type, fid);
3323
3324 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ritr), ritr_pl);
3325}
3326
3327static int mlxsw_sp_rif_bridge_create(struct mlxsw_sp *mlxsw_sp,
3328 struct net_device *l3_dev,
3329 struct mlxsw_sp_fid *f)
3330{
3331 struct mlxsw_sp_rif *r;
3332 u16 rif;
3333 int err;
3334
3335 rif = mlxsw_sp_avail_rif_get(mlxsw_sp);
3336 if (rif == MLXSW_SP_RIF_MAX)
3337 return -ERANGE;
3338
Ido Schimmelf888f582016-08-24 11:18:51 +02003339 err = mlxsw_sp_router_port_flood_set(mlxsw_sp, f->fid, true);
Ido Schimmel99f44bb2016-07-04 08:23:17 +02003340 if (err)
3341 return err;
3342
Ido Schimmelf888f582016-08-24 11:18:51 +02003343 err = mlxsw_sp_rif_bridge_op(mlxsw_sp, l3_dev, f->fid, rif, true);
3344 if (err)
3345 goto err_rif_bridge_op;
3346
Ido Schimmel99f44bb2016-07-04 08:23:17 +02003347 err = mlxsw_sp_rif_fdb_op(mlxsw_sp, l3_dev->dev_addr, f->fid, true);
3348 if (err)
3349 goto err_rif_fdb_op;
3350
3351 r = mlxsw_sp_rif_alloc(rif, l3_dev, f);
3352 if (!r) {
3353 err = -ENOMEM;
3354 goto err_rif_alloc;
3355 }
3356
3357 f->r = r;
3358 mlxsw_sp->rifs[rif] = r;
3359
3360 netdev_dbg(l3_dev, "RIF=%d created\n", rif);
3361
3362 return 0;
3363
3364err_rif_alloc:
3365 mlxsw_sp_rif_fdb_op(mlxsw_sp, l3_dev->dev_addr, f->fid, false);
3366err_rif_fdb_op:
3367 mlxsw_sp_rif_bridge_op(mlxsw_sp, l3_dev, f->fid, rif, false);
Ido Schimmelf888f582016-08-24 11:18:51 +02003368err_rif_bridge_op:
3369 mlxsw_sp_router_port_flood_set(mlxsw_sp, f->fid, false);
Ido Schimmel99f44bb2016-07-04 08:23:17 +02003370 return err;
3371}
3372
3373void mlxsw_sp_rif_bridge_destroy(struct mlxsw_sp *mlxsw_sp,
3374 struct mlxsw_sp_rif *r)
3375{
3376 struct net_device *l3_dev = r->dev;
3377 struct mlxsw_sp_fid *f = r->f;
3378 u16 rif = r->rif;
3379
3380 mlxsw_sp->rifs[rif] = NULL;
3381 f->r = NULL;
3382
3383 kfree(r);
3384
3385 mlxsw_sp_rif_fdb_op(mlxsw_sp, l3_dev->dev_addr, f->fid, false);
3386
3387 mlxsw_sp_rif_bridge_op(mlxsw_sp, l3_dev, f->fid, rif, false);
3388
Ido Schimmelf888f582016-08-24 11:18:51 +02003389 mlxsw_sp_router_port_flood_set(mlxsw_sp, f->fid, false);
3390
Ido Schimmel99f44bb2016-07-04 08:23:17 +02003391 netdev_dbg(l3_dev, "RIF=%d destroyed\n", rif);
3392}
3393
3394static int mlxsw_sp_inetaddr_bridge_event(struct net_device *l3_dev,
3395 struct net_device *br_dev,
3396 unsigned long event)
3397{
3398 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_lower_get(l3_dev);
3399 struct mlxsw_sp_fid *f;
3400
3401 /* FID can either be an actual FID if the L3 device is the
3402 * VLAN-aware bridge or a VLAN device on top. Otherwise, the
3403 * L3 device is a VLAN-unaware bridge and we get a vFID.
3404 */
3405 f = mlxsw_sp_bridge_fid_get(mlxsw_sp, l3_dev);
3406 if (WARN_ON(!f))
3407 return -EINVAL;
3408
3409 switch (event) {
3410 case NETDEV_UP:
3411 return mlxsw_sp_rif_bridge_create(mlxsw_sp, l3_dev, f);
3412 case NETDEV_DOWN:
3413 mlxsw_sp_rif_bridge_destroy(mlxsw_sp, f->r);
3414 break;
3415 }
3416
3417 return 0;
3418}
3419
Ido Schimmel99724c12016-07-04 08:23:14 +02003420static int mlxsw_sp_inetaddr_vlan_event(struct net_device *vlan_dev,
3421 unsigned long event)
3422{
3423 struct net_device *real_dev = vlan_dev_real_dev(vlan_dev);
Ido Schimmel99f44bb2016-07-04 08:23:17 +02003424 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_lower_get(vlan_dev);
Ido Schimmel99724c12016-07-04 08:23:14 +02003425 u16 vid = vlan_dev_vlan_id(vlan_dev);
3426
3427 if (mlxsw_sp_port_dev_check(real_dev))
3428 return mlxsw_sp_inetaddr_vport_event(vlan_dev, real_dev, event,
3429 vid);
3430 else if (netif_is_lag_master(real_dev))
3431 return __mlxsw_sp_inetaddr_lag_event(vlan_dev, real_dev, event,
3432 vid);
Ido Schimmel99f44bb2016-07-04 08:23:17 +02003433 else if (netif_is_bridge_master(real_dev) &&
3434 mlxsw_sp->master_bridge.dev == real_dev)
3435 return mlxsw_sp_inetaddr_bridge_event(vlan_dev, real_dev,
3436 event);
Ido Schimmel99724c12016-07-04 08:23:14 +02003437
3438 return 0;
3439}
3440
3441static int mlxsw_sp_inetaddr_event(struct notifier_block *unused,
3442 unsigned long event, void *ptr)
3443{
3444 struct in_ifaddr *ifa = (struct in_ifaddr *) ptr;
3445 struct net_device *dev = ifa->ifa_dev->dev;
3446 struct mlxsw_sp *mlxsw_sp;
3447 struct mlxsw_sp_rif *r;
3448 int err = 0;
3449
3450 mlxsw_sp = mlxsw_sp_lower_get(dev);
3451 if (!mlxsw_sp)
3452 goto out;
3453
3454 r = mlxsw_sp_rif_find_by_dev(mlxsw_sp, dev);
3455 if (!mlxsw_sp_rif_should_config(r, event))
3456 goto out;
3457
3458 if (mlxsw_sp_port_dev_check(dev))
3459 err = mlxsw_sp_inetaddr_port_event(dev, event);
3460 else if (netif_is_lag_master(dev))
3461 err = mlxsw_sp_inetaddr_lag_event(dev, event);
Ido Schimmel99f44bb2016-07-04 08:23:17 +02003462 else if (netif_is_bridge_master(dev))
3463 err = mlxsw_sp_inetaddr_bridge_event(dev, dev, event);
Ido Schimmel99724c12016-07-04 08:23:14 +02003464 else if (is_vlan_dev(dev))
3465 err = mlxsw_sp_inetaddr_vlan_event(dev, event);
3466
3467out:
3468 return notifier_from_errno(err);
3469}
3470
Ido Schimmel6e095fd2016-07-04 08:23:13 +02003471static int mlxsw_sp_rif_edit(struct mlxsw_sp *mlxsw_sp, u16 rif,
3472 const char *mac, int mtu)
3473{
3474 char ritr_pl[MLXSW_REG_RITR_LEN];
3475 int err;
3476
3477 mlxsw_reg_ritr_rif_pack(ritr_pl, rif);
3478 err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(ritr), ritr_pl);
3479 if (err)
3480 return err;
3481
3482 mlxsw_reg_ritr_mtu_set(ritr_pl, mtu);
3483 mlxsw_reg_ritr_if_mac_memcpy_to(ritr_pl, mac);
3484 mlxsw_reg_ritr_op_set(ritr_pl, MLXSW_REG_RITR_RIF_CREATE);
3485 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ritr), ritr_pl);
3486}
3487
3488static int mlxsw_sp_netdevice_router_port_event(struct net_device *dev)
3489{
3490 struct mlxsw_sp *mlxsw_sp;
3491 struct mlxsw_sp_rif *r;
3492 int err;
3493
3494 mlxsw_sp = mlxsw_sp_lower_get(dev);
3495 if (!mlxsw_sp)
3496 return 0;
3497
3498 r = mlxsw_sp_rif_find_by_dev(mlxsw_sp, dev);
3499 if (!r)
3500 return 0;
3501
3502 err = mlxsw_sp_rif_fdb_op(mlxsw_sp, r->addr, r->f->fid, false);
3503 if (err)
3504 return err;
3505
3506 err = mlxsw_sp_rif_edit(mlxsw_sp, r->rif, dev->dev_addr, dev->mtu);
3507 if (err)
3508 goto err_rif_edit;
3509
3510 err = mlxsw_sp_rif_fdb_op(mlxsw_sp, dev->dev_addr, r->f->fid, true);
3511 if (err)
3512 goto err_rif_fdb_op;
3513
3514 ether_addr_copy(r->addr, dev->dev_addr);
3515 r->mtu = dev->mtu;
3516
3517 netdev_dbg(dev, "Updated RIF=%d\n", r->rif);
3518
3519 return 0;
3520
3521err_rif_fdb_op:
3522 mlxsw_sp_rif_edit(mlxsw_sp, r->rif, r->addr, r->mtu);
3523err_rif_edit:
3524 mlxsw_sp_rif_fdb_op(mlxsw_sp, r->addr, r->f->fid, true);
3525 return err;
3526}
3527
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02003528static bool mlxsw_sp_lag_port_fid_member(struct mlxsw_sp_port *lag_port,
3529 u16 fid)
3530{
3531 if (mlxsw_sp_fid_is_vfid(fid))
3532 return mlxsw_sp_port_vport_find_by_fid(lag_port, fid);
3533 else
3534 return test_bit(fid, lag_port->active_vlans);
3535}
3536
3537static bool mlxsw_sp_port_fdb_should_flush(struct mlxsw_sp_port *mlxsw_sp_port,
3538 u16 fid)
Ido Schimmel039c49a2016-01-27 15:20:18 +01003539{
3540 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02003541 u8 local_port = mlxsw_sp_port->local_port;
3542 u16 lag_id = mlxsw_sp_port->lag_id;
3543 int i, count = 0;
Ido Schimmel039c49a2016-01-27 15:20:18 +01003544
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02003545 if (!mlxsw_sp_port->lagged)
3546 return true;
Ido Schimmel039c49a2016-01-27 15:20:18 +01003547
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02003548 for (i = 0; i < MLXSW_SP_PORT_PER_LAG_MAX; i++) {
3549 struct mlxsw_sp_port *lag_port;
3550
3551 lag_port = mlxsw_sp_port_lagged_get(mlxsw_sp, lag_id, i);
3552 if (!lag_port || lag_port->local_port == local_port)
3553 continue;
3554 if (mlxsw_sp_lag_port_fid_member(lag_port, fid))
3555 count++;
3556 }
3557
3558 return !count;
Ido Schimmel039c49a2016-01-27 15:20:18 +01003559}
3560
3561static int
3562mlxsw_sp_port_fdb_flush_by_port_fid(const struct mlxsw_sp_port *mlxsw_sp_port,
3563 u16 fid)
3564{
3565 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
3566 char sfdf_pl[MLXSW_REG_SFDF_LEN];
3567
3568 mlxsw_reg_sfdf_pack(sfdf_pl, MLXSW_REG_SFDF_FLUSH_PER_PORT_AND_FID);
3569 mlxsw_reg_sfdf_fid_set(sfdf_pl, fid);
3570 mlxsw_reg_sfdf_port_fid_system_port_set(sfdf_pl,
3571 mlxsw_sp_port->local_port);
3572
Ido Schimmel22305372016-06-20 23:04:21 +02003573 netdev_dbg(mlxsw_sp_port->dev, "FDB flushed using Port=%d, FID=%d\n",
3574 mlxsw_sp_port->local_port, fid);
3575
Ido Schimmel039c49a2016-01-27 15:20:18 +01003576 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sfdf), sfdf_pl);
3577}
3578
3579static int
Ido Schimmel039c49a2016-01-27 15:20:18 +01003580mlxsw_sp_port_fdb_flush_by_lag_id_fid(const struct mlxsw_sp_port *mlxsw_sp_port,
3581 u16 fid)
3582{
3583 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
3584 char sfdf_pl[MLXSW_REG_SFDF_LEN];
3585
3586 mlxsw_reg_sfdf_pack(sfdf_pl, MLXSW_REG_SFDF_FLUSH_PER_LAG_AND_FID);
3587 mlxsw_reg_sfdf_fid_set(sfdf_pl, fid);
3588 mlxsw_reg_sfdf_lag_fid_lag_id_set(sfdf_pl, mlxsw_sp_port->lag_id);
3589
Ido Schimmel22305372016-06-20 23:04:21 +02003590 netdev_dbg(mlxsw_sp_port->dev, "FDB flushed using LAG ID=%d, FID=%d\n",
3591 mlxsw_sp_port->lag_id, fid);
3592
Ido Schimmel039c49a2016-01-27 15:20:18 +01003593 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sfdf), sfdf_pl);
3594}
3595
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02003596int mlxsw_sp_port_fdb_flush(struct mlxsw_sp_port *mlxsw_sp_port, u16 fid)
Ido Schimmel039c49a2016-01-27 15:20:18 +01003597{
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02003598 if (!mlxsw_sp_port_fdb_should_flush(mlxsw_sp_port, fid))
3599 return 0;
Ido Schimmel039c49a2016-01-27 15:20:18 +01003600
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02003601 if (mlxsw_sp_port->lagged)
3602 return mlxsw_sp_port_fdb_flush_by_lag_id_fid(mlxsw_sp_port,
Ido Schimmel039c49a2016-01-27 15:20:18 +01003603 fid);
3604 else
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02003605 return mlxsw_sp_port_fdb_flush_by_port_fid(mlxsw_sp_port, fid);
Ido Schimmel039c49a2016-01-27 15:20:18 +01003606}
3607
Ido Schimmel701b1862016-07-04 08:23:16 +02003608static void mlxsw_sp_master_bridge_gone_sync(struct mlxsw_sp *mlxsw_sp)
3609{
3610 struct mlxsw_sp_fid *f, *tmp;
3611
3612 list_for_each_entry_safe(f, tmp, &mlxsw_sp->fids, list)
3613 if (--f->ref_count == 0)
3614 mlxsw_sp_fid_destroy(mlxsw_sp, f);
3615 else
3616 WARN_ON_ONCE(1);
3617}
3618
Ido Schimmel7117a572016-06-20 23:04:06 +02003619static bool mlxsw_sp_master_bridge_check(struct mlxsw_sp *mlxsw_sp,
3620 struct net_device *br_dev)
3621{
3622 return !mlxsw_sp->master_bridge.dev ||
3623 mlxsw_sp->master_bridge.dev == br_dev;
3624}
3625
3626static void mlxsw_sp_master_bridge_inc(struct mlxsw_sp *mlxsw_sp,
3627 struct net_device *br_dev)
3628{
3629 mlxsw_sp->master_bridge.dev = br_dev;
3630 mlxsw_sp->master_bridge.ref_count++;
3631}
3632
3633static void mlxsw_sp_master_bridge_dec(struct mlxsw_sp *mlxsw_sp)
3634{
Ido Schimmel701b1862016-07-04 08:23:16 +02003635 if (--mlxsw_sp->master_bridge.ref_count == 0) {
Ido Schimmel7117a572016-06-20 23:04:06 +02003636 mlxsw_sp->master_bridge.dev = NULL;
Ido Schimmel701b1862016-07-04 08:23:16 +02003637 /* It's possible upper VLAN devices are still holding
3638 * references to underlying FIDs. Drop the reference
3639 * and release the resources if it was the last one.
3640 * If it wasn't, then something bad happened.
3641 */
3642 mlxsw_sp_master_bridge_gone_sync(mlxsw_sp);
3643 }
Ido Schimmel7117a572016-06-20 23:04:06 +02003644}
3645
3646static int mlxsw_sp_port_bridge_join(struct mlxsw_sp_port *mlxsw_sp_port,
3647 struct net_device *br_dev)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003648{
3649 struct net_device *dev = mlxsw_sp_port->dev;
3650 int err;
3651
3652 /* When port is not bridged untagged packets are tagged with
3653 * PVID=VID=1, thereby creating an implicit VLAN interface in
3654 * the device. Remove it and let bridge code take care of its
3655 * own VLANs.
3656 */
3657 err = mlxsw_sp_port_kill_vid(dev, 0, 1);
Ido Schimmel6c72a3d2016-01-04 10:42:26 +01003658 if (err)
3659 return err;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003660
Ido Schimmel7117a572016-06-20 23:04:06 +02003661 mlxsw_sp_master_bridge_inc(mlxsw_sp_port->mlxsw_sp, br_dev);
3662
Ido Schimmel6c72a3d2016-01-04 10:42:26 +01003663 mlxsw_sp_port->learning = 1;
3664 mlxsw_sp_port->learning_sync = 1;
3665 mlxsw_sp_port->uc_flood = 1;
3666 mlxsw_sp_port->bridged = 1;
3667
3668 return 0;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003669}
3670
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02003671static void mlxsw_sp_port_bridge_leave(struct mlxsw_sp_port *mlxsw_sp_port)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003672{
3673 struct net_device *dev = mlxsw_sp_port->dev;
Ido Schimmel5a8f4522016-01-04 10:42:25 +01003674
Ido Schimmel28a01d22016-02-18 11:30:02 +01003675 mlxsw_sp_port_pvid_set(mlxsw_sp_port, 1);
3676
Ido Schimmel7117a572016-06-20 23:04:06 +02003677 mlxsw_sp_master_bridge_dec(mlxsw_sp_port->mlxsw_sp);
3678
Ido Schimmel6c72a3d2016-01-04 10:42:26 +01003679 mlxsw_sp_port->learning = 0;
3680 mlxsw_sp_port->learning_sync = 0;
3681 mlxsw_sp_port->uc_flood = 0;
Ido Schimmel5a8f4522016-01-04 10:42:25 +01003682 mlxsw_sp_port->bridged = 0;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003683
3684 /* Add implicit VLAN interface in the device, so that untagged
3685 * packets will be classified to the default vFID.
3686 */
Ido Schimmel82e6db02016-06-20 23:04:04 +02003687 mlxsw_sp_port_add_vid(dev, 0, 1);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003688}
3689
Jiri Pirko0d65fc12015-12-03 12:12:28 +01003690static int mlxsw_sp_lag_create(struct mlxsw_sp *mlxsw_sp, u16 lag_id)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003691{
Jiri Pirko0d65fc12015-12-03 12:12:28 +01003692 char sldr_pl[MLXSW_REG_SLDR_LEN];
3693
3694 mlxsw_reg_sldr_lag_create_pack(sldr_pl, lag_id);
3695 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sldr), sldr_pl);
3696}
3697
3698static int mlxsw_sp_lag_destroy(struct mlxsw_sp *mlxsw_sp, u16 lag_id)
3699{
3700 char sldr_pl[MLXSW_REG_SLDR_LEN];
3701
3702 mlxsw_reg_sldr_lag_destroy_pack(sldr_pl, lag_id);
3703 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sldr), sldr_pl);
3704}
3705
3706static int mlxsw_sp_lag_col_port_add(struct mlxsw_sp_port *mlxsw_sp_port,
3707 u16 lag_id, u8 port_index)
3708{
3709 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
3710 char slcor_pl[MLXSW_REG_SLCOR_LEN];
3711
3712 mlxsw_reg_slcor_port_add_pack(slcor_pl, mlxsw_sp_port->local_port,
3713 lag_id, port_index);
3714 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(slcor), slcor_pl);
3715}
3716
3717static int mlxsw_sp_lag_col_port_remove(struct mlxsw_sp_port *mlxsw_sp_port,
3718 u16 lag_id)
3719{
3720 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
3721 char slcor_pl[MLXSW_REG_SLCOR_LEN];
3722
3723 mlxsw_reg_slcor_port_remove_pack(slcor_pl, mlxsw_sp_port->local_port,
3724 lag_id);
3725 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(slcor), slcor_pl);
3726}
3727
3728static int mlxsw_sp_lag_col_port_enable(struct mlxsw_sp_port *mlxsw_sp_port,
3729 u16 lag_id)
3730{
3731 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
3732 char slcor_pl[MLXSW_REG_SLCOR_LEN];
3733
3734 mlxsw_reg_slcor_col_enable_pack(slcor_pl, mlxsw_sp_port->local_port,
3735 lag_id);
3736 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(slcor), slcor_pl);
3737}
3738
3739static int mlxsw_sp_lag_col_port_disable(struct mlxsw_sp_port *mlxsw_sp_port,
3740 u16 lag_id)
3741{
3742 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
3743 char slcor_pl[MLXSW_REG_SLCOR_LEN];
3744
3745 mlxsw_reg_slcor_col_disable_pack(slcor_pl, mlxsw_sp_port->local_port,
3746 lag_id);
3747 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(slcor), slcor_pl);
3748}
3749
3750static int mlxsw_sp_lag_index_get(struct mlxsw_sp *mlxsw_sp,
3751 struct net_device *lag_dev,
3752 u16 *p_lag_id)
3753{
3754 struct mlxsw_sp_upper *lag;
3755 int free_lag_id = -1;
3756 int i;
3757
3758 for (i = 0; i < MLXSW_SP_LAG_MAX; i++) {
3759 lag = mlxsw_sp_lag_get(mlxsw_sp, i);
3760 if (lag->ref_count) {
3761 if (lag->dev == lag_dev) {
3762 *p_lag_id = i;
3763 return 0;
3764 }
3765 } else if (free_lag_id < 0) {
3766 free_lag_id = i;
3767 }
3768 }
3769 if (free_lag_id < 0)
3770 return -EBUSY;
3771 *p_lag_id = free_lag_id;
3772 return 0;
3773}
3774
3775static bool
3776mlxsw_sp_master_lag_check(struct mlxsw_sp *mlxsw_sp,
3777 struct net_device *lag_dev,
3778 struct netdev_lag_upper_info *lag_upper_info)
3779{
3780 u16 lag_id;
3781
3782 if (mlxsw_sp_lag_index_get(mlxsw_sp, lag_dev, &lag_id) != 0)
3783 return false;
3784 if (lag_upper_info->tx_type != NETDEV_LAG_TX_TYPE_HASH)
3785 return false;
3786 return true;
3787}
3788
3789static int mlxsw_sp_port_lag_index_get(struct mlxsw_sp *mlxsw_sp,
3790 u16 lag_id, u8 *p_port_index)
3791{
3792 int i;
3793
3794 for (i = 0; i < MLXSW_SP_PORT_PER_LAG_MAX; i++) {
3795 if (!mlxsw_sp_port_lagged_get(mlxsw_sp, lag_id, i)) {
3796 *p_port_index = i;
3797 return 0;
3798 }
3799 }
3800 return -EBUSY;
3801}
3802
Ido Schimmel86bf95b2016-07-02 11:00:11 +02003803static void
3804mlxsw_sp_port_pvid_vport_lag_join(struct mlxsw_sp_port *mlxsw_sp_port,
3805 u16 lag_id)
3806{
3807 struct mlxsw_sp_port *mlxsw_sp_vport;
Ido Schimmel11943ff2016-07-02 11:00:12 +02003808 struct mlxsw_sp_fid *f;
Ido Schimmel86bf95b2016-07-02 11:00:11 +02003809
3810 mlxsw_sp_vport = mlxsw_sp_port_vport_find(mlxsw_sp_port, 1);
3811 if (WARN_ON(!mlxsw_sp_vport))
3812 return;
3813
Ido Schimmel11943ff2016-07-02 11:00:12 +02003814 /* If vPort is assigned a RIF, then leave it since it's no
3815 * longer valid.
3816 */
3817 f = mlxsw_sp_vport_fid_get(mlxsw_sp_vport);
3818 if (f)
3819 f->leave(mlxsw_sp_vport);
3820
Ido Schimmel86bf95b2016-07-02 11:00:11 +02003821 mlxsw_sp_vport->lag_id = lag_id;
3822 mlxsw_sp_vport->lagged = 1;
3823}
3824
3825static void
3826mlxsw_sp_port_pvid_vport_lag_leave(struct mlxsw_sp_port *mlxsw_sp_port)
3827{
3828 struct mlxsw_sp_port *mlxsw_sp_vport;
Ido Schimmel11943ff2016-07-02 11:00:12 +02003829 struct mlxsw_sp_fid *f;
Ido Schimmel86bf95b2016-07-02 11:00:11 +02003830
3831 mlxsw_sp_vport = mlxsw_sp_port_vport_find(mlxsw_sp_port, 1);
3832 if (WARN_ON(!mlxsw_sp_vport))
3833 return;
3834
Ido Schimmel11943ff2016-07-02 11:00:12 +02003835 f = mlxsw_sp_vport_fid_get(mlxsw_sp_vport);
3836 if (f)
3837 f->leave(mlxsw_sp_vport);
3838
Ido Schimmel86bf95b2016-07-02 11:00:11 +02003839 mlxsw_sp_vport->lagged = 0;
3840}
3841
Jiri Pirko0d65fc12015-12-03 12:12:28 +01003842static int mlxsw_sp_port_lag_join(struct mlxsw_sp_port *mlxsw_sp_port,
3843 struct net_device *lag_dev)
3844{
3845 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
3846 struct mlxsw_sp_upper *lag;
3847 u16 lag_id;
3848 u8 port_index;
3849 int err;
3850
3851 err = mlxsw_sp_lag_index_get(mlxsw_sp, lag_dev, &lag_id);
3852 if (err)
3853 return err;
3854 lag = mlxsw_sp_lag_get(mlxsw_sp, lag_id);
3855 if (!lag->ref_count) {
3856 err = mlxsw_sp_lag_create(mlxsw_sp, lag_id);
3857 if (err)
3858 return err;
3859 lag->dev = lag_dev;
3860 }
3861
3862 err = mlxsw_sp_port_lag_index_get(mlxsw_sp, lag_id, &port_index);
3863 if (err)
3864 return err;
3865 err = mlxsw_sp_lag_col_port_add(mlxsw_sp_port, lag_id, port_index);
3866 if (err)
3867 goto err_col_port_add;
3868 err = mlxsw_sp_lag_col_port_enable(mlxsw_sp_port, lag_id);
3869 if (err)
3870 goto err_col_port_enable;
3871
3872 mlxsw_core_lag_mapping_set(mlxsw_sp->core, lag_id, port_index,
3873 mlxsw_sp_port->local_port);
3874 mlxsw_sp_port->lag_id = lag_id;
3875 mlxsw_sp_port->lagged = 1;
3876 lag->ref_count++;
Ido Schimmel86bf95b2016-07-02 11:00:11 +02003877
3878 mlxsw_sp_port_pvid_vport_lag_join(mlxsw_sp_port, lag_id);
3879
Jiri Pirko0d65fc12015-12-03 12:12:28 +01003880 return 0;
3881
Ido Schimmel51554db2016-05-06 22:18:39 +02003882err_col_port_enable:
3883 mlxsw_sp_lag_col_port_remove(mlxsw_sp_port, lag_id);
Jiri Pirko0d65fc12015-12-03 12:12:28 +01003884err_col_port_add:
3885 if (!lag->ref_count)
3886 mlxsw_sp_lag_destroy(mlxsw_sp, lag_id);
Jiri Pirko0d65fc12015-12-03 12:12:28 +01003887 return err;
3888}
3889
Ido Schimmel82e6db02016-06-20 23:04:04 +02003890static void mlxsw_sp_port_lag_leave(struct mlxsw_sp_port *mlxsw_sp_port,
3891 struct net_device *lag_dev)
Jiri Pirko0d65fc12015-12-03 12:12:28 +01003892{
3893 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
Jiri Pirko0d65fc12015-12-03 12:12:28 +01003894 u16 lag_id = mlxsw_sp_port->lag_id;
Ido Schimmel1c800752016-06-20 23:04:20 +02003895 struct mlxsw_sp_upper *lag;
Jiri Pirko0d65fc12015-12-03 12:12:28 +01003896
3897 if (!mlxsw_sp_port->lagged)
Ido Schimmel82e6db02016-06-20 23:04:04 +02003898 return;
Jiri Pirko0d65fc12015-12-03 12:12:28 +01003899 lag = mlxsw_sp_lag_get(mlxsw_sp, lag_id);
3900 WARN_ON(lag->ref_count == 0);
3901
Ido Schimmel82e6db02016-06-20 23:04:04 +02003902 mlxsw_sp_lag_col_port_disable(mlxsw_sp_port, lag_id);
3903 mlxsw_sp_lag_col_port_remove(mlxsw_sp_port, lag_id);
Jiri Pirko0d65fc12015-12-03 12:12:28 +01003904
Ido Schimmel4dc236c2016-01-27 15:20:16 +01003905 if (mlxsw_sp_port->bridged) {
3906 mlxsw_sp_port_active_vlans_del(mlxsw_sp_port);
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02003907 mlxsw_sp_port_bridge_leave(mlxsw_sp_port);
Ido Schimmel4dc236c2016-01-27 15:20:16 +01003908 }
3909
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02003910 if (lag->ref_count == 1)
Ido Schimmel82e6db02016-06-20 23:04:04 +02003911 mlxsw_sp_lag_destroy(mlxsw_sp, lag_id);
Jiri Pirko0d65fc12015-12-03 12:12:28 +01003912
3913 mlxsw_core_lag_mapping_clear(mlxsw_sp->core, lag_id,
3914 mlxsw_sp_port->local_port);
3915 mlxsw_sp_port->lagged = 0;
3916 lag->ref_count--;
Ido Schimmel86bf95b2016-07-02 11:00:11 +02003917
3918 mlxsw_sp_port_pvid_vport_lag_leave(mlxsw_sp_port);
Jiri Pirko0d65fc12015-12-03 12:12:28 +01003919}
3920
Jiri Pirko74581202015-12-03 12:12:30 +01003921static int mlxsw_sp_lag_dist_port_add(struct mlxsw_sp_port *mlxsw_sp_port,
3922 u16 lag_id)
3923{
3924 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
3925 char sldr_pl[MLXSW_REG_SLDR_LEN];
3926
3927 mlxsw_reg_sldr_lag_add_port_pack(sldr_pl, lag_id,
3928 mlxsw_sp_port->local_port);
3929 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sldr), sldr_pl);
3930}
3931
3932static int mlxsw_sp_lag_dist_port_remove(struct mlxsw_sp_port *mlxsw_sp_port,
3933 u16 lag_id)
3934{
3935 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
3936 char sldr_pl[MLXSW_REG_SLDR_LEN];
3937
3938 mlxsw_reg_sldr_lag_remove_port_pack(sldr_pl, lag_id,
3939 mlxsw_sp_port->local_port);
3940 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sldr), sldr_pl);
3941}
3942
3943static int mlxsw_sp_port_lag_tx_en_set(struct mlxsw_sp_port *mlxsw_sp_port,
3944 bool lag_tx_enabled)
3945{
3946 if (lag_tx_enabled)
3947 return mlxsw_sp_lag_dist_port_add(mlxsw_sp_port,
3948 mlxsw_sp_port->lag_id);
3949 else
3950 return mlxsw_sp_lag_dist_port_remove(mlxsw_sp_port,
3951 mlxsw_sp_port->lag_id);
3952}
3953
3954static int mlxsw_sp_port_lag_changed(struct mlxsw_sp_port *mlxsw_sp_port,
3955 struct netdev_lag_lower_state_info *info)
3956{
3957 return mlxsw_sp_port_lag_tx_en_set(mlxsw_sp_port, info->tx_enabled);
3958}
3959
Ido Schimmel9589a7b52015-12-15 16:03:43 +01003960static int mlxsw_sp_port_vlan_link(struct mlxsw_sp_port *mlxsw_sp_port,
3961 struct net_device *vlan_dev)
3962{
3963 struct mlxsw_sp_port *mlxsw_sp_vport;
3964 u16 vid = vlan_dev_vlan_id(vlan_dev);
3965
3966 mlxsw_sp_vport = mlxsw_sp_port_vport_find(mlxsw_sp_port, vid);
Ido Schimmel423b9372016-06-20 23:04:03 +02003967 if (WARN_ON(!mlxsw_sp_vport))
Ido Schimmel9589a7b52015-12-15 16:03:43 +01003968 return -EINVAL;
Ido Schimmel9589a7b52015-12-15 16:03:43 +01003969
3970 mlxsw_sp_vport->dev = vlan_dev;
3971
3972 return 0;
3973}
3974
Ido Schimmel82e6db02016-06-20 23:04:04 +02003975static void mlxsw_sp_port_vlan_unlink(struct mlxsw_sp_port *mlxsw_sp_port,
3976 struct net_device *vlan_dev)
Ido Schimmel9589a7b52015-12-15 16:03:43 +01003977{
3978 struct mlxsw_sp_port *mlxsw_sp_vport;
3979 u16 vid = vlan_dev_vlan_id(vlan_dev);
3980
3981 mlxsw_sp_vport = mlxsw_sp_port_vport_find(mlxsw_sp_port, vid);
Ido Schimmel423b9372016-06-20 23:04:03 +02003982 if (WARN_ON(!mlxsw_sp_vport))
Ido Schimmel82e6db02016-06-20 23:04:04 +02003983 return;
Ido Schimmel9589a7b52015-12-15 16:03:43 +01003984
3985 mlxsw_sp_vport->dev = mlxsw_sp_port->dev;
Ido Schimmel9589a7b52015-12-15 16:03:43 +01003986}
3987
Jiri Pirko74581202015-12-03 12:12:30 +01003988static int mlxsw_sp_netdevice_port_upper_event(struct net_device *dev,
3989 unsigned long event, void *ptr)
Jiri Pirko0d65fc12015-12-03 12:12:28 +01003990{
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003991 struct netdev_notifier_changeupper_info *info;
3992 struct mlxsw_sp_port *mlxsw_sp_port;
3993 struct net_device *upper_dev;
3994 struct mlxsw_sp *mlxsw_sp;
Ido Schimmel80bedf12016-06-20 23:03:59 +02003995 int err = 0;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003996
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003997 mlxsw_sp_port = netdev_priv(dev);
3998 mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
3999 info = ptr;
4000
4001 switch (event) {
4002 case NETDEV_PRECHANGEUPPER:
4003 upper_dev = info->upper_dev;
Ido Schimmel59fe9b32016-06-20 23:04:00 +02004004 if (!is_vlan_dev(upper_dev) &&
4005 !netif_is_lag_master(upper_dev) &&
4006 !netif_is_bridge_master(upper_dev))
4007 return -EINVAL;
Ido Schimmel6ec43902016-06-20 23:04:01 +02004008 if (!info->linking)
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004009 break;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004010 /* HW limitation forbids to put ports to multiple bridges. */
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004011 if (netif_is_bridge_master(upper_dev) &&
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004012 !mlxsw_sp_master_bridge_check(mlxsw_sp, upper_dev))
Ido Schimmel80bedf12016-06-20 23:03:59 +02004013 return -EINVAL;
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004014 if (netif_is_lag_master(upper_dev) &&
4015 !mlxsw_sp_master_lag_check(mlxsw_sp, upper_dev,
4016 info->upper_info))
Ido Schimmel80bedf12016-06-20 23:03:59 +02004017 return -EINVAL;
Ido Schimmel6ec43902016-06-20 23:04:01 +02004018 if (netif_is_lag_master(upper_dev) && vlan_uses_dev(dev))
4019 return -EINVAL;
4020 if (netif_is_lag_port(dev) && is_vlan_dev(upper_dev) &&
4021 !netif_is_lag_master(vlan_dev_real_dev(upper_dev)))
4022 return -EINVAL;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004023 break;
4024 case NETDEV_CHANGEUPPER:
4025 upper_dev = info->upper_dev;
Ido Schimmel9589a7b52015-12-15 16:03:43 +01004026 if (is_vlan_dev(upper_dev)) {
Ido Schimmel80bedf12016-06-20 23:03:59 +02004027 if (info->linking)
Ido Schimmel9589a7b52015-12-15 16:03:43 +01004028 err = mlxsw_sp_port_vlan_link(mlxsw_sp_port,
4029 upper_dev);
Ido Schimmel80bedf12016-06-20 23:03:59 +02004030 else
Ido Schimmel82e6db02016-06-20 23:04:04 +02004031 mlxsw_sp_port_vlan_unlink(mlxsw_sp_port,
4032 upper_dev);
Ido Schimmel9589a7b52015-12-15 16:03:43 +01004033 } else if (netif_is_bridge_master(upper_dev)) {
Ido Schimmel7117a572016-06-20 23:04:06 +02004034 if (info->linking)
4035 err = mlxsw_sp_port_bridge_join(mlxsw_sp_port,
4036 upper_dev);
4037 else
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02004038 mlxsw_sp_port_bridge_leave(mlxsw_sp_port);
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004039 } else if (netif_is_lag_master(upper_dev)) {
Ido Schimmel80bedf12016-06-20 23:03:59 +02004040 if (info->linking)
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004041 err = mlxsw_sp_port_lag_join(mlxsw_sp_port,
4042 upper_dev);
Ido Schimmel80bedf12016-06-20 23:03:59 +02004043 else
Ido Schimmel82e6db02016-06-20 23:04:04 +02004044 mlxsw_sp_port_lag_leave(mlxsw_sp_port,
4045 upper_dev);
Ido Schimmel59fe9b32016-06-20 23:04:00 +02004046 } else {
4047 err = -EINVAL;
4048 WARN_ON(1);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004049 }
4050 break;
4051 }
4052
Ido Schimmel80bedf12016-06-20 23:03:59 +02004053 return err;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004054}
4055
Jiri Pirko74581202015-12-03 12:12:30 +01004056static int mlxsw_sp_netdevice_port_lower_event(struct net_device *dev,
4057 unsigned long event, void *ptr)
4058{
4059 struct netdev_notifier_changelowerstate_info *info;
4060 struct mlxsw_sp_port *mlxsw_sp_port;
4061 int err;
4062
4063 mlxsw_sp_port = netdev_priv(dev);
4064 info = ptr;
4065
4066 switch (event) {
4067 case NETDEV_CHANGELOWERSTATE:
4068 if (netif_is_lag_port(dev) && mlxsw_sp_port->lagged) {
4069 err = mlxsw_sp_port_lag_changed(mlxsw_sp_port,
4070 info->lower_state_info);
4071 if (err)
4072 netdev_err(dev, "Failed to reflect link aggregation lower state change\n");
4073 }
4074 break;
4075 }
4076
Ido Schimmel80bedf12016-06-20 23:03:59 +02004077 return 0;
Jiri Pirko74581202015-12-03 12:12:30 +01004078}
4079
4080static int mlxsw_sp_netdevice_port_event(struct net_device *dev,
4081 unsigned long event, void *ptr)
4082{
4083 switch (event) {
4084 case NETDEV_PRECHANGEUPPER:
4085 case NETDEV_CHANGEUPPER:
4086 return mlxsw_sp_netdevice_port_upper_event(dev, event, ptr);
4087 case NETDEV_CHANGELOWERSTATE:
4088 return mlxsw_sp_netdevice_port_lower_event(dev, event, ptr);
4089 }
4090
Ido Schimmel80bedf12016-06-20 23:03:59 +02004091 return 0;
Jiri Pirko74581202015-12-03 12:12:30 +01004092}
4093
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004094static int mlxsw_sp_netdevice_lag_event(struct net_device *lag_dev,
4095 unsigned long event, void *ptr)
4096{
4097 struct net_device *dev;
4098 struct list_head *iter;
4099 int ret;
4100
4101 netdev_for_each_lower_dev(lag_dev, dev, iter) {
4102 if (mlxsw_sp_port_dev_check(dev)) {
4103 ret = mlxsw_sp_netdevice_port_event(dev, event, ptr);
Ido Schimmel80bedf12016-06-20 23:03:59 +02004104 if (ret)
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004105 return ret;
4106 }
4107 }
4108
Ido Schimmel80bedf12016-06-20 23:03:59 +02004109 return 0;
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004110}
4111
Ido Schimmel701b1862016-07-04 08:23:16 +02004112static int mlxsw_sp_master_bridge_vlan_link(struct mlxsw_sp *mlxsw_sp,
4113 struct net_device *vlan_dev)
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004114{
Ido Schimmel701b1862016-07-04 08:23:16 +02004115 u16 fid = vlan_dev_vlan_id(vlan_dev);
Ido Schimmeld0ec8752016-06-20 23:04:12 +02004116 struct mlxsw_sp_fid *f;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004117
Ido Schimmel701b1862016-07-04 08:23:16 +02004118 f = mlxsw_sp_fid_find(mlxsw_sp, fid);
4119 if (!f) {
4120 f = mlxsw_sp_fid_create(mlxsw_sp, fid);
4121 if (IS_ERR(f))
4122 return PTR_ERR(f);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004123 }
4124
Ido Schimmel701b1862016-07-04 08:23:16 +02004125 f->ref_count++;
4126
4127 return 0;
4128}
4129
4130static void mlxsw_sp_master_bridge_vlan_unlink(struct mlxsw_sp *mlxsw_sp,
4131 struct net_device *vlan_dev)
4132{
4133 u16 fid = vlan_dev_vlan_id(vlan_dev);
4134 struct mlxsw_sp_fid *f;
4135
4136 f = mlxsw_sp_fid_find(mlxsw_sp, fid);
Ido Schimmel99f44bb2016-07-04 08:23:17 +02004137 if (f && f->r)
4138 mlxsw_sp_rif_bridge_destroy(mlxsw_sp, f->r);
Ido Schimmel701b1862016-07-04 08:23:16 +02004139 if (f && --f->ref_count == 0)
4140 mlxsw_sp_fid_destroy(mlxsw_sp, f);
4141}
4142
4143static int mlxsw_sp_netdevice_bridge_event(struct net_device *br_dev,
4144 unsigned long event, void *ptr)
4145{
4146 struct netdev_notifier_changeupper_info *info;
4147 struct net_device *upper_dev;
4148 struct mlxsw_sp *mlxsw_sp;
4149 int err;
4150
4151 mlxsw_sp = mlxsw_sp_lower_get(br_dev);
4152 if (!mlxsw_sp)
4153 return 0;
4154 if (br_dev != mlxsw_sp->master_bridge.dev)
4155 return 0;
4156
4157 info = ptr;
4158
4159 switch (event) {
4160 case NETDEV_CHANGEUPPER:
4161 upper_dev = info->upper_dev;
4162 if (!is_vlan_dev(upper_dev))
4163 break;
4164 if (info->linking) {
4165 err = mlxsw_sp_master_bridge_vlan_link(mlxsw_sp,
4166 upper_dev);
4167 if (err)
4168 return err;
4169 } else {
4170 mlxsw_sp_master_bridge_vlan_unlink(mlxsw_sp, upper_dev);
4171 }
4172 break;
4173 }
4174
4175 return 0;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004176}
4177
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004178static u16 mlxsw_sp_avail_vfid_get(const struct mlxsw_sp *mlxsw_sp)
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004179{
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004180 return find_first_zero_bit(mlxsw_sp->vfids.mapped,
Ido Schimmel99724c12016-07-04 08:23:14 +02004181 MLXSW_SP_VFID_MAX);
4182}
4183
4184static int mlxsw_sp_vfid_op(struct mlxsw_sp *mlxsw_sp, u16 fid, bool create)
4185{
4186 char sfmr_pl[MLXSW_REG_SFMR_LEN];
4187
4188 mlxsw_reg_sfmr_pack(sfmr_pl, !create, fid, 0);
4189 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sfmr), sfmr_pl);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004190}
4191
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004192static void mlxsw_sp_vport_vfid_leave(struct mlxsw_sp_port *mlxsw_sp_vport);
Ido Schimmel1c800752016-06-20 23:04:20 +02004193
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004194static struct mlxsw_sp_fid *mlxsw_sp_vfid_create(struct mlxsw_sp *mlxsw_sp,
4195 struct net_device *br_dev)
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004196{
4197 struct device *dev = mlxsw_sp->bus_info->dev;
Ido Schimmeld0ec8752016-06-20 23:04:12 +02004198 struct mlxsw_sp_fid *f;
Ido Schimmelc7e920b2016-06-20 23:04:09 +02004199 u16 vfid, fid;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004200 int err;
4201
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004202 vfid = mlxsw_sp_avail_vfid_get(mlxsw_sp);
Ido Schimmelc7e920b2016-06-20 23:04:09 +02004203 if (vfid == MLXSW_SP_VFID_MAX) {
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004204 dev_err(dev, "No available vFIDs\n");
4205 return ERR_PTR(-ERANGE);
4206 }
4207
Ido Schimmelc7e920b2016-06-20 23:04:09 +02004208 fid = mlxsw_sp_vfid_to_fid(vfid);
4209 err = mlxsw_sp_vfid_op(mlxsw_sp, fid, true);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004210 if (err) {
Ido Schimmelc7e920b2016-06-20 23:04:09 +02004211 dev_err(dev, "Failed to create FID=%d\n", fid);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004212 return ERR_PTR(err);
4213 }
4214
Ido Schimmelc7e920b2016-06-20 23:04:09 +02004215 f = kzalloc(sizeof(*f), GFP_KERNEL);
4216 if (!f)
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004217 goto err_allocate_vfid;
4218
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004219 f->leave = mlxsw_sp_vport_vfid_leave;
Ido Schimmeld0ec8752016-06-20 23:04:12 +02004220 f->fid = fid;
4221 f->dev = br_dev;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004222
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004223 list_add(&f->list, &mlxsw_sp->vfids.list);
4224 set_bit(vfid, mlxsw_sp->vfids.mapped);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004225
Ido Schimmelc7e920b2016-06-20 23:04:09 +02004226 return f;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004227
4228err_allocate_vfid:
Ido Schimmelc7e920b2016-06-20 23:04:09 +02004229 mlxsw_sp_vfid_op(mlxsw_sp, fid, false);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004230 return ERR_PTR(-ENOMEM);
4231}
4232
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004233static void mlxsw_sp_vfid_destroy(struct mlxsw_sp *mlxsw_sp,
4234 struct mlxsw_sp_fid *f)
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004235{
Ido Schimmeld0ec8752016-06-20 23:04:12 +02004236 u16 vfid = mlxsw_sp_fid_to_vfid(f->fid);
Ido Schimmel99f44bb2016-07-04 08:23:17 +02004237 u16 fid = f->fid;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004238
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004239 clear_bit(vfid, mlxsw_sp->vfids.mapped);
Ido Schimmeld0ec8752016-06-20 23:04:12 +02004240 list_del(&f->list);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004241
Ido Schimmel99f44bb2016-07-04 08:23:17 +02004242 if (f->r)
4243 mlxsw_sp_rif_bridge_destroy(mlxsw_sp, f->r);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004244
Ido Schimmeld0ec8752016-06-20 23:04:12 +02004245 kfree(f);
Ido Schimmel99f44bb2016-07-04 08:23:17 +02004246
4247 mlxsw_sp_vfid_op(mlxsw_sp, fid, false);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004248}
4249
Ido Schimmel99724c12016-07-04 08:23:14 +02004250static int mlxsw_sp_vport_fid_map(struct mlxsw_sp_port *mlxsw_sp_vport, u16 fid,
4251 bool valid)
4252{
4253 enum mlxsw_reg_svfa_mt mt = MLXSW_REG_SVFA_MT_PORT_VID_TO_FID;
4254 u16 vid = mlxsw_sp_vport_vid_get(mlxsw_sp_vport);
4255
4256 return mlxsw_sp_port_vid_to_fid_set(mlxsw_sp_vport, mt, valid, fid,
4257 vid);
4258}
4259
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004260static int mlxsw_sp_vport_vfid_join(struct mlxsw_sp_port *mlxsw_sp_vport,
4261 struct net_device *br_dev)
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004262{
Ido Schimmel0355b592016-06-20 23:04:13 +02004263 struct mlxsw_sp_fid *f;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004264 int err;
4265
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004266 f = mlxsw_sp_vfid_find(mlxsw_sp_vport->mlxsw_sp, br_dev);
Ido Schimmel0355b592016-06-20 23:04:13 +02004267 if (!f) {
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004268 f = mlxsw_sp_vfid_create(mlxsw_sp_vport->mlxsw_sp, br_dev);
Ido Schimmel0355b592016-06-20 23:04:13 +02004269 if (IS_ERR(f))
4270 return PTR_ERR(f);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004271 }
4272
Ido Schimmel0355b592016-06-20 23:04:13 +02004273 err = mlxsw_sp_vport_flood_set(mlxsw_sp_vport, f->fid, true);
4274 if (err)
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004275 goto err_vport_flood_set;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004276
Ido Schimmel0355b592016-06-20 23:04:13 +02004277 err = mlxsw_sp_vport_fid_map(mlxsw_sp_vport, f->fid, true);
4278 if (err)
4279 goto err_vport_fid_map;
Ido Schimmel6a9863a2016-02-15 13:19:54 +01004280
Ido Schimmel41b996c2016-06-20 23:04:17 +02004281 mlxsw_sp_vport_fid_set(mlxsw_sp_vport, f);
Ido Schimmel0355b592016-06-20 23:04:13 +02004282 f->ref_count++;
Ido Schimmel039c49a2016-01-27 15:20:18 +01004283
Ido Schimmel22305372016-06-20 23:04:21 +02004284 netdev_dbg(mlxsw_sp_vport->dev, "Joined FID=%d\n", f->fid);
4285
Ido Schimmel0355b592016-06-20 23:04:13 +02004286 return 0;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004287
Ido Schimmel9c4d4422016-06-20 23:04:10 +02004288err_vport_fid_map:
Ido Schimmel0355b592016-06-20 23:04:13 +02004289 mlxsw_sp_vport_flood_set(mlxsw_sp_vport, f->fid, false);
4290err_vport_flood_set:
4291 if (!f->ref_count)
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004292 mlxsw_sp_vfid_destroy(mlxsw_sp_vport->mlxsw_sp, f);
Ido Schimmel0355b592016-06-20 23:04:13 +02004293 return err;
4294}
4295
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004296static void mlxsw_sp_vport_vfid_leave(struct mlxsw_sp_port *mlxsw_sp_vport)
Ido Schimmel0355b592016-06-20 23:04:13 +02004297{
Ido Schimmel41b996c2016-06-20 23:04:17 +02004298 struct mlxsw_sp_fid *f = mlxsw_sp_vport_fid_get(mlxsw_sp_vport);
Ido Schimmel0355b592016-06-20 23:04:13 +02004299
Ido Schimmel22305372016-06-20 23:04:21 +02004300 netdev_dbg(mlxsw_sp_vport->dev, "Left FID=%d\n", f->fid);
4301
Ido Schimmel0355b592016-06-20 23:04:13 +02004302 mlxsw_sp_vport_fid_map(mlxsw_sp_vport, f->fid, false);
4303
4304 mlxsw_sp_vport_flood_set(mlxsw_sp_vport, f->fid, false);
4305
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02004306 mlxsw_sp_port_fdb_flush(mlxsw_sp_vport, f->fid);
4307
Ido Schimmel41b996c2016-06-20 23:04:17 +02004308 mlxsw_sp_vport_fid_set(mlxsw_sp_vport, NULL);
Ido Schimmel0355b592016-06-20 23:04:13 +02004309 if (--f->ref_count == 0)
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004310 mlxsw_sp_vfid_destroy(mlxsw_sp_vport->mlxsw_sp, f);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004311}
4312
4313static int mlxsw_sp_vport_bridge_join(struct mlxsw_sp_port *mlxsw_sp_vport,
4314 struct net_device *br_dev)
4315{
Ido Schimmel99724c12016-07-04 08:23:14 +02004316 struct mlxsw_sp_fid *f = mlxsw_sp_vport_fid_get(mlxsw_sp_vport);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004317 u16 vid = mlxsw_sp_vport_vid_get(mlxsw_sp_vport);
4318 struct net_device *dev = mlxsw_sp_vport->dev;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004319 int err;
4320
Ido Schimmel99724c12016-07-04 08:23:14 +02004321 if (f && !WARN_ON(!f->leave))
4322 f->leave(mlxsw_sp_vport);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004323
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004324 err = mlxsw_sp_vport_vfid_join(mlxsw_sp_vport, br_dev);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004325 if (err) {
Ido Schimmel0355b592016-06-20 23:04:13 +02004326 netdev_err(dev, "Failed to join vFID\n");
Ido Schimmel99724c12016-07-04 08:23:14 +02004327 return err;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004328 }
4329
4330 err = mlxsw_sp_port_vid_learning_set(mlxsw_sp_vport, vid, true);
4331 if (err) {
4332 netdev_err(dev, "Failed to enable learning\n");
4333 goto err_port_vid_learning_set;
4334 }
4335
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004336 mlxsw_sp_vport->learning = 1;
4337 mlxsw_sp_vport->learning_sync = 1;
4338 mlxsw_sp_vport->uc_flood = 1;
4339 mlxsw_sp_vport->bridged = 1;
4340
4341 return 0;
4342
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004343err_port_vid_learning_set:
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004344 mlxsw_sp_vport_vfid_leave(mlxsw_sp_vport);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004345 return err;
4346}
4347
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02004348static void mlxsw_sp_vport_bridge_leave(struct mlxsw_sp_port *mlxsw_sp_vport)
Ido Schimmel0355b592016-06-20 23:04:13 +02004349{
4350 u16 vid = mlxsw_sp_vport_vid_get(mlxsw_sp_vport);
Ido Schimmel0355b592016-06-20 23:04:13 +02004351
4352 mlxsw_sp_port_vid_learning_set(mlxsw_sp_vport, vid, false);
4353
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004354 mlxsw_sp_vport_vfid_leave(mlxsw_sp_vport);
Ido Schimmel0355b592016-06-20 23:04:13 +02004355
Ido Schimmel0355b592016-06-20 23:04:13 +02004356 mlxsw_sp_vport->learning = 0;
4357 mlxsw_sp_vport->learning_sync = 0;
4358 mlxsw_sp_vport->uc_flood = 0;
4359 mlxsw_sp_vport->bridged = 0;
4360}
4361
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004362static bool
4363mlxsw_sp_port_master_bridge_check(const struct mlxsw_sp_port *mlxsw_sp_port,
4364 const struct net_device *br_dev)
4365{
4366 struct mlxsw_sp_port *mlxsw_sp_vport;
4367
4368 list_for_each_entry(mlxsw_sp_vport, &mlxsw_sp_port->vports_list,
4369 vport.list) {
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004370 struct net_device *dev = mlxsw_sp_vport_dev_get(mlxsw_sp_vport);
Ido Schimmel56918b62016-06-20 23:04:18 +02004371
4372 if (dev && dev == br_dev)
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004373 return false;
4374 }
4375
4376 return true;
4377}
4378
4379static int mlxsw_sp_netdevice_vport_event(struct net_device *dev,
4380 unsigned long event, void *ptr,
4381 u16 vid)
4382{
4383 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
4384 struct netdev_notifier_changeupper_info *info = ptr;
4385 struct mlxsw_sp_port *mlxsw_sp_vport;
4386 struct net_device *upper_dev;
Ido Schimmel80bedf12016-06-20 23:03:59 +02004387 int err = 0;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004388
4389 mlxsw_sp_vport = mlxsw_sp_port_vport_find(mlxsw_sp_port, vid);
4390
4391 switch (event) {
4392 case NETDEV_PRECHANGEUPPER:
4393 upper_dev = info->upper_dev;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004394 if (!netif_is_bridge_master(upper_dev))
Ido Schimmel80bedf12016-06-20 23:03:59 +02004395 return -EINVAL;
Ido Schimmelddbe9932016-06-20 23:04:02 +02004396 if (!info->linking)
4397 break;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004398 /* We can't have multiple VLAN interfaces configured on
4399 * the same port and being members in the same bridge.
4400 */
4401 if (!mlxsw_sp_port_master_bridge_check(mlxsw_sp_port,
4402 upper_dev))
Ido Schimmel80bedf12016-06-20 23:03:59 +02004403 return -EINVAL;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004404 break;
4405 case NETDEV_CHANGEUPPER:
4406 upper_dev = info->upper_dev;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004407 if (info->linking) {
Ido Schimmel423b9372016-06-20 23:04:03 +02004408 if (WARN_ON(!mlxsw_sp_vport))
Ido Schimmel80bedf12016-06-20 23:03:59 +02004409 return -EINVAL;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004410 err = mlxsw_sp_vport_bridge_join(mlxsw_sp_vport,
4411 upper_dev);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004412 } else {
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004413 if (!mlxsw_sp_vport)
Ido Schimmel80bedf12016-06-20 23:03:59 +02004414 return 0;
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02004415 mlxsw_sp_vport_bridge_leave(mlxsw_sp_vport);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004416 }
4417 }
4418
Ido Schimmel80bedf12016-06-20 23:03:59 +02004419 return err;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004420}
4421
Ido Schimmel272c4472015-12-15 16:03:47 +01004422static int mlxsw_sp_netdevice_lag_vport_event(struct net_device *lag_dev,
4423 unsigned long event, void *ptr,
4424 u16 vid)
4425{
4426 struct net_device *dev;
4427 struct list_head *iter;
4428 int ret;
4429
4430 netdev_for_each_lower_dev(lag_dev, dev, iter) {
4431 if (mlxsw_sp_port_dev_check(dev)) {
4432 ret = mlxsw_sp_netdevice_vport_event(dev, event, ptr,
4433 vid);
Ido Schimmel80bedf12016-06-20 23:03:59 +02004434 if (ret)
Ido Schimmel272c4472015-12-15 16:03:47 +01004435 return ret;
4436 }
4437 }
4438
Ido Schimmel80bedf12016-06-20 23:03:59 +02004439 return 0;
Ido Schimmel272c4472015-12-15 16:03:47 +01004440}
4441
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004442static int mlxsw_sp_netdevice_vlan_event(struct net_device *vlan_dev,
4443 unsigned long event, void *ptr)
4444{
4445 struct net_device *real_dev = vlan_dev_real_dev(vlan_dev);
4446 u16 vid = vlan_dev_vlan_id(vlan_dev);
4447
Ido Schimmel272c4472015-12-15 16:03:47 +01004448 if (mlxsw_sp_port_dev_check(real_dev))
4449 return mlxsw_sp_netdevice_vport_event(real_dev, event, ptr,
4450 vid);
4451 else if (netif_is_lag_master(real_dev))
4452 return mlxsw_sp_netdevice_lag_vport_event(real_dev, event, ptr,
4453 vid);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004454
Ido Schimmel80bedf12016-06-20 23:03:59 +02004455 return 0;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004456}
4457
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004458static int mlxsw_sp_netdevice_event(struct notifier_block *unused,
4459 unsigned long event, void *ptr)
4460{
4461 struct net_device *dev = netdev_notifier_info_to_dev(ptr);
Ido Schimmel80bedf12016-06-20 23:03:59 +02004462 int err = 0;
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004463
Ido Schimmel6e095fd2016-07-04 08:23:13 +02004464 if (event == NETDEV_CHANGEADDR || event == NETDEV_CHANGEMTU)
4465 err = mlxsw_sp_netdevice_router_port_event(dev);
4466 else if (mlxsw_sp_port_dev_check(dev))
Ido Schimmel80bedf12016-06-20 23:03:59 +02004467 err = mlxsw_sp_netdevice_port_event(dev, event, ptr);
4468 else if (netif_is_lag_master(dev))
4469 err = mlxsw_sp_netdevice_lag_event(dev, event, ptr);
Ido Schimmel701b1862016-07-04 08:23:16 +02004470 else if (netif_is_bridge_master(dev))
4471 err = mlxsw_sp_netdevice_bridge_event(dev, event, ptr);
Ido Schimmel80bedf12016-06-20 23:03:59 +02004472 else if (is_vlan_dev(dev))
4473 err = mlxsw_sp_netdevice_vlan_event(dev, event, ptr);
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004474
Ido Schimmel80bedf12016-06-20 23:03:59 +02004475 return notifier_from_errno(err);
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004476}
4477
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004478static struct notifier_block mlxsw_sp_netdevice_nb __read_mostly = {
4479 .notifier_call = mlxsw_sp_netdevice_event,
4480};
4481
Ido Schimmel99724c12016-07-04 08:23:14 +02004482static struct notifier_block mlxsw_sp_inetaddr_nb __read_mostly = {
4483 .notifier_call = mlxsw_sp_inetaddr_event,
4484 .priority = 10, /* Must be called before FIB notifier block */
4485};
4486
Jiri Pirkoe7322632016-09-01 10:37:43 +02004487static struct notifier_block mlxsw_sp_router_netevent_nb __read_mostly = {
4488 .notifier_call = mlxsw_sp_router_netevent_event,
4489};
4490
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004491static int __init mlxsw_sp_module_init(void)
4492{
4493 int err;
4494
4495 register_netdevice_notifier(&mlxsw_sp_netdevice_nb);
Ido Schimmel99724c12016-07-04 08:23:14 +02004496 register_inetaddr_notifier(&mlxsw_sp_inetaddr_nb);
Jiri Pirkoe7322632016-09-01 10:37:43 +02004497 register_netevent_notifier(&mlxsw_sp_router_netevent_nb);
4498
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004499 err = mlxsw_core_driver_register(&mlxsw_sp_driver);
4500 if (err)
4501 goto err_core_driver_register;
4502 return 0;
4503
4504err_core_driver_register:
Jiri Pirkoe7322632016-09-01 10:37:43 +02004505 unregister_netevent_notifier(&mlxsw_sp_router_netevent_nb);
Jiri Pirkode7d6292016-09-01 10:37:42 +02004506 unregister_inetaddr_notifier(&mlxsw_sp_inetaddr_nb);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004507 unregister_netdevice_notifier(&mlxsw_sp_netdevice_nb);
4508 return err;
4509}
4510
4511static void __exit mlxsw_sp_module_exit(void)
4512{
4513 mlxsw_core_driver_unregister(&mlxsw_sp_driver);
Jiri Pirkoe7322632016-09-01 10:37:43 +02004514 unregister_netevent_notifier(&mlxsw_sp_router_netevent_nb);
Ido Schimmel99724c12016-07-04 08:23:14 +02004515 unregister_inetaddr_notifier(&mlxsw_sp_inetaddr_nb);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004516 unregister_netdevice_notifier(&mlxsw_sp_netdevice_nb);
4517}
4518
4519module_init(mlxsw_sp_module_init);
4520module_exit(mlxsw_sp_module_exit);
4521
4522MODULE_LICENSE("Dual BSD/GPL");
4523MODULE_AUTHOR("Jiri Pirko <jiri@mellanox.com>");
4524MODULE_DESCRIPTION("Mellanox Spectrum driver");
4525MODULE_MLXSW_DRIVER_ALIAS(MLXSW_DEVICE_KIND_SPECTRUM);