blob: 171f8dd19efa4b4dd7ce9ef7d6ed9589b5e59b8c [file] [log] [blame]
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001/*
2 * drivers/net/ethernet/mellanox/mlxsw/spectrum.c
3 * Copyright (c) 2015 Mellanox Technologies. All rights reserved.
4 * Copyright (c) 2015 Jiri Pirko <jiri@mellanox.com>
5 * Copyright (c) 2015 Ido Schimmel <idosch@mellanox.com>
6 * Copyright (c) 2015 Elad Raz <eladr@mellanox.com>
7 *
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions are met:
10 *
11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the distribution.
16 * 3. Neither the names of the copyright holders nor the names of its
17 * contributors may be used to endorse or promote products derived from
18 * this software without specific prior written permission.
19 *
20 * Alternatively, this software may be distributed under the terms of the
21 * GNU General Public License ("GPL") version 2 as published by the Free
22 * Software Foundation.
23 *
24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
27 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
28 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
29 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
30 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
31 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
32 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
33 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
34 * POSSIBILITY OF SUCH DAMAGE.
35 */
36
37#include <linux/kernel.h>
38#include <linux/module.h>
39#include <linux/types.h>
40#include <linux/netdevice.h>
41#include <linux/etherdevice.h>
42#include <linux/ethtool.h>
43#include <linux/slab.h>
44#include <linux/device.h>
45#include <linux/skbuff.h>
46#include <linux/if_vlan.h>
47#include <linux/if_bridge.h>
48#include <linux/workqueue.h>
49#include <linux/jiffies.h>
50#include <linux/bitops.h>
Ido Schimmel7f71eb42015-12-15 16:03:37 +010051#include <linux/list.h>
Ido Schimmel80bedf12016-06-20 23:03:59 +020052#include <linux/notifier.h>
Ido Schimmel90183b92016-04-06 17:10:08 +020053#include <linux/dcbnl.h>
Ido Schimmel99724c12016-07-04 08:23:14 +020054#include <linux/inetdevice.h>
Jiri Pirko56ade8f2015-10-16 14:01:37 +020055#include <net/switchdev.h>
56#include <generated/utsrelease.h>
Yotam Gigi763b4b72016-07-21 12:03:17 +020057#include <net/pkt_cls.h>
58#include <net/tc_act/tc_mirred.h>
Jiri Pirkoe7322632016-09-01 10:37:43 +020059#include <net/netevent.h>
Jiri Pirko56ade8f2015-10-16 14:01:37 +020060
61#include "spectrum.h"
62#include "core.h"
63#include "reg.h"
64#include "port.h"
65#include "trap.h"
66#include "txheader.h"
67
68static const char mlxsw_sp_driver_name[] = "mlxsw_spectrum";
69static const char mlxsw_sp_driver_version[] = "1.0";
70
71/* tx_hdr_version
72 * Tx header version.
73 * Must be set to 1.
74 */
75MLXSW_ITEM32(tx, hdr, version, 0x00, 28, 4);
76
77/* tx_hdr_ctl
78 * Packet control type.
79 * 0 - Ethernet control (e.g. EMADs, LACP)
80 * 1 - Ethernet data
81 */
82MLXSW_ITEM32(tx, hdr, ctl, 0x00, 26, 2);
83
84/* tx_hdr_proto
85 * Packet protocol type. Must be set to 1 (Ethernet).
86 */
87MLXSW_ITEM32(tx, hdr, proto, 0x00, 21, 3);
88
89/* tx_hdr_rx_is_router
90 * Packet is sent from the router. Valid for data packets only.
91 */
92MLXSW_ITEM32(tx, hdr, rx_is_router, 0x00, 19, 1);
93
94/* tx_hdr_fid_valid
95 * Indicates if the 'fid' field is valid and should be used for
96 * forwarding lookup. Valid for data packets only.
97 */
98MLXSW_ITEM32(tx, hdr, fid_valid, 0x00, 16, 1);
99
100/* tx_hdr_swid
101 * Switch partition ID. Must be set to 0.
102 */
103MLXSW_ITEM32(tx, hdr, swid, 0x00, 12, 3);
104
105/* tx_hdr_control_tclass
106 * Indicates if the packet should use the control TClass and not one
107 * of the data TClasses.
108 */
109MLXSW_ITEM32(tx, hdr, control_tclass, 0x00, 6, 1);
110
111/* tx_hdr_etclass
112 * Egress TClass to be used on the egress device on the egress port.
113 */
114MLXSW_ITEM32(tx, hdr, etclass, 0x00, 0, 4);
115
116/* tx_hdr_port_mid
117 * Destination local port for unicast packets.
118 * Destination multicast ID for multicast packets.
119 *
120 * Control packets are directed to a specific egress port, while data
121 * packets are transmitted through the CPU port (0) into the switch partition,
122 * where forwarding rules are applied.
123 */
124MLXSW_ITEM32(tx, hdr, port_mid, 0x04, 16, 16);
125
126/* tx_hdr_fid
127 * Forwarding ID used for L2 forwarding lookup. Valid only if 'fid_valid' is
128 * set, otherwise calculated based on the packet's VID using VID to FID mapping.
129 * Valid for data packets only.
130 */
131MLXSW_ITEM32(tx, hdr, fid, 0x08, 0, 16);
132
133/* tx_hdr_type
134 * 0 - Data packets
135 * 6 - Control packets
136 */
137MLXSW_ITEM32(tx, hdr, type, 0x0C, 0, 4);
138
Yotam Gigi763b4b72016-07-21 12:03:17 +0200139static bool mlxsw_sp_port_dev_check(const struct net_device *dev);
140
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200141static void mlxsw_sp_txhdr_construct(struct sk_buff *skb,
142 const struct mlxsw_tx_info *tx_info)
143{
144 char *txhdr = skb_push(skb, MLXSW_TXHDR_LEN);
145
146 memset(txhdr, 0, MLXSW_TXHDR_LEN);
147
148 mlxsw_tx_hdr_version_set(txhdr, MLXSW_TXHDR_VERSION_1);
149 mlxsw_tx_hdr_ctl_set(txhdr, MLXSW_TXHDR_ETH_CTL);
150 mlxsw_tx_hdr_proto_set(txhdr, MLXSW_TXHDR_PROTO_ETH);
151 mlxsw_tx_hdr_swid_set(txhdr, 0);
152 mlxsw_tx_hdr_control_tclass_set(txhdr, 1);
153 mlxsw_tx_hdr_port_mid_set(txhdr, tx_info->local_port);
154 mlxsw_tx_hdr_type_set(txhdr, MLXSW_TXHDR_TYPE_CONTROL);
155}
156
157static int mlxsw_sp_base_mac_get(struct mlxsw_sp *mlxsw_sp)
158{
159 char spad_pl[MLXSW_REG_SPAD_LEN];
160 int err;
161
162 err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(spad), spad_pl);
163 if (err)
164 return err;
165 mlxsw_reg_spad_base_mac_memcpy_from(spad_pl, mlxsw_sp->base_mac);
166 return 0;
167}
168
Yotam Gigi763b4b72016-07-21 12:03:17 +0200169static int mlxsw_sp_span_init(struct mlxsw_sp *mlxsw_sp)
170{
171 struct mlxsw_resources *resources;
172 int i;
173
174 resources = mlxsw_core_resources_get(mlxsw_sp->core);
175 if (!resources->max_span_valid)
176 return -EIO;
177
178 mlxsw_sp->span.entries_count = resources->max_span;
179 mlxsw_sp->span.entries = kcalloc(mlxsw_sp->span.entries_count,
180 sizeof(struct mlxsw_sp_span_entry),
181 GFP_KERNEL);
182 if (!mlxsw_sp->span.entries)
183 return -ENOMEM;
184
185 for (i = 0; i < mlxsw_sp->span.entries_count; i++)
186 INIT_LIST_HEAD(&mlxsw_sp->span.entries[i].bound_ports_list);
187
188 return 0;
189}
190
191static void mlxsw_sp_span_fini(struct mlxsw_sp *mlxsw_sp)
192{
193 int i;
194
195 for (i = 0; i < mlxsw_sp->span.entries_count; i++) {
196 struct mlxsw_sp_span_entry *curr = &mlxsw_sp->span.entries[i];
197
198 WARN_ON_ONCE(!list_empty(&curr->bound_ports_list));
199 }
200 kfree(mlxsw_sp->span.entries);
201}
202
203static struct mlxsw_sp_span_entry *
204mlxsw_sp_span_entry_create(struct mlxsw_sp_port *port)
205{
206 struct mlxsw_sp *mlxsw_sp = port->mlxsw_sp;
207 struct mlxsw_sp_span_entry *span_entry;
208 char mpat_pl[MLXSW_REG_MPAT_LEN];
209 u8 local_port = port->local_port;
210 int index;
211 int i;
212 int err;
213
214 /* find a free entry to use */
215 index = -1;
216 for (i = 0; i < mlxsw_sp->span.entries_count; i++) {
217 if (!mlxsw_sp->span.entries[i].used) {
218 index = i;
219 span_entry = &mlxsw_sp->span.entries[i];
220 break;
221 }
222 }
223 if (index < 0)
224 return NULL;
225
226 /* create a new port analayzer entry for local_port */
227 mlxsw_reg_mpat_pack(mpat_pl, index, local_port, true);
228 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(mpat), mpat_pl);
229 if (err)
230 return NULL;
231
232 span_entry->used = true;
233 span_entry->id = index;
234 span_entry->ref_count = 0;
235 span_entry->local_port = local_port;
236 return span_entry;
237}
238
239static void mlxsw_sp_span_entry_destroy(struct mlxsw_sp *mlxsw_sp,
240 struct mlxsw_sp_span_entry *span_entry)
241{
242 u8 local_port = span_entry->local_port;
243 char mpat_pl[MLXSW_REG_MPAT_LEN];
244 int pa_id = span_entry->id;
245
246 mlxsw_reg_mpat_pack(mpat_pl, pa_id, local_port, false);
247 mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(mpat), mpat_pl);
248 span_entry->used = false;
249}
250
251struct mlxsw_sp_span_entry *mlxsw_sp_span_entry_find(struct mlxsw_sp_port *port)
252{
253 struct mlxsw_sp *mlxsw_sp = port->mlxsw_sp;
254 int i;
255
256 for (i = 0; i < mlxsw_sp->span.entries_count; i++) {
257 struct mlxsw_sp_span_entry *curr = &mlxsw_sp->span.entries[i];
258
259 if (curr->used && curr->local_port == port->local_port)
260 return curr;
261 }
262 return NULL;
263}
264
265struct mlxsw_sp_span_entry *mlxsw_sp_span_entry_get(struct mlxsw_sp_port *port)
266{
267 struct mlxsw_sp_span_entry *span_entry;
268
269 span_entry = mlxsw_sp_span_entry_find(port);
270 if (span_entry) {
271 span_entry->ref_count++;
272 return span_entry;
273 }
274
275 return mlxsw_sp_span_entry_create(port);
276}
277
278static int mlxsw_sp_span_entry_put(struct mlxsw_sp *mlxsw_sp,
279 struct mlxsw_sp_span_entry *span_entry)
280{
281 if (--span_entry->ref_count == 0)
282 mlxsw_sp_span_entry_destroy(mlxsw_sp, span_entry);
283 return 0;
284}
285
286static bool mlxsw_sp_span_is_egress_mirror(struct mlxsw_sp_port *port)
287{
288 struct mlxsw_sp *mlxsw_sp = port->mlxsw_sp;
289 struct mlxsw_sp_span_inspected_port *p;
290 int i;
291
292 for (i = 0; i < mlxsw_sp->span.entries_count; i++) {
293 struct mlxsw_sp_span_entry *curr = &mlxsw_sp->span.entries[i];
294
295 list_for_each_entry(p, &curr->bound_ports_list, list)
296 if (p->local_port == port->local_port &&
297 p->type == MLXSW_SP_SPAN_EGRESS)
298 return true;
299 }
300
301 return false;
302}
303
304static int mlxsw_sp_span_mtu_to_buffsize(int mtu)
305{
306 return MLXSW_SP_BYTES_TO_CELLS(mtu * 5 / 2) + 1;
307}
308
309static int mlxsw_sp_span_port_mtu_update(struct mlxsw_sp_port *port, u16 mtu)
310{
311 struct mlxsw_sp *mlxsw_sp = port->mlxsw_sp;
312 char sbib_pl[MLXSW_REG_SBIB_LEN];
313 int err;
314
315 /* If port is egress mirrored, the shared buffer size should be
316 * updated according to the mtu value
317 */
318 if (mlxsw_sp_span_is_egress_mirror(port)) {
319 mlxsw_reg_sbib_pack(sbib_pl, port->local_port,
320 mlxsw_sp_span_mtu_to_buffsize(mtu));
321 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sbib), sbib_pl);
322 if (err) {
323 netdev_err(port->dev, "Could not update shared buffer for mirroring\n");
324 return err;
325 }
326 }
327
328 return 0;
329}
330
331static struct mlxsw_sp_span_inspected_port *
332mlxsw_sp_span_entry_bound_port_find(struct mlxsw_sp_port *port,
333 struct mlxsw_sp_span_entry *span_entry)
334{
335 struct mlxsw_sp_span_inspected_port *p;
336
337 list_for_each_entry(p, &span_entry->bound_ports_list, list)
338 if (port->local_port == p->local_port)
339 return p;
340 return NULL;
341}
342
343static int
344mlxsw_sp_span_inspected_port_bind(struct mlxsw_sp_port *port,
345 struct mlxsw_sp_span_entry *span_entry,
346 enum mlxsw_sp_span_type type)
347{
348 struct mlxsw_sp_span_inspected_port *inspected_port;
349 struct mlxsw_sp *mlxsw_sp = port->mlxsw_sp;
350 char mpar_pl[MLXSW_REG_MPAR_LEN];
351 char sbib_pl[MLXSW_REG_SBIB_LEN];
352 int pa_id = span_entry->id;
353 int err;
354
355 /* if it is an egress SPAN, bind a shared buffer to it */
356 if (type == MLXSW_SP_SPAN_EGRESS) {
357 mlxsw_reg_sbib_pack(sbib_pl, port->local_port,
358 mlxsw_sp_span_mtu_to_buffsize(port->dev->mtu));
359 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sbib), sbib_pl);
360 if (err) {
361 netdev_err(port->dev, "Could not create shared buffer for mirroring\n");
362 return err;
363 }
364 }
365
366 /* bind the port to the SPAN entry */
367 mlxsw_reg_mpar_pack(mpar_pl, port->local_port, type, true, pa_id);
368 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(mpar), mpar_pl);
369 if (err)
370 goto err_mpar_reg_write;
371
372 inspected_port = kzalloc(sizeof(*inspected_port), GFP_KERNEL);
373 if (!inspected_port) {
374 err = -ENOMEM;
375 goto err_inspected_port_alloc;
376 }
377 inspected_port->local_port = port->local_port;
378 inspected_port->type = type;
379 list_add_tail(&inspected_port->list, &span_entry->bound_ports_list);
380
381 return 0;
382
383err_mpar_reg_write:
384err_inspected_port_alloc:
385 if (type == MLXSW_SP_SPAN_EGRESS) {
386 mlxsw_reg_sbib_pack(sbib_pl, port->local_port, 0);
387 mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sbib), sbib_pl);
388 }
389 return err;
390}
391
392static void
393mlxsw_sp_span_inspected_port_unbind(struct mlxsw_sp_port *port,
394 struct mlxsw_sp_span_entry *span_entry,
395 enum mlxsw_sp_span_type type)
396{
397 struct mlxsw_sp_span_inspected_port *inspected_port;
398 struct mlxsw_sp *mlxsw_sp = port->mlxsw_sp;
399 char mpar_pl[MLXSW_REG_MPAR_LEN];
400 char sbib_pl[MLXSW_REG_SBIB_LEN];
401 int pa_id = span_entry->id;
402
403 inspected_port = mlxsw_sp_span_entry_bound_port_find(port, span_entry);
404 if (!inspected_port)
405 return;
406
407 /* remove the inspected port */
408 mlxsw_reg_mpar_pack(mpar_pl, port->local_port, type, false, pa_id);
409 mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(mpar), mpar_pl);
410
411 /* remove the SBIB buffer if it was egress SPAN */
412 if (type == MLXSW_SP_SPAN_EGRESS) {
413 mlxsw_reg_sbib_pack(sbib_pl, port->local_port, 0);
414 mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sbib), sbib_pl);
415 }
416
417 mlxsw_sp_span_entry_put(mlxsw_sp, span_entry);
418
419 list_del(&inspected_port->list);
420 kfree(inspected_port);
421}
422
423static int mlxsw_sp_span_mirror_add(struct mlxsw_sp_port *from,
424 struct mlxsw_sp_port *to,
425 enum mlxsw_sp_span_type type)
426{
427 struct mlxsw_sp *mlxsw_sp = from->mlxsw_sp;
428 struct mlxsw_sp_span_entry *span_entry;
429 int err;
430
431 span_entry = mlxsw_sp_span_entry_get(to);
432 if (!span_entry)
433 return -ENOENT;
434
435 netdev_dbg(from->dev, "Adding inspected port to SPAN entry %d\n",
436 span_entry->id);
437
438 err = mlxsw_sp_span_inspected_port_bind(from, span_entry, type);
439 if (err)
440 goto err_port_bind;
441
442 return 0;
443
444err_port_bind:
445 mlxsw_sp_span_entry_put(mlxsw_sp, span_entry);
446 return err;
447}
448
449static void mlxsw_sp_span_mirror_remove(struct mlxsw_sp_port *from,
450 struct mlxsw_sp_port *to,
451 enum mlxsw_sp_span_type type)
452{
453 struct mlxsw_sp_span_entry *span_entry;
454
455 span_entry = mlxsw_sp_span_entry_find(to);
456 if (!span_entry) {
457 netdev_err(from->dev, "no span entry found\n");
458 return;
459 }
460
461 netdev_dbg(from->dev, "removing inspected port from SPAN entry %d\n",
462 span_entry->id);
463 mlxsw_sp_span_inspected_port_unbind(from, span_entry, type);
464}
465
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200466static int mlxsw_sp_port_admin_status_set(struct mlxsw_sp_port *mlxsw_sp_port,
467 bool is_up)
468{
469 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
470 char paos_pl[MLXSW_REG_PAOS_LEN];
471
472 mlxsw_reg_paos_pack(paos_pl, mlxsw_sp_port->local_port,
473 is_up ? MLXSW_PORT_ADMIN_STATUS_UP :
474 MLXSW_PORT_ADMIN_STATUS_DOWN);
475 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(paos), paos_pl);
476}
477
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200478static int mlxsw_sp_port_dev_addr_set(struct mlxsw_sp_port *mlxsw_sp_port,
479 unsigned char *addr)
480{
481 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
482 char ppad_pl[MLXSW_REG_PPAD_LEN];
483
484 mlxsw_reg_ppad_pack(ppad_pl, true, mlxsw_sp_port->local_port);
485 mlxsw_reg_ppad_mac_memcpy_to(ppad_pl, addr);
486 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ppad), ppad_pl);
487}
488
489static int mlxsw_sp_port_dev_addr_init(struct mlxsw_sp_port *mlxsw_sp_port)
490{
491 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
492 unsigned char *addr = mlxsw_sp_port->dev->dev_addr;
493
494 ether_addr_copy(addr, mlxsw_sp->base_mac);
495 addr[ETH_ALEN - 1] += mlxsw_sp_port->local_port;
496 return mlxsw_sp_port_dev_addr_set(mlxsw_sp_port, addr);
497}
498
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200499static int mlxsw_sp_port_mtu_set(struct mlxsw_sp_port *mlxsw_sp_port, u16 mtu)
500{
501 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
502 char pmtu_pl[MLXSW_REG_PMTU_LEN];
503 int max_mtu;
504 int err;
505
506 mtu += MLXSW_TXHDR_LEN + ETH_HLEN;
507 mlxsw_reg_pmtu_pack(pmtu_pl, mlxsw_sp_port->local_port, 0);
508 err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(pmtu), pmtu_pl);
509 if (err)
510 return err;
511 max_mtu = mlxsw_reg_pmtu_max_mtu_get(pmtu_pl);
512
513 if (mtu > max_mtu)
514 return -EINVAL;
515
516 mlxsw_reg_pmtu_pack(pmtu_pl, mlxsw_sp_port->local_port, mtu);
517 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(pmtu), pmtu_pl);
518}
519
Ido Schimmelbe945352016-06-09 09:51:39 +0200520static int __mlxsw_sp_port_swid_set(struct mlxsw_sp *mlxsw_sp, u8 local_port,
521 u8 swid)
522{
523 char pspa_pl[MLXSW_REG_PSPA_LEN];
524
525 mlxsw_reg_pspa_pack(pspa_pl, swid, local_port);
526 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(pspa), pspa_pl);
527}
528
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200529static int mlxsw_sp_port_swid_set(struct mlxsw_sp_port *mlxsw_sp_port, u8 swid)
530{
531 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200532
Ido Schimmelbe945352016-06-09 09:51:39 +0200533 return __mlxsw_sp_port_swid_set(mlxsw_sp, mlxsw_sp_port->local_port,
534 swid);
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200535}
536
537static int mlxsw_sp_port_vp_mode_set(struct mlxsw_sp_port *mlxsw_sp_port,
538 bool enable)
539{
540 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
541 char svpe_pl[MLXSW_REG_SVPE_LEN];
542
543 mlxsw_reg_svpe_pack(svpe_pl, mlxsw_sp_port->local_port, enable);
544 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(svpe), svpe_pl);
545}
546
547int mlxsw_sp_port_vid_to_fid_set(struct mlxsw_sp_port *mlxsw_sp_port,
548 enum mlxsw_reg_svfa_mt mt, bool valid, u16 fid,
549 u16 vid)
550{
551 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
552 char svfa_pl[MLXSW_REG_SVFA_LEN];
553
554 mlxsw_reg_svfa_pack(svfa_pl, mlxsw_sp_port->local_port, mt, valid,
555 fid, vid);
556 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(svfa), svfa_pl);
557}
558
Ido Schimmel584d73d2016-08-24 12:00:26 +0200559int __mlxsw_sp_port_vid_learning_set(struct mlxsw_sp_port *mlxsw_sp_port,
560 u16 vid_begin, u16 vid_end,
561 bool learn_enable)
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200562{
563 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
564 char *spvmlr_pl;
565 int err;
566
567 spvmlr_pl = kmalloc(MLXSW_REG_SPVMLR_LEN, GFP_KERNEL);
568 if (!spvmlr_pl)
569 return -ENOMEM;
Ido Schimmel584d73d2016-08-24 12:00:26 +0200570 mlxsw_reg_spvmlr_pack(spvmlr_pl, mlxsw_sp_port->local_port, vid_begin,
571 vid_end, learn_enable);
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200572 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(spvmlr), spvmlr_pl);
573 kfree(spvmlr_pl);
574 return err;
575}
576
Ido Schimmel584d73d2016-08-24 12:00:26 +0200577static int mlxsw_sp_port_vid_learning_set(struct mlxsw_sp_port *mlxsw_sp_port,
578 u16 vid, bool learn_enable)
579{
580 return __mlxsw_sp_port_vid_learning_set(mlxsw_sp_port, vid, vid,
581 learn_enable);
582}
583
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200584static int
585mlxsw_sp_port_system_port_mapping_set(struct mlxsw_sp_port *mlxsw_sp_port)
586{
587 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
588 char sspr_pl[MLXSW_REG_SSPR_LEN];
589
590 mlxsw_reg_sspr_pack(sspr_pl, mlxsw_sp_port->local_port);
591 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sspr), sspr_pl);
592}
593
Ido Schimmeld664b412016-06-09 09:51:40 +0200594static int mlxsw_sp_port_module_info_get(struct mlxsw_sp *mlxsw_sp,
595 u8 local_port, u8 *p_module,
596 u8 *p_width, u8 *p_lane)
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200597{
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200598 char pmlp_pl[MLXSW_REG_PMLP_LEN];
599 int err;
600
Ido Schimmel558c2d52016-02-26 17:32:29 +0100601 mlxsw_reg_pmlp_pack(pmlp_pl, local_port);
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200602 err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(pmlp), pmlp_pl);
603 if (err)
604 return err;
Ido Schimmel558c2d52016-02-26 17:32:29 +0100605 *p_module = mlxsw_reg_pmlp_module_get(pmlp_pl, 0);
606 *p_width = mlxsw_reg_pmlp_width_get(pmlp_pl);
Ido Schimmel2bf9a582016-04-05 10:20:04 +0200607 *p_lane = mlxsw_reg_pmlp_tx_lane_get(pmlp_pl, 0);
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200608 return 0;
609}
610
Ido Schimmel18f1e702016-02-26 17:32:31 +0100611static int mlxsw_sp_port_module_map(struct mlxsw_sp *mlxsw_sp, u8 local_port,
612 u8 module, u8 width, u8 lane)
613{
614 char pmlp_pl[MLXSW_REG_PMLP_LEN];
615 int i;
616
617 mlxsw_reg_pmlp_pack(pmlp_pl, local_port);
618 mlxsw_reg_pmlp_width_set(pmlp_pl, width);
619 for (i = 0; i < width; i++) {
620 mlxsw_reg_pmlp_module_set(pmlp_pl, i, module);
621 mlxsw_reg_pmlp_tx_lane_set(pmlp_pl, i, lane + i); /* Rx & Tx */
622 }
623
624 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(pmlp), pmlp_pl);
625}
626
Ido Schimmel3e9b27b2016-02-26 17:32:28 +0100627static int mlxsw_sp_port_module_unmap(struct mlxsw_sp *mlxsw_sp, u8 local_port)
628{
629 char pmlp_pl[MLXSW_REG_PMLP_LEN];
630
631 mlxsw_reg_pmlp_pack(pmlp_pl, local_port);
632 mlxsw_reg_pmlp_width_set(pmlp_pl, 0);
633 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(pmlp), pmlp_pl);
634}
635
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200636static int mlxsw_sp_port_open(struct net_device *dev)
637{
638 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
639 int err;
640
641 err = mlxsw_sp_port_admin_status_set(mlxsw_sp_port, true);
642 if (err)
643 return err;
644 netif_start_queue(dev);
645 return 0;
646}
647
648static int mlxsw_sp_port_stop(struct net_device *dev)
649{
650 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
651
652 netif_stop_queue(dev);
653 return mlxsw_sp_port_admin_status_set(mlxsw_sp_port, false);
654}
655
656static netdev_tx_t mlxsw_sp_port_xmit(struct sk_buff *skb,
657 struct net_device *dev)
658{
659 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
660 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
661 struct mlxsw_sp_port_pcpu_stats *pcpu_stats;
662 const struct mlxsw_tx_info tx_info = {
663 .local_port = mlxsw_sp_port->local_port,
664 .is_emad = false,
665 };
666 u64 len;
667 int err;
668
Jiri Pirko307c2432016-04-08 19:11:22 +0200669 if (mlxsw_core_skb_transmit_busy(mlxsw_sp->core, &tx_info))
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200670 return NETDEV_TX_BUSY;
671
672 if (unlikely(skb_headroom(skb) < MLXSW_TXHDR_LEN)) {
673 struct sk_buff *skb_orig = skb;
674
675 skb = skb_realloc_headroom(skb, MLXSW_TXHDR_LEN);
676 if (!skb) {
677 this_cpu_inc(mlxsw_sp_port->pcpu_stats->tx_dropped);
678 dev_kfree_skb_any(skb_orig);
679 return NETDEV_TX_OK;
680 }
681 }
682
683 if (eth_skb_pad(skb)) {
684 this_cpu_inc(mlxsw_sp_port->pcpu_stats->tx_dropped);
685 return NETDEV_TX_OK;
686 }
687
688 mlxsw_sp_txhdr_construct(skb, &tx_info);
Nogah Frankel63dcdd32016-06-17 15:09:05 +0200689 /* TX header is consumed by HW on the way so we shouldn't count its
690 * bytes as being sent.
691 */
692 len = skb->len - MLXSW_TXHDR_LEN;
693
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200694 /* Due to a race we might fail here because of a full queue. In that
695 * unlikely case we simply drop the packet.
696 */
Jiri Pirko307c2432016-04-08 19:11:22 +0200697 err = mlxsw_core_skb_transmit(mlxsw_sp->core, skb, &tx_info);
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200698
699 if (!err) {
700 pcpu_stats = this_cpu_ptr(mlxsw_sp_port->pcpu_stats);
701 u64_stats_update_begin(&pcpu_stats->syncp);
702 pcpu_stats->tx_packets++;
703 pcpu_stats->tx_bytes += len;
704 u64_stats_update_end(&pcpu_stats->syncp);
705 } else {
706 this_cpu_inc(mlxsw_sp_port->pcpu_stats->tx_dropped);
707 dev_kfree_skb_any(skb);
708 }
709 return NETDEV_TX_OK;
710}
711
Jiri Pirkoc5b9b512015-12-03 12:12:22 +0100712static void mlxsw_sp_set_rx_mode(struct net_device *dev)
713{
714}
715
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200716static int mlxsw_sp_port_set_mac_address(struct net_device *dev, void *p)
717{
718 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
719 struct sockaddr *addr = p;
720 int err;
721
722 if (!is_valid_ether_addr(addr->sa_data))
723 return -EADDRNOTAVAIL;
724
725 err = mlxsw_sp_port_dev_addr_set(mlxsw_sp_port, addr->sa_data);
726 if (err)
727 return err;
728 memcpy(dev->dev_addr, addr->sa_data, dev->addr_len);
729 return 0;
730}
731
Ido Schimmel9f7ec052016-04-06 17:10:14 +0200732static void mlxsw_sp_pg_buf_pack(char *pbmc_pl, int pg_index, int mtu,
Ido Schimmeld81a6bd2016-04-06 17:10:16 +0200733 bool pause_en, bool pfc_en, u16 delay)
Ido Schimmel8e8dfe92016-04-06 17:10:10 +0200734{
735 u16 pg_size = 2 * MLXSW_SP_BYTES_TO_CELLS(mtu);
736
Ido Schimmeld81a6bd2016-04-06 17:10:16 +0200737 delay = pfc_en ? mlxsw_sp_pfc_delay_get(mtu, delay) :
738 MLXSW_SP_PAUSE_DELAY;
Ido Schimmel9f7ec052016-04-06 17:10:14 +0200739
Ido Schimmeld81a6bd2016-04-06 17:10:16 +0200740 if (pause_en || pfc_en)
Ido Schimmel9f7ec052016-04-06 17:10:14 +0200741 mlxsw_reg_pbmc_lossless_buffer_pack(pbmc_pl, pg_index,
Ido Schimmeld81a6bd2016-04-06 17:10:16 +0200742 pg_size + delay, pg_size);
743 else
Ido Schimmel9f7ec052016-04-06 17:10:14 +0200744 mlxsw_reg_pbmc_lossy_buffer_pack(pbmc_pl, pg_index, pg_size);
Ido Schimmel8e8dfe92016-04-06 17:10:10 +0200745}
746
747int __mlxsw_sp_port_headroom_set(struct mlxsw_sp_port *mlxsw_sp_port, int mtu,
Ido Schimmeld81a6bd2016-04-06 17:10:16 +0200748 u8 *prio_tc, bool pause_en,
749 struct ieee_pfc *my_pfc)
Ido Schimmelff6551e2016-04-06 17:10:03 +0200750{
751 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
Ido Schimmeld81a6bd2016-04-06 17:10:16 +0200752 u8 pfc_en = !!my_pfc ? my_pfc->pfc_en : 0;
753 u16 delay = !!my_pfc ? my_pfc->delay : 0;
Ido Schimmelff6551e2016-04-06 17:10:03 +0200754 char pbmc_pl[MLXSW_REG_PBMC_LEN];
Ido Schimmel8e8dfe92016-04-06 17:10:10 +0200755 int i, j, err;
Ido Schimmelff6551e2016-04-06 17:10:03 +0200756
757 mlxsw_reg_pbmc_pack(pbmc_pl, mlxsw_sp_port->local_port, 0, 0);
758 err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(pbmc), pbmc_pl);
759 if (err)
760 return err;
Ido Schimmel8e8dfe92016-04-06 17:10:10 +0200761
762 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
763 bool configure = false;
Ido Schimmeld81a6bd2016-04-06 17:10:16 +0200764 bool pfc = false;
Ido Schimmel8e8dfe92016-04-06 17:10:10 +0200765
766 for (j = 0; j < IEEE_8021QAZ_MAX_TCS; j++) {
767 if (prio_tc[j] == i) {
Ido Schimmeld81a6bd2016-04-06 17:10:16 +0200768 pfc = pfc_en & BIT(j);
Ido Schimmel8e8dfe92016-04-06 17:10:10 +0200769 configure = true;
770 break;
771 }
772 }
773
774 if (!configure)
775 continue;
Ido Schimmeld81a6bd2016-04-06 17:10:16 +0200776 mlxsw_sp_pg_buf_pack(pbmc_pl, i, mtu, pause_en, pfc, delay);
Ido Schimmel8e8dfe92016-04-06 17:10:10 +0200777 }
778
Ido Schimmelff6551e2016-04-06 17:10:03 +0200779 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(pbmc), pbmc_pl);
780}
781
Ido Schimmel8e8dfe92016-04-06 17:10:10 +0200782static int mlxsw_sp_port_headroom_set(struct mlxsw_sp_port *mlxsw_sp_port,
Ido Schimmel9f7ec052016-04-06 17:10:14 +0200783 int mtu, bool pause_en)
Ido Schimmel8e8dfe92016-04-06 17:10:10 +0200784{
785 u8 def_prio_tc[IEEE_8021QAZ_MAX_TCS] = {0};
786 bool dcb_en = !!mlxsw_sp_port->dcb.ets;
Ido Schimmeld81a6bd2016-04-06 17:10:16 +0200787 struct ieee_pfc *my_pfc;
Ido Schimmel8e8dfe92016-04-06 17:10:10 +0200788 u8 *prio_tc;
789
790 prio_tc = dcb_en ? mlxsw_sp_port->dcb.ets->prio_tc : def_prio_tc;
Ido Schimmeld81a6bd2016-04-06 17:10:16 +0200791 my_pfc = dcb_en ? mlxsw_sp_port->dcb.pfc : NULL;
Ido Schimmel8e8dfe92016-04-06 17:10:10 +0200792
Ido Schimmel9f7ec052016-04-06 17:10:14 +0200793 return __mlxsw_sp_port_headroom_set(mlxsw_sp_port, mtu, prio_tc,
Ido Schimmeld81a6bd2016-04-06 17:10:16 +0200794 pause_en, my_pfc);
Ido Schimmel8e8dfe92016-04-06 17:10:10 +0200795}
796
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200797static int mlxsw_sp_port_change_mtu(struct net_device *dev, int mtu)
798{
799 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
Ido Schimmel9f7ec052016-04-06 17:10:14 +0200800 bool pause_en = mlxsw_sp_port_is_pause_en(mlxsw_sp_port);
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200801 int err;
802
Ido Schimmel9f7ec052016-04-06 17:10:14 +0200803 err = mlxsw_sp_port_headroom_set(mlxsw_sp_port, mtu, pause_en);
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200804 if (err)
805 return err;
Yotam Gigi763b4b72016-07-21 12:03:17 +0200806 err = mlxsw_sp_span_port_mtu_update(mlxsw_sp_port, mtu);
807 if (err)
808 goto err_span_port_mtu_update;
Ido Schimmelff6551e2016-04-06 17:10:03 +0200809 err = mlxsw_sp_port_mtu_set(mlxsw_sp_port, mtu);
810 if (err)
811 goto err_port_mtu_set;
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200812 dev->mtu = mtu;
813 return 0;
Ido Schimmelff6551e2016-04-06 17:10:03 +0200814
815err_port_mtu_set:
Yotam Gigi763b4b72016-07-21 12:03:17 +0200816 mlxsw_sp_span_port_mtu_update(mlxsw_sp_port, dev->mtu);
817err_span_port_mtu_update:
Ido Schimmel9f7ec052016-04-06 17:10:14 +0200818 mlxsw_sp_port_headroom_set(mlxsw_sp_port, dev->mtu, pause_en);
Ido Schimmelff6551e2016-04-06 17:10:03 +0200819 return err;
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200820}
821
Nogah Frankelfc1bbb02016-09-16 15:05:38 +0200822int
823mlxsw_sp_port_get_sw_stats64(const struct net_device *dev,
824 struct rtnl_link_stats64 *stats)
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200825{
826 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
827 struct mlxsw_sp_port_pcpu_stats *p;
828 u64 rx_packets, rx_bytes, tx_packets, tx_bytes;
829 u32 tx_dropped = 0;
830 unsigned int start;
831 int i;
832
833 for_each_possible_cpu(i) {
834 p = per_cpu_ptr(mlxsw_sp_port->pcpu_stats, i);
835 do {
836 start = u64_stats_fetch_begin_irq(&p->syncp);
837 rx_packets = p->rx_packets;
838 rx_bytes = p->rx_bytes;
839 tx_packets = p->tx_packets;
840 tx_bytes = p->tx_bytes;
841 } while (u64_stats_fetch_retry_irq(&p->syncp, start));
842
843 stats->rx_packets += rx_packets;
844 stats->rx_bytes += rx_bytes;
845 stats->tx_packets += tx_packets;
846 stats->tx_bytes += tx_bytes;
847 /* tx_dropped is u32, updated without syncp protection. */
848 tx_dropped += p->tx_dropped;
849 }
850 stats->tx_dropped = tx_dropped;
Nogah Frankelfc1bbb02016-09-16 15:05:38 +0200851 return 0;
852}
853
854bool mlxsw_sp_port_has_offload_stats(int attr_id)
855{
856 switch (attr_id) {
857 case IFLA_OFFLOAD_XSTATS_CPU_HIT:
858 return true;
859 }
860
861 return false;
862}
863
864int mlxsw_sp_port_get_offload_stats(int attr_id, const struct net_device *dev,
865 void *sp)
866{
867 switch (attr_id) {
868 case IFLA_OFFLOAD_XSTATS_CPU_HIT:
869 return mlxsw_sp_port_get_sw_stats64(dev, sp);
870 }
871
872 return -EINVAL;
873}
874
875static int mlxsw_sp_port_get_stats_raw(struct net_device *dev, int grp,
876 int prio, char *ppcnt_pl)
877{
878 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
879 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
880
881 mlxsw_reg_ppcnt_pack(ppcnt_pl, mlxsw_sp_port->local_port, grp, prio);
882 return mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(ppcnt), ppcnt_pl);
883}
884
885static int mlxsw_sp_port_get_hw_stats(struct net_device *dev,
886 struct rtnl_link_stats64 *stats)
887{
888 char ppcnt_pl[MLXSW_REG_PPCNT_LEN];
889 int err;
890
891 err = mlxsw_sp_port_get_stats_raw(dev, MLXSW_REG_PPCNT_IEEE_8023_CNT,
892 0, ppcnt_pl);
893 if (err)
894 goto out;
895
896 stats->tx_packets =
897 mlxsw_reg_ppcnt_a_frames_transmitted_ok_get(ppcnt_pl);
898 stats->rx_packets =
899 mlxsw_reg_ppcnt_a_frames_received_ok_get(ppcnt_pl);
900 stats->tx_bytes =
901 mlxsw_reg_ppcnt_a_octets_transmitted_ok_get(ppcnt_pl);
902 stats->rx_bytes =
903 mlxsw_reg_ppcnt_a_octets_received_ok_get(ppcnt_pl);
904 stats->multicast =
905 mlxsw_reg_ppcnt_a_multicast_frames_received_ok_get(ppcnt_pl);
906
907 stats->rx_crc_errors =
908 mlxsw_reg_ppcnt_a_frame_check_sequence_errors_get(ppcnt_pl);
909 stats->rx_frame_errors =
910 mlxsw_reg_ppcnt_a_alignment_errors_get(ppcnt_pl);
911
912 stats->rx_length_errors = (
913 mlxsw_reg_ppcnt_a_in_range_length_errors_get(ppcnt_pl) +
914 mlxsw_reg_ppcnt_a_out_of_range_length_field_get(ppcnt_pl) +
915 mlxsw_reg_ppcnt_a_frame_too_long_errors_get(ppcnt_pl));
916
917 stats->rx_errors = (stats->rx_crc_errors +
918 stats->rx_frame_errors + stats->rx_length_errors);
919
920out:
921 return err;
922}
923
924static void update_stats_cache(struct work_struct *work)
925{
926 struct mlxsw_sp_port *mlxsw_sp_port =
927 container_of(work, struct mlxsw_sp_port,
928 hw_stats.update_dw.work);
929
930 if (!netif_carrier_ok(mlxsw_sp_port->dev))
931 goto out;
932
933 mlxsw_sp_port_get_hw_stats(mlxsw_sp_port->dev,
934 mlxsw_sp_port->hw_stats.cache);
935
936out:
937 mlxsw_core_schedule_dw(&mlxsw_sp_port->hw_stats.update_dw,
938 MLXSW_HW_STATS_UPDATE_TIME);
939}
940
941/* Return the stats from a cache that is updated periodically,
942 * as this function might get called in an atomic context.
943 */
944static struct rtnl_link_stats64 *
945mlxsw_sp_port_get_stats64(struct net_device *dev,
946 struct rtnl_link_stats64 *stats)
947{
948 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
949
950 memcpy(stats, mlxsw_sp_port->hw_stats.cache, sizeof(*stats));
951
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200952 return stats;
953}
954
955int mlxsw_sp_port_vlan_set(struct mlxsw_sp_port *mlxsw_sp_port, u16 vid_begin,
956 u16 vid_end, bool is_member, bool untagged)
957{
958 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
959 char *spvm_pl;
960 int err;
961
962 spvm_pl = kmalloc(MLXSW_REG_SPVM_LEN, GFP_KERNEL);
963 if (!spvm_pl)
964 return -ENOMEM;
965
966 mlxsw_reg_spvm_pack(spvm_pl, mlxsw_sp_port->local_port, vid_begin,
967 vid_end, is_member, untagged);
968 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(spvm), spvm_pl);
969 kfree(spvm_pl);
970 return err;
971}
972
973static int mlxsw_sp_port_vp_mode_trans(struct mlxsw_sp_port *mlxsw_sp_port)
974{
975 enum mlxsw_reg_svfa_mt mt = MLXSW_REG_SVFA_MT_PORT_VID_TO_FID;
976 u16 vid, last_visited_vid;
977 int err;
978
979 for_each_set_bit(vid, mlxsw_sp_port->active_vlans, VLAN_N_VID) {
980 err = mlxsw_sp_port_vid_to_fid_set(mlxsw_sp_port, mt, true, vid,
981 vid);
982 if (err) {
983 last_visited_vid = vid;
984 goto err_port_vid_to_fid_set;
985 }
986 }
987
988 err = mlxsw_sp_port_vp_mode_set(mlxsw_sp_port, true);
989 if (err) {
990 last_visited_vid = VLAN_N_VID;
991 goto err_port_vid_to_fid_set;
992 }
993
994 return 0;
995
996err_port_vid_to_fid_set:
997 for_each_set_bit(vid, mlxsw_sp_port->active_vlans, last_visited_vid)
998 mlxsw_sp_port_vid_to_fid_set(mlxsw_sp_port, mt, false, vid,
999 vid);
1000 return err;
1001}
1002
1003static int mlxsw_sp_port_vlan_mode_trans(struct mlxsw_sp_port *mlxsw_sp_port)
1004{
1005 enum mlxsw_reg_svfa_mt mt = MLXSW_REG_SVFA_MT_PORT_VID_TO_FID;
1006 u16 vid;
1007 int err;
1008
1009 err = mlxsw_sp_port_vp_mode_set(mlxsw_sp_port, false);
1010 if (err)
1011 return err;
1012
1013 for_each_set_bit(vid, mlxsw_sp_port->active_vlans, VLAN_N_VID) {
1014 err = mlxsw_sp_port_vid_to_fid_set(mlxsw_sp_port, mt, false,
1015 vid, vid);
1016 if (err)
1017 return err;
1018 }
1019
1020 return 0;
1021}
1022
Ido Schimmel7f71eb42015-12-15 16:03:37 +01001023static struct mlxsw_sp_port *
Ido Schimmel0355b592016-06-20 23:04:13 +02001024mlxsw_sp_port_vport_create(struct mlxsw_sp_port *mlxsw_sp_port, u16 vid)
Ido Schimmel7f71eb42015-12-15 16:03:37 +01001025{
1026 struct mlxsw_sp_port *mlxsw_sp_vport;
1027
1028 mlxsw_sp_vport = kzalloc(sizeof(*mlxsw_sp_vport), GFP_KERNEL);
1029 if (!mlxsw_sp_vport)
1030 return NULL;
1031
1032 /* dev will be set correctly after the VLAN device is linked
1033 * with the real device. In case of bridge SELF invocation, dev
1034 * will remain as is.
1035 */
1036 mlxsw_sp_vport->dev = mlxsw_sp_port->dev;
1037 mlxsw_sp_vport->mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
1038 mlxsw_sp_vport->local_port = mlxsw_sp_port->local_port;
1039 mlxsw_sp_vport->stp_state = BR_STATE_FORWARDING;
Ido Schimmel272c4472015-12-15 16:03:47 +01001040 mlxsw_sp_vport->lagged = mlxsw_sp_port->lagged;
1041 mlxsw_sp_vport->lag_id = mlxsw_sp_port->lag_id;
Ido Schimmel0355b592016-06-20 23:04:13 +02001042 mlxsw_sp_vport->vport.vid = vid;
Ido Schimmel7f71eb42015-12-15 16:03:37 +01001043
1044 list_add(&mlxsw_sp_vport->vport.list, &mlxsw_sp_port->vports_list);
1045
1046 return mlxsw_sp_vport;
1047}
1048
1049static void mlxsw_sp_port_vport_destroy(struct mlxsw_sp_port *mlxsw_sp_vport)
1050{
1051 list_del(&mlxsw_sp_vport->vport.list);
1052 kfree(mlxsw_sp_vport);
1053}
1054
Ido Schimmel05978482016-08-17 16:39:30 +02001055static int mlxsw_sp_port_add_vid(struct net_device *dev,
1056 __be16 __always_unused proto, u16 vid)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001057{
1058 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
Ido Schimmel7f71eb42015-12-15 16:03:37 +01001059 struct mlxsw_sp_port *mlxsw_sp_vport;
Ido Schimmel52697a92016-07-02 11:00:09 +02001060 bool untagged = vid == 1;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001061 int err;
1062
1063 /* VLAN 0 is added to HW filter when device goes up, but it is
1064 * reserved in our case, so simply return.
1065 */
1066 if (!vid)
1067 return 0;
1068
Ido Schimmelfa66d7e2016-08-17 16:39:29 +02001069 if (mlxsw_sp_port_vport_find(mlxsw_sp_port, vid))
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001070 return 0;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001071
Ido Schimmel0355b592016-06-20 23:04:13 +02001072 mlxsw_sp_vport = mlxsw_sp_port_vport_create(mlxsw_sp_port, vid);
Ido Schimmelfa66d7e2016-08-17 16:39:29 +02001073 if (!mlxsw_sp_vport)
Ido Schimmel0355b592016-06-20 23:04:13 +02001074 return -ENOMEM;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001075
1076 /* When adding the first VLAN interface on a bridged port we need to
1077 * transition all the active 802.1Q bridge VLANs to use explicit
1078 * {Port, VID} to FID mappings and set the port's mode to Virtual mode.
1079 */
Ido Schimmel7f71eb42015-12-15 16:03:37 +01001080 if (list_is_singular(&mlxsw_sp_port->vports_list)) {
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001081 err = mlxsw_sp_port_vp_mode_trans(mlxsw_sp_port);
Ido Schimmelfa66d7e2016-08-17 16:39:29 +02001082 if (err)
Ido Schimmel7f71eb42015-12-15 16:03:37 +01001083 goto err_port_vp_mode_trans;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001084 }
1085
Ido Schimmel52697a92016-07-02 11:00:09 +02001086 err = mlxsw_sp_port_vlan_set(mlxsw_sp_vport, vid, vid, true, untagged);
Ido Schimmelfa66d7e2016-08-17 16:39:29 +02001087 if (err)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001088 goto err_port_add_vid;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001089
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001090 return 0;
1091
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001092err_port_add_vid:
Ido Schimmel7f71eb42015-12-15 16:03:37 +01001093 if (list_is_singular(&mlxsw_sp_port->vports_list))
1094 mlxsw_sp_port_vlan_mode_trans(mlxsw_sp_port);
1095err_port_vp_mode_trans:
Ido Schimmel7f71eb42015-12-15 16:03:37 +01001096 mlxsw_sp_port_vport_destroy(mlxsw_sp_vport);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001097 return err;
1098}
1099
Ido Schimmel32d863f2016-07-02 11:00:10 +02001100static int mlxsw_sp_port_kill_vid(struct net_device *dev,
1101 __be16 __always_unused proto, u16 vid)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001102{
1103 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
Ido Schimmel7f71eb42015-12-15 16:03:37 +01001104 struct mlxsw_sp_port *mlxsw_sp_vport;
Ido Schimmel1c800752016-06-20 23:04:20 +02001105 struct mlxsw_sp_fid *f;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001106
1107 /* VLAN 0 is removed from HW filter when device goes down, but
1108 * it is reserved in our case, so simply return.
1109 */
1110 if (!vid)
1111 return 0;
1112
Ido Schimmel7f71eb42015-12-15 16:03:37 +01001113 mlxsw_sp_vport = mlxsw_sp_port_vport_find(mlxsw_sp_port, vid);
Ido Schimmel7a355832016-08-17 16:39:28 +02001114 if (WARN_ON(!mlxsw_sp_vport))
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001115 return 0;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001116
Ido Schimmel7a355832016-08-17 16:39:28 +02001117 mlxsw_sp_port_vlan_set(mlxsw_sp_vport, vid, vid, false, false);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001118
Ido Schimmel1c800752016-06-20 23:04:20 +02001119 /* Drop FID reference. If this was the last reference the
1120 * resources will be freed.
1121 */
1122 f = mlxsw_sp_vport_fid_get(mlxsw_sp_vport);
1123 if (f && !WARN_ON(!f->leave))
1124 f->leave(mlxsw_sp_vport);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001125
1126 /* When removing the last VLAN interface on a bridged port we need to
1127 * transition all active 802.1Q bridge VLANs to use VID to FID
1128 * mappings and set port's mode to VLAN mode.
1129 */
Ido Schimmel7a355832016-08-17 16:39:28 +02001130 if (list_is_singular(&mlxsw_sp_port->vports_list))
1131 mlxsw_sp_port_vlan_mode_trans(mlxsw_sp_port);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001132
Ido Schimmel7f71eb42015-12-15 16:03:37 +01001133 mlxsw_sp_port_vport_destroy(mlxsw_sp_vport);
1134
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001135 return 0;
1136}
1137
Ido Schimmel2bf9a582016-04-05 10:20:04 +02001138static int mlxsw_sp_port_get_phys_port_name(struct net_device *dev, char *name,
1139 size_t len)
1140{
1141 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
Ido Schimmeld664b412016-06-09 09:51:40 +02001142 u8 module = mlxsw_sp_port->mapping.module;
1143 u8 width = mlxsw_sp_port->mapping.width;
1144 u8 lane = mlxsw_sp_port->mapping.lane;
Ido Schimmel2bf9a582016-04-05 10:20:04 +02001145 int err;
1146
Ido Schimmel2bf9a582016-04-05 10:20:04 +02001147 if (!mlxsw_sp_port->split)
1148 err = snprintf(name, len, "p%d", module + 1);
1149 else
1150 err = snprintf(name, len, "p%ds%d", module + 1,
1151 lane / width);
1152
1153 if (err >= len)
1154 return -EINVAL;
1155
1156 return 0;
1157}
1158
Yotam Gigi763b4b72016-07-21 12:03:17 +02001159static struct mlxsw_sp_port_mall_tc_entry *
1160mlxsw_sp_port_mirror_entry_find(struct mlxsw_sp_port *port,
1161 unsigned long cookie) {
1162 struct mlxsw_sp_port_mall_tc_entry *mall_tc_entry;
1163
1164 list_for_each_entry(mall_tc_entry, &port->mall_tc_list, list)
1165 if (mall_tc_entry->cookie == cookie)
1166 return mall_tc_entry;
1167
1168 return NULL;
1169}
1170
1171static int
1172mlxsw_sp_port_add_cls_matchall_mirror(struct mlxsw_sp_port *mlxsw_sp_port,
1173 struct tc_cls_matchall_offload *cls,
1174 const struct tc_action *a,
1175 bool ingress)
1176{
1177 struct mlxsw_sp_port_mall_tc_entry *mall_tc_entry;
1178 struct net *net = dev_net(mlxsw_sp_port->dev);
1179 enum mlxsw_sp_span_type span_type;
1180 struct mlxsw_sp_port *to_port;
1181 struct net_device *to_dev;
1182 int ifindex;
1183 int err;
1184
1185 ifindex = tcf_mirred_ifindex(a);
1186 to_dev = __dev_get_by_index(net, ifindex);
1187 if (!to_dev) {
1188 netdev_err(mlxsw_sp_port->dev, "Could not find requested device\n");
1189 return -EINVAL;
1190 }
1191
1192 if (!mlxsw_sp_port_dev_check(to_dev)) {
1193 netdev_err(mlxsw_sp_port->dev, "Cannot mirror to a non-spectrum port");
1194 return -ENOTSUPP;
1195 }
1196 to_port = netdev_priv(to_dev);
1197
1198 mall_tc_entry = kzalloc(sizeof(*mall_tc_entry), GFP_KERNEL);
1199 if (!mall_tc_entry)
1200 return -ENOMEM;
1201
1202 mall_tc_entry->cookie = cls->cookie;
1203 mall_tc_entry->type = MLXSW_SP_PORT_MALL_MIRROR;
1204 mall_tc_entry->mirror.to_local_port = to_port->local_port;
1205 mall_tc_entry->mirror.ingress = ingress;
1206 list_add_tail(&mall_tc_entry->list, &mlxsw_sp_port->mall_tc_list);
1207
1208 span_type = ingress ? MLXSW_SP_SPAN_INGRESS : MLXSW_SP_SPAN_EGRESS;
1209 err = mlxsw_sp_span_mirror_add(mlxsw_sp_port, to_port, span_type);
1210 if (err)
1211 goto err_mirror_add;
1212 return 0;
1213
1214err_mirror_add:
1215 list_del(&mall_tc_entry->list);
1216 kfree(mall_tc_entry);
1217 return err;
1218}
1219
1220static int mlxsw_sp_port_add_cls_matchall(struct mlxsw_sp_port *mlxsw_sp_port,
1221 __be16 protocol,
1222 struct tc_cls_matchall_offload *cls,
1223 bool ingress)
1224{
Yotam Gigi763b4b72016-07-21 12:03:17 +02001225 const struct tc_action *a;
WANG Cong22dc13c2016-08-13 22:35:00 -07001226 LIST_HEAD(actions);
Yotam Gigi763b4b72016-07-21 12:03:17 +02001227 int err;
1228
Ido Schimmel86cb13e2016-07-25 13:12:33 +03001229 if (!tc_single_action(cls->exts)) {
Yotam Gigi763b4b72016-07-21 12:03:17 +02001230 netdev_err(mlxsw_sp_port->dev, "only singular actions are supported\n");
1231 return -ENOTSUPP;
1232 }
1233
WANG Cong22dc13c2016-08-13 22:35:00 -07001234 tcf_exts_to_list(cls->exts, &actions);
1235 list_for_each_entry(a, &actions, list) {
Ido Schimmel86cb13e2016-07-25 13:12:33 +03001236 if (!is_tcf_mirred_mirror(a) || protocol != htons(ETH_P_ALL))
1237 return -ENOTSUPP;
1238
Yotam Gigi763b4b72016-07-21 12:03:17 +02001239 err = mlxsw_sp_port_add_cls_matchall_mirror(mlxsw_sp_port, cls,
1240 a, ingress);
1241 if (err)
1242 return err;
Yotam Gigi763b4b72016-07-21 12:03:17 +02001243 }
1244
1245 return 0;
1246}
1247
1248static void mlxsw_sp_port_del_cls_matchall(struct mlxsw_sp_port *mlxsw_sp_port,
1249 struct tc_cls_matchall_offload *cls)
1250{
1251 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
1252 struct mlxsw_sp_port_mall_tc_entry *mall_tc_entry;
1253 enum mlxsw_sp_span_type span_type;
1254 struct mlxsw_sp_port *to_port;
1255
1256 mall_tc_entry = mlxsw_sp_port_mirror_entry_find(mlxsw_sp_port,
1257 cls->cookie);
1258 if (!mall_tc_entry) {
1259 netdev_dbg(mlxsw_sp_port->dev, "tc entry not found on port\n");
1260 return;
1261 }
1262
1263 switch (mall_tc_entry->type) {
1264 case MLXSW_SP_PORT_MALL_MIRROR:
1265 to_port = mlxsw_sp->ports[mall_tc_entry->mirror.to_local_port];
1266 span_type = mall_tc_entry->mirror.ingress ?
1267 MLXSW_SP_SPAN_INGRESS : MLXSW_SP_SPAN_EGRESS;
1268
1269 mlxsw_sp_span_mirror_remove(mlxsw_sp_port, to_port, span_type);
1270 break;
1271 default:
1272 WARN_ON(1);
1273 }
1274
1275 list_del(&mall_tc_entry->list);
1276 kfree(mall_tc_entry);
1277}
1278
1279static int mlxsw_sp_setup_tc(struct net_device *dev, u32 handle,
1280 __be16 proto, struct tc_to_netdev *tc)
1281{
1282 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
1283 bool ingress = TC_H_MAJ(handle) == TC_H_MAJ(TC_H_INGRESS);
1284
1285 if (tc->type == TC_SETUP_MATCHALL) {
1286 switch (tc->cls_mall->command) {
1287 case TC_CLSMATCHALL_REPLACE:
1288 return mlxsw_sp_port_add_cls_matchall(mlxsw_sp_port,
1289 proto,
1290 tc->cls_mall,
1291 ingress);
1292 case TC_CLSMATCHALL_DESTROY:
1293 mlxsw_sp_port_del_cls_matchall(mlxsw_sp_port,
1294 tc->cls_mall);
1295 return 0;
1296 default:
1297 return -EINVAL;
1298 }
1299 }
1300
1301 return -ENOTSUPP;
1302}
1303
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001304static const struct net_device_ops mlxsw_sp_port_netdev_ops = {
1305 .ndo_open = mlxsw_sp_port_open,
1306 .ndo_stop = mlxsw_sp_port_stop,
1307 .ndo_start_xmit = mlxsw_sp_port_xmit,
Yotam Gigi763b4b72016-07-21 12:03:17 +02001308 .ndo_setup_tc = mlxsw_sp_setup_tc,
Jiri Pirkoc5b9b512015-12-03 12:12:22 +01001309 .ndo_set_rx_mode = mlxsw_sp_set_rx_mode,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001310 .ndo_set_mac_address = mlxsw_sp_port_set_mac_address,
1311 .ndo_change_mtu = mlxsw_sp_port_change_mtu,
1312 .ndo_get_stats64 = mlxsw_sp_port_get_stats64,
Nogah Frankelfc1bbb02016-09-16 15:05:38 +02001313 .ndo_has_offload_stats = mlxsw_sp_port_has_offload_stats,
1314 .ndo_get_offload_stats = mlxsw_sp_port_get_offload_stats,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001315 .ndo_vlan_rx_add_vid = mlxsw_sp_port_add_vid,
1316 .ndo_vlan_rx_kill_vid = mlxsw_sp_port_kill_vid,
Jiri Pirko6cf3c972016-07-05 11:27:39 +02001317 .ndo_neigh_construct = mlxsw_sp_router_neigh_construct,
1318 .ndo_neigh_destroy = mlxsw_sp_router_neigh_destroy,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001319 .ndo_fdb_add = switchdev_port_fdb_add,
1320 .ndo_fdb_del = switchdev_port_fdb_del,
1321 .ndo_fdb_dump = switchdev_port_fdb_dump,
1322 .ndo_bridge_setlink = switchdev_port_bridge_setlink,
1323 .ndo_bridge_getlink = switchdev_port_bridge_getlink,
1324 .ndo_bridge_dellink = switchdev_port_bridge_dellink,
Ido Schimmel2bf9a582016-04-05 10:20:04 +02001325 .ndo_get_phys_port_name = mlxsw_sp_port_get_phys_port_name,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001326};
1327
1328static void mlxsw_sp_port_get_drvinfo(struct net_device *dev,
1329 struct ethtool_drvinfo *drvinfo)
1330{
1331 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
1332 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
1333
1334 strlcpy(drvinfo->driver, mlxsw_sp_driver_name, sizeof(drvinfo->driver));
1335 strlcpy(drvinfo->version, mlxsw_sp_driver_version,
1336 sizeof(drvinfo->version));
1337 snprintf(drvinfo->fw_version, sizeof(drvinfo->fw_version),
1338 "%d.%d.%d",
1339 mlxsw_sp->bus_info->fw_rev.major,
1340 mlxsw_sp->bus_info->fw_rev.minor,
1341 mlxsw_sp->bus_info->fw_rev.subminor);
1342 strlcpy(drvinfo->bus_info, mlxsw_sp->bus_info->device_name,
1343 sizeof(drvinfo->bus_info));
1344}
1345
Ido Schimmel9f7ec052016-04-06 17:10:14 +02001346static void mlxsw_sp_port_get_pauseparam(struct net_device *dev,
1347 struct ethtool_pauseparam *pause)
1348{
1349 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
1350
1351 pause->rx_pause = mlxsw_sp_port->link.rx_pause;
1352 pause->tx_pause = mlxsw_sp_port->link.tx_pause;
1353}
1354
1355static int mlxsw_sp_port_pause_set(struct mlxsw_sp_port *mlxsw_sp_port,
1356 struct ethtool_pauseparam *pause)
1357{
1358 char pfcc_pl[MLXSW_REG_PFCC_LEN];
1359
1360 mlxsw_reg_pfcc_pack(pfcc_pl, mlxsw_sp_port->local_port);
1361 mlxsw_reg_pfcc_pprx_set(pfcc_pl, pause->rx_pause);
1362 mlxsw_reg_pfcc_pptx_set(pfcc_pl, pause->tx_pause);
1363
1364 return mlxsw_reg_write(mlxsw_sp_port->mlxsw_sp->core, MLXSW_REG(pfcc),
1365 pfcc_pl);
1366}
1367
1368static int mlxsw_sp_port_set_pauseparam(struct net_device *dev,
1369 struct ethtool_pauseparam *pause)
1370{
1371 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
1372 bool pause_en = pause->tx_pause || pause->rx_pause;
1373 int err;
1374
Ido Schimmeld81a6bd2016-04-06 17:10:16 +02001375 if (mlxsw_sp_port->dcb.pfc && mlxsw_sp_port->dcb.pfc->pfc_en) {
1376 netdev_err(dev, "PFC already enabled on port\n");
1377 return -EINVAL;
1378 }
1379
Ido Schimmel9f7ec052016-04-06 17:10:14 +02001380 if (pause->autoneg) {
1381 netdev_err(dev, "PAUSE frames autonegotiation isn't supported\n");
1382 return -EINVAL;
1383 }
1384
1385 err = mlxsw_sp_port_headroom_set(mlxsw_sp_port, dev->mtu, pause_en);
1386 if (err) {
1387 netdev_err(dev, "Failed to configure port's headroom\n");
1388 return err;
1389 }
1390
1391 err = mlxsw_sp_port_pause_set(mlxsw_sp_port, pause);
1392 if (err) {
1393 netdev_err(dev, "Failed to set PAUSE parameters\n");
1394 goto err_port_pause_configure;
1395 }
1396
1397 mlxsw_sp_port->link.rx_pause = pause->rx_pause;
1398 mlxsw_sp_port->link.tx_pause = pause->tx_pause;
1399
1400 return 0;
1401
1402err_port_pause_configure:
1403 pause_en = mlxsw_sp_port_is_pause_en(mlxsw_sp_port);
1404 mlxsw_sp_port_headroom_set(mlxsw_sp_port, dev->mtu, pause_en);
1405 return err;
1406}
1407
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001408struct mlxsw_sp_port_hw_stats {
1409 char str[ETH_GSTRING_LEN];
1410 u64 (*getter)(char *payload);
1411};
1412
Ido Schimmel7ed674b2016-07-19 15:35:53 +02001413static struct mlxsw_sp_port_hw_stats mlxsw_sp_port_hw_stats[] = {
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001414 {
1415 .str = "a_frames_transmitted_ok",
1416 .getter = mlxsw_reg_ppcnt_a_frames_transmitted_ok_get,
1417 },
1418 {
1419 .str = "a_frames_received_ok",
1420 .getter = mlxsw_reg_ppcnt_a_frames_received_ok_get,
1421 },
1422 {
1423 .str = "a_frame_check_sequence_errors",
1424 .getter = mlxsw_reg_ppcnt_a_frame_check_sequence_errors_get,
1425 },
1426 {
1427 .str = "a_alignment_errors",
1428 .getter = mlxsw_reg_ppcnt_a_alignment_errors_get,
1429 },
1430 {
1431 .str = "a_octets_transmitted_ok",
1432 .getter = mlxsw_reg_ppcnt_a_octets_transmitted_ok_get,
1433 },
1434 {
1435 .str = "a_octets_received_ok",
1436 .getter = mlxsw_reg_ppcnt_a_octets_received_ok_get,
1437 },
1438 {
1439 .str = "a_multicast_frames_xmitted_ok",
1440 .getter = mlxsw_reg_ppcnt_a_multicast_frames_xmitted_ok_get,
1441 },
1442 {
1443 .str = "a_broadcast_frames_xmitted_ok",
1444 .getter = mlxsw_reg_ppcnt_a_broadcast_frames_xmitted_ok_get,
1445 },
1446 {
1447 .str = "a_multicast_frames_received_ok",
1448 .getter = mlxsw_reg_ppcnt_a_multicast_frames_received_ok_get,
1449 },
1450 {
1451 .str = "a_broadcast_frames_received_ok",
1452 .getter = mlxsw_reg_ppcnt_a_broadcast_frames_received_ok_get,
1453 },
1454 {
1455 .str = "a_in_range_length_errors",
1456 .getter = mlxsw_reg_ppcnt_a_in_range_length_errors_get,
1457 },
1458 {
1459 .str = "a_out_of_range_length_field",
1460 .getter = mlxsw_reg_ppcnt_a_out_of_range_length_field_get,
1461 },
1462 {
1463 .str = "a_frame_too_long_errors",
1464 .getter = mlxsw_reg_ppcnt_a_frame_too_long_errors_get,
1465 },
1466 {
1467 .str = "a_symbol_error_during_carrier",
1468 .getter = mlxsw_reg_ppcnt_a_symbol_error_during_carrier_get,
1469 },
1470 {
1471 .str = "a_mac_control_frames_transmitted",
1472 .getter = mlxsw_reg_ppcnt_a_mac_control_frames_transmitted_get,
1473 },
1474 {
1475 .str = "a_mac_control_frames_received",
1476 .getter = mlxsw_reg_ppcnt_a_mac_control_frames_received_get,
1477 },
1478 {
1479 .str = "a_unsupported_opcodes_received",
1480 .getter = mlxsw_reg_ppcnt_a_unsupported_opcodes_received_get,
1481 },
1482 {
1483 .str = "a_pause_mac_ctrl_frames_received",
1484 .getter = mlxsw_reg_ppcnt_a_pause_mac_ctrl_frames_received_get,
1485 },
1486 {
1487 .str = "a_pause_mac_ctrl_frames_xmitted",
1488 .getter = mlxsw_reg_ppcnt_a_pause_mac_ctrl_frames_transmitted_get,
1489 },
1490};
1491
1492#define MLXSW_SP_PORT_HW_STATS_LEN ARRAY_SIZE(mlxsw_sp_port_hw_stats)
1493
Ido Schimmel7ed674b2016-07-19 15:35:53 +02001494static struct mlxsw_sp_port_hw_stats mlxsw_sp_port_hw_prio_stats[] = {
1495 {
1496 .str = "rx_octets_prio",
1497 .getter = mlxsw_reg_ppcnt_rx_octets_get,
1498 },
1499 {
1500 .str = "rx_frames_prio",
1501 .getter = mlxsw_reg_ppcnt_rx_frames_get,
1502 },
1503 {
1504 .str = "tx_octets_prio",
1505 .getter = mlxsw_reg_ppcnt_tx_octets_get,
1506 },
1507 {
1508 .str = "tx_frames_prio",
1509 .getter = mlxsw_reg_ppcnt_tx_frames_get,
1510 },
1511 {
1512 .str = "rx_pause_prio",
1513 .getter = mlxsw_reg_ppcnt_rx_pause_get,
1514 },
1515 {
1516 .str = "rx_pause_duration_prio",
1517 .getter = mlxsw_reg_ppcnt_rx_pause_duration_get,
1518 },
1519 {
1520 .str = "tx_pause_prio",
1521 .getter = mlxsw_reg_ppcnt_tx_pause_get,
1522 },
1523 {
1524 .str = "tx_pause_duration_prio",
1525 .getter = mlxsw_reg_ppcnt_tx_pause_duration_get,
1526 },
1527};
1528
1529#define MLXSW_SP_PORT_HW_PRIO_STATS_LEN ARRAY_SIZE(mlxsw_sp_port_hw_prio_stats)
1530
Ido Schimmeldf4750e2016-07-19 15:35:54 +02001531static u64 mlxsw_reg_ppcnt_tc_transmit_queue_bytes_get(char *ppcnt_pl)
1532{
1533 u64 transmit_queue = mlxsw_reg_ppcnt_tc_transmit_queue_get(ppcnt_pl);
1534
1535 return MLXSW_SP_CELLS_TO_BYTES(transmit_queue);
1536}
1537
1538static struct mlxsw_sp_port_hw_stats mlxsw_sp_port_hw_tc_stats[] = {
1539 {
1540 .str = "tc_transmit_queue_tc",
1541 .getter = mlxsw_reg_ppcnt_tc_transmit_queue_bytes_get,
1542 },
1543 {
1544 .str = "tc_no_buffer_discard_uc_tc",
1545 .getter = mlxsw_reg_ppcnt_tc_no_buffer_discard_uc_get,
1546 },
1547};
1548
1549#define MLXSW_SP_PORT_HW_TC_STATS_LEN ARRAY_SIZE(mlxsw_sp_port_hw_tc_stats)
1550
Ido Schimmel7ed674b2016-07-19 15:35:53 +02001551#define MLXSW_SP_PORT_ETHTOOL_STATS_LEN (MLXSW_SP_PORT_HW_STATS_LEN + \
Ido Schimmeldf4750e2016-07-19 15:35:54 +02001552 (MLXSW_SP_PORT_HW_PRIO_STATS_LEN + \
1553 MLXSW_SP_PORT_HW_TC_STATS_LEN) * \
Ido Schimmel7ed674b2016-07-19 15:35:53 +02001554 IEEE_8021QAZ_MAX_TCS)
1555
1556static void mlxsw_sp_port_get_prio_strings(u8 **p, int prio)
1557{
1558 int i;
1559
1560 for (i = 0; i < MLXSW_SP_PORT_HW_PRIO_STATS_LEN; i++) {
1561 snprintf(*p, ETH_GSTRING_LEN, "%s_%d",
1562 mlxsw_sp_port_hw_prio_stats[i].str, prio);
1563 *p += ETH_GSTRING_LEN;
1564 }
1565}
1566
Ido Schimmeldf4750e2016-07-19 15:35:54 +02001567static void mlxsw_sp_port_get_tc_strings(u8 **p, int tc)
1568{
1569 int i;
1570
1571 for (i = 0; i < MLXSW_SP_PORT_HW_TC_STATS_LEN; i++) {
1572 snprintf(*p, ETH_GSTRING_LEN, "%s_%d",
1573 mlxsw_sp_port_hw_tc_stats[i].str, tc);
1574 *p += ETH_GSTRING_LEN;
1575 }
1576}
1577
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001578static void mlxsw_sp_port_get_strings(struct net_device *dev,
1579 u32 stringset, u8 *data)
1580{
1581 u8 *p = data;
1582 int i;
1583
1584 switch (stringset) {
1585 case ETH_SS_STATS:
1586 for (i = 0; i < MLXSW_SP_PORT_HW_STATS_LEN; i++) {
1587 memcpy(p, mlxsw_sp_port_hw_stats[i].str,
1588 ETH_GSTRING_LEN);
1589 p += ETH_GSTRING_LEN;
1590 }
Ido Schimmel7ed674b2016-07-19 15:35:53 +02001591
1592 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++)
1593 mlxsw_sp_port_get_prio_strings(&p, i);
1594
Ido Schimmeldf4750e2016-07-19 15:35:54 +02001595 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++)
1596 mlxsw_sp_port_get_tc_strings(&p, i);
1597
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001598 break;
1599 }
1600}
1601
Ido Schimmel3a66ee32015-11-27 13:45:55 +01001602static int mlxsw_sp_port_set_phys_id(struct net_device *dev,
1603 enum ethtool_phys_id_state state)
1604{
1605 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
1606 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
1607 char mlcr_pl[MLXSW_REG_MLCR_LEN];
1608 bool active;
1609
1610 switch (state) {
1611 case ETHTOOL_ID_ACTIVE:
1612 active = true;
1613 break;
1614 case ETHTOOL_ID_INACTIVE:
1615 active = false;
1616 break;
1617 default:
1618 return -EOPNOTSUPP;
1619 }
1620
1621 mlxsw_reg_mlcr_pack(mlcr_pl, mlxsw_sp_port->local_port, active);
1622 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(mlcr), mlcr_pl);
1623}
1624
Ido Schimmel7ed674b2016-07-19 15:35:53 +02001625static int
1626mlxsw_sp_get_hw_stats_by_group(struct mlxsw_sp_port_hw_stats **p_hw_stats,
1627 int *p_len, enum mlxsw_reg_ppcnt_grp grp)
1628{
1629 switch (grp) {
1630 case MLXSW_REG_PPCNT_IEEE_8023_CNT:
1631 *p_hw_stats = mlxsw_sp_port_hw_stats;
1632 *p_len = MLXSW_SP_PORT_HW_STATS_LEN;
1633 break;
1634 case MLXSW_REG_PPCNT_PRIO_CNT:
1635 *p_hw_stats = mlxsw_sp_port_hw_prio_stats;
1636 *p_len = MLXSW_SP_PORT_HW_PRIO_STATS_LEN;
1637 break;
Ido Schimmeldf4750e2016-07-19 15:35:54 +02001638 case MLXSW_REG_PPCNT_TC_CNT:
1639 *p_hw_stats = mlxsw_sp_port_hw_tc_stats;
1640 *p_len = MLXSW_SP_PORT_HW_TC_STATS_LEN;
1641 break;
Ido Schimmel7ed674b2016-07-19 15:35:53 +02001642 default:
1643 WARN_ON(1);
1644 return -ENOTSUPP;
1645 }
1646 return 0;
1647}
1648
1649static void __mlxsw_sp_port_get_stats(struct net_device *dev,
1650 enum mlxsw_reg_ppcnt_grp grp, int prio,
1651 u64 *data, int data_index)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001652{
Ido Schimmel7ed674b2016-07-19 15:35:53 +02001653 struct mlxsw_sp_port_hw_stats *hw_stats;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001654 char ppcnt_pl[MLXSW_REG_PPCNT_LEN];
Ido Schimmel7ed674b2016-07-19 15:35:53 +02001655 int i, len;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001656 int err;
1657
Ido Schimmel7ed674b2016-07-19 15:35:53 +02001658 err = mlxsw_sp_get_hw_stats_by_group(&hw_stats, &len, grp);
1659 if (err)
1660 return;
Nogah Frankelfc1bbb02016-09-16 15:05:38 +02001661 mlxsw_sp_port_get_stats_raw(dev, grp, prio, ppcnt_pl);
Ido Schimmel7ed674b2016-07-19 15:35:53 +02001662 for (i = 0; i < len; i++)
1663 data[data_index + i] = !err ? hw_stats[i].getter(ppcnt_pl) : 0;
1664}
1665
1666static void mlxsw_sp_port_get_stats(struct net_device *dev,
1667 struct ethtool_stats *stats, u64 *data)
1668{
1669 int i, data_index = 0;
1670
1671 /* IEEE 802.3 Counters */
1672 __mlxsw_sp_port_get_stats(dev, MLXSW_REG_PPCNT_IEEE_8023_CNT, 0,
1673 data, data_index);
1674 data_index = MLXSW_SP_PORT_HW_STATS_LEN;
1675
1676 /* Per-Priority Counters */
1677 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
1678 __mlxsw_sp_port_get_stats(dev, MLXSW_REG_PPCNT_PRIO_CNT, i,
1679 data, data_index);
1680 data_index += MLXSW_SP_PORT_HW_PRIO_STATS_LEN;
1681 }
Ido Schimmeldf4750e2016-07-19 15:35:54 +02001682
1683 /* Per-TC Counters */
1684 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
1685 __mlxsw_sp_port_get_stats(dev, MLXSW_REG_PPCNT_TC_CNT, i,
1686 data, data_index);
1687 data_index += MLXSW_SP_PORT_HW_TC_STATS_LEN;
1688 }
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001689}
1690
1691static int mlxsw_sp_port_get_sset_count(struct net_device *dev, int sset)
1692{
1693 switch (sset) {
1694 case ETH_SS_STATS:
Ido Schimmel7ed674b2016-07-19 15:35:53 +02001695 return MLXSW_SP_PORT_ETHTOOL_STATS_LEN;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001696 default:
1697 return -EOPNOTSUPP;
1698 }
1699}
1700
1701struct mlxsw_sp_port_link_mode {
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001702 enum ethtool_link_mode_bit_indices mask_ethtool;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001703 u32 mask;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001704 u32 speed;
1705};
1706
1707static const struct mlxsw_sp_port_link_mode mlxsw_sp_port_link_mode[] = {
1708 {
1709 .mask = MLXSW_REG_PTYS_ETH_SPEED_100BASE_T,
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001710 .mask_ethtool = ETHTOOL_LINK_MODE_100baseT_Full_BIT,
1711 .speed = SPEED_100,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001712 },
1713 {
1714 .mask = MLXSW_REG_PTYS_ETH_SPEED_SGMII |
1715 MLXSW_REG_PTYS_ETH_SPEED_1000BASE_KX,
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001716 .mask_ethtool = ETHTOOL_LINK_MODE_1000baseKX_Full_BIT,
1717 .speed = SPEED_1000,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001718 },
1719 {
1720 .mask = MLXSW_REG_PTYS_ETH_SPEED_10GBASE_T,
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001721 .mask_ethtool = ETHTOOL_LINK_MODE_10000baseT_Full_BIT,
1722 .speed = SPEED_10000,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001723 },
1724 {
1725 .mask = MLXSW_REG_PTYS_ETH_SPEED_10GBASE_CX4 |
1726 MLXSW_REG_PTYS_ETH_SPEED_10GBASE_KX4,
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001727 .mask_ethtool = ETHTOOL_LINK_MODE_10000baseKX4_Full_BIT,
1728 .speed = SPEED_10000,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001729 },
1730 {
1731 .mask = MLXSW_REG_PTYS_ETH_SPEED_10GBASE_KR |
1732 MLXSW_REG_PTYS_ETH_SPEED_10GBASE_CR |
1733 MLXSW_REG_PTYS_ETH_SPEED_10GBASE_SR |
1734 MLXSW_REG_PTYS_ETH_SPEED_10GBASE_ER_LR,
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001735 .mask_ethtool = ETHTOOL_LINK_MODE_10000baseKR_Full_BIT,
1736 .speed = SPEED_10000,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001737 },
1738 {
1739 .mask = MLXSW_REG_PTYS_ETH_SPEED_20GBASE_KR2,
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001740 .mask_ethtool = ETHTOOL_LINK_MODE_20000baseKR2_Full_BIT,
1741 .speed = SPEED_20000,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001742 },
1743 {
1744 .mask = MLXSW_REG_PTYS_ETH_SPEED_40GBASE_CR4,
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001745 .mask_ethtool = ETHTOOL_LINK_MODE_40000baseCR4_Full_BIT,
1746 .speed = SPEED_40000,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001747 },
1748 {
1749 .mask = MLXSW_REG_PTYS_ETH_SPEED_40GBASE_KR4,
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001750 .mask_ethtool = ETHTOOL_LINK_MODE_40000baseKR4_Full_BIT,
1751 .speed = SPEED_40000,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001752 },
1753 {
1754 .mask = MLXSW_REG_PTYS_ETH_SPEED_40GBASE_SR4,
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001755 .mask_ethtool = ETHTOOL_LINK_MODE_40000baseSR4_Full_BIT,
1756 .speed = SPEED_40000,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001757 },
1758 {
1759 .mask = MLXSW_REG_PTYS_ETH_SPEED_40GBASE_LR4_ER4,
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001760 .mask_ethtool = ETHTOOL_LINK_MODE_40000baseLR4_Full_BIT,
1761 .speed = SPEED_40000,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001762 },
1763 {
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001764 .mask = MLXSW_REG_PTYS_ETH_SPEED_25GBASE_CR,
1765 .mask_ethtool = ETHTOOL_LINK_MODE_25000baseCR_Full_BIT,
1766 .speed = SPEED_25000,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001767 },
1768 {
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001769 .mask = MLXSW_REG_PTYS_ETH_SPEED_25GBASE_KR,
1770 .mask_ethtool = ETHTOOL_LINK_MODE_25000baseKR_Full_BIT,
1771 .speed = SPEED_25000,
1772 },
1773 {
1774 .mask = MLXSW_REG_PTYS_ETH_SPEED_25GBASE_SR,
1775 .mask_ethtool = ETHTOOL_LINK_MODE_25000baseSR_Full_BIT,
1776 .speed = SPEED_25000,
1777 },
1778 {
1779 .mask = MLXSW_REG_PTYS_ETH_SPEED_25GBASE_SR,
1780 .mask_ethtool = ETHTOOL_LINK_MODE_25000baseSR_Full_BIT,
1781 .speed = SPEED_25000,
1782 },
1783 {
1784 .mask = MLXSW_REG_PTYS_ETH_SPEED_50GBASE_CR2,
1785 .mask_ethtool = ETHTOOL_LINK_MODE_50000baseCR2_Full_BIT,
1786 .speed = SPEED_50000,
1787 },
1788 {
1789 .mask = MLXSW_REG_PTYS_ETH_SPEED_50GBASE_KR2,
1790 .mask_ethtool = ETHTOOL_LINK_MODE_50000baseKR2_Full_BIT,
1791 .speed = SPEED_50000,
1792 },
1793 {
1794 .mask = MLXSW_REG_PTYS_ETH_SPEED_50GBASE_SR2,
1795 .mask_ethtool = ETHTOOL_LINK_MODE_50000baseSR2_Full_BIT,
1796 .speed = SPEED_50000,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001797 },
1798 {
1799 .mask = MLXSW_REG_PTYS_ETH_SPEED_56GBASE_R4,
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001800 .mask_ethtool = ETHTOOL_LINK_MODE_56000baseKR4_Full_BIT,
1801 .speed = SPEED_56000,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001802 },
1803 {
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001804 .mask = MLXSW_REG_PTYS_ETH_SPEED_56GBASE_R4,
1805 .mask_ethtool = ETHTOOL_LINK_MODE_56000baseCR4_Full_BIT,
1806 .speed = SPEED_56000,
1807 },
1808 {
1809 .mask = MLXSW_REG_PTYS_ETH_SPEED_56GBASE_R4,
1810 .mask_ethtool = ETHTOOL_LINK_MODE_56000baseSR4_Full_BIT,
1811 .speed = SPEED_56000,
1812 },
1813 {
1814 .mask = MLXSW_REG_PTYS_ETH_SPEED_56GBASE_R4,
1815 .mask_ethtool = ETHTOOL_LINK_MODE_56000baseLR4_Full_BIT,
1816 .speed = SPEED_56000,
1817 },
1818 {
1819 .mask = MLXSW_REG_PTYS_ETH_SPEED_100GBASE_CR4,
1820 .mask_ethtool = ETHTOOL_LINK_MODE_100000baseCR4_Full_BIT,
1821 .speed = SPEED_100000,
1822 },
1823 {
1824 .mask = MLXSW_REG_PTYS_ETH_SPEED_100GBASE_SR4,
1825 .mask_ethtool = ETHTOOL_LINK_MODE_100000baseSR4_Full_BIT,
1826 .speed = SPEED_100000,
1827 },
1828 {
1829 .mask = MLXSW_REG_PTYS_ETH_SPEED_100GBASE_KR4,
1830 .mask_ethtool = ETHTOOL_LINK_MODE_100000baseKR4_Full_BIT,
1831 .speed = SPEED_100000,
1832 },
1833 {
1834 .mask = MLXSW_REG_PTYS_ETH_SPEED_100GBASE_LR4_ER4,
1835 .mask_ethtool = ETHTOOL_LINK_MODE_100000baseLR4_ER4_Full_BIT,
1836 .speed = SPEED_100000,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001837 },
1838};
1839
1840#define MLXSW_SP_PORT_LINK_MODE_LEN ARRAY_SIZE(mlxsw_sp_port_link_mode)
1841
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001842static void
1843mlxsw_sp_from_ptys_supported_port(u32 ptys_eth_proto,
1844 struct ethtool_link_ksettings *cmd)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001845{
1846 if (ptys_eth_proto & (MLXSW_REG_PTYS_ETH_SPEED_10GBASE_CR |
1847 MLXSW_REG_PTYS_ETH_SPEED_10GBASE_SR |
1848 MLXSW_REG_PTYS_ETH_SPEED_40GBASE_CR4 |
1849 MLXSW_REG_PTYS_ETH_SPEED_40GBASE_SR4 |
1850 MLXSW_REG_PTYS_ETH_SPEED_100GBASE_SR4 |
1851 MLXSW_REG_PTYS_ETH_SPEED_SGMII))
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001852 ethtool_link_ksettings_add_link_mode(cmd, supported, FIBRE);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001853
1854 if (ptys_eth_proto & (MLXSW_REG_PTYS_ETH_SPEED_10GBASE_KR |
1855 MLXSW_REG_PTYS_ETH_SPEED_10GBASE_KX4 |
1856 MLXSW_REG_PTYS_ETH_SPEED_40GBASE_KR4 |
1857 MLXSW_REG_PTYS_ETH_SPEED_100GBASE_KR4 |
1858 MLXSW_REG_PTYS_ETH_SPEED_1000BASE_KX))
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001859 ethtool_link_ksettings_add_link_mode(cmd, supported, Backplane);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001860}
1861
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001862static void mlxsw_sp_from_ptys_link(u32 ptys_eth_proto, unsigned long *mode)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001863{
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001864 int i;
1865
1866 for (i = 0; i < MLXSW_SP_PORT_LINK_MODE_LEN; i++) {
1867 if (ptys_eth_proto & mlxsw_sp_port_link_mode[i].mask)
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001868 __set_bit(mlxsw_sp_port_link_mode[i].mask_ethtool,
1869 mode);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001870 }
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001871}
1872
1873static void mlxsw_sp_from_ptys_speed_duplex(bool carrier_ok, u32 ptys_eth_proto,
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001874 struct ethtool_link_ksettings *cmd)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001875{
1876 u32 speed = SPEED_UNKNOWN;
1877 u8 duplex = DUPLEX_UNKNOWN;
1878 int i;
1879
1880 if (!carrier_ok)
1881 goto out;
1882
1883 for (i = 0; i < MLXSW_SP_PORT_LINK_MODE_LEN; i++) {
1884 if (ptys_eth_proto & mlxsw_sp_port_link_mode[i].mask) {
1885 speed = mlxsw_sp_port_link_mode[i].speed;
1886 duplex = DUPLEX_FULL;
1887 break;
1888 }
1889 }
1890out:
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001891 cmd->base.speed = speed;
1892 cmd->base.duplex = duplex;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001893}
1894
1895static u8 mlxsw_sp_port_connector_port(u32 ptys_eth_proto)
1896{
1897 if (ptys_eth_proto & (MLXSW_REG_PTYS_ETH_SPEED_10GBASE_SR |
1898 MLXSW_REG_PTYS_ETH_SPEED_40GBASE_SR4 |
1899 MLXSW_REG_PTYS_ETH_SPEED_100GBASE_SR4 |
1900 MLXSW_REG_PTYS_ETH_SPEED_SGMII))
1901 return PORT_FIBRE;
1902
1903 if (ptys_eth_proto & (MLXSW_REG_PTYS_ETH_SPEED_10GBASE_CR |
1904 MLXSW_REG_PTYS_ETH_SPEED_40GBASE_CR4 |
1905 MLXSW_REG_PTYS_ETH_SPEED_100GBASE_CR4))
1906 return PORT_DA;
1907
1908 if (ptys_eth_proto & (MLXSW_REG_PTYS_ETH_SPEED_10GBASE_KR |
1909 MLXSW_REG_PTYS_ETH_SPEED_10GBASE_KX4 |
1910 MLXSW_REG_PTYS_ETH_SPEED_40GBASE_KR4 |
1911 MLXSW_REG_PTYS_ETH_SPEED_100GBASE_KR4))
1912 return PORT_NONE;
1913
1914 return PORT_OTHER;
1915}
1916
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001917static u32
1918mlxsw_sp_to_ptys_advert_link(const struct ethtool_link_ksettings *cmd)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001919{
1920 u32 ptys_proto = 0;
1921 int i;
1922
1923 for (i = 0; i < MLXSW_SP_PORT_LINK_MODE_LEN; i++) {
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001924 if (test_bit(mlxsw_sp_port_link_mode[i].mask_ethtool,
1925 cmd->link_modes.advertising))
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001926 ptys_proto |= mlxsw_sp_port_link_mode[i].mask;
1927 }
1928 return ptys_proto;
1929}
1930
1931static u32 mlxsw_sp_to_ptys_speed(u32 speed)
1932{
1933 u32 ptys_proto = 0;
1934 int i;
1935
1936 for (i = 0; i < MLXSW_SP_PORT_LINK_MODE_LEN; i++) {
1937 if (speed == mlxsw_sp_port_link_mode[i].speed)
1938 ptys_proto |= mlxsw_sp_port_link_mode[i].mask;
1939 }
1940 return ptys_proto;
1941}
1942
Ido Schimmel18f1e702016-02-26 17:32:31 +01001943static u32 mlxsw_sp_to_ptys_upper_speed(u32 upper_speed)
1944{
1945 u32 ptys_proto = 0;
1946 int i;
1947
1948 for (i = 0; i < MLXSW_SP_PORT_LINK_MODE_LEN; i++) {
1949 if (mlxsw_sp_port_link_mode[i].speed <= upper_speed)
1950 ptys_proto |= mlxsw_sp_port_link_mode[i].mask;
1951 }
1952 return ptys_proto;
1953}
1954
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001955static void mlxsw_sp_port_get_link_supported(u32 eth_proto_cap,
1956 struct ethtool_link_ksettings *cmd)
1957{
1958 ethtool_link_ksettings_add_link_mode(cmd, supported, Asym_Pause);
1959 ethtool_link_ksettings_add_link_mode(cmd, supported, Autoneg);
1960 ethtool_link_ksettings_add_link_mode(cmd, supported, Pause);
1961
1962 mlxsw_sp_from_ptys_supported_port(eth_proto_cap, cmd);
1963 mlxsw_sp_from_ptys_link(eth_proto_cap, cmd->link_modes.supported);
1964}
1965
1966static void mlxsw_sp_port_get_link_advertise(u32 eth_proto_admin, bool autoneg,
1967 struct ethtool_link_ksettings *cmd)
1968{
1969 if (!autoneg)
1970 return;
1971
1972 ethtool_link_ksettings_add_link_mode(cmd, advertising, Autoneg);
1973 mlxsw_sp_from_ptys_link(eth_proto_admin, cmd->link_modes.advertising);
1974}
1975
1976static void
1977mlxsw_sp_port_get_link_lp_advertise(u32 eth_proto_lp, u8 autoneg_status,
1978 struct ethtool_link_ksettings *cmd)
1979{
1980 if (autoneg_status != MLXSW_REG_PTYS_AN_STATUS_OK || !eth_proto_lp)
1981 return;
1982
1983 ethtool_link_ksettings_add_link_mode(cmd, lp_advertising, Autoneg);
1984 mlxsw_sp_from_ptys_link(eth_proto_lp, cmd->link_modes.lp_advertising);
1985}
1986
1987static int mlxsw_sp_port_get_link_ksettings(struct net_device *dev,
1988 struct ethtool_link_ksettings *cmd)
1989{
1990 u32 eth_proto_cap, eth_proto_admin, eth_proto_oper, eth_proto_lp;
1991 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
1992 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
1993 char ptys_pl[MLXSW_REG_PTYS_LEN];
1994 u8 autoneg_status;
1995 bool autoneg;
1996 int err;
1997
1998 autoneg = mlxsw_sp_port->link.autoneg;
1999 mlxsw_reg_ptys_pack(ptys_pl, mlxsw_sp_port->local_port, 0);
2000 err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(ptys), ptys_pl);
2001 if (err)
2002 return err;
2003 mlxsw_reg_ptys_unpack(ptys_pl, &eth_proto_cap, &eth_proto_admin,
2004 &eth_proto_oper);
2005
2006 mlxsw_sp_port_get_link_supported(eth_proto_cap, cmd);
2007
2008 mlxsw_sp_port_get_link_advertise(eth_proto_admin, autoneg, cmd);
2009
2010 eth_proto_lp = mlxsw_reg_ptys_eth_proto_lp_advertise_get(ptys_pl);
2011 autoneg_status = mlxsw_reg_ptys_an_status_get(ptys_pl);
2012 mlxsw_sp_port_get_link_lp_advertise(eth_proto_lp, autoneg_status, cmd);
2013
2014 cmd->base.autoneg = autoneg ? AUTONEG_ENABLE : AUTONEG_DISABLE;
2015 cmd->base.port = mlxsw_sp_port_connector_port(eth_proto_oper);
2016 mlxsw_sp_from_ptys_speed_duplex(netif_carrier_ok(dev), eth_proto_oper,
2017 cmd);
2018
2019 return 0;
2020}
2021
2022static int
2023mlxsw_sp_port_set_link_ksettings(struct net_device *dev,
2024 const struct ethtool_link_ksettings *cmd)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002025{
2026 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
2027 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
2028 char ptys_pl[MLXSW_REG_PTYS_LEN];
Ido Schimmelb9d66a32016-09-12 13:26:27 +02002029 u32 eth_proto_cap, eth_proto_new;
Ido Schimmel0c83f882016-09-12 13:26:23 +02002030 bool autoneg;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002031 int err;
2032
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002033 mlxsw_reg_ptys_pack(ptys_pl, mlxsw_sp_port->local_port, 0);
2034 err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(ptys), ptys_pl);
Ido Schimmelb9d66a32016-09-12 13:26:27 +02002035 if (err)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002036 return err;
Ido Schimmelb9d66a32016-09-12 13:26:27 +02002037 mlxsw_reg_ptys_unpack(ptys_pl, &eth_proto_cap, NULL, NULL);
2038
2039 autoneg = cmd->base.autoneg == AUTONEG_ENABLE;
2040 eth_proto_new = autoneg ?
2041 mlxsw_sp_to_ptys_advert_link(cmd) :
2042 mlxsw_sp_to_ptys_speed(cmd->base.speed);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002043
2044 eth_proto_new = eth_proto_new & eth_proto_cap;
2045 if (!eth_proto_new) {
Ido Schimmelb9d66a32016-09-12 13:26:27 +02002046 netdev_err(dev, "No supported speed requested\n");
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002047 return -EINVAL;
2048 }
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002049
2050 mlxsw_reg_ptys_pack(ptys_pl, mlxsw_sp_port->local_port, eth_proto_new);
2051 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ptys), ptys_pl);
Ido Schimmelb9d66a32016-09-12 13:26:27 +02002052 if (err)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002053 return err;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002054
Ido Schimmel6277d462016-07-15 11:14:58 +02002055 if (!netif_running(dev))
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002056 return 0;
2057
Ido Schimmel0c83f882016-09-12 13:26:23 +02002058 mlxsw_sp_port->link.autoneg = autoneg;
2059
Ido Schimmelb9d66a32016-09-12 13:26:27 +02002060 mlxsw_sp_port_admin_status_set(mlxsw_sp_port, false);
2061 mlxsw_sp_port_admin_status_set(mlxsw_sp_port, true);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002062
2063 return 0;
2064}
2065
2066static const struct ethtool_ops mlxsw_sp_port_ethtool_ops = {
2067 .get_drvinfo = mlxsw_sp_port_get_drvinfo,
2068 .get_link = ethtool_op_get_link,
Ido Schimmel9f7ec052016-04-06 17:10:14 +02002069 .get_pauseparam = mlxsw_sp_port_get_pauseparam,
2070 .set_pauseparam = mlxsw_sp_port_set_pauseparam,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002071 .get_strings = mlxsw_sp_port_get_strings,
Ido Schimmel3a66ee32015-11-27 13:45:55 +01002072 .set_phys_id = mlxsw_sp_port_set_phys_id,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002073 .get_ethtool_stats = mlxsw_sp_port_get_stats,
2074 .get_sset_count = mlxsw_sp_port_get_sset_count,
Ido Schimmelb9d66a32016-09-12 13:26:27 +02002075 .get_link_ksettings = mlxsw_sp_port_get_link_ksettings,
2076 .set_link_ksettings = mlxsw_sp_port_set_link_ksettings,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002077};
2078
Ido Schimmel18f1e702016-02-26 17:32:31 +01002079static int
2080mlxsw_sp_port_speed_by_width_set(struct mlxsw_sp_port *mlxsw_sp_port, u8 width)
2081{
2082 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
2083 u32 upper_speed = MLXSW_SP_PORT_BASE_SPEED * width;
2084 char ptys_pl[MLXSW_REG_PTYS_LEN];
2085 u32 eth_proto_admin;
2086
2087 eth_proto_admin = mlxsw_sp_to_ptys_upper_speed(upper_speed);
2088 mlxsw_reg_ptys_pack(ptys_pl, mlxsw_sp_port->local_port,
2089 eth_proto_admin);
2090 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ptys), ptys_pl);
2091}
2092
Ido Schimmel8e8dfe92016-04-06 17:10:10 +02002093int mlxsw_sp_port_ets_set(struct mlxsw_sp_port *mlxsw_sp_port,
2094 enum mlxsw_reg_qeec_hr hr, u8 index, u8 next_index,
2095 bool dwrr, u8 dwrr_weight)
Ido Schimmel90183b92016-04-06 17:10:08 +02002096{
2097 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
2098 char qeec_pl[MLXSW_REG_QEEC_LEN];
2099
2100 mlxsw_reg_qeec_pack(qeec_pl, mlxsw_sp_port->local_port, hr, index,
2101 next_index);
2102 mlxsw_reg_qeec_de_set(qeec_pl, true);
2103 mlxsw_reg_qeec_dwrr_set(qeec_pl, dwrr);
2104 mlxsw_reg_qeec_dwrr_weight_set(qeec_pl, dwrr_weight);
2105 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(qeec), qeec_pl);
2106}
2107
Ido Schimmelcc7cf512016-04-06 17:10:11 +02002108int mlxsw_sp_port_ets_maxrate_set(struct mlxsw_sp_port *mlxsw_sp_port,
2109 enum mlxsw_reg_qeec_hr hr, u8 index,
2110 u8 next_index, u32 maxrate)
Ido Schimmel90183b92016-04-06 17:10:08 +02002111{
2112 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
2113 char qeec_pl[MLXSW_REG_QEEC_LEN];
2114
2115 mlxsw_reg_qeec_pack(qeec_pl, mlxsw_sp_port->local_port, hr, index,
2116 next_index);
2117 mlxsw_reg_qeec_mase_set(qeec_pl, true);
2118 mlxsw_reg_qeec_max_shaper_rate_set(qeec_pl, maxrate);
2119 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(qeec), qeec_pl);
2120}
2121
Ido Schimmel8e8dfe92016-04-06 17:10:10 +02002122int mlxsw_sp_port_prio_tc_set(struct mlxsw_sp_port *mlxsw_sp_port,
2123 u8 switch_prio, u8 tclass)
Ido Schimmel90183b92016-04-06 17:10:08 +02002124{
2125 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
2126 char qtct_pl[MLXSW_REG_QTCT_LEN];
2127
2128 mlxsw_reg_qtct_pack(qtct_pl, mlxsw_sp_port->local_port, switch_prio,
2129 tclass);
2130 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(qtct), qtct_pl);
2131}
2132
2133static int mlxsw_sp_port_ets_init(struct mlxsw_sp_port *mlxsw_sp_port)
2134{
2135 int err, i;
2136
2137 /* Setup the elements hierarcy, so that each TC is linked to
2138 * one subgroup, which are all member in the same group.
2139 */
2140 err = mlxsw_sp_port_ets_set(mlxsw_sp_port,
2141 MLXSW_REG_QEEC_HIERARCY_GROUP, 0, 0, false,
2142 0);
2143 if (err)
2144 return err;
2145 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
2146 err = mlxsw_sp_port_ets_set(mlxsw_sp_port,
2147 MLXSW_REG_QEEC_HIERARCY_SUBGROUP, i,
2148 0, false, 0);
2149 if (err)
2150 return err;
2151 }
2152 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
2153 err = mlxsw_sp_port_ets_set(mlxsw_sp_port,
2154 MLXSW_REG_QEEC_HIERARCY_TC, i, i,
2155 false, 0);
2156 if (err)
2157 return err;
2158 }
2159
2160 /* Make sure the max shaper is disabled in all hierarcies that
2161 * support it.
2162 */
2163 err = mlxsw_sp_port_ets_maxrate_set(mlxsw_sp_port,
2164 MLXSW_REG_QEEC_HIERARCY_PORT, 0, 0,
2165 MLXSW_REG_QEEC_MAS_DIS);
2166 if (err)
2167 return err;
2168 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
2169 err = mlxsw_sp_port_ets_maxrate_set(mlxsw_sp_port,
2170 MLXSW_REG_QEEC_HIERARCY_SUBGROUP,
2171 i, 0,
2172 MLXSW_REG_QEEC_MAS_DIS);
2173 if (err)
2174 return err;
2175 }
2176 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
2177 err = mlxsw_sp_port_ets_maxrate_set(mlxsw_sp_port,
2178 MLXSW_REG_QEEC_HIERARCY_TC,
2179 i, i,
2180 MLXSW_REG_QEEC_MAS_DIS);
2181 if (err)
2182 return err;
2183 }
2184
2185 /* Map all priorities to traffic class 0. */
2186 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
2187 err = mlxsw_sp_port_prio_tc_set(mlxsw_sp_port, i, 0);
2188 if (err)
2189 return err;
2190 }
2191
2192 return 0;
2193}
2194
Ido Schimmel05978482016-08-17 16:39:30 +02002195static int mlxsw_sp_port_pvid_vport_create(struct mlxsw_sp_port *mlxsw_sp_port)
2196{
2197 mlxsw_sp_port->pvid = 1;
2198
2199 return mlxsw_sp_port_add_vid(mlxsw_sp_port->dev, 0, 1);
2200}
2201
2202static int mlxsw_sp_port_pvid_vport_destroy(struct mlxsw_sp_port *mlxsw_sp_port)
2203{
2204 return mlxsw_sp_port_kill_vid(mlxsw_sp_port->dev, 0, 1);
2205}
2206
Ido Schimmelbe945352016-06-09 09:51:39 +02002207static int mlxsw_sp_port_create(struct mlxsw_sp *mlxsw_sp, u8 local_port,
Ido Schimmeld664b412016-06-09 09:51:40 +02002208 bool split, u8 module, u8 width, u8 lane)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002209{
2210 struct mlxsw_sp_port *mlxsw_sp_port;
2211 struct net_device *dev;
Ido Schimmelbd40e9d2015-12-15 16:03:36 +01002212 size_t bytes;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002213 int err;
2214
2215 dev = alloc_etherdev(sizeof(struct mlxsw_sp_port));
2216 if (!dev)
2217 return -ENOMEM;
2218 mlxsw_sp_port = netdev_priv(dev);
2219 mlxsw_sp_port->dev = dev;
2220 mlxsw_sp_port->mlxsw_sp = mlxsw_sp;
2221 mlxsw_sp_port->local_port = local_port;
Ido Schimmel18f1e702016-02-26 17:32:31 +01002222 mlxsw_sp_port->split = split;
Ido Schimmeld664b412016-06-09 09:51:40 +02002223 mlxsw_sp_port->mapping.module = module;
2224 mlxsw_sp_port->mapping.width = width;
2225 mlxsw_sp_port->mapping.lane = lane;
Ido Schimmel0c83f882016-09-12 13:26:23 +02002226 mlxsw_sp_port->link.autoneg = 1;
Ido Schimmelbd40e9d2015-12-15 16:03:36 +01002227 bytes = DIV_ROUND_UP(VLAN_N_VID, BITS_PER_BYTE);
2228 mlxsw_sp_port->active_vlans = kzalloc(bytes, GFP_KERNEL);
2229 if (!mlxsw_sp_port->active_vlans) {
2230 err = -ENOMEM;
2231 goto err_port_active_vlans_alloc;
2232 }
Elad Razfc1273a2016-01-06 13:01:11 +01002233 mlxsw_sp_port->untagged_vlans = kzalloc(bytes, GFP_KERNEL);
2234 if (!mlxsw_sp_port->untagged_vlans) {
2235 err = -ENOMEM;
2236 goto err_port_untagged_vlans_alloc;
2237 }
Ido Schimmel7f71eb42015-12-15 16:03:37 +01002238 INIT_LIST_HEAD(&mlxsw_sp_port->vports_list);
Yotam Gigi763b4b72016-07-21 12:03:17 +02002239 INIT_LIST_HEAD(&mlxsw_sp_port->mall_tc_list);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002240
2241 mlxsw_sp_port->pcpu_stats =
2242 netdev_alloc_pcpu_stats(struct mlxsw_sp_port_pcpu_stats);
2243 if (!mlxsw_sp_port->pcpu_stats) {
2244 err = -ENOMEM;
2245 goto err_alloc_stats;
2246 }
2247
Nogah Frankelfc1bbb02016-09-16 15:05:38 +02002248 mlxsw_sp_port->hw_stats.cache =
2249 kzalloc(sizeof(*mlxsw_sp_port->hw_stats.cache), GFP_KERNEL);
2250
2251 if (!mlxsw_sp_port->hw_stats.cache) {
2252 err = -ENOMEM;
2253 goto err_alloc_hw_stats;
2254 }
2255 INIT_DELAYED_WORK(&mlxsw_sp_port->hw_stats.update_dw,
2256 &update_stats_cache);
2257
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002258 dev->netdev_ops = &mlxsw_sp_port_netdev_ops;
2259 dev->ethtool_ops = &mlxsw_sp_port_ethtool_ops;
2260
Ido Schimmel3247ff22016-09-08 08:16:02 +02002261 err = mlxsw_sp_port_swid_set(mlxsw_sp_port, 0);
2262 if (err) {
2263 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to set SWID\n",
2264 mlxsw_sp_port->local_port);
2265 goto err_port_swid_set;
2266 }
2267
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002268 err = mlxsw_sp_port_dev_addr_init(mlxsw_sp_port);
2269 if (err) {
2270 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Unable to init port mac address\n",
2271 mlxsw_sp_port->local_port);
2272 goto err_dev_addr_init;
2273 }
2274
2275 netif_carrier_off(dev);
2276
2277 dev->features |= NETIF_F_NETNS_LOCAL | NETIF_F_LLTX | NETIF_F_SG |
Yotam Gigi763b4b72016-07-21 12:03:17 +02002278 NETIF_F_HW_VLAN_CTAG_FILTER | NETIF_F_HW_TC;
2279 dev->hw_features |= NETIF_F_HW_TC;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002280
2281 /* Each packet needs to have a Tx header (metadata) on top all other
2282 * headers.
2283 */
2284 dev->hard_header_len += MLXSW_TXHDR_LEN;
2285
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002286 err = mlxsw_sp_port_system_port_mapping_set(mlxsw_sp_port);
2287 if (err) {
2288 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to set system port mapping\n",
2289 mlxsw_sp_port->local_port);
2290 goto err_port_system_port_mapping_set;
2291 }
2292
Ido Schimmel18f1e702016-02-26 17:32:31 +01002293 err = mlxsw_sp_port_speed_by_width_set(mlxsw_sp_port, width);
2294 if (err) {
2295 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to enable speeds\n",
2296 mlxsw_sp_port->local_port);
2297 goto err_port_speed_by_width_set;
2298 }
2299
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002300 err = mlxsw_sp_port_mtu_set(mlxsw_sp_port, ETH_DATA_LEN);
2301 if (err) {
2302 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to set MTU\n",
2303 mlxsw_sp_port->local_port);
2304 goto err_port_mtu_set;
2305 }
2306
2307 err = mlxsw_sp_port_admin_status_set(mlxsw_sp_port, false);
2308 if (err)
2309 goto err_port_admin_status_set;
2310
2311 err = mlxsw_sp_port_buffers_init(mlxsw_sp_port);
2312 if (err) {
2313 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to initialize buffers\n",
2314 mlxsw_sp_port->local_port);
2315 goto err_port_buffers_init;
2316 }
2317
Ido Schimmel90183b92016-04-06 17:10:08 +02002318 err = mlxsw_sp_port_ets_init(mlxsw_sp_port);
2319 if (err) {
2320 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to initialize ETS\n",
2321 mlxsw_sp_port->local_port);
2322 goto err_port_ets_init;
2323 }
2324
Ido Schimmelf00817d2016-04-06 17:10:09 +02002325 /* ETS and buffers must be initialized before DCB. */
2326 err = mlxsw_sp_port_dcb_init(mlxsw_sp_port);
2327 if (err) {
2328 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to initialize DCB\n",
2329 mlxsw_sp_port->local_port);
2330 goto err_port_dcb_init;
2331 }
2332
Ido Schimmel05978482016-08-17 16:39:30 +02002333 err = mlxsw_sp_port_pvid_vport_create(mlxsw_sp_port);
2334 if (err) {
2335 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to create PVID vPort\n",
2336 mlxsw_sp_port->local_port);
2337 goto err_port_pvid_vport_create;
2338 }
2339
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002340 mlxsw_sp_port_switchdev_init(mlxsw_sp_port);
Ido Schimmel2f258442016-08-17 16:39:31 +02002341 mlxsw_sp->ports[local_port] = mlxsw_sp_port;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002342 err = register_netdev(dev);
2343 if (err) {
2344 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to register netdev\n",
2345 mlxsw_sp_port->local_port);
2346 goto err_register_netdev;
2347 }
2348
Jiri Pirko932762b2016-04-08 19:11:21 +02002349 err = mlxsw_core_port_init(mlxsw_sp->core, &mlxsw_sp_port->core_port,
2350 mlxsw_sp_port->local_port, dev,
2351 mlxsw_sp_port->split, module);
2352 if (err) {
2353 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to init core port\n",
2354 mlxsw_sp_port->local_port);
2355 goto err_core_port_init;
2356 }
Jiri Pirkoc4745502016-02-26 17:32:26 +01002357
Nogah Frankelfc1bbb02016-09-16 15:05:38 +02002358 mlxsw_core_schedule_dw(&mlxsw_sp_port->hw_stats.update_dw, 0);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002359 return 0;
2360
Jiri Pirko932762b2016-04-08 19:11:21 +02002361err_core_port_init:
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002362 unregister_netdev(dev);
2363err_register_netdev:
Ido Schimmel2f258442016-08-17 16:39:31 +02002364 mlxsw_sp->ports[local_port] = NULL;
Ido Schimmel05832722016-08-17 16:39:35 +02002365 mlxsw_sp_port_switchdev_fini(mlxsw_sp_port);
Ido Schimmel05978482016-08-17 16:39:30 +02002366 mlxsw_sp_port_pvid_vport_destroy(mlxsw_sp_port);
2367err_port_pvid_vport_create:
Ido Schimmel4de34eb2016-08-04 17:36:22 +03002368 mlxsw_sp_port_dcb_fini(mlxsw_sp_port);
Ido Schimmelf00817d2016-04-06 17:10:09 +02002369err_port_dcb_init:
Ido Schimmel90183b92016-04-06 17:10:08 +02002370err_port_ets_init:
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002371err_port_buffers_init:
2372err_port_admin_status_set:
2373err_port_mtu_set:
Ido Schimmel18f1e702016-02-26 17:32:31 +01002374err_port_speed_by_width_set:
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002375err_port_system_port_mapping_set:
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002376err_dev_addr_init:
Ido Schimmel3247ff22016-09-08 08:16:02 +02002377 mlxsw_sp_port_swid_set(mlxsw_sp_port, MLXSW_PORT_SWID_DISABLED_PORT);
2378err_port_swid_set:
Nogah Frankelfc1bbb02016-09-16 15:05:38 +02002379 kfree(mlxsw_sp_port->hw_stats.cache);
2380err_alloc_hw_stats:
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002381 free_percpu(mlxsw_sp_port->pcpu_stats);
2382err_alloc_stats:
Elad Razfc1273a2016-01-06 13:01:11 +01002383 kfree(mlxsw_sp_port->untagged_vlans);
2384err_port_untagged_vlans_alloc:
Ido Schimmelbd40e9d2015-12-15 16:03:36 +01002385 kfree(mlxsw_sp_port->active_vlans);
2386err_port_active_vlans_alloc:
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002387 free_netdev(dev);
2388 return err;
2389}
2390
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002391static void mlxsw_sp_port_remove(struct mlxsw_sp *mlxsw_sp, u8 local_port)
2392{
2393 struct mlxsw_sp_port *mlxsw_sp_port = mlxsw_sp->ports[local_port];
2394
2395 if (!mlxsw_sp_port)
2396 return;
Nogah Frankelfc1bbb02016-09-16 15:05:38 +02002397 cancel_delayed_work_sync(&mlxsw_sp_port->hw_stats.update_dw);
Jiri Pirko932762b2016-04-08 19:11:21 +02002398 mlxsw_core_port_fini(&mlxsw_sp_port->core_port);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002399 unregister_netdev(mlxsw_sp_port->dev); /* This calls ndo_stop */
Ido Schimmel2f258442016-08-17 16:39:31 +02002400 mlxsw_sp->ports[local_port] = NULL;
Ido Schimmel05832722016-08-17 16:39:35 +02002401 mlxsw_sp_port_switchdev_fini(mlxsw_sp_port);
Ido Schimmel05978482016-08-17 16:39:30 +02002402 mlxsw_sp_port_pvid_vport_destroy(mlxsw_sp_port);
Ido Schimmelf00817d2016-04-06 17:10:09 +02002403 mlxsw_sp_port_dcb_fini(mlxsw_sp_port);
Ido Schimmel3e9b27b2016-02-26 17:32:28 +01002404 mlxsw_sp_port_swid_set(mlxsw_sp_port, MLXSW_PORT_SWID_DISABLED_PORT);
2405 mlxsw_sp_port_module_unmap(mlxsw_sp, mlxsw_sp_port->local_port);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002406 free_percpu(mlxsw_sp_port->pcpu_stats);
Nogah Frankelfc1bbb02016-09-16 15:05:38 +02002407 kfree(mlxsw_sp_port->hw_stats.cache);
Elad Razfc1273a2016-01-06 13:01:11 +01002408 kfree(mlxsw_sp_port->untagged_vlans);
Ido Schimmelbd40e9d2015-12-15 16:03:36 +01002409 kfree(mlxsw_sp_port->active_vlans);
Ido Schimmel32d863f2016-07-02 11:00:10 +02002410 WARN_ON_ONCE(!list_empty(&mlxsw_sp_port->vports_list));
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002411 free_netdev(mlxsw_sp_port->dev);
2412}
2413
2414static void mlxsw_sp_ports_remove(struct mlxsw_sp *mlxsw_sp)
2415{
2416 int i;
2417
2418 for (i = 1; i < MLXSW_PORT_MAX_PORTS; i++)
2419 mlxsw_sp_port_remove(mlxsw_sp, i);
2420 kfree(mlxsw_sp->ports);
2421}
2422
2423static int mlxsw_sp_ports_create(struct mlxsw_sp *mlxsw_sp)
2424{
Ido Schimmeld664b412016-06-09 09:51:40 +02002425 u8 module, width, lane;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002426 size_t alloc_size;
2427 int i;
2428 int err;
2429
2430 alloc_size = sizeof(struct mlxsw_sp_port *) * MLXSW_PORT_MAX_PORTS;
2431 mlxsw_sp->ports = kzalloc(alloc_size, GFP_KERNEL);
2432 if (!mlxsw_sp->ports)
2433 return -ENOMEM;
2434
2435 for (i = 1; i < MLXSW_PORT_MAX_PORTS; i++) {
Ido Schimmel558c2d52016-02-26 17:32:29 +01002436 err = mlxsw_sp_port_module_info_get(mlxsw_sp, i, &module,
Ido Schimmeld664b412016-06-09 09:51:40 +02002437 &width, &lane);
Ido Schimmel558c2d52016-02-26 17:32:29 +01002438 if (err)
2439 goto err_port_module_info_get;
2440 if (!width)
2441 continue;
2442 mlxsw_sp->port_to_module[i] = module;
Ido Schimmeld664b412016-06-09 09:51:40 +02002443 err = mlxsw_sp_port_create(mlxsw_sp, i, false, module, width,
2444 lane);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002445 if (err)
2446 goto err_port_create;
2447 }
2448 return 0;
2449
2450err_port_create:
Ido Schimmel558c2d52016-02-26 17:32:29 +01002451err_port_module_info_get:
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002452 for (i--; i >= 1; i--)
2453 mlxsw_sp_port_remove(mlxsw_sp, i);
2454 kfree(mlxsw_sp->ports);
2455 return err;
2456}
2457
Ido Schimmel18f1e702016-02-26 17:32:31 +01002458static u8 mlxsw_sp_cluster_base_port_get(u8 local_port)
2459{
2460 u8 offset = (local_port - 1) % MLXSW_SP_PORTS_PER_CLUSTER_MAX;
2461
2462 return local_port - offset;
2463}
2464
Ido Schimmelbe945352016-06-09 09:51:39 +02002465static int mlxsw_sp_port_split_create(struct mlxsw_sp *mlxsw_sp, u8 base_port,
2466 u8 module, unsigned int count)
2467{
2468 u8 width = MLXSW_PORT_MODULE_MAX_WIDTH / count;
2469 int err, i;
2470
2471 for (i = 0; i < count; i++) {
2472 err = mlxsw_sp_port_module_map(mlxsw_sp, base_port + i, module,
2473 width, i * width);
2474 if (err)
2475 goto err_port_module_map;
2476 }
2477
2478 for (i = 0; i < count; i++) {
2479 err = __mlxsw_sp_port_swid_set(mlxsw_sp, base_port + i, 0);
2480 if (err)
2481 goto err_port_swid_set;
2482 }
2483
2484 for (i = 0; i < count; i++) {
2485 err = mlxsw_sp_port_create(mlxsw_sp, base_port + i, true,
Ido Schimmeld664b412016-06-09 09:51:40 +02002486 module, width, i * width);
Ido Schimmelbe945352016-06-09 09:51:39 +02002487 if (err)
2488 goto err_port_create;
2489 }
2490
2491 return 0;
2492
2493err_port_create:
2494 for (i--; i >= 0; i--)
2495 mlxsw_sp_port_remove(mlxsw_sp, base_port + i);
2496 i = count;
2497err_port_swid_set:
2498 for (i--; i >= 0; i--)
2499 __mlxsw_sp_port_swid_set(mlxsw_sp, base_port + i,
2500 MLXSW_PORT_SWID_DISABLED_PORT);
2501 i = count;
2502err_port_module_map:
2503 for (i--; i >= 0; i--)
2504 mlxsw_sp_port_module_unmap(mlxsw_sp, base_port + i);
2505 return err;
2506}
2507
2508static void mlxsw_sp_port_unsplit_create(struct mlxsw_sp *mlxsw_sp,
2509 u8 base_port, unsigned int count)
2510{
2511 u8 local_port, module, width = MLXSW_PORT_MODULE_MAX_WIDTH;
2512 int i;
2513
2514 /* Split by four means we need to re-create two ports, otherwise
2515 * only one.
2516 */
2517 count = count / 2;
2518
2519 for (i = 0; i < count; i++) {
2520 local_port = base_port + i * 2;
2521 module = mlxsw_sp->port_to_module[local_port];
2522
2523 mlxsw_sp_port_module_map(mlxsw_sp, local_port, module, width,
2524 0);
2525 }
2526
2527 for (i = 0; i < count; i++)
2528 __mlxsw_sp_port_swid_set(mlxsw_sp, base_port + i * 2, 0);
2529
2530 for (i = 0; i < count; i++) {
2531 local_port = base_port + i * 2;
2532 module = mlxsw_sp->port_to_module[local_port];
2533
2534 mlxsw_sp_port_create(mlxsw_sp, local_port, false, module,
Ido Schimmeld664b412016-06-09 09:51:40 +02002535 width, 0);
Ido Schimmelbe945352016-06-09 09:51:39 +02002536 }
2537}
2538
Jiri Pirkob2f10572016-04-08 19:11:23 +02002539static int mlxsw_sp_port_split(struct mlxsw_core *mlxsw_core, u8 local_port,
2540 unsigned int count)
Ido Schimmel18f1e702016-02-26 17:32:31 +01002541{
Jiri Pirkob2f10572016-04-08 19:11:23 +02002542 struct mlxsw_sp *mlxsw_sp = mlxsw_core_driver_priv(mlxsw_core);
Ido Schimmel18f1e702016-02-26 17:32:31 +01002543 struct mlxsw_sp_port *mlxsw_sp_port;
Ido Schimmel18f1e702016-02-26 17:32:31 +01002544 u8 module, cur_width, base_port;
2545 int i;
2546 int err;
2547
2548 mlxsw_sp_port = mlxsw_sp->ports[local_port];
2549 if (!mlxsw_sp_port) {
2550 dev_err(mlxsw_sp->bus_info->dev, "Port number \"%d\" does not exist\n",
2551 local_port);
2552 return -EINVAL;
2553 }
2554
Ido Schimmeld664b412016-06-09 09:51:40 +02002555 module = mlxsw_sp_port->mapping.module;
2556 cur_width = mlxsw_sp_port->mapping.width;
2557
Ido Schimmel18f1e702016-02-26 17:32:31 +01002558 if (count != 2 && count != 4) {
2559 netdev_err(mlxsw_sp_port->dev, "Port can only be split into 2 or 4 ports\n");
2560 return -EINVAL;
2561 }
2562
Ido Schimmel18f1e702016-02-26 17:32:31 +01002563 if (cur_width != MLXSW_PORT_MODULE_MAX_WIDTH) {
2564 netdev_err(mlxsw_sp_port->dev, "Port cannot be split further\n");
2565 return -EINVAL;
2566 }
2567
2568 /* Make sure we have enough slave (even) ports for the split. */
2569 if (count == 2) {
2570 base_port = local_port;
2571 if (mlxsw_sp->ports[base_port + 1]) {
2572 netdev_err(mlxsw_sp_port->dev, "Invalid split configuration\n");
2573 return -EINVAL;
2574 }
2575 } else {
2576 base_port = mlxsw_sp_cluster_base_port_get(local_port);
2577 if (mlxsw_sp->ports[base_port + 1] ||
2578 mlxsw_sp->ports[base_port + 3]) {
2579 netdev_err(mlxsw_sp_port->dev, "Invalid split configuration\n");
2580 return -EINVAL;
2581 }
2582 }
2583
2584 for (i = 0; i < count; i++)
2585 mlxsw_sp_port_remove(mlxsw_sp, base_port + i);
2586
Ido Schimmelbe945352016-06-09 09:51:39 +02002587 err = mlxsw_sp_port_split_create(mlxsw_sp, base_port, module, count);
2588 if (err) {
2589 dev_err(mlxsw_sp->bus_info->dev, "Failed to create split ports\n");
2590 goto err_port_split_create;
Ido Schimmel18f1e702016-02-26 17:32:31 +01002591 }
2592
2593 return 0;
2594
Ido Schimmelbe945352016-06-09 09:51:39 +02002595err_port_split_create:
2596 mlxsw_sp_port_unsplit_create(mlxsw_sp, base_port, count);
Ido Schimmel18f1e702016-02-26 17:32:31 +01002597 return err;
2598}
2599
Jiri Pirkob2f10572016-04-08 19:11:23 +02002600static int mlxsw_sp_port_unsplit(struct mlxsw_core *mlxsw_core, u8 local_port)
Ido Schimmel18f1e702016-02-26 17:32:31 +01002601{
Jiri Pirkob2f10572016-04-08 19:11:23 +02002602 struct mlxsw_sp *mlxsw_sp = mlxsw_core_driver_priv(mlxsw_core);
Ido Schimmel18f1e702016-02-26 17:32:31 +01002603 struct mlxsw_sp_port *mlxsw_sp_port;
Ido Schimmeld664b412016-06-09 09:51:40 +02002604 u8 cur_width, base_port;
Ido Schimmel18f1e702016-02-26 17:32:31 +01002605 unsigned int count;
2606 int i;
Ido Schimmel18f1e702016-02-26 17:32:31 +01002607
2608 mlxsw_sp_port = mlxsw_sp->ports[local_port];
2609 if (!mlxsw_sp_port) {
2610 dev_err(mlxsw_sp->bus_info->dev, "Port number \"%d\" does not exist\n",
2611 local_port);
2612 return -EINVAL;
2613 }
2614
2615 if (!mlxsw_sp_port->split) {
2616 netdev_err(mlxsw_sp_port->dev, "Port wasn't split\n");
2617 return -EINVAL;
2618 }
2619
Ido Schimmeld664b412016-06-09 09:51:40 +02002620 cur_width = mlxsw_sp_port->mapping.width;
Ido Schimmel18f1e702016-02-26 17:32:31 +01002621 count = cur_width == 1 ? 4 : 2;
2622
2623 base_port = mlxsw_sp_cluster_base_port_get(local_port);
2624
2625 /* Determine which ports to remove. */
2626 if (count == 2 && local_port >= base_port + 2)
2627 base_port = base_port + 2;
2628
2629 for (i = 0; i < count; i++)
2630 mlxsw_sp_port_remove(mlxsw_sp, base_port + i);
2631
Ido Schimmelbe945352016-06-09 09:51:39 +02002632 mlxsw_sp_port_unsplit_create(mlxsw_sp, base_port, count);
Ido Schimmel18f1e702016-02-26 17:32:31 +01002633
2634 return 0;
2635}
2636
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002637static void mlxsw_sp_pude_event_func(const struct mlxsw_reg_info *reg,
2638 char *pude_pl, void *priv)
2639{
2640 struct mlxsw_sp *mlxsw_sp = priv;
2641 struct mlxsw_sp_port *mlxsw_sp_port;
2642 enum mlxsw_reg_pude_oper_status status;
2643 u8 local_port;
2644
2645 local_port = mlxsw_reg_pude_local_port_get(pude_pl);
2646 mlxsw_sp_port = mlxsw_sp->ports[local_port];
Ido Schimmelbbf2a472016-07-02 11:00:14 +02002647 if (!mlxsw_sp_port)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002648 return;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002649
2650 status = mlxsw_reg_pude_oper_status_get(pude_pl);
2651 if (status == MLXSW_PORT_OPER_STATUS_UP) {
2652 netdev_info(mlxsw_sp_port->dev, "link up\n");
2653 netif_carrier_on(mlxsw_sp_port->dev);
2654 } else {
2655 netdev_info(mlxsw_sp_port->dev, "link down\n");
2656 netif_carrier_off(mlxsw_sp_port->dev);
2657 }
2658}
2659
2660static struct mlxsw_event_listener mlxsw_sp_pude_event = {
2661 .func = mlxsw_sp_pude_event_func,
2662 .trap_id = MLXSW_TRAP_ID_PUDE,
2663};
2664
2665static int mlxsw_sp_event_register(struct mlxsw_sp *mlxsw_sp,
2666 enum mlxsw_event_trap_id trap_id)
2667{
2668 struct mlxsw_event_listener *el;
2669 char hpkt_pl[MLXSW_REG_HPKT_LEN];
2670 int err;
2671
2672 switch (trap_id) {
2673 case MLXSW_TRAP_ID_PUDE:
2674 el = &mlxsw_sp_pude_event;
2675 break;
2676 }
2677 err = mlxsw_core_event_listener_register(mlxsw_sp->core, el, mlxsw_sp);
2678 if (err)
2679 return err;
2680
2681 mlxsw_reg_hpkt_pack(hpkt_pl, MLXSW_REG_HPKT_ACTION_FORWARD, trap_id);
2682 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(hpkt), hpkt_pl);
2683 if (err)
2684 goto err_event_trap_set;
2685
2686 return 0;
2687
2688err_event_trap_set:
2689 mlxsw_core_event_listener_unregister(mlxsw_sp->core, el, mlxsw_sp);
2690 return err;
2691}
2692
2693static void mlxsw_sp_event_unregister(struct mlxsw_sp *mlxsw_sp,
2694 enum mlxsw_event_trap_id trap_id)
2695{
2696 struct mlxsw_event_listener *el;
2697
2698 switch (trap_id) {
2699 case MLXSW_TRAP_ID_PUDE:
2700 el = &mlxsw_sp_pude_event;
2701 break;
2702 }
2703 mlxsw_core_event_listener_unregister(mlxsw_sp->core, el, mlxsw_sp);
2704}
2705
2706static void mlxsw_sp_rx_listener_func(struct sk_buff *skb, u8 local_port,
2707 void *priv)
2708{
2709 struct mlxsw_sp *mlxsw_sp = priv;
2710 struct mlxsw_sp_port *mlxsw_sp_port = mlxsw_sp->ports[local_port];
2711 struct mlxsw_sp_port_pcpu_stats *pcpu_stats;
2712
2713 if (unlikely(!mlxsw_sp_port)) {
2714 dev_warn_ratelimited(mlxsw_sp->bus_info->dev, "Port %d: skb received for non-existent port\n",
2715 local_port);
2716 return;
2717 }
2718
2719 skb->dev = mlxsw_sp_port->dev;
2720
2721 pcpu_stats = this_cpu_ptr(mlxsw_sp_port->pcpu_stats);
2722 u64_stats_update_begin(&pcpu_stats->syncp);
2723 pcpu_stats->rx_packets++;
2724 pcpu_stats->rx_bytes += skb->len;
2725 u64_stats_update_end(&pcpu_stats->syncp);
2726
2727 skb->protocol = eth_type_trans(skb, skb->dev);
2728 netif_receive_skb(skb);
2729}
2730
Ido Schimmel1c6c6d22016-08-25 18:42:40 +02002731static void mlxsw_sp_rx_listener_mark_func(struct sk_buff *skb, u8 local_port,
2732 void *priv)
2733{
2734 skb->offload_fwd_mark = 1;
2735 return mlxsw_sp_rx_listener_func(skb, local_port, priv);
2736}
2737
Ido Schimmel63a81142016-08-25 18:42:39 +02002738#define MLXSW_SP_RXL(_func, _trap_id, _action) \
2739 { \
2740 .func = _func, \
2741 .local_port = MLXSW_PORT_DONT_CARE, \
2742 .trap_id = MLXSW_TRAP_ID_##_trap_id, \
2743 .action = MLXSW_REG_HPKT_ACTION_##_action, \
Ido Schimmel93393b32016-08-25 18:42:38 +02002744 }
2745
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002746static const struct mlxsw_rx_listener mlxsw_sp_rx_listener[] = {
Ido Schimmel63a81142016-08-25 18:42:39 +02002747 MLXSW_SP_RXL(mlxsw_sp_rx_listener_func, FDB_MC, TRAP_TO_CPU),
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002748 /* Traps for specific L2 packet types, not trapped as FDB MC */
Ido Schimmel63a81142016-08-25 18:42:39 +02002749 MLXSW_SP_RXL(mlxsw_sp_rx_listener_func, STP, TRAP_TO_CPU),
2750 MLXSW_SP_RXL(mlxsw_sp_rx_listener_func, LACP, TRAP_TO_CPU),
2751 MLXSW_SP_RXL(mlxsw_sp_rx_listener_func, EAPOL, TRAP_TO_CPU),
2752 MLXSW_SP_RXL(mlxsw_sp_rx_listener_func, LLDP, TRAP_TO_CPU),
2753 MLXSW_SP_RXL(mlxsw_sp_rx_listener_func, MMRP, TRAP_TO_CPU),
2754 MLXSW_SP_RXL(mlxsw_sp_rx_listener_func, MVRP, TRAP_TO_CPU),
2755 MLXSW_SP_RXL(mlxsw_sp_rx_listener_func, RPVST, TRAP_TO_CPU),
Ido Schimmel1c6c6d22016-08-25 18:42:40 +02002756 MLXSW_SP_RXL(mlxsw_sp_rx_listener_mark_func, DHCP, MIRROR_TO_CPU),
2757 MLXSW_SP_RXL(mlxsw_sp_rx_listener_mark_func, IGMP_QUERY, MIRROR_TO_CPU),
Ido Schimmel63a81142016-08-25 18:42:39 +02002758 MLXSW_SP_RXL(mlxsw_sp_rx_listener_func, IGMP_V1_REPORT, TRAP_TO_CPU),
2759 MLXSW_SP_RXL(mlxsw_sp_rx_listener_func, IGMP_V2_REPORT, TRAP_TO_CPU),
2760 MLXSW_SP_RXL(mlxsw_sp_rx_listener_func, IGMP_V2_LEAVE, TRAP_TO_CPU),
2761 MLXSW_SP_RXL(mlxsw_sp_rx_listener_func, IGMP_V3_REPORT, TRAP_TO_CPU),
Ido Schimmel1c6c6d22016-08-25 18:42:40 +02002762 MLXSW_SP_RXL(mlxsw_sp_rx_listener_mark_func, ARPBC, MIRROR_TO_CPU),
2763 MLXSW_SP_RXL(mlxsw_sp_rx_listener_mark_func, ARPUC, MIRROR_TO_CPU),
Ido Schimmel93393b32016-08-25 18:42:38 +02002764 /* L3 traps */
Ido Schimmel63a81142016-08-25 18:42:39 +02002765 MLXSW_SP_RXL(mlxsw_sp_rx_listener_func, MTUERROR, TRAP_TO_CPU),
2766 MLXSW_SP_RXL(mlxsw_sp_rx_listener_func, TTLERROR, TRAP_TO_CPU),
2767 MLXSW_SP_RXL(mlxsw_sp_rx_listener_func, LBERROR, TRAP_TO_CPU),
Ido Schimmel1c6c6d22016-08-25 18:42:40 +02002768 MLXSW_SP_RXL(mlxsw_sp_rx_listener_mark_func, OSPF, TRAP_TO_CPU),
Ido Schimmel63a81142016-08-25 18:42:39 +02002769 MLXSW_SP_RXL(mlxsw_sp_rx_listener_func, IP2ME, TRAP_TO_CPU),
2770 MLXSW_SP_RXL(mlxsw_sp_rx_listener_func, RTR_INGRESS0, TRAP_TO_CPU),
2771 MLXSW_SP_RXL(mlxsw_sp_rx_listener_func, HOST_MISS_IPV4, TRAP_TO_CPU),
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002772};
2773
2774static int mlxsw_sp_traps_init(struct mlxsw_sp *mlxsw_sp)
2775{
2776 char htgt_pl[MLXSW_REG_HTGT_LEN];
2777 char hpkt_pl[MLXSW_REG_HPKT_LEN];
2778 int i;
2779 int err;
2780
2781 mlxsw_reg_htgt_pack(htgt_pl, MLXSW_REG_HTGT_TRAP_GROUP_RX);
2782 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(htgt), htgt_pl);
2783 if (err)
2784 return err;
2785
2786 mlxsw_reg_htgt_pack(htgt_pl, MLXSW_REG_HTGT_TRAP_GROUP_CTRL);
2787 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(htgt), htgt_pl);
2788 if (err)
2789 return err;
2790
2791 for (i = 0; i < ARRAY_SIZE(mlxsw_sp_rx_listener); i++) {
2792 err = mlxsw_core_rx_listener_register(mlxsw_sp->core,
2793 &mlxsw_sp_rx_listener[i],
2794 mlxsw_sp);
2795 if (err)
2796 goto err_rx_listener_register;
2797
Ido Schimmel63a81142016-08-25 18:42:39 +02002798 mlxsw_reg_hpkt_pack(hpkt_pl, mlxsw_sp_rx_listener[i].action,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002799 mlxsw_sp_rx_listener[i].trap_id);
2800 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(hpkt), hpkt_pl);
2801 if (err)
2802 goto err_rx_trap_set;
2803 }
2804 return 0;
2805
2806err_rx_trap_set:
2807 mlxsw_core_rx_listener_unregister(mlxsw_sp->core,
2808 &mlxsw_sp_rx_listener[i],
2809 mlxsw_sp);
2810err_rx_listener_register:
2811 for (i--; i >= 0; i--) {
Ido Schimmel10f00aa2016-07-02 11:00:19 +02002812 mlxsw_reg_hpkt_pack(hpkt_pl, MLXSW_REG_HPKT_ACTION_DISCARD,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002813 mlxsw_sp_rx_listener[i].trap_id);
2814 mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(hpkt), hpkt_pl);
2815
2816 mlxsw_core_rx_listener_unregister(mlxsw_sp->core,
2817 &mlxsw_sp_rx_listener[i],
2818 mlxsw_sp);
2819 }
2820 return err;
2821}
2822
2823static void mlxsw_sp_traps_fini(struct mlxsw_sp *mlxsw_sp)
2824{
2825 char hpkt_pl[MLXSW_REG_HPKT_LEN];
2826 int i;
2827
2828 for (i = 0; i < ARRAY_SIZE(mlxsw_sp_rx_listener); i++) {
Ido Schimmel10f00aa2016-07-02 11:00:19 +02002829 mlxsw_reg_hpkt_pack(hpkt_pl, MLXSW_REG_HPKT_ACTION_DISCARD,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002830 mlxsw_sp_rx_listener[i].trap_id);
2831 mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(hpkt), hpkt_pl);
2832
2833 mlxsw_core_rx_listener_unregister(mlxsw_sp->core,
2834 &mlxsw_sp_rx_listener[i],
2835 mlxsw_sp);
2836 }
2837}
2838
2839static int __mlxsw_sp_flood_init(struct mlxsw_core *mlxsw_core,
2840 enum mlxsw_reg_sfgc_type type,
2841 enum mlxsw_reg_sfgc_bridge_type bridge_type)
2842{
2843 enum mlxsw_flood_table_type table_type;
2844 enum mlxsw_sp_flood_table flood_table;
2845 char sfgc_pl[MLXSW_REG_SFGC_LEN];
2846
Ido Schimmel19ae6122015-12-15 16:03:39 +01002847 if (bridge_type == MLXSW_REG_SFGC_BRIDGE_TYPE_VFID)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002848 table_type = MLXSW_REG_SFGC_TABLE_TYPE_FID;
Ido Schimmel19ae6122015-12-15 16:03:39 +01002849 else
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002850 table_type = MLXSW_REG_SFGC_TABLE_TYPE_FID_OFFEST;
Ido Schimmel19ae6122015-12-15 16:03:39 +01002851
2852 if (type == MLXSW_REG_SFGC_TYPE_UNKNOWN_UNICAST)
2853 flood_table = MLXSW_SP_FLOOD_TABLE_UC;
2854 else
2855 flood_table = MLXSW_SP_FLOOD_TABLE_BM;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002856
2857 mlxsw_reg_sfgc_pack(sfgc_pl, type, bridge_type, table_type,
2858 flood_table);
2859 return mlxsw_reg_write(mlxsw_core, MLXSW_REG(sfgc), sfgc_pl);
2860}
2861
2862static int mlxsw_sp_flood_init(struct mlxsw_sp *mlxsw_sp)
2863{
2864 int type, err;
2865
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002866 for (type = 0; type < MLXSW_REG_SFGC_TYPE_MAX; type++) {
2867 if (type == MLXSW_REG_SFGC_TYPE_RESERVED)
2868 continue;
2869
2870 err = __mlxsw_sp_flood_init(mlxsw_sp->core, type,
2871 MLXSW_REG_SFGC_BRIDGE_TYPE_VFID);
2872 if (err)
2873 return err;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002874
2875 err = __mlxsw_sp_flood_init(mlxsw_sp->core, type,
2876 MLXSW_REG_SFGC_BRIDGE_TYPE_1Q_FID);
2877 if (err)
2878 return err;
2879 }
2880
2881 return 0;
2882}
2883
Jiri Pirko0d65fc12015-12-03 12:12:28 +01002884static int mlxsw_sp_lag_init(struct mlxsw_sp *mlxsw_sp)
2885{
2886 char slcr_pl[MLXSW_REG_SLCR_LEN];
2887
2888 mlxsw_reg_slcr_pack(slcr_pl, MLXSW_REG_SLCR_LAG_HASH_SMAC |
2889 MLXSW_REG_SLCR_LAG_HASH_DMAC |
2890 MLXSW_REG_SLCR_LAG_HASH_ETHERTYPE |
2891 MLXSW_REG_SLCR_LAG_HASH_VLANID |
2892 MLXSW_REG_SLCR_LAG_HASH_SIP |
2893 MLXSW_REG_SLCR_LAG_HASH_DIP |
2894 MLXSW_REG_SLCR_LAG_HASH_SPORT |
2895 MLXSW_REG_SLCR_LAG_HASH_DPORT |
2896 MLXSW_REG_SLCR_LAG_HASH_IPPROTO);
2897 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(slcr), slcr_pl);
2898}
2899
Jiri Pirkob2f10572016-04-08 19:11:23 +02002900static int mlxsw_sp_init(struct mlxsw_core *mlxsw_core,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002901 const struct mlxsw_bus_info *mlxsw_bus_info)
2902{
Jiri Pirkob2f10572016-04-08 19:11:23 +02002903 struct mlxsw_sp *mlxsw_sp = mlxsw_core_driver_priv(mlxsw_core);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002904 int err;
2905
2906 mlxsw_sp->core = mlxsw_core;
2907 mlxsw_sp->bus_info = mlxsw_bus_info;
Ido Schimmel14d39462016-06-20 23:04:15 +02002908 INIT_LIST_HEAD(&mlxsw_sp->fids);
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02002909 INIT_LIST_HEAD(&mlxsw_sp->vfids.list);
Elad Raz3a49b4f2016-01-10 21:06:28 +01002910 INIT_LIST_HEAD(&mlxsw_sp->br_mids.list);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002911
2912 err = mlxsw_sp_base_mac_get(mlxsw_sp);
2913 if (err) {
2914 dev_err(mlxsw_sp->bus_info->dev, "Failed to get base mac\n");
2915 return err;
2916 }
2917
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002918 err = mlxsw_sp_event_register(mlxsw_sp, MLXSW_TRAP_ID_PUDE);
2919 if (err) {
2920 dev_err(mlxsw_sp->bus_info->dev, "Failed to register for PUDE events\n");
Ido Schimmelbbf2a472016-07-02 11:00:14 +02002921 return err;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002922 }
2923
2924 err = mlxsw_sp_traps_init(mlxsw_sp);
2925 if (err) {
2926 dev_err(mlxsw_sp->bus_info->dev, "Failed to set traps for RX\n");
2927 goto err_rx_listener_register;
2928 }
2929
2930 err = mlxsw_sp_flood_init(mlxsw_sp);
2931 if (err) {
2932 dev_err(mlxsw_sp->bus_info->dev, "Failed to initialize flood tables\n");
2933 goto err_flood_init;
2934 }
2935
2936 err = mlxsw_sp_buffers_init(mlxsw_sp);
2937 if (err) {
2938 dev_err(mlxsw_sp->bus_info->dev, "Failed to initialize buffers\n");
2939 goto err_buffers_init;
2940 }
2941
Jiri Pirko0d65fc12015-12-03 12:12:28 +01002942 err = mlxsw_sp_lag_init(mlxsw_sp);
2943 if (err) {
2944 dev_err(mlxsw_sp->bus_info->dev, "Failed to initialize LAG\n");
2945 goto err_lag_init;
2946 }
2947
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002948 err = mlxsw_sp_switchdev_init(mlxsw_sp);
2949 if (err) {
2950 dev_err(mlxsw_sp->bus_info->dev, "Failed to initialize switchdev\n");
2951 goto err_switchdev_init;
2952 }
2953
Ido Schimmel464dce12016-07-02 11:00:15 +02002954 err = mlxsw_sp_router_init(mlxsw_sp);
2955 if (err) {
2956 dev_err(mlxsw_sp->bus_info->dev, "Failed to initialize router\n");
2957 goto err_router_init;
2958 }
2959
Yotam Gigi763b4b72016-07-21 12:03:17 +02002960 err = mlxsw_sp_span_init(mlxsw_sp);
2961 if (err) {
2962 dev_err(mlxsw_sp->bus_info->dev, "Failed to init span system\n");
2963 goto err_span_init;
2964 }
2965
Ido Schimmelbbf2a472016-07-02 11:00:14 +02002966 err = mlxsw_sp_ports_create(mlxsw_sp);
2967 if (err) {
2968 dev_err(mlxsw_sp->bus_info->dev, "Failed to create ports\n");
2969 goto err_ports_create;
2970 }
2971
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002972 return 0;
2973
Ido Schimmelbbf2a472016-07-02 11:00:14 +02002974err_ports_create:
Yotam Gigi763b4b72016-07-21 12:03:17 +02002975 mlxsw_sp_span_fini(mlxsw_sp);
2976err_span_init:
Ido Schimmel464dce12016-07-02 11:00:15 +02002977 mlxsw_sp_router_fini(mlxsw_sp);
2978err_router_init:
Ido Schimmelbbf2a472016-07-02 11:00:14 +02002979 mlxsw_sp_switchdev_fini(mlxsw_sp);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002980err_switchdev_init:
Jiri Pirko0d65fc12015-12-03 12:12:28 +01002981err_lag_init:
Jiri Pirko0f433fa2016-04-14 18:19:24 +02002982 mlxsw_sp_buffers_fini(mlxsw_sp);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002983err_buffers_init:
2984err_flood_init:
2985 mlxsw_sp_traps_fini(mlxsw_sp);
2986err_rx_listener_register:
2987 mlxsw_sp_event_unregister(mlxsw_sp, MLXSW_TRAP_ID_PUDE);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002988 return err;
2989}
2990
Jiri Pirkob2f10572016-04-08 19:11:23 +02002991static void mlxsw_sp_fini(struct mlxsw_core *mlxsw_core)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002992{
Jiri Pirkob2f10572016-04-08 19:11:23 +02002993 struct mlxsw_sp *mlxsw_sp = mlxsw_core_driver_priv(mlxsw_core);
Ido Schimmelfa3054f2016-07-02 11:00:16 +02002994 int i;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002995
Ido Schimmelbbf2a472016-07-02 11:00:14 +02002996 mlxsw_sp_ports_remove(mlxsw_sp);
Yotam Gigi763b4b72016-07-21 12:03:17 +02002997 mlxsw_sp_span_fini(mlxsw_sp);
Ido Schimmel464dce12016-07-02 11:00:15 +02002998 mlxsw_sp_router_fini(mlxsw_sp);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002999 mlxsw_sp_switchdev_fini(mlxsw_sp);
Jiri Pirko5113bfd2016-05-06 22:20:59 +02003000 mlxsw_sp_buffers_fini(mlxsw_sp);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003001 mlxsw_sp_traps_fini(mlxsw_sp);
3002 mlxsw_sp_event_unregister(mlxsw_sp, MLXSW_TRAP_ID_PUDE);
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02003003 WARN_ON(!list_empty(&mlxsw_sp->vfids.list));
Ido Schimmel14d39462016-06-20 23:04:15 +02003004 WARN_ON(!list_empty(&mlxsw_sp->fids));
Ido Schimmelfa3054f2016-07-02 11:00:16 +02003005 for (i = 0; i < MLXSW_SP_RIF_MAX; i++)
3006 WARN_ON_ONCE(mlxsw_sp->rifs[i]);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003007}
3008
3009static struct mlxsw_config_profile mlxsw_sp_config_profile = {
3010 .used_max_vepa_channels = 1,
3011 .max_vepa_channels = 0,
3012 .used_max_lag = 1,
Jiri Pirko0d65fc12015-12-03 12:12:28 +01003013 .max_lag = MLXSW_SP_LAG_MAX,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003014 .used_max_port_per_lag = 1,
Jiri Pirko0d65fc12015-12-03 12:12:28 +01003015 .max_port_per_lag = MLXSW_SP_PORT_PER_LAG_MAX,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003016 .used_max_mid = 1,
Elad Raz53ae6282016-01-10 21:06:26 +01003017 .max_mid = MLXSW_SP_MID_MAX,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003018 .used_max_pgt = 1,
3019 .max_pgt = 0,
3020 .used_max_system_port = 1,
3021 .max_system_port = 64,
3022 .used_max_vlan_groups = 1,
3023 .max_vlan_groups = 127,
3024 .used_max_regions = 1,
3025 .max_regions = 400,
3026 .used_flood_tables = 1,
3027 .used_flood_mode = 1,
3028 .flood_mode = 3,
3029 .max_fid_offset_flood_tables = 2,
3030 .fid_offset_flood_table_size = VLAN_N_VID - 1,
Ido Schimmel19ae6122015-12-15 16:03:39 +01003031 .max_fid_flood_tables = 2,
3032 .fid_flood_table_size = MLXSW_SP_VFID_MAX,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003033 .used_max_ib_mc = 1,
3034 .max_ib_mc = 0,
3035 .used_max_pkey = 1,
3036 .max_pkey = 0,
Jiri Pirkoc6022422016-07-05 11:27:46 +02003037 .used_kvd_sizes = 1,
3038 .kvd_linear_size = MLXSW_SP_KVD_LINEAR_SIZE,
3039 .kvd_hash_single_size = MLXSW_SP_KVD_HASH_SINGLE_SIZE,
3040 .kvd_hash_double_size = MLXSW_SP_KVD_HASH_DOUBLE_SIZE,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003041 .swid_config = {
3042 {
3043 .used_type = 1,
3044 .type = MLXSW_PORT_SWID_TYPE_ETH,
3045 }
3046 },
Nogah Frankel57d316b2016-07-21 12:03:09 +02003047 .resource_query_enable = 1,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003048};
3049
3050static struct mlxsw_driver mlxsw_sp_driver = {
Jiri Pirko2d0ed392016-04-14 18:19:30 +02003051 .kind = MLXSW_DEVICE_KIND_SPECTRUM,
3052 .owner = THIS_MODULE,
3053 .priv_size = sizeof(struct mlxsw_sp),
3054 .init = mlxsw_sp_init,
3055 .fini = mlxsw_sp_fini,
3056 .port_split = mlxsw_sp_port_split,
3057 .port_unsplit = mlxsw_sp_port_unsplit,
3058 .sb_pool_get = mlxsw_sp_sb_pool_get,
3059 .sb_pool_set = mlxsw_sp_sb_pool_set,
3060 .sb_port_pool_get = mlxsw_sp_sb_port_pool_get,
3061 .sb_port_pool_set = mlxsw_sp_sb_port_pool_set,
3062 .sb_tc_pool_bind_get = mlxsw_sp_sb_tc_pool_bind_get,
3063 .sb_tc_pool_bind_set = mlxsw_sp_sb_tc_pool_bind_set,
3064 .sb_occ_snapshot = mlxsw_sp_sb_occ_snapshot,
3065 .sb_occ_max_clear = mlxsw_sp_sb_occ_max_clear,
3066 .sb_occ_port_pool_get = mlxsw_sp_sb_occ_port_pool_get,
3067 .sb_occ_tc_port_bind_get = mlxsw_sp_sb_occ_tc_port_bind_get,
3068 .txhdr_construct = mlxsw_sp_txhdr_construct,
3069 .txhdr_len = MLXSW_TXHDR_LEN,
3070 .profile = &mlxsw_sp_config_profile,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003071};
3072
Jiri Pirko7ce856a2016-07-04 08:23:12 +02003073static bool mlxsw_sp_port_dev_check(const struct net_device *dev)
3074{
3075 return dev->netdev_ops == &mlxsw_sp_port_netdev_ops;
3076}
3077
3078static struct mlxsw_sp_port *mlxsw_sp_port_dev_lower_find(struct net_device *dev)
3079{
3080 struct net_device *lower_dev;
3081 struct list_head *iter;
3082
3083 if (mlxsw_sp_port_dev_check(dev))
3084 return netdev_priv(dev);
3085
3086 netdev_for_each_all_lower_dev(dev, lower_dev, iter) {
3087 if (mlxsw_sp_port_dev_check(lower_dev))
3088 return netdev_priv(lower_dev);
3089 }
3090 return NULL;
3091}
3092
3093static struct mlxsw_sp *mlxsw_sp_lower_get(struct net_device *dev)
3094{
3095 struct mlxsw_sp_port *mlxsw_sp_port;
3096
3097 mlxsw_sp_port = mlxsw_sp_port_dev_lower_find(dev);
3098 return mlxsw_sp_port ? mlxsw_sp_port->mlxsw_sp : NULL;
3099}
3100
3101static struct mlxsw_sp_port *mlxsw_sp_port_dev_lower_find_rcu(struct net_device *dev)
3102{
3103 struct net_device *lower_dev;
3104 struct list_head *iter;
3105
3106 if (mlxsw_sp_port_dev_check(dev))
3107 return netdev_priv(dev);
3108
3109 netdev_for_each_all_lower_dev_rcu(dev, lower_dev, iter) {
3110 if (mlxsw_sp_port_dev_check(lower_dev))
3111 return netdev_priv(lower_dev);
3112 }
3113 return NULL;
3114}
3115
3116struct mlxsw_sp_port *mlxsw_sp_port_lower_dev_hold(struct net_device *dev)
3117{
3118 struct mlxsw_sp_port *mlxsw_sp_port;
3119
3120 rcu_read_lock();
3121 mlxsw_sp_port = mlxsw_sp_port_dev_lower_find_rcu(dev);
3122 if (mlxsw_sp_port)
3123 dev_hold(mlxsw_sp_port->dev);
3124 rcu_read_unlock();
3125 return mlxsw_sp_port;
3126}
3127
3128void mlxsw_sp_port_dev_put(struct mlxsw_sp_port *mlxsw_sp_port)
3129{
3130 dev_put(mlxsw_sp_port->dev);
3131}
3132
Ido Schimmel99724c12016-07-04 08:23:14 +02003133static bool mlxsw_sp_rif_should_config(struct mlxsw_sp_rif *r,
3134 unsigned long event)
3135{
3136 switch (event) {
3137 case NETDEV_UP:
3138 if (!r)
3139 return true;
3140 r->ref_count++;
3141 return false;
3142 case NETDEV_DOWN:
3143 if (r && --r->ref_count == 0)
3144 return true;
3145 /* It is possible we already removed the RIF ourselves
3146 * if it was assigned to a netdev that is now a bridge
3147 * or LAG slave.
3148 */
3149 return false;
3150 }
3151
3152 return false;
3153}
3154
3155static int mlxsw_sp_avail_rif_get(struct mlxsw_sp *mlxsw_sp)
3156{
3157 int i;
3158
3159 for (i = 0; i < MLXSW_SP_RIF_MAX; i++)
3160 if (!mlxsw_sp->rifs[i])
3161 return i;
3162
3163 return MLXSW_SP_RIF_MAX;
3164}
3165
3166static void mlxsw_sp_vport_rif_sp_attr_get(struct mlxsw_sp_port *mlxsw_sp_vport,
3167 bool *p_lagged, u16 *p_system_port)
3168{
3169 u8 local_port = mlxsw_sp_vport->local_port;
3170
3171 *p_lagged = mlxsw_sp_vport->lagged;
3172 *p_system_port = *p_lagged ? mlxsw_sp_vport->lag_id : local_port;
3173}
3174
3175static int mlxsw_sp_vport_rif_sp_op(struct mlxsw_sp_port *mlxsw_sp_vport,
3176 struct net_device *l3_dev, u16 rif,
3177 bool create)
3178{
3179 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_vport->mlxsw_sp;
3180 bool lagged = mlxsw_sp_vport->lagged;
3181 char ritr_pl[MLXSW_REG_RITR_LEN];
3182 u16 system_port;
3183
3184 mlxsw_reg_ritr_pack(ritr_pl, create, MLXSW_REG_RITR_SP_IF, rif,
3185 l3_dev->mtu, l3_dev->dev_addr);
3186
3187 mlxsw_sp_vport_rif_sp_attr_get(mlxsw_sp_vport, &lagged, &system_port);
3188 mlxsw_reg_ritr_sp_if_pack(ritr_pl, lagged, system_port,
3189 mlxsw_sp_vport_vid_get(mlxsw_sp_vport));
3190
3191 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ritr), ritr_pl);
3192}
3193
3194static void mlxsw_sp_vport_rif_sp_leave(struct mlxsw_sp_port *mlxsw_sp_vport);
3195
3196static struct mlxsw_sp_fid *
3197mlxsw_sp_rfid_alloc(u16 fid, struct net_device *l3_dev)
3198{
3199 struct mlxsw_sp_fid *f;
3200
3201 f = kzalloc(sizeof(*f), GFP_KERNEL);
3202 if (!f)
3203 return NULL;
3204
3205 f->leave = mlxsw_sp_vport_rif_sp_leave;
3206 f->ref_count = 0;
3207 f->dev = l3_dev;
3208 f->fid = fid;
3209
3210 return f;
3211}
3212
3213static struct mlxsw_sp_rif *
3214mlxsw_sp_rif_alloc(u16 rif, struct net_device *l3_dev, struct mlxsw_sp_fid *f)
3215{
3216 struct mlxsw_sp_rif *r;
3217
3218 r = kzalloc(sizeof(*r), GFP_KERNEL);
3219 if (!r)
3220 return NULL;
3221
3222 ether_addr_copy(r->addr, l3_dev->dev_addr);
3223 r->mtu = l3_dev->mtu;
3224 r->ref_count = 1;
3225 r->dev = l3_dev;
3226 r->rif = rif;
3227 r->f = f;
3228
3229 return r;
3230}
3231
3232static struct mlxsw_sp_rif *
3233mlxsw_sp_vport_rif_sp_create(struct mlxsw_sp_port *mlxsw_sp_vport,
3234 struct net_device *l3_dev)
3235{
3236 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_vport->mlxsw_sp;
3237 struct mlxsw_sp_fid *f;
3238 struct mlxsw_sp_rif *r;
3239 u16 fid, rif;
3240 int err;
3241
3242 rif = mlxsw_sp_avail_rif_get(mlxsw_sp);
3243 if (rif == MLXSW_SP_RIF_MAX)
3244 return ERR_PTR(-ERANGE);
3245
3246 err = mlxsw_sp_vport_rif_sp_op(mlxsw_sp_vport, l3_dev, rif, true);
3247 if (err)
3248 return ERR_PTR(err);
3249
3250 fid = mlxsw_sp_rif_sp_to_fid(rif);
3251 err = mlxsw_sp_rif_fdb_op(mlxsw_sp, l3_dev->dev_addr, fid, true);
3252 if (err)
3253 goto err_rif_fdb_op;
3254
3255 f = mlxsw_sp_rfid_alloc(fid, l3_dev);
3256 if (!f) {
3257 err = -ENOMEM;
3258 goto err_rfid_alloc;
3259 }
3260
3261 r = mlxsw_sp_rif_alloc(rif, l3_dev, f);
3262 if (!r) {
3263 err = -ENOMEM;
3264 goto err_rif_alloc;
3265 }
3266
3267 f->r = r;
3268 mlxsw_sp->rifs[rif] = r;
3269
3270 return r;
3271
3272err_rif_alloc:
3273 kfree(f);
3274err_rfid_alloc:
3275 mlxsw_sp_rif_fdb_op(mlxsw_sp, l3_dev->dev_addr, fid, false);
3276err_rif_fdb_op:
3277 mlxsw_sp_vport_rif_sp_op(mlxsw_sp_vport, l3_dev, rif, false);
3278 return ERR_PTR(err);
3279}
3280
3281static void mlxsw_sp_vport_rif_sp_destroy(struct mlxsw_sp_port *mlxsw_sp_vport,
3282 struct mlxsw_sp_rif *r)
3283{
3284 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_vport->mlxsw_sp;
3285 struct net_device *l3_dev = r->dev;
3286 struct mlxsw_sp_fid *f = r->f;
3287 u16 fid = f->fid;
3288 u16 rif = r->rif;
3289
3290 mlxsw_sp->rifs[rif] = NULL;
3291 f->r = NULL;
3292
3293 kfree(r);
3294
3295 kfree(f);
3296
3297 mlxsw_sp_rif_fdb_op(mlxsw_sp, l3_dev->dev_addr, fid, false);
3298
3299 mlxsw_sp_vport_rif_sp_op(mlxsw_sp_vport, l3_dev, rif, false);
3300}
3301
3302static int mlxsw_sp_vport_rif_sp_join(struct mlxsw_sp_port *mlxsw_sp_vport,
3303 struct net_device *l3_dev)
3304{
3305 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_vport->mlxsw_sp;
3306 struct mlxsw_sp_rif *r;
3307
3308 r = mlxsw_sp_rif_find_by_dev(mlxsw_sp, l3_dev);
3309 if (!r) {
3310 r = mlxsw_sp_vport_rif_sp_create(mlxsw_sp_vport, l3_dev);
3311 if (IS_ERR(r))
3312 return PTR_ERR(r);
3313 }
3314
3315 mlxsw_sp_vport_fid_set(mlxsw_sp_vport, r->f);
3316 r->f->ref_count++;
3317
3318 netdev_dbg(mlxsw_sp_vport->dev, "Joined FID=%d\n", r->f->fid);
3319
3320 return 0;
3321}
3322
3323static void mlxsw_sp_vport_rif_sp_leave(struct mlxsw_sp_port *mlxsw_sp_vport)
3324{
3325 struct mlxsw_sp_fid *f = mlxsw_sp_vport_fid_get(mlxsw_sp_vport);
3326
3327 netdev_dbg(mlxsw_sp_vport->dev, "Left FID=%d\n", f->fid);
3328
3329 mlxsw_sp_vport_fid_set(mlxsw_sp_vport, NULL);
3330 if (--f->ref_count == 0)
3331 mlxsw_sp_vport_rif_sp_destroy(mlxsw_sp_vport, f->r);
3332}
3333
3334static int mlxsw_sp_inetaddr_vport_event(struct net_device *l3_dev,
3335 struct net_device *port_dev,
3336 unsigned long event, u16 vid)
3337{
3338 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(port_dev);
3339 struct mlxsw_sp_port *mlxsw_sp_vport;
3340
3341 mlxsw_sp_vport = mlxsw_sp_port_vport_find(mlxsw_sp_port, vid);
3342 if (WARN_ON(!mlxsw_sp_vport))
3343 return -EINVAL;
3344
3345 switch (event) {
3346 case NETDEV_UP:
3347 return mlxsw_sp_vport_rif_sp_join(mlxsw_sp_vport, l3_dev);
3348 case NETDEV_DOWN:
3349 mlxsw_sp_vport_rif_sp_leave(mlxsw_sp_vport);
3350 break;
3351 }
3352
3353 return 0;
3354}
3355
3356static int mlxsw_sp_inetaddr_port_event(struct net_device *port_dev,
3357 unsigned long event)
3358{
3359 if (netif_is_bridge_port(port_dev) || netif_is_lag_port(port_dev))
3360 return 0;
3361
3362 return mlxsw_sp_inetaddr_vport_event(port_dev, port_dev, event, 1);
3363}
3364
3365static int __mlxsw_sp_inetaddr_lag_event(struct net_device *l3_dev,
3366 struct net_device *lag_dev,
3367 unsigned long event, u16 vid)
3368{
3369 struct net_device *port_dev;
3370 struct list_head *iter;
3371 int err;
3372
3373 netdev_for_each_lower_dev(lag_dev, port_dev, iter) {
3374 if (mlxsw_sp_port_dev_check(port_dev)) {
3375 err = mlxsw_sp_inetaddr_vport_event(l3_dev, port_dev,
3376 event, vid);
3377 if (err)
3378 return err;
3379 }
3380 }
3381
3382 return 0;
3383}
3384
3385static int mlxsw_sp_inetaddr_lag_event(struct net_device *lag_dev,
3386 unsigned long event)
3387{
3388 if (netif_is_bridge_port(lag_dev))
3389 return 0;
3390
3391 return __mlxsw_sp_inetaddr_lag_event(lag_dev, lag_dev, event, 1);
3392}
3393
Ido Schimmel99f44bb2016-07-04 08:23:17 +02003394static struct mlxsw_sp_fid *mlxsw_sp_bridge_fid_get(struct mlxsw_sp *mlxsw_sp,
3395 struct net_device *l3_dev)
3396{
3397 u16 fid;
3398
3399 if (is_vlan_dev(l3_dev))
3400 fid = vlan_dev_vlan_id(l3_dev);
3401 else if (mlxsw_sp->master_bridge.dev == l3_dev)
3402 fid = 1;
3403 else
3404 return mlxsw_sp_vfid_find(mlxsw_sp, l3_dev);
3405
3406 return mlxsw_sp_fid_find(mlxsw_sp, fid);
3407}
3408
Ido Schimmelf888f582016-08-24 11:18:51 +02003409static enum mlxsw_flood_table_type mlxsw_sp_flood_table_type_get(u16 fid)
3410{
3411 return mlxsw_sp_fid_is_vfid(fid) ? MLXSW_REG_SFGC_TABLE_TYPE_FID :
3412 MLXSW_REG_SFGC_TABLE_TYPE_FID_OFFEST;
3413}
3414
3415static u16 mlxsw_sp_flood_table_index_get(u16 fid)
3416{
3417 return mlxsw_sp_fid_is_vfid(fid) ? mlxsw_sp_fid_to_vfid(fid) : fid;
3418}
3419
3420static int mlxsw_sp_router_port_flood_set(struct mlxsw_sp *mlxsw_sp, u16 fid,
3421 bool set)
3422{
3423 enum mlxsw_flood_table_type table_type;
3424 char *sftr_pl;
3425 u16 index;
3426 int err;
3427
3428 sftr_pl = kmalloc(MLXSW_REG_SFTR_LEN, GFP_KERNEL);
3429 if (!sftr_pl)
3430 return -ENOMEM;
3431
3432 table_type = mlxsw_sp_flood_table_type_get(fid);
3433 index = mlxsw_sp_flood_table_index_get(fid);
3434 mlxsw_reg_sftr_pack(sftr_pl, MLXSW_SP_FLOOD_TABLE_BM, index, table_type,
3435 1, MLXSW_PORT_ROUTER_PORT, set);
3436 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sftr), sftr_pl);
3437
3438 kfree(sftr_pl);
3439 return err;
3440}
3441
Ido Schimmel99f44bb2016-07-04 08:23:17 +02003442static enum mlxsw_reg_ritr_if_type mlxsw_sp_rif_type_get(u16 fid)
3443{
3444 if (mlxsw_sp_fid_is_vfid(fid))
3445 return MLXSW_REG_RITR_FID_IF;
3446 else
3447 return MLXSW_REG_RITR_VLAN_IF;
3448}
3449
3450static int mlxsw_sp_rif_bridge_op(struct mlxsw_sp *mlxsw_sp,
3451 struct net_device *l3_dev,
3452 u16 fid, u16 rif,
3453 bool create)
3454{
3455 enum mlxsw_reg_ritr_if_type rif_type;
3456 char ritr_pl[MLXSW_REG_RITR_LEN];
3457
3458 rif_type = mlxsw_sp_rif_type_get(fid);
3459 mlxsw_reg_ritr_pack(ritr_pl, create, rif_type, rif, l3_dev->mtu,
3460 l3_dev->dev_addr);
3461 mlxsw_reg_ritr_fid_set(ritr_pl, rif_type, fid);
3462
3463 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ritr), ritr_pl);
3464}
3465
3466static int mlxsw_sp_rif_bridge_create(struct mlxsw_sp *mlxsw_sp,
3467 struct net_device *l3_dev,
3468 struct mlxsw_sp_fid *f)
3469{
3470 struct mlxsw_sp_rif *r;
3471 u16 rif;
3472 int err;
3473
3474 rif = mlxsw_sp_avail_rif_get(mlxsw_sp);
3475 if (rif == MLXSW_SP_RIF_MAX)
3476 return -ERANGE;
3477
Ido Schimmelf888f582016-08-24 11:18:51 +02003478 err = mlxsw_sp_router_port_flood_set(mlxsw_sp, f->fid, true);
Ido Schimmel99f44bb2016-07-04 08:23:17 +02003479 if (err)
3480 return err;
3481
Ido Schimmelf888f582016-08-24 11:18:51 +02003482 err = mlxsw_sp_rif_bridge_op(mlxsw_sp, l3_dev, f->fid, rif, true);
3483 if (err)
3484 goto err_rif_bridge_op;
3485
Ido Schimmel99f44bb2016-07-04 08:23:17 +02003486 err = mlxsw_sp_rif_fdb_op(mlxsw_sp, l3_dev->dev_addr, f->fid, true);
3487 if (err)
3488 goto err_rif_fdb_op;
3489
3490 r = mlxsw_sp_rif_alloc(rif, l3_dev, f);
3491 if (!r) {
3492 err = -ENOMEM;
3493 goto err_rif_alloc;
3494 }
3495
3496 f->r = r;
3497 mlxsw_sp->rifs[rif] = r;
3498
3499 netdev_dbg(l3_dev, "RIF=%d created\n", rif);
3500
3501 return 0;
3502
3503err_rif_alloc:
3504 mlxsw_sp_rif_fdb_op(mlxsw_sp, l3_dev->dev_addr, f->fid, false);
3505err_rif_fdb_op:
3506 mlxsw_sp_rif_bridge_op(mlxsw_sp, l3_dev, f->fid, rif, false);
Ido Schimmelf888f582016-08-24 11:18:51 +02003507err_rif_bridge_op:
3508 mlxsw_sp_router_port_flood_set(mlxsw_sp, f->fid, false);
Ido Schimmel99f44bb2016-07-04 08:23:17 +02003509 return err;
3510}
3511
3512void mlxsw_sp_rif_bridge_destroy(struct mlxsw_sp *mlxsw_sp,
3513 struct mlxsw_sp_rif *r)
3514{
3515 struct net_device *l3_dev = r->dev;
3516 struct mlxsw_sp_fid *f = r->f;
3517 u16 rif = r->rif;
3518
3519 mlxsw_sp->rifs[rif] = NULL;
3520 f->r = NULL;
3521
3522 kfree(r);
3523
3524 mlxsw_sp_rif_fdb_op(mlxsw_sp, l3_dev->dev_addr, f->fid, false);
3525
3526 mlxsw_sp_rif_bridge_op(mlxsw_sp, l3_dev, f->fid, rif, false);
3527
Ido Schimmelf888f582016-08-24 11:18:51 +02003528 mlxsw_sp_router_port_flood_set(mlxsw_sp, f->fid, false);
3529
Ido Schimmel99f44bb2016-07-04 08:23:17 +02003530 netdev_dbg(l3_dev, "RIF=%d destroyed\n", rif);
3531}
3532
3533static int mlxsw_sp_inetaddr_bridge_event(struct net_device *l3_dev,
3534 struct net_device *br_dev,
3535 unsigned long event)
3536{
3537 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_lower_get(l3_dev);
3538 struct mlxsw_sp_fid *f;
3539
3540 /* FID can either be an actual FID if the L3 device is the
3541 * VLAN-aware bridge or a VLAN device on top. Otherwise, the
3542 * L3 device is a VLAN-unaware bridge and we get a vFID.
3543 */
3544 f = mlxsw_sp_bridge_fid_get(mlxsw_sp, l3_dev);
3545 if (WARN_ON(!f))
3546 return -EINVAL;
3547
3548 switch (event) {
3549 case NETDEV_UP:
3550 return mlxsw_sp_rif_bridge_create(mlxsw_sp, l3_dev, f);
3551 case NETDEV_DOWN:
3552 mlxsw_sp_rif_bridge_destroy(mlxsw_sp, f->r);
3553 break;
3554 }
3555
3556 return 0;
3557}
3558
Ido Schimmel99724c12016-07-04 08:23:14 +02003559static int mlxsw_sp_inetaddr_vlan_event(struct net_device *vlan_dev,
3560 unsigned long event)
3561{
3562 struct net_device *real_dev = vlan_dev_real_dev(vlan_dev);
Ido Schimmel99f44bb2016-07-04 08:23:17 +02003563 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_lower_get(vlan_dev);
Ido Schimmel99724c12016-07-04 08:23:14 +02003564 u16 vid = vlan_dev_vlan_id(vlan_dev);
3565
3566 if (mlxsw_sp_port_dev_check(real_dev))
3567 return mlxsw_sp_inetaddr_vport_event(vlan_dev, real_dev, event,
3568 vid);
3569 else if (netif_is_lag_master(real_dev))
3570 return __mlxsw_sp_inetaddr_lag_event(vlan_dev, real_dev, event,
3571 vid);
Ido Schimmel99f44bb2016-07-04 08:23:17 +02003572 else if (netif_is_bridge_master(real_dev) &&
3573 mlxsw_sp->master_bridge.dev == real_dev)
3574 return mlxsw_sp_inetaddr_bridge_event(vlan_dev, real_dev,
3575 event);
Ido Schimmel99724c12016-07-04 08:23:14 +02003576
3577 return 0;
3578}
3579
3580static int mlxsw_sp_inetaddr_event(struct notifier_block *unused,
3581 unsigned long event, void *ptr)
3582{
3583 struct in_ifaddr *ifa = (struct in_ifaddr *) ptr;
3584 struct net_device *dev = ifa->ifa_dev->dev;
3585 struct mlxsw_sp *mlxsw_sp;
3586 struct mlxsw_sp_rif *r;
3587 int err = 0;
3588
3589 mlxsw_sp = mlxsw_sp_lower_get(dev);
3590 if (!mlxsw_sp)
3591 goto out;
3592
3593 r = mlxsw_sp_rif_find_by_dev(mlxsw_sp, dev);
3594 if (!mlxsw_sp_rif_should_config(r, event))
3595 goto out;
3596
3597 if (mlxsw_sp_port_dev_check(dev))
3598 err = mlxsw_sp_inetaddr_port_event(dev, event);
3599 else if (netif_is_lag_master(dev))
3600 err = mlxsw_sp_inetaddr_lag_event(dev, event);
Ido Schimmel99f44bb2016-07-04 08:23:17 +02003601 else if (netif_is_bridge_master(dev))
3602 err = mlxsw_sp_inetaddr_bridge_event(dev, dev, event);
Ido Schimmel99724c12016-07-04 08:23:14 +02003603 else if (is_vlan_dev(dev))
3604 err = mlxsw_sp_inetaddr_vlan_event(dev, event);
3605
3606out:
3607 return notifier_from_errno(err);
3608}
3609
Ido Schimmel6e095fd2016-07-04 08:23:13 +02003610static int mlxsw_sp_rif_edit(struct mlxsw_sp *mlxsw_sp, u16 rif,
3611 const char *mac, int mtu)
3612{
3613 char ritr_pl[MLXSW_REG_RITR_LEN];
3614 int err;
3615
3616 mlxsw_reg_ritr_rif_pack(ritr_pl, rif);
3617 err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(ritr), ritr_pl);
3618 if (err)
3619 return err;
3620
3621 mlxsw_reg_ritr_mtu_set(ritr_pl, mtu);
3622 mlxsw_reg_ritr_if_mac_memcpy_to(ritr_pl, mac);
3623 mlxsw_reg_ritr_op_set(ritr_pl, MLXSW_REG_RITR_RIF_CREATE);
3624 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ritr), ritr_pl);
3625}
3626
3627static int mlxsw_sp_netdevice_router_port_event(struct net_device *dev)
3628{
3629 struct mlxsw_sp *mlxsw_sp;
3630 struct mlxsw_sp_rif *r;
3631 int err;
3632
3633 mlxsw_sp = mlxsw_sp_lower_get(dev);
3634 if (!mlxsw_sp)
3635 return 0;
3636
3637 r = mlxsw_sp_rif_find_by_dev(mlxsw_sp, dev);
3638 if (!r)
3639 return 0;
3640
3641 err = mlxsw_sp_rif_fdb_op(mlxsw_sp, r->addr, r->f->fid, false);
3642 if (err)
3643 return err;
3644
3645 err = mlxsw_sp_rif_edit(mlxsw_sp, r->rif, dev->dev_addr, dev->mtu);
3646 if (err)
3647 goto err_rif_edit;
3648
3649 err = mlxsw_sp_rif_fdb_op(mlxsw_sp, dev->dev_addr, r->f->fid, true);
3650 if (err)
3651 goto err_rif_fdb_op;
3652
3653 ether_addr_copy(r->addr, dev->dev_addr);
3654 r->mtu = dev->mtu;
3655
3656 netdev_dbg(dev, "Updated RIF=%d\n", r->rif);
3657
3658 return 0;
3659
3660err_rif_fdb_op:
3661 mlxsw_sp_rif_edit(mlxsw_sp, r->rif, r->addr, r->mtu);
3662err_rif_edit:
3663 mlxsw_sp_rif_fdb_op(mlxsw_sp, r->addr, r->f->fid, true);
3664 return err;
3665}
3666
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02003667static bool mlxsw_sp_lag_port_fid_member(struct mlxsw_sp_port *lag_port,
3668 u16 fid)
3669{
3670 if (mlxsw_sp_fid_is_vfid(fid))
3671 return mlxsw_sp_port_vport_find_by_fid(lag_port, fid);
3672 else
3673 return test_bit(fid, lag_port->active_vlans);
3674}
3675
3676static bool mlxsw_sp_port_fdb_should_flush(struct mlxsw_sp_port *mlxsw_sp_port,
3677 u16 fid)
Ido Schimmel039c49a2016-01-27 15:20:18 +01003678{
3679 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02003680 u8 local_port = mlxsw_sp_port->local_port;
3681 u16 lag_id = mlxsw_sp_port->lag_id;
3682 int i, count = 0;
Ido Schimmel039c49a2016-01-27 15:20:18 +01003683
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02003684 if (!mlxsw_sp_port->lagged)
3685 return true;
Ido Schimmel039c49a2016-01-27 15:20:18 +01003686
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02003687 for (i = 0; i < MLXSW_SP_PORT_PER_LAG_MAX; i++) {
3688 struct mlxsw_sp_port *lag_port;
3689
3690 lag_port = mlxsw_sp_port_lagged_get(mlxsw_sp, lag_id, i);
3691 if (!lag_port || lag_port->local_port == local_port)
3692 continue;
3693 if (mlxsw_sp_lag_port_fid_member(lag_port, fid))
3694 count++;
3695 }
3696
3697 return !count;
Ido Schimmel039c49a2016-01-27 15:20:18 +01003698}
3699
3700static int
3701mlxsw_sp_port_fdb_flush_by_port_fid(const struct mlxsw_sp_port *mlxsw_sp_port,
3702 u16 fid)
3703{
3704 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
3705 char sfdf_pl[MLXSW_REG_SFDF_LEN];
3706
3707 mlxsw_reg_sfdf_pack(sfdf_pl, MLXSW_REG_SFDF_FLUSH_PER_PORT_AND_FID);
3708 mlxsw_reg_sfdf_fid_set(sfdf_pl, fid);
3709 mlxsw_reg_sfdf_port_fid_system_port_set(sfdf_pl,
3710 mlxsw_sp_port->local_port);
3711
Ido Schimmel22305372016-06-20 23:04:21 +02003712 netdev_dbg(mlxsw_sp_port->dev, "FDB flushed using Port=%d, FID=%d\n",
3713 mlxsw_sp_port->local_port, fid);
3714
Ido Schimmel039c49a2016-01-27 15:20:18 +01003715 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sfdf), sfdf_pl);
3716}
3717
3718static int
Ido Schimmel039c49a2016-01-27 15:20:18 +01003719mlxsw_sp_port_fdb_flush_by_lag_id_fid(const struct mlxsw_sp_port *mlxsw_sp_port,
3720 u16 fid)
3721{
3722 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
3723 char sfdf_pl[MLXSW_REG_SFDF_LEN];
3724
3725 mlxsw_reg_sfdf_pack(sfdf_pl, MLXSW_REG_SFDF_FLUSH_PER_LAG_AND_FID);
3726 mlxsw_reg_sfdf_fid_set(sfdf_pl, fid);
3727 mlxsw_reg_sfdf_lag_fid_lag_id_set(sfdf_pl, mlxsw_sp_port->lag_id);
3728
Ido Schimmel22305372016-06-20 23:04:21 +02003729 netdev_dbg(mlxsw_sp_port->dev, "FDB flushed using LAG ID=%d, FID=%d\n",
3730 mlxsw_sp_port->lag_id, fid);
3731
Ido Schimmel039c49a2016-01-27 15:20:18 +01003732 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sfdf), sfdf_pl);
3733}
3734
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02003735int mlxsw_sp_port_fdb_flush(struct mlxsw_sp_port *mlxsw_sp_port, u16 fid)
Ido Schimmel039c49a2016-01-27 15:20:18 +01003736{
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02003737 if (!mlxsw_sp_port_fdb_should_flush(mlxsw_sp_port, fid))
3738 return 0;
Ido Schimmel039c49a2016-01-27 15:20:18 +01003739
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02003740 if (mlxsw_sp_port->lagged)
3741 return mlxsw_sp_port_fdb_flush_by_lag_id_fid(mlxsw_sp_port,
Ido Schimmel039c49a2016-01-27 15:20:18 +01003742 fid);
3743 else
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02003744 return mlxsw_sp_port_fdb_flush_by_port_fid(mlxsw_sp_port, fid);
Ido Schimmel039c49a2016-01-27 15:20:18 +01003745}
3746
Ido Schimmel701b1862016-07-04 08:23:16 +02003747static void mlxsw_sp_master_bridge_gone_sync(struct mlxsw_sp *mlxsw_sp)
3748{
3749 struct mlxsw_sp_fid *f, *tmp;
3750
3751 list_for_each_entry_safe(f, tmp, &mlxsw_sp->fids, list)
3752 if (--f->ref_count == 0)
3753 mlxsw_sp_fid_destroy(mlxsw_sp, f);
3754 else
3755 WARN_ON_ONCE(1);
3756}
3757
Ido Schimmel7117a572016-06-20 23:04:06 +02003758static bool mlxsw_sp_master_bridge_check(struct mlxsw_sp *mlxsw_sp,
3759 struct net_device *br_dev)
3760{
3761 return !mlxsw_sp->master_bridge.dev ||
3762 mlxsw_sp->master_bridge.dev == br_dev;
3763}
3764
3765static void mlxsw_sp_master_bridge_inc(struct mlxsw_sp *mlxsw_sp,
3766 struct net_device *br_dev)
3767{
3768 mlxsw_sp->master_bridge.dev = br_dev;
3769 mlxsw_sp->master_bridge.ref_count++;
3770}
3771
3772static void mlxsw_sp_master_bridge_dec(struct mlxsw_sp *mlxsw_sp)
3773{
Ido Schimmel701b1862016-07-04 08:23:16 +02003774 if (--mlxsw_sp->master_bridge.ref_count == 0) {
Ido Schimmel7117a572016-06-20 23:04:06 +02003775 mlxsw_sp->master_bridge.dev = NULL;
Ido Schimmel701b1862016-07-04 08:23:16 +02003776 /* It's possible upper VLAN devices are still holding
3777 * references to underlying FIDs. Drop the reference
3778 * and release the resources if it was the last one.
3779 * If it wasn't, then something bad happened.
3780 */
3781 mlxsw_sp_master_bridge_gone_sync(mlxsw_sp);
3782 }
Ido Schimmel7117a572016-06-20 23:04:06 +02003783}
3784
3785static int mlxsw_sp_port_bridge_join(struct mlxsw_sp_port *mlxsw_sp_port,
3786 struct net_device *br_dev)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003787{
3788 struct net_device *dev = mlxsw_sp_port->dev;
3789 int err;
3790
3791 /* When port is not bridged untagged packets are tagged with
3792 * PVID=VID=1, thereby creating an implicit VLAN interface in
3793 * the device. Remove it and let bridge code take care of its
3794 * own VLANs.
3795 */
3796 err = mlxsw_sp_port_kill_vid(dev, 0, 1);
Ido Schimmel6c72a3d2016-01-04 10:42:26 +01003797 if (err)
3798 return err;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003799
Ido Schimmel7117a572016-06-20 23:04:06 +02003800 mlxsw_sp_master_bridge_inc(mlxsw_sp_port->mlxsw_sp, br_dev);
3801
Ido Schimmel6c72a3d2016-01-04 10:42:26 +01003802 mlxsw_sp_port->learning = 1;
3803 mlxsw_sp_port->learning_sync = 1;
3804 mlxsw_sp_port->uc_flood = 1;
3805 mlxsw_sp_port->bridged = 1;
3806
3807 return 0;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003808}
3809
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02003810static void mlxsw_sp_port_bridge_leave(struct mlxsw_sp_port *mlxsw_sp_port)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003811{
3812 struct net_device *dev = mlxsw_sp_port->dev;
Ido Schimmel5a8f4522016-01-04 10:42:25 +01003813
Ido Schimmel28a01d22016-02-18 11:30:02 +01003814 mlxsw_sp_port_pvid_set(mlxsw_sp_port, 1);
3815
Ido Schimmel7117a572016-06-20 23:04:06 +02003816 mlxsw_sp_master_bridge_dec(mlxsw_sp_port->mlxsw_sp);
3817
Ido Schimmel6c72a3d2016-01-04 10:42:26 +01003818 mlxsw_sp_port->learning = 0;
3819 mlxsw_sp_port->learning_sync = 0;
3820 mlxsw_sp_port->uc_flood = 0;
Ido Schimmel5a8f4522016-01-04 10:42:25 +01003821 mlxsw_sp_port->bridged = 0;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003822
3823 /* Add implicit VLAN interface in the device, so that untagged
3824 * packets will be classified to the default vFID.
3825 */
Ido Schimmel82e6db02016-06-20 23:04:04 +02003826 mlxsw_sp_port_add_vid(dev, 0, 1);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003827}
3828
Jiri Pirko0d65fc12015-12-03 12:12:28 +01003829static int mlxsw_sp_lag_create(struct mlxsw_sp *mlxsw_sp, u16 lag_id)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003830{
Jiri Pirko0d65fc12015-12-03 12:12:28 +01003831 char sldr_pl[MLXSW_REG_SLDR_LEN];
3832
3833 mlxsw_reg_sldr_lag_create_pack(sldr_pl, lag_id);
3834 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sldr), sldr_pl);
3835}
3836
3837static int mlxsw_sp_lag_destroy(struct mlxsw_sp *mlxsw_sp, u16 lag_id)
3838{
3839 char sldr_pl[MLXSW_REG_SLDR_LEN];
3840
3841 mlxsw_reg_sldr_lag_destroy_pack(sldr_pl, lag_id);
3842 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sldr), sldr_pl);
3843}
3844
3845static int mlxsw_sp_lag_col_port_add(struct mlxsw_sp_port *mlxsw_sp_port,
3846 u16 lag_id, u8 port_index)
3847{
3848 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
3849 char slcor_pl[MLXSW_REG_SLCOR_LEN];
3850
3851 mlxsw_reg_slcor_port_add_pack(slcor_pl, mlxsw_sp_port->local_port,
3852 lag_id, port_index);
3853 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(slcor), slcor_pl);
3854}
3855
3856static int mlxsw_sp_lag_col_port_remove(struct mlxsw_sp_port *mlxsw_sp_port,
3857 u16 lag_id)
3858{
3859 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
3860 char slcor_pl[MLXSW_REG_SLCOR_LEN];
3861
3862 mlxsw_reg_slcor_port_remove_pack(slcor_pl, mlxsw_sp_port->local_port,
3863 lag_id);
3864 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(slcor), slcor_pl);
3865}
3866
3867static int mlxsw_sp_lag_col_port_enable(struct mlxsw_sp_port *mlxsw_sp_port,
3868 u16 lag_id)
3869{
3870 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
3871 char slcor_pl[MLXSW_REG_SLCOR_LEN];
3872
3873 mlxsw_reg_slcor_col_enable_pack(slcor_pl, mlxsw_sp_port->local_port,
3874 lag_id);
3875 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(slcor), slcor_pl);
3876}
3877
3878static int mlxsw_sp_lag_col_port_disable(struct mlxsw_sp_port *mlxsw_sp_port,
3879 u16 lag_id)
3880{
3881 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
3882 char slcor_pl[MLXSW_REG_SLCOR_LEN];
3883
3884 mlxsw_reg_slcor_col_disable_pack(slcor_pl, mlxsw_sp_port->local_port,
3885 lag_id);
3886 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(slcor), slcor_pl);
3887}
3888
3889static int mlxsw_sp_lag_index_get(struct mlxsw_sp *mlxsw_sp,
3890 struct net_device *lag_dev,
3891 u16 *p_lag_id)
3892{
3893 struct mlxsw_sp_upper *lag;
3894 int free_lag_id = -1;
3895 int i;
3896
3897 for (i = 0; i < MLXSW_SP_LAG_MAX; i++) {
3898 lag = mlxsw_sp_lag_get(mlxsw_sp, i);
3899 if (lag->ref_count) {
3900 if (lag->dev == lag_dev) {
3901 *p_lag_id = i;
3902 return 0;
3903 }
3904 } else if (free_lag_id < 0) {
3905 free_lag_id = i;
3906 }
3907 }
3908 if (free_lag_id < 0)
3909 return -EBUSY;
3910 *p_lag_id = free_lag_id;
3911 return 0;
3912}
3913
3914static bool
3915mlxsw_sp_master_lag_check(struct mlxsw_sp *mlxsw_sp,
3916 struct net_device *lag_dev,
3917 struct netdev_lag_upper_info *lag_upper_info)
3918{
3919 u16 lag_id;
3920
3921 if (mlxsw_sp_lag_index_get(mlxsw_sp, lag_dev, &lag_id) != 0)
3922 return false;
3923 if (lag_upper_info->tx_type != NETDEV_LAG_TX_TYPE_HASH)
3924 return false;
3925 return true;
3926}
3927
3928static int mlxsw_sp_port_lag_index_get(struct mlxsw_sp *mlxsw_sp,
3929 u16 lag_id, u8 *p_port_index)
3930{
3931 int i;
3932
3933 for (i = 0; i < MLXSW_SP_PORT_PER_LAG_MAX; i++) {
3934 if (!mlxsw_sp_port_lagged_get(mlxsw_sp, lag_id, i)) {
3935 *p_port_index = i;
3936 return 0;
3937 }
3938 }
3939 return -EBUSY;
3940}
3941
Ido Schimmel86bf95b2016-07-02 11:00:11 +02003942static void
3943mlxsw_sp_port_pvid_vport_lag_join(struct mlxsw_sp_port *mlxsw_sp_port,
3944 u16 lag_id)
3945{
3946 struct mlxsw_sp_port *mlxsw_sp_vport;
Ido Schimmel11943ff2016-07-02 11:00:12 +02003947 struct mlxsw_sp_fid *f;
Ido Schimmel86bf95b2016-07-02 11:00:11 +02003948
3949 mlxsw_sp_vport = mlxsw_sp_port_vport_find(mlxsw_sp_port, 1);
3950 if (WARN_ON(!mlxsw_sp_vport))
3951 return;
3952
Ido Schimmel11943ff2016-07-02 11:00:12 +02003953 /* If vPort is assigned a RIF, then leave it since it's no
3954 * longer valid.
3955 */
3956 f = mlxsw_sp_vport_fid_get(mlxsw_sp_vport);
3957 if (f)
3958 f->leave(mlxsw_sp_vport);
3959
Ido Schimmel86bf95b2016-07-02 11:00:11 +02003960 mlxsw_sp_vport->lag_id = lag_id;
3961 mlxsw_sp_vport->lagged = 1;
3962}
3963
3964static void
3965mlxsw_sp_port_pvid_vport_lag_leave(struct mlxsw_sp_port *mlxsw_sp_port)
3966{
3967 struct mlxsw_sp_port *mlxsw_sp_vport;
Ido Schimmel11943ff2016-07-02 11:00:12 +02003968 struct mlxsw_sp_fid *f;
Ido Schimmel86bf95b2016-07-02 11:00:11 +02003969
3970 mlxsw_sp_vport = mlxsw_sp_port_vport_find(mlxsw_sp_port, 1);
3971 if (WARN_ON(!mlxsw_sp_vport))
3972 return;
3973
Ido Schimmel11943ff2016-07-02 11:00:12 +02003974 f = mlxsw_sp_vport_fid_get(mlxsw_sp_vport);
3975 if (f)
3976 f->leave(mlxsw_sp_vport);
3977
Ido Schimmel86bf95b2016-07-02 11:00:11 +02003978 mlxsw_sp_vport->lagged = 0;
3979}
3980
Jiri Pirko0d65fc12015-12-03 12:12:28 +01003981static int mlxsw_sp_port_lag_join(struct mlxsw_sp_port *mlxsw_sp_port,
3982 struct net_device *lag_dev)
3983{
3984 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
3985 struct mlxsw_sp_upper *lag;
3986 u16 lag_id;
3987 u8 port_index;
3988 int err;
3989
3990 err = mlxsw_sp_lag_index_get(mlxsw_sp, lag_dev, &lag_id);
3991 if (err)
3992 return err;
3993 lag = mlxsw_sp_lag_get(mlxsw_sp, lag_id);
3994 if (!lag->ref_count) {
3995 err = mlxsw_sp_lag_create(mlxsw_sp, lag_id);
3996 if (err)
3997 return err;
3998 lag->dev = lag_dev;
3999 }
4000
4001 err = mlxsw_sp_port_lag_index_get(mlxsw_sp, lag_id, &port_index);
4002 if (err)
4003 return err;
4004 err = mlxsw_sp_lag_col_port_add(mlxsw_sp_port, lag_id, port_index);
4005 if (err)
4006 goto err_col_port_add;
4007 err = mlxsw_sp_lag_col_port_enable(mlxsw_sp_port, lag_id);
4008 if (err)
4009 goto err_col_port_enable;
4010
4011 mlxsw_core_lag_mapping_set(mlxsw_sp->core, lag_id, port_index,
4012 mlxsw_sp_port->local_port);
4013 mlxsw_sp_port->lag_id = lag_id;
4014 mlxsw_sp_port->lagged = 1;
4015 lag->ref_count++;
Ido Schimmel86bf95b2016-07-02 11:00:11 +02004016
4017 mlxsw_sp_port_pvid_vport_lag_join(mlxsw_sp_port, lag_id);
4018
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004019 return 0;
4020
Ido Schimmel51554db2016-05-06 22:18:39 +02004021err_col_port_enable:
4022 mlxsw_sp_lag_col_port_remove(mlxsw_sp_port, lag_id);
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004023err_col_port_add:
4024 if (!lag->ref_count)
4025 mlxsw_sp_lag_destroy(mlxsw_sp, lag_id);
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004026 return err;
4027}
4028
Ido Schimmel82e6db02016-06-20 23:04:04 +02004029static void mlxsw_sp_port_lag_leave(struct mlxsw_sp_port *mlxsw_sp_port,
4030 struct net_device *lag_dev)
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004031{
4032 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004033 u16 lag_id = mlxsw_sp_port->lag_id;
Ido Schimmel1c800752016-06-20 23:04:20 +02004034 struct mlxsw_sp_upper *lag;
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004035
4036 if (!mlxsw_sp_port->lagged)
Ido Schimmel82e6db02016-06-20 23:04:04 +02004037 return;
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004038 lag = mlxsw_sp_lag_get(mlxsw_sp, lag_id);
4039 WARN_ON(lag->ref_count == 0);
4040
Ido Schimmel82e6db02016-06-20 23:04:04 +02004041 mlxsw_sp_lag_col_port_disable(mlxsw_sp_port, lag_id);
4042 mlxsw_sp_lag_col_port_remove(mlxsw_sp_port, lag_id);
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004043
Ido Schimmel4dc236c2016-01-27 15:20:16 +01004044 if (mlxsw_sp_port->bridged) {
4045 mlxsw_sp_port_active_vlans_del(mlxsw_sp_port);
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02004046 mlxsw_sp_port_bridge_leave(mlxsw_sp_port);
Ido Schimmel4dc236c2016-01-27 15:20:16 +01004047 }
4048
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02004049 if (lag->ref_count == 1)
Ido Schimmel82e6db02016-06-20 23:04:04 +02004050 mlxsw_sp_lag_destroy(mlxsw_sp, lag_id);
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004051
4052 mlxsw_core_lag_mapping_clear(mlxsw_sp->core, lag_id,
4053 mlxsw_sp_port->local_port);
4054 mlxsw_sp_port->lagged = 0;
4055 lag->ref_count--;
Ido Schimmel86bf95b2016-07-02 11:00:11 +02004056
4057 mlxsw_sp_port_pvid_vport_lag_leave(mlxsw_sp_port);
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004058}
4059
Jiri Pirko74581202015-12-03 12:12:30 +01004060static int mlxsw_sp_lag_dist_port_add(struct mlxsw_sp_port *mlxsw_sp_port,
4061 u16 lag_id)
4062{
4063 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
4064 char sldr_pl[MLXSW_REG_SLDR_LEN];
4065
4066 mlxsw_reg_sldr_lag_add_port_pack(sldr_pl, lag_id,
4067 mlxsw_sp_port->local_port);
4068 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sldr), sldr_pl);
4069}
4070
4071static int mlxsw_sp_lag_dist_port_remove(struct mlxsw_sp_port *mlxsw_sp_port,
4072 u16 lag_id)
4073{
4074 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
4075 char sldr_pl[MLXSW_REG_SLDR_LEN];
4076
4077 mlxsw_reg_sldr_lag_remove_port_pack(sldr_pl, lag_id,
4078 mlxsw_sp_port->local_port);
4079 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sldr), sldr_pl);
4080}
4081
4082static int mlxsw_sp_port_lag_tx_en_set(struct mlxsw_sp_port *mlxsw_sp_port,
4083 bool lag_tx_enabled)
4084{
4085 if (lag_tx_enabled)
4086 return mlxsw_sp_lag_dist_port_add(mlxsw_sp_port,
4087 mlxsw_sp_port->lag_id);
4088 else
4089 return mlxsw_sp_lag_dist_port_remove(mlxsw_sp_port,
4090 mlxsw_sp_port->lag_id);
4091}
4092
4093static int mlxsw_sp_port_lag_changed(struct mlxsw_sp_port *mlxsw_sp_port,
4094 struct netdev_lag_lower_state_info *info)
4095{
4096 return mlxsw_sp_port_lag_tx_en_set(mlxsw_sp_port, info->tx_enabled);
4097}
4098
Ido Schimmel9589a7b52015-12-15 16:03:43 +01004099static int mlxsw_sp_port_vlan_link(struct mlxsw_sp_port *mlxsw_sp_port,
4100 struct net_device *vlan_dev)
4101{
4102 struct mlxsw_sp_port *mlxsw_sp_vport;
4103 u16 vid = vlan_dev_vlan_id(vlan_dev);
4104
4105 mlxsw_sp_vport = mlxsw_sp_port_vport_find(mlxsw_sp_port, vid);
Ido Schimmel423b9372016-06-20 23:04:03 +02004106 if (WARN_ON(!mlxsw_sp_vport))
Ido Schimmel9589a7b52015-12-15 16:03:43 +01004107 return -EINVAL;
Ido Schimmel9589a7b52015-12-15 16:03:43 +01004108
4109 mlxsw_sp_vport->dev = vlan_dev;
4110
4111 return 0;
4112}
4113
Ido Schimmel82e6db02016-06-20 23:04:04 +02004114static void mlxsw_sp_port_vlan_unlink(struct mlxsw_sp_port *mlxsw_sp_port,
4115 struct net_device *vlan_dev)
Ido Schimmel9589a7b52015-12-15 16:03:43 +01004116{
4117 struct mlxsw_sp_port *mlxsw_sp_vport;
4118 u16 vid = vlan_dev_vlan_id(vlan_dev);
4119
4120 mlxsw_sp_vport = mlxsw_sp_port_vport_find(mlxsw_sp_port, vid);
Ido Schimmel423b9372016-06-20 23:04:03 +02004121 if (WARN_ON(!mlxsw_sp_vport))
Ido Schimmel82e6db02016-06-20 23:04:04 +02004122 return;
Ido Schimmel9589a7b52015-12-15 16:03:43 +01004123
4124 mlxsw_sp_vport->dev = mlxsw_sp_port->dev;
Ido Schimmel9589a7b52015-12-15 16:03:43 +01004125}
4126
Jiri Pirko74581202015-12-03 12:12:30 +01004127static int mlxsw_sp_netdevice_port_upper_event(struct net_device *dev,
4128 unsigned long event, void *ptr)
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004129{
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004130 struct netdev_notifier_changeupper_info *info;
4131 struct mlxsw_sp_port *mlxsw_sp_port;
4132 struct net_device *upper_dev;
4133 struct mlxsw_sp *mlxsw_sp;
Ido Schimmel80bedf12016-06-20 23:03:59 +02004134 int err = 0;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004135
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004136 mlxsw_sp_port = netdev_priv(dev);
4137 mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
4138 info = ptr;
4139
4140 switch (event) {
4141 case NETDEV_PRECHANGEUPPER:
4142 upper_dev = info->upper_dev;
Ido Schimmel59fe9b32016-06-20 23:04:00 +02004143 if (!is_vlan_dev(upper_dev) &&
4144 !netif_is_lag_master(upper_dev) &&
4145 !netif_is_bridge_master(upper_dev))
4146 return -EINVAL;
Ido Schimmel6ec43902016-06-20 23:04:01 +02004147 if (!info->linking)
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004148 break;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004149 /* HW limitation forbids to put ports to multiple bridges. */
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004150 if (netif_is_bridge_master(upper_dev) &&
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004151 !mlxsw_sp_master_bridge_check(mlxsw_sp, upper_dev))
Ido Schimmel80bedf12016-06-20 23:03:59 +02004152 return -EINVAL;
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004153 if (netif_is_lag_master(upper_dev) &&
4154 !mlxsw_sp_master_lag_check(mlxsw_sp, upper_dev,
4155 info->upper_info))
Ido Schimmel80bedf12016-06-20 23:03:59 +02004156 return -EINVAL;
Ido Schimmel6ec43902016-06-20 23:04:01 +02004157 if (netif_is_lag_master(upper_dev) && vlan_uses_dev(dev))
4158 return -EINVAL;
4159 if (netif_is_lag_port(dev) && is_vlan_dev(upper_dev) &&
4160 !netif_is_lag_master(vlan_dev_real_dev(upper_dev)))
4161 return -EINVAL;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004162 break;
4163 case NETDEV_CHANGEUPPER:
4164 upper_dev = info->upper_dev;
Ido Schimmel9589a7b52015-12-15 16:03:43 +01004165 if (is_vlan_dev(upper_dev)) {
Ido Schimmel80bedf12016-06-20 23:03:59 +02004166 if (info->linking)
Ido Schimmel9589a7b52015-12-15 16:03:43 +01004167 err = mlxsw_sp_port_vlan_link(mlxsw_sp_port,
4168 upper_dev);
Ido Schimmel80bedf12016-06-20 23:03:59 +02004169 else
Ido Schimmel82e6db02016-06-20 23:04:04 +02004170 mlxsw_sp_port_vlan_unlink(mlxsw_sp_port,
4171 upper_dev);
Ido Schimmel9589a7b52015-12-15 16:03:43 +01004172 } else if (netif_is_bridge_master(upper_dev)) {
Ido Schimmel7117a572016-06-20 23:04:06 +02004173 if (info->linking)
4174 err = mlxsw_sp_port_bridge_join(mlxsw_sp_port,
4175 upper_dev);
4176 else
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02004177 mlxsw_sp_port_bridge_leave(mlxsw_sp_port);
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004178 } else if (netif_is_lag_master(upper_dev)) {
Ido Schimmel80bedf12016-06-20 23:03:59 +02004179 if (info->linking)
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004180 err = mlxsw_sp_port_lag_join(mlxsw_sp_port,
4181 upper_dev);
Ido Schimmel80bedf12016-06-20 23:03:59 +02004182 else
Ido Schimmel82e6db02016-06-20 23:04:04 +02004183 mlxsw_sp_port_lag_leave(mlxsw_sp_port,
4184 upper_dev);
Ido Schimmel59fe9b32016-06-20 23:04:00 +02004185 } else {
4186 err = -EINVAL;
4187 WARN_ON(1);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004188 }
4189 break;
4190 }
4191
Ido Schimmel80bedf12016-06-20 23:03:59 +02004192 return err;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004193}
4194
Jiri Pirko74581202015-12-03 12:12:30 +01004195static int mlxsw_sp_netdevice_port_lower_event(struct net_device *dev,
4196 unsigned long event, void *ptr)
4197{
4198 struct netdev_notifier_changelowerstate_info *info;
4199 struct mlxsw_sp_port *mlxsw_sp_port;
4200 int err;
4201
4202 mlxsw_sp_port = netdev_priv(dev);
4203 info = ptr;
4204
4205 switch (event) {
4206 case NETDEV_CHANGELOWERSTATE:
4207 if (netif_is_lag_port(dev) && mlxsw_sp_port->lagged) {
4208 err = mlxsw_sp_port_lag_changed(mlxsw_sp_port,
4209 info->lower_state_info);
4210 if (err)
4211 netdev_err(dev, "Failed to reflect link aggregation lower state change\n");
4212 }
4213 break;
4214 }
4215
Ido Schimmel80bedf12016-06-20 23:03:59 +02004216 return 0;
Jiri Pirko74581202015-12-03 12:12:30 +01004217}
4218
4219static int mlxsw_sp_netdevice_port_event(struct net_device *dev,
4220 unsigned long event, void *ptr)
4221{
4222 switch (event) {
4223 case NETDEV_PRECHANGEUPPER:
4224 case NETDEV_CHANGEUPPER:
4225 return mlxsw_sp_netdevice_port_upper_event(dev, event, ptr);
4226 case NETDEV_CHANGELOWERSTATE:
4227 return mlxsw_sp_netdevice_port_lower_event(dev, event, ptr);
4228 }
4229
Ido Schimmel80bedf12016-06-20 23:03:59 +02004230 return 0;
Jiri Pirko74581202015-12-03 12:12:30 +01004231}
4232
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004233static int mlxsw_sp_netdevice_lag_event(struct net_device *lag_dev,
4234 unsigned long event, void *ptr)
4235{
4236 struct net_device *dev;
4237 struct list_head *iter;
4238 int ret;
4239
4240 netdev_for_each_lower_dev(lag_dev, dev, iter) {
4241 if (mlxsw_sp_port_dev_check(dev)) {
4242 ret = mlxsw_sp_netdevice_port_event(dev, event, ptr);
Ido Schimmel80bedf12016-06-20 23:03:59 +02004243 if (ret)
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004244 return ret;
4245 }
4246 }
4247
Ido Schimmel80bedf12016-06-20 23:03:59 +02004248 return 0;
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004249}
4250
Ido Schimmel701b1862016-07-04 08:23:16 +02004251static int mlxsw_sp_master_bridge_vlan_link(struct mlxsw_sp *mlxsw_sp,
4252 struct net_device *vlan_dev)
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004253{
Ido Schimmel701b1862016-07-04 08:23:16 +02004254 u16 fid = vlan_dev_vlan_id(vlan_dev);
Ido Schimmeld0ec8752016-06-20 23:04:12 +02004255 struct mlxsw_sp_fid *f;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004256
Ido Schimmel701b1862016-07-04 08:23:16 +02004257 f = mlxsw_sp_fid_find(mlxsw_sp, fid);
4258 if (!f) {
4259 f = mlxsw_sp_fid_create(mlxsw_sp, fid);
4260 if (IS_ERR(f))
4261 return PTR_ERR(f);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004262 }
4263
Ido Schimmel701b1862016-07-04 08:23:16 +02004264 f->ref_count++;
4265
4266 return 0;
4267}
4268
4269static void mlxsw_sp_master_bridge_vlan_unlink(struct mlxsw_sp *mlxsw_sp,
4270 struct net_device *vlan_dev)
4271{
4272 u16 fid = vlan_dev_vlan_id(vlan_dev);
4273 struct mlxsw_sp_fid *f;
4274
4275 f = mlxsw_sp_fid_find(mlxsw_sp, fid);
Ido Schimmel99f44bb2016-07-04 08:23:17 +02004276 if (f && f->r)
4277 mlxsw_sp_rif_bridge_destroy(mlxsw_sp, f->r);
Ido Schimmel701b1862016-07-04 08:23:16 +02004278 if (f && --f->ref_count == 0)
4279 mlxsw_sp_fid_destroy(mlxsw_sp, f);
4280}
4281
4282static int mlxsw_sp_netdevice_bridge_event(struct net_device *br_dev,
4283 unsigned long event, void *ptr)
4284{
4285 struct netdev_notifier_changeupper_info *info;
4286 struct net_device *upper_dev;
4287 struct mlxsw_sp *mlxsw_sp;
4288 int err;
4289
4290 mlxsw_sp = mlxsw_sp_lower_get(br_dev);
4291 if (!mlxsw_sp)
4292 return 0;
4293 if (br_dev != mlxsw_sp->master_bridge.dev)
4294 return 0;
4295
4296 info = ptr;
4297
4298 switch (event) {
4299 case NETDEV_CHANGEUPPER:
4300 upper_dev = info->upper_dev;
4301 if (!is_vlan_dev(upper_dev))
4302 break;
4303 if (info->linking) {
4304 err = mlxsw_sp_master_bridge_vlan_link(mlxsw_sp,
4305 upper_dev);
4306 if (err)
4307 return err;
4308 } else {
4309 mlxsw_sp_master_bridge_vlan_unlink(mlxsw_sp, upper_dev);
4310 }
4311 break;
4312 }
4313
4314 return 0;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004315}
4316
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004317static u16 mlxsw_sp_avail_vfid_get(const struct mlxsw_sp *mlxsw_sp)
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004318{
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004319 return find_first_zero_bit(mlxsw_sp->vfids.mapped,
Ido Schimmel99724c12016-07-04 08:23:14 +02004320 MLXSW_SP_VFID_MAX);
4321}
4322
4323static int mlxsw_sp_vfid_op(struct mlxsw_sp *mlxsw_sp, u16 fid, bool create)
4324{
4325 char sfmr_pl[MLXSW_REG_SFMR_LEN];
4326
4327 mlxsw_reg_sfmr_pack(sfmr_pl, !create, fid, 0);
4328 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sfmr), sfmr_pl);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004329}
4330
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004331static void mlxsw_sp_vport_vfid_leave(struct mlxsw_sp_port *mlxsw_sp_vport);
Ido Schimmel1c800752016-06-20 23:04:20 +02004332
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004333static struct mlxsw_sp_fid *mlxsw_sp_vfid_create(struct mlxsw_sp *mlxsw_sp,
4334 struct net_device *br_dev)
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004335{
4336 struct device *dev = mlxsw_sp->bus_info->dev;
Ido Schimmeld0ec8752016-06-20 23:04:12 +02004337 struct mlxsw_sp_fid *f;
Ido Schimmelc7e920b2016-06-20 23:04:09 +02004338 u16 vfid, fid;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004339 int err;
4340
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004341 vfid = mlxsw_sp_avail_vfid_get(mlxsw_sp);
Ido Schimmelc7e920b2016-06-20 23:04:09 +02004342 if (vfid == MLXSW_SP_VFID_MAX) {
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004343 dev_err(dev, "No available vFIDs\n");
4344 return ERR_PTR(-ERANGE);
4345 }
4346
Ido Schimmelc7e920b2016-06-20 23:04:09 +02004347 fid = mlxsw_sp_vfid_to_fid(vfid);
4348 err = mlxsw_sp_vfid_op(mlxsw_sp, fid, true);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004349 if (err) {
Ido Schimmelc7e920b2016-06-20 23:04:09 +02004350 dev_err(dev, "Failed to create FID=%d\n", fid);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004351 return ERR_PTR(err);
4352 }
4353
Ido Schimmelc7e920b2016-06-20 23:04:09 +02004354 f = kzalloc(sizeof(*f), GFP_KERNEL);
4355 if (!f)
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004356 goto err_allocate_vfid;
4357
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004358 f->leave = mlxsw_sp_vport_vfid_leave;
Ido Schimmeld0ec8752016-06-20 23:04:12 +02004359 f->fid = fid;
4360 f->dev = br_dev;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004361
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004362 list_add(&f->list, &mlxsw_sp->vfids.list);
4363 set_bit(vfid, mlxsw_sp->vfids.mapped);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004364
Ido Schimmelc7e920b2016-06-20 23:04:09 +02004365 return f;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004366
4367err_allocate_vfid:
Ido Schimmelc7e920b2016-06-20 23:04:09 +02004368 mlxsw_sp_vfid_op(mlxsw_sp, fid, false);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004369 return ERR_PTR(-ENOMEM);
4370}
4371
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004372static void mlxsw_sp_vfid_destroy(struct mlxsw_sp *mlxsw_sp,
4373 struct mlxsw_sp_fid *f)
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004374{
Ido Schimmeld0ec8752016-06-20 23:04:12 +02004375 u16 vfid = mlxsw_sp_fid_to_vfid(f->fid);
Ido Schimmel99f44bb2016-07-04 08:23:17 +02004376 u16 fid = f->fid;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004377
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004378 clear_bit(vfid, mlxsw_sp->vfids.mapped);
Ido Schimmeld0ec8752016-06-20 23:04:12 +02004379 list_del(&f->list);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004380
Ido Schimmel99f44bb2016-07-04 08:23:17 +02004381 if (f->r)
4382 mlxsw_sp_rif_bridge_destroy(mlxsw_sp, f->r);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004383
Ido Schimmeld0ec8752016-06-20 23:04:12 +02004384 kfree(f);
Ido Schimmel99f44bb2016-07-04 08:23:17 +02004385
4386 mlxsw_sp_vfid_op(mlxsw_sp, fid, false);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004387}
4388
Ido Schimmel99724c12016-07-04 08:23:14 +02004389static int mlxsw_sp_vport_fid_map(struct mlxsw_sp_port *mlxsw_sp_vport, u16 fid,
4390 bool valid)
4391{
4392 enum mlxsw_reg_svfa_mt mt = MLXSW_REG_SVFA_MT_PORT_VID_TO_FID;
4393 u16 vid = mlxsw_sp_vport_vid_get(mlxsw_sp_vport);
4394
4395 return mlxsw_sp_port_vid_to_fid_set(mlxsw_sp_vport, mt, valid, fid,
4396 vid);
4397}
4398
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004399static int mlxsw_sp_vport_vfid_join(struct mlxsw_sp_port *mlxsw_sp_vport,
4400 struct net_device *br_dev)
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004401{
Ido Schimmel0355b592016-06-20 23:04:13 +02004402 struct mlxsw_sp_fid *f;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004403 int err;
4404
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004405 f = mlxsw_sp_vfid_find(mlxsw_sp_vport->mlxsw_sp, br_dev);
Ido Schimmel0355b592016-06-20 23:04:13 +02004406 if (!f) {
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004407 f = mlxsw_sp_vfid_create(mlxsw_sp_vport->mlxsw_sp, br_dev);
Ido Schimmel0355b592016-06-20 23:04:13 +02004408 if (IS_ERR(f))
4409 return PTR_ERR(f);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004410 }
4411
Ido Schimmel0355b592016-06-20 23:04:13 +02004412 err = mlxsw_sp_vport_flood_set(mlxsw_sp_vport, f->fid, true);
4413 if (err)
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004414 goto err_vport_flood_set;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004415
Ido Schimmel0355b592016-06-20 23:04:13 +02004416 err = mlxsw_sp_vport_fid_map(mlxsw_sp_vport, f->fid, true);
4417 if (err)
4418 goto err_vport_fid_map;
Ido Schimmel6a9863a2016-02-15 13:19:54 +01004419
Ido Schimmel41b996c2016-06-20 23:04:17 +02004420 mlxsw_sp_vport_fid_set(mlxsw_sp_vport, f);
Ido Schimmel0355b592016-06-20 23:04:13 +02004421 f->ref_count++;
Ido Schimmel039c49a2016-01-27 15:20:18 +01004422
Ido Schimmel22305372016-06-20 23:04:21 +02004423 netdev_dbg(mlxsw_sp_vport->dev, "Joined FID=%d\n", f->fid);
4424
Ido Schimmel0355b592016-06-20 23:04:13 +02004425 return 0;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004426
Ido Schimmel9c4d4422016-06-20 23:04:10 +02004427err_vport_fid_map:
Ido Schimmel0355b592016-06-20 23:04:13 +02004428 mlxsw_sp_vport_flood_set(mlxsw_sp_vport, f->fid, false);
4429err_vport_flood_set:
4430 if (!f->ref_count)
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004431 mlxsw_sp_vfid_destroy(mlxsw_sp_vport->mlxsw_sp, f);
Ido Schimmel0355b592016-06-20 23:04:13 +02004432 return err;
4433}
4434
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004435static void mlxsw_sp_vport_vfid_leave(struct mlxsw_sp_port *mlxsw_sp_vport)
Ido Schimmel0355b592016-06-20 23:04:13 +02004436{
Ido Schimmel41b996c2016-06-20 23:04:17 +02004437 struct mlxsw_sp_fid *f = mlxsw_sp_vport_fid_get(mlxsw_sp_vport);
Ido Schimmel0355b592016-06-20 23:04:13 +02004438
Ido Schimmel22305372016-06-20 23:04:21 +02004439 netdev_dbg(mlxsw_sp_vport->dev, "Left FID=%d\n", f->fid);
4440
Ido Schimmel0355b592016-06-20 23:04:13 +02004441 mlxsw_sp_vport_fid_map(mlxsw_sp_vport, f->fid, false);
4442
4443 mlxsw_sp_vport_flood_set(mlxsw_sp_vport, f->fid, false);
4444
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02004445 mlxsw_sp_port_fdb_flush(mlxsw_sp_vport, f->fid);
4446
Ido Schimmel41b996c2016-06-20 23:04:17 +02004447 mlxsw_sp_vport_fid_set(mlxsw_sp_vport, NULL);
Ido Schimmel0355b592016-06-20 23:04:13 +02004448 if (--f->ref_count == 0)
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004449 mlxsw_sp_vfid_destroy(mlxsw_sp_vport->mlxsw_sp, f);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004450}
4451
4452static int mlxsw_sp_vport_bridge_join(struct mlxsw_sp_port *mlxsw_sp_vport,
4453 struct net_device *br_dev)
4454{
Ido Schimmel99724c12016-07-04 08:23:14 +02004455 struct mlxsw_sp_fid *f = mlxsw_sp_vport_fid_get(mlxsw_sp_vport);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004456 u16 vid = mlxsw_sp_vport_vid_get(mlxsw_sp_vport);
4457 struct net_device *dev = mlxsw_sp_vport->dev;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004458 int err;
4459
Ido Schimmel99724c12016-07-04 08:23:14 +02004460 if (f && !WARN_ON(!f->leave))
4461 f->leave(mlxsw_sp_vport);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004462
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004463 err = mlxsw_sp_vport_vfid_join(mlxsw_sp_vport, br_dev);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004464 if (err) {
Ido Schimmel0355b592016-06-20 23:04:13 +02004465 netdev_err(dev, "Failed to join vFID\n");
Ido Schimmel99724c12016-07-04 08:23:14 +02004466 return err;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004467 }
4468
4469 err = mlxsw_sp_port_vid_learning_set(mlxsw_sp_vport, vid, true);
4470 if (err) {
4471 netdev_err(dev, "Failed to enable learning\n");
4472 goto err_port_vid_learning_set;
4473 }
4474
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004475 mlxsw_sp_vport->learning = 1;
4476 mlxsw_sp_vport->learning_sync = 1;
4477 mlxsw_sp_vport->uc_flood = 1;
4478 mlxsw_sp_vport->bridged = 1;
4479
4480 return 0;
4481
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004482err_port_vid_learning_set:
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004483 mlxsw_sp_vport_vfid_leave(mlxsw_sp_vport);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004484 return err;
4485}
4486
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02004487static void mlxsw_sp_vport_bridge_leave(struct mlxsw_sp_port *mlxsw_sp_vport)
Ido Schimmel0355b592016-06-20 23:04:13 +02004488{
4489 u16 vid = mlxsw_sp_vport_vid_get(mlxsw_sp_vport);
Ido Schimmel0355b592016-06-20 23:04:13 +02004490
4491 mlxsw_sp_port_vid_learning_set(mlxsw_sp_vport, vid, false);
4492
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004493 mlxsw_sp_vport_vfid_leave(mlxsw_sp_vport);
Ido Schimmel0355b592016-06-20 23:04:13 +02004494
Ido Schimmel0355b592016-06-20 23:04:13 +02004495 mlxsw_sp_vport->learning = 0;
4496 mlxsw_sp_vport->learning_sync = 0;
4497 mlxsw_sp_vport->uc_flood = 0;
4498 mlxsw_sp_vport->bridged = 0;
4499}
4500
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004501static bool
4502mlxsw_sp_port_master_bridge_check(const struct mlxsw_sp_port *mlxsw_sp_port,
4503 const struct net_device *br_dev)
4504{
4505 struct mlxsw_sp_port *mlxsw_sp_vport;
4506
4507 list_for_each_entry(mlxsw_sp_vport, &mlxsw_sp_port->vports_list,
4508 vport.list) {
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004509 struct net_device *dev = mlxsw_sp_vport_dev_get(mlxsw_sp_vport);
Ido Schimmel56918b62016-06-20 23:04:18 +02004510
4511 if (dev && dev == br_dev)
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004512 return false;
4513 }
4514
4515 return true;
4516}
4517
4518static int mlxsw_sp_netdevice_vport_event(struct net_device *dev,
4519 unsigned long event, void *ptr,
4520 u16 vid)
4521{
4522 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
4523 struct netdev_notifier_changeupper_info *info = ptr;
4524 struct mlxsw_sp_port *mlxsw_sp_vport;
4525 struct net_device *upper_dev;
Ido Schimmel80bedf12016-06-20 23:03:59 +02004526 int err = 0;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004527
4528 mlxsw_sp_vport = mlxsw_sp_port_vport_find(mlxsw_sp_port, vid);
4529
4530 switch (event) {
4531 case NETDEV_PRECHANGEUPPER:
4532 upper_dev = info->upper_dev;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004533 if (!netif_is_bridge_master(upper_dev))
Ido Schimmel80bedf12016-06-20 23:03:59 +02004534 return -EINVAL;
Ido Schimmelddbe9932016-06-20 23:04:02 +02004535 if (!info->linking)
4536 break;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004537 /* We can't have multiple VLAN interfaces configured on
4538 * the same port and being members in the same bridge.
4539 */
4540 if (!mlxsw_sp_port_master_bridge_check(mlxsw_sp_port,
4541 upper_dev))
Ido Schimmel80bedf12016-06-20 23:03:59 +02004542 return -EINVAL;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004543 break;
4544 case NETDEV_CHANGEUPPER:
4545 upper_dev = info->upper_dev;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004546 if (info->linking) {
Ido Schimmel423b9372016-06-20 23:04:03 +02004547 if (WARN_ON(!mlxsw_sp_vport))
Ido Schimmel80bedf12016-06-20 23:03:59 +02004548 return -EINVAL;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004549 err = mlxsw_sp_vport_bridge_join(mlxsw_sp_vport,
4550 upper_dev);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004551 } else {
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004552 if (!mlxsw_sp_vport)
Ido Schimmel80bedf12016-06-20 23:03:59 +02004553 return 0;
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02004554 mlxsw_sp_vport_bridge_leave(mlxsw_sp_vport);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004555 }
4556 }
4557
Ido Schimmel80bedf12016-06-20 23:03:59 +02004558 return err;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004559}
4560
Ido Schimmel272c4472015-12-15 16:03:47 +01004561static int mlxsw_sp_netdevice_lag_vport_event(struct net_device *lag_dev,
4562 unsigned long event, void *ptr,
4563 u16 vid)
4564{
4565 struct net_device *dev;
4566 struct list_head *iter;
4567 int ret;
4568
4569 netdev_for_each_lower_dev(lag_dev, dev, iter) {
4570 if (mlxsw_sp_port_dev_check(dev)) {
4571 ret = mlxsw_sp_netdevice_vport_event(dev, event, ptr,
4572 vid);
Ido Schimmel80bedf12016-06-20 23:03:59 +02004573 if (ret)
Ido Schimmel272c4472015-12-15 16:03:47 +01004574 return ret;
4575 }
4576 }
4577
Ido Schimmel80bedf12016-06-20 23:03:59 +02004578 return 0;
Ido Schimmel272c4472015-12-15 16:03:47 +01004579}
4580
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004581static int mlxsw_sp_netdevice_vlan_event(struct net_device *vlan_dev,
4582 unsigned long event, void *ptr)
4583{
4584 struct net_device *real_dev = vlan_dev_real_dev(vlan_dev);
4585 u16 vid = vlan_dev_vlan_id(vlan_dev);
4586
Ido Schimmel272c4472015-12-15 16:03:47 +01004587 if (mlxsw_sp_port_dev_check(real_dev))
4588 return mlxsw_sp_netdevice_vport_event(real_dev, event, ptr,
4589 vid);
4590 else if (netif_is_lag_master(real_dev))
4591 return mlxsw_sp_netdevice_lag_vport_event(real_dev, event, ptr,
4592 vid);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004593
Ido Schimmel80bedf12016-06-20 23:03:59 +02004594 return 0;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004595}
4596
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004597static int mlxsw_sp_netdevice_event(struct notifier_block *unused,
4598 unsigned long event, void *ptr)
4599{
4600 struct net_device *dev = netdev_notifier_info_to_dev(ptr);
Ido Schimmel80bedf12016-06-20 23:03:59 +02004601 int err = 0;
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004602
Ido Schimmel6e095fd2016-07-04 08:23:13 +02004603 if (event == NETDEV_CHANGEADDR || event == NETDEV_CHANGEMTU)
4604 err = mlxsw_sp_netdevice_router_port_event(dev);
4605 else if (mlxsw_sp_port_dev_check(dev))
Ido Schimmel80bedf12016-06-20 23:03:59 +02004606 err = mlxsw_sp_netdevice_port_event(dev, event, ptr);
4607 else if (netif_is_lag_master(dev))
4608 err = mlxsw_sp_netdevice_lag_event(dev, event, ptr);
Ido Schimmel701b1862016-07-04 08:23:16 +02004609 else if (netif_is_bridge_master(dev))
4610 err = mlxsw_sp_netdevice_bridge_event(dev, event, ptr);
Ido Schimmel80bedf12016-06-20 23:03:59 +02004611 else if (is_vlan_dev(dev))
4612 err = mlxsw_sp_netdevice_vlan_event(dev, event, ptr);
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004613
Ido Schimmel80bedf12016-06-20 23:03:59 +02004614 return notifier_from_errno(err);
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004615}
4616
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004617static struct notifier_block mlxsw_sp_netdevice_nb __read_mostly = {
4618 .notifier_call = mlxsw_sp_netdevice_event,
4619};
4620
Ido Schimmel99724c12016-07-04 08:23:14 +02004621static struct notifier_block mlxsw_sp_inetaddr_nb __read_mostly = {
4622 .notifier_call = mlxsw_sp_inetaddr_event,
4623 .priority = 10, /* Must be called before FIB notifier block */
4624};
4625
Jiri Pirkoe7322632016-09-01 10:37:43 +02004626static struct notifier_block mlxsw_sp_router_netevent_nb __read_mostly = {
4627 .notifier_call = mlxsw_sp_router_netevent_event,
4628};
4629
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004630static int __init mlxsw_sp_module_init(void)
4631{
4632 int err;
4633
4634 register_netdevice_notifier(&mlxsw_sp_netdevice_nb);
Ido Schimmel99724c12016-07-04 08:23:14 +02004635 register_inetaddr_notifier(&mlxsw_sp_inetaddr_nb);
Jiri Pirkoe7322632016-09-01 10:37:43 +02004636 register_netevent_notifier(&mlxsw_sp_router_netevent_nb);
4637
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004638 err = mlxsw_core_driver_register(&mlxsw_sp_driver);
4639 if (err)
4640 goto err_core_driver_register;
4641 return 0;
4642
4643err_core_driver_register:
Jiri Pirkoe7322632016-09-01 10:37:43 +02004644 unregister_netevent_notifier(&mlxsw_sp_router_netevent_nb);
Jiri Pirkode7d6292016-09-01 10:37:42 +02004645 unregister_inetaddr_notifier(&mlxsw_sp_inetaddr_nb);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004646 unregister_netdevice_notifier(&mlxsw_sp_netdevice_nb);
4647 return err;
4648}
4649
4650static void __exit mlxsw_sp_module_exit(void)
4651{
4652 mlxsw_core_driver_unregister(&mlxsw_sp_driver);
Jiri Pirkoe7322632016-09-01 10:37:43 +02004653 unregister_netevent_notifier(&mlxsw_sp_router_netevent_nb);
Ido Schimmel99724c12016-07-04 08:23:14 +02004654 unregister_inetaddr_notifier(&mlxsw_sp_inetaddr_nb);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004655 unregister_netdevice_notifier(&mlxsw_sp_netdevice_nb);
4656}
4657
4658module_init(mlxsw_sp_module_init);
4659module_exit(mlxsw_sp_module_exit);
4660
4661MODULE_LICENSE("Dual BSD/GPL");
4662MODULE_AUTHOR("Jiri Pirko <jiri@mellanox.com>");
4663MODULE_DESCRIPTION("Mellanox Spectrum driver");
4664MODULE_MLXSW_DRIVER_ALIAS(MLXSW_DEVICE_KIND_SPECTRUM);