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Daniel Walkerda6df072010-04-23 16:04:20 -07001/* include/linux/msm_mdp.h
2 *
3 * Copyright (C) 2007 Google Incorporated
Ken Zhang420dd202013-01-08 14:28:20 -05004 * Copyright (c) 2012-2013 The Linux Foundation. All rights reserved.
Daniel Walkerda6df072010-04-23 16:04:20 -07005 *
6 * This software is licensed under the terms of the GNU General Public
7 * License version 2, as published by the Free Software Foundation, and
8 * may be copied, distributed, and modified under those terms.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 */
15#ifndef _MSM_MDP_H_
16#define _MSM_MDP_H_
17
18#include <linux/types.h>
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070019#include <linux/fb.h>
Daniel Walkerda6df072010-04-23 16:04:20 -070020
21#define MSMFB_IOCTL_MAGIC 'm'
22#define MSMFB_GRP_DISP _IOW(MSMFB_IOCTL_MAGIC, 1, unsigned int)
23#define MSMFB_BLIT _IOW(MSMFB_IOCTL_MAGIC, 2, unsigned int)
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070024#define MSMFB_SUSPEND_SW_REFRESHER _IOW(MSMFB_IOCTL_MAGIC, 128, unsigned int)
25#define MSMFB_RESUME_SW_REFRESHER _IOW(MSMFB_IOCTL_MAGIC, 129, unsigned int)
26#define MSMFB_CURSOR _IOW(MSMFB_IOCTL_MAGIC, 130, struct fb_cursor)
27#define MSMFB_SET_LUT _IOW(MSMFB_IOCTL_MAGIC, 131, struct fb_cmap)
Carl Vanderlipba093a22011-11-22 13:59:59 -080028#define MSMFB_HISTOGRAM _IOWR(MSMFB_IOCTL_MAGIC, 132, struct mdp_histogram_data)
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070029/* new ioctls's for set/get ccs matrix */
30#define MSMFB_GET_CCS_MATRIX _IOWR(MSMFB_IOCTL_MAGIC, 133, struct mdp_ccs)
31#define MSMFB_SET_CCS_MATRIX _IOW(MSMFB_IOCTL_MAGIC, 134, struct mdp_ccs)
32#define MSMFB_OVERLAY_SET _IOWR(MSMFB_IOCTL_MAGIC, 135, \
33 struct mdp_overlay)
34#define MSMFB_OVERLAY_UNSET _IOW(MSMFB_IOCTL_MAGIC, 136, unsigned int)
Kuogee Hsieh586fd162012-02-14 15:24:16 -080035
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070036#define MSMFB_OVERLAY_PLAY _IOW(MSMFB_IOCTL_MAGIC, 137, \
37 struct msmfb_overlay_data)
Kuogee Hsieh586fd162012-02-14 15:24:16 -080038#define MSMFB_OVERLAY_QUEUE MSMFB_OVERLAY_PLAY
39
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070040#define MSMFB_GET_PAGE_PROTECTION _IOR(MSMFB_IOCTL_MAGIC, 138, \
41 struct mdp_page_protection)
42#define MSMFB_SET_PAGE_PROTECTION _IOW(MSMFB_IOCTL_MAGIC, 139, \
43 struct mdp_page_protection)
44#define MSMFB_OVERLAY_GET _IOR(MSMFB_IOCTL_MAGIC, 140, \
45 struct mdp_overlay)
46#define MSMFB_OVERLAY_PLAY_ENABLE _IOW(MSMFB_IOCTL_MAGIC, 141, unsigned int)
47#define MSMFB_OVERLAY_BLT _IOWR(MSMFB_IOCTL_MAGIC, 142, \
48 struct msmfb_overlay_blt)
49#define MSMFB_OVERLAY_BLT_OFFSET _IOW(MSMFB_IOCTL_MAGIC, 143, unsigned int)
Carl Vanderlipba093a22011-11-22 13:59:59 -080050#define MSMFB_HISTOGRAM_START _IOR(MSMFB_IOCTL_MAGIC, 144, \
51 struct mdp_histogram_start_req)
52#define MSMFB_HISTOGRAM_STOP _IOR(MSMFB_IOCTL_MAGIC, 145, unsigned int)
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070053#define MSMFB_NOTIFY_UPDATE _IOW(MSMFB_IOCTL_MAGIC, 146, unsigned int)
54
55#define MSMFB_OVERLAY_3D _IOWR(MSMFB_IOCTL_MAGIC, 147, \
56 struct msmfb_overlay_3d)
57
kuogee hsieh405dc302011-07-21 15:06:59 -070058#define MSMFB_MIXER_INFO _IOWR(MSMFB_IOCTL_MAGIC, 148, \
59 struct msmfb_mixer_info_req)
Nagamalleswararao Ganji0737d652011-10-14 02:02:33 -070060#define MSMFB_OVERLAY_PLAY_WAIT _IOWR(MSMFB_IOCTL_MAGIC, 149, \
61 struct msmfb_overlay_data)
Vinay Kalia27020d12011-10-14 17:50:29 -070062#define MSMFB_WRITEBACK_INIT _IO(MSMFB_IOCTL_MAGIC, 150)
Vinay Kaliae1ba2702011-12-21 16:24:52 -080063#define MSMFB_WRITEBACK_START _IO(MSMFB_IOCTL_MAGIC, 151)
64#define MSMFB_WRITEBACK_STOP _IO(MSMFB_IOCTL_MAGIC, 152)
Vinay Kalia27020d12011-10-14 17:50:29 -070065#define MSMFB_WRITEBACK_QUEUE_BUFFER _IOW(MSMFB_IOCTL_MAGIC, 153, \
66 struct msmfb_data)
67#define MSMFB_WRITEBACK_DEQUEUE_BUFFER _IOW(MSMFB_IOCTL_MAGIC, 154, \
68 struct msmfb_data)
69#define MSMFB_WRITEBACK_TERMINATE _IO(MSMFB_IOCTL_MAGIC, 155)
Pravin Tamkhane02a40682011-11-29 14:17:01 -080070#define MSMFB_MDP_PP _IOWR(MSMFB_IOCTL_MAGIC, 156, struct msmfb_mdp_pp)
Padmanabhan Komanduruf3b0c232012-07-27 20:46:06 +053071#define MSMFB_OVERLAY_VSYNC_CTRL _IOW(MSMFB_IOCTL_MAGIC, 160, unsigned int)
72#define MSMFB_VSYNC_CTRL _IOW(MSMFB_IOCTL_MAGIC, 161, unsigned int)
Ken Zhang5cf85c02012-08-23 19:32:52 -070073#define MSMFB_METADATA_SET _IOW(MSMFB_IOCTL_MAGIC, 162, struct msmfb_metadata)
Kalyan Thota9284a272012-11-02 20:55:30 +053074#define MSMFB_OVERLAY_COMMIT _IO(MSMFB_IOCTL_MAGIC, 163)
Ken Zhang5295d802012-11-07 18:33:16 -050075#define MSMFB_BUFFER_SYNC _IOW(MSMFB_IOCTL_MAGIC, 164, struct mdp_buf_sync)
Ken Zhang4e83b932012-12-02 21:15:47 -050076#define MSMFB_DISPLAY_COMMIT _IOW(MSMFB_IOCTL_MAGIC, 165, \
77 struct mdp_display_commit)
Ken Zhang420dd202013-01-08 14:28:20 -050078#define MSMFB_METADATA_GET _IOW(MSMFB_IOCTL_MAGIC, 166, struct msmfb_metadata)
Kuogee Hsieha77eca62012-09-13 13:22:04 -070079
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070080#define FB_TYPE_3D_PANEL 0x10101010
81#define MDP_IMGTYPE2_START 0x10000
82#define MSMFB_DRIVER_VERSION 0xF9E8D701
Daniel Walkerda6df072010-04-23 16:04:20 -070083
84enum {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070085 NOTIFY_UPDATE_START,
86 NOTIFY_UPDATE_STOP,
87};
88
89enum {
90 MDP_RGB_565, /* RGB 565 planer */
91 MDP_XRGB_8888, /* RGB 888 padded */
92 MDP_Y_CBCR_H2V2, /* Y and CbCr, pseudo planer w/ Cb is in MSB */
Padmanabhan Komandurud9f38b02012-02-02 18:57:03 +053093 MDP_Y_CBCR_H2V2_ADRENO,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070094 MDP_ARGB_8888, /* ARGB 888 */
95 MDP_RGB_888, /* RGB 888 planer */
96 MDP_Y_CRCB_H2V2, /* Y and CrCb, pseudo planer w/ Cr is in MSB */
97 MDP_YCRYCB_H2V1, /* YCrYCb interleave */
98 MDP_Y_CRCB_H2V1, /* Y and CrCb, pseduo planer w/ Cr is in MSB */
99 MDP_Y_CBCR_H2V1, /* Y and CrCb, pseduo planer w/ Cr is in MSB */
Adrian Salido-Morenoe55fa122012-05-29 15:36:08 -0700100 MDP_Y_CRCB_H1V2,
101 MDP_Y_CBCR_H1V2,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700102 MDP_RGBA_8888, /* ARGB 888 */
103 MDP_BGRA_8888, /* ABGR 888 */
104 MDP_RGBX_8888, /* RGBX 888 */
105 MDP_Y_CRCB_H2V2_TILE, /* Y and CrCb, pseudo planer tile */
106 MDP_Y_CBCR_H2V2_TILE, /* Y and CbCr, pseudo planer tile */
107 MDP_Y_CR_CB_H2V2, /* Y, Cr and Cb, planar */
Pradeep Jilagam9b4a6be2011-10-03 17:19:20 +0530108 MDP_Y_CR_CB_GH2V2, /* Y, Cr and Cb, planar aligned to Android YV12 */
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700109 MDP_Y_CB_CR_H2V2, /* Y, Cb and Cr, planar */
110 MDP_Y_CRCB_H1V1, /* Y and CrCb, pseduo planer w/ Cr is in MSB */
111 MDP_Y_CBCR_H1V1, /* Y and CbCr, pseduo planer w/ Cb is in MSB */
Adrian Salido-Moreno2b410482011-08-15 10:40:40 -0700112 MDP_YCRCB_H1V1, /* YCrCb interleave */
113 MDP_YCBCR_H1V1, /* YCbCr interleave */
Adrian Salido-Morenoe55fa122012-05-29 15:36:08 -0700114 MDP_BGR_565, /* BGR 565 planer */
Adrian Salido-Morenod559ef12012-07-12 20:16:14 -0700115 MDP_BGR_888, /* BGR 888 */
Adrian Salido-Moreno330c0bf2012-08-22 14:15:33 -0700116 MDP_Y_CBCR_H2V2_VENUS,
Pawan Kumar79854382013-02-14 15:27:12 +0530117 MDP_BGRX_8888, /* BGRX 8888 */
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700118 MDP_IMGTYPE_LIMIT,
kuogee hsieh1ce7e4c2012-01-13 14:05:54 -0800119 MDP_RGB_BORDERFILL, /* border fill pipe */
Adrian Salido-Morenoe55fa122012-05-29 15:36:08 -0700120 MDP_FB_FORMAT = MDP_IMGTYPE2_START, /* framebuffer format */
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700121 MDP_IMGTYPE_LIMIT2 /* Non valid image type after this enum */
Daniel Walkerda6df072010-04-23 16:04:20 -0700122};
123
124enum {
125 PMEM_IMG,
126 FB_IMG,
127};
128
Liyuan Lid9736632011-11-11 13:47:59 -0800129enum {
130 HSIC_HUE = 0,
131 HSIC_SAT,
132 HSIC_INT,
133 HSIC_CON,
134 NUM_HSIC_PARAM,
135};
136
Adrian Salido-Moreno1857f062012-05-29 17:57:28 -0700137#define MDSS_MDP_ROT_ONLY 0x80
Adrian Salido-Morenoe55fa122012-05-29 15:36:08 -0700138#define MDSS_MDP_RIGHT_MIXER 0x100
139
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700140/* mdp_blit_req flag values */
141#define MDP_ROT_NOP 0
142#define MDP_FLIP_LR 0x1
143#define MDP_FLIP_UD 0x2
144#define MDP_ROT_90 0x4
145#define MDP_ROT_180 (MDP_FLIP_UD|MDP_FLIP_LR)
146#define MDP_ROT_270 (MDP_ROT_90|MDP_FLIP_UD|MDP_FLIP_LR)
147#define MDP_DITHER 0x8
148#define MDP_BLUR 0x10
149#define MDP_BLEND_FG_PREMULT 0x20000
Padmanabhan Komandurudd10bf12012-10-17 20:27:33 +0530150#define MDP_IS_FG 0x40000
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700151#define MDP_DEINTERLACE 0x80000000
152#define MDP_SHARPENING 0x40000000
153#define MDP_NO_DMA_BARRIER_START 0x20000000
154#define MDP_NO_DMA_BARRIER_END 0x10000000
155#define MDP_NO_BLIT 0x08000000
156#define MDP_BLIT_WITH_DMA_BARRIERS 0x000
157#define MDP_BLIT_WITH_NO_DMA_BARRIERS \
158 (MDP_NO_DMA_BARRIER_START | MDP_NO_DMA_BARRIER_END)
159#define MDP_BLIT_SRC_GEM 0x04000000
160#define MDP_BLIT_DST_GEM 0x02000000
161#define MDP_BLIT_NON_CACHED 0x01000000
162#define MDP_OV_PIPE_SHARE 0x00800000
163#define MDP_DEINTERLACE_ODD 0x00400000
164#define MDP_OV_PLAY_NOWAIT 0x00200000
165#define MDP_SOURCE_ROTATED_90 0x00100000
Carl Vanderlipdfe57512012-07-23 12:34:47 -0700166#define MDP_OVERLAY_PP_CFG_EN 0x00080000
Ajay Singh Parmar4c7ccb32012-02-21 12:56:04 +0530167#define MDP_BACKEND_COMPOSITION 0x00040000
Nagamalleswararao Ganji880f8472011-12-14 03:52:28 -0800168#define MDP_BORDERFILL_SUPPORTED 0x00010000
169#define MDP_SECURE_OVERLAY_SESSION 0x00008000
170#define MDP_MEMORY_ID_TYPE_FB 0x00001000
Daniel Walkerda6df072010-04-23 16:04:20 -0700171
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700172#define MDP_TRANSP_NOP 0xffffffff
173#define MDP_ALPHA_NOP 0xff
174
175#define MDP_FB_PAGE_PROTECTION_NONCACHED (0)
176#define MDP_FB_PAGE_PROTECTION_WRITECOMBINE (1)
177#define MDP_FB_PAGE_PROTECTION_WRITETHROUGHCACHE (2)
178#define MDP_FB_PAGE_PROTECTION_WRITEBACKCACHE (3)
179#define MDP_FB_PAGE_PROTECTION_WRITEBACKWACACHE (4)
180/* Sentinel: Don't use! */
181#define MDP_FB_PAGE_PROTECTION_INVALID (5)
182/* Count of the number of MDP_FB_PAGE_PROTECTION_... values. */
183#define MDP_NUM_FB_PAGE_PROTECTION_VALUES (5)
Daniel Walkerda6df072010-04-23 16:04:20 -0700184
185struct mdp_rect {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700186 uint32_t x;
187 uint32_t y;
188 uint32_t w;
189 uint32_t h;
Daniel Walkerda6df072010-04-23 16:04:20 -0700190};
191
192struct mdp_img {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700193 uint32_t width;
194 uint32_t height;
195 uint32_t format;
196 uint32_t offset;
Daniel Walkerda6df072010-04-23 16:04:20 -0700197 int memory_id; /* the file descriptor */
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700198 uint32_t priv;
Daniel Walkerda6df072010-04-23 16:04:20 -0700199};
200
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700201/*
202 * {3x3} + {3} ccs matrix
203 */
204
205#define MDP_CCS_RGB2YUV 0
206#define MDP_CCS_YUV2RGB 1
207
208#define MDP_CCS_SIZE 9
209#define MDP_BV_SIZE 3
210
211struct mdp_ccs {
212 int direction; /* MDP_CCS_RGB2YUV or YUV2RGB */
213 uint16_t ccs[MDP_CCS_SIZE]; /* 3x3 color coefficients */
214 uint16_t bv[MDP_BV_SIZE]; /* 1x3 bias vector */
215};
216
Nagamalleswararao Ganji4b991722011-01-28 13:24:34 -0800217struct mdp_csc {
218 int id;
219 uint32_t csc_mv[9];
220 uint32_t csc_pre_bv[3];
221 uint32_t csc_post_bv[3];
222 uint32_t csc_pre_lv[6];
223 uint32_t csc_post_lv[6];
224};
225
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700226/* The version of the mdp_blit_req structure so that
227 * user applications can selectively decide which functionality
228 * to include
229 */
230
231#define MDP_BLIT_REQ_VERSION 2
232
Daniel Walkerda6df072010-04-23 16:04:20 -0700233struct mdp_blit_req {
234 struct mdp_img src;
235 struct mdp_img dst;
236 struct mdp_rect src_rect;
237 struct mdp_rect dst_rect;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700238 uint32_t alpha;
239 uint32_t transp_mask;
240 uint32_t flags;
241 int sharpening_strength; /* -127 <--> 127, default 64 */
Daniel Walkerda6df072010-04-23 16:04:20 -0700242};
243
244struct mdp_blit_req_list {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700245 uint32_t count;
Daniel Walkerda6df072010-04-23 16:04:20 -0700246 struct mdp_blit_req req[];
247};
248
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700249#define MSMFB_DATA_VERSION 2
250
251struct msmfb_data {
252 uint32_t offset;
253 int memory_id;
254 int id;
255 uint32_t flags;
256 uint32_t priv;
Vinay Kaliae1ba2702011-12-21 16:24:52 -0800257 uint32_t iova;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700258};
259
260#define MSMFB_NEW_REQUEST -1
261
262struct msmfb_overlay_data {
263 uint32_t id;
264 struct msmfb_data data;
265 uint32_t version_key;
266 struct msmfb_data plane1_data;
267 struct msmfb_data plane2_data;
Adrian Salido-Moreno1857f062012-05-29 17:57:28 -0700268 struct msmfb_data dst_data;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700269};
270
271struct msmfb_img {
272 uint32_t width;
273 uint32_t height;
274 uint32_t format;
275};
276
Vinay Kalia27020d12011-10-14 17:50:29 -0700277#define MSMFB_WRITEBACK_DEQUEUE_BLOCKING 0x1
278struct msmfb_writeback_data {
279 struct msmfb_data buf_info;
280 struct msmfb_img img;
281};
282
Ken Zhang77ce0192012-08-10 11:27:19 -0400283#define MDP_PP_OPS_ENABLE 0x1
Carl Vanderlipdfe57512012-07-23 12:34:47 -0700284#define MDP_PP_OPS_READ 0x2
285#define MDP_PP_OPS_WRITE 0x4
Ken Zhang77ce0192012-08-10 11:27:19 -0400286#define MDP_PP_OPS_DISABLE 0x8
Ken Zhang824758e2012-08-15 11:02:21 -0400287#define MDP_PP_IGC_FLAG_ROM0 0x10
288#define MDP_PP_IGC_FLAG_ROM1 0x20
Carl Vanderlipdfe57512012-07-23 12:34:47 -0700289
Ping Li8231ae42013-01-09 20:39:25 -0500290#define MDSS_PP_DSPP_CFG 0x0000
291#define MDSS_PP_SSPP_CFG 0x4000
292#define MDSS_PP_LM_CFG 0x8000
293#define MDSS_PP_WB_CFG 0xC000
294
295#define MDSS_PP_LOCATION_MASK 0xC000
296#define MDSS_PP_LOGICAL_MASK 0x3FFF
297
298#define PP_LOCAT(var) ((var) & MDSS_PP_LOCATION_MASK)
299#define PP_BLOCK(var) ((var) & MDSS_PP_LOGICAL_MASK)
300
301
Carl Vanderlipdfe57512012-07-23 12:34:47 -0700302struct mdp_qseed_cfg {
303 uint32_t table_num;
304 uint32_t ops;
305 uint32_t len;
306 uint32_t *data;
307};
308
Ping Li87cca832013-01-30 18:27:52 -0500309struct mdp_sharp_cfg {
310 uint32_t flags;
311 uint32_t strength;
312 uint32_t edge_thr;
313 uint32_t smooth_thr;
314 uint32_t noise_thr;
315};
316
Carl Vanderlipdfe57512012-07-23 12:34:47 -0700317struct mdp_qseed_cfg_data {
318 uint32_t block;
319 struct mdp_qseed_cfg qseed_data;
320};
321
Carl Vanderlip94d9b782013-01-16 12:13:52 -0800322#define MDP_OVERLAY_PP_CSC_CFG 0x1
323#define MDP_OVERLAY_PP_QSEED_CFG 0x2
324#define MDP_OVERLAY_PP_PA_CFG 0x4
325#define MDP_OVERLAY_PP_IGC_CFG 0x8
Ping Li87cca832013-01-30 18:27:52 -0500326#define MDP_OVERLAY_PP_SHARP_CFG 0x10
Carl Vanderlipdfe57512012-07-23 12:34:47 -0700327
328#define MDP_CSC_FLAG_ENABLE 0x1
329#define MDP_CSC_FLAG_YUV_IN 0x2
330#define MDP_CSC_FLAG_YUV_OUT 0x4
331
332struct mdp_csc_cfg {
333 /* flags for enable CSC, toggling RGB,YUV input/output */
334 uint32_t flags;
335 uint32_t csc_mv[9];
336 uint32_t csc_pre_bv[3];
337 uint32_t csc_post_bv[3];
338 uint32_t csc_pre_lv[6];
339 uint32_t csc_post_lv[6];
340};
341
342struct mdp_csc_cfg_data {
343 uint32_t block;
344 struct mdp_csc_cfg csc_data;
345};
346
Ping Li58229242012-11-30 14:05:43 -0500347struct mdp_pa_cfg {
348 uint32_t flags;
349 uint32_t hue_adj;
350 uint32_t sat_adj;
351 uint32_t val_adj;
352 uint32_t cont_adj;
353};
354
Carl Vanderlip94d9b782013-01-16 12:13:52 -0800355struct mdp_igc_lut_data {
356 uint32_t block;
357 uint32_t len, ops;
358 uint32_t *c0_c1_data;
359 uint32_t *c2_data;
360};
361
Carl Vanderlipdfe57512012-07-23 12:34:47 -0700362struct mdp_overlay_pp_params {
363 uint32_t config_ops;
364 struct mdp_csc_cfg csc_cfg;
365 struct mdp_qseed_cfg qseed_cfg[2];
Ping Li58229242012-11-30 14:05:43 -0500366 struct mdp_pa_cfg pa_cfg;
Carl Vanderlip94d9b782013-01-16 12:13:52 -0800367 struct mdp_igc_lut_data igc_cfg;
Ping Li87cca832013-01-30 18:27:52 -0500368 struct mdp_sharp_cfg sharp_cfg;
Carl Vanderlipdfe57512012-07-23 12:34:47 -0700369};
370
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700371struct mdp_overlay {
372 struct msmfb_img src;
373 struct mdp_rect src_rect;
374 struct mdp_rect dst_rect;
375 uint32_t z_order; /* stage number */
376 uint32_t is_fg; /* control alpha & transp */
377 uint32_t alpha;
378 uint32_t transp_mask;
379 uint32_t flags;
380 uint32_t id;
381 uint32_t user_data[8];
Carl Vanderlipdfe57512012-07-23 12:34:47 -0700382 struct mdp_overlay_pp_params overlay_pp_cfg;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700383};
384
385struct msmfb_overlay_3d {
386 uint32_t is_3d;
387 uint32_t width;
388 uint32_t height;
389};
390
391
392struct msmfb_overlay_blt {
393 uint32_t enable;
394 uint32_t offset;
395 uint32_t width;
396 uint32_t height;
397 uint32_t bpp;
398};
399
400struct mdp_histogram {
401 uint32_t frame_cnt;
402 uint32_t bin_cnt;
403 uint32_t *r;
404 uint32_t *g;
405 uint32_t *b;
406};
407
Pravin Tamkhane02a40682011-11-29 14:17:01 -0800408
409/*
410
Ken Zhang6a431632012-08-08 16:46:22 -0400411 mdp_block_type defines the identifiers for pipes in MDP 4.3 and up
Pravin Tamkhane02a40682011-11-29 14:17:01 -0800412
413 MDP_BLOCK_RESERVED is provided for backward compatibility and is
414 deprecated. It corresponds to DMA_P. So MDP_BLOCK_DMA_P should be used
415 instead.
416
Ken Zhang6a431632012-08-08 16:46:22 -0400417 MDP_LOGICAL_BLOCK_DISP_0 identifies the display pipe which fb0 uses,
418 same for others.
419
Pravin Tamkhane02a40682011-11-29 14:17:01 -0800420*/
421
422enum {
423 MDP_BLOCK_RESERVED = 0,
424 MDP_BLOCK_OVERLAY_0,
425 MDP_BLOCK_OVERLAY_1,
426 MDP_BLOCK_VG_1,
427 MDP_BLOCK_VG_2,
428 MDP_BLOCK_RGB_1,
429 MDP_BLOCK_RGB_2,
430 MDP_BLOCK_DMA_P,
431 MDP_BLOCK_DMA_S,
432 MDP_BLOCK_DMA_E,
Pravin Tamkhaneb18c9e22012-04-13 18:29:34 -0700433 MDP_BLOCK_OVERLAY_2,
Ken Zhang6a431632012-08-08 16:46:22 -0400434 MDP_LOGICAL_BLOCK_DISP_0 = 0x1000,
435 MDP_LOGICAL_BLOCK_DISP_1,
436 MDP_LOGICAL_BLOCK_DISP_2,
Pravin Tamkhane02a40682011-11-29 14:17:01 -0800437 MDP_BLOCK_MAX,
438};
439
Carl Vanderlipba093a22011-11-22 13:59:59 -0800440/*
441 * mdp_histogram_start_req is used to provide the parameters for
442 * histogram start request
443 */
444
445struct mdp_histogram_start_req {
446 uint32_t block;
447 uint8_t frame_cnt;
448 uint8_t bit_mask;
Carl Vanderlip16316322012-10-08 16:47:34 -0700449 uint16_t num_bins;
Carl Vanderlipba093a22011-11-22 13:59:59 -0800450};
451
452/*
453 * mdp_histogram_data is used to return the histogram data, once
454 * the histogram is done/stopped/cance
455 */
456
457struct mdp_histogram_data {
458 uint32_t block;
Ken Zhang0f523bd2012-08-23 11:14:03 -0400459 uint32_t bin_cnt;
Carl Vanderlipba093a22011-11-22 13:59:59 -0800460 uint32_t *c0;
461 uint32_t *c1;
462 uint32_t *c2;
Carl Vanderlip7b8b6402012-03-01 10:58:03 -0800463 uint32_t *extra_info;
Carl Vanderlipba093a22011-11-22 13:59:59 -0800464};
465
Pravin Tamkhane02a40682011-11-29 14:17:01 -0800466struct mdp_pcc_coeff {
467 uint32_t c, r, g, b, rr, gg, bb, rg, gb, rb, rgb_0, rgb_1;
468};
469
470struct mdp_pcc_cfg_data {
471 uint32_t block;
472 uint32_t ops;
473 struct mdp_pcc_coeff r, g, b;
474};
475
Ken Zhangbf5fb4c2012-08-19 14:41:01 -0400476#define MDP_GAMUT_TABLE_NUM 8
477
Pravin Tamkhane02a40682011-11-29 14:17:01 -0800478enum {
479 mdp_lut_igc,
480 mdp_lut_pgc,
481 mdp_lut_hist,
482 mdp_lut_max,
483};
484
Pravin Tamkhane02a40682011-11-29 14:17:01 -0800485struct mdp_ar_gc_lut_data {
486 uint32_t x_start;
487 uint32_t slope;
488 uint32_t offset;
489};
490
491struct mdp_pgc_lut_data {
492 uint32_t block;
493 uint32_t flags;
494 uint8_t num_r_stages;
495 uint8_t num_g_stages;
496 uint8_t num_b_stages;
497 struct mdp_ar_gc_lut_data *r_data;
498 struct mdp_ar_gc_lut_data *g_data;
499 struct mdp_ar_gc_lut_data *b_data;
500};
501
502
503struct mdp_hist_lut_data {
504 uint32_t block;
505 uint32_t ops;
506 uint32_t len;
507 uint32_t *data;
508};
509
Pravin Tamkhane02a40682011-11-29 14:17:01 -0800510struct mdp_lut_cfg_data {
511 uint32_t lut_type;
512 union {
513 struct mdp_igc_lut_data igc_lut_data;
514 struct mdp_pgc_lut_data pgc_lut_data;
515 struct mdp_hist_lut_data hist_lut_data;
516 } data;
517};
518
Carl Vanderlipf0fd8e72012-05-03 15:08:20 -0700519struct mdp_bl_scale_data {
520 uint32_t min_lvl;
521 uint32_t scale;
522};
Pravin Tamkhane67726da2012-04-13 11:59:11 -0700523
Ken Zhang77ce0192012-08-10 11:27:19 -0400524struct mdp_pa_cfg_data {
525 uint32_t block;
Ping Li58229242012-11-30 14:05:43 -0500526 struct mdp_pa_cfg pa_data;
Ken Zhang77ce0192012-08-10 11:27:19 -0400527};
528
Ken Zhang7fb85772012-08-18 14:51:33 -0400529struct mdp_dither_cfg_data {
530 uint32_t block;
531 uint32_t flags;
532 uint32_t g_y_depth;
533 uint32_t r_cr_depth;
534 uint32_t b_cb_depth;
535};
536
Ken Zhangbf5fb4c2012-08-19 14:41:01 -0400537struct mdp_gamut_cfg_data {
538 uint32_t block;
539 uint32_t flags;
540 uint32_t gamut_first;
541 uint32_t tbl_size[MDP_GAMUT_TABLE_NUM];
542 uint16_t *r_tbl[MDP_GAMUT_TABLE_NUM];
543 uint16_t *g_tbl[MDP_GAMUT_TABLE_NUM];
544 uint16_t *b_tbl[MDP_GAMUT_TABLE_NUM];
545};
546
Carl Vanderlipe8ed5ec2012-09-28 16:04:10 -0700547struct mdp_calib_config_data {
548 uint32_t ops;
549 uint32_t addr;
550 uint32_t data;
551};
552
Pravin Tamkhane02a40682011-11-29 14:17:01 -0800553enum {
554 mdp_op_pcc_cfg,
555 mdp_op_csc_cfg,
556 mdp_op_lut_cfg,
Pravin Tamkhane67726da2012-04-13 11:59:11 -0700557 mdp_op_qseed_cfg,
Carl Vanderlipf0fd8e72012-05-03 15:08:20 -0700558 mdp_bl_scale_cfg,
Ken Zhang77ce0192012-08-10 11:27:19 -0400559 mdp_op_pa_cfg,
Ken Zhang7fb85772012-08-18 14:51:33 -0400560 mdp_op_dither_cfg,
Ken Zhangbf5fb4c2012-08-19 14:41:01 -0400561 mdp_op_gamut_cfg,
Carl Vanderlipe8ed5ec2012-09-28 16:04:10 -0700562 mdp_op_calib_cfg,
Pravin Tamkhane02a40682011-11-29 14:17:01 -0800563 mdp_op_max,
564};
565
566struct msmfb_mdp_pp {
567 uint32_t op;
568 union {
569 struct mdp_pcc_cfg_data pcc_cfg_data;
570 struct mdp_csc_cfg_data csc_cfg_data;
571 struct mdp_lut_cfg_data lut_cfg_data;
Pravin Tamkhane67726da2012-04-13 11:59:11 -0700572 struct mdp_qseed_cfg_data qseed_cfg_data;
Carl Vanderlipf0fd8e72012-05-03 15:08:20 -0700573 struct mdp_bl_scale_data bl_scale_data;
Ken Zhang77ce0192012-08-10 11:27:19 -0400574 struct mdp_pa_cfg_data pa_cfg_data;
Ken Zhang7fb85772012-08-18 14:51:33 -0400575 struct mdp_dither_cfg_data dither_cfg_data;
Ken Zhangbf5fb4c2012-08-19 14:41:01 -0400576 struct mdp_gamut_cfg_data gamut_cfg_data;
Carl Vanderlipe8ed5ec2012-09-28 16:04:10 -0700577 struct mdp_calib_config_data calib_cfg;
Pravin Tamkhane02a40682011-11-29 14:17:01 -0800578 } data;
579};
580
Manoj Raoa8e39d92013-02-16 08:47:21 -0800581#define FB_METADATA_VIDEO_INFO_CODE_SUPPORT 1
Ken Zhang5cf85c02012-08-23 19:32:52 -0700582enum {
583 metadata_op_none,
584 metadata_op_base_blend,
Ken Zhang420dd202013-01-08 14:28:20 -0500585 metadata_op_frame_rate,
Manoj Raoa8e39d92013-02-16 08:47:21 -0800586 metadata_op_vic,
Ken Zhang5cf85c02012-08-23 19:32:52 -0700587 metadata_op_max
588};
Pravin Tamkhane02a40682011-11-29 14:17:01 -0800589
Ken Zhang5cf85c02012-08-23 19:32:52 -0700590struct mdp_blend_cfg {
591 uint32_t is_premultiplied;
592};
593
594struct msmfb_metadata {
595 uint32_t op;
596 uint32_t flags;
597 union {
598 struct mdp_blend_cfg blend_cfg;
Ken Zhang420dd202013-01-08 14:28:20 -0500599 uint32_t panel_frame_rate;
Manoj Raoa8e39d92013-02-16 08:47:21 -0800600 uint32_t video_info_code;
Ken Zhang5cf85c02012-08-23 19:32:52 -0700601 } data;
602};
Ken Zhang5295d802012-11-07 18:33:16 -0500603
604#define MDP_MAX_FENCE_FD 10
605#define MDP_BUF_SYNC_FLAG_WAIT 1
606
607struct mdp_buf_sync {
608 uint32_t flags;
609 uint32_t acq_fen_fd_cnt;
610 int *acq_fen_fd;
611 int *rel_fen_fd;
612};
613
Ken Zhang4e83b932012-12-02 21:15:47 -0500614#define MDP_DISPLAY_COMMIT_OVERLAY 1
615
616struct mdp_display_commit {
617 uint32_t flags;
618 uint32_t wait_for_finish;
619 struct fb_var_screeninfo var;
620};
621
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700622struct mdp_page_protection {
623 uint32_t page_protection;
624};
625
kuogee hsieh405dc302011-07-21 15:06:59 -0700626
627struct mdp_mixer_info {
628 int pndx;
629 int pnum;
630 int ptype;
631 int mixer_num;
632 int z_order;
633};
634
635#define MAX_PIPE_PER_MIXER 4
636
637struct msmfb_mixer_info_req {
638 int mixer_num;
639 int cnt;
640 struct mdp_mixer_info info[MAX_PIPE_PER_MIXER];
641};
642
Ravishangar Kalyanam6bc448a2012-03-14 11:31:52 -0700643enum {
644 DISPLAY_SUBSYSTEM_ID,
645 ROTATOR_SUBSYSTEM_ID,
646};
kuogee hsieh405dc302011-07-21 15:06:59 -0700647
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700648#ifdef __KERNEL__
Adrian Salido-Moreno00baebf2012-08-03 10:23:20 -0700649int msm_fb_get_iommu_domain(void);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700650/* get the framebuffer physical address information */
Ravishangar Kalyanam6bc448a2012-03-14 11:31:52 -0700651int get_fb_phys_info(unsigned long *start, unsigned long *len, int fb_num,
652 int subsys_id);
Vinay Kalia27020d12011-10-14 17:50:29 -0700653struct fb_info *msm_fb_get_writeback_fb(void);
654int msm_fb_writeback_init(struct fb_info *info);
Vinay Kaliae1ba2702011-12-21 16:24:52 -0800655int msm_fb_writeback_start(struct fb_info *info);
Vinay Kalia27020d12011-10-14 17:50:29 -0700656int msm_fb_writeback_queue_buffer(struct fb_info *info,
657 struct msmfb_data *data);
658int msm_fb_writeback_dequeue_buffer(struct fb_info *info,
659 struct msmfb_data *data);
Vinay Kaliae1ba2702011-12-21 16:24:52 -0800660int msm_fb_writeback_stop(struct fb_info *info);
Vinay Kalia27020d12011-10-14 17:50:29 -0700661int msm_fb_writeback_terminate(struct fb_info *info);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700662#endif
663
664#endif /*_MSM_MDP_H_*/