blob: 24ce1f805cd77b49a2849503521864a467dd3128 [file] [log] [blame]
Linus Torvalds1da177e2005-04-16 15:20:36 -07001/*
Linus Torvalds1da177e2005-04-16 15:20:36 -07002 * Support for IDE interfaces on PowerMacs.
Bartlomiej Zolnierkiewicz58f189f2008-02-01 23:09:33 +01003 *
Linus Torvalds1da177e2005-04-16 15:20:36 -07004 * These IDE interfaces are memory-mapped and have a DBDMA channel
5 * for doing DMA.
6 *
7 * Copyright (C) 1998-2003 Paul Mackerras & Ben. Herrenschmidt
Bartlomiej Zolnierkiewicz8a972062008-07-16 20:33:38 +02008 * Copyright (C) 2007-2008 Bartlomiej Zolnierkiewicz
Linus Torvalds1da177e2005-04-16 15:20:36 -07009 *
10 * This program is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License
12 * as published by the Free Software Foundation; either version
13 * 2 of the License, or (at your option) any later version.
14 *
15 * Some code taken from drivers/ide/ide-dma.c:
16 *
17 * Copyright (c) 1995-1998 Mark Lord
18 *
19 * TODO: - Use pre-calculated (kauai) timing tables all the time and
20 * get rid of the "rounded" tables used previously, so we have the
21 * same table format for all controllers and can then just have one
22 * big table
23 *
24 */
Linus Torvalds1da177e2005-04-16 15:20:36 -070025#include <linux/types.h>
26#include <linux/kernel.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070027#include <linux/init.h>
28#include <linux/delay.h>
29#include <linux/ide.h>
30#include <linux/notifier.h>
31#include <linux/reboot.h>
32#include <linux/pci.h>
33#include <linux/adb.h>
34#include <linux/pmu.h>
35#include <linux/scatterlist.h>
36
37#include <asm/prom.h>
38#include <asm/io.h>
39#include <asm/dbdma.h>
40#include <asm/ide.h>
41#include <asm/pci-bridge.h>
42#include <asm/machdep.h>
43#include <asm/pmac_feature.h>
44#include <asm/sections.h>
45#include <asm/irq.h>
46
47#ifndef CONFIG_PPC64
48#include <asm/mediabay.h>
49#endif
50
Bartlomiej Zolnierkiewiczb36ba532008-07-23 19:55:49 +020051#define DRV_NAME "ide-pmac"
52
Linus Torvalds1da177e2005-04-16 15:20:36 -070053#undef IDE_PMAC_DEBUG
54
55#define DMA_WAIT_TIMEOUT 50
56
57typedef struct pmac_ide_hwif {
58 unsigned long regbase;
59 int irq;
60 int kind;
61 int aapl_bus_id;
Linus Torvalds1da177e2005-04-16 15:20:36 -070062 unsigned mediabay : 1;
63 unsigned broken_dma : 1;
64 unsigned broken_dma_warn : 1;
65 struct device_node* node;
66 struct macio_dev *mdev;
67 u32 timings[4];
68 volatile u32 __iomem * *kauai_fcr;
Linus Torvalds1da177e2005-04-16 15:20:36 -070069 /* Those fields are duplicating what is in hwif. We currently
70 * can't use the hwif ones because of some assumptions that are
71 * beeing done by the generic code about the kind of dma controller
72 * and format of the dma table. This will have to be fixed though.
73 */
74 volatile struct dbdma_regs __iomem * dma_regs;
75 struct dbdma_cmd* dma_table_cpu;
Linus Torvalds1da177e2005-04-16 15:20:36 -070076} pmac_ide_hwif_t;
77
Linus Torvalds1da177e2005-04-16 15:20:36 -070078enum {
79 controller_ohare, /* OHare based */
80 controller_heathrow, /* Heathrow/Paddington */
81 controller_kl_ata3, /* KeyLargo ATA-3 */
82 controller_kl_ata4, /* KeyLargo ATA-4 */
83 controller_un_ata6, /* UniNorth2 ATA-6 */
84 controller_k2_ata6, /* K2 ATA-6 */
85 controller_sh_ata6, /* Shasta ATA-6 */
86};
87
88static const char* model_name[] = {
89 "OHare ATA", /* OHare based */
90 "Heathrow ATA", /* Heathrow/Paddington */
91 "KeyLargo ATA-3", /* KeyLargo ATA-3 (MDMA only) */
92 "KeyLargo ATA-4", /* KeyLargo ATA-4 (UDMA/66) */
93 "UniNorth ATA-6", /* UniNorth2 ATA-6 (UDMA/100) */
94 "K2 ATA-6", /* K2 ATA-6 (UDMA/100) */
95 "Shasta ATA-6", /* Shasta ATA-6 (UDMA/133) */
96};
97
98/*
99 * Extra registers, both 32-bit little-endian
100 */
101#define IDE_TIMING_CONFIG 0x200
102#define IDE_INTERRUPT 0x300
103
104/* Kauai (U2) ATA has different register setup */
105#define IDE_KAUAI_PIO_CONFIG 0x200
106#define IDE_KAUAI_ULTRA_CONFIG 0x210
107#define IDE_KAUAI_POLL_CONFIG 0x220
108
109/*
110 * Timing configuration register definitions
111 */
112
113/* Number of IDE_SYSCLK_NS ticks, argument is in nanoseconds */
114#define SYSCLK_TICKS(t) (((t) + IDE_SYSCLK_NS - 1) / IDE_SYSCLK_NS)
115#define SYSCLK_TICKS_66(t) (((t) + IDE_SYSCLK_66_NS - 1) / IDE_SYSCLK_66_NS)
116#define IDE_SYSCLK_NS 30 /* 33Mhz cell */
117#define IDE_SYSCLK_66_NS 15 /* 66Mhz cell */
118
119/* 133Mhz cell, found in shasta.
120 * See comments about 100 Mhz Uninorth 2...
121 * Note that PIO_MASK and MDMA_MASK seem to overlap
122 */
123#define TR_133_PIOREG_PIO_MASK 0xff000fff
124#define TR_133_PIOREG_MDMA_MASK 0x00fff800
125#define TR_133_UDMAREG_UDMA_MASK 0x0003ffff
126#define TR_133_UDMAREG_UDMA_EN 0x00000001
127
128/* 100Mhz cell, found in Uninorth 2. I don't have much infos about
129 * this one yet, it appears as a pci device (106b/0033) on uninorth
130 * internal PCI bus and it's clock is controlled like gem or fw. It
131 * appears to be an evolution of keylargo ATA4 with a timing register
132 * extended to 2 32bits registers and a similar DBDMA channel. Other
133 * registers seem to exist but I can't tell much about them.
134 *
135 * So far, I'm using pre-calculated tables for this extracted from
136 * the values used by the MacOS X driver.
137 *
138 * The "PIO" register controls PIO and MDMA timings, the "ULTRA"
139 * register controls the UDMA timings. At least, it seems bit 0
140 * of this one enables UDMA vs. MDMA, and bits 4..7 are the
141 * cycle time in units of 10ns. Bits 8..15 are used by I don't
142 * know their meaning yet
143 */
144#define TR_100_PIOREG_PIO_MASK 0xff000fff
145#define TR_100_PIOREG_MDMA_MASK 0x00fff000
146#define TR_100_UDMAREG_UDMA_MASK 0x0000ffff
147#define TR_100_UDMAREG_UDMA_EN 0x00000001
148
149
150/* 66Mhz cell, found in KeyLargo. Can do ultra mode 0 to 2 on
151 * 40 connector cable and to 4 on 80 connector one.
152 * Clock unit is 15ns (66Mhz)
153 *
154 * 3 Values can be programmed:
155 * - Write data setup, which appears to match the cycle time. They
156 * also call it DIOW setup.
157 * - Ready to pause time (from spec)
158 * - Address setup. That one is weird. I don't see where exactly
159 * it fits in UDMA cycles, I got it's name from an obscure piece
160 * of commented out code in Darwin. They leave it to 0, we do as
161 * well, despite a comment that would lead to think it has a
162 * min value of 45ns.
163 * Apple also add 60ns to the write data setup (or cycle time ?) on
164 * reads.
165 */
166#define TR_66_UDMA_MASK 0xfff00000
167#define TR_66_UDMA_EN 0x00100000 /* Enable Ultra mode for DMA */
168#define TR_66_UDMA_ADDRSETUP_MASK 0xe0000000 /* Address setup */
169#define TR_66_UDMA_ADDRSETUP_SHIFT 29
170#define TR_66_UDMA_RDY2PAUS_MASK 0x1e000000 /* Ready 2 pause time */
171#define TR_66_UDMA_RDY2PAUS_SHIFT 25
172#define TR_66_UDMA_WRDATASETUP_MASK 0x01e00000 /* Write data setup time */
173#define TR_66_UDMA_WRDATASETUP_SHIFT 21
174#define TR_66_MDMA_MASK 0x000ffc00
175#define TR_66_MDMA_RECOVERY_MASK 0x000f8000
176#define TR_66_MDMA_RECOVERY_SHIFT 15
177#define TR_66_MDMA_ACCESS_MASK 0x00007c00
178#define TR_66_MDMA_ACCESS_SHIFT 10
179#define TR_66_PIO_MASK 0x000003ff
180#define TR_66_PIO_RECOVERY_MASK 0x000003e0
181#define TR_66_PIO_RECOVERY_SHIFT 5
182#define TR_66_PIO_ACCESS_MASK 0x0000001f
183#define TR_66_PIO_ACCESS_SHIFT 0
184
185/* 33Mhz cell, found in OHare, Heathrow (& Paddington) and KeyLargo
186 * Can do pio & mdma modes, clock unit is 30ns (33Mhz)
187 *
188 * The access time and recovery time can be programmed. Some older
189 * Darwin code base limit OHare to 150ns cycle time. I decided to do
190 * the same here fore safety against broken old hardware ;)
191 * The HalfTick bit, when set, adds half a clock (15ns) to the access
192 * time and removes one from recovery. It's not supported on KeyLargo
193 * implementation afaik. The E bit appears to be set for PIO mode 0 and
194 * is used to reach long timings used in this mode.
195 */
196#define TR_33_MDMA_MASK 0x003ff800
197#define TR_33_MDMA_RECOVERY_MASK 0x001f0000
198#define TR_33_MDMA_RECOVERY_SHIFT 16
199#define TR_33_MDMA_ACCESS_MASK 0x0000f800
200#define TR_33_MDMA_ACCESS_SHIFT 11
201#define TR_33_MDMA_HALFTICK 0x00200000
202#define TR_33_PIO_MASK 0x000007ff
203#define TR_33_PIO_E 0x00000400
204#define TR_33_PIO_RECOVERY_MASK 0x000003e0
205#define TR_33_PIO_RECOVERY_SHIFT 5
206#define TR_33_PIO_ACCESS_MASK 0x0000001f
207#define TR_33_PIO_ACCESS_SHIFT 0
208
209/*
210 * Interrupt register definitions
211 */
212#define IDE_INTR_DMA 0x80000000
213#define IDE_INTR_DEVICE 0x40000000
214
215/*
216 * FCR Register on Kauai. Not sure what bit 0x4 is ...
217 */
218#define KAUAI_FCR_UATA_MAGIC 0x00000004
219#define KAUAI_FCR_UATA_RESET_N 0x00000002
220#define KAUAI_FCR_UATA_ENABLE 0x00000001
221
Linus Torvalds1da177e2005-04-16 15:20:36 -0700222/* Rounded Multiword DMA timings
223 *
224 * I gave up finding a generic formula for all controller
225 * types and instead, built tables based on timing values
226 * used by Apple in Darwin's implementation.
227 */
228struct mdma_timings_t {
229 int accessTime;
230 int recoveryTime;
231 int cycleTime;
232};
233
Jon Loeligeraacaf9b2005-09-17 10:36:54 -0500234struct mdma_timings_t mdma_timings_33[] =
Linus Torvalds1da177e2005-04-16 15:20:36 -0700235{
236 { 240, 240, 480 },
237 { 180, 180, 360 },
238 { 135, 135, 270 },
239 { 120, 120, 240 },
240 { 105, 105, 210 },
241 { 90, 90, 180 },
242 { 75, 75, 150 },
243 { 75, 45, 120 },
244 { 0, 0, 0 }
245};
246
Jon Loeligeraacaf9b2005-09-17 10:36:54 -0500247struct mdma_timings_t mdma_timings_33k[] =
Linus Torvalds1da177e2005-04-16 15:20:36 -0700248{
249 { 240, 240, 480 },
250 { 180, 180, 360 },
251 { 150, 150, 300 },
252 { 120, 120, 240 },
253 { 90, 120, 210 },
254 { 90, 90, 180 },
255 { 90, 60, 150 },
256 { 90, 30, 120 },
257 { 0, 0, 0 }
258};
259
Jon Loeligeraacaf9b2005-09-17 10:36:54 -0500260struct mdma_timings_t mdma_timings_66[] =
Linus Torvalds1da177e2005-04-16 15:20:36 -0700261{
262 { 240, 240, 480 },
263 { 180, 180, 360 },
264 { 135, 135, 270 },
265 { 120, 120, 240 },
266 { 105, 105, 210 },
267 { 90, 90, 180 },
268 { 90, 75, 165 },
269 { 75, 45, 120 },
270 { 0, 0, 0 }
271};
272
273/* KeyLargo ATA-4 Ultra DMA timings (rounded) */
274struct {
275 int addrSetup; /* ??? */
276 int rdy2pause;
277 int wrDataSetup;
Jon Loeligeraacaf9b2005-09-17 10:36:54 -0500278} kl66_udma_timings[] =
Linus Torvalds1da177e2005-04-16 15:20:36 -0700279{
280 { 0, 180, 120 }, /* Mode 0 */
281 { 0, 150, 90 }, /* 1 */
282 { 0, 120, 60 }, /* 2 */
283 { 0, 90, 45 }, /* 3 */
284 { 0, 90, 30 } /* 4 */
285};
286
287/* UniNorth 2 ATA/100 timings */
288struct kauai_timing {
289 int cycle_time;
290 u32 timing_reg;
291};
292
Jon Loeligeraacaf9b2005-09-17 10:36:54 -0500293static struct kauai_timing kauai_pio_timings[] =
Linus Torvalds1da177e2005-04-16 15:20:36 -0700294{
295 { 930 , 0x08000fff },
296 { 600 , 0x08000a92 },
297 { 383 , 0x0800060f },
298 { 360 , 0x08000492 },
299 { 330 , 0x0800048f },
300 { 300 , 0x080003cf },
301 { 270 , 0x080003cc },
302 { 240 , 0x0800038b },
303 { 239 , 0x0800030c },
304 { 180 , 0x05000249 },
Bartlomiej Zolnierkiewiczc15d5d42007-10-11 23:54:01 +0200305 { 120 , 0x04000148 },
306 { 0 , 0 },
Linus Torvalds1da177e2005-04-16 15:20:36 -0700307};
308
Jon Loeligeraacaf9b2005-09-17 10:36:54 -0500309static struct kauai_timing kauai_mdma_timings[] =
Linus Torvalds1da177e2005-04-16 15:20:36 -0700310{
311 { 1260 , 0x00fff000 },
312 { 480 , 0x00618000 },
313 { 360 , 0x00492000 },
314 { 270 , 0x0038e000 },
315 { 240 , 0x0030c000 },
316 { 210 , 0x002cb000 },
317 { 180 , 0x00249000 },
318 { 150 , 0x00209000 },
319 { 120 , 0x00148000 },
320 { 0 , 0 },
321};
322
Jon Loeligeraacaf9b2005-09-17 10:36:54 -0500323static struct kauai_timing kauai_udma_timings[] =
Linus Torvalds1da177e2005-04-16 15:20:36 -0700324{
325 { 120 , 0x000070c0 },
326 { 90 , 0x00005d80 },
327 { 60 , 0x00004a60 },
328 { 45 , 0x00003a50 },
329 { 30 , 0x00002a30 },
330 { 20 , 0x00002921 },
331 { 0 , 0 },
332};
333
Jon Loeligeraacaf9b2005-09-17 10:36:54 -0500334static struct kauai_timing shasta_pio_timings[] =
Linus Torvalds1da177e2005-04-16 15:20:36 -0700335{
336 { 930 , 0x08000fff },
337 { 600 , 0x0A000c97 },
338 { 383 , 0x07000712 },
339 { 360 , 0x040003cd },
340 { 330 , 0x040003cd },
341 { 300 , 0x040003cd },
342 { 270 , 0x040003cd },
343 { 240 , 0x040003cd },
344 { 239 , 0x040003cd },
345 { 180 , 0x0400028b },
Bartlomiej Zolnierkiewiczc15d5d42007-10-11 23:54:01 +0200346 { 120 , 0x0400010a },
347 { 0 , 0 },
Linus Torvalds1da177e2005-04-16 15:20:36 -0700348};
349
Jon Loeligeraacaf9b2005-09-17 10:36:54 -0500350static struct kauai_timing shasta_mdma_timings[] =
Linus Torvalds1da177e2005-04-16 15:20:36 -0700351{
352 { 1260 , 0x00fff000 },
353 { 480 , 0x00820800 },
354 { 360 , 0x00820800 },
355 { 270 , 0x00820800 },
356 { 240 , 0x00820800 },
357 { 210 , 0x00820800 },
358 { 180 , 0x00820800 },
359 { 150 , 0x0028b000 },
360 { 120 , 0x001ca000 },
361 { 0 , 0 },
362};
363
Jon Loeligeraacaf9b2005-09-17 10:36:54 -0500364static struct kauai_timing shasta_udma133_timings[] =
Linus Torvalds1da177e2005-04-16 15:20:36 -0700365{
366 { 120 , 0x00035901, },
367 { 90 , 0x000348b1, },
368 { 60 , 0x00033881, },
369 { 45 , 0x00033861, },
370 { 30 , 0x00033841, },
371 { 20 , 0x00033031, },
372 { 15 , 0x00033021, },
373 { 0 , 0 },
374};
375
376
377static inline u32
378kauai_lookup_timing(struct kauai_timing* table, int cycle_time)
379{
380 int i;
381
382 for (i=0; table[i].cycle_time; i++)
383 if (cycle_time > table[i+1].cycle_time)
384 return table[i].timing_reg;
Bartlomiej Zolnierkiewicz90a87ea2007-10-13 17:47:48 +0200385 BUG();
Linus Torvalds1da177e2005-04-16 15:20:36 -0700386 return 0;
387}
388
389/* allow up to 256 DBDMA commands per xfer */
390#define MAX_DCMDS 256
391
392/*
393 * Wait 1s for disk to answer on IDE bus after a hard reset
394 * of the device (via GPIO/FCR).
395 *
396 * Some devices seem to "pollute" the bus even after dropping
397 * the BSY bit (typically some combo drives slave on the UDMA
398 * bus) after a hard reset. Since we hard reset all drives on
399 * KeyLargo ATA66, we have to keep that delay around. I may end
400 * up not hard resetting anymore on these and keep the delay only
401 * for older interfaces instead (we have to reset when coming
402 * from MacOS...) --BenH.
403 */
404#define IDE_WAKEUP_DELAY (1*HZ)
405
Bartlomiej Zolnierkiewicz0d071922008-04-26 22:25:22 +0200406static int pmac_ide_init_dma(ide_hwif_t *, const struct ide_port_info *);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700407
Bartlomiej Zolnierkiewicz23579a22008-04-18 00:46:26 +0200408#define PMAC_IDE_REG(x) \
Bartlomiej Zolnierkiewicz4c3032d2008-04-27 15:38:32 +0200409 ((void __iomem *)((drive)->hwif->io_ports.data_addr + (x)))
Linus Torvalds1da177e2005-04-16 15:20:36 -0700410
411/*
412 * Apply the timings of the proper unit (master/slave) to the shared
413 * timing register when selecting that unit. This version is for
414 * ASICs with a single timing register
415 */
Sergei Shtylyovabb596b2009-03-31 20:15:32 +0200416static void pmac_ide_apply_timings(ide_drive_t *drive)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700417{
Bartlomiej Zolnierkiewicz7b8797a2008-07-23 19:55:48 +0200418 ide_hwif_t *hwif = drive->hwif;
419 pmac_ide_hwif_t *pmif =
420 (pmac_ide_hwif_t *)dev_get_drvdata(hwif->gendev.parent);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700421
Bartlomiej Zolnierkiewicz123995b2008-10-13 21:39:40 +0200422 if (drive->dn & 1)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700423 writel(pmif->timings[1], PMAC_IDE_REG(IDE_TIMING_CONFIG));
424 else
425 writel(pmif->timings[0], PMAC_IDE_REG(IDE_TIMING_CONFIG));
426 (void)readl(PMAC_IDE_REG(IDE_TIMING_CONFIG));
427}
428
429/*
430 * Apply the timings of the proper unit (master/slave) to the shared
431 * timing register when selecting that unit. This version is for
432 * ASICs with a dual timing register (Kauai)
433 */
Sergei Shtylyovabb596b2009-03-31 20:15:32 +0200434static void pmac_ide_kauai_apply_timings(ide_drive_t *drive)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700435{
Bartlomiej Zolnierkiewicz7b8797a2008-07-23 19:55:48 +0200436 ide_hwif_t *hwif = drive->hwif;
437 pmac_ide_hwif_t *pmif =
438 (pmac_ide_hwif_t *)dev_get_drvdata(hwif->gendev.parent);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700439
Bartlomiej Zolnierkiewicz123995b2008-10-13 21:39:40 +0200440 if (drive->dn & 1) {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700441 writel(pmif->timings[1], PMAC_IDE_REG(IDE_KAUAI_PIO_CONFIG));
442 writel(pmif->timings[3], PMAC_IDE_REG(IDE_KAUAI_ULTRA_CONFIG));
443 } else {
444 writel(pmif->timings[0], PMAC_IDE_REG(IDE_KAUAI_PIO_CONFIG));
445 writel(pmif->timings[2], PMAC_IDE_REG(IDE_KAUAI_ULTRA_CONFIG));
446 }
447 (void)readl(PMAC_IDE_REG(IDE_KAUAI_PIO_CONFIG));
448}
449
450/*
451 * Force an update of controller timing values for a given drive
452 */
Jon Loeligeraacaf9b2005-09-17 10:36:54 -0500453static void
Linus Torvalds1da177e2005-04-16 15:20:36 -0700454pmac_ide_do_update_timings(ide_drive_t *drive)
455{
Bartlomiej Zolnierkiewicz7b8797a2008-07-23 19:55:48 +0200456 ide_hwif_t *hwif = drive->hwif;
457 pmac_ide_hwif_t *pmif =
458 (pmac_ide_hwif_t *)dev_get_drvdata(hwif->gendev.parent);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700459
Linus Torvalds1da177e2005-04-16 15:20:36 -0700460 if (pmif->kind == controller_sh_ata6 ||
461 pmif->kind == controller_un_ata6 ||
462 pmif->kind == controller_k2_ata6)
Sergei Shtylyovabb596b2009-03-31 20:15:32 +0200463 pmac_ide_kauai_apply_timings(drive);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700464 else
Sergei Shtylyovabb596b2009-03-31 20:15:32 +0200465 pmac_ide_apply_timings(drive);
466}
467
468static void pmac_dev_select(ide_drive_t *drive)
469{
470 pmac_ide_apply_timings(drive);
471
472 writeb(drive->select | ATA_DEVICE_OBS,
473 (void __iomem *)drive->hwif->io_ports.device_addr);
474}
475
476static void pmac_kauai_dev_select(ide_drive_t *drive)
477{
478 pmac_ide_kauai_apply_timings(drive);
479
480 writeb(drive->select | ATA_DEVICE_OBS,
481 (void __iomem *)drive->hwif->io_ports.device_addr);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700482}
483
Bartlomiej Zolnierkiewiczc6dfa862008-07-23 19:55:51 +0200484static void pmac_exec_command(ide_hwif_t *hwif, u8 cmd)
485{
486 writeb(cmd, (void __iomem *)hwif->io_ports.command_addr);
487 (void)readl((void __iomem *)(hwif->io_ports.data_addr
488 + IDE_TIMING_CONFIG));
489}
490
Sergei Shtylyovecf3a312009-03-31 20:15:30 +0200491static void pmac_write_devctl(ide_hwif_t *hwif, u8 ctl)
Bartlomiej Zolnierkiewicz6e6afb32008-07-23 19:55:52 +0200492{
Bartlomiej Zolnierkiewicz6e6afb32008-07-23 19:55:52 +0200493 writeb(ctl, (void __iomem *)hwif->io_ports.ctl_addr);
494 (void)readl((void __iomem *)(hwif->io_ports.data_addr
495 + IDE_TIMING_CONFIG));
496}
497
Linus Torvalds1da177e2005-04-16 15:20:36 -0700498/*
Linus Torvalds1da177e2005-04-16 15:20:36 -0700499 * Old tuning functions (called on hdparm -p), sets up drive PIO timings
500 */
Jon Loeligeraacaf9b2005-09-17 10:36:54 -0500501static void
Bartlomiej Zolnierkiewicz26bcb872007-10-11 23:54:00 +0200502pmac_ide_set_pio_mode(ide_drive_t *drive, const u8 pio)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700503{
Bartlomiej Zolnierkiewicz7b8797a2008-07-23 19:55:48 +0200504 ide_hwif_t *hwif = drive->hwif;
505 pmac_ide_hwif_t *pmif =
506 (pmac_ide_hwif_t *)dev_get_drvdata(hwif->gendev.parent);
Bartlomiej Zolnierkiewicz8a972062008-07-16 20:33:38 +0200507 struct ide_timing *tim = ide_timing_find_mode(XFER_PIO_0 + pio);
Benjamin Herrenschmidt0b46ff22007-10-13 17:47:50 +0200508 u32 *timings, t;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700509 unsigned accessTicks, recTicks;
510 unsigned accessTime, recTime;
Bartlomiej Zolnierkiewicz7dd00082007-07-20 01:11:56 +0200511 unsigned int cycle_time;
512
Linus Torvalds1da177e2005-04-16 15:20:36 -0700513 /* which drive is it ? */
Bartlomiej Zolnierkiewicz123995b2008-10-13 21:39:40 +0200514 timings = &pmif->timings[drive->dn & 1];
Benjamin Herrenschmidt0b46ff22007-10-13 17:47:50 +0200515 t = *timings;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700516
Bartlomiej Zolnierkiewicz7dd00082007-07-20 01:11:56 +0200517 cycle_time = ide_pio_cycle_time(drive, pio);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700518
519 switch (pmif->kind) {
520 case controller_sh_ata6: {
521 /* 133Mhz cell */
Bartlomiej Zolnierkiewicz7dd00082007-07-20 01:11:56 +0200522 u32 tr = kauai_lookup_timing(shasta_pio_timings, cycle_time);
Benjamin Herrenschmidt0b46ff22007-10-13 17:47:50 +0200523 t = (t & ~TR_133_PIOREG_PIO_MASK) | tr;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700524 break;
525 }
526 case controller_un_ata6:
527 case controller_k2_ata6: {
528 /* 100Mhz cell */
Bartlomiej Zolnierkiewicz7dd00082007-07-20 01:11:56 +0200529 u32 tr = kauai_lookup_timing(kauai_pio_timings, cycle_time);
Benjamin Herrenschmidt0b46ff22007-10-13 17:47:50 +0200530 t = (t & ~TR_100_PIOREG_PIO_MASK) | tr;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700531 break;
532 }
533 case controller_kl_ata4:
534 /* 66Mhz cell */
Bartlomiej Zolnierkiewicz8a972062008-07-16 20:33:38 +0200535 recTime = cycle_time - tim->active - tim->setup;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700536 recTime = max(recTime, 150U);
Bartlomiej Zolnierkiewicz8a972062008-07-16 20:33:38 +0200537 accessTime = tim->active;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700538 accessTime = max(accessTime, 150U);
539 accessTicks = SYSCLK_TICKS_66(accessTime);
540 accessTicks = min(accessTicks, 0x1fU);
541 recTicks = SYSCLK_TICKS_66(recTime);
542 recTicks = min(recTicks, 0x1fU);
Benjamin Herrenschmidt0b46ff22007-10-13 17:47:50 +0200543 t = (t & ~TR_66_PIO_MASK) |
544 (accessTicks << TR_66_PIO_ACCESS_SHIFT) |
545 (recTicks << TR_66_PIO_RECOVERY_SHIFT);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700546 break;
547 default: {
548 /* 33Mhz cell */
549 int ebit = 0;
Bartlomiej Zolnierkiewicz8a972062008-07-16 20:33:38 +0200550 recTime = cycle_time - tim->active - tim->setup;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700551 recTime = max(recTime, 150U);
Bartlomiej Zolnierkiewicz8a972062008-07-16 20:33:38 +0200552 accessTime = tim->active;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700553 accessTime = max(accessTime, 150U);
554 accessTicks = SYSCLK_TICKS(accessTime);
555 accessTicks = min(accessTicks, 0x1fU);
556 accessTicks = max(accessTicks, 4U);
557 recTicks = SYSCLK_TICKS(recTime);
558 recTicks = min(recTicks, 0x1fU);
559 recTicks = max(recTicks, 5U) - 4;
560 if (recTicks > 9) {
561 recTicks--; /* guess, but it's only for PIO0, so... */
562 ebit = 1;
563 }
Benjamin Herrenschmidt0b46ff22007-10-13 17:47:50 +0200564 t = (t & ~TR_33_PIO_MASK) |
Linus Torvalds1da177e2005-04-16 15:20:36 -0700565 (accessTicks << TR_33_PIO_ACCESS_SHIFT) |
566 (recTicks << TR_33_PIO_RECOVERY_SHIFT);
567 if (ebit)
Benjamin Herrenschmidt0b46ff22007-10-13 17:47:50 +0200568 t |= TR_33_PIO_E;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700569 break;
570 }
571 }
572
573#ifdef IDE_PMAC_DEBUG
574 printk(KERN_ERR "%s: Set PIO timing for mode %d, reg: 0x%08x\n",
575 drive->name, pio, *timings);
576#endif
577
Benjamin Herrenschmidt0b46ff22007-10-13 17:47:50 +0200578 *timings = t;
Bartlomiej Zolnierkiewiczc15d5d42007-10-11 23:54:01 +0200579 pmac_ide_do_update_timings(drive);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700580}
581
Linus Torvalds1da177e2005-04-16 15:20:36 -0700582/*
583 * Calculate KeyLargo ATA/66 UDMA timings
584 */
Jon Loeligeraacaf9b2005-09-17 10:36:54 -0500585static int
Linus Torvalds1da177e2005-04-16 15:20:36 -0700586set_timings_udma_ata4(u32 *timings, u8 speed)
587{
588 unsigned rdyToPauseTicks, wrDataSetupTicks, addrTicks;
589
590 if (speed > XFER_UDMA_4)
591 return 1;
592
593 rdyToPauseTicks = SYSCLK_TICKS_66(kl66_udma_timings[speed & 0xf].rdy2pause);
594 wrDataSetupTicks = SYSCLK_TICKS_66(kl66_udma_timings[speed & 0xf].wrDataSetup);
595 addrTicks = SYSCLK_TICKS_66(kl66_udma_timings[speed & 0xf].addrSetup);
596
597 *timings = ((*timings) & ~(TR_66_UDMA_MASK | TR_66_MDMA_MASK)) |
598 (wrDataSetupTicks << TR_66_UDMA_WRDATASETUP_SHIFT) |
599 (rdyToPauseTicks << TR_66_UDMA_RDY2PAUS_SHIFT) |
600 (addrTicks <<TR_66_UDMA_ADDRSETUP_SHIFT) |
601 TR_66_UDMA_EN;
602#ifdef IDE_PMAC_DEBUG
603 printk(KERN_ERR "ide_pmac: Set UDMA timing for mode %d, reg: 0x%08x\n",
604 speed & 0xf, *timings);
605#endif
606
607 return 0;
608}
609
610/*
611 * Calculate Kauai ATA/100 UDMA timings
612 */
Jon Loeligeraacaf9b2005-09-17 10:36:54 -0500613static int
Linus Torvalds1da177e2005-04-16 15:20:36 -0700614set_timings_udma_ata6(u32 *pio_timings, u32 *ultra_timings, u8 speed)
615{
616 struct ide_timing *t = ide_timing_find_mode(speed);
617 u32 tr;
618
619 if (speed > XFER_UDMA_5 || t == NULL)
620 return 1;
621 tr = kauai_lookup_timing(kauai_udma_timings, (int)t->udma);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700622 *ultra_timings = ((*ultra_timings) & ~TR_100_UDMAREG_UDMA_MASK) | tr;
623 *ultra_timings = (*ultra_timings) | TR_100_UDMAREG_UDMA_EN;
624
625 return 0;
626}
627
628/*
629 * Calculate Shasta ATA/133 UDMA timings
630 */
Jon Loeligeraacaf9b2005-09-17 10:36:54 -0500631static int
Linus Torvalds1da177e2005-04-16 15:20:36 -0700632set_timings_udma_shasta(u32 *pio_timings, u32 *ultra_timings, u8 speed)
633{
634 struct ide_timing *t = ide_timing_find_mode(speed);
635 u32 tr;
636
637 if (speed > XFER_UDMA_6 || t == NULL)
638 return 1;
639 tr = kauai_lookup_timing(shasta_udma133_timings, (int)t->udma);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700640 *ultra_timings = ((*ultra_timings) & ~TR_133_UDMAREG_UDMA_MASK) | tr;
641 *ultra_timings = (*ultra_timings) | TR_133_UDMAREG_UDMA_EN;
642
643 return 0;
644}
645
646/*
647 * Calculate MDMA timings for all cells
648 */
Bartlomiej Zolnierkiewicz90f72ec2007-10-13 17:47:48 +0200649static void
Linus Torvalds1da177e2005-04-16 15:20:36 -0700650set_timings_mdma(ide_drive_t *drive, int intf_type, u32 *timings, u32 *timings2,
Bartlomiej Zolnierkiewicz90f72ec2007-10-13 17:47:48 +0200651 u8 speed)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700652{
Bartlomiej Zolnierkiewicz4dde4492008-10-10 22:39:19 +0200653 u16 *id = drive->id;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700654 int cycleTime, accessTime = 0, recTime = 0;
655 unsigned accessTicks, recTicks;
656 struct mdma_timings_t* tm = NULL;
657 int i;
658
659 /* Get default cycle time for mode */
660 switch(speed & 0xf) {
661 case 0: cycleTime = 480; break;
662 case 1: cycleTime = 150; break;
663 case 2: cycleTime = 120; break;
664 default:
Bartlomiej Zolnierkiewicz90f72ec2007-10-13 17:47:48 +0200665 BUG();
666 break;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700667 }
Bartlomiej Zolnierkiewicz90f72ec2007-10-13 17:47:48 +0200668
669 /* Check if drive provides explicit DMA cycle time */
Bartlomiej Zolnierkiewicz4dde4492008-10-10 22:39:19 +0200670 if ((id[ATA_ID_FIELD_VALID] & 2) && id[ATA_ID_EIDE_DMA_TIME])
671 cycleTime = max_t(int, id[ATA_ID_EIDE_DMA_TIME], cycleTime);
Bartlomiej Zolnierkiewicz90f72ec2007-10-13 17:47:48 +0200672
Linus Torvalds1da177e2005-04-16 15:20:36 -0700673 /* OHare limits according to some old Apple sources */
674 if ((intf_type == controller_ohare) && (cycleTime < 150))
675 cycleTime = 150;
676 /* Get the proper timing array for this controller */
677 switch(intf_type) {
678 case controller_sh_ata6:
679 case controller_un_ata6:
680 case controller_k2_ata6:
681 break;
682 case controller_kl_ata4:
683 tm = mdma_timings_66;
684 break;
685 case controller_kl_ata3:
686 tm = mdma_timings_33k;
687 break;
688 default:
689 tm = mdma_timings_33;
690 break;
691 }
692 if (tm != NULL) {
693 /* Lookup matching access & recovery times */
694 i = -1;
695 for (;;) {
696 if (tm[i+1].cycleTime < cycleTime)
697 break;
698 i++;
699 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700700 cycleTime = tm[i].cycleTime;
701 accessTime = tm[i].accessTime;
702 recTime = tm[i].recoveryTime;
703
704#ifdef IDE_PMAC_DEBUG
705 printk(KERN_ERR "%s: MDMA, cycleTime: %d, accessTime: %d, recTime: %d\n",
706 drive->name, cycleTime, accessTime, recTime);
707#endif
708 }
709 switch(intf_type) {
710 case controller_sh_ata6: {
711 /* 133Mhz cell */
712 u32 tr = kauai_lookup_timing(shasta_mdma_timings, cycleTime);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700713 *timings = ((*timings) & ~TR_133_PIOREG_MDMA_MASK) | tr;
714 *timings2 = (*timings2) & ~TR_133_UDMAREG_UDMA_EN;
715 }
716 case controller_un_ata6:
717 case controller_k2_ata6: {
718 /* 100Mhz cell */
719 u32 tr = kauai_lookup_timing(kauai_mdma_timings, cycleTime);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700720 *timings = ((*timings) & ~TR_100_PIOREG_MDMA_MASK) | tr;
721 *timings2 = (*timings2) & ~TR_100_UDMAREG_UDMA_EN;
722 }
723 break;
724 case controller_kl_ata4:
725 /* 66Mhz cell */
726 accessTicks = SYSCLK_TICKS_66(accessTime);
727 accessTicks = min(accessTicks, 0x1fU);
728 accessTicks = max(accessTicks, 0x1U);
729 recTicks = SYSCLK_TICKS_66(recTime);
730 recTicks = min(recTicks, 0x1fU);
731 recTicks = max(recTicks, 0x3U);
732 /* Clear out mdma bits and disable udma */
733 *timings = ((*timings) & ~(TR_66_MDMA_MASK | TR_66_UDMA_MASK)) |
734 (accessTicks << TR_66_MDMA_ACCESS_SHIFT) |
735 (recTicks << TR_66_MDMA_RECOVERY_SHIFT);
736 break;
737 case controller_kl_ata3:
738 /* 33Mhz cell on KeyLargo */
739 accessTicks = SYSCLK_TICKS(accessTime);
740 accessTicks = max(accessTicks, 1U);
741 accessTicks = min(accessTicks, 0x1fU);
742 accessTime = accessTicks * IDE_SYSCLK_NS;
743 recTicks = SYSCLK_TICKS(recTime);
744 recTicks = max(recTicks, 1U);
745 recTicks = min(recTicks, 0x1fU);
746 *timings = ((*timings) & ~TR_33_MDMA_MASK) |
747 (accessTicks << TR_33_MDMA_ACCESS_SHIFT) |
748 (recTicks << TR_33_MDMA_RECOVERY_SHIFT);
749 break;
750 default: {
751 /* 33Mhz cell on others */
752 int halfTick = 0;
753 int origAccessTime = accessTime;
754 int origRecTime = recTime;
755
756 accessTicks = SYSCLK_TICKS(accessTime);
757 accessTicks = max(accessTicks, 1U);
758 accessTicks = min(accessTicks, 0x1fU);
759 accessTime = accessTicks * IDE_SYSCLK_NS;
760 recTicks = SYSCLK_TICKS(recTime);
761 recTicks = max(recTicks, 2U) - 1;
762 recTicks = min(recTicks, 0x1fU);
763 recTime = (recTicks + 1) * IDE_SYSCLK_NS;
764 if ((accessTicks > 1) &&
765 ((accessTime - IDE_SYSCLK_NS/2) >= origAccessTime) &&
766 ((recTime - IDE_SYSCLK_NS/2) >= origRecTime)) {
767 halfTick = 1;
768 accessTicks--;
769 }
770 *timings = ((*timings) & ~TR_33_MDMA_MASK) |
771 (accessTicks << TR_33_MDMA_ACCESS_SHIFT) |
772 (recTicks << TR_33_MDMA_RECOVERY_SHIFT);
773 if (halfTick)
774 *timings |= TR_33_MDMA_HALFTICK;
775 }
776 }
777#ifdef IDE_PMAC_DEBUG
778 printk(KERN_ERR "%s: Set MDMA timing for mode %d, reg: 0x%08x\n",
779 drive->name, speed & 0xf, *timings);
780#endif
Linus Torvalds1da177e2005-04-16 15:20:36 -0700781}
Linus Torvalds1da177e2005-04-16 15:20:36 -0700782
Bartlomiej Zolnierkiewicz88b2b322007-10-13 17:47:51 +0200783static void pmac_ide_set_dma_mode(ide_drive_t *drive, const u8 speed)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700784{
Bartlomiej Zolnierkiewicz7b8797a2008-07-23 19:55:48 +0200785 ide_hwif_t *hwif = drive->hwif;
786 pmac_ide_hwif_t *pmif =
787 (pmac_ide_hwif_t *)dev_get_drvdata(hwif->gendev.parent);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700788 int ret = 0;
Bartlomiej Zolnierkiewicz085798b2007-10-13 17:47:48 +0200789 u32 *timings, *timings2, tl[2];
Bartlomiej Zolnierkiewicz123995b2008-10-13 21:39:40 +0200790 u8 unit = drive->dn & 1;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700791
Linus Torvalds1da177e2005-04-16 15:20:36 -0700792 timings = &pmif->timings[unit];
793 timings2 = &pmif->timings[unit+2];
Bartlomiej Zolnierkiewicz085798b2007-10-13 17:47:48 +0200794
795 /* Copy timings to local image */
796 tl[0] = *timings;
797 tl[1] = *timings2;
798
Bartlomiej Zolnierkiewicz4db90a12008-01-25 22:17:18 +0100799 if (speed >= XFER_UDMA_0) {
800 if (pmif->kind == controller_kl_ata4)
801 ret = set_timings_udma_ata4(&tl[0], speed);
802 else if (pmif->kind == controller_un_ata6
803 || pmif->kind == controller_k2_ata6)
804 ret = set_timings_udma_ata6(&tl[0], &tl[1], speed);
805 else if (pmif->kind == controller_sh_ata6)
806 ret = set_timings_udma_shasta(&tl[0], &tl[1], speed);
807 else
808 ret = -1;
809 } else
810 set_timings_mdma(drive, pmif->kind, &tl[0], &tl[1], speed);
Bartlomiej Zolnierkiewicz53846572008-12-08 17:52:05 +0100811
Linus Torvalds1da177e2005-04-16 15:20:36 -0700812 if (ret)
Bartlomiej Zolnierkiewicz88b2b322007-10-13 17:47:51 +0200813 return;
Bartlomiej Zolnierkiewicz085798b2007-10-13 17:47:48 +0200814
815 /* Apply timings to controller */
816 *timings = tl[0];
817 *timings2 = tl[1];
818
Linus Torvalds1da177e2005-04-16 15:20:36 -0700819 pmac_ide_do_update_timings(drive);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700820}
821
822/*
823 * Blast some well known "safe" values to the timing registers at init or
824 * wakeup from sleep time, before we do real calculation
825 */
Jon Loeligeraacaf9b2005-09-17 10:36:54 -0500826static void
Linus Torvalds1da177e2005-04-16 15:20:36 -0700827sanitize_timings(pmac_ide_hwif_t *pmif)
828{
829 unsigned int value, value2 = 0;
830
831 switch(pmif->kind) {
832 case controller_sh_ata6:
833 value = 0x0a820c97;
834 value2 = 0x00033031;
835 break;
836 case controller_un_ata6:
837 case controller_k2_ata6:
838 value = 0x08618a92;
839 value2 = 0x00002921;
840 break;
841 case controller_kl_ata4:
842 value = 0x0008438c;
843 break;
844 case controller_kl_ata3:
845 value = 0x00084526;
846 break;
847 case controller_heathrow:
848 case controller_ohare:
849 default:
850 value = 0x00074526;
851 break;
852 }
853 pmif->timings[0] = pmif->timings[1] = value;
854 pmif->timings[2] = pmif->timings[3] = value2;
855}
856
Linus Torvalds1da177e2005-04-16 15:20:36 -0700857/* Suspend call back, should be called after the child devices
858 * have actually been suspended
859 */
Bartlomiej Zolnierkiewicz7b8797a2008-07-23 19:55:48 +0200860static int pmac_ide_do_suspend(pmac_ide_hwif_t *pmif)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700861{
Linus Torvalds1da177e2005-04-16 15:20:36 -0700862 /* We clear the timings */
863 pmif->timings[0] = 0;
864 pmif->timings[1] = 0;
865
Benjamin Herrenschmidt616299a2005-05-01 08:58:41 -0700866 disable_irq(pmif->irq);
867
Linus Torvalds1da177e2005-04-16 15:20:36 -0700868 /* The media bay will handle itself just fine */
869 if (pmif->mediabay)
870 return 0;
871
872 /* Kauai has bus control FCRs directly here */
873 if (pmif->kauai_fcr) {
874 u32 fcr = readl(pmif->kauai_fcr);
875 fcr &= ~(KAUAI_FCR_UATA_RESET_N | KAUAI_FCR_UATA_ENABLE);
876 writel(fcr, pmif->kauai_fcr);
877 }
878
879 /* Disable the bus on older machines and the cell on kauai */
880 ppc_md.feature_call(PMAC_FTR_IDE_ENABLE, pmif->node, pmif->aapl_bus_id,
881 0);
882
883 return 0;
884}
885
886/* Resume call back, should be called before the child devices
887 * are resumed
888 */
Bartlomiej Zolnierkiewicz7b8797a2008-07-23 19:55:48 +0200889static int pmac_ide_do_resume(pmac_ide_hwif_t *pmif)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700890{
Linus Torvalds1da177e2005-04-16 15:20:36 -0700891 /* Hard reset & re-enable controller (do we really need to reset ? -BenH) */
892 if (!pmif->mediabay) {
893 ppc_md.feature_call(PMAC_FTR_IDE_RESET, pmif->node, pmif->aapl_bus_id, 1);
894 ppc_md.feature_call(PMAC_FTR_IDE_ENABLE, pmif->node, pmif->aapl_bus_id, 1);
895 msleep(10);
896 ppc_md.feature_call(PMAC_FTR_IDE_RESET, pmif->node, pmif->aapl_bus_id, 0);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700897
898 /* Kauai has it different */
899 if (pmif->kauai_fcr) {
900 u32 fcr = readl(pmif->kauai_fcr);
901 fcr |= KAUAI_FCR_UATA_RESET_N | KAUAI_FCR_UATA_ENABLE;
902 writel(fcr, pmif->kauai_fcr);
903 }
Benjamin Herrenschmidt616299a2005-05-01 08:58:41 -0700904
905 msleep(jiffies_to_msecs(IDE_WAKEUP_DELAY));
Linus Torvalds1da177e2005-04-16 15:20:36 -0700906 }
907
908 /* Sanitize drive timings */
909 sanitize_timings(pmif);
910
Benjamin Herrenschmidt616299a2005-05-01 08:58:41 -0700911 enable_irq(pmif->irq);
912
Linus Torvalds1da177e2005-04-16 15:20:36 -0700913 return 0;
914}
915
Bartlomiej Zolnierkiewicz07a6c662008-06-15 21:00:23 +0200916static u8 pmac_ide_cable_detect(ide_hwif_t *hwif)
917{
Bartlomiej Zolnierkiewicz7b8797a2008-07-23 19:55:48 +0200918 pmac_ide_hwif_t *pmif =
919 (pmac_ide_hwif_t *)dev_get_drvdata(hwif->gendev.parent);
Bartlomiej Zolnierkiewicz07a6c662008-06-15 21:00:23 +0200920 struct device_node *np = pmif->node;
921 const char *cable = of_get_property(np, "cable-type", NULL);
922
923 /* Get cable type from device-tree. */
924 if (cable && !strncmp(cable, "80-", 3))
925 return ATA_CBL_PATA80;
926
927 /*
928 * G5's seem to have incorrect cable type in device-tree.
929 * Let's assume they have a 80 conductor cable, this seem
930 * to be always the case unless the user mucked around.
931 */
932 if (of_device_is_compatible(np, "K2-UATA") ||
933 of_device_is_compatible(np, "shasta-ata"))
934 return ATA_CBL_PATA80;
935
936 return ATA_CBL_PATA40;
937}
938
Bartlomiej Zolnierkiewicz07eb1062008-07-23 19:55:49 +0200939static void pmac_ide_init_dev(ide_drive_t *drive)
940{
941 ide_hwif_t *hwif = drive->hwif;
942 pmac_ide_hwif_t *pmif =
943 (pmac_ide_hwif_t *)dev_get_drvdata(hwif->gendev.parent);
944
945 if (pmif->mediabay) {
946#ifdef CONFIG_PMAC_MEDIABAY
947 if (check_media_bay_by_base(pmif->regbase, MB_CD) == 0) {
Bartlomiej Zolnierkiewicz97100fc2008-10-13 21:39:36 +0200948 drive->dev_flags &= ~IDE_DFLAG_NOPROBE;
Bartlomiej Zolnierkiewicz07eb1062008-07-23 19:55:49 +0200949 return;
950 }
951#endif
Bartlomiej Zolnierkiewicz97100fc2008-10-13 21:39:36 +0200952 drive->dev_flags |= IDE_DFLAG_NOPROBE;
Bartlomiej Zolnierkiewicz07eb1062008-07-23 19:55:49 +0200953 }
954}
955
Bartlomiej Zolnierkiewicz374e0422008-07-23 19:55:56 +0200956static const struct ide_tp_ops pmac_tp_ops = {
957 .exec_command = pmac_exec_command,
958 .read_status = ide_read_status,
959 .read_altstatus = ide_read_altstatus,
Sergei Shtylyovecf3a312009-03-31 20:15:30 +0200960 .write_devctl = pmac_write_devctl,
Bartlomiej Zolnierkiewicz374e0422008-07-23 19:55:56 +0200961
Sergei Shtylyovabb596b2009-03-31 20:15:32 +0200962 .dev_select = pmac_dev_select,
Bartlomiej Zolnierkiewicz374e0422008-07-23 19:55:56 +0200963 .tf_load = ide_tf_load,
964 .tf_read = ide_tf_read,
965
966 .input_data = ide_input_data,
967 .output_data = ide_output_data,
968};
969
Sergei Shtylyovabb596b2009-03-31 20:15:32 +0200970static const struct ide_tp_ops pmac_ata6_tp_ops = {
971 .exec_command = pmac_exec_command,
972 .read_status = ide_read_status,
973 .read_altstatus = ide_read_altstatus,
974 .write_devctl = pmac_write_devctl,
975
976 .dev_select = pmac_kauai_dev_select,
977 .tf_load = ide_tf_load,
978 .tf_read = ide_tf_read,
979
980 .input_data = ide_input_data,
981 .output_data = ide_output_data,
Bartlomiej Zolnierkiewicz07a6c662008-06-15 21:00:23 +0200982};
983
984static const struct ide_port_ops pmac_ide_ata4_port_ops = {
Bartlomiej Zolnierkiewicz07eb1062008-07-23 19:55:49 +0200985 .init_dev = pmac_ide_init_dev,
Bartlomiej Zolnierkiewicz07a6c662008-06-15 21:00:23 +0200986 .set_pio_mode = pmac_ide_set_pio_mode,
987 .set_dma_mode = pmac_ide_set_dma_mode,
Bartlomiej Zolnierkiewicz07a6c662008-06-15 21:00:23 +0200988 .cable_detect = pmac_ide_cable_detect,
Bartlomiej Zolnierkiewiczac95bee2008-04-26 22:25:14 +0200989};
990
991static const struct ide_port_ops pmac_ide_port_ops = {
Bartlomiej Zolnierkiewicz07eb1062008-07-23 19:55:49 +0200992 .init_dev = pmac_ide_init_dev,
Bartlomiej Zolnierkiewiczac95bee2008-04-26 22:25:14 +0200993 .set_pio_mode = pmac_ide_set_pio_mode,
994 .set_dma_mode = pmac_ide_set_dma_mode,
Bartlomiej Zolnierkiewiczac95bee2008-04-26 22:25:14 +0200995};
996
Bartlomiej Zolnierkiewiczf37afda2008-04-26 22:25:24 +0200997static const struct ide_dma_ops pmac_dma_ops;
Bartlomiej Zolnierkiewicz5e37bdc2008-04-26 22:25:24 +0200998
Bartlomiej Zolnierkiewiczc413b9b2008-02-02 19:56:31 +0100999static const struct ide_port_info pmac_port_info = {
Bartlomiej Zolnierkiewiczb36ba532008-07-23 19:55:49 +02001000 .name = DRV_NAME,
Bartlomiej Zolnierkiewicz0d071922008-04-26 22:25:22 +02001001 .init_dma = pmac_ide_init_dma,
Bartlomiej Zolnierkiewiczc413b9b2008-02-02 19:56:31 +01001002 .chipset = ide_pmac,
Bartlomiej Zolnierkiewicz374e0422008-07-23 19:55:56 +02001003 .tp_ops = &pmac_tp_ops,
1004 .port_ops = &pmac_ide_port_ops,
Bartlomiej Zolnierkiewicz5e37bdc2008-04-26 22:25:24 +02001005 .dma_ops = &pmac_dma_ops,
Bartlomiej Zolnierkiewiczc413b9b2008-02-02 19:56:31 +01001006 .host_flags = IDE_HFLAG_SET_PIO_MODE_KEEP_DMA |
Bartlomiej Zolnierkiewiczc413b9b2008-02-02 19:56:31 +01001007 IDE_HFLAG_POST_SET_MODE |
Bartlomiej Zolnierkiewiczc5dd43e2008-04-28 23:44:37 +02001008 IDE_HFLAG_MMIO |
Bartlomiej Zolnierkiewiczc413b9b2008-02-02 19:56:31 +01001009 IDE_HFLAG_UNMASK_IRQS,
1010 .pio_mask = ATA_PIO4,
1011 .mwdma_mask = ATA_MWDMA2,
1012};
1013
Linus Torvalds1da177e2005-04-16 15:20:36 -07001014/*
1015 * Setup, register & probe an IDE channel driven by this driver, this is
Bartlomiej Zolnierkiewicz5b164642008-06-15 21:00:23 +02001016 * called by one of the 2 probe functions (macio or PCI).
Linus Torvalds1da177e2005-04-16 15:20:36 -07001017 */
Bartlomiej Zolnierkiewiczb36ba532008-07-23 19:55:49 +02001018static int __devinit pmac_ide_setup_device(pmac_ide_hwif_t *pmif, hw_regs_t *hw)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001019{
1020 struct device_node *np = pmif->node;
Jeremy Kerr018a3d12006-07-12 15:40:29 +10001021 const int *bidp;
Bartlomiej Zolnierkiewicz48c3c102008-07-23 19:55:57 +02001022 struct ide_host *host;
Bartlomiej Zolnierkiewiczb36ba532008-07-23 19:55:49 +02001023 ide_hwif_t *hwif;
Bartlomiej Zolnierkiewiczc97c6ac2008-07-23 19:55:50 +02001024 hw_regs_t *hws[] = { hw, NULL, NULL, NULL };
Bartlomiej Zolnierkiewiczc413b9b2008-02-02 19:56:31 +01001025 struct ide_port_info d = pmac_port_info;
Bartlomiej Zolnierkiewicz6f904d02008-07-23 19:55:57 +02001026 int rc;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001027
Linus Torvalds1da177e2005-04-16 15:20:36 -07001028 pmif->broken_dma = pmif->broken_dma_warn = 0;
Bartlomiej Zolnierkiewiczc413b9b2008-02-02 19:56:31 +01001029 if (of_device_is_compatible(np, "shasta-ata")) {
Linus Torvalds1da177e2005-04-16 15:20:36 -07001030 pmif->kind = controller_sh_ata6;
Sergei Shtylyovabb596b2009-03-31 20:15:32 +02001031 d.tp_ops = &pmac_ata6_tp_ops;
1032 d.port_ops = &pmac_ide_ata4_port_ops;
Bartlomiej Zolnierkiewiczc413b9b2008-02-02 19:56:31 +01001033 d.udma_mask = ATA_UDMA6;
1034 } else if (of_device_is_compatible(np, "kauai-ata")) {
Linus Torvalds1da177e2005-04-16 15:20:36 -07001035 pmif->kind = controller_un_ata6;
Sergei Shtylyovabb596b2009-03-31 20:15:32 +02001036 d.tp_ops = &pmac_ata6_tp_ops;
1037 d.port_ops = &pmac_ide_ata4_port_ops;
Bartlomiej Zolnierkiewiczc413b9b2008-02-02 19:56:31 +01001038 d.udma_mask = ATA_UDMA5;
1039 } else if (of_device_is_compatible(np, "K2-UATA")) {
Linus Torvalds1da177e2005-04-16 15:20:36 -07001040 pmif->kind = controller_k2_ata6;
Sergei Shtylyovabb596b2009-03-31 20:15:32 +02001041 d.tp_ops = &pmac_ata6_tp_ops;
1042 d.port_ops = &pmac_ide_ata4_port_ops;
Bartlomiej Zolnierkiewiczc413b9b2008-02-02 19:56:31 +01001043 d.udma_mask = ATA_UDMA5;
1044 } else if (of_device_is_compatible(np, "keylargo-ata")) {
1045 if (strcmp(np->name, "ata-4") == 0) {
Linus Torvalds1da177e2005-04-16 15:20:36 -07001046 pmif->kind = controller_kl_ata4;
Bartlomiej Zolnierkiewicz07a6c662008-06-15 21:00:23 +02001047 d.port_ops = &pmac_ide_ata4_port_ops;
Bartlomiej Zolnierkiewiczc413b9b2008-02-02 19:56:31 +01001048 d.udma_mask = ATA_UDMA4;
1049 } else
Linus Torvalds1da177e2005-04-16 15:20:36 -07001050 pmif->kind = controller_kl_ata3;
Bartlomiej Zolnierkiewiczc413b9b2008-02-02 19:56:31 +01001051 } else if (of_device_is_compatible(np, "heathrow-ata")) {
Linus Torvalds1da177e2005-04-16 15:20:36 -07001052 pmif->kind = controller_heathrow;
Bartlomiej Zolnierkiewiczc413b9b2008-02-02 19:56:31 +01001053 } else {
Linus Torvalds1da177e2005-04-16 15:20:36 -07001054 pmif->kind = controller_ohare;
1055 pmif->broken_dma = 1;
1056 }
1057
Stephen Rothwell40cd3a42007-05-01 13:54:02 +10001058 bidp = of_get_property(np, "AAPL,bus-id", NULL);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001059 pmif->aapl_bus_id = bidp ? *bidp : 0;
1060
Linus Torvalds1da177e2005-04-16 15:20:36 -07001061 /* On Kauai-type controllers, we make sure the FCR is correct */
1062 if (pmif->kauai_fcr)
1063 writel(KAUAI_FCR_UATA_MAGIC |
1064 KAUAI_FCR_UATA_RESET_N |
1065 KAUAI_FCR_UATA_ENABLE, pmif->kauai_fcr);
1066
1067 pmif->mediabay = 0;
1068
1069 /* Make sure we have sane timings */
1070 sanitize_timings(pmif);
1071
Benjamin Herrenschmidt98427272008-07-28 11:29:56 +10001072 host = ide_host_alloc(&d, hws);
1073 if (host == NULL)
1074 return -ENOMEM;
1075 hwif = host->ports[0];
1076
Linus Torvalds1da177e2005-04-16 15:20:36 -07001077#ifndef CONFIG_PPC64
1078 /* XXX FIXME: Media bay stuff need re-organizing */
1079 if (np->parent && np->parent->name
1080 && strcasecmp(np->parent->name, "media-bay") == 0) {
Benjamin Herrenschmidt8c870932005-06-27 14:36:34 -07001081#ifdef CONFIG_PMAC_MEDIABAY
Bartlomiej Zolnierkiewicz2dde7862008-04-18 00:46:23 +02001082 media_bay_set_ide_infos(np->parent, pmif->regbase, pmif->irq,
1083 hwif);
Benjamin Herrenschmidt8c870932005-06-27 14:36:34 -07001084#endif /* CONFIG_PMAC_MEDIABAY */
Linus Torvalds1da177e2005-04-16 15:20:36 -07001085 pmif->mediabay = 1;
1086 if (!bidp)
1087 pmif->aapl_bus_id = 1;
1088 } else if (pmif->kind == controller_ohare) {
1089 /* The code below is having trouble on some ohare machines
1090 * (timing related ?). Until I can put my hand on one of these
1091 * units, I keep the old way
1092 */
1093 ppc_md.feature_call(PMAC_FTR_IDE_ENABLE, np, 0, 1);
1094 } else
1095#endif
1096 {
1097 /* This is necessary to enable IDE when net-booting */
1098 ppc_md.feature_call(PMAC_FTR_IDE_RESET, np, pmif->aapl_bus_id, 1);
1099 ppc_md.feature_call(PMAC_FTR_IDE_ENABLE, np, pmif->aapl_bus_id, 1);
1100 msleep(10);
1101 ppc_md.feature_call(PMAC_FTR_IDE_RESET, np, pmif->aapl_bus_id, 0);
1102 msleep(jiffies_to_msecs(IDE_WAKEUP_DELAY));
1103 }
1104
Bartlomiej Zolnierkiewiczb36ba532008-07-23 19:55:49 +02001105 printk(KERN_INFO DRV_NAME ": Found Apple %s controller (%s), "
1106 "bus ID %d%s, irq %d\n", model_name[pmif->kind],
1107 pmif->mdev ? "macio" : "PCI", pmif->aapl_bus_id,
1108 pmif->mediabay ? " (mediabay)" : "", hw->irq);
1109
Benjamin Herrenschmidt98427272008-07-28 11:29:56 +10001110 rc = ide_host_register(host, &d, hws);
1111 if (rc) {
1112 ide_host_free(host);
Bartlomiej Zolnierkiewicz6f904d02008-07-23 19:55:57 +02001113 return rc;
Benjamin Herrenschmidt98427272008-07-28 11:29:56 +10001114 }
Bartlomiej Zolnierkiewicz5cbf79c2007-05-10 00:01:11 +02001115
Linus Torvalds1da177e2005-04-16 15:20:36 -07001116 return 0;
1117}
1118
Bartlomiej Zolnierkiewicz5c586662008-04-18 00:46:29 +02001119static void __devinit pmac_ide_init_ports(hw_regs_t *hw, unsigned long base)
1120{
1121 int i;
1122
1123 for (i = 0; i < 8; ++i)
Bartlomiej Zolnierkiewicz4c3032d2008-04-27 15:38:32 +02001124 hw->io_ports_array[i] = base + i * 0x10;
1125
1126 hw->io_ports.ctl_addr = base + 0x160;
Bartlomiej Zolnierkiewicz5c586662008-04-18 00:46:29 +02001127}
1128
Linus Torvalds1da177e2005-04-16 15:20:36 -07001129/*
1130 * Attach to a macio probed interface
1131 */
1132static int __devinit
Jeff Mahoney5e655772005-07-06 15:44:41 -04001133pmac_ide_macio_attach(struct macio_dev *mdev, const struct of_device_id *match)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001134{
1135 void __iomem *base;
1136 unsigned long regbase;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001137 pmac_ide_hwif_t *pmif;
Bartlomiej Zolnierkiewicz939b0f12008-04-26 17:36:33 +02001138 int irq, rc;
Bartlomiej Zolnierkiewicz57c802e2008-01-26 20:13:05 +01001139 hw_regs_t hw;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001140
Bartlomiej Zolnierkiewicz5297a3e2008-04-26 17:36:32 +02001141 pmif = kzalloc(sizeof(*pmif), GFP_KERNEL);
1142 if (pmif == NULL)
1143 return -ENOMEM;
1144
Benjamin Herrenschmidtcc5d0182005-12-13 18:01:21 +11001145 if (macio_resource_count(mdev) == 0) {
Bartlomiej Zolnierkiewicz939b0f12008-04-26 17:36:33 +02001146 printk(KERN_WARNING "ide-pmac: no address for %s\n",
1147 mdev->ofdev.node->full_name);
Bartlomiej Zolnierkiewicz5297a3e2008-04-26 17:36:32 +02001148 rc = -ENXIO;
1149 goto out_free_pmif;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001150 }
1151
1152 /* Request memory resource for IO ports */
1153 if (macio_request_resource(mdev, 0, "ide-pmac (ports)")) {
Bartlomiej Zolnierkiewicz939b0f12008-04-26 17:36:33 +02001154 printk(KERN_ERR "ide-pmac: can't request MMIO resource for "
1155 "%s!\n", mdev->ofdev.node->full_name);
Bartlomiej Zolnierkiewicz5297a3e2008-04-26 17:36:32 +02001156 rc = -EBUSY;
1157 goto out_free_pmif;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001158 }
1159
1160 /* XXX This is bogus. Should be fixed in the registry by checking
1161 * the kind of host interrupt controller, a bit like gatwick
1162 * fixes in irq.c. That works well enough for the single case
1163 * where that happens though...
1164 */
1165 if (macio_irq_count(mdev) == 0) {
Bartlomiej Zolnierkiewicz939b0f12008-04-26 17:36:33 +02001166 printk(KERN_WARNING "ide-pmac: no intrs for device %s, using "
1167 "13\n", mdev->ofdev.node->full_name);
Benjamin Herrenschmidt69917c22006-09-22 12:56:30 +10001168 irq = irq_create_mapping(NULL, 13);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001169 } else
1170 irq = macio_irq(mdev, 0);
1171
1172 base = ioremap(macio_resource_start(mdev, 0), 0x400);
1173 regbase = (unsigned long) base;
1174
Linus Torvalds1da177e2005-04-16 15:20:36 -07001175 pmif->mdev = mdev;
1176 pmif->node = mdev->ofdev.node;
1177 pmif->regbase = regbase;
1178 pmif->irq = irq;
1179 pmif->kauai_fcr = NULL;
Bartlomiej Zolnierkiewicz53846572008-12-08 17:52:05 +01001180
Linus Torvalds1da177e2005-04-16 15:20:36 -07001181 if (macio_resource_count(mdev) >= 2) {
1182 if (macio_request_resource(mdev, 1, "ide-pmac (dma)"))
Bartlomiej Zolnierkiewicz939b0f12008-04-26 17:36:33 +02001183 printk(KERN_WARNING "ide-pmac: can't request DMA "
1184 "resource for %s!\n",
1185 mdev->ofdev.node->full_name);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001186 else
1187 pmif->dma_regs = ioremap(macio_resource_start(mdev, 1), 0x1000);
1188 } else
1189 pmif->dma_regs = NULL;
Bartlomiej Zolnierkiewicz53846572008-12-08 17:52:05 +01001190
Bartlomiej Zolnierkiewicz7b8797a2008-07-23 19:55:48 +02001191 dev_set_drvdata(&mdev->ofdev.dev, pmif);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001192
Bartlomiej Zolnierkiewicz57c802e2008-01-26 20:13:05 +01001193 memset(&hw, 0, sizeof(hw));
Bartlomiej Zolnierkiewicz5c586662008-04-18 00:46:29 +02001194 pmac_ide_init_ports(&hw, pmif->regbase);
Bartlomiej Zolnierkiewicz57c802e2008-01-26 20:13:05 +01001195 hw.irq = irq;
Bartlomiej Zolnierkiewiczc56c5642008-07-16 20:33:40 +02001196 hw.dev = &mdev->bus->pdev->dev;
1197 hw.parent = &mdev->ofdev.dev;
Bartlomiej Zolnierkiewicz57c802e2008-01-26 20:13:05 +01001198
Bartlomiej Zolnierkiewiczb36ba532008-07-23 19:55:49 +02001199 rc = pmac_ide_setup_device(pmif, &hw);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001200 if (rc != 0) {
1201 /* The inteface is released to the common IDE layer */
1202 dev_set_drvdata(&mdev->ofdev.dev, NULL);
1203 iounmap(base);
Bartlomiej Zolnierkiewiczed908fa2008-02-01 23:09:32 +01001204 if (pmif->dma_regs) {
Linus Torvalds1da177e2005-04-16 15:20:36 -07001205 iounmap(pmif->dma_regs);
Bartlomiej Zolnierkiewiczed908fa2008-02-01 23:09:32 +01001206 macio_release_resource(mdev, 1);
1207 }
Linus Torvalds1da177e2005-04-16 15:20:36 -07001208 macio_release_resource(mdev, 0);
Bartlomiej Zolnierkiewicz5297a3e2008-04-26 17:36:32 +02001209 kfree(pmif);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001210 }
1211
1212 return rc;
Bartlomiej Zolnierkiewicz5297a3e2008-04-26 17:36:32 +02001213
1214out_free_pmif:
1215 kfree(pmif);
1216 return rc;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001217}
1218
1219static int
David Brownell8b4b8a22006-08-14 23:11:03 -07001220pmac_ide_macio_suspend(struct macio_dev *mdev, pm_message_t mesg)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001221{
Bartlomiej Zolnierkiewicz7b8797a2008-07-23 19:55:48 +02001222 pmac_ide_hwif_t *pmif =
1223 (pmac_ide_hwif_t *)dev_get_drvdata(&mdev->ofdev.dev);
1224 int rc = 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001225
David Brownell8b4b8a22006-08-14 23:11:03 -07001226 if (mesg.event != mdev->ofdev.dev.power.power_state.event
Rafael J. Wysocki3a2d5b72008-02-23 19:13:25 +01001227 && (mesg.event & PM_EVENT_SLEEP)) {
Bartlomiej Zolnierkiewicz7b8797a2008-07-23 19:55:48 +02001228 rc = pmac_ide_do_suspend(pmif);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001229 if (rc == 0)
David Brownell8b4b8a22006-08-14 23:11:03 -07001230 mdev->ofdev.dev.power.power_state = mesg;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001231 }
1232
1233 return rc;
1234}
1235
1236static int
1237pmac_ide_macio_resume(struct macio_dev *mdev)
1238{
Bartlomiej Zolnierkiewicz7b8797a2008-07-23 19:55:48 +02001239 pmac_ide_hwif_t *pmif =
1240 (pmac_ide_hwif_t *)dev_get_drvdata(&mdev->ofdev.dev);
1241 int rc = 0;
1242
Pavel Machekca078ba2005-09-03 15:56:57 -07001243 if (mdev->ofdev.dev.power.power_state.event != PM_EVENT_ON) {
Bartlomiej Zolnierkiewicz7b8797a2008-07-23 19:55:48 +02001244 rc = pmac_ide_do_resume(pmif);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001245 if (rc == 0)
Pavel Machek829ca9a2005-09-03 15:56:56 -07001246 mdev->ofdev.dev.power.power_state = PMSG_ON;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001247 }
1248
1249 return rc;
1250}
1251
1252/*
1253 * Attach to a PCI probed interface
1254 */
1255static int __devinit
1256pmac_ide_pci_attach(struct pci_dev *pdev, const struct pci_device_id *id)
1257{
Linus Torvalds1da177e2005-04-16 15:20:36 -07001258 struct device_node *np;
1259 pmac_ide_hwif_t *pmif;
1260 void __iomem *base;
1261 unsigned long rbase, rlen;
Bartlomiej Zolnierkiewicz939b0f12008-04-26 17:36:33 +02001262 int rc;
Bartlomiej Zolnierkiewicz57c802e2008-01-26 20:13:05 +01001263 hw_regs_t hw;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001264
1265 np = pci_device_to_OF_node(pdev);
1266 if (np == NULL) {
1267 printk(KERN_ERR "ide-pmac: cannot find MacIO node for Kauai ATA interface\n");
1268 return -ENODEV;
1269 }
Bartlomiej Zolnierkiewicz5297a3e2008-04-26 17:36:32 +02001270
1271 pmif = kzalloc(sizeof(*pmif), GFP_KERNEL);
1272 if (pmif == NULL)
1273 return -ENOMEM;
1274
Linus Torvalds1da177e2005-04-16 15:20:36 -07001275 if (pci_enable_device(pdev)) {
Bartlomiej Zolnierkiewicz939b0f12008-04-26 17:36:33 +02001276 printk(KERN_WARNING "ide-pmac: Can't enable PCI device for "
1277 "%s\n", np->full_name);
Bartlomiej Zolnierkiewicz5297a3e2008-04-26 17:36:32 +02001278 rc = -ENXIO;
1279 goto out_free_pmif;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001280 }
1281 pci_set_master(pdev);
1282
1283 if (pci_request_regions(pdev, "Kauai ATA")) {
Bartlomiej Zolnierkiewicz939b0f12008-04-26 17:36:33 +02001284 printk(KERN_ERR "ide-pmac: Cannot obtain PCI resources for "
1285 "%s\n", np->full_name);
Bartlomiej Zolnierkiewicz5297a3e2008-04-26 17:36:32 +02001286 rc = -ENXIO;
1287 goto out_free_pmif;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001288 }
1289
Linus Torvalds1da177e2005-04-16 15:20:36 -07001290 pmif->mdev = NULL;
1291 pmif->node = np;
1292
1293 rbase = pci_resource_start(pdev, 0);
1294 rlen = pci_resource_len(pdev, 0);
1295
1296 base = ioremap(rbase, rlen);
1297 pmif->regbase = (unsigned long) base + 0x2000;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001298 pmif->dma_regs = base + 0x1000;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001299 pmif->kauai_fcr = base;
1300 pmif->irq = pdev->irq;
1301
Bartlomiej Zolnierkiewicz7b8797a2008-07-23 19:55:48 +02001302 pci_set_drvdata(pdev, pmif);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001303
Bartlomiej Zolnierkiewicz57c802e2008-01-26 20:13:05 +01001304 memset(&hw, 0, sizeof(hw));
Bartlomiej Zolnierkiewicz5c586662008-04-18 00:46:29 +02001305 pmac_ide_init_ports(&hw, pmif->regbase);
Bartlomiej Zolnierkiewicz57c802e2008-01-26 20:13:05 +01001306 hw.irq = pdev->irq;
1307 hw.dev = &pdev->dev;
1308
Bartlomiej Zolnierkiewiczb36ba532008-07-23 19:55:49 +02001309 rc = pmac_ide_setup_device(pmif, &hw);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001310 if (rc != 0) {
1311 /* The inteface is released to the common IDE layer */
1312 pci_set_drvdata(pdev, NULL);
1313 iounmap(base);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001314 pci_release_regions(pdev);
Bartlomiej Zolnierkiewicz5297a3e2008-04-26 17:36:32 +02001315 kfree(pmif);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001316 }
1317
1318 return rc;
Bartlomiej Zolnierkiewicz5297a3e2008-04-26 17:36:32 +02001319
1320out_free_pmif:
1321 kfree(pmif);
1322 return rc;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001323}
1324
1325static int
David Brownell8b4b8a22006-08-14 23:11:03 -07001326pmac_ide_pci_suspend(struct pci_dev *pdev, pm_message_t mesg)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001327{
Bartlomiej Zolnierkiewicz7b8797a2008-07-23 19:55:48 +02001328 pmac_ide_hwif_t *pmif = (pmac_ide_hwif_t *)pci_get_drvdata(pdev);
1329 int rc = 0;
1330
David Brownell8b4b8a22006-08-14 23:11:03 -07001331 if (mesg.event != pdev->dev.power.power_state.event
Rafael J. Wysocki3a2d5b72008-02-23 19:13:25 +01001332 && (mesg.event & PM_EVENT_SLEEP)) {
Bartlomiej Zolnierkiewicz7b8797a2008-07-23 19:55:48 +02001333 rc = pmac_ide_do_suspend(pmif);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001334 if (rc == 0)
David Brownell8b4b8a22006-08-14 23:11:03 -07001335 pdev->dev.power.power_state = mesg;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001336 }
1337
1338 return rc;
1339}
1340
1341static int
1342pmac_ide_pci_resume(struct pci_dev *pdev)
1343{
Bartlomiej Zolnierkiewicz7b8797a2008-07-23 19:55:48 +02001344 pmac_ide_hwif_t *pmif = (pmac_ide_hwif_t *)pci_get_drvdata(pdev);
1345 int rc = 0;
1346
Pavel Machekca078ba2005-09-03 15:56:57 -07001347 if (pdev->dev.power.power_state.event != PM_EVENT_ON) {
Bartlomiej Zolnierkiewicz7b8797a2008-07-23 19:55:48 +02001348 rc = pmac_ide_do_resume(pmif);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001349 if (rc == 0)
Pavel Machek829ca9a2005-09-03 15:56:56 -07001350 pdev->dev.power.power_state = PMSG_ON;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001351 }
1352
1353 return rc;
1354}
1355
Jeff Mahoney5e655772005-07-06 15:44:41 -04001356static struct of_device_id pmac_ide_macio_match[] =
Linus Torvalds1da177e2005-04-16 15:20:36 -07001357{
1358 {
1359 .name = "IDE",
Linus Torvalds1da177e2005-04-16 15:20:36 -07001360 },
1361 {
1362 .name = "ATA",
Linus Torvalds1da177e2005-04-16 15:20:36 -07001363 },
1364 {
Linus Torvalds1da177e2005-04-16 15:20:36 -07001365 .type = "ide",
Linus Torvalds1da177e2005-04-16 15:20:36 -07001366 },
1367 {
Linus Torvalds1da177e2005-04-16 15:20:36 -07001368 .type = "ata",
Linus Torvalds1da177e2005-04-16 15:20:36 -07001369 },
1370 {},
1371};
1372
1373static struct macio_driver pmac_ide_macio_driver =
1374{
1375 .name = "ide-pmac",
1376 .match_table = pmac_ide_macio_match,
1377 .probe = pmac_ide_macio_attach,
1378 .suspend = pmac_ide_macio_suspend,
1379 .resume = pmac_ide_macio_resume,
1380};
1381
Bartlomiej Zolnierkiewicz9cbcc5e2007-10-16 22:29:56 +02001382static const struct pci_device_id pmac_ide_pci_match[] = {
1383 { PCI_VDEVICE(APPLE, PCI_DEVICE_ID_APPLE_UNI_N_ATA), 0 },
1384 { PCI_VDEVICE(APPLE, PCI_DEVICE_ID_APPLE_IPID_ATA100), 0 },
1385 { PCI_VDEVICE(APPLE, PCI_DEVICE_ID_APPLE_K2_ATA100), 0 },
1386 { PCI_VDEVICE(APPLE, PCI_DEVICE_ID_APPLE_SH_ATA), 0 },
1387 { PCI_VDEVICE(APPLE, PCI_DEVICE_ID_APPLE_IPID2_ATA), 0 },
Benjamin Herrenschmidt71e4eda2007-10-06 18:52:27 +10001388 {},
Linus Torvalds1da177e2005-04-16 15:20:36 -07001389};
1390
1391static struct pci_driver pmac_ide_pci_driver = {
1392 .name = "ide-pmac",
1393 .id_table = pmac_ide_pci_match,
1394 .probe = pmac_ide_pci_attach,
1395 .suspend = pmac_ide_pci_suspend,
1396 .resume = pmac_ide_pci_resume,
1397};
1398MODULE_DEVICE_TABLE(pci, pmac_ide_pci_match);
1399
Andrew Morton9e5755b2007-03-03 17:48:54 +01001400int __init pmac_ide_probe(void)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001401{
Andrew Morton9e5755b2007-03-03 17:48:54 +01001402 int error;
1403
Benjamin Herrenschmidte8222502006-03-28 23:15:54 +11001404 if (!machine_is(powermac))
Andrew Morton9e5755b2007-03-03 17:48:54 +01001405 return -ENODEV;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001406
1407#ifdef CONFIG_BLK_DEV_IDE_PMAC_ATA100FIRST
Andrew Morton9e5755b2007-03-03 17:48:54 +01001408 error = pci_register_driver(&pmac_ide_pci_driver);
1409 if (error)
1410 goto out;
1411 error = macio_register_driver(&pmac_ide_macio_driver);
1412 if (error) {
1413 pci_unregister_driver(&pmac_ide_pci_driver);
1414 goto out;
1415 }
Linus Torvalds1da177e2005-04-16 15:20:36 -07001416#else
Andrew Morton9e5755b2007-03-03 17:48:54 +01001417 error = macio_register_driver(&pmac_ide_macio_driver);
1418 if (error)
1419 goto out;
1420 error = pci_register_driver(&pmac_ide_pci_driver);
1421 if (error) {
1422 macio_unregister_driver(&pmac_ide_macio_driver);
1423 goto out;
1424 }
Benjamin Herrenschmidt1beb6a72005-12-14 13:10:10 +11001425#endif
Andrew Morton9e5755b2007-03-03 17:48:54 +01001426out:
1427 return error;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001428}
1429
Linus Torvalds1da177e2005-04-16 15:20:36 -07001430/*
1431 * pmac_ide_build_dmatable builds the DBDMA command list
1432 * for a transfer and sets the DBDMA channel to point to it.
1433 */
Bartlomiej Zolnierkiewicz229816942009-03-27 12:46:46 +01001434static int pmac_ide_build_dmatable(ide_drive_t *drive, struct ide_cmd *cmd)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001435{
Bartlomiej Zolnierkiewicz7b8797a2008-07-23 19:55:48 +02001436 ide_hwif_t *hwif = drive->hwif;
1437 pmac_ide_hwif_t *pmif =
1438 (pmac_ide_hwif_t *)dev_get_drvdata(hwif->gendev.parent);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001439 struct dbdma_cmd *table;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001440 volatile struct dbdma_regs __iomem *dma = pmif->dma_regs;
1441 struct scatterlist *sg;
Bartlomiej Zolnierkiewicz229816942009-03-27 12:46:46 +01001442 int wr = !!(cmd->tf_flags & IDE_TFLAG_WRITE);
1443 int i = cmd->sg_nents, count = 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001444
1445 /* DMA table is already aligned */
1446 table = (struct dbdma_cmd *) pmif->dma_table_cpu;
1447
1448 /* Make sure DMA controller is stopped (necessary ?) */
1449 writel((RUN|PAUSE|FLUSH|WAKE|DEAD) << 16, &dma->control);
1450 while (readl(&dma->status) & RUN)
1451 udelay(1);
1452
Linus Torvalds1da177e2005-04-16 15:20:36 -07001453 /* Build DBDMA commands list */
1454 sg = hwif->sg_table;
1455 while (i && sg_dma_len(sg)) {
1456 u32 cur_addr;
1457 u32 cur_len;
1458
1459 cur_addr = sg_dma_address(sg);
1460 cur_len = sg_dma_len(sg);
1461
1462 if (pmif->broken_dma && cur_addr & (L1_CACHE_BYTES - 1)) {
1463 if (pmif->broken_dma_warn == 0) {
Joe Perchesaca38a52007-11-27 21:35:55 +01001464 printk(KERN_WARNING "%s: DMA on non aligned address, "
Linus Torvalds1da177e2005-04-16 15:20:36 -07001465 "switching to PIO on Ohare chipset\n", drive->name);
1466 pmif->broken_dma_warn = 1;
1467 }
Bartlomiej Zolnierkiewicz11998b32009-03-31 20:15:21 +02001468 return 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001469 }
1470 while (cur_len) {
1471 unsigned int tc = (cur_len < 0xfe00)? cur_len: 0xfe00;
1472
1473 if (count++ >= MAX_DCMDS) {
1474 printk(KERN_WARNING "%s: DMA table too small\n",
1475 drive->name);
Bartlomiej Zolnierkiewicz11998b32009-03-31 20:15:21 +02001476 return 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001477 }
1478 st_le16(&table->command, wr? OUTPUT_MORE: INPUT_MORE);
1479 st_le16(&table->req_count, tc);
1480 st_le32(&table->phy_addr, cur_addr);
1481 table->cmd_dep = 0;
1482 table->xfer_status = 0;
1483 table->res_count = 0;
1484 cur_addr += tc;
1485 cur_len -= tc;
1486 ++table;
1487 }
Jens Axboe55c16a72007-07-25 08:13:56 +02001488 sg = sg_next(sg);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001489 i--;
1490 }
1491
1492 /* convert the last command to an input/output last command */
1493 if (count) {
1494 st_le16(&table[-1].command, wr? OUTPUT_LAST: INPUT_LAST);
1495 /* add the stop command to the end of the list */
1496 memset(table, 0, sizeof(struct dbdma_cmd));
1497 st_le16(&table->command, DBDMA_STOP);
1498 mb();
1499 writel(hwif->dmatable_dma, &dma->cmdptr);
1500 return 1;
1501 }
1502
1503 printk(KERN_DEBUG "%s: empty DMA table?\n", drive->name);
Bartlomiej Zolnierkiewiczf6fb7862008-02-01 23:09:31 +01001504
Linus Torvalds1da177e2005-04-16 15:20:36 -07001505 return 0; /* revert to PIO for this request */
1506}
1507
Linus Torvalds1da177e2005-04-16 15:20:36 -07001508/*
Linus Torvalds1da177e2005-04-16 15:20:36 -07001509 * Prepare a DMA transfer. We build the DMA table, adjust the timings for
1510 * a read on KeyLargo ATA/66 and mark us as waiting for DMA completion
1511 */
Bartlomiej Zolnierkiewicz229816942009-03-27 12:46:46 +01001512static int pmac_ide_dma_setup(ide_drive_t *drive, struct ide_cmd *cmd)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001513{
Bartlomiej Zolnierkiewicz898ec222009-01-06 17:20:52 +01001514 ide_hwif_t *hwif = drive->hwif;
Bartlomiej Zolnierkiewicz7b8797a2008-07-23 19:55:48 +02001515 pmac_ide_hwif_t *pmif =
1516 (pmac_ide_hwif_t *)dev_get_drvdata(hwif->gendev.parent);
Bartlomiej Zolnierkiewicz9055ba32008-10-13 21:39:45 +02001517 u8 unit = drive->dn & 1, ata4 = (pmif->kind == controller_kl_ata4);
Bartlomiej Zolnierkiewicz229816942009-03-27 12:46:46 +01001518 u8 write = !!(cmd->tf_flags & IDE_TFLAG_WRITE);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001519
Bartlomiej Zolnierkiewicz11998b32009-03-31 20:15:21 +02001520 if (pmac_ide_build_dmatable(drive, cmd) == 0)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001521 return 1;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001522
1523 /* Apple adds 60ns to wrDataSetup on reads */
1524 if (ata4 && (pmif->timings[unit] & TR_66_UDMA_EN)) {
Bartlomiej Zolnierkiewicz229816942009-03-27 12:46:46 +01001525 writel(pmif->timings[unit] + (write ? 0 : 0x00800000UL),
Linus Torvalds1da177e2005-04-16 15:20:36 -07001526 PMAC_IDE_REG(IDE_TIMING_CONFIG));
1527 (void)readl(PMAC_IDE_REG(IDE_TIMING_CONFIG));
1528 }
1529
Linus Torvalds1da177e2005-04-16 15:20:36 -07001530 return 0;
1531}
1532
Linus Torvalds1da177e2005-04-16 15:20:36 -07001533/*
1534 * Kick the DMA controller into life after the DMA command has been issued
1535 * to the drive.
1536 */
Jon Loeligeraacaf9b2005-09-17 10:36:54 -05001537static void
Linus Torvalds1da177e2005-04-16 15:20:36 -07001538pmac_ide_dma_start(ide_drive_t *drive)
1539{
Bartlomiej Zolnierkiewicz7b8797a2008-07-23 19:55:48 +02001540 ide_hwif_t *hwif = drive->hwif;
1541 pmac_ide_hwif_t *pmif =
1542 (pmac_ide_hwif_t *)dev_get_drvdata(hwif->gendev.parent);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001543 volatile struct dbdma_regs __iomem *dma;
1544
1545 dma = pmif->dma_regs;
1546
1547 writel((RUN << 16) | RUN, &dma->control);
1548 /* Make sure it gets to the controller right now */
1549 (void)readl(&dma->control);
1550}
1551
1552/*
1553 * After a DMA transfer, make sure the controller is stopped
1554 */
Jon Loeligeraacaf9b2005-09-17 10:36:54 -05001555static int
Linus Torvalds1da177e2005-04-16 15:20:36 -07001556pmac_ide_dma_end (ide_drive_t *drive)
1557{
Bartlomiej Zolnierkiewicz7b8797a2008-07-23 19:55:48 +02001558 ide_hwif_t *hwif = drive->hwif;
1559 pmac_ide_hwif_t *pmif =
1560 (pmac_ide_hwif_t *)dev_get_drvdata(hwif->gendev.parent);
Bartlomiej Zolnierkiewicz9055ba32008-10-13 21:39:45 +02001561 volatile struct dbdma_regs __iomem *dma = pmif->dma_regs;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001562 u32 dstat;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001563
Linus Torvalds1da177e2005-04-16 15:20:36 -07001564 dstat = readl(&dma->status);
1565 writel(((RUN|WAKE|DEAD) << 16), &dma->control);
Bartlomiej Zolnierkiewiczf5e0b5e2008-10-13 21:39:45 +02001566
Linus Torvalds1da177e2005-04-16 15:20:36 -07001567 /* verify good dma status. we don't check for ACTIVE beeing 0. We should...
1568 * in theory, but with ATAPI decices doing buffer underruns, that would
1569 * cause us to disable DMA, which isn't what we want
1570 */
1571 return (dstat & (RUN|DEAD)) != RUN;
1572}
1573
1574/*
1575 * Check out that the interrupt we got was for us. We can't always know this
1576 * for sure with those Apple interfaces (well, we could on the recent ones but
1577 * that's not implemented yet), on the other hand, we don't have shared interrupts
1578 * so it's not really a problem
1579 */
Jon Loeligeraacaf9b2005-09-17 10:36:54 -05001580static int
Linus Torvalds1da177e2005-04-16 15:20:36 -07001581pmac_ide_dma_test_irq (ide_drive_t *drive)
1582{
Bartlomiej Zolnierkiewicz7b8797a2008-07-23 19:55:48 +02001583 ide_hwif_t *hwif = drive->hwif;
1584 pmac_ide_hwif_t *pmif =
1585 (pmac_ide_hwif_t *)dev_get_drvdata(hwif->gendev.parent);
Bartlomiej Zolnierkiewicz9055ba32008-10-13 21:39:45 +02001586 volatile struct dbdma_regs __iomem *dma = pmif->dma_regs;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001587 unsigned long status, timeout;
1588
Linus Torvalds1da177e2005-04-16 15:20:36 -07001589 /* We have to things to deal with here:
1590 *
1591 * - The dbdma won't stop if the command was started
1592 * but completed with an error without transferring all
1593 * datas. This happens when bad blocks are met during
1594 * a multi-block transfer.
1595 *
1596 * - The dbdma fifo hasn't yet finished flushing to
1597 * to system memory when the disk interrupt occurs.
1598 *
1599 */
1600
1601 /* If ACTIVE is cleared, the STOP command have passed and
1602 * transfer is complete.
1603 */
1604 status = readl(&dma->status);
1605 if (!(status & ACTIVE))
1606 return 1;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001607
1608 /* If dbdma didn't execute the STOP command yet, the
1609 * active bit is still set. We consider that we aren't
1610 * sharing interrupts (which is hopefully the case with
1611 * those controllers) and so we just try to flush the
1612 * channel for pending data in the fifo
1613 */
1614 udelay(1);
1615 writel((FLUSH << 16) | FLUSH, &dma->control);
1616 timeout = 0;
1617 for (;;) {
1618 udelay(1);
1619 status = readl(&dma->status);
1620 if ((status & FLUSH) == 0)
1621 break;
1622 if (++timeout > 100) {
1623 printk(KERN_WARNING "ide%d, ide_dma_test_irq \
Bartlomiej Zolnierkiewicz898ec222009-01-06 17:20:52 +01001624 timeout flushing channel\n", hwif->index);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001625 break;
1626 }
1627 }
1628 return 1;
1629}
1630
Bartlomiej Zolnierkiewicz15ce9262008-01-26 20:13:03 +01001631static void pmac_ide_dma_host_set(ide_drive_t *drive, int on)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001632{
Linus Torvalds1da177e2005-04-16 15:20:36 -07001633}
1634
Sergei Shtylyov841d2a92007-07-09 23:17:54 +02001635static void
1636pmac_ide_dma_lost_irq (ide_drive_t *drive)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001637{
Bartlomiej Zolnierkiewicz7b8797a2008-07-23 19:55:48 +02001638 ide_hwif_t *hwif = drive->hwif;
1639 pmac_ide_hwif_t *pmif =
1640 (pmac_ide_hwif_t *)dev_get_drvdata(hwif->gendev.parent);
Bartlomiej Zolnierkiewicz9055ba32008-10-13 21:39:45 +02001641 volatile struct dbdma_regs __iomem *dma = pmif->dma_regs;
1642 unsigned long status = readl(&dma->status);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001643
Linus Torvalds1da177e2005-04-16 15:20:36 -07001644 printk(KERN_ERR "ide-pmac lost interrupt, dma status: %lx\n", status);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001645}
1646
Bartlomiej Zolnierkiewiczf37afda2008-04-26 22:25:24 +02001647static const struct ide_dma_ops pmac_dma_ops = {
Bartlomiej Zolnierkiewicz5e37bdc2008-04-26 22:25:24 +02001648 .dma_host_set = pmac_ide_dma_host_set,
1649 .dma_setup = pmac_ide_dma_setup,
Bartlomiej Zolnierkiewicz5e37bdc2008-04-26 22:25:24 +02001650 .dma_start = pmac_ide_dma_start,
1651 .dma_end = pmac_ide_dma_end,
1652 .dma_test_irq = pmac_ide_dma_test_irq,
Bartlomiej Zolnierkiewicz5e37bdc2008-04-26 22:25:24 +02001653 .dma_lost_irq = pmac_ide_dma_lost_irq,
1654};
1655
Linus Torvalds1da177e2005-04-16 15:20:36 -07001656/*
1657 * Allocate the data structures needed for using DMA with an interface
1658 * and fill the proper list of functions pointers
1659 */
Bartlomiej Zolnierkiewicz0d071922008-04-26 22:25:22 +02001660static int __devinit pmac_ide_init_dma(ide_hwif_t *hwif,
1661 const struct ide_port_info *d)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001662{
Bartlomiej Zolnierkiewicz7b8797a2008-07-23 19:55:48 +02001663 pmac_ide_hwif_t *pmif =
1664 (pmac_ide_hwif_t *)dev_get_drvdata(hwif->gendev.parent);
Bartlomiej Zolnierkiewicz36501652008-02-01 23:09:31 +01001665 struct pci_dev *dev = to_pci_dev(hwif->dev);
1666
Linus Torvalds1da177e2005-04-16 15:20:36 -07001667 /* We won't need pci_dev if we switch to generic consistent
1668 * DMA routines ...
1669 */
Bartlomiej Zolnierkiewicz0d071922008-04-26 22:25:22 +02001670 if (dev == NULL || pmif->dma_regs == 0)
Bartlomiej Zolnierkiewiczc413b9b2008-02-02 19:56:31 +01001671 return -ENODEV;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001672 /*
1673 * Allocate space for the DBDMA commands.
1674 * The +2 is +1 for the stop command and +1 to allow for
1675 * aligning the start address to a multiple of 16 bytes.
1676 */
1677 pmif->dma_table_cpu = (struct dbdma_cmd*)pci_alloc_consistent(
Bartlomiej Zolnierkiewicz36501652008-02-01 23:09:31 +01001678 dev,
Linus Torvalds1da177e2005-04-16 15:20:36 -07001679 (MAX_DCMDS + 2) * sizeof(struct dbdma_cmd),
1680 &hwif->dmatable_dma);
1681 if (pmif->dma_table_cpu == NULL) {
1682 printk(KERN_ERR "%s: unable to allocate DMA command list\n",
1683 hwif->name);
Bartlomiej Zolnierkiewiczc413b9b2008-02-02 19:56:31 +01001684 return -ENOMEM;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001685 }
1686
Bartlomiej Zolnierkiewicz4f52a322008-01-26 20:13:08 +01001687 hwif->sg_max_nents = MAX_DCMDS;
1688
Bartlomiej Zolnierkiewiczc413b9b2008-02-02 19:56:31 +01001689 return 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001690}
Bartlomiej Zolnierkiewiczade2daf2008-01-26 20:13:07 +01001691
1692module_init(pmac_ide_probe);
Adrian Bunkde9facb2008-04-02 21:22:03 +02001693
1694MODULE_LICENSE("GPL");