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gerrit-public.fairphone.software / kernel / msm / 957c7dfe1b2fb49cbeda8022e1cae62cd1ceffba / . / arch / arm / boot / dts / msm8226.dtsi
blob: b8361005ccd309cd10bbaaf8151768d79e257047 [file] [log] [blame]
Mitchel Humpherys85d08692012-10-23 12:56:35 -0700[diff] [blame]1/* Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700[diff] [blame]2 *
3 * This program is free software; you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License version 2 and
5 * only version 2 as published by the Free Software Foundation.
6 *
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
11 */
12
13/include/ "skeleton.dtsi"
Stepan Moskovchenko7d8cdcaa2013-04-25 17:10:55 -0700[diff] [blame]14
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700[diff] [blame]15/ {
16 model = "Qualcomm MSM 8226";
17 compatible = "qcom,msm8226";
18 interrupt-parent = <&intc>;
19
Gilad Avidovd59217c2013-02-01 13:45:59 -0700[diff] [blame]20 aliases {
21 spi0 = &spi_0;
Sahitya Tummala9e001362013-03-28 11:00:55 +0530[diff] [blame]22 sdhc1 = &sdhc_1; /* SDC1 eMMC slot */
23 sdhc2 = &sdhc_2; /* SDC2 SD card slot */
Krishna Kondaf92e4262013-07-08 16:21:57 -0700[diff] [blame]24 sdhc3 = &sdhc_3; /* SDC3 SDIO slot */
Gilad Avidovd59217c2013-02-01 13:45:59 -0700[diff] [blame]25 };
26
Laura Abbottf3196b22013-03-11 16:22:34 -0700[diff] [blame]27 memory {
28 secure_mem: secure_region {
29 linux,contiguous-region;
Shalaj Jain5ce2fde2013-05-10 13:22:33 -0700[diff] [blame]30 reg = <0 0x6D00000>;
Laura Abbottf3196b22013-03-11 16:22:34 -0700[diff] [blame]31 label = "secure_mem";
32 };
Laura Abbott429e82b2013-03-25 13:03:06 -0700[diff] [blame]33
Krupal Divvela756ee0f2013-06-12 03:42:55 +0530[diff] [blame]34 adsp_mem: adsp_region {
35 linux,contiguous-region;
36 reg = <0 0x2000000>;
37 label = "adsp_mem";
38 };
39
Laura Abbott429e82b2013-03-25 13:03:06 -0700[diff] [blame]40 qsecom_mem: qsecom_region {
41 linux,contiguous-region;
42 reg = <0 0x780000>;
43 label = "qsecom_mem";
44 };
Stepan Moskovchenko7d8cdcaa2013-04-25 17:10:55 -0700[diff] [blame]45 };
Laura Abbott429e82b2013-03-25 13:03:06 -0700[diff] [blame]46
Stepan Moskovchenko7d8cdcaa2013-04-25 17:10:55 -0700[diff] [blame]47 soc: soc { };
48};
49
50/include/ "msm8226-ion.dtsi"
51/include/ "msm8226-camera.dtsi"
52/include/ "msm-gdsc.dtsi"
53/include/ "msm8226-iommu.dtsi"
54/include/ "msm8226-pm.dtsi"
55/include/ "msm8226-smp2p.dtsi"
56/include/ "msm8226-gpu.dtsi"
57/include/ "msm8226-bus.dtsi"
58/include/ "msm8226-mdss.dtsi"
59/include/ "msm8226-coresight.dtsi"
60/include/ "msm8226-iommu-domains.dtsi"
61
62&soc {
63 #address-cells = <1>;
64 #size-cells = <1>;
65 ranges;
66
67 intc: interrupt-controller@f9000000 {
68 compatible = "qcom,msm-qgic2";
69 interrupt-controller;
70 #interrupt-cells = <3>;
71 reg = <0xF9000000 0x1000>,
72 <0xF9002000 0x1000>;
73 };
74
75 msmgpio: gpio@fd510000 {
76 compatible = "qcom,msm-gpio";
77 interrupt-controller;
78 #interrupt-cells = <2>;
79 reg = <0xfd510000 0x4000>;
80 gpio-controller;
81 #gpio-cells = <2>;
82 ngpio = <117>;
83 interrupts = <0 208 0>;
84 qcom,direct-connect-irqs = <8>;
Laura Abbottf3196b22013-03-11 16:22:34 -0700[diff] [blame]85 };
86
Abhimanyu Kapur58d303a72013-04-30 16:13:41 -0700[diff] [blame]87 qcom,mpm2-sleep-counter@fc4a3000 {
88 compatible = "qcom,mpm2-sleep-counter";
89 reg = <0xfc4a3000 0x1000>;
90 clock-frequency = <32768>;
91 };
92
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700[diff] [blame]93 timer {
Syed Rameez Mustafa0824d6c2012-11-29 18:53:56 -0800[diff] [blame]94 compatible = "arm,armv7-timer";
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700[diff] [blame]95 interrupts = <1 2 0 1 3 0>;
96 clock-frequency = <19200000>;
97 };
98
Stephen Boyd72759f62013-04-10 14:20:27 -0700[diff] [blame]99 timer@f9020000 {
100 #address-cells = <1>;
101 #size-cells = <1>;
102 ranges;
103 compatible = "arm,armv7-timer-mem";
104 reg = <0xf9020000 0x1000>;
105 clock-frequency = <19200000>;
106
107 frame@f9021000 {
108 frame-number = <0>;
109 interrupts = <0 8 0x4>,
110 <0 7 0x4>;
111 reg = <0xf9021000 0x1000>,
112 <0xf9022000 0x1000>;
113 };
114
115 frame@f9023000 {
116 frame-number = <1>;
117 interrupts = <0 9 0x4>;
118 reg = <0xf9023000 0x1000>;
119 status = "disabled";
120 };
121
122 frame@f9024000 {
123 frame-number = <2>;
124 interrupts = <0 10 0x4>;
125 reg = <0xf9024000 0x1000>;
126 status = "disabled";
127 };
128
129 frame@f9025000 {
130 frame-number = <3>;
131 interrupts = <0 11 0x4>;
132 reg = <0xf9025000 0x1000>;
133 status = "disabled";
134 };
135
136 frame@f9026000 {
137 frame-number = <4>;
138 interrupts = <0 12 0x4>;
139 reg = <0xf9026000 0x1000>;
140 status = "disabled";
141 };
142
143 frame@f9027000 {
144 frame-number = <5>;
145 interrupts = <0 13 0x4>;
146 reg = <0xf9027000 0x1000>;
147 status = "disabled";
148 };
149
150 frame@f9028000 {
151 frame-number = <6>;
152 interrupts = <0 14 0x4>;
153 reg = <0xf9028000 0x1000>;
154 status = "disabled";
155 };
156 };
157
Ashray Kulkarnifbf88dbd2013-02-22 18:02:26 -0800[diff] [blame]158 qcom,vidc@fdc00000 {
159 compatible = "qcom,msm-vidc";
160 reg = <0xfdc00000 0xff000>;
161 interrupts = <0 44 0>;
162 qcom,load-freq-tbl = <352800 160000000>,
163 <244800 133330000>,
164 <108000 66700000>;
165 qcom,hfi = "venus";
166 qcom,bus-ports = <1>;
167 qcom,reg-presets = <0xE0024 0x0>,
168 <0x80124 0x3>,
169 <0xE0020 0x5555556>,
170 <0x800B0 0x10101001>,
171 <0x800B4 0x00101010>,
172 <0x800C0 0x1010100f>,
173 <0x800C4 0x00101010>,
174 <0x800D0 0x00000010>,
175 <0x800D4 0x00000010>,
176 <0x800D8 0x00000707>;
177 qcom,enc-ddr-ab-ib = <0 0>,
178 <129000 142000>,
179 <384000 422000>,
180 <866000 953000>;
181 qcom,dec-ddr-ab-ib = <0 0>,
182 <103000 134000>,
183 <268000 348000>,
184 <505000 657000>;
185 qcom,iommu-groups = <&venus_domain_ns &venus_domain_cp>;
186 qcom,iommu-group-buffer-types = <0xfff 0x1ff>;
187 qcom,buffer-type-tz-usage-table = <0x1 0x1>,
188 <0x1fe 0x2>;
Deva Ramasubramanian74b1dda2013-03-27 13:16:17 -0700[diff] [blame]189 qcom,max-hw-load = <352800>; /* 720p @ 30 + 1080p @ 30 */
Ashray Kulkarnifbf88dbd2013-02-22 18:02:26 -0800[diff] [blame]190 };
191
192 qcom,wfd {
193 compatible = "qcom,msm-wfd";
194 };
195
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700[diff] [blame]196 serial@f991f000 {
197 compatible = "qcom,msm-lsuart-v14";
198 reg = <0xf991f000 0x1000>;
199 interrupts = <0 109 0>;
200 status = "disabled";
201 };
202
203 serial@f995e000 {
204 compatible = "qcom,msm-lsuart-v14";
205 reg = <0xf995e000 0x1000>;
206 interrupts = <0 114 0>;
207 status = "disabled";
208 };
209
Abhimanyu Kapur032b1f42013-01-18 00:10:50 -0800[diff] [blame]210 qcom,msm-imem@fe805000 {
211 compatible = "qcom,msm-imem";
212 reg = <0xfe805000 0x1000>; /* Address and size of IMEM */
213 };
214
Yan He7c06ce32012-12-03 17:12:31 -0800[diff] [blame]215 qcom,sps@f9984000 {
216 compatible = "qcom,msm_sps";
217 reg = <0xf9984000 0x15000>,
218 <0xf9999000 0xb000>;
219 interrupts = <0 94 0>;
220 };
221
Vamsi Krishna840835b2013-04-01 22:01:05 -0700[diff] [blame]222 qcom,usbbam@f9a44000 {
223 compatible = "qcom,usb-bam-msm";
224 reg = <0xf9a44000 0x11000>;
225 reg-names = "hsusb";
226 interrupts = <0 135 0>;
227 interrupt-names = "hsusb";
228 qcom,usb-bam-num-pipes = <16>;
229 qcom,usb-bam-fifo-baseaddr = <0xfe803000>;
230 qcom,ignore-core-reset-ack;
231 qcom,disable-clk-gating;
232
233 qcom,pipe0 {
234 label = "hsusb-qdss-in-0";
235 qcom,usb-bam-mem-type = <3>;
236 qcom,bam-type = <1>;
237 qcom,dir = <1>;
238 qcom,pipe-num = <0>;
239 qcom,peer-bam = <1>;
240 qcom,src-bam-physical-address = <0xfc37c000>;
241 qcom,src-bam-pipe-index = <0>;
242 qcom,dst-bam-physical-address = <0xf9a44000>;
243 qcom,dst-bam-pipe-index = <2>;
244 qcom,data-fifo-offset = <0x0>;
245 qcom,data-fifo-size = <0x600>;
246 qcom,descriptor-fifo-offset = <0x600>;
247 qcom,descriptor-fifo-size = <0x200>;
248 };
249 };
250
Manu Gautam41334e92013-06-04 17:49:25 +0530[diff] [blame]251 usb_otg: usb@f9a55000 {
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700[diff] [blame]252 compatible = "qcom,hsusb-otg";
253 reg = <0xf9a55000 0x400>;
Mayank Ranaac2a54f2013-01-17 10:14:35 +0530[diff] [blame]254 interrupts = <0 134 0>, <0 140 0>;
255 interrupt-names = "core_irq", "async_irq";
Mayank Rana8335a772013-03-06 10:12:27 +0530[diff] [blame]256 hsusb_vdd_dig-supply = <&pm8226_s1_corner>;
David Keitel7184c6e2013-02-11 13:23:04 -0800[diff] [blame]257 HSUSB_1p8-supply = <&pm8226_l10>;
258 HSUSB_3p3-supply = <&pm8226_l20>;
Mayank Rana8335a772013-03-06 10:12:27 +0530[diff] [blame]259 qcom,vdd-voltage-level = <1 5 7>;
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700[diff] [blame]260
Vamsi Krishna1f265912013-04-22 22:50:06 -0700[diff] [blame]261 qcom,hsusb-otg-phy-init-seq =
262 <0x44 0x80 0x68 0x81 0x24 0x82 0x13 0x83 0xffffffff>;
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700[diff] [blame]263 qcom,hsusb-otg-phy-type = <2>;
264 qcom,hsusb-otg-mode = <1>;
Vamsi Krishna0d564102013-03-02 15:26:55 -0800[diff] [blame]265 qcom,hsusb-otg-otg-control = <2>;
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700[diff] [blame]266 qcom,hsusb-otg-disable-reset;
Mayank Rana15f01b52013-03-08 18:28:56 +0530[diff] [blame]267 qcom,dp-manual-pullup;
Mayank Rana5403e2a2013-02-26 11:18:39 +0530[diff] [blame]268
Manu Gautam41334e92013-06-04 17:49:25 +0530[diff] [blame]269 qcom,msm-bus,name = "usb";
Manu Gautam861c5852013-06-20 16:21:05 +0530[diff] [blame]270 qcom,msm-bus,num-cases = <3>;
Mayank Rana5403e2a2013-02-26 11:18:39 +0530[diff] [blame]271 qcom,msm-bus,num-paths = <1>;
272 qcom,msm-bus,vectors-KBps =
273 <87 512 0 0>,
Manu Gautam861c5852013-06-20 16:21:05 +0530[diff] [blame]274 <87 512 60000 960000>,
275 <87 512 6000 6000>;
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700[diff] [blame]276 };
277
Mayank Rana6bd9a272013-01-29 16:23:23 +0530[diff] [blame]278 android_usb@fe8050c8 {
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700[diff] [blame]279 compatible = "qcom,android-usb";
Mayank Rana6bd9a272013-01-29 16:23:23 +0530[diff] [blame]280 reg = <0xfe8050c8 0xc8>;
Chiranjeevi Velempati9d797662013-04-22 15:45:38 +0530[diff] [blame]281 qcom,android-usb-cdrom;
Manu Gautam1bdb7802013-05-22 12:48:35 +0530[diff] [blame]282 qcom,android-usb-swfi-latency = <1>;
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700[diff] [blame]283 };
284
Bhalchandra Gajare555bceb2012-12-12 22:48:34 -0800[diff] [blame]285 wcd9xxx_intc: wcd9xxx-irq {
286 compatible = "qcom,wcd9xxx-irq";
287 interrupt-controller;
288 #interrupt-cells = <1>;
289 interrupt-parent = <&msmgpio>;
290 interrupts = <68 0>;
291 interrupt-names = "cdc-int";
292 };
293
Phani Kumar Uppalapati5f285bf2013-05-05 23:36:57 -0700[diff] [blame]294 slim_msm: slim@fe12f000 {
Bhalchandra Gajarefb785972012-12-06 19:25:10 -0800[diff] [blame]295 cell-index = <1>;
296 compatible = "qcom,slim-ngd";
297 reg = <0xfe12f000 0x35000>,
298 <0xfe104000 0x20000>;
299 reg-names = "slimbus_physical", "slimbus_bam_physical";
300 interrupts = <0 163 0>, <0 164 0>;
301 interrupt-names = "slimbus_irq", "slimbus_bam_irq";
Bhalchandra Gajare555bceb2012-12-12 22:48:34 -0800[diff] [blame]302
303 tapan_codec {
304 compatible = "qcom,tapan-slim-pgd";
305 elemental-addr = [00 01 E0 00 17 02];
306
307 interrupt-parent = <&wcd9xxx_intc>;
308 interrupts = <0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
309 17 18 19 20 21 22 23 24 25 26 27 28>;
310 qcom,cdc-reset-gpio = <&msmgpio 72 0>;
311
David Keitel7184c6e2013-02-11 13:23:04 -0800[diff] [blame]312 cdc-vdd-buck-supply = <&pm8226_s4>;
Bhalchandra Gajare482ef672013-06-20 15:28:59 -0700[diff] [blame]313 qcom,cdc-vdd-buck-voltage = <1800000 2150000>;
Bhalchandra Gajare555bceb2012-12-12 22:48:34 -0800[diff] [blame]314 qcom,cdc-vdd-buck-current = <650000>;
315
David Keitel7184c6e2013-02-11 13:23:04 -0800[diff] [blame]316 cdc-vdd-h-supply = <&pm8226_l6>;
Bhalchandra Gajare555bceb2012-12-12 22:48:34 -0800[diff] [blame]317 qcom,cdc-vdd-h-voltage = <1800000 1800000>;
318 qcom,cdc-vdd-h-current = <25000>;
319
David Keitel7184c6e2013-02-11 13:23:04 -0800[diff] [blame]320 cdc-vdd-px-supply = <&pm8226_l6>;
Bhalchandra Gajare555bceb2012-12-12 22:48:34 -0800[diff] [blame]321 qcom,cdc-vdd-px-voltage = <1800000 1800000>;
322 qcom,cdc-vdd-px-current = <25000>;
323
David Keitel7184c6e2013-02-11 13:23:04 -0800[diff] [blame]324 cdc-vdd-a-1p2v-supply = <&pm8226_l4>;
Bhalchandra Gajare555bceb2012-12-12 22:48:34 -0800[diff] [blame]325 qcom,cdc-vdd-a-1p2v-voltage = <1200000 1200000>;
326 qcom,cdc-vdd-a-1p2v-current = <10000>;
327
David Keitel7184c6e2013-02-11 13:23:04 -0800[diff] [blame]328 cdc-vdd-cx-supply = <&pm8226_l4>;
Bhalchandra Gajare555bceb2012-12-12 22:48:34 -0800[diff] [blame]329 qcom,cdc-vdd-cx-voltage = <1200000 1200000>;
330 qcom,cdc-vdd-cx-current = <10000>;
331
Joonwoo Park73239212013-04-10 15:11:06 -0700[diff] [blame]332 qcom,cdc-static-supplies = "cdc-vdd-buck",
333 "cdc-vdd-h",
334 "cdc-vdd-px",
335 "cdc-vdd-a-1p2v",
336 "cdc-vdd-cx";
337
Bhalchandra Gajare555bceb2012-12-12 22:48:34 -0800[diff] [blame]338 qcom,cdc-micbias-ldoh-v = <0x3>;
339 qcom,cdc-micbias-cfilt1-mv = <1800>;
Phani Kumar Uppalapatiab0d98a2013-05-21 23:04:15 -0700[diff] [blame]340 qcom,cdc-micbias-cfilt2-mv = <2700>;
Bhalchandra Gajare555bceb2012-12-12 22:48:34 -0800[diff] [blame]341 qcom,cdc-micbias-cfilt3-mv = <1800>;
342
343 qcom,cdc-micbias1-cfilt-sel = <0x0>;
344 qcom,cdc-micbias2-cfilt-sel = <0x1>;
345 qcom,cdc-micbias3-cfilt-sel = <0x2>;
346
347 qcom,cdc-mclk-clk-rate = <9600000>;
348 qcom,cdc-slim-ifd = "tapan-slim-ifd";
349 qcom,cdc-slim-ifd-elemental-addr = [00 00 E0 00 17 02];
350 };
Bhalchandra Gajarefb785972012-12-06 19:25:10 -0800[diff] [blame]351 };
352
Bhalchandra Gajaree1915b82012-12-12 17:28:39 -0800[diff] [blame]353 qcom,msm-adsp-loader {
354 compatible = "qcom,adsp-loader";
355 qcom,adsp-state = <0>;
356 };
357
Bhalchandra Gajare03a40ec2012-12-17 11:38:28 -0800[diff] [blame]358 sound {
359 compatible = "qcom,msm8226-audio-tapan";
360 qcom,model = "msm8226-tapan-snd-card";
Bhalchandra Gajare03a40ec2012-12-17 11:38:28 -0800[diff] [blame]361 qcom,tapan-mclk-clk-freq = <9600000>;
Banajit Goswamif9921532013-05-10 11:24:52 -0700[diff] [blame]362 qcom,prim-auxpcm-gpio-clk = <&msmgpio 63 0>;
363 qcom,prim-auxpcm-gpio-sync = <&msmgpio 64 0>;
364 qcom,prim-auxpcm-gpio-din = <&msmgpio 65 0>;
365 qcom,prim-auxpcm-gpio-dout = <&msmgpio 66 0>;
366 qcom,prim-auxpcm-gpio-set = "prim-gpio-prim";
Bhalchandra Gajare03a40ec2012-12-17 11:38:28 -0800[diff] [blame]367 };
368
369 qcom,msm-pcm {
370 compatible = "qcom,msm-pcm-dsp";
Bhalchandra Gajare510d4422013-03-01 21:07:12 -0800[diff] [blame]371 qcom,msm-pcm-dsp-id = <0>;
Bhalchandra Gajare03a40ec2012-12-17 11:38:28 -0800[diff] [blame]372 };
373
374 qcom,msm-pcm-routing {
375 compatible = "qcom,msm-pcm-routing";
376 };
377
Bhalchandra Gajare18468a62013-03-11 18:32:49 -0700[diff] [blame]378 qcom,msm-pcm-low-latency {
379 compatible = "qcom,msm-pcm-dsp";
380 qcom,msm-pcm-dsp-id = <1>;
381 qcom,msm-pcm-low-latency;
382 };
383
Bhalchandra Gajare03a40ec2012-12-17 11:38:28 -0800[diff] [blame]384 qcom,msm-pcm-lpa {
385 compatible = "qcom,msm-pcm-lpa";
386 };
387
388 qcom,msm-compr-dsp {
389 compatible = "qcom,msm-compr-dsp";
390 };
391
392 qcom,msm-voip-dsp {
393 compatible = "qcom,msm-voip-dsp";
394 };
395
396 qcom,msm-pcm-voice {
397 compatible = "qcom,msm-pcm-voice";
398 };
399
400 qcom,msm-stub-codec {
401 compatible = "qcom,msm-stub-codec";
402 };
403
404 qcom,msm-dai-fe {
405 compatible = "qcom,msm-dai-fe";
406 };
407
408 qcom,msm-pcm-afe {
409 compatible = "qcom,msm-pcm-afe";
410 };
411
412 qcom,msm-dai-q6-hdmi {
413 compatible = "qcom,msm-dai-q6-hdmi";
414 qcom,msm-dai-q6-dev-id = <8>;
415 };
416
417 qcom,msm-dai-q6 {
418 compatible = "qcom,msm-dai-q6";
419 qcom,msm-dai-q6-sb-0-rx {
420 compatible = "qcom,msm-dai-q6-dev";
421 qcom,msm-dai-q6-dev-id = <16384>;
422 };
423
424 qcom,msm-dai-q6-sb-0-tx {
425 compatible = "qcom,msm-dai-q6-dev";
426 qcom,msm-dai-q6-dev-id = <16385>;
427 };
428
429 qcom,msm-dai-q6-sb-1-rx {
430 compatible = "qcom,msm-dai-q6-dev";
431 qcom,msm-dai-q6-dev-id = <16386>;
432 };
433
434 qcom,msm-dai-q6-sb-1-tx {
435 compatible = "qcom,msm-dai-q6-dev";
436 qcom,msm-dai-q6-dev-id = <16387>;
437 };
438
439 qcom,msm-dai-q6-sb-3-rx {
440 compatible = "qcom,msm-dai-q6-dev";
441 qcom,msm-dai-q6-dev-id = <16390>;
442 };
443
444 qcom,msm-dai-q6-sb-3-tx {
445 compatible = "qcom,msm-dai-q6-dev";
446 qcom,msm-dai-q6-dev-id = <16391>;
447 };
448
449 qcom,msm-dai-q6-sb-4-rx {
450 compatible = "qcom,msm-dai-q6-dev";
451 qcom,msm-dai-q6-dev-id = <16392>;
452 };
453
454 qcom,msm-dai-q6-sb-4-tx {
455 compatible = "qcom,msm-dai-q6-dev";
456 qcom,msm-dai-q6-dev-id = <16393>;
457 };
458
459 qcom,msm-dai-q6-bt-sco-rx {
460 compatible = "qcom,msm-dai-q6-dev";
461 qcom,msm-dai-q6-dev-id = <12288>;
462 };
463
464 qcom,msm-dai-q6-bt-sco-tx {
465 compatible = "qcom,msm-dai-q6-dev";
466 qcom,msm-dai-q6-dev-id = <12289>;
467 };
468
469 qcom,msm-dai-q6-int-fm-rx {
470 compatible = "qcom,msm-dai-q6-dev";
471 qcom,msm-dai-q6-dev-id = <12292>;
472 };
473
474 qcom,msm-dai-q6-int-fm-tx {
475 compatible = "qcom,msm-dai-q6-dev";
476 qcom,msm-dai-q6-dev-id = <12293>;
477 };
478
479 qcom,msm-dai-q6-be-afe-pcm-rx {
480 compatible = "qcom,msm-dai-q6-dev";
481 qcom,msm-dai-q6-dev-id = <224>;
482 };
483
484 qcom,msm-dai-q6-be-afe-pcm-tx {
485 compatible = "qcom,msm-dai-q6-dev";
486 qcom,msm-dai-q6-dev-id = <225>;
487 };
488
489 qcom,msm-dai-q6-afe-proxy-rx {
490 compatible = "qcom,msm-dai-q6-dev";
491 qcom,msm-dai-q6-dev-id = <241>;
492 };
493
494 qcom,msm-dai-q6-afe-proxy-tx {
495 compatible = "qcom,msm-dai-q6-dev";
496 qcom,msm-dai-q6-dev-id = <240>;
497 };
Vicky Sehrawat2ef554c2013-03-12 17:24:20 -0700[diff] [blame]498
499 qcom,msm-dai-q6-incall-record-rx {
500 compatible = "qcom,msm-dai-q6-dev";
501 qcom,msm-dai-q6-dev-id = <32771>;
502 };
503
504 qcom,msm-dai-q6-incall-record-tx {
505 compatible = "qcom,msm-dai-q6-dev";
506 qcom,msm-dai-q6-dev-id = <32772>;
507 };
508
509 qcom,msm-dai-q6-incall-music-rx {
510 compatible = "qcom,msm-dai-q6-dev";
511 qcom,msm-dai-q6-dev-id = <32773>;
512 };
Vicky Sehrawat5ac670f2013-05-17 16:32:13 -0700[diff] [blame]513
514 qcom,msm-dai-q6-incall-music-2-rx {
515 compatible = "qcom,msm-dai-q6-dev";
516 qcom,msm-dai-q6-dev-id = <32770>;
517 };
Bhalchandra Gajare03a40ec2012-12-17 11:38:28 -0800[diff] [blame]518 };
519
520 qcom,msm-pcm-hostless {
521 compatible = "qcom,msm-pcm-hostless";
522 };
523
Patrick Laiafd82122013-06-15 22:50:04 -0700[diff] [blame]524 qcom,msm-pri-auxpcm {
525 compatible = "qcom,msm-auxpcm-dev";
Banajit Goswamif9921532013-05-10 11:24:52 -0700[diff] [blame]526 qcom,msm-cpudai-auxpcm-mode = <0>, <0>;
527 qcom,msm-cpudai-auxpcm-sync = <1>, <1>;
528 qcom,msm-cpudai-auxpcm-frame = <5>, <4>;
529 qcom,msm-cpudai-auxpcm-quant = <2>, <2>;
530 qcom,msm-cpudai-auxpcm-slot = <1>, <1>;
531 qcom,msm-cpudai-auxpcm-data = <0>, <0>;
532 qcom,msm-cpudai-auxpcm-pcm-clk-rate = <2048000>, <2048000>;
Patrick Laiafd82122013-06-15 22:50:04 -0700[diff] [blame]533 qcom,msm-auxpcm-interface = "primary";
Banajit Goswamif9921532013-05-10 11:24:52 -0700[diff] [blame]534 };
535
Sheng Fangb6a06482013-03-20 13:21:36 +0800[diff] [blame]536 qcom,wcnss-wlan@fb000000 {
537 compatible = "qcom,wcnss_wlan";
Sameer Thalappil58281ca2013-04-10 18:50:18 -0700[diff] [blame]538 reg = <0xfb000000 0x280000>,
539 <0xf9011008 0x04>;
540 reg-names = "wcnss_mmio", "wcnss_fiq";
Sheng Fangb6a06482013-03-20 13:21:36 +0800[diff] [blame]541 interrupts = <0 145 0 0 146 0>;
542 interrupt-names = "wcnss_wlantx_irq", "wcnss_wlanrx_irq";
543
544 qcom,pronto-vddmx-supply = <&pm8226_l3>;
545 qcom,pronto-vddcx-supply = <&pm8226_s1>;
546 qcom,pronto-vddpx-supply = <&pm8226_l6>;
547 qcom,iris-vddxo-supply = <&pm8226_l10>;
548 qcom,iris-vddrfa-supply = <&pm8226_l24>;
549 qcom,iris-vddpa-supply = <&pm8226_l16>;
550 qcom,iris-vdddig-supply = <&pm8226_l24>;
551
552 gpios = <&msmgpio 40 0>, <&msmgpio 41 0>, <&msmgpio 42 0>, <&msmgpio 43 0>, <&msmgpio 44 0>;
Sameer Thalappil820f87b2013-05-21 20:40:54 -0700[diff] [blame]553 qcom,has-pronto-hw;
554 qcom,has-autodetect-xo;
Sheng Fangb6a06482013-03-20 13:21:36 +0800[diff] [blame]555 };
rockiec44833a32013-03-21 02:06:14 +0800[diff] [blame]556
557 qcom,msm-adsp-sensors {
558 compatible = "qcom,msm-adsp-sensors";
559 qcom,src-id = <11>;
560 qcom,dst-id = <604>;
561 qcom,ab = <32505856>;
562 qcom,ib = <32505856>;
563 };
564
Mitchel Humpherys5fe1c9b2012-10-09 17:30:19 -0700[diff] [blame]565 qcom,wdt@f9017000 {
566 compatible = "qcom,msm-watchdog";
567 reg = <0xf9017000 0x1000>;
568 interrupts = <0 3 0>, <0 4 0>;
569 qcom,bark-time = <11000>;
570 qcom,pet-time = <10000>;
Mitchel Humpherys1be23802012-11-16 15:52:32 -0800[diff] [blame]571 qcom,ipi-ping;
Mitchel Humpherys5fe1c9b2012-10-09 17:30:19 -0700[diff] [blame]572 };
573
Jeff Hugo7f9705b62012-10-12 10:38:26 -0600[diff] [blame]574 qcom,smem@fa00000 {
575 compatible = "qcom,smem";
Jeff Hugo41e5c2f2013-04-26 11:38:32 -0600[diff] [blame]576 reg = <0xfa00000 0x100000>,
Stepan Moskovchenkod6ee8262013-02-06 11:26:05 -0800[diff] [blame]577 <0xf9011000 0x1000>,
Jeff Hugo7f9705b62012-10-12 10:38:26 -0600[diff] [blame]578 <0xfc428000 0x4000>;
579 reg-names = "smem", "irq-reg-base", "aux-mem1";
580
581 qcom,smd-modem {
582 compatible = "qcom,smd";
583 qcom,smd-edge = <0>;
584 qcom,smd-irq-offset = <0x8>;
585 qcom,smd-irq-bitmask = <0x1000>;
586 qcom,pil-string = "modem";
587 interrupts = <0 25 1>;
David Ngb715e322012-12-01 12:57:08 -0800[diff] [blame]588 };
Jeff Hugo7f9705b62012-10-12 10:38:26 -0600[diff] [blame]589
590 qcom,smsm-modem {
591 compatible = "qcom,smsm";
592 qcom,smsm-edge = <0>;
593 qcom,smsm-irq-offset = <0x8>;
594 qcom,smsm-irq-bitmask = <0x2000>;
595 interrupts = <0 26 1>;
David Ngb715e322012-12-01 12:57:08 -0800[diff] [blame]596 };
Jeff Hugo7f9705b62012-10-12 10:38:26 -0600[diff] [blame]597
598 qcom,smd-adsp {
599 compatible = "qcom,smd";
600 qcom,smd-edge = <1>;
601 qcom,smd-irq-offset = <0x8>;
602 qcom,smd-irq-bitmask = <0x100>;
603 qcom,pil-string = "adsp";
604 interrupts = <0 156 1>;
David Ngb715e322012-12-01 12:57:08 -0800[diff] [blame]605 };
Jeff Hugo7f9705b62012-10-12 10:38:26 -0600[diff] [blame]606
607 qcom,smsm-adsp {
608 compatible = "qcom,smsm";
609 qcom,smsm-edge = <1>;
610 qcom,smsm-irq-offset = <0x8>;
611 qcom,smsm-irq-bitmask = <0x200>;
612 interrupts = <0 157 1>;
David Ngb715e322012-12-01 12:57:08 -0800[diff] [blame]613 };
Jeff Hugo7f9705b62012-10-12 10:38:26 -0600[diff] [blame]614
615 qcom,smd-wcnss {
616 compatible = "qcom,smd";
617 qcom,smd-edge = <6>;
618 qcom,smd-irq-offset = <0x8>;
619 qcom,smd-irq-bitmask = <0x20000>;
620 qcom,pil-string = "wcnss";
621 interrupts = <0 142 1>;
David Ngb715e322012-12-01 12:57:08 -0800[diff] [blame]622 };
Jeff Hugo7f9705b62012-10-12 10:38:26 -0600[diff] [blame]623
624 qcom,smsm-wcnss {
625 compatible = "qcom,smsm";
626 qcom,smsm-edge = <6>;
627 qcom,smsm-irq-offset = <0x8>;
628 qcom,smsm-irq-bitmask = <0x80000>;
629 interrupts = <0 144 1>;
David Ngb715e322012-12-01 12:57:08 -0800[diff] [blame]630 };
Jeff Hugo7f9705b62012-10-12 10:38:26 -0600[diff] [blame]631
632 qcom,smd-rpm {
633 compatible = "qcom,smd";
634 qcom,smd-edge = <15>;
635 qcom,smd-irq-offset = <0x8>;
636 qcom,smd-irq-bitmask = <0x1>;
637 interrupts = <0 168 1>;
638 qcom,irq-no-suspend;
David Ngb715e322012-12-01 12:57:08 -0800[diff] [blame]639 };
Jeff Hugo7f9705b62012-10-12 10:38:26 -0600[diff] [blame]640 };
641
Praveen Chidambaramc8af25e2012-12-19 11:27:36 -0700[diff] [blame]642 rpm_bus: qcom,rpm-smd {
643 compatible = "qcom,rpm-smd";
644 rpm-channel-name = "rpm_requests";
645 rpm-channel-type = <15>; /* SMD_APPS_RPM */
Praveen Chidambaramc8af25e2012-12-19 11:27:36 -0700[diff] [blame]646 };
647
Jennifer Liu86687d52013-05-29 15:51:40 -0700[diff] [blame]648 qcom,bcl {
649 compatible = "qcom,bcl";
650 };
651
Asutosh Das99912e62012-12-06 12:38:46 +0530[diff] [blame]652 sdcc1: qcom,sdcc@f9824000 {
653 cell-index = <1>; /* SDC1 eMMC slot */
654 compatible = "qcom,msm-sdcc";
655
Asutosh Das6b82fc52012-11-23 12:00:26 +0530[diff] [blame]656 reg = <0xf9824000 0x800>,
657 <0xf9824800 0x100>,
658 <0xf9804000 0x7000>;
659 reg-names = "core_mem", "dml_mem", "bam_mem";
660 interrupts = <0 123 0>, <0 137 0>;
661 interrupt-names = "core_irq", "bam_irq";
Asutosh Das99912e62012-12-06 12:38:46 +0530[diff] [blame]662
663 qcom,bus-width = <8>;
Krishna Konda9fc6aeb2013-06-11 20:26:16 -0700[diff] [blame]664
665 qcom,msm-bus,name = "sdcc1";
666 qcom,msm-bus,num-cases = <8>;
667 qcom,msm-bus,num-paths = <1>;
668 qcom,msm-bus,vectors-KBps = <78 512 0 0>, /* No vote */
669 <78 512 1600 3200>, /* 400 KB/s*/
670 <78 512 80000 160000>, /* 20 MB/s */
671 <78 512 100000 200000>, /* 25 MB/s */
672 <78 512 200000 400000>, /* 50 MB/s */
673 <78 512 400000 800000>, /* 100 MB/s */
674 <78 512 400000 800000>, /* 200 MB/s */
675 <78 512 2048000 4096000>; /* Max. bandwidth */
676 qcom,bus-bw-vectors-bps = <0 400000 20000000 25000000 50000000
677 100000000 200000000 4294967295>;
678
Asutosh Das99912e62012-12-06 12:38:46 +0530[diff] [blame]679 status = "disabled";
680 };
681
Sahitya Tummala9e001362013-03-28 11:00:55 +0530[diff] [blame]682 sdhc_1: sdhci@f9824900 {
683 compatible = "qcom,sdhci-msm";
684 reg = <0xf9824900 0x11c>, <0xf9824000 0x800>;
685 reg-names = "hc_mem", "core_mem";
686
687 interrupts = <0 123 0>, <0 138 0>;
688 interrupt-names = "hc_irq", "pwr_irq";
689
690 qcom,bus-width = <8>;
Krishna Konda9fc6aeb2013-06-11 20:26:16 -0700[diff] [blame]691
692 qcom,msm-bus,name = "sdhc1";
693 qcom,msm-bus,num-cases = <8>;
694 qcom,msm-bus,num-paths = <1>;
695 qcom,msm-bus,vectors-KBps = <78 512 0 0>, /* No vote */
696 <78 512 1600 3200>, /* 400 KB/s*/
697 <78 512 80000 160000>, /* 20 MB/s */
698 <78 512 100000 200000>, /* 25 MB/s */
699 <78 512 200000 400000>, /* 50 MB/s */
700 <78 512 400000 800000>, /* 100 MB/s */
701 <78 512 400000 800000>, /* 200 MB/s */
702 <78 512 2048000 4096000>; /* Max. bandwidth */
703 qcom,bus-bw-vectors-bps = <0 400000 20000000 25000000 50000000
704 100000000 200000000 4294967295>;
705
Sahitya Tummala9e001362013-03-28 11:00:55 +0530[diff] [blame]706 status = "disabled";
707 };
708
Asutosh Das99912e62012-12-06 12:38:46 +0530[diff] [blame]709 sdcc2: qcom,sdcc@f98a4000 {
710 cell-index = <2>; /* SDC2 SD card slot */
711 compatible = "qcom,msm-sdcc";
712
Asutosh Das6b82fc52012-11-23 12:00:26 +0530[diff] [blame]713 reg = <0xf98a4000 0x800>,
714 <0xf98a4800 0x100>,
715 <0xf9884000 0x7000>;
716 reg-names = "core_mem", "dml_mem", "bam_mem";
717 interrupts = <0 125 0>, <0 220 0>;
718 interrupt-names = "core_irq", "bam_irq";
Asutosh Das99912e62012-12-06 12:38:46 +0530[diff] [blame]719
720 qcom,bus-width = <4>;
Krishna Konda9fc6aeb2013-06-11 20:26:16 -0700[diff] [blame]721
722 qcom,msm-bus,name = "sdcc2";
723 qcom,msm-bus,num-cases = <8>;
724 qcom,msm-bus,num-paths = <1>;
725 qcom,msm-bus,vectors-KBps = <81 512 0 0>, /* No vote */
726 <81 512 1600 3200>, /* 400 KB/s*/
727 <81 512 80000 160000>, /* 20 MB/s */
728 <81 512 100000 200000>, /* 25 MB/s */
729 <81 512 200000 400000>, /* 50 MB/s */
730 <81 512 400000 800000>, /* 100 MB/s */
731 <81 512 400000 800000>, /* 200 MB/s */
732 <81 512 2048000 4096000>; /* Max. bandwidth */
733 qcom,bus-bw-vectors-bps = <0 400000 20000000 25000000 50000000
734 100000000 200000000 4294967295>;
735
Asutosh Das99912e62012-12-06 12:38:46 +0530[diff] [blame]736 status = "disabled";
737 };
Kenneth Heitkee5804002012-11-15 17:50:07 -0700[diff] [blame]738
Sahitya Tummala9e001362013-03-28 11:00:55 +0530[diff] [blame]739 sdhc_2: sdhci@f98a4900 {
740 compatible = "qcom,sdhci-msm";
741 reg = <0xf98a4900 0x11c>, <0xf98a4000 0x800>;
742 reg-names = "hc_mem", "core_mem";
743
744 interrupts = <0 125 0>, <0 221 0>;
745 interrupt-names = "hc_irq", "pwr_irq";
746
747 qcom,bus-width = <4>;
Krishna Konda9fc6aeb2013-06-11 20:26:16 -0700[diff] [blame]748
749 qcom,msm-bus,name = "sdhc2";
750 qcom,msm-bus,num-cases = <8>;
751 qcom,msm-bus,num-paths = <1>;
752 qcom,msm-bus,vectors-KBps = <81 512 0 0>, /* No vote */
753 <81 512 1600 3200>, /* 400 KB/s*/
754 <81 512 80000 160000>, /* 20 MB/s */
755 <81 512 100000 200000>, /* 25 MB/s */
756 <81 512 200000 400000>, /* 50 MB/s */
757 <81 512 400000 800000>, /* 100 MB/s */
758 <81 512 400000 800000>, /* 200 MB/s */
759 <81 512 2048000 4096000>; /* Max. bandwidth */
760 qcom,bus-bw-vectors-bps = <0 400000 20000000 25000000 50000000
761 100000000 200000000 4294967295>;
762
Sahitya Tummala9e001362013-03-28 11:00:55 +0530[diff] [blame]763 status = "disabled";
764 };
765
Krishna Kondaf92e4262013-07-08 16:21:57 -0700[diff] [blame]766 sdcc3: qcom,sdcc@f9864000 {
767 cell-index = <3>;
768 compatible = "qcom,msm-sdcc";
769 reg = <0xf9864000 0x800>,
770 <0xf9864800 0x100>,
771 <0xf9844000 0x7000>;
772 reg-names = "core_mem", "dml_mem", "bam_mem";
773
774 qcom,bus-width = <4>;
775 gpios = <&msmgpio 44 0>, /* CLK */
776 <&msmgpio 43 0>, /* CMD */
777 <&msmgpio 42 0>, /* DATA0 */
778 <&msmgpio 41 0>, /* DATA1 */
779 <&msmgpio 40 0>, /* DATA2 */
780 <&msmgpio 39 0>; /* DATA3 */
781 qcom,gpio-names = "CLK", "CMD", "DAT0", "DAT1", "DAT2", "DAT3";
782
783 qcom,clk-rates = <400000 20000000 25000000 50000000 100000000>;
784
785 qcom,msm-bus,name = "sdcc3";
786 qcom,msm-bus,num-cases = <8>;
787 qcom,msm-bus,num-paths = <1>;
788 qcom,msm-bus,vectors-KBps = <79 512 0 0>, /* No vote */
789 <79 512 1600 3200>, /* 400 KB/s*/
790 <79 512 80000 160000>, /* 20 MB/s */
791 <79 512 100000 200000>, /* 25 MB/s */
792 <79 512 200000 400000>, /* 50 MB/s */
793 <79 512 400000 800000>, /* 100 MB/s */
794 <79 512 400000 800000>, /* 200 MB/s */
795 <79 512 2048000 4096000>; /* Max. bandwidth */
796 qcom,bus-bw-vectors-bps = <0 400000 20000000 25000000 50000000
797 100000000 200000000 4294967295>;
798
799 #address-cells = <0>;
800 interrupt-parent = <&sdcc3>;
801 interrupts = <0 1 2>;
802 #interrupt-cells = <1>;
803 interrupt-map-mask = <0xffffffff>;
804 interrupt-map = <0 &intc 0 127 0
805 1 &intc 0 223 0
806 2 &msmgpio 41 0x8>;
807 interrupt-names = "core_irq", "bam_irq", "sdiowakeup_irq";
808
809 status = "disabled";
810 };
811
812 sdhc_3: sdhci@f9864900 {
813 compatible = "qcom,sdhci-msm";
814 reg = <0xf9864900 0x11c>, <0xf9864000 0x800>;
815 reg-names = "hc_mem", "core_mem";
816
817 qcom,bus-width = <4>;
818 gpios = <&msmgpio 44 0>, /* CLK */
819 <&msmgpio 43 0>, /* CMD */
820 <&msmgpio 42 0>, /* DATA0 */
821 <&msmgpio 41 0>, /* DATA1 */
822 <&msmgpio 40 0>, /* DATA2 */
823 <&msmgpio 39 0>; /* DATA3 */
824 qcom,gpio-names = "CLK", "CMD", "DAT0", "DAT1", "DAT2", "DAT3";
825
826 qcom,clk-rates = <400000 20000000 25000000 50000000 100000000>;
827
828 qcom,msm-bus,name = "sdhc3";
829 qcom,msm-bus,num-cases = <8>;
830 qcom,msm-bus,num-paths = <1>;
831 qcom,msm-bus,vectors-KBps = <79 512 0 0>, /* No vote */
832 <79 512 1600 3200>, /* 400 KB/s*/
833 <79 512 80000 160000>, /* 20 MB/s */
834 <79 512 100000 200000>, /* 25 MB/s */
835 <79 512 200000 400000>, /* 50 MB/s */
836 <79 512 400000 800000>, /* 100 MB/s */
837 <79 512 400000 800000>, /* 200 MB/s */
838 <79 512 2048000 4096000>; /* Max. bandwidth */
839 qcom,bus-bw-vectors-bps = <0 400000 20000000 25000000 50000000
840 100000000 200000000 4294967295>;
841
842 #address-cells = <0>;
843 interrupt-parent = <&sdhc_3>;
844 interrupts = <0 1 2>;
845 #interrupt-cells = <1>;
846 interrupt-map-mask = <0xffffffff>;
847 interrupt-map = <0 &intc 0 127 0
848 1 &intc 0 224 0
849 2 &msmgpio 41 0x8>;
850 interrupt-names = "hc_irq", "pwr_irq", "sdiowakeup_irq";
851
852 status = "disabled";
853 };
854
Kenneth Heitkee5804002012-11-15 17:50:07 -0700[diff] [blame]855 spmi_bus: qcom,spmi@fc4c0000 {
856 cell-index = <0>;
857 compatible = "qcom,spmi-pmic-arb";
Kenneth Heitke366b8a42012-12-18 13:51:37 -0700[diff] [blame]858 reg-names = "core", "intr", "cnfg";
Kenneth Heitkee5804002012-11-15 17:50:07 -0700[diff] [blame]859 reg = <0xfc4cf000 0x1000>,
Kenneth Heitke366b8a42012-12-18 13:51:37 -0700[diff] [blame]860 <0Xfc4cb000 0x1000>,
861 <0Xfc4ca000 0x1000>;
Kenneth Heitkee5804002012-11-15 17:50:07 -0700[diff] [blame]862 /* 190,ee0_krait_hlos_spmi_periph_irq */
863 /* 187,channel_0_krait_hlos_trans_done_irq */
864 interrupts = <0 190 0>, <0 187 0>;
Kenneth Heitkee5804002012-11-15 17:50:07 -0700[diff] [blame]865 qcom,pmic-arb-ee = <0>;
866 qcom,pmic-arb-channel = <0>;
Kenneth Heitkee5804002012-11-15 17:50:07 -0700[diff] [blame]867 };
868
Madan Mohan Koyyalamudi2d7c6f52013-06-19 17:49:45 -0700[diff] [blame]869 i2c@f9925000 { /* BLSP-1 QUP-3 */
870 cell-index = <2>;
871 compatible = "qcom,i2c-qup";
872 reg = <0xf9925000 0x1000>;
873 #address-cells = <1>;
874 #size-cells = <0>;
875 reg-names = "qup_phys_addr";
876 interrupts = <0 97 0>;
877 interrupt-names = "qup_err_intr";
878 qcom,i2c-bus-freq = <400000>;
879 qcom,i2c-src-freq = <19200000>;
880 };
Gilad Avidov28e18eb2012-11-21 18:13:25 -0700[diff] [blame]881 i2c@f9926000 { /* BLSP-1 QUP-4 */
882 cell-index = <0>;
883 compatible = "qcom,i2c-qup";
884 reg = <0xf9926000 0x1000>;
885 #address-cells = <1>;
886 #size-cells = <0>;
887 reg-names = "qup_phys_addr";
888 interrupts = <0 98 0>;
889 interrupt-names = "qup_err_intr";
890 qcom,i2c-bus-freq = <100000>;
891 };
Patrick Daly99a52ca2012-10-23 12:00:45 -0700[diff] [blame]892
Amy Maloche41708ba2013-03-03 15:19:27 -0800[diff] [blame]893 i2c@f9927000 { /* BLSP1 QUP5 */
894 cell-index = <5>;
895 compatible = "qcom,i2c-qup";
896 #address-cells = <1>;
897 #size-cells = <0>;
898 reg-names = "qup_phys_addr";
899 reg = <0xf9927000 0x1000>;
900 interrupt-names = "qup_err_intr";
901 interrupts = <0 99 0>;
Amy Maloche118e5d62013-05-01 14:53:35 -0700[diff] [blame]902 qcom,i2c-bus-freq = <384000>;
Amy Maloche41708ba2013-03-03 15:19:27 -0800[diff] [blame]903 qcom,i2c-src-freq = <19200000>;
904 };
905
Patrick Daly99a52ca2012-10-23 12:00:45 -0700[diff] [blame]906 qcom,acpuclk@f9011050 {
907 compatible = "qcom,acpuclk-a7";
Patrick Daly4fd80f42013-06-18 11:09:15 -0700[diff] [blame]908 reg = <0xf9011050 0x8>;
909 reg-names = "rcg_base";
Patrick Dalyf9451d22013-03-20 14:20:12 -0700[diff] [blame]910 a7_cpu-supply = <&apc_vreg_corner>;
Patrick Daly99a52ca2012-10-23 12:00:45 -0700[diff] [blame]911 };
Mitchel Humpherys00beacf2012-10-11 13:53:43 -0700[diff] [blame]912
913 qcom,ocmem@fdd00000 {
914 compatible = "qcom,msm-ocmem";
915 reg = <0xfdd00000 0x2000>,
916 <0xfdd02000 0x2000>,
917 <0xfe039000 0x400>,
Mitchel Humpherys1da744d2013-03-08 17:20:41 -0800[diff] [blame]918 <0xfec00000 0x20000>;
Mitchel Humpherys00beacf2012-10-11 13:53:43 -0700[diff] [blame]919 reg-names = "ocmem_ctrl_physical", "dm_ctrl_physical", "br_ctrl_physical", "ocmem_physical";
920 interrupts = <0 76 0 0 77 0>;
921 interrupt-names = "ocmem_irq", "dm_irq";
922 qcom,ocmem-num-regions = <0x1>;
923 qcom,ocmem-num-macros = <0x2>;
924 qcom,resource-type = <0x706d636f>;
925 #address-cells = <1>;
926 #size-cells = <1>;
Mitchel Humpherys1da744d2013-03-08 17:20:41 -0800[diff] [blame]927 ranges = <0x0 0xfec00000 0x20000>;
Mitchel Humpherys00beacf2012-10-11 13:53:43 -0700[diff] [blame]928
929 partition@0 {
Mitchel Humpherys1da744d2013-03-08 17:20:41 -0800[diff] [blame]930 reg = <0x0 0x20000>;
Mitchel Humpherys00beacf2012-10-11 13:53:43 -0700[diff] [blame]931 qcom,ocmem-part-name = "graphics";
Mitchel Humpherys1da744d2013-03-08 17:20:41 -0800[diff] [blame]932 qcom,ocmem-part-min = <0x20000>;
Mitchel Humpherys00beacf2012-10-11 13:53:43 -0700[diff] [blame]933 };
934 };
935
Patrick Dalyb83f0b02013-01-09 12:36:19 -0800[diff] [blame]936 qcom,venus@fdce0000 {
937 compatible = "qcom,pil-venus";
938 reg = <0xfdce0000 0x4000>,
939 <0xfdc80000 0x400>;
940 reg-names = "wrapper_base", "vbif_base";
941 vdd-supply = <&gdsc_venus>;
942
943 qcom,firmware-name = "venus";
944 };
Patrick Daly1e3bc6c2013-01-09 12:34:25 -0800[diff] [blame]945
946 qcom,pronto@fb21b000 {
947 compatible = "qcom,pil-pronto";
948 reg = <0xfb21b000 0x3000>,
949 <0xfc401700 0x4>,
950 <0xfd485300 0xc>;
951 reg-names = "pmu_base", "clk_base", "halt_base";
952 interrupts = <0 149 1>;
David Keitel7184c6e2013-02-11 13:23:04 -0800[diff] [blame]953 vdd_pronto_pll-supply = <&pm8226_l8>;
Patrick Daly1e3bc6c2013-01-09 12:34:25 -0800[diff] [blame]954
955 qcom,firmware-name = "wcnss";
Sameer Thalappil5c2c41b2013-04-02 11:08:21 -0700[diff] [blame]956
Sameer Thalappil4ba86302013-04-05 17:36:54 -0700[diff] [blame]957 /* GPIO inputs from wcnss */
Sameer Thalappil5c2c41b2013-04-02 11:08:21 -0700[diff] [blame]958 qcom,gpio-err-fatal = <&smp2pgpio_ssr_smp2p_4_in 0 0>;
Sameer Thalappilb1e03c02013-04-29 14:52:00 -0700[diff] [blame]959 qcom,gpio-err-ready = <&smp2pgpio_ssr_smp2p_4_in 1 0>;
Sameer Thalappil4ba86302013-04-05 17:36:54 -0700[diff] [blame]960 qcom,gpio-proxy-unvote = <&smp2pgpio_ssr_smp2p_4_in 2 0>;
Sameer Thalappil5c2c41b2013-04-02 11:08:21 -0700[diff] [blame]961
962 /* GPIO output to wcnss */
963 qcom,gpio-force-stop = <&smp2pgpio_ssr_smp2p_4_out 0 0>;
Patrick Daly1e3bc6c2013-01-09 12:34:25 -0800[diff] [blame]964 };
Neeti Desai1f7ca2d2012-11-21 13:25:57 -0800[diff] [blame]965
Sheng Fang0a85b0d2013-03-19 08:16:51 +0800[diff] [blame]966 qcom,iris-fm {
967 compatible = "qcom,iris_fm";
968 };
969
Patrick Daly4df59842013-01-09 12:31:40 -0800[diff] [blame]970 qcom,lpass@fe200000 {
971 compatible = "qcom,pil-q6v5-lpass";
972 reg = <0xfe200000 0x00100>,
Matt Wagantall015b50af2013-03-05 18:51:16 -0800[diff] [blame]973 <0xfd485100 0x00010>,
974 <0xfc4016c0 0x00004>;
975 reg-names = "qdsp6_base", "halt_base", "restart_reg";
David Keitelf4c8b8b2013-02-25 15:25:27 -0800[diff] [blame]976 vdd_cx-supply = <&pm8226_s1_corner>;
Patrick Daly4df59842013-01-09 12:31:40 -0800[diff] [blame]977 interrupts = <0 162 1>;
978
979 qcom,firmware-name = "adsp";
Ravishankar Sarawadi2e8ac7d2013-03-28 15:23:30 -0700[diff] [blame]980
Ravishankar Sarawadiab203a82013-04-09 18:46:11 -0700[diff] [blame]981 /* GPIO inputs from lpass */
Ravishankar Sarawadi2e8ac7d2013-03-28 15:23:30 -0700[diff] [blame]982 qcom,gpio-err-fatal = <&smp2pgpio_ssr_smp2p_2_in 0 0>;
Ravishankar Sarawadiab203a82013-04-09 18:46:11 -0700[diff] [blame]983 qcom,gpio-proxy-unvote = <&smp2pgpio_ssr_smp2p_2_in 2 0>;
Ravishankar Sarawadi7edc9d72013-04-09 18:15:03 -0700[diff] [blame]984 qcom,gpio-err-ready = <&smp2pgpio_ssr_smp2p_2_in 1 0>;
Ravishankar Sarawadi2e8ac7d2013-03-28 15:23:30 -0700[diff] [blame]985
986 /* GPIO output to lpass */
987 qcom,gpio-force-stop = <&smp2pgpio_ssr_smp2p_2_out 0 0>;
Patrick Daly4df59842013-01-09 12:31:40 -0800[diff] [blame]988 };
989
Patrick Daly742337f2013-01-29 12:06:06 -0800[diff] [blame]990 qcom,mss@fc880000 {
991 compatible = "qcom,pil-q6v5-mss";
992 reg = <0xfc880000 0x100>,
993 <0xfd485000 0x400>,
994 <0xfc820000 0x020>,
995 <0xfc401680 0x004>,
Patrick Daly742337f2013-01-29 12:06:06 -0800[diff] [blame]996 <0xfd485194 0x4>;
997 reg-names = "qdsp6_base", "halt_base", "rmb_base",
Matt Wagantall724b2bb2013-03-18 14:54:06 -0700[diff] [blame]998 "restart_reg", "cxrail_bhs_reg";
Patrick Daly742337f2013-01-29 12:06:06 -0800[diff] [blame]999
1000 interrupts = <0 24 1>;
Patrick Daly742337f2013-01-29 12:06:06 -0800[diff] [blame]1001 vdd_cx-supply = <&pm8226_s1_corner>;
1002 vdd_mx-supply = <&pm8226_l3>;
1003 vdd_pll-supply = <&pm8226_l8>;
1004 qcom,vdd_pll = <1800000>;
1005
1006 qcom,is-loadable;
1007 qcom,firmware-name = "mba";
1008 qcom,pil-self-auth;
Patrick Dalyfe258e22013-03-22 21:02:14 -0700[diff] [blame]1009
Seemanta Duttaa0f253e2013-01-16 18:54:40 -0800[diff] [blame]1010 /* GPIO inputs from mss */
Patrick Dalyfe258e22013-03-22 21:02:14 -0700[diff] [blame]1011 qcom,gpio-err-fatal = <&smp2pgpio_ssr_smp2p_1_in 0 0>;
Seemanta Dutta9fb72ed2013-01-25 14:22:15 -0800[diff] [blame]1012 qcom,gpio-err-ready = <&smp2pgpio_ssr_smp2p_1_in 1 0>;
Seemanta Duttaa0f253e2013-01-16 18:54:40 -0800[diff] [blame]1013 qcom,gpio-proxy-unvote = <&smp2pgpio_ssr_smp2p_1_in 2 0>;
Seemanta Dutta0adbbf02013-03-12 17:26:17 -0700[diff] [blame]1014 qcom,gpio-stop-ack = <&smp2pgpio_ssr_smp2p_1_in 3 0>;
Patrick Dalyfe258e22013-03-22 21:02:14 -0700[diff] [blame]1015
1016 /* GPIO output to mss */
1017 qcom,gpio-force-stop = <&smp2pgpio_ssr_smp2p_1_out 0 0>;
Patrick Daly742337f2013-01-29 12:06:06 -0800[diff] [blame]1018 };
1019
Neeti Desai1f7ca2d2012-11-21 13:25:57 -0800[diff] [blame]1020 qcom,msm-mem-hole {
1021 compatible = "qcom,msm-mem-hole";
Neeti Desai3d0a98b2013-04-10 10:41:03 -0700[diff] [blame]1022 qcom,memblock-remove = <0x6400000 0x9b00000>; /* Address and Size of Hole */
Neeti Desai1f7ca2d2012-11-21 13:25:57 -0800[diff] [blame]1023 };
Siddartha Mohanadossfcd98562013-02-13 08:53:22 -0800[diff] [blame]1024
1025 tsens: tsens@fc4a8000 {
1026 compatible = "qcom,msm-tsens";
1027 reg = <0xfc4a8000 0x2000>,
Siddartha Mohanadoss6ddc1922013-07-08 17:40:11 -0700[diff] [blame]1028 <0xfc4bc000 0x1000>;
Siddartha Mohanadossfcd98562013-02-13 08:53:22 -0800[diff] [blame]1029 reg-names = "tsens_physical", "tsens_eeprom_physical";
1030 interrupts = <0 184 0>;
Siddartha Mohanadoss9a4e94a2013-03-06 19:15:59 -0800[diff] [blame]1031 qcom,sensors = <4>;
1032 qcom,slope = <2901 2846 3038 2955>;
Siddartha Mohanadossfcd98562013-02-13 08:53:22 -0800[diff] [blame]1033 qcom,calib-mode = "fuse_map2";
1034 };
Praveen Chidambarama03bda52013-02-12 21:23:13 -0700[diff] [blame]1035
1036 qcom,msm-thermal {
1037 compatible = "qcom,msm-thermal";
1038 qcom,sensor-id = <0>;
1039 qcom,poll-ms = <250>;
1040 qcom,limit-temp = <60>;
1041 qcom,temp-hysteresis = <10>;
1042 qcom,freq-step = <2>;
Praveen Chidambarama7435ce2013-05-03 12:52:42 -0600[diff] [blame]1043 qcom,freq-control-mask = <0xf>;
Jennifer Liu003438d2013-06-21 11:24:20 -0700[diff] [blame]1044 qcom,core-limit-temp = <80>;
1045 qcom,core-temp-hysteresis = <10>;
1046 qcom,core-control-mask = <0xe>;
Jennifer Liu53bb5642013-06-26 10:42:42 -0700[diff] [blame]1047 qcom,vdd-restriction-temp = <5>;
1048 qcom,vdd-restriction-temp-hysteresis = <10>;
1049 vdd-dig-supply = <&pm8226_s1_floor_corner>;
1050
1051 qcom,vdd-dig-rstr{
1052 qcom,vdd-rstr-reg = "vdd-dig";
1053 qcom,levels = <5 7 7>; /* Nominal, Super Turbo, Super Turbo */
1054 qcom,min-level = <1>; /* No Request */
1055 };
1056
1057 qcom,vdd-apps-rstr{
1058 qcom,vdd-rstr-reg = "vdd-apps";
1059 qcom,levels = <600000 787200 998400>;
1060 qcom,freq-req;
1061 };
Praveen Chidambarama03bda52013-02-12 21:23:13 -0700[diff] [blame]1062 };
1063
Gilad Avidovd59217c2013-02-01 13:45:59 -0700[diff] [blame]1064 spi_0: spi@f9923000 { /* BLSP1 QUP1 */
1065 compatible = "qcom,spi-qup-v2";
1066 #address-cells = <1>;
1067 #size-cells = <0>;
1068 reg-names = "spi_physical", "spi_bam_physical";
1069 reg = <0xf9923000 0x1000>,
1070 <0xf9904000 0xF000>;
1071 interrupt-names = "spi_irq", "spi_bam_irq";
1072 interrupts = <0 95 0>, <0 238 0>;
1073 spi-max-frequency = <19200000>;
1074
1075 gpios = <&msmgpio 3 0>, /* CLK */
1076 <&msmgpio 1 0>, /* MISO */
1077 <&msmgpio 0 0>; /* MOSI */
aiqunyb1e82f32013-03-13 15:35:53 -0700[diff] [blame]1078 cs-gpios = <&msmgpio 22 0>;
Gilad Avidovd59217c2013-02-01 13:45:59 -0700[diff] [blame]1079
1080 qcom,infinite-mode = <0>;
1081 qcom,use-bam;
1082 qcom,ver-reg-exists;
1083 qcom,bam-consumer-pipe-index = <12>;
1084 qcom,bam-producer-pipe-index = <13>;
1085 };
1086
Jeff Hugo72e10912013-03-05 11:17:38 -0700[diff] [blame]1087 qcom,bam_dmux@fc834000 {
1088 compatible = "qcom,bam_dmux";
1089 reg = <0xfc834000 0x7000>;
1090 interrupts = <0 29 1>;
1091 };
Pushkar Joshi4f3aa0b2013-03-07 22:44:04 -0800[diff] [blame]1092
1093 qcom,msm-rtb {
1094 compatible = "qcom,msm-rtb";
1095 qcom,memory-reservation-type = "EBI1";
1096 qcom,memory-reservation-size = <0x100000>; /* 1M EBI1 buffer */
1097 };
Hariprasad Dhalinarasimhaadf89cc2013-03-13 13:41:05 -0700[diff] [blame]1098
Hariprasad Dhalinarasimhab548ee52013-03-11 19:06:30 -0700[diff] [blame]1099 qcom,msm-rng@f9bff000 {
1100 compatible = "qcom,msm-rng";
1101 reg = <0xf9bff000 0x200>;
1102 qcom,msm-rng-iface-clk;
Hariprasad Dhalinarasimhae799fb72013-06-03 13:51:38 -0700[diff] [blame]1103 qcom,msm-bus,name = "msm-rng-noc";
1104 qcom,msm-bus,num-cases = <2>;
1105 qcom,msm-bus,num-paths = <1>;
1106 qcom,msm-bus,vectors-KBps =
1107 <1 618 0 0>,
1108 <1 618 0 800>;
Hariprasad Dhalinarasimhab548ee52013-03-11 19:06:30 -0700[diff] [blame]1109 };
Hariprasad Dhalinarasimhaadf89cc2013-03-13 13:41:05 -0700[diff] [blame]1110
Hariprasad Dhalinarasimha4ba4d802013-03-21 13:03:09 -0700[diff] [blame]1111 qcom,tz-log@fe805720 {
Hariprasad Dhalinarasimhaadf89cc2013-03-13 13:41:05 -0700[diff] [blame]1112 compatible = "qcom,tz-log";
Hariprasad Dhalinarasimha4ba4d802013-03-21 13:03:09 -0700[diff] [blame]1113 reg = <0x0fe805720 0x1000>;
Hariprasad Dhalinarasimhaadf89cc2013-03-13 13:41:05 -0700[diff] [blame]1114 };
Pushkar Joshi85a53192013-03-11 11:15:15 -0700[diff] [blame]1115
Pratik Patelf2945ef2013-06-13 23:52:05 -0700[diff] [blame]1116 jtag_fuse: jtagfuse@fc4be024 {
1117 compatible = "qcom,jtag-fuse";
1118 reg = <0xfc4be024 0x8>;
1119 reg-names = "fuse-base";
1120 };
1121
Pushkar Joshi85a53192013-03-11 11:15:15 -0700[diff] [blame]1122 jtag_mm0: jtagmm@fc33c000 {
1123 compatible = "qcom,jtag-mm";
1124 reg = <0xfc33c000 0x1000>,
1125 <0xfc330000 0x1000>;
1126 reg-names = "etm-base","debug-base";
1127 };
1128
1129 jtag_mm1: jtagmm@fc33d000 {
1130 compatible = "qcom,jtag-mm";
1131 reg = <0xfc33d000 0x1000>,
1132 <0xfc332000 0x1000>;
1133 reg-names = "etm-base","debug-base";
1134 };
1135
1136 jtag_mm2: jtagmm@fc33e000 {
1137 compatible = "qcom,jtag-mm";
1138 reg = <0xfc33e000 0x1000>,
1139 <0xfc334000 0x1000>;
1140 reg-names = "etm-base","debug-base";
1141 };
1142
1143 jtag_mm3: jtagmm@fc33f000 {
1144 compatible = "qcom,jtag-mm";
1145 reg = <0xfc33f000 0x1000>,
1146 <0xfc336000 0x1000>;
1147 reg-names = "etm-base","debug-base";
1148 };
Jeff Hugo2be6bb022013-03-11 10:17:34 -0600[diff] [blame]1149
1150 qcom,ipc-spinlock@fd484000 {
1151 compatible = "qcom,ipc-spinlock-sfpb";
1152 reg = <0xfd484000 0x400>;
1153 qcom,num-locks = <8>;
1154 };
Hariprasad Dhalinarasimha805ea4d2013-03-14 11:16:12 -0700[diff] [blame]1155
1156 qcom,qseecom@d980000 {
1157 compatible = "qcom,qseecom";
1158 reg = <0xd980000 0x256000>;
1159 reg-names = "secapp-region";
1160 qcom,disk-encrypt-pipe-pair = <2>;
1161 qcom,hlos-ce-hw-instance = <0>;
1162 qcom,qsee-ce-hw-instance = <0>;
1163 qcom,msm-bus,name = "qseecom-noc";
1164 qcom,msm-bus,num-cases = <4>;
1165 qcom,msm-bus,active-only = <0>;
1166 qcom,msm-bus,num-paths = <1>;
1167 qcom,msm-bus,vectors-KBps =
1168 <55 512 0 0>,
1169 <55 512 3936000 393600>,
1170 <55 512 3936000 393600>,
1171 <55 512 3936000 393600>;
1172 };
Hariprasad Dhalinarasimha75051f22013-03-19 15:08:50 -0700[diff] [blame]1173
1174 qcom,qcrypto@fd404000 {
1175 compatible = "qcom,qcrypto";
1176 reg = <0xfd400000 0x20000>,
1177 <0xfd404000 0x8000>;
1178 reg-names = "crypto-base","crypto-bam-base";
1179 interrupts = <0 207 0>;
1180 qcom,bam-pipe-pair = <2>;
1181 qcom,ce-hw-instance = <0>;
1182 qcom,ce-hw-shared;
1183 qcom,msm-bus,name = "qcrypto-noc";
1184 qcom,msm-bus,num-cases = <2>;
1185 qcom,msm-bus,active-only = <0>;
1186 qcom,msm-bus,num-paths = <1>;
1187 qcom,msm-bus,vectors-KBps =
Hariprasad Dhalinarasimhaa2d749e2013-05-14 13:00:06 -0700[diff] [blame]1188 <55 512 0 0>,
1189 <55 512 3936000 393600>;
Hariprasad Dhalinarasimha75051f22013-03-19 15:08:50 -0700[diff] [blame]1190 };
1191
1192 qcom,qcedev@fd400000 {
1193 compatible = "qcom,qcedev";
1194 reg = <0xfd400000 0x20000>,
1195 <0xfd404000 0x8000>;
1196 reg-names = "crypto-base","crypto-bam-base";
1197 interrupts = <0 207 0>;
1198 qcom,bam-pipe-pair = <1>;
1199 qcom,ce-hw-instance = <0>;
1200 qcom,ce-hw-shared;
1201 qcom,msm-bus,name = "qcedev-noc";
1202 qcom,msm-bus,num-cases = <2>;
1203 qcom,msm-bus,active-only = <0>;
1204 qcom,msm-bus,num-paths = <1>;
1205 qcom,msm-bus,vectors-KBps =
Hariprasad Dhalinarasimhaa2d749e2013-05-14 13:00:06 -0700[diff] [blame]1206 <55 512 0 0>,
1207 <55 512 3936000 393600>;
Hariprasad Dhalinarasimha75051f22013-03-19 15:08:50 -0700[diff] [blame]1208 };
Neil Leeder45fb9f62013-06-04 10:46:41 -0400[diff] [blame]1209
1210 cpu-pmu {
1211 compatible = "arm,cortex-a7-pmu";
1212 qcom,irq-is-percpu;
1213 interrupts = <1 7 0xf00>;
1214 };
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700[diff] [blame]1215};
David Collins37ddb972012-10-17 15:00:26 -0700[diff] [blame]1216
Patrick Dalye8977aa2012-11-06 15:25:58 -0800[diff] [blame]1217&gdsc_venus {
Matt Wagantallb8cba292013-04-11 15:45:17 -0700[diff] [blame]1218 qcom,clock-names = "core_clk";
Patrick Dalye8977aa2012-11-06 15:25:58 -0800[diff] [blame]1219 status = "ok";
1220};
1221
1222&gdsc_mdss {
Matt Wagantallb8cba292013-04-11 15:45:17 -0700[diff] [blame]1223 qcom,clock-names = "core_clk", "lut_clk";
Patrick Dalye8977aa2012-11-06 15:25:58 -0800[diff] [blame]1224 status = "ok";
1225};
1226
1227&gdsc_jpeg {
Matt Wagantallb8cba292013-04-11 15:45:17 -0700[diff] [blame]1228 qcom,clock-names = "core_clk";
Patrick Dalye8977aa2012-11-06 15:25:58 -0800[diff] [blame]1229 status = "ok";
1230};
1231
1232&gdsc_vfe {
Matt Wagantallb8cba292013-04-11 15:45:17 -0700[diff] [blame]1233 qcom,clock-names = "core_clk", "csi_clk", "cpp_clk";
Patrick Dalye8977aa2012-11-06 15:25:58 -0800[diff] [blame]1234 status = "ok";
1235};
1236
1237&gdsc_oxili_cx {
Matt Wagantallb8cba292013-04-11 15:45:17 -0700[diff] [blame]1238 qcom,clock-names = "core_clk";
Patrick Dalye8977aa2012-11-06 15:25:58 -0800[diff] [blame]1239 status = "ok";
1240};
1241
1242&gdsc_usb_hsic {
1243 status = "ok";
1244};
1245
David Keitel376b2682013-03-05 18:40:01 -0800[diff] [blame]1246/include/ "msm-pm8226-rpm-regulator.dtsi"
Kenneth Heitkebea6ca22013-02-07 17:23:21 -0700[diff] [blame]1247/include/ "msm-pm8226.dtsi"
David Keitel7184c6e2013-02-11 13:23:04 -0800[diff] [blame]1248/include/ "msm8226-regulator.dtsi"
Siddartha Mohanadossae99e772013-02-19 15:44:40 -0800[diff] [blame]1249
1250&pm8226_vadc {
1251 chan@0 {
1252 label = "usb_in";
1253 reg = <0>;
1254 qcom,decimation = <0>;
1255 qcom,pre-div-channel-scaling = <4>;
1256 qcom,calibration-type = "absolute";
1257 qcom,scale-function = <0>;
1258 qcom,hw-settle-time = <0>;
1259 qcom,fast-avg-setup = <0>;
1260 };
1261
1262 chan@2 {
1263 label = "vchg_sns";
1264 reg = <2>;
1265 qcom,decimation = <0>;
1266 qcom,pre-div-channel-scaling = <3>;
1267 qcom,calibration-type = "absolute";
1268 qcom,scale-function = <0>;
1269 qcom,hw-settle-time = <0>;
1270 qcom,fast-avg-setup = <0>;
1271 };
1272
1273 chan@5 {
1274 label = "vcoin";
1275 reg = <5>;
1276 qcom,decimation = <0>;
1277 qcom,pre-div-channel-scaling = <1>;
1278 qcom,calibration-type = "absolute";
1279 qcom,scale-function = <0>;
1280 qcom,hw-settle-time = <0>;
1281 qcom,fast-avg-setup = <0>;
1282 };
1283
1284 chan@6 {
1285 label = "vbat_sns";
1286 reg = <6>;
1287 qcom,decimation = <0>;
1288 qcom,pre-div-channel-scaling = <1>;
1289 qcom,calibration-type = "absolute";
1290 qcom,scale-function = <0>;
1291 qcom,hw-settle-time = <0>;
1292 qcom,fast-avg-setup = <0>;
1293 };
1294
1295 chan@7 {
1296 label = "vph_pwr";
1297 reg = <7>;
1298 qcom,decimation = <0>;
1299 qcom,pre-div-channel-scaling = <1>;
1300 qcom,calibration-type = "absolute";
1301 qcom,scale-function = <0>;
1302 qcom,hw-settle-time = <0>;
1303 qcom,fast-avg-setup = <0>;
1304 };
1305
1306 chan@30 {
1307 label = "batt_therm";
1308 reg = <0x30>;
1309 qcom,decimation = <0>;
1310 qcom,pre-div-channel-scaling = <0>;
1311 qcom,calibration-type = "ratiometric";
1312 qcom,scale-function = <1>;
Siddartha Mohanadoss74cece62013-02-22 10:07:30 -0800[diff] [blame]1313 qcom,hw-settle-time = <2>;
Siddartha Mohanadossae99e772013-02-19 15:44:40 -0800[diff] [blame]1314 qcom,fast-avg-setup = <0>;
1315 };
1316
1317 chan@31 {
1318 label = "batt_id";
1319 reg = <0x31>;
1320 qcom,decimation = <0>;
1321 qcom,pre-div-channel-scaling = <0>;
1322 qcom,calibration-type = "ratiometric";
1323 qcom,scale-function = <0>;
1324 qcom,hw-settle-time = <2>;
1325 qcom,fast-avg-setup = <0>;
1326 };
1327
1328 chan@b2 {
1329 label = "xo_therm_pu2";
1330 reg = <0xb2>;
1331 qcom,decimation = <0>;
1332 qcom,pre-div-channel-scaling = <0>;
1333 qcom,calibration-type = "ratiometric";
1334 qcom,scale-function = <4>;
Siddartha Mohanadoss74cece62013-02-22 10:07:30 -0800[diff] [blame]1335 qcom,hw-settle-time = <2>;
Siddartha Mohanadossae99e772013-02-19 15:44:40 -0800[diff] [blame]1336 qcom,fast-avg-setup = <0>;
1337 };
David Keitelc51a7e52013-03-02 00:14:48 -0800[diff] [blame]1338
Siddartha Mohanadoss3cb76152013-04-12 16:17:02 -0700[diff] [blame]1339 chan@39 {
1340 label = "usb_id_nopull";
1341 reg = <0x39>;
1342 qcom,decimation = <0>;
1343 qcom,pre-div-channel-scaling = <0>;
1344 qcom,calibration-type = "ratiometric";
1345 qcom,scale-function = <0>;
1346 qcom,hw-settle-time = <2>;
1347 qcom,fast-avg-setup = <0>;
1348 };
David Keitelc51a7e52013-03-02 00:14:48 -0800[diff] [blame]1349};
1350
Siddartha Mohanadoss8aea3172013-05-09 11:49:37 -0700[diff] [blame]1351&pm8226_adc_tm {
1352 /* Channel Node */
1353 chan@30 {
1354 label = "batt_therm";
1355 reg = <0x30>;
1356 qcom,decimation = <0>;
1357 qcom,pre-div-channel-scaling = <0>;
1358 qcom,calibration-type = "ratiometric";
1359 qcom,scale-function = <1>;
1360 qcom,hw-settle-time = <2>;
1361 qcom,fast-avg-setup = <3>;
1362 qcom,btm-channel-number = <0x48>;
1363 };
1364
1365 chan@8 {
1366 label = "die_temp";
1367 reg = <8>;
1368 qcom,decimation = <0>;
1369 qcom,pre-div-channel-scaling = <0>;
1370 qcom,calibration-type = "absolute";
1371 qcom,scale-function = <3>;
1372 qcom,hw-settle-time = <0>;
1373 qcom,fast-avg-setup = <3>;
1374 qcom,btm-channel-number = <0x68>;
1375 };
1376
1377 chan@6 {
1378 label = "vbat_sns";
1379 reg = <6>;
1380 qcom,decimation = <0>;
1381 qcom,pre-div-channel-scaling = <1>;
1382 qcom,calibration-type = "absolute";
1383 qcom,scale-function = <0>;
1384 qcom,hw-settle-time = <0>;
1385 qcom,fast-avg-setup = <3>;
1386 qcom,btm-channel-number = <0x70>;
1387 };
1388
1389 chan@14 {
1390 label = "pa_therm0";
1391 reg = <0x14>;
1392 qcom,decimation = <0>;
1393 qcom,pre-div-channel-scaling = <0>;
1394 qcom,calibration-type = "ratiometric";
1395 qcom,scale-function = <2>;
1396 qcom,hw-settle-time = <2>;
1397 qcom,fast-avg-setup = <0>;
1398 qcom,btm-channel-number = <0x78>;
1399 qcom,thermal-node;
1400 };
1401
1402 chan@17 {
1403 label = "pa_therm1";
1404 reg = <0x17>;
1405 qcom,decimation = <0>;
1406 qcom,pre-div-channel-scaling = <0>;
1407 qcom,calibration-type = "ratiometric";
1408 qcom,scale-function = <2>;
1409 qcom,hw-settle-time = <2>;
1410 qcom,fast-avg-setup = <0>;
1411 qcom,btm-channel-number = <0x80>;
1412 qcom,thermal-node;
1413 };
1414};
1415
David Keitelc51a7e52013-03-02 00:14:48 -0800[diff] [blame]1416&pm8226_chg {
1417 status = "ok";
1418
David Keitele89d4782013-03-27 11:29:59 -0700[diff] [blame]1419 qcom,chgr@1000 {
David Keitelc51a7e52013-03-02 00:14:48 -0800[diff] [blame]1420 status = "ok";
1421 };
1422
David Keitele89d4782013-03-27 11:29:59 -0700[diff] [blame]1423 qcom,buck@1100 {
David Keitelc51a7e52013-03-02 00:14:48 -0800[diff] [blame]1424 status = "ok";
1425 };
1426
David Keitele89d4782013-03-27 11:29:59 -0700[diff] [blame]1427 qcom,bat-if@1200 {
Fenglin Wu009098a2013-03-08 15:50:51 -0800[diff] [blame]1428 status = "ok";
1429 };
1430
David Keitele89d4782013-03-27 11:29:59 -0700[diff] [blame]1431 qcom,usb-chgpth@1300 {
David Keitelc51a7e52013-03-02 00:14:48 -0800[diff] [blame]1432 status = "ok";
1433 };
1434
David Keitele89d4782013-03-27 11:29:59 -0700[diff] [blame]1435 qcom,boost@1500 {
David Keitelc51a7e52013-03-02 00:14:48 -0800[diff] [blame]1436 status = "ok";
1437 };
1438
1439 qcom,chg-misc@1600 {
1440 status = "ok";
1441 };
Siddartha Mohanadossae99e772013-02-19 15:44:40 -0800[diff] [blame]1442};