blob: 60528ee45dcc41ba8b1d921c2392172d73f4a89a [file] [log] [blame]
Syed Rameez Mustafa3971c142013-01-09 19:04:53 -08001/* Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
Syed Rameez Mustafad3935822012-10-09 11:23:20 -07002 *
3 * This program is free software; you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License version 2 and
5 * only version 2 as published by the Free Software Foundation.
6 *
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
11 */
12
13/include/ "skeleton.dtsi"
Stepan Moskovchenko7d8cdcaa2013-04-25 17:10:55 -070014
15/ {
16 model = "Qualcomm MSM 8610";
17 compatible = "qcom,msm8610";
18 interrupt-parent = <&intc>;
19
20 memory {
21 qsecom_mem: qsecom_region {
22 linux,contiguous-region;
23 reg = <0 0x100000>;
24 label = "qsecom_mem";
25 };
26 };
27
28 aliases {
29 sdhc1 = &sdhc_1; /* SDC1 eMMC slot */
30 sdhc2 = &sdhc_2; /* SDC2 SD card slot */
Gilad Avidova460c472013-04-12 16:23:32 -060031 spi4 = &spi_4;
Stepan Moskovchenko7d8cdcaa2013-04-25 17:10:55 -070032 };
33
34 soc: soc { };
35};
36
Lokesh Kumar Aakulu25213502013-05-07 17:43:03 -070037/include/ "msm8610-camera.dtsi"
Olav Haugan54166782013-01-28 16:59:51 -080038/include/ "msm-iommu-v0.dtsi"
Syed Rameez Mustafa3971c142013-01-09 19:04:53 -080039/include/ "msm8610-ion.dtsi"
Lokesh Batra8d55eec2013-02-26 11:31:21 -080040/include/ "msm8610-gpu.dtsi"
Matt Wagantall1bf56932012-11-29 15:03:29 -080041/include/ "msm-gdsc.dtsi"
Aparna Dasd16555b2013-03-06 15:46:38 -080042/include/ "msm8610-coresight.dtsi"
Praveen Chidambarama1f98282012-11-29 09:56:57 -070043/include/ "msm8610-pm.dtsi"
Jeff Hugo53dcf0f2013-03-20 12:37:50 -060044/include/ "msm8610-smp2p.dtsi"
Gagan Macbced3872013-02-04 19:18:04 -070045/include/ "msm8610-bus.dtsi"
Xiaoming Zhou5f37a252013-04-09 21:11:50 -040046/include/ "msm8610-mdss.dtsi"
Syed Rameez Mustafad3935822012-10-09 11:23:20 -070047
Stepan Moskovchenko7d8cdcaa2013-04-25 17:10:55 -070048&soc {
49 #address-cells = <1>;
50 #size-cells = <1>;
51 ranges;
Syed Rameez Mustafad3935822012-10-09 11:23:20 -070052
53 intc: interrupt-controller@f9000000 {
54 compatible = "qcom,msm-qgic2";
55 interrupt-controller;
56 #interrupt-cells = <3>;
57 reg = <0xf9000000 0x1000>,
58 <0xf9002000 0x1000>;
59 };
60
61 msmgpio: gpio@fd510000 {
62 compatible = "qcom,msm-gpio";
63 interrupt-controller;
64 #interrupt-cells = <2>;
65 reg = <0xfd510000 0x4000>;
Syed Rameez Mustafa86cccfc2012-12-10 18:06:08 -080066 gpio-controller;
Syed Rameez Mustafad3935822012-10-09 11:23:20 -070067 #gpio-cells = <2>;
Rohit Vaswani341c2032012-11-08 18:49:29 -080068 ngpio = <102>;
Rohit Vaswanid2001522012-12-05 19:23:44 -080069 interrupts = <0 208 0>;
Rohit Vaswanied0a4ef2012-12-11 15:14:42 -080070 qcom,direct-connect-irqs = <8>;
Syed Rameez Mustafad3935822012-10-09 11:23:20 -070071 };
72
Abhimanyu Kapur58d303a72013-04-30 16:13:41 -070073 qcom,mpm2-sleep-counter@fc4a3000 {
74 compatible = "qcom,mpm2-sleep-counter";
75 reg = <0xfc4a3000 0x1000>;
76 clock-frequency = <32768>;
77 };
78
Syed Rameez Mustafafd9ac032012-10-10 17:52:07 -070079 timer {
Syed Rameez Mustafa0824d6c2012-11-29 18:53:56 -080080 compatible = "arm,armv7-timer";
Syed Rameez Mustafafd9ac032012-10-10 17:52:07 -070081 interrupts = <1 2 0 1 3 0>;
Syed Rameez Mustafad3935822012-10-09 11:23:20 -070082 clock-frequency = <19200000>;
83 };
84
Stephen Boyda61ac642013-04-10 14:20:27 -070085 timer@f9020000 {
86 #address-cells = <1>;
87 #size-cells = <1>;
88 ranges;
89 compatible = "arm,armv7-timer-mem";
90 reg = <0xf9020000 0x1000>;
91 clock-frequency = <19200000>;
92
93 frame@f9021000 {
94 frame-number = <0>;
95 interrupts = <0 8 0x4>,
96 <0 7 0x4>;
97 reg = <0xf9021000 0x1000>,
98 <0xf9022000 0x1000>;
99 };
100
101 frame@f9023000 {
102 frame-number = <1>;
103 interrupts = <0 9 0x4>;
104 reg = <0xf9023000 0x1000>;
105 status = "disabled";
106 };
107
108 frame@f9024000 {
109 frame-number = <2>;
110 interrupts = <0 10 0x4>;
111 reg = <0xf9024000 0x1000>;
112 status = "disabled";
113 };
114
115 frame@f9025000 {
116 frame-number = <3>;
117 interrupts = <0 11 0x4>;
118 reg = <0xf9025000 0x1000>;
119 status = "disabled";
120 };
121
122 frame@f9026000 {
123 frame-number = <4>;
124 interrupts = <0 12 0x4>;
125 reg = <0xf9026000 0x1000>;
126 status = "disabled";
127 };
128
129 frame@f9027000 {
130 frame-number = <5>;
131 interrupts = <0 13 0x4>;
132 reg = <0xf9027000 0x1000>;
133 status = "disabled";
134 };
135
136 frame@f9028000 {
137 frame-number = <6>;
138 interrupts = <0 14 0x4>;
139 reg = <0xf9028000 0x1000>;
140 status = "disabled";
141 };
142 };
143
Arun Menon2a7e3772013-01-17 12:06:59 -0800144 qcom,msm-adsp-loader {
145 compatible = "qcom,adsp-loader";
146 qcom,adsp-state = <0>;
147 };
148
Fred Ohe49386d2013-05-02 17:53:27 -0700149 qcom,msm-audio-ion {
150 compatible = "qcom,msm-audio-ion";
151 qcom,smmu-enabled;
152 };
153
Abhimanyu Kapur032b1f42013-01-18 00:10:50 -0800154 qcom,msm-imem@fe805000 {
155 compatible = "qcom,msm-imem";
156 reg = <0xfe805000 0x1000>; /* Address and size of IMEM */
157 };
158
Syed Rameez Mustafad3935822012-10-09 11:23:20 -0700159 serial@f991f000 {
160 compatible = "qcom,msm-lsuart-v14";
161 reg = <0xf991f000 0x1000>;
162 interrupts = <0 109 0>;
163 status = "disabled";
164 };
Mayank Rana55db0cb2012-10-15 16:50:06 +0530165
Hanumant Singh6b346712013-04-09 16:26:09 -0700166 serial@f991e000 {
167 compatible = "qcom,msm-lsuart-v14";
168 reg = <0xf991e000 0x1000>;
169 interrupts = <0 108 0>;
170 status = "disabled";
171 };
172
Arun Menon8e25dd42013-01-11 14:11:54 -0800173 qcom,vidc@fdc00000 {
174 compatible = "qcom,msm-vidc";
Sachin Shah4e1c8fe2013-03-20 15:10:05 -0700175 qcom,vidc-ns-map = <0x40000000 0x40000000>;
Sachin Shah4e1c8fe2013-03-20 15:10:05 -0700176 qcom,buffer-type-tz-usage-map = <0x1 0x1>,
177 <0x1fe 0x2>;
178 qcom,hfi = "q6";
Arun Menonede58642013-04-26 14:19:06 -0700179 qcom,max-hw-load = <108000>; /* 720p @ 30 * 1 */
Eric Hoa00e2da2013-06-20 17:41:57 -0700180 qcom,vidc-iommu-domains {
181 qcom,domain-ns {
182 qcom,vidc-domain-phandle = <&q6_domain_ns>;
183 qcom,vidc-partition-buffer-types = <0xfff>;
184 };
185 };
186};
Arun Menon8e25dd42013-01-11 14:11:54 -0800187
Vamsi Krishna872fbbc2013-04-09 18:04:52 -0700188 qcom,usbbam@f9a44000 {
189 compatible = "qcom,usb-bam-msm";
190 reg = <0xf9a44000 0x11000>;
191 reg-names = "hsusb";
192 interrupts = <0 135 0>;
193 interrupt-names = "hsusb";
194 qcom,usb-bam-num-pipes = <16>;
195 qcom,usb-bam-fifo-baseaddr = <0xfe803000>;
196 qcom,ignore-core-reset-ack;
197 qcom,disable-clk-gating;
198
199 qcom,pipe0 {
200 label = "hsusb-qdss-in-0";
201 qcom,usb-bam-mem-type = <3>;
202 qcom,bam-type = <1>;
203 qcom,dir = <1>;
204 qcom,pipe-num = <0>;
205 qcom,peer-bam = <1>;
206 qcom,src-bam-physical-address = <0xfc37c000>;
207 qcom,src-bam-pipe-index = <0>;
208 qcom,dst-bam-physical-address = <0xf9a44000>;
209 qcom,dst-bam-pipe-index = <2>;
210 qcom,data-fifo-offset = <0x0>;
211 qcom,data-fifo-size = <0x600>;
212 qcom,descriptor-fifo-offset = <0x600>;
213 qcom,descriptor-fifo-size = <0x200>;
214 };
215 };
216
Mayank Rana55db0cb2012-10-15 16:50:06 +0530217 usb@f9a55000 {
218 compatible = "qcom,hsusb-otg";
219 reg = <0xf9a55000 0x400>;
Mayank Rana33d26662013-01-17 10:22:25 +0530220 interrupts = <0 134 0>, <0 140 0>;
221 interrupt-names = "core_irq", "async_irq";
Mayank Rana1aedece2013-07-19 17:42:10 +0530222 hsusb_vdd_dig-supply = <&pm8110_s1_corner>;
Mayank Rana76c6ce22012-11-07 17:07:58 +0530223 HSUSB_1p8-supply = <&pm8110_l10>;
224 HSUSB_3p3-supply = <&pm8110_l20>;
Mayank Rana1aedece2013-07-19 17:42:10 +0530225 qcom,vdd-voltage-level = <1 5 7>;
Mayank Rana55db0cb2012-10-15 16:50:06 +0530226
Manu Gautam080001d2013-07-02 15:13:48 +0530227 qcom,hsusb-otg-phy-init-seq =
228 <0x44 0x80 0x68 0x81 0x24 0x82 0x13 0x83 0xffffffff>;
Mayank Rana55db0cb2012-10-15 16:50:06 +0530229 qcom,hsusb-otg-phy-type = <2>;
230 qcom,hsusb-otg-mode = <1>;
Mayank Rana29bb9f22013-04-04 18:25:12 +0530231 qcom,hsusb-otg-otg-control = <2>;
Mayank Rana55db0cb2012-10-15 16:50:06 +0530232 qcom,hsusb-otg-disable-reset;
Mayank Ranaa5491122013-04-04 18:32:25 +0530233 qcom,dp-manual-pullup;
Mayank Ranaf9295802013-04-04 18:36:44 +0530234
235 qcom,msm-bus,name = "usb2";
236 qcom,msm-bus,num-cases = <2>;
237 qcom,msm-bus,active-only = <0>;
238 qcom,msm-bus,num-paths = <1>;
239 qcom,msm-bus,vectors-KBps =
240 <87 512 0 0>,
241 <87 512 60000 960000>;
Mayank Rana55db0cb2012-10-15 16:50:06 +0530242 };
243
Mayank Ranacc0c5452013-01-29 16:41:53 +0530244 android_usb@fe8050c8 {
Mayank Rana55db0cb2012-10-15 16:50:06 +0530245 compatible = "qcom,android-usb";
Mayank Ranacc0c5452013-01-29 16:41:53 +0530246 reg = <0xfe8050c8 0xc8>;
Manu Gautamd4f33082013-06-12 14:24:01 +0530247 qcom,android-usb-swfi-latency = <1>;
Mayank Rana55db0cb2012-10-15 16:50:06 +0530248 };
249
Oluwafemi Adeyemi58289bf2012-10-16 17:24:33 -0700250 sdcc1: qcom,sdcc@f9824000 {
251 cell-index = <1>; /* SDC1 eMMC slot */
252 compatible = "qcom,msm-sdcc";
Oluwafemi Adeyemi4641e7f2012-11-28 16:12:56 -0800253 reg = <0xf9824000 0x800>,
254 <0xf9824800 0x100>,
255 <0xf9804000 0x7000>;
256 reg-names = "core_mem", "dml_mem", "bam_mem";
257 interrupts = <0 123 0>, <0 137 0>;
258 interrupt-names = "core_irq", "bam_irq";
Oluwafemi Adeyemi58289bf2012-10-16 17:24:33 -0700259
Oluwafemi Adeyemid0035622012-11-02 12:07:06 -0700260 vdd-supply = <&pm8110_l17>;
Oluwafemi Adeyemid0035622012-11-02 12:07:06 -0700261 qcom,vdd-voltage-level = <2900000 2900000>;
262 qcom,vdd-current-level = <9000 400000>;
263
264 vdd-io-supply = <&pm8110_l6>;
265 qcom,vdd-io-always-on;
266 qcom,vdd-io-lpm-sup;
267 qcom,vdd-io-voltage-level = <1800000 1800000>;
268 qcom,vdd-io-current-level = <9000 60000>;
269
Oluwafemi Adeyemi6cdfdb82012-11-02 13:36:29 -0700270 qcom,pad-pull-on = <0x0 0x3 0x3>; /* no-pull, pull-up, pull-up */
271 qcom,pad-pull-off = <0x0 0x3 0x3>; /* no-pull, pull-up, pull-up */
Krishna Konda6c5d0f42013-04-12 16:44:26 -0700272 qcom,pad-drv-on = <0x4 0x4 0x4>; /* 10mA, 10mA, 10mA */
Oluwafemi Adeyemi6cdfdb82012-11-02 13:36:29 -0700273 qcom,pad-drv-off = <0x0 0x0 0x0>; /* 2mA, 2mA, 2mA */
Oluwafemi Adeyemi58289bf2012-10-16 17:24:33 -0700274
Oluwafemi Adeyemi6cdfdb82012-11-02 13:36:29 -0700275 qcom,clk-rates = <400000 25000000 50000000 100000000 200000000>;
Oluwafemi Adeyemid0035622012-11-02 12:07:06 -0700276 qcom,sup-voltages = <2900 2900>;
Oluwafemi Adeyemi6cdfdb82012-11-02 13:36:29 -0700277 qcom,bus-width = <8>;
278 qcom,nonremovable;
279 qcom,bus-speed-mode = "HS200_1p8v", "DDR_1p8v";
Venkat Gopalakrishnan587b2252013-04-05 12:16:50 -0700280
281 status = "disabled";
Oluwafemi Adeyemi58289bf2012-10-16 17:24:33 -0700282 };
283
284 sdcc2: qcom,sdcc@f98a4000 {
285 cell-index = <2>; /* SDC2 SD card slot */
286 compatible = "qcom,msm-sdcc";
Oluwafemi Adeyemi4641e7f2012-11-28 16:12:56 -0800287 reg = <0xf98a4000 0x800>,
288 <0xf98a4800 0x100>,
289 <0xf9884000 0x7000>;
290 reg-names = "core_mem", "dml_mem", "bam_mem";
291 interrupts = <0 125 0>, <0 220 0>;
292 interrupt-names = "core_irq", "bam_irq";
Oluwafemi Adeyemi58289bf2012-10-16 17:24:33 -0700293
Oluwafemi Adeyemid0035622012-11-02 12:07:06 -0700294 vdd-supply = <&pm8110_l18>;
295 qcom,vdd-voltage-level = <2950000 2950000>;
296 qcom,vdd-current-level = <9000 400000>;
297
298 vdd-io-supply = <&pm8110_l21>;
299 qcom,vdd-io-voltage-level = <1800000 2950000>;
300 qcom,vdd-io-current-level = <9000 50000>;
301
Oluwafemi Adeyemi6cdfdb82012-11-02 13:36:29 -0700302 qcom,pad-pull-on = <0x0 0x3 0x3>; /* no-pull, pull-up, pull-up */
303 qcom,pad-pull-off = <0x0 0x3 0x3>; /* no-pull, pull-up, pull-up */
Krishna Konda6c5d0f42013-04-12 16:44:26 -0700304 qcom,pad-drv-on = <0x4 0x4 0x4>; /* 10mA, 10mA, 10mA */
Oluwafemi Adeyemi6cdfdb82012-11-02 13:36:29 -0700305 qcom,pad-drv-off = <0x0 0x0 0x0>; /* 2mA, 2mA, 2mA */
Oluwafemi Adeyemi58289bf2012-10-16 17:24:33 -0700306
Oluwafemi Adeyemi6cdfdb82012-11-02 13:36:29 -0700307 qcom,clk-rates = <400000 25000000 50000000 100000000 200000000>;
308 qcom,sup-voltages = <2950 2950>;
309 qcom,bus-width = <4>;
310 qcom,xpc;
311 qcom,bus-speed-mode = "SDR12", "SDR25", "SDR50", "DDR50", "SDR104";
312 qcom,current-limit = <800>;
Venkat Gopalakrishnan587b2252013-04-05 12:16:50 -0700313
314 status = "disabled";
Oluwafemi Adeyemi58289bf2012-10-16 17:24:33 -0700315 };
316
Venkat Gopalakrishnana6ce5f22013-04-04 14:24:57 -0700317 sdhc_1: sdhci@f9824900 {
318 compatible = "qcom,sdhci-msm";
319 reg = <0xf9824900 0x11c>, <0xf9824000 0x800>;
320 reg-names = "hc_mem", "core_mem";
321
322 interrupts = <0 123 0>, <0 138 0>;
323 interrupt-names = "hc_irq", "pwr_irq";
324
325 qcom,bus-width = <8>;
326 status = "disabled";
327 };
328
329 sdhc_2: sdhci@f98a4900 {
330 compatible = "qcom,sdhci-msm";
331 reg = <0xf98a4900 0x11c>, <0xf98a4000 0x800>;
332 reg-names = "hc_mem", "core_mem";
333
334 interrupts = <0 125 0>, <0 221 0>;
335 interrupt-names = "hc_irq", "pwr_irq";
336
337 qcom,bus-width = <4>;
338 status = "disabled";
339 };
340
Yan He6c7304c2012-11-09 22:07:08 -0800341 qcom,sps {
342 compatible = "qcom,msm_sps";
343 qcom,device-type = <3>;
344 };
345
Jeff Hugo4e20fda2013-04-10 12:40:19 -0600346 qcom,smem@d900000 {
Jeff Hugo818d0f72012-11-05 14:19:28 -0700347 compatible = "qcom,smem";
Jeff Hugoe1e30e72013-04-08 14:15:34 -0600348 reg = <0xd900000 0x100000>,
Stepan Moskovchenkod6ee8262013-02-06 11:26:05 -0800349 <0xf9011000 0x1000>,
Jeff Hugo818d0f72012-11-05 14:19:28 -0700350 <0xfc428000 0x4000>;
351 reg-names = "smem", "irq-reg-base", "aux-mem1";
352
353 qcom,smd-modem {
354 compatible = "qcom,smd";
355 qcom,smd-edge = <0>;
356 qcom,smd-irq-offset = <0x8>;
357 qcom,smd-irq-bitmask = <0x1000>;
358 qcom,pil-string = "modem";
359 interrupts = <0 25 1>;
360 };
361
362 qcom,smsm-modem {
363 compatible = "qcom,smsm";
364 qcom,smsm-edge = <0>;
365 qcom,smsm-irq-offset = <0x8>;
366 qcom,smsm-irq-bitmask = <0x2000>;
367 interrupts = <0 26 1>;
368 };
369
370 qcom,smd-adsp {
371 compatible = "qcom,smd";
372 qcom,smd-edge = <1>;
373 qcom,smd-irq-offset = <0x8>;
374 qcom,smd-irq-bitmask = <0x100>;
375 qcom,pil-string = "adsp";
376 interrupts = <0 156 1>;
377 };
378
379 qcom,smsm-adsp {
380 compatible = "qcom,smsm";
381 qcom,smsm-edge = <1>;
382 qcom,smsm-irq-offset = <0x8>;
383 qcom,smsm-irq-bitmask = <0x200>;
384 interrupts = <0 157 1>;
385 };
386
387 qcom,smd-wcnss {
388 compatible = "qcom,smd";
389 qcom,smd-edge = <6>;
390 qcom,smd-irq-offset = <0x8>;
391 qcom,smd-irq-bitmask = <0x20000>;
392 qcom,pil-string = "wcnss";
393 interrupts = <0 142 1>;
394 };
395
396 qcom,smsm-wcnss {
397 compatible = "qcom,smsm";
398 qcom,smsm-edge = <6>;
399 qcom,smsm-irq-offset = <0x8>;
400 qcom,smsm-irq-bitmask = <0x80000>;
401 interrupts = <0 144 1>;
402 };
403
404 qcom,smd-rpm {
405 compatible = "qcom,smd";
406 qcom,smd-edge = <15>;
407 qcom,smd-irq-offset = <0x8>;
408 qcom,smd-irq-bitmask = <0x1>;
409 interrupts = <0 168 1>;
410 qcom,irq-no-suspend;
411 };
David Ng5a3cb232012-12-03 16:42:53 -0800412 };
Hanumant Singh4e334c82012-11-14 10:16:39 -0800413
Praveen Chidambarama1f98282012-11-29 09:56:57 -0700414 rpm_bus: qcom,rpm-smd {
415 compatible = "qcom,rpm-smd";
416 rpm-channel-name = "rpm_requests";
417 rpm-channel-type = <15>; /* SMD_APPS_RPM */
Priyanka Mathur6e993c92013-03-20 11:17:27 -0700418 rpm-standalone;
Praveen Chidambarama1f98282012-11-29 09:56:57 -0700419 };
420
Jennifer Liuccb66f62013-06-06 10:46:51 -0700421 qcom,bcl {
422 compatible = "qcom,bcl";
423 };
424
Olav Haugan8340d932013-01-25 12:03:11 -0800425 qcom,msm-mem-hole {
426 compatible = "qcom,msm-mem-hole";
Neeti Desai8349e9c2013-07-17 11:29:33 -0700427 qcom,memblock-remove = <0x08800000 0x5600000>; /* Address and Size of Hole */
Olav Haugan8340d932013-01-25 12:03:11 -0800428 };
429
Hanumant Singh4e334c82012-11-14 10:16:39 -0800430 qcom,wdt@f9017000 {
431 compatible = "qcom,msm-watchdog";
432 reg = <0xf9017000 0x1000>;
433 interrupts = <0 3 0>, <0 4 0>;
434 qcom,bark-time = <11000>;
435 qcom,pet-time = <10000>;
Mitchel Humpherys1be23802012-11-16 15:52:32 -0800436 qcom,ipi-ping;
Jeff Hugo818d0f72012-11-05 14:19:28 -0700437 };
Kenneth Heitkedb6e1b12012-11-20 15:24:42 -0700438
Vikram Mulukutlaa3cebff2013-01-28 13:54:54 -0800439 qcom,acpuclk@f9011050 {
440 compatible = "qcom,acpuclk-a7";
441 reg = <0xf9011050 0x8>;
442 reg-names = "rcg_base";
Patrick Dalyf9451d22013-03-20 14:20:12 -0700443 a7_cpu-supply = <&apc_vreg_corner>;
Vikram Mulukutlaa3cebff2013-01-28 13:54:54 -0800444 };
445
Kenneth Heitkedb6e1b12012-11-20 15:24:42 -0700446 spmi_bus: qcom,spmi@fc4c0000 {
447 cell-index = <0>;
448 compatible = "qcom,spmi-pmic-arb";
Kenneth Heitke366b8a42012-12-18 13:51:37 -0700449 reg-names = "core", "intr", "cnfg";
Kenneth Heitkedb6e1b12012-11-20 15:24:42 -0700450 reg = <0xfc4cf000 0x1000>,
Kenneth Heitke366b8a42012-12-18 13:51:37 -0700451 <0Xfc4cb000 0x1000>,
452 <0Xfc4ca000 0x1000>;
Kenneth Heitkedb6e1b12012-11-20 15:24:42 -0700453 /* 190,ee0_krait_hlos_spmi_periph_irq */
454 /* 187,channel_0_krait_hlos_trans_done_irq */
455 interrupts = <0 190 0>, <0 187 0>;
Kenneth Heitkedb6e1b12012-11-20 15:24:42 -0700456 qcom,pmic-arb-ee = <0>;
457 qcom,pmic-arb-channel = <0>;
Kenneth Heitkedb6e1b12012-11-20 15:24:42 -0700458 };
459
Chun Zhangf39a0652013-05-01 15:57:54 -0700460 i2c@f9923000 { /* BLSP-1 QUP-1 */
461 cell-index = <1>;
Gilad Avidovf84f2792013-01-31 13:26:39 -0700462 compatible = "qcom,i2c-qup";
463 #address-cells = <1>;
464 #size-cells = <0>;
465 reg-names = "qup_phys_addr";
Chun Zhangf39a0652013-05-01 15:57:54 -0700466 reg = <0xf9923000 0x1000>;
Gilad Avidovf84f2792013-01-31 13:26:39 -0700467 interrupt-names = "qup_err_intr";
Chun Zhangf39a0652013-05-01 15:57:54 -0700468 interrupts = <0 95 0>;
Gilad Avidovf84f2792013-01-31 13:26:39 -0700469 qcom,i2c-bus-freq = <100000>;
Chun Zhangf39a0652013-05-01 15:57:54 -0700470 qcom,i2c-src-freq = <19200000>;
471 qcom,sda-gpio = <&msmgpio 2 0>;
472 qcom,scl-gpio = <&msmgpio 3 0>;
Gilad Avidovf84f2792013-01-31 13:26:39 -0700473 };
474
Kuirong Wangc6d072c2013-01-29 10:33:03 -0800475 i2c_cdc: i2c@f9927000 { /* BLSP1 QUP5 */
476 cell-index = <5>;
477 compatible = "qcom,i2c-qup";
478 #address-cells = <1>;
479 #size-cells = <0>;
480 reg-names = "qup_phys_addr";
481 reg = <0xf9927000 0x1000>;
482 interrupt-names = "qup_err_intr";
483 interrupts = <0 99 0>;
484 qcom,i2c-bus-freq = <100000>;
485 };
486
Lokesh Kumar Aakulu25213502013-05-07 17:43:03 -0700487 i2c: i2c@f9928000 { /* BLSP1 QUP6 */
Kenneth Heitke0d4fbb12013-04-10 12:51:14 -0600488 cell-index = <6>;
489 compatible = "qcom,i2c-qup";
490 #address-cells = <1>;
491 #size-cells = <0>;
492 reg-names = "qup_phys_addr";
493 reg = <0xf9928000 0x1000>;
494 interrupt-names = "qup_err_intr";
495 interrupts = <0 100 0>;
496 qcom,i2c-bus-freq = <100000>;
497 qcom,i2c-src-freq = <19200000>;
498 qcom,sda-gpio = <&msmgpio 16 0>;
499 qcom,scl-gpio = <&msmgpio 17 0>;
500 };
Gilad Avidovf58f1832013-01-09 17:31:28 -0700501
Chun Zhangf39a0652013-05-01 15:57:54 -0700502 i2c@f9925000 { /* BLSP-1 QUP-3 */
503 cell-index = <0>;
504 compatible = "qcom,i2c-qup";
Gilad Avidovf58f1832013-01-09 17:31:28 -0700505 #address-cells = <1>;
506 #size-cells = <0>;
Chun Zhangf39a0652013-05-01 15:57:54 -0700507 reg-names = "qup_phys_addr";
508 reg = <0xf9925000 0x1000>;
509 interrupt-names = "qup_err_intr";
510 interrupts = <0 97 0>;
511 qcom,i2c-bus-freq = <100000>;
Gilad Avidovf58f1832013-01-09 17:31:28 -0700512 };
513
Gilad Avidova460c472013-04-12 16:23:32 -0600514 spi_4: spi@f9926000 { /* BLSP1 QUP4 */
515 compatible = "qcom,spi-qup-v2";
516 #address-cells = <1>;
517 #size-cells = <0>;
518 reg-names = "spi_physical", "spi_bam_physical";
519 reg = <0xf9926000 0x1000>,
520 <0xf9904000 0x15000>;
521 interrupt-names = "spi_irq", "spi_bam_irq";
522 interrupts = <0 98 0>, <0 238 0>;
523 spi-max-frequency = <50000000>;
524
Gilad Avidovcff4ca72013-07-01 17:35:36 -0600525 qcom,gpio-mosi = <&msmgpio 86 0>;
526 qcom,gpio-miso = <&msmgpio 87 0>;
527 qcom,gpio-clk = <&msmgpio 89 0>;
528 qcom,gpio-cs0 = <&msmgpio 88 0>;
Gilad Avidova460c472013-04-12 16:23:32 -0600529
530 qcom,infinite-mode = <0>;
531 qcom,use-bam;
532 qcom,ver-reg-exists;
533 qcom,bam-consumer-pipe-index = <18>;
534 qcom,bam-producer-pipe-index = <19>;
Gilad Avidovcff4ca72013-07-01 17:35:36 -0600535 qcom,master-id = <86>;
Gilad Avidova460c472013-04-12 16:23:32 -0600536 };
537
Vikram Mulukutla1ac32fd2013-01-28 10:03:58 -0800538 qcom,pronto@fb21b000 {
539 compatible = "qcom,pil-pronto";
540 reg = <0xfb21b000 0x3000>,
541 <0xfc401700 0x4>,
542 <0xfd485300 0xc>;
543 reg-names = "pmu_base", "clk_base", "halt_base";
544 interrupts = <0 149 1>;
545 vdd_pronto_pll-supply = <&pm8110_l10>;
546
547 qcom,firmware-name = "wcnss";
Sameer Thalappil7abeb222013-04-02 11:13:42 -0700548
Sameer Thalappil4ba86302013-04-05 17:36:54 -0700549 /* GPIO inputs from wcnss */
Sameer Thalappil7abeb222013-04-02 11:13:42 -0700550 qcom,gpio-err-fatal = <&smp2pgpio_ssr_smp2p_4_in 0 0>;
Sameer Thalappilb1e03c02013-04-29 14:52:00 -0700551 qcom,gpio-err-ready = <&smp2pgpio_ssr_smp2p_4_in 1 0>;
Sameer Thalappil4ba86302013-04-05 17:36:54 -0700552 qcom,gpio-proxy-unvote = <&smp2pgpio_ssr_smp2p_4_in 2 0>;
Sameer Thalappil7abeb222013-04-02 11:13:42 -0700553
554 /* GPIO output to wcnss */
555 qcom,gpio-force-stop = <&smp2pgpio_ssr_smp2p_4_out 0 0>;
Vikram Mulukutla1ac32fd2013-01-28 10:03:58 -0800556 };
557
Sameer Thalappil1b65cd02013-04-03 16:42:34 -0700558 qcom,iris-fm {
559 compatible = "qcom,iris_fm";
560 };
561
Fred Oh92b18a02013-01-22 13:29:41 -0800562 sound {
563 compatible = "qcom,msm8x10-audio-codec";
564 qcom,model = "msm8x10-snd-card";
565 };
566
567 qcom,msm-pcm {
568 compatible = "qcom,msm-pcm-dsp";
Kuirong Wang16f52d62013-03-07 10:49:27 -0800569 qcom,msm-pcm-dsp-id = <0>;
Fred Oh92b18a02013-01-22 13:29:41 -0800570 };
571
Mingming Yin8b92f9b2013-05-01 14:10:26 -0700572 qcom,msm-pcm-low-latency {
573 compatible = "qcom,msm-pcm-dsp";
574 qcom,msm-pcm-dsp-id = <1>;
575 qcom,msm-pcm-low-latency;
576 };
577
Fred Oh92b18a02013-01-22 13:29:41 -0800578 qcom,msm-pcm-routing {
579 compatible = "qcom,msm-pcm-routing";
580 };
581
582 qcom,msm-pcm-lpa {
583 compatible = "qcom,msm-pcm-lpa";
584 };
585
586 qcom,msm-compr-dsp {
587 compatible = "qcom,msm-compr-dsp";
588 };
589
590 qcom,msm-voip-dsp {
591 compatible = "qcom,msm-voip-dsp";
592 };
593
594 qcom,msm-pcm-voice {
595 compatible = "qcom,msm-pcm-voice";
596 };
597
598 qcom,msm-stub-codec {
599 compatible = "qcom,msm-stub-codec";
600 };
601
602 qcom,msm-dai-fe {
603 compatible = "qcom,msm-dai-fe";
604 };
605
606 qcom,msm-pcm-afe {
607 compatible = "qcom,msm-pcm-afe";
608 };
609
610 qcom,msm-dai-mi2s {
611 compatible = "qcom,msm-dai-mi2s";
612 qcom,msm-dai-q6-mi2s-prim {
613 compatible = "qcom,msm-dai-q6-mi2s";
614 qcom,msm-dai-q6-mi2s-dev-id = <0>;
Kuirong Wang16f52d62013-03-07 10:49:27 -0800615 qcom,msm-mi2s-rx-lines = <0>;
616 qcom,msm-mi2s-tx-lines = <3>;
Fred Oh92b18a02013-01-22 13:29:41 -0800617 };
618
619 qcom,msm-dai-q6-mi2s-sec {
620 compatible = "qcom,msm-dai-q6-mi2s";
621 qcom,msm-dai-q6-mi2s-dev-id = <1>;
Kuirong Wang16f52d62013-03-07 10:49:27 -0800622 qcom,msm-mi2s-rx-lines = <3>;
623 qcom,msm-mi2s-tx-lines = <0>;
Fred Oh92b18a02013-01-22 13:29:41 -0800624 };
625 };
626
627 qcom,msm-dai-q6 {
628 compatible = "qcom,msm-dai-q6";
629 qcom,msm-dai-q6-bt-sco-rx {
630 compatible = "qcom,msm-dai-q6-dev";
631 qcom,msm-dai-q6-dev-id = <12288>;
632 };
633
634 qcom,msm-dai-q6-bt-sco-tx {
635 compatible = "qcom,msm-dai-q6-dev";
636 qcom,msm-dai-q6-dev-id = <12289>;
637 };
638
639 qcom,msm-dai-q6-int-fm-rx {
640 compatible = "qcom,msm-dai-q6-dev";
641 qcom,msm-dai-q6-dev-id = <12292>;
642 };
643
644 qcom,msm-dai-q6-int-fm-tx {
645 compatible = "qcom,msm-dai-q6-dev";
646 qcom,msm-dai-q6-dev-id = <12293>;
647 };
648
649 qcom,msm-dai-q6-be-afe-pcm-rx {
650 compatible = "qcom,msm-dai-q6-dev";
651 qcom,msm-dai-q6-dev-id = <224>;
652 };
653
654 qcom,msm-dai-q6-be-afe-pcm-tx {
655 compatible = "qcom,msm-dai-q6-dev";
656 qcom,msm-dai-q6-dev-id = <225>;
657 };
658
659 qcom,msm-dai-q6-afe-proxy-rx {
660 compatible = "qcom,msm-dai-q6-dev";
661 qcom,msm-dai-q6-dev-id = <241>;
662 };
663
664 qcom,msm-dai-q6-afe-proxy-tx {
665 compatible = "qcom,msm-dai-q6-dev";
666 qcom,msm-dai-q6-dev-id = <240>;
667 };
Vicky Sehrawatfc8044f2013-04-18 11:34:32 -0700668
669 qcom,msm-dai-q6-incall-record-rx {
670 compatible = "qcom,msm-dai-q6-dev";
671 qcom,msm-dai-q6-dev-id = <32771>;
672 };
673
674 qcom,msm-dai-q6-incall-record-tx {
675 compatible = "qcom,msm-dai-q6-dev";
676 qcom,msm-dai-q6-dev-id = <32772>;
677 };
678
679 qcom,msm-dai-q6-incall-music-rx {
680 compatible = "qcom,msm-dai-q6-dev";
681 qcom,msm-dai-q6-dev-id = <32773>;
682 };
Fred Oh92b18a02013-01-22 13:29:41 -0800683 };
684
685 qcom,msm-pcm-hostless {
686 compatible = "qcom,msm-pcm-hostless";
687 };
688
Sameer Thalappil3928fef2013-04-08 11:51:15 -0700689 qcom,wcnss-wlan@fb000000 {
690 compatible = "qcom,wcnss_wlan";
Sameer Thalappilb2b93672013-04-18 17:00:46 -0700691 reg = <0xfb000000 0x280000>,
692 <0xf9011008 0x04>;
693 reg-names = "wcnss_mmio", "wcnss_fiq";
Sameer Thalappil3928fef2013-04-08 11:51:15 -0700694 interrupts = <0 145 0>, <0 146 0>;
695 interrupt-names = "wcnss_wlantx_irq", "wcnss_wlanrx_irq";
696
697 qcom,pronto-vddmx-supply = <&pm8110_l3>;
698 qcom,pronto-vddcx-supply = <&pm8110_s1>;
699 qcom,pronto-vddpx-supply = <&pm8110_l6>;
700 qcom,iris-vddxo-supply = <&pm8110_l10>;
701 qcom,iris-vddrfa-supply = <&pm8110_l5>;
702 qcom,iris-vddpa-supply = <&pm8110_l16>;
703 qcom,iris-vdddig-supply = <&pm8110_l5>;
704
705 gpios = <&msmgpio 23 0>, <&msmgpio 24 0>, <&msmgpio 25 0>, <&msmgpio 26 0>, <&msmgpio 27 0>;
Sameer Thalappil820f87b2013-05-21 20:40:54 -0700706 qcom,has-pronto-hw;
Sameer Thalappilb56dc142013-05-21 14:23:46 -0700707 qcom,wlan-rx-buff-count = <256>;
Sameer Thalappild3d6dcf2013-07-03 15:03:42 -0700708 qcom,has-autodetect-xo;
Sameer Thalappil3928fef2013-04-08 11:51:15 -0700709 };
710
Vikram Mulukutla186edd62013-02-22 14:10:40 -0800711 qcom,mss@fc880000 {
712 compatible = "qcom,pil-q6v5-mss";
713 reg = <0xfc880000 0x100>,
714 <0xfd485000 0x400>,
715 <0xfc820000 0x020>,
716 <0xfc401680 0x004>,
Vikram Mulukutla186edd62013-02-22 14:10:40 -0800717 <0xfd485194 0x4>;
718 reg-names = "qdsp6_base", "halt_base", "rmb_base",
Matt Wagantall724b2bb2013-03-18 14:54:06 -0700719 "restart_reg", "cxrail_bhs_reg";
Vikram Mulukutla186edd62013-02-22 14:10:40 -0800720
721 interrupts = <0 24 1>;
Vikram Mulukutla186edd62013-02-22 14:10:40 -0800722 vdd_cx-supply = <&pm8110_s1_corner>;
723 vdd_mx-supply = <&pm8110_l3>;
724 vdd_pll-supply = <&pm8110_l10>;
725 qcom,vdd_pll = <1800000>;
726 qcom,is-loadable;
727 qcom,firmware-name = "mba";
728 qcom,pil-self-auth;
Vikram Mulukutla7268d9f2013-04-01 16:57:57 -0700729
Seemanta Duttaa0f253e2013-01-16 18:54:40 -0800730 /* GPIO inputs from mss */
Vikram Mulukutla7268d9f2013-04-01 16:57:57 -0700731 qcom,gpio-err-fatal = <&smp2pgpio_ssr_smp2p_1_in 0 0>;
Seemanta Dutta9fb72ed2013-01-25 14:22:15 -0800732 qcom,gpio-err-ready = <&smp2pgpio_ssr_smp2p_1_in 1 0>;
Seemanta Duttaa0f253e2013-01-16 18:54:40 -0800733 qcom,gpio-proxy-unvote = <&smp2pgpio_ssr_smp2p_1_in 2 0>;
Seemanta Dutta0adbbf02013-03-12 17:26:17 -0700734 qcom,gpio-stop-ack = <&smp2pgpio_ssr_smp2p_1_in 3 0>;
Vikram Mulukutla7268d9f2013-04-01 16:57:57 -0700735
736 /* GPIO output to mss */
737 qcom,gpio-force-stop = <&smp2pgpio_ssr_smp2p_1_out 0 0>;
Vikram Mulukutla186edd62013-02-22 14:10:40 -0800738 };
739
Vikram Mulukutla36d2dc42012-11-16 15:36:00 -0800740 qcom,lpass@fe200000 {
741 compatible = "qcom,pil-q6v5-lpass";
742 reg = <0xfe200000 0x00100>,
Matt Wagantall015b50af2013-03-05 18:51:16 -0800743 <0xfd485100 0x00010>,
744 <0xfc4016c0 0x00004>;
745 reg-names = "qdsp6_base", "halt_base", "restart_reg";
Vikram Mulukutla36d2dc42012-11-16 15:36:00 -0800746 interrupts = <0 162 1>;
Matt Wagantall6c515982013-01-29 14:58:43 -0800747 vdd_cx-supply = <&pm8110_s1_corner>;
Vikram Mulukutla36d2dc42012-11-16 15:36:00 -0800748 qcom,firmware-name = "adsp";
Ravishankar Sarawadi2e8ac7d2013-03-28 15:23:30 -0700749
Ravishankar Sarawadiab203a82013-04-09 18:46:11 -0700750 /* GPIO inputs from lpass */
Ravishankar Sarawadi2e8ac7d2013-03-28 15:23:30 -0700751 qcom,gpio-err-fatal = <&smp2pgpio_ssr_smp2p_2_in 0 0>;
Ravishankar Sarawadiab203a82013-04-09 18:46:11 -0700752 qcom,gpio-proxy-unvote = <&smp2pgpio_ssr_smp2p_2_in 2 0>;
Ravishankar Sarawadi7edc9d72013-04-09 18:15:03 -0700753 qcom,gpio-err-ready = <&smp2pgpio_ssr_smp2p_2_in 1 0>;
Ravishankar Sarawadi2e8ac7d2013-03-28 15:23:30 -0700754
755 /* GPIO output to lpass */
756 qcom,gpio-force-stop = <&smp2pgpio_ssr_smp2p_2_out 0 0>;
Vikram Mulukutla36d2dc42012-11-16 15:36:00 -0800757 };
Siddartha Mohanadossf7d2f4d2013-03-11 22:10:15 -0700758
759 tsens: tsens@fc4a8000 {
760 compatible = "qcom,msm-tsens";
761 reg = <0xfc4a8000 0x2000>,
Siddartha Mohanadoss6ddc1922013-07-08 17:40:11 -0700762 <0xfc4bc000 0x1000>;
Siddartha Mohanadossf7d2f4d2013-03-11 22:10:15 -0700763 reg-names = "tsens_physical", "tsens_eeprom_physical";
764 interrupts = <0 184 0>;
765 qcom,sensors = <2>;
766 qcom,slope = <2901 2846>;
Siddartha Mohanadossb2f48982013-03-28 13:51:38 -0700767 qcom,calib-mode = "fuse_map3";
Siddartha Mohanadoss921f1f02013-04-04 16:30:03 -0700768 qcom,sensor-id = <0 5>;
Siddartha Mohanadossf7d2f4d2013-03-11 22:10:15 -0700769 };
770
Jennifer Liuf588d3a2013-04-05 10:11:48 -0700771 qcom,msm-thermal {
772 compatible = "qcom,msm-thermal";
Jennifer Liud17e9eb2013-04-17 11:56:58 -0700773 qcom,sensor-id = <5>;
Jennifer Liuf588d3a2013-04-05 10:11:48 -0700774 qcom,poll-ms = <250>;
775 qcom,limit-temp = <60>;
776 qcom,temp-hysteresis = <10>;
777 qcom,freq-step = <2>;
Praveen Chidambarama7435ce2013-05-03 12:52:42 -0600778 qcom,freq-control-mask = <0xf>;
Jennifer Liu1a70a9c2013-06-19 17:59:25 -0700779 qcom,core-limit-temp = <80>;
780 qcom,core-temp-hysteresis = <10>;
781 qcom,core-control-mask = <0xe>;
Jennifer Liu049780e2013-06-26 14:24:13 -0700782 qcom,vdd-restriction-temp = <5>;
783 qcom,vdd-restriction-temp-hysteresis = <10>;
Jennifer Liu9cddf2d2013-07-05 13:32:29 -0700784 vdd-dig-supply = <&pm8110_s1_floor_corner>;
Jennifer Liu049780e2013-06-26 14:24:13 -0700785
786 qcom,vdd-dig-rstr{
Jennifer Liu9cddf2d2013-07-05 13:32:29 -0700787 qcom,vdd-rstr-reg = "vdd-dig";
Jennifer Liu049780e2013-06-26 14:24:13 -0700788 qcom,levels = <5 7 7>; /* Nominal, Super Turbo, Super Turbo */
789 qcom,min-level = <1>; /* No Request */
790 };
791
792 qcom,vdd-apps-rstr{
Jennifer Liu9cddf2d2013-07-05 13:32:29 -0700793 qcom,vdd-rstr-reg = "vdd-apps";
Jennifer Liu049780e2013-06-26 14:24:13 -0700794 qcom,levels = <600000 787200 998400>;
795 qcom,freq-req;
796 };
Jennifer Liuf588d3a2013-04-05 10:11:48 -0700797 };
Jeff Hugoae4ab9f62013-04-08 13:43:08 -0600798
799 qcom,ipc-spinlock@fd484000 {
800 compatible = "qcom,ipc-spinlock-sfpb";
801 reg = <0xfd484000 0x400>;
802 qcom,num-locks = <8>;
803 };
Jeff Hugode2822a2013-04-08 14:09:38 -0600804
805 qcom,bam_dmux@fc834000 {
806 compatible = "qcom,bam_dmux";
807 reg = <0xfc834000 0x7000>;
808 interrupts = <0 29 1>;
809 };
Hariprasad Dhalinarasimha3a3e4e32013-04-14 16:18:30 -0700810
Neeti Desai8349e9c2013-07-17 11:29:33 -0700811 qcom,qseecom@da00000 {
Hariprasad Dhalinarasimha3a3e4e32013-04-14 16:18:30 -0700812 compatible = "qcom,qseecom";
Neeti Desai8349e9c2013-07-17 11:29:33 -0700813 reg = <0xda00000 0x100000>;
Hariprasad Dhalinarasimha3a3e4e32013-04-14 16:18:30 -0700814 reg-names = "secapp-region";
815 qcom,disk-encrypt-pipe-pair = <2>;
816 qcom,hlos-ce-hw-instance = <0>;
817 qcom,qsee-ce-hw-instance = <0>;
818 qcom,msm-bus,name = "qseecom-noc";
819 qcom,msm-bus,num-cases = <4>;
820 qcom,msm-bus,active-only = <0>;
821 qcom,msm-bus,num-paths = <1>;
822 qcom,msm-bus,vectors-KBps =
823 <55 512 0 0>,
824 <55 512 3936000 393600>,
825 <55 512 3936000 393600>,
826 <55 512 3936000 393600>;
827 };
Aparna Dase7cab2e2013-04-16 16:54:47 -0700828
Hariprasad Dhalinarasimhac8e0f312013-04-13 17:18:50 -0700829 qcom,msm-rng@f9bff000 {
830 compatible = "qcom,msm-rng";
831 reg = <0xf9bff000 0x200>;
832 qcom,msm-rng-iface-clk;
Hariprasad Dhalinarasimhae799fb72013-06-03 13:51:38 -0700833 qcom,msm-bus,name = "msm-rng-noc";
834 qcom,msm-bus,num-cases = <2>;
835 qcom,msm-bus,num-paths = <1>;
836 qcom,msm-bus,vectors-KBps =
837 <1 618 0 0>,
838 <1 618 0 800>;
Hariprasad Dhalinarasimhac8e0f312013-04-13 17:18:50 -0700839 };
840
Aparna Das2948da92013-04-25 10:11:15 -0700841 qcom,msm-rtb {
842 compatible = "qcom,msm-rtb";
843 qcom,memory-reservation-type = "EBI1";
844 qcom,memory-reservation-size = <0x100000>; /* 1M EBI1 buffer */
845 };
846
Pratik Patel3a2f0922013-06-13 23:52:05 -0700847 jtag_fuse: jtagfuse@fc4be024 {
848 compatible = "qcom,jtag-fuse";
849 reg = <0xfc4be024 0x8>;
850 reg-names = "fuse-base";
851 };
852
Aparna Dase7cab2e2013-04-16 16:54:47 -0700853 jtag_mm0: jtagmm@fc34c000 {
854 compatible = "qcom,jtag-mm";
855 reg = <0xfc34c000 0x1000>,
856 <0xfc340000 0x1000>;
857 reg-names = "etm-base","debug-base";
858 };
859
860 jtag_mm1: jtagmm@fc34d000 {
861 compatible = "qcom,jtag-mm";
862 reg = <0xfc34d000 0x1000>,
863 <0xfc342000 0x1000>;
864 reg-names = "etm-base","debug-base";
865 };
866
867 jtag_mm2: jtagmm@fc34e000 {
868 compatible = "qcom,jtag-mm";
869 reg = <0xfc34e000 0x1000>,
870 <0xfc344000 0x1000>;
871 reg-names = "etm-base","debug-base";
872 };
873
874 jtag_mm3: jtagmm@fc34f000 {
875 compatible = "qcom,jtag-mm";
876 reg = <0xfc34f000 0x1000>,
877 <0xfc346000 0x1000>;
878 reg-names = "etm-base","debug-base";
879 };
Hariprasad Dhalinarasimha9d3638a2013-04-13 22:42:11 -0700880
881 qcom,tz-log@fe805720 {
882 compatible = "qcom,tz-log";
883 reg = <0x0fe805720 0x1000>;
884 };
Hariprasad Dhalinarasimha30af29a2013-05-07 17:48:04 -0700885
886 qcom,qcrypto@fd404000 {
887 compatible = "qcom,qcrypto";
888 reg = <0xfd400000 0x20000>,
889 <0xfd404000 0x8000>;
890 reg-names = "crypto-base","crypto-bam-base";
891 interrupts = <0 207 0>;
892 qcom,bam-pipe-pair = <2>;
893 qcom,ce-hw-instance = <1>;
894 qcom,ce-hw-shared;
895 qcom,msm-bus,name = "qcrypto-noc";
896 qcom,msm-bus,num-cases = <2>;
897 qcom,msm-bus,active-only = <0>;
898 qcom,msm-bus,num-paths = <1>;
899 qcom,msm-bus,vectors-KBps =
900 <55 512 0 0>,
901 <55 512 393600 3936000>;
902 };
903
904 qcom,qcedev@fd400000 {
905 compatible = "qcom,qcedev";
906 reg = <0xfd400000 0x20000>,
907 <0xfd404000 0x8000>;
908 reg-names = "crypto-base","crypto-bam-base";
909 interrupts = <0 207 0>;
910 qcom,bam-pipe-pair = <1>;
911 qcom,ce-hw-instance = <1>;
912 qcom,ce-hw-shared;
913 qcom,msm-bus,name = "qcedev-noc";
914 qcom,msm-bus,num-cases = <2>;
915 qcom,msm-bus,active-only = <0>;
916 qcom,msm-bus,num-paths = <1>;
917 qcom,msm-bus,vectors-KBps =
918 <55 512 0 0>,
919 <55 512 393600 3936000>;
920 };
921
Neil Leeder23b9fa42013-07-11 09:23:45 -0400922 cpu-pmu {
923 compatible = "arm,cortex-a7-pmu";
924 qcom,irq-is-percpu;
925 interrupts = <1 7 0xf00>;
926 };
Syed Rameez Mustafad3935822012-10-09 11:23:20 -0700927};
David Collinsc6b34832012-10-24 12:57:57 -0700928
Matt Wagantall1bf56932012-11-29 15:03:29 -0800929&gdsc_vfe {
930 status = "ok";
931};
932
933&gdsc_oxili_cx {
934 status = "ok";
935};
936
Olav Haugan9c255522012-11-16 16:43:17 -0800937&lpass_iommu {
938 status = "ok";
939};
940
941&copss_iommu {
942 status = "ok";
943};
944
945&mdpe_iommu {
946 status = "ok";
947};
948
949&mdps_iommu {
950 status = "ok";
951};
952
953&gfx_iommu {
954 status = "ok";
955};
956
957&vfe_iommu {
958 status = "ok";
959};
960
Syed Rameez Mustafa3971c142013-01-09 19:04:53 -0800961/include/ "msm8610-iommu-domains.dtsi"
Olav Haugan4bc4b692012-12-10 18:29:35 -0800962
Xiaozhe Shi350baa92013-04-09 18:13:50 -0700963/include/ "msm-pm8110-rpm-regulator.dtsi"
Kenneth Heitkedb6e1b12012-11-20 15:24:42 -0700964/include/ "msm-pm8110.dtsi"
Xiaozhe Shi1581a7b2013-02-21 15:17:57 -0800965/include/ "msm8610-regulator.dtsi"
Siddartha Mohanadoss0f664a82013-03-11 22:52:01 -0700966
967&pm8110_vadc {
968 chan@0 {
969 label = "usb_in";
970 reg = <0>;
971 qcom,decimation = <0>;
972 qcom,pre-div-channel-scaling = <4>;
973 qcom,calibration-type = "absolute";
974 qcom,scale-function = <0>;
975 qcom,hw-settle-time = <0>;
976 qcom,fast-avg-setup = <0>;
977 };
978
979 chan@2 {
980 label = "vchg_sns";
981 reg = <2>;
982 qcom,decimation = <0>;
Siddartha Mohanadoss478e5c92013-05-01 19:53:27 -0700983 qcom,pre-div-channel-scaling = <2>;
Siddartha Mohanadoss0f664a82013-03-11 22:52:01 -0700984 qcom,calibration-type = "absolute";
985 qcom,scale-function = <0>;
986 qcom,hw-settle-time = <0>;
987 qcom,fast-avg-setup = <0>;
988 };
989
990 chan@5 {
991 label = "vcoin";
992 reg = <5>;
993 qcom,decimation = <0>;
994 qcom,pre-div-channel-scaling = <1>;
995 qcom,calibration-type = "absolute";
996 qcom,scale-function = <0>;
997 qcom,hw-settle-time = <0>;
998 qcom,fast-avg-setup = <0>;
999 };
1000
1001 chan@6 {
1002 label = "vbat_sns";
1003 reg = <6>;
1004 qcom,decimation = <0>;
1005 qcom,pre-div-channel-scaling = <1>;
1006 qcom,calibration-type = "absolute";
1007 qcom,scale-function = <0>;
1008 qcom,hw-settle-time = <0>;
1009 qcom,fast-avg-setup = <0>;
1010 };
1011
1012 chan@7 {
1013 label = "vph_pwr";
1014 reg = <7>;
1015 qcom,decimation = <0>;
1016 qcom,pre-div-channel-scaling = <1>;
1017 qcom,calibration-type = "absolute";
1018 qcom,scale-function = <0>;
1019 qcom,hw-settle-time = <0>;
1020 qcom,fast-avg-setup = <0>;
1021 };
1022
1023 chan@30 {
1024 label = "batt_therm";
1025 reg = <0x30>;
1026 qcom,decimation = <0>;
1027 qcom,pre-div-channel-scaling = <0>;
1028 qcom,calibration-type = "ratiometric";
1029 qcom,scale-function = <1>;
1030 qcom,hw-settle-time = <2>;
1031 qcom,fast-avg-setup = <0>;
1032 };
1033
1034 chan@31 {
1035 label = "batt_id";
1036 reg = <0x31>;
1037 qcom,decimation = <0>;
1038 qcom,pre-div-channel-scaling = <0>;
1039 qcom,calibration-type = "ratiometric";
1040 qcom,scale-function = <0>;
1041 qcom,hw-settle-time = <2>;
1042 qcom,fast-avg-setup = <0>;
1043 };
1044
1045 chan@b2 {
1046 label = "xo_therm_pu2";
1047 reg = <0xb2>;
1048 qcom,decimation = <0>;
1049 qcom,pre-div-channel-scaling = <0>;
1050 qcom,calibration-type = "ratiometric";
1051 qcom,scale-function = <4>;
1052 qcom,hw-settle-time = <2>;
1053 qcom,fast-avg-setup = <0>;
1054 };
Siddartha Mohanadoss984b11e2013-05-31 18:05:51 -07001055
1056 chan@13 {
1057 label = "pa_therm0";
1058 reg = <0x13>;
1059 qcom,decimation = <0>;
1060 qcom,pre-div-channel-scaling = <0>;
1061 qcom,calibration-type = "ratiometric";
1062 qcom,scale-function = <2>;
1063 qcom,hw-settle-time = <2>;
1064 qcom,fast-avg-setup = <0>;
1065 };
Siddartha Mohanadoss0f664a82013-03-11 22:52:01 -07001066};
1067
Siddartha Mohanadoss236e0952013-05-13 10:40:26 -07001068&pm8110_adc_tm {
1069 /* Channel Node */
1070 chan@30 {
1071 label = "batt_therm";
1072 reg = <0x30>;
1073 qcom,decimation = <0>;
1074 qcom,pre-div-channel-scaling = <0>;
1075 qcom,calibration-type = "ratiometric";
1076 qcom,scale-function = <1>;
1077 qcom,hw-settle-time = <2>;
1078 qcom,fast-avg-setup = <3>;
1079 qcom,btm-channel-number = <0x48>;
1080 };
Siddartha Mohanadoss0f664a82013-03-11 22:52:01 -07001081
Siddartha Mohanadoss236e0952013-05-13 10:40:26 -07001082 chan@8 {
1083 label = "die_temp";
1084 reg = <8>;
1085 qcom,decimation = <0>;
1086 qcom,pre-div-channel-scaling = <0>;
1087 qcom,calibration-type = "absolute";
1088 qcom,scale-function = <3>;
1089 qcom,hw-settle-time = <0>;
1090 qcom,fast-avg-setup = <3>;
1091 qcom,btm-channel-number = <0x68>;
1092 };
1093
1094 chan@6 {
1095 label = "vbat_sns";
1096 reg = <6>;
1097 qcom,decimation = <0>;
1098 qcom,pre-div-channel-scaling = <1>;
1099 qcom,calibration-type = "absolute";
1100 qcom,scale-function = <0>;
1101 qcom,hw-settle-time = <0>;
1102 qcom,fast-avg-setup = <3>;
1103 qcom,btm-channel-number = <0x70>;
1104 };
Siddartha Mohanadoss984b11e2013-05-31 18:05:51 -07001105
1106 chan@13 {
1107 label = "pa_therm0";
1108 reg = <0x13>;
1109 qcom,decimation = <0>;
1110 qcom,pre-div-channel-scaling = <0>;
1111 qcom,calibration-type = "ratiometric";
1112 qcom,scale-function = <2>;
1113 qcom,hw-settle-time = <2>;
1114 qcom,fast-avg-setup = <0>;
1115 qcom,btm-channel-number = <0x78>;
1116 qcom,thermal-node;
1117 };
Siddartha Mohanadoss236e0952013-05-13 10:40:26 -07001118};