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gerrit-public.fairphone.software / platform / external / XNNPACK / 39b5e948114fd34943dbd2afc50cd3032bf23a30 / . / BUILD.bazel
blob: 1e0d511f18c42324826e22f860675b78b3795d2c [file] [log] [blame]
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1# Copyright 2019 Google LLC
2#
3# This source code is licensed under the BSD-style license found in the
4# LICENSE file in the root directory of this source tree.
5#
6# Description:
7# XNNPACK - optimized floating-point neural network operators library
8
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]9load(":build_defs.bzl", "xnnpack_aggregate_library", "xnnpack_benchmark", "xnnpack_binary", "xnnpack_cc_library", "xnnpack_gcc_std_copts", "xnnpack_min_size_copts", "xnnpack_msvc_std_copts", "xnnpack_optional_armcl_copts", "xnnpack_optional_armcl_deps", "xnnpack_optional_dnnl_copts", "xnnpack_optional_dnnl_deps", "xnnpack_optional_gemmlowp_copts", "xnnpack_optional_gemmlowp_deps", "xnnpack_optional_ruy_copts", "xnnpack_optional_ruy_deps", "xnnpack_optional_tflite_copts", "xnnpack_optional_tflite_deps", "xnnpack_std_cxxopts", "xnnpack_unit_test", "xnnpack_visibility")
Marat Dukhan69c3f2c2019-11-06 12:30:01 -0800[diff] [blame]10
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]11licenses(["notice"])
12
13exports_files(["LICENSE"])
14
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]15OPERATOR_BENCHMARK_DEPS = [
16 ":XNNPACK",
17 ":bench_utils",
18 "@cpuinfo",
Frank Barchard0c849732020-06-12 13:31:32 -0700[diff] [blame]19 "@FP16",
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]20 "@pthreadpool",
21]
22
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]23MICROKERNEL_BENCHMARK_DEPS = [
24 ":ukernels",
25 ":bench_utils",
Frank Barchard7e955972019-10-11 10:34:25 -0700[diff] [blame]26 ":enable_assembly",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]27 "@cpuinfo",
28 "@FP16",
29 "@pthreadpool",
30]
31
Marat Dukhan6adff4e2019-10-14 18:32:07 -0700[diff] [blame]32ACCURACY_EVAL_DEPS = [
33 ":XNNPACK",
34 ":ukernels",
35 "@FP16",
36 "@pthreadpool",
37]
38
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]39MICROKERNEL_TEST_DEPS = [
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]40 ":ukernels_test_mode",
Frank Barchard7e955972019-10-11 10:34:25 -0700[diff] [blame]41 ":enable_assembly",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]42 "@cpuinfo",
43 "@FP16",
44 "@pthreadpool",
45]
46
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]47OPERATOR_TEST_DEPS = [
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]48 ":XNNPACK_test_mode",
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]49 "@pthreadpool",
50 "@FP16",
51]
52
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]53OPERATOR_SRCS = [
Marat Dukhane8265432020-04-28 18:42:59 -0700[diff] [blame]54 "src/operators/argmax-pooling-nhwc.c",
55 "src/operators/average-pooling-nhwc.c",
56 "src/operators/binary-elementwise-nd.c",
Marat Dukhane8265432020-04-28 18:42:59 -0700[diff] [blame]57 "src/operators/channel-shuffle-nc.c",
Marat Dukhan065b11e2020-05-22 09:49:41 -0700[diff] [blame]58 "src/operators/constant-pad-nd.c",
Marat Dukhane8265432020-04-28 18:42:59 -0700[diff] [blame]59 "src/operators/convolution-nchw.c",
60 "src/operators/convolution-nhwc.c",
61 "src/operators/deconvolution-nhwc.c",
62 "src/operators/fully-connected-nc.c",
63 "src/operators/global-average-pooling-ncw.c",
64 "src/operators/global-average-pooling-nwc.c",
Marat Dukhane8265432020-04-28 18:42:59 -0700[diff] [blame]65 "src/operators/leaky-relu-nc.c",
66 "src/operators/max-pooling-nhwc.c",
67 "src/operators/prelu-nc.c",
68 "src/operators/resize-bilinear-nhwc.c",
69 "src/operators/sigmoid-nc.c",
70 "src/operators/softmax-nc.c",
Marat Dukhanc3065f52020-06-04 13:33:32 -0700[diff] [blame]71 "src/operators/unary-elementwise-nc.c",
Marat Dukhane8265432020-04-28 18:42:59 -0700[diff] [blame]72 "src/operators/unpooling-nhwc.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]73]
74
Marat Dukhan95e8b7a2020-06-03 12:46:26 -0700[diff] [blame]75SUBGRAPH_SRCS = [
Marat Dukhan5fab4092020-06-10 01:28:28 -0700[diff] [blame]76 "src/subgraph/abs.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -0700[diff] [blame]77 "src/subgraph/add2.c",
78 "src/subgraph/argmax-pooling-2d.c",
79 "src/subgraph/average-pooling-2d.c",
Marat Dukhan5fab4092020-06-10 01:28:28 -0700[diff] [blame]80 "src/subgraph/bankers-rounding.c",
81 "src/subgraph/ceiling.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -0700[diff] [blame]82 "src/subgraph/clamp.c",
83 "src/subgraph/convolution-2d.c",
84 "src/subgraph/deconvolution-2d.c",
85 "src/subgraph/depthwise-convolution-2d.c",
Marat Dukhan9d3a4592020-06-05 16:52:42 -0700[diff] [blame]86 "src/subgraph/divide.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -0700[diff] [blame]87 "src/subgraph/fully-connected.c",
Marat Dukhan5fab4092020-06-10 01:28:28 -0700[diff] [blame]88 "src/subgraph/floor.c",
Marat Dukhana059b7d2020-06-11 11:41:27 -0700[diff] [blame]89 "src/subgraph/global-average-pooling-2d.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -0700[diff] [blame]90 "src/subgraph/hardswish.c",
Marat Dukhan5bbebac2020-06-10 19:42:15 -0700[diff] [blame]91 "src/subgraph/leaky-relu.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -0700[diff] [blame]92 "src/subgraph/max-pooling-2d.c",
Marat Dukhan9d3a4592020-06-05 16:52:42 -0700[diff] [blame]93 "src/subgraph/maximum2.c",
94 "src/subgraph/minimum2.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -0700[diff] [blame]95 "src/subgraph/multiply2.c",
Marat Dukhan5fab4092020-06-10 01:28:28 -0700[diff] [blame]96 "src/subgraph/negate.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -0700[diff] [blame]97 "src/subgraph/prelu.c",
98 "src/subgraph/sigmoid.c",
99 "src/subgraph/softmax.c",
100 "src/subgraph/static-constant-pad.c",
Marat Dukhan5fab4092020-06-10 01:28:28 -0700[diff] [blame]101 "src/subgraph/square.c",
Marat Dukhan9d3a4592020-06-05 16:52:42 -0700[diff] [blame]102 "src/subgraph/squared-difference.c",
103 "src/subgraph/subtract.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -0700[diff] [blame]104 "src/subgraph/unpooling-2d.c",
105]
106
Marat Dukhan3a77ea72019-12-23 12:10:24 -0800[diff] [blame]107TABLE_SRCS = [
108 "src/tables/exp2-k-over-64.c",
109 "src/tables/exp2-k-over-2048.c",
110]
111
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]112SCALAR_UKERNELS = [
Marat Dukhan329da642019-11-19 21:44:39 -0800[diff] [blame]113 "src/f32-argmaxpool/4x-scalar-c1.c",
Marat Dukhan1e782c42019-11-21 17:02:40 -0800[diff] [blame]114 "src/f32-argmaxpool/9p8x-scalar-c1.c",
Marat Dukhan329da642019-11-19 21:44:39 -0800[diff] [blame]115 "src/f32-argmaxpool/9x-scalar-c1.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]116 "src/f32-avgpool/9p8x-minmax-scalar-c1.c",
117 "src/f32-avgpool/9x-minmax-scalar-c1.c",
Marat Dukhan5c5fa962020-03-10 18:38:33 -0700[diff] [blame]118 "src/f32-clamp/gen/scalar-x1.c",
119 "src/f32-clamp/gen/scalar-x2.c",
120 "src/f32-clamp/gen/scalar-x4.c",
Marat Dukhan441e2212019-12-04 18:30:49 -0800[diff] [blame]121 "src/f32-conv-hwc/3x3s2p0p1c3x4-scalar-1x1.c",
Marat Dukhan6b7dfae2019-12-04 16:00:52 -0800[diff] [blame]122 "src/f32-conv-hwc/3x3s2p1c3x4-scalar-1x1.c",
Marat Dukhan1f29b802020-05-15 23:46:39 -0700[diff] [blame]123 "src/f32-conv-hwc2chw/3x3s2p1c3x4-scalar-1x1.c",
124 "src/f32-dwconv-chw/3x3p1-scalar.c",
125 "src/f32-dwconv-chw/3x3s2p1-scalar.c",
126 "src/f32-dwconv-chw/5x5p2-scalar.c",
127 "src/f32-dwconv-chw/5x5s2p2-scalar.c",
Marat Dukhan163a7e62020-04-09 04:19:26 -0700[diff] [blame]128 "src/f32-dwconv/gen/up1x4-scalar-acc2.c",
129 "src/f32-dwconv/gen/up1x4-scalar.c",
130 "src/f32-dwconv/gen/up1x9-scalar-acc2.c",
131 "src/f32-dwconv/gen/up1x9-scalar.c",
132 "src/f32-dwconv/gen/up1x25-scalar-acc2.c",
133 "src/f32-dwconv/gen/up1x25-scalar.c",
134 "src/f32-dwconv/gen/up2x4-scalar-acc2.c",
135 "src/f32-dwconv/gen/up2x4-scalar.c",
136 "src/f32-dwconv/gen/up2x9-scalar-acc2.c",
137 "src/f32-dwconv/gen/up2x9-scalar.c",
138 "src/f32-dwconv/gen/up2x25-scalar-acc2.c",
139 "src/f32-dwconv/gen/up2x25-scalar.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]140 "src/f32-dwconv/gen/up1x4-minmax-scalar-acc2.c",
141 "src/f32-dwconv/gen/up1x4-minmax-scalar.c",
142 "src/f32-dwconv/gen/up1x9-minmax-scalar-acc2.c",
143 "src/f32-dwconv/gen/up1x9-minmax-scalar.c",
Marat Dukhan163a7e62020-04-09 04:19:26 -0700[diff] [blame]144 "src/f32-dwconv/gen/up1x25-minmax-scalar-acc2.c",
145 "src/f32-dwconv/gen/up1x25-minmax-scalar.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]146 "src/f32-dwconv/gen/up2x4-minmax-scalar-acc2.c",
147 "src/f32-dwconv/gen/up2x4-minmax-scalar.c",
148 "src/f32-dwconv/gen/up2x9-minmax-scalar-acc2.c",
149 "src/f32-dwconv/gen/up2x9-minmax-scalar.c",
Marat Dukhan163a7e62020-04-09 04:19:26 -0700[diff] [blame]150 "src/f32-dwconv/gen/up2x25-minmax-scalar-acc2.c",
151 "src/f32-dwconv/gen/up2x25-minmax-scalar.c",
Marat Dukhan1f29b802020-05-15 23:46:39 -0700[diff] [blame]152 "src/f32-gavgpool-cw/scalar-x1.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]153 "src/f32-gavgpool/7p7x-minmax-scalar-c1.c",
154 "src/f32-gavgpool/7x-minmax-scalar-c1.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]155 "src/f32-gemm/gen-inc/1x4inc-minmax-scalar.c",
156 "src/f32-gemm/gen-inc/2x4inc-minmax-scalar.c",
157 "src/f32-gemm/gen-inc/4x4inc-minmax-scalar.c",
Marat Dukhan163a7e62020-04-09 04:19:26 -0700[diff] [blame]158 "src/f32-gemm/gen/1x4-scalar.c",
159 "src/f32-gemm/gen/2x4-scalar.c",
160 "src/f32-gemm/gen/4x2-scalar.c",
161 "src/f32-gemm/gen/4x4-scalar.c",
Marat Dukhan467f6362020-05-22 23:21:55 -0700[diff] [blame]162 "src/f32-gemm/gen/1x4-relu-scalar.c",
163 "src/f32-gemm/gen/2x4-relu-scalar.c",
164 "src/f32-gemm/gen/4x2-relu-scalar.c",
165 "src/f32-gemm/gen/4x4-relu-scalar.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]166 "src/f32-gemm/gen/1x4-minmax-scalar.c",
167 "src/f32-gemm/gen/2x4-minmax-scalar.c",
168 "src/f32-gemm/gen/4x2-minmax-scalar.c",
169 "src/f32-gemm/gen/4x4-minmax-scalar.c",
Marat Dukhan662faa02019-12-09 22:48:16 -0800[diff] [blame]170 "src/f32-hswish/gen/scalar-x1.c",
171 "src/f32-hswish/gen/scalar-x2.c",
172 "src/f32-hswish/gen/scalar-x4.c",
Marat Dukhan660fd192020-03-10 04:55:30 -0700[diff] [blame]173 "src/f32-ibilinear/gen/scalar-c1.c",
174 "src/f32-ibilinear/gen/scalar-c2.c",
175 "src/f32-ibilinear/gen/scalar-c4.c",
Marat Dukhan163a7e62020-04-09 04:19:26 -0700[diff] [blame]176 "src/f32-igemm/gen/1x4-scalar.c",
177 "src/f32-igemm/gen/2x4-scalar.c",
178 "src/f32-igemm/gen/4x2-scalar.c",
179 "src/f32-igemm/gen/4x4-scalar.c",
Marat Dukhan467f6362020-05-22 23:21:55 -0700[diff] [blame]180 "src/f32-igemm/gen/1x4-relu-scalar.c",
181 "src/f32-igemm/gen/2x4-relu-scalar.c",
182 "src/f32-igemm/gen/4x2-relu-scalar.c",
183 "src/f32-igemm/gen/4x4-relu-scalar.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]184 "src/f32-igemm/gen/1x4-minmax-scalar.c",
185 "src/f32-igemm/gen/2x4-minmax-scalar.c",
186 "src/f32-igemm/gen/4x2-minmax-scalar.c",
187 "src/f32-igemm/gen/4x4-minmax-scalar.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]188 "src/f32-maxpool/9p8x-minmax-scalar-c1.c",
189 "src/f32-pavgpool/9p8x-minmax-scalar-c1.c",
190 "src/f32-pavgpool/9x-minmax-scalar-c1.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]191 "src/f32-ppmm/gen/2x4-minmax-scalar.c",
192 "src/f32-ppmm/gen/3x3-minmax-scalar.c",
193 "src/f32-ppmm/gen/4x2-minmax-scalar.c",
194 "src/f32-ppmm/gen/4x4-minmax-scalar.c",
Marat Dukhan40a672f2019-11-25 03:08:22 -0800[diff] [blame]195 "src/f32-prelu/gen/scalar-2x1.c",
196 "src/f32-prelu/gen/scalar-2x4.c",
Marat Dukhanf46f6752020-01-21 11:03:49 -0800[diff] [blame]197 "src/f32-raddstoreexpminusmax/gen/scalar-lut64-p2-x1.c",
198 "src/f32-raddstoreexpminusmax/gen/scalar-lut64-p2-x2.c",
199 "src/f32-raddstoreexpminusmax/gen/scalar-lut64-p2-x2-acc2.c",
200 "src/f32-raddstoreexpminusmax/gen/scalar-lut64-p2-x4.c",
201 "src/f32-raddstoreexpminusmax/gen/scalar-lut64-p2-x4-acc2.c",
202 "src/f32-raddstoreexpminusmax/gen/scalar-lut64-p2-x4-acc4.c",
203 "src/f32-raddstoreexpminusmax/gen/scalar-p5-x1.c",
204 "src/f32-raddstoreexpminusmax/gen/scalar-p5-x2.c",
205 "src/f32-raddstoreexpminusmax/gen/scalar-p5-x2-acc2.c",
206 "src/f32-raddstoreexpminusmax/gen/scalar-p5-x4.c",
207 "src/f32-raddstoreexpminusmax/gen/scalar-p5-x4-acc2.c",
208 "src/f32-raddstoreexpminusmax/gen/scalar-p5-x4-acc4.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]209 "src/f32-rmax/scalar.c",
Marat Dukhan3a77ea72019-12-23 12:10:24 -0800[diff] [blame]210 "src/f32-sigmoid/gen/scalar-lut2048-p1-div-x1.c",
211 "src/f32-sigmoid/gen/scalar-lut2048-p1-div-x2.c",
212 "src/f32-sigmoid/gen/scalar-lut2048-p1-div-x4.c",
213 "src/f32-sigmoid/gen/scalar-lut64-p2-div-x1.c",
214 "src/f32-sigmoid/gen/scalar-lut64-p2-div-x2.c",
215 "src/f32-sigmoid/gen/scalar-lut64-p2-div-x4.c",
216 "src/f32-sigmoid/gen/scalar-p5-div-x1.c",
217 "src/f32-sigmoid/gen/scalar-p5-div-x2.c",
218 "src/f32-sigmoid/gen/scalar-p5-div-x4.c",
Marat Dukhan355ab432020-04-09 19:01:52 -0700[diff] [blame]219 "src/f32-spmm/gen/1x1-minmax-scalar-pipelined.c",
220 "src/f32-spmm/gen/1x1-minmax-scalar.c",
221 "src/f32-spmm/gen/2x1-minmax-scalar-pipelined.c",
222 "src/f32-spmm/gen/2x1-minmax-scalar.c",
223 "src/f32-spmm/gen/4x1-minmax-scalar-pipelined.c",
224 "src/f32-spmm/gen/4x1-minmax-scalar.c",
225 "src/f32-spmm/gen/8x1-minmax-scalar-pipelined.c",
226 "src/f32-spmm/gen/8x1-minmax-scalar.c",
227 "src/f32-spmm/gen/8x2-minmax-scalar.c",
228 "src/f32-spmm/gen/8x4-minmax-scalar.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]229 "src/f32-vbinary/gen/vadd-minmax-scalar-x1.c",
230 "src/f32-vbinary/gen/vadd-minmax-scalar-x2.c",
231 "src/f32-vbinary/gen/vadd-minmax-scalar-x4.c",
232 "src/f32-vbinary/gen/vaddc-minmax-scalar-x1.c",
233 "src/f32-vbinary/gen/vaddc-minmax-scalar-x2.c",
234 "src/f32-vbinary/gen/vaddc-minmax-scalar-x4.c",
235 "src/f32-vbinary/gen/vdiv-minmax-scalar-x1.c",
236 "src/f32-vbinary/gen/vdiv-minmax-scalar-x2.c",
237 "src/f32-vbinary/gen/vdiv-minmax-scalar-x4.c",
238 "src/f32-vbinary/gen/vdivc-minmax-scalar-x1.c",
239 "src/f32-vbinary/gen/vdivc-minmax-scalar-x2.c",
240 "src/f32-vbinary/gen/vdivc-minmax-scalar-x4.c",
Marat Dukhan403b7d42019-12-05 12:49:11 -0800[diff] [blame]241 "src/f32-vbinary/gen/vmax-scalar-x1.c",
242 "src/f32-vbinary/gen/vmax-scalar-x2.c",
243 "src/f32-vbinary/gen/vmax-scalar-x4.c",
244 "src/f32-vbinary/gen/vmaxc-scalar-x1.c",
245 "src/f32-vbinary/gen/vmaxc-scalar-x2.c",
246 "src/f32-vbinary/gen/vmaxc-scalar-x4.c",
247 "src/f32-vbinary/gen/vmin-scalar-x1.c",
248 "src/f32-vbinary/gen/vmin-scalar-x2.c",
249 "src/f32-vbinary/gen/vmin-scalar-x4.c",
250 "src/f32-vbinary/gen/vminc-scalar-x1.c",
251 "src/f32-vbinary/gen/vminc-scalar-x2.c",
252 "src/f32-vbinary/gen/vminc-scalar-x4.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]253 "src/f32-vbinary/gen/vmul-minmax-scalar-x1.c",
254 "src/f32-vbinary/gen/vmul-minmax-scalar-x2.c",
255 "src/f32-vbinary/gen/vmul-minmax-scalar-x4.c",
256 "src/f32-vbinary/gen/vmulc-minmax-scalar-x1.c",
257 "src/f32-vbinary/gen/vmulc-minmax-scalar-x2.c",
258 "src/f32-vbinary/gen/vmulc-minmax-scalar-x4.c",
259 "src/f32-vbinary/gen/vrdivc-minmax-scalar-x1.c",
260 "src/f32-vbinary/gen/vrdivc-minmax-scalar-x2.c",
261 "src/f32-vbinary/gen/vrdivc-minmax-scalar-x4.c",
Marat Dukhan13bafb02020-06-05 00:43:11 -0700[diff] [blame]262 "src/f32-vbinary/gen/vrsqrdiffc-scalar-x1.c",
263 "src/f32-vbinary/gen/vrsqrdiffc-scalar-x2.c",
264 "src/f32-vbinary/gen/vrsqrdiffc-scalar-x4.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]265 "src/f32-vbinary/gen/vrsubc-minmax-scalar-x1.c",
266 "src/f32-vbinary/gen/vrsubc-minmax-scalar-x2.c",
267 "src/f32-vbinary/gen/vrsubc-minmax-scalar-x4.c",
Marat Dukhan13bafb02020-06-05 00:43:11 -0700[diff] [blame]268 "src/f32-vbinary/gen/vsqrdiff-scalar-x1.c",
269 "src/f32-vbinary/gen/vsqrdiff-scalar-x2.c",
270 "src/f32-vbinary/gen/vsqrdiff-scalar-x4.c",
271 "src/f32-vbinary/gen/vsqrdiffc-scalar-x1.c",
272 "src/f32-vbinary/gen/vsqrdiffc-scalar-x2.c",
273 "src/f32-vbinary/gen/vsqrdiffc-scalar-x4.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]274 "src/f32-vbinary/gen/vsub-minmax-scalar-x1.c",
275 "src/f32-vbinary/gen/vsub-minmax-scalar-x2.c",
276 "src/f32-vbinary/gen/vsub-minmax-scalar-x4.c",
277 "src/f32-vbinary/gen/vsubc-minmax-scalar-x1.c",
278 "src/f32-vbinary/gen/vsubc-minmax-scalar-x2.c",
279 "src/f32-vbinary/gen/vsubc-minmax-scalar-x4.c",
Marat Dukhan8cc7efe2020-06-10 16:24:27 -0700[diff] [blame]280 "src/f32-vlrelu/gen/scalar-x1.c",
281 "src/f32-vlrelu/gen/scalar-x2.c",
282 "src/f32-vlrelu/gen/scalar-x4.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]283 "src/f32-vmulcaddc/gen/c1-minmax-scalar-2x.c",
284 "src/f32-vmulcaddc/gen/c2-minmax-scalar-2x.c",
285 "src/f32-vmulcaddc/gen/c4-minmax-scalar-2x.c",
Marat Dukhaneecf8fd2020-06-09 08:59:37 -0700[diff] [blame]286 "src/f32-vrnd/gen/vrndne-scalar-libm-x1.c",
287 "src/f32-vrnd/gen/vrndne-scalar-libm-x2.c",
288 "src/f32-vrnd/gen/vrndne-scalar-libm-x4.c",
289 "src/f32-vrnd/gen/vrndz-scalar-libm-x1.c",
290 "src/f32-vrnd/gen/vrndz-scalar-libm-x2.c",
291 "src/f32-vrnd/gen/vrndz-scalar-libm-x4.c",
292 "src/f32-vrnd/gen/vrndu-scalar-libm-x1.c",
293 "src/f32-vrnd/gen/vrndu-scalar-libm-x2.c",
294 "src/f32-vrnd/gen/vrndu-scalar-libm-x4.c",
295 "src/f32-vrnd/gen/vrndd-scalar-libm-x1.c",
296 "src/f32-vrnd/gen/vrndd-scalar-libm-x2.c",
297 "src/f32-vrnd/gen/vrndd-scalar-libm-x4.c",
Marat Dukhan5020b962020-06-08 13:30:10 -0700[diff] [blame]298 "src/f32-vunary/gen/vabs-scalar-x1.c",
299 "src/f32-vunary/gen/vabs-scalar-x2.c",
300 "src/f32-vunary/gen/vabs-scalar-x4.c",
301 "src/f32-vunary/gen/vneg-scalar-x1.c",
302 "src/f32-vunary/gen/vneg-scalar-x2.c",
303 "src/f32-vunary/gen/vneg-scalar-x4.c",
304 "src/f32-vunary/gen/vsqr-scalar-x1.c",
305 "src/f32-vunary/gen/vsqr-scalar-x2.c",
306 "src/f32-vunary/gen/vsqr-scalar-x4.c",
Marat Dukhan5739f702019-12-22 19:45:09 -0800[diff] [blame]307 "src/math/expminus-scalar-lut2048-p1.c",
308 "src/math/expminus-scalar-lut64-p2.c",
309 "src/math/expminus-scalar-p5.c",
Marat Dukhan075088a2020-05-12 19:42:12 -0700[diff] [blame]310 "src/math/roundne-scalar-addsub.c",
Marat Dukhanffbf96a2020-05-14 02:59:08 -0700[diff] [blame]311 "src/math/roundne-scalar-nearbyint.c",
312 "src/math/roundne-scalar-rint.c",
Marat Dukhanc9852ba2020-05-13 17:21:29 -0700[diff] [blame]313 "src/math/roundd-scalar-addsub.c",
314 "src/math/roundd-scalar-cvt.c",
Marat Dukhanffbf96a2020-05-14 02:59:08 -0700[diff] [blame]315 "src/math/roundd-scalar-floor.c",
Marat Dukhanc9852ba2020-05-13 17:21:29 -0700[diff] [blame]316 "src/math/roundu-scalar-addsub.c",
Marat Dukhanffbf96a2020-05-14 02:59:08 -0700[diff] [blame]317 "src/math/roundu-scalar-ceil.c",
Marat Dukhanc9852ba2020-05-13 17:21:29 -0700[diff] [blame]318 "src/math/roundu-scalar-cvt.c",
Marat Dukhan2dbb9442020-05-12 20:43:43 -0700[diff] [blame]319 "src/math/roundz-scalar-addsub.c",
320 "src/math/roundz-scalar-cvt.c",
Marat Dukhanffbf96a2020-05-14 02:59:08 -0700[diff] [blame]321 "src/math/roundz-scalar-trunc.c",
Marat Dukhan5739f702019-12-22 19:45:09 -0800[diff] [blame]322 "src/math/sigmoid-scalar-lut2048-p1-div.c",
323 "src/math/sigmoid-scalar-lut64-p2-div.c",
324 "src/math/sigmoid-scalar-p5-div.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]325 "src/q8-avgpool/9p8x-minmax-scalar-c1.c",
326 "src/q8-avgpool/9x-minmax-scalar-c1.c",
Marat Dukhande06f492020-04-09 00:19:31 -0700[diff] [blame]327 "src/q8-dwconv/up1x9-minmax-scalar.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]328 "src/q8-gavgpool/7p7x-minmax-scalar-c1.c",
329 "src/q8-gavgpool/7x-minmax-scalar-c1.c",
Marat Dukhande06f492020-04-09 00:19:31 -0700[diff] [blame]330 "src/q8-gemm/2x2-minmax-scalar.c",
331 "src/q8-igemm/2x2-minmax-scalar.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]332 "src/q8-vadd/minmax-scalar.c",
Marat Dukhan5c5fa962020-03-10 18:38:33 -0700[diff] [blame]333 "src/u8-clamp/scalar-x4.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]334 "src/u8-lut32norm/scalar.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]335 "src/u8-maxpool/9p8x-minmax-scalar-c1.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]336 "src/u8-rmax/scalar.c",
Marat Dukhan3bb3bfc2020-05-19 17:42:46 -0700[diff] [blame]337 "src/x32-fill/scalar-float.c",
338 "src/x32-fill/scalar-int.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]339 "src/x32-packx/x2-scalar.c",
340 "src/x32-packx/x3-scalar.c",
341 "src/x32-packx/x4-scalar.c",
Marat Dukhan63523d42020-05-22 17:07:33 -0700[diff] [blame]342 "src/x32-pad/scalar-int.c",
343 "src/x32-pad/scalar-float.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]344 "src/x32-unpool/scalar.c",
345 "src/x32-zip/x2-scalar.c",
346 "src/x32-zip/x3-scalar.c",
347 "src/x32-zip/x4-scalar.c",
348 "src/x32-zip/xm-scalar.c",
349 "src/x8-lut/scalar.c",
350 "src/x8-zip/x2-scalar.c",
351 "src/x8-zip/x3-scalar.c",
352 "src/x8-zip/x4-scalar.c",
353 "src/x8-zip/xm-scalar.c",
Marat Dukhanfe7acb62020-03-09 19:30:05 -0700[diff] [blame]354 "src/requantization/precise-scalar.c",
355 "src/requantization/fp32-scalar.c",
356 "src/requantization/q31-scalar.c",
357 "src/requantization/gemmlowp-scalar.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]358]
359
Marat Dukhan436ebe62019-12-04 15:10:12 -0800[diff] [blame]360WASM_UKERNELS = [
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]361 "src/f32-avgpool/9p8x-minmax-wasm-c1.c",
362 "src/f32-avgpool/9x-minmax-wasm-c1.c",
Marat Dukhan5c5fa962020-03-10 18:38:33 -0700[diff] [blame]363 "src/f32-clamp/gen/wasm-x1.c",
364 "src/f32-clamp/gen/wasm-x2.c",
365 "src/f32-clamp/gen/wasm-x4.c",
Marat Dukhan163a7e62020-04-09 04:19:26 -0700[diff] [blame]366 "src/f32-dwconv/gen/up1x4-wasm-acc2.c",
367 "src/f32-dwconv/gen/up1x4-wasm.c",
368 "src/f32-dwconv/gen/up1x9-wasm-acc2.c",
369 "src/f32-dwconv/gen/up1x9-wasm.c",
370 "src/f32-dwconv/gen/up1x25-wasm-acc2.c",
371 "src/f32-dwconv/gen/up1x25-wasm.c",
372 "src/f32-dwconv/gen/up2x4-wasm-acc2.c",
373 "src/f32-dwconv/gen/up2x4-wasm.c",
374 "src/f32-dwconv/gen/up2x9-wasm-acc2.c",
375 "src/f32-dwconv/gen/up2x9-wasm.c",
376 "src/f32-dwconv/gen/up2x25-wasm-acc2.c",
377 "src/f32-dwconv/gen/up2x25-wasm.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]378 "src/f32-dwconv/gen/up1x4-minmax-wasm-acc2.c",
379 "src/f32-dwconv/gen/up1x4-minmax-wasm.c",
380 "src/f32-dwconv/gen/up1x9-minmax-wasm-acc2.c",
381 "src/f32-dwconv/gen/up1x9-minmax-wasm.c",
Marat Dukhan163a7e62020-04-09 04:19:26 -0700[diff] [blame]382 "src/f32-dwconv/gen/up1x25-minmax-wasm-acc2.c",
383 "src/f32-dwconv/gen/up1x25-minmax-wasm.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]384 "src/f32-dwconv/gen/up2x4-minmax-wasm-acc2.c",
385 "src/f32-dwconv/gen/up2x4-minmax-wasm.c",
386 "src/f32-dwconv/gen/up2x9-minmax-wasm-acc2.c",
387 "src/f32-dwconv/gen/up2x9-minmax-wasm.c",
Marat Dukhan163a7e62020-04-09 04:19:26 -0700[diff] [blame]388 "src/f32-dwconv/gen/up2x25-minmax-wasm-acc2.c",
389 "src/f32-dwconv/gen/up2x25-minmax-wasm.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]390 "src/f32-gavgpool/7p7x-minmax-wasm-c1.c",
391 "src/f32-gavgpool/7x-minmax-wasm-c1.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]392 "src/f32-gemm/gen-inc/1x4inc-minmax-wasm.c",
393 "src/f32-gemm/gen-inc/2x4inc-minmax-wasm.c",
394 "src/f32-gemm/gen-inc/4x4inc-minmax-wasm.c",
Marat Dukhan163a7e62020-04-09 04:19:26 -0700[diff] [blame]395 "src/f32-gemm/gen/1x4-wasm.c",
396 "src/f32-gemm/gen/2x4-wasm.c",
397 "src/f32-gemm/gen/4x2-wasm.c",
398 "src/f32-gemm/gen/4x4-wasm.c",
Marat Dukhan467f6362020-05-22 23:21:55 -0700[diff] [blame]399 "src/f32-gemm/gen/1x4-relu-wasm.c",
400 "src/f32-gemm/gen/2x4-relu-wasm.c",
401 "src/f32-gemm/gen/4x2-relu-wasm.c",
402 "src/f32-gemm/gen/4x4-relu-wasm.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]403 "src/f32-gemm/gen/1x4-minmax-wasm.c",
404 "src/f32-gemm/gen/2x4-minmax-wasm.c",
405 "src/f32-gemm/gen/4x2-minmax-wasm.c",
406 "src/f32-gemm/gen/4x4-minmax-wasm.c",
Marat Dukhan662faa02019-12-09 22:48:16 -0800[diff] [blame]407 "src/f32-hswish/gen/wasm-x1.c",
408 "src/f32-hswish/gen/wasm-x2.c",
409 "src/f32-hswish/gen/wasm-x4.c",
Marat Dukhan163a7e62020-04-09 04:19:26 -0700[diff] [blame]410 "src/f32-igemm/gen/1x4-wasm.c",
411 "src/f32-igemm/gen/2x4-wasm.c",
412 "src/f32-igemm/gen/4x2-wasm.c",
413 "src/f32-igemm/gen/4x4-wasm.c",
Marat Dukhan467f6362020-05-22 23:21:55 -0700[diff] [blame]414 "src/f32-igemm/gen/1x4-relu-wasm.c",
415 "src/f32-igemm/gen/2x4-relu-wasm.c",
416 "src/f32-igemm/gen/4x2-relu-wasm.c",
417 "src/f32-igemm/gen/4x4-relu-wasm.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]418 "src/f32-igemm/gen/1x4-minmax-wasm.c",
419 "src/f32-igemm/gen/2x4-minmax-wasm.c",
420 "src/f32-igemm/gen/4x2-minmax-wasm.c",
421 "src/f32-igemm/gen/4x4-minmax-wasm.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]422 "src/f32-maxpool/9p8x-minmax-wasm-c1.c",
423 "src/f32-pavgpool/9p8x-minmax-wasm-c1.c",
424 "src/f32-pavgpool/9x-minmax-wasm-c1.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]425 "src/f32-vbinary/gen/vadd-minmax-wasm-x1.c",
426 "src/f32-vbinary/gen/vadd-minmax-wasm-x2.c",
427 "src/f32-vbinary/gen/vadd-minmax-wasm-x4.c",
428 "src/f32-vbinary/gen/vaddc-minmax-wasm-x1.c",
429 "src/f32-vbinary/gen/vaddc-minmax-wasm-x2.c",
430 "src/f32-vbinary/gen/vaddc-minmax-wasm-x4.c",
431 "src/f32-vbinary/gen/vdiv-minmax-wasm-x1.c",
432 "src/f32-vbinary/gen/vdiv-minmax-wasm-x2.c",
433 "src/f32-vbinary/gen/vdiv-minmax-wasm-x4.c",
434 "src/f32-vbinary/gen/vdivc-minmax-wasm-x1.c",
435 "src/f32-vbinary/gen/vdivc-minmax-wasm-x2.c",
436 "src/f32-vbinary/gen/vdivc-minmax-wasm-x4.c",
Marat Dukhan403b7d42019-12-05 12:49:11 -0800[diff] [blame]437 "src/f32-vbinary/gen/vmax-wasm-x1.c",
438 "src/f32-vbinary/gen/vmax-wasm-x2.c",
439 "src/f32-vbinary/gen/vmax-wasm-x4.c",
440 "src/f32-vbinary/gen/vmaxc-wasm-x1.c",
441 "src/f32-vbinary/gen/vmaxc-wasm-x2.c",
442 "src/f32-vbinary/gen/vmaxc-wasm-x4.c",
443 "src/f32-vbinary/gen/vmin-wasm-x1.c",
444 "src/f32-vbinary/gen/vmin-wasm-x2.c",
445 "src/f32-vbinary/gen/vmin-wasm-x4.c",
446 "src/f32-vbinary/gen/vminc-wasm-x1.c",
447 "src/f32-vbinary/gen/vminc-wasm-x2.c",
448 "src/f32-vbinary/gen/vminc-wasm-x4.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]449 "src/f32-vbinary/gen/vmul-minmax-wasm-x1.c",
450 "src/f32-vbinary/gen/vmul-minmax-wasm-x2.c",
451 "src/f32-vbinary/gen/vmul-minmax-wasm-x4.c",
452 "src/f32-vbinary/gen/vmulc-minmax-wasm-x1.c",
453 "src/f32-vbinary/gen/vmulc-minmax-wasm-x2.c",
454 "src/f32-vbinary/gen/vmulc-minmax-wasm-x4.c",
455 "src/f32-vbinary/gen/vrdivc-minmax-wasm-x1.c",
456 "src/f32-vbinary/gen/vrdivc-minmax-wasm-x2.c",
457 "src/f32-vbinary/gen/vrdivc-minmax-wasm-x4.c",
458 "src/f32-vbinary/gen/vrsubc-minmax-wasm-x1.c",
459 "src/f32-vbinary/gen/vrsubc-minmax-wasm-x2.c",
460 "src/f32-vbinary/gen/vrsubc-minmax-wasm-x4.c",
461 "src/f32-vbinary/gen/vsub-minmax-wasm-x1.c",
462 "src/f32-vbinary/gen/vsub-minmax-wasm-x2.c",
463 "src/f32-vbinary/gen/vsub-minmax-wasm-x4.c",
464 "src/f32-vbinary/gen/vsubc-minmax-wasm-x1.c",
465 "src/f32-vbinary/gen/vsubc-minmax-wasm-x2.c",
466 "src/f32-vbinary/gen/vsubc-minmax-wasm-x4.c",
Marat Dukhan8cc7efe2020-06-10 16:24:27 -0700[diff] [blame]467 "src/f32-vlrelu/gen/wasm-x1.c",
468 "src/f32-vlrelu/gen/wasm-x2.c",
469 "src/f32-vlrelu/gen/wasm-x4.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]470 "src/f32-vmulcaddc/gen/c1-minmax-wasm-2x.c",
471 "src/f32-vmulcaddc/gen/c2-minmax-wasm-2x.c",
472 "src/f32-vmulcaddc/gen/c4-minmax-wasm-2x.c",
Marat Dukhan436ebe62019-12-04 15:10:12 -0800[diff] [blame]473]
474
Marat Dukhan290055c2020-06-09 12:24:29 -0700[diff] [blame]475WASMSIMD_UKERNELS = [
Marat Dukhanb8e7b072020-06-16 12:34:23 -0700[diff] [blame]476 "src/f32-dwconv/gen/up4x25-wasmsimd.c",
477 "src/f32-dwconv/gen/up4x4-wasmsimd.c",
478 "src/f32-dwconv/gen/up4x9-wasmsimd.c",
479 "src/f32-dwconv/gen/up8x25-wasmsimd.c",
480 "src/f32-dwconv/gen/up8x4-wasmsimd.c",
481 "src/f32-dwconv/gen/up8x9-wasmsimd.c",
Marat Dukhanac014d72020-06-16 08:36:47 -0700[diff] [blame]482 "src/f32-dwconv/gen/up4x25-minmax-wasmsimd-acc2-arm.c",
483 "src/f32-dwconv/gen/up4x25-minmax-wasmsimd-arm.c",
484 "src/f32-dwconv/gen/up4x4-minmax-wasmsimd-acc2-arm.c",
485 "src/f32-dwconv/gen/up4x4-minmax-wasmsimd-arm.c",
486 "src/f32-dwconv/gen/up4x9-minmax-wasmsimd-acc2-arm.c",
487 "src/f32-dwconv/gen/up4x9-minmax-wasmsimd-arm.c",
488 "src/f32-dwconv/gen/up8x25-minmax-wasmsimd-acc2-arm.c",
489 "src/f32-dwconv/gen/up8x25-minmax-wasmsimd-arm.c",
490 "src/f32-dwconv/gen/up8x4-minmax-wasmsimd-acc2-arm.c",
491 "src/f32-dwconv/gen/up8x4-minmax-wasmsimd-arm.c",
492 "src/f32-dwconv/gen/up8x9-minmax-wasmsimd-acc2-arm.c",
493 "src/f32-dwconv/gen/up8x9-minmax-wasmsimd-arm.c",
494 "src/f32-dwconv/gen/up4x25-minmax-wasmsimd-acc2-x86.c",
495 "src/f32-dwconv/gen/up4x25-minmax-wasmsimd-x86.c",
496 "src/f32-dwconv/gen/up4x4-minmax-wasmsimd-acc2-x86.c",
497 "src/f32-dwconv/gen/up4x4-minmax-wasmsimd-x86.c",
498 "src/f32-dwconv/gen/up4x9-minmax-wasmsimd-acc2-x86.c",
499 "src/f32-dwconv/gen/up4x9-minmax-wasmsimd-x86.c",
500 "src/f32-dwconv/gen/up8x25-minmax-wasmsimd-acc2-x86.c",
501 "src/f32-dwconv/gen/up8x25-minmax-wasmsimd-x86.c",
502 "src/f32-dwconv/gen/up8x4-minmax-wasmsimd-acc2-x86.c",
503 "src/f32-dwconv/gen/up8x4-minmax-wasmsimd-x86.c",
504 "src/f32-dwconv/gen/up8x9-minmax-wasmsimd-acc2-x86.c",
505 "src/f32-dwconv/gen/up8x9-minmax-wasmsimd-x86.c",
Marat Dukhan802808c2020-06-16 11:01:17 -0700[diff] [blame]506 "src/f32-gemm/gen/1x8-wasmsimd-splat.c",
507 "src/f32-gemm/gen/4x8-wasmsimd-splat.c",
508 "src/f32-gemm/gen/5x8-wasmsimd-splat.c",
509 "src/f32-gemm/gen/1x8-relu-wasmsimd-splat-arm.c",
510 "src/f32-gemm/gen/5x8-relu-wasmsimd-splat-arm.c",
511 "src/f32-gemm/gen/1x8-relu-wasmsimd-splat-x86.c",
512 "src/f32-gemm/gen/4x8-relu-wasmsimd-splat-x86.c",
Marat Dukhan1bbf96b2020-06-15 23:01:20 -0700[diff] [blame]513 "src/f32-gemm/gen/1x8-minmax-wasmsimd-loadsplat-arm.c",
514 "src/f32-gemm/gen/1x8-minmax-wasmsimd-splat-arm.c",
515 "src/f32-gemm/gen/1x8s4-minmax-wasmsimd-arm.c",
516 "src/f32-gemm/gen/3x8-minmax-wasmsimd-loadsplat-arm.c",
517 "src/f32-gemm/gen/3x8-minmax-wasmsimd-splat-arm.c",
518 "src/f32-gemm/gen/3x8s4-minmax-wasmsimd-arm.c",
519 "src/f32-gemm/gen/4x8-minmax-wasmsimd-loadsplat-arm.c",
520 "src/f32-gemm/gen/4x8-minmax-wasmsimd-splat-arm.c",
521 "src/f32-gemm/gen/4x8s4-minmax-wasmsimd-arm.c",
522 "src/f32-gemm/gen/5x8-minmax-wasmsimd-loadsplat-arm.c",
523 "src/f32-gemm/gen/5x8-minmax-wasmsimd-splat-arm.c",
524 "src/f32-gemm/gen/5x8s4-minmax-wasmsimd-arm.c",
525 "src/f32-gemm/gen/6x8-minmax-wasmsimd-loadsplat-arm.c",
526 "src/f32-gemm/gen/6x8-minmax-wasmsimd-splat-arm.c",
527 "src/f32-gemm/gen/6x8s4-minmax-wasmsimd-arm.c",
528 "src/f32-gemm/gen/1x8-minmax-wasmsimd-loadsplat-x86.c",
529 "src/f32-gemm/gen/1x8-minmax-wasmsimd-splat-x86.c",
530 "src/f32-gemm/gen/1x8s4-minmax-wasmsimd-x86.c",
531 "src/f32-gemm/gen/3x8-minmax-wasmsimd-loadsplat-x86.c",
532 "src/f32-gemm/gen/3x8-minmax-wasmsimd-splat-x86.c",
533 "src/f32-gemm/gen/3x8s4-minmax-wasmsimd-x86.c",
534 "src/f32-gemm/gen/4x8-minmax-wasmsimd-loadsplat-x86.c",
535 "src/f32-gemm/gen/4x8-minmax-wasmsimd-splat-x86.c",
536 "src/f32-gemm/gen/4x8s4-minmax-wasmsimd-x86.c",
537 "src/f32-gemm/gen/5x8-minmax-wasmsimd-loadsplat-x86.c",
538 "src/f32-gemm/gen/5x8-minmax-wasmsimd-splat-x86.c",
539 "src/f32-gemm/gen/5x8s4-minmax-wasmsimd-x86.c",
540 "src/f32-gemm/gen/6x8-minmax-wasmsimd-loadsplat-x86.c",
541 "src/f32-gemm/gen/6x8-minmax-wasmsimd-splat-x86.c",
542 "src/f32-gemm/gen/6x8s4-minmax-wasmsimd-x86.c",
543 "src/f32-gemm/gen-inc/1x8inc-minmax-wasmsimd-loadsplat-arm.c",
544 "src/f32-gemm/gen-inc/1x8inc-minmax-wasmsimd-splat-arm.c",
545 "src/f32-gemm/gen-inc/1x8s4inc-minmax-wasmsimd-arm.c",
546 "src/f32-gemm/gen-inc/3x8inc-minmax-wasmsimd-loadsplat-arm.c",
547 "src/f32-gemm/gen-inc/3x8inc-minmax-wasmsimd-splat-arm.c",
548 "src/f32-gemm/gen-inc/3x8s4inc-minmax-wasmsimd-arm.c",
549 "src/f32-gemm/gen-inc/4x8inc-minmax-wasmsimd-loadsplat-arm.c",
550 "src/f32-gemm/gen-inc/4x8inc-minmax-wasmsimd-splat-arm.c",
551 "src/f32-gemm/gen-inc/4x8s4inc-minmax-wasmsimd-arm.c",
552 "src/f32-gemm/gen-inc/5x8inc-minmax-wasmsimd-loadsplat-arm.c",
553 "src/f32-gemm/gen-inc/5x8inc-minmax-wasmsimd-splat-arm.c",
554 "src/f32-gemm/gen-inc/5x8s4inc-minmax-wasmsimd-arm.c",
555 "src/f32-gemm/gen-inc/6x8inc-minmax-wasmsimd-loadsplat-arm.c",
556 "src/f32-gemm/gen-inc/6x8inc-minmax-wasmsimd-splat-arm.c",
557 "src/f32-gemm/gen-inc/6x8s4inc-minmax-wasmsimd-arm.c",
558 "src/f32-gemm/gen-inc/1x8inc-minmax-wasmsimd-loadsplat-x86.c",
559 "src/f32-gemm/gen-inc/1x8inc-minmax-wasmsimd-splat-x86.c",
560 "src/f32-gemm/gen-inc/1x8s4inc-minmax-wasmsimd-x86.c",
561 "src/f32-gemm/gen-inc/3x8inc-minmax-wasmsimd-loadsplat-x86.c",
562 "src/f32-gemm/gen-inc/3x8inc-minmax-wasmsimd-splat-x86.c",
563 "src/f32-gemm/gen-inc/3x8s4inc-minmax-wasmsimd-x86.c",
564 "src/f32-gemm/gen-inc/4x8inc-minmax-wasmsimd-loadsplat-x86.c",
565 "src/f32-gemm/gen-inc/4x8inc-minmax-wasmsimd-splat-x86.c",
566 "src/f32-gemm/gen-inc/4x8s4inc-minmax-wasmsimd-x86.c",
567 "src/f32-gemm/gen-inc/5x8inc-minmax-wasmsimd-loadsplat-x86.c",
568 "src/f32-gemm/gen-inc/5x8inc-minmax-wasmsimd-splat-x86.c",
569 "src/f32-gemm/gen-inc/5x8s4inc-minmax-wasmsimd-x86.c",
570 "src/f32-gemm/gen-inc/6x8inc-minmax-wasmsimd-loadsplat-x86.c",
571 "src/f32-gemm/gen-inc/6x8inc-minmax-wasmsimd-splat-x86.c",
572 "src/f32-gemm/gen-inc/6x8s4inc-minmax-wasmsimd-x86.c",
Marat Dukhan802808c2020-06-16 11:01:17 -0700[diff] [blame]573 "src/f32-igemm/gen/1x8-wasmsimd-splat.c",
574 "src/f32-igemm/gen/4x8-wasmsimd-splat.c",
575 "src/f32-igemm/gen/5x8-wasmsimd-splat.c",
576 "src/f32-igemm/gen/1x8-relu-wasmsimd-splat-arm.c",
577 "src/f32-igemm/gen/5x8-relu-wasmsimd-splat-arm.c",
578 "src/f32-igemm/gen/1x8-relu-wasmsimd-splat-x86.c",
579 "src/f32-igemm/gen/4x8-relu-wasmsimd-splat-x86.c",
Marat Dukhan1bbf96b2020-06-15 23:01:20 -0700[diff] [blame]580 "src/f32-igemm/gen/1x8-minmax-wasmsimd-loadsplat-arm.c",
581 "src/f32-igemm/gen/1x8-minmax-wasmsimd-splat-arm.c",
582 "src/f32-igemm/gen/1x8s4-minmax-wasmsimd-arm.c",
583 "src/f32-igemm/gen/3x8-minmax-wasmsimd-loadsplat-arm.c",
584 "src/f32-igemm/gen/3x8-minmax-wasmsimd-splat-arm.c",
585 "src/f32-igemm/gen/3x8s4-minmax-wasmsimd-arm.c",
586 "src/f32-igemm/gen/4x8-minmax-wasmsimd-loadsplat-arm.c",
587 "src/f32-igemm/gen/4x8-minmax-wasmsimd-splat-arm.c",
588 "src/f32-igemm/gen/4x8s4-minmax-wasmsimd-arm.c",
589 "src/f32-igemm/gen/5x8-minmax-wasmsimd-loadsplat-arm.c",
590 "src/f32-igemm/gen/5x8-minmax-wasmsimd-splat-arm.c",
591 "src/f32-igemm/gen/5x8s4-minmax-wasmsimd-arm.c",
592 "src/f32-igemm/gen/6x8-minmax-wasmsimd-loadsplat-arm.c",
593 "src/f32-igemm/gen/6x8-minmax-wasmsimd-splat-arm.c",
594 "src/f32-igemm/gen/6x8s4-minmax-wasmsimd-arm.c",
595 "src/f32-igemm/gen/1x8-minmax-wasmsimd-loadsplat-x86.c",
596 "src/f32-igemm/gen/1x8-minmax-wasmsimd-splat-x86.c",
597 "src/f32-igemm/gen/1x8s4-minmax-wasmsimd-x86.c",
598 "src/f32-igemm/gen/3x8-minmax-wasmsimd-loadsplat-x86.c",
599 "src/f32-igemm/gen/3x8-minmax-wasmsimd-splat-x86.c",
600 "src/f32-igemm/gen/3x8s4-minmax-wasmsimd-x86.c",
601 "src/f32-igemm/gen/4x8-minmax-wasmsimd-loadsplat-x86.c",
602 "src/f32-igemm/gen/4x8-minmax-wasmsimd-splat-x86.c",
603 "src/f32-igemm/gen/4x8s4-minmax-wasmsimd-x86.c",
604 "src/f32-igemm/gen/5x8-minmax-wasmsimd-loadsplat-x86.c",
605 "src/f32-igemm/gen/5x8-minmax-wasmsimd-splat-x86.c",
606 "src/f32-igemm/gen/5x8s4-minmax-wasmsimd-x86.c",
607 "src/f32-igemm/gen/6x8-minmax-wasmsimd-loadsplat-x86.c",
608 "src/f32-igemm/gen/6x8-minmax-wasmsimd-splat-x86.c",
609 "src/f32-igemm/gen/6x8s4-minmax-wasmsimd-x86.c",
Marat Dukhand3f3d872020-06-24 13:08:25 -0700[diff] [blame]610 "src/math/roundne-wasmsimd-addsub.c",
611 "src/math/roundd-wasmsimd-addsub.c",
612 "src/math/roundu-wasmsimd-addsub.c",
613 "src/math/roundz-wasmsimd-addsub.c",
Marat Dukhan290055c2020-06-09 12:24:29 -0700[diff] [blame]614 "src/requantization/fp32-wasmsimd.c",
615]
616
Marat Dukhan8d3c07e2020-01-02 01:20:59 -0800[diff] [blame]617PSIMD_FASTMATH_UKERNELS = [
Marat Dukhan329da642019-11-19 21:44:39 -0800[diff] [blame]618 "src/f32-argmaxpool/4x-psimd-c4.c",
Marat Dukhan1e782c42019-11-21 17:02:40 -0800[diff] [blame]619 "src/f32-argmaxpool/9p8x-psimd-c4.c",
Marat Dukhan329da642019-11-19 21:44:39 -0800[diff] [blame]620 "src/f32-argmaxpool/9x-psimd-c4.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]621 "src/f32-avgpool/9p8x-minmax-psimd-c4.c",
622 "src/f32-avgpool/9x-minmax-psimd-c4.c",
Marat Dukhan5c5fa962020-03-10 18:38:33 -0700[diff] [blame]623 "src/f32-clamp/gen/psimd-x4.c",
624 "src/f32-clamp/gen/psimd-x8.c",
Erich Elsen0a1970e2020-06-10 09:24:59 -0700[diff] [blame]625 "src/f32-conv-hwc2chw/3x3s2p1c3x4-psimd-2x2.c",
Erich Elsene6214af2020-06-10 22:17:22 -0700[diff] [blame]626 "src/f32-dwconv-chw/3x3p1-psimd.c",
Erich Elsenfd7a6e32020-06-11 12:04:44 -0700[diff] [blame]627 "src/f32-dwconv-chw/3x3s2p1-psimd.c",
Erich Elsen28928892020-06-12 08:08:19 -0700[diff] [blame]628 "src/f32-dwconv-chw/5x5p2-psimd.c",
Erich Elsen7465a892020-06-13 14:02:04 -0700[diff] [blame]629 "src/f32-dwconv-chw/5x5s2p2-psimd.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]630 "src/f32-dwconv/gen/up4x25-minmax-psimd-acc2.c",
631 "src/f32-dwconv/gen/up4x25-minmax-psimd.c",
632 "src/f32-dwconv/gen/up4x4-minmax-psimd-acc2.c",
633 "src/f32-dwconv/gen/up4x4-minmax-psimd.c",
634 "src/f32-dwconv/gen/up4x9-minmax-psimd-acc2.c",
635 "src/f32-dwconv/gen/up4x9-minmax-psimd.c",
636 "src/f32-dwconv/gen/up8x25-minmax-psimd-acc2.c",
637 "src/f32-dwconv/gen/up8x25-minmax-psimd.c",
638 "src/f32-dwconv/gen/up8x4-minmax-psimd-acc2.c",
639 "src/f32-dwconv/gen/up8x4-minmax-psimd.c",
640 "src/f32-dwconv/gen/up8x9-minmax-psimd-acc2.c",
641 "src/f32-dwconv/gen/up8x9-minmax-psimd.c",
Erich Elsen6f278b52020-06-10 16:13:11 -0700[diff] [blame]642 "src/f32-gavgpool-cw/psimd-x4.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]643 "src/f32-gavgpool/7p7x-minmax-psimd-c4.c",
644 "src/f32-gavgpool/7x-minmax-psimd-c4.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]645 "src/f32-gemm/gen/1x8-minmax-psimd-loadsplat.c",
646 "src/f32-gemm/gen/1x8-minmax-psimd-splat.c",
647 "src/f32-gemm/gen/1x8s4-minmax-psimd.c",
648 "src/f32-gemm/gen/4x2c4-minmax-psimd.c",
649 "src/f32-gemm/gen/4x8-minmax-psimd-loadsplat.c",
650 "src/f32-gemm/gen/4x8-minmax-psimd-splat.c",
651 "src/f32-gemm/gen/4x8s4-minmax-psimd.c",
652 "src/f32-gemm/gen/6x8-minmax-psimd-loadsplat.c",
653 "src/f32-gemm/gen/6x8-minmax-psimd-splat.c",
654 "src/f32-gemm/gen/6x8s4-minmax-psimd.c",
655 "src/f32-gemm/gen-inc/1x8inc-minmax-psimd-loadsplat.c",
656 "src/f32-gemm/gen-inc/1x8inc-minmax-psimd-splat.c",
657 "src/f32-gemm/gen-inc/1x8s4inc-minmax-psimd.c",
658 "src/f32-gemm/gen-inc/4x8inc-minmax-psimd-loadsplat.c",
659 "src/f32-gemm/gen-inc/4x8inc-minmax-psimd-splat.c",
660 "src/f32-gemm/gen-inc/4x8s4inc-minmax-psimd.c",
661 "src/f32-gemm/gen-inc/6x8inc-minmax-psimd-loadsplat.c",
662 "src/f32-gemm/gen-inc/6x8inc-minmax-psimd-splat.c",
663 "src/f32-gemm/gen-inc/6x8s4inc-minmax-psimd.c",
Marat Dukhan662faa02019-12-09 22:48:16 -0800[diff] [blame]664 "src/f32-hswish/gen/psimd-x4.c",
665 "src/f32-hswish/gen/psimd-x8.c",
Marat Dukhan660fd192020-03-10 04:55:30 -0700[diff] [blame]666 "src/f32-ibilinear/gen/psimd-c4.c",
667 "src/f32-ibilinear/gen/psimd-c8.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]668 "src/f32-igemm/gen/1x8-minmax-psimd-loadsplat.c",
669 "src/f32-igemm/gen/1x8-minmax-psimd-splat.c",
670 "src/f32-igemm/gen/1x8s4-minmax-psimd.c",
671 "src/f32-igemm/gen/4x2c4-minmax-psimd.c",
672 "src/f32-igemm/gen/4x8-minmax-psimd-loadsplat.c",
673 "src/f32-igemm/gen/4x8-minmax-psimd-splat.c",
674 "src/f32-igemm/gen/4x8s4-minmax-psimd.c",
675 "src/f32-igemm/gen/6x8-minmax-psimd-loadsplat.c",
676 "src/f32-igemm/gen/6x8-minmax-psimd-splat.c",
677 "src/f32-igemm/gen/6x8s4-minmax-psimd.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]678 "src/f32-maxpool/9p8x-minmax-psimd-c4.c",
Erich Elsen6e80fdc2020-06-09 15:35:37 -0700[diff] [blame]679 "src/f32-spmm/gen/4x1-minmax-psimd.c",
680 "src/f32-spmm/gen/8x1-minmax-psimd.c",
681 "src/f32-spmm/gen/16x1-minmax-psimd.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]682 "src/f32-pavgpool/9p8x-minmax-psimd-c4.c",
683 "src/f32-pavgpool/9x-minmax-psimd-c4.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]684 "src/f32-ppmm/gen/4x8-minmax-psimd.c",
Marat Dukhan40a672f2019-11-25 03:08:22 -0800[diff] [blame]685 "src/f32-prelu/gen/psimd-2x4.c",
686 "src/f32-prelu/gen/psimd-2x8.c",
Marat Dukhanb39689d2020-01-24 13:32:20 -0800[diff] [blame]687 "src/f32-rmax/psimd.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]688 "src/f32-vbinary/gen/vadd-minmax-psimd-x4.c",
689 "src/f32-vbinary/gen/vadd-minmax-psimd-x8.c",
690 "src/f32-vbinary/gen/vaddc-minmax-psimd-x4.c",
691 "src/f32-vbinary/gen/vaddc-minmax-psimd-x8.c",
692 "src/f32-vbinary/gen/vdiv-minmax-psimd-x4.c",
693 "src/f32-vbinary/gen/vdiv-minmax-psimd-x8.c",
694 "src/f32-vbinary/gen/vdivc-minmax-psimd-x4.c",
695 "src/f32-vbinary/gen/vdivc-minmax-psimd-x8.c",
Marat Dukhan403b7d42019-12-05 12:49:11 -0800[diff] [blame]696 "src/f32-vbinary/gen/vmax-psimd-x4.c",
697 "src/f32-vbinary/gen/vmax-psimd-x8.c",
698 "src/f32-vbinary/gen/vmaxc-psimd-x4.c",
699 "src/f32-vbinary/gen/vmaxc-psimd-x8.c",
700 "src/f32-vbinary/gen/vmin-psimd-x4.c",
701 "src/f32-vbinary/gen/vmin-psimd-x8.c",
702 "src/f32-vbinary/gen/vminc-psimd-x4.c",
703 "src/f32-vbinary/gen/vminc-psimd-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]704 "src/f32-vbinary/gen/vmul-minmax-psimd-x4.c",
705 "src/f32-vbinary/gen/vmul-minmax-psimd-x8.c",
706 "src/f32-vbinary/gen/vmulc-minmax-psimd-x4.c",
707 "src/f32-vbinary/gen/vmulc-minmax-psimd-x8.c",
708 "src/f32-vbinary/gen/vrdivc-minmax-psimd-x4.c",
709 "src/f32-vbinary/gen/vrdivc-minmax-psimd-x8.c",
Marat Dukhan13bafb02020-06-05 00:43:11 -0700[diff] [blame]710 "src/f32-vbinary/gen/vrsqrdiffc-psimd-x4.c",
711 "src/f32-vbinary/gen/vrsqrdiffc-psimd-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]712 "src/f32-vbinary/gen/vrsubc-minmax-psimd-x4.c",
713 "src/f32-vbinary/gen/vrsubc-minmax-psimd-x8.c",
Marat Dukhan13bafb02020-06-05 00:43:11 -0700[diff] [blame]714 "src/f32-vbinary/gen/vsqrdiff-psimd-x4.c",
715 "src/f32-vbinary/gen/vsqrdiff-psimd-x8.c",
716 "src/f32-vbinary/gen/vsqrdiffc-psimd-x4.c",
717 "src/f32-vbinary/gen/vsqrdiffc-psimd-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]718 "src/f32-vbinary/gen/vsub-minmax-psimd-x4.c",
719 "src/f32-vbinary/gen/vsub-minmax-psimd-x8.c",
720 "src/f32-vbinary/gen/vsubc-minmax-psimd-x4.c",
721 "src/f32-vbinary/gen/vsubc-minmax-psimd-x8.c",
Marat Dukhan8cc7efe2020-06-10 16:24:27 -0700[diff] [blame]722 "src/f32-vlrelu/gen/psimd-x4.c",
723 "src/f32-vlrelu/gen/psimd-x8.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]724 "src/f32-vmulcaddc/gen/c4-minmax-psimd-2x.c",
725 "src/f32-vmulcaddc/gen/c8-minmax-psimd-2x.c",
Marat Dukhan5020b962020-06-08 13:30:10 -0700[diff] [blame]726 "src/f32-vunary/gen/vabs-psimd-x4.c",
727 "src/f32-vunary/gen/vabs-psimd-x8.c",
728 "src/f32-vunary/gen/vneg-psimd-x4.c",
729 "src/f32-vunary/gen/vneg-psimd-x8.c",
730 "src/f32-vunary/gen/vsqr-psimd-x4.c",
731 "src/f32-vunary/gen/vsqr-psimd-x8.c",
Marat Dukhan3bb3bfc2020-05-19 17:42:46 -0700[diff] [blame]732 "src/x32-fill/psimd.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]733 "src/x32-packx/x4-psimd.c",
Marat Dukhan63523d42020-05-22 17:07:33 -0700[diff] [blame]734 "src/x32-pad/psimd.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]735 "src/x32-unpool/psimd.c",
736 "src/x32-zip/x2-psimd.c",
737 "src/x32-zip/x3-psimd.c",
738 "src/x32-zip/x4-psimd.c",
739 "src/x32-zip/xm-psimd.c",
Marat Dukhanfe7acb62020-03-09 19:30:05 -0700[diff] [blame]740 "src/requantization/precise-psimd.c",
741 "src/requantization/fp32-psimd.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]742]
743
Marat Dukhan8d3c07e2020-01-02 01:20:59 -0800[diff] [blame]744PSIMD_ACCMATH_UKERNELS = [
Marat Dukhanb39689d2020-01-24 13:32:20 -0800[diff] [blame]745 "src/f32-raddstoreexpminusmax/gen/psimd-p5-x4.c",
746 "src/f32-raddstoreexpminusmax/gen/psimd-p5-x8.c",
747 "src/f32-raddstoreexpminusmax/gen/psimd-p5-x8-acc2.c",
748 "src/f32-raddstoreexpminusmax/gen/psimd-p5-x12.c",
749 "src/f32-raddstoreexpminusmax/gen/psimd-p5-x12-acc2.c",
750 "src/f32-raddstoreexpminusmax/gen/psimd-p5-x12-acc3.c",
751 "src/f32-raddstoreexpminusmax/gen/psimd-p5-x16.c",
752 "src/f32-raddstoreexpminusmax/gen/psimd-p5-x16-acc2.c",
753 "src/f32-raddstoreexpminusmax/gen/psimd-p5-x16-acc4.c",
754 "src/f32-raddstoreexpminusmax/gen/psimd-p5-x20.c",
755 "src/f32-raddstoreexpminusmax/gen/psimd-p5-x20-acc2.c",
756 "src/f32-raddstoreexpminusmax/gen/psimd-p5-x20-acc5.c",
Marat Dukhan8d3c07e2020-01-02 01:20:59 -0800[diff] [blame]757 "src/f32-sigmoid/gen/psimd-p5-div-x4.c",
758 "src/f32-sigmoid/gen/psimd-p5-div-x8.c",
759 "src/f32-sigmoid/gen/psimd-p5-div-x12.c",
760 "src/f32-sigmoid/gen/psimd-p5-div-x16.c",
761 "src/f32-sigmoid/gen/psimd-p5-div-x20.c",
762 "src/f32-sigmoid/gen/psimd-p5-div-x24.c",
Marat Dukhaneecf8fd2020-06-09 08:59:37 -0700[diff] [blame]763 "src/f32-vrnd/gen/vrndne-psimd-x4.c",
764 "src/f32-vrnd/gen/vrndne-psimd-x8.c",
765 "src/f32-vrnd/gen/vrndz-psimd-x4.c",
766 "src/f32-vrnd/gen/vrndz-psimd-x8.c",
767 "src/f32-vrnd/gen/vrndu-psimd-x4.c",
768 "src/f32-vrnd/gen/vrndu-psimd-x8.c",
769 "src/f32-vrnd/gen/vrndd-psimd-x4.c",
770 "src/f32-vrnd/gen/vrndd-psimd-x8.c",
Marat Dukhan075088a2020-05-12 19:42:12 -0700[diff] [blame]771 "src/math/roundne-psimd-addsub.c",
Marat Dukhanc9852ba2020-05-13 17:21:29 -0700[diff] [blame]772 "src/math/roundd-psimd-addsub.c",
773 "src/math/roundu-psimd-addsub.c",
Marat Dukhan2dbb9442020-05-12 20:43:43 -0700[diff] [blame]774 "src/math/roundz-psimd-addsub.c",
Marat Dukhan8d3c07e2020-01-02 01:20:59 -0800[diff] [blame]775 "src/math/sigmoid-psimd-p5-div.c",
776]
777
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]778# ISA-specific micro-kernels
779NEON_UKERNELS = [
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]780 "src/f32-avgpool/9p8x-minmax-neon-c4.c",
781 "src/f32-avgpool/9x-minmax-neon-c4.c",
Marat Dukhan5c5fa962020-03-10 18:38:33 -0700[diff] [blame]782 "src/f32-clamp/gen/neon-x4.c",
783 "src/f32-clamp/gen/neon-x8.c",
Marat Dukhan56b10cd2020-05-18 09:35:49 -0700[diff] [blame]784 "src/f32-conv-hwc/gen/3x3s2p0p1c3x4-neon-2x1.c",
785 "src/f32-conv-hwc/gen/3x3s2p0p1c3x8-neon-2x1.c",
Marat Dukhance7a3f82020-05-17 21:46:44 -0700[diff] [blame]786 "src/f32-conv-hwc/gen/3x3s2p0p1c3x4-neon-2x2.c",
787 "src/f32-conv-hwc/gen/3x3s2p0p1c3x8-neon-2x2.c",
Marat Dukhan56b10cd2020-05-18 09:35:49 -0700[diff] [blame]788 "src/f32-conv-hwc/gen/3x3s2p1c3x4-neon-2x1.c",
789 "src/f32-conv-hwc/gen/3x3s2p1c3x8-neon-2x1.c",
Marat Dukhance7a3f82020-05-17 21:46:44 -0700[diff] [blame]790 "src/f32-conv-hwc/gen/3x3s2p1c3x4-neon-2x2.c",
791 "src/f32-conv-hwc/gen/3x3s2p1c3x8-neon-2x2.c",
Marat Dukhanf5425ea2020-04-24 01:46:00 -0700[diff] [blame]792 "src/f32-dwconv/gen/up4x4-minmax-neon.c",
793 "src/f32-dwconv/gen/up4x4-minmax-neon-acc2.c",
794 "src/f32-dwconv/gen/up8x4-minmax-neon.c",
795 "src/f32-dwconv/gen/up8x4-minmax-neon-acc2.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]796 "src/f32-dwconv/gen/up4x9-minmax-neon.c",
797 "src/f32-dwconv/gen/up4x9-minmax-neon-acc2.c",
798 "src/f32-dwconv/gen/up8x9-minmax-neon.c",
799 "src/f32-dwconv/gen/up8x9-minmax-neon-acc2.c",
Marat Dukhanf5425ea2020-04-24 01:46:00 -0700[diff] [blame]800 "src/f32-dwconv/gen/up4x25-minmax-neon.c",
801 "src/f32-dwconv/gen/up4x25-minmax-neon-acc2.c",
802 "src/f32-dwconv/gen/up8x25-minmax-neon.c",
803 "src/f32-dwconv/gen/up8x25-minmax-neon-acc2.c",
Marat Dukhan1f29b802020-05-15 23:46:39 -0700[diff] [blame]804 "src/f32-gavgpool-cw/neon-x4.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]805 "src/f32-gavgpool/7p7x-minmax-neon-c4.c",
806 "src/f32-gavgpool/7x-minmax-neon-c4.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]807 "src/f32-gemm/gen/1x8-minmax-neon-lane-ld64.c",
808 "src/f32-gemm/gen/4x2-minmax-neon-lane-ld64.c",
809 "src/f32-gemm/gen/4x8-minmax-neon-lane-ld128.c",
810 "src/f32-gemm/gen/4x8-minmax-neon-lane-ld64.c",
811 "src/f32-gemm/gen/5x8-minmax-neon-lane-ld64.c",
812 "src/f32-gemm/gen/6x8-minmax-neon-lane-ld64.c",
813 "src/f32-gemm/gen/6x8-minmax-neon-lane-ld128.c",
814 "src/f32-gemm/gen/1x8-minmax-neon-dup-ld64.c",
815 "src/f32-gemm/gen/4x8-minmax-neon-dup-ld128.c",
816 "src/f32-gemm/gen/4x8-minmax-neon-dup-ld64.c",
817 "src/f32-gemm/gen/6x8-minmax-neon-dup-ld64.c",
818 "src/f32-gemm/gen/6x8-minmax-neon-dup-ld128.c",
819 "src/f32-gemm/gen/1x8s4-minmax-neon.c",
820 "src/f32-gemm/gen/4x8s4-minmax-neon.c",
821 "src/f32-gemm/gen/6x8s4-minmax-neon.c",
822 "src/f32-gemm/gen/8x8s4-minmax-neon.c",
823 "src/f32-gemm/gen-inc/1x8inc-minmax-neon-lane-ld64.c",
824 "src/f32-gemm/gen-inc/4x8inc-minmax-neon-lane-ld128.c",
825 "src/f32-gemm/gen-inc/4x8inc-minmax-neon-lane-ld64.c",
826 "src/f32-gemm/gen-inc/5x8inc-minmax-neon-lane-ld64.c",
827 "src/f32-gemm/gen-inc/6x8inc-minmax-neon-lane-ld64.c",
828 "src/f32-gemm/gen-inc/6x8inc-minmax-neon-lane-ld128.c",
829 "src/f32-gemm/gen-inc/1x8inc-minmax-neon-dup-ld64.c",
830 "src/f32-gemm/gen-inc/4x8inc-minmax-neon-dup-ld128.c",
831 "src/f32-gemm/gen-inc/4x8inc-minmax-neon-dup-ld64.c",
832 "src/f32-gemm/gen-inc/6x8inc-minmax-neon-dup-ld64.c",
833 "src/f32-gemm/gen-inc/6x8inc-minmax-neon-dup-ld128.c",
834 "src/f32-gemm/gen-inc/1x8s4inc-minmax-neon.c",
835 "src/f32-gemm/gen-inc/4x8s4inc-minmax-neon.c",
836 "src/f32-gemm/gen-inc/6x8s4inc-minmax-neon.c",
837 "src/f32-gemm/gen-inc/8x8s4inc-minmax-neon.c",
Marat Dukhan662faa02019-12-09 22:48:16 -0800[diff] [blame]838 "src/f32-hswish/gen/neon-x4.c",
839 "src/f32-hswish/gen/neon-x8.c",
Marat Dukhan660fd192020-03-10 04:55:30 -0700[diff] [blame]840 "src/f32-ibilinear/gen/neon-c4.c",
841 "src/f32-ibilinear/gen/neon-c8.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]842 "src/f32-igemm/gen/1x8-minmax-neon-lane-ld64.c",
843 "src/f32-igemm/gen/4x2-minmax-neon-lane-ld64.c",
844 "src/f32-igemm/gen/4x4-minmax-neon-lane-ld64.c",
845 "src/f32-igemm/gen/4x8-minmax-neon-lane-ld128.c",
846 "src/f32-igemm/gen/4x8-minmax-neon-lane-ld64.c",
847 "src/f32-igemm/gen/6x8-minmax-neon-lane-ld64.c",
848 "src/f32-igemm/gen/6x8-minmax-neon-lane-ld128.c",
849 "src/f32-igemm/gen/1x8-minmax-neon-dup-ld64.c",
850 "src/f32-igemm/gen/4x8-minmax-neon-dup-ld128.c",
851 "src/f32-igemm/gen/4x8-minmax-neon-dup-ld64.c",
852 "src/f32-igemm/gen/6x8-minmax-neon-dup-ld64.c",
853 "src/f32-igemm/gen/6x8-minmax-neon-dup-ld128.c",
854 "src/f32-igemm/gen/1x8s4-minmax-neon.c",
855 "src/f32-igemm/gen/4x8s4-minmax-neon.c",
856 "src/f32-igemm/gen/6x8s4-minmax-neon.c",
857 "src/f32-igemm/gen/8x8s4-minmax-neon.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]858 "src/f32-maxpool/9p8x-minmax-neon-c4.c",
859 "src/f32-pavgpool/9p8x-minmax-neon-c4.c",
860 "src/f32-pavgpool/9x-minmax-neon-c4.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]861 "src/f32-ppmm/gen/4x8-minmax-neon.c",
862 "src/f32-ppmm/gen/8x8-minmax-neon.c",
Marat Dukhan40a672f2019-11-25 03:08:22 -0800[diff] [blame]863 "src/f32-prelu/gen/neon-2x4.c",
864 "src/f32-prelu/gen/neon-2x8.c",
Marat Dukhan8137e4c2020-01-25 12:56:58 -0800[diff] [blame]865 "src/f32-raddstoreexpminusmax/gen/neon-p5-x4.c",
866 "src/f32-raddstoreexpminusmax/gen/neon-p5-x8.c",
867 "src/f32-raddstoreexpminusmax/gen/neon-p5-x8-acc2.c",
868 "src/f32-raddstoreexpminusmax/gen/neon-p5-x12.c",
869 "src/f32-raddstoreexpminusmax/gen/neon-p5-x12-acc2.c",
870 "src/f32-raddstoreexpminusmax/gen/neon-p5-x12-acc3.c",
871 "src/f32-raddstoreexpminusmax/gen/neon-p5-x16.c",
872 "src/f32-raddstoreexpminusmax/gen/neon-p5-x16-acc2.c",
873 "src/f32-raddstoreexpminusmax/gen/neon-p5-x16-acc4.c",
874 "src/f32-raddstoreexpminusmax/gen/neon-p5-x20.c",
875 "src/f32-raddstoreexpminusmax/gen/neon-p5-x20-acc2.c",
876 "src/f32-raddstoreexpminusmax/gen/neon-p5-x20-acc5.c",
877 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x4.c",
878 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x8.c",
879 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x8-acc2.c",
880 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x12.c",
881 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x12-acc2.c",
882 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x12-acc3.c",
883 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x16.c",
884 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x16-acc2.c",
885 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x16-acc4.c",
886 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x20.c",
887 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x20-acc2.c",
888 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x20-acc5.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]889 "src/f32-rmax/neon.c",
Marat Dukhan40a672f2019-11-25 03:08:22 -0800[diff] [blame]890 "src/f32-sigmoid/gen/neon-frac-p9-p10-nr1recps-x16.c",
Marat Dukhan4a24a582020-01-06 13:30:00 -0800[diff] [blame]891 "src/f32-sigmoid/gen/neon-rr2-p5-nr2recps-x4.c",
892 "src/f32-sigmoid/gen/neon-rr2-p5-nr2recps-x8.c",
893 "src/f32-sigmoid/gen/neon-rr2-p5-nr2recps-x12.c",
894 "src/f32-sigmoid/gen/neon-rr2-p5-nr2recps-x16.c",
895 "src/f32-sigmoid/gen/neon-rr2-p5-nr2recps-x20.c",
896 "src/f32-sigmoid/gen/neon-rr2-p5-nr2recps-x24.c",
897 "src/f32-sigmoid/gen/neon-rr2-lut64-p2-nr2recps-x4.c",
898 "src/f32-sigmoid/gen/neon-rr2-lut64-p2-nr2recps-x8.c",
899 "src/f32-sigmoid/gen/neon-rr2-lut64-p2-nr2recps-x12.c",
900 "src/f32-sigmoid/gen/neon-rr2-lut64-p2-nr2recps-x16.c",
901 "src/f32-sigmoid/gen/neon-rr2-lut64-p2-nr2recps-x20.c",
902 "src/f32-sigmoid/gen/neon-rr2-lut64-p2-nr2recps-x24.c",
903 "src/f32-sigmoid/gen/neon-rr2-lut2048-p1-nr2recps-x4.c",
904 "src/f32-sigmoid/gen/neon-rr2-lut2048-p1-nr2recps-x8.c",
905 "src/f32-sigmoid/gen/neon-rr2-lut2048-p1-nr2recps-x12.c",
906 "src/f32-sigmoid/gen/neon-rr2-lut2048-p1-nr2recps-x16.c",
907 "src/f32-sigmoid/gen/neon-rr2-lut2048-p1-nr2recps-x20.c",
908 "src/f32-sigmoid/gen/neon-rr2-lut2048-p1-nr2recps-x24.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]909 "src/f32-vbinary/gen/vadd-minmax-neon-x4.c",
910 "src/f32-vbinary/gen/vadd-minmax-neon-x8.c",
911 "src/f32-vbinary/gen/vaddc-minmax-neon-x4.c",
912 "src/f32-vbinary/gen/vaddc-minmax-neon-x8.c",
Marat Dukhan403b7d42019-12-05 12:49:11 -0800[diff] [blame]913 "src/f32-vbinary/gen/vmax-neon-x4.c",
914 "src/f32-vbinary/gen/vmax-neon-x8.c",
915 "src/f32-vbinary/gen/vmaxc-neon-x4.c",
916 "src/f32-vbinary/gen/vmaxc-neon-x8.c",
917 "src/f32-vbinary/gen/vmin-neon-x4.c",
918 "src/f32-vbinary/gen/vmin-neon-x8.c",
919 "src/f32-vbinary/gen/vminc-neon-x4.c",
920 "src/f32-vbinary/gen/vminc-neon-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]921 "src/f32-vbinary/gen/vmul-minmax-neon-x4.c",
922 "src/f32-vbinary/gen/vmul-minmax-neon-x8.c",
923 "src/f32-vbinary/gen/vmulc-minmax-neon-x4.c",
924 "src/f32-vbinary/gen/vmulc-minmax-neon-x8.c",
Marat Dukhan13bafb02020-06-05 00:43:11 -0700[diff] [blame]925 "src/f32-vbinary/gen/vrsqrdiffc-neon-x4.c",
926 "src/f32-vbinary/gen/vrsqrdiffc-neon-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]927 "src/f32-vbinary/gen/vrsubc-minmax-neon-x4.c",
928 "src/f32-vbinary/gen/vrsubc-minmax-neon-x8.c",
Marat Dukhan13bafb02020-06-05 00:43:11 -0700[diff] [blame]929 "src/f32-vbinary/gen/vsqrdiff-neon-x4.c",
930 "src/f32-vbinary/gen/vsqrdiff-neon-x8.c",
931 "src/f32-vbinary/gen/vsqrdiffc-neon-x4.c",
932 "src/f32-vbinary/gen/vsqrdiffc-neon-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]933 "src/f32-vbinary/gen/vsub-minmax-neon-x4.c",
934 "src/f32-vbinary/gen/vsub-minmax-neon-x8.c",
935 "src/f32-vbinary/gen/vsubc-minmax-neon-x4.c",
936 "src/f32-vbinary/gen/vsubc-minmax-neon-x8.c",
Marat Dukhan8cc7efe2020-06-10 16:24:27 -0700[diff] [blame]937 "src/f32-vlrelu/gen/neon-x4.c",
938 "src/f32-vlrelu/gen/neon-x8.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]939 "src/f32-vmulcaddc/gen/c4-minmax-neon-2x.c",
940 "src/f32-vmulcaddc/gen/c8-minmax-neon-2x.c",
Marat Dukhaneecf8fd2020-06-09 08:59:37 -0700[diff] [blame]941 "src/f32-vrnd/gen/vrndne-neon-x4.c",
942 "src/f32-vrnd/gen/vrndne-neon-x8.c",
943 "src/f32-vrnd/gen/vrndz-neon-x4.c",
944 "src/f32-vrnd/gen/vrndz-neon-x8.c",
945 "src/f32-vrnd/gen/vrndu-neon-x4.c",
946 "src/f32-vrnd/gen/vrndu-neon-x8.c",
947 "src/f32-vrnd/gen/vrndd-neon-x4.c",
948 "src/f32-vrnd/gen/vrndd-neon-x8.c",
Marat Dukhan5020b962020-06-08 13:30:10 -0700[diff] [blame]949 "src/f32-vunary/gen/vabs-neon-x4.c",
950 "src/f32-vunary/gen/vabs-neon-x8.c",
951 "src/f32-vunary/gen/vneg-neon-x4.c",
952 "src/f32-vunary/gen/vneg-neon-x8.c",
953 "src/f32-vunary/gen/vsqr-neon-x4.c",
954 "src/f32-vunary/gen/vsqr-neon-x8.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]955 "src/q8-avgpool/9p8x-minmax-neon-c8.c",
956 "src/q8-avgpool/9x-minmax-neon-c8.c",
Marat Dukhande06f492020-04-09 00:19:31 -0700[diff] [blame]957 "src/q8-dwconv/up8x9-minmax-neon.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]958 "src/q8-gavgpool/7p7x-minmax-neon-c8.c",
959 "src/q8-gavgpool/7x-minmax-neon-c8.c",
Marat Dukhande06f492020-04-09 00:19:31 -0700[diff] [blame]960 "src/q8-gemm/4x8-minmax-neon.c",
961 "src/q8-gemm/8x8-minmax-neon.c",
962 "src/q8-igemm/4x8-minmax-neon.c",
963 "src/q8-igemm/8x8-minmax-neon.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]964 "src/q8-vadd/minmax-neon.c",
Marat Dukhan5c5fa962020-03-10 18:38:33 -0700[diff] [blame]965 "src/u8-clamp/neon-x64.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]966 "src/u8-maxpool/9p8x-minmax-neon-c16.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]967 "src/u8-rmax/neon.c",
Marat Dukhan3bb3bfc2020-05-19 17:42:46 -0700[diff] [blame]968 "src/x32-fill/neon.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]969 "src/x32-packx/x4-neon-st4.c",
Marat Dukhan63523d42020-05-22 17:07:33 -0700[diff] [blame]970 "src/x32-pad/neon.c",
Marat Dukhan57dccd82020-04-14 00:53:10 -0700[diff] [blame]971 "src/x32-unpool/neon.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]972 "src/x32-zip/x2-neon.c",
973 "src/x32-zip/x3-neon.c",
974 "src/x32-zip/x4-neon.c",
975 "src/x32-zip/xm-neon.c",
976 "src/x8-zip/x2-neon.c",
977 "src/x8-zip/x3-neon.c",
978 "src/x8-zip/x4-neon.c",
979 "src/x8-zip/xm-neon.c",
Marat Dukhan075088a2020-05-12 19:42:12 -0700[diff] [blame]980 "src/math/roundne-neon-addsub.c",
Marat Dukhanc9852ba2020-05-13 17:21:29 -0700[diff] [blame]981 "src/math/roundd-neon-addsub.c",
982 "src/math/roundd-neon-cvt.c",
983 "src/math/roundu-neon-addsub.c",
984 "src/math/roundu-neon-cvt.c",
Marat Dukhan2dbb9442020-05-12 20:43:43 -0700[diff] [blame]985 "src/math/roundz-neon-addsub.c",
986 "src/math/roundz-neon-cvt.c",
Marat Dukhan68b3b452020-01-02 10:11:15 -0800[diff] [blame]987 "src/math/sigmoid-neon-frac-p9-p10-nr1recps.c",
Marat Dukhan77221d32020-01-06 10:04:39 -0800[diff] [blame]988 "src/math/sigmoid-neon-rr1-lut2048-p1-nr2recps.c",
989 "src/math/sigmoid-neon-rr1-lut64-p2-nr2recps.c",
990 "src/math/sigmoid-neon-rr1-p5-nr2recps.c",
991 "src/math/sigmoid-neon-rr2-lut2048-p1-nr2recps.c",
992 "src/math/sigmoid-neon-rr2-lut64-p2-nr2recps.c",
993 "src/math/sigmoid-neon-rr2-p5-nr2recps.c",
Marat Dukhanfe7acb62020-03-09 19:30:05 -0700[diff] [blame]994 "src/requantization/precise-neon.c",
995 "src/requantization/fp32-neon.c",
996 "src/requantization/q31-neon.c",
997 "src/requantization/gemmlowp-neon.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]998]
999
1000NEONFMA_UKERNELS = [
Marat Dukhan660fd192020-03-10 04:55:30 -0700[diff] [blame]1001 "src/f32-ibilinear/gen/neonfma-c4.c",
1002 "src/f32-ibilinear/gen/neonfma-c8.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]1003 "src/f32-igemm/gen/1x8-minmax-neonfma-dup-ld64.c",
1004 "src/f32-igemm/gen/4x8-minmax-neonfma-dup-ld128.c",
1005 "src/f32-igemm/gen/4x8-minmax-neonfma-dup-ld64.c",
1006 "src/f32-igemm/gen/6x8-minmax-neonfma-dup-ld64.c",
1007 "src/f32-igemm/gen/6x8-minmax-neonfma-dup-ld128.c",
1008 "src/f32-igemm/gen/1x8s4-minmax-neonfma.c",
1009 "src/f32-igemm/gen/4x8s4-minmax-neonfma.c",
1010 "src/f32-igemm/gen/6x8s4-minmax-neonfma.c",
1011 "src/f32-igemm/gen/8x8s4-minmax-neonfma.c",
Marat Dukhanf5425ea2020-04-24 01:46:00 -0700[diff] [blame]1012 "src/f32-dwconv/gen/up4x4-minmax-neonfma.c",
1013 "src/f32-dwconv/gen/up4x4-minmax-neonfma-acc2.c",
1014 "src/f32-dwconv/gen/up8x4-minmax-neonfma.c",
1015 "src/f32-dwconv/gen/up8x4-minmax-neonfma-acc2.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]1016 "src/f32-dwconv/gen/up4x9-minmax-neonfma.c",
1017 "src/f32-dwconv/gen/up4x9-minmax-neonfma-acc2.c",
1018 "src/f32-dwconv/gen/up8x9-minmax-neonfma.c",
1019 "src/f32-dwconv/gen/up8x9-minmax-neonfma-acc2.c",
Marat Dukhanf5425ea2020-04-24 01:46:00 -0700[diff] [blame]1020 "src/f32-dwconv/gen/up4x25-minmax-neonfma.c",
1021 "src/f32-dwconv/gen/up4x25-minmax-neonfma-acc2.c",
1022 "src/f32-dwconv/gen/up8x25-minmax-neonfma.c",
1023 "src/f32-dwconv/gen/up8x25-minmax-neonfma-acc2.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]1024 "src/f32-gemm/gen/1x8-minmax-neonfma-dup-ld64.c",
1025 "src/f32-gemm/gen/4x8-minmax-neonfma-dup-ld128.c",
1026 "src/f32-gemm/gen/4x8-minmax-neonfma-dup-ld64.c",
1027 "src/f32-gemm/gen/6x8-minmax-neonfma-dup-ld64.c",
1028 "src/f32-gemm/gen/6x8-minmax-neonfma-dup-ld128.c",
1029 "src/f32-gemm/gen/1x8s4-minmax-neonfma.c",
1030 "src/f32-gemm/gen/4x8s4-minmax-neonfma.c",
1031 "src/f32-gemm/gen/6x8s4-minmax-neonfma.c",
1032 "src/f32-gemm/gen/8x8s4-minmax-neonfma.c",
1033 "src/f32-gemm/gen-inc/1x8inc-minmax-neonfma-dup-ld64.c",
1034 "src/f32-gemm/gen-inc/4x8inc-minmax-neonfma-dup-ld128.c",
1035 "src/f32-gemm/gen-inc/4x8inc-minmax-neonfma-dup-ld64.c",
1036 "src/f32-gemm/gen-inc/6x8inc-minmax-neonfma-dup-ld64.c",
1037 "src/f32-gemm/gen-inc/6x8inc-minmax-neonfma-dup-ld128.c",
1038 "src/f32-gemm/gen-inc/1x8s4inc-minmax-neonfma.c",
1039 "src/f32-gemm/gen-inc/4x8s4inc-minmax-neonfma.c",
1040 "src/f32-gemm/gen-inc/6x8s4inc-minmax-neonfma.c",
1041 "src/f32-gemm/gen-inc/8x8s4inc-minmax-neonfma.c",
Marat Dukhan662faa02019-12-09 22:48:16 -0800[diff] [blame]1042 "src/f32-hswish/gen/neonfma-x4.c",
1043 "src/f32-hswish/gen/neonfma-x8.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]1044 "src/f32-ppmm/gen/4x8-minmax-neonfma.c",
1045 "src/f32-ppmm/gen/8x8-minmax-neonfma.c",
Marat Dukhan8137e4c2020-01-25 12:56:58 -0800[diff] [blame]1046 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x4.c",
1047 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x8.c",
1048 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x8-acc2.c",
1049 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x12.c",
1050 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x12-acc2.c",
1051 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x12-acc3.c",
1052 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x16.c",
1053 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x16-acc2.c",
1054 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x16-acc4.c",
1055 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x20.c",
1056 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x20-acc2.c",
1057 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x20-acc5.c",
1058 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x4.c",
1059 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x8.c",
1060 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x8-acc2.c",
1061 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x12.c",
1062 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x12-acc2.c",
1063 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x12-acc3.c",
1064 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x16.c",
1065 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x16-acc2.c",
1066 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x16-acc4.c",
1067 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x20.c",
1068 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x20-acc2.c",
1069 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x20-acc5.c",
Marat Dukhan4a24a582020-01-06 13:30:00 -0800[diff] [blame]1070 "src/f32-sigmoid/gen/neonfma-rr1-p5-nr2fma-x4.c",
1071 "src/f32-sigmoid/gen/neonfma-rr1-p5-nr2fma-x8.c",
1072 "src/f32-sigmoid/gen/neonfma-rr1-p5-nr2fma-x12.c",
1073 "src/f32-sigmoid/gen/neonfma-rr1-p5-nr2fma-x16.c",
1074 "src/f32-sigmoid/gen/neonfma-rr1-p5-nr2fma-x20.c",
1075 "src/f32-sigmoid/gen/neonfma-rr1-p5-nr2fma-x24.c",
1076 "src/f32-sigmoid/gen/neonfma-rr1-p5-nr1recps1fma-x4.c",
1077 "src/f32-sigmoid/gen/neonfma-rr1-p5-nr1recps1fma-x8.c",
1078 "src/f32-sigmoid/gen/neonfma-rr1-p5-nr1recps1fma-x12.c",
1079 "src/f32-sigmoid/gen/neonfma-rr1-p5-nr1recps1fma-x16.c",
1080 "src/f32-sigmoid/gen/neonfma-rr1-p5-nr1recps1fma-x20.c",
1081 "src/f32-sigmoid/gen/neonfma-rr1-p5-nr1recps1fma-x24.c",
1082 "src/f32-sigmoid/gen/neonfma-rr1-p5-nr2recps-x4.c",
1083 "src/f32-sigmoid/gen/neonfma-rr1-p5-nr2recps-x8.c",
1084 "src/f32-sigmoid/gen/neonfma-rr1-p5-nr2recps-x12.c",
1085 "src/f32-sigmoid/gen/neonfma-rr1-p5-nr2recps-x16.c",
1086 "src/f32-sigmoid/gen/neonfma-rr1-p5-nr2recps-x20.c",
1087 "src/f32-sigmoid/gen/neonfma-rr1-p5-nr2recps-x24.c",
1088 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-nr2fma-x4.c",
1089 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-nr2fma-x8.c",
1090 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-nr2fma-x12.c",
1091 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-nr2fma-x16.c",
1092 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-nr2fma-x20.c",
1093 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-nr2fma-x24.c",
1094 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-nr1recps1fma-x4.c",
1095 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-nr1recps1fma-x8.c",
1096 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-nr1recps1fma-x12.c",
1097 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-nr1recps1fma-x16.c",
1098 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-nr1recps1fma-x20.c",
1099 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-nr1recps1fma-x24.c",
1100 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-nr2recps-x4.c",
1101 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-nr2recps-x8.c",
1102 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-nr2recps-x12.c",
1103 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-nr2recps-x16.c",
1104 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-nr2recps-x20.c",
1105 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-nr2recps-x24.c",
1106 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-nr2fma-x4.c",
1107 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-nr2fma-x8.c",
1108 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-nr2fma-x12.c",
1109 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-nr2fma-x16.c",
1110 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-nr2fma-x20.c",
1111 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-nr2fma-x24.c",
1112 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-nr1recps1fma-x4.c",
1113 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-nr1recps1fma-x8.c",
1114 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-nr1recps1fma-x12.c",
1115 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-nr1recps1fma-x16.c",
1116 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-nr1recps1fma-x20.c",
1117 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-nr1recps1fma-x24.c",
1118 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-nr2recps-x4.c",
1119 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-nr2recps-x8.c",
1120 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-nr2recps-x12.c",
1121 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-nr2recps-x16.c",
1122 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-nr2recps-x20.c",
1123 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-nr2recps-x24.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]1124 "src/f32-vmulcaddc/gen/c4-minmax-neonfma-2x.c",
1125 "src/f32-vmulcaddc/gen/c8-minmax-neonfma-2x.c",
Marat Dukhan797a8fe2019-11-14 20:21:57 -0800[diff] [blame]1126 "src/math/exp-neonfma-lut64-p2.c",
1127 "src/math/exp-neonfma-p5.c",
Marat Dukhan189ae802019-11-26 11:28:44 -0800[diff] [blame]1128 "src/math/expminus-neonfma-lut2048-p1.c",
1129 "src/math/expminus-neonfma-lut64-p2.c",
Marat Dukhan346a9e52019-11-15 09:06:30 -0800[diff] [blame]1130 "src/math/expminus-neonfma-p5.c",
Marat Dukhan77221d32020-01-06 10:04:39 -0800[diff] [blame]1131 "src/math/sigmoid-neonfma-rr1-lut2048-p1-nr1recps1fma.c",
1132 "src/math/sigmoid-neonfma-rr1-lut2048-p1-nr2fma.c",
1133 "src/math/sigmoid-neonfma-rr1-lut2048-p1-nr2recps.c",
1134 "src/math/sigmoid-neonfma-rr1-lut64-p2-nr1recps1fma.c",
1135 "src/math/sigmoid-neonfma-rr1-lut64-p2-nr2fma.c",
1136 "src/math/sigmoid-neonfma-rr1-lut64-p2-nr2recps.c",
1137 "src/math/sigmoid-neonfma-rr1-p5-nr1recps1fma.c",
1138 "src/math/sigmoid-neonfma-rr1-p5-nr2fma.c",
1139 "src/math/sigmoid-neonfma-rr1-p5-nr2recps.c",
1140 "src/math/sigmoid-neonfma-rr2-lut2048-p1-nr1recps1fma.c",
1141 "src/math/sigmoid-neonfma-rr2-lut2048-p1-nr2fma.c",
1142 "src/math/sigmoid-neonfma-rr2-lut2048-p1-nr2recps.c",
1143 "src/math/sigmoid-neonfma-rr2-lut64-p2-nr1recps1fma.c",
1144 "src/math/sigmoid-neonfma-rr2-lut64-p2-nr2fma.c",
1145 "src/math/sigmoid-neonfma-rr2-lut64-p2-nr2recps.c",
1146 "src/math/sigmoid-neonfma-rr2-p5-nr1recps1fma.c",
1147 "src/math/sigmoid-neonfma-rr2-p5-nr2fma.c",
1148 "src/math/sigmoid-neonfma-rr2-p5-nr2recps.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1149]
1150
1151AARCH64_NEONFMA_UKERNELS = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]1152 "src/f32-vbinary/gen/vdiv-minmax-neon-x4.c",
1153 "src/f32-vbinary/gen/vdiv-minmax-neon-x8.c",
1154 "src/f32-vbinary/gen/vdivc-minmax-neon-x4.c",
1155 "src/f32-vbinary/gen/vdivc-minmax-neon-x8.c",
1156 "src/f32-vbinary/gen/vrdivc-minmax-neon-x4.c",
1157 "src/f32-vbinary/gen/vrdivc-minmax-neon-x8.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]1158 "src/f32-gemm/gen/1x8-minmax-neonfma-lane-ld64.c",
1159 "src/f32-gemm/gen/4x2-minmax-neonfma-lane-ld64.c",
1160 "src/f32-gemm/gen/4x8-minmax-neonfma-lane-ld128.c",
1161 "src/f32-gemm/gen/4x8-minmax-neonfma-lane-ld64.c",
1162 "src/f32-gemm/gen/5x8-minmax-neonfma-lane-ld64.c",
1163 "src/f32-gemm/gen/6x8-minmax-neonfma-lane-ld64.c",
1164 "src/f32-gemm/gen/6x8-minmax-neonfma-lane-ld128.c",
1165 "src/f32-gemm/gen-inc/1x8inc-minmax-neonfma-lane-ld64.c",
1166 "src/f32-gemm/gen-inc/4x8inc-minmax-neonfma-lane-ld128.c",
1167 "src/f32-gemm/gen-inc/4x8inc-minmax-neonfma-lane-ld64.c",
1168 "src/f32-gemm/gen-inc/5x8inc-minmax-neonfma-lane-ld64.c",
1169 "src/f32-gemm/gen-inc/6x8inc-minmax-neonfma-lane-ld64.c",
1170 "src/f32-gemm/gen-inc/6x8inc-minmax-neonfma-lane-ld128.c",
1171 "src/f32-igemm/gen/1x8-minmax-neonfma-lane-ld64.c",
1172 "src/f32-igemm/gen/4x2-minmax-neonfma-lane-ld64.c",
1173 "src/f32-igemm/gen/4x4-minmax-neonfma-lane-ld64.c",
1174 "src/f32-igemm/gen/4x8-minmax-neonfma-lane-ld128.c",
1175 "src/f32-igemm/gen/4x8-minmax-neonfma-lane-ld64.c",
1176 "src/f32-igemm/gen/6x8-minmax-neonfma-lane-ld64.c",
1177 "src/f32-igemm/gen/6x8-minmax-neonfma-lane-ld128.c",
Marat Dukhan56b10cd2020-05-18 09:35:49 -0700[diff] [blame]1178 "src/f32-conv-hwc/gen/3x3s2p0p1c3x4-neonfma-2x1.c",
1179 "src/f32-conv-hwc/gen/3x3s2p0p1c3x8-neonfma-2x1.c",
Marat Dukhance7a3f82020-05-17 21:46:44 -0700[diff] [blame]1180 "src/f32-conv-hwc/gen/3x3s2p0p1c3x4-neonfma-2x2.c",
1181 "src/f32-conv-hwc/gen/3x3s2p0p1c3x8-neonfma-2x2.c",
Marat Dukhan56b10cd2020-05-18 09:35:49 -0700[diff] [blame]1182 "src/f32-conv-hwc/gen/3x3s2p1c3x4-neonfma-2x1.c",
1183 "src/f32-conv-hwc/gen/3x3s2p1c3x8-neonfma-2x1.c",
Marat Dukhance7a3f82020-05-17 21:46:44 -0700[diff] [blame]1184 "src/f32-conv-hwc/gen/3x3s2p1c3x4-neonfma-2x2.c",
1185 "src/f32-conv-hwc/gen/3x3s2p1c3x8-neonfma-2x2.c",
Marat Dukhan1f29b802020-05-15 23:46:39 -0700[diff] [blame]1186 "src/f32-conv-hwc2chw/3x3s2p1c3x4-neonfma-2x2.c",
1187 "src/f32-dwconv-chw/3x3p1-neonfma.c",
1188 "src/f32-dwconv-chw/5x5p2-neonfma.c",
1189 "src/f32-dwconv-chw/3x3s2p1-neonfma.c",
1190 "src/f32-dwconv-chw/5x5s2p2-neonfma.c",
Marat Dukhan4a24a582020-01-06 13:30:00 -0800[diff] [blame]1191 "src/f32-sigmoid/gen/neonfma-rr1-p5-div-x4.c",
1192 "src/f32-sigmoid/gen/neonfma-rr1-p5-div-x8.c",
1193 "src/f32-sigmoid/gen/neonfma-rr1-p5-div-x12.c",
1194 "src/f32-sigmoid/gen/neonfma-rr1-p5-div-x16.c",
1195 "src/f32-sigmoid/gen/neonfma-rr1-p5-div-x20.c",
1196 "src/f32-sigmoid/gen/neonfma-rr1-p5-div-x24.c",
1197 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-div-x4.c",
1198 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-div-x8.c",
1199 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-div-x12.c",
1200 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-div-x16.c",
1201 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-div-x20.c",
1202 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-div-x24.c",
1203 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-div-x4.c",
1204 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-div-x8.c",
1205 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-div-x12.c",
1206 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-div-x16.c",
1207 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-div-x20.c",
1208 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-div-x24.c",
Marat Dukhan355ab432020-04-09 19:01:52 -0700[diff] [blame]1209 "src/f32-spmm/gen/12x1-minmax-neonfma.c",
1210 "src/f32-spmm/gen/12x2-minmax-neonfma.c",
1211 "src/f32-spmm/gen/12x4-minmax-neonfma.c",
1212 "src/f32-spmm/gen/16x1-minmax-neonfma-pipelined.c",
1213 "src/f32-spmm/gen/16x1-minmax-neonfma-unroll2.c",
1214 "src/f32-spmm/gen/16x1-minmax-neonfma.c",
1215 "src/f32-spmm/gen/16x2-minmax-neonfma.c",
1216 "src/f32-spmm/gen/16x4-minmax-neonfma.c",
1217 "src/f32-spmm/gen/4x1-minmax-neonfma-pipelined.c",
1218 "src/f32-spmm/gen/4x1-minmax-neonfma-unroll2.c",
1219 "src/f32-spmm/gen/4x1-minmax-neonfma.c",
1220 "src/f32-spmm/gen/4x2-minmax-neonfma.c",
1221 "src/f32-spmm/gen/4x4-minmax-neonfma.c",
1222 "src/f32-spmm/gen/8x1-minmax-neonfma-pipelined.c",
1223 "src/f32-spmm/gen/8x1-minmax-neonfma-unroll2.c",
1224 "src/f32-spmm/gen/8x1-minmax-neonfma.c",
1225 "src/f32-spmm/gen/8x2-minmax-neonfma.c",
1226 "src/f32-spmm/gen/8x4-minmax-neonfma.c",
Marat Dukhan77221d32020-01-06 10:04:39 -0800[diff] [blame]1227 "src/math/sigmoid-neonfma-rr1-lut2048-p1-div.c",
1228 "src/math/sigmoid-neonfma-rr1-lut64-p2-div.c",
1229 "src/math/sigmoid-neonfma-rr1-p5-div.c",
1230 "src/math/sigmoid-neonfma-rr2-lut2048-p1-div.c",
1231 "src/math/sigmoid-neonfma-rr2-lut64-p2-div.c",
1232 "src/math/sigmoid-neonfma-rr2-p5-div.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1233]
1234
Marat Dukhan8853b822020-05-07 12:19:01 -0700[diff] [blame]1235NEONV8_UKERNELS = [
Marat Dukhaneecf8fd2020-06-09 08:59:37 -0700[diff] [blame]1236 "src/f32-vrnd/gen/vrndne-neonv8-x4.c",
1237 "src/f32-vrnd/gen/vrndne-neonv8-x8.c",
1238 "src/f32-vrnd/gen/vrndz-neonv8-x4.c",
1239 "src/f32-vrnd/gen/vrndz-neonv8-x8.c",
1240 "src/f32-vrnd/gen/vrndu-neonv8-x4.c",
1241 "src/f32-vrnd/gen/vrndu-neonv8-x8.c",
1242 "src/f32-vrnd/gen/vrndd-neonv8-x4.c",
1243 "src/f32-vrnd/gen/vrndd-neonv8-x8.c",
Marat Dukhan8853b822020-05-07 12:19:01 -0700[diff] [blame]1244 "src/math/roundne-neonv8.c",
Marat Dukhanc9852ba2020-05-13 17:21:29 -0700[diff] [blame]1245 "src/math/roundd-neonv8.c",
1246 "src/math/roundu-neonv8.c",
Marat Dukhan2dbb9442020-05-12 20:43:43 -0700[diff] [blame]1247 "src/math/roundz-neonv8.c",
Marat Dukhan8853b822020-05-07 12:19:01 -0700[diff] [blame]1248]
1249
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1250AARCH64_NEONFP16ARITH_UKERNELS = [
Frank Barchardb1966592020-05-12 13:47:06 -0700[diff] [blame]1251 "src/f16-clamp/gen/neonfp16arith-x16.c",
1252 "src/f16-clamp/gen/neonfp16arith-x8.c",
Frank Barchard5a599a62020-06-04 20:12:44 -0700[diff] [blame]1253 "src/f16-dwconv/gen/up16x25-minmax-neonfp16arith-acc2.c",
1254 "src/f16-dwconv/gen/up16x25-minmax-neonfp16arith.c",
1255 "src/f16-dwconv/gen/up16x4-minmax-neonfp16arith-acc2.c",
1256 "src/f16-dwconv/gen/up16x4-minmax-neonfp16arith.c",
1257 "src/f16-dwconv/gen/up16x9-minmax-neonfp16arith-acc2.c",
1258 "src/f16-dwconv/gen/up16x9-minmax-neonfp16arith.c",
1259 "src/f16-dwconv/gen/up8x25-minmax-neonfp16arith-acc2.c",
1260 "src/f16-dwconv/gen/up8x25-minmax-neonfp16arith.c",
1261 "src/f16-dwconv/gen/up8x4-minmax-neonfp16arith-acc2.c",
1262 "src/f16-dwconv/gen/up8x4-minmax-neonfp16arith.c",
1263 "src/f16-dwconv/gen/up8x9-minmax-neonfp16arith-acc2.c",
1264 "src/f16-dwconv/gen/up8x9-minmax-neonfp16arith.c",
Frank Barchard0bb49a72020-06-04 11:35:11 -0700[diff] [blame]1265 "src/f16-gavgpool/7p7x-minmax-neonfp16arith-c8.c",
1266 "src/f16-gavgpool/7x-minmax-neonfp16arith-c8.c",
Frank Barchardb1966592020-05-12 13:47:06 -0700[diff] [blame]1267 "src/f16-hswish/gen/neonfp16arith-x16.c",
1268 "src/f16-hswish/gen/neonfp16arith-x8.c",
1269 "src/f16-prelu/gen/neonfp16arith-2x16.c",
1270 "src/f16-prelu/gen/neonfp16arith-2x8.c",
Frank Barchardd793f6c2020-05-08 13:37:43 -0700[diff] [blame]1271 "src/f16-vbinary/gen/vaddc-minmax-neonfp16arith-x16.c",
1272 "src/f16-vbinary/gen/vaddc-minmax-neonfp16arith-x8.c",
1273 "src/f16-vbinary/gen/vadd-minmax-neonfp16arith-x16.c",
1274 "src/f16-vbinary/gen/vadd-minmax-neonfp16arith-x8.c",
1275 "src/f16-vbinary/gen/vdivc-minmax-neonfp16arith-x16.c",
1276 "src/f16-vbinary/gen/vdivc-minmax-neonfp16arith-x8.c",
1277 "src/f16-vbinary/gen/vdiv-minmax-neonfp16arith-x16.c",
1278 "src/f16-vbinary/gen/vdiv-minmax-neonfp16arith-x8.c",
1279 "src/f16-vbinary/gen/vmaxc-neonfp16arith-x16.c",
1280 "src/f16-vbinary/gen/vmaxc-neonfp16arith-x8.c",
1281 "src/f16-vbinary/gen/vmax-neonfp16arith-x16.c",
1282 "src/f16-vbinary/gen/vmax-neonfp16arith-x8.c",
1283 "src/f16-vbinary/gen/vminc-neonfp16arith-x16.c",
1284 "src/f16-vbinary/gen/vminc-neonfp16arith-x8.c",
1285 "src/f16-vbinary/gen/vmin-neonfp16arith-x16.c",
1286 "src/f16-vbinary/gen/vmin-neonfp16arith-x8.c",
1287 "src/f16-vbinary/gen/vmulc-minmax-neonfp16arith-x16.c",
1288 "src/f16-vbinary/gen/vmulc-minmax-neonfp16arith-x8.c",
1289 "src/f16-vbinary/gen/vmul-minmax-neonfp16arith-x16.c",
1290 "src/f16-vbinary/gen/vmul-minmax-neonfp16arith-x8.c",
1291 "src/f16-vbinary/gen/vrdivc-minmax-neonfp16arith-x16.c",
1292 "src/f16-vbinary/gen/vrdivc-minmax-neonfp16arith-x8.c",
1293 "src/f16-vbinary/gen/vrsubc-minmax-neonfp16arith-x16.c",
1294 "src/f16-vbinary/gen/vrsubc-minmax-neonfp16arith-x8.c",
1295 "src/f16-vbinary/gen/vsubc-minmax-neonfp16arith-x16.c",
1296 "src/f16-vbinary/gen/vsubc-minmax-neonfp16arith-x8.c",
1297 "src/f16-vbinary/gen/vsub-minmax-neonfp16arith-x16.c",
1298 "src/f16-vbinary/gen/vsub-minmax-neonfp16arith-x8.c",
Frank Barchard2a1049c2020-06-03 02:31:27 -0700[diff] [blame]1299 "src/f16-vmulcaddc/gen/c16-minmax-neonfp16arith-2x.c",
1300 "src/f16-vmulcaddc/gen/c8-minmax-neonfp16arith-2x.c",
Frank Barchard83ea9392020-04-20 20:15:14 -0700[diff] [blame]1301 "src/f16-gemm/gen/1x8-minmax-neonfp16arith-ld64.c",
1302 "src/f16-gemm/gen/4x8-minmax-neonfp16arith-ld64.c",
1303 "src/f16-gemm/gen/6x8-minmax-neonfp16arith-ld64.c",
1304 "src/f16-gemm/gen/8x8-minmax-neonfp16arith-ld64.c",
1305 "src/f16-gemm/gen-inc/1x8inc-minmax-neonfp16arith-ld64.c",
1306 "src/f16-gemm/gen-inc/4x8inc-minmax-neonfp16arith-ld64.c",
1307 "src/f16-gemm/gen-inc/6x8inc-minmax-neonfp16arith-ld64.c",
1308 "src/f16-gemm/gen-inc/8x8inc-minmax-neonfp16arith-ld64.c",
Frank Barchardb0e4fae2020-05-04 15:27:51 -0700[diff] [blame]1309 "src/f16-igemm/gen/1x8-minmax-neonfp16arith-ld64.c",
1310 "src/f16-igemm/gen/4x8-minmax-neonfp16arith-ld64.c",
1311 "src/f16-igemm/gen/6x8-minmax-neonfp16arith-ld64.c",
1312 "src/f16-igemm/gen/8x8-minmax-neonfp16arith-ld64.c",
Frank Barchard3f9f99f2020-05-06 01:12:04 -0700[diff] [blame]1313 "src/f16-gemm/gen/1x16-minmax-neonfp16arith-ld64.c",
1314 "src/f16-gemm/gen/4x16-minmax-neonfp16arith-ld64.c",
1315 "src/f16-gemm/gen/6x16-minmax-neonfp16arith-ld64.c",
1316 "src/f16-gemm/gen/8x16-minmax-neonfp16arith-ld64.c",
1317 "src/f16-gemm/gen-inc/1x16inc-minmax-neonfp16arith-ld64.c",
1318 "src/f16-gemm/gen-inc/4x16inc-minmax-neonfp16arith-ld64.c",
1319 "src/f16-gemm/gen-inc/6x16inc-minmax-neonfp16arith-ld64.c",
1320 "src/f16-gemm/gen-inc/8x16inc-minmax-neonfp16arith-ld64.c",
1321 "src/f16-igemm/gen/1x16-minmax-neonfp16arith-ld64.c",
1322 "src/f16-igemm/gen/4x16-minmax-neonfp16arith-ld64.c",
1323 "src/f16-igemm/gen/6x16-minmax-neonfp16arith-ld64.c",
1324 "src/f16-igemm/gen/8x16-minmax-neonfp16arith-ld64.c",
Marat Dukhan355ab432020-04-09 19:01:52 -0700[diff] [blame]1325 "src/f16-spmm/gen/8x1-minmax-neonfp16arith.c",
1326 "src/f16-spmm/gen/8x1-minmax-neonfp16arith-unroll2.c",
1327 "src/f16-spmm/gen/16x1-minmax-neonfp16arith.c",
1328 "src/f16-spmm/gen/16x1-minmax-neonfp16arith-unroll2.c",
1329 "src/f16-spmm/gen/24x1-minmax-neonfp16arith.c",
1330 "src/f16-spmm/gen/24x1-minmax-neonfp16arith-unroll2.c",
1331 "src/f16-spmm/gen/32x1-minmax-neonfp16arith.c",
1332 "src/f16-spmm/gen/32x1-minmax-neonfp16arith-unroll2.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1333]
1334
1335SSE_UKERNELS = [
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]1336 "src/f32-avgpool/9p8x-minmax-sse-c4.c",
1337 "src/f32-avgpool/9x-minmax-sse-c4.c",
Marat Dukhan5c5fa962020-03-10 18:38:33 -0700[diff] [blame]1338 "src/f32-clamp/gen/sse-x4.c",
1339 "src/f32-clamp/gen/sse-x8.c",
Erich Elsenb1233402020-06-08 15:53:15 -0700[diff] [blame]1340 "src/f32-conv-hwc2chw/3x3s2p1c3x4-sse-1x1.c",
1341 "src/f32-conv-hwc2chw/3x3s2p1c3x4-sse-2x2.c",
Marat Dukhan1f29b802020-05-15 23:46:39 -0700[diff] [blame]1342 "src/f32-dwconv-chw/3x3p1-sse.c",
1343 "src/f32-dwconv-chw/3x3s2p1-sse.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]1344 "src/f32-dwconv/gen/up4x25-minmax-sse-acc2.c",
1345 "src/f32-dwconv/gen/up4x25-minmax-sse.c",
1346 "src/f32-dwconv/gen/up4x4-minmax-sse-acc2.c",
1347 "src/f32-dwconv/gen/up4x4-minmax-sse.c",
1348 "src/f32-dwconv/gen/up4x9-minmax-sse-acc2.c",
1349 "src/f32-dwconv/gen/up4x9-minmax-sse.c",
1350 "src/f32-dwconv/gen/up8x25-minmax-sse-acc2.c",
1351 "src/f32-dwconv/gen/up8x25-minmax-sse.c",
1352 "src/f32-dwconv/gen/up8x4-minmax-sse-acc2.c",
1353 "src/f32-dwconv/gen/up8x4-minmax-sse.c",
1354 "src/f32-dwconv/gen/up8x9-minmax-sse-acc2.c",
1355 "src/f32-dwconv/gen/up8x9-minmax-sse.c",
Marat Dukhan1f29b802020-05-15 23:46:39 -0700[diff] [blame]1356 "src/f32-gavgpool-cw/sse-x4.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]1357 "src/f32-gavgpool/7p7x-minmax-sse-c4.c",
1358 "src/f32-gavgpool/7x-minmax-sse-c4.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]1359 "src/f32-gemm/gen/1x8-minmax-sse-dup.c",
1360 "src/f32-gemm/gen/1x8-minmax-sse-load1.c",
1361 "src/f32-gemm/gen/1x8s4-minmax-sse.c",
1362 "src/f32-gemm/gen/4x2c4-minmax-sse.c",
1363 "src/f32-gemm/gen/4x8-minmax-sse-dup.c",
1364 "src/f32-gemm/gen/4x8-minmax-sse-load1.c",
1365 "src/f32-gemm/gen/4x8s4-minmax-sse.c",
1366 "src/f32-gemm/gen-inc/1x8inc-minmax-sse-dup.c",
1367 "src/f32-gemm/gen-inc/1x8inc-minmax-sse-load1.c",
1368 "src/f32-gemm/gen-inc/1x8s4inc-minmax-sse.c",
1369 "src/f32-gemm/gen-inc/4x8inc-minmax-sse-dup.c",
1370 "src/f32-gemm/gen-inc/4x8inc-minmax-sse-load1.c",
1371 "src/f32-gemm/gen-inc/4x8s4inc-minmax-sse.c",
Marat Dukhan662faa02019-12-09 22:48:16 -0800[diff] [blame]1372 "src/f32-hswish/gen/sse-x4.c",
1373 "src/f32-hswish/gen/sse-x8.c",
Marat Dukhan660fd192020-03-10 04:55:30 -0700[diff] [blame]1374 "src/f32-ibilinear/gen/sse-c4.c",
1375 "src/f32-ibilinear/gen/sse-c8.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]1376 "src/f32-igemm/gen/1x8-minmax-sse-dup.c",
1377 "src/f32-igemm/gen/1x8-minmax-sse-load1.c",
1378 "src/f32-igemm/gen/1x8s4-minmax-sse.c",
1379 "src/f32-igemm/gen/4x2c4-minmax-sse.c",
1380 "src/f32-igemm/gen/4x8-minmax-sse-dup.c",
1381 "src/f32-igemm/gen/4x8-minmax-sse-load1.c",
1382 "src/f32-igemm/gen/4x8s4-minmax-sse.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]1383 "src/f32-maxpool/9p8x-minmax-sse-c4.c",
1384 "src/f32-pavgpool/9p8x-minmax-sse-c4.c",
1385 "src/f32-pavgpool/9x-minmax-sse-c4.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]1386 "src/f32-ppmm/gen/4x8-minmax-sse.c",
Marat Dukhan39b5e942020-06-24 15:03:48 -0700[diff] [blame^]1387 "src/f32-prelu/gen/sse-2x4.c",
1388 "src/f32-prelu/gen/sse-2x8.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1389 "src/f32-rmax/sse.c",
Marat Dukhan355ab432020-04-09 19:01:52 -0700[diff] [blame]1390 "src/f32-spmm/gen/4x1-minmax-sse.c",
1391 "src/f32-spmm/gen/8x1-minmax-sse.c",
Erich Elsen6e80fdc2020-06-09 15:35:37 -0700[diff] [blame]1392 "src/f32-spmm/gen/16x1-minmax-sse.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]1393 "src/f32-vbinary/gen/vadd-minmax-sse-x4.c",
1394 "src/f32-vbinary/gen/vadd-minmax-sse-x8.c",
1395 "src/f32-vbinary/gen/vaddc-minmax-sse-x4.c",
1396 "src/f32-vbinary/gen/vaddc-minmax-sse-x8.c",
1397 "src/f32-vbinary/gen/vdiv-minmax-sse-x4.c",
1398 "src/f32-vbinary/gen/vdiv-minmax-sse-x8.c",
1399 "src/f32-vbinary/gen/vdivc-minmax-sse-x4.c",
1400 "src/f32-vbinary/gen/vdivc-minmax-sse-x8.c",
Marat Dukhan403b7d42019-12-05 12:49:11 -0800[diff] [blame]1401 "src/f32-vbinary/gen/vmax-sse-x4.c",
1402 "src/f32-vbinary/gen/vmax-sse-x8.c",
1403 "src/f32-vbinary/gen/vmaxc-sse-x4.c",
1404 "src/f32-vbinary/gen/vmaxc-sse-x8.c",
1405 "src/f32-vbinary/gen/vmin-sse-x4.c",
1406 "src/f32-vbinary/gen/vmin-sse-x8.c",
1407 "src/f32-vbinary/gen/vminc-sse-x4.c",
1408 "src/f32-vbinary/gen/vminc-sse-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]1409 "src/f32-vbinary/gen/vmul-minmax-sse-x4.c",
1410 "src/f32-vbinary/gen/vmul-minmax-sse-x8.c",
1411 "src/f32-vbinary/gen/vmulc-minmax-sse-x4.c",
1412 "src/f32-vbinary/gen/vmulc-minmax-sse-x8.c",
1413 "src/f32-vbinary/gen/vrdivc-minmax-sse-x4.c",
1414 "src/f32-vbinary/gen/vrdivc-minmax-sse-x8.c",
Marat Dukhan13bafb02020-06-05 00:43:11 -0700[diff] [blame]1415 "src/f32-vbinary/gen/vrsqrdiffc-sse-x4.c",
1416 "src/f32-vbinary/gen/vrsqrdiffc-sse-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]1417 "src/f32-vbinary/gen/vrsubc-minmax-sse-x4.c",
1418 "src/f32-vbinary/gen/vrsubc-minmax-sse-x8.c",
Marat Dukhan13bafb02020-06-05 00:43:11 -0700[diff] [blame]1419 "src/f32-vbinary/gen/vsqrdiff-sse-x4.c",
1420 "src/f32-vbinary/gen/vsqrdiff-sse-x8.c",
1421 "src/f32-vbinary/gen/vsqrdiffc-sse-x4.c",
1422 "src/f32-vbinary/gen/vsqrdiffc-sse-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]1423 "src/f32-vbinary/gen/vsub-minmax-sse-x4.c",
1424 "src/f32-vbinary/gen/vsub-minmax-sse-x8.c",
1425 "src/f32-vbinary/gen/vsubc-minmax-sse-x4.c",
1426 "src/f32-vbinary/gen/vsubc-minmax-sse-x8.c",
Marat Dukhan8cc7efe2020-06-10 16:24:27 -0700[diff] [blame]1427 "src/f32-vlrelu/gen/sse-x4.c",
1428 "src/f32-vlrelu/gen/sse-x8.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]1429 "src/f32-vmulcaddc/gen/c4-minmax-sse-2x.c",
1430 "src/f32-vmulcaddc/gen/c8-minmax-sse-2x.c",
Marat Dukhan5020b962020-06-08 13:30:10 -0700[diff] [blame]1431 "src/f32-vunary/gen/vabs-sse-x4.c",
1432 "src/f32-vunary/gen/vabs-sse-x8.c",
1433 "src/f32-vunary/gen/vneg-sse-x4.c",
1434 "src/f32-vunary/gen/vneg-sse-x8.c",
1435 "src/f32-vunary/gen/vsqr-sse-x4.c",
1436 "src/f32-vunary/gen/vsqr-sse-x8.c",
Marat Dukhan3bb3bfc2020-05-19 17:42:46 -0700[diff] [blame]1437 "src/x32-fill/sse.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1438 "src/x32-packx/x4-sse.c",
Marat Dukhan63523d42020-05-22 17:07:33 -0700[diff] [blame]1439 "src/x32-pad/sse.c",
Marat Dukhan075088a2020-05-12 19:42:12 -0700[diff] [blame]1440 "src/math/roundne-sse-addsub.c",
Marat Dukhanc9852ba2020-05-13 17:21:29 -0700[diff] [blame]1441 "src/math/roundd-sse-addsub.c",
1442 "src/math/roundu-sse-addsub.c",
Marat Dukhan2dbb9442020-05-12 20:43:43 -0700[diff] [blame]1443 "src/math/roundz-sse-addsub.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1444]
1445
1446SSE2_UKERNELS = [
Marat Dukhan329da642019-11-19 21:44:39 -0800[diff] [blame]1447 "src/f32-argmaxpool/9p8x-sse2-c4.c",
1448 "src/f32-argmaxpool/4x-sse2-c4.c",
1449 "src/f32-argmaxpool/9x-sse2-c4.c",
Marat Dukhan40a672f2019-11-25 03:08:22 -0800[diff] [blame]1450 "src/f32-prelu/gen/sse2-2x4.c",
1451 "src/f32-prelu/gen/sse2-2x8.c",
Marat Dukhanb39689d2020-01-24 13:32:20 -0800[diff] [blame]1452 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x4.c",
1453 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x8.c",
1454 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x8-acc2.c",
1455 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x12.c",
1456 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x12-acc2.c",
1457 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x12-acc3.c",
1458 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x16.c",
1459 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x16-acc2.c",
1460 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x16-acc4.c",
1461 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x20.c",
1462 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x20-acc2.c",
1463 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x20-acc5.c",
Marat Dukhan8d3c07e2020-01-02 01:20:59 -0800[diff] [blame]1464 "src/f32-sigmoid/gen/sse2-p5-div-x4.c",
Marat Dukhan40a672f2019-11-25 03:08:22 -0800[diff] [blame]1465 "src/f32-sigmoid/gen/sse2-p5-div-x8.c",
Marat Dukhan8d3c07e2020-01-02 01:20:59 -0800[diff] [blame]1466 "src/f32-sigmoid/gen/sse2-p5-div-x12.c",
Marat Dukhan40a672f2019-11-25 03:08:22 -0800[diff] [blame]1467 "src/f32-sigmoid/gen/sse2-p5-div-x16.c",
Marat Dukhan8d3c07e2020-01-02 01:20:59 -0800[diff] [blame]1468 "src/f32-sigmoid/gen/sse2-p5-div-x20.c",
1469 "src/f32-sigmoid/gen/sse2-p5-div-x24.c",
Marat Dukhaneecf8fd2020-06-09 08:59:37 -0700[diff] [blame]1470 "src/f32-vrnd/gen/vrndne-sse2-x4.c",
1471 "src/f32-vrnd/gen/vrndne-sse2-x8.c",
1472 "src/f32-vrnd/gen/vrndz-sse2-x4.c",
1473 "src/f32-vrnd/gen/vrndz-sse2-x8.c",
1474 "src/f32-vrnd/gen/vrndu-sse2-x4.c",
1475 "src/f32-vrnd/gen/vrndu-sse2-x8.c",
1476 "src/f32-vrnd/gen/vrndd-sse2-x4.c",
1477 "src/f32-vrnd/gen/vrndd-sse2-x8.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]1478 "src/q8-avgpool/9p8x-minmax-sse2-c8.c",
1479 "src/q8-avgpool/9x-minmax-sse2-c8.c",
Marat Dukhande06f492020-04-09 00:19:31 -0700[diff] [blame]1480 "src/q8-igemm/4x4c2-minmax-sse2.c",
1481 "src/q8-dwconv/up8x9-minmax-sse2.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]1482 "src/q8-gavgpool/7p7x-minmax-sse2-c8.c",
1483 "src/q8-gavgpool/7x-minmax-sse2-c8.c",
Marat Dukhande06f492020-04-09 00:19:31 -0700[diff] [blame]1484 "src/q8-gemm/2x4c8-minmax-sse2.c",
1485 "src/q8-gemm/4x4c2-minmax-sse2.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]1486 "src/q8-vadd/minmax-sse2.c",
Marat Dukhan5c5fa962020-03-10 18:38:33 -0700[diff] [blame]1487 "src/u8-clamp/sse2-x64.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]1488 "src/u8-maxpool/9p8x-minmax-sse2-c16.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1489 "src/u8-rmax/sse2.c",
Marat Dukhan57dccd82020-04-14 00:53:10 -0700[diff] [blame]1490 "src/x32-unpool/sse2.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1491 "src/x32-zip/x2-sse2.c",
1492 "src/x32-zip/x3-sse2.c",
1493 "src/x32-zip/x4-sse2.c",
1494 "src/x32-zip/xm-sse2.c",
1495 "src/x8-zip/x2-sse2.c",
1496 "src/x8-zip/x3-sse2.c",
1497 "src/x8-zip/x4-sse2.c",
1498 "src/x8-zip/xm-sse2.c",
Marat Dukhanffd68402019-11-15 15:19:11 -0800[diff] [blame]1499 "src/math/exp-sse2-p5.c",
1500 "src/math/expminus-sse2-p5.c",
Marat Dukhan075088a2020-05-12 19:42:12 -0700[diff] [blame]1501 "src/math/roundne-sse2-cvt.c",
Marat Dukhanc9852ba2020-05-13 17:21:29 -0700[diff] [blame]1502 "src/math/roundd-sse2-cvt.c",
1503 "src/math/roundu-sse2-cvt.c",
Marat Dukhan2dbb9442020-05-12 20:43:43 -0700[diff] [blame]1504 "src/math/roundz-sse2-cvt.c",
Marat Dukhan80bafd22019-11-18 10:16:01 -0800[diff] [blame]1505 "src/math/sigmoid-sse2-p5-div.c",
Marat Dukhanfe7acb62020-03-09 19:30:05 -0700[diff] [blame]1506 "src/requantization/precise-sse2.c",
1507 "src/requantization/fp32-sse2.c",
1508 "src/requantization/q31-sse2.c",
1509 "src/requantization/gemmlowp-sse2.c",
1510]
1511
1512SSSE3_UKERNELS = [
1513 "src/requantization/precise-ssse3.c",
1514 "src/requantization/q31-ssse3.c",
1515 "src/requantization/gemmlowp-ssse3.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1516]
1517
Marat Dukhan69c3f2c2019-11-06 12:30:01 -0800[diff] [blame]1518SSE41_UKERNELS = [
Marat Dukhan40a672f2019-11-25 03:08:22 -0800[diff] [blame]1519 "src/f32-prelu/gen/sse41-2x4.c",
1520 "src/f32-prelu/gen/sse41-2x8.c",
Marat Dukhan8d3c07e2020-01-02 01:20:59 -0800[diff] [blame]1521 "src/f32-sigmoid/gen/sse41-p5-div-x4.c",
Marat Dukhan40a672f2019-11-25 03:08:22 -0800[diff] [blame]1522 "src/f32-sigmoid/gen/sse41-p5-div-x8.c",
Marat Dukhan8d3c07e2020-01-02 01:20:59 -0800[diff] [blame]1523 "src/f32-sigmoid/gen/sse41-p5-div-x12.c",
Marat Dukhan40a672f2019-11-25 03:08:22 -0800[diff] [blame]1524 "src/f32-sigmoid/gen/sse41-p5-div-x16.c",
Marat Dukhan8d3c07e2020-01-02 01:20:59 -0800[diff] [blame]1525 "src/f32-sigmoid/gen/sse41-p5-div-x20.c",
1526 "src/f32-sigmoid/gen/sse41-p5-div-x24.c",
Marat Dukhaneecf8fd2020-06-09 08:59:37 -0700[diff] [blame]1527 "src/f32-vrnd/gen/vrndne-sse41-x4.c",
1528 "src/f32-vrnd/gen/vrndne-sse41-x8.c",
1529 "src/f32-vrnd/gen/vrndz-sse41-x4.c",
1530 "src/f32-vrnd/gen/vrndz-sse41-x8.c",
1531 "src/f32-vrnd/gen/vrndu-sse41-x4.c",
1532 "src/f32-vrnd/gen/vrndu-sse41-x8.c",
1533 "src/f32-vrnd/gen/vrndd-sse41-x4.c",
1534 "src/f32-vrnd/gen/vrndd-sse41-x8.c",
Marat Dukhan8853b822020-05-07 12:19:01 -0700[diff] [blame]1535 "src/math/roundne-sse41.c",
Marat Dukhanc9852ba2020-05-13 17:21:29 -0700[diff] [blame]1536 "src/math/roundd-sse41.c",
1537 "src/math/roundu-sse41.c",
Marat Dukhan2dbb9442020-05-12 20:43:43 -0700[diff] [blame]1538 "src/math/roundz-sse41.c",
Marat Dukhanfe7acb62020-03-09 19:30:05 -0700[diff] [blame]1539 "src/requantization/precise-sse4.c",
1540 "src/requantization/q31-sse4.c",
1541 "src/requantization/gemmlowp-sse4.c",
Marat Dukhan69c3f2c2019-11-06 12:30:01 -0800[diff] [blame]1542]
1543
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1544AVX_UKERNELS = [
Marat Dukhan5c5fa962020-03-10 18:38:33 -0700[diff] [blame]1545 "src/f32-clamp/gen/avx-x8.c",
1546 "src/f32-clamp/gen/avx-x16.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]1547 "src/f32-dwconv/gen/up16x4-minmax-avx-acc2.c",
1548 "src/f32-dwconv/gen/up16x4-minmax-avx.c",
1549 "src/f32-dwconv/gen/up8x4-minmax-avx-acc2.c",
1550 "src/f32-dwconv/gen/up8x4-minmax-avx.c",
1551 "src/f32-dwconv/gen/up16x9-minmax-avx-acc2.c",
1552 "src/f32-dwconv/gen/up16x9-minmax-avx.c",
1553 "src/f32-dwconv/gen/up8x9-minmax-avx-acc2.c",
1554 "src/f32-dwconv/gen/up8x9-minmax-avx.c",
1555 "src/f32-dwconv/gen/up16x25-minmax-avx-acc2.c",
1556 "src/f32-dwconv/gen/up16x25-minmax-avx.c",
1557 "src/f32-dwconv/gen/up8x25-minmax-avx-acc2.c",
1558 "src/f32-dwconv/gen/up8x25-minmax-avx.c",
1559 "src/f32-gemm/gen/1x8-minmax-avx-broadcast.c",
1560 "src/f32-gemm/gen/4x8-minmax-avx-broadcast.c",
1561 "src/f32-gemm/gen/5x8-minmax-avx-broadcast.c",
1562 "src/f32-gemm/gen/6x8-minmax-avx-broadcast.c",
1563 "src/f32-gemm/gen/7x8-minmax-avx-broadcast.c",
1564 "src/f32-gemm/gen/1x16-minmax-avx-broadcast.c",
1565 "src/f32-gemm/gen/3x16-minmax-avx-broadcast.c",
1566 "src/f32-gemm/gen/4x16-minmax-avx-broadcast.c",
1567 "src/f32-gemm/gen/5x16-minmax-avx-broadcast.c",
1568 "src/f32-gemm/gen-inc/1x8inc-minmax-avx-broadcast.c",
1569 "src/f32-gemm/gen-inc/4x8inc-minmax-avx-broadcast.c",
1570 "src/f32-gemm/gen-inc/5x8inc-minmax-avx-broadcast.c",
1571 "src/f32-gemm/gen-inc/6x8inc-minmax-avx-broadcast.c",
1572 "src/f32-gemm/gen-inc/7x8inc-minmax-avx-broadcast.c",
1573 "src/f32-gemm/gen-inc/1x16inc-minmax-avx-broadcast.c",
1574 "src/f32-gemm/gen-inc/3x16inc-minmax-avx-broadcast.c",
1575 "src/f32-gemm/gen-inc/4x16inc-minmax-avx-broadcast.c",
1576 "src/f32-gemm/gen-inc/5x16inc-minmax-avx-broadcast.c",
Marat Dukhan662faa02019-12-09 22:48:16 -0800[diff] [blame]1577 "src/f32-hswish/gen/avx-x8.c",
1578 "src/f32-hswish/gen/avx-x16.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]1579 "src/f32-igemm/gen/1x8-minmax-avx-broadcast.c",
1580 "src/f32-igemm/gen/4x8-minmax-avx-broadcast.c",
1581 "src/f32-igemm/gen/5x8-minmax-avx-broadcast.c",
1582 "src/f32-igemm/gen/6x8-minmax-avx-broadcast.c",
1583 "src/f32-igemm/gen/7x8-minmax-avx-broadcast.c",
1584 "src/f32-igemm/gen/1x16-minmax-avx-broadcast.c",
1585 "src/f32-igemm/gen/3x16-minmax-avx-broadcast.c",
1586 "src/f32-igemm/gen/4x16-minmax-avx-broadcast.c",
1587 "src/f32-igemm/gen/5x16-minmax-avx-broadcast.c",
Marat Dukhan90eca0a2020-03-11 00:52:23 -0700[diff] [blame]1588 "src/f32-prelu/gen/avx-2x8.c",
1589 "src/f32-prelu/gen/avx-2x16.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1590 "src/f32-rmax/avx.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]1591 "src/f32-vbinary/gen/vadd-minmax-avx-x8.c",
1592 "src/f32-vbinary/gen/vadd-minmax-avx-x16.c",
1593 "src/f32-vbinary/gen/vaddc-minmax-avx-x8.c",
1594 "src/f32-vbinary/gen/vaddc-minmax-avx-x16.c",
1595 "src/f32-vbinary/gen/vdiv-minmax-avx-x8.c",
1596 "src/f32-vbinary/gen/vdiv-minmax-avx-x16.c",
1597 "src/f32-vbinary/gen/vdivc-minmax-avx-x8.c",
1598 "src/f32-vbinary/gen/vdivc-minmax-avx-x16.c",
Marat Dukhan9a88efe2019-12-10 15:54:24 -0800[diff] [blame]1599 "src/f32-vbinary/gen/vmax-avx-x8.c",
1600 "src/f32-vbinary/gen/vmax-avx-x16.c",
1601 "src/f32-vbinary/gen/vmaxc-avx-x8.c",
1602 "src/f32-vbinary/gen/vmaxc-avx-x16.c",
1603 "src/f32-vbinary/gen/vmin-avx-x8.c",
1604 "src/f32-vbinary/gen/vmin-avx-x16.c",
1605 "src/f32-vbinary/gen/vminc-avx-x8.c",
1606 "src/f32-vbinary/gen/vminc-avx-x16.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]1607 "src/f32-vbinary/gen/vmul-minmax-avx-x8.c",
1608 "src/f32-vbinary/gen/vmul-minmax-avx-x16.c",
1609 "src/f32-vbinary/gen/vmulc-minmax-avx-x8.c",
1610 "src/f32-vbinary/gen/vmulc-minmax-avx-x16.c",
1611 "src/f32-vbinary/gen/vrdivc-minmax-avx-x8.c",
1612 "src/f32-vbinary/gen/vrdivc-minmax-avx-x16.c",
Marat Dukhan13bafb02020-06-05 00:43:11 -0700[diff] [blame]1613 "src/f32-vbinary/gen/vrsqrdiffc-avx-x8.c",
1614 "src/f32-vbinary/gen/vrsqrdiffc-avx-x16.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]1615 "src/f32-vbinary/gen/vrsubc-minmax-avx-x8.c",
1616 "src/f32-vbinary/gen/vrsubc-minmax-avx-x16.c",
Marat Dukhan13bafb02020-06-05 00:43:11 -0700[diff] [blame]1617 "src/f32-vbinary/gen/vsqrdiff-avx-x8.c",
1618 "src/f32-vbinary/gen/vsqrdiff-avx-x16.c",
1619 "src/f32-vbinary/gen/vsqrdiffc-avx-x8.c",
1620 "src/f32-vbinary/gen/vsqrdiffc-avx-x16.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]1621 "src/f32-vbinary/gen/vsub-minmax-avx-x8.c",
1622 "src/f32-vbinary/gen/vsub-minmax-avx-x16.c",
1623 "src/f32-vbinary/gen/vsubc-minmax-avx-x8.c",
1624 "src/f32-vbinary/gen/vsubc-minmax-avx-x16.c",
Marat Dukhan8cc7efe2020-06-10 16:24:27 -0700[diff] [blame]1625 "src/f32-vlrelu/gen/avx-x8.c",
1626 "src/f32-vlrelu/gen/avx-x16.c",
Marat Dukhan05ac8e32019-10-21 15:39:33 -0700[diff] [blame]1627 "src/f32-vscale/avx-unroll32.c",
Marat Dukhaneecf8fd2020-06-09 08:59:37 -0700[diff] [blame]1628 "src/f32-vrnd/gen/vrndne-avx-x8.c",
1629 "src/f32-vrnd/gen/vrndne-avx-x16.c",
1630 "src/f32-vrnd/gen/vrndz-avx-x8.c",
1631 "src/f32-vrnd/gen/vrndz-avx-x16.c",
1632 "src/f32-vrnd/gen/vrndu-avx-x8.c",
1633 "src/f32-vrnd/gen/vrndu-avx-x16.c",
1634 "src/f32-vrnd/gen/vrndd-avx-x8.c",
1635 "src/f32-vrnd/gen/vrndd-avx-x16.c",
Marat Dukhan5020b962020-06-08 13:30:10 -0700[diff] [blame]1636 "src/f32-vunary/gen/vabs-avx-x8.c",
1637 "src/f32-vunary/gen/vabs-avx-x16.c",
1638 "src/f32-vunary/gen/vneg-avx-x8.c",
1639 "src/f32-vunary/gen/vneg-avx-x16.c",
1640 "src/f32-vunary/gen/vsqr-avx-x8.c",
1641 "src/f32-vunary/gen/vsqr-avx-x16.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1642]
1643
Marat Dukhanfda12b82019-11-21 12:27:59 -0800[diff] [blame]1644FMA3_UKERNELS = [
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]1645 "src/f32-dwconv/gen/up16x4-minmax-fma3-acc2.c",
1646 "src/f32-dwconv/gen/up16x4-minmax-fma3.c",
1647 "src/f32-dwconv/gen/up8x4-minmax-fma3-acc2.c",
1648 "src/f32-dwconv/gen/up8x4-minmax-fma3.c",
1649 "src/f32-dwconv/gen/up16x9-minmax-fma3-acc2.c",
1650 "src/f32-dwconv/gen/up16x9-minmax-fma3.c",
1651 "src/f32-dwconv/gen/up8x9-minmax-fma3-acc2.c",
1652 "src/f32-dwconv/gen/up8x9-minmax-fma3.c",
1653 "src/f32-dwconv/gen/up16x25-minmax-fma3-acc2.c",
1654 "src/f32-dwconv/gen/up16x25-minmax-fma3.c",
1655 "src/f32-dwconv/gen/up8x25-minmax-fma3-acc2.c",
1656 "src/f32-dwconv/gen/up8x25-minmax-fma3.c",
1657 "src/f32-gemm/gen/1x8-minmax-fma3-broadcast.c",
1658 "src/f32-gemm/gen/4x8-minmax-fma3-broadcast.c",
1659 "src/f32-gemm/gen/5x8-minmax-fma3-broadcast.c",
1660 "src/f32-gemm/gen/6x8-minmax-fma3-broadcast.c",
1661 "src/f32-gemm/gen/7x8-minmax-fma3-broadcast.c",
1662 "src/f32-gemm/gen/8x8-minmax-fma3-broadcast.c",
1663 "src/f32-gemm/gen/1x16-minmax-fma3-broadcast.c",
1664 "src/f32-gemm/gen/3x16-minmax-fma3-broadcast.c",
1665 "src/f32-gemm/gen/4x16-minmax-fma3-broadcast.c",
1666 "src/f32-gemm/gen/5x16-minmax-fma3-broadcast.c",
1667 "src/f32-gemm/gen/1x16s4-minmax-fma3-broadcast.c",
1668 "src/f32-gemm/gen/3x16s4-minmax-fma3-broadcast.c",
1669 "src/f32-gemm/gen/4x16s4-minmax-fma3-broadcast.c",
1670 "src/f32-gemm/gen/5x16s4-minmax-fma3-broadcast.c",
1671 "src/f32-gemm/gen-inc/1x8inc-minmax-fma3-broadcast.c",
1672 "src/f32-gemm/gen-inc/4x8inc-minmax-fma3-broadcast.c",
1673 "src/f32-gemm/gen-inc/5x8inc-minmax-fma3-broadcast.c",
1674 "src/f32-gemm/gen-inc/6x8inc-minmax-fma3-broadcast.c",
1675 "src/f32-gemm/gen-inc/7x8inc-minmax-fma3-broadcast.c",
1676 "src/f32-gemm/gen-inc/8x8inc-minmax-fma3-broadcast.c",
1677 "src/f32-gemm/gen-inc/1x16inc-minmax-fma3-broadcast.c",
1678 "src/f32-gemm/gen-inc/3x16inc-minmax-fma3-broadcast.c",
1679 "src/f32-gemm/gen-inc/4x16inc-minmax-fma3-broadcast.c",
1680 "src/f32-gemm/gen-inc/5x16inc-minmax-fma3-broadcast.c",
1681 "src/f32-gemm/gen-inc/1x16s4inc-minmax-fma3-broadcast.c",
1682 "src/f32-gemm/gen-inc/3x16s4inc-minmax-fma3-broadcast.c",
1683 "src/f32-gemm/gen-inc/4x16s4inc-minmax-fma3-broadcast.c",
1684 "src/f32-gemm/gen-inc/5x16s4inc-minmax-fma3-broadcast.c",
Marat Dukhan662faa02019-12-09 22:48:16 -0800[diff] [blame]1685 "src/f32-hswish/gen/fma3-x8.c",
1686 "src/f32-hswish/gen/fma3-x16.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]1687 "src/f32-igemm/gen/1x8-minmax-fma3-broadcast.c",
1688 "src/f32-igemm/gen/4x8-minmax-fma3-broadcast.c",
1689 "src/f32-igemm/gen/5x8-minmax-fma3-broadcast.c",
1690 "src/f32-igemm/gen/6x8-minmax-fma3-broadcast.c",
1691 "src/f32-igemm/gen/7x8-minmax-fma3-broadcast.c",
1692 "src/f32-igemm/gen/8x8-minmax-fma3-broadcast.c",
1693 "src/f32-igemm/gen/1x16-minmax-fma3-broadcast.c",
1694 "src/f32-igemm/gen/3x16-minmax-fma3-broadcast.c",
1695 "src/f32-igemm/gen/4x16-minmax-fma3-broadcast.c",
1696 "src/f32-igemm/gen/5x16-minmax-fma3-broadcast.c",
1697 "src/f32-igemm/gen/1x16s4-minmax-fma3-broadcast.c",
1698 "src/f32-igemm/gen/3x16s4-minmax-fma3-broadcast.c",
1699 "src/f32-igemm/gen/4x16s4-minmax-fma3-broadcast.c",
1700 "src/f32-igemm/gen/5x16s4-minmax-fma3-broadcast.c",
Marat Dukhanfda12b82019-11-21 12:27:59 -0800[diff] [blame]1701]
1702
Marat Dukhan6adff4e2019-10-14 18:32:07 -0700[diff] [blame]1703AVX2_UKERNELS = [
Marat Dukhan4c4eb002019-12-08 21:27:49 -0800[diff] [blame]1704 "src/f32-raddexpminusmax/gen/avx2-p5-x64.c",
1705 "src/f32-raddexpminusmax/gen/avx2-p5-x64-acc2.c",
1706 "src/f32-raddexpminusmax/gen/avx2-p5-x64-acc4.c",
1707 "src/f32-raddexpminusmax/gen/avx2-p5-x72.c",
1708 "src/f32-raddexpminusmax/gen/avx2-p5-x72-acc3.c",
1709 "src/f32-raddexpminusmax/gen/avx2-p5-x80.c",
1710 "src/f32-raddexpminusmax/gen/avx2-p5-x80-acc2.c",
1711 "src/f32-raddexpminusmax/gen/avx2-p5-x80-acc5.c",
1712 "src/f32-raddexpminusmax/gen/avx2-p5-x96.c",
1713 "src/f32-raddexpminusmax/gen/avx2-p5-x96-acc2.c",
1714 "src/f32-raddexpminusmax/gen/avx2-p5-x96-acc3.c",
1715 "src/f32-raddexpminusmax/gen/avx2-p5-x96-acc6.c",
1716 "src/f32-raddextexp/gen/avx2-p5-x64.c",
1717 "src/f32-raddextexp/gen/avx2-p5-x64-acc2.c",
1718 "src/f32-raddextexp/gen/avx2-p5-x64-acc4.c",
1719 "src/f32-raddextexp/gen/avx2-p5-x72.c",
1720 "src/f32-raddextexp/gen/avx2-p5-x72-acc3.c",
1721 "src/f32-raddextexp/gen/avx2-p5-x80.c",
1722 "src/f32-raddextexp/gen/avx2-p5-x80-acc2.c",
1723 "src/f32-raddextexp/gen/avx2-p5-x80-acc5.c",
1724 "src/f32-raddextexp/gen/avx2-p5-x96.c",
1725 "src/f32-raddextexp/gen/avx2-p5-x96-acc2.c",
1726 "src/f32-raddextexp/gen/avx2-p5-x96-acc3.c",
1727 "src/f32-raddextexp/gen/avx2-p5-x96-acc6.c",
1728 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x64.c",
1729 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x64-acc2.c",
1730 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x64-acc4.c",
1731 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x72.c",
1732 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x72-acc3.c",
1733 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x80.c",
1734 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x80-acc2.c",
1735 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x80-acc5.c",
1736 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x96.c",
1737 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x96-acc2.c",
1738 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x96-acc3.c",
1739 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x96-acc6.c",
Marat Dukhanfa0a4322020-01-06 16:14:29 -0800[diff] [blame]1740 "src/f32-sigmoid/gen/avx2-rr1-p5-div-x8.c",
1741 "src/f32-sigmoid/gen/avx2-rr1-p5-div-x16.c",
1742 "src/f32-sigmoid/gen/avx2-rr1-p5-div-x24.c",
1743 "src/f32-sigmoid/gen/avx2-rr1-p5-div-x32.c",
1744 "src/f32-sigmoid/gen/avx2-rr1-p5-div-x40.c",
1745 "src/f32-sigmoid/gen/avx2-rr1-p5-div-x48.c",
1746 "src/f32-sigmoid/gen/avx2-rr1-p5-div-x56.c",
1747 "src/f32-sigmoid/gen/avx2-rr1-p5-div-x64.c",
1748 "src/f32-sigmoid/gen/avx2-rr1-p5-div-x72.c",
1749 "src/f32-sigmoid/gen/avx2-rr1-p5-div-x80.c",
1750 "src/f32-sigmoid/gen/avx2-rr1-p5-nr1fma-x8.c",
1751 "src/f32-sigmoid/gen/avx2-rr1-p5-nr1fma-x16.c",
1752 "src/f32-sigmoid/gen/avx2-rr1-p5-nr1fma-x24.c",
1753 "src/f32-sigmoid/gen/avx2-rr1-p5-nr1fma-x32.c",
1754 "src/f32-sigmoid/gen/avx2-rr1-p5-nr1fma-x40.c",
1755 "src/f32-sigmoid/gen/avx2-rr1-p5-nr1fma-x48.c",
1756 "src/f32-sigmoid/gen/avx2-rr1-p5-nr1fma-x56.c",
1757 "src/f32-sigmoid/gen/avx2-rr1-p5-nr1fma-x64.c",
1758 "src/f32-sigmoid/gen/avx2-rr1-p5-nr1fma-x72.c",
1759 "src/f32-sigmoid/gen/avx2-rr1-p5-nr1fma-x80.c",
1760 "src/f32-sigmoid/gen/avx2-rr1-p5-nr2fma-x8.c",
1761 "src/f32-sigmoid/gen/avx2-rr1-p5-nr2fma-x16.c",
1762 "src/f32-sigmoid/gen/avx2-rr1-p5-nr2fma-x24.c",
1763 "src/f32-sigmoid/gen/avx2-rr1-p5-nr2fma-x32.c",
1764 "src/f32-sigmoid/gen/avx2-rr1-p5-nr2fma-x40.c",
1765 "src/f32-sigmoid/gen/avx2-rr1-p5-nr2fma-x48.c",
1766 "src/f32-sigmoid/gen/avx2-rr1-p5-nr2fma-x56.c",
1767 "src/f32-sigmoid/gen/avx2-rr1-p5-nr2fma-x64.c",
1768 "src/f32-sigmoid/gen/avx2-rr1-p5-nr2fma-x72.c",
1769 "src/f32-sigmoid/gen/avx2-rr1-p5-nr2fma-x80.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -0800[diff] [blame]1770 "src/f32-vscaleexpminusmax/gen/avx2-p5-x8.c",
1771 "src/f32-vscaleexpminusmax/gen/avx2-p5-x16.c",
1772 "src/f32-vscaleexpminusmax/gen/avx2-p5-x24.c",
1773 "src/f32-vscaleexpminusmax/gen/avx2-p5-x32.c",
1774 "src/f32-vscaleexpminusmax/gen/avx2-p5-x40.c",
1775 "src/f32-vscaleexpminusmax/gen/avx2-p5-x48.c",
1776 "src/f32-vscaleexpminusmax/gen/avx2-p5-x56.c",
1777 "src/f32-vscaleexpminusmax/gen/avx2-p5-x64.c",
1778 "src/f32-vscaleexpminusmax/gen/avx2-p5-x72.c",
1779 "src/f32-vscaleexpminusmax/gen/avx2-p5-x80.c",
1780 "src/f32-vscaleexpminusmax/gen/avx2-p5-x88.c",
1781 "src/f32-vscaleexpminusmax/gen/avx2-p5-x96.c",
1782 "src/f32-vscaleextexp/gen/avx2-p5-x8.c",
1783 "src/f32-vscaleextexp/gen/avx2-p5-x16.c",
1784 "src/f32-vscaleextexp/gen/avx2-p5-x24.c",
1785 "src/f32-vscaleextexp/gen/avx2-p5-x32.c",
1786 "src/f32-vscaleextexp/gen/avx2-p5-x40.c",
1787 "src/f32-vscaleextexp/gen/avx2-p5-x48.c",
1788 "src/f32-vscaleextexp/gen/avx2-p5-x56.c",
1789 "src/f32-vscaleextexp/gen/avx2-p5-x64.c",
1790 "src/f32-vscaleextexp/gen/avx2-p5-x72.c",
1791 "src/f32-vscaleextexp/gen/avx2-p5-x80.c",
1792 "src/f32-vscaleextexp/gen/avx2-p5-x88.c",
1793 "src/f32-vscaleextexp/gen/avx2-p5-x96.c",
Marat Dukhan6adff4e2019-10-14 18:32:07 -0700[diff] [blame]1794 "src/math/exp-avx2-p5.c",
1795 "src/math/exp-avx2-perm-p3.c",
1796 "src/math/exp-avx2-perm-p4.c",
Marat Dukhan515c9772019-10-17 18:07:57 -0700[diff] [blame]1797 "src/math/expminus-avx2-p5.c",
Marat Dukhan98ba4412019-10-23 02:14:28 -0700[diff] [blame]1798 "src/math/extexp-avx2-p5.c",
Marat Dukhan72416002020-01-05 21:53:19 -0800[diff] [blame]1799 "src/math/sigmoid-avx2-rr2-p5-div.c",
1800 "src/math/sigmoid-avx2-rr1-p5-div.c",
1801 "src/math/sigmoid-avx2-rr2-p5-nr2fma.c",
1802 "src/math/sigmoid-avx2-rr1-p5-nr2fma.c",
1803 "src/math/sigmoid-avx2-rr2-p5-nr1fma.c",
1804 "src/math/sigmoid-avx2-rr1-p5-nr1fma.c",
Marat Dukhan6adff4e2019-10-14 18:32:07 -0700[diff] [blame]1805]
1806
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1807AVX512F_UKERNELS = [
Marat Dukhan5c5fa962020-03-10 18:38:33 -0700[diff] [blame]1808 "src/f32-clamp/gen/avx512f-x16.c",
1809 "src/f32-clamp/gen/avx512f-x32.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]1810 "src/f32-dwconv/gen/up32x4-minmax-avx512f-acc2.c",
1811 "src/f32-dwconv/gen/up32x4-minmax-avx512f.c",
1812 "src/f32-dwconv/gen/up16x4-minmax-avx512f-acc2.c",
1813 "src/f32-dwconv/gen/up16x4-minmax-avx512f.c",
1814 "src/f32-dwconv/gen/up32x9-minmax-avx512f-acc2.c",
1815 "src/f32-dwconv/gen/up32x9-minmax-avx512f.c",
1816 "src/f32-dwconv/gen/up16x9-minmax-avx512f-acc2.c",
1817 "src/f32-dwconv/gen/up16x9-minmax-avx512f.c",
1818 "src/f32-dwconv/gen/up32x25-minmax-avx512f-acc2.c",
1819 "src/f32-dwconv/gen/up32x25-minmax-avx512f.c",
1820 "src/f32-dwconv/gen/up16x25-minmax-avx512f-acc2.c",
1821 "src/f32-dwconv/gen/up16x25-minmax-avx512f.c",
1822 "src/f32-gemm/gen/1x16-minmax-avx512f-broadcast.c",
1823 "src/f32-gemm/gen/4x16-minmax-avx512f-broadcast.c",
1824 "src/f32-gemm/gen/5x16-minmax-avx512f-broadcast.c",
1825 "src/f32-gemm/gen/6x16-minmax-avx512f-broadcast.c",
1826 "src/f32-gemm/gen/7x16-minmax-avx512f-broadcast.c",
1827 "src/f32-gemm/gen/8x16-minmax-avx512f-broadcast.c",
1828 "src/f32-gemm/gen-inc/1x16inc-minmax-avx512f-broadcast.c",
1829 "src/f32-gemm/gen-inc/4x16inc-minmax-avx512f-broadcast.c",
1830 "src/f32-gemm/gen-inc/5x16inc-minmax-avx512f-broadcast.c",
1831 "src/f32-gemm/gen-inc/6x16inc-minmax-avx512f-broadcast.c",
1832 "src/f32-gemm/gen-inc/7x16inc-minmax-avx512f-broadcast.c",
1833 "src/f32-gemm/gen-inc/8x16inc-minmax-avx512f-broadcast.c",
Marat Dukhan662faa02019-12-09 22:48:16 -0800[diff] [blame]1834 "src/f32-hswish/gen/avx512f-x16.c",
1835 "src/f32-hswish/gen/avx512f-x32.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]1836 "src/f32-igemm/gen/1x16-minmax-avx512f-broadcast.c",
1837 "src/f32-igemm/gen/4x16-minmax-avx512f-broadcast.c",
1838 "src/f32-igemm/gen/5x16-minmax-avx512f-broadcast.c",
1839 "src/f32-igemm/gen/6x16-minmax-avx512f-broadcast.c",
1840 "src/f32-igemm/gen/7x16-minmax-avx512f-broadcast.c",
1841 "src/f32-igemm/gen/8x16-minmax-avx512f-broadcast.c",
Marat Dukhan90eca0a2020-03-11 00:52:23 -0700[diff] [blame]1842 "src/f32-prelu/gen/avx512f-2x16.c",
1843 "src/f32-prelu/gen/avx512f-2x32.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -0800[diff] [blame]1844 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x128.c",
1845 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x128-acc2.c",
1846 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x128-acc4.c",
1847 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x144.c",
1848 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x144-acc3.c",
1849 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x160.c",
1850 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x160-acc2.c",
1851 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x160-acc5.c",
1852 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x192.c",
1853 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x192-acc2.c",
1854 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x192-acc3.c",
1855 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x192-acc6.c",
1856 "src/f32-raddextexp/gen/avx512f-p5-scalef-x128.c",
1857 "src/f32-raddextexp/gen/avx512f-p5-scalef-x128-acc2.c",
1858 "src/f32-raddextexp/gen/avx512f-p5-scalef-x128-acc4.c",
1859 "src/f32-raddextexp/gen/avx512f-p5-scalef-x144.c",
1860 "src/f32-raddextexp/gen/avx512f-p5-scalef-x144-acc3.c",
1861 "src/f32-raddextexp/gen/avx512f-p5-scalef-x160.c",
1862 "src/f32-raddextexp/gen/avx512f-p5-scalef-x160-acc2.c",
1863 "src/f32-raddextexp/gen/avx512f-p5-scalef-x160-acc5.c",
1864 "src/f32-raddextexp/gen/avx512f-p5-scalef-x192.c",
1865 "src/f32-raddextexp/gen/avx512f-p5-scalef-x192-acc2.c",
1866 "src/f32-raddextexp/gen/avx512f-p5-scalef-x192-acc3.c",
1867 "src/f32-raddextexp/gen/avx512f-p5-scalef-x192-acc6.c",
1868 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x128.c",
1869 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x128-acc2.c",
1870 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x128-acc4.c",
1871 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x144.c",
1872 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x144-acc3.c",
1873 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x160.c",
1874 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x160-acc2.c",
1875 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x160-acc5.c",
1876 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x192.c",
1877 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x192-acc2.c",
1878 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x192-acc3.c",
1879 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x192-acc6.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1880 "src/f32-rmax/avx512f.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]1881 "src/f32-vbinary/gen/vadd-minmax-avx512f-x16.c",
1882 "src/f32-vbinary/gen/vadd-minmax-avx512f-x32.c",
1883 "src/f32-vbinary/gen/vaddc-minmax-avx512f-x16.c",
1884 "src/f32-vbinary/gen/vaddc-minmax-avx512f-x32.c",
1885 "src/f32-vbinary/gen/vdiv-minmax-avx512f-x16.c",
1886 "src/f32-vbinary/gen/vdiv-minmax-avx512f-x32.c",
1887 "src/f32-vbinary/gen/vdivc-minmax-avx512f-x16.c",
1888 "src/f32-vbinary/gen/vdivc-minmax-avx512f-x32.c",
Marat Dukhan9a88efe2019-12-10 15:54:24 -0800[diff] [blame]1889 "src/f32-vbinary/gen/vmax-avx512f-x16.c",
1890 "src/f32-vbinary/gen/vmax-avx512f-x32.c",
1891 "src/f32-vbinary/gen/vmaxc-avx512f-x16.c",
1892 "src/f32-vbinary/gen/vmaxc-avx512f-x32.c",
1893 "src/f32-vbinary/gen/vmin-avx512f-x16.c",
1894 "src/f32-vbinary/gen/vmin-avx512f-x32.c",
1895 "src/f32-vbinary/gen/vminc-avx512f-x16.c",
1896 "src/f32-vbinary/gen/vminc-avx512f-x32.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]1897 "src/f32-vbinary/gen/vmul-minmax-avx512f-x16.c",
1898 "src/f32-vbinary/gen/vmul-minmax-avx512f-x32.c",
1899 "src/f32-vbinary/gen/vmulc-minmax-avx512f-x16.c",
1900 "src/f32-vbinary/gen/vmulc-minmax-avx512f-x32.c",
1901 "src/f32-vbinary/gen/vrdivc-minmax-avx512f-x16.c",
1902 "src/f32-vbinary/gen/vrdivc-minmax-avx512f-x32.c",
Marat Dukhan13bafb02020-06-05 00:43:11 -0700[diff] [blame]1903 "src/f32-vbinary/gen/vrsqrdiffc-avx512f-x16.c",
1904 "src/f32-vbinary/gen/vrsqrdiffc-avx512f-x32.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]1905 "src/f32-vbinary/gen/vrsubc-minmax-avx512f-x16.c",
1906 "src/f32-vbinary/gen/vrsubc-minmax-avx512f-x32.c",
Marat Dukhan13bafb02020-06-05 00:43:11 -0700[diff] [blame]1907 "src/f32-vbinary/gen/vsqrdiff-avx512f-x16.c",
1908 "src/f32-vbinary/gen/vsqrdiff-avx512f-x32.c",
1909 "src/f32-vbinary/gen/vsqrdiffc-avx512f-x16.c",
1910 "src/f32-vbinary/gen/vsqrdiffc-avx512f-x32.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]1911 "src/f32-vbinary/gen/vsub-minmax-avx512f-x16.c",
1912 "src/f32-vbinary/gen/vsub-minmax-avx512f-x32.c",
1913 "src/f32-vbinary/gen/vsubc-minmax-avx512f-x16.c",
1914 "src/f32-vbinary/gen/vsubc-minmax-avx512f-x32.c",
Marat Dukhan8cc7efe2020-06-10 16:24:27 -0700[diff] [blame]1915 "src/f32-vlrelu/gen/avx512f-x16.c",
1916 "src/f32-vlrelu/gen/avx512f-x32.c",
Marat Dukhan05ac8e32019-10-21 15:39:33 -0700[diff] [blame]1917 "src/f32-vscale/avx512f-unroll64.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -0800[diff] [blame]1918 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x16.c",
1919 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x32.c",
1920 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x48.c",
1921 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x64.c",
1922 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x80.c",
1923 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x96.c",
1924 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x112.c",
1925 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x128.c",
1926 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x144.c",
1927 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x160.c",
1928 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x176.c",
1929 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x192.c",
1930 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x16.c",
1931 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x32.c",
1932 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x48.c",
1933 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x64.c",
1934 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x80.c",
1935 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x96.c",
1936 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x112.c",
1937 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x128.c",
1938 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x144.c",
1939 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x160.c",
1940 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x176.c",
1941 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x192.c",
Marat Dukhaneecf8fd2020-06-09 08:59:37 -0700[diff] [blame]1942 "src/f32-vrnd/gen/vrndne-avx512f-x16.c",
1943 "src/f32-vrnd/gen/vrndne-avx512f-x32.c",
1944 "src/f32-vrnd/gen/vrndz-avx512f-x16.c",
1945 "src/f32-vrnd/gen/vrndz-avx512f-x32.c",
1946 "src/f32-vrnd/gen/vrndu-avx512f-x16.c",
1947 "src/f32-vrnd/gen/vrndu-avx512f-x32.c",
1948 "src/f32-vrnd/gen/vrndd-avx512f-x16.c",
1949 "src/f32-vrnd/gen/vrndd-avx512f-x32.c",
Marat Dukhan5020b962020-06-08 13:30:10 -0700[diff] [blame]1950 "src/f32-vunary/gen/vabs-avx512f-x16.c",
1951 "src/f32-vunary/gen/vabs-avx512f-x32.c",
1952 "src/f32-vunary/gen/vneg-avx512f-x16.c",
1953 "src/f32-vunary/gen/vneg-avx512f-x32.c",
1954 "src/f32-vunary/gen/vsqr-avx512f-x16.c",
1955 "src/f32-vunary/gen/vsqr-avx512f-x32.c",
Marat Dukhan6adff4e2019-10-14 18:32:07 -0700[diff] [blame]1956 "src/math/exp-avx512f-p5-scalef.c",
1957 "src/math/exp-avx512f-p5.c",
1958 "src/math/exp-avx512f-perm-p3.c",
Marat Dukhanfeb49232019-10-28 11:03:31 -0700[diff] [blame]1959 "src/math/exp-avx512f-perm2-p2.c",
Marat Dukhan98ba4412019-10-23 02:14:28 -0700[diff] [blame]1960 "src/math/extexp-avx512f-p5.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1961]
1962
1963AARCH32_ASM_UKERNELS = [
Marat Dukhan32f93812020-05-17 20:31:21 -0700[diff] [blame]1964 "src/f32-gemm/4x4-aarch32-vfp-ld64.S",
Marat Dukhan3b98f6b2020-05-17 10:09:22 -0700[diff] [blame]1965 "src/f32-gemm/4x4-minmax-aarch32-vfp-ld64.S",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]1966 "src/f32-gemm/4x8-minmax-aarch32-neon-cortex-a53.S",
1967 "src/f32-gemm/4x8-minmax-aarch32-neon-cortex-a55.S",
1968 "src/f32-gemm/gen/4x8-minmax-aarch32-neon-cortex-a75.S",
1969 "src/f32-gemm/gen/4x8-minmax-aarch32-neon-pld-cortex-a75.S",
Frank Barchard569561d2020-06-17 13:11:12 -0700[diff] [blame]1970 "src/f32-gemm/gen/4x8-minmax-aarch32-neon-ld64.S",
1971 "src/f32-gemm/gen/4x8-minmax-aarch32-neon-pld-ld64.S",
1972 "src/f32-igemm/gen/4x8-minmax-aarch32-neon-ld64.S",
1973 "src/f32-igemm/gen/4x8-minmax-aarch32-neon-pld-ld64.S",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]1974 "src/f32-igemm/gen/4x8-minmax-aarch32-neon-cortex-a75.S",
1975 "src/f32-igemm/gen/4x8-minmax-aarch32-neon-pld-cortex-a75.S",
1976 "src/f32-igemm/4x8-minmax-aarch32-neon-cortex-a53.S",
1977 "src/f32-igemm/4x8-minmax-aarch32-neon-cortex-a55.S",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1978]
1979
1980AARCH64_ASM_UKERNELS = [
Frank Barchard36b76b62020-04-10 12:39:17 -0700[diff] [blame]1981 "src/f16-gemm/gen/1x16-minmax-aarch64-neonfp16arith-ld32.S",
Frank Barchard683f5592020-04-10 00:48:26 -0700[diff] [blame]1982 "src/f16-gemm/gen/4x16-minmax-aarch64-neonfp16arith-ld32.S",
1983 "src/f16-gemm/gen/6x16-minmax-aarch64-neonfp16arith-ld32.S",
Frank Barchard36b76b62020-04-10 12:39:17 -0700[diff] [blame]1984 "src/f16-gemm/gen-inc/1x16inc-minmax-aarch64-neonfp16arith-ld32.S",
Frank Barchard683f5592020-04-10 00:48:26 -0700[diff] [blame]1985 "src/f16-gemm/gen-inc/4x16inc-minmax-aarch64-neonfp16arith-ld32.S",
1986 "src/f16-gemm/gen-inc/6x16inc-minmax-aarch64-neonfp16arith-ld32.S",
Frank Barchardbddfbcd2020-04-15 12:32:41 -0700[diff] [blame]1987 "src/f16-gemm/gen/1x8-minmax-aarch64-neonfp16arith-ld64.S",
1988 "src/f16-gemm/gen/4x8-minmax-aarch64-neonfp16arith-ld64.S",
1989 "src/f16-gemm/gen/6x8-minmax-aarch64-neonfp16arith-ld64.S",
Frank Barchard3b8e5662020-04-20 12:12:53 -0700[diff] [blame]1990 "src/f16-gemm/gen/8x8-minmax-aarch64-neonfp16arith-ld64.S",
Frank Barchardbddfbcd2020-04-15 12:32:41 -0700[diff] [blame]1991 "src/f16-gemm/gen-inc/1x8inc-minmax-aarch64-neonfp16arith-ld64.S",
1992 "src/f16-gemm/gen-inc/4x8inc-minmax-aarch64-neonfp16arith-ld64.S",
1993 "src/f16-gemm/gen-inc/6x8inc-minmax-aarch64-neonfp16arith-ld64.S",
Frank Barchard3b8e5662020-04-20 12:12:53 -0700[diff] [blame]1994 "src/f16-gemm/gen-inc/8x8inc-minmax-aarch64-neonfp16arith-ld64.S",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]1995 "src/f32-dwconv/up4x9-minmax-aarch64-neonfma-cortex-a55.S",
1996 "src/f32-dwconv/up4x9-minmax-aarch64-neonfma.S",
Frank Barchard3cb54f92020-04-10 10:46:08 -0700[diff] [blame]1997 "src/f32-gemm/gen/1x8-minmax-aarch64-neonfma-ld64.S",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]1998 "src/f32-gemm/gen/1x12-minmax-aarch64-neonfma-cortex-a53.S",
1999 "src/f32-gemm/gen/1x8-minmax-aarch64-neonfma-cortex-a53.S",
2000 "src/f32-gemm/gen/1x8-minmax-aarch64-neonfma-cortex-a57.S",
2001 "src/f32-gemm/gen/1x8-minmax-aarch64-neonfma-cortex-a75.S",
2002 "src/f32-gemm/gen/4x12-minmax-aarch64-neonfma-cortex-a53.S",
2003 "src/f32-gemm/gen/4x8-minmax-aarch64-neonfma-cortex-a53.S",
2004 "src/f32-gemm/gen/4x8-minmax-aarch64-neonfma-cortex-a55.S",
2005 "src/f32-gemm/gen/4x8-minmax-aarch64-neonfma-cortex-a57.S",
2006 "src/f32-gemm/gen/4x8-minmax-aarch64-neonfma-cortex-a75.S",
2007 "src/f32-gemm/gen/4x8-minmax-aarch64-neonfma-ld128.S",
2008 "src/f32-gemm/gen/4x8-minmax-aarch64-neonfma-ld64.S",
2009 "src/f32-gemm/gen/5x8-minmax-aarch64-neonfma-cortex-a57.S",
2010 "src/f32-gemm/gen/5x8-minmax-aarch64-neonfma-cortex-a75.S",
2011 "src/f32-gemm/gen/6x8-minmax-aarch64-neonfma-cortex-a53.S",
2012 "src/f32-gemm/gen/6x8-minmax-aarch64-neonfma-cortex-a55.S",
2013 "src/f32-gemm/gen/6x8-minmax-aarch64-neonfma-cortex-a73.S",
2014 "src/f32-gemm/gen/6x8-minmax-aarch64-neonfma-cortex-a57.S",
2015 "src/f32-gemm/gen/6x8-minmax-aarch64-neonfma-cortex-a75.S",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]2016 "src/f32-gemm/gen/6x8-minmax-aarch64-neonfma-ld128.S",
2017 "src/f32-gemm/gen/6x8-minmax-aarch64-neonfma-ld64.S",
Frank Barchard3cb54f92020-04-10 10:46:08 -0700[diff] [blame]2018 "src/f32-gemm/gen-inc/1x8inc-minmax-aarch64-neonfma-ld64.S",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]2019 "src/f32-gemm/gen-inc/1x12inc-minmax-aarch64-neonfma-cortex-a53.S",
2020 "src/f32-gemm/gen-inc/1x8inc-minmax-aarch64-neonfma-cortex-a53.S",
2021 "src/f32-gemm/gen-inc/1x8inc-minmax-aarch64-neonfma-cortex-a57.S",
2022 "src/f32-gemm/gen-inc/1x8inc-minmax-aarch64-neonfma-cortex-a75.S",
2023 "src/f32-gemm/gen-inc/4x12inc-minmax-aarch64-neonfma-cortex-a53.S",
2024 "src/f32-gemm/gen-inc/4x8inc-minmax-aarch64-neonfma-cortex-a53.S",
2025 "src/f32-gemm/gen-inc/4x8inc-minmax-aarch64-neonfma-cortex-a55.S",
2026 "src/f32-gemm/gen-inc/4x8inc-minmax-aarch64-neonfma-cortex-a57.S",
2027 "src/f32-gemm/gen-inc/4x8inc-minmax-aarch64-neonfma-cortex-a75.S",
2028 "src/f32-gemm/gen-inc/4x8inc-minmax-aarch64-neonfma-ld128.S",
2029 "src/f32-gemm/gen-inc/4x8inc-minmax-aarch64-neonfma-ld64.S",
2030 "src/f32-gemm/gen-inc/5x8inc-minmax-aarch64-neonfma-cortex-a57.S",
2031 "src/f32-gemm/gen-inc/5x8inc-minmax-aarch64-neonfma-cortex-a75.S",
2032 "src/f32-gemm/gen-inc/6x8inc-minmax-aarch64-neonfma-cortex-a53.S",
2033 "src/f32-gemm/gen-inc/6x8inc-minmax-aarch64-neonfma-cortex-a55.S",
2034 "src/f32-gemm/gen-inc/6x8inc-minmax-aarch64-neonfma-cortex-a73.S",
2035 "src/f32-gemm/gen-inc/6x8inc-minmax-aarch64-neonfma-cortex-a57.S",
2036 "src/f32-gemm/gen-inc/6x8inc-minmax-aarch64-neonfma-cortex-a75.S",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]2037 "src/f32-gemm/gen-inc/6x8inc-minmax-aarch64-neonfma-ld128.S",
2038 "src/f32-gemm/gen-inc/6x8inc-minmax-aarch64-neonfma-ld64.S",
2039 "src/f32-igemm/1x12-minmax-aarch64-neonfma-cortex-a53.S",
2040 "src/f32-igemm/1x8-minmax-aarch64-neonfma-cortex-a53.S",
2041 "src/f32-igemm/gen/1x8-minmax-aarch64-neonfma-cortex-a57.S",
2042 "src/f32-igemm/gen/1x8-minmax-aarch64-neonfma-cortex-a75.S",
2043 "src/f32-igemm/4x12-minmax-aarch64-neonfma-cortex-a53.S",
2044 "src/f32-igemm/4x8-minmax-aarch64-neonfma-cortex-a53.S",
2045 "src/f32-igemm/4x8-minmax-aarch64-neonfma-cortex-a55.S",
2046 "src/f32-igemm/gen/4x8-minmax-aarch64-neonfma-cortex-a57.S",
2047 "src/f32-igemm/gen/4x8-minmax-aarch64-neonfma-cortex-a75.S",
2048 "src/f32-igemm/gen/5x8-minmax-aarch64-neonfma-cortex-a57.S",
2049 "src/f32-igemm/gen/5x8-minmax-aarch64-neonfma-cortex-a75.S",
2050 "src/f32-igemm/6x8-minmax-aarch64-neonfma-cortex-a53.S",
2051 "src/f32-igemm/6x8-minmax-aarch64-neonfma-cortex-a55.S",
2052 "src/f32-igemm/6x8-minmax-aarch64-neonfma-cortex-a73.S",
2053 "src/f32-igemm/gen/6x8-minmax-aarch64-neonfma-cortex-a57.S",
2054 "src/f32-igemm/gen/6x8-minmax-aarch64-neonfma-cortex-a75.S",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2055]
2056
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]2057INTERNAL_MICROKERNEL_HDRS = [
Marat Dukhanfe7acb62020-03-09 19:30:05 -0700[diff] [blame]2058 "src/requantization/gemmlowp-requantization.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2059 "src/xnnpack/argmaxpool.h",
2060 "src/xnnpack/avgpool.h",
2061 "src/xnnpack/clamp.h",
2062 "src/xnnpack/common.h",
2063 "src/xnnpack/conv.h",
2064 "src/xnnpack/dwconv.h",
2065 "src/xnnpack/gavgpool.h",
2066 "src/xnnpack/gemm.h",
Marat Dukhan3bb3bfc2020-05-19 17:42:46 -0700[diff] [blame]2067 "src/xnnpack/fill.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2068 "src/xnnpack/hswish.h",
Marat Dukhan660fd192020-03-10 04:55:30 -0700[diff] [blame]2069 "src/xnnpack/ibilinear.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2070 "src/xnnpack/igemm.h",
Marat Dukhancfb31342019-12-05 10:42:57 -0800[diff] [blame]2071 "src/xnnpack/intrinsics-polyfill.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2072 "src/xnnpack/lut.h",
2073 "src/xnnpack/math.h",
2074 "src/xnnpack/maxpool.h",
Marat Dukhan04f03be2019-11-19 12:36:47 -0800[diff] [blame]2075 "src/xnnpack/memory.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2076 "src/xnnpack/packx.h",
2077 "src/xnnpack/pad.h",
2078 "src/xnnpack/params.h",
2079 "src/xnnpack/pavgpool.h",
2080 "src/xnnpack/ppmm.h",
2081 "src/xnnpack/prelu.h",
Marat Dukhan97579532019-10-18 16:40:39 -0700[diff] [blame]2082 "src/xnnpack/raddexpminusmax.h",
Marat Dukhan6f8d4d32019-10-25 17:07:09 -0700[diff] [blame]2083 "src/xnnpack/raddextexp.h",
Marat Dukhan97579532019-10-18 16:40:39 -0700[diff] [blame]2084 "src/xnnpack/raddstoreexpminusmax.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2085 "src/xnnpack/rmax.h",
2086 "src/xnnpack/scalar-utils.h",
2087 "src/xnnpack/spmm.h",
2088 "src/xnnpack/unpool.h",
2089 "src/xnnpack/vadd.h",
Marat Dukhan1e782c42019-11-21 17:02:40 -0800[diff] [blame]2090 "src/xnnpack/vbinary.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2091 "src/xnnpack/vmulcaddc.h",
Marat Dukhan05ac8e32019-10-21 15:39:33 -0700[diff] [blame]2092 "src/xnnpack/vscale.h",
Marat Dukhan97579532019-10-18 16:40:39 -0700[diff] [blame]2093 "src/xnnpack/vscaleexpminusmax.h",
Marat Dukhan6f8d4d32019-10-25 17:07:09 -0700[diff] [blame]2094 "src/xnnpack/vscaleextexp.h",
Marat Dukhan1e782c42019-11-21 17:02:40 -0800[diff] [blame]2095 "src/xnnpack/vunary.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2096 "src/xnnpack/zip.h",
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]2097]
2098
2099INTERNAL_HDRS = INTERNAL_MICROKERNEL_HDRS + [
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2100 "include/xnnpack.h",
2101 "src/xnnpack/allocator.h",
2102 "src/xnnpack/compute.h",
2103 "src/xnnpack/im2col.h",
2104 "src/xnnpack/indirection.h",
Marat Dukhan6adff4e2019-10-14 18:32:07 -0700[diff] [blame]2105 "src/xnnpack/math-stubs.h",
Chao Mei6ddfc602020-05-13 22:29:36 -0700[diff] [blame]2106 "src/xnnpack/memory-planner.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2107 "src/xnnpack/operator.h",
2108 "src/xnnpack/pack.h",
Marat Dukhaneeaa7bd2019-10-25 17:31:25 -0700[diff] [blame]2109 "src/xnnpack/params-init.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2110 "src/xnnpack/requantization-stubs.h",
Marat Dukhan6adff4e2019-10-14 18:32:07 -0700[diff] [blame]2111 "src/xnnpack/requantization.h",
Marat Dukhan1d75a542020-02-03 12:23:01 -0800[diff] [blame]2112 "src/xnnpack/subgraph.h",
Marat Dukhan6adff4e2019-10-14 18:32:07 -0700[diff] [blame]2113]
2114
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]2115ACCURACY_EVAL_HDRS = INTERNAL_MICROKERNEL_HDRS + [
Marat Dukhan6adff4e2019-10-14 18:32:07 -0700[diff] [blame]2116 "src/xnnpack/math-stubs.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2117]
2118
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]2119MICROKERNEL_BENCHMARK_HDRS = INTERNAL_MICROKERNEL_HDRS + [
Marat Dukhaneeaa7bd2019-10-25 17:31:25 -0700[diff] [blame]2120 "src/xnnpack/params-init.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2121 "include/xnnpack.h",
2122]
2123
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]2124MICROKERNEL_TEST_HDRS = INTERNAL_MICROKERNEL_HDRS + [
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2125 "src/xnnpack/isa-checks.h",
Marat Dukhaneeaa7bd2019-10-25 17:31:25 -0700[diff] [blame]2126 "src/xnnpack/params-init.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2127 "src/xnnpack/requantization.h",
2128 "include/xnnpack.h",
2129]
2130
2131OPERATOR_TEST_PARAMS_HDRS = [
2132 "src/xnnpack/params.h",
2133 "src/xnnpack/common.h",
2134]
2135
2136WEIGHTS_PACK_HDRS = [
2137 "src/xnnpack/pack.h",
2138 "src/xnnpack/operator.h",
2139 "src/xnnpack/compute.h",
2140]
2141
Marat Dukhanc8e00eb2019-10-04 14:55:26 -0700[diff] [blame]2142LOGGING_COPTS = select({
2143 # No logging in optimized mode
2144 ":optimized_build": ["-DXNN_LOG_LEVEL=0"],
2145 # Full logging in debug mode
2146 ":debug_build": ["-DXNN_LOG_LEVEL=5"],
2147 # Error-only logging in default (fastbuild) mode
2148 "//conditions:default": ["-DXNN_LOG_LEVEL=2"],
2149})
2150
Marat Dukhan3b59de22020-06-03 20:15:19 -0700[diff] [blame]2151LOGGING_SRCS = select({
2152 # No logging in optimized mode
2153 ":optimized_build": [],
2154 "//conditions:default": [
2155 "src/operator-strings.c",
2156 "src/subgraph-strings.c",
2157 ],
2158})
2159
Marat Dukhanc8e00eb2019-10-04 14:55:26 -0700[diff] [blame]2160LOGGING_HDRS = [
2161 "src/xnnpack/log.h",
2162]
2163
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2164xnnpack_cc_library(
Marat Dukhan3a77ea72019-12-23 12:10:24 -0800[diff] [blame]2165 name = "tables",
2166 srcs = TABLE_SRCS,
2167 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]2168 gcc_copts = xnnpack_gcc_std_copts(),
2169 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan3a77ea72019-12-23 12:10:24 -0800[diff] [blame]2170)
2171
2172xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2173 name = "scalar_ukernels",
2174 srcs = SCALAR_UKERNELS,
2175 hdrs = INTERNAL_HDRS,
2176 aarch32_copts = ["-marm"],
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]2177 gcc_copts = xnnpack_gcc_std_copts(),
2178 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2179 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -0800[diff] [blame]2180 ":tables",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2181 "@FP16",
2182 "@FXdiv",
Marat Dukhan04f03be2019-11-19 12:36:47 -0800[diff] [blame]2183 "@pthreadpool",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2184 ],
2185)
2186
2187xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2188 name = "scalar_ukernels_test_mode",
2189 srcs = SCALAR_UKERNELS,
2190 hdrs = INTERNAL_HDRS,
2191 aarch32_copts = ["-marm"],
2192 copts = [
2193 "-UNDEBUG",
2194 "-DXNN_TEST_MODE=1",
2195 ],
2196 gcc_copts = xnnpack_gcc_std_copts(),
2197 msvc_copts = xnnpack_msvc_std_copts(),
2198 deps = [
2199 ":tables",
2200 "@FP16",
2201 "@FXdiv",
2202 "@pthreadpool",
2203 ],
2204)
2205
2206xnnpack_cc_library(
Marat Dukhan436ebe62019-12-04 15:10:12 -0800[diff] [blame]2207 name = "wasm_ukernels",
2208 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]2209 gcc_copts = xnnpack_gcc_std_copts(),
2210 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan436ebe62019-12-04 15:10:12 -0800[diff] [blame]2211 wasm_srcs = WASM_UKERNELS,
Marat Dukhan1bbf96b2020-06-15 23:01:20 -0700[diff] [blame]2212 wasmsimd_copts = [
2213 "-msimd128",
2214 "-munimplemented-simd128",
2215 ],
Marat Dukhan290055c2020-06-09 12:24:29 -0700[diff] [blame]2216 wasmsimd_srcs = WASMSIMD_UKERNELS,
Marat Dukhan436ebe62019-12-04 15:10:12 -0800[diff] [blame]2217 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -0800[diff] [blame]2218 ":tables",
Marat Dukhan436ebe62019-12-04 15:10:12 -0800[diff] [blame]2219 "@FP16",
2220 "@FXdiv",
2221 "@pthreadpool",
2222 ],
2223)
2224
2225xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2226 name = "wasm_ukernels_test_mode",
2227 hdrs = INTERNAL_HDRS,
2228 copts = [
2229 "-UNDEBUG",
2230 "-DXNN_TEST_MODE=1",
2231 ],
2232 gcc_copts = xnnpack_gcc_std_copts(),
2233 msvc_copts = xnnpack_msvc_std_copts(),
2234 wasm_srcs = WASM_UKERNELS,
Marat Dukhan1bbf96b2020-06-15 23:01:20 -0700[diff] [blame]2235 wasmsimd_copts = [
2236 "-msimd128",
2237 "-munimplemented-simd128",
2238 ],
Marat Dukhan290055c2020-06-09 12:24:29 -0700[diff] [blame]2239 wasmsimd_srcs = WASMSIMD_UKERNELS,
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2240 deps = [
2241 ":tables",
2242 "@FP16",
2243 "@FXdiv",
2244 "@pthreadpool",
2245 ],
2246)
2247
2248xnnpack_cc_library(
Marat Dukhan8d3c07e2020-01-02 01:20:59 -0800[diff] [blame]2249 name = "psimd_fastmath_ukernels",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2250 hdrs = INTERNAL_HDRS,
2251 aarch32_copts = [
2252 "-marm",
2253 "-mfpu=neon",
2254 ],
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]2255 gcc_copts = xnnpack_gcc_std_copts(),
2256 gcc_x86_copts = ["-msse2"],
2257 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2258 optimized_copts = [
2259 "-O3",
2260 "-ffast-math",
2261 ],
Marat Dukhan500b8892020-04-15 17:09:50 -0700[diff] [blame]2262 psimd_srcs = PSIMD_FASTMATH_UKERNELS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2263 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -0800[diff] [blame]2264 ":tables",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2265 "@FP16",
2266 "@psimd",
Marat Dukhan04f03be2019-11-19 12:36:47 -0800[diff] [blame]2267 "@pthreadpool",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2268 ],
2269)
2270
2271xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2272 name = "psimd_fastmath_ukernels_test_mode",
2273 hdrs = INTERNAL_HDRS,
2274 aarch32_copts = [
2275 "-marm",
2276 "-mfpu=neon",
2277 ],
2278 copts = [
2279 "-UNDEBUG",
2280 "-DXNN_TEST_MODE=1",
2281 ],
2282 gcc_copts = xnnpack_gcc_std_copts(),
2283 gcc_x86_copts = ["-msse2"],
2284 msvc_copts = xnnpack_msvc_std_copts(),
2285 optimized_copts = [
2286 "-O3",
2287 "-ffast-math",
2288 ],
2289 psimd_srcs = PSIMD_FASTMATH_UKERNELS,
2290 deps = [
2291 ":tables",
2292 "@FP16",
2293 "@psimd",
2294 "@pthreadpool",
2295 ],
2296)
2297
2298xnnpack_cc_library(
Marat Dukhan8d3c07e2020-01-02 01:20:59 -0800[diff] [blame]2299 name = "psimd_accmath_ukernels",
Marat Dukhan8d3c07e2020-01-02 01:20:59 -0800[diff] [blame]2300 hdrs = INTERNAL_HDRS,
2301 aarch32_copts = [
2302 "-marm",
2303 "-mfpu=neon",
2304 ],
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]2305 gcc_copts = xnnpack_gcc_std_copts(),
2306 gcc_x86_copts = ["-msse2"],
2307 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan8d3c07e2020-01-02 01:20:59 -0800[diff] [blame]2308 optimized_copts = [
2309 "-O3",
2310 ],
Marat Dukhan500b8892020-04-15 17:09:50 -0700[diff] [blame]2311 psimd_srcs = PSIMD_ACCMATH_UKERNELS,
Marat Dukhan8d3c07e2020-01-02 01:20:59 -0800[diff] [blame]2312 deps = [
2313 ":tables",
2314 "@FP16",
2315 "@psimd",
2316 "@pthreadpool",
2317 ],
2318)
2319
2320xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2321 name = "psimd_accmath_ukernels_test_mode",
2322 hdrs = INTERNAL_HDRS,
2323 aarch32_copts = [
2324 "-marm",
2325 "-mfpu=neon",
2326 ],
2327 copts = [
2328 "-UNDEBUG",
2329 "-DXNN_TEST_MODE=1",
2330 ],
2331 gcc_copts = xnnpack_gcc_std_copts(),
2332 gcc_x86_copts = ["-msse2"],
2333 msvc_copts = xnnpack_msvc_std_copts(),
2334 optimized_copts = [
2335 "-O3",
2336 ],
2337 psimd_srcs = PSIMD_ACCMATH_UKERNELS,
2338 deps = [
2339 ":tables",
2340 "@FP16",
2341 "@psimd",
2342 "@pthreadpool",
2343 ],
2344)
2345
2346xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2347 name = "neon_ukernels",
2348 hdrs = INTERNAL_HDRS,
2349 aarch32_copts = [
2350 "-marm",
Marat Dukhan8853b822020-05-07 12:19:01 -0700[diff] [blame]2351 "-march=armv7-a",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2352 "-mfpu=neon",
2353 ],
2354 aarch32_srcs = NEON_UKERNELS,
2355 aarch64_srcs = NEON_UKERNELS,
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]2356 gcc_copts = xnnpack_gcc_std_copts(),
2357 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan04f03be2019-11-19 12:36:47 -0800[diff] [blame]2358 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -0800[diff] [blame]2359 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -0800[diff] [blame]2360 "@FP16",
2361 "@pthreadpool",
2362 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2363)
2364
2365xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2366 name = "neon_ukernels_test_mode",
2367 hdrs = INTERNAL_HDRS,
2368 aarch32_copts = [
2369 "-marm",
2370 "-march=armv7-a",
2371 "-mfpu=neon",
2372 ],
2373 aarch32_srcs = NEON_UKERNELS,
2374 aarch64_srcs = NEON_UKERNELS,
2375 copts = [
2376 "-UNDEBUG",
2377 "-DXNN_TEST_MODE=1",
2378 ],
2379 gcc_copts = xnnpack_gcc_std_copts(),
2380 msvc_copts = xnnpack_msvc_std_copts(),
2381 deps = [
2382 ":tables",
2383 "@FP16",
2384 "@pthreadpool",
2385 ],
2386)
2387
2388xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2389 name = "neonfma_ukernels",
2390 hdrs = INTERNAL_HDRS,
2391 aarch32_copts = [
2392 "-marm",
Marat Dukhan8853b822020-05-07 12:19:01 -0700[diff] [blame]2393 "-march=armv7-a",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2394 "-mfpu=neon-vfpv4",
2395 ],
2396 aarch32_srcs = NEONFMA_UKERNELS,
2397 aarch64_srcs = NEONFMA_UKERNELS + AARCH64_NEONFMA_UKERNELS,
Marat Dukhanbc69ed62020-06-09 21:34:56 -0700[diff] [blame]2398 apple_aarch32_copts = [
2399 "-mcpu=swift",
2400 "-mtune=generic",
2401 ],
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]2402 gcc_copts = xnnpack_gcc_std_copts(),
2403 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan04f03be2019-11-19 12:36:47 -0800[diff] [blame]2404 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -0800[diff] [blame]2405 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -0800[diff] [blame]2406 "@FP16",
2407 "@pthreadpool",
2408 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2409)
2410
2411xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2412 name = "neonfma_ukernels_test_mode",
2413 hdrs = INTERNAL_HDRS,
2414 aarch32_copts = [
2415 "-marm",
2416 "-march=armv7-a",
2417 "-mfpu=neon-vfpv4",
2418 ],
2419 aarch32_srcs = NEONFMA_UKERNELS,
2420 aarch64_srcs = NEONFMA_UKERNELS + AARCH64_NEONFMA_UKERNELS,
Marat Dukhanbc69ed62020-06-09 21:34:56 -0700[diff] [blame]2421 apple_aarch32_copts = [
2422 "-mcpu=swift",
2423 "-mtune=generic",
2424 ],
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2425 copts = [
2426 "-UNDEBUG",
2427 "-DXNN_TEST_MODE=1",
2428 ],
2429 gcc_copts = xnnpack_gcc_std_copts(),
2430 msvc_copts = xnnpack_msvc_std_copts(),
2431 deps = [
2432 ":tables",
2433 "@FP16",
2434 "@pthreadpool",
2435 ],
2436)
2437
2438xnnpack_cc_library(
Marat Dukhan8853b822020-05-07 12:19:01 -0700[diff] [blame]2439 name = "neonv8_ukernels",
2440 hdrs = INTERNAL_HDRS,
2441 aarch32_copts = [
2442 "-marm",
2443 "-march=armv8-a",
2444 "-mfpu=neon-fp-armv8",
2445 ],
2446 aarch32_srcs = NEONV8_UKERNELS,
2447 aarch64_srcs = NEONV8_UKERNELS,
Marat Dukhanbc69ed62020-06-09 21:34:56 -0700[diff] [blame]2448 apple_aarch32_copts = [
2449 "-mcpu=cyclone",
2450 "-mtune=generic",
2451 ],
Marat Dukhan8853b822020-05-07 12:19:01 -0700[diff] [blame]2452 gcc_copts = xnnpack_gcc_std_copts(),
2453 msvc_copts = xnnpack_msvc_std_copts(),
2454 deps = [
2455 ":tables",
2456 "@FP16",
2457 "@pthreadpool",
2458 ],
2459)
2460
2461xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2462 name = "neonv8_ukernels_test_mode",
2463 hdrs = INTERNAL_HDRS,
2464 aarch32_copts = [
2465 "-marm",
2466 "-march=armv8-a",
2467 "-mfpu=neon-fp-armv8",
2468 ],
2469 aarch32_srcs = NEONV8_UKERNELS,
2470 aarch64_srcs = NEONV8_UKERNELS,
Marat Dukhanbc69ed62020-06-09 21:34:56 -0700[diff] [blame]2471 apple_aarch32_copts = [
2472 "-mcpu=cyclone",
2473 "-mtune=generic",
2474 ],
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2475 copts = [
2476 "-UNDEBUG",
2477 "-DXNN_TEST_MODE=1",
2478 ],
2479 gcc_copts = xnnpack_gcc_std_copts(),
2480 msvc_copts = xnnpack_msvc_std_copts(),
2481 deps = [
2482 ":tables",
2483 "@FP16",
2484 "@pthreadpool",
2485 ],
2486)
2487
2488xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2489 name = "neonfp16arith_ukernels",
2490 hdrs = INTERNAL_HDRS,
2491 aarch64_copts = ["-march=armv8.2-a+fp16"],
2492 aarch64_srcs = AARCH64_NEONFP16ARITH_UKERNELS,
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]2493 gcc_copts = xnnpack_gcc_std_copts(),
2494 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan04f03be2019-11-19 12:36:47 -0800[diff] [blame]2495 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -0800[diff] [blame]2496 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -0800[diff] [blame]2497 "@FP16",
2498 "@pthreadpool",
2499 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2500)
2501
2502xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2503 name = "neonfp16arith_ukernels_test_mode",
2504 hdrs = INTERNAL_HDRS,
2505 aarch64_copts = ["-march=armv8.2-a+fp16"],
2506 aarch64_srcs = AARCH64_NEONFP16ARITH_UKERNELS,
2507 copts = [
2508 "-UNDEBUG",
2509 "-DXNN_TEST_MODE=1",
2510 ],
2511 gcc_copts = xnnpack_gcc_std_copts(),
2512 msvc_copts = xnnpack_msvc_std_copts(),
2513 deps = [
2514 ":tables",
2515 "@FP16",
2516 "@pthreadpool",
2517 ],
2518)
2519
2520xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2521 name = "sse2_ukernels",
2522 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]2523 gcc_copts = xnnpack_gcc_std_copts(),
2524 gcc_x86_copts = ["-msse2"],
2525 msvc_copts = xnnpack_msvc_std_copts(),
2526 msvc_x86_32_copts = ["/arch:SSE2"],
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2527 x86_srcs = SSE_UKERNELS + SSE2_UKERNELS,
Marat Dukhan04f03be2019-11-19 12:36:47 -0800[diff] [blame]2528 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -0800[diff] [blame]2529 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -0800[diff] [blame]2530 "@FP16",
2531 "@pthreadpool",
2532 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2533)
2534
2535xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2536 name = "sse2_ukernels_test_mode",
2537 hdrs = INTERNAL_HDRS,
2538 copts = [
2539 "-UNDEBUG",
2540 "-DXNN_TEST_MODE=1",
2541 ],
2542 gcc_copts = xnnpack_gcc_std_copts(),
2543 gcc_x86_copts = ["-msse2"],
2544 msvc_copts = xnnpack_msvc_std_copts(),
2545 msvc_x86_32_copts = ["/arch:SSE2"],
2546 x86_srcs = SSE_UKERNELS + SSE2_UKERNELS,
2547 deps = [
2548 ":tables",
2549 "@FP16",
2550 "@pthreadpool",
2551 ],
2552)
2553
2554xnnpack_cc_library(
Marat Dukhanfe7acb62020-03-09 19:30:05 -0700[diff] [blame]2555 name = "ssse3_ukernels",
2556 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]2557 gcc_copts = xnnpack_gcc_std_copts(),
2558 gcc_x86_copts = ["-mssse3"],
2559 msvc_copts = xnnpack_msvc_std_copts(),
2560 msvc_x86_32_copts = ["/arch:SSE2"],
Marat Dukhanfe7acb62020-03-09 19:30:05 -0700[diff] [blame]2561 x86_srcs = SSSE3_UKERNELS,
2562 deps = [
2563 ":tables",
2564 "@FP16",
2565 "@pthreadpool",
2566 ],
2567)
2568
2569xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2570 name = "ssse3_ukernels_test_mode",
2571 hdrs = INTERNAL_HDRS,
2572 copts = [
2573 "-UNDEBUG",
2574 "-DXNN_TEST_MODE=1",
2575 ],
2576 gcc_copts = xnnpack_gcc_std_copts(),
2577 gcc_x86_copts = ["-mssse3"],
2578 msvc_copts = xnnpack_msvc_std_copts(),
2579 msvc_x86_32_copts = ["/arch:SSE2"],
2580 x86_srcs = SSSE3_UKERNELS,
2581 deps = [
2582 ":tables",
2583 "@FP16",
2584 "@pthreadpool",
2585 ],
2586)
2587
2588xnnpack_cc_library(
Marat Dukhan69c3f2c2019-11-06 12:30:01 -0800[diff] [blame]2589 name = "sse41_ukernels",
2590 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]2591 gcc_copts = xnnpack_gcc_std_copts(),
2592 gcc_x86_copts = ["-msse4.1"],
2593 msvc_copts = xnnpack_msvc_std_copts(),
2594 msvc_x86_32_copts = ["/arch:SSE2"],
Marat Dukhan69c3f2c2019-11-06 12:30:01 -0800[diff] [blame]2595 x86_srcs = SSE41_UKERNELS,
Marat Dukhan04f03be2019-11-19 12:36:47 -0800[diff] [blame]2596 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -0800[diff] [blame]2597 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -0800[diff] [blame]2598 "@FP16",
2599 "@pthreadpool",
2600 ],
Marat Dukhan69c3f2c2019-11-06 12:30:01 -0800[diff] [blame]2601)
2602
2603xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2604 name = "sse41_ukernels_test_mode",
2605 hdrs = INTERNAL_HDRS,
2606 copts = [
2607 "-UNDEBUG",
2608 "-DXNN_TEST_MODE=1",
2609 ],
2610 gcc_copts = xnnpack_gcc_std_copts(),
2611 gcc_x86_copts = ["-msse4.1"],
2612 msvc_copts = xnnpack_msvc_std_copts(),
2613 msvc_x86_32_copts = ["/arch:SSE2"],
2614 x86_srcs = SSE41_UKERNELS,
2615 deps = [
2616 ":tables",
2617 "@FP16",
2618 "@pthreadpool",
2619 ],
2620)
2621
2622xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2623 name = "avx_ukernels",
2624 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]2625 gcc_copts = xnnpack_gcc_std_copts(),
2626 gcc_x86_copts = ["-mavx"],
2627 msvc_copts = xnnpack_msvc_std_copts(),
2628 msvc_x86_32_copts = ["/arch:AVX"],
2629 msvc_x86_64_copts = ["/arch:AVX"],
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2630 x86_srcs = AVX_UKERNELS,
Marat Dukhan04f03be2019-11-19 12:36:47 -0800[diff] [blame]2631 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -0800[diff] [blame]2632 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -0800[diff] [blame]2633 "@FP16",
2634 "@pthreadpool",
2635 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2636)
2637
2638xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2639 name = "avx_ukernels_test_mode",
2640 hdrs = INTERNAL_HDRS,
2641 copts = [
2642 "-UNDEBUG",
2643 "-DXNN_TEST_MODE=1",
2644 ],
2645 gcc_copts = xnnpack_gcc_std_copts(),
2646 gcc_x86_copts = ["-mavx"],
2647 msvc_copts = xnnpack_msvc_std_copts(),
2648 msvc_x86_32_copts = ["/arch:AVX"],
2649 msvc_x86_64_copts = ["/arch:AVX"],
2650 x86_srcs = AVX_UKERNELS,
2651 deps = [
2652 ":tables",
2653 "@FP16",
2654 "@pthreadpool",
2655 ],
2656)
2657
2658xnnpack_cc_library(
Marat Dukhanfda12b82019-11-21 12:27:59 -0800[diff] [blame]2659 name = "fma3_ukernels",
2660 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]2661 gcc_copts = xnnpack_gcc_std_copts(),
2662 gcc_x86_copts = ["-mfma"],
2663 msvc_copts = xnnpack_msvc_std_copts(),
2664 msvc_x86_32_copts = ["/arch:AVX"],
2665 msvc_x86_64_copts = ["/arch:AVX"],
Marat Dukhanfda12b82019-11-21 12:27:59 -0800[diff] [blame]2666 x86_srcs = FMA3_UKERNELS,
2667 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -0800[diff] [blame]2668 ":tables",
Marat Dukhanfda12b82019-11-21 12:27:59 -0800[diff] [blame]2669 "@FP16",
2670 "@pthreadpool",
2671 ],
2672)
2673
2674xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2675 name = "fma3_ukernels_test_mode",
2676 hdrs = INTERNAL_HDRS,
2677 copts = [
2678 "-UNDEBUG",
2679 "-DXNN_TEST_MODE=1",
2680 ],
2681 gcc_copts = xnnpack_gcc_std_copts(),
2682 gcc_x86_copts = ["-mfma"],
2683 msvc_copts = xnnpack_msvc_std_copts(),
2684 msvc_x86_32_copts = ["/arch:AVX"],
2685 msvc_x86_64_copts = ["/arch:AVX"],
2686 x86_srcs = FMA3_UKERNELS,
2687 deps = [
2688 ":tables",
2689 "@FP16",
2690 "@pthreadpool",
2691 ],
2692)
2693
2694xnnpack_cc_library(
Marat Dukhan6adff4e2019-10-14 18:32:07 -0700[diff] [blame]2695 name = "avx2_ukernels",
2696 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]2697 gcc_copts = xnnpack_gcc_std_copts(),
2698 gcc_x86_copts = [
Marat Dukhan6adff4e2019-10-14 18:32:07 -0700[diff] [blame]2699 "-mfma",
2700 "-mavx2",
2701 ],
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]2702 msvc_copts = xnnpack_msvc_std_copts(),
2703 msvc_x86_32_copts = ["/arch:AVX2"],
2704 msvc_x86_64_copts = ["/arch:AVX2"],
Marat Dukhan6adff4e2019-10-14 18:32:07 -0700[diff] [blame]2705 x86_srcs = AVX2_UKERNELS,
Marat Dukhan04f03be2019-11-19 12:36:47 -0800[diff] [blame]2706 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -0800[diff] [blame]2707 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -0800[diff] [blame]2708 "@FP16",
2709 "@pthreadpool",
2710 ],
Marat Dukhan6adff4e2019-10-14 18:32:07 -0700[diff] [blame]2711)
2712
2713xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2714 name = "avx2_ukernels_test_mode",
2715 hdrs = INTERNAL_HDRS,
2716 copts = [
2717 "-UNDEBUG",
2718 "-DXNN_TEST_MODE=1",
2719 ],
2720 gcc_copts = xnnpack_gcc_std_copts(),
2721 gcc_x86_copts = [
2722 "-mfma",
2723 "-mavx2",
2724 ],
2725 msvc_copts = xnnpack_msvc_std_copts(),
2726 msvc_x86_32_copts = ["/arch:AVX2"],
2727 msvc_x86_64_copts = ["/arch:AVX2"],
2728 x86_srcs = AVX2_UKERNELS,
2729 deps = [
2730 ":tables",
2731 "@FP16",
2732 "@pthreadpool",
2733 ],
2734)
2735
2736xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2737 name = "avx512f_ukernels",
2738 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]2739 gcc_copts = xnnpack_gcc_std_copts(),
2740 gcc_x86_copts = ["-mavx512f"],
2741 mingw_copts = ["-fno-asynchronous-unwind-tables"],
2742 msvc_copts = xnnpack_msvc_std_copts(),
2743 msvc_x86_32_copts = ["/arch:AVX512"],
2744 msvc_x86_64_copts = ["/arch:AVX512"],
2745 msys_copts = ["-fno-asynchronous-unwind-tables"],
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2746 x86_srcs = AVX512F_UKERNELS,
Marat Dukhan04f03be2019-11-19 12:36:47 -0800[diff] [blame]2747 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -0800[diff] [blame]2748 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -0800[diff] [blame]2749 "@FP16",
2750 "@pthreadpool",
2751 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2752)
2753
2754xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2755 name = "avx512f_ukernels_test_mode",
2756 hdrs = INTERNAL_HDRS,
2757 copts = [
2758 "-UNDEBUG",
2759 "-DXNN_TEST_MODE=1",
2760 ],
2761 gcc_copts = xnnpack_gcc_std_copts(),
2762 gcc_x86_copts = ["-mavx512f"],
2763 mingw_copts = ["-fno-asynchronous-unwind-tables"],
2764 msvc_copts = xnnpack_msvc_std_copts(),
2765 msvc_x86_32_copts = ["/arch:AVX512"],
2766 msvc_x86_64_copts = ["/arch:AVX512"],
2767 msys_copts = ["-fno-asynchronous-unwind-tables"],
2768 x86_srcs = AVX512F_UKERNELS,
2769 deps = [
2770 ":tables",
2771 "@FP16",
2772 "@pthreadpool",
2773 ],
2774)
2775
2776xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2777 name = "asm_ukernels",
2778 hdrs = ["src/xnnpack/assembly.h"],
2779 aarch32_srcs = AARCH32_ASM_UKERNELS,
Frank Barchard683f5592020-04-10 00:48:26 -0700[diff] [blame]2780 aarch64_copts = ["-march=armv8.2-a+fp16"],
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2781 aarch64_srcs = AARCH64_ASM_UKERNELS,
2782)
2783
Marat Dukhan3b59de22020-06-03 20:15:19 -0700[diff] [blame]2784xnnpack_cc_library(
2785 name = "logging_utils",
2786 srcs = LOGGING_SRCS,
2787 hdrs = INTERNAL_HDRS + LOGGING_HDRS,
2788 copts = LOGGING_COPTS + [
2789 "-Isrc",
2790 "-Iinclude",
2791 ] + select({
2792 ":debug_build": [],
2793 "//conditions:default": xnnpack_min_size_copts(),
2794 }),
2795 gcc_copts = xnnpack_gcc_std_copts(),
2796 msvc_copts = xnnpack_msvc_std_copts(),
2797 visibility = xnnpack_visibility(),
2798 deps = [
2799 "@FP16",
2800 "@clog",
2801 "@pthreadpool",
2802 ],
2803)
2804
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2805xnnpack_aggregate_library(
2806 name = "ukernels",
2807 aarch32_deps = [
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2808 ":neon_ukernels",
2809 ":neonfma_ukernels",
Marat Dukhan8853b822020-05-07 12:19:01 -0700[diff] [blame]2810 ":neonv8_ukernels",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2811 ":asm_ukernels",
2812 ],
2813 aarch64_deps = [
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2814 ":neon_ukernels",
2815 ":neonfma_ukernels",
Marat Dukhan8853b822020-05-07 12:19:01 -0700[diff] [blame]2816 ":neonv8_ukernels",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2817 ":neonfp16arith_ukernels",
2818 ":asm_ukernels",
2819 ],
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2820 generic_deps = [
2821 ":scalar_ukernels",
2822 ],
Marat Dukhan500b8892020-04-15 17:09:50 -0700[diff] [blame]2823 psimd_deps = [
Marat Dukhan8d3c07e2020-01-02 01:20:59 -0800[diff] [blame]2824 ":psimd_fastmath_ukernels",
2825 ":psimd_accmath_ukernels",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2826 ],
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2827 wasm_deps = [
2828 ":wasm_ukernels",
2829 ],
2830 wasmsimd_deps = [
2831 ":wasm_ukernels",
2832 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2833 x86_deps = [
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2834 ":sse2_ukernels",
Marat Dukhanfe7acb62020-03-09 19:30:05 -0700[diff] [blame]2835 ":ssse3_ukernels",
Marat Dukhan69c3f2c2019-11-06 12:30:01 -0800[diff] [blame]2836 ":sse41_ukernels",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2837 ":avx_ukernels",
Marat Dukhanfda12b82019-11-21 12:27:59 -0800[diff] [blame]2838 ":fma3_ukernels",
Marat Dukhan6adff4e2019-10-14 18:32:07 -0700[diff] [blame]2839 ":avx2_ukernels",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2840 ":avx512f_ukernels",
2841 ],
2842)
2843
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2844xnnpack_aggregate_library(
2845 name = "ukernels_test_mode",
2846 aarch32_deps = [
2847 ":neon_ukernels_test_mode",
2848 ":neonfma_ukernels_test_mode",
2849 ":neonv8_ukernels_test_mode",
2850 ":asm_ukernels",
2851 ],
2852 aarch64_deps = [
2853 ":neon_ukernels_test_mode",
2854 ":neonfma_ukernels_test_mode",
2855 ":neonv8_ukernels_test_mode",
2856 ":neonfp16arith_ukernels_test_mode",
2857 ":asm_ukernels",
2858 ],
2859 generic_deps = [
2860 ":scalar_ukernels_test_mode",
2861 ],
2862 psimd_deps = [
2863 ":psimd_fastmath_ukernels_test_mode",
2864 ":psimd_accmath_ukernels_test_mode",
2865 ],
2866 wasm_deps = [
2867 ":wasm_ukernels_test_mode",
2868 ],
2869 wasmsimd_deps = [
2870 ":wasm_ukernels_test_mode",
2871 ],
2872 x86_deps = [
2873 ":sse2_ukernels_test_mode",
2874 ":ssse3_ukernels_test_mode",
2875 ":sse41_ukernels_test_mode",
2876 ":avx_ukernels_test_mode",
2877 ":fma3_ukernels_test_mode",
2878 ":avx2_ukernels_test_mode",
2879 ":avx512f_ukernels_test_mode",
2880 ],
2881)
2882
Marat Dukhan86df3842020-06-17 14:03:31 -0700[diff] [blame]2883# This target must be compatible with Android NDK r17 and compile with Clang 6.
2884# It is similar to :ukernels target, but excludes microkernels which require
2885# NEON FP16 arithmetics, NEON Dot Product, and newer intrinsics.
Marat Dukhanae046f52020-06-15 13:16:14 -0700[diff] [blame]2886xnnpack_aggregate_library(
Marat Dukhan86df3842020-06-17 14:03:31 -0700[diff] [blame]2887 name = "ukernels_max_compatibility",
Marat Dukhanae046f52020-06-15 13:16:14 -0700[diff] [blame]2888 aarch32_deps = [
2889 ":neon_ukernels",
2890 ":neonfma_ukernels",
2891 ":neonv8_ukernels",
2892 ":asm_ukernels",
2893 ],
2894 aarch64_deps = [
2895 ":neon_ukernels",
2896 ":neonfma_ukernels",
2897 ":neonv8_ukernels",
2898 ":asm_ukernels",
2899 ],
2900 generic_deps = [
2901 ":scalar_ukernels",
2902 ],
2903 psimd_deps = [
2904 ":psimd_fastmath_ukernels",
2905 ":psimd_accmath_ukernels",
2906 ],
2907 wasm_deps = [
2908 ":wasm_ukernels",
2909 ],
2910 wasmsimd_deps = [
2911 ":wasm_ukernels",
2912 ],
2913 x86_deps = [
2914 ":sse2_ukernels",
2915 ":ssse3_ukernels",
2916 ":sse41_ukernels",
2917 ":avx_ukernels",
2918 ":fma3_ukernels",
2919 ":avx2_ukernels",
2920 ":avx512f_ukernels",
2921 ],
2922)
2923
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2924xnnpack_cc_library(
2925 name = "im2col",
2926 srcs = ["src/im2col.c"],
2927 hdrs = [
2928 "src/xnnpack/common.h",
2929 "src/xnnpack/im2col.h",
2930 ],
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]2931 gcc_copts = xnnpack_gcc_std_copts(),
2932 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2933)
2934
2935xnnpack_cc_library(
2936 name = "indirection",
2937 srcs = ["src/indirection.c"],
2938 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]2939 gcc_copts = xnnpack_gcc_std_copts(),
2940 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2941 deps = [
2942 "@FP16",
2943 "@FXdiv",
2944 "@pthreadpool",
2945 ],
2946)
2947
2948xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2949 name = "indirection_test_mode",
2950 srcs = ["src/indirection.c"],
2951 hdrs = INTERNAL_HDRS,
2952 copts = [
2953 "-UNDEBUG",
2954 "-DXNN_TEST_MODE=1",
2955 ],
2956 gcc_copts = xnnpack_gcc_std_copts(),
2957 msvc_copts = xnnpack_msvc_std_copts(),
2958 deps = [
2959 "@FP16",
2960 "@FXdiv",
2961 "@pthreadpool",
2962 ],
2963)
2964
2965xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2966 name = "operator_run",
2967 srcs = ["src/operator-run.c"],
Marat Dukhanc8e00eb2019-10-04 14:55:26 -0700[diff] [blame]2968 hdrs = INTERNAL_HDRS + LOGGING_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]2969 copts = LOGGING_COPTS + select({
Marat Dukhan05702cf2020-03-26 15:41:33 -0700[diff] [blame]2970 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
2971 "//conditions:default": [],
2972 }),
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]2973 gcc_copts = xnnpack_gcc_std_copts(),
2974 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2975 deps = [
Marat Dukhan3b59de22020-06-03 20:15:19 -0700[diff] [blame]2976 ":logging_utils",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2977 "@FP16",
2978 "@FXdiv",
2979 "@clog",
2980 "@pthreadpool",
2981 ],
2982)
2983
Chao Mei6ddfc602020-05-13 22:29:36 -0700[diff] [blame]2984xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2985 name = "operator_run_test_mode",
2986 srcs = ["src/operator-run.c"],
2987 hdrs = INTERNAL_HDRS + LOGGING_HDRS,
2988 copts = LOGGING_COPTS + [
2989 "-UNDEBUG",
2990 "-DXNN_TEST_MODE=1",
2991 ] + select({
2992 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
2993 "//conditions:default": [],
2994 }),
2995 gcc_copts = xnnpack_gcc_std_copts(),
2996 msvc_copts = xnnpack_msvc_std_copts(),
2997 deps = [
Marat Dukhan3b59de22020-06-03 20:15:19 -0700[diff] [blame]2998 ":logging_utils",
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2999 "@FP16",
3000 "@FXdiv",
3001 "@clog",
3002 "@pthreadpool",
3003 ],
3004)
3005
3006xnnpack_cc_library(
Chao Mei6ddfc602020-05-13 22:29:36 -0700[diff] [blame]3007 name = "memory_planner",
3008 srcs = ["src/memory-planner.c"],
3009 hdrs = INTERNAL_HDRS,
3010 defines = select({
3011 ":xnn_enable_memopt_explicit_true": ["XNN_ENABLE_MEMOPT=1"],
3012 ":xnn_enable_memopt_explicit_false": ["XNN_ENABLE_MEMOPT=0"],
3013 "//conditions:default": ["XNN_ENABLE_MEMOPT=1"],
3014 }),
3015 gcc_copts = xnnpack_gcc_std_copts(),
3016 msvc_copts = xnnpack_msvc_std_copts(),
3017 deps = [
Marat Dukhan3b59de22020-06-03 20:15:19 -0700[diff] [blame]3018 ":logging_utils",
Chao Mei6ddfc602020-05-13 22:29:36 -0700[diff] [blame]3019 "@pthreadpool",
3020 ],
3021)
3022
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]3023xnnpack_cc_library(
3024 name = "memory_planner_test_mode",
3025 srcs = ["src/memory-planner.c"],
3026 hdrs = INTERNAL_HDRS,
3027 copts = [
3028 "-UNDEBUG",
3029 "-DXNN_TEST_MODE=1",
3030 ],
3031 defines = select({
3032 ":xnn_enable_memopt_explicit_true": ["XNN_ENABLE_MEMOPT=1"],
3033 ":xnn_enable_memopt_explicit_false": ["XNN_ENABLE_MEMOPT=0"],
3034 "//conditions:default": ["XNN_ENABLE_MEMOPT=1"],
3035 }),
3036 gcc_copts = xnnpack_gcc_std_copts(),
3037 msvc_copts = xnnpack_msvc_std_copts(),
3038 deps = [
Marat Dukhan3b59de22020-06-03 20:15:19 -0700[diff] [blame]3039 ":logging_utils",
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]3040 "@pthreadpool",
3041 ],
3042)
3043
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3044cc_library(
3045 name = "enable_assembly",
3046 defines = select({
3047 ":xnn_enable_assembly_explicit_true": ["XNN_ENABLE_ASSEMBLY=1"],
3048 ":xnn_enable_assembly_explicit_false": ["XNN_ENABLE_ASSEMBLY=0"],
Frank Barchard810171d2019-10-10 10:34:51 -0700[diff] [blame]3049 "//conditions:default": ["XNN_ENABLE_ASSEMBLY=1"],
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3050 }),
3051)
3052
Marat Dukhan9de90e02020-06-18 16:04:12 -0700[diff] [blame]3053cc_library(
3054 name = "enable_sparse",
3055 defines = select({
3056 ":xnn_enable_sparse_explicit_true": ["XNN_ENABLE_SPARSE=1"],
3057 ":xnn_enable_sparse_explicit_false": ["XNN_ENABLE_SPARSE=0"],
Marat Dukhan8b283aa2020-06-18 16:48:57 -0700[diff] [blame]3058 "//conditions:default": ["XNN_ENABLE_SPARSE=0"],
Marat Dukhan9de90e02020-06-18 16:04:12 -0700[diff] [blame]3059 }),
3060)
3061
Marat Dukhancf056b22019-10-07 10:26:29 -0700[diff] [blame]3062xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3063 name = "operators",
3064 srcs = OPERATOR_SRCS + [
Marat Dukhan04f03be2019-11-19 12:36:47 -0800[diff] [blame]3065 "src/memory.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3066 "src/operator-delete.c",
Marat Dukhancf056b22019-10-07 10:26:29 -0700[diff] [blame]3067 ],
3068 hdrs = INTERNAL_HDRS + LOGGING_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]3069 copts = LOGGING_COPTS + [
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3070 "-Isrc",
3071 "-Iinclude",
3072 ] + select({
3073 ":debug_build": [],
3074 "//conditions:default": xnnpack_min_size_copts(),
Marat Dukhan05702cf2020-03-26 15:41:33 -0700[diff] [blame]3075 }) + select({
3076 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
3077 "//conditions:default": [],
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3078 }),
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]3079 gcc_copts = xnnpack_gcc_std_copts(),
3080 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3081 deps = [
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3082 ":indirection",
Marat Dukhan3b59de22020-06-03 20:15:19 -0700[diff] [blame]3083 ":logging_utils",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3084 "@FP16",
3085 "@FXdiv",
3086 "@clog",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3087 "@pthreadpool",
Marat Dukhan8fe54e42019-10-10 14:12:59 -0700[diff] [blame]3088 ],
3089)
3090
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]3091xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]3092 name = "operators_test_mode",
3093 srcs = OPERATOR_SRCS + [
3094 "src/memory.c",
3095 "src/operator-delete.c",
3096 ],
3097 hdrs = INTERNAL_HDRS + LOGGING_HDRS,
3098 copts = LOGGING_COPTS + [
3099 "-Isrc",
3100 "-Iinclude",
3101 "-UNDEBUG",
3102 "-DXNN_TEST_MODE=1",
3103 ] + select({
3104 ":debug_build": [],
3105 "//conditions:default": xnnpack_min_size_copts(),
3106 }) + select({
3107 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
3108 "//conditions:default": [],
3109 }),
3110 gcc_copts = xnnpack_gcc_std_copts(),
3111 msvc_copts = xnnpack_msvc_std_copts(),
3112 deps = [
3113 ":indirection_test_mode",
Marat Dukhan3b59de22020-06-03 20:15:19 -0700[diff] [blame]3114 ":logging_utils",
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]3115 "@FP16",
3116 "@FXdiv",
3117 "@clog",
3118 "@pthreadpool",
3119 ],
3120)
3121
3122xnnpack_cc_library(
Marat Dukhan8fe54e42019-10-10 14:12:59 -0700[diff] [blame]3123 name = "XNNPACK",
3124 srcs = [
3125 "src/init.c",
Marat Dukhanccfdbd12020-02-03 14:27:45 -0800[diff] [blame]3126 "src/runtime.c",
3127 "src/subgraph.c",
3128 "src/tensor.c",
Marat Dukhanf03da0d2020-06-10 16:00:20 -0700[diff] [blame]3129 ] + SUBGRAPH_SRCS,
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]3130 hdrs = ["include/xnnpack.h"],
3131 copts = LOGGING_COPTS + [
Marat Dukhan8fe54e42019-10-10 14:12:59 -0700[diff] [blame]3132 "-Isrc",
3133 "-Iinclude",
3134 ] + select({
3135 ":debug_build": [],
3136 "//conditions:default": xnnpack_min_size_copts(),
Marat Dukhan05702cf2020-03-26 15:41:33 -0700[diff] [blame]3137 }) + select({
3138 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
3139 "//conditions:default": [],
Marat Dukhan8fe54e42019-10-10 14:12:59 -0700[diff] [blame]3140 }),
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]3141 gcc_copts = xnnpack_gcc_std_copts(),
Marat Dukhan8fe54e42019-10-10 14:12:59 -0700[diff] [blame]3142 includes = ["include"],
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]3143 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan8fe54e42019-10-10 14:12:59 -0700[diff] [blame]3144 visibility = xnnpack_visibility(),
3145 deps = [
3146 ":enable_assembly",
Marat Dukhan9de90e02020-06-18 16:04:12 -0700[diff] [blame]3147 ":enable_sparse",
Marat Dukhan3b59de22020-06-03 20:15:19 -0700[diff] [blame]3148 ":logging_utils",
Chao Mei6ddfc602020-05-13 22:29:36 -0700[diff] [blame]3149 ":memory_planner",
Marat Dukhan8fe54e42019-10-10 14:12:59 -0700[diff] [blame]3150 ":operator_run",
3151 ":operators",
Marat Dukhan3b59de22020-06-03 20:15:19 -0700[diff] [blame]3152 ":ukernels",
Marat Dukhan8fe54e42019-10-10 14:12:59 -0700[diff] [blame]3153 "@clog",
Marat Dukhanab2946c2020-05-21 20:04:13 -0700[diff] [blame]3154 "@FP16",
Marat Dukhan8fe54e42019-10-10 14:12:59 -0700[diff] [blame]3155 "@pthreadpool",
Marat Dukhand343c222019-10-07 09:22:14 -0700[diff] [blame]3156 ] + select({
3157 ":emscripten": [],
3158 "//conditions:default": ["@cpuinfo"],
3159 }),
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3160)
3161
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]3162xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]3163 name = "XNNPACK_test_mode",
3164 srcs = [
3165 "src/init.c",
3166 "src/runtime.c",
3167 "src/subgraph.c",
3168 "src/tensor.c",
Marat Dukhanf03da0d2020-06-10 16:00:20 -0700[diff] [blame]3169 ] + SUBGRAPH_SRCS,
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]3170 hdrs = ["include/xnnpack.h"],
3171 copts = LOGGING_COPTS + [
3172 "-Isrc",
3173 "-Iinclude",
3174 "-UNDEBUG",
3175 "-DXNN_TEST_MODE=1",
3176 ] + select({
3177 ":debug_build": [],
3178 "//conditions:default": xnnpack_min_size_copts(),
3179 }) + select({
3180 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
3181 "//conditions:default": [],
3182 }),
3183 gcc_copts = xnnpack_gcc_std_copts(),
3184 includes = ["include"],
3185 msvc_copts = xnnpack_msvc_std_copts(),
3186 visibility = xnnpack_visibility(),
3187 deps = [
3188 ":enable_assembly",
Marat Dukhan9de90e02020-06-18 16:04:12 -0700[diff] [blame]3189 ":enable_sparse",
Marat Dukhan3b59de22020-06-03 20:15:19 -0700[diff] [blame]3190 ":logging_utils",
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]3191 ":memory_planner_test_mode",
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]3192 ":operator_run_test_mode",
3193 ":operators_test_mode",
Marat Dukhan3b59de22020-06-03 20:15:19 -0700[diff] [blame]3194 ":ukernels_test_mode",
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]3195 "@clog",
3196 "@FP16",
3197 "@pthreadpool",
3198 ] + select({
3199 ":emscripten": [],
3200 "//conditions:default": ["@cpuinfo"],
3201 }),
3202)
3203
3204xnnpack_cc_library(
Marat Dukhanae046f52020-06-15 13:16:14 -0700[diff] [blame]3205 name = "xnnpack_f32",
3206 srcs = [
3207 "src/init.c",
3208 "src/runtime.c",
3209 "src/subgraph.c",
3210 "src/tensor.c",
3211 ] + SUBGRAPH_SRCS,
3212 hdrs = ["include/xnnpack.h"],
3213 copts = LOGGING_COPTS + [
3214 "-Isrc",
3215 "-Iinclude",
3216 ] + select({
3217 ":debug_build": [],
3218 "//conditions:default": xnnpack_min_size_copts(),
3219 }) + select({
3220 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
3221 "//conditions:default": [],
3222 }),
3223 defines = [
3224 "XNN_NO_Q8_OPERATORS",
3225 "XNN_NO_U8_OPERATORS",
3226 "XNN_NO_X8_OPERATORS",
3227 "XNN_NO_F16_OPERATORS",
3228 "XNN_NO_X16_OPERATORS",
3229 ],
3230 gcc_copts = xnnpack_gcc_std_copts(),
3231 includes = ["include"],
3232 msvc_copts = xnnpack_msvc_std_copts(),
3233 visibility = xnnpack_visibility(),
3234 deps = [
3235 ":enable_assembly",
Marat Dukhan9de90e02020-06-18 16:04:12 -0700[diff] [blame]3236 ":enable_sparse",
Marat Dukhanae046f52020-06-15 13:16:14 -0700[diff] [blame]3237 ":logging_utils",
3238 ":memory_planner",
3239 ":operator_run",
3240 ":operators",
Marat Dukhan86df3842020-06-17 14:03:31 -0700[diff] [blame]3241 ":ukernels_max_compatibility",
Marat Dukhanae046f52020-06-15 13:16:14 -0700[diff] [blame]3242 "@clog",
3243 "@FP16",
3244 "@pthreadpool",
3245 ] + select({
3246 ":emscripten": [],
3247 "//conditions:default": ["@cpuinfo"],
3248 }),
3249)
3250
3251xnnpack_cc_library(
Marat Dukhan8fe54e42019-10-10 14:12:59 -0700[diff] [blame]3252 name = "xnnpack_operators_nhwc_f32",
3253 srcs = [
3254 "src/init.c",
3255 ],
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]3256 hdrs = ["include/xnnpack.h"],
3257 copts = LOGGING_COPTS + [
Marat Dukhan8fe54e42019-10-10 14:12:59 -0700[diff] [blame]3258 "-Isrc",
3259 "-Iinclude",
3260 ] + select({
3261 ":debug_build": [],
3262 "//conditions:default": xnnpack_min_size_copts(),
Marat Dukhan05702cf2020-03-26 15:41:33 -0700[diff] [blame]3263 }) + select({
3264 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
3265 "//conditions:default": [],
Marat Dukhan8fe54e42019-10-10 14:12:59 -0700[diff] [blame]3266 }),
3267 defines = [
3268 "XNN_NO_Q8_OPERATORS",
3269 "XNN_NO_U8_OPERATORS",
3270 "XNN_NO_X8_OPERATORS",
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]3271 "XNN_NO_NCHW_OPERATORS",
Marat Dukhan8fe54e42019-10-10 14:12:59 -0700[diff] [blame]3272 ],
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]3273 gcc_copts = xnnpack_gcc_std_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3274 includes = ["include"],
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]3275 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3276 visibility = xnnpack_visibility(),
3277 deps = [
Marat Dukhan8fe54e42019-10-10 14:12:59 -0700[diff] [blame]3278 ":enable_assembly",
Marat Dukhan3b59de22020-06-03 20:15:19 -0700[diff] [blame]3279 ":logging_utils",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3280 ":operator_run",
3281 ":operators",
Marat Dukhan3b59de22020-06-03 20:15:19 -0700[diff] [blame]3282 ":ukernels",
Marat Dukhan8fe54e42019-10-10 14:12:59 -0700[diff] [blame]3283 "@clog",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3284 "@pthreadpool",
Marat Dukhan8fe54e42019-10-10 14:12:59 -0700[diff] [blame]3285 ] + select({
3286 ":emscripten": [],
3287 "//conditions:default": ["@cpuinfo"],
3288 }),
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3289)
3290
Marat Dukhancf056b22019-10-07 10:26:29 -0700[diff] [blame]3291xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3292 name = "bench_utils",
3293 srcs = ["bench/utils.cc"],
3294 hdrs = ["bench/utils.h"],
Marat Dukhanbad48fe2019-11-04 10:35:22 -0800[diff] [blame]3295 deps = [
3296 "@com_google_benchmark//:benchmark",
3297 "@cpuinfo",
3298 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3299)
3300
Frank Barchard7e955972019-10-11 10:34:25 -0700[diff] [blame]3301######################### Benchmarks for micro-kernels #########################
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3302
3303xnnpack_benchmark(
3304 name = "q8_gemm_bench",
3305 srcs = [
3306 "bench/gemm.h",
3307 "bench/q8-gemm.cc",
3308 "src/xnnpack/AlignedAllocator.h",
3309 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]3310 copts = xnnpack_optional_ruy_copts() + xnnpack_optional_gemmlowp_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3311 deps = MICROKERNEL_BENCHMARK_DEPS + xnnpack_optional_ruy_deps() + xnnpack_optional_gemmlowp_deps(),
3312)
3313
3314xnnpack_benchmark(
Frank Barchard40d20fe2020-05-05 00:37:45 -0700[diff] [blame]3315 name = "f16_igemm_bench",
3316 srcs = [
3317 "bench/f16-igemm.cc",
3318 "bench/conv.h",
3319 "bench/google/conv.h",
3320 "src/xnnpack/AlignedAllocator.h",
3321 ] + MICROKERNEL_BENCHMARK_HDRS,
3322 deps = MICROKERNEL_BENCHMARK_DEPS + [":indirection"],
3323)
3324
3325xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3326 name = "f16_gemm_bench",
3327 srcs = [
3328 "bench/f16-gemm.cc",
3329 "bench/gemm.h",
3330 "src/xnnpack/AlignedAllocator.h",
3331 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3332 deps = MICROKERNEL_BENCHMARK_DEPS,
3333)
3334
3335xnnpack_benchmark(
Marat Dukhanbdb56f52020-02-05 21:42:49 -0800[diff] [blame]3336 name = "f16_spmm_bench",
3337 srcs = [
3338 "bench/f16-spmm.cc",
3339 "bench/gemm.h",
Marat Dukhanbdb56f52020-02-05 21:42:49 -0800[diff] [blame]3340 "src/xnnpack/AlignedAllocator.h",
3341 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanbdb56f52020-02-05 21:42:49 -0800[diff] [blame]3342 deps = MICROKERNEL_BENCHMARK_DEPS,
3343)
3344
3345xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3346 name = "f32_igemm_bench",
3347 srcs = [
3348 "bench/f32-igemm.cc",
3349 "bench/conv.h",
3350 "src/xnnpack/AlignedAllocator.h",
3351 ] + MICROKERNEL_BENCHMARK_HDRS,
Frank Barchard7e955972019-10-11 10:34:25 -0700[diff] [blame]3352 deps = MICROKERNEL_BENCHMARK_DEPS + [":indirection"],
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3353)
3354
3355xnnpack_benchmark(
3356 name = "f32_conv_hwc_bench",
3357 srcs = [
3358 "bench/f32-conv-hwc.cc",
3359 "bench/dconv.h",
3360 "src/xnnpack/AlignedAllocator.h",
3361 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3362 deps = MICROKERNEL_BENCHMARK_DEPS,
3363)
3364
3365xnnpack_benchmark(
Marat Dukhan1f29b802020-05-15 23:46:39 -0700[diff] [blame]3366 name = "f32_conv_hwc2chw_bench",
Erich Elsen563df5f2019-10-23 08:02:21 -0700[diff] [blame]3367 srcs = [
Marat Dukhan1f29b802020-05-15 23:46:39 -0700[diff] [blame]3368 "bench/f32-conv-hwc2chw.cc",
Erich Elsen563df5f2019-10-23 08:02:21 -0700[diff] [blame]3369 "bench/dconv.h",
3370 "src/xnnpack/AlignedAllocator.h",
3371 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
Erich Elsen563df5f2019-10-23 08:02:21 -0700[diff] [blame]3372 deps = MICROKERNEL_BENCHMARK_DEPS,
3373)
3374
3375xnnpack_benchmark(
Frank Barchard5a599a62020-06-04 20:12:44 -0700[diff] [blame]3376 name = "f16_dwconv_bench",
3377 srcs = [
3378 "bench/f16-dwconv.cc",
3379 "bench/dwconv.h",
3380 "bench/google/dwconv.h",
3381 "src/xnnpack/AlignedAllocator.h",
3382 ] + MICROKERNEL_BENCHMARK_HDRS,
3383 deps = MICROKERNEL_BENCHMARK_DEPS + [":indirection"],
3384)
3385
3386xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3387 name = "f32_dwconv_bench",
3388 srcs = [
3389 "bench/f32-dwconv.cc",
3390 "bench/dwconv.h",
3391 "src/xnnpack/AlignedAllocator.h",
3392 ] + MICROKERNEL_BENCHMARK_HDRS,
3393 deps = MICROKERNEL_BENCHMARK_DEPS + [":indirection"],
3394)
3395
3396xnnpack_benchmark(
Marat Dukhan1f29b802020-05-15 23:46:39 -0700[diff] [blame]3397 name = "f32_dwconv_chw_bench",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3398 srcs = [
Marat Dukhan1f29b802020-05-15 23:46:39 -0700[diff] [blame]3399 "bench/f32-dwconv-chw.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3400 "bench/dwconv.h",
3401 "src/xnnpack/AlignedAllocator.h",
3402 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
3403 deps = MICROKERNEL_BENCHMARK_DEPS + [":indirection"],
3404)
3405
3406xnnpack_benchmark(
3407 name = "f32_gemm_bench",
3408 srcs = [
3409 "bench/f32-gemm.cc",
3410 "bench/gemm.h",
3411 "src/xnnpack/AlignedAllocator.h",
3412 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]3413 copts = xnnpack_optional_ruy_copts(),
Frank Barchard7e955972019-10-11 10:34:25 -0700[diff] [blame]3414 deps = MICROKERNEL_BENCHMARK_DEPS + xnnpack_optional_ruy_deps(),
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3415)
3416
3417xnnpack_benchmark(
Marat Dukhan4c4eb002019-12-08 21:27:49 -0800[diff] [blame]3418 name = "f32_raddexpminusmax_bench",
3419 srcs = [
3420 "bench/f32-raddexpminusmax.cc",
3421 "src/xnnpack/AlignedAllocator.h",
3422 ] + MICROKERNEL_BENCHMARK_HDRS,
3423 deps = MICROKERNEL_BENCHMARK_DEPS,
3424)
3425
3426xnnpack_benchmark(
3427 name = "f32_raddextexp_bench",
3428 srcs = [
3429 "bench/f32-raddextexp.cc",
3430 "src/xnnpack/AlignedAllocator.h",
3431 ] + MICROKERNEL_BENCHMARK_HDRS,
3432 deps = MICROKERNEL_BENCHMARK_DEPS,
3433)
3434
3435xnnpack_benchmark(
3436 name = "f32_raddstoreexpminusmax_bench",
3437 srcs = [
3438 "bench/f32-raddstoreexpminusmax.cc",
3439 "src/xnnpack/AlignedAllocator.h",
3440 ] + MICROKERNEL_BENCHMARK_HDRS,
3441 deps = MICROKERNEL_BENCHMARK_DEPS,
3442)
3443
3444xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3445 name = "f32_rmax_bench",
3446 srcs = [
3447 "bench/f32-rmax.cc",
3448 "src/xnnpack/AlignedAllocator.h",
3449 ] + MICROKERNEL_BENCHMARK_HDRS,
3450 deps = MICROKERNEL_BENCHMARK_DEPS,
3451)
3452
3453xnnpack_benchmark(
Marat Dukhan14bec502019-11-18 11:35:31 -0800[diff] [blame]3454 name = "f32_sigmoid_bench",
3455 srcs = [
3456 "bench/f32-sigmoid.cc",
3457 "src/xnnpack/AlignedAllocator.h",
3458 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhan14bec502019-11-18 11:35:31 -0800[diff] [blame]3459 deps = MICROKERNEL_BENCHMARK_DEPS,
3460)
3461
3462xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3463 name = "f32_spmm_bench",
3464 srcs = [
3465 "bench/f32-spmm.cc",
3466 "bench/gemm.h",
3467 "src/xnnpack/AlignedAllocator.h",
3468 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3469 deps = MICROKERNEL_BENCHMARK_DEPS,
3470)
3471
3472xnnpack_benchmark(
Marat Dukhanfd8e6892020-01-27 15:25:25 -0800[diff] [blame]3473 name = "f32_softmax_bench",
Marat Dukhan4a4a7fa2019-10-21 13:46:14 -0700[diff] [blame]3474 srcs = [
Marat Dukhanfd8e6892020-01-27 15:25:25 -0800[diff] [blame]3475 "bench/f32-softmax.cc",
Marat Dukhan4a4a7fa2019-10-21 13:46:14 -0700[diff] [blame]3476 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]3477 copts = xnnpack_optional_dnnl_copts(),
Marat Dukhan8d3c6932020-03-06 20:27:27 -0800[diff] [blame]3478 deps = MICROKERNEL_BENCHMARK_DEPS + xnnpack_optional_dnnl_deps(),
Marat Dukhan4a4a7fa2019-10-21 13:46:14 -0700[diff] [blame]3479)
3480
3481xnnpack_benchmark(
Marat Dukhan4c4eb002019-12-08 21:27:49 -0800[diff] [blame]3482 name = "f32_vscaleexpminusmax_bench",
3483 srcs = [
3484 "bench/f32-vscaleexpminusmax.cc",
3485 "src/xnnpack/AlignedAllocator.h",
3486 ] + MICROKERNEL_BENCHMARK_HDRS,
3487 deps = MICROKERNEL_BENCHMARK_DEPS,
3488)
3489
3490xnnpack_benchmark(
3491 name = "f32_vscaleextexp_bench",
3492 srcs = [
3493 "bench/f32-vscaleextexp.cc",
3494 "src/xnnpack/AlignedAllocator.h",
3495 ] + MICROKERNEL_BENCHMARK_HDRS,
3496 deps = MICROKERNEL_BENCHMARK_DEPS,
3497)
3498
3499xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3500 name = "f32_im2col_gemm_bench",
3501 srcs = [
3502 "bench/f32-im2col-gemm.cc",
3503 "bench/conv.h",
3504 "src/xnnpack/AlignedAllocator.h",
3505 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
3506 deps = MICROKERNEL_BENCHMARK_DEPS + [":im2col"],
3507)
3508
Marat Dukhanfe7acb62020-03-09 19:30:05 -0700[diff] [blame]3509xnnpack_benchmark(
3510 name = "requantization_bench",
3511 srcs = [
3512 "bench/requantization.cc",
3513 "src/xnnpack/requantization-stubs.h",
3514 "src/xnnpack/AlignedAllocator.h",
3515 ] + MICROKERNEL_BENCHMARK_HDRS,
3516 deps = MICROKERNEL_BENCHMARK_DEPS,
3517)
3518
Marat Dukhanffbf96a2020-05-14 02:59:08 -0700[diff] [blame]3519xnnpack_benchmark(
3520 name = "rounding_bench",
3521 srcs = [
3522 "bench/rounding.cc",
3523 "src/xnnpack/math-stubs.h",
3524 "src/xnnpack/AlignedAllocator.h",
3525 ] + MICROKERNEL_BENCHMARK_HDRS,
3526 deps = MICROKERNEL_BENCHMARK_DEPS,
3527)
3528
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3529########################### Benchmarks for operators ###########################
3530
3531xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3532 name = "average_pooling_bench",
3533 srcs = ["bench/average-pooling.cc"],
Marat Dukhan7a16d8b2020-03-11 04:22:44 -0700[diff] [blame]3534 copts = xnnpack_optional_tflite_copts(),
Marat Dukhan8ea0b072020-04-23 16:12:18 -0700[diff] [blame]3535 tags = ["nowin32"],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]3536 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3537)
3538
3539xnnpack_benchmark(
3540 name = "channel_shuffle_bench",
3541 srcs = ["bench/channel-shuffle.cc"],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]3542 deps = OPERATOR_BENCHMARK_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3543)
3544
3545xnnpack_benchmark(
3546 name = "convolution_bench",
3547 srcs = ["bench/convolution.cc"],
3548 copts = xnnpack_optional_tflite_copts() + xnnpack_optional_armcl_copts(),
Marat Dukhan8ea0b072020-04-23 16:12:18 -0700[diff] [blame]3549 tags = ["nowin32"],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]3550 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps() + xnnpack_optional_armcl_deps(),
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3551)
3552
3553xnnpack_benchmark(
3554 name = "deconvolution_bench",
3555 srcs = ["bench/deconvolution.cc"],
3556 copts = xnnpack_optional_tflite_copts(),
Marat Dukhan8ea0b072020-04-23 16:12:18 -0700[diff] [blame]3557 tags = ["nowin32"],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]3558 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3559)
3560
3561xnnpack_benchmark(
3562 name = "global_average_pooling_bench",
3563 srcs = ["bench/global-average-pooling.cc"],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]3564 deps = OPERATOR_BENCHMARK_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3565)
3566
3567xnnpack_benchmark(
3568 name = "max_pooling_bench",
3569 srcs = ["bench/max-pooling.cc"],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]3570 deps = OPERATOR_BENCHMARK_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3571)
3572
3573xnnpack_benchmark(
3574 name = "sigmoid_bench",
3575 srcs = ["bench/sigmoid.cc"],
Marat Dukhanc3b9e862019-11-17 13:18:54 -0800[diff] [blame]3576 copts = xnnpack_optional_tflite_copts(),
Marat Dukhanca2ba702020-04-24 01:31:47 -0700[diff] [blame]3577 tags = ["nowin32"],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]3578 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3579)
3580
3581xnnpack_benchmark(
Marat Dukhan95b22432019-10-30 16:30:14 -0700[diff] [blame]3582 name = "prelu_bench",
3583 srcs = ["bench/prelu.cc"],
3584 copts = xnnpack_optional_tflite_copts(),
Marat Dukhan8ea0b072020-04-23 16:12:18 -0700[diff] [blame]3585 tags = ["nowin32"],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]3586 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
Marat Dukhan95b22432019-10-30 16:30:14 -0700[diff] [blame]3587)
3588
3589xnnpack_benchmark(
Marat Dukhanfd8e6892020-01-27 15:25:25 -0800[diff] [blame]3590 name = "softmax_bench",
3591 srcs = ["bench/softmax.cc"],
Marat Dukhan9c0db962020-01-28 12:30:14 -0800[diff] [blame]3592 copts = xnnpack_optional_tflite_copts(),
Marat Dukhanca2ba702020-04-24 01:31:47 -0700[diff] [blame]3593 tags = ["nowin32"],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]3594 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3595)
3596
Marat Dukhanc068bb62019-10-04 13:24:39 -0700[diff] [blame]3597############################# End-to-end benchmarks ############################
3598
3599cc_library(
3600 name = "mobilenet_v1",
3601 srcs = ["models/mobilenet-v1.cc"],
3602 hdrs = ["models/models.h"],
Marat Dukhana84e40b2019-12-11 15:38:03 -0800[diff] [blame]3603 copts = xnnpack_std_cxxopts(),
Marat Dukhanc068bb62019-10-04 13:24:39 -0700[diff] [blame]3604 linkstatic = True,
3605 deps = [
3606 ":XNNPACK",
3607 "@pthreadpool",
3608 ],
3609)
3610
3611cc_library(
3612 name = "mobilenet_v2",
3613 srcs = ["models/mobilenet-v2.cc"],
3614 hdrs = ["models/models.h"],
Marat Dukhana84e40b2019-12-11 15:38:03 -0800[diff] [blame]3615 copts = xnnpack_std_cxxopts(),
Marat Dukhanc068bb62019-10-04 13:24:39 -0700[diff] [blame]3616 linkstatic = True,
3617 deps = [
3618 ":XNNPACK",
3619 "@pthreadpool",
3620 ],
3621)
3622
Marat Dukhanc08cdf52019-12-09 09:17:51 -0800[diff] [blame]3623cc_library(
3624 name = "mobilenet_v3_large",
3625 srcs = ["models/mobilenet-v3-large.cc"],
3626 hdrs = ["models/models.h"],
Marat Dukhana84e40b2019-12-11 15:38:03 -0800[diff] [blame]3627 copts = xnnpack_std_cxxopts(),
Marat Dukhanc08cdf52019-12-09 09:17:51 -0800[diff] [blame]3628 linkstatic = True,
3629 deps = [
3630 ":XNNPACK",
3631 "@pthreadpool",
3632 ],
3633)
3634
3635cc_library(
3636 name = "mobilenet_v3_small",
3637 srcs = ["models/mobilenet-v3-small.cc"],
3638 hdrs = ["models/models.h"],
Marat Dukhana84e40b2019-12-11 15:38:03 -0800[diff] [blame]3639 copts = xnnpack_std_cxxopts(),
Marat Dukhanc08cdf52019-12-09 09:17:51 -0800[diff] [blame]3640 linkstatic = True,
3641 deps = [
3642 ":XNNPACK",
3643 "@pthreadpool",
3644 ],
3645)
3646
Marat Dukhanc068bb62019-10-04 13:24:39 -0700[diff] [blame]3647xnnpack_benchmark(
Marat Dukhanef4416e2019-10-31 13:44:40 -0700[diff] [blame]3648 name = "f32_dwconv_e2e_bench",
Marat Dukhanc08cdf52019-12-09 09:17:51 -0800[diff] [blame]3649 srcs = [
3650 "bench/f32-dwconv-e2e.cc",
3651 "bench/end2end.h",
3652 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanef4416e2019-10-31 13:44:40 -0700[diff] [blame]3653 deps = MICROKERNEL_BENCHMARK_DEPS + [
3654 ":XNNPACK",
3655 ":mobilenet_v1",
3656 ":mobilenet_v2",
Marat Dukhanc08cdf52019-12-09 09:17:51 -0800[diff] [blame]3657 ":mobilenet_v3_large",
3658 ":mobilenet_v3_small",
Marat Dukhanef4416e2019-10-31 13:44:40 -0700[diff] [blame]3659 ],
3660)
3661
3662xnnpack_benchmark(
Marat Dukhan5f18d262019-10-31 10:24:14 -0700[diff] [blame]3663 name = "f32_gemm_e2e_bench",
Marat Dukhanc08cdf52019-12-09 09:17:51 -0800[diff] [blame]3664 srcs = [
3665 "bench/f32-gemm-e2e.cc",
3666 "bench/end2end.h",
3667 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhan5f18d262019-10-31 10:24:14 -0700[diff] [blame]3668 deps = MICROKERNEL_BENCHMARK_DEPS + [
3669 ":XNNPACK",
3670 ":mobilenet_v1",
3671 ":mobilenet_v2",
Marat Dukhanc08cdf52019-12-09 09:17:51 -0800[diff] [blame]3672 ":mobilenet_v3_large",
3673 ":mobilenet_v3_small",
Marat Dukhan5f18d262019-10-31 10:24:14 -0700[diff] [blame]3674 ],
3675)
3676
3677xnnpack_benchmark(
Marat Dukhanc068bb62019-10-04 13:24:39 -0700[diff] [blame]3678 name = "end2end_bench",
3679 srcs = ["bench/end2end.cc"],
3680 deps = [
3681 ":XNNPACK",
Frank Barchardc712fa42019-10-31 14:00:21 -0700[diff] [blame]3682 ":bench_utils",
Marat Dukhanc068bb62019-10-04 13:24:39 -0700[diff] [blame]3683 ":mobilenet_v1",
3684 ":mobilenet_v2",
Marat Dukhanc08cdf52019-12-09 09:17:51 -0800[diff] [blame]3685 ":mobilenet_v3_large",
3686 ":mobilenet_v3_small",
Marat Dukhanc068bb62019-10-04 13:24:39 -0700[diff] [blame]3687 "@pthreadpool",
3688 ],
3689)
3690
Marat Dukhan6adff4e2019-10-14 18:32:07 -0700[diff] [blame]3691#################### Accuracy evaluation for math functions ####################
3692
3693xnnpack_benchmark(
3694 name = "f32_exp_eval",
3695 srcs = [
3696 "eval/f32-exp.cc",
3697 "src/xnnpack/AlignedAllocator.h",
3698 ] + ACCURACY_EVAL_HDRS,
3699 deps = ACCURACY_EVAL_DEPS,
3700)
3701
Marat Dukhan515c9772019-10-17 18:07:57 -0700[diff] [blame]3702xnnpack_benchmark(
3703 name = "f32_expminus_eval",
3704 srcs = [
3705 "eval/f32-expminus.cc",
3706 "src/xnnpack/AlignedAllocator.h",
3707 ] + ACCURACY_EVAL_HDRS,
3708 deps = ACCURACY_EVAL_DEPS,
3709)
3710
Marat Dukhan98ba4412019-10-23 02:14:28 -0700[diff] [blame]3711xnnpack_benchmark(
3712 name = "f32_extexp_eval",
3713 srcs = [
3714 "eval/f32-extexp.cc",
3715 "src/xnnpack/AlignedAllocator.h",
3716 ] + ACCURACY_EVAL_HDRS,
3717 deps = ACCURACY_EVAL_DEPS,
3718)
3719
Marat Dukhan8853b822020-05-07 12:19:01 -0700[diff] [blame]3720xnnpack_unit_test(
3721 name = "f32_roundne_eval",
3722 srcs = [
3723 "eval/f32-roundne.cc",
3724 "src/xnnpack/AlignedAllocator.h",
3725 "src/xnnpack/math-stubs.h",
3726 ] + MICROKERNEL_TEST_HDRS,
Marat Dukhan22eed3d2020-05-11 20:13:37 -0700[diff] [blame]3727 automatic = False,
Marat Dukhan8853b822020-05-07 12:19:01 -0700[diff] [blame]3728 deps = MICROKERNEL_TEST_DEPS,
3729)
3730
Marat Dukhan2dbb9442020-05-12 20:43:43 -0700[diff] [blame]3731xnnpack_unit_test(
Marat Dukhanc9852ba2020-05-13 17:21:29 -0700[diff] [blame]3732 name = "f32_roundd_eval",
3733 srcs = [
3734 "eval/f32-roundd.cc",
3735 "src/xnnpack/AlignedAllocator.h",
3736 "src/xnnpack/math-stubs.h",
3737 ] + MICROKERNEL_TEST_HDRS,
3738 automatic = False,
3739 deps = MICROKERNEL_TEST_DEPS,
3740)
3741
3742xnnpack_unit_test(
3743 name = "f32_roundu_eval",
3744 srcs = [
3745 "eval/f32-roundu.cc",
3746 "src/xnnpack/AlignedAllocator.h",
3747 "src/xnnpack/math-stubs.h",
3748 ] + MICROKERNEL_TEST_HDRS,
3749 automatic = False,
3750 deps = MICROKERNEL_TEST_DEPS,
3751)
3752
3753xnnpack_unit_test(
Marat Dukhan2dbb9442020-05-12 20:43:43 -0700[diff] [blame]3754 name = "f32_roundz_eval",
3755 srcs = [
3756 "eval/f32-roundz.cc",
3757 "src/xnnpack/AlignedAllocator.h",
3758 "src/xnnpack/math-stubs.h",
3759 ] + MICROKERNEL_TEST_HDRS,
Marat Dukhanc9852ba2020-05-13 17:21:29 -0700[diff] [blame]3760 automatic = False,
Marat Dukhan2dbb9442020-05-12 20:43:43 -0700[diff] [blame]3761 deps = MICROKERNEL_TEST_DEPS,
3762)
3763
Marat Dukhan346a9e52019-11-15 09:06:30 -0800[diff] [blame]3764xnnpack_benchmark(
3765 name = "f32_sigmoid_eval",
3766 srcs = [
3767 "eval/f32-sigmoid.cc",
3768 "src/xnnpack/AlignedAllocator.h",
3769 ] + ACCURACY_EVAL_HDRS,
3770 deps = ACCURACY_EVAL_DEPS,
3771)
3772
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3773######################### Unit tests for micro-kernels #########################
3774
3775xnnpack_unit_test(
Marat Dukhande06f492020-04-09 00:19:31 -0700[diff] [blame]3776 name = "f16_gemm_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3777 srcs = [
Marat Dukhande06f492020-04-09 00:19:31 -0700[diff] [blame]3778 "test/f16-gemm-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3779 "test/gemm-microkernel-tester.h",
3780 "src/xnnpack/AlignedAllocator.h",
3781 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
3782 deps = MICROKERNEL_TEST_DEPS,
3783)
3784
3785xnnpack_unit_test(
Marat Dukhan355ab432020-04-09 19:01:52 -0700[diff] [blame]3786 name = "f16_spmm_minmax_test",
Marat Dukhanbdb56f52020-02-05 21:42:49 -0800[diff] [blame]3787 srcs = [
Marat Dukhan355ab432020-04-09 19:01:52 -0700[diff] [blame]3788 "test/f16-spmm-minmax.cc",
Marat Dukhanbdb56f52020-02-05 21:42:49 -0800[diff] [blame]3789 "test/spmm-microkernel-tester.h",
3790 "src/xnnpack/AlignedAllocator.h",
3791 ] + MICROKERNEL_TEST_HDRS,
3792 deps = MICROKERNEL_TEST_DEPS,
3793)
3794
3795xnnpack_unit_test(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3796 name = "f32_argmaxpool_test",
3797 srcs = [
3798 "test/f32-argmaxpool.cc",
3799 "test/argmaxpool-microkernel-tester.h",
3800 "src/xnnpack/AlignedAllocator.h",
3801 ] + MICROKERNEL_TEST_HDRS,
3802 deps = MICROKERNEL_TEST_DEPS,
3803)
3804
3805xnnpack_unit_test(
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]3806 name = "f32_avgpool_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3807 srcs = [
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]3808 "test/f32-avgpool-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3809 "test/avgpool-microkernel-tester.h",
3810 "src/xnnpack/AlignedAllocator.h",
3811 ] + MICROKERNEL_TEST_HDRS,
3812 deps = MICROKERNEL_TEST_DEPS,
3813)
3814
3815xnnpack_unit_test(
Marat Dukhan660fd192020-03-10 04:55:30 -0700[diff] [blame]3816 name = "f32_ibilinear_test",
Marat Dukhan35dacfb2019-11-07 19:18:16 -0800[diff] [blame]3817 srcs = [
Marat Dukhan660fd192020-03-10 04:55:30 -0700[diff] [blame]3818 "test/f32-ibilinear.cc",
3819 "test/ibilinear-microkernel-tester.h",
Marat Dukhan35dacfb2019-11-07 19:18:16 -0800[diff] [blame]3820 "src/xnnpack/AlignedAllocator.h",
3821 ] + MICROKERNEL_TEST_HDRS,
3822 deps = MICROKERNEL_TEST_DEPS,
3823)
3824
3825xnnpack_unit_test(
Frank Barchardb1966592020-05-12 13:47:06 -0700[diff] [blame]3826 name = "f16_clamp_test",
3827 srcs = [
3828 "test/f16-clamp.cc",
3829 "test/clamp-microkernel-tester.h",
3830 ] + MICROKERNEL_TEST_HDRS,
3831 deps = MICROKERNEL_TEST_DEPS,
3832)
3833
3834xnnpack_unit_test(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3835 name = "f32_clamp_test",
3836 srcs = [
3837 "test/f32-clamp.cc",
3838 "test/clamp-microkernel-tester.h",
3839 ] + MICROKERNEL_TEST_HDRS,
3840 deps = MICROKERNEL_TEST_DEPS,
3841)
3842
3843xnnpack_unit_test(
Marat Dukhan163a7e62020-04-09 04:19:26 -0700[diff] [blame]3844 name = "f32_igemm_test",
3845 srcs = [
3846 "test/f32-igemm.cc",
3847 "test/gemm-microkernel-tester.h",
3848 "src/xnnpack/AlignedAllocator.h",
3849 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
3850 deps = MICROKERNEL_TEST_DEPS,
3851)
3852
3853xnnpack_unit_test(
Marat Dukhan467f6362020-05-22 23:21:55 -0700[diff] [blame]3854 name = "f32_igemm_relu_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3855 srcs = [
Marat Dukhan467f6362020-05-22 23:21:55 -0700[diff] [blame]3856 "test/f32-igemm-relu.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3857 "test/gemm-microkernel-tester.h",
3858 "src/xnnpack/AlignedAllocator.h",
3859 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
3860 deps = MICROKERNEL_TEST_DEPS,
3861)
3862
3863xnnpack_unit_test(
Marat Dukhane207b7b2020-05-28 16:27:42 -0700[diff] [blame]3864 name = "f32_igemm_minmax_test",
3865 srcs = [
3866 "test/f32-igemm-minmax.cc",
3867 "test/gemm-microkernel-tester.h",
3868 "src/xnnpack/AlignedAllocator.h",
3869 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
3870 deps = MICROKERNEL_TEST_DEPS,
3871)
3872
3873xnnpack_unit_test(
Frank Barchardb0e4fae2020-05-04 15:27:51 -0700[diff] [blame]3874 name = "f16_igemm_minmax_test",
3875 srcs = [
3876 "test/f16-igemm-minmax.cc",
3877 "test/gemm-microkernel-tester.h",
3878 "src/xnnpack/AlignedAllocator.h",
3879 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
3880 deps = MICROKERNEL_TEST_DEPS,
3881)
3882
3883xnnpack_unit_test(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3884 name = "f32_conv_hwc_test",
3885 srcs = [
3886 "test/f32-conv-hwc.cc",
3887 "test/conv-hwc-microkernel-tester.h",
3888 "src/xnnpack/AlignedAllocator.h",
3889 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
3890 deps = MICROKERNEL_TEST_DEPS,
3891)
3892
3893xnnpack_unit_test(
Marat Dukhan1f29b802020-05-15 23:46:39 -0700[diff] [blame]3894 name = "f32_conv_hwc2chw_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3895 srcs = [
Marat Dukhan1f29b802020-05-15 23:46:39 -0700[diff] [blame]3896 "test/f32-conv-hwc2chw.cc",
3897 "test/conv-hwc2chw-microkernel-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3898 "src/xnnpack/AlignedAllocator.h",
3899 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
3900 deps = MICROKERNEL_TEST_DEPS,
3901)
3902
3903xnnpack_unit_test(
Marat Dukhan163a7e62020-04-09 04:19:26 -0700[diff] [blame]3904 name = "f32_dwconv_test",
3905 srcs = [
3906 "test/f32-dwconv.cc",
3907 "test/dwconv-microkernel-tester.h",
3908 "src/xnnpack/AlignedAllocator.h",
3909 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
3910 deps = MICROKERNEL_TEST_DEPS,
3911)
3912
3913xnnpack_unit_test(
Frank Barchard5a599a62020-06-04 20:12:44 -0700[diff] [blame]3914 name = "f16_dwconv_minmax_test",
3915 srcs = [
3916 "test/f16-dwconv-minmax.cc",
3917 "test/dwconv-microkernel-tester.h",
3918 "src/xnnpack/AlignedAllocator.h",
3919 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
3920 deps = MICROKERNEL_TEST_DEPS,
3921)
3922
3923xnnpack_unit_test(
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]3924 name = "f32_dwconv_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3925 srcs = [
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]3926 "test/f32-dwconv-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3927 "test/dwconv-microkernel-tester.h",
3928 "src/xnnpack/AlignedAllocator.h",
3929 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
3930 deps = MICROKERNEL_TEST_DEPS,
3931)
3932
3933xnnpack_unit_test(
Marat Dukhan1f29b802020-05-15 23:46:39 -0700[diff] [blame]3934 name = "f32_dwconv_chw_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3935 srcs = [
Marat Dukhan1f29b802020-05-15 23:46:39 -0700[diff] [blame]3936 "test/f32-dwconv-chw.cc",
3937 "test/dwconv-chw-microkernel-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3938 "src/xnnpack/AlignedAllocator.h",
3939 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
3940 deps = MICROKERNEL_TEST_DEPS,
3941)
3942
3943xnnpack_unit_test(
Frank Barchard0bb49a72020-06-04 11:35:11 -0700[diff] [blame]3944 name = "f16_gavgpool_minmax_test",
3945 srcs = [
3946 "test/f16-gavgpool-minmax.cc",
3947 "test/gavgpool-microkernel-tester.h",
3948 "src/xnnpack/AlignedAllocator.h",
3949 ] + MICROKERNEL_TEST_HDRS,
3950 deps = MICROKERNEL_TEST_DEPS,
3951)
3952
3953xnnpack_unit_test(
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]3954 name = "f32_gavgpool_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3955 srcs = [
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]3956 "test/f32-gavgpool-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3957 "test/gavgpool-microkernel-tester.h",
3958 "src/xnnpack/AlignedAllocator.h",
3959 ] + MICROKERNEL_TEST_HDRS,
3960 deps = MICROKERNEL_TEST_DEPS,
3961)
3962
3963xnnpack_unit_test(
Marat Dukhan1f29b802020-05-15 23:46:39 -0700[diff] [blame]3964 name = "f32_gavgpool_cw_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3965 srcs = [
Marat Dukhan1f29b802020-05-15 23:46:39 -0700[diff] [blame]3966 "test/f32-gavgpool-cw.cc",
3967 "test/gavgpool-cw-microkernel-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3968 "src/xnnpack/AlignedAllocator.h",
3969 ] + MICROKERNEL_TEST_HDRS,
3970 deps = MICROKERNEL_TEST_DEPS,
3971)
3972
3973xnnpack_unit_test(
Marat Dukhan163a7e62020-04-09 04:19:26 -0700[diff] [blame]3974 name = "f32_gemm_test",
3975 srcs = [
3976 "test/f32-gemm.cc",
3977 "test/gemm-microkernel-tester.h",
3978 "src/xnnpack/AlignedAllocator.h",
3979 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
3980 deps = MICROKERNEL_TEST_DEPS,
3981)
3982
3983xnnpack_unit_test(
Marat Dukhan467f6362020-05-22 23:21:55 -0700[diff] [blame]3984 name = "f32_gemm_relu_test",
3985 srcs = [
3986 "test/f32-gemm-relu.cc",
3987 "test/gemm-microkernel-tester.h",
3988 "src/xnnpack/AlignedAllocator.h",
3989 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
3990 deps = MICROKERNEL_TEST_DEPS,
3991)
3992
3993xnnpack_unit_test(
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]3994 name = "f32_gemm_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3995 srcs = [
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]3996 "test/f32-gemm-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3997 "test/gemm-microkernel-tester.h",
3998 "src/xnnpack/AlignedAllocator.h",
3999 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
4000 deps = MICROKERNEL_TEST_DEPS,
4001)
4002
4003xnnpack_unit_test(
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]4004 name = "f32_gemminc_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4005 srcs = [
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]4006 "test/f32-gemminc-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4007 "test/gemm-microkernel-tester.h",
4008 "src/xnnpack/AlignedAllocator.h",
4009 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
4010 deps = MICROKERNEL_TEST_DEPS,
4011)
4012
4013xnnpack_unit_test(
Frank Barchardb1966592020-05-12 13:47:06 -0700[diff] [blame]4014 name = "f16_hswish_test",
4015 srcs = [
4016 "test/f16-hswish.cc",
4017 "test/hswish-microkernel-tester.h",
4018 ] + MICROKERNEL_TEST_HDRS,
4019 deps = MICROKERNEL_TEST_DEPS,
4020)
4021
4022xnnpack_unit_test(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4023 name = "f32_hswish_test",
4024 srcs = [
4025 "test/f32-hswish.cc",
4026 "test/hswish-microkernel-tester.h",
4027 ] + MICROKERNEL_TEST_HDRS,
4028 deps = MICROKERNEL_TEST_DEPS,
4029)
4030
4031xnnpack_unit_test(
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]4032 name = "f32_maxpool_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4033 srcs = [
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]4034 "test/f32-maxpool-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4035 "test/maxpool-microkernel-tester.h",
4036 ] + MICROKERNEL_TEST_HDRS,
4037 deps = MICROKERNEL_TEST_DEPS,
4038)
4039
4040xnnpack_unit_test(
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]4041 name = "f32_pavgpool_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4042 srcs = [
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]4043 "test/f32-pavgpool-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4044 "test/avgpool-microkernel-tester.h",
4045 "src/xnnpack/AlignedAllocator.h",
4046 ] + MICROKERNEL_TEST_HDRS,
4047 deps = MICROKERNEL_TEST_DEPS,
4048)
4049
4050xnnpack_unit_test(
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]4051 name = "f32_ppmm_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4052 srcs = [
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]4053 "test/f32-ppmm-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4054 "test/gemm-microkernel-tester.h",
4055 "src/xnnpack/AlignedAllocator.h",
4056 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
4057 deps = MICROKERNEL_TEST_DEPS,
4058)
4059
4060xnnpack_unit_test(
Frank Barchardb1966592020-05-12 13:47:06 -0700[diff] [blame]4061 name = "f16_prelu_test",
4062 srcs = [
4063 "test/f16-prelu.cc",
4064 "test/prelu-microkernel-tester.h",
4065 "src/xnnpack/AlignedAllocator.h",
4066 ] + MICROKERNEL_TEST_HDRS,
4067 deps = MICROKERNEL_TEST_DEPS,
4068)
4069
4070xnnpack_unit_test(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4071 name = "f32_prelu_test",
4072 srcs = [
4073 "test/f32-prelu.cc",
4074 "test/prelu-microkernel-tester.h",
4075 "src/xnnpack/AlignedAllocator.h",
4076 ] + MICROKERNEL_TEST_HDRS,
4077 deps = MICROKERNEL_TEST_DEPS,
4078)
4079
4080xnnpack_unit_test(
Marat Dukhan97579532019-10-18 16:40:39 -0700[diff] [blame]4081 name = "f32_raddexpminusmax_test",
4082 srcs = [
4083 "test/f32-raddexpminusmax.cc",
4084 "test/raddexpminusmax-microkernel-tester.h",
4085 ] + MICROKERNEL_TEST_HDRS,
4086 deps = MICROKERNEL_TEST_DEPS,
4087)
4088
4089xnnpack_unit_test(
Marat Dukhan6f8d4d32019-10-25 17:07:09 -0700[diff] [blame]4090 name = "f32_raddextexp_test",
4091 srcs = [
4092 "test/f32-raddextexp.cc",
4093 "test/raddextexp-microkernel-tester.h",
4094 ] + MICROKERNEL_TEST_HDRS,
4095 deps = MICROKERNEL_TEST_DEPS,
4096)
4097
4098xnnpack_unit_test(
Marat Dukhan97579532019-10-18 16:40:39 -0700[diff] [blame]4099 name = "f32_raddstoreexpminusmax_test",
4100 srcs = [
4101 "test/f32-raddstoreexpminusmax.cc",
4102 "test/raddstoreexpminusmax-microkernel-tester.h",
4103 ] + MICROKERNEL_TEST_HDRS,
4104 deps = MICROKERNEL_TEST_DEPS,
4105)
4106
4107xnnpack_unit_test(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4108 name = "f32_rmax_test",
4109 srcs = [
4110 "test/f32-rmax.cc",
4111 "test/rmax-microkernel-tester.h",
4112 ] + MICROKERNEL_TEST_HDRS,
4113 deps = MICROKERNEL_TEST_DEPS,
4114)
4115
4116xnnpack_unit_test(
Marat Dukhan346a9e52019-11-15 09:06:30 -0800[diff] [blame]4117 name = "f32_sigmoid_test",
4118 srcs = [
4119 "test/f32-sigmoid.cc",
Marat Dukhan1e782c42019-11-21 17:02:40 -0800[diff] [blame]4120 "test/vunary-microkernel-tester.h",
Marat Dukhan346a9e52019-11-15 09:06:30 -0800[diff] [blame]4121 ] + MICROKERNEL_TEST_HDRS,
4122 deps = MICROKERNEL_TEST_DEPS,
4123)
4124
4125xnnpack_unit_test(
Marat Dukhan355ab432020-04-09 19:01:52 -0700[diff] [blame]4126 name = "f32_spmm_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4127 srcs = [
Marat Dukhan355ab432020-04-09 19:01:52 -0700[diff] [blame]4128 "test/f32-spmm-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4129 "test/spmm-microkernel-tester.h",
4130 "src/xnnpack/AlignedAllocator.h",
4131 ] + MICROKERNEL_TEST_HDRS,
4132 deps = MICROKERNEL_TEST_DEPS,
4133)
4134
4135xnnpack_unit_test(
Frank Barchardd793f6c2020-05-08 13:37:43 -0700[diff] [blame]4136 name = "f16_vadd_minmax_test",
4137 srcs = [
4138 "test/f16-vadd-minmax.cc",
4139 "test/vbinary-microkernel-tester.h",
4140 ] + MICROKERNEL_TEST_HDRS,
4141 deps = MICROKERNEL_TEST_DEPS,
4142)
4143
4144xnnpack_unit_test(
4145 name = "f16_vaddc_minmax_test",
4146 srcs = [
4147 "test/f16-vaddc-minmax.cc",
4148 "test/vbinaryc-microkernel-tester.h",
4149 ] + MICROKERNEL_TEST_HDRS,
4150 deps = MICROKERNEL_TEST_DEPS,
4151)
4152
4153xnnpack_unit_test(
4154 name = "f16_vdiv_minmax_test",
4155 srcs = [
4156 "test/f16-vdiv-minmax.cc",
4157 "test/vbinary-microkernel-tester.h",
4158 ] + MICROKERNEL_TEST_HDRS,
4159 deps = MICROKERNEL_TEST_DEPS,
4160)
4161
4162xnnpack_unit_test(
4163 name = "f16_vdivc_minmax_test",
4164 srcs = [
4165 "test/f16-vdivc-minmax.cc",
4166 "test/vbinaryc-microkernel-tester.h",
4167 ] + MICROKERNEL_TEST_HDRS,
4168 deps = MICROKERNEL_TEST_DEPS,
4169)
4170
4171xnnpack_unit_test(
4172 name = "f16_vrdivc_minmax_test",
4173 srcs = [
4174 "test/f16-vrdivc-minmax.cc",
4175 "test/vbinaryc-microkernel-tester.h",
4176 ] + MICROKERNEL_TEST_HDRS,
4177 deps = MICROKERNEL_TEST_DEPS,
4178)
4179
4180xnnpack_unit_test(
4181 name = "f16_vmax_test",
4182 srcs = [
4183 "test/f16-vmax.cc",
4184 "test/vbinary-microkernel-tester.h",
4185 ] + MICROKERNEL_TEST_HDRS,
4186 deps = MICROKERNEL_TEST_DEPS,
4187)
4188
4189xnnpack_unit_test(
4190 name = "f16_vmaxc_test",
4191 srcs = [
4192 "test/f16-vmaxc.cc",
4193 "test/vbinaryc-microkernel-tester.h",
4194 ] + MICROKERNEL_TEST_HDRS,
4195 deps = MICROKERNEL_TEST_DEPS,
4196)
4197
4198xnnpack_unit_test(
4199 name = "f16_vmin_test",
4200 srcs = [
4201 "test/f16-vmin.cc",
4202 "test/vbinary-microkernel-tester.h",
4203 ] + MICROKERNEL_TEST_HDRS,
4204 deps = MICROKERNEL_TEST_DEPS,
4205)
4206
4207xnnpack_unit_test(
4208 name = "f16_vminc_test",
4209 srcs = [
4210 "test/f16-vminc.cc",
4211 "test/vbinaryc-microkernel-tester.h",
4212 ] + MICROKERNEL_TEST_HDRS,
4213 deps = MICROKERNEL_TEST_DEPS,
4214)
4215
4216xnnpack_unit_test(
4217 name = "f16_vmul_minmax_test",
4218 srcs = [
4219 "test/f16-vmul-minmax.cc",
4220 "test/vbinary-microkernel-tester.h",
4221 ] + MICROKERNEL_TEST_HDRS,
4222 deps = MICROKERNEL_TEST_DEPS,
4223)
4224
4225xnnpack_unit_test(
4226 name = "f16_vmulc_minmax_test",
4227 srcs = [
4228 "test/f16-vmulc-minmax.cc",
4229 "test/vbinaryc-microkernel-tester.h",
4230 ] + MICROKERNEL_TEST_HDRS,
4231 deps = MICROKERNEL_TEST_DEPS,
4232)
4233
4234xnnpack_unit_test(
4235 name = "f16_vsub_minmax_test",
4236 srcs = [
4237 "test/f16-vsub-minmax.cc",
4238 "test/vbinary-microkernel-tester.h",
4239 ] + MICROKERNEL_TEST_HDRS,
4240 deps = MICROKERNEL_TEST_DEPS,
4241)
4242
4243xnnpack_unit_test(
4244 name = "f16_vsubc_minmax_test",
4245 srcs = [
4246 "test/f16-vsubc-minmax.cc",
4247 "test/vbinaryc-microkernel-tester.h",
4248 ] + MICROKERNEL_TEST_HDRS,
4249 deps = MICROKERNEL_TEST_DEPS,
4250)
4251
4252xnnpack_unit_test(
4253 name = "f16_vrsubc_minmax_test",
4254 srcs = [
4255 "test/f16-vrsubc-minmax.cc",
4256 "test/vbinaryc-microkernel-tester.h",
4257 ] + MICROKERNEL_TEST_HDRS,
4258 deps = MICROKERNEL_TEST_DEPS,
4259)
4260
4261xnnpack_unit_test(
Marat Dukhan5020b962020-06-08 13:30:10 -0700[diff] [blame]4262 name = "f32_vabs_test",
4263 srcs = [
4264 "test/f32-vabs.cc",
4265 "test/vunary-microkernel-tester.h",
4266 ] + MICROKERNEL_TEST_HDRS,
4267 deps = MICROKERNEL_TEST_DEPS,
4268)
4269
4270xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]4271 name = "f32_vadd_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4272 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]4273 "test/f32-vadd-minmax.cc",
Marat Dukhan1e782c42019-11-21 17:02:40 -0800[diff] [blame]4274 "test/vbinary-microkernel-tester.h",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -0800[diff] [blame]4275 ] + MICROKERNEL_TEST_HDRS,
4276 deps = MICROKERNEL_TEST_DEPS,
4277)
4278
4279xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]4280 name = "f32_vaddc_minmax_test",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -0800[diff] [blame]4281 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]4282 "test/f32-vaddc-minmax.cc",
Marat Dukhan1e782c42019-11-21 17:02:40 -0800[diff] [blame]4283 "test/vbinaryc-microkernel-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4284 ] + MICROKERNEL_TEST_HDRS,
4285 deps = MICROKERNEL_TEST_DEPS,
4286)
4287
4288xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]4289 name = "f32_vdiv_minmax_test",
Marat Dukhan77ca6302019-12-06 12:48:15 -0800[diff] [blame]4290 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]4291 "test/f32-vdiv-minmax.cc",
Marat Dukhan77ca6302019-12-06 12:48:15 -0800[diff] [blame]4292 "test/vbinary-microkernel-tester.h",
4293 ] + MICROKERNEL_TEST_HDRS,
4294 deps = MICROKERNEL_TEST_DEPS,
4295)
4296
4297xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]4298 name = "f32_vdivc_minmax_test",
Marat Dukhan77ca6302019-12-06 12:48:15 -0800[diff] [blame]4299 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]4300 "test/f32-vdivc-minmax.cc",
Marat Dukhan77ca6302019-12-06 12:48:15 -0800[diff] [blame]4301 "test/vbinaryc-microkernel-tester.h",
4302 ] + MICROKERNEL_TEST_HDRS,
4303 deps = MICROKERNEL_TEST_DEPS,
4304)
4305
4306xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]4307 name = "f32_vrdivc_minmax_test",
Marat Dukhan77ca6302019-12-06 12:48:15 -0800[diff] [blame]4308 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]4309 "test/f32-vrdivc-minmax.cc",
Marat Dukhan77ca6302019-12-06 12:48:15 -0800[diff] [blame]4310 "test/vbinaryc-microkernel-tester.h",
4311 ] + MICROKERNEL_TEST_HDRS,
4312 deps = MICROKERNEL_TEST_DEPS,
4313)
4314
4315xnnpack_unit_test(
Marat Dukhan403b7d42019-12-05 12:49:11 -0800[diff] [blame]4316 name = "f32_vmax_test",
4317 srcs = [
4318 "test/f32-vmax.cc",
4319 "test/vbinary-microkernel-tester.h",
4320 ] + MICROKERNEL_TEST_HDRS,
4321 deps = MICROKERNEL_TEST_DEPS,
4322)
4323
4324xnnpack_unit_test(
4325 name = "f32_vmaxc_test",
4326 srcs = [
4327 "test/f32-vmaxc.cc",
4328 "test/vbinaryc-microkernel-tester.h",
4329 ] + MICROKERNEL_TEST_HDRS,
4330 deps = MICROKERNEL_TEST_DEPS,
4331)
4332
4333xnnpack_unit_test(
4334 name = "f32_vmin_test",
4335 srcs = [
4336 "test/f32-vmin.cc",
4337 "test/vbinary-microkernel-tester.h",
4338 ] + MICROKERNEL_TEST_HDRS,
4339 deps = MICROKERNEL_TEST_DEPS,
4340)
4341
4342xnnpack_unit_test(
4343 name = "f32_vminc_test",
4344 srcs = [
4345 "test/f32-vminc.cc",
4346 "test/vbinaryc-microkernel-tester.h",
4347 ] + MICROKERNEL_TEST_HDRS,
4348 deps = MICROKERNEL_TEST_DEPS,
4349)
4350
4351xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]4352 name = "f32_vmul_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4353 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]4354 "test/f32-vmul-minmax.cc",
Marat Dukhan1e782c42019-11-21 17:02:40 -0800[diff] [blame]4355 "test/vbinary-microkernel-tester.h",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -0800[diff] [blame]4356 ] + MICROKERNEL_TEST_HDRS,
4357 deps = MICROKERNEL_TEST_DEPS,
4358)
4359
4360xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]4361 name = "f32_vmulc_minmax_test",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -0800[diff] [blame]4362 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]4363 "test/f32-vmulc-minmax.cc",
Marat Dukhan1e782c42019-11-21 17:02:40 -0800[diff] [blame]4364 "test/vbinaryc-microkernel-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4365 ] + MICROKERNEL_TEST_HDRS,
4366 deps = MICROKERNEL_TEST_DEPS,
4367)
4368
4369xnnpack_unit_test(
Frank Barchard2a1049c2020-06-03 02:31:27 -0700[diff] [blame]4370 name = "f16_vmulcaddc_minmax_test",
4371 srcs = [
4372 "test/f16-vmulcaddc-minmax.cc",
4373 "test/vmulcaddc-microkernel-tester.h",
4374 "src/xnnpack/AlignedAllocator.h",
4375 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
4376 deps = MICROKERNEL_TEST_DEPS,
4377)
4378
4379xnnpack_unit_test(
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]4380 name = "f32_vmulcaddc_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4381 srcs = [
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]4382 "test/f32-vmulcaddc-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4383 "test/vmulcaddc-microkernel-tester.h",
4384 "src/xnnpack/AlignedAllocator.h",
4385 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
4386 deps = MICROKERNEL_TEST_DEPS,
4387)
4388
4389xnnpack_unit_test(
Marat Dukhan8cc7efe2020-06-10 16:24:27 -0700[diff] [blame]4390 name = "f32_vlrelu_test",
4391 srcs = [
4392 "test/f32-vlrelu.cc",
4393 "test/vunary-microkernel-tester.h",
4394 ] + MICROKERNEL_TEST_HDRS,
4395 deps = MICROKERNEL_TEST_DEPS,
4396)
4397
4398xnnpack_unit_test(
Marat Dukhan5020b962020-06-08 13:30:10 -0700[diff] [blame]4399 name = "f32_vneg_test",
4400 srcs = [
4401 "test/f32-vneg.cc",
4402 "test/vunary-microkernel-tester.h",
4403 ] + MICROKERNEL_TEST_HDRS,
4404 deps = MICROKERNEL_TEST_DEPS,
4405)
4406
4407xnnpack_unit_test(
Marat Dukhaneecf8fd2020-06-09 08:59:37 -0700[diff] [blame]4408 name = "f32_vrndne_test",
4409 srcs = [
4410 "test/f32-vrndne.cc",
4411 "test/vunary-microkernel-tester.h",
4412 ] + MICROKERNEL_TEST_HDRS,
4413 deps = MICROKERNEL_TEST_DEPS,
4414)
4415
4416xnnpack_unit_test(
4417 name = "f32_vrndz_test",
4418 srcs = [
4419 "test/f32-vrndz.cc",
4420 "test/vunary-microkernel-tester.h",
4421 ] + MICROKERNEL_TEST_HDRS,
4422 deps = MICROKERNEL_TEST_DEPS,
4423)
4424
4425xnnpack_unit_test(
4426 name = "f32_vrndu_test",
4427 srcs = [
4428 "test/f32-vrndu.cc",
4429 "test/vunary-microkernel-tester.h",
4430 ] + MICROKERNEL_TEST_HDRS,
4431 deps = MICROKERNEL_TEST_DEPS,
4432)
4433
4434xnnpack_unit_test(
4435 name = "f32_vrndd_test",
4436 srcs = [
4437 "test/f32-vrndd.cc",
4438 "test/vunary-microkernel-tester.h",
4439 ] + MICROKERNEL_TEST_HDRS,
4440 deps = MICROKERNEL_TEST_DEPS,
4441)
4442
4443xnnpack_unit_test(
Marat Dukhan05ac8e32019-10-21 15:39:33 -0700[diff] [blame]4444 name = "f32_vscale_test",
4445 srcs = [
4446 "test/f32-vscale.cc",
4447 "test/vscale-microkernel-tester.h",
4448 ] + MICROKERNEL_TEST_HDRS,
4449 deps = MICROKERNEL_TEST_DEPS,
4450)
4451
4452xnnpack_unit_test(
Marat Dukhan97579532019-10-18 16:40:39 -0700[diff] [blame]4453 name = "f32_vscaleexpminusmax_test",
4454 srcs = [
4455 "test/f32-vscaleexpminusmax.cc",
4456 "test/vscaleexpminusmax-microkernel-tester.h",
4457 ] + MICROKERNEL_TEST_HDRS,
4458 deps = MICROKERNEL_TEST_DEPS,
4459)
4460
4461xnnpack_unit_test(
Marat Dukhan6f8d4d32019-10-25 17:07:09 -0700[diff] [blame]4462 name = "f32_vscaleextexp_test",
4463 srcs = [
4464 "test/f32-vscaleextexp.cc",
4465 "test/vscaleextexp-microkernel-tester.h",
4466 ] + MICROKERNEL_TEST_HDRS,
4467 deps = MICROKERNEL_TEST_DEPS,
4468)
4469
4470xnnpack_unit_test(
Marat Dukhan5020b962020-06-08 13:30:10 -0700[diff] [blame]4471 name = "f32_vsqr_test",
4472 srcs = [
4473 "test/f32-vsqr.cc",
4474 "test/vunary-microkernel-tester.h",
4475 ] + MICROKERNEL_TEST_HDRS,
4476 deps = MICROKERNEL_TEST_DEPS,
4477)
4478
4479xnnpack_unit_test(
Marat Dukhan13bafb02020-06-05 00:43:11 -0700[diff] [blame]4480 name = "f32_vsqrdiff_test",
4481 srcs = [
4482 "test/f32-vsqrdiff.cc",
4483 "test/vbinary-microkernel-tester.h",
4484 ] + MICROKERNEL_TEST_HDRS,
4485 deps = MICROKERNEL_TEST_DEPS,
4486)
4487
4488xnnpack_unit_test(
4489 name = "f32_vsqrdiffc_test",
4490 srcs = [
4491 "test/f32-vsqrdiffc.cc",
4492 "test/vbinaryc-microkernel-tester.h",
4493 ] + MICROKERNEL_TEST_HDRS,
4494 deps = MICROKERNEL_TEST_DEPS,
4495)
4496
4497xnnpack_unit_test(
4498 name = "f32_vrsqrdiffc_test",
4499 srcs = [
4500 "test/f32-vrsqrdiffc.cc",
4501 "test/vbinaryc-microkernel-tester.h",
4502 ] + MICROKERNEL_TEST_HDRS,
4503 deps = MICROKERNEL_TEST_DEPS,
4504)
4505
4506xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]4507 name = "f32_vsub_minmax_test",
Marat Dukhan97579532019-10-18 16:40:39 -0700[diff] [blame]4508 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]4509 "test/f32-vsub-minmax.cc",
Marat Dukhan1e782c42019-11-21 17:02:40 -0800[diff] [blame]4510 "test/vbinary-microkernel-tester.h",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -0800[diff] [blame]4511 ] + MICROKERNEL_TEST_HDRS,
4512 deps = MICROKERNEL_TEST_DEPS,
4513)
4514
4515xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]4516 name = "f32_vsubc_minmax_test",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -0800[diff] [blame]4517 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]4518 "test/f32-vsubc-minmax.cc",
Marat Dukhan1e782c42019-11-21 17:02:40 -0800[diff] [blame]4519 "test/vbinaryc-microkernel-tester.h",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -0800[diff] [blame]4520 ] + MICROKERNEL_TEST_HDRS,
4521 deps = MICROKERNEL_TEST_DEPS,
4522)
4523
4524xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]4525 name = "f32_vrsubc_minmax_test",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -0800[diff] [blame]4526 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]4527 "test/f32-vrsubc-minmax.cc",
Marat Dukhan1e782c42019-11-21 17:02:40 -0800[diff] [blame]4528 "test/vbinaryc-microkernel-tester.h",
Marat Dukhan97579532019-10-18 16:40:39 -0700[diff] [blame]4529 ] + MICROKERNEL_TEST_HDRS,
4530 deps = MICROKERNEL_TEST_DEPS,
4531)
4532
4533xnnpack_unit_test(
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]4534 name = "q8_avgpool_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4535 srcs = [
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]4536 "test/q8-avgpool-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4537 "test/avgpool-microkernel-tester.h",
4538 "src/xnnpack/AlignedAllocator.h",
4539 ] + MICROKERNEL_TEST_HDRS,
4540 deps = MICROKERNEL_TEST_DEPS,
4541)
4542
4543xnnpack_unit_test(
Marat Dukhande06f492020-04-09 00:19:31 -0700[diff] [blame]4544 name = "q8_igemm_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4545 srcs = [
Marat Dukhande06f492020-04-09 00:19:31 -0700[diff] [blame]4546 "test/q8-igemm-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4547 "test/gemm-microkernel-tester.h",
4548 "src/xnnpack/AlignedAllocator.h",
4549 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
4550 deps = MICROKERNEL_TEST_DEPS,
4551)
4552
4553xnnpack_unit_test(
Marat Dukhande06f492020-04-09 00:19:31 -0700[diff] [blame]4554 name = "q8_dwconv_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4555 srcs = [
Marat Dukhande06f492020-04-09 00:19:31 -0700[diff] [blame]4556 "test/q8-dwconv-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4557 "test/dwconv-microkernel-tester.h",
4558 "src/xnnpack/AlignedAllocator.h",
4559 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
4560 deps = MICROKERNEL_TEST_DEPS,
4561)
4562
4563xnnpack_unit_test(
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]4564 name = "q8_gavgpool_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4565 srcs = [
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]4566 "test/q8-gavgpool-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4567 "test/gavgpool-microkernel-tester.h",
4568 "src/xnnpack/AlignedAllocator.h",
4569 ] + MICROKERNEL_TEST_HDRS,
4570 deps = MICROKERNEL_TEST_DEPS,
4571)
4572
4573xnnpack_unit_test(
Marat Dukhande06f492020-04-09 00:19:31 -0700[diff] [blame]4574 name = "q8_gemm_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4575 srcs = [
Marat Dukhande06f492020-04-09 00:19:31 -0700[diff] [blame]4576 "test/q8-gemm-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4577 "test/gemm-microkernel-tester.h",
4578 "src/xnnpack/AlignedAllocator.h",
4579 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
4580 deps = MICROKERNEL_TEST_DEPS,
4581)
4582
4583xnnpack_unit_test(
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]4584 name = "q8_vadd_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4585 srcs = [
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]4586 "test/q8-vadd-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4587 "test/vadd-microkernel-tester.h",
4588 ] + MICROKERNEL_TEST_HDRS,
4589 deps = MICROKERNEL_TEST_DEPS,
4590)
4591
4592xnnpack_unit_test(
4593 name = "u8_clamp_test",
4594 srcs = [
4595 "test/u8-clamp.cc",
4596 "test/clamp-microkernel-tester.h",
4597 ] + MICROKERNEL_TEST_HDRS,
4598 deps = MICROKERNEL_TEST_DEPS,
4599)
4600
4601xnnpack_unit_test(
4602 name = "u8_lut32norm_test",
4603 srcs = [
4604 "test/u8-lut32norm.cc",
4605 "test/lut-norm-microkernel-tester.h",
4606 ] + MICROKERNEL_TEST_HDRS,
4607 deps = MICROKERNEL_TEST_DEPS,
4608)
4609
4610xnnpack_unit_test(
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]4611 name = "u8_maxpool_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4612 srcs = [
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]4613 "test/u8-maxpool-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4614 "test/maxpool-microkernel-tester.h",
4615 ] + MICROKERNEL_TEST_HDRS,
4616 deps = MICROKERNEL_TEST_DEPS,
4617)
4618
4619xnnpack_unit_test(
4620 name = "u8_rmax_test",
4621 srcs = [
4622 "test/u8-rmax.cc",
4623 "test/rmax-microkernel-tester.h",
4624 ] + MICROKERNEL_TEST_HDRS,
4625 deps = MICROKERNEL_TEST_DEPS,
4626)
4627
4628xnnpack_unit_test(
Marat Dukhan3bb3bfc2020-05-19 17:42:46 -0700[diff] [blame]4629 name = "x32_fill_test",
4630 srcs = [
4631 "test/x32-fill.cc",
4632 "test/fill-microkernel-tester.h",
4633 ] + MICROKERNEL_TEST_HDRS,
4634 deps = MICROKERNEL_TEST_DEPS,
4635)
4636
4637xnnpack_unit_test(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4638 name = "x32_packx_test",
4639 srcs = [
4640 "test/x32-packx.cc",
4641 "test/pack-microkernel-tester.h",
4642 "src/xnnpack/AlignedAllocator.h",
4643 ] + MICROKERNEL_TEST_HDRS,
4644 deps = MICROKERNEL_TEST_DEPS,
4645)
4646
4647xnnpack_unit_test(
4648 name = "x32_pad_test",
4649 srcs = [
4650 "test/x32-pad.cc",
4651 "test/pad-microkernel-tester.h",
4652 ] + MICROKERNEL_TEST_HDRS,
4653 deps = MICROKERNEL_TEST_DEPS,
4654)
4655
4656xnnpack_unit_test(
4657 name = "x32_unpool_test",
4658 srcs = [
4659 "test/x32-unpool.cc",
4660 "test/unpool-microkernel-tester.h",
4661 ] + MICROKERNEL_TEST_HDRS,
4662 deps = MICROKERNEL_TEST_DEPS,
4663)
4664
4665xnnpack_unit_test(
4666 name = "x32_zip_test",
4667 srcs = [
4668 "test/x32-zip.cc",
4669 "test/zip-microkernel-tester.h",
4670 ] + MICROKERNEL_TEST_HDRS,
4671 deps = MICROKERNEL_TEST_DEPS,
4672)
4673
4674xnnpack_unit_test(
4675 name = "x8_lut_test",
4676 srcs = [
4677 "test/x8-lut.cc",
4678 "test/lut-microkernel-tester.h",
4679 ] + MICROKERNEL_TEST_HDRS,
4680 deps = MICROKERNEL_TEST_DEPS,
4681)
4682
4683xnnpack_unit_test(
4684 name = "x8_zip_test",
4685 srcs = [
4686 "test/x8-zip.cc",
4687 "test/zip-microkernel-tester.h",
4688 ] + MICROKERNEL_TEST_HDRS,
4689 deps = MICROKERNEL_TEST_DEPS,
4690)
4691
Marat Dukhanfe7acb62020-03-09 19:30:05 -0700[diff] [blame]4692xnnpack_unit_test(
4693 name = "requantization_test",
4694 srcs = [
4695 "src/xnnpack/requantization-stubs.h",
4696 "test/requantization.cc",
4697 "test/requantization-tester.h",
4698 ] + MICROKERNEL_TEST_HDRS,
4699 deps = MICROKERNEL_TEST_DEPS,
4700)
4701
Marat Dukhan20c3b922020-03-10 03:45:06 -0700[diff] [blame]4702########################## Size tests for the library #########################
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4703
4704xnnpack_binary(
Marat Dukhan20c3b922020-03-10 03:45:06 -0700[diff] [blame]4705 name = "operator_size_test",
4706 srcs = ["test/operator-size.c"],
Marat Dukhan8fe54e42019-10-10 14:12:59 -0700[diff] [blame]4707 deps = [":xnnpack_operators_nhwc_f32"],
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4708)
4709
Marat Dukhan20c3b922020-03-10 03:45:06 -0700[diff] [blame]4710xnnpack_binary(
4711 name = "subgraph_size_test",
4712 srcs = ["test/subgraph-size.c"],
4713 deps = [":XNNPACK"],
4714)
4715
4716########################### Unit tests for operators ##########################
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4717
4718xnnpack_unit_test(
Marat Dukhan5020b962020-06-08 13:30:10 -0700[diff] [blame]4719 name = "abs_nc_test",
4720 srcs = [
4721 "test/abs-nc.cc",
4722 "test/abs-operator-tester.h",
4723 ],
4724 deps = OPERATOR_TEST_DEPS,
4725)
4726
4727xnnpack_unit_test(
Marat Dukhanb1a0fc32019-12-02 19:32:02 -0800[diff] [blame]4728 name = "add_nd_test",
4729 srcs = [
4730 "test/add-nd.cc",
4731 "test/binary-elementwise-operator-tester.h",
4732 ],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]4733 deps = OPERATOR_TEST_DEPS,
Marat Dukhanb1a0fc32019-12-02 19:32:02 -0800[diff] [blame]4734)
4735
4736xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4737 name = "argmax_pooling_nhwc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4738 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4739 "test/argmax-pooling-nhwc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4740 "test/argmax-pooling-operator-tester.h",
4741 ] + OPERATOR_TEST_PARAMS_HDRS,
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]4742 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4743)
4744
4745xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4746 name = "average_pooling_nhwc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4747 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4748 "test/average-pooling-nhwc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4749 "test/average-pooling-operator-tester.h",
4750 ] + OPERATOR_TEST_PARAMS_HDRS,
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]4751 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4752)
4753
4754xnnpack_unit_test(
Marat Dukhan64e52512020-06-09 13:41:16 -0700[diff] [blame]4755 name = "bankers_rounding_nc_test",
4756 srcs = [
4757 "test/bankers-rounding-nc.cc",
4758 "test/bankers-rounding-operator-tester.h",
4759 ],
4760 deps = OPERATOR_TEST_DEPS,
4761)
4762
4763xnnpack_unit_test(
4764 name = "ceiling_nc_test",
4765 srcs = [
4766 "test/ceiling-nc.cc",
4767 "test/ceiling-operator-tester.h",
4768 ],
4769 deps = OPERATOR_TEST_DEPS,
4770)
4771
4772xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4773 name = "channel_shuffle_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4774 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4775 "test/channel-shuffle-nc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4776 "test/channel-shuffle-operator-tester.h",
4777 ],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]4778 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4779)
4780
4781xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4782 name = "clamp_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4783 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4784 "test/clamp-nc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4785 "test/clamp-operator-tester.h",
4786 ],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]4787 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4788)
4789
4790xnnpack_unit_test(
Marat Dukhan065b11e2020-05-22 09:49:41 -0700[diff] [blame]4791 name = "constant_pad_nd_test",
4792 srcs = [
4793 "test/constant-pad-nd.cc",
4794 "test/constant-pad-operator-tester.h",
4795 ],
4796 deps = OPERATOR_TEST_DEPS,
4797)
4798
4799xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4800 name = "convolution_nhwc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4801 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4802 "test/convolution-nhwc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4803 "test/convolution-operator-tester.h",
4804 ],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]4805 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4806)
4807
4808xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4809 name = "convolution_nchw_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4810 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4811 "test/convolution-nchw.cc",
4812 "test/convolution-operator-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4813 ],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]4814 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4815)
4816
4817xnnpack_unit_test(
Marat Dukhan4e21b272020-06-04 18:45:01 -0700[diff] [blame]4818 name = "copy_nc_test",
4819 srcs = [
4820 "test/copy-nc.cc",
4821 "test/copy-operator-tester.h",
4822 ],
4823 deps = OPERATOR_TEST_DEPS,
4824)
4825
4826xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4827 name = "deconvolution_nhwc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4828 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4829 "test/deconvolution-nhwc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4830 "test/deconvolution-operator-tester.h",
4831 ] + OPERATOR_TEST_PARAMS_HDRS,
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]4832 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4833)
4834
4835xnnpack_unit_test(
Marat Dukhan69180502019-12-06 15:00:31 -0800[diff] [blame]4836 name = "divide_nd_test",
4837 srcs = [
4838 "test/binary-elementwise-operator-tester.h",
4839 "test/divide-nd.cc",
4840 ],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]4841 deps = OPERATOR_TEST_DEPS,
Marat Dukhan69180502019-12-06 15:00:31 -0800[diff] [blame]4842)
4843
4844xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4845 name = "fully_connected_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4846 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4847 "test/fully-connected-nc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4848 "test/fully-connected-operator-tester.h",
4849 ],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]4850 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4851)
4852
4853xnnpack_unit_test(
Marat Dukhan64e52512020-06-09 13:41:16 -0700[diff] [blame]4854 name = "floor_nc_test",
4855 srcs = [
4856 "test/floor-nc.cc",
4857 "test/floor-operator-tester.h",
4858 ],
4859 deps = OPERATOR_TEST_DEPS,
4860)
4861
4862xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4863 name = "global_average_pooling_nwc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4864 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4865 "test/global-average-pooling-nwc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4866 "test/global-average-pooling-operator-tester.h",
Marat Dukhanef61d022020-06-19 13:54:49 -0700[diff] [blame]4867 ] + OPERATOR_TEST_PARAMS_HDRS,
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]4868 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4869)
4870
4871xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4872 name = "global_average_pooling_ncw_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4873 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4874 "test/global-average-pooling-ncw.cc",
4875 "test/global-average-pooling-operator-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4876 ],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]4877 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4878)
4879
4880xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4881 name = "hardswish_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4882 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4883 "test/hardswish-nc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4884 "test/hardswish-operator-tester.h",
4885 ],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]4886 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4887)
4888
4889xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4890 name = "leaky_relu_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4891 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4892 "test/leaky-relu-nc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4893 "test/leaky-relu-operator-tester.h",
4894 ],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]4895 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4896)
4897
4898xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4899 name = "max_pooling_nhwc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4900 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4901 "test/max-pooling-nhwc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4902 "test/max-pooling-operator-tester.h",
4903 ] + OPERATOR_TEST_PARAMS_HDRS,
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]4904 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4905)
4906
4907xnnpack_unit_test(
Marat Dukhan79e7f842019-12-05 14:35:50 -0800[diff] [blame]4908 name = "maximum_nd_test",
4909 srcs = [
4910 "test/binary-elementwise-operator-tester.h",
4911 "test/maximum-nd.cc",
4912 ],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]4913 deps = OPERATOR_TEST_DEPS,
Marat Dukhan79e7f842019-12-05 14:35:50 -0800[diff] [blame]4914)
4915
4916xnnpack_unit_test(
4917 name = "minimum_nd_test",
4918 srcs = [
4919 "test/binary-elementwise-operator-tester.h",
4920 "test/minimum-nd.cc",
4921 ],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]4922 deps = OPERATOR_TEST_DEPS,
Marat Dukhan79e7f842019-12-05 14:35:50 -0800[diff] [blame]4923)
4924
4925xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4926 name = "multiply_nd_test",
Marat Dukhanca2733c2019-11-15 23:21:17 -0800[diff] [blame]4927 srcs = [
Marat Dukhanb1a0fc32019-12-02 19:32:02 -0800[diff] [blame]4928 "test/binary-elementwise-operator-tester.h",
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4929 "test/multiply-nd.cc",
Marat Dukhanca2733c2019-11-15 23:21:17 -0800[diff] [blame]4930 ],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]4931 deps = OPERATOR_TEST_DEPS,
Marat Dukhanca2733c2019-11-15 23:21:17 -0800[diff] [blame]4932)
4933
4934xnnpack_unit_test(
Marat Dukhan5020b962020-06-08 13:30:10 -0700[diff] [blame]4935 name = "negate_nc_test",
4936 srcs = [
4937 "test/negate-nc.cc",
4938 "test/negate-operator-tester.h",
4939 ],
4940 deps = OPERATOR_TEST_DEPS,
4941)
4942
4943xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4944 name = "prelu_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4945 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4946 "test/prelu-nc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4947 "test/prelu-operator-tester.h",
4948 ] + OPERATOR_TEST_PARAMS_HDRS,
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]4949 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4950)
4951
4952xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4953 name = "resize_bilinear_nhwc_test",
Marat Dukhan69722492019-11-11 19:55:50 -0800[diff] [blame]4954 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4955 "test/resize-bilinear-nhwc.cc",
Marat Dukhan69722492019-11-11 19:55:50 -0800[diff] [blame]4956 "test/resize-bilinear-operator-tester.h",
4957 ] + OPERATOR_TEST_PARAMS_HDRS,
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]4958 deps = OPERATOR_TEST_DEPS,
Marat Dukhan69722492019-11-11 19:55:50 -0800[diff] [blame]4959)
4960
4961xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4962 name = "sigmoid_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4963 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4964 "test/sigmoid-nc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4965 "test/sigmoid-operator-tester.h",
4966 ],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]4967 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4968)
4969
4970xnnpack_unit_test(
Marat Dukhanfd8e6892020-01-27 15:25:25 -0800[diff] [blame]4971 name = "softmax_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4972 srcs = [
Marat Dukhanfd8e6892020-01-27 15:25:25 -0800[diff] [blame]4973 "test/softmax-nc.cc",
4974 "test/softmax-operator-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4975 ],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]4976 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4977)
4978
4979xnnpack_unit_test(
Marat Dukhan5020b962020-06-08 13:30:10 -0700[diff] [blame]4980 name = "square_nc_test",
4981 srcs = [
4982 "test/square-nc.cc",
4983 "test/square-operator-tester.h",
4984 ],
4985 deps = OPERATOR_TEST_DEPS,
4986)
4987
4988xnnpack_unit_test(
Marat Dukhanf7399262020-06-05 10:58:44 -0700[diff] [blame]4989 name = "squared_difference_nd_test",
4990 srcs = [
4991 "test/binary-elementwise-operator-tester.h",
4992 "test/squared-difference-nd.cc",
4993 ],
4994 deps = OPERATOR_TEST_DEPS,
4995)
4996
4997xnnpack_unit_test(
Marat Dukhan05f3f6d2019-12-03 15:13:53 -0800[diff] [blame]4998 name = "subtract_nd_test",
4999 srcs = [
5000 "test/binary-elementwise-operator-tester.h",
5001 "test/subtract-nd.cc",
5002 ],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]5003 deps = OPERATOR_TEST_DEPS,
Marat Dukhan05f3f6d2019-12-03 15:13:53 -0800[diff] [blame]5004)
5005
5006xnnpack_unit_test(
Marat Dukhan64e52512020-06-09 13:41:16 -0700[diff] [blame]5007 name = "truncation_nc_test",
5008 srcs = [
5009 "test/truncation-nc.cc",
5010 "test/truncation-operator-tester.h",
5011 ],
5012 deps = OPERATOR_TEST_DEPS,
5013)
5014
5015xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]5016 name = "unpooling_nhwc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]5017 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]5018 "test/unpooling-nhwc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]5019 "test/unpooling-operator-tester.h",
5020 ],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]5021 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]5022)
5023
Chao Mei6ddfc602020-05-13 22:29:36 -0700[diff] [blame]5024############################### Misc unit tests ###############################
5025
5026xnnpack_unit_test(
5027 name = "memory_planner_test",
5028 srcs = [
5029 "test/memory-planner-test.cc",
5030 ],
5031 deps = [
5032 ":XNNPACK",
5033 ":memory_planner",
5034 ],
5035)
5036
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]5037############################# Build configurations #############################
5038
Marat Dukhanb8642352019-10-30 15:43:02 -0700[diff] [blame]5039# Enables usage of assembly kernels.
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]5040config_setting(
Marat Dukhanb8642352019-10-30 15:43:02 -0700[diff] [blame]5041 name = "xnn_enable_assembly_explicit_true",
5042 define_values = {"xnn_enable_assembly": "true"},
5043)
5044
5045# Disables usage of assembly kernels.
5046config_setting(
5047 name = "xnn_enable_assembly_explicit_false",
5048 define_values = {"xnn_enable_assembly": "false"},
5049)
5050
Marat Dukhan9de90e02020-06-18 16:04:12 -0700[diff] [blame]5051# Enables usage of sparse inference.
5052config_setting(
5053 name = "xnn_enable_sparse_explicit_true",
5054 define_values = {"xnn_enable_sparse": "true"},
5055)
5056
5057# Disables usage of sparse inference.
5058config_setting(
5059 name = "xnn_enable_sparse_explicit_false",
5060 define_values = {"xnn_enable_sparse": "false"},
5061)
5062
Marat Dukhan05702cf2020-03-26 15:41:33 -0700[diff] [blame]5063# Disables usage of HMP-aware optimizations.
5064config_setting(
5065 name = "xnn_enable_hmp_explicit_false",
5066 define_values = {"xnn_enable_hmp": "false"},
5067)
5068
Chao Mei6ddfc602020-05-13 22:29:36 -0700[diff] [blame]5069# Enable usage of optimized memory allocation
5070config_setting(
5071 name = "xnn_enable_memopt_explicit_true",
5072 define_values = {"xnnpack_enable_memopt": "true"},
5073)
5074
5075# Disable usage of optimized memory allocation
5076config_setting(
5077 name = "xnn_enable_memopt_explicit_false",
5078 define_values = {"xnnpack_enable_memopt": "false"},
5079)
5080
Marat Dukhanb8642352019-10-30 15:43:02 -0700[diff] [blame]5081# Builds with -c dbg
5082config_setting(
5083 name = "debug_build",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]5084 values = {
Marat Dukhanb8642352019-10-30 15:43:02 -0700[diff] [blame]5085 "compilation_mode": "dbg",
5086 },
5087)
5088
5089# Builds with -c opt
5090config_setting(
5091 name = "optimized_build",
5092 values = {
5093 "compilation_mode": "opt",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]5094 },
5095)
5096
5097config_setting(
Marat Dukhanb8642352019-10-30 15:43:02 -0700[diff] [blame]5098 name = "linux_k8",
5099 values = {"cpu": "k8"},
5100)
5101
5102config_setting(
Marat Dukhan582094e2020-04-30 17:21:25 -0700[diff] [blame]5103 name = "linux_arm",
5104 values = {"cpu": "arm"},
Marat Dukhan4e45e662019-10-03 15:40:24 -0700[diff] [blame]5105)
5106
5107config_setting(
Marat Dukhanf0bd4de2020-06-15 15:53:19 -0700[diff] [blame]5108 name = "linux_armeabi",
5109 values = {"cpu": "armeabi"},
5110)
5111
5112config_setting(
Terry Heo68eef3f2020-04-13 22:53:52 -0700[diff] [blame]5113 name = "linux_armhf",
5114 values = {"cpu": "armhf"},
5115)
5116
5117config_setting(
Marat Dukhana720e932020-06-10 13:01:11 -0700[diff] [blame]5118 name = "linux_armv7a",
5119 values = {"cpu": "armv7a"},
5120)
5121
5122config_setting(
Marat Dukhan582094e2020-04-30 17:21:25 -0700[diff] [blame]5123 name = "linux_aarch64",
5124 values = {"cpu": "aarch64"},
5125)
5126
5127config_setting(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]5128 name = "android",
5129 values = {"crosstool_top": "//external:android/crosstool"},
5130)
5131
5132config_setting(
5133 name = "android_armv7",
5134 values = {
5135 "crosstool_top": "//external:android/crosstool",
5136 "cpu": "armeabi-v7a",
5137 },
5138)
5139
5140config_setting(
5141 name = "android_arm64",
5142 values = {
5143 "crosstool_top": "//external:android/crosstool",
5144 "cpu": "arm64-v8a",
5145 },
5146)
5147
5148config_setting(
5149 name = "android_x86",
5150 values = {
5151 "crosstool_top": "//external:android/crosstool",
5152 "cpu": "x86",
5153 },
5154)
5155
5156config_setting(
5157 name = "android_x86_64",
5158 values = {
5159 "crosstool_top": "//external:android/crosstool",
5160 "cpu": "x86_64",
5161 },
5162)
5163
5164config_setting(
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]5165 name = "windows_x86_64",
5166 values = {"cpu": "x64_windows"},
Marat Dukhan9fe932e2020-04-11 17:14:15 -0700[diff] [blame]5167)
5168
5169config_setting(
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]5170 name = "windows_x86_64_clang",
5171 values = {
5172 "compiler": "clang-cl",
5173 "cpu": "x64_windows",
5174 },
5175)
5176
5177config_setting(
5178 name = "windows_x86_64_mingw",
5179 values = {
5180 "compiler": "mingw-gcc",
5181 "cpu": "x64_windows",
5182 },
5183)
5184
5185config_setting(
5186 name = "windows_x86_64_msys",
5187 values = {
5188 "compiler": "msys-gcc",
5189 "cpu": "x64_windows",
5190 },
Marat Dukhan9fe932e2020-04-11 17:14:15 -0700[diff] [blame]5191)
5192
5193config_setting(
Marat Dukhan885ca242019-10-07 09:17:32 -0700[diff] [blame]5194 name = "macos_x86_64",
5195 values = {
5196 "apple_platform_type": "macos",
5197 "cpu": "darwin",
5198 },
5199)
5200
5201config_setting(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]5202 name = "emscripten",
Marat Dukhan1a729ec2019-10-07 09:31:44 -0700[diff] [blame]5203 values = {"crosstool_top": "//toolchain:emscripten"},
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]5204)
5205
5206config_setting(
5207 name = "emscripten_wasm",
5208 values = {
Marat Dukhan1a729ec2019-10-07 09:31:44 -0700[diff] [blame]5209 "crosstool_top": "//toolchain:emscripten",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]5210 "cpu": "wasm",
5211 },
5212)
5213
5214config_setting(
5215 name = "emscripten_wasmsimd",
5216 values = {
Marat Dukhan1a729ec2019-10-07 09:31:44 -0700[diff] [blame]5217 "crosstool_top": "//toolchain:emscripten",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]5218 "cpu": "wasm",
Marat Dukhan81c62602020-05-29 13:22:49 -0700[diff] [blame]5219 "copt": "-msimd128",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]5220 },
5221)
5222
5223config_setting(
5224 name = "emscripten_asmjs",
5225 values = {
Marat Dukhan1a729ec2019-10-07 09:31:44 -0700[diff] [blame]5226 "crosstool_top": "//toolchain:emscripten",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]5227 "cpu": "asmjs",
5228 },
5229)
Marat Dukhan1498d1d2020-02-11 20:00:05 -0800[diff] [blame]5230
5231config_setting(
5232 name = "ios_armv7",
5233 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -0800[diff] [blame]5234 "apple_platform_type": "ios",
Marat Dukhan1498d1d2020-02-11 20:00:05 -0800[diff] [blame]5235 "cpu": "ios_armv7",
5236 },
5237)
5238
5239config_setting(
5240 name = "ios_arm64",
5241 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -0800[diff] [blame]5242 "apple_platform_type": "ios",
Marat Dukhan1498d1d2020-02-11 20:00:05 -0800[diff] [blame]5243 "cpu": "ios_arm64",
5244 },
5245)
5246
5247config_setting(
5248 name = "ios_arm64e",
5249 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -0800[diff] [blame]5250 "apple_platform_type": "ios",
Marat Dukhan1498d1d2020-02-11 20:00:05 -0800[diff] [blame]5251 "cpu": "ios_arm64e",
5252 },
5253)
5254
5255config_setting(
5256 name = "ios_x86",
5257 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -0800[diff] [blame]5258 "apple_platform_type": "ios",
Marat Dukhan1498d1d2020-02-11 20:00:05 -0800[diff] [blame]5259 "cpu": "ios_i386",
5260 },
5261)
5262
5263config_setting(
5264 name = "ios_x86_64",
5265 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -0800[diff] [blame]5266 "apple_platform_type": "ios",
Marat Dukhan1498d1d2020-02-11 20:00:05 -0800[diff] [blame]5267 "cpu": "ios_x86_64",
5268 },
5269)
5270
5271config_setting(
5272 name = "watchos_armv7k",
5273 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -0800[diff] [blame]5274 "apple_platform_type": "watchos",
Marat Dukhan1498d1d2020-02-11 20:00:05 -0800[diff] [blame]5275 "cpu": "watchos_armv7k",
5276 },
5277)
5278
5279config_setting(
5280 name = "watchos_arm64_32",
5281 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -0800[diff] [blame]5282 "apple_platform_type": "watchos",
Marat Dukhan1498d1d2020-02-11 20:00:05 -0800[diff] [blame]5283 "cpu": "watchos_arm64_32",
5284 },
5285)
5286
5287config_setting(
5288 name = "watchos_x86",
5289 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -0800[diff] [blame]5290 "apple_platform_type": "watchos",
Marat Dukhan1498d1d2020-02-11 20:00:05 -0800[diff] [blame]5291 "cpu": "watchos_i386",
5292 },
5293)
5294
5295config_setting(
5296 name = "watchos_x86_64",
5297 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -0800[diff] [blame]5298 "apple_platform_type": "watchos",
Marat Dukhan1498d1d2020-02-11 20:00:05 -0800[diff] [blame]5299 "cpu": "watchos_x86_64",
5300 },
5301)
5302
5303config_setting(
5304 name = "tvos_arm64",
5305 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -0800[diff] [blame]5306 "apple_platform_type": "tvos",
Marat Dukhan1498d1d2020-02-11 20:00:05 -0800[diff] [blame]5307 "cpu": "tvos_arm64",
5308 },
5309)
5310
5311config_setting(
5312 name = "tvos_x86_64",
5313 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -0800[diff] [blame]5314 "apple_platform_type": "tvos",
Marat Dukhan1498d1d2020-02-11 20:00:05 -0800[diff] [blame]5315 "cpu": "tvos_x86_64",
5316 },
5317)