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sewardj2019a972011-03-07 16:04:07 +00001/* -*- mode: C; c-basic-offset: 3; -*- */
2
3/*---------------------------------------------------------------*/
4/*--- begin guest_s390_toIR.c ---*/
5/*---------------------------------------------------------------*/
6
7/*
8 This file is part of Valgrind, a dynamic binary instrumentation
9 framework.
10
11 Copyright IBM Corp. 2010-2011
12
13 This program is free software; you can redistribute it and/or
14 modify it under the terms of the GNU General Public License as
15 published by the Free Software Foundation; either version 2 of the
16 License, or (at your option) any later version.
17
18 This program is distributed in the hope that it will be useful, but
19 WITHOUT ANY WARRANTY; without even the implied warranty of
20 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
21 General Public License for more details.
22
23 You should have received a copy of the GNU General Public License
24 along with this program; if not, write to the Free Software
25 Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
26 02110-1301, USA.
27
28 The GNU General Public License is contained in the file COPYING.
29*/
30
31/* Contributed by Florian Krohm and Christian Borntraeger */
32
33/* Translates s390 code to IR. */
34
35#include "libvex_basictypes.h"
36#include "libvex_ir.h"
37#include "libvex_guest_s390x.h" /* VexGuestS390XState */
38#include "libvex.h" /* needed for bb_to_IR.h */
39#include "libvex_guest_offsets.h" /* OFFSET_s390x_SYSNO */
florian933065d2011-07-11 01:48:02 +000040#include "libvex_s390x_common.h"
sewardj2019a972011-03-07 16:04:07 +000041#include "main_util.h" /* vassert */
42#include "main_globals.h" /* vex_traceflags */
43#include "guest_generic_bb_to_IR.h" /* DisResult */
44#include "guest_s390_defs.h" /* prototypes for this file's functions */
45#include "host_s390_disasm.h"
46#include "host_s390_defs.h" /* S390_ROUND_xyzzy */
47
sewardj2019a972011-03-07 16:04:07 +000048
49/*------------------------------------------------------------*/
florianb4df7682011-07-05 02:09:01 +000050/*--- Forward declarations ---*/
51/*------------------------------------------------------------*/
52static UInt s390_decode_and_irgen(UChar *, UInt, DisResult *);
53
54
55/*------------------------------------------------------------*/
sewardj2019a972011-03-07 16:04:07 +000056/*--- Globals ---*/
57/*------------------------------------------------------------*/
58
59/* The IRSB* into which we're generating code. */
60static IRSB *irsb;
61
62/* The guest address for the instruction currently being
63 translated. */
64static Addr64 guest_IA_curr_instr;
65
66/* The guest address for the instruction following the current instruction. */
67static Addr64 guest_IA_next_instr;
68
69/* Result of disassembly step. */
70static DisResult *dis_res;
71
floriana64c2432011-07-16 02:11:50 +000072/* Resteer function and callback data */
73static Bool (*resteer_fn)(void *, Addr64);
74static void *resteer_data;
75
sewardj2019a972011-03-07 16:04:07 +000076/* The last seen execute target instruction */
77ULong last_execute_target;
78
79/* The possible outcomes of a decoding operation */
80typedef enum {
81 S390_DECODE_OK,
82 S390_DECODE_UNKNOWN_INSN,
83 S390_DECODE_UNIMPLEMENTED_INSN,
84 S390_DECODE_UNKNOWN_SPECIAL_INSN,
85 S390_DECODE_ERROR
86} s390_decode_t;
87
88/*------------------------------------------------------------*/
89/*--- Helpers for constructing IR. ---*/
90/*------------------------------------------------------------*/
91
92/* Sign extend a value with the given number of bits. This is a
93 macro because it allows us to overload the type of the value.
94 Note that VALUE must have a signed type! */
95#undef sign_extend
96#define sign_extend(value,num_bits) \
97(((value) << (sizeof(__typeof__(value)) * 8 - (num_bits))) >> \
98 (sizeof(__typeof__(value)) * 8 - (num_bits)))
99
100
101/* Add a statement to the current irsb. */
102static __inline__ void
103stmt(IRStmt *st)
104{
105 addStmtToIRSB(irsb, st);
106}
107
108/* Allocate a new temporary of the given type. */
109static __inline__ IRTemp
110newTemp(IRType type)
111{
112 vassert(isPlausibleIRType(type));
113
114 return newIRTemp(irsb->tyenv, type);
115}
116
117/* Create an expression node for a temporary */
118static __inline__ IRExpr *
119mkexpr(IRTemp tmp)
120{
121 return IRExpr_RdTmp(tmp);
122}
123
124/* Add a statement that assigns to a temporary */
125static __inline__ void
126assign(IRTemp dst, IRExpr *expr)
127{
128 stmt(IRStmt_WrTmp(dst, expr));
129}
130
131/* Create a temporary of the given type and assign the expression to it */
132static __inline__ IRTemp
133mktemp(IRType type, IRExpr *expr)
134{
135 IRTemp temp = newTemp(type);
136
137 assign(temp, expr);
138
139 return temp;
140}
141
142/* Create a unary expression */
143static __inline__ IRExpr *
144unop(IROp kind, IRExpr *op)
145{
146 return IRExpr_Unop(kind, op);
147}
148
149/* Create a binary expression */
150static __inline__ IRExpr *
151binop(IROp kind, IRExpr *op1, IRExpr *op2)
152{
153 return IRExpr_Binop(kind, op1, op2);
154}
155
156/* Create a ternary expression */
157static __inline__ IRExpr *
158triop(IROp kind, IRExpr *op1, IRExpr *op2, IRExpr *op3)
159{
160 return IRExpr_Triop(kind, op1, op2, op3);
161}
162
163/* Create a quaternary expression */
164static __inline__ IRExpr *
165qop(IROp kind, IRExpr *op1, IRExpr *op2, IRExpr *op3, IRExpr *op4)
166{
167 return IRExpr_Qop(kind, op1, op2, op3, op4);
168}
169
170/* Create an expression node for an 8-bit integer constant */
171static __inline__ IRExpr *
172mkU8(UInt value)
173{
174 vassert(value < 256);
175
176 return IRExpr_Const(IRConst_U8((UChar)value));
177}
178
179/* Create an expression node for a 16-bit integer constant */
180static __inline__ IRExpr *
181mkU16(UInt value)
182{
183 vassert(value < 65536);
184
185 return IRExpr_Const(IRConst_U16((UShort)value));
186}
187
188/* Create an expression node for a 32-bit integer constant */
189static __inline__ IRExpr *
190mkU32(UInt value)
191{
192 return IRExpr_Const(IRConst_U32(value));
193}
194
195/* Create an expression node for a 64-bit integer constant */
196static __inline__ IRExpr *
197mkU64(ULong value)
198{
199 return IRExpr_Const(IRConst_U64(value));
200}
201
202/* Create an expression node for a 32-bit floating point constant
203 whose value is given by a bit pattern. */
204static __inline__ IRExpr *
205mkF32i(UInt value)
206{
207 return IRExpr_Const(IRConst_F32i(value));
208}
209
210/* Create an expression node for a 32-bit floating point constant
211 whose value is given by a bit pattern. */
212static __inline__ IRExpr *
213mkF64i(ULong value)
214{
215 return IRExpr_Const(IRConst_F64i(value));
216}
217
218/* Little helper function for my sanity. ITE = if-then-else */
219static IRExpr *
220mkite(IRExpr *condition, IRExpr *iftrue, IRExpr *iffalse)
221{
222 vassert(typeOfIRExpr(irsb->tyenv, condition) == Ity_I1);
223
224 return IRExpr_Mux0X(unop(Iop_1Uto8, condition), iffalse, iftrue);
225}
226
227/* Add a statement that stores DATA at ADDR. This is a big-endian machine. */
228static void __inline__
229store(IRExpr *addr, IRExpr *data)
230{
231 stmt(IRStmt_Store(Iend_BE, addr, data));
232}
233
234/* Create an expression that loads a TYPE sized value from ADDR.
235 This is a big-endian machine. */
236static __inline__ IRExpr *
237load(IRType type, IRExpr *addr)
238{
239 return IRExpr_Load(Iend_BE, type, addr);
240}
241
242/* Function call */
243static void
244call_function(IRExpr *callee_address)
245{
246 irsb->next = callee_address;
247 irsb->jumpkind = Ijk_Call;
248
249 dis_res->whatNext = Dis_StopHere;
250}
251
floriana64c2432011-07-16 02:11:50 +0000252/* Function call with known target. */
253static void
254call_function_and_chase(Addr64 callee_address)
255{
256 if (resteer_fn(resteer_data, callee_address)) {
257 dis_res->whatNext = Dis_ResteerU;
258 dis_res->continueAt = callee_address;
259 } else {
260 irsb->next = mkU64(callee_address);
261 irsb->jumpkind = Ijk_Call;
262 dis_res->whatNext = Dis_StopHere;
263 }
264}
265
sewardj2019a972011-03-07 16:04:07 +0000266/* Function return sequence */
267static void
268return_from_function(IRExpr *return_address)
269{
270 irsb->next = return_address;
271 irsb->jumpkind = Ijk_Ret;
272
273 dis_res->whatNext = Dis_StopHere;
274}
275
276/* A conditional branch whose target is not known at instrumentation time.
277
278 if (condition) goto computed_target;
279
280 Needs to be represented as:
281
282 if (! condition) goto next_instruction;
283 goto computed_target;
284
285 This inversion is being handled at code generation time. So we just
286 take the condition here as is.
287*/
288static void
289if_not_condition_goto_computed(IRExpr *condition, IRExpr *target)
290{
291 vassert(typeOfIRExpr(irsb->tyenv, condition) == Ity_I1);
292
293 stmt(IRStmt_Exit(condition, Ijk_Boring, IRConst_U64(guest_IA_next_instr)));
294
295 irsb->next = target;
296 irsb->jumpkind = Ijk_Boring;
297
298 dis_res->whatNext = Dis_StopHere;
299}
300
301/* A conditional branch whose target is known at instrumentation time. */
302static void
303if_condition_goto(IRExpr *condition, Addr64 target)
304{
305 vassert(typeOfIRExpr(irsb->tyenv, condition) == Ity_I1);
306
307 stmt(IRStmt_Exit(condition, Ijk_Boring, IRConst_U64(target)));
308 dis_res->whatNext = Dis_Continue;
309}
310
311/* An unconditional branch. Target may or may not be known at instrumentation
312 time. */
313static void
314always_goto(IRExpr *target)
315{
316 irsb->next = target;
317 irsb->jumpkind = Ijk_Boring;
318
319 dis_res->whatNext = Dis_StopHere;
320}
321
floriana64c2432011-07-16 02:11:50 +0000322/* An unconditional branch to a known target. */
323static void
324always_goto_and_chase(Addr64 target)
325{
326 if (resteer_fn(resteer_data, target)) {
327 dis_res->whatNext = Dis_ResteerU;
328 dis_res->continueAt = target;
329 } else {
330 irsb->next = mkU64(target);
331 irsb->jumpkind = Ijk_Boring;
332 dis_res->whatNext = Dis_StopHere;
333 }
334}
335
sewardj2019a972011-03-07 16:04:07 +0000336/* A system call */
337static void
338system_call(IRExpr *sysno)
339{
340 /* Store the system call number in the pseudo register. */
341 stmt(IRStmt_Put(OFFSET_s390x_SYSNO, sysno));
342
sewardj69007022011-04-28 20:13:45 +0000343 /* Store the current IA into guest_IP_AT_SYSCALL. libvex_ir.h says so. */
sewardj2019a972011-03-07 16:04:07 +0000344 stmt(IRStmt_Put(OFFSET_s390x_IP_AT_SYSCALL, mkU64(guest_IA_curr_instr)));
345
346 /* It's important that all ArchRegs carry their up-to-date value
347 at this point. So we declare an end-of-block here, which
348 forces any TempRegs caching ArchRegs to be flushed. */
349 irsb->next = mkU64(guest_IA_next_instr);
350
351 irsb->jumpkind = Ijk_Sys_syscall;
352
353 dis_res->whatNext = Dis_StopHere;
354}
355
356/* Encode the s390 rounding mode as it appears in the m3/m4 fields of certain
357 instructions to VEX's IRRoundingMode. */
358static IRRoundingMode
359encode_rounding_mode(UChar mode)
360{
361 switch (mode) {
362 case S390_ROUND_NEAREST_EVEN: return Irrm_NEAREST;
363 case S390_ROUND_ZERO: return Irrm_ZERO;
364 case S390_ROUND_POSINF: return Irrm_PosINF;
365 case S390_ROUND_NEGINF: return Irrm_NegINF;
366 }
367 vpanic("encode_rounding_mode");
368}
369
370static __inline__ IRExpr *get_fpr_dw0(UInt);
371static __inline__ void put_fpr_dw0(UInt, IRExpr *);
372
373/* Read a floating point register pair and combine their contents into a
374 128-bit value */
375static IRExpr *
376get_fpr_pair(UInt archreg)
377{
378 IRExpr *high = get_fpr_dw0(archreg);
379 IRExpr *low = get_fpr_dw0(archreg + 2);
380
381 return binop(Iop_F64HLtoF128, high, low);
382}
383
384/* Write a 128-bit floating point value into a register pair. */
385static void
386put_fpr_pair(UInt archreg, IRExpr *expr)
387{
388 IRExpr *high = unop(Iop_F128HItoF64, expr);
389 IRExpr *low = unop(Iop_F128LOtoF64, expr);
390
391 put_fpr_dw0(archreg, high);
392 put_fpr_dw0(archreg + 2, low);
393}
394
395
396/* Flags thunk offsets */
floriane88b3c92011-07-05 02:48:39 +0000397#define S390X_GUEST_OFFSET_CC_OP S390X_GUEST_OFFSET(guest_CC_OP)
398#define S390X_GUEST_OFFSET_CC_DEP1 S390X_GUEST_OFFSET(guest_CC_DEP1)
399#define S390X_GUEST_OFFSET_CC_DEP2 S390X_GUEST_OFFSET(guest_CC_DEP2)
400#define S390X_GUEST_OFFSET_CC_NDEP S390X_GUEST_OFFSET(guest_CC_NDEP)
sewardj2019a972011-03-07 16:04:07 +0000401
402/*------------------------------------------------------------*/
403/*--- Build the flags thunk. ---*/
404/*------------------------------------------------------------*/
405
406/* Completely fill the flags thunk. We're always filling all fields.
407 Apparently, that is better for redundant PUT elimination. */
408static void
409s390_cc_thunk_fill(IRExpr *op, IRExpr *dep1, IRExpr *dep2, IRExpr *ndep)
410{
411 UInt op_off, dep1_off, dep2_off, ndep_off;
412
413 op_off = S390X_GUEST_OFFSET_CC_OP;
414 dep1_off = S390X_GUEST_OFFSET_CC_DEP1;
415 dep2_off = S390X_GUEST_OFFSET_CC_DEP2;
416 ndep_off = S390X_GUEST_OFFSET_CC_NDEP;
417
418 stmt(IRStmt_Put(op_off, op));
419 stmt(IRStmt_Put(dep1_off, dep1));
420 stmt(IRStmt_Put(dep2_off, dep2));
421 stmt(IRStmt_Put(ndep_off, ndep));
422}
423
424
425/* Create an expression for V and widen the result to 64 bit. */
426static IRExpr *
427s390_cc_widen(IRTemp v, Bool sign_extend)
428{
429 IRExpr *expr;
430
431 expr = mkexpr(v);
432
433 switch (typeOfIRTemp(irsb->tyenv, v)) {
434 case Ity_I64:
435 break;
436 case Ity_I32:
437 expr = unop(sign_extend ? Iop_32Sto64 : Iop_32Uto64, expr);
438 break;
439 case Ity_I16:
440 expr = unop(sign_extend ? Iop_16Sto64 : Iop_16Uto64, expr);
441 break;
442 case Ity_I8:
443 expr = unop(sign_extend ? Iop_8Sto64 : Iop_8Uto64, expr);
444 break;
445 default:
446 vpanic("s390_cc_widen");
447 }
448
449 return expr;
450}
451
452static void
453s390_cc_thunk_put1(UInt opc, IRTemp d1, Bool sign_extend)
454{
455 IRExpr *op, *dep1, *dep2, *ndep;
456
457 op = mkU64(opc);
458 dep1 = s390_cc_widen(d1, sign_extend);
459 dep2 = mkU64(0);
460 ndep = mkU64(0);
461
462 s390_cc_thunk_fill(op, dep1, dep2, ndep);
463}
464
465
466static void
467s390_cc_thunk_put2(UInt opc, IRTemp d1, IRTemp d2, Bool sign_extend)
468{
469 IRExpr *op, *dep1, *dep2, *ndep;
470
471 op = mkU64(opc);
472 dep1 = s390_cc_widen(d1, sign_extend);
473 dep2 = s390_cc_widen(d2, sign_extend);
474 ndep = mkU64(0);
475
476 s390_cc_thunk_fill(op, dep1, dep2, ndep);
477}
478
479
480/* memcheck believes that the NDEP field in the flags thunk is always
481 defined. But for some flag computations (e.g. add with carry) that is
482 just not true. We therefore need to convey to memcheck that the value
483 of the ndep field does matter and therefore we make the DEP2 field
484 depend on it:
485
486 DEP2 = original_DEP2 ^ NDEP
487
488 In s390_calculate_cc we exploit that (a^b)^b == a
489 I.e. we xor the DEP2 value with the NDEP value to recover the
490 original_DEP2 value. */
491static void
492s390_cc_thunk_put3(UInt opc, IRTemp d1, IRTemp d2, IRTemp nd, Bool sign_extend)
493{
494 IRExpr *op, *dep1, *dep2, *ndep, *dep2x;
495
496 op = mkU64(opc);
497 dep1 = s390_cc_widen(d1, sign_extend);
498 dep2 = s390_cc_widen(d2, sign_extend);
499 ndep = s390_cc_widen(nd, sign_extend);
500
501 dep2x = binop(Iop_Xor64, dep2, ndep);
502
503 s390_cc_thunk_fill(op, dep1, dep2x, ndep);
504}
505
506
507/* Write one floating point value into the flags thunk */
508static void
509s390_cc_thunk_put1f(UInt opc, IRTemp d1)
510{
511 IRExpr *op, *dep1, *dep2, *ndep;
512
513 op = mkU64(opc);
514 dep1 = mkexpr(d1);
515 dep2 = mkU64(0);
516 ndep = mkU64(0);
517
518 s390_cc_thunk_fill(op, dep1, dep2, ndep);
519}
520
521
522/* Write a floating point value and an integer into the flags thunk. The
523 integer value is zero-extended first. */
524static void
525s390_cc_thunk_putFZ(UInt opc, IRTemp d1, IRTemp d2)
526{
527 IRExpr *op, *dep1, *dep2, *ndep;
528
529 op = mkU64(opc);
530 dep1 = mkexpr(d1);
531 dep2 = s390_cc_widen(d2, False);
532 ndep = mkU64(0);
533
534 s390_cc_thunk_fill(op, dep1, dep2, ndep);
535}
536
537
538/* Write a 128-bit floating point value into the flags thunk. This is
539 done by splitting the value into two 64-bits values. */
540static void
541s390_cc_thunk_put1f128(UInt opc, IRTemp d1)
542{
543 IRExpr *op, *hi, *lo, *ndep;
544
545 op = mkU64(opc);
546 hi = unop(Iop_F128HItoF64, mkexpr(d1));
547 lo = unop(Iop_F128LOtoF64, mkexpr(d1));
548 ndep = mkU64(0);
549
550 s390_cc_thunk_fill(op, hi, lo, ndep);
551}
552
553
554/* Write a 128-bit floating point value and an integer into the flags thunk.
555 The integer value is zero-extended first. */
556static void
557s390_cc_thunk_put1f128Z(UInt opc, IRTemp d1, IRTemp nd)
558{
559 IRExpr *op, *hi, *lo, *lox, *ndep;
560
561 op = mkU64(opc);
562 hi = unop(Iop_F128HItoF64, mkexpr(d1));
563 lo = unop(Iop_ReinterpF64asI64, unop(Iop_F128LOtoF64, mkexpr(d1)));
564 ndep = s390_cc_widen(nd, False);
565
566 lox = binop(Iop_Xor64, lo, ndep); /* convey dependency */
567
568 s390_cc_thunk_fill(op, hi, lox, ndep);
569}
570
571
572static void
573s390_cc_set(UInt val)
574{
575 s390_cc_thunk_fill(mkU64(S390_CC_OP_SET),
576 mkU64(val), mkU64(0), mkU64(0));
577}
578
579/* Build IR to calculate the condition code from flags thunk.
580 Returns an expression of type Ity_I32 */
581static IRExpr *
582s390_call_calculate_cc(void)
583{
584 IRExpr **args, *call, *op, *dep1, *dep2, *ndep;
585
586 op = IRExpr_Get(S390X_GUEST_OFFSET_CC_OP, Ity_I64);
587 dep1 = IRExpr_Get(S390X_GUEST_OFFSET_CC_DEP1, Ity_I64);
588 dep2 = IRExpr_Get(S390X_GUEST_OFFSET_CC_DEP2, Ity_I64);
589 ndep = IRExpr_Get(S390X_GUEST_OFFSET_CC_NDEP, Ity_I64);
590
591 args = mkIRExprVec_4(op, dep1, dep2, ndep);
592 call = mkIRExprCCall(Ity_I32, 0 /*regparm*/,
593 "s390_calculate_cc", &s390_calculate_cc, args);
594
595 /* Exclude OP and NDEP from definedness checking. We're only
596 interested in DEP1 and DEP2. */
597 call->Iex.CCall.cee->mcx_mask = (1<<0) | (1<<3);
598
599 return call;
600}
601
602/* Build IR to calculate the internal condition code for a "compare and branch"
603 insn. Returns an expression of type Ity_I32 */
604static IRExpr *
605s390_call_calculate_icc(UInt opc, IRTemp op1, IRTemp op2, Bool sign_extend)
606{
607 IRExpr **args, *call, *op, *dep1, *dep2;
608
609 op = mkU64(opc);
610 dep1 = s390_cc_widen(op1, sign_extend);
611 dep2 = s390_cc_widen(op2, sign_extend);
612
613 args = mkIRExprVec_3(op, dep1, dep2);
614 call = mkIRExprCCall(Ity_I32, 0 /*regparm*/,
615 "s390_calculate_icc", &s390_calculate_icc, args);
616
617 /* Exclude OP from definedness checking. We're only
618 interested in DEP1 and DEP2. */
619 call->Iex.CCall.cee->mcx_mask = (1<<0);
620
621 return call;
622}
623
624/* Build IR to calculate the condition code from flags thunk.
625 Returns an expression of type Ity_I32 */
626static IRExpr *
627s390_call_calculate_cond(UInt m)
628{
629 IRExpr **args, *call, *op, *dep1, *dep2, *ndep, *mask;
630
631 mask = mkU64(m);
632 op = IRExpr_Get(S390X_GUEST_OFFSET_CC_OP, Ity_I64);
633 dep1 = IRExpr_Get(S390X_GUEST_OFFSET_CC_DEP1, Ity_I64);
634 dep2 = IRExpr_Get(S390X_GUEST_OFFSET_CC_DEP2, Ity_I64);
635 ndep = IRExpr_Get(S390X_GUEST_OFFSET_CC_NDEP, Ity_I64);
636
637 args = mkIRExprVec_5(mask, op, dep1, dep2, ndep);
638 call = mkIRExprCCall(Ity_I32, 0 /*regparm*/,
639 "s390_calculate_cond", &s390_calculate_cond, args);
640
641 /* Exclude the requested condition, OP and NDEP from definedness
642 checking. We're only interested in DEP1 and DEP2. */
643 call->Iex.CCall.cee->mcx_mask = (1<<0) | (1<<1) | (1<<4);
644
645 return call;
646}
647
648#define s390_cc_thunk_putZ(op,dep1) s390_cc_thunk_put1(op,dep1,False)
649#define s390_cc_thunk_putS(op,dep1) s390_cc_thunk_put1(op,dep1,True)
650#define s390_cc_thunk_putF(op,dep1) s390_cc_thunk_put1f(op,dep1)
651#define s390_cc_thunk_putZZ(op,dep1,dep2) s390_cc_thunk_put2(op,dep1,dep2,False)
652#define s390_cc_thunk_putSS(op,dep1,dep2) s390_cc_thunk_put2(op,dep1,dep2,True)
653#define s390_cc_thunk_putFF(op,dep1,dep2) s390_cc_thunk_put2f(op,dep1,dep2)
654#define s390_cc_thunk_putZZZ(op,dep1,dep2,ndep) \
655 s390_cc_thunk_put3(op,dep1,dep2,ndep,False)
656#define s390_cc_thunk_putSSS(op,dep1,dep2,ndep) \
657 s390_cc_thunk_put3(op,dep1,dep2,ndep,True)
658#define s390_call_calculate_iccZZ(op,dep1,dep2) \
659 s390_call_calculate_icc(op,dep1,dep2,False)
660#define s390_call_calculate_iccSS(op,dep1,dep2) \
661 s390_call_calculate_icc(op,dep1,dep2,True)
662
663
floriane88b3c92011-07-05 02:48:39 +0000664#define OFFB_TISTART S390X_GUEST_OFFSET(guest_TISTART)
665#define OFFB_TILEN S390X_GUEST_OFFSET(guest_TILEN)
sewardj2019a972011-03-07 16:04:07 +0000666
667
668/*------------------------------------------------------------*/
669/*--- Guest register access ---*/
670/*------------------------------------------------------------*/
671
672
673/*------------------------------------------------------------*/
674/*--- ar registers ---*/
675/*------------------------------------------------------------*/
676
677/* Return the guest state offset of a ar register. */
678static UInt
679ar_offset(UInt archreg)
680{
681 static const UInt offset[16] = {
floriane88b3c92011-07-05 02:48:39 +0000682 S390X_GUEST_OFFSET(guest_a0),
683 S390X_GUEST_OFFSET(guest_a1),
684 S390X_GUEST_OFFSET(guest_a2),
685 S390X_GUEST_OFFSET(guest_a3),
686 S390X_GUEST_OFFSET(guest_a4),
687 S390X_GUEST_OFFSET(guest_a5),
688 S390X_GUEST_OFFSET(guest_a6),
689 S390X_GUEST_OFFSET(guest_a7),
690 S390X_GUEST_OFFSET(guest_a8),
691 S390X_GUEST_OFFSET(guest_a9),
692 S390X_GUEST_OFFSET(guest_a10),
693 S390X_GUEST_OFFSET(guest_a11),
694 S390X_GUEST_OFFSET(guest_a12),
695 S390X_GUEST_OFFSET(guest_a13),
696 S390X_GUEST_OFFSET(guest_a14),
697 S390X_GUEST_OFFSET(guest_a15),
sewardj2019a972011-03-07 16:04:07 +0000698 };
699
700 vassert(archreg < 16);
701
702 return offset[archreg];
703}
704
705
706/* Return the guest state offset of word #0 of a ar register. */
707static __inline__ UInt
708ar_w0_offset(UInt archreg)
709{
710 return ar_offset(archreg) + 0;
711}
712
713/* Write word #0 of a ar to the guest state. */
714static __inline__ void
715put_ar_w0(UInt archreg, IRExpr *expr)
716{
717 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I32);
718
719 stmt(IRStmt_Put(ar_w0_offset(archreg), expr));
720}
721
722/* Read word #0 of a ar register. */
723static __inline__ IRExpr *
724get_ar_w0(UInt archreg)
725{
726 return IRExpr_Get(ar_w0_offset(archreg), Ity_I32);
727}
728
729
730/*------------------------------------------------------------*/
731/*--- fpr registers ---*/
732/*------------------------------------------------------------*/
733
734/* Return the guest state offset of a fpr register. */
735static UInt
736fpr_offset(UInt archreg)
737{
738 static const UInt offset[16] = {
floriane88b3c92011-07-05 02:48:39 +0000739 S390X_GUEST_OFFSET(guest_f0),
740 S390X_GUEST_OFFSET(guest_f1),
741 S390X_GUEST_OFFSET(guest_f2),
742 S390X_GUEST_OFFSET(guest_f3),
743 S390X_GUEST_OFFSET(guest_f4),
744 S390X_GUEST_OFFSET(guest_f5),
745 S390X_GUEST_OFFSET(guest_f6),
746 S390X_GUEST_OFFSET(guest_f7),
747 S390X_GUEST_OFFSET(guest_f8),
748 S390X_GUEST_OFFSET(guest_f9),
749 S390X_GUEST_OFFSET(guest_f10),
750 S390X_GUEST_OFFSET(guest_f11),
751 S390X_GUEST_OFFSET(guest_f12),
752 S390X_GUEST_OFFSET(guest_f13),
753 S390X_GUEST_OFFSET(guest_f14),
754 S390X_GUEST_OFFSET(guest_f15),
sewardj2019a972011-03-07 16:04:07 +0000755 };
756
757 vassert(archreg < 16);
758
759 return offset[archreg];
760}
761
762
763/* Return the guest state offset of word #0 of a fpr register. */
764static __inline__ UInt
765fpr_w0_offset(UInt archreg)
766{
767 return fpr_offset(archreg) + 0;
768}
769
770/* Write word #0 of a fpr to the guest state. */
771static __inline__ void
772put_fpr_w0(UInt archreg, IRExpr *expr)
773{
774 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_F32);
775
776 stmt(IRStmt_Put(fpr_w0_offset(archreg), expr));
777}
778
779/* Read word #0 of a fpr register. */
780static __inline__ IRExpr *
781get_fpr_w0(UInt archreg)
782{
783 return IRExpr_Get(fpr_w0_offset(archreg), Ity_F32);
784}
785
786/* Return the guest state offset of double word #0 of a fpr register. */
787static __inline__ UInt
788fpr_dw0_offset(UInt archreg)
789{
790 return fpr_offset(archreg) + 0;
791}
792
793/* Write double word #0 of a fpr to the guest state. */
794static __inline__ void
795put_fpr_dw0(UInt archreg, IRExpr *expr)
796{
797 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_F64);
798
799 stmt(IRStmt_Put(fpr_dw0_offset(archreg), expr));
800}
801
802/* Read double word #0 of a fpr register. */
803static __inline__ IRExpr *
804get_fpr_dw0(UInt archreg)
805{
806 return IRExpr_Get(fpr_dw0_offset(archreg), Ity_F64);
807}
808
809
810/*------------------------------------------------------------*/
811/*--- gpr registers ---*/
812/*------------------------------------------------------------*/
813
814/* Return the guest state offset of a gpr register. */
815static UInt
816gpr_offset(UInt archreg)
817{
818 static const UInt offset[16] = {
floriane88b3c92011-07-05 02:48:39 +0000819 S390X_GUEST_OFFSET(guest_r0),
820 S390X_GUEST_OFFSET(guest_r1),
821 S390X_GUEST_OFFSET(guest_r2),
822 S390X_GUEST_OFFSET(guest_r3),
823 S390X_GUEST_OFFSET(guest_r4),
824 S390X_GUEST_OFFSET(guest_r5),
825 S390X_GUEST_OFFSET(guest_r6),
826 S390X_GUEST_OFFSET(guest_r7),
827 S390X_GUEST_OFFSET(guest_r8),
828 S390X_GUEST_OFFSET(guest_r9),
829 S390X_GUEST_OFFSET(guest_r10),
830 S390X_GUEST_OFFSET(guest_r11),
831 S390X_GUEST_OFFSET(guest_r12),
832 S390X_GUEST_OFFSET(guest_r13),
833 S390X_GUEST_OFFSET(guest_r14),
834 S390X_GUEST_OFFSET(guest_r15),
sewardj2019a972011-03-07 16:04:07 +0000835 };
836
837 vassert(archreg < 16);
838
839 return offset[archreg];
840}
841
842
843/* Return the guest state offset of word #0 of a gpr register. */
844static __inline__ UInt
845gpr_w0_offset(UInt archreg)
846{
847 return gpr_offset(archreg) + 0;
848}
849
850/* Write word #0 of a gpr to the guest state. */
851static __inline__ void
852put_gpr_w0(UInt archreg, IRExpr *expr)
853{
854 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I32);
855
856 stmt(IRStmt_Put(gpr_w0_offset(archreg), expr));
857}
858
859/* Read word #0 of a gpr register. */
860static __inline__ IRExpr *
861get_gpr_w0(UInt archreg)
862{
863 return IRExpr_Get(gpr_w0_offset(archreg), Ity_I32);
864}
865
866/* Return the guest state offset of double word #0 of a gpr register. */
867static __inline__ UInt
868gpr_dw0_offset(UInt archreg)
869{
870 return gpr_offset(archreg) + 0;
871}
872
873/* Write double word #0 of a gpr to the guest state. */
874static __inline__ void
875put_gpr_dw0(UInt archreg, IRExpr *expr)
876{
877 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I64);
878
879 stmt(IRStmt_Put(gpr_dw0_offset(archreg), expr));
880}
881
882/* Read double word #0 of a gpr register. */
883static __inline__ IRExpr *
884get_gpr_dw0(UInt archreg)
885{
886 return IRExpr_Get(gpr_dw0_offset(archreg), Ity_I64);
887}
888
889/* Return the guest state offset of half word #1 of a gpr register. */
890static __inline__ UInt
891gpr_hw1_offset(UInt archreg)
892{
893 return gpr_offset(archreg) + 2;
894}
895
896/* Write half word #1 of a gpr to the guest state. */
897static __inline__ void
898put_gpr_hw1(UInt archreg, IRExpr *expr)
899{
900 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I16);
901
902 stmt(IRStmt_Put(gpr_hw1_offset(archreg), expr));
903}
904
905/* Read half word #1 of a gpr register. */
906static __inline__ IRExpr *
907get_gpr_hw1(UInt archreg)
908{
909 return IRExpr_Get(gpr_hw1_offset(archreg), Ity_I16);
910}
911
912/* Return the guest state offset of byte #6 of a gpr register. */
913static __inline__ UInt
914gpr_b6_offset(UInt archreg)
915{
916 return gpr_offset(archreg) + 6;
917}
918
919/* Write byte #6 of a gpr to the guest state. */
920static __inline__ void
921put_gpr_b6(UInt archreg, IRExpr *expr)
922{
923 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I8);
924
925 stmt(IRStmt_Put(gpr_b6_offset(archreg), expr));
926}
927
928/* Read byte #6 of a gpr register. */
929static __inline__ IRExpr *
930get_gpr_b6(UInt archreg)
931{
932 return IRExpr_Get(gpr_b6_offset(archreg), Ity_I8);
933}
934
935/* Return the guest state offset of byte #3 of a gpr register. */
936static __inline__ UInt
937gpr_b3_offset(UInt archreg)
938{
939 return gpr_offset(archreg) + 3;
940}
941
942/* Write byte #3 of a gpr to the guest state. */
943static __inline__ void
944put_gpr_b3(UInt archreg, IRExpr *expr)
945{
946 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I8);
947
948 stmt(IRStmt_Put(gpr_b3_offset(archreg), expr));
949}
950
951/* Read byte #3 of a gpr register. */
952static __inline__ IRExpr *
953get_gpr_b3(UInt archreg)
954{
955 return IRExpr_Get(gpr_b3_offset(archreg), Ity_I8);
956}
957
958/* Return the guest state offset of byte #0 of a gpr register. */
959static __inline__ UInt
960gpr_b0_offset(UInt archreg)
961{
962 return gpr_offset(archreg) + 0;
963}
964
965/* Write byte #0 of a gpr to the guest state. */
966static __inline__ void
967put_gpr_b0(UInt archreg, IRExpr *expr)
968{
969 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I8);
970
971 stmt(IRStmt_Put(gpr_b0_offset(archreg), expr));
972}
973
974/* Read byte #0 of a gpr register. */
975static __inline__ IRExpr *
976get_gpr_b0(UInt archreg)
977{
978 return IRExpr_Get(gpr_b0_offset(archreg), Ity_I8);
979}
980
981/* Return the guest state offset of word #1 of a gpr register. */
982static __inline__ UInt
983gpr_w1_offset(UInt archreg)
984{
985 return gpr_offset(archreg) + 4;
986}
987
988/* Write word #1 of a gpr to the guest state. */
989static __inline__ void
990put_gpr_w1(UInt archreg, IRExpr *expr)
991{
992 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I32);
993
994 stmt(IRStmt_Put(gpr_w1_offset(archreg), expr));
995}
996
997/* Read word #1 of a gpr register. */
998static __inline__ IRExpr *
999get_gpr_w1(UInt archreg)
1000{
1001 return IRExpr_Get(gpr_w1_offset(archreg), Ity_I32);
1002}
1003
1004/* Return the guest state offset of half word #3 of a gpr register. */
1005static __inline__ UInt
1006gpr_hw3_offset(UInt archreg)
1007{
1008 return gpr_offset(archreg) + 6;
1009}
1010
1011/* Write half word #3 of a gpr to the guest state. */
1012static __inline__ void
1013put_gpr_hw3(UInt archreg, IRExpr *expr)
1014{
1015 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I16);
1016
1017 stmt(IRStmt_Put(gpr_hw3_offset(archreg), expr));
1018}
1019
1020/* Read half word #3 of a gpr register. */
1021static __inline__ IRExpr *
1022get_gpr_hw3(UInt archreg)
1023{
1024 return IRExpr_Get(gpr_hw3_offset(archreg), Ity_I16);
1025}
1026
1027/* Return the guest state offset of byte #7 of a gpr register. */
1028static __inline__ UInt
1029gpr_b7_offset(UInt archreg)
1030{
1031 return gpr_offset(archreg) + 7;
1032}
1033
1034/* Write byte #7 of a gpr to the guest state. */
1035static __inline__ void
1036put_gpr_b7(UInt archreg, IRExpr *expr)
1037{
1038 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I8);
1039
1040 stmt(IRStmt_Put(gpr_b7_offset(archreg), expr));
1041}
1042
1043/* Read byte #7 of a gpr register. */
1044static __inline__ IRExpr *
1045get_gpr_b7(UInt archreg)
1046{
1047 return IRExpr_Get(gpr_b7_offset(archreg), Ity_I8);
1048}
1049
1050/* Return the guest state offset of half word #0 of a gpr register. */
1051static __inline__ UInt
1052gpr_hw0_offset(UInt archreg)
1053{
1054 return gpr_offset(archreg) + 0;
1055}
1056
1057/* Write half word #0 of a gpr to the guest state. */
1058static __inline__ void
1059put_gpr_hw0(UInt archreg, IRExpr *expr)
1060{
1061 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I16);
1062
1063 stmt(IRStmt_Put(gpr_hw0_offset(archreg), expr));
1064}
1065
1066/* Read half word #0 of a gpr register. */
1067static __inline__ IRExpr *
1068get_gpr_hw0(UInt archreg)
1069{
1070 return IRExpr_Get(gpr_hw0_offset(archreg), Ity_I16);
1071}
1072
1073/* Return the guest state offset of byte #4 of a gpr register. */
1074static __inline__ UInt
1075gpr_b4_offset(UInt archreg)
1076{
1077 return gpr_offset(archreg) + 4;
1078}
1079
1080/* Write byte #4 of a gpr to the guest state. */
1081static __inline__ void
1082put_gpr_b4(UInt archreg, IRExpr *expr)
1083{
1084 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I8);
1085
1086 stmt(IRStmt_Put(gpr_b4_offset(archreg), expr));
1087}
1088
1089/* Read byte #4 of a gpr register. */
1090static __inline__ IRExpr *
1091get_gpr_b4(UInt archreg)
1092{
1093 return IRExpr_Get(gpr_b4_offset(archreg), Ity_I8);
1094}
1095
1096/* Return the guest state offset of byte #1 of a gpr register. */
1097static __inline__ UInt
1098gpr_b1_offset(UInt archreg)
1099{
1100 return gpr_offset(archreg) + 1;
1101}
1102
1103/* Write byte #1 of a gpr to the guest state. */
1104static __inline__ void
1105put_gpr_b1(UInt archreg, IRExpr *expr)
1106{
1107 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I8);
1108
1109 stmt(IRStmt_Put(gpr_b1_offset(archreg), expr));
1110}
1111
1112/* Read byte #1 of a gpr register. */
1113static __inline__ IRExpr *
1114get_gpr_b1(UInt archreg)
1115{
1116 return IRExpr_Get(gpr_b1_offset(archreg), Ity_I8);
1117}
1118
1119/* Return the guest state offset of half word #2 of a gpr register. */
1120static __inline__ UInt
1121gpr_hw2_offset(UInt archreg)
1122{
1123 return gpr_offset(archreg) + 4;
1124}
1125
1126/* Write half word #2 of a gpr to the guest state. */
1127static __inline__ void
1128put_gpr_hw2(UInt archreg, IRExpr *expr)
1129{
1130 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I16);
1131
1132 stmt(IRStmt_Put(gpr_hw2_offset(archreg), expr));
1133}
1134
1135/* Read half word #2 of a gpr register. */
1136static __inline__ IRExpr *
1137get_gpr_hw2(UInt archreg)
1138{
1139 return IRExpr_Get(gpr_hw2_offset(archreg), Ity_I16);
1140}
1141
1142/* Return the guest state offset of byte #5 of a gpr register. */
1143static __inline__ UInt
1144gpr_b5_offset(UInt archreg)
1145{
1146 return gpr_offset(archreg) + 5;
1147}
1148
1149/* Write byte #5 of a gpr to the guest state. */
1150static __inline__ void
1151put_gpr_b5(UInt archreg, IRExpr *expr)
1152{
1153 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I8);
1154
1155 stmt(IRStmt_Put(gpr_b5_offset(archreg), expr));
1156}
1157
1158/* Read byte #5 of a gpr register. */
1159static __inline__ IRExpr *
1160get_gpr_b5(UInt archreg)
1161{
1162 return IRExpr_Get(gpr_b5_offset(archreg), Ity_I8);
1163}
1164
1165/* Return the guest state offset of byte #2 of a gpr register. */
1166static __inline__ UInt
1167gpr_b2_offset(UInt archreg)
1168{
1169 return gpr_offset(archreg) + 2;
1170}
1171
1172/* Write byte #2 of a gpr to the guest state. */
1173static __inline__ void
1174put_gpr_b2(UInt archreg, IRExpr *expr)
1175{
1176 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I8);
1177
1178 stmt(IRStmt_Put(gpr_b2_offset(archreg), expr));
1179}
1180
1181/* Read byte #2 of a gpr register. */
1182static __inline__ IRExpr *
1183get_gpr_b2(UInt archreg)
1184{
1185 return IRExpr_Get(gpr_b2_offset(archreg), Ity_I8);
1186}
1187
1188/* Return the guest state offset of the counter register. */
1189static UInt
1190counter_offset(void)
1191{
floriane88b3c92011-07-05 02:48:39 +00001192 return S390X_GUEST_OFFSET(guest_counter);
sewardj2019a972011-03-07 16:04:07 +00001193}
1194
1195/* Return the guest state offset of double word #0 of the counter register. */
1196static __inline__ UInt
1197counter_dw0_offset(void)
1198{
1199 return counter_offset() + 0;
1200}
1201
1202/* Write double word #0 of the counter to the guest state. */
1203static __inline__ void
1204put_counter_dw0(IRExpr *expr)
1205{
1206 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I64);
1207
1208 stmt(IRStmt_Put(counter_dw0_offset(), expr));
1209}
1210
1211/* Read double word #0 of the counter register. */
1212static __inline__ IRExpr *
1213get_counter_dw0(void)
1214{
1215 return IRExpr_Get(counter_dw0_offset(), Ity_I64);
1216}
1217
1218/* Return the guest state offset of word #0 of the counter register. */
1219static __inline__ UInt
1220counter_w0_offset(void)
1221{
1222 return counter_offset() + 0;
1223}
1224
1225/* Return the guest state offset of word #1 of the counter register. */
1226static __inline__ UInt
1227counter_w1_offset(void)
1228{
1229 return counter_offset() + 4;
1230}
1231
1232/* Write word #0 of the counter to the guest state. */
1233static __inline__ void
1234put_counter_w0(IRExpr *expr)
1235{
1236 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I32);
1237
1238 stmt(IRStmt_Put(counter_w0_offset(), expr));
1239}
1240
1241/* Read word #0 of the counter register. */
1242static __inline__ IRExpr *
1243get_counter_w0(void)
1244{
1245 return IRExpr_Get(counter_w0_offset(), Ity_I32);
1246}
1247
1248/* Write word #1 of the counter to the guest state. */
1249static __inline__ void
1250put_counter_w1(IRExpr *expr)
1251{
1252 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I32);
1253
1254 stmt(IRStmt_Put(counter_w1_offset(), expr));
1255}
1256
1257/* Read word #1 of the counter register. */
1258static __inline__ IRExpr *
1259get_counter_w1(void)
1260{
1261 return IRExpr_Get(counter_w1_offset(), Ity_I32);
1262}
1263
1264/* Return the guest state offset of the fpc register. */
1265static UInt
1266fpc_offset(void)
1267{
floriane88b3c92011-07-05 02:48:39 +00001268 return S390X_GUEST_OFFSET(guest_fpc);
sewardj2019a972011-03-07 16:04:07 +00001269}
1270
1271/* Return the guest state offset of word #0 of the fpc register. */
1272static __inline__ UInt
1273fpc_w0_offset(void)
1274{
1275 return fpc_offset() + 0;
1276}
1277
1278/* Write word #0 of the fpc to the guest state. */
1279static __inline__ void
1280put_fpc_w0(IRExpr *expr)
1281{
1282 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I32);
1283
1284 stmt(IRStmt_Put(fpc_w0_offset(), expr));
1285}
1286
1287/* Read word #0 of the fpc register. */
1288static __inline__ IRExpr *
1289get_fpc_w0(void)
1290{
1291 return IRExpr_Get(fpc_w0_offset(), Ity_I32);
1292}
1293
1294
1295/*------------------------------------------------------------*/
1296/*--- Build IR for formats ---*/
1297/*------------------------------------------------------------*/
1298static void
1299s390_format_I(HChar *(*irgen)(UChar i),
1300 UChar i)
1301{
1302 HChar *mnm = irgen(i);
1303
sewardj7ee97522011-05-09 21:45:04 +00001304 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001305 s390_disasm(ENC2(MNM, UINT), mnm, i);
1306}
1307
1308static void
1309s390_format_RI(HChar *(*irgen)(UChar r1, UShort i2),
1310 UChar r1, UShort i2)
1311{
1312 irgen(r1, i2);
1313}
1314
1315static void
1316s390_format_RI_RU(HChar *(*irgen)(UChar r1, UShort i2),
1317 UChar r1, UShort i2)
1318{
1319 HChar *mnm = irgen(r1, i2);
1320
sewardj7ee97522011-05-09 21:45:04 +00001321 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001322 s390_disasm(ENC3(MNM, GPR, UINT), mnm, r1, i2);
1323}
1324
1325static void
1326s390_format_RI_RI(HChar *(*irgen)(UChar r1, UShort i2),
1327 UChar r1, UShort i2)
1328{
1329 HChar *mnm = irgen(r1, i2);
1330
sewardj7ee97522011-05-09 21:45:04 +00001331 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001332 s390_disasm(ENC3(MNM, GPR, INT), mnm, r1, (Int)(Short)i2);
1333}
1334
1335static void
1336s390_format_RI_RP(HChar *(*irgen)(UChar r1, UShort i2),
1337 UChar r1, UShort i2)
1338{
1339 HChar *mnm = irgen(r1, i2);
1340
sewardj7ee97522011-05-09 21:45:04 +00001341 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001342 s390_disasm(ENC3(MNM, GPR, PCREL), mnm, r1, (Int)(Short)i2);
1343}
1344
1345static void
1346s390_format_RIE_RRP(HChar *(*irgen)(UChar r1, UChar r3, UShort i2),
1347 UChar r1, UChar r3, UShort i2)
1348{
1349 HChar *mnm = irgen(r1, r3, i2);
1350
sewardj7ee97522011-05-09 21:45:04 +00001351 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001352 s390_disasm(ENC4(MNM, GPR, GPR, PCREL), mnm, r1, r3, (Int)(Short)i2);
1353}
1354
1355static void
1356s390_format_RIE_RRI0(HChar *(*irgen)(UChar r1, UChar r3, UShort i2),
1357 UChar r1, UChar r3, UShort i2)
1358{
1359 HChar *mnm = irgen(r1, r3, i2);
1360
sewardj7ee97522011-05-09 21:45:04 +00001361 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001362 s390_disasm(ENC4(MNM, GPR, GPR, INT), mnm, r1, r3, (Int)(Short)i2);
1363}
1364
1365static void
1366s390_format_RIE_RRUUU(HChar *(*irgen)(UChar r1, UChar r2, UChar i3, UChar i4,
1367 UChar i5),
1368 UChar r1, UChar r2, UChar i3, UChar i4, UChar i5)
1369{
1370 HChar *mnm = irgen(r1, r2, i3, i4, i5);
1371
sewardj7ee97522011-05-09 21:45:04 +00001372 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001373 s390_disasm(ENC6(MNM, GPR, GPR, UINT, UINT, UINT), mnm, r1, r2, i3, i4,
1374 i5);
1375}
1376
1377static void
1378s390_format_RIE_RRPU(HChar *(*irgen)(UChar r1, UChar r2, UShort i4, UChar m3),
1379 UChar r1, UChar r2, UShort i4, UChar m3)
1380{
1381 HChar *mnm = irgen(r1, r2, i4, m3);
1382
sewardj7ee97522011-05-09 21:45:04 +00001383 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001384 s390_disasm(ENC5(XMNM, GPR, GPR, CABM, PCREL), S390_XMNM_CAB, mnm, m3, r1,
1385 r2, m3, (Int)(Short)i4);
1386}
1387
1388static void
1389s390_format_RIE_RUPU(HChar *(*irgen)(UChar r1, UChar m3, UShort i4, UChar i2),
1390 UChar r1, UChar m3, UShort i4, UChar i2)
1391{
1392 HChar *mnm = irgen(r1, m3, i4, i2);
1393
sewardj7ee97522011-05-09 21:45:04 +00001394 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001395 s390_disasm(ENC5(XMNM, GPR, UINT, CABM, PCREL), S390_XMNM_CAB, mnm, m3,
1396 r1, i2, m3, (Int)(Short)i4);
1397}
1398
1399static void
1400s390_format_RIE_RUPI(HChar *(*irgen)(UChar r1, UChar m3, UShort i4, UChar i2),
1401 UChar r1, UChar m3, UShort i4, UChar i2)
1402{
1403 HChar *mnm = irgen(r1, m3, i4, i2);
1404
sewardj7ee97522011-05-09 21:45:04 +00001405 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001406 s390_disasm(ENC5(XMNM, GPR, INT, CABM, PCREL), S390_XMNM_CAB, mnm, m3, r1,
1407 (Int)(Char)i2, m3, (Int)(Short)i4);
1408}
1409
1410static void
1411s390_format_RIL(HChar *(*irgen)(UChar r1, UInt i2),
1412 UChar r1, UInt i2)
1413{
1414 irgen(r1, i2);
1415}
1416
1417static void
1418s390_format_RIL_RU(HChar *(*irgen)(UChar r1, UInt i2),
1419 UChar r1, UInt i2)
1420{
1421 HChar *mnm = irgen(r1, i2);
1422
sewardj7ee97522011-05-09 21:45:04 +00001423 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001424 s390_disasm(ENC3(MNM, GPR, UINT), mnm, r1, i2);
1425}
1426
1427static void
1428s390_format_RIL_RI(HChar *(*irgen)(UChar r1, UInt i2),
1429 UChar r1, UInt i2)
1430{
1431 HChar *mnm = irgen(r1, i2);
1432
sewardj7ee97522011-05-09 21:45:04 +00001433 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001434 s390_disasm(ENC3(MNM, GPR, INT), mnm, r1, i2);
1435}
1436
1437static void
1438s390_format_RIL_RP(HChar *(*irgen)(UChar r1, UInt i2),
1439 UChar r1, UInt i2)
1440{
1441 HChar *mnm = irgen(r1, i2);
1442
sewardj7ee97522011-05-09 21:45:04 +00001443 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001444 s390_disasm(ENC3(MNM, GPR, PCREL), mnm, r1, i2);
1445}
1446
1447static void
1448s390_format_RIL_UP(HChar *(*irgen)(void),
1449 UChar r1, UInt i2)
1450{
1451 HChar *mnm = irgen();
1452
sewardj7ee97522011-05-09 21:45:04 +00001453 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001454 s390_disasm(ENC3(MNM, UINT, PCREL), mnm, r1, i2);
1455}
1456
1457static void
1458s390_format_RIS_RURDI(HChar *(*irgen)(UChar r1, UChar m3, UChar i2,
1459 IRTemp op4addr),
1460 UChar r1, UChar m3, UChar b4, UShort d4, UChar i2)
1461{
1462 HChar *mnm;
1463 IRTemp op4addr = newTemp(Ity_I64);
1464
1465 assign(op4addr, binop(Iop_Add64, mkU64(d4), b4 != 0 ? get_gpr_dw0(b4) :
1466 mkU64(0)));
1467
1468 mnm = irgen(r1, m3, i2, op4addr);
1469
sewardj7ee97522011-05-09 21:45:04 +00001470 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001471 s390_disasm(ENC5(XMNM, GPR, INT, CABM, UDXB), S390_XMNM_CAB, mnm, m3, r1,
1472 (Int)(Char)i2, m3, d4, 0, b4);
1473}
1474
1475static void
1476s390_format_RIS_RURDU(HChar *(*irgen)(UChar r1, UChar m3, UChar i2,
1477 IRTemp op4addr),
1478 UChar r1, UChar m3, UChar b4, UShort d4, UChar i2)
1479{
1480 HChar *mnm;
1481 IRTemp op4addr = newTemp(Ity_I64);
1482
1483 assign(op4addr, binop(Iop_Add64, mkU64(d4), b4 != 0 ? get_gpr_dw0(b4) :
1484 mkU64(0)));
1485
1486 mnm = irgen(r1, m3, i2, op4addr);
1487
sewardj7ee97522011-05-09 21:45:04 +00001488 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001489 s390_disasm(ENC5(XMNM, GPR, UINT, CABM, UDXB), S390_XMNM_CAB, mnm, m3, r1,
1490 i2, m3, d4, 0, b4);
1491}
1492
1493static void
1494s390_format_RR(HChar *(*irgen)(UChar r1, UChar r2),
1495 UChar r1, UChar r2)
1496{
1497 irgen(r1, r2);
1498}
1499
1500static void
1501s390_format_RR_RR(HChar *(*irgen)(UChar r1, UChar r2),
1502 UChar r1, UChar r2)
1503{
1504 HChar *mnm = irgen(r1, r2);
1505
sewardj7ee97522011-05-09 21:45:04 +00001506 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001507 s390_disasm(ENC3(MNM, GPR, GPR), mnm, r1, r2);
1508}
1509
1510static void
1511s390_format_RR_FF(HChar *(*irgen)(UChar r1, UChar r2),
1512 UChar r1, UChar r2)
1513{
1514 HChar *mnm = irgen(r1, r2);
1515
sewardj7ee97522011-05-09 21:45:04 +00001516 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001517 s390_disasm(ENC3(MNM, FPR, FPR), mnm, r1, r2);
1518}
1519
1520static void
1521s390_format_RRE(HChar *(*irgen)(UChar r1, UChar r2),
1522 UChar r1, UChar r2)
1523{
1524 irgen(r1, r2);
1525}
1526
1527static void
1528s390_format_RRE_RR(HChar *(*irgen)(UChar r1, UChar r2),
1529 UChar r1, UChar r2)
1530{
1531 HChar *mnm = irgen(r1, r2);
1532
sewardj7ee97522011-05-09 21:45:04 +00001533 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001534 s390_disasm(ENC3(MNM, GPR, GPR), mnm, r1, r2);
1535}
1536
1537static void
1538s390_format_RRE_FF(HChar *(*irgen)(UChar r1, UChar r2),
1539 UChar r1, UChar r2)
1540{
1541 HChar *mnm = irgen(r1, r2);
1542
sewardj7ee97522011-05-09 21:45:04 +00001543 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001544 s390_disasm(ENC3(MNM, FPR, FPR), mnm, r1, r2);
1545}
1546
1547static void
1548s390_format_RRE_RF(HChar *(*irgen)(UChar, UChar),
1549 UChar r1, UChar r2)
1550{
1551 HChar *mnm = irgen(r1, r2);
1552
sewardj7ee97522011-05-09 21:45:04 +00001553 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001554 s390_disasm(ENC3(MNM, GPR, FPR), mnm, r1, r2);
1555}
1556
1557static void
1558s390_format_RRE_FR(HChar *(*irgen)(UChar r1, UChar r2),
1559 UChar r1, UChar r2)
1560{
1561 HChar *mnm = irgen(r1, r2);
1562
sewardj7ee97522011-05-09 21:45:04 +00001563 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001564 s390_disasm(ENC3(MNM, FPR, GPR), mnm, r1, r2);
1565}
1566
1567static void
1568s390_format_RRE_R0(HChar *(*irgen)(UChar r1),
1569 UChar r1)
1570{
1571 HChar *mnm = irgen(r1);
1572
sewardj7ee97522011-05-09 21:45:04 +00001573 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001574 s390_disasm(ENC2(MNM, GPR), mnm, r1);
1575}
1576
1577static void
1578s390_format_RRE_F0(HChar *(*irgen)(UChar r1),
1579 UChar r1)
1580{
1581 HChar *mnm = irgen(r1);
1582
sewardj7ee97522011-05-09 21:45:04 +00001583 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001584 s390_disasm(ENC2(MNM, FPR), mnm, r1);
1585}
1586
1587static void
florian9af37692012-01-15 21:01:16 +00001588s390_format_RRF_M0RERE(HChar *(*irgen)(UChar m3, UChar r1, UChar r2),
1589 UChar m3, UChar r1, UChar r2)
1590{
1591 irgen(m3, r1, r2);
1592
1593 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
1594 s390_disasm(ENC3(MNM, GPR, GPR), m3, r1, r2);
1595}
1596
1597static void
sewardj2019a972011-03-07 16:04:07 +00001598s390_format_RRF_F0FF(HChar *(*irgen)(UChar, UChar, UChar),
1599 UChar r1, UChar r3, UChar r2)
1600{
1601 HChar *mnm = irgen(r1, r3, r2);
1602
sewardj7ee97522011-05-09 21:45:04 +00001603 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001604 s390_disasm(ENC4(MNM, FPR, FPR, FPR), mnm, r1, r3, r2);
1605}
1606
1607static void
sewardjd7bde722011-04-05 13:19:33 +00001608s390_format_RRF_U0RR(HChar *(*irgen)(UChar m3, UChar r1, UChar r2),
1609 UChar m3, UChar r1, UChar r2, Int xmnm_kind)
1610{
1611 irgen(m3, r1, r2);
1612
sewardj7ee97522011-05-09 21:45:04 +00001613 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardjd7bde722011-04-05 13:19:33 +00001614 s390_disasm(ENC3(XMNM, GPR, GPR), xmnm_kind, m3, r1, r2);
1615}
1616
1617static void
sewardj2019a972011-03-07 16:04:07 +00001618s390_format_RRF_U0RF(HChar *(*irgen)(UChar r3, UChar r1, UChar r2),
1619 UChar r3, UChar r1, UChar r2)
1620{
1621 HChar *mnm = irgen(r3, r1, r2);
1622
sewardj7ee97522011-05-09 21:45:04 +00001623 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001624 s390_disasm(ENC4(MNM, GPR, UINT, FPR), mnm, r1, r3, r2);
1625}
1626
1627static void
1628s390_format_RRF_F0FF2(HChar *(*irgen)(UChar, UChar, UChar),
1629 UChar r3, UChar r1, UChar r2)
1630{
1631 HChar *mnm = irgen(r3, r1, r2);
1632
sewardj7ee97522011-05-09 21:45:04 +00001633 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001634 s390_disasm(ENC4(MNM, FPR, FPR, FPR), mnm, r1, r3, r2);
1635}
1636
1637static void
1638s390_format_RRF_R0RR2(HChar *(*irgen)(UChar r3, UChar r1, UChar r2),
1639 UChar r3, UChar r1, UChar r2)
1640{
1641 HChar *mnm = irgen(r3, r1, r2);
1642
sewardj7ee97522011-05-09 21:45:04 +00001643 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001644 s390_disasm(ENC4(MNM, GPR, GPR, GPR), mnm, r1, r2, r3);
1645}
1646
1647static void
1648s390_format_RRS(HChar *(*irgen)(UChar r1, UChar r2, UChar m3, IRTemp op4addr),
1649 UChar r1, UChar r2, UChar b4, UShort d4, UChar m3)
1650{
1651 HChar *mnm;
1652 IRTemp op4addr = newTemp(Ity_I64);
1653
1654 assign(op4addr, binop(Iop_Add64, mkU64(d4), b4 != 0 ? get_gpr_dw0(b4) :
1655 mkU64(0)));
1656
1657 mnm = irgen(r1, r2, m3, op4addr);
1658
sewardj7ee97522011-05-09 21:45:04 +00001659 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001660 s390_disasm(ENC5(XMNM, GPR, GPR, CABM, UDXB), S390_XMNM_CAB, mnm, m3, r1,
1661 r2, m3, d4, 0, b4);
1662}
1663
1664static void
1665s390_format_RS_R0RD(HChar *(*irgen)(UChar r1, IRTemp op2addr),
1666 UChar r1, UChar b2, UShort d2)
1667{
1668 HChar *mnm;
1669 IRTemp op2addr = newTemp(Ity_I64);
1670
1671 assign(op2addr, binop(Iop_Add64, mkU64(d2), b2 != 0 ? get_gpr_dw0(b2) :
1672 mkU64(0)));
1673
1674 mnm = irgen(r1, op2addr);
1675
sewardj7ee97522011-05-09 21:45:04 +00001676 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001677 s390_disasm(ENC3(MNM, GPR, UDXB), mnm, r1, d2, 0, b2);
1678}
1679
1680static void
1681s390_format_RS_RRRD(HChar *(*irgen)(UChar r1, UChar r3, IRTemp op2addr),
1682 UChar r1, UChar r3, UChar b2, UShort d2)
1683{
1684 HChar *mnm;
1685 IRTemp op2addr = newTemp(Ity_I64);
1686
1687 assign(op2addr, binop(Iop_Add64, mkU64(d2), b2 != 0 ? get_gpr_dw0(b2) :
1688 mkU64(0)));
1689
1690 mnm = irgen(r1, r3, op2addr);
1691
sewardj7ee97522011-05-09 21:45:04 +00001692 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001693 s390_disasm(ENC4(MNM, GPR, GPR, UDXB), mnm, r1, r3, d2, 0, b2);
1694}
1695
1696static void
1697s390_format_RS_RURD(HChar *(*irgen)(UChar r1, UChar r3, IRTemp op2addr),
1698 UChar r1, UChar r3, UChar b2, UShort d2)
1699{
1700 HChar *mnm;
1701 IRTemp op2addr = newTemp(Ity_I64);
1702
1703 assign(op2addr, binop(Iop_Add64, mkU64(d2), b2 != 0 ? get_gpr_dw0(b2) :
1704 mkU64(0)));
1705
1706 mnm = irgen(r1, r3, op2addr);
1707
sewardj7ee97522011-05-09 21:45:04 +00001708 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001709 s390_disasm(ENC4(MNM, GPR, UINT, UDXB), mnm, r1, r3, d2, 0, b2);
1710}
1711
1712static void
1713s390_format_RS_AARD(HChar *(*irgen)(UChar, UChar, IRTemp),
1714 UChar r1, UChar r3, UChar b2, UShort d2)
1715{
1716 HChar *mnm;
1717 IRTemp op2addr = newTemp(Ity_I64);
1718
1719 assign(op2addr, binop(Iop_Add64, mkU64(d2), b2 != 0 ? get_gpr_dw0(b2) :
1720 mkU64(0)));
1721
1722 mnm = irgen(r1, r3, op2addr);
1723
sewardj7ee97522011-05-09 21:45:04 +00001724 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001725 s390_disasm(ENC4(MNM, AR, AR, UDXB), mnm, r1, r3, d2, 0, b2);
1726}
1727
1728static void
1729s390_format_RSI_RRP(HChar *(*irgen)(UChar r1, UChar r3, UShort i2),
1730 UChar r1, UChar r3, UShort i2)
1731{
1732 HChar *mnm = irgen(r1, r3, i2);
1733
sewardj7ee97522011-05-09 21:45:04 +00001734 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001735 s390_disasm(ENC4(MNM, GPR, GPR, PCREL), mnm, r1, r3, (Int)(Short)i2);
1736}
1737
1738static void
1739s390_format_RSY_RRRD(HChar *(*irgen)(UChar r1, UChar r3, IRTemp op2addr),
1740 UChar r1, UChar r3, UChar b2, UShort dl2, UChar dh2)
1741{
1742 HChar *mnm;
1743 IRTemp op2addr = newTemp(Ity_I64);
1744 IRTemp d2 = newTemp(Ity_I64);
1745
1746 assign(d2, mkU64(((ULong)(Long)(Char)dh2 << 12) | ((ULong)dl2)));
1747 assign(op2addr, binop(Iop_Add64, mkexpr(d2), b2 != 0 ? get_gpr_dw0(b2) :
1748 mkU64(0)));
1749
1750 mnm = irgen(r1, r3, op2addr);
1751
sewardj7ee97522011-05-09 21:45:04 +00001752 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001753 s390_disasm(ENC4(MNM, GPR, GPR, SDXB), mnm, r1, r3, dh2, dl2, 0, b2);
1754}
1755
1756static void
1757s390_format_RSY_AARD(HChar *(*irgen)(UChar, UChar, IRTemp),
1758 UChar r1, UChar r3, UChar b2, UShort dl2, UChar dh2)
1759{
1760 HChar *mnm;
1761 IRTemp op2addr = newTemp(Ity_I64);
1762 IRTemp d2 = newTemp(Ity_I64);
1763
1764 assign(d2, mkU64(((ULong)(Long)(Char)dh2 << 12) | ((ULong)dl2)));
1765 assign(op2addr, binop(Iop_Add64, mkexpr(d2), b2 != 0 ? get_gpr_dw0(b2) :
1766 mkU64(0)));
1767
1768 mnm = irgen(r1, r3, op2addr);
1769
sewardj7ee97522011-05-09 21:45:04 +00001770 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001771 s390_disasm(ENC4(MNM, AR, AR, SDXB), mnm, r1, r3, dh2, dl2, 0, b2);
1772}
1773
1774static void
1775s390_format_RSY_RURD(HChar *(*irgen)(UChar r1, UChar r3, IRTemp op2addr),
1776 UChar r1, UChar r3, UChar b2, UShort dl2, UChar dh2)
1777{
1778 HChar *mnm;
1779 IRTemp op2addr = newTemp(Ity_I64);
1780 IRTemp d2 = newTemp(Ity_I64);
1781
1782 assign(d2, mkU64(((ULong)(Long)(Char)dh2 << 12) | ((ULong)dl2)));
1783 assign(op2addr, binop(Iop_Add64, mkexpr(d2), b2 != 0 ? get_gpr_dw0(b2) :
1784 mkU64(0)));
1785
1786 mnm = irgen(r1, r3, op2addr);
1787
sewardj7ee97522011-05-09 21:45:04 +00001788 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001789 s390_disasm(ENC4(MNM, GPR, UINT, SDXB), mnm, r1, r3, dh2, dl2, 0, b2);
1790}
1791
1792static void
sewardjd7bde722011-04-05 13:19:33 +00001793s390_format_RSY_RDRM(HChar *(*irgen)(UChar r1, IRTemp op2addr),
1794 UChar r1, UChar m3, UChar b2, UShort dl2, UChar dh2,
1795 Int xmnm_kind)
1796{
1797 IRTemp op2addr = newTemp(Ity_I64);
1798 IRTemp d2 = newTemp(Ity_I64);
1799
1800 if_condition_goto(binop(Iop_CmpEQ32, s390_call_calculate_cond(m3), mkU32(0)),
1801 guest_IA_next_instr);
1802 assign(d2, mkU64(((ULong)(Long)(Char)dh2 << 12) | ((ULong)dl2)));
1803 assign(op2addr, binop(Iop_Add64, mkexpr(d2), b2 != 0 ? get_gpr_dw0(b2) :
1804 mkU64(0)));
1805
1806 irgen(r1, op2addr);
1807
sewardj7ee97522011-05-09 21:45:04 +00001808 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardjd7bde722011-04-05 13:19:33 +00001809 s390_disasm(ENC3(XMNM, GPR, SDXB), xmnm_kind, m3, r1, dh2, dl2, 0, b2);
1810}
1811
1812static void
sewardj2019a972011-03-07 16:04:07 +00001813s390_format_RX(HChar *(*irgen)(UChar r1, UChar x2, UChar b2, UShort d2,
1814 IRTemp op2addr),
1815 UChar r1, UChar x2, UChar b2, UShort d2)
1816{
1817 IRTemp op2addr = newTemp(Ity_I64);
1818
1819 assign(op2addr, binop(Iop_Add64, binop(Iop_Add64, mkU64(d2),
1820 b2 != 0 ? get_gpr_dw0(b2) : mkU64(0)), x2 != 0 ? get_gpr_dw0(x2) :
1821 mkU64(0)));
1822
1823 irgen(r1, x2, b2, d2, op2addr);
1824}
1825
1826static void
1827s390_format_RX_RRRD(HChar *(*irgen)(UChar r1, IRTemp op2addr),
1828 UChar r1, UChar x2, UChar b2, UShort d2)
1829{
1830 HChar *mnm;
1831 IRTemp op2addr = newTemp(Ity_I64);
1832
1833 assign(op2addr, binop(Iop_Add64, binop(Iop_Add64, mkU64(d2),
1834 b2 != 0 ? get_gpr_dw0(b2) : mkU64(0)), x2 != 0 ? get_gpr_dw0(x2) :
1835 mkU64(0)));
1836
1837 mnm = irgen(r1, op2addr);
1838
sewardj7ee97522011-05-09 21:45:04 +00001839 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001840 s390_disasm(ENC3(MNM, GPR, UDXB), mnm, r1, d2, x2, b2);
1841}
1842
1843static void
1844s390_format_RX_FRRD(HChar *(*irgen)(UChar r1, IRTemp op2addr),
1845 UChar r1, UChar x2, UChar b2, UShort d2)
1846{
1847 HChar *mnm;
1848 IRTemp op2addr = newTemp(Ity_I64);
1849
1850 assign(op2addr, binop(Iop_Add64, binop(Iop_Add64, mkU64(d2),
1851 b2 != 0 ? get_gpr_dw0(b2) : mkU64(0)), x2 != 0 ? get_gpr_dw0(x2) :
1852 mkU64(0)));
1853
1854 mnm = irgen(r1, op2addr);
1855
sewardj7ee97522011-05-09 21:45:04 +00001856 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001857 s390_disasm(ENC3(MNM, FPR, UDXB), mnm, r1, d2, x2, b2);
1858}
1859
1860static void
1861s390_format_RXE_FRRD(HChar *(*irgen)(UChar r1, IRTemp op2addr),
1862 UChar r1, UChar x2, UChar b2, UShort d2)
1863{
1864 HChar *mnm;
1865 IRTemp op2addr = newTemp(Ity_I64);
1866
1867 assign(op2addr, binop(Iop_Add64, binop(Iop_Add64, mkU64(d2),
1868 b2 != 0 ? get_gpr_dw0(b2) : mkU64(0)), x2 != 0 ? get_gpr_dw0(x2) :
1869 mkU64(0)));
1870
1871 mnm = irgen(r1, op2addr);
1872
sewardj7ee97522011-05-09 21:45:04 +00001873 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001874 s390_disasm(ENC3(MNM, FPR, UDXB), mnm, r1, d2, x2, b2);
1875}
1876
1877static void
1878s390_format_RXF_FRRDF(HChar *(*irgen)(UChar, IRTemp, UChar),
1879 UChar r3, UChar x2, UChar b2, UShort d2, UChar r1)
1880{
1881 HChar *mnm;
1882 IRTemp op2addr = newTemp(Ity_I64);
1883
1884 assign(op2addr, binop(Iop_Add64, binop(Iop_Add64, mkU64(d2),
1885 b2 != 0 ? get_gpr_dw0(b2) : mkU64(0)), x2 != 0 ? get_gpr_dw0(x2) :
1886 mkU64(0)));
1887
1888 mnm = irgen(r3, op2addr, r1);
1889
sewardj7ee97522011-05-09 21:45:04 +00001890 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001891 s390_disasm(ENC4(MNM, FPR, FPR, UDXB), mnm, r1, r3, d2, x2, b2);
1892}
1893
1894static void
1895s390_format_RXY_RRRD(HChar *(*irgen)(UChar r1, IRTemp op2addr),
1896 UChar r1, UChar x2, UChar b2, UShort dl2, UChar dh2)
1897{
1898 HChar *mnm;
1899 IRTemp op2addr = newTemp(Ity_I64);
1900 IRTemp d2 = newTemp(Ity_I64);
1901
1902 assign(d2, mkU64(((ULong)(Long)(Char)dh2 << 12) | ((ULong)dl2)));
1903 assign(op2addr, binop(Iop_Add64, binop(Iop_Add64, mkexpr(d2),
1904 b2 != 0 ? get_gpr_dw0(b2) : mkU64(0)), x2 != 0 ? get_gpr_dw0(x2) :
1905 mkU64(0)));
1906
1907 mnm = irgen(r1, op2addr);
1908
sewardj7ee97522011-05-09 21:45:04 +00001909 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001910 s390_disasm(ENC3(MNM, GPR, SDXB), mnm, r1, dh2, dl2, x2, b2);
1911}
1912
1913static void
1914s390_format_RXY_FRRD(HChar *(*irgen)(UChar r1, IRTemp op2addr),
1915 UChar r1, UChar x2, UChar b2, UShort dl2, UChar dh2)
1916{
1917 HChar *mnm;
1918 IRTemp op2addr = newTemp(Ity_I64);
1919 IRTemp d2 = newTemp(Ity_I64);
1920
1921 assign(d2, mkU64(((ULong)(Long)(Char)dh2 << 12) | ((ULong)dl2)));
1922 assign(op2addr, binop(Iop_Add64, binop(Iop_Add64, mkexpr(d2),
1923 b2 != 0 ? get_gpr_dw0(b2) : mkU64(0)), x2 != 0 ? get_gpr_dw0(x2) :
1924 mkU64(0)));
1925
1926 mnm = irgen(r1, op2addr);
1927
sewardj7ee97522011-05-09 21:45:04 +00001928 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001929 s390_disasm(ENC3(MNM, FPR, SDXB), mnm, r1, dh2, dl2, x2, b2);
1930}
1931
1932static void
1933s390_format_RXY_URRD(HChar *(*irgen)(void),
1934 UChar r1, UChar x2, UChar b2, UShort dl2, UChar dh2)
1935{
1936 HChar *mnm;
1937 IRTemp op2addr = newTemp(Ity_I64);
1938 IRTemp d2 = newTemp(Ity_I64);
1939
1940 assign(d2, mkU64(((ULong)(Long)(Char)dh2 << 12) | ((ULong)dl2)));
1941 assign(op2addr, binop(Iop_Add64, binop(Iop_Add64, mkexpr(d2),
1942 b2 != 0 ? get_gpr_dw0(b2) : mkU64(0)), x2 != 0 ? get_gpr_dw0(x2) :
1943 mkU64(0)));
1944
1945 mnm = irgen();
1946
sewardj7ee97522011-05-09 21:45:04 +00001947 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001948 s390_disasm(ENC3(MNM, UINT, SDXB), mnm, r1, dh2, dl2, x2, b2);
1949}
1950
1951static void
1952s390_format_S_RD(HChar *(*irgen)(IRTemp op2addr),
1953 UChar b2, UShort d2)
1954{
1955 HChar *mnm;
1956 IRTemp op2addr = newTemp(Ity_I64);
1957
1958 assign(op2addr, binop(Iop_Add64, mkU64(d2), b2 != 0 ? get_gpr_dw0(b2) :
1959 mkU64(0)));
1960
1961 mnm = irgen(op2addr);
1962
sewardj7ee97522011-05-09 21:45:04 +00001963 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001964 s390_disasm(ENC2(MNM, UDXB), mnm, d2, 0, b2);
1965}
1966
1967static void
1968s390_format_SI_URD(HChar *(*irgen)(UChar i2, IRTemp op1addr),
1969 UChar i2, UChar b1, UShort d1)
1970{
1971 HChar *mnm;
1972 IRTemp op1addr = newTemp(Ity_I64);
1973
1974 assign(op1addr, binop(Iop_Add64, mkU64(d1), b1 != 0 ? get_gpr_dw0(b1) :
1975 mkU64(0)));
1976
1977 mnm = irgen(i2, op1addr);
1978
sewardj7ee97522011-05-09 21:45:04 +00001979 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001980 s390_disasm(ENC3(MNM, UDXB, UINT), mnm, d1, 0, b1, i2);
1981}
1982
1983static void
1984s390_format_SIY_URD(HChar *(*irgen)(UChar i2, IRTemp op1addr),
1985 UChar i2, UChar b1, UShort dl1, UChar dh1)
1986{
1987 HChar *mnm;
1988 IRTemp op1addr = newTemp(Ity_I64);
1989 IRTemp d1 = newTemp(Ity_I64);
1990
1991 assign(d1, mkU64(((ULong)(Long)(Char)dh1 << 12) | ((ULong)dl1)));
1992 assign(op1addr, binop(Iop_Add64, mkexpr(d1), b1 != 0 ? get_gpr_dw0(b1) :
1993 mkU64(0)));
1994
1995 mnm = irgen(i2, op1addr);
1996
sewardj7ee97522011-05-09 21:45:04 +00001997 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001998 s390_disasm(ENC3(MNM, SDXB, UINT), mnm, dh1, dl1, 0, b1, i2);
1999}
2000
2001static void
2002s390_format_SIY_IRD(HChar *(*irgen)(UChar i2, IRTemp op1addr),
2003 UChar i2, UChar b1, UShort dl1, UChar dh1)
2004{
2005 HChar *mnm;
2006 IRTemp op1addr = newTemp(Ity_I64);
2007 IRTemp d1 = newTemp(Ity_I64);
2008
2009 assign(d1, mkU64(((ULong)(Long)(Char)dh1 << 12) | ((ULong)dl1)));
2010 assign(op1addr, binop(Iop_Add64, mkexpr(d1), b1 != 0 ? get_gpr_dw0(b1) :
2011 mkU64(0)));
2012
2013 mnm = irgen(i2, op1addr);
2014
sewardj7ee97522011-05-09 21:45:04 +00002015 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00002016 s390_disasm(ENC3(MNM, SDXB, INT), mnm, dh1, dl1, 0, b1, (Int)(Char)i2);
2017}
2018
2019static void
2020s390_format_SS_L0RDRD(HChar *(*irgen)(UChar, IRTemp, IRTemp),
2021 UChar l, UChar b1, UShort d1, UChar b2, UShort d2)
2022{
2023 HChar *mnm;
2024 IRTemp op1addr = newTemp(Ity_I64);
2025 IRTemp op2addr = newTemp(Ity_I64);
2026
2027 assign(op1addr, binop(Iop_Add64, mkU64(d1), b1 != 0 ? get_gpr_dw0(b1) :
2028 mkU64(0)));
2029 assign(op2addr, binop(Iop_Add64, mkU64(d2), b2 != 0 ? get_gpr_dw0(b2) :
2030 mkU64(0)));
2031
2032 mnm = irgen(l, op1addr, op2addr);
2033
sewardj7ee97522011-05-09 21:45:04 +00002034 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00002035 s390_disasm(ENC3(MNM, UDLB, UDXB), mnm, d1, l, b1, d2, 0, b2);
2036}
2037
2038static void
2039s390_format_SIL_RDI(HChar *(*irgen)(UShort i2, IRTemp op1addr),
2040 UChar b1, UShort d1, UShort i2)
2041{
2042 HChar *mnm;
2043 IRTemp op1addr = newTemp(Ity_I64);
2044
2045 assign(op1addr, binop(Iop_Add64, mkU64(d1), b1 != 0 ? get_gpr_dw0(b1) :
2046 mkU64(0)));
2047
2048 mnm = irgen(i2, op1addr);
2049
sewardj7ee97522011-05-09 21:45:04 +00002050 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00002051 s390_disasm(ENC3(MNM, UDXB, INT), mnm, d1, 0, b1, (Int)(Short)i2);
2052}
2053
2054static void
2055s390_format_SIL_RDU(HChar *(*irgen)(UShort i2, IRTemp op1addr),
2056 UChar b1, UShort d1, UShort i2)
2057{
2058 HChar *mnm;
2059 IRTemp op1addr = newTemp(Ity_I64);
2060
2061 assign(op1addr, binop(Iop_Add64, mkU64(d1), b1 != 0 ? get_gpr_dw0(b1) :
2062 mkU64(0)));
2063
2064 mnm = irgen(i2, op1addr);
2065
sewardj7ee97522011-05-09 21:45:04 +00002066 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00002067 s390_disasm(ENC3(MNM, UDXB, UINT), mnm, d1, 0, b1, i2);
2068}
2069
2070
2071
2072/*------------------------------------------------------------*/
2073/*--- Build IR for opcodes ---*/
2074/*------------------------------------------------------------*/
2075
2076static HChar *
florian30e89012011-08-08 18:22:58 +00002077s390_irgen_00(UChar r1 __attribute__((unused)),
2078 UChar r2 __attribute__((unused)))
2079{
2080 IRDirty *d;
2081
2082 d = unsafeIRDirty_0_N (0, "s390x_dirtyhelper_00", &s390x_dirtyhelper_00,
2083 mkIRExprVec_0());
2084 d->needsBBP = 1; /* Need to pass pointer to guest state to helper */
2085
2086 d->fxState[0].fx = Ifx_Modify; /* read then write */
2087 d->fxState[0].offset = S390X_GUEST_OFFSET(guest_IA);
2088 d->fxState[0].size = sizeof(ULong);
2089 d->nFxState = 1;
2090
2091 stmt(IRStmt_Dirty(d));
2092
2093 return "00";
2094}
2095
2096static HChar *
sewardj2019a972011-03-07 16:04:07 +00002097s390_irgen_AR(UChar r1, UChar r2)
2098{
2099 IRTemp op1 = newTemp(Ity_I32);
2100 IRTemp op2 = newTemp(Ity_I32);
2101 IRTemp result = newTemp(Ity_I32);
2102
2103 assign(op1, get_gpr_w1(r1));
2104 assign(op2, get_gpr_w1(r2));
2105 assign(result, binop(Iop_Add32, mkexpr(op1), mkexpr(op2)));
2106 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_32, op1, op2);
2107 put_gpr_w1(r1, mkexpr(result));
2108
2109 return "ar";
2110}
2111
2112static HChar *
2113s390_irgen_AGR(UChar r1, UChar r2)
2114{
2115 IRTemp op1 = newTemp(Ity_I64);
2116 IRTemp op2 = newTemp(Ity_I64);
2117 IRTemp result = newTemp(Ity_I64);
2118
2119 assign(op1, get_gpr_dw0(r1));
2120 assign(op2, get_gpr_dw0(r2));
2121 assign(result, binop(Iop_Add64, mkexpr(op1), mkexpr(op2)));
2122 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_64, op1, op2);
2123 put_gpr_dw0(r1, mkexpr(result));
2124
2125 return "agr";
2126}
2127
2128static HChar *
2129s390_irgen_AGFR(UChar r1, UChar r2)
2130{
2131 IRTemp op1 = newTemp(Ity_I64);
2132 IRTemp op2 = newTemp(Ity_I64);
2133 IRTemp result = newTemp(Ity_I64);
2134
2135 assign(op1, get_gpr_dw0(r1));
2136 assign(op2, unop(Iop_32Sto64, get_gpr_w1(r2)));
2137 assign(result, binop(Iop_Add64, mkexpr(op1), mkexpr(op2)));
2138 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_64, op1, op2);
2139 put_gpr_dw0(r1, mkexpr(result));
2140
2141 return "agfr";
2142}
2143
2144static HChar *
2145s390_irgen_ARK(UChar r3, UChar r1, UChar r2)
2146{
2147 IRTemp op2 = newTemp(Ity_I32);
2148 IRTemp op3 = newTemp(Ity_I32);
2149 IRTemp result = newTemp(Ity_I32);
2150
2151 assign(op2, get_gpr_w1(r2));
2152 assign(op3, get_gpr_w1(r3));
2153 assign(result, binop(Iop_Add32, mkexpr(op2), mkexpr(op3)));
2154 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_32, op2, op3);
2155 put_gpr_w1(r1, mkexpr(result));
2156
2157 return "ark";
2158}
2159
2160static HChar *
2161s390_irgen_AGRK(UChar r3, UChar r1, UChar r2)
2162{
2163 IRTemp op2 = newTemp(Ity_I64);
2164 IRTemp op3 = newTemp(Ity_I64);
2165 IRTemp result = newTemp(Ity_I64);
2166
2167 assign(op2, get_gpr_dw0(r2));
2168 assign(op3, get_gpr_dw0(r3));
2169 assign(result, binop(Iop_Add64, mkexpr(op2), mkexpr(op3)));
2170 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_64, op2, op3);
2171 put_gpr_dw0(r1, mkexpr(result));
2172
2173 return "agrk";
2174}
2175
2176static HChar *
2177s390_irgen_A(UChar r1, IRTemp op2addr)
2178{
2179 IRTemp op1 = newTemp(Ity_I32);
2180 IRTemp op2 = newTemp(Ity_I32);
2181 IRTemp result = newTemp(Ity_I32);
2182
2183 assign(op1, get_gpr_w1(r1));
2184 assign(op2, load(Ity_I32, mkexpr(op2addr)));
2185 assign(result, binop(Iop_Add32, mkexpr(op1), mkexpr(op2)));
2186 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_32, op1, op2);
2187 put_gpr_w1(r1, mkexpr(result));
2188
2189 return "a";
2190}
2191
2192static HChar *
2193s390_irgen_AY(UChar r1, IRTemp op2addr)
2194{
2195 IRTemp op1 = newTemp(Ity_I32);
2196 IRTemp op2 = newTemp(Ity_I32);
2197 IRTemp result = newTemp(Ity_I32);
2198
2199 assign(op1, get_gpr_w1(r1));
2200 assign(op2, load(Ity_I32, mkexpr(op2addr)));
2201 assign(result, binop(Iop_Add32, mkexpr(op1), mkexpr(op2)));
2202 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_32, op1, op2);
2203 put_gpr_w1(r1, mkexpr(result));
2204
2205 return "ay";
2206}
2207
2208static HChar *
2209s390_irgen_AG(UChar r1, IRTemp op2addr)
2210{
2211 IRTemp op1 = newTemp(Ity_I64);
2212 IRTemp op2 = newTemp(Ity_I64);
2213 IRTemp result = newTemp(Ity_I64);
2214
2215 assign(op1, get_gpr_dw0(r1));
2216 assign(op2, load(Ity_I64, mkexpr(op2addr)));
2217 assign(result, binop(Iop_Add64, mkexpr(op1), mkexpr(op2)));
2218 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_64, op1, op2);
2219 put_gpr_dw0(r1, mkexpr(result));
2220
2221 return "ag";
2222}
2223
2224static HChar *
2225s390_irgen_AGF(UChar r1, IRTemp op2addr)
2226{
2227 IRTemp op1 = newTemp(Ity_I64);
2228 IRTemp op2 = newTemp(Ity_I64);
2229 IRTemp result = newTemp(Ity_I64);
2230
2231 assign(op1, get_gpr_dw0(r1));
2232 assign(op2, unop(Iop_32Sto64, load(Ity_I32, mkexpr(op2addr))));
2233 assign(result, binop(Iop_Add64, mkexpr(op1), mkexpr(op2)));
2234 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_64, op1, op2);
2235 put_gpr_dw0(r1, mkexpr(result));
2236
2237 return "agf";
2238}
2239
2240static HChar *
2241s390_irgen_AFI(UChar r1, UInt i2)
2242{
2243 IRTemp op1 = newTemp(Ity_I32);
2244 Int op2;
2245 IRTemp result = newTemp(Ity_I32);
2246
2247 assign(op1, get_gpr_w1(r1));
2248 op2 = (Int)i2;
2249 assign(result, binop(Iop_Add32, mkexpr(op1), mkU32((UInt)op2)));
2250 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_32, op1, mktemp(Ity_I32,
2251 mkU32((UInt)op2)));
2252 put_gpr_w1(r1, mkexpr(result));
2253
2254 return "afi";
2255}
2256
2257static HChar *
2258s390_irgen_AGFI(UChar r1, UInt i2)
2259{
2260 IRTemp op1 = newTemp(Ity_I64);
2261 Long op2;
2262 IRTemp result = newTemp(Ity_I64);
2263
2264 assign(op1, get_gpr_dw0(r1));
2265 op2 = (Long)(Int)i2;
2266 assign(result, binop(Iop_Add64, mkexpr(op1), mkU64((ULong)op2)));
2267 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_64, op1, mktemp(Ity_I64,
2268 mkU64((ULong)op2)));
2269 put_gpr_dw0(r1, mkexpr(result));
2270
2271 return "agfi";
2272}
2273
2274static HChar *
2275s390_irgen_AHIK(UChar r1, UChar r3, UShort i2)
2276{
2277 Int op2;
2278 IRTemp op3 = newTemp(Ity_I32);
2279 IRTemp result = newTemp(Ity_I32);
2280
2281 op2 = (Int)(Short)i2;
2282 assign(op3, get_gpr_w1(r3));
2283 assign(result, binop(Iop_Add32, mkU32((UInt)op2), mkexpr(op3)));
2284 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_32, mktemp(Ity_I32, mkU32((UInt)
2285 op2)), op3);
2286 put_gpr_w1(r1, mkexpr(result));
2287
2288 return "ahik";
2289}
2290
2291static HChar *
2292s390_irgen_AGHIK(UChar r1, UChar r3, UShort i2)
2293{
2294 Long op2;
2295 IRTemp op3 = newTemp(Ity_I64);
2296 IRTemp result = newTemp(Ity_I64);
2297
2298 op2 = (Long)(Short)i2;
2299 assign(op3, get_gpr_dw0(r3));
2300 assign(result, binop(Iop_Add64, mkU64((ULong)op2), mkexpr(op3)));
2301 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_64, mktemp(Ity_I64, mkU64((ULong)
2302 op2)), op3);
2303 put_gpr_dw0(r1, mkexpr(result));
2304
2305 return "aghik";
2306}
2307
2308static HChar *
2309s390_irgen_ASI(UChar i2, IRTemp op1addr)
2310{
2311 IRTemp op1 = newTemp(Ity_I32);
2312 Int op2;
2313 IRTemp result = newTemp(Ity_I32);
2314
2315 assign(op1, load(Ity_I32, mkexpr(op1addr)));
2316 op2 = (Int)(Char)i2;
2317 assign(result, binop(Iop_Add32, mkexpr(op1), mkU32((UInt)op2)));
2318 store(mkexpr(op1addr), mkexpr(result));
2319 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_32, op1, mktemp(Ity_I32,
2320 mkU32((UInt)op2)));
2321
2322 return "asi";
2323}
2324
2325static HChar *
2326s390_irgen_AGSI(UChar i2, IRTemp op1addr)
2327{
2328 IRTemp op1 = newTemp(Ity_I64);
2329 Long op2;
2330 IRTemp result = newTemp(Ity_I64);
2331
2332 assign(op1, load(Ity_I64, mkexpr(op1addr)));
2333 op2 = (Long)(Char)i2;
2334 assign(result, binop(Iop_Add64, mkexpr(op1), mkU64((ULong)op2)));
2335 store(mkexpr(op1addr), mkexpr(result));
2336 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_64, op1, mktemp(Ity_I64,
2337 mkU64((ULong)op2)));
2338
2339 return "agsi";
2340}
2341
2342static HChar *
2343s390_irgen_AH(UChar r1, IRTemp op2addr)
2344{
2345 IRTemp op1 = newTemp(Ity_I32);
2346 IRTemp op2 = newTemp(Ity_I32);
2347 IRTemp result = newTemp(Ity_I32);
2348
2349 assign(op1, get_gpr_w1(r1));
2350 assign(op2, unop(Iop_16Sto32, load(Ity_I16, mkexpr(op2addr))));
2351 assign(result, binop(Iop_Add32, mkexpr(op1), mkexpr(op2)));
2352 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_32, op1, op2);
2353 put_gpr_w1(r1, mkexpr(result));
2354
2355 return "ah";
2356}
2357
2358static HChar *
2359s390_irgen_AHY(UChar r1, IRTemp op2addr)
2360{
2361 IRTemp op1 = newTemp(Ity_I32);
2362 IRTemp op2 = newTemp(Ity_I32);
2363 IRTemp result = newTemp(Ity_I32);
2364
2365 assign(op1, get_gpr_w1(r1));
2366 assign(op2, unop(Iop_16Sto32, load(Ity_I16, mkexpr(op2addr))));
2367 assign(result, binop(Iop_Add32, mkexpr(op1), mkexpr(op2)));
2368 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_32, op1, op2);
2369 put_gpr_w1(r1, mkexpr(result));
2370
2371 return "ahy";
2372}
2373
2374static HChar *
2375s390_irgen_AHI(UChar r1, UShort i2)
2376{
2377 IRTemp op1 = newTemp(Ity_I32);
2378 Int op2;
2379 IRTemp result = newTemp(Ity_I32);
2380
2381 assign(op1, get_gpr_w1(r1));
2382 op2 = (Int)(Short)i2;
2383 assign(result, binop(Iop_Add32, mkexpr(op1), mkU32((UInt)op2)));
2384 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_32, op1, mktemp(Ity_I32,
2385 mkU32((UInt)op2)));
2386 put_gpr_w1(r1, mkexpr(result));
2387
2388 return "ahi";
2389}
2390
2391static HChar *
2392s390_irgen_AGHI(UChar r1, UShort i2)
2393{
2394 IRTemp op1 = newTemp(Ity_I64);
2395 Long op2;
2396 IRTemp result = newTemp(Ity_I64);
2397
2398 assign(op1, get_gpr_dw0(r1));
2399 op2 = (Long)(Short)i2;
2400 assign(result, binop(Iop_Add64, mkexpr(op1), mkU64((ULong)op2)));
2401 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_64, op1, mktemp(Ity_I64,
2402 mkU64((ULong)op2)));
2403 put_gpr_dw0(r1, mkexpr(result));
2404
2405 return "aghi";
2406}
2407
2408static HChar *
2409s390_irgen_AHHHR(UChar r3, UChar r1, UChar r2)
2410{
2411 IRTemp op2 = newTemp(Ity_I32);
2412 IRTemp op3 = newTemp(Ity_I32);
2413 IRTemp result = newTemp(Ity_I32);
2414
2415 assign(op2, get_gpr_w0(r2));
2416 assign(op3, get_gpr_w0(r3));
2417 assign(result, binop(Iop_Add32, mkexpr(op2), mkexpr(op3)));
2418 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_32, op2, op3);
2419 put_gpr_w0(r1, mkexpr(result));
2420
2421 return "ahhhr";
2422}
2423
2424static HChar *
2425s390_irgen_AHHLR(UChar r3, UChar r1, UChar r2)
2426{
2427 IRTemp op2 = newTemp(Ity_I32);
2428 IRTemp op3 = newTemp(Ity_I32);
2429 IRTemp result = newTemp(Ity_I32);
2430
2431 assign(op2, get_gpr_w0(r2));
2432 assign(op3, get_gpr_w1(r3));
2433 assign(result, binop(Iop_Add32, mkexpr(op2), mkexpr(op3)));
2434 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_32, op2, op3);
2435 put_gpr_w0(r1, mkexpr(result));
2436
2437 return "ahhlr";
2438}
2439
2440static HChar *
2441s390_irgen_AIH(UChar r1, UInt i2)
2442{
2443 IRTemp op1 = newTemp(Ity_I32);
2444 Int op2;
2445 IRTemp result = newTemp(Ity_I32);
2446
2447 assign(op1, get_gpr_w0(r1));
2448 op2 = (Int)i2;
2449 assign(result, binop(Iop_Add32, mkexpr(op1), mkU32((UInt)op2)));
2450 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_32, op1, mktemp(Ity_I32,
2451 mkU32((UInt)op2)));
2452 put_gpr_w0(r1, mkexpr(result));
2453
2454 return "aih";
2455}
2456
2457static HChar *
2458s390_irgen_ALR(UChar r1, UChar r2)
2459{
2460 IRTemp op1 = newTemp(Ity_I32);
2461 IRTemp op2 = newTemp(Ity_I32);
2462 IRTemp result = newTemp(Ity_I32);
2463
2464 assign(op1, get_gpr_w1(r1));
2465 assign(op2, get_gpr_w1(r2));
2466 assign(result, binop(Iop_Add32, mkexpr(op1), mkexpr(op2)));
2467 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_32, op1, op2);
2468 put_gpr_w1(r1, mkexpr(result));
2469
2470 return "alr";
2471}
2472
2473static HChar *
2474s390_irgen_ALGR(UChar r1, UChar r2)
2475{
2476 IRTemp op1 = newTemp(Ity_I64);
2477 IRTemp op2 = newTemp(Ity_I64);
2478 IRTemp result = newTemp(Ity_I64);
2479
2480 assign(op1, get_gpr_dw0(r1));
2481 assign(op2, get_gpr_dw0(r2));
2482 assign(result, binop(Iop_Add64, mkexpr(op1), mkexpr(op2)));
2483 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_64, op1, op2);
2484 put_gpr_dw0(r1, mkexpr(result));
2485
2486 return "algr";
2487}
2488
2489static HChar *
2490s390_irgen_ALGFR(UChar r1, UChar r2)
2491{
2492 IRTemp op1 = newTemp(Ity_I64);
2493 IRTemp op2 = newTemp(Ity_I64);
2494 IRTemp result = newTemp(Ity_I64);
2495
2496 assign(op1, get_gpr_dw0(r1));
2497 assign(op2, unop(Iop_32Uto64, get_gpr_w1(r2)));
2498 assign(result, binop(Iop_Add64, mkexpr(op1), mkexpr(op2)));
2499 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_64, op1, op2);
2500 put_gpr_dw0(r1, mkexpr(result));
2501
2502 return "algfr";
2503}
2504
2505static HChar *
2506s390_irgen_ALRK(UChar r3, UChar r1, UChar r2)
2507{
2508 IRTemp op2 = newTemp(Ity_I32);
2509 IRTemp op3 = newTemp(Ity_I32);
2510 IRTemp result = newTemp(Ity_I32);
2511
2512 assign(op2, get_gpr_w1(r2));
2513 assign(op3, get_gpr_w1(r3));
2514 assign(result, binop(Iop_Add32, mkexpr(op2), mkexpr(op3)));
2515 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_32, op2, op3);
2516 put_gpr_w1(r1, mkexpr(result));
2517
2518 return "alrk";
2519}
2520
2521static HChar *
2522s390_irgen_ALGRK(UChar r3, UChar r1, UChar r2)
2523{
2524 IRTemp op2 = newTemp(Ity_I64);
2525 IRTemp op3 = newTemp(Ity_I64);
2526 IRTemp result = newTemp(Ity_I64);
2527
2528 assign(op2, get_gpr_dw0(r2));
2529 assign(op3, get_gpr_dw0(r3));
2530 assign(result, binop(Iop_Add64, mkexpr(op2), mkexpr(op3)));
2531 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_64, op2, op3);
2532 put_gpr_dw0(r1, mkexpr(result));
2533
2534 return "algrk";
2535}
2536
2537static HChar *
2538s390_irgen_AL(UChar r1, IRTemp op2addr)
2539{
2540 IRTemp op1 = newTemp(Ity_I32);
2541 IRTemp op2 = newTemp(Ity_I32);
2542 IRTemp result = newTemp(Ity_I32);
2543
2544 assign(op1, get_gpr_w1(r1));
2545 assign(op2, load(Ity_I32, mkexpr(op2addr)));
2546 assign(result, binop(Iop_Add32, mkexpr(op1), mkexpr(op2)));
2547 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_32, op1, op2);
2548 put_gpr_w1(r1, mkexpr(result));
2549
2550 return "al";
2551}
2552
2553static HChar *
2554s390_irgen_ALY(UChar r1, IRTemp op2addr)
2555{
2556 IRTemp op1 = newTemp(Ity_I32);
2557 IRTemp op2 = newTemp(Ity_I32);
2558 IRTemp result = newTemp(Ity_I32);
2559
2560 assign(op1, get_gpr_w1(r1));
2561 assign(op2, load(Ity_I32, mkexpr(op2addr)));
2562 assign(result, binop(Iop_Add32, mkexpr(op1), mkexpr(op2)));
2563 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_32, op1, op2);
2564 put_gpr_w1(r1, mkexpr(result));
2565
2566 return "aly";
2567}
2568
2569static HChar *
2570s390_irgen_ALG(UChar r1, IRTemp op2addr)
2571{
2572 IRTemp op1 = newTemp(Ity_I64);
2573 IRTemp op2 = newTemp(Ity_I64);
2574 IRTemp result = newTemp(Ity_I64);
2575
2576 assign(op1, get_gpr_dw0(r1));
2577 assign(op2, load(Ity_I64, mkexpr(op2addr)));
2578 assign(result, binop(Iop_Add64, mkexpr(op1), mkexpr(op2)));
2579 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_64, op1, op2);
2580 put_gpr_dw0(r1, mkexpr(result));
2581
2582 return "alg";
2583}
2584
2585static HChar *
2586s390_irgen_ALGF(UChar r1, IRTemp op2addr)
2587{
2588 IRTemp op1 = newTemp(Ity_I64);
2589 IRTemp op2 = newTemp(Ity_I64);
2590 IRTemp result = newTemp(Ity_I64);
2591
2592 assign(op1, get_gpr_dw0(r1));
2593 assign(op2, unop(Iop_32Uto64, load(Ity_I32, mkexpr(op2addr))));
2594 assign(result, binop(Iop_Add64, mkexpr(op1), mkexpr(op2)));
2595 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_64, op1, op2);
2596 put_gpr_dw0(r1, mkexpr(result));
2597
2598 return "algf";
2599}
2600
2601static HChar *
2602s390_irgen_ALFI(UChar r1, UInt i2)
2603{
2604 IRTemp op1 = newTemp(Ity_I32);
2605 UInt op2;
2606 IRTemp result = newTemp(Ity_I32);
2607
2608 assign(op1, get_gpr_w1(r1));
2609 op2 = i2;
2610 assign(result, binop(Iop_Add32, mkexpr(op1), mkU32(op2)));
2611 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_32, op1, mktemp(Ity_I32,
2612 mkU32(op2)));
2613 put_gpr_w1(r1, mkexpr(result));
2614
2615 return "alfi";
2616}
2617
2618static HChar *
2619s390_irgen_ALGFI(UChar r1, UInt i2)
2620{
2621 IRTemp op1 = newTemp(Ity_I64);
2622 ULong op2;
2623 IRTemp result = newTemp(Ity_I64);
2624
2625 assign(op1, get_gpr_dw0(r1));
2626 op2 = (ULong)i2;
2627 assign(result, binop(Iop_Add64, mkexpr(op1), mkU64(op2)));
2628 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_64, op1, mktemp(Ity_I64,
2629 mkU64(op2)));
2630 put_gpr_dw0(r1, mkexpr(result));
2631
2632 return "algfi";
2633}
2634
2635static HChar *
2636s390_irgen_ALHHHR(UChar r3, UChar r1, UChar r2)
2637{
2638 IRTemp op2 = newTemp(Ity_I32);
2639 IRTemp op3 = newTemp(Ity_I32);
2640 IRTemp result = newTemp(Ity_I32);
2641
2642 assign(op2, get_gpr_w0(r2));
2643 assign(op3, get_gpr_w0(r3));
2644 assign(result, binop(Iop_Add32, mkexpr(op2), mkexpr(op3)));
2645 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_32, op2, op3);
2646 put_gpr_w0(r1, mkexpr(result));
2647
2648 return "alhhhr";
2649}
2650
2651static HChar *
2652s390_irgen_ALHHLR(UChar r3, UChar r1, UChar r2)
2653{
2654 IRTemp op2 = newTemp(Ity_I32);
2655 IRTemp op3 = newTemp(Ity_I32);
2656 IRTemp result = newTemp(Ity_I32);
2657
2658 assign(op2, get_gpr_w0(r2));
2659 assign(op3, get_gpr_w1(r3));
2660 assign(result, binop(Iop_Add32, mkexpr(op2), mkexpr(op3)));
2661 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_32, op2, op3);
2662 put_gpr_w0(r1, mkexpr(result));
2663
2664 return "alhhlr";
2665}
2666
2667static HChar *
2668s390_irgen_ALCR(UChar r1, UChar r2)
2669{
2670 IRTemp op1 = newTemp(Ity_I32);
2671 IRTemp op2 = newTemp(Ity_I32);
2672 IRTemp result = newTemp(Ity_I32);
2673 IRTemp carry_in = newTemp(Ity_I32);
2674
2675 assign(op1, get_gpr_w1(r1));
2676 assign(op2, get_gpr_w1(r2));
2677 assign(carry_in, binop(Iop_Shr32, s390_call_calculate_cc(), mkU8(1)));
2678 assign(result, binop(Iop_Add32, binop(Iop_Add32, mkexpr(op1), mkexpr(op2)),
2679 mkexpr(carry_in)));
2680 s390_cc_thunk_putZZZ(S390_CC_OP_UNSIGNED_ADDC_32, op1, op2, carry_in);
2681 put_gpr_w1(r1, mkexpr(result));
2682
2683 return "alcr";
2684}
2685
2686static HChar *
2687s390_irgen_ALCGR(UChar r1, UChar r2)
2688{
2689 IRTemp op1 = newTemp(Ity_I64);
2690 IRTemp op2 = newTemp(Ity_I64);
2691 IRTemp result = newTemp(Ity_I64);
2692 IRTemp carry_in = newTemp(Ity_I64);
2693
2694 assign(op1, get_gpr_dw0(r1));
2695 assign(op2, get_gpr_dw0(r2));
2696 assign(carry_in, unop(Iop_32Uto64, binop(Iop_Shr32, s390_call_calculate_cc(),
2697 mkU8(1))));
2698 assign(result, binop(Iop_Add64, binop(Iop_Add64, mkexpr(op1), mkexpr(op2)),
2699 mkexpr(carry_in)));
2700 s390_cc_thunk_putZZZ(S390_CC_OP_UNSIGNED_ADDC_64, op1, op2, carry_in);
2701 put_gpr_dw0(r1, mkexpr(result));
2702
2703 return "alcgr";
2704}
2705
2706static HChar *
2707s390_irgen_ALC(UChar r1, IRTemp op2addr)
2708{
2709 IRTemp op1 = newTemp(Ity_I32);
2710 IRTemp op2 = newTemp(Ity_I32);
2711 IRTemp result = newTemp(Ity_I32);
2712 IRTemp carry_in = newTemp(Ity_I32);
2713
2714 assign(op1, get_gpr_w1(r1));
2715 assign(op2, load(Ity_I32, mkexpr(op2addr)));
2716 assign(carry_in, binop(Iop_Shr32, s390_call_calculate_cc(), mkU8(1)));
2717 assign(result, binop(Iop_Add32, binop(Iop_Add32, mkexpr(op1), mkexpr(op2)),
2718 mkexpr(carry_in)));
2719 s390_cc_thunk_putZZZ(S390_CC_OP_UNSIGNED_ADDC_32, op1, op2, carry_in);
2720 put_gpr_w1(r1, mkexpr(result));
2721
2722 return "alc";
2723}
2724
2725static HChar *
2726s390_irgen_ALCG(UChar r1, IRTemp op2addr)
2727{
2728 IRTemp op1 = newTemp(Ity_I64);
2729 IRTemp op2 = newTemp(Ity_I64);
2730 IRTemp result = newTemp(Ity_I64);
2731 IRTemp carry_in = newTemp(Ity_I64);
2732
2733 assign(op1, get_gpr_dw0(r1));
2734 assign(op2, load(Ity_I64, mkexpr(op2addr)));
2735 assign(carry_in, unop(Iop_32Uto64, binop(Iop_Shr32, s390_call_calculate_cc(),
2736 mkU8(1))));
2737 assign(result, binop(Iop_Add64, binop(Iop_Add64, mkexpr(op1), mkexpr(op2)),
2738 mkexpr(carry_in)));
2739 s390_cc_thunk_putZZZ(S390_CC_OP_UNSIGNED_ADDC_64, op1, op2, carry_in);
2740 put_gpr_dw0(r1, mkexpr(result));
2741
2742 return "alcg";
2743}
2744
2745static HChar *
2746s390_irgen_ALSI(UChar i2, IRTemp op1addr)
2747{
2748 IRTemp op1 = newTemp(Ity_I32);
2749 UInt op2;
2750 IRTemp result = newTemp(Ity_I32);
2751
2752 assign(op1, load(Ity_I32, mkexpr(op1addr)));
2753 op2 = (UInt)(Int)(Char)i2;
2754 assign(result, binop(Iop_Add32, mkexpr(op1), mkU32(op2)));
2755 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_32, op1, mktemp(Ity_I32,
2756 mkU32(op2)));
2757 store(mkexpr(op1addr), mkexpr(result));
2758
2759 return "alsi";
2760}
2761
2762static HChar *
2763s390_irgen_ALGSI(UChar i2, IRTemp op1addr)
2764{
2765 IRTemp op1 = newTemp(Ity_I64);
2766 ULong op2;
2767 IRTemp result = newTemp(Ity_I64);
2768
2769 assign(op1, load(Ity_I64, mkexpr(op1addr)));
2770 op2 = (ULong)(Long)(Char)i2;
2771 assign(result, binop(Iop_Add64, mkexpr(op1), mkU64(op2)));
2772 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_64, op1, mktemp(Ity_I64,
2773 mkU64(op2)));
2774 store(mkexpr(op1addr), mkexpr(result));
2775
2776 return "algsi";
2777}
2778
2779static HChar *
2780s390_irgen_ALHSIK(UChar r1, UChar r3, UShort i2)
2781{
2782 UInt op2;
2783 IRTemp op3 = newTemp(Ity_I32);
2784 IRTemp result = newTemp(Ity_I32);
2785
2786 op2 = (UInt)(Int)(Short)i2;
2787 assign(op3, get_gpr_w1(r3));
2788 assign(result, binop(Iop_Add32, mkU32(op2), mkexpr(op3)));
2789 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_32, mktemp(Ity_I32, mkU32(op2)),
2790 op3);
2791 put_gpr_w1(r1, mkexpr(result));
2792
2793 return "alhsik";
2794}
2795
2796static HChar *
2797s390_irgen_ALGHSIK(UChar r1, UChar r3, UShort i2)
2798{
2799 ULong op2;
2800 IRTemp op3 = newTemp(Ity_I64);
2801 IRTemp result = newTemp(Ity_I64);
2802
2803 op2 = (ULong)(Long)(Short)i2;
2804 assign(op3, get_gpr_dw0(r3));
2805 assign(result, binop(Iop_Add64, mkU64(op2), mkexpr(op3)));
2806 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_64, mktemp(Ity_I64, mkU64(op2)),
2807 op3);
2808 put_gpr_dw0(r1, mkexpr(result));
2809
2810 return "alghsik";
2811}
2812
2813static HChar *
2814s390_irgen_ALSIH(UChar r1, UInt i2)
2815{
2816 IRTemp op1 = newTemp(Ity_I32);
2817 UInt op2;
2818 IRTemp result = newTemp(Ity_I32);
2819
2820 assign(op1, get_gpr_w0(r1));
2821 op2 = i2;
2822 assign(result, binop(Iop_Add32, mkexpr(op1), mkU32(op2)));
2823 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_32, op1, mktemp(Ity_I32,
2824 mkU32(op2)));
2825 put_gpr_w0(r1, mkexpr(result));
2826
2827 return "alsih";
2828}
2829
2830static HChar *
2831s390_irgen_ALSIHN(UChar r1, UInt i2)
2832{
2833 IRTemp op1 = newTemp(Ity_I32);
2834 UInt op2;
2835 IRTemp result = newTemp(Ity_I32);
2836
2837 assign(op1, get_gpr_w0(r1));
2838 op2 = i2;
2839 assign(result, binop(Iop_Add32, mkexpr(op1), mkU32(op2)));
2840 put_gpr_w0(r1, mkexpr(result));
2841
2842 return "alsihn";
2843}
2844
2845static HChar *
2846s390_irgen_NR(UChar r1, UChar r2)
2847{
2848 IRTemp op1 = newTemp(Ity_I32);
2849 IRTemp op2 = newTemp(Ity_I32);
2850 IRTemp result = newTemp(Ity_I32);
2851
2852 assign(op1, get_gpr_w1(r1));
2853 assign(op2, get_gpr_w1(r2));
2854 assign(result, binop(Iop_And32, mkexpr(op1), mkexpr(op2)));
2855 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
2856 put_gpr_w1(r1, mkexpr(result));
2857
2858 return "nr";
2859}
2860
2861static HChar *
2862s390_irgen_NGR(UChar r1, UChar r2)
2863{
2864 IRTemp op1 = newTemp(Ity_I64);
2865 IRTemp op2 = newTemp(Ity_I64);
2866 IRTemp result = newTemp(Ity_I64);
2867
2868 assign(op1, get_gpr_dw0(r1));
2869 assign(op2, get_gpr_dw0(r2));
2870 assign(result, binop(Iop_And64, mkexpr(op1), mkexpr(op2)));
2871 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
2872 put_gpr_dw0(r1, mkexpr(result));
2873
2874 return "ngr";
2875}
2876
2877static HChar *
2878s390_irgen_NRK(UChar r3, UChar r1, UChar r2)
2879{
2880 IRTemp op2 = newTemp(Ity_I32);
2881 IRTemp op3 = newTemp(Ity_I32);
2882 IRTemp result = newTemp(Ity_I32);
2883
2884 assign(op2, get_gpr_w1(r2));
2885 assign(op3, get_gpr_w1(r3));
2886 assign(result, binop(Iop_And32, mkexpr(op2), mkexpr(op3)));
2887 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
2888 put_gpr_w1(r1, mkexpr(result));
2889
2890 return "nrk";
2891}
2892
2893static HChar *
2894s390_irgen_NGRK(UChar r3, UChar r1, UChar r2)
2895{
2896 IRTemp op2 = newTemp(Ity_I64);
2897 IRTemp op3 = newTemp(Ity_I64);
2898 IRTemp result = newTemp(Ity_I64);
2899
2900 assign(op2, get_gpr_dw0(r2));
2901 assign(op3, get_gpr_dw0(r3));
2902 assign(result, binop(Iop_And64, mkexpr(op2), mkexpr(op3)));
2903 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
2904 put_gpr_dw0(r1, mkexpr(result));
2905
2906 return "ngrk";
2907}
2908
2909static HChar *
2910s390_irgen_N(UChar r1, IRTemp op2addr)
2911{
2912 IRTemp op1 = newTemp(Ity_I32);
2913 IRTemp op2 = newTemp(Ity_I32);
2914 IRTemp result = newTemp(Ity_I32);
2915
2916 assign(op1, get_gpr_w1(r1));
2917 assign(op2, load(Ity_I32, mkexpr(op2addr)));
2918 assign(result, binop(Iop_And32, mkexpr(op1), mkexpr(op2)));
2919 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
2920 put_gpr_w1(r1, mkexpr(result));
2921
2922 return "n";
2923}
2924
2925static HChar *
2926s390_irgen_NY(UChar r1, IRTemp op2addr)
2927{
2928 IRTemp op1 = newTemp(Ity_I32);
2929 IRTemp op2 = newTemp(Ity_I32);
2930 IRTemp result = newTemp(Ity_I32);
2931
2932 assign(op1, get_gpr_w1(r1));
2933 assign(op2, load(Ity_I32, mkexpr(op2addr)));
2934 assign(result, binop(Iop_And32, mkexpr(op1), mkexpr(op2)));
2935 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
2936 put_gpr_w1(r1, mkexpr(result));
2937
2938 return "ny";
2939}
2940
2941static HChar *
2942s390_irgen_NG(UChar r1, IRTemp op2addr)
2943{
2944 IRTemp op1 = newTemp(Ity_I64);
2945 IRTemp op2 = newTemp(Ity_I64);
2946 IRTemp result = newTemp(Ity_I64);
2947
2948 assign(op1, get_gpr_dw0(r1));
2949 assign(op2, load(Ity_I64, mkexpr(op2addr)));
2950 assign(result, binop(Iop_And64, mkexpr(op1), mkexpr(op2)));
2951 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
2952 put_gpr_dw0(r1, mkexpr(result));
2953
2954 return "ng";
2955}
2956
2957static HChar *
2958s390_irgen_NI(UChar i2, IRTemp op1addr)
2959{
2960 IRTemp op1 = newTemp(Ity_I8);
2961 UChar op2;
2962 IRTemp result = newTemp(Ity_I8);
2963
2964 assign(op1, load(Ity_I8, mkexpr(op1addr)));
2965 op2 = i2;
2966 assign(result, binop(Iop_And8, mkexpr(op1), mkU8(op2)));
2967 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
2968 store(mkexpr(op1addr), mkexpr(result));
2969
2970 return "ni";
2971}
2972
2973static HChar *
2974s390_irgen_NIY(UChar i2, IRTemp op1addr)
2975{
2976 IRTemp op1 = newTemp(Ity_I8);
2977 UChar op2;
2978 IRTemp result = newTemp(Ity_I8);
2979
2980 assign(op1, load(Ity_I8, mkexpr(op1addr)));
2981 op2 = i2;
2982 assign(result, binop(Iop_And8, mkexpr(op1), mkU8(op2)));
2983 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
2984 store(mkexpr(op1addr), mkexpr(result));
2985
2986 return "niy";
2987}
2988
2989static HChar *
2990s390_irgen_NIHF(UChar r1, UInt i2)
2991{
2992 IRTemp op1 = newTemp(Ity_I32);
2993 UInt op2;
2994 IRTemp result = newTemp(Ity_I32);
2995
2996 assign(op1, get_gpr_w0(r1));
2997 op2 = i2;
2998 assign(result, binop(Iop_And32, mkexpr(op1), mkU32(op2)));
2999 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
3000 put_gpr_w0(r1, mkexpr(result));
3001
3002 return "nihf";
3003}
3004
3005static HChar *
3006s390_irgen_NIHH(UChar r1, UShort i2)
3007{
3008 IRTemp op1 = newTemp(Ity_I16);
3009 UShort op2;
3010 IRTemp result = newTemp(Ity_I16);
3011
3012 assign(op1, get_gpr_hw0(r1));
3013 op2 = i2;
3014 assign(result, binop(Iop_And16, mkexpr(op1), mkU16(op2)));
3015 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
3016 put_gpr_hw0(r1, mkexpr(result));
3017
3018 return "nihh";
3019}
3020
3021static HChar *
3022s390_irgen_NIHL(UChar r1, UShort i2)
3023{
3024 IRTemp op1 = newTemp(Ity_I16);
3025 UShort op2;
3026 IRTemp result = newTemp(Ity_I16);
3027
3028 assign(op1, get_gpr_hw1(r1));
3029 op2 = i2;
3030 assign(result, binop(Iop_And16, mkexpr(op1), mkU16(op2)));
3031 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
3032 put_gpr_hw1(r1, mkexpr(result));
3033
3034 return "nihl";
3035}
3036
3037static HChar *
3038s390_irgen_NILF(UChar r1, UInt i2)
3039{
3040 IRTemp op1 = newTemp(Ity_I32);
3041 UInt op2;
3042 IRTemp result = newTemp(Ity_I32);
3043
3044 assign(op1, get_gpr_w1(r1));
3045 op2 = i2;
3046 assign(result, binop(Iop_And32, mkexpr(op1), mkU32(op2)));
3047 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
3048 put_gpr_w1(r1, mkexpr(result));
3049
3050 return "nilf";
3051}
3052
3053static HChar *
3054s390_irgen_NILH(UChar r1, UShort i2)
3055{
3056 IRTemp op1 = newTemp(Ity_I16);
3057 UShort op2;
3058 IRTemp result = newTemp(Ity_I16);
3059
3060 assign(op1, get_gpr_hw2(r1));
3061 op2 = i2;
3062 assign(result, binop(Iop_And16, mkexpr(op1), mkU16(op2)));
3063 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
3064 put_gpr_hw2(r1, mkexpr(result));
3065
3066 return "nilh";
3067}
3068
3069static HChar *
3070s390_irgen_NILL(UChar r1, UShort i2)
3071{
3072 IRTemp op1 = newTemp(Ity_I16);
3073 UShort op2;
3074 IRTemp result = newTemp(Ity_I16);
3075
3076 assign(op1, get_gpr_hw3(r1));
3077 op2 = i2;
3078 assign(result, binop(Iop_And16, mkexpr(op1), mkU16(op2)));
3079 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
3080 put_gpr_hw3(r1, mkexpr(result));
3081
3082 return "nill";
3083}
3084
3085static HChar *
3086s390_irgen_BASR(UChar r1, UChar r2)
3087{
3088 IRTemp target = newTemp(Ity_I64);
3089
3090 if (r2 == 0) {
3091 put_gpr_dw0(r1, mkU64(guest_IA_curr_instr + 2ULL));
3092 } else {
3093 if (r1 != r2) {
3094 put_gpr_dw0(r1, mkU64(guest_IA_curr_instr + 2ULL));
3095 call_function(get_gpr_dw0(r2));
3096 } else {
3097 assign(target, get_gpr_dw0(r2));
3098 put_gpr_dw0(r1, mkU64(guest_IA_curr_instr + 2ULL));
3099 call_function(mkexpr(target));
3100 }
3101 }
3102
3103 return "basr";
3104}
3105
3106static HChar *
3107s390_irgen_BAS(UChar r1, IRTemp op2addr)
3108{
3109 IRTemp target = newTemp(Ity_I64);
3110
3111 put_gpr_dw0(r1, mkU64(guest_IA_curr_instr + 4ULL));
3112 assign(target, mkexpr(op2addr));
3113 call_function(mkexpr(target));
3114
3115 return "bas";
3116}
3117
3118static HChar *
3119s390_irgen_BCR(UChar r1, UChar r2)
3120{
3121 IRTemp cond = newTemp(Ity_I32);
3122
sewardja52e37e2011-04-28 18:48:06 +00003123 if (r2 == 0 && (r1 >= 14)) { /* serialization */
3124 stmt(IRStmt_MBE(Imbe_Fence));
3125 }
3126
sewardj2019a972011-03-07 16:04:07 +00003127 if ((r2 == 0) || (r1 == 0)) {
3128 } else {
3129 if (r1 == 15) {
3130 return_from_function(get_gpr_dw0(r2));
3131 } else {
3132 assign(cond, s390_call_calculate_cond(r1));
3133 if_not_condition_goto_computed(binop(Iop_CmpEQ32, mkexpr(cond),
3134 mkU32(0)), get_gpr_dw0(r2));
3135 }
3136 }
sewardj7ee97522011-05-09 21:45:04 +00003137 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00003138 s390_disasm(ENC2(XMNM, GPR), S390_XMNM_BCR, r1, r2);
3139
3140 return "bcr";
3141}
3142
3143static HChar *
3144s390_irgen_BC(UChar r1, UChar x2, UChar b2, UShort d2, IRTemp op2addr)
3145{
3146 IRTemp cond = newTemp(Ity_I32);
3147
3148 if (r1 == 0) {
3149 } else {
3150 if (r1 == 15) {
3151 always_goto(mkexpr(op2addr));
3152 } else {
3153 assign(cond, s390_call_calculate_cond(r1));
3154 if_not_condition_goto_computed(binop(Iop_CmpEQ32, mkexpr(cond),
3155 mkU32(0)), mkexpr(op2addr));
3156 }
3157 }
sewardj7ee97522011-05-09 21:45:04 +00003158 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00003159 s390_disasm(ENC2(XMNM, UDXB), S390_XMNM_BC, r1, d2, x2, b2);
3160
3161 return "bc";
3162}
3163
3164static HChar *
3165s390_irgen_BCTR(UChar r1, UChar r2)
3166{
3167 put_gpr_w1(r1, binop(Iop_Sub32, get_gpr_w1(r1), mkU32(1)));
3168 if (r2 != 0) {
3169 if_not_condition_goto_computed(binop(Iop_CmpEQ32, get_gpr_w1(r1), mkU32(0)
3170 ), get_gpr_dw0(r2));
3171 }
3172
3173 return "bctr";
3174}
3175
3176static HChar *
3177s390_irgen_BCTGR(UChar r1, UChar r2)
3178{
3179 put_gpr_dw0(r1, binop(Iop_Sub64, get_gpr_dw0(r1), mkU64(1)));
3180 if (r2 != 0) {
3181 if_not_condition_goto_computed(binop(Iop_CmpEQ64, get_gpr_dw0(r1),
3182 mkU64(0)), get_gpr_dw0(r2));
3183 }
3184
3185 return "bctgr";
3186}
3187
3188static HChar *
3189s390_irgen_BCT(UChar r1, IRTemp op2addr)
3190{
3191 put_gpr_w1(r1, binop(Iop_Sub32, get_gpr_w1(r1), mkU32(1)));
3192 if_not_condition_goto_computed(binop(Iop_CmpEQ32, get_gpr_w1(r1), mkU32(0)),
3193 mkexpr(op2addr));
3194
3195 return "bct";
3196}
3197
3198static HChar *
3199s390_irgen_BCTG(UChar r1, IRTemp op2addr)
3200{
3201 put_gpr_dw0(r1, binop(Iop_Sub64, get_gpr_dw0(r1), mkU64(1)));
3202 if_not_condition_goto_computed(binop(Iop_CmpEQ64, get_gpr_dw0(r1), mkU64(0)),
3203 mkexpr(op2addr));
3204
3205 return "bctg";
3206}
3207
3208static HChar *
3209s390_irgen_BXH(UChar r1, UChar r3, IRTemp op2addr)
3210{
3211 IRTemp value = newTemp(Ity_I32);
3212
3213 assign(value, get_gpr_w1(r3 | 1));
3214 put_gpr_w1(r1, binop(Iop_Add32, get_gpr_w1(r1), get_gpr_w1(r3)));
3215 if_not_condition_goto_computed(binop(Iop_CmpLE32S, get_gpr_w1(r1),
3216 mkexpr(value)), mkexpr(op2addr));
3217
3218 return "bxh";
3219}
3220
3221static HChar *
3222s390_irgen_BXHG(UChar r1, UChar r3, IRTemp op2addr)
3223{
3224 IRTemp value = newTemp(Ity_I64);
3225
3226 assign(value, get_gpr_dw0(r3 | 1));
3227 put_gpr_dw0(r1, binop(Iop_Add64, get_gpr_dw0(r1), get_gpr_dw0(r3)));
3228 if_not_condition_goto_computed(binop(Iop_CmpLE64S, get_gpr_dw0(r1),
3229 mkexpr(value)), mkexpr(op2addr));
3230
3231 return "bxhg";
3232}
3233
3234static HChar *
3235s390_irgen_BXLE(UChar r1, UChar r3, IRTemp op2addr)
3236{
3237 IRTemp value = newTemp(Ity_I32);
3238
3239 assign(value, get_gpr_w1(r3 | 1));
3240 put_gpr_w1(r1, binop(Iop_Add32, get_gpr_w1(r1), get_gpr_w1(r3)));
3241 if_not_condition_goto_computed(binop(Iop_CmpLT32S, mkexpr(value),
3242 get_gpr_w1(r1)), mkexpr(op2addr));
3243
3244 return "bxle";
3245}
3246
3247static HChar *
3248s390_irgen_BXLEG(UChar r1, UChar r3, IRTemp op2addr)
3249{
3250 IRTemp value = newTemp(Ity_I64);
3251
3252 assign(value, get_gpr_dw0(r3 | 1));
3253 put_gpr_dw0(r1, binop(Iop_Add64, get_gpr_dw0(r1), get_gpr_dw0(r3)));
3254 if_not_condition_goto_computed(binop(Iop_CmpLT64S, mkexpr(value),
3255 get_gpr_dw0(r1)), mkexpr(op2addr));
3256
3257 return "bxleg";
3258}
3259
3260static HChar *
3261s390_irgen_BRAS(UChar r1, UShort i2)
3262{
3263 put_gpr_dw0(r1, mkU64(guest_IA_curr_instr + 4ULL));
floriana64c2432011-07-16 02:11:50 +00003264 call_function_and_chase(guest_IA_curr_instr + ((ULong)(Long)(Short)i2 << 1));
sewardj2019a972011-03-07 16:04:07 +00003265
3266 return "bras";
3267}
3268
3269static HChar *
3270s390_irgen_BRASL(UChar r1, UInt i2)
3271{
3272 put_gpr_dw0(r1, mkU64(guest_IA_curr_instr + 6ULL));
floriana64c2432011-07-16 02:11:50 +00003273 call_function_and_chase(guest_IA_curr_instr + ((ULong)(Long)(Int)i2 << 1));
sewardj2019a972011-03-07 16:04:07 +00003274
3275 return "brasl";
3276}
3277
3278static HChar *
3279s390_irgen_BRC(UChar r1, UShort i2)
3280{
3281 IRTemp cond = newTemp(Ity_I32);
3282
3283 if (r1 == 0) {
3284 } else {
3285 if (r1 == 15) {
floriana64c2432011-07-16 02:11:50 +00003286 always_goto_and_chase(
3287 guest_IA_curr_instr + ((ULong)(Long)(Short)i2 << 1));
sewardj2019a972011-03-07 16:04:07 +00003288 } else {
3289 assign(cond, s390_call_calculate_cond(r1));
3290 if_condition_goto(binop(Iop_CmpNE32, mkexpr(cond), mkU32(0)),
3291 guest_IA_curr_instr + ((ULong)(Long)(Short)i2 << 1));
3292
3293 }
3294 }
sewardj7ee97522011-05-09 21:45:04 +00003295 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00003296 s390_disasm(ENC2(XMNM, PCREL), S390_XMNM_BRC, r1, (Int)(Short)i2);
3297
3298 return "brc";
3299}
3300
3301static HChar *
3302s390_irgen_BRCL(UChar r1, UInt i2)
3303{
3304 IRTemp cond = newTemp(Ity_I32);
3305
3306 if (r1 == 0) {
3307 } else {
3308 if (r1 == 15) {
floriana64c2432011-07-16 02:11:50 +00003309 always_goto_and_chase(guest_IA_curr_instr + ((ULong)(Long)(Int)i2 << 1));
sewardj2019a972011-03-07 16:04:07 +00003310 } else {
3311 assign(cond, s390_call_calculate_cond(r1));
3312 if_condition_goto(binop(Iop_CmpNE32, mkexpr(cond), mkU32(0)),
3313 guest_IA_curr_instr + ((ULong)(Long)(Int)i2 << 1));
3314 }
3315 }
sewardj7ee97522011-05-09 21:45:04 +00003316 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00003317 s390_disasm(ENC2(XMNM, PCREL), S390_XMNM_BRCL, r1, i2);
3318
3319 return "brcl";
3320}
3321
3322static HChar *
3323s390_irgen_BRCT(UChar r1, UShort i2)
3324{
3325 put_gpr_w1(r1, binop(Iop_Sub32, get_gpr_w1(r1), mkU32(1)));
3326 if_condition_goto(binop(Iop_CmpNE32, get_gpr_w1(r1), mkU32(0)),
3327 guest_IA_curr_instr + ((ULong)(Long)(Short)i2 << 1));
3328
3329 return "brct";
3330}
3331
3332static HChar *
3333s390_irgen_BRCTG(UChar r1, UShort i2)
3334{
3335 put_gpr_dw0(r1, binop(Iop_Sub64, get_gpr_dw0(r1), mkU64(1)));
3336 if_condition_goto(binop(Iop_CmpNE64, get_gpr_dw0(r1), mkU64(0)),
3337 guest_IA_curr_instr + ((ULong)(Long)(Short)i2 << 1));
3338
3339 return "brctg";
3340}
3341
3342static HChar *
3343s390_irgen_BRXH(UChar r1, UChar r3, UShort i2)
3344{
3345 IRTemp value = newTemp(Ity_I32);
3346
3347 assign(value, get_gpr_w1(r3 | 1));
3348 put_gpr_w1(r1, binop(Iop_Add32, get_gpr_w1(r1), get_gpr_w1(r3)));
3349 if_condition_goto(binop(Iop_CmpLT32S, mkexpr(value), get_gpr_w1(r1)),
3350 guest_IA_curr_instr + ((ULong)(Long)(Short)i2 << 1));
3351
3352 return "brxh";
3353}
3354
3355static HChar *
3356s390_irgen_BRXHG(UChar r1, UChar r3, UShort i2)
3357{
3358 IRTemp value = newTemp(Ity_I64);
3359
3360 assign(value, get_gpr_dw0(r3 | 1));
3361 put_gpr_dw0(r1, binop(Iop_Add64, get_gpr_dw0(r1), get_gpr_dw0(r3)));
3362 if_condition_goto(binop(Iop_CmpLT64S, mkexpr(value), get_gpr_dw0(r1)),
3363 guest_IA_curr_instr + ((ULong)(Long)(Short)i2 << 1));
3364
3365 return "brxhg";
3366}
3367
3368static HChar *
3369s390_irgen_BRXLE(UChar r1, UChar r3, UShort i2)
3370{
3371 IRTemp value = newTemp(Ity_I32);
3372
3373 assign(value, get_gpr_w1(r3 | 1));
3374 put_gpr_w1(r1, binop(Iop_Add32, get_gpr_w1(r1), get_gpr_w1(r3)));
3375 if_condition_goto(binop(Iop_CmpLE32S, get_gpr_w1(r1), mkexpr(value)),
3376 guest_IA_curr_instr + ((ULong)(Long)(Short)i2 << 1));
3377
3378 return "brxle";
3379}
3380
3381static HChar *
3382s390_irgen_BRXLG(UChar r1, UChar r3, UShort i2)
3383{
3384 IRTemp value = newTemp(Ity_I64);
3385
3386 assign(value, get_gpr_dw0(r3 | 1));
3387 put_gpr_dw0(r1, binop(Iop_Add64, get_gpr_dw0(r1), get_gpr_dw0(r3)));
3388 if_condition_goto(binop(Iop_CmpLE64S, get_gpr_dw0(r1), mkexpr(value)),
3389 guest_IA_curr_instr + ((ULong)(Long)(Short)i2 << 1));
3390
3391 return "brxlg";
3392}
3393
3394static HChar *
3395s390_irgen_CR(UChar r1, UChar r2)
3396{
3397 IRTemp op1 = newTemp(Ity_I32);
3398 IRTemp op2 = newTemp(Ity_I32);
3399
3400 assign(op1, get_gpr_w1(r1));
3401 assign(op2, get_gpr_w1(r2));
3402 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
3403
3404 return "cr";
3405}
3406
3407static HChar *
3408s390_irgen_CGR(UChar r1, UChar r2)
3409{
3410 IRTemp op1 = newTemp(Ity_I64);
3411 IRTemp op2 = newTemp(Ity_I64);
3412
3413 assign(op1, get_gpr_dw0(r1));
3414 assign(op2, get_gpr_dw0(r2));
3415 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
3416
3417 return "cgr";
3418}
3419
3420static HChar *
3421s390_irgen_CGFR(UChar r1, UChar r2)
3422{
3423 IRTemp op1 = newTemp(Ity_I64);
3424 IRTemp op2 = newTemp(Ity_I64);
3425
3426 assign(op1, get_gpr_dw0(r1));
3427 assign(op2, unop(Iop_32Sto64, get_gpr_w1(r2)));
3428 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
3429
3430 return "cgfr";
3431}
3432
3433static HChar *
3434s390_irgen_C(UChar r1, IRTemp op2addr)
3435{
3436 IRTemp op1 = newTemp(Ity_I32);
3437 IRTemp op2 = newTemp(Ity_I32);
3438
3439 assign(op1, get_gpr_w1(r1));
3440 assign(op2, load(Ity_I32, mkexpr(op2addr)));
3441 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
3442
3443 return "c";
3444}
3445
3446static HChar *
3447s390_irgen_CY(UChar r1, IRTemp op2addr)
3448{
3449 IRTemp op1 = newTemp(Ity_I32);
3450 IRTemp op2 = newTemp(Ity_I32);
3451
3452 assign(op1, get_gpr_w1(r1));
3453 assign(op2, load(Ity_I32, mkexpr(op2addr)));
3454 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
3455
3456 return "cy";
3457}
3458
3459static HChar *
3460s390_irgen_CG(UChar r1, IRTemp op2addr)
3461{
3462 IRTemp op1 = newTemp(Ity_I64);
3463 IRTemp op2 = newTemp(Ity_I64);
3464
3465 assign(op1, get_gpr_dw0(r1));
3466 assign(op2, load(Ity_I64, mkexpr(op2addr)));
3467 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
3468
3469 return "cg";
3470}
3471
3472static HChar *
3473s390_irgen_CGF(UChar r1, IRTemp op2addr)
3474{
3475 IRTemp op1 = newTemp(Ity_I64);
3476 IRTemp op2 = newTemp(Ity_I64);
3477
3478 assign(op1, get_gpr_dw0(r1));
3479 assign(op2, unop(Iop_32Sto64, load(Ity_I32, mkexpr(op2addr))));
3480 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
3481
3482 return "cgf";
3483}
3484
3485static HChar *
3486s390_irgen_CFI(UChar r1, UInt i2)
3487{
3488 IRTemp op1 = newTemp(Ity_I32);
3489 Int op2;
3490
3491 assign(op1, get_gpr_w1(r1));
3492 op2 = (Int)i2;
3493 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, mktemp(Ity_I32,
3494 mkU32((UInt)op2)));
3495
3496 return "cfi";
3497}
3498
3499static HChar *
3500s390_irgen_CGFI(UChar r1, UInt i2)
3501{
3502 IRTemp op1 = newTemp(Ity_I64);
3503 Long op2;
3504
3505 assign(op1, get_gpr_dw0(r1));
3506 op2 = (Long)(Int)i2;
3507 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, mktemp(Ity_I64,
3508 mkU64((ULong)op2)));
3509
3510 return "cgfi";
3511}
3512
3513static HChar *
3514s390_irgen_CRL(UChar r1, UInt i2)
3515{
3516 IRTemp op1 = newTemp(Ity_I32);
3517 IRTemp op2 = newTemp(Ity_I32);
3518
3519 assign(op1, get_gpr_w1(r1));
3520 assign(op2, load(Ity_I32, mkU64(guest_IA_curr_instr + ((ULong)(Long)(Int)
3521 i2 << 1))));
3522 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
3523
3524 return "crl";
3525}
3526
3527static HChar *
3528s390_irgen_CGRL(UChar r1, UInt i2)
3529{
3530 IRTemp op1 = newTemp(Ity_I64);
3531 IRTemp op2 = newTemp(Ity_I64);
3532
3533 assign(op1, get_gpr_dw0(r1));
3534 assign(op2, load(Ity_I64, mkU64(guest_IA_curr_instr + ((ULong)(Long)(Int)
3535 i2 << 1))));
3536 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
3537
3538 return "cgrl";
3539}
3540
3541static HChar *
3542s390_irgen_CGFRL(UChar r1, UInt i2)
3543{
3544 IRTemp op1 = newTemp(Ity_I64);
3545 IRTemp op2 = newTemp(Ity_I64);
3546
3547 assign(op1, get_gpr_dw0(r1));
3548 assign(op2, unop(Iop_32Sto64, load(Ity_I32, mkU64(guest_IA_curr_instr +
3549 ((ULong)(Long)(Int)i2 << 1)))));
3550 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
3551
3552 return "cgfrl";
3553}
3554
3555static HChar *
3556s390_irgen_CRB(UChar r1, UChar r2, UChar m3, IRTemp op4addr)
3557{
3558 IRTemp op1 = newTemp(Ity_I32);
3559 IRTemp op2 = newTemp(Ity_I32);
3560 IRTemp icc = newTemp(Ity_I32);
3561 IRTemp cond = newTemp(Ity_I32);
3562
3563 if (m3 == 0) {
3564 } else {
3565 if (m3 == 14) {
3566 always_goto(mkexpr(op4addr));
3567 } else {
3568 assign(op1, get_gpr_w1(r1));
3569 assign(op2, get_gpr_w1(r2));
3570 assign(icc, s390_call_calculate_iccSS(S390_CC_OP_SIGNED_COMPARE, op1,
3571 op2));
3572 assign(cond, binop(Iop_And32, binop(Iop_Shl32, mkU32(m3),
3573 unop(Iop_32to8, mkexpr(icc))), mkU32(8)));
3574 if_not_condition_goto_computed(binop(Iop_CmpEQ32, mkexpr(cond),
3575 mkU32(0)), mkexpr(op4addr));
3576 }
3577 }
3578
3579 return "crb";
3580}
3581
3582static HChar *
3583s390_irgen_CGRB(UChar r1, UChar r2, UChar m3, IRTemp op4addr)
3584{
3585 IRTemp op1 = newTemp(Ity_I64);
3586 IRTemp op2 = newTemp(Ity_I64);
3587 IRTemp icc = newTemp(Ity_I32);
3588 IRTemp cond = newTemp(Ity_I32);
3589
3590 if (m3 == 0) {
3591 } else {
3592 if (m3 == 14) {
3593 always_goto(mkexpr(op4addr));
3594 } else {
3595 assign(op1, get_gpr_dw0(r1));
3596 assign(op2, get_gpr_dw0(r2));
3597 assign(icc, s390_call_calculate_iccSS(S390_CC_OP_SIGNED_COMPARE, op1,
3598 op2));
3599 assign(cond, binop(Iop_And32, binop(Iop_Shl32, mkU32(m3),
3600 unop(Iop_32to8, mkexpr(icc))), mkU32(8)));
3601 if_not_condition_goto_computed(binop(Iop_CmpEQ32, mkexpr(cond),
3602 mkU32(0)), mkexpr(op4addr));
3603 }
3604 }
3605
3606 return "cgrb";
3607}
3608
3609static HChar *
3610s390_irgen_CRJ(UChar r1, UChar r2, UShort i4, UChar m3)
3611{
3612 IRTemp op1 = newTemp(Ity_I32);
3613 IRTemp op2 = newTemp(Ity_I32);
3614 IRTemp icc = newTemp(Ity_I32);
3615 IRTemp cond = newTemp(Ity_I32);
3616
3617 if (m3 == 0) {
3618 } else {
3619 if (m3 == 14) {
floriana64c2432011-07-16 02:11:50 +00003620 always_goto_and_chase(
3621 guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1));
sewardj2019a972011-03-07 16:04:07 +00003622 } else {
3623 assign(op1, get_gpr_w1(r1));
3624 assign(op2, get_gpr_w1(r2));
3625 assign(icc, s390_call_calculate_iccSS(S390_CC_OP_SIGNED_COMPARE, op1,
3626 op2));
3627 assign(cond, binop(Iop_And32, binop(Iop_Shl32, mkU32(m3),
3628 unop(Iop_32to8, mkexpr(icc))), mkU32(8)));
3629 if_condition_goto(binop(Iop_CmpNE32, mkexpr(cond), mkU32(0)),
3630 guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1));
3631
3632 }
3633 }
3634
3635 return "crj";
3636}
3637
3638static HChar *
3639s390_irgen_CGRJ(UChar r1, UChar r2, UShort i4, UChar m3)
3640{
3641 IRTemp op1 = newTemp(Ity_I64);
3642 IRTemp op2 = newTemp(Ity_I64);
3643 IRTemp icc = newTemp(Ity_I32);
3644 IRTemp cond = newTemp(Ity_I32);
3645
3646 if (m3 == 0) {
3647 } else {
3648 if (m3 == 14) {
floriana64c2432011-07-16 02:11:50 +00003649 always_goto_and_chase(
3650 guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1));
sewardj2019a972011-03-07 16:04:07 +00003651 } else {
3652 assign(op1, get_gpr_dw0(r1));
3653 assign(op2, get_gpr_dw0(r2));
3654 assign(icc, s390_call_calculate_iccSS(S390_CC_OP_SIGNED_COMPARE, op1,
3655 op2));
3656 assign(cond, binop(Iop_And32, binop(Iop_Shl32, mkU32(m3),
3657 unop(Iop_32to8, mkexpr(icc))), mkU32(8)));
3658 if_condition_goto(binop(Iop_CmpNE32, mkexpr(cond), mkU32(0)),
3659 guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1));
3660
3661 }
3662 }
3663
3664 return "cgrj";
3665}
3666
3667static HChar *
3668s390_irgen_CIB(UChar r1, UChar m3, UChar i2, IRTemp op4addr)
3669{
3670 IRTemp op1 = newTemp(Ity_I32);
3671 Int op2;
3672 IRTemp icc = newTemp(Ity_I32);
3673 IRTemp cond = newTemp(Ity_I32);
3674
3675 if (m3 == 0) {
3676 } else {
3677 if (m3 == 14) {
3678 always_goto(mkexpr(op4addr));
3679 } else {
3680 assign(op1, get_gpr_w1(r1));
3681 op2 = (Int)(Char)i2;
3682 assign(icc, s390_call_calculate_iccSS(S390_CC_OP_SIGNED_COMPARE, op1,
3683 mktemp(Ity_I32, mkU32((UInt)op2))));
3684 assign(cond, binop(Iop_And32, binop(Iop_Shl32, mkU32(m3),
3685 unop(Iop_32to8, mkexpr(icc))), mkU32(8)));
3686 if_not_condition_goto_computed(binop(Iop_CmpEQ32, mkexpr(cond),
3687 mkU32(0)), mkexpr(op4addr));
3688 }
3689 }
3690
3691 return "cib";
3692}
3693
3694static HChar *
3695s390_irgen_CGIB(UChar r1, UChar m3, UChar i2, IRTemp op4addr)
3696{
3697 IRTemp op1 = newTemp(Ity_I64);
3698 Long op2;
3699 IRTemp icc = newTemp(Ity_I32);
3700 IRTemp cond = newTemp(Ity_I32);
3701
3702 if (m3 == 0) {
3703 } else {
3704 if (m3 == 14) {
3705 always_goto(mkexpr(op4addr));
3706 } else {
3707 assign(op1, get_gpr_dw0(r1));
3708 op2 = (Long)(Char)i2;
3709 assign(icc, s390_call_calculate_iccSS(S390_CC_OP_SIGNED_COMPARE, op1,
3710 mktemp(Ity_I64, mkU64((ULong)op2))));
3711 assign(cond, binop(Iop_And32, binop(Iop_Shl32, mkU32(m3),
3712 unop(Iop_32to8, mkexpr(icc))), mkU32(8)));
3713 if_not_condition_goto_computed(binop(Iop_CmpEQ32, mkexpr(cond),
3714 mkU32(0)), mkexpr(op4addr));
3715 }
3716 }
3717
3718 return "cgib";
3719}
3720
3721static HChar *
3722s390_irgen_CIJ(UChar r1, UChar m3, UShort i4, UChar i2)
3723{
3724 IRTemp op1 = newTemp(Ity_I32);
3725 Int op2;
3726 IRTemp icc = newTemp(Ity_I32);
3727 IRTemp cond = newTemp(Ity_I32);
3728
3729 if (m3 == 0) {
3730 } else {
3731 if (m3 == 14) {
floriana64c2432011-07-16 02:11:50 +00003732 always_goto_and_chase(guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1));
sewardj2019a972011-03-07 16:04:07 +00003733 } else {
3734 assign(op1, get_gpr_w1(r1));
3735 op2 = (Int)(Char)i2;
3736 assign(icc, s390_call_calculate_iccSS(S390_CC_OP_SIGNED_COMPARE, op1,
3737 mktemp(Ity_I32, mkU32((UInt)op2))));
3738 assign(cond, binop(Iop_And32, binop(Iop_Shl32, mkU32(m3),
3739 unop(Iop_32to8, mkexpr(icc))), mkU32(8)));
3740 if_condition_goto(binop(Iop_CmpNE32, mkexpr(cond), mkU32(0)),
3741 guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1));
3742
3743 }
3744 }
3745
3746 return "cij";
3747}
3748
3749static HChar *
3750s390_irgen_CGIJ(UChar r1, UChar m3, UShort i4, UChar i2)
3751{
3752 IRTemp op1 = newTemp(Ity_I64);
3753 Long op2;
3754 IRTemp icc = newTemp(Ity_I32);
3755 IRTemp cond = newTemp(Ity_I32);
3756
3757 if (m3 == 0) {
3758 } else {
3759 if (m3 == 14) {
floriana64c2432011-07-16 02:11:50 +00003760 always_goto_and_chase(guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1));
sewardj2019a972011-03-07 16:04:07 +00003761 } else {
3762 assign(op1, get_gpr_dw0(r1));
3763 op2 = (Long)(Char)i2;
3764 assign(icc, s390_call_calculate_iccSS(S390_CC_OP_SIGNED_COMPARE, op1,
3765 mktemp(Ity_I64, mkU64((ULong)op2))));
3766 assign(cond, binop(Iop_And32, binop(Iop_Shl32, mkU32(m3),
3767 unop(Iop_32to8, mkexpr(icc))), mkU32(8)));
3768 if_condition_goto(binop(Iop_CmpNE32, mkexpr(cond), mkU32(0)),
3769 guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1));
3770
3771 }
3772 }
3773
3774 return "cgij";
3775}
3776
3777static HChar *
3778s390_irgen_CH(UChar r1, IRTemp op2addr)
3779{
3780 IRTemp op1 = newTemp(Ity_I32);
3781 IRTemp op2 = newTemp(Ity_I32);
3782
3783 assign(op1, get_gpr_w1(r1));
3784 assign(op2, unop(Iop_16Sto32, load(Ity_I16, mkexpr(op2addr))));
3785 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
3786
3787 return "ch";
3788}
3789
3790static HChar *
3791s390_irgen_CHY(UChar r1, IRTemp op2addr)
3792{
3793 IRTemp op1 = newTemp(Ity_I32);
3794 IRTemp op2 = newTemp(Ity_I32);
3795
3796 assign(op1, get_gpr_w1(r1));
3797 assign(op2, unop(Iop_16Sto32, load(Ity_I16, mkexpr(op2addr))));
3798 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
3799
3800 return "chy";
3801}
3802
3803static HChar *
3804s390_irgen_CGH(UChar r1, IRTemp op2addr)
3805{
3806 IRTemp op1 = newTemp(Ity_I64);
3807 IRTemp op2 = newTemp(Ity_I64);
3808
3809 assign(op1, get_gpr_dw0(r1));
3810 assign(op2, unop(Iop_16Sto64, load(Ity_I16, mkexpr(op2addr))));
3811 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
3812
3813 return "cgh";
3814}
3815
3816static HChar *
3817s390_irgen_CHI(UChar r1, UShort i2)
3818{
3819 IRTemp op1 = newTemp(Ity_I32);
3820 Int op2;
3821
3822 assign(op1, get_gpr_w1(r1));
3823 op2 = (Int)(Short)i2;
3824 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, mktemp(Ity_I32,
3825 mkU32((UInt)op2)));
3826
3827 return "chi";
3828}
3829
3830static HChar *
3831s390_irgen_CGHI(UChar r1, UShort i2)
3832{
3833 IRTemp op1 = newTemp(Ity_I64);
3834 Long op2;
3835
3836 assign(op1, get_gpr_dw0(r1));
3837 op2 = (Long)(Short)i2;
3838 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, mktemp(Ity_I64,
3839 mkU64((ULong)op2)));
3840
3841 return "cghi";
3842}
3843
3844static HChar *
3845s390_irgen_CHHSI(UShort i2, IRTemp op1addr)
3846{
3847 IRTemp op1 = newTemp(Ity_I16);
3848 Short op2;
3849
3850 assign(op1, load(Ity_I16, mkexpr(op1addr)));
3851 op2 = (Short)i2;
3852 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, mktemp(Ity_I16,
3853 mkU16((UShort)op2)));
3854
3855 return "chhsi";
3856}
3857
3858static HChar *
3859s390_irgen_CHSI(UShort i2, IRTemp op1addr)
3860{
3861 IRTemp op1 = newTemp(Ity_I32);
3862 Int op2;
3863
3864 assign(op1, load(Ity_I32, mkexpr(op1addr)));
3865 op2 = (Int)(Short)i2;
3866 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, mktemp(Ity_I32,
3867 mkU32((UInt)op2)));
3868
3869 return "chsi";
3870}
3871
3872static HChar *
3873s390_irgen_CGHSI(UShort i2, IRTemp op1addr)
3874{
3875 IRTemp op1 = newTemp(Ity_I64);
3876 Long op2;
3877
3878 assign(op1, load(Ity_I64, mkexpr(op1addr)));
3879 op2 = (Long)(Short)i2;
3880 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, mktemp(Ity_I64,
3881 mkU64((ULong)op2)));
3882
3883 return "cghsi";
3884}
3885
3886static HChar *
3887s390_irgen_CHRL(UChar r1, UInt i2)
3888{
3889 IRTemp op1 = newTemp(Ity_I32);
3890 IRTemp op2 = newTemp(Ity_I32);
3891
3892 assign(op1, get_gpr_w1(r1));
3893 assign(op2, unop(Iop_16Sto32, load(Ity_I16, mkU64(guest_IA_curr_instr +
3894 ((ULong)(Long)(Int)i2 << 1)))));
3895 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
3896
3897 return "chrl";
3898}
3899
3900static HChar *
3901s390_irgen_CGHRL(UChar r1, UInt i2)
3902{
3903 IRTemp op1 = newTemp(Ity_I64);
3904 IRTemp op2 = newTemp(Ity_I64);
3905
3906 assign(op1, get_gpr_dw0(r1));
3907 assign(op2, unop(Iop_16Sto64, load(Ity_I16, mkU64(guest_IA_curr_instr +
3908 ((ULong)(Long)(Int)i2 << 1)))));
3909 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
3910
3911 return "cghrl";
3912}
3913
3914static HChar *
3915s390_irgen_CHHR(UChar r1, UChar r2)
3916{
3917 IRTemp op1 = newTemp(Ity_I32);
3918 IRTemp op2 = newTemp(Ity_I32);
3919
3920 assign(op1, get_gpr_w0(r1));
3921 assign(op2, get_gpr_w0(r2));
3922 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
3923
3924 return "chhr";
3925}
3926
3927static HChar *
3928s390_irgen_CHLR(UChar r1, UChar r2)
3929{
3930 IRTemp op1 = newTemp(Ity_I32);
3931 IRTemp op2 = newTemp(Ity_I32);
3932
3933 assign(op1, get_gpr_w0(r1));
3934 assign(op2, get_gpr_w1(r2));
3935 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
3936
3937 return "chlr";
3938}
3939
3940static HChar *
3941s390_irgen_CHF(UChar r1, IRTemp op2addr)
3942{
3943 IRTemp op1 = newTemp(Ity_I32);
3944 IRTemp op2 = newTemp(Ity_I32);
3945
3946 assign(op1, get_gpr_w0(r1));
3947 assign(op2, load(Ity_I32, mkexpr(op2addr)));
3948 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
3949
3950 return "chf";
3951}
3952
3953static HChar *
3954s390_irgen_CIH(UChar r1, UInt i2)
3955{
3956 IRTemp op1 = newTemp(Ity_I32);
3957 Int op2;
3958
3959 assign(op1, get_gpr_w0(r1));
3960 op2 = (Int)i2;
3961 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, mktemp(Ity_I32,
3962 mkU32((UInt)op2)));
3963
3964 return "cih";
3965}
3966
3967static HChar *
3968s390_irgen_CLR(UChar r1, UChar r2)
3969{
3970 IRTemp op1 = newTemp(Ity_I32);
3971 IRTemp op2 = newTemp(Ity_I32);
3972
3973 assign(op1, get_gpr_w1(r1));
3974 assign(op2, get_gpr_w1(r2));
3975 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
3976
3977 return "clr";
3978}
3979
3980static HChar *
3981s390_irgen_CLGR(UChar r1, UChar r2)
3982{
3983 IRTemp op1 = newTemp(Ity_I64);
3984 IRTemp op2 = newTemp(Ity_I64);
3985
3986 assign(op1, get_gpr_dw0(r1));
3987 assign(op2, get_gpr_dw0(r2));
3988 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
3989
3990 return "clgr";
3991}
3992
3993static HChar *
3994s390_irgen_CLGFR(UChar r1, UChar r2)
3995{
3996 IRTemp op1 = newTemp(Ity_I64);
3997 IRTemp op2 = newTemp(Ity_I64);
3998
3999 assign(op1, get_gpr_dw0(r1));
4000 assign(op2, unop(Iop_32Uto64, get_gpr_w1(r2)));
4001 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
4002
4003 return "clgfr";
4004}
4005
4006static HChar *
4007s390_irgen_CL(UChar r1, IRTemp op2addr)
4008{
4009 IRTemp op1 = newTemp(Ity_I32);
4010 IRTemp op2 = newTemp(Ity_I32);
4011
4012 assign(op1, get_gpr_w1(r1));
4013 assign(op2, load(Ity_I32, mkexpr(op2addr)));
4014 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
4015
4016 return "cl";
4017}
4018
4019static HChar *
4020s390_irgen_CLY(UChar r1, IRTemp op2addr)
4021{
4022 IRTemp op1 = newTemp(Ity_I32);
4023 IRTemp op2 = newTemp(Ity_I32);
4024
4025 assign(op1, get_gpr_w1(r1));
4026 assign(op2, load(Ity_I32, mkexpr(op2addr)));
4027 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
4028
4029 return "cly";
4030}
4031
4032static HChar *
4033s390_irgen_CLG(UChar r1, IRTemp op2addr)
4034{
4035 IRTemp op1 = newTemp(Ity_I64);
4036 IRTemp op2 = newTemp(Ity_I64);
4037
4038 assign(op1, get_gpr_dw0(r1));
4039 assign(op2, load(Ity_I64, mkexpr(op2addr)));
4040 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
4041
4042 return "clg";
4043}
4044
4045static HChar *
4046s390_irgen_CLGF(UChar r1, IRTemp op2addr)
4047{
4048 IRTemp op1 = newTemp(Ity_I64);
4049 IRTemp op2 = newTemp(Ity_I64);
4050
4051 assign(op1, get_gpr_dw0(r1));
4052 assign(op2, unop(Iop_32Uto64, load(Ity_I32, mkexpr(op2addr))));
4053 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
4054
4055 return "clgf";
4056}
4057
4058static HChar *
4059s390_irgen_CLFI(UChar r1, UInt i2)
4060{
4061 IRTemp op1 = newTemp(Ity_I32);
4062 UInt op2;
4063
4064 assign(op1, get_gpr_w1(r1));
4065 op2 = i2;
4066 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, mktemp(Ity_I32,
4067 mkU32(op2)));
4068
4069 return "clfi";
4070}
4071
4072static HChar *
4073s390_irgen_CLGFI(UChar r1, UInt i2)
4074{
4075 IRTemp op1 = newTemp(Ity_I64);
4076 ULong op2;
4077
4078 assign(op1, get_gpr_dw0(r1));
4079 op2 = (ULong)i2;
4080 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, mktemp(Ity_I64,
4081 mkU64(op2)));
4082
4083 return "clgfi";
4084}
4085
4086static HChar *
4087s390_irgen_CLI(UChar i2, IRTemp op1addr)
4088{
4089 IRTemp op1 = newTemp(Ity_I8);
4090 UChar op2;
4091
4092 assign(op1, load(Ity_I8, mkexpr(op1addr)));
4093 op2 = i2;
4094 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, mktemp(Ity_I8,
4095 mkU8(op2)));
4096
4097 return "cli";
4098}
4099
4100static HChar *
4101s390_irgen_CLIY(UChar i2, IRTemp op1addr)
4102{
4103 IRTemp op1 = newTemp(Ity_I8);
4104 UChar op2;
4105
4106 assign(op1, load(Ity_I8, mkexpr(op1addr)));
4107 op2 = i2;
4108 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, mktemp(Ity_I8,
4109 mkU8(op2)));
4110
4111 return "cliy";
4112}
4113
4114static HChar *
4115s390_irgen_CLFHSI(UShort i2, IRTemp op1addr)
4116{
4117 IRTemp op1 = newTemp(Ity_I32);
4118 UInt op2;
4119
4120 assign(op1, load(Ity_I32, mkexpr(op1addr)));
4121 op2 = (UInt)i2;
4122 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, mktemp(Ity_I32,
4123 mkU32(op2)));
4124
4125 return "clfhsi";
4126}
4127
4128static HChar *
4129s390_irgen_CLGHSI(UShort i2, IRTemp op1addr)
4130{
4131 IRTemp op1 = newTemp(Ity_I64);
4132 ULong op2;
4133
4134 assign(op1, load(Ity_I64, mkexpr(op1addr)));
4135 op2 = (ULong)i2;
4136 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, mktemp(Ity_I64,
4137 mkU64(op2)));
4138
4139 return "clghsi";
4140}
4141
4142static HChar *
4143s390_irgen_CLHHSI(UShort i2, IRTemp op1addr)
4144{
4145 IRTemp op1 = newTemp(Ity_I16);
4146 UShort op2;
4147
4148 assign(op1, load(Ity_I16, mkexpr(op1addr)));
4149 op2 = i2;
4150 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, mktemp(Ity_I16,
4151 mkU16(op2)));
4152
4153 return "clhhsi";
4154}
4155
4156static HChar *
4157s390_irgen_CLRL(UChar r1, UInt i2)
4158{
4159 IRTemp op1 = newTemp(Ity_I32);
4160 IRTemp op2 = newTemp(Ity_I32);
4161
4162 assign(op1, get_gpr_w1(r1));
4163 assign(op2, load(Ity_I32, mkU64(guest_IA_curr_instr + ((ULong)(Long)(Int)
4164 i2 << 1))));
4165 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
4166
4167 return "clrl";
4168}
4169
4170static HChar *
4171s390_irgen_CLGRL(UChar r1, UInt i2)
4172{
4173 IRTemp op1 = newTemp(Ity_I64);
4174 IRTemp op2 = newTemp(Ity_I64);
4175
4176 assign(op1, get_gpr_dw0(r1));
4177 assign(op2, load(Ity_I64, mkU64(guest_IA_curr_instr + ((ULong)(Long)(Int)
4178 i2 << 1))));
4179 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
4180
4181 return "clgrl";
4182}
4183
4184static HChar *
4185s390_irgen_CLGFRL(UChar r1, UInt i2)
4186{
4187 IRTemp op1 = newTemp(Ity_I64);
4188 IRTemp op2 = newTemp(Ity_I64);
4189
4190 assign(op1, get_gpr_dw0(r1));
4191 assign(op2, unop(Iop_32Uto64, load(Ity_I32, mkU64(guest_IA_curr_instr +
4192 ((ULong)(Long)(Int)i2 << 1)))));
4193 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
4194
4195 return "clgfrl";
4196}
4197
4198static HChar *
4199s390_irgen_CLHRL(UChar r1, UInt i2)
4200{
4201 IRTemp op1 = newTemp(Ity_I32);
4202 IRTemp op2 = newTemp(Ity_I32);
4203
4204 assign(op1, get_gpr_w1(r1));
4205 assign(op2, unop(Iop_16Uto32, load(Ity_I16, mkU64(guest_IA_curr_instr +
4206 ((ULong)(Long)(Int)i2 << 1)))));
4207 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
4208
4209 return "clhrl";
4210}
4211
4212static HChar *
4213s390_irgen_CLGHRL(UChar r1, UInt i2)
4214{
4215 IRTemp op1 = newTemp(Ity_I64);
4216 IRTemp op2 = newTemp(Ity_I64);
4217
4218 assign(op1, get_gpr_dw0(r1));
4219 assign(op2, unop(Iop_16Uto64, load(Ity_I16, mkU64(guest_IA_curr_instr +
4220 ((ULong)(Long)(Int)i2 << 1)))));
4221 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
4222
4223 return "clghrl";
4224}
4225
4226static HChar *
4227s390_irgen_CLRB(UChar r1, UChar r2, UChar m3, IRTemp op4addr)
4228{
4229 IRTemp op1 = newTemp(Ity_I32);
4230 IRTemp op2 = newTemp(Ity_I32);
4231 IRTemp icc = newTemp(Ity_I32);
4232 IRTemp cond = newTemp(Ity_I32);
4233
4234 if (m3 == 0) {
4235 } else {
4236 if (m3 == 14) {
4237 always_goto(mkexpr(op4addr));
4238 } else {
4239 assign(op1, get_gpr_w1(r1));
4240 assign(op2, get_gpr_w1(r2));
4241 assign(icc, s390_call_calculate_iccZZ(S390_CC_OP_UNSIGNED_COMPARE, op1,
4242 op2));
4243 assign(cond, binop(Iop_And32, binop(Iop_Shl32, mkU32(m3),
4244 unop(Iop_32to8, mkexpr(icc))), mkU32(8)));
4245 if_not_condition_goto_computed(binop(Iop_CmpEQ32, mkexpr(cond),
4246 mkU32(0)), mkexpr(op4addr));
4247 }
4248 }
4249
4250 return "clrb";
4251}
4252
4253static HChar *
4254s390_irgen_CLGRB(UChar r1, UChar r2, UChar m3, IRTemp op4addr)
4255{
4256 IRTemp op1 = newTemp(Ity_I64);
4257 IRTemp op2 = newTemp(Ity_I64);
4258 IRTemp icc = newTemp(Ity_I32);
4259 IRTemp cond = newTemp(Ity_I32);
4260
4261 if (m3 == 0) {
4262 } else {
4263 if (m3 == 14) {
4264 always_goto(mkexpr(op4addr));
4265 } else {
4266 assign(op1, get_gpr_dw0(r1));
4267 assign(op2, get_gpr_dw0(r2));
4268 assign(icc, s390_call_calculate_iccZZ(S390_CC_OP_UNSIGNED_COMPARE, op1,
4269 op2));
4270 assign(cond, binop(Iop_And32, binop(Iop_Shl32, mkU32(m3),
4271 unop(Iop_32to8, mkexpr(icc))), mkU32(8)));
4272 if_not_condition_goto_computed(binop(Iop_CmpEQ32, mkexpr(cond),
4273 mkU32(0)), mkexpr(op4addr));
4274 }
4275 }
4276
4277 return "clgrb";
4278}
4279
4280static HChar *
4281s390_irgen_CLRJ(UChar r1, UChar r2, UShort i4, UChar m3)
4282{
4283 IRTemp op1 = newTemp(Ity_I32);
4284 IRTemp op2 = newTemp(Ity_I32);
4285 IRTemp icc = newTemp(Ity_I32);
4286 IRTemp cond = newTemp(Ity_I32);
4287
4288 if (m3 == 0) {
4289 } else {
4290 if (m3 == 14) {
floriana64c2432011-07-16 02:11:50 +00004291 always_goto_and_chase(guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1));
sewardj2019a972011-03-07 16:04:07 +00004292 } else {
4293 assign(op1, get_gpr_w1(r1));
4294 assign(op2, get_gpr_w1(r2));
4295 assign(icc, s390_call_calculate_iccZZ(S390_CC_OP_UNSIGNED_COMPARE, op1,
4296 op2));
4297 assign(cond, binop(Iop_And32, binop(Iop_Shl32, mkU32(m3),
4298 unop(Iop_32to8, mkexpr(icc))), mkU32(8)));
4299 if_condition_goto(binop(Iop_CmpNE32, mkexpr(cond), mkU32(0)),
4300 guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1));
4301
4302 }
4303 }
4304
4305 return "clrj";
4306}
4307
4308static HChar *
4309s390_irgen_CLGRJ(UChar r1, UChar r2, UShort i4, UChar m3)
4310{
4311 IRTemp op1 = newTemp(Ity_I64);
4312 IRTemp op2 = newTemp(Ity_I64);
4313 IRTemp icc = newTemp(Ity_I32);
4314 IRTemp cond = newTemp(Ity_I32);
4315
4316 if (m3 == 0) {
4317 } else {
4318 if (m3 == 14) {
floriana64c2432011-07-16 02:11:50 +00004319 always_goto_and_chase(guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1));
sewardj2019a972011-03-07 16:04:07 +00004320 } else {
4321 assign(op1, get_gpr_dw0(r1));
4322 assign(op2, get_gpr_dw0(r2));
4323 assign(icc, s390_call_calculate_iccZZ(S390_CC_OP_UNSIGNED_COMPARE, op1,
4324 op2));
4325 assign(cond, binop(Iop_And32, binop(Iop_Shl32, mkU32(m3),
4326 unop(Iop_32to8, mkexpr(icc))), mkU32(8)));
4327 if_condition_goto(binop(Iop_CmpNE32, mkexpr(cond), mkU32(0)),
4328 guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1));
4329
4330 }
4331 }
4332
4333 return "clgrj";
4334}
4335
4336static HChar *
4337s390_irgen_CLIB(UChar r1, UChar m3, UChar i2, IRTemp op4addr)
4338{
4339 IRTemp op1 = newTemp(Ity_I32);
4340 UInt op2;
4341 IRTemp icc = newTemp(Ity_I32);
4342 IRTemp cond = newTemp(Ity_I32);
4343
4344 if (m3 == 0) {
4345 } else {
4346 if (m3 == 14) {
4347 always_goto(mkexpr(op4addr));
4348 } else {
4349 assign(op1, get_gpr_w1(r1));
4350 op2 = (UInt)i2;
4351 assign(icc, s390_call_calculate_iccZZ(S390_CC_OP_UNSIGNED_COMPARE, op1,
4352 mktemp(Ity_I32, mkU32(op2))));
4353 assign(cond, binop(Iop_And32, binop(Iop_Shl32, mkU32(m3),
4354 unop(Iop_32to8, mkexpr(icc))), mkU32(8)));
4355 if_not_condition_goto_computed(binop(Iop_CmpEQ32, mkexpr(cond),
4356 mkU32(0)), mkexpr(op4addr));
4357 }
4358 }
4359
4360 return "clib";
4361}
4362
4363static HChar *
4364s390_irgen_CLGIB(UChar r1, UChar m3, UChar i2, IRTemp op4addr)
4365{
4366 IRTemp op1 = newTemp(Ity_I64);
4367 ULong op2;
4368 IRTemp icc = newTemp(Ity_I32);
4369 IRTemp cond = newTemp(Ity_I32);
4370
4371 if (m3 == 0) {
4372 } else {
4373 if (m3 == 14) {
4374 always_goto(mkexpr(op4addr));
4375 } else {
4376 assign(op1, get_gpr_dw0(r1));
4377 op2 = (ULong)i2;
4378 assign(icc, s390_call_calculate_iccZZ(S390_CC_OP_UNSIGNED_COMPARE, op1,
4379 mktemp(Ity_I64, mkU64(op2))));
4380 assign(cond, binop(Iop_And32, binop(Iop_Shl32, mkU32(m3),
4381 unop(Iop_32to8, mkexpr(icc))), mkU32(8)));
4382 if_not_condition_goto_computed(binop(Iop_CmpEQ32, mkexpr(cond),
4383 mkU32(0)), mkexpr(op4addr));
4384 }
4385 }
4386
4387 return "clgib";
4388}
4389
4390static HChar *
4391s390_irgen_CLIJ(UChar r1, UChar m3, UShort i4, UChar i2)
4392{
4393 IRTemp op1 = newTemp(Ity_I32);
4394 UInt op2;
4395 IRTemp icc = newTemp(Ity_I32);
4396 IRTemp cond = newTemp(Ity_I32);
4397
4398 if (m3 == 0) {
4399 } else {
4400 if (m3 == 14) {
floriana64c2432011-07-16 02:11:50 +00004401 always_goto_and_chase(guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1));
sewardj2019a972011-03-07 16:04:07 +00004402 } else {
4403 assign(op1, get_gpr_w1(r1));
4404 op2 = (UInt)i2;
4405 assign(icc, s390_call_calculate_iccZZ(S390_CC_OP_UNSIGNED_COMPARE, op1,
4406 mktemp(Ity_I32, mkU32(op2))));
4407 assign(cond, binop(Iop_And32, binop(Iop_Shl32, mkU32(m3),
4408 unop(Iop_32to8, mkexpr(icc))), mkU32(8)));
4409 if_condition_goto(binop(Iop_CmpNE32, mkexpr(cond), mkU32(0)),
4410 guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1));
4411
4412 }
4413 }
4414
4415 return "clij";
4416}
4417
4418static HChar *
4419s390_irgen_CLGIJ(UChar r1, UChar m3, UShort i4, UChar i2)
4420{
4421 IRTemp op1 = newTemp(Ity_I64);
4422 ULong op2;
4423 IRTemp icc = newTemp(Ity_I32);
4424 IRTemp cond = newTemp(Ity_I32);
4425
4426 if (m3 == 0) {
4427 } else {
4428 if (m3 == 14) {
floriana64c2432011-07-16 02:11:50 +00004429 always_goto_and_chase(guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1));
sewardj2019a972011-03-07 16:04:07 +00004430 } else {
4431 assign(op1, get_gpr_dw0(r1));
4432 op2 = (ULong)i2;
4433 assign(icc, s390_call_calculate_iccZZ(S390_CC_OP_UNSIGNED_COMPARE, op1,
4434 mktemp(Ity_I64, mkU64(op2))));
4435 assign(cond, binop(Iop_And32, binop(Iop_Shl32, mkU32(m3),
4436 unop(Iop_32to8, mkexpr(icc))), mkU32(8)));
4437 if_condition_goto(binop(Iop_CmpNE32, mkexpr(cond), mkU32(0)),
4438 guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1));
4439
4440 }
4441 }
4442
4443 return "clgij";
4444}
4445
4446static HChar *
4447s390_irgen_CLM(UChar r1, UChar r3, IRTemp op2addr)
4448{
4449 IRTemp op1 = newTemp(Ity_I32);
4450 IRTemp op2 = newTemp(Ity_I32);
4451 IRTemp b0 = newTemp(Ity_I32);
4452 IRTemp b1 = newTemp(Ity_I32);
4453 IRTemp b2 = newTemp(Ity_I32);
4454 IRTemp b3 = newTemp(Ity_I32);
4455 IRTemp c0 = newTemp(Ity_I32);
4456 IRTemp c1 = newTemp(Ity_I32);
4457 IRTemp c2 = newTemp(Ity_I32);
4458 IRTemp c3 = newTemp(Ity_I32);
4459 UChar n;
4460
4461 n = 0;
4462 if ((r3 & 8) != 0) {
4463 assign(b0, unop(Iop_8Uto32, get_gpr_b4(r1)));
4464 assign(c0, unop(Iop_8Uto32, load(Ity_I8, mkexpr(op2addr))));
4465 n = n + 1;
4466 } else {
4467 assign(b0, mkU32(0));
4468 assign(c0, mkU32(0));
4469 }
4470 if ((r3 & 4) != 0) {
4471 assign(b1, unop(Iop_8Uto32, get_gpr_b5(r1)));
4472 assign(c1, unop(Iop_8Uto32, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr),
4473 mkU64(n)))));
4474 n = n + 1;
4475 } else {
4476 assign(b1, mkU32(0));
4477 assign(c1, mkU32(0));
4478 }
4479 if ((r3 & 2) != 0) {
4480 assign(b2, unop(Iop_8Uto32, get_gpr_b6(r1)));
4481 assign(c2, unop(Iop_8Uto32, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr),
4482 mkU64(n)))));
4483 n = n + 1;
4484 } else {
4485 assign(b2, mkU32(0));
4486 assign(c2, mkU32(0));
4487 }
4488 if ((r3 & 1) != 0) {
4489 assign(b3, unop(Iop_8Uto32, get_gpr_b7(r1)));
4490 assign(c3, unop(Iop_8Uto32, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr),
4491 mkU64(n)))));
4492 n = n + 1;
4493 } else {
4494 assign(b3, mkU32(0));
4495 assign(c3, mkU32(0));
4496 }
4497 assign(op1, binop(Iop_Or32, binop(Iop_Or32, binop(Iop_Or32, binop(Iop_Shl32,
4498 mkexpr(b0), mkU8(24)), binop(Iop_Shl32, mkexpr(b1), mkU8(16))),
4499 binop(Iop_Shl32, mkexpr(b2), mkU8(8))), mkexpr(b3)));
4500 assign(op2, binop(Iop_Or32, binop(Iop_Or32, binop(Iop_Or32, binop(Iop_Shl32,
4501 mkexpr(c0), mkU8(24)), binop(Iop_Shl32, mkexpr(c1), mkU8(16))),
4502 binop(Iop_Shl32, mkexpr(c2), mkU8(8))), mkexpr(c3)));
4503 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
4504
4505 return "clm";
4506}
4507
4508static HChar *
4509s390_irgen_CLMY(UChar r1, UChar r3, IRTemp op2addr)
4510{
4511 IRTemp op1 = newTemp(Ity_I32);
4512 IRTemp op2 = newTemp(Ity_I32);
4513 IRTemp b0 = newTemp(Ity_I32);
4514 IRTemp b1 = newTemp(Ity_I32);
4515 IRTemp b2 = newTemp(Ity_I32);
4516 IRTemp b3 = newTemp(Ity_I32);
4517 IRTemp c0 = newTemp(Ity_I32);
4518 IRTemp c1 = newTemp(Ity_I32);
4519 IRTemp c2 = newTemp(Ity_I32);
4520 IRTemp c3 = newTemp(Ity_I32);
4521 UChar n;
4522
4523 n = 0;
4524 if ((r3 & 8) != 0) {
4525 assign(b0, unop(Iop_8Uto32, get_gpr_b4(r1)));
4526 assign(c0, unop(Iop_8Uto32, load(Ity_I8, mkexpr(op2addr))));
4527 n = n + 1;
4528 } else {
4529 assign(b0, mkU32(0));
4530 assign(c0, mkU32(0));
4531 }
4532 if ((r3 & 4) != 0) {
4533 assign(b1, unop(Iop_8Uto32, get_gpr_b5(r1)));
4534 assign(c1, unop(Iop_8Uto32, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr),
4535 mkU64(n)))));
4536 n = n + 1;
4537 } else {
4538 assign(b1, mkU32(0));
4539 assign(c1, mkU32(0));
4540 }
4541 if ((r3 & 2) != 0) {
4542 assign(b2, unop(Iop_8Uto32, get_gpr_b6(r1)));
4543 assign(c2, unop(Iop_8Uto32, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr),
4544 mkU64(n)))));
4545 n = n + 1;
4546 } else {
4547 assign(b2, mkU32(0));
4548 assign(c2, mkU32(0));
4549 }
4550 if ((r3 & 1) != 0) {
4551 assign(b3, unop(Iop_8Uto32, get_gpr_b7(r1)));
4552 assign(c3, unop(Iop_8Uto32, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr),
4553 mkU64(n)))));
4554 n = n + 1;
4555 } else {
4556 assign(b3, mkU32(0));
4557 assign(c3, mkU32(0));
4558 }
4559 assign(op1, binop(Iop_Or32, binop(Iop_Or32, binop(Iop_Or32, binop(Iop_Shl32,
4560 mkexpr(b0), mkU8(24)), binop(Iop_Shl32, mkexpr(b1), mkU8(16))),
4561 binop(Iop_Shl32, mkexpr(b2), mkU8(8))), mkexpr(b3)));
4562 assign(op2, binop(Iop_Or32, binop(Iop_Or32, binop(Iop_Or32, binop(Iop_Shl32,
4563 mkexpr(c0), mkU8(24)), binop(Iop_Shl32, mkexpr(c1), mkU8(16))),
4564 binop(Iop_Shl32, mkexpr(c2), mkU8(8))), mkexpr(c3)));
4565 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
4566
4567 return "clmy";
4568}
4569
4570static HChar *
4571s390_irgen_CLMH(UChar r1, UChar r3, IRTemp op2addr)
4572{
4573 IRTemp op1 = newTemp(Ity_I32);
4574 IRTemp op2 = newTemp(Ity_I32);
4575 IRTemp b0 = newTemp(Ity_I32);
4576 IRTemp b1 = newTemp(Ity_I32);
4577 IRTemp b2 = newTemp(Ity_I32);
4578 IRTemp b3 = newTemp(Ity_I32);
4579 IRTemp c0 = newTemp(Ity_I32);
4580 IRTemp c1 = newTemp(Ity_I32);
4581 IRTemp c2 = newTemp(Ity_I32);
4582 IRTemp c3 = newTemp(Ity_I32);
4583 UChar n;
4584
4585 n = 0;
4586 if ((r3 & 8) != 0) {
4587 assign(b0, unop(Iop_8Uto32, get_gpr_b0(r1)));
4588 assign(c0, unop(Iop_8Uto32, load(Ity_I8, mkexpr(op2addr))));
4589 n = n + 1;
4590 } else {
4591 assign(b0, mkU32(0));
4592 assign(c0, mkU32(0));
4593 }
4594 if ((r3 & 4) != 0) {
4595 assign(b1, unop(Iop_8Uto32, get_gpr_b1(r1)));
4596 assign(c1, unop(Iop_8Uto32, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr),
4597 mkU64(n)))));
4598 n = n + 1;
4599 } else {
4600 assign(b1, mkU32(0));
4601 assign(c1, mkU32(0));
4602 }
4603 if ((r3 & 2) != 0) {
4604 assign(b2, unop(Iop_8Uto32, get_gpr_b2(r1)));
4605 assign(c2, unop(Iop_8Uto32, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr),
4606 mkU64(n)))));
4607 n = n + 1;
4608 } else {
4609 assign(b2, mkU32(0));
4610 assign(c2, mkU32(0));
4611 }
4612 if ((r3 & 1) != 0) {
4613 assign(b3, unop(Iop_8Uto32, get_gpr_b3(r1)));
4614 assign(c3, unop(Iop_8Uto32, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr),
4615 mkU64(n)))));
4616 n = n + 1;
4617 } else {
4618 assign(b3, mkU32(0));
4619 assign(c3, mkU32(0));
4620 }
4621 assign(op1, binop(Iop_Or32, binop(Iop_Or32, binop(Iop_Or32, binop(Iop_Shl32,
4622 mkexpr(b0), mkU8(24)), binop(Iop_Shl32, mkexpr(b1), mkU8(16))),
4623 binop(Iop_Shl32, mkexpr(b2), mkU8(8))), mkexpr(b3)));
4624 assign(op2, binop(Iop_Or32, binop(Iop_Or32, binop(Iop_Or32, binop(Iop_Shl32,
4625 mkexpr(c0), mkU8(24)), binop(Iop_Shl32, mkexpr(c1), mkU8(16))),
4626 binop(Iop_Shl32, mkexpr(c2), mkU8(8))), mkexpr(c3)));
4627 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
4628
4629 return "clmh";
4630}
4631
4632static HChar *
4633s390_irgen_CLHHR(UChar r1, UChar r2)
4634{
4635 IRTemp op1 = newTemp(Ity_I32);
4636 IRTemp op2 = newTemp(Ity_I32);
4637
4638 assign(op1, get_gpr_w0(r1));
4639 assign(op2, get_gpr_w0(r2));
4640 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
4641
4642 return "clhhr";
4643}
4644
4645static HChar *
4646s390_irgen_CLHLR(UChar r1, UChar r2)
4647{
4648 IRTemp op1 = newTemp(Ity_I32);
4649 IRTemp op2 = newTemp(Ity_I32);
4650
4651 assign(op1, get_gpr_w0(r1));
4652 assign(op2, get_gpr_w1(r2));
4653 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
4654
4655 return "clhlr";
4656}
4657
4658static HChar *
4659s390_irgen_CLHF(UChar r1, IRTemp op2addr)
4660{
4661 IRTemp op1 = newTemp(Ity_I32);
4662 IRTemp op2 = newTemp(Ity_I32);
4663
4664 assign(op1, get_gpr_w0(r1));
4665 assign(op2, load(Ity_I32, mkexpr(op2addr)));
4666 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
4667
4668 return "clhf";
4669}
4670
4671static HChar *
4672s390_irgen_CLIH(UChar r1, UInt i2)
4673{
4674 IRTemp op1 = newTemp(Ity_I32);
4675 UInt op2;
4676
4677 assign(op1, get_gpr_w0(r1));
4678 op2 = i2;
4679 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, mktemp(Ity_I32,
4680 mkU32(op2)));
4681
4682 return "clih";
4683}
4684
4685static HChar *
4686s390_irgen_CPYA(UChar r1, UChar r2)
4687{
4688 put_ar_w0(r1, get_ar_w0(r2));
sewardj7ee97522011-05-09 21:45:04 +00004689 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00004690 s390_disasm(ENC3(MNM, AR, AR), "cpya", r1, r2);
4691
4692 return "cpya";
4693}
4694
4695static HChar *
4696s390_irgen_XR(UChar r1, UChar r2)
4697{
4698 IRTemp op1 = newTemp(Ity_I32);
4699 IRTemp op2 = newTemp(Ity_I32);
4700 IRTemp result = newTemp(Ity_I32);
4701
4702 if (r1 == r2) {
4703 assign(result, mkU32(0));
4704 } else {
4705 assign(op1, get_gpr_w1(r1));
4706 assign(op2, get_gpr_w1(r2));
4707 assign(result, binop(Iop_Xor32, mkexpr(op1), mkexpr(op2)));
4708 }
4709 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
4710 put_gpr_w1(r1, mkexpr(result));
4711
4712 return "xr";
4713}
4714
4715static HChar *
4716s390_irgen_XGR(UChar r1, UChar r2)
4717{
4718 IRTemp op1 = newTemp(Ity_I64);
4719 IRTemp op2 = newTemp(Ity_I64);
4720 IRTemp result = newTemp(Ity_I64);
4721
4722 if (r1 == r2) {
4723 assign(result, mkU64(0));
4724 } else {
4725 assign(op1, get_gpr_dw0(r1));
4726 assign(op2, get_gpr_dw0(r2));
4727 assign(result, binop(Iop_Xor64, mkexpr(op1), mkexpr(op2)));
4728 }
4729 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
4730 put_gpr_dw0(r1, mkexpr(result));
4731
4732 return "xgr";
4733}
4734
4735static HChar *
4736s390_irgen_XRK(UChar r3, UChar r1, UChar r2)
4737{
4738 IRTemp op2 = newTemp(Ity_I32);
4739 IRTemp op3 = newTemp(Ity_I32);
4740 IRTemp result = newTemp(Ity_I32);
4741
4742 assign(op2, get_gpr_w1(r2));
4743 assign(op3, get_gpr_w1(r3));
4744 assign(result, binop(Iop_Xor32, mkexpr(op2), mkexpr(op3)));
4745 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
4746 put_gpr_w1(r1, mkexpr(result));
4747
4748 return "xrk";
4749}
4750
4751static HChar *
4752s390_irgen_XGRK(UChar r3, UChar r1, UChar r2)
4753{
4754 IRTemp op2 = newTemp(Ity_I64);
4755 IRTemp op3 = newTemp(Ity_I64);
4756 IRTemp result = newTemp(Ity_I64);
4757
4758 assign(op2, get_gpr_dw0(r2));
4759 assign(op3, get_gpr_dw0(r3));
4760 assign(result, binop(Iop_Xor64, mkexpr(op2), mkexpr(op3)));
4761 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
4762 put_gpr_dw0(r1, mkexpr(result));
4763
4764 return "xgrk";
4765}
4766
4767static HChar *
4768s390_irgen_X(UChar r1, IRTemp op2addr)
4769{
4770 IRTemp op1 = newTemp(Ity_I32);
4771 IRTemp op2 = newTemp(Ity_I32);
4772 IRTemp result = newTemp(Ity_I32);
4773
4774 assign(op1, get_gpr_w1(r1));
4775 assign(op2, load(Ity_I32, mkexpr(op2addr)));
4776 assign(result, binop(Iop_Xor32, mkexpr(op1), mkexpr(op2)));
4777 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
4778 put_gpr_w1(r1, mkexpr(result));
4779
4780 return "x";
4781}
4782
4783static HChar *
4784s390_irgen_XY(UChar r1, IRTemp op2addr)
4785{
4786 IRTemp op1 = newTemp(Ity_I32);
4787 IRTemp op2 = newTemp(Ity_I32);
4788 IRTemp result = newTemp(Ity_I32);
4789
4790 assign(op1, get_gpr_w1(r1));
4791 assign(op2, load(Ity_I32, mkexpr(op2addr)));
4792 assign(result, binop(Iop_Xor32, mkexpr(op1), mkexpr(op2)));
4793 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
4794 put_gpr_w1(r1, mkexpr(result));
4795
4796 return "xy";
4797}
4798
4799static HChar *
4800s390_irgen_XG(UChar r1, IRTemp op2addr)
4801{
4802 IRTemp op1 = newTemp(Ity_I64);
4803 IRTemp op2 = newTemp(Ity_I64);
4804 IRTemp result = newTemp(Ity_I64);
4805
4806 assign(op1, get_gpr_dw0(r1));
4807 assign(op2, load(Ity_I64, mkexpr(op2addr)));
4808 assign(result, binop(Iop_Xor64, mkexpr(op1), mkexpr(op2)));
4809 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
4810 put_gpr_dw0(r1, mkexpr(result));
4811
4812 return "xg";
4813}
4814
4815static HChar *
4816s390_irgen_XI(UChar i2, IRTemp op1addr)
4817{
4818 IRTemp op1 = newTemp(Ity_I8);
4819 UChar op2;
4820 IRTemp result = newTemp(Ity_I8);
4821
4822 assign(op1, load(Ity_I8, mkexpr(op1addr)));
4823 op2 = i2;
4824 assign(result, binop(Iop_Xor8, mkexpr(op1), mkU8(op2)));
4825 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
4826 store(mkexpr(op1addr), mkexpr(result));
4827
4828 return "xi";
4829}
4830
4831static HChar *
4832s390_irgen_XIY(UChar i2, IRTemp op1addr)
4833{
4834 IRTemp op1 = newTemp(Ity_I8);
4835 UChar op2;
4836 IRTemp result = newTemp(Ity_I8);
4837
4838 assign(op1, load(Ity_I8, mkexpr(op1addr)));
4839 op2 = i2;
4840 assign(result, binop(Iop_Xor8, mkexpr(op1), mkU8(op2)));
4841 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
4842 store(mkexpr(op1addr), mkexpr(result));
4843
4844 return "xiy";
4845}
4846
4847static HChar *
4848s390_irgen_XIHF(UChar r1, UInt i2)
4849{
4850 IRTemp op1 = newTemp(Ity_I32);
4851 UInt op2;
4852 IRTemp result = newTemp(Ity_I32);
4853
4854 assign(op1, get_gpr_w0(r1));
4855 op2 = i2;
4856 assign(result, binop(Iop_Xor32, mkexpr(op1), mkU32(op2)));
4857 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
4858 put_gpr_w0(r1, mkexpr(result));
4859
4860 return "xihf";
4861}
4862
4863static HChar *
4864s390_irgen_XILF(UChar r1, UInt i2)
4865{
4866 IRTemp op1 = newTemp(Ity_I32);
4867 UInt op2;
4868 IRTemp result = newTemp(Ity_I32);
4869
4870 assign(op1, get_gpr_w1(r1));
4871 op2 = i2;
4872 assign(result, binop(Iop_Xor32, mkexpr(op1), mkU32(op2)));
4873 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
4874 put_gpr_w1(r1, mkexpr(result));
4875
4876 return "xilf";
4877}
4878
4879static HChar *
4880s390_irgen_EAR(UChar r1, UChar r2)
4881{
4882 put_gpr_w1(r1, get_ar_w0(r2));
sewardj7ee97522011-05-09 21:45:04 +00004883 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00004884 s390_disasm(ENC3(MNM, GPR, AR), "ear", r1, r2);
4885
4886 return "ear";
4887}
4888
4889static HChar *
4890s390_irgen_IC(UChar r1, IRTemp op2addr)
4891{
4892 put_gpr_b7(r1, load(Ity_I8, mkexpr(op2addr)));
4893
4894 return "ic";
4895}
4896
4897static HChar *
4898s390_irgen_ICY(UChar r1, IRTemp op2addr)
4899{
4900 put_gpr_b7(r1, load(Ity_I8, mkexpr(op2addr)));
4901
4902 return "icy";
4903}
4904
4905static HChar *
4906s390_irgen_ICM(UChar r1, UChar r3, IRTemp op2addr)
4907{
4908 UChar n;
4909 IRTemp result = newTemp(Ity_I32);
4910 UInt mask;
4911
4912 n = 0;
4913 mask = (UInt)r3;
4914 if ((mask & 8) != 0) {
4915 put_gpr_b4(r1, load(Ity_I8, mkexpr(op2addr)));
4916 n = n + 1;
4917 }
4918 if ((mask & 4) != 0) {
4919 put_gpr_b5(r1, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr), mkU64(n))));
4920
4921 n = n + 1;
4922 }
4923 if ((mask & 2) != 0) {
4924 put_gpr_b6(r1, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr), mkU64(n))));
4925
4926 n = n + 1;
4927 }
4928 if ((mask & 1) != 0) {
4929 put_gpr_b7(r1, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr), mkU64(n))));
4930
4931 n = n + 1;
4932 }
4933 assign(result, get_gpr_w1(r1));
4934 s390_cc_thunk_putZZ(S390_CC_OP_INSERT_CHAR_MASK_32, result, mktemp(Ity_I32,
4935 mkU32(mask)));
4936
4937 return "icm";
4938}
4939
4940static HChar *
4941s390_irgen_ICMY(UChar r1, UChar r3, IRTemp op2addr)
4942{
4943 UChar n;
4944 IRTemp result = newTemp(Ity_I32);
4945 UInt mask;
4946
4947 n = 0;
4948 mask = (UInt)r3;
4949 if ((mask & 8) != 0) {
4950 put_gpr_b4(r1, load(Ity_I8, mkexpr(op2addr)));
4951 n = n + 1;
4952 }
4953 if ((mask & 4) != 0) {
4954 put_gpr_b5(r1, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr), mkU64(n))));
4955
4956 n = n + 1;
4957 }
4958 if ((mask & 2) != 0) {
4959 put_gpr_b6(r1, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr), mkU64(n))));
4960
4961 n = n + 1;
4962 }
4963 if ((mask & 1) != 0) {
4964 put_gpr_b7(r1, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr), mkU64(n))));
4965
4966 n = n + 1;
4967 }
4968 assign(result, get_gpr_w1(r1));
4969 s390_cc_thunk_putZZ(S390_CC_OP_INSERT_CHAR_MASK_32, result, mktemp(Ity_I32,
4970 mkU32(mask)));
4971
4972 return "icmy";
4973}
4974
4975static HChar *
4976s390_irgen_ICMH(UChar r1, UChar r3, IRTemp op2addr)
4977{
4978 UChar n;
4979 IRTemp result = newTemp(Ity_I32);
4980 UInt mask;
4981
4982 n = 0;
4983 mask = (UInt)r3;
4984 if ((mask & 8) != 0) {
4985 put_gpr_b0(r1, load(Ity_I8, mkexpr(op2addr)));
4986 n = n + 1;
4987 }
4988 if ((mask & 4) != 0) {
4989 put_gpr_b1(r1, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr), mkU64(n))));
4990
4991 n = n + 1;
4992 }
4993 if ((mask & 2) != 0) {
4994 put_gpr_b2(r1, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr), mkU64(n))));
4995
4996 n = n + 1;
4997 }
4998 if ((mask & 1) != 0) {
4999 put_gpr_b3(r1, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr), mkU64(n))));
5000
5001 n = n + 1;
5002 }
5003 assign(result, get_gpr_w0(r1));
5004 s390_cc_thunk_putZZ(S390_CC_OP_INSERT_CHAR_MASK_32, result, mktemp(Ity_I32,
5005 mkU32(mask)));
5006
5007 return "icmh";
5008}
5009
5010static HChar *
5011s390_irgen_IIHF(UChar r1, UInt i2)
5012{
5013 put_gpr_w0(r1, mkU32(i2));
5014
5015 return "iihf";
5016}
5017
5018static HChar *
5019s390_irgen_IIHH(UChar r1, UShort i2)
5020{
5021 put_gpr_hw0(r1, mkU16(i2));
5022
5023 return "iihh";
5024}
5025
5026static HChar *
5027s390_irgen_IIHL(UChar r1, UShort i2)
5028{
5029 put_gpr_hw1(r1, mkU16(i2));
5030
5031 return "iihl";
5032}
5033
5034static HChar *
5035s390_irgen_IILF(UChar r1, UInt i2)
5036{
5037 put_gpr_w1(r1, mkU32(i2));
5038
5039 return "iilf";
5040}
5041
5042static HChar *
5043s390_irgen_IILH(UChar r1, UShort i2)
5044{
5045 put_gpr_hw2(r1, mkU16(i2));
5046
5047 return "iilh";
5048}
5049
5050static HChar *
5051s390_irgen_IILL(UChar r1, UShort i2)
5052{
5053 put_gpr_hw3(r1, mkU16(i2));
5054
5055 return "iill";
5056}
5057
5058static HChar *
5059s390_irgen_LR(UChar r1, UChar r2)
5060{
5061 put_gpr_w1(r1, get_gpr_w1(r2));
5062
5063 return "lr";
5064}
5065
5066static HChar *
5067s390_irgen_LGR(UChar r1, UChar r2)
5068{
5069 put_gpr_dw0(r1, get_gpr_dw0(r2));
5070
5071 return "lgr";
5072}
5073
5074static HChar *
5075s390_irgen_LGFR(UChar r1, UChar r2)
5076{
5077 put_gpr_dw0(r1, unop(Iop_32Sto64, get_gpr_w1(r2)));
5078
5079 return "lgfr";
5080}
5081
5082static HChar *
5083s390_irgen_L(UChar r1, IRTemp op2addr)
5084{
5085 put_gpr_w1(r1, load(Ity_I32, mkexpr(op2addr)));
5086
5087 return "l";
5088}
5089
5090static HChar *
5091s390_irgen_LY(UChar r1, IRTemp op2addr)
5092{
5093 put_gpr_w1(r1, load(Ity_I32, mkexpr(op2addr)));
5094
5095 return "ly";
5096}
5097
5098static HChar *
5099s390_irgen_LG(UChar r1, IRTemp op2addr)
5100{
5101 put_gpr_dw0(r1, load(Ity_I64, mkexpr(op2addr)));
5102
5103 return "lg";
5104}
5105
5106static HChar *
5107s390_irgen_LGF(UChar r1, IRTemp op2addr)
5108{
5109 put_gpr_dw0(r1, unop(Iop_32Sto64, load(Ity_I32, mkexpr(op2addr))));
5110
5111 return "lgf";
5112}
5113
5114static HChar *
5115s390_irgen_LGFI(UChar r1, UInt i2)
5116{
5117 put_gpr_dw0(r1, mkU64((ULong)(Long)(Int)i2));
5118
5119 return "lgfi";
5120}
5121
5122static HChar *
5123s390_irgen_LRL(UChar r1, UInt i2)
5124{
5125 put_gpr_w1(r1, load(Ity_I32, mkU64(guest_IA_curr_instr + ((ULong)(Long)(Int)
5126 i2 << 1))));
5127
5128 return "lrl";
5129}
5130
5131static HChar *
5132s390_irgen_LGRL(UChar r1, UInt i2)
5133{
5134 put_gpr_dw0(r1, load(Ity_I64, mkU64(guest_IA_curr_instr + ((ULong)(Long)(Int)
5135 i2 << 1))));
5136
5137 return "lgrl";
5138}
5139
5140static HChar *
5141s390_irgen_LGFRL(UChar r1, UInt i2)
5142{
5143 put_gpr_dw0(r1, unop(Iop_32Sto64, load(Ity_I32, mkU64(guest_IA_curr_instr +
5144 ((ULong)(Long)(Int)i2 << 1)))));
5145
5146 return "lgfrl";
5147}
5148
5149static HChar *
5150s390_irgen_LA(UChar r1, IRTemp op2addr)
5151{
5152 put_gpr_dw0(r1, mkexpr(op2addr));
5153
5154 return "la";
5155}
5156
5157static HChar *
5158s390_irgen_LAY(UChar r1, IRTemp op2addr)
5159{
5160 put_gpr_dw0(r1, mkexpr(op2addr));
5161
5162 return "lay";
5163}
5164
5165static HChar *
5166s390_irgen_LAE(UChar r1, IRTemp op2addr)
5167{
5168 put_gpr_dw0(r1, mkexpr(op2addr));
5169
5170 return "lae";
5171}
5172
5173static HChar *
5174s390_irgen_LAEY(UChar r1, IRTemp op2addr)
5175{
5176 put_gpr_dw0(r1, mkexpr(op2addr));
5177
5178 return "laey";
5179}
5180
5181static HChar *
5182s390_irgen_LARL(UChar r1, UInt i2)
5183{
5184 put_gpr_dw0(r1, mkU64(guest_IA_curr_instr + ((ULong)(Long)(Int)i2 << 1)));
5185
5186 return "larl";
5187}
5188
5189static HChar *
5190s390_irgen_LAA(UChar r1, UChar r3, IRTemp op2addr)
5191{
5192 IRTemp op2 = newTemp(Ity_I32);
5193 IRTemp op3 = newTemp(Ity_I32);
5194 IRTemp result = newTemp(Ity_I32);
5195
5196 assign(op2, load(Ity_I32, mkexpr(op2addr)));
5197 assign(op3, get_gpr_w1(r3));
5198 assign(result, binop(Iop_Add32, mkexpr(op2), mkexpr(op3)));
5199 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_32, op2, op3);
5200 store(mkexpr(op2addr), mkexpr(result));
5201 put_gpr_w1(r1, mkexpr(op2));
5202
5203 return "laa";
5204}
5205
5206static HChar *
5207s390_irgen_LAAG(UChar r1, UChar r3, IRTemp op2addr)
5208{
5209 IRTemp op2 = newTemp(Ity_I64);
5210 IRTemp op3 = newTemp(Ity_I64);
5211 IRTemp result = newTemp(Ity_I64);
5212
5213 assign(op2, load(Ity_I64, mkexpr(op2addr)));
5214 assign(op3, get_gpr_dw0(r3));
5215 assign(result, binop(Iop_Add64, mkexpr(op2), mkexpr(op3)));
5216 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_64, op2, op3);
5217 store(mkexpr(op2addr), mkexpr(result));
5218 put_gpr_dw0(r1, mkexpr(op2));
5219
5220 return "laag";
5221}
5222
5223static HChar *
5224s390_irgen_LAAL(UChar r1, UChar r3, IRTemp op2addr)
5225{
5226 IRTemp op2 = newTemp(Ity_I32);
5227 IRTemp op3 = newTemp(Ity_I32);
5228 IRTemp result = newTemp(Ity_I32);
5229
5230 assign(op2, load(Ity_I32, mkexpr(op2addr)));
5231 assign(op3, get_gpr_w1(r3));
5232 assign(result, binop(Iop_Add32, mkexpr(op2), mkexpr(op3)));
5233 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_32, op2, op3);
5234 store(mkexpr(op2addr), mkexpr(result));
5235 put_gpr_w1(r1, mkexpr(op2));
5236
5237 return "laal";
5238}
5239
5240static HChar *
5241s390_irgen_LAALG(UChar r1, UChar r3, IRTemp op2addr)
5242{
5243 IRTemp op2 = newTemp(Ity_I64);
5244 IRTemp op3 = newTemp(Ity_I64);
5245 IRTemp result = newTemp(Ity_I64);
5246
5247 assign(op2, load(Ity_I64, mkexpr(op2addr)));
5248 assign(op3, get_gpr_dw0(r3));
5249 assign(result, binop(Iop_Add64, mkexpr(op2), mkexpr(op3)));
5250 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_64, op2, op3);
5251 store(mkexpr(op2addr), mkexpr(result));
5252 put_gpr_dw0(r1, mkexpr(op2));
5253
5254 return "laalg";
5255}
5256
5257static HChar *
5258s390_irgen_LAN(UChar r1, UChar r3, IRTemp op2addr)
5259{
5260 IRTemp op2 = newTemp(Ity_I32);
5261 IRTemp op3 = newTemp(Ity_I32);
5262 IRTemp result = newTemp(Ity_I32);
5263
5264 assign(op2, load(Ity_I32, mkexpr(op2addr)));
5265 assign(op3, get_gpr_w1(r3));
5266 assign(result, binop(Iop_And32, mkexpr(op2), mkexpr(op3)));
5267 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
5268 store(mkexpr(op2addr), mkexpr(result));
5269 put_gpr_w1(r1, mkexpr(op2));
5270
5271 return "lan";
5272}
5273
5274static HChar *
5275s390_irgen_LANG(UChar r1, UChar r3, IRTemp op2addr)
5276{
5277 IRTemp op2 = newTemp(Ity_I64);
5278 IRTemp op3 = newTemp(Ity_I64);
5279 IRTemp result = newTemp(Ity_I64);
5280
5281 assign(op2, load(Ity_I64, mkexpr(op2addr)));
5282 assign(op3, get_gpr_dw0(r3));
5283 assign(result, binop(Iop_And64, mkexpr(op2), mkexpr(op3)));
5284 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
5285 store(mkexpr(op2addr), mkexpr(result));
5286 put_gpr_dw0(r1, mkexpr(op2));
5287
5288 return "lang";
5289}
5290
5291static HChar *
5292s390_irgen_LAX(UChar r1, UChar r3, IRTemp op2addr)
5293{
5294 IRTemp op2 = newTemp(Ity_I32);
5295 IRTemp op3 = newTemp(Ity_I32);
5296 IRTemp result = newTemp(Ity_I32);
5297
5298 assign(op2, load(Ity_I32, mkexpr(op2addr)));
5299 assign(op3, get_gpr_w1(r3));
5300 assign(result, binop(Iop_Xor32, mkexpr(op2), mkexpr(op3)));
5301 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
5302 store(mkexpr(op2addr), mkexpr(result));
5303 put_gpr_w1(r1, mkexpr(op2));
5304
5305 return "lax";
5306}
5307
5308static HChar *
5309s390_irgen_LAXG(UChar r1, UChar r3, IRTemp op2addr)
5310{
5311 IRTemp op2 = newTemp(Ity_I64);
5312 IRTemp op3 = newTemp(Ity_I64);
5313 IRTemp result = newTemp(Ity_I64);
5314
5315 assign(op2, load(Ity_I64, mkexpr(op2addr)));
5316 assign(op3, get_gpr_dw0(r3));
5317 assign(result, binop(Iop_Xor64, mkexpr(op2), mkexpr(op3)));
5318 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
5319 store(mkexpr(op2addr), mkexpr(result));
5320 put_gpr_dw0(r1, mkexpr(op2));
5321
5322 return "laxg";
5323}
5324
5325static HChar *
5326s390_irgen_LAO(UChar r1, UChar r3, IRTemp op2addr)
5327{
5328 IRTemp op2 = newTemp(Ity_I32);
5329 IRTemp op3 = newTemp(Ity_I32);
5330 IRTemp result = newTemp(Ity_I32);
5331
5332 assign(op2, load(Ity_I32, mkexpr(op2addr)));
5333 assign(op3, get_gpr_w1(r3));
5334 assign(result, binop(Iop_Or32, mkexpr(op2), mkexpr(op3)));
5335 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
5336 store(mkexpr(op2addr), mkexpr(result));
5337 put_gpr_w1(r1, mkexpr(op2));
5338
5339 return "lao";
5340}
5341
5342static HChar *
5343s390_irgen_LAOG(UChar r1, UChar r3, IRTemp op2addr)
5344{
5345 IRTemp op2 = newTemp(Ity_I64);
5346 IRTemp op3 = newTemp(Ity_I64);
5347 IRTemp result = newTemp(Ity_I64);
5348
5349 assign(op2, load(Ity_I64, mkexpr(op2addr)));
5350 assign(op3, get_gpr_dw0(r3));
5351 assign(result, binop(Iop_Or64, mkexpr(op2), mkexpr(op3)));
5352 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
5353 store(mkexpr(op2addr), mkexpr(result));
5354 put_gpr_dw0(r1, mkexpr(op2));
5355
5356 return "laog";
5357}
5358
5359static HChar *
5360s390_irgen_LTR(UChar r1, UChar r2)
5361{
5362 IRTemp op2 = newTemp(Ity_I32);
5363
5364 assign(op2, get_gpr_w1(r2));
5365 put_gpr_w1(r1, mkexpr(op2));
5366 s390_cc_thunk_putS(S390_CC_OP_LOAD_AND_TEST, op2);
5367
5368 return "ltr";
5369}
5370
5371static HChar *
5372s390_irgen_LTGR(UChar r1, UChar r2)
5373{
5374 IRTemp op2 = newTemp(Ity_I64);
5375
5376 assign(op2, get_gpr_dw0(r2));
5377 put_gpr_dw0(r1, mkexpr(op2));
5378 s390_cc_thunk_putS(S390_CC_OP_LOAD_AND_TEST, op2);
5379
5380 return "ltgr";
5381}
5382
5383static HChar *
5384s390_irgen_LTGFR(UChar r1, UChar r2)
5385{
5386 IRTemp op2 = newTemp(Ity_I64);
5387
5388 assign(op2, unop(Iop_32Sto64, get_gpr_w1(r2)));
5389 put_gpr_dw0(r1, mkexpr(op2));
5390 s390_cc_thunk_putS(S390_CC_OP_LOAD_AND_TEST, op2);
5391
5392 return "ltgfr";
5393}
5394
5395static HChar *
5396s390_irgen_LT(UChar r1, IRTemp op2addr)
5397{
5398 IRTemp op2 = newTemp(Ity_I32);
5399
5400 assign(op2, load(Ity_I32, mkexpr(op2addr)));
5401 put_gpr_w1(r1, mkexpr(op2));
5402 s390_cc_thunk_putS(S390_CC_OP_LOAD_AND_TEST, op2);
5403
5404 return "lt";
5405}
5406
5407static HChar *
5408s390_irgen_LTG(UChar r1, IRTemp op2addr)
5409{
5410 IRTemp op2 = newTemp(Ity_I64);
5411
5412 assign(op2, load(Ity_I64, mkexpr(op2addr)));
5413 put_gpr_dw0(r1, mkexpr(op2));
5414 s390_cc_thunk_putS(S390_CC_OP_LOAD_AND_TEST, op2);
5415
5416 return "ltg";
5417}
5418
5419static HChar *
5420s390_irgen_LTGF(UChar r1, IRTemp op2addr)
5421{
5422 IRTemp op2 = newTemp(Ity_I64);
5423
5424 assign(op2, unop(Iop_32Sto64, load(Ity_I32, mkexpr(op2addr))));
5425 put_gpr_dw0(r1, mkexpr(op2));
5426 s390_cc_thunk_putS(S390_CC_OP_LOAD_AND_TEST, op2);
5427
5428 return "ltgf";
5429}
5430
5431static HChar *
5432s390_irgen_LBR(UChar r1, UChar r2)
5433{
5434 put_gpr_w1(r1, unop(Iop_8Sto32, get_gpr_b7(r2)));
5435
5436 return "lbr";
5437}
5438
5439static HChar *
5440s390_irgen_LGBR(UChar r1, UChar r2)
5441{
5442 put_gpr_dw0(r1, unop(Iop_8Sto64, get_gpr_b7(r2)));
5443
5444 return "lgbr";
5445}
5446
5447static HChar *
5448s390_irgen_LB(UChar r1, IRTemp op2addr)
5449{
5450 put_gpr_w1(r1, unop(Iop_8Sto32, load(Ity_I8, mkexpr(op2addr))));
5451
5452 return "lb";
5453}
5454
5455static HChar *
5456s390_irgen_LGB(UChar r1, IRTemp op2addr)
5457{
5458 put_gpr_dw0(r1, unop(Iop_8Sto64, load(Ity_I8, mkexpr(op2addr))));
5459
5460 return "lgb";
5461}
5462
5463static HChar *
5464s390_irgen_LBH(UChar r1, IRTemp op2addr)
5465{
5466 put_gpr_w0(r1, unop(Iop_8Sto32, load(Ity_I8, mkexpr(op2addr))));
5467
5468 return "lbh";
5469}
5470
5471static HChar *
5472s390_irgen_LCR(UChar r1, UChar r2)
5473{
5474 Int op1;
5475 IRTemp op2 = newTemp(Ity_I32);
5476 IRTemp result = newTemp(Ity_I32);
5477
5478 op1 = 0;
5479 assign(op2, get_gpr_w1(r2));
5480 assign(result, binop(Iop_Sub32, mkU32((UInt)op1), mkexpr(op2)));
5481 put_gpr_w1(r1, mkexpr(result));
5482 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_32, mktemp(Ity_I32, mkU32((UInt)
5483 op1)), op2);
5484
5485 return "lcr";
5486}
5487
5488static HChar *
5489s390_irgen_LCGR(UChar r1, UChar r2)
5490{
5491 Long op1;
5492 IRTemp op2 = newTemp(Ity_I64);
5493 IRTemp result = newTemp(Ity_I64);
5494
5495 op1 = 0ULL;
5496 assign(op2, get_gpr_dw0(r2));
5497 assign(result, binop(Iop_Sub64, mkU64((ULong)op1), mkexpr(op2)));
5498 put_gpr_dw0(r1, mkexpr(result));
5499 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_64, mktemp(Ity_I64, mkU64((ULong)
5500 op1)), op2);
5501
5502 return "lcgr";
5503}
5504
5505static HChar *
5506s390_irgen_LCGFR(UChar r1, UChar r2)
5507{
5508 Long op1;
5509 IRTemp op2 = newTemp(Ity_I64);
5510 IRTemp result = newTemp(Ity_I64);
5511
5512 op1 = 0ULL;
5513 assign(op2, unop(Iop_32Sto64, get_gpr_w1(r2)));
5514 assign(result, binop(Iop_Sub64, mkU64((ULong)op1), mkexpr(op2)));
5515 put_gpr_dw0(r1, mkexpr(result));
5516 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_64, mktemp(Ity_I64, mkU64((ULong)
5517 op1)), op2);
5518
5519 return "lcgfr";
5520}
5521
5522static HChar *
5523s390_irgen_LHR(UChar r1, UChar r2)
5524{
5525 put_gpr_w1(r1, unop(Iop_16Sto32, get_gpr_hw3(r2)));
5526
5527 return "lhr";
5528}
5529
5530static HChar *
5531s390_irgen_LGHR(UChar r1, UChar r2)
5532{
5533 put_gpr_dw0(r1, unop(Iop_16Sto64, get_gpr_hw3(r2)));
5534
5535 return "lghr";
5536}
5537
5538static HChar *
5539s390_irgen_LH(UChar r1, IRTemp op2addr)
5540{
5541 put_gpr_w1(r1, unop(Iop_16Sto32, load(Ity_I16, mkexpr(op2addr))));
5542
5543 return "lh";
5544}
5545
5546static HChar *
5547s390_irgen_LHY(UChar r1, IRTemp op2addr)
5548{
5549 put_gpr_w1(r1, unop(Iop_16Sto32, load(Ity_I16, mkexpr(op2addr))));
5550
5551 return "lhy";
5552}
5553
5554static HChar *
5555s390_irgen_LGH(UChar r1, IRTemp op2addr)
5556{
5557 put_gpr_dw0(r1, unop(Iop_16Sto64, load(Ity_I16, mkexpr(op2addr))));
5558
5559 return "lgh";
5560}
5561
5562static HChar *
5563s390_irgen_LHI(UChar r1, UShort i2)
5564{
5565 put_gpr_w1(r1, mkU32((UInt)(Int)(Short)i2));
5566
5567 return "lhi";
5568}
5569
5570static HChar *
5571s390_irgen_LGHI(UChar r1, UShort i2)
5572{
5573 put_gpr_dw0(r1, mkU64((ULong)(Long)(Short)i2));
5574
5575 return "lghi";
5576}
5577
5578static HChar *
5579s390_irgen_LHRL(UChar r1, UInt i2)
5580{
5581 put_gpr_w1(r1, unop(Iop_16Sto32, load(Ity_I16, mkU64(guest_IA_curr_instr +
5582 ((ULong)(Long)(Int)i2 << 1)))));
5583
5584 return "lhrl";
5585}
5586
5587static HChar *
5588s390_irgen_LGHRL(UChar r1, UInt i2)
5589{
5590 put_gpr_dw0(r1, unop(Iop_16Sto64, load(Ity_I16, mkU64(guest_IA_curr_instr +
5591 ((ULong)(Long)(Int)i2 << 1)))));
5592
5593 return "lghrl";
5594}
5595
5596static HChar *
5597s390_irgen_LHH(UChar r1, IRTemp op2addr)
5598{
5599 put_gpr_w0(r1, unop(Iop_16Sto32, load(Ity_I16, mkexpr(op2addr))));
5600
5601 return "lhh";
5602}
5603
5604static HChar *
5605s390_irgen_LFH(UChar r1, IRTemp op2addr)
5606{
5607 put_gpr_w0(r1, load(Ity_I32, mkexpr(op2addr)));
5608
5609 return "lfh";
5610}
5611
5612static HChar *
5613s390_irgen_LLGFR(UChar r1, UChar r2)
5614{
5615 put_gpr_dw0(r1, unop(Iop_32Uto64, get_gpr_w1(r2)));
5616
5617 return "llgfr";
5618}
5619
5620static HChar *
5621s390_irgen_LLGF(UChar r1, IRTemp op2addr)
5622{
5623 put_gpr_dw0(r1, unop(Iop_32Uto64, load(Ity_I32, mkexpr(op2addr))));
5624
5625 return "llgf";
5626}
5627
5628static HChar *
5629s390_irgen_LLGFRL(UChar r1, UInt i2)
5630{
5631 put_gpr_dw0(r1, unop(Iop_32Uto64, load(Ity_I32, mkU64(guest_IA_curr_instr +
5632 ((ULong)(Long)(Int)i2 << 1)))));
5633
5634 return "llgfrl";
5635}
5636
5637static HChar *
5638s390_irgen_LLCR(UChar r1, UChar r2)
5639{
5640 put_gpr_w1(r1, unop(Iop_8Uto32, get_gpr_b7(r2)));
5641
5642 return "llcr";
5643}
5644
5645static HChar *
5646s390_irgen_LLGCR(UChar r1, UChar r2)
5647{
5648 put_gpr_dw0(r1, unop(Iop_8Uto64, get_gpr_b7(r2)));
5649
5650 return "llgcr";
5651}
5652
5653static HChar *
5654s390_irgen_LLC(UChar r1, IRTemp op2addr)
5655{
5656 put_gpr_w1(r1, unop(Iop_8Uto32, load(Ity_I8, mkexpr(op2addr))));
5657
5658 return "llc";
5659}
5660
5661static HChar *
5662s390_irgen_LLGC(UChar r1, IRTemp op2addr)
5663{
5664 put_gpr_dw0(r1, unop(Iop_8Uto64, load(Ity_I8, mkexpr(op2addr))));
5665
5666 return "llgc";
5667}
5668
5669static HChar *
5670s390_irgen_LLCH(UChar r1, IRTemp op2addr)
5671{
5672 put_gpr_w0(r1, unop(Iop_8Uto32, load(Ity_I8, mkexpr(op2addr))));
5673
5674 return "llch";
5675}
5676
5677static HChar *
5678s390_irgen_LLHR(UChar r1, UChar r2)
5679{
5680 put_gpr_w1(r1, unop(Iop_16Uto32, get_gpr_hw3(r2)));
5681
5682 return "llhr";
5683}
5684
5685static HChar *
5686s390_irgen_LLGHR(UChar r1, UChar r2)
5687{
5688 put_gpr_dw0(r1, unop(Iop_16Uto64, get_gpr_hw3(r2)));
5689
5690 return "llghr";
5691}
5692
5693static HChar *
5694s390_irgen_LLH(UChar r1, IRTemp op2addr)
5695{
5696 put_gpr_w1(r1, unop(Iop_16Uto32, load(Ity_I16, mkexpr(op2addr))));
5697
5698 return "llh";
5699}
5700
5701static HChar *
5702s390_irgen_LLGH(UChar r1, IRTemp op2addr)
5703{
5704 put_gpr_dw0(r1, unop(Iop_16Uto64, load(Ity_I16, mkexpr(op2addr))));
5705
5706 return "llgh";
5707}
5708
5709static HChar *
5710s390_irgen_LLHRL(UChar r1, UInt i2)
5711{
5712 put_gpr_w1(r1, unop(Iop_16Uto32, load(Ity_I16, mkU64(guest_IA_curr_instr +
5713 ((ULong)(Long)(Int)i2 << 1)))));
5714
5715 return "llhrl";
5716}
5717
5718static HChar *
5719s390_irgen_LLGHRL(UChar r1, UInt i2)
5720{
5721 put_gpr_dw0(r1, unop(Iop_16Uto64, load(Ity_I16, mkU64(guest_IA_curr_instr +
5722 ((ULong)(Long)(Int)i2 << 1)))));
5723
5724 return "llghrl";
5725}
5726
5727static HChar *
5728s390_irgen_LLHH(UChar r1, IRTemp op2addr)
5729{
5730 put_gpr_w0(r1, unop(Iop_16Uto32, load(Ity_I16, mkexpr(op2addr))));
5731
5732 return "llhh";
5733}
5734
5735static HChar *
5736s390_irgen_LLIHF(UChar r1, UInt i2)
5737{
5738 put_gpr_dw0(r1, mkU64(((ULong)i2) << 32));
5739
5740 return "llihf";
5741}
5742
5743static HChar *
5744s390_irgen_LLIHH(UChar r1, UShort i2)
5745{
5746 put_gpr_dw0(r1, mkU64(((ULong)i2) << 48));
5747
5748 return "llihh";
5749}
5750
5751static HChar *
5752s390_irgen_LLIHL(UChar r1, UShort i2)
5753{
5754 put_gpr_dw0(r1, mkU64(((ULong)i2) << 32));
5755
5756 return "llihl";
5757}
5758
5759static HChar *
5760s390_irgen_LLILF(UChar r1, UInt i2)
5761{
5762 put_gpr_dw0(r1, mkU64(i2));
5763
5764 return "llilf";
5765}
5766
5767static HChar *
5768s390_irgen_LLILH(UChar r1, UShort i2)
5769{
5770 put_gpr_dw0(r1, mkU64(((ULong)i2) << 16));
5771
5772 return "llilh";
5773}
5774
5775static HChar *
5776s390_irgen_LLILL(UChar r1, UShort i2)
5777{
5778 put_gpr_dw0(r1, mkU64(i2));
5779
5780 return "llill";
5781}
5782
5783static HChar *
5784s390_irgen_LLGTR(UChar r1, UChar r2)
5785{
5786 put_gpr_dw0(r1, unop(Iop_32Uto64, binop(Iop_And32, get_gpr_w1(r2),
5787 mkU32(2147483647))));
5788
5789 return "llgtr";
5790}
5791
5792static HChar *
5793s390_irgen_LLGT(UChar r1, IRTemp op2addr)
5794{
5795 put_gpr_dw0(r1, unop(Iop_32Uto64, binop(Iop_And32, load(Ity_I32,
5796 mkexpr(op2addr)), mkU32(2147483647))));
5797
5798 return "llgt";
5799}
5800
5801static HChar *
5802s390_irgen_LNR(UChar r1, UChar r2)
5803{
5804 IRTemp op2 = newTemp(Ity_I32);
5805 IRTemp result = newTemp(Ity_I32);
5806
5807 assign(op2, get_gpr_w1(r2));
5808 assign(result, mkite(binop(Iop_CmpLE32S, mkexpr(op2), mkU32(0)), mkexpr(op2),
5809 binop(Iop_Sub32, mkU32(0), mkexpr(op2))));
5810 put_gpr_w1(r1, mkexpr(result));
5811 s390_cc_thunk_putS(S390_CC_OP_BITWISE, result);
5812
5813 return "lnr";
5814}
5815
5816static HChar *
5817s390_irgen_LNGR(UChar r1, UChar r2)
5818{
5819 IRTemp op2 = newTemp(Ity_I64);
5820 IRTemp result = newTemp(Ity_I64);
5821
5822 assign(op2, get_gpr_dw0(r2));
5823 assign(result, mkite(binop(Iop_CmpLE64S, mkexpr(op2), mkU64(0)), mkexpr(op2),
5824 binop(Iop_Sub64, mkU64(0), mkexpr(op2))));
5825 put_gpr_dw0(r1, mkexpr(result));
5826 s390_cc_thunk_putS(S390_CC_OP_BITWISE, result);
5827
5828 return "lngr";
5829}
5830
5831static HChar *
5832s390_irgen_LNGFR(UChar r1, UChar r2 __attribute__((unused)))
5833{
5834 IRTemp op2 = newTemp(Ity_I64);
5835 IRTemp result = newTemp(Ity_I64);
5836
5837 assign(op2, unop(Iop_32Sto64, get_gpr_w1(r1)));
5838 assign(result, mkite(binop(Iop_CmpLE64S, mkexpr(op2), mkU64(0)), mkexpr(op2),
5839 binop(Iop_Sub64, mkU64(0), mkexpr(op2))));
5840 put_gpr_dw0(r1, mkexpr(result));
5841 s390_cc_thunk_putS(S390_CC_OP_BITWISE, result);
5842
5843 return "lngfr";
5844}
5845
5846static HChar *
sewardjd7bde722011-04-05 13:19:33 +00005847s390_irgen_LOCR(UChar m3, UChar r1, UChar r2)
5848{
5849 if_condition_goto(binop(Iop_CmpEQ32, s390_call_calculate_cond(m3), mkU32(0)),
5850 guest_IA_next_instr);
5851 put_gpr_w1(r1, get_gpr_w1(r2));
5852
5853 return "locr";
5854}
5855
5856static HChar *
5857s390_irgen_LOCGR(UChar m3, UChar r1, UChar r2)
5858{
5859 if_condition_goto(binop(Iop_CmpEQ32, s390_call_calculate_cond(m3), mkU32(0)),
5860 guest_IA_next_instr);
5861 put_gpr_dw0(r1, get_gpr_dw0(r2));
5862
5863 return "locgr";
5864}
5865
5866static HChar *
5867s390_irgen_LOC(UChar r1, IRTemp op2addr)
5868{
5869 /* condition is checked in format handler */
5870 put_gpr_w1(r1, load(Ity_I32, mkexpr(op2addr)));
5871
5872 return "loc";
5873}
5874
5875static HChar *
5876s390_irgen_LOCG(UChar r1, IRTemp op2addr)
5877{
5878 /* condition is checked in format handler */
5879 put_gpr_dw0(r1, load(Ity_I64, mkexpr(op2addr)));
5880
5881 return "locg";
5882}
5883
5884static HChar *
sewardj2019a972011-03-07 16:04:07 +00005885s390_irgen_LPQ(UChar r1, IRTemp op2addr)
5886{
5887 put_gpr_dw0(r1, load(Ity_I64, mkexpr(op2addr)));
5888 put_gpr_dw0(r1 + 1, load(Ity_I64, binop(Iop_Add64, mkexpr(op2addr), mkU64(8))
5889 ));
5890
5891 return "lpq";
5892}
5893
5894static HChar *
5895s390_irgen_LPR(UChar r1, UChar r2)
5896{
5897 IRTemp op2 = newTemp(Ity_I32);
5898 IRTemp result = newTemp(Ity_I32);
5899
5900 assign(op2, get_gpr_w1(r2));
5901 assign(result, mkite(binop(Iop_CmpLT32S, mkexpr(op2), mkU32(0)),
5902 binop(Iop_Sub32, mkU32(0), mkexpr(op2)), mkexpr(op2)));
5903 put_gpr_w1(r1, mkexpr(result));
5904 s390_cc_thunk_putS(S390_CC_OP_LOAD_POSITIVE_32, op2);
5905
5906 return "lpr";
5907}
5908
5909static HChar *
5910s390_irgen_LPGR(UChar r1, UChar r2)
5911{
5912 IRTemp op2 = newTemp(Ity_I64);
5913 IRTemp result = newTemp(Ity_I64);
5914
5915 assign(op2, get_gpr_dw0(r2));
5916 assign(result, mkite(binop(Iop_CmpLT64S, mkexpr(op2), mkU64(0)),
5917 binop(Iop_Sub64, mkU64(0), mkexpr(op2)), mkexpr(op2)));
5918 put_gpr_dw0(r1, mkexpr(result));
5919 s390_cc_thunk_putS(S390_CC_OP_LOAD_POSITIVE_64, op2);
5920
5921 return "lpgr";
5922}
5923
5924static HChar *
5925s390_irgen_LPGFR(UChar r1, UChar r2)
5926{
5927 IRTemp op2 = newTemp(Ity_I64);
5928 IRTemp result = newTemp(Ity_I64);
5929
5930 assign(op2, unop(Iop_32Sto64, get_gpr_w1(r2)));
5931 assign(result, mkite(binop(Iop_CmpLT64S, mkexpr(op2), mkU64(0)),
5932 binop(Iop_Sub64, mkU64(0), mkexpr(op2)), mkexpr(op2)));
5933 put_gpr_dw0(r1, mkexpr(result));
5934 s390_cc_thunk_putS(S390_CC_OP_LOAD_POSITIVE_64, op2);
5935
5936 return "lpgfr";
5937}
5938
5939static HChar *
5940s390_irgen_LRVR(UChar r1, UChar r2)
5941{
5942 IRTemp b0 = newTemp(Ity_I8);
5943 IRTemp b1 = newTemp(Ity_I8);
5944 IRTemp b2 = newTemp(Ity_I8);
5945 IRTemp b3 = newTemp(Ity_I8);
5946
5947 assign(b3, get_gpr_b7(r2));
5948 assign(b2, get_gpr_b6(r2));
5949 assign(b1, get_gpr_b5(r2));
5950 assign(b0, get_gpr_b4(r2));
5951 put_gpr_b4(r1, mkexpr(b3));
5952 put_gpr_b5(r1, mkexpr(b2));
5953 put_gpr_b6(r1, mkexpr(b1));
5954 put_gpr_b7(r1, mkexpr(b0));
5955
5956 return "lrvr";
5957}
5958
5959static HChar *
5960s390_irgen_LRVGR(UChar r1, UChar r2)
5961{
5962 IRTemp b0 = newTemp(Ity_I8);
5963 IRTemp b1 = newTemp(Ity_I8);
5964 IRTemp b2 = newTemp(Ity_I8);
5965 IRTemp b3 = newTemp(Ity_I8);
5966 IRTemp b4 = newTemp(Ity_I8);
5967 IRTemp b5 = newTemp(Ity_I8);
5968 IRTemp b6 = newTemp(Ity_I8);
5969 IRTemp b7 = newTemp(Ity_I8);
5970
5971 assign(b7, get_gpr_b7(r2));
5972 assign(b6, get_gpr_b6(r2));
5973 assign(b5, get_gpr_b5(r2));
5974 assign(b4, get_gpr_b4(r2));
5975 assign(b3, get_gpr_b3(r2));
5976 assign(b2, get_gpr_b2(r2));
5977 assign(b1, get_gpr_b1(r2));
5978 assign(b0, get_gpr_b0(r2));
5979 put_gpr_b0(r1, mkexpr(b7));
5980 put_gpr_b1(r1, mkexpr(b6));
5981 put_gpr_b2(r1, mkexpr(b5));
5982 put_gpr_b3(r1, mkexpr(b4));
5983 put_gpr_b4(r1, mkexpr(b3));
5984 put_gpr_b5(r1, mkexpr(b2));
5985 put_gpr_b6(r1, mkexpr(b1));
5986 put_gpr_b7(r1, mkexpr(b0));
5987
5988 return "lrvgr";
5989}
5990
5991static HChar *
5992s390_irgen_LRVH(UChar r1, IRTemp op2addr)
5993{
5994 IRTemp op2 = newTemp(Ity_I16);
5995
5996 assign(op2, load(Ity_I16, mkexpr(op2addr)));
5997 put_gpr_b6(r1, unop(Iop_16to8, mkexpr(op2)));
5998 put_gpr_b7(r1, unop(Iop_16HIto8, mkexpr(op2)));
5999
6000 return "lrvh";
6001}
6002
6003static HChar *
6004s390_irgen_LRV(UChar r1, IRTemp op2addr)
6005{
6006 IRTemp op2 = newTemp(Ity_I32);
6007
6008 assign(op2, load(Ity_I32, mkexpr(op2addr)));
6009 put_gpr_b4(r1, unop(Iop_32to8, binop(Iop_And32, mkexpr(op2), mkU32(255))));
6010 put_gpr_b5(r1, unop(Iop_32to8, binop(Iop_And32, binop(Iop_Shr32, mkexpr(op2),
6011 mkU8(8)), mkU32(255))));
6012 put_gpr_b6(r1, unop(Iop_32to8, binop(Iop_And32, binop(Iop_Shr32, mkexpr(op2),
6013 mkU8(16)), mkU32(255))));
6014 put_gpr_b7(r1, unop(Iop_32to8, binop(Iop_And32, binop(Iop_Shr32, mkexpr(op2),
6015 mkU8(24)), mkU32(255))));
6016
6017 return "lrv";
6018}
6019
6020static HChar *
6021s390_irgen_LRVG(UChar r1, IRTemp op2addr)
6022{
6023 IRTemp op2 = newTemp(Ity_I64);
6024
6025 assign(op2, load(Ity_I64, mkexpr(op2addr)));
6026 put_gpr_b0(r1, unop(Iop_64to8, binop(Iop_And64, mkexpr(op2), mkU64(255))));
6027 put_gpr_b1(r1, unop(Iop_64to8, binop(Iop_And64, binop(Iop_Shr64, mkexpr(op2),
6028 mkU8(8)), mkU64(255))));
6029 put_gpr_b2(r1, unop(Iop_64to8, binop(Iop_And64, binop(Iop_Shr64, mkexpr(op2),
6030 mkU8(16)), mkU64(255))));
6031 put_gpr_b3(r1, unop(Iop_64to8, binop(Iop_And64, binop(Iop_Shr64, mkexpr(op2),
6032 mkU8(24)), mkU64(255))));
6033 put_gpr_b4(r1, unop(Iop_64to8, binop(Iop_And64, binop(Iop_Shr64, mkexpr(op2),
6034 mkU8(32)), mkU64(255))));
6035 put_gpr_b5(r1, unop(Iop_64to8, binop(Iop_And64, binop(Iop_Shr64, mkexpr(op2),
6036 mkU8(40)), mkU64(255))));
6037 put_gpr_b6(r1, unop(Iop_64to8, binop(Iop_And64, binop(Iop_Shr64, mkexpr(op2),
6038 mkU8(48)), mkU64(255))));
6039 put_gpr_b7(r1, unop(Iop_64to8, binop(Iop_And64, binop(Iop_Shr64, mkexpr(op2),
6040 mkU8(56)), mkU64(255))));
6041
6042 return "lrvg";
6043}
6044
6045static HChar *
6046s390_irgen_MVHHI(UShort i2, IRTemp op1addr)
6047{
6048 store(mkexpr(op1addr), mkU16(i2));
6049
6050 return "mvhhi";
6051}
6052
6053static HChar *
6054s390_irgen_MVHI(UShort i2, IRTemp op1addr)
6055{
6056 store(mkexpr(op1addr), mkU32((UInt)(Int)(Short)i2));
6057
6058 return "mvhi";
6059}
6060
6061static HChar *
6062s390_irgen_MVGHI(UShort i2, IRTemp op1addr)
6063{
6064 store(mkexpr(op1addr), mkU64((ULong)(Long)(Short)i2));
6065
6066 return "mvghi";
6067}
6068
6069static HChar *
6070s390_irgen_MVI(UChar i2, IRTemp op1addr)
6071{
6072 store(mkexpr(op1addr), mkU8(i2));
6073
6074 return "mvi";
6075}
6076
6077static HChar *
6078s390_irgen_MVIY(UChar i2, IRTemp op1addr)
6079{
6080 store(mkexpr(op1addr), mkU8(i2));
6081
6082 return "mviy";
6083}
6084
6085static HChar *
6086s390_irgen_MR(UChar r1, UChar r2)
6087{
6088 IRTemp op1 = newTemp(Ity_I32);
6089 IRTemp op2 = newTemp(Ity_I32);
6090 IRTemp result = newTemp(Ity_I64);
6091
6092 assign(op1, get_gpr_w1(r1 + 1));
6093 assign(op2, get_gpr_w1(r2));
6094 assign(result, binop(Iop_MullS32, mkexpr(op1), mkexpr(op2)));
6095 put_gpr_w1(r1, unop(Iop_64HIto32, mkexpr(result)));
6096 put_gpr_w1(r1 + 1, unop(Iop_64to32, mkexpr(result)));
6097
6098 return "mr";
6099}
6100
6101static HChar *
6102s390_irgen_M(UChar r1, IRTemp op2addr)
6103{
6104 IRTemp op1 = newTemp(Ity_I32);
6105 IRTemp op2 = newTemp(Ity_I32);
6106 IRTemp result = newTemp(Ity_I64);
6107
6108 assign(op1, get_gpr_w1(r1 + 1));
6109 assign(op2, load(Ity_I32, mkexpr(op2addr)));
6110 assign(result, binop(Iop_MullS32, mkexpr(op1), mkexpr(op2)));
6111 put_gpr_w1(r1, unop(Iop_64HIto32, mkexpr(result)));
6112 put_gpr_w1(r1 + 1, unop(Iop_64to32, mkexpr(result)));
6113
6114 return "m";
6115}
6116
6117static HChar *
6118s390_irgen_MFY(UChar r1, IRTemp op2addr)
6119{
6120 IRTemp op1 = newTemp(Ity_I32);
6121 IRTemp op2 = newTemp(Ity_I32);
6122 IRTemp result = newTemp(Ity_I64);
6123
6124 assign(op1, get_gpr_w1(r1 + 1));
6125 assign(op2, load(Ity_I32, mkexpr(op2addr)));
6126 assign(result, binop(Iop_MullS32, mkexpr(op1), mkexpr(op2)));
6127 put_gpr_w1(r1, unop(Iop_64HIto32, mkexpr(result)));
6128 put_gpr_w1(r1 + 1, unop(Iop_64to32, mkexpr(result)));
6129
6130 return "mfy";
6131}
6132
6133static HChar *
6134s390_irgen_MH(UChar r1, IRTemp op2addr)
6135{
6136 IRTemp op1 = newTemp(Ity_I32);
6137 IRTemp op2 = newTemp(Ity_I16);
6138 IRTemp result = newTemp(Ity_I64);
6139
6140 assign(op1, get_gpr_w1(r1));
6141 assign(op2, load(Ity_I16, mkexpr(op2addr)));
6142 assign(result, binop(Iop_MullS32, mkexpr(op1), unop(Iop_16Sto32, mkexpr(op2))
6143 ));
6144 put_gpr_w1(r1, unop(Iop_64to32, mkexpr(result)));
6145
6146 return "mh";
6147}
6148
6149static HChar *
6150s390_irgen_MHY(UChar r1, IRTemp op2addr)
6151{
6152 IRTemp op1 = newTemp(Ity_I32);
6153 IRTemp op2 = newTemp(Ity_I16);
6154 IRTemp result = newTemp(Ity_I64);
6155
6156 assign(op1, get_gpr_w1(r1));
6157 assign(op2, load(Ity_I16, mkexpr(op2addr)));
6158 assign(result, binop(Iop_MullS32, mkexpr(op1), unop(Iop_16Sto32, mkexpr(op2))
6159 ));
6160 put_gpr_w1(r1, unop(Iop_64to32, mkexpr(result)));
6161
6162 return "mhy";
6163}
6164
6165static HChar *
6166s390_irgen_MHI(UChar r1, UShort i2)
6167{
6168 IRTemp op1 = newTemp(Ity_I32);
6169 Short op2;
6170 IRTemp result = newTemp(Ity_I64);
6171
6172 assign(op1, get_gpr_w1(r1));
6173 op2 = (Short)i2;
6174 assign(result, binop(Iop_MullS32, mkexpr(op1), unop(Iop_16Sto32,
6175 mkU16((UShort)op2))));
6176 put_gpr_w1(r1, unop(Iop_64to32, mkexpr(result)));
6177
6178 return "mhi";
6179}
6180
6181static HChar *
6182s390_irgen_MGHI(UChar r1, UShort i2)
6183{
6184 IRTemp op1 = newTemp(Ity_I64);
6185 Short op2;
6186 IRTemp result = newTemp(Ity_I128);
6187
6188 assign(op1, get_gpr_dw0(r1));
6189 op2 = (Short)i2;
6190 assign(result, binop(Iop_MullS64, mkexpr(op1), unop(Iop_16Sto64,
6191 mkU16((UShort)op2))));
6192 put_gpr_dw0(r1, unop(Iop_128to64, mkexpr(result)));
6193
6194 return "mghi";
6195}
6196
6197static HChar *
6198s390_irgen_MLR(UChar r1, UChar r2)
6199{
6200 IRTemp op1 = newTemp(Ity_I32);
6201 IRTemp op2 = newTemp(Ity_I32);
6202 IRTemp result = newTemp(Ity_I64);
6203
6204 assign(op1, get_gpr_w1(r1 + 1));
6205 assign(op2, get_gpr_w1(r2));
6206 assign(result, binop(Iop_MullU32, mkexpr(op1), mkexpr(op2)));
6207 put_gpr_w1(r1, unop(Iop_64HIto32, mkexpr(result)));
6208 put_gpr_w1(r1 + 1, unop(Iop_64to32, mkexpr(result)));
6209
6210 return "mlr";
6211}
6212
6213static HChar *
6214s390_irgen_MLGR(UChar r1, UChar r2)
6215{
6216 IRTemp op1 = newTemp(Ity_I64);
6217 IRTemp op2 = newTemp(Ity_I64);
6218 IRTemp result = newTemp(Ity_I128);
6219
6220 assign(op1, get_gpr_dw0(r1 + 1));
6221 assign(op2, get_gpr_dw0(r2));
6222 assign(result, binop(Iop_MullU64, mkexpr(op1), mkexpr(op2)));
6223 put_gpr_dw0(r1, unop(Iop_128HIto64, mkexpr(result)));
6224 put_gpr_dw0(r1 + 1, unop(Iop_128to64, mkexpr(result)));
6225
6226 return "mlgr";
6227}
6228
6229static HChar *
6230s390_irgen_ML(UChar r1, IRTemp op2addr)
6231{
6232 IRTemp op1 = newTemp(Ity_I32);
6233 IRTemp op2 = newTemp(Ity_I32);
6234 IRTemp result = newTemp(Ity_I64);
6235
6236 assign(op1, get_gpr_w1(r1 + 1));
6237 assign(op2, load(Ity_I32, mkexpr(op2addr)));
6238 assign(result, binop(Iop_MullU32, mkexpr(op1), mkexpr(op2)));
6239 put_gpr_w1(r1, unop(Iop_64HIto32, mkexpr(result)));
6240 put_gpr_w1(r1 + 1, unop(Iop_64to32, mkexpr(result)));
6241
6242 return "ml";
6243}
6244
6245static HChar *
6246s390_irgen_MLG(UChar r1, IRTemp op2addr)
6247{
6248 IRTemp op1 = newTemp(Ity_I64);
6249 IRTemp op2 = newTemp(Ity_I64);
6250 IRTemp result = newTemp(Ity_I128);
6251
6252 assign(op1, get_gpr_dw0(r1 + 1));
6253 assign(op2, load(Ity_I64, mkexpr(op2addr)));
6254 assign(result, binop(Iop_MullU64, mkexpr(op1), mkexpr(op2)));
6255 put_gpr_dw0(r1, unop(Iop_128HIto64, mkexpr(result)));
6256 put_gpr_dw0(r1 + 1, unop(Iop_128to64, mkexpr(result)));
6257
6258 return "mlg";
6259}
6260
6261static HChar *
6262s390_irgen_MSR(UChar r1, UChar r2)
6263{
6264 IRTemp op1 = newTemp(Ity_I32);
6265 IRTemp op2 = newTemp(Ity_I32);
6266 IRTemp result = newTemp(Ity_I64);
6267
6268 assign(op1, get_gpr_w1(r1));
6269 assign(op2, get_gpr_w1(r2));
6270 assign(result, binop(Iop_MullS32, mkexpr(op1), mkexpr(op2)));
6271 put_gpr_w1(r1, unop(Iop_64to32, mkexpr(result)));
6272
6273 return "msr";
6274}
6275
6276static HChar *
6277s390_irgen_MSGR(UChar r1, UChar r2)
6278{
6279 IRTemp op1 = newTemp(Ity_I64);
6280 IRTemp op2 = newTemp(Ity_I64);
6281 IRTemp result = newTemp(Ity_I128);
6282
6283 assign(op1, get_gpr_dw0(r1));
6284 assign(op2, get_gpr_dw0(r2));
6285 assign(result, binop(Iop_MullS64, mkexpr(op1), mkexpr(op2)));
6286 put_gpr_dw0(r1, unop(Iop_128to64, mkexpr(result)));
6287
6288 return "msgr";
6289}
6290
6291static HChar *
6292s390_irgen_MSGFR(UChar r1, UChar r2)
6293{
6294 IRTemp op1 = newTemp(Ity_I64);
6295 IRTemp op2 = newTemp(Ity_I32);
6296 IRTemp result = newTemp(Ity_I128);
6297
6298 assign(op1, get_gpr_dw0(r1));
6299 assign(op2, get_gpr_w1(r2));
6300 assign(result, binop(Iop_MullS64, mkexpr(op1), unop(Iop_32Sto64, mkexpr(op2))
6301 ));
6302 put_gpr_dw0(r1, unop(Iop_128to64, mkexpr(result)));
6303
6304 return "msgfr";
6305}
6306
6307static HChar *
6308s390_irgen_MS(UChar r1, IRTemp op2addr)
6309{
6310 IRTemp op1 = newTemp(Ity_I32);
6311 IRTemp op2 = newTemp(Ity_I32);
6312 IRTemp result = newTemp(Ity_I64);
6313
6314 assign(op1, get_gpr_w1(r1));
6315 assign(op2, load(Ity_I32, mkexpr(op2addr)));
6316 assign(result, binop(Iop_MullS32, mkexpr(op1), mkexpr(op2)));
6317 put_gpr_w1(r1, unop(Iop_64to32, mkexpr(result)));
6318
6319 return "ms";
6320}
6321
6322static HChar *
6323s390_irgen_MSY(UChar r1, IRTemp op2addr)
6324{
6325 IRTemp op1 = newTemp(Ity_I32);
6326 IRTemp op2 = newTemp(Ity_I32);
6327 IRTemp result = newTemp(Ity_I64);
6328
6329 assign(op1, get_gpr_w1(r1));
6330 assign(op2, load(Ity_I32, mkexpr(op2addr)));
6331 assign(result, binop(Iop_MullS32, mkexpr(op1), mkexpr(op2)));
6332 put_gpr_w1(r1, unop(Iop_64to32, mkexpr(result)));
6333
6334 return "msy";
6335}
6336
6337static HChar *
6338s390_irgen_MSG(UChar r1, IRTemp op2addr)
6339{
6340 IRTemp op1 = newTemp(Ity_I64);
6341 IRTemp op2 = newTemp(Ity_I64);
6342 IRTemp result = newTemp(Ity_I128);
6343
6344 assign(op1, get_gpr_dw0(r1));
6345 assign(op2, load(Ity_I64, mkexpr(op2addr)));
6346 assign(result, binop(Iop_MullS64, mkexpr(op1), mkexpr(op2)));
6347 put_gpr_dw0(r1, unop(Iop_128to64, mkexpr(result)));
6348
6349 return "msg";
6350}
6351
6352static HChar *
6353s390_irgen_MSGF(UChar r1, IRTemp op2addr)
6354{
6355 IRTemp op1 = newTemp(Ity_I64);
6356 IRTemp op2 = newTemp(Ity_I32);
6357 IRTemp result = newTemp(Ity_I128);
6358
6359 assign(op1, get_gpr_dw0(r1));
6360 assign(op2, load(Ity_I32, mkexpr(op2addr)));
6361 assign(result, binop(Iop_MullS64, mkexpr(op1), unop(Iop_32Sto64, mkexpr(op2))
6362 ));
6363 put_gpr_dw0(r1, unop(Iop_128to64, mkexpr(result)));
6364
6365 return "msgf";
6366}
6367
6368static HChar *
6369s390_irgen_MSFI(UChar r1, UInt i2)
6370{
6371 IRTemp op1 = newTemp(Ity_I32);
6372 Int op2;
6373 IRTemp result = newTemp(Ity_I64);
6374
6375 assign(op1, get_gpr_w1(r1));
6376 op2 = (Int)i2;
6377 assign(result, binop(Iop_MullS32, mkexpr(op1), mkU32((UInt)op2)));
6378 put_gpr_w1(r1, unop(Iop_64to32, mkexpr(result)));
6379
6380 return "msfi";
6381}
6382
6383static HChar *
6384s390_irgen_MSGFI(UChar r1, UInt i2)
6385{
6386 IRTemp op1 = newTemp(Ity_I64);
6387 Int op2;
6388 IRTemp result = newTemp(Ity_I128);
6389
6390 assign(op1, get_gpr_dw0(r1));
6391 op2 = (Int)i2;
6392 assign(result, binop(Iop_MullS64, mkexpr(op1), unop(Iop_32Sto64, mkU32((UInt)
6393 op2))));
6394 put_gpr_dw0(r1, unop(Iop_128to64, mkexpr(result)));
6395
6396 return "msgfi";
6397}
6398
6399static HChar *
6400s390_irgen_OR(UChar r1, UChar r2)
6401{
6402 IRTemp op1 = newTemp(Ity_I32);
6403 IRTemp op2 = newTemp(Ity_I32);
6404 IRTemp result = newTemp(Ity_I32);
6405
6406 assign(op1, get_gpr_w1(r1));
6407 assign(op2, get_gpr_w1(r2));
6408 assign(result, binop(Iop_Or32, mkexpr(op1), mkexpr(op2)));
6409 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
6410 put_gpr_w1(r1, mkexpr(result));
6411
6412 return "or";
6413}
6414
6415static HChar *
6416s390_irgen_OGR(UChar r1, UChar r2)
6417{
6418 IRTemp op1 = newTemp(Ity_I64);
6419 IRTemp op2 = newTemp(Ity_I64);
6420 IRTemp result = newTemp(Ity_I64);
6421
6422 assign(op1, get_gpr_dw0(r1));
6423 assign(op2, get_gpr_dw0(r2));
6424 assign(result, binop(Iop_Or64, mkexpr(op1), mkexpr(op2)));
6425 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
6426 put_gpr_dw0(r1, mkexpr(result));
6427
6428 return "ogr";
6429}
6430
6431static HChar *
6432s390_irgen_ORK(UChar r3, UChar r1, UChar r2)
6433{
6434 IRTemp op2 = newTemp(Ity_I32);
6435 IRTemp op3 = newTemp(Ity_I32);
6436 IRTemp result = newTemp(Ity_I32);
6437
6438 assign(op2, get_gpr_w1(r2));
6439 assign(op3, get_gpr_w1(r3));
6440 assign(result, binop(Iop_Or32, mkexpr(op2), mkexpr(op3)));
6441 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
6442 put_gpr_w1(r1, mkexpr(result));
6443
6444 return "ork";
6445}
6446
6447static HChar *
6448s390_irgen_OGRK(UChar r3, UChar r1, UChar r2)
6449{
6450 IRTemp op2 = newTemp(Ity_I64);
6451 IRTemp op3 = newTemp(Ity_I64);
6452 IRTemp result = newTemp(Ity_I64);
6453
6454 assign(op2, get_gpr_dw0(r2));
6455 assign(op3, get_gpr_dw0(r3));
6456 assign(result, binop(Iop_Or64, mkexpr(op2), mkexpr(op3)));
6457 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
6458 put_gpr_dw0(r1, mkexpr(result));
6459
6460 return "ogrk";
6461}
6462
6463static HChar *
6464s390_irgen_O(UChar r1, IRTemp op2addr)
6465{
6466 IRTemp op1 = newTemp(Ity_I32);
6467 IRTemp op2 = newTemp(Ity_I32);
6468 IRTemp result = newTemp(Ity_I32);
6469
6470 assign(op1, get_gpr_w1(r1));
6471 assign(op2, load(Ity_I32, mkexpr(op2addr)));
6472 assign(result, binop(Iop_Or32, mkexpr(op1), mkexpr(op2)));
6473 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
6474 put_gpr_w1(r1, mkexpr(result));
6475
6476 return "o";
6477}
6478
6479static HChar *
6480s390_irgen_OY(UChar r1, IRTemp op2addr)
6481{
6482 IRTemp op1 = newTemp(Ity_I32);
6483 IRTemp op2 = newTemp(Ity_I32);
6484 IRTemp result = newTemp(Ity_I32);
6485
6486 assign(op1, get_gpr_w1(r1));
6487 assign(op2, load(Ity_I32, mkexpr(op2addr)));
6488 assign(result, binop(Iop_Or32, mkexpr(op1), mkexpr(op2)));
6489 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
6490 put_gpr_w1(r1, mkexpr(result));
6491
6492 return "oy";
6493}
6494
6495static HChar *
6496s390_irgen_OG(UChar r1, IRTemp op2addr)
6497{
6498 IRTemp op1 = newTemp(Ity_I64);
6499 IRTemp op2 = newTemp(Ity_I64);
6500 IRTemp result = newTemp(Ity_I64);
6501
6502 assign(op1, get_gpr_dw0(r1));
6503 assign(op2, load(Ity_I64, mkexpr(op2addr)));
6504 assign(result, binop(Iop_Or64, mkexpr(op1), mkexpr(op2)));
6505 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
6506 put_gpr_dw0(r1, mkexpr(result));
6507
6508 return "og";
6509}
6510
6511static HChar *
6512s390_irgen_OI(UChar i2, IRTemp op1addr)
6513{
6514 IRTemp op1 = newTemp(Ity_I8);
6515 UChar op2;
6516 IRTemp result = newTemp(Ity_I8);
6517
6518 assign(op1, load(Ity_I8, mkexpr(op1addr)));
6519 op2 = i2;
6520 assign(result, binop(Iop_Or8, mkexpr(op1), mkU8(op2)));
6521 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
6522 store(mkexpr(op1addr), mkexpr(result));
6523
6524 return "oi";
6525}
6526
6527static HChar *
6528s390_irgen_OIY(UChar i2, IRTemp op1addr)
6529{
6530 IRTemp op1 = newTemp(Ity_I8);
6531 UChar op2;
6532 IRTemp result = newTemp(Ity_I8);
6533
6534 assign(op1, load(Ity_I8, mkexpr(op1addr)));
6535 op2 = i2;
6536 assign(result, binop(Iop_Or8, mkexpr(op1), mkU8(op2)));
6537 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
6538 store(mkexpr(op1addr), mkexpr(result));
6539
6540 return "oiy";
6541}
6542
6543static HChar *
6544s390_irgen_OIHF(UChar r1, UInt i2)
6545{
6546 IRTemp op1 = newTemp(Ity_I32);
6547 UInt op2;
6548 IRTemp result = newTemp(Ity_I32);
6549
6550 assign(op1, get_gpr_w0(r1));
6551 op2 = i2;
6552 assign(result, binop(Iop_Or32, mkexpr(op1), mkU32(op2)));
6553 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
6554 put_gpr_w0(r1, mkexpr(result));
6555
6556 return "oihf";
6557}
6558
6559static HChar *
6560s390_irgen_OIHH(UChar r1, UShort i2)
6561{
6562 IRTemp op1 = newTemp(Ity_I16);
6563 UShort op2;
6564 IRTemp result = newTemp(Ity_I16);
6565
6566 assign(op1, get_gpr_hw0(r1));
6567 op2 = i2;
6568 assign(result, binop(Iop_Or16, mkexpr(op1), mkU16(op2)));
6569 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
6570 put_gpr_hw0(r1, mkexpr(result));
6571
6572 return "oihh";
6573}
6574
6575static HChar *
6576s390_irgen_OIHL(UChar r1, UShort i2)
6577{
6578 IRTemp op1 = newTemp(Ity_I16);
6579 UShort op2;
6580 IRTemp result = newTemp(Ity_I16);
6581
6582 assign(op1, get_gpr_hw1(r1));
6583 op2 = i2;
6584 assign(result, binop(Iop_Or16, mkexpr(op1), mkU16(op2)));
6585 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
6586 put_gpr_hw1(r1, mkexpr(result));
6587
6588 return "oihl";
6589}
6590
6591static HChar *
6592s390_irgen_OILF(UChar r1, UInt i2)
6593{
6594 IRTemp op1 = newTemp(Ity_I32);
6595 UInt op2;
6596 IRTemp result = newTemp(Ity_I32);
6597
6598 assign(op1, get_gpr_w1(r1));
6599 op2 = i2;
6600 assign(result, binop(Iop_Or32, mkexpr(op1), mkU32(op2)));
6601 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
6602 put_gpr_w1(r1, mkexpr(result));
6603
6604 return "oilf";
6605}
6606
6607static HChar *
6608s390_irgen_OILH(UChar r1, UShort i2)
6609{
6610 IRTemp op1 = newTemp(Ity_I16);
6611 UShort op2;
6612 IRTemp result = newTemp(Ity_I16);
6613
6614 assign(op1, get_gpr_hw2(r1));
6615 op2 = i2;
6616 assign(result, binop(Iop_Or16, mkexpr(op1), mkU16(op2)));
6617 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
6618 put_gpr_hw2(r1, mkexpr(result));
6619
6620 return "oilh";
6621}
6622
6623static HChar *
6624s390_irgen_OILL(UChar r1, UShort i2)
6625{
6626 IRTemp op1 = newTemp(Ity_I16);
6627 UShort op2;
6628 IRTemp result = newTemp(Ity_I16);
6629
6630 assign(op1, get_gpr_hw3(r1));
6631 op2 = i2;
6632 assign(result, binop(Iop_Or16, mkexpr(op1), mkU16(op2)));
6633 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
6634 put_gpr_hw3(r1, mkexpr(result));
6635
6636 return "oill";
6637}
6638
6639static HChar *
6640s390_irgen_PFD(void)
6641{
6642
6643 return "pfd";
6644}
6645
6646static HChar *
6647s390_irgen_PFDRL(void)
6648{
6649
6650 return "pfdrl";
6651}
6652
6653static HChar *
6654s390_irgen_RLL(UChar r1, UChar r3, IRTemp op2addr)
6655{
6656 IRTemp amount = newTemp(Ity_I64);
6657 IRTemp op = newTemp(Ity_I32);
6658
6659 assign(amount, binop(Iop_And64, mkexpr(op2addr), mkU64(31)));
6660 assign(op, get_gpr_w1(r3));
6661 put_gpr_w1(r1, binop(Iop_Or32, binop(Iop_Shl32, mkexpr(op), unop(Iop_64to8,
6662 mkexpr(amount))), binop(Iop_Shr32, mkexpr(op), unop(Iop_64to8,
6663 binop(Iop_Sub64, mkU64(32), mkexpr(amount))))));
6664
6665 return "rll";
6666}
6667
6668static HChar *
6669s390_irgen_RLLG(UChar r1, UChar r3, IRTemp op2addr)
6670{
6671 IRTemp amount = newTemp(Ity_I64);
6672 IRTemp op = newTemp(Ity_I64);
6673
6674 assign(amount, binop(Iop_And64, mkexpr(op2addr), mkU64(63)));
6675 assign(op, get_gpr_dw0(r3));
6676 put_gpr_dw0(r1, binop(Iop_Or64, binop(Iop_Shl64, mkexpr(op), unop(Iop_64to8,
6677 mkexpr(amount))), binop(Iop_Shr64, mkexpr(op), unop(Iop_64to8,
6678 binop(Iop_Sub64, mkU64(64), mkexpr(amount))))));
6679
6680 return "rllg";
6681}
6682
6683static HChar *
6684s390_irgen_RNSBG(UChar r1, UChar r2, UChar i3, UChar i4, UChar i5)
6685{
6686 UChar from;
6687 UChar to;
6688 UChar rot;
6689 UChar t_bit;
6690 ULong mask;
6691 ULong maskc;
6692 IRTemp result = newTemp(Ity_I64);
6693 IRTemp op2 = newTemp(Ity_I64);
6694
6695 from = i3 & 63;
6696 to = i4 & 63;
6697 rot = i5 & 63;
6698 t_bit = i3 & 128;
6699 assign(op2, rot == 0 ? get_gpr_dw0(r2) : binop(Iop_Or64, binop(Iop_Shl64,
6700 get_gpr_dw0(r2), mkU8(rot)), binop(Iop_Shr64, get_gpr_dw0(r2),
6701 mkU8(64 - rot))));
6702 if (from <= to) {
6703 mask = ~0ULL;
6704 mask = (mask >> from) & (mask << (63 - to));
6705 maskc = ~mask;
6706 } else {
6707 maskc = ~0ULL;
6708 maskc = (maskc >> (to + 1)) & (maskc << (64 - from));
6709 mask = ~maskc;
6710 }
6711 assign(result, binop(Iop_And64, binop(Iop_And64, get_gpr_dw0(r1), mkexpr(op2)
6712 ), mkU64(mask)));
6713 if (t_bit == 0) {
6714 put_gpr_dw0(r1, binop(Iop_Or64, binop(Iop_And64, get_gpr_dw0(r1),
6715 mkU64(maskc)), mkexpr(result)));
6716 }
6717 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
6718
6719 return "rnsbg";
6720}
6721
6722static HChar *
6723s390_irgen_RXSBG(UChar r1, UChar r2, UChar i3, UChar i4, UChar i5)
6724{
6725 UChar from;
6726 UChar to;
6727 UChar rot;
6728 UChar t_bit;
6729 ULong mask;
6730 ULong maskc;
6731 IRTemp result = newTemp(Ity_I64);
6732 IRTemp op2 = newTemp(Ity_I64);
6733
6734 from = i3 & 63;
6735 to = i4 & 63;
6736 rot = i5 & 63;
6737 t_bit = i3 & 128;
6738 assign(op2, rot == 0 ? get_gpr_dw0(r2) : binop(Iop_Or64, binop(Iop_Shl64,
6739 get_gpr_dw0(r2), mkU8(rot)), binop(Iop_Shr64, get_gpr_dw0(r2),
6740 mkU8(64 - rot))));
6741 if (from <= to) {
6742 mask = ~0ULL;
6743 mask = (mask >> from) & (mask << (63 - to));
6744 maskc = ~mask;
6745 } else {
6746 maskc = ~0ULL;
6747 maskc = (maskc >> (to + 1)) & (maskc << (64 - from));
6748 mask = ~maskc;
6749 }
6750 assign(result, binop(Iop_And64, binop(Iop_Xor64, get_gpr_dw0(r1), mkexpr(op2)
6751 ), mkU64(mask)));
6752 if (t_bit == 0) {
6753 put_gpr_dw0(r1, binop(Iop_Or64, binop(Iop_And64, get_gpr_dw0(r1),
6754 mkU64(maskc)), mkexpr(result)));
6755 }
6756 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
6757
6758 return "rxsbg";
6759}
6760
6761static HChar *
6762s390_irgen_ROSBG(UChar r1, UChar r2, UChar i3, UChar i4, UChar i5)
6763{
6764 UChar from;
6765 UChar to;
6766 UChar rot;
6767 UChar t_bit;
6768 ULong mask;
6769 ULong maskc;
6770 IRTemp result = newTemp(Ity_I64);
6771 IRTemp op2 = newTemp(Ity_I64);
6772
6773 from = i3 & 63;
6774 to = i4 & 63;
6775 rot = i5 & 63;
6776 t_bit = i3 & 128;
6777 assign(op2, rot == 0 ? get_gpr_dw0(r2) : binop(Iop_Or64, binop(Iop_Shl64,
6778 get_gpr_dw0(r2), mkU8(rot)), binop(Iop_Shr64, get_gpr_dw0(r2),
6779 mkU8(64 - rot))));
6780 if (from <= to) {
6781 mask = ~0ULL;
6782 mask = (mask >> from) & (mask << (63 - to));
6783 maskc = ~mask;
6784 } else {
6785 maskc = ~0ULL;
6786 maskc = (maskc >> (to + 1)) & (maskc << (64 - from));
6787 mask = ~maskc;
6788 }
6789 assign(result, binop(Iop_And64, binop(Iop_Or64, get_gpr_dw0(r1), mkexpr(op2)
6790 ), mkU64(mask)));
6791 if (t_bit == 0) {
6792 put_gpr_dw0(r1, binop(Iop_Or64, binop(Iop_And64, get_gpr_dw0(r1),
6793 mkU64(maskc)), mkexpr(result)));
6794 }
6795 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
6796
6797 return "rosbg";
6798}
6799
6800static HChar *
6801s390_irgen_RISBG(UChar r1, UChar r2, UChar i3, UChar i4, UChar i5)
6802{
6803 UChar from;
6804 UChar to;
6805 UChar rot;
6806 UChar z_bit;
6807 ULong mask;
6808 ULong maskc;
6809 IRTemp op2 = newTemp(Ity_I64);
6810 IRTemp result = newTemp(Ity_I64);
6811
6812 from = i3 & 63;
6813 to = i4 & 63;
6814 rot = i5 & 63;
6815 z_bit = i4 & 128;
6816 assign(op2, rot == 0 ? get_gpr_dw0(r2) : binop(Iop_Or64, binop(Iop_Shl64,
6817 get_gpr_dw0(r2), mkU8(rot)), binop(Iop_Shr64, get_gpr_dw0(r2),
6818 mkU8(64 - rot))));
6819 if (from <= to) {
6820 mask = ~0ULL;
6821 mask = (mask >> from) & (mask << (63 - to));
6822 maskc = ~mask;
6823 } else {
6824 maskc = ~0ULL;
6825 maskc = (maskc >> (to + 1)) & (maskc << (64 - from));
6826 mask = ~maskc;
6827 }
6828 if (z_bit == 0) {
6829 put_gpr_dw0(r1, binop(Iop_Or64, binop(Iop_And64, get_gpr_dw0(r1),
6830 mkU64(maskc)), binop(Iop_And64, mkexpr(op2), mkU64(mask))));
6831 } else {
6832 put_gpr_dw0(r1, binop(Iop_And64, mkexpr(op2), mkU64(mask)));
6833 }
6834 assign(result, get_gpr_dw0(r1));
6835 s390_cc_thunk_putS(S390_CC_OP_LOAD_AND_TEST, op2);
6836
6837 return "risbg";
6838}
6839
6840static HChar *
6841s390_irgen_SAR(UChar r1, UChar r2)
6842{
6843 put_ar_w0(r1, get_gpr_w1(r2));
sewardj7ee97522011-05-09 21:45:04 +00006844 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00006845 s390_disasm(ENC3(MNM, AR, GPR), "sar", r1, r2);
6846
6847 return "sar";
6848}
6849
6850static HChar *
6851s390_irgen_SLDA(UChar r1, IRTemp op2addr)
6852{
6853 IRTemp p1 = newTemp(Ity_I64);
6854 IRTemp p2 = newTemp(Ity_I64);
6855 IRTemp op = newTemp(Ity_I64);
6856 IRTemp result = newTemp(Ity_I64);
6857 Long sign_mask;
6858 IRTemp shift_amount = newTemp(Ity_I64);
6859
6860 assign(p1, unop(Iop_32Uto64, get_gpr_w1(r1)));
6861 assign(p2, unop(Iop_32Uto64, get_gpr_w1(r1 + 1)));
6862 assign(op, binop(Iop_Or64, binop(Iop_Shl64, mkexpr(p1), mkU8(32)), mkexpr(p2)
6863 ));
6864 sign_mask = 1ULL << 63;
6865 assign(shift_amount, binop(Iop_And64, mkexpr(op2addr), mkU64(63)));
6866 assign(result, binop(Iop_Or64, binop(Iop_And64, binop(Iop_Shl64, mkexpr(op),
6867 unop(Iop_64to8, mkexpr(shift_amount))), mkU64((ULong)(~sign_mask))),
6868 binop(Iop_And64, mkexpr(op), mkU64((ULong)sign_mask))));
6869 put_gpr_w1(r1, unop(Iop_64HIto32, mkexpr(result)));
6870 put_gpr_w1(r1 + 1, unop(Iop_64to32, mkexpr(result)));
6871 s390_cc_thunk_putZZ(S390_CC_OP_SHIFT_LEFT_64, op, shift_amount);
6872
6873 return "slda";
6874}
6875
6876static HChar *
6877s390_irgen_SLDL(UChar r1, IRTemp op2addr)
6878{
6879 IRTemp p1 = newTemp(Ity_I64);
6880 IRTemp p2 = newTemp(Ity_I64);
6881 IRTemp result = newTemp(Ity_I64);
6882
6883 assign(p1, unop(Iop_32Uto64, get_gpr_w1(r1)));
6884 assign(p2, unop(Iop_32Uto64, get_gpr_w1(r1 + 1)));
6885 assign(result, binop(Iop_Shl64, binop(Iop_Or64, binop(Iop_Shl64, mkexpr(p1),
6886 mkU8(32)), mkexpr(p2)), unop(Iop_64to8, binop(Iop_And64,
6887 mkexpr(op2addr), mkU64(63)))));
6888 put_gpr_w1(r1, unop(Iop_64HIto32, mkexpr(result)));
6889 put_gpr_w1(r1 + 1, unop(Iop_64to32, mkexpr(result)));
6890
6891 return "sldl";
6892}
6893
6894static HChar *
6895s390_irgen_SLA(UChar r1, IRTemp op2addr)
6896{
6897 IRTemp uop = newTemp(Ity_I32);
6898 IRTemp result = newTemp(Ity_I32);
6899 UInt sign_mask;
6900 IRTemp shift_amount = newTemp(Ity_I64);
6901 IRTemp op = newTemp(Ity_I32);
6902
6903 assign(op, get_gpr_w1(r1));
6904 assign(uop, get_gpr_w1(r1));
6905 sign_mask = 2147483648U;
6906 assign(shift_amount, binop(Iop_And64, mkexpr(op2addr), mkU64(63)));
6907 assign(result, binop(Iop_Or32, binop(Iop_And32, binop(Iop_Shl32, mkexpr(uop),
6908 unop(Iop_64to8, mkexpr(shift_amount))), mkU32(~sign_mask)),
6909 binop(Iop_And32, mkexpr(uop), mkU32(sign_mask))));
6910 put_gpr_w1(r1, mkexpr(result));
6911 s390_cc_thunk_putZZ(S390_CC_OP_SHIFT_LEFT_32, op, shift_amount);
6912
6913 return "sla";
6914}
6915
6916static HChar *
6917s390_irgen_SLAK(UChar r1, UChar r3, IRTemp op2addr)
6918{
6919 IRTemp uop = newTemp(Ity_I32);
6920 IRTemp result = newTemp(Ity_I32);
6921 UInt sign_mask;
6922 IRTemp shift_amount = newTemp(Ity_I64);
6923 IRTemp op = newTemp(Ity_I32);
6924
6925 assign(op, get_gpr_w1(r3));
6926 assign(uop, get_gpr_w1(r3));
6927 sign_mask = 2147483648U;
6928 assign(shift_amount, binop(Iop_And64, mkexpr(op2addr), mkU64(63)));
6929 assign(result, binop(Iop_Or32, binop(Iop_And32, binop(Iop_Shl32, mkexpr(uop),
6930 unop(Iop_64to8, mkexpr(shift_amount))), mkU32(~sign_mask)),
6931 binop(Iop_And32, mkexpr(uop), mkU32(sign_mask))));
6932 put_gpr_w1(r1, mkexpr(result));
6933 s390_cc_thunk_putZZ(S390_CC_OP_SHIFT_LEFT_32, op, shift_amount);
6934
6935 return "slak";
6936}
6937
6938static HChar *
6939s390_irgen_SLAG(UChar r1, UChar r3, IRTemp op2addr)
6940{
6941 IRTemp uop = newTemp(Ity_I64);
6942 IRTemp result = newTemp(Ity_I64);
6943 ULong sign_mask;
6944 IRTemp shift_amount = newTemp(Ity_I64);
6945 IRTemp op = newTemp(Ity_I64);
6946
6947 assign(op, get_gpr_dw0(r3));
6948 assign(uop, get_gpr_dw0(r3));
6949 sign_mask = 9223372036854775808ULL;
6950 assign(shift_amount, binop(Iop_And64, mkexpr(op2addr), mkU64(63)));
6951 assign(result, binop(Iop_Or64, binop(Iop_And64, binop(Iop_Shl64, mkexpr(uop),
6952 unop(Iop_64to8, mkexpr(shift_amount))), mkU64(~sign_mask)),
6953 binop(Iop_And64, mkexpr(uop), mkU64(sign_mask))));
6954 put_gpr_dw0(r1, mkexpr(result));
6955 s390_cc_thunk_putZZ(S390_CC_OP_SHIFT_LEFT_64, op, shift_amount);
6956
6957 return "slag";
6958}
6959
6960static HChar *
6961s390_irgen_SLL(UChar r1, IRTemp op2addr)
6962{
6963 put_gpr_w1(r1, binop(Iop_Shl32, get_gpr_w1(r1), unop(Iop_64to8,
6964 binop(Iop_And64, mkexpr(op2addr), mkU64(63)))));
6965
6966 return "sll";
6967}
6968
6969static HChar *
6970s390_irgen_SLLK(UChar r1, UChar r3, IRTemp op2addr)
6971{
6972 put_gpr_w1(r1, binop(Iop_Shl32, get_gpr_w1(r3), unop(Iop_64to8,
6973 binop(Iop_And64, mkexpr(op2addr), mkU64(63)))));
6974
6975 return "sllk";
6976}
6977
6978static HChar *
6979s390_irgen_SLLG(UChar r1, UChar r3, IRTemp op2addr)
6980{
6981 put_gpr_dw0(r1, binop(Iop_Shl64, get_gpr_dw0(r3), unop(Iop_64to8,
6982 binop(Iop_And64, mkexpr(op2addr), mkU64(63)))));
6983
6984 return "sllg";
6985}
6986
6987static HChar *
6988s390_irgen_SRDA(UChar r1, IRTemp op2addr)
6989{
6990 IRTemp p1 = newTemp(Ity_I64);
6991 IRTemp p2 = newTemp(Ity_I64);
6992 IRTemp result = newTemp(Ity_I64);
6993
6994 assign(p1, unop(Iop_32Uto64, get_gpr_w1(r1)));
6995 assign(p2, unop(Iop_32Uto64, get_gpr_w1(r1 + 1)));
6996 assign(result, binop(Iop_Sar64, binop(Iop_Or64, binop(Iop_Shl64, mkexpr(p1),
6997 mkU8(32)), mkexpr(p2)), unop(Iop_64to8, binop(Iop_And64,
6998 mkexpr(op2addr), mkU64(63)))));
6999 put_gpr_w1(r1, unop(Iop_64HIto32, mkexpr(result)));
7000 put_gpr_w1(r1 + 1, unop(Iop_64to32, mkexpr(result)));
7001 s390_cc_thunk_putS(S390_CC_OP_LOAD_AND_TEST, result);
7002
7003 return "srda";
7004}
7005
7006static HChar *
7007s390_irgen_SRDL(UChar r1, IRTemp op2addr)
7008{
7009 IRTemp p1 = newTemp(Ity_I64);
7010 IRTemp p2 = newTemp(Ity_I64);
7011 IRTemp result = newTemp(Ity_I64);
7012
7013 assign(p1, unop(Iop_32Uto64, get_gpr_w1(r1)));
7014 assign(p2, unop(Iop_32Uto64, get_gpr_w1(r1 + 1)));
7015 assign(result, binop(Iop_Shr64, binop(Iop_Or64, binop(Iop_Shl64, mkexpr(p1),
7016 mkU8(32)), mkexpr(p2)), unop(Iop_64to8, binop(Iop_And64,
7017 mkexpr(op2addr), mkU64(63)))));
7018 put_gpr_w1(r1, unop(Iop_64HIto32, mkexpr(result)));
7019 put_gpr_w1(r1 + 1, unop(Iop_64to32, mkexpr(result)));
7020
7021 return "srdl";
7022}
7023
7024static HChar *
7025s390_irgen_SRA(UChar r1, IRTemp op2addr)
7026{
7027 IRTemp result = newTemp(Ity_I32);
7028 IRTemp op = newTemp(Ity_I32);
7029
7030 assign(op, get_gpr_w1(r1));
7031 assign(result, binop(Iop_Sar32, mkexpr(op), unop(Iop_64to8, binop(Iop_And64,
7032 mkexpr(op2addr), mkU64(63)))));
7033 put_gpr_w1(r1, mkexpr(result));
7034 s390_cc_thunk_putS(S390_CC_OP_LOAD_AND_TEST, result);
7035
7036 return "sra";
7037}
7038
7039static HChar *
7040s390_irgen_SRAK(UChar r1, UChar r3, IRTemp op2addr)
7041{
7042 IRTemp result = newTemp(Ity_I32);
7043 IRTemp op = newTemp(Ity_I32);
7044
7045 assign(op, get_gpr_w1(r3));
7046 assign(result, binop(Iop_Sar32, mkexpr(op), unop(Iop_64to8, binop(Iop_And64,
7047 mkexpr(op2addr), mkU64(63)))));
7048 put_gpr_w1(r1, mkexpr(result));
7049 s390_cc_thunk_putS(S390_CC_OP_LOAD_AND_TEST, result);
7050
7051 return "srak";
7052}
7053
7054static HChar *
7055s390_irgen_SRAG(UChar r1, UChar r3, IRTemp op2addr)
7056{
7057 IRTemp result = newTemp(Ity_I64);
7058 IRTemp op = newTemp(Ity_I64);
7059
7060 assign(op, get_gpr_dw0(r3));
7061 assign(result, binop(Iop_Sar64, mkexpr(op), unop(Iop_64to8, binop(Iop_And64,
7062 mkexpr(op2addr), mkU64(63)))));
7063 put_gpr_dw0(r1, mkexpr(result));
7064 s390_cc_thunk_putS(S390_CC_OP_LOAD_AND_TEST, result);
7065
7066 return "srag";
7067}
7068
7069static HChar *
7070s390_irgen_SRL(UChar r1, IRTemp op2addr)
7071{
7072 IRTemp op = newTemp(Ity_I32);
7073
7074 assign(op, get_gpr_w1(r1));
7075 put_gpr_w1(r1, binop(Iop_Shr32, mkexpr(op), unop(Iop_64to8, binop(Iop_And64,
7076 mkexpr(op2addr), mkU64(63)))));
7077
7078 return "srl";
7079}
7080
7081static HChar *
7082s390_irgen_SRLK(UChar r1, UChar r3, IRTemp op2addr)
7083{
7084 IRTemp op = newTemp(Ity_I32);
7085
7086 assign(op, get_gpr_w1(r3));
7087 put_gpr_w1(r1, binop(Iop_Shr32, mkexpr(op), unop(Iop_64to8, binop(Iop_And64,
7088 mkexpr(op2addr), mkU64(63)))));
7089
7090 return "srlk";
7091}
7092
7093static HChar *
7094s390_irgen_SRLG(UChar r1, UChar r3, IRTemp op2addr)
7095{
7096 IRTemp op = newTemp(Ity_I64);
7097
7098 assign(op, get_gpr_dw0(r3));
7099 put_gpr_dw0(r1, binop(Iop_Shr64, mkexpr(op), unop(Iop_64to8, binop(Iop_And64,
7100 mkexpr(op2addr), mkU64(63)))));
7101
7102 return "srlg";
7103}
7104
7105static HChar *
7106s390_irgen_ST(UChar r1, IRTemp op2addr)
7107{
7108 store(mkexpr(op2addr), get_gpr_w1(r1));
7109
7110 return "st";
7111}
7112
7113static HChar *
7114s390_irgen_STY(UChar r1, IRTemp op2addr)
7115{
7116 store(mkexpr(op2addr), get_gpr_w1(r1));
7117
7118 return "sty";
7119}
7120
7121static HChar *
7122s390_irgen_STG(UChar r1, IRTemp op2addr)
7123{
7124 store(mkexpr(op2addr), get_gpr_dw0(r1));
7125
7126 return "stg";
7127}
7128
7129static HChar *
7130s390_irgen_STRL(UChar r1, UInt i2)
7131{
7132 store(mkU64(guest_IA_curr_instr + ((ULong)(Long)(Int)i2 << 1)),
7133 get_gpr_w1(r1));
7134
7135 return "strl";
7136}
7137
7138static HChar *
7139s390_irgen_STGRL(UChar r1, UInt i2)
7140{
7141 store(mkU64(guest_IA_curr_instr + ((ULong)(Long)(Int)i2 << 1)),
7142 get_gpr_dw0(r1));
7143
7144 return "stgrl";
7145}
7146
7147static HChar *
7148s390_irgen_STC(UChar r1, IRTemp op2addr)
7149{
7150 store(mkexpr(op2addr), get_gpr_b7(r1));
7151
7152 return "stc";
7153}
7154
7155static HChar *
7156s390_irgen_STCY(UChar r1, IRTemp op2addr)
7157{
7158 store(mkexpr(op2addr), get_gpr_b7(r1));
7159
7160 return "stcy";
7161}
7162
7163static HChar *
7164s390_irgen_STCH(UChar r1, IRTemp op2addr)
7165{
7166 store(mkexpr(op2addr), get_gpr_b3(r1));
7167
7168 return "stch";
7169}
7170
7171static HChar *
7172s390_irgen_STCM(UChar r1, UChar r3, IRTemp op2addr)
7173{
7174 UChar mask;
7175 UChar n;
7176
7177 mask = (UChar)r3;
7178 n = 0;
7179 if ((mask & 8) != 0) {
7180 store(mkexpr(op2addr), get_gpr_b4(r1));
7181 n = n + 1;
7182 }
7183 if ((mask & 4) != 0) {
7184 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(n)), get_gpr_b5(r1));
7185 n = n + 1;
7186 }
7187 if ((mask & 2) != 0) {
7188 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(n)), get_gpr_b6(r1));
7189 n = n + 1;
7190 }
7191 if ((mask & 1) != 0) {
7192 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(n)), get_gpr_b7(r1));
7193 }
7194
7195 return "stcm";
7196}
7197
7198static HChar *
7199s390_irgen_STCMY(UChar r1, UChar r3, IRTemp op2addr)
7200{
7201 UChar mask;
7202 UChar n;
7203
7204 mask = (UChar)r3;
7205 n = 0;
7206 if ((mask & 8) != 0) {
7207 store(mkexpr(op2addr), get_gpr_b4(r1));
7208 n = n + 1;
7209 }
7210 if ((mask & 4) != 0) {
7211 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(n)), get_gpr_b5(r1));
7212 n = n + 1;
7213 }
7214 if ((mask & 2) != 0) {
7215 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(n)), get_gpr_b6(r1));
7216 n = n + 1;
7217 }
7218 if ((mask & 1) != 0) {
7219 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(n)), get_gpr_b7(r1));
7220 }
7221
7222 return "stcmy";
7223}
7224
7225static HChar *
7226s390_irgen_STCMH(UChar r1, UChar r3, IRTemp op2addr)
7227{
7228 UChar mask;
7229 UChar n;
7230
7231 mask = (UChar)r3;
7232 n = 0;
7233 if ((mask & 8) != 0) {
7234 store(mkexpr(op2addr), get_gpr_b0(r1));
7235 n = n + 1;
7236 }
7237 if ((mask & 4) != 0) {
7238 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(n)), get_gpr_b1(r1));
7239 n = n + 1;
7240 }
7241 if ((mask & 2) != 0) {
7242 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(n)), get_gpr_b2(r1));
7243 n = n + 1;
7244 }
7245 if ((mask & 1) != 0) {
7246 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(n)), get_gpr_b3(r1));
7247 }
7248
7249 return "stcmh";
7250}
7251
7252static HChar *
7253s390_irgen_STH(UChar r1, IRTemp op2addr)
7254{
7255 store(mkexpr(op2addr), get_gpr_hw3(r1));
7256
7257 return "sth";
7258}
7259
7260static HChar *
7261s390_irgen_STHY(UChar r1, IRTemp op2addr)
7262{
7263 store(mkexpr(op2addr), get_gpr_hw3(r1));
7264
7265 return "sthy";
7266}
7267
7268static HChar *
7269s390_irgen_STHRL(UChar r1, UInt i2)
7270{
7271 store(mkU64(guest_IA_curr_instr + ((ULong)(Long)(Int)i2 << 1)),
7272 get_gpr_hw3(r1));
7273
7274 return "sthrl";
7275}
7276
7277static HChar *
7278s390_irgen_STHH(UChar r1, IRTemp op2addr)
7279{
7280 store(mkexpr(op2addr), get_gpr_hw1(r1));
7281
7282 return "sthh";
7283}
7284
7285static HChar *
7286s390_irgen_STFH(UChar r1, IRTemp op2addr)
7287{
7288 store(mkexpr(op2addr), get_gpr_w0(r1));
7289
7290 return "stfh";
7291}
7292
7293static HChar *
sewardjd7bde722011-04-05 13:19:33 +00007294s390_irgen_STOC(UChar r1, IRTemp op2addr)
7295{
7296 /* condition is checked in format handler */
7297 store(mkexpr(op2addr), get_gpr_w1(r1));
7298
7299 return "stoc";
7300}
7301
7302static HChar *
7303s390_irgen_STOCG(UChar r1, IRTemp op2addr)
7304{
7305 /* condition is checked in format handler */
7306 store(mkexpr(op2addr), get_gpr_dw0(r1));
7307
7308 return "stocg";
7309}
7310
7311static HChar *
sewardj2019a972011-03-07 16:04:07 +00007312s390_irgen_STPQ(UChar r1, IRTemp op2addr)
7313{
7314 store(mkexpr(op2addr), get_gpr_dw0(r1));
7315 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(8)), get_gpr_dw0(r1 + 1));
7316
7317 return "stpq";
7318}
7319
7320static HChar *
7321s390_irgen_STRVH(UChar r1, IRTemp op2addr)
7322{
7323 store(mkexpr(op2addr), get_gpr_b7(r1));
7324 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(1)), get_gpr_b6(r1));
7325
7326 return "strvh";
7327}
7328
7329static HChar *
7330s390_irgen_STRV(UChar r1, IRTemp op2addr)
7331{
7332 store(mkexpr(op2addr), get_gpr_b7(r1));
7333 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(1)), get_gpr_b6(r1));
7334 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(2)), get_gpr_b5(r1));
7335 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(3)), get_gpr_b4(r1));
7336
7337 return "strv";
7338}
7339
7340static HChar *
7341s390_irgen_STRVG(UChar r1, IRTemp op2addr)
7342{
7343 store(mkexpr(op2addr), get_gpr_b7(r1));
7344 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(1)), get_gpr_b6(r1));
7345 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(2)), get_gpr_b5(r1));
7346 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(3)), get_gpr_b4(r1));
7347 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(4)), get_gpr_b3(r1));
7348 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(5)), get_gpr_b2(r1));
7349 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(6)), get_gpr_b1(r1));
7350 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(7)), get_gpr_b0(r1));
7351
7352 return "strvg";
7353}
7354
7355static HChar *
7356s390_irgen_SR(UChar r1, UChar r2)
7357{
7358 IRTemp op1 = newTemp(Ity_I32);
7359 IRTemp op2 = newTemp(Ity_I32);
7360 IRTemp result = newTemp(Ity_I32);
7361
7362 assign(op1, get_gpr_w1(r1));
7363 assign(op2, get_gpr_w1(r2));
7364 assign(result, binop(Iop_Sub32, mkexpr(op1), mkexpr(op2)));
7365 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_32, op1, op2);
7366 put_gpr_w1(r1, mkexpr(result));
7367
7368 return "sr";
7369}
7370
7371static HChar *
7372s390_irgen_SGR(UChar r1, UChar r2)
7373{
7374 IRTemp op1 = newTemp(Ity_I64);
7375 IRTemp op2 = newTemp(Ity_I64);
7376 IRTemp result = newTemp(Ity_I64);
7377
7378 assign(op1, get_gpr_dw0(r1));
7379 assign(op2, get_gpr_dw0(r2));
7380 assign(result, binop(Iop_Sub64, mkexpr(op1), mkexpr(op2)));
7381 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_64, op1, op2);
7382 put_gpr_dw0(r1, mkexpr(result));
7383
7384 return "sgr";
7385}
7386
7387static HChar *
7388s390_irgen_SGFR(UChar r1, UChar r2)
7389{
7390 IRTemp op1 = newTemp(Ity_I64);
7391 IRTemp op2 = newTemp(Ity_I64);
7392 IRTemp result = newTemp(Ity_I64);
7393
7394 assign(op1, get_gpr_dw0(r1));
7395 assign(op2, unop(Iop_32Sto64, get_gpr_w1(r2)));
7396 assign(result, binop(Iop_Sub64, mkexpr(op1), mkexpr(op2)));
7397 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_64, op1, op2);
7398 put_gpr_dw0(r1, mkexpr(result));
7399
7400 return "sgfr";
7401}
7402
7403static HChar *
7404s390_irgen_SRK(UChar r3, UChar r1, UChar r2)
7405{
7406 IRTemp op2 = newTemp(Ity_I32);
7407 IRTemp op3 = newTemp(Ity_I32);
7408 IRTemp result = newTemp(Ity_I32);
7409
7410 assign(op2, get_gpr_w1(r2));
7411 assign(op3, get_gpr_w1(r3));
7412 assign(result, binop(Iop_Sub32, mkexpr(op2), mkexpr(op3)));
7413 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_32, op2, op3);
7414 put_gpr_w1(r1, mkexpr(result));
7415
7416 return "srk";
7417}
7418
7419static HChar *
7420s390_irgen_SGRK(UChar r3, UChar r1, UChar r2)
7421{
7422 IRTemp op2 = newTemp(Ity_I64);
7423 IRTemp op3 = newTemp(Ity_I64);
7424 IRTemp result = newTemp(Ity_I64);
7425
7426 assign(op2, get_gpr_dw0(r2));
7427 assign(op3, get_gpr_dw0(r3));
7428 assign(result, binop(Iop_Sub64, mkexpr(op2), mkexpr(op3)));
7429 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_64, op2, op3);
7430 put_gpr_dw0(r1, mkexpr(result));
7431
7432 return "sgrk";
7433}
7434
7435static HChar *
7436s390_irgen_S(UChar r1, IRTemp op2addr)
7437{
7438 IRTemp op1 = newTemp(Ity_I32);
7439 IRTemp op2 = newTemp(Ity_I32);
7440 IRTemp result = newTemp(Ity_I32);
7441
7442 assign(op1, get_gpr_w1(r1));
7443 assign(op2, load(Ity_I32, mkexpr(op2addr)));
7444 assign(result, binop(Iop_Sub32, mkexpr(op1), mkexpr(op2)));
7445 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_32, op1, op2);
7446 put_gpr_w1(r1, mkexpr(result));
7447
7448 return "s";
7449}
7450
7451static HChar *
7452s390_irgen_SY(UChar r1, IRTemp op2addr)
7453{
7454 IRTemp op1 = newTemp(Ity_I32);
7455 IRTemp op2 = newTemp(Ity_I32);
7456 IRTemp result = newTemp(Ity_I32);
7457
7458 assign(op1, get_gpr_w1(r1));
7459 assign(op2, load(Ity_I32, mkexpr(op2addr)));
7460 assign(result, binop(Iop_Sub32, mkexpr(op1), mkexpr(op2)));
7461 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_32, op1, op2);
7462 put_gpr_w1(r1, mkexpr(result));
7463
7464 return "sy";
7465}
7466
7467static HChar *
7468s390_irgen_SG(UChar r1, IRTemp op2addr)
7469{
7470 IRTemp op1 = newTemp(Ity_I64);
7471 IRTemp op2 = newTemp(Ity_I64);
7472 IRTemp result = newTemp(Ity_I64);
7473
7474 assign(op1, get_gpr_dw0(r1));
7475 assign(op2, load(Ity_I64, mkexpr(op2addr)));
7476 assign(result, binop(Iop_Sub64, mkexpr(op1), mkexpr(op2)));
7477 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_64, op1, op2);
7478 put_gpr_dw0(r1, mkexpr(result));
7479
7480 return "sg";
7481}
7482
7483static HChar *
7484s390_irgen_SGF(UChar r1, IRTemp op2addr)
7485{
7486 IRTemp op1 = newTemp(Ity_I64);
7487 IRTemp op2 = newTemp(Ity_I64);
7488 IRTemp result = newTemp(Ity_I64);
7489
7490 assign(op1, get_gpr_dw0(r1));
7491 assign(op2, unop(Iop_32Sto64, load(Ity_I32, mkexpr(op2addr))));
7492 assign(result, binop(Iop_Sub64, mkexpr(op1), mkexpr(op2)));
7493 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_64, op1, op2);
7494 put_gpr_dw0(r1, mkexpr(result));
7495
7496 return "sgf";
7497}
7498
7499static HChar *
7500s390_irgen_SH(UChar r1, IRTemp op2addr)
7501{
7502 IRTemp op1 = newTemp(Ity_I32);
7503 IRTemp op2 = newTemp(Ity_I32);
7504 IRTemp result = newTemp(Ity_I32);
7505
7506 assign(op1, get_gpr_w1(r1));
7507 assign(op2, unop(Iop_16Sto32, load(Ity_I16, mkexpr(op2addr))));
7508 assign(result, binop(Iop_Sub32, mkexpr(op1), mkexpr(op2)));
7509 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_32, op1, op2);
7510 put_gpr_w1(r1, mkexpr(result));
7511
7512 return "sh";
7513}
7514
7515static HChar *
7516s390_irgen_SHY(UChar r1, IRTemp op2addr)
7517{
7518 IRTemp op1 = newTemp(Ity_I32);
7519 IRTemp op2 = newTemp(Ity_I32);
7520 IRTemp result = newTemp(Ity_I32);
7521
7522 assign(op1, get_gpr_w1(r1));
7523 assign(op2, unop(Iop_16Sto32, load(Ity_I16, mkexpr(op2addr))));
7524 assign(result, binop(Iop_Sub32, mkexpr(op1), mkexpr(op2)));
7525 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_32, op1, op2);
7526 put_gpr_w1(r1, mkexpr(result));
7527
7528 return "shy";
7529}
7530
7531static HChar *
7532s390_irgen_SHHHR(UChar r3 __attribute__((unused)), UChar r1, UChar r2)
7533{
7534 IRTemp op2 = newTemp(Ity_I32);
7535 IRTemp op3 = newTemp(Ity_I32);
7536 IRTemp result = newTemp(Ity_I32);
7537
7538 assign(op2, get_gpr_w0(r1));
7539 assign(op3, get_gpr_w0(r2));
7540 assign(result, binop(Iop_Sub32, mkexpr(op2), mkexpr(op3)));
7541 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_32, op2, op3);
7542 put_gpr_w0(r1, mkexpr(result));
7543
7544 return "shhhr";
7545}
7546
7547static HChar *
7548s390_irgen_SHHLR(UChar r3 __attribute__((unused)), UChar r1, UChar r2)
7549{
7550 IRTemp op2 = newTemp(Ity_I32);
7551 IRTemp op3 = newTemp(Ity_I32);
7552 IRTemp result = newTemp(Ity_I32);
7553
7554 assign(op2, get_gpr_w0(r1));
7555 assign(op3, get_gpr_w1(r2));
7556 assign(result, binop(Iop_Sub32, mkexpr(op2), mkexpr(op3)));
7557 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_32, op2, op3);
7558 put_gpr_w0(r1, mkexpr(result));
7559
7560 return "shhlr";
7561}
7562
7563static HChar *
7564s390_irgen_SLR(UChar r1, UChar r2)
7565{
7566 IRTemp op1 = newTemp(Ity_I32);
7567 IRTemp op2 = newTemp(Ity_I32);
7568 IRTemp result = newTemp(Ity_I32);
7569
7570 assign(op1, get_gpr_w1(r1));
7571 assign(op2, get_gpr_w1(r2));
7572 assign(result, binop(Iop_Sub32, mkexpr(op1), mkexpr(op2)));
7573 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_SUB_32, op1, op2);
7574 put_gpr_w1(r1, mkexpr(result));
7575
7576 return "slr";
7577}
7578
7579static HChar *
7580s390_irgen_SLGR(UChar r1, UChar r2)
7581{
7582 IRTemp op1 = newTemp(Ity_I64);
7583 IRTemp op2 = newTemp(Ity_I64);
7584 IRTemp result = newTemp(Ity_I64);
7585
7586 assign(op1, get_gpr_dw0(r1));
7587 assign(op2, get_gpr_dw0(r2));
7588 assign(result, binop(Iop_Sub64, mkexpr(op1), mkexpr(op2)));
7589 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_SUB_64, op1, op2);
7590 put_gpr_dw0(r1, mkexpr(result));
7591
7592 return "slgr";
7593}
7594
7595static HChar *
7596s390_irgen_SLGFR(UChar r1, UChar r2)
7597{
7598 IRTemp op1 = newTemp(Ity_I64);
7599 IRTemp op2 = newTemp(Ity_I64);
7600 IRTemp result = newTemp(Ity_I64);
7601
7602 assign(op1, get_gpr_dw0(r1));
7603 assign(op2, unop(Iop_32Uto64, get_gpr_w1(r2)));
7604 assign(result, binop(Iop_Sub64, mkexpr(op1), mkexpr(op2)));
7605 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_SUB_64, op1, op2);
7606 put_gpr_dw0(r1, mkexpr(result));
7607
7608 return "slgfr";
7609}
7610
7611static HChar *
7612s390_irgen_SLRK(UChar r3, UChar r1, UChar r2)
7613{
7614 IRTemp op2 = newTemp(Ity_I32);
7615 IRTemp op3 = newTemp(Ity_I32);
7616 IRTemp result = newTemp(Ity_I32);
7617
7618 assign(op2, get_gpr_w1(r2));
7619 assign(op3, get_gpr_w1(r3));
7620 assign(result, binop(Iop_Sub32, mkexpr(op2), mkexpr(op3)));
7621 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_SUB_32, op2, op3);
7622 put_gpr_w1(r1, mkexpr(result));
7623
7624 return "slrk";
7625}
7626
7627static HChar *
7628s390_irgen_SLGRK(UChar r3, UChar r1, UChar r2)
7629{
7630 IRTemp op2 = newTemp(Ity_I64);
7631 IRTemp op3 = newTemp(Ity_I64);
7632 IRTemp result = newTemp(Ity_I64);
7633
7634 assign(op2, get_gpr_dw0(r2));
7635 assign(op3, get_gpr_dw0(r3));
7636 assign(result, binop(Iop_Sub64, mkexpr(op2), mkexpr(op3)));
7637 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_SUB_64, op2, op3);
7638 put_gpr_dw0(r1, mkexpr(result));
7639
7640 return "slgrk";
7641}
7642
7643static HChar *
7644s390_irgen_SL(UChar r1, IRTemp op2addr)
7645{
7646 IRTemp op1 = newTemp(Ity_I32);
7647 IRTemp op2 = newTemp(Ity_I32);
7648 IRTemp result = newTemp(Ity_I32);
7649
7650 assign(op1, get_gpr_w1(r1));
7651 assign(op2, load(Ity_I32, mkexpr(op2addr)));
7652 assign(result, binop(Iop_Sub32, mkexpr(op1), mkexpr(op2)));
7653 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_SUB_32, op1, op2);
7654 put_gpr_w1(r1, mkexpr(result));
7655
7656 return "sl";
7657}
7658
7659static HChar *
7660s390_irgen_SLY(UChar r1, IRTemp op2addr)
7661{
7662 IRTemp op1 = newTemp(Ity_I32);
7663 IRTemp op2 = newTemp(Ity_I32);
7664 IRTemp result = newTemp(Ity_I32);
7665
7666 assign(op1, get_gpr_w1(r1));
7667 assign(op2, load(Ity_I32, mkexpr(op2addr)));
7668 assign(result, binop(Iop_Sub32, mkexpr(op1), mkexpr(op2)));
7669 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_SUB_32, op1, op2);
7670 put_gpr_w1(r1, mkexpr(result));
7671
7672 return "sly";
7673}
7674
7675static HChar *
7676s390_irgen_SLG(UChar r1, IRTemp op2addr)
7677{
7678 IRTemp op1 = newTemp(Ity_I64);
7679 IRTemp op2 = newTemp(Ity_I64);
7680 IRTemp result = newTemp(Ity_I64);
7681
7682 assign(op1, get_gpr_dw0(r1));
7683 assign(op2, load(Ity_I64, mkexpr(op2addr)));
7684 assign(result, binop(Iop_Sub64, mkexpr(op1), mkexpr(op2)));
7685 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_SUB_64, op1, op2);
7686 put_gpr_dw0(r1, mkexpr(result));
7687
7688 return "slg";
7689}
7690
7691static HChar *
7692s390_irgen_SLGF(UChar r1, IRTemp op2addr)
7693{
7694 IRTemp op1 = newTemp(Ity_I64);
7695 IRTemp op2 = newTemp(Ity_I64);
7696 IRTemp result = newTemp(Ity_I64);
7697
7698 assign(op1, get_gpr_dw0(r1));
7699 assign(op2, unop(Iop_32Uto64, load(Ity_I32, mkexpr(op2addr))));
7700 assign(result, binop(Iop_Sub64, mkexpr(op1), mkexpr(op2)));
7701 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_SUB_64, op1, op2);
7702 put_gpr_dw0(r1, mkexpr(result));
7703
7704 return "slgf";
7705}
7706
7707static HChar *
7708s390_irgen_SLFI(UChar r1, UInt i2)
7709{
7710 IRTemp op1 = newTemp(Ity_I32);
7711 UInt op2;
7712 IRTemp result = newTemp(Ity_I32);
7713
7714 assign(op1, get_gpr_w1(r1));
7715 op2 = i2;
7716 assign(result, binop(Iop_Sub32, mkexpr(op1), mkU32(op2)));
7717 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_SUB_32, op1, mktemp(Ity_I32,
7718 mkU32(op2)));
7719 put_gpr_w1(r1, mkexpr(result));
7720
7721 return "slfi";
7722}
7723
7724static HChar *
7725s390_irgen_SLGFI(UChar r1, UInt i2)
7726{
7727 IRTemp op1 = newTemp(Ity_I64);
7728 ULong op2;
7729 IRTemp result = newTemp(Ity_I64);
7730
7731 assign(op1, get_gpr_dw0(r1));
7732 op2 = (ULong)i2;
7733 assign(result, binop(Iop_Sub64, mkexpr(op1), mkU64(op2)));
7734 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_SUB_64, op1, mktemp(Ity_I64,
7735 mkU64(op2)));
7736 put_gpr_dw0(r1, mkexpr(result));
7737
7738 return "slgfi";
7739}
7740
7741static HChar *
7742s390_irgen_SLHHHR(UChar r3 __attribute__((unused)), UChar r1, UChar r2)
7743{
7744 IRTemp op2 = newTemp(Ity_I32);
7745 IRTemp op3 = newTemp(Ity_I32);
7746 IRTemp result = newTemp(Ity_I32);
7747
7748 assign(op2, get_gpr_w0(r1));
7749 assign(op3, get_gpr_w0(r2));
7750 assign(result, binop(Iop_Sub32, mkexpr(op2), mkexpr(op3)));
7751 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_SUB_32, op2, op3);
7752 put_gpr_w0(r1, mkexpr(result));
7753
7754 return "slhhhr";
7755}
7756
7757static HChar *
7758s390_irgen_SLHHLR(UChar r3 __attribute__((unused)), UChar r1, UChar r2)
7759{
7760 IRTemp op2 = newTemp(Ity_I32);
7761 IRTemp op3 = newTemp(Ity_I32);
7762 IRTemp result = newTemp(Ity_I32);
7763
7764 assign(op2, get_gpr_w0(r1));
7765 assign(op3, get_gpr_w1(r2));
7766 assign(result, binop(Iop_Sub32, mkexpr(op2), mkexpr(op3)));
7767 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_SUB_32, op2, op3);
7768 put_gpr_w0(r1, mkexpr(result));
7769
7770 return "slhhlr";
7771}
7772
7773static HChar *
7774s390_irgen_SLBR(UChar r1, UChar r2)
7775{
7776 IRTemp op1 = newTemp(Ity_I32);
7777 IRTemp op2 = newTemp(Ity_I32);
7778 IRTemp result = newTemp(Ity_I32);
7779 IRTemp borrow_in = newTemp(Ity_I32);
7780
7781 assign(op1, get_gpr_w1(r1));
7782 assign(op2, get_gpr_w1(r2));
7783 assign(borrow_in, binop(Iop_Sub32, mkU32(1), binop(Iop_Shr32,
7784 s390_call_calculate_cc(), mkU8(1))));
7785 assign(result, binop(Iop_Sub32, binop(Iop_Sub32, mkexpr(op1), mkexpr(op2)),
7786 mkexpr(borrow_in)));
7787 s390_cc_thunk_putZZZ(S390_CC_OP_UNSIGNED_SUBB_32, op1, op2, borrow_in);
7788 put_gpr_w1(r1, mkexpr(result));
7789
7790 return "slbr";
7791}
7792
7793static HChar *
7794s390_irgen_SLBGR(UChar r1, UChar r2)
7795{
7796 IRTemp op1 = newTemp(Ity_I64);
7797 IRTemp op2 = newTemp(Ity_I64);
7798 IRTemp result = newTemp(Ity_I64);
7799 IRTemp borrow_in = newTemp(Ity_I64);
7800
7801 assign(op1, get_gpr_dw0(r1));
7802 assign(op2, get_gpr_dw0(r2));
7803 assign(borrow_in, unop(Iop_32Uto64, binop(Iop_Sub32, mkU32(1),
7804 binop(Iop_Shr32, s390_call_calculate_cc(), mkU8(1)))));
7805 assign(result, binop(Iop_Sub64, binop(Iop_Sub64, mkexpr(op1), mkexpr(op2)),
7806 mkexpr(borrow_in)));
7807 s390_cc_thunk_putZZZ(S390_CC_OP_UNSIGNED_SUBB_64, op1, op2, borrow_in);
7808 put_gpr_dw0(r1, mkexpr(result));
7809
7810 return "slbgr";
7811}
7812
7813static HChar *
7814s390_irgen_SLB(UChar r1, IRTemp op2addr)
7815{
7816 IRTemp op1 = newTemp(Ity_I32);
7817 IRTemp op2 = newTemp(Ity_I32);
7818 IRTemp result = newTemp(Ity_I32);
7819 IRTemp borrow_in = newTemp(Ity_I32);
7820
7821 assign(op1, get_gpr_w1(r1));
7822 assign(op2, load(Ity_I32, mkexpr(op2addr)));
7823 assign(borrow_in, binop(Iop_Sub32, mkU32(1), binop(Iop_Shr32,
7824 s390_call_calculate_cc(), mkU8(1))));
7825 assign(result, binop(Iop_Sub32, binop(Iop_Sub32, mkexpr(op1), mkexpr(op2)),
7826 mkexpr(borrow_in)));
7827 s390_cc_thunk_putZZZ(S390_CC_OP_UNSIGNED_SUBB_32, op1, op2, borrow_in);
7828 put_gpr_w1(r1, mkexpr(result));
7829
7830 return "slb";
7831}
7832
7833static HChar *
7834s390_irgen_SLBG(UChar r1, IRTemp op2addr)
7835{
7836 IRTemp op1 = newTemp(Ity_I64);
7837 IRTemp op2 = newTemp(Ity_I64);
7838 IRTemp result = newTemp(Ity_I64);
7839 IRTemp borrow_in = newTemp(Ity_I64);
7840
7841 assign(op1, get_gpr_dw0(r1));
7842 assign(op2, load(Ity_I64, mkexpr(op2addr)));
7843 assign(borrow_in, unop(Iop_32Uto64, binop(Iop_Sub32, mkU32(1),
7844 binop(Iop_Shr32, s390_call_calculate_cc(), mkU8(1)))));
7845 assign(result, binop(Iop_Sub64, binop(Iop_Sub64, mkexpr(op1), mkexpr(op2)),
7846 mkexpr(borrow_in)));
7847 s390_cc_thunk_putZZZ(S390_CC_OP_UNSIGNED_SUBB_64, op1, op2, borrow_in);
7848 put_gpr_dw0(r1, mkexpr(result));
7849
7850 return "slbg";
7851}
7852
7853static HChar *
7854s390_irgen_SVC(UChar i)
7855{
7856 IRTemp sysno = newTemp(Ity_I64);
7857
7858 if (i != 0) {
7859 assign(sysno, mkU64(i));
7860 } else {
7861 assign(sysno, unop(Iop_32Uto64, get_gpr_w1(1)));
7862 }
7863 system_call(mkexpr(sysno));
7864
7865 return "svc";
7866}
7867
7868static HChar *
7869s390_irgen_TS(IRTemp op2addr)
7870{
7871 IRTemp value = newTemp(Ity_I8);
7872
7873 assign(value, load(Ity_I8, mkexpr(op2addr)));
7874 s390_cc_thunk_putZ(S390_CC_OP_TEST_AND_SET, value);
7875 store(mkexpr(op2addr), mkU8(255));
7876
7877 return "ts";
7878}
7879
7880static HChar *
7881s390_irgen_TM(UChar i2, IRTemp op1addr)
7882{
7883 UChar mask;
7884 IRTemp value = newTemp(Ity_I8);
7885
7886 mask = i2;
7887 assign(value, load(Ity_I8, mkexpr(op1addr)));
7888 s390_cc_thunk_putZZ(S390_CC_OP_TEST_UNDER_MASK_8, value, mktemp(Ity_I8,
7889 mkU8(mask)));
7890
7891 return "tm";
7892}
7893
7894static HChar *
7895s390_irgen_TMY(UChar i2, IRTemp op1addr)
7896{
7897 UChar mask;
7898 IRTemp value = newTemp(Ity_I8);
7899
7900 mask = i2;
7901 assign(value, load(Ity_I8, mkexpr(op1addr)));
7902 s390_cc_thunk_putZZ(S390_CC_OP_TEST_UNDER_MASK_8, value, mktemp(Ity_I8,
7903 mkU8(mask)));
7904
7905 return "tmy";
7906}
7907
7908static HChar *
7909s390_irgen_TMHH(UChar r1, UShort i2)
7910{
7911 UShort mask;
7912 IRTemp value = newTemp(Ity_I16);
7913
7914 mask = i2;
7915 assign(value, get_gpr_hw0(r1));
7916 s390_cc_thunk_putZZ(S390_CC_OP_TEST_UNDER_MASK_16, value, mktemp(Ity_I16,
7917 mkU16(mask)));
7918
7919 return "tmhh";
7920}
7921
7922static HChar *
7923s390_irgen_TMHL(UChar r1, UShort i2)
7924{
7925 UShort mask;
7926 IRTemp value = newTemp(Ity_I16);
7927
7928 mask = i2;
7929 assign(value, get_gpr_hw1(r1));
7930 s390_cc_thunk_putZZ(S390_CC_OP_TEST_UNDER_MASK_16, value, mktemp(Ity_I16,
7931 mkU16(mask)));
7932
7933 return "tmhl";
7934}
7935
7936static HChar *
7937s390_irgen_TMLH(UChar r1, UShort i2)
7938{
7939 UShort mask;
7940 IRTemp value = newTemp(Ity_I16);
7941
7942 mask = i2;
7943 assign(value, get_gpr_hw2(r1));
7944 s390_cc_thunk_putZZ(S390_CC_OP_TEST_UNDER_MASK_16, value, mktemp(Ity_I16,
7945 mkU16(mask)));
7946
7947 return "tmlh";
7948}
7949
7950static HChar *
7951s390_irgen_TMLL(UChar r1, UShort i2)
7952{
7953 UShort mask;
7954 IRTemp value = newTemp(Ity_I16);
7955
7956 mask = i2;
7957 assign(value, get_gpr_hw3(r1));
7958 s390_cc_thunk_putZZ(S390_CC_OP_TEST_UNDER_MASK_16, value, mktemp(Ity_I16,
7959 mkU16(mask)));
7960
7961 return "tmll";
7962}
7963
7964static HChar *
7965s390_irgen_EFPC(UChar r1)
7966{
7967 put_gpr_w1(r1, get_fpc_w0());
7968
7969 return "efpc";
7970}
7971
7972static HChar *
7973s390_irgen_LER(UChar r1, UChar r2)
7974{
7975 put_fpr_w0(r1, get_fpr_w0(r2));
7976
7977 return "ler";
7978}
7979
7980static HChar *
7981s390_irgen_LDR(UChar r1, UChar r2)
7982{
7983 put_fpr_dw0(r1, get_fpr_dw0(r2));
7984
7985 return "ldr";
7986}
7987
7988static HChar *
7989s390_irgen_LXR(UChar r1, UChar r2)
7990{
7991 put_fpr_dw0(r1, get_fpr_dw0(r2));
7992 put_fpr_dw0(r1 + 2, get_fpr_dw0(r2 + 2));
7993
7994 return "lxr";
7995}
7996
7997static HChar *
7998s390_irgen_LE(UChar r1, IRTemp op2addr)
7999{
8000 put_fpr_w0(r1, load(Ity_F32, mkexpr(op2addr)));
8001
8002 return "le";
8003}
8004
8005static HChar *
8006s390_irgen_LD(UChar r1, IRTemp op2addr)
8007{
8008 put_fpr_dw0(r1, load(Ity_F64, mkexpr(op2addr)));
8009
8010 return "ld";
8011}
8012
8013static HChar *
8014s390_irgen_LEY(UChar r1, IRTemp op2addr)
8015{
8016 put_fpr_w0(r1, load(Ity_F32, mkexpr(op2addr)));
8017
8018 return "ley";
8019}
8020
8021static HChar *
8022s390_irgen_LDY(UChar r1, IRTemp op2addr)
8023{
8024 put_fpr_dw0(r1, load(Ity_F64, mkexpr(op2addr)));
8025
8026 return "ldy";
8027}
8028
8029static HChar *
8030s390_irgen_LFPC(IRTemp op2addr)
8031{
8032 put_fpc_w0(load(Ity_I32, mkexpr(op2addr)));
8033
8034 return "lfpc";
8035}
8036
8037static HChar *
8038s390_irgen_LZER(UChar r1)
8039{
8040 put_fpr_w0(r1, mkF32i(0x0));
8041
8042 return "lzer";
8043}
8044
8045static HChar *
8046s390_irgen_LZDR(UChar r1)
8047{
8048 put_fpr_dw0(r1, mkF64i(0x0));
8049
8050 return "lzdr";
8051}
8052
8053static HChar *
8054s390_irgen_LZXR(UChar r1)
8055{
8056 put_fpr_dw0(r1, mkF64i(0x0));
8057 put_fpr_dw0(r1 + 2, mkF64i(0x0));
8058
8059 return "lzxr";
8060}
8061
8062static HChar *
8063s390_irgen_SRNM(IRTemp op2addr)
8064{
8065 UInt mask;
8066
8067 mask = 3;
8068 put_fpc_w0(binop(Iop_Or32, binop(Iop_And32, get_fpc_w0(), mkU32(~mask)),
8069 binop(Iop_And32, unop(Iop_64to32, mkexpr(op2addr)), mkU32(mask)))
8070 );
8071
8072 return "srnm";
8073}
8074
8075static HChar *
8076s390_irgen_SFPC(UChar r1)
8077{
8078 put_fpc_w0(get_gpr_w1(r1));
8079
8080 return "sfpc";
8081}
8082
8083static HChar *
8084s390_irgen_STE(UChar r1, IRTemp op2addr)
8085{
8086 store(mkexpr(op2addr), get_fpr_w0(r1));
8087
8088 return "ste";
8089}
8090
8091static HChar *
8092s390_irgen_STD(UChar r1, IRTemp op2addr)
8093{
8094 store(mkexpr(op2addr), get_fpr_dw0(r1));
8095
8096 return "std";
8097}
8098
8099static HChar *
8100s390_irgen_STEY(UChar r1, IRTemp op2addr)
8101{
8102 store(mkexpr(op2addr), get_fpr_w0(r1));
8103
8104 return "stey";
8105}
8106
8107static HChar *
8108s390_irgen_STDY(UChar r1, IRTemp op2addr)
8109{
8110 store(mkexpr(op2addr), get_fpr_dw0(r1));
8111
8112 return "stdy";
8113}
8114
8115static HChar *
8116s390_irgen_STFPC(IRTemp op2addr)
8117{
8118 store(mkexpr(op2addr), get_fpc_w0());
8119
8120 return "stfpc";
8121}
8122
8123static HChar *
8124s390_irgen_AEBR(UChar r1, UChar r2)
8125{
8126 IRTemp op1 = newTemp(Ity_F32);
8127 IRTemp op2 = newTemp(Ity_F32);
8128 IRTemp result = newTemp(Ity_F32);
8129
8130 assign(op1, get_fpr_w0(r1));
8131 assign(op2, get_fpr_w0(r2));
8132 assign(result, triop(Iop_AddF32, mkU32(Irrm_NEAREST), mkexpr(op1),
8133 mkexpr(op2)));
8134 s390_cc_thunk_putF(S390_CC_OP_BFP_RESULT_32, result);
8135 put_fpr_w0(r1, mkexpr(result));
8136
8137 return "aebr";
8138}
8139
8140static HChar *
8141s390_irgen_ADBR(UChar r1, UChar r2)
8142{
8143 IRTemp op1 = newTemp(Ity_F64);
8144 IRTemp op2 = newTemp(Ity_F64);
8145 IRTemp result = newTemp(Ity_F64);
8146
8147 assign(op1, get_fpr_dw0(r1));
8148 assign(op2, get_fpr_dw0(r2));
8149 assign(result, triop(Iop_AddF64, mkU32(Irrm_NEAREST), mkexpr(op1),
8150 mkexpr(op2)));
8151 s390_cc_thunk_putF(S390_CC_OP_BFP_RESULT_64, result);
8152 put_fpr_dw0(r1, mkexpr(result));
8153
8154 return "adbr";
8155}
8156
8157static HChar *
8158s390_irgen_AEB(UChar r1, IRTemp op2addr)
8159{
8160 IRTemp op1 = newTemp(Ity_F32);
8161 IRTemp op2 = newTemp(Ity_F32);
8162 IRTemp result = newTemp(Ity_F32);
8163
8164 assign(op1, get_fpr_w0(r1));
8165 assign(op2, load(Ity_F32, mkexpr(op2addr)));
8166 assign(result, triop(Iop_AddF32, mkU32(Irrm_NEAREST), mkexpr(op1),
8167 mkexpr(op2)));
8168 s390_cc_thunk_putF(S390_CC_OP_BFP_RESULT_32, result);
8169 put_fpr_w0(r1, mkexpr(result));
8170
8171 return "aeb";
8172}
8173
8174static HChar *
8175s390_irgen_ADB(UChar r1, IRTemp op2addr)
8176{
8177 IRTemp op1 = newTemp(Ity_F64);
8178 IRTemp op2 = newTemp(Ity_F64);
8179 IRTemp result = newTemp(Ity_F64);
8180
8181 assign(op1, get_fpr_dw0(r1));
8182 assign(op2, load(Ity_F64, mkexpr(op2addr)));
8183 assign(result, triop(Iop_AddF64, mkU32(Irrm_NEAREST), mkexpr(op1),
8184 mkexpr(op2)));
8185 s390_cc_thunk_putF(S390_CC_OP_BFP_RESULT_64, result);
8186 put_fpr_dw0(r1, mkexpr(result));
8187
8188 return "adb";
8189}
8190
8191static HChar *
8192s390_irgen_CEFBR(UChar r1, UChar r2)
8193{
8194 IRTemp op2 = newTemp(Ity_I32);
8195
8196 assign(op2, get_gpr_w1(r2));
8197 put_fpr_w0(r1, binop(Iop_I32StoF32, mkU32(Irrm_NEAREST), mkexpr(op2)));
8198
8199 return "cefbr";
8200}
8201
8202static HChar *
8203s390_irgen_CDFBR(UChar r1, UChar r2)
8204{
8205 IRTemp op2 = newTemp(Ity_I32);
8206
8207 assign(op2, get_gpr_w1(r2));
8208 put_fpr_dw0(r1, unop(Iop_I32StoF64, mkexpr(op2)));
8209
8210 return "cdfbr";
8211}
8212
8213static HChar *
8214s390_irgen_CEGBR(UChar r1, UChar r2)
8215{
8216 IRTemp op2 = newTemp(Ity_I64);
8217
8218 assign(op2, get_gpr_dw0(r2));
8219 put_fpr_w0(r1, binop(Iop_I64StoF32, mkU32(Irrm_NEAREST), mkexpr(op2)));
8220
8221 return "cegbr";
8222}
8223
8224static HChar *
8225s390_irgen_CDGBR(UChar r1, UChar r2)
8226{
8227 IRTemp op2 = newTemp(Ity_I64);
8228
8229 assign(op2, get_gpr_dw0(r2));
8230 put_fpr_dw0(r1, binop(Iop_I64StoF64, mkU32(Irrm_NEAREST), mkexpr(op2)));
8231
8232 return "cdgbr";
8233}
8234
8235static HChar *
8236s390_irgen_CFEBR(UChar r3, UChar r1, UChar r2)
8237{
8238 IRTemp op = newTemp(Ity_F32);
8239 IRTemp result = newTemp(Ity_I32);
8240
8241 assign(op, get_fpr_w0(r2));
8242 assign(result, binop(Iop_F32toI32S, mkU32(encode_rounding_mode(r3)),
8243 mkexpr(op)));
8244 put_gpr_w1(r1, mkexpr(result));
8245 s390_cc_thunk_putF(S390_CC_OP_BFP_32_TO_INT_32, op);
8246
8247 return "cfebr";
8248}
8249
8250static HChar *
8251s390_irgen_CFDBR(UChar r3, UChar r1, UChar r2)
8252{
8253 IRTemp op = newTemp(Ity_F64);
8254 IRTemp result = newTemp(Ity_I32);
8255
8256 assign(op, get_fpr_dw0(r2));
8257 assign(result, binop(Iop_F64toI32S, mkU32(encode_rounding_mode(r3)),
8258 mkexpr(op)));
8259 put_gpr_w1(r1, mkexpr(result));
8260 s390_cc_thunk_putF(S390_CC_OP_BFP_64_TO_INT_32, op);
8261
8262 return "cfdbr";
8263}
8264
8265static HChar *
8266s390_irgen_CGEBR(UChar r3, UChar r1, UChar r2)
8267{
8268 IRTemp op = newTemp(Ity_F32);
8269 IRTemp result = newTemp(Ity_I64);
8270
8271 assign(op, get_fpr_w0(r2));
8272 assign(result, binop(Iop_F32toI64S, mkU32(encode_rounding_mode(r3)),
8273 mkexpr(op)));
8274 put_gpr_dw0(r1, mkexpr(result));
8275 s390_cc_thunk_putF(S390_CC_OP_BFP_32_TO_INT_64, op);
8276
8277 return "cgebr";
8278}
8279
8280static HChar *
8281s390_irgen_CGDBR(UChar r3, UChar r1, UChar r2)
8282{
8283 IRTemp op = newTemp(Ity_F64);
8284 IRTemp result = newTemp(Ity_I64);
8285
8286 assign(op, get_fpr_dw0(r2));
8287 assign(result, binop(Iop_F64toI64S, mkU32(encode_rounding_mode(r3)),
8288 mkexpr(op)));
8289 put_gpr_dw0(r1, mkexpr(result));
8290 s390_cc_thunk_putF(S390_CC_OP_BFP_64_TO_INT_64, op);
8291
8292 return "cgdbr";
8293}
8294
8295static HChar *
8296s390_irgen_DEBR(UChar r1, UChar r2)
8297{
8298 IRTemp op1 = newTemp(Ity_F32);
8299 IRTemp op2 = newTemp(Ity_F32);
8300 IRTemp result = newTemp(Ity_F32);
8301
8302 assign(op1, get_fpr_w0(r1));
8303 assign(op2, get_fpr_w0(r2));
8304 assign(result, triop(Iop_DivF32, mkU32(Irrm_NEAREST), mkexpr(op1),
8305 mkexpr(op2)));
8306 put_fpr_w0(r1, mkexpr(result));
8307
8308 return "debr";
8309}
8310
8311static HChar *
8312s390_irgen_DDBR(UChar r1, UChar r2)
8313{
8314 IRTemp op1 = newTemp(Ity_F64);
8315 IRTemp op2 = newTemp(Ity_F64);
8316 IRTemp result = newTemp(Ity_F64);
8317
8318 assign(op1, get_fpr_dw0(r1));
8319 assign(op2, get_fpr_dw0(r2));
8320 assign(result, triop(Iop_DivF64, mkU32(Irrm_NEAREST), mkexpr(op1),
8321 mkexpr(op2)));
8322 put_fpr_dw0(r1, mkexpr(result));
8323
8324 return "ddbr";
8325}
8326
8327static HChar *
8328s390_irgen_DEB(UChar r1, IRTemp op2addr)
8329{
8330 IRTemp op1 = newTemp(Ity_F32);
8331 IRTemp op2 = newTemp(Ity_F32);
8332 IRTemp result = newTemp(Ity_F32);
8333
8334 assign(op1, get_fpr_w0(r1));
8335 assign(op2, load(Ity_F32, mkexpr(op2addr)));
8336 assign(result, triop(Iop_DivF32, mkU32(Irrm_NEAREST), mkexpr(op1),
8337 mkexpr(op2)));
8338 put_fpr_w0(r1, mkexpr(result));
8339
8340 return "deb";
8341}
8342
8343static HChar *
8344s390_irgen_DDB(UChar r1, IRTemp op2addr)
8345{
8346 IRTemp op1 = newTemp(Ity_F64);
8347 IRTemp op2 = newTemp(Ity_F64);
8348 IRTemp result = newTemp(Ity_F64);
8349
8350 assign(op1, get_fpr_dw0(r1));
8351 assign(op2, load(Ity_F64, mkexpr(op2addr)));
8352 assign(result, triop(Iop_DivF64, mkU32(Irrm_NEAREST), mkexpr(op1),
8353 mkexpr(op2)));
8354 put_fpr_dw0(r1, mkexpr(result));
8355
8356 return "ddb";
8357}
8358
8359static HChar *
8360s390_irgen_LTEBR(UChar r1, UChar r2)
8361{
8362 IRTemp result = newTemp(Ity_F32);
8363
8364 assign(result, get_fpr_w0(r2));
8365 put_fpr_w0(r1, mkexpr(result));
8366 s390_cc_thunk_putF(S390_CC_OP_BFP_RESULT_32, result);
8367
8368 return "ltebr";
8369}
8370
8371static HChar *
8372s390_irgen_LTDBR(UChar r1, UChar r2)
8373{
8374 IRTemp result = newTemp(Ity_F64);
8375
8376 assign(result, get_fpr_dw0(r2));
8377 put_fpr_dw0(r1, mkexpr(result));
8378 s390_cc_thunk_putF(S390_CC_OP_BFP_RESULT_64, result);
8379
8380 return "ltdbr";
8381}
8382
8383static HChar *
8384s390_irgen_LCEBR(UChar r1, UChar r2)
8385{
8386 IRTemp result = newTemp(Ity_F32);
8387
8388 assign(result, unop(Iop_NegF32, get_fpr_w0(r2)));
8389 put_fpr_w0(r1, mkexpr(result));
8390 s390_cc_thunk_putF(S390_CC_OP_BFP_RESULT_32, result);
8391
8392 return "lcebr";
8393}
8394
8395static HChar *
8396s390_irgen_LCDBR(UChar r1, UChar r2)
8397{
8398 IRTemp result = newTemp(Ity_F64);
8399
8400 assign(result, unop(Iop_NegF64, get_fpr_dw0(r2)));
8401 put_fpr_dw0(r1, mkexpr(result));
8402 s390_cc_thunk_putF(S390_CC_OP_BFP_RESULT_64, result);
8403
8404 return "lcdbr";
8405}
8406
8407static HChar *
8408s390_irgen_LDEBR(UChar r1, UChar r2)
8409{
8410 IRTemp op = newTemp(Ity_F32);
8411
8412 assign(op, get_fpr_w0(r2));
8413 put_fpr_dw0(r1, unop(Iop_F32toF64, mkexpr(op)));
8414
8415 return "ldebr";
8416}
8417
8418static HChar *
8419s390_irgen_LDEB(UChar r1, IRTemp op2addr)
8420{
8421 IRTemp op = newTemp(Ity_F32);
8422
8423 assign(op, load(Ity_F32, mkexpr(op2addr)));
8424 put_fpr_dw0(r1, unop(Iop_F32toF64, mkexpr(op)));
8425
8426 return "ldeb";
8427}
8428
8429static HChar *
8430s390_irgen_LEDBR(UChar r1, UChar r2)
8431{
8432 IRTemp op = newTemp(Ity_F64);
8433
8434 assign(op, get_fpr_dw0(r2));
8435 put_fpr_w0(r1, binop(Iop_F64toF32, mkU32(Irrm_NEAREST), mkexpr(op)));
8436
8437 return "ledbr";
8438}
8439
8440static HChar *
8441s390_irgen_MEEBR(UChar r1, UChar r2)
8442{
8443 IRTemp op1 = newTemp(Ity_F32);
8444 IRTemp op2 = newTemp(Ity_F32);
8445 IRTemp result = newTemp(Ity_F32);
8446
8447 assign(op1, get_fpr_w0(r1));
8448 assign(op2, get_fpr_w0(r2));
8449 assign(result, triop(Iop_MulF32, mkU32(Irrm_NEAREST), mkexpr(op1),
8450 mkexpr(op2)));
8451 put_fpr_w0(r1, mkexpr(result));
8452
8453 return "meebr";
8454}
8455
8456static HChar *
8457s390_irgen_MDBR(UChar r1, UChar r2)
8458{
8459 IRTemp op1 = newTemp(Ity_F64);
8460 IRTemp op2 = newTemp(Ity_F64);
8461 IRTemp result = newTemp(Ity_F64);
8462
8463 assign(op1, get_fpr_dw0(r1));
8464 assign(op2, get_fpr_dw0(r2));
8465 assign(result, triop(Iop_MulF64, mkU32(Irrm_NEAREST), mkexpr(op1),
8466 mkexpr(op2)));
8467 put_fpr_dw0(r1, mkexpr(result));
8468
8469 return "mdbr";
8470}
8471
8472static HChar *
8473s390_irgen_MEEB(UChar r1, IRTemp op2addr)
8474{
8475 IRTemp op1 = newTemp(Ity_F32);
8476 IRTemp op2 = newTemp(Ity_F32);
8477 IRTemp result = newTemp(Ity_F32);
8478
8479 assign(op1, get_fpr_w0(r1));
8480 assign(op2, load(Ity_F32, mkexpr(op2addr)));
8481 assign(result, triop(Iop_MulF32, mkU32(Irrm_NEAREST), mkexpr(op1),
8482 mkexpr(op2)));
8483 put_fpr_w0(r1, mkexpr(result));
8484
8485 return "meeb";
8486}
8487
8488static HChar *
8489s390_irgen_MDB(UChar r1, IRTemp op2addr)
8490{
8491 IRTemp op1 = newTemp(Ity_F64);
8492 IRTemp op2 = newTemp(Ity_F64);
8493 IRTemp result = newTemp(Ity_F64);
8494
8495 assign(op1, get_fpr_dw0(r1));
8496 assign(op2, load(Ity_F64, mkexpr(op2addr)));
8497 assign(result, triop(Iop_MulF64, mkU32(Irrm_NEAREST), mkexpr(op1),
8498 mkexpr(op2)));
8499 put_fpr_dw0(r1, mkexpr(result));
8500
8501 return "mdb";
8502}
8503
8504static HChar *
8505s390_irgen_SEBR(UChar r1, UChar r2)
8506{
8507 IRTemp op1 = newTemp(Ity_F32);
8508 IRTemp op2 = newTemp(Ity_F32);
8509 IRTemp result = newTemp(Ity_F32);
8510
8511 assign(op1, get_fpr_w0(r1));
8512 assign(op2, get_fpr_w0(r2));
8513 assign(result, triop(Iop_SubF32, mkU32(Irrm_NEAREST), mkexpr(op1),
8514 mkexpr(op2)));
8515 s390_cc_thunk_putF(S390_CC_OP_BFP_RESULT_32, result);
8516 put_fpr_w0(r1, mkexpr(result));
8517
8518 return "sebr";
8519}
8520
8521static HChar *
8522s390_irgen_SDBR(UChar r1, UChar r2)
8523{
8524 IRTemp op1 = newTemp(Ity_F64);
8525 IRTemp op2 = newTemp(Ity_F64);
8526 IRTemp result = newTemp(Ity_F64);
8527
8528 assign(op1, get_fpr_dw0(r1));
8529 assign(op2, get_fpr_dw0(r2));
8530 assign(result, triop(Iop_SubF64, mkU32(Irrm_NEAREST), mkexpr(op1),
8531 mkexpr(op2)));
8532 s390_cc_thunk_putF(S390_CC_OP_BFP_RESULT_64, result);
8533 put_fpr_dw0(r1, mkexpr(result));
8534
8535 return "sdbr";
8536}
8537
8538static HChar *
8539s390_irgen_SEB(UChar r1, IRTemp op2addr)
8540{
8541 IRTemp op1 = newTemp(Ity_F32);
8542 IRTemp op2 = newTemp(Ity_F32);
8543 IRTemp result = newTemp(Ity_F32);
8544
8545 assign(op1, get_fpr_w0(r1));
8546 assign(op2, load(Ity_F32, mkexpr(op2addr)));
8547 assign(result, triop(Iop_SubF32, mkU32(Irrm_NEAREST), mkexpr(op1),
8548 mkexpr(op2)));
8549 s390_cc_thunk_putF(S390_CC_OP_BFP_RESULT_32, result);
8550 put_fpr_w0(r1, mkexpr(result));
8551
8552 return "seb";
8553}
8554
8555static HChar *
8556s390_irgen_SDB(UChar r1, IRTemp op2addr)
8557{
8558 IRTemp op1 = newTemp(Ity_F64);
8559 IRTemp op2 = newTemp(Ity_F64);
8560 IRTemp result = newTemp(Ity_F64);
8561
8562 assign(op1, get_fpr_dw0(r1));
8563 assign(op2, load(Ity_F64, mkexpr(op2addr)));
8564 assign(result, triop(Iop_SubF64, mkU32(Irrm_NEAREST), mkexpr(op1),
8565 mkexpr(op2)));
8566 s390_cc_thunk_putF(S390_CC_OP_BFP_RESULT_64, result);
8567 put_fpr_dw0(r1, mkexpr(result));
8568
8569 return "sdb";
8570}
8571
8572
8573static HChar *
8574s390_irgen_CLC(UChar length, IRTemp start1, IRTemp start2)
8575{
8576 IRTemp current1 = newTemp(Ity_I8);
8577 IRTemp current2 = newTemp(Ity_I8);
8578 IRTemp counter = newTemp(Ity_I64);
8579
8580 assign(counter, get_counter_dw0());
8581 put_counter_dw0(mkU64(0));
8582
8583 assign(current1, load(Ity_I8, binop(Iop_Add64, mkexpr(start1),
8584 mkexpr(counter))));
8585 assign(current2, load(Ity_I8, binop(Iop_Add64, mkexpr(start2),
8586 mkexpr(counter))));
8587 s390_cc_thunk_put2(S390_CC_OP_UNSIGNED_COMPARE, current1, current2,
8588 False);
8589
8590 /* Both fields differ ? */
8591 if_condition_goto(binop(Iop_CmpNE8, mkexpr(current1), mkexpr(current2)),
8592 guest_IA_next_instr);
8593
8594 /* Check for end of field */
8595 put_counter_dw0(binop(Iop_Add64, mkexpr(counter), mkU64(1)));
8596 if_condition_goto(binop(Iop_CmpNE64, mkexpr(counter), mkU64(length)),
8597 guest_IA_curr_instr);
8598 put_counter_dw0(mkU64(0));
8599
8600 return "clc";
8601}
8602
8603static HChar *
florianb0c9a132011-09-08 15:37:39 +00008604s390_irgen_CLCL(UChar r1, UChar r2)
8605{
8606 IRTemp addr1 = newTemp(Ity_I64);
8607 IRTemp addr2 = newTemp(Ity_I64);
8608 IRTemp addr1_load = newTemp(Ity_I64);
8609 IRTemp addr2_load = newTemp(Ity_I64);
8610 IRTemp len1 = newTemp(Ity_I32);
8611 IRTemp len2 = newTemp(Ity_I32);
8612 IRTemp r1p1 = newTemp(Ity_I32); /* contents of r1 + 1 */
8613 IRTemp r2p1 = newTemp(Ity_I32); /* contents of r2 + 1 */
8614 IRTemp single1 = newTemp(Ity_I8);
8615 IRTemp single2 = newTemp(Ity_I8);
8616 IRTemp pad = newTemp(Ity_I8);
8617
8618 assign(addr1, get_gpr_dw0(r1));
8619 assign(r1p1, get_gpr_w1(r1 + 1));
8620 assign(len1, binop(Iop_And32, mkexpr(r1p1), mkU32(0x00ffffff)));
8621 assign(addr2, get_gpr_dw0(r2));
8622 assign(r2p1, get_gpr_w1(r2 + 1));
8623 assign(len2, binop(Iop_And32, mkexpr(r2p1), mkU32(0x00ffffff)));
8624 assign(pad, get_gpr_b4(r2 + 1));
8625
8626 /* len1 == 0 and len2 == 0? Exit */
8627 s390_cc_set(0);
8628 if_condition_goto(binop(Iop_CmpEQ32, binop(Iop_Or32, mkexpr(len1),
8629 mkexpr(len2)), mkU32(0)),
8630 guest_IA_next_instr);
8631
8632 /* Because mkite evaluates both the then-clause and the else-clause
8633 we cannot load directly from addr1 here. If len1 is 0, then adddr1
8634 may be NULL and loading from there would segfault. So we provide a
8635 valid dummy address in that case. Loading from there does no harm and
8636 the value will be discarded at runtime. */
8637 assign(addr1_load,
8638 mkite(binop(Iop_CmpEQ32, mkexpr(len1), mkU32(0)),
8639 mkU64(guest_IA_curr_instr), mkexpr(addr1)));
8640 assign(single1,
8641 mkite(binop(Iop_CmpEQ32, mkexpr(len1), mkU32(0)),
8642 mkexpr(pad), load(Ity_I8, mkexpr(addr1_load))));
8643
8644 assign(addr2_load,
8645 mkite(binop(Iop_CmpEQ32, mkexpr(len2), mkU32(0)),
8646 mkU64(guest_IA_curr_instr), mkexpr(addr2)));
8647 assign(single2,
8648 mkite(binop(Iop_CmpEQ32, mkexpr(len2), mkU32(0)),
8649 mkexpr(pad), load(Ity_I8, mkexpr(addr2_load))));
8650
8651 s390_cc_thunk_put2(S390_CC_OP_UNSIGNED_COMPARE, single1, single2, False);
8652 /* Fields differ ? */
8653 if_condition_goto(binop(Iop_CmpNE8, mkexpr(single1), mkexpr(single2)),
8654 guest_IA_next_instr);
8655
8656 /* Update len1 and addr1, unless len1 == 0. */
8657 put_gpr_dw0(r1,
8658 mkite(binop(Iop_CmpEQ32, mkexpr(len1), mkU32(0)),
8659 mkexpr(addr1),
8660 binop(Iop_Add64, mkexpr(addr1), mkU64(1))));
8661
8662 /* When updating len1 we must not modify bits (r1+1)[0:39] */
8663 put_gpr_w1(r1 + 1,
8664 mkite(binop(Iop_CmpEQ32, mkexpr(len1), mkU32(0)),
8665 binop(Iop_And32, mkexpr(r1p1), mkU32(0xFF000000u)),
8666 binop(Iop_Sub32, mkexpr(r1p1), mkU32(1))));
8667
8668 /* Update len2 and addr2, unless len2 == 0. */
8669 put_gpr_dw0(r2,
8670 mkite(binop(Iop_CmpEQ32, mkexpr(len2), mkU32(0)),
8671 mkexpr(addr2),
8672 binop(Iop_Add64, mkexpr(addr2), mkU64(1))));
8673
8674 /* When updating len2 we must not modify bits (r2+1)[0:39] */
8675 put_gpr_w1(r2 + 1,
8676 mkite(binop(Iop_CmpEQ32, mkexpr(len2), mkU32(0)),
8677 binop(Iop_And32, mkexpr(r2p1), mkU32(0xFF000000u)),
8678 binop(Iop_Sub32, mkexpr(r2p1), mkU32(1))));
8679
8680 always_goto_and_chase(guest_IA_curr_instr);
8681
8682 return "clcl";
8683}
8684
8685static HChar *
sewardj2019a972011-03-07 16:04:07 +00008686s390_irgen_CLCLE(UChar r1, UChar r3, IRTemp pad2)
8687{
8688 IRTemp addr1, addr3, addr1_load, addr3_load, len1, len3, single1, single3;
8689
8690 addr1 = newTemp(Ity_I64);
8691 addr3 = newTemp(Ity_I64);
8692 addr1_load = newTemp(Ity_I64);
8693 addr3_load = newTemp(Ity_I64);
8694 len1 = newTemp(Ity_I64);
8695 len3 = newTemp(Ity_I64);
8696 single1 = newTemp(Ity_I8);
8697 single3 = newTemp(Ity_I8);
8698
8699 assign(addr1, get_gpr_dw0(r1));
8700 assign(len1, get_gpr_dw0(r1 + 1));
8701 assign(addr3, get_gpr_dw0(r3));
8702 assign(len3, get_gpr_dw0(r3 + 1));
8703
8704 /* len1 == 0 and len3 == 0? Exit */
8705 s390_cc_set(0);
8706 if_condition_goto(binop(Iop_CmpEQ64,binop(Iop_Or64, mkexpr(len1),
8707 mkexpr(len3)), mkU64(0)),
8708 guest_IA_next_instr);
8709
8710 /* A mux requires both ways to be possible. This is a way to prevent clcle
8711 from reading from addr1 if it should read from the pad. Since the pad
8712 has no address, just read from the instruction, we discard that anyway */
8713 assign(addr1_load,
florian6ad49522011-09-09 02:38:55 +00008714 mkite(binop(Iop_CmpEQ64, mkexpr(len1), mkU64(0)),
8715 mkU64(guest_IA_curr_instr), mkexpr(addr1)));
sewardj2019a972011-03-07 16:04:07 +00008716
8717 /* same for addr3 */
8718 assign(addr3_load,
florian6ad49522011-09-09 02:38:55 +00008719 mkite(binop(Iop_CmpEQ64, mkexpr(len3), mkU64(0)),
8720 mkU64(guest_IA_curr_instr), mkexpr(addr3)));
sewardj2019a972011-03-07 16:04:07 +00008721
8722 assign(single1,
florian6ad49522011-09-09 02:38:55 +00008723 mkite(binop(Iop_CmpEQ64, mkexpr(len1), mkU64(0)),
8724 unop(Iop_64to8, mkexpr(pad2)),
8725 load(Ity_I8, mkexpr(addr1_load))));
sewardj2019a972011-03-07 16:04:07 +00008726
8727 assign(single3,
florian6ad49522011-09-09 02:38:55 +00008728 mkite(binop(Iop_CmpEQ64, mkexpr(len3), mkU64(0)),
8729 unop(Iop_64to8, mkexpr(pad2)),
8730 load(Ity_I8, mkexpr(addr3_load))));
sewardj2019a972011-03-07 16:04:07 +00008731
8732 s390_cc_thunk_put2(S390_CC_OP_UNSIGNED_COMPARE, single1, single3, False);
8733 /* Both fields differ ? */
8734 if_condition_goto(binop(Iop_CmpNE8, mkexpr(single1), mkexpr(single3)),
8735 guest_IA_next_instr);
8736
8737 /* If a length in 0 we must not change this length and the address */
8738 put_gpr_dw0(r1,
florian6ad49522011-09-09 02:38:55 +00008739 mkite(binop(Iop_CmpEQ64, mkexpr(len1), mkU64(0)),
8740 mkexpr(addr1),
8741 binop(Iop_Add64, mkexpr(addr1), mkU64(1))));
sewardj2019a972011-03-07 16:04:07 +00008742
8743 put_gpr_dw0(r1 + 1,
florian6ad49522011-09-09 02:38:55 +00008744 mkite(binop(Iop_CmpEQ64, mkexpr(len1), mkU64(0)),
8745 mkU64(0), binop(Iop_Sub64, mkexpr(len1), mkU64(1))));
sewardj2019a972011-03-07 16:04:07 +00008746
8747 put_gpr_dw0(r3,
florian6ad49522011-09-09 02:38:55 +00008748 mkite(binop(Iop_CmpEQ64, mkexpr(len3), mkU64(0)),
8749 mkexpr(addr3),
8750 binop(Iop_Add64, mkexpr(addr3), mkU64(1))));
sewardj2019a972011-03-07 16:04:07 +00008751
8752 put_gpr_dw0(r3 + 1,
florian6ad49522011-09-09 02:38:55 +00008753 mkite(binop(Iop_CmpEQ64, mkexpr(len3), mkU64(0)),
8754 mkU64(0), binop(Iop_Sub64, mkexpr(len3), mkU64(1))));
sewardj2019a972011-03-07 16:04:07 +00008755
8756 /* The architecture requires that we exit with CC3 after a machine specific
8757 amount of bytes. We do that if len1+len3 % 4096 == 0 */
8758 s390_cc_set(3);
8759 if_condition_goto(binop(Iop_CmpEQ64,
8760 binop(Iop_And64,
8761 binop(Iop_Add64, mkexpr(len1), mkexpr(len3)),
8762 mkU64(0xfff)),
8763 mkU64(0)),
8764 guest_IA_next_instr);
8765
floriana64c2432011-07-16 02:11:50 +00008766 always_goto_and_chase(guest_IA_curr_instr);
sewardj2019a972011-03-07 16:04:07 +00008767
8768 return "clcle";
8769}
floriana64c2432011-07-16 02:11:50 +00008770
sewardj2019a972011-03-07 16:04:07 +00008771static void
8772s390_irgen_XC_EX(IRTemp length, IRTemp start1, IRTemp start2)
8773{
8774 IRTemp old1 = newTemp(Ity_I8);
8775 IRTemp old2 = newTemp(Ity_I8);
8776 IRTemp new1 = newTemp(Ity_I8);
8777 IRTemp counter = newTemp(Ity_I32);
8778 IRTemp addr1 = newTemp(Ity_I64);
8779
8780 assign(counter, get_counter_w0());
8781
8782 assign(addr1, binop(Iop_Add64, mkexpr(start1),
8783 unop(Iop_32Uto64, mkexpr(counter))));
8784
8785 assign(old1, load(Ity_I8, mkexpr(addr1)));
8786 assign(old2, load(Ity_I8, binop(Iop_Add64, mkexpr(start2),
8787 unop(Iop_32Uto64,mkexpr(counter)))));
8788 assign(new1, binop(Iop_Xor8, mkexpr(old1), mkexpr(old2)));
8789
8790 store(mkexpr(addr1),
florian6ad49522011-09-09 02:38:55 +00008791 mkite(binop(Iop_CmpEQ64, mkexpr(start1), mkexpr(start2)),
8792 mkU8(0), mkexpr(new1)));
sewardj2019a972011-03-07 16:04:07 +00008793 put_counter_w1(binop(Iop_Or32, unop(Iop_8Uto32, mkexpr(new1)),
8794 get_counter_w1()));
8795
8796 /* Check for end of field */
8797 put_counter_w0(binop(Iop_Add32, mkexpr(counter), mkU32(1)));
8798 if_condition_goto(binop(Iop_CmpNE32, mkexpr(counter), mkexpr(length)),
8799 guest_IA_curr_instr);
8800 s390_cc_thunk_put1(S390_CC_OP_BITWISE, mktemp(Ity_I32, get_counter_w1()),
8801 False);
8802 put_counter_dw0(mkU64(0));
8803}
8804
8805
8806static void
8807s390_irgen_CLC_EX(IRTemp length, IRTemp start1, IRTemp start2)
8808{
8809 IRTemp current1 = newTemp(Ity_I8);
8810 IRTemp current2 = newTemp(Ity_I8);
8811 IRTemp counter = newTemp(Ity_I64);
8812
8813 assign(counter, get_counter_dw0());
8814 put_counter_dw0(mkU64(0));
8815
8816 assign(current1, load(Ity_I8, binop(Iop_Add64, mkexpr(start1),
8817 mkexpr(counter))));
8818 assign(current2, load(Ity_I8, binop(Iop_Add64, mkexpr(start2),
8819 mkexpr(counter))));
8820 s390_cc_thunk_put2(S390_CC_OP_UNSIGNED_COMPARE, current1, current2,
8821 False);
8822
8823 /* Both fields differ ? */
8824 if_condition_goto(binop(Iop_CmpNE8, mkexpr(current1), mkexpr(current2)),
8825 guest_IA_next_instr);
8826
8827 /* Check for end of field */
8828 put_counter_dw0(binop(Iop_Add64, mkexpr(counter), mkU64(1)));
8829 if_condition_goto(binop(Iop_CmpNE64, mkexpr(counter), mkexpr(length)),
8830 guest_IA_curr_instr);
8831 put_counter_dw0(mkU64(0));
8832}
8833
8834static void
8835s390_irgen_MVC_EX(IRTemp length, IRTemp start1, IRTemp start2)
8836{
8837 IRTemp counter = newTemp(Ity_I64);
8838
8839 assign(counter, get_counter_dw0());
8840
8841 store(binop(Iop_Add64, mkexpr(start1), mkexpr(counter)),
8842 load(Ity_I8, binop(Iop_Add64, mkexpr(start2), mkexpr(counter))));
8843
8844 /* Check for end of field */
8845 put_counter_dw0(binop(Iop_Add64, mkexpr(counter), mkU64(1)));
8846 if_condition_goto(binop(Iop_CmpNE64, mkexpr(counter), mkexpr(length)),
8847 guest_IA_curr_instr);
8848 put_counter_dw0(mkU64(0));
8849}
8850
8851
8852
8853static void
8854s390_irgen_EX_SS(UChar r, IRTemp addr2,
8855void (*irgen)(IRTemp length, IRTemp start1, IRTemp start2), int lensize)
8856{
8857 struct SS {
8858 unsigned int op : 8;
8859 unsigned int l : 8;
8860 unsigned int b1 : 4;
8861 unsigned int d1 : 12;
8862 unsigned int b2 : 4;
8863 unsigned int d2 : 12;
8864 };
8865 union {
8866 struct SS dec;
8867 unsigned long bytes;
8868 } ss;
8869 IRTemp cond;
8870 IRDirty *d;
8871 IRTemp torun;
8872
8873 IRTemp start1 = newTemp(Ity_I64);
8874 IRTemp start2 = newTemp(Ity_I64);
8875 IRTemp len = newTemp(lensize == 64 ? Ity_I64 : Ity_I32);
8876 cond = newTemp(Ity_I1);
8877 torun = newTemp(Ity_I64);
8878
8879 assign(torun, load(Ity_I64, mkexpr(addr2)));
8880 /* Start with a check that the saved code is still correct */
8881 assign(cond, binop(Iop_CmpNE64, mkexpr(torun), mkU64(last_execute_target)));
8882 /* If not, save the new value */
8883 d = unsafeIRDirty_0_N (0, "s390x_dirtyhelper_EX", &s390x_dirtyhelper_EX,
8884 mkIRExprVec_1(mkexpr(torun)));
8885 d->guard = mkexpr(cond);
8886 stmt(IRStmt_Dirty(d));
8887
8888 /* and restart */
8889 stmt(IRStmt_Put(OFFB_TISTART, mkU64(guest_IA_curr_instr)));
8890 stmt(IRStmt_Put(OFFB_TILEN, mkU64(4)));
8891 stmt(IRStmt_Exit(mkexpr(cond), Ijk_TInval,
8892 IRConst_U64(guest_IA_curr_instr)));
8893
8894 ss.bytes = last_execute_target;
8895 assign(start1, binop(Iop_Add64, mkU64(ss.dec.d1),
8896 ss.dec.b1 != 0 ? get_gpr_dw0(ss.dec.b1) : mkU64(0)));
8897 assign(start2, binop(Iop_Add64, mkU64(ss.dec.d2),
8898 ss.dec.b2 != 0 ? get_gpr_dw0(ss.dec.b2) : mkU64(0)));
8899 assign(len, unop(lensize == 64 ? Iop_8Uto64 : Iop_8Uto32, binop(Iop_Or8,
8900 r != 0 ? get_gpr_b7(r): mkU8(0), mkU8(ss.dec.l))));
8901 irgen(len, start1, start2);
8902 last_execute_target = 0;
8903}
8904
8905static HChar *
8906s390_irgen_EX(UChar r1, IRTemp addr2)
8907{
8908 switch(last_execute_target & 0xff00000000000000ULL) {
8909 case 0:
8910 {
8911 /* no code information yet */
8912 IRDirty *d;
8913
8914 /* so safe the code... */
8915 d = unsafeIRDirty_0_N (0, "s390x_dirtyhelper_EX", &s390x_dirtyhelper_EX,
8916 mkIRExprVec_1(load(Ity_I64, mkexpr(addr2))));
8917 stmt(IRStmt_Dirty(d));
8918 /* and restart */
8919 stmt(IRStmt_Put(OFFB_TISTART, mkU64(guest_IA_curr_instr)));
8920 stmt(IRStmt_Put(OFFB_TILEN, mkU64(4)));
8921 stmt(IRStmt_Exit(IRExpr_Const(IRConst_U1(True)), Ijk_TInval,
8922 IRConst_U64(guest_IA_curr_instr)));
8923 /* we know that this will be invalidated */
8924 irsb->next = mkU64(guest_IA_next_instr);
8925 dis_res->whatNext = Dis_StopHere;
8926 break;
8927 }
8928
8929 case 0xd200000000000000ULL:
8930 /* special case MVC */
8931 s390_irgen_EX_SS(r1, addr2, s390_irgen_MVC_EX, 64);
8932 return "mvc via ex";
8933
8934 case 0xd500000000000000ULL:
8935 /* special case CLC */
8936 s390_irgen_EX_SS(r1, addr2, s390_irgen_CLC_EX, 64);
8937 return "clc via ex";
8938
8939 case 0xd700000000000000ULL:
8940 /* special case XC */
8941 s390_irgen_EX_SS(r1, addr2, s390_irgen_XC_EX, 32);
8942 return "xc via ex";
8943
8944
8945 default:
8946 {
8947 /* everything else will get a self checking prefix that also checks the
8948 register content */
8949 IRDirty *d;
8950 UChar *bytes;
8951 IRTemp cond;
8952 IRTemp orperand;
8953 IRTemp torun;
8954
8955 cond = newTemp(Ity_I1);
8956 orperand = newTemp(Ity_I64);
8957 torun = newTemp(Ity_I64);
8958
8959 if (r1 == 0)
8960 assign(orperand, mkU64(0));
8961 else
8962 assign(orperand, unop(Iop_8Uto64,get_gpr_b7(r1)));
8963 /* This code is going to be translated */
8964 assign(torun, binop(Iop_Or64, load(Ity_I64, mkexpr(addr2)),
8965 binop(Iop_Shl64, mkexpr(orperand), mkU8(48))));
8966
8967 /* Start with a check that saved code is still correct */
8968 assign(cond, binop(Iop_CmpNE64, mkexpr(torun),
8969 mkU64(last_execute_target)));
8970 /* If not, save the new value */
8971 d = unsafeIRDirty_0_N (0, "s390x_dirtyhelper_EX", &s390x_dirtyhelper_EX,
8972 mkIRExprVec_1(mkexpr(torun)));
8973 d->guard = mkexpr(cond);
8974 stmt(IRStmt_Dirty(d));
8975
8976 /* and restart */
8977 stmt(IRStmt_Put(OFFB_TISTART, mkU64(guest_IA_curr_instr)));
8978 stmt(IRStmt_Put(OFFB_TILEN, mkU64(4)));
8979 stmt(IRStmt_Exit(mkexpr(cond), Ijk_TInval,
8980 IRConst_U64(guest_IA_curr_instr)));
8981
8982 /* Now comes the actual translation */
8983 bytes = (UChar *) &last_execute_target;
8984 s390_decode_and_irgen(bytes, ((((bytes[0] >> 6) + 1) >> 1) + 1) << 1,
8985 dis_res);
sewardj7ee97522011-05-09 21:45:04 +00008986 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00008987 vex_printf(" which was executed by\n");
8988 /* dont make useless translations in the next execute */
8989 last_execute_target = 0;
8990 }
8991 }
8992 return "ex";
8993}
8994
8995static HChar *
8996s390_irgen_EXRL(UChar r1, UInt offset)
8997{
8998 IRTemp addr = newTemp(Ity_I64);
8999 /* we might save one round trip because we know the target */
9000 if (!last_execute_target)
9001 last_execute_target = *(ULong *)(HWord)
9002 (guest_IA_curr_instr + offset * 2UL);
9003 assign(addr, mkU64(guest_IA_curr_instr + offset * 2UL));
9004 s390_irgen_EX(r1, addr);
9005 return "exrl";
9006}
9007
9008static HChar *
9009s390_irgen_IPM(UChar r1)
9010{
9011 // As long as we dont support SPM, lets just assume 0 as program mask
9012 put_gpr_b4(r1, unop(Iop_32to8, binop(Iop_Or32, mkU32(0 /* program mask */),
9013 binop(Iop_Shl32, s390_call_calculate_cc(), mkU8(4)))));
9014
9015 return "ipm";
9016}
9017
9018
9019static HChar *
9020s390_irgen_SRST(UChar r1, UChar r2)
9021{
9022 IRTemp address = newTemp(Ity_I64);
9023 IRTemp next = newTemp(Ity_I64);
9024 IRTemp delim = newTemp(Ity_I8);
9025 IRTemp counter = newTemp(Ity_I64);
9026 IRTemp byte = newTemp(Ity_I8);
9027
9028 assign(address, get_gpr_dw0(r2));
9029 assign(next, get_gpr_dw0(r1));
9030
9031 assign(counter, get_counter_dw0());
9032 put_counter_dw0(mkU64(0));
9033
9034 // start = next? CC=2 and out r1 and r2 unchanged
9035 s390_cc_set(2);
9036 put_gpr_dw0(r2, binop(Iop_Sub64, mkexpr(address), mkexpr(counter)));
9037 if_condition_goto(binop(Iop_CmpEQ64, mkexpr(address), mkexpr(next)),
9038 guest_IA_next_instr);
9039
9040 assign(byte, load(Ity_I8, mkexpr(address)));
9041 assign(delim, get_gpr_b7(0));
9042
9043 // byte = delim? CC=1, R1=address
9044 s390_cc_set(1);
9045 put_gpr_dw0(r1, mkexpr(address));
9046 if_condition_goto(binop(Iop_CmpEQ8, mkexpr(delim), mkexpr(byte)),
9047 guest_IA_next_instr);
9048
9049 // else: all equal, no end yet, loop
9050 put_counter_dw0(binop(Iop_Add64, mkexpr(counter), mkU64(1)));
9051 put_gpr_dw0(r1, mkexpr(next));
9052 put_gpr_dw0(r2, binop(Iop_Add64, mkexpr(address), mkU64(1)));
9053 stmt(IRStmt_Exit(binop(Iop_CmpNE64, mkexpr(counter), mkU64(255)),
9054 Ijk_Boring, IRConst_U64(guest_IA_curr_instr)));
9055 // >= 256 bytes done CC=3
9056 s390_cc_set(3);
9057 put_counter_dw0(mkU64(0));
9058
9059 return "srst";
9060}
9061
9062static HChar *
9063s390_irgen_CLST(UChar r1, UChar r2)
9064{
9065 IRTemp address1 = newTemp(Ity_I64);
9066 IRTemp address2 = newTemp(Ity_I64);
9067 IRTemp end = newTemp(Ity_I8);
9068 IRTemp counter = newTemp(Ity_I64);
9069 IRTemp byte1 = newTemp(Ity_I8);
9070 IRTemp byte2 = newTemp(Ity_I8);
9071
9072 assign(address1, get_gpr_dw0(r1));
9073 assign(address2, get_gpr_dw0(r2));
9074 assign(end, get_gpr_b7(0));
9075 assign(counter, get_counter_dw0());
9076 put_counter_dw0(mkU64(0));
9077 assign(byte1, load(Ity_I8, mkexpr(address1)));
9078 assign(byte2, load(Ity_I8, mkexpr(address2)));
9079
9080 // end in both? all equal, reset r1 and r2 to start values
9081 s390_cc_set(0);
9082 put_gpr_dw0(r1, binop(Iop_Sub64, mkexpr(address1), mkexpr(counter)));
9083 put_gpr_dw0(r2, binop(Iop_Sub64, mkexpr(address2), mkexpr(counter)));
9084 if_condition_goto(binop(Iop_CmpEQ8, mkU8(0),
9085 binop(Iop_Or8,
9086 binop(Iop_Xor8, mkexpr(byte1), mkexpr(end)),
9087 binop(Iop_Xor8, mkexpr(byte2), mkexpr(end)))),
9088 guest_IA_next_instr);
9089
9090 put_gpr_dw0(r1, mkexpr(address1));
9091 put_gpr_dw0(r2, mkexpr(address2));
9092
9093 // End found in string1
9094 s390_cc_set(1);
9095 if_condition_goto(binop(Iop_CmpEQ8, mkexpr(end), mkexpr(byte1)),
9096 guest_IA_next_instr);
9097
9098 // End found in string2
9099 s390_cc_set(2);
9100 if_condition_goto(binop(Iop_CmpEQ8, mkexpr(end), mkexpr(byte2)),
9101 guest_IA_next_instr);
9102
9103 // string1 < string2
9104 s390_cc_set(1);
9105 if_condition_goto(binop(Iop_CmpLT32U, unop(Iop_8Uto32, mkexpr(byte1)),
9106 unop(Iop_8Uto32, mkexpr(byte2))),
9107 guest_IA_next_instr);
9108
9109 // string2 < string1
9110 s390_cc_set(2);
9111 if_condition_goto(binop(Iop_CmpLT32U, unop(Iop_8Uto32, mkexpr(byte2)),
9112 unop(Iop_8Uto32, mkexpr(byte1))),
9113 guest_IA_next_instr);
9114
9115 // else: all equal, no end yet, loop
9116 put_counter_dw0(binop(Iop_Add64, mkexpr(counter), mkU64(1)));
9117 put_gpr_dw0(r1, binop(Iop_Add64, get_gpr_dw0(r1), mkU64(1)));
9118 put_gpr_dw0(r2, binop(Iop_Add64, get_gpr_dw0(r2), mkU64(1)));
9119 stmt(IRStmt_Exit(binop(Iop_CmpNE64, mkexpr(counter), mkU64(255)),
9120 Ijk_Boring, IRConst_U64(guest_IA_curr_instr)));
9121 // >= 256 bytes done CC=3
9122 s390_cc_set(3);
9123 put_counter_dw0(mkU64(0));
9124
9125 return "clst";
9126}
9127
9128static void
9129s390_irgen_load_multiple_32bit(UChar r1, UChar r3, IRTemp op2addr)
9130{
9131 UChar reg;
9132 IRTemp addr = newTemp(Ity_I64);
9133
9134 assign(addr, mkexpr(op2addr));
9135 reg = r1;
9136 do {
9137 IRTemp old = addr;
9138
9139 reg %= 16;
9140 put_gpr_w1(reg, load(Ity_I32, mkexpr(addr)));
9141 addr = newTemp(Ity_I64);
9142 assign(addr, binop(Iop_Add64, mkexpr(old), mkU64(4)));
9143 reg++;
9144 } while (reg != (r3 + 1));
9145}
9146
9147static HChar *
9148s390_irgen_LM(UChar r1, UChar r3, IRTemp op2addr)
9149{
9150 s390_irgen_load_multiple_32bit(r1, r3, op2addr);
9151
9152 return "lm";
9153}
9154
9155static HChar *
9156s390_irgen_LMY(UChar r1, UChar r3, IRTemp op2addr)
9157{
9158 s390_irgen_load_multiple_32bit(r1, r3, op2addr);
9159
9160 return "lmy";
9161}
9162
9163static HChar *
9164s390_irgen_LMH(UChar r1, UChar r3, IRTemp op2addr)
9165{
9166 UChar reg;
9167 IRTemp addr = newTemp(Ity_I64);
9168
9169 assign(addr, mkexpr(op2addr));
9170 reg = r1;
9171 do {
9172 IRTemp old = addr;
9173
9174 reg %= 16;
9175 put_gpr_w0(reg, load(Ity_I32, mkexpr(addr)));
9176 addr = newTemp(Ity_I64);
9177 assign(addr, binop(Iop_Add64, mkexpr(old), mkU64(4)));
9178 reg++;
9179 } while (reg != (r3 + 1));
9180
9181 return "lmh";
9182}
9183
9184static HChar *
9185s390_irgen_LMG(UChar r1, UChar r3, IRTemp op2addr)
9186{
9187 UChar reg;
9188 IRTemp addr = newTemp(Ity_I64);
9189
9190 assign(addr, mkexpr(op2addr));
9191 reg = r1;
9192 do {
9193 IRTemp old = addr;
9194
9195 reg %= 16;
9196 put_gpr_dw0(reg, load(Ity_I64, mkexpr(addr)));
9197 addr = newTemp(Ity_I64);
9198 assign(addr, binop(Iop_Add64, mkexpr(old), mkU64(8)));
9199 reg++;
9200 } while (reg != (r3 + 1));
9201
9202 return "lmg";
9203}
9204
9205static void
9206s390_irgen_store_multiple_32bit(UChar r1, UChar r3, IRTemp op2addr)
9207{
9208 UChar reg;
9209 IRTemp addr = newTemp(Ity_I64);
9210
9211 assign(addr, mkexpr(op2addr));
9212 reg = r1;
9213 do {
9214 IRTemp old = addr;
9215
9216 reg %= 16;
9217 store(mkexpr(addr), get_gpr_w1(reg));
9218 addr = newTemp(Ity_I64);
9219 assign(addr, binop(Iop_Add64, mkexpr(old), mkU64(4)));
9220 reg++;
9221 } while( reg != (r3 + 1));
9222}
9223
9224static HChar *
9225s390_irgen_STM(UChar r1, UChar r3, IRTemp op2addr)
9226{
9227 s390_irgen_store_multiple_32bit(r1, r3, op2addr);
9228
9229 return "stm";
9230}
9231
9232static HChar *
9233s390_irgen_STMY(UChar r1, UChar r3, IRTemp op2addr)
9234{
9235 s390_irgen_store_multiple_32bit(r1, r3, op2addr);
9236
9237 return "stmy";
9238}
9239
9240static HChar *
9241s390_irgen_STMH(UChar r1, UChar r3, IRTemp op2addr)
9242{
9243 UChar reg;
9244 IRTemp addr = newTemp(Ity_I64);
9245
9246 assign(addr, mkexpr(op2addr));
9247 reg = r1;
9248 do {
9249 IRTemp old = addr;
9250
9251 reg %= 16;
9252 store(mkexpr(addr), get_gpr_w0(reg));
9253 addr = newTemp(Ity_I64);
9254 assign(addr, binop(Iop_Add64, mkexpr(old), mkU64(4)));
9255 reg++;
9256 } while( reg != (r3 + 1));
9257
9258 return "stmh";
9259}
9260
9261static HChar *
9262s390_irgen_STMG(UChar r1, UChar r3, IRTemp op2addr)
9263{
9264 UChar reg;
9265 IRTemp addr = newTemp(Ity_I64);
9266
9267 assign(addr, mkexpr(op2addr));
9268 reg = r1;
9269 do {
9270 IRTemp old = addr;
9271
9272 reg %= 16;
9273 store(mkexpr(addr), get_gpr_dw0(reg));
9274 addr = newTemp(Ity_I64);
9275 assign(addr, binop(Iop_Add64, mkexpr(old), mkU64(8)));
9276 reg++;
9277 } while( reg != (r3 + 1));
9278
9279 return "stmg";
9280}
9281
9282static void
9283s390_irgen_XONC(IROp op, UChar length, IRTemp start1, IRTemp start2)
9284{
9285 IRTemp old1 = newTemp(Ity_I8);
9286 IRTemp old2 = newTemp(Ity_I8);
9287 IRTemp new1 = newTemp(Ity_I8);
9288 IRTemp counter = newTemp(Ity_I32);
9289 IRTemp addr1 = newTemp(Ity_I64);
9290
9291 assign(counter, get_counter_w0());
9292
9293 assign(addr1, binop(Iop_Add64, mkexpr(start1),
9294 unop(Iop_32Uto64, mkexpr(counter))));
9295
9296 assign(old1, load(Ity_I8, mkexpr(addr1)));
9297 assign(old2, load(Ity_I8, binop(Iop_Add64, mkexpr(start2),
9298 unop(Iop_32Uto64,mkexpr(counter)))));
9299 assign(new1, binop(op, mkexpr(old1), mkexpr(old2)));
9300
9301 /* Special case: xc is used to zero memory */
sewardj2019a972011-03-07 16:04:07 +00009302 if (op == Iop_Xor8) {
9303 store(mkexpr(addr1),
florian6ad49522011-09-09 02:38:55 +00009304 mkite(binop(Iop_CmpEQ64, mkexpr(start1), mkexpr(start2)),
9305 mkU8(0), mkexpr(new1)));
sewardj2019a972011-03-07 16:04:07 +00009306 } else
9307 store(mkexpr(addr1), mkexpr(new1));
9308 put_counter_w1(binop(Iop_Or32, unop(Iop_8Uto32, mkexpr(new1)),
9309 get_counter_w1()));
9310
9311 /* Check for end of field */
9312 put_counter_w0(binop(Iop_Add32, mkexpr(counter), mkU32(1)));
9313 if_condition_goto(binop(Iop_CmpNE32, mkexpr(counter), mkU32(length)),
9314 guest_IA_curr_instr);
9315 s390_cc_thunk_put1(S390_CC_OP_BITWISE, mktemp(Ity_I32, get_counter_w1()),
9316 False);
9317 put_counter_dw0(mkU64(0));
9318}
9319
9320static HChar *
9321s390_irgen_XC(UChar length, IRTemp start1, IRTemp start2)
9322{
9323 s390_irgen_XONC(Iop_Xor8, length, start1, start2);
9324
9325 return "xc";
9326}
9327
sewardjb63967e2011-03-24 08:50:04 +00009328static void
9329s390_irgen_XC_sameloc(UChar length, UChar b, UShort d)
9330{
9331 IRTemp counter = newTemp(Ity_I32);
9332 IRTemp start = newTemp(Ity_I64);
9333 IRTemp addr = newTemp(Ity_I64);
9334
9335 assign(start,
9336 binop(Iop_Add64, mkU64(d), b != 0 ? get_gpr_dw0(b) : mkU64(0)));
9337
9338 if (length < 8) {
9339 UInt i;
9340
9341 for (i = 0; i <= length; ++i) {
9342 store(binop(Iop_Add64, mkexpr(start), mkU64(i)), mkU8(0));
9343 }
9344 } else {
9345 assign(counter, get_counter_w0());
9346
9347 assign(addr, binop(Iop_Add64, mkexpr(start),
9348 unop(Iop_32Uto64, mkexpr(counter))));
9349
9350 store(mkexpr(addr), mkU8(0));
9351
9352 /* Check for end of field */
9353 put_counter_w0(binop(Iop_Add32, mkexpr(counter), mkU32(1)));
9354 if_condition_goto(binop(Iop_CmpNE32, mkexpr(counter), mkU32(length)),
9355 guest_IA_curr_instr);
9356
9357 /* Reset counter */
9358 put_counter_dw0(mkU64(0));
9359 }
9360
9361 s390_cc_thunk_put1(S390_CC_OP_BITWISE, mktemp(Ity_I32, mkU32(0)), False);
9362
sewardj7ee97522011-05-09 21:45:04 +00009363 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardjb63967e2011-03-24 08:50:04 +00009364 s390_disasm(ENC3(MNM, UDLB, UDXB), "xc", d, length, b, d, 0, b);
9365}
9366
sewardj2019a972011-03-07 16:04:07 +00009367static HChar *
9368s390_irgen_NC(UChar length, IRTemp start1, IRTemp start2)
9369{
9370 s390_irgen_XONC(Iop_And8, length, start1, start2);
9371
9372 return "nc";
9373}
9374
9375static HChar *
9376s390_irgen_OC(UChar length, IRTemp start1, IRTemp start2)
9377{
9378 s390_irgen_XONC(Iop_Or8, length, start1, start2);
9379
9380 return "oc";
9381}
9382
9383
9384static HChar *
9385s390_irgen_MVC(UChar length, IRTemp start1, IRTemp start2)
9386{
9387 IRTemp counter = newTemp(Ity_I64);
9388
9389 assign(counter, get_counter_dw0());
9390
9391 store(binop(Iop_Add64, mkexpr(start1), mkexpr(counter)),
9392 load(Ity_I8, binop(Iop_Add64, mkexpr(start2), mkexpr(counter))));
9393
9394 /* Check for end of field */
9395 put_counter_dw0(binop(Iop_Add64, mkexpr(counter), mkU64(1)));
9396 if_condition_goto(binop(Iop_CmpNE64, mkexpr(counter), mkU64(length)),
9397 guest_IA_curr_instr);
9398 put_counter_dw0(mkU64(0));
9399
9400 return "mvc";
9401}
9402
9403static HChar *
florianb0c9a132011-09-08 15:37:39 +00009404s390_irgen_MVCL(UChar r1, UChar r2)
9405{
9406 IRTemp addr1 = newTemp(Ity_I64);
9407 IRTemp addr2 = newTemp(Ity_I64);
9408 IRTemp addr2_load = newTemp(Ity_I64);
9409 IRTemp r1p1 = newTemp(Ity_I32); /* contents of r1 + 1 */
9410 IRTemp r2p1 = newTemp(Ity_I32); /* contents of r2 + 1 */
9411 IRTemp len1 = newTemp(Ity_I32);
9412 IRTemp len2 = newTemp(Ity_I32);
9413 IRTemp pad = newTemp(Ity_I8);
9414 IRTemp single = newTemp(Ity_I8);
9415
9416 assign(addr1, get_gpr_dw0(r1));
9417 assign(r1p1, get_gpr_w1(r1 + 1));
9418 assign(len1, binop(Iop_And32, mkexpr(r1p1), mkU32(0x00ffffff)));
9419 assign(addr2, get_gpr_dw0(r2));
9420 assign(r2p1, get_gpr_w1(r2 + 1));
9421 assign(len2, binop(Iop_And32, mkexpr(r2p1), mkU32(0x00ffffff)));
9422 assign(pad, get_gpr_b4(r2 + 1));
9423
9424 /* len1 == 0 ? */
9425 s390_cc_thunk_put2(S390_CC_OP_UNSIGNED_COMPARE, len1, len2, False);
9426 if_condition_goto(binop(Iop_CmpEQ32, mkexpr(len1), mkU32(0)),
9427 guest_IA_next_instr);
9428
9429 /* Check for destructive overlap:
9430 addr1 > addr2 && addr2 + len1 > addr1 && (addr2 + len2) > addr1 */
9431 s390_cc_set(3);
9432 IRTemp cond1 = newTemp(Ity_I32);
9433 assign(cond1, unop(Iop_1Uto32,
9434 binop(Iop_CmpLT64U, mkexpr(addr2), mkexpr(addr1))));
9435 IRTemp cond2 = newTemp(Ity_I32);
9436 assign(cond2, unop(Iop_1Uto32,
9437 binop(Iop_CmpLT64U, mkexpr(addr1),
9438 binop(Iop_Add64, mkexpr(addr2),
9439 unop(Iop_32Uto64, mkexpr(len1))))));
9440 IRTemp cond3 = newTemp(Ity_I32);
9441 assign(cond3, unop(Iop_1Uto32,
9442 binop(Iop_CmpLT64U,
9443 mkexpr(addr1),
9444 binop(Iop_Add64, mkexpr(addr2),
9445 unop(Iop_32Uto64, mkexpr(len2))))));
9446
9447 if_condition_goto(binop(Iop_CmpEQ32,
9448 binop(Iop_And32,
9449 binop(Iop_And32, mkexpr(cond1), mkexpr(cond2)),
9450 mkexpr(cond3)),
9451 mkU32(1)),
9452 guest_IA_next_instr);
9453
9454 /* See s390_irgen_CLCL for explanation why we cannot load directly
9455 and need two steps. */
9456 assign(addr2_load,
9457 mkite(binop(Iop_CmpEQ32, mkexpr(len2), mkU32(0)),
9458 mkU64(guest_IA_curr_instr), mkexpr(addr2)));
9459 assign(single,
9460 mkite(binop(Iop_CmpEQ32, mkexpr(len2), mkU32(0)),
9461 mkexpr(pad), load(Ity_I8, mkexpr(addr2_load))));
9462
9463 store(mkexpr(addr1), mkexpr(single));
9464
9465 /* Update addr1 and len1 */
9466 put_gpr_dw0(r1, binop(Iop_Add64, mkexpr(addr1), mkU64(1)));
9467 put_gpr_w1(r1 + 1, binop(Iop_Sub32, mkexpr(r1p1), mkU32(1)));
9468
9469 /* Update addr2 and len2 */
9470 put_gpr_dw0(r2,
9471 mkite(binop(Iop_CmpEQ32, mkexpr(len2), mkU32(0)),
9472 mkexpr(addr2),
9473 binop(Iop_Add64, mkexpr(addr2), mkU64(1))));
9474
9475 /* When updating len2 we must not modify bits (r2+1)[0:39] */
9476 put_gpr_w1(r2 + 1,
9477 mkite(binop(Iop_CmpEQ32, mkexpr(len2), mkU32(0)),
9478 binop(Iop_And32, mkexpr(r2p1), mkU32(0xFF000000u)),
9479 binop(Iop_Sub32, mkexpr(r2p1), mkU32(1))));
9480
9481 s390_cc_thunk_put2(S390_CC_OP_UNSIGNED_COMPARE, len1, len2, False);
9482 if_condition_goto(binop(Iop_CmpNE32, mkexpr(len1), mkU32(1)),
9483 guest_IA_curr_instr);
9484
9485 return "mvcl";
9486}
9487
9488
9489static HChar *
sewardj2019a972011-03-07 16:04:07 +00009490s390_irgen_MVCLE(UChar r1, UChar r3, IRTemp pad2)
9491{
9492 IRTemp addr1, addr3, addr3_load, len1, len3, single;
9493
9494 addr1 = newTemp(Ity_I64);
9495 addr3 = newTemp(Ity_I64);
9496 addr3_load = newTemp(Ity_I64);
9497 len1 = newTemp(Ity_I64);
9498 len3 = newTemp(Ity_I64);
9499 single = newTemp(Ity_I8);
9500
9501 assign(addr1, get_gpr_dw0(r1));
9502 assign(len1, get_gpr_dw0(r1 + 1));
9503 assign(addr3, get_gpr_dw0(r3));
9504 assign(len3, get_gpr_dw0(r3 + 1));
9505
9506 // len1 == 0 ?
9507 s390_cc_thunk_put2(S390_CC_OP_UNSIGNED_COMPARE, len1, len3, False);
9508 if_condition_goto(binop(Iop_CmpEQ64,mkexpr(len1), mkU64(0)),
9509 guest_IA_next_instr);
9510
9511 /* This is a hack to prevent mvcle from reading from addr3 if it
9512 should read from the pad. Since the pad has no address, just
9513 read from the instruction, we discard that anyway */
9514 assign(addr3_load,
florian6ad49522011-09-09 02:38:55 +00009515 mkite(binop(Iop_CmpEQ64, mkexpr(len3), mkU64(0)),
9516 mkU64(guest_IA_curr_instr), mkexpr(addr3)));
sewardj2019a972011-03-07 16:04:07 +00009517
9518 assign(single,
florian6ad49522011-09-09 02:38:55 +00009519 mkite(binop(Iop_CmpEQ64, mkexpr(len3), mkU64(0)),
9520 unop(Iop_64to8, mkexpr(pad2)),
9521 load(Ity_I8, mkexpr(addr3_load))));
sewardj2019a972011-03-07 16:04:07 +00009522 store(mkexpr(addr1), mkexpr(single));
9523
9524 put_gpr_dw0(r1, binop(Iop_Add64, mkexpr(addr1), mkU64(1)));
9525
9526 put_gpr_dw0(r1 + 1, binop(Iop_Sub64, mkexpr(len1), mkU64(1)));
9527
9528 put_gpr_dw0(r3,
florian6ad49522011-09-09 02:38:55 +00009529 mkite(binop(Iop_CmpEQ64, mkexpr(len3), mkU64(0)),
9530 mkexpr(addr3),
9531 binop(Iop_Add64, mkexpr(addr3), mkU64(1))));
sewardj2019a972011-03-07 16:04:07 +00009532
9533 put_gpr_dw0(r3 + 1,
florian6ad49522011-09-09 02:38:55 +00009534 mkite(binop(Iop_CmpEQ64, mkexpr(len3), mkU64(0)),
9535 mkU64(0), binop(Iop_Sub64, mkexpr(len3), mkU64(1))));
sewardj2019a972011-03-07 16:04:07 +00009536
9537 /* We should set CC=3 (faked by overflow add) and leave after
9538 a maximum of ~4096 bytes have been processed. This is simpler:
9539 we leave whenever (len1 % 4096) == 0 */
9540 s390_cc_thunk_put2(S390_CC_OP_UNSIGNED_ADD_64, mktemp(Ity_I64, mkU64(-1ULL)),
sewardj2019a972011-03-07 16:04:07 +00009541 mktemp(Ity_I64, mkU64(-1ULL)), False);
9542 if_condition_goto(binop(Iop_CmpEQ64,
9543 binop(Iop_And64, mkexpr(len1), mkU64(0xfff)),
9544 mkU64(0)),
9545 guest_IA_next_instr);
9546
9547 s390_cc_thunk_put2(S390_CC_OP_UNSIGNED_COMPARE, len1, len3, False);
9548 if_condition_goto(binop(Iop_CmpNE64, mkexpr(len1), mkU64(1)),
9549 guest_IA_curr_instr);
9550
9551 return "mvcle";
9552}
9553
9554static HChar *
9555s390_irgen_MVST(UChar r1, UChar r2)
9556{
9557 IRTemp addr1 = newTemp(Ity_I64);
9558 IRTemp addr2 = newTemp(Ity_I64);
9559 IRTemp end = newTemp(Ity_I8);
9560 IRTemp byte = newTemp(Ity_I8);
9561 IRTemp counter = newTemp(Ity_I64);
9562
9563 assign(addr1, get_gpr_dw0(r1));
9564 assign(addr2, get_gpr_dw0(r2));
9565 assign(counter, get_counter_dw0());
9566 assign(end, get_gpr_b7(0));
9567 assign(byte, load(Ity_I8, binop(Iop_Add64, mkexpr(addr2),mkexpr(counter))));
9568 store(binop(Iop_Add64,mkexpr(addr1),mkexpr(counter)), mkexpr(byte));
9569
9570 // We use unlimited as cpu-determined number
9571 put_counter_dw0(binop(Iop_Add64, mkexpr(counter), mkU64(1)));
9572 if_condition_goto(binop(Iop_CmpNE8, mkexpr(end), mkexpr(byte)),
9573 guest_IA_curr_instr);
9574
9575 // and always set cc=1 at the end + update r1
9576 s390_cc_set(1);
9577 put_gpr_dw0(r1, binop(Iop_Add64, mkexpr(addr1), mkexpr(counter)));
9578 put_counter_dw0(mkU64(0));
9579
9580 return "mvst";
9581}
9582
9583static void
9584s390_irgen_divide_64to32(IROp op, UChar r1, IRTemp op2)
9585{
9586 IRTemp op1 = newTemp(Ity_I64);
9587 IRTemp result = newTemp(Ity_I64);
9588
9589 assign(op1, binop(Iop_32HLto64,
9590 get_gpr_w1(r1), // high 32 bits
9591 get_gpr_w1(r1 + 1))); // low 32 bits
9592 assign(result, binop(op, mkexpr(op1), mkexpr(op2)));
9593 put_gpr_w1(r1, unop(Iop_64HIto32, mkexpr(result))); // remainder
9594 put_gpr_w1(r1 + 1, unop(Iop_64to32, mkexpr(result))); // quotient
9595}
9596
9597static void
9598s390_irgen_divide_128to64(IROp op, UChar r1, IRTemp op2)
9599{
9600 IRTemp op1 = newTemp(Ity_I128);
9601 IRTemp result = newTemp(Ity_I128);
9602
9603 assign(op1, binop(Iop_64HLto128,
9604 get_gpr_dw0(r1), // high 64 bits
9605 get_gpr_dw0(r1 + 1))); // low 64 bits
9606 assign(result, binop(op, mkexpr(op1), mkexpr(op2)));
9607 put_gpr_dw0(r1, unop(Iop_128HIto64, mkexpr(result))); // remainder
9608 put_gpr_dw0(r1 + 1, unop(Iop_128to64, mkexpr(result))); // quotient
9609}
9610
9611static void
9612s390_irgen_divide_64to64(IROp op, UChar r1, IRTemp op2)
9613{
9614 IRTemp op1 = newTemp(Ity_I64);
9615 IRTemp result = newTemp(Ity_I128);
9616
9617 assign(op1, get_gpr_dw0(r1 + 1));
9618 assign(result, binop(op, mkexpr(op1), mkexpr(op2)));
9619 put_gpr_dw0(r1, unop(Iop_128HIto64, mkexpr(result))); // remainder
9620 put_gpr_dw0(r1 + 1, unop(Iop_128to64, mkexpr(result))); // quotient
9621}
9622
9623static HChar *
9624s390_irgen_DR(UChar r1, UChar r2)
9625{
9626 IRTemp op2 = newTemp(Ity_I32);
9627
9628 assign(op2, get_gpr_w1(r2));
9629
9630 s390_irgen_divide_64to32(Iop_DivModS64to32, r1, op2);
9631
9632 return "dr";
9633}
9634
9635static HChar *
9636s390_irgen_D(UChar r1, IRTemp op2addr)
9637{
9638 IRTemp op2 = newTemp(Ity_I32);
9639
9640 assign(op2, load(Ity_I32, mkexpr(op2addr)));
9641
9642 s390_irgen_divide_64to32(Iop_DivModS64to32, r1, op2);
9643
9644 return "d";
9645}
9646
9647static HChar *
9648s390_irgen_DLR(UChar r1, UChar r2)
9649{
9650 IRTemp op2 = newTemp(Ity_I32);
9651
9652 assign(op2, get_gpr_w1(r2));
9653
9654 s390_irgen_divide_64to32(Iop_DivModU64to32, r1, op2);
9655
9656 return "dr";
9657}
9658
9659static HChar *
9660s390_irgen_DL(UChar r1, IRTemp op2addr)
9661{
9662 IRTemp op2 = newTemp(Ity_I32);
9663
9664 assign(op2, load(Ity_I32, mkexpr(op2addr)));
9665
9666 s390_irgen_divide_64to32(Iop_DivModU64to32, r1, op2);
9667
9668 return "dl";
9669}
9670
9671static HChar *
9672s390_irgen_DLG(UChar r1, IRTemp op2addr)
9673{
9674 IRTemp op2 = newTemp(Ity_I64);
9675
9676 assign(op2, load(Ity_I64, mkexpr(op2addr)));
9677
9678 s390_irgen_divide_128to64(Iop_DivModU128to64, r1, op2);
9679
9680 return "dlg";
9681}
9682
9683static HChar *
9684s390_irgen_DLGR(UChar r1, UChar r2)
9685{
9686 IRTemp op2 = newTemp(Ity_I64);
9687
9688 assign(op2, get_gpr_dw0(r2));
9689
9690 s390_irgen_divide_128to64(Iop_DivModU128to64, r1, op2);
9691
9692 return "dlgr";
9693}
9694
9695static HChar *
9696s390_irgen_DSGR(UChar r1, UChar r2)
9697{
9698 IRTemp op2 = newTemp(Ity_I64);
9699
9700 assign(op2, get_gpr_dw0(r2));
9701
9702 s390_irgen_divide_64to64(Iop_DivModS64to64, r1, op2);
9703
9704 return "dsgr";
9705}
9706
9707static HChar *
9708s390_irgen_DSG(UChar r1, IRTemp op2addr)
9709{
9710 IRTemp op2 = newTemp(Ity_I64);
9711
9712 assign(op2, load(Ity_I64, mkexpr(op2addr)));
9713
9714 s390_irgen_divide_64to64(Iop_DivModS64to64, r1, op2);
9715
9716 return "dsg";
9717}
9718
9719static HChar *
9720s390_irgen_DSGFR(UChar r1, UChar r2)
9721{
9722 IRTemp op2 = newTemp(Ity_I64);
9723
9724 assign(op2, unop(Iop_32Sto64, get_gpr_w1(r2)));
9725
9726 s390_irgen_divide_64to64(Iop_DivModS64to64, r1, op2);
9727
9728 return "dsgfr";
9729}
9730
9731static HChar *
9732s390_irgen_DSGF(UChar r1, IRTemp op2addr)
9733{
9734 IRTemp op2 = newTemp(Ity_I64);
9735
9736 assign(op2, unop(Iop_32Sto64, load(Ity_I32, mkexpr(op2addr))));
9737
9738 s390_irgen_divide_64to64(Iop_DivModS64to64, r1, op2);
9739
9740 return "dsgf";
9741}
9742
9743static void
9744s390_irgen_load_ar_multiple(UChar r1, UChar r3, IRTemp op2addr)
9745{
9746 UChar reg;
9747 IRTemp addr = newTemp(Ity_I64);
9748
9749 assign(addr, mkexpr(op2addr));
9750 reg = r1;
9751 do {
9752 IRTemp old = addr;
9753
9754 reg %= 16;
9755 put_ar_w0(reg, load(Ity_I32, mkexpr(addr)));
9756 addr = newTemp(Ity_I64);
9757 assign(addr, binop(Iop_Add64, mkexpr(old), mkU64(4)));
9758 reg++;
9759 } while (reg != (r3 + 1));
9760}
9761
9762static HChar *
9763s390_irgen_LAM(UChar r1, UChar r3, IRTemp op2addr)
9764{
9765 s390_irgen_load_ar_multiple(r1, r3, op2addr);
9766
9767 return "lam";
9768}
9769
9770static HChar *
9771s390_irgen_LAMY(UChar r1, UChar r3, IRTemp op2addr)
9772{
9773 s390_irgen_load_ar_multiple(r1, r3, op2addr);
9774
9775 return "lamy";
9776}
9777
9778static void
9779s390_irgen_store_ar_multiple(UChar r1, UChar r3, IRTemp op2addr)
9780{
9781 UChar reg;
9782 IRTemp addr = newTemp(Ity_I64);
9783
9784 assign(addr, mkexpr(op2addr));
9785 reg = r1;
9786 do {
9787 IRTemp old = addr;
9788
9789 reg %= 16;
9790 store(mkexpr(addr), get_ar_w0(reg));
9791 addr = newTemp(Ity_I64);
9792 assign(addr, binop(Iop_Add64, mkexpr(old), mkU64(4)));
9793 reg++;
9794 } while (reg != (r3 + 1));
9795}
9796
9797static HChar *
9798s390_irgen_STAM(UChar r1, UChar r3, IRTemp op2addr)
9799{
9800 s390_irgen_store_ar_multiple(r1, r3, op2addr);
9801
9802 return "stam";
9803}
9804
9805static HChar *
9806s390_irgen_STAMY(UChar r1, UChar r3, IRTemp op2addr)
9807{
9808 s390_irgen_store_ar_multiple(r1, r3, op2addr);
9809
9810 return "stamy";
9811}
9812
9813
9814/* Implementation for 32-bit compare-and-swap */
9815static void
9816s390_irgen_cas_32(UChar r1, UChar r3, IRTemp op2addr)
9817{
9818 IRCAS *cas;
9819 IRTemp op1 = newTemp(Ity_I32);
9820 IRTemp old_mem = newTemp(Ity_I32);
9821 IRTemp op3 = newTemp(Ity_I32);
9822 IRTemp result = newTemp(Ity_I32);
9823 IRTemp nequal = newTemp(Ity_I1);
9824
9825 assign(op1, get_gpr_w1(r1));
9826 assign(op3, get_gpr_w1(r3));
9827
9828 /* The first and second operands are compared. If they are equal,
9829 the third operand is stored at the second- operand location. */
9830 cas = mkIRCAS(IRTemp_INVALID, old_mem,
9831 Iend_BE, mkexpr(op2addr),
9832 NULL, mkexpr(op1), /* expected value */
9833 NULL, mkexpr(op3) /* new value */);
9834 stmt(IRStmt_CAS(cas));
9835
9836 /* Set CC. Operands compared equal -> 0, else 1. */
9837 assign(result, binop(Iop_Sub32, mkexpr(op1), mkexpr(old_mem)));
9838 s390_cc_thunk_put1(S390_CC_OP_BITWISE, result, False);
9839
9840 /* If operands were equal (cc == 0) just store the old value op1 in r1.
9841 Otherwise, store the old_value from memory in r1 and yield. */
9842 assign(nequal, binop(Iop_CmpNE32, s390_call_calculate_cc(), mkU32(0)));
9843 put_gpr_w1(r1, mkite(mkexpr(nequal), mkexpr(old_mem), mkexpr(op1)));
9844 stmt(IRStmt_Exit(mkexpr(nequal), Ijk_Yield,
9845 IRConst_U64(guest_IA_next_instr)));
9846}
9847
9848static HChar *
9849s390_irgen_CS(UChar r1, UChar r3, IRTemp op2addr)
9850{
9851 s390_irgen_cas_32(r1, r3, op2addr);
9852
9853 return "cs";
9854}
9855
9856static HChar *
9857s390_irgen_CSY(UChar r1, UChar r3, IRTemp op2addr)
9858{
9859 s390_irgen_cas_32(r1, r3, op2addr);
9860
9861 return "csy";
9862}
9863
9864static HChar *
9865s390_irgen_CSG(UChar r1, UChar r3, IRTemp op2addr)
9866{
9867 IRCAS *cas;
9868 IRTemp op1 = newTemp(Ity_I64);
9869 IRTemp old_mem = newTemp(Ity_I64);
9870 IRTemp op3 = newTemp(Ity_I64);
9871 IRTemp result = newTemp(Ity_I64);
9872 IRTemp nequal = newTemp(Ity_I1);
9873
9874 assign(op1, get_gpr_dw0(r1));
9875 assign(op3, get_gpr_dw0(r3));
9876
9877 /* The first and second operands are compared. If they are equal,
9878 the third operand is stored at the second- operand location. */
9879 cas = mkIRCAS(IRTemp_INVALID, old_mem,
9880 Iend_BE, mkexpr(op2addr),
9881 NULL, mkexpr(op1), /* expected value */
9882 NULL, mkexpr(op3) /* new value */);
9883 stmt(IRStmt_CAS(cas));
9884
9885 /* Set CC. Operands compared equal -> 0, else 1. */
9886 assign(result, binop(Iop_Sub64, mkexpr(op1), mkexpr(old_mem)));
9887 s390_cc_thunk_put1(S390_CC_OP_BITWISE, result, False);
9888
9889 /* If operands were equal (cc == 0) just store the old value op1 in r1.
9890 Otherwise, store the old_value from memory in r1 and yield. */
9891 assign(nequal, binop(Iop_CmpNE32, s390_call_calculate_cc(), mkU32(0)));
9892 put_gpr_dw0(r1, mkite(mkexpr(nequal), mkexpr(old_mem), mkexpr(op1)));
9893 stmt(IRStmt_Exit(mkexpr(nequal), Ijk_Yield,
9894 IRConst_U64(guest_IA_next_instr)));
9895
9896 return "csg";
9897}
9898
9899
9900/* Binary floating point */
9901
9902static HChar *
9903s390_irgen_AXBR(UChar r1, UChar r2)
9904{
9905 IRTemp op1 = newTemp(Ity_F128);
9906 IRTemp op2 = newTemp(Ity_F128);
9907 IRTemp result = newTemp(Ity_F128);
9908
9909 assign(op1, get_fpr_pair(r1));
9910 assign(op2, get_fpr_pair(r2));
9911 assign(result, triop(Iop_AddF128, mkU32(Irrm_NEAREST), mkexpr(op1),
9912 mkexpr(op2)));
9913 put_fpr_pair(r1, mkexpr(result));
9914
9915 s390_cc_thunk_put1f128(S390_CC_OP_BFP_RESULT_128, result);
9916
9917 return "axbr";
9918}
9919
9920/* The result of a Iop_CmdFxx operation is a condition code. It is
9921 encoded using the values defined in type IRCmpFxxResult.
9922 Before we can store the condition code into the guest state (or do
9923 anything else with it for that matter) we need to convert it to
9924 the encoding that s390 uses. This is what this function does.
9925
9926 s390 VEX b6 b2 b0 cc.1 cc.0
9927 0 0x40 EQ 1 0 0 0 0
9928 1 0x01 LT 0 0 1 0 1
9929 2 0x00 GT 0 0 0 1 0
9930 3 0x45 Unordered 1 1 1 1 1
9931
9932 The following bits from the VEX encoding are interesting:
9933 b0, b2, b6 with b0 being the LSB. We observe:
9934
9935 cc.0 = b0;
9936 cc.1 = b2 | (~b0 & ~b6)
9937
9938 with cc being the s390 condition code.
9939*/
9940static IRExpr *
9941convert_vex_fpcc_to_s390(IRTemp vex_cc)
9942{
9943 IRTemp cc0 = newTemp(Ity_I32);
9944 IRTemp cc1 = newTemp(Ity_I32);
9945 IRTemp b0 = newTemp(Ity_I32);
9946 IRTemp b2 = newTemp(Ity_I32);
9947 IRTemp b6 = newTemp(Ity_I32);
9948
9949 assign(b0, binop(Iop_And32, mkexpr(vex_cc), mkU32(1)));
9950 assign(b2, binop(Iop_And32, binop(Iop_Shr32, mkexpr(vex_cc), mkU8(2)),
9951 mkU32(1)));
9952 assign(b6, binop(Iop_And32, binop(Iop_Shr32, mkexpr(vex_cc), mkU8(6)),
9953 mkU32(1)));
9954
9955 assign(cc0, mkexpr(b0));
9956 assign(cc1, binop(Iop_Or32, mkexpr(b2),
9957 binop(Iop_And32,
9958 binop(Iop_Sub32, mkU32(1), mkexpr(b0)), /* ~b0 */
9959 binop(Iop_Sub32, mkU32(1), mkexpr(b6)) /* ~b6 */
9960 )));
9961
9962 return binop(Iop_Or32, mkexpr(cc0), binop(Iop_Shl32, mkexpr(cc1), mkU8(1)));
9963}
9964
9965static HChar *
9966s390_irgen_CEBR(UChar r1, UChar r2)
9967{
9968 IRTemp op1 = newTemp(Ity_F32);
9969 IRTemp op2 = newTemp(Ity_F32);
9970 IRTemp cc_vex = newTemp(Ity_I32);
9971 IRTemp cc_s390 = newTemp(Ity_I32);
9972
9973 assign(op1, get_fpr_w0(r1));
9974 assign(op2, get_fpr_w0(r2));
9975 assign(cc_vex, binop(Iop_CmpF32, mkexpr(op1), mkexpr(op2)));
9976
9977 assign(cc_s390, convert_vex_fpcc_to_s390(cc_vex));
9978 s390_cc_thunk_put1(S390_CC_OP_SET, cc_s390, False);
9979
9980 return "cebr";
9981}
9982
9983static HChar *
9984s390_irgen_CDBR(UChar r1, UChar r2)
9985{
9986 IRTemp op1 = newTemp(Ity_F64);
9987 IRTemp op2 = newTemp(Ity_F64);
9988 IRTemp cc_vex = newTemp(Ity_I32);
9989 IRTemp cc_s390 = newTemp(Ity_I32);
9990
9991 assign(op1, get_fpr_dw0(r1));
9992 assign(op2, get_fpr_dw0(r2));
9993 assign(cc_vex, binop(Iop_CmpF64, mkexpr(op1), mkexpr(op2)));
9994
9995 assign(cc_s390, convert_vex_fpcc_to_s390(cc_vex));
9996 s390_cc_thunk_put1(S390_CC_OP_SET, cc_s390, False);
9997
9998 return "cdbr";
9999}
10000
10001static HChar *
10002s390_irgen_CXBR(UChar r1, UChar r2)
10003{
10004 IRTemp op1 = newTemp(Ity_F128);
10005 IRTemp op2 = newTemp(Ity_F128);
10006 IRTemp cc_vex = newTemp(Ity_I32);
10007 IRTemp cc_s390 = newTemp(Ity_I32);
10008
10009 assign(op1, get_fpr_pair(r1));
10010 assign(op2, get_fpr_pair(r2));
10011 assign(cc_vex, binop(Iop_CmpF128, mkexpr(op1), mkexpr(op2)));
10012
10013 assign(cc_s390, convert_vex_fpcc_to_s390(cc_vex));
10014 s390_cc_thunk_put1(S390_CC_OP_SET, cc_s390, False);
10015
10016 return "cxbr";
10017}
10018
10019static HChar *
10020s390_irgen_CEB(UChar r1, IRTemp op2addr)
10021{
10022 IRTemp op1 = newTemp(Ity_F32);
10023 IRTemp op2 = newTemp(Ity_F32);
10024 IRTemp cc_vex = newTemp(Ity_I32);
10025 IRTemp cc_s390 = newTemp(Ity_I32);
10026
10027 assign(op1, get_fpr_w0(r1));
10028 assign(op2, load(Ity_F32, mkexpr(op2addr)));
10029 assign(cc_vex, binop(Iop_CmpF32, mkexpr(op1), mkexpr(op2)));
10030
10031 assign(cc_s390, convert_vex_fpcc_to_s390(cc_vex));
10032 s390_cc_thunk_put1(S390_CC_OP_SET, cc_s390, False);
10033
10034 return "ceb";
10035}
10036
10037static HChar *
10038s390_irgen_CDB(UChar r1, IRTemp op2addr)
10039{
10040 IRTemp op1 = newTemp(Ity_F64);
10041 IRTemp op2 = newTemp(Ity_F64);
10042 IRTemp cc_vex = newTemp(Ity_I32);
10043 IRTemp cc_s390 = newTemp(Ity_I32);
10044
10045 assign(op1, get_fpr_dw0(r1));
10046 assign(op2, load(Ity_F64, mkexpr(op2addr)));
10047 assign(cc_vex, binop(Iop_CmpF64, mkexpr(op1), mkexpr(op2)));
10048
10049 assign(cc_s390, convert_vex_fpcc_to_s390(cc_vex));
10050 s390_cc_thunk_put1(S390_CC_OP_SET, cc_s390, False);
10051
10052 return "cdb";
10053}
10054
10055static HChar *
10056s390_irgen_CXFBR(UChar r1, UChar r2)
10057{
10058 IRTemp op2 = newTemp(Ity_I32);
10059
10060 assign(op2, get_gpr_w1(r2));
10061 put_fpr_pair(r1, unop(Iop_I32StoF128, mkexpr(op2)));
10062
10063 return "cxfbr";
10064}
10065
10066static HChar *
10067s390_irgen_CXGBR(UChar r1, UChar r2)
10068{
10069 IRTemp op2 = newTemp(Ity_I64);
10070
10071 assign(op2, get_gpr_dw0(r2));
10072 put_fpr_pair(r1, unop(Iop_I64StoF128, mkexpr(op2)));
10073
10074 return "cxgbr";
10075}
10076
10077static HChar *
10078s390_irgen_CFXBR(UChar r3, UChar r1, UChar r2)
10079{
10080 IRTemp op = newTemp(Ity_F128);
10081 IRTemp result = newTemp(Ity_I32);
10082
10083 assign(op, get_fpr_pair(r2));
10084 assign(result, binop(Iop_F128toI32S, mkU32(encode_rounding_mode(r3)),
10085 mkexpr(op)));
10086 put_gpr_w1(r1, mkexpr(result));
10087 s390_cc_thunk_put1f128(S390_CC_OP_BFP_128_TO_INT_32, op);
10088
10089 return "cfxbr";
10090}
10091
10092static HChar *
10093s390_irgen_CGXBR(UChar r3, UChar r1, UChar r2)
10094{
10095 IRTemp op = newTemp(Ity_F128);
10096 IRTemp result = newTemp(Ity_I64);
10097
10098 assign(op, get_fpr_pair(r2));
10099 assign(result, binop(Iop_F128toI64S, mkU32(encode_rounding_mode(r3)),
10100 mkexpr(op)));
10101 put_gpr_dw0(r1, mkexpr(result));
10102 s390_cc_thunk_put1f128(S390_CC_OP_BFP_128_TO_INT_64, op);
10103
10104 return "cgxbr";
10105}
10106
10107static HChar *
10108s390_irgen_DXBR(UChar r1, UChar r2)
10109{
10110 IRTemp op1 = newTemp(Ity_F128);
10111 IRTemp op2 = newTemp(Ity_F128);
10112 IRTemp result = newTemp(Ity_F128);
10113
10114 assign(op1, get_fpr_pair(r1));
10115 assign(op2, get_fpr_pair(r2));
10116 assign(result, triop(Iop_DivF128, mkU32(Irrm_NEAREST), mkexpr(op1),
10117 mkexpr(op2)));
10118 put_fpr_pair(r1, mkexpr(result));
10119
10120 return "dxbr";
10121}
10122
10123static HChar *
10124s390_irgen_LTXBR(UChar r1, UChar r2)
10125{
10126 IRTemp result = newTemp(Ity_F128);
10127
10128 assign(result, get_fpr_pair(r2));
10129 put_fpr_pair(r1, mkexpr(result));
10130 s390_cc_thunk_put1f128(S390_CC_OP_BFP_RESULT_128, result);
10131
10132 return "ltxbr";
10133}
10134
10135static HChar *
10136s390_irgen_LCXBR(UChar r1, UChar r2)
10137{
10138 IRTemp result = newTemp(Ity_F128);
10139
10140 assign(result, unop(Iop_NegF128, get_fpr_pair(r2)));
10141 put_fpr_pair(r1, mkexpr(result));
10142 s390_cc_thunk_put1f128(S390_CC_OP_BFP_RESULT_128, result);
10143
10144 return "lcxbr";
10145}
10146
10147static HChar *
10148s390_irgen_LXDBR(UChar r1, UChar r2)
10149{
10150 IRTemp op = newTemp(Ity_F64);
10151
10152 assign(op, get_fpr_dw0(r2));
10153 put_fpr_pair(r1, unop(Iop_F64toF128, mkexpr(op)));
10154
10155 return "lxdbr";
10156}
10157
10158static HChar *
10159s390_irgen_LXEBR(UChar r1, UChar r2)
10160{
10161 IRTemp op = newTemp(Ity_F32);
10162
10163 assign(op, get_fpr_w0(r2));
10164 put_fpr_pair(r1, unop(Iop_F32toF128, mkexpr(op)));
10165
10166 return "lxebr";
10167}
10168
10169static HChar *
10170s390_irgen_LXDB(UChar r1, IRTemp op2addr)
10171{
10172 IRTemp op = newTemp(Ity_F64);
10173
10174 assign(op, load(Ity_F64, mkexpr(op2addr)));
10175 put_fpr_pair(r1, unop(Iop_F64toF128, mkexpr(op)));
10176
10177 return "lxdb";
10178}
10179
10180static HChar *
10181s390_irgen_LXEB(UChar r1, IRTemp op2addr)
10182{
10183 IRTemp op = newTemp(Ity_F32);
10184
10185 assign(op, load(Ity_F32, mkexpr(op2addr)));
10186 put_fpr_pair(r1, unop(Iop_F32toF128, mkexpr(op)));
10187
10188 return "lxeb";
10189}
10190
10191static HChar *
10192s390_irgen_LNEBR(UChar r1, UChar r2)
10193{
10194 IRTemp result = newTemp(Ity_F32);
10195
10196 assign(result, unop(Iop_NegF32, unop(Iop_AbsF32, get_fpr_w0(r2))));
10197 put_fpr_w0(r1, mkexpr(result));
10198 s390_cc_thunk_put1f(S390_CC_OP_BFP_RESULT_32, result);
10199
10200 return "lnebr";
10201}
10202
10203static HChar *
10204s390_irgen_LNDBR(UChar r1, UChar r2)
10205{
10206 IRTemp result = newTemp(Ity_F64);
10207
10208 assign(result, unop(Iop_NegF64, unop(Iop_AbsF64, get_fpr_dw0(r2))));
10209 put_fpr_dw0(r1, mkexpr(result));
10210 s390_cc_thunk_put1f(S390_CC_OP_BFP_RESULT_64, result);
10211
10212 return "lndbr";
10213}
10214
10215static HChar *
10216s390_irgen_LNXBR(UChar r1, UChar r2)
10217{
10218 IRTemp result = newTemp(Ity_F128);
10219
10220 assign(result, unop(Iop_NegF128, unop(Iop_AbsF128, get_fpr_pair(r2))));
10221 put_fpr_pair(r1, mkexpr(result));
10222 s390_cc_thunk_put1f128(S390_CC_OP_BFP_RESULT_128, result);
10223
10224 return "lnxbr";
10225}
10226
10227static HChar *
10228s390_irgen_LPEBR(UChar r1, UChar r2)
10229{
10230 IRTemp result = newTemp(Ity_F32);
10231
10232 assign(result, unop(Iop_AbsF32, get_fpr_w0(r2)));
10233 put_fpr_w0(r1, mkexpr(result));
10234 s390_cc_thunk_put1f(S390_CC_OP_BFP_RESULT_32, result);
10235
10236 return "lpebr";
10237}
10238
10239static HChar *
10240s390_irgen_LPDBR(UChar r1, UChar r2)
10241{
10242 IRTemp result = newTemp(Ity_F64);
10243
10244 assign(result, unop(Iop_AbsF64, get_fpr_dw0(r2)));
10245 put_fpr_dw0(r1, mkexpr(result));
10246 s390_cc_thunk_put1f(S390_CC_OP_BFP_RESULT_64, result);
10247
10248 return "lpdbr";
10249}
10250
10251static HChar *
10252s390_irgen_LPXBR(UChar r1, UChar r2)
10253{
10254 IRTemp result = newTemp(Ity_F128);
10255
10256 assign(result, unop(Iop_AbsF128, get_fpr_pair(r2)));
10257 put_fpr_pair(r1, mkexpr(result));
10258 s390_cc_thunk_put1f128(S390_CC_OP_BFP_RESULT_128, result);
10259
10260 return "lpxbr";
10261}
10262
10263static HChar *
10264s390_irgen_LDXBR(UChar r1, UChar r2)
10265{
10266 IRTemp result = newTemp(Ity_F64);
10267
10268 assign(result, binop(Iop_F128toF64, mkU32(Irrm_NEAREST), get_fpr_pair(r2)));
10269 put_fpr_dw0(r1, mkexpr(result));
10270
10271 return "ldxbr";
10272}
10273
10274static HChar *
10275s390_irgen_LEXBR(UChar r1, UChar r2)
10276{
10277 IRTemp result = newTemp(Ity_F32);
10278
10279 assign(result, binop(Iop_F128toF32, mkU32(Irrm_NEAREST), get_fpr_pair(r2)));
10280 put_fpr_w0(r1, mkexpr(result));
10281
10282 return "lexbr";
10283}
10284
10285static HChar *
10286s390_irgen_MXBR(UChar r1, UChar r2)
10287{
10288 IRTemp op1 = newTemp(Ity_F128);
10289 IRTemp op2 = newTemp(Ity_F128);
10290 IRTemp result = newTemp(Ity_F128);
10291
10292 assign(op1, get_fpr_pair(r1));
10293 assign(op2, get_fpr_pair(r2));
10294 assign(result, triop(Iop_MulF128, mkU32(Irrm_NEAREST), mkexpr(op1),
10295 mkexpr(op2)));
10296 put_fpr_pair(r1, mkexpr(result));
10297
10298 return "mxbr";
10299}
10300
10301static HChar *
10302s390_irgen_MAEBR(UChar r1, UChar r3, UChar r2)
10303{
10304 put_fpr_w0(r1, qop(Iop_MAddF32, mkU32(Irrm_NEAREST),
10305 get_fpr_w0(r1), get_fpr_w0(r2), get_fpr_w0(r3)));
10306
10307 return "maebr";
10308}
10309
10310static HChar *
10311s390_irgen_MADBR(UChar r1, UChar r3, UChar r2)
10312{
10313 put_fpr_dw0(r1, qop(Iop_MAddF64, mkU32(Irrm_NEAREST),
10314 get_fpr_dw0(r1), get_fpr_dw0(r2), get_fpr_dw0(r3)));
10315
10316 return "madbr";
10317}
10318
10319static HChar *
10320s390_irgen_MAEB(UChar r3, IRTemp op2addr, UChar r1)
10321{
10322 IRExpr *op2 = load(Ity_F32, mkexpr(op2addr));
10323
10324 put_fpr_w0(r1, qop(Iop_MAddF32, mkU32(Irrm_NEAREST),
10325 get_fpr_w0(r1), op2, get_fpr_w0(r3)));
10326
10327 return "maeb";
10328}
10329
10330static HChar *
10331s390_irgen_MADB(UChar r3, IRTemp op2addr, UChar r1)
10332{
10333 IRExpr *op2 = load(Ity_F64, mkexpr(op2addr));
10334
10335 put_fpr_dw0(r1, qop(Iop_MAddF64, mkU32(Irrm_NEAREST),
10336 get_fpr_dw0(r1), op2, get_fpr_dw0(r3)));
10337
10338 return "madb";
10339}
10340
10341static HChar *
10342s390_irgen_MSEBR(UChar r1, UChar r3, UChar r2)
10343{
10344 put_fpr_w0(r1, qop(Iop_MSubF32, mkU32(Irrm_NEAREST),
10345 get_fpr_w0(r1), get_fpr_w0(r2), get_fpr_w0(r3)));
10346
10347 return "msebr";
10348}
10349
10350static HChar *
10351s390_irgen_MSDBR(UChar r1, UChar r3, UChar r2)
10352{
10353 put_fpr_dw0(r1, qop(Iop_MSubF64, mkU32(Irrm_NEAREST),
10354 get_fpr_dw0(r1), get_fpr_dw0(r2), get_fpr_dw0(r3)));
10355
10356 return "msdbr";
10357}
10358
10359static HChar *
10360s390_irgen_MSEB(UChar r3, IRTemp op2addr, UChar r1)
10361{
10362 IRExpr *op2 = load(Ity_F32, mkexpr(op2addr));
10363
10364 put_fpr_w0(r1, qop(Iop_MSubF32, mkU32(Irrm_NEAREST),
10365 get_fpr_w0(r1), op2, get_fpr_w0(r3)));
10366
10367 return "mseb";
10368}
10369
10370static HChar *
10371s390_irgen_MSDB(UChar r3, IRTemp op2addr, UChar r1)
10372{
10373 IRExpr *op2 = load(Ity_F64, mkexpr(op2addr));
10374
10375 put_fpr_dw0(r1, qop(Iop_MSubF64, mkU32(Irrm_NEAREST),
10376 get_fpr_dw0(r1), op2, get_fpr_dw0(r3)));
10377
10378 return "msdb";
10379}
10380
10381static HChar *
10382s390_irgen_SQEBR(UChar r1, UChar r2)
10383{
10384 IRTemp result = newTemp(Ity_F32);
10385
10386 assign(result, binop(Iop_SqrtF32, mkU32(Irrm_NEAREST), get_fpr_w0(r2)));
10387 put_fpr_w0(r1, mkexpr(result));
10388
10389 return "sqebr";
10390}
10391
10392static HChar *
10393s390_irgen_SQDBR(UChar r1, UChar r2)
10394{
10395 IRTemp result = newTemp(Ity_F64);
10396
10397 assign(result, binop(Iop_SqrtF64, mkU32(Irrm_NEAREST), get_fpr_dw0(r2)));
10398 put_fpr_dw0(r1, mkexpr(result));
10399
10400 return "sqdbr";
10401}
10402
10403static HChar *
10404s390_irgen_SQXBR(UChar r1, UChar r2)
10405{
10406 IRTemp result = newTemp(Ity_F128);
10407
10408 assign(result, binop(Iop_SqrtF128, mkU32(Irrm_NEAREST), get_fpr_pair(r2)));
10409 put_fpr_pair(r1, mkexpr(result));
10410
10411 return "sqxbr";
10412}
10413
10414static HChar *
10415s390_irgen_SQEB(UChar r1, IRTemp op2addr)
10416{
10417 IRTemp op = newTemp(Ity_F32);
10418
10419 assign(op, load(Ity_F32, mkexpr(op2addr)));
10420 put_fpr_w0(r1, binop(Iop_SqrtF32, mkU32(Irrm_NEAREST), mkexpr(op)));
10421
10422 return "sqeb";
10423}
10424
10425static HChar *
10426s390_irgen_SQDB(UChar r1, IRTemp op2addr)
10427{
10428 IRTemp op = newTemp(Ity_F64);
10429
10430 assign(op, load(Ity_F64, mkexpr(op2addr)));
10431 put_fpr_dw0(r1, binop(Iop_SqrtF64, mkU32(Irrm_NEAREST), mkexpr(op)));
10432
10433 return "sqdb";
10434}
10435
10436static HChar *
10437s390_irgen_SXBR(UChar r1, UChar r2)
10438{
10439 IRTemp op1 = newTemp(Ity_F128);
10440 IRTemp op2 = newTemp(Ity_F128);
10441 IRTemp result = newTemp(Ity_F128);
10442
10443 assign(op1, get_fpr_pair(r1));
10444 assign(op2, get_fpr_pair(r2));
10445 assign(result, triop(Iop_SubF128, mkU32(Irrm_NEAREST), mkexpr(op1),
10446 mkexpr(op2)));
10447 put_fpr_pair(r1, mkexpr(result));
10448 s390_cc_thunk_put1f128(S390_CC_OP_BFP_RESULT_128, result);
10449
10450 return "sxbr";
10451}
10452
10453static HChar *
10454s390_irgen_TCEB(UChar r1, IRTemp op2addr)
10455{
10456 IRTemp value = newTemp(Ity_F32);
10457
10458 assign(value, get_fpr_w0(r1));
10459
10460 s390_cc_thunk_putFZ(S390_CC_OP_BFP_TDC_32, value, op2addr);
10461
10462 return "tceb";
10463}
10464
10465static HChar *
10466s390_irgen_TCDB(UChar r1, IRTemp op2addr)
10467{
10468 IRTemp value = newTemp(Ity_F64);
10469
10470 assign(value, get_fpr_dw0(r1));
10471
10472 s390_cc_thunk_putFZ(S390_CC_OP_BFP_TDC_64, value, op2addr);
10473
10474 return "tcdb";
10475}
10476
10477static HChar *
10478s390_irgen_TCXB(UChar r1, IRTemp op2addr)
10479{
10480 IRTemp value = newTemp(Ity_F128);
10481
10482 assign(value, get_fpr_pair(r1));
10483
10484 s390_cc_thunk_put1f128Z(S390_CC_OP_BFP_TDC_128, value, op2addr);
10485
10486 return "tcxb";
10487}
10488
10489static HChar *
10490s390_irgen_LCDFR(UChar r1, UChar r2)
10491{
10492 IRTemp result = newTemp(Ity_F64);
10493
10494 assign(result, unop(Iop_NegF64, get_fpr_dw0(r2)));
10495 put_fpr_dw0(r1, mkexpr(result));
10496
10497 return "lcdfr";
10498}
10499
10500static HChar *
10501s390_irgen_LNDFR(UChar r1, UChar r2)
10502{
10503 IRTemp result = newTemp(Ity_F64);
10504
10505 assign(result, unop(Iop_NegF64, unop(Iop_AbsF64, get_fpr_dw0(r2))));
10506 put_fpr_dw0(r1, mkexpr(result));
10507
10508 return "lndfr";
10509}
10510
10511static HChar *
10512s390_irgen_LPDFR(UChar r1, UChar r2)
10513{
10514 IRTemp result = newTemp(Ity_F64);
10515
10516 assign(result, unop(Iop_AbsF64, get_fpr_dw0(r2)));
10517 put_fpr_dw0(r1, mkexpr(result));
10518
10519 return "lpdfr";
10520}
10521
10522static HChar *
10523s390_irgen_LDGR(UChar r1, UChar r2)
10524{
10525 put_fpr_dw0(r1, unop(Iop_ReinterpI64asF64, get_gpr_dw0(r2)));
10526
10527 return "ldgr";
10528}
10529
10530static HChar *
10531s390_irgen_LGDR(UChar r1, UChar r2)
10532{
10533 put_gpr_dw0(r1, unop(Iop_ReinterpF64asI64, get_fpr_dw0(r2)));
10534
10535 return "lgdr";
10536}
10537
10538
10539static HChar *
10540s390_irgen_CPSDR(UChar r3, UChar r1, UChar r2)
10541{
10542 IRTemp sign = newTemp(Ity_I64);
10543 IRTemp value = newTemp(Ity_I64);
10544
10545 assign(sign, binop(Iop_And64, unop(Iop_ReinterpF64asI64, get_fpr_dw0(r3)),
10546 mkU64(1ULL << 63)));
10547 assign(value, binop(Iop_And64, unop(Iop_ReinterpF64asI64, get_fpr_dw0(r2)),
10548 mkU64((1ULL << 63) - 1)));
10549 put_fpr_dw0(r1, unop(Iop_ReinterpI64asF64, binop(Iop_Or64, mkexpr(value),
10550 mkexpr(sign))));
10551
10552 return "cpsdr";
10553}
10554
10555
10556static UInt
10557s390_do_cvb(ULong decimal)
10558{
10559#if defined(VGA_s390x)
10560 UInt binary;
10561
10562 __asm__ volatile (
10563 "cvb %[result],%[input]\n\t"
10564 : [result] "=d"(binary)
10565 : [input] "m"(decimal)
10566 );
10567
10568 return binary;
10569#else
10570 return 0;
10571#endif
10572}
10573
10574static IRExpr *
10575s390_call_cvb(IRExpr *in)
10576{
10577 IRExpr **args, *call;
10578
10579 args = mkIRExprVec_1(in);
10580 call = mkIRExprCCall(Ity_I32, 0 /*regparm*/,
10581 "s390_do_cvb", &s390_do_cvb, args);
10582
10583 /* Nothing is excluded from definedness checking. */
10584 call->Iex.CCall.cee->mcx_mask = 0;
10585
10586 return call;
10587}
10588
10589static HChar *
10590s390_irgen_CVB(UChar r1, IRTemp op2addr)
10591{
10592 put_gpr_w1(r1, s390_call_cvb(load(Ity_I64, mkexpr(op2addr))));
10593
10594 return "cvb";
10595}
10596
10597static HChar *
10598s390_irgen_CVBY(UChar r1, IRTemp op2addr)
10599{
10600 put_gpr_w1(r1, s390_call_cvb(load(Ity_I64, mkexpr(op2addr))));
10601
10602 return "cvby";
10603}
10604
10605
10606static ULong
10607s390_do_cvd(ULong binary_in)
10608{
10609#if defined(VGA_s390x)
10610 UInt binary = binary_in & 0xffffffffULL;
10611 ULong decimal;
10612
10613 __asm__ volatile (
10614 "cvd %[input],%[result]\n\t"
10615 : [result] "=m"(decimal)
10616 : [input] "d"(binary)
10617 );
10618
10619 return decimal;
10620#else
10621 return 0;
10622#endif
10623}
10624
10625static IRExpr *
10626s390_call_cvd(IRExpr *in)
10627{
10628 IRExpr **args, *call;
10629
10630 args = mkIRExprVec_1(in);
10631 call = mkIRExprCCall(Ity_I64, 0 /*regparm*/,
10632 "s390_do_cvd", &s390_do_cvd, args);
10633
10634 /* Nothing is excluded from definedness checking. */
10635 call->Iex.CCall.cee->mcx_mask = 0;
10636
10637 return call;
10638}
10639
10640static HChar *
10641s390_irgen_CVD(UChar r1, IRTemp op2addr)
10642{
10643 store(mkexpr(op2addr), s390_call_cvd(get_gpr_w1(r1)));
10644
10645 return "cvd";
10646}
10647
10648static HChar *
10649s390_irgen_CVDY(UChar r1, IRTemp op2addr)
10650{
10651 store(mkexpr(op2addr), s390_call_cvd(get_gpr_w1(r1)));
10652
10653 return "cvdy";
10654}
10655
10656static HChar *
10657s390_irgen_FLOGR(UChar r1, UChar r2)
10658{
10659 IRTemp input = newTemp(Ity_I64);
10660 IRTemp not_zero = newTemp(Ity_I64);
10661 IRTemp tmpnum = newTemp(Ity_I64);
10662 IRTemp num = newTemp(Ity_I64);
10663 IRTemp shift_amount = newTemp(Ity_I8);
10664
10665 /* We use the "count leading zeroes" operator because the number of
10666 leading zeroes is identical with the bit position of the first '1' bit.
10667 However, that operator does not work when the input value is zero.
10668 Therefore, we set the LSB of the input value to 1 and use Clz64 on
10669 the modified value. If input == 0, then the result is 64. Otherwise,
10670 the result of Clz64 is what we want. */
10671
10672 assign(input, get_gpr_dw0(r2));
10673 assign(not_zero, binop(Iop_Or64, mkexpr(input), mkU64(1)));
10674 assign(tmpnum, unop(Iop_Clz64, mkexpr(not_zero)));
10675
10676 /* num = (input == 0) ? 64 : tmpnum */
10677 assign(num, mkite(binop(Iop_CmpEQ64, mkexpr(input), mkU64(0)),
10678 /* == 0 */ mkU64(64),
10679 /* != 0 */ mkexpr(tmpnum)));
10680
10681 put_gpr_dw0(r1, mkexpr(num));
10682
10683 /* Set the leftmost '1' bit of the input value to zero. The general scheme
10684 is to first shift the input value by NUM + 1 bits to the left which
10685 causes the leftmost '1' bit to disappear. Then we shift logically to
10686 the right by NUM + 1 bits. Because the semantics of Iop_Shl64 and
10687 Iop_Shr64 are undefined if the shift-amount is greater than or equal to
10688 the width of the value-to-be-shifted, we need to special case
10689 NUM + 1 >= 64. This is equivalent to INPUT != 0 && INPUT != 1.
10690 For both such INPUT values the result will be 0. */
10691
10692 assign(shift_amount, unop(Iop_64to8, binop(Iop_Add64, mkexpr(num),
10693 mkU64(1))));
10694
10695 put_gpr_dw0(r1 + 1,
florian6ad49522011-09-09 02:38:55 +000010696 mkite(binop(Iop_CmpLE64U, mkexpr(input), mkU64(1)),
10697 /* == 0 || == 1*/ mkU64(0),
10698 /* otherwise */
10699 binop(Iop_Shr64,
10700 binop(Iop_Shl64, mkexpr(input),
10701 mkexpr(shift_amount)),
10702 mkexpr(shift_amount))));
sewardj2019a972011-03-07 16:04:07 +000010703
10704 /* Compare the original value as an unsigned integer with 0. */
10705 s390_cc_thunk_put2(S390_CC_OP_UNSIGNED_COMPARE, input,
10706 mktemp(Ity_I64, mkU64(0)), False);
10707
10708 return "flogr";
10709}
10710
sewardj1e5fea62011-05-17 16:18:36 +000010711static HChar *
10712s390_irgen_STCK(IRTemp op2addr)
10713{
10714 IRDirty *d;
10715 IRTemp cc = newTemp(Ity_I64);
10716
10717 d = unsafeIRDirty_1_N(cc, 0, "s390x_dirtyhelper_STCK",
10718 &s390x_dirtyhelper_STCK,
10719 mkIRExprVec_1(mkexpr(op2addr)));
10720 d->mFx = Ifx_Write;
10721 d->mAddr = mkexpr(op2addr);
10722 d->mSize = 8;
10723 stmt(IRStmt_Dirty(d));
10724 s390_cc_thunk_fill(mkU64(S390_CC_OP_SET),
10725 mkexpr(cc), mkU64(0), mkU64(0));
10726 return "stck";
10727}
10728
10729static HChar *
10730s390_irgen_STCKF(IRTemp op2addr)
10731{
10732 IRDirty *d;
10733 IRTemp cc = newTemp(Ity_I64);
10734
10735 d = unsafeIRDirty_1_N(cc, 0, "s390x_dirtyhelper_STCKF",
10736 &s390x_dirtyhelper_STCKF,
10737 mkIRExprVec_1(mkexpr(op2addr)));
10738 d->mFx = Ifx_Write;
10739 d->mAddr = mkexpr(op2addr);
10740 d->mSize = 8;
10741 stmt(IRStmt_Dirty(d));
10742 s390_cc_thunk_fill(mkU64(S390_CC_OP_SET),
10743 mkexpr(cc), mkU64(0), mkU64(0));
10744 return "stckf";
10745}
10746
10747static HChar *
10748s390_irgen_STCKE(IRTemp op2addr)
10749{
10750 IRDirty *d;
10751 IRTemp cc = newTemp(Ity_I64);
10752
10753 d = unsafeIRDirty_1_N(cc, 0, "s390x_dirtyhelper_STCKE",
10754 &s390x_dirtyhelper_STCKE,
10755 mkIRExprVec_1(mkexpr(op2addr)));
10756 d->mFx = Ifx_Write;
10757 d->mAddr = mkexpr(op2addr);
10758 d->mSize = 16;
10759 stmt(IRStmt_Dirty(d));
10760 s390_cc_thunk_fill(mkU64(S390_CC_OP_SET),
10761 mkexpr(cc), mkU64(0), mkU64(0));
10762 return "stcke";
10763}
10764
florian933065d2011-07-11 01:48:02 +000010765static HChar *
10766s390_irgen_STFLE(IRTemp op2addr)
10767{
10768 IRDirty *d;
10769 IRTemp cc = newTemp(Ity_I64);
10770
10771 d = unsafeIRDirty_1_N(cc, 0, "s390x_dirtyhelper_STFLE",
10772 &s390x_dirtyhelper_STFLE,
10773 mkIRExprVec_1(mkexpr(op2addr)));
10774
10775 d->needsBBP = 1; /* Need to pass pointer to guest state to helper */
10776
10777 d->fxState[0].fx = Ifx_Modify; /* read then write */
10778 d->fxState[0].offset = S390X_GUEST_OFFSET(guest_r0);
10779 d->fxState[0].size = sizeof(ULong);
10780 d->nFxState = 1;
10781
10782 d->mAddr = mkexpr(op2addr);
10783 /* Pretend all double words are written */
10784 d->mSize = S390_NUM_FACILITY_DW * sizeof(ULong);
10785 d->mFx = Ifx_Write;
10786
10787 stmt(IRStmt_Dirty(d));
10788
10789 s390_cc_thunk_fill(mkU64(S390_CC_OP_SET), mkexpr(cc), mkU64(0), mkU64(0));
10790
10791 return "stfle";
10792}
10793
floriana4384a32011-08-11 16:58:45 +000010794static HChar *
10795s390_irgen_CKSM(UChar r1,UChar r2)
10796{
10797 IRTemp addr = newTemp(Ity_I64);
10798 IRTemp op = newTemp(Ity_I32);
10799 IRTemp len = newTemp(Ity_I64);
10800 IRTemp oldval = newTemp(Ity_I32);
10801 IRTemp mask = newTemp(Ity_I32);
10802 IRTemp newop = newTemp(Ity_I32);
10803 IRTemp result = newTemp(Ity_I32);
10804 IRTemp result1 = newTemp(Ity_I32);
10805 IRTemp inc = newTemp(Ity_I64);
10806
10807 assign(oldval, get_gpr_w1(r1));
10808 assign(addr, get_gpr_dw0(r2));
10809 assign(len, get_gpr_dw0(r2+1));
10810
10811 /* Condition code is always zero. */
10812 s390_cc_set(0);
10813
10814 /* If length is zero, there is no need to calculate the checksum */
10815 if_condition_goto(binop(Iop_CmpEQ64, mkexpr(len), mkU64(0)),
10816 guest_IA_next_instr);
10817
10818 /* Assiging the increment variable to adjust address and length
10819 later on. */
10820 assign(inc, mkite(binop(Iop_CmpLT64U, mkexpr(len), mkU64(4)),
10821 mkexpr(len), mkU64(4)));
10822
10823 /* If length < 4 the final 4-byte 2nd operand value is computed by
10824 appending the remaining bytes to the right with 0. This is done
10825 by AND'ing the 4 bytes loaded from memory with an appropriate
10826 mask. If length >= 4, that mask is simply 0xffffffff. */
10827
10828 assign(mask, mkite(binop(Iop_CmpLT64U, mkexpr(len), mkU64(4)),
10829 /* Mask computation when len < 4:
10830 0xffffffff << (32 - (len % 4)*8) */
10831 binop(Iop_Shl32, mkU32(0xffffffff),
10832 unop(Iop_32to8,
10833 binop(Iop_Sub32, mkU32(32),
10834 binop(Iop_Shl32,
10835 unop(Iop_64to32,
10836 binop(Iop_And64,
10837 mkexpr(len), mkU64(3))),
10838 mkU8(3))))),
10839 mkU32(0xffffffff)));
10840
10841 assign(op, load(Ity_I32, mkexpr(addr)));
10842 assign(newop, binop(Iop_And32, mkexpr(op), mkexpr(mask)));
10843 assign(result, binop(Iop_Add32, mkexpr(newop), mkexpr(oldval)));
10844
10845 /* Checking for carry */
10846 assign(result1, mkite(binop(Iop_CmpLT32U, mkexpr(result), mkexpr(newop)),
10847 binop(Iop_Add32, mkexpr(result), mkU32(1)),
10848 mkexpr(result)));
10849
10850 put_gpr_w1(r1, mkexpr(result1));
10851 put_gpr_dw0(r2, binop(Iop_Add64, mkexpr(addr), mkexpr(inc)));
10852 put_gpr_dw0(r2+1, binop(Iop_Sub64, mkexpr(len), mkexpr(inc)));
10853
10854 if_condition_goto(binop(Iop_CmpNE64, mkexpr(len), mkU64(0)),
10855 guest_IA_curr_instr);
10856
10857 return "cksm";
10858}
10859
florian9af37692012-01-15 21:01:16 +000010860static HChar *
10861s390_irgen_TROO(UChar m3, UChar r1, UChar r2)
10862{
10863 IRTemp src_addr, des_addr, tab_addr, src_len, test_byte;
10864 src_addr = newTemp(Ity_I64);
10865 des_addr = newTemp(Ity_I64);
10866 tab_addr = newTemp(Ity_I64);
10867 test_byte = newTemp(Ity_I8);
10868 src_len = newTemp(Ity_I64);
10869
10870 assign(src_addr, get_gpr_dw0(r2));
10871 assign(des_addr, get_gpr_dw0(r1));
10872 assign(tab_addr, get_gpr_dw0(1));
10873 assign(src_len, get_gpr_dw0(r1+1));
10874 assign(test_byte, get_gpr_b7(0));
10875
10876 IRTemp op = newTemp(Ity_I8);
10877 IRTemp op1 = newTemp(Ity_I8);
10878 IRTemp result = newTemp(Ity_I64);
10879
10880 /* End of source string? We're done; proceed to next insn */
10881 s390_cc_set(0);
10882 if_condition_goto(binop(Iop_CmpEQ64, mkexpr(src_len), mkU64(0)),
10883 guest_IA_next_instr);
10884
10885 /* Load character from source string, index translation table and
10886 store translated character in op1. */
10887 assign(op, load(Ity_I8, mkexpr(src_addr)));
10888
10889 assign(result, binop(Iop_Add64, unop(Iop_8Uto64, mkexpr(op)),
10890 mkexpr(tab_addr)));
10891 assign(op1, load(Ity_I8, mkexpr(result)));
10892
10893 if (! s390_host_has_etf2 || (m3 & 0x1) == 0) {
10894 s390_cc_set(1);
10895 if_condition_goto(binop(Iop_CmpEQ8, mkexpr(op1), mkexpr(test_byte)),
10896 guest_IA_next_instr);
10897 }
10898 store(get_gpr_dw0(r1), mkexpr(op1));
10899
10900 put_gpr_dw0(r1, binop(Iop_Add64, mkexpr(des_addr), mkU64(1)));
10901 put_gpr_dw0(r2, binop(Iop_Add64, mkexpr(src_addr), mkU64(1)));
10902 put_gpr_dw0(r1+1, binop(Iop_Sub64, mkexpr(src_len), mkU64(1)));
10903
10904 always_goto_and_chase(guest_IA_curr_instr);
10905
10906 return "troo";
10907}
10908
floriana4384a32011-08-11 16:58:45 +000010909
sewardj2019a972011-03-07 16:04:07 +000010910/*------------------------------------------------------------*/
10911/*--- Build IR for special instructions ---*/
10912/*------------------------------------------------------------*/
10913
florianb4df7682011-07-05 02:09:01 +000010914static void
sewardj2019a972011-03-07 16:04:07 +000010915s390_irgen_client_request(void)
10916{
10917 if (0)
10918 vex_printf("%%R3 = client_request ( %%R2 )\n");
10919
10920 irsb->next = mkU64((ULong)(guest_IA_curr_instr
10921 + S390_SPECIAL_OP_PREAMBLE_SIZE
10922 + S390_SPECIAL_OP_SIZE));
10923 irsb->jumpkind = Ijk_ClientReq;
10924
10925 dis_res->whatNext = Dis_StopHere;
10926}
10927
florianb4df7682011-07-05 02:09:01 +000010928static void
sewardj2019a972011-03-07 16:04:07 +000010929s390_irgen_guest_NRADDR(void)
10930{
10931 if (0)
10932 vex_printf("%%R3 = guest_NRADDR\n");
10933
floriane88b3c92011-07-05 02:48:39 +000010934 put_gpr_dw0(3, IRExpr_Get(S390X_GUEST_OFFSET(guest_NRADDR), Ity_I64));
sewardj2019a972011-03-07 16:04:07 +000010935}
10936
florianb4df7682011-07-05 02:09:01 +000010937static void
sewardj2019a972011-03-07 16:04:07 +000010938s390_irgen_call_noredir(void)
10939{
10940 /* Continue after special op */
10941 put_gpr_dw0(14, mkU64(guest_IA_curr_instr
10942 + S390_SPECIAL_OP_PREAMBLE_SIZE
10943 + S390_SPECIAL_OP_SIZE));
10944
10945 /* The address is in REG1, all parameters are in the right (guest) places */
10946 irsb->next = get_gpr_dw0(1);
10947 irsb->jumpkind = Ijk_NoRedir;
10948
10949 dis_res->whatNext = Dis_StopHere;
10950}
10951
10952/* Force proper alignment for the structures below. */
10953#pragma pack(1)
10954
10955
10956static s390_decode_t
10957s390_decode_2byte_and_irgen(UChar *bytes)
10958{
10959 typedef union {
10960 struct {
10961 unsigned int op : 16;
10962 } E;
10963 struct {
10964 unsigned int op : 8;
10965 unsigned int i : 8;
10966 } I;
10967 struct {
10968 unsigned int op : 8;
10969 unsigned int r1 : 4;
10970 unsigned int r2 : 4;
10971 } RR;
10972 } formats;
10973 union {
10974 formats fmt;
10975 UShort value;
10976 } ovl;
10977
10978 vassert(sizeof(formats) == 2);
10979
10980 ((char *)(&ovl.value))[0] = bytes[0];
10981 ((char *)(&ovl.value))[1] = bytes[1];
10982
10983 switch (ovl.value & 0xffff) {
florian30e89012011-08-08 18:22:58 +000010984 case 0x0000: /* invalid opcode */
10985 s390_format_RR_RR(s390_irgen_00, 0, 0); goto ok;
sewardj2019a972011-03-07 16:04:07 +000010986 case 0x0101: /* PR */ goto unimplemented;
10987 case 0x0102: /* UPT */ goto unimplemented;
10988 case 0x0104: /* PTFF */ goto unimplemented;
10989 case 0x0107: /* SCKPF */ goto unimplemented;
10990 case 0x010a: /* PFPO */ goto unimplemented;
10991 case 0x010b: /* TAM */ goto unimplemented;
10992 case 0x010c: /* SAM24 */ goto unimplemented;
10993 case 0x010d: /* SAM31 */ goto unimplemented;
10994 case 0x010e: /* SAM64 */ goto unimplemented;
10995 case 0x01ff: /* TRAP2 */ goto unimplemented;
10996 }
10997
10998 switch ((ovl.value & 0xff00) >> 8) {
10999 case 0x04: /* SPM */ goto unimplemented;
11000 case 0x05: /* BALR */ goto unimplemented;
11001 case 0x06: s390_format_RR_RR(s390_irgen_BCTR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
11002 goto ok;
11003 case 0x07: s390_format_RR(s390_irgen_BCR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
11004 goto ok;
11005 case 0x0a: s390_format_I(s390_irgen_SVC, ovl.fmt.I.i); goto ok;
11006 case 0x0b: /* BSM */ goto unimplemented;
11007 case 0x0c: /* BASSM */ goto unimplemented;
11008 case 0x0d: s390_format_RR_RR(s390_irgen_BASR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
11009 goto ok;
florianb0c9a132011-09-08 15:37:39 +000011010 case 0x0e: s390_format_RR(s390_irgen_MVCL, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
11011 goto ok;
11012 case 0x0f: s390_format_RR(s390_irgen_CLCL, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
11013 goto ok;
sewardj2019a972011-03-07 16:04:07 +000011014 case 0x10: s390_format_RR_RR(s390_irgen_LPR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
11015 goto ok;
11016 case 0x11: s390_format_RR_RR(s390_irgen_LNR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
11017 goto ok;
11018 case 0x12: s390_format_RR_RR(s390_irgen_LTR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
11019 goto ok;
11020 case 0x13: s390_format_RR_RR(s390_irgen_LCR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
11021 goto ok;
11022 case 0x14: s390_format_RR_RR(s390_irgen_NR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
11023 goto ok;
11024 case 0x15: s390_format_RR_RR(s390_irgen_CLR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
11025 goto ok;
11026 case 0x16: s390_format_RR_RR(s390_irgen_OR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
11027 goto ok;
11028 case 0x17: s390_format_RR_RR(s390_irgen_XR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
11029 goto ok;
11030 case 0x18: s390_format_RR_RR(s390_irgen_LR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
11031 goto ok;
11032 case 0x19: s390_format_RR_RR(s390_irgen_CR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
11033 goto ok;
11034 case 0x1a: s390_format_RR_RR(s390_irgen_AR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
11035 goto ok;
11036 case 0x1b: s390_format_RR_RR(s390_irgen_SR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
11037 goto ok;
11038 case 0x1c: s390_format_RR_RR(s390_irgen_MR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
11039 goto ok;
11040 case 0x1d: s390_format_RR_RR(s390_irgen_DR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
11041 goto ok;
11042 case 0x1e: s390_format_RR_RR(s390_irgen_ALR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
11043 goto ok;
11044 case 0x1f: s390_format_RR_RR(s390_irgen_SLR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
11045 goto ok;
11046 case 0x20: /* LPDR */ goto unimplemented;
11047 case 0x21: /* LNDR */ goto unimplemented;
11048 case 0x22: /* LTDR */ goto unimplemented;
11049 case 0x23: /* LCDR */ goto unimplemented;
11050 case 0x24: /* HDR */ goto unimplemented;
11051 case 0x25: /* LDXR */ goto unimplemented;
11052 case 0x26: /* MXR */ goto unimplemented;
11053 case 0x27: /* MXDR */ goto unimplemented;
11054 case 0x28: s390_format_RR_FF(s390_irgen_LDR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
11055 goto ok;
11056 case 0x29: /* CDR */ goto unimplemented;
11057 case 0x2a: /* ADR */ goto unimplemented;
11058 case 0x2b: /* SDR */ goto unimplemented;
11059 case 0x2c: /* MDR */ goto unimplemented;
11060 case 0x2d: /* DDR */ goto unimplemented;
11061 case 0x2e: /* AWR */ goto unimplemented;
11062 case 0x2f: /* SWR */ goto unimplemented;
11063 case 0x30: /* LPER */ goto unimplemented;
11064 case 0x31: /* LNER */ goto unimplemented;
11065 case 0x32: /* LTER */ goto unimplemented;
11066 case 0x33: /* LCER */ goto unimplemented;
11067 case 0x34: /* HER */ goto unimplemented;
11068 case 0x35: /* LEDR */ goto unimplemented;
11069 case 0x36: /* AXR */ goto unimplemented;
11070 case 0x37: /* SXR */ goto unimplemented;
11071 case 0x38: s390_format_RR_FF(s390_irgen_LER, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
11072 goto ok;
11073 case 0x39: /* CER */ goto unimplemented;
11074 case 0x3a: /* AER */ goto unimplemented;
11075 case 0x3b: /* SER */ goto unimplemented;
11076 case 0x3c: /* MDER */ goto unimplemented;
11077 case 0x3d: /* DER */ goto unimplemented;
11078 case 0x3e: /* AUR */ goto unimplemented;
11079 case 0x3f: /* SUR */ goto unimplemented;
11080 }
11081
11082 return S390_DECODE_UNKNOWN_INSN;
11083
11084ok:
11085 return S390_DECODE_OK;
11086
11087unimplemented:
11088 return S390_DECODE_UNIMPLEMENTED_INSN;
11089}
11090
11091static s390_decode_t
11092s390_decode_4byte_and_irgen(UChar *bytes)
11093{
11094 typedef union {
11095 struct {
11096 unsigned int op1 : 8;
11097 unsigned int r1 : 4;
11098 unsigned int op2 : 4;
11099 unsigned int i2 : 16;
11100 } RI;
11101 struct {
11102 unsigned int op : 16;
11103 unsigned int : 8;
11104 unsigned int r1 : 4;
11105 unsigned int r2 : 4;
11106 } RRE;
11107 struct {
11108 unsigned int op : 16;
11109 unsigned int r1 : 4;
11110 unsigned int : 4;
11111 unsigned int r3 : 4;
11112 unsigned int r2 : 4;
11113 } RRF;
11114 struct {
11115 unsigned int op : 16;
11116 unsigned int r3 : 4;
11117 unsigned int m4 : 4;
11118 unsigned int r1 : 4;
11119 unsigned int r2 : 4;
11120 } RRF2;
11121 struct {
11122 unsigned int op : 16;
11123 unsigned int r3 : 4;
11124 unsigned int : 4;
11125 unsigned int r1 : 4;
11126 unsigned int r2 : 4;
11127 } RRF3;
11128 struct {
11129 unsigned int op : 16;
11130 unsigned int r3 : 4;
11131 unsigned int : 4;
11132 unsigned int r1 : 4;
11133 unsigned int r2 : 4;
11134 } RRR;
11135 struct {
11136 unsigned int op : 16;
11137 unsigned int r3 : 4;
11138 unsigned int : 4;
11139 unsigned int r1 : 4;
11140 unsigned int r2 : 4;
11141 } RRF4;
11142 struct {
11143 unsigned int op : 8;
11144 unsigned int r1 : 4;
11145 unsigned int r3 : 4;
11146 unsigned int b2 : 4;
11147 unsigned int d2 : 12;
11148 } RS;
11149 struct {
11150 unsigned int op : 8;
11151 unsigned int r1 : 4;
11152 unsigned int r3 : 4;
11153 unsigned int i2 : 16;
11154 } RSI;
11155 struct {
11156 unsigned int op : 8;
11157 unsigned int r1 : 4;
11158 unsigned int x2 : 4;
11159 unsigned int b2 : 4;
11160 unsigned int d2 : 12;
11161 } RX;
11162 struct {
11163 unsigned int op : 16;
11164 unsigned int b2 : 4;
11165 unsigned int d2 : 12;
11166 } S;
11167 struct {
11168 unsigned int op : 8;
11169 unsigned int i2 : 8;
11170 unsigned int b1 : 4;
11171 unsigned int d1 : 12;
11172 } SI;
11173 } formats;
11174 union {
11175 formats fmt;
11176 UInt value;
11177 } ovl;
11178
11179 vassert(sizeof(formats) == 4);
11180
11181 ((char *)(&ovl.value))[0] = bytes[0];
11182 ((char *)(&ovl.value))[1] = bytes[1];
11183 ((char *)(&ovl.value))[2] = bytes[2];
11184 ((char *)(&ovl.value))[3] = bytes[3];
11185
11186 switch ((ovl.value & 0xff0f0000) >> 16) {
11187 case 0xa500: s390_format_RI_RU(s390_irgen_IIHH, ovl.fmt.RI.r1,
11188 ovl.fmt.RI.i2); goto ok;
11189 case 0xa501: s390_format_RI_RU(s390_irgen_IIHL, ovl.fmt.RI.r1,
11190 ovl.fmt.RI.i2); goto ok;
11191 case 0xa502: s390_format_RI_RU(s390_irgen_IILH, ovl.fmt.RI.r1,
11192 ovl.fmt.RI.i2); goto ok;
11193 case 0xa503: s390_format_RI_RU(s390_irgen_IILL, ovl.fmt.RI.r1,
11194 ovl.fmt.RI.i2); goto ok;
11195 case 0xa504: s390_format_RI_RU(s390_irgen_NIHH, ovl.fmt.RI.r1,
11196 ovl.fmt.RI.i2); goto ok;
11197 case 0xa505: s390_format_RI_RU(s390_irgen_NIHL, ovl.fmt.RI.r1,
11198 ovl.fmt.RI.i2); goto ok;
11199 case 0xa506: s390_format_RI_RU(s390_irgen_NILH, ovl.fmt.RI.r1,
11200 ovl.fmt.RI.i2); goto ok;
11201 case 0xa507: s390_format_RI_RU(s390_irgen_NILL, ovl.fmt.RI.r1,
11202 ovl.fmt.RI.i2); goto ok;
11203 case 0xa508: s390_format_RI_RU(s390_irgen_OIHH, ovl.fmt.RI.r1,
11204 ovl.fmt.RI.i2); goto ok;
11205 case 0xa509: s390_format_RI_RU(s390_irgen_OIHL, ovl.fmt.RI.r1,
11206 ovl.fmt.RI.i2); goto ok;
11207 case 0xa50a: s390_format_RI_RU(s390_irgen_OILH, ovl.fmt.RI.r1,
11208 ovl.fmt.RI.i2); goto ok;
11209 case 0xa50b: s390_format_RI_RU(s390_irgen_OILL, ovl.fmt.RI.r1,
11210 ovl.fmt.RI.i2); goto ok;
11211 case 0xa50c: s390_format_RI_RU(s390_irgen_LLIHH, ovl.fmt.RI.r1,
11212 ovl.fmt.RI.i2); goto ok;
11213 case 0xa50d: s390_format_RI_RU(s390_irgen_LLIHL, ovl.fmt.RI.r1,
11214 ovl.fmt.RI.i2); goto ok;
11215 case 0xa50e: s390_format_RI_RU(s390_irgen_LLILH, ovl.fmt.RI.r1,
11216 ovl.fmt.RI.i2); goto ok;
11217 case 0xa50f: s390_format_RI_RU(s390_irgen_LLILL, ovl.fmt.RI.r1,
11218 ovl.fmt.RI.i2); goto ok;
11219 case 0xa700: s390_format_RI_RU(s390_irgen_TMLH, ovl.fmt.RI.r1,
11220 ovl.fmt.RI.i2); goto ok;
11221 case 0xa701: s390_format_RI_RU(s390_irgen_TMLL, ovl.fmt.RI.r1,
11222 ovl.fmt.RI.i2); goto ok;
11223 case 0xa702: s390_format_RI_RU(s390_irgen_TMHH, ovl.fmt.RI.r1,
11224 ovl.fmt.RI.i2); goto ok;
11225 case 0xa703: s390_format_RI_RU(s390_irgen_TMHL, ovl.fmt.RI.r1,
11226 ovl.fmt.RI.i2); goto ok;
11227 case 0xa704: s390_format_RI(s390_irgen_BRC, ovl.fmt.RI.r1, ovl.fmt.RI.i2);
11228 goto ok;
11229 case 0xa705: s390_format_RI_RP(s390_irgen_BRAS, ovl.fmt.RI.r1,
11230 ovl.fmt.RI.i2); goto ok;
11231 case 0xa706: s390_format_RI_RP(s390_irgen_BRCT, ovl.fmt.RI.r1,
11232 ovl.fmt.RI.i2); goto ok;
11233 case 0xa707: s390_format_RI_RP(s390_irgen_BRCTG, ovl.fmt.RI.r1,
11234 ovl.fmt.RI.i2); goto ok;
11235 case 0xa708: s390_format_RI_RI(s390_irgen_LHI, ovl.fmt.RI.r1, ovl.fmt.RI.i2);
11236 goto ok;
11237 case 0xa709: s390_format_RI_RI(s390_irgen_LGHI, ovl.fmt.RI.r1,
11238 ovl.fmt.RI.i2); goto ok;
11239 case 0xa70a: s390_format_RI_RI(s390_irgen_AHI, ovl.fmt.RI.r1, ovl.fmt.RI.i2);
11240 goto ok;
11241 case 0xa70b: s390_format_RI_RI(s390_irgen_AGHI, ovl.fmt.RI.r1,
11242 ovl.fmt.RI.i2); goto ok;
11243 case 0xa70c: s390_format_RI_RI(s390_irgen_MHI, ovl.fmt.RI.r1, ovl.fmt.RI.i2);
11244 goto ok;
11245 case 0xa70d: s390_format_RI_RI(s390_irgen_MGHI, ovl.fmt.RI.r1,
11246 ovl.fmt.RI.i2); goto ok;
11247 case 0xa70e: s390_format_RI_RI(s390_irgen_CHI, ovl.fmt.RI.r1, ovl.fmt.RI.i2);
11248 goto ok;
11249 case 0xa70f: s390_format_RI_RI(s390_irgen_CGHI, ovl.fmt.RI.r1,
11250 ovl.fmt.RI.i2); goto ok;
11251 }
11252
11253 switch ((ovl.value & 0xffff0000) >> 16) {
11254 case 0x8000: /* SSM */ goto unimplemented;
11255 case 0x8200: /* LPSW */ goto unimplemented;
11256 case 0x9300: s390_format_S_RD(s390_irgen_TS, ovl.fmt.S.b2, ovl.fmt.S.d2);
11257 goto ok;
11258 case 0xb202: /* STIDP */ goto unimplemented;
11259 case 0xb204: /* SCK */ goto unimplemented;
sewardj1e5fea62011-05-17 16:18:36 +000011260 case 0xb205: s390_format_S_RD(s390_irgen_STCK, ovl.fmt.S.b2, ovl.fmt.S.d2);goto ok;
sewardj2019a972011-03-07 16:04:07 +000011261 case 0xb206: /* SCKC */ goto unimplemented;
11262 case 0xb207: /* STCKC */ goto unimplemented;
11263 case 0xb208: /* SPT */ goto unimplemented;
11264 case 0xb209: /* STPT */ goto unimplemented;
11265 case 0xb20a: /* SPKA */ goto unimplemented;
11266 case 0xb20b: /* IPK */ goto unimplemented;
11267 case 0xb20d: /* PTLB */ goto unimplemented;
11268 case 0xb210: /* SPX */ goto unimplemented;
11269 case 0xb211: /* STPX */ goto unimplemented;
11270 case 0xb212: /* STAP */ goto unimplemented;
11271 case 0xb214: /* SIE */ goto unimplemented;
11272 case 0xb218: /* PC */ goto unimplemented;
11273 case 0xb219: /* SAC */ goto unimplemented;
11274 case 0xb21a: /* CFC */ goto unimplemented;
11275 case 0xb221: /* IPTE */ goto unimplemented;
11276 case 0xb222: s390_format_RRE_R0(s390_irgen_IPM, ovl.fmt.RRE.r1); goto ok;
11277 case 0xb223: /* IVSK */ goto unimplemented;
11278 case 0xb224: /* IAC */ goto unimplemented;
11279 case 0xb225: /* SSAR */ goto unimplemented;
11280 case 0xb226: /* EPAR */ goto unimplemented;
11281 case 0xb227: /* ESAR */ goto unimplemented;
11282 case 0xb228: /* PT */ goto unimplemented;
11283 case 0xb229: /* ISKE */ goto unimplemented;
11284 case 0xb22a: /* RRBE */ goto unimplemented;
11285 case 0xb22b: /* SSKE */ goto unimplemented;
11286 case 0xb22c: /* TB */ goto unimplemented;
11287 case 0xb22d: /* DXR */ goto unimplemented;
11288 case 0xb22e: /* PGIN */ goto unimplemented;
11289 case 0xb22f: /* PGOUT */ goto unimplemented;
11290 case 0xb230: /* CSCH */ goto unimplemented;
11291 case 0xb231: /* HSCH */ goto unimplemented;
11292 case 0xb232: /* MSCH */ goto unimplemented;
11293 case 0xb233: /* SSCH */ goto unimplemented;
11294 case 0xb234: /* STSCH */ goto unimplemented;
11295 case 0xb235: /* TSCH */ goto unimplemented;
11296 case 0xb236: /* TPI */ goto unimplemented;
11297 case 0xb237: /* SAL */ goto unimplemented;
11298 case 0xb238: /* RSCH */ goto unimplemented;
11299 case 0xb239: /* STCRW */ goto unimplemented;
11300 case 0xb23a: /* STCPS */ goto unimplemented;
11301 case 0xb23b: /* RCHP */ goto unimplemented;
11302 case 0xb23c: /* SCHM */ goto unimplemented;
11303 case 0xb240: /* BAKR */ goto unimplemented;
floriana4384a32011-08-11 16:58:45 +000011304 case 0xb241: s390_format_RRE(s390_irgen_CKSM, ovl.fmt.RRE.r1,
11305 ovl.fmt.RRE.r2); goto ok;
sewardj2019a972011-03-07 16:04:07 +000011306 case 0xb244: /* SQDR */ goto unimplemented;
11307 case 0xb245: /* SQER */ goto unimplemented;
11308 case 0xb246: /* STURA */ goto unimplemented;
11309 case 0xb247: /* MSTA */ goto unimplemented;
11310 case 0xb248: /* PALB */ goto unimplemented;
11311 case 0xb249: /* EREG */ goto unimplemented;
11312 case 0xb24a: /* ESTA */ goto unimplemented;
11313 case 0xb24b: /* LURA */ goto unimplemented;
11314 case 0xb24c: /* TAR */ goto unimplemented;
11315 case 0xb24d: s390_format_RRE(s390_irgen_CPYA, ovl.fmt.RRE.r1,
11316 ovl.fmt.RRE.r2); goto ok;
11317 case 0xb24e: s390_format_RRE(s390_irgen_SAR, ovl.fmt.RRE.r1, ovl.fmt.RRE.r2);
11318 goto ok;
11319 case 0xb24f: s390_format_RRE(s390_irgen_EAR, ovl.fmt.RRE.r1, ovl.fmt.RRE.r2);
11320 goto ok;
11321 case 0xb250: /* CSP */ goto unimplemented;
11322 case 0xb252: s390_format_RRE_RR(s390_irgen_MSR, ovl.fmt.RRE.r1,
11323 ovl.fmt.RRE.r2); goto ok;
11324 case 0xb254: /* MVPG */ goto unimplemented;
11325 case 0xb255: s390_format_RRE_RR(s390_irgen_MVST, ovl.fmt.RRE.r1,
11326 ovl.fmt.RRE.r2); goto ok;
11327 case 0xb257: /* CUSE */ goto unimplemented;
11328 case 0xb258: /* BSG */ goto unimplemented;
11329 case 0xb25a: /* BSA */ goto unimplemented;
11330 case 0xb25d: s390_format_RRE_RR(s390_irgen_CLST, ovl.fmt.RRE.r1,
11331 ovl.fmt.RRE.r2); goto ok;
11332 case 0xb25e: s390_format_RRE_RR(s390_irgen_SRST, ovl.fmt.RRE.r1,
11333 ovl.fmt.RRE.r2); goto ok;
11334 case 0xb263: /* CMPSC */ goto unimplemented;
11335 case 0xb274: /* SIGA */ goto unimplemented;
11336 case 0xb276: /* XSCH */ goto unimplemented;
11337 case 0xb277: /* RP */ goto unimplemented;
sewardj1e5fea62011-05-17 16:18:36 +000011338 case 0xb278: s390_format_S_RD(s390_irgen_STCKE, ovl.fmt.S.b2, ovl.fmt.S.d2);goto ok;
sewardj2019a972011-03-07 16:04:07 +000011339 case 0xb279: /* SACF */ goto unimplemented;
sewardj1e5fea62011-05-17 16:18:36 +000011340 case 0xb27c: s390_format_S_RD(s390_irgen_STCKF, ovl.fmt.S.b2, ovl.fmt.S.d2);goto ok;
sewardj2019a972011-03-07 16:04:07 +000011341 case 0xb27d: /* STSI */ goto unimplemented;
11342 case 0xb299: s390_format_S_RD(s390_irgen_SRNM, ovl.fmt.S.b2, ovl.fmt.S.d2);
11343 goto ok;
11344 case 0xb29c: s390_format_S_RD(s390_irgen_STFPC, ovl.fmt.S.b2, ovl.fmt.S.d2);
11345 goto ok;
11346 case 0xb29d: s390_format_S_RD(s390_irgen_LFPC, ovl.fmt.S.b2, ovl.fmt.S.d2);
11347 goto ok;
11348 case 0xb2a5: /* TRE */ goto unimplemented;
11349 case 0xb2a6: /* CU21 */ goto unimplemented;
11350 case 0xb2a7: /* CU12 */ goto unimplemented;
florian933065d2011-07-11 01:48:02 +000011351 case 0xb2b0: s390_format_S_RD(s390_irgen_STFLE, ovl.fmt.S.b2, ovl.fmt.S.d2);
11352 goto ok;
sewardj2019a972011-03-07 16:04:07 +000011353 case 0xb2b1: /* STFL */ goto unimplemented;
11354 case 0xb2b2: /* LPSWE */ goto unimplemented;
11355 case 0xb2b8: /* SRNMB */ goto unimplemented;
11356 case 0xb2b9: /* SRNMT */ goto unimplemented;
11357 case 0xb2bd: /* LFAS */ goto unimplemented;
11358 case 0xb2ff: /* TRAP4 */ goto unimplemented;
11359 case 0xb300: s390_format_RRE_FF(s390_irgen_LPEBR, ovl.fmt.RRE.r1,
11360 ovl.fmt.RRE.r2); goto ok;
11361 case 0xb301: s390_format_RRE_FF(s390_irgen_LNEBR, ovl.fmt.RRE.r1,
11362 ovl.fmt.RRE.r2); goto ok;
11363 case 0xb302: s390_format_RRE_FF(s390_irgen_LTEBR, ovl.fmt.RRE.r1,
11364 ovl.fmt.RRE.r2); goto ok;
11365 case 0xb303: s390_format_RRE_FF(s390_irgen_LCEBR, ovl.fmt.RRE.r1,
11366 ovl.fmt.RRE.r2); goto ok;
11367 case 0xb304: s390_format_RRE_FF(s390_irgen_LDEBR, ovl.fmt.RRE.r1,
11368 ovl.fmt.RRE.r2); goto ok;
11369 case 0xb305: s390_format_RRE_FF(s390_irgen_LXDBR, ovl.fmt.RRE.r1,
11370 ovl.fmt.RRE.r2); goto ok;
11371 case 0xb306: s390_format_RRE_FF(s390_irgen_LXEBR, ovl.fmt.RRE.r1,
11372 ovl.fmt.RRE.r2); goto ok;
11373 case 0xb307: /* MXDBR */ goto unimplemented;
11374 case 0xb308: /* KEBR */ goto unimplemented;
11375 case 0xb309: s390_format_RRE_FF(s390_irgen_CEBR, ovl.fmt.RRE.r1,
11376 ovl.fmt.RRE.r2); goto ok;
11377 case 0xb30a: s390_format_RRE_FF(s390_irgen_AEBR, ovl.fmt.RRE.r1,
11378 ovl.fmt.RRE.r2); goto ok;
11379 case 0xb30b: s390_format_RRE_FF(s390_irgen_SEBR, ovl.fmt.RRE.r1,
11380 ovl.fmt.RRE.r2); goto ok;
11381 case 0xb30c: /* MDEBR */ goto unimplemented;
11382 case 0xb30d: s390_format_RRE_FF(s390_irgen_DEBR, ovl.fmt.RRE.r1,
11383 ovl.fmt.RRE.r2); goto ok;
11384 case 0xb30e: s390_format_RRF_F0FF(s390_irgen_MAEBR, ovl.fmt.RRF.r1,
11385 ovl.fmt.RRF.r3, ovl.fmt.RRF.r2); goto ok;
11386 case 0xb30f: s390_format_RRF_F0FF(s390_irgen_MSEBR, ovl.fmt.RRF.r1,
11387 ovl.fmt.RRF.r3, ovl.fmt.RRF.r2); goto ok;
11388 case 0xb310: s390_format_RRE_FF(s390_irgen_LPDBR, ovl.fmt.RRE.r1,
11389 ovl.fmt.RRE.r2); goto ok;
11390 case 0xb311: s390_format_RRE_FF(s390_irgen_LNDBR, ovl.fmt.RRE.r1,
11391 ovl.fmt.RRE.r2); goto ok;
11392 case 0xb312: s390_format_RRE_FF(s390_irgen_LTDBR, ovl.fmt.RRE.r1,
11393 ovl.fmt.RRE.r2); goto ok;
11394 case 0xb313: s390_format_RRE_FF(s390_irgen_LCDBR, ovl.fmt.RRE.r1,
11395 ovl.fmt.RRE.r2); goto ok;
11396 case 0xb314: s390_format_RRE_FF(s390_irgen_SQEBR, ovl.fmt.RRE.r1,
11397 ovl.fmt.RRE.r2); goto ok;
11398 case 0xb315: s390_format_RRE_FF(s390_irgen_SQDBR, ovl.fmt.RRE.r1,
11399 ovl.fmt.RRE.r2); goto ok;
11400 case 0xb316: s390_format_RRE_FF(s390_irgen_SQXBR, ovl.fmt.RRE.r1,
11401 ovl.fmt.RRE.r2); goto ok;
11402 case 0xb317: s390_format_RRE_FF(s390_irgen_MEEBR, ovl.fmt.RRE.r1,
11403 ovl.fmt.RRE.r2); goto ok;
11404 case 0xb318: /* KDBR */ goto unimplemented;
11405 case 0xb319: s390_format_RRE_FF(s390_irgen_CDBR, ovl.fmt.RRE.r1,
11406 ovl.fmt.RRE.r2); goto ok;
11407 case 0xb31a: s390_format_RRE_FF(s390_irgen_ADBR, ovl.fmt.RRE.r1,
11408 ovl.fmt.RRE.r2); goto ok;
11409 case 0xb31b: s390_format_RRE_FF(s390_irgen_SDBR, ovl.fmt.RRE.r1,
11410 ovl.fmt.RRE.r2); goto ok;
11411 case 0xb31c: s390_format_RRE_FF(s390_irgen_MDBR, ovl.fmt.RRE.r1,
11412 ovl.fmt.RRE.r2); goto ok;
11413 case 0xb31d: s390_format_RRE_FF(s390_irgen_DDBR, ovl.fmt.RRE.r1,
11414 ovl.fmt.RRE.r2); goto ok;
11415 case 0xb31e: s390_format_RRF_F0FF(s390_irgen_MADBR, ovl.fmt.RRF.r1,
11416 ovl.fmt.RRF.r3, ovl.fmt.RRF.r2); goto ok;
11417 case 0xb31f: s390_format_RRF_F0FF(s390_irgen_MSDBR, ovl.fmt.RRF.r1,
11418 ovl.fmt.RRF.r3, ovl.fmt.RRF.r2); goto ok;
11419 case 0xb324: /* LDER */ goto unimplemented;
11420 case 0xb325: /* LXDR */ goto unimplemented;
11421 case 0xb326: /* LXER */ goto unimplemented;
11422 case 0xb32e: /* MAER */ goto unimplemented;
11423 case 0xb32f: /* MSER */ goto unimplemented;
11424 case 0xb336: /* SQXR */ goto unimplemented;
11425 case 0xb337: /* MEER */ goto unimplemented;
11426 case 0xb338: /* MAYLR */ goto unimplemented;
11427 case 0xb339: /* MYLR */ goto unimplemented;
11428 case 0xb33a: /* MAYR */ goto unimplemented;
11429 case 0xb33b: /* MYR */ goto unimplemented;
11430 case 0xb33c: /* MAYHR */ goto unimplemented;
11431 case 0xb33d: /* MYHR */ goto unimplemented;
11432 case 0xb33e: /* MADR */ goto unimplemented;
11433 case 0xb33f: /* MSDR */ goto unimplemented;
11434 case 0xb340: s390_format_RRE_FF(s390_irgen_LPXBR, ovl.fmt.RRE.r1,
11435 ovl.fmt.RRE.r2); goto ok;
11436 case 0xb341: s390_format_RRE_FF(s390_irgen_LNXBR, ovl.fmt.RRE.r1,
11437 ovl.fmt.RRE.r2); goto ok;
11438 case 0xb342: s390_format_RRE_FF(s390_irgen_LTXBR, ovl.fmt.RRE.r1,
11439 ovl.fmt.RRE.r2); goto ok;
11440 case 0xb343: s390_format_RRE_FF(s390_irgen_LCXBR, ovl.fmt.RRE.r1,
11441 ovl.fmt.RRE.r2); goto ok;
11442 case 0xb344: s390_format_RRE_FF(s390_irgen_LEDBR, ovl.fmt.RRE.r1,
11443 ovl.fmt.RRE.r2); goto ok;
11444 case 0xb345: s390_format_RRE_FF(s390_irgen_LDXBR, ovl.fmt.RRE.r1,
11445 ovl.fmt.RRE.r2); goto ok;
11446 case 0xb346: s390_format_RRE_FF(s390_irgen_LEXBR, ovl.fmt.RRE.r1,
11447 ovl.fmt.RRE.r2); goto ok;
11448 case 0xb347: /* FIXBR */ goto unimplemented;
11449 case 0xb348: /* KXBR */ goto unimplemented;
11450 case 0xb349: s390_format_RRE_FF(s390_irgen_CXBR, ovl.fmt.RRE.r1,
11451 ovl.fmt.RRE.r2); goto ok;
11452 case 0xb34a: s390_format_RRE_FF(s390_irgen_AXBR, ovl.fmt.RRE.r1,
11453 ovl.fmt.RRE.r2); goto ok;
11454 case 0xb34b: s390_format_RRE_FF(s390_irgen_SXBR, ovl.fmt.RRE.r1,
11455 ovl.fmt.RRE.r2); goto ok;
11456 case 0xb34c: s390_format_RRE_FF(s390_irgen_MXBR, ovl.fmt.RRE.r1,
11457 ovl.fmt.RRE.r2); goto ok;
11458 case 0xb34d: s390_format_RRE_FF(s390_irgen_DXBR, ovl.fmt.RRE.r1,
11459 ovl.fmt.RRE.r2); goto ok;
11460 case 0xb350: /* TBEDR */ goto unimplemented;
11461 case 0xb351: /* TBDR */ goto unimplemented;
11462 case 0xb353: /* DIEBR */ goto unimplemented;
11463 case 0xb357: /* FIEBR */ goto unimplemented;
11464 case 0xb358: /* THDER */ goto unimplemented;
11465 case 0xb359: /* THDR */ goto unimplemented;
11466 case 0xb35b: /* DIDBR */ goto unimplemented;
11467 case 0xb35f: /* FIDBR */ goto unimplemented;
11468 case 0xb360: /* LPXR */ goto unimplemented;
11469 case 0xb361: /* LNXR */ goto unimplemented;
11470 case 0xb362: /* LTXR */ goto unimplemented;
11471 case 0xb363: /* LCXR */ goto unimplemented;
11472 case 0xb365: s390_format_RRE_FF(s390_irgen_LXR, ovl.fmt.RRE.r1,
11473 ovl.fmt.RRE.r2); goto ok;
11474 case 0xb366: /* LEXR */ goto unimplemented;
11475 case 0xb367: /* FIXR */ goto unimplemented;
11476 case 0xb369: /* CXR */ goto unimplemented;
11477 case 0xb370: s390_format_RRE_FF(s390_irgen_LPDFR, ovl.fmt.RRE.r1,
11478 ovl.fmt.RRE.r2); goto ok;
11479 case 0xb371: s390_format_RRE_FF(s390_irgen_LNDFR, ovl.fmt.RRE.r1,
11480 ovl.fmt.RRE.r2); goto ok;
11481 case 0xb372: s390_format_RRF_F0FF2(s390_irgen_CPSDR, ovl.fmt.RRF3.r3,
11482 ovl.fmt.RRF3.r1, ovl.fmt.RRF3.r2);
11483 goto ok;
11484 case 0xb373: s390_format_RRE_FF(s390_irgen_LCDFR, ovl.fmt.RRE.r1,
11485 ovl.fmt.RRE.r2); goto ok;
11486 case 0xb374: s390_format_RRE_F0(s390_irgen_LZER, ovl.fmt.RRE.r1); goto ok;
11487 case 0xb375: s390_format_RRE_F0(s390_irgen_LZDR, ovl.fmt.RRE.r1); goto ok;
11488 case 0xb376: s390_format_RRE_F0(s390_irgen_LZXR, ovl.fmt.RRE.r1); goto ok;
11489 case 0xb377: /* FIER */ goto unimplemented;
11490 case 0xb37f: /* FIDR */ goto unimplemented;
11491 case 0xb384: s390_format_RRE_R0(s390_irgen_SFPC, ovl.fmt.RRE.r1); goto ok;
11492 case 0xb385: /* SFASR */ goto unimplemented;
11493 case 0xb38c: s390_format_RRE_R0(s390_irgen_EFPC, ovl.fmt.RRE.r1); goto ok;
11494 case 0xb390: /* CELFBR */ goto unimplemented;
11495 case 0xb391: /* CDLFBR */ goto unimplemented;
11496 case 0xb392: /* CXLFBR */ goto unimplemented;
11497 case 0xb394: s390_format_RRE_FR(s390_irgen_CEFBR, ovl.fmt.RRE.r1,
11498 ovl.fmt.RRE.r2); goto ok;
11499 case 0xb395: s390_format_RRE_FR(s390_irgen_CDFBR, ovl.fmt.RRE.r1,
11500 ovl.fmt.RRE.r2); goto ok;
11501 case 0xb396: s390_format_RRE_FR(s390_irgen_CXFBR, ovl.fmt.RRE.r1,
11502 ovl.fmt.RRE.r2); goto ok;
11503 case 0xb398: s390_format_RRF_U0RF(s390_irgen_CFEBR, ovl.fmt.RRF3.r3,
11504 ovl.fmt.RRF3.r1, ovl.fmt.RRF3.r2);
11505 goto ok;
11506 case 0xb399: s390_format_RRF_U0RF(s390_irgen_CFDBR, ovl.fmt.RRF3.r3,
11507 ovl.fmt.RRF3.r1, ovl.fmt.RRF3.r2);
11508 goto ok;
11509 case 0xb39a: s390_format_RRF_U0RF(s390_irgen_CFXBR, ovl.fmt.RRF3.r3,
11510 ovl.fmt.RRF3.r1, ovl.fmt.RRF3.r2);
11511 goto ok;
11512 case 0xb3a0: /* CELGBR */ goto unimplemented;
11513 case 0xb3a1: /* CDLGBR */ goto unimplemented;
11514 case 0xb3a2: /* CXLGBR */ goto unimplemented;
11515 case 0xb3a4: s390_format_RRE_FR(s390_irgen_CEGBR, ovl.fmt.RRE.r1,
11516 ovl.fmt.RRE.r2); goto ok;
11517 case 0xb3a5: s390_format_RRE_FR(s390_irgen_CDGBR, ovl.fmt.RRE.r1,
11518 ovl.fmt.RRE.r2); goto ok;
11519 case 0xb3a6: s390_format_RRE_FR(s390_irgen_CXGBR, ovl.fmt.RRE.r1,
11520 ovl.fmt.RRE.r2); goto ok;
11521 case 0xb3a8: s390_format_RRF_U0RF(s390_irgen_CGEBR, ovl.fmt.RRF3.r3,
11522 ovl.fmt.RRF3.r1, ovl.fmt.RRF3.r2);
11523 goto ok;
11524 case 0xb3a9: s390_format_RRF_U0RF(s390_irgen_CGDBR, ovl.fmt.RRF3.r3,
11525 ovl.fmt.RRF3.r1, ovl.fmt.RRF3.r2);
11526 goto ok;
11527 case 0xb3aa: s390_format_RRF_U0RF(s390_irgen_CGXBR, ovl.fmt.RRF3.r3,
11528 ovl.fmt.RRF3.r1, ovl.fmt.RRF3.r2);
11529 goto ok;
11530 case 0xb3b4: /* CEFR */ goto unimplemented;
11531 case 0xb3b5: /* CDFR */ goto unimplemented;
11532 case 0xb3b6: /* CXFR */ goto unimplemented;
11533 case 0xb3b8: /* CFER */ goto unimplemented;
11534 case 0xb3b9: /* CFDR */ goto unimplemented;
11535 case 0xb3ba: /* CFXR */ goto unimplemented;
11536 case 0xb3c1: s390_format_RRE_FR(s390_irgen_LDGR, ovl.fmt.RRE.r1,
11537 ovl.fmt.RRE.r2); goto ok;
11538 case 0xb3c4: /* CEGR */ goto unimplemented;
11539 case 0xb3c5: /* CDGR */ goto unimplemented;
11540 case 0xb3c6: /* CXGR */ goto unimplemented;
11541 case 0xb3c8: /* CGER */ goto unimplemented;
11542 case 0xb3c9: /* CGDR */ goto unimplemented;
11543 case 0xb3ca: /* CGXR */ goto unimplemented;
11544 case 0xb3cd: s390_format_RRE_RF(s390_irgen_LGDR, ovl.fmt.RRE.r1,
11545 ovl.fmt.RRE.r2); goto ok;
11546 case 0xb3d0: /* MDTR */ goto unimplemented;
11547 case 0xb3d1: /* DDTR */ goto unimplemented;
11548 case 0xb3d2: /* ADTR */ goto unimplemented;
11549 case 0xb3d3: /* SDTR */ goto unimplemented;
11550 case 0xb3d4: /* LDETR */ goto unimplemented;
11551 case 0xb3d5: /* LEDTR */ goto unimplemented;
11552 case 0xb3d6: /* LTDTR */ goto unimplemented;
11553 case 0xb3d7: /* FIDTR */ goto unimplemented;
11554 case 0xb3d8: /* MXTR */ goto unimplemented;
11555 case 0xb3d9: /* DXTR */ goto unimplemented;
11556 case 0xb3da: /* AXTR */ goto unimplemented;
11557 case 0xb3db: /* SXTR */ goto unimplemented;
11558 case 0xb3dc: /* LXDTR */ goto unimplemented;
11559 case 0xb3dd: /* LDXTR */ goto unimplemented;
11560 case 0xb3de: /* LTXTR */ goto unimplemented;
11561 case 0xb3df: /* FIXTR */ goto unimplemented;
11562 case 0xb3e0: /* KDTR */ goto unimplemented;
11563 case 0xb3e1: /* CGDTR */ goto unimplemented;
11564 case 0xb3e2: /* CUDTR */ goto unimplemented;
11565 case 0xb3e3: /* CSDTR */ goto unimplemented;
11566 case 0xb3e4: /* CDTR */ goto unimplemented;
11567 case 0xb3e5: /* EEDTR */ goto unimplemented;
11568 case 0xb3e7: /* ESDTR */ goto unimplemented;
11569 case 0xb3e8: /* KXTR */ goto unimplemented;
11570 case 0xb3e9: /* CGXTR */ goto unimplemented;
11571 case 0xb3ea: /* CUXTR */ goto unimplemented;
11572 case 0xb3eb: /* CSXTR */ goto unimplemented;
11573 case 0xb3ec: /* CXTR */ goto unimplemented;
11574 case 0xb3ed: /* EEXTR */ goto unimplemented;
11575 case 0xb3ef: /* ESXTR */ goto unimplemented;
11576 case 0xb3f1: /* CDGTR */ goto unimplemented;
11577 case 0xb3f2: /* CDUTR */ goto unimplemented;
11578 case 0xb3f3: /* CDSTR */ goto unimplemented;
11579 case 0xb3f4: /* CEDTR */ goto unimplemented;
11580 case 0xb3f5: /* QADTR */ goto unimplemented;
11581 case 0xb3f6: /* IEDTR */ goto unimplemented;
11582 case 0xb3f7: /* RRDTR */ goto unimplemented;
11583 case 0xb3f9: /* CXGTR */ goto unimplemented;
11584 case 0xb3fa: /* CXUTR */ goto unimplemented;
11585 case 0xb3fb: /* CXSTR */ goto unimplemented;
11586 case 0xb3fc: /* CEXTR */ goto unimplemented;
11587 case 0xb3fd: /* QAXTR */ goto unimplemented;
11588 case 0xb3fe: /* IEXTR */ goto unimplemented;
11589 case 0xb3ff: /* RRXTR */ goto unimplemented;
11590 case 0xb900: s390_format_RRE_RR(s390_irgen_LPGR, ovl.fmt.RRE.r1,
11591 ovl.fmt.RRE.r2); goto ok;
11592 case 0xb901: s390_format_RRE_RR(s390_irgen_LNGR, ovl.fmt.RRE.r1,
11593 ovl.fmt.RRE.r2); goto ok;
11594 case 0xb902: s390_format_RRE_RR(s390_irgen_LTGR, ovl.fmt.RRE.r1,
11595 ovl.fmt.RRE.r2); goto ok;
11596 case 0xb903: s390_format_RRE_RR(s390_irgen_LCGR, ovl.fmt.RRE.r1,
11597 ovl.fmt.RRE.r2); goto ok;
11598 case 0xb904: s390_format_RRE_RR(s390_irgen_LGR, ovl.fmt.RRE.r1,
11599 ovl.fmt.RRE.r2); goto ok;
11600 case 0xb905: /* LURAG */ goto unimplemented;
11601 case 0xb906: s390_format_RRE_RR(s390_irgen_LGBR, ovl.fmt.RRE.r1,
11602 ovl.fmt.RRE.r2); goto ok;
11603 case 0xb907: s390_format_RRE_RR(s390_irgen_LGHR, ovl.fmt.RRE.r1,
11604 ovl.fmt.RRE.r2); goto ok;
11605 case 0xb908: s390_format_RRE_RR(s390_irgen_AGR, ovl.fmt.RRE.r1,
11606 ovl.fmt.RRE.r2); goto ok;
11607 case 0xb909: s390_format_RRE_RR(s390_irgen_SGR, ovl.fmt.RRE.r1,
11608 ovl.fmt.RRE.r2); goto ok;
11609 case 0xb90a: s390_format_RRE_RR(s390_irgen_ALGR, ovl.fmt.RRE.r1,
11610 ovl.fmt.RRE.r2); goto ok;
11611 case 0xb90b: s390_format_RRE_RR(s390_irgen_SLGR, ovl.fmt.RRE.r1,
11612 ovl.fmt.RRE.r2); goto ok;
11613 case 0xb90c: s390_format_RRE_RR(s390_irgen_MSGR, ovl.fmt.RRE.r1,
11614 ovl.fmt.RRE.r2); goto ok;
11615 case 0xb90d: s390_format_RRE_RR(s390_irgen_DSGR, ovl.fmt.RRE.r1,
11616 ovl.fmt.RRE.r2); goto ok;
11617 case 0xb90e: /* EREGG */ goto unimplemented;
11618 case 0xb90f: s390_format_RRE_RR(s390_irgen_LRVGR, ovl.fmt.RRE.r1,
11619 ovl.fmt.RRE.r2); goto ok;
11620 case 0xb910: s390_format_RRE_RR(s390_irgen_LPGFR, ovl.fmt.RRE.r1,
11621 ovl.fmt.RRE.r2); goto ok;
11622 case 0xb911: s390_format_RRE_RR(s390_irgen_LNGFR, ovl.fmt.RRE.r1,
11623 ovl.fmt.RRE.r2); goto ok;
11624 case 0xb912: s390_format_RRE_RR(s390_irgen_LTGFR, ovl.fmt.RRE.r1,
11625 ovl.fmt.RRE.r2); goto ok;
11626 case 0xb913: s390_format_RRE_RR(s390_irgen_LCGFR, ovl.fmt.RRE.r1,
11627 ovl.fmt.RRE.r2); goto ok;
11628 case 0xb914: s390_format_RRE_RR(s390_irgen_LGFR, ovl.fmt.RRE.r1,
11629 ovl.fmt.RRE.r2); goto ok;
11630 case 0xb916: s390_format_RRE_RR(s390_irgen_LLGFR, ovl.fmt.RRE.r1,
11631 ovl.fmt.RRE.r2); goto ok;
11632 case 0xb917: s390_format_RRE_RR(s390_irgen_LLGTR, ovl.fmt.RRE.r1,
11633 ovl.fmt.RRE.r2); goto ok;
11634 case 0xb918: s390_format_RRE_RR(s390_irgen_AGFR, ovl.fmt.RRE.r1,
11635 ovl.fmt.RRE.r2); goto ok;
11636 case 0xb919: s390_format_RRE_RR(s390_irgen_SGFR, ovl.fmt.RRE.r1,
11637 ovl.fmt.RRE.r2); goto ok;
11638 case 0xb91a: s390_format_RRE_RR(s390_irgen_ALGFR, ovl.fmt.RRE.r1,
11639 ovl.fmt.RRE.r2); goto ok;
11640 case 0xb91b: s390_format_RRE_RR(s390_irgen_SLGFR, ovl.fmt.RRE.r1,
11641 ovl.fmt.RRE.r2); goto ok;
11642 case 0xb91c: s390_format_RRE_RR(s390_irgen_MSGFR, ovl.fmt.RRE.r1,
11643 ovl.fmt.RRE.r2); goto ok;
11644 case 0xb91d: s390_format_RRE_RR(s390_irgen_DSGFR, ovl.fmt.RRE.r1,
11645 ovl.fmt.RRE.r2); goto ok;
11646 case 0xb91e: /* KMAC */ goto unimplemented;
11647 case 0xb91f: s390_format_RRE_RR(s390_irgen_LRVR, ovl.fmt.RRE.r1,
11648 ovl.fmt.RRE.r2); goto ok;
11649 case 0xb920: s390_format_RRE_RR(s390_irgen_CGR, ovl.fmt.RRE.r1,
11650 ovl.fmt.RRE.r2); goto ok;
11651 case 0xb921: s390_format_RRE_RR(s390_irgen_CLGR, ovl.fmt.RRE.r1,
11652 ovl.fmt.RRE.r2); goto ok;
11653 case 0xb925: /* STURG */ goto unimplemented;
11654 case 0xb926: s390_format_RRE_RR(s390_irgen_LBR, ovl.fmt.RRE.r1,
11655 ovl.fmt.RRE.r2); goto ok;
11656 case 0xb927: s390_format_RRE_RR(s390_irgen_LHR, ovl.fmt.RRE.r1,
11657 ovl.fmt.RRE.r2); goto ok;
11658 case 0xb928: /* PCKMO */ goto unimplemented;
11659 case 0xb92b: /* KMO */ goto unimplemented;
11660 case 0xb92c: /* PCC */ goto unimplemented;
11661 case 0xb92d: /* KMCTR */ goto unimplemented;
11662 case 0xb92e: /* KM */ goto unimplemented;
11663 case 0xb92f: /* KMC */ goto unimplemented;
11664 case 0xb930: s390_format_RRE_RR(s390_irgen_CGFR, ovl.fmt.RRE.r1,
11665 ovl.fmt.RRE.r2); goto ok;
11666 case 0xb931: s390_format_RRE_RR(s390_irgen_CLGFR, ovl.fmt.RRE.r1,
11667 ovl.fmt.RRE.r2); goto ok;
11668 case 0xb93e: /* KIMD */ goto unimplemented;
11669 case 0xb93f: /* KLMD */ goto unimplemented;
11670 case 0xb941: /* CFDTR */ goto unimplemented;
11671 case 0xb942: /* CLGDTR */ goto unimplemented;
11672 case 0xb943: /* CLFDTR */ goto unimplemented;
11673 case 0xb946: s390_format_RRE_RR(s390_irgen_BCTGR, ovl.fmt.RRE.r1,
11674 ovl.fmt.RRE.r2); goto ok;
11675 case 0xb949: /* CFXTR */ goto unimplemented;
11676 case 0xb94a: /* CLGXTR */ goto unimplemented;
11677 case 0xb94b: /* CLFXTR */ goto unimplemented;
11678 case 0xb951: /* CDFTR */ goto unimplemented;
11679 case 0xb952: /* CDLGTR */ goto unimplemented;
11680 case 0xb953: /* CDLFTR */ goto unimplemented;
11681 case 0xb959: /* CXFTR */ goto unimplemented;
11682 case 0xb95a: /* CXLGTR */ goto unimplemented;
11683 case 0xb95b: /* CXLFTR */ goto unimplemented;
11684 case 0xb960: /* CGRT */ goto unimplemented;
11685 case 0xb961: /* CLGRT */ goto unimplemented;
11686 case 0xb972: /* CRT */ goto unimplemented;
11687 case 0xb973: /* CLRT */ goto unimplemented;
11688 case 0xb980: s390_format_RRE_RR(s390_irgen_NGR, ovl.fmt.RRE.r1,
11689 ovl.fmt.RRE.r2); goto ok;
11690 case 0xb981: s390_format_RRE_RR(s390_irgen_OGR, ovl.fmt.RRE.r1,
11691 ovl.fmt.RRE.r2); goto ok;
11692 case 0xb982: s390_format_RRE_RR(s390_irgen_XGR, ovl.fmt.RRE.r1,
11693 ovl.fmt.RRE.r2); goto ok;
11694 case 0xb983: s390_format_RRE_RR(s390_irgen_FLOGR, ovl.fmt.RRE.r1,
11695 ovl.fmt.RRE.r2); goto ok;
11696 case 0xb984: s390_format_RRE_RR(s390_irgen_LLGCR, ovl.fmt.RRE.r1,
11697 ovl.fmt.RRE.r2); goto ok;
11698 case 0xb985: s390_format_RRE_RR(s390_irgen_LLGHR, ovl.fmt.RRE.r1,
11699 ovl.fmt.RRE.r2); goto ok;
11700 case 0xb986: s390_format_RRE_RR(s390_irgen_MLGR, ovl.fmt.RRE.r1,
11701 ovl.fmt.RRE.r2); goto ok;
11702 case 0xb987: s390_format_RRE_RR(s390_irgen_DLGR, ovl.fmt.RRE.r1,
11703 ovl.fmt.RRE.r2); goto ok;
11704 case 0xb988: s390_format_RRE_RR(s390_irgen_ALCGR, ovl.fmt.RRE.r1,
11705 ovl.fmt.RRE.r2); goto ok;
11706 case 0xb989: s390_format_RRE_RR(s390_irgen_SLBGR, ovl.fmt.RRE.r1,
11707 ovl.fmt.RRE.r2); goto ok;
11708 case 0xb98a: /* CSPG */ goto unimplemented;
11709 case 0xb98d: /* EPSW */ goto unimplemented;
11710 case 0xb98e: /* IDTE */ goto unimplemented;
11711 case 0xb990: /* TRTT */ goto unimplemented;
11712 case 0xb991: /* TRTO */ goto unimplemented;
11713 case 0xb992: /* TROT */ goto unimplemented;
florian9af37692012-01-15 21:01:16 +000011714 case 0xb993: s390_format_RRF_M0RERE(s390_irgen_TROO, ovl.fmt.RRF3.r3,
11715 ovl.fmt.RRF3.r1, ovl.fmt.RRF3.r2); goto ok;
sewardj2019a972011-03-07 16:04:07 +000011716 case 0xb994: s390_format_RRE_RR(s390_irgen_LLCR, ovl.fmt.RRE.r1,
11717 ovl.fmt.RRE.r2); goto ok;
11718 case 0xb995: s390_format_RRE_RR(s390_irgen_LLHR, ovl.fmt.RRE.r1,
11719 ovl.fmt.RRE.r2); goto ok;
11720 case 0xb996: s390_format_RRE_RR(s390_irgen_MLR, ovl.fmt.RRE.r1,
11721 ovl.fmt.RRE.r2); goto ok;
11722 case 0xb997: s390_format_RRE_RR(s390_irgen_DLR, ovl.fmt.RRE.r1,
11723 ovl.fmt.RRE.r2); goto ok;
11724 case 0xb998: s390_format_RRE_RR(s390_irgen_ALCR, ovl.fmt.RRE.r1,
11725 ovl.fmt.RRE.r2); goto ok;
11726 case 0xb999: s390_format_RRE_RR(s390_irgen_SLBR, ovl.fmt.RRE.r1,
11727 ovl.fmt.RRE.r2); goto ok;
11728 case 0xb99a: /* EPAIR */ goto unimplemented;
11729 case 0xb99b: /* ESAIR */ goto unimplemented;
11730 case 0xb99d: /* ESEA */ goto unimplemented;
11731 case 0xb99e: /* PTI */ goto unimplemented;
11732 case 0xb99f: /* SSAIR */ goto unimplemented;
11733 case 0xb9a2: /* PTF */ goto unimplemented;
11734 case 0xb9aa: /* LPTEA */ goto unimplemented;
11735 case 0xb9ae: /* RRBM */ goto unimplemented;
11736 case 0xb9af: /* PFMF */ goto unimplemented;
11737 case 0xb9b0: /* CU14 */ goto unimplemented;
11738 case 0xb9b1: /* CU24 */ goto unimplemented;
11739 case 0xb9b2: /* CU41 */ goto unimplemented;
11740 case 0xb9b3: /* CU42 */ goto unimplemented;
11741 case 0xb9bd: /* TRTRE */ goto unimplemented;
11742 case 0xb9be: /* SRSTU */ goto unimplemented;
11743 case 0xb9bf: /* TRTE */ goto unimplemented;
11744 case 0xb9c8: s390_format_RRF_R0RR2(s390_irgen_AHHHR, ovl.fmt.RRF4.r3,
11745 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
11746 goto ok;
11747 case 0xb9c9: s390_format_RRF_R0RR2(s390_irgen_SHHHR, ovl.fmt.RRF4.r3,
11748 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
11749 goto ok;
11750 case 0xb9ca: s390_format_RRF_R0RR2(s390_irgen_ALHHHR, ovl.fmt.RRF4.r3,
11751 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
11752 goto ok;
11753 case 0xb9cb: s390_format_RRF_R0RR2(s390_irgen_SLHHHR, ovl.fmt.RRF4.r3,
11754 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
11755 goto ok;
11756 case 0xb9cd: s390_format_RRE_RR(s390_irgen_CHHR, ovl.fmt.RRE.r1,
11757 ovl.fmt.RRE.r2); goto ok;
11758 case 0xb9cf: s390_format_RRE_RR(s390_irgen_CLHHR, ovl.fmt.RRE.r1,
11759 ovl.fmt.RRE.r2); goto ok;
11760 case 0xb9d8: s390_format_RRF_R0RR2(s390_irgen_AHHLR, ovl.fmt.RRF4.r3,
11761 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
11762 goto ok;
11763 case 0xb9d9: s390_format_RRF_R0RR2(s390_irgen_SHHLR, ovl.fmt.RRF4.r3,
11764 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
11765 goto ok;
11766 case 0xb9da: s390_format_RRF_R0RR2(s390_irgen_ALHHLR, ovl.fmt.RRF4.r3,
11767 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
11768 goto ok;
11769 case 0xb9db: s390_format_RRF_R0RR2(s390_irgen_SLHHLR, ovl.fmt.RRF4.r3,
11770 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
11771 goto ok;
11772 case 0xb9dd: s390_format_RRE_RR(s390_irgen_CHLR, ovl.fmt.RRE.r1,
11773 ovl.fmt.RRE.r2); goto ok;
11774 case 0xb9df: s390_format_RRE_RR(s390_irgen_CLHLR, ovl.fmt.RRE.r1,
11775 ovl.fmt.RRE.r2); goto ok;
11776 case 0xb9e1: /* POPCNT */ goto unimplemented;
sewardjd7bde722011-04-05 13:19:33 +000011777 case 0xb9e2: s390_format_RRF_U0RR(s390_irgen_LOCGR, ovl.fmt.RRF3.r3,
11778 ovl.fmt.RRF3.r1, ovl.fmt.RRF3.r2,
11779 S390_XMNM_LOCGR); goto ok;
sewardj2019a972011-03-07 16:04:07 +000011780 case 0xb9e4: s390_format_RRF_R0RR2(s390_irgen_NGRK, ovl.fmt.RRF4.r3,
11781 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
11782 goto ok;
11783 case 0xb9e6: s390_format_RRF_R0RR2(s390_irgen_OGRK, ovl.fmt.RRF4.r3,
11784 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
11785 goto ok;
11786 case 0xb9e7: s390_format_RRF_R0RR2(s390_irgen_XGRK, ovl.fmt.RRF4.r3,
11787 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
11788 goto ok;
11789 case 0xb9e8: s390_format_RRF_R0RR2(s390_irgen_AGRK, ovl.fmt.RRF4.r3,
11790 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
11791 goto ok;
11792 case 0xb9e9: s390_format_RRF_R0RR2(s390_irgen_SGRK, ovl.fmt.RRF4.r3,
11793 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
11794 goto ok;
11795 case 0xb9ea: s390_format_RRF_R0RR2(s390_irgen_ALGRK, ovl.fmt.RRF4.r3,
11796 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
11797 goto ok;
11798 case 0xb9eb: s390_format_RRF_R0RR2(s390_irgen_SLGRK, ovl.fmt.RRF4.r3,
11799 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
11800 goto ok;
sewardjd7bde722011-04-05 13:19:33 +000011801 case 0xb9f2: s390_format_RRF_U0RR(s390_irgen_LOCR, ovl.fmt.RRF3.r3,
11802 ovl.fmt.RRF3.r1, ovl.fmt.RRF3.r2,
11803 S390_XMNM_LOCR); goto ok;
sewardj2019a972011-03-07 16:04:07 +000011804 case 0xb9f4: s390_format_RRF_R0RR2(s390_irgen_NRK, ovl.fmt.RRF4.r3,
11805 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
11806 goto ok;
11807 case 0xb9f6: s390_format_RRF_R0RR2(s390_irgen_ORK, ovl.fmt.RRF4.r3,
11808 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
11809 goto ok;
11810 case 0xb9f7: s390_format_RRF_R0RR2(s390_irgen_XRK, ovl.fmt.RRF4.r3,
11811 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
11812 goto ok;
11813 case 0xb9f8: s390_format_RRF_R0RR2(s390_irgen_ARK, ovl.fmt.RRF4.r3,
11814 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
11815 goto ok;
11816 case 0xb9f9: s390_format_RRF_R0RR2(s390_irgen_SRK, ovl.fmt.RRF4.r3,
11817 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
11818 goto ok;
11819 case 0xb9fa: s390_format_RRF_R0RR2(s390_irgen_ALRK, ovl.fmt.RRF4.r3,
11820 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
11821 goto ok;
11822 case 0xb9fb: s390_format_RRF_R0RR2(s390_irgen_SLRK, ovl.fmt.RRF4.r3,
11823 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
11824 goto ok;
11825 }
11826
11827 switch ((ovl.value & 0xff000000) >> 24) {
11828 case 0x40: s390_format_RX_RRRD(s390_irgen_STH, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
11829 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
11830 case 0x41: s390_format_RX_RRRD(s390_irgen_LA, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
11831 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
11832 case 0x42: s390_format_RX_RRRD(s390_irgen_STC, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
11833 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
11834 case 0x43: s390_format_RX_RRRD(s390_irgen_IC, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
11835 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
11836 case 0x44: s390_format_RX_RRRD(s390_irgen_EX, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
11837 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
11838 case 0x45: /* BAL */ goto unimplemented;
11839 case 0x46: s390_format_RX_RRRD(s390_irgen_BCT, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
11840 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
11841 case 0x47: s390_format_RX(s390_irgen_BC, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
11842 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
11843 case 0x48: s390_format_RX_RRRD(s390_irgen_LH, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
11844 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
11845 case 0x49: s390_format_RX_RRRD(s390_irgen_CH, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
11846 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
11847 case 0x4a: s390_format_RX_RRRD(s390_irgen_AH, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
11848 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
11849 case 0x4b: s390_format_RX_RRRD(s390_irgen_SH, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
11850 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
11851 case 0x4c: s390_format_RX_RRRD(s390_irgen_MH, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
11852 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
11853 case 0x4d: s390_format_RX_RRRD(s390_irgen_BAS, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
11854 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
11855 case 0x4e: s390_format_RX_RRRD(s390_irgen_CVD, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
11856 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
11857 case 0x4f: s390_format_RX_RRRD(s390_irgen_CVB, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
11858 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
11859 case 0x50: s390_format_RX_RRRD(s390_irgen_ST, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
11860 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
11861 case 0x51: s390_format_RX_RRRD(s390_irgen_LAE, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
11862 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
11863 case 0x54: s390_format_RX_RRRD(s390_irgen_N, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
11864 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
11865 case 0x55: s390_format_RX_RRRD(s390_irgen_CL, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
11866 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
11867 case 0x56: s390_format_RX_RRRD(s390_irgen_O, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
11868 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
11869 case 0x57: s390_format_RX_RRRD(s390_irgen_X, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
11870 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
11871 case 0x58: s390_format_RX_RRRD(s390_irgen_L, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
11872 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
11873 case 0x59: s390_format_RX_RRRD(s390_irgen_C, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
11874 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
11875 case 0x5a: s390_format_RX_RRRD(s390_irgen_A, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
11876 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
11877 case 0x5b: s390_format_RX_RRRD(s390_irgen_S, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
11878 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
11879 case 0x5c: s390_format_RX_RRRD(s390_irgen_M, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
11880 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
11881 case 0x5d: s390_format_RX_RRRD(s390_irgen_D, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
11882 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
11883 case 0x5e: s390_format_RX_RRRD(s390_irgen_AL, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
11884 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
11885 case 0x5f: s390_format_RX_RRRD(s390_irgen_SL, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
11886 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
11887 case 0x60: s390_format_RX_FRRD(s390_irgen_STD, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
11888 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
11889 case 0x67: /* MXD */ goto unimplemented;
11890 case 0x68: s390_format_RX_FRRD(s390_irgen_LD, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
11891 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
11892 case 0x69: /* CD */ goto unimplemented;
11893 case 0x6a: /* AD */ goto unimplemented;
11894 case 0x6b: /* SD */ goto unimplemented;
11895 case 0x6c: /* MD */ goto unimplemented;
11896 case 0x6d: /* DD */ goto unimplemented;
11897 case 0x6e: /* AW */ goto unimplemented;
11898 case 0x6f: /* SW */ goto unimplemented;
11899 case 0x70: s390_format_RX_FRRD(s390_irgen_STE, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
11900 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
11901 case 0x71: s390_format_RX_RRRD(s390_irgen_MS, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
11902 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
11903 case 0x78: s390_format_RX_FRRD(s390_irgen_LE, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
11904 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
11905 case 0x79: /* CE */ goto unimplemented;
11906 case 0x7a: /* AE */ goto unimplemented;
11907 case 0x7b: /* SE */ goto unimplemented;
11908 case 0x7c: /* MDE */ goto unimplemented;
11909 case 0x7d: /* DE */ goto unimplemented;
11910 case 0x7e: /* AU */ goto unimplemented;
11911 case 0x7f: /* SU */ goto unimplemented;
11912 case 0x83: /* DIAG */ goto unimplemented;
11913 case 0x84: s390_format_RSI_RRP(s390_irgen_BRXH, ovl.fmt.RSI.r1,
11914 ovl.fmt.RSI.r3, ovl.fmt.RSI.i2); goto ok;
11915 case 0x85: s390_format_RSI_RRP(s390_irgen_BRXLE, ovl.fmt.RSI.r1,
11916 ovl.fmt.RSI.r3, ovl.fmt.RSI.i2); goto ok;
11917 case 0x86: s390_format_RS_RRRD(s390_irgen_BXH, ovl.fmt.RS.r1, ovl.fmt.RS.r3,
11918 ovl.fmt.RS.b2, ovl.fmt.RS.d2); goto ok;
11919 case 0x87: s390_format_RS_RRRD(s390_irgen_BXLE, ovl.fmt.RS.r1, ovl.fmt.RS.r3,
11920 ovl.fmt.RS.b2, ovl.fmt.RS.d2); goto ok;
11921 case 0x88: s390_format_RS_R0RD(s390_irgen_SRL, ovl.fmt.RS.r1, ovl.fmt.RS.b2,
11922 ovl.fmt.RS.d2); goto ok;
11923 case 0x89: s390_format_RS_R0RD(s390_irgen_SLL, ovl.fmt.RS.r1, ovl.fmt.RS.b2,
11924 ovl.fmt.RS.d2); goto ok;
11925 case 0x8a: s390_format_RS_R0RD(s390_irgen_SRA, ovl.fmt.RS.r1, ovl.fmt.RS.b2,
11926 ovl.fmt.RS.d2); goto ok;
11927 case 0x8b: s390_format_RS_R0RD(s390_irgen_SLA, ovl.fmt.RS.r1, ovl.fmt.RS.b2,
11928 ovl.fmt.RS.d2); goto ok;
11929 case 0x8c: s390_format_RS_R0RD(s390_irgen_SRDL, ovl.fmt.RS.r1, ovl.fmt.RS.b2,
11930 ovl.fmt.RS.d2); goto ok;
11931 case 0x8d: s390_format_RS_R0RD(s390_irgen_SLDL, ovl.fmt.RS.r1, ovl.fmt.RS.b2,
11932 ovl.fmt.RS.d2); goto ok;
11933 case 0x8e: s390_format_RS_R0RD(s390_irgen_SRDA, ovl.fmt.RS.r1, ovl.fmt.RS.b2,
11934 ovl.fmt.RS.d2); goto ok;
11935 case 0x8f: s390_format_RS_R0RD(s390_irgen_SLDA, ovl.fmt.RS.r1, ovl.fmt.RS.b2,
11936 ovl.fmt.RS.d2); goto ok;
11937 case 0x90: s390_format_RS_RRRD(s390_irgen_STM, ovl.fmt.RS.r1, ovl.fmt.RS.r3,
11938 ovl.fmt.RS.b2, ovl.fmt.RS.d2); goto ok;
11939 case 0x91: s390_format_SI_URD(s390_irgen_TM, ovl.fmt.SI.i2, ovl.fmt.SI.b1,
11940 ovl.fmt.SI.d1); goto ok;
11941 case 0x92: s390_format_SI_URD(s390_irgen_MVI, ovl.fmt.SI.i2, ovl.fmt.SI.b1,
11942 ovl.fmt.SI.d1); goto ok;
11943 case 0x94: s390_format_SI_URD(s390_irgen_NI, ovl.fmt.SI.i2, ovl.fmt.SI.b1,
11944 ovl.fmt.SI.d1); goto ok;
11945 case 0x95: s390_format_SI_URD(s390_irgen_CLI, ovl.fmt.SI.i2, ovl.fmt.SI.b1,
11946 ovl.fmt.SI.d1); goto ok;
11947 case 0x96: s390_format_SI_URD(s390_irgen_OI, ovl.fmt.SI.i2, ovl.fmt.SI.b1,
11948 ovl.fmt.SI.d1); goto ok;
11949 case 0x97: s390_format_SI_URD(s390_irgen_XI, ovl.fmt.SI.i2, ovl.fmt.SI.b1,
11950 ovl.fmt.SI.d1); goto ok;
11951 case 0x98: s390_format_RS_RRRD(s390_irgen_LM, ovl.fmt.RS.r1, ovl.fmt.RS.r3,
11952 ovl.fmt.RS.b2, ovl.fmt.RS.d2); goto ok;
11953 case 0x99: /* TRACE */ goto unimplemented;
11954 case 0x9a: s390_format_RS_AARD(s390_irgen_LAM, ovl.fmt.RS.r1, ovl.fmt.RS.r3,
11955 ovl.fmt.RS.b2, ovl.fmt.RS.d2); goto ok;
11956 case 0x9b: s390_format_RS_AARD(s390_irgen_STAM, ovl.fmt.RS.r1, ovl.fmt.RS.r3,
11957 ovl.fmt.RS.b2, ovl.fmt.RS.d2); goto ok;
11958 case 0xa8: s390_format_RS_RRRD(s390_irgen_MVCLE, ovl.fmt.RS.r1,
11959 ovl.fmt.RS.r3, ovl.fmt.RS.b2, ovl.fmt.RS.d2);
11960 goto ok;
11961 case 0xa9: s390_format_RS_RRRD(s390_irgen_CLCLE, ovl.fmt.RS.r1,
11962 ovl.fmt.RS.r3, ovl.fmt.RS.b2, ovl.fmt.RS.d2);
11963 goto ok;
11964 case 0xac: /* STNSM */ goto unimplemented;
11965 case 0xad: /* STOSM */ goto unimplemented;
11966 case 0xae: /* SIGP */ goto unimplemented;
11967 case 0xaf: /* MC */ goto unimplemented;
11968 case 0xb1: /* LRA */ goto unimplemented;
11969 case 0xb6: /* STCTL */ goto unimplemented;
11970 case 0xb7: /* LCTL */ goto unimplemented;
11971 case 0xba: s390_format_RS_RRRD(s390_irgen_CS, ovl.fmt.RS.r1, ovl.fmt.RS.r3,
11972 ovl.fmt.RS.b2, ovl.fmt.RS.d2); goto ok;
11973 case 0xbb: /* CDS */ goto unimplemented;
11974 case 0xbd: s390_format_RS_RURD(s390_irgen_CLM, ovl.fmt.RS.r1, ovl.fmt.RS.r3,
11975 ovl.fmt.RS.b2, ovl.fmt.RS.d2); goto ok;
11976 case 0xbe: s390_format_RS_RURD(s390_irgen_STCM, ovl.fmt.RS.r1, ovl.fmt.RS.r3,
11977 ovl.fmt.RS.b2, ovl.fmt.RS.d2); goto ok;
11978 case 0xbf: s390_format_RS_RURD(s390_irgen_ICM, ovl.fmt.RS.r1, ovl.fmt.RS.r3,
11979 ovl.fmt.RS.b2, ovl.fmt.RS.d2); goto ok;
11980 }
11981
11982 return S390_DECODE_UNKNOWN_INSN;
11983
11984ok:
11985 return S390_DECODE_OK;
11986
11987unimplemented:
11988 return S390_DECODE_UNIMPLEMENTED_INSN;
11989}
11990
11991static s390_decode_t
11992s390_decode_6byte_and_irgen(UChar *bytes)
11993{
11994 typedef union {
11995 struct {
11996 unsigned int op1 : 8;
11997 unsigned int r1 : 4;
11998 unsigned int r3 : 4;
11999 unsigned int i2 : 16;
12000 unsigned int : 8;
12001 unsigned int op2 : 8;
12002 } RIE;
12003 struct {
12004 unsigned int op1 : 8;
12005 unsigned int r1 : 4;
12006 unsigned int r2 : 4;
12007 unsigned int i3 : 8;
12008 unsigned int i4 : 8;
12009 unsigned int i5 : 8;
12010 unsigned int op2 : 8;
12011 } RIE_RRUUU;
12012 struct {
12013 unsigned int op1 : 8;
12014 unsigned int r1 : 4;
12015 unsigned int : 4;
12016 unsigned int i2 : 16;
12017 unsigned int m3 : 4;
12018 unsigned int : 4;
12019 unsigned int op2 : 8;
12020 } RIEv1;
12021 struct {
12022 unsigned int op1 : 8;
12023 unsigned int r1 : 4;
12024 unsigned int r2 : 4;
12025 unsigned int i4 : 16;
12026 unsigned int m3 : 4;
12027 unsigned int : 4;
12028 unsigned int op2 : 8;
12029 } RIE_RRPU;
12030 struct {
12031 unsigned int op1 : 8;
12032 unsigned int r1 : 4;
12033 unsigned int m3 : 4;
12034 unsigned int i4 : 16;
12035 unsigned int i2 : 8;
12036 unsigned int op2 : 8;
12037 } RIEv3;
12038 struct {
12039 unsigned int op1 : 8;
12040 unsigned int r1 : 4;
12041 unsigned int op2 : 4;
12042 unsigned int i2 : 32;
12043 } RIL;
12044 struct {
12045 unsigned int op1 : 8;
12046 unsigned int r1 : 4;
12047 unsigned int m3 : 4;
12048 unsigned int b4 : 4;
12049 unsigned int d4 : 12;
12050 unsigned int i2 : 8;
12051 unsigned int op2 : 8;
12052 } RIS;
12053 struct {
12054 unsigned int op1 : 8;
12055 unsigned int r1 : 4;
12056 unsigned int r2 : 4;
12057 unsigned int b4 : 4;
12058 unsigned int d4 : 12;
12059 unsigned int m3 : 4;
12060 unsigned int : 4;
12061 unsigned int op2 : 8;
12062 } RRS;
12063 struct {
12064 unsigned int op1 : 8;
12065 unsigned int l1 : 4;
12066 unsigned int : 4;
12067 unsigned int b1 : 4;
12068 unsigned int d1 : 12;
12069 unsigned int : 8;
12070 unsigned int op2 : 8;
12071 } RSL;
12072 struct {
12073 unsigned int op1 : 8;
12074 unsigned int r1 : 4;
12075 unsigned int r3 : 4;
12076 unsigned int b2 : 4;
12077 unsigned int dl2 : 12;
12078 unsigned int dh2 : 8;
12079 unsigned int op2 : 8;
12080 } RSY;
12081 struct {
12082 unsigned int op1 : 8;
12083 unsigned int r1 : 4;
12084 unsigned int x2 : 4;
12085 unsigned int b2 : 4;
12086 unsigned int d2 : 12;
12087 unsigned int : 8;
12088 unsigned int op2 : 8;
12089 } RXE;
12090 struct {
12091 unsigned int op1 : 8;
12092 unsigned int r3 : 4;
12093 unsigned int x2 : 4;
12094 unsigned int b2 : 4;
12095 unsigned int d2 : 12;
12096 unsigned int r1 : 4;
12097 unsigned int : 4;
12098 unsigned int op2 : 8;
12099 } RXF;
12100 struct {
12101 unsigned int op1 : 8;
12102 unsigned int r1 : 4;
12103 unsigned int x2 : 4;
12104 unsigned int b2 : 4;
12105 unsigned int dl2 : 12;
12106 unsigned int dh2 : 8;
12107 unsigned int op2 : 8;
12108 } RXY;
12109 struct {
12110 unsigned int op1 : 8;
12111 unsigned int i2 : 8;
12112 unsigned int b1 : 4;
12113 unsigned int dl1 : 12;
12114 unsigned int dh1 : 8;
12115 unsigned int op2 : 8;
12116 } SIY;
12117 struct {
12118 unsigned int op : 8;
12119 unsigned int l : 8;
12120 unsigned int b1 : 4;
12121 unsigned int d1 : 12;
12122 unsigned int b2 : 4;
12123 unsigned int d2 : 12;
12124 } SS;
12125 struct {
12126 unsigned int op : 8;
12127 unsigned int l1 : 4;
12128 unsigned int l2 : 4;
12129 unsigned int b1 : 4;
12130 unsigned int d1 : 12;
12131 unsigned int b2 : 4;
12132 unsigned int d2 : 12;
12133 } SS_LLRDRD;
12134 struct {
12135 unsigned int op : 8;
12136 unsigned int r1 : 4;
12137 unsigned int r3 : 4;
12138 unsigned int b2 : 4;
12139 unsigned int d2 : 12;
12140 unsigned int b4 : 4;
12141 unsigned int d4 : 12;
12142 } SS_RRRDRD2;
12143 struct {
12144 unsigned int op : 16;
12145 unsigned int b1 : 4;
12146 unsigned int d1 : 12;
12147 unsigned int b2 : 4;
12148 unsigned int d2 : 12;
12149 } SSE;
12150 struct {
12151 unsigned int op1 : 8;
12152 unsigned int r3 : 4;
12153 unsigned int op2 : 4;
12154 unsigned int b1 : 4;
12155 unsigned int d1 : 12;
12156 unsigned int b2 : 4;
12157 unsigned int d2 : 12;
12158 } SSF;
12159 struct {
12160 unsigned int op : 16;
12161 unsigned int b1 : 4;
12162 unsigned int d1 : 12;
12163 unsigned int i2 : 16;
12164 } SIL;
12165 } formats;
12166 union {
12167 formats fmt;
12168 ULong value;
12169 } ovl;
12170
12171 vassert(sizeof(formats) == 6);
12172
12173 ((char *)(&ovl.value))[0] = bytes[0];
12174 ((char *)(&ovl.value))[1] = bytes[1];
12175 ((char *)(&ovl.value))[2] = bytes[2];
12176 ((char *)(&ovl.value))[3] = bytes[3];
12177 ((char *)(&ovl.value))[4] = bytes[4];
12178 ((char *)(&ovl.value))[5] = bytes[5];
12179 ((char *)(&ovl.value))[6] = 0x0;
12180 ((char *)(&ovl.value))[7] = 0x0;
12181
12182 switch ((ovl.value >> 16) & 0xff00000000ffULL) {
12183 case 0xe30000000002ULL: s390_format_RXY_RRRD(s390_irgen_LTG, ovl.fmt.RXY.r1,
12184 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12185 ovl.fmt.RXY.dl2,
12186 ovl.fmt.RXY.dh2); goto ok;
12187 case 0xe30000000003ULL: /* LRAG */ goto unimplemented;
12188 case 0xe30000000004ULL: s390_format_RXY_RRRD(s390_irgen_LG, ovl.fmt.RXY.r1,
12189 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12190 ovl.fmt.RXY.dl2,
12191 ovl.fmt.RXY.dh2); goto ok;
12192 case 0xe30000000006ULL: s390_format_RXY_RRRD(s390_irgen_CVBY, ovl.fmt.RXY.r1,
12193 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12194 ovl.fmt.RXY.dl2,
12195 ovl.fmt.RXY.dh2); goto ok;
12196 case 0xe30000000008ULL: s390_format_RXY_RRRD(s390_irgen_AG, ovl.fmt.RXY.r1,
12197 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12198 ovl.fmt.RXY.dl2,
12199 ovl.fmt.RXY.dh2); goto ok;
12200 case 0xe30000000009ULL: s390_format_RXY_RRRD(s390_irgen_SG, ovl.fmt.RXY.r1,
12201 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12202 ovl.fmt.RXY.dl2,
12203 ovl.fmt.RXY.dh2); goto ok;
12204 case 0xe3000000000aULL: s390_format_RXY_RRRD(s390_irgen_ALG, ovl.fmt.RXY.r1,
12205 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12206 ovl.fmt.RXY.dl2,
12207 ovl.fmt.RXY.dh2); goto ok;
12208 case 0xe3000000000bULL: s390_format_RXY_RRRD(s390_irgen_SLG, ovl.fmt.RXY.r1,
12209 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12210 ovl.fmt.RXY.dl2,
12211 ovl.fmt.RXY.dh2); goto ok;
12212 case 0xe3000000000cULL: s390_format_RXY_RRRD(s390_irgen_MSG, ovl.fmt.RXY.r1,
12213 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12214 ovl.fmt.RXY.dl2,
12215 ovl.fmt.RXY.dh2); goto ok;
12216 case 0xe3000000000dULL: s390_format_RXY_RRRD(s390_irgen_DSG, ovl.fmt.RXY.r1,
12217 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12218 ovl.fmt.RXY.dl2,
12219 ovl.fmt.RXY.dh2); goto ok;
12220 case 0xe3000000000eULL: /* CVBG */ goto unimplemented;
12221 case 0xe3000000000fULL: s390_format_RXY_RRRD(s390_irgen_LRVG, ovl.fmt.RXY.r1,
12222 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12223 ovl.fmt.RXY.dl2,
12224 ovl.fmt.RXY.dh2); goto ok;
12225 case 0xe30000000012ULL: s390_format_RXY_RRRD(s390_irgen_LT, ovl.fmt.RXY.r1,
12226 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12227 ovl.fmt.RXY.dl2,
12228 ovl.fmt.RXY.dh2); goto ok;
12229 case 0xe30000000013ULL: /* LRAY */ goto unimplemented;
12230 case 0xe30000000014ULL: s390_format_RXY_RRRD(s390_irgen_LGF, ovl.fmt.RXY.r1,
12231 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12232 ovl.fmt.RXY.dl2,
12233 ovl.fmt.RXY.dh2); goto ok;
12234 case 0xe30000000015ULL: s390_format_RXY_RRRD(s390_irgen_LGH, ovl.fmt.RXY.r1,
12235 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12236 ovl.fmt.RXY.dl2,
12237 ovl.fmt.RXY.dh2); goto ok;
12238 case 0xe30000000016ULL: s390_format_RXY_RRRD(s390_irgen_LLGF, ovl.fmt.RXY.r1,
12239 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12240 ovl.fmt.RXY.dl2,
12241 ovl.fmt.RXY.dh2); goto ok;
12242 case 0xe30000000017ULL: s390_format_RXY_RRRD(s390_irgen_LLGT, ovl.fmt.RXY.r1,
12243 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12244 ovl.fmt.RXY.dl2,
12245 ovl.fmt.RXY.dh2); goto ok;
12246 case 0xe30000000018ULL: s390_format_RXY_RRRD(s390_irgen_AGF, ovl.fmt.RXY.r1,
12247 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12248 ovl.fmt.RXY.dl2,
12249 ovl.fmt.RXY.dh2); goto ok;
12250 case 0xe30000000019ULL: s390_format_RXY_RRRD(s390_irgen_SGF, ovl.fmt.RXY.r1,
12251 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12252 ovl.fmt.RXY.dl2,
12253 ovl.fmt.RXY.dh2); goto ok;
12254 case 0xe3000000001aULL: s390_format_RXY_RRRD(s390_irgen_ALGF, ovl.fmt.RXY.r1,
12255 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12256 ovl.fmt.RXY.dl2,
12257 ovl.fmt.RXY.dh2); goto ok;
12258 case 0xe3000000001bULL: s390_format_RXY_RRRD(s390_irgen_SLGF, ovl.fmt.RXY.r1,
12259 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12260 ovl.fmt.RXY.dl2,
12261 ovl.fmt.RXY.dh2); goto ok;
12262 case 0xe3000000001cULL: s390_format_RXY_RRRD(s390_irgen_MSGF, ovl.fmt.RXY.r1,
12263 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12264 ovl.fmt.RXY.dl2,
12265 ovl.fmt.RXY.dh2); goto ok;
12266 case 0xe3000000001dULL: s390_format_RXY_RRRD(s390_irgen_DSGF, ovl.fmt.RXY.r1,
12267 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12268 ovl.fmt.RXY.dl2,
12269 ovl.fmt.RXY.dh2); goto ok;
12270 case 0xe3000000001eULL: s390_format_RXY_RRRD(s390_irgen_LRV, ovl.fmt.RXY.r1,
12271 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12272 ovl.fmt.RXY.dl2,
12273 ovl.fmt.RXY.dh2); goto ok;
12274 case 0xe3000000001fULL: s390_format_RXY_RRRD(s390_irgen_LRVH, ovl.fmt.RXY.r1,
12275 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12276 ovl.fmt.RXY.dl2,
12277 ovl.fmt.RXY.dh2); goto ok;
12278 case 0xe30000000020ULL: s390_format_RXY_RRRD(s390_irgen_CG, ovl.fmt.RXY.r1,
12279 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12280 ovl.fmt.RXY.dl2,
12281 ovl.fmt.RXY.dh2); goto ok;
12282 case 0xe30000000021ULL: s390_format_RXY_RRRD(s390_irgen_CLG, ovl.fmt.RXY.r1,
12283 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12284 ovl.fmt.RXY.dl2,
12285 ovl.fmt.RXY.dh2); goto ok;
12286 case 0xe30000000024ULL: s390_format_RXY_RRRD(s390_irgen_STG, ovl.fmt.RXY.r1,
12287 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12288 ovl.fmt.RXY.dl2,
12289 ovl.fmt.RXY.dh2); goto ok;
12290 case 0xe30000000026ULL: s390_format_RXY_RRRD(s390_irgen_CVDY, ovl.fmt.RXY.r1,
12291 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12292 ovl.fmt.RXY.dl2,
12293 ovl.fmt.RXY.dh2); goto ok;
12294 case 0xe3000000002eULL: /* CVDG */ goto unimplemented;
12295 case 0xe3000000002fULL: s390_format_RXY_RRRD(s390_irgen_STRVG,
12296 ovl.fmt.RXY.r1, ovl.fmt.RXY.x2,
12297 ovl.fmt.RXY.b2, ovl.fmt.RXY.dl2,
12298 ovl.fmt.RXY.dh2); goto ok;
12299 case 0xe30000000030ULL: s390_format_RXY_RRRD(s390_irgen_CGF, ovl.fmt.RXY.r1,
12300 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12301 ovl.fmt.RXY.dl2,
12302 ovl.fmt.RXY.dh2); goto ok;
12303 case 0xe30000000031ULL: s390_format_RXY_RRRD(s390_irgen_CLGF, ovl.fmt.RXY.r1,
12304 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12305 ovl.fmt.RXY.dl2,
12306 ovl.fmt.RXY.dh2); goto ok;
12307 case 0xe30000000032ULL: s390_format_RXY_RRRD(s390_irgen_LTGF, ovl.fmt.RXY.r1,
12308 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12309 ovl.fmt.RXY.dl2,
12310 ovl.fmt.RXY.dh2); goto ok;
12311 case 0xe30000000034ULL: s390_format_RXY_RRRD(s390_irgen_CGH, ovl.fmt.RXY.r1,
12312 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12313 ovl.fmt.RXY.dl2,
12314 ovl.fmt.RXY.dh2); goto ok;
12315 case 0xe30000000036ULL: s390_format_RXY_URRD(s390_irgen_PFD, ovl.fmt.RXY.r1,
12316 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12317 ovl.fmt.RXY.dl2,
12318 ovl.fmt.RXY.dh2); goto ok;
12319 case 0xe3000000003eULL: s390_format_RXY_RRRD(s390_irgen_STRV, ovl.fmt.RXY.r1,
12320 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12321 ovl.fmt.RXY.dl2,
12322 ovl.fmt.RXY.dh2); goto ok;
12323 case 0xe3000000003fULL: s390_format_RXY_RRRD(s390_irgen_STRVH,
12324 ovl.fmt.RXY.r1, ovl.fmt.RXY.x2,
12325 ovl.fmt.RXY.b2, ovl.fmt.RXY.dl2,
12326 ovl.fmt.RXY.dh2); goto ok;
12327 case 0xe30000000046ULL: s390_format_RXY_RRRD(s390_irgen_BCTG, ovl.fmt.RXY.r1,
12328 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12329 ovl.fmt.RXY.dl2,
12330 ovl.fmt.RXY.dh2); goto ok;
12331 case 0xe30000000050ULL: s390_format_RXY_RRRD(s390_irgen_STY, ovl.fmt.RXY.r1,
12332 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12333 ovl.fmt.RXY.dl2,
12334 ovl.fmt.RXY.dh2); goto ok;
12335 case 0xe30000000051ULL: s390_format_RXY_RRRD(s390_irgen_MSY, ovl.fmt.RXY.r1,
12336 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12337 ovl.fmt.RXY.dl2,
12338 ovl.fmt.RXY.dh2); goto ok;
12339 case 0xe30000000054ULL: s390_format_RXY_RRRD(s390_irgen_NY, ovl.fmt.RXY.r1,
12340 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12341 ovl.fmt.RXY.dl2,
12342 ovl.fmt.RXY.dh2); goto ok;
12343 case 0xe30000000055ULL: s390_format_RXY_RRRD(s390_irgen_CLY, ovl.fmt.RXY.r1,
12344 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12345 ovl.fmt.RXY.dl2,
12346 ovl.fmt.RXY.dh2); goto ok;
12347 case 0xe30000000056ULL: s390_format_RXY_RRRD(s390_irgen_OY, ovl.fmt.RXY.r1,
12348 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12349 ovl.fmt.RXY.dl2,
12350 ovl.fmt.RXY.dh2); goto ok;
12351 case 0xe30000000057ULL: s390_format_RXY_RRRD(s390_irgen_XY, ovl.fmt.RXY.r1,
12352 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12353 ovl.fmt.RXY.dl2,
12354 ovl.fmt.RXY.dh2); goto ok;
12355 case 0xe30000000058ULL: s390_format_RXY_RRRD(s390_irgen_LY, ovl.fmt.RXY.r1,
12356 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12357 ovl.fmt.RXY.dl2,
12358 ovl.fmt.RXY.dh2); goto ok;
12359 case 0xe30000000059ULL: s390_format_RXY_RRRD(s390_irgen_CY, ovl.fmt.RXY.r1,
12360 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12361 ovl.fmt.RXY.dl2,
12362 ovl.fmt.RXY.dh2); goto ok;
12363 case 0xe3000000005aULL: s390_format_RXY_RRRD(s390_irgen_AY, ovl.fmt.RXY.r1,
12364 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12365 ovl.fmt.RXY.dl2,
12366 ovl.fmt.RXY.dh2); goto ok;
12367 case 0xe3000000005bULL: s390_format_RXY_RRRD(s390_irgen_SY, ovl.fmt.RXY.r1,
12368 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12369 ovl.fmt.RXY.dl2,
12370 ovl.fmt.RXY.dh2); goto ok;
12371 case 0xe3000000005cULL: s390_format_RXY_RRRD(s390_irgen_MFY, ovl.fmt.RXY.r1,
12372 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12373 ovl.fmt.RXY.dl2,
12374 ovl.fmt.RXY.dh2); goto ok;
12375 case 0xe3000000005eULL: s390_format_RXY_RRRD(s390_irgen_ALY, ovl.fmt.RXY.r1,
12376 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12377 ovl.fmt.RXY.dl2,
12378 ovl.fmt.RXY.dh2); goto ok;
12379 case 0xe3000000005fULL: s390_format_RXY_RRRD(s390_irgen_SLY, ovl.fmt.RXY.r1,
12380 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12381 ovl.fmt.RXY.dl2,
12382 ovl.fmt.RXY.dh2); goto ok;
12383 case 0xe30000000070ULL: s390_format_RXY_RRRD(s390_irgen_STHY, ovl.fmt.RXY.r1,
12384 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12385 ovl.fmt.RXY.dl2,
12386 ovl.fmt.RXY.dh2); goto ok;
12387 case 0xe30000000071ULL: s390_format_RXY_RRRD(s390_irgen_LAY, ovl.fmt.RXY.r1,
12388 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12389 ovl.fmt.RXY.dl2,
12390 ovl.fmt.RXY.dh2); goto ok;
12391 case 0xe30000000072ULL: s390_format_RXY_RRRD(s390_irgen_STCY, ovl.fmt.RXY.r1,
12392 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12393 ovl.fmt.RXY.dl2,
12394 ovl.fmt.RXY.dh2); goto ok;
12395 case 0xe30000000073ULL: s390_format_RXY_RRRD(s390_irgen_ICY, ovl.fmt.RXY.r1,
12396 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12397 ovl.fmt.RXY.dl2,
12398 ovl.fmt.RXY.dh2); goto ok;
12399 case 0xe30000000075ULL: s390_format_RXY_RRRD(s390_irgen_LAEY, ovl.fmt.RXY.r1,
12400 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12401 ovl.fmt.RXY.dl2,
12402 ovl.fmt.RXY.dh2); goto ok;
12403 case 0xe30000000076ULL: s390_format_RXY_RRRD(s390_irgen_LB, ovl.fmt.RXY.r1,
12404 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12405 ovl.fmt.RXY.dl2,
12406 ovl.fmt.RXY.dh2); goto ok;
12407 case 0xe30000000077ULL: s390_format_RXY_RRRD(s390_irgen_LGB, ovl.fmt.RXY.r1,
12408 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12409 ovl.fmt.RXY.dl2,
12410 ovl.fmt.RXY.dh2); goto ok;
12411 case 0xe30000000078ULL: s390_format_RXY_RRRD(s390_irgen_LHY, ovl.fmt.RXY.r1,
12412 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12413 ovl.fmt.RXY.dl2,
12414 ovl.fmt.RXY.dh2); goto ok;
12415 case 0xe30000000079ULL: s390_format_RXY_RRRD(s390_irgen_CHY, ovl.fmt.RXY.r1,
12416 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12417 ovl.fmt.RXY.dl2,
12418 ovl.fmt.RXY.dh2); goto ok;
12419 case 0xe3000000007aULL: s390_format_RXY_RRRD(s390_irgen_AHY, ovl.fmt.RXY.r1,
12420 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12421 ovl.fmt.RXY.dl2,
12422 ovl.fmt.RXY.dh2); goto ok;
12423 case 0xe3000000007bULL: s390_format_RXY_RRRD(s390_irgen_SHY, ovl.fmt.RXY.r1,
12424 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12425 ovl.fmt.RXY.dl2,
12426 ovl.fmt.RXY.dh2); goto ok;
12427 case 0xe3000000007cULL: s390_format_RXY_RRRD(s390_irgen_MHY, ovl.fmt.RXY.r1,
12428 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12429 ovl.fmt.RXY.dl2,
12430 ovl.fmt.RXY.dh2); goto ok;
12431 case 0xe30000000080ULL: s390_format_RXY_RRRD(s390_irgen_NG, ovl.fmt.RXY.r1,
12432 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12433 ovl.fmt.RXY.dl2,
12434 ovl.fmt.RXY.dh2); goto ok;
12435 case 0xe30000000081ULL: s390_format_RXY_RRRD(s390_irgen_OG, ovl.fmt.RXY.r1,
12436 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12437 ovl.fmt.RXY.dl2,
12438 ovl.fmt.RXY.dh2); goto ok;
12439 case 0xe30000000082ULL: s390_format_RXY_RRRD(s390_irgen_XG, ovl.fmt.RXY.r1,
12440 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12441 ovl.fmt.RXY.dl2,
12442 ovl.fmt.RXY.dh2); goto ok;
12443 case 0xe30000000086ULL: s390_format_RXY_RRRD(s390_irgen_MLG, ovl.fmt.RXY.r1,
12444 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12445 ovl.fmt.RXY.dl2,
12446 ovl.fmt.RXY.dh2); goto ok;
12447 case 0xe30000000087ULL: s390_format_RXY_RRRD(s390_irgen_DLG, ovl.fmt.RXY.r1,
12448 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12449 ovl.fmt.RXY.dl2,
12450 ovl.fmt.RXY.dh2); goto ok;
12451 case 0xe30000000088ULL: s390_format_RXY_RRRD(s390_irgen_ALCG, ovl.fmt.RXY.r1,
12452 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12453 ovl.fmt.RXY.dl2,
12454 ovl.fmt.RXY.dh2); goto ok;
12455 case 0xe30000000089ULL: s390_format_RXY_RRRD(s390_irgen_SLBG, ovl.fmt.RXY.r1,
12456 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12457 ovl.fmt.RXY.dl2,
12458 ovl.fmt.RXY.dh2); goto ok;
12459 case 0xe3000000008eULL: s390_format_RXY_RRRD(s390_irgen_STPQ, ovl.fmt.RXY.r1,
12460 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12461 ovl.fmt.RXY.dl2,
12462 ovl.fmt.RXY.dh2); goto ok;
12463 case 0xe3000000008fULL: s390_format_RXY_RRRD(s390_irgen_LPQ, ovl.fmt.RXY.r1,
12464 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12465 ovl.fmt.RXY.dl2,
12466 ovl.fmt.RXY.dh2); goto ok;
12467 case 0xe30000000090ULL: s390_format_RXY_RRRD(s390_irgen_LLGC, ovl.fmt.RXY.r1,
12468 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12469 ovl.fmt.RXY.dl2,
12470 ovl.fmt.RXY.dh2); goto ok;
12471 case 0xe30000000091ULL: s390_format_RXY_RRRD(s390_irgen_LLGH, ovl.fmt.RXY.r1,
12472 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12473 ovl.fmt.RXY.dl2,
12474 ovl.fmt.RXY.dh2); goto ok;
12475 case 0xe30000000094ULL: s390_format_RXY_RRRD(s390_irgen_LLC, ovl.fmt.RXY.r1,
12476 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12477 ovl.fmt.RXY.dl2,
12478 ovl.fmt.RXY.dh2); goto ok;
12479 case 0xe30000000095ULL: s390_format_RXY_RRRD(s390_irgen_LLH, ovl.fmt.RXY.r1,
12480 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12481 ovl.fmt.RXY.dl2,
12482 ovl.fmt.RXY.dh2); goto ok;
12483 case 0xe30000000096ULL: s390_format_RXY_RRRD(s390_irgen_ML, ovl.fmt.RXY.r1,
12484 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12485 ovl.fmt.RXY.dl2,
12486 ovl.fmt.RXY.dh2); goto ok;
12487 case 0xe30000000097ULL: s390_format_RXY_RRRD(s390_irgen_DL, ovl.fmt.RXY.r1,
12488 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12489 ovl.fmt.RXY.dl2,
12490 ovl.fmt.RXY.dh2); goto ok;
12491 case 0xe30000000098ULL: s390_format_RXY_RRRD(s390_irgen_ALC, ovl.fmt.RXY.r1,
12492 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12493 ovl.fmt.RXY.dl2,
12494 ovl.fmt.RXY.dh2); goto ok;
12495 case 0xe30000000099ULL: s390_format_RXY_RRRD(s390_irgen_SLB, ovl.fmt.RXY.r1,
12496 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12497 ovl.fmt.RXY.dl2,
12498 ovl.fmt.RXY.dh2); goto ok;
12499 case 0xe300000000c0ULL: s390_format_RXY_RRRD(s390_irgen_LBH, ovl.fmt.RXY.r1,
12500 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12501 ovl.fmt.RXY.dl2,
12502 ovl.fmt.RXY.dh2); goto ok;
12503 case 0xe300000000c2ULL: s390_format_RXY_RRRD(s390_irgen_LLCH, ovl.fmt.RXY.r1,
12504 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12505 ovl.fmt.RXY.dl2,
12506 ovl.fmt.RXY.dh2); goto ok;
12507 case 0xe300000000c3ULL: s390_format_RXY_RRRD(s390_irgen_STCH, ovl.fmt.RXY.r1,
12508 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12509 ovl.fmt.RXY.dl2,
12510 ovl.fmt.RXY.dh2); goto ok;
12511 case 0xe300000000c4ULL: s390_format_RXY_RRRD(s390_irgen_LHH, ovl.fmt.RXY.r1,
12512 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12513 ovl.fmt.RXY.dl2,
12514 ovl.fmt.RXY.dh2); goto ok;
12515 case 0xe300000000c6ULL: s390_format_RXY_RRRD(s390_irgen_LLHH, ovl.fmt.RXY.r1,
12516 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12517 ovl.fmt.RXY.dl2,
12518 ovl.fmt.RXY.dh2); goto ok;
12519 case 0xe300000000c7ULL: s390_format_RXY_RRRD(s390_irgen_STHH, ovl.fmt.RXY.r1,
12520 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12521 ovl.fmt.RXY.dl2,
12522 ovl.fmt.RXY.dh2); goto ok;
12523 case 0xe300000000caULL: s390_format_RXY_RRRD(s390_irgen_LFH, ovl.fmt.RXY.r1,
12524 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12525 ovl.fmt.RXY.dl2,
12526 ovl.fmt.RXY.dh2); goto ok;
12527 case 0xe300000000cbULL: s390_format_RXY_RRRD(s390_irgen_STFH, ovl.fmt.RXY.r1,
12528 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12529 ovl.fmt.RXY.dl2,
12530 ovl.fmt.RXY.dh2); goto ok;
12531 case 0xe300000000cdULL: s390_format_RXY_RRRD(s390_irgen_CHF, ovl.fmt.RXY.r1,
12532 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12533 ovl.fmt.RXY.dl2,
12534 ovl.fmt.RXY.dh2); goto ok;
12535 case 0xe300000000cfULL: s390_format_RXY_RRRD(s390_irgen_CLHF, ovl.fmt.RXY.r1,
12536 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12537 ovl.fmt.RXY.dl2,
12538 ovl.fmt.RXY.dh2); goto ok;
12539 case 0xeb0000000004ULL: s390_format_RSY_RRRD(s390_irgen_LMG, ovl.fmt.RSY.r1,
12540 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12541 ovl.fmt.RSY.dl2,
12542 ovl.fmt.RSY.dh2); goto ok;
12543 case 0xeb000000000aULL: s390_format_RSY_RRRD(s390_irgen_SRAG, ovl.fmt.RSY.r1,
12544 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12545 ovl.fmt.RSY.dl2,
12546 ovl.fmt.RSY.dh2); goto ok;
12547 case 0xeb000000000bULL: s390_format_RSY_RRRD(s390_irgen_SLAG, ovl.fmt.RSY.r1,
12548 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12549 ovl.fmt.RSY.dl2,
12550 ovl.fmt.RSY.dh2); goto ok;
12551 case 0xeb000000000cULL: s390_format_RSY_RRRD(s390_irgen_SRLG, ovl.fmt.RSY.r1,
12552 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12553 ovl.fmt.RSY.dl2,
12554 ovl.fmt.RSY.dh2); goto ok;
12555 case 0xeb000000000dULL: s390_format_RSY_RRRD(s390_irgen_SLLG, ovl.fmt.RSY.r1,
12556 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12557 ovl.fmt.RSY.dl2,
12558 ovl.fmt.RSY.dh2); goto ok;
12559 case 0xeb000000000fULL: /* TRACG */ goto unimplemented;
12560 case 0xeb0000000014ULL: s390_format_RSY_RRRD(s390_irgen_CSY, ovl.fmt.RSY.r1,
12561 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12562 ovl.fmt.RSY.dl2,
12563 ovl.fmt.RSY.dh2); goto ok;
12564 case 0xeb000000001cULL: s390_format_RSY_RRRD(s390_irgen_RLLG, ovl.fmt.RSY.r1,
12565 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12566 ovl.fmt.RSY.dl2,
12567 ovl.fmt.RSY.dh2); goto ok;
12568 case 0xeb000000001dULL: s390_format_RSY_RRRD(s390_irgen_RLL, ovl.fmt.RSY.r1,
12569 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12570 ovl.fmt.RSY.dl2,
12571 ovl.fmt.RSY.dh2); goto ok;
12572 case 0xeb0000000020ULL: s390_format_RSY_RURD(s390_irgen_CLMH, ovl.fmt.RSY.r1,
12573 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12574 ovl.fmt.RSY.dl2,
12575 ovl.fmt.RSY.dh2); goto ok;
12576 case 0xeb0000000021ULL: s390_format_RSY_RURD(s390_irgen_CLMY, ovl.fmt.RSY.r1,
12577 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12578 ovl.fmt.RSY.dl2,
12579 ovl.fmt.RSY.dh2); goto ok;
12580 case 0xeb0000000024ULL: s390_format_RSY_RRRD(s390_irgen_STMG, ovl.fmt.RSY.r1,
12581 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12582 ovl.fmt.RSY.dl2,
12583 ovl.fmt.RSY.dh2); goto ok;
12584 case 0xeb0000000025ULL: /* STCTG */ goto unimplemented;
12585 case 0xeb0000000026ULL: s390_format_RSY_RRRD(s390_irgen_STMH, ovl.fmt.RSY.r1,
12586 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12587 ovl.fmt.RSY.dl2,
12588 ovl.fmt.RSY.dh2); goto ok;
12589 case 0xeb000000002cULL: s390_format_RSY_RURD(s390_irgen_STCMH,
12590 ovl.fmt.RSY.r1, ovl.fmt.RSY.r3,
12591 ovl.fmt.RSY.b2, ovl.fmt.RSY.dl2,
12592 ovl.fmt.RSY.dh2); goto ok;
12593 case 0xeb000000002dULL: s390_format_RSY_RURD(s390_irgen_STCMY,
12594 ovl.fmt.RSY.r1, ovl.fmt.RSY.r3,
12595 ovl.fmt.RSY.b2, ovl.fmt.RSY.dl2,
12596 ovl.fmt.RSY.dh2); goto ok;
12597 case 0xeb000000002fULL: /* LCTLG */ goto unimplemented;
12598 case 0xeb0000000030ULL: s390_format_RSY_RRRD(s390_irgen_CSG, ovl.fmt.RSY.r1,
12599 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12600 ovl.fmt.RSY.dl2,
12601 ovl.fmt.RSY.dh2); goto ok;
12602 case 0xeb0000000031ULL: /* CDSY */ goto unimplemented;
12603 case 0xeb000000003eULL: /* CDSG */ goto unimplemented;
12604 case 0xeb0000000044ULL: s390_format_RSY_RRRD(s390_irgen_BXHG, ovl.fmt.RSY.r1,
12605 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12606 ovl.fmt.RSY.dl2,
12607 ovl.fmt.RSY.dh2); goto ok;
12608 case 0xeb0000000045ULL: s390_format_RSY_RRRD(s390_irgen_BXLEG,
12609 ovl.fmt.RSY.r1, ovl.fmt.RSY.r3,
12610 ovl.fmt.RSY.b2, ovl.fmt.RSY.dl2,
12611 ovl.fmt.RSY.dh2); goto ok;
12612 case 0xeb000000004cULL: /* ECAG */ goto unimplemented;
12613 case 0xeb0000000051ULL: s390_format_SIY_URD(s390_irgen_TMY, ovl.fmt.SIY.i2,
12614 ovl.fmt.SIY.b1, ovl.fmt.SIY.dl1,
12615 ovl.fmt.SIY.dh1); goto ok;
12616 case 0xeb0000000052ULL: s390_format_SIY_URD(s390_irgen_MVIY, ovl.fmt.SIY.i2,
12617 ovl.fmt.SIY.b1, ovl.fmt.SIY.dl1,
12618 ovl.fmt.SIY.dh1); goto ok;
12619 case 0xeb0000000054ULL: s390_format_SIY_URD(s390_irgen_NIY, ovl.fmt.SIY.i2,
12620 ovl.fmt.SIY.b1, ovl.fmt.SIY.dl1,
12621 ovl.fmt.SIY.dh1); goto ok;
12622 case 0xeb0000000055ULL: s390_format_SIY_URD(s390_irgen_CLIY, ovl.fmt.SIY.i2,
12623 ovl.fmt.SIY.b1, ovl.fmt.SIY.dl1,
12624 ovl.fmt.SIY.dh1); goto ok;
12625 case 0xeb0000000056ULL: s390_format_SIY_URD(s390_irgen_OIY, ovl.fmt.SIY.i2,
12626 ovl.fmt.SIY.b1, ovl.fmt.SIY.dl1,
12627 ovl.fmt.SIY.dh1); goto ok;
12628 case 0xeb0000000057ULL: s390_format_SIY_URD(s390_irgen_XIY, ovl.fmt.SIY.i2,
12629 ovl.fmt.SIY.b1, ovl.fmt.SIY.dl1,
12630 ovl.fmt.SIY.dh1); goto ok;
12631 case 0xeb000000006aULL: s390_format_SIY_IRD(s390_irgen_ASI, ovl.fmt.SIY.i2,
12632 ovl.fmt.SIY.b1, ovl.fmt.SIY.dl1,
12633 ovl.fmt.SIY.dh1); goto ok;
12634 case 0xeb000000006eULL: s390_format_SIY_IRD(s390_irgen_ALSI, ovl.fmt.SIY.i2,
12635 ovl.fmt.SIY.b1, ovl.fmt.SIY.dl1,
12636 ovl.fmt.SIY.dh1); goto ok;
12637 case 0xeb000000007aULL: s390_format_SIY_IRD(s390_irgen_AGSI, ovl.fmt.SIY.i2,
12638 ovl.fmt.SIY.b1, ovl.fmt.SIY.dl1,
12639 ovl.fmt.SIY.dh1); goto ok;
12640 case 0xeb000000007eULL: s390_format_SIY_IRD(s390_irgen_ALGSI, ovl.fmt.SIY.i2,
12641 ovl.fmt.SIY.b1, ovl.fmt.SIY.dl1,
12642 ovl.fmt.SIY.dh1); goto ok;
12643 case 0xeb0000000080ULL: s390_format_RSY_RURD(s390_irgen_ICMH, ovl.fmt.RSY.r1,
12644 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12645 ovl.fmt.RSY.dl2,
12646 ovl.fmt.RSY.dh2); goto ok;
12647 case 0xeb0000000081ULL: s390_format_RSY_RURD(s390_irgen_ICMY, ovl.fmt.RSY.r1,
12648 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12649 ovl.fmt.RSY.dl2,
12650 ovl.fmt.RSY.dh2); goto ok;
12651 case 0xeb000000008eULL: /* MVCLU */ goto unimplemented;
12652 case 0xeb000000008fULL: /* CLCLU */ goto unimplemented;
12653 case 0xeb0000000090ULL: s390_format_RSY_RRRD(s390_irgen_STMY, ovl.fmt.RSY.r1,
12654 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12655 ovl.fmt.RSY.dl2,
12656 ovl.fmt.RSY.dh2); goto ok;
12657 case 0xeb0000000096ULL: s390_format_RSY_RRRD(s390_irgen_LMH, ovl.fmt.RSY.r1,
12658 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12659 ovl.fmt.RSY.dl2,
12660 ovl.fmt.RSY.dh2); goto ok;
12661 case 0xeb0000000098ULL: s390_format_RSY_RRRD(s390_irgen_LMY, ovl.fmt.RSY.r1,
12662 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12663 ovl.fmt.RSY.dl2,
12664 ovl.fmt.RSY.dh2); goto ok;
12665 case 0xeb000000009aULL: s390_format_RSY_AARD(s390_irgen_LAMY, ovl.fmt.RSY.r1,
12666 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12667 ovl.fmt.RSY.dl2,
12668 ovl.fmt.RSY.dh2); goto ok;
12669 case 0xeb000000009bULL: s390_format_RSY_AARD(s390_irgen_STAMY,
12670 ovl.fmt.RSY.r1, ovl.fmt.RSY.r3,
12671 ovl.fmt.RSY.b2, ovl.fmt.RSY.dl2,
12672 ovl.fmt.RSY.dh2); goto ok;
12673 case 0xeb00000000c0ULL: /* TP */ goto unimplemented;
12674 case 0xeb00000000dcULL: s390_format_RSY_RRRD(s390_irgen_SRAK, ovl.fmt.RSY.r1,
12675 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12676 ovl.fmt.RSY.dl2,
12677 ovl.fmt.RSY.dh2); goto ok;
12678 case 0xeb00000000ddULL: s390_format_RSY_RRRD(s390_irgen_SLAK, ovl.fmt.RSY.r1,
12679 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12680 ovl.fmt.RSY.dl2,
12681 ovl.fmt.RSY.dh2); goto ok;
12682 case 0xeb00000000deULL: s390_format_RSY_RRRD(s390_irgen_SRLK, ovl.fmt.RSY.r1,
12683 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12684 ovl.fmt.RSY.dl2,
12685 ovl.fmt.RSY.dh2); goto ok;
12686 case 0xeb00000000dfULL: s390_format_RSY_RRRD(s390_irgen_SLLK, ovl.fmt.RSY.r1,
12687 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12688 ovl.fmt.RSY.dl2,
12689 ovl.fmt.RSY.dh2); goto ok;
sewardjd7bde722011-04-05 13:19:33 +000012690 case 0xeb00000000e2ULL: s390_format_RSY_RDRM(s390_irgen_LOCG, ovl.fmt.RSY.r1,
12691 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12692 ovl.fmt.RSY.dl2,
12693 ovl.fmt.RSY.dh2,
12694 S390_XMNM_LOCG); goto ok;
12695 case 0xeb00000000e3ULL: s390_format_RSY_RDRM(s390_irgen_STOCG,
12696 ovl.fmt.RSY.r1, ovl.fmt.RSY.r3,
12697 ovl.fmt.RSY.b2, ovl.fmt.RSY.dl2,
12698 ovl.fmt.RSY.dh2,
12699 S390_XMNM_STOCG); goto ok;
sewardj2019a972011-03-07 16:04:07 +000012700 case 0xeb00000000e4ULL: s390_format_RSY_RRRD(s390_irgen_LANG, ovl.fmt.RSY.r1,
12701 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12702 ovl.fmt.RSY.dl2,
12703 ovl.fmt.RSY.dh2); goto ok;
12704 case 0xeb00000000e6ULL: s390_format_RSY_RRRD(s390_irgen_LAOG, ovl.fmt.RSY.r1,
12705 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12706 ovl.fmt.RSY.dl2,
12707 ovl.fmt.RSY.dh2); goto ok;
12708 case 0xeb00000000e7ULL: s390_format_RSY_RRRD(s390_irgen_LAXG, ovl.fmt.RSY.r1,
12709 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12710 ovl.fmt.RSY.dl2,
12711 ovl.fmt.RSY.dh2); goto ok;
12712 case 0xeb00000000e8ULL: s390_format_RSY_RRRD(s390_irgen_LAAG, ovl.fmt.RSY.r1,
12713 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12714 ovl.fmt.RSY.dl2,
12715 ovl.fmt.RSY.dh2); goto ok;
12716 case 0xeb00000000eaULL: s390_format_RSY_RRRD(s390_irgen_LAALG,
12717 ovl.fmt.RSY.r1, ovl.fmt.RSY.r3,
12718 ovl.fmt.RSY.b2, ovl.fmt.RSY.dl2,
12719 ovl.fmt.RSY.dh2); goto ok;
sewardjd7bde722011-04-05 13:19:33 +000012720 case 0xeb00000000f2ULL: s390_format_RSY_RDRM(s390_irgen_LOC, ovl.fmt.RSY.r1,
12721 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12722 ovl.fmt.RSY.dl2,
12723 ovl.fmt.RSY.dh2, S390_XMNM_LOC);
12724 goto ok;
12725 case 0xeb00000000f3ULL: s390_format_RSY_RDRM(s390_irgen_STOC, ovl.fmt.RSY.r1,
12726 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12727 ovl.fmt.RSY.dl2,
12728 ovl.fmt.RSY.dh2,
12729 S390_XMNM_STOC); goto ok;
sewardj2019a972011-03-07 16:04:07 +000012730 case 0xeb00000000f4ULL: s390_format_RSY_RRRD(s390_irgen_LAN, ovl.fmt.RSY.r1,
12731 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12732 ovl.fmt.RSY.dl2,
12733 ovl.fmt.RSY.dh2); goto ok;
12734 case 0xeb00000000f6ULL: s390_format_RSY_RRRD(s390_irgen_LAO, ovl.fmt.RSY.r1,
12735 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12736 ovl.fmt.RSY.dl2,
12737 ovl.fmt.RSY.dh2); goto ok;
12738 case 0xeb00000000f7ULL: s390_format_RSY_RRRD(s390_irgen_LAX, ovl.fmt.RSY.r1,
12739 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12740 ovl.fmt.RSY.dl2,
12741 ovl.fmt.RSY.dh2); goto ok;
12742 case 0xeb00000000f8ULL: s390_format_RSY_RRRD(s390_irgen_LAA, ovl.fmt.RSY.r1,
12743 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12744 ovl.fmt.RSY.dl2,
12745 ovl.fmt.RSY.dh2); goto ok;
12746 case 0xeb00000000faULL: s390_format_RSY_RRRD(s390_irgen_LAAL, ovl.fmt.RSY.r1,
12747 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12748 ovl.fmt.RSY.dl2,
12749 ovl.fmt.RSY.dh2); goto ok;
12750 case 0xec0000000044ULL: s390_format_RIE_RRP(s390_irgen_BRXHG, ovl.fmt.RIE.r1,
12751 ovl.fmt.RIE.r3, ovl.fmt.RIE.i2);
12752 goto ok;
12753 case 0xec0000000045ULL: s390_format_RIE_RRP(s390_irgen_BRXLG, ovl.fmt.RIE.r1,
12754 ovl.fmt.RIE.r3, ovl.fmt.RIE.i2);
12755 goto ok;
12756 case 0xec0000000051ULL: /* RISBLG */ goto unimplemented;
12757 case 0xec0000000054ULL: s390_format_RIE_RRUUU(s390_irgen_RNSBG,
12758 ovl.fmt.RIE_RRUUU.r1,
12759 ovl.fmt.RIE_RRUUU.r2,
12760 ovl.fmt.RIE_RRUUU.i3,
12761 ovl.fmt.RIE_RRUUU.i4,
12762 ovl.fmt.RIE_RRUUU.i5);
12763 goto ok;
12764 case 0xec0000000055ULL: s390_format_RIE_RRUUU(s390_irgen_RISBG,
12765 ovl.fmt.RIE_RRUUU.r1,
12766 ovl.fmt.RIE_RRUUU.r2,
12767 ovl.fmt.RIE_RRUUU.i3,
12768 ovl.fmt.RIE_RRUUU.i4,
12769 ovl.fmt.RIE_RRUUU.i5);
12770 goto ok;
12771 case 0xec0000000056ULL: s390_format_RIE_RRUUU(s390_irgen_ROSBG,
12772 ovl.fmt.RIE_RRUUU.r1,
12773 ovl.fmt.RIE_RRUUU.r2,
12774 ovl.fmt.RIE_RRUUU.i3,
12775 ovl.fmt.RIE_RRUUU.i4,
12776 ovl.fmt.RIE_RRUUU.i5);
12777 goto ok;
12778 case 0xec0000000057ULL: s390_format_RIE_RRUUU(s390_irgen_RXSBG,
12779 ovl.fmt.RIE_RRUUU.r1,
12780 ovl.fmt.RIE_RRUUU.r2,
12781 ovl.fmt.RIE_RRUUU.i3,
12782 ovl.fmt.RIE_RRUUU.i4,
12783 ovl.fmt.RIE_RRUUU.i5);
12784 goto ok;
12785 case 0xec000000005dULL: /* RISBHG */ goto unimplemented;
12786 case 0xec0000000064ULL: s390_format_RIE_RRPU(s390_irgen_CGRJ,
12787 ovl.fmt.RIE_RRPU.r1,
12788 ovl.fmt.RIE_RRPU.r2,
12789 ovl.fmt.RIE_RRPU.i4,
12790 ovl.fmt.RIE_RRPU.m3); goto ok;
12791 case 0xec0000000065ULL: s390_format_RIE_RRPU(s390_irgen_CLGRJ,
12792 ovl.fmt.RIE_RRPU.r1,
12793 ovl.fmt.RIE_RRPU.r2,
12794 ovl.fmt.RIE_RRPU.i4,
12795 ovl.fmt.RIE_RRPU.m3); goto ok;
12796 case 0xec0000000070ULL: /* CGIT */ goto unimplemented;
12797 case 0xec0000000071ULL: /* CLGIT */ goto unimplemented;
12798 case 0xec0000000072ULL: /* CIT */ goto unimplemented;
12799 case 0xec0000000073ULL: /* CLFIT */ goto unimplemented;
12800 case 0xec0000000076ULL: s390_format_RIE_RRPU(s390_irgen_CRJ,
12801 ovl.fmt.RIE_RRPU.r1,
12802 ovl.fmt.RIE_RRPU.r2,
12803 ovl.fmt.RIE_RRPU.i4,
12804 ovl.fmt.RIE_RRPU.m3); goto ok;
12805 case 0xec0000000077ULL: s390_format_RIE_RRPU(s390_irgen_CLRJ,
12806 ovl.fmt.RIE_RRPU.r1,
12807 ovl.fmt.RIE_RRPU.r2,
12808 ovl.fmt.RIE_RRPU.i4,
12809 ovl.fmt.RIE_RRPU.m3); goto ok;
12810 case 0xec000000007cULL: s390_format_RIE_RUPI(s390_irgen_CGIJ,
12811 ovl.fmt.RIEv3.r1,
12812 ovl.fmt.RIEv3.m3,
12813 ovl.fmt.RIEv3.i4,
12814 ovl.fmt.RIEv3.i2); goto ok;
12815 case 0xec000000007dULL: s390_format_RIE_RUPU(s390_irgen_CLGIJ,
12816 ovl.fmt.RIEv3.r1,
12817 ovl.fmt.RIEv3.m3,
12818 ovl.fmt.RIEv3.i4,
12819 ovl.fmt.RIEv3.i2); goto ok;
12820 case 0xec000000007eULL: s390_format_RIE_RUPI(s390_irgen_CIJ,
12821 ovl.fmt.RIEv3.r1,
12822 ovl.fmt.RIEv3.m3,
12823 ovl.fmt.RIEv3.i4,
12824 ovl.fmt.RIEv3.i2); goto ok;
12825 case 0xec000000007fULL: s390_format_RIE_RUPU(s390_irgen_CLIJ,
12826 ovl.fmt.RIEv3.r1,
12827 ovl.fmt.RIEv3.m3,
12828 ovl.fmt.RIEv3.i4,
12829 ovl.fmt.RIEv3.i2); goto ok;
12830 case 0xec00000000d8ULL: s390_format_RIE_RRI0(s390_irgen_AHIK, ovl.fmt.RIE.r1,
12831 ovl.fmt.RIE.r3, ovl.fmt.RIE.i2);
12832 goto ok;
12833 case 0xec00000000d9ULL: s390_format_RIE_RRI0(s390_irgen_AGHIK,
12834 ovl.fmt.RIE.r1, ovl.fmt.RIE.r3,
12835 ovl.fmt.RIE.i2); goto ok;
12836 case 0xec00000000daULL: s390_format_RIE_RRI0(s390_irgen_ALHSIK,
12837 ovl.fmt.RIE.r1, ovl.fmt.RIE.r3,
12838 ovl.fmt.RIE.i2); goto ok;
12839 case 0xec00000000dbULL: s390_format_RIE_RRI0(s390_irgen_ALGHSIK,
12840 ovl.fmt.RIE.r1, ovl.fmt.RIE.r3,
12841 ovl.fmt.RIE.i2); goto ok;
12842 case 0xec00000000e4ULL: s390_format_RRS(s390_irgen_CGRB, ovl.fmt.RRS.r1,
12843 ovl.fmt.RRS.r2, ovl.fmt.RRS.b4,
12844 ovl.fmt.RRS.d4, ovl.fmt.RRS.m3);
12845 goto ok;
12846 case 0xec00000000e5ULL: s390_format_RRS(s390_irgen_CLGRB, ovl.fmt.RRS.r1,
12847 ovl.fmt.RRS.r2, ovl.fmt.RRS.b4,
12848 ovl.fmt.RRS.d4, ovl.fmt.RRS.m3);
12849 goto ok;
12850 case 0xec00000000f6ULL: s390_format_RRS(s390_irgen_CRB, ovl.fmt.RRS.r1,
12851 ovl.fmt.RRS.r2, ovl.fmt.RRS.b4,
12852 ovl.fmt.RRS.d4, ovl.fmt.RRS.m3);
12853 goto ok;
12854 case 0xec00000000f7ULL: s390_format_RRS(s390_irgen_CLRB, ovl.fmt.RRS.r1,
12855 ovl.fmt.RRS.r2, ovl.fmt.RRS.b4,
12856 ovl.fmt.RRS.d4, ovl.fmt.RRS.m3);
12857 goto ok;
12858 case 0xec00000000fcULL: s390_format_RIS_RURDI(s390_irgen_CGIB,
12859 ovl.fmt.RIS.r1, ovl.fmt.RIS.m3,
12860 ovl.fmt.RIS.b4, ovl.fmt.RIS.d4,
12861 ovl.fmt.RIS.i2); goto ok;
12862 case 0xec00000000fdULL: s390_format_RIS_RURDU(s390_irgen_CLGIB,
12863 ovl.fmt.RIS.r1, ovl.fmt.RIS.m3,
12864 ovl.fmt.RIS.b4, ovl.fmt.RIS.d4,
12865 ovl.fmt.RIS.i2); goto ok;
12866 case 0xec00000000feULL: s390_format_RIS_RURDI(s390_irgen_CIB, ovl.fmt.RIS.r1,
12867 ovl.fmt.RIS.m3, ovl.fmt.RIS.b4,
12868 ovl.fmt.RIS.d4,
12869 ovl.fmt.RIS.i2); goto ok;
12870 case 0xec00000000ffULL: s390_format_RIS_RURDU(s390_irgen_CLIB,
12871 ovl.fmt.RIS.r1, ovl.fmt.RIS.m3,
12872 ovl.fmt.RIS.b4, ovl.fmt.RIS.d4,
12873 ovl.fmt.RIS.i2); goto ok;
12874 case 0xed0000000004ULL: s390_format_RXE_FRRD(s390_irgen_LDEB, ovl.fmt.RXE.r1,
12875 ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
12876 ovl.fmt.RXE.d2); goto ok;
12877 case 0xed0000000005ULL: s390_format_RXE_FRRD(s390_irgen_LXDB, ovl.fmt.RXE.r1,
12878 ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
12879 ovl.fmt.RXE.d2); goto ok;
12880 case 0xed0000000006ULL: s390_format_RXE_FRRD(s390_irgen_LXEB, ovl.fmt.RXE.r1,
12881 ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
12882 ovl.fmt.RXE.d2); goto ok;
12883 case 0xed0000000007ULL: /* MXDB */ goto unimplemented;
12884 case 0xed0000000008ULL: /* KEB */ goto unimplemented;
12885 case 0xed0000000009ULL: s390_format_RXE_FRRD(s390_irgen_CEB, ovl.fmt.RXE.r1,
12886 ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
12887 ovl.fmt.RXE.d2); goto ok;
12888 case 0xed000000000aULL: s390_format_RXE_FRRD(s390_irgen_AEB, ovl.fmt.RXE.r1,
12889 ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
12890 ovl.fmt.RXE.d2); goto ok;
12891 case 0xed000000000bULL: s390_format_RXE_FRRD(s390_irgen_SEB, ovl.fmt.RXE.r1,
12892 ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
12893 ovl.fmt.RXE.d2); goto ok;
12894 case 0xed000000000cULL: /* MDEB */ goto unimplemented;
12895 case 0xed000000000dULL: s390_format_RXE_FRRD(s390_irgen_DEB, ovl.fmt.RXE.r1,
12896 ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
12897 ovl.fmt.RXE.d2); goto ok;
12898 case 0xed000000000eULL: s390_format_RXF_FRRDF(s390_irgen_MAEB,
12899 ovl.fmt.RXF.r3, ovl.fmt.RXF.x2,
12900 ovl.fmt.RXF.b2, ovl.fmt.RXF.d2,
12901 ovl.fmt.RXF.r1); goto ok;
12902 case 0xed000000000fULL: s390_format_RXF_FRRDF(s390_irgen_MSEB,
12903 ovl.fmt.RXF.r3, ovl.fmt.RXF.x2,
12904 ovl.fmt.RXF.b2, ovl.fmt.RXF.d2,
12905 ovl.fmt.RXF.r1); goto ok;
12906 case 0xed0000000010ULL: s390_format_RXE_FRRD(s390_irgen_TCEB, ovl.fmt.RXE.r1,
12907 ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
12908 ovl.fmt.RXE.d2); goto ok;
12909 case 0xed0000000011ULL: s390_format_RXE_FRRD(s390_irgen_TCDB, ovl.fmt.RXE.r1,
12910 ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
12911 ovl.fmt.RXE.d2); goto ok;
12912 case 0xed0000000012ULL: s390_format_RXE_FRRD(s390_irgen_TCXB, ovl.fmt.RXE.r1,
12913 ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
12914 ovl.fmt.RXE.d2); goto ok;
12915 case 0xed0000000014ULL: s390_format_RXE_FRRD(s390_irgen_SQEB, ovl.fmt.RXE.r1,
12916 ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
12917 ovl.fmt.RXE.d2); goto ok;
12918 case 0xed0000000015ULL: s390_format_RXE_FRRD(s390_irgen_SQDB, ovl.fmt.RXE.r1,
12919 ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
12920 ovl.fmt.RXE.d2); goto ok;
12921 case 0xed0000000017ULL: s390_format_RXE_FRRD(s390_irgen_MEEB, ovl.fmt.RXE.r1,
12922 ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
12923 ovl.fmt.RXE.d2); goto ok;
12924 case 0xed0000000018ULL: /* KDB */ goto unimplemented;
12925 case 0xed0000000019ULL: s390_format_RXE_FRRD(s390_irgen_CDB, ovl.fmt.RXE.r1,
12926 ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
12927 ovl.fmt.RXE.d2); goto ok;
12928 case 0xed000000001aULL: s390_format_RXE_FRRD(s390_irgen_ADB, ovl.fmt.RXE.r1,
12929 ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
12930 ovl.fmt.RXE.d2); goto ok;
12931 case 0xed000000001bULL: s390_format_RXE_FRRD(s390_irgen_SDB, ovl.fmt.RXE.r1,
12932 ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
12933 ovl.fmt.RXE.d2); goto ok;
12934 case 0xed000000001cULL: s390_format_RXE_FRRD(s390_irgen_MDB, ovl.fmt.RXE.r1,
12935 ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
12936 ovl.fmt.RXE.d2); goto ok;
12937 case 0xed000000001dULL: s390_format_RXE_FRRD(s390_irgen_DDB, ovl.fmt.RXE.r1,
12938 ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
12939 ovl.fmt.RXE.d2); goto ok;
12940 case 0xed000000001eULL: s390_format_RXF_FRRDF(s390_irgen_MADB,
12941 ovl.fmt.RXF.r3, ovl.fmt.RXF.x2,
12942 ovl.fmt.RXF.b2, ovl.fmt.RXF.d2,
12943 ovl.fmt.RXF.r1); goto ok;
12944 case 0xed000000001fULL: s390_format_RXF_FRRDF(s390_irgen_MSDB,
12945 ovl.fmt.RXF.r3, ovl.fmt.RXF.x2,
12946 ovl.fmt.RXF.b2, ovl.fmt.RXF.d2,
12947 ovl.fmt.RXF.r1); goto ok;
12948 case 0xed0000000024ULL: /* LDE */ goto unimplemented;
12949 case 0xed0000000025ULL: /* LXD */ goto unimplemented;
12950 case 0xed0000000026ULL: /* LXE */ goto unimplemented;
12951 case 0xed000000002eULL: /* MAE */ goto unimplemented;
12952 case 0xed000000002fULL: /* MSE */ goto unimplemented;
12953 case 0xed0000000034ULL: /* SQE */ goto unimplemented;
12954 case 0xed0000000035ULL: /* SQD */ goto unimplemented;
12955 case 0xed0000000037ULL: /* MEE */ goto unimplemented;
12956 case 0xed0000000038ULL: /* MAYL */ goto unimplemented;
12957 case 0xed0000000039ULL: /* MYL */ goto unimplemented;
12958 case 0xed000000003aULL: /* MAY */ goto unimplemented;
12959 case 0xed000000003bULL: /* MY */ goto unimplemented;
12960 case 0xed000000003cULL: /* MAYH */ goto unimplemented;
12961 case 0xed000000003dULL: /* MYH */ goto unimplemented;
12962 case 0xed000000003eULL: /* MAD */ goto unimplemented;
12963 case 0xed000000003fULL: /* MSD */ goto unimplemented;
12964 case 0xed0000000040ULL: /* SLDT */ goto unimplemented;
12965 case 0xed0000000041ULL: /* SRDT */ goto unimplemented;
12966 case 0xed0000000048ULL: /* SLXT */ goto unimplemented;
12967 case 0xed0000000049ULL: /* SRXT */ goto unimplemented;
12968 case 0xed0000000050ULL: /* TDCET */ goto unimplemented;
12969 case 0xed0000000051ULL: /* TDGET */ goto unimplemented;
12970 case 0xed0000000054ULL: /* TDCDT */ goto unimplemented;
12971 case 0xed0000000055ULL: /* TDGDT */ goto unimplemented;
12972 case 0xed0000000058ULL: /* TDCXT */ goto unimplemented;
12973 case 0xed0000000059ULL: /* TDGXT */ goto unimplemented;
12974 case 0xed0000000064ULL: s390_format_RXY_FRRD(s390_irgen_LEY, ovl.fmt.RXY.r1,
12975 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12976 ovl.fmt.RXY.dl2,
12977 ovl.fmt.RXY.dh2); goto ok;
12978 case 0xed0000000065ULL: s390_format_RXY_FRRD(s390_irgen_LDY, ovl.fmt.RXY.r1,
12979 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12980 ovl.fmt.RXY.dl2,
12981 ovl.fmt.RXY.dh2); goto ok;
12982 case 0xed0000000066ULL: s390_format_RXY_FRRD(s390_irgen_STEY, ovl.fmt.RXY.r1,
12983 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12984 ovl.fmt.RXY.dl2,
12985 ovl.fmt.RXY.dh2); goto ok;
12986 case 0xed0000000067ULL: s390_format_RXY_FRRD(s390_irgen_STDY, ovl.fmt.RXY.r1,
12987 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12988 ovl.fmt.RXY.dl2,
12989 ovl.fmt.RXY.dh2); goto ok;
12990 }
12991
12992 switch (((ovl.value >> 16) & 0xff0f00000000ULL) >> 32) {
12993 case 0xc000ULL: s390_format_RIL_RP(s390_irgen_LARL, ovl.fmt.RIL.r1,
12994 ovl.fmt.RIL.i2); goto ok;
12995 case 0xc001ULL: s390_format_RIL_RI(s390_irgen_LGFI, ovl.fmt.RIL.r1,
12996 ovl.fmt.RIL.i2); goto ok;
12997 case 0xc004ULL: s390_format_RIL(s390_irgen_BRCL, ovl.fmt.RIL.r1,
12998 ovl.fmt.RIL.i2); goto ok;
12999 case 0xc005ULL: s390_format_RIL_RP(s390_irgen_BRASL, ovl.fmt.RIL.r1,
13000 ovl.fmt.RIL.i2); goto ok;
13001 case 0xc006ULL: s390_format_RIL_RU(s390_irgen_XIHF, ovl.fmt.RIL.r1,
13002 ovl.fmt.RIL.i2); goto ok;
13003 case 0xc007ULL: s390_format_RIL_RU(s390_irgen_XILF, ovl.fmt.RIL.r1,
13004 ovl.fmt.RIL.i2); goto ok;
13005 case 0xc008ULL: s390_format_RIL_RU(s390_irgen_IIHF, ovl.fmt.RIL.r1,
13006 ovl.fmt.RIL.i2); goto ok;
13007 case 0xc009ULL: s390_format_RIL_RU(s390_irgen_IILF, ovl.fmt.RIL.r1,
13008 ovl.fmt.RIL.i2); goto ok;
13009 case 0xc00aULL: s390_format_RIL_RU(s390_irgen_NIHF, ovl.fmt.RIL.r1,
13010 ovl.fmt.RIL.i2); goto ok;
13011 case 0xc00bULL: s390_format_RIL_RU(s390_irgen_NILF, ovl.fmt.RIL.r1,
13012 ovl.fmt.RIL.i2); goto ok;
13013 case 0xc00cULL: s390_format_RIL_RU(s390_irgen_OIHF, ovl.fmt.RIL.r1,
13014 ovl.fmt.RIL.i2); goto ok;
13015 case 0xc00dULL: s390_format_RIL_RU(s390_irgen_OILF, ovl.fmt.RIL.r1,
13016 ovl.fmt.RIL.i2); goto ok;
13017 case 0xc00eULL: s390_format_RIL_RU(s390_irgen_LLIHF, ovl.fmt.RIL.r1,
13018 ovl.fmt.RIL.i2); goto ok;
13019 case 0xc00fULL: s390_format_RIL_RU(s390_irgen_LLILF, ovl.fmt.RIL.r1,
13020 ovl.fmt.RIL.i2); goto ok;
13021 case 0xc200ULL: s390_format_RIL_RI(s390_irgen_MSGFI, ovl.fmt.RIL.r1,
13022 ovl.fmt.RIL.i2); goto ok;
13023 case 0xc201ULL: s390_format_RIL_RI(s390_irgen_MSFI, ovl.fmt.RIL.r1,
13024 ovl.fmt.RIL.i2); goto ok;
13025 case 0xc204ULL: s390_format_RIL_RU(s390_irgen_SLGFI, ovl.fmt.RIL.r1,
13026 ovl.fmt.RIL.i2); goto ok;
13027 case 0xc205ULL: s390_format_RIL_RU(s390_irgen_SLFI, ovl.fmt.RIL.r1,
13028 ovl.fmt.RIL.i2); goto ok;
13029 case 0xc208ULL: s390_format_RIL_RI(s390_irgen_AGFI, ovl.fmt.RIL.r1,
13030 ovl.fmt.RIL.i2); goto ok;
13031 case 0xc209ULL: s390_format_RIL_RI(s390_irgen_AFI, ovl.fmt.RIL.r1,
13032 ovl.fmt.RIL.i2); goto ok;
13033 case 0xc20aULL: s390_format_RIL_RU(s390_irgen_ALGFI, ovl.fmt.RIL.r1,
13034 ovl.fmt.RIL.i2); goto ok;
13035 case 0xc20bULL: s390_format_RIL_RU(s390_irgen_ALFI, ovl.fmt.RIL.r1,
13036 ovl.fmt.RIL.i2); goto ok;
13037 case 0xc20cULL: s390_format_RIL_RI(s390_irgen_CGFI, ovl.fmt.RIL.r1,
13038 ovl.fmt.RIL.i2); goto ok;
13039 case 0xc20dULL: s390_format_RIL_RI(s390_irgen_CFI, ovl.fmt.RIL.r1,
13040 ovl.fmt.RIL.i2); goto ok;
13041 case 0xc20eULL: s390_format_RIL_RU(s390_irgen_CLGFI, ovl.fmt.RIL.r1,
13042 ovl.fmt.RIL.i2); goto ok;
13043 case 0xc20fULL: s390_format_RIL_RU(s390_irgen_CLFI, ovl.fmt.RIL.r1,
13044 ovl.fmt.RIL.i2); goto ok;
13045 case 0xc402ULL: s390_format_RIL_RP(s390_irgen_LLHRL, ovl.fmt.RIL.r1,
13046 ovl.fmt.RIL.i2); goto ok;
13047 case 0xc404ULL: s390_format_RIL_RP(s390_irgen_LGHRL, ovl.fmt.RIL.r1,
13048 ovl.fmt.RIL.i2); goto ok;
13049 case 0xc405ULL: s390_format_RIL_RP(s390_irgen_LHRL, ovl.fmt.RIL.r1,
13050 ovl.fmt.RIL.i2); goto ok;
13051 case 0xc406ULL: s390_format_RIL_RP(s390_irgen_LLGHRL, ovl.fmt.RIL.r1,
13052 ovl.fmt.RIL.i2); goto ok;
13053 case 0xc407ULL: s390_format_RIL_RP(s390_irgen_STHRL, ovl.fmt.RIL.r1,
13054 ovl.fmt.RIL.i2); goto ok;
13055 case 0xc408ULL: s390_format_RIL_RP(s390_irgen_LGRL, ovl.fmt.RIL.r1,
13056 ovl.fmt.RIL.i2); goto ok;
13057 case 0xc40bULL: s390_format_RIL_RP(s390_irgen_STGRL, ovl.fmt.RIL.r1,
13058 ovl.fmt.RIL.i2); goto ok;
13059 case 0xc40cULL: s390_format_RIL_RP(s390_irgen_LGFRL, ovl.fmt.RIL.r1,
13060 ovl.fmt.RIL.i2); goto ok;
13061 case 0xc40dULL: s390_format_RIL_RP(s390_irgen_LRL, ovl.fmt.RIL.r1,
13062 ovl.fmt.RIL.i2); goto ok;
13063 case 0xc40eULL: s390_format_RIL_RP(s390_irgen_LLGFRL, ovl.fmt.RIL.r1,
13064 ovl.fmt.RIL.i2); goto ok;
13065 case 0xc40fULL: s390_format_RIL_RP(s390_irgen_STRL, ovl.fmt.RIL.r1,
13066 ovl.fmt.RIL.i2); goto ok;
13067 case 0xc600ULL: s390_format_RIL_RP(s390_irgen_EXRL, ovl.fmt.RIL.r1,
13068 ovl.fmt.RIL.i2); goto ok;
13069 case 0xc602ULL: s390_format_RIL_UP(s390_irgen_PFDRL, ovl.fmt.RIL.r1,
13070 ovl.fmt.RIL.i2); goto ok;
13071 case 0xc604ULL: s390_format_RIL_RP(s390_irgen_CGHRL, ovl.fmt.RIL.r1,
13072 ovl.fmt.RIL.i2); goto ok;
13073 case 0xc605ULL: s390_format_RIL_RP(s390_irgen_CHRL, ovl.fmt.RIL.r1,
13074 ovl.fmt.RIL.i2); goto ok;
13075 case 0xc606ULL: s390_format_RIL_RP(s390_irgen_CLGHRL, ovl.fmt.RIL.r1,
13076 ovl.fmt.RIL.i2); goto ok;
13077 case 0xc607ULL: s390_format_RIL_RP(s390_irgen_CLHRL, ovl.fmt.RIL.r1,
13078 ovl.fmt.RIL.i2); goto ok;
13079 case 0xc608ULL: s390_format_RIL_RP(s390_irgen_CGRL, ovl.fmt.RIL.r1,
13080 ovl.fmt.RIL.i2); goto ok;
13081 case 0xc60aULL: s390_format_RIL_RP(s390_irgen_CLGRL, ovl.fmt.RIL.r1,
13082 ovl.fmt.RIL.i2); goto ok;
13083 case 0xc60cULL: s390_format_RIL_RP(s390_irgen_CGFRL, ovl.fmt.RIL.r1,
13084 ovl.fmt.RIL.i2); goto ok;
13085 case 0xc60dULL: s390_format_RIL_RP(s390_irgen_CRL, ovl.fmt.RIL.r1,
13086 ovl.fmt.RIL.i2); goto ok;
13087 case 0xc60eULL: s390_format_RIL_RP(s390_irgen_CLGFRL, ovl.fmt.RIL.r1,
13088 ovl.fmt.RIL.i2); goto ok;
13089 case 0xc60fULL: s390_format_RIL_RP(s390_irgen_CLRL, ovl.fmt.RIL.r1,
13090 ovl.fmt.RIL.i2); goto ok;
13091 case 0xc800ULL: /* MVCOS */ goto unimplemented;
13092 case 0xc801ULL: /* ECTG */ goto unimplemented;
13093 case 0xc802ULL: /* CSST */ goto unimplemented;
13094 case 0xc804ULL: /* LPD */ goto unimplemented;
13095 case 0xc805ULL: /* LPDG */ goto unimplemented;
13096 case 0xcc06ULL: /* BRCTH */ goto unimplemented;
13097 case 0xcc08ULL: s390_format_RIL_RI(s390_irgen_AIH, ovl.fmt.RIL.r1,
13098 ovl.fmt.RIL.i2); goto ok;
13099 case 0xcc0aULL: s390_format_RIL_RI(s390_irgen_ALSIH, ovl.fmt.RIL.r1,
13100 ovl.fmt.RIL.i2); goto ok;
13101 case 0xcc0bULL: s390_format_RIL_RI(s390_irgen_ALSIHN, ovl.fmt.RIL.r1,
13102 ovl.fmt.RIL.i2); goto ok;
13103 case 0xcc0dULL: s390_format_RIL_RI(s390_irgen_CIH, ovl.fmt.RIL.r1,
13104 ovl.fmt.RIL.i2); goto ok;
13105 case 0xcc0fULL: s390_format_RIL_RU(s390_irgen_CLIH, ovl.fmt.RIL.r1,
13106 ovl.fmt.RIL.i2); goto ok;
13107 }
13108
13109 switch (((ovl.value >> 16) & 0xff0000000000ULL) >> 40) {
13110 case 0xd0ULL: /* TRTR */ goto unimplemented;
13111 case 0xd1ULL: /* MVN */ goto unimplemented;
13112 case 0xd2ULL: s390_format_SS_L0RDRD(s390_irgen_MVC, ovl.fmt.SS.l,
13113 ovl.fmt.SS.b1, ovl.fmt.SS.d1,
13114 ovl.fmt.SS.b2, ovl.fmt.SS.d2); goto ok;
13115 case 0xd3ULL: /* MVZ */ goto unimplemented;
13116 case 0xd4ULL: s390_format_SS_L0RDRD(s390_irgen_NC, ovl.fmt.SS.l,
13117 ovl.fmt.SS.b1, ovl.fmt.SS.d1,
13118 ovl.fmt.SS.b2, ovl.fmt.SS.d2); goto ok;
13119 case 0xd5ULL: s390_format_SS_L0RDRD(s390_irgen_CLC, ovl.fmt.SS.l,
13120 ovl.fmt.SS.b1, ovl.fmt.SS.d1,
13121 ovl.fmt.SS.b2, ovl.fmt.SS.d2); goto ok;
13122 case 0xd6ULL: s390_format_SS_L0RDRD(s390_irgen_OC, ovl.fmt.SS.l,
13123 ovl.fmt.SS.b1, ovl.fmt.SS.d1,
13124 ovl.fmt.SS.b2, ovl.fmt.SS.d2); goto ok;
sewardjb63967e2011-03-24 08:50:04 +000013125 case 0xd7ULL:
13126 if (ovl.fmt.SS.b1 == ovl.fmt.SS.b2 && ovl.fmt.SS.d1 == ovl.fmt.SS.d2)
13127 s390_irgen_XC_sameloc(ovl.fmt.SS.l, ovl.fmt.SS.b1, ovl.fmt.SS.d1);
13128 else
13129 s390_format_SS_L0RDRD(s390_irgen_XC, ovl.fmt.SS.l,
13130 ovl.fmt.SS.b1, ovl.fmt.SS.d1,
13131 ovl.fmt.SS.b2, ovl.fmt.SS.d2);
13132 goto ok;
sewardj2019a972011-03-07 16:04:07 +000013133 case 0xd9ULL: /* MVCK */ goto unimplemented;
13134 case 0xdaULL: /* MVCP */ goto unimplemented;
13135 case 0xdbULL: /* MVCS */ goto unimplemented;
13136 case 0xdcULL: /* TR */ goto unimplemented;
13137 case 0xddULL: /* TRT */ goto unimplemented;
13138 case 0xdeULL: /* ED */ goto unimplemented;
13139 case 0xdfULL: /* EDMK */ goto unimplemented;
13140 case 0xe1ULL: /* PKU */ goto unimplemented;
13141 case 0xe2ULL: /* UNPKU */ goto unimplemented;
13142 case 0xe8ULL: /* MVCIN */ goto unimplemented;
13143 case 0xe9ULL: /* PKA */ goto unimplemented;
13144 case 0xeaULL: /* UNPKA */ goto unimplemented;
13145 case 0xeeULL: /* PLO */ goto unimplemented;
13146 case 0xefULL: /* LMD */ goto unimplemented;
13147 case 0xf0ULL: /* SRP */ goto unimplemented;
13148 case 0xf1ULL: /* MVO */ goto unimplemented;
13149 case 0xf2ULL: /* PACK */ goto unimplemented;
13150 case 0xf3ULL: /* UNPK */ goto unimplemented;
13151 case 0xf8ULL: /* ZAP */ goto unimplemented;
13152 case 0xf9ULL: /* CP */ goto unimplemented;
13153 case 0xfaULL: /* AP */ goto unimplemented;
13154 case 0xfbULL: /* SP */ goto unimplemented;
13155 case 0xfcULL: /* MP */ goto unimplemented;
13156 case 0xfdULL: /* DP */ goto unimplemented;
13157 }
13158
13159 switch (((ovl.value >> 16) & 0xffff00000000ULL) >> 32) {
13160 case 0xe500ULL: /* LASP */ goto unimplemented;
13161 case 0xe501ULL: /* TPROT */ goto unimplemented;
13162 case 0xe502ULL: /* STRAG */ goto unimplemented;
13163 case 0xe50eULL: /* MVCSK */ goto unimplemented;
13164 case 0xe50fULL: /* MVCDK */ goto unimplemented;
13165 case 0xe544ULL: s390_format_SIL_RDI(s390_irgen_MVHHI, ovl.fmt.SIL.b1,
13166 ovl.fmt.SIL.d1, ovl.fmt.SIL.i2);
13167 goto ok;
13168 case 0xe548ULL: s390_format_SIL_RDI(s390_irgen_MVGHI, ovl.fmt.SIL.b1,
13169 ovl.fmt.SIL.d1, ovl.fmt.SIL.i2);
13170 goto ok;
13171 case 0xe54cULL: s390_format_SIL_RDI(s390_irgen_MVHI, ovl.fmt.SIL.b1,
13172 ovl.fmt.SIL.d1, ovl.fmt.SIL.i2);
13173 goto ok;
13174 case 0xe554ULL: s390_format_SIL_RDI(s390_irgen_CHHSI, ovl.fmt.SIL.b1,
13175 ovl.fmt.SIL.d1, ovl.fmt.SIL.i2);
13176 goto ok;
13177 case 0xe555ULL: s390_format_SIL_RDU(s390_irgen_CLHHSI, ovl.fmt.SIL.b1,
13178 ovl.fmt.SIL.d1, ovl.fmt.SIL.i2);
13179 goto ok;
13180 case 0xe558ULL: s390_format_SIL_RDI(s390_irgen_CGHSI, ovl.fmt.SIL.b1,
13181 ovl.fmt.SIL.d1, ovl.fmt.SIL.i2);
13182 goto ok;
13183 case 0xe559ULL: s390_format_SIL_RDU(s390_irgen_CLGHSI, ovl.fmt.SIL.b1,
13184 ovl.fmt.SIL.d1, ovl.fmt.SIL.i2);
13185 goto ok;
13186 case 0xe55cULL: s390_format_SIL_RDI(s390_irgen_CHSI, ovl.fmt.SIL.b1,
13187 ovl.fmt.SIL.d1, ovl.fmt.SIL.i2);
13188 goto ok;
13189 case 0xe55dULL: s390_format_SIL_RDU(s390_irgen_CLFHSI, ovl.fmt.SIL.b1,
13190 ovl.fmt.SIL.d1, ovl.fmt.SIL.i2);
13191 goto ok;
13192 }
13193
13194 return S390_DECODE_UNKNOWN_INSN;
13195
13196ok:
13197 return S390_DECODE_OK;
13198
13199unimplemented:
13200 return S390_DECODE_UNIMPLEMENTED_INSN;
13201}
13202
13203/* Handle "special" instructions. */
13204static s390_decode_t
13205s390_decode_special_and_irgen(UChar *bytes)
13206{
13207 s390_decode_t status = S390_DECODE_OK;
13208
13209 /* Got a "Special" instruction preamble. Which one is it? */
13210 if (bytes[0] == 0x18 && bytes[1] == 0x22 /* lr %r2, %r2 */) {
13211 s390_irgen_client_request();
13212 } else if (bytes[0] == 0x18 && bytes[1] == 0x33 /* lr %r3, %r3 */) {
13213 s390_irgen_guest_NRADDR();
13214 } else if (bytes[0] == 0x18 && bytes[1] == 0x44 /* lr %r4, %r4 */) {
13215 s390_irgen_call_noredir();
13216 } else {
13217 /* We don't know what it is. */
13218 return S390_DECODE_UNKNOWN_SPECIAL_INSN;
13219 }
13220
13221 dis_res->len = S390_SPECIAL_OP_PREAMBLE_SIZE + S390_SPECIAL_OP_SIZE;
13222
13223 return status;
13224}
13225
13226
13227/* Function returns # bytes that were decoded or 0 in case of failure */
florianb4df7682011-07-05 02:09:01 +000013228static UInt
sewardj2019a972011-03-07 16:04:07 +000013229s390_decode_and_irgen(UChar *bytes, UInt insn_length, DisResult *dres)
13230{
13231 s390_decode_t status;
13232
13233 dis_res = dres;
13234
13235 /* Spot the 8-byte preamble: 18ff lr r15,r15
13236 1811 lr r1,r1
13237 1822 lr r2,r2
13238 1833 lr r3,r3 */
13239 if (bytes[ 0] == 0x18 && bytes[ 1] == 0xff && bytes[ 2] == 0x18 &&
13240 bytes[ 3] == 0x11 && bytes[ 4] == 0x18 && bytes[ 5] == 0x22 &&
13241 bytes[ 6] == 0x18 && bytes[ 7] == 0x33) {
13242
13243 /* Handle special instruction that follows that preamble. */
13244 if (0) vex_printf("special function handling...\n");
florian2c8ed942011-08-01 22:07:51 +000013245
13246 insn_length = S390_SPECIAL_OP_PREAMBLE_SIZE + S390_SPECIAL_OP_SIZE;
13247 guest_IA_next_instr = guest_IA_curr_instr + insn_length;
13248
13249 status =
13250 s390_decode_special_and_irgen(bytes + S390_SPECIAL_OP_PREAMBLE_SIZE);
sewardj2019a972011-03-07 16:04:07 +000013251 } else {
13252 /* Handle normal instructions. */
13253 switch (insn_length) {
13254 case 2:
13255 status = s390_decode_2byte_and_irgen(bytes);
13256 break;
13257
13258 case 4:
13259 status = s390_decode_4byte_and_irgen(bytes);
13260 break;
13261
13262 case 6:
13263 status = s390_decode_6byte_and_irgen(bytes);
13264 break;
13265
13266 default:
13267 status = S390_DECODE_ERROR;
13268 break;
13269 }
13270 }
florian5fcbba22011-07-27 20:40:22 +000013271 /* If next instruction is execute, stop here */
florianed0b9532011-10-20 21:15:55 +000013272 if (irsb->next == NULL && dis_res->whatNext == Dis_Continue
13273 && bytes[insn_length] == 0x44) {
sewardj2019a972011-03-07 16:04:07 +000013274 irsb->next = IRExpr_Const(IRConst_U64(guest_IA_next_instr));
13275 dis_res->whatNext = Dis_StopHere;
florianb0c1ed82011-07-30 20:09:28 +000013276 dis_res->continueAt = 0;
sewardj2019a972011-03-07 16:04:07 +000013277 }
13278
13279 if (status == S390_DECODE_OK) return insn_length; /* OK */
13280
13281 /* Decoding failed somehow */
13282 vex_printf("vex s390->IR: ");
13283 switch (status) {
13284 case S390_DECODE_UNKNOWN_INSN:
13285 vex_printf("unknown insn: ");
13286 break;
13287
13288 case S390_DECODE_UNIMPLEMENTED_INSN:
13289 vex_printf("unimplemented insn: ");
13290 break;
13291
13292 case S390_DECODE_UNKNOWN_SPECIAL_INSN:
13293 vex_printf("unimplemented special insn: ");
13294 break;
13295
13296 default:
13297 case S390_DECODE_ERROR:
13298 vex_printf("decoding error: ");
13299 break;
13300 }
13301
13302 vex_printf("%02x%02x", bytes[0], bytes[1]);
13303 if (insn_length > 2) {
13304 vex_printf(" %02x%02x", bytes[2], bytes[3]);
13305 }
13306 if (insn_length > 4) {
13307 vex_printf(" %02x%02x", bytes[4], bytes[5]);
13308 }
13309 vex_printf("\n");
13310
13311 return 0; /* Failed */
13312}
13313
13314
13315/* Generate an IRExpr for an address. */
13316static __inline__ IRExpr *
13317mkaddr_expr(Addr64 addr)
13318{
13319 return IRExpr_Const(IRConst_U64(addr));
13320}
13321
13322
13323/* Disassemble a single instruction INSN into IR. */
13324static DisResult
florian420c5012011-07-22 02:12:28 +000013325disInstr_S390_WRK(UChar *insn)
sewardj2019a972011-03-07 16:04:07 +000013326{
13327 UChar byte;
13328 UInt insn_length;
13329 DisResult dres;
13330
13331 /* ---------------------------------------------------- */
13332 /* --- Compute instruction length -- */
13333 /* ---------------------------------------------------- */
13334
13335 /* Get the first byte of the insn. */
13336 byte = insn[0];
13337
13338 /* The leftmost two bits (0:1) encode the length of the insn in bytes.
13339 00 -> 2 bytes, 01 -> 4 bytes, 10 -> 4 bytes, 11 -> 6 bytes. */
13340 insn_length = ((((byte >> 6) + 1) >> 1) + 1) << 1;
13341
13342 guest_IA_next_instr = guest_IA_curr_instr + insn_length;
13343
13344 /* ---------------------------------------------------- */
13345 /* --- Initialise the DisResult data -- */
13346 /* ---------------------------------------------------- */
13347 dres.whatNext = Dis_Continue;
13348 dres.len = insn_length;
13349 dres.continueAt = 0;
13350
floriana99f20e2011-07-17 14:16:41 +000013351 /* fixs390: consider chasing of conditional jumps */
13352
sewardj2019a972011-03-07 16:04:07 +000013353 /* Normal and special instruction handling starts here. */
13354 if (s390_decode_and_irgen(insn, insn_length, &dres) == 0) {
13355 /* All decode failures end up here. The decoder has already issued an
13356 error message.
13357 Tell the dispatcher that this insn cannot be decoded, and so has
13358 not been executed, and (is currently) the next to be executed.
13359 IA should be up-to-date since it made so at the start of each
13360 insn, but nevertheless be paranoid and update it again right
13361 now. */
floriane88b3c92011-07-05 02:48:39 +000013362 addStmtToIRSB(irsb, IRStmt_Put(S390X_GUEST_OFFSET(guest_IA),
sewardj2019a972011-03-07 16:04:07 +000013363 mkaddr_expr(guest_IA_curr_instr)));
13364
sewardj15469da2011-04-13 15:10:16 +000013365 irsb->next = mkaddr_expr(guest_IA_next_instr);
sewardj2019a972011-03-07 16:04:07 +000013366 irsb->jumpkind = Ijk_NoDecode;
13367 dres.whatNext = Dis_StopHere;
13368 dres.len = 0;
sewardj2019a972011-03-07 16:04:07 +000013369 }
13370
13371 return dres;
13372}
13373
13374
13375/*------------------------------------------------------------*/
13376/*--- Top-level fn ---*/
13377/*------------------------------------------------------------*/
13378
13379/* Disassemble a single instruction into IR. The instruction
13380 is located in host memory at &guest_code[delta]. */
13381
13382DisResult
13383disInstr_S390(IRSB *irsb_IN,
13384 Bool put_IP,
13385 Bool (*resteerOkFn)(void *, Addr64),
13386 Bool resteerCisOk,
13387 void *callback_opaque,
13388 UChar *guest_code,
13389 Long delta,
13390 Addr64 guest_IP,
13391 VexArch guest_arch,
13392 VexArchInfo *archinfo,
13393 VexAbiInfo *abiinfo,
13394 Bool host_bigendian)
13395{
13396 vassert(guest_arch == VexArchS390X);
13397
13398 /* The instruction decoder requires a big-endian machine. */
13399 vassert(host_bigendian == True);
13400
13401 /* Set globals (see top of this file) */
13402 guest_IA_curr_instr = guest_IP;
sewardj2019a972011-03-07 16:04:07 +000013403 irsb = irsb_IN;
florian420c5012011-07-22 02:12:28 +000013404 resteer_fn = resteerOkFn;
13405 resteer_data = callback_opaque;
sewardj2019a972011-03-07 16:04:07 +000013406
13407 /* We may be asked to update the guest IA before going further. */
13408 if (put_IP)
floriane88b3c92011-07-05 02:48:39 +000013409 addStmtToIRSB(irsb, IRStmt_Put(S390X_GUEST_OFFSET(guest_IA),
sewardj2019a972011-03-07 16:04:07 +000013410 mkaddr_expr(guest_IA_curr_instr)));
13411
florian420c5012011-07-22 02:12:28 +000013412 return disInstr_S390_WRK(guest_code + delta);
sewardj2019a972011-03-07 16:04:07 +000013413}
13414
13415/*---------------------------------------------------------------*/
13416/*--- end guest_s390_toIR.c ---*/
13417/*---------------------------------------------------------------*/