blob: 65aaa9b84a30d5e12fff6857cbeacbf5f5219607 [file] [log] [blame]
Aditya Bavanari44eb8952018-05-09 19:01:50 +05301/*
2 * Copyright (c) 2018, The Linux Foundation. All rights reserved.
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 and
6 * only version 2 as published by the Free Software Foundation.
7 *
8 * This program is distributed in the hope that it will be useful,
9 * but WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 * GNU General Public License for more details.
12 */
13
14#include <linux/clk.h>
15#include <linux/delay.h>
16#include <linux/gpio.h>
17#include <linux/of_gpio.h>
18#include <linux/platform_device.h>
19#include <linux/slab.h>
20#include <linux/io.h>
21#include <linux/module.h>
22#include <linux/input.h>
23#include <linux/of_device.h>
24#include <linux/pm_qos.h>
Vatsal Bucha6cb17a02018-08-07 11:07:04 +053025#include <linux/soc/qcom/fsa4480-i2c.h>
Aditya Bavanari44eb8952018-05-09 19:01:50 +053026#include <sound/core.h>
27#include <sound/soc.h>
28#include <sound/soc-dapm.h>
29#include <sound/pcm.h>
30#include <sound/pcm_params.h>
31#include <sound/info.h>
Vaishnavi Kommaraju9a3d5eb2018-09-19 18:16:39 +053032#include <soc/snd_event.h>
Aditya Bavanari3e19f3c2018-11-12 19:29:50 +053033#include <soc/qcom/socinfo.h>
Aditya Bavanari44eb8952018-05-09 19:01:50 +053034#include <dsp/q6afe-v2.h>
35#include <dsp/q6core.h>
36#include "device_event.h"
37#include "msm-pcm-routing-v2.h"
38#include "codecs/msm-cdc-pinctrl.h"
39#include "codecs/wcd934x/wcd934x.h"
40#include "codecs/wcd934x/wcd934x-mbhc.h"
Ramprasad Katkam997da402018-08-17 20:20:06 +053041#include "codecs/wcd937x/wcd937x-mbhc.h"
Aditya Bavanari44eb8952018-05-09 19:01:50 +053042#include "codecs/wsa881x.h"
43#include "codecs/bolero/bolero-cdc.h"
44#include <dt-bindings/sound/audio-codec-port-types.h>
Aditya Bavanari0b26ab32018-08-03 23:53:01 +053045#include "codecs/bolero/wsa-macro.h"
Laxminath Kasam838f0b82018-10-23 20:20:18 +053046#include "codecs/wcd937x/wcd937x.h"
Aditya Bavanari44eb8952018-05-09 19:01:50 +053047
48#define DRV_NAME "sm6150-asoc-snd"
49
50#define __CHIPSET__ "SM6150 "
51#define MSM_DAILINK_NAME(name) (__CHIPSET__#name)
52
53#define SAMPLING_RATE_8KHZ 8000
54#define SAMPLING_RATE_11P025KHZ 11025
55#define SAMPLING_RATE_16KHZ 16000
56#define SAMPLING_RATE_22P05KHZ 22050
57#define SAMPLING_RATE_32KHZ 32000
58#define SAMPLING_RATE_44P1KHZ 44100
59#define SAMPLING_RATE_48KHZ 48000
60#define SAMPLING_RATE_88P2KHZ 88200
61#define SAMPLING_RATE_96KHZ 96000
62#define SAMPLING_RATE_176P4KHZ 176400
63#define SAMPLING_RATE_192KHZ 192000
64#define SAMPLING_RATE_352P8KHZ 352800
65#define SAMPLING_RATE_384KHZ 384000
66
67#define WCD9XXX_MBHC_DEF_BUTTONS 8
68#define WCD9XXX_MBHC_DEF_RLOADS 5
69#define CODEC_EXT_CLK_RATE 9600000
70#define ADSP_STATE_READY_TIMEOUT_MS 3000
71#define DEV_NAME_STR_LEN 32
72
73#define WSA8810_NAME_1 "wsa881x.20170211"
74#define WSA8810_NAME_2 "wsa881x.20170212"
75#define WCN_CDC_SLIM_RX_CH_MAX 2
76#define WCN_CDC_SLIM_TX_CH_MAX 3
77#define TDM_CHANNEL_MAX 8
78
79#define ADSP_STATE_READY_TIMEOUT_MS 3000
80#define MSM_LL_QOS_VALUE 300 /* time in us to ensure LPM doesn't go in C3/C4 */
81#define MSM_HIFI_ON 1
82
Aditya Bavanari3e19f3c2018-11-12 19:29:50 +053083#define SM6150_SOC_VERSION_1_0 0x00010000
84#define SM6150_SOC_MSM_ID 0x163
85
Aditya Bavanari44eb8952018-05-09 19:01:50 +053086enum {
87 SLIM_RX_0 = 0,
88 SLIM_RX_1,
89 SLIM_RX_2,
90 SLIM_RX_3,
91 SLIM_RX_4,
92 SLIM_RX_5,
93 SLIM_RX_6,
94 SLIM_RX_7,
95 SLIM_RX_MAX,
96};
97enum {
98 SLIM_TX_0 = 0,
99 SLIM_TX_1,
100 SLIM_TX_2,
101 SLIM_TX_3,
102 SLIM_TX_4,
103 SLIM_TX_5,
104 SLIM_TX_6,
105 SLIM_TX_7,
106 SLIM_TX_8,
107 SLIM_TX_MAX,
108};
109
110enum {
111 PRIM_MI2S = 0,
112 SEC_MI2S,
113 TERT_MI2S,
114 QUAT_MI2S,
115 QUIN_MI2S,
116 MI2S_MAX,
117};
118
119enum {
120 PRIM_AUX_PCM = 0,
121 SEC_AUX_PCM,
122 TERT_AUX_PCM,
123 QUAT_AUX_PCM,
124 QUIN_AUX_PCM,
125 AUX_PCM_MAX,
126};
127
128enum {
129 WSA_CDC_DMA_RX_0 = 0,
130 WSA_CDC_DMA_RX_1,
131 RX_CDC_DMA_RX_0,
132 RX_CDC_DMA_RX_1,
133 RX_CDC_DMA_RX_2,
134 RX_CDC_DMA_RX_3,
135 RX_CDC_DMA_RX_5,
136 CDC_DMA_RX_MAX,
137};
138
139enum {
140 WSA_CDC_DMA_TX_0 = 0,
141 WSA_CDC_DMA_TX_1,
142 WSA_CDC_DMA_TX_2,
143 TX_CDC_DMA_TX_0,
144 TX_CDC_DMA_TX_3,
145 TX_CDC_DMA_TX_4,
146 CDC_DMA_TX_MAX,
147};
148
149struct mi2s_conf {
150 struct mutex lock;
151 u32 ref_cnt;
152 u32 msm_is_mi2s_master;
153};
154
155static u32 mi2s_ebit_clk[MI2S_MAX] = {
156 Q6AFE_LPASS_CLK_ID_PRI_MI2S_EBIT,
157 Q6AFE_LPASS_CLK_ID_SEC_MI2S_EBIT,
158 Q6AFE_LPASS_CLK_ID_TER_MI2S_EBIT,
159 Q6AFE_LPASS_CLK_ID_QUAD_MI2S_EBIT,
160 Q6AFE_LPASS_CLK_ID_QUI_MI2S_EBIT
161};
162
163struct dev_config {
164 u32 sample_rate;
165 u32 bit_format;
166 u32 channels;
167};
168
169enum {
170 DP_RX_IDX = 0,
171 EXT_DISP_RX_IDX_MAX,
172};
173
174struct msm_wsa881x_dev_info {
175 struct device_node *of_node;
176 u32 index;
177};
178
179struct aux_codec_dev_info {
180 struct device_node *of_node;
181 u32 index;
182};
183
184enum pinctrl_pin_state {
185 STATE_DISABLE = 0, /* All pins are in sleep state */
186 STATE_MI2S_ACTIVE, /* I2S = active, TDM = sleep */
187 STATE_TDM_ACTIVE, /* I2S = sleep, TDM = active */
188};
189
190struct msm_pinctrl_info {
191 struct pinctrl *pinctrl;
192 struct pinctrl_state *mi2s_disable;
193 struct pinctrl_state *tdm_disable;
194 struct pinctrl_state *mi2s_active;
195 struct pinctrl_state *tdm_active;
196 enum pinctrl_pin_state curr_state;
197};
198
199struct msm_asoc_mach_data {
200 struct snd_info_entry *codec_root;
201 struct msm_pinctrl_info pinctrl_info;
202 int usbc_en2_gpio; /* used by gpio driver API */
203 struct device_node *dmic01_gpio_p; /* used by pinctrl API */
204 struct device_node *dmic23_gpio_p; /* used by pinctrl API */
205 struct device_node *us_euro_gpio_p; /* used by pinctrl API */
206 struct pinctrl *usbc_en2_gpio_p; /* used by pinctrl API */
207 struct device_node *hph_en1_gpio_p; /* used by pinctrl API */
208 struct device_node *hph_en0_gpio_p; /* used by pinctrl API */
Vaishnavi Kommaraju9a3d5eb2018-09-19 18:16:39 +0530209 bool is_afe_config_done;
Vatsal Bucha6cb17a02018-08-07 11:07:04 +0530210 struct device_node *fsa_handle;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530211};
212
213struct msm_asoc_wcd93xx_codec {
214 void* (*get_afe_config_fn)(struct snd_soc_codec *codec,
215 enum afe_config_type config_type);
216};
217
218static const char *const pin_states[] = {"sleep", "i2s-active",
219 "tdm-active"};
220
221static struct snd_soc_card snd_soc_card_sm6150_msm;
222
223enum {
224 TDM_0 = 0,
225 TDM_1,
226 TDM_2,
227 TDM_3,
228 TDM_4,
229 TDM_5,
230 TDM_6,
231 TDM_7,
232 TDM_PORT_MAX,
233};
234
235enum {
236 TDM_PRI = 0,
237 TDM_SEC,
238 TDM_TERT,
239 TDM_QUAT,
240 TDM_QUIN,
241 TDM_INTERFACE_MAX,
242};
243
244struct tdm_port {
245 u32 mode;
246 u32 channel;
247};
248
249/* TDM default config */
250static struct dev_config tdm_rx_cfg[TDM_INTERFACE_MAX][TDM_PORT_MAX] = {
251 { /* PRI TDM */
252 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
253 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
254 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
255 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
256 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
257 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
258 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
259 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
260 },
261 { /* SEC TDM */
262 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
263 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
264 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
265 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
266 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
267 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
268 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
269 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
270 },
271 { /* TERT TDM */
272 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
273 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
274 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
275 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
276 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
277 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
278 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
279 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
280 },
281 { /* QUAT TDM */
282 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
283 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
284 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
285 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
286 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
287 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
288 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
289 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
290 },
291 { /* QUIN TDM */
292 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
293 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
294 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
295 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
296 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
297 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
298 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
299 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
300 }
301
302};
303
304/* TDM default config */
305static struct dev_config tdm_tx_cfg[TDM_INTERFACE_MAX][TDM_PORT_MAX] = {
306 { /* PRI TDM */
307 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
308 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
309 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
310 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
311 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
312 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
313 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
314 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
315 },
316 { /* SEC TDM */
317 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
318 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
319 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
320 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
321 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
322 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
323 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
324 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
325 },
326 { /* TERT TDM */
327 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
328 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
329 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
330 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
331 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
332 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
333 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
334 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
335 },
336 { /* QUAT TDM */
337 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
338 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
339 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
340 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
341 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
342 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
343 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
344 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
345 },
346 { /* QUIN TDM */
347 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
348 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
349 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
350 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
351 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
352 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
353 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
354 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
355 }
356};
357
358
359/* Default configuration of slimbus channels */
360static struct dev_config slim_rx_cfg[] = {
361 [SLIM_RX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
362 [SLIM_RX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
363 [SLIM_RX_2] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
364 [SLIM_RX_3] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
365 [SLIM_RX_4] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
366 [SLIM_RX_5] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
367 [SLIM_RX_6] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
368 [SLIM_RX_7] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
369};
370
371static struct dev_config slim_tx_cfg[] = {
372 [SLIM_TX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
373 [SLIM_TX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
374 [SLIM_TX_2] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
375 [SLIM_TX_3] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
376 [SLIM_TX_4] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
377 [SLIM_TX_5] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
378 [SLIM_TX_6] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
379 [SLIM_TX_7] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
380 [SLIM_TX_8] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
381};
382
383/* Default configuration of Codec DMA Interface Tx */
384static struct dev_config cdc_dma_rx_cfg[] = {
385 [WSA_CDC_DMA_RX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
386 [WSA_CDC_DMA_RX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
387 [RX_CDC_DMA_RX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
388 [RX_CDC_DMA_RX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
389 [RX_CDC_DMA_RX_2] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
390 [RX_CDC_DMA_RX_3] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
391 [RX_CDC_DMA_RX_5] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
392};
393
394/* Default configuration of Codec DMA Interface Rx */
395static struct dev_config cdc_dma_tx_cfg[] = {
396 [WSA_CDC_DMA_TX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
397 [WSA_CDC_DMA_TX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
398 [WSA_CDC_DMA_TX_2] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
399 [TX_CDC_DMA_TX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
400 [TX_CDC_DMA_TX_3] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
401 [TX_CDC_DMA_TX_4] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
402};
403
404/* Default configuration of external display BE */
405static struct dev_config ext_disp_rx_cfg[] = {
406 [DP_RX_IDX] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
407};
408
409static struct dev_config usb_rx_cfg = {
410 .sample_rate = SAMPLING_RATE_48KHZ,
411 .bit_format = SNDRV_PCM_FORMAT_S16_LE,
412 .channels = 2,
413};
414
415static struct dev_config usb_tx_cfg = {
416 .sample_rate = SAMPLING_RATE_48KHZ,
417 .bit_format = SNDRV_PCM_FORMAT_S16_LE,
418 .channels = 1,
419};
420
421static struct dev_config proxy_rx_cfg = {
422 .sample_rate = SAMPLING_RATE_48KHZ,
423 .bit_format = SNDRV_PCM_FORMAT_S16_LE,
424 .channels = 2,
425};
426
427/* Default configuration of MI2S channels */
428static struct dev_config mi2s_rx_cfg[] = {
429 [PRIM_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
430 [SEC_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
431 [TERT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
432 [QUAT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
433 [QUIN_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
434};
435
436static struct dev_config mi2s_tx_cfg[] = {
437 [PRIM_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
438 [SEC_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
439 [TERT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
440 [QUAT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
441 [QUIN_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
442};
443
444static struct dev_config aux_pcm_rx_cfg[] = {
445 [PRIM_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
446 [SEC_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
447 [TERT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
448 [QUAT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
449 [QUIN_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
450};
451
452static struct dev_config aux_pcm_tx_cfg[] = {
453 [PRIM_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
454 [SEC_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
455 [TERT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
456 [QUAT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
457 [QUIN_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
458};
459static int msm_vi_feed_tx_ch = 2;
460static const char *const slim_rx_ch_text[] = {"One", "Two"};
461static const char *const slim_tx_ch_text[] = {"One", "Two", "Three", "Four",
462 "Five", "Six", "Seven",
463 "Eight"};
464static const char *const vi_feed_ch_text[] = {"One", "Two"};
465static char const *bit_format_text[] = {"S16_LE", "S24_LE", "S24_3LE",
466 "S32_LE"};
467static char const *ext_disp_bit_format_text[] = {"S16_LE", "S24_LE",
468 "S24_3LE"};
469static char const *slim_sample_rate_text[] = {"KHZ_8", "KHZ_16",
470 "KHZ_32", "KHZ_44P1", "KHZ_48",
471 "KHZ_88P2", "KHZ_96", "KHZ_176P4",
472 "KHZ_192", "KHZ_352P8", "KHZ_384"};
473static char const *bt_sample_rate_text[] = {"KHZ_8", "KHZ_16",
474 "KHZ_44P1", "KHZ_48",
475 "KHZ_88P2", "KHZ_96"};
Sharad Sangle493a1b32018-09-19 15:52:15 +0530476static char const *bt_sample_rate_rx_text[] = {"KHZ_8", "KHZ_16",
477 "KHZ_44P1", "KHZ_48",
478 "KHZ_88P2", "KHZ_96"};
479static char const *bt_sample_rate_tx_text[] = {"KHZ_8", "KHZ_16",
480 "KHZ_44P1", "KHZ_48",
481 "KHZ_88P2", "KHZ_96"};
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530482static const char *const usb_ch_text[] = {"One", "Two", "Three", "Four",
483 "Five", "Six", "Seven",
484 "Eight"};
485static char const *ch_text[] = {"Two", "Three", "Four", "Five",
486 "Six", "Seven", "Eight"};
487static char const *usb_sample_rate_text[] = {"KHZ_8", "KHZ_11P025",
488 "KHZ_16", "KHZ_22P05",
489 "KHZ_32", "KHZ_44P1", "KHZ_48",
490 "KHZ_88P2", "KHZ_96", "KHZ_176P4",
491 "KHZ_192", "KHZ_352P8", "KHZ_384"};
492static char const *ext_disp_sample_rate_text[] = {"KHZ_48", "KHZ_96",
493 "KHZ_192", "KHZ_32", "KHZ_44P1",
494 "KHZ_88P2", "KHZ_176P4" };
495static char const *tdm_ch_text[] = {"One", "Two", "Three", "Four",
496 "Five", "Six", "Seven", "Eight"};
497static char const *tdm_bit_format_text[] = {"S16_LE", "S24_LE", "S32_LE"};
498static char const *tdm_sample_rate_text[] = {"KHZ_8", "KHZ_16", "KHZ_32",
499 "KHZ_48", "KHZ_176P4",
500 "KHZ_352P8"};
501static const char *const auxpcm_rate_text[] = {"KHZ_8", "KHZ_16"};
502static char const *mi2s_rate_text[] = {"KHZ_8", "KHZ_11P025", "KHZ_16",
503 "KHZ_22P05", "KHZ_32", "KHZ_44P1",
504 "KHZ_48", "KHZ_96", "KHZ_192"};
505static const char *const mi2s_ch_text[] = {"One", "Two", "Three", "Four",
506 "Five", "Six", "Seven",
507 "Eight"};
508static const char *const hifi_text[] = {"Off", "On"};
509static const char *const qos_text[] = {"Disable", "Enable"};
510
511static const char *const cdc_dma_rx_ch_text[] = {"One", "Two"};
512static const char *const cdc_dma_tx_ch_text[] = {"One", "Two", "Three", "Four",
513 "Five", "Six", "Seven",
514 "Eight"};
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530515static char const *cdc_dma_sample_rate_text[] = {"KHZ_8", "KHZ_11P025",
516 "KHZ_16", "KHZ_22P05",
517 "KHZ_32", "KHZ_44P1", "KHZ_48",
518 "KHZ_88P2", "KHZ_96",
519 "KHZ_176P4", "KHZ_192",
520 "KHZ_352P8", "KHZ_384"};
521
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530522
523static SOC_ENUM_SINGLE_EXT_DECL(slim_0_rx_chs, slim_rx_ch_text);
524static SOC_ENUM_SINGLE_EXT_DECL(slim_2_rx_chs, slim_rx_ch_text);
525static SOC_ENUM_SINGLE_EXT_DECL(slim_0_tx_chs, slim_tx_ch_text);
526static SOC_ENUM_SINGLE_EXT_DECL(slim_1_tx_chs, slim_tx_ch_text);
527static SOC_ENUM_SINGLE_EXT_DECL(slim_5_rx_chs, slim_rx_ch_text);
528static SOC_ENUM_SINGLE_EXT_DECL(slim_6_rx_chs, slim_rx_ch_text);
529static SOC_ENUM_SINGLE_EXT_DECL(usb_rx_chs, usb_ch_text);
530static SOC_ENUM_SINGLE_EXT_DECL(usb_tx_chs, usb_ch_text);
531static SOC_ENUM_SINGLE_EXT_DECL(vi_feed_tx_chs, vi_feed_ch_text);
532static SOC_ENUM_SINGLE_EXT_DECL(ext_disp_rx_chs, ch_text);
533static SOC_ENUM_SINGLE_EXT_DECL(proxy_rx_chs, ch_text);
534static SOC_ENUM_SINGLE_EXT_DECL(slim_0_rx_format, bit_format_text);
535static SOC_ENUM_SINGLE_EXT_DECL(slim_5_rx_format, bit_format_text);
536static SOC_ENUM_SINGLE_EXT_DECL(slim_6_rx_format, bit_format_text);
537static SOC_ENUM_SINGLE_EXT_DECL(slim_0_tx_format, bit_format_text);
538static SOC_ENUM_SINGLE_EXT_DECL(usb_rx_format, bit_format_text);
539static SOC_ENUM_SINGLE_EXT_DECL(usb_tx_format, bit_format_text);
540static SOC_ENUM_SINGLE_EXT_DECL(ext_disp_rx_format, ext_disp_bit_format_text);
541static SOC_ENUM_SINGLE_EXT_DECL(slim_0_rx_sample_rate, slim_sample_rate_text);
542static SOC_ENUM_SINGLE_EXT_DECL(slim_2_rx_sample_rate, slim_sample_rate_text);
543static SOC_ENUM_SINGLE_EXT_DECL(slim_0_tx_sample_rate, slim_sample_rate_text);
544static SOC_ENUM_SINGLE_EXT_DECL(slim_5_rx_sample_rate, slim_sample_rate_text);
545static SOC_ENUM_SINGLE_EXT_DECL(slim_6_rx_sample_rate, slim_sample_rate_text);
546static SOC_ENUM_SINGLE_EXT_DECL(bt_sample_rate, bt_sample_rate_text);
Sharad Sangle493a1b32018-09-19 15:52:15 +0530547static SOC_ENUM_SINGLE_EXT_DECL(bt_sample_rate_rx, bt_sample_rate_rx_text);
548static SOC_ENUM_SINGLE_EXT_DECL(bt_sample_rate_tx, bt_sample_rate_tx_text);
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530549static SOC_ENUM_SINGLE_EXT_DECL(usb_rx_sample_rate, usb_sample_rate_text);
550static SOC_ENUM_SINGLE_EXT_DECL(usb_tx_sample_rate, usb_sample_rate_text);
551static SOC_ENUM_SINGLE_EXT_DECL(ext_disp_rx_sample_rate,
552 ext_disp_sample_rate_text);
553static SOC_ENUM_SINGLE_EXT_DECL(tdm_tx_chs, tdm_ch_text);
554static SOC_ENUM_SINGLE_EXT_DECL(tdm_tx_format, tdm_bit_format_text);
555static SOC_ENUM_SINGLE_EXT_DECL(tdm_tx_sample_rate, tdm_sample_rate_text);
556static SOC_ENUM_SINGLE_EXT_DECL(tdm_rx_chs, tdm_ch_text);
557static SOC_ENUM_SINGLE_EXT_DECL(tdm_rx_format, tdm_bit_format_text);
558static SOC_ENUM_SINGLE_EXT_DECL(tdm_rx_sample_rate, tdm_sample_rate_text);
559static SOC_ENUM_SINGLE_EXT_DECL(prim_aux_pcm_rx_sample_rate, auxpcm_rate_text);
560static SOC_ENUM_SINGLE_EXT_DECL(sec_aux_pcm_rx_sample_rate, auxpcm_rate_text);
561static SOC_ENUM_SINGLE_EXT_DECL(tert_aux_pcm_rx_sample_rate, auxpcm_rate_text);
562static SOC_ENUM_SINGLE_EXT_DECL(quat_aux_pcm_rx_sample_rate, auxpcm_rate_text);
563static SOC_ENUM_SINGLE_EXT_DECL(quin_aux_pcm_rx_sample_rate, auxpcm_rate_text);
564static SOC_ENUM_SINGLE_EXT_DECL(prim_aux_pcm_tx_sample_rate, auxpcm_rate_text);
565static SOC_ENUM_SINGLE_EXT_DECL(sec_aux_pcm_tx_sample_rate, auxpcm_rate_text);
566static SOC_ENUM_SINGLE_EXT_DECL(tert_aux_pcm_tx_sample_rate, auxpcm_rate_text);
567static SOC_ENUM_SINGLE_EXT_DECL(quat_aux_pcm_tx_sample_rate, auxpcm_rate_text);
568static SOC_ENUM_SINGLE_EXT_DECL(quin_aux_pcm_tx_sample_rate, auxpcm_rate_text);
569static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_rx_sample_rate, mi2s_rate_text);
570static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_rx_sample_rate, mi2s_rate_text);
571static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_rx_sample_rate, mi2s_rate_text);
572static SOC_ENUM_SINGLE_EXT_DECL(quat_mi2s_rx_sample_rate, mi2s_rate_text);
573static SOC_ENUM_SINGLE_EXT_DECL(quin_mi2s_rx_sample_rate, mi2s_rate_text);
574static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_tx_sample_rate, mi2s_rate_text);
575static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_tx_sample_rate, mi2s_rate_text);
576static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_tx_sample_rate, mi2s_rate_text);
577static SOC_ENUM_SINGLE_EXT_DECL(quat_mi2s_tx_sample_rate, mi2s_rate_text);
578static SOC_ENUM_SINGLE_EXT_DECL(quin_mi2s_tx_sample_rate, mi2s_rate_text);
579static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_rx_chs, mi2s_ch_text);
580static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_tx_chs, mi2s_ch_text);
581static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_rx_chs, mi2s_ch_text);
582static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_tx_chs, mi2s_ch_text);
583static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_rx_chs, mi2s_ch_text);
584static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_tx_chs, mi2s_ch_text);
585static SOC_ENUM_SINGLE_EXT_DECL(quat_mi2s_rx_chs, mi2s_ch_text);
586static SOC_ENUM_SINGLE_EXT_DECL(quat_mi2s_tx_chs, mi2s_ch_text);
587static SOC_ENUM_SINGLE_EXT_DECL(quin_mi2s_rx_chs, mi2s_ch_text);
588static SOC_ENUM_SINGLE_EXT_DECL(quin_mi2s_tx_chs, mi2s_ch_text);
589static SOC_ENUM_SINGLE_EXT_DECL(mi2s_rx_format, bit_format_text);
590static SOC_ENUM_SINGLE_EXT_DECL(mi2s_tx_format, bit_format_text);
591static SOC_ENUM_SINGLE_EXT_DECL(aux_pcm_rx_format, bit_format_text);
592static SOC_ENUM_SINGLE_EXT_DECL(aux_pcm_tx_format, bit_format_text);
593static SOC_ENUM_SINGLE_EXT_DECL(hifi_function, hifi_text);
594static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_0_chs, cdc_dma_rx_ch_text);
595static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_1_chs, cdc_dma_rx_ch_text);
596static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_0_chs, cdc_dma_rx_ch_text);
597static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_1_chs, cdc_dma_rx_ch_text);
598static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_2_chs, cdc_dma_rx_ch_text);
599static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_3_chs, cdc_dma_rx_ch_text);
600static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_5_chs, cdc_dma_rx_ch_text);
601static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_0_chs, cdc_dma_tx_ch_text);
602static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_1_chs, cdc_dma_tx_ch_text);
603static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_2_chs, cdc_dma_tx_ch_text);
604static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_0_chs, cdc_dma_tx_ch_text);
605static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_3_chs, cdc_dma_tx_ch_text);
606static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_4_chs, cdc_dma_tx_ch_text);
607static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_0_format, bit_format_text);
608static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_1_format, bit_format_text);
609static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_0_format, bit_format_text);
610static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_1_format, bit_format_text);
611static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_2_format, bit_format_text);
612static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_3_format, bit_format_text);
613static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_5_format, bit_format_text);
614static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_1_format, bit_format_text);
615static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_2_format, bit_format_text);
616static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_0_format, bit_format_text);
617static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_3_format, bit_format_text);
618static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_4_format, bit_format_text);
619static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_0_sample_rate,
620 cdc_dma_sample_rate_text);
621static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_1_sample_rate,
622 cdc_dma_sample_rate_text);
623static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_0_sample_rate,
624 cdc_dma_sample_rate_text);
625static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_1_sample_rate,
626 cdc_dma_sample_rate_text);
627static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_2_sample_rate,
628 cdc_dma_sample_rate_text);
629static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_3_sample_rate,
630 cdc_dma_sample_rate_text);
631static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_5_sample_rate,
632 cdc_dma_sample_rate_text);
633static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_0_sample_rate,
634 cdc_dma_sample_rate_text);
635static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_1_sample_rate,
636 cdc_dma_sample_rate_text);
637static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_2_sample_rate,
638 cdc_dma_sample_rate_text);
639static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_0_sample_rate,
640 cdc_dma_sample_rate_text);
641static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_3_sample_rate,
642 cdc_dma_sample_rate_text);
643static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_4_sample_rate,
644 cdc_dma_sample_rate_text);
645
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530646static int msm_hifi_control;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530647static bool codec_reg_done;
648static struct snd_soc_aux_dev *msm_aux_dev;
649static struct snd_soc_codec_conf *msm_codec_conf;
650static struct msm_asoc_wcd93xx_codec msm_codec_fn;
651
652static int dmic_0_1_gpio_cnt;
653static int dmic_2_3_gpio_cnt;
654
655static void *def_wcd_mbhc_cal(void);
656static int msm_snd_enable_codec_ext_clk(struct snd_soc_codec *codec,
657 int enable, bool dapm);
658static int msm_wsa881x_init(struct snd_soc_component *component);
659static int msm_aux_codec_init(struct snd_soc_component *component);
660
661/*
662 * Need to report LINEIN
663 * if R/L channel impedance is larger than 5K ohm
664 */
665static struct wcd_mbhc_config wcd_mbhc_cfg = {
666 .read_fw_bin = false,
667 .calibration = NULL,
668 .detect_extn_cable = true,
669 .mono_stero_detection = false,
670 .swap_gnd_mic = NULL,
671 .hs_ext_micbias = true,
672 .key_code[0] = KEY_MEDIA,
673 .key_code[1] = KEY_VOICECOMMAND,
674 .key_code[2] = KEY_VOLUMEUP,
675 .key_code[3] = KEY_VOLUMEDOWN,
676 .key_code[4] = 0,
677 .key_code[5] = 0,
678 .key_code[6] = 0,
679 .key_code[7] = 0,
680 .linein_th = 5000,
681 .moisture_en = true,
682 .mbhc_micbias = MIC_BIAS_2,
683 .anc_micbias = MIC_BIAS_2,
684 .enable_anc_mic_detect = false,
685};
686
687static struct snd_soc_dapm_route wcd_audio_paths_tavil[] = {
688 {"MIC BIAS1", NULL, "MCLK TX"},
689 {"MIC BIAS2", NULL, "MCLK TX"},
690 {"MIC BIAS3", NULL, "MCLK TX"},
691 {"MIC BIAS4", NULL, "MCLK TX"},
692};
693
694static struct afe_clk_set mi2s_clk[MI2S_MAX] = {
695 {
696 AFE_API_VERSION_I2S_CONFIG,
697 Q6AFE_LPASS_CLK_ID_PRI_MI2S_IBIT,
698 Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
699 Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
700 Q6AFE_LPASS_CLK_ROOT_DEFAULT,
701 0,
702 },
703 {
704 AFE_API_VERSION_I2S_CONFIG,
705 Q6AFE_LPASS_CLK_ID_SEC_MI2S_IBIT,
706 Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
707 Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
708 Q6AFE_LPASS_CLK_ROOT_DEFAULT,
709 0,
710 },
711 {
712 AFE_API_VERSION_I2S_CONFIG,
713 Q6AFE_LPASS_CLK_ID_TER_MI2S_IBIT,
714 Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
715 Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
716 Q6AFE_LPASS_CLK_ROOT_DEFAULT,
717 0,
718 },
719 {
720 AFE_API_VERSION_I2S_CONFIG,
721 Q6AFE_LPASS_CLK_ID_QUAD_MI2S_IBIT,
722 Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
723 Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
724 Q6AFE_LPASS_CLK_ROOT_DEFAULT,
725 0,
726 },
727 {
728 AFE_API_VERSION_I2S_CONFIG,
729 Q6AFE_LPASS_CLK_ID_QUI_MI2S_IBIT,
730 Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
731 Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
732 Q6AFE_LPASS_CLK_ROOT_DEFAULT,
733 0,
734 }
735
736};
737
738static struct mi2s_conf mi2s_intf_conf[MI2S_MAX];
739
740static int slim_get_sample_rate_val(int sample_rate)
741{
742 int sample_rate_val = 0;
743
744 switch (sample_rate) {
745 case SAMPLING_RATE_8KHZ:
746 sample_rate_val = 0;
747 break;
748 case SAMPLING_RATE_16KHZ:
749 sample_rate_val = 1;
750 break;
751 case SAMPLING_RATE_32KHZ:
752 sample_rate_val = 2;
753 break;
754 case SAMPLING_RATE_44P1KHZ:
755 sample_rate_val = 3;
756 break;
757 case SAMPLING_RATE_48KHZ:
758 sample_rate_val = 4;
759 break;
760 case SAMPLING_RATE_88P2KHZ:
761 sample_rate_val = 5;
762 break;
763 case SAMPLING_RATE_96KHZ:
764 sample_rate_val = 6;
765 break;
766 case SAMPLING_RATE_176P4KHZ:
767 sample_rate_val = 7;
768 break;
769 case SAMPLING_RATE_192KHZ:
770 sample_rate_val = 8;
771 break;
772 case SAMPLING_RATE_352P8KHZ:
773 sample_rate_val = 9;
774 break;
775 case SAMPLING_RATE_384KHZ:
776 sample_rate_val = 10;
777 break;
778 default:
779 sample_rate_val = 4;
780 break;
781 }
782 return sample_rate_val;
783}
784
785static int slim_get_sample_rate(int value)
786{
787 int sample_rate = 0;
788
789 switch (value) {
790 case 0:
791 sample_rate = SAMPLING_RATE_8KHZ;
792 break;
793 case 1:
794 sample_rate = SAMPLING_RATE_16KHZ;
795 break;
796 case 2:
797 sample_rate = SAMPLING_RATE_32KHZ;
798 break;
799 case 3:
800 sample_rate = SAMPLING_RATE_44P1KHZ;
801 break;
802 case 4:
803 sample_rate = SAMPLING_RATE_48KHZ;
804 break;
805 case 5:
806 sample_rate = SAMPLING_RATE_88P2KHZ;
807 break;
808 case 6:
809 sample_rate = SAMPLING_RATE_96KHZ;
810 break;
811 case 7:
812 sample_rate = SAMPLING_RATE_176P4KHZ;
813 break;
814 case 8:
815 sample_rate = SAMPLING_RATE_192KHZ;
816 break;
817 case 9:
818 sample_rate = SAMPLING_RATE_352P8KHZ;
819 break;
820 case 10:
821 sample_rate = SAMPLING_RATE_384KHZ;
822 break;
823 default:
824 sample_rate = SAMPLING_RATE_48KHZ;
825 break;
826 }
827 return sample_rate;
828}
829
830static int slim_get_bit_format_val(int bit_format)
831{
832 int val = 0;
833
834 switch (bit_format) {
835 case SNDRV_PCM_FORMAT_S32_LE:
836 val = 3;
837 break;
838 case SNDRV_PCM_FORMAT_S24_3LE:
839 val = 2;
840 break;
841 case SNDRV_PCM_FORMAT_S24_LE:
842 val = 1;
843 break;
844 case SNDRV_PCM_FORMAT_S16_LE:
845 default:
846 val = 0;
847 break;
848 }
849 return val;
850}
851
852static int slim_get_bit_format(int val)
853{
854 int bit_fmt = SNDRV_PCM_FORMAT_S16_LE;
855
856 switch (val) {
857 case 0:
858 bit_fmt = SNDRV_PCM_FORMAT_S16_LE;
859 break;
860 case 1:
861 bit_fmt = SNDRV_PCM_FORMAT_S24_LE;
862 break;
863 case 2:
864 bit_fmt = SNDRV_PCM_FORMAT_S24_3LE;
865 break;
866 case 3:
867 bit_fmt = SNDRV_PCM_FORMAT_S32_LE;
868 break;
869 default:
870 bit_fmt = SNDRV_PCM_FORMAT_S16_LE;
871 break;
872 }
873 return bit_fmt;
874}
875
876static int slim_get_port_idx(struct snd_kcontrol *kcontrol)
877{
878 int port_id = 0;
879
880 if (strnstr(kcontrol->id.name, "SLIM_0_RX", sizeof("SLIM_0_RX"))) {
881 port_id = SLIM_RX_0;
882 } else if (strnstr(kcontrol->id.name,
883 "SLIM_2_RX", sizeof("SLIM_2_RX"))) {
884 port_id = SLIM_RX_2;
885 } else if (strnstr(kcontrol->id.name,
886 "SLIM_5_RX", sizeof("SLIM_5_RX"))) {
887 port_id = SLIM_RX_5;
888 } else if (strnstr(kcontrol->id.name,
889 "SLIM_6_RX", sizeof("SLIM_6_RX"))) {
890 port_id = SLIM_RX_6;
891 } else if (strnstr(kcontrol->id.name,
892 "SLIM_0_TX", sizeof("SLIM_0_TX"))) {
893 port_id = SLIM_TX_0;
894 } else if (strnstr(kcontrol->id.name,
895 "SLIM_1_TX", sizeof("SLIM_1_TX"))) {
896 port_id = SLIM_TX_1;
897 } else {
898 pr_err("%s: unsupported channel: %s\n",
899 __func__, kcontrol->id.name);
900 return -EINVAL;
901 }
902
903 return port_id;
904}
905
906static int slim_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
907 struct snd_ctl_elem_value *ucontrol)
908{
909 int ch_num = slim_get_port_idx(kcontrol);
910
911 if (ch_num < 0)
912 return ch_num;
913
914 ucontrol->value.enumerated.item[0] =
915 slim_get_sample_rate_val(slim_rx_cfg[ch_num].sample_rate);
916
917 pr_debug("%s: slim[%d]_rx_sample_rate = %d, item = %d\n", __func__,
918 ch_num, slim_rx_cfg[ch_num].sample_rate,
919 ucontrol->value.enumerated.item[0]);
920
921 return 0;
922}
923
924static int slim_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
925 struct snd_ctl_elem_value *ucontrol)
926{
927 int ch_num = slim_get_port_idx(kcontrol);
928
929 if (ch_num < 0)
930 return ch_num;
931
932 slim_rx_cfg[ch_num].sample_rate =
933 slim_get_sample_rate(ucontrol->value.enumerated.item[0]);
934
935 pr_debug("%s: slim[%d]_rx_sample_rate = %d, item = %d\n", __func__,
936 ch_num, slim_rx_cfg[ch_num].sample_rate,
937 ucontrol->value.enumerated.item[0]);
938
939 return 0;
940}
941
942static int slim_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
943 struct snd_ctl_elem_value *ucontrol)
944{
945 int ch_num = slim_get_port_idx(kcontrol);
946
947 if (ch_num < 0)
948 return ch_num;
949
950 ucontrol->value.enumerated.item[0] =
951 slim_get_sample_rate_val(slim_tx_cfg[ch_num].sample_rate);
952
953 pr_debug("%s: slim[%d]_tx_sample_rate = %d, item = %d\n", __func__,
954 ch_num, slim_tx_cfg[ch_num].sample_rate,
955 ucontrol->value.enumerated.item[0]);
956
957 return 0;
958}
959
960static int slim_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
961 struct snd_ctl_elem_value *ucontrol)
962{
963 int sample_rate = 0;
964 int ch_num = slim_get_port_idx(kcontrol);
965
966 if (ch_num < 0)
967 return ch_num;
968
969 sample_rate = slim_get_sample_rate(ucontrol->value.enumerated.item[0]);
970 if (sample_rate == SAMPLING_RATE_44P1KHZ) {
971 pr_err("%s: Unsupported sample rate %d: for Tx path\n",
972 __func__, sample_rate);
973 return -EINVAL;
974 }
975 slim_tx_cfg[ch_num].sample_rate = sample_rate;
976
977 pr_debug("%s: slim[%d]_tx_sample_rate = %d, value = %d\n", __func__,
978 ch_num, slim_tx_cfg[ch_num].sample_rate,
979 ucontrol->value.enumerated.item[0]);
980
981 return 0;
982}
983
984static int slim_rx_bit_format_get(struct snd_kcontrol *kcontrol,
985 struct snd_ctl_elem_value *ucontrol)
986{
987 int ch_num = slim_get_port_idx(kcontrol);
988
989 if (ch_num < 0)
990 return ch_num;
991
992 ucontrol->value.enumerated.item[0] =
993 slim_get_bit_format_val(slim_rx_cfg[ch_num].bit_format);
994
995 pr_debug("%s: slim[%d]_rx_bit_format = %d, ucontrol value = %d\n",
996 __func__, ch_num, slim_rx_cfg[ch_num].bit_format,
997 ucontrol->value.enumerated.item[0]);
998
999 return 0;
1000}
1001
1002static int slim_rx_bit_format_put(struct snd_kcontrol *kcontrol,
1003 struct snd_ctl_elem_value *ucontrol)
1004{
1005 int ch_num = slim_get_port_idx(kcontrol);
1006
1007 if (ch_num < 0)
1008 return ch_num;
1009
1010 slim_rx_cfg[ch_num].bit_format =
1011 slim_get_bit_format(ucontrol->value.enumerated.item[0]);
1012
1013 pr_debug("%s: slim[%d]_rx_bit_format = %d, ucontrol value = %d\n",
1014 __func__, ch_num, slim_rx_cfg[ch_num].bit_format,
1015 ucontrol->value.enumerated.item[0]);
1016
1017 return 0;
1018}
1019
1020static int slim_tx_bit_format_get(struct snd_kcontrol *kcontrol,
1021 struct snd_ctl_elem_value *ucontrol)
1022{
1023 int ch_num = slim_get_port_idx(kcontrol);
1024
1025 if (ch_num < 0)
1026 return ch_num;
1027
1028 ucontrol->value.enumerated.item[0] =
1029 slim_get_bit_format_val(slim_tx_cfg[ch_num].bit_format);
1030
1031 pr_debug("%s: slim[%d]_tx_bit_format = %d, ucontrol value = %d\n",
1032 __func__, ch_num, slim_tx_cfg[ch_num].bit_format,
1033 ucontrol->value.enumerated.item[0]);
1034
1035 return 0;
1036}
1037
1038static int slim_tx_bit_format_put(struct snd_kcontrol *kcontrol,
1039 struct snd_ctl_elem_value *ucontrol)
1040{
1041 int ch_num = slim_get_port_idx(kcontrol);
1042
1043 if (ch_num < 0)
1044 return ch_num;
1045
1046 slim_tx_cfg[ch_num].bit_format =
1047 slim_get_bit_format(ucontrol->value.enumerated.item[0]);
1048
1049 pr_debug("%s: slim[%d]_tx_bit_format = %d, ucontrol value = %d\n",
1050 __func__, ch_num, slim_tx_cfg[ch_num].bit_format,
1051 ucontrol->value.enumerated.item[0]);
1052
1053 return 0;
1054}
1055
1056static int slim_rx_ch_get(struct snd_kcontrol *kcontrol,
1057 struct snd_ctl_elem_value *ucontrol)
1058{
1059 int ch_num = slim_get_port_idx(kcontrol);
1060
1061 if (ch_num < 0)
1062 return ch_num;
1063
1064 pr_debug("%s: msm_slim_[%d]_rx_ch = %d\n", __func__,
1065 ch_num, slim_rx_cfg[ch_num].channels);
1066 ucontrol->value.enumerated.item[0] = slim_rx_cfg[ch_num].channels - 1;
1067
1068 return 0;
1069}
1070
1071static int slim_rx_ch_put(struct snd_kcontrol *kcontrol,
1072 struct snd_ctl_elem_value *ucontrol)
1073{
1074 int ch_num = slim_get_port_idx(kcontrol);
1075
1076 if (ch_num < 0)
1077 return ch_num;
1078
1079 slim_rx_cfg[ch_num].channels = ucontrol->value.enumerated.item[0] + 1;
1080 pr_debug("%s: msm_slim_[%d]_rx_ch = %d\n", __func__,
1081 ch_num, slim_rx_cfg[ch_num].channels);
1082
1083 return 1;
1084}
1085
1086static int slim_tx_ch_get(struct snd_kcontrol *kcontrol,
1087 struct snd_ctl_elem_value *ucontrol)
1088{
1089 int ch_num = slim_get_port_idx(kcontrol);
1090
1091 if (ch_num < 0)
1092 return ch_num;
1093
1094 pr_debug("%s: msm_slim_[%d]_tx_ch = %d\n", __func__,
1095 ch_num, slim_tx_cfg[ch_num].channels);
1096 ucontrol->value.enumerated.item[0] = slim_tx_cfg[ch_num].channels - 1;
1097
1098 return 0;
1099}
1100
1101static int slim_tx_ch_put(struct snd_kcontrol *kcontrol,
1102 struct snd_ctl_elem_value *ucontrol)
1103{
1104 int ch_num = slim_get_port_idx(kcontrol);
1105
1106 if (ch_num < 0)
1107 return ch_num;
1108
1109 slim_tx_cfg[ch_num].channels = ucontrol->value.enumerated.item[0] + 1;
1110 pr_debug("%s: msm_slim_[%d]_tx_ch = %d\n", __func__,
1111 ch_num, slim_tx_cfg[ch_num].channels);
1112
1113 return 1;
1114}
1115
1116static int msm_vi_feed_tx_ch_get(struct snd_kcontrol *kcontrol,
1117 struct snd_ctl_elem_value *ucontrol)
1118{
1119 ucontrol->value.integer.value[0] = msm_vi_feed_tx_ch - 1;
1120 pr_debug("%s: msm_vi_feed_tx_ch = %ld\n", __func__,
1121 ucontrol->value.integer.value[0]);
1122 return 0;
1123}
1124
1125static int msm_vi_feed_tx_ch_put(struct snd_kcontrol *kcontrol,
1126 struct snd_ctl_elem_value *ucontrol)
1127{
1128 msm_vi_feed_tx_ch = ucontrol->value.integer.value[0] + 1;
1129
1130 pr_debug("%s: msm_vi_feed_tx_ch = %d\n", __func__, msm_vi_feed_tx_ch);
1131 return 1;
1132}
1133
1134static int msm_bt_sample_rate_get(struct snd_kcontrol *kcontrol,
1135 struct snd_ctl_elem_value *ucontrol)
1136{
1137 /*
1138 * Slimbus_7_Rx/Tx sample rate values should always be in sync (same)
1139 * when used for BT_SCO use case. Return either Rx or Tx sample rate
1140 * value.
1141 */
1142 switch (slim_rx_cfg[SLIM_RX_7].sample_rate) {
1143 case SAMPLING_RATE_96KHZ:
1144 ucontrol->value.integer.value[0] = 5;
1145 break;
1146 case SAMPLING_RATE_88P2KHZ:
1147 ucontrol->value.integer.value[0] = 4;
1148 break;
1149 case SAMPLING_RATE_48KHZ:
1150 ucontrol->value.integer.value[0] = 3;
1151 break;
1152 case SAMPLING_RATE_44P1KHZ:
1153 ucontrol->value.integer.value[0] = 2;
1154 break;
1155 case SAMPLING_RATE_16KHZ:
1156 ucontrol->value.integer.value[0] = 1;
1157 break;
1158 case SAMPLING_RATE_8KHZ:
1159 default:
1160 ucontrol->value.integer.value[0] = 0;
1161 break;
1162 }
1163 pr_debug("%s: sample rate = %d\n", __func__,
1164 slim_rx_cfg[SLIM_RX_7].sample_rate);
1165
1166 return 0;
1167}
1168
1169static int msm_bt_sample_rate_put(struct snd_kcontrol *kcontrol,
1170 struct snd_ctl_elem_value *ucontrol)
1171{
1172 switch (ucontrol->value.integer.value[0]) {
1173 case 1:
1174 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_16KHZ;
1175 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_16KHZ;
1176 break;
1177 case 2:
1178 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_44P1KHZ;
1179 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_44P1KHZ;
1180 break;
1181 case 3:
1182 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_48KHZ;
1183 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_48KHZ;
1184 break;
1185 case 4:
1186 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_88P2KHZ;
1187 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_88P2KHZ;
1188 break;
1189 case 5:
1190 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_96KHZ;
1191 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_96KHZ;
1192 break;
1193 case 0:
1194 default:
1195 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_8KHZ;
1196 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_8KHZ;
1197 break;
1198 }
1199 pr_debug("%s: sample rates: slim7_rx = %d, slim7_tx = %d, value = %d\n",
1200 __func__,
1201 slim_rx_cfg[SLIM_RX_7].sample_rate,
1202 slim_tx_cfg[SLIM_TX_7].sample_rate,
1203 ucontrol->value.enumerated.item[0]);
1204
1205 return 0;
1206}
Sharad Sangle493a1b32018-09-19 15:52:15 +05301207static int msm_bt_sample_rate_rx_get(struct snd_kcontrol *kcontrol,
1208 struct snd_ctl_elem_value *ucontrol)
1209{
1210 switch (slim_rx_cfg[SLIM_RX_7].sample_rate) {
1211 case SAMPLING_RATE_96KHZ:
1212 ucontrol->value.integer.value[0] = 5;
1213 break;
1214 case SAMPLING_RATE_88P2KHZ:
1215 ucontrol->value.integer.value[0] = 4;
1216 break;
1217 case SAMPLING_RATE_48KHZ:
1218 ucontrol->value.integer.value[0] = 3;
1219 break;
1220 case SAMPLING_RATE_44P1KHZ:
1221 ucontrol->value.integer.value[0] = 2;
1222 break;
1223 case SAMPLING_RATE_16KHZ:
1224 ucontrol->value.integer.value[0] = 1;
1225 break;
1226 case SAMPLING_RATE_8KHZ:
1227 default:
1228 ucontrol->value.integer.value[0] = 0;
1229 break;
1230 }
1231 pr_debug("%s: sample rate rx = %d", __func__,
1232 slim_rx_cfg[SLIM_RX_7].sample_rate);
Aditya Bavanari44eb8952018-05-09 19:01:50 +05301233
Sharad Sangle493a1b32018-09-19 15:52:15 +05301234 return 0;
1235}
1236
1237static int msm_bt_sample_rate_rx_put(struct snd_kcontrol *kcontrol,
1238 struct snd_ctl_elem_value *ucontrol)
1239{
1240 switch (ucontrol->value.integer.value[0]) {
1241 case 1:
1242 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_16KHZ;
1243 break;
1244 case 2:
1245 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_44P1KHZ;
1246 break;
1247 case 3:
1248 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_48KHZ;
1249 break;
1250 case 4:
1251 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_88P2KHZ;
1252 break;
1253 case 5:
1254 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_96KHZ;
1255 break;
1256 case 0:
1257 default:
1258 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_8KHZ;
1259 break;
1260 }
1261 pr_debug("%s: sample rate: slim7_rx = %d, value = %d\n",
1262 __func__,
1263 slim_rx_cfg[SLIM_RX_7].sample_rate,
1264 ucontrol->value.enumerated.item[0]);
1265
1266 return 0;
1267}
1268
1269static int msm_bt_sample_rate_tx_get(struct snd_kcontrol *kcontrol,
1270 struct snd_ctl_elem_value *ucontrol)
1271{
1272 switch (slim_tx_cfg[SLIM_TX_7].sample_rate) {
1273 case SAMPLING_RATE_96KHZ:
1274 ucontrol->value.integer.value[0] = 5;
1275 break;
1276 case SAMPLING_RATE_88P2KHZ:
1277 ucontrol->value.integer.value[0] = 4;
1278 break;
1279 case SAMPLING_RATE_48KHZ:
1280 ucontrol->value.integer.value[0] = 3;
1281 break;
1282 case SAMPLING_RATE_44P1KHZ:
1283 ucontrol->value.integer.value[0] = 2;
1284 break;
1285 case SAMPLING_RATE_16KHZ:
1286 ucontrol->value.integer.value[0] = 1;
1287 break;
1288 case SAMPLING_RATE_8KHZ:
1289 default:
1290 ucontrol->value.integer.value[0] = 0;
1291 break;
1292 }
1293 pr_debug("%s: sample rate tx = %d", __func__,
1294 slim_tx_cfg[SLIM_TX_7].sample_rate);
1295
1296 return 0;
1297}
1298
1299static int msm_bt_sample_rate_tx_put(struct snd_kcontrol *kcontrol,
1300 struct snd_ctl_elem_value *ucontrol)
1301{
1302 switch (ucontrol->value.integer.value[0]) {
1303 case 1:
1304 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_16KHZ;
1305 break;
1306 case 2:
1307 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_44P1KHZ;
1308 break;
1309 case 3:
1310 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_48KHZ;
1311 break;
1312 case 4:
1313 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_88P2KHZ;
1314 break;
1315 case 5:
1316 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_96KHZ;
1317 break;
1318 case 0:
1319 default:
1320 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_8KHZ;
1321 break;
1322 }
1323 pr_debug("%s: sample rate: slim7_tx = %d, value = %d\n",
1324 __func__,
1325 slim_tx_cfg[SLIM_TX_7].sample_rate,
1326 ucontrol->value.enumerated.item[0]);
1327
1328 return 0;
1329}
Aditya Bavanari44eb8952018-05-09 19:01:50 +05301330static int cdc_dma_get_port_idx(struct snd_kcontrol *kcontrol)
1331{
1332 int idx = 0;
1333
1334 if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_RX_0",
1335 sizeof("WSA_CDC_DMA_RX_0")))
1336 idx = WSA_CDC_DMA_RX_0;
1337 else if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_RX_1",
1338 sizeof("WSA_CDC_DMA_RX_0")))
1339 idx = WSA_CDC_DMA_RX_1;
1340 else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_0",
1341 sizeof("RX_CDC_DMA_RX_0")))
1342 idx = RX_CDC_DMA_RX_0;
1343 else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_1",
1344 sizeof("RX_CDC_DMA_RX_1")))
1345 idx = RX_CDC_DMA_RX_1;
1346 else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_2",
1347 sizeof("RX_CDC_DMA_RX_2")))
1348 idx = RX_CDC_DMA_RX_2;
1349 else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_3",
1350 sizeof("RX_CDC_DMA_RX_3")))
1351 idx = RX_CDC_DMA_RX_3;
1352 else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_5",
1353 sizeof("RX_CDC_DMA_RX_5")))
1354 idx = RX_CDC_DMA_RX_5;
1355 else if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_TX_0",
1356 sizeof("WSA_CDC_DMA_TX_0")))
1357 idx = WSA_CDC_DMA_TX_0;
1358 else if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_TX_1",
1359 sizeof("WSA_CDC_DMA_TX_1")))
1360 idx = WSA_CDC_DMA_TX_1;
1361 else if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_TX_2",
1362 sizeof("WSA_CDC_DMA_TX_2")))
1363 idx = WSA_CDC_DMA_TX_2;
1364 else if (strnstr(kcontrol->id.name, "TX_CDC_DMA_TX_0",
1365 sizeof("TX_CDC_DMA_TX_0")))
1366 idx = TX_CDC_DMA_TX_0;
1367 else if (strnstr(kcontrol->id.name, "TX_CDC_DMA_TX_3",
1368 sizeof("TX_CDC_DMA_TX_3")))
1369 idx = TX_CDC_DMA_TX_3;
1370 else if (strnstr(kcontrol->id.name, "TX_CDC_DMA_TX_4",
1371 sizeof("TX_CDC_DMA_TX_4")))
1372 idx = TX_CDC_DMA_TX_4;
1373 else {
1374 pr_err("%s: unsupported channel: %s\n",
1375 __func__, kcontrol->id.name);
1376 return -EINVAL;
1377 }
1378
1379 return idx;
1380}
1381
1382static int cdc_dma_rx_ch_get(struct snd_kcontrol *kcontrol,
1383 struct snd_ctl_elem_value *ucontrol)
1384{
1385 int ch_num = cdc_dma_get_port_idx(kcontrol);
1386
Tanya Dixitd85e6f32018-09-14 16:06:20 +05301387 if (ch_num < 0) {
1388 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
Aditya Bavanari44eb8952018-05-09 19:01:50 +05301389 return ch_num;
Tanya Dixitd85e6f32018-09-14 16:06:20 +05301390 }
Aditya Bavanari44eb8952018-05-09 19:01:50 +05301391
1392 pr_debug("%s: cdc_dma_rx_ch = %d\n", __func__,
1393 cdc_dma_rx_cfg[ch_num].channels - 1);
1394 ucontrol->value.integer.value[0] = cdc_dma_rx_cfg[ch_num].channels - 1;
1395 return 0;
1396}
1397
1398static int cdc_dma_rx_ch_put(struct snd_kcontrol *kcontrol,
1399 struct snd_ctl_elem_value *ucontrol)
1400{
1401 int ch_num = cdc_dma_get_port_idx(kcontrol);
1402
Tanya Dixitd85e6f32018-09-14 16:06:20 +05301403 if (ch_num < 0) {
1404 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
Aditya Bavanari44eb8952018-05-09 19:01:50 +05301405 return ch_num;
Tanya Dixitd85e6f32018-09-14 16:06:20 +05301406 }
Aditya Bavanari44eb8952018-05-09 19:01:50 +05301407
1408 cdc_dma_rx_cfg[ch_num].channels = ucontrol->value.integer.value[0] + 1;
1409
1410 pr_debug("%s: cdc_dma_rx_ch = %d\n", __func__,
1411 cdc_dma_rx_cfg[ch_num].channels);
1412 return 1;
1413}
1414
1415static int cdc_dma_rx_format_get(struct snd_kcontrol *kcontrol,
1416 struct snd_ctl_elem_value *ucontrol)
1417{
1418 int ch_num = cdc_dma_get_port_idx(kcontrol);
1419
Tanya Dixitd85e6f32018-09-14 16:06:20 +05301420 if (ch_num < 0) {
1421 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
1422 return ch_num;
1423 }
1424
Aditya Bavanari44eb8952018-05-09 19:01:50 +05301425 switch (cdc_dma_rx_cfg[ch_num].bit_format) {
1426 case SNDRV_PCM_FORMAT_S32_LE:
1427 ucontrol->value.integer.value[0] = 3;
1428 break;
1429 case SNDRV_PCM_FORMAT_S24_3LE:
1430 ucontrol->value.integer.value[0] = 2;
1431 break;
1432 case SNDRV_PCM_FORMAT_S24_LE:
1433 ucontrol->value.integer.value[0] = 1;
1434 break;
1435 case SNDRV_PCM_FORMAT_S16_LE:
1436 default:
1437 ucontrol->value.integer.value[0] = 0;
1438 break;
1439 }
1440
1441 pr_debug("%s: cdc_dma_rx_format = %d, ucontrol value = %ld\n",
1442 __func__, cdc_dma_rx_cfg[ch_num].bit_format,
1443 ucontrol->value.integer.value[0]);
1444 return 0;
1445}
1446
1447static int cdc_dma_rx_format_put(struct snd_kcontrol *kcontrol,
1448 struct snd_ctl_elem_value *ucontrol)
1449{
1450 int rc = 0;
1451 int ch_num = cdc_dma_get_port_idx(kcontrol);
1452
Tanya Dixitd85e6f32018-09-14 16:06:20 +05301453 if (ch_num < 0) {
1454 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
1455 return ch_num;
1456 }
1457
Aditya Bavanari44eb8952018-05-09 19:01:50 +05301458 switch (ucontrol->value.integer.value[0]) {
1459 case 3:
1460 cdc_dma_rx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S32_LE;
1461 break;
1462 case 2:
1463 cdc_dma_rx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S24_3LE;
1464 break;
1465 case 1:
1466 cdc_dma_rx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S24_LE;
1467 break;
1468 case 0:
1469 default:
1470 cdc_dma_rx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S16_LE;
1471 break;
1472 }
1473 pr_debug("%s: cdc_dma_rx_format = %d, ucontrol value = %ld\n",
1474 __func__, cdc_dma_rx_cfg[ch_num].bit_format,
1475 ucontrol->value.integer.value[0]);
1476
1477 return rc;
1478}
1479
Aditya Bavanari0b26ab32018-08-03 23:53:01 +05301480
Aditya Bavanari44eb8952018-05-09 19:01:50 +05301481static int cdc_dma_get_sample_rate_val(int sample_rate)
1482{
1483 int sample_rate_val = 0;
1484
1485 switch (sample_rate) {
1486 case SAMPLING_RATE_8KHZ:
1487 sample_rate_val = 0;
1488 break;
Aditya Bavanari0b26ab32018-08-03 23:53:01 +05301489 case SAMPLING_RATE_11P025KHZ:
Aditya Bavanari44eb8952018-05-09 19:01:50 +05301490 sample_rate_val = 1;
1491 break;
Aditya Bavanari0b26ab32018-08-03 23:53:01 +05301492 case SAMPLING_RATE_16KHZ:
Aditya Bavanari44eb8952018-05-09 19:01:50 +05301493 sample_rate_val = 2;
1494 break;
Aditya Bavanari0b26ab32018-08-03 23:53:01 +05301495 case SAMPLING_RATE_22P05KHZ:
Aditya Bavanari44eb8952018-05-09 19:01:50 +05301496 sample_rate_val = 3;
1497 break;
Aditya Bavanari0b26ab32018-08-03 23:53:01 +05301498 case SAMPLING_RATE_32KHZ:
Aditya Bavanari44eb8952018-05-09 19:01:50 +05301499 sample_rate_val = 4;
1500 break;
Aditya Bavanari0b26ab32018-08-03 23:53:01 +05301501 case SAMPLING_RATE_44P1KHZ:
Aditya Bavanari44eb8952018-05-09 19:01:50 +05301502 sample_rate_val = 5;
1503 break;
Aditya Bavanari0b26ab32018-08-03 23:53:01 +05301504 case SAMPLING_RATE_48KHZ:
Aditya Bavanari44eb8952018-05-09 19:01:50 +05301505 sample_rate_val = 6;
1506 break;
Aditya Bavanari0b26ab32018-08-03 23:53:01 +05301507 case SAMPLING_RATE_88P2KHZ:
Aditya Bavanari44eb8952018-05-09 19:01:50 +05301508 sample_rate_val = 7;
1509 break;
Aditya Bavanari0b26ab32018-08-03 23:53:01 +05301510 case SAMPLING_RATE_96KHZ:
Aditya Bavanari44eb8952018-05-09 19:01:50 +05301511 sample_rate_val = 8;
1512 break;
Aditya Bavanari0b26ab32018-08-03 23:53:01 +05301513 case SAMPLING_RATE_176P4KHZ:
Aditya Bavanari44eb8952018-05-09 19:01:50 +05301514 sample_rate_val = 9;
1515 break;
Aditya Bavanari0b26ab32018-08-03 23:53:01 +05301516 case SAMPLING_RATE_192KHZ:
Aditya Bavanari44eb8952018-05-09 19:01:50 +05301517 sample_rate_val = 10;
1518 break;
Aditya Bavanari0b26ab32018-08-03 23:53:01 +05301519 case SAMPLING_RATE_352P8KHZ:
1520 sample_rate_val = 11;
1521 break;
1522 case SAMPLING_RATE_384KHZ:
1523 sample_rate_val = 12;
1524 break;
Aditya Bavanari44eb8952018-05-09 19:01:50 +05301525 default:
Aditya Bavanari0b26ab32018-08-03 23:53:01 +05301526 sample_rate_val = 6;
Aditya Bavanari44eb8952018-05-09 19:01:50 +05301527 break;
1528 }
1529 return sample_rate_val;
1530}
1531
1532static int cdc_dma_get_sample_rate(int value)
1533{
1534 int sample_rate = 0;
1535
1536 switch (value) {
1537 case 0:
1538 sample_rate = SAMPLING_RATE_8KHZ;
1539 break;
1540 case 1:
Aditya Bavanari0b26ab32018-08-03 23:53:01 +05301541 sample_rate = SAMPLING_RATE_11P025KHZ;
Aditya Bavanari44eb8952018-05-09 19:01:50 +05301542 break;
1543 case 2:
Aditya Bavanari0b26ab32018-08-03 23:53:01 +05301544 sample_rate = SAMPLING_RATE_16KHZ;
Aditya Bavanari44eb8952018-05-09 19:01:50 +05301545 break;
1546 case 3:
Aditya Bavanari0b26ab32018-08-03 23:53:01 +05301547 sample_rate = SAMPLING_RATE_22P05KHZ;
Aditya Bavanari44eb8952018-05-09 19:01:50 +05301548 break;
1549 case 4:
Aditya Bavanari0b26ab32018-08-03 23:53:01 +05301550 sample_rate = SAMPLING_RATE_32KHZ;
Aditya Bavanari44eb8952018-05-09 19:01:50 +05301551 break;
1552 case 5:
Aditya Bavanari0b26ab32018-08-03 23:53:01 +05301553 sample_rate = SAMPLING_RATE_44P1KHZ;
Aditya Bavanari44eb8952018-05-09 19:01:50 +05301554 break;
1555 case 6:
Aditya Bavanari0b26ab32018-08-03 23:53:01 +05301556 sample_rate = SAMPLING_RATE_48KHZ;
Aditya Bavanari44eb8952018-05-09 19:01:50 +05301557 break;
1558 case 7:
Aditya Bavanari0b26ab32018-08-03 23:53:01 +05301559 sample_rate = SAMPLING_RATE_88P2KHZ;
Aditya Bavanari44eb8952018-05-09 19:01:50 +05301560 break;
1561 case 8:
Aditya Bavanari0b26ab32018-08-03 23:53:01 +05301562 sample_rate = SAMPLING_RATE_96KHZ;
Aditya Bavanari44eb8952018-05-09 19:01:50 +05301563 break;
1564 case 9:
Aditya Bavanari0b26ab32018-08-03 23:53:01 +05301565 sample_rate = SAMPLING_RATE_176P4KHZ;
Aditya Bavanari44eb8952018-05-09 19:01:50 +05301566 break;
1567 case 10:
Aditya Bavanari0b26ab32018-08-03 23:53:01 +05301568 sample_rate = SAMPLING_RATE_192KHZ;
1569 break;
1570 case 11:
1571 sample_rate = SAMPLING_RATE_352P8KHZ;
1572 break;
1573 case 12:
Aditya Bavanari44eb8952018-05-09 19:01:50 +05301574 sample_rate = SAMPLING_RATE_384KHZ;
1575 break;
1576 default:
1577 sample_rate = SAMPLING_RATE_48KHZ;
1578 break;
1579 }
1580 return sample_rate;
1581}
1582
Aditya Bavanari44eb8952018-05-09 19:01:50 +05301583static int cdc_dma_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
1584 struct snd_ctl_elem_value *ucontrol)
1585{
1586 int ch_num = cdc_dma_get_port_idx(kcontrol);
1587
Tanya Dixitd85e6f32018-09-14 16:06:20 +05301588 if (ch_num < 0) {
1589 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
Aditya Bavanari44eb8952018-05-09 19:01:50 +05301590 return ch_num;
Tanya Dixitd85e6f32018-09-14 16:06:20 +05301591 }
Aditya Bavanari44eb8952018-05-09 19:01:50 +05301592
1593 ucontrol->value.enumerated.item[0] =
1594 cdc_dma_get_sample_rate_val(cdc_dma_rx_cfg[ch_num].sample_rate);
1595
1596 pr_debug("%s: cdc_dma_rx_sample_rate = %d\n", __func__,
1597 cdc_dma_rx_cfg[ch_num].sample_rate);
1598 return 0;
1599}
1600
1601static int cdc_dma_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
1602 struct snd_ctl_elem_value *ucontrol)
1603{
1604 int ch_num = cdc_dma_get_port_idx(kcontrol);
1605
Tanya Dixitd85e6f32018-09-14 16:06:20 +05301606 if (ch_num < 0) {
1607 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
Aditya Bavanari44eb8952018-05-09 19:01:50 +05301608 return ch_num;
Tanya Dixitd85e6f32018-09-14 16:06:20 +05301609 }
Aditya Bavanari44eb8952018-05-09 19:01:50 +05301610
1611 cdc_dma_rx_cfg[ch_num].sample_rate =
1612 cdc_dma_get_sample_rate(ucontrol->value.enumerated.item[0]);
1613
1614
1615 pr_debug("%s: control value = %d, cdc_dma_rx_sample_rate = %d\n",
1616 __func__, ucontrol->value.enumerated.item[0],
1617 cdc_dma_rx_cfg[ch_num].sample_rate);
1618 return 0;
1619}
1620
1621static int cdc_dma_tx_ch_get(struct snd_kcontrol *kcontrol,
1622 struct snd_ctl_elem_value *ucontrol)
1623{
1624 int ch_num = cdc_dma_get_port_idx(kcontrol);
1625
Tanya Dixitd85e6f32018-09-14 16:06:20 +05301626 if (ch_num < 0) {
1627 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
1628 return ch_num;
1629 }
1630
Aditya Bavanari44eb8952018-05-09 19:01:50 +05301631 pr_debug("%s: cdc_dma_tx_ch = %d\n", __func__,
1632 cdc_dma_tx_cfg[ch_num].channels);
1633 ucontrol->value.integer.value[0] = cdc_dma_tx_cfg[ch_num].channels - 1;
1634 return 0;
1635}
1636
1637static int cdc_dma_tx_ch_put(struct snd_kcontrol *kcontrol,
1638 struct snd_ctl_elem_value *ucontrol)
1639{
1640 int ch_num = cdc_dma_get_port_idx(kcontrol);
1641
Tanya Dixitd85e6f32018-09-14 16:06:20 +05301642 if (ch_num < 0) {
1643 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
1644 return ch_num;
1645 }
1646
Aditya Bavanari44eb8952018-05-09 19:01:50 +05301647 cdc_dma_tx_cfg[ch_num].channels = ucontrol->value.integer.value[0] + 1;
1648
1649 pr_debug("%s: cdc_dma_tx_ch = %d\n", __func__,
1650 cdc_dma_tx_cfg[ch_num].channels);
1651 return 1;
1652}
1653
1654static int cdc_dma_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
1655 struct snd_ctl_elem_value *ucontrol)
1656{
1657 int sample_rate_val;
1658 int ch_num = cdc_dma_get_port_idx(kcontrol);
1659
Tanya Dixitd85e6f32018-09-14 16:06:20 +05301660 if (ch_num < 0) {
1661 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
1662 return ch_num;
1663 }
1664
Aditya Bavanari44eb8952018-05-09 19:01:50 +05301665 switch (cdc_dma_tx_cfg[ch_num].sample_rate) {
1666 case SAMPLING_RATE_384KHZ:
1667 sample_rate_val = 12;
1668 break;
1669 case SAMPLING_RATE_352P8KHZ:
1670 sample_rate_val = 11;
1671 break;
1672 case SAMPLING_RATE_192KHZ:
1673 sample_rate_val = 10;
1674 break;
1675 case SAMPLING_RATE_176P4KHZ:
1676 sample_rate_val = 9;
1677 break;
1678 case SAMPLING_RATE_96KHZ:
1679 sample_rate_val = 8;
1680 break;
1681 case SAMPLING_RATE_88P2KHZ:
1682 sample_rate_val = 7;
1683 break;
1684 case SAMPLING_RATE_48KHZ:
1685 sample_rate_val = 6;
1686 break;
1687 case SAMPLING_RATE_44P1KHZ:
1688 sample_rate_val = 5;
1689 break;
1690 case SAMPLING_RATE_32KHZ:
1691 sample_rate_val = 4;
1692 break;
1693 case SAMPLING_RATE_22P05KHZ:
1694 sample_rate_val = 3;
1695 break;
1696 case SAMPLING_RATE_16KHZ:
1697 sample_rate_val = 2;
1698 break;
1699 case SAMPLING_RATE_11P025KHZ:
1700 sample_rate_val = 1;
1701 break;
1702 case SAMPLING_RATE_8KHZ:
1703 sample_rate_val = 0;
1704 break;
1705 default:
1706 sample_rate_val = 6;
1707 break;
1708 }
1709
1710 ucontrol->value.integer.value[0] = sample_rate_val;
1711 pr_debug("%s: cdc_dma_tx_sample_rate = %d\n", __func__,
1712 cdc_dma_tx_cfg[ch_num].sample_rate);
1713 return 0;
1714}
1715
1716static int cdc_dma_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
1717 struct snd_ctl_elem_value *ucontrol)
1718{
1719 int ch_num = cdc_dma_get_port_idx(kcontrol);
1720
Tanya Dixitd85e6f32018-09-14 16:06:20 +05301721 if (ch_num < 0) {
1722 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
1723 return ch_num;
1724 }
1725
Aditya Bavanari44eb8952018-05-09 19:01:50 +05301726 switch (ucontrol->value.integer.value[0]) {
1727 case 12:
1728 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_384KHZ;
1729 break;
1730 case 11:
1731 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_352P8KHZ;
1732 break;
1733 case 10:
1734 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_192KHZ;
1735 break;
1736 case 9:
1737 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_176P4KHZ;
1738 break;
1739 case 8:
1740 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_96KHZ;
1741 break;
1742 case 7:
1743 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_88P2KHZ;
1744 break;
1745 case 6:
1746 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_48KHZ;
1747 break;
1748 case 5:
1749 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_44P1KHZ;
1750 break;
1751 case 4:
1752 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_32KHZ;
1753 break;
1754 case 3:
1755 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_22P05KHZ;
1756 break;
1757 case 2:
1758 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_16KHZ;
1759 break;
1760 case 1:
1761 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_11P025KHZ;
1762 break;
1763 case 0:
1764 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_8KHZ;
1765 break;
1766 default:
1767 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_48KHZ;
1768 break;
1769 }
1770
1771 pr_debug("%s: control value = %ld, cdc_dma_tx_sample_rate = %d\n",
1772 __func__, ucontrol->value.integer.value[0],
1773 cdc_dma_tx_cfg[ch_num].sample_rate);
1774 return 0;
1775}
1776
1777static int cdc_dma_tx_format_get(struct snd_kcontrol *kcontrol,
1778 struct snd_ctl_elem_value *ucontrol)
1779{
1780 int ch_num = cdc_dma_get_port_idx(kcontrol);
1781
Tanya Dixitd85e6f32018-09-14 16:06:20 +05301782 if (ch_num < 0) {
1783 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
1784 return ch_num;
1785 }
1786
Aditya Bavanari44eb8952018-05-09 19:01:50 +05301787 switch (cdc_dma_tx_cfg[ch_num].bit_format) {
1788 case SNDRV_PCM_FORMAT_S32_LE:
1789 ucontrol->value.integer.value[0] = 3;
1790 break;
1791 case SNDRV_PCM_FORMAT_S24_3LE:
1792 ucontrol->value.integer.value[0] = 2;
1793 break;
1794 case SNDRV_PCM_FORMAT_S24_LE:
1795 ucontrol->value.integer.value[0] = 1;
1796 break;
1797 case SNDRV_PCM_FORMAT_S16_LE:
1798 default:
1799 ucontrol->value.integer.value[0] = 0;
1800 break;
1801 }
1802
1803 pr_debug("%s: cdc_dma_tx_format = %d, ucontrol value = %ld\n",
1804 __func__, cdc_dma_tx_cfg[ch_num].bit_format,
1805 ucontrol->value.integer.value[0]);
1806 return 0;
1807}
1808
1809static int cdc_dma_tx_format_put(struct snd_kcontrol *kcontrol,
1810 struct snd_ctl_elem_value *ucontrol)
1811{
1812 int rc = 0;
1813 int ch_num = cdc_dma_get_port_idx(kcontrol);
1814
Tanya Dixitd85e6f32018-09-14 16:06:20 +05301815 if (ch_num < 0) {
1816 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
1817 return ch_num;
1818 }
1819
Aditya Bavanari44eb8952018-05-09 19:01:50 +05301820 switch (ucontrol->value.integer.value[0]) {
1821 case 3:
1822 cdc_dma_tx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S32_LE;
1823 break;
1824 case 2:
1825 cdc_dma_tx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S24_3LE;
1826 break;
1827 case 1:
1828 cdc_dma_tx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S24_LE;
1829 break;
1830 case 0:
1831 default:
1832 cdc_dma_tx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S16_LE;
1833 break;
1834 }
1835 pr_debug("%s: cdc_dma_tx_format = %d, ucontrol value = %ld\n",
1836 __func__, cdc_dma_tx_cfg[ch_num].bit_format,
1837 ucontrol->value.integer.value[0]);
1838
1839 return rc;
1840}
1841
Aditya Bavanari44eb8952018-05-09 19:01:50 +05301842static int usb_audio_rx_ch_get(struct snd_kcontrol *kcontrol,
1843 struct snd_ctl_elem_value *ucontrol)
1844{
1845 pr_debug("%s: usb_audio_rx_ch = %d\n", __func__,
1846 usb_rx_cfg.channels);
1847 ucontrol->value.integer.value[0] = usb_rx_cfg.channels - 1;
1848 return 0;
1849}
1850
1851static int usb_audio_rx_ch_put(struct snd_kcontrol *kcontrol,
1852 struct snd_ctl_elem_value *ucontrol)
1853{
1854 usb_rx_cfg.channels = ucontrol->value.integer.value[0] + 1;
1855
1856 pr_debug("%s: usb_audio_rx_ch = %d\n", __func__, usb_rx_cfg.channels);
1857 return 1;
1858}
1859
1860static int usb_audio_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
1861 struct snd_ctl_elem_value *ucontrol)
1862{
1863 int sample_rate_val;
1864
1865 switch (usb_rx_cfg.sample_rate) {
1866 case SAMPLING_RATE_384KHZ:
1867 sample_rate_val = 12;
1868 break;
1869 case SAMPLING_RATE_352P8KHZ:
1870 sample_rate_val = 11;
1871 break;
1872 case SAMPLING_RATE_192KHZ:
1873 sample_rate_val = 10;
1874 break;
1875 case SAMPLING_RATE_176P4KHZ:
1876 sample_rate_val = 9;
1877 break;
1878 case SAMPLING_RATE_96KHZ:
1879 sample_rate_val = 8;
1880 break;
1881 case SAMPLING_RATE_88P2KHZ:
1882 sample_rate_val = 7;
1883 break;
1884 case SAMPLING_RATE_48KHZ:
1885 sample_rate_val = 6;
1886 break;
1887 case SAMPLING_RATE_44P1KHZ:
1888 sample_rate_val = 5;
1889 break;
1890 case SAMPLING_RATE_32KHZ:
1891 sample_rate_val = 4;
1892 break;
1893 case SAMPLING_RATE_22P05KHZ:
1894 sample_rate_val = 3;
1895 break;
1896 case SAMPLING_RATE_16KHZ:
1897 sample_rate_val = 2;
1898 break;
1899 case SAMPLING_RATE_11P025KHZ:
1900 sample_rate_val = 1;
1901 break;
1902 case SAMPLING_RATE_8KHZ:
1903 default:
1904 sample_rate_val = 0;
1905 break;
1906 }
1907
1908 ucontrol->value.integer.value[0] = sample_rate_val;
1909 pr_debug("%s: usb_audio_rx_sample_rate = %d\n", __func__,
1910 usb_rx_cfg.sample_rate);
1911 return 0;
1912}
1913
1914static int usb_audio_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
1915 struct snd_ctl_elem_value *ucontrol)
1916{
1917 switch (ucontrol->value.integer.value[0]) {
1918 case 12:
1919 usb_rx_cfg.sample_rate = SAMPLING_RATE_384KHZ;
1920 break;
1921 case 11:
1922 usb_rx_cfg.sample_rate = SAMPLING_RATE_352P8KHZ;
1923 break;
1924 case 10:
1925 usb_rx_cfg.sample_rate = SAMPLING_RATE_192KHZ;
1926 break;
1927 case 9:
1928 usb_rx_cfg.sample_rate = SAMPLING_RATE_176P4KHZ;
1929 break;
1930 case 8:
1931 usb_rx_cfg.sample_rate = SAMPLING_RATE_96KHZ;
1932 break;
1933 case 7:
1934 usb_rx_cfg.sample_rate = SAMPLING_RATE_88P2KHZ;
1935 break;
1936 case 6:
1937 usb_rx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
1938 break;
1939 case 5:
1940 usb_rx_cfg.sample_rate = SAMPLING_RATE_44P1KHZ;
1941 break;
1942 case 4:
1943 usb_rx_cfg.sample_rate = SAMPLING_RATE_32KHZ;
1944 break;
1945 case 3:
1946 usb_rx_cfg.sample_rate = SAMPLING_RATE_22P05KHZ;
1947 break;
1948 case 2:
1949 usb_rx_cfg.sample_rate = SAMPLING_RATE_16KHZ;
1950 break;
1951 case 1:
1952 usb_rx_cfg.sample_rate = SAMPLING_RATE_11P025KHZ;
1953 break;
1954 case 0:
1955 usb_rx_cfg.sample_rate = SAMPLING_RATE_8KHZ;
1956 break;
1957 default:
1958 usb_rx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
1959 break;
1960 }
1961
1962 pr_debug("%s: control value = %ld, usb_audio_rx_sample_rate = %d\n",
1963 __func__, ucontrol->value.integer.value[0],
1964 usb_rx_cfg.sample_rate);
1965 return 0;
1966}
1967
1968static int usb_audio_rx_format_get(struct snd_kcontrol *kcontrol,
1969 struct snd_ctl_elem_value *ucontrol)
1970{
1971 switch (usb_rx_cfg.bit_format) {
1972 case SNDRV_PCM_FORMAT_S32_LE:
1973 ucontrol->value.integer.value[0] = 3;
1974 break;
1975 case SNDRV_PCM_FORMAT_S24_3LE:
1976 ucontrol->value.integer.value[0] = 2;
1977 break;
1978 case SNDRV_PCM_FORMAT_S24_LE:
1979 ucontrol->value.integer.value[0] = 1;
1980 break;
1981 case SNDRV_PCM_FORMAT_S16_LE:
1982 default:
1983 ucontrol->value.integer.value[0] = 0;
1984 break;
1985 }
1986
1987 pr_debug("%s: usb_audio_rx_format = %d, ucontrol value = %ld\n",
1988 __func__, usb_rx_cfg.bit_format,
1989 ucontrol->value.integer.value[0]);
1990 return 0;
1991}
1992
1993static int usb_audio_rx_format_put(struct snd_kcontrol *kcontrol,
1994 struct snd_ctl_elem_value *ucontrol)
1995{
1996 int rc = 0;
1997
1998 switch (ucontrol->value.integer.value[0]) {
1999 case 3:
2000 usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S32_LE;
2001 break;
2002 case 2:
2003 usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_3LE;
2004 break;
2005 case 1:
2006 usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_LE;
2007 break;
2008 case 0:
2009 default:
2010 usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S16_LE;
2011 break;
2012 }
2013 pr_debug("%s: usb_audio_rx_format = %d, ucontrol value = %ld\n",
2014 __func__, usb_rx_cfg.bit_format,
2015 ucontrol->value.integer.value[0]);
2016
2017 return rc;
2018}
2019
2020static int usb_audio_tx_ch_get(struct snd_kcontrol *kcontrol,
2021 struct snd_ctl_elem_value *ucontrol)
2022{
2023 pr_debug("%s: usb_audio_tx_ch = %d\n", __func__,
2024 usb_tx_cfg.channels);
2025 ucontrol->value.integer.value[0] = usb_tx_cfg.channels - 1;
2026 return 0;
2027}
2028
2029static int usb_audio_tx_ch_put(struct snd_kcontrol *kcontrol,
2030 struct snd_ctl_elem_value *ucontrol)
2031{
2032 usb_tx_cfg.channels = ucontrol->value.integer.value[0] + 1;
2033
2034 pr_debug("%s: usb_audio_tx_ch = %d\n", __func__, usb_tx_cfg.channels);
2035 return 1;
2036}
2037
2038static int usb_audio_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
2039 struct snd_ctl_elem_value *ucontrol)
2040{
2041 int sample_rate_val;
2042
2043 switch (usb_tx_cfg.sample_rate) {
2044 case SAMPLING_RATE_384KHZ:
2045 sample_rate_val = 12;
2046 break;
2047 case SAMPLING_RATE_352P8KHZ:
2048 sample_rate_val = 11;
2049 break;
2050 case SAMPLING_RATE_192KHZ:
2051 sample_rate_val = 10;
2052 break;
2053 case SAMPLING_RATE_176P4KHZ:
2054 sample_rate_val = 9;
2055 break;
2056 case SAMPLING_RATE_96KHZ:
2057 sample_rate_val = 8;
2058 break;
2059 case SAMPLING_RATE_88P2KHZ:
2060 sample_rate_val = 7;
2061 break;
2062 case SAMPLING_RATE_48KHZ:
2063 sample_rate_val = 6;
2064 break;
2065 case SAMPLING_RATE_44P1KHZ:
2066 sample_rate_val = 5;
2067 break;
2068 case SAMPLING_RATE_32KHZ:
2069 sample_rate_val = 4;
2070 break;
2071 case SAMPLING_RATE_22P05KHZ:
2072 sample_rate_val = 3;
2073 break;
2074 case SAMPLING_RATE_16KHZ:
2075 sample_rate_val = 2;
2076 break;
2077 case SAMPLING_RATE_11P025KHZ:
2078 sample_rate_val = 1;
2079 break;
2080 case SAMPLING_RATE_8KHZ:
2081 sample_rate_val = 0;
2082 break;
2083 default:
2084 sample_rate_val = 6;
2085 break;
2086 }
2087
2088 ucontrol->value.integer.value[0] = sample_rate_val;
2089 pr_debug("%s: usb_audio_tx_sample_rate = %d\n", __func__,
2090 usb_tx_cfg.sample_rate);
2091 return 0;
2092}
2093
2094static int usb_audio_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
2095 struct snd_ctl_elem_value *ucontrol)
2096{
2097 switch (ucontrol->value.integer.value[0]) {
2098 case 12:
2099 usb_tx_cfg.sample_rate = SAMPLING_RATE_384KHZ;
2100 break;
2101 case 11:
2102 usb_tx_cfg.sample_rate = SAMPLING_RATE_352P8KHZ;
2103 break;
2104 case 10:
2105 usb_tx_cfg.sample_rate = SAMPLING_RATE_192KHZ;
2106 break;
2107 case 9:
2108 usb_tx_cfg.sample_rate = SAMPLING_RATE_176P4KHZ;
2109 break;
2110 case 8:
2111 usb_tx_cfg.sample_rate = SAMPLING_RATE_96KHZ;
2112 break;
2113 case 7:
2114 usb_tx_cfg.sample_rate = SAMPLING_RATE_88P2KHZ;
2115 break;
2116 case 6:
2117 usb_tx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
2118 break;
2119 case 5:
2120 usb_tx_cfg.sample_rate = SAMPLING_RATE_44P1KHZ;
2121 break;
2122 case 4:
2123 usb_tx_cfg.sample_rate = SAMPLING_RATE_32KHZ;
2124 break;
2125 case 3:
2126 usb_tx_cfg.sample_rate = SAMPLING_RATE_22P05KHZ;
2127 break;
2128 case 2:
2129 usb_tx_cfg.sample_rate = SAMPLING_RATE_16KHZ;
2130 break;
2131 case 1:
2132 usb_tx_cfg.sample_rate = SAMPLING_RATE_11P025KHZ;
2133 break;
2134 case 0:
2135 usb_tx_cfg.sample_rate = SAMPLING_RATE_8KHZ;
2136 break;
2137 default:
2138 usb_tx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
2139 break;
2140 }
2141
2142 pr_debug("%s: control value = %ld, usb_audio_tx_sample_rate = %d\n",
2143 __func__, ucontrol->value.integer.value[0],
2144 usb_tx_cfg.sample_rate);
2145 return 0;
2146}
2147
2148static int usb_audio_tx_format_get(struct snd_kcontrol *kcontrol,
2149 struct snd_ctl_elem_value *ucontrol)
2150{
2151 switch (usb_tx_cfg.bit_format) {
2152 case SNDRV_PCM_FORMAT_S32_LE:
2153 ucontrol->value.integer.value[0] = 3;
2154 break;
2155 case SNDRV_PCM_FORMAT_S24_3LE:
2156 ucontrol->value.integer.value[0] = 2;
2157 break;
2158 case SNDRV_PCM_FORMAT_S24_LE:
2159 ucontrol->value.integer.value[0] = 1;
2160 break;
2161 case SNDRV_PCM_FORMAT_S16_LE:
2162 default:
2163 ucontrol->value.integer.value[0] = 0;
2164 break;
2165 }
2166
2167 pr_debug("%s: usb_audio_tx_format = %d, ucontrol value = %ld\n",
2168 __func__, usb_tx_cfg.bit_format,
2169 ucontrol->value.integer.value[0]);
2170 return 0;
2171}
2172
2173static int usb_audio_tx_format_put(struct snd_kcontrol *kcontrol,
2174 struct snd_ctl_elem_value *ucontrol)
2175{
2176 int rc = 0;
2177
2178 switch (ucontrol->value.integer.value[0]) {
2179 case 3:
2180 usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S32_LE;
2181 break;
2182 case 2:
2183 usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_3LE;
2184 break;
2185 case 1:
2186 usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_LE;
2187 break;
2188 case 0:
2189 default:
2190 usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S16_LE;
2191 break;
2192 }
2193 pr_debug("%s: usb_audio_tx_format = %d, ucontrol value = %ld\n",
2194 __func__, usb_tx_cfg.bit_format,
2195 ucontrol->value.integer.value[0]);
2196
2197 return rc;
2198}
2199
2200static int ext_disp_get_port_idx(struct snd_kcontrol *kcontrol)
2201{
2202 int idx;
2203
2204 if (strnstr(kcontrol->id.name, "Display Port RX",
2205 sizeof("Display Port RX"))) {
2206 idx = DP_RX_IDX;
2207 } else {
2208 pr_err("%s: unsupported BE: %s\n",
2209 __func__, kcontrol->id.name);
2210 idx = -EINVAL;
2211 }
2212
2213 return idx;
2214}
2215
2216static int ext_disp_rx_format_get(struct snd_kcontrol *kcontrol,
2217 struct snd_ctl_elem_value *ucontrol)
2218{
2219 int idx = ext_disp_get_port_idx(kcontrol);
2220
2221 if (idx < 0)
2222 return idx;
2223
2224 switch (ext_disp_rx_cfg[idx].bit_format) {
2225 case SNDRV_PCM_FORMAT_S24_3LE:
2226 ucontrol->value.integer.value[0] = 2;
2227 break;
2228 case SNDRV_PCM_FORMAT_S24_LE:
2229 ucontrol->value.integer.value[0] = 1;
2230 break;
2231 case SNDRV_PCM_FORMAT_S16_LE:
2232 default:
2233 ucontrol->value.integer.value[0] = 0;
2234 break;
2235 }
2236
2237 pr_debug("%s: ext_disp_rx[%d].format = %d, ucontrol value = %ld\n",
2238 __func__, idx, ext_disp_rx_cfg[idx].bit_format,
2239 ucontrol->value.integer.value[0]);
2240 return 0;
2241}
2242
2243static int ext_disp_rx_format_put(struct snd_kcontrol *kcontrol,
2244 struct snd_ctl_elem_value *ucontrol)
2245{
2246 int idx = ext_disp_get_port_idx(kcontrol);
2247
2248 if (idx < 0)
2249 return idx;
2250
2251 switch (ucontrol->value.integer.value[0]) {
2252 case 2:
2253 ext_disp_rx_cfg[idx].bit_format = SNDRV_PCM_FORMAT_S24_3LE;
2254 break;
2255 case 1:
2256 ext_disp_rx_cfg[idx].bit_format = SNDRV_PCM_FORMAT_S24_LE;
2257 break;
2258 case 0:
2259 default:
2260 ext_disp_rx_cfg[idx].bit_format = SNDRV_PCM_FORMAT_S16_LE;
2261 break;
2262 }
2263 pr_debug("%s: ext_disp_rx[%d].format = %d, ucontrol value = %ld\n",
2264 __func__, idx, ext_disp_rx_cfg[idx].bit_format,
2265 ucontrol->value.integer.value[0]);
2266
2267 return 0;
2268}
2269
2270static int ext_disp_rx_ch_get(struct snd_kcontrol *kcontrol,
2271 struct snd_ctl_elem_value *ucontrol)
2272{
2273 int idx = ext_disp_get_port_idx(kcontrol);
2274
2275 if (idx < 0)
2276 return idx;
2277
2278 ucontrol->value.integer.value[0] =
2279 ext_disp_rx_cfg[idx].channels - 2;
2280
2281 pr_debug("%s: ext_disp_rx[%d].ch = %d\n", __func__,
2282 idx, ext_disp_rx_cfg[idx].channels);
2283
2284 return 0;
2285}
2286
2287static int ext_disp_rx_ch_put(struct snd_kcontrol *kcontrol,
2288 struct snd_ctl_elem_value *ucontrol)
2289{
2290 int idx = ext_disp_get_port_idx(kcontrol);
2291
2292 if (idx < 0)
2293 return idx;
2294
2295 ext_disp_rx_cfg[idx].channels =
2296 ucontrol->value.integer.value[0] + 2;
2297
2298 pr_debug("%s: ext_disp_rx[%d].ch = %d\n", __func__,
2299 idx, ext_disp_rx_cfg[idx].channels);
2300 return 1;
2301}
2302
2303static int ext_disp_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
2304 struct snd_ctl_elem_value *ucontrol)
2305{
2306 int sample_rate_val;
2307 int idx = ext_disp_get_port_idx(kcontrol);
2308
2309 if (idx < 0)
2310 return idx;
2311
2312 switch (ext_disp_rx_cfg[idx].sample_rate) {
2313 case SAMPLING_RATE_176P4KHZ:
2314 sample_rate_val = 6;
2315 break;
2316
2317 case SAMPLING_RATE_88P2KHZ:
2318 sample_rate_val = 5;
2319 break;
2320
2321 case SAMPLING_RATE_44P1KHZ:
2322 sample_rate_val = 4;
2323 break;
2324
2325 case SAMPLING_RATE_32KHZ:
2326 sample_rate_val = 3;
2327 break;
2328
2329 case SAMPLING_RATE_192KHZ:
2330 sample_rate_val = 2;
2331 break;
2332
2333 case SAMPLING_RATE_96KHZ:
2334 sample_rate_val = 1;
2335 break;
2336
2337 case SAMPLING_RATE_48KHZ:
2338 default:
2339 sample_rate_val = 0;
2340 break;
2341 }
2342
2343 ucontrol->value.integer.value[0] = sample_rate_val;
2344 pr_debug("%s: ext_disp_rx[%d].sample_rate = %d\n", __func__,
2345 idx, ext_disp_rx_cfg[idx].sample_rate);
2346
2347 return 0;
2348}
2349
2350static int ext_disp_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
2351 struct snd_ctl_elem_value *ucontrol)
2352{
2353 int idx = ext_disp_get_port_idx(kcontrol);
2354
2355 if (idx < 0)
2356 return idx;
2357
2358 switch (ucontrol->value.integer.value[0]) {
2359 case 6:
2360 ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_176P4KHZ;
2361 break;
2362 case 5:
2363 ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_88P2KHZ;
2364 break;
2365 case 4:
2366 ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_44P1KHZ;
2367 break;
2368 case 3:
2369 ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_32KHZ;
2370 break;
2371 case 2:
2372 ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_192KHZ;
2373 break;
2374 case 1:
2375 ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_96KHZ;
2376 break;
2377 case 0:
2378 default:
2379 ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_48KHZ;
2380 break;
2381 }
2382
2383 pr_debug("%s: control value = %ld, ext_disp_rx[%d].sample_rate = %d\n",
2384 __func__, ucontrol->value.integer.value[0], idx,
2385 ext_disp_rx_cfg[idx].sample_rate);
2386 return 0;
2387}
2388
2389static int proxy_rx_ch_get(struct snd_kcontrol *kcontrol,
2390 struct snd_ctl_elem_value *ucontrol)
2391{
2392 pr_debug("%s: proxy_rx channels = %d\n",
2393 __func__, proxy_rx_cfg.channels);
2394 ucontrol->value.integer.value[0] = proxy_rx_cfg.channels - 2;
2395
2396 return 0;
2397}
2398
2399static int proxy_rx_ch_put(struct snd_kcontrol *kcontrol,
2400 struct snd_ctl_elem_value *ucontrol)
2401{
2402 proxy_rx_cfg.channels = ucontrol->value.integer.value[0] + 2;
2403 pr_debug("%s: proxy_rx channels = %d\n",
2404 __func__, proxy_rx_cfg.channels);
2405
2406 return 1;
2407}
2408
2409static int tdm_get_sample_rate(int value)
2410{
2411 int sample_rate = 0;
2412
2413 switch (value) {
2414 case 0:
2415 sample_rate = SAMPLING_RATE_8KHZ;
2416 break;
2417 case 1:
2418 sample_rate = SAMPLING_RATE_16KHZ;
2419 break;
2420 case 2:
2421 sample_rate = SAMPLING_RATE_32KHZ;
2422 break;
2423 case 3:
2424 sample_rate = SAMPLING_RATE_48KHZ;
2425 break;
2426 case 4:
2427 sample_rate = SAMPLING_RATE_176P4KHZ;
2428 break;
2429 case 5:
2430 sample_rate = SAMPLING_RATE_352P8KHZ;
2431 break;
2432 default:
2433 sample_rate = SAMPLING_RATE_48KHZ;
2434 break;
2435 }
2436 return sample_rate;
2437}
2438
2439static int aux_pcm_get_sample_rate(int value)
2440{
2441 int sample_rate;
2442
2443 switch (value) {
2444 case 1:
2445 sample_rate = SAMPLING_RATE_16KHZ;
2446 break;
2447 case 0:
2448 default:
2449 sample_rate = SAMPLING_RATE_8KHZ;
2450 break;
2451 }
2452 return sample_rate;
2453}
2454
2455static int tdm_get_sample_rate_val(int sample_rate)
2456{
2457 int sample_rate_val = 0;
2458
2459 switch (sample_rate) {
2460 case SAMPLING_RATE_8KHZ:
2461 sample_rate_val = 0;
2462 break;
2463 case SAMPLING_RATE_16KHZ:
2464 sample_rate_val = 1;
2465 break;
2466 case SAMPLING_RATE_32KHZ:
2467 sample_rate_val = 2;
2468 break;
2469 case SAMPLING_RATE_48KHZ:
2470 sample_rate_val = 3;
2471 break;
2472 case SAMPLING_RATE_176P4KHZ:
2473 sample_rate_val = 4;
2474 break;
2475 case SAMPLING_RATE_352P8KHZ:
2476 sample_rate_val = 5;
2477 break;
2478 default:
2479 sample_rate_val = 3;
2480 break;
2481 }
2482 return sample_rate_val;
2483}
2484
2485static int aux_pcm_get_sample_rate_val(int sample_rate)
2486{
2487 int sample_rate_val;
2488
2489 switch (sample_rate) {
2490 case SAMPLING_RATE_16KHZ:
2491 sample_rate_val = 1;
2492 break;
2493 case SAMPLING_RATE_8KHZ:
2494 default:
2495 sample_rate_val = 0;
2496 break;
2497 }
2498 return sample_rate_val;
2499}
2500
2501static int tdm_get_port_idx(struct snd_kcontrol *kcontrol,
2502 struct tdm_port *port)
2503{
2504 if (port) {
2505 if (strnstr(kcontrol->id.name, "PRI",
2506 sizeof(kcontrol->id.name))) {
2507 port->mode = TDM_PRI;
2508 } else if (strnstr(kcontrol->id.name, "SEC",
2509 sizeof(kcontrol->id.name))) {
2510 port->mode = TDM_SEC;
2511 } else if (strnstr(kcontrol->id.name, "TERT",
2512 sizeof(kcontrol->id.name))) {
2513 port->mode = TDM_TERT;
2514 } else if (strnstr(kcontrol->id.name, "QUAT",
2515 sizeof(kcontrol->id.name))) {
2516 port->mode = TDM_QUAT;
2517 } else if (strnstr(kcontrol->id.name, "QUIN",
2518 sizeof(kcontrol->id.name))) {
2519 port->mode = TDM_QUIN;
2520 } else {
2521 pr_err("%s: unsupported mode in: %s\n",
2522 __func__, kcontrol->id.name);
2523 return -EINVAL;
2524 }
2525
2526 if (strnstr(kcontrol->id.name, "RX_0",
2527 sizeof(kcontrol->id.name)) ||
2528 strnstr(kcontrol->id.name, "TX_0",
2529 sizeof(kcontrol->id.name))) {
2530 port->channel = TDM_0;
2531 } else if (strnstr(kcontrol->id.name, "RX_1",
2532 sizeof(kcontrol->id.name)) ||
2533 strnstr(kcontrol->id.name, "TX_1",
2534 sizeof(kcontrol->id.name))) {
2535 port->channel = TDM_1;
2536 } else if (strnstr(kcontrol->id.name, "RX_2",
2537 sizeof(kcontrol->id.name)) ||
2538 strnstr(kcontrol->id.name, "TX_2",
2539 sizeof(kcontrol->id.name))) {
2540 port->channel = TDM_2;
2541 } else if (strnstr(kcontrol->id.name, "RX_3",
2542 sizeof(kcontrol->id.name)) ||
2543 strnstr(kcontrol->id.name, "TX_3",
2544 sizeof(kcontrol->id.name))) {
2545 port->channel = TDM_3;
2546 } else if (strnstr(kcontrol->id.name, "RX_4",
2547 sizeof(kcontrol->id.name)) ||
2548 strnstr(kcontrol->id.name, "TX_4",
2549 sizeof(kcontrol->id.name))) {
2550 port->channel = TDM_4;
2551 } else if (strnstr(kcontrol->id.name, "RX_5",
2552 sizeof(kcontrol->id.name)) ||
2553 strnstr(kcontrol->id.name, "TX_5",
2554 sizeof(kcontrol->id.name))) {
2555 port->channel = TDM_5;
2556 } else if (strnstr(kcontrol->id.name, "RX_6",
2557 sizeof(kcontrol->id.name)) ||
2558 strnstr(kcontrol->id.name, "TX_6",
2559 sizeof(kcontrol->id.name))) {
2560 port->channel = TDM_6;
2561 } else if (strnstr(kcontrol->id.name, "RX_7",
2562 sizeof(kcontrol->id.name)) ||
2563 strnstr(kcontrol->id.name, "TX_7",
2564 sizeof(kcontrol->id.name))) {
2565 port->channel = TDM_7;
2566 } else {
2567 pr_err("%s: unsupported channel in: %s\n",
2568 __func__, kcontrol->id.name);
2569 return -EINVAL;
2570 }
2571 } else {
2572 return -EINVAL;
2573 }
2574 return 0;
2575}
2576
2577static int tdm_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
2578 struct snd_ctl_elem_value *ucontrol)
2579{
2580 struct tdm_port port;
2581 int ret = tdm_get_port_idx(kcontrol, &port);
2582
2583 if (ret) {
2584 pr_err("%s: unsupported control: %s\n",
2585 __func__, kcontrol->id.name);
2586 } else {
2587 ucontrol->value.enumerated.item[0] = tdm_get_sample_rate_val(
2588 tdm_rx_cfg[port.mode][port.channel].sample_rate);
2589
2590 pr_debug("%s: tdm_rx_sample_rate = %d, item = %d\n", __func__,
2591 tdm_rx_cfg[port.mode][port.channel].sample_rate,
2592 ucontrol->value.enumerated.item[0]);
2593 }
2594 return ret;
2595}
2596
2597static int tdm_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
2598 struct snd_ctl_elem_value *ucontrol)
2599{
2600 struct tdm_port port;
2601 int ret = tdm_get_port_idx(kcontrol, &port);
2602
2603 if (ret) {
2604 pr_err("%s: unsupported control: %s\n",
2605 __func__, kcontrol->id.name);
2606 } else {
2607 tdm_rx_cfg[port.mode][port.channel].sample_rate =
2608 tdm_get_sample_rate(ucontrol->value.enumerated.item[0]);
2609
2610 pr_debug("%s: tdm_rx_sample_rate = %d, item = %d\n", __func__,
2611 tdm_rx_cfg[port.mode][port.channel].sample_rate,
2612 ucontrol->value.enumerated.item[0]);
2613 }
2614 return ret;
2615}
2616
2617static int tdm_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
2618 struct snd_ctl_elem_value *ucontrol)
2619{
2620 struct tdm_port port;
2621 int ret = tdm_get_port_idx(kcontrol, &port);
2622
2623 if (ret) {
2624 pr_err("%s: unsupported control: %s\n",
2625 __func__, kcontrol->id.name);
2626 } else {
2627 ucontrol->value.enumerated.item[0] = tdm_get_sample_rate_val(
2628 tdm_tx_cfg[port.mode][port.channel].sample_rate);
2629
2630 pr_debug("%s: tdm_tx_sample_rate = %d, item = %d\n", __func__,
2631 tdm_tx_cfg[port.mode][port.channel].sample_rate,
2632 ucontrol->value.enumerated.item[0]);
2633 }
2634 return ret;
2635}
2636
2637static int tdm_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
2638 struct snd_ctl_elem_value *ucontrol)
2639{
2640 struct tdm_port port;
2641 int ret = tdm_get_port_idx(kcontrol, &port);
2642
2643 if (ret) {
2644 pr_err("%s: unsupported control: %s\n",
2645 __func__, kcontrol->id.name);
2646 } else {
2647 tdm_tx_cfg[port.mode][port.channel].sample_rate =
2648 tdm_get_sample_rate(ucontrol->value.enumerated.item[0]);
2649
2650 pr_debug("%s: tdm_tx_sample_rate = %d, item = %d\n", __func__,
2651 tdm_tx_cfg[port.mode][port.channel].sample_rate,
2652 ucontrol->value.enumerated.item[0]);
2653 }
2654 return ret;
2655}
2656
2657static int tdm_get_format(int value)
2658{
2659 int format = 0;
2660
2661 switch (value) {
2662 case 0:
2663 format = SNDRV_PCM_FORMAT_S16_LE;
2664 break;
2665 case 1:
2666 format = SNDRV_PCM_FORMAT_S24_LE;
2667 break;
2668 case 2:
2669 format = SNDRV_PCM_FORMAT_S32_LE;
2670 break;
2671 default:
2672 format = SNDRV_PCM_FORMAT_S16_LE;
2673 break;
2674 }
2675 return format;
2676}
2677
2678static int tdm_get_format_val(int format)
2679{
2680 int value = 0;
2681
2682 switch (format) {
2683 case SNDRV_PCM_FORMAT_S16_LE:
2684 value = 0;
2685 break;
2686 case SNDRV_PCM_FORMAT_S24_LE:
2687 value = 1;
2688 break;
2689 case SNDRV_PCM_FORMAT_S32_LE:
2690 value = 2;
2691 break;
2692 default:
2693 value = 0;
2694 break;
2695 }
2696 return value;
2697}
2698
2699static int tdm_rx_format_get(struct snd_kcontrol *kcontrol,
2700 struct snd_ctl_elem_value *ucontrol)
2701{
2702 struct tdm_port port;
2703 int ret = tdm_get_port_idx(kcontrol, &port);
2704
2705 if (ret) {
2706 pr_err("%s: unsupported control: %s\n",
2707 __func__, kcontrol->id.name);
2708 } else {
2709 ucontrol->value.enumerated.item[0] = tdm_get_format_val(
2710 tdm_rx_cfg[port.mode][port.channel].bit_format);
2711
2712 pr_debug("%s: tdm_rx_bit_format = %d, item = %d\n", __func__,
2713 tdm_rx_cfg[port.mode][port.channel].bit_format,
2714 ucontrol->value.enumerated.item[0]);
2715 }
2716 return ret;
2717}
2718
2719static int tdm_rx_format_put(struct snd_kcontrol *kcontrol,
2720 struct snd_ctl_elem_value *ucontrol)
2721{
2722 struct tdm_port port;
2723 int ret = tdm_get_port_idx(kcontrol, &port);
2724
2725 if (ret) {
2726 pr_err("%s: unsupported control: %s\n",
2727 __func__, kcontrol->id.name);
2728 } else {
2729 tdm_rx_cfg[port.mode][port.channel].bit_format =
2730 tdm_get_format(ucontrol->value.enumerated.item[0]);
2731
2732 pr_debug("%s: tdm_rx_bit_format = %d, item = %d\n", __func__,
2733 tdm_rx_cfg[port.mode][port.channel].bit_format,
2734 ucontrol->value.enumerated.item[0]);
2735 }
2736 return ret;
2737}
2738
2739static int tdm_tx_format_get(struct snd_kcontrol *kcontrol,
2740 struct snd_ctl_elem_value *ucontrol)
2741{
2742 struct tdm_port port;
2743 int ret = tdm_get_port_idx(kcontrol, &port);
2744
2745 if (ret) {
2746 pr_err("%s: unsupported control: %s\n",
2747 __func__, kcontrol->id.name);
2748 } else {
2749 ucontrol->value.enumerated.item[0] = tdm_get_format_val(
2750 tdm_tx_cfg[port.mode][port.channel].bit_format);
2751
2752 pr_debug("%s: tdm_tx_bit_format = %d, item = %d\n", __func__,
2753 tdm_tx_cfg[port.mode][port.channel].bit_format,
2754 ucontrol->value.enumerated.item[0]);
2755 }
2756 return ret;
2757}
2758
2759static int tdm_tx_format_put(struct snd_kcontrol *kcontrol,
2760 struct snd_ctl_elem_value *ucontrol)
2761{
2762 struct tdm_port port;
2763 int ret = tdm_get_port_idx(kcontrol, &port);
2764
2765 if (ret) {
2766 pr_err("%s: unsupported control: %s\n",
2767 __func__, kcontrol->id.name);
2768 } else {
2769 tdm_tx_cfg[port.mode][port.channel].bit_format =
2770 tdm_get_format(ucontrol->value.enumerated.item[0]);
2771
2772 pr_debug("%s: tdm_tx_bit_format = %d, item = %d\n", __func__,
2773 tdm_tx_cfg[port.mode][port.channel].bit_format,
2774 ucontrol->value.enumerated.item[0]);
2775 }
2776 return ret;
2777}
2778
2779static int tdm_rx_ch_get(struct snd_kcontrol *kcontrol,
2780 struct snd_ctl_elem_value *ucontrol)
2781{
2782 struct tdm_port port;
2783 int ret = tdm_get_port_idx(kcontrol, &port);
2784
2785 if (ret) {
2786 pr_err("%s: unsupported control: %s\n",
2787 __func__, kcontrol->id.name);
2788 } else {
2789
2790 ucontrol->value.enumerated.item[0] =
2791 tdm_rx_cfg[port.mode][port.channel].channels - 1;
2792
2793 pr_debug("%s: tdm_rx_ch = %d, item = %d\n", __func__,
2794 tdm_rx_cfg[port.mode][port.channel].channels - 1,
2795 ucontrol->value.enumerated.item[0]);
2796 }
2797 return ret;
2798}
2799
2800static int tdm_rx_ch_put(struct snd_kcontrol *kcontrol,
2801 struct snd_ctl_elem_value *ucontrol)
2802{
2803 struct tdm_port port;
2804 int ret = tdm_get_port_idx(kcontrol, &port);
2805
2806 if (ret) {
2807 pr_err("%s: unsupported control: %s\n",
2808 __func__, kcontrol->id.name);
2809 } else {
2810 tdm_rx_cfg[port.mode][port.channel].channels =
2811 ucontrol->value.enumerated.item[0] + 1;
2812
2813 pr_debug("%s: tdm_rx_ch = %d, item = %d\n", __func__,
2814 tdm_rx_cfg[port.mode][port.channel].channels,
2815 ucontrol->value.enumerated.item[0] + 1);
2816 }
2817 return ret;
2818}
2819
2820static int tdm_tx_ch_get(struct snd_kcontrol *kcontrol,
2821 struct snd_ctl_elem_value *ucontrol)
2822{
2823 struct tdm_port port;
2824 int ret = tdm_get_port_idx(kcontrol, &port);
2825
2826 if (ret) {
2827 pr_err("%s: unsupported control: %s\n",
2828 __func__, kcontrol->id.name);
2829 } else {
2830 ucontrol->value.enumerated.item[0] =
2831 tdm_tx_cfg[port.mode][port.channel].channels - 1;
2832
2833 pr_debug("%s: tdm_tx_ch = %d, item = %d\n", __func__,
2834 tdm_tx_cfg[port.mode][port.channel].channels - 1,
2835 ucontrol->value.enumerated.item[0]);
2836 }
2837 return ret;
2838}
2839
2840static int tdm_tx_ch_put(struct snd_kcontrol *kcontrol,
2841 struct snd_ctl_elem_value *ucontrol)
2842{
2843 struct tdm_port port;
2844 int ret = tdm_get_port_idx(kcontrol, &port);
2845
2846 if (ret) {
2847 pr_err("%s: unsupported control: %s\n",
2848 __func__, kcontrol->id.name);
2849 } else {
2850 tdm_tx_cfg[port.mode][port.channel].channels =
2851 ucontrol->value.enumerated.item[0] + 1;
2852
2853 pr_debug("%s: tdm_tx_ch = %d, item = %d\n", __func__,
2854 tdm_tx_cfg[port.mode][port.channel].channels,
2855 ucontrol->value.enumerated.item[0] + 1);
2856 }
2857 return ret;
2858}
2859
2860static int aux_pcm_get_port_idx(struct snd_kcontrol *kcontrol)
2861{
2862 int idx;
2863
2864 if (strnstr(kcontrol->id.name, "PRIM_AUX_PCM",
2865 sizeof("PRIM_AUX_PCM"))) {
2866 idx = PRIM_AUX_PCM;
2867 } else if (strnstr(kcontrol->id.name, "SEC_AUX_PCM",
2868 sizeof("SEC_AUX_PCM"))) {
2869 idx = SEC_AUX_PCM;
2870 } else if (strnstr(kcontrol->id.name, "TERT_AUX_PCM",
2871 sizeof("TERT_AUX_PCM"))) {
2872 idx = TERT_AUX_PCM;
2873 } else if (strnstr(kcontrol->id.name, "QUAT_AUX_PCM",
2874 sizeof("QUAT_AUX_PCM"))) {
2875 idx = QUAT_AUX_PCM;
2876 } else if (strnstr(kcontrol->id.name, "QUIN_AUX_PCM",
2877 sizeof("QUIN_AUX_PCM"))) {
2878 idx = QUIN_AUX_PCM;
2879 } else {
2880 pr_err("%s: unsupported port: %s\n",
2881 __func__, kcontrol->id.name);
2882 idx = -EINVAL;
2883 }
2884
2885 return idx;
2886}
2887
2888static int aux_pcm_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
2889 struct snd_ctl_elem_value *ucontrol)
2890{
2891 int idx = aux_pcm_get_port_idx(kcontrol);
2892
2893 if (idx < 0)
2894 return idx;
2895
2896 aux_pcm_rx_cfg[idx].sample_rate =
2897 aux_pcm_get_sample_rate(ucontrol->value.enumerated.item[0]);
2898
2899 pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
2900 idx, aux_pcm_rx_cfg[idx].sample_rate,
2901 ucontrol->value.enumerated.item[0]);
2902
2903 return 0;
2904}
2905
2906static int aux_pcm_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
2907 struct snd_ctl_elem_value *ucontrol)
2908{
2909 int idx = aux_pcm_get_port_idx(kcontrol);
2910
2911 if (idx < 0)
2912 return idx;
2913
2914 ucontrol->value.enumerated.item[0] =
2915 aux_pcm_get_sample_rate_val(aux_pcm_rx_cfg[idx].sample_rate);
2916
2917 pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
2918 idx, aux_pcm_rx_cfg[idx].sample_rate,
2919 ucontrol->value.enumerated.item[0]);
2920
2921 return 0;
2922}
2923
2924static int aux_pcm_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
2925 struct snd_ctl_elem_value *ucontrol)
2926{
2927 int idx = aux_pcm_get_port_idx(kcontrol);
2928
2929 if (idx < 0)
2930 return idx;
2931
2932 aux_pcm_tx_cfg[idx].sample_rate =
2933 aux_pcm_get_sample_rate(ucontrol->value.enumerated.item[0]);
2934
2935 pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
2936 idx, aux_pcm_tx_cfg[idx].sample_rate,
2937 ucontrol->value.enumerated.item[0]);
2938
2939 return 0;
2940}
2941
2942static int aux_pcm_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
2943 struct snd_ctl_elem_value *ucontrol)
2944{
2945 int idx = aux_pcm_get_port_idx(kcontrol);
2946
2947 if (idx < 0)
2948 return idx;
2949
2950 ucontrol->value.enumerated.item[0] =
2951 aux_pcm_get_sample_rate_val(aux_pcm_tx_cfg[idx].sample_rate);
2952
2953 pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
2954 idx, aux_pcm_tx_cfg[idx].sample_rate,
2955 ucontrol->value.enumerated.item[0]);
2956
2957 return 0;
2958}
2959
2960static int mi2s_get_port_idx(struct snd_kcontrol *kcontrol)
2961{
2962 int idx;
2963
2964 if (strnstr(kcontrol->id.name, "PRIM_MI2S_RX",
2965 sizeof("PRIM_MI2S_RX"))) {
2966 idx = PRIM_MI2S;
2967 } else if (strnstr(kcontrol->id.name, "SEC_MI2S_RX",
2968 sizeof("SEC_MI2S_RX"))) {
2969 idx = SEC_MI2S;
2970 } else if (strnstr(kcontrol->id.name, "TERT_MI2S_RX",
2971 sizeof("TERT_MI2S_RX"))) {
2972 idx = TERT_MI2S;
2973 } else if (strnstr(kcontrol->id.name, "QUAT_MI2S_RX",
2974 sizeof("QUAT_MI2S_RX"))) {
2975 idx = QUAT_MI2S;
2976 } else if (strnstr(kcontrol->id.name, "QUIN_MI2S_RX",
2977 sizeof("QUIN_MI2S_RX"))) {
2978 idx = QUIN_MI2S;
2979 } else if (strnstr(kcontrol->id.name, "PRIM_MI2S_TX",
2980 sizeof("PRIM_MI2S_TX"))) {
2981 idx = PRIM_MI2S;
2982 } else if (strnstr(kcontrol->id.name, "SEC_MI2S_TX",
2983 sizeof("SEC_MI2S_TX"))) {
2984 idx = SEC_MI2S;
2985 } else if (strnstr(kcontrol->id.name, "TERT_MI2S_TX",
2986 sizeof("TERT_MI2S_TX"))) {
2987 idx = TERT_MI2S;
2988 } else if (strnstr(kcontrol->id.name, "QUAT_MI2S_TX",
2989 sizeof("QUAT_MI2S_TX"))) {
2990 idx = QUAT_MI2S;
2991 } else if (strnstr(kcontrol->id.name, "QUIN_MI2S_TX",
2992 sizeof("QUIN_MI2S_TX"))) {
2993 idx = QUIN_MI2S;
2994 } else {
2995 pr_err("%s: unsupported channel: %s\n",
2996 __func__, kcontrol->id.name);
2997 idx = -EINVAL;
2998 }
2999
3000 return idx;
3001}
3002
3003static int mi2s_get_sample_rate_val(int sample_rate)
3004{
3005 int sample_rate_val;
3006
3007 switch (sample_rate) {
3008 case SAMPLING_RATE_8KHZ:
3009 sample_rate_val = 0;
3010 break;
3011 case SAMPLING_RATE_11P025KHZ:
3012 sample_rate_val = 1;
3013 break;
3014 case SAMPLING_RATE_16KHZ:
3015 sample_rate_val = 2;
3016 break;
3017 case SAMPLING_RATE_22P05KHZ:
3018 sample_rate_val = 3;
3019 break;
3020 case SAMPLING_RATE_32KHZ:
3021 sample_rate_val = 4;
3022 break;
3023 case SAMPLING_RATE_44P1KHZ:
3024 sample_rate_val = 5;
3025 break;
3026 case SAMPLING_RATE_48KHZ:
3027 sample_rate_val = 6;
3028 break;
3029 case SAMPLING_RATE_96KHZ:
3030 sample_rate_val = 7;
3031 break;
3032 case SAMPLING_RATE_192KHZ:
3033 sample_rate_val = 8;
3034 break;
3035 default:
3036 sample_rate_val = 6;
3037 break;
3038 }
3039 return sample_rate_val;
3040}
3041
3042static int mi2s_get_sample_rate(int value)
3043{
3044 int sample_rate;
3045
3046 switch (value) {
3047 case 0:
3048 sample_rate = SAMPLING_RATE_8KHZ;
3049 break;
3050 case 1:
3051 sample_rate = SAMPLING_RATE_11P025KHZ;
3052 break;
3053 case 2:
3054 sample_rate = SAMPLING_RATE_16KHZ;
3055 break;
3056 case 3:
3057 sample_rate = SAMPLING_RATE_22P05KHZ;
3058 break;
3059 case 4:
3060 sample_rate = SAMPLING_RATE_32KHZ;
3061 break;
3062 case 5:
3063 sample_rate = SAMPLING_RATE_44P1KHZ;
3064 break;
3065 case 6:
3066 sample_rate = SAMPLING_RATE_48KHZ;
3067 break;
3068 case 7:
3069 sample_rate = SAMPLING_RATE_96KHZ;
3070 break;
3071 case 8:
3072 sample_rate = SAMPLING_RATE_192KHZ;
3073 break;
3074 default:
3075 sample_rate = SAMPLING_RATE_48KHZ;
3076 break;
3077 }
3078 return sample_rate;
3079}
3080
3081static int mi2s_auxpcm_get_format(int value)
3082{
3083 int format;
3084
3085 switch (value) {
3086 case 0:
3087 format = SNDRV_PCM_FORMAT_S16_LE;
3088 break;
3089 case 1:
3090 format = SNDRV_PCM_FORMAT_S24_LE;
3091 break;
3092 case 2:
3093 format = SNDRV_PCM_FORMAT_S24_3LE;
3094 break;
3095 case 3:
3096 format = SNDRV_PCM_FORMAT_S32_LE;
3097 break;
3098 default:
3099 format = SNDRV_PCM_FORMAT_S16_LE;
3100 break;
3101 }
3102 return format;
3103}
3104
3105static int mi2s_auxpcm_get_format_value(int format)
3106{
3107 int value;
3108
3109 switch (format) {
3110 case SNDRV_PCM_FORMAT_S16_LE:
3111 value = 0;
3112 break;
3113 case SNDRV_PCM_FORMAT_S24_LE:
3114 value = 1;
3115 break;
3116 case SNDRV_PCM_FORMAT_S24_3LE:
3117 value = 2;
3118 break;
3119 case SNDRV_PCM_FORMAT_S32_LE:
3120 value = 3;
3121 break;
3122 default:
3123 value = 0;
3124 break;
3125 }
3126 return value;
3127}
3128
3129static int mi2s_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
3130 struct snd_ctl_elem_value *ucontrol)
3131{
3132 int idx = mi2s_get_port_idx(kcontrol);
3133
3134 if (idx < 0)
3135 return idx;
3136
3137 mi2s_rx_cfg[idx].sample_rate =
3138 mi2s_get_sample_rate(ucontrol->value.enumerated.item[0]);
3139
3140 pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
3141 idx, mi2s_rx_cfg[idx].sample_rate,
3142 ucontrol->value.enumerated.item[0]);
3143
3144 return 0;
3145}
3146
3147static int mi2s_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
3148 struct snd_ctl_elem_value *ucontrol)
3149{
3150 int idx = mi2s_get_port_idx(kcontrol);
3151
3152 if (idx < 0)
3153 return idx;
3154
3155 ucontrol->value.enumerated.item[0] =
3156 mi2s_get_sample_rate_val(mi2s_rx_cfg[idx].sample_rate);
3157
3158 pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
3159 idx, mi2s_rx_cfg[idx].sample_rate,
3160 ucontrol->value.enumerated.item[0]);
3161
3162 return 0;
3163}
3164
3165static int mi2s_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
3166 struct snd_ctl_elem_value *ucontrol)
3167{
3168 int idx = mi2s_get_port_idx(kcontrol);
3169
3170 if (idx < 0)
3171 return idx;
3172
3173 mi2s_tx_cfg[idx].sample_rate =
3174 mi2s_get_sample_rate(ucontrol->value.enumerated.item[0]);
3175
3176 pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
3177 idx, mi2s_tx_cfg[idx].sample_rate,
3178 ucontrol->value.enumerated.item[0]);
3179
3180 return 0;
3181}
3182
3183static int mi2s_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
3184 struct snd_ctl_elem_value *ucontrol)
3185{
3186 int idx = mi2s_get_port_idx(kcontrol);
3187
3188 if (idx < 0)
3189 return idx;
3190
3191 ucontrol->value.enumerated.item[0] =
3192 mi2s_get_sample_rate_val(mi2s_tx_cfg[idx].sample_rate);
3193
3194 pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
3195 idx, mi2s_tx_cfg[idx].sample_rate,
3196 ucontrol->value.enumerated.item[0]);
3197
3198 return 0;
3199}
3200
3201static int msm_mi2s_rx_ch_get(struct snd_kcontrol *kcontrol,
3202 struct snd_ctl_elem_value *ucontrol)
3203{
3204 int idx = mi2s_get_port_idx(kcontrol);
3205
3206 if (idx < 0)
3207 return idx;
3208
3209 pr_debug("%s: msm_mi2s_[%d]_rx_ch = %d\n", __func__,
3210 idx, mi2s_rx_cfg[idx].channels);
3211 ucontrol->value.enumerated.item[0] = mi2s_rx_cfg[idx].channels - 1;
3212
3213 return 0;
3214}
3215
3216static int msm_mi2s_rx_ch_put(struct snd_kcontrol *kcontrol,
3217 struct snd_ctl_elem_value *ucontrol)
3218{
3219 int idx = mi2s_get_port_idx(kcontrol);
3220
3221 if (idx < 0)
3222 return idx;
3223
3224 mi2s_rx_cfg[idx].channels = ucontrol->value.enumerated.item[0] + 1;
3225 pr_debug("%s: msm_mi2s_[%d]_rx_ch = %d\n", __func__,
3226 idx, mi2s_rx_cfg[idx].channels);
3227
3228 return 1;
3229}
3230
3231static int msm_mi2s_tx_ch_get(struct snd_kcontrol *kcontrol,
3232 struct snd_ctl_elem_value *ucontrol)
3233{
3234 int idx = mi2s_get_port_idx(kcontrol);
3235
3236 if (idx < 0)
3237 return idx;
3238
3239 pr_debug("%s: msm_mi2s_[%d]_tx_ch = %d\n", __func__,
3240 idx, mi2s_tx_cfg[idx].channels);
3241 ucontrol->value.enumerated.item[0] = mi2s_tx_cfg[idx].channels - 1;
3242
3243 return 0;
3244}
3245
3246static int msm_mi2s_tx_ch_put(struct snd_kcontrol *kcontrol,
3247 struct snd_ctl_elem_value *ucontrol)
3248{
3249 int idx = mi2s_get_port_idx(kcontrol);
3250
3251 if (idx < 0)
3252 return idx;
3253
3254 mi2s_tx_cfg[idx].channels = ucontrol->value.enumerated.item[0] + 1;
3255 pr_debug("%s: msm_mi2s_[%d]_tx_ch = %d\n", __func__,
3256 idx, mi2s_tx_cfg[idx].channels);
3257
3258 return 1;
3259}
3260
3261static int msm_mi2s_rx_format_get(struct snd_kcontrol *kcontrol,
3262 struct snd_ctl_elem_value *ucontrol)
3263{
3264 int idx = mi2s_get_port_idx(kcontrol);
3265
3266 if (idx < 0)
3267 return idx;
3268
3269 ucontrol->value.enumerated.item[0] =
3270 mi2s_auxpcm_get_format_value(mi2s_rx_cfg[idx].bit_format);
3271
3272 pr_debug("%s: idx[%d]_rx_format = %d, item = %d\n", __func__,
3273 idx, mi2s_rx_cfg[idx].bit_format,
3274 ucontrol->value.enumerated.item[0]);
3275
3276 return 0;
3277}
3278
3279static int msm_mi2s_rx_format_put(struct snd_kcontrol *kcontrol,
3280 struct snd_ctl_elem_value *ucontrol)
3281{
3282 int idx = mi2s_get_port_idx(kcontrol);
3283
3284 if (idx < 0)
3285 return idx;
3286
3287 mi2s_rx_cfg[idx].bit_format =
3288 mi2s_auxpcm_get_format(ucontrol->value.enumerated.item[0]);
3289
3290 pr_debug("%s: idx[%d]_rx_format = %d, item = %d\n", __func__,
3291 idx, mi2s_rx_cfg[idx].bit_format,
3292 ucontrol->value.enumerated.item[0]);
3293
3294 return 0;
3295}
3296
3297static int msm_mi2s_tx_format_get(struct snd_kcontrol *kcontrol,
3298 struct snd_ctl_elem_value *ucontrol)
3299{
3300 int idx = mi2s_get_port_idx(kcontrol);
3301
3302 if (idx < 0)
3303 return idx;
3304
3305 ucontrol->value.enumerated.item[0] =
3306 mi2s_auxpcm_get_format_value(mi2s_tx_cfg[idx].bit_format);
3307
3308 pr_debug("%s: idx[%d]_tx_format = %d, item = %d\n", __func__,
3309 idx, mi2s_tx_cfg[idx].bit_format,
3310 ucontrol->value.enumerated.item[0]);
3311
3312 return 0;
3313}
3314
3315static int msm_mi2s_tx_format_put(struct snd_kcontrol *kcontrol,
3316 struct snd_ctl_elem_value *ucontrol)
3317{
3318 int idx = mi2s_get_port_idx(kcontrol);
3319
3320 if (idx < 0)
3321 return idx;
3322
3323 mi2s_tx_cfg[idx].bit_format =
3324 mi2s_auxpcm_get_format(ucontrol->value.enumerated.item[0]);
3325
3326 pr_debug("%s: idx[%d]_tx_format = %d, item = %d\n", __func__,
3327 idx, mi2s_tx_cfg[idx].bit_format,
3328 ucontrol->value.enumerated.item[0]);
3329
3330 return 0;
3331}
3332
3333static int msm_aux_pcm_rx_format_get(struct snd_kcontrol *kcontrol,
3334 struct snd_ctl_elem_value *ucontrol)
3335{
3336 int idx = aux_pcm_get_port_idx(kcontrol);
3337
3338 if (idx < 0)
3339 return idx;
3340
3341 ucontrol->value.enumerated.item[0] =
3342 mi2s_auxpcm_get_format_value(aux_pcm_rx_cfg[idx].bit_format);
3343
3344 pr_debug("%s: idx[%d]_rx_format = %d, item = %d\n", __func__,
3345 idx, aux_pcm_rx_cfg[idx].bit_format,
3346 ucontrol->value.enumerated.item[0]);
3347
3348 return 0;
3349}
3350
3351static int msm_aux_pcm_rx_format_put(struct snd_kcontrol *kcontrol,
3352 struct snd_ctl_elem_value *ucontrol)
3353{
3354 int idx = aux_pcm_get_port_idx(kcontrol);
3355
3356 if (idx < 0)
3357 return idx;
3358
3359 aux_pcm_rx_cfg[idx].bit_format =
3360 mi2s_auxpcm_get_format(ucontrol->value.enumerated.item[0]);
3361
3362 pr_debug("%s: idx[%d]_rx_format = %d, item = %d\n", __func__,
3363 idx, aux_pcm_rx_cfg[idx].bit_format,
3364 ucontrol->value.enumerated.item[0]);
3365
3366 return 0;
3367}
3368
3369static int msm_aux_pcm_tx_format_get(struct snd_kcontrol *kcontrol,
3370 struct snd_ctl_elem_value *ucontrol)
3371{
3372 int idx = aux_pcm_get_port_idx(kcontrol);
3373
3374 if (idx < 0)
3375 return idx;
3376
3377 ucontrol->value.enumerated.item[0] =
3378 mi2s_auxpcm_get_format_value(aux_pcm_tx_cfg[idx].bit_format);
3379
3380 pr_debug("%s: idx[%d]_tx_format = %d, item = %d\n", __func__,
3381 idx, aux_pcm_tx_cfg[idx].bit_format,
3382 ucontrol->value.enumerated.item[0]);
3383
3384 return 0;
3385}
3386
3387static int msm_aux_pcm_tx_format_put(struct snd_kcontrol *kcontrol,
3388 struct snd_ctl_elem_value *ucontrol)
3389{
3390 int idx = aux_pcm_get_port_idx(kcontrol);
3391
3392 if (idx < 0)
3393 return idx;
3394
3395 aux_pcm_tx_cfg[idx].bit_format =
3396 mi2s_auxpcm_get_format(ucontrol->value.enumerated.item[0]);
3397
3398 pr_debug("%s: idx[%d]_tx_format = %d, item = %d\n", __func__,
3399 idx, aux_pcm_tx_cfg[idx].bit_format,
3400 ucontrol->value.enumerated.item[0]);
3401
3402 return 0;
3403}
3404
3405static int msm_hifi_ctrl(struct snd_soc_codec *codec)
3406{
3407 struct snd_soc_dapm_context *dapm = snd_soc_codec_get_dapm(codec);
3408 struct snd_soc_card *card = codec->component.card;
3409 struct msm_asoc_mach_data *pdata =
3410 snd_soc_card_get_drvdata(card);
3411
3412 dev_dbg(codec->dev, "%s: msm_hifi_control = %d\n", __func__,
3413 msm_hifi_control);
3414
3415 if (!pdata || !pdata->hph_en1_gpio_p) {
3416 dev_err(codec->dev, "%s: hph_en1_gpio is invalid\n", __func__);
3417 return -EINVAL;
3418 }
3419 if (msm_hifi_control == MSM_HIFI_ON) {
3420 msm_cdc_pinctrl_select_active_state(pdata->hph_en1_gpio_p);
3421 /* 5msec delay needed as per HW requirement */
3422 usleep_range(5000, 5010);
3423 } else {
3424 msm_cdc_pinctrl_select_sleep_state(pdata->hph_en1_gpio_p);
3425 }
3426 snd_soc_dapm_sync(dapm);
3427
3428 return 0;
3429}
3430
3431static int msm_hifi_get(struct snd_kcontrol *kcontrol,
3432 struct snd_ctl_elem_value *ucontrol)
3433{
3434 pr_debug("%s: msm_hifi_control = %d\n",
3435 __func__, msm_hifi_control);
3436 ucontrol->value.integer.value[0] = msm_hifi_control;
3437
3438 return 0;
3439}
3440
3441static int msm_hifi_put(struct snd_kcontrol *kcontrol,
3442 struct snd_ctl_elem_value *ucontrol)
3443{
3444 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
3445
3446 dev_dbg(codec->dev, "%s: ucontrol->value.integer.value[0] = %ld\n",
3447 __func__, ucontrol->value.integer.value[0]);
3448
3449 msm_hifi_control = ucontrol->value.integer.value[0];
3450 msm_hifi_ctrl(codec);
3451
3452 return 0;
3453}
3454
3455static const struct snd_kcontrol_new msm_int_snd_controls[] = {
3456 SOC_ENUM_EXT("WSA_CDC_DMA_RX_0 Channels", wsa_cdc_dma_rx_0_chs,
3457 cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
3458 SOC_ENUM_EXT("WSA_CDC_DMA_RX_1 Channels", wsa_cdc_dma_rx_1_chs,
3459 cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
3460 SOC_ENUM_EXT("RX_CDC_DMA_RX_0 Channels", rx_cdc_dma_rx_0_chs,
3461 cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
3462 SOC_ENUM_EXT("RX_CDC_DMA_RX_1 Channels", rx_cdc_dma_rx_1_chs,
3463 cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
3464 SOC_ENUM_EXT("RX_CDC_DMA_RX_2 Channels", rx_cdc_dma_rx_2_chs,
3465 cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
3466 SOC_ENUM_EXT("RX_CDC_DMA_RX_3 Channels", rx_cdc_dma_rx_3_chs,
3467 cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
3468 SOC_ENUM_EXT("RX_CDC_DMA_RX_5 Channels", rx_cdc_dma_rx_5_chs,
3469 cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
3470 SOC_ENUM_EXT("WSA_CDC_DMA_TX_0 Channels", wsa_cdc_dma_tx_0_chs,
3471 cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
3472 SOC_ENUM_EXT("WSA_CDC_DMA_TX_1 Channels", wsa_cdc_dma_tx_1_chs,
3473 cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
3474 SOC_ENUM_EXT("WSA_CDC_DMA_TX_2 Channels", wsa_cdc_dma_tx_2_chs,
3475 cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
3476 SOC_ENUM_EXT("TX_CDC_DMA_TX_0 Channels", tx_cdc_dma_tx_0_chs,
3477 cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
3478 SOC_ENUM_EXT("TX_CDC_DMA_TX_3 Channels", tx_cdc_dma_tx_3_chs,
3479 cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
3480 SOC_ENUM_EXT("TX_CDC_DMA_TX_4 Channels", tx_cdc_dma_tx_4_chs,
3481 cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
3482 SOC_ENUM_EXT("WSA_CDC_DMA_RX_0 Format", wsa_cdc_dma_rx_0_format,
3483 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
3484 SOC_ENUM_EXT("WSA_CDC_DMA_RX_1 Format", wsa_cdc_dma_rx_1_format,
3485 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
3486 SOC_ENUM_EXT("RX_CDC_DMA_RX_0 Format", rx_cdc_dma_rx_0_format,
3487 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
3488 SOC_ENUM_EXT("RX_CDC_DMA_RX_1 Format", rx_cdc_dma_rx_1_format,
3489 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
3490 SOC_ENUM_EXT("RX_CDC_DMA_RX_2 Format", rx_cdc_dma_rx_2_format,
3491 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
3492 SOC_ENUM_EXT("RX_CDC_DMA_RX_3 Format", rx_cdc_dma_rx_3_format,
3493 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
3494 SOC_ENUM_EXT("RX_CDC_DMA_RX_5 Format", rx_cdc_dma_rx_5_format,
3495 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
3496 SOC_ENUM_EXT("WSA_CDC_DMA_TX_1 Format", wsa_cdc_dma_tx_1_format,
3497 cdc_dma_tx_format_get, cdc_dma_tx_format_put),
3498 SOC_ENUM_EXT("WSA_CDC_DMA_TX_2 Format", wsa_cdc_dma_tx_2_format,
3499 cdc_dma_tx_format_get, cdc_dma_tx_format_put),
3500 SOC_ENUM_EXT("TX_CDC_DMA_TX_0 Format", tx_cdc_dma_tx_0_format,
3501 cdc_dma_tx_format_get, cdc_dma_tx_format_put),
3502 SOC_ENUM_EXT("TX_CDC_DMA_TX_3 Format", tx_cdc_dma_tx_3_format,
3503 cdc_dma_tx_format_get, cdc_dma_tx_format_put),
3504 SOC_ENUM_EXT("TX_CDC_DMA_TX_4 Format", tx_cdc_dma_tx_4_format,
3505 cdc_dma_tx_format_get, cdc_dma_tx_format_put),
3506 SOC_ENUM_EXT("WSA_CDC_DMA_RX_0 SampleRate",
3507 wsa_cdc_dma_rx_0_sample_rate,
3508 cdc_dma_rx_sample_rate_get,
3509 cdc_dma_rx_sample_rate_put),
3510 SOC_ENUM_EXT("WSA_CDC_DMA_RX_1 SampleRate",
3511 wsa_cdc_dma_rx_1_sample_rate,
3512 cdc_dma_rx_sample_rate_get,
3513 cdc_dma_rx_sample_rate_put),
3514 SOC_ENUM_EXT("RX_CDC_DMA_RX_0 SampleRate",
3515 rx_cdc_dma_rx_0_sample_rate,
3516 cdc_dma_rx_sample_rate_get,
3517 cdc_dma_rx_sample_rate_put),
3518 SOC_ENUM_EXT("RX_CDC_DMA_RX_1 SampleRate",
3519 rx_cdc_dma_rx_1_sample_rate,
3520 cdc_dma_rx_sample_rate_get,
3521 cdc_dma_rx_sample_rate_put),
3522 SOC_ENUM_EXT("RX_CDC_DMA_RX_2 SampleRate",
3523 rx_cdc_dma_rx_2_sample_rate,
3524 cdc_dma_rx_sample_rate_get,
3525 cdc_dma_rx_sample_rate_put),
3526 SOC_ENUM_EXT("RX_CDC_DMA_RX_3 SampleRate",
3527 rx_cdc_dma_rx_3_sample_rate,
3528 cdc_dma_rx_sample_rate_get,
3529 cdc_dma_rx_sample_rate_put),
3530 SOC_ENUM_EXT("RX_CDC_DMA_RX_5 SampleRate",
3531 rx_cdc_dma_rx_5_sample_rate,
3532 cdc_dma_rx_sample_rate_get,
3533 cdc_dma_rx_sample_rate_put),
3534 SOC_ENUM_EXT("WSA_CDC_DMA_TX_0 SampleRate",
3535 wsa_cdc_dma_tx_0_sample_rate,
3536 cdc_dma_tx_sample_rate_get,
3537 cdc_dma_tx_sample_rate_put),
3538 SOC_ENUM_EXT("WSA_CDC_DMA_TX_1 SampleRate",
3539 wsa_cdc_dma_tx_1_sample_rate,
3540 cdc_dma_tx_sample_rate_get,
3541 cdc_dma_tx_sample_rate_put),
3542 SOC_ENUM_EXT("WSA_CDC_DMA_TX_2 SampleRate",
3543 wsa_cdc_dma_tx_2_sample_rate,
3544 cdc_dma_tx_sample_rate_get,
3545 cdc_dma_tx_sample_rate_put),
3546 SOC_ENUM_EXT("TX_CDC_DMA_TX_0 SampleRate",
3547 tx_cdc_dma_tx_0_sample_rate,
3548 cdc_dma_tx_sample_rate_get,
3549 cdc_dma_tx_sample_rate_put),
3550 SOC_ENUM_EXT("TX_CDC_DMA_TX_3 SampleRate",
3551 tx_cdc_dma_tx_3_sample_rate,
3552 cdc_dma_tx_sample_rate_get,
3553 cdc_dma_tx_sample_rate_put),
3554 SOC_ENUM_EXT("TX_CDC_DMA_TX_4 SampleRate",
3555 tx_cdc_dma_tx_4_sample_rate,
3556 cdc_dma_tx_sample_rate_get,
3557 cdc_dma_tx_sample_rate_put),
3558};
3559
3560static const struct snd_kcontrol_new msm_tavil_snd_controls[] = {
3561 SOC_ENUM_EXT("SLIM_0_RX Channels", slim_0_rx_chs,
3562 slim_rx_ch_get, slim_rx_ch_put),
3563 SOC_ENUM_EXT("SLIM_2_RX Channels", slim_2_rx_chs,
3564 slim_rx_ch_get, slim_rx_ch_put),
3565 SOC_ENUM_EXT("SLIM_0_TX Channels", slim_0_tx_chs,
3566 slim_tx_ch_get, slim_tx_ch_put),
3567 SOC_ENUM_EXT("SLIM_1_TX Channels", slim_1_tx_chs,
3568 slim_tx_ch_get, slim_tx_ch_put),
3569 SOC_ENUM_EXT("SLIM_5_RX Channels", slim_5_rx_chs,
3570 slim_rx_ch_get, slim_rx_ch_put),
3571 SOC_ENUM_EXT("SLIM_6_RX Channels", slim_6_rx_chs,
3572 slim_rx_ch_get, slim_rx_ch_put),
Aditya Bavanari44eb8952018-05-09 19:01:50 +05303573 SOC_ENUM_EXT("SLIM_0_RX Format", slim_0_rx_format,
3574 slim_rx_bit_format_get, slim_rx_bit_format_put),
3575 SOC_ENUM_EXT("SLIM_5_RX Format", slim_5_rx_format,
3576 slim_rx_bit_format_get, slim_rx_bit_format_put),
3577 SOC_ENUM_EXT("SLIM_6_RX Format", slim_6_rx_format,
3578 slim_rx_bit_format_get, slim_rx_bit_format_put),
3579 SOC_ENUM_EXT("SLIM_0_TX Format", slim_0_tx_format,
3580 slim_tx_bit_format_get, slim_tx_bit_format_put),
3581 SOC_ENUM_EXT("SLIM_0_RX SampleRate", slim_0_rx_sample_rate,
3582 slim_rx_sample_rate_get, slim_rx_sample_rate_put),
3583 SOC_ENUM_EXT("SLIM_2_RX SampleRate", slim_2_rx_sample_rate,
3584 slim_rx_sample_rate_get, slim_rx_sample_rate_put),
3585 SOC_ENUM_EXT("SLIM_0_TX SampleRate", slim_0_tx_sample_rate,
3586 slim_tx_sample_rate_get, slim_tx_sample_rate_put),
3587 SOC_ENUM_EXT("SLIM_5_RX SampleRate", slim_5_rx_sample_rate,
3588 slim_rx_sample_rate_get, slim_rx_sample_rate_put),
3589 SOC_ENUM_EXT("SLIM_6_RX SampleRate", slim_6_rx_sample_rate,
3590 slim_rx_sample_rate_get, slim_rx_sample_rate_put),
3591};
3592
3593static const struct snd_kcontrol_new msm_common_snd_controls[] = {
3594 SOC_ENUM_EXT("USB_AUDIO_RX Channels", usb_rx_chs,
3595 usb_audio_rx_ch_get, usb_audio_rx_ch_put),
3596 SOC_ENUM_EXT("USB_AUDIO_TX Channels", usb_tx_chs,
3597 usb_audio_tx_ch_get, usb_audio_tx_ch_put),
3598 SOC_ENUM_EXT("Display Port RX Channels", ext_disp_rx_chs,
3599 ext_disp_rx_ch_get, ext_disp_rx_ch_put),
3600 SOC_ENUM_EXT("PROXY_RX Channels", proxy_rx_chs,
3601 proxy_rx_ch_get, proxy_rx_ch_put),
3602 SOC_ENUM_EXT("USB_AUDIO_RX Format", usb_rx_format,
3603 usb_audio_rx_format_get, usb_audio_rx_format_put),
3604 SOC_ENUM_EXT("USB_AUDIO_TX Format", usb_tx_format,
3605 usb_audio_tx_format_get, usb_audio_tx_format_put),
3606 SOC_ENUM_EXT("Display Port RX Bit Format", ext_disp_rx_format,
3607 ext_disp_rx_format_get, ext_disp_rx_format_put),
3608 SOC_ENUM_EXT("USB_AUDIO_RX SampleRate", usb_rx_sample_rate,
3609 usb_audio_rx_sample_rate_get,
3610 usb_audio_rx_sample_rate_put),
3611 SOC_ENUM_EXT("USB_AUDIO_TX SampleRate", usb_tx_sample_rate,
3612 usb_audio_tx_sample_rate_get,
3613 usb_audio_tx_sample_rate_put),
3614 SOC_ENUM_EXT("Display Port RX SampleRate", ext_disp_rx_sample_rate,
3615 ext_disp_rx_sample_rate_get,
3616 ext_disp_rx_sample_rate_put),
3617 SOC_ENUM_EXT("PRI_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
3618 tdm_rx_sample_rate_get,
3619 tdm_rx_sample_rate_put),
3620 SOC_ENUM_EXT("PRI_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
3621 tdm_tx_sample_rate_get,
3622 tdm_tx_sample_rate_put),
3623 SOC_ENUM_EXT("PRI_TDM_RX_0 Format", tdm_rx_format,
3624 tdm_rx_format_get,
3625 tdm_rx_format_put),
3626 SOC_ENUM_EXT("PRI_TDM_TX_0 Format", tdm_tx_format,
3627 tdm_tx_format_get,
3628 tdm_tx_format_put),
3629 SOC_ENUM_EXT("PRI_TDM_RX_0 Channels", tdm_rx_chs,
3630 tdm_rx_ch_get,
3631 tdm_rx_ch_put),
3632 SOC_ENUM_EXT("PRI_TDM_TX_0 Channels", tdm_tx_chs,
3633 tdm_tx_ch_get,
3634 tdm_tx_ch_put),
3635 SOC_ENUM_EXT("SEC_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
3636 tdm_rx_sample_rate_get,
3637 tdm_rx_sample_rate_put),
3638 SOC_ENUM_EXT("SEC_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
3639 tdm_tx_sample_rate_get,
3640 tdm_tx_sample_rate_put),
3641 SOC_ENUM_EXT("SEC_TDM_RX_0 Format", tdm_rx_format,
3642 tdm_rx_format_get,
3643 tdm_rx_format_put),
3644 SOC_ENUM_EXT("SEC_TDM_TX_0 Format", tdm_tx_format,
3645 tdm_tx_format_get,
3646 tdm_tx_format_put),
3647 SOC_ENUM_EXT("SEC_TDM_RX_0 Channels", tdm_rx_chs,
3648 tdm_rx_ch_get,
3649 tdm_rx_ch_put),
3650 SOC_ENUM_EXT("SEC_TDM_TX_0 Channels", tdm_tx_chs,
3651 tdm_tx_ch_get,
3652 tdm_tx_ch_put),
3653 SOC_ENUM_EXT("TERT_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
3654 tdm_rx_sample_rate_get,
3655 tdm_rx_sample_rate_put),
3656 SOC_ENUM_EXT("TERT_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
3657 tdm_tx_sample_rate_get,
3658 tdm_tx_sample_rate_put),
3659 SOC_ENUM_EXT("TERT_TDM_RX_0 Format", tdm_rx_format,
3660 tdm_rx_format_get,
3661 tdm_rx_format_put),
3662 SOC_ENUM_EXT("TERT_TDM_TX_0 Format", tdm_tx_format,
3663 tdm_tx_format_get,
3664 tdm_tx_format_put),
3665 SOC_ENUM_EXT("TERT_TDM_RX_0 Channels", tdm_rx_chs,
3666 tdm_rx_ch_get,
3667 tdm_rx_ch_put),
3668 SOC_ENUM_EXT("TERT_TDM_TX_0 Channels", tdm_tx_chs,
3669 tdm_tx_ch_get,
3670 tdm_tx_ch_put),
3671 SOC_ENUM_EXT("QUAT_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
3672 tdm_rx_sample_rate_get,
3673 tdm_rx_sample_rate_put),
3674 SOC_ENUM_EXT("QUAT_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
3675 tdm_tx_sample_rate_get,
3676 tdm_tx_sample_rate_put),
3677 SOC_ENUM_EXT("QUAT_TDM_RX_0 Format", tdm_rx_format,
3678 tdm_rx_format_get,
3679 tdm_rx_format_put),
3680 SOC_ENUM_EXT("QUAT_TDM_TX_0 Format", tdm_tx_format,
3681 tdm_tx_format_get,
3682 tdm_tx_format_put),
3683 SOC_ENUM_EXT("QUAT_TDM_RX_0 Channels", tdm_rx_chs,
3684 tdm_rx_ch_get,
3685 tdm_rx_ch_put),
3686 SOC_ENUM_EXT("QUAT_TDM_TX_0 Channels", tdm_tx_chs,
3687 tdm_tx_ch_get,
3688 tdm_tx_ch_put),
3689 SOC_ENUM_EXT("QUIN_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
3690 tdm_rx_sample_rate_get,
3691 tdm_rx_sample_rate_put),
3692 SOC_ENUM_EXT("QUIN_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
3693 tdm_tx_sample_rate_get,
3694 tdm_tx_sample_rate_put),
3695 SOC_ENUM_EXT("QUIN_TDM_RX_0 Format", tdm_rx_format,
3696 tdm_rx_format_get,
3697 tdm_rx_format_put),
3698 SOC_ENUM_EXT("QUIN_TDM_TX_0 Format", tdm_tx_format,
3699 tdm_tx_format_get,
3700 tdm_tx_format_put),
3701 SOC_ENUM_EXT("QUIN_TDM_RX_0 Channels", tdm_rx_chs,
3702 tdm_rx_ch_get,
3703 tdm_rx_ch_put),
3704 SOC_ENUM_EXT("QUIN_TDM_TX_0 Channels", tdm_tx_chs,
3705 tdm_tx_ch_get,
3706 tdm_tx_ch_put),
3707 SOC_ENUM_EXT("PRIM_AUX_PCM_RX SampleRate", prim_aux_pcm_rx_sample_rate,
3708 aux_pcm_rx_sample_rate_get,
3709 aux_pcm_rx_sample_rate_put),
3710 SOC_ENUM_EXT("SEC_AUX_PCM_RX SampleRate", sec_aux_pcm_rx_sample_rate,
3711 aux_pcm_rx_sample_rate_get,
3712 aux_pcm_rx_sample_rate_put),
3713 SOC_ENUM_EXT("TERT_AUX_PCM_RX SampleRate", tert_aux_pcm_rx_sample_rate,
3714 aux_pcm_rx_sample_rate_get,
3715 aux_pcm_rx_sample_rate_put),
3716 SOC_ENUM_EXT("QUAT_AUX_PCM_RX SampleRate", quat_aux_pcm_rx_sample_rate,
3717 aux_pcm_rx_sample_rate_get,
3718 aux_pcm_rx_sample_rate_put),
3719 SOC_ENUM_EXT("QUIN_AUX_PCM_RX SampleRate", quin_aux_pcm_rx_sample_rate,
3720 aux_pcm_rx_sample_rate_get,
3721 aux_pcm_rx_sample_rate_put),
3722 SOC_ENUM_EXT("PRIM_AUX_PCM_TX SampleRate", prim_aux_pcm_tx_sample_rate,
3723 aux_pcm_tx_sample_rate_get,
3724 aux_pcm_tx_sample_rate_put),
3725 SOC_ENUM_EXT("SEC_AUX_PCM_TX SampleRate", sec_aux_pcm_tx_sample_rate,
3726 aux_pcm_tx_sample_rate_get,
3727 aux_pcm_tx_sample_rate_put),
3728 SOC_ENUM_EXT("TERT_AUX_PCM_TX SampleRate", tert_aux_pcm_tx_sample_rate,
3729 aux_pcm_tx_sample_rate_get,
3730 aux_pcm_tx_sample_rate_put),
3731 SOC_ENUM_EXT("QUAT_AUX_PCM_TX SampleRate", quat_aux_pcm_tx_sample_rate,
3732 aux_pcm_tx_sample_rate_get,
3733 aux_pcm_tx_sample_rate_put),
3734 SOC_ENUM_EXT("QUIN_AUX_PCM_TX SampleRate", quin_aux_pcm_tx_sample_rate,
3735 aux_pcm_tx_sample_rate_get,
3736 aux_pcm_tx_sample_rate_put),
3737 SOC_ENUM_EXT("PRIM_MI2S_RX SampleRate", prim_mi2s_rx_sample_rate,
3738 mi2s_rx_sample_rate_get,
3739 mi2s_rx_sample_rate_put),
3740 SOC_ENUM_EXT("SEC_MI2S_RX SampleRate", sec_mi2s_rx_sample_rate,
3741 mi2s_rx_sample_rate_get,
3742 mi2s_rx_sample_rate_put),
3743 SOC_ENUM_EXT("TERT_MI2S_RX SampleRate", tert_mi2s_rx_sample_rate,
3744 mi2s_rx_sample_rate_get,
3745 mi2s_rx_sample_rate_put),
3746 SOC_ENUM_EXT("QUAT_MI2S_RX SampleRate", quat_mi2s_rx_sample_rate,
3747 mi2s_rx_sample_rate_get,
3748 mi2s_rx_sample_rate_put),
3749 SOC_ENUM_EXT("QUIN_MI2S_RX SampleRate", quin_mi2s_rx_sample_rate,
3750 mi2s_rx_sample_rate_get,
3751 mi2s_rx_sample_rate_put),
3752 SOC_ENUM_EXT("PRIM_MI2S_TX SampleRate", prim_mi2s_tx_sample_rate,
3753 mi2s_tx_sample_rate_get,
3754 mi2s_tx_sample_rate_put),
3755 SOC_ENUM_EXT("SEC_MI2S_TX SampleRate", sec_mi2s_tx_sample_rate,
3756 mi2s_tx_sample_rate_get,
3757 mi2s_tx_sample_rate_put),
3758 SOC_ENUM_EXT("TERT_MI2S_TX SampleRate", tert_mi2s_tx_sample_rate,
3759 mi2s_tx_sample_rate_get,
3760 mi2s_tx_sample_rate_put),
3761 SOC_ENUM_EXT("QUAT_MI2S_TX SampleRate", quat_mi2s_tx_sample_rate,
3762 mi2s_tx_sample_rate_get,
3763 mi2s_tx_sample_rate_put),
3764 SOC_ENUM_EXT("QUIN_MI2S_TX SampleRate", quin_mi2s_tx_sample_rate,
3765 mi2s_tx_sample_rate_get,
3766 mi2s_tx_sample_rate_put),
3767 SOC_ENUM_EXT("PRIM_MI2S_RX Channels", prim_mi2s_rx_chs,
3768 msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
3769 SOC_ENUM_EXT("PRIM_MI2S_TX Channels", prim_mi2s_tx_chs,
3770 msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
3771 SOC_ENUM_EXT("SEC_MI2S_RX Channels", sec_mi2s_rx_chs,
3772 msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
3773 SOC_ENUM_EXT("SEC_MI2S_TX Channels", sec_mi2s_tx_chs,
3774 msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
3775 SOC_ENUM_EXT("TERT_MI2S_RX Channels", tert_mi2s_rx_chs,
3776 msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
3777 SOC_ENUM_EXT("TERT_MI2S_TX Channels", tert_mi2s_tx_chs,
3778 msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
3779 SOC_ENUM_EXT("QUAT_MI2S_RX Channels", quat_mi2s_rx_chs,
3780 msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
3781 SOC_ENUM_EXT("QUAT_MI2S_TX Channels", quat_mi2s_tx_chs,
3782 msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
3783 SOC_ENUM_EXT("QUIN_MI2S_RX Channels", quin_mi2s_rx_chs,
3784 msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
3785 SOC_ENUM_EXT("QUIN_MI2S_TX Channels", quin_mi2s_tx_chs,
3786 msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
3787 SOC_ENUM_EXT("PRIM_MI2S_RX Format", mi2s_rx_format,
3788 msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
3789 SOC_ENUM_EXT("PRIM_MI2S_TX Format", mi2s_tx_format,
3790 msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
3791 SOC_ENUM_EXT("SEC_MI2S_RX Format", mi2s_rx_format,
3792 msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
3793 SOC_ENUM_EXT("SEC_MI2S_TX Format", mi2s_tx_format,
3794 msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
3795 SOC_ENUM_EXT("TERT_MI2S_RX Format", mi2s_rx_format,
3796 msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
3797 SOC_ENUM_EXT("TERT_MI2S_TX Format", mi2s_tx_format,
3798 msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
3799 SOC_ENUM_EXT("QUAT_MI2S_RX Format", mi2s_rx_format,
3800 msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
3801 SOC_ENUM_EXT("QUAT_MI2S_TX Format", mi2s_tx_format,
3802 msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
3803 SOC_ENUM_EXT("QUIN_MI2S_RX Format", mi2s_rx_format,
3804 msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
3805 SOC_ENUM_EXT("QUIN_MI2S_TX Format", mi2s_tx_format,
3806 msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
3807 SOC_ENUM_EXT("PRIM_AUX_PCM_RX Format", aux_pcm_rx_format,
3808 msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
3809 SOC_ENUM_EXT("PRIM_AUX_PCM_TX Format", aux_pcm_tx_format,
3810 msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
3811 SOC_ENUM_EXT("SEC_AUX_PCM_RX Format", aux_pcm_rx_format,
3812 msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
3813 SOC_ENUM_EXT("SEC_AUX_PCM_TX Format", aux_pcm_tx_format,
3814 msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
3815 SOC_ENUM_EXT("TERT_AUX_PCM_RX Format", aux_pcm_rx_format,
3816 msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
3817 SOC_ENUM_EXT("TERT_AUX_PCM_TX Format", aux_pcm_tx_format,
3818 msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
3819 SOC_ENUM_EXT("QUAT_AUX_PCM_RX Format", aux_pcm_rx_format,
3820 msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
3821 SOC_ENUM_EXT("QUAT_AUX_PCM_TX Format", aux_pcm_tx_format,
3822 msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
3823 SOC_ENUM_EXT("QUIN_AUX_PCM_RX Format", aux_pcm_rx_format,
3824 msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
3825 SOC_ENUM_EXT("QUIN_AUX_PCM_TX Format", aux_pcm_tx_format,
3826 msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
3827 SOC_ENUM_EXT("HiFi Function", hifi_function, msm_hifi_get,
3828 msm_hifi_put),
3829 SOC_ENUM_EXT("BT SampleRate", bt_sample_rate,
3830 msm_bt_sample_rate_get,
3831 msm_bt_sample_rate_put),
Sharad Sangle493a1b32018-09-19 15:52:15 +05303832 SOC_ENUM_EXT("BT SampleRate RX", bt_sample_rate_rx,
3833 msm_bt_sample_rate_rx_get,
3834 msm_bt_sample_rate_rx_put),
3835 SOC_ENUM_EXT("BT SampleRate TX", bt_sample_rate_tx,
3836 msm_bt_sample_rate_tx_get,
3837 msm_bt_sample_rate_tx_put),
Vatsal Bucha89262e62018-08-31 11:57:09 +05303838 SOC_ENUM_EXT("VI_FEED_TX Channels", vi_feed_tx_chs,
3839 msm_vi_feed_tx_ch_get, msm_vi_feed_tx_ch_put),
Aditya Bavanari44eb8952018-05-09 19:01:50 +05303840};
3841
3842static int msm_snd_enable_codec_ext_clk(struct snd_soc_codec *codec,
3843 int enable, bool dapm)
3844{
3845 int ret = 0;
3846
3847 if (!strcmp(dev_name(codec->dev), "tavil_codec")) {
3848 ret = tavil_cdc_mclk_enable(codec, enable);
3849 } else {
3850 dev_err(codec->dev, "%s: unknown codec to enable ext clk\n",
3851 __func__);
3852 ret = -EINVAL;
3853 }
3854 return ret;
3855}
3856
3857static int msm_snd_enable_codec_ext_tx_clk(struct snd_soc_codec *codec,
3858 int enable, bool dapm)
3859{
3860 int ret = 0;
3861
3862 if (!strcmp(dev_name(codec->dev), "tavil_codec")) {
3863 ret = tavil_cdc_mclk_tx_enable(codec, enable);
3864 } else {
3865 dev_err(codec->dev, "%s: unknown codec to enable TX ext clk\n",
3866 __func__);
3867 ret = -EINVAL;
3868 }
3869
3870 return ret;
3871}
3872
3873static int msm_mclk_tx_event(struct snd_soc_dapm_widget *w,
3874 struct snd_kcontrol *kcontrol, int event)
3875{
3876 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
3877
3878 pr_debug("%s: event = %d\n", __func__, event);
3879
3880 switch (event) {
3881 case SND_SOC_DAPM_PRE_PMU:
3882 return msm_snd_enable_codec_ext_tx_clk(codec, 1, true);
3883 case SND_SOC_DAPM_POST_PMD:
3884 return msm_snd_enable_codec_ext_tx_clk(codec, 0, true);
3885 }
3886 return 0;
3887}
3888
3889static int msm_mclk_event(struct snd_soc_dapm_widget *w,
3890 struct snd_kcontrol *kcontrol, int event)
3891{
3892 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
3893
3894 pr_debug("%s: event = %d\n", __func__, event);
3895
3896 switch (event) {
3897 case SND_SOC_DAPM_PRE_PMU:
3898 return msm_snd_enable_codec_ext_clk(codec, 1, true);
3899 case SND_SOC_DAPM_POST_PMD:
3900 return msm_snd_enable_codec_ext_clk(codec, 0, true);
3901 }
3902 return 0;
3903}
3904
3905static int msm_hifi_ctrl_event(struct snd_soc_dapm_widget *w,
3906 struct snd_kcontrol *k, int event)
3907{
3908 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
3909 struct snd_soc_card *card = codec->component.card;
3910 struct msm_asoc_mach_data *pdata =
3911 snd_soc_card_get_drvdata(card);
3912
3913 dev_dbg(codec->dev, "%s: msm_hifi_control = %d\n",
3914 __func__, msm_hifi_control);
3915
3916 if (!pdata || !pdata->hph_en0_gpio_p) {
3917 dev_err(codec->dev, "%s: hph_en0_gpio is invalid\n", __func__);
3918 return -EINVAL;
3919 }
3920
3921 if (msm_hifi_control != MSM_HIFI_ON) {
3922 dev_dbg(codec->dev, "%s: HiFi mixer control is not set\n",
3923 __func__);
3924 return 0;
3925 }
3926
3927 switch (event) {
3928 case SND_SOC_DAPM_POST_PMU:
3929 msm_cdc_pinctrl_select_active_state(pdata->hph_en0_gpio_p);
3930 break;
3931 case SND_SOC_DAPM_PRE_PMD:
3932 msm_cdc_pinctrl_select_sleep_state(pdata->hph_en0_gpio_p);
3933 break;
3934 }
3935
3936 return 0;
3937}
3938
3939static const struct snd_soc_dapm_widget msm_dapm_widgets_tavil[] = {
3940
3941 SND_SOC_DAPM_SUPPLY("MCLK", SND_SOC_NOPM, 0, 0,
3942 msm_mclk_event,
3943 SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
3944
3945 SND_SOC_DAPM_SUPPLY("MCLK TX", SND_SOC_NOPM, 0, 0,
3946 msm_mclk_tx_event, SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
3947
3948 SND_SOC_DAPM_SPK("Lineout_1 amp", NULL),
3949 SND_SOC_DAPM_SPK("Lineout_2 amp", NULL),
3950 SND_SOC_DAPM_SPK("hifi amp", msm_hifi_ctrl_event),
3951 SND_SOC_DAPM_MIC("Handset Mic", NULL),
3952 SND_SOC_DAPM_MIC("Headset Mic", NULL),
3953 SND_SOC_DAPM_MIC("ANCRight Headset Mic", NULL),
3954 SND_SOC_DAPM_MIC("ANCLeft Headset Mic", NULL),
3955 SND_SOC_DAPM_MIC("Analog Mic5", NULL),
3956
3957 SND_SOC_DAPM_MIC("Digital Mic0", NULL),
3958 SND_SOC_DAPM_MIC("Digital Mic1", NULL),
3959 SND_SOC_DAPM_MIC("Digital Mic2", NULL),
3960 SND_SOC_DAPM_MIC("Digital Mic3", NULL),
3961 SND_SOC_DAPM_MIC("Digital Mic4", NULL),
3962 SND_SOC_DAPM_MIC("Digital Mic5", NULL),
3963};
3964
3965static int msm_dmic_event(struct snd_soc_dapm_widget *w,
3966 struct snd_kcontrol *kcontrol, int event)
3967{
3968 struct msm_asoc_mach_data *pdata = NULL;
3969 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
3970 int ret = 0;
Aditya Bavanari0b26ab32018-08-03 23:53:01 +05303971 u32 dmic_idx;
Aditya Bavanari44eb8952018-05-09 19:01:50 +05303972 int *dmic_gpio_cnt;
3973 struct device_node *dmic_gpio;
3974 char *wname;
3975
3976 wname = strpbrk(w->name, "0123");
3977 if (!wname) {
3978 dev_err(codec->dev, "%s: widget not found\n", __func__);
3979 return -EINVAL;
3980 }
3981
3982 ret = kstrtouint(wname, 10, &dmic_idx);
3983 if (ret < 0) {
3984 dev_err(codec->dev, "%s: Invalid DMIC line on the codec\n",
3985 __func__);
3986 return -EINVAL;
3987 }
3988
3989 pdata = snd_soc_card_get_drvdata(codec->component.card);
3990
3991 switch (dmic_idx) {
3992 case 0:
3993 case 1:
3994 dmic_gpio_cnt = &dmic_0_1_gpio_cnt;
3995 dmic_gpio = pdata->dmic01_gpio_p;
3996 break;
3997 case 2:
3998 case 3:
3999 dmic_gpio_cnt = &dmic_2_3_gpio_cnt;
4000 dmic_gpio = pdata->dmic23_gpio_p;
4001 break;
4002 default:
4003 dev_err(codec->dev, "%s: Invalid DMIC Selection\n",
4004 __func__);
4005 return -EINVAL;
4006 }
4007
4008 dev_dbg(codec->dev, "%s: event %d DMIC%d dmic_gpio_cnt %d\n",
4009 __func__, event, dmic_idx, *dmic_gpio_cnt);
4010
4011 switch (event) {
4012 case SND_SOC_DAPM_PRE_PMU:
4013 (*dmic_gpio_cnt)++;
4014 if (*dmic_gpio_cnt == 1) {
4015 ret = msm_cdc_pinctrl_select_active_state(
4016 dmic_gpio);
4017 if (ret < 0) {
4018 pr_err("%s: gpio set cannot be activated %sd",
4019 __func__, "dmic_gpio");
4020 return ret;
4021 }
4022 }
4023
4024 break;
4025 case SND_SOC_DAPM_POST_PMD:
4026 (*dmic_gpio_cnt)--;
4027 if (*dmic_gpio_cnt == 0) {
4028 ret = msm_cdc_pinctrl_select_sleep_state(
4029 dmic_gpio);
4030 if (ret < 0) {
4031 pr_err("%s: gpio set cannot be de-activated %sd",
4032 __func__, "dmic_gpio");
4033 return ret;
4034 }
4035 }
4036 break;
4037 default:
4038 pr_err("%s: invalid DAPM event %d\n", __func__, event);
4039 return -EINVAL;
4040 }
4041 return 0;
4042}
4043
4044static const struct snd_soc_dapm_widget msm_int_dapm_widgets[] = {
4045 SND_SOC_DAPM_MIC("Analog Mic1", NULL),
4046 SND_SOC_DAPM_MIC("Analog Mic2", NULL),
4047 SND_SOC_DAPM_MIC("Analog Mic3", NULL),
4048 SND_SOC_DAPM_MIC("Analog Mic4", NULL),
4049 SND_SOC_DAPM_MIC("Digital Mic0", msm_dmic_event),
4050 SND_SOC_DAPM_MIC("Digital Mic1", msm_dmic_event),
4051 SND_SOC_DAPM_MIC("Digital Mic2", msm_dmic_event),
4052 SND_SOC_DAPM_MIC("Digital Mic3", msm_dmic_event),
4053};
4054
4055static inline int param_is_mask(int p)
4056{
4057 return (p >= SNDRV_PCM_HW_PARAM_FIRST_MASK) &&
4058 (p <= SNDRV_PCM_HW_PARAM_LAST_MASK);
4059}
4060
4061static inline struct snd_mask *param_to_mask(struct snd_pcm_hw_params *p,
4062 int n)
4063{
4064 return &(p->masks[n - SNDRV_PCM_HW_PARAM_FIRST_MASK]);
4065}
4066
4067static void param_set_mask(struct snd_pcm_hw_params *p, int n,
4068 unsigned int bit)
4069{
4070 if (bit >= SNDRV_MASK_MAX)
4071 return;
4072 if (param_is_mask(n)) {
4073 struct snd_mask *m = param_to_mask(p, n);
4074
4075 m->bits[0] = 0;
4076 m->bits[1] = 0;
4077 m->bits[bit >> 5] |= (1 << (bit & 31));
4078 }
4079}
4080
4081static int msm_slim_get_ch_from_beid(int32_t be_id)
4082{
4083 int ch_id = 0;
4084
4085 switch (be_id) {
4086 case MSM_BACKEND_DAI_SLIMBUS_0_RX:
4087 ch_id = SLIM_RX_0;
4088 break;
4089 case MSM_BACKEND_DAI_SLIMBUS_1_RX:
4090 ch_id = SLIM_RX_1;
4091 break;
4092 case MSM_BACKEND_DAI_SLIMBUS_2_RX:
4093 ch_id = SLIM_RX_2;
4094 break;
4095 case MSM_BACKEND_DAI_SLIMBUS_3_RX:
4096 ch_id = SLIM_RX_3;
4097 break;
4098 case MSM_BACKEND_DAI_SLIMBUS_4_RX:
4099 ch_id = SLIM_RX_4;
4100 break;
4101 case MSM_BACKEND_DAI_SLIMBUS_6_RX:
4102 ch_id = SLIM_RX_6;
4103 break;
4104 case MSM_BACKEND_DAI_SLIMBUS_0_TX:
4105 ch_id = SLIM_TX_0;
4106 break;
4107 case MSM_BACKEND_DAI_SLIMBUS_3_TX:
4108 ch_id = SLIM_TX_3;
4109 break;
4110 default:
4111 ch_id = SLIM_RX_0;
4112 break;
4113 }
4114
4115 return ch_id;
4116}
4117
4118static int msm_cdc_dma_get_idx_from_beid(int32_t be_id)
4119{
4120 int idx = 0;
4121
4122 switch (be_id) {
4123 case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_0:
4124 idx = WSA_CDC_DMA_RX_0;
4125 break;
4126 case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_0:
4127 idx = WSA_CDC_DMA_TX_0;
4128 break;
4129 case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_1:
4130 idx = WSA_CDC_DMA_RX_1;
4131 break;
4132 case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_1:
4133 idx = WSA_CDC_DMA_TX_1;
4134 break;
4135 case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_2:
4136 idx = WSA_CDC_DMA_TX_2;
4137 break;
4138 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_0:
4139 idx = RX_CDC_DMA_RX_0;
4140 break;
4141 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_1:
4142 idx = RX_CDC_DMA_RX_1;
4143 break;
4144 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_2:
4145 idx = RX_CDC_DMA_RX_2;
4146 break;
4147 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_3:
4148 idx = RX_CDC_DMA_RX_3;
4149 break;
4150 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_5:
4151 idx = RX_CDC_DMA_RX_5;
4152 break;
4153 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_0:
4154 idx = TX_CDC_DMA_TX_0;
4155 break;
4156 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_3:
4157 idx = TX_CDC_DMA_TX_3;
4158 break;
4159 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_4:
4160 idx = TX_CDC_DMA_TX_4;
4161 break;
4162 default:
4163 idx = RX_CDC_DMA_RX_0;
4164 break;
4165 }
4166
4167 return idx;
4168}
4169
4170static int msm_ext_disp_get_idx_from_beid(int32_t be_id)
4171{
4172 int idx = -EINVAL;
4173
4174 switch (be_id) {
4175 case MSM_BACKEND_DAI_DISPLAY_PORT_RX:
4176 idx = DP_RX_IDX;
4177 break;
4178 default:
4179 pr_err("%s: Incorrect ext_disp BE id %d\n", __func__, be_id);
4180 idx = -EINVAL;
4181 break;
4182 }
4183
4184 return idx;
4185}
4186
4187static int msm_be_hw_params_fixup(struct snd_soc_pcm_runtime *rtd,
4188 struct snd_pcm_hw_params *params)
4189{
4190 struct snd_soc_dai_link *dai_link = rtd->dai_link;
4191 struct snd_interval *rate = hw_param_interval(params,
4192 SNDRV_PCM_HW_PARAM_RATE);
4193 struct snd_interval *channels = hw_param_interval(params,
4194 SNDRV_PCM_HW_PARAM_CHANNELS);
4195 int rc = 0;
4196 int idx;
4197 void *config = NULL;
4198 struct snd_soc_codec *codec = NULL;
4199
4200 pr_debug("%s: format = %d, rate = %d\n",
4201 __func__, params_format(params), params_rate(params));
4202
4203 switch (dai_link->id) {
4204 case MSM_BACKEND_DAI_SLIMBUS_0_RX:
4205 case MSM_BACKEND_DAI_SLIMBUS_1_RX:
4206 case MSM_BACKEND_DAI_SLIMBUS_2_RX:
4207 case MSM_BACKEND_DAI_SLIMBUS_3_RX:
4208 case MSM_BACKEND_DAI_SLIMBUS_4_RX:
4209 case MSM_BACKEND_DAI_SLIMBUS_6_RX:
4210 idx = msm_slim_get_ch_from_beid(dai_link->id);
4211 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4212 slim_rx_cfg[idx].bit_format);
4213 rate->min = rate->max = slim_rx_cfg[idx].sample_rate;
4214 channels->min = channels->max = slim_rx_cfg[idx].channels;
4215 break;
4216
4217 case MSM_BACKEND_DAI_SLIMBUS_0_TX:
4218 case MSM_BACKEND_DAI_SLIMBUS_3_TX:
4219 idx = msm_slim_get_ch_from_beid(dai_link->id);
4220 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4221 slim_tx_cfg[idx].bit_format);
4222 rate->min = rate->max = slim_tx_cfg[idx].sample_rate;
4223 channels->min = channels->max = slim_tx_cfg[idx].channels;
4224 break;
4225
4226 case MSM_BACKEND_DAI_SLIMBUS_1_TX:
4227 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4228 slim_tx_cfg[1].bit_format);
4229 rate->min = rate->max = slim_tx_cfg[1].sample_rate;
4230 channels->min = channels->max = slim_tx_cfg[1].channels;
4231 break;
4232
4233 case MSM_BACKEND_DAI_SLIMBUS_4_TX:
4234 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4235 SNDRV_PCM_FORMAT_S32_LE);
4236 rate->min = rate->max = SAMPLING_RATE_8KHZ;
4237 channels->min = channels->max = msm_vi_feed_tx_ch;
4238 break;
4239
4240 case MSM_BACKEND_DAI_SLIMBUS_5_RX:
4241 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4242 slim_rx_cfg[5].bit_format);
4243 rate->min = rate->max = slim_rx_cfg[5].sample_rate;
4244 channels->min = channels->max = slim_rx_cfg[5].channels;
4245 break;
4246
4247 case MSM_BACKEND_DAI_SLIMBUS_5_TX:
4248 codec = rtd->codec;
4249 rate->min = rate->max = SAMPLING_RATE_16KHZ;
4250 channels->min = channels->max = 1;
4251
4252 config = msm_codec_fn.get_afe_config_fn(codec,
4253 AFE_SLIMBUS_SLAVE_PORT_CONFIG);
4254 if (config) {
4255 rc = afe_set_config(AFE_SLIMBUS_SLAVE_PORT_CONFIG,
4256 config, SLIMBUS_5_TX);
4257 if (rc)
4258 pr_err("%s: Failed to set slimbus slave port config %d\n",
4259 __func__, rc);
4260 }
4261 break;
4262
4263 case MSM_BACKEND_DAI_SLIMBUS_7_RX:
4264 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4265 slim_rx_cfg[SLIM_RX_7].bit_format);
4266 rate->min = rate->max = slim_rx_cfg[SLIM_RX_7].sample_rate;
4267 channels->min = channels->max =
4268 slim_rx_cfg[SLIM_RX_7].channels;
4269 break;
4270
4271 case MSM_BACKEND_DAI_SLIMBUS_7_TX:
4272 rate->min = rate->max = slim_tx_cfg[SLIM_TX_7].sample_rate;
4273 channels->min = channels->max =
4274 slim_tx_cfg[SLIM_TX_7].channels;
4275 break;
4276
4277 case MSM_BACKEND_DAI_SLIMBUS_8_TX:
4278 rate->min = rate->max = slim_tx_cfg[SLIM_TX_8].sample_rate;
4279 channels->min = channels->max =
4280 slim_tx_cfg[SLIM_TX_8].channels;
4281 break;
4282
4283 case MSM_BACKEND_DAI_USB_RX:
4284 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4285 usb_rx_cfg.bit_format);
4286 rate->min = rate->max = usb_rx_cfg.sample_rate;
4287 channels->min = channels->max = usb_rx_cfg.channels;
4288 break;
4289
4290 case MSM_BACKEND_DAI_USB_TX:
4291 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4292 usb_tx_cfg.bit_format);
4293 rate->min = rate->max = usb_tx_cfg.sample_rate;
4294 channels->min = channels->max = usb_tx_cfg.channels;
4295 break;
4296
4297 case MSM_BACKEND_DAI_DISPLAY_PORT_RX:
4298 idx = msm_ext_disp_get_idx_from_beid(dai_link->id);
4299 if (idx < 0) {
4300 pr_err("%s: Incorrect ext disp idx %d\n",
4301 __func__, idx);
4302 rc = idx;
4303 goto done;
4304 }
4305
4306 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4307 ext_disp_rx_cfg[idx].bit_format);
4308 rate->min = rate->max = ext_disp_rx_cfg[idx].sample_rate;
4309 channels->min = channels->max = ext_disp_rx_cfg[idx].channels;
4310 break;
4311
4312 case MSM_BACKEND_DAI_AFE_PCM_RX:
4313 channels->min = channels->max = proxy_rx_cfg.channels;
4314 rate->min = rate->max = SAMPLING_RATE_48KHZ;
4315 break;
4316
4317 case MSM_BACKEND_DAI_PRI_TDM_RX_0:
4318 channels->min = channels->max =
4319 tdm_rx_cfg[TDM_PRI][TDM_0].channels;
4320 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4321 tdm_rx_cfg[TDM_PRI][TDM_0].bit_format);
4322 rate->min = rate->max = tdm_rx_cfg[TDM_PRI][TDM_0].sample_rate;
4323 break;
4324
4325 case MSM_BACKEND_DAI_PRI_TDM_TX_0:
4326 channels->min = channels->max =
4327 tdm_tx_cfg[TDM_PRI][TDM_0].channels;
4328 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4329 tdm_tx_cfg[TDM_PRI][TDM_0].bit_format);
4330 rate->min = rate->max = tdm_tx_cfg[TDM_PRI][TDM_0].sample_rate;
4331 break;
4332
4333 case MSM_BACKEND_DAI_SEC_TDM_RX_0:
4334 channels->min = channels->max =
4335 tdm_rx_cfg[TDM_SEC][TDM_0].channels;
4336 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4337 tdm_rx_cfg[TDM_SEC][TDM_0].bit_format);
4338 rate->min = rate->max = tdm_rx_cfg[TDM_SEC][TDM_0].sample_rate;
4339 break;
4340
4341 case MSM_BACKEND_DAI_SEC_TDM_TX_0:
4342 channels->min = channels->max =
4343 tdm_tx_cfg[TDM_SEC][TDM_0].channels;
4344 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4345 tdm_tx_cfg[TDM_SEC][TDM_0].bit_format);
4346 rate->min = rate->max = tdm_tx_cfg[TDM_SEC][TDM_0].sample_rate;
4347 break;
4348
4349 case MSM_BACKEND_DAI_TERT_TDM_RX_0:
4350 channels->min = channels->max =
4351 tdm_rx_cfg[TDM_TERT][TDM_0].channels;
4352 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4353 tdm_rx_cfg[TDM_TERT][TDM_0].bit_format);
4354 rate->min = rate->max = tdm_rx_cfg[TDM_TERT][TDM_0].sample_rate;
4355 break;
4356
4357 case MSM_BACKEND_DAI_TERT_TDM_TX_0:
4358 channels->min = channels->max =
4359 tdm_tx_cfg[TDM_TERT][TDM_0].channels;
4360 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4361 tdm_tx_cfg[TDM_TERT][TDM_0].bit_format);
4362 rate->min = rate->max = tdm_tx_cfg[TDM_TERT][TDM_0].sample_rate;
4363 break;
4364
4365 case MSM_BACKEND_DAI_QUAT_TDM_RX_0:
4366 channels->min = channels->max =
4367 tdm_rx_cfg[TDM_QUAT][TDM_0].channels;
4368 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4369 tdm_rx_cfg[TDM_QUAT][TDM_0].bit_format);
4370 rate->min = rate->max = tdm_rx_cfg[TDM_QUAT][TDM_0].sample_rate;
4371 break;
4372
4373 case MSM_BACKEND_DAI_QUAT_TDM_TX_0:
4374 channels->min = channels->max =
4375 tdm_tx_cfg[TDM_QUAT][TDM_0].channels;
4376 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4377 tdm_tx_cfg[TDM_QUAT][TDM_0].bit_format);
4378 rate->min = rate->max = tdm_tx_cfg[TDM_QUAT][TDM_0].sample_rate;
4379 break;
4380
4381 case MSM_BACKEND_DAI_QUIN_TDM_RX_0:
4382 channels->min = channels->max =
4383 tdm_rx_cfg[TDM_QUIN][TDM_0].channels;
4384 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4385 tdm_rx_cfg[TDM_QUIN][TDM_0].bit_format);
4386 rate->min = rate->max = tdm_rx_cfg[TDM_QUIN][TDM_0].sample_rate;
4387 break;
4388
4389 case MSM_BACKEND_DAI_QUIN_TDM_TX_0:
4390 channels->min = channels->max =
4391 tdm_tx_cfg[TDM_QUIN][TDM_0].channels;
4392 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4393 tdm_tx_cfg[TDM_QUIN][TDM_0].bit_format);
4394 rate->min = rate->max = tdm_tx_cfg[TDM_QUIN][TDM_0].sample_rate;
4395 break;
4396
4397
4398 case MSM_BACKEND_DAI_AUXPCM_RX:
4399 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4400 aux_pcm_rx_cfg[PRIM_AUX_PCM].bit_format);
4401 rate->min = rate->max =
4402 aux_pcm_rx_cfg[PRIM_AUX_PCM].sample_rate;
4403 channels->min = channels->max =
4404 aux_pcm_rx_cfg[PRIM_AUX_PCM].channels;
4405 break;
4406
4407 case MSM_BACKEND_DAI_AUXPCM_TX:
4408 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4409 aux_pcm_tx_cfg[PRIM_AUX_PCM].bit_format);
4410 rate->min = rate->max =
4411 aux_pcm_tx_cfg[PRIM_AUX_PCM].sample_rate;
4412 channels->min = channels->max =
4413 aux_pcm_tx_cfg[PRIM_AUX_PCM].channels;
4414 break;
4415
4416 case MSM_BACKEND_DAI_SEC_AUXPCM_RX:
4417 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4418 aux_pcm_rx_cfg[SEC_AUX_PCM].bit_format);
4419 rate->min = rate->max =
4420 aux_pcm_rx_cfg[SEC_AUX_PCM].sample_rate;
4421 channels->min = channels->max =
4422 aux_pcm_rx_cfg[SEC_AUX_PCM].channels;
4423 break;
4424
4425 case MSM_BACKEND_DAI_SEC_AUXPCM_TX:
4426 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4427 aux_pcm_tx_cfg[SEC_AUX_PCM].bit_format);
4428 rate->min = rate->max =
4429 aux_pcm_tx_cfg[SEC_AUX_PCM].sample_rate;
4430 channels->min = channels->max =
4431 aux_pcm_tx_cfg[SEC_AUX_PCM].channels;
4432 break;
4433
4434 case MSM_BACKEND_DAI_TERT_AUXPCM_RX:
4435 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4436 aux_pcm_rx_cfg[TERT_AUX_PCM].bit_format);
4437 rate->min = rate->max =
4438 aux_pcm_rx_cfg[TERT_AUX_PCM].sample_rate;
4439 channels->min = channels->max =
4440 aux_pcm_rx_cfg[TERT_AUX_PCM].channels;
4441 break;
4442
4443 case MSM_BACKEND_DAI_TERT_AUXPCM_TX:
4444 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4445 aux_pcm_tx_cfg[TERT_AUX_PCM].bit_format);
4446 rate->min = rate->max =
4447 aux_pcm_tx_cfg[TERT_AUX_PCM].sample_rate;
4448 channels->min = channels->max =
4449 aux_pcm_tx_cfg[TERT_AUX_PCM].channels;
4450 break;
4451
4452 case MSM_BACKEND_DAI_QUAT_AUXPCM_RX:
4453 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4454 aux_pcm_rx_cfg[QUAT_AUX_PCM].bit_format);
4455 rate->min = rate->max =
4456 aux_pcm_rx_cfg[QUAT_AUX_PCM].sample_rate;
4457 channels->min = channels->max =
4458 aux_pcm_rx_cfg[QUAT_AUX_PCM].channels;
4459 break;
4460
4461 case MSM_BACKEND_DAI_QUAT_AUXPCM_TX:
4462 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4463 aux_pcm_tx_cfg[QUAT_AUX_PCM].bit_format);
4464 rate->min = rate->max =
4465 aux_pcm_tx_cfg[QUAT_AUX_PCM].sample_rate;
4466 channels->min = channels->max =
4467 aux_pcm_tx_cfg[QUAT_AUX_PCM].channels;
4468 break;
4469
4470 case MSM_BACKEND_DAI_QUIN_AUXPCM_RX:
4471 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4472 aux_pcm_rx_cfg[QUIN_AUX_PCM].bit_format);
4473 rate->min = rate->max =
4474 aux_pcm_rx_cfg[QUIN_AUX_PCM].sample_rate;
4475 channels->min = channels->max =
4476 aux_pcm_rx_cfg[QUIN_AUX_PCM].channels;
4477 break;
4478
4479 case MSM_BACKEND_DAI_QUIN_AUXPCM_TX:
4480 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4481 aux_pcm_tx_cfg[QUIN_AUX_PCM].bit_format);
4482 rate->min = rate->max =
4483 aux_pcm_tx_cfg[QUIN_AUX_PCM].sample_rate;
4484 channels->min = channels->max =
4485 aux_pcm_tx_cfg[QUIN_AUX_PCM].channels;
4486 break;
4487
4488 case MSM_BACKEND_DAI_PRI_MI2S_RX:
4489 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4490 mi2s_rx_cfg[PRIM_MI2S].bit_format);
4491 rate->min = rate->max = mi2s_rx_cfg[PRIM_MI2S].sample_rate;
4492 channels->min = channels->max =
4493 mi2s_rx_cfg[PRIM_MI2S].channels;
4494 break;
4495
4496 case MSM_BACKEND_DAI_PRI_MI2S_TX:
4497 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4498 mi2s_tx_cfg[PRIM_MI2S].bit_format);
4499 rate->min = rate->max = mi2s_tx_cfg[PRIM_MI2S].sample_rate;
4500 channels->min = channels->max =
4501 mi2s_tx_cfg[PRIM_MI2S].channels;
4502 break;
4503
4504 case MSM_BACKEND_DAI_SECONDARY_MI2S_RX:
4505 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4506 mi2s_rx_cfg[SEC_MI2S].bit_format);
4507 rate->min = rate->max = mi2s_rx_cfg[SEC_MI2S].sample_rate;
4508 channels->min = channels->max =
4509 mi2s_rx_cfg[SEC_MI2S].channels;
4510 break;
4511
4512 case MSM_BACKEND_DAI_SECONDARY_MI2S_TX:
4513 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4514 mi2s_tx_cfg[SEC_MI2S].bit_format);
4515 rate->min = rate->max = mi2s_tx_cfg[SEC_MI2S].sample_rate;
4516 channels->min = channels->max =
4517 mi2s_tx_cfg[SEC_MI2S].channels;
4518 break;
4519
4520 case MSM_BACKEND_DAI_TERTIARY_MI2S_RX:
4521 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4522 mi2s_rx_cfg[TERT_MI2S].bit_format);
4523 rate->min = rate->max = mi2s_rx_cfg[TERT_MI2S].sample_rate;
4524 channels->min = channels->max =
4525 mi2s_rx_cfg[TERT_MI2S].channels;
4526 break;
4527
4528 case MSM_BACKEND_DAI_TERTIARY_MI2S_TX:
4529 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4530 mi2s_tx_cfg[TERT_MI2S].bit_format);
4531 rate->min = rate->max = mi2s_tx_cfg[TERT_MI2S].sample_rate;
4532 channels->min = channels->max =
4533 mi2s_tx_cfg[TERT_MI2S].channels;
4534 break;
4535
4536 case MSM_BACKEND_DAI_QUATERNARY_MI2S_RX:
4537 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4538 mi2s_rx_cfg[QUAT_MI2S].bit_format);
4539 rate->min = rate->max = mi2s_rx_cfg[QUAT_MI2S].sample_rate;
4540 channels->min = channels->max =
4541 mi2s_rx_cfg[QUAT_MI2S].channels;
4542 break;
4543
4544 case MSM_BACKEND_DAI_QUATERNARY_MI2S_TX:
4545 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4546 mi2s_tx_cfg[QUAT_MI2S].bit_format);
4547 rate->min = rate->max = mi2s_tx_cfg[QUAT_MI2S].sample_rate;
4548 channels->min = channels->max =
4549 mi2s_tx_cfg[QUAT_MI2S].channels;
4550 break;
4551
4552 case MSM_BACKEND_DAI_QUINARY_MI2S_RX:
4553 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4554 mi2s_rx_cfg[QUIN_MI2S].bit_format);
4555 rate->min = rate->max = mi2s_rx_cfg[QUIN_MI2S].sample_rate;
4556 channels->min = channels->max =
4557 mi2s_rx_cfg[QUIN_MI2S].channels;
4558 break;
4559
4560 case MSM_BACKEND_DAI_QUINARY_MI2S_TX:
4561 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4562 mi2s_tx_cfg[QUIN_MI2S].bit_format);
4563 rate->min = rate->max = mi2s_tx_cfg[QUIN_MI2S].sample_rate;
4564 channels->min = channels->max =
4565 mi2s_tx_cfg[QUIN_MI2S].channels;
4566 break;
4567
4568 case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_0:
4569 case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_1:
4570 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_0:
4571 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_1:
4572 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_2:
4573 idx = msm_cdc_dma_get_idx_from_beid(dai_link->id);
4574 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4575 cdc_dma_rx_cfg[idx].bit_format);
4576 rate->min = rate->max = cdc_dma_rx_cfg[idx].sample_rate;
4577 channels->min = channels->max = cdc_dma_rx_cfg[idx].channels;
4578 break;
4579
4580 case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_1:
4581 case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_2:
4582 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_0:
Aditya Bavanaric65c7e42018-08-08 14:10:20 +05304583 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_3:
4584 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_4:
Aditya Bavanari44eb8952018-05-09 19:01:50 +05304585 idx = msm_cdc_dma_get_idx_from_beid(dai_link->id);
4586 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4587 cdc_dma_tx_cfg[idx].bit_format);
4588 rate->min = rate->max = cdc_dma_tx_cfg[idx].sample_rate;
4589 channels->min = channels->max = cdc_dma_tx_cfg[idx].channels;
4590 break;
4591
4592 case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_0:
4593 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4594 SNDRV_PCM_FORMAT_S32_LE);
4595 rate->min = rate->max = SAMPLING_RATE_8KHZ;
4596 channels->min = channels->max = msm_vi_feed_tx_ch;
4597 break;
4598
4599 default:
4600 rate->min = rate->max = SAMPLING_RATE_48KHZ;
4601 break;
4602 }
4603
4604done:
4605 return rc;
4606}
4607
4608static bool msm_usbc_swap_gnd_mic(struct snd_soc_codec *codec, bool active)
4609{
Aditya Bavanari44eb8952018-05-09 19:01:50 +05304610 struct snd_soc_card *card = codec->component.card;
Vatsal Bucha6cb17a02018-08-07 11:07:04 +05304611 struct msm_asoc_mach_data *pdata =
4612 snd_soc_card_get_drvdata(card);
Aditya Bavanari44eb8952018-05-09 19:01:50 +05304613
Vatsal Bucha6cb17a02018-08-07 11:07:04 +05304614 if (!pdata->fsa_handle)
Aditya Bavanari44eb8952018-05-09 19:01:50 +05304615 return false;
Aditya Bavanari44eb8952018-05-09 19:01:50 +05304616
Vatsal Bucha6cb17a02018-08-07 11:07:04 +05304617 return fsa4480_switch_event(pdata->fsa_handle, FSA_MIC_GND_SWAP);
Aditya Bavanari44eb8952018-05-09 19:01:50 +05304618}
4619
4620static bool msm_swap_gnd_mic(struct snd_soc_codec *codec, bool active)
4621{
4622 int value = 0;
4623 bool ret = false;
4624 struct snd_soc_card *card;
4625 struct msm_asoc_mach_data *pdata;
4626
4627 if (!codec) {
4628 pr_err("%s codec is NULL\n", __func__);
4629 return false;
4630 }
4631 card = codec->component.card;
4632 pdata = snd_soc_card_get_drvdata(card);
4633
4634 if (!pdata)
4635 return false;
4636
4637 if (wcd_mbhc_cfg.enable_usbc_analog)
4638 return msm_usbc_swap_gnd_mic(codec, active);
4639
4640 /* if usbc is not defined, swap using us_euro_gpio_p */
4641 if (pdata->us_euro_gpio_p) {
4642 value = msm_cdc_pinctrl_get_state(
4643 pdata->us_euro_gpio_p);
4644 if (value)
4645 msm_cdc_pinctrl_select_sleep_state(
4646 pdata->us_euro_gpio_p);
4647 else
4648 msm_cdc_pinctrl_select_active_state(
4649 pdata->us_euro_gpio_p);
4650 dev_dbg(codec->dev, "%s: swap select switch %d to %d\n",
4651 __func__, value, !value);
4652 ret = true;
4653 }
4654 return ret;
4655}
4656
4657static int msm_afe_set_config(struct snd_soc_codec *codec)
4658{
4659 int ret = 0;
4660 void *config_data = NULL;
4661
4662 if (!msm_codec_fn.get_afe_config_fn) {
4663 dev_err(codec->dev, "%s: codec get afe config not init'ed\n",
4664 __func__);
4665 return -EINVAL;
4666 }
4667
4668 config_data = msm_codec_fn.get_afe_config_fn(codec,
4669 AFE_CDC_REGISTERS_CONFIG);
4670 if (config_data) {
4671 ret = afe_set_config(AFE_CDC_REGISTERS_CONFIG, config_data, 0);
4672 if (ret) {
4673 dev_err(codec->dev,
4674 "%s: Failed to set codec registers config %d\n",
4675 __func__, ret);
4676 return ret;
4677 }
4678 }
4679
4680 config_data = msm_codec_fn.get_afe_config_fn(codec,
4681 AFE_CDC_REGISTER_PAGE_CONFIG);
4682 if (config_data) {
4683 ret = afe_set_config(AFE_CDC_REGISTER_PAGE_CONFIG, config_data,
4684 0);
4685 if (ret)
4686 dev_err(codec->dev,
4687 "%s: Failed to set cdc register page config\n",
4688 __func__);
4689 }
4690
4691 config_data = msm_codec_fn.get_afe_config_fn(codec,
4692 AFE_SLIMBUS_SLAVE_CONFIG);
4693 if (config_data) {
4694 ret = afe_set_config(AFE_SLIMBUS_SLAVE_CONFIG, config_data, 0);
4695 if (ret) {
4696 dev_err(codec->dev,
4697 "%s: Failed to set slimbus slave config %d\n",
4698 __func__, ret);
4699 return ret;
4700 }
4701 }
4702
4703 return 0;
4704}
4705
4706static void msm_afe_clear_config(void)
4707{
4708 afe_clear_config(AFE_CDC_REGISTERS_CONFIG);
4709 afe_clear_config(AFE_SLIMBUS_SLAVE_CONFIG);
4710}
4711
Aditya Bavanari44eb8952018-05-09 19:01:50 +05304712static int msm_audrx_tavil_init(struct snd_soc_pcm_runtime *rtd)
4713{
4714 int ret = 0;
4715 void *config_data;
4716 struct snd_soc_codec *codec = rtd->codec;
4717 struct snd_soc_dapm_context *dapm = snd_soc_codec_get_dapm(codec);
4718 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
4719 struct snd_soc_dai *codec_dai = rtd->codec_dai;
4720 struct snd_soc_component *aux_comp;
4721 struct snd_card *card;
4722 struct snd_info_entry *entry;
4723 struct msm_asoc_mach_data *pdata =
4724 snd_soc_card_get_drvdata(rtd->card);
4725
4726 /*
4727 * Codec SLIMBUS configuration
4728 * RX1, RX2, RX3, RX4, RX5, RX6, RX7, RX8
4729 * TX1, TX2, TX3, TX4, TX5, TX6, TX7, TX8, TX9, TX10, TX11, TX12, TX13
4730 * TX14, TX15, TX16
4731 */
4732 unsigned int rx_ch[WCD934X_RX_MAX] = {144, 145, 146, 147, 148, 149,
4733 150, 151};
4734 unsigned int tx_ch[WCD934X_TX_MAX] = {128, 129, 130, 131, 132, 133,
4735 134, 135, 136, 137, 138, 139,
4736 140, 141, 142, 143};
4737
4738 pr_info("%s: dev_name:%s\n", __func__, dev_name(cpu_dai->dev));
4739
4740 rtd->pmdown_time = 0;
4741
4742 ret = snd_soc_add_codec_controls(codec, msm_tavil_snd_controls,
4743 ARRAY_SIZE(msm_tavil_snd_controls));
4744 if (ret < 0) {
4745 pr_err("%s: add_codec_controls failed, err %d\n",
4746 __func__, ret);
4747 return ret;
4748 }
4749
4750 ret = snd_soc_add_codec_controls(codec, msm_common_snd_controls,
4751 ARRAY_SIZE(msm_common_snd_controls));
4752 if (ret < 0) {
4753 pr_err("%s: add_codec_controls failed, err %d\n",
4754 __func__, ret);
4755 return ret;
4756 }
4757
4758 snd_soc_dapm_new_controls(dapm, msm_dapm_widgets_tavil,
4759 ARRAY_SIZE(msm_dapm_widgets_tavil));
4760
4761 snd_soc_dapm_add_routes(dapm, wcd_audio_paths_tavil,
4762 ARRAY_SIZE(wcd_audio_paths_tavil));
4763
4764 snd_soc_dapm_ignore_suspend(dapm, "Handset Mic");
4765 snd_soc_dapm_ignore_suspend(dapm, "Headset Mic");
4766 snd_soc_dapm_ignore_suspend(dapm, "ANCRight Headset Mic");
4767 snd_soc_dapm_ignore_suspend(dapm, "ANCLeft Headset Mic");
4768 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic0");
4769 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic1");
4770 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic2");
4771 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic3");
4772 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic4");
4773 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic5");
4774 snd_soc_dapm_ignore_suspend(dapm, "Analog Mic5");
4775 snd_soc_dapm_ignore_suspend(dapm, "MADINPUT");
4776 snd_soc_dapm_ignore_suspend(dapm, "MAD_CPE_INPUT");
4777 snd_soc_dapm_ignore_suspend(dapm, "MAD_CPE_OUT1");
4778 snd_soc_dapm_ignore_suspend(dapm, "MAD_CPE_OUT2");
4779 snd_soc_dapm_ignore_suspend(dapm, "EAR");
4780 snd_soc_dapm_ignore_suspend(dapm, "LINEOUT1");
4781 snd_soc_dapm_ignore_suspend(dapm, "LINEOUT2");
4782 snd_soc_dapm_ignore_suspend(dapm, "ANC EAR");
4783 snd_soc_dapm_ignore_suspend(dapm, "SPK1 OUT");
4784 snd_soc_dapm_ignore_suspend(dapm, "SPK2 OUT");
4785 snd_soc_dapm_ignore_suspend(dapm, "HPHL");
4786 snd_soc_dapm_ignore_suspend(dapm, "HPHR");
4787 snd_soc_dapm_ignore_suspend(dapm, "AIF4 VI");
4788 snd_soc_dapm_ignore_suspend(dapm, "VIINPUT");
4789 snd_soc_dapm_ignore_suspend(dapm, "ANC HPHL");
4790 snd_soc_dapm_ignore_suspend(dapm, "ANC HPHR");
4791
4792 snd_soc_dapm_sync(dapm);
4793
4794 snd_soc_dai_set_channel_map(codec_dai, ARRAY_SIZE(tx_ch),
4795 tx_ch, ARRAY_SIZE(rx_ch), rx_ch);
4796
4797 msm_codec_fn.get_afe_config_fn = tavil_get_afe_config;
4798
Vaishnavi Kommaraju9a3d5eb2018-09-19 18:16:39 +05304799 ret = msm_afe_set_config(codec);
Aditya Bavanari44eb8952018-05-09 19:01:50 +05304800 if (ret) {
4801 pr_err("%s: Failed to set AFE config %d\n", __func__, ret);
4802 goto err;
4803 }
Vaishnavi Kommaraju9a3d5eb2018-09-19 18:16:39 +05304804 pdata->is_afe_config_done = true;
Aditya Bavanari44eb8952018-05-09 19:01:50 +05304805
4806 config_data = msm_codec_fn.get_afe_config_fn(codec,
4807 AFE_AANC_VERSION);
4808 if (config_data) {
4809 ret = afe_set_config(AFE_AANC_VERSION, config_data, 0);
4810 if (ret) {
4811 pr_err("%s: Failed to set aanc version %d\n",
4812 __func__, ret);
4813 goto err;
4814 }
4815 }
4816
4817 /*
4818 * Send speaker configuration only for WSA8810.
4819 * Default configuration is for WSA8815.
4820 */
4821 pr_debug("%s: Number of aux devices: %d\n",
4822 __func__, rtd->card->num_aux_devs);
4823 if (rtd->card->num_aux_devs &&
4824 !list_empty(&rtd->card->aux_comp_list)) {
4825 aux_comp = list_first_entry(&rtd->card->aux_comp_list,
4826 struct snd_soc_component, card_aux_list);
4827 if (!strcmp(aux_comp->name, WSA8810_NAME_1) ||
4828 !strcmp(aux_comp->name, WSA8810_NAME_2)) {
4829 tavil_set_spkr_mode(rtd->codec, WCD934X_SPKR_MODE_1);
4830 tavil_set_spkr_gain_offset(rtd->codec,
4831 WCD934X_RX_GAIN_OFFSET_M1P5_DB);
4832 }
4833 }
4834
4835 card = rtd->card->snd_card;
4836 entry = snd_info_create_subdir(card->module, "codecs",
4837 card->proc_root);
4838 if (!entry) {
4839 pr_debug("%s: Cannot create codecs module entry\n",
4840 __func__);
4841 ret = 0;
4842 goto err;
4843 }
4844 pdata->codec_root = entry;
4845 tavil_codec_info_create_codec_entry(pdata->codec_root, codec);
4846
4847 codec_reg_done = true;
4848 return 0;
4849err:
4850 return ret;
4851}
4852
4853static int msm_int_audrx_init(struct snd_soc_pcm_runtime *rtd)
4854{
4855 int ret = 0;
4856 struct snd_soc_codec *codec = rtd->codec;
4857 struct snd_soc_dapm_context *dapm = snd_soc_codec_get_dapm(codec);
4858 struct snd_card *card;
4859 struct snd_info_entry *entry;
Aditya Bavanari0b26ab32018-08-03 23:53:01 +05304860 struct snd_soc_component *aux_comp;
Aditya Bavanari44eb8952018-05-09 19:01:50 +05304861 struct msm_asoc_mach_data *pdata =
4862 snd_soc_card_get_drvdata(rtd->card);
4863
4864 ret = snd_soc_add_codec_controls(codec, msm_int_snd_controls,
4865 ARRAY_SIZE(msm_int_snd_controls));
4866 if (ret < 0) {
4867 pr_err("%s: add_codec_controls failed: %d\n",
4868 __func__, ret);
4869 return ret;
4870 }
4871 ret = snd_soc_add_codec_controls(codec, msm_common_snd_controls,
4872 ARRAY_SIZE(msm_common_snd_controls));
4873 if (ret < 0) {
4874 pr_err("%s: add common snd controls failed: %d\n",
4875 __func__, ret);
4876 return ret;
4877 }
4878
4879 snd_soc_dapm_new_controls(dapm, msm_int_dapm_widgets,
4880 ARRAY_SIZE(msm_int_dapm_widgets));
4881
Aditya Bavanari0b26ab32018-08-03 23:53:01 +05304882 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic0");
Aditya Bavanari44eb8952018-05-09 19:01:50 +05304883 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic1");
4884 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic2");
4885 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic3");
Aditya Bavanari44eb8952018-05-09 19:01:50 +05304886
4887 snd_soc_dapm_ignore_suspend(dapm, "Analog Mic1");
4888 snd_soc_dapm_ignore_suspend(dapm, "Analog Mic2");
4889 snd_soc_dapm_ignore_suspend(dapm, "Analog Mic3");
4890 snd_soc_dapm_ignore_suspend(dapm, "Analog Mic4");
4891
Aditya Bavanari0b26ab32018-08-03 23:53:01 +05304892 snd_soc_dapm_ignore_suspend(dapm, "WSA_SPK1 OUT");
4893 snd_soc_dapm_ignore_suspend(dapm, "WSA_SPK2 OUT");
4894 snd_soc_dapm_ignore_suspend(dapm, "WSA AIF VI");
4895 snd_soc_dapm_ignore_suspend(dapm, "VIINPUT_WSA");
Aditya Bavanari44eb8952018-05-09 19:01:50 +05304896
4897 snd_soc_dapm_sync(dapm);
4898
Aditya Bavanari0b26ab32018-08-03 23:53:01 +05304899 /*
4900 * Send speaker configuration only for WSA8810.
4901 * Default configuration is for WSA8815.
4902 */
4903 dev_dbg(codec->dev, "%s: Number of aux devices: %d\n",
4904 __func__, rtd->card->num_aux_devs);
4905 if (rtd->card->num_aux_devs &&
4906 !list_empty(&rtd->card->component_dev_list)) {
4907 aux_comp = list_first_entry(
4908 &rtd->card->component_dev_list,
4909 struct snd_soc_component,
4910 card_aux_list);
4911 if (!strcmp(aux_comp->name, WSA8810_NAME_1) ||
4912 !strcmp(aux_comp->name, WSA8810_NAME_2)) {
4913 wsa_macro_set_spkr_mode(rtd->codec,
4914 WSA_MACRO_SPKR_MODE_1);
4915 wsa_macro_set_spkr_gain_offset(rtd->codec,
4916 WSA_MACRO_GAIN_OFFSET_M1P5_DB);
4917 }
4918 }
Aditya Bavanari44eb8952018-05-09 19:01:50 +05304919 card = rtd->card->snd_card;
Aditya Bavanari4ae32fc2018-08-13 13:08:34 +05304920 if (!pdata->codec_root) {
4921 entry = snd_info_create_subdir(card->module, "codecs",
4922 card->proc_root);
4923 if (!entry) {
4924 pr_debug("%s: Cannot create codecs module entry\n",
4925 __func__);
4926 ret = 0;
4927 goto err;
4928 }
4929 pdata->codec_root = entry;
Aditya Bavanari44eb8952018-05-09 19:01:50 +05304930 }
Aditya Bavanari44eb8952018-05-09 19:01:50 +05304931 bolero_info_create_codec_entry(pdata->codec_root, codec);
Aditya Bavanari3e19f3c2018-11-12 19:29:50 +05304932 /*
4933 * SM6150 MSM 1.0 doesn't have hardware wake up interrupt line
4934 * from AOSS to APSS. So, it uses SW workaround and listens to
4935 * interrupt from AFE over IPC.
4936 * Check for MSM version and MSM ID and register wake irq
4937 * accordingly to provide compatibility to all chipsets.
4938 */
4939 if (socinfo_get_id() == SM6150_SOC_MSM_ID &&
4940 socinfo_get_version() == SM6150_SOC_VERSION_1_0)
4941 bolero_register_wake_irq(codec, true);
4942 else
4943 bolero_register_wake_irq(codec, false);
4944
Aditya Bavanari44eb8952018-05-09 19:01:50 +05304945 codec_reg_done = true;
4946 return 0;
4947err:
4948 return ret;
4949}
4950
4951static int msm_wcn_init(struct snd_soc_pcm_runtime *rtd)
4952{
4953 unsigned int rx_ch[WCN_CDC_SLIM_RX_CH_MAX] = {157, 158};
4954 unsigned int tx_ch[WCN_CDC_SLIM_TX_CH_MAX] = {159, 160, 161};
4955 struct snd_soc_dai *codec_dai = rtd->codec_dai;
4956
4957 return snd_soc_dai_set_channel_map(codec_dai, ARRAY_SIZE(tx_ch),
4958 tx_ch, ARRAY_SIZE(rx_ch), rx_ch);
4959}
4960
4961static void *def_wcd_mbhc_cal(void)
4962{
4963 void *wcd_mbhc_cal;
4964 struct wcd_mbhc_btn_detect_cfg *btn_cfg;
4965 u16 *btn_high;
4966
4967 wcd_mbhc_cal = kzalloc(WCD_MBHC_CAL_SIZE(WCD_MBHC_DEF_BUTTONS,
4968 WCD9XXX_MBHC_DEF_RLOADS), GFP_KERNEL);
4969 if (!wcd_mbhc_cal)
4970 return NULL;
4971
4972#define S(X, Y) ((WCD_MBHC_CAL_PLUG_TYPE_PTR(wcd_mbhc_cal)->X) = (Y))
4973 S(v_hs_max, 1600);
4974#undef S
4975#define S(X, Y) ((WCD_MBHC_CAL_BTN_DET_PTR(wcd_mbhc_cal)->X) = (Y))
4976 S(num_btn, WCD_MBHC_DEF_BUTTONS);
4977#undef S
4978
4979 btn_cfg = WCD_MBHC_CAL_BTN_DET_PTR(wcd_mbhc_cal);
4980 btn_high = ((void *)&btn_cfg->_v_btn_low) +
4981 (sizeof(btn_cfg->_v_btn_low[0]) * btn_cfg->num_btn);
4982
4983 btn_high[0] = 75;
4984 btn_high[1] = 150;
4985 btn_high[2] = 237;
4986 btn_high[3] = 500;
4987 btn_high[4] = 500;
4988 btn_high[5] = 500;
4989 btn_high[6] = 500;
4990 btn_high[7] = 500;
4991
4992 return wcd_mbhc_cal;
4993}
4994
4995static int msm_snd_hw_params(struct snd_pcm_substream *substream,
4996 struct snd_pcm_hw_params *params)
4997{
4998 struct snd_soc_pcm_runtime *rtd = substream->private_data;
4999 struct snd_soc_dai *codec_dai = rtd->codec_dai;
5000 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
5001 struct snd_soc_dai_link *dai_link = rtd->dai_link;
5002
5003 int ret = 0;
5004 u32 rx_ch[SLIM_MAX_RX_PORTS], tx_ch[SLIM_MAX_TX_PORTS];
5005 u32 rx_ch_cnt = 0, tx_ch_cnt = 0;
5006 u32 user_set_tx_ch = 0;
5007 u32 rx_ch_count;
5008
5009 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
5010 ret = snd_soc_dai_get_channel_map(codec_dai,
5011 &tx_ch_cnt, tx_ch, &rx_ch_cnt, rx_ch);
5012 if (ret < 0) {
5013 pr_err("%s: failed to get codec chan map, err:%d\n",
5014 __func__, ret);
5015 goto err;
5016 }
5017 if (dai_link->id == MSM_BACKEND_DAI_SLIMBUS_5_RX) {
5018 pr_debug("%s: rx_5_ch=%d\n", __func__,
5019 slim_rx_cfg[5].channels);
5020 rx_ch_count = slim_rx_cfg[5].channels;
5021 } else if (dai_link->id == MSM_BACKEND_DAI_SLIMBUS_2_RX) {
5022 pr_debug("%s: rx_2_ch=%d\n", __func__,
5023 slim_rx_cfg[2].channels);
5024 rx_ch_count = slim_rx_cfg[2].channels;
5025 } else if (dai_link->id == MSM_BACKEND_DAI_SLIMBUS_6_RX) {
5026 pr_debug("%s: rx_6_ch=%d\n", __func__,
5027 slim_rx_cfg[6].channels);
5028 rx_ch_count = slim_rx_cfg[6].channels;
5029 } else {
5030 pr_debug("%s: rx_0_ch=%d\n", __func__,
5031 slim_rx_cfg[0].channels);
5032 rx_ch_count = slim_rx_cfg[0].channels;
5033 }
5034 ret = snd_soc_dai_set_channel_map(cpu_dai, 0, 0,
5035 rx_ch_count, rx_ch);
5036 if (ret < 0) {
5037 pr_err("%s: failed to set cpu chan map, err:%d\n",
5038 __func__, ret);
5039 goto err;
5040 }
5041 } else {
5042
5043 pr_debug("%s: %s_tx_dai_id_%d_ch=%d\n", __func__,
5044 codec_dai->name, codec_dai->id, user_set_tx_ch);
5045 ret = snd_soc_dai_get_channel_map(codec_dai,
5046 &tx_ch_cnt, tx_ch, &rx_ch_cnt, rx_ch);
5047 if (ret < 0) {
5048 pr_err("%s: failed to get tx codec chan map, err:%d\n",
5049 __func__, ret);
5050 goto err;
5051 }
5052 /* For <codec>_tx1 case */
5053 if (dai_link->id == MSM_BACKEND_DAI_SLIMBUS_0_TX)
5054 user_set_tx_ch = slim_tx_cfg[0].channels;
5055 /* For <codec>_tx3 case */
5056 else if (dai_link->id == MSM_BACKEND_DAI_SLIMBUS_1_TX)
5057 user_set_tx_ch = slim_tx_cfg[1].channels;
5058 else if (dai_link->id == MSM_BACKEND_DAI_SLIMBUS_4_TX)
5059 user_set_tx_ch = msm_vi_feed_tx_ch;
5060 else
5061 user_set_tx_ch = tx_ch_cnt;
5062
5063 pr_debug("%s: msm_slim_0_tx_ch(%d) user_set_tx_ch(%d) tx_ch_cnt(%d), BE id (%d)\n",
5064 __func__, slim_tx_cfg[0].channels, user_set_tx_ch,
5065 tx_ch_cnt, dai_link->id);
5066
5067 ret = snd_soc_dai_set_channel_map(cpu_dai,
5068 user_set_tx_ch, tx_ch, 0, 0);
5069 if (ret < 0)
5070 pr_err("%s: failed to set tx cpu chan map, err:%d\n",
5071 __func__, ret);
5072 }
5073
5074err:
5075 return ret;
5076}
5077
5078
5079static int msm_snd_cdc_dma_hw_params(struct snd_pcm_substream *substream,
5080 struct snd_pcm_hw_params *params)
5081{
5082 struct snd_soc_pcm_runtime *rtd = substream->private_data;
5083 struct snd_soc_dai *codec_dai = rtd->codec_dai;
5084 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
5085 struct snd_soc_dai_link *dai_link = rtd->dai_link;
5086
5087 int ret = 0;
5088 u32 rx_ch_cdc_dma, tx_ch_cdc_dma;
5089 u32 rx_ch_cnt = 0, tx_ch_cnt = 0;
5090 u32 user_set_tx_ch = 0;
5091 u32 user_set_rx_ch = 0;
5092 u32 ch_id;
5093
5094 ret = snd_soc_dai_get_channel_map(codec_dai,
5095 &tx_ch_cnt, &tx_ch_cdc_dma, &rx_ch_cnt,
5096 &rx_ch_cdc_dma);
5097 if (ret < 0) {
5098 pr_err("%s: failed to get codec chan map, err:%d\n",
5099 __func__, ret);
5100 goto err;
5101 }
5102
5103 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
5104 switch (dai_link->id) {
5105 case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_0:
5106 case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_1:
5107 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_0:
5108 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_1:
5109 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_2:
5110 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_3:
5111 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_4:
5112 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_5:
5113 {
5114 ch_id = msm_cdc_dma_get_idx_from_beid(dai_link->id);
5115 pr_debug("%s: id %d rx_ch=%d\n", __func__,
5116 ch_id, cdc_dma_rx_cfg[ch_id].channels);
5117 user_set_rx_ch = cdc_dma_rx_cfg[ch_id].channels;
5118 ret = snd_soc_dai_set_channel_map(cpu_dai, 0, 0,
5119 user_set_rx_ch, &rx_ch_cdc_dma);
5120 if (ret < 0) {
5121 pr_err("%s: failed to set cpu chan map, err:%d\n",
5122 __func__, ret);
5123 goto err;
5124 }
5125
5126 }
5127 break;
5128 }
5129 } else {
5130 switch (dai_link->id) {
5131 case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_0:
5132 {
5133 user_set_tx_ch = msm_vi_feed_tx_ch;
5134 }
5135 break;
5136 case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_1:
5137 case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_2:
5138 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_0:
Aditya Bavanaric65c7e42018-08-08 14:10:20 +05305139 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_3:
5140 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_4:
Aditya Bavanari44eb8952018-05-09 19:01:50 +05305141 {
5142 ch_id = msm_cdc_dma_get_idx_from_beid(dai_link->id);
5143 pr_debug("%s: id %d tx_ch=%d\n", __func__,
5144 ch_id, cdc_dma_tx_cfg[ch_id].channels);
5145 user_set_tx_ch = cdc_dma_tx_cfg[ch_id].channels;
5146 }
5147 break;
5148 }
5149
5150 ret = snd_soc_dai_set_channel_map(cpu_dai, user_set_tx_ch,
5151 &tx_ch_cdc_dma, 0, 0);
5152 if (ret < 0) {
5153 pr_err("%s: failed to set cpu chan map, err:%d\n",
5154 __func__, ret);
5155 goto err;
5156 }
5157 }
5158
5159err:
5160 return ret;
5161}
5162
5163static int msm_slimbus_2_hw_params(struct snd_pcm_substream *substream,
5164 struct snd_pcm_hw_params *params)
5165{
5166 struct snd_soc_pcm_runtime *rtd = substream->private_data;
5167 struct snd_soc_dai *codec_dai = rtd->codec_dai;
5168 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
5169 unsigned int rx_ch[SLIM_MAX_RX_PORTS], tx_ch[SLIM_MAX_TX_PORTS];
5170 unsigned int rx_ch_cnt = 0, tx_ch_cnt = 0;
5171 unsigned int num_tx_ch = 0;
5172 unsigned int num_rx_ch = 0;
5173 int ret = 0;
5174
5175 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
5176 num_rx_ch = params_channels(params);
5177 pr_debug("%s: %s rx_dai_id = %d num_ch = %d\n", __func__,
5178 codec_dai->name, codec_dai->id, num_rx_ch);
5179 ret = snd_soc_dai_get_channel_map(codec_dai,
5180 &tx_ch_cnt, tx_ch, &rx_ch_cnt, rx_ch);
5181 if (ret < 0) {
5182 pr_err("%s: failed to get codec chan map, err:%d\n",
5183 __func__, ret);
5184 goto err;
5185 }
5186 ret = snd_soc_dai_set_channel_map(cpu_dai, 0, 0,
5187 num_rx_ch, rx_ch);
5188 if (ret < 0) {
5189 pr_err("%s: failed to set cpu chan map, err:%d\n",
5190 __func__, ret);
5191 goto err;
5192 }
5193 } else {
5194 num_tx_ch = params_channels(params);
5195 pr_debug("%s: %s tx_dai_id = %d num_ch = %d\n", __func__,
5196 codec_dai->name, codec_dai->id, num_tx_ch);
5197 ret = snd_soc_dai_get_channel_map(codec_dai,
5198 &tx_ch_cnt, tx_ch, &rx_ch_cnt, rx_ch);
5199 if (ret < 0) {
5200 pr_err("%s: failed to get tx codec chan map, err:%d\n",
5201 __func__, ret);
5202 goto err;
5203 }
5204 ret = snd_soc_dai_set_channel_map(cpu_dai,
5205 num_tx_ch, tx_ch, 0, 0);
5206 if (ret < 0) {
5207 pr_err("%s: failed to set tx cpu chan map, err:%d\n",
5208 __func__, ret);
5209 goto err;
5210 }
5211 }
5212
5213err:
5214 return ret;
5215}
5216
5217static int msm_wcn_hw_params(struct snd_pcm_substream *substream,
5218 struct snd_pcm_hw_params *params)
5219{
5220 struct snd_soc_pcm_runtime *rtd = substream->private_data;
5221 struct snd_soc_dai *codec_dai = rtd->codec_dai;
5222 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
5223 struct snd_soc_dai_link *dai_link = rtd->dai_link;
5224 u32 rx_ch[WCN_CDC_SLIM_RX_CH_MAX], tx_ch[WCN_CDC_SLIM_TX_CH_MAX];
5225 u32 rx_ch_cnt = 0, tx_ch_cnt = 0;
5226 int ret;
5227
5228 dev_dbg(rtd->dev, "%s: %s_tx_dai_id_%d\n", __func__,
5229 codec_dai->name, codec_dai->id);
5230 ret = snd_soc_dai_get_channel_map(codec_dai,
5231 &tx_ch_cnt, tx_ch, &rx_ch_cnt, rx_ch);
5232 if (ret) {
5233 dev_err(rtd->dev,
5234 "%s: failed to get BTFM codec chan map\n, err:%d\n",
5235 __func__, ret);
5236 goto err;
5237 }
5238
5239 dev_dbg(rtd->dev, "%s: tx_ch_cnt(%d) BE id %d\n",
5240 __func__, tx_ch_cnt, dai_link->id);
5241
5242 ret = snd_soc_dai_set_channel_map(cpu_dai,
5243 tx_ch_cnt, tx_ch, rx_ch_cnt, rx_ch);
5244 if (ret)
5245 dev_err(rtd->dev, "%s: failed to set cpu chan map, err:%d\n",
5246 __func__, ret);
5247
5248err:
5249 return ret;
5250}
5251
5252static int msm_get_port_id(int be_id)
5253{
5254 int afe_port_id;
5255
5256 switch (be_id) {
5257 case MSM_BACKEND_DAI_PRI_MI2S_RX:
5258 afe_port_id = AFE_PORT_ID_PRIMARY_MI2S_RX;
5259 break;
5260 case MSM_BACKEND_DAI_PRI_MI2S_TX:
5261 afe_port_id = AFE_PORT_ID_PRIMARY_MI2S_TX;
5262 break;
5263 case MSM_BACKEND_DAI_SECONDARY_MI2S_RX:
5264 afe_port_id = AFE_PORT_ID_SECONDARY_MI2S_RX;
5265 break;
5266 case MSM_BACKEND_DAI_SECONDARY_MI2S_TX:
5267 afe_port_id = AFE_PORT_ID_SECONDARY_MI2S_TX;
5268 break;
5269 case MSM_BACKEND_DAI_TERTIARY_MI2S_RX:
5270 afe_port_id = AFE_PORT_ID_TERTIARY_MI2S_RX;
5271 break;
5272 case MSM_BACKEND_DAI_TERTIARY_MI2S_TX:
5273 afe_port_id = AFE_PORT_ID_TERTIARY_MI2S_TX;
5274 break;
5275 case MSM_BACKEND_DAI_QUATERNARY_MI2S_RX:
5276 afe_port_id = AFE_PORT_ID_QUATERNARY_MI2S_RX;
5277 break;
5278 case MSM_BACKEND_DAI_QUATERNARY_MI2S_TX:
5279 afe_port_id = AFE_PORT_ID_QUATERNARY_MI2S_TX;
5280 break;
5281 case MSM_BACKEND_DAI_QUINARY_MI2S_RX:
5282 afe_port_id = AFE_PORT_ID_QUINARY_MI2S_RX;
5283 break;
5284 case MSM_BACKEND_DAI_QUINARY_MI2S_TX:
5285 afe_port_id = AFE_PORT_ID_QUINARY_MI2S_TX;
5286 break;
5287 default:
5288 pr_err("%s: Invalid BE id: %d\n", __func__, be_id);
5289 afe_port_id = -EINVAL;
5290 }
5291
5292 return afe_port_id;
5293}
5294
5295static u32 get_mi2s_bits_per_sample(u32 bit_format)
5296{
5297 u32 bit_per_sample;
5298
5299 switch (bit_format) {
5300 case SNDRV_PCM_FORMAT_S32_LE:
5301 case SNDRV_PCM_FORMAT_S24_3LE:
5302 case SNDRV_PCM_FORMAT_S24_LE:
5303 bit_per_sample = 32;
5304 break;
5305 case SNDRV_PCM_FORMAT_S16_LE:
5306 default:
5307 bit_per_sample = 16;
5308 break;
5309 }
5310
5311 return bit_per_sample;
5312}
5313
5314static void update_mi2s_clk_val(int dai_id, int stream)
5315{
5316 u32 bit_per_sample;
5317
5318 if (stream == SNDRV_PCM_STREAM_PLAYBACK) {
5319 bit_per_sample =
5320 get_mi2s_bits_per_sample(mi2s_rx_cfg[dai_id].bit_format);
5321 mi2s_clk[dai_id].clk_freq_in_hz =
5322 mi2s_rx_cfg[dai_id].sample_rate * 2 * bit_per_sample;
5323 } else {
5324 bit_per_sample =
5325 get_mi2s_bits_per_sample(mi2s_tx_cfg[dai_id].bit_format);
5326 mi2s_clk[dai_id].clk_freq_in_hz =
5327 mi2s_tx_cfg[dai_id].sample_rate * 2 * bit_per_sample;
5328 }
5329}
5330
5331static int msm_mi2s_set_sclk(struct snd_pcm_substream *substream, bool enable)
5332{
5333 int ret = 0;
5334 struct snd_soc_pcm_runtime *rtd = substream->private_data;
5335 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
5336 int port_id = 0;
5337 int index = cpu_dai->id;
5338
5339 port_id = msm_get_port_id(rtd->dai_link->id);
5340 if (port_id < 0) {
5341 dev_err(rtd->card->dev, "%s: Invalid port_id\n", __func__);
5342 ret = port_id;
5343 goto err;
5344 }
5345
5346 if (enable) {
5347 update_mi2s_clk_val(index, substream->stream);
5348 dev_dbg(rtd->card->dev, "%s: clock rate %ul\n", __func__,
5349 mi2s_clk[index].clk_freq_in_hz);
5350 }
5351
5352 mi2s_clk[index].enable = enable;
5353 ret = afe_set_lpass_clock_v2(port_id,
5354 &mi2s_clk[index]);
5355 if (ret < 0) {
5356 dev_err(rtd->card->dev,
5357 "%s: afe lpass clock failed for port 0x%x , err:%d\n",
5358 __func__, port_id, ret);
5359 goto err;
5360 }
5361
5362err:
5363 return ret;
5364}
5365
5366static int msm_set_pinctrl(struct msm_pinctrl_info *pinctrl_info,
5367 enum pinctrl_pin_state new_state)
5368{
5369 int ret = 0;
5370 int curr_state = 0;
5371
5372 if (pinctrl_info == NULL) {
5373 pr_err("%s: pinctrl_info is NULL\n", __func__);
5374 ret = -EINVAL;
5375 goto err;
5376 }
5377
5378 if (pinctrl_info->pinctrl == NULL) {
5379 pr_err("%s: pinctrl_info->pinctrl is NULL\n", __func__);
5380 ret = -EINVAL;
5381 goto err;
5382 }
5383
5384 curr_state = pinctrl_info->curr_state;
5385 pinctrl_info->curr_state = new_state;
5386 pr_debug("%s: curr_state = %s new_state = %s\n", __func__,
5387 pin_states[curr_state], pin_states[pinctrl_info->curr_state]);
5388
5389 if (curr_state == pinctrl_info->curr_state) {
5390 pr_debug("%s: Already in same state\n", __func__);
5391 goto err;
5392 }
5393
5394 if (curr_state != STATE_DISABLE &&
5395 pinctrl_info->curr_state != STATE_DISABLE) {
5396 pr_debug("%s: state already active cannot switch\n", __func__);
5397 ret = -EIO;
5398 goto err;
5399 }
5400
5401 switch (pinctrl_info->curr_state) {
5402 case STATE_MI2S_ACTIVE:
5403 ret = pinctrl_select_state(pinctrl_info->pinctrl,
5404 pinctrl_info->mi2s_active);
5405 if (ret) {
5406 pr_err("%s: MI2S state select failed with %d\n",
5407 __func__, ret);
5408 ret = -EIO;
5409 goto err;
5410 }
5411 break;
5412 case STATE_TDM_ACTIVE:
5413 ret = pinctrl_select_state(pinctrl_info->pinctrl,
5414 pinctrl_info->tdm_active);
5415 if (ret) {
5416 pr_err("%s: TDM state select failed with %d\n",
5417 __func__, ret);
5418 ret = -EIO;
5419 goto err;
5420 }
5421 break;
5422 case STATE_DISABLE:
5423 if (curr_state == STATE_MI2S_ACTIVE) {
5424 ret = pinctrl_select_state(pinctrl_info->pinctrl,
5425 pinctrl_info->mi2s_disable);
5426 } else {
5427 ret = pinctrl_select_state(pinctrl_info->pinctrl,
5428 pinctrl_info->tdm_disable);
5429 }
5430 if (ret) {
5431 pr_err("%s: state disable failed with %d\n",
5432 __func__, ret);
5433 ret = -EIO;
5434 goto err;
5435 }
5436 break;
5437 default:
5438 pr_err("%s: TLMM pin state is invalid\n", __func__);
5439 return -EINVAL;
5440 }
5441
5442err:
5443 return ret;
5444}
5445
5446static int msm_get_pinctrl(struct platform_device *pdev)
5447{
5448 struct snd_soc_card *card = platform_get_drvdata(pdev);
5449 struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
5450 struct msm_pinctrl_info *pinctrl_info = NULL;
5451 struct pinctrl *pinctrl;
5452 int ret = 0;
5453
5454 pinctrl_info = &pdata->pinctrl_info;
5455
5456 if (pinctrl_info == NULL) {
5457 pr_err("%s: pinctrl_info is NULL\n", __func__);
5458 return -EINVAL;
5459 }
5460
5461 pinctrl = devm_pinctrl_get(&pdev->dev);
5462 if (IS_ERR_OR_NULL(pinctrl)) {
5463 pr_err("%s: Unable to get pinctrl handle\n", __func__);
5464 return -EINVAL;
5465 }
5466 pinctrl_info->pinctrl = pinctrl;
5467
5468 /* get all the states handles from Device Tree */
5469 pinctrl_info->mi2s_disable = pinctrl_lookup_state(pinctrl,
5470 "quat-mi2s-sleep");
5471 if (IS_ERR(pinctrl_info->mi2s_disable)) {
5472 pr_err("%s: could not get mi2s_disable pinstate\n", __func__);
5473 goto err;
5474 }
5475 pinctrl_info->mi2s_active = pinctrl_lookup_state(pinctrl,
5476 "quat-mi2s-active");
5477 if (IS_ERR(pinctrl_info->mi2s_active)) {
5478 pr_err("%s: could not get mi2s_active pinstate\n", __func__);
5479 goto err;
5480 }
5481 pinctrl_info->tdm_disable = pinctrl_lookup_state(pinctrl,
5482 "quat-tdm-sleep");
5483 if (IS_ERR(pinctrl_info->tdm_disable)) {
5484 pr_err("%s: could not get tdm_disable pinstate\n", __func__);
5485 goto err;
5486 }
5487 pinctrl_info->tdm_active = pinctrl_lookup_state(pinctrl,
5488 "quat-tdm-active");
5489 if (IS_ERR(pinctrl_info->tdm_active)) {
5490 pr_err("%s: could not get tdm_active pinstate\n",
5491 __func__);
5492 goto err;
5493 }
5494 /* Reset the TLMM pins to a default state */
5495 ret = pinctrl_select_state(pinctrl_info->pinctrl,
5496 pinctrl_info->mi2s_disable);
5497 if (ret != 0) {
5498 pr_err("%s: Disable TLMM pins failed with %d\n",
5499 __func__, ret);
5500 ret = -EIO;
5501 goto err;
5502 }
5503 pinctrl_info->curr_state = STATE_DISABLE;
5504
5505 return 0;
5506
5507err:
5508 devm_pinctrl_put(pinctrl);
5509 pinctrl_info->pinctrl = NULL;
5510 return -EINVAL;
5511}
5512
5513static int msm_tdm_be_hw_params_fixup(struct snd_soc_pcm_runtime *rtd,
5514 struct snd_pcm_hw_params *params)
5515{
5516 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
5517 struct snd_interval *rate = hw_param_interval(params,
5518 SNDRV_PCM_HW_PARAM_RATE);
5519 struct snd_interval *channels = hw_param_interval(params,
5520 SNDRV_PCM_HW_PARAM_CHANNELS);
5521
5522 if (cpu_dai->id == AFE_PORT_ID_QUATERNARY_TDM_RX) {
5523 channels->min = channels->max =
5524 tdm_rx_cfg[TDM_QUAT][TDM_0].channels;
5525 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
5526 tdm_rx_cfg[TDM_QUAT][TDM_0].bit_format);
5527 rate->min = rate->max =
5528 tdm_rx_cfg[TDM_QUAT][TDM_0].sample_rate;
5529 } else if (cpu_dai->id == AFE_PORT_ID_SECONDARY_TDM_RX) {
5530 channels->min = channels->max =
5531 tdm_rx_cfg[TDM_SEC][TDM_0].channels;
5532 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
5533 tdm_rx_cfg[TDM_SEC][TDM_0].bit_format);
5534 rate->min = rate->max = tdm_rx_cfg[TDM_SEC][TDM_0].sample_rate;
5535 } else if (cpu_dai->id == AFE_PORT_ID_QUINARY_TDM_RX) {
5536 channels->min = channels->max =
5537 tdm_rx_cfg[TDM_QUIN][TDM_0].channels;
5538 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
5539 tdm_rx_cfg[TDM_QUIN][TDM_0].bit_format);
5540 rate->min = rate->max = tdm_rx_cfg[TDM_QUIN][TDM_0].sample_rate;
5541 } else {
5542 pr_err("%s: dai id 0x%x not supported\n",
5543 __func__, cpu_dai->id);
5544 return -EINVAL;
5545 }
5546
5547 pr_debug("%s: dai id = 0x%x channels = %d rate = %d format = 0x%x\n",
5548 __func__, cpu_dai->id, channels->max, rate->max,
5549 params_format(params));
5550
5551 return 0;
5552}
5553
5554static int sm6150_tdm_snd_hw_params(struct snd_pcm_substream *substream,
5555 struct snd_pcm_hw_params *params)
5556{
5557 struct snd_soc_pcm_runtime *rtd = substream->private_data;
5558 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
5559 int ret = 0;
5560 int slot_width = 32;
5561 int channels, slots;
5562 unsigned int slot_mask, rate, clk_freq;
5563 unsigned int slot_offset[8] = {0, 4, 8, 12, 16, 20, 24, 28};
5564
5565 pr_debug("%s: dai id = 0x%x\n", __func__, cpu_dai->id);
5566
5567 /* currently only supporting TDM_RX_0 and TDM_TX_0 */
5568 switch (cpu_dai->id) {
5569 case AFE_PORT_ID_PRIMARY_TDM_RX:
5570 slots = tdm_rx_cfg[TDM_PRI][TDM_0].channels;
5571 break;
5572 case AFE_PORT_ID_SECONDARY_TDM_RX:
5573 slots = tdm_rx_cfg[TDM_SEC][TDM_0].channels;
5574 break;
5575 case AFE_PORT_ID_TERTIARY_TDM_RX:
5576 slots = tdm_rx_cfg[TDM_TERT][TDM_0].channels;
5577 break;
5578 case AFE_PORT_ID_QUATERNARY_TDM_RX:
5579 slots = tdm_rx_cfg[TDM_QUAT][TDM_0].channels;
5580 break;
5581 case AFE_PORT_ID_QUINARY_TDM_RX:
5582 slots = tdm_rx_cfg[TDM_QUIN][TDM_0].channels;
5583 break;
5584 case AFE_PORT_ID_PRIMARY_TDM_TX:
5585 slots = tdm_tx_cfg[TDM_PRI][TDM_0].channels;
5586 break;
5587 case AFE_PORT_ID_SECONDARY_TDM_TX:
5588 slots = tdm_tx_cfg[TDM_SEC][TDM_0].channels;
5589 break;
5590 case AFE_PORT_ID_TERTIARY_TDM_TX:
5591 slots = tdm_tx_cfg[TDM_TERT][TDM_0].channels;
5592 break;
5593 case AFE_PORT_ID_QUATERNARY_TDM_TX:
5594 slots = tdm_tx_cfg[TDM_QUAT][TDM_0].channels;
5595 break;
5596 case AFE_PORT_ID_QUINARY_TDM_TX:
5597 slots = tdm_tx_cfg[TDM_QUIN][TDM_0].channels;
5598 break;
5599
5600 default:
5601 pr_err("%s: dai id 0x%x not supported\n",
5602 __func__, cpu_dai->id);
5603 return -EINVAL;
5604 }
5605
5606 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
5607 /*2 slot config - bits 0 and 1 set for the first two slots */
5608 slot_mask = 0x0000FFFF >> (16-slots);
5609 channels = slots;
5610
5611 pr_debug("%s: tdm rx slot_width %d slots %d\n",
5612 __func__, slot_width, slots);
5613
5614 ret = snd_soc_dai_set_tdm_slot(cpu_dai, 0, slot_mask,
5615 slots, slot_width);
5616 if (ret < 0) {
5617 pr_err("%s: failed to set tdm rx slot, err:%d\n",
5618 __func__, ret);
5619 goto end;
5620 }
5621
5622 ret = snd_soc_dai_set_channel_map(cpu_dai,
5623 0, NULL, channels, slot_offset);
5624 if (ret < 0) {
5625 pr_err("%s: failed to set tdm rx channel map, err:%d\n",
5626 __func__, ret);
5627 goto end;
5628 }
5629 } else if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) {
5630 /*2 slot config - bits 0 and 1 set for the first two slots */
5631 slot_mask = 0x0000FFFF >> (16-slots);
5632 channels = slots;
5633
5634 pr_debug("%s: tdm tx slot_width %d slots %d\n",
5635 __func__, slot_width, slots);
5636
5637 ret = snd_soc_dai_set_tdm_slot(cpu_dai, slot_mask, 0,
5638 slots, slot_width);
5639 if (ret < 0) {
5640 pr_err("%s: failed to set tdm tx slot, err:%d\n",
5641 __func__, ret);
5642 goto end;
5643 }
5644
5645 ret = snd_soc_dai_set_channel_map(cpu_dai,
5646 channels, slot_offset, 0, NULL);
5647 if (ret < 0) {
5648 pr_err("%s: failed to set tdm tx channel map, err:%d\n",
5649 __func__, ret);
5650 goto end;
5651 }
5652 } else {
5653 ret = -EINVAL;
5654 pr_err("%s: invalid use case, err:%d\n",
5655 __func__, ret);
5656 goto end;
5657 }
5658
5659 rate = params_rate(params);
5660 clk_freq = rate * slot_width * slots;
5661 ret = snd_soc_dai_set_sysclk(cpu_dai, 0, clk_freq, SND_SOC_CLOCK_OUT);
5662 if (ret < 0)
5663 pr_err("%s: failed to set tdm clk, err:%d\n",
5664 __func__, ret);
5665
5666end:
5667 return ret;
5668}
5669
5670static int sm6150_tdm_snd_startup(struct snd_pcm_substream *substream)
5671{
5672 int ret = 0;
5673 struct snd_soc_pcm_runtime *rtd = substream->private_data;
5674 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
5675 struct snd_soc_card *card = rtd->card;
5676 struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
5677 struct msm_pinctrl_info *pinctrl_info = &pdata->pinctrl_info;
5678
5679 /* currently only supporting TDM_RX_0 and TDM_TX_0 */
5680 if ((cpu_dai->id == AFE_PORT_ID_QUATERNARY_TDM_RX) ||
5681 (cpu_dai->id == AFE_PORT_ID_QUATERNARY_TDM_TX)) {
5682 ret = msm_set_pinctrl(pinctrl_info, STATE_TDM_ACTIVE);
5683 if (ret)
5684 pr_err("%s: TDM TLMM pinctrl set failed with %d\n",
5685 __func__, ret);
5686 }
5687
5688 return ret;
5689}
5690
5691static void sm6150_tdm_snd_shutdown(struct snd_pcm_substream *substream)
5692{
5693 int ret = 0;
5694 struct snd_soc_pcm_runtime *rtd = substream->private_data;
5695 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
5696 struct snd_soc_card *card = rtd->card;
5697 struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
5698 struct msm_pinctrl_info *pinctrl_info = &pdata->pinctrl_info;
5699
5700 /* currently only supporting TDM_RX_0 and TDM_TX_0 */
5701 if ((cpu_dai->id == AFE_PORT_ID_QUATERNARY_TDM_RX) ||
5702 (cpu_dai->id == AFE_PORT_ID_QUATERNARY_TDM_TX)) {
5703 ret = msm_set_pinctrl(pinctrl_info, STATE_DISABLE);
5704 if (ret)
5705 pr_err("%s: TDM TLMM pinctrl set failed with %d\n",
5706 __func__, ret);
5707 }
5708}
5709
5710static struct snd_soc_ops sm6150_tdm_be_ops = {
5711 .hw_params = sm6150_tdm_snd_hw_params,
5712 .startup = sm6150_tdm_snd_startup,
5713 .shutdown = sm6150_tdm_snd_shutdown
5714};
5715
5716static int msm_fe_qos_prepare(struct snd_pcm_substream *substream)
5717{
5718 cpumask_t mask;
5719
5720 if (pm_qos_request_active(&substream->latency_pm_qos_req))
5721 pm_qos_remove_request(&substream->latency_pm_qos_req);
5722
5723 cpumask_clear(&mask);
5724 cpumask_set_cpu(1, &mask); /* affine to core 1 */
5725 cpumask_set_cpu(2, &mask); /* affine to core 2 */
5726 cpumask_copy(&substream->latency_pm_qos_req.cpus_affine, &mask);
5727
5728 substream->latency_pm_qos_req.type = PM_QOS_REQ_AFFINE_CORES;
5729
5730 pm_qos_add_request(&substream->latency_pm_qos_req,
5731 PM_QOS_CPU_DMA_LATENCY,
5732 MSM_LL_QOS_VALUE);
5733 return 0;
5734}
5735
5736static struct snd_soc_ops msm_fe_qos_ops = {
5737 .prepare = msm_fe_qos_prepare,
5738};
5739
5740static int msm_mi2s_snd_startup(struct snd_pcm_substream *substream)
5741{
5742 int ret = 0;
5743 struct snd_soc_pcm_runtime *rtd = substream->private_data;
5744 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
5745 int index = cpu_dai->id;
5746 unsigned int fmt = SND_SOC_DAIFMT_CBS_CFS;
5747 struct snd_soc_card *card = rtd->card;
5748 struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
5749 struct msm_pinctrl_info *pinctrl_info = &pdata->pinctrl_info;
5750 int ret_pinctrl = 0;
5751
5752 dev_dbg(rtd->card->dev,
5753 "%s: substream = %s stream = %d, dai name %s, dai ID %d\n",
5754 __func__, substream->name, substream->stream,
5755 cpu_dai->name, cpu_dai->id);
5756
5757 if (index < PRIM_MI2S || index >= MI2S_MAX) {
5758 ret = -EINVAL;
5759 dev_err(rtd->card->dev,
5760 "%s: CPU DAI id (%d) out of range\n",
5761 __func__, cpu_dai->id);
5762 goto err;
5763 }
5764 /*
5765 * Mutex protection in case the same MI2S
5766 * interface using for both TX and RX so
5767 * that the same clock won't be enable twice.
5768 */
5769 mutex_lock(&mi2s_intf_conf[index].lock);
5770 if (++mi2s_intf_conf[index].ref_cnt == 1) {
5771 /* Check if msm needs to provide the clock to the interface */
5772 if (!mi2s_intf_conf[index].msm_is_mi2s_master) {
5773 mi2s_clk[index].clk_id = mi2s_ebit_clk[index];
5774 fmt = SND_SOC_DAIFMT_CBM_CFM;
5775 }
5776 ret = msm_mi2s_set_sclk(substream, true);
5777 if (ret < 0) {
5778 dev_err(rtd->card->dev,
5779 "%s: afe lpass clock failed to enable MI2S clock, err:%d\n",
5780 __func__, ret);
5781 goto clean_up;
5782 }
5783
5784 ret = snd_soc_dai_set_fmt(cpu_dai, fmt);
5785 if (ret < 0) {
5786 pr_err("%s: set fmt cpu dai failed for MI2S (%d), err:%d\n",
5787 __func__, index, ret);
5788 goto clk_off;
5789 }
5790 if (index == QUAT_MI2S) {
5791 ret_pinctrl = msm_set_pinctrl(pinctrl_info,
5792 STATE_MI2S_ACTIVE);
5793 if (ret_pinctrl)
5794 pr_err("%s: MI2S TLMM pinctrl set failed with %d\n",
5795 __func__, ret_pinctrl);
5796 }
5797 }
5798clk_off:
5799 if (ret < 0)
5800 msm_mi2s_set_sclk(substream, false);
5801clean_up:
5802 if (ret < 0)
5803 mi2s_intf_conf[index].ref_cnt--;
5804 mutex_unlock(&mi2s_intf_conf[index].lock);
5805err:
5806 return ret;
5807}
5808
5809static void msm_mi2s_snd_shutdown(struct snd_pcm_substream *substream)
5810{
5811 int ret;
5812 struct snd_soc_pcm_runtime *rtd = substream->private_data;
5813 int index = rtd->cpu_dai->id;
5814 struct snd_soc_card *card = rtd->card;
5815 struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
5816 struct msm_pinctrl_info *pinctrl_info = &pdata->pinctrl_info;
5817 int ret_pinctrl = 0;
5818
5819 pr_debug("%s(): substream = %s stream = %d\n", __func__,
5820 substream->name, substream->stream);
5821 if (index < PRIM_MI2S || index >= MI2S_MAX) {
5822 pr_err("%s:invalid MI2S DAI(%d)\n", __func__, index);
5823 return;
5824 }
5825
5826 mutex_lock(&mi2s_intf_conf[index].lock);
5827 if (--mi2s_intf_conf[index].ref_cnt == 0) {
5828 ret = msm_mi2s_set_sclk(substream, false);
5829 if (ret < 0)
5830 pr_err("%s:clock disable failed for MI2S (%d); ret=%d\n",
5831 __func__, index, ret);
5832 if (index == QUAT_MI2S) {
5833 ret_pinctrl = msm_set_pinctrl(pinctrl_info,
5834 STATE_DISABLE);
5835 if (ret_pinctrl)
5836 pr_err("%s: MI2S TLMM pinctrl set failed with %d\n",
5837 __func__, ret_pinctrl);
5838 }
5839 }
5840 mutex_unlock(&mi2s_intf_conf[index].lock);
5841}
5842
5843static struct snd_soc_ops msm_mi2s_be_ops = {
5844 .startup = msm_mi2s_snd_startup,
5845 .shutdown = msm_mi2s_snd_shutdown,
5846};
5847
5848static struct snd_soc_ops msm_cdc_dma_be_ops = {
5849 .hw_params = msm_snd_cdc_dma_hw_params,
5850};
5851
5852static struct snd_soc_ops msm_be_ops = {
5853 .hw_params = msm_snd_hw_params,
5854};
5855
5856static struct snd_soc_ops msm_slimbus_2_be_ops = {
5857 .hw_params = msm_slimbus_2_hw_params,
5858};
5859
5860static struct snd_soc_ops msm_wcn_ops = {
5861 .hw_params = msm_wcn_hw_params,
5862};
5863
5864
5865/* Digital audio interface glue - connects codec <---> CPU */
5866static struct snd_soc_dai_link msm_common_dai_links[] = {
5867 /* FrontEnd DAI Links */
Aditya Bavanaric65c7e42018-08-08 14:10:20 +05305868 {/* hw:x,0 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +05305869 .name = MSM_DAILINK_NAME(Media1),
5870 .stream_name = "MultiMedia1",
5871 .cpu_dai_name = "MultiMedia1",
5872 .platform_name = "msm-pcm-dsp.0",
5873 .dynamic = 1,
5874 .async_ops = ASYNC_DPCM_SND_SOC_PREPARE,
5875 .dpcm_playback = 1,
5876 .dpcm_capture = 1,
5877 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5878 SND_SOC_DPCM_TRIGGER_POST},
5879 .codec_dai_name = "snd-soc-dummy-dai",
5880 .codec_name = "snd-soc-dummy",
5881 .ignore_suspend = 1,
5882 /* this dainlink has playback support */
5883 .ignore_pmdown_time = 1,
5884 .id = MSM_FRONTEND_DAI_MULTIMEDIA1
5885 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +05305886 {/* hw:x,1 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +05305887 .name = MSM_DAILINK_NAME(Media2),
5888 .stream_name = "MultiMedia2",
5889 .cpu_dai_name = "MultiMedia2",
5890 .platform_name = "msm-pcm-dsp.0",
5891 .dynamic = 1,
5892 .dpcm_playback = 1,
5893 .dpcm_capture = 1,
5894 .codec_dai_name = "snd-soc-dummy-dai",
5895 .codec_name = "snd-soc-dummy",
5896 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5897 SND_SOC_DPCM_TRIGGER_POST},
5898 .ignore_suspend = 1,
5899 /* this dainlink has playback support */
5900 .ignore_pmdown_time = 1,
5901 .id = MSM_FRONTEND_DAI_MULTIMEDIA2,
5902 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +05305903 {/* hw:x,2 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +05305904 .name = "VoiceMMode1",
5905 .stream_name = "VoiceMMode1",
5906 .cpu_dai_name = "VoiceMMode1",
5907 .platform_name = "msm-pcm-voice",
5908 .dynamic = 1,
5909 .dpcm_playback = 1,
5910 .dpcm_capture = 1,
5911 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5912 SND_SOC_DPCM_TRIGGER_POST},
5913 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
5914 .ignore_suspend = 1,
5915 .ignore_pmdown_time = 1,
5916 .codec_dai_name = "snd-soc-dummy-dai",
5917 .codec_name = "snd-soc-dummy",
5918 .id = MSM_FRONTEND_DAI_VOICEMMODE1,
5919 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +05305920 {/* hw:x,3 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +05305921 .name = "MSM VoIP",
5922 .stream_name = "VoIP",
5923 .cpu_dai_name = "VoIP",
5924 .platform_name = "msm-voip-dsp",
5925 .dynamic = 1,
5926 .dpcm_playback = 1,
5927 .dpcm_capture = 1,
5928 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5929 SND_SOC_DPCM_TRIGGER_POST},
5930 .codec_dai_name = "snd-soc-dummy-dai",
5931 .codec_name = "snd-soc-dummy",
5932 .ignore_suspend = 1,
5933 /* this dainlink has playback support */
5934 .ignore_pmdown_time = 1,
5935 .id = MSM_FRONTEND_DAI_VOIP,
5936 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +05305937 {/* hw:x,4 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +05305938 .name = MSM_DAILINK_NAME(ULL),
5939 .stream_name = "MultiMedia3",
5940 .cpu_dai_name = "MultiMedia3",
5941 .platform_name = "msm-pcm-dsp.2",
5942 .dynamic = 1,
5943 .async_ops = ASYNC_DPCM_SND_SOC_PREPARE,
5944 .dpcm_playback = 1,
5945 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5946 SND_SOC_DPCM_TRIGGER_POST},
5947 .codec_dai_name = "snd-soc-dummy-dai",
5948 .codec_name = "snd-soc-dummy",
5949 .ignore_suspend = 1,
5950 /* this dainlink has playback support */
5951 .ignore_pmdown_time = 1,
5952 .id = MSM_FRONTEND_DAI_MULTIMEDIA3,
5953 },
5954 /* Hostless PCM purpose */
Aditya Bavanaric65c7e42018-08-08 14:10:20 +05305955 {/* hw:x,5 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +05305956 .name = "SLIMBUS_0 Hostless",
5957 .stream_name = "SLIMBUS_0 Hostless",
5958 .cpu_dai_name = "SLIMBUS0_HOSTLESS",
5959 .platform_name = "msm-pcm-hostless",
5960 .dynamic = 1,
5961 .dpcm_playback = 1,
5962 .dpcm_capture = 1,
5963 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5964 SND_SOC_DPCM_TRIGGER_POST},
5965 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
5966 .ignore_suspend = 1,
5967 /* this dailink has playback support */
5968 .ignore_pmdown_time = 1,
5969 .codec_dai_name = "snd-soc-dummy-dai",
5970 .codec_name = "snd-soc-dummy",
5971 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +05305972 {/* hw:x,6 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +05305973 .name = "MSM AFE-PCM RX",
5974 .stream_name = "AFE-PROXY RX",
5975 .cpu_dai_name = "msm-dai-q6-dev.241",
5976 .codec_name = "msm-stub-codec.1",
5977 .codec_dai_name = "msm-stub-rx",
5978 .platform_name = "msm-pcm-afe",
5979 .dpcm_playback = 1,
5980 .ignore_suspend = 1,
5981 /* this dainlink has playback support */
5982 .ignore_pmdown_time = 1,
5983 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +05305984 {/* hw:x,7 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +05305985 .name = "MSM AFE-PCM TX",
5986 .stream_name = "AFE-PROXY TX",
5987 .cpu_dai_name = "msm-dai-q6-dev.240",
5988 .codec_name = "msm-stub-codec.1",
5989 .codec_dai_name = "msm-stub-tx",
5990 .platform_name = "msm-pcm-afe",
5991 .dpcm_capture = 1,
5992 .ignore_suspend = 1,
5993 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +05305994 {/* hw:x,8 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +05305995 .name = MSM_DAILINK_NAME(Compress1),
5996 .stream_name = "Compress1",
5997 .cpu_dai_name = "MultiMedia4",
5998 .platform_name = "msm-compress-dsp",
5999 .dynamic = 1,
6000 .async_ops = ASYNC_DPCM_SND_SOC_HW_PARAMS,
6001 .dpcm_playback = 1,
6002 .dpcm_capture = 1,
6003 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6004 SND_SOC_DPCM_TRIGGER_POST},
6005 .codec_dai_name = "snd-soc-dummy-dai",
6006 .codec_name = "snd-soc-dummy",
6007 .ignore_suspend = 1,
6008 .ignore_pmdown_time = 1,
6009 /* this dainlink has playback support */
6010 .id = MSM_FRONTEND_DAI_MULTIMEDIA4,
6011 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +05306012 {/* hw:x,9 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +05306013 .name = "AUXPCM Hostless",
6014 .stream_name = "AUXPCM Hostless",
6015 .cpu_dai_name = "AUXPCM_HOSTLESS",
6016 .platform_name = "msm-pcm-hostless",
6017 .dynamic = 1,
6018 .dpcm_playback = 1,
6019 .dpcm_capture = 1,
6020 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6021 SND_SOC_DPCM_TRIGGER_POST},
6022 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6023 .ignore_suspend = 1,
6024 /* this dainlink has playback support */
6025 .ignore_pmdown_time = 1,
6026 .codec_dai_name = "snd-soc-dummy-dai",
6027 .codec_name = "snd-soc-dummy",
6028 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +05306029 {/* hw:x,10 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +05306030 .name = "SLIMBUS_1 Hostless",
6031 .stream_name = "SLIMBUS_1 Hostless",
6032 .cpu_dai_name = "SLIMBUS1_HOSTLESS",
6033 .platform_name = "msm-pcm-hostless",
6034 .dynamic = 1,
6035 .dpcm_playback = 1,
6036 .dpcm_capture = 1,
6037 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6038 SND_SOC_DPCM_TRIGGER_POST},
6039 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6040 .ignore_suspend = 1,
6041 /* this dailink has playback support */
6042 .ignore_pmdown_time = 1,
6043 .codec_dai_name = "snd-soc-dummy-dai",
6044 .codec_name = "snd-soc-dummy",
6045 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +05306046 {/* hw:x,11 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +05306047 .name = "SLIMBUS_3 Hostless",
6048 .stream_name = "SLIMBUS_3 Hostless",
6049 .cpu_dai_name = "SLIMBUS3_HOSTLESS",
6050 .platform_name = "msm-pcm-hostless",
6051 .dynamic = 1,
6052 .dpcm_playback = 1,
6053 .dpcm_capture = 1,
6054 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6055 SND_SOC_DPCM_TRIGGER_POST},
6056 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6057 .ignore_suspend = 1,
6058 /* this dailink has playback support */
6059 .ignore_pmdown_time = 1,
6060 .codec_dai_name = "snd-soc-dummy-dai",
6061 .codec_name = "snd-soc-dummy",
6062 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +05306063 {/* hw:x,12 */
6064 .name = "SLIMBUS_7 Hostless",
6065 .stream_name = "SLIMBUS_7 Hostless",
6066 .cpu_dai_name = "SLIMBUS7_HOSTLESS",
Aditya Bavanari44eb8952018-05-09 19:01:50 +05306067 .platform_name = "msm-pcm-hostless",
6068 .dynamic = 1,
6069 .dpcm_playback = 1,
6070 .dpcm_capture = 1,
6071 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6072 SND_SOC_DPCM_TRIGGER_POST},
6073 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6074 .ignore_suspend = 1,
6075 /* this dailink has playback support */
6076 .ignore_pmdown_time = 1,
6077 .codec_dai_name = "snd-soc-dummy-dai",
6078 .codec_name = "snd-soc-dummy",
6079 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +05306080 {/* hw:x,13 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +05306081 .name = MSM_DAILINK_NAME(LowLatency),
6082 .stream_name = "MultiMedia5",
6083 .cpu_dai_name = "MultiMedia5",
6084 .platform_name = "msm-pcm-dsp.1",
6085 .dynamic = 1,
6086 .async_ops = ASYNC_DPCM_SND_SOC_PREPARE,
6087 .dpcm_playback = 1,
6088 .dpcm_capture = 1,
6089 .codec_dai_name = "snd-soc-dummy-dai",
6090 .codec_name = "snd-soc-dummy",
6091 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6092 SND_SOC_DPCM_TRIGGER_POST},
6093 .ignore_suspend = 1,
6094 /* this dainlink has playback support */
6095 .ignore_pmdown_time = 1,
6096 .id = MSM_FRONTEND_DAI_MULTIMEDIA5,
6097 .ops = &msm_fe_qos_ops,
6098 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +05306099 {/* hw:x,14 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +05306100 .name = "Listen 1 Audio Service",
6101 .stream_name = "Listen 1 Audio Service",
6102 .cpu_dai_name = "LSM1",
6103 .platform_name = "msm-lsm-client",
6104 .dynamic = 1,
6105 .dpcm_capture = 1,
6106 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
6107 SND_SOC_DPCM_TRIGGER_POST },
6108 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6109 .ignore_suspend = 1,
6110 .codec_dai_name = "snd-soc-dummy-dai",
6111 .codec_name = "snd-soc-dummy",
6112 .id = MSM_FRONTEND_DAI_LSM1,
6113 },
6114 /* Multiple Tunnel instances */
Aditya Bavanaric65c7e42018-08-08 14:10:20 +05306115 {/* hw:x,15 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +05306116 .name = MSM_DAILINK_NAME(Compress2),
6117 .stream_name = "Compress2",
6118 .cpu_dai_name = "MultiMedia7",
6119 .platform_name = "msm-compress-dsp",
6120 .dynamic = 1,
6121 .dpcm_playback = 1,
6122 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6123 SND_SOC_DPCM_TRIGGER_POST},
6124 .codec_dai_name = "snd-soc-dummy-dai",
6125 .codec_name = "snd-soc-dummy",
6126 .ignore_suspend = 1,
6127 .ignore_pmdown_time = 1,
6128 /* this dainlink has playback support */
6129 .id = MSM_FRONTEND_DAI_MULTIMEDIA7,
6130 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +05306131 {/* hw:x,16 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +05306132 .name = MSM_DAILINK_NAME(MultiMedia10),
6133 .stream_name = "MultiMedia10",
6134 .cpu_dai_name = "MultiMedia10",
6135 .platform_name = "msm-pcm-dsp.1",
6136 .dynamic = 1,
6137 .dpcm_playback = 1,
6138 .dpcm_capture = 1,
6139 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6140 SND_SOC_DPCM_TRIGGER_POST},
6141 .codec_dai_name = "snd-soc-dummy-dai",
6142 .codec_name = "snd-soc-dummy",
6143 .ignore_suspend = 1,
6144 .ignore_pmdown_time = 1,
6145 /* this dainlink has playback support */
6146 .id = MSM_FRONTEND_DAI_MULTIMEDIA10,
6147 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +05306148 {/* hw:x,17 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +05306149 .name = MSM_DAILINK_NAME(ULL_NOIRQ),
6150 .stream_name = "MM_NOIRQ",
6151 .cpu_dai_name = "MultiMedia8",
6152 .platform_name = "msm-pcm-dsp-noirq",
6153 .dynamic = 1,
6154 .dpcm_playback = 1,
6155 .dpcm_capture = 1,
6156 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6157 SND_SOC_DPCM_TRIGGER_POST},
6158 .codec_dai_name = "snd-soc-dummy-dai",
6159 .codec_name = "snd-soc-dummy",
6160 .ignore_suspend = 1,
6161 .ignore_pmdown_time = 1,
6162 /* this dainlink has playback support */
6163 .id = MSM_FRONTEND_DAI_MULTIMEDIA8,
6164 .ops = &msm_fe_qos_ops,
6165 },
6166 /* HDMI Hostless */
Aditya Bavanaric65c7e42018-08-08 14:10:20 +05306167 {/* hw:x,18 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +05306168 .name = "HDMI_RX_HOSTLESS",
6169 .stream_name = "HDMI_RX_HOSTLESS",
6170 .cpu_dai_name = "HDMI_HOSTLESS",
6171 .platform_name = "msm-pcm-hostless",
6172 .dynamic = 1,
6173 .dpcm_playback = 1,
6174 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6175 SND_SOC_DPCM_TRIGGER_POST},
6176 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6177 .ignore_suspend = 1,
6178 .ignore_pmdown_time = 1,
6179 .codec_dai_name = "snd-soc-dummy-dai",
6180 .codec_name = "snd-soc-dummy",
6181 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +05306182 {/* hw:x,19 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +05306183 .name = "VoiceMMode2",
6184 .stream_name = "VoiceMMode2",
6185 .cpu_dai_name = "VoiceMMode2",
6186 .platform_name = "msm-pcm-voice",
6187 .dynamic = 1,
6188 .dpcm_playback = 1,
6189 .dpcm_capture = 1,
6190 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6191 SND_SOC_DPCM_TRIGGER_POST},
6192 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6193 .ignore_suspend = 1,
6194 .ignore_pmdown_time = 1,
6195 .codec_dai_name = "snd-soc-dummy-dai",
6196 .codec_name = "snd-soc-dummy",
6197 .id = MSM_FRONTEND_DAI_VOICEMMODE2,
6198 },
6199 /* LSM FE */
Aditya Bavanaric65c7e42018-08-08 14:10:20 +05306200 {/* hw:x,20 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +05306201 .name = "Listen 2 Audio Service",
6202 .stream_name = "Listen 2 Audio Service",
6203 .cpu_dai_name = "LSM2",
6204 .platform_name = "msm-lsm-client",
6205 .dynamic = 1,
6206 .dpcm_capture = 1,
6207 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
6208 SND_SOC_DPCM_TRIGGER_POST },
6209 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6210 .ignore_suspend = 1,
6211 .codec_dai_name = "snd-soc-dummy-dai",
6212 .codec_name = "snd-soc-dummy",
6213 .id = MSM_FRONTEND_DAI_LSM2,
6214 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +05306215 {/* hw:x,21 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +05306216 .name = "Listen 3 Audio Service",
6217 .stream_name = "Listen 3 Audio Service",
6218 .cpu_dai_name = "LSM3",
6219 .platform_name = "msm-lsm-client",
6220 .dynamic = 1,
6221 .dpcm_capture = 1,
6222 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
6223 SND_SOC_DPCM_TRIGGER_POST },
6224 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6225 .ignore_suspend = 1,
6226 .codec_dai_name = "snd-soc-dummy-dai",
6227 .codec_name = "snd-soc-dummy",
6228 .id = MSM_FRONTEND_DAI_LSM3,
6229 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +05306230 {/* hw:x,22 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +05306231 .name = "Listen 4 Audio Service",
6232 .stream_name = "Listen 4 Audio Service",
6233 .cpu_dai_name = "LSM4",
6234 .platform_name = "msm-lsm-client",
6235 .dynamic = 1,
6236 .dpcm_capture = 1,
6237 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
6238 SND_SOC_DPCM_TRIGGER_POST },
6239 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6240 .ignore_suspend = 1,
6241 .codec_dai_name = "snd-soc-dummy-dai",
6242 .codec_name = "snd-soc-dummy",
6243 .id = MSM_FRONTEND_DAI_LSM4,
6244 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +05306245 {/* hw:x,23 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +05306246 .name = "Listen 5 Audio Service",
6247 .stream_name = "Listen 5 Audio Service",
6248 .cpu_dai_name = "LSM5",
6249 .platform_name = "msm-lsm-client",
6250 .dynamic = 1,
6251 .dpcm_capture = 1,
6252 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
6253 SND_SOC_DPCM_TRIGGER_POST },
6254 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6255 .ignore_suspend = 1,
6256 .codec_dai_name = "snd-soc-dummy-dai",
6257 .codec_name = "snd-soc-dummy",
6258 .id = MSM_FRONTEND_DAI_LSM5,
6259 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +05306260 {/* hw:x,24 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +05306261 .name = "Listen 6 Audio Service",
6262 .stream_name = "Listen 6 Audio Service",
6263 .cpu_dai_name = "LSM6",
6264 .platform_name = "msm-lsm-client",
6265 .dynamic = 1,
6266 .dpcm_capture = 1,
6267 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
6268 SND_SOC_DPCM_TRIGGER_POST },
6269 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6270 .ignore_suspend = 1,
6271 .codec_dai_name = "snd-soc-dummy-dai",
6272 .codec_name = "snd-soc-dummy",
6273 .id = MSM_FRONTEND_DAI_LSM6,
6274 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +05306275 {/* hw:x,25 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +05306276 .name = "Listen 7 Audio Service",
6277 .stream_name = "Listen 7 Audio Service",
6278 .cpu_dai_name = "LSM7",
6279 .platform_name = "msm-lsm-client",
6280 .dynamic = 1,
6281 .dpcm_capture = 1,
6282 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
6283 SND_SOC_DPCM_TRIGGER_POST },
6284 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6285 .ignore_suspend = 1,
6286 .codec_dai_name = "snd-soc-dummy-dai",
6287 .codec_name = "snd-soc-dummy",
6288 .id = MSM_FRONTEND_DAI_LSM7,
6289 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +05306290 {/* hw:x,26 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +05306291 .name = "Listen 8 Audio Service",
6292 .stream_name = "Listen 8 Audio Service",
6293 .cpu_dai_name = "LSM8",
6294 .platform_name = "msm-lsm-client",
6295 .dynamic = 1,
6296 .dpcm_capture = 1,
6297 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
6298 SND_SOC_DPCM_TRIGGER_POST },
6299 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6300 .ignore_suspend = 1,
6301 .codec_dai_name = "snd-soc-dummy-dai",
6302 .codec_name = "snd-soc-dummy",
6303 .id = MSM_FRONTEND_DAI_LSM8,
6304 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +05306305 {/* hw:x,27 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +05306306 .name = MSM_DAILINK_NAME(Media9),
6307 .stream_name = "MultiMedia9",
6308 .cpu_dai_name = "MultiMedia9",
6309 .platform_name = "msm-pcm-dsp.0",
6310 .dynamic = 1,
6311 .dpcm_playback = 1,
6312 .dpcm_capture = 1,
6313 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6314 SND_SOC_DPCM_TRIGGER_POST},
6315 .codec_dai_name = "snd-soc-dummy-dai",
6316 .codec_name = "snd-soc-dummy",
6317 .ignore_suspend = 1,
6318 /* this dainlink has playback support */
6319 .ignore_pmdown_time = 1,
6320 .id = MSM_FRONTEND_DAI_MULTIMEDIA9,
6321 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +05306322 {/* hw:x,28 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +05306323 .name = MSM_DAILINK_NAME(Compress4),
6324 .stream_name = "Compress4",
6325 .cpu_dai_name = "MultiMedia11",
6326 .platform_name = "msm-compress-dsp",
6327 .dynamic = 1,
6328 .dpcm_playback = 1,
6329 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6330 SND_SOC_DPCM_TRIGGER_POST},
6331 .codec_dai_name = "snd-soc-dummy-dai",
6332 .codec_name = "snd-soc-dummy",
6333 .ignore_suspend = 1,
6334 .ignore_pmdown_time = 1,
6335 /* this dainlink has playback support */
6336 .id = MSM_FRONTEND_DAI_MULTIMEDIA11,
6337 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +05306338 {/* hw:x,29 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +05306339 .name = MSM_DAILINK_NAME(Compress5),
6340 .stream_name = "Compress5",
6341 .cpu_dai_name = "MultiMedia12",
6342 .platform_name = "msm-compress-dsp",
6343 .dynamic = 1,
6344 .dpcm_playback = 1,
6345 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6346 SND_SOC_DPCM_TRIGGER_POST},
6347 .codec_dai_name = "snd-soc-dummy-dai",
6348 .codec_name = "snd-soc-dummy",
6349 .ignore_suspend = 1,
6350 .ignore_pmdown_time = 1,
6351 /* this dainlink has playback support */
6352 .id = MSM_FRONTEND_DAI_MULTIMEDIA12,
6353 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +05306354 {/* hw:x,30 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +05306355 .name = MSM_DAILINK_NAME(Compress6),
6356 .stream_name = "Compress6",
6357 .cpu_dai_name = "MultiMedia13",
6358 .platform_name = "msm-compress-dsp",
6359 .dynamic = 1,
6360 .dpcm_playback = 1,
6361 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6362 SND_SOC_DPCM_TRIGGER_POST},
6363 .codec_dai_name = "snd-soc-dummy-dai",
6364 .codec_name = "snd-soc-dummy",
6365 .ignore_suspend = 1,
6366 .ignore_pmdown_time = 1,
6367 /* this dainlink has playback support */
6368 .id = MSM_FRONTEND_DAI_MULTIMEDIA13,
6369 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +05306370 {/* hw:x,31 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +05306371 .name = MSM_DAILINK_NAME(Compress7),
6372 .stream_name = "Compress7",
6373 .cpu_dai_name = "MultiMedia14",
6374 .platform_name = "msm-compress-dsp",
6375 .dynamic = 1,
6376 .dpcm_playback = 1,
6377 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6378 SND_SOC_DPCM_TRIGGER_POST},
6379 .codec_dai_name = "snd-soc-dummy-dai",
6380 .codec_name = "snd-soc-dummy",
6381 .ignore_suspend = 1,
6382 .ignore_pmdown_time = 1,
6383 /* this dainlink has playback support */
6384 .id = MSM_FRONTEND_DAI_MULTIMEDIA14,
6385 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +05306386 {/* hw:x,32 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +05306387 .name = MSM_DAILINK_NAME(Compress8),
6388 .stream_name = "Compress8",
6389 .cpu_dai_name = "MultiMedia15",
6390 .platform_name = "msm-compress-dsp",
6391 .dynamic = 1,
6392 .dpcm_playback = 1,
6393 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6394 SND_SOC_DPCM_TRIGGER_POST},
6395 .codec_dai_name = "snd-soc-dummy-dai",
6396 .codec_name = "snd-soc-dummy",
6397 .ignore_suspend = 1,
6398 .ignore_pmdown_time = 1,
6399 /* this dainlink has playback support */
6400 .id = MSM_FRONTEND_DAI_MULTIMEDIA15,
6401 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +05306402 {/* hw:x,33 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +05306403 .name = MSM_DAILINK_NAME(ULL_NOIRQ_2),
6404 .stream_name = "MM_NOIRQ_2",
6405 .cpu_dai_name = "MultiMedia16",
6406 .platform_name = "msm-pcm-dsp-noirq",
6407 .dynamic = 1,
6408 .dpcm_playback = 1,
6409 .dpcm_capture = 1,
6410 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6411 SND_SOC_DPCM_TRIGGER_POST},
6412 .codec_dai_name = "snd-soc-dummy-dai",
6413 .codec_name = "snd-soc-dummy",
6414 .ignore_suspend = 1,
6415 .ignore_pmdown_time = 1,
6416 /* this dainlink has playback support */
6417 .id = MSM_FRONTEND_DAI_MULTIMEDIA16,
6418 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +05306419 {/* hw:x,34 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +05306420 .name = "SLIMBUS_8 Hostless",
6421 .stream_name = "SLIMBUS8_HOSTLESS Capture",
6422 .cpu_dai_name = "SLIMBUS8_HOSTLESS",
6423 .platform_name = "msm-pcm-hostless",
6424 .dynamic = 1,
6425 .dpcm_capture = 1,
6426 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6427 SND_SOC_DPCM_TRIGGER_POST},
6428 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6429 .ignore_suspend = 1,
6430 .codec_dai_name = "snd-soc-dummy-dai",
6431 .codec_name = "snd-soc-dummy",
6432 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +05306433 {/* hw:x,35 */
6434 .name = "CDC_DMA Hostless",
6435 .stream_name = "CDC_DMA Hostless",
6436 .cpu_dai_name = "CDC_DMA_HOSTLESS",
6437 .platform_name = "msm-pcm-hostless",
6438 .dynamic = 1,
6439 .dpcm_playback = 1,
6440 .dpcm_capture = 1,
6441 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6442 SND_SOC_DPCM_TRIGGER_POST},
6443 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6444 .ignore_suspend = 1,
6445 /* this dailink has playback support */
6446 .ignore_pmdown_time = 1,
6447 .codec_dai_name = "snd-soc-dummy-dai",
6448 .codec_name = "snd-soc-dummy",
6449 },
6450 {/* hw:x,36 */
6451 .name = "TX3_CDC_DMA Hostless",
6452 .stream_name = "TX3_CDC_DMA Hostless",
6453 .cpu_dai_name = "TX3_CDC_DMA_HOSTLESS",
6454 .platform_name = "msm-pcm-hostless",
6455 .dynamic = 1,
6456 .dpcm_capture = 1,
6457 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6458 SND_SOC_DPCM_TRIGGER_POST},
6459 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6460 .ignore_suspend = 1,
6461 .codec_dai_name = "snd-soc-dummy-dai",
6462 .codec_name = "snd-soc-dummy",
6463 },
Aditya Bavanari44eb8952018-05-09 19:01:50 +05306464};
6465
6466
6467static struct snd_soc_dai_link msm_tavil_fe_dai_links[] = {
Aditya Bavanaric65c7e42018-08-08 14:10:20 +05306468 {/* hw:x,37 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +05306469 .name = LPASS_BE_SLIMBUS_4_TX,
6470 .stream_name = "Slimbus4 Capture",
6471 .cpu_dai_name = "msm-dai-q6-dev.16393",
6472 .platform_name = "msm-pcm-hostless",
6473 .codec_name = "tavil_codec",
6474 .codec_dai_name = "tavil_vifeedback",
6475 .id = MSM_BACKEND_DAI_SLIMBUS_4_TX,
6476 .be_hw_params_fixup = msm_be_hw_params_fixup,
6477 .ops = &msm_be_ops,
6478 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6479 .ignore_suspend = 1,
6480 },
6481 /* Ultrasound RX DAI Link */
Aditya Bavanaric65c7e42018-08-08 14:10:20 +05306482 {/* hw:x,38 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +05306483 .name = "SLIMBUS_2 Hostless Playback",
6484 .stream_name = "SLIMBUS_2 Hostless Playback",
6485 .cpu_dai_name = "msm-dai-q6-dev.16388",
6486 .platform_name = "msm-pcm-hostless",
6487 .codec_name = "tavil_codec",
6488 .codec_dai_name = "tavil_rx2",
6489 .ignore_suspend = 1,
6490 .ignore_pmdown_time = 1,
6491 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6492 .ops = &msm_slimbus_2_be_ops,
6493 },
6494 /* Ultrasound TX DAI Link */
Aditya Bavanaric65c7e42018-08-08 14:10:20 +05306495 {/* hw:x,39 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +05306496 .name = "SLIMBUS_2 Hostless Capture",
6497 .stream_name = "SLIMBUS_2 Hostless Capture",
6498 .cpu_dai_name = "msm-dai-q6-dev.16389",
6499 .platform_name = "msm-pcm-hostless",
6500 .codec_name = "tavil_codec",
6501 .codec_dai_name = "tavil_tx2",
6502 .ignore_suspend = 1,
6503 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6504 .ops = &msm_slimbus_2_be_ops,
6505 },
6506};
6507
6508static struct snd_soc_dai_link msm_bolero_fe_dai_links[] = {
Aditya Bavanaric65c7e42018-08-08 14:10:20 +05306509 {/* hw:x,37 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +05306510 .name = LPASS_BE_WSA_CDC_DMA_TX_0,
6511 .stream_name = "WSA CDC DMA0 Capture",
6512 .cpu_dai_name = "msm-dai-cdc-dma-dev.45057",
6513 .platform_name = "msm-pcm-hostless",
6514 .codec_name = "bolero_codec",
6515 .codec_dai_name = "wsa_macro_vifeedback",
6516 .id = MSM_BACKEND_DAI_WSA_CDC_DMA_TX_0,
6517 .be_hw_params_fixup = msm_be_hw_params_fixup,
6518 .ignore_suspend = 1,
6519 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6520 .ops = &msm_cdc_dma_be_ops,
6521 },
6522};
6523
6524static struct snd_soc_dai_link msm_common_misc_fe_dai_links[] = {
6525 {
6526 .name = MSM_DAILINK_NAME(ASM Loopback),
6527 .stream_name = "MultiMedia6",
6528 .cpu_dai_name = "MultiMedia6",
6529 .platform_name = "msm-pcm-loopback",
6530 .dynamic = 1,
6531 .dpcm_playback = 1,
6532 .dpcm_capture = 1,
6533 .codec_dai_name = "snd-soc-dummy-dai",
6534 .codec_name = "snd-soc-dummy",
6535 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6536 SND_SOC_DPCM_TRIGGER_POST},
6537 .ignore_suspend = 1,
6538 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6539 .ignore_pmdown_time = 1,
6540 .id = MSM_FRONTEND_DAI_MULTIMEDIA6,
6541 },
6542 {
6543 .name = "USB Audio Hostless",
6544 .stream_name = "USB Audio Hostless",
6545 .cpu_dai_name = "USBAUDIO_HOSTLESS",
6546 .platform_name = "msm-pcm-hostless",
6547 .dynamic = 1,
6548 .dpcm_playback = 1,
6549 .dpcm_capture = 1,
6550 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6551 SND_SOC_DPCM_TRIGGER_POST},
6552 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6553 .ignore_suspend = 1,
6554 .ignore_pmdown_time = 1,
6555 .codec_dai_name = "snd-soc-dummy-dai",
6556 .codec_name = "snd-soc-dummy",
6557 },
6558};
6559
6560static struct snd_soc_dai_link msm_common_be_dai_links[] = {
6561 /* Backend AFE DAI Links */
6562 {
6563 .name = LPASS_BE_AFE_PCM_RX,
6564 .stream_name = "AFE Playback",
6565 .cpu_dai_name = "msm-dai-q6-dev.224",
6566 .platform_name = "msm-pcm-routing",
6567 .codec_name = "msm-stub-codec.1",
6568 .codec_dai_name = "msm-stub-rx",
6569 .no_pcm = 1,
6570 .dpcm_playback = 1,
6571 .id = MSM_BACKEND_DAI_AFE_PCM_RX,
6572 .be_hw_params_fixup = msm_be_hw_params_fixup,
6573 /* this dainlink has playback support */
6574 .ignore_pmdown_time = 1,
6575 .ignore_suspend = 1,
6576 },
6577 {
6578 .name = LPASS_BE_AFE_PCM_TX,
6579 .stream_name = "AFE Capture",
6580 .cpu_dai_name = "msm-dai-q6-dev.225",
6581 .platform_name = "msm-pcm-routing",
6582 .codec_name = "msm-stub-codec.1",
6583 .codec_dai_name = "msm-stub-tx",
6584 .no_pcm = 1,
6585 .dpcm_capture = 1,
6586 .id = MSM_BACKEND_DAI_AFE_PCM_TX,
6587 .be_hw_params_fixup = msm_be_hw_params_fixup,
6588 .ignore_suspend = 1,
6589 },
6590 /* Incall Record Uplink BACK END DAI Link */
6591 {
6592 .name = LPASS_BE_INCALL_RECORD_TX,
6593 .stream_name = "Voice Uplink Capture",
6594 .cpu_dai_name = "msm-dai-q6-dev.32772",
6595 .platform_name = "msm-pcm-routing",
6596 .codec_name = "msm-stub-codec.1",
6597 .codec_dai_name = "msm-stub-tx",
6598 .no_pcm = 1,
6599 .dpcm_capture = 1,
6600 .id = MSM_BACKEND_DAI_INCALL_RECORD_TX,
6601 .be_hw_params_fixup = msm_be_hw_params_fixup,
6602 .ignore_suspend = 1,
6603 },
6604 /* Incall Record Downlink BACK END DAI Link */
6605 {
6606 .name = LPASS_BE_INCALL_RECORD_RX,
6607 .stream_name = "Voice Downlink Capture",
6608 .cpu_dai_name = "msm-dai-q6-dev.32771",
6609 .platform_name = "msm-pcm-routing",
6610 .codec_name = "msm-stub-codec.1",
6611 .codec_dai_name = "msm-stub-tx",
6612 .no_pcm = 1,
6613 .dpcm_capture = 1,
6614 .id = MSM_BACKEND_DAI_INCALL_RECORD_RX,
6615 .be_hw_params_fixup = msm_be_hw_params_fixup,
6616 .ignore_suspend = 1,
6617 },
6618 /* Incall Music BACK END DAI Link */
6619 {
6620 .name = LPASS_BE_VOICE_PLAYBACK_TX,
6621 .stream_name = "Voice Farend Playback",
6622 .cpu_dai_name = "msm-dai-q6-dev.32773",
6623 .platform_name = "msm-pcm-routing",
6624 .codec_name = "msm-stub-codec.1",
6625 .codec_dai_name = "msm-stub-rx",
6626 .no_pcm = 1,
6627 .dpcm_playback = 1,
6628 .id = MSM_BACKEND_DAI_VOICE_PLAYBACK_TX,
6629 .be_hw_params_fixup = msm_be_hw_params_fixup,
6630 .ignore_suspend = 1,
6631 .ignore_pmdown_time = 1,
6632 },
6633 /* Incall Music 2 BACK END DAI Link */
6634 {
6635 .name = LPASS_BE_VOICE2_PLAYBACK_TX,
6636 .stream_name = "Voice2 Farend Playback",
6637 .cpu_dai_name = "msm-dai-q6-dev.32770",
6638 .platform_name = "msm-pcm-routing",
6639 .codec_name = "msm-stub-codec.1",
6640 .codec_dai_name = "msm-stub-rx",
6641 .no_pcm = 1,
6642 .dpcm_playback = 1,
6643 .id = MSM_BACKEND_DAI_VOICE2_PLAYBACK_TX,
6644 .be_hw_params_fixup = msm_be_hw_params_fixup,
6645 .ignore_suspend = 1,
6646 .ignore_pmdown_time = 1,
6647 },
6648 {
6649 .name = LPASS_BE_USB_AUDIO_RX,
6650 .stream_name = "USB Audio Playback",
6651 .cpu_dai_name = "msm-dai-q6-dev.28672",
6652 .platform_name = "msm-pcm-routing",
6653 .codec_name = "msm-stub-codec.1",
6654 .codec_dai_name = "msm-stub-rx",
6655 .no_pcm = 1,
6656 .dpcm_playback = 1,
6657 .id = MSM_BACKEND_DAI_USB_RX,
6658 .be_hw_params_fixup = msm_be_hw_params_fixup,
6659 .ignore_pmdown_time = 1,
6660 .ignore_suspend = 1,
6661 },
6662 {
6663 .name = LPASS_BE_USB_AUDIO_TX,
6664 .stream_name = "USB Audio Capture",
6665 .cpu_dai_name = "msm-dai-q6-dev.28673",
6666 .platform_name = "msm-pcm-routing",
6667 .codec_name = "msm-stub-codec.1",
6668 .codec_dai_name = "msm-stub-tx",
6669 .no_pcm = 1,
6670 .dpcm_capture = 1,
6671 .id = MSM_BACKEND_DAI_USB_TX,
6672 .be_hw_params_fixup = msm_be_hw_params_fixup,
6673 .ignore_suspend = 1,
6674 },
6675 {
6676 .name = LPASS_BE_PRI_TDM_RX_0,
6677 .stream_name = "Primary TDM0 Playback",
6678 .cpu_dai_name = "msm-dai-q6-tdm.36864",
6679 .platform_name = "msm-pcm-routing",
6680 .codec_name = "msm-stub-codec.1",
6681 .codec_dai_name = "msm-stub-rx",
6682 .no_pcm = 1,
6683 .dpcm_playback = 1,
6684 .id = MSM_BACKEND_DAI_PRI_TDM_RX_0,
6685 .be_hw_params_fixup = msm_be_hw_params_fixup,
6686 .ops = &sm6150_tdm_be_ops,
6687 .ignore_suspend = 1,
6688 .ignore_pmdown_time = 1,
6689 },
6690 {
6691 .name = LPASS_BE_PRI_TDM_TX_0,
6692 .stream_name = "Primary TDM0 Capture",
6693 .cpu_dai_name = "msm-dai-q6-tdm.36865",
6694 .platform_name = "msm-pcm-routing",
6695 .codec_name = "msm-stub-codec.1",
6696 .codec_dai_name = "msm-stub-tx",
6697 .no_pcm = 1,
6698 .dpcm_capture = 1,
6699 .id = MSM_BACKEND_DAI_PRI_TDM_TX_0,
6700 .be_hw_params_fixup = msm_be_hw_params_fixup,
6701 .ops = &sm6150_tdm_be_ops,
6702 .ignore_suspend = 1,
6703 },
6704 {
6705 .name = LPASS_BE_SEC_TDM_RX_0,
6706 .stream_name = "Secondary TDM0 Playback",
6707 .cpu_dai_name = "msm-dai-q6-tdm.36880",
6708 .platform_name = "msm-pcm-routing",
6709 .codec_name = "msm-stub-codec.1",
6710 .codec_dai_name = "msm-stub-rx",
6711 .no_pcm = 1,
6712 .dpcm_playback = 1,
6713 .id = MSM_BACKEND_DAI_SEC_TDM_RX_0,
6714 .be_hw_params_fixup = msm_be_hw_params_fixup,
6715 .ops = &sm6150_tdm_be_ops,
6716 .ignore_suspend = 1,
6717 .ignore_pmdown_time = 1,
6718 },
6719 {
6720 .name = LPASS_BE_SEC_TDM_TX_0,
6721 .stream_name = "Secondary TDM0 Capture",
6722 .cpu_dai_name = "msm-dai-q6-tdm.36881",
6723 .platform_name = "msm-pcm-routing",
6724 .codec_name = "msm-stub-codec.1",
6725 .codec_dai_name = "msm-stub-tx",
6726 .no_pcm = 1,
6727 .dpcm_capture = 1,
6728 .id = MSM_BACKEND_DAI_SEC_TDM_TX_0,
6729 .be_hw_params_fixup = msm_be_hw_params_fixup,
6730 .ops = &sm6150_tdm_be_ops,
6731 .ignore_suspend = 1,
6732 },
6733 {
6734 .name = LPASS_BE_TERT_TDM_RX_0,
6735 .stream_name = "Tertiary TDM0 Playback",
6736 .cpu_dai_name = "msm-dai-q6-tdm.36896",
6737 .platform_name = "msm-pcm-routing",
6738 .codec_name = "msm-stub-codec.1",
6739 .codec_dai_name = "msm-stub-rx",
6740 .no_pcm = 1,
6741 .dpcm_playback = 1,
6742 .id = MSM_BACKEND_DAI_TERT_TDM_RX_0,
6743 .be_hw_params_fixup = msm_be_hw_params_fixup,
6744 .ops = &sm6150_tdm_be_ops,
6745 .ignore_suspend = 1,
6746 .ignore_pmdown_time = 1,
6747 },
6748 {
6749 .name = LPASS_BE_TERT_TDM_TX_0,
6750 .stream_name = "Tertiary TDM0 Capture",
6751 .cpu_dai_name = "msm-dai-q6-tdm.36897",
6752 .platform_name = "msm-pcm-routing",
6753 .codec_name = "msm-stub-codec.1",
6754 .codec_dai_name = "msm-stub-tx",
6755 .no_pcm = 1,
6756 .dpcm_capture = 1,
6757 .id = MSM_BACKEND_DAI_TERT_TDM_TX_0,
6758 .be_hw_params_fixup = msm_be_hw_params_fixup,
6759 .ops = &sm6150_tdm_be_ops,
6760 .ignore_suspend = 1,
6761 },
6762 {
6763 .name = LPASS_BE_QUAT_TDM_RX_0,
6764 .stream_name = "Quaternary TDM0 Playback",
6765 .cpu_dai_name = "msm-dai-q6-tdm.36912",
6766 .platform_name = "msm-pcm-routing",
6767 .codec_name = "msm-stub-codec.1",
6768 .codec_dai_name = "msm-stub-rx",
6769 .no_pcm = 1,
6770 .dpcm_playback = 1,
6771 .id = MSM_BACKEND_DAI_QUAT_TDM_RX_0,
6772 .be_hw_params_fixup = msm_tdm_be_hw_params_fixup,
6773 .ops = &sm6150_tdm_be_ops,
6774 .ignore_suspend = 1,
6775 .ignore_pmdown_time = 1,
6776 },
6777 {
6778 .name = LPASS_BE_QUAT_TDM_TX_0,
6779 .stream_name = "Quaternary TDM0 Capture",
6780 .cpu_dai_name = "msm-dai-q6-tdm.36913",
6781 .platform_name = "msm-pcm-routing",
6782 .codec_name = "msm-stub-codec.1",
6783 .codec_dai_name = "msm-stub-tx",
6784 .no_pcm = 1,
6785 .dpcm_capture = 1,
6786 .id = MSM_BACKEND_DAI_QUAT_TDM_TX_0,
6787 .be_hw_params_fixup = msm_be_hw_params_fixup,
6788 .ops = &sm6150_tdm_be_ops,
6789 .ignore_suspend = 1,
6790 },
6791};
6792
6793static struct snd_soc_dai_link msm_tavil_be_dai_links[] = {
6794 {
6795 .name = LPASS_BE_SLIMBUS_0_RX,
6796 .stream_name = "Slimbus Playback",
6797 .cpu_dai_name = "msm-dai-q6-dev.16384",
6798 .platform_name = "msm-pcm-routing",
6799 .codec_name = "tavil_codec",
6800 .codec_dai_name = "tavil_rx1",
6801 .no_pcm = 1,
6802 .dpcm_playback = 1,
6803 .id = MSM_BACKEND_DAI_SLIMBUS_0_RX,
6804 .init = &msm_audrx_tavil_init,
6805 .be_hw_params_fixup = msm_be_hw_params_fixup,
6806 /* this dainlink has playback support */
6807 .ignore_pmdown_time = 1,
6808 .ignore_suspend = 1,
6809 .ops = &msm_be_ops,
6810 },
6811 {
6812 .name = LPASS_BE_SLIMBUS_0_TX,
6813 .stream_name = "Slimbus Capture",
6814 .cpu_dai_name = "msm-dai-q6-dev.16385",
6815 .platform_name = "msm-pcm-routing",
6816 .codec_name = "tavil_codec",
6817 .codec_dai_name = "tavil_tx1",
6818 .no_pcm = 1,
6819 .dpcm_capture = 1,
6820 .id = MSM_BACKEND_DAI_SLIMBUS_0_TX,
6821 .be_hw_params_fixup = msm_be_hw_params_fixup,
6822 .ignore_suspend = 1,
6823 .ops = &msm_be_ops,
6824 },
6825 {
6826 .name = LPASS_BE_SLIMBUS_1_RX,
6827 .stream_name = "Slimbus1 Playback",
6828 .cpu_dai_name = "msm-dai-q6-dev.16386",
6829 .platform_name = "msm-pcm-routing",
6830 .codec_name = "tavil_codec",
6831 .codec_dai_name = "tavil_rx1",
6832 .no_pcm = 1,
6833 .dpcm_playback = 1,
6834 .id = MSM_BACKEND_DAI_SLIMBUS_1_RX,
6835 .be_hw_params_fixup = msm_be_hw_params_fixup,
6836 .ops = &msm_be_ops,
6837 /* dai link has playback support */
6838 .ignore_pmdown_time = 1,
6839 .ignore_suspend = 1,
6840 },
6841 {
6842 .name = LPASS_BE_SLIMBUS_1_TX,
6843 .stream_name = "Slimbus1 Capture",
6844 .cpu_dai_name = "msm-dai-q6-dev.16387",
6845 .platform_name = "msm-pcm-routing",
6846 .codec_name = "tavil_codec",
6847 .codec_dai_name = "tavil_tx3",
6848 .no_pcm = 1,
6849 .dpcm_capture = 1,
6850 .id = MSM_BACKEND_DAI_SLIMBUS_1_TX,
6851 .be_hw_params_fixup = msm_be_hw_params_fixup,
6852 .ops = &msm_be_ops,
6853 .ignore_suspend = 1,
6854 },
6855 {
6856 .name = LPASS_BE_SLIMBUS_2_RX,
6857 .stream_name = "Slimbus2 Playback",
6858 .cpu_dai_name = "msm-dai-q6-dev.16388",
6859 .platform_name = "msm-pcm-routing",
6860 .codec_name = "tavil_codec",
6861 .codec_dai_name = "tavil_rx2",
6862 .no_pcm = 1,
6863 .dpcm_playback = 1,
6864 .id = MSM_BACKEND_DAI_SLIMBUS_2_RX,
6865 .be_hw_params_fixup = msm_be_hw_params_fixup,
6866 .ops = &msm_be_ops,
6867 .ignore_pmdown_time = 1,
6868 .ignore_suspend = 1,
6869 },
6870 {
6871 .name = LPASS_BE_SLIMBUS_3_RX,
6872 .stream_name = "Slimbus3 Playback",
6873 .cpu_dai_name = "msm-dai-q6-dev.16390",
6874 .platform_name = "msm-pcm-routing",
6875 .codec_name = "tavil_codec",
6876 .codec_dai_name = "tavil_rx1",
6877 .no_pcm = 1,
6878 .dpcm_playback = 1,
6879 .id = MSM_BACKEND_DAI_SLIMBUS_3_RX,
6880 .be_hw_params_fixup = msm_be_hw_params_fixup,
6881 .ops = &msm_be_ops,
6882 /* dai link has playback support */
6883 .ignore_pmdown_time = 1,
6884 .ignore_suspend = 1,
6885 },
6886 {
6887 .name = LPASS_BE_SLIMBUS_3_TX,
6888 .stream_name = "Slimbus3 Capture",
6889 .cpu_dai_name = "msm-dai-q6-dev.16391",
6890 .platform_name = "msm-pcm-routing",
6891 .codec_name = "tavil_codec",
6892 .codec_dai_name = "tavil_tx1",
6893 .no_pcm = 1,
6894 .dpcm_capture = 1,
6895 .id = MSM_BACKEND_DAI_SLIMBUS_3_TX,
6896 .be_hw_params_fixup = msm_be_hw_params_fixup,
6897 .ops = &msm_be_ops,
6898 .ignore_suspend = 1,
6899 },
6900 {
6901 .name = LPASS_BE_SLIMBUS_4_RX,
6902 .stream_name = "Slimbus4 Playback",
6903 .cpu_dai_name = "msm-dai-q6-dev.16392",
6904 .platform_name = "msm-pcm-routing",
6905 .codec_name = "tavil_codec",
6906 .codec_dai_name = "tavil_rx1",
6907 .no_pcm = 1,
6908 .dpcm_playback = 1,
6909 .id = MSM_BACKEND_DAI_SLIMBUS_4_RX,
6910 .be_hw_params_fixup = msm_be_hw_params_fixup,
6911 .ops = &msm_be_ops,
6912 /* dai link has playback support */
6913 .ignore_pmdown_time = 1,
6914 .ignore_suspend = 1,
6915 },
6916 {
6917 .name = LPASS_BE_SLIMBUS_5_RX,
6918 .stream_name = "Slimbus5 Playback",
6919 .cpu_dai_name = "msm-dai-q6-dev.16394",
6920 .platform_name = "msm-pcm-routing",
6921 .codec_name = "tavil_codec",
6922 .codec_dai_name = "tavil_rx3",
6923 .no_pcm = 1,
6924 .dpcm_playback = 1,
6925 .id = MSM_BACKEND_DAI_SLIMBUS_5_RX,
6926 .be_hw_params_fixup = msm_be_hw_params_fixup,
6927 .ops = &msm_be_ops,
6928 /* dai link has playback support */
6929 .ignore_pmdown_time = 1,
6930 .ignore_suspend = 1,
6931 },
6932 /* MAD BE */
6933 {
6934 .name = LPASS_BE_SLIMBUS_5_TX,
6935 .stream_name = "Slimbus5 Capture",
6936 .cpu_dai_name = "msm-dai-q6-dev.16395",
6937 .platform_name = "msm-pcm-routing",
6938 .codec_name = "tavil_codec",
6939 .codec_dai_name = "tavil_mad1",
6940 .no_pcm = 1,
6941 .dpcm_capture = 1,
6942 .id = MSM_BACKEND_DAI_SLIMBUS_5_TX,
6943 .be_hw_params_fixup = msm_be_hw_params_fixup,
6944 .ops = &msm_be_ops,
6945 .ignore_suspend = 1,
6946 },
6947 {
6948 .name = LPASS_BE_SLIMBUS_6_RX,
6949 .stream_name = "Slimbus6 Playback",
6950 .cpu_dai_name = "msm-dai-q6-dev.16396",
6951 .platform_name = "msm-pcm-routing",
6952 .codec_name = "tavil_codec",
6953 .codec_dai_name = "tavil_rx4",
6954 .no_pcm = 1,
6955 .dpcm_playback = 1,
6956 .id = MSM_BACKEND_DAI_SLIMBUS_6_RX,
6957 .be_hw_params_fixup = msm_be_hw_params_fixup,
6958 .ops = &msm_be_ops,
6959 /* dai link has playback support */
6960 .ignore_pmdown_time = 1,
6961 .ignore_suspend = 1,
6962 },
6963 /* Slimbus VI Recording */
6964 {
6965 .name = LPASS_BE_SLIMBUS_TX_VI,
6966 .stream_name = "Slimbus4 Capture",
6967 .cpu_dai_name = "msm-dai-q6-dev.16393",
6968 .platform_name = "msm-pcm-routing",
6969 .codec_name = "tavil_codec",
6970 .codec_dai_name = "tavil_vifeedback",
6971 .id = MSM_BACKEND_DAI_SLIMBUS_4_TX,
6972 .be_hw_params_fixup = msm_be_hw_params_fixup,
6973 .ops = &msm_be_ops,
6974 .ignore_suspend = 1,
6975 .no_pcm = 1,
6976 .dpcm_capture = 1,
6977 },
6978};
6979
6980static struct snd_soc_dai_link msm_wcn_be_dai_links[] = {
6981 {
6982 .name = LPASS_BE_SLIMBUS_7_RX,
6983 .stream_name = "Slimbus7 Playback",
6984 .cpu_dai_name = "msm-dai-q6-dev.16398",
6985 .platform_name = "msm-pcm-routing",
6986 .codec_name = "btfmslim_slave",
6987 /* BT codec driver determines capabilities based on
6988 * dai name, bt codecdai name should always contains
6989 * supported usecase information
6990 */
6991 .codec_dai_name = "btfm_bt_sco_a2dp_slim_rx",
6992 .no_pcm = 1,
6993 .dpcm_playback = 1,
6994 .id = MSM_BACKEND_DAI_SLIMBUS_7_RX,
6995 .be_hw_params_fixup = msm_be_hw_params_fixup,
6996 .ops = &msm_wcn_ops,
6997 /* dai link has playback support */
6998 .ignore_pmdown_time = 1,
6999 .ignore_suspend = 1,
7000 },
7001 {
7002 .name = LPASS_BE_SLIMBUS_7_TX,
7003 .stream_name = "Slimbus7 Capture",
7004 .cpu_dai_name = "msm-dai-q6-dev.16399",
7005 .platform_name = "msm-pcm-routing",
7006 .codec_name = "btfmslim_slave",
7007 .codec_dai_name = "btfm_bt_sco_slim_tx",
7008 .no_pcm = 1,
7009 .dpcm_capture = 1,
7010 .id = MSM_BACKEND_DAI_SLIMBUS_7_TX,
7011 .be_hw_params_fixup = msm_be_hw_params_fixup,
7012 .ops = &msm_wcn_ops,
7013 .ignore_suspend = 1,
7014 },
7015 {
7016 .name = LPASS_BE_SLIMBUS_8_TX,
7017 .stream_name = "Slimbus8 Capture",
7018 .cpu_dai_name = "msm-dai-q6-dev.16401",
7019 .platform_name = "msm-pcm-routing",
7020 .codec_name = "btfmslim_slave",
7021 .codec_dai_name = "btfm_fm_slim_tx",
7022 .no_pcm = 1,
7023 .dpcm_capture = 1,
7024 .id = MSM_BACKEND_DAI_SLIMBUS_8_TX,
7025 .be_hw_params_fixup = msm_be_hw_params_fixup,
7026 .init = &msm_wcn_init,
7027 .ops = &msm_wcn_ops,
7028 .ignore_suspend = 1,
7029 },
7030};
7031
7032static struct snd_soc_dai_link ext_disp_be_dai_link[] = {
7033 /* DISP PORT BACK END DAI Link */
7034 {
7035 .name = LPASS_BE_DISPLAY_PORT,
7036 .stream_name = "Display Port Playback",
7037 .cpu_dai_name = "msm-dai-q6-dp.24608",
7038 .platform_name = "msm-pcm-routing",
7039 .codec_name = "msm-ext-disp-audio-codec-rx",
7040 .codec_dai_name = "msm_dp_audio_codec_rx_dai",
7041 .no_pcm = 1,
7042 .dpcm_playback = 1,
7043 .id = MSM_BACKEND_DAI_DISPLAY_PORT_RX,
7044 .be_hw_params_fixup = msm_be_hw_params_fixup,
7045 .ignore_pmdown_time = 1,
7046 .ignore_suspend = 1,
7047 },
7048};
7049
7050static struct snd_soc_dai_link msm_mi2s_be_dai_links[] = {
7051 {
7052 .name = LPASS_BE_PRI_MI2S_RX,
7053 .stream_name = "Primary MI2S Playback",
7054 .cpu_dai_name = "msm-dai-q6-mi2s.0",
7055 .platform_name = "msm-pcm-routing",
7056 .codec_name = "msm-stub-codec.1",
7057 .codec_dai_name = "msm-stub-rx",
7058 .no_pcm = 1,
7059 .dpcm_playback = 1,
7060 .id = MSM_BACKEND_DAI_PRI_MI2S_RX,
7061 .be_hw_params_fixup = msm_be_hw_params_fixup,
7062 .ops = &msm_mi2s_be_ops,
7063 .ignore_suspend = 1,
7064 .ignore_pmdown_time = 1,
7065 },
7066 {
7067 .name = LPASS_BE_PRI_MI2S_TX,
7068 .stream_name = "Primary MI2S Capture",
7069 .cpu_dai_name = "msm-dai-q6-mi2s.0",
7070 .platform_name = "msm-pcm-routing",
7071 .codec_name = "msm-stub-codec.1",
7072 .codec_dai_name = "msm-stub-tx",
7073 .no_pcm = 1,
7074 .dpcm_capture = 1,
7075 .id = MSM_BACKEND_DAI_PRI_MI2S_TX,
7076 .be_hw_params_fixup = msm_be_hw_params_fixup,
7077 .ops = &msm_mi2s_be_ops,
7078 .ignore_suspend = 1,
7079 },
7080 {
7081 .name = LPASS_BE_SEC_MI2S_RX,
7082 .stream_name = "Secondary MI2S Playback",
7083 .cpu_dai_name = "msm-dai-q6-mi2s.1",
7084 .platform_name = "msm-pcm-routing",
7085 .codec_name = "msm-stub-codec.1",
7086 .codec_dai_name = "msm-stub-rx",
7087 .no_pcm = 1,
7088 .dpcm_playback = 1,
7089 .id = MSM_BACKEND_DAI_SECONDARY_MI2S_RX,
7090 .be_hw_params_fixup = msm_be_hw_params_fixup,
7091 .ops = &msm_mi2s_be_ops,
7092 .ignore_suspend = 1,
7093 .ignore_pmdown_time = 1,
7094 },
7095 {
7096 .name = LPASS_BE_SEC_MI2S_TX,
7097 .stream_name = "Secondary MI2S Capture",
7098 .cpu_dai_name = "msm-dai-q6-mi2s.1",
7099 .platform_name = "msm-pcm-routing",
7100 .codec_name = "msm-stub-codec.1",
7101 .codec_dai_name = "msm-stub-tx",
7102 .no_pcm = 1,
7103 .dpcm_capture = 1,
7104 .id = MSM_BACKEND_DAI_SECONDARY_MI2S_TX,
7105 .be_hw_params_fixup = msm_be_hw_params_fixup,
7106 .ops = &msm_mi2s_be_ops,
7107 .ignore_suspend = 1,
7108 },
7109 {
7110 .name = LPASS_BE_TERT_MI2S_RX,
7111 .stream_name = "Tertiary MI2S Playback",
7112 .cpu_dai_name = "msm-dai-q6-mi2s.2",
7113 .platform_name = "msm-pcm-routing",
7114 .codec_name = "msm-stub-codec.1",
7115 .codec_dai_name = "msm-stub-rx",
7116 .no_pcm = 1,
7117 .dpcm_playback = 1,
7118 .id = MSM_BACKEND_DAI_TERTIARY_MI2S_RX,
7119 .be_hw_params_fixup = msm_be_hw_params_fixup,
7120 .ops = &msm_mi2s_be_ops,
7121 .ignore_suspend = 1,
7122 .ignore_pmdown_time = 1,
7123 },
7124 {
7125 .name = LPASS_BE_TERT_MI2S_TX,
7126 .stream_name = "Tertiary MI2S Capture",
7127 .cpu_dai_name = "msm-dai-q6-mi2s.2",
7128 .platform_name = "msm-pcm-routing",
7129 .codec_name = "msm-stub-codec.1",
7130 .codec_dai_name = "msm-stub-tx",
7131 .no_pcm = 1,
7132 .dpcm_capture = 1,
7133 .id = MSM_BACKEND_DAI_TERTIARY_MI2S_TX,
7134 .be_hw_params_fixup = msm_be_hw_params_fixup,
7135 .ops = &msm_mi2s_be_ops,
7136 .ignore_suspend = 1,
7137 },
7138 {
7139 .name = LPASS_BE_QUAT_MI2S_RX,
7140 .stream_name = "Quaternary MI2S Playback",
7141 .cpu_dai_name = "msm-dai-q6-mi2s.3",
7142 .platform_name = "msm-pcm-routing",
7143 .codec_name = "msm-stub-codec.1",
7144 .codec_dai_name = "msm-stub-rx",
7145 .no_pcm = 1,
7146 .dpcm_playback = 1,
7147 .id = MSM_BACKEND_DAI_QUATERNARY_MI2S_RX,
7148 .be_hw_params_fixup = msm_be_hw_params_fixup,
7149 .ops = &msm_mi2s_be_ops,
7150 .ignore_suspend = 1,
7151 .ignore_pmdown_time = 1,
7152 },
7153 {
7154 .name = LPASS_BE_QUAT_MI2S_TX,
7155 .stream_name = "Quaternary MI2S Capture",
7156 .cpu_dai_name = "msm-dai-q6-mi2s.3",
7157 .platform_name = "msm-pcm-routing",
7158 .codec_name = "msm-stub-codec.1",
7159 .codec_dai_name = "msm-stub-tx",
7160 .no_pcm = 1,
7161 .dpcm_capture = 1,
7162 .id = MSM_BACKEND_DAI_QUATERNARY_MI2S_TX,
7163 .be_hw_params_fixup = msm_be_hw_params_fixup,
7164 .ops = &msm_mi2s_be_ops,
7165 .ignore_suspend = 1,
7166 },
7167 {
7168 .name = LPASS_BE_QUIN_MI2S_RX,
7169 .stream_name = "Quinary MI2S Playback",
7170 .cpu_dai_name = "msm-dai-q6-mi2s.4",
7171 .platform_name = "msm-pcm-routing",
7172 .codec_name = "msm-stub-codec.1",
7173 .codec_dai_name = "msm-stub-rx",
7174 .no_pcm = 1,
7175 .dpcm_playback = 1,
7176 .id = MSM_BACKEND_DAI_QUINARY_MI2S_RX,
7177 .be_hw_params_fixup = msm_be_hw_params_fixup,
7178 .ops = &msm_mi2s_be_ops,
7179 .ignore_suspend = 1,
7180 .ignore_pmdown_time = 1,
7181 },
7182 {
7183 .name = LPASS_BE_QUIN_MI2S_TX,
7184 .stream_name = "Quinary MI2S Capture",
7185 .cpu_dai_name = "msm-dai-q6-mi2s.4",
7186 .platform_name = "msm-pcm-routing",
7187 .codec_name = "msm-stub-codec.1",
7188 .codec_dai_name = "msm-stub-tx",
7189 .no_pcm = 1,
7190 .dpcm_capture = 1,
7191 .id = MSM_BACKEND_DAI_QUINARY_MI2S_TX,
7192 .be_hw_params_fixup = msm_be_hw_params_fixup,
7193 .ops = &msm_mi2s_be_ops,
7194 .ignore_suspend = 1,
7195 },
7196
7197};
7198
7199static struct snd_soc_dai_link msm_auxpcm_be_dai_links[] = {
7200 /* Primary AUX PCM Backend DAI Links */
7201 {
7202 .name = LPASS_BE_AUXPCM_RX,
7203 .stream_name = "AUX PCM Playback",
7204 .cpu_dai_name = "msm-dai-q6-auxpcm.1",
7205 .platform_name = "msm-pcm-routing",
7206 .codec_name = "msm-stub-codec.1",
7207 .codec_dai_name = "msm-stub-rx",
7208 .no_pcm = 1,
7209 .dpcm_playback = 1,
7210 .id = MSM_BACKEND_DAI_AUXPCM_RX,
7211 .be_hw_params_fixup = msm_be_hw_params_fixup,
7212 .ignore_pmdown_time = 1,
7213 .ignore_suspend = 1,
7214 },
7215 {
7216 .name = LPASS_BE_AUXPCM_TX,
7217 .stream_name = "AUX PCM Capture",
7218 .cpu_dai_name = "msm-dai-q6-auxpcm.1",
7219 .platform_name = "msm-pcm-routing",
7220 .codec_name = "msm-stub-codec.1",
7221 .codec_dai_name = "msm-stub-tx",
7222 .no_pcm = 1,
7223 .dpcm_capture = 1,
7224 .id = MSM_BACKEND_DAI_AUXPCM_TX,
7225 .be_hw_params_fixup = msm_be_hw_params_fixup,
7226 .ignore_suspend = 1,
7227 },
7228 /* Secondary AUX PCM Backend DAI Links */
7229 {
7230 .name = LPASS_BE_SEC_AUXPCM_RX,
7231 .stream_name = "Sec AUX PCM Playback",
7232 .cpu_dai_name = "msm-dai-q6-auxpcm.2",
7233 .platform_name = "msm-pcm-routing",
7234 .codec_name = "msm-stub-codec.1",
7235 .codec_dai_name = "msm-stub-rx",
7236 .no_pcm = 1,
7237 .dpcm_playback = 1,
7238 .id = MSM_BACKEND_DAI_SEC_AUXPCM_RX,
7239 .be_hw_params_fixup = msm_be_hw_params_fixup,
7240 .ignore_pmdown_time = 1,
7241 .ignore_suspend = 1,
7242 },
7243 {
7244 .name = LPASS_BE_SEC_AUXPCM_TX,
7245 .stream_name = "Sec AUX PCM Capture",
7246 .cpu_dai_name = "msm-dai-q6-auxpcm.2",
7247 .platform_name = "msm-pcm-routing",
7248 .codec_name = "msm-stub-codec.1",
7249 .codec_dai_name = "msm-stub-tx",
7250 .no_pcm = 1,
7251 .dpcm_capture = 1,
7252 .id = MSM_BACKEND_DAI_SEC_AUXPCM_TX,
7253 .be_hw_params_fixup = msm_be_hw_params_fixup,
7254 .ignore_suspend = 1,
7255 },
7256 /* Tertiary AUX PCM Backend DAI Links */
7257 {
7258 .name = LPASS_BE_TERT_AUXPCM_RX,
7259 .stream_name = "Tert AUX PCM Playback",
7260 .cpu_dai_name = "msm-dai-q6-auxpcm.3",
7261 .platform_name = "msm-pcm-routing",
7262 .codec_name = "msm-stub-codec.1",
7263 .codec_dai_name = "msm-stub-rx",
7264 .no_pcm = 1,
7265 .dpcm_playback = 1,
7266 .id = MSM_BACKEND_DAI_TERT_AUXPCM_RX,
7267 .be_hw_params_fixup = msm_be_hw_params_fixup,
7268 .ignore_suspend = 1,
7269 },
7270 {
7271 .name = LPASS_BE_TERT_AUXPCM_TX,
7272 .stream_name = "Tert AUX PCM Capture",
7273 .cpu_dai_name = "msm-dai-q6-auxpcm.3",
7274 .platform_name = "msm-pcm-routing",
7275 .codec_name = "msm-stub-codec.1",
7276 .codec_dai_name = "msm-stub-tx",
7277 .no_pcm = 1,
7278 .dpcm_capture = 1,
7279 .id = MSM_BACKEND_DAI_TERT_AUXPCM_TX,
7280 .be_hw_params_fixup = msm_be_hw_params_fixup,
7281 .ignore_suspend = 1,
7282 },
7283 /* Quaternary AUX PCM Backend DAI Links */
7284 {
7285 .name = LPASS_BE_QUAT_AUXPCM_RX,
7286 .stream_name = "Quat AUX PCM Playback",
7287 .cpu_dai_name = "msm-dai-q6-auxpcm.4",
7288 .platform_name = "msm-pcm-routing",
7289 .codec_name = "msm-stub-codec.1",
7290 .codec_dai_name = "msm-stub-rx",
7291 .no_pcm = 1,
7292 .dpcm_playback = 1,
7293 .id = MSM_BACKEND_DAI_QUAT_AUXPCM_RX,
7294 .be_hw_params_fixup = msm_be_hw_params_fixup,
7295 .ignore_pmdown_time = 1,
7296 .ignore_suspend = 1,
7297 },
7298 {
7299 .name = LPASS_BE_QUAT_AUXPCM_TX,
7300 .stream_name = "Quat AUX PCM Capture",
7301 .cpu_dai_name = "msm-dai-q6-auxpcm.4",
7302 .platform_name = "msm-pcm-routing",
7303 .codec_name = "msm-stub-codec.1",
7304 .codec_dai_name = "msm-stub-tx",
7305 .no_pcm = 1,
7306 .dpcm_capture = 1,
7307 .id = MSM_BACKEND_DAI_QUAT_AUXPCM_TX,
7308 .be_hw_params_fixup = msm_be_hw_params_fixup,
7309 .ignore_suspend = 1,
7310 },
7311 /* Quinary AUX PCM Backend DAI Links */
7312 {
7313 .name = LPASS_BE_QUIN_AUXPCM_RX,
7314 .stream_name = "Quin AUX PCM Playback",
7315 .cpu_dai_name = "msm-dai-q6-auxpcm.5",
7316 .platform_name = "msm-pcm-routing",
7317 .codec_name = "msm-stub-codec.1",
7318 .codec_dai_name = "msm-stub-rx",
7319 .no_pcm = 1,
7320 .dpcm_playback = 1,
7321 .id = MSM_BACKEND_DAI_QUIN_AUXPCM_RX,
7322 .be_hw_params_fixup = msm_be_hw_params_fixup,
7323 .ignore_pmdown_time = 1,
7324 .ignore_suspend = 1,
7325 },
7326 {
7327 .name = LPASS_BE_QUIN_AUXPCM_TX,
7328 .stream_name = "Quin AUX PCM Capture",
7329 .cpu_dai_name = "msm-dai-q6-auxpcm.5",
7330 .platform_name = "msm-pcm-routing",
7331 .codec_name = "msm-stub-codec.1",
7332 .codec_dai_name = "msm-stub-tx",
7333 .no_pcm = 1,
7334 .dpcm_capture = 1,
7335 .id = MSM_BACKEND_DAI_QUIN_AUXPCM_TX,
7336 .be_hw_params_fixup = msm_be_hw_params_fixup,
7337 .ignore_suspend = 1,
7338 },
7339};
7340
7341static struct snd_soc_dai_link msm_wsa_cdc_dma_be_dai_links[] = {
7342 /* WSA CDC DMA Backend DAI Links */
7343 {
7344 .name = LPASS_BE_WSA_CDC_DMA_RX_0,
7345 .stream_name = "WSA CDC DMA0 Playback",
7346 .cpu_dai_name = "msm-dai-cdc-dma-dev.45056",
7347 .platform_name = "msm-pcm-routing",
7348 .codec_name = "bolero_codec",
7349 .codec_dai_name = "wsa_macro_rx1",
7350 .no_pcm = 1,
7351 .dpcm_playback = 1,
7352 .init = &msm_int_audrx_init,
7353 .id = MSM_BACKEND_DAI_WSA_CDC_DMA_RX_0,
7354 .be_hw_params_fixup = msm_be_hw_params_fixup,
7355 .ignore_pmdown_time = 1,
7356 .ignore_suspend = 1,
7357 .ops = &msm_cdc_dma_be_ops,
7358 },
7359 {
7360 .name = LPASS_BE_WSA_CDC_DMA_RX_1,
7361 .stream_name = "WSA CDC DMA1 Playback",
7362 .cpu_dai_name = "msm-dai-cdc-dma-dev.45058",
7363 .platform_name = "msm-pcm-routing",
7364 .codec_name = "bolero_codec",
7365 .codec_dai_name = "wsa_macro_rx_mix",
7366 .no_pcm = 1,
7367 .dpcm_playback = 1,
7368 .id = MSM_BACKEND_DAI_WSA_CDC_DMA_RX_1,
7369 .be_hw_params_fixup = msm_be_hw_params_fixup,
7370 .ignore_pmdown_time = 1,
7371 .ignore_suspend = 1,
7372 .ops = &msm_cdc_dma_be_ops,
7373 },
7374 {
7375 .name = LPASS_BE_WSA_CDC_DMA_TX_1,
7376 .stream_name = "WSA CDC DMA1 Capture",
7377 .cpu_dai_name = "msm-dai-cdc-dma-dev.45059",
7378 .platform_name = "msm-pcm-routing",
7379 .codec_name = "bolero_codec",
7380 .codec_dai_name = "wsa_macro_echo",
7381 .no_pcm = 1,
7382 .dpcm_capture = 1,
7383 .id = MSM_BACKEND_DAI_WSA_CDC_DMA_TX_1,
7384 .be_hw_params_fixup = msm_be_hw_params_fixup,
7385 .ignore_suspend = 1,
7386 .ops = &msm_cdc_dma_be_ops,
7387 },
Aditya Bavanari44eb8952018-05-09 19:01:50 +05307388};
7389
7390static struct snd_soc_dai_link msm_rx_tx_cdc_dma_be_dai_links[] = {
7391 /* RX CDC DMA Backend DAI Links */
7392 {
7393 .name = LPASS_BE_RX_CDC_DMA_RX_0,
7394 .stream_name = "RX CDC DMA0 Playback",
Ramprasad Katkamf83acfb2018-08-11 23:28:57 +05307395 .cpu_dai_name = "msm-dai-cdc-dma-dev.45104",
Aditya Bavanari44eb8952018-05-09 19:01:50 +05307396 .platform_name = "msm-pcm-routing",
7397 .codec_name = "bolero_codec",
7398 .codec_dai_name = "rx_macro_rx1",
7399 .no_pcm = 1,
7400 .dpcm_playback = 1,
Aditya Bavanari44eb8952018-05-09 19:01:50 +05307401 .id = MSM_BACKEND_DAI_RX_CDC_DMA_RX_0,
7402 .be_hw_params_fixup = msm_be_hw_params_fixup,
7403 .ignore_pmdown_time = 1,
7404 .ignore_suspend = 1,
7405 .ops = &msm_cdc_dma_be_ops,
7406 },
7407 {
7408 .name = LPASS_BE_RX_CDC_DMA_RX_1,
7409 .stream_name = "RX CDC DMA1 Playback",
Ramprasad Katkamf83acfb2018-08-11 23:28:57 +05307410 .cpu_dai_name = "msm-dai-cdc-dma-dev.45106",
Aditya Bavanari44eb8952018-05-09 19:01:50 +05307411 .platform_name = "msm-pcm-routing",
7412 .codec_name = "bolero_codec",
7413 .codec_dai_name = "rx_macro_rx2",
7414 .no_pcm = 1,
7415 .dpcm_playback = 1,
7416 .id = MSM_BACKEND_DAI_RX_CDC_DMA_RX_1,
7417 .be_hw_params_fixup = msm_be_hw_params_fixup,
7418 .ignore_pmdown_time = 1,
7419 .ignore_suspend = 1,
7420 .ops = &msm_cdc_dma_be_ops,
7421 },
7422 {
7423 .name = LPASS_BE_RX_CDC_DMA_RX_2,
7424 .stream_name = "RX CDC DMA2 Playback",
Ramprasad Katkamf83acfb2018-08-11 23:28:57 +05307425 .cpu_dai_name = "msm-dai-cdc-dma-dev.45108",
Aditya Bavanari44eb8952018-05-09 19:01:50 +05307426 .platform_name = "msm-pcm-routing",
7427 .codec_name = "bolero_codec",
7428 .codec_dai_name = "rx_macro_rx3",
7429 .no_pcm = 1,
7430 .dpcm_playback = 1,
7431 .id = MSM_BACKEND_DAI_RX_CDC_DMA_RX_2,
7432 .be_hw_params_fixup = msm_be_hw_params_fixup,
7433 .ignore_pmdown_time = 1,
7434 .ignore_suspend = 1,
7435 .ops = &msm_cdc_dma_be_ops,
7436 },
7437 {
7438 .name = LPASS_BE_RX_CDC_DMA_RX_3,
7439 .stream_name = "RX CDC DMA3 Playback",
Ramprasad Katkamf83acfb2018-08-11 23:28:57 +05307440 .cpu_dai_name = "msm-dai-cdc-dma-dev.45110",
Aditya Bavanari44eb8952018-05-09 19:01:50 +05307441 .platform_name = "msm-pcm-routing",
7442 .codec_name = "bolero_codec",
7443 .codec_dai_name = "rx_macro_rx4",
7444 .no_pcm = 1,
7445 .dpcm_playback = 1,
7446 .id = MSM_BACKEND_DAI_RX_CDC_DMA_RX_3,
7447 .be_hw_params_fixup = msm_be_hw_params_fixup,
7448 .ignore_pmdown_time = 1,
7449 .ignore_suspend = 1,
7450 .ops = &msm_cdc_dma_be_ops,
7451 },
7452 /* TX CDC DMA Backend DAI Links */
7453 {
7454 .name = LPASS_BE_TX_CDC_DMA_TX_3,
7455 .stream_name = "TX CDC DMA3 Capture",
Ramprasad Katkamf83acfb2018-08-11 23:28:57 +05307456 .cpu_dai_name = "msm-dai-cdc-dma-dev.45111",
Aditya Bavanari44eb8952018-05-09 19:01:50 +05307457 .platform_name = "msm-pcm-routing",
7458 .codec_name = "bolero_codec",
7459 .codec_dai_name = "tx_macro_tx1",
7460 .no_pcm = 1,
7461 .dpcm_capture = 1,
Aditya Bavanari44eb8952018-05-09 19:01:50 +05307462 .id = MSM_BACKEND_DAI_TX_CDC_DMA_TX_3,
7463 .be_hw_params_fixup = msm_be_hw_params_fixup,
7464 .ignore_suspend = 1,
7465 .ops = &msm_cdc_dma_be_ops,
7466 },
7467 {
7468 .name = LPASS_BE_TX_CDC_DMA_TX_4,
7469 .stream_name = "TX CDC DMA4 Capture",
Ramprasad Katkamf83acfb2018-08-11 23:28:57 +05307470 .cpu_dai_name = "msm-dai-cdc-dma-dev.45113",
Aditya Bavanari44eb8952018-05-09 19:01:50 +05307471 .platform_name = "msm-pcm-routing",
7472 .codec_name = "bolero_codec",
7473 .codec_dai_name = "tx_macro_tx2",
7474 .no_pcm = 1,
7475 .dpcm_capture = 1,
7476 .id = MSM_BACKEND_DAI_TX_CDC_DMA_TX_4,
7477 .be_hw_params_fixup = msm_be_hw_params_fixup,
7478 .ignore_suspend = 1,
7479 .ops = &msm_cdc_dma_be_ops,
7480 },
7481};
7482
7483static struct snd_soc_dai_link msm_sm6150_dai_links[
7484 ARRAY_SIZE(msm_common_dai_links) +
7485 ARRAY_SIZE(msm_tavil_fe_dai_links) +
7486 ARRAY_SIZE(msm_bolero_fe_dai_links) +
7487 ARRAY_SIZE(msm_common_misc_fe_dai_links) +
7488 ARRAY_SIZE(msm_common_be_dai_links) +
7489 ARRAY_SIZE(msm_tavil_be_dai_links) +
7490 ARRAY_SIZE(msm_wcn_be_dai_links) +
7491 ARRAY_SIZE(ext_disp_be_dai_link) +
7492 ARRAY_SIZE(msm_mi2s_be_dai_links) +
7493 ARRAY_SIZE(msm_auxpcm_be_dai_links) +
7494 ARRAY_SIZE(msm_wsa_cdc_dma_be_dai_links) +
7495 ARRAY_SIZE(msm_rx_tx_cdc_dma_be_dai_links)];
7496
7497static int msm_snd_card_tavil_late_probe(struct snd_soc_card *card)
7498{
7499 const char *be_dl_name = LPASS_BE_SLIMBUS_0_RX;
7500 struct snd_soc_pcm_runtime *rtd;
7501 int ret = 0;
7502 void *mbhc_calibration;
7503
7504 rtd = snd_soc_get_pcm_runtime(card, be_dl_name);
7505 if (!rtd) {
7506 dev_err(card->dev,
7507 "%s: snd_soc_get_pcm_runtime for %s failed!\n",
7508 __func__, be_dl_name);
7509 ret = -EINVAL;
7510 goto err_pcm_runtime;
7511 }
7512
7513 mbhc_calibration = def_wcd_mbhc_cal();
7514 if (!mbhc_calibration) {
7515 ret = -ENOMEM;
7516 goto err_mbhc_cal;
7517 }
7518 wcd_mbhc_cfg.calibration = mbhc_calibration;
7519 ret = tavil_mbhc_hs_detect(rtd->codec, &wcd_mbhc_cfg);
7520 if (ret) {
7521 dev_err(card->dev, "%s: mbhc hs detect failed, err:%d\n",
7522 __func__, ret);
7523 goto err_hs_detect;
7524 }
7525 return 0;
7526
7527err_hs_detect:
7528 kfree(mbhc_calibration);
7529err_mbhc_cal:
7530err_pcm_runtime:
7531 return ret;
7532}
7533
7534
7535static int msm_populate_dai_link_component_of_node(
7536 struct snd_soc_card *card)
7537{
7538 int i, index, ret = 0;
7539 struct device *cdev = card->dev;
7540 struct snd_soc_dai_link *dai_link = card->dai_link;
7541 struct device_node *np;
7542
7543 if (!cdev) {
7544 pr_err("%s: Sound card device memory NULL\n", __func__);
7545 return -ENODEV;
7546 }
7547
7548 for (i = 0; i < card->num_links; i++) {
7549 if (dai_link[i].platform_of_node && dai_link[i].cpu_of_node)
7550 continue;
7551
7552 /* populate platform_of_node for snd card dai links */
7553 if (dai_link[i].platform_name &&
7554 !dai_link[i].platform_of_node) {
7555 index = of_property_match_string(cdev->of_node,
7556 "asoc-platform-names",
7557 dai_link[i].platform_name);
7558 if (index < 0) {
7559 pr_err("%s: No match found for platform name: %s\n",
7560 __func__, dai_link[i].platform_name);
7561 ret = index;
7562 goto err;
7563 }
7564 np = of_parse_phandle(cdev->of_node, "asoc-platform",
7565 index);
7566 if (!np) {
7567 pr_err("%s: retrieving phandle for platform %s, index %d failed\n",
7568 __func__, dai_link[i].platform_name,
7569 index);
7570 ret = -ENODEV;
7571 goto err;
7572 }
7573 dai_link[i].platform_of_node = np;
7574 dai_link[i].platform_name = NULL;
7575 }
7576
7577 /* populate cpu_of_node for snd card dai links */
7578 if (dai_link[i].cpu_dai_name && !dai_link[i].cpu_of_node) {
7579 index = of_property_match_string(cdev->of_node,
7580 "asoc-cpu-names",
7581 dai_link[i].cpu_dai_name);
7582 if (index >= 0) {
7583 np = of_parse_phandle(cdev->of_node, "asoc-cpu",
7584 index);
7585 if (!np) {
7586 pr_err("%s: retrieving phandle for cpu dai %s failed\n",
7587 __func__,
7588 dai_link[i].cpu_dai_name);
7589 ret = -ENODEV;
7590 goto err;
7591 }
7592 dai_link[i].cpu_of_node = np;
7593 dai_link[i].cpu_dai_name = NULL;
7594 }
7595 }
7596
7597 /* populate codec_of_node for snd card dai links */
7598 if (dai_link[i].codec_name && !dai_link[i].codec_of_node) {
7599 index = of_property_match_string(cdev->of_node,
7600 "asoc-codec-names",
7601 dai_link[i].codec_name);
7602 if (index < 0)
7603 continue;
7604 np = of_parse_phandle(cdev->of_node, "asoc-codec",
7605 index);
7606 if (!np) {
7607 pr_err("%s: retrieving phandle for codec %s failed\n",
7608 __func__, dai_link[i].codec_name);
7609 ret = -ENODEV;
7610 goto err;
7611 }
7612 dai_link[i].codec_of_node = np;
7613 dai_link[i].codec_name = NULL;
7614 }
7615 }
7616
7617err:
7618 return ret;
7619}
7620
7621static int msm_audrx_stub_init(struct snd_soc_pcm_runtime *rtd)
7622{
7623 int ret = 0;
7624 struct snd_soc_codec *codec = rtd->codec;
7625
7626 ret = snd_soc_add_codec_controls(codec, msm_tavil_snd_controls,
7627 ARRAY_SIZE(msm_tavil_snd_controls));
7628 if (ret < 0) {
7629 dev_err(codec->dev,
7630 "%s: add_codec_controls failed, err = %d\n",
7631 __func__, ret);
7632 return ret;
7633 }
7634
7635 return 0;
7636}
7637
7638static int msm_snd_stub_hw_params(struct snd_pcm_substream *substream,
7639 struct snd_pcm_hw_params *params)
7640{
7641 struct snd_soc_pcm_runtime *rtd = substream->private_data;
7642 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
7643
7644 int ret = 0;
7645 unsigned int rx_ch[] = {144, 145, 146, 147, 148, 149, 150,
7646 151};
7647 unsigned int tx_ch[] = {128, 129, 130, 131, 132, 133,
7648 134, 135, 136, 137, 138, 139,
7649 140, 141, 142, 143};
7650
7651 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
7652 ret = snd_soc_dai_set_channel_map(cpu_dai, 0, 0,
7653 slim_rx_cfg[SLIM_RX_0].channels,
7654 rx_ch);
7655 if (ret < 0)
7656 pr_err("%s: RX failed to set cpu chan map error %d\n",
7657 __func__, ret);
7658 } else {
7659 ret = snd_soc_dai_set_channel_map(cpu_dai,
7660 slim_tx_cfg[SLIM_TX_0].channels,
7661 tx_ch, 0, 0);
7662 if (ret < 0)
7663 pr_err("%s: TX failed to set cpu chan map error %d\n",
7664 __func__, ret);
7665 }
7666
7667 return ret;
7668}
7669
7670static struct snd_soc_ops msm_stub_be_ops = {
7671 .hw_params = msm_snd_stub_hw_params,
7672};
7673
7674static struct snd_soc_dai_link msm_stub_fe_dai_links[] = {
7675
7676 /* FrontEnd DAI Links */
7677 {
7678 .name = "MSMSTUB Media1",
7679 .stream_name = "MultiMedia1",
7680 .cpu_dai_name = "MultiMedia1",
7681 .platform_name = "msm-pcm-dsp.0",
7682 .dynamic = 1,
7683 .async_ops = ASYNC_DPCM_SND_SOC_PREPARE,
7684 .dpcm_playback = 1,
7685 .dpcm_capture = 1,
7686 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
7687 SND_SOC_DPCM_TRIGGER_POST},
7688 .codec_dai_name = "snd-soc-dummy-dai",
7689 .codec_name = "snd-soc-dummy",
7690 .ignore_suspend = 1,
7691 /* this dainlink has playback support */
7692 .ignore_pmdown_time = 1,
7693 .id = MSM_FRONTEND_DAI_MULTIMEDIA1
7694 },
7695};
7696
7697static struct snd_soc_dai_link msm_stub_be_dai_links[] = {
7698
7699 /* Backend DAI Links */
7700 {
7701 .name = LPASS_BE_SLIMBUS_0_RX,
7702 .stream_name = "Slimbus Playback",
7703 .cpu_dai_name = "msm-dai-q6-dev.16384",
7704 .platform_name = "msm-pcm-routing",
7705 .codec_name = "msm-stub-codec.1",
7706 .codec_dai_name = "msm-stub-rx",
7707 .no_pcm = 1,
7708 .dpcm_playback = 1,
7709 .id = MSM_BACKEND_DAI_SLIMBUS_0_RX,
7710 .init = &msm_audrx_stub_init,
7711 .be_hw_params_fixup = msm_be_hw_params_fixup,
7712 .ignore_pmdown_time = 1, /* dai link has playback support */
7713 .ignore_suspend = 1,
7714 .ops = &msm_stub_be_ops,
7715 },
7716 {
7717 .name = LPASS_BE_SLIMBUS_0_TX,
7718 .stream_name = "Slimbus Capture",
7719 .cpu_dai_name = "msm-dai-q6-dev.16385",
7720 .platform_name = "msm-pcm-routing",
7721 .codec_name = "msm-stub-codec.1",
7722 .codec_dai_name = "msm-stub-tx",
7723 .no_pcm = 1,
7724 .dpcm_capture = 1,
7725 .id = MSM_BACKEND_DAI_SLIMBUS_0_TX,
7726 .be_hw_params_fixup = msm_be_hw_params_fixup,
7727 .ignore_suspend = 1,
7728 .ops = &msm_stub_be_ops,
7729 },
7730};
7731
7732static struct snd_soc_dai_link msm_stub_dai_links[
7733 ARRAY_SIZE(msm_stub_fe_dai_links) +
7734 ARRAY_SIZE(msm_stub_be_dai_links)];
7735
7736struct snd_soc_card snd_soc_card_stub_msm = {
7737 .name = "sm6150-stub-snd-card",
7738};
7739
7740static const struct of_device_id sm6150_asoc_machine_of_match[] = {
7741 { .compatible = "qcom,sm6150-asoc-snd",
7742 .data = "codec"},
7743 { .compatible = "qcom,sm6150-asoc-snd-stub",
7744 .data = "stub_codec"},
7745 {},
7746};
7747
7748static struct snd_soc_card *populate_snd_card_dailinks(struct device *dev)
7749{
7750 struct snd_soc_card *card = NULL;
7751 struct snd_soc_dai_link *dailink;
Aditya Bavanari0b26ab32018-08-03 23:53:01 +05307752 int total_links = 0, rc = 0;
7753 u32 tavil_codec = 0, auxpcm_audio_intf = 0;
7754 u32 mi2s_audio_intf = 0, ext_disp_audio_intf = 0;
7755 u32 wcn_btfm_intf = 0;
Aditya Bavanari44eb8952018-05-09 19:01:50 +05307756 const struct of_device_id *match;
7757
7758 match = of_match_node(sm6150_asoc_machine_of_match, dev->of_node);
7759 if (!match) {
7760 dev_err(dev, "%s: No DT match found for sound card\n",
7761 __func__);
7762 return NULL;
7763 }
7764
7765 if (!strcmp(match->data, "codec")) {
7766 card = &snd_soc_card_sm6150_msm;
7767 memcpy(msm_sm6150_dai_links + total_links,
7768 msm_common_dai_links,
7769 sizeof(msm_common_dai_links));
7770
7771 total_links += ARRAY_SIZE(msm_common_dai_links);
7772
7773 memcpy(msm_sm6150_dai_links + total_links,
7774 msm_common_misc_fe_dai_links,
7775 sizeof(msm_common_misc_fe_dai_links));
7776
7777 total_links += ARRAY_SIZE(msm_common_misc_fe_dai_links);
7778
Aditya Bavanari0b26ab32018-08-03 23:53:01 +05307779 rc = of_property_read_u32(dev->of_node, "qcom,tavil_codec",
7780 &tavil_codec);
7781 if (rc) {
7782 dev_dbg(dev, "%s: No DT match for tavil codec\n",
Aditya Bavanari44eb8952018-05-09 19:01:50 +05307783 __func__);
Aditya Bavanari0b26ab32018-08-03 23:53:01 +05307784 } else {
7785 if (tavil_codec) {
7786 card->late_probe =
7787 msm_snd_card_tavil_late_probe;
7788 memcpy(msm_sm6150_dai_links + total_links,
Aditya Bavanari44eb8952018-05-09 19:01:50 +05307789 msm_tavil_fe_dai_links,
7790 sizeof(msm_tavil_fe_dai_links));
Aditya Bavanari0b26ab32018-08-03 23:53:01 +05307791 total_links +=
7792 ARRAY_SIZE(msm_tavil_fe_dai_links);
7793 }
7794 }
7795
7796 if (!tavil_codec) {
Aditya Bavanari44eb8952018-05-09 19:01:50 +05307797 memcpy(msm_sm6150_dai_links + total_links,
Aditya Bavanari0b26ab32018-08-03 23:53:01 +05307798 msm_bolero_fe_dai_links,
7799 sizeof(msm_bolero_fe_dai_links));
7800 total_links +=
7801 ARRAY_SIZE(msm_bolero_fe_dai_links);
Aditya Bavanari44eb8952018-05-09 19:01:50 +05307802 }
7803
7804 memcpy(msm_sm6150_dai_links + total_links,
7805 msm_common_be_dai_links,
7806 sizeof(msm_common_be_dai_links));
7807
7808 total_links += ARRAY_SIZE(msm_common_be_dai_links);
7809
Aditya Bavanari0b26ab32018-08-03 23:53:01 +05307810 if (tavil_codec) {
Aditya Bavanari44eb8952018-05-09 19:01:50 +05307811 memcpy(msm_sm6150_dai_links + total_links,
7812 msm_tavil_be_dai_links,
7813 sizeof(msm_tavil_be_dai_links));
7814 total_links += ARRAY_SIZE(msm_tavil_be_dai_links);
7815 } else {
7816 memcpy(msm_sm6150_dai_links + total_links,
7817 msm_wsa_cdc_dma_be_dai_links,
7818 sizeof(msm_wsa_cdc_dma_be_dai_links));
Aditya Bavanari0b26ab32018-08-03 23:53:01 +05307819 total_links +=
7820 ARRAY_SIZE(msm_wsa_cdc_dma_be_dai_links);
Aditya Bavanari44eb8952018-05-09 19:01:50 +05307821
7822 memcpy(msm_sm6150_dai_links + total_links,
7823 msm_rx_tx_cdc_dma_be_dai_links,
7824 sizeof(msm_rx_tx_cdc_dma_be_dai_links));
7825 total_links +=
7826 ARRAY_SIZE(msm_rx_tx_cdc_dma_be_dai_links);
7827 }
7828
Aditya Bavanari0b26ab32018-08-03 23:53:01 +05307829 rc = of_property_read_u32(dev->of_node,
7830 "qcom,ext-disp-audio-rx",
7831 &ext_disp_audio_intf);
7832 if (rc) {
7833 dev_dbg(dev, "%s: No DT match Ext Disp interface\n",
Aditya Bavanari44eb8952018-05-09 19:01:50 +05307834 __func__);
Aditya Bavanari0b26ab32018-08-03 23:53:01 +05307835 } else {
Rohit kumare5a1d4f2018-09-17 11:36:25 +05307836 if (ext_disp_audio_intf) {
Aditya Bavanari0b26ab32018-08-03 23:53:01 +05307837 memcpy(msm_sm6150_dai_links + total_links,
7838 ext_disp_be_dai_link,
7839 sizeof(ext_disp_be_dai_link));
7840 total_links +=
7841 ARRAY_SIZE(ext_disp_be_dai_link);
7842 }
Aditya Bavanari44eb8952018-05-09 19:01:50 +05307843 }
Aditya Bavanari0b26ab32018-08-03 23:53:01 +05307844
7845 rc = of_property_read_u32(dev->of_node, "qcom,mi2s-audio-intf",
7846 &mi2s_audio_intf);
7847 if (rc) {
7848 dev_dbg(dev, "%s: No DT match MI2S audio interface\n",
7849 __func__);
7850 } else {
7851 if (mi2s_audio_intf) {
7852 memcpy(msm_sm6150_dai_links + total_links,
7853 msm_mi2s_be_dai_links,
7854 sizeof(msm_mi2s_be_dai_links));
7855 total_links +=
7856 ARRAY_SIZE(msm_mi2s_be_dai_links);
7857 }
Aditya Bavanari44eb8952018-05-09 19:01:50 +05307858 }
Aditya Bavanari0b26ab32018-08-03 23:53:01 +05307859
7860
7861 rc = of_property_read_u32(dev->of_node, "qcom,wcn-btfm",
7862 &wcn_btfm_intf);
7863 if (rc) {
7864 dev_dbg(dev, "%s: No DT match wcn btfm interface\n",
7865 __func__);
7866 } else {
7867 if (wcn_btfm_intf) {
7868 memcpy(msm_sm6150_dai_links + total_links,
7869 msm_wcn_be_dai_links,
7870 sizeof(msm_wcn_be_dai_links));
7871 total_links +=
7872 ARRAY_SIZE(msm_wcn_be_dai_links);
7873 }
Aditya Bavanari44eb8952018-05-09 19:01:50 +05307874 }
Aditya Bavanari0b26ab32018-08-03 23:53:01 +05307875
7876 rc = of_property_read_u32(dev->of_node,
7877 "qcom,auxpcm-audio-intf",
7878 &auxpcm_audio_intf);
7879 if (rc) {
7880 dev_dbg(dev, "%s: No DT match Aux PCM interface\n",
7881 __func__);
7882 } else {
7883 if (auxpcm_audio_intf) {
7884 memcpy(msm_sm6150_dai_links + total_links,
7885 msm_auxpcm_be_dai_links,
7886 sizeof(msm_auxpcm_be_dai_links));
7887 total_links +=
7888 ARRAY_SIZE(msm_auxpcm_be_dai_links);
7889 }
Aditya Bavanari44eb8952018-05-09 19:01:50 +05307890 }
Aditya Bavanari0b26ab32018-08-03 23:53:01 +05307891
Aditya Bavanari44eb8952018-05-09 19:01:50 +05307892 dailink = msm_sm6150_dai_links;
7893 } else if (!strcmp(match->data, "stub_codec")) {
7894 card = &snd_soc_card_stub_msm;
7895
7896 memcpy(msm_stub_dai_links + total_links,
7897 msm_stub_fe_dai_links,
7898 sizeof(msm_stub_fe_dai_links));
7899 total_links += ARRAY_SIZE(msm_stub_fe_dai_links);
7900
7901 memcpy(msm_stub_dai_links + total_links,
7902 msm_stub_be_dai_links,
7903 sizeof(msm_stub_be_dai_links));
7904 total_links += ARRAY_SIZE(msm_stub_be_dai_links);
7905
7906 dailink = msm_stub_dai_links;
7907 }
7908
7909 if (card) {
7910 card->dai_link = dailink;
7911 card->num_links = total_links;
7912 }
7913
7914 return card;
7915}
7916
7917static int msm_wsa881x_init(struct snd_soc_component *component)
7918{
7919 u8 spkleft_ports[WSA881X_MAX_SWR_PORTS] = {0, 1, 2, 3};
7920 u8 spkright_ports[WSA881X_MAX_SWR_PORTS] = {0, 1, 2, 3};
7921 u8 spkleft_port_types[WSA881X_MAX_SWR_PORTS] = {SPKR_L, SPKR_L_COMP,
7922 SPKR_L_BOOST, SPKR_L_VI};
7923 u8 spkright_port_types[WSA881X_MAX_SWR_PORTS] = {SPKR_R, SPKR_R_COMP,
7924 SPKR_R_BOOST, SPKR_R_VI};
7925 unsigned int ch_rate[WSA881X_MAX_SWR_PORTS] = {2400, 600, 300, 1200};
7926 unsigned int ch_mask[WSA881X_MAX_SWR_PORTS] = {0x1, 0xF, 0x3, 0x3};
7927 struct snd_soc_codec *codec = snd_soc_component_to_codec(component);
7928 struct msm_asoc_mach_data *pdata;
7929 struct snd_soc_dapm_context *dapm;
Aditya Bavanari4ae32fc2018-08-13 13:08:34 +05307930 struct snd_card *card = component->card->snd_card;
7931 struct snd_info_entry *entry;
Aditya Bavanari44eb8952018-05-09 19:01:50 +05307932 int ret = 0;
7933
7934 if (!codec) {
7935 pr_err("%s codec is NULL\n", __func__);
7936 return -EINVAL;
7937 }
7938
7939 dapm = snd_soc_codec_get_dapm(codec);
7940
7941 if (!strcmp(component->name_prefix, "SpkrLeft")) {
7942 dev_dbg(codec->dev, "%s: setting left ch map to codec %s\n",
7943 __func__, codec->component.name);
7944 wsa881x_set_channel_map(codec, &spkleft_ports[0],
7945 WSA881X_MAX_SWR_PORTS, &ch_mask[0],
7946 &ch_rate[0], &spkleft_port_types[0]);
7947 if (dapm->component) {
7948 snd_soc_dapm_ignore_suspend(dapm, "SpkrLeft IN");
7949 snd_soc_dapm_ignore_suspend(dapm, "SpkrLeft SPKR");
7950 }
7951 } else if (!strcmp(component->name_prefix, "SpkrRight")) {
7952 dev_dbg(codec->dev, "%s: setting right ch map to codec %s\n",
7953 __func__, codec->component.name);
7954 wsa881x_set_channel_map(codec, &spkright_ports[0],
7955 WSA881X_MAX_SWR_PORTS, &ch_mask[0],
7956 &ch_rate[0], &spkright_port_types[0]);
7957 if (dapm->component) {
7958 snd_soc_dapm_ignore_suspend(dapm, "SpkrRight IN");
7959 snd_soc_dapm_ignore_suspend(dapm, "SpkrRight SPKR");
7960 }
7961 } else {
7962 dev_err(codec->dev, "%s: wrong codec name %s\n", __func__,
7963 codec->component.name);
7964 ret = -EINVAL;
7965 goto err;
7966 }
7967 pdata = snd_soc_card_get_drvdata(component->card);
Aditya Bavanari4ae32fc2018-08-13 13:08:34 +05307968 if (!pdata->codec_root) {
7969 entry = snd_info_create_subdir(card->module, "codecs",
7970 card->proc_root);
7971 if (!entry) {
7972 pr_err("%s: Cannot create codecs module entry\n",
7973 __func__);
7974 ret = 0;
7975 goto err;
7976 }
7977 pdata->codec_root = entry;
7978 }
7979 wsa881x_codec_info_create_codec_entry(pdata->codec_root,
7980 codec);
Aditya Bavanari44eb8952018-05-09 19:01:50 +05307981err:
7982 return ret;
7983}
7984
7985static int msm_aux_codec_init(struct snd_soc_component *component)
7986{
Aditya Bavanari0b26ab32018-08-03 23:53:01 +05307987 struct snd_soc_codec *codec = snd_soc_component_to_codec(component);
7988 struct snd_soc_dapm_context *dapm = snd_soc_codec_get_dapm(codec);
Ramprasad Katkam997da402018-08-17 20:20:06 +05307989 int ret = 0;
7990 void *mbhc_calibration;
Aditya Bavanari4ae32fc2018-08-13 13:08:34 +05307991 struct snd_info_entry *entry;
7992 struct snd_card *card = component->card->snd_card;
7993 struct msm_asoc_mach_data *pdata;
Aditya Bavanari0b26ab32018-08-03 23:53:01 +05307994
7995 snd_soc_dapm_ignore_suspend(dapm, "EAR");
7996 snd_soc_dapm_ignore_suspend(dapm, "AUX");
7997 snd_soc_dapm_ignore_suspend(dapm, "HPHL");
7998 snd_soc_dapm_ignore_suspend(dapm, "HPHR");
7999 snd_soc_dapm_ignore_suspend(dapm, "AMIC1");
8000 snd_soc_dapm_ignore_suspend(dapm, "AMIC2");
8001 snd_soc_dapm_ignore_suspend(dapm, "AMIC3");
8002 snd_soc_dapm_ignore_suspend(dapm, "AMIC4");
8003 snd_soc_dapm_sync(dapm);
8004
Aditya Bavanari4ae32fc2018-08-13 13:08:34 +05308005 pdata = snd_soc_card_get_drvdata(component->card);
8006 if (!pdata->codec_root) {
8007 entry = snd_info_create_subdir(card->module, "codecs",
8008 card->proc_root);
8009 if (!entry) {
8010 pr_err("%s: Cannot create codecs module entry\n",
8011 __func__);
8012 ret = 0;
8013 goto codec_root_err;
8014 }
8015 pdata->codec_root = entry;
8016 }
8017 wcd937x_info_create_codec_entry(pdata->codec_root, codec);
8018codec_root_err:
Ramprasad Katkam997da402018-08-17 20:20:06 +05308019 mbhc_calibration = def_wcd_mbhc_cal();
8020 if (!mbhc_calibration) {
8021 return -ENOMEM;
8022 }
8023 wcd_mbhc_cfg.calibration = mbhc_calibration;
8024 ret = wcd937x_mbhc_hs_detect(codec, &wcd_mbhc_cfg);
8025
8026 return ret;
Aditya Bavanari44eb8952018-05-09 19:01:50 +05308027}
8028
8029static int msm_init_aux_dev(struct platform_device *pdev,
8030 struct snd_soc_card *card)
8031{
8032 struct device_node *wsa_of_node;
8033 struct device_node *aux_codec_of_node;
8034 u32 wsa_max_devs;
8035 u32 wsa_dev_cnt;
8036 u32 codec_aux_dev_cnt = 0;
8037 int i;
8038 struct msm_wsa881x_dev_info *wsa881x_dev_info;
8039 struct aux_codec_dev_info *aux_cdc_dev_info;
8040 const char *auxdev_name_prefix[1];
8041 char *dev_name_str = NULL;
8042 int found = 0;
8043 int codecs_found = 0;
8044 int ret = 0;
8045
8046 /* Get maximum WSA device count for this platform */
8047 ret = of_property_read_u32(pdev->dev.of_node,
8048 "qcom,wsa-max-devs", &wsa_max_devs);
8049 if (ret) {
8050 dev_info(&pdev->dev,
8051 "%s: wsa-max-devs property missing in DT %s, ret = %d\n",
8052 __func__, pdev->dev.of_node->full_name, ret);
8053 wsa_max_devs = 0;
8054 goto codec_aux_dev;
8055 }
8056 if (wsa_max_devs == 0) {
8057 dev_warn(&pdev->dev,
8058 "%s: Max WSA devices is 0 for this target?\n",
8059 __func__);
8060 goto codec_aux_dev;
8061 }
8062
8063 /* Get count of WSA device phandles for this platform */
8064 wsa_dev_cnt = of_count_phandle_with_args(pdev->dev.of_node,
8065 "qcom,wsa-devs", NULL);
8066 if (wsa_dev_cnt == -ENOENT) {
8067 dev_warn(&pdev->dev, "%s: No wsa device defined in DT.\n",
8068 __func__);
8069 goto err;
8070 } else if (wsa_dev_cnt <= 0) {
8071 dev_err(&pdev->dev,
8072 "%s: Error reading wsa device from DT. wsa_dev_cnt = %d\n",
8073 __func__, wsa_dev_cnt);
8074 ret = -EINVAL;
8075 goto err;
8076 }
8077
8078 /*
8079 * Expect total phandles count to be NOT less than maximum possible
8080 * WSA count. However, if it is less, then assign same value to
8081 * max count as well.
8082 */
8083 if (wsa_dev_cnt < wsa_max_devs) {
8084 dev_dbg(&pdev->dev,
8085 "%s: wsa_max_devs = %d cannot exceed wsa_dev_cnt = %d\n",
8086 __func__, wsa_max_devs, wsa_dev_cnt);
8087 wsa_max_devs = wsa_dev_cnt;
8088 }
8089
8090 /* Make sure prefix string passed for each WSA device */
8091 ret = of_property_count_strings(pdev->dev.of_node,
8092 "qcom,wsa-aux-dev-prefix");
8093 if (ret != wsa_dev_cnt) {
8094 dev_err(&pdev->dev,
8095 "%s: expecting %d wsa prefix. Defined only %d in DT\n",
8096 __func__, wsa_dev_cnt, ret);
8097 ret = -EINVAL;
8098 goto err;
8099 }
8100
8101 /*
8102 * Alloc mem to store phandle and index info of WSA device, if already
8103 * registered with ALSA core
8104 */
8105 wsa881x_dev_info = devm_kcalloc(&pdev->dev, wsa_max_devs,
8106 sizeof(struct msm_wsa881x_dev_info),
8107 GFP_KERNEL);
8108 if (!wsa881x_dev_info) {
8109 ret = -ENOMEM;
8110 goto err;
8111 }
8112
8113 /*
8114 * search and check whether all WSA devices are already
8115 * registered with ALSA core or not. If found a node, store
8116 * the node and the index in a local array of struct for later
8117 * use.
8118 */
8119 for (i = 0; i < wsa_dev_cnt; i++) {
8120 wsa_of_node = of_parse_phandle(pdev->dev.of_node,
8121 "qcom,wsa-devs", i);
8122 if (unlikely(!wsa_of_node)) {
8123 /* we should not be here */
8124 dev_err(&pdev->dev,
8125 "%s: wsa dev node is not present\n",
8126 __func__);
8127 ret = -EINVAL;
8128 goto err;
8129 }
8130 if (soc_find_component(wsa_of_node, NULL)) {
8131 /* WSA device registered with ALSA core */
8132 wsa881x_dev_info[found].of_node = wsa_of_node;
8133 wsa881x_dev_info[found].index = i;
8134 found++;
8135 if (found == wsa_max_devs)
8136 break;
8137 }
8138 }
8139
8140 if (found < wsa_max_devs) {
8141 dev_dbg(&pdev->dev,
8142 "%s: failed to find %d components. Found only %d\n",
8143 __func__, wsa_max_devs, found);
8144 return -EPROBE_DEFER;
8145 }
8146 dev_info(&pdev->dev,
8147 "%s: found %d wsa881x devices registered with ALSA core\n",
8148 __func__, found);
8149
8150codec_aux_dev:
8151 if (strcmp(card->name, "sm6150-tavil-snd-card")) {
8152 /* Get count of aux codec device phandles for this platform */
8153 codec_aux_dev_cnt = of_count_phandle_with_args(
8154 pdev->dev.of_node,
8155 "qcom,codec-aux-devs", NULL);
8156 if (codec_aux_dev_cnt == -ENOENT) {
8157 dev_warn(&pdev->dev, "%s: No aux codec defined in DT.\n",
8158 __func__);
8159 goto err;
8160 } else if (codec_aux_dev_cnt <= 0) {
8161 dev_err(&pdev->dev,
8162 "%s: Error reading aux codec device from DT, dev_cnt=%d\n",
8163 __func__, codec_aux_dev_cnt);
8164 ret = -EINVAL;
8165 goto err;
8166 }
8167
8168 /*
8169 * Alloc mem to store phandle and index info of aux codec
8170 * if already registered with ALSA core
8171 */
8172 aux_cdc_dev_info = devm_kcalloc(&pdev->dev, codec_aux_dev_cnt,
8173 sizeof(struct aux_codec_dev_info),
8174 GFP_KERNEL);
8175 if (!aux_cdc_dev_info) {
8176 ret = -ENOMEM;
8177 goto err;
8178 }
8179
8180 /*
8181 * search and check whether all aux codecs are already
8182 * registered with ALSA core or not. If found a node, store
8183 * the node and the index in a local array of struct for later
8184 * use.
8185 */
8186 for (i = 0; i < codec_aux_dev_cnt; i++) {
8187 aux_codec_of_node = of_parse_phandle(pdev->dev.of_node,
8188 "qcom,codec-aux-devs", i);
8189 if (unlikely(!aux_codec_of_node)) {
8190 /* we should not be here */
8191 dev_err(&pdev->dev,
8192 "%s: aux codec dev node is not present\n",
8193 __func__);
8194 ret = -EINVAL;
8195 goto err;
8196 }
8197 if (soc_find_component(aux_codec_of_node, NULL)) {
8198 /* AUX codec registered with ALSA core */
8199 aux_cdc_dev_info[codecs_found].of_node =
8200 aux_codec_of_node;
8201 aux_cdc_dev_info[codecs_found].index = i;
8202 codecs_found++;
8203 }
8204 }
8205
8206 if (codecs_found < codec_aux_dev_cnt) {
8207 dev_dbg(&pdev->dev,
8208 "%s: failed to find %d components. Found only %d\n",
8209 __func__, codec_aux_dev_cnt, codecs_found);
8210 return -EPROBE_DEFER;
8211 }
8212 dev_info(&pdev->dev,
8213 "%s: found %d AUX codecs registered with ALSA core\n",
8214 __func__, codecs_found);
8215
8216 }
8217
8218 card->num_aux_devs = wsa_max_devs + codec_aux_dev_cnt;
8219 card->num_configs = wsa_max_devs + codec_aux_dev_cnt;
8220
8221 /* Alloc array of AUX devs struct */
8222 msm_aux_dev = devm_kcalloc(&pdev->dev, card->num_aux_devs,
8223 sizeof(struct snd_soc_aux_dev),
8224 GFP_KERNEL);
8225 if (!msm_aux_dev) {
8226 ret = -ENOMEM;
8227 goto err;
8228 }
8229
8230 /* Alloc array of codec conf struct */
8231 msm_codec_conf = devm_kcalloc(&pdev->dev, card->num_configs,
8232 sizeof(struct snd_soc_codec_conf),
8233 GFP_KERNEL);
8234 if (!msm_codec_conf) {
8235 ret = -ENOMEM;
8236 goto err;
8237 }
8238
8239 for (i = 0; i < wsa_max_devs; i++) {
8240 dev_name_str = devm_kzalloc(&pdev->dev, DEV_NAME_STR_LEN,
8241 GFP_KERNEL);
8242 if (!dev_name_str) {
8243 ret = -ENOMEM;
8244 goto err;
8245 }
8246
8247 ret = of_property_read_string_index(pdev->dev.of_node,
8248 "qcom,wsa-aux-dev-prefix",
8249 wsa881x_dev_info[i].index,
8250 auxdev_name_prefix);
8251 if (ret) {
8252 dev_err(&pdev->dev,
8253 "%s: failed to read wsa aux dev prefix, ret = %d\n",
8254 __func__, ret);
8255 ret = -EINVAL;
8256 goto err;
8257 }
8258
8259 snprintf(dev_name_str, strlen("wsa881x.%d"), "wsa881x.%d", i);
8260 msm_aux_dev[i].name = dev_name_str;
8261 msm_aux_dev[i].codec_name = NULL;
8262 msm_aux_dev[i].codec_of_node =
8263 wsa881x_dev_info[i].of_node;
8264 msm_aux_dev[i].init = msm_wsa881x_init;
8265 msm_codec_conf[i].dev_name = NULL;
8266 msm_codec_conf[i].name_prefix = auxdev_name_prefix[0];
8267 msm_codec_conf[i].of_node =
8268 wsa881x_dev_info[i].of_node;
8269 }
8270
8271 for (i = 0; i < codec_aux_dev_cnt; i++) {
8272 msm_aux_dev[wsa_max_devs + i].name = NULL;
8273 msm_aux_dev[wsa_max_devs + i].codec_name = NULL;
8274 msm_aux_dev[wsa_max_devs + i].codec_of_node =
8275 aux_cdc_dev_info[i].of_node;
8276 msm_aux_dev[wsa_max_devs + i].init = msm_aux_codec_init;
8277 msm_codec_conf[wsa_max_devs + i].dev_name = NULL;
8278 msm_codec_conf[wsa_max_devs + i].name_prefix =
8279 NULL;
8280 msm_codec_conf[wsa_max_devs + i].of_node =
8281 aux_cdc_dev_info[i].of_node;
8282 }
8283
8284 card->codec_conf = msm_codec_conf;
8285 card->aux_dev = msm_aux_dev;
8286err:
8287 return ret;
8288}
8289
8290static void msm_i2s_auxpcm_init(struct platform_device *pdev)
8291{
8292 int count;
8293 u32 mi2s_master_slave[MI2S_MAX];
8294 int ret;
8295
8296 for (count = 0; count < MI2S_MAX; count++) {
8297 mutex_init(&mi2s_intf_conf[count].lock);
8298 mi2s_intf_conf[count].ref_cnt = 0;
8299 }
8300
8301 ret = of_property_read_u32_array(pdev->dev.of_node,
8302 "qcom,msm-mi2s-master",
8303 mi2s_master_slave, MI2S_MAX);
8304 if (ret) {
8305 dev_dbg(&pdev->dev, "%s: no qcom,msm-mi2s-master in DT node\n",
8306 __func__);
8307 } else {
8308 for (count = 0; count < MI2S_MAX; count++) {
8309 mi2s_intf_conf[count].msm_is_mi2s_master =
8310 mi2s_master_slave[count];
8311 }
8312 }
8313}
8314
8315static void msm_i2s_auxpcm_deinit(void)
8316{
8317 int count;
8318
8319 for (count = 0; count < MI2S_MAX; count++) {
8320 mutex_destroy(&mi2s_intf_conf[count].lock);
8321 mi2s_intf_conf[count].ref_cnt = 0;
8322 mi2s_intf_conf[count].msm_is_mi2s_master = 0;
8323 }
8324}
Vaishnavi Kommaraju9a3d5eb2018-09-19 18:16:39 +05308325
8326static int sm6150_ssr_enable(struct device *dev, void *data)
8327{
8328 struct platform_device *pdev = to_platform_device(dev);
8329 struct snd_soc_card *card = platform_get_drvdata(pdev);
8330 struct msm_asoc_mach_data *pdata;
8331 int ret = 0;
8332
8333 if (!card) {
8334 dev_err(dev, "%s: card is NULL\n", __func__);
8335 ret = -EINVAL;
8336 goto err;
8337 }
8338
8339 if (!strcmp(card->name, "sm6150-tavil-snd-card")) {
8340 pdata = snd_soc_card_get_drvdata(card);
8341 if (!pdata->is_afe_config_done) {
8342 const char *be_dl_name = LPASS_BE_SLIMBUS_0_RX;
8343 struct snd_soc_pcm_runtime *rtd;
8344
8345 rtd = snd_soc_get_pcm_runtime(card, be_dl_name);
8346 if (!rtd) {
8347 dev_err(dev,
8348 "%s: snd_soc_get_pcm_runtime for %s failed!\n",
8349 __func__, be_dl_name);
8350 ret = -EINVAL;
8351 goto err;
8352 }
8353 ret = msm_afe_set_config(rtd->codec);
8354 if (ret)
8355 dev_err(dev, "%s: Failed to set AFE config. err %d\n",
8356 __func__, ret);
8357 else
8358 pdata->is_afe_config_done = true;
8359 }
8360 }
8361 snd_soc_card_change_online_state(card, 1);
8362 dev_dbg(dev, "%s: setting snd_card to ONLINE\n", __func__);
8363
8364err:
8365 return ret;
8366}
8367
8368static void sm6150_ssr_disable(struct device *dev, void *data)
8369{
8370 struct platform_device *pdev = to_platform_device(dev);
8371 struct snd_soc_card *card = platform_get_drvdata(pdev);
8372 struct msm_asoc_mach_data *pdata;
8373
8374 if (!card) {
8375 dev_err(dev, "%s: card is NULL\n", __func__);
8376 return;
8377 }
8378
8379 dev_dbg(dev, "%s: setting snd_card to OFFLINE\n", __func__);
8380 snd_soc_card_change_online_state(card, 0);
8381
8382 if (!strcmp(card->name, "sm6150-tavil-snd-card")) {
8383 pdata = snd_soc_card_get_drvdata(card);
8384 msm_afe_clear_config();
8385 pdata->is_afe_config_done = false;
8386 }
8387}
8388
8389static const struct snd_event_ops sm6150_ssr_ops = {
8390 .enable = sm6150_ssr_enable,
8391 .disable = sm6150_ssr_disable,
8392};
8393
8394static int msm_audio_ssr_compare(struct device *dev, void *data)
8395{
8396 struct device_node *node = data;
8397
8398 dev_dbg(dev, "%s: dev->of_node = 0x%p, node = 0x%p\n",
8399 __func__, dev->of_node, node);
8400 return (dev->of_node && dev->of_node == node);
8401}
8402
8403static int msm_audio_ssr_register(struct device *dev)
8404{
8405 struct device_node *np = dev->of_node;
8406 struct snd_event_clients *ssr_clients = NULL;
8407 struct device_node *node;
8408 int ret;
8409 int i;
8410
8411 for (i = 0; ; i++) {
8412 node = of_parse_phandle(np, "qcom,msm_audio_ssr_devs", i);
8413 if (!node)
8414 break;
8415 snd_event_mstr_add_client(&ssr_clients,
8416 msm_audio_ssr_compare, node);
8417 }
8418
8419 ret = snd_event_master_register(dev, &sm6150_ssr_ops,
8420 ssr_clients, NULL);
8421 if (!ret)
8422 snd_event_notify(dev, SND_EVENT_UP);
8423
8424 return ret;
8425}
8426
Aditya Bavanari44eb8952018-05-09 19:01:50 +05308427static int msm_asoc_machine_probe(struct platform_device *pdev)
8428{
8429 struct snd_soc_card *card;
8430 struct msm_asoc_mach_data *pdata;
8431 const char *mbhc_audio_jack_type = NULL;
8432 int ret;
8433
8434 if (!pdev->dev.of_node) {
8435 dev_err(&pdev->dev, "No platform supplied from device tree\n");
8436 return -EINVAL;
8437 }
8438
8439 pdata = devm_kzalloc(&pdev->dev,
8440 sizeof(struct msm_asoc_mach_data), GFP_KERNEL);
8441 if (!pdata)
8442 return -ENOMEM;
8443
8444 card = populate_snd_card_dailinks(&pdev->dev);
8445 if (!card) {
8446 dev_err(&pdev->dev, "%s: Card uninitialized\n", __func__);
8447 ret = -EINVAL;
8448 goto err;
8449 }
8450 card->dev = &pdev->dev;
8451 platform_set_drvdata(pdev, card);
8452 snd_soc_card_set_drvdata(card, pdata);
8453
8454 ret = snd_soc_of_parse_card_name(card, "qcom,model");
8455 if (ret) {
8456 dev_err(&pdev->dev, "parse card name failed, err:%d\n",
8457 ret);
8458 goto err;
8459 }
8460
8461 ret = snd_soc_of_parse_audio_routing(card, "qcom,audio-routing");
8462 if (ret) {
8463 dev_err(&pdev->dev, "parse audio routing failed, err:%d\n",
8464 ret);
8465 goto err;
8466 }
8467
8468 ret = msm_populate_dai_link_component_of_node(card);
8469 if (ret) {
8470 ret = -EPROBE_DEFER;
8471 goto err;
8472 }
8473
8474 ret = msm_init_aux_dev(pdev, card);
8475 if (ret)
8476 goto err;
8477
8478 ret = devm_snd_soc_register_card(&pdev->dev, card);
8479 if (ret == -EPROBE_DEFER) {
8480 if (codec_reg_done)
8481 ret = -EINVAL;
8482 goto err;
8483 } else if (ret) {
8484 dev_err(&pdev->dev, "snd_soc_register_card failed (%d)\n",
8485 ret);
8486 goto err;
8487 }
8488 dev_info(&pdev->dev, "Sound card %s registered\n", card->name);
Aditya Bavanari44eb8952018-05-09 19:01:50 +05308489
8490 pdata->hph_en1_gpio_p = of_parse_phandle(pdev->dev.of_node,
8491 "qcom,hph-en1-gpio", 0);
8492 if (!pdata->hph_en1_gpio_p) {
8493 dev_dbg(&pdev->dev, "property %s not detected in node %s\n",
8494 "qcom,hph-en1-gpio",
8495 pdev->dev.of_node->full_name);
8496 }
8497
8498 pdata->hph_en0_gpio_p = of_parse_phandle(pdev->dev.of_node,
8499 "qcom,hph-en0-gpio", 0);
8500 if (!pdata->hph_en0_gpio_p) {
8501 dev_dbg(&pdev->dev, "property %s not detected in node %s\n",
8502 "qcom,hph-en0-gpio",
8503 pdev->dev.of_node->full_name);
8504 }
8505
8506 ret = of_property_read_string(pdev->dev.of_node,
8507 "qcom,mbhc-audio-jack-type", &mbhc_audio_jack_type);
8508 if (ret) {
8509 dev_dbg(&pdev->dev, "Looking up %s property in node %s failed\n",
8510 "qcom,mbhc-audio-jack-type",
8511 pdev->dev.of_node->full_name);
8512 dev_dbg(&pdev->dev, "Jack type properties set to default\n");
8513 } else {
8514 if (!strcmp(mbhc_audio_jack_type, "4-pole-jack")) {
8515 wcd_mbhc_cfg.enable_anc_mic_detect = false;
8516 dev_dbg(&pdev->dev, "This hardware has 4 pole jack");
8517 } else if (!strcmp(mbhc_audio_jack_type, "5-pole-jack")) {
8518 wcd_mbhc_cfg.enable_anc_mic_detect = true;
8519 dev_dbg(&pdev->dev, "This hardware has 5 pole jack");
8520 } else if (!strcmp(mbhc_audio_jack_type, "6-pole-jack")) {
8521 wcd_mbhc_cfg.enable_anc_mic_detect = true;
8522 dev_dbg(&pdev->dev, "This hardware has 6 pole jack");
8523 } else {
8524 wcd_mbhc_cfg.enable_anc_mic_detect = false;
8525 dev_dbg(&pdev->dev, "Unknown value, set to default\n");
8526 }
8527 }
8528 /*
8529 * Parse US-Euro gpio info from DT. Report no error if us-euro
8530 * entry is not found in DT file as some targets do not support
8531 * US-Euro detection
8532 */
8533 pdata->us_euro_gpio_p = of_parse_phandle(pdev->dev.of_node,
8534 "qcom,us-euro-gpios", 0);
8535 if (!pdata->us_euro_gpio_p) {
8536 dev_dbg(&pdev->dev, "property %s not detected in node %s",
8537 "qcom,us-euro-gpios", pdev->dev.of_node->full_name);
8538 } else {
8539 dev_dbg(&pdev->dev, "%s detected\n",
8540 "qcom,us-euro-gpios");
8541 wcd_mbhc_cfg.swap_gnd_mic = msm_swap_gnd_mic;
8542 }
Vatsal Bucha6cb17a02018-08-07 11:07:04 +05308543
8544 if (wcd_mbhc_cfg.enable_usbc_analog) {
8545 wcd_mbhc_cfg.swap_gnd_mic = msm_usbc_swap_gnd_mic;
8546
8547 pdata->fsa_handle = of_parse_phandle(pdev->dev.of_node,
8548 "fsa4480-i2c-handle", 0);
8549 if (!pdata->fsa_handle)
8550 dev_err(&pdev->dev,
8551 "property %s not detected in node %s\n",
8552 "fsa4480-i2c-handle",
8553 pdev->dev.of_node->full_name);
8554 }
Aditya Bavanari44eb8952018-05-09 19:01:50 +05308555 /* Parse pinctrl info from devicetree */
8556 ret = msm_get_pinctrl(pdev);
8557 if (!ret) {
8558 pr_debug("%s: pinctrl parsing successful\n", __func__);
8559 } else {
8560 dev_dbg(&pdev->dev,
8561 "%s: Parsing pinctrl failed with %d. Cannot use Ports\n",
8562 __func__, ret);
8563 ret = 0;
8564 }
8565
8566 msm_i2s_auxpcm_init(pdev);
Vaishnavi Kommaraju9a3d5eb2018-09-19 18:16:39 +05308567 if (strcmp(card->name, "sm6150-tavil-snd-card")) {
Aditya Bavanari44eb8952018-05-09 19:01:50 +05308568 pdata->dmic01_gpio_p = of_parse_phandle(pdev->dev.of_node,
8569 "qcom,cdc-dmic01-gpios",
8570 0);
8571 pdata->dmic23_gpio_p = of_parse_phandle(pdev->dev.of_node,
8572 "qcom,cdc-dmic23-gpios",
8573 0);
8574 }
Vaishnavi Kommaraju9a3d5eb2018-09-19 18:16:39 +05308575
8576 ret = msm_audio_ssr_register(&pdev->dev);
8577 if (ret)
8578 pr_err("%s: Registration with SND event FWK failed ret = %d\n",
8579 __func__, ret);
8580
Aditya Bavanari44eb8952018-05-09 19:01:50 +05308581err:
8582 return ret;
8583}
8584
8585static int msm_asoc_machine_remove(struct platform_device *pdev)
8586{
Vaishnavi Kommaraju9a3d5eb2018-09-19 18:16:39 +05308587 snd_event_master_deregister(&pdev->dev);
Aditya Bavanari44eb8952018-05-09 19:01:50 +05308588 msm_i2s_auxpcm_deinit();
8589
8590 return 0;
8591}
8592
8593static struct platform_driver sm6150_asoc_machine_driver = {
8594 .driver = {
8595 .name = DRV_NAME,
8596 .owner = THIS_MODULE,
8597 .pm = &snd_soc_pm_ops,
8598 .of_match_table = sm6150_asoc_machine_of_match,
8599 },
8600 .probe = msm_asoc_machine_probe,
8601 .remove = msm_asoc_machine_remove,
8602};
8603module_platform_driver(sm6150_asoc_machine_driver);
8604
Aditya Bavanari0b26ab32018-08-03 23:53:01 +05308605MODULE_DESCRIPTION("ALSA SoC SM6150 Machine driver");
Aditya Bavanari44eb8952018-05-09 19:01:50 +05308606MODULE_LICENSE("GPL v2");
8607MODULE_ALIAS("platform:" DRV_NAME);
8608MODULE_DEVICE_TABLE(of, sm6150_asoc_machine_of_match);