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gerrit-public.fairphone.software / platform / vendor / opensource / audio-kernel / 43bbb876521759e6bc15d12acf2326dba8f946dc / . / asoc / sm6150.c
blob: e2277a27eca4113d4f24b4cf67e0836577864e9d [file] [log] [blame]
Meng Wang43bbb872018-12-10 12:32:05 +0800[diff] [blame^]1// SPDX-License-Identifier: GPL-2.0-only
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]2/*
3 * Copyright (c) 2018, The Linux Foundation. All rights reserved.
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]4 */
5
6#include <linux/clk.h>
7#include <linux/delay.h>
8#include <linux/gpio.h>
9#include <linux/of_gpio.h>
10#include <linux/platform_device.h>
11#include <linux/slab.h>
12#include <linux/io.h>
13#include <linux/module.h>
14#include <linux/input.h>
15#include <linux/of_device.h>
16#include <linux/pm_qos.h>
Vatsal Bucha6cb17a02018-08-07 11:07:04 +0530[diff] [blame]17#include <linux/soc/qcom/fsa4480-i2c.h>
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]18#include <sound/core.h>
19#include <sound/soc.h>
20#include <sound/soc-dapm.h>
21#include <sound/pcm.h>
22#include <sound/pcm_params.h>
23#include <sound/info.h>
Vaishnavi Kommaraju9a3d5eb2018-09-19 18:16:39 +0530[diff] [blame]24#include <soc/snd_event.h>
Aditya Bavanari3e19f3c2018-11-12 19:29:50 +0530[diff] [blame]25#include <soc/qcom/socinfo.h>
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]26#include <dsp/q6afe-v2.h>
27#include <dsp/q6core.h>
28#include "device_event.h"
29#include "msm-pcm-routing-v2.h"
30#include "codecs/msm-cdc-pinctrl.h"
31#include "codecs/wcd934x/wcd934x.h"
32#include "codecs/wcd934x/wcd934x-mbhc.h"
Ramprasad Katkam997da402018-08-17 20:20:06 +0530[diff] [blame]33#include "codecs/wcd937x/wcd937x-mbhc.h"
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]34#include "codecs/wsa881x.h"
35#include "codecs/bolero/bolero-cdc.h"
36#include <dt-bindings/sound/audio-codec-port-types.h>
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]37#include "codecs/bolero/wsa-macro.h"
Laxminath Kasam838f0b82018-10-23 20:20:18 +0530[diff] [blame]38#include "codecs/wcd937x/wcd937x.h"
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]39
40#define DRV_NAME "sm6150-asoc-snd"
41
42#define __CHIPSET__ "SM6150 "
43#define MSM_DAILINK_NAME(name) (__CHIPSET__#name)
44
45#define SAMPLING_RATE_8KHZ 8000
46#define SAMPLING_RATE_11P025KHZ 11025
47#define SAMPLING_RATE_16KHZ 16000
48#define SAMPLING_RATE_22P05KHZ 22050
49#define SAMPLING_RATE_32KHZ 32000
50#define SAMPLING_RATE_44P1KHZ 44100
51#define SAMPLING_RATE_48KHZ 48000
52#define SAMPLING_RATE_88P2KHZ 88200
53#define SAMPLING_RATE_96KHZ 96000
54#define SAMPLING_RATE_176P4KHZ 176400
55#define SAMPLING_RATE_192KHZ 192000
56#define SAMPLING_RATE_352P8KHZ 352800
57#define SAMPLING_RATE_384KHZ 384000
58
59#define WCD9XXX_MBHC_DEF_BUTTONS 8
60#define WCD9XXX_MBHC_DEF_RLOADS 5
61#define CODEC_EXT_CLK_RATE 9600000
62#define ADSP_STATE_READY_TIMEOUT_MS 3000
63#define DEV_NAME_STR_LEN 32
64
65#define WSA8810_NAME_1 "wsa881x.20170211"
66#define WSA8810_NAME_2 "wsa881x.20170212"
67#define WCN_CDC_SLIM_RX_CH_MAX 2
68#define WCN_CDC_SLIM_TX_CH_MAX 3
69#define TDM_CHANNEL_MAX 8
70
71#define ADSP_STATE_READY_TIMEOUT_MS 3000
72#define MSM_LL_QOS_VALUE 300 /* time in us to ensure LPM doesn't go in C3/C4 */
73#define MSM_HIFI_ON 1
74
Aditya Bavanari3e19f3c2018-11-12 19:29:50 +0530[diff] [blame]75#define SM6150_SOC_VERSION_1_0 0x00010000
76#define SM6150_SOC_MSM_ID 0x163
77
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]78enum {
79 SLIM_RX_0 = 0,
80 SLIM_RX_1,
81 SLIM_RX_2,
82 SLIM_RX_3,
83 SLIM_RX_4,
84 SLIM_RX_5,
85 SLIM_RX_6,
86 SLIM_RX_7,
87 SLIM_RX_MAX,
88};
89enum {
90 SLIM_TX_0 = 0,
91 SLIM_TX_1,
92 SLIM_TX_2,
93 SLIM_TX_3,
94 SLIM_TX_4,
95 SLIM_TX_5,
96 SLIM_TX_6,
97 SLIM_TX_7,
98 SLIM_TX_8,
99 SLIM_TX_MAX,
100};
101
102enum {
103 PRIM_MI2S = 0,
104 SEC_MI2S,
105 TERT_MI2S,
106 QUAT_MI2S,
107 QUIN_MI2S,
108 MI2S_MAX,
109};
110
111enum {
112 PRIM_AUX_PCM = 0,
113 SEC_AUX_PCM,
114 TERT_AUX_PCM,
115 QUAT_AUX_PCM,
116 QUIN_AUX_PCM,
117 AUX_PCM_MAX,
118};
119
120enum {
121 WSA_CDC_DMA_RX_0 = 0,
122 WSA_CDC_DMA_RX_1,
123 RX_CDC_DMA_RX_0,
124 RX_CDC_DMA_RX_1,
125 RX_CDC_DMA_RX_2,
126 RX_CDC_DMA_RX_3,
127 RX_CDC_DMA_RX_5,
128 CDC_DMA_RX_MAX,
129};
130
131enum {
132 WSA_CDC_DMA_TX_0 = 0,
133 WSA_CDC_DMA_TX_1,
134 WSA_CDC_DMA_TX_2,
135 TX_CDC_DMA_TX_0,
136 TX_CDC_DMA_TX_3,
137 TX_CDC_DMA_TX_4,
138 CDC_DMA_TX_MAX,
139};
140
141struct mi2s_conf {
142 struct mutex lock;
143 u32 ref_cnt;
144 u32 msm_is_mi2s_master;
145};
146
147static u32 mi2s_ebit_clk[MI2S_MAX] = {
148 Q6AFE_LPASS_CLK_ID_PRI_MI2S_EBIT,
149 Q6AFE_LPASS_CLK_ID_SEC_MI2S_EBIT,
150 Q6AFE_LPASS_CLK_ID_TER_MI2S_EBIT,
151 Q6AFE_LPASS_CLK_ID_QUAD_MI2S_EBIT,
152 Q6AFE_LPASS_CLK_ID_QUI_MI2S_EBIT
153};
154
155struct dev_config {
156 u32 sample_rate;
157 u32 bit_format;
158 u32 channels;
159};
160
161enum {
162 DP_RX_IDX = 0,
163 EXT_DISP_RX_IDX_MAX,
164};
165
166struct msm_wsa881x_dev_info {
167 struct device_node *of_node;
168 u32 index;
169};
170
171struct aux_codec_dev_info {
172 struct device_node *of_node;
173 u32 index;
174};
175
176enum pinctrl_pin_state {
177 STATE_DISABLE = 0, /* All pins are in sleep state */
178 STATE_MI2S_ACTIVE, /* I2S = active, TDM = sleep */
179 STATE_TDM_ACTIVE, /* I2S = sleep, TDM = active */
180};
181
182struct msm_pinctrl_info {
183 struct pinctrl *pinctrl;
184 struct pinctrl_state *mi2s_disable;
185 struct pinctrl_state *tdm_disable;
186 struct pinctrl_state *mi2s_active;
187 struct pinctrl_state *tdm_active;
188 enum pinctrl_pin_state curr_state;
189};
190
191struct msm_asoc_mach_data {
192 struct snd_info_entry *codec_root;
193 struct msm_pinctrl_info pinctrl_info;
194 int usbc_en2_gpio; /* used by gpio driver API */
195 struct device_node *dmic01_gpio_p; /* used by pinctrl API */
196 struct device_node *dmic23_gpio_p; /* used by pinctrl API */
197 struct device_node *us_euro_gpio_p; /* used by pinctrl API */
198 struct pinctrl *usbc_en2_gpio_p; /* used by pinctrl API */
199 struct device_node *hph_en1_gpio_p; /* used by pinctrl API */
200 struct device_node *hph_en0_gpio_p; /* used by pinctrl API */
Vaishnavi Kommaraju9a3d5eb2018-09-19 18:16:39 +0530[diff] [blame]201 bool is_afe_config_done;
Vatsal Bucha6cb17a02018-08-07 11:07:04 +0530[diff] [blame]202 struct device_node *fsa_handle;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]203};
204
205struct msm_asoc_wcd93xx_codec {
206 void* (*get_afe_config_fn)(struct snd_soc_codec *codec,
207 enum afe_config_type config_type);
208};
209
210static const char *const pin_states[] = {"sleep", "i2s-active",
211 "tdm-active"};
212
213static struct snd_soc_card snd_soc_card_sm6150_msm;
214
215enum {
216 TDM_0 = 0,
217 TDM_1,
218 TDM_2,
219 TDM_3,
220 TDM_4,
221 TDM_5,
222 TDM_6,
223 TDM_7,
224 TDM_PORT_MAX,
225};
226
227enum {
228 TDM_PRI = 0,
229 TDM_SEC,
230 TDM_TERT,
231 TDM_QUAT,
232 TDM_QUIN,
233 TDM_INTERFACE_MAX,
234};
235
236struct tdm_port {
237 u32 mode;
238 u32 channel;
239};
240
241/* TDM default config */
242static struct dev_config tdm_rx_cfg[TDM_INTERFACE_MAX][TDM_PORT_MAX] = {
243 { /* PRI TDM */
244 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
245 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
246 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
247 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
248 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
249 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
250 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
251 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
252 },
253 { /* SEC TDM */
254 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
255 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
256 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
257 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
258 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
259 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
260 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
261 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
262 },
263 { /* TERT TDM */
264 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
265 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
266 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
267 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
268 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
269 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
270 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
271 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
272 },
273 { /* QUAT TDM */
274 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
275 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
276 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
277 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
278 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
279 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
280 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
281 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
282 },
283 { /* QUIN TDM */
284 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
285 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
286 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
287 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
288 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
289 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
290 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
291 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
292 }
293
294};
295
296/* TDM default config */
297static struct dev_config tdm_tx_cfg[TDM_INTERFACE_MAX][TDM_PORT_MAX] = {
298 { /* PRI TDM */
299 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
300 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
301 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
302 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
303 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
304 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
305 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
306 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
307 },
308 { /* SEC TDM */
309 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
310 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
311 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
312 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
313 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
314 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
315 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
316 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
317 },
318 { /* TERT TDM */
319 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
320 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
321 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
322 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
323 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
324 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
325 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
326 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
327 },
328 { /* QUAT TDM */
329 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
330 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
331 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
332 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
333 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
334 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
335 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
336 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
337 },
338 { /* QUIN TDM */
339 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
340 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
341 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
342 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
343 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
344 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
345 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
346 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
347 }
348};
349
350
351/* Default configuration of slimbus channels */
352static struct dev_config slim_rx_cfg[] = {
353 [SLIM_RX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
354 [SLIM_RX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
355 [SLIM_RX_2] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
356 [SLIM_RX_3] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
357 [SLIM_RX_4] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
358 [SLIM_RX_5] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
359 [SLIM_RX_6] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
360 [SLIM_RX_7] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
361};
362
363static struct dev_config slim_tx_cfg[] = {
364 [SLIM_TX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
365 [SLIM_TX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
366 [SLIM_TX_2] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
367 [SLIM_TX_3] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
368 [SLIM_TX_4] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
369 [SLIM_TX_5] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
370 [SLIM_TX_6] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
371 [SLIM_TX_7] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
372 [SLIM_TX_8] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
373};
374
375/* Default configuration of Codec DMA Interface Tx */
376static struct dev_config cdc_dma_rx_cfg[] = {
377 [WSA_CDC_DMA_RX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
378 [WSA_CDC_DMA_RX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
379 [RX_CDC_DMA_RX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
380 [RX_CDC_DMA_RX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
381 [RX_CDC_DMA_RX_2] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
382 [RX_CDC_DMA_RX_3] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
383 [RX_CDC_DMA_RX_5] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
384};
385
386/* Default configuration of Codec DMA Interface Rx */
387static struct dev_config cdc_dma_tx_cfg[] = {
388 [WSA_CDC_DMA_TX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
389 [WSA_CDC_DMA_TX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
390 [WSA_CDC_DMA_TX_2] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
391 [TX_CDC_DMA_TX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
392 [TX_CDC_DMA_TX_3] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
393 [TX_CDC_DMA_TX_4] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
394};
395
396/* Default configuration of external display BE */
397static struct dev_config ext_disp_rx_cfg[] = {
398 [DP_RX_IDX] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
399};
400
401static struct dev_config usb_rx_cfg = {
402 .sample_rate = SAMPLING_RATE_48KHZ,
403 .bit_format = SNDRV_PCM_FORMAT_S16_LE,
404 .channels = 2,
405};
406
407static struct dev_config usb_tx_cfg = {
408 .sample_rate = SAMPLING_RATE_48KHZ,
409 .bit_format = SNDRV_PCM_FORMAT_S16_LE,
410 .channels = 1,
411};
412
413static struct dev_config proxy_rx_cfg = {
414 .sample_rate = SAMPLING_RATE_48KHZ,
415 .bit_format = SNDRV_PCM_FORMAT_S16_LE,
416 .channels = 2,
417};
418
419/* Default configuration of MI2S channels */
420static struct dev_config mi2s_rx_cfg[] = {
421 [PRIM_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
422 [SEC_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
423 [TERT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
424 [QUAT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
425 [QUIN_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
426};
427
428static struct dev_config mi2s_tx_cfg[] = {
429 [PRIM_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
430 [SEC_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
431 [TERT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
432 [QUAT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
433 [QUIN_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
434};
435
436static struct dev_config aux_pcm_rx_cfg[] = {
437 [PRIM_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
438 [SEC_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
439 [TERT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
440 [QUAT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
441 [QUIN_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
442};
443
444static struct dev_config aux_pcm_tx_cfg[] = {
445 [PRIM_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
446 [SEC_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
447 [TERT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
448 [QUAT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
449 [QUIN_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
450};
451static int msm_vi_feed_tx_ch = 2;
452static const char *const slim_rx_ch_text[] = {"One", "Two"};
453static const char *const slim_tx_ch_text[] = {"One", "Two", "Three", "Four",
454 "Five", "Six", "Seven",
455 "Eight"};
456static const char *const vi_feed_ch_text[] = {"One", "Two"};
457static char const *bit_format_text[] = {"S16_LE", "S24_LE", "S24_3LE",
458 "S32_LE"};
459static char const *ext_disp_bit_format_text[] = {"S16_LE", "S24_LE",
460 "S24_3LE"};
461static char const *slim_sample_rate_text[] = {"KHZ_8", "KHZ_16",
462 "KHZ_32", "KHZ_44P1", "KHZ_48",
463 "KHZ_88P2", "KHZ_96", "KHZ_176P4",
464 "KHZ_192", "KHZ_352P8", "KHZ_384"};
465static char const *bt_sample_rate_text[] = {"KHZ_8", "KHZ_16",
466 "KHZ_44P1", "KHZ_48",
467 "KHZ_88P2", "KHZ_96"};
Sharad Sangle493a1b32018-09-19 15:52:15 +0530[diff] [blame]468static char const *bt_sample_rate_rx_text[] = {"KHZ_8", "KHZ_16",
469 "KHZ_44P1", "KHZ_48",
470 "KHZ_88P2", "KHZ_96"};
471static char const *bt_sample_rate_tx_text[] = {"KHZ_8", "KHZ_16",
472 "KHZ_44P1", "KHZ_48",
473 "KHZ_88P2", "KHZ_96"};
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]474static const char *const usb_ch_text[] = {"One", "Two", "Three", "Four",
475 "Five", "Six", "Seven",
476 "Eight"};
477static char const *ch_text[] = {"Two", "Three", "Four", "Five",
478 "Six", "Seven", "Eight"};
479static char const *usb_sample_rate_text[] = {"KHZ_8", "KHZ_11P025",
480 "KHZ_16", "KHZ_22P05",
481 "KHZ_32", "KHZ_44P1", "KHZ_48",
482 "KHZ_88P2", "KHZ_96", "KHZ_176P4",
483 "KHZ_192", "KHZ_352P8", "KHZ_384"};
484static char const *ext_disp_sample_rate_text[] = {"KHZ_48", "KHZ_96",
485 "KHZ_192", "KHZ_32", "KHZ_44P1",
486 "KHZ_88P2", "KHZ_176P4" };
487static char const *tdm_ch_text[] = {"One", "Two", "Three", "Four",
488 "Five", "Six", "Seven", "Eight"};
489static char const *tdm_bit_format_text[] = {"S16_LE", "S24_LE", "S32_LE"};
490static char const *tdm_sample_rate_text[] = {"KHZ_8", "KHZ_16", "KHZ_32",
491 "KHZ_48", "KHZ_176P4",
492 "KHZ_352P8"};
493static const char *const auxpcm_rate_text[] = {"KHZ_8", "KHZ_16"};
494static char const *mi2s_rate_text[] = {"KHZ_8", "KHZ_11P025", "KHZ_16",
495 "KHZ_22P05", "KHZ_32", "KHZ_44P1",
496 "KHZ_48", "KHZ_96", "KHZ_192"};
497static const char *const mi2s_ch_text[] = {"One", "Two", "Three", "Four",
498 "Five", "Six", "Seven",
499 "Eight"};
500static const char *const hifi_text[] = {"Off", "On"};
501static const char *const qos_text[] = {"Disable", "Enable"};
502
503static const char *const cdc_dma_rx_ch_text[] = {"One", "Two"};
504static const char *const cdc_dma_tx_ch_text[] = {"One", "Two", "Three", "Four",
505 "Five", "Six", "Seven",
506 "Eight"};
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]507static char const *cdc_dma_sample_rate_text[] = {"KHZ_8", "KHZ_11P025",
508 "KHZ_16", "KHZ_22P05",
509 "KHZ_32", "KHZ_44P1", "KHZ_48",
510 "KHZ_88P2", "KHZ_96",
511 "KHZ_176P4", "KHZ_192",
512 "KHZ_352P8", "KHZ_384"};
513
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]514
515static SOC_ENUM_SINGLE_EXT_DECL(slim_0_rx_chs, slim_rx_ch_text);
516static SOC_ENUM_SINGLE_EXT_DECL(slim_2_rx_chs, slim_rx_ch_text);
517static SOC_ENUM_SINGLE_EXT_DECL(slim_0_tx_chs, slim_tx_ch_text);
518static SOC_ENUM_SINGLE_EXT_DECL(slim_1_tx_chs, slim_tx_ch_text);
519static SOC_ENUM_SINGLE_EXT_DECL(slim_5_rx_chs, slim_rx_ch_text);
520static SOC_ENUM_SINGLE_EXT_DECL(slim_6_rx_chs, slim_rx_ch_text);
521static SOC_ENUM_SINGLE_EXT_DECL(usb_rx_chs, usb_ch_text);
522static SOC_ENUM_SINGLE_EXT_DECL(usb_tx_chs, usb_ch_text);
523static SOC_ENUM_SINGLE_EXT_DECL(vi_feed_tx_chs, vi_feed_ch_text);
524static SOC_ENUM_SINGLE_EXT_DECL(ext_disp_rx_chs, ch_text);
525static SOC_ENUM_SINGLE_EXT_DECL(proxy_rx_chs, ch_text);
526static SOC_ENUM_SINGLE_EXT_DECL(slim_0_rx_format, bit_format_text);
527static SOC_ENUM_SINGLE_EXT_DECL(slim_5_rx_format, bit_format_text);
528static SOC_ENUM_SINGLE_EXT_DECL(slim_6_rx_format, bit_format_text);
529static SOC_ENUM_SINGLE_EXT_DECL(slim_0_tx_format, bit_format_text);
530static SOC_ENUM_SINGLE_EXT_DECL(usb_rx_format, bit_format_text);
531static SOC_ENUM_SINGLE_EXT_DECL(usb_tx_format, bit_format_text);
532static SOC_ENUM_SINGLE_EXT_DECL(ext_disp_rx_format, ext_disp_bit_format_text);
533static SOC_ENUM_SINGLE_EXT_DECL(slim_0_rx_sample_rate, slim_sample_rate_text);
534static SOC_ENUM_SINGLE_EXT_DECL(slim_2_rx_sample_rate, slim_sample_rate_text);
535static SOC_ENUM_SINGLE_EXT_DECL(slim_0_tx_sample_rate, slim_sample_rate_text);
536static SOC_ENUM_SINGLE_EXT_DECL(slim_5_rx_sample_rate, slim_sample_rate_text);
537static SOC_ENUM_SINGLE_EXT_DECL(slim_6_rx_sample_rate, slim_sample_rate_text);
538static SOC_ENUM_SINGLE_EXT_DECL(bt_sample_rate, bt_sample_rate_text);
Sharad Sangle493a1b32018-09-19 15:52:15 +0530[diff] [blame]539static SOC_ENUM_SINGLE_EXT_DECL(bt_sample_rate_rx, bt_sample_rate_rx_text);
540static SOC_ENUM_SINGLE_EXT_DECL(bt_sample_rate_tx, bt_sample_rate_tx_text);
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]541static SOC_ENUM_SINGLE_EXT_DECL(usb_rx_sample_rate, usb_sample_rate_text);
542static SOC_ENUM_SINGLE_EXT_DECL(usb_tx_sample_rate, usb_sample_rate_text);
543static SOC_ENUM_SINGLE_EXT_DECL(ext_disp_rx_sample_rate,
544 ext_disp_sample_rate_text);
545static SOC_ENUM_SINGLE_EXT_DECL(tdm_tx_chs, tdm_ch_text);
546static SOC_ENUM_SINGLE_EXT_DECL(tdm_tx_format, tdm_bit_format_text);
547static SOC_ENUM_SINGLE_EXT_DECL(tdm_tx_sample_rate, tdm_sample_rate_text);
548static SOC_ENUM_SINGLE_EXT_DECL(tdm_rx_chs, tdm_ch_text);
549static SOC_ENUM_SINGLE_EXT_DECL(tdm_rx_format, tdm_bit_format_text);
550static SOC_ENUM_SINGLE_EXT_DECL(tdm_rx_sample_rate, tdm_sample_rate_text);
551static SOC_ENUM_SINGLE_EXT_DECL(prim_aux_pcm_rx_sample_rate, auxpcm_rate_text);
552static SOC_ENUM_SINGLE_EXT_DECL(sec_aux_pcm_rx_sample_rate, auxpcm_rate_text);
553static SOC_ENUM_SINGLE_EXT_DECL(tert_aux_pcm_rx_sample_rate, auxpcm_rate_text);
554static SOC_ENUM_SINGLE_EXT_DECL(quat_aux_pcm_rx_sample_rate, auxpcm_rate_text);
555static SOC_ENUM_SINGLE_EXT_DECL(quin_aux_pcm_rx_sample_rate, auxpcm_rate_text);
556static SOC_ENUM_SINGLE_EXT_DECL(prim_aux_pcm_tx_sample_rate, auxpcm_rate_text);
557static SOC_ENUM_SINGLE_EXT_DECL(sec_aux_pcm_tx_sample_rate, auxpcm_rate_text);
558static SOC_ENUM_SINGLE_EXT_DECL(tert_aux_pcm_tx_sample_rate, auxpcm_rate_text);
559static SOC_ENUM_SINGLE_EXT_DECL(quat_aux_pcm_tx_sample_rate, auxpcm_rate_text);
560static SOC_ENUM_SINGLE_EXT_DECL(quin_aux_pcm_tx_sample_rate, auxpcm_rate_text);
561static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_rx_sample_rate, mi2s_rate_text);
562static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_rx_sample_rate, mi2s_rate_text);
563static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_rx_sample_rate, mi2s_rate_text);
564static SOC_ENUM_SINGLE_EXT_DECL(quat_mi2s_rx_sample_rate, mi2s_rate_text);
565static SOC_ENUM_SINGLE_EXT_DECL(quin_mi2s_rx_sample_rate, mi2s_rate_text);
566static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_tx_sample_rate, mi2s_rate_text);
567static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_tx_sample_rate, mi2s_rate_text);
568static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_tx_sample_rate, mi2s_rate_text);
569static SOC_ENUM_SINGLE_EXT_DECL(quat_mi2s_tx_sample_rate, mi2s_rate_text);
570static SOC_ENUM_SINGLE_EXT_DECL(quin_mi2s_tx_sample_rate, mi2s_rate_text);
571static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_rx_chs, mi2s_ch_text);
572static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_tx_chs, mi2s_ch_text);
573static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_rx_chs, mi2s_ch_text);
574static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_tx_chs, mi2s_ch_text);
575static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_rx_chs, mi2s_ch_text);
576static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_tx_chs, mi2s_ch_text);
577static SOC_ENUM_SINGLE_EXT_DECL(quat_mi2s_rx_chs, mi2s_ch_text);
578static SOC_ENUM_SINGLE_EXT_DECL(quat_mi2s_tx_chs, mi2s_ch_text);
579static SOC_ENUM_SINGLE_EXT_DECL(quin_mi2s_rx_chs, mi2s_ch_text);
580static SOC_ENUM_SINGLE_EXT_DECL(quin_mi2s_tx_chs, mi2s_ch_text);
581static SOC_ENUM_SINGLE_EXT_DECL(mi2s_rx_format, bit_format_text);
582static SOC_ENUM_SINGLE_EXT_DECL(mi2s_tx_format, bit_format_text);
583static SOC_ENUM_SINGLE_EXT_DECL(aux_pcm_rx_format, bit_format_text);
584static SOC_ENUM_SINGLE_EXT_DECL(aux_pcm_tx_format, bit_format_text);
585static SOC_ENUM_SINGLE_EXT_DECL(hifi_function, hifi_text);
586static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_0_chs, cdc_dma_rx_ch_text);
587static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_1_chs, cdc_dma_rx_ch_text);
588static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_0_chs, cdc_dma_rx_ch_text);
589static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_1_chs, cdc_dma_rx_ch_text);
590static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_2_chs, cdc_dma_rx_ch_text);
591static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_3_chs, cdc_dma_rx_ch_text);
592static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_5_chs, cdc_dma_rx_ch_text);
593static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_0_chs, cdc_dma_tx_ch_text);
594static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_1_chs, cdc_dma_tx_ch_text);
595static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_2_chs, cdc_dma_tx_ch_text);
596static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_0_chs, cdc_dma_tx_ch_text);
597static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_3_chs, cdc_dma_tx_ch_text);
598static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_4_chs, cdc_dma_tx_ch_text);
599static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_0_format, bit_format_text);
600static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_1_format, bit_format_text);
601static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_0_format, bit_format_text);
602static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_1_format, bit_format_text);
603static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_2_format, bit_format_text);
604static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_3_format, bit_format_text);
605static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_5_format, bit_format_text);
606static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_1_format, bit_format_text);
607static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_2_format, bit_format_text);
608static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_0_format, bit_format_text);
609static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_3_format, bit_format_text);
610static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_4_format, bit_format_text);
611static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_0_sample_rate,
612 cdc_dma_sample_rate_text);
613static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_1_sample_rate,
614 cdc_dma_sample_rate_text);
615static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_0_sample_rate,
616 cdc_dma_sample_rate_text);
617static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_1_sample_rate,
618 cdc_dma_sample_rate_text);
619static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_2_sample_rate,
620 cdc_dma_sample_rate_text);
621static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_3_sample_rate,
622 cdc_dma_sample_rate_text);
623static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_5_sample_rate,
624 cdc_dma_sample_rate_text);
625static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_0_sample_rate,
626 cdc_dma_sample_rate_text);
627static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_1_sample_rate,
628 cdc_dma_sample_rate_text);
629static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_2_sample_rate,
630 cdc_dma_sample_rate_text);
631static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_0_sample_rate,
632 cdc_dma_sample_rate_text);
633static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_3_sample_rate,
634 cdc_dma_sample_rate_text);
635static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_4_sample_rate,
636 cdc_dma_sample_rate_text);
637
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]638static int msm_hifi_control;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]639static bool codec_reg_done;
640static struct snd_soc_aux_dev *msm_aux_dev;
641static struct snd_soc_codec_conf *msm_codec_conf;
642static struct msm_asoc_wcd93xx_codec msm_codec_fn;
643
644static int dmic_0_1_gpio_cnt;
645static int dmic_2_3_gpio_cnt;
646
647static void *def_wcd_mbhc_cal(void);
648static int msm_snd_enable_codec_ext_clk(struct snd_soc_codec *codec,
649 int enable, bool dapm);
650static int msm_wsa881x_init(struct snd_soc_component *component);
651static int msm_aux_codec_init(struct snd_soc_component *component);
652
653/*
654 * Need to report LINEIN
655 * if R/L channel impedance is larger than 5K ohm
656 */
657static struct wcd_mbhc_config wcd_mbhc_cfg = {
658 .read_fw_bin = false,
659 .calibration = NULL,
660 .detect_extn_cable = true,
661 .mono_stero_detection = false,
662 .swap_gnd_mic = NULL,
663 .hs_ext_micbias = true,
664 .key_code[0] = KEY_MEDIA,
665 .key_code[1] = KEY_VOICECOMMAND,
666 .key_code[2] = KEY_VOLUMEUP,
667 .key_code[3] = KEY_VOLUMEDOWN,
668 .key_code[4] = 0,
669 .key_code[5] = 0,
670 .key_code[6] = 0,
671 .key_code[7] = 0,
672 .linein_th = 5000,
673 .moisture_en = true,
674 .mbhc_micbias = MIC_BIAS_2,
675 .anc_micbias = MIC_BIAS_2,
676 .enable_anc_mic_detect = false,
677};
678
679static struct snd_soc_dapm_route wcd_audio_paths_tavil[] = {
680 {"MIC BIAS1", NULL, "MCLK TX"},
681 {"MIC BIAS2", NULL, "MCLK TX"},
682 {"MIC BIAS3", NULL, "MCLK TX"},
683 {"MIC BIAS4", NULL, "MCLK TX"},
684};
685
686static struct afe_clk_set mi2s_clk[MI2S_MAX] = {
687 {
688 AFE_API_VERSION_I2S_CONFIG,
689 Q6AFE_LPASS_CLK_ID_PRI_MI2S_IBIT,
690 Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
691 Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
692 Q6AFE_LPASS_CLK_ROOT_DEFAULT,
693 0,
694 },
695 {
696 AFE_API_VERSION_I2S_CONFIG,
697 Q6AFE_LPASS_CLK_ID_SEC_MI2S_IBIT,
698 Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
699 Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
700 Q6AFE_LPASS_CLK_ROOT_DEFAULT,
701 0,
702 },
703 {
704 AFE_API_VERSION_I2S_CONFIG,
705 Q6AFE_LPASS_CLK_ID_TER_MI2S_IBIT,
706 Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
707 Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
708 Q6AFE_LPASS_CLK_ROOT_DEFAULT,
709 0,
710 },
711 {
712 AFE_API_VERSION_I2S_CONFIG,
713 Q6AFE_LPASS_CLK_ID_QUAD_MI2S_IBIT,
714 Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
715 Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
716 Q6AFE_LPASS_CLK_ROOT_DEFAULT,
717 0,
718 },
719 {
720 AFE_API_VERSION_I2S_CONFIG,
721 Q6AFE_LPASS_CLK_ID_QUI_MI2S_IBIT,
722 Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
723 Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
724 Q6AFE_LPASS_CLK_ROOT_DEFAULT,
725 0,
726 }
727
728};
729
730static struct mi2s_conf mi2s_intf_conf[MI2S_MAX];
731
732static int slim_get_sample_rate_val(int sample_rate)
733{
734 int sample_rate_val = 0;
735
736 switch (sample_rate) {
737 case SAMPLING_RATE_8KHZ:
738 sample_rate_val = 0;
739 break;
740 case SAMPLING_RATE_16KHZ:
741 sample_rate_val = 1;
742 break;
743 case SAMPLING_RATE_32KHZ:
744 sample_rate_val = 2;
745 break;
746 case SAMPLING_RATE_44P1KHZ:
747 sample_rate_val = 3;
748 break;
749 case SAMPLING_RATE_48KHZ:
750 sample_rate_val = 4;
751 break;
752 case SAMPLING_RATE_88P2KHZ:
753 sample_rate_val = 5;
754 break;
755 case SAMPLING_RATE_96KHZ:
756 sample_rate_val = 6;
757 break;
758 case SAMPLING_RATE_176P4KHZ:
759 sample_rate_val = 7;
760 break;
761 case SAMPLING_RATE_192KHZ:
762 sample_rate_val = 8;
763 break;
764 case SAMPLING_RATE_352P8KHZ:
765 sample_rate_val = 9;
766 break;
767 case SAMPLING_RATE_384KHZ:
768 sample_rate_val = 10;
769 break;
770 default:
771 sample_rate_val = 4;
772 break;
773 }
774 return sample_rate_val;
775}
776
777static int slim_get_sample_rate(int value)
778{
779 int sample_rate = 0;
780
781 switch (value) {
782 case 0:
783 sample_rate = SAMPLING_RATE_8KHZ;
784 break;
785 case 1:
786 sample_rate = SAMPLING_RATE_16KHZ;
787 break;
788 case 2:
789 sample_rate = SAMPLING_RATE_32KHZ;
790 break;
791 case 3:
792 sample_rate = SAMPLING_RATE_44P1KHZ;
793 break;
794 case 4:
795 sample_rate = SAMPLING_RATE_48KHZ;
796 break;
797 case 5:
798 sample_rate = SAMPLING_RATE_88P2KHZ;
799 break;
800 case 6:
801 sample_rate = SAMPLING_RATE_96KHZ;
802 break;
803 case 7:
804 sample_rate = SAMPLING_RATE_176P4KHZ;
805 break;
806 case 8:
807 sample_rate = SAMPLING_RATE_192KHZ;
808 break;
809 case 9:
810 sample_rate = SAMPLING_RATE_352P8KHZ;
811 break;
812 case 10:
813 sample_rate = SAMPLING_RATE_384KHZ;
814 break;
815 default:
816 sample_rate = SAMPLING_RATE_48KHZ;
817 break;
818 }
819 return sample_rate;
820}
821
822static int slim_get_bit_format_val(int bit_format)
823{
824 int val = 0;
825
826 switch (bit_format) {
827 case SNDRV_PCM_FORMAT_S32_LE:
828 val = 3;
829 break;
830 case SNDRV_PCM_FORMAT_S24_3LE:
831 val = 2;
832 break;
833 case SNDRV_PCM_FORMAT_S24_LE:
834 val = 1;
835 break;
836 case SNDRV_PCM_FORMAT_S16_LE:
837 default:
838 val = 0;
839 break;
840 }
841 return val;
842}
843
844static int slim_get_bit_format(int val)
845{
846 int bit_fmt = SNDRV_PCM_FORMAT_S16_LE;
847
848 switch (val) {
849 case 0:
850 bit_fmt = SNDRV_PCM_FORMAT_S16_LE;
851 break;
852 case 1:
853 bit_fmt = SNDRV_PCM_FORMAT_S24_LE;
854 break;
855 case 2:
856 bit_fmt = SNDRV_PCM_FORMAT_S24_3LE;
857 break;
858 case 3:
859 bit_fmt = SNDRV_PCM_FORMAT_S32_LE;
860 break;
861 default:
862 bit_fmt = SNDRV_PCM_FORMAT_S16_LE;
863 break;
864 }
865 return bit_fmt;
866}
867
868static int slim_get_port_idx(struct snd_kcontrol *kcontrol)
869{
870 int port_id = 0;
871
872 if (strnstr(kcontrol->id.name, "SLIM_0_RX", sizeof("SLIM_0_RX"))) {
873 port_id = SLIM_RX_0;
874 } else if (strnstr(kcontrol->id.name,
875 "SLIM_2_RX", sizeof("SLIM_2_RX"))) {
876 port_id = SLIM_RX_2;
877 } else if (strnstr(kcontrol->id.name,
878 "SLIM_5_RX", sizeof("SLIM_5_RX"))) {
879 port_id = SLIM_RX_5;
880 } else if (strnstr(kcontrol->id.name,
881 "SLIM_6_RX", sizeof("SLIM_6_RX"))) {
882 port_id = SLIM_RX_6;
883 } else if (strnstr(kcontrol->id.name,
884 "SLIM_0_TX", sizeof("SLIM_0_TX"))) {
885 port_id = SLIM_TX_0;
886 } else if (strnstr(kcontrol->id.name,
887 "SLIM_1_TX", sizeof("SLIM_1_TX"))) {
888 port_id = SLIM_TX_1;
889 } else {
890 pr_err("%s: unsupported channel: %s\n",
891 __func__, kcontrol->id.name);
892 return -EINVAL;
893 }
894
895 return port_id;
896}
897
898static int slim_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
899 struct snd_ctl_elem_value *ucontrol)
900{
901 int ch_num = slim_get_port_idx(kcontrol);
902
903 if (ch_num < 0)
904 return ch_num;
905
906 ucontrol->value.enumerated.item[0] =
907 slim_get_sample_rate_val(slim_rx_cfg[ch_num].sample_rate);
908
909 pr_debug("%s: slim[%d]_rx_sample_rate = %d, item = %d\n", __func__,
910 ch_num, slim_rx_cfg[ch_num].sample_rate,
911 ucontrol->value.enumerated.item[0]);
912
913 return 0;
914}
915
916static int slim_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
917 struct snd_ctl_elem_value *ucontrol)
918{
919 int ch_num = slim_get_port_idx(kcontrol);
920
921 if (ch_num < 0)
922 return ch_num;
923
924 slim_rx_cfg[ch_num].sample_rate =
925 slim_get_sample_rate(ucontrol->value.enumerated.item[0]);
926
927 pr_debug("%s: slim[%d]_rx_sample_rate = %d, item = %d\n", __func__,
928 ch_num, slim_rx_cfg[ch_num].sample_rate,
929 ucontrol->value.enumerated.item[0]);
930
931 return 0;
932}
933
934static int slim_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
935 struct snd_ctl_elem_value *ucontrol)
936{
937 int ch_num = slim_get_port_idx(kcontrol);
938
939 if (ch_num < 0)
940 return ch_num;
941
942 ucontrol->value.enumerated.item[0] =
943 slim_get_sample_rate_val(slim_tx_cfg[ch_num].sample_rate);
944
945 pr_debug("%s: slim[%d]_tx_sample_rate = %d, item = %d\n", __func__,
946 ch_num, slim_tx_cfg[ch_num].sample_rate,
947 ucontrol->value.enumerated.item[0]);
948
949 return 0;
950}
951
952static int slim_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
953 struct snd_ctl_elem_value *ucontrol)
954{
955 int sample_rate = 0;
956 int ch_num = slim_get_port_idx(kcontrol);
957
958 if (ch_num < 0)
959 return ch_num;
960
961 sample_rate = slim_get_sample_rate(ucontrol->value.enumerated.item[0]);
962 if (sample_rate == SAMPLING_RATE_44P1KHZ) {
963 pr_err("%s: Unsupported sample rate %d: for Tx path\n",
964 __func__, sample_rate);
965 return -EINVAL;
966 }
967 slim_tx_cfg[ch_num].sample_rate = sample_rate;
968
969 pr_debug("%s: slim[%d]_tx_sample_rate = %d, value = %d\n", __func__,
970 ch_num, slim_tx_cfg[ch_num].sample_rate,
971 ucontrol->value.enumerated.item[0]);
972
973 return 0;
974}
975
976static int slim_rx_bit_format_get(struct snd_kcontrol *kcontrol,
977 struct snd_ctl_elem_value *ucontrol)
978{
979 int ch_num = slim_get_port_idx(kcontrol);
980
981 if (ch_num < 0)
982 return ch_num;
983
984 ucontrol->value.enumerated.item[0] =
985 slim_get_bit_format_val(slim_rx_cfg[ch_num].bit_format);
986
987 pr_debug("%s: slim[%d]_rx_bit_format = %d, ucontrol value = %d\n",
988 __func__, ch_num, slim_rx_cfg[ch_num].bit_format,
989 ucontrol->value.enumerated.item[0]);
990
991 return 0;
992}
993
994static int slim_rx_bit_format_put(struct snd_kcontrol *kcontrol,
995 struct snd_ctl_elem_value *ucontrol)
996{
997 int ch_num = slim_get_port_idx(kcontrol);
998
999 if (ch_num < 0)
1000 return ch_num;
1001
1002 slim_rx_cfg[ch_num].bit_format =
1003 slim_get_bit_format(ucontrol->value.enumerated.item[0]);
1004
1005 pr_debug("%s: slim[%d]_rx_bit_format = %d, ucontrol value = %d\n",
1006 __func__, ch_num, slim_rx_cfg[ch_num].bit_format,
1007 ucontrol->value.enumerated.item[0]);
1008
1009 return 0;
1010}
1011
1012static int slim_tx_bit_format_get(struct snd_kcontrol *kcontrol,
1013 struct snd_ctl_elem_value *ucontrol)
1014{
1015 int ch_num = slim_get_port_idx(kcontrol);
1016
1017 if (ch_num < 0)
1018 return ch_num;
1019
1020 ucontrol->value.enumerated.item[0] =
1021 slim_get_bit_format_val(slim_tx_cfg[ch_num].bit_format);
1022
1023 pr_debug("%s: slim[%d]_tx_bit_format = %d, ucontrol value = %d\n",
1024 __func__, ch_num, slim_tx_cfg[ch_num].bit_format,
1025 ucontrol->value.enumerated.item[0]);
1026
1027 return 0;
1028}
1029
1030static int slim_tx_bit_format_put(struct snd_kcontrol *kcontrol,
1031 struct snd_ctl_elem_value *ucontrol)
1032{
1033 int ch_num = slim_get_port_idx(kcontrol);
1034
1035 if (ch_num < 0)
1036 return ch_num;
1037
1038 slim_tx_cfg[ch_num].bit_format =
1039 slim_get_bit_format(ucontrol->value.enumerated.item[0]);
1040
1041 pr_debug("%s: slim[%d]_tx_bit_format = %d, ucontrol value = %d\n",
1042 __func__, ch_num, slim_tx_cfg[ch_num].bit_format,
1043 ucontrol->value.enumerated.item[0]);
1044
1045 return 0;
1046}
1047
1048static int slim_rx_ch_get(struct snd_kcontrol *kcontrol,
1049 struct snd_ctl_elem_value *ucontrol)
1050{
1051 int ch_num = slim_get_port_idx(kcontrol);
1052
1053 if (ch_num < 0)
1054 return ch_num;
1055
1056 pr_debug("%s: msm_slim_[%d]_rx_ch = %d\n", __func__,
1057 ch_num, slim_rx_cfg[ch_num].channels);
1058 ucontrol->value.enumerated.item[0] = slim_rx_cfg[ch_num].channels - 1;
1059
1060 return 0;
1061}
1062
1063static int slim_rx_ch_put(struct snd_kcontrol *kcontrol,
1064 struct snd_ctl_elem_value *ucontrol)
1065{
1066 int ch_num = slim_get_port_idx(kcontrol);
1067
1068 if (ch_num < 0)
1069 return ch_num;
1070
1071 slim_rx_cfg[ch_num].channels = ucontrol->value.enumerated.item[0] + 1;
1072 pr_debug("%s: msm_slim_[%d]_rx_ch = %d\n", __func__,
1073 ch_num, slim_rx_cfg[ch_num].channels);
1074
1075 return 1;
1076}
1077
1078static int slim_tx_ch_get(struct snd_kcontrol *kcontrol,
1079 struct snd_ctl_elem_value *ucontrol)
1080{
1081 int ch_num = slim_get_port_idx(kcontrol);
1082
1083 if (ch_num < 0)
1084 return ch_num;
1085
1086 pr_debug("%s: msm_slim_[%d]_tx_ch = %d\n", __func__,
1087 ch_num, slim_tx_cfg[ch_num].channels);
1088 ucontrol->value.enumerated.item[0] = slim_tx_cfg[ch_num].channels - 1;
1089
1090 return 0;
1091}
1092
1093static int slim_tx_ch_put(struct snd_kcontrol *kcontrol,
1094 struct snd_ctl_elem_value *ucontrol)
1095{
1096 int ch_num = slim_get_port_idx(kcontrol);
1097
1098 if (ch_num < 0)
1099 return ch_num;
1100
1101 slim_tx_cfg[ch_num].channels = ucontrol->value.enumerated.item[0] + 1;
1102 pr_debug("%s: msm_slim_[%d]_tx_ch = %d\n", __func__,
1103 ch_num, slim_tx_cfg[ch_num].channels);
1104
1105 return 1;
1106}
1107
1108static int msm_vi_feed_tx_ch_get(struct snd_kcontrol *kcontrol,
1109 struct snd_ctl_elem_value *ucontrol)
1110{
1111 ucontrol->value.integer.value[0] = msm_vi_feed_tx_ch - 1;
1112 pr_debug("%s: msm_vi_feed_tx_ch = %ld\n", __func__,
1113 ucontrol->value.integer.value[0]);
1114 return 0;
1115}
1116
1117static int msm_vi_feed_tx_ch_put(struct snd_kcontrol *kcontrol,
1118 struct snd_ctl_elem_value *ucontrol)
1119{
1120 msm_vi_feed_tx_ch = ucontrol->value.integer.value[0] + 1;
1121
1122 pr_debug("%s: msm_vi_feed_tx_ch = %d\n", __func__, msm_vi_feed_tx_ch);
1123 return 1;
1124}
1125
1126static int msm_bt_sample_rate_get(struct snd_kcontrol *kcontrol,
1127 struct snd_ctl_elem_value *ucontrol)
1128{
1129 /*
1130 * Slimbus_7_Rx/Tx sample rate values should always be in sync (same)
1131 * when used for BT_SCO use case. Return either Rx or Tx sample rate
1132 * value.
1133 */
1134 switch (slim_rx_cfg[SLIM_RX_7].sample_rate) {
1135 case SAMPLING_RATE_96KHZ:
1136 ucontrol->value.integer.value[0] = 5;
1137 break;
1138 case SAMPLING_RATE_88P2KHZ:
1139 ucontrol->value.integer.value[0] = 4;
1140 break;
1141 case SAMPLING_RATE_48KHZ:
1142 ucontrol->value.integer.value[0] = 3;
1143 break;
1144 case SAMPLING_RATE_44P1KHZ:
1145 ucontrol->value.integer.value[0] = 2;
1146 break;
1147 case SAMPLING_RATE_16KHZ:
1148 ucontrol->value.integer.value[0] = 1;
1149 break;
1150 case SAMPLING_RATE_8KHZ:
1151 default:
1152 ucontrol->value.integer.value[0] = 0;
1153 break;
1154 }
1155 pr_debug("%s: sample rate = %d\n", __func__,
1156 slim_rx_cfg[SLIM_RX_7].sample_rate);
1157
1158 return 0;
1159}
1160
1161static int msm_bt_sample_rate_put(struct snd_kcontrol *kcontrol,
1162 struct snd_ctl_elem_value *ucontrol)
1163{
1164 switch (ucontrol->value.integer.value[0]) {
1165 case 1:
1166 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_16KHZ;
1167 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_16KHZ;
1168 break;
1169 case 2:
1170 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_44P1KHZ;
1171 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_44P1KHZ;
1172 break;
1173 case 3:
1174 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_48KHZ;
1175 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_48KHZ;
1176 break;
1177 case 4:
1178 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_88P2KHZ;
1179 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_88P2KHZ;
1180 break;
1181 case 5:
1182 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_96KHZ;
1183 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_96KHZ;
1184 break;
1185 case 0:
1186 default:
1187 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_8KHZ;
1188 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_8KHZ;
1189 break;
1190 }
1191 pr_debug("%s: sample rates: slim7_rx = %d, slim7_tx = %d, value = %d\n",
1192 __func__,
1193 slim_rx_cfg[SLIM_RX_7].sample_rate,
1194 slim_tx_cfg[SLIM_TX_7].sample_rate,
1195 ucontrol->value.enumerated.item[0]);
1196
1197 return 0;
1198}
Sharad Sangle493a1b32018-09-19 15:52:15 +0530[diff] [blame]1199static int msm_bt_sample_rate_rx_get(struct snd_kcontrol *kcontrol,
1200 struct snd_ctl_elem_value *ucontrol)
1201{
1202 switch (slim_rx_cfg[SLIM_RX_7].sample_rate) {
1203 case SAMPLING_RATE_96KHZ:
1204 ucontrol->value.integer.value[0] = 5;
1205 break;
1206 case SAMPLING_RATE_88P2KHZ:
1207 ucontrol->value.integer.value[0] = 4;
1208 break;
1209 case SAMPLING_RATE_48KHZ:
1210 ucontrol->value.integer.value[0] = 3;
1211 break;
1212 case SAMPLING_RATE_44P1KHZ:
1213 ucontrol->value.integer.value[0] = 2;
1214 break;
1215 case SAMPLING_RATE_16KHZ:
1216 ucontrol->value.integer.value[0] = 1;
1217 break;
1218 case SAMPLING_RATE_8KHZ:
1219 default:
1220 ucontrol->value.integer.value[0] = 0;
1221 break;
1222 }
1223 pr_debug("%s: sample rate rx = %d", __func__,
1224 slim_rx_cfg[SLIM_RX_7].sample_rate);
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1225
Sharad Sangle493a1b32018-09-19 15:52:15 +0530[diff] [blame]1226 return 0;
1227}
1228
1229static int msm_bt_sample_rate_rx_put(struct snd_kcontrol *kcontrol,
1230 struct snd_ctl_elem_value *ucontrol)
1231{
1232 switch (ucontrol->value.integer.value[0]) {
1233 case 1:
1234 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_16KHZ;
1235 break;
1236 case 2:
1237 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_44P1KHZ;
1238 break;
1239 case 3:
1240 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_48KHZ;
1241 break;
1242 case 4:
1243 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_88P2KHZ;
1244 break;
1245 case 5:
1246 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_96KHZ;
1247 break;
1248 case 0:
1249 default:
1250 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_8KHZ;
1251 break;
1252 }
1253 pr_debug("%s: sample rate: slim7_rx = %d, value = %d\n",
1254 __func__,
1255 slim_rx_cfg[SLIM_RX_7].sample_rate,
1256 ucontrol->value.enumerated.item[0]);
1257
1258 return 0;
1259}
1260
1261static int msm_bt_sample_rate_tx_get(struct snd_kcontrol *kcontrol,
1262 struct snd_ctl_elem_value *ucontrol)
1263{
1264 switch (slim_tx_cfg[SLIM_TX_7].sample_rate) {
1265 case SAMPLING_RATE_96KHZ:
1266 ucontrol->value.integer.value[0] = 5;
1267 break;
1268 case SAMPLING_RATE_88P2KHZ:
1269 ucontrol->value.integer.value[0] = 4;
1270 break;
1271 case SAMPLING_RATE_48KHZ:
1272 ucontrol->value.integer.value[0] = 3;
1273 break;
1274 case SAMPLING_RATE_44P1KHZ:
1275 ucontrol->value.integer.value[0] = 2;
1276 break;
1277 case SAMPLING_RATE_16KHZ:
1278 ucontrol->value.integer.value[0] = 1;
1279 break;
1280 case SAMPLING_RATE_8KHZ:
1281 default:
1282 ucontrol->value.integer.value[0] = 0;
1283 break;
1284 }
1285 pr_debug("%s: sample rate tx = %d", __func__,
1286 slim_tx_cfg[SLIM_TX_7].sample_rate);
1287
1288 return 0;
1289}
1290
1291static int msm_bt_sample_rate_tx_put(struct snd_kcontrol *kcontrol,
1292 struct snd_ctl_elem_value *ucontrol)
1293{
1294 switch (ucontrol->value.integer.value[0]) {
1295 case 1:
1296 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_16KHZ;
1297 break;
1298 case 2:
1299 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_44P1KHZ;
1300 break;
1301 case 3:
1302 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_48KHZ;
1303 break;
1304 case 4:
1305 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_88P2KHZ;
1306 break;
1307 case 5:
1308 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_96KHZ;
1309 break;
1310 case 0:
1311 default:
1312 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_8KHZ;
1313 break;
1314 }
1315 pr_debug("%s: sample rate: slim7_tx = %d, value = %d\n",
1316 __func__,
1317 slim_tx_cfg[SLIM_TX_7].sample_rate,
1318 ucontrol->value.enumerated.item[0]);
1319
1320 return 0;
1321}
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1322static int cdc_dma_get_port_idx(struct snd_kcontrol *kcontrol)
1323{
1324 int idx = 0;
1325
1326 if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_RX_0",
1327 sizeof("WSA_CDC_DMA_RX_0")))
1328 idx = WSA_CDC_DMA_RX_0;
1329 else if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_RX_1",
1330 sizeof("WSA_CDC_DMA_RX_0")))
1331 idx = WSA_CDC_DMA_RX_1;
1332 else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_0",
1333 sizeof("RX_CDC_DMA_RX_0")))
1334 idx = RX_CDC_DMA_RX_0;
1335 else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_1",
1336 sizeof("RX_CDC_DMA_RX_1")))
1337 idx = RX_CDC_DMA_RX_1;
1338 else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_2",
1339 sizeof("RX_CDC_DMA_RX_2")))
1340 idx = RX_CDC_DMA_RX_2;
1341 else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_3",
1342 sizeof("RX_CDC_DMA_RX_3")))
1343 idx = RX_CDC_DMA_RX_3;
1344 else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_5",
1345 sizeof("RX_CDC_DMA_RX_5")))
1346 idx = RX_CDC_DMA_RX_5;
1347 else if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_TX_0",
1348 sizeof("WSA_CDC_DMA_TX_0")))
1349 idx = WSA_CDC_DMA_TX_0;
1350 else if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_TX_1",
1351 sizeof("WSA_CDC_DMA_TX_1")))
1352 idx = WSA_CDC_DMA_TX_1;
1353 else if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_TX_2",
1354 sizeof("WSA_CDC_DMA_TX_2")))
1355 idx = WSA_CDC_DMA_TX_2;
1356 else if (strnstr(kcontrol->id.name, "TX_CDC_DMA_TX_0",
1357 sizeof("TX_CDC_DMA_TX_0")))
1358 idx = TX_CDC_DMA_TX_0;
1359 else if (strnstr(kcontrol->id.name, "TX_CDC_DMA_TX_3",
1360 sizeof("TX_CDC_DMA_TX_3")))
1361 idx = TX_CDC_DMA_TX_3;
1362 else if (strnstr(kcontrol->id.name, "TX_CDC_DMA_TX_4",
1363 sizeof("TX_CDC_DMA_TX_4")))
1364 idx = TX_CDC_DMA_TX_4;
1365 else {
1366 pr_err("%s: unsupported channel: %s\n",
1367 __func__, kcontrol->id.name);
1368 return -EINVAL;
1369 }
1370
1371 return idx;
1372}
1373
1374static int cdc_dma_rx_ch_get(struct snd_kcontrol *kcontrol,
1375 struct snd_ctl_elem_value *ucontrol)
1376{
1377 int ch_num = cdc_dma_get_port_idx(kcontrol);
1378
Tanya Dixitd85e6f32018-09-14 16:06:20 +0530[diff] [blame]1379 if (ch_num < 0) {
1380 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1381 return ch_num;
Tanya Dixitd85e6f32018-09-14 16:06:20 +0530[diff] [blame]1382 }
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1383
1384 pr_debug("%s: cdc_dma_rx_ch = %d\n", __func__,
1385 cdc_dma_rx_cfg[ch_num].channels - 1);
1386 ucontrol->value.integer.value[0] = cdc_dma_rx_cfg[ch_num].channels - 1;
1387 return 0;
1388}
1389
1390static int cdc_dma_rx_ch_put(struct snd_kcontrol *kcontrol,
1391 struct snd_ctl_elem_value *ucontrol)
1392{
1393 int ch_num = cdc_dma_get_port_idx(kcontrol);
1394
Tanya Dixitd85e6f32018-09-14 16:06:20 +0530[diff] [blame]1395 if (ch_num < 0) {
1396 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1397 return ch_num;
Tanya Dixitd85e6f32018-09-14 16:06:20 +0530[diff] [blame]1398 }
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1399
1400 cdc_dma_rx_cfg[ch_num].channels = ucontrol->value.integer.value[0] + 1;
1401
1402 pr_debug("%s: cdc_dma_rx_ch = %d\n", __func__,
1403 cdc_dma_rx_cfg[ch_num].channels);
1404 return 1;
1405}
1406
1407static int cdc_dma_rx_format_get(struct snd_kcontrol *kcontrol,
1408 struct snd_ctl_elem_value *ucontrol)
1409{
1410 int ch_num = cdc_dma_get_port_idx(kcontrol);
1411
Tanya Dixitd85e6f32018-09-14 16:06:20 +0530[diff] [blame]1412 if (ch_num < 0) {
1413 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
1414 return ch_num;
1415 }
1416
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1417 switch (cdc_dma_rx_cfg[ch_num].bit_format) {
1418 case SNDRV_PCM_FORMAT_S32_LE:
1419 ucontrol->value.integer.value[0] = 3;
1420 break;
1421 case SNDRV_PCM_FORMAT_S24_3LE:
1422 ucontrol->value.integer.value[0] = 2;
1423 break;
1424 case SNDRV_PCM_FORMAT_S24_LE:
1425 ucontrol->value.integer.value[0] = 1;
1426 break;
1427 case SNDRV_PCM_FORMAT_S16_LE:
1428 default:
1429 ucontrol->value.integer.value[0] = 0;
1430 break;
1431 }
1432
1433 pr_debug("%s: cdc_dma_rx_format = %d, ucontrol value = %ld\n",
1434 __func__, cdc_dma_rx_cfg[ch_num].bit_format,
1435 ucontrol->value.integer.value[0]);
1436 return 0;
1437}
1438
1439static int cdc_dma_rx_format_put(struct snd_kcontrol *kcontrol,
1440 struct snd_ctl_elem_value *ucontrol)
1441{
1442 int rc = 0;
1443 int ch_num = cdc_dma_get_port_idx(kcontrol);
1444
Tanya Dixitd85e6f32018-09-14 16:06:20 +0530[diff] [blame]1445 if (ch_num < 0) {
1446 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
1447 return ch_num;
1448 }
1449
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1450 switch (ucontrol->value.integer.value[0]) {
1451 case 3:
1452 cdc_dma_rx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S32_LE;
1453 break;
1454 case 2:
1455 cdc_dma_rx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S24_3LE;
1456 break;
1457 case 1:
1458 cdc_dma_rx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S24_LE;
1459 break;
1460 case 0:
1461 default:
1462 cdc_dma_rx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S16_LE;
1463 break;
1464 }
1465 pr_debug("%s: cdc_dma_rx_format = %d, ucontrol value = %ld\n",
1466 __func__, cdc_dma_rx_cfg[ch_num].bit_format,
1467 ucontrol->value.integer.value[0]);
1468
1469 return rc;
1470}
1471
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]1472
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1473static int cdc_dma_get_sample_rate_val(int sample_rate)
1474{
1475 int sample_rate_val = 0;
1476
1477 switch (sample_rate) {
1478 case SAMPLING_RATE_8KHZ:
1479 sample_rate_val = 0;
1480 break;
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]1481 case SAMPLING_RATE_11P025KHZ:
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1482 sample_rate_val = 1;
1483 break;
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]1484 case SAMPLING_RATE_16KHZ:
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1485 sample_rate_val = 2;
1486 break;
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]1487 case SAMPLING_RATE_22P05KHZ:
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1488 sample_rate_val = 3;
1489 break;
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]1490 case SAMPLING_RATE_32KHZ:
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1491 sample_rate_val = 4;
1492 break;
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]1493 case SAMPLING_RATE_44P1KHZ:
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1494 sample_rate_val = 5;
1495 break;
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]1496 case SAMPLING_RATE_48KHZ:
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1497 sample_rate_val = 6;
1498 break;
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]1499 case SAMPLING_RATE_88P2KHZ:
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1500 sample_rate_val = 7;
1501 break;
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]1502 case SAMPLING_RATE_96KHZ:
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1503 sample_rate_val = 8;
1504 break;
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]1505 case SAMPLING_RATE_176P4KHZ:
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1506 sample_rate_val = 9;
1507 break;
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]1508 case SAMPLING_RATE_192KHZ:
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1509 sample_rate_val = 10;
1510 break;
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]1511 case SAMPLING_RATE_352P8KHZ:
1512 sample_rate_val = 11;
1513 break;
1514 case SAMPLING_RATE_384KHZ:
1515 sample_rate_val = 12;
1516 break;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1517 default:
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]1518 sample_rate_val = 6;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1519 break;
1520 }
1521 return sample_rate_val;
1522}
1523
1524static int cdc_dma_get_sample_rate(int value)
1525{
1526 int sample_rate = 0;
1527
1528 switch (value) {
1529 case 0:
1530 sample_rate = SAMPLING_RATE_8KHZ;
1531 break;
1532 case 1:
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]1533 sample_rate = SAMPLING_RATE_11P025KHZ;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1534 break;
1535 case 2:
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]1536 sample_rate = SAMPLING_RATE_16KHZ;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1537 break;
1538 case 3:
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]1539 sample_rate = SAMPLING_RATE_22P05KHZ;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1540 break;
1541 case 4:
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]1542 sample_rate = SAMPLING_RATE_32KHZ;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1543 break;
1544 case 5:
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]1545 sample_rate = SAMPLING_RATE_44P1KHZ;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1546 break;
1547 case 6:
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]1548 sample_rate = SAMPLING_RATE_48KHZ;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1549 break;
1550 case 7:
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]1551 sample_rate = SAMPLING_RATE_88P2KHZ;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1552 break;
1553 case 8:
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]1554 sample_rate = SAMPLING_RATE_96KHZ;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1555 break;
1556 case 9:
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]1557 sample_rate = SAMPLING_RATE_176P4KHZ;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1558 break;
1559 case 10:
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]1560 sample_rate = SAMPLING_RATE_192KHZ;
1561 break;
1562 case 11:
1563 sample_rate = SAMPLING_RATE_352P8KHZ;
1564 break;
1565 case 12:
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1566 sample_rate = SAMPLING_RATE_384KHZ;
1567 break;
1568 default:
1569 sample_rate = SAMPLING_RATE_48KHZ;
1570 break;
1571 }
1572 return sample_rate;
1573}
1574
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1575static int cdc_dma_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
1576 struct snd_ctl_elem_value *ucontrol)
1577{
1578 int ch_num = cdc_dma_get_port_idx(kcontrol);
1579
Tanya Dixitd85e6f32018-09-14 16:06:20 +0530[diff] [blame]1580 if (ch_num < 0) {
1581 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1582 return ch_num;
Tanya Dixitd85e6f32018-09-14 16:06:20 +0530[diff] [blame]1583 }
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1584
1585 ucontrol->value.enumerated.item[0] =
1586 cdc_dma_get_sample_rate_val(cdc_dma_rx_cfg[ch_num].sample_rate);
1587
1588 pr_debug("%s: cdc_dma_rx_sample_rate = %d\n", __func__,
1589 cdc_dma_rx_cfg[ch_num].sample_rate);
1590 return 0;
1591}
1592
1593static int cdc_dma_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
1594 struct snd_ctl_elem_value *ucontrol)
1595{
1596 int ch_num = cdc_dma_get_port_idx(kcontrol);
1597
Tanya Dixitd85e6f32018-09-14 16:06:20 +0530[diff] [blame]1598 if (ch_num < 0) {
1599 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1600 return ch_num;
Tanya Dixitd85e6f32018-09-14 16:06:20 +0530[diff] [blame]1601 }
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1602
1603 cdc_dma_rx_cfg[ch_num].sample_rate =
1604 cdc_dma_get_sample_rate(ucontrol->value.enumerated.item[0]);
1605
1606
1607 pr_debug("%s: control value = %d, cdc_dma_rx_sample_rate = %d\n",
1608 __func__, ucontrol->value.enumerated.item[0],
1609 cdc_dma_rx_cfg[ch_num].sample_rate);
1610 return 0;
1611}
1612
1613static int cdc_dma_tx_ch_get(struct snd_kcontrol *kcontrol,
1614 struct snd_ctl_elem_value *ucontrol)
1615{
1616 int ch_num = cdc_dma_get_port_idx(kcontrol);
1617
Tanya Dixitd85e6f32018-09-14 16:06:20 +0530[diff] [blame]1618 if (ch_num < 0) {
1619 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
1620 return ch_num;
1621 }
1622
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1623 pr_debug("%s: cdc_dma_tx_ch = %d\n", __func__,
1624 cdc_dma_tx_cfg[ch_num].channels);
1625 ucontrol->value.integer.value[0] = cdc_dma_tx_cfg[ch_num].channels - 1;
1626 return 0;
1627}
1628
1629static int cdc_dma_tx_ch_put(struct snd_kcontrol *kcontrol,
1630 struct snd_ctl_elem_value *ucontrol)
1631{
1632 int ch_num = cdc_dma_get_port_idx(kcontrol);
1633
Tanya Dixitd85e6f32018-09-14 16:06:20 +0530[diff] [blame]1634 if (ch_num < 0) {
1635 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
1636 return ch_num;
1637 }
1638
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1639 cdc_dma_tx_cfg[ch_num].channels = ucontrol->value.integer.value[0] + 1;
1640
1641 pr_debug("%s: cdc_dma_tx_ch = %d\n", __func__,
1642 cdc_dma_tx_cfg[ch_num].channels);
1643 return 1;
1644}
1645
1646static int cdc_dma_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
1647 struct snd_ctl_elem_value *ucontrol)
1648{
1649 int sample_rate_val;
1650 int ch_num = cdc_dma_get_port_idx(kcontrol);
1651
Tanya Dixitd85e6f32018-09-14 16:06:20 +0530[diff] [blame]1652 if (ch_num < 0) {
1653 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
1654 return ch_num;
1655 }
1656
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1657 switch (cdc_dma_tx_cfg[ch_num].sample_rate) {
1658 case SAMPLING_RATE_384KHZ:
1659 sample_rate_val = 12;
1660 break;
1661 case SAMPLING_RATE_352P8KHZ:
1662 sample_rate_val = 11;
1663 break;
1664 case SAMPLING_RATE_192KHZ:
1665 sample_rate_val = 10;
1666 break;
1667 case SAMPLING_RATE_176P4KHZ:
1668 sample_rate_val = 9;
1669 break;
1670 case SAMPLING_RATE_96KHZ:
1671 sample_rate_val = 8;
1672 break;
1673 case SAMPLING_RATE_88P2KHZ:
1674 sample_rate_val = 7;
1675 break;
1676 case SAMPLING_RATE_48KHZ:
1677 sample_rate_val = 6;
1678 break;
1679 case SAMPLING_RATE_44P1KHZ:
1680 sample_rate_val = 5;
1681 break;
1682 case SAMPLING_RATE_32KHZ:
1683 sample_rate_val = 4;
1684 break;
1685 case SAMPLING_RATE_22P05KHZ:
1686 sample_rate_val = 3;
1687 break;
1688 case SAMPLING_RATE_16KHZ:
1689 sample_rate_val = 2;
1690 break;
1691 case SAMPLING_RATE_11P025KHZ:
1692 sample_rate_val = 1;
1693 break;
1694 case SAMPLING_RATE_8KHZ:
1695 sample_rate_val = 0;
1696 break;
1697 default:
1698 sample_rate_val = 6;
1699 break;
1700 }
1701
1702 ucontrol->value.integer.value[0] = sample_rate_val;
1703 pr_debug("%s: cdc_dma_tx_sample_rate = %d\n", __func__,
1704 cdc_dma_tx_cfg[ch_num].sample_rate);
1705 return 0;
1706}
1707
1708static int cdc_dma_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
1709 struct snd_ctl_elem_value *ucontrol)
1710{
1711 int ch_num = cdc_dma_get_port_idx(kcontrol);
1712
Tanya Dixitd85e6f32018-09-14 16:06:20 +0530[diff] [blame]1713 if (ch_num < 0) {
1714 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
1715 return ch_num;
1716 }
1717
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1718 switch (ucontrol->value.integer.value[0]) {
1719 case 12:
1720 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_384KHZ;
1721 break;
1722 case 11:
1723 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_352P8KHZ;
1724 break;
1725 case 10:
1726 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_192KHZ;
1727 break;
1728 case 9:
1729 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_176P4KHZ;
1730 break;
1731 case 8:
1732 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_96KHZ;
1733 break;
1734 case 7:
1735 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_88P2KHZ;
1736 break;
1737 case 6:
1738 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_48KHZ;
1739 break;
1740 case 5:
1741 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_44P1KHZ;
1742 break;
1743 case 4:
1744 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_32KHZ;
1745 break;
1746 case 3:
1747 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_22P05KHZ;
1748 break;
1749 case 2:
1750 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_16KHZ;
1751 break;
1752 case 1:
1753 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_11P025KHZ;
1754 break;
1755 case 0:
1756 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_8KHZ;
1757 break;
1758 default:
1759 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_48KHZ;
1760 break;
1761 }
1762
1763 pr_debug("%s: control value = %ld, cdc_dma_tx_sample_rate = %d\n",
1764 __func__, ucontrol->value.integer.value[0],
1765 cdc_dma_tx_cfg[ch_num].sample_rate);
1766 return 0;
1767}
1768
1769static int cdc_dma_tx_format_get(struct snd_kcontrol *kcontrol,
1770 struct snd_ctl_elem_value *ucontrol)
1771{
1772 int ch_num = cdc_dma_get_port_idx(kcontrol);
1773
Tanya Dixitd85e6f32018-09-14 16:06:20 +0530[diff] [blame]1774 if (ch_num < 0) {
1775 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
1776 return ch_num;
1777 }
1778
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1779 switch (cdc_dma_tx_cfg[ch_num].bit_format) {
1780 case SNDRV_PCM_FORMAT_S32_LE:
1781 ucontrol->value.integer.value[0] = 3;
1782 break;
1783 case SNDRV_PCM_FORMAT_S24_3LE:
1784 ucontrol->value.integer.value[0] = 2;
1785 break;
1786 case SNDRV_PCM_FORMAT_S24_LE:
1787 ucontrol->value.integer.value[0] = 1;
1788 break;
1789 case SNDRV_PCM_FORMAT_S16_LE:
1790 default:
1791 ucontrol->value.integer.value[0] = 0;
1792 break;
1793 }
1794
1795 pr_debug("%s: cdc_dma_tx_format = %d, ucontrol value = %ld\n",
1796 __func__, cdc_dma_tx_cfg[ch_num].bit_format,
1797 ucontrol->value.integer.value[0]);
1798 return 0;
1799}
1800
1801static int cdc_dma_tx_format_put(struct snd_kcontrol *kcontrol,
1802 struct snd_ctl_elem_value *ucontrol)
1803{
1804 int rc = 0;
1805 int ch_num = cdc_dma_get_port_idx(kcontrol);
1806
Tanya Dixitd85e6f32018-09-14 16:06:20 +0530[diff] [blame]1807 if (ch_num < 0) {
1808 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
1809 return ch_num;
1810 }
1811
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1812 switch (ucontrol->value.integer.value[0]) {
1813 case 3:
1814 cdc_dma_tx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S32_LE;
1815 break;
1816 case 2:
1817 cdc_dma_tx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S24_3LE;
1818 break;
1819 case 1:
1820 cdc_dma_tx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S24_LE;
1821 break;
1822 case 0:
1823 default:
1824 cdc_dma_tx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S16_LE;
1825 break;
1826 }
1827 pr_debug("%s: cdc_dma_tx_format = %d, ucontrol value = %ld\n",
1828 __func__, cdc_dma_tx_cfg[ch_num].bit_format,
1829 ucontrol->value.integer.value[0]);
1830
1831 return rc;
1832}
1833
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1834static int usb_audio_rx_ch_get(struct snd_kcontrol *kcontrol,
1835 struct snd_ctl_elem_value *ucontrol)
1836{
1837 pr_debug("%s: usb_audio_rx_ch = %d\n", __func__,
1838 usb_rx_cfg.channels);
1839 ucontrol->value.integer.value[0] = usb_rx_cfg.channels - 1;
1840 return 0;
1841}
1842
1843static int usb_audio_rx_ch_put(struct snd_kcontrol *kcontrol,
1844 struct snd_ctl_elem_value *ucontrol)
1845{
1846 usb_rx_cfg.channels = ucontrol->value.integer.value[0] + 1;
1847
1848 pr_debug("%s: usb_audio_rx_ch = %d\n", __func__, usb_rx_cfg.channels);
1849 return 1;
1850}
1851
1852static int usb_audio_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
1853 struct snd_ctl_elem_value *ucontrol)
1854{
1855 int sample_rate_val;
1856
1857 switch (usb_rx_cfg.sample_rate) {
1858 case SAMPLING_RATE_384KHZ:
1859 sample_rate_val = 12;
1860 break;
1861 case SAMPLING_RATE_352P8KHZ:
1862 sample_rate_val = 11;
1863 break;
1864 case SAMPLING_RATE_192KHZ:
1865 sample_rate_val = 10;
1866 break;
1867 case SAMPLING_RATE_176P4KHZ:
1868 sample_rate_val = 9;
1869 break;
1870 case SAMPLING_RATE_96KHZ:
1871 sample_rate_val = 8;
1872 break;
1873 case SAMPLING_RATE_88P2KHZ:
1874 sample_rate_val = 7;
1875 break;
1876 case SAMPLING_RATE_48KHZ:
1877 sample_rate_val = 6;
1878 break;
1879 case SAMPLING_RATE_44P1KHZ:
1880 sample_rate_val = 5;
1881 break;
1882 case SAMPLING_RATE_32KHZ:
1883 sample_rate_val = 4;
1884 break;
1885 case SAMPLING_RATE_22P05KHZ:
1886 sample_rate_val = 3;
1887 break;
1888 case SAMPLING_RATE_16KHZ:
1889 sample_rate_val = 2;
1890 break;
1891 case SAMPLING_RATE_11P025KHZ:
1892 sample_rate_val = 1;
1893 break;
1894 case SAMPLING_RATE_8KHZ:
1895 default:
1896 sample_rate_val = 0;
1897 break;
1898 }
1899
1900 ucontrol->value.integer.value[0] = sample_rate_val;
1901 pr_debug("%s: usb_audio_rx_sample_rate = %d\n", __func__,
1902 usb_rx_cfg.sample_rate);
1903 return 0;
1904}
1905
1906static int usb_audio_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
1907 struct snd_ctl_elem_value *ucontrol)
1908{
1909 switch (ucontrol->value.integer.value[0]) {
1910 case 12:
1911 usb_rx_cfg.sample_rate = SAMPLING_RATE_384KHZ;
1912 break;
1913 case 11:
1914 usb_rx_cfg.sample_rate = SAMPLING_RATE_352P8KHZ;
1915 break;
1916 case 10:
1917 usb_rx_cfg.sample_rate = SAMPLING_RATE_192KHZ;
1918 break;
1919 case 9:
1920 usb_rx_cfg.sample_rate = SAMPLING_RATE_176P4KHZ;
1921 break;
1922 case 8:
1923 usb_rx_cfg.sample_rate = SAMPLING_RATE_96KHZ;
1924 break;
1925 case 7:
1926 usb_rx_cfg.sample_rate = SAMPLING_RATE_88P2KHZ;
1927 break;
1928 case 6:
1929 usb_rx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
1930 break;
1931 case 5:
1932 usb_rx_cfg.sample_rate = SAMPLING_RATE_44P1KHZ;
1933 break;
1934 case 4:
1935 usb_rx_cfg.sample_rate = SAMPLING_RATE_32KHZ;
1936 break;
1937 case 3:
1938 usb_rx_cfg.sample_rate = SAMPLING_RATE_22P05KHZ;
1939 break;
1940 case 2:
1941 usb_rx_cfg.sample_rate = SAMPLING_RATE_16KHZ;
1942 break;
1943 case 1:
1944 usb_rx_cfg.sample_rate = SAMPLING_RATE_11P025KHZ;
1945 break;
1946 case 0:
1947 usb_rx_cfg.sample_rate = SAMPLING_RATE_8KHZ;
1948 break;
1949 default:
1950 usb_rx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
1951 break;
1952 }
1953
1954 pr_debug("%s: control value = %ld, usb_audio_rx_sample_rate = %d\n",
1955 __func__, ucontrol->value.integer.value[0],
1956 usb_rx_cfg.sample_rate);
1957 return 0;
1958}
1959
1960static int usb_audio_rx_format_get(struct snd_kcontrol *kcontrol,
1961 struct snd_ctl_elem_value *ucontrol)
1962{
1963 switch (usb_rx_cfg.bit_format) {
1964 case SNDRV_PCM_FORMAT_S32_LE:
1965 ucontrol->value.integer.value[0] = 3;
1966 break;
1967 case SNDRV_PCM_FORMAT_S24_3LE:
1968 ucontrol->value.integer.value[0] = 2;
1969 break;
1970 case SNDRV_PCM_FORMAT_S24_LE:
1971 ucontrol->value.integer.value[0] = 1;
1972 break;
1973 case SNDRV_PCM_FORMAT_S16_LE:
1974 default:
1975 ucontrol->value.integer.value[0] = 0;
1976 break;
1977 }
1978
1979 pr_debug("%s: usb_audio_rx_format = %d, ucontrol value = %ld\n",
1980 __func__, usb_rx_cfg.bit_format,
1981 ucontrol->value.integer.value[0]);
1982 return 0;
1983}
1984
1985static int usb_audio_rx_format_put(struct snd_kcontrol *kcontrol,
1986 struct snd_ctl_elem_value *ucontrol)
1987{
1988 int rc = 0;
1989
1990 switch (ucontrol->value.integer.value[0]) {
1991 case 3:
1992 usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S32_LE;
1993 break;
1994 case 2:
1995 usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_3LE;
1996 break;
1997 case 1:
1998 usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_LE;
1999 break;
2000 case 0:
2001 default:
2002 usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S16_LE;
2003 break;
2004 }
2005 pr_debug("%s: usb_audio_rx_format = %d, ucontrol value = %ld\n",
2006 __func__, usb_rx_cfg.bit_format,
2007 ucontrol->value.integer.value[0]);
2008
2009 return rc;
2010}
2011
2012static int usb_audio_tx_ch_get(struct snd_kcontrol *kcontrol,
2013 struct snd_ctl_elem_value *ucontrol)
2014{
2015 pr_debug("%s: usb_audio_tx_ch = %d\n", __func__,
2016 usb_tx_cfg.channels);
2017 ucontrol->value.integer.value[0] = usb_tx_cfg.channels - 1;
2018 return 0;
2019}
2020
2021static int usb_audio_tx_ch_put(struct snd_kcontrol *kcontrol,
2022 struct snd_ctl_elem_value *ucontrol)
2023{
2024 usb_tx_cfg.channels = ucontrol->value.integer.value[0] + 1;
2025
2026 pr_debug("%s: usb_audio_tx_ch = %d\n", __func__, usb_tx_cfg.channels);
2027 return 1;
2028}
2029
2030static int usb_audio_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
2031 struct snd_ctl_elem_value *ucontrol)
2032{
2033 int sample_rate_val;
2034
2035 switch (usb_tx_cfg.sample_rate) {
2036 case SAMPLING_RATE_384KHZ:
2037 sample_rate_val = 12;
2038 break;
2039 case SAMPLING_RATE_352P8KHZ:
2040 sample_rate_val = 11;
2041 break;
2042 case SAMPLING_RATE_192KHZ:
2043 sample_rate_val = 10;
2044 break;
2045 case SAMPLING_RATE_176P4KHZ:
2046 sample_rate_val = 9;
2047 break;
2048 case SAMPLING_RATE_96KHZ:
2049 sample_rate_val = 8;
2050 break;
2051 case SAMPLING_RATE_88P2KHZ:
2052 sample_rate_val = 7;
2053 break;
2054 case SAMPLING_RATE_48KHZ:
2055 sample_rate_val = 6;
2056 break;
2057 case SAMPLING_RATE_44P1KHZ:
2058 sample_rate_val = 5;
2059 break;
2060 case SAMPLING_RATE_32KHZ:
2061 sample_rate_val = 4;
2062 break;
2063 case SAMPLING_RATE_22P05KHZ:
2064 sample_rate_val = 3;
2065 break;
2066 case SAMPLING_RATE_16KHZ:
2067 sample_rate_val = 2;
2068 break;
2069 case SAMPLING_RATE_11P025KHZ:
2070 sample_rate_val = 1;
2071 break;
2072 case SAMPLING_RATE_8KHZ:
2073 sample_rate_val = 0;
2074 break;
2075 default:
2076 sample_rate_val = 6;
2077 break;
2078 }
2079
2080 ucontrol->value.integer.value[0] = sample_rate_val;
2081 pr_debug("%s: usb_audio_tx_sample_rate = %d\n", __func__,
2082 usb_tx_cfg.sample_rate);
2083 return 0;
2084}
2085
2086static int usb_audio_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
2087 struct snd_ctl_elem_value *ucontrol)
2088{
2089 switch (ucontrol->value.integer.value[0]) {
2090 case 12:
2091 usb_tx_cfg.sample_rate = SAMPLING_RATE_384KHZ;
2092 break;
2093 case 11:
2094 usb_tx_cfg.sample_rate = SAMPLING_RATE_352P8KHZ;
2095 break;
2096 case 10:
2097 usb_tx_cfg.sample_rate = SAMPLING_RATE_192KHZ;
2098 break;
2099 case 9:
2100 usb_tx_cfg.sample_rate = SAMPLING_RATE_176P4KHZ;
2101 break;
2102 case 8:
2103 usb_tx_cfg.sample_rate = SAMPLING_RATE_96KHZ;
2104 break;
2105 case 7:
2106 usb_tx_cfg.sample_rate = SAMPLING_RATE_88P2KHZ;
2107 break;
2108 case 6:
2109 usb_tx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
2110 break;
2111 case 5:
2112 usb_tx_cfg.sample_rate = SAMPLING_RATE_44P1KHZ;
2113 break;
2114 case 4:
2115 usb_tx_cfg.sample_rate = SAMPLING_RATE_32KHZ;
2116 break;
2117 case 3:
2118 usb_tx_cfg.sample_rate = SAMPLING_RATE_22P05KHZ;
2119 break;
2120 case 2:
2121 usb_tx_cfg.sample_rate = SAMPLING_RATE_16KHZ;
2122 break;
2123 case 1:
2124 usb_tx_cfg.sample_rate = SAMPLING_RATE_11P025KHZ;
2125 break;
2126 case 0:
2127 usb_tx_cfg.sample_rate = SAMPLING_RATE_8KHZ;
2128 break;
2129 default:
2130 usb_tx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
2131 break;
2132 }
2133
2134 pr_debug("%s: control value = %ld, usb_audio_tx_sample_rate = %d\n",
2135 __func__, ucontrol->value.integer.value[0],
2136 usb_tx_cfg.sample_rate);
2137 return 0;
2138}
2139
2140static int usb_audio_tx_format_get(struct snd_kcontrol *kcontrol,
2141 struct snd_ctl_elem_value *ucontrol)
2142{
2143 switch (usb_tx_cfg.bit_format) {
2144 case SNDRV_PCM_FORMAT_S32_LE:
2145 ucontrol->value.integer.value[0] = 3;
2146 break;
2147 case SNDRV_PCM_FORMAT_S24_3LE:
2148 ucontrol->value.integer.value[0] = 2;
2149 break;
2150 case SNDRV_PCM_FORMAT_S24_LE:
2151 ucontrol->value.integer.value[0] = 1;
2152 break;
2153 case SNDRV_PCM_FORMAT_S16_LE:
2154 default:
2155 ucontrol->value.integer.value[0] = 0;
2156 break;
2157 }
2158
2159 pr_debug("%s: usb_audio_tx_format = %d, ucontrol value = %ld\n",
2160 __func__, usb_tx_cfg.bit_format,
2161 ucontrol->value.integer.value[0]);
2162 return 0;
2163}
2164
2165static int usb_audio_tx_format_put(struct snd_kcontrol *kcontrol,
2166 struct snd_ctl_elem_value *ucontrol)
2167{
2168 int rc = 0;
2169
2170 switch (ucontrol->value.integer.value[0]) {
2171 case 3:
2172 usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S32_LE;
2173 break;
2174 case 2:
2175 usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_3LE;
2176 break;
2177 case 1:
2178 usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_LE;
2179 break;
2180 case 0:
2181 default:
2182 usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S16_LE;
2183 break;
2184 }
2185 pr_debug("%s: usb_audio_tx_format = %d, ucontrol value = %ld\n",
2186 __func__, usb_tx_cfg.bit_format,
2187 ucontrol->value.integer.value[0]);
2188
2189 return rc;
2190}
2191
2192static int ext_disp_get_port_idx(struct snd_kcontrol *kcontrol)
2193{
2194 int idx;
2195
2196 if (strnstr(kcontrol->id.name, "Display Port RX",
2197 sizeof("Display Port RX"))) {
2198 idx = DP_RX_IDX;
2199 } else {
2200 pr_err("%s: unsupported BE: %s\n",
2201 __func__, kcontrol->id.name);
2202 idx = -EINVAL;
2203 }
2204
2205 return idx;
2206}
2207
2208static int ext_disp_rx_format_get(struct snd_kcontrol *kcontrol,
2209 struct snd_ctl_elem_value *ucontrol)
2210{
2211 int idx = ext_disp_get_port_idx(kcontrol);
2212
2213 if (idx < 0)
2214 return idx;
2215
2216 switch (ext_disp_rx_cfg[idx].bit_format) {
2217 case SNDRV_PCM_FORMAT_S24_3LE:
2218 ucontrol->value.integer.value[0] = 2;
2219 break;
2220 case SNDRV_PCM_FORMAT_S24_LE:
2221 ucontrol->value.integer.value[0] = 1;
2222 break;
2223 case SNDRV_PCM_FORMAT_S16_LE:
2224 default:
2225 ucontrol->value.integer.value[0] = 0;
2226 break;
2227 }
2228
2229 pr_debug("%s: ext_disp_rx[%d].format = %d, ucontrol value = %ld\n",
2230 __func__, idx, ext_disp_rx_cfg[idx].bit_format,
2231 ucontrol->value.integer.value[0]);
2232 return 0;
2233}
2234
2235static int ext_disp_rx_format_put(struct snd_kcontrol *kcontrol,
2236 struct snd_ctl_elem_value *ucontrol)
2237{
2238 int idx = ext_disp_get_port_idx(kcontrol);
2239
2240 if (idx < 0)
2241 return idx;
2242
2243 switch (ucontrol->value.integer.value[0]) {
2244 case 2:
2245 ext_disp_rx_cfg[idx].bit_format = SNDRV_PCM_FORMAT_S24_3LE;
2246 break;
2247 case 1:
2248 ext_disp_rx_cfg[idx].bit_format = SNDRV_PCM_FORMAT_S24_LE;
2249 break;
2250 case 0:
2251 default:
2252 ext_disp_rx_cfg[idx].bit_format = SNDRV_PCM_FORMAT_S16_LE;
2253 break;
2254 }
2255 pr_debug("%s: ext_disp_rx[%d].format = %d, ucontrol value = %ld\n",
2256 __func__, idx, ext_disp_rx_cfg[idx].bit_format,
2257 ucontrol->value.integer.value[0]);
2258
2259 return 0;
2260}
2261
2262static int ext_disp_rx_ch_get(struct snd_kcontrol *kcontrol,
2263 struct snd_ctl_elem_value *ucontrol)
2264{
2265 int idx = ext_disp_get_port_idx(kcontrol);
2266
2267 if (idx < 0)
2268 return idx;
2269
2270 ucontrol->value.integer.value[0] =
2271 ext_disp_rx_cfg[idx].channels - 2;
2272
2273 pr_debug("%s: ext_disp_rx[%d].ch = %d\n", __func__,
2274 idx, ext_disp_rx_cfg[idx].channels);
2275
2276 return 0;
2277}
2278
2279static int ext_disp_rx_ch_put(struct snd_kcontrol *kcontrol,
2280 struct snd_ctl_elem_value *ucontrol)
2281{
2282 int idx = ext_disp_get_port_idx(kcontrol);
2283
2284 if (idx < 0)
2285 return idx;
2286
2287 ext_disp_rx_cfg[idx].channels =
2288 ucontrol->value.integer.value[0] + 2;
2289
2290 pr_debug("%s: ext_disp_rx[%d].ch = %d\n", __func__,
2291 idx, ext_disp_rx_cfg[idx].channels);
2292 return 1;
2293}
2294
2295static int ext_disp_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
2296 struct snd_ctl_elem_value *ucontrol)
2297{
2298 int sample_rate_val;
2299 int idx = ext_disp_get_port_idx(kcontrol);
2300
2301 if (idx < 0)
2302 return idx;
2303
2304 switch (ext_disp_rx_cfg[idx].sample_rate) {
2305 case SAMPLING_RATE_176P4KHZ:
2306 sample_rate_val = 6;
2307 break;
2308
2309 case SAMPLING_RATE_88P2KHZ:
2310 sample_rate_val = 5;
2311 break;
2312
2313 case SAMPLING_RATE_44P1KHZ:
2314 sample_rate_val = 4;
2315 break;
2316
2317 case SAMPLING_RATE_32KHZ:
2318 sample_rate_val = 3;
2319 break;
2320
2321 case SAMPLING_RATE_192KHZ:
2322 sample_rate_val = 2;
2323 break;
2324
2325 case SAMPLING_RATE_96KHZ:
2326 sample_rate_val = 1;
2327 break;
2328
2329 case SAMPLING_RATE_48KHZ:
2330 default:
2331 sample_rate_val = 0;
2332 break;
2333 }
2334
2335 ucontrol->value.integer.value[0] = sample_rate_val;
2336 pr_debug("%s: ext_disp_rx[%d].sample_rate = %d\n", __func__,
2337 idx, ext_disp_rx_cfg[idx].sample_rate);
2338
2339 return 0;
2340}
2341
2342static int ext_disp_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
2343 struct snd_ctl_elem_value *ucontrol)
2344{
2345 int idx = ext_disp_get_port_idx(kcontrol);
2346
2347 if (idx < 0)
2348 return idx;
2349
2350 switch (ucontrol->value.integer.value[0]) {
2351 case 6:
2352 ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_176P4KHZ;
2353 break;
2354 case 5:
2355 ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_88P2KHZ;
2356 break;
2357 case 4:
2358 ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_44P1KHZ;
2359 break;
2360 case 3:
2361 ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_32KHZ;
2362 break;
2363 case 2:
2364 ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_192KHZ;
2365 break;
2366 case 1:
2367 ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_96KHZ;
2368 break;
2369 case 0:
2370 default:
2371 ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_48KHZ;
2372 break;
2373 }
2374
2375 pr_debug("%s: control value = %ld, ext_disp_rx[%d].sample_rate = %d\n",
2376 __func__, ucontrol->value.integer.value[0], idx,
2377 ext_disp_rx_cfg[idx].sample_rate);
2378 return 0;
2379}
2380
2381static int proxy_rx_ch_get(struct snd_kcontrol *kcontrol,
2382 struct snd_ctl_elem_value *ucontrol)
2383{
2384 pr_debug("%s: proxy_rx channels = %d\n",
2385 __func__, proxy_rx_cfg.channels);
2386 ucontrol->value.integer.value[0] = proxy_rx_cfg.channels - 2;
2387
2388 return 0;
2389}
2390
2391static int proxy_rx_ch_put(struct snd_kcontrol *kcontrol,
2392 struct snd_ctl_elem_value *ucontrol)
2393{
2394 proxy_rx_cfg.channels = ucontrol->value.integer.value[0] + 2;
2395 pr_debug("%s: proxy_rx channels = %d\n",
2396 __func__, proxy_rx_cfg.channels);
2397
2398 return 1;
2399}
2400
2401static int tdm_get_sample_rate(int value)
2402{
2403 int sample_rate = 0;
2404
2405 switch (value) {
2406 case 0:
2407 sample_rate = SAMPLING_RATE_8KHZ;
2408 break;
2409 case 1:
2410 sample_rate = SAMPLING_RATE_16KHZ;
2411 break;
2412 case 2:
2413 sample_rate = SAMPLING_RATE_32KHZ;
2414 break;
2415 case 3:
2416 sample_rate = SAMPLING_RATE_48KHZ;
2417 break;
2418 case 4:
2419 sample_rate = SAMPLING_RATE_176P4KHZ;
2420 break;
2421 case 5:
2422 sample_rate = SAMPLING_RATE_352P8KHZ;
2423 break;
2424 default:
2425 sample_rate = SAMPLING_RATE_48KHZ;
2426 break;
2427 }
2428 return sample_rate;
2429}
2430
2431static int aux_pcm_get_sample_rate(int value)
2432{
2433 int sample_rate;
2434
2435 switch (value) {
2436 case 1:
2437 sample_rate = SAMPLING_RATE_16KHZ;
2438 break;
2439 case 0:
2440 default:
2441 sample_rate = SAMPLING_RATE_8KHZ;
2442 break;
2443 }
2444 return sample_rate;
2445}
2446
2447static int tdm_get_sample_rate_val(int sample_rate)
2448{
2449 int sample_rate_val = 0;
2450
2451 switch (sample_rate) {
2452 case SAMPLING_RATE_8KHZ:
2453 sample_rate_val = 0;
2454 break;
2455 case SAMPLING_RATE_16KHZ:
2456 sample_rate_val = 1;
2457 break;
2458 case SAMPLING_RATE_32KHZ:
2459 sample_rate_val = 2;
2460 break;
2461 case SAMPLING_RATE_48KHZ:
2462 sample_rate_val = 3;
2463 break;
2464 case SAMPLING_RATE_176P4KHZ:
2465 sample_rate_val = 4;
2466 break;
2467 case SAMPLING_RATE_352P8KHZ:
2468 sample_rate_val = 5;
2469 break;
2470 default:
2471 sample_rate_val = 3;
2472 break;
2473 }
2474 return sample_rate_val;
2475}
2476
2477static int aux_pcm_get_sample_rate_val(int sample_rate)
2478{
2479 int sample_rate_val;
2480
2481 switch (sample_rate) {
2482 case SAMPLING_RATE_16KHZ:
2483 sample_rate_val = 1;
2484 break;
2485 case SAMPLING_RATE_8KHZ:
2486 default:
2487 sample_rate_val = 0;
2488 break;
2489 }
2490 return sample_rate_val;
2491}
2492
2493static int tdm_get_port_idx(struct snd_kcontrol *kcontrol,
2494 struct tdm_port *port)
2495{
2496 if (port) {
2497 if (strnstr(kcontrol->id.name, "PRI",
2498 sizeof(kcontrol->id.name))) {
2499 port->mode = TDM_PRI;
2500 } else if (strnstr(kcontrol->id.name, "SEC",
2501 sizeof(kcontrol->id.name))) {
2502 port->mode = TDM_SEC;
2503 } else if (strnstr(kcontrol->id.name, "TERT",
2504 sizeof(kcontrol->id.name))) {
2505 port->mode = TDM_TERT;
2506 } else if (strnstr(kcontrol->id.name, "QUAT",
2507 sizeof(kcontrol->id.name))) {
2508 port->mode = TDM_QUAT;
2509 } else if (strnstr(kcontrol->id.name, "QUIN",
2510 sizeof(kcontrol->id.name))) {
2511 port->mode = TDM_QUIN;
2512 } else {
2513 pr_err("%s: unsupported mode in: %s\n",
2514 __func__, kcontrol->id.name);
2515 return -EINVAL;
2516 }
2517
2518 if (strnstr(kcontrol->id.name, "RX_0",
2519 sizeof(kcontrol->id.name)) ||
2520 strnstr(kcontrol->id.name, "TX_0",
2521 sizeof(kcontrol->id.name))) {
2522 port->channel = TDM_0;
2523 } else if (strnstr(kcontrol->id.name, "RX_1",
2524 sizeof(kcontrol->id.name)) ||
2525 strnstr(kcontrol->id.name, "TX_1",
2526 sizeof(kcontrol->id.name))) {
2527 port->channel = TDM_1;
2528 } else if (strnstr(kcontrol->id.name, "RX_2",
2529 sizeof(kcontrol->id.name)) ||
2530 strnstr(kcontrol->id.name, "TX_2",
2531 sizeof(kcontrol->id.name))) {
2532 port->channel = TDM_2;
2533 } else if (strnstr(kcontrol->id.name, "RX_3",
2534 sizeof(kcontrol->id.name)) ||
2535 strnstr(kcontrol->id.name, "TX_3",
2536 sizeof(kcontrol->id.name))) {
2537 port->channel = TDM_3;
2538 } else if (strnstr(kcontrol->id.name, "RX_4",
2539 sizeof(kcontrol->id.name)) ||
2540 strnstr(kcontrol->id.name, "TX_4",
2541 sizeof(kcontrol->id.name))) {
2542 port->channel = TDM_4;
2543 } else if (strnstr(kcontrol->id.name, "RX_5",
2544 sizeof(kcontrol->id.name)) ||
2545 strnstr(kcontrol->id.name, "TX_5",
2546 sizeof(kcontrol->id.name))) {
2547 port->channel = TDM_5;
2548 } else if (strnstr(kcontrol->id.name, "RX_6",
2549 sizeof(kcontrol->id.name)) ||
2550 strnstr(kcontrol->id.name, "TX_6",
2551 sizeof(kcontrol->id.name))) {
2552 port->channel = TDM_6;
2553 } else if (strnstr(kcontrol->id.name, "RX_7",
2554 sizeof(kcontrol->id.name)) ||
2555 strnstr(kcontrol->id.name, "TX_7",
2556 sizeof(kcontrol->id.name))) {
2557 port->channel = TDM_7;
2558 } else {
2559 pr_err("%s: unsupported channel in: %s\n",
2560 __func__, kcontrol->id.name);
2561 return -EINVAL;
2562 }
2563 } else {
2564 return -EINVAL;
2565 }
2566 return 0;
2567}
2568
2569static int tdm_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
2570 struct snd_ctl_elem_value *ucontrol)
2571{
2572 struct tdm_port port;
2573 int ret = tdm_get_port_idx(kcontrol, &port);
2574
2575 if (ret) {
2576 pr_err("%s: unsupported control: %s\n",
2577 __func__, kcontrol->id.name);
2578 } else {
2579 ucontrol->value.enumerated.item[0] = tdm_get_sample_rate_val(
2580 tdm_rx_cfg[port.mode][port.channel].sample_rate);
2581
2582 pr_debug("%s: tdm_rx_sample_rate = %d, item = %d\n", __func__,
2583 tdm_rx_cfg[port.mode][port.channel].sample_rate,
2584 ucontrol->value.enumerated.item[0]);
2585 }
2586 return ret;
2587}
2588
2589static int tdm_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
2590 struct snd_ctl_elem_value *ucontrol)
2591{
2592 struct tdm_port port;
2593 int ret = tdm_get_port_idx(kcontrol, &port);
2594
2595 if (ret) {
2596 pr_err("%s: unsupported control: %s\n",
2597 __func__, kcontrol->id.name);
2598 } else {
2599 tdm_rx_cfg[port.mode][port.channel].sample_rate =
2600 tdm_get_sample_rate(ucontrol->value.enumerated.item[0]);
2601
2602 pr_debug("%s: tdm_rx_sample_rate = %d, item = %d\n", __func__,
2603 tdm_rx_cfg[port.mode][port.channel].sample_rate,
2604 ucontrol->value.enumerated.item[0]);
2605 }
2606 return ret;
2607}
2608
2609static int tdm_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
2610 struct snd_ctl_elem_value *ucontrol)
2611{
2612 struct tdm_port port;
2613 int ret = tdm_get_port_idx(kcontrol, &port);
2614
2615 if (ret) {
2616 pr_err("%s: unsupported control: %s\n",
2617 __func__, kcontrol->id.name);
2618 } else {
2619 ucontrol->value.enumerated.item[0] = tdm_get_sample_rate_val(
2620 tdm_tx_cfg[port.mode][port.channel].sample_rate);
2621
2622 pr_debug("%s: tdm_tx_sample_rate = %d, item = %d\n", __func__,
2623 tdm_tx_cfg[port.mode][port.channel].sample_rate,
2624 ucontrol->value.enumerated.item[0]);
2625 }
2626 return ret;
2627}
2628
2629static int tdm_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
2630 struct snd_ctl_elem_value *ucontrol)
2631{
2632 struct tdm_port port;
2633 int ret = tdm_get_port_idx(kcontrol, &port);
2634
2635 if (ret) {
2636 pr_err("%s: unsupported control: %s\n",
2637 __func__, kcontrol->id.name);
2638 } else {
2639 tdm_tx_cfg[port.mode][port.channel].sample_rate =
2640 tdm_get_sample_rate(ucontrol->value.enumerated.item[0]);
2641
2642 pr_debug("%s: tdm_tx_sample_rate = %d, item = %d\n", __func__,
2643 tdm_tx_cfg[port.mode][port.channel].sample_rate,
2644 ucontrol->value.enumerated.item[0]);
2645 }
2646 return ret;
2647}
2648
2649static int tdm_get_format(int value)
2650{
2651 int format = 0;
2652
2653 switch (value) {
2654 case 0:
2655 format = SNDRV_PCM_FORMAT_S16_LE;
2656 break;
2657 case 1:
2658 format = SNDRV_PCM_FORMAT_S24_LE;
2659 break;
2660 case 2:
2661 format = SNDRV_PCM_FORMAT_S32_LE;
2662 break;
2663 default:
2664 format = SNDRV_PCM_FORMAT_S16_LE;
2665 break;
2666 }
2667 return format;
2668}
2669
2670static int tdm_get_format_val(int format)
2671{
2672 int value = 0;
2673
2674 switch (format) {
2675 case SNDRV_PCM_FORMAT_S16_LE:
2676 value = 0;
2677 break;
2678 case SNDRV_PCM_FORMAT_S24_LE:
2679 value = 1;
2680 break;
2681 case SNDRV_PCM_FORMAT_S32_LE:
2682 value = 2;
2683 break;
2684 default:
2685 value = 0;
2686 break;
2687 }
2688 return value;
2689}
2690
2691static int tdm_rx_format_get(struct snd_kcontrol *kcontrol,
2692 struct snd_ctl_elem_value *ucontrol)
2693{
2694 struct tdm_port port;
2695 int ret = tdm_get_port_idx(kcontrol, &port);
2696
2697 if (ret) {
2698 pr_err("%s: unsupported control: %s\n",
2699 __func__, kcontrol->id.name);
2700 } else {
2701 ucontrol->value.enumerated.item[0] = tdm_get_format_val(
2702 tdm_rx_cfg[port.mode][port.channel].bit_format);
2703
2704 pr_debug("%s: tdm_rx_bit_format = %d, item = %d\n", __func__,
2705 tdm_rx_cfg[port.mode][port.channel].bit_format,
2706 ucontrol->value.enumerated.item[0]);
2707 }
2708 return ret;
2709}
2710
2711static int tdm_rx_format_put(struct snd_kcontrol *kcontrol,
2712 struct snd_ctl_elem_value *ucontrol)
2713{
2714 struct tdm_port port;
2715 int ret = tdm_get_port_idx(kcontrol, &port);
2716
2717 if (ret) {
2718 pr_err("%s: unsupported control: %s\n",
2719 __func__, kcontrol->id.name);
2720 } else {
2721 tdm_rx_cfg[port.mode][port.channel].bit_format =
2722 tdm_get_format(ucontrol->value.enumerated.item[0]);
2723
2724 pr_debug("%s: tdm_rx_bit_format = %d, item = %d\n", __func__,
2725 tdm_rx_cfg[port.mode][port.channel].bit_format,
2726 ucontrol->value.enumerated.item[0]);
2727 }
2728 return ret;
2729}
2730
2731static int tdm_tx_format_get(struct snd_kcontrol *kcontrol,
2732 struct snd_ctl_elem_value *ucontrol)
2733{
2734 struct tdm_port port;
2735 int ret = tdm_get_port_idx(kcontrol, &port);
2736
2737 if (ret) {
2738 pr_err("%s: unsupported control: %s\n",
2739 __func__, kcontrol->id.name);
2740 } else {
2741 ucontrol->value.enumerated.item[0] = tdm_get_format_val(
2742 tdm_tx_cfg[port.mode][port.channel].bit_format);
2743
2744 pr_debug("%s: tdm_tx_bit_format = %d, item = %d\n", __func__,
2745 tdm_tx_cfg[port.mode][port.channel].bit_format,
2746 ucontrol->value.enumerated.item[0]);
2747 }
2748 return ret;
2749}
2750
2751static int tdm_tx_format_put(struct snd_kcontrol *kcontrol,
2752 struct snd_ctl_elem_value *ucontrol)
2753{
2754 struct tdm_port port;
2755 int ret = tdm_get_port_idx(kcontrol, &port);
2756
2757 if (ret) {
2758 pr_err("%s: unsupported control: %s\n",
2759 __func__, kcontrol->id.name);
2760 } else {
2761 tdm_tx_cfg[port.mode][port.channel].bit_format =
2762 tdm_get_format(ucontrol->value.enumerated.item[0]);
2763
2764 pr_debug("%s: tdm_tx_bit_format = %d, item = %d\n", __func__,
2765 tdm_tx_cfg[port.mode][port.channel].bit_format,
2766 ucontrol->value.enumerated.item[0]);
2767 }
2768 return ret;
2769}
2770
2771static int tdm_rx_ch_get(struct snd_kcontrol *kcontrol,
2772 struct snd_ctl_elem_value *ucontrol)
2773{
2774 struct tdm_port port;
2775 int ret = tdm_get_port_idx(kcontrol, &port);
2776
2777 if (ret) {
2778 pr_err("%s: unsupported control: %s\n",
2779 __func__, kcontrol->id.name);
2780 } else {
2781
2782 ucontrol->value.enumerated.item[0] =
2783 tdm_rx_cfg[port.mode][port.channel].channels - 1;
2784
2785 pr_debug("%s: tdm_rx_ch = %d, item = %d\n", __func__,
2786 tdm_rx_cfg[port.mode][port.channel].channels - 1,
2787 ucontrol->value.enumerated.item[0]);
2788 }
2789 return ret;
2790}
2791
2792static int tdm_rx_ch_put(struct snd_kcontrol *kcontrol,
2793 struct snd_ctl_elem_value *ucontrol)
2794{
2795 struct tdm_port port;
2796 int ret = tdm_get_port_idx(kcontrol, &port);
2797
2798 if (ret) {
2799 pr_err("%s: unsupported control: %s\n",
2800 __func__, kcontrol->id.name);
2801 } else {
2802 tdm_rx_cfg[port.mode][port.channel].channels =
2803 ucontrol->value.enumerated.item[0] + 1;
2804
2805 pr_debug("%s: tdm_rx_ch = %d, item = %d\n", __func__,
2806 tdm_rx_cfg[port.mode][port.channel].channels,
2807 ucontrol->value.enumerated.item[0] + 1);
2808 }
2809 return ret;
2810}
2811
2812static int tdm_tx_ch_get(struct snd_kcontrol *kcontrol,
2813 struct snd_ctl_elem_value *ucontrol)
2814{
2815 struct tdm_port port;
2816 int ret = tdm_get_port_idx(kcontrol, &port);
2817
2818 if (ret) {
2819 pr_err("%s: unsupported control: %s\n",
2820 __func__, kcontrol->id.name);
2821 } else {
2822 ucontrol->value.enumerated.item[0] =
2823 tdm_tx_cfg[port.mode][port.channel].channels - 1;
2824
2825 pr_debug("%s: tdm_tx_ch = %d, item = %d\n", __func__,
2826 tdm_tx_cfg[port.mode][port.channel].channels - 1,
2827 ucontrol->value.enumerated.item[0]);
2828 }
2829 return ret;
2830}
2831
2832static int tdm_tx_ch_put(struct snd_kcontrol *kcontrol,
2833 struct snd_ctl_elem_value *ucontrol)
2834{
2835 struct tdm_port port;
2836 int ret = tdm_get_port_idx(kcontrol, &port);
2837
2838 if (ret) {
2839 pr_err("%s: unsupported control: %s\n",
2840 __func__, kcontrol->id.name);
2841 } else {
2842 tdm_tx_cfg[port.mode][port.channel].channels =
2843 ucontrol->value.enumerated.item[0] + 1;
2844
2845 pr_debug("%s: tdm_tx_ch = %d, item = %d\n", __func__,
2846 tdm_tx_cfg[port.mode][port.channel].channels,
2847 ucontrol->value.enumerated.item[0] + 1);
2848 }
2849 return ret;
2850}
2851
2852static int aux_pcm_get_port_idx(struct snd_kcontrol *kcontrol)
2853{
2854 int idx;
2855
2856 if (strnstr(kcontrol->id.name, "PRIM_AUX_PCM",
2857 sizeof("PRIM_AUX_PCM"))) {
2858 idx = PRIM_AUX_PCM;
2859 } else if (strnstr(kcontrol->id.name, "SEC_AUX_PCM",
2860 sizeof("SEC_AUX_PCM"))) {
2861 idx = SEC_AUX_PCM;
2862 } else if (strnstr(kcontrol->id.name, "TERT_AUX_PCM",
2863 sizeof("TERT_AUX_PCM"))) {
2864 idx = TERT_AUX_PCM;
2865 } else if (strnstr(kcontrol->id.name, "QUAT_AUX_PCM",
2866 sizeof("QUAT_AUX_PCM"))) {
2867 idx = QUAT_AUX_PCM;
2868 } else if (strnstr(kcontrol->id.name, "QUIN_AUX_PCM",
2869 sizeof("QUIN_AUX_PCM"))) {
2870 idx = QUIN_AUX_PCM;
2871 } else {
2872 pr_err("%s: unsupported port: %s\n",
2873 __func__, kcontrol->id.name);
2874 idx = -EINVAL;
2875 }
2876
2877 return idx;
2878}
2879
2880static int aux_pcm_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
2881 struct snd_ctl_elem_value *ucontrol)
2882{
2883 int idx = aux_pcm_get_port_idx(kcontrol);
2884
2885 if (idx < 0)
2886 return idx;
2887
2888 aux_pcm_rx_cfg[idx].sample_rate =
2889 aux_pcm_get_sample_rate(ucontrol->value.enumerated.item[0]);
2890
2891 pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
2892 idx, aux_pcm_rx_cfg[idx].sample_rate,
2893 ucontrol->value.enumerated.item[0]);
2894
2895 return 0;
2896}
2897
2898static int aux_pcm_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
2899 struct snd_ctl_elem_value *ucontrol)
2900{
2901 int idx = aux_pcm_get_port_idx(kcontrol);
2902
2903 if (idx < 0)
2904 return idx;
2905
2906 ucontrol->value.enumerated.item[0] =
2907 aux_pcm_get_sample_rate_val(aux_pcm_rx_cfg[idx].sample_rate);
2908
2909 pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
2910 idx, aux_pcm_rx_cfg[idx].sample_rate,
2911 ucontrol->value.enumerated.item[0]);
2912
2913 return 0;
2914}
2915
2916static int aux_pcm_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
2917 struct snd_ctl_elem_value *ucontrol)
2918{
2919 int idx = aux_pcm_get_port_idx(kcontrol);
2920
2921 if (idx < 0)
2922 return idx;
2923
2924 aux_pcm_tx_cfg[idx].sample_rate =
2925 aux_pcm_get_sample_rate(ucontrol->value.enumerated.item[0]);
2926
2927 pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
2928 idx, aux_pcm_tx_cfg[idx].sample_rate,
2929 ucontrol->value.enumerated.item[0]);
2930
2931 return 0;
2932}
2933
2934static int aux_pcm_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
2935 struct snd_ctl_elem_value *ucontrol)
2936{
2937 int idx = aux_pcm_get_port_idx(kcontrol);
2938
2939 if (idx < 0)
2940 return idx;
2941
2942 ucontrol->value.enumerated.item[0] =
2943 aux_pcm_get_sample_rate_val(aux_pcm_tx_cfg[idx].sample_rate);
2944
2945 pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
2946 idx, aux_pcm_tx_cfg[idx].sample_rate,
2947 ucontrol->value.enumerated.item[0]);
2948
2949 return 0;
2950}
2951
2952static int mi2s_get_port_idx(struct snd_kcontrol *kcontrol)
2953{
2954 int idx;
2955
2956 if (strnstr(kcontrol->id.name, "PRIM_MI2S_RX",
2957 sizeof("PRIM_MI2S_RX"))) {
2958 idx = PRIM_MI2S;
2959 } else if (strnstr(kcontrol->id.name, "SEC_MI2S_RX",
2960 sizeof("SEC_MI2S_RX"))) {
2961 idx = SEC_MI2S;
2962 } else if (strnstr(kcontrol->id.name, "TERT_MI2S_RX",
2963 sizeof("TERT_MI2S_RX"))) {
2964 idx = TERT_MI2S;
2965 } else if (strnstr(kcontrol->id.name, "QUAT_MI2S_RX",
2966 sizeof("QUAT_MI2S_RX"))) {
2967 idx = QUAT_MI2S;
2968 } else if (strnstr(kcontrol->id.name, "QUIN_MI2S_RX",
2969 sizeof("QUIN_MI2S_RX"))) {
2970 idx = QUIN_MI2S;
2971 } else if (strnstr(kcontrol->id.name, "PRIM_MI2S_TX",
2972 sizeof("PRIM_MI2S_TX"))) {
2973 idx = PRIM_MI2S;
2974 } else if (strnstr(kcontrol->id.name, "SEC_MI2S_TX",
2975 sizeof("SEC_MI2S_TX"))) {
2976 idx = SEC_MI2S;
2977 } else if (strnstr(kcontrol->id.name, "TERT_MI2S_TX",
2978 sizeof("TERT_MI2S_TX"))) {
2979 idx = TERT_MI2S;
2980 } else if (strnstr(kcontrol->id.name, "QUAT_MI2S_TX",
2981 sizeof("QUAT_MI2S_TX"))) {
2982 idx = QUAT_MI2S;
2983 } else if (strnstr(kcontrol->id.name, "QUIN_MI2S_TX",
2984 sizeof("QUIN_MI2S_TX"))) {
2985 idx = QUIN_MI2S;
2986 } else {
2987 pr_err("%s: unsupported channel: %s\n",
2988 __func__, kcontrol->id.name);
2989 idx = -EINVAL;
2990 }
2991
2992 return idx;
2993}
2994
2995static int mi2s_get_sample_rate_val(int sample_rate)
2996{
2997 int sample_rate_val;
2998
2999 switch (sample_rate) {
3000 case SAMPLING_RATE_8KHZ:
3001 sample_rate_val = 0;
3002 break;
3003 case SAMPLING_RATE_11P025KHZ:
3004 sample_rate_val = 1;
3005 break;
3006 case SAMPLING_RATE_16KHZ:
3007 sample_rate_val = 2;
3008 break;
3009 case SAMPLING_RATE_22P05KHZ:
3010 sample_rate_val = 3;
3011 break;
3012 case SAMPLING_RATE_32KHZ:
3013 sample_rate_val = 4;
3014 break;
3015 case SAMPLING_RATE_44P1KHZ:
3016 sample_rate_val = 5;
3017 break;
3018 case SAMPLING_RATE_48KHZ:
3019 sample_rate_val = 6;
3020 break;
3021 case SAMPLING_RATE_96KHZ:
3022 sample_rate_val = 7;
3023 break;
3024 case SAMPLING_RATE_192KHZ:
3025 sample_rate_val = 8;
3026 break;
3027 default:
3028 sample_rate_val = 6;
3029 break;
3030 }
3031 return sample_rate_val;
3032}
3033
3034static int mi2s_get_sample_rate(int value)
3035{
3036 int sample_rate;
3037
3038 switch (value) {
3039 case 0:
3040 sample_rate = SAMPLING_RATE_8KHZ;
3041 break;
3042 case 1:
3043 sample_rate = SAMPLING_RATE_11P025KHZ;
3044 break;
3045 case 2:
3046 sample_rate = SAMPLING_RATE_16KHZ;
3047 break;
3048 case 3:
3049 sample_rate = SAMPLING_RATE_22P05KHZ;
3050 break;
3051 case 4:
3052 sample_rate = SAMPLING_RATE_32KHZ;
3053 break;
3054 case 5:
3055 sample_rate = SAMPLING_RATE_44P1KHZ;
3056 break;
3057 case 6:
3058 sample_rate = SAMPLING_RATE_48KHZ;
3059 break;
3060 case 7:
3061 sample_rate = SAMPLING_RATE_96KHZ;
3062 break;
3063 case 8:
3064 sample_rate = SAMPLING_RATE_192KHZ;
3065 break;
3066 default:
3067 sample_rate = SAMPLING_RATE_48KHZ;
3068 break;
3069 }
3070 return sample_rate;
3071}
3072
3073static int mi2s_auxpcm_get_format(int value)
3074{
3075 int format;
3076
3077 switch (value) {
3078 case 0:
3079 format = SNDRV_PCM_FORMAT_S16_LE;
3080 break;
3081 case 1:
3082 format = SNDRV_PCM_FORMAT_S24_LE;
3083 break;
3084 case 2:
3085 format = SNDRV_PCM_FORMAT_S24_3LE;
3086 break;
3087 case 3:
3088 format = SNDRV_PCM_FORMAT_S32_LE;
3089 break;
3090 default:
3091 format = SNDRV_PCM_FORMAT_S16_LE;
3092 break;
3093 }
3094 return format;
3095}
3096
3097static int mi2s_auxpcm_get_format_value(int format)
3098{
3099 int value;
3100
3101 switch (format) {
3102 case SNDRV_PCM_FORMAT_S16_LE:
3103 value = 0;
3104 break;
3105 case SNDRV_PCM_FORMAT_S24_LE:
3106 value = 1;
3107 break;
3108 case SNDRV_PCM_FORMAT_S24_3LE:
3109 value = 2;
3110 break;
3111 case SNDRV_PCM_FORMAT_S32_LE:
3112 value = 3;
3113 break;
3114 default:
3115 value = 0;
3116 break;
3117 }
3118 return value;
3119}
3120
3121static int mi2s_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
3122 struct snd_ctl_elem_value *ucontrol)
3123{
3124 int idx = mi2s_get_port_idx(kcontrol);
3125
3126 if (idx < 0)
3127 return idx;
3128
3129 mi2s_rx_cfg[idx].sample_rate =
3130 mi2s_get_sample_rate(ucontrol->value.enumerated.item[0]);
3131
3132 pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
3133 idx, mi2s_rx_cfg[idx].sample_rate,
3134 ucontrol->value.enumerated.item[0]);
3135
3136 return 0;
3137}
3138
3139static int mi2s_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
3140 struct snd_ctl_elem_value *ucontrol)
3141{
3142 int idx = mi2s_get_port_idx(kcontrol);
3143
3144 if (idx < 0)
3145 return idx;
3146
3147 ucontrol->value.enumerated.item[0] =
3148 mi2s_get_sample_rate_val(mi2s_rx_cfg[idx].sample_rate);
3149
3150 pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
3151 idx, mi2s_rx_cfg[idx].sample_rate,
3152 ucontrol->value.enumerated.item[0]);
3153
3154 return 0;
3155}
3156
3157static int mi2s_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
3158 struct snd_ctl_elem_value *ucontrol)
3159{
3160 int idx = mi2s_get_port_idx(kcontrol);
3161
3162 if (idx < 0)
3163 return idx;
3164
3165 mi2s_tx_cfg[idx].sample_rate =
3166 mi2s_get_sample_rate(ucontrol->value.enumerated.item[0]);
3167
3168 pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
3169 idx, mi2s_tx_cfg[idx].sample_rate,
3170 ucontrol->value.enumerated.item[0]);
3171
3172 return 0;
3173}
3174
3175static int mi2s_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
3176 struct snd_ctl_elem_value *ucontrol)
3177{
3178 int idx = mi2s_get_port_idx(kcontrol);
3179
3180 if (idx < 0)
3181 return idx;
3182
3183 ucontrol->value.enumerated.item[0] =
3184 mi2s_get_sample_rate_val(mi2s_tx_cfg[idx].sample_rate);
3185
3186 pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
3187 idx, mi2s_tx_cfg[idx].sample_rate,
3188 ucontrol->value.enumerated.item[0]);
3189
3190 return 0;
3191}
3192
3193static int msm_mi2s_rx_ch_get(struct snd_kcontrol *kcontrol,
3194 struct snd_ctl_elem_value *ucontrol)
3195{
3196 int idx = mi2s_get_port_idx(kcontrol);
3197
3198 if (idx < 0)
3199 return idx;
3200
3201 pr_debug("%s: msm_mi2s_[%d]_rx_ch = %d\n", __func__,
3202 idx, mi2s_rx_cfg[idx].channels);
3203 ucontrol->value.enumerated.item[0] = mi2s_rx_cfg[idx].channels - 1;
3204
3205 return 0;
3206}
3207
3208static int msm_mi2s_rx_ch_put(struct snd_kcontrol *kcontrol,
3209 struct snd_ctl_elem_value *ucontrol)
3210{
3211 int idx = mi2s_get_port_idx(kcontrol);
3212
3213 if (idx < 0)
3214 return idx;
3215
3216 mi2s_rx_cfg[idx].channels = ucontrol->value.enumerated.item[0] + 1;
3217 pr_debug("%s: msm_mi2s_[%d]_rx_ch = %d\n", __func__,
3218 idx, mi2s_rx_cfg[idx].channels);
3219
3220 return 1;
3221}
3222
3223static int msm_mi2s_tx_ch_get(struct snd_kcontrol *kcontrol,
3224 struct snd_ctl_elem_value *ucontrol)
3225{
3226 int idx = mi2s_get_port_idx(kcontrol);
3227
3228 if (idx < 0)
3229 return idx;
3230
3231 pr_debug("%s: msm_mi2s_[%d]_tx_ch = %d\n", __func__,
3232 idx, mi2s_tx_cfg[idx].channels);
3233 ucontrol->value.enumerated.item[0] = mi2s_tx_cfg[idx].channels - 1;
3234
3235 return 0;
3236}
3237
3238static int msm_mi2s_tx_ch_put(struct snd_kcontrol *kcontrol,
3239 struct snd_ctl_elem_value *ucontrol)
3240{
3241 int idx = mi2s_get_port_idx(kcontrol);
3242
3243 if (idx < 0)
3244 return idx;
3245
3246 mi2s_tx_cfg[idx].channels = ucontrol->value.enumerated.item[0] + 1;
3247 pr_debug("%s: msm_mi2s_[%d]_tx_ch = %d\n", __func__,
3248 idx, mi2s_tx_cfg[idx].channels);
3249
3250 return 1;
3251}
3252
3253static int msm_mi2s_rx_format_get(struct snd_kcontrol *kcontrol,
3254 struct snd_ctl_elem_value *ucontrol)
3255{
3256 int idx = mi2s_get_port_idx(kcontrol);
3257
3258 if (idx < 0)
3259 return idx;
3260
3261 ucontrol->value.enumerated.item[0] =
3262 mi2s_auxpcm_get_format_value(mi2s_rx_cfg[idx].bit_format);
3263
3264 pr_debug("%s: idx[%d]_rx_format = %d, item = %d\n", __func__,
3265 idx, mi2s_rx_cfg[idx].bit_format,
3266 ucontrol->value.enumerated.item[0]);
3267
3268 return 0;
3269}
3270
3271static int msm_mi2s_rx_format_put(struct snd_kcontrol *kcontrol,
3272 struct snd_ctl_elem_value *ucontrol)
3273{
3274 int idx = mi2s_get_port_idx(kcontrol);
3275
3276 if (idx < 0)
3277 return idx;
3278
3279 mi2s_rx_cfg[idx].bit_format =
3280 mi2s_auxpcm_get_format(ucontrol->value.enumerated.item[0]);
3281
3282 pr_debug("%s: idx[%d]_rx_format = %d, item = %d\n", __func__,
3283 idx, mi2s_rx_cfg[idx].bit_format,
3284 ucontrol->value.enumerated.item[0]);
3285
3286 return 0;
3287}
3288
3289static int msm_mi2s_tx_format_get(struct snd_kcontrol *kcontrol,
3290 struct snd_ctl_elem_value *ucontrol)
3291{
3292 int idx = mi2s_get_port_idx(kcontrol);
3293
3294 if (idx < 0)
3295 return idx;
3296
3297 ucontrol->value.enumerated.item[0] =
3298 mi2s_auxpcm_get_format_value(mi2s_tx_cfg[idx].bit_format);
3299
3300 pr_debug("%s: idx[%d]_tx_format = %d, item = %d\n", __func__,
3301 idx, mi2s_tx_cfg[idx].bit_format,
3302 ucontrol->value.enumerated.item[0]);
3303
3304 return 0;
3305}
3306
3307static int msm_mi2s_tx_format_put(struct snd_kcontrol *kcontrol,
3308 struct snd_ctl_elem_value *ucontrol)
3309{
3310 int idx = mi2s_get_port_idx(kcontrol);
3311
3312 if (idx < 0)
3313 return idx;
3314
3315 mi2s_tx_cfg[idx].bit_format =
3316 mi2s_auxpcm_get_format(ucontrol->value.enumerated.item[0]);
3317
3318 pr_debug("%s: idx[%d]_tx_format = %d, item = %d\n", __func__,
3319 idx, mi2s_tx_cfg[idx].bit_format,
3320 ucontrol->value.enumerated.item[0]);
3321
3322 return 0;
3323}
3324
3325static int msm_aux_pcm_rx_format_get(struct snd_kcontrol *kcontrol,
3326 struct snd_ctl_elem_value *ucontrol)
3327{
3328 int idx = aux_pcm_get_port_idx(kcontrol);
3329
3330 if (idx < 0)
3331 return idx;
3332
3333 ucontrol->value.enumerated.item[0] =
3334 mi2s_auxpcm_get_format_value(aux_pcm_rx_cfg[idx].bit_format);
3335
3336 pr_debug("%s: idx[%d]_rx_format = %d, item = %d\n", __func__,
3337 idx, aux_pcm_rx_cfg[idx].bit_format,
3338 ucontrol->value.enumerated.item[0]);
3339
3340 return 0;
3341}
3342
3343static int msm_aux_pcm_rx_format_put(struct snd_kcontrol *kcontrol,
3344 struct snd_ctl_elem_value *ucontrol)
3345{
3346 int idx = aux_pcm_get_port_idx(kcontrol);
3347
3348 if (idx < 0)
3349 return idx;
3350
3351 aux_pcm_rx_cfg[idx].bit_format =
3352 mi2s_auxpcm_get_format(ucontrol->value.enumerated.item[0]);
3353
3354 pr_debug("%s: idx[%d]_rx_format = %d, item = %d\n", __func__,
3355 idx, aux_pcm_rx_cfg[idx].bit_format,
3356 ucontrol->value.enumerated.item[0]);
3357
3358 return 0;
3359}
3360
3361static int msm_aux_pcm_tx_format_get(struct snd_kcontrol *kcontrol,
3362 struct snd_ctl_elem_value *ucontrol)
3363{
3364 int idx = aux_pcm_get_port_idx(kcontrol);
3365
3366 if (idx < 0)
3367 return idx;
3368
3369 ucontrol->value.enumerated.item[0] =
3370 mi2s_auxpcm_get_format_value(aux_pcm_tx_cfg[idx].bit_format);
3371
3372 pr_debug("%s: idx[%d]_tx_format = %d, item = %d\n", __func__,
3373 idx, aux_pcm_tx_cfg[idx].bit_format,
3374 ucontrol->value.enumerated.item[0]);
3375
3376 return 0;
3377}
3378
3379static int msm_aux_pcm_tx_format_put(struct snd_kcontrol *kcontrol,
3380 struct snd_ctl_elem_value *ucontrol)
3381{
3382 int idx = aux_pcm_get_port_idx(kcontrol);
3383
3384 if (idx < 0)
3385 return idx;
3386
3387 aux_pcm_tx_cfg[idx].bit_format =
3388 mi2s_auxpcm_get_format(ucontrol->value.enumerated.item[0]);
3389
3390 pr_debug("%s: idx[%d]_tx_format = %d, item = %d\n", __func__,
3391 idx, aux_pcm_tx_cfg[idx].bit_format,
3392 ucontrol->value.enumerated.item[0]);
3393
3394 return 0;
3395}
3396
3397static int msm_hifi_ctrl(struct snd_soc_codec *codec)
3398{
3399 struct snd_soc_dapm_context *dapm = snd_soc_codec_get_dapm(codec);
3400 struct snd_soc_card *card = codec->component.card;
3401 struct msm_asoc_mach_data *pdata =
3402 snd_soc_card_get_drvdata(card);
3403
3404 dev_dbg(codec->dev, "%s: msm_hifi_control = %d\n", __func__,
3405 msm_hifi_control);
3406
3407 if (!pdata || !pdata->hph_en1_gpio_p) {
3408 dev_err(codec->dev, "%s: hph_en1_gpio is invalid\n", __func__);
3409 return -EINVAL;
3410 }
3411 if (msm_hifi_control == MSM_HIFI_ON) {
3412 msm_cdc_pinctrl_select_active_state(pdata->hph_en1_gpio_p);
3413 /* 5msec delay needed as per HW requirement */
3414 usleep_range(5000, 5010);
3415 } else {
3416 msm_cdc_pinctrl_select_sleep_state(pdata->hph_en1_gpio_p);
3417 }
3418 snd_soc_dapm_sync(dapm);
3419
3420 return 0;
3421}
3422
3423static int msm_hifi_get(struct snd_kcontrol *kcontrol,
3424 struct snd_ctl_elem_value *ucontrol)
3425{
3426 pr_debug("%s: msm_hifi_control = %d\n",
3427 __func__, msm_hifi_control);
3428 ucontrol->value.integer.value[0] = msm_hifi_control;
3429
3430 return 0;
3431}
3432
3433static int msm_hifi_put(struct snd_kcontrol *kcontrol,
3434 struct snd_ctl_elem_value *ucontrol)
3435{
3436 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
3437
3438 dev_dbg(codec->dev, "%s: ucontrol->value.integer.value[0] = %ld\n",
3439 __func__, ucontrol->value.integer.value[0]);
3440
3441 msm_hifi_control = ucontrol->value.integer.value[0];
3442 msm_hifi_ctrl(codec);
3443
3444 return 0;
3445}
3446
3447static const struct snd_kcontrol_new msm_int_snd_controls[] = {
3448 SOC_ENUM_EXT("WSA_CDC_DMA_RX_0 Channels", wsa_cdc_dma_rx_0_chs,
3449 cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
3450 SOC_ENUM_EXT("WSA_CDC_DMA_RX_1 Channels", wsa_cdc_dma_rx_1_chs,
3451 cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
3452 SOC_ENUM_EXT("RX_CDC_DMA_RX_0 Channels", rx_cdc_dma_rx_0_chs,
3453 cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
3454 SOC_ENUM_EXT("RX_CDC_DMA_RX_1 Channels", rx_cdc_dma_rx_1_chs,
3455 cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
3456 SOC_ENUM_EXT("RX_CDC_DMA_RX_2 Channels", rx_cdc_dma_rx_2_chs,
3457 cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
3458 SOC_ENUM_EXT("RX_CDC_DMA_RX_3 Channels", rx_cdc_dma_rx_3_chs,
3459 cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
3460 SOC_ENUM_EXT("RX_CDC_DMA_RX_5 Channels", rx_cdc_dma_rx_5_chs,
3461 cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
3462 SOC_ENUM_EXT("WSA_CDC_DMA_TX_0 Channels", wsa_cdc_dma_tx_0_chs,
3463 cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
3464 SOC_ENUM_EXT("WSA_CDC_DMA_TX_1 Channels", wsa_cdc_dma_tx_1_chs,
3465 cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
3466 SOC_ENUM_EXT("WSA_CDC_DMA_TX_2 Channels", wsa_cdc_dma_tx_2_chs,
3467 cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
3468 SOC_ENUM_EXT("TX_CDC_DMA_TX_0 Channels", tx_cdc_dma_tx_0_chs,
3469 cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
3470 SOC_ENUM_EXT("TX_CDC_DMA_TX_3 Channels", tx_cdc_dma_tx_3_chs,
3471 cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
3472 SOC_ENUM_EXT("TX_CDC_DMA_TX_4 Channels", tx_cdc_dma_tx_4_chs,
3473 cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
3474 SOC_ENUM_EXT("WSA_CDC_DMA_RX_0 Format", wsa_cdc_dma_rx_0_format,
3475 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
3476 SOC_ENUM_EXT("WSA_CDC_DMA_RX_1 Format", wsa_cdc_dma_rx_1_format,
3477 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
3478 SOC_ENUM_EXT("RX_CDC_DMA_RX_0 Format", rx_cdc_dma_rx_0_format,
3479 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
3480 SOC_ENUM_EXT("RX_CDC_DMA_RX_1 Format", rx_cdc_dma_rx_1_format,
3481 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
3482 SOC_ENUM_EXT("RX_CDC_DMA_RX_2 Format", rx_cdc_dma_rx_2_format,
3483 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
3484 SOC_ENUM_EXT("RX_CDC_DMA_RX_3 Format", rx_cdc_dma_rx_3_format,
3485 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
3486 SOC_ENUM_EXT("RX_CDC_DMA_RX_5 Format", rx_cdc_dma_rx_5_format,
3487 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
3488 SOC_ENUM_EXT("WSA_CDC_DMA_TX_1 Format", wsa_cdc_dma_tx_1_format,
3489 cdc_dma_tx_format_get, cdc_dma_tx_format_put),
3490 SOC_ENUM_EXT("WSA_CDC_DMA_TX_2 Format", wsa_cdc_dma_tx_2_format,
3491 cdc_dma_tx_format_get, cdc_dma_tx_format_put),
3492 SOC_ENUM_EXT("TX_CDC_DMA_TX_0 Format", tx_cdc_dma_tx_0_format,
3493 cdc_dma_tx_format_get, cdc_dma_tx_format_put),
3494 SOC_ENUM_EXT("TX_CDC_DMA_TX_3 Format", tx_cdc_dma_tx_3_format,
3495 cdc_dma_tx_format_get, cdc_dma_tx_format_put),
3496 SOC_ENUM_EXT("TX_CDC_DMA_TX_4 Format", tx_cdc_dma_tx_4_format,
3497 cdc_dma_tx_format_get, cdc_dma_tx_format_put),
3498 SOC_ENUM_EXT("WSA_CDC_DMA_RX_0 SampleRate",
3499 wsa_cdc_dma_rx_0_sample_rate,
3500 cdc_dma_rx_sample_rate_get,
3501 cdc_dma_rx_sample_rate_put),
3502 SOC_ENUM_EXT("WSA_CDC_DMA_RX_1 SampleRate",
3503 wsa_cdc_dma_rx_1_sample_rate,
3504 cdc_dma_rx_sample_rate_get,
3505 cdc_dma_rx_sample_rate_put),
3506 SOC_ENUM_EXT("RX_CDC_DMA_RX_0 SampleRate",
3507 rx_cdc_dma_rx_0_sample_rate,
3508 cdc_dma_rx_sample_rate_get,
3509 cdc_dma_rx_sample_rate_put),
3510 SOC_ENUM_EXT("RX_CDC_DMA_RX_1 SampleRate",
3511 rx_cdc_dma_rx_1_sample_rate,
3512 cdc_dma_rx_sample_rate_get,
3513 cdc_dma_rx_sample_rate_put),
3514 SOC_ENUM_EXT("RX_CDC_DMA_RX_2 SampleRate",
3515 rx_cdc_dma_rx_2_sample_rate,
3516 cdc_dma_rx_sample_rate_get,
3517 cdc_dma_rx_sample_rate_put),
3518 SOC_ENUM_EXT("RX_CDC_DMA_RX_3 SampleRate",
3519 rx_cdc_dma_rx_3_sample_rate,
3520 cdc_dma_rx_sample_rate_get,
3521 cdc_dma_rx_sample_rate_put),
3522 SOC_ENUM_EXT("RX_CDC_DMA_RX_5 SampleRate",
3523 rx_cdc_dma_rx_5_sample_rate,
3524 cdc_dma_rx_sample_rate_get,
3525 cdc_dma_rx_sample_rate_put),
3526 SOC_ENUM_EXT("WSA_CDC_DMA_TX_0 SampleRate",
3527 wsa_cdc_dma_tx_0_sample_rate,
3528 cdc_dma_tx_sample_rate_get,
3529 cdc_dma_tx_sample_rate_put),
3530 SOC_ENUM_EXT("WSA_CDC_DMA_TX_1 SampleRate",
3531 wsa_cdc_dma_tx_1_sample_rate,
3532 cdc_dma_tx_sample_rate_get,
3533 cdc_dma_tx_sample_rate_put),
3534 SOC_ENUM_EXT("WSA_CDC_DMA_TX_2 SampleRate",
3535 wsa_cdc_dma_tx_2_sample_rate,
3536 cdc_dma_tx_sample_rate_get,
3537 cdc_dma_tx_sample_rate_put),
3538 SOC_ENUM_EXT("TX_CDC_DMA_TX_0 SampleRate",
3539 tx_cdc_dma_tx_0_sample_rate,
3540 cdc_dma_tx_sample_rate_get,
3541 cdc_dma_tx_sample_rate_put),
3542 SOC_ENUM_EXT("TX_CDC_DMA_TX_3 SampleRate",
3543 tx_cdc_dma_tx_3_sample_rate,
3544 cdc_dma_tx_sample_rate_get,
3545 cdc_dma_tx_sample_rate_put),
3546 SOC_ENUM_EXT("TX_CDC_DMA_TX_4 SampleRate",
3547 tx_cdc_dma_tx_4_sample_rate,
3548 cdc_dma_tx_sample_rate_get,
3549 cdc_dma_tx_sample_rate_put),
3550};
3551
3552static const struct snd_kcontrol_new msm_tavil_snd_controls[] = {
3553 SOC_ENUM_EXT("SLIM_0_RX Channels", slim_0_rx_chs,
3554 slim_rx_ch_get, slim_rx_ch_put),
3555 SOC_ENUM_EXT("SLIM_2_RX Channels", slim_2_rx_chs,
3556 slim_rx_ch_get, slim_rx_ch_put),
3557 SOC_ENUM_EXT("SLIM_0_TX Channels", slim_0_tx_chs,
3558 slim_tx_ch_get, slim_tx_ch_put),
3559 SOC_ENUM_EXT("SLIM_1_TX Channels", slim_1_tx_chs,
3560 slim_tx_ch_get, slim_tx_ch_put),
3561 SOC_ENUM_EXT("SLIM_5_RX Channels", slim_5_rx_chs,
3562 slim_rx_ch_get, slim_rx_ch_put),
3563 SOC_ENUM_EXT("SLIM_6_RX Channels", slim_6_rx_chs,
3564 slim_rx_ch_get, slim_rx_ch_put),
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]3565 SOC_ENUM_EXT("SLIM_0_RX Format", slim_0_rx_format,
3566 slim_rx_bit_format_get, slim_rx_bit_format_put),
3567 SOC_ENUM_EXT("SLIM_5_RX Format", slim_5_rx_format,
3568 slim_rx_bit_format_get, slim_rx_bit_format_put),
3569 SOC_ENUM_EXT("SLIM_6_RX Format", slim_6_rx_format,
3570 slim_rx_bit_format_get, slim_rx_bit_format_put),
3571 SOC_ENUM_EXT("SLIM_0_TX Format", slim_0_tx_format,
3572 slim_tx_bit_format_get, slim_tx_bit_format_put),
3573 SOC_ENUM_EXT("SLIM_0_RX SampleRate", slim_0_rx_sample_rate,
3574 slim_rx_sample_rate_get, slim_rx_sample_rate_put),
3575 SOC_ENUM_EXT("SLIM_2_RX SampleRate", slim_2_rx_sample_rate,
3576 slim_rx_sample_rate_get, slim_rx_sample_rate_put),
3577 SOC_ENUM_EXT("SLIM_0_TX SampleRate", slim_0_tx_sample_rate,
3578 slim_tx_sample_rate_get, slim_tx_sample_rate_put),
3579 SOC_ENUM_EXT("SLIM_5_RX SampleRate", slim_5_rx_sample_rate,
3580 slim_rx_sample_rate_get, slim_rx_sample_rate_put),
3581 SOC_ENUM_EXT("SLIM_6_RX SampleRate", slim_6_rx_sample_rate,
3582 slim_rx_sample_rate_get, slim_rx_sample_rate_put),
3583};
3584
3585static const struct snd_kcontrol_new msm_common_snd_controls[] = {
3586 SOC_ENUM_EXT("USB_AUDIO_RX Channels", usb_rx_chs,
3587 usb_audio_rx_ch_get, usb_audio_rx_ch_put),
3588 SOC_ENUM_EXT("USB_AUDIO_TX Channels", usb_tx_chs,
3589 usb_audio_tx_ch_get, usb_audio_tx_ch_put),
3590 SOC_ENUM_EXT("Display Port RX Channels", ext_disp_rx_chs,
3591 ext_disp_rx_ch_get, ext_disp_rx_ch_put),
3592 SOC_ENUM_EXT("PROXY_RX Channels", proxy_rx_chs,
3593 proxy_rx_ch_get, proxy_rx_ch_put),
3594 SOC_ENUM_EXT("USB_AUDIO_RX Format", usb_rx_format,
3595 usb_audio_rx_format_get, usb_audio_rx_format_put),
3596 SOC_ENUM_EXT("USB_AUDIO_TX Format", usb_tx_format,
3597 usb_audio_tx_format_get, usb_audio_tx_format_put),
3598 SOC_ENUM_EXT("Display Port RX Bit Format", ext_disp_rx_format,
3599 ext_disp_rx_format_get, ext_disp_rx_format_put),
3600 SOC_ENUM_EXT("USB_AUDIO_RX SampleRate", usb_rx_sample_rate,
3601 usb_audio_rx_sample_rate_get,
3602 usb_audio_rx_sample_rate_put),
3603 SOC_ENUM_EXT("USB_AUDIO_TX SampleRate", usb_tx_sample_rate,
3604 usb_audio_tx_sample_rate_get,
3605 usb_audio_tx_sample_rate_put),
3606 SOC_ENUM_EXT("Display Port RX SampleRate", ext_disp_rx_sample_rate,
3607 ext_disp_rx_sample_rate_get,
3608 ext_disp_rx_sample_rate_put),
3609 SOC_ENUM_EXT("PRI_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
3610 tdm_rx_sample_rate_get,
3611 tdm_rx_sample_rate_put),
3612 SOC_ENUM_EXT("PRI_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
3613 tdm_tx_sample_rate_get,
3614 tdm_tx_sample_rate_put),
3615 SOC_ENUM_EXT("PRI_TDM_RX_0 Format", tdm_rx_format,
3616 tdm_rx_format_get,
3617 tdm_rx_format_put),
3618 SOC_ENUM_EXT("PRI_TDM_TX_0 Format", tdm_tx_format,
3619 tdm_tx_format_get,
3620 tdm_tx_format_put),
3621 SOC_ENUM_EXT("PRI_TDM_RX_0 Channels", tdm_rx_chs,
3622 tdm_rx_ch_get,
3623 tdm_rx_ch_put),
3624 SOC_ENUM_EXT("PRI_TDM_TX_0 Channels", tdm_tx_chs,
3625 tdm_tx_ch_get,
3626 tdm_tx_ch_put),
3627 SOC_ENUM_EXT("SEC_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
3628 tdm_rx_sample_rate_get,
3629 tdm_rx_sample_rate_put),
3630 SOC_ENUM_EXT("SEC_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
3631 tdm_tx_sample_rate_get,
3632 tdm_tx_sample_rate_put),
3633 SOC_ENUM_EXT("SEC_TDM_RX_0 Format", tdm_rx_format,
3634 tdm_rx_format_get,
3635 tdm_rx_format_put),
3636 SOC_ENUM_EXT("SEC_TDM_TX_0 Format", tdm_tx_format,
3637 tdm_tx_format_get,
3638 tdm_tx_format_put),
3639 SOC_ENUM_EXT("SEC_TDM_RX_0 Channels", tdm_rx_chs,
3640 tdm_rx_ch_get,
3641 tdm_rx_ch_put),
3642 SOC_ENUM_EXT("SEC_TDM_TX_0 Channels", tdm_tx_chs,
3643 tdm_tx_ch_get,
3644 tdm_tx_ch_put),
3645 SOC_ENUM_EXT("TERT_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
3646 tdm_rx_sample_rate_get,
3647 tdm_rx_sample_rate_put),
3648 SOC_ENUM_EXT("TERT_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
3649 tdm_tx_sample_rate_get,
3650 tdm_tx_sample_rate_put),
3651 SOC_ENUM_EXT("TERT_TDM_RX_0 Format", tdm_rx_format,
3652 tdm_rx_format_get,
3653 tdm_rx_format_put),
3654 SOC_ENUM_EXT("TERT_TDM_TX_0 Format", tdm_tx_format,
3655 tdm_tx_format_get,
3656 tdm_tx_format_put),
3657 SOC_ENUM_EXT("TERT_TDM_RX_0 Channels", tdm_rx_chs,
3658 tdm_rx_ch_get,
3659 tdm_rx_ch_put),
3660 SOC_ENUM_EXT("TERT_TDM_TX_0 Channels", tdm_tx_chs,
3661 tdm_tx_ch_get,
3662 tdm_tx_ch_put),
3663 SOC_ENUM_EXT("QUAT_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
3664 tdm_rx_sample_rate_get,
3665 tdm_rx_sample_rate_put),
3666 SOC_ENUM_EXT("QUAT_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
3667 tdm_tx_sample_rate_get,
3668 tdm_tx_sample_rate_put),
3669 SOC_ENUM_EXT("QUAT_TDM_RX_0 Format", tdm_rx_format,
3670 tdm_rx_format_get,
3671 tdm_rx_format_put),
3672 SOC_ENUM_EXT("QUAT_TDM_TX_0 Format", tdm_tx_format,
3673 tdm_tx_format_get,
3674 tdm_tx_format_put),
3675 SOC_ENUM_EXT("QUAT_TDM_RX_0 Channels", tdm_rx_chs,
3676 tdm_rx_ch_get,
3677 tdm_rx_ch_put),
3678 SOC_ENUM_EXT("QUAT_TDM_TX_0 Channels", tdm_tx_chs,
3679 tdm_tx_ch_get,
3680 tdm_tx_ch_put),
3681 SOC_ENUM_EXT("QUIN_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
3682 tdm_rx_sample_rate_get,
3683 tdm_rx_sample_rate_put),
3684 SOC_ENUM_EXT("QUIN_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
3685 tdm_tx_sample_rate_get,
3686 tdm_tx_sample_rate_put),
3687 SOC_ENUM_EXT("QUIN_TDM_RX_0 Format", tdm_rx_format,
3688 tdm_rx_format_get,
3689 tdm_rx_format_put),
3690 SOC_ENUM_EXT("QUIN_TDM_TX_0 Format", tdm_tx_format,
3691 tdm_tx_format_get,
3692 tdm_tx_format_put),
3693 SOC_ENUM_EXT("QUIN_TDM_RX_0 Channels", tdm_rx_chs,
3694 tdm_rx_ch_get,
3695 tdm_rx_ch_put),
3696 SOC_ENUM_EXT("QUIN_TDM_TX_0 Channels", tdm_tx_chs,
3697 tdm_tx_ch_get,
3698 tdm_tx_ch_put),
3699 SOC_ENUM_EXT("PRIM_AUX_PCM_RX SampleRate", prim_aux_pcm_rx_sample_rate,
3700 aux_pcm_rx_sample_rate_get,
3701 aux_pcm_rx_sample_rate_put),
3702 SOC_ENUM_EXT("SEC_AUX_PCM_RX SampleRate", sec_aux_pcm_rx_sample_rate,
3703 aux_pcm_rx_sample_rate_get,
3704 aux_pcm_rx_sample_rate_put),
3705 SOC_ENUM_EXT("TERT_AUX_PCM_RX SampleRate", tert_aux_pcm_rx_sample_rate,
3706 aux_pcm_rx_sample_rate_get,
3707 aux_pcm_rx_sample_rate_put),
3708 SOC_ENUM_EXT("QUAT_AUX_PCM_RX SampleRate", quat_aux_pcm_rx_sample_rate,
3709 aux_pcm_rx_sample_rate_get,
3710 aux_pcm_rx_sample_rate_put),
3711 SOC_ENUM_EXT("QUIN_AUX_PCM_RX SampleRate", quin_aux_pcm_rx_sample_rate,
3712 aux_pcm_rx_sample_rate_get,
3713 aux_pcm_rx_sample_rate_put),
3714 SOC_ENUM_EXT("PRIM_AUX_PCM_TX SampleRate", prim_aux_pcm_tx_sample_rate,
3715 aux_pcm_tx_sample_rate_get,
3716 aux_pcm_tx_sample_rate_put),
3717 SOC_ENUM_EXT("SEC_AUX_PCM_TX SampleRate", sec_aux_pcm_tx_sample_rate,
3718 aux_pcm_tx_sample_rate_get,
3719 aux_pcm_tx_sample_rate_put),
3720 SOC_ENUM_EXT("TERT_AUX_PCM_TX SampleRate", tert_aux_pcm_tx_sample_rate,
3721 aux_pcm_tx_sample_rate_get,
3722 aux_pcm_tx_sample_rate_put),
3723 SOC_ENUM_EXT("QUAT_AUX_PCM_TX SampleRate", quat_aux_pcm_tx_sample_rate,
3724 aux_pcm_tx_sample_rate_get,
3725 aux_pcm_tx_sample_rate_put),
3726 SOC_ENUM_EXT("QUIN_AUX_PCM_TX SampleRate", quin_aux_pcm_tx_sample_rate,
3727 aux_pcm_tx_sample_rate_get,
3728 aux_pcm_tx_sample_rate_put),
3729 SOC_ENUM_EXT("PRIM_MI2S_RX SampleRate", prim_mi2s_rx_sample_rate,
3730 mi2s_rx_sample_rate_get,
3731 mi2s_rx_sample_rate_put),
3732 SOC_ENUM_EXT("SEC_MI2S_RX SampleRate", sec_mi2s_rx_sample_rate,
3733 mi2s_rx_sample_rate_get,
3734 mi2s_rx_sample_rate_put),
3735 SOC_ENUM_EXT("TERT_MI2S_RX SampleRate", tert_mi2s_rx_sample_rate,
3736 mi2s_rx_sample_rate_get,
3737 mi2s_rx_sample_rate_put),
3738 SOC_ENUM_EXT("QUAT_MI2S_RX SampleRate", quat_mi2s_rx_sample_rate,
3739 mi2s_rx_sample_rate_get,
3740 mi2s_rx_sample_rate_put),
3741 SOC_ENUM_EXT("QUIN_MI2S_RX SampleRate", quin_mi2s_rx_sample_rate,
3742 mi2s_rx_sample_rate_get,
3743 mi2s_rx_sample_rate_put),
3744 SOC_ENUM_EXT("PRIM_MI2S_TX SampleRate", prim_mi2s_tx_sample_rate,
3745 mi2s_tx_sample_rate_get,
3746 mi2s_tx_sample_rate_put),
3747 SOC_ENUM_EXT("SEC_MI2S_TX SampleRate", sec_mi2s_tx_sample_rate,
3748 mi2s_tx_sample_rate_get,
3749 mi2s_tx_sample_rate_put),
3750 SOC_ENUM_EXT("TERT_MI2S_TX SampleRate", tert_mi2s_tx_sample_rate,
3751 mi2s_tx_sample_rate_get,
3752 mi2s_tx_sample_rate_put),
3753 SOC_ENUM_EXT("QUAT_MI2S_TX SampleRate", quat_mi2s_tx_sample_rate,
3754 mi2s_tx_sample_rate_get,
3755 mi2s_tx_sample_rate_put),
3756 SOC_ENUM_EXT("QUIN_MI2S_TX SampleRate", quin_mi2s_tx_sample_rate,
3757 mi2s_tx_sample_rate_get,
3758 mi2s_tx_sample_rate_put),
3759 SOC_ENUM_EXT("PRIM_MI2S_RX Channels", prim_mi2s_rx_chs,
3760 msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
3761 SOC_ENUM_EXT("PRIM_MI2S_TX Channels", prim_mi2s_tx_chs,
3762 msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
3763 SOC_ENUM_EXT("SEC_MI2S_RX Channels", sec_mi2s_rx_chs,
3764 msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
3765 SOC_ENUM_EXT("SEC_MI2S_TX Channels", sec_mi2s_tx_chs,
3766 msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
3767 SOC_ENUM_EXT("TERT_MI2S_RX Channels", tert_mi2s_rx_chs,
3768 msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
3769 SOC_ENUM_EXT("TERT_MI2S_TX Channels", tert_mi2s_tx_chs,
3770 msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
3771 SOC_ENUM_EXT("QUAT_MI2S_RX Channels", quat_mi2s_rx_chs,
3772 msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
3773 SOC_ENUM_EXT("QUAT_MI2S_TX Channels", quat_mi2s_tx_chs,
3774 msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
3775 SOC_ENUM_EXT("QUIN_MI2S_RX Channels", quin_mi2s_rx_chs,
3776 msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
3777 SOC_ENUM_EXT("QUIN_MI2S_TX Channels", quin_mi2s_tx_chs,
3778 msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
3779 SOC_ENUM_EXT("PRIM_MI2S_RX Format", mi2s_rx_format,
3780 msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
3781 SOC_ENUM_EXT("PRIM_MI2S_TX Format", mi2s_tx_format,
3782 msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
3783 SOC_ENUM_EXT("SEC_MI2S_RX Format", mi2s_rx_format,
3784 msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
3785 SOC_ENUM_EXT("SEC_MI2S_TX Format", mi2s_tx_format,
3786 msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
3787 SOC_ENUM_EXT("TERT_MI2S_RX Format", mi2s_rx_format,
3788 msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
3789 SOC_ENUM_EXT("TERT_MI2S_TX Format", mi2s_tx_format,
3790 msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
3791 SOC_ENUM_EXT("QUAT_MI2S_RX Format", mi2s_rx_format,
3792 msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
3793 SOC_ENUM_EXT("QUAT_MI2S_TX Format", mi2s_tx_format,
3794 msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
3795 SOC_ENUM_EXT("QUIN_MI2S_RX Format", mi2s_rx_format,
3796 msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
3797 SOC_ENUM_EXT("QUIN_MI2S_TX Format", mi2s_tx_format,
3798 msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
3799 SOC_ENUM_EXT("PRIM_AUX_PCM_RX Format", aux_pcm_rx_format,
3800 msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
3801 SOC_ENUM_EXT("PRIM_AUX_PCM_TX Format", aux_pcm_tx_format,
3802 msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
3803 SOC_ENUM_EXT("SEC_AUX_PCM_RX Format", aux_pcm_rx_format,
3804 msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
3805 SOC_ENUM_EXT("SEC_AUX_PCM_TX Format", aux_pcm_tx_format,
3806 msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
3807 SOC_ENUM_EXT("TERT_AUX_PCM_RX Format", aux_pcm_rx_format,
3808 msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
3809 SOC_ENUM_EXT("TERT_AUX_PCM_TX Format", aux_pcm_tx_format,
3810 msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
3811 SOC_ENUM_EXT("QUAT_AUX_PCM_RX Format", aux_pcm_rx_format,
3812 msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
3813 SOC_ENUM_EXT("QUAT_AUX_PCM_TX Format", aux_pcm_tx_format,
3814 msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
3815 SOC_ENUM_EXT("QUIN_AUX_PCM_RX Format", aux_pcm_rx_format,
3816 msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
3817 SOC_ENUM_EXT("QUIN_AUX_PCM_TX Format", aux_pcm_tx_format,
3818 msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
3819 SOC_ENUM_EXT("HiFi Function", hifi_function, msm_hifi_get,
3820 msm_hifi_put),
3821 SOC_ENUM_EXT("BT SampleRate", bt_sample_rate,
3822 msm_bt_sample_rate_get,
3823 msm_bt_sample_rate_put),
Sharad Sangle493a1b32018-09-19 15:52:15 +0530[diff] [blame]3824 SOC_ENUM_EXT("BT SampleRate RX", bt_sample_rate_rx,
3825 msm_bt_sample_rate_rx_get,
3826 msm_bt_sample_rate_rx_put),
3827 SOC_ENUM_EXT("BT SampleRate TX", bt_sample_rate_tx,
3828 msm_bt_sample_rate_tx_get,
3829 msm_bt_sample_rate_tx_put),
Vatsal Bucha89262e62018-08-31 11:57:09 +0530[diff] [blame]3830 SOC_ENUM_EXT("VI_FEED_TX Channels", vi_feed_tx_chs,
3831 msm_vi_feed_tx_ch_get, msm_vi_feed_tx_ch_put),
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]3832};
3833
3834static int msm_snd_enable_codec_ext_clk(struct snd_soc_codec *codec,
3835 int enable, bool dapm)
3836{
3837 int ret = 0;
3838
3839 if (!strcmp(dev_name(codec->dev), "tavil_codec")) {
3840 ret = tavil_cdc_mclk_enable(codec, enable);
3841 } else {
3842 dev_err(codec->dev, "%s: unknown codec to enable ext clk\n",
3843 __func__);
3844 ret = -EINVAL;
3845 }
3846 return ret;
3847}
3848
3849static int msm_snd_enable_codec_ext_tx_clk(struct snd_soc_codec *codec,
3850 int enable, bool dapm)
3851{
3852 int ret = 0;
3853
3854 if (!strcmp(dev_name(codec->dev), "tavil_codec")) {
3855 ret = tavil_cdc_mclk_tx_enable(codec, enable);
3856 } else {
3857 dev_err(codec->dev, "%s: unknown codec to enable TX ext clk\n",
3858 __func__);
3859 ret = -EINVAL;
3860 }
3861
3862 return ret;
3863}
3864
3865static int msm_mclk_tx_event(struct snd_soc_dapm_widget *w,
3866 struct snd_kcontrol *kcontrol, int event)
3867{
3868 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
3869
3870 pr_debug("%s: event = %d\n", __func__, event);
3871
3872 switch (event) {
3873 case SND_SOC_DAPM_PRE_PMU:
3874 return msm_snd_enable_codec_ext_tx_clk(codec, 1, true);
3875 case SND_SOC_DAPM_POST_PMD:
3876 return msm_snd_enable_codec_ext_tx_clk(codec, 0, true);
3877 }
3878 return 0;
3879}
3880
3881static int msm_mclk_event(struct snd_soc_dapm_widget *w,
3882 struct snd_kcontrol *kcontrol, int event)
3883{
3884 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
3885
3886 pr_debug("%s: event = %d\n", __func__, event);
3887
3888 switch (event) {
3889 case SND_SOC_DAPM_PRE_PMU:
3890 return msm_snd_enable_codec_ext_clk(codec, 1, true);
3891 case SND_SOC_DAPM_POST_PMD:
3892 return msm_snd_enable_codec_ext_clk(codec, 0, true);
3893 }
3894 return 0;
3895}
3896
3897static int msm_hifi_ctrl_event(struct snd_soc_dapm_widget *w,
3898 struct snd_kcontrol *k, int event)
3899{
3900 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
3901 struct snd_soc_card *card = codec->component.card;
3902 struct msm_asoc_mach_data *pdata =
3903 snd_soc_card_get_drvdata(card);
3904
3905 dev_dbg(codec->dev, "%s: msm_hifi_control = %d\n",
3906 __func__, msm_hifi_control);
3907
3908 if (!pdata || !pdata->hph_en0_gpio_p) {
3909 dev_err(codec->dev, "%s: hph_en0_gpio is invalid\n", __func__);
3910 return -EINVAL;
3911 }
3912
3913 if (msm_hifi_control != MSM_HIFI_ON) {
3914 dev_dbg(codec->dev, "%s: HiFi mixer control is not set\n",
3915 __func__);
3916 return 0;
3917 }
3918
3919 switch (event) {
3920 case SND_SOC_DAPM_POST_PMU:
3921 msm_cdc_pinctrl_select_active_state(pdata->hph_en0_gpio_p);
3922 break;
3923 case SND_SOC_DAPM_PRE_PMD:
3924 msm_cdc_pinctrl_select_sleep_state(pdata->hph_en0_gpio_p);
3925 break;
3926 }
3927
3928 return 0;
3929}
3930
3931static const struct snd_soc_dapm_widget msm_dapm_widgets_tavil[] = {
3932
3933 SND_SOC_DAPM_SUPPLY("MCLK", SND_SOC_NOPM, 0, 0,
3934 msm_mclk_event,
3935 SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
3936
3937 SND_SOC_DAPM_SUPPLY("MCLK TX", SND_SOC_NOPM, 0, 0,
3938 msm_mclk_tx_event, SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
3939
3940 SND_SOC_DAPM_SPK("Lineout_1 amp", NULL),
3941 SND_SOC_DAPM_SPK("Lineout_2 amp", NULL),
3942 SND_SOC_DAPM_SPK("hifi amp", msm_hifi_ctrl_event),
3943 SND_SOC_DAPM_MIC("Handset Mic", NULL),
3944 SND_SOC_DAPM_MIC("Headset Mic", NULL),
3945 SND_SOC_DAPM_MIC("ANCRight Headset Mic", NULL),
3946 SND_SOC_DAPM_MIC("ANCLeft Headset Mic", NULL),
3947 SND_SOC_DAPM_MIC("Analog Mic5", NULL),
3948
3949 SND_SOC_DAPM_MIC("Digital Mic0", NULL),
3950 SND_SOC_DAPM_MIC("Digital Mic1", NULL),
3951 SND_SOC_DAPM_MIC("Digital Mic2", NULL),
3952 SND_SOC_DAPM_MIC("Digital Mic3", NULL),
3953 SND_SOC_DAPM_MIC("Digital Mic4", NULL),
3954 SND_SOC_DAPM_MIC("Digital Mic5", NULL),
3955};
3956
3957static int msm_dmic_event(struct snd_soc_dapm_widget *w,
3958 struct snd_kcontrol *kcontrol, int event)
3959{
3960 struct msm_asoc_mach_data *pdata = NULL;
3961 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
3962 int ret = 0;
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]3963 u32 dmic_idx;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]3964 int *dmic_gpio_cnt;
3965 struct device_node *dmic_gpio;
3966 char *wname;
3967
3968 wname = strpbrk(w->name, "0123");
3969 if (!wname) {
3970 dev_err(codec->dev, "%s: widget not found\n", __func__);
3971 return -EINVAL;
3972 }
3973
3974 ret = kstrtouint(wname, 10, &dmic_idx);
3975 if (ret < 0) {
3976 dev_err(codec->dev, "%s: Invalid DMIC line on the codec\n",
3977 __func__);
3978 return -EINVAL;
3979 }
3980
3981 pdata = snd_soc_card_get_drvdata(codec->component.card);
3982
3983 switch (dmic_idx) {
3984 case 0:
3985 case 1:
3986 dmic_gpio_cnt = &dmic_0_1_gpio_cnt;
3987 dmic_gpio = pdata->dmic01_gpio_p;
3988 break;
3989 case 2:
3990 case 3:
3991 dmic_gpio_cnt = &dmic_2_3_gpio_cnt;
3992 dmic_gpio = pdata->dmic23_gpio_p;
3993 break;
3994 default:
3995 dev_err(codec->dev, "%s: Invalid DMIC Selection\n",
3996 __func__);
3997 return -EINVAL;
3998 }
3999
4000 dev_dbg(codec->dev, "%s: event %d DMIC%d dmic_gpio_cnt %d\n",
4001 __func__, event, dmic_idx, *dmic_gpio_cnt);
4002
4003 switch (event) {
4004 case SND_SOC_DAPM_PRE_PMU:
4005 (*dmic_gpio_cnt)++;
4006 if (*dmic_gpio_cnt == 1) {
4007 ret = msm_cdc_pinctrl_select_active_state(
4008 dmic_gpio);
4009 if (ret < 0) {
4010 pr_err("%s: gpio set cannot be activated %sd",
4011 __func__, "dmic_gpio");
4012 return ret;
4013 }
4014 }
4015
4016 break;
4017 case SND_SOC_DAPM_POST_PMD:
4018 (*dmic_gpio_cnt)--;
4019 if (*dmic_gpio_cnt == 0) {
4020 ret = msm_cdc_pinctrl_select_sleep_state(
4021 dmic_gpio);
4022 if (ret < 0) {
4023 pr_err("%s: gpio set cannot be de-activated %sd",
4024 __func__, "dmic_gpio");
4025 return ret;
4026 }
4027 }
4028 break;
4029 default:
4030 pr_err("%s: invalid DAPM event %d\n", __func__, event);
4031 return -EINVAL;
4032 }
4033 return 0;
4034}
4035
4036static const struct snd_soc_dapm_widget msm_int_dapm_widgets[] = {
4037 SND_SOC_DAPM_MIC("Analog Mic1", NULL),
4038 SND_SOC_DAPM_MIC("Analog Mic2", NULL),
4039 SND_SOC_DAPM_MIC("Analog Mic3", NULL),
4040 SND_SOC_DAPM_MIC("Analog Mic4", NULL),
4041 SND_SOC_DAPM_MIC("Digital Mic0", msm_dmic_event),
4042 SND_SOC_DAPM_MIC("Digital Mic1", msm_dmic_event),
4043 SND_SOC_DAPM_MIC("Digital Mic2", msm_dmic_event),
4044 SND_SOC_DAPM_MIC("Digital Mic3", msm_dmic_event),
4045};
4046
4047static inline int param_is_mask(int p)
4048{
4049 return (p >= SNDRV_PCM_HW_PARAM_FIRST_MASK) &&
4050 (p <= SNDRV_PCM_HW_PARAM_LAST_MASK);
4051}
4052
4053static inline struct snd_mask *param_to_mask(struct snd_pcm_hw_params *p,
4054 int n)
4055{
4056 return &(p->masks[n - SNDRV_PCM_HW_PARAM_FIRST_MASK]);
4057}
4058
4059static void param_set_mask(struct snd_pcm_hw_params *p, int n,
4060 unsigned int bit)
4061{
4062 if (bit >= SNDRV_MASK_MAX)
4063 return;
4064 if (param_is_mask(n)) {
4065 struct snd_mask *m = param_to_mask(p, n);
4066
4067 m->bits[0] = 0;
4068 m->bits[1] = 0;
4069 m->bits[bit >> 5] |= (1 << (bit & 31));
4070 }
4071}
4072
4073static int msm_slim_get_ch_from_beid(int32_t be_id)
4074{
4075 int ch_id = 0;
4076
4077 switch (be_id) {
4078 case MSM_BACKEND_DAI_SLIMBUS_0_RX:
4079 ch_id = SLIM_RX_0;
4080 break;
4081 case MSM_BACKEND_DAI_SLIMBUS_1_RX:
4082 ch_id = SLIM_RX_1;
4083 break;
4084 case MSM_BACKEND_DAI_SLIMBUS_2_RX:
4085 ch_id = SLIM_RX_2;
4086 break;
4087 case MSM_BACKEND_DAI_SLIMBUS_3_RX:
4088 ch_id = SLIM_RX_3;
4089 break;
4090 case MSM_BACKEND_DAI_SLIMBUS_4_RX:
4091 ch_id = SLIM_RX_4;
4092 break;
4093 case MSM_BACKEND_DAI_SLIMBUS_6_RX:
4094 ch_id = SLIM_RX_6;
4095 break;
4096 case MSM_BACKEND_DAI_SLIMBUS_0_TX:
4097 ch_id = SLIM_TX_0;
4098 break;
4099 case MSM_BACKEND_DAI_SLIMBUS_3_TX:
4100 ch_id = SLIM_TX_3;
4101 break;
4102 default:
4103 ch_id = SLIM_RX_0;
4104 break;
4105 }
4106
4107 return ch_id;
4108}
4109
4110static int msm_cdc_dma_get_idx_from_beid(int32_t be_id)
4111{
4112 int idx = 0;
4113
4114 switch (be_id) {
4115 case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_0:
4116 idx = WSA_CDC_DMA_RX_0;
4117 break;
4118 case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_0:
4119 idx = WSA_CDC_DMA_TX_0;
4120 break;
4121 case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_1:
4122 idx = WSA_CDC_DMA_RX_1;
4123 break;
4124 case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_1:
4125 idx = WSA_CDC_DMA_TX_1;
4126 break;
4127 case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_2:
4128 idx = WSA_CDC_DMA_TX_2;
4129 break;
4130 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_0:
4131 idx = RX_CDC_DMA_RX_0;
4132 break;
4133 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_1:
4134 idx = RX_CDC_DMA_RX_1;
4135 break;
4136 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_2:
4137 idx = RX_CDC_DMA_RX_2;
4138 break;
4139 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_3:
4140 idx = RX_CDC_DMA_RX_3;
4141 break;
4142 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_5:
4143 idx = RX_CDC_DMA_RX_5;
4144 break;
4145 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_0:
4146 idx = TX_CDC_DMA_TX_0;
4147 break;
4148 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_3:
4149 idx = TX_CDC_DMA_TX_3;
4150 break;
4151 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_4:
4152 idx = TX_CDC_DMA_TX_4;
4153 break;
4154 default:
4155 idx = RX_CDC_DMA_RX_0;
4156 break;
4157 }
4158
4159 return idx;
4160}
4161
4162static int msm_ext_disp_get_idx_from_beid(int32_t be_id)
4163{
4164 int idx = -EINVAL;
4165
4166 switch (be_id) {
4167 case MSM_BACKEND_DAI_DISPLAY_PORT_RX:
4168 idx = DP_RX_IDX;
4169 break;
4170 default:
4171 pr_err("%s: Incorrect ext_disp BE id %d\n", __func__, be_id);
4172 idx = -EINVAL;
4173 break;
4174 }
4175
4176 return idx;
4177}
4178
4179static int msm_be_hw_params_fixup(struct snd_soc_pcm_runtime *rtd,
4180 struct snd_pcm_hw_params *params)
4181{
4182 struct snd_soc_dai_link *dai_link = rtd->dai_link;
4183 struct snd_interval *rate = hw_param_interval(params,
4184 SNDRV_PCM_HW_PARAM_RATE);
4185 struct snd_interval *channels = hw_param_interval(params,
4186 SNDRV_PCM_HW_PARAM_CHANNELS);
4187 int rc = 0;
4188 int idx;
4189 void *config = NULL;
4190 struct snd_soc_codec *codec = NULL;
4191
4192 pr_debug("%s: format = %d, rate = %d\n",
4193 __func__, params_format(params), params_rate(params));
4194
4195 switch (dai_link->id) {
4196 case MSM_BACKEND_DAI_SLIMBUS_0_RX:
4197 case MSM_BACKEND_DAI_SLIMBUS_1_RX:
4198 case MSM_BACKEND_DAI_SLIMBUS_2_RX:
4199 case MSM_BACKEND_DAI_SLIMBUS_3_RX:
4200 case MSM_BACKEND_DAI_SLIMBUS_4_RX:
4201 case MSM_BACKEND_DAI_SLIMBUS_6_RX:
4202 idx = msm_slim_get_ch_from_beid(dai_link->id);
4203 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4204 slim_rx_cfg[idx].bit_format);
4205 rate->min = rate->max = slim_rx_cfg[idx].sample_rate;
4206 channels->min = channels->max = slim_rx_cfg[idx].channels;
4207 break;
4208
4209 case MSM_BACKEND_DAI_SLIMBUS_0_TX:
4210 case MSM_BACKEND_DAI_SLIMBUS_3_TX:
4211 idx = msm_slim_get_ch_from_beid(dai_link->id);
4212 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4213 slim_tx_cfg[idx].bit_format);
4214 rate->min = rate->max = slim_tx_cfg[idx].sample_rate;
4215 channels->min = channels->max = slim_tx_cfg[idx].channels;
4216 break;
4217
4218 case MSM_BACKEND_DAI_SLIMBUS_1_TX:
4219 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4220 slim_tx_cfg[1].bit_format);
4221 rate->min = rate->max = slim_tx_cfg[1].sample_rate;
4222 channels->min = channels->max = slim_tx_cfg[1].channels;
4223 break;
4224
4225 case MSM_BACKEND_DAI_SLIMBUS_4_TX:
4226 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4227 SNDRV_PCM_FORMAT_S32_LE);
4228 rate->min = rate->max = SAMPLING_RATE_8KHZ;
4229 channels->min = channels->max = msm_vi_feed_tx_ch;
4230 break;
4231
4232 case MSM_BACKEND_DAI_SLIMBUS_5_RX:
4233 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4234 slim_rx_cfg[5].bit_format);
4235 rate->min = rate->max = slim_rx_cfg[5].sample_rate;
4236 channels->min = channels->max = slim_rx_cfg[5].channels;
4237 break;
4238
4239 case MSM_BACKEND_DAI_SLIMBUS_5_TX:
4240 codec = rtd->codec;
4241 rate->min = rate->max = SAMPLING_RATE_16KHZ;
4242 channels->min = channels->max = 1;
4243
4244 config = msm_codec_fn.get_afe_config_fn(codec,
4245 AFE_SLIMBUS_SLAVE_PORT_CONFIG);
4246 if (config) {
4247 rc = afe_set_config(AFE_SLIMBUS_SLAVE_PORT_CONFIG,
4248 config, SLIMBUS_5_TX);
4249 if (rc)
4250 pr_err("%s: Failed to set slimbus slave port config %d\n",
4251 __func__, rc);
4252 }
4253 break;
4254
4255 case MSM_BACKEND_DAI_SLIMBUS_7_RX:
4256 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4257 slim_rx_cfg[SLIM_RX_7].bit_format);
4258 rate->min = rate->max = slim_rx_cfg[SLIM_RX_7].sample_rate;
4259 channels->min = channels->max =
4260 slim_rx_cfg[SLIM_RX_7].channels;
4261 break;
4262
4263 case MSM_BACKEND_DAI_SLIMBUS_7_TX:
4264 rate->min = rate->max = slim_tx_cfg[SLIM_TX_7].sample_rate;
4265 channels->min = channels->max =
4266 slim_tx_cfg[SLIM_TX_7].channels;
4267 break;
4268
4269 case MSM_BACKEND_DAI_SLIMBUS_8_TX:
4270 rate->min = rate->max = slim_tx_cfg[SLIM_TX_8].sample_rate;
4271 channels->min = channels->max =
4272 slim_tx_cfg[SLIM_TX_8].channels;
4273 break;
4274
4275 case MSM_BACKEND_DAI_USB_RX:
4276 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4277 usb_rx_cfg.bit_format);
4278 rate->min = rate->max = usb_rx_cfg.sample_rate;
4279 channels->min = channels->max = usb_rx_cfg.channels;
4280 break;
4281
4282 case MSM_BACKEND_DAI_USB_TX:
4283 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4284 usb_tx_cfg.bit_format);
4285 rate->min = rate->max = usb_tx_cfg.sample_rate;
4286 channels->min = channels->max = usb_tx_cfg.channels;
4287 break;
4288
4289 case MSM_BACKEND_DAI_DISPLAY_PORT_RX:
4290 idx = msm_ext_disp_get_idx_from_beid(dai_link->id);
4291 if (idx < 0) {
4292 pr_err("%s: Incorrect ext disp idx %d\n",
4293 __func__, idx);
4294 rc = idx;
4295 goto done;
4296 }
4297
4298 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4299 ext_disp_rx_cfg[idx].bit_format);
4300 rate->min = rate->max = ext_disp_rx_cfg[idx].sample_rate;
4301 channels->min = channels->max = ext_disp_rx_cfg[idx].channels;
4302 break;
4303
4304 case MSM_BACKEND_DAI_AFE_PCM_RX:
4305 channels->min = channels->max = proxy_rx_cfg.channels;
4306 rate->min = rate->max = SAMPLING_RATE_48KHZ;
4307 break;
4308
4309 case MSM_BACKEND_DAI_PRI_TDM_RX_0:
4310 channels->min = channels->max =
4311 tdm_rx_cfg[TDM_PRI][TDM_0].channels;
4312 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4313 tdm_rx_cfg[TDM_PRI][TDM_0].bit_format);
4314 rate->min = rate->max = tdm_rx_cfg[TDM_PRI][TDM_0].sample_rate;
4315 break;
4316
4317 case MSM_BACKEND_DAI_PRI_TDM_TX_0:
4318 channels->min = channels->max =
4319 tdm_tx_cfg[TDM_PRI][TDM_0].channels;
4320 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4321 tdm_tx_cfg[TDM_PRI][TDM_0].bit_format);
4322 rate->min = rate->max = tdm_tx_cfg[TDM_PRI][TDM_0].sample_rate;
4323 break;
4324
4325 case MSM_BACKEND_DAI_SEC_TDM_RX_0:
4326 channels->min = channels->max =
4327 tdm_rx_cfg[TDM_SEC][TDM_0].channels;
4328 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4329 tdm_rx_cfg[TDM_SEC][TDM_0].bit_format);
4330 rate->min = rate->max = tdm_rx_cfg[TDM_SEC][TDM_0].sample_rate;
4331 break;
4332
4333 case MSM_BACKEND_DAI_SEC_TDM_TX_0:
4334 channels->min = channels->max =
4335 tdm_tx_cfg[TDM_SEC][TDM_0].channels;
4336 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4337 tdm_tx_cfg[TDM_SEC][TDM_0].bit_format);
4338 rate->min = rate->max = tdm_tx_cfg[TDM_SEC][TDM_0].sample_rate;
4339 break;
4340
4341 case MSM_BACKEND_DAI_TERT_TDM_RX_0:
4342 channels->min = channels->max =
4343 tdm_rx_cfg[TDM_TERT][TDM_0].channels;
4344 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4345 tdm_rx_cfg[TDM_TERT][TDM_0].bit_format);
4346 rate->min = rate->max = tdm_rx_cfg[TDM_TERT][TDM_0].sample_rate;
4347 break;
4348
4349 case MSM_BACKEND_DAI_TERT_TDM_TX_0:
4350 channels->min = channels->max =
4351 tdm_tx_cfg[TDM_TERT][TDM_0].channels;
4352 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4353 tdm_tx_cfg[TDM_TERT][TDM_0].bit_format);
4354 rate->min = rate->max = tdm_tx_cfg[TDM_TERT][TDM_0].sample_rate;
4355 break;
4356
4357 case MSM_BACKEND_DAI_QUAT_TDM_RX_0:
4358 channels->min = channels->max =
4359 tdm_rx_cfg[TDM_QUAT][TDM_0].channels;
4360 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4361 tdm_rx_cfg[TDM_QUAT][TDM_0].bit_format);
4362 rate->min = rate->max = tdm_rx_cfg[TDM_QUAT][TDM_0].sample_rate;
4363 break;
4364
4365 case MSM_BACKEND_DAI_QUAT_TDM_TX_0:
4366 channels->min = channels->max =
4367 tdm_tx_cfg[TDM_QUAT][TDM_0].channels;
4368 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4369 tdm_tx_cfg[TDM_QUAT][TDM_0].bit_format);
4370 rate->min = rate->max = tdm_tx_cfg[TDM_QUAT][TDM_0].sample_rate;
4371 break;
4372
4373 case MSM_BACKEND_DAI_QUIN_TDM_RX_0:
4374 channels->min = channels->max =
4375 tdm_rx_cfg[TDM_QUIN][TDM_0].channels;
4376 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4377 tdm_rx_cfg[TDM_QUIN][TDM_0].bit_format);
4378 rate->min = rate->max = tdm_rx_cfg[TDM_QUIN][TDM_0].sample_rate;
4379 break;
4380
4381 case MSM_BACKEND_DAI_QUIN_TDM_TX_0:
4382 channels->min = channels->max =
4383 tdm_tx_cfg[TDM_QUIN][TDM_0].channels;
4384 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4385 tdm_tx_cfg[TDM_QUIN][TDM_0].bit_format);
4386 rate->min = rate->max = tdm_tx_cfg[TDM_QUIN][TDM_0].sample_rate;
4387 break;
4388
4389
4390 case MSM_BACKEND_DAI_AUXPCM_RX:
4391 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4392 aux_pcm_rx_cfg[PRIM_AUX_PCM].bit_format);
4393 rate->min = rate->max =
4394 aux_pcm_rx_cfg[PRIM_AUX_PCM].sample_rate;
4395 channels->min = channels->max =
4396 aux_pcm_rx_cfg[PRIM_AUX_PCM].channels;
4397 break;
4398
4399 case MSM_BACKEND_DAI_AUXPCM_TX:
4400 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4401 aux_pcm_tx_cfg[PRIM_AUX_PCM].bit_format);
4402 rate->min = rate->max =
4403 aux_pcm_tx_cfg[PRIM_AUX_PCM].sample_rate;
4404 channels->min = channels->max =
4405 aux_pcm_tx_cfg[PRIM_AUX_PCM].channels;
4406 break;
4407
4408 case MSM_BACKEND_DAI_SEC_AUXPCM_RX:
4409 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4410 aux_pcm_rx_cfg[SEC_AUX_PCM].bit_format);
4411 rate->min = rate->max =
4412 aux_pcm_rx_cfg[SEC_AUX_PCM].sample_rate;
4413 channels->min = channels->max =
4414 aux_pcm_rx_cfg[SEC_AUX_PCM].channels;
4415 break;
4416
4417 case MSM_BACKEND_DAI_SEC_AUXPCM_TX:
4418 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4419 aux_pcm_tx_cfg[SEC_AUX_PCM].bit_format);
4420 rate->min = rate->max =
4421 aux_pcm_tx_cfg[SEC_AUX_PCM].sample_rate;
4422 channels->min = channels->max =
4423 aux_pcm_tx_cfg[SEC_AUX_PCM].channels;
4424 break;
4425
4426 case MSM_BACKEND_DAI_TERT_AUXPCM_RX:
4427 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4428 aux_pcm_rx_cfg[TERT_AUX_PCM].bit_format);
4429 rate->min = rate->max =
4430 aux_pcm_rx_cfg[TERT_AUX_PCM].sample_rate;
4431 channels->min = channels->max =
4432 aux_pcm_rx_cfg[TERT_AUX_PCM].channels;
4433 break;
4434
4435 case MSM_BACKEND_DAI_TERT_AUXPCM_TX:
4436 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4437 aux_pcm_tx_cfg[TERT_AUX_PCM].bit_format);
4438 rate->min = rate->max =
4439 aux_pcm_tx_cfg[TERT_AUX_PCM].sample_rate;
4440 channels->min = channels->max =
4441 aux_pcm_tx_cfg[TERT_AUX_PCM].channels;
4442 break;
4443
4444 case MSM_BACKEND_DAI_QUAT_AUXPCM_RX:
4445 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4446 aux_pcm_rx_cfg[QUAT_AUX_PCM].bit_format);
4447 rate->min = rate->max =
4448 aux_pcm_rx_cfg[QUAT_AUX_PCM].sample_rate;
4449 channels->min = channels->max =
4450 aux_pcm_rx_cfg[QUAT_AUX_PCM].channels;
4451 break;
4452
4453 case MSM_BACKEND_DAI_QUAT_AUXPCM_TX:
4454 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4455 aux_pcm_tx_cfg[QUAT_AUX_PCM].bit_format);
4456 rate->min = rate->max =
4457 aux_pcm_tx_cfg[QUAT_AUX_PCM].sample_rate;
4458 channels->min = channels->max =
4459 aux_pcm_tx_cfg[QUAT_AUX_PCM].channels;
4460 break;
4461
4462 case MSM_BACKEND_DAI_QUIN_AUXPCM_RX:
4463 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4464 aux_pcm_rx_cfg[QUIN_AUX_PCM].bit_format);
4465 rate->min = rate->max =
4466 aux_pcm_rx_cfg[QUIN_AUX_PCM].sample_rate;
4467 channels->min = channels->max =
4468 aux_pcm_rx_cfg[QUIN_AUX_PCM].channels;
4469 break;
4470
4471 case MSM_BACKEND_DAI_QUIN_AUXPCM_TX:
4472 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4473 aux_pcm_tx_cfg[QUIN_AUX_PCM].bit_format);
4474 rate->min = rate->max =
4475 aux_pcm_tx_cfg[QUIN_AUX_PCM].sample_rate;
4476 channels->min = channels->max =
4477 aux_pcm_tx_cfg[QUIN_AUX_PCM].channels;
4478 break;
4479
4480 case MSM_BACKEND_DAI_PRI_MI2S_RX:
4481 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4482 mi2s_rx_cfg[PRIM_MI2S].bit_format);
4483 rate->min = rate->max = mi2s_rx_cfg[PRIM_MI2S].sample_rate;
4484 channels->min = channels->max =
4485 mi2s_rx_cfg[PRIM_MI2S].channels;
4486 break;
4487
4488 case MSM_BACKEND_DAI_PRI_MI2S_TX:
4489 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4490 mi2s_tx_cfg[PRIM_MI2S].bit_format);
4491 rate->min = rate->max = mi2s_tx_cfg[PRIM_MI2S].sample_rate;
4492 channels->min = channels->max =
4493 mi2s_tx_cfg[PRIM_MI2S].channels;
4494 break;
4495
4496 case MSM_BACKEND_DAI_SECONDARY_MI2S_RX:
4497 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4498 mi2s_rx_cfg[SEC_MI2S].bit_format);
4499 rate->min = rate->max = mi2s_rx_cfg[SEC_MI2S].sample_rate;
4500 channels->min = channels->max =
4501 mi2s_rx_cfg[SEC_MI2S].channels;
4502 break;
4503
4504 case MSM_BACKEND_DAI_SECONDARY_MI2S_TX:
4505 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4506 mi2s_tx_cfg[SEC_MI2S].bit_format);
4507 rate->min = rate->max = mi2s_tx_cfg[SEC_MI2S].sample_rate;
4508 channels->min = channels->max =
4509 mi2s_tx_cfg[SEC_MI2S].channels;
4510 break;
4511
4512 case MSM_BACKEND_DAI_TERTIARY_MI2S_RX:
4513 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4514 mi2s_rx_cfg[TERT_MI2S].bit_format);
4515 rate->min = rate->max = mi2s_rx_cfg[TERT_MI2S].sample_rate;
4516 channels->min = channels->max =
4517 mi2s_rx_cfg[TERT_MI2S].channels;
4518 break;
4519
4520 case MSM_BACKEND_DAI_TERTIARY_MI2S_TX:
4521 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4522 mi2s_tx_cfg[TERT_MI2S].bit_format);
4523 rate->min = rate->max = mi2s_tx_cfg[TERT_MI2S].sample_rate;
4524 channels->min = channels->max =
4525 mi2s_tx_cfg[TERT_MI2S].channels;
4526 break;
4527
4528 case MSM_BACKEND_DAI_QUATERNARY_MI2S_RX:
4529 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4530 mi2s_rx_cfg[QUAT_MI2S].bit_format);
4531 rate->min = rate->max = mi2s_rx_cfg[QUAT_MI2S].sample_rate;
4532 channels->min = channels->max =
4533 mi2s_rx_cfg[QUAT_MI2S].channels;
4534 break;
4535
4536 case MSM_BACKEND_DAI_QUATERNARY_MI2S_TX:
4537 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4538 mi2s_tx_cfg[QUAT_MI2S].bit_format);
4539 rate->min = rate->max = mi2s_tx_cfg[QUAT_MI2S].sample_rate;
4540 channels->min = channels->max =
4541 mi2s_tx_cfg[QUAT_MI2S].channels;
4542 break;
4543
4544 case MSM_BACKEND_DAI_QUINARY_MI2S_RX:
4545 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4546 mi2s_rx_cfg[QUIN_MI2S].bit_format);
4547 rate->min = rate->max = mi2s_rx_cfg[QUIN_MI2S].sample_rate;
4548 channels->min = channels->max =
4549 mi2s_rx_cfg[QUIN_MI2S].channels;
4550 break;
4551
4552 case MSM_BACKEND_DAI_QUINARY_MI2S_TX:
4553 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4554 mi2s_tx_cfg[QUIN_MI2S].bit_format);
4555 rate->min = rate->max = mi2s_tx_cfg[QUIN_MI2S].sample_rate;
4556 channels->min = channels->max =
4557 mi2s_tx_cfg[QUIN_MI2S].channels;
4558 break;
4559
4560 case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_0:
4561 case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_1:
4562 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_0:
4563 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_1:
4564 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_2:
4565 idx = msm_cdc_dma_get_idx_from_beid(dai_link->id);
4566 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4567 cdc_dma_rx_cfg[idx].bit_format);
4568 rate->min = rate->max = cdc_dma_rx_cfg[idx].sample_rate;
4569 channels->min = channels->max = cdc_dma_rx_cfg[idx].channels;
4570 break;
4571
4572 case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_1:
4573 case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_2:
4574 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_0:
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]4575 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_3:
4576 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_4:
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]4577 idx = msm_cdc_dma_get_idx_from_beid(dai_link->id);
4578 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4579 cdc_dma_tx_cfg[idx].bit_format);
4580 rate->min = rate->max = cdc_dma_tx_cfg[idx].sample_rate;
4581 channels->min = channels->max = cdc_dma_tx_cfg[idx].channels;
4582 break;
4583
4584 case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_0:
4585 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4586 SNDRV_PCM_FORMAT_S32_LE);
4587 rate->min = rate->max = SAMPLING_RATE_8KHZ;
4588 channels->min = channels->max = msm_vi_feed_tx_ch;
4589 break;
4590
4591 default:
4592 rate->min = rate->max = SAMPLING_RATE_48KHZ;
4593 break;
4594 }
4595
4596done:
4597 return rc;
4598}
4599
4600static bool msm_usbc_swap_gnd_mic(struct snd_soc_codec *codec, bool active)
4601{
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]4602 struct snd_soc_card *card = codec->component.card;
Vatsal Bucha6cb17a02018-08-07 11:07:04 +0530[diff] [blame]4603 struct msm_asoc_mach_data *pdata =
4604 snd_soc_card_get_drvdata(card);
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]4605
Vatsal Bucha6cb17a02018-08-07 11:07:04 +0530[diff] [blame]4606 if (!pdata->fsa_handle)
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]4607 return false;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]4608
Vatsal Bucha6cb17a02018-08-07 11:07:04 +0530[diff] [blame]4609 return fsa4480_switch_event(pdata->fsa_handle, FSA_MIC_GND_SWAP);
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]4610}
4611
4612static bool msm_swap_gnd_mic(struct snd_soc_codec *codec, bool active)
4613{
4614 int value = 0;
4615 bool ret = false;
4616 struct snd_soc_card *card;
4617 struct msm_asoc_mach_data *pdata;
4618
4619 if (!codec) {
4620 pr_err("%s codec is NULL\n", __func__);
4621 return false;
4622 }
4623 card = codec->component.card;
4624 pdata = snd_soc_card_get_drvdata(card);
4625
4626 if (!pdata)
4627 return false;
4628
4629 if (wcd_mbhc_cfg.enable_usbc_analog)
4630 return msm_usbc_swap_gnd_mic(codec, active);
4631
4632 /* if usbc is not defined, swap using us_euro_gpio_p */
4633 if (pdata->us_euro_gpio_p) {
4634 value = msm_cdc_pinctrl_get_state(
4635 pdata->us_euro_gpio_p);
4636 if (value)
4637 msm_cdc_pinctrl_select_sleep_state(
4638 pdata->us_euro_gpio_p);
4639 else
4640 msm_cdc_pinctrl_select_active_state(
4641 pdata->us_euro_gpio_p);
4642 dev_dbg(codec->dev, "%s: swap select switch %d to %d\n",
4643 __func__, value, !value);
4644 ret = true;
4645 }
4646 return ret;
4647}
4648
4649static int msm_afe_set_config(struct snd_soc_codec *codec)
4650{
4651 int ret = 0;
4652 void *config_data = NULL;
4653
4654 if (!msm_codec_fn.get_afe_config_fn) {
4655 dev_err(codec->dev, "%s: codec get afe config not init'ed\n",
4656 __func__);
4657 return -EINVAL;
4658 }
4659
4660 config_data = msm_codec_fn.get_afe_config_fn(codec,
4661 AFE_CDC_REGISTERS_CONFIG);
4662 if (config_data) {
4663 ret = afe_set_config(AFE_CDC_REGISTERS_CONFIG, config_data, 0);
4664 if (ret) {
4665 dev_err(codec->dev,
4666 "%s: Failed to set codec registers config %d\n",
4667 __func__, ret);
4668 return ret;
4669 }
4670 }
4671
4672 config_data = msm_codec_fn.get_afe_config_fn(codec,
4673 AFE_CDC_REGISTER_PAGE_CONFIG);
4674 if (config_data) {
4675 ret = afe_set_config(AFE_CDC_REGISTER_PAGE_CONFIG, config_data,
4676 0);
4677 if (ret)
4678 dev_err(codec->dev,
4679 "%s: Failed to set cdc register page config\n",
4680 __func__);
4681 }
4682
4683 config_data = msm_codec_fn.get_afe_config_fn(codec,
4684 AFE_SLIMBUS_SLAVE_CONFIG);
4685 if (config_data) {
4686 ret = afe_set_config(AFE_SLIMBUS_SLAVE_CONFIG, config_data, 0);
4687 if (ret) {
4688 dev_err(codec->dev,
4689 "%s: Failed to set slimbus slave config %d\n",
4690 __func__, ret);
4691 return ret;
4692 }
4693 }
4694
4695 return 0;
4696}
4697
4698static void msm_afe_clear_config(void)
4699{
4700 afe_clear_config(AFE_CDC_REGISTERS_CONFIG);
4701 afe_clear_config(AFE_SLIMBUS_SLAVE_CONFIG);
4702}
4703
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]4704static int msm_audrx_tavil_init(struct snd_soc_pcm_runtime *rtd)
4705{
4706 int ret = 0;
4707 void *config_data;
4708 struct snd_soc_codec *codec = rtd->codec;
4709 struct snd_soc_dapm_context *dapm = snd_soc_codec_get_dapm(codec);
4710 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
4711 struct snd_soc_dai *codec_dai = rtd->codec_dai;
4712 struct snd_soc_component *aux_comp;
4713 struct snd_card *card;
4714 struct snd_info_entry *entry;
4715 struct msm_asoc_mach_data *pdata =
4716 snd_soc_card_get_drvdata(rtd->card);
4717
4718 /*
4719 * Codec SLIMBUS configuration
4720 * RX1, RX2, RX3, RX4, RX5, RX6, RX7, RX8
4721 * TX1, TX2, TX3, TX4, TX5, TX6, TX7, TX8, TX9, TX10, TX11, TX12, TX13
4722 * TX14, TX15, TX16
4723 */
4724 unsigned int rx_ch[WCD934X_RX_MAX] = {144, 145, 146, 147, 148, 149,
4725 150, 151};
4726 unsigned int tx_ch[WCD934X_TX_MAX] = {128, 129, 130, 131, 132, 133,
4727 134, 135, 136, 137, 138, 139,
4728 140, 141, 142, 143};
4729
4730 pr_info("%s: dev_name:%s\n", __func__, dev_name(cpu_dai->dev));
4731
4732 rtd->pmdown_time = 0;
4733
4734 ret = snd_soc_add_codec_controls(codec, msm_tavil_snd_controls,
4735 ARRAY_SIZE(msm_tavil_snd_controls));
4736 if (ret < 0) {
4737 pr_err("%s: add_codec_controls failed, err %d\n",
4738 __func__, ret);
4739 return ret;
4740 }
4741
4742 ret = snd_soc_add_codec_controls(codec, msm_common_snd_controls,
4743 ARRAY_SIZE(msm_common_snd_controls));
4744 if (ret < 0) {
4745 pr_err("%s: add_codec_controls failed, err %d\n",
4746 __func__, ret);
4747 return ret;
4748 }
4749
4750 snd_soc_dapm_new_controls(dapm, msm_dapm_widgets_tavil,
4751 ARRAY_SIZE(msm_dapm_widgets_tavil));
4752
4753 snd_soc_dapm_add_routes(dapm, wcd_audio_paths_tavil,
4754 ARRAY_SIZE(wcd_audio_paths_tavil));
4755
4756 snd_soc_dapm_ignore_suspend(dapm, "Handset Mic");
4757 snd_soc_dapm_ignore_suspend(dapm, "Headset Mic");
4758 snd_soc_dapm_ignore_suspend(dapm, "ANCRight Headset Mic");
4759 snd_soc_dapm_ignore_suspend(dapm, "ANCLeft Headset Mic");
4760 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic0");
4761 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic1");
4762 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic2");
4763 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic3");
4764 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic4");
4765 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic5");
4766 snd_soc_dapm_ignore_suspend(dapm, "Analog Mic5");
4767 snd_soc_dapm_ignore_suspend(dapm, "MADINPUT");
4768 snd_soc_dapm_ignore_suspend(dapm, "MAD_CPE_INPUT");
4769 snd_soc_dapm_ignore_suspend(dapm, "MAD_CPE_OUT1");
4770 snd_soc_dapm_ignore_suspend(dapm, "MAD_CPE_OUT2");
4771 snd_soc_dapm_ignore_suspend(dapm, "EAR");
4772 snd_soc_dapm_ignore_suspend(dapm, "LINEOUT1");
4773 snd_soc_dapm_ignore_suspend(dapm, "LINEOUT2");
4774 snd_soc_dapm_ignore_suspend(dapm, "ANC EAR");
4775 snd_soc_dapm_ignore_suspend(dapm, "SPK1 OUT");
4776 snd_soc_dapm_ignore_suspend(dapm, "SPK2 OUT");
4777 snd_soc_dapm_ignore_suspend(dapm, "HPHL");
4778 snd_soc_dapm_ignore_suspend(dapm, "HPHR");
4779 snd_soc_dapm_ignore_suspend(dapm, "AIF4 VI");
4780 snd_soc_dapm_ignore_suspend(dapm, "VIINPUT");
4781 snd_soc_dapm_ignore_suspend(dapm, "ANC HPHL");
4782 snd_soc_dapm_ignore_suspend(dapm, "ANC HPHR");
4783
4784 snd_soc_dapm_sync(dapm);
4785
4786 snd_soc_dai_set_channel_map(codec_dai, ARRAY_SIZE(tx_ch),
4787 tx_ch, ARRAY_SIZE(rx_ch), rx_ch);
4788
4789 msm_codec_fn.get_afe_config_fn = tavil_get_afe_config;
4790
Vaishnavi Kommaraju9a3d5eb2018-09-19 18:16:39 +0530[diff] [blame]4791 ret = msm_afe_set_config(codec);
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]4792 if (ret) {
4793 pr_err("%s: Failed to set AFE config %d\n", __func__, ret);
4794 goto err;
4795 }
Vaishnavi Kommaraju9a3d5eb2018-09-19 18:16:39 +0530[diff] [blame]4796 pdata->is_afe_config_done = true;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]4797
4798 config_data = msm_codec_fn.get_afe_config_fn(codec,
4799 AFE_AANC_VERSION);
4800 if (config_data) {
4801 ret = afe_set_config(AFE_AANC_VERSION, config_data, 0);
4802 if (ret) {
4803 pr_err("%s: Failed to set aanc version %d\n",
4804 __func__, ret);
4805 goto err;
4806 }
4807 }
4808
4809 /*
4810 * Send speaker configuration only for WSA8810.
4811 * Default configuration is for WSA8815.
4812 */
4813 pr_debug("%s: Number of aux devices: %d\n",
4814 __func__, rtd->card->num_aux_devs);
4815 if (rtd->card->num_aux_devs &&
4816 !list_empty(&rtd->card->aux_comp_list)) {
4817 aux_comp = list_first_entry(&rtd->card->aux_comp_list,
4818 struct snd_soc_component, card_aux_list);
4819 if (!strcmp(aux_comp->name, WSA8810_NAME_1) ||
4820 !strcmp(aux_comp->name, WSA8810_NAME_2)) {
4821 tavil_set_spkr_mode(rtd->codec, WCD934X_SPKR_MODE_1);
4822 tavil_set_spkr_gain_offset(rtd->codec,
4823 WCD934X_RX_GAIN_OFFSET_M1P5_DB);
4824 }
4825 }
4826
4827 card = rtd->card->snd_card;
4828 entry = snd_info_create_subdir(card->module, "codecs",
4829 card->proc_root);
4830 if (!entry) {
4831 pr_debug("%s: Cannot create codecs module entry\n",
4832 __func__);
4833 ret = 0;
4834 goto err;
4835 }
4836 pdata->codec_root = entry;
4837 tavil_codec_info_create_codec_entry(pdata->codec_root, codec);
4838
4839 codec_reg_done = true;
4840 return 0;
4841err:
4842 return ret;
4843}
4844
4845static int msm_int_audrx_init(struct snd_soc_pcm_runtime *rtd)
4846{
4847 int ret = 0;
4848 struct snd_soc_codec *codec = rtd->codec;
4849 struct snd_soc_dapm_context *dapm = snd_soc_codec_get_dapm(codec);
4850 struct snd_card *card;
4851 struct snd_info_entry *entry;
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]4852 struct snd_soc_component *aux_comp;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]4853 struct msm_asoc_mach_data *pdata =
4854 snd_soc_card_get_drvdata(rtd->card);
4855
4856 ret = snd_soc_add_codec_controls(codec, msm_int_snd_controls,
4857 ARRAY_SIZE(msm_int_snd_controls));
4858 if (ret < 0) {
4859 pr_err("%s: add_codec_controls failed: %d\n",
4860 __func__, ret);
4861 return ret;
4862 }
4863 ret = snd_soc_add_codec_controls(codec, msm_common_snd_controls,
4864 ARRAY_SIZE(msm_common_snd_controls));
4865 if (ret < 0) {
4866 pr_err("%s: add common snd controls failed: %d\n",
4867 __func__, ret);
4868 return ret;
4869 }
4870
4871 snd_soc_dapm_new_controls(dapm, msm_int_dapm_widgets,
4872 ARRAY_SIZE(msm_int_dapm_widgets));
4873
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]4874 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic0");
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]4875 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic1");
4876 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic2");
4877 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic3");
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]4878
4879 snd_soc_dapm_ignore_suspend(dapm, "Analog Mic1");
4880 snd_soc_dapm_ignore_suspend(dapm, "Analog Mic2");
4881 snd_soc_dapm_ignore_suspend(dapm, "Analog Mic3");
4882 snd_soc_dapm_ignore_suspend(dapm, "Analog Mic4");
4883
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]4884 snd_soc_dapm_ignore_suspend(dapm, "WSA_SPK1 OUT");
4885 snd_soc_dapm_ignore_suspend(dapm, "WSA_SPK2 OUT");
4886 snd_soc_dapm_ignore_suspend(dapm, "WSA AIF VI");
4887 snd_soc_dapm_ignore_suspend(dapm, "VIINPUT_WSA");
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]4888
4889 snd_soc_dapm_sync(dapm);
4890
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]4891 /*
4892 * Send speaker configuration only for WSA8810.
4893 * Default configuration is for WSA8815.
4894 */
4895 dev_dbg(codec->dev, "%s: Number of aux devices: %d\n",
4896 __func__, rtd->card->num_aux_devs);
4897 if (rtd->card->num_aux_devs &&
4898 !list_empty(&rtd->card->component_dev_list)) {
4899 aux_comp = list_first_entry(
4900 &rtd->card->component_dev_list,
4901 struct snd_soc_component,
4902 card_aux_list);
4903 if (!strcmp(aux_comp->name, WSA8810_NAME_1) ||
4904 !strcmp(aux_comp->name, WSA8810_NAME_2)) {
4905 wsa_macro_set_spkr_mode(rtd->codec,
4906 WSA_MACRO_SPKR_MODE_1);
4907 wsa_macro_set_spkr_gain_offset(rtd->codec,
4908 WSA_MACRO_GAIN_OFFSET_M1P5_DB);
4909 }
4910 }
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]4911 card = rtd->card->snd_card;
Aditya Bavanari4ae32fc2018-08-13 13:08:34 +0530[diff] [blame]4912 if (!pdata->codec_root) {
4913 entry = snd_info_create_subdir(card->module, "codecs",
4914 card->proc_root);
4915 if (!entry) {
4916 pr_debug("%s: Cannot create codecs module entry\n",
4917 __func__);
4918 ret = 0;
4919 goto err;
4920 }
4921 pdata->codec_root = entry;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]4922 }
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]4923 bolero_info_create_codec_entry(pdata->codec_root, codec);
Aditya Bavanari3e19f3c2018-11-12 19:29:50 +0530[diff] [blame]4924 /*
4925 * SM6150 MSM 1.0 doesn't have hardware wake up interrupt line
4926 * from AOSS to APSS. So, it uses SW workaround and listens to
4927 * interrupt from AFE over IPC.
4928 * Check for MSM version and MSM ID and register wake irq
4929 * accordingly to provide compatibility to all chipsets.
4930 */
4931 if (socinfo_get_id() == SM6150_SOC_MSM_ID &&
4932 socinfo_get_version() == SM6150_SOC_VERSION_1_0)
4933 bolero_register_wake_irq(codec, true);
4934 else
4935 bolero_register_wake_irq(codec, false);
4936
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]4937 codec_reg_done = true;
4938 return 0;
4939err:
4940 return ret;
4941}
4942
4943static int msm_wcn_init(struct snd_soc_pcm_runtime *rtd)
4944{
4945 unsigned int rx_ch[WCN_CDC_SLIM_RX_CH_MAX] = {157, 158};
4946 unsigned int tx_ch[WCN_CDC_SLIM_TX_CH_MAX] = {159, 160, 161};
4947 struct snd_soc_dai *codec_dai = rtd->codec_dai;
4948
4949 return snd_soc_dai_set_channel_map(codec_dai, ARRAY_SIZE(tx_ch),
4950 tx_ch, ARRAY_SIZE(rx_ch), rx_ch);
4951}
4952
4953static void *def_wcd_mbhc_cal(void)
4954{
4955 void *wcd_mbhc_cal;
4956 struct wcd_mbhc_btn_detect_cfg *btn_cfg;
4957 u16 *btn_high;
4958
4959 wcd_mbhc_cal = kzalloc(WCD_MBHC_CAL_SIZE(WCD_MBHC_DEF_BUTTONS,
4960 WCD9XXX_MBHC_DEF_RLOADS), GFP_KERNEL);
4961 if (!wcd_mbhc_cal)
4962 return NULL;
4963
4964#define S(X, Y) ((WCD_MBHC_CAL_PLUG_TYPE_PTR(wcd_mbhc_cal)->X) = (Y))
4965 S(v_hs_max, 1600);
4966#undef S
4967#define S(X, Y) ((WCD_MBHC_CAL_BTN_DET_PTR(wcd_mbhc_cal)->X) = (Y))
4968 S(num_btn, WCD_MBHC_DEF_BUTTONS);
4969#undef S
4970
4971 btn_cfg = WCD_MBHC_CAL_BTN_DET_PTR(wcd_mbhc_cal);
4972 btn_high = ((void *)&btn_cfg->_v_btn_low) +
4973 (sizeof(btn_cfg->_v_btn_low[0]) * btn_cfg->num_btn);
4974
4975 btn_high[0] = 75;
4976 btn_high[1] = 150;
4977 btn_high[2] = 237;
4978 btn_high[3] = 500;
4979 btn_high[4] = 500;
4980 btn_high[5] = 500;
4981 btn_high[6] = 500;
4982 btn_high[7] = 500;
4983
4984 return wcd_mbhc_cal;
4985}
4986
4987static int msm_snd_hw_params(struct snd_pcm_substream *substream,
4988 struct snd_pcm_hw_params *params)
4989{
4990 struct snd_soc_pcm_runtime *rtd = substream->private_data;
4991 struct snd_soc_dai *codec_dai = rtd->codec_dai;
4992 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
4993 struct snd_soc_dai_link *dai_link = rtd->dai_link;
4994
4995 int ret = 0;
4996 u32 rx_ch[SLIM_MAX_RX_PORTS], tx_ch[SLIM_MAX_TX_PORTS];
4997 u32 rx_ch_cnt = 0, tx_ch_cnt = 0;
4998 u32 user_set_tx_ch = 0;
4999 u32 rx_ch_count;
5000
5001 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
5002 ret = snd_soc_dai_get_channel_map(codec_dai,
5003 &tx_ch_cnt, tx_ch, &rx_ch_cnt, rx_ch);
5004 if (ret < 0) {
5005 pr_err("%s: failed to get codec chan map, err:%d\n",
5006 __func__, ret);
5007 goto err;
5008 }
5009 if (dai_link->id == MSM_BACKEND_DAI_SLIMBUS_5_RX) {
5010 pr_debug("%s: rx_5_ch=%d\n", __func__,
5011 slim_rx_cfg[5].channels);
5012 rx_ch_count = slim_rx_cfg[5].channels;
5013 } else if (dai_link->id == MSM_BACKEND_DAI_SLIMBUS_2_RX) {
5014 pr_debug("%s: rx_2_ch=%d\n", __func__,
5015 slim_rx_cfg[2].channels);
5016 rx_ch_count = slim_rx_cfg[2].channels;
5017 } else if (dai_link->id == MSM_BACKEND_DAI_SLIMBUS_6_RX) {
5018 pr_debug("%s: rx_6_ch=%d\n", __func__,
5019 slim_rx_cfg[6].channels);
5020 rx_ch_count = slim_rx_cfg[6].channels;
5021 } else {
5022 pr_debug("%s: rx_0_ch=%d\n", __func__,
5023 slim_rx_cfg[0].channels);
5024 rx_ch_count = slim_rx_cfg[0].channels;
5025 }
5026 ret = snd_soc_dai_set_channel_map(cpu_dai, 0, 0,
5027 rx_ch_count, rx_ch);
5028 if (ret < 0) {
5029 pr_err("%s: failed to set cpu chan map, err:%d\n",
5030 __func__, ret);
5031 goto err;
5032 }
5033 } else {
5034
5035 pr_debug("%s: %s_tx_dai_id_%d_ch=%d\n", __func__,
5036 codec_dai->name, codec_dai->id, user_set_tx_ch);
5037 ret = snd_soc_dai_get_channel_map(codec_dai,
5038 &tx_ch_cnt, tx_ch, &rx_ch_cnt, rx_ch);
5039 if (ret < 0) {
5040 pr_err("%s: failed to get tx codec chan map, err:%d\n",
5041 __func__, ret);
5042 goto err;
5043 }
5044 /* For <codec>_tx1 case */
5045 if (dai_link->id == MSM_BACKEND_DAI_SLIMBUS_0_TX)
5046 user_set_tx_ch = slim_tx_cfg[0].channels;
5047 /* For <codec>_tx3 case */
5048 else if (dai_link->id == MSM_BACKEND_DAI_SLIMBUS_1_TX)
5049 user_set_tx_ch = slim_tx_cfg[1].channels;
5050 else if (dai_link->id == MSM_BACKEND_DAI_SLIMBUS_4_TX)
5051 user_set_tx_ch = msm_vi_feed_tx_ch;
5052 else
5053 user_set_tx_ch = tx_ch_cnt;
5054
5055 pr_debug("%s: msm_slim_0_tx_ch(%d) user_set_tx_ch(%d) tx_ch_cnt(%d), BE id (%d)\n",
5056 __func__, slim_tx_cfg[0].channels, user_set_tx_ch,
5057 tx_ch_cnt, dai_link->id);
5058
5059 ret = snd_soc_dai_set_channel_map(cpu_dai,
5060 user_set_tx_ch, tx_ch, 0, 0);
5061 if (ret < 0)
5062 pr_err("%s: failed to set tx cpu chan map, err:%d\n",
5063 __func__, ret);
5064 }
5065
5066err:
5067 return ret;
5068}
5069
5070
5071static int msm_snd_cdc_dma_hw_params(struct snd_pcm_substream *substream,
5072 struct snd_pcm_hw_params *params)
5073{
5074 struct snd_soc_pcm_runtime *rtd = substream->private_data;
5075 struct snd_soc_dai *codec_dai = rtd->codec_dai;
5076 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
5077 struct snd_soc_dai_link *dai_link = rtd->dai_link;
5078
5079 int ret = 0;
5080 u32 rx_ch_cdc_dma, tx_ch_cdc_dma;
5081 u32 rx_ch_cnt = 0, tx_ch_cnt = 0;
5082 u32 user_set_tx_ch = 0;
5083 u32 user_set_rx_ch = 0;
5084 u32 ch_id;
5085
5086 ret = snd_soc_dai_get_channel_map(codec_dai,
5087 &tx_ch_cnt, &tx_ch_cdc_dma, &rx_ch_cnt,
5088 &rx_ch_cdc_dma);
5089 if (ret < 0) {
5090 pr_err("%s: failed to get codec chan map, err:%d\n",
5091 __func__, ret);
5092 goto err;
5093 }
5094
5095 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
5096 switch (dai_link->id) {
5097 case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_0:
5098 case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_1:
5099 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_0:
5100 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_1:
5101 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_2:
5102 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_3:
5103 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_4:
5104 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_5:
5105 {
5106 ch_id = msm_cdc_dma_get_idx_from_beid(dai_link->id);
5107 pr_debug("%s: id %d rx_ch=%d\n", __func__,
5108 ch_id, cdc_dma_rx_cfg[ch_id].channels);
5109 user_set_rx_ch = cdc_dma_rx_cfg[ch_id].channels;
5110 ret = snd_soc_dai_set_channel_map(cpu_dai, 0, 0,
5111 user_set_rx_ch, &rx_ch_cdc_dma);
5112 if (ret < 0) {
5113 pr_err("%s: failed to set cpu chan map, err:%d\n",
5114 __func__, ret);
5115 goto err;
5116 }
5117
5118 }
5119 break;
5120 }
5121 } else {
5122 switch (dai_link->id) {
5123 case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_0:
5124 {
5125 user_set_tx_ch = msm_vi_feed_tx_ch;
5126 }
5127 break;
5128 case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_1:
5129 case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_2:
5130 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_0:
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]5131 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_3:
5132 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_4:
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]5133 {
5134 ch_id = msm_cdc_dma_get_idx_from_beid(dai_link->id);
5135 pr_debug("%s: id %d tx_ch=%d\n", __func__,
5136 ch_id, cdc_dma_tx_cfg[ch_id].channels);
5137 user_set_tx_ch = cdc_dma_tx_cfg[ch_id].channels;
5138 }
5139 break;
5140 }
5141
5142 ret = snd_soc_dai_set_channel_map(cpu_dai, user_set_tx_ch,
5143 &tx_ch_cdc_dma, 0, 0);
5144 if (ret < 0) {
5145 pr_err("%s: failed to set cpu chan map, err:%d\n",
5146 __func__, ret);
5147 goto err;
5148 }
5149 }
5150
5151err:
5152 return ret;
5153}
5154
5155static int msm_slimbus_2_hw_params(struct snd_pcm_substream *substream,
5156 struct snd_pcm_hw_params *params)
5157{
5158 struct snd_soc_pcm_runtime *rtd = substream->private_data;
5159 struct snd_soc_dai *codec_dai = rtd->codec_dai;
5160 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
5161 unsigned int rx_ch[SLIM_MAX_RX_PORTS], tx_ch[SLIM_MAX_TX_PORTS];
5162 unsigned int rx_ch_cnt = 0, tx_ch_cnt = 0;
5163 unsigned int num_tx_ch = 0;
5164 unsigned int num_rx_ch = 0;
5165 int ret = 0;
5166
5167 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
5168 num_rx_ch = params_channels(params);
5169 pr_debug("%s: %s rx_dai_id = %d num_ch = %d\n", __func__,
5170 codec_dai->name, codec_dai->id, num_rx_ch);
5171 ret = snd_soc_dai_get_channel_map(codec_dai,
5172 &tx_ch_cnt, tx_ch, &rx_ch_cnt, rx_ch);
5173 if (ret < 0) {
5174 pr_err("%s: failed to get codec chan map, err:%d\n",
5175 __func__, ret);
5176 goto err;
5177 }
5178 ret = snd_soc_dai_set_channel_map(cpu_dai, 0, 0,
5179 num_rx_ch, rx_ch);
5180 if (ret < 0) {
5181 pr_err("%s: failed to set cpu chan map, err:%d\n",
5182 __func__, ret);
5183 goto err;
5184 }
5185 } else {
5186 num_tx_ch = params_channels(params);
5187 pr_debug("%s: %s tx_dai_id = %d num_ch = %d\n", __func__,
5188 codec_dai->name, codec_dai->id, num_tx_ch);
5189 ret = snd_soc_dai_get_channel_map(codec_dai,
5190 &tx_ch_cnt, tx_ch, &rx_ch_cnt, rx_ch);
5191 if (ret < 0) {
5192 pr_err("%s: failed to get tx codec chan map, err:%d\n",
5193 __func__, ret);
5194 goto err;
5195 }
5196 ret = snd_soc_dai_set_channel_map(cpu_dai,
5197 num_tx_ch, tx_ch, 0, 0);
5198 if (ret < 0) {
5199 pr_err("%s: failed to set tx cpu chan map, err:%d\n",
5200 __func__, ret);
5201 goto err;
5202 }
5203 }
5204
5205err:
5206 return ret;
5207}
5208
5209static int msm_wcn_hw_params(struct snd_pcm_substream *substream,
5210 struct snd_pcm_hw_params *params)
5211{
5212 struct snd_soc_pcm_runtime *rtd = substream->private_data;
5213 struct snd_soc_dai *codec_dai = rtd->codec_dai;
5214 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
5215 struct snd_soc_dai_link *dai_link = rtd->dai_link;
5216 u32 rx_ch[WCN_CDC_SLIM_RX_CH_MAX], tx_ch[WCN_CDC_SLIM_TX_CH_MAX];
5217 u32 rx_ch_cnt = 0, tx_ch_cnt = 0;
5218 int ret;
5219
5220 dev_dbg(rtd->dev, "%s: %s_tx_dai_id_%d\n", __func__,
5221 codec_dai->name, codec_dai->id);
5222 ret = snd_soc_dai_get_channel_map(codec_dai,
5223 &tx_ch_cnt, tx_ch, &rx_ch_cnt, rx_ch);
5224 if (ret) {
5225 dev_err(rtd->dev,
5226 "%s: failed to get BTFM codec chan map\n, err:%d\n",
5227 __func__, ret);
5228 goto err;
5229 }
5230
5231 dev_dbg(rtd->dev, "%s: tx_ch_cnt(%d) BE id %d\n",
5232 __func__, tx_ch_cnt, dai_link->id);
5233
5234 ret = snd_soc_dai_set_channel_map(cpu_dai,
5235 tx_ch_cnt, tx_ch, rx_ch_cnt, rx_ch);
5236 if (ret)
5237 dev_err(rtd->dev, "%s: failed to set cpu chan map, err:%d\n",
5238 __func__, ret);
5239
5240err:
5241 return ret;
5242}
5243
5244static int msm_get_port_id(int be_id)
5245{
5246 int afe_port_id;
5247
5248 switch (be_id) {
5249 case MSM_BACKEND_DAI_PRI_MI2S_RX:
5250 afe_port_id = AFE_PORT_ID_PRIMARY_MI2S_RX;
5251 break;
5252 case MSM_BACKEND_DAI_PRI_MI2S_TX:
5253 afe_port_id = AFE_PORT_ID_PRIMARY_MI2S_TX;
5254 break;
5255 case MSM_BACKEND_DAI_SECONDARY_MI2S_RX:
5256 afe_port_id = AFE_PORT_ID_SECONDARY_MI2S_RX;
5257 break;
5258 case MSM_BACKEND_DAI_SECONDARY_MI2S_TX:
5259 afe_port_id = AFE_PORT_ID_SECONDARY_MI2S_TX;
5260 break;
5261 case MSM_BACKEND_DAI_TERTIARY_MI2S_RX:
5262 afe_port_id = AFE_PORT_ID_TERTIARY_MI2S_RX;
5263 break;
5264 case MSM_BACKEND_DAI_TERTIARY_MI2S_TX:
5265 afe_port_id = AFE_PORT_ID_TERTIARY_MI2S_TX;
5266 break;
5267 case MSM_BACKEND_DAI_QUATERNARY_MI2S_RX:
5268 afe_port_id = AFE_PORT_ID_QUATERNARY_MI2S_RX;
5269 break;
5270 case MSM_BACKEND_DAI_QUATERNARY_MI2S_TX:
5271 afe_port_id = AFE_PORT_ID_QUATERNARY_MI2S_TX;
5272 break;
5273 case MSM_BACKEND_DAI_QUINARY_MI2S_RX:
5274 afe_port_id = AFE_PORT_ID_QUINARY_MI2S_RX;
5275 break;
5276 case MSM_BACKEND_DAI_QUINARY_MI2S_TX:
5277 afe_port_id = AFE_PORT_ID_QUINARY_MI2S_TX;
5278 break;
5279 default:
5280 pr_err("%s: Invalid BE id: %d\n", __func__, be_id);
5281 afe_port_id = -EINVAL;
5282 }
5283
5284 return afe_port_id;
5285}
5286
5287static u32 get_mi2s_bits_per_sample(u32 bit_format)
5288{
5289 u32 bit_per_sample;
5290
5291 switch (bit_format) {
5292 case SNDRV_PCM_FORMAT_S32_LE:
5293 case SNDRV_PCM_FORMAT_S24_3LE:
5294 case SNDRV_PCM_FORMAT_S24_LE:
5295 bit_per_sample = 32;
5296 break;
5297 case SNDRV_PCM_FORMAT_S16_LE:
5298 default:
5299 bit_per_sample = 16;
5300 break;
5301 }
5302
5303 return bit_per_sample;
5304}
5305
5306static void update_mi2s_clk_val(int dai_id, int stream)
5307{
5308 u32 bit_per_sample;
5309
5310 if (stream == SNDRV_PCM_STREAM_PLAYBACK) {
5311 bit_per_sample =
5312 get_mi2s_bits_per_sample(mi2s_rx_cfg[dai_id].bit_format);
5313 mi2s_clk[dai_id].clk_freq_in_hz =
5314 mi2s_rx_cfg[dai_id].sample_rate * 2 * bit_per_sample;
5315 } else {
5316 bit_per_sample =
5317 get_mi2s_bits_per_sample(mi2s_tx_cfg[dai_id].bit_format);
5318 mi2s_clk[dai_id].clk_freq_in_hz =
5319 mi2s_tx_cfg[dai_id].sample_rate * 2 * bit_per_sample;
5320 }
5321}
5322
5323static int msm_mi2s_set_sclk(struct snd_pcm_substream *substream, bool enable)
5324{
5325 int ret = 0;
5326 struct snd_soc_pcm_runtime *rtd = substream->private_data;
5327 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
5328 int port_id = 0;
5329 int index = cpu_dai->id;
5330
5331 port_id = msm_get_port_id(rtd->dai_link->id);
5332 if (port_id < 0) {
5333 dev_err(rtd->card->dev, "%s: Invalid port_id\n", __func__);
5334 ret = port_id;
5335 goto err;
5336 }
5337
5338 if (enable) {
5339 update_mi2s_clk_val(index, substream->stream);
5340 dev_dbg(rtd->card->dev, "%s: clock rate %ul\n", __func__,
5341 mi2s_clk[index].clk_freq_in_hz);
5342 }
5343
5344 mi2s_clk[index].enable = enable;
5345 ret = afe_set_lpass_clock_v2(port_id,
5346 &mi2s_clk[index]);
5347 if (ret < 0) {
5348 dev_err(rtd->card->dev,
5349 "%s: afe lpass clock failed for port 0x%x , err:%d\n",
5350 __func__, port_id, ret);
5351 goto err;
5352 }
5353
5354err:
5355 return ret;
5356}
5357
5358static int msm_set_pinctrl(struct msm_pinctrl_info *pinctrl_info,
5359 enum pinctrl_pin_state new_state)
5360{
5361 int ret = 0;
5362 int curr_state = 0;
5363
5364 if (pinctrl_info == NULL) {
5365 pr_err("%s: pinctrl_info is NULL\n", __func__);
5366 ret = -EINVAL;
5367 goto err;
5368 }
5369
5370 if (pinctrl_info->pinctrl == NULL) {
5371 pr_err("%s: pinctrl_info->pinctrl is NULL\n", __func__);
5372 ret = -EINVAL;
5373 goto err;
5374 }
5375
5376 curr_state = pinctrl_info->curr_state;
5377 pinctrl_info->curr_state = new_state;
5378 pr_debug("%s: curr_state = %s new_state = %s\n", __func__,
5379 pin_states[curr_state], pin_states[pinctrl_info->curr_state]);
5380
5381 if (curr_state == pinctrl_info->curr_state) {
5382 pr_debug("%s: Already in same state\n", __func__);
5383 goto err;
5384 }
5385
5386 if (curr_state != STATE_DISABLE &&
5387 pinctrl_info->curr_state != STATE_DISABLE) {
5388 pr_debug("%s: state already active cannot switch\n", __func__);
5389 ret = -EIO;
5390 goto err;
5391 }
5392
5393 switch (pinctrl_info->curr_state) {
5394 case STATE_MI2S_ACTIVE:
5395 ret = pinctrl_select_state(pinctrl_info->pinctrl,
5396 pinctrl_info->mi2s_active);
5397 if (ret) {
5398 pr_err("%s: MI2S state select failed with %d\n",
5399 __func__, ret);
5400 ret = -EIO;
5401 goto err;
5402 }
5403 break;
5404 case STATE_TDM_ACTIVE:
5405 ret = pinctrl_select_state(pinctrl_info->pinctrl,
5406 pinctrl_info->tdm_active);
5407 if (ret) {
5408 pr_err("%s: TDM state select failed with %d\n",
5409 __func__, ret);
5410 ret = -EIO;
5411 goto err;
5412 }
5413 break;
5414 case STATE_DISABLE:
5415 if (curr_state == STATE_MI2S_ACTIVE) {
5416 ret = pinctrl_select_state(pinctrl_info->pinctrl,
5417 pinctrl_info->mi2s_disable);
5418 } else {
5419 ret = pinctrl_select_state(pinctrl_info->pinctrl,
5420 pinctrl_info->tdm_disable);
5421 }
5422 if (ret) {
5423 pr_err("%s: state disable failed with %d\n",
5424 __func__, ret);
5425 ret = -EIO;
5426 goto err;
5427 }
5428 break;
5429 default:
5430 pr_err("%s: TLMM pin state is invalid\n", __func__);
5431 return -EINVAL;
5432 }
5433
5434err:
5435 return ret;
5436}
5437
5438static int msm_get_pinctrl(struct platform_device *pdev)
5439{
5440 struct snd_soc_card *card = platform_get_drvdata(pdev);
5441 struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
5442 struct msm_pinctrl_info *pinctrl_info = NULL;
5443 struct pinctrl *pinctrl;
5444 int ret = 0;
5445
5446 pinctrl_info = &pdata->pinctrl_info;
5447
5448 if (pinctrl_info == NULL) {
5449 pr_err("%s: pinctrl_info is NULL\n", __func__);
5450 return -EINVAL;
5451 }
5452
5453 pinctrl = devm_pinctrl_get(&pdev->dev);
5454 if (IS_ERR_OR_NULL(pinctrl)) {
5455 pr_err("%s: Unable to get pinctrl handle\n", __func__);
5456 return -EINVAL;
5457 }
5458 pinctrl_info->pinctrl = pinctrl;
5459
5460 /* get all the states handles from Device Tree */
5461 pinctrl_info->mi2s_disable = pinctrl_lookup_state(pinctrl,
5462 "quat-mi2s-sleep");
5463 if (IS_ERR(pinctrl_info->mi2s_disable)) {
5464 pr_err("%s: could not get mi2s_disable pinstate\n", __func__);
5465 goto err;
5466 }
5467 pinctrl_info->mi2s_active = pinctrl_lookup_state(pinctrl,
5468 "quat-mi2s-active");
5469 if (IS_ERR(pinctrl_info->mi2s_active)) {
5470 pr_err("%s: could not get mi2s_active pinstate\n", __func__);
5471 goto err;
5472 }
5473 pinctrl_info->tdm_disable = pinctrl_lookup_state(pinctrl,
5474 "quat-tdm-sleep");
5475 if (IS_ERR(pinctrl_info->tdm_disable)) {
5476 pr_err("%s: could not get tdm_disable pinstate\n", __func__);
5477 goto err;
5478 }
5479 pinctrl_info->tdm_active = pinctrl_lookup_state(pinctrl,
5480 "quat-tdm-active");
5481 if (IS_ERR(pinctrl_info->tdm_active)) {
5482 pr_err("%s: could not get tdm_active pinstate\n",
5483 __func__);
5484 goto err;
5485 }
5486 /* Reset the TLMM pins to a default state */
5487 ret = pinctrl_select_state(pinctrl_info->pinctrl,
5488 pinctrl_info->mi2s_disable);
5489 if (ret != 0) {
5490 pr_err("%s: Disable TLMM pins failed with %d\n",
5491 __func__, ret);
5492 ret = -EIO;
5493 goto err;
5494 }
5495 pinctrl_info->curr_state = STATE_DISABLE;
5496
5497 return 0;
5498
5499err:
5500 devm_pinctrl_put(pinctrl);
5501 pinctrl_info->pinctrl = NULL;
5502 return -EINVAL;
5503}
5504
5505static int msm_tdm_be_hw_params_fixup(struct snd_soc_pcm_runtime *rtd,
5506 struct snd_pcm_hw_params *params)
5507{
5508 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
5509 struct snd_interval *rate = hw_param_interval(params,
5510 SNDRV_PCM_HW_PARAM_RATE);
5511 struct snd_interval *channels = hw_param_interval(params,
5512 SNDRV_PCM_HW_PARAM_CHANNELS);
5513
5514 if (cpu_dai->id == AFE_PORT_ID_QUATERNARY_TDM_RX) {
5515 channels->min = channels->max =
5516 tdm_rx_cfg[TDM_QUAT][TDM_0].channels;
5517 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
5518 tdm_rx_cfg[TDM_QUAT][TDM_0].bit_format);
5519 rate->min = rate->max =
5520 tdm_rx_cfg[TDM_QUAT][TDM_0].sample_rate;
5521 } else if (cpu_dai->id == AFE_PORT_ID_SECONDARY_TDM_RX) {
5522 channels->min = channels->max =
5523 tdm_rx_cfg[TDM_SEC][TDM_0].channels;
5524 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
5525 tdm_rx_cfg[TDM_SEC][TDM_0].bit_format);
5526 rate->min = rate->max = tdm_rx_cfg[TDM_SEC][TDM_0].sample_rate;
5527 } else if (cpu_dai->id == AFE_PORT_ID_QUINARY_TDM_RX) {
5528 channels->min = channels->max =
5529 tdm_rx_cfg[TDM_QUIN][TDM_0].channels;
5530 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
5531 tdm_rx_cfg[TDM_QUIN][TDM_0].bit_format);
5532 rate->min = rate->max = tdm_rx_cfg[TDM_QUIN][TDM_0].sample_rate;
5533 } else {
5534 pr_err("%s: dai id 0x%x not supported\n",
5535 __func__, cpu_dai->id);
5536 return -EINVAL;
5537 }
5538
5539 pr_debug("%s: dai id = 0x%x channels = %d rate = %d format = 0x%x\n",
5540 __func__, cpu_dai->id, channels->max, rate->max,
5541 params_format(params));
5542
5543 return 0;
5544}
5545
5546static int sm6150_tdm_snd_hw_params(struct snd_pcm_substream *substream,
5547 struct snd_pcm_hw_params *params)
5548{
5549 struct snd_soc_pcm_runtime *rtd = substream->private_data;
5550 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
5551 int ret = 0;
5552 int slot_width = 32;
5553 int channels, slots;
5554 unsigned int slot_mask, rate, clk_freq;
5555 unsigned int slot_offset[8] = {0, 4, 8, 12, 16, 20, 24, 28};
5556
5557 pr_debug("%s: dai id = 0x%x\n", __func__, cpu_dai->id);
5558
5559 /* currently only supporting TDM_RX_0 and TDM_TX_0 */
5560 switch (cpu_dai->id) {
5561 case AFE_PORT_ID_PRIMARY_TDM_RX:
5562 slots = tdm_rx_cfg[TDM_PRI][TDM_0].channels;
5563 break;
5564 case AFE_PORT_ID_SECONDARY_TDM_RX:
5565 slots = tdm_rx_cfg[TDM_SEC][TDM_0].channels;
5566 break;
5567 case AFE_PORT_ID_TERTIARY_TDM_RX:
5568 slots = tdm_rx_cfg[TDM_TERT][TDM_0].channels;
5569 break;
5570 case AFE_PORT_ID_QUATERNARY_TDM_RX:
5571 slots = tdm_rx_cfg[TDM_QUAT][TDM_0].channels;
5572 break;
5573 case AFE_PORT_ID_QUINARY_TDM_RX:
5574 slots = tdm_rx_cfg[TDM_QUIN][TDM_0].channels;
5575 break;
5576 case AFE_PORT_ID_PRIMARY_TDM_TX:
5577 slots = tdm_tx_cfg[TDM_PRI][TDM_0].channels;
5578 break;
5579 case AFE_PORT_ID_SECONDARY_TDM_TX:
5580 slots = tdm_tx_cfg[TDM_SEC][TDM_0].channels;
5581 break;
5582 case AFE_PORT_ID_TERTIARY_TDM_TX:
5583 slots = tdm_tx_cfg[TDM_TERT][TDM_0].channels;
5584 break;
5585 case AFE_PORT_ID_QUATERNARY_TDM_TX:
5586 slots = tdm_tx_cfg[TDM_QUAT][TDM_0].channels;
5587 break;
5588 case AFE_PORT_ID_QUINARY_TDM_TX:
5589 slots = tdm_tx_cfg[TDM_QUIN][TDM_0].channels;
5590 break;
5591
5592 default:
5593 pr_err("%s: dai id 0x%x not supported\n",
5594 __func__, cpu_dai->id);
5595 return -EINVAL;
5596 }
5597
5598 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
5599 /*2 slot config - bits 0 and 1 set for the first two slots */
5600 slot_mask = 0x0000FFFF >> (16-slots);
5601 channels = slots;
5602
5603 pr_debug("%s: tdm rx slot_width %d slots %d\n",
5604 __func__, slot_width, slots);
5605
5606 ret = snd_soc_dai_set_tdm_slot(cpu_dai, 0, slot_mask,
5607 slots, slot_width);
5608 if (ret < 0) {
5609 pr_err("%s: failed to set tdm rx slot, err:%d\n",
5610 __func__, ret);
5611 goto end;
5612 }
5613
5614 ret = snd_soc_dai_set_channel_map(cpu_dai,
5615 0, NULL, channels, slot_offset);
5616 if (ret < 0) {
5617 pr_err("%s: failed to set tdm rx channel map, err:%d\n",
5618 __func__, ret);
5619 goto end;
5620 }
5621 } else if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) {
5622 /*2 slot config - bits 0 and 1 set for the first two slots */
5623 slot_mask = 0x0000FFFF >> (16-slots);
5624 channels = slots;
5625
5626 pr_debug("%s: tdm tx slot_width %d slots %d\n",
5627 __func__, slot_width, slots);
5628
5629 ret = snd_soc_dai_set_tdm_slot(cpu_dai, slot_mask, 0,
5630 slots, slot_width);
5631 if (ret < 0) {
5632 pr_err("%s: failed to set tdm tx slot, err:%d\n",
5633 __func__, ret);
5634 goto end;
5635 }
5636
5637 ret = snd_soc_dai_set_channel_map(cpu_dai,
5638 channels, slot_offset, 0, NULL);
5639 if (ret < 0) {
5640 pr_err("%s: failed to set tdm tx channel map, err:%d\n",
5641 __func__, ret);
5642 goto end;
5643 }
5644 } else {
5645 ret = -EINVAL;
5646 pr_err("%s: invalid use case, err:%d\n",
5647 __func__, ret);
5648 goto end;
5649 }
5650
5651 rate = params_rate(params);
5652 clk_freq = rate * slot_width * slots;
5653 ret = snd_soc_dai_set_sysclk(cpu_dai, 0, clk_freq, SND_SOC_CLOCK_OUT);
5654 if (ret < 0)
5655 pr_err("%s: failed to set tdm clk, err:%d\n",
5656 __func__, ret);
5657
5658end:
5659 return ret;
5660}
5661
5662static int sm6150_tdm_snd_startup(struct snd_pcm_substream *substream)
5663{
5664 int ret = 0;
5665 struct snd_soc_pcm_runtime *rtd = substream->private_data;
5666 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
5667 struct snd_soc_card *card = rtd->card;
5668 struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
5669 struct msm_pinctrl_info *pinctrl_info = &pdata->pinctrl_info;
5670
5671 /* currently only supporting TDM_RX_0 and TDM_TX_0 */
5672 if ((cpu_dai->id == AFE_PORT_ID_QUATERNARY_TDM_RX) ||
5673 (cpu_dai->id == AFE_PORT_ID_QUATERNARY_TDM_TX)) {
5674 ret = msm_set_pinctrl(pinctrl_info, STATE_TDM_ACTIVE);
5675 if (ret)
5676 pr_err("%s: TDM TLMM pinctrl set failed with %d\n",
5677 __func__, ret);
5678 }
5679
5680 return ret;
5681}
5682
5683static void sm6150_tdm_snd_shutdown(struct snd_pcm_substream *substream)
5684{
5685 int ret = 0;
5686 struct snd_soc_pcm_runtime *rtd = substream->private_data;
5687 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
5688 struct snd_soc_card *card = rtd->card;
5689 struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
5690 struct msm_pinctrl_info *pinctrl_info = &pdata->pinctrl_info;
5691
5692 /* currently only supporting TDM_RX_0 and TDM_TX_0 */
5693 if ((cpu_dai->id == AFE_PORT_ID_QUATERNARY_TDM_RX) ||
5694 (cpu_dai->id == AFE_PORT_ID_QUATERNARY_TDM_TX)) {
5695 ret = msm_set_pinctrl(pinctrl_info, STATE_DISABLE);
5696 if (ret)
5697 pr_err("%s: TDM TLMM pinctrl set failed with %d\n",
5698 __func__, ret);
5699 }
5700}
5701
5702static struct snd_soc_ops sm6150_tdm_be_ops = {
5703 .hw_params = sm6150_tdm_snd_hw_params,
5704 .startup = sm6150_tdm_snd_startup,
5705 .shutdown = sm6150_tdm_snd_shutdown
5706};
5707
5708static int msm_fe_qos_prepare(struct snd_pcm_substream *substream)
5709{
5710 cpumask_t mask;
5711
5712 if (pm_qos_request_active(&substream->latency_pm_qos_req))
5713 pm_qos_remove_request(&substream->latency_pm_qos_req);
5714
5715 cpumask_clear(&mask);
5716 cpumask_set_cpu(1, &mask); /* affine to core 1 */
5717 cpumask_set_cpu(2, &mask); /* affine to core 2 */
5718 cpumask_copy(&substream->latency_pm_qos_req.cpus_affine, &mask);
5719
5720 substream->latency_pm_qos_req.type = PM_QOS_REQ_AFFINE_CORES;
5721
5722 pm_qos_add_request(&substream->latency_pm_qos_req,
5723 PM_QOS_CPU_DMA_LATENCY,
5724 MSM_LL_QOS_VALUE);
5725 return 0;
5726}
5727
5728static struct snd_soc_ops msm_fe_qos_ops = {
5729 .prepare = msm_fe_qos_prepare,
5730};
5731
5732static int msm_mi2s_snd_startup(struct snd_pcm_substream *substream)
5733{
5734 int ret = 0;
5735 struct snd_soc_pcm_runtime *rtd = substream->private_data;
5736 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
5737 int index = cpu_dai->id;
5738 unsigned int fmt = SND_SOC_DAIFMT_CBS_CFS;
5739 struct snd_soc_card *card = rtd->card;
5740 struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
5741 struct msm_pinctrl_info *pinctrl_info = &pdata->pinctrl_info;
5742 int ret_pinctrl = 0;
5743
5744 dev_dbg(rtd->card->dev,
5745 "%s: substream = %s stream = %d, dai name %s, dai ID %d\n",
5746 __func__, substream->name, substream->stream,
5747 cpu_dai->name, cpu_dai->id);
5748
5749 if (index < PRIM_MI2S || index >= MI2S_MAX) {
5750 ret = -EINVAL;
5751 dev_err(rtd->card->dev,
5752 "%s: CPU DAI id (%d) out of range\n",
5753 __func__, cpu_dai->id);
5754 goto err;
5755 }
5756 /*
5757 * Mutex protection in case the same MI2S
5758 * interface using for both TX and RX so
5759 * that the same clock won't be enable twice.
5760 */
5761 mutex_lock(&mi2s_intf_conf[index].lock);
5762 if (++mi2s_intf_conf[index].ref_cnt == 1) {
5763 /* Check if msm needs to provide the clock to the interface */
5764 if (!mi2s_intf_conf[index].msm_is_mi2s_master) {
5765 mi2s_clk[index].clk_id = mi2s_ebit_clk[index];
5766 fmt = SND_SOC_DAIFMT_CBM_CFM;
5767 }
5768 ret = msm_mi2s_set_sclk(substream, true);
5769 if (ret < 0) {
5770 dev_err(rtd->card->dev,
5771 "%s: afe lpass clock failed to enable MI2S clock, err:%d\n",
5772 __func__, ret);
5773 goto clean_up;
5774 }
5775
5776 ret = snd_soc_dai_set_fmt(cpu_dai, fmt);
5777 if (ret < 0) {
5778 pr_err("%s: set fmt cpu dai failed for MI2S (%d), err:%d\n",
5779 __func__, index, ret);
5780 goto clk_off;
5781 }
5782 if (index == QUAT_MI2S) {
5783 ret_pinctrl = msm_set_pinctrl(pinctrl_info,
5784 STATE_MI2S_ACTIVE);
5785 if (ret_pinctrl)
5786 pr_err("%s: MI2S TLMM pinctrl set failed with %d\n",
5787 __func__, ret_pinctrl);
5788 }
5789 }
5790clk_off:
5791 if (ret < 0)
5792 msm_mi2s_set_sclk(substream, false);
5793clean_up:
5794 if (ret < 0)
5795 mi2s_intf_conf[index].ref_cnt--;
5796 mutex_unlock(&mi2s_intf_conf[index].lock);
5797err:
5798 return ret;
5799}
5800
5801static void msm_mi2s_snd_shutdown(struct snd_pcm_substream *substream)
5802{
5803 int ret;
5804 struct snd_soc_pcm_runtime *rtd = substream->private_data;
5805 int index = rtd->cpu_dai->id;
5806 struct snd_soc_card *card = rtd->card;
5807 struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
5808 struct msm_pinctrl_info *pinctrl_info = &pdata->pinctrl_info;
5809 int ret_pinctrl = 0;
5810
5811 pr_debug("%s(): substream = %s stream = %d\n", __func__,
5812 substream->name, substream->stream);
5813 if (index < PRIM_MI2S || index >= MI2S_MAX) {
5814 pr_err("%s:invalid MI2S DAI(%d)\n", __func__, index);
5815 return;
5816 }
5817
5818 mutex_lock(&mi2s_intf_conf[index].lock);
5819 if (--mi2s_intf_conf[index].ref_cnt == 0) {
5820 ret = msm_mi2s_set_sclk(substream, false);
5821 if (ret < 0)
5822 pr_err("%s:clock disable failed for MI2S (%d); ret=%d\n",
5823 __func__, index, ret);
5824 if (index == QUAT_MI2S) {
5825 ret_pinctrl = msm_set_pinctrl(pinctrl_info,
5826 STATE_DISABLE);
5827 if (ret_pinctrl)
5828 pr_err("%s: MI2S TLMM pinctrl set failed with %d\n",
5829 __func__, ret_pinctrl);
5830 }
5831 }
5832 mutex_unlock(&mi2s_intf_conf[index].lock);
5833}
5834
5835static struct snd_soc_ops msm_mi2s_be_ops = {
5836 .startup = msm_mi2s_snd_startup,
5837 .shutdown = msm_mi2s_snd_shutdown,
5838};
5839
5840static struct snd_soc_ops msm_cdc_dma_be_ops = {
5841 .hw_params = msm_snd_cdc_dma_hw_params,
5842};
5843
5844static struct snd_soc_ops msm_be_ops = {
5845 .hw_params = msm_snd_hw_params,
5846};
5847
5848static struct snd_soc_ops msm_slimbus_2_be_ops = {
5849 .hw_params = msm_slimbus_2_hw_params,
5850};
5851
5852static struct snd_soc_ops msm_wcn_ops = {
5853 .hw_params = msm_wcn_hw_params,
5854};
5855
5856
5857/* Digital audio interface glue - connects codec <---> CPU */
5858static struct snd_soc_dai_link msm_common_dai_links[] = {
5859 /* FrontEnd DAI Links */
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]5860 {/* hw:x,0 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]5861 .name = MSM_DAILINK_NAME(Media1),
5862 .stream_name = "MultiMedia1",
5863 .cpu_dai_name = "MultiMedia1",
5864 .platform_name = "msm-pcm-dsp.0",
5865 .dynamic = 1,
5866 .async_ops = ASYNC_DPCM_SND_SOC_PREPARE,
5867 .dpcm_playback = 1,
5868 .dpcm_capture = 1,
5869 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5870 SND_SOC_DPCM_TRIGGER_POST},
5871 .codec_dai_name = "snd-soc-dummy-dai",
5872 .codec_name = "snd-soc-dummy",
5873 .ignore_suspend = 1,
5874 /* this dainlink has playback support */
5875 .ignore_pmdown_time = 1,
5876 .id = MSM_FRONTEND_DAI_MULTIMEDIA1
5877 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]5878 {/* hw:x,1 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]5879 .name = MSM_DAILINK_NAME(Media2),
5880 .stream_name = "MultiMedia2",
5881 .cpu_dai_name = "MultiMedia2",
5882 .platform_name = "msm-pcm-dsp.0",
5883 .dynamic = 1,
5884 .dpcm_playback = 1,
5885 .dpcm_capture = 1,
5886 .codec_dai_name = "snd-soc-dummy-dai",
5887 .codec_name = "snd-soc-dummy",
5888 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5889 SND_SOC_DPCM_TRIGGER_POST},
5890 .ignore_suspend = 1,
5891 /* this dainlink has playback support */
5892 .ignore_pmdown_time = 1,
5893 .id = MSM_FRONTEND_DAI_MULTIMEDIA2,
5894 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]5895 {/* hw:x,2 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]5896 .name = "VoiceMMode1",
5897 .stream_name = "VoiceMMode1",
5898 .cpu_dai_name = "VoiceMMode1",
5899 .platform_name = "msm-pcm-voice",
5900 .dynamic = 1,
5901 .dpcm_playback = 1,
5902 .dpcm_capture = 1,
5903 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5904 SND_SOC_DPCM_TRIGGER_POST},
5905 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
5906 .ignore_suspend = 1,
5907 .ignore_pmdown_time = 1,
5908 .codec_dai_name = "snd-soc-dummy-dai",
5909 .codec_name = "snd-soc-dummy",
5910 .id = MSM_FRONTEND_DAI_VOICEMMODE1,
5911 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]5912 {/* hw:x,3 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]5913 .name = "MSM VoIP",
5914 .stream_name = "VoIP",
5915 .cpu_dai_name = "VoIP",
5916 .platform_name = "msm-voip-dsp",
5917 .dynamic = 1,
5918 .dpcm_playback = 1,
5919 .dpcm_capture = 1,
5920 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5921 SND_SOC_DPCM_TRIGGER_POST},
5922 .codec_dai_name = "snd-soc-dummy-dai",
5923 .codec_name = "snd-soc-dummy",
5924 .ignore_suspend = 1,
5925 /* this dainlink has playback support */
5926 .ignore_pmdown_time = 1,
5927 .id = MSM_FRONTEND_DAI_VOIP,
5928 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]5929 {/* hw:x,4 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]5930 .name = MSM_DAILINK_NAME(ULL),
5931 .stream_name = "MultiMedia3",
5932 .cpu_dai_name = "MultiMedia3",
5933 .platform_name = "msm-pcm-dsp.2",
5934 .dynamic = 1,
5935 .async_ops = ASYNC_DPCM_SND_SOC_PREPARE,
5936 .dpcm_playback = 1,
5937 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5938 SND_SOC_DPCM_TRIGGER_POST},
5939 .codec_dai_name = "snd-soc-dummy-dai",
5940 .codec_name = "snd-soc-dummy",
5941 .ignore_suspend = 1,
5942 /* this dainlink has playback support */
5943 .ignore_pmdown_time = 1,
5944 .id = MSM_FRONTEND_DAI_MULTIMEDIA3,
5945 },
5946 /* Hostless PCM purpose */
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]5947 {/* hw:x,5 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]5948 .name = "SLIMBUS_0 Hostless",
5949 .stream_name = "SLIMBUS_0 Hostless",
5950 .cpu_dai_name = "SLIMBUS0_HOSTLESS",
5951 .platform_name = "msm-pcm-hostless",
5952 .dynamic = 1,
5953 .dpcm_playback = 1,
5954 .dpcm_capture = 1,
5955 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5956 SND_SOC_DPCM_TRIGGER_POST},
5957 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
5958 .ignore_suspend = 1,
5959 /* this dailink has playback support */
5960 .ignore_pmdown_time = 1,
5961 .codec_dai_name = "snd-soc-dummy-dai",
5962 .codec_name = "snd-soc-dummy",
5963 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]5964 {/* hw:x,6 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]5965 .name = "MSM AFE-PCM RX",
5966 .stream_name = "AFE-PROXY RX",
5967 .cpu_dai_name = "msm-dai-q6-dev.241",
5968 .codec_name = "msm-stub-codec.1",
5969 .codec_dai_name = "msm-stub-rx",
5970 .platform_name = "msm-pcm-afe",
5971 .dpcm_playback = 1,
5972 .ignore_suspend = 1,
5973 /* this dainlink has playback support */
5974 .ignore_pmdown_time = 1,
5975 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]5976 {/* hw:x,7 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]5977 .name = "MSM AFE-PCM TX",
5978 .stream_name = "AFE-PROXY TX",
5979 .cpu_dai_name = "msm-dai-q6-dev.240",
5980 .codec_name = "msm-stub-codec.1",
5981 .codec_dai_name = "msm-stub-tx",
5982 .platform_name = "msm-pcm-afe",
5983 .dpcm_capture = 1,
5984 .ignore_suspend = 1,
5985 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]5986 {/* hw:x,8 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]5987 .name = MSM_DAILINK_NAME(Compress1),
5988 .stream_name = "Compress1",
5989 .cpu_dai_name = "MultiMedia4",
5990 .platform_name = "msm-compress-dsp",
5991 .dynamic = 1,
5992 .async_ops = ASYNC_DPCM_SND_SOC_HW_PARAMS,
5993 .dpcm_playback = 1,
5994 .dpcm_capture = 1,
5995 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5996 SND_SOC_DPCM_TRIGGER_POST},
5997 .codec_dai_name = "snd-soc-dummy-dai",
5998 .codec_name = "snd-soc-dummy",
5999 .ignore_suspend = 1,
6000 .ignore_pmdown_time = 1,
6001 /* this dainlink has playback support */
6002 .id = MSM_FRONTEND_DAI_MULTIMEDIA4,
6003 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6004 {/* hw:x,9 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6005 .name = "AUXPCM Hostless",
6006 .stream_name = "AUXPCM Hostless",
6007 .cpu_dai_name = "AUXPCM_HOSTLESS",
6008 .platform_name = "msm-pcm-hostless",
6009 .dynamic = 1,
6010 .dpcm_playback = 1,
6011 .dpcm_capture = 1,
6012 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6013 SND_SOC_DPCM_TRIGGER_POST},
6014 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6015 .ignore_suspend = 1,
6016 /* this dainlink has playback support */
6017 .ignore_pmdown_time = 1,
6018 .codec_dai_name = "snd-soc-dummy-dai",
6019 .codec_name = "snd-soc-dummy",
6020 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6021 {/* hw:x,10 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6022 .name = "SLIMBUS_1 Hostless",
6023 .stream_name = "SLIMBUS_1 Hostless",
6024 .cpu_dai_name = "SLIMBUS1_HOSTLESS",
6025 .platform_name = "msm-pcm-hostless",
6026 .dynamic = 1,
6027 .dpcm_playback = 1,
6028 .dpcm_capture = 1,
6029 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6030 SND_SOC_DPCM_TRIGGER_POST},
6031 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6032 .ignore_suspend = 1,
6033 /* this dailink has playback support */
6034 .ignore_pmdown_time = 1,
6035 .codec_dai_name = "snd-soc-dummy-dai",
6036 .codec_name = "snd-soc-dummy",
6037 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6038 {/* hw:x,11 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6039 .name = "SLIMBUS_3 Hostless",
6040 .stream_name = "SLIMBUS_3 Hostless",
6041 .cpu_dai_name = "SLIMBUS3_HOSTLESS",
6042 .platform_name = "msm-pcm-hostless",
6043 .dynamic = 1,
6044 .dpcm_playback = 1,
6045 .dpcm_capture = 1,
6046 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6047 SND_SOC_DPCM_TRIGGER_POST},
6048 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6049 .ignore_suspend = 1,
6050 /* this dailink has playback support */
6051 .ignore_pmdown_time = 1,
6052 .codec_dai_name = "snd-soc-dummy-dai",
6053 .codec_name = "snd-soc-dummy",
6054 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6055 {/* hw:x,12 */
6056 .name = "SLIMBUS_7 Hostless",
6057 .stream_name = "SLIMBUS_7 Hostless",
6058 .cpu_dai_name = "SLIMBUS7_HOSTLESS",
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6059 .platform_name = "msm-pcm-hostless",
6060 .dynamic = 1,
6061 .dpcm_playback = 1,
6062 .dpcm_capture = 1,
6063 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6064 SND_SOC_DPCM_TRIGGER_POST},
6065 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6066 .ignore_suspend = 1,
6067 /* this dailink has playback support */
6068 .ignore_pmdown_time = 1,
6069 .codec_dai_name = "snd-soc-dummy-dai",
6070 .codec_name = "snd-soc-dummy",
6071 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6072 {/* hw:x,13 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6073 .name = MSM_DAILINK_NAME(LowLatency),
6074 .stream_name = "MultiMedia5",
6075 .cpu_dai_name = "MultiMedia5",
6076 .platform_name = "msm-pcm-dsp.1",
6077 .dynamic = 1,
6078 .async_ops = ASYNC_DPCM_SND_SOC_PREPARE,
6079 .dpcm_playback = 1,
6080 .dpcm_capture = 1,
6081 .codec_dai_name = "snd-soc-dummy-dai",
6082 .codec_name = "snd-soc-dummy",
6083 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6084 SND_SOC_DPCM_TRIGGER_POST},
6085 .ignore_suspend = 1,
6086 /* this dainlink has playback support */
6087 .ignore_pmdown_time = 1,
6088 .id = MSM_FRONTEND_DAI_MULTIMEDIA5,
6089 .ops = &msm_fe_qos_ops,
6090 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6091 {/* hw:x,14 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6092 .name = "Listen 1 Audio Service",
6093 .stream_name = "Listen 1 Audio Service",
6094 .cpu_dai_name = "LSM1",
6095 .platform_name = "msm-lsm-client",
6096 .dynamic = 1,
6097 .dpcm_capture = 1,
6098 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
6099 SND_SOC_DPCM_TRIGGER_POST },
6100 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6101 .ignore_suspend = 1,
6102 .codec_dai_name = "snd-soc-dummy-dai",
6103 .codec_name = "snd-soc-dummy",
6104 .id = MSM_FRONTEND_DAI_LSM1,
6105 },
6106 /* Multiple Tunnel instances */
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6107 {/* hw:x,15 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6108 .name = MSM_DAILINK_NAME(Compress2),
6109 .stream_name = "Compress2",
6110 .cpu_dai_name = "MultiMedia7",
6111 .platform_name = "msm-compress-dsp",
6112 .dynamic = 1,
6113 .dpcm_playback = 1,
6114 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6115 SND_SOC_DPCM_TRIGGER_POST},
6116 .codec_dai_name = "snd-soc-dummy-dai",
6117 .codec_name = "snd-soc-dummy",
6118 .ignore_suspend = 1,
6119 .ignore_pmdown_time = 1,
6120 /* this dainlink has playback support */
6121 .id = MSM_FRONTEND_DAI_MULTIMEDIA7,
6122 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6123 {/* hw:x,16 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6124 .name = MSM_DAILINK_NAME(MultiMedia10),
6125 .stream_name = "MultiMedia10",
6126 .cpu_dai_name = "MultiMedia10",
6127 .platform_name = "msm-pcm-dsp.1",
6128 .dynamic = 1,
6129 .dpcm_playback = 1,
6130 .dpcm_capture = 1,
6131 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6132 SND_SOC_DPCM_TRIGGER_POST},
6133 .codec_dai_name = "snd-soc-dummy-dai",
6134 .codec_name = "snd-soc-dummy",
6135 .ignore_suspend = 1,
6136 .ignore_pmdown_time = 1,
6137 /* this dainlink has playback support */
6138 .id = MSM_FRONTEND_DAI_MULTIMEDIA10,
6139 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6140 {/* hw:x,17 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6141 .name = MSM_DAILINK_NAME(ULL_NOIRQ),
6142 .stream_name = "MM_NOIRQ",
6143 .cpu_dai_name = "MultiMedia8",
6144 .platform_name = "msm-pcm-dsp-noirq",
6145 .dynamic = 1,
6146 .dpcm_playback = 1,
6147 .dpcm_capture = 1,
6148 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6149 SND_SOC_DPCM_TRIGGER_POST},
6150 .codec_dai_name = "snd-soc-dummy-dai",
6151 .codec_name = "snd-soc-dummy",
6152 .ignore_suspend = 1,
6153 .ignore_pmdown_time = 1,
6154 /* this dainlink has playback support */
6155 .id = MSM_FRONTEND_DAI_MULTIMEDIA8,
6156 .ops = &msm_fe_qos_ops,
6157 },
6158 /* HDMI Hostless */
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6159 {/* hw:x,18 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6160 .name = "HDMI_RX_HOSTLESS",
6161 .stream_name = "HDMI_RX_HOSTLESS",
6162 .cpu_dai_name = "HDMI_HOSTLESS",
6163 .platform_name = "msm-pcm-hostless",
6164 .dynamic = 1,
6165 .dpcm_playback = 1,
6166 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6167 SND_SOC_DPCM_TRIGGER_POST},
6168 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6169 .ignore_suspend = 1,
6170 .ignore_pmdown_time = 1,
6171 .codec_dai_name = "snd-soc-dummy-dai",
6172 .codec_name = "snd-soc-dummy",
6173 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6174 {/* hw:x,19 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6175 .name = "VoiceMMode2",
6176 .stream_name = "VoiceMMode2",
6177 .cpu_dai_name = "VoiceMMode2",
6178 .platform_name = "msm-pcm-voice",
6179 .dynamic = 1,
6180 .dpcm_playback = 1,
6181 .dpcm_capture = 1,
6182 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6183 SND_SOC_DPCM_TRIGGER_POST},
6184 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6185 .ignore_suspend = 1,
6186 .ignore_pmdown_time = 1,
6187 .codec_dai_name = "snd-soc-dummy-dai",
6188 .codec_name = "snd-soc-dummy",
6189 .id = MSM_FRONTEND_DAI_VOICEMMODE2,
6190 },
6191 /* LSM FE */
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6192 {/* hw:x,20 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6193 .name = "Listen 2 Audio Service",
6194 .stream_name = "Listen 2 Audio Service",
6195 .cpu_dai_name = "LSM2",
6196 .platform_name = "msm-lsm-client",
6197 .dynamic = 1,
6198 .dpcm_capture = 1,
6199 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
6200 SND_SOC_DPCM_TRIGGER_POST },
6201 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6202 .ignore_suspend = 1,
6203 .codec_dai_name = "snd-soc-dummy-dai",
6204 .codec_name = "snd-soc-dummy",
6205 .id = MSM_FRONTEND_DAI_LSM2,
6206 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6207 {/* hw:x,21 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6208 .name = "Listen 3 Audio Service",
6209 .stream_name = "Listen 3 Audio Service",
6210 .cpu_dai_name = "LSM3",
6211 .platform_name = "msm-lsm-client",
6212 .dynamic = 1,
6213 .dpcm_capture = 1,
6214 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
6215 SND_SOC_DPCM_TRIGGER_POST },
6216 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6217 .ignore_suspend = 1,
6218 .codec_dai_name = "snd-soc-dummy-dai",
6219 .codec_name = "snd-soc-dummy",
6220 .id = MSM_FRONTEND_DAI_LSM3,
6221 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6222 {/* hw:x,22 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6223 .name = "Listen 4 Audio Service",
6224 .stream_name = "Listen 4 Audio Service",
6225 .cpu_dai_name = "LSM4",
6226 .platform_name = "msm-lsm-client",
6227 .dynamic = 1,
6228 .dpcm_capture = 1,
6229 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
6230 SND_SOC_DPCM_TRIGGER_POST },
6231 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6232 .ignore_suspend = 1,
6233 .codec_dai_name = "snd-soc-dummy-dai",
6234 .codec_name = "snd-soc-dummy",
6235 .id = MSM_FRONTEND_DAI_LSM4,
6236 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6237 {/* hw:x,23 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6238 .name = "Listen 5 Audio Service",
6239 .stream_name = "Listen 5 Audio Service",
6240 .cpu_dai_name = "LSM5",
6241 .platform_name = "msm-lsm-client",
6242 .dynamic = 1,
6243 .dpcm_capture = 1,
6244 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
6245 SND_SOC_DPCM_TRIGGER_POST },
6246 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6247 .ignore_suspend = 1,
6248 .codec_dai_name = "snd-soc-dummy-dai",
6249 .codec_name = "snd-soc-dummy",
6250 .id = MSM_FRONTEND_DAI_LSM5,
6251 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6252 {/* hw:x,24 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6253 .name = "Listen 6 Audio Service",
6254 .stream_name = "Listen 6 Audio Service",
6255 .cpu_dai_name = "LSM6",
6256 .platform_name = "msm-lsm-client",
6257 .dynamic = 1,
6258 .dpcm_capture = 1,
6259 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
6260 SND_SOC_DPCM_TRIGGER_POST },
6261 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6262 .ignore_suspend = 1,
6263 .codec_dai_name = "snd-soc-dummy-dai",
6264 .codec_name = "snd-soc-dummy",
6265 .id = MSM_FRONTEND_DAI_LSM6,
6266 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6267 {/* hw:x,25 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6268 .name = "Listen 7 Audio Service",
6269 .stream_name = "Listen 7 Audio Service",
6270 .cpu_dai_name = "LSM7",
6271 .platform_name = "msm-lsm-client",
6272 .dynamic = 1,
6273 .dpcm_capture = 1,
6274 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
6275 SND_SOC_DPCM_TRIGGER_POST },
6276 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6277 .ignore_suspend = 1,
6278 .codec_dai_name = "snd-soc-dummy-dai",
6279 .codec_name = "snd-soc-dummy",
6280 .id = MSM_FRONTEND_DAI_LSM7,
6281 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6282 {/* hw:x,26 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6283 .name = "Listen 8 Audio Service",
6284 .stream_name = "Listen 8 Audio Service",
6285 .cpu_dai_name = "LSM8",
6286 .platform_name = "msm-lsm-client",
6287 .dynamic = 1,
6288 .dpcm_capture = 1,
6289 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
6290 SND_SOC_DPCM_TRIGGER_POST },
6291 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6292 .ignore_suspend = 1,
6293 .codec_dai_name = "snd-soc-dummy-dai",
6294 .codec_name = "snd-soc-dummy",
6295 .id = MSM_FRONTEND_DAI_LSM8,
6296 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6297 {/* hw:x,27 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6298 .name = MSM_DAILINK_NAME(Media9),
6299 .stream_name = "MultiMedia9",
6300 .cpu_dai_name = "MultiMedia9",
6301 .platform_name = "msm-pcm-dsp.0",
6302 .dynamic = 1,
6303 .dpcm_playback = 1,
6304 .dpcm_capture = 1,
6305 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6306 SND_SOC_DPCM_TRIGGER_POST},
6307 .codec_dai_name = "snd-soc-dummy-dai",
6308 .codec_name = "snd-soc-dummy",
6309 .ignore_suspend = 1,
6310 /* this dainlink has playback support */
6311 .ignore_pmdown_time = 1,
6312 .id = MSM_FRONTEND_DAI_MULTIMEDIA9,
6313 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6314 {/* hw:x,28 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6315 .name = MSM_DAILINK_NAME(Compress4),
6316 .stream_name = "Compress4",
6317 .cpu_dai_name = "MultiMedia11",
6318 .platform_name = "msm-compress-dsp",
6319 .dynamic = 1,
6320 .dpcm_playback = 1,
6321 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6322 SND_SOC_DPCM_TRIGGER_POST},
6323 .codec_dai_name = "snd-soc-dummy-dai",
6324 .codec_name = "snd-soc-dummy",
6325 .ignore_suspend = 1,
6326 .ignore_pmdown_time = 1,
6327 /* this dainlink has playback support */
6328 .id = MSM_FRONTEND_DAI_MULTIMEDIA11,
6329 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6330 {/* hw:x,29 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6331 .name = MSM_DAILINK_NAME(Compress5),
6332 .stream_name = "Compress5",
6333 .cpu_dai_name = "MultiMedia12",
6334 .platform_name = "msm-compress-dsp",
6335 .dynamic = 1,
6336 .dpcm_playback = 1,
6337 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6338 SND_SOC_DPCM_TRIGGER_POST},
6339 .codec_dai_name = "snd-soc-dummy-dai",
6340 .codec_name = "snd-soc-dummy",
6341 .ignore_suspend = 1,
6342 .ignore_pmdown_time = 1,
6343 /* this dainlink has playback support */
6344 .id = MSM_FRONTEND_DAI_MULTIMEDIA12,
6345 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6346 {/* hw:x,30 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6347 .name = MSM_DAILINK_NAME(Compress6),
6348 .stream_name = "Compress6",
6349 .cpu_dai_name = "MultiMedia13",
6350 .platform_name = "msm-compress-dsp",
6351 .dynamic = 1,
6352 .dpcm_playback = 1,
6353 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6354 SND_SOC_DPCM_TRIGGER_POST},
6355 .codec_dai_name = "snd-soc-dummy-dai",
6356 .codec_name = "snd-soc-dummy",
6357 .ignore_suspend = 1,
6358 .ignore_pmdown_time = 1,
6359 /* this dainlink has playback support */
6360 .id = MSM_FRONTEND_DAI_MULTIMEDIA13,
6361 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6362 {/* hw:x,31 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6363 .name = MSM_DAILINK_NAME(Compress7),
6364 .stream_name = "Compress7",
6365 .cpu_dai_name = "MultiMedia14",
6366 .platform_name = "msm-compress-dsp",
6367 .dynamic = 1,
6368 .dpcm_playback = 1,
6369 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6370 SND_SOC_DPCM_TRIGGER_POST},
6371 .codec_dai_name = "snd-soc-dummy-dai",
6372 .codec_name = "snd-soc-dummy",
6373 .ignore_suspend = 1,
6374 .ignore_pmdown_time = 1,
6375 /* this dainlink has playback support */
6376 .id = MSM_FRONTEND_DAI_MULTIMEDIA14,
6377 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6378 {/* hw:x,32 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6379 .name = MSM_DAILINK_NAME(Compress8),
6380 .stream_name = "Compress8",
6381 .cpu_dai_name = "MultiMedia15",
6382 .platform_name = "msm-compress-dsp",
6383 .dynamic = 1,
6384 .dpcm_playback = 1,
6385 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6386 SND_SOC_DPCM_TRIGGER_POST},
6387 .codec_dai_name = "snd-soc-dummy-dai",
6388 .codec_name = "snd-soc-dummy",
6389 .ignore_suspend = 1,
6390 .ignore_pmdown_time = 1,
6391 /* this dainlink has playback support */
6392 .id = MSM_FRONTEND_DAI_MULTIMEDIA15,
6393 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6394 {/* hw:x,33 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6395 .name = MSM_DAILINK_NAME(ULL_NOIRQ_2),
6396 .stream_name = "MM_NOIRQ_2",
6397 .cpu_dai_name = "MultiMedia16",
6398 .platform_name = "msm-pcm-dsp-noirq",
6399 .dynamic = 1,
6400 .dpcm_playback = 1,
6401 .dpcm_capture = 1,
6402 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6403 SND_SOC_DPCM_TRIGGER_POST},
6404 .codec_dai_name = "snd-soc-dummy-dai",
6405 .codec_name = "snd-soc-dummy",
6406 .ignore_suspend = 1,
6407 .ignore_pmdown_time = 1,
6408 /* this dainlink has playback support */
6409 .id = MSM_FRONTEND_DAI_MULTIMEDIA16,
6410 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6411 {/* hw:x,34 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6412 .name = "SLIMBUS_8 Hostless",
6413 .stream_name = "SLIMBUS8_HOSTLESS Capture",
6414 .cpu_dai_name = "SLIMBUS8_HOSTLESS",
6415 .platform_name = "msm-pcm-hostless",
6416 .dynamic = 1,
6417 .dpcm_capture = 1,
6418 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6419 SND_SOC_DPCM_TRIGGER_POST},
6420 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6421 .ignore_suspend = 1,
6422 .codec_dai_name = "snd-soc-dummy-dai",
6423 .codec_name = "snd-soc-dummy",
6424 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6425 {/* hw:x,35 */
6426 .name = "CDC_DMA Hostless",
6427 .stream_name = "CDC_DMA Hostless",
6428 .cpu_dai_name = "CDC_DMA_HOSTLESS",
6429 .platform_name = "msm-pcm-hostless",
6430 .dynamic = 1,
6431 .dpcm_playback = 1,
6432 .dpcm_capture = 1,
6433 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6434 SND_SOC_DPCM_TRIGGER_POST},
6435 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6436 .ignore_suspend = 1,
6437 /* this dailink has playback support */
6438 .ignore_pmdown_time = 1,
6439 .codec_dai_name = "snd-soc-dummy-dai",
6440 .codec_name = "snd-soc-dummy",
6441 },
6442 {/* hw:x,36 */
6443 .name = "TX3_CDC_DMA Hostless",
6444 .stream_name = "TX3_CDC_DMA Hostless",
6445 .cpu_dai_name = "TX3_CDC_DMA_HOSTLESS",
6446 .platform_name = "msm-pcm-hostless",
6447 .dynamic = 1,
6448 .dpcm_capture = 1,
6449 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6450 SND_SOC_DPCM_TRIGGER_POST},
6451 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6452 .ignore_suspend = 1,
6453 .codec_dai_name = "snd-soc-dummy-dai",
6454 .codec_name = "snd-soc-dummy",
6455 },
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6456};
6457
6458
6459static struct snd_soc_dai_link msm_tavil_fe_dai_links[] = {
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6460 {/* hw:x,37 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6461 .name = LPASS_BE_SLIMBUS_4_TX,
6462 .stream_name = "Slimbus4 Capture",
6463 .cpu_dai_name = "msm-dai-q6-dev.16393",
6464 .platform_name = "msm-pcm-hostless",
6465 .codec_name = "tavil_codec",
6466 .codec_dai_name = "tavil_vifeedback",
6467 .id = MSM_BACKEND_DAI_SLIMBUS_4_TX,
6468 .be_hw_params_fixup = msm_be_hw_params_fixup,
6469 .ops = &msm_be_ops,
6470 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6471 .ignore_suspend = 1,
6472 },
6473 /* Ultrasound RX DAI Link */
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6474 {/* hw:x,38 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6475 .name = "SLIMBUS_2 Hostless Playback",
6476 .stream_name = "SLIMBUS_2 Hostless Playback",
6477 .cpu_dai_name = "msm-dai-q6-dev.16388",
6478 .platform_name = "msm-pcm-hostless",
6479 .codec_name = "tavil_codec",
6480 .codec_dai_name = "tavil_rx2",
6481 .ignore_suspend = 1,
6482 .ignore_pmdown_time = 1,
6483 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6484 .ops = &msm_slimbus_2_be_ops,
6485 },
6486 /* Ultrasound TX DAI Link */
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6487 {/* hw:x,39 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6488 .name = "SLIMBUS_2 Hostless Capture",
6489 .stream_name = "SLIMBUS_2 Hostless Capture",
6490 .cpu_dai_name = "msm-dai-q6-dev.16389",
6491 .platform_name = "msm-pcm-hostless",
6492 .codec_name = "tavil_codec",
6493 .codec_dai_name = "tavil_tx2",
6494 .ignore_suspend = 1,
6495 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6496 .ops = &msm_slimbus_2_be_ops,
6497 },
6498};
6499
6500static struct snd_soc_dai_link msm_bolero_fe_dai_links[] = {
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6501 {/* hw:x,37 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6502 .name = LPASS_BE_WSA_CDC_DMA_TX_0,
6503 .stream_name = "WSA CDC DMA0 Capture",
6504 .cpu_dai_name = "msm-dai-cdc-dma-dev.45057",
6505 .platform_name = "msm-pcm-hostless",
6506 .codec_name = "bolero_codec",
6507 .codec_dai_name = "wsa_macro_vifeedback",
6508 .id = MSM_BACKEND_DAI_WSA_CDC_DMA_TX_0,
6509 .be_hw_params_fixup = msm_be_hw_params_fixup,
6510 .ignore_suspend = 1,
6511 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6512 .ops = &msm_cdc_dma_be_ops,
6513 },
6514};
6515
6516static struct snd_soc_dai_link msm_common_misc_fe_dai_links[] = {
6517 {
6518 .name = MSM_DAILINK_NAME(ASM Loopback),
6519 .stream_name = "MultiMedia6",
6520 .cpu_dai_name = "MultiMedia6",
6521 .platform_name = "msm-pcm-loopback",
6522 .dynamic = 1,
6523 .dpcm_playback = 1,
6524 .dpcm_capture = 1,
6525 .codec_dai_name = "snd-soc-dummy-dai",
6526 .codec_name = "snd-soc-dummy",
6527 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6528 SND_SOC_DPCM_TRIGGER_POST},
6529 .ignore_suspend = 1,
6530 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6531 .ignore_pmdown_time = 1,
6532 .id = MSM_FRONTEND_DAI_MULTIMEDIA6,
6533 },
6534 {
6535 .name = "USB Audio Hostless",
6536 .stream_name = "USB Audio Hostless",
6537 .cpu_dai_name = "USBAUDIO_HOSTLESS",
6538 .platform_name = "msm-pcm-hostless",
6539 .dynamic = 1,
6540 .dpcm_playback = 1,
6541 .dpcm_capture = 1,
6542 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6543 SND_SOC_DPCM_TRIGGER_POST},
6544 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6545 .ignore_suspend = 1,
6546 .ignore_pmdown_time = 1,
6547 .codec_dai_name = "snd-soc-dummy-dai",
6548 .codec_name = "snd-soc-dummy",
6549 },
6550};
6551
6552static struct snd_soc_dai_link msm_common_be_dai_links[] = {
6553 /* Backend AFE DAI Links */
6554 {
6555 .name = LPASS_BE_AFE_PCM_RX,
6556 .stream_name = "AFE Playback",
6557 .cpu_dai_name = "msm-dai-q6-dev.224",
6558 .platform_name = "msm-pcm-routing",
6559 .codec_name = "msm-stub-codec.1",
6560 .codec_dai_name = "msm-stub-rx",
6561 .no_pcm = 1,
6562 .dpcm_playback = 1,
6563 .id = MSM_BACKEND_DAI_AFE_PCM_RX,
6564 .be_hw_params_fixup = msm_be_hw_params_fixup,
6565 /* this dainlink has playback support */
6566 .ignore_pmdown_time = 1,
6567 .ignore_suspend = 1,
6568 },
6569 {
6570 .name = LPASS_BE_AFE_PCM_TX,
6571 .stream_name = "AFE Capture",
6572 .cpu_dai_name = "msm-dai-q6-dev.225",
6573 .platform_name = "msm-pcm-routing",
6574 .codec_name = "msm-stub-codec.1",
6575 .codec_dai_name = "msm-stub-tx",
6576 .no_pcm = 1,
6577 .dpcm_capture = 1,
6578 .id = MSM_BACKEND_DAI_AFE_PCM_TX,
6579 .be_hw_params_fixup = msm_be_hw_params_fixup,
6580 .ignore_suspend = 1,
6581 },
6582 /* Incall Record Uplink BACK END DAI Link */
6583 {
6584 .name = LPASS_BE_INCALL_RECORD_TX,
6585 .stream_name = "Voice Uplink Capture",
6586 .cpu_dai_name = "msm-dai-q6-dev.32772",
6587 .platform_name = "msm-pcm-routing",
6588 .codec_name = "msm-stub-codec.1",
6589 .codec_dai_name = "msm-stub-tx",
6590 .no_pcm = 1,
6591 .dpcm_capture = 1,
6592 .id = MSM_BACKEND_DAI_INCALL_RECORD_TX,
6593 .be_hw_params_fixup = msm_be_hw_params_fixup,
6594 .ignore_suspend = 1,
6595 },
6596 /* Incall Record Downlink BACK END DAI Link */
6597 {
6598 .name = LPASS_BE_INCALL_RECORD_RX,
6599 .stream_name = "Voice Downlink Capture",
6600 .cpu_dai_name = "msm-dai-q6-dev.32771",
6601 .platform_name = "msm-pcm-routing",
6602 .codec_name = "msm-stub-codec.1",
6603 .codec_dai_name = "msm-stub-tx",
6604 .no_pcm = 1,
6605 .dpcm_capture = 1,
6606 .id = MSM_BACKEND_DAI_INCALL_RECORD_RX,
6607 .be_hw_params_fixup = msm_be_hw_params_fixup,
6608 .ignore_suspend = 1,
6609 },
6610 /* Incall Music BACK END DAI Link */
6611 {
6612 .name = LPASS_BE_VOICE_PLAYBACK_TX,
6613 .stream_name = "Voice Farend Playback",
6614 .cpu_dai_name = "msm-dai-q6-dev.32773",
6615 .platform_name = "msm-pcm-routing",
6616 .codec_name = "msm-stub-codec.1",
6617 .codec_dai_name = "msm-stub-rx",
6618 .no_pcm = 1,
6619 .dpcm_playback = 1,
6620 .id = MSM_BACKEND_DAI_VOICE_PLAYBACK_TX,
6621 .be_hw_params_fixup = msm_be_hw_params_fixup,
6622 .ignore_suspend = 1,
6623 .ignore_pmdown_time = 1,
6624 },
6625 /* Incall Music 2 BACK END DAI Link */
6626 {
6627 .name = LPASS_BE_VOICE2_PLAYBACK_TX,
6628 .stream_name = "Voice2 Farend Playback",
6629 .cpu_dai_name = "msm-dai-q6-dev.32770",
6630 .platform_name = "msm-pcm-routing",
6631 .codec_name = "msm-stub-codec.1",
6632 .codec_dai_name = "msm-stub-rx",
6633 .no_pcm = 1,
6634 .dpcm_playback = 1,
6635 .id = MSM_BACKEND_DAI_VOICE2_PLAYBACK_TX,
6636 .be_hw_params_fixup = msm_be_hw_params_fixup,
6637 .ignore_suspend = 1,
6638 .ignore_pmdown_time = 1,
6639 },
6640 {
6641 .name = LPASS_BE_USB_AUDIO_RX,
6642 .stream_name = "USB Audio Playback",
6643 .cpu_dai_name = "msm-dai-q6-dev.28672",
6644 .platform_name = "msm-pcm-routing",
6645 .codec_name = "msm-stub-codec.1",
6646 .codec_dai_name = "msm-stub-rx",
6647 .no_pcm = 1,
6648 .dpcm_playback = 1,
6649 .id = MSM_BACKEND_DAI_USB_RX,
6650 .be_hw_params_fixup = msm_be_hw_params_fixup,
6651 .ignore_pmdown_time = 1,
6652 .ignore_suspend = 1,
6653 },
6654 {
6655 .name = LPASS_BE_USB_AUDIO_TX,
6656 .stream_name = "USB Audio Capture",
6657 .cpu_dai_name = "msm-dai-q6-dev.28673",
6658 .platform_name = "msm-pcm-routing",
6659 .codec_name = "msm-stub-codec.1",
6660 .codec_dai_name = "msm-stub-tx",
6661 .no_pcm = 1,
6662 .dpcm_capture = 1,
6663 .id = MSM_BACKEND_DAI_USB_TX,
6664 .be_hw_params_fixup = msm_be_hw_params_fixup,
6665 .ignore_suspend = 1,
6666 },
6667 {
6668 .name = LPASS_BE_PRI_TDM_RX_0,
6669 .stream_name = "Primary TDM0 Playback",
6670 .cpu_dai_name = "msm-dai-q6-tdm.36864",
6671 .platform_name = "msm-pcm-routing",
6672 .codec_name = "msm-stub-codec.1",
6673 .codec_dai_name = "msm-stub-rx",
6674 .no_pcm = 1,
6675 .dpcm_playback = 1,
6676 .id = MSM_BACKEND_DAI_PRI_TDM_RX_0,
6677 .be_hw_params_fixup = msm_be_hw_params_fixup,
6678 .ops = &sm6150_tdm_be_ops,
6679 .ignore_suspend = 1,
6680 .ignore_pmdown_time = 1,
6681 },
6682 {
6683 .name = LPASS_BE_PRI_TDM_TX_0,
6684 .stream_name = "Primary TDM0 Capture",
6685 .cpu_dai_name = "msm-dai-q6-tdm.36865",
6686 .platform_name = "msm-pcm-routing",
6687 .codec_name = "msm-stub-codec.1",
6688 .codec_dai_name = "msm-stub-tx",
6689 .no_pcm = 1,
6690 .dpcm_capture = 1,
6691 .id = MSM_BACKEND_DAI_PRI_TDM_TX_0,
6692 .be_hw_params_fixup = msm_be_hw_params_fixup,
6693 .ops = &sm6150_tdm_be_ops,
6694 .ignore_suspend = 1,
6695 },
6696 {
6697 .name = LPASS_BE_SEC_TDM_RX_0,
6698 .stream_name = "Secondary TDM0 Playback",
6699 .cpu_dai_name = "msm-dai-q6-tdm.36880",
6700 .platform_name = "msm-pcm-routing",
6701 .codec_name = "msm-stub-codec.1",
6702 .codec_dai_name = "msm-stub-rx",
6703 .no_pcm = 1,
6704 .dpcm_playback = 1,
6705 .id = MSM_BACKEND_DAI_SEC_TDM_RX_0,
6706 .be_hw_params_fixup = msm_be_hw_params_fixup,
6707 .ops = &sm6150_tdm_be_ops,
6708 .ignore_suspend = 1,
6709 .ignore_pmdown_time = 1,
6710 },
6711 {
6712 .name = LPASS_BE_SEC_TDM_TX_0,
6713 .stream_name = "Secondary TDM0 Capture",
6714 .cpu_dai_name = "msm-dai-q6-tdm.36881",
6715 .platform_name = "msm-pcm-routing",
6716 .codec_name = "msm-stub-codec.1",
6717 .codec_dai_name = "msm-stub-tx",
6718 .no_pcm = 1,
6719 .dpcm_capture = 1,
6720 .id = MSM_BACKEND_DAI_SEC_TDM_TX_0,
6721 .be_hw_params_fixup = msm_be_hw_params_fixup,
6722 .ops = &sm6150_tdm_be_ops,
6723 .ignore_suspend = 1,
6724 },
6725 {
6726 .name = LPASS_BE_TERT_TDM_RX_0,
6727 .stream_name = "Tertiary TDM0 Playback",
6728 .cpu_dai_name = "msm-dai-q6-tdm.36896",
6729 .platform_name = "msm-pcm-routing",
6730 .codec_name = "msm-stub-codec.1",
6731 .codec_dai_name = "msm-stub-rx",
6732 .no_pcm = 1,
6733 .dpcm_playback = 1,
6734 .id = MSM_BACKEND_DAI_TERT_TDM_RX_0,
6735 .be_hw_params_fixup = msm_be_hw_params_fixup,
6736 .ops = &sm6150_tdm_be_ops,
6737 .ignore_suspend = 1,
6738 .ignore_pmdown_time = 1,
6739 },
6740 {
6741 .name = LPASS_BE_TERT_TDM_TX_0,
6742 .stream_name = "Tertiary TDM0 Capture",
6743 .cpu_dai_name = "msm-dai-q6-tdm.36897",
6744 .platform_name = "msm-pcm-routing",
6745 .codec_name = "msm-stub-codec.1",
6746 .codec_dai_name = "msm-stub-tx",
6747 .no_pcm = 1,
6748 .dpcm_capture = 1,
6749 .id = MSM_BACKEND_DAI_TERT_TDM_TX_0,
6750 .be_hw_params_fixup = msm_be_hw_params_fixup,
6751 .ops = &sm6150_tdm_be_ops,
6752 .ignore_suspend = 1,
6753 },
6754 {
6755 .name = LPASS_BE_QUAT_TDM_RX_0,
6756 .stream_name = "Quaternary TDM0 Playback",
6757 .cpu_dai_name = "msm-dai-q6-tdm.36912",
6758 .platform_name = "msm-pcm-routing",
6759 .codec_name = "msm-stub-codec.1",
6760 .codec_dai_name = "msm-stub-rx",
6761 .no_pcm = 1,
6762 .dpcm_playback = 1,
6763 .id = MSM_BACKEND_DAI_QUAT_TDM_RX_0,
6764 .be_hw_params_fixup = msm_tdm_be_hw_params_fixup,
6765 .ops = &sm6150_tdm_be_ops,
6766 .ignore_suspend = 1,
6767 .ignore_pmdown_time = 1,
6768 },
6769 {
6770 .name = LPASS_BE_QUAT_TDM_TX_0,
6771 .stream_name = "Quaternary TDM0 Capture",
6772 .cpu_dai_name = "msm-dai-q6-tdm.36913",
6773 .platform_name = "msm-pcm-routing",
6774 .codec_name = "msm-stub-codec.1",
6775 .codec_dai_name = "msm-stub-tx",
6776 .no_pcm = 1,
6777 .dpcm_capture = 1,
6778 .id = MSM_BACKEND_DAI_QUAT_TDM_TX_0,
6779 .be_hw_params_fixup = msm_be_hw_params_fixup,
6780 .ops = &sm6150_tdm_be_ops,
6781 .ignore_suspend = 1,
6782 },
6783};
6784
6785static struct snd_soc_dai_link msm_tavil_be_dai_links[] = {
6786 {
6787 .name = LPASS_BE_SLIMBUS_0_RX,
6788 .stream_name = "Slimbus Playback",
6789 .cpu_dai_name = "msm-dai-q6-dev.16384",
6790 .platform_name = "msm-pcm-routing",
6791 .codec_name = "tavil_codec",
6792 .codec_dai_name = "tavil_rx1",
6793 .no_pcm = 1,
6794 .dpcm_playback = 1,
6795 .id = MSM_BACKEND_DAI_SLIMBUS_0_RX,
6796 .init = &msm_audrx_tavil_init,
6797 .be_hw_params_fixup = msm_be_hw_params_fixup,
6798 /* this dainlink has playback support */
6799 .ignore_pmdown_time = 1,
6800 .ignore_suspend = 1,
6801 .ops = &msm_be_ops,
6802 },
6803 {
6804 .name = LPASS_BE_SLIMBUS_0_TX,
6805 .stream_name = "Slimbus Capture",
6806 .cpu_dai_name = "msm-dai-q6-dev.16385",
6807 .platform_name = "msm-pcm-routing",
6808 .codec_name = "tavil_codec",
6809 .codec_dai_name = "tavil_tx1",
6810 .no_pcm = 1,
6811 .dpcm_capture = 1,
6812 .id = MSM_BACKEND_DAI_SLIMBUS_0_TX,
6813 .be_hw_params_fixup = msm_be_hw_params_fixup,
6814 .ignore_suspend = 1,
6815 .ops = &msm_be_ops,
6816 },
6817 {
6818 .name = LPASS_BE_SLIMBUS_1_RX,
6819 .stream_name = "Slimbus1 Playback",
6820 .cpu_dai_name = "msm-dai-q6-dev.16386",
6821 .platform_name = "msm-pcm-routing",
6822 .codec_name = "tavil_codec",
6823 .codec_dai_name = "tavil_rx1",
6824 .no_pcm = 1,
6825 .dpcm_playback = 1,
6826 .id = MSM_BACKEND_DAI_SLIMBUS_1_RX,
6827 .be_hw_params_fixup = msm_be_hw_params_fixup,
6828 .ops = &msm_be_ops,
6829 /* dai link has playback support */
6830 .ignore_pmdown_time = 1,
6831 .ignore_suspend = 1,
6832 },
6833 {
6834 .name = LPASS_BE_SLIMBUS_1_TX,
6835 .stream_name = "Slimbus1 Capture",
6836 .cpu_dai_name = "msm-dai-q6-dev.16387",
6837 .platform_name = "msm-pcm-routing",
6838 .codec_name = "tavil_codec",
6839 .codec_dai_name = "tavil_tx3",
6840 .no_pcm = 1,
6841 .dpcm_capture = 1,
6842 .id = MSM_BACKEND_DAI_SLIMBUS_1_TX,
6843 .be_hw_params_fixup = msm_be_hw_params_fixup,
6844 .ops = &msm_be_ops,
6845 .ignore_suspend = 1,
6846 },
6847 {
6848 .name = LPASS_BE_SLIMBUS_2_RX,
6849 .stream_name = "Slimbus2 Playback",
6850 .cpu_dai_name = "msm-dai-q6-dev.16388",
6851 .platform_name = "msm-pcm-routing",
6852 .codec_name = "tavil_codec",
6853 .codec_dai_name = "tavil_rx2",
6854 .no_pcm = 1,
6855 .dpcm_playback = 1,
6856 .id = MSM_BACKEND_DAI_SLIMBUS_2_RX,
6857 .be_hw_params_fixup = msm_be_hw_params_fixup,
6858 .ops = &msm_be_ops,
6859 .ignore_pmdown_time = 1,
6860 .ignore_suspend = 1,
6861 },
6862 {
6863 .name = LPASS_BE_SLIMBUS_3_RX,
6864 .stream_name = "Slimbus3 Playback",
6865 .cpu_dai_name = "msm-dai-q6-dev.16390",
6866 .platform_name = "msm-pcm-routing",
6867 .codec_name = "tavil_codec",
6868 .codec_dai_name = "tavil_rx1",
6869 .no_pcm = 1,
6870 .dpcm_playback = 1,
6871 .id = MSM_BACKEND_DAI_SLIMBUS_3_RX,
6872 .be_hw_params_fixup = msm_be_hw_params_fixup,
6873 .ops = &msm_be_ops,
6874 /* dai link has playback support */
6875 .ignore_pmdown_time = 1,
6876 .ignore_suspend = 1,
6877 },
6878 {
6879 .name = LPASS_BE_SLIMBUS_3_TX,
6880 .stream_name = "Slimbus3 Capture",
6881 .cpu_dai_name = "msm-dai-q6-dev.16391",
6882 .platform_name = "msm-pcm-routing",
6883 .codec_name = "tavil_codec",
6884 .codec_dai_name = "tavil_tx1",
6885 .no_pcm = 1,
6886 .dpcm_capture = 1,
6887 .id = MSM_BACKEND_DAI_SLIMBUS_3_TX,
6888 .be_hw_params_fixup = msm_be_hw_params_fixup,
6889 .ops = &msm_be_ops,
6890 .ignore_suspend = 1,
6891 },
6892 {
6893 .name = LPASS_BE_SLIMBUS_4_RX,
6894 .stream_name = "Slimbus4 Playback",
6895 .cpu_dai_name = "msm-dai-q6-dev.16392",
6896 .platform_name = "msm-pcm-routing",
6897 .codec_name = "tavil_codec",
6898 .codec_dai_name = "tavil_rx1",
6899 .no_pcm = 1,
6900 .dpcm_playback = 1,
6901 .id = MSM_BACKEND_DAI_SLIMBUS_4_RX,
6902 .be_hw_params_fixup = msm_be_hw_params_fixup,
6903 .ops = &msm_be_ops,
6904 /* dai link has playback support */
6905 .ignore_pmdown_time = 1,
6906 .ignore_suspend = 1,
6907 },
6908 {
6909 .name = LPASS_BE_SLIMBUS_5_RX,
6910 .stream_name = "Slimbus5 Playback",
6911 .cpu_dai_name = "msm-dai-q6-dev.16394",
6912 .platform_name = "msm-pcm-routing",
6913 .codec_name = "tavil_codec",
6914 .codec_dai_name = "tavil_rx3",
6915 .no_pcm = 1,
6916 .dpcm_playback = 1,
6917 .id = MSM_BACKEND_DAI_SLIMBUS_5_RX,
6918 .be_hw_params_fixup = msm_be_hw_params_fixup,
6919 .ops = &msm_be_ops,
6920 /* dai link has playback support */
6921 .ignore_pmdown_time = 1,
6922 .ignore_suspend = 1,
6923 },
6924 /* MAD BE */
6925 {
6926 .name = LPASS_BE_SLIMBUS_5_TX,
6927 .stream_name = "Slimbus5 Capture",
6928 .cpu_dai_name = "msm-dai-q6-dev.16395",
6929 .platform_name = "msm-pcm-routing",
6930 .codec_name = "tavil_codec",
6931 .codec_dai_name = "tavil_mad1",
6932 .no_pcm = 1,
6933 .dpcm_capture = 1,
6934 .id = MSM_BACKEND_DAI_SLIMBUS_5_TX,
6935 .be_hw_params_fixup = msm_be_hw_params_fixup,
6936 .ops = &msm_be_ops,
6937 .ignore_suspend = 1,
6938 },
6939 {
6940 .name = LPASS_BE_SLIMBUS_6_RX,
6941 .stream_name = "Slimbus6 Playback",
6942 .cpu_dai_name = "msm-dai-q6-dev.16396",
6943 .platform_name = "msm-pcm-routing",
6944 .codec_name = "tavil_codec",
6945 .codec_dai_name = "tavil_rx4",
6946 .no_pcm = 1,
6947 .dpcm_playback = 1,
6948 .id = MSM_BACKEND_DAI_SLIMBUS_6_RX,
6949 .be_hw_params_fixup = msm_be_hw_params_fixup,
6950 .ops = &msm_be_ops,
6951 /* dai link has playback support */
6952 .ignore_pmdown_time = 1,
6953 .ignore_suspend = 1,
6954 },
6955 /* Slimbus VI Recording */
6956 {
6957 .name = LPASS_BE_SLIMBUS_TX_VI,
6958 .stream_name = "Slimbus4 Capture",
6959 .cpu_dai_name = "msm-dai-q6-dev.16393",
6960 .platform_name = "msm-pcm-routing",
6961 .codec_name = "tavil_codec",
6962 .codec_dai_name = "tavil_vifeedback",
6963 .id = MSM_BACKEND_DAI_SLIMBUS_4_TX,
6964 .be_hw_params_fixup = msm_be_hw_params_fixup,
6965 .ops = &msm_be_ops,
6966 .ignore_suspend = 1,
6967 .no_pcm = 1,
6968 .dpcm_capture = 1,
6969 },
6970};
6971
6972static struct snd_soc_dai_link msm_wcn_be_dai_links[] = {
6973 {
6974 .name = LPASS_BE_SLIMBUS_7_RX,
6975 .stream_name = "Slimbus7 Playback",
6976 .cpu_dai_name = "msm-dai-q6-dev.16398",
6977 .platform_name = "msm-pcm-routing",
6978 .codec_name = "btfmslim_slave",
6979 /* BT codec driver determines capabilities based on
6980 * dai name, bt codecdai name should always contains
6981 * supported usecase information
6982 */
6983 .codec_dai_name = "btfm_bt_sco_a2dp_slim_rx",
6984 .no_pcm = 1,
6985 .dpcm_playback = 1,
6986 .id = MSM_BACKEND_DAI_SLIMBUS_7_RX,
6987 .be_hw_params_fixup = msm_be_hw_params_fixup,
6988 .ops = &msm_wcn_ops,
6989 /* dai link has playback support */
6990 .ignore_pmdown_time = 1,
6991 .ignore_suspend = 1,
6992 },
6993 {
6994 .name = LPASS_BE_SLIMBUS_7_TX,
6995 .stream_name = "Slimbus7 Capture",
6996 .cpu_dai_name = "msm-dai-q6-dev.16399",
6997 .platform_name = "msm-pcm-routing",
6998 .codec_name = "btfmslim_slave",
6999 .codec_dai_name = "btfm_bt_sco_slim_tx",
7000 .no_pcm = 1,
7001 .dpcm_capture = 1,
7002 .id = MSM_BACKEND_DAI_SLIMBUS_7_TX,
7003 .be_hw_params_fixup = msm_be_hw_params_fixup,
7004 .ops = &msm_wcn_ops,
7005 .ignore_suspend = 1,
7006 },
7007 {
7008 .name = LPASS_BE_SLIMBUS_8_TX,
7009 .stream_name = "Slimbus8 Capture",
7010 .cpu_dai_name = "msm-dai-q6-dev.16401",
7011 .platform_name = "msm-pcm-routing",
7012 .codec_name = "btfmslim_slave",
7013 .codec_dai_name = "btfm_fm_slim_tx",
7014 .no_pcm = 1,
7015 .dpcm_capture = 1,
7016 .id = MSM_BACKEND_DAI_SLIMBUS_8_TX,
7017 .be_hw_params_fixup = msm_be_hw_params_fixup,
7018 .init = &msm_wcn_init,
7019 .ops = &msm_wcn_ops,
7020 .ignore_suspend = 1,
7021 },
7022};
7023
7024static struct snd_soc_dai_link ext_disp_be_dai_link[] = {
7025 /* DISP PORT BACK END DAI Link */
7026 {
7027 .name = LPASS_BE_DISPLAY_PORT,
7028 .stream_name = "Display Port Playback",
7029 .cpu_dai_name = "msm-dai-q6-dp.24608",
7030 .platform_name = "msm-pcm-routing",
7031 .codec_name = "msm-ext-disp-audio-codec-rx",
7032 .codec_dai_name = "msm_dp_audio_codec_rx_dai",
7033 .no_pcm = 1,
7034 .dpcm_playback = 1,
7035 .id = MSM_BACKEND_DAI_DISPLAY_PORT_RX,
7036 .be_hw_params_fixup = msm_be_hw_params_fixup,
7037 .ignore_pmdown_time = 1,
7038 .ignore_suspend = 1,
7039 },
7040};
7041
7042static struct snd_soc_dai_link msm_mi2s_be_dai_links[] = {
7043 {
7044 .name = LPASS_BE_PRI_MI2S_RX,
7045 .stream_name = "Primary MI2S Playback",
7046 .cpu_dai_name = "msm-dai-q6-mi2s.0",
7047 .platform_name = "msm-pcm-routing",
7048 .codec_name = "msm-stub-codec.1",
7049 .codec_dai_name = "msm-stub-rx",
7050 .no_pcm = 1,
7051 .dpcm_playback = 1,
7052 .id = MSM_BACKEND_DAI_PRI_MI2S_RX,
7053 .be_hw_params_fixup = msm_be_hw_params_fixup,
7054 .ops = &msm_mi2s_be_ops,
7055 .ignore_suspend = 1,
7056 .ignore_pmdown_time = 1,
7057 },
7058 {
7059 .name = LPASS_BE_PRI_MI2S_TX,
7060 .stream_name = "Primary MI2S Capture",
7061 .cpu_dai_name = "msm-dai-q6-mi2s.0",
7062 .platform_name = "msm-pcm-routing",
7063 .codec_name = "msm-stub-codec.1",
7064 .codec_dai_name = "msm-stub-tx",
7065 .no_pcm = 1,
7066 .dpcm_capture = 1,
7067 .id = MSM_BACKEND_DAI_PRI_MI2S_TX,
7068 .be_hw_params_fixup = msm_be_hw_params_fixup,
7069 .ops = &msm_mi2s_be_ops,
7070 .ignore_suspend = 1,
7071 },
7072 {
7073 .name = LPASS_BE_SEC_MI2S_RX,
7074 .stream_name = "Secondary MI2S Playback",
7075 .cpu_dai_name = "msm-dai-q6-mi2s.1",
7076 .platform_name = "msm-pcm-routing",
7077 .codec_name = "msm-stub-codec.1",
7078 .codec_dai_name = "msm-stub-rx",
7079 .no_pcm = 1,
7080 .dpcm_playback = 1,
7081 .id = MSM_BACKEND_DAI_SECONDARY_MI2S_RX,
7082 .be_hw_params_fixup = msm_be_hw_params_fixup,
7083 .ops = &msm_mi2s_be_ops,
7084 .ignore_suspend = 1,
7085 .ignore_pmdown_time = 1,
7086 },
7087 {
7088 .name = LPASS_BE_SEC_MI2S_TX,
7089 .stream_name = "Secondary MI2S Capture",
7090 .cpu_dai_name = "msm-dai-q6-mi2s.1",
7091 .platform_name = "msm-pcm-routing",
7092 .codec_name = "msm-stub-codec.1",
7093 .codec_dai_name = "msm-stub-tx",
7094 .no_pcm = 1,
7095 .dpcm_capture = 1,
7096 .id = MSM_BACKEND_DAI_SECONDARY_MI2S_TX,
7097 .be_hw_params_fixup = msm_be_hw_params_fixup,
7098 .ops = &msm_mi2s_be_ops,
7099 .ignore_suspend = 1,
7100 },
7101 {
7102 .name = LPASS_BE_TERT_MI2S_RX,
7103 .stream_name = "Tertiary MI2S Playback",
7104 .cpu_dai_name = "msm-dai-q6-mi2s.2",
7105 .platform_name = "msm-pcm-routing",
7106 .codec_name = "msm-stub-codec.1",
7107 .codec_dai_name = "msm-stub-rx",
7108 .no_pcm = 1,
7109 .dpcm_playback = 1,
7110 .id = MSM_BACKEND_DAI_TERTIARY_MI2S_RX,
7111 .be_hw_params_fixup = msm_be_hw_params_fixup,
7112 .ops = &msm_mi2s_be_ops,
7113 .ignore_suspend = 1,
7114 .ignore_pmdown_time = 1,
7115 },
7116 {
7117 .name = LPASS_BE_TERT_MI2S_TX,
7118 .stream_name = "Tertiary MI2S Capture",
7119 .cpu_dai_name = "msm-dai-q6-mi2s.2",
7120 .platform_name = "msm-pcm-routing",
7121 .codec_name = "msm-stub-codec.1",
7122 .codec_dai_name = "msm-stub-tx",
7123 .no_pcm = 1,
7124 .dpcm_capture = 1,
7125 .id = MSM_BACKEND_DAI_TERTIARY_MI2S_TX,
7126 .be_hw_params_fixup = msm_be_hw_params_fixup,
7127 .ops = &msm_mi2s_be_ops,
7128 .ignore_suspend = 1,
7129 },
7130 {
7131 .name = LPASS_BE_QUAT_MI2S_RX,
7132 .stream_name = "Quaternary MI2S Playback",
7133 .cpu_dai_name = "msm-dai-q6-mi2s.3",
7134 .platform_name = "msm-pcm-routing",
7135 .codec_name = "msm-stub-codec.1",
7136 .codec_dai_name = "msm-stub-rx",
7137 .no_pcm = 1,
7138 .dpcm_playback = 1,
7139 .id = MSM_BACKEND_DAI_QUATERNARY_MI2S_RX,
7140 .be_hw_params_fixup = msm_be_hw_params_fixup,
7141 .ops = &msm_mi2s_be_ops,
7142 .ignore_suspend = 1,
7143 .ignore_pmdown_time = 1,
7144 },
7145 {
7146 .name = LPASS_BE_QUAT_MI2S_TX,
7147 .stream_name = "Quaternary MI2S Capture",
7148 .cpu_dai_name = "msm-dai-q6-mi2s.3",
7149 .platform_name = "msm-pcm-routing",
7150 .codec_name = "msm-stub-codec.1",
7151 .codec_dai_name = "msm-stub-tx",
7152 .no_pcm = 1,
7153 .dpcm_capture = 1,
7154 .id = MSM_BACKEND_DAI_QUATERNARY_MI2S_TX,
7155 .be_hw_params_fixup = msm_be_hw_params_fixup,
7156 .ops = &msm_mi2s_be_ops,
7157 .ignore_suspend = 1,
7158 },
7159 {
7160 .name = LPASS_BE_QUIN_MI2S_RX,
7161 .stream_name = "Quinary MI2S Playback",
7162 .cpu_dai_name = "msm-dai-q6-mi2s.4",
7163 .platform_name = "msm-pcm-routing",
7164 .codec_name = "msm-stub-codec.1",
7165 .codec_dai_name = "msm-stub-rx",
7166 .no_pcm = 1,
7167 .dpcm_playback = 1,
7168 .id = MSM_BACKEND_DAI_QUINARY_MI2S_RX,
7169 .be_hw_params_fixup = msm_be_hw_params_fixup,
7170 .ops = &msm_mi2s_be_ops,
7171 .ignore_suspend = 1,
7172 .ignore_pmdown_time = 1,
7173 },
7174 {
7175 .name = LPASS_BE_QUIN_MI2S_TX,
7176 .stream_name = "Quinary MI2S Capture",
7177 .cpu_dai_name = "msm-dai-q6-mi2s.4",
7178 .platform_name = "msm-pcm-routing",
7179 .codec_name = "msm-stub-codec.1",
7180 .codec_dai_name = "msm-stub-tx",
7181 .no_pcm = 1,
7182 .dpcm_capture = 1,
7183 .id = MSM_BACKEND_DAI_QUINARY_MI2S_TX,
7184 .be_hw_params_fixup = msm_be_hw_params_fixup,
7185 .ops = &msm_mi2s_be_ops,
7186 .ignore_suspend = 1,
7187 },
7188
7189};
7190
7191static struct snd_soc_dai_link msm_auxpcm_be_dai_links[] = {
7192 /* Primary AUX PCM Backend DAI Links */
7193 {
7194 .name = LPASS_BE_AUXPCM_RX,
7195 .stream_name = "AUX PCM Playback",
7196 .cpu_dai_name = "msm-dai-q6-auxpcm.1",
7197 .platform_name = "msm-pcm-routing",
7198 .codec_name = "msm-stub-codec.1",
7199 .codec_dai_name = "msm-stub-rx",
7200 .no_pcm = 1,
7201 .dpcm_playback = 1,
7202 .id = MSM_BACKEND_DAI_AUXPCM_RX,
7203 .be_hw_params_fixup = msm_be_hw_params_fixup,
7204 .ignore_pmdown_time = 1,
7205 .ignore_suspend = 1,
7206 },
7207 {
7208 .name = LPASS_BE_AUXPCM_TX,
7209 .stream_name = "AUX PCM Capture",
7210 .cpu_dai_name = "msm-dai-q6-auxpcm.1",
7211 .platform_name = "msm-pcm-routing",
7212 .codec_name = "msm-stub-codec.1",
7213 .codec_dai_name = "msm-stub-tx",
7214 .no_pcm = 1,
7215 .dpcm_capture = 1,
7216 .id = MSM_BACKEND_DAI_AUXPCM_TX,
7217 .be_hw_params_fixup = msm_be_hw_params_fixup,
7218 .ignore_suspend = 1,
7219 },
7220 /* Secondary AUX PCM Backend DAI Links */
7221 {
7222 .name = LPASS_BE_SEC_AUXPCM_RX,
7223 .stream_name = "Sec AUX PCM Playback",
7224 .cpu_dai_name = "msm-dai-q6-auxpcm.2",
7225 .platform_name = "msm-pcm-routing",
7226 .codec_name = "msm-stub-codec.1",
7227 .codec_dai_name = "msm-stub-rx",
7228 .no_pcm = 1,
7229 .dpcm_playback = 1,
7230 .id = MSM_BACKEND_DAI_SEC_AUXPCM_RX,
7231 .be_hw_params_fixup = msm_be_hw_params_fixup,
7232 .ignore_pmdown_time = 1,
7233 .ignore_suspend = 1,
7234 },
7235 {
7236 .name = LPASS_BE_SEC_AUXPCM_TX,
7237 .stream_name = "Sec AUX PCM Capture",
7238 .cpu_dai_name = "msm-dai-q6-auxpcm.2",
7239 .platform_name = "msm-pcm-routing",
7240 .codec_name = "msm-stub-codec.1",
7241 .codec_dai_name = "msm-stub-tx",
7242 .no_pcm = 1,
7243 .dpcm_capture = 1,
7244 .id = MSM_BACKEND_DAI_SEC_AUXPCM_TX,
7245 .be_hw_params_fixup = msm_be_hw_params_fixup,
7246 .ignore_suspend = 1,
7247 },
7248 /* Tertiary AUX PCM Backend DAI Links */
7249 {
7250 .name = LPASS_BE_TERT_AUXPCM_RX,
7251 .stream_name = "Tert AUX PCM Playback",
7252 .cpu_dai_name = "msm-dai-q6-auxpcm.3",
7253 .platform_name = "msm-pcm-routing",
7254 .codec_name = "msm-stub-codec.1",
7255 .codec_dai_name = "msm-stub-rx",
7256 .no_pcm = 1,
7257 .dpcm_playback = 1,
7258 .id = MSM_BACKEND_DAI_TERT_AUXPCM_RX,
7259 .be_hw_params_fixup = msm_be_hw_params_fixup,
7260 .ignore_suspend = 1,
7261 },
7262 {
7263 .name = LPASS_BE_TERT_AUXPCM_TX,
7264 .stream_name = "Tert AUX PCM Capture",
7265 .cpu_dai_name = "msm-dai-q6-auxpcm.3",
7266 .platform_name = "msm-pcm-routing",
7267 .codec_name = "msm-stub-codec.1",
7268 .codec_dai_name = "msm-stub-tx",
7269 .no_pcm = 1,
7270 .dpcm_capture = 1,
7271 .id = MSM_BACKEND_DAI_TERT_AUXPCM_TX,
7272 .be_hw_params_fixup = msm_be_hw_params_fixup,
7273 .ignore_suspend = 1,
7274 },
7275 /* Quaternary AUX PCM Backend DAI Links */
7276 {
7277 .name = LPASS_BE_QUAT_AUXPCM_RX,
7278 .stream_name = "Quat AUX PCM Playback",
7279 .cpu_dai_name = "msm-dai-q6-auxpcm.4",
7280 .platform_name = "msm-pcm-routing",
7281 .codec_name = "msm-stub-codec.1",
7282 .codec_dai_name = "msm-stub-rx",
7283 .no_pcm = 1,
7284 .dpcm_playback = 1,
7285 .id = MSM_BACKEND_DAI_QUAT_AUXPCM_RX,
7286 .be_hw_params_fixup = msm_be_hw_params_fixup,
7287 .ignore_pmdown_time = 1,
7288 .ignore_suspend = 1,
7289 },
7290 {
7291 .name = LPASS_BE_QUAT_AUXPCM_TX,
7292 .stream_name = "Quat AUX PCM Capture",
7293 .cpu_dai_name = "msm-dai-q6-auxpcm.4",
7294 .platform_name = "msm-pcm-routing",
7295 .codec_name = "msm-stub-codec.1",
7296 .codec_dai_name = "msm-stub-tx",
7297 .no_pcm = 1,
7298 .dpcm_capture = 1,
7299 .id = MSM_BACKEND_DAI_QUAT_AUXPCM_TX,
7300 .be_hw_params_fixup = msm_be_hw_params_fixup,
7301 .ignore_suspend = 1,
7302 },
7303 /* Quinary AUX PCM Backend DAI Links */
7304 {
7305 .name = LPASS_BE_QUIN_AUXPCM_RX,
7306 .stream_name = "Quin AUX PCM Playback",
7307 .cpu_dai_name = "msm-dai-q6-auxpcm.5",
7308 .platform_name = "msm-pcm-routing",
7309 .codec_name = "msm-stub-codec.1",
7310 .codec_dai_name = "msm-stub-rx",
7311 .no_pcm = 1,
7312 .dpcm_playback = 1,
7313 .id = MSM_BACKEND_DAI_QUIN_AUXPCM_RX,
7314 .be_hw_params_fixup = msm_be_hw_params_fixup,
7315 .ignore_pmdown_time = 1,
7316 .ignore_suspend = 1,
7317 },
7318 {
7319 .name = LPASS_BE_QUIN_AUXPCM_TX,
7320 .stream_name = "Quin AUX PCM Capture",
7321 .cpu_dai_name = "msm-dai-q6-auxpcm.5",
7322 .platform_name = "msm-pcm-routing",
7323 .codec_name = "msm-stub-codec.1",
7324 .codec_dai_name = "msm-stub-tx",
7325 .no_pcm = 1,
7326 .dpcm_capture = 1,
7327 .id = MSM_BACKEND_DAI_QUIN_AUXPCM_TX,
7328 .be_hw_params_fixup = msm_be_hw_params_fixup,
7329 .ignore_suspend = 1,
7330 },
7331};
7332
7333static struct snd_soc_dai_link msm_wsa_cdc_dma_be_dai_links[] = {
7334 /* WSA CDC DMA Backend DAI Links */
7335 {
7336 .name = LPASS_BE_WSA_CDC_DMA_RX_0,
7337 .stream_name = "WSA CDC DMA0 Playback",
7338 .cpu_dai_name = "msm-dai-cdc-dma-dev.45056",
7339 .platform_name = "msm-pcm-routing",
7340 .codec_name = "bolero_codec",
7341 .codec_dai_name = "wsa_macro_rx1",
7342 .no_pcm = 1,
7343 .dpcm_playback = 1,
7344 .init = &msm_int_audrx_init,
7345 .id = MSM_BACKEND_DAI_WSA_CDC_DMA_RX_0,
7346 .be_hw_params_fixup = msm_be_hw_params_fixup,
7347 .ignore_pmdown_time = 1,
7348 .ignore_suspend = 1,
7349 .ops = &msm_cdc_dma_be_ops,
7350 },
7351 {
7352 .name = LPASS_BE_WSA_CDC_DMA_RX_1,
7353 .stream_name = "WSA CDC DMA1 Playback",
7354 .cpu_dai_name = "msm-dai-cdc-dma-dev.45058",
7355 .platform_name = "msm-pcm-routing",
7356 .codec_name = "bolero_codec",
7357 .codec_dai_name = "wsa_macro_rx_mix",
7358 .no_pcm = 1,
7359 .dpcm_playback = 1,
7360 .id = MSM_BACKEND_DAI_WSA_CDC_DMA_RX_1,
7361 .be_hw_params_fixup = msm_be_hw_params_fixup,
7362 .ignore_pmdown_time = 1,
7363 .ignore_suspend = 1,
7364 .ops = &msm_cdc_dma_be_ops,
7365 },
7366 {
7367 .name = LPASS_BE_WSA_CDC_DMA_TX_1,
7368 .stream_name = "WSA CDC DMA1 Capture",
7369 .cpu_dai_name = "msm-dai-cdc-dma-dev.45059",
7370 .platform_name = "msm-pcm-routing",
7371 .codec_name = "bolero_codec",
7372 .codec_dai_name = "wsa_macro_echo",
7373 .no_pcm = 1,
7374 .dpcm_capture = 1,
7375 .id = MSM_BACKEND_DAI_WSA_CDC_DMA_TX_1,
7376 .be_hw_params_fixup = msm_be_hw_params_fixup,
7377 .ignore_suspend = 1,
7378 .ops = &msm_cdc_dma_be_ops,
7379 },
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]7380};
7381
7382static struct snd_soc_dai_link msm_rx_tx_cdc_dma_be_dai_links[] = {
7383 /* RX CDC DMA Backend DAI Links */
7384 {
7385 .name = LPASS_BE_RX_CDC_DMA_RX_0,
7386 .stream_name = "RX CDC DMA0 Playback",
Ramprasad Katkamf83acfb2018-08-11 23:28:57 +0530[diff] [blame]7387 .cpu_dai_name = "msm-dai-cdc-dma-dev.45104",
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]7388 .platform_name = "msm-pcm-routing",
7389 .codec_name = "bolero_codec",
7390 .codec_dai_name = "rx_macro_rx1",
7391 .no_pcm = 1,
7392 .dpcm_playback = 1,
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]7393 .id = MSM_BACKEND_DAI_RX_CDC_DMA_RX_0,
7394 .be_hw_params_fixup = msm_be_hw_params_fixup,
7395 .ignore_pmdown_time = 1,
7396 .ignore_suspend = 1,
7397 .ops = &msm_cdc_dma_be_ops,
7398 },
7399 {
7400 .name = LPASS_BE_RX_CDC_DMA_RX_1,
7401 .stream_name = "RX CDC DMA1 Playback",
Ramprasad Katkamf83acfb2018-08-11 23:28:57 +0530[diff] [blame]7402 .cpu_dai_name = "msm-dai-cdc-dma-dev.45106",
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]7403 .platform_name = "msm-pcm-routing",
7404 .codec_name = "bolero_codec",
7405 .codec_dai_name = "rx_macro_rx2",
7406 .no_pcm = 1,
7407 .dpcm_playback = 1,
7408 .id = MSM_BACKEND_DAI_RX_CDC_DMA_RX_1,
7409 .be_hw_params_fixup = msm_be_hw_params_fixup,
7410 .ignore_pmdown_time = 1,
7411 .ignore_suspend = 1,
7412 .ops = &msm_cdc_dma_be_ops,
7413 },
7414 {
7415 .name = LPASS_BE_RX_CDC_DMA_RX_2,
7416 .stream_name = "RX CDC DMA2 Playback",
Ramprasad Katkamf83acfb2018-08-11 23:28:57 +0530[diff] [blame]7417 .cpu_dai_name = "msm-dai-cdc-dma-dev.45108",
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]7418 .platform_name = "msm-pcm-routing",
7419 .codec_name = "bolero_codec",
7420 .codec_dai_name = "rx_macro_rx3",
7421 .no_pcm = 1,
7422 .dpcm_playback = 1,
7423 .id = MSM_BACKEND_DAI_RX_CDC_DMA_RX_2,
7424 .be_hw_params_fixup = msm_be_hw_params_fixup,
7425 .ignore_pmdown_time = 1,
7426 .ignore_suspend = 1,
7427 .ops = &msm_cdc_dma_be_ops,
7428 },
7429 {
7430 .name = LPASS_BE_RX_CDC_DMA_RX_3,
7431 .stream_name = "RX CDC DMA3 Playback",
Ramprasad Katkamf83acfb2018-08-11 23:28:57 +0530[diff] [blame]7432 .cpu_dai_name = "msm-dai-cdc-dma-dev.45110",
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]7433 .platform_name = "msm-pcm-routing",
7434 .codec_name = "bolero_codec",
7435 .codec_dai_name = "rx_macro_rx4",
7436 .no_pcm = 1,
7437 .dpcm_playback = 1,
7438 .id = MSM_BACKEND_DAI_RX_CDC_DMA_RX_3,
7439 .be_hw_params_fixup = msm_be_hw_params_fixup,
7440 .ignore_pmdown_time = 1,
7441 .ignore_suspend = 1,
7442 .ops = &msm_cdc_dma_be_ops,
7443 },
7444 /* TX CDC DMA Backend DAI Links */
7445 {
7446 .name = LPASS_BE_TX_CDC_DMA_TX_3,
7447 .stream_name = "TX CDC DMA3 Capture",
Ramprasad Katkamf83acfb2018-08-11 23:28:57 +0530[diff] [blame]7448 .cpu_dai_name = "msm-dai-cdc-dma-dev.45111",
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]7449 .platform_name = "msm-pcm-routing",
7450 .codec_name = "bolero_codec",
7451 .codec_dai_name = "tx_macro_tx1",
7452 .no_pcm = 1,
7453 .dpcm_capture = 1,
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]7454 .id = MSM_BACKEND_DAI_TX_CDC_DMA_TX_3,
7455 .be_hw_params_fixup = msm_be_hw_params_fixup,
7456 .ignore_suspend = 1,
7457 .ops = &msm_cdc_dma_be_ops,
7458 },
7459 {
7460 .name = LPASS_BE_TX_CDC_DMA_TX_4,
7461 .stream_name = "TX CDC DMA4 Capture",
Ramprasad Katkamf83acfb2018-08-11 23:28:57 +0530[diff] [blame]7462 .cpu_dai_name = "msm-dai-cdc-dma-dev.45113",
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]7463 .platform_name = "msm-pcm-routing",
7464 .codec_name = "bolero_codec",
7465 .codec_dai_name = "tx_macro_tx2",
7466 .no_pcm = 1,
7467 .dpcm_capture = 1,
7468 .id = MSM_BACKEND_DAI_TX_CDC_DMA_TX_4,
7469 .be_hw_params_fixup = msm_be_hw_params_fixup,
7470 .ignore_suspend = 1,
7471 .ops = &msm_cdc_dma_be_ops,
7472 },
7473};
7474
7475static struct snd_soc_dai_link msm_sm6150_dai_links[
7476 ARRAY_SIZE(msm_common_dai_links) +
7477 ARRAY_SIZE(msm_tavil_fe_dai_links) +
7478 ARRAY_SIZE(msm_bolero_fe_dai_links) +
7479 ARRAY_SIZE(msm_common_misc_fe_dai_links) +
7480 ARRAY_SIZE(msm_common_be_dai_links) +
7481 ARRAY_SIZE(msm_tavil_be_dai_links) +
7482 ARRAY_SIZE(msm_wcn_be_dai_links) +
7483 ARRAY_SIZE(ext_disp_be_dai_link) +
7484 ARRAY_SIZE(msm_mi2s_be_dai_links) +
7485 ARRAY_SIZE(msm_auxpcm_be_dai_links) +
7486 ARRAY_SIZE(msm_wsa_cdc_dma_be_dai_links) +
7487 ARRAY_SIZE(msm_rx_tx_cdc_dma_be_dai_links)];
7488
7489static int msm_snd_card_tavil_late_probe(struct snd_soc_card *card)
7490{
7491 const char *be_dl_name = LPASS_BE_SLIMBUS_0_RX;
7492 struct snd_soc_pcm_runtime *rtd;
7493 int ret = 0;
7494 void *mbhc_calibration;
7495
7496 rtd = snd_soc_get_pcm_runtime(card, be_dl_name);
7497 if (!rtd) {
7498 dev_err(card->dev,
7499 "%s: snd_soc_get_pcm_runtime for %s failed!\n",
7500 __func__, be_dl_name);
7501 ret = -EINVAL;
7502 goto err_pcm_runtime;
7503 }
7504
7505 mbhc_calibration = def_wcd_mbhc_cal();
7506 if (!mbhc_calibration) {
7507 ret = -ENOMEM;
7508 goto err_mbhc_cal;
7509 }
7510 wcd_mbhc_cfg.calibration = mbhc_calibration;
7511 ret = tavil_mbhc_hs_detect(rtd->codec, &wcd_mbhc_cfg);
7512 if (ret) {
7513 dev_err(card->dev, "%s: mbhc hs detect failed, err:%d\n",
7514 __func__, ret);
7515 goto err_hs_detect;
7516 }
7517 return 0;
7518
7519err_hs_detect:
7520 kfree(mbhc_calibration);
7521err_mbhc_cal:
7522err_pcm_runtime:
7523 return ret;
7524}
7525
7526
7527static int msm_populate_dai_link_component_of_node(
7528 struct snd_soc_card *card)
7529{
7530 int i, index, ret = 0;
7531 struct device *cdev = card->dev;
7532 struct snd_soc_dai_link *dai_link = card->dai_link;
7533 struct device_node *np;
7534
7535 if (!cdev) {
7536 pr_err("%s: Sound card device memory NULL\n", __func__);
7537 return -ENODEV;
7538 }
7539
7540 for (i = 0; i < card->num_links; i++) {
7541 if (dai_link[i].platform_of_node && dai_link[i].cpu_of_node)
7542 continue;
7543
7544 /* populate platform_of_node for snd card dai links */
7545 if (dai_link[i].platform_name &&
7546 !dai_link[i].platform_of_node) {
7547 index = of_property_match_string(cdev->of_node,
7548 "asoc-platform-names",
7549 dai_link[i].platform_name);
7550 if (index < 0) {
7551 pr_err("%s: No match found for platform name: %s\n",
7552 __func__, dai_link[i].platform_name);
7553 ret = index;
7554 goto err;
7555 }
7556 np = of_parse_phandle(cdev->of_node, "asoc-platform",
7557 index);
7558 if (!np) {
7559 pr_err("%s: retrieving phandle for platform %s, index %d failed\n",
7560 __func__, dai_link[i].platform_name,
7561 index);
7562 ret = -ENODEV;
7563 goto err;
7564 }
7565 dai_link[i].platform_of_node = np;
7566 dai_link[i].platform_name = NULL;
7567 }
7568
7569 /* populate cpu_of_node for snd card dai links */
7570 if (dai_link[i].cpu_dai_name && !dai_link[i].cpu_of_node) {
7571 index = of_property_match_string(cdev->of_node,
7572 "asoc-cpu-names",
7573 dai_link[i].cpu_dai_name);
7574 if (index >= 0) {
7575 np = of_parse_phandle(cdev->of_node, "asoc-cpu",
7576 index);
7577 if (!np) {
7578 pr_err("%s: retrieving phandle for cpu dai %s failed\n",
7579 __func__,
7580 dai_link[i].cpu_dai_name);
7581 ret = -ENODEV;
7582 goto err;
7583 }
7584 dai_link[i].cpu_of_node = np;
7585 dai_link[i].cpu_dai_name = NULL;
7586 }
7587 }
7588
7589 /* populate codec_of_node for snd card dai links */
7590 if (dai_link[i].codec_name && !dai_link[i].codec_of_node) {
7591 index = of_property_match_string(cdev->of_node,
7592 "asoc-codec-names",
7593 dai_link[i].codec_name);
7594 if (index < 0)
7595 continue;
7596 np = of_parse_phandle(cdev->of_node, "asoc-codec",
7597 index);
7598 if (!np) {
7599 pr_err("%s: retrieving phandle for codec %s failed\n",
7600 __func__, dai_link[i].codec_name);
7601 ret = -ENODEV;
7602 goto err;
7603 }
7604 dai_link[i].codec_of_node = np;
7605 dai_link[i].codec_name = NULL;
7606 }
7607 }
7608
7609err:
7610 return ret;
7611}
7612
7613static int msm_audrx_stub_init(struct snd_soc_pcm_runtime *rtd)
7614{
7615 int ret = 0;
7616 struct snd_soc_codec *codec = rtd->codec;
7617
7618 ret = snd_soc_add_codec_controls(codec, msm_tavil_snd_controls,
7619 ARRAY_SIZE(msm_tavil_snd_controls));
7620 if (ret < 0) {
7621 dev_err(codec->dev,
7622 "%s: add_codec_controls failed, err = %d\n",
7623 __func__, ret);
7624 return ret;
7625 }
7626
7627 return 0;
7628}
7629
7630static int msm_snd_stub_hw_params(struct snd_pcm_substream *substream,
7631 struct snd_pcm_hw_params *params)
7632{
7633 struct snd_soc_pcm_runtime *rtd = substream->private_data;
7634 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
7635
7636 int ret = 0;
7637 unsigned int rx_ch[] = {144, 145, 146, 147, 148, 149, 150,
7638 151};
7639 unsigned int tx_ch[] = {128, 129, 130, 131, 132, 133,
7640 134, 135, 136, 137, 138, 139,
7641 140, 141, 142, 143};
7642
7643 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
7644 ret = snd_soc_dai_set_channel_map(cpu_dai, 0, 0,
7645 slim_rx_cfg[SLIM_RX_0].channels,
7646 rx_ch);
7647 if (ret < 0)
7648 pr_err("%s: RX failed to set cpu chan map error %d\n",
7649 __func__, ret);
7650 } else {
7651 ret = snd_soc_dai_set_channel_map(cpu_dai,
7652 slim_tx_cfg[SLIM_TX_0].channels,
7653 tx_ch, 0, 0);
7654 if (ret < 0)
7655 pr_err("%s: TX failed to set cpu chan map error %d\n",
7656 __func__, ret);
7657 }
7658
7659 return ret;
7660}
7661
7662static struct snd_soc_ops msm_stub_be_ops = {
7663 .hw_params = msm_snd_stub_hw_params,
7664};
7665
7666static struct snd_soc_dai_link msm_stub_fe_dai_links[] = {
7667
7668 /* FrontEnd DAI Links */
7669 {
7670 .name = "MSMSTUB Media1",
7671 .stream_name = "MultiMedia1",
7672 .cpu_dai_name = "MultiMedia1",
7673 .platform_name = "msm-pcm-dsp.0",
7674 .dynamic = 1,
7675 .async_ops = ASYNC_DPCM_SND_SOC_PREPARE,
7676 .dpcm_playback = 1,
7677 .dpcm_capture = 1,
7678 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
7679 SND_SOC_DPCM_TRIGGER_POST},
7680 .codec_dai_name = "snd-soc-dummy-dai",
7681 .codec_name = "snd-soc-dummy",
7682 .ignore_suspend = 1,
7683 /* this dainlink has playback support */
7684 .ignore_pmdown_time = 1,
7685 .id = MSM_FRONTEND_DAI_MULTIMEDIA1
7686 },
7687};
7688
7689static struct snd_soc_dai_link msm_stub_be_dai_links[] = {
7690
7691 /* Backend DAI Links */
7692 {
7693 .name = LPASS_BE_SLIMBUS_0_RX,
7694 .stream_name = "Slimbus Playback",
7695 .cpu_dai_name = "msm-dai-q6-dev.16384",
7696 .platform_name = "msm-pcm-routing",
7697 .codec_name = "msm-stub-codec.1",
7698 .codec_dai_name = "msm-stub-rx",
7699 .no_pcm = 1,
7700 .dpcm_playback = 1,
7701 .id = MSM_BACKEND_DAI_SLIMBUS_0_RX,
7702 .init = &msm_audrx_stub_init,
7703 .be_hw_params_fixup = msm_be_hw_params_fixup,
7704 .ignore_pmdown_time = 1, /* dai link has playback support */
7705 .ignore_suspend = 1,
7706 .ops = &msm_stub_be_ops,
7707 },
7708 {
7709 .name = LPASS_BE_SLIMBUS_0_TX,
7710 .stream_name = "Slimbus Capture",
7711 .cpu_dai_name = "msm-dai-q6-dev.16385",
7712 .platform_name = "msm-pcm-routing",
7713 .codec_name = "msm-stub-codec.1",
7714 .codec_dai_name = "msm-stub-tx",
7715 .no_pcm = 1,
7716 .dpcm_capture = 1,
7717 .id = MSM_BACKEND_DAI_SLIMBUS_0_TX,
7718 .be_hw_params_fixup = msm_be_hw_params_fixup,
7719 .ignore_suspend = 1,
7720 .ops = &msm_stub_be_ops,
7721 },
7722};
7723
7724static struct snd_soc_dai_link msm_stub_dai_links[
7725 ARRAY_SIZE(msm_stub_fe_dai_links) +
7726 ARRAY_SIZE(msm_stub_be_dai_links)];
7727
7728struct snd_soc_card snd_soc_card_stub_msm = {
7729 .name = "sm6150-stub-snd-card",
7730};
7731
7732static const struct of_device_id sm6150_asoc_machine_of_match[] = {
7733 { .compatible = "qcom,sm6150-asoc-snd",
7734 .data = "codec"},
7735 { .compatible = "qcom,sm6150-asoc-snd-stub",
7736 .data = "stub_codec"},
7737 {},
7738};
7739
7740static struct snd_soc_card *populate_snd_card_dailinks(struct device *dev)
7741{
7742 struct snd_soc_card *card = NULL;
7743 struct snd_soc_dai_link *dailink;
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]7744 int total_links = 0, rc = 0;
7745 u32 tavil_codec = 0, auxpcm_audio_intf = 0;
7746 u32 mi2s_audio_intf = 0, ext_disp_audio_intf = 0;
7747 u32 wcn_btfm_intf = 0;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]7748 const struct of_device_id *match;
7749
7750 match = of_match_node(sm6150_asoc_machine_of_match, dev->of_node);
7751 if (!match) {
7752 dev_err(dev, "%s: No DT match found for sound card\n",
7753 __func__);
7754 return NULL;
7755 }
7756
7757 if (!strcmp(match->data, "codec")) {
7758 card = &snd_soc_card_sm6150_msm;
7759 memcpy(msm_sm6150_dai_links + total_links,
7760 msm_common_dai_links,
7761 sizeof(msm_common_dai_links));
7762
7763 total_links += ARRAY_SIZE(msm_common_dai_links);
7764
7765 memcpy(msm_sm6150_dai_links + total_links,
7766 msm_common_misc_fe_dai_links,
7767 sizeof(msm_common_misc_fe_dai_links));
7768
7769 total_links += ARRAY_SIZE(msm_common_misc_fe_dai_links);
7770
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]7771 rc = of_property_read_u32(dev->of_node, "qcom,tavil_codec",
7772 &tavil_codec);
7773 if (rc) {
7774 dev_dbg(dev, "%s: No DT match for tavil codec\n",
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]7775 __func__);
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]7776 } else {
7777 if (tavil_codec) {
7778 card->late_probe =
7779 msm_snd_card_tavil_late_probe;
7780 memcpy(msm_sm6150_dai_links + total_links,
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]7781 msm_tavil_fe_dai_links,
7782 sizeof(msm_tavil_fe_dai_links));
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]7783 total_links +=
7784 ARRAY_SIZE(msm_tavil_fe_dai_links);
7785 }
7786 }
7787
7788 if (!tavil_codec) {
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]7789 memcpy(msm_sm6150_dai_links + total_links,
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]7790 msm_bolero_fe_dai_links,
7791 sizeof(msm_bolero_fe_dai_links));
7792 total_links +=
7793 ARRAY_SIZE(msm_bolero_fe_dai_links);
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]7794 }
7795
7796 memcpy(msm_sm6150_dai_links + total_links,
7797 msm_common_be_dai_links,
7798 sizeof(msm_common_be_dai_links));
7799
7800 total_links += ARRAY_SIZE(msm_common_be_dai_links);
7801
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]7802 if (tavil_codec) {
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]7803 memcpy(msm_sm6150_dai_links + total_links,
7804 msm_tavil_be_dai_links,
7805 sizeof(msm_tavil_be_dai_links));
7806 total_links += ARRAY_SIZE(msm_tavil_be_dai_links);
7807 } else {
7808 memcpy(msm_sm6150_dai_links + total_links,
7809 msm_wsa_cdc_dma_be_dai_links,
7810 sizeof(msm_wsa_cdc_dma_be_dai_links));
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]7811 total_links +=
7812 ARRAY_SIZE(msm_wsa_cdc_dma_be_dai_links);
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]7813
7814 memcpy(msm_sm6150_dai_links + total_links,
7815 msm_rx_tx_cdc_dma_be_dai_links,
7816 sizeof(msm_rx_tx_cdc_dma_be_dai_links));
7817 total_links +=
7818 ARRAY_SIZE(msm_rx_tx_cdc_dma_be_dai_links);
7819 }
7820
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]7821 rc = of_property_read_u32(dev->of_node,
7822 "qcom,ext-disp-audio-rx",
7823 &ext_disp_audio_intf);
7824 if (rc) {
7825 dev_dbg(dev, "%s: No DT match Ext Disp interface\n",
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]7826 __func__);
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]7827 } else {
Rohit kumare5a1d4f2018-09-17 11:36:25 +0530[diff] [blame]7828 if (ext_disp_audio_intf) {
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]7829 memcpy(msm_sm6150_dai_links + total_links,
7830 ext_disp_be_dai_link,
7831 sizeof(ext_disp_be_dai_link));
7832 total_links +=
7833 ARRAY_SIZE(ext_disp_be_dai_link);
7834 }
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]7835 }
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]7836
7837 rc = of_property_read_u32(dev->of_node, "qcom,mi2s-audio-intf",
7838 &mi2s_audio_intf);
7839 if (rc) {
7840 dev_dbg(dev, "%s: No DT match MI2S audio interface\n",
7841 __func__);
7842 } else {
7843 if (mi2s_audio_intf) {
7844 memcpy(msm_sm6150_dai_links + total_links,
7845 msm_mi2s_be_dai_links,
7846 sizeof(msm_mi2s_be_dai_links));
7847 total_links +=
7848 ARRAY_SIZE(msm_mi2s_be_dai_links);
7849 }
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]7850 }
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]7851
7852
7853 rc = of_property_read_u32(dev->of_node, "qcom,wcn-btfm",
7854 &wcn_btfm_intf);
7855 if (rc) {
7856 dev_dbg(dev, "%s: No DT match wcn btfm interface\n",
7857 __func__);
7858 } else {
7859 if (wcn_btfm_intf) {
7860 memcpy(msm_sm6150_dai_links + total_links,
7861 msm_wcn_be_dai_links,
7862 sizeof(msm_wcn_be_dai_links));
7863 total_links +=
7864 ARRAY_SIZE(msm_wcn_be_dai_links);
7865 }
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]7866 }
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]7867
7868 rc = of_property_read_u32(dev->of_node,
7869 "qcom,auxpcm-audio-intf",
7870 &auxpcm_audio_intf);
7871 if (rc) {
7872 dev_dbg(dev, "%s: No DT match Aux PCM interface\n",
7873 __func__);
7874 } else {
7875 if (auxpcm_audio_intf) {
7876 memcpy(msm_sm6150_dai_links + total_links,
7877 msm_auxpcm_be_dai_links,
7878 sizeof(msm_auxpcm_be_dai_links));
7879 total_links +=
7880 ARRAY_SIZE(msm_auxpcm_be_dai_links);
7881 }
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]7882 }
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]7883
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]7884 dailink = msm_sm6150_dai_links;
7885 } else if (!strcmp(match->data, "stub_codec")) {
7886 card = &snd_soc_card_stub_msm;
7887
7888 memcpy(msm_stub_dai_links + total_links,
7889 msm_stub_fe_dai_links,
7890 sizeof(msm_stub_fe_dai_links));
7891 total_links += ARRAY_SIZE(msm_stub_fe_dai_links);
7892
7893 memcpy(msm_stub_dai_links + total_links,
7894 msm_stub_be_dai_links,
7895 sizeof(msm_stub_be_dai_links));
7896 total_links += ARRAY_SIZE(msm_stub_be_dai_links);
7897
7898 dailink = msm_stub_dai_links;
7899 }
7900
7901 if (card) {
7902 card->dai_link = dailink;
7903 card->num_links = total_links;
7904 }
7905
7906 return card;
7907}
7908
7909static int msm_wsa881x_init(struct snd_soc_component *component)
7910{
7911 u8 spkleft_ports[WSA881X_MAX_SWR_PORTS] = {0, 1, 2, 3};
7912 u8 spkright_ports[WSA881X_MAX_SWR_PORTS] = {0, 1, 2, 3};
7913 u8 spkleft_port_types[WSA881X_MAX_SWR_PORTS] = {SPKR_L, SPKR_L_COMP,
7914 SPKR_L_BOOST, SPKR_L_VI};
7915 u8 spkright_port_types[WSA881X_MAX_SWR_PORTS] = {SPKR_R, SPKR_R_COMP,
7916 SPKR_R_BOOST, SPKR_R_VI};
7917 unsigned int ch_rate[WSA881X_MAX_SWR_PORTS] = {2400, 600, 300, 1200};
7918 unsigned int ch_mask[WSA881X_MAX_SWR_PORTS] = {0x1, 0xF, 0x3, 0x3};
7919 struct snd_soc_codec *codec = snd_soc_component_to_codec(component);
7920 struct msm_asoc_mach_data *pdata;
7921 struct snd_soc_dapm_context *dapm;
Aditya Bavanari4ae32fc2018-08-13 13:08:34 +0530[diff] [blame]7922 struct snd_card *card = component->card->snd_card;
7923 struct snd_info_entry *entry;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]7924 int ret = 0;
7925
7926 if (!codec) {
7927 pr_err("%s codec is NULL\n", __func__);
7928 return -EINVAL;
7929 }
7930
7931 dapm = snd_soc_codec_get_dapm(codec);
7932
7933 if (!strcmp(component->name_prefix, "SpkrLeft")) {
7934 dev_dbg(codec->dev, "%s: setting left ch map to codec %s\n",
7935 __func__, codec->component.name);
7936 wsa881x_set_channel_map(codec, &spkleft_ports[0],
7937 WSA881X_MAX_SWR_PORTS, &ch_mask[0],
7938 &ch_rate[0], &spkleft_port_types[0]);
7939 if (dapm->component) {
7940 snd_soc_dapm_ignore_suspend(dapm, "SpkrLeft IN");
7941 snd_soc_dapm_ignore_suspend(dapm, "SpkrLeft SPKR");
7942 }
7943 } else if (!strcmp(component->name_prefix, "SpkrRight")) {
7944 dev_dbg(codec->dev, "%s: setting right ch map to codec %s\n",
7945 __func__, codec->component.name);
7946 wsa881x_set_channel_map(codec, &spkright_ports[0],
7947 WSA881X_MAX_SWR_PORTS, &ch_mask[0],
7948 &ch_rate[0], &spkright_port_types[0]);
7949 if (dapm->component) {
7950 snd_soc_dapm_ignore_suspend(dapm, "SpkrRight IN");
7951 snd_soc_dapm_ignore_suspend(dapm, "SpkrRight SPKR");
7952 }
7953 } else {
7954 dev_err(codec->dev, "%s: wrong codec name %s\n", __func__,
7955 codec->component.name);
7956 ret = -EINVAL;
7957 goto err;
7958 }
7959 pdata = snd_soc_card_get_drvdata(component->card);
Aditya Bavanari4ae32fc2018-08-13 13:08:34 +0530[diff] [blame]7960 if (!pdata->codec_root) {
7961 entry = snd_info_create_subdir(card->module, "codecs",
7962 card->proc_root);
7963 if (!entry) {
7964 pr_err("%s: Cannot create codecs module entry\n",
7965 __func__);
7966 ret = 0;
7967 goto err;
7968 }
7969 pdata->codec_root = entry;
7970 }
7971 wsa881x_codec_info_create_codec_entry(pdata->codec_root,
7972 codec);
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]7973err:
7974 return ret;
7975}
7976
7977static int msm_aux_codec_init(struct snd_soc_component *component)
7978{
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]7979 struct snd_soc_codec *codec = snd_soc_component_to_codec(component);
7980 struct snd_soc_dapm_context *dapm = snd_soc_codec_get_dapm(codec);
Ramprasad Katkam997da402018-08-17 20:20:06 +0530[diff] [blame]7981 int ret = 0;
7982 void *mbhc_calibration;
Aditya Bavanari4ae32fc2018-08-13 13:08:34 +0530[diff] [blame]7983 struct snd_info_entry *entry;
7984 struct snd_card *card = component->card->snd_card;
7985 struct msm_asoc_mach_data *pdata;
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]7986
7987 snd_soc_dapm_ignore_suspend(dapm, "EAR");
7988 snd_soc_dapm_ignore_suspend(dapm, "AUX");
7989 snd_soc_dapm_ignore_suspend(dapm, "HPHL");
7990 snd_soc_dapm_ignore_suspend(dapm, "HPHR");
7991 snd_soc_dapm_ignore_suspend(dapm, "AMIC1");
7992 snd_soc_dapm_ignore_suspend(dapm, "AMIC2");
7993 snd_soc_dapm_ignore_suspend(dapm, "AMIC3");
7994 snd_soc_dapm_ignore_suspend(dapm, "AMIC4");
7995 snd_soc_dapm_sync(dapm);
7996
Aditya Bavanari4ae32fc2018-08-13 13:08:34 +0530[diff] [blame]7997 pdata = snd_soc_card_get_drvdata(component->card);
7998 if (!pdata->codec_root) {
7999 entry = snd_info_create_subdir(card->module, "codecs",
8000 card->proc_root);
8001 if (!entry) {
8002 pr_err("%s: Cannot create codecs module entry\n",
8003 __func__);
8004 ret = 0;
8005 goto codec_root_err;
8006 }
8007 pdata->codec_root = entry;
8008 }
8009 wcd937x_info_create_codec_entry(pdata->codec_root, codec);
8010codec_root_err:
Ramprasad Katkam997da402018-08-17 20:20:06 +0530[diff] [blame]8011 mbhc_calibration = def_wcd_mbhc_cal();
8012 if (!mbhc_calibration) {
8013 return -ENOMEM;
8014 }
8015 wcd_mbhc_cfg.calibration = mbhc_calibration;
8016 ret = wcd937x_mbhc_hs_detect(codec, &wcd_mbhc_cfg);
8017
8018 return ret;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]8019}
8020
8021static int msm_init_aux_dev(struct platform_device *pdev,
8022 struct snd_soc_card *card)
8023{
8024 struct device_node *wsa_of_node;
8025 struct device_node *aux_codec_of_node;
8026 u32 wsa_max_devs;
8027 u32 wsa_dev_cnt;
8028 u32 codec_aux_dev_cnt = 0;
8029 int i;
Md Mansoor Ahmed2382aaa2018-11-20 11:06:32 +0530[diff] [blame]8030 struct msm_wsa881x_dev_info *wsa881x_dev_info = NULL;
8031 struct aux_codec_dev_info *aux_cdc_dev_info = NULL;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]8032 const char *auxdev_name_prefix[1];
8033 char *dev_name_str = NULL;
8034 int found = 0;
8035 int codecs_found = 0;
8036 int ret = 0;
8037
8038 /* Get maximum WSA device count for this platform */
8039 ret = of_property_read_u32(pdev->dev.of_node,
8040 "qcom,wsa-max-devs", &wsa_max_devs);
8041 if (ret) {
8042 dev_info(&pdev->dev,
8043 "%s: wsa-max-devs property missing in DT %s, ret = %d\n",
8044 __func__, pdev->dev.of_node->full_name, ret);
8045 wsa_max_devs = 0;
8046 goto codec_aux_dev;
8047 }
8048 if (wsa_max_devs == 0) {
8049 dev_warn(&pdev->dev,
8050 "%s: Max WSA devices is 0 for this target?\n",
8051 __func__);
8052 goto codec_aux_dev;
8053 }
8054
8055 /* Get count of WSA device phandles for this platform */
8056 wsa_dev_cnt = of_count_phandle_with_args(pdev->dev.of_node,
8057 "qcom,wsa-devs", NULL);
8058 if (wsa_dev_cnt == -ENOENT) {
8059 dev_warn(&pdev->dev, "%s: No wsa device defined in DT.\n",
8060 __func__);
8061 goto err;
8062 } else if (wsa_dev_cnt <= 0) {
8063 dev_err(&pdev->dev,
8064 "%s: Error reading wsa device from DT. wsa_dev_cnt = %d\n",
8065 __func__, wsa_dev_cnt);
8066 ret = -EINVAL;
8067 goto err;
8068 }
8069
8070 /*
8071 * Expect total phandles count to be NOT less than maximum possible
8072 * WSA count. However, if it is less, then assign same value to
8073 * max count as well.
8074 */
8075 if (wsa_dev_cnt < wsa_max_devs) {
8076 dev_dbg(&pdev->dev,
8077 "%s: wsa_max_devs = %d cannot exceed wsa_dev_cnt = %d\n",
8078 __func__, wsa_max_devs, wsa_dev_cnt);
8079 wsa_max_devs = wsa_dev_cnt;
8080 }
8081
8082 /* Make sure prefix string passed for each WSA device */
8083 ret = of_property_count_strings(pdev->dev.of_node,
8084 "qcom,wsa-aux-dev-prefix");
8085 if (ret != wsa_dev_cnt) {
8086 dev_err(&pdev->dev,
8087 "%s: expecting %d wsa prefix. Defined only %d in DT\n",
8088 __func__, wsa_dev_cnt, ret);
8089 ret = -EINVAL;
8090 goto err;
8091 }
8092
8093 /*
8094 * Alloc mem to store phandle and index info of WSA device, if already
8095 * registered with ALSA core
8096 */
8097 wsa881x_dev_info = devm_kcalloc(&pdev->dev, wsa_max_devs,
8098 sizeof(struct msm_wsa881x_dev_info),
8099 GFP_KERNEL);
8100 if (!wsa881x_dev_info) {
8101 ret = -ENOMEM;
8102 goto err;
8103 }
8104
8105 /*
8106 * search and check whether all WSA devices are already
8107 * registered with ALSA core or not. If found a node, store
8108 * the node and the index in a local array of struct for later
8109 * use.
8110 */
8111 for (i = 0; i < wsa_dev_cnt; i++) {
8112 wsa_of_node = of_parse_phandle(pdev->dev.of_node,
8113 "qcom,wsa-devs", i);
8114 if (unlikely(!wsa_of_node)) {
8115 /* we should not be here */
8116 dev_err(&pdev->dev,
8117 "%s: wsa dev node is not present\n",
8118 __func__);
8119 ret = -EINVAL;
8120 goto err;
8121 }
8122 if (soc_find_component(wsa_of_node, NULL)) {
8123 /* WSA device registered with ALSA core */
8124 wsa881x_dev_info[found].of_node = wsa_of_node;
8125 wsa881x_dev_info[found].index = i;
8126 found++;
8127 if (found == wsa_max_devs)
8128 break;
8129 }
8130 }
8131
8132 if (found < wsa_max_devs) {
8133 dev_dbg(&pdev->dev,
8134 "%s: failed to find %d components. Found only %d\n",
8135 __func__, wsa_max_devs, found);
8136 return -EPROBE_DEFER;
8137 }
8138 dev_info(&pdev->dev,
8139 "%s: found %d wsa881x devices registered with ALSA core\n",
8140 __func__, found);
8141
8142codec_aux_dev:
8143 if (strcmp(card->name, "sm6150-tavil-snd-card")) {
8144 /* Get count of aux codec device phandles for this platform */
8145 codec_aux_dev_cnt = of_count_phandle_with_args(
8146 pdev->dev.of_node,
8147 "qcom,codec-aux-devs", NULL);
8148 if (codec_aux_dev_cnt == -ENOENT) {
8149 dev_warn(&pdev->dev, "%s: No aux codec defined in DT.\n",
8150 __func__);
8151 goto err;
8152 } else if (codec_aux_dev_cnt <= 0) {
8153 dev_err(&pdev->dev,
8154 "%s: Error reading aux codec device from DT, dev_cnt=%d\n",
8155 __func__, codec_aux_dev_cnt);
8156 ret = -EINVAL;
8157 goto err;
8158 }
8159
8160 /*
8161 * Alloc mem to store phandle and index info of aux codec
8162 * if already registered with ALSA core
8163 */
8164 aux_cdc_dev_info = devm_kcalloc(&pdev->dev, codec_aux_dev_cnt,
8165 sizeof(struct aux_codec_dev_info),
8166 GFP_KERNEL);
8167 if (!aux_cdc_dev_info) {
8168 ret = -ENOMEM;
8169 goto err;
8170 }
8171
8172 /*
8173 * search and check whether all aux codecs are already
8174 * registered with ALSA core or not. If found a node, store
8175 * the node and the index in a local array of struct for later
8176 * use.
8177 */
8178 for (i = 0; i < codec_aux_dev_cnt; i++) {
8179 aux_codec_of_node = of_parse_phandle(pdev->dev.of_node,
8180 "qcom,codec-aux-devs", i);
8181 if (unlikely(!aux_codec_of_node)) {
8182 /* we should not be here */
8183 dev_err(&pdev->dev,
8184 "%s: aux codec dev node is not present\n",
8185 __func__);
8186 ret = -EINVAL;
8187 goto err;
8188 }
8189 if (soc_find_component(aux_codec_of_node, NULL)) {
8190 /* AUX codec registered with ALSA core */
8191 aux_cdc_dev_info[codecs_found].of_node =
8192 aux_codec_of_node;
8193 aux_cdc_dev_info[codecs_found].index = i;
8194 codecs_found++;
8195 }
8196 }
8197
8198 if (codecs_found < codec_aux_dev_cnt) {
8199 dev_dbg(&pdev->dev,
8200 "%s: failed to find %d components. Found only %d\n",
8201 __func__, codec_aux_dev_cnt, codecs_found);
8202 return -EPROBE_DEFER;
8203 }
8204 dev_info(&pdev->dev,
8205 "%s: found %d AUX codecs registered with ALSA core\n",
8206 __func__, codecs_found);
8207
8208 }
8209
8210 card->num_aux_devs = wsa_max_devs + codec_aux_dev_cnt;
8211 card->num_configs = wsa_max_devs + codec_aux_dev_cnt;
8212
8213 /* Alloc array of AUX devs struct */
8214 msm_aux_dev = devm_kcalloc(&pdev->dev, card->num_aux_devs,
8215 sizeof(struct snd_soc_aux_dev),
8216 GFP_KERNEL);
8217 if (!msm_aux_dev) {
8218 ret = -ENOMEM;
8219 goto err;
8220 }
8221
8222 /* Alloc array of codec conf struct */
8223 msm_codec_conf = devm_kcalloc(&pdev->dev, card->num_configs,
8224 sizeof(struct snd_soc_codec_conf),
8225 GFP_KERNEL);
8226 if (!msm_codec_conf) {
8227 ret = -ENOMEM;
8228 goto err;
8229 }
8230
8231 for (i = 0; i < wsa_max_devs; i++) {
8232 dev_name_str = devm_kzalloc(&pdev->dev, DEV_NAME_STR_LEN,
8233 GFP_KERNEL);
8234 if (!dev_name_str) {
8235 ret = -ENOMEM;
8236 goto err;
8237 }
8238
8239 ret = of_property_read_string_index(pdev->dev.of_node,
8240 "qcom,wsa-aux-dev-prefix",
8241 wsa881x_dev_info[i].index,
8242 auxdev_name_prefix);
8243 if (ret) {
8244 dev_err(&pdev->dev,
8245 "%s: failed to read wsa aux dev prefix, ret = %d\n",
8246 __func__, ret);
8247 ret = -EINVAL;
8248 goto err;
8249 }
8250
8251 snprintf(dev_name_str, strlen("wsa881x.%d"), "wsa881x.%d", i);
8252 msm_aux_dev[i].name = dev_name_str;
8253 msm_aux_dev[i].codec_name = NULL;
8254 msm_aux_dev[i].codec_of_node =
8255 wsa881x_dev_info[i].of_node;
8256 msm_aux_dev[i].init = msm_wsa881x_init;
8257 msm_codec_conf[i].dev_name = NULL;
8258 msm_codec_conf[i].name_prefix = auxdev_name_prefix[0];
8259 msm_codec_conf[i].of_node =
8260 wsa881x_dev_info[i].of_node;
8261 }
8262
8263 for (i = 0; i < codec_aux_dev_cnt; i++) {
8264 msm_aux_dev[wsa_max_devs + i].name = NULL;
8265 msm_aux_dev[wsa_max_devs + i].codec_name = NULL;
8266 msm_aux_dev[wsa_max_devs + i].codec_of_node =
8267 aux_cdc_dev_info[i].of_node;
8268 msm_aux_dev[wsa_max_devs + i].init = msm_aux_codec_init;
8269 msm_codec_conf[wsa_max_devs + i].dev_name = NULL;
8270 msm_codec_conf[wsa_max_devs + i].name_prefix =
8271 NULL;
8272 msm_codec_conf[wsa_max_devs + i].of_node =
8273 aux_cdc_dev_info[i].of_node;
8274 }
8275
8276 card->codec_conf = msm_codec_conf;
8277 card->aux_dev = msm_aux_dev;
8278err:
8279 return ret;
8280}
8281
8282static void msm_i2s_auxpcm_init(struct platform_device *pdev)
8283{
8284 int count;
8285 u32 mi2s_master_slave[MI2S_MAX];
8286 int ret;
8287
8288 for (count = 0; count < MI2S_MAX; count++) {
8289 mutex_init(&mi2s_intf_conf[count].lock);
8290 mi2s_intf_conf[count].ref_cnt = 0;
8291 }
8292
8293 ret = of_property_read_u32_array(pdev->dev.of_node,
8294 "qcom,msm-mi2s-master",
8295 mi2s_master_slave, MI2S_MAX);
8296 if (ret) {
8297 dev_dbg(&pdev->dev, "%s: no qcom,msm-mi2s-master in DT node\n",
8298 __func__);
8299 } else {
8300 for (count = 0; count < MI2S_MAX; count++) {
8301 mi2s_intf_conf[count].msm_is_mi2s_master =
8302 mi2s_master_slave[count];
8303 }
8304 }
8305}
8306
8307static void msm_i2s_auxpcm_deinit(void)
8308{
8309 int count;
8310
8311 for (count = 0; count < MI2S_MAX; count++) {
8312 mutex_destroy(&mi2s_intf_conf[count].lock);
8313 mi2s_intf_conf[count].ref_cnt = 0;
8314 mi2s_intf_conf[count].msm_is_mi2s_master = 0;
8315 }
8316}
Vaishnavi Kommaraju9a3d5eb2018-09-19 18:16:39 +0530[diff] [blame]8317
8318static int sm6150_ssr_enable(struct device *dev, void *data)
8319{
8320 struct platform_device *pdev = to_platform_device(dev);
8321 struct snd_soc_card *card = platform_get_drvdata(pdev);
8322 struct msm_asoc_mach_data *pdata;
8323 int ret = 0;
8324
8325 if (!card) {
8326 dev_err(dev, "%s: card is NULL\n", __func__);
8327 ret = -EINVAL;
8328 goto err;
8329 }
8330
8331 if (!strcmp(card->name, "sm6150-tavil-snd-card")) {
8332 pdata = snd_soc_card_get_drvdata(card);
8333 if (!pdata->is_afe_config_done) {
8334 const char *be_dl_name = LPASS_BE_SLIMBUS_0_RX;
8335 struct snd_soc_pcm_runtime *rtd;
8336
8337 rtd = snd_soc_get_pcm_runtime(card, be_dl_name);
8338 if (!rtd) {
8339 dev_err(dev,
8340 "%s: snd_soc_get_pcm_runtime for %s failed!\n",
8341 __func__, be_dl_name);
8342 ret = -EINVAL;
8343 goto err;
8344 }
8345 ret = msm_afe_set_config(rtd->codec);
8346 if (ret)
8347 dev_err(dev, "%s: Failed to set AFE config. err %d\n",
8348 __func__, ret);
8349 else
8350 pdata->is_afe_config_done = true;
8351 }
8352 }
8353 snd_soc_card_change_online_state(card, 1);
8354 dev_dbg(dev, "%s: setting snd_card to ONLINE\n", __func__);
8355
8356err:
8357 return ret;
8358}
8359
8360static void sm6150_ssr_disable(struct device *dev, void *data)
8361{
8362 struct platform_device *pdev = to_platform_device(dev);
8363 struct snd_soc_card *card = platform_get_drvdata(pdev);
8364 struct msm_asoc_mach_data *pdata;
8365
8366 if (!card) {
8367 dev_err(dev, "%s: card is NULL\n", __func__);
8368 return;
8369 }
8370
8371 dev_dbg(dev, "%s: setting snd_card to OFFLINE\n", __func__);
8372 snd_soc_card_change_online_state(card, 0);
8373
8374 if (!strcmp(card->name, "sm6150-tavil-snd-card")) {
8375 pdata = snd_soc_card_get_drvdata(card);
8376 msm_afe_clear_config();
8377 pdata->is_afe_config_done = false;
8378 }
8379}
8380
8381static const struct snd_event_ops sm6150_ssr_ops = {
8382 .enable = sm6150_ssr_enable,
8383 .disable = sm6150_ssr_disable,
8384};
8385
8386static int msm_audio_ssr_compare(struct device *dev, void *data)
8387{
8388 struct device_node *node = data;
8389
8390 dev_dbg(dev, "%s: dev->of_node = 0x%p, node = 0x%p\n",
8391 __func__, dev->of_node, node);
8392 return (dev->of_node && dev->of_node == node);
8393}
8394
8395static int msm_audio_ssr_register(struct device *dev)
8396{
8397 struct device_node *np = dev->of_node;
8398 struct snd_event_clients *ssr_clients = NULL;
8399 struct device_node *node;
8400 int ret;
8401 int i;
8402
8403 for (i = 0; ; i++) {
8404 node = of_parse_phandle(np, "qcom,msm_audio_ssr_devs", i);
8405 if (!node)
8406 break;
8407 snd_event_mstr_add_client(&ssr_clients,
8408 msm_audio_ssr_compare, node);
8409 }
8410
8411 ret = snd_event_master_register(dev, &sm6150_ssr_ops,
8412 ssr_clients, NULL);
8413 if (!ret)
8414 snd_event_notify(dev, SND_EVENT_UP);
8415
8416 return ret;
8417}
8418
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]8419static int msm_asoc_machine_probe(struct platform_device *pdev)
8420{
8421 struct snd_soc_card *card;
8422 struct msm_asoc_mach_data *pdata;
8423 const char *mbhc_audio_jack_type = NULL;
8424 int ret;
8425
8426 if (!pdev->dev.of_node) {
8427 dev_err(&pdev->dev, "No platform supplied from device tree\n");
8428 return -EINVAL;
8429 }
8430
8431 pdata = devm_kzalloc(&pdev->dev,
8432 sizeof(struct msm_asoc_mach_data), GFP_KERNEL);
8433 if (!pdata)
8434 return -ENOMEM;
8435
8436 card = populate_snd_card_dailinks(&pdev->dev);
8437 if (!card) {
8438 dev_err(&pdev->dev, "%s: Card uninitialized\n", __func__);
8439 ret = -EINVAL;
8440 goto err;
8441 }
8442 card->dev = &pdev->dev;
8443 platform_set_drvdata(pdev, card);
8444 snd_soc_card_set_drvdata(card, pdata);
8445
8446 ret = snd_soc_of_parse_card_name(card, "qcom,model");
8447 if (ret) {
8448 dev_err(&pdev->dev, "parse card name failed, err:%d\n",
8449 ret);
8450 goto err;
8451 }
8452
8453 ret = snd_soc_of_parse_audio_routing(card, "qcom,audio-routing");
8454 if (ret) {
8455 dev_err(&pdev->dev, "parse audio routing failed, err:%d\n",
8456 ret);
8457 goto err;
8458 }
8459
8460 ret = msm_populate_dai_link_component_of_node(card);
8461 if (ret) {
8462 ret = -EPROBE_DEFER;
8463 goto err;
8464 }
8465
8466 ret = msm_init_aux_dev(pdev, card);
8467 if (ret)
8468 goto err;
8469
8470 ret = devm_snd_soc_register_card(&pdev->dev, card);
8471 if (ret == -EPROBE_DEFER) {
8472 if (codec_reg_done)
8473 ret = -EINVAL;
8474 goto err;
8475 } else if (ret) {
8476 dev_err(&pdev->dev, "snd_soc_register_card failed (%d)\n",
8477 ret);
8478 goto err;
8479 }
8480 dev_info(&pdev->dev, "Sound card %s registered\n", card->name);
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]8481
8482 pdata->hph_en1_gpio_p = of_parse_phandle(pdev->dev.of_node,
8483 "qcom,hph-en1-gpio", 0);
8484 if (!pdata->hph_en1_gpio_p) {
8485 dev_dbg(&pdev->dev, "property %s not detected in node %s\n",
8486 "qcom,hph-en1-gpio",
8487 pdev->dev.of_node->full_name);
8488 }
8489
8490 pdata->hph_en0_gpio_p = of_parse_phandle(pdev->dev.of_node,
8491 "qcom,hph-en0-gpio", 0);
8492 if (!pdata->hph_en0_gpio_p) {
8493 dev_dbg(&pdev->dev, "property %s not detected in node %s\n",
8494 "qcom,hph-en0-gpio",
8495 pdev->dev.of_node->full_name);
8496 }
8497
8498 ret = of_property_read_string(pdev->dev.of_node,
8499 "qcom,mbhc-audio-jack-type", &mbhc_audio_jack_type);
8500 if (ret) {
8501 dev_dbg(&pdev->dev, "Looking up %s property in node %s failed\n",
8502 "qcom,mbhc-audio-jack-type",
8503 pdev->dev.of_node->full_name);
8504 dev_dbg(&pdev->dev, "Jack type properties set to default\n");
8505 } else {
8506 if (!strcmp(mbhc_audio_jack_type, "4-pole-jack")) {
8507 wcd_mbhc_cfg.enable_anc_mic_detect = false;
8508 dev_dbg(&pdev->dev, "This hardware has 4 pole jack");
8509 } else if (!strcmp(mbhc_audio_jack_type, "5-pole-jack")) {
8510 wcd_mbhc_cfg.enable_anc_mic_detect = true;
8511 dev_dbg(&pdev->dev, "This hardware has 5 pole jack");
8512 } else if (!strcmp(mbhc_audio_jack_type, "6-pole-jack")) {
8513 wcd_mbhc_cfg.enable_anc_mic_detect = true;
8514 dev_dbg(&pdev->dev, "This hardware has 6 pole jack");
8515 } else {
8516 wcd_mbhc_cfg.enable_anc_mic_detect = false;
8517 dev_dbg(&pdev->dev, "Unknown value, set to default\n");
8518 }
8519 }
8520 /*
8521 * Parse US-Euro gpio info from DT. Report no error if us-euro
8522 * entry is not found in DT file as some targets do not support
8523 * US-Euro detection
8524 */
8525 pdata->us_euro_gpio_p = of_parse_phandle(pdev->dev.of_node,
8526 "qcom,us-euro-gpios", 0);
8527 if (!pdata->us_euro_gpio_p) {
8528 dev_dbg(&pdev->dev, "property %s not detected in node %s",
8529 "qcom,us-euro-gpios", pdev->dev.of_node->full_name);
8530 } else {
8531 dev_dbg(&pdev->dev, "%s detected\n",
8532 "qcom,us-euro-gpios");
8533 wcd_mbhc_cfg.swap_gnd_mic = msm_swap_gnd_mic;
8534 }
Vatsal Bucha6cb17a02018-08-07 11:07:04 +0530[diff] [blame]8535
8536 if (wcd_mbhc_cfg.enable_usbc_analog) {
8537 wcd_mbhc_cfg.swap_gnd_mic = msm_usbc_swap_gnd_mic;
8538
8539 pdata->fsa_handle = of_parse_phandle(pdev->dev.of_node,
8540 "fsa4480-i2c-handle", 0);
8541 if (!pdata->fsa_handle)
8542 dev_err(&pdev->dev,
8543 "property %s not detected in node %s\n",
8544 "fsa4480-i2c-handle",
8545 pdev->dev.of_node->full_name);
8546 }
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]8547 /* Parse pinctrl info from devicetree */
8548 ret = msm_get_pinctrl(pdev);
8549 if (!ret) {
8550 pr_debug("%s: pinctrl parsing successful\n", __func__);
8551 } else {
8552 dev_dbg(&pdev->dev,
8553 "%s: Parsing pinctrl failed with %d. Cannot use Ports\n",
8554 __func__, ret);
8555 ret = 0;
8556 }
8557
8558 msm_i2s_auxpcm_init(pdev);
Vaishnavi Kommaraju9a3d5eb2018-09-19 18:16:39 +0530[diff] [blame]8559 if (strcmp(card->name, "sm6150-tavil-snd-card")) {
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]8560 pdata->dmic01_gpio_p = of_parse_phandle(pdev->dev.of_node,
8561 "qcom,cdc-dmic01-gpios",
8562 0);
8563 pdata->dmic23_gpio_p = of_parse_phandle(pdev->dev.of_node,
8564 "qcom,cdc-dmic23-gpios",
8565 0);
8566 }
Vaishnavi Kommaraju9a3d5eb2018-09-19 18:16:39 +0530[diff] [blame]8567
8568 ret = msm_audio_ssr_register(&pdev->dev);
8569 if (ret)
8570 pr_err("%s: Registration with SND event FWK failed ret = %d\n",
8571 __func__, ret);
8572
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]8573err:
8574 return ret;
8575}
8576
8577static int msm_asoc_machine_remove(struct platform_device *pdev)
8578{
Vaishnavi Kommaraju9a3d5eb2018-09-19 18:16:39 +0530[diff] [blame]8579 snd_event_master_deregister(&pdev->dev);
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]8580 msm_i2s_auxpcm_deinit();
8581
8582 return 0;
8583}
8584
8585static struct platform_driver sm6150_asoc_machine_driver = {
8586 .driver = {
8587 .name = DRV_NAME,
8588 .owner = THIS_MODULE,
8589 .pm = &snd_soc_pm_ops,
8590 .of_match_table = sm6150_asoc_machine_of_match,
8591 },
8592 .probe = msm_asoc_machine_probe,
8593 .remove = msm_asoc_machine_remove,
8594};
8595module_platform_driver(sm6150_asoc_machine_driver);
8596
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]8597MODULE_DESCRIPTION("ALSA SoC SM6150 Machine driver");
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]8598MODULE_LICENSE("GPL v2");
8599MODULE_ALIAS("platform:" DRV_NAME);
8600MODULE_DEVICE_TABLE(of, sm6150_asoc_machine_of_match);