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Meng Wang688a8672019-01-29 13:43:33 +08001// SPDX-License-Identifier: GPL-2.0-only
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -07002/*
Xiao Lid8bb93c2020-01-07 12:59:05 +08003 * Copyright (c) 2016-2020, The Linux Foundation. All rights reserved.
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -07004 */
5
6#include <linux/clk.h>
7#include <linux/delay.h>
8#include <linux/gpio.h>
9#include <linux/of_gpio.h>
10#include <linux/platform_device.h>
11#include <linux/slab.h>
12#include <linux/io.h>
13#include <linux/module.h>
14#include <linux/input.h>
15#include <linux/of_device.h>
Karthikeyan Mani5eb13422018-11-05 13:49:17 -080016#include <linux/soc/qcom/fsa4480-i2c.h>
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -070017#include <sound/core.h>
18#include <sound/soc.h>
19#include <sound/soc-dapm.h>
20#include <sound/pcm.h>
21#include <sound/pcm_params.h>
22#include <sound/info.h>
Vignesh Kulothungan483a5592018-10-19 15:00:08 -070023#include <soc/snd_event.h>
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -070024#include <dsp/audio_notifier.h>
Karthikeyan Mani7eef68e2018-12-13 17:45:02 -080025#include <soc/swr-common.h>
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -070026#include <dsp/q6afe-v2.h>
27#include <dsp/q6core.h>
28#include "device_event.h"
29#include "msm-pcm-routing-v2.h"
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -070030#include "asoc/msm-cdc-pinctrl.h"
31#include "asoc/wcd-mbhc-v2.h"
Karthikeyan Mani5eb13422018-11-05 13:49:17 -080032#include "codecs/wcd938x/wcd938x-mbhc.h"
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -070033#include "codecs/wsa881x.h"
Laxminath Kasam99690f12020-03-15 15:38:21 +053034#include "codecs/wsa883x/wsa883x.h"
Karthikeyan Mani5eb13422018-11-05 13:49:17 -080035#include "codecs/wcd938x/wcd938x.h"
Kunlei Zhangf61a2312020-02-11 15:37:03 +080036#include "codecs/wcd937x/wcd937x-mbhc.h"
37#include "codecs/wcd937x/wcd937x.h"
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -070038#include "codecs/bolero/bolero-cdc.h"
39#include <dt-bindings/sound/audio-codec-port-types.h>
40#include "codecs/bolero/wsa-macro.h"
Vatsal Bucha82b30ba2019-04-17 12:43:54 +053041#include "kona-port-config.h"
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -070042
43#define DRV_NAME "kona-asoc-snd"
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -070044#define __CHIPSET__ "KONA "
45#define MSM_DAILINK_NAME(name) (__CHIPSET__#name)
46
47#define SAMPLING_RATE_8KHZ 8000
Vignesh Kulothungan483a5592018-10-19 15:00:08 -070048#define SAMPLING_RATE_11P025KHZ 11025
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -070049#define SAMPLING_RATE_16KHZ 16000
Vignesh Kulothungan483a5592018-10-19 15:00:08 -070050#define SAMPLING_RATE_22P05KHZ 22050
51#define SAMPLING_RATE_32KHZ 32000
52#define SAMPLING_RATE_44P1KHZ 44100
53#define SAMPLING_RATE_48KHZ 48000
54#define SAMPLING_RATE_88P2KHZ 88200
55#define SAMPLING_RATE_96KHZ 96000
56#define SAMPLING_RATE_176P4KHZ 176400
57#define SAMPLING_RATE_192KHZ 192000
58#define SAMPLING_RATE_352P8KHZ 352800
59#define SAMPLING_RATE_384KHZ 384000
60
Karthikeyan Mani1a9d7502019-09-23 21:00:20 -070061#define IS_FRACTIONAL(x) \
62((x == SAMPLING_RATE_11P025KHZ) || (x == SAMPLING_RATE_22P05KHZ) || \
63(x == SAMPLING_RATE_44P1KHZ) || (x == SAMPLING_RATE_88P2KHZ) || \
64(x == SAMPLING_RATE_176P4KHZ) || (x == SAMPLING_RATE_352P8KHZ))
65
66#define IS_MSM_INTERFACE_MI2S(x) \
67((x == PRIM_MI2S) || (x == SEC_MI2S) || (x == TERT_MI2S))
68
Karthikeyan Mani5eb13422018-11-05 13:49:17 -080069#define WCD9XXX_MBHC_DEF_RLOADS 5
70#define WCD9XXX_MBHC_DEF_BUTTONS 8
71#define CODEC_EXT_CLK_RATE 9600000
72#define ADSP_STATE_READY_TIMEOUT_MS 3000
73#define DEV_NAME_STR_LEN 32
74#define WCD_MBHC_HS_V_MAX 1600
75
Vignesh Kulothungan483a5592018-10-19 15:00:08 -070076#define TDM_CHANNEL_MAX 8
77#define DEV_NAME_STR_LEN 32
78
79#define MSM_LL_QOS_VALUE 300 /* time in us to ensure LPM doesn't go in C3/C4 */
80
81#define ADSP_STATE_READY_TIMEOUT_MS 3000
82
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -070083#define WSA8810_NAME_1 "wsa881x.20170211"
84#define WSA8810_NAME_2 "wsa881x.20170212"
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -080085#define WCN_CDC_SLIM_RX_CH_MAX 2
86#define WCN_CDC_SLIM_TX_CH_MAX 2
Vatsal Bucha82b30ba2019-04-17 12:43:54 +053087#define WCN_CDC_SLIM_TX_CH_MAX_LITO 3
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -070088
Vignesh Kulothungan483a5592018-10-19 15:00:08 -070089enum {
Vignesh Kulothungan2139a7d2019-08-07 12:07:20 -070090 RX_PATH = 0,
91 TX_PATH,
92 MAX_PATH,
93};
94
95enum {
Vignesh Kulothungan483a5592018-10-19 15:00:08 -070096 TDM_0 = 0,
97 TDM_1,
98 TDM_2,
99 TDM_3,
100 TDM_4,
101 TDM_5,
102 TDM_6,
103 TDM_7,
104 TDM_PORT_MAX,
105};
106
Vignesh Kulothungan2139a7d2019-08-07 12:07:20 -0700107#define TDM_MAX_SLOTS 8
108#define TDM_SLOT_WIDTH_BITS 32
Vignesh Kulothungan0d196602019-11-26 16:51:55 -0800109#define TDM_SLOT_WIDTH_BYTES TDM_SLOT_WIDTH_BITS/8
Vignesh Kulothungan2139a7d2019-08-07 12:07:20 -0700110
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700111enum {
112 TDM_PRI = 0,
113 TDM_SEC,
114 TDM_TERT,
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800115 TDM_QUAT,
116 TDM_QUIN,
117 TDM_SEN,
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700118 TDM_INTERFACE_MAX,
119};
120
121enum {
122 PRIM_AUX_PCM = 0,
123 SEC_AUX_PCM,
124 TERT_AUX_PCM,
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800125 QUAT_AUX_PCM,
126 QUIN_AUX_PCM,
127 SEN_AUX_PCM,
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700128 AUX_PCM_MAX,
129};
130
131enum {
132 PRIM_MI2S = 0,
133 SEC_MI2S,
134 TERT_MI2S,
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800135 QUAT_MI2S,
136 QUIN_MI2S,
137 SEN_MI2S,
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700138 MI2S_MAX,
139};
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700140
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700141enum {
142 WSA_CDC_DMA_RX_0 = 0,
143 WSA_CDC_DMA_RX_1,
144 RX_CDC_DMA_RX_0,
145 RX_CDC_DMA_RX_1,
146 RX_CDC_DMA_RX_2,
147 RX_CDC_DMA_RX_3,
148 RX_CDC_DMA_RX_5,
149 CDC_DMA_RX_MAX,
150};
151
152enum {
153 WSA_CDC_DMA_TX_0 = 0,
154 WSA_CDC_DMA_TX_1,
155 WSA_CDC_DMA_TX_2,
156 TX_CDC_DMA_TX_0,
157 TX_CDC_DMA_TX_3,
158 TX_CDC_DMA_TX_4,
Xiaoyu Ye2228bf02018-12-12 15:47:20 -0800159 VA_CDC_DMA_TX_0,
160 VA_CDC_DMA_TX_1,
161 VA_CDC_DMA_TX_2,
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700162 CDC_DMA_TX_MAX,
163};
164
Banajit Goswami83a370d2019-03-05 16:15:21 -0800165enum {
166 SLIM_RX_7 = 0,
167 SLIM_RX_MAX,
168};
169enum {
170 SLIM_TX_7 = 0,
Vatsal Bucha82b30ba2019-04-17 12:43:54 +0530171 SLIM_TX_8,
Banajit Goswami83a370d2019-03-05 16:15:21 -0800172 SLIM_TX_MAX,
173};
174
Meng Wange8e53822019-03-18 10:49:50 +0800175enum {
176 AFE_LOOPBACK_TX_IDX = 0,
177 AFE_LOOPBACK_TX_IDX_MAX,
178};
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700179struct msm_asoc_mach_data {
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700180 struct snd_info_entry *codec_root;
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700181 int usbc_en2_gpio; /* used by gpio driver API */
Vatsal Bucha71e0b482019-09-11 14:51:20 +0530182 int lito_v2_enabled;
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700183 struct device_node *dmic01_gpio_p; /* used by pinctrl API */
184 struct device_node *dmic23_gpio_p; /* used by pinctrl API */
185 struct device_node *dmic45_gpio_p; /* used by pinctrl API */
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800186 struct device_node *mi2s_gpio_p[MI2S_MAX]; /* used by pinctrl API */
187 atomic_t mi2s_gpio_ref_count[MI2S_MAX]; /* used by pinctrl API */
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700188 struct device_node *us_euro_gpio_p; /* used by pinctrl API */
189 struct pinctrl *usbc_en2_gpio_p; /* used by pinctrl API */
190 struct device_node *hph_en1_gpio_p; /* used by pinctrl API */
191 struct device_node *hph_en0_gpio_p; /* used by pinctrl API */
192 bool is_afe_config_done;
Karthikeyan Mani5eb13422018-11-05 13:49:17 -0800193 struct device_node *fsa_handle;
Karthikeyan Mani1a9d7502019-09-23 21:00:20 -0700194 struct clk *lpass_audio_hw_vote;
195 int core_audio_vote_count;
Vignesh Kulothungan0d196602019-11-26 16:51:55 -0800196 u32 tdm_max_slots; /* Max TDM slots used */
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700197};
198
199struct tdm_port {
200 u32 mode;
201 u32 channel;
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700202};
203
Vignesh Kulothungan2139a7d2019-08-07 12:07:20 -0700204struct tdm_dev_config {
205 unsigned int tdm_slot_offset[TDM_MAX_SLOTS];
206};
207
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -0800208enum {
209 EXT_DISP_RX_IDX_DP = 0,
Vignesh Kulothunganf86a3552019-07-11 15:46:25 -0700210 EXT_DISP_RX_IDX_DP1,
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -0800211 EXT_DISP_RX_IDX_MAX,
212};
213
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700214struct msm_wsa881x_dev_info {
215 struct device_node *of_node;
216 u32 index;
217};
218
219struct aux_codec_dev_info {
220 struct device_node *of_node;
221 u32 index;
222};
223
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700224struct dev_config {
225 u32 sample_rate;
226 u32 bit_format;
227 u32 channels;
228};
229
Banajit Goswami83a370d2019-03-05 16:15:21 -0800230/* Default configuration of slimbus channels */
231static struct dev_config slim_rx_cfg[] = {
232 [SLIM_RX_7] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
233};
234
235static struct dev_config slim_tx_cfg[] = {
236 [SLIM_TX_7] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
Vatsal Bucha82b30ba2019-04-17 12:43:54 +0530237 [SLIM_TX_8] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
Banajit Goswami83a370d2019-03-05 16:15:21 -0800238};
239
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -0800240/* Default configuration of external display BE */
241static struct dev_config ext_disp_rx_cfg[] = {
242 [EXT_DISP_RX_IDX_DP] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
Vignesh Kulothunganf86a3552019-07-11 15:46:25 -0700243 [EXT_DISP_RX_IDX_DP1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -0800244};
245
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700246static struct dev_config usb_rx_cfg = {
247 .sample_rate = SAMPLING_RATE_48KHZ,
248 .bit_format = SNDRV_PCM_FORMAT_S16_LE,
249 .channels = 2,
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700250};
251
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700252static struct dev_config usb_tx_cfg = {
253 .sample_rate = SAMPLING_RATE_48KHZ,
254 .bit_format = SNDRV_PCM_FORMAT_S16_LE,
255 .channels = 1,
256};
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700257
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700258static struct dev_config proxy_rx_cfg = {
259 .sample_rate = SAMPLING_RATE_48KHZ,
260 .bit_format = SNDRV_PCM_FORMAT_S16_LE,
261 .channels = 2,
262};
263
264static struct afe_clk_set mi2s_clk[MI2S_MAX] = {
265 {
266 AFE_API_VERSION_I2S_CONFIG,
267 Q6AFE_LPASS_CLK_ID_PRI_MI2S_IBIT,
268 Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
269 Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
270 Q6AFE_LPASS_CLK_ROOT_DEFAULT,
271 0,
272 },
273 {
274 AFE_API_VERSION_I2S_CONFIG,
275 Q6AFE_LPASS_CLK_ID_SEC_MI2S_IBIT,
276 Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
277 Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
278 Q6AFE_LPASS_CLK_ROOT_DEFAULT,
279 0,
280 },
281 {
282 AFE_API_VERSION_I2S_CONFIG,
283 Q6AFE_LPASS_CLK_ID_TER_MI2S_IBIT,
284 Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
285 Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
286 Q6AFE_LPASS_CLK_ROOT_DEFAULT,
287 0,
288 },
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800289 {
290 AFE_API_VERSION_I2S_CONFIG,
291 Q6AFE_LPASS_CLK_ID_QUAD_MI2S_IBIT,
292 Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
293 Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
294 Q6AFE_LPASS_CLK_ROOT_DEFAULT,
295 0,
296 },
297 {
298 AFE_API_VERSION_I2S_CONFIG,
299 Q6AFE_LPASS_CLK_ID_QUI_MI2S_IBIT,
300 Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
301 Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
302 Q6AFE_LPASS_CLK_ROOT_DEFAULT,
303 0,
304 },
305 {
306 AFE_API_VERSION_I2S_CONFIG,
307 Q6AFE_LPASS_CLK_ID_SEN_MI2S_IBIT,
308 Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
309 Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
310 Q6AFE_LPASS_CLK_ROOT_DEFAULT,
311 0,
312 },
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700313};
314
315struct mi2s_conf {
316 struct mutex lock;
317 u32 ref_cnt;
318 u32 msm_is_mi2s_master;
319};
320
321static u32 mi2s_ebit_clk[MI2S_MAX] = {
322 Q6AFE_LPASS_CLK_ID_PRI_MI2S_EBIT,
323 Q6AFE_LPASS_CLK_ID_SEC_MI2S_EBIT,
324 Q6AFE_LPASS_CLK_ID_TER_MI2S_EBIT,
325};
326
327static struct mi2s_conf mi2s_intf_conf[MI2S_MAX];
328
329/* Default configuration of TDM channels */
330static struct dev_config tdm_rx_cfg[TDM_INTERFACE_MAX][TDM_PORT_MAX] = {
331 { /* PRI TDM */
332 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
333 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
334 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
335 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
336 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
337 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
338 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
339 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
340 },
341 { /* SEC TDM */
342 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
343 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
344 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
345 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
346 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
347 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
348 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
349 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
350 },
351 { /* TERT TDM */
352 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
353 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
354 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
355 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
356 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
357 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
358 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
359 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
360 },
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800361 { /* QUAT TDM */
362 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
363 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
364 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
365 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
366 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
367 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
368 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
369 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
370 },
371 { /* QUIN TDM */
372 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
373 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
374 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
375 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
376 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
377 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
378 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
379 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
380 },
381 { /* SEN TDM */
382 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
383 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
384 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
385 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
386 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
387 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
388 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
389 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
390 },
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700391};
392
393static struct dev_config tdm_tx_cfg[TDM_INTERFACE_MAX][TDM_PORT_MAX] = {
394 { /* PRI TDM */
395 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
396 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
397 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
398 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
399 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
400 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
401 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
402 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
403 },
404 { /* SEC TDM */
405 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
406 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
407 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
408 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
409 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
410 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
411 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
412 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
413 },
414 { /* TERT TDM */
415 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
416 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
417 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
418 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
419 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
420 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
421 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
422 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
423 },
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800424 { /* QUAT TDM */
425 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
426 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
427 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
428 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
429 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
430 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
431 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
432 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
433 },
434 { /* QUIN TDM */
435 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
436 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
437 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
438 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
439 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
440 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
441 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
442 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
443 },
444 { /* SEN TDM */
445 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
446 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
447 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
448 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
449 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
450 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
451 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
452 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
453 },
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700454};
455
456/* Default configuration of AUX PCM channels */
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700457static struct dev_config aux_pcm_rx_cfg[] = {
458 [PRIM_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700459 [SEC_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
460 [TERT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800461 [QUAT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
462 [QUIN_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
463 [SEN_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700464};
465
466static struct dev_config aux_pcm_tx_cfg[] = {
467 [PRIM_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700468 [SEC_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
469 [TERT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800470 [QUAT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
471 [QUIN_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
472 [SEN_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700473};
474
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700475/* Default configuration of MI2S channels */
476static struct dev_config mi2s_rx_cfg[] = {
477 [PRIM_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
478 [SEC_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
479 [TERT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800480 [QUAT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
481 [QUIN_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
482 [SEN_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700483};
484
485static struct dev_config mi2s_tx_cfg[] = {
486 [PRIM_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
487 [SEC_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
488 [TERT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800489 [QUAT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
490 [QUIN_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
491 [SEN_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700492};
493
Vignesh Kulothungan2139a7d2019-08-07 12:07:20 -0700494static struct tdm_dev_config pri_tdm_dev_config[MAX_PATH][TDM_PORT_MAX] = {
495 { /* PRI TDM */
496 { {0, 4, 0xFFFF} }, /* RX_0 */
497 { {8, 12, 0xFFFF} }, /* RX_1 */
498 { {16, 20, 0xFFFF} }, /* RX_2 */
499 { {24, 28, 0xFFFF} }, /* RX_3 */
500 { {0xFFFF} }, /* RX_4 */
501 { {0xFFFF} }, /* RX_5 */
502 { {0xFFFF} }, /* RX_6 */
503 { {0xFFFF} }, /* RX_7 */
504 },
505 {
506 { {0, 4, 8, 12, 0xFFFF} }, /* TX_0 */
507 { {8, 12, 0xFFFF} }, /* TX_1 */
508 { {16, 20, 0xFFFF} }, /* TX_2 */
509 { {24, 28, 0xFFFF} }, /* TX_3 */
510 { {0xFFFF} }, /* TX_4 */
511 { {0xFFFF} }, /* TX_5 */
512 { {0xFFFF} }, /* TX_6 */
513 { {0xFFFF} }, /* TX_7 */
514 },
515};
516
517static struct tdm_dev_config sec_tdm_dev_config[MAX_PATH][TDM_PORT_MAX] = {
518 { /* SEC TDM */
519 { {0, 4, 0xFFFF} }, /* RX_0 */
520 { {8, 12, 0xFFFF} }, /* RX_1 */
521 { {16, 20, 0xFFFF} }, /* RX_2 */
522 { {24, 28, 0xFFFF} }, /* RX_3 */
523 { {0xFFFF} }, /* RX_4 */
524 { {0xFFFF} }, /* RX_5 */
525 { {0xFFFF} }, /* RX_6 */
526 { {0xFFFF} }, /* RX_7 */
527 },
528 {
529 { {0, 4, 0xFFFF} }, /* TX_0 */
530 { {8, 12, 0xFFFF} }, /* TX_1 */
531 { {16, 20, 0xFFFF} }, /* TX_2 */
532 { {24, 28, 0xFFFF} }, /* TX_3 */
533 { {0xFFFF} }, /* TX_4 */
534 { {0xFFFF} }, /* TX_5 */
535 { {0xFFFF} }, /* TX_6 */
536 { {0xFFFF} }, /* TX_7 */
537 },
538};
539
540static struct tdm_dev_config tert_tdm_dev_config[MAX_PATH][TDM_PORT_MAX] = {
541 { /* TERT TDM */
542 { {0, 4, 0xFFFF} }, /* RX_0 */
543 { {8, 12, 0xFFFF} }, /* RX_1 */
544 { {16, 20, 0xFFFF} }, /* RX_2 */
545 { {24, 28, 0xFFFF} }, /* RX_3 */
546 { {0xFFFF} }, /* RX_4 */
547 { {0xFFFF} }, /* RX_5 */
548 { {0xFFFF} }, /* RX_6 */
549 { {0xFFFF} }, /* RX_7 */
550 },
551 {
552 { {0, 4, 0xFFFF} }, /* TX_0 */
553 { {8, 12, 0xFFFF} }, /* TX_1 */
554 { {16, 20, 0xFFFF} }, /* TX_2 */
555 { {24, 28, 0xFFFF} }, /* TX_3 */
556 { {0xFFFF} }, /* TX_4 */
557 { {0xFFFF} }, /* TX_5 */
558 { {0xFFFF} }, /* TX_6 */
559 { {0xFFFF} }, /* TX_7 */
560 },
561};
562
563static struct tdm_dev_config quat_tdm_dev_config[MAX_PATH][TDM_PORT_MAX] = {
564 { /* QUAT TDM */
565 { {0, 4, 0xFFFF} }, /* RX_0 */
566 { {8, 12, 0xFFFF} }, /* RX_1 */
567 { {16, 20, 0xFFFF} }, /* RX_2 */
568 { {24, 28, 0xFFFF} }, /* RX_3 */
569 { {0xFFFF} }, /* RX_4 */
570 { {0xFFFF} }, /* RX_5 */
571 { {0xFFFF} }, /* RX_6 */
572 { {0xFFFF} }, /* RX_7 */
573 },
574 {
575 { {0, 4, 0xFFFF} }, /* TX_0 */
576 { {8, 12, 0xFFFF} }, /* TX_1 */
577 { {16, 20, 0xFFFF} }, /* TX_2 */
578 { {24, 28, 0xFFFF} }, /* TX_3 */
579 { {0xFFFF} }, /* TX_4 */
580 { {0xFFFF} }, /* TX_5 */
581 { {0xFFFF} }, /* TX_6 */
582 { {0xFFFF} }, /* TX_7 */
583 },
584};
585
586static struct tdm_dev_config quin_tdm_dev_config[MAX_PATH][TDM_PORT_MAX] = {
587 { /* QUIN TDM */
588 { {0, 4, 0xFFFF} }, /* RX_0 */
589 { {8, 12, 0xFFFF} }, /* RX_1 */
590 { {16, 20, 0xFFFF} }, /* RX_2 */
591 { {24, 28, 0xFFFF} }, /* RX_3 */
592 { {0xFFFF} }, /* RX_4 */
593 { {0xFFFF} }, /* RX_5 */
594 { {0xFFFF} }, /* RX_6 */
595 { {0xFFFF} }, /* RX_7 */
596 },
597 {
598 { {0, 4, 0xFFFF} }, /* TX_0 */
599 { {8, 12, 0xFFFF} }, /* TX_1 */
600 { {16, 20, 0xFFFF} }, /* TX_2 */
601 { {24, 28, 0xFFFF} }, /* TX_3 */
602 { {0xFFFF} }, /* TX_4 */
603 { {0xFFFF} }, /* TX_5 */
604 { {0xFFFF} }, /* TX_6 */
605 { {0xFFFF} }, /* TX_7 */
606 },
607};
608
609static struct tdm_dev_config sen_tdm_dev_config[MAX_PATH][TDM_PORT_MAX] = {
610 { /* SEN TDM */
611 { {0, 4, 0xFFFF} }, /* RX_0 */
612 { {8, 12, 0xFFFF} }, /* RX_1 */
613 { {16, 20, 0xFFFF} }, /* RX_2 */
614 { {24, 28, 0xFFFF} }, /* RX_3 */
615 { {0xFFFF} }, /* RX_4 */
616 { {0xFFFF} }, /* RX_5 */
617 { {0xFFFF} }, /* RX_6 */
618 { {0xFFFF} }, /* RX_7 */
619 },
620 {
621 { {0, 4, 0xFFFF} }, /* TX_0 */
622 { {8, 12, 0xFFFF} }, /* TX_1 */
623 { {16, 20, 0xFFFF} }, /* TX_2 */
624 { {24, 28, 0xFFFF} }, /* TX_3 */
625 { {0xFFFF} }, /* TX_4 */
626 { {0xFFFF} }, /* TX_5 */
627 { {0xFFFF} }, /* TX_6 */
628 { {0xFFFF} }, /* TX_7 */
629 },
630};
631
632static void *tdm_cfg[TDM_INTERFACE_MAX] = {
633 pri_tdm_dev_config,
634 sec_tdm_dev_config,
635 tert_tdm_dev_config,
636 quat_tdm_dev_config,
637 quin_tdm_dev_config,
638 sen_tdm_dev_config,
639};
640
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700641/* Default configuration of Codec DMA Interface RX */
642static struct dev_config cdc_dma_rx_cfg[] = {
643 [WSA_CDC_DMA_RX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
644 [WSA_CDC_DMA_RX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
645 [RX_CDC_DMA_RX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
646 [RX_CDC_DMA_RX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
647 [RX_CDC_DMA_RX_2] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
648 [RX_CDC_DMA_RX_3] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
649 [RX_CDC_DMA_RX_5] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
650};
651
652/* Default configuration of Codec DMA Interface TX */
653static struct dev_config cdc_dma_tx_cfg[] = {
Vangala, Amarnath1b9c7892020-05-08 17:59:02 +0530654 [WSA_CDC_DMA_TX_0] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700655 [WSA_CDC_DMA_TX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
656 [WSA_CDC_DMA_TX_2] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
657 [TX_CDC_DMA_TX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
658 [TX_CDC_DMA_TX_3] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
659 [TX_CDC_DMA_TX_4] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
Xiaoyu Ye2228bf02018-12-12 15:47:20 -0800660 [VA_CDC_DMA_TX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 8},
661 [VA_CDC_DMA_TX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 8},
662 [VA_CDC_DMA_TX_2] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 8},
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700663};
664
Meng Wange8e53822019-03-18 10:49:50 +0800665static struct dev_config afe_loopback_tx_cfg[] = {
666 [AFE_LOOPBACK_TX_IDX] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
667};
668
Meng Wangd1db67c2019-04-17 12:41:34 +0800669static int msm_vi_feed_tx_ch = 2;
670static const char *const vi_feed_ch_text[] = {"One", "Two"};
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700671static char const *bit_format_text[] = {"S16_LE", "S24_LE", "S24_3LE",
672 "S32_LE"};
Vignesh Kulothungan406c2bf2019-07-19 10:17:55 -0700673static char const *cdc80_bit_format_text[] = {"S16_LE", "S24_LE", "S24_3LE"};
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700674static char const *ch_text[] = {"Two", "Three", "Four", "Five",
675 "Six", "Seven", "Eight"};
676static char const *usb_sample_rate_text[] = {"KHZ_8", "KHZ_11P025",
677 "KHZ_16", "KHZ_22P05",
678 "KHZ_32", "KHZ_44P1", "KHZ_48",
679 "KHZ_88P2", "KHZ_96", "KHZ_176P4",
680 "KHZ_192", "KHZ_352P8", "KHZ_384"};
681static const char *const usb_ch_text[] = {"One", "Two", "Three", "Four",
682 "Five", "Six", "Seven",
683 "Eight"};
684static char const *tdm_sample_rate_text[] = {"KHZ_8", "KHZ_16", "KHZ_32",
685 "KHZ_48", "KHZ_176P4",
686 "KHZ_352P8"};
687static char const *tdm_bit_format_text[] = {"S16_LE", "S24_LE", "S32_LE"};
688static char const *tdm_ch_text[] = {"One", "Two", "Three", "Four",
689 "Five", "Six", "Seven", "Eight"};
690static const char *const auxpcm_rate_text[] = {"KHZ_8", "KHZ_16"};
691static char const *mi2s_rate_text[] = {"KHZ_8", "KHZ_11P025", "KHZ_16",
692 "KHZ_22P05", "KHZ_32", "KHZ_44P1",
Karthikeyan Mani1a9d7502019-09-23 21:00:20 -0700693 "KHZ_48", "KHZ_88P2", "KHZ_96",
694 "KHZ_176P4", "KHZ_192","KHZ_352P8",
695 "KHZ_384"};
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700696static const char *const mi2s_ch_text[] = {"One", "Two", "Three", "Four",
697 "Five", "Six", "Seven",
698 "Eight"};
699
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700700static const char *const cdc_dma_rx_ch_text[] = {"One", "Two"};
701static const char *const cdc_dma_tx_ch_text[] = {"One", "Two", "Three", "Four",
702 "Five", "Six", "Seven",
703 "Eight"};
704static char const *cdc_dma_sample_rate_text[] = {"KHZ_8", "KHZ_11P025",
705 "KHZ_16", "KHZ_22P05",
706 "KHZ_32", "KHZ_44P1", "KHZ_48",
707 "KHZ_88P2", "KHZ_96",
708 "KHZ_176P4", "KHZ_192",
709 "KHZ_352P8", "KHZ_384"};
Vignesh Kulothungan406c2bf2019-07-19 10:17:55 -0700710static char const *cdc80_dma_sample_rate_text[] = {"KHZ_8", "KHZ_11P025",
711 "KHZ_16", "KHZ_22P05",
712 "KHZ_32", "KHZ_44P1", "KHZ_48",
713 "KHZ_88P2", "KHZ_96",
714 "KHZ_176P4", "KHZ_192"};
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -0800715static char const *ext_disp_bit_format_text[] = {"S16_LE", "S24_LE",
716 "S24_3LE"};
717static char const *ext_disp_sample_rate_text[] = {"KHZ_48", "KHZ_96",
718 "KHZ_192", "KHZ_32", "KHZ_44P1",
719 "KHZ_88P2", "KHZ_176P4"};
Banajit Goswami83a370d2019-03-05 16:15:21 -0800720static char const *bt_sample_rate_text[] = {"KHZ_8", "KHZ_16",
721 "KHZ_44P1", "KHZ_48",
722 "KHZ_88P2", "KHZ_96"};
723static char const *bt_sample_rate_rx_text[] = {"KHZ_8", "KHZ_16",
724 "KHZ_44P1", "KHZ_48",
725 "KHZ_88P2", "KHZ_96"};
726static char const *bt_sample_rate_tx_text[] = {"KHZ_8", "KHZ_16",
727 "KHZ_44P1", "KHZ_48",
728 "KHZ_88P2", "KHZ_96"};
Meng Wange8e53822019-03-18 10:49:50 +0800729static const char *const afe_loopback_tx_ch_text[] = {"One", "Two"};
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700730
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700731static SOC_ENUM_SINGLE_EXT_DECL(usb_rx_sample_rate, usb_sample_rate_text);
732static SOC_ENUM_SINGLE_EXT_DECL(usb_tx_sample_rate, usb_sample_rate_text);
733static SOC_ENUM_SINGLE_EXT_DECL(usb_rx_format, bit_format_text);
734static SOC_ENUM_SINGLE_EXT_DECL(usb_tx_format, bit_format_text);
735static SOC_ENUM_SINGLE_EXT_DECL(usb_rx_chs, usb_ch_text);
736static SOC_ENUM_SINGLE_EXT_DECL(usb_tx_chs, usb_ch_text);
Meng Wangd1db67c2019-04-17 12:41:34 +0800737static SOC_ENUM_SINGLE_EXT_DECL(vi_feed_tx_chs, vi_feed_ch_text);
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700738static SOC_ENUM_SINGLE_EXT_DECL(proxy_rx_chs, ch_text);
739static SOC_ENUM_SINGLE_EXT_DECL(tdm_rx_sample_rate, tdm_sample_rate_text);
740static SOC_ENUM_SINGLE_EXT_DECL(tdm_tx_sample_rate, tdm_sample_rate_text);
741static SOC_ENUM_SINGLE_EXT_DECL(tdm_rx_format, tdm_bit_format_text);
742static SOC_ENUM_SINGLE_EXT_DECL(tdm_tx_format, tdm_bit_format_text);
743static SOC_ENUM_SINGLE_EXT_DECL(tdm_tx_chs, tdm_ch_text);
744static SOC_ENUM_SINGLE_EXT_DECL(tdm_rx_chs, tdm_ch_text);
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700745static SOC_ENUM_SINGLE_EXT_DECL(prim_aux_pcm_rx_sample_rate, auxpcm_rate_text);
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700746static SOC_ENUM_SINGLE_EXT_DECL(sec_aux_pcm_rx_sample_rate, auxpcm_rate_text);
747static SOC_ENUM_SINGLE_EXT_DECL(tert_aux_pcm_rx_sample_rate, auxpcm_rate_text);
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800748static SOC_ENUM_SINGLE_EXT_DECL(quat_aux_pcm_rx_sample_rate, auxpcm_rate_text);
749static SOC_ENUM_SINGLE_EXT_DECL(quin_aux_pcm_rx_sample_rate, auxpcm_rate_text);
750static SOC_ENUM_SINGLE_EXT_DECL(sen_aux_pcm_rx_sample_rate, auxpcm_rate_text);
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700751static SOC_ENUM_SINGLE_EXT_DECL(prim_aux_pcm_tx_sample_rate, auxpcm_rate_text);
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700752static SOC_ENUM_SINGLE_EXT_DECL(sec_aux_pcm_tx_sample_rate, auxpcm_rate_text);
753static SOC_ENUM_SINGLE_EXT_DECL(tert_aux_pcm_tx_sample_rate, auxpcm_rate_text);
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800754static SOC_ENUM_SINGLE_EXT_DECL(quat_aux_pcm_tx_sample_rate, auxpcm_rate_text);
755static SOC_ENUM_SINGLE_EXT_DECL(quin_aux_pcm_tx_sample_rate, auxpcm_rate_text);
756static SOC_ENUM_SINGLE_EXT_DECL(sen_aux_pcm_tx_sample_rate, auxpcm_rate_text);
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700757static SOC_ENUM_SINGLE_EXT_DECL(aux_pcm_rx_format, bit_format_text);
758static SOC_ENUM_SINGLE_EXT_DECL(aux_pcm_tx_format, bit_format_text);
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700759static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_rx_sample_rate, mi2s_rate_text);
760static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_rx_sample_rate, mi2s_rate_text);
761static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_rx_sample_rate, mi2s_rate_text);
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800762static SOC_ENUM_SINGLE_EXT_DECL(quat_mi2s_rx_sample_rate, mi2s_rate_text);
763static SOC_ENUM_SINGLE_EXT_DECL(quin_mi2s_rx_sample_rate, mi2s_rate_text);
764static SOC_ENUM_SINGLE_EXT_DECL(sen_mi2s_rx_sample_rate, mi2s_rate_text);
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700765static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_tx_sample_rate, mi2s_rate_text);
766static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_tx_sample_rate, mi2s_rate_text);
767static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_tx_sample_rate, mi2s_rate_text);
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800768static SOC_ENUM_SINGLE_EXT_DECL(quat_mi2s_tx_sample_rate, mi2s_rate_text);
769static SOC_ENUM_SINGLE_EXT_DECL(quin_mi2s_tx_sample_rate, mi2s_rate_text);
770static SOC_ENUM_SINGLE_EXT_DECL(sen_mi2s_tx_sample_rate, mi2s_rate_text);
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700771static SOC_ENUM_SINGLE_EXT_DECL(mi2s_rx_format, bit_format_text);
772static SOC_ENUM_SINGLE_EXT_DECL(mi2s_tx_format, bit_format_text);
773static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_rx_chs, mi2s_ch_text);
774static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_rx_chs, mi2s_ch_text);
775static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_rx_chs, mi2s_ch_text);
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800776static SOC_ENUM_SINGLE_EXT_DECL(quat_mi2s_rx_chs, mi2s_ch_text);
777static SOC_ENUM_SINGLE_EXT_DECL(quin_mi2s_rx_chs, mi2s_ch_text);
778static SOC_ENUM_SINGLE_EXT_DECL(sen_mi2s_rx_chs, mi2s_ch_text);
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700779static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_tx_chs, mi2s_ch_text);
780static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_tx_chs, mi2s_ch_text);
781static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_tx_chs, mi2s_ch_text);
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800782static SOC_ENUM_SINGLE_EXT_DECL(quat_mi2s_tx_chs, mi2s_ch_text);
783static SOC_ENUM_SINGLE_EXT_DECL(quin_mi2s_tx_chs, mi2s_ch_text);
784static SOC_ENUM_SINGLE_EXT_DECL(sen_mi2s_tx_chs, mi2s_ch_text);
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700785static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_0_chs, cdc_dma_rx_ch_text);
786static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_1_chs, cdc_dma_rx_ch_text);
787static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_0_chs, cdc_dma_rx_ch_text);
788static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_1_chs, cdc_dma_rx_ch_text);
789static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_2_chs, cdc_dma_rx_ch_text);
790static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_3_chs, cdc_dma_rx_ch_text);
791static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_5_chs, cdc_dma_rx_ch_text);
792static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_0_chs, cdc_dma_tx_ch_text);
793static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_1_chs, cdc_dma_tx_ch_text);
794static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_2_chs, cdc_dma_tx_ch_text);
795static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_0_chs, cdc_dma_tx_ch_text);
796static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_3_chs, cdc_dma_tx_ch_text);
797static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_4_chs, cdc_dma_tx_ch_text);
Xiaoyu Ye2228bf02018-12-12 15:47:20 -0800798static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_0_chs, cdc_dma_tx_ch_text);
799static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_1_chs, cdc_dma_tx_ch_text);
800static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_2_chs, cdc_dma_tx_ch_text);
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700801static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_0_format, bit_format_text);
802static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_1_format, bit_format_text);
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700803static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_1_format, bit_format_text);
804static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_2_format, bit_format_text);
805static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_0_format, bit_format_text);
806static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_3_format, bit_format_text);
807static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_4_format, bit_format_text);
Xiaoyu Ye2228bf02018-12-12 15:47:20 -0800808static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_0_format, bit_format_text);
809static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_1_format, bit_format_text);
810static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_2_format, bit_format_text);
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700811static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_0_sample_rate,
812 cdc_dma_sample_rate_text);
813static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_1_sample_rate,
814 cdc_dma_sample_rate_text);
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700815static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_0_sample_rate,
816 cdc_dma_sample_rate_text);
817static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_1_sample_rate,
818 cdc_dma_sample_rate_text);
819static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_2_sample_rate,
820 cdc_dma_sample_rate_text);
821static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_0_sample_rate,
822 cdc_dma_sample_rate_text);
823static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_3_sample_rate,
824 cdc_dma_sample_rate_text);
825static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_4_sample_rate,
826 cdc_dma_sample_rate_text);
Xiaoyu Ye2228bf02018-12-12 15:47:20 -0800827static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_0_sample_rate,
828 cdc_dma_sample_rate_text);
829static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_1_sample_rate,
830 cdc_dma_sample_rate_text);
831static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_2_sample_rate,
832 cdc_dma_sample_rate_text);
Vignesh Kulothungan406c2bf2019-07-19 10:17:55 -0700833
834/* WCD9380 */
835static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc80_dma_rx_0_format, cdc80_bit_format_text);
836static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc80_dma_rx_1_format, cdc80_bit_format_text);
837static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc80_dma_rx_2_format, cdc80_bit_format_text);
838static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc80_dma_rx_3_format, cdc80_bit_format_text);
839static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc80_dma_rx_5_format, cdc80_bit_format_text);
840static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc80_dma_rx_0_sample_rate,
841 cdc80_dma_sample_rate_text);
842static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc80_dma_rx_1_sample_rate,
843 cdc80_dma_sample_rate_text);
844static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc80_dma_rx_2_sample_rate,
845 cdc80_dma_sample_rate_text);
846static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc80_dma_rx_3_sample_rate,
847 cdc80_dma_sample_rate_text);
848static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc80_dma_rx_5_sample_rate,
849 cdc80_dma_sample_rate_text);
850/* WCD9385 */
851static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc85_dma_rx_0_format, bit_format_text);
852static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc85_dma_rx_1_format, bit_format_text);
853static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc85_dma_rx_2_format, bit_format_text);
854static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc85_dma_rx_3_format, bit_format_text);
855static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc85_dma_rx_5_format, bit_format_text);
856static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc85_dma_rx_0_sample_rate,
857 cdc_dma_sample_rate_text);
858static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc85_dma_rx_1_sample_rate,
859 cdc_dma_sample_rate_text);
860static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc85_dma_rx_2_sample_rate,
861 cdc_dma_sample_rate_text);
862static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc85_dma_rx_3_sample_rate,
863 cdc_dma_sample_rate_text);
864static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc85_dma_rx_5_sample_rate,
865 cdc_dma_sample_rate_text);
866
Kunlei Zhangf61a2312020-02-11 15:37:03 +0800867/* WCD937x */
868static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_0_format, bit_format_text);
869static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_1_format, bit_format_text);
870static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_2_format, bit_format_text);
871static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_3_format, bit_format_text);
872static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_5_format, bit_format_text);
873static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_0_sample_rate,
874 cdc_dma_sample_rate_text);
875static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_1_sample_rate,
876 cdc_dma_sample_rate_text);
877static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_2_sample_rate,
878 cdc_dma_sample_rate_text);
879static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_3_sample_rate,
880 cdc_dma_sample_rate_text);
881static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_5_sample_rate,
882 cdc_dma_sample_rate_text);
883
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -0800884static SOC_ENUM_SINGLE_EXT_DECL(ext_disp_rx_chs, ch_text);
885static SOC_ENUM_SINGLE_EXT_DECL(ext_disp_rx_format, ext_disp_bit_format_text);
886static SOC_ENUM_SINGLE_EXT_DECL(ext_disp_rx_sample_rate,
887 ext_disp_sample_rate_text);
Banajit Goswami83a370d2019-03-05 16:15:21 -0800888static SOC_ENUM_SINGLE_EXT_DECL(bt_sample_rate, bt_sample_rate_text);
889static SOC_ENUM_SINGLE_EXT_DECL(bt_sample_rate_rx, bt_sample_rate_rx_text);
890static SOC_ENUM_SINGLE_EXT_DECL(bt_sample_rate_tx, bt_sample_rate_tx_text);
Meng Wange8e53822019-03-18 10:49:50 +0800891static SOC_ENUM_SINGLE_EXT_DECL(afe_loopback_tx_chs, afe_loopback_tx_ch_text);
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700892
893static bool is_initial_boot;
894static bool codec_reg_done;
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700895static struct snd_soc_aux_dev *msm_aux_dev;
896static struct snd_soc_codec_conf *msm_codec_conf;
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700897static struct snd_soc_card snd_soc_card_kona_msm;
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700898static int dmic_0_1_gpio_cnt;
899static int dmic_2_3_gpio_cnt;
900static int dmic_4_5_gpio_cnt;
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700901
Karthikeyan Mani5eb13422018-11-05 13:49:17 -0800902static void *def_wcd_mbhc_cal(void);
903
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700904/*
905 * Need to report LINEIN
906 * if R/L channel impedance is larger than 5K ohm
907 */
908static struct wcd_mbhc_config wcd_mbhc_cfg = {
909 .read_fw_bin = false,
910 .calibration = NULL,
911 .detect_extn_cable = true,
912 .mono_stero_detection = false,
913 .swap_gnd_mic = NULL,
914 .hs_ext_micbias = true,
915 .key_code[0] = KEY_MEDIA,
916 .key_code[1] = KEY_VOICECOMMAND,
917 .key_code[2] = KEY_VOLUMEUP,
918 .key_code[3] = KEY_VOLUMEDOWN,
919 .key_code[4] = 0,
920 .key_code[5] = 0,
921 .key_code[6] = 0,
922 .key_code[7] = 0,
923 .linein_th = 5000,
Sudheer Papothib2bfcfc2019-07-10 21:59:02 +0530924 .moisture_en = false,
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700925 .mbhc_micbias = MIC_BIAS_2,
926 .anc_micbias = MIC_BIAS_2,
927 .enable_anc_mic_detect = false,
Sudheer Papothib2bfcfc2019-07-10 21:59:02 +0530928 .moisture_duty_cycle_en = true,
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700929};
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700930
931static inline int param_is_mask(int p)
932{
933 return (p >= SNDRV_PCM_HW_PARAM_FIRST_MASK) &&
934 (p <= SNDRV_PCM_HW_PARAM_LAST_MASK);
935}
936
937static inline struct snd_mask *param_to_mask(struct snd_pcm_hw_params *p,
938 int n)
939{
940 return &(p->masks[n - SNDRV_PCM_HW_PARAM_FIRST_MASK]);
941}
942
943static void param_set_mask(struct snd_pcm_hw_params *p, int n,
944 unsigned int bit)
945{
946 if (bit >= SNDRV_MASK_MAX)
947 return;
948 if (param_is_mask(n)) {
949 struct snd_mask *m = param_to_mask(p, n);
950
951 m->bits[0] = 0;
952 m->bits[1] = 0;
953 m->bits[bit >> 5] |= (1 << (bit & 31));
954 }
955}
956
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700957static int usb_audio_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
958 struct snd_ctl_elem_value *ucontrol)
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700959{
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700960 int sample_rate_val = 0;
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700961
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700962 switch (usb_rx_cfg.sample_rate) {
963 case SAMPLING_RATE_384KHZ:
964 sample_rate_val = 12;
965 break;
966 case SAMPLING_RATE_352P8KHZ:
967 sample_rate_val = 11;
968 break;
969 case SAMPLING_RATE_192KHZ:
970 sample_rate_val = 10;
971 break;
972 case SAMPLING_RATE_176P4KHZ:
973 sample_rate_val = 9;
974 break;
975 case SAMPLING_RATE_96KHZ:
976 sample_rate_val = 8;
977 break;
978 case SAMPLING_RATE_88P2KHZ:
979 sample_rate_val = 7;
980 break;
981 case SAMPLING_RATE_48KHZ:
982 sample_rate_val = 6;
983 break;
984 case SAMPLING_RATE_44P1KHZ:
985 sample_rate_val = 5;
986 break;
987 case SAMPLING_RATE_32KHZ:
988 sample_rate_val = 4;
989 break;
990 case SAMPLING_RATE_22P05KHZ:
991 sample_rate_val = 3;
992 break;
993 case SAMPLING_RATE_16KHZ:
994 sample_rate_val = 2;
995 break;
996 case SAMPLING_RATE_11P025KHZ:
997 sample_rate_val = 1;
998 break;
999 case SAMPLING_RATE_8KHZ:
1000 default:
1001 sample_rate_val = 0;
1002 break;
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -07001003 }
1004
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07001005 ucontrol->value.integer.value[0] = sample_rate_val;
1006 pr_debug("%s: usb_audio_rx_sample_rate = %d\n", __func__,
1007 usb_rx_cfg.sample_rate);
1008 return 0;
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -07001009}
1010
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07001011static int usb_audio_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
1012 struct snd_ctl_elem_value *ucontrol)
1013{
1014 switch (ucontrol->value.integer.value[0]) {
1015 case 12:
1016 usb_rx_cfg.sample_rate = SAMPLING_RATE_384KHZ;
1017 break;
1018 case 11:
1019 usb_rx_cfg.sample_rate = SAMPLING_RATE_352P8KHZ;
1020 break;
1021 case 10:
1022 usb_rx_cfg.sample_rate = SAMPLING_RATE_192KHZ;
1023 break;
1024 case 9:
1025 usb_rx_cfg.sample_rate = SAMPLING_RATE_176P4KHZ;
1026 break;
1027 case 8:
1028 usb_rx_cfg.sample_rate = SAMPLING_RATE_96KHZ;
1029 break;
1030 case 7:
1031 usb_rx_cfg.sample_rate = SAMPLING_RATE_88P2KHZ;
1032 break;
1033 case 6:
1034 usb_rx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
1035 break;
1036 case 5:
1037 usb_rx_cfg.sample_rate = SAMPLING_RATE_44P1KHZ;
1038 break;
1039 case 4:
1040 usb_rx_cfg.sample_rate = SAMPLING_RATE_32KHZ;
1041 break;
1042 case 3:
1043 usb_rx_cfg.sample_rate = SAMPLING_RATE_22P05KHZ;
1044 break;
1045 case 2:
1046 usb_rx_cfg.sample_rate = SAMPLING_RATE_16KHZ;
1047 break;
1048 case 1:
1049 usb_rx_cfg.sample_rate = SAMPLING_RATE_11P025KHZ;
1050 break;
1051 case 0:
1052 usb_rx_cfg.sample_rate = SAMPLING_RATE_8KHZ;
1053 break;
1054 default:
1055 usb_rx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
1056 break;
1057 }
1058
1059 pr_debug("%s: control value = %ld, usb_audio_rx_sample_rate = %d\n",
1060 __func__, ucontrol->value.integer.value[0],
1061 usb_rx_cfg.sample_rate);
1062 return 0;
1063}
1064
1065static int usb_audio_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
1066 struct snd_ctl_elem_value *ucontrol)
1067{
1068 int sample_rate_val = 0;
1069
1070 switch (usb_tx_cfg.sample_rate) {
1071 case SAMPLING_RATE_384KHZ:
1072 sample_rate_val = 12;
1073 break;
1074 case SAMPLING_RATE_352P8KHZ:
1075 sample_rate_val = 11;
1076 break;
1077 case SAMPLING_RATE_192KHZ:
1078 sample_rate_val = 10;
1079 break;
1080 case SAMPLING_RATE_176P4KHZ:
1081 sample_rate_val = 9;
1082 break;
1083 case SAMPLING_RATE_96KHZ:
1084 sample_rate_val = 8;
1085 break;
1086 case SAMPLING_RATE_88P2KHZ:
1087 sample_rate_val = 7;
1088 break;
1089 case SAMPLING_RATE_48KHZ:
1090 sample_rate_val = 6;
1091 break;
1092 case SAMPLING_RATE_44P1KHZ:
1093 sample_rate_val = 5;
1094 break;
1095 case SAMPLING_RATE_32KHZ:
1096 sample_rate_val = 4;
1097 break;
1098 case SAMPLING_RATE_22P05KHZ:
1099 sample_rate_val = 3;
1100 break;
1101 case SAMPLING_RATE_16KHZ:
1102 sample_rate_val = 2;
1103 break;
1104 case SAMPLING_RATE_11P025KHZ:
1105 sample_rate_val = 1;
1106 break;
1107 case SAMPLING_RATE_8KHZ:
1108 sample_rate_val = 0;
1109 break;
1110 default:
1111 sample_rate_val = 6;
1112 break;
1113 }
1114
1115 ucontrol->value.integer.value[0] = sample_rate_val;
1116 pr_debug("%s: usb_audio_tx_sample_rate = %d\n", __func__,
1117 usb_tx_cfg.sample_rate);
1118 return 0;
1119}
1120
1121static int usb_audio_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
1122 struct snd_ctl_elem_value *ucontrol)
1123{
1124 switch (ucontrol->value.integer.value[0]) {
1125 case 12:
1126 usb_tx_cfg.sample_rate = SAMPLING_RATE_384KHZ;
1127 break;
1128 case 11:
1129 usb_tx_cfg.sample_rate = SAMPLING_RATE_352P8KHZ;
1130 break;
1131 case 10:
1132 usb_tx_cfg.sample_rate = SAMPLING_RATE_192KHZ;
1133 break;
1134 case 9:
1135 usb_tx_cfg.sample_rate = SAMPLING_RATE_176P4KHZ;
1136 break;
1137 case 8:
1138 usb_tx_cfg.sample_rate = SAMPLING_RATE_96KHZ;
1139 break;
1140 case 7:
1141 usb_tx_cfg.sample_rate = SAMPLING_RATE_88P2KHZ;
1142 break;
1143 case 6:
1144 usb_tx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
1145 break;
1146 case 5:
1147 usb_tx_cfg.sample_rate = SAMPLING_RATE_44P1KHZ;
1148 break;
1149 case 4:
1150 usb_tx_cfg.sample_rate = SAMPLING_RATE_32KHZ;
1151 break;
1152 case 3:
1153 usb_tx_cfg.sample_rate = SAMPLING_RATE_22P05KHZ;
1154 break;
1155 case 2:
1156 usb_tx_cfg.sample_rate = SAMPLING_RATE_16KHZ;
1157 break;
1158 case 1:
1159 usb_tx_cfg.sample_rate = SAMPLING_RATE_11P025KHZ;
1160 break;
1161 case 0:
1162 usb_tx_cfg.sample_rate = SAMPLING_RATE_8KHZ;
1163 break;
1164 default:
1165 usb_tx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
1166 break;
1167 }
1168
1169 pr_debug("%s: control value = %ld, usb_audio_tx_sample_rate = %d\n",
1170 __func__, ucontrol->value.integer.value[0],
1171 usb_tx_cfg.sample_rate);
1172 return 0;
1173}
Meng Wange8e53822019-03-18 10:49:50 +08001174static int afe_loopback_tx_ch_get(struct snd_kcontrol *kcontrol,
1175 struct snd_ctl_elem_value *ucontrol)
1176{
1177 pr_debug("%s: afe_loopback_tx_ch = %d\n", __func__,
1178 afe_loopback_tx_cfg[0].channels);
1179 ucontrol->value.enumerated.item[0] =
1180 afe_loopback_tx_cfg[0].channels - 1;
1181
1182 return 0;
1183}
1184
1185static int afe_loopback_tx_ch_put(struct snd_kcontrol *kcontrol,
1186 struct snd_ctl_elem_value *ucontrol)
1187{
1188 afe_loopback_tx_cfg[0].channels =
1189 ucontrol->value.enumerated.item[0] + 1;
1190 pr_debug("%s: afe_loopback_tx_ch = %d\n", __func__,
1191 afe_loopback_tx_cfg[0].channels);
1192
1193 return 1;
1194}
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07001195
1196static int usb_audio_rx_format_get(struct snd_kcontrol *kcontrol,
1197 struct snd_ctl_elem_value *ucontrol)
1198{
1199 switch (usb_rx_cfg.bit_format) {
1200 case SNDRV_PCM_FORMAT_S32_LE:
1201 ucontrol->value.integer.value[0] = 3;
1202 break;
1203 case SNDRV_PCM_FORMAT_S24_3LE:
1204 ucontrol->value.integer.value[0] = 2;
1205 break;
1206 case SNDRV_PCM_FORMAT_S24_LE:
1207 ucontrol->value.integer.value[0] = 1;
1208 break;
1209 case SNDRV_PCM_FORMAT_S16_LE:
1210 default:
1211 ucontrol->value.integer.value[0] = 0;
1212 break;
1213 }
1214
1215 pr_debug("%s: usb_audio_rx_format = %d, ucontrol value = %ld\n",
1216 __func__, usb_rx_cfg.bit_format,
1217 ucontrol->value.integer.value[0]);
1218 return 0;
1219}
1220
1221static int usb_audio_rx_format_put(struct snd_kcontrol *kcontrol,
1222 struct snd_ctl_elem_value *ucontrol)
1223{
1224 int rc = 0;
1225
1226 switch (ucontrol->value.integer.value[0]) {
1227 case 3:
1228 usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S32_LE;
1229 break;
1230 case 2:
1231 usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_3LE;
1232 break;
1233 case 1:
1234 usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_LE;
1235 break;
1236 case 0:
1237 default:
1238 usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S16_LE;
1239 break;
1240 }
1241 pr_debug("%s: usb_audio_rx_format = %d, ucontrol value = %ld\n",
1242 __func__, usb_rx_cfg.bit_format,
1243 ucontrol->value.integer.value[0]);
1244
1245 return rc;
1246}
1247
1248static int usb_audio_tx_format_get(struct snd_kcontrol *kcontrol,
1249 struct snd_ctl_elem_value *ucontrol)
1250{
1251 switch (usb_tx_cfg.bit_format) {
1252 case SNDRV_PCM_FORMAT_S32_LE:
1253 ucontrol->value.integer.value[0] = 3;
1254 break;
1255 case SNDRV_PCM_FORMAT_S24_3LE:
1256 ucontrol->value.integer.value[0] = 2;
1257 break;
1258 case SNDRV_PCM_FORMAT_S24_LE:
1259 ucontrol->value.integer.value[0] = 1;
1260 break;
1261 case SNDRV_PCM_FORMAT_S16_LE:
1262 default:
1263 ucontrol->value.integer.value[0] = 0;
1264 break;
1265 }
1266
1267 pr_debug("%s: usb_audio_tx_format = %d, ucontrol value = %ld\n",
1268 __func__, usb_tx_cfg.bit_format,
1269 ucontrol->value.integer.value[0]);
1270 return 0;
1271}
1272
1273static int usb_audio_tx_format_put(struct snd_kcontrol *kcontrol,
1274 struct snd_ctl_elem_value *ucontrol)
1275{
1276 int rc = 0;
1277
1278 switch (ucontrol->value.integer.value[0]) {
1279 case 3:
1280 usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S32_LE;
1281 break;
1282 case 2:
1283 usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_3LE;
1284 break;
1285 case 1:
1286 usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_LE;
1287 break;
1288 case 0:
1289 default:
1290 usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S16_LE;
1291 break;
1292 }
1293 pr_debug("%s: usb_audio_tx_format = %d, ucontrol value = %ld\n",
1294 __func__, usb_tx_cfg.bit_format,
1295 ucontrol->value.integer.value[0]);
1296
1297 return rc;
1298}
1299
1300static int usb_audio_rx_ch_get(struct snd_kcontrol *kcontrol,
1301 struct snd_ctl_elem_value *ucontrol)
1302{
1303 pr_debug("%s: usb_audio_rx_ch = %d\n", __func__,
1304 usb_rx_cfg.channels);
1305 ucontrol->value.integer.value[0] = usb_rx_cfg.channels - 1;
1306 return 0;
1307}
1308
1309static int usb_audio_rx_ch_put(struct snd_kcontrol *kcontrol,
1310 struct snd_ctl_elem_value *ucontrol)
1311{
1312 usb_rx_cfg.channels = ucontrol->value.integer.value[0] + 1;
1313
1314 pr_debug("%s: usb_audio_rx_ch = %d\n", __func__, usb_rx_cfg.channels);
1315 return 1;
1316}
1317
1318static int usb_audio_tx_ch_get(struct snd_kcontrol *kcontrol,
1319 struct snd_ctl_elem_value *ucontrol)
1320{
1321 pr_debug("%s: usb_audio_tx_ch = %d\n", __func__,
1322 usb_tx_cfg.channels);
1323 ucontrol->value.integer.value[0] = usb_tx_cfg.channels - 1;
1324 return 0;
1325}
1326
1327static int usb_audio_tx_ch_put(struct snd_kcontrol *kcontrol,
1328 struct snd_ctl_elem_value *ucontrol)
1329{
1330 usb_tx_cfg.channels = ucontrol->value.integer.value[0] + 1;
1331
1332 pr_debug("%s: usb_audio_tx_ch = %d\n", __func__, usb_tx_cfg.channels);
1333 return 1;
1334}
1335
Meng Wangd1db67c2019-04-17 12:41:34 +08001336static int msm_vi_feed_tx_ch_get(struct snd_kcontrol *kcontrol,
1337 struct snd_ctl_elem_value *ucontrol)
1338{
1339 ucontrol->value.integer.value[0] = msm_vi_feed_tx_ch - 1;
1340 pr_debug("%s: msm_vi_feed_tx_ch = %ld\n", __func__,
1341 ucontrol->value.integer.value[0]);
1342 return 0;
1343}
1344
1345static int msm_vi_feed_tx_ch_put(struct snd_kcontrol *kcontrol,
1346 struct snd_ctl_elem_value *ucontrol)
1347{
1348 msm_vi_feed_tx_ch = ucontrol->value.integer.value[0] + 1;
1349 pr_debug("%s: msm_vi_feed_tx_ch = %d\n", __func__, msm_vi_feed_tx_ch);
1350 return 1;
1351}
1352
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -08001353static int ext_disp_get_port_idx(struct snd_kcontrol *kcontrol)
1354{
1355 int idx = 0;
1356
1357 if (strnstr(kcontrol->id.name, "Display Port RX",
1358 sizeof("Display Port RX"))) {
1359 idx = EXT_DISP_RX_IDX_DP;
Vignesh Kulothunganf86a3552019-07-11 15:46:25 -07001360 } else if (strnstr(kcontrol->id.name, "Display Port1 RX",
1361 sizeof("Display Port1 RX"))) {
1362 idx = EXT_DISP_RX_IDX_DP1;
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -08001363 } else {
1364 pr_err("%s: unsupported BE: %s\n",
1365 __func__, kcontrol->id.name);
1366 idx = -EINVAL;
1367 }
1368
1369 return idx;
1370}
1371
1372static int ext_disp_rx_format_get(struct snd_kcontrol *kcontrol,
1373 struct snd_ctl_elem_value *ucontrol)
1374{
1375 int idx = ext_disp_get_port_idx(kcontrol);
1376
1377 if (idx < 0)
1378 return idx;
1379
1380 switch (ext_disp_rx_cfg[idx].bit_format) {
1381 case SNDRV_PCM_FORMAT_S24_3LE:
1382 ucontrol->value.integer.value[0] = 2;
1383 break;
1384 case SNDRV_PCM_FORMAT_S24_LE:
1385 ucontrol->value.integer.value[0] = 1;
1386 break;
1387 case SNDRV_PCM_FORMAT_S16_LE:
1388 default:
1389 ucontrol->value.integer.value[0] = 0;
1390 break;
1391 }
1392
1393 pr_debug("%s: ext_disp_rx[%d].format = %d, ucontrol value = %ld\n",
1394 __func__, idx, ext_disp_rx_cfg[idx].bit_format,
1395 ucontrol->value.integer.value[0]);
1396 return 0;
1397}
1398
1399static int ext_disp_rx_format_put(struct snd_kcontrol *kcontrol,
1400 struct snd_ctl_elem_value *ucontrol)
1401{
1402 int idx = ext_disp_get_port_idx(kcontrol);
1403
1404 if (idx < 0)
1405 return idx;
1406
1407 switch (ucontrol->value.integer.value[0]) {
1408 case 2:
1409 ext_disp_rx_cfg[idx].bit_format = SNDRV_PCM_FORMAT_S24_3LE;
1410 break;
1411 case 1:
1412 ext_disp_rx_cfg[idx].bit_format = SNDRV_PCM_FORMAT_S24_LE;
1413 break;
1414 case 0:
1415 default:
1416 ext_disp_rx_cfg[idx].bit_format = SNDRV_PCM_FORMAT_S16_LE;
1417 break;
1418 }
1419 pr_debug("%s: ext_disp_rx[%d].format = %d, ucontrol value = %ld\n",
1420 __func__, idx, ext_disp_rx_cfg[idx].bit_format,
1421 ucontrol->value.integer.value[0]);
1422
1423 return 0;
1424}
1425
1426static int ext_disp_rx_ch_get(struct snd_kcontrol *kcontrol,
1427 struct snd_ctl_elem_value *ucontrol)
1428{
1429 int idx = ext_disp_get_port_idx(kcontrol);
1430
1431 if (idx < 0)
1432 return idx;
1433
1434 ucontrol->value.integer.value[0] =
1435 ext_disp_rx_cfg[idx].channels - 2;
1436
1437 pr_debug("%s: ext_disp_rx[%d].ch = %d\n", __func__,
1438 idx, ext_disp_rx_cfg[idx].channels);
1439
1440 return 0;
1441}
1442
1443static int ext_disp_rx_ch_put(struct snd_kcontrol *kcontrol,
1444 struct snd_ctl_elem_value *ucontrol)
1445{
1446 int idx = ext_disp_get_port_idx(kcontrol);
1447
1448 if (idx < 0)
1449 return idx;
1450
1451 ext_disp_rx_cfg[idx].channels =
1452 ucontrol->value.integer.value[0] + 2;
1453
1454 pr_debug("%s: ext_disp_rx[%d].ch = %d\n", __func__,
1455 idx, ext_disp_rx_cfg[idx].channels);
1456 return 1;
1457}
1458
1459static int ext_disp_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
1460 struct snd_ctl_elem_value *ucontrol)
1461{
1462 int sample_rate_val;
1463 int idx = ext_disp_get_port_idx(kcontrol);
1464
1465 if (idx < 0)
1466 return idx;
1467
1468 switch (ext_disp_rx_cfg[idx].sample_rate) {
1469 case SAMPLING_RATE_176P4KHZ:
1470 sample_rate_val = 6;
1471 break;
1472
1473 case SAMPLING_RATE_88P2KHZ:
1474 sample_rate_val = 5;
1475 break;
1476
1477 case SAMPLING_RATE_44P1KHZ:
1478 sample_rate_val = 4;
1479 break;
1480
1481 case SAMPLING_RATE_32KHZ:
1482 sample_rate_val = 3;
1483 break;
1484
1485 case SAMPLING_RATE_192KHZ:
1486 sample_rate_val = 2;
1487 break;
1488
1489 case SAMPLING_RATE_96KHZ:
1490 sample_rate_val = 1;
1491 break;
1492
1493 case SAMPLING_RATE_48KHZ:
1494 default:
1495 sample_rate_val = 0;
1496 break;
1497 }
1498
1499 ucontrol->value.integer.value[0] = sample_rate_val;
1500 pr_debug("%s: ext_disp_rx[%d].sample_rate = %d\n", __func__,
1501 idx, ext_disp_rx_cfg[idx].sample_rate);
1502
1503 return 0;
1504}
1505
1506static int ext_disp_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
1507 struct snd_ctl_elem_value *ucontrol)
1508{
1509 int idx = ext_disp_get_port_idx(kcontrol);
1510
1511 if (idx < 0)
1512 return idx;
1513
1514 switch (ucontrol->value.integer.value[0]) {
1515 case 6:
1516 ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_176P4KHZ;
1517 break;
1518 case 5:
1519 ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_88P2KHZ;
1520 break;
1521 case 4:
1522 ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_44P1KHZ;
1523 break;
1524 case 3:
1525 ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_32KHZ;
1526 break;
1527 case 2:
1528 ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_192KHZ;
1529 break;
1530 case 1:
1531 ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_96KHZ;
1532 break;
1533 case 0:
1534 default:
1535 ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_48KHZ;
1536 break;
1537 }
1538
1539 pr_debug("%s: control value = %ld, ext_disp_rx[%d].sample_rate = %d\n",
1540 __func__, ucontrol->value.integer.value[0], idx,
1541 ext_disp_rx_cfg[idx].sample_rate);
1542 return 0;
1543}
1544
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07001545static int proxy_rx_ch_get(struct snd_kcontrol *kcontrol,
1546 struct snd_ctl_elem_value *ucontrol)
1547{
1548 pr_debug("%s: proxy_rx channels = %d\n",
1549 __func__, proxy_rx_cfg.channels);
1550 ucontrol->value.integer.value[0] = proxy_rx_cfg.channels - 2;
1551
1552 return 0;
1553}
1554
1555static int proxy_rx_ch_put(struct snd_kcontrol *kcontrol,
1556 struct snd_ctl_elem_value *ucontrol)
1557{
1558 proxy_rx_cfg.channels = ucontrol->value.integer.value[0] + 2;
1559 pr_debug("%s: proxy_rx channels = %d\n",
1560 __func__, proxy_rx_cfg.channels);
1561
1562 return 1;
1563}
1564
1565static int tdm_get_port_idx(struct snd_kcontrol *kcontrol,
1566 struct tdm_port *port)
1567{
1568 if (port) {
1569 if (strnstr(kcontrol->id.name, "PRI",
1570 sizeof(kcontrol->id.name))) {
1571 port->mode = TDM_PRI;
1572 } else if (strnstr(kcontrol->id.name, "SEC",
1573 sizeof(kcontrol->id.name))) {
1574 port->mode = TDM_SEC;
1575 } else if (strnstr(kcontrol->id.name, "TERT",
1576 sizeof(kcontrol->id.name))) {
1577 port->mode = TDM_TERT;
Karthikeyan Mani12dcf642019-01-29 11:21:15 -08001578 } else if (strnstr(kcontrol->id.name, "QUAT",
1579 sizeof(kcontrol->id.name))) {
1580 port->mode = TDM_QUAT;
1581 } else if (strnstr(kcontrol->id.name, "QUIN",
1582 sizeof(kcontrol->id.name))) {
1583 port->mode = TDM_QUIN;
1584 } else if (strnstr(kcontrol->id.name, "SEN",
1585 sizeof(kcontrol->id.name))) {
1586 port->mode = TDM_SEN;
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07001587 } else {
1588 pr_err("%s: unsupported mode in: %s\n",
1589 __func__, kcontrol->id.name);
1590 return -EINVAL;
1591 }
1592
1593 if (strnstr(kcontrol->id.name, "RX_0",
1594 sizeof(kcontrol->id.name)) ||
1595 strnstr(kcontrol->id.name, "TX_0",
1596 sizeof(kcontrol->id.name))) {
1597 port->channel = TDM_0;
1598 } else if (strnstr(kcontrol->id.name, "RX_1",
1599 sizeof(kcontrol->id.name)) ||
1600 strnstr(kcontrol->id.name, "TX_1",
1601 sizeof(kcontrol->id.name))) {
1602 port->channel = TDM_1;
1603 } else if (strnstr(kcontrol->id.name, "RX_2",
1604 sizeof(kcontrol->id.name)) ||
1605 strnstr(kcontrol->id.name, "TX_2",
1606 sizeof(kcontrol->id.name))) {
1607 port->channel = TDM_2;
1608 } else if (strnstr(kcontrol->id.name, "RX_3",
1609 sizeof(kcontrol->id.name)) ||
1610 strnstr(kcontrol->id.name, "TX_3",
1611 sizeof(kcontrol->id.name))) {
1612 port->channel = TDM_3;
1613 } else if (strnstr(kcontrol->id.name, "RX_4",
1614 sizeof(kcontrol->id.name)) ||
1615 strnstr(kcontrol->id.name, "TX_4",
1616 sizeof(kcontrol->id.name))) {
1617 port->channel = TDM_4;
1618 } else if (strnstr(kcontrol->id.name, "RX_5",
1619 sizeof(kcontrol->id.name)) ||
1620 strnstr(kcontrol->id.name, "TX_5",
1621 sizeof(kcontrol->id.name))) {
1622 port->channel = TDM_5;
1623 } else if (strnstr(kcontrol->id.name, "RX_6",
1624 sizeof(kcontrol->id.name)) ||
1625 strnstr(kcontrol->id.name, "TX_6",
1626 sizeof(kcontrol->id.name))) {
1627 port->channel = TDM_6;
1628 } else if (strnstr(kcontrol->id.name, "RX_7",
1629 sizeof(kcontrol->id.name)) ||
1630 strnstr(kcontrol->id.name, "TX_7",
1631 sizeof(kcontrol->id.name))) {
1632 port->channel = TDM_7;
1633 } else {
1634 pr_err("%s: unsupported channel in: %s\n",
1635 __func__, kcontrol->id.name);
1636 return -EINVAL;
1637 }
1638 } else {
1639 return -EINVAL;
1640 }
1641 return 0;
1642}
1643
1644static int tdm_get_sample_rate(int value)
1645{
1646 int sample_rate = 0;
1647
1648 switch (value) {
1649 case 0:
1650 sample_rate = SAMPLING_RATE_8KHZ;
1651 break;
1652 case 1:
1653 sample_rate = SAMPLING_RATE_16KHZ;
1654 break;
1655 case 2:
1656 sample_rate = SAMPLING_RATE_32KHZ;
1657 break;
1658 case 3:
1659 sample_rate = SAMPLING_RATE_48KHZ;
1660 break;
1661 case 4:
1662 sample_rate = SAMPLING_RATE_176P4KHZ;
1663 break;
1664 case 5:
1665 sample_rate = SAMPLING_RATE_352P8KHZ;
1666 break;
1667 default:
1668 sample_rate = SAMPLING_RATE_48KHZ;
1669 break;
1670 }
1671 return sample_rate;
1672}
1673
1674static int tdm_get_sample_rate_val(int sample_rate)
1675{
1676 int sample_rate_val = 0;
1677
1678 switch (sample_rate) {
1679 case SAMPLING_RATE_8KHZ:
1680 sample_rate_val = 0;
1681 break;
1682 case SAMPLING_RATE_16KHZ:
1683 sample_rate_val = 1;
1684 break;
1685 case SAMPLING_RATE_32KHZ:
1686 sample_rate_val = 2;
1687 break;
1688 case SAMPLING_RATE_48KHZ:
1689 sample_rate_val = 3;
1690 break;
1691 case SAMPLING_RATE_176P4KHZ:
1692 sample_rate_val = 4;
1693 break;
1694 case SAMPLING_RATE_352P8KHZ:
1695 sample_rate_val = 5;
1696 break;
1697 default:
1698 sample_rate_val = 3;
1699 break;
1700 }
1701 return sample_rate_val;
1702}
1703
1704static int tdm_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
1705 struct snd_ctl_elem_value *ucontrol)
1706{
1707 struct tdm_port port;
1708 int ret = tdm_get_port_idx(kcontrol, &port);
1709
1710 if (ret) {
1711 pr_err("%s: unsupported control: %s\n",
1712 __func__, kcontrol->id.name);
1713 } else {
1714 ucontrol->value.enumerated.item[0] = tdm_get_sample_rate_val(
1715 tdm_rx_cfg[port.mode][port.channel].sample_rate);
1716
1717 pr_debug("%s: tdm_rx_sample_rate = %d, item = %d\n", __func__,
1718 tdm_rx_cfg[port.mode][port.channel].sample_rate,
1719 ucontrol->value.enumerated.item[0]);
1720 }
1721 return ret;
1722}
1723
1724static int tdm_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
1725 struct snd_ctl_elem_value *ucontrol)
1726{
1727 struct tdm_port port;
1728 int ret = tdm_get_port_idx(kcontrol, &port);
1729
1730 if (ret) {
1731 pr_err("%s: unsupported control: %s\n",
1732 __func__, kcontrol->id.name);
1733 } else {
1734 tdm_rx_cfg[port.mode][port.channel].sample_rate =
1735 tdm_get_sample_rate(ucontrol->value.enumerated.item[0]);
1736
1737 pr_debug("%s: tdm_rx_sample_rate = %d, item = %d\n", __func__,
1738 tdm_rx_cfg[port.mode][port.channel].sample_rate,
1739 ucontrol->value.enumerated.item[0]);
1740 }
1741 return ret;
1742}
1743
1744static int tdm_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
1745 struct snd_ctl_elem_value *ucontrol)
1746{
1747 struct tdm_port port;
1748 int ret = tdm_get_port_idx(kcontrol, &port);
1749
1750 if (ret) {
1751 pr_err("%s: unsupported control: %s\n",
1752 __func__, kcontrol->id.name);
1753 } else {
1754 ucontrol->value.enumerated.item[0] = tdm_get_sample_rate_val(
1755 tdm_tx_cfg[port.mode][port.channel].sample_rate);
1756
1757 pr_debug("%s: tdm_tx_sample_rate = %d, item = %d\n", __func__,
1758 tdm_tx_cfg[port.mode][port.channel].sample_rate,
1759 ucontrol->value.enumerated.item[0]);
1760 }
1761 return ret;
1762}
1763
1764static int tdm_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
1765 struct snd_ctl_elem_value *ucontrol)
1766{
1767 struct tdm_port port;
1768 int ret = tdm_get_port_idx(kcontrol, &port);
1769
1770 if (ret) {
1771 pr_err("%s: unsupported control: %s\n",
1772 __func__, kcontrol->id.name);
1773 } else {
1774 tdm_tx_cfg[port.mode][port.channel].sample_rate =
1775 tdm_get_sample_rate(ucontrol->value.enumerated.item[0]);
1776
1777 pr_debug("%s: tdm_tx_sample_rate = %d, item = %d\n", __func__,
1778 tdm_tx_cfg[port.mode][port.channel].sample_rate,
1779 ucontrol->value.enumerated.item[0]);
1780 }
1781 return ret;
1782}
1783
1784static int tdm_get_format(int value)
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -07001785{
1786 int format = 0;
1787
1788 switch (value) {
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07001789 case 0:
1790 format = SNDRV_PCM_FORMAT_S16_LE;
1791 break;
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -07001792 case 1:
1793 format = SNDRV_PCM_FORMAT_S24_LE;
1794 break;
1795 case 2:
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -07001796 format = SNDRV_PCM_FORMAT_S32_LE;
1797 break;
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -07001798 default:
1799 format = SNDRV_PCM_FORMAT_S16_LE;
1800 break;
1801 }
1802 return format;
1803}
1804
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07001805static int tdm_get_format_val(int format)
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -07001806{
1807 int value = 0;
1808
1809 switch (format) {
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07001810 case SNDRV_PCM_FORMAT_S16_LE:
1811 value = 0;
1812 break;
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -07001813 case SNDRV_PCM_FORMAT_S24_LE:
1814 value = 1;
1815 break;
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07001816 case SNDRV_PCM_FORMAT_S32_LE:
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -07001817 value = 2;
1818 break;
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -07001819 default:
1820 value = 0;
1821 break;
1822 }
1823 return value;
1824}
1825
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07001826static int tdm_rx_format_get(struct snd_kcontrol *kcontrol,
1827 struct snd_ctl_elem_value *ucontrol)
1828{
1829 struct tdm_port port;
1830 int ret = tdm_get_port_idx(kcontrol, &port);
1831
1832 if (ret) {
1833 pr_err("%s: unsupported control: %s\n",
1834 __func__, kcontrol->id.name);
1835 } else {
1836 ucontrol->value.enumerated.item[0] = tdm_get_format_val(
1837 tdm_rx_cfg[port.mode][port.channel].bit_format);
1838
1839 pr_debug("%s: tdm_rx_bit_format = %d, item = %d\n", __func__,
1840 tdm_rx_cfg[port.mode][port.channel].bit_format,
1841 ucontrol->value.enumerated.item[0]);
1842 }
1843 return ret;
1844}
1845
1846static int tdm_rx_format_put(struct snd_kcontrol *kcontrol,
1847 struct snd_ctl_elem_value *ucontrol)
1848{
1849 struct tdm_port port;
1850 int ret = tdm_get_port_idx(kcontrol, &port);
1851
1852 if (ret) {
1853 pr_err("%s: unsupported control: %s\n",
1854 __func__, kcontrol->id.name);
1855 } else {
1856 tdm_rx_cfg[port.mode][port.channel].bit_format =
1857 tdm_get_format(ucontrol->value.enumerated.item[0]);
1858
1859 pr_debug("%s: tdm_rx_bit_format = %d, item = %d\n", __func__,
1860 tdm_rx_cfg[port.mode][port.channel].bit_format,
1861 ucontrol->value.enumerated.item[0]);
1862 }
1863 return ret;
1864}
1865
1866static int tdm_tx_format_get(struct snd_kcontrol *kcontrol,
1867 struct snd_ctl_elem_value *ucontrol)
1868{
1869 struct tdm_port port;
1870 int ret = tdm_get_port_idx(kcontrol, &port);
1871
1872 if (ret) {
1873 pr_err("%s: unsupported control: %s\n",
1874 __func__, kcontrol->id.name);
1875 } else {
1876 ucontrol->value.enumerated.item[0] = tdm_get_format_val(
1877 tdm_tx_cfg[port.mode][port.channel].bit_format);
1878
1879 pr_debug("%s: tdm_tx_bit_format = %d, item = %d\n", __func__,
1880 tdm_tx_cfg[port.mode][port.channel].bit_format,
1881 ucontrol->value.enumerated.item[0]);
1882 }
1883 return ret;
1884}
1885
1886static int tdm_tx_format_put(struct snd_kcontrol *kcontrol,
1887 struct snd_ctl_elem_value *ucontrol)
1888{
1889 struct tdm_port port;
1890 int ret = tdm_get_port_idx(kcontrol, &port);
1891
1892 if (ret) {
1893 pr_err("%s: unsupported control: %s\n",
1894 __func__, kcontrol->id.name);
1895 } else {
1896 tdm_tx_cfg[port.mode][port.channel].bit_format =
1897 tdm_get_format(ucontrol->value.enumerated.item[0]);
1898
1899 pr_debug("%s: tdm_tx_bit_format = %d, item = %d\n", __func__,
1900 tdm_tx_cfg[port.mode][port.channel].bit_format,
1901 ucontrol->value.enumerated.item[0]);
1902 }
1903 return ret;
1904}
1905
1906static int tdm_rx_ch_get(struct snd_kcontrol *kcontrol,
1907 struct snd_ctl_elem_value *ucontrol)
1908{
1909 struct tdm_port port;
1910 int ret = tdm_get_port_idx(kcontrol, &port);
1911
1912 if (ret) {
1913 pr_err("%s: unsupported control: %s\n",
1914 __func__, kcontrol->id.name);
1915 } else {
1916
1917 ucontrol->value.enumerated.item[0] =
1918 tdm_rx_cfg[port.mode][port.channel].channels - 1;
1919
1920 pr_debug("%s: tdm_rx_ch = %d, item = %d\n", __func__,
1921 tdm_rx_cfg[port.mode][port.channel].channels - 1,
1922 ucontrol->value.enumerated.item[0]);
1923 }
1924 return ret;
1925}
1926
1927static int tdm_rx_ch_put(struct snd_kcontrol *kcontrol,
1928 struct snd_ctl_elem_value *ucontrol)
1929{
1930 struct tdm_port port;
1931 int ret = tdm_get_port_idx(kcontrol, &port);
1932
1933 if (ret) {
1934 pr_err("%s: unsupported control: %s\n",
1935 __func__, kcontrol->id.name);
1936 } else {
1937 tdm_rx_cfg[port.mode][port.channel].channels =
1938 ucontrol->value.enumerated.item[0] + 1;
1939
1940 pr_debug("%s: tdm_rx_ch = %d, item = %d\n", __func__,
1941 tdm_rx_cfg[port.mode][port.channel].channels,
1942 ucontrol->value.enumerated.item[0] + 1);
1943 }
1944 return ret;
1945}
1946
1947static int tdm_tx_ch_get(struct snd_kcontrol *kcontrol,
1948 struct snd_ctl_elem_value *ucontrol)
1949{
1950 struct tdm_port port;
1951 int ret = tdm_get_port_idx(kcontrol, &port);
1952
1953 if (ret) {
1954 pr_err("%s: unsupported control: %s\n",
1955 __func__, kcontrol->id.name);
1956 } else {
1957 ucontrol->value.enumerated.item[0] =
1958 tdm_tx_cfg[port.mode][port.channel].channels - 1;
1959
1960 pr_debug("%s: tdm_tx_ch = %d, item = %d\n", __func__,
1961 tdm_tx_cfg[port.mode][port.channel].channels - 1,
1962 ucontrol->value.enumerated.item[0]);
1963 }
1964 return ret;
1965}
1966
1967static int tdm_tx_ch_put(struct snd_kcontrol *kcontrol,
1968 struct snd_ctl_elem_value *ucontrol)
1969{
1970 struct tdm_port port;
1971 int ret = tdm_get_port_idx(kcontrol, &port);
1972
1973 if (ret) {
1974 pr_err("%s: unsupported control: %s\n",
1975 __func__, kcontrol->id.name);
1976 } else {
1977 tdm_tx_cfg[port.mode][port.channel].channels =
1978 ucontrol->value.enumerated.item[0] + 1;
1979
1980 pr_debug("%s: tdm_tx_ch = %d, item = %d\n", __func__,
1981 tdm_tx_cfg[port.mode][port.channel].channels,
1982 ucontrol->value.enumerated.item[0] + 1);
1983 }
1984 return ret;
1985}
1986
Vignesh Kulothungan2139a7d2019-08-07 12:07:20 -07001987static int tdm_slot_map_put(struct snd_kcontrol *kcontrol,
1988 struct snd_ctl_elem_value *ucontrol)
1989{
1990 int slot_index = 0;
1991 int interface = ucontrol->value.integer.value[0];
1992 int channel = ucontrol->value.integer.value[1];
1993 unsigned int offset_val = 0;
Vignesh Kulothungan0d196602019-11-26 16:51:55 -08001994 unsigned int max_slot_offset = 0;
Vignesh Kulothungan2139a7d2019-08-07 12:07:20 -07001995 unsigned int *slot_offset = NULL;
1996 struct tdm_dev_config *config = NULL;
Vignesh Kulothungan0d196602019-11-26 16:51:55 -08001997 struct msm_asoc_mach_data *pdata = NULL;
1998 struct snd_soc_component *component = NULL;
Vignesh Kulothungan2139a7d2019-08-07 12:07:20 -07001999
2000 if (interface < 0 || interface >= (TDM_INTERFACE_MAX * MAX_PATH)) {
2001 pr_err("%s: incorrect interface = %d\n", __func__, interface);
2002 return -EINVAL;
2003 }
2004 if (channel < 0 || channel >= TDM_PORT_MAX) {
2005 pr_err("%s: incorrect channel = %d\n", __func__, channel);
2006 return -EINVAL;
2007 }
2008
2009 pr_debug("%s: interface = %d, channel = %d\n", __func__,
2010 interface, channel);
2011
Vignesh Kulothungan0d196602019-11-26 16:51:55 -08002012 component = snd_soc_kcontrol_component(kcontrol);
2013 pdata = snd_soc_card_get_drvdata(component->card);
Vignesh Kulothungan2139a7d2019-08-07 12:07:20 -07002014 config = ((struct tdm_dev_config *) tdm_cfg[interface / MAX_PATH]) +
2015 ((interface % MAX_PATH) * TDM_PORT_MAX) + channel;
Vignesh Kulothungan0d196602019-11-26 16:51:55 -08002016 if (!config) {
2017 pr_err("%s: tdm config is NULL\n", __func__);
2018 return -EINVAL;
2019 }
Vignesh Kulothungan2139a7d2019-08-07 12:07:20 -07002020
Vignesh Kulothungan0d196602019-11-26 16:51:55 -08002021 slot_offset = config->tdm_slot_offset;
2022 if (!slot_offset) {
2023 pr_err("%s: slot offset is NULL\n", __func__);
2024 return -EINVAL;
2025 }
2026
2027 max_slot_offset = TDM_SLOT_WIDTH_BYTES * (pdata->tdm_max_slots - 1);
2028
2029 for (slot_index = 0; slot_index < pdata->tdm_max_slots; slot_index++) {
Vignesh Kulothungan2139a7d2019-08-07 12:07:20 -07002030 offset_val = ucontrol->value.integer.value[MAX_PATH +
2031 slot_index];
Vignesh Kulothungan0d196602019-11-26 16:51:55 -08002032 /* Offset value can only be 0, 4, 8, .. */
2033 if (offset_val % 4 == 0 && offset_val <= max_slot_offset)
Vignesh Kulothungan2139a7d2019-08-07 12:07:20 -07002034 slot_offset[slot_index] = offset_val;
2035 pr_debug("%s: slot offset[%d] = %d\n", __func__,
2036 slot_index, slot_offset[slot_index]);
2037 }
2038
2039 return 0;
2040}
2041
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07002042static int aux_pcm_get_port_idx(struct snd_kcontrol *kcontrol)
2043{
2044 int idx = 0;
2045
2046 if (strnstr(kcontrol->id.name, "PRIM_AUX_PCM",
2047 sizeof("PRIM_AUX_PCM"))) {
2048 idx = PRIM_AUX_PCM;
2049 } else if (strnstr(kcontrol->id.name, "SEC_AUX_PCM",
2050 sizeof("SEC_AUX_PCM"))) {
2051 idx = SEC_AUX_PCM;
2052 } else if (strnstr(kcontrol->id.name, "TERT_AUX_PCM",
2053 sizeof("TERT_AUX_PCM"))) {
2054 idx = TERT_AUX_PCM;
Karthikeyan Mani12dcf642019-01-29 11:21:15 -08002055 } else if (strnstr(kcontrol->id.name, "QUAT_AUX_PCM",
2056 sizeof("QUAT_AUX_PCM"))) {
2057 idx = QUAT_AUX_PCM;
2058 } else if (strnstr(kcontrol->id.name, "QUIN_AUX_PCM",
2059 sizeof("QUIN_AUX_PCM"))) {
2060 idx = QUIN_AUX_PCM;
2061 } else if (strnstr(kcontrol->id.name, "SEN_AUX_PCM",
2062 sizeof("SEN_AUX_PCM"))) {
2063 idx = SEN_AUX_PCM;
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07002064 } else {
2065 pr_err("%s: unsupported port: %s\n",
2066 __func__, kcontrol->id.name);
2067 idx = -EINVAL;
2068 }
2069
2070 return idx;
2071}
2072
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -07002073static int aux_pcm_get_sample_rate(int value)
2074{
2075 int sample_rate = 0;
2076
2077 switch (value) {
2078 case 1:
2079 sample_rate = SAMPLING_RATE_16KHZ;
2080 break;
2081 case 0:
2082 default:
2083 sample_rate = SAMPLING_RATE_8KHZ;
2084 break;
2085 }
2086 return sample_rate;
2087}
2088
2089static int aux_pcm_get_sample_rate_val(int sample_rate)
2090{
2091 int sample_rate_val = 0;
2092
2093 switch (sample_rate) {
2094 case SAMPLING_RATE_16KHZ:
2095 sample_rate_val = 1;
2096 break;
2097 case SAMPLING_RATE_8KHZ:
2098 default:
2099 sample_rate_val = 0;
2100 break;
2101 }
2102 return sample_rate_val;
2103}
2104
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07002105static int mi2s_auxpcm_get_format(int value)
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -07002106{
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07002107 int format = 0;
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -07002108
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07002109 switch (value) {
2110 case 0:
2111 format = SNDRV_PCM_FORMAT_S16_LE;
2112 break;
2113 case 1:
2114 format = SNDRV_PCM_FORMAT_S24_LE;
2115 break;
2116 case 2:
2117 format = SNDRV_PCM_FORMAT_S24_3LE;
2118 break;
2119 case 3:
2120 format = SNDRV_PCM_FORMAT_S32_LE;
2121 break;
2122 default:
2123 format = SNDRV_PCM_FORMAT_S16_LE;
2124 break;
2125 }
2126 return format;
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -07002127}
2128
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07002129static int mi2s_auxpcm_get_format_value(int format)
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -07002130{
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07002131 int value = 0;
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -07002132
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07002133 switch (format) {
2134 case SNDRV_PCM_FORMAT_S16_LE:
2135 value = 0;
2136 break;
2137 case SNDRV_PCM_FORMAT_S24_LE:
2138 value = 1;
2139 break;
2140 case SNDRV_PCM_FORMAT_S24_3LE:
2141 value = 2;
2142 break;
2143 case SNDRV_PCM_FORMAT_S32_LE:
2144 value = 3;
2145 break;
2146 default:
2147 value = 0;
2148 break;
2149 }
2150 return value;
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -07002151}
2152
2153static int aux_pcm_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
2154 struct snd_ctl_elem_value *ucontrol)
2155{
2156 int idx = aux_pcm_get_port_idx(kcontrol);
2157
2158 if (idx < 0)
2159 return idx;
2160
2161 ucontrol->value.enumerated.item[0] =
2162 aux_pcm_get_sample_rate_val(aux_pcm_rx_cfg[idx].sample_rate);
2163
2164 pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
2165 idx, aux_pcm_rx_cfg[idx].sample_rate,
2166 ucontrol->value.enumerated.item[0]);
2167
2168 return 0;
2169}
2170
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07002171static int aux_pcm_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -07002172 struct snd_ctl_elem_value *ucontrol)
2173{
2174 int idx = aux_pcm_get_port_idx(kcontrol);
2175
2176 if (idx < 0)
2177 return idx;
2178
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07002179 aux_pcm_rx_cfg[idx].sample_rate =
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -07002180 aux_pcm_get_sample_rate(ucontrol->value.enumerated.item[0]);
2181
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07002182 pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
2183 idx, aux_pcm_rx_cfg[idx].sample_rate,
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -07002184 ucontrol->value.enumerated.item[0]);
2185
2186 return 0;
2187}
2188
2189static int aux_pcm_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
2190 struct snd_ctl_elem_value *ucontrol)
2191{
2192 int idx = aux_pcm_get_port_idx(kcontrol);
2193
2194 if (idx < 0)
2195 return idx;
2196
2197 ucontrol->value.enumerated.item[0] =
2198 aux_pcm_get_sample_rate_val(aux_pcm_tx_cfg[idx].sample_rate);
2199
2200 pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
2201 idx, aux_pcm_tx_cfg[idx].sample_rate,
2202 ucontrol->value.enumerated.item[0]);
2203
2204 return 0;
2205}
2206
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07002207static int aux_pcm_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
2208 struct snd_ctl_elem_value *ucontrol)
2209{
2210 int idx = aux_pcm_get_port_idx(kcontrol);
2211
2212 if (idx < 0)
2213 return idx;
2214
2215 aux_pcm_tx_cfg[idx].sample_rate =
2216 aux_pcm_get_sample_rate(ucontrol->value.enumerated.item[0]);
2217
2218 pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
2219 idx, aux_pcm_tx_cfg[idx].sample_rate,
2220 ucontrol->value.enumerated.item[0]);
2221
2222 return 0;
2223}
2224
2225static int msm_aux_pcm_rx_format_get(struct snd_kcontrol *kcontrol,
2226 struct snd_ctl_elem_value *ucontrol)
2227{
2228 int idx = aux_pcm_get_port_idx(kcontrol);
2229
2230 if (idx < 0)
2231 return idx;
2232
2233 ucontrol->value.enumerated.item[0] =
2234 mi2s_auxpcm_get_format_value(aux_pcm_rx_cfg[idx].bit_format);
2235
2236 pr_debug("%s: idx[%d]_rx_format = %d, item = %d\n", __func__,
2237 idx, aux_pcm_rx_cfg[idx].bit_format,
2238 ucontrol->value.enumerated.item[0]);
2239
2240 return 0;
2241}
2242
2243static int msm_aux_pcm_rx_format_put(struct snd_kcontrol *kcontrol,
2244 struct snd_ctl_elem_value *ucontrol)
2245{
2246 int idx = aux_pcm_get_port_idx(kcontrol);
2247
2248 if (idx < 0)
2249 return idx;
2250
2251 aux_pcm_rx_cfg[idx].bit_format =
2252 mi2s_auxpcm_get_format(ucontrol->value.enumerated.item[0]);
2253
2254 pr_debug("%s: idx[%d]_rx_format = %d, item = %d\n", __func__,
2255 idx, aux_pcm_rx_cfg[idx].bit_format,
2256 ucontrol->value.enumerated.item[0]);
2257
2258 return 0;
2259}
2260
2261static int msm_aux_pcm_tx_format_get(struct snd_kcontrol *kcontrol,
2262 struct snd_ctl_elem_value *ucontrol)
2263{
2264 int idx = aux_pcm_get_port_idx(kcontrol);
2265
2266 if (idx < 0)
2267 return idx;
2268
2269 ucontrol->value.enumerated.item[0] =
2270 mi2s_auxpcm_get_format_value(aux_pcm_tx_cfg[idx].bit_format);
2271
2272 pr_debug("%s: idx[%d]_tx_format = %d, item = %d\n", __func__,
2273 idx, aux_pcm_tx_cfg[idx].bit_format,
2274 ucontrol->value.enumerated.item[0]);
2275
2276 return 0;
2277}
2278
2279static int msm_aux_pcm_tx_format_put(struct snd_kcontrol *kcontrol,
2280 struct snd_ctl_elem_value *ucontrol)
2281{
2282 int idx = aux_pcm_get_port_idx(kcontrol);
2283
2284 if (idx < 0)
2285 return idx;
2286
2287 aux_pcm_tx_cfg[idx].bit_format =
2288 mi2s_auxpcm_get_format(ucontrol->value.enumerated.item[0]);
2289
2290 pr_debug("%s: idx[%d]_tx_format = %d, item = %d\n", __func__,
2291 idx, aux_pcm_tx_cfg[idx].bit_format,
2292 ucontrol->value.enumerated.item[0]);
2293
2294 return 0;
2295}
2296
2297static int mi2s_get_port_idx(struct snd_kcontrol *kcontrol)
2298{
2299 int idx = 0;
2300
2301 if (strnstr(kcontrol->id.name, "PRIM_MI2S_RX",
2302 sizeof("PRIM_MI2S_RX"))) {
2303 idx = PRIM_MI2S;
2304 } else if (strnstr(kcontrol->id.name, "SEC_MI2S_RX",
2305 sizeof("SEC_MI2S_RX"))) {
2306 idx = SEC_MI2S;
2307 } else if (strnstr(kcontrol->id.name, "TERT_MI2S_RX",
2308 sizeof("TERT_MI2S_RX"))) {
2309 idx = TERT_MI2S;
Karthikeyan Mani12dcf642019-01-29 11:21:15 -08002310 } else if (strnstr(kcontrol->id.name, "QUAT_MI2S_RX",
2311 sizeof("QUAT_MI2S_RX"))) {
2312 idx = QUAT_MI2S;
2313 } else if (strnstr(kcontrol->id.name, "QUIN_MI2S_RX",
2314 sizeof("QUIN_MI2S_RX"))) {
2315 idx = QUIN_MI2S;
2316 } else if (strnstr(kcontrol->id.name, "SEN_MI2S_RX",
2317 sizeof("SEN_MI2S_RX"))) {
2318 idx = SEN_MI2S;
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07002319 } else if (strnstr(kcontrol->id.name, "PRIM_MI2S_TX",
2320 sizeof("PRIM_MI2S_TX"))) {
2321 idx = PRIM_MI2S;
2322 } else if (strnstr(kcontrol->id.name, "SEC_MI2S_TX",
2323 sizeof("SEC_MI2S_TX"))) {
2324 idx = SEC_MI2S;
2325 } else if (strnstr(kcontrol->id.name, "TERT_MI2S_TX",
2326 sizeof("TERT_MI2S_TX"))) {
2327 idx = TERT_MI2S;
Karthikeyan Mani12dcf642019-01-29 11:21:15 -08002328 } else if (strnstr(kcontrol->id.name, "QUAT_MI2S_TX",
2329 sizeof("QUAT_MI2S_TX"))) {
2330 idx = QUAT_MI2S;
2331 } else if (strnstr(kcontrol->id.name, "QUIN_MI2S_TX",
2332 sizeof("QUIN_MI2S_TX"))) {
2333 idx = QUIN_MI2S;
2334 } else if (strnstr(kcontrol->id.name, "SEN_MI2S_TX",
2335 sizeof("SEN_MI2S_TX"))) {
2336 idx = SEN_MI2S;
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07002337 } else {
2338 pr_err("%s: unsupported channel: %s\n",
2339 __func__, kcontrol->id.name);
2340 idx = -EINVAL;
2341 }
2342
2343 return idx;
2344}
2345
2346static int mi2s_get_sample_rate(int value)
2347{
2348 int sample_rate = 0;
2349
2350 switch (value) {
2351 case 0:
2352 sample_rate = SAMPLING_RATE_8KHZ;
2353 break;
2354 case 1:
2355 sample_rate = SAMPLING_RATE_11P025KHZ;
2356 break;
2357 case 2:
2358 sample_rate = SAMPLING_RATE_16KHZ;
2359 break;
2360 case 3:
2361 sample_rate = SAMPLING_RATE_22P05KHZ;
2362 break;
2363 case 4:
2364 sample_rate = SAMPLING_RATE_32KHZ;
2365 break;
2366 case 5:
2367 sample_rate = SAMPLING_RATE_44P1KHZ;
2368 break;
2369 case 6:
2370 sample_rate = SAMPLING_RATE_48KHZ;
2371 break;
2372 case 7:
Karthikeyan Mani1a9d7502019-09-23 21:00:20 -07002373 sample_rate = SAMPLING_RATE_88P2KHZ;
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07002374 break;
2375 case 8:
Karthikeyan Mani1a9d7502019-09-23 21:00:20 -07002376 sample_rate = SAMPLING_RATE_96KHZ;
2377 break;
2378 case 9:
2379 sample_rate = SAMPLING_RATE_176P4KHZ;
2380 break;
2381 case 10:
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07002382 sample_rate = SAMPLING_RATE_192KHZ;
2383 break;
Karthikeyan Mani1a9d7502019-09-23 21:00:20 -07002384 case 11:
2385 sample_rate = SAMPLING_RATE_352P8KHZ;
2386 break;
2387 case 12:
2388 sample_rate = SAMPLING_RATE_384KHZ;
2389 break;
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07002390 default:
2391 sample_rate = SAMPLING_RATE_48KHZ;
2392 break;
2393 }
2394 return sample_rate;
2395}
2396
2397static int mi2s_get_sample_rate_val(int sample_rate)
2398{
2399 int sample_rate_val = 0;
2400
2401 switch (sample_rate) {
2402 case SAMPLING_RATE_8KHZ:
2403 sample_rate_val = 0;
2404 break;
2405 case SAMPLING_RATE_11P025KHZ:
2406 sample_rate_val = 1;
2407 break;
2408 case SAMPLING_RATE_16KHZ:
2409 sample_rate_val = 2;
2410 break;
2411 case SAMPLING_RATE_22P05KHZ:
2412 sample_rate_val = 3;
2413 break;
2414 case SAMPLING_RATE_32KHZ:
2415 sample_rate_val = 4;
2416 break;
2417 case SAMPLING_RATE_44P1KHZ:
2418 sample_rate_val = 5;
2419 break;
2420 case SAMPLING_RATE_48KHZ:
2421 sample_rate_val = 6;
2422 break;
Karthikeyan Mani1a9d7502019-09-23 21:00:20 -07002423 case SAMPLING_RATE_88P2KHZ:
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07002424 sample_rate_val = 7;
2425 break;
Karthikeyan Mani1a9d7502019-09-23 21:00:20 -07002426 case SAMPLING_RATE_96KHZ:
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07002427 sample_rate_val = 8;
2428 break;
Karthikeyan Mani1a9d7502019-09-23 21:00:20 -07002429 case SAMPLING_RATE_176P4KHZ:
2430 sample_rate_val = 9;
2431 break;
2432 case SAMPLING_RATE_192KHZ:
2433 sample_rate_val = 10;
2434 break;
2435 case SAMPLING_RATE_352P8KHZ:
2436 sample_rate_val = 11;
2437 break;
2438 case SAMPLING_RATE_384KHZ:
2439 sample_rate_val = 12;
2440 break;
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07002441 default:
2442 sample_rate_val = 6;
2443 break;
2444 }
2445 return sample_rate_val;
2446}
2447
2448static int mi2s_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
2449 struct snd_ctl_elem_value *ucontrol)
2450{
2451 int idx = mi2s_get_port_idx(kcontrol);
2452
2453 if (idx < 0)
2454 return idx;
2455
2456 ucontrol->value.enumerated.item[0] =
2457 mi2s_get_sample_rate_val(mi2s_rx_cfg[idx].sample_rate);
2458
2459 pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
2460 idx, mi2s_rx_cfg[idx].sample_rate,
2461 ucontrol->value.enumerated.item[0]);
2462
2463 return 0;
2464}
2465
2466static int mi2s_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
2467 struct snd_ctl_elem_value *ucontrol)
2468{
2469 int idx = mi2s_get_port_idx(kcontrol);
2470
2471 if (idx < 0)
2472 return idx;
2473
2474 mi2s_rx_cfg[idx].sample_rate =
2475 mi2s_get_sample_rate(ucontrol->value.enumerated.item[0]);
2476
2477 pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
2478 idx, mi2s_rx_cfg[idx].sample_rate,
2479 ucontrol->value.enumerated.item[0]);
2480
2481 return 0;
2482}
2483
2484static int mi2s_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
2485 struct snd_ctl_elem_value *ucontrol)
2486{
2487 int idx = mi2s_get_port_idx(kcontrol);
2488
2489 if (idx < 0)
2490 return idx;
2491
2492 ucontrol->value.enumerated.item[0] =
2493 mi2s_get_sample_rate_val(mi2s_tx_cfg[idx].sample_rate);
2494
2495 pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
2496 idx, mi2s_tx_cfg[idx].sample_rate,
2497 ucontrol->value.enumerated.item[0]);
2498
2499 return 0;
2500}
2501
2502static int mi2s_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
2503 struct snd_ctl_elem_value *ucontrol)
2504{
2505 int idx = mi2s_get_port_idx(kcontrol);
2506
2507 if (idx < 0)
2508 return idx;
2509
2510 mi2s_tx_cfg[idx].sample_rate =
2511 mi2s_get_sample_rate(ucontrol->value.enumerated.item[0]);
2512
2513 pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
2514 idx, mi2s_tx_cfg[idx].sample_rate,
2515 ucontrol->value.enumerated.item[0]);
2516
2517 return 0;
2518}
2519
2520static int msm_mi2s_rx_format_get(struct snd_kcontrol *kcontrol,
2521 struct snd_ctl_elem_value *ucontrol)
2522{
2523 int idx = mi2s_get_port_idx(kcontrol);
2524
2525 if (idx < 0)
2526 return idx;
2527
2528 ucontrol->value.enumerated.item[0] =
2529 mi2s_auxpcm_get_format_value(mi2s_rx_cfg[idx].bit_format);
2530
2531 pr_debug("%s: idx[%d]_rx_format = %d, item = %d\n", __func__,
2532 idx, mi2s_rx_cfg[idx].bit_format,
2533 ucontrol->value.enumerated.item[0]);
2534
2535 return 0;
2536}
2537
2538static int msm_mi2s_rx_format_put(struct snd_kcontrol *kcontrol,
2539 struct snd_ctl_elem_value *ucontrol)
2540{
2541 int idx = mi2s_get_port_idx(kcontrol);
2542
2543 if (idx < 0)
2544 return idx;
2545
2546 mi2s_rx_cfg[idx].bit_format =
2547 mi2s_auxpcm_get_format(ucontrol->value.enumerated.item[0]);
2548
2549 pr_debug("%s: idx[%d]_rx_format = %d, item = %d\n", __func__,
2550 idx, mi2s_rx_cfg[idx].bit_format,
2551 ucontrol->value.enumerated.item[0]);
2552
2553 return 0;
2554}
2555
2556static int msm_mi2s_tx_format_get(struct snd_kcontrol *kcontrol,
2557 struct snd_ctl_elem_value *ucontrol)
2558{
2559 int idx = mi2s_get_port_idx(kcontrol);
2560
2561 if (idx < 0)
2562 return idx;
2563
2564 ucontrol->value.enumerated.item[0] =
2565 mi2s_auxpcm_get_format_value(mi2s_tx_cfg[idx].bit_format);
2566
2567 pr_debug("%s: idx[%d]_tx_format = %d, item = %d\n", __func__,
2568 idx, mi2s_tx_cfg[idx].bit_format,
2569 ucontrol->value.enumerated.item[0]);
2570
2571 return 0;
2572}
2573
2574static int msm_mi2s_tx_format_put(struct snd_kcontrol *kcontrol,
2575 struct snd_ctl_elem_value *ucontrol)
2576{
2577 int idx = mi2s_get_port_idx(kcontrol);
2578
2579 if (idx < 0)
2580 return idx;
2581
2582 mi2s_tx_cfg[idx].bit_format =
2583 mi2s_auxpcm_get_format(ucontrol->value.enumerated.item[0]);
2584
2585 pr_debug("%s: idx[%d]_tx_format = %d, item = %d\n", __func__,
2586 idx, mi2s_tx_cfg[idx].bit_format,
2587 ucontrol->value.enumerated.item[0]);
2588
2589 return 0;
2590}
2591static int msm_mi2s_rx_ch_get(struct snd_kcontrol *kcontrol,
2592 struct snd_ctl_elem_value *ucontrol)
2593{
2594 int idx = mi2s_get_port_idx(kcontrol);
2595
2596 if (idx < 0)
2597 return idx;
2598
2599 pr_debug("%s: msm_mi2s_[%d]_rx_ch = %d\n", __func__,
2600 idx, mi2s_rx_cfg[idx].channels);
2601 ucontrol->value.enumerated.item[0] = mi2s_rx_cfg[idx].channels - 1;
2602
2603 return 0;
2604}
2605
2606static int msm_mi2s_rx_ch_put(struct snd_kcontrol *kcontrol,
2607 struct snd_ctl_elem_value *ucontrol)
2608{
2609 int idx = mi2s_get_port_idx(kcontrol);
2610
2611 if (idx < 0)
2612 return idx;
2613
2614 mi2s_rx_cfg[idx].channels = ucontrol->value.enumerated.item[0] + 1;
2615 pr_debug("%s: msm_mi2s_[%d]_rx_ch = %d\n", __func__,
2616 idx, mi2s_rx_cfg[idx].channels);
2617
2618 return 1;
2619}
2620
2621static int msm_mi2s_tx_ch_get(struct snd_kcontrol *kcontrol,
2622 struct snd_ctl_elem_value *ucontrol)
2623{
2624 int idx = mi2s_get_port_idx(kcontrol);
2625
2626 if (idx < 0)
2627 return idx;
2628
2629 pr_debug("%s: msm_mi2s_[%d]_tx_ch = %d\n", __func__,
2630 idx, mi2s_tx_cfg[idx].channels);
2631 ucontrol->value.enumerated.item[0] = mi2s_tx_cfg[idx].channels - 1;
2632
2633 return 0;
2634}
2635
2636static int msm_mi2s_tx_ch_put(struct snd_kcontrol *kcontrol,
2637 struct snd_ctl_elem_value *ucontrol)
2638{
2639 int idx = mi2s_get_port_idx(kcontrol);
2640
2641 if (idx < 0)
2642 return idx;
2643
2644 mi2s_tx_cfg[idx].channels = ucontrol->value.enumerated.item[0] + 1;
2645 pr_debug("%s: msm_mi2s_[%d]_tx_ch = %d\n", __func__,
2646 idx, mi2s_tx_cfg[idx].channels);
2647
2648 return 1;
2649}
2650
2651static int msm_get_port_id(int be_id)
2652{
2653 int afe_port_id = 0;
2654
2655 switch (be_id) {
2656 case MSM_BACKEND_DAI_PRI_MI2S_RX:
2657 afe_port_id = AFE_PORT_ID_PRIMARY_MI2S_RX;
2658 break;
2659 case MSM_BACKEND_DAI_PRI_MI2S_TX:
2660 afe_port_id = AFE_PORT_ID_PRIMARY_MI2S_TX;
2661 break;
2662 case MSM_BACKEND_DAI_SECONDARY_MI2S_RX:
2663 afe_port_id = AFE_PORT_ID_SECONDARY_MI2S_RX;
2664 break;
2665 case MSM_BACKEND_DAI_SECONDARY_MI2S_TX:
2666 afe_port_id = AFE_PORT_ID_SECONDARY_MI2S_TX;
2667 break;
2668 case MSM_BACKEND_DAI_TERTIARY_MI2S_RX:
2669 afe_port_id = AFE_PORT_ID_TERTIARY_MI2S_RX;
2670 break;
2671 case MSM_BACKEND_DAI_TERTIARY_MI2S_TX:
2672 afe_port_id = AFE_PORT_ID_TERTIARY_MI2S_TX;
2673 break;
Karthikeyan Mani12dcf642019-01-29 11:21:15 -08002674 case MSM_BACKEND_DAI_QUATERNARY_MI2S_RX:
2675 afe_port_id = AFE_PORT_ID_QUATERNARY_MI2S_RX;
2676 break;
2677 case MSM_BACKEND_DAI_QUATERNARY_MI2S_TX:
2678 afe_port_id = AFE_PORT_ID_QUATERNARY_MI2S_TX;
2679 break;
2680 case MSM_BACKEND_DAI_QUINARY_MI2S_RX:
2681 afe_port_id = AFE_PORT_ID_QUINARY_MI2S_RX;
2682 break;
2683 case MSM_BACKEND_DAI_QUINARY_MI2S_TX:
2684 afe_port_id = AFE_PORT_ID_QUINARY_MI2S_TX;
2685 break;
2686 case MSM_BACKEND_DAI_SENARY_MI2S_RX:
2687 afe_port_id = AFE_PORT_ID_SENARY_MI2S_RX;
2688 break;
2689 case MSM_BACKEND_DAI_SENARY_MI2S_TX:
2690 afe_port_id = AFE_PORT_ID_SENARY_MI2S_TX;
2691 break;
Xiaoyu Yeffbdc9f2019-05-17 15:02:39 -07002692 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_0:
2693 afe_port_id = AFE_PORT_ID_VA_CODEC_DMA_TX_0;
2694 break;
2695 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_1:
2696 afe_port_id = AFE_PORT_ID_VA_CODEC_DMA_TX_1;
2697 break;
2698 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_2:
2699 afe_port_id = AFE_PORT_ID_VA_CODEC_DMA_TX_2;
2700 break;
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07002701 default:
2702 pr_err("%s: Invalid BE id: %d\n", __func__, be_id);
2703 afe_port_id = -EINVAL;
2704 }
2705
2706 return afe_port_id;
2707}
2708
2709static u32 get_mi2s_bits_per_sample(u32 bit_format)
2710{
2711 u32 bit_per_sample = 0;
2712
2713 switch (bit_format) {
2714 case SNDRV_PCM_FORMAT_S32_LE:
2715 case SNDRV_PCM_FORMAT_S24_3LE:
2716 case SNDRV_PCM_FORMAT_S24_LE:
2717 bit_per_sample = 32;
2718 break;
2719 case SNDRV_PCM_FORMAT_S16_LE:
2720 default:
2721 bit_per_sample = 16;
2722 break;
2723 }
2724
2725 return bit_per_sample;
2726}
2727
2728static void update_mi2s_clk_val(int dai_id, int stream)
2729{
2730 u32 bit_per_sample = 0;
2731
2732 if (stream == SNDRV_PCM_STREAM_PLAYBACK) {
2733 bit_per_sample =
2734 get_mi2s_bits_per_sample(mi2s_rx_cfg[dai_id].bit_format);
2735 mi2s_clk[dai_id].clk_freq_in_hz =
2736 mi2s_rx_cfg[dai_id].sample_rate * 2 * bit_per_sample;
2737 } else {
2738 bit_per_sample =
2739 get_mi2s_bits_per_sample(mi2s_tx_cfg[dai_id].bit_format);
2740 mi2s_clk[dai_id].clk_freq_in_hz =
2741 mi2s_tx_cfg[dai_id].sample_rate * 2 * bit_per_sample;
2742 }
2743}
2744
2745static int msm_mi2s_set_sclk(struct snd_pcm_substream *substream, bool enable)
2746{
2747 int ret = 0;
2748 struct snd_soc_pcm_runtime *rtd = substream->private_data;
2749 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
2750 int port_id = 0;
2751 int index = cpu_dai->id;
2752
2753 port_id = msm_get_port_id(rtd->dai_link->id);
2754 if (port_id < 0) {
2755 dev_err(rtd->card->dev, "%s: Invalid port_id\n", __func__);
2756 ret = port_id;
2757 goto err;
2758 }
2759
2760 if (enable) {
2761 update_mi2s_clk_val(index, substream->stream);
2762 dev_dbg(rtd->card->dev, "%s: clock rate %ul\n", __func__,
2763 mi2s_clk[index].clk_freq_in_hz);
2764 }
2765
2766 mi2s_clk[index].enable = enable;
2767 ret = afe_set_lpass_clock_v2(port_id,
2768 &mi2s_clk[index]);
2769 if (ret < 0) {
2770 dev_err(rtd->card->dev,
2771 "%s: afe lpass clock failed for port 0x%x , err:%d\n",
2772 __func__, port_id, ret);
2773 goto err;
2774 }
2775
2776err:
2777 return ret;
2778}
2779
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07002780static int cdc_dma_get_port_idx(struct snd_kcontrol *kcontrol)
2781{
2782 int idx = 0;
2783
2784 if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_RX_0",
2785 sizeof("WSA_CDC_DMA_RX_0")))
2786 idx = WSA_CDC_DMA_RX_0;
2787 else if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_RX_1",
2788 sizeof("WSA_CDC_DMA_RX_0")))
2789 idx = WSA_CDC_DMA_RX_1;
2790 else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_0",
2791 sizeof("RX_CDC_DMA_RX_0")))
2792 idx = RX_CDC_DMA_RX_0;
2793 else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_1",
2794 sizeof("RX_CDC_DMA_RX_1")))
2795 idx = RX_CDC_DMA_RX_1;
2796 else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_2",
2797 sizeof("RX_CDC_DMA_RX_2")))
2798 idx = RX_CDC_DMA_RX_2;
2799 else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_3",
2800 sizeof("RX_CDC_DMA_RX_3")))
2801 idx = RX_CDC_DMA_RX_3;
2802 else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_5",
2803 sizeof("RX_CDC_DMA_RX_5")))
2804 idx = RX_CDC_DMA_RX_5;
2805 else if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_TX_0",
2806 sizeof("WSA_CDC_DMA_TX_0")))
2807 idx = WSA_CDC_DMA_TX_0;
2808 else if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_TX_1",
2809 sizeof("WSA_CDC_DMA_TX_1")))
2810 idx = WSA_CDC_DMA_TX_1;
2811 else if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_TX_2",
2812 sizeof("WSA_CDC_DMA_TX_2")))
2813 idx = WSA_CDC_DMA_TX_2;
2814 else if (strnstr(kcontrol->id.name, "TX_CDC_DMA_TX_0",
2815 sizeof("TX_CDC_DMA_TX_0")))
2816 idx = TX_CDC_DMA_TX_0;
2817 else if (strnstr(kcontrol->id.name, "TX_CDC_DMA_TX_3",
2818 sizeof("TX_CDC_DMA_TX_3")))
2819 idx = TX_CDC_DMA_TX_3;
2820 else if (strnstr(kcontrol->id.name, "TX_CDC_DMA_TX_4",
2821 sizeof("TX_CDC_DMA_TX_4")))
2822 idx = TX_CDC_DMA_TX_4;
Xiaoyu Ye2228bf02018-12-12 15:47:20 -08002823 else if (strnstr(kcontrol->id.name, "VA_CDC_DMA_TX_0",
2824 sizeof("VA_CDC_DMA_TX_0")))
2825 idx = VA_CDC_DMA_TX_0;
2826 else if (strnstr(kcontrol->id.name, "VA_CDC_DMA_TX_1",
2827 sizeof("VA_CDC_DMA_TX_1")))
2828 idx = VA_CDC_DMA_TX_1;
2829 else if (strnstr(kcontrol->id.name, "VA_CDC_DMA_TX_2",
2830 sizeof("VA_CDC_DMA_TX_2")))
2831 idx = VA_CDC_DMA_TX_2;
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07002832 else {
2833 pr_err("%s: unsupported channel: %s\n",
2834 __func__, kcontrol->id.name);
2835 return -EINVAL;
2836 }
2837
2838 return idx;
2839}
2840
2841static int cdc_dma_rx_ch_get(struct snd_kcontrol *kcontrol,
2842 struct snd_ctl_elem_value *ucontrol)
2843{
2844 int ch_num = cdc_dma_get_port_idx(kcontrol);
2845
Vignesh Kulothungan9e17da02019-03-21 12:15:59 -07002846 if (ch_num < 0 || ch_num >= CDC_DMA_RX_MAX) {
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07002847 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
2848 return ch_num;
2849 }
2850
2851 pr_debug("%s: cdc_dma_rx_ch = %d\n", __func__,
2852 cdc_dma_rx_cfg[ch_num].channels - 1);
2853 ucontrol->value.integer.value[0] = cdc_dma_rx_cfg[ch_num].channels - 1;
2854 return 0;
2855}
2856
2857static int cdc_dma_rx_ch_put(struct snd_kcontrol *kcontrol,
2858 struct snd_ctl_elem_value *ucontrol)
2859{
2860 int ch_num = cdc_dma_get_port_idx(kcontrol);
2861
Vignesh Kulothungan9e17da02019-03-21 12:15:59 -07002862 if (ch_num < 0 || ch_num >= CDC_DMA_RX_MAX) {
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07002863 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
2864 return ch_num;
2865 }
2866
2867 cdc_dma_rx_cfg[ch_num].channels = ucontrol->value.integer.value[0] + 1;
2868
2869 pr_debug("%s: cdc_dma_rx_ch = %d\n", __func__,
2870 cdc_dma_rx_cfg[ch_num].channels);
2871 return 1;
2872}
2873
2874static int cdc_dma_rx_format_get(struct snd_kcontrol *kcontrol,
2875 struct snd_ctl_elem_value *ucontrol)
2876{
2877 int ch_num = cdc_dma_get_port_idx(kcontrol);
2878
Vignesh Kulothungan9e17da02019-03-21 12:15:59 -07002879 if (ch_num < 0 || ch_num >= CDC_DMA_RX_MAX) {
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07002880 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
2881 return ch_num;
2882 }
2883
2884 switch (cdc_dma_rx_cfg[ch_num].bit_format) {
2885 case SNDRV_PCM_FORMAT_S32_LE:
2886 ucontrol->value.integer.value[0] = 3;
2887 break;
2888 case SNDRV_PCM_FORMAT_S24_3LE:
2889 ucontrol->value.integer.value[0] = 2;
2890 break;
2891 case SNDRV_PCM_FORMAT_S24_LE:
2892 ucontrol->value.integer.value[0] = 1;
2893 break;
2894 case SNDRV_PCM_FORMAT_S16_LE:
2895 default:
2896 ucontrol->value.integer.value[0] = 0;
2897 break;
2898 }
2899
2900 pr_debug("%s: cdc_dma_rx_format = %d, ucontrol value = %ld\n",
2901 __func__, cdc_dma_rx_cfg[ch_num].bit_format,
2902 ucontrol->value.integer.value[0]);
2903 return 0;
2904}
2905
2906static int cdc_dma_rx_format_put(struct snd_kcontrol *kcontrol,
2907 struct snd_ctl_elem_value *ucontrol)
2908{
2909 int rc = 0;
2910 int ch_num = cdc_dma_get_port_idx(kcontrol);
2911
Vignesh Kulothungan9e17da02019-03-21 12:15:59 -07002912 if (ch_num < 0 || ch_num >= CDC_DMA_RX_MAX) {
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07002913 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
2914 return ch_num;
2915 }
2916
2917 switch (ucontrol->value.integer.value[0]) {
2918 case 3:
2919 cdc_dma_rx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S32_LE;
2920 break;
2921 case 2:
2922 cdc_dma_rx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S24_3LE;
2923 break;
2924 case 1:
2925 cdc_dma_rx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S24_LE;
2926 break;
2927 case 0:
2928 default:
2929 cdc_dma_rx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S16_LE;
2930 break;
2931 }
2932 pr_debug("%s: cdc_dma_rx_format = %d, ucontrol value = %ld\n",
2933 __func__, cdc_dma_rx_cfg[ch_num].bit_format,
2934 ucontrol->value.integer.value[0]);
2935
2936 return rc;
2937}
2938
2939
2940static int cdc_dma_get_sample_rate_val(int sample_rate)
2941{
2942 int sample_rate_val = 0;
2943
2944 switch (sample_rate) {
2945 case SAMPLING_RATE_8KHZ:
2946 sample_rate_val = 0;
2947 break;
2948 case SAMPLING_RATE_11P025KHZ:
2949 sample_rate_val = 1;
2950 break;
2951 case SAMPLING_RATE_16KHZ:
2952 sample_rate_val = 2;
2953 break;
2954 case SAMPLING_RATE_22P05KHZ:
2955 sample_rate_val = 3;
2956 break;
2957 case SAMPLING_RATE_32KHZ:
2958 sample_rate_val = 4;
2959 break;
2960 case SAMPLING_RATE_44P1KHZ:
2961 sample_rate_val = 5;
2962 break;
2963 case SAMPLING_RATE_48KHZ:
2964 sample_rate_val = 6;
2965 break;
2966 case SAMPLING_RATE_88P2KHZ:
2967 sample_rate_val = 7;
2968 break;
2969 case SAMPLING_RATE_96KHZ:
2970 sample_rate_val = 8;
2971 break;
2972 case SAMPLING_RATE_176P4KHZ:
2973 sample_rate_val = 9;
2974 break;
2975 case SAMPLING_RATE_192KHZ:
2976 sample_rate_val = 10;
2977 break;
2978 case SAMPLING_RATE_352P8KHZ:
2979 sample_rate_val = 11;
2980 break;
2981 case SAMPLING_RATE_384KHZ:
2982 sample_rate_val = 12;
2983 break;
2984 default:
2985 sample_rate_val = 6;
2986 break;
2987 }
2988 return sample_rate_val;
2989}
2990
2991static int cdc_dma_get_sample_rate(int value)
2992{
2993 int sample_rate = 0;
2994
2995 switch (value) {
2996 case 0:
2997 sample_rate = SAMPLING_RATE_8KHZ;
2998 break;
2999 case 1:
3000 sample_rate = SAMPLING_RATE_11P025KHZ;
3001 break;
3002 case 2:
3003 sample_rate = SAMPLING_RATE_16KHZ;
3004 break;
3005 case 3:
3006 sample_rate = SAMPLING_RATE_22P05KHZ;
3007 break;
3008 case 4:
3009 sample_rate = SAMPLING_RATE_32KHZ;
3010 break;
3011 case 5:
3012 sample_rate = SAMPLING_RATE_44P1KHZ;
3013 break;
3014 case 6:
3015 sample_rate = SAMPLING_RATE_48KHZ;
3016 break;
3017 case 7:
3018 sample_rate = SAMPLING_RATE_88P2KHZ;
3019 break;
3020 case 8:
3021 sample_rate = SAMPLING_RATE_96KHZ;
3022 break;
3023 case 9:
3024 sample_rate = SAMPLING_RATE_176P4KHZ;
3025 break;
3026 case 10:
3027 sample_rate = SAMPLING_RATE_192KHZ;
3028 break;
3029 case 11:
3030 sample_rate = SAMPLING_RATE_352P8KHZ;
3031 break;
3032 case 12:
3033 sample_rate = SAMPLING_RATE_384KHZ;
3034 break;
3035 default:
3036 sample_rate = SAMPLING_RATE_48KHZ;
3037 break;
3038 }
3039 return sample_rate;
3040}
3041
3042static int cdc_dma_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
3043 struct snd_ctl_elem_value *ucontrol)
3044{
3045 int ch_num = cdc_dma_get_port_idx(kcontrol);
3046
Vignesh Kulothungan9e17da02019-03-21 12:15:59 -07003047 if (ch_num < 0 || ch_num >= CDC_DMA_RX_MAX) {
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07003048 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
3049 return ch_num;
3050 }
3051
3052 ucontrol->value.enumerated.item[0] =
3053 cdc_dma_get_sample_rate_val(cdc_dma_rx_cfg[ch_num].sample_rate);
3054
3055 pr_debug("%s: cdc_dma_rx_sample_rate = %d\n", __func__,
3056 cdc_dma_rx_cfg[ch_num].sample_rate);
3057 return 0;
3058}
3059
3060static int cdc_dma_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
3061 struct snd_ctl_elem_value *ucontrol)
3062{
3063 int ch_num = cdc_dma_get_port_idx(kcontrol);
3064
Vignesh Kulothungan9e17da02019-03-21 12:15:59 -07003065 if (ch_num < 0 || ch_num >= CDC_DMA_RX_MAX) {
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07003066 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
3067 return ch_num;
3068 }
3069
3070 cdc_dma_rx_cfg[ch_num].sample_rate =
3071 cdc_dma_get_sample_rate(ucontrol->value.enumerated.item[0]);
3072
3073
3074 pr_debug("%s: control value = %d, cdc_dma_rx_sample_rate = %d\n",
3075 __func__, ucontrol->value.enumerated.item[0],
3076 cdc_dma_rx_cfg[ch_num].sample_rate);
3077 return 0;
3078}
3079
3080static int cdc_dma_tx_ch_get(struct snd_kcontrol *kcontrol,
3081 struct snd_ctl_elem_value *ucontrol)
3082{
3083 int ch_num = cdc_dma_get_port_idx(kcontrol);
3084
3085 if (ch_num < 0) {
3086 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
3087 return ch_num;
3088 }
3089
3090 pr_debug("%s: cdc_dma_tx_ch = %d\n", __func__,
3091 cdc_dma_tx_cfg[ch_num].channels);
3092 ucontrol->value.integer.value[0] = cdc_dma_tx_cfg[ch_num].channels - 1;
3093 return 0;
3094}
3095
3096static int cdc_dma_tx_ch_put(struct snd_kcontrol *kcontrol,
3097 struct snd_ctl_elem_value *ucontrol)
3098{
3099 int ch_num = cdc_dma_get_port_idx(kcontrol);
3100
3101 if (ch_num < 0) {
3102 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
3103 return ch_num;
3104 }
3105
3106 cdc_dma_tx_cfg[ch_num].channels = ucontrol->value.integer.value[0] + 1;
3107
3108 pr_debug("%s: cdc_dma_tx_ch = %d\n", __func__,
3109 cdc_dma_tx_cfg[ch_num].channels);
3110 return 1;
3111}
3112
3113static int cdc_dma_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
3114 struct snd_ctl_elem_value *ucontrol)
3115{
3116 int sample_rate_val;
3117 int ch_num = cdc_dma_get_port_idx(kcontrol);
3118
3119 if (ch_num < 0) {
3120 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
3121 return ch_num;
3122 }
3123
3124 switch (cdc_dma_tx_cfg[ch_num].sample_rate) {
3125 case SAMPLING_RATE_384KHZ:
3126 sample_rate_val = 12;
3127 break;
3128 case SAMPLING_RATE_352P8KHZ:
3129 sample_rate_val = 11;
3130 break;
3131 case SAMPLING_RATE_192KHZ:
3132 sample_rate_val = 10;
3133 break;
3134 case SAMPLING_RATE_176P4KHZ:
3135 sample_rate_val = 9;
3136 break;
3137 case SAMPLING_RATE_96KHZ:
3138 sample_rate_val = 8;
3139 break;
3140 case SAMPLING_RATE_88P2KHZ:
3141 sample_rate_val = 7;
3142 break;
3143 case SAMPLING_RATE_48KHZ:
3144 sample_rate_val = 6;
3145 break;
3146 case SAMPLING_RATE_44P1KHZ:
3147 sample_rate_val = 5;
3148 break;
3149 case SAMPLING_RATE_32KHZ:
3150 sample_rate_val = 4;
3151 break;
3152 case SAMPLING_RATE_22P05KHZ:
3153 sample_rate_val = 3;
3154 break;
3155 case SAMPLING_RATE_16KHZ:
3156 sample_rate_val = 2;
3157 break;
3158 case SAMPLING_RATE_11P025KHZ:
3159 sample_rate_val = 1;
3160 break;
3161 case SAMPLING_RATE_8KHZ:
3162 sample_rate_val = 0;
3163 break;
3164 default:
3165 sample_rate_val = 6;
3166 break;
3167 }
3168
3169 ucontrol->value.integer.value[0] = sample_rate_val;
3170 pr_debug("%s: cdc_dma_tx_sample_rate = %d\n", __func__,
3171 cdc_dma_tx_cfg[ch_num].sample_rate);
3172 return 0;
3173}
3174
3175static int cdc_dma_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
3176 struct snd_ctl_elem_value *ucontrol)
3177{
3178 int ch_num = cdc_dma_get_port_idx(kcontrol);
3179
3180 if (ch_num < 0) {
3181 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
3182 return ch_num;
3183 }
3184
3185 switch (ucontrol->value.integer.value[0]) {
3186 case 12:
3187 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_384KHZ;
3188 break;
3189 case 11:
3190 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_352P8KHZ;
3191 break;
3192 case 10:
3193 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_192KHZ;
3194 break;
3195 case 9:
3196 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_176P4KHZ;
3197 break;
3198 case 8:
3199 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_96KHZ;
3200 break;
3201 case 7:
3202 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_88P2KHZ;
3203 break;
3204 case 6:
3205 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_48KHZ;
3206 break;
3207 case 5:
3208 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_44P1KHZ;
3209 break;
3210 case 4:
3211 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_32KHZ;
3212 break;
3213 case 3:
3214 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_22P05KHZ;
3215 break;
3216 case 2:
3217 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_16KHZ;
3218 break;
3219 case 1:
3220 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_11P025KHZ;
3221 break;
3222 case 0:
3223 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_8KHZ;
3224 break;
3225 default:
3226 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_48KHZ;
3227 break;
3228 }
3229
3230 pr_debug("%s: control value = %ld, cdc_dma_tx_sample_rate = %d\n",
3231 __func__, ucontrol->value.integer.value[0],
3232 cdc_dma_tx_cfg[ch_num].sample_rate);
3233 return 0;
3234}
3235
3236static int cdc_dma_tx_format_get(struct snd_kcontrol *kcontrol,
3237 struct snd_ctl_elem_value *ucontrol)
3238{
3239 int ch_num = cdc_dma_get_port_idx(kcontrol);
3240
3241 if (ch_num < 0) {
3242 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
3243 return ch_num;
3244 }
3245
3246 switch (cdc_dma_tx_cfg[ch_num].bit_format) {
3247 case SNDRV_PCM_FORMAT_S32_LE:
3248 ucontrol->value.integer.value[0] = 3;
3249 break;
3250 case SNDRV_PCM_FORMAT_S24_3LE:
3251 ucontrol->value.integer.value[0] = 2;
3252 break;
3253 case SNDRV_PCM_FORMAT_S24_LE:
3254 ucontrol->value.integer.value[0] = 1;
3255 break;
3256 case SNDRV_PCM_FORMAT_S16_LE:
3257 default:
3258 ucontrol->value.integer.value[0] = 0;
3259 break;
3260 }
3261
3262 pr_debug("%s: cdc_dma_tx_format = %d, ucontrol value = %ld\n",
3263 __func__, cdc_dma_tx_cfg[ch_num].bit_format,
3264 ucontrol->value.integer.value[0]);
3265 return 0;
3266}
3267
3268static int cdc_dma_tx_format_put(struct snd_kcontrol *kcontrol,
3269 struct snd_ctl_elem_value *ucontrol)
3270{
3271 int rc = 0;
3272 int ch_num = cdc_dma_get_port_idx(kcontrol);
3273
3274 if (ch_num < 0) {
3275 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
3276 return ch_num;
3277 }
3278
3279 switch (ucontrol->value.integer.value[0]) {
3280 case 3:
3281 cdc_dma_tx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S32_LE;
3282 break;
3283 case 2:
3284 cdc_dma_tx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S24_3LE;
3285 break;
3286 case 1:
3287 cdc_dma_tx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S24_LE;
3288 break;
3289 case 0:
3290 default:
3291 cdc_dma_tx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S16_LE;
3292 break;
3293 }
3294 pr_debug("%s: cdc_dma_tx_format = %d, ucontrol value = %ld\n",
3295 __func__, cdc_dma_tx_cfg[ch_num].bit_format,
3296 ucontrol->value.integer.value[0]);
3297
3298 return rc;
3299}
3300
3301static int msm_cdc_dma_get_idx_from_beid(int32_t be_id)
3302{
3303 int idx = 0;
3304
3305 switch (be_id) {
3306 case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_0:
3307 idx = WSA_CDC_DMA_RX_0;
3308 break;
3309 case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_0:
3310 idx = WSA_CDC_DMA_TX_0;
3311 break;
3312 case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_1:
3313 idx = WSA_CDC_DMA_RX_1;
3314 break;
3315 case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_1:
3316 idx = WSA_CDC_DMA_TX_1;
3317 break;
3318 case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_2:
3319 idx = WSA_CDC_DMA_TX_2;
3320 break;
3321 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_0:
3322 idx = RX_CDC_DMA_RX_0;
3323 break;
3324 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_1:
3325 idx = RX_CDC_DMA_RX_1;
3326 break;
3327 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_2:
3328 idx = RX_CDC_DMA_RX_2;
3329 break;
3330 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_3:
3331 idx = RX_CDC_DMA_RX_3;
3332 break;
3333 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_5:
3334 idx = RX_CDC_DMA_RX_5;
3335 break;
3336 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_0:
3337 idx = TX_CDC_DMA_TX_0;
3338 break;
3339 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_3:
3340 idx = TX_CDC_DMA_TX_3;
3341 break;
3342 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_4:
3343 idx = TX_CDC_DMA_TX_4;
3344 break;
Xiaoyu Ye2228bf02018-12-12 15:47:20 -08003345 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_0:
3346 idx = VA_CDC_DMA_TX_0;
3347 break;
3348 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_1:
3349 idx = VA_CDC_DMA_TX_1;
3350 break;
3351 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_2:
3352 idx = VA_CDC_DMA_TX_2;
3353 break;
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07003354 default:
3355 idx = RX_CDC_DMA_RX_0;
3356 break;
3357 }
3358
3359 return idx;
3360}
3361
Banajit Goswami83a370d2019-03-05 16:15:21 -08003362static int msm_bt_sample_rate_get(struct snd_kcontrol *kcontrol,
3363 struct snd_ctl_elem_value *ucontrol)
3364{
3365 /*
3366 * Slimbus_7_Rx/Tx sample rate values should always be in sync (same)
3367 * when used for BT_SCO use case. Return either Rx or Tx sample rate
3368 * value.
3369 */
3370 switch (slim_rx_cfg[SLIM_RX_7].sample_rate) {
3371 case SAMPLING_RATE_96KHZ:
3372 ucontrol->value.integer.value[0] = 5;
3373 break;
3374 case SAMPLING_RATE_88P2KHZ:
3375 ucontrol->value.integer.value[0] = 4;
3376 break;
3377 case SAMPLING_RATE_48KHZ:
3378 ucontrol->value.integer.value[0] = 3;
3379 break;
3380 case SAMPLING_RATE_44P1KHZ:
3381 ucontrol->value.integer.value[0] = 2;
3382 break;
3383 case SAMPLING_RATE_16KHZ:
3384 ucontrol->value.integer.value[0] = 1;
3385 break;
3386 case SAMPLING_RATE_8KHZ:
3387 default:
3388 ucontrol->value.integer.value[0] = 0;
3389 break;
3390 }
3391 pr_debug("%s: sample rate = %d\n", __func__,
3392 slim_rx_cfg[SLIM_RX_7].sample_rate);
3393
3394 return 0;
3395}
3396
3397static int msm_bt_sample_rate_put(struct snd_kcontrol *kcontrol,
3398 struct snd_ctl_elem_value *ucontrol)
3399{
3400 switch (ucontrol->value.integer.value[0]) {
3401 case 1:
3402 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_16KHZ;
3403 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_16KHZ;
3404 break;
3405 case 2:
3406 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_44P1KHZ;
3407 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_44P1KHZ;
3408 break;
3409 case 3:
3410 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_48KHZ;
3411 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_48KHZ;
3412 break;
3413 case 4:
3414 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_88P2KHZ;
3415 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_88P2KHZ;
3416 break;
3417 case 5:
3418 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_96KHZ;
3419 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_96KHZ;
3420 break;
3421 case 0:
3422 default:
3423 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_8KHZ;
3424 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_8KHZ;
3425 break;
3426 }
3427 pr_debug("%s: sample rates: slim7_rx = %d, slim7_tx = %d, value = %d\n",
3428 __func__,
3429 slim_rx_cfg[SLIM_RX_7].sample_rate,
3430 slim_tx_cfg[SLIM_TX_7].sample_rate,
3431 ucontrol->value.enumerated.item[0]);
3432
3433 return 0;
3434}
3435
3436static int msm_bt_sample_rate_rx_get(struct snd_kcontrol *kcontrol,
3437 struct snd_ctl_elem_value *ucontrol)
3438{
3439 switch (slim_rx_cfg[SLIM_RX_7].sample_rate) {
3440 case SAMPLING_RATE_96KHZ:
3441 ucontrol->value.integer.value[0] = 5;
3442 break;
3443 case SAMPLING_RATE_88P2KHZ:
3444 ucontrol->value.integer.value[0] = 4;
3445 break;
3446 case SAMPLING_RATE_48KHZ:
3447 ucontrol->value.integer.value[0] = 3;
3448 break;
3449 case SAMPLING_RATE_44P1KHZ:
3450 ucontrol->value.integer.value[0] = 2;
3451 break;
3452 case SAMPLING_RATE_16KHZ:
3453 ucontrol->value.integer.value[0] = 1;
3454 break;
3455 case SAMPLING_RATE_8KHZ:
3456 default:
3457 ucontrol->value.integer.value[0] = 0;
3458 break;
3459 }
3460 pr_debug("%s: sample rate rx = %d\n", __func__,
3461 slim_rx_cfg[SLIM_RX_7].sample_rate);
3462
3463 return 0;
3464}
3465
3466static int msm_bt_sample_rate_rx_put(struct snd_kcontrol *kcontrol,
3467 struct snd_ctl_elem_value *ucontrol)
3468{
3469 switch (ucontrol->value.integer.value[0]) {
3470 case 1:
3471 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_16KHZ;
3472 break;
3473 case 2:
3474 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_44P1KHZ;
3475 break;
3476 case 3:
3477 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_48KHZ;
3478 break;
3479 case 4:
3480 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_88P2KHZ;
3481 break;
3482 case 5:
3483 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_96KHZ;
3484 break;
3485 case 0:
3486 default:
3487 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_8KHZ;
3488 break;
3489 }
3490 pr_debug("%s: sample rate: slim7_rx = %d, value = %d\n",
3491 __func__,
3492 slim_rx_cfg[SLIM_RX_7].sample_rate,
3493 ucontrol->value.enumerated.item[0]);
3494
3495 return 0;
3496}
3497
3498static int msm_bt_sample_rate_tx_get(struct snd_kcontrol *kcontrol,
3499 struct snd_ctl_elem_value *ucontrol)
3500{
3501 switch (slim_tx_cfg[SLIM_TX_7].sample_rate) {
3502 case SAMPLING_RATE_96KHZ:
3503 ucontrol->value.integer.value[0] = 5;
3504 break;
3505 case SAMPLING_RATE_88P2KHZ:
3506 ucontrol->value.integer.value[0] = 4;
3507 break;
3508 case SAMPLING_RATE_48KHZ:
3509 ucontrol->value.integer.value[0] = 3;
3510 break;
3511 case SAMPLING_RATE_44P1KHZ:
3512 ucontrol->value.integer.value[0] = 2;
3513 break;
3514 case SAMPLING_RATE_16KHZ:
3515 ucontrol->value.integer.value[0] = 1;
3516 break;
3517 case SAMPLING_RATE_8KHZ:
3518 default:
3519 ucontrol->value.integer.value[0] = 0;
3520 break;
3521 }
3522 pr_debug("%s: sample rate tx = %d\n", __func__,
3523 slim_tx_cfg[SLIM_TX_7].sample_rate);
3524
3525 return 0;
3526}
3527
3528static int msm_bt_sample_rate_tx_put(struct snd_kcontrol *kcontrol,
3529 struct snd_ctl_elem_value *ucontrol)
3530{
3531 switch (ucontrol->value.integer.value[0]) {
3532 case 1:
3533 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_16KHZ;
3534 break;
3535 case 2:
3536 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_44P1KHZ;
3537 break;
3538 case 3:
3539 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_48KHZ;
3540 break;
3541 case 4:
3542 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_88P2KHZ;
3543 break;
3544 case 5:
3545 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_96KHZ;
3546 break;
3547 case 0:
3548 default:
3549 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_8KHZ;
3550 break;
3551 }
3552 pr_debug("%s: sample rate: slim7_tx = %d, value = %d\n",
3553 __func__,
3554 slim_tx_cfg[SLIM_TX_7].sample_rate,
3555 ucontrol->value.enumerated.item[0]);
3556
3557 return 0;
3558}
3559
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07003560static const struct snd_kcontrol_new msm_int_snd_controls[] = {
3561 SOC_ENUM_EXT("WSA_CDC_DMA_RX_0 Channels", wsa_cdc_dma_rx_0_chs,
3562 cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
3563 SOC_ENUM_EXT("WSA_CDC_DMA_RX_1 Channels", wsa_cdc_dma_rx_1_chs,
3564 cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
3565 SOC_ENUM_EXT("RX_CDC_DMA_RX_0 Channels", rx_cdc_dma_rx_0_chs,
3566 cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
3567 SOC_ENUM_EXT("RX_CDC_DMA_RX_1 Channels", rx_cdc_dma_rx_1_chs,
3568 cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
3569 SOC_ENUM_EXT("RX_CDC_DMA_RX_2 Channels", rx_cdc_dma_rx_2_chs,
3570 cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
3571 SOC_ENUM_EXT("RX_CDC_DMA_RX_3 Channels", rx_cdc_dma_rx_3_chs,
3572 cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
3573 SOC_ENUM_EXT("RX_CDC_DMA_RX_5 Channels", rx_cdc_dma_rx_5_chs,
3574 cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
3575 SOC_ENUM_EXT("WSA_CDC_DMA_TX_0 Channels", wsa_cdc_dma_tx_0_chs,
3576 cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
3577 SOC_ENUM_EXT("WSA_CDC_DMA_TX_1 Channels", wsa_cdc_dma_tx_1_chs,
3578 cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
3579 SOC_ENUM_EXT("WSA_CDC_DMA_TX_2 Channels", wsa_cdc_dma_tx_2_chs,
3580 cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
3581 SOC_ENUM_EXT("TX_CDC_DMA_TX_0 Channels", tx_cdc_dma_tx_0_chs,
3582 cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
3583 SOC_ENUM_EXT("TX_CDC_DMA_TX_3 Channels", tx_cdc_dma_tx_3_chs,
3584 cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
3585 SOC_ENUM_EXT("TX_CDC_DMA_TX_4 Channels", tx_cdc_dma_tx_4_chs,
3586 cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
Xiaoyu Ye2228bf02018-12-12 15:47:20 -08003587 SOC_ENUM_EXT("VA_CDC_DMA_TX_0 Channels", va_cdc_dma_tx_0_chs,
3588 cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
3589 SOC_ENUM_EXT("VA_CDC_DMA_TX_1 Channels", va_cdc_dma_tx_1_chs,
3590 cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
3591 SOC_ENUM_EXT("VA_CDC_DMA_TX_2 Channels", va_cdc_dma_tx_2_chs,
3592 cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07003593 SOC_ENUM_EXT("WSA_CDC_DMA_RX_0 Format", wsa_cdc_dma_rx_0_format,
3594 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
3595 SOC_ENUM_EXT("WSA_CDC_DMA_RX_1 Format", wsa_cdc_dma_rx_1_format,
3596 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07003597 SOC_ENUM_EXT("WSA_CDC_DMA_TX_1 Format", wsa_cdc_dma_tx_1_format,
3598 cdc_dma_tx_format_get, cdc_dma_tx_format_put),
3599 SOC_ENUM_EXT("WSA_CDC_DMA_TX_2 Format", wsa_cdc_dma_tx_2_format,
3600 cdc_dma_tx_format_get, cdc_dma_tx_format_put),
3601 SOC_ENUM_EXT("TX_CDC_DMA_TX_0 Format", tx_cdc_dma_tx_0_format,
3602 cdc_dma_tx_format_get, cdc_dma_tx_format_put),
3603 SOC_ENUM_EXT("TX_CDC_DMA_TX_3 Format", tx_cdc_dma_tx_3_format,
3604 cdc_dma_tx_format_get, cdc_dma_tx_format_put),
3605 SOC_ENUM_EXT("TX_CDC_DMA_TX_4 Format", tx_cdc_dma_tx_4_format,
3606 cdc_dma_tx_format_get, cdc_dma_tx_format_put),
Xiaoyu Ye2228bf02018-12-12 15:47:20 -08003607 SOC_ENUM_EXT("VA_CDC_DMA_TX_0 Format", va_cdc_dma_tx_0_format,
3608 cdc_dma_tx_format_get, cdc_dma_tx_format_put),
3609 SOC_ENUM_EXT("VA_CDC_DMA_TX_1 Format", va_cdc_dma_tx_1_format,
3610 cdc_dma_tx_format_get, cdc_dma_tx_format_put),
3611 SOC_ENUM_EXT("VA_CDC_DMA_TX_2 Format", va_cdc_dma_tx_2_format,
3612 cdc_dma_tx_format_get, cdc_dma_tx_format_put),
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07003613 SOC_ENUM_EXT("WSA_CDC_DMA_RX_0 SampleRate",
3614 wsa_cdc_dma_rx_0_sample_rate,
3615 cdc_dma_rx_sample_rate_get,
3616 cdc_dma_rx_sample_rate_put),
3617 SOC_ENUM_EXT("WSA_CDC_DMA_RX_1 SampleRate",
3618 wsa_cdc_dma_rx_1_sample_rate,
3619 cdc_dma_rx_sample_rate_get,
3620 cdc_dma_rx_sample_rate_put),
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07003621 SOC_ENUM_EXT("WSA_CDC_DMA_TX_0 SampleRate",
3622 wsa_cdc_dma_tx_0_sample_rate,
3623 cdc_dma_tx_sample_rate_get,
3624 cdc_dma_tx_sample_rate_put),
3625 SOC_ENUM_EXT("WSA_CDC_DMA_TX_1 SampleRate",
3626 wsa_cdc_dma_tx_1_sample_rate,
3627 cdc_dma_tx_sample_rate_get,
3628 cdc_dma_tx_sample_rate_put),
3629 SOC_ENUM_EXT("WSA_CDC_DMA_TX_2 SampleRate",
3630 wsa_cdc_dma_tx_2_sample_rate,
3631 cdc_dma_tx_sample_rate_get,
3632 cdc_dma_tx_sample_rate_put),
3633 SOC_ENUM_EXT("TX_CDC_DMA_TX_0 SampleRate",
3634 tx_cdc_dma_tx_0_sample_rate,
3635 cdc_dma_tx_sample_rate_get,
3636 cdc_dma_tx_sample_rate_put),
3637 SOC_ENUM_EXT("TX_CDC_DMA_TX_3 SampleRate",
3638 tx_cdc_dma_tx_3_sample_rate,
3639 cdc_dma_tx_sample_rate_get,
3640 cdc_dma_tx_sample_rate_put),
3641 SOC_ENUM_EXT("TX_CDC_DMA_TX_4 SampleRate",
3642 tx_cdc_dma_tx_4_sample_rate,
3643 cdc_dma_tx_sample_rate_get,
3644 cdc_dma_tx_sample_rate_put),
Xiaoyu Ye2228bf02018-12-12 15:47:20 -08003645 SOC_ENUM_EXT("VA_CDC_DMA_TX_0 SampleRate",
3646 va_cdc_dma_tx_0_sample_rate,
3647 cdc_dma_tx_sample_rate_get,
3648 cdc_dma_tx_sample_rate_put),
3649 SOC_ENUM_EXT("VA_CDC_DMA_TX_1 SampleRate",
3650 va_cdc_dma_tx_1_sample_rate,
3651 cdc_dma_tx_sample_rate_get,
3652 cdc_dma_tx_sample_rate_put),
3653 SOC_ENUM_EXT("VA_CDC_DMA_TX_2 SampleRate",
3654 va_cdc_dma_tx_2_sample_rate,
3655 cdc_dma_tx_sample_rate_get,
3656 cdc_dma_tx_sample_rate_put),
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07003657};
3658
Vignesh Kulothungan406c2bf2019-07-19 10:17:55 -07003659static const struct snd_kcontrol_new msm_int_wcd9380_snd_controls[] = {
3660 SOC_ENUM_EXT("RX_CDC_DMA_RX_0 Format", rx_cdc80_dma_rx_0_format,
3661 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
3662 SOC_ENUM_EXT("RX_CDC_DMA_RX_1 Format", rx_cdc80_dma_rx_1_format,
3663 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
3664 SOC_ENUM_EXT("RX_CDC_DMA_RX_2 Format", rx_cdc80_dma_rx_2_format,
3665 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
3666 SOC_ENUM_EXT("RX_CDC_DMA_RX_3 Format", rx_cdc80_dma_rx_3_format,
3667 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
3668 SOC_ENUM_EXT("RX_CDC_DMA_RX_5 Format", rx_cdc80_dma_rx_5_format,
3669 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
3670 SOC_ENUM_EXT("RX_CDC_DMA_RX_0 SampleRate",
3671 rx_cdc80_dma_rx_0_sample_rate,
3672 cdc_dma_rx_sample_rate_get,
3673 cdc_dma_rx_sample_rate_put),
3674 SOC_ENUM_EXT("RX_CDC_DMA_RX_1 SampleRate",
3675 rx_cdc80_dma_rx_1_sample_rate,
3676 cdc_dma_rx_sample_rate_get,
3677 cdc_dma_rx_sample_rate_put),
3678 SOC_ENUM_EXT("RX_CDC_DMA_RX_2 SampleRate",
3679 rx_cdc80_dma_rx_2_sample_rate,
3680 cdc_dma_rx_sample_rate_get,
3681 cdc_dma_rx_sample_rate_put),
3682 SOC_ENUM_EXT("RX_CDC_DMA_RX_3 SampleRate",
3683 rx_cdc80_dma_rx_3_sample_rate,
3684 cdc_dma_rx_sample_rate_get,
3685 cdc_dma_rx_sample_rate_put),
3686 SOC_ENUM_EXT("RX_CDC_DMA_RX_5 SampleRate",
3687 rx_cdc80_dma_rx_5_sample_rate,
3688 cdc_dma_rx_sample_rate_get,
3689 cdc_dma_rx_sample_rate_put),
3690};
3691
3692static const struct snd_kcontrol_new msm_int_wcd9385_snd_controls[] = {
3693 SOC_ENUM_EXT("RX_CDC_DMA_RX_0 Format", rx_cdc85_dma_rx_0_format,
3694 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
3695 SOC_ENUM_EXT("RX_CDC_DMA_RX_1 Format", rx_cdc85_dma_rx_1_format,
3696 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
3697 SOC_ENUM_EXT("RX_CDC_DMA_RX_2 Format", rx_cdc85_dma_rx_2_format,
3698 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
3699 SOC_ENUM_EXT("RX_CDC_DMA_RX_3 Format", rx_cdc85_dma_rx_3_format,
3700 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
3701 SOC_ENUM_EXT("RX_CDC_DMA_RX_5 Format", rx_cdc85_dma_rx_5_format,
3702 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
3703 SOC_ENUM_EXT("RX_CDC_DMA_RX_0 SampleRate",
3704 rx_cdc85_dma_rx_0_sample_rate,
3705 cdc_dma_rx_sample_rate_get,
3706 cdc_dma_rx_sample_rate_put),
3707 SOC_ENUM_EXT("RX_CDC_DMA_RX_1 SampleRate",
3708 rx_cdc85_dma_rx_1_sample_rate,
3709 cdc_dma_rx_sample_rate_get,
3710 cdc_dma_rx_sample_rate_put),
3711 SOC_ENUM_EXT("RX_CDC_DMA_RX_2 SampleRate",
3712 rx_cdc85_dma_rx_2_sample_rate,
3713 cdc_dma_rx_sample_rate_get,
3714 cdc_dma_rx_sample_rate_put),
3715 SOC_ENUM_EXT("RX_CDC_DMA_RX_3 SampleRate",
3716 rx_cdc85_dma_rx_3_sample_rate,
3717 cdc_dma_rx_sample_rate_get,
3718 cdc_dma_rx_sample_rate_put),
3719 SOC_ENUM_EXT("RX_CDC_DMA_RX_5 SampleRate",
3720 rx_cdc85_dma_rx_5_sample_rate,
3721 cdc_dma_rx_sample_rate_get,
3722 cdc_dma_rx_sample_rate_put),
3723};
3724
Kunlei Zhangf61a2312020-02-11 15:37:03 +08003725static const struct snd_kcontrol_new msm_int_wcd937x_snd_controls[] = {
3726 SOC_ENUM_EXT("RX_CDC_DMA_RX_0 Format", rx_cdc_dma_rx_0_format,
3727 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
3728 SOC_ENUM_EXT("RX_CDC_DMA_RX_1 Format", rx_cdc_dma_rx_1_format,
3729 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
3730 SOC_ENUM_EXT("RX_CDC_DMA_RX_2 Format", rx_cdc_dma_rx_2_format,
3731 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
3732 SOC_ENUM_EXT("RX_CDC_DMA_RX_3 Format", rx_cdc_dma_rx_3_format,
3733 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
3734 SOC_ENUM_EXT("RX_CDC_DMA_RX_5 Format", rx_cdc_dma_rx_5_format,
3735 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
3736 SOC_ENUM_EXT("RX_CDC_DMA_RX_0 SampleRate",
3737 rx_cdc_dma_rx_0_sample_rate,
3738 cdc_dma_rx_sample_rate_get,
3739 cdc_dma_rx_sample_rate_put),
3740 SOC_ENUM_EXT("RX_CDC_DMA_RX_1 SampleRate",
3741 rx_cdc_dma_rx_1_sample_rate,
3742 cdc_dma_rx_sample_rate_get,
3743 cdc_dma_rx_sample_rate_put),
3744 SOC_ENUM_EXT("RX_CDC_DMA_RX_2 SampleRate",
3745 rx_cdc_dma_rx_2_sample_rate,
3746 cdc_dma_rx_sample_rate_get,
3747 cdc_dma_rx_sample_rate_put),
3748 SOC_ENUM_EXT("RX_CDC_DMA_RX_3 SampleRate",
3749 rx_cdc_dma_rx_3_sample_rate,
3750 cdc_dma_rx_sample_rate_get,
3751 cdc_dma_rx_sample_rate_put),
3752 SOC_ENUM_EXT("RX_CDC_DMA_RX_5 SampleRate",
3753 rx_cdc_dma_rx_5_sample_rate,
3754 cdc_dma_rx_sample_rate_get,
3755 cdc_dma_rx_sample_rate_put),
3756};
3757
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07003758static const struct snd_kcontrol_new msm_common_snd_controls[] = {
3759 SOC_ENUM_EXT("USB_AUDIO_RX SampleRate", usb_rx_sample_rate,
3760 usb_audio_rx_sample_rate_get,
3761 usb_audio_rx_sample_rate_put),
3762 SOC_ENUM_EXT("USB_AUDIO_TX SampleRate", usb_tx_sample_rate,
3763 usb_audio_tx_sample_rate_get,
3764 usb_audio_tx_sample_rate_put),
Aditya Bavanari2d763ba2020-02-17 13:26:50 +05303765 SOC_ENUM_EXT("USB_AUDIO_RX Format", usb_rx_format,
3766 usb_audio_rx_format_get, usb_audio_rx_format_put),
3767 SOC_ENUM_EXT("USB_AUDIO_TX Format", usb_tx_format,
3768 usb_audio_tx_format_get, usb_audio_tx_format_put),
3769 SOC_ENUM_EXT("USB_AUDIO_RX Channels", usb_rx_chs,
3770 usb_audio_rx_ch_get, usb_audio_rx_ch_put),
3771 SOC_ENUM_EXT("USB_AUDIO_TX Channels", usb_tx_chs,
3772 usb_audio_tx_ch_get, usb_audio_tx_ch_put),
3773 SOC_ENUM_EXT("PROXY_RX Channels", proxy_rx_chs,
3774 proxy_rx_ch_get, proxy_rx_ch_put),
3775 SOC_ENUM_EXT("Display Port RX Channels", ext_disp_rx_chs,
3776 ext_disp_rx_ch_get, ext_disp_rx_ch_put),
3777 SOC_ENUM_EXT("Display Port RX Bit Format", ext_disp_rx_format,
3778 ext_disp_rx_format_get, ext_disp_rx_format_put),
3779 SOC_ENUM_EXT("Display Port RX SampleRate", ext_disp_rx_sample_rate,
3780 ext_disp_rx_sample_rate_get,
3781 ext_disp_rx_sample_rate_put),
3782 SOC_ENUM_EXT("Display Port1 RX Channels", ext_disp_rx_chs,
3783 ext_disp_rx_ch_get, ext_disp_rx_ch_put),
3784 SOC_ENUM_EXT("Display Port1 RX Bit Format", ext_disp_rx_format,
3785 ext_disp_rx_format_get, ext_disp_rx_format_put),
3786 SOC_ENUM_EXT("Display Port1 RX SampleRate", ext_disp_rx_sample_rate,
3787 ext_disp_rx_sample_rate_get,
3788 ext_disp_rx_sample_rate_put),
3789 SOC_ENUM_EXT("BT SampleRate", bt_sample_rate,
3790 msm_bt_sample_rate_get,
3791 msm_bt_sample_rate_put),
3792 SOC_ENUM_EXT("BT SampleRate RX", bt_sample_rate_rx,
3793 msm_bt_sample_rate_rx_get,
3794 msm_bt_sample_rate_rx_put),
3795 SOC_ENUM_EXT("BT SampleRate TX", bt_sample_rate_tx,
3796 msm_bt_sample_rate_tx_get,
3797 msm_bt_sample_rate_tx_put),
3798 SOC_ENUM_EXT("AFE_LOOPBACK_TX Channels", afe_loopback_tx_chs,
3799 afe_loopback_tx_ch_get, afe_loopback_tx_ch_put),
3800 SOC_ENUM_EXT("VI_FEED_TX Channels", vi_feed_tx_chs,
3801 msm_vi_feed_tx_ch_get, msm_vi_feed_tx_ch_put),
3802};
3803
3804static const struct snd_kcontrol_new msm_tdm_snd_controls[] = {
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07003805 SOC_ENUM_EXT("PRI_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
3806 tdm_rx_sample_rate_get,
3807 tdm_rx_sample_rate_put),
3808 SOC_ENUM_EXT("SEC_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
3809 tdm_rx_sample_rate_get,
3810 tdm_rx_sample_rate_put),
3811 SOC_ENUM_EXT("TERT_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
3812 tdm_rx_sample_rate_get,
3813 tdm_rx_sample_rate_put),
Karthikeyan Mani12dcf642019-01-29 11:21:15 -08003814 SOC_ENUM_EXT("QUAT_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
3815 tdm_rx_sample_rate_get,
3816 tdm_rx_sample_rate_put),
3817 SOC_ENUM_EXT("QUIN_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
3818 tdm_rx_sample_rate_get,
3819 tdm_rx_sample_rate_put),
3820 SOC_ENUM_EXT("SEN_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
3821 tdm_rx_sample_rate_get,
3822 tdm_rx_sample_rate_put),
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07003823 SOC_ENUM_EXT("PRI_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
3824 tdm_tx_sample_rate_get,
3825 tdm_tx_sample_rate_put),
3826 SOC_ENUM_EXT("SEC_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
3827 tdm_tx_sample_rate_get,
3828 tdm_tx_sample_rate_put),
3829 SOC_ENUM_EXT("TERT_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
3830 tdm_tx_sample_rate_get,
3831 tdm_tx_sample_rate_put),
Karthikeyan Mani12dcf642019-01-29 11:21:15 -08003832 SOC_ENUM_EXT("QUAT_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
3833 tdm_tx_sample_rate_get,
3834 tdm_tx_sample_rate_put),
3835 SOC_ENUM_EXT("QUIN_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
3836 tdm_tx_sample_rate_get,
3837 tdm_tx_sample_rate_put),
3838 SOC_ENUM_EXT("SEN_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
3839 tdm_tx_sample_rate_get,
3840 tdm_tx_sample_rate_put),
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07003841 SOC_ENUM_EXT("PRI_TDM_RX_0 Format", tdm_rx_format,
3842 tdm_rx_format_get,
3843 tdm_rx_format_put),
3844 SOC_ENUM_EXT("SEC_TDM_RX_0 Format", tdm_rx_format,
3845 tdm_rx_format_get,
3846 tdm_rx_format_put),
3847 SOC_ENUM_EXT("TERT_TDM_RX_0 Format", tdm_rx_format,
3848 tdm_rx_format_get,
3849 tdm_rx_format_put),
Karthikeyan Mani12dcf642019-01-29 11:21:15 -08003850 SOC_ENUM_EXT("QUAT_TDM_RX_0 Format", tdm_rx_format,
3851 tdm_rx_format_get,
3852 tdm_rx_format_put),
3853 SOC_ENUM_EXT("QUIN_TDM_RX_0 Format", tdm_rx_format,
3854 tdm_rx_format_get,
3855 tdm_rx_format_put),
3856 SOC_ENUM_EXT("SEN_TDM_RX_0 Format", tdm_rx_format,
3857 tdm_rx_format_get,
3858 tdm_rx_format_put),
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07003859 SOC_ENUM_EXT("PRI_TDM_TX_0 Format", tdm_tx_format,
3860 tdm_tx_format_get,
3861 tdm_tx_format_put),
3862 SOC_ENUM_EXT("SEC_TDM_TX_0 Format", tdm_tx_format,
3863 tdm_tx_format_get,
3864 tdm_tx_format_put),
3865 SOC_ENUM_EXT("TERT_TDM_TX_0 Format", tdm_tx_format,
3866 tdm_tx_format_get,
3867 tdm_tx_format_put),
Karthikeyan Mani12dcf642019-01-29 11:21:15 -08003868 SOC_ENUM_EXT("QUAT_TDM_TX_0 Format", tdm_tx_format,
3869 tdm_tx_format_get,
3870 tdm_tx_format_put),
3871 SOC_ENUM_EXT("QUIN_TDM_TX_0 Format", tdm_tx_format,
3872 tdm_tx_format_get,
3873 tdm_tx_format_put),
3874 SOC_ENUM_EXT("SEN_TDM_TX_0 Format", tdm_tx_format,
3875 tdm_tx_format_get,
3876 tdm_tx_format_put),
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07003877 SOC_ENUM_EXT("PRI_TDM_RX_0 Channels", tdm_rx_chs,
3878 tdm_rx_ch_get,
3879 tdm_rx_ch_put),
3880 SOC_ENUM_EXT("SEC_TDM_RX_0 Channels", tdm_rx_chs,
3881 tdm_rx_ch_get,
3882 tdm_rx_ch_put),
3883 SOC_ENUM_EXT("TERT_TDM_RX_0 Channels", tdm_rx_chs,
3884 tdm_rx_ch_get,
3885 tdm_rx_ch_put),
Karthikeyan Mani12dcf642019-01-29 11:21:15 -08003886 SOC_ENUM_EXT("QUAT_TDM_RX_0 Channels", tdm_rx_chs,
3887 tdm_rx_ch_get,
3888 tdm_rx_ch_put),
3889 SOC_ENUM_EXT("QUIN_TDM_RX_0 Channels", tdm_rx_chs,
3890 tdm_rx_ch_get,
3891 tdm_rx_ch_put),
3892 SOC_ENUM_EXT("SEN_TDM_RX_0 Channels", tdm_rx_chs,
3893 tdm_rx_ch_get,
3894 tdm_rx_ch_put),
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07003895 SOC_ENUM_EXT("PRI_TDM_TX_0 Channels", tdm_tx_chs,
3896 tdm_tx_ch_get,
3897 tdm_tx_ch_put),
3898 SOC_ENUM_EXT("SEC_TDM_TX_0 Channels", tdm_tx_chs,
3899 tdm_tx_ch_get,
3900 tdm_tx_ch_put),
3901 SOC_ENUM_EXT("TERT_TDM_TX_0 Channels", tdm_tx_chs,
3902 tdm_tx_ch_get,
3903 tdm_tx_ch_put),
Karthikeyan Mani12dcf642019-01-29 11:21:15 -08003904 SOC_ENUM_EXT("QUAT_TDM_TX_0 Channels", tdm_tx_chs,
3905 tdm_tx_ch_get,
3906 tdm_tx_ch_put),
3907 SOC_ENUM_EXT("QUIN_TDM_TX_0 Channels", tdm_tx_chs,
3908 tdm_tx_ch_get,
3909 tdm_tx_ch_put),
3910 SOC_ENUM_EXT("SEN_TDM_TX_0 Channels", tdm_tx_chs,
3911 tdm_tx_ch_get,
3912 tdm_tx_ch_put),
Aditya Bavanari2d763ba2020-02-17 13:26:50 +05303913 SOC_SINGLE_MULTI_EXT("TDM Slot Map", SND_SOC_NOPM, 0, 255, 0,
3914 TDM_MAX_SLOTS + MAX_PATH, NULL, tdm_slot_map_put),
3915};
3916
3917static const struct snd_kcontrol_new msm_auxpcm_snd_controls[] = {
3918 SOC_ENUM_EXT("PRIM_AUX_PCM_RX SampleRate", prim_aux_pcm_rx_sample_rate,
3919 aux_pcm_rx_sample_rate_get,
3920 aux_pcm_rx_sample_rate_put),
3921 SOC_ENUM_EXT("SEC_AUX_PCM_RX SampleRate", sec_aux_pcm_rx_sample_rate,
3922 aux_pcm_rx_sample_rate_get,
3923 aux_pcm_rx_sample_rate_put),
3924 SOC_ENUM_EXT("TERT_AUX_PCM_RX SampleRate", tert_aux_pcm_rx_sample_rate,
3925 aux_pcm_rx_sample_rate_get,
3926 aux_pcm_rx_sample_rate_put),
3927 SOC_ENUM_EXT("QUAT_AUX_PCM_RX SampleRate", quat_aux_pcm_rx_sample_rate,
3928 aux_pcm_rx_sample_rate_get,
3929 aux_pcm_rx_sample_rate_put),
3930 SOC_ENUM_EXT("QUIN_AUX_PCM_RX SampleRate", quin_aux_pcm_rx_sample_rate,
3931 aux_pcm_rx_sample_rate_get,
3932 aux_pcm_rx_sample_rate_put),
3933 SOC_ENUM_EXT("SEN_AUX_PCM_RX SampleRate", sen_aux_pcm_rx_sample_rate,
3934 aux_pcm_rx_sample_rate_get,
3935 aux_pcm_rx_sample_rate_put),
3936 SOC_ENUM_EXT("PRIM_AUX_PCM_TX SampleRate", prim_aux_pcm_tx_sample_rate,
3937 aux_pcm_tx_sample_rate_get,
3938 aux_pcm_tx_sample_rate_put),
3939 SOC_ENUM_EXT("SEC_AUX_PCM_TX SampleRate", sec_aux_pcm_tx_sample_rate,
3940 aux_pcm_tx_sample_rate_get,
3941 aux_pcm_tx_sample_rate_put),
3942 SOC_ENUM_EXT("TERT_AUX_PCM_TX SampleRate", tert_aux_pcm_tx_sample_rate,
3943 aux_pcm_tx_sample_rate_get,
3944 aux_pcm_tx_sample_rate_put),
3945 SOC_ENUM_EXT("QUAT_AUX_PCM_TX SampleRate", quat_aux_pcm_tx_sample_rate,
3946 aux_pcm_tx_sample_rate_get,
3947 aux_pcm_tx_sample_rate_put),
3948 SOC_ENUM_EXT("QUIN_AUX_PCM_TX SampleRate", quin_aux_pcm_tx_sample_rate,
3949 aux_pcm_tx_sample_rate_get,
3950 aux_pcm_tx_sample_rate_put),
3951 SOC_ENUM_EXT("SEN_AUX_PCM_TX SampleRate", sen_aux_pcm_tx_sample_rate,
3952 aux_pcm_tx_sample_rate_get,
3953 aux_pcm_tx_sample_rate_put),
3954 SOC_ENUM_EXT("PRIM_AUX_PCM_RX Format", aux_pcm_rx_format,
3955 msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
3956 SOC_ENUM_EXT("SEC_AUX_PCM_RX Format", aux_pcm_rx_format,
3957 msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
3958 SOC_ENUM_EXT("TERT_AUX_PCM_RX Format", aux_pcm_rx_format,
3959 msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
3960 SOC_ENUM_EXT("QUAT_AUX_PCM_RX Format", aux_pcm_rx_format,
3961 msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
3962 SOC_ENUM_EXT("QUIN_AUX_PCM_RX Format", aux_pcm_rx_format,
3963 msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
3964 SOC_ENUM_EXT("SEN_AUX_PCM_RX Format", aux_pcm_rx_format,
3965 msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
3966 SOC_ENUM_EXT("PRIM_AUX_PCM_TX Format", aux_pcm_tx_format,
3967 msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
3968 SOC_ENUM_EXT("SEC_AUX_PCM_TX Format", aux_pcm_tx_format,
3969 msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
3970 SOC_ENUM_EXT("TERT_AUX_PCM_TX Format", aux_pcm_tx_format,
3971 msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
3972 SOC_ENUM_EXT("QUAT_AUX_PCM_TX Format", aux_pcm_tx_format,
3973 msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
3974 SOC_ENUM_EXT("QUIN_AUX_PCM_TX Format", aux_pcm_tx_format,
3975 msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
3976 SOC_ENUM_EXT("SEN_AUX_PCM_TX Format", aux_pcm_tx_format,
3977 msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
3978};
3979
3980static const struct snd_kcontrol_new msm_mi2s_snd_controls[] = {
3981 SOC_ENUM_EXT("PRIM_MI2S_RX SampleRate", prim_mi2s_rx_sample_rate,
3982 mi2s_rx_sample_rate_get,
3983 mi2s_rx_sample_rate_put),
3984 SOC_ENUM_EXT("SEC_MI2S_RX SampleRate", sec_mi2s_rx_sample_rate,
3985 mi2s_rx_sample_rate_get,
3986 mi2s_rx_sample_rate_put),
3987 SOC_ENUM_EXT("TERT_MI2S_RX SampleRate", tert_mi2s_rx_sample_rate,
3988 mi2s_rx_sample_rate_get,
3989 mi2s_rx_sample_rate_put),
3990 SOC_ENUM_EXT("QUAT_MI2S_RX SampleRate", quat_mi2s_rx_sample_rate,
3991 mi2s_rx_sample_rate_get,
3992 mi2s_rx_sample_rate_put),
3993 SOC_ENUM_EXT("QUIN_MI2S_RX SampleRate", quin_mi2s_rx_sample_rate,
3994 mi2s_rx_sample_rate_get,
3995 mi2s_rx_sample_rate_put),
3996 SOC_ENUM_EXT("SEN_MI2S_RX SampleRate", sen_mi2s_rx_sample_rate,
3997 mi2s_rx_sample_rate_get,
3998 mi2s_rx_sample_rate_put),
3999 SOC_ENUM_EXT("PRIM_MI2S_TX SampleRate", prim_mi2s_tx_sample_rate,
4000 mi2s_tx_sample_rate_get,
4001 mi2s_tx_sample_rate_put),
4002 SOC_ENUM_EXT("SEC_MI2S_TX SampleRate", sec_mi2s_tx_sample_rate,
4003 mi2s_tx_sample_rate_get,
4004 mi2s_tx_sample_rate_put),
4005 SOC_ENUM_EXT("TERT_MI2S_TX SampleRate", tert_mi2s_tx_sample_rate,
4006 mi2s_tx_sample_rate_get,
4007 mi2s_tx_sample_rate_put),
4008 SOC_ENUM_EXT("QUAT_MI2S_TX SampleRate", quat_mi2s_tx_sample_rate,
4009 mi2s_tx_sample_rate_get,
4010 mi2s_tx_sample_rate_put),
4011 SOC_ENUM_EXT("QUIN_MI2S_TX SampleRate", quin_mi2s_tx_sample_rate,
4012 mi2s_tx_sample_rate_get,
4013 mi2s_tx_sample_rate_put),
4014 SOC_ENUM_EXT("SEN_MI2S_TX SampleRate", sen_mi2s_tx_sample_rate,
4015 mi2s_tx_sample_rate_get,
4016 mi2s_tx_sample_rate_put),
4017 SOC_ENUM_EXT("PRIM_MI2S_RX Format", mi2s_rx_format,
4018 msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
4019 SOC_ENUM_EXT("SEC_MI2S_RX Format", mi2s_rx_format,
4020 msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
4021 SOC_ENUM_EXT("TERT_MI2S_RX Format", mi2s_rx_format,
4022 msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
4023 SOC_ENUM_EXT("QUAT_MI2S_RX Format", mi2s_rx_format,
4024 msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
4025 SOC_ENUM_EXT("QUIN_MI2S_RX Format", mi2s_rx_format,
4026 msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
4027 SOC_ENUM_EXT("SEN_MI2S_RX Format", mi2s_rx_format,
4028 msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
4029 SOC_ENUM_EXT("PRIM_MI2S_TX Format", mi2s_tx_format,
4030 msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
4031 SOC_ENUM_EXT("SEC_MI2S_TX Format", mi2s_tx_format,
4032 msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
4033 SOC_ENUM_EXT("TERT_MI2S_TX Format", mi2s_tx_format,
4034 msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
4035 SOC_ENUM_EXT("QUAT_MI2S_TX Format", mi2s_tx_format,
4036 msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
4037 SOC_ENUM_EXT("QUIN_MI2S_TX Format", mi2s_tx_format,
4038 msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
4039 SOC_ENUM_EXT("SEN_MI2S_TX Format", mi2s_tx_format,
4040 msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07004041 SOC_ENUM_EXT("PRIM_MI2S_RX Channels", prim_mi2s_rx_chs,
4042 msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
4043 SOC_ENUM_EXT("SEC_MI2S_RX Channels", sec_mi2s_rx_chs,
4044 msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
4045 SOC_ENUM_EXT("TERT_MI2S_RX Channels", tert_mi2s_rx_chs,
4046 msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
Karthikeyan Mani12dcf642019-01-29 11:21:15 -08004047 SOC_ENUM_EXT("QUAT_MI2S_RX Channels", quat_mi2s_rx_chs,
4048 msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
4049 SOC_ENUM_EXT("QUIN_MI2S_RX Channels", quin_mi2s_rx_chs,
4050 msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
4051 SOC_ENUM_EXT("SEN_MI2S_RX Channels", sen_mi2s_rx_chs,
4052 msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07004053 SOC_ENUM_EXT("PRIM_MI2S_TX Channels", prim_mi2s_tx_chs,
4054 msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
4055 SOC_ENUM_EXT("SEC_MI2S_TX Channels", sec_mi2s_tx_chs,
4056 msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
4057 SOC_ENUM_EXT("TERT_MI2S_TX Channels", tert_mi2s_tx_chs,
4058 msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
Karthikeyan Mani12dcf642019-01-29 11:21:15 -08004059 SOC_ENUM_EXT("QUAT_MI2S_TX Channels", quat_mi2s_tx_chs,
4060 msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
4061 SOC_ENUM_EXT("QUIN_MI2S_TX Channels", quin_mi2s_tx_chs,
4062 msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
4063 SOC_ENUM_EXT("SEN_MI2S_TX Channels", sen_mi2s_tx_chs,
4064 msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07004065};
4066
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -07004067static const struct snd_kcontrol_new msm_snd_controls[] = {
4068 SOC_ENUM_EXT("PRIM_AUX_PCM_RX Format", aux_pcm_rx_format,
4069 msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
4070 SOC_ENUM_EXT("PRIM_AUX_PCM_TX Format", aux_pcm_tx_format,
4071 msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
4072 SOC_ENUM_EXT("PRIM_AUX_PCM_RX SampleRate", prim_aux_pcm_rx_sample_rate,
4073 aux_pcm_rx_sample_rate_get,
4074 aux_pcm_rx_sample_rate_put),
4075 SOC_ENUM_EXT("PRIM_AUX_PCM_TX SampleRate", prim_aux_pcm_tx_sample_rate,
4076 aux_pcm_tx_sample_rate_get,
4077 aux_pcm_tx_sample_rate_put),
4078};
4079
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -08004080static int msm_ext_disp_get_idx_from_beid(int32_t be_id)
4081{
4082 int idx;
4083
4084 switch (be_id) {
4085 case MSM_BACKEND_DAI_DISPLAY_PORT_RX:
4086 idx = EXT_DISP_RX_IDX_DP;
4087 break;
Vignesh Kulothunganf86a3552019-07-11 15:46:25 -07004088 case MSM_BACKEND_DAI_DISPLAY_PORT_RX_1:
4089 idx = EXT_DISP_RX_IDX_DP1;
4090 break;
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -08004091 default:
4092 pr_err("%s: Incorrect ext_disp BE id %d\n", __func__, be_id);
4093 idx = -EINVAL;
4094 break;
4095 }
4096
4097 return idx;
4098}
4099
Xiaoyu Yeffbdc9f2019-05-17 15:02:39 -07004100static int kona_send_island_va_config(int32_t be_id)
4101{
4102 int rc = 0;
4103 int port_id = 0xFFFF;
4104
4105 port_id = msm_get_port_id(be_id);
4106 if (port_id < 0) {
4107 pr_err("%s: Invalid island interface, be_id: %d\n",
4108 __func__, be_id);
4109 rc = -EINVAL;
4110 } else {
4111 /*
4112 * send island mode config
4113 * This should be the first configuration
4114 */
4115 rc = afe_send_port_island_mode(port_id);
4116 if (rc)
4117 pr_err("%s: afe send island mode failed %d\n",
4118 __func__, rc);
4119 }
4120
4121 return rc;
4122}
4123
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07004124static int msm_be_hw_params_fixup(struct snd_soc_pcm_runtime *rtd,
4125 struct snd_pcm_hw_params *params)
4126{
4127 struct snd_soc_dai_link *dai_link = rtd->dai_link;
4128 struct snd_interval *rate = hw_param_interval(params,
4129 SNDRV_PCM_HW_PARAM_RATE);
4130 struct snd_interval *channels = hw_param_interval(params,
4131 SNDRV_PCM_HW_PARAM_CHANNELS);
Meng Wange8e53822019-03-18 10:49:50 +08004132 int idx = 0, rc = 0;
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07004133
Vignesh Kulothungan2139a7d2019-08-07 12:07:20 -07004134 pr_debug("%s: dai_id= %d, format = %d, rate = %d\n",
4135 __func__, dai_link->id, params_format(params),
4136 params_rate(params));
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07004137
4138 switch (dai_link->id) {
4139 case MSM_BACKEND_DAI_USB_RX:
4140 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4141 usb_rx_cfg.bit_format);
4142 rate->min = rate->max = usb_rx_cfg.sample_rate;
4143 channels->min = channels->max = usb_rx_cfg.channels;
4144 break;
4145
4146 case MSM_BACKEND_DAI_USB_TX:
4147 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4148 usb_tx_cfg.bit_format);
4149 rate->min = rate->max = usb_tx_cfg.sample_rate;
4150 channels->min = channels->max = usb_tx_cfg.channels;
4151 break;
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -08004152
4153 case MSM_BACKEND_DAI_DISPLAY_PORT_RX:
Vignesh Kulothunganf86a3552019-07-11 15:46:25 -07004154 case MSM_BACKEND_DAI_DISPLAY_PORT_RX_1:
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -08004155 idx = msm_ext_disp_get_idx_from_beid(dai_link->id);
4156 if (idx < 0) {
4157 pr_err("%s: Incorrect ext disp idx %d\n",
4158 __func__, idx);
4159 rc = idx;
4160 goto done;
4161 }
4162
4163 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4164 ext_disp_rx_cfg[idx].bit_format);
4165 rate->min = rate->max = ext_disp_rx_cfg[idx].sample_rate;
4166 channels->min = channels->max = ext_disp_rx_cfg[idx].channels;
4167 break;
4168
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07004169 case MSM_BACKEND_DAI_AFE_PCM_RX:
4170 channels->min = channels->max = proxy_rx_cfg.channels;
4171 rate->min = rate->max = SAMPLING_RATE_48KHZ;
4172 break;
4173
4174 case MSM_BACKEND_DAI_PRI_TDM_RX_0:
4175 channels->min = channels->max =
4176 tdm_rx_cfg[TDM_PRI][TDM_0].channels;
4177 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4178 tdm_rx_cfg[TDM_PRI][TDM_0].bit_format);
4179 rate->min = rate->max = tdm_rx_cfg[TDM_PRI][TDM_0].sample_rate;
4180 break;
4181
4182 case MSM_BACKEND_DAI_PRI_TDM_TX_0:
4183 channels->min = channels->max =
4184 tdm_tx_cfg[TDM_PRI][TDM_0].channels;
4185 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4186 tdm_tx_cfg[TDM_PRI][TDM_0].bit_format);
4187 rate->min = rate->max = tdm_tx_cfg[TDM_PRI][TDM_0].sample_rate;
4188 break;
4189
4190 case MSM_BACKEND_DAI_SEC_TDM_RX_0:
4191 channels->min = channels->max =
4192 tdm_rx_cfg[TDM_SEC][TDM_0].channels;
4193 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4194 tdm_rx_cfg[TDM_SEC][TDM_0].bit_format);
4195 rate->min = rate->max = tdm_rx_cfg[TDM_SEC][TDM_0].sample_rate;
4196 break;
4197
4198 case MSM_BACKEND_DAI_SEC_TDM_TX_0:
4199 channels->min = channels->max =
4200 tdm_tx_cfg[TDM_SEC][TDM_0].channels;
4201 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4202 tdm_tx_cfg[TDM_SEC][TDM_0].bit_format);
4203 rate->min = rate->max = tdm_tx_cfg[TDM_SEC][TDM_0].sample_rate;
4204 break;
4205
4206 case MSM_BACKEND_DAI_TERT_TDM_RX_0:
4207 channels->min = channels->max =
4208 tdm_rx_cfg[TDM_TERT][TDM_0].channels;
4209 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4210 tdm_rx_cfg[TDM_TERT][TDM_0].bit_format);
4211 rate->min = rate->max = tdm_rx_cfg[TDM_TERT][TDM_0].sample_rate;
4212 break;
4213
4214 case MSM_BACKEND_DAI_TERT_TDM_TX_0:
4215 channels->min = channels->max =
4216 tdm_tx_cfg[TDM_TERT][TDM_0].channels;
4217 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4218 tdm_tx_cfg[TDM_TERT][TDM_0].bit_format);
4219 rate->min = rate->max = tdm_tx_cfg[TDM_TERT][TDM_0].sample_rate;
4220 break;
4221
Karthikeyan Mani12dcf642019-01-29 11:21:15 -08004222 case MSM_BACKEND_DAI_QUAT_TDM_RX_0:
4223 channels->min = channels->max =
4224 tdm_rx_cfg[TDM_QUAT][TDM_0].channels;
4225 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4226 tdm_rx_cfg[TDM_QUAT][TDM_0].bit_format);
4227 rate->min = rate->max = tdm_rx_cfg[TDM_QUAT][TDM_0].sample_rate;
4228 break;
4229
4230 case MSM_BACKEND_DAI_QUAT_TDM_TX_0:
4231 channels->min = channels->max =
4232 tdm_tx_cfg[TDM_QUAT][TDM_0].channels;
4233 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4234 tdm_tx_cfg[TDM_QUAT][TDM_0].bit_format);
4235 rate->min = rate->max = tdm_tx_cfg[TDM_QUAT][TDM_0].sample_rate;
4236 break;
4237
4238 case MSM_BACKEND_DAI_QUIN_TDM_RX_0:
4239 channels->min = channels->max =
4240 tdm_rx_cfg[TDM_QUIN][TDM_0].channels;
4241 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4242 tdm_rx_cfg[TDM_QUIN][TDM_0].bit_format);
4243 rate->min = rate->max = tdm_rx_cfg[TDM_QUIN][TDM_0].sample_rate;
4244 break;
4245
4246 case MSM_BACKEND_DAI_QUIN_TDM_TX_0:
4247 channels->min = channels->max =
4248 tdm_tx_cfg[TDM_QUIN][TDM_0].channels;
4249 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4250 tdm_tx_cfg[TDM_QUIN][TDM_0].bit_format);
4251 rate->min = rate->max = tdm_tx_cfg[TDM_QUIN][TDM_0].sample_rate;
4252 break;
4253
4254 case MSM_BACKEND_DAI_SEN_TDM_RX_0:
4255 channels->min = channels->max =
4256 tdm_rx_cfg[TDM_SEN][TDM_0].channels;
4257 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4258 tdm_rx_cfg[TDM_SEN][TDM_0].bit_format);
4259 rate->min = rate->max = tdm_rx_cfg[TDM_SEN][TDM_0].sample_rate;
4260 break;
4261
4262 case MSM_BACKEND_DAI_SEN_TDM_TX_0:
4263 channels->min = channels->max =
4264 tdm_tx_cfg[TDM_SEN][TDM_0].channels;
4265 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4266 tdm_tx_cfg[TDM_SEN][TDM_0].bit_format);
4267 rate->min = rate->max = tdm_tx_cfg[TDM_SEN][TDM_0].sample_rate;
4268 break;
4269
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07004270 case MSM_BACKEND_DAI_AUXPCM_RX:
4271 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4272 aux_pcm_rx_cfg[PRIM_AUX_PCM].bit_format);
4273 rate->min = rate->max =
4274 aux_pcm_rx_cfg[PRIM_AUX_PCM].sample_rate;
4275 channels->min = channels->max =
4276 aux_pcm_rx_cfg[PRIM_AUX_PCM].channels;
4277 break;
4278
4279 case MSM_BACKEND_DAI_AUXPCM_TX:
4280 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4281 aux_pcm_tx_cfg[PRIM_AUX_PCM].bit_format);
4282 rate->min = rate->max =
4283 aux_pcm_tx_cfg[PRIM_AUX_PCM].sample_rate;
4284 channels->min = channels->max =
4285 aux_pcm_tx_cfg[PRIM_AUX_PCM].channels;
4286 break;
4287
4288 case MSM_BACKEND_DAI_SEC_AUXPCM_RX:
4289 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4290 aux_pcm_rx_cfg[SEC_AUX_PCM].bit_format);
4291 rate->min = rate->max =
4292 aux_pcm_rx_cfg[SEC_AUX_PCM].sample_rate;
4293 channels->min = channels->max =
4294 aux_pcm_rx_cfg[SEC_AUX_PCM].channels;
4295 break;
4296
4297 case MSM_BACKEND_DAI_SEC_AUXPCM_TX:
4298 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4299 aux_pcm_tx_cfg[SEC_AUX_PCM].bit_format);
4300 rate->min = rate->max =
4301 aux_pcm_tx_cfg[SEC_AUX_PCM].sample_rate;
4302 channels->min = channels->max =
4303 aux_pcm_tx_cfg[SEC_AUX_PCM].channels;
4304 break;
4305
4306 case MSM_BACKEND_DAI_TERT_AUXPCM_RX:
4307 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4308 aux_pcm_rx_cfg[TERT_AUX_PCM].bit_format);
4309 rate->min = rate->max =
4310 aux_pcm_rx_cfg[TERT_AUX_PCM].sample_rate;
4311 channels->min = channels->max =
4312 aux_pcm_rx_cfg[TERT_AUX_PCM].channels;
4313 break;
4314
4315 case MSM_BACKEND_DAI_TERT_AUXPCM_TX:
4316 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4317 aux_pcm_tx_cfg[TERT_AUX_PCM].bit_format);
4318 rate->min = rate->max =
4319 aux_pcm_tx_cfg[TERT_AUX_PCM].sample_rate;
4320 channels->min = channels->max =
4321 aux_pcm_tx_cfg[TERT_AUX_PCM].channels;
4322 break;
4323
Karthikeyan Mani12dcf642019-01-29 11:21:15 -08004324 case MSM_BACKEND_DAI_QUAT_AUXPCM_RX:
4325 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4326 aux_pcm_rx_cfg[QUAT_AUX_PCM].bit_format);
4327 rate->min = rate->max =
4328 aux_pcm_rx_cfg[QUAT_AUX_PCM].sample_rate;
4329 channels->min = channels->max =
4330 aux_pcm_rx_cfg[QUAT_AUX_PCM].channels;
4331 break;
4332
4333 case MSM_BACKEND_DAI_QUAT_AUXPCM_TX:
4334 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4335 aux_pcm_tx_cfg[QUAT_AUX_PCM].bit_format);
4336 rate->min = rate->max =
4337 aux_pcm_tx_cfg[QUAT_AUX_PCM].sample_rate;
4338 channels->min = channels->max =
4339 aux_pcm_tx_cfg[QUAT_AUX_PCM].channels;
4340 break;
4341
4342 case MSM_BACKEND_DAI_QUIN_AUXPCM_RX:
4343 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4344 aux_pcm_rx_cfg[QUIN_AUX_PCM].bit_format);
4345 rate->min = rate->max =
4346 aux_pcm_rx_cfg[QUIN_AUX_PCM].sample_rate;
4347 channels->min = channels->max =
4348 aux_pcm_rx_cfg[QUIN_AUX_PCM].channels;
4349 break;
4350
4351 case MSM_BACKEND_DAI_QUIN_AUXPCM_TX:
4352 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4353 aux_pcm_tx_cfg[QUIN_AUX_PCM].bit_format);
4354 rate->min = rate->max =
4355 aux_pcm_tx_cfg[QUIN_AUX_PCM].sample_rate;
4356 channels->min = channels->max =
4357 aux_pcm_tx_cfg[QUIN_AUX_PCM].channels;
4358 break;
4359
4360 case MSM_BACKEND_DAI_SEN_AUXPCM_RX:
4361 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4362 aux_pcm_rx_cfg[SEN_AUX_PCM].bit_format);
4363 rate->min = rate->max =
4364 aux_pcm_rx_cfg[SEN_AUX_PCM].sample_rate;
4365 channels->min = channels->max =
4366 aux_pcm_rx_cfg[SEN_AUX_PCM].channels;
4367 break;
4368
4369 case MSM_BACKEND_DAI_SEN_AUXPCM_TX:
4370 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4371 aux_pcm_tx_cfg[SEN_AUX_PCM].bit_format);
4372 rate->min = rate->max =
4373 aux_pcm_tx_cfg[SEN_AUX_PCM].sample_rate;
4374 channels->min = channels->max =
4375 aux_pcm_tx_cfg[SEN_AUX_PCM].channels;
4376 break;
4377
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07004378 case MSM_BACKEND_DAI_PRI_MI2S_RX:
4379 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4380 mi2s_rx_cfg[PRIM_MI2S].bit_format);
4381 rate->min = rate->max = mi2s_rx_cfg[PRIM_MI2S].sample_rate;
4382 channels->min = channels->max =
4383 mi2s_rx_cfg[PRIM_MI2S].channels;
4384 break;
4385
4386 case MSM_BACKEND_DAI_PRI_MI2S_TX:
4387 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4388 mi2s_tx_cfg[PRIM_MI2S].bit_format);
4389 rate->min = rate->max = mi2s_tx_cfg[PRIM_MI2S].sample_rate;
4390 channels->min = channels->max =
4391 mi2s_tx_cfg[PRIM_MI2S].channels;
4392 break;
4393
4394 case MSM_BACKEND_DAI_SECONDARY_MI2S_RX:
4395 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4396 mi2s_rx_cfg[SEC_MI2S].bit_format);
4397 rate->min = rate->max = mi2s_rx_cfg[SEC_MI2S].sample_rate;
4398 channels->min = channels->max =
4399 mi2s_rx_cfg[SEC_MI2S].channels;
4400 break;
4401
4402 case MSM_BACKEND_DAI_SECONDARY_MI2S_TX:
4403 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4404 mi2s_tx_cfg[SEC_MI2S].bit_format);
4405 rate->min = rate->max = mi2s_tx_cfg[SEC_MI2S].sample_rate;
4406 channels->min = channels->max =
4407 mi2s_tx_cfg[SEC_MI2S].channels;
4408 break;
4409
4410 case MSM_BACKEND_DAI_TERTIARY_MI2S_RX:
4411 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4412 mi2s_rx_cfg[TERT_MI2S].bit_format);
4413 rate->min = rate->max = mi2s_rx_cfg[TERT_MI2S].sample_rate;
4414 channels->min = channels->max =
4415 mi2s_rx_cfg[TERT_MI2S].channels;
4416 break;
4417
4418 case MSM_BACKEND_DAI_TERTIARY_MI2S_TX:
4419 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4420 mi2s_tx_cfg[TERT_MI2S].bit_format);
4421 rate->min = rate->max = mi2s_tx_cfg[TERT_MI2S].sample_rate;
4422 channels->min = channels->max =
4423 mi2s_tx_cfg[TERT_MI2S].channels;
4424 break;
4425
Karthikeyan Mani12dcf642019-01-29 11:21:15 -08004426 case MSM_BACKEND_DAI_QUATERNARY_MI2S_RX:
4427 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4428 mi2s_rx_cfg[QUAT_MI2S].bit_format);
4429 rate->min = rate->max = mi2s_rx_cfg[QUAT_MI2S].sample_rate;
4430 channels->min = channels->max =
4431 mi2s_rx_cfg[QUAT_MI2S].channels;
4432 break;
4433
4434 case MSM_BACKEND_DAI_QUATERNARY_MI2S_TX:
4435 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4436 mi2s_tx_cfg[QUAT_MI2S].bit_format);
4437 rate->min = rate->max = mi2s_tx_cfg[QUAT_MI2S].sample_rate;
4438 channels->min = channels->max =
4439 mi2s_tx_cfg[QUAT_MI2S].channels;
4440 break;
4441
4442 case MSM_BACKEND_DAI_QUINARY_MI2S_RX:
4443 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4444 mi2s_rx_cfg[QUIN_MI2S].bit_format);
4445 rate->min = rate->max = mi2s_rx_cfg[QUIN_MI2S].sample_rate;
4446 channels->min = channels->max =
4447 mi2s_rx_cfg[QUIN_MI2S].channels;
4448 break;
4449
4450 case MSM_BACKEND_DAI_QUINARY_MI2S_TX:
4451 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4452 mi2s_tx_cfg[QUIN_MI2S].bit_format);
4453 rate->min = rate->max = mi2s_tx_cfg[QUIN_MI2S].sample_rate;
4454 channels->min = channels->max =
4455 mi2s_tx_cfg[QUIN_MI2S].channels;
4456 break;
4457
4458 case MSM_BACKEND_DAI_SENARY_MI2S_RX:
4459 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4460 mi2s_rx_cfg[SEN_MI2S].bit_format);
4461 rate->min = rate->max = mi2s_rx_cfg[SEN_MI2S].sample_rate;
4462 channels->min = channels->max =
4463 mi2s_rx_cfg[SEN_MI2S].channels;
4464 break;
4465
4466 case MSM_BACKEND_DAI_SENARY_MI2S_TX:
4467 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4468 mi2s_tx_cfg[SEN_MI2S].bit_format);
4469 rate->min = rate->max = mi2s_tx_cfg[SEN_MI2S].sample_rate;
4470 channels->min = channels->max =
4471 mi2s_tx_cfg[SEN_MI2S].channels;
4472 break;
4473
Meng Wang574f4942019-02-18 12:59:41 +08004474 case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_0:
4475 case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_1:
4476 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_0:
4477 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_1:
4478 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_2:
4479 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_3:
4480 idx = msm_cdc_dma_get_idx_from_beid(dai_link->id);
4481 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4482 cdc_dma_rx_cfg[idx].bit_format);
4483 rate->min = rate->max = cdc_dma_rx_cfg[idx].sample_rate;
4484 channels->min = channels->max = cdc_dma_rx_cfg[idx].channels;
4485 break;
4486
4487 case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_1:
4488 case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_2:
4489 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_0:
4490 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_3:
4491 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_4:
Xiaoyu Ye2228bf02018-12-12 15:47:20 -08004492 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_0:
4493 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_1:
4494 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_2:
4495 idx = msm_cdc_dma_get_idx_from_beid(dai_link->id);
4496 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
Meng Wang574f4942019-02-18 12:59:41 +08004497 cdc_dma_tx_cfg[idx].bit_format);
Xiaoyu Ye2228bf02018-12-12 15:47:20 -08004498 rate->min = rate->max = cdc_dma_tx_cfg[idx].sample_rate;
4499 channels->min = channels->max = cdc_dma_tx_cfg[idx].channels;
4500 break;
4501
Meng Wang574f4942019-02-18 12:59:41 +08004502 case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_0:
Vangala, Amarnath1b9c7892020-05-08 17:59:02 +05304503 idx = msm_cdc_dma_get_idx_from_beid(dai_link->id);
Meng Wang574f4942019-02-18 12:59:41 +08004504 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4505 SNDRV_PCM_FORMAT_S32_LE);
Vangala, Amarnath1b9c7892020-05-08 17:59:02 +05304506 rate->min = rate->max = cdc_dma_tx_cfg[idx].sample_rate;
Meng Wang574f4942019-02-18 12:59:41 +08004507 channels->min = channels->max = msm_vi_feed_tx_ch;
4508 break;
4509
Banajit Goswami83a370d2019-03-05 16:15:21 -08004510 case MSM_BACKEND_DAI_SLIMBUS_7_RX:
4511 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4512 slim_rx_cfg[SLIM_RX_7].bit_format);
4513 rate->min = rate->max = slim_rx_cfg[SLIM_RX_7].sample_rate;
4514 channels->min = channels->max =
4515 slim_rx_cfg[SLIM_RX_7].channels;
4516 break;
4517
4518 case MSM_BACKEND_DAI_SLIMBUS_7_TX:
Prasad Kumpatlad7df1232019-11-29 19:39:17 +05304519 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4520 slim_tx_cfg[SLIM_TX_7].bit_format);
Banajit Goswami83a370d2019-03-05 16:15:21 -08004521 rate->min = rate->max = slim_tx_cfg[SLIM_TX_7].sample_rate;
4522 channels->min = channels->max =
4523 slim_tx_cfg[SLIM_TX_7].channels;
4524 break;
4525
Vatsal Bucha82b30ba2019-04-17 12:43:54 +05304526 case MSM_BACKEND_DAI_SLIMBUS_8_TX:
4527 rate->min = rate->max = slim_tx_cfg[SLIM_TX_8].sample_rate;
4528 channels->min = channels->max =
4529 slim_tx_cfg[SLIM_TX_8].channels;
4530 break;
4531
Meng Wange8e53822019-03-18 10:49:50 +08004532 case MSM_BACKEND_DAI_AFE_LOOPBACK_TX:
4533 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4534 afe_loopback_tx_cfg[idx].bit_format);
4535 rate->min = rate->max = afe_loopback_tx_cfg[idx].sample_rate;
4536 channels->min = channels->max =
4537 afe_loopback_tx_cfg[idx].channels;
4538 break;
4539
Meng Wang574f4942019-02-18 12:59:41 +08004540 default:
4541 rate->min = rate->max = SAMPLING_RATE_48KHZ;
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07004542 break;
4543 }
4544
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -08004545done:
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07004546 return rc;
4547}
4548
Karthikeyan Mani5eb13422018-11-05 13:49:17 -08004549static bool msm_usbc_swap_gnd_mic(struct snd_soc_component *component, bool active)
4550{
4551 struct snd_soc_card *card = component->card;
4552 struct msm_asoc_mach_data *pdata =
4553 snd_soc_card_get_drvdata(card);
4554
4555 if (!pdata->fsa_handle)
4556 return false;
4557
4558 return fsa4480_switch_event(pdata->fsa_handle, FSA_MIC_GND_SWAP);
4559}
4560
4561static bool msm_swap_gnd_mic(struct snd_soc_component *component, bool active)
4562{
4563 int value = 0;
4564 bool ret = false;
4565 struct snd_soc_card *card;
4566 struct msm_asoc_mach_data *pdata;
4567
4568 if (!component) {
4569 pr_err("%s component is NULL\n", __func__);
4570 return false;
4571 }
4572 card = component->card;
4573 pdata = snd_soc_card_get_drvdata(card);
4574
4575 if (!pdata)
4576 return false;
4577
4578 if (wcd_mbhc_cfg.enable_usbc_analog)
4579 return msm_usbc_swap_gnd_mic(component, active);
4580
4581 /* if usbc is not defined, swap using us_euro_gpio_p */
4582 if (pdata->us_euro_gpio_p) {
4583 value = msm_cdc_pinctrl_get_state(
4584 pdata->us_euro_gpio_p);
4585 if (value)
4586 msm_cdc_pinctrl_select_sleep_state(
4587 pdata->us_euro_gpio_p);
4588 else
4589 msm_cdc_pinctrl_select_active_state(
4590 pdata->us_euro_gpio_p);
4591 dev_dbg(component->dev, "%s: swap select switch %d to %d\n",
4592 __func__, value, !value);
4593 ret = true;
4594 }
4595
4596 return ret;
4597}
4598
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07004599static int kona_tdm_snd_hw_params(struct snd_pcm_substream *substream,
4600 struct snd_pcm_hw_params *params)
4601{
4602 struct snd_soc_pcm_runtime *rtd = substream->private_data;
4603 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
4604 int ret = 0;
Vignesh Kulothungan2139a7d2019-08-07 12:07:20 -07004605 int slot_width = TDM_SLOT_WIDTH_BITS;
Vignesh Kulothungan0d196602019-11-26 16:51:55 -08004606 int channels, slots;
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07004607 unsigned int slot_mask, rate, clk_freq;
Vignesh Kulothungan2139a7d2019-08-07 12:07:20 -07004608 unsigned int *slot_offset;
4609 struct tdm_dev_config *config;
Vignesh Kulothungan0d196602019-11-26 16:51:55 -08004610 struct msm_asoc_mach_data *pdata = NULL;
Vignesh Kulothungan2139a7d2019-08-07 12:07:20 -07004611 unsigned int path_dir = 0, interface = 0, channel_interface = 0;
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07004612
4613 pr_debug("%s: dai id = 0x%x\n", __func__, cpu_dai->id);
4614
Vignesh Kulothungan0d196602019-11-26 16:51:55 -08004615 pdata = snd_soc_card_get_drvdata(rtd->card);
4616 slots = pdata->tdm_max_slots;
Vignesh Kulothungan2139a7d2019-08-07 12:07:20 -07004617 if (cpu_dai->id < AFE_PORT_ID_TDM_PORT_RANGE_START) {
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07004618 pr_err("%s: dai id 0x%x not supported\n",
4619 __func__, cpu_dai->id);
4620 return -EINVAL;
4621 }
4622
Vignesh Kulothungan2139a7d2019-08-07 12:07:20 -07004623 /* RX or TX */
4624 path_dir = cpu_dai->id % MAX_PATH;
4625
4626 /* PRI, SEC, TERT, QUAT, QUIN, ... */
4627 interface = (cpu_dai->id - AFE_PORT_ID_TDM_PORT_RANGE_START)
4628 / (MAX_PATH * TDM_PORT_MAX);
4629
4630 /* 0, 1, 2, .. 7 */
4631 channel_interface =
4632 ((cpu_dai->id - AFE_PORT_ID_TDM_PORT_RANGE_START) / MAX_PATH)
4633 % TDM_PORT_MAX;
4634
4635 pr_debug("%s: path dir: %u, interface %u, channel interface %u\n",
4636 __func__, path_dir, interface, channel_interface);
4637
4638 config = ((struct tdm_dev_config *) tdm_cfg[interface]) +
4639 (path_dir * TDM_PORT_MAX) + channel_interface;
Vignesh Kulothungan0d196602019-11-26 16:51:55 -08004640 if (!config) {
4641 pr_err("%s: tdm config is NULL\n", __func__);
4642 return -EINVAL;
4643 }
4644
Vignesh Kulothungan2139a7d2019-08-07 12:07:20 -07004645 slot_offset = config->tdm_slot_offset;
Vignesh Kulothungan0d196602019-11-26 16:51:55 -08004646 if (!slot_offset) {
4647 pr_err("%s: slot offset is NULL\n", __func__);
4648 return -EINVAL;
4649 }
Vignesh Kulothungan2139a7d2019-08-07 12:07:20 -07004650
4651 if (path_dir)
4652 channels = tdm_tx_cfg[interface][channel_interface].channels;
4653 else
4654 channels = tdm_rx_cfg[interface][channel_interface].channels;
4655
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07004656 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
4657 /*2 slot config - bits 0 and 1 set for the first two slots */
4658 slot_mask = 0x0000FFFF >> (16 - slots);
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07004659
Vignesh Kulothungan2139a7d2019-08-07 12:07:20 -07004660 pr_debug("%s: tdm rx slot_width %d slots %d slot_mask %x\n",
4661 __func__, slot_width, slots, slot_mask);
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07004662
4663 ret = snd_soc_dai_set_tdm_slot(cpu_dai, 0, slot_mask,
4664 slots, slot_width);
4665 if (ret < 0) {
4666 pr_err("%s: failed to set tdm rx slot, err:%d\n",
4667 __func__, ret);
4668 goto end;
4669 }
4670
Vignesh Kulothungan2139a7d2019-08-07 12:07:20 -07004671 pr_debug("%s: tdm rx channels: %d\n", __func__, channels);
4672
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07004673 ret = snd_soc_dai_set_channel_map(cpu_dai,
4674 0, NULL, channels, slot_offset);
4675 if (ret < 0) {
4676 pr_err("%s: failed to set tdm rx channel map, err:%d\n",
4677 __func__, ret);
4678 goto end;
4679 }
4680 } else if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) {
4681 /*2 slot config - bits 0 and 1 set for the first two slots */
4682 slot_mask = 0x0000FFFF >> (16 - slots);
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07004683
Vignesh Kulothungan2139a7d2019-08-07 12:07:20 -07004684 pr_debug("%s: tdm tx slot_width %d slots %d slot_mask %x\n",
4685 __func__, slot_width, slots, slot_mask);
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07004686
4687 ret = snd_soc_dai_set_tdm_slot(cpu_dai, slot_mask, 0,
4688 slots, slot_width);
4689 if (ret < 0) {
4690 pr_err("%s: failed to set tdm tx slot, err:%d\n",
4691 __func__, ret);
4692 goto end;
4693 }
4694
Vignesh Kulothungan2139a7d2019-08-07 12:07:20 -07004695 pr_debug("%s: tdm tx channels: %d\n", __func__, channels);
4696
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07004697 ret = snd_soc_dai_set_channel_map(cpu_dai,
4698 channels, slot_offset, 0, NULL);
4699 if (ret < 0) {
4700 pr_err("%s: failed to set tdm tx channel map, err:%d\n",
4701 __func__, ret);
4702 goto end;
4703 }
4704 } else {
4705 ret = -EINVAL;
4706 pr_err("%s: invalid use case, err:%d\n",
4707 __func__, ret);
4708 goto end;
4709 }
4710
4711 rate = params_rate(params);
4712 clk_freq = rate * slot_width * slots;
4713 ret = snd_soc_dai_set_sysclk(cpu_dai, 0, clk_freq, SND_SOC_CLOCK_OUT);
4714 if (ret < 0)
4715 pr_err("%s: failed to set tdm clk, err:%d\n",
4716 __func__, ret);
4717
4718end:
4719 return ret;
4720}
4721
Karthikeyan Mani12dcf642019-01-29 11:21:15 -08004722static int msm_get_tdm_mode(u32 port_id)
4723{
4724 int tdm_mode;
4725
4726 switch (port_id) {
4727 case AFE_PORT_ID_PRIMARY_TDM_RX:
4728 case AFE_PORT_ID_PRIMARY_TDM_TX:
4729 tdm_mode = TDM_PRI;
4730 break;
4731 case AFE_PORT_ID_SECONDARY_TDM_RX:
4732 case AFE_PORT_ID_SECONDARY_TDM_TX:
4733 tdm_mode = TDM_SEC;
4734 break;
4735 case AFE_PORT_ID_TERTIARY_TDM_RX:
4736 case AFE_PORT_ID_TERTIARY_TDM_TX:
4737 tdm_mode = TDM_TERT;
4738 break;
4739 case AFE_PORT_ID_QUATERNARY_TDM_RX:
4740 case AFE_PORT_ID_QUATERNARY_TDM_TX:
4741 tdm_mode = TDM_QUAT;
4742 break;
4743 case AFE_PORT_ID_QUINARY_TDM_RX:
4744 case AFE_PORT_ID_QUINARY_TDM_TX:
4745 tdm_mode = TDM_QUIN;
4746 break;
4747 case AFE_PORT_ID_SENARY_TDM_RX:
4748 case AFE_PORT_ID_SENARY_TDM_TX:
4749 tdm_mode = TDM_SEN;
4750 break;
4751 default:
4752 pr_err("%s: Invalid port id: %d\n", __func__, port_id);
4753 tdm_mode = -EINVAL;
4754 }
4755 return tdm_mode;
4756}
4757
4758static int kona_tdm_snd_startup(struct snd_pcm_substream *substream)
4759{
4760 int ret = 0;
4761 struct snd_soc_pcm_runtime *rtd = substream->private_data;
4762 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
4763 struct snd_soc_card *card = rtd->card;
4764 struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
4765 int tdm_mode = msm_get_tdm_mode(cpu_dai->id);
4766
4767 if (tdm_mode >= TDM_INTERFACE_MAX || tdm_mode < 0) {
4768 ret = -EINVAL;
4769 pr_err("%s: Invalid TDM interface %d\n",
4770 __func__, ret);
4771 return ret;
4772 }
4773
4774 if (pdata->mi2s_gpio_p[tdm_mode]) {
4775 if (atomic_read(&(pdata->mi2s_gpio_ref_count[tdm_mode]))
4776 == 0) {
4777 ret = msm_cdc_pinctrl_select_active_state(
4778 pdata->mi2s_gpio_p[tdm_mode]);
4779 if (ret) {
4780 pr_err("%s: TDM GPIO pinctrl set active failed with %d\n",
4781 __func__, ret);
4782 goto done;
4783 }
4784 }
4785 atomic_inc(&(pdata->mi2s_gpio_ref_count[tdm_mode]));
4786 }
4787
4788done:
4789 return ret;
4790}
4791
4792static void kona_tdm_snd_shutdown(struct snd_pcm_substream *substream)
4793{
4794 int ret = 0;
4795 struct snd_soc_pcm_runtime *rtd = substream->private_data;
4796 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
4797 struct snd_soc_card *card = rtd->card;
4798 struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
4799 int tdm_mode = msm_get_tdm_mode(cpu_dai->id);
4800
4801 if (tdm_mode >= TDM_INTERFACE_MAX || tdm_mode < 0) {
4802 ret = -EINVAL;
4803 pr_err("%s: Invalid TDM interface %d\n",
4804 __func__, ret);
4805 return;
4806 }
4807
4808 if (pdata->mi2s_gpio_p[tdm_mode]) {
4809 atomic_dec(&(pdata->mi2s_gpio_ref_count[tdm_mode]));
4810 if (atomic_read(&(pdata->mi2s_gpio_ref_count[tdm_mode]))
4811 == 0) {
4812 ret = msm_cdc_pinctrl_select_sleep_state(
4813 pdata->mi2s_gpio_p[tdm_mode]);
4814 if (ret)
4815 pr_err("%s: TDM GPIO pinctrl set sleep failed with %d\n",
4816 __func__, ret);
4817 }
4818 }
4819}
4820
4821static int kona_aux_snd_startup(struct snd_pcm_substream *substream)
4822{
4823 int ret = 0;
4824 struct snd_soc_pcm_runtime *rtd = substream->private_data;
4825 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
4826 struct snd_soc_card *card = rtd->card;
4827 struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
4828 u32 aux_mode = cpu_dai->id - 1;
4829
4830 if (aux_mode >= AUX_PCM_MAX) {
4831 ret = -EINVAL;
4832 pr_err("%s: Invalid AUX interface %d\n",
4833 __func__, ret);
4834 return ret;
4835 }
4836
4837 if (pdata->mi2s_gpio_p[aux_mode]) {
4838 if (atomic_read(&(pdata->mi2s_gpio_ref_count[aux_mode]))
4839 == 0) {
4840 ret = msm_cdc_pinctrl_select_active_state(
4841 pdata->mi2s_gpio_p[aux_mode]);
4842 if (ret) {
4843 pr_err("%s: AUX GPIO pinctrl set active failed with %d\n",
4844 __func__, ret);
4845 goto done;
4846 }
4847 }
4848 atomic_inc(&(pdata->mi2s_gpio_ref_count[aux_mode]));
4849 }
4850
4851done:
4852 return ret;
4853}
4854
4855static void kona_aux_snd_shutdown(struct snd_pcm_substream *substream)
4856{
4857 int ret = 0;
4858 struct snd_soc_pcm_runtime *rtd = substream->private_data;
4859 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
4860 struct snd_soc_card *card = rtd->card;
4861 struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
4862 u32 aux_mode = cpu_dai->id - 1;
4863
4864 if (aux_mode >= AUX_PCM_MAX) {
4865 pr_err("%s: Invalid AUX interface %d\n",
4866 __func__, ret);
4867 return;
4868 }
4869
4870 if (pdata->mi2s_gpio_p[aux_mode]) {
4871 atomic_dec(&(pdata->mi2s_gpio_ref_count[aux_mode]));
4872 if (atomic_read(&(pdata->mi2s_gpio_ref_count[aux_mode]))
4873 == 0) {
4874 ret = msm_cdc_pinctrl_select_sleep_state(
4875 pdata->mi2s_gpio_p[aux_mode]);
4876 if (ret)
4877 pr_err("%s: AUX GPIO pinctrl set sleep failed with %d\n",
4878 __func__, ret);
4879 }
4880 }
4881}
4882
Xiaoyu Yeffbdc9f2019-05-17 15:02:39 -07004883static int msm_snd_cdc_dma_startup(struct snd_pcm_substream *substream)
4884{
4885 int ret = 0;
4886 struct snd_soc_pcm_runtime *rtd = substream->private_data;
4887 struct snd_soc_dai_link *dai_link = rtd->dai_link;
4888
4889 switch (dai_link->id) {
4890 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_0:
4891 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_1:
4892 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_2:
4893 ret = kona_send_island_va_config(dai_link->id);
4894 if (ret)
4895 pr_err("%s: send island va cfg failed, err: %d\n",
4896 __func__, ret);
4897 break;
4898 }
4899
4900 return ret;
4901}
4902
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07004903static int msm_snd_cdc_dma_hw_params(struct snd_pcm_substream *substream,
4904 struct snd_pcm_hw_params *params)
4905{
4906 struct snd_soc_pcm_runtime *rtd = substream->private_data;
4907 struct snd_soc_dai *codec_dai = rtd->codec_dai;
4908 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
4909 struct snd_soc_dai_link *dai_link = rtd->dai_link;
4910
4911 int ret = 0;
4912 u32 rx_ch_cdc_dma, tx_ch_cdc_dma;
4913 u32 rx_ch_cnt = 0, tx_ch_cnt = 0;
4914 u32 user_set_tx_ch = 0;
4915 u32 user_set_rx_ch = 0;
4916 u32 ch_id;
4917
4918 ret = snd_soc_dai_get_channel_map(codec_dai,
4919 &tx_ch_cnt, &tx_ch_cdc_dma, &rx_ch_cnt,
4920 &rx_ch_cdc_dma);
4921 if (ret < 0) {
4922 pr_err("%s: failed to get codec chan map, err:%d\n",
4923 __func__, ret);
4924 goto err;
4925 }
4926
4927 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
4928 switch (dai_link->id) {
4929 case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_0:
4930 case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_1:
4931 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_0:
4932 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_1:
4933 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_2:
4934 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_3:
4935 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_4:
4936 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_5:
4937 {
4938 ch_id = msm_cdc_dma_get_idx_from_beid(dai_link->id);
4939 pr_debug("%s: id %d rx_ch=%d\n", __func__,
4940 ch_id, cdc_dma_rx_cfg[ch_id].channels);
4941 user_set_rx_ch = cdc_dma_rx_cfg[ch_id].channels;
4942 ret = snd_soc_dai_set_channel_map(cpu_dai, 0, 0,
4943 user_set_rx_ch, &rx_ch_cdc_dma);
4944 if (ret < 0) {
4945 pr_err("%s: failed to set cpu chan map, err:%d\n",
4946 __func__, ret);
4947 goto err;
4948 }
4949
4950 }
4951 break;
4952 }
4953 } else {
4954 switch (dai_link->id) {
4955 case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_0:
4956 {
4957 user_set_tx_ch = msm_vi_feed_tx_ch;
4958 }
4959 break;
4960 case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_1:
4961 case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_2:
4962 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_0:
4963 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_3:
4964 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_4:
Xiaoyu Ye2228bf02018-12-12 15:47:20 -08004965 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_0:
4966 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_1:
4967 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_2:
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07004968 {
4969 ch_id = msm_cdc_dma_get_idx_from_beid(dai_link->id);
4970 pr_debug("%s: id %d tx_ch=%d\n", __func__,
4971 ch_id, cdc_dma_tx_cfg[ch_id].channels);
4972 user_set_tx_ch = cdc_dma_tx_cfg[ch_id].channels;
4973 }
4974 break;
4975 }
4976
4977 ret = snd_soc_dai_set_channel_map(cpu_dai, user_set_tx_ch,
4978 &tx_ch_cdc_dma, 0, 0);
4979 if (ret < 0) {
4980 pr_err("%s: failed to set cpu chan map, err:%d\n",
4981 __func__, ret);
4982 goto err;
4983 }
4984 }
4985
4986err:
4987 return ret;
4988}
4989
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07004990static int msm_fe_qos_prepare(struct snd_pcm_substream *substream)
4991{
4992 cpumask_t mask;
4993
4994 if (pm_qos_request_active(&substream->latency_pm_qos_req))
4995 pm_qos_remove_request(&substream->latency_pm_qos_req);
4996
4997 cpumask_clear(&mask);
4998 cpumask_set_cpu(1, &mask); /* affine to core 1 */
4999 cpumask_set_cpu(2, &mask); /* affine to core 2 */
5000 cpumask_copy(&substream->latency_pm_qos_req.cpus_affine, &mask);
5001
5002 substream->latency_pm_qos_req.type = PM_QOS_REQ_AFFINE_CORES;
5003
5004 pm_qos_add_request(&substream->latency_pm_qos_req,
5005 PM_QOS_CPU_DMA_LATENCY,
5006 MSM_LL_QOS_VALUE);
5007 return 0;
5008}
5009
Karthikeyan Mani1a9d7502019-09-23 21:00:20 -07005010void mi2s_disable_audio_vote(struct snd_pcm_substream *substream)
5011{
5012 struct snd_soc_pcm_runtime *rtd = substream->private_data;
5013 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
5014 int index = cpu_dai->id;
5015 struct snd_soc_card *card = rtd->card;
5016 struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
5017 int sample_rate = 0;
5018
5019 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
5020 sample_rate = mi2s_rx_cfg[index].sample_rate;
5021 } else if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) {
5022 sample_rate = mi2s_tx_cfg[index].sample_rate;
5023 } else {
5024 pr_err("%s: invalid stream %d\n", __func__, substream->stream);
5025 return;
5026 }
5027
5028 if (IS_MSM_INTERFACE_MI2S(index) && IS_FRACTIONAL(sample_rate)) {
5029 if (pdata->lpass_audio_hw_vote != NULL) {
5030 if (--pdata->core_audio_vote_count == 0) {
5031 clk_disable_unprepare(
5032 pdata->lpass_audio_hw_vote);
5033 } else if (pdata->core_audio_vote_count < 0) {
5034 pr_err("%s: audio vote mismatch\n", __func__);
5035 pdata->core_audio_vote_count = 0;
5036 }
5037 } else {
5038 pr_err("%s: Invalid lpass audio hw node\n", __func__);
5039 }
5040 }
5041}
5042
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07005043static int msm_mi2s_snd_startup(struct snd_pcm_substream *substream)
5044{
5045 int ret = 0;
5046 struct snd_soc_pcm_runtime *rtd = substream->private_data;
5047 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
5048 int index = cpu_dai->id;
5049 unsigned int fmt = SND_SOC_DAIFMT_CBS_CFS;
Karthikeyan Mani12dcf642019-01-29 11:21:15 -08005050 struct snd_soc_card *card = rtd->card;
5051 struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
Karthikeyan Mani1a9d7502019-09-23 21:00:20 -07005052 int sample_rate = 0;
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07005053
5054 dev_dbg(rtd->card->dev,
5055 "%s: substream = %s stream = %d, dai name %s, dai ID %d\n",
5056 __func__, substream->name, substream->stream,
5057 cpu_dai->name, cpu_dai->id);
5058
5059 if (index < PRIM_MI2S || index >= MI2S_MAX) {
5060 ret = -EINVAL;
5061 dev_err(rtd->card->dev,
5062 "%s: CPU DAI id (%d) out of range\n",
5063 __func__, cpu_dai->id);
5064 goto err;
5065 }
5066 /*
5067 * Mutex protection in case the same MI2S
5068 * interface using for both TX and RX so
5069 * that the same clock won't be enable twice.
5070 */
5071 mutex_lock(&mi2s_intf_conf[index].lock);
Karthikeyan Mani1a9d7502019-09-23 21:00:20 -07005072 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
5073 sample_rate = mi2s_rx_cfg[index].sample_rate;
5074 } else if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) {
5075 sample_rate = mi2s_tx_cfg[index].sample_rate;
5076 } else {
5077 pr_err("%s: invalid stream %d\n", __func__, substream->stream);
5078 ret = -EINVAL;
5079 goto vote_err;
5080 }
5081
5082 if (IS_MSM_INTERFACE_MI2S(index) && IS_FRACTIONAL(sample_rate)) {
5083 if (pdata->lpass_audio_hw_vote == NULL) {
5084 dev_err(rtd->card->dev, "%s: Invalid lpass audio hw node\n",
5085 __func__);
5086 ret = -EINVAL;
5087 goto vote_err;
5088 }
5089 if (pdata->core_audio_vote_count == 0) {
5090 ret = clk_prepare_enable(pdata->lpass_audio_hw_vote);
5091 if (ret < 0) {
5092 dev_err(rtd->card->dev, "%s: audio vote error\n",
5093 __func__);
5094 goto vote_err;
5095 }
5096 }
5097 pdata->core_audio_vote_count++;
5098 }
5099
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07005100 if (++mi2s_intf_conf[index].ref_cnt == 1) {
5101 /* Check if msm needs to provide the clock to the interface */
5102 if (!mi2s_intf_conf[index].msm_is_mi2s_master) {
5103 mi2s_clk[index].clk_id = mi2s_ebit_clk[index];
5104 fmt = SND_SOC_DAIFMT_CBM_CFM;
5105 }
5106 ret = msm_mi2s_set_sclk(substream, true);
5107 if (ret < 0) {
5108 dev_err(rtd->card->dev,
5109 "%s: afe lpass clock failed to enable MI2S clock, err:%d\n",
5110 __func__, ret);
5111 goto clean_up;
5112 }
5113
5114 ret = snd_soc_dai_set_fmt(cpu_dai, fmt);
5115 if (ret < 0) {
5116 pr_err("%s: set fmt cpu dai failed for MI2S (%d), err:%d\n",
5117 __func__, index, ret);
5118 goto clk_off;
5119 }
Karthikeyan Mani12dcf642019-01-29 11:21:15 -08005120 if (pdata->mi2s_gpio_p[index]) {
5121 if (atomic_read(&(pdata->mi2s_gpio_ref_count[index]))
5122 == 0) {
5123 ret = msm_cdc_pinctrl_select_active_state(
5124 pdata->mi2s_gpio_p[index]);
5125 if (ret) {
5126 pr_err("%s: MI2S GPIO pinctrl set active failed with %d\n",
5127 __func__, ret);
5128 goto clk_off;
5129 }
5130 }
5131 atomic_inc(&(pdata->mi2s_gpio_ref_count[index]));
5132 }
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07005133 }
5134clk_off:
5135 if (ret < 0)
5136 msm_mi2s_set_sclk(substream, false);
5137clean_up:
Karthikeyan Mani1a9d7502019-09-23 21:00:20 -07005138 if (ret < 0) {
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07005139 mi2s_intf_conf[index].ref_cnt--;
Karthikeyan Mani1a9d7502019-09-23 21:00:20 -07005140 mi2s_disable_audio_vote(substream);
5141 }
5142vote_err:
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07005143 mutex_unlock(&mi2s_intf_conf[index].lock);
5144err:
5145 return ret;
5146}
5147
5148static void msm_mi2s_snd_shutdown(struct snd_pcm_substream *substream)
5149{
5150 int ret = 0;
5151 struct snd_soc_pcm_runtime *rtd = substream->private_data;
5152 int index = rtd->cpu_dai->id;
Karthikeyan Mani12dcf642019-01-29 11:21:15 -08005153 struct snd_soc_card *card = rtd->card;
5154 struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07005155
5156 pr_debug("%s(): substream = %s stream = %d\n", __func__,
5157 substream->name, substream->stream);
5158 if (index < PRIM_MI2S || index >= MI2S_MAX) {
5159 pr_err("%s:invalid MI2S DAI(%d)\n", __func__, index);
5160 return;
5161 }
5162
5163 mutex_lock(&mi2s_intf_conf[index].lock);
5164 if (--mi2s_intf_conf[index].ref_cnt == 0) {
Karthikeyan Mani12dcf642019-01-29 11:21:15 -08005165 if (pdata->mi2s_gpio_p[index]) {
5166 atomic_dec(&(pdata->mi2s_gpio_ref_count[index]));
5167 if (atomic_read(&(pdata->mi2s_gpio_ref_count[index]))
5168 == 0) {
5169 ret = msm_cdc_pinctrl_select_sleep_state(
5170 pdata->mi2s_gpio_p[index]);
5171 if (ret)
5172 pr_err("%s: MI2S GPIO pinctrl set sleep failed with %d\n",
5173 __func__, ret);
5174 }
5175 }
5176
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07005177 ret = msm_mi2s_set_sclk(substream, false);
5178 if (ret < 0)
5179 pr_err("%s:clock disable failed for MI2S (%d); ret=%d\n",
5180 __func__, index, ret);
5181 }
Karthikeyan Mani1a9d7502019-09-23 21:00:20 -07005182 mi2s_disable_audio_vote(substream);
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07005183 mutex_unlock(&mi2s_intf_conf[index].lock);
5184}
5185
Vatsal Bucha82b30ba2019-04-17 12:43:54 +05305186static int msm_wcn_hw_params_lito(struct snd_pcm_substream *substream,
5187 struct snd_pcm_hw_params *params)
5188{
5189 struct snd_soc_pcm_runtime *rtd = substream->private_data;
5190 struct snd_soc_dai *codec_dai = rtd->codec_dai;
5191 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
5192 struct snd_soc_dai_link *dai_link = rtd->dai_link;
5193 u32 rx_ch[WCN_CDC_SLIM_RX_CH_MAX], tx_ch[WCN_CDC_SLIM_TX_CH_MAX_LITO];
5194 u32 rx_ch_cnt = 0, tx_ch_cnt = 0;
5195 int ret = 0;
5196
5197 dev_dbg(rtd->dev, "%s: %s_tx_dai_id_%d\n", __func__,
5198 codec_dai->name, codec_dai->id);
5199 ret = snd_soc_dai_get_channel_map(codec_dai,
5200 &tx_ch_cnt, tx_ch, &rx_ch_cnt, rx_ch);
5201 if (ret) {
5202 dev_err(rtd->dev,
5203 "%s: failed to get BTFM codec chan map\n, err:%d\n",
5204 __func__, ret);
5205 goto err;
5206 }
5207
5208 dev_dbg(rtd->dev, "%s: tx_ch_cnt(%d) BE id %d\n",
5209 __func__, tx_ch_cnt, dai_link->id);
5210
5211 ret = snd_soc_dai_set_channel_map(cpu_dai,
5212 tx_ch_cnt, tx_ch, rx_ch_cnt, rx_ch);
5213 if (ret)
5214 dev_err(rtd->dev, "%s: failed to set cpu chan map, err:%d\n",
5215 __func__, ret);
5216
5217err:
5218 return ret;
5219}
5220
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -08005221static int msm_wcn_hw_params(struct snd_pcm_substream *substream,
5222 struct snd_pcm_hw_params *params)
5223{
5224 struct snd_soc_pcm_runtime *rtd = substream->private_data;
5225 struct snd_soc_dai *codec_dai = rtd->codec_dai;
5226 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
5227 struct snd_soc_dai_link *dai_link = rtd->dai_link;
5228 u32 rx_ch[WCN_CDC_SLIM_RX_CH_MAX], tx_ch[WCN_CDC_SLIM_TX_CH_MAX];
5229 u32 rx_ch_cnt = 0, tx_ch_cnt = 0;
5230 int ret = 0;
5231
5232 dev_dbg(rtd->dev, "%s: %s_tx_dai_id_%d\n", __func__,
5233 codec_dai->name, codec_dai->id);
5234 ret = snd_soc_dai_get_channel_map(codec_dai,
5235 &tx_ch_cnt, tx_ch, &rx_ch_cnt, rx_ch);
5236 if (ret) {
5237 dev_err(rtd->dev,
5238 "%s: failed to get BTFM codec chan map\n, err:%d\n",
5239 __func__, ret);
5240 goto err;
5241 }
5242
5243 dev_dbg(rtd->dev, "%s: tx_ch_cnt(%d) BE id %d\n",
5244 __func__, tx_ch_cnt, dai_link->id);
5245
5246 ret = snd_soc_dai_set_channel_map(cpu_dai,
5247 tx_ch_cnt, tx_ch, rx_ch_cnt, rx_ch);
5248 if (ret)
5249 dev_err(rtd->dev, "%s: failed to set cpu chan map, err:%d\n",
5250 __func__, ret);
5251
5252err:
5253 return ret;
5254}
5255
Karthikeyan Mani12dcf642019-01-29 11:21:15 -08005256static struct snd_soc_ops kona_aux_be_ops = {
5257 .startup = kona_aux_snd_startup,
5258 .shutdown = kona_aux_snd_shutdown
5259};
5260
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07005261static struct snd_soc_ops kona_tdm_be_ops = {
5262 .hw_params = kona_tdm_snd_hw_params,
Karthikeyan Mani12dcf642019-01-29 11:21:15 -08005263 .startup = kona_tdm_snd_startup,
5264 .shutdown = kona_tdm_snd_shutdown
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07005265};
5266
5267static struct snd_soc_ops msm_mi2s_be_ops = {
5268 .startup = msm_mi2s_snd_startup,
5269 .shutdown = msm_mi2s_snd_shutdown,
5270};
5271
5272static struct snd_soc_ops msm_fe_qos_ops = {
5273 .prepare = msm_fe_qos_prepare,
5274};
5275
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07005276static struct snd_soc_ops msm_cdc_dma_be_ops = {
Xiaoyu Yeffbdc9f2019-05-17 15:02:39 -07005277 .startup = msm_snd_cdc_dma_startup,
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07005278 .hw_params = msm_snd_cdc_dma_hw_params,
5279};
5280
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -08005281static struct snd_soc_ops msm_wcn_ops = {
5282 .hw_params = msm_wcn_hw_params,
5283};
5284
Vatsal Bucha82b30ba2019-04-17 12:43:54 +05305285static struct snd_soc_ops msm_wcn_ops_lito = {
5286 .hw_params = msm_wcn_hw_params_lito,
5287};
5288
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07005289static int msm_dmic_event(struct snd_soc_dapm_widget *w,
5290 struct snd_kcontrol *kcontrol, int event)
5291{
5292 struct msm_asoc_mach_data *pdata = NULL;
5293 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
5294 int ret = 0;
5295 u32 dmic_idx;
5296 int *dmic_gpio_cnt;
5297 struct device_node *dmic_gpio;
5298 char *wname;
5299
5300 wname = strpbrk(w->name, "012345");
5301 if (!wname) {
5302 dev_err(component->dev, "%s: widget not found\n", __func__);
5303 return -EINVAL;
5304 }
5305
5306 ret = kstrtouint(wname, 10, &dmic_idx);
5307 if (ret < 0) {
5308 dev_err(component->dev, "%s: Invalid DMIC line on the codec\n",
5309 __func__);
5310 return -EINVAL;
5311 }
5312
5313 pdata = snd_soc_card_get_drvdata(component->card);
5314
5315 switch (dmic_idx) {
5316 case 0:
5317 case 1:
5318 dmic_gpio_cnt = &dmic_0_1_gpio_cnt;
5319 dmic_gpio = pdata->dmic01_gpio_p;
5320 break;
5321 case 2:
5322 case 3:
5323 dmic_gpio_cnt = &dmic_2_3_gpio_cnt;
5324 dmic_gpio = pdata->dmic23_gpio_p;
5325 break;
5326 case 4:
5327 case 5:
5328 dmic_gpio_cnt = &dmic_4_5_gpio_cnt;
5329 dmic_gpio = pdata->dmic45_gpio_p;
5330 break;
5331 default:
5332 dev_err(component->dev, "%s: Invalid DMIC Selection\n",
5333 __func__);
5334 return -EINVAL;
5335 }
5336
5337 dev_dbg(component->dev, "%s: event %d DMIC%d dmic_gpio_cnt %d\n",
5338 __func__, event, dmic_idx, *dmic_gpio_cnt);
5339
5340 switch (event) {
5341 case SND_SOC_DAPM_PRE_PMU:
5342 (*dmic_gpio_cnt)++;
5343 if (*dmic_gpio_cnt == 1) {
5344 ret = msm_cdc_pinctrl_select_active_state(
5345 dmic_gpio);
5346 if (ret < 0) {
5347 pr_err("%s: gpio set cannot be activated %sd",
5348 __func__, "dmic_gpio");
5349 return ret;
5350 }
5351 }
5352
5353 break;
5354 case SND_SOC_DAPM_POST_PMD:
5355 (*dmic_gpio_cnt)--;
5356 if (*dmic_gpio_cnt == 0) {
5357 ret = msm_cdc_pinctrl_select_sleep_state(
5358 dmic_gpio);
5359 if (ret < 0) {
5360 pr_err("%s: gpio set cannot be de-activated %sd",
5361 __func__, "dmic_gpio");
5362 return ret;
5363 }
5364 }
5365 break;
5366 default:
5367 pr_err("%s: invalid DAPM event %d\n", __func__, event);
5368 return -EINVAL;
5369 }
5370 return 0;
5371}
5372
5373static const struct snd_soc_dapm_widget msm_int_dapm_widgets[] = {
5374 SND_SOC_DAPM_MIC("Analog Mic1", NULL),
5375 SND_SOC_DAPM_MIC("Analog Mic2", NULL),
5376 SND_SOC_DAPM_MIC("Analog Mic3", NULL),
5377 SND_SOC_DAPM_MIC("Analog Mic4", NULL),
Karthikeyan Mani1a111b92019-02-12 21:35:31 -08005378 SND_SOC_DAPM_MIC("Analog Mic5", NULL),
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07005379 SND_SOC_DAPM_MIC("Digital Mic0", msm_dmic_event),
5380 SND_SOC_DAPM_MIC("Digital Mic1", msm_dmic_event),
5381 SND_SOC_DAPM_MIC("Digital Mic2", msm_dmic_event),
5382 SND_SOC_DAPM_MIC("Digital Mic3", msm_dmic_event),
5383 SND_SOC_DAPM_MIC("Digital Mic4", msm_dmic_event),
5384 SND_SOC_DAPM_MIC("Digital Mic5", msm_dmic_event),
Laxminath Kasamdb79e5f2019-07-18 13:47:57 +05305385 SND_SOC_DAPM_MIC("Digital Mic6", NULL),
5386 SND_SOC_DAPM_MIC("Digital Mic7", NULL),
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07005387};
5388
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -08005389static int msm_wcn_init(struct snd_soc_pcm_runtime *rtd)
5390{
5391 unsigned int rx_ch[WCN_CDC_SLIM_RX_CH_MAX] = {157, 158};
5392 unsigned int tx_ch[WCN_CDC_SLIM_TX_CH_MAX] = {159, 160};
5393 struct snd_soc_dai *codec_dai = rtd->codec_dai;
5394
5395 return snd_soc_dai_set_channel_map(codec_dai, ARRAY_SIZE(tx_ch),
5396 tx_ch, ARRAY_SIZE(rx_ch), rx_ch);
5397}
5398
Vatsal Bucha82b30ba2019-04-17 12:43:54 +05305399static int msm_wcn_init_lito(struct snd_soc_pcm_runtime *rtd)
5400{
5401 unsigned int rx_ch[WCN_CDC_SLIM_RX_CH_MAX] = {157, 158};
5402 unsigned int tx_ch[WCN_CDC_SLIM_TX_CH_MAX_LITO] = {159, 160, 161};
5403 struct snd_soc_dai *codec_dai = rtd->codec_dai;
5404
5405 return snd_soc_dai_set_channel_map(codec_dai, ARRAY_SIZE(tx_ch),
5406 tx_ch, ARRAY_SIZE(rx_ch), rx_ch);
5407}
5408
Aditya Bavanari2d763ba2020-02-17 13:26:50 +05305409#ifndef CONFIG_TDM_DISABLE
5410static void msm_add_tdm_snd_controls(struct snd_soc_component *component)
5411{
5412 snd_soc_add_component_controls(component, msm_tdm_snd_controls,
5413 ARRAY_SIZE(msm_tdm_snd_controls));
5414}
5415#else
5416static void msm_add_tdm_snd_controls(struct snd_soc_component *component)
5417{
5418 return;
5419}
5420#endif
5421
5422#ifndef CONFIG_MI2S_DISABLE
5423static void msm_add_mi2s_snd_controls(struct snd_soc_component *component)
5424{
5425 snd_soc_add_component_controls(component, msm_mi2s_snd_controls,
5426 ARRAY_SIZE(msm_mi2s_snd_controls));
5427}
5428#else
5429static void msm_add_mi2s_snd_controls(struct snd_soc_component *component)
5430{
5431 return;
5432}
5433#endif
5434
5435#ifndef CONFIG_AUXPCM_DISABLE
5436static void msm_add_auxpcm_snd_controls(struct snd_soc_component *component)
5437{
5438 snd_soc_add_component_controls(component, msm_auxpcm_snd_controls,
5439 ARRAY_SIZE(msm_auxpcm_snd_controls));
5440}
5441#else
5442static void msm_add_auxpcm_snd_controls(struct snd_soc_component *component)
5443{
5444 return;
5445}
5446#endif
5447
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07005448static int msm_int_audrx_init(struct snd_soc_pcm_runtime *rtd)
5449{
5450 int ret = -EINVAL;
5451 struct snd_soc_component *component;
5452 struct snd_soc_dapm_context *dapm;
5453 struct snd_card *card;
5454 struct snd_info_entry *entry;
5455 struct snd_soc_component *aux_comp;
Kunlei Zhang4bfe0fe2020-03-06 21:20:07 +08005456 struct platform_device *pdev = NULL;
5457 int i = 0;
Kunlei Zhangf712be02020-06-30 21:05:46 +08005458 bool is_wcd937x_used = false;
Kunlei Zhang4bfe0fe2020-03-06 21:20:07 +08005459 char *data = NULL;
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07005460 struct msm_asoc_mach_data *pdata =
5461 snd_soc_card_get_drvdata(rtd->card);
5462
5463 component = snd_soc_rtdcom_lookup(rtd, "bolero_codec");
5464 if (!component) {
5465 pr_err("%s: could not find component for bolero_codec\n",
5466 __func__);
5467 return ret;
5468 }
5469
5470 dapm = snd_soc_component_get_dapm(component);
5471
5472 ret = snd_soc_add_component_controls(component, msm_int_snd_controls,
5473 ARRAY_SIZE(msm_int_snd_controls));
5474 if (ret < 0) {
5475 pr_err("%s: add_component_controls failed: %d\n",
5476 __func__, ret);
5477 return ret;
5478 }
5479 ret = snd_soc_add_component_controls(component, msm_common_snd_controls,
5480 ARRAY_SIZE(msm_common_snd_controls));
5481 if (ret < 0) {
5482 pr_err("%s: add common snd controls failed: %d\n",
5483 __func__, ret);
5484 return ret;
5485 }
5486
Aditya Bavanari2d763ba2020-02-17 13:26:50 +05305487 msm_add_tdm_snd_controls(component);
5488 msm_add_mi2s_snd_controls(component);
5489 msm_add_auxpcm_snd_controls(component);
5490
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07005491 snd_soc_dapm_new_controls(dapm, msm_int_dapm_widgets,
5492 ARRAY_SIZE(msm_int_dapm_widgets));
5493
5494 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic0");
5495 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic1");
5496 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic2");
5497 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic3");
Sudheer Papothi3fc2d772019-05-11 14:11:29 +05305498 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic4");
5499 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic5");
Laxminath Kasamdb79e5f2019-07-18 13:47:57 +05305500 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic6");
5501 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic7");
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07005502
5503 snd_soc_dapm_ignore_suspend(dapm, "Analog Mic1");
5504 snd_soc_dapm_ignore_suspend(dapm, "Analog Mic2");
5505 snd_soc_dapm_ignore_suspend(dapm, "Analog Mic3");
5506 snd_soc_dapm_ignore_suspend(dapm, "Analog Mic4");
Karthikeyan Mani1a111b92019-02-12 21:35:31 -08005507 snd_soc_dapm_ignore_suspend(dapm, "Analog Mic5");
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07005508
5509 snd_soc_dapm_ignore_suspend(dapm, "WSA_SPK1 OUT");
5510 snd_soc_dapm_ignore_suspend(dapm, "WSA_SPK2 OUT");
5511 snd_soc_dapm_ignore_suspend(dapm, "WSA AIF VI");
5512 snd_soc_dapm_ignore_suspend(dapm, "VIINPUT_WSA");
5513
5514 snd_soc_dapm_sync(dapm);
5515
5516 /*
5517 * Send speaker configuration only for WSA8810.
5518 * Default configuration is for WSA8815.
5519 */
5520 dev_dbg(component->dev, "%s: Number of aux devices: %d\n",
5521 __func__, rtd->card->num_aux_devs);
5522 if (rtd->card->num_aux_devs &&
5523 !list_empty(&rtd->card->component_dev_list)) {
Meng Wangbb5e0e92019-06-05 15:24:39 +08005524 list_for_each_entry(aux_comp,
5525 &rtd->card->aux_comp_list,
5526 card_aux_list) {
5527 if (aux_comp->name != NULL && (
5528 !strcmp(aux_comp->name, WSA8810_NAME_1) ||
5529 !strcmp(aux_comp->name, WSA8810_NAME_2))) {
5530 wsa_macro_set_spkr_mode(component,
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07005531 WSA_MACRO_SPKR_MODE_1);
Meng Wangbb5e0e92019-06-05 15:24:39 +08005532 wsa_macro_set_spkr_gain_offset(component,
5533 WSA_MACRO_GAIN_OFFSET_M1P5_DB);
5534 }
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07005535 }
Kunlei Zhang4bfe0fe2020-03-06 21:20:07 +08005536 }
5537
5538 for (i = 0; i < rtd->card->num_aux_devs; i++)
5539 {
5540 if (msm_aux_dev[i].name != NULL ) {
5541 if (strstr(msm_aux_dev[i].name, "wsa"))
5542 continue;
5543 }
5544
5545 if (msm_aux_dev[i].codec_of_node) {
5546 pdev = of_find_device_by_node(
5547 msm_aux_dev[i].codec_of_node);
5548
5549 if (pdev)
5550 data = (char*) of_device_get_match_data(
5551 &pdev->dev);
5552 if (data != NULL) {
5553 if (!strncmp(data, "wcd937x",
5554 sizeof("wcd937x"))) {
Kunlei Zhangf712be02020-06-30 21:05:46 +08005555 is_wcd937x_used = true;
Kunlei Zhang4bfe0fe2020-03-06 21:20:07 +08005556 break;
5557 }
5558 }
Vatsal Bucha71e0b482019-09-11 14:51:20 +05305559 }
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07005560 }
Kunlei Zhang4bfe0fe2020-03-06 21:20:07 +08005561
Kunlei Zhangf712be02020-06-30 21:05:46 +08005562 if (is_wcd937x_used) {
5563 bolero_set_port_map(component,
5564 ARRAY_SIZE(sm_port_map_wcd937x),
5565 sm_port_map_wcd937x);
5566 } else if (pdata->lito_v2_enabled) {
5567 /*
5568 * Enable tx data line3 for saipan version v2 and
5569 * write corresponding lpi register.
5570 */
5571 bolero_set_port_map(component, ARRAY_SIZE(sm_port_map_v2),
5572 sm_port_map_v2);
5573 } else {
5574 bolero_set_port_map(component, ARRAY_SIZE(sm_port_map),
5575 sm_port_map);
5576 }
5577
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07005578 card = rtd->card->snd_card;
5579 if (!pdata->codec_root) {
5580 entry = snd_info_create_subdir(card->module, "codecs",
5581 card->proc_root);
5582 if (!entry) {
5583 pr_debug("%s: Cannot create codecs module entry\n",
5584 __func__);
5585 ret = 0;
5586 goto err;
5587 }
5588 pdata->codec_root = entry;
5589 }
5590 bolero_info_create_codec_entry(pdata->codec_root, component);
Karthikeyan Mani664bd4a2019-02-21 13:30:34 -08005591 bolero_register_wake_irq(component, false);
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07005592 codec_reg_done = true;
5593 return 0;
5594err:
5595 return ret;
5596}
5597
Karthikeyan Mani5eb13422018-11-05 13:49:17 -08005598static void *def_wcd_mbhc_cal(void)
5599{
5600 void *wcd_mbhc_cal;
5601 struct wcd_mbhc_btn_detect_cfg *btn_cfg;
5602 u16 *btn_high;
5603
5604 wcd_mbhc_cal = kzalloc(WCD_MBHC_CAL_SIZE(WCD_MBHC_DEF_BUTTONS,
5605 WCD9XXX_MBHC_DEF_RLOADS), GFP_KERNEL);
5606 if (!wcd_mbhc_cal)
5607 return NULL;
5608
5609 WCD_MBHC_CAL_PLUG_TYPE_PTR(wcd_mbhc_cal)->v_hs_max = WCD_MBHC_HS_V_MAX;
5610 WCD_MBHC_CAL_BTN_DET_PTR(wcd_mbhc_cal)->num_btn = WCD_MBHC_DEF_BUTTONS;
5611 btn_cfg = WCD_MBHC_CAL_BTN_DET_PTR(wcd_mbhc_cal);
5612 btn_high = ((void *)&btn_cfg->_v_btn_low) +
5613 (sizeof(btn_cfg->_v_btn_low[0]) * btn_cfg->num_btn);
5614
5615 btn_high[0] = 75;
5616 btn_high[1] = 150;
5617 btn_high[2] = 237;
5618 btn_high[3] = 500;
5619 btn_high[4] = 500;
5620 btn_high[5] = 500;
5621 btn_high[6] = 500;
5622 btn_high[7] = 500;
5623
5624 return wcd_mbhc_cal;
5625}
5626
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07005627/* Digital audio interface glue - connects codec <---> CPU */
5628static struct snd_soc_dai_link msm_common_dai_links[] = {
5629 /* FrontEnd DAI Links */
5630 {/* hw:x,0 */
5631 .name = MSM_DAILINK_NAME(Media1),
5632 .stream_name = "MultiMedia1",
5633 .cpu_dai_name = "MultiMedia1",
5634 .platform_name = "msm-pcm-dsp.0",
5635 .dynamic = 1,
5636 .async_ops = ASYNC_DPCM_SND_SOC_PREPARE,
5637 .dpcm_playback = 1,
5638 .dpcm_capture = 1,
5639 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5640 SND_SOC_DPCM_TRIGGER_POST},
5641 .codec_dai_name = "snd-soc-dummy-dai",
5642 .codec_name = "snd-soc-dummy",
5643 .ignore_suspend = 1,
5644 /* this dainlink has playback support */
5645 .ignore_pmdown_time = 1,
5646 .id = MSM_FRONTEND_DAI_MULTIMEDIA1
5647 },
5648 {/* hw:x,1 */
5649 .name = MSM_DAILINK_NAME(Media2),
5650 .stream_name = "MultiMedia2",
5651 .cpu_dai_name = "MultiMedia2",
5652 .platform_name = "msm-pcm-dsp.0",
5653 .dynamic = 1,
5654 .dpcm_playback = 1,
5655 .dpcm_capture = 1,
5656 .codec_dai_name = "snd-soc-dummy-dai",
5657 .codec_name = "snd-soc-dummy",
5658 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5659 SND_SOC_DPCM_TRIGGER_POST},
5660 .ignore_suspend = 1,
5661 /* this dainlink has playback support */
5662 .ignore_pmdown_time = 1,
5663 .id = MSM_FRONTEND_DAI_MULTIMEDIA2,
5664 },
5665 {/* hw:x,2 */
5666 .name = "VoiceMMode1",
5667 .stream_name = "VoiceMMode1",
5668 .cpu_dai_name = "VoiceMMode1",
5669 .platform_name = "msm-pcm-voice",
5670 .dynamic = 1,
5671 .dpcm_playback = 1,
5672 .dpcm_capture = 1,
5673 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5674 SND_SOC_DPCM_TRIGGER_POST},
5675 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
5676 .ignore_suspend = 1,
5677 .ignore_pmdown_time = 1,
5678 .codec_dai_name = "snd-soc-dummy-dai",
5679 .codec_name = "snd-soc-dummy",
5680 .id = MSM_FRONTEND_DAI_VOICEMMODE1,
5681 },
5682 {/* hw:x,3 */
5683 .name = "MSM VoIP",
5684 .stream_name = "VoIP",
5685 .cpu_dai_name = "VoIP",
5686 .platform_name = "msm-voip-dsp",
5687 .dynamic = 1,
5688 .dpcm_playback = 1,
5689 .dpcm_capture = 1,
5690 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5691 SND_SOC_DPCM_TRIGGER_POST},
5692 .codec_dai_name = "snd-soc-dummy-dai",
5693 .codec_name = "snd-soc-dummy",
5694 .ignore_suspend = 1,
5695 /* this dainlink has playback support */
5696 .ignore_pmdown_time = 1,
5697 .id = MSM_FRONTEND_DAI_VOIP,
5698 },
5699 {/* hw:x,4 */
5700 .name = MSM_DAILINK_NAME(ULL),
5701 .stream_name = "MultiMedia3",
5702 .cpu_dai_name = "MultiMedia3",
5703 .platform_name = "msm-pcm-dsp.2",
5704 .dynamic = 1,
5705 .async_ops = ASYNC_DPCM_SND_SOC_PREPARE,
5706 .dpcm_playback = 1,
5707 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5708 SND_SOC_DPCM_TRIGGER_POST},
5709 .codec_dai_name = "snd-soc-dummy-dai",
5710 .codec_name = "snd-soc-dummy",
5711 .ignore_suspend = 1,
5712 /* this dainlink has playback support */
5713 .ignore_pmdown_time = 1,
5714 .id = MSM_FRONTEND_DAI_MULTIMEDIA3,
5715 },
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07005716 {/* hw:x,5 */
5717 .name = "MSM AFE-PCM RX",
5718 .stream_name = "AFE-PROXY RX",
5719 .cpu_dai_name = "msm-dai-q6-dev.241",
5720 .codec_name = "msm-stub-codec.1",
5721 .codec_dai_name = "msm-stub-rx",
5722 .platform_name = "msm-pcm-afe",
5723 .dpcm_playback = 1,
5724 .ignore_suspend = 1,
5725 /* this dainlink has playback support */
5726 .ignore_pmdown_time = 1,
5727 },
5728 {/* hw:x,6 */
5729 .name = "MSM AFE-PCM TX",
5730 .stream_name = "AFE-PROXY TX",
5731 .cpu_dai_name = "msm-dai-q6-dev.240",
5732 .codec_name = "msm-stub-codec.1",
5733 .codec_dai_name = "msm-stub-tx",
5734 .platform_name = "msm-pcm-afe",
5735 .dpcm_capture = 1,
5736 .ignore_suspend = 1,
5737 },
5738 {/* hw:x,7 */
5739 .name = MSM_DAILINK_NAME(Compress1),
5740 .stream_name = "Compress1",
5741 .cpu_dai_name = "MultiMedia4",
5742 .platform_name = "msm-compress-dsp",
5743 .dynamic = 1,
5744 .async_ops = ASYNC_DPCM_SND_SOC_HW_PARAMS,
5745 .dpcm_playback = 1,
5746 .dpcm_capture = 1,
5747 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5748 SND_SOC_DPCM_TRIGGER_POST},
5749 .codec_dai_name = "snd-soc-dummy-dai",
5750 .codec_name = "snd-soc-dummy",
5751 .ignore_suspend = 1,
5752 .ignore_pmdown_time = 1,
5753 /* this dainlink has playback support */
5754 .id = MSM_FRONTEND_DAI_MULTIMEDIA4,
5755 },
Meng Wang197cb302019-03-01 13:54:38 +08005756 /* Hostless PCM purpose */
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07005757 {/* hw:x,8 */
5758 .name = "AUXPCM Hostless",
5759 .stream_name = "AUXPCM Hostless",
5760 .cpu_dai_name = "AUXPCM_HOSTLESS",
5761 .platform_name = "msm-pcm-hostless",
5762 .dynamic = 1,
5763 .dpcm_playback = 1,
5764 .dpcm_capture = 1,
5765 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5766 SND_SOC_DPCM_TRIGGER_POST},
5767 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
5768 .ignore_suspend = 1,
5769 /* this dainlink has playback support */
5770 .ignore_pmdown_time = 1,
5771 .codec_dai_name = "snd-soc-dummy-dai",
5772 .codec_name = "snd-soc-dummy",
5773 },
5774 {/* hw:x,9 */
5775 .name = MSM_DAILINK_NAME(LowLatency),
5776 .stream_name = "MultiMedia5",
5777 .cpu_dai_name = "MultiMedia5",
5778 .platform_name = "msm-pcm-dsp.1",
5779 .dynamic = 1,
5780 .async_ops = ASYNC_DPCM_SND_SOC_PREPARE,
5781 .dpcm_playback = 1,
5782 .dpcm_capture = 1,
5783 .codec_dai_name = "snd-soc-dummy-dai",
5784 .codec_name = "snd-soc-dummy",
5785 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5786 SND_SOC_DPCM_TRIGGER_POST},
5787 .ignore_suspend = 1,
5788 /* this dainlink has playback support */
5789 .ignore_pmdown_time = 1,
5790 .id = MSM_FRONTEND_DAI_MULTIMEDIA5,
5791 .ops = &msm_fe_qos_ops,
5792 },
5793 {/* hw:x,10 */
5794 .name = "Listen 1 Audio Service",
5795 .stream_name = "Listen 1 Audio Service",
5796 .cpu_dai_name = "LSM1",
5797 .platform_name = "msm-lsm-client",
5798 .dynamic = 1,
5799 .dpcm_capture = 1,
5800 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
5801 SND_SOC_DPCM_TRIGGER_POST },
5802 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
5803 .ignore_suspend = 1,
5804 .codec_dai_name = "snd-soc-dummy-dai",
5805 .codec_name = "snd-soc-dummy",
5806 .id = MSM_FRONTEND_DAI_LSM1,
5807 },
5808 /* Multiple Tunnel instances */
5809 {/* hw:x,11 */
5810 .name = MSM_DAILINK_NAME(Compress2),
5811 .stream_name = "Compress2",
5812 .cpu_dai_name = "MultiMedia7",
5813 .platform_name = "msm-compress-dsp",
5814 .dynamic = 1,
5815 .dpcm_playback = 1,
5816 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5817 SND_SOC_DPCM_TRIGGER_POST},
5818 .codec_dai_name = "snd-soc-dummy-dai",
5819 .codec_name = "snd-soc-dummy",
5820 .ignore_suspend = 1,
5821 .ignore_pmdown_time = 1,
5822 /* this dainlink has playback support */
5823 .id = MSM_FRONTEND_DAI_MULTIMEDIA7,
5824 },
5825 {/* hw:x,12 */
5826 .name = MSM_DAILINK_NAME(MultiMedia10),
5827 .stream_name = "MultiMedia10",
5828 .cpu_dai_name = "MultiMedia10",
5829 .platform_name = "msm-pcm-dsp.1",
5830 .dynamic = 1,
5831 .dpcm_playback = 1,
5832 .dpcm_capture = 1,
5833 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5834 SND_SOC_DPCM_TRIGGER_POST},
5835 .codec_dai_name = "snd-soc-dummy-dai",
5836 .codec_name = "snd-soc-dummy",
5837 .ignore_suspend = 1,
5838 .ignore_pmdown_time = 1,
5839 /* this dainlink has playback support */
5840 .id = MSM_FRONTEND_DAI_MULTIMEDIA10,
5841 },
5842 {/* hw:x,13 */
5843 .name = MSM_DAILINK_NAME(ULL_NOIRQ),
5844 .stream_name = "MM_NOIRQ",
5845 .cpu_dai_name = "MultiMedia8",
5846 .platform_name = "msm-pcm-dsp-noirq",
5847 .dynamic = 1,
5848 .dpcm_playback = 1,
5849 .dpcm_capture = 1,
5850 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5851 SND_SOC_DPCM_TRIGGER_POST},
5852 .codec_dai_name = "snd-soc-dummy-dai",
5853 .codec_name = "snd-soc-dummy",
5854 .ignore_suspend = 1,
5855 .ignore_pmdown_time = 1,
5856 /* this dainlink has playback support */
5857 .id = MSM_FRONTEND_DAI_MULTIMEDIA8,
5858 .ops = &msm_fe_qos_ops,
5859 },
5860 /* HDMI Hostless */
5861 {/* hw:x,14 */
5862 .name = "HDMI_RX_HOSTLESS",
5863 .stream_name = "HDMI_RX_HOSTLESS",
5864 .cpu_dai_name = "HDMI_HOSTLESS",
5865 .platform_name = "msm-pcm-hostless",
5866 .dynamic = 1,
5867 .dpcm_playback = 1,
5868 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5869 SND_SOC_DPCM_TRIGGER_POST},
5870 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
5871 .ignore_suspend = 1,
5872 .ignore_pmdown_time = 1,
5873 .codec_dai_name = "snd-soc-dummy-dai",
5874 .codec_name = "snd-soc-dummy",
5875 },
5876 {/* hw:x,15 */
5877 .name = "VoiceMMode2",
5878 .stream_name = "VoiceMMode2",
5879 .cpu_dai_name = "VoiceMMode2",
5880 .platform_name = "msm-pcm-voice",
5881 .dynamic = 1,
5882 .dpcm_playback = 1,
5883 .dpcm_capture = 1,
5884 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5885 SND_SOC_DPCM_TRIGGER_POST},
5886 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
5887 .ignore_suspend = 1,
5888 .ignore_pmdown_time = 1,
5889 .codec_dai_name = "snd-soc-dummy-dai",
5890 .codec_name = "snd-soc-dummy",
5891 .id = MSM_FRONTEND_DAI_VOICEMMODE2,
5892 },
5893 /* LSM FE */
5894 {/* hw:x,16 */
5895 .name = "Listen 2 Audio Service",
5896 .stream_name = "Listen 2 Audio Service",
5897 .cpu_dai_name = "LSM2",
5898 .platform_name = "msm-lsm-client",
5899 .dynamic = 1,
5900 .dpcm_capture = 1,
5901 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
5902 SND_SOC_DPCM_TRIGGER_POST },
5903 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
5904 .ignore_suspend = 1,
5905 .codec_dai_name = "snd-soc-dummy-dai",
5906 .codec_name = "snd-soc-dummy",
5907 .id = MSM_FRONTEND_DAI_LSM2,
5908 },
5909 {/* hw:x,17 */
5910 .name = "Listen 3 Audio Service",
5911 .stream_name = "Listen 3 Audio Service",
5912 .cpu_dai_name = "LSM3",
5913 .platform_name = "msm-lsm-client",
5914 .dynamic = 1,
5915 .dpcm_capture = 1,
5916 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
5917 SND_SOC_DPCM_TRIGGER_POST },
5918 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
5919 .ignore_suspend = 1,
5920 .codec_dai_name = "snd-soc-dummy-dai",
5921 .codec_name = "snd-soc-dummy",
5922 .id = MSM_FRONTEND_DAI_LSM3,
5923 },
5924 {/* hw:x,18 */
5925 .name = "Listen 4 Audio Service",
5926 .stream_name = "Listen 4 Audio Service",
5927 .cpu_dai_name = "LSM4",
5928 .platform_name = "msm-lsm-client",
5929 .dynamic = 1,
5930 .dpcm_capture = 1,
5931 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
5932 SND_SOC_DPCM_TRIGGER_POST },
5933 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
5934 .ignore_suspend = 1,
5935 .codec_dai_name = "snd-soc-dummy-dai",
5936 .codec_name = "snd-soc-dummy",
5937 .id = MSM_FRONTEND_DAI_LSM4,
5938 },
5939 {/* hw:x,19 */
5940 .name = "Listen 5 Audio Service",
5941 .stream_name = "Listen 5 Audio Service",
5942 .cpu_dai_name = "LSM5",
5943 .platform_name = "msm-lsm-client",
5944 .dynamic = 1,
5945 .dpcm_capture = 1,
5946 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
5947 SND_SOC_DPCM_TRIGGER_POST },
5948 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
5949 .ignore_suspend = 1,
5950 .codec_dai_name = "snd-soc-dummy-dai",
5951 .codec_name = "snd-soc-dummy",
5952 .id = MSM_FRONTEND_DAI_LSM5,
5953 },
5954 {/* hw:x,20 */
5955 .name = "Listen 6 Audio Service",
5956 .stream_name = "Listen 6 Audio Service",
5957 .cpu_dai_name = "LSM6",
5958 .platform_name = "msm-lsm-client",
5959 .dynamic = 1,
5960 .dpcm_capture = 1,
5961 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
5962 SND_SOC_DPCM_TRIGGER_POST },
5963 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
5964 .ignore_suspend = 1,
5965 .codec_dai_name = "snd-soc-dummy-dai",
5966 .codec_name = "snd-soc-dummy",
5967 .id = MSM_FRONTEND_DAI_LSM6,
5968 },
5969 {/* hw:x,21 */
5970 .name = "Listen 7 Audio Service",
5971 .stream_name = "Listen 7 Audio Service",
5972 .cpu_dai_name = "LSM7",
5973 .platform_name = "msm-lsm-client",
5974 .dynamic = 1,
5975 .dpcm_capture = 1,
5976 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
5977 SND_SOC_DPCM_TRIGGER_POST },
5978 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
5979 .ignore_suspend = 1,
5980 .codec_dai_name = "snd-soc-dummy-dai",
5981 .codec_name = "snd-soc-dummy",
5982 .id = MSM_FRONTEND_DAI_LSM7,
5983 },
5984 {/* hw:x,22 */
5985 .name = "Listen 8 Audio Service",
5986 .stream_name = "Listen 8 Audio Service",
5987 .cpu_dai_name = "LSM8",
5988 .platform_name = "msm-lsm-client",
5989 .dynamic = 1,
5990 .dpcm_capture = 1,
5991 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
5992 SND_SOC_DPCM_TRIGGER_POST },
5993 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
5994 .ignore_suspend = 1,
5995 .codec_dai_name = "snd-soc-dummy-dai",
5996 .codec_name = "snd-soc-dummy",
5997 .id = MSM_FRONTEND_DAI_LSM8,
5998 },
5999 {/* hw:x,23 */
6000 .name = MSM_DAILINK_NAME(Media9),
6001 .stream_name = "MultiMedia9",
6002 .cpu_dai_name = "MultiMedia9",
6003 .platform_name = "msm-pcm-dsp.0",
6004 .dynamic = 1,
6005 .dpcm_playback = 1,
6006 .dpcm_capture = 1,
6007 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6008 SND_SOC_DPCM_TRIGGER_POST},
6009 .codec_dai_name = "snd-soc-dummy-dai",
6010 .codec_name = "snd-soc-dummy",
6011 .ignore_suspend = 1,
6012 /* this dainlink has playback support */
6013 .ignore_pmdown_time = 1,
6014 .id = MSM_FRONTEND_DAI_MULTIMEDIA9,
6015 },
6016 {/* hw:x,24 */
6017 .name = MSM_DAILINK_NAME(Compress4),
6018 .stream_name = "Compress4",
6019 .cpu_dai_name = "MultiMedia11",
6020 .platform_name = "msm-compress-dsp",
6021 .dynamic = 1,
6022 .dpcm_playback = 1,
6023 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6024 SND_SOC_DPCM_TRIGGER_POST},
6025 .codec_dai_name = "snd-soc-dummy-dai",
6026 .codec_name = "snd-soc-dummy",
6027 .ignore_suspend = 1,
6028 .ignore_pmdown_time = 1,
6029 /* this dainlink has playback support */
6030 .id = MSM_FRONTEND_DAI_MULTIMEDIA11,
6031 },
6032 {/* hw:x,25 */
6033 .name = MSM_DAILINK_NAME(Compress5),
6034 .stream_name = "Compress5",
6035 .cpu_dai_name = "MultiMedia12",
6036 .platform_name = "msm-compress-dsp",
6037 .dynamic = 1,
6038 .dpcm_playback = 1,
6039 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6040 SND_SOC_DPCM_TRIGGER_POST},
6041 .codec_dai_name = "snd-soc-dummy-dai",
6042 .codec_name = "snd-soc-dummy",
6043 .ignore_suspend = 1,
6044 .ignore_pmdown_time = 1,
6045 /* this dainlink has playback support */
6046 .id = MSM_FRONTEND_DAI_MULTIMEDIA12,
6047 },
6048 {/* hw:x,26 */
6049 .name = MSM_DAILINK_NAME(Compress6),
6050 .stream_name = "Compress6",
6051 .cpu_dai_name = "MultiMedia13",
6052 .platform_name = "msm-compress-dsp",
6053 .dynamic = 1,
6054 .dpcm_playback = 1,
6055 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6056 SND_SOC_DPCM_TRIGGER_POST},
6057 .codec_dai_name = "snd-soc-dummy-dai",
6058 .codec_name = "snd-soc-dummy",
6059 .ignore_suspend = 1,
6060 .ignore_pmdown_time = 1,
6061 /* this dainlink has playback support */
6062 .id = MSM_FRONTEND_DAI_MULTIMEDIA13,
6063 },
6064 {/* hw:x,27 */
6065 .name = MSM_DAILINK_NAME(Compress7),
6066 .stream_name = "Compress7",
6067 .cpu_dai_name = "MultiMedia14",
6068 .platform_name = "msm-compress-dsp",
6069 .dynamic = 1,
6070 .dpcm_playback = 1,
6071 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6072 SND_SOC_DPCM_TRIGGER_POST},
6073 .codec_dai_name = "snd-soc-dummy-dai",
6074 .codec_name = "snd-soc-dummy",
6075 .ignore_suspend = 1,
6076 .ignore_pmdown_time = 1,
6077 /* this dainlink has playback support */
6078 .id = MSM_FRONTEND_DAI_MULTIMEDIA14,
6079 },
6080 {/* hw:x,28 */
6081 .name = MSM_DAILINK_NAME(Compress8),
6082 .stream_name = "Compress8",
6083 .cpu_dai_name = "MultiMedia15",
6084 .platform_name = "msm-compress-dsp",
6085 .dynamic = 1,
6086 .dpcm_playback = 1,
6087 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6088 SND_SOC_DPCM_TRIGGER_POST},
6089 .codec_dai_name = "snd-soc-dummy-dai",
6090 .codec_name = "snd-soc-dummy",
6091 .ignore_suspend = 1,
6092 .ignore_pmdown_time = 1,
6093 /* this dainlink has playback support */
6094 .id = MSM_FRONTEND_DAI_MULTIMEDIA15,
6095 },
6096 {/* hw:x,29 */
6097 .name = MSM_DAILINK_NAME(ULL_NOIRQ_2),
6098 .stream_name = "MM_NOIRQ_2",
6099 .cpu_dai_name = "MultiMedia16",
6100 .platform_name = "msm-pcm-dsp-noirq",
6101 .dynamic = 1,
6102 .dpcm_playback = 1,
6103 .dpcm_capture = 1,
6104 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6105 SND_SOC_DPCM_TRIGGER_POST},
6106 .codec_dai_name = "snd-soc-dummy-dai",
6107 .codec_name = "snd-soc-dummy",
6108 .ignore_suspend = 1,
6109 .ignore_pmdown_time = 1,
6110 /* this dainlink has playback support */
6111 .id = MSM_FRONTEND_DAI_MULTIMEDIA16,
Arun Mirpuri149008c2019-07-17 17:49:49 -07006112 .ops = &msm_fe_qos_ops,
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07006113 },
6114 {/* hw:x,30 */
6115 .name = "CDC_DMA Hostless",
6116 .stream_name = "CDC_DMA Hostless",
6117 .cpu_dai_name = "CDC_DMA_HOSTLESS",
6118 .platform_name = "msm-pcm-hostless",
6119 .dynamic = 1,
6120 .dpcm_playback = 1,
6121 .dpcm_capture = 1,
6122 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6123 SND_SOC_DPCM_TRIGGER_POST},
6124 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6125 .ignore_suspend = 1,
6126 /* this dailink has playback support */
6127 .ignore_pmdown_time = 1,
6128 .codec_dai_name = "snd-soc-dummy-dai",
6129 .codec_name = "snd-soc-dummy",
6130 },
6131 {/* hw:x,31 */
6132 .name = "TX3_CDC_DMA Hostless",
6133 .stream_name = "TX3_CDC_DMA Hostless",
6134 .cpu_dai_name = "TX3_CDC_DMA_HOSTLESS",
6135 .platform_name = "msm-pcm-hostless",
6136 .dynamic = 1,
6137 .dpcm_capture = 1,
6138 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6139 SND_SOC_DPCM_TRIGGER_POST},
6140 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6141 .ignore_suspend = 1,
6142 .codec_dai_name = "snd-soc-dummy-dai",
6143 .codec_name = "snd-soc-dummy",
6144 },
Karthikeyan Manif0de7562019-03-04 16:39:41 -08006145 {/* hw:x,32 */
6146 .name = "Tertiary MI2S TX_Hostless",
6147 .stream_name = "Tertiary MI2S_TX Hostless Capture",
6148 .cpu_dai_name = "TERT_MI2S_TX_HOSTLESS",
6149 .platform_name = "msm-pcm-hostless",
6150 .dynamic = 1,
6151 .dpcm_capture = 1,
6152 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6153 SND_SOC_DPCM_TRIGGER_POST},
6154 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6155 .ignore_suspend = 1,
6156 .ignore_pmdown_time = 1,
6157 .codec_dai_name = "snd-soc-dummy-dai",
6158 .codec_name = "snd-soc-dummy",
6159 },
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07006160};
6161
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07006162static struct snd_soc_dai_link msm_bolero_fe_dai_links[] = {
Karthikeyan Manif0de7562019-03-04 16:39:41 -08006163 {/* hw:x,33 */
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07006164 .name = LPASS_BE_WSA_CDC_DMA_TX_0,
6165 .stream_name = "WSA CDC DMA0 Capture",
6166 .cpu_dai_name = "msm-dai-cdc-dma-dev.45057",
6167 .platform_name = "msm-pcm-hostless",
6168 .codec_name = "bolero_codec",
6169 .codec_dai_name = "wsa_macro_vifeedback",
6170 .id = MSM_BACKEND_DAI_WSA_CDC_DMA_TX_0,
6171 .be_hw_params_fixup = msm_be_hw_params_fixup,
6172 .ignore_suspend = 1,
6173 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6174 .ops = &msm_cdc_dma_be_ops,
6175 },
6176};
6177
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07006178static struct snd_soc_dai_link msm_common_misc_fe_dai_links[] = {
Karthikeyan Manif0de7562019-03-04 16:39:41 -08006179 {/* hw:x,34 */
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07006180 .name = MSM_DAILINK_NAME(ASM Loopback),
6181 .stream_name = "MultiMedia6",
6182 .cpu_dai_name = "MultiMedia6",
6183 .platform_name = "msm-pcm-loopback",
6184 .dynamic = 1,
6185 .dpcm_playback = 1,
6186 .dpcm_capture = 1,
6187 .codec_dai_name = "snd-soc-dummy-dai",
6188 .codec_name = "snd-soc-dummy",
6189 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6190 SND_SOC_DPCM_TRIGGER_POST},
6191 .ignore_suspend = 1,
6192 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6193 .ignore_pmdown_time = 1,
6194 .id = MSM_FRONTEND_DAI_MULTIMEDIA6,
6195 },
Karthikeyan Manif0de7562019-03-04 16:39:41 -08006196 {/* hw:x,35 */
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07006197 .name = "USB Audio Hostless",
6198 .stream_name = "USB Audio Hostless",
6199 .cpu_dai_name = "USBAUDIO_HOSTLESS",
6200 .platform_name = "msm-pcm-hostless",
6201 .dynamic = 1,
6202 .dpcm_playback = 1,
6203 .dpcm_capture = 1,
6204 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6205 SND_SOC_DPCM_TRIGGER_POST},
6206 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6207 .ignore_suspend = 1,
6208 .ignore_pmdown_time = 1,
6209 .codec_dai_name = "snd-soc-dummy-dai",
6210 .codec_name = "snd-soc-dummy",
6211 },
Karthikeyan Manif0de7562019-03-04 16:39:41 -08006212 {/* hw:x,36 */
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07006213 .name = "SLIMBUS_7 Hostless",
6214 .stream_name = "SLIMBUS_7 Hostless",
6215 .cpu_dai_name = "SLIMBUS7_HOSTLESS",
6216 .platform_name = "msm-pcm-hostless",
6217 .dynamic = 1,
6218 .dpcm_capture = 1,
6219 .dpcm_playback = 1,
6220 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6221 SND_SOC_DPCM_TRIGGER_POST},
6222 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6223 .ignore_suspend = 1,
6224 .ignore_pmdown_time = 1,
6225 .codec_dai_name = "snd-soc-dummy-dai",
6226 .codec_name = "snd-soc-dummy",
6227 },
Karthikeyan Manif0de7562019-03-04 16:39:41 -08006228 {/* hw:x,37 */
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -08006229 .name = "Compress Capture",
6230 .stream_name = "Compress9",
6231 .cpu_dai_name = "MultiMedia17",
6232 .platform_name = "msm-compress-dsp",
6233 .dynamic = 1,
6234 .dpcm_capture = 1,
6235 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6236 SND_SOC_DPCM_TRIGGER_POST},
6237 .codec_dai_name = "snd-soc-dummy-dai",
6238 .codec_name = "snd-soc-dummy",
6239 .ignore_suspend = 1,
6240 .ignore_pmdown_time = 1,
6241 .id = MSM_FRONTEND_DAI_MULTIMEDIA17,
6242 },
Vatsal Bucha82b30ba2019-04-17 12:43:54 +05306243 {/* hw:x,38 */
6244 .name = "SLIMBUS_8 Hostless",
6245 .stream_name = "SLIMBUS_8 Hostless",
6246 .cpu_dai_name = "SLIMBUS8_HOSTLESS",
6247 .platform_name = "msm-pcm-hostless",
6248 .dynamic = 1,
6249 .dpcm_capture = 1,
6250 .dpcm_playback = 1,
6251 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6252 SND_SOC_DPCM_TRIGGER_POST},
6253 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6254 .ignore_suspend = 1,
6255 .ignore_pmdown_time = 1,
6256 .codec_dai_name = "snd-soc-dummy-dai",
6257 .codec_name = "snd-soc-dummy",
6258 },
Karthikeyan Mani2176abc2019-07-11 14:41:05 -07006259 {/* hw:x,39 */
6260 .name = LPASS_BE_TX_CDC_DMA_TX_5,
6261 .stream_name = "TX CDC DMA5 Capture",
6262 .cpu_dai_name = "msm-dai-cdc-dma-dev.45115",
6263 .platform_name = "msm-pcm-hostless",
6264 .codec_name = "bolero_codec",
6265 .codec_dai_name = "tx_macro_tx3",
6266 .id = MSM_BACKEND_DAI_TX_CDC_DMA_TX_5,
6267 .be_hw_params_fixup = msm_be_hw_params_fixup,
6268 .ignore_suspend = 1,
6269 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6270 .ops = &msm_cdc_dma_be_ops,
6271 },
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07006272};
6273
6274static struct snd_soc_dai_link msm_common_be_dai_links[] = {
6275 /* Backend AFE DAI Links */
6276 {
6277 .name = LPASS_BE_AFE_PCM_RX,
6278 .stream_name = "AFE Playback",
6279 .cpu_dai_name = "msm-dai-q6-dev.224",
6280 .platform_name = "msm-pcm-routing",
6281 .codec_name = "msm-stub-codec.1",
6282 .codec_dai_name = "msm-stub-rx",
6283 .no_pcm = 1,
6284 .dpcm_playback = 1,
6285 .id = MSM_BACKEND_DAI_AFE_PCM_RX,
6286 .be_hw_params_fixup = msm_be_hw_params_fixup,
6287 /* this dainlink has playback support */
6288 .ignore_pmdown_time = 1,
6289 .ignore_suspend = 1,
6290 },
6291 {
6292 .name = LPASS_BE_AFE_PCM_TX,
6293 .stream_name = "AFE Capture",
6294 .cpu_dai_name = "msm-dai-q6-dev.225",
6295 .platform_name = "msm-pcm-routing",
6296 .codec_name = "msm-stub-codec.1",
6297 .codec_dai_name = "msm-stub-tx",
6298 .no_pcm = 1,
6299 .dpcm_capture = 1,
6300 .id = MSM_BACKEND_DAI_AFE_PCM_TX,
6301 .be_hw_params_fixup = msm_be_hw_params_fixup,
6302 .ignore_suspend = 1,
6303 },
6304 /* Incall Record Uplink BACK END DAI Link */
6305 {
6306 .name = LPASS_BE_INCALL_RECORD_TX,
6307 .stream_name = "Voice Uplink Capture",
6308 .cpu_dai_name = "msm-dai-q6-dev.32772",
6309 .platform_name = "msm-pcm-routing",
6310 .codec_name = "msm-stub-codec.1",
6311 .codec_dai_name = "msm-stub-tx",
6312 .no_pcm = 1,
6313 .dpcm_capture = 1,
6314 .id = MSM_BACKEND_DAI_INCALL_RECORD_TX,
6315 .be_hw_params_fixup = msm_be_hw_params_fixup,
6316 .ignore_suspend = 1,
6317 },
6318 /* Incall Record Downlink BACK END DAI Link */
6319 {
6320 .name = LPASS_BE_INCALL_RECORD_RX,
6321 .stream_name = "Voice Downlink Capture",
6322 .cpu_dai_name = "msm-dai-q6-dev.32771",
6323 .platform_name = "msm-pcm-routing",
6324 .codec_name = "msm-stub-codec.1",
6325 .codec_dai_name = "msm-stub-tx",
6326 .no_pcm = 1,
6327 .dpcm_capture = 1,
6328 .id = MSM_BACKEND_DAI_INCALL_RECORD_RX,
6329 .be_hw_params_fixup = msm_be_hw_params_fixup,
6330 .ignore_suspend = 1,
6331 },
6332 /* Incall Music BACK END DAI Link */
6333 {
6334 .name = LPASS_BE_VOICE_PLAYBACK_TX,
6335 .stream_name = "Voice Farend Playback",
6336 .cpu_dai_name = "msm-dai-q6-dev.32773",
6337 .platform_name = "msm-pcm-routing",
6338 .codec_name = "msm-stub-codec.1",
6339 .codec_dai_name = "msm-stub-rx",
6340 .no_pcm = 1,
6341 .dpcm_playback = 1,
6342 .id = MSM_BACKEND_DAI_VOICE_PLAYBACK_TX,
6343 .be_hw_params_fixup = msm_be_hw_params_fixup,
6344 .ignore_suspend = 1,
6345 .ignore_pmdown_time = 1,
6346 },
6347 /* Incall Music 2 BACK END DAI Link */
6348 {
6349 .name = LPASS_BE_VOICE2_PLAYBACK_TX,
6350 .stream_name = "Voice2 Farend Playback",
6351 .cpu_dai_name = "msm-dai-q6-dev.32770",
6352 .platform_name = "msm-pcm-routing",
6353 .codec_name = "msm-stub-codec.1",
6354 .codec_dai_name = "msm-stub-rx",
6355 .no_pcm = 1,
6356 .dpcm_playback = 1,
6357 .id = MSM_BACKEND_DAI_VOICE2_PLAYBACK_TX,
6358 .be_hw_params_fixup = msm_be_hw_params_fixup,
6359 .ignore_suspend = 1,
6360 .ignore_pmdown_time = 1,
6361 },
Jaideep Sharma2ef4fb22020-03-11 22:29:11 +05306362 /* Proxy Tx BACK END DAI Link */
6363 {
6364 .name = LPASS_BE_PROXY_TX,
6365 .stream_name = "Proxy Capture",
6366 .cpu_dai_name = "msm-dai-q6-dev.8195",
6367 .platform_name = "msm-pcm-routing",
6368 .codec_name = "msm-stub-codec.1",
6369 .codec_dai_name = "msm-stub-tx",
6370 .no_pcm = 1,
6371 .dpcm_capture = 1,
6372 .id = MSM_BACKEND_DAI_PROXY_TX,
6373 .ignore_suspend = 1,
6374 },
6375 /* Proxy Rx BACK END DAI Link */
6376 {
6377 .name = LPASS_BE_PROXY_RX,
6378 .stream_name = "Proxy Playback",
6379 .cpu_dai_name = "msm-dai-q6-dev.8194",
6380 .platform_name = "msm-pcm-routing",
6381 .codec_name = "msm-stub-codec.1",
6382 .codec_dai_name = "msm-stub-rx",
6383 .no_pcm = 1,
6384 .dpcm_playback = 1,
6385 .id = MSM_BACKEND_DAI_PROXY_RX,
6386 .ignore_pmdown_time = 1,
6387 .ignore_suspend = 1,
6388 },
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07006389 {
6390 .name = LPASS_BE_USB_AUDIO_RX,
6391 .stream_name = "USB Audio Playback",
6392 .cpu_dai_name = "msm-dai-q6-dev.28672",
6393 .platform_name = "msm-pcm-routing",
6394 .codec_name = "msm-stub-codec.1",
6395 .codec_dai_name = "msm-stub-rx",
Sudheer Papothiff2733c2019-05-17 01:49:27 +05306396 .dynamic_be = 1,
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07006397 .no_pcm = 1,
6398 .dpcm_playback = 1,
6399 .id = MSM_BACKEND_DAI_USB_RX,
6400 .be_hw_params_fixup = msm_be_hw_params_fixup,
6401 .ignore_pmdown_time = 1,
6402 .ignore_suspend = 1,
6403 },
6404 {
6405 .name = LPASS_BE_USB_AUDIO_TX,
6406 .stream_name = "USB Audio Capture",
6407 .cpu_dai_name = "msm-dai-q6-dev.28673",
6408 .platform_name = "msm-pcm-routing",
6409 .codec_name = "msm-stub-codec.1",
6410 .codec_dai_name = "msm-stub-tx",
6411 .no_pcm = 1,
6412 .dpcm_capture = 1,
6413 .id = MSM_BACKEND_DAI_USB_TX,
6414 .be_hw_params_fixup = msm_be_hw_params_fixup,
6415 .ignore_suspend = 1,
6416 },
Aditya Bavanari2d763ba2020-02-17 13:26:50 +05306417};
6418
6419
6420static struct snd_soc_dai_link msm_tdm_be_dai_links[] = {
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07006421 {
6422 .name = LPASS_BE_PRI_TDM_RX_0,
6423 .stream_name = "Primary TDM0 Playback",
6424 .cpu_dai_name = "msm-dai-q6-tdm.36864",
6425 .platform_name = "msm-pcm-routing",
6426 .codec_name = "msm-stub-codec.1",
6427 .codec_dai_name = "msm-stub-rx",
6428 .no_pcm = 1,
6429 .dpcm_playback = 1,
6430 .id = MSM_BACKEND_DAI_PRI_TDM_RX_0,
6431 .be_hw_params_fixup = msm_be_hw_params_fixup,
6432 .ops = &kona_tdm_be_ops,
6433 .ignore_suspend = 1,
6434 .ignore_pmdown_time = 1,
6435 },
6436 {
6437 .name = LPASS_BE_PRI_TDM_TX_0,
6438 .stream_name = "Primary TDM0 Capture",
6439 .cpu_dai_name = "msm-dai-q6-tdm.36865",
6440 .platform_name = "msm-pcm-routing",
6441 .codec_name = "msm-stub-codec.1",
6442 .codec_dai_name = "msm-stub-tx",
6443 .no_pcm = 1,
6444 .dpcm_capture = 1,
6445 .id = MSM_BACKEND_DAI_PRI_TDM_TX_0,
6446 .be_hw_params_fixup = msm_be_hw_params_fixup,
6447 .ops = &kona_tdm_be_ops,
6448 .ignore_suspend = 1,
6449 },
6450 {
6451 .name = LPASS_BE_SEC_TDM_RX_0,
6452 .stream_name = "Secondary TDM0 Playback",
6453 .cpu_dai_name = "msm-dai-q6-tdm.36880",
6454 .platform_name = "msm-pcm-routing",
6455 .codec_name = "msm-stub-codec.1",
6456 .codec_dai_name = "msm-stub-rx",
6457 .no_pcm = 1,
6458 .dpcm_playback = 1,
6459 .id = MSM_BACKEND_DAI_SEC_TDM_RX_0,
6460 .be_hw_params_fixup = msm_be_hw_params_fixup,
6461 .ops = &kona_tdm_be_ops,
6462 .ignore_suspend = 1,
6463 .ignore_pmdown_time = 1,
6464 },
6465 {
6466 .name = LPASS_BE_SEC_TDM_TX_0,
6467 .stream_name = "Secondary TDM0 Capture",
6468 .cpu_dai_name = "msm-dai-q6-tdm.36881",
6469 .platform_name = "msm-pcm-routing",
6470 .codec_name = "msm-stub-codec.1",
6471 .codec_dai_name = "msm-stub-tx",
6472 .no_pcm = 1,
6473 .dpcm_capture = 1,
6474 .id = MSM_BACKEND_DAI_SEC_TDM_TX_0,
6475 .be_hw_params_fixup = msm_be_hw_params_fixup,
6476 .ops = &kona_tdm_be_ops,
6477 .ignore_suspend = 1,
6478 },
6479 {
6480 .name = LPASS_BE_TERT_TDM_RX_0,
6481 .stream_name = "Tertiary TDM0 Playback",
6482 .cpu_dai_name = "msm-dai-q6-tdm.36896",
6483 .platform_name = "msm-pcm-routing",
6484 .codec_name = "msm-stub-codec.1",
6485 .codec_dai_name = "msm-stub-rx",
6486 .no_pcm = 1,
6487 .dpcm_playback = 1,
6488 .id = MSM_BACKEND_DAI_TERT_TDM_RX_0,
6489 .be_hw_params_fixup = msm_be_hw_params_fixup,
6490 .ops = &kona_tdm_be_ops,
6491 .ignore_suspend = 1,
6492 .ignore_pmdown_time = 1,
6493 },
6494 {
6495 .name = LPASS_BE_TERT_TDM_TX_0,
6496 .stream_name = "Tertiary TDM0 Capture",
6497 .cpu_dai_name = "msm-dai-q6-tdm.36897",
6498 .platform_name = "msm-pcm-routing",
6499 .codec_name = "msm-stub-codec.1",
6500 .codec_dai_name = "msm-stub-tx",
6501 .no_pcm = 1,
6502 .dpcm_capture = 1,
6503 .id = MSM_BACKEND_DAI_TERT_TDM_TX_0,
6504 .be_hw_params_fixup = msm_be_hw_params_fixup,
6505 .ops = &kona_tdm_be_ops,
6506 .ignore_suspend = 1,
6507 },
Karthikeyan Mani12dcf642019-01-29 11:21:15 -08006508 {
6509 .name = LPASS_BE_QUAT_TDM_RX_0,
6510 .stream_name = "Quaternary TDM0 Playback",
6511 .cpu_dai_name = "msm-dai-q6-tdm.36912",
6512 .platform_name = "msm-pcm-routing",
6513 .codec_name = "msm-stub-codec.1",
6514 .codec_dai_name = "msm-stub-rx",
6515 .no_pcm = 1,
6516 .dpcm_playback = 1,
6517 .id = MSM_BACKEND_DAI_QUAT_TDM_RX_0,
6518 .be_hw_params_fixup = msm_be_hw_params_fixup,
6519 .ops = &kona_tdm_be_ops,
6520 .ignore_suspend = 1,
6521 .ignore_pmdown_time = 1,
6522 },
6523 {
6524 .name = LPASS_BE_QUAT_TDM_TX_0,
6525 .stream_name = "Quaternary TDM0 Capture",
6526 .cpu_dai_name = "msm-dai-q6-tdm.36913",
6527 .platform_name = "msm-pcm-routing",
6528 .codec_name = "msm-stub-codec.1",
6529 .codec_dai_name = "msm-stub-tx",
6530 .no_pcm = 1,
6531 .dpcm_capture = 1,
6532 .id = MSM_BACKEND_DAI_QUAT_TDM_TX_0,
6533 .be_hw_params_fixup = msm_be_hw_params_fixup,
6534 .ops = &kona_tdm_be_ops,
6535 .ignore_suspend = 1,
6536 },
6537 {
6538 .name = LPASS_BE_QUIN_TDM_RX_0,
6539 .stream_name = "Quinary TDM0 Playback",
6540 .cpu_dai_name = "msm-dai-q6-tdm.36928",
6541 .platform_name = "msm-pcm-routing",
6542 .codec_name = "msm-stub-codec.1",
6543 .codec_dai_name = "msm-stub-rx",
6544 .no_pcm = 1,
6545 .dpcm_playback = 1,
6546 .id = MSM_BACKEND_DAI_QUIN_TDM_RX_0,
6547 .be_hw_params_fixup = msm_be_hw_params_fixup,
6548 .ops = &kona_tdm_be_ops,
6549 .ignore_suspend = 1,
6550 .ignore_pmdown_time = 1,
6551 },
6552 {
6553 .name = LPASS_BE_QUIN_TDM_TX_0,
6554 .stream_name = "Quinary TDM0 Capture",
6555 .cpu_dai_name = "msm-dai-q6-tdm.36929",
6556 .platform_name = "msm-pcm-routing",
6557 .codec_name = "msm-stub-codec.1",
6558 .codec_dai_name = "msm-stub-tx",
6559 .no_pcm = 1,
6560 .dpcm_capture = 1,
6561 .id = MSM_BACKEND_DAI_QUIN_TDM_TX_0,
6562 .be_hw_params_fixup = msm_be_hw_params_fixup,
6563 .ops = &kona_tdm_be_ops,
6564 .ignore_suspend = 1,
6565 },
6566 {
6567 .name = LPASS_BE_SEN_TDM_RX_0,
6568 .stream_name = "Senary TDM0 Playback",
6569 .cpu_dai_name = "msm-dai-q6-tdm.36944",
6570 .platform_name = "msm-pcm-routing",
6571 .codec_name = "msm-stub-codec.1",
6572 .codec_dai_name = "msm-stub-rx",
6573 .no_pcm = 1,
6574 .dpcm_playback = 1,
6575 .id = MSM_BACKEND_DAI_SEN_TDM_RX_0,
6576 .be_hw_params_fixup = msm_be_hw_params_fixup,
6577 .ops = &kona_tdm_be_ops,
6578 .ignore_suspend = 1,
6579 .ignore_pmdown_time = 1,
6580 },
6581 {
6582 .name = LPASS_BE_SEN_TDM_TX_0,
6583 .stream_name = "Senary TDM0 Capture",
6584 .cpu_dai_name = "msm-dai-q6-tdm.36945",
6585 .platform_name = "msm-pcm-routing",
6586 .codec_name = "msm-stub-codec.1",
6587 .codec_dai_name = "msm-stub-tx",
6588 .no_pcm = 1,
6589 .dpcm_capture = 1,
6590 .id = MSM_BACKEND_DAI_SEN_TDM_TX_0,
6591 .be_hw_params_fixup = msm_be_hw_params_fixup,
6592 .ops = &kona_tdm_be_ops,
6593 .ignore_suspend = 1,
6594 },
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07006595};
6596
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -08006597static struct snd_soc_dai_link msm_wcn_be_dai_links[] = {
6598 {
6599 .name = LPASS_BE_SLIMBUS_7_RX,
6600 .stream_name = "Slimbus7 Playback",
6601 .cpu_dai_name = "msm-dai-q6-dev.16398",
6602 .platform_name = "msm-pcm-routing",
6603 .codec_name = "btfmslim_slave",
6604 /* BT codec driver determines capabilities based on
6605 * dai name, bt codecdai name should always contains
6606 * supported usecase information
6607 */
6608 .codec_dai_name = "btfm_bt_sco_a2dp_slim_rx",
6609 .no_pcm = 1,
6610 .dpcm_playback = 1,
6611 .id = MSM_BACKEND_DAI_SLIMBUS_7_RX,
6612 .be_hw_params_fixup = msm_be_hw_params_fixup,
6613 .init = &msm_wcn_init,
6614 .ops = &msm_wcn_ops,
6615 /* dai link has playback support */
6616 .ignore_pmdown_time = 1,
6617 .ignore_suspend = 1,
6618 },
6619 {
6620 .name = LPASS_BE_SLIMBUS_7_TX,
6621 .stream_name = "Slimbus7 Capture",
6622 .cpu_dai_name = "msm-dai-q6-dev.16399",
6623 .platform_name = "msm-pcm-routing",
6624 .codec_name = "btfmslim_slave",
6625 .codec_dai_name = "btfm_bt_sco_slim_tx",
6626 .no_pcm = 1,
6627 .dpcm_capture = 1,
6628 .id = MSM_BACKEND_DAI_SLIMBUS_7_TX,
6629 .be_hw_params_fixup = msm_be_hw_params_fixup,
6630 .ops = &msm_wcn_ops,
6631 .ignore_suspend = 1,
6632 },
6633};
6634
Vatsal Bucha82b30ba2019-04-17 12:43:54 +05306635static struct snd_soc_dai_link msm_wcn_btfm_be_dai_links[] = {
6636 {
6637 .name = LPASS_BE_SLIMBUS_7_RX,
6638 .stream_name = "Slimbus7 Playback",
6639 .cpu_dai_name = "msm-dai-q6-dev.16398",
6640 .platform_name = "msm-pcm-routing",
6641 .codec_name = "btfmslim_slave",
6642 /* BT codec driver determines capabilities based on
6643 * dai name, bt codecdai name should always contains
6644 * supported usecase information
6645 */
6646 .codec_dai_name = "btfm_bt_sco_a2dp_slim_rx",
6647 .no_pcm = 1,
6648 .dpcm_playback = 1,
6649 .id = MSM_BACKEND_DAI_SLIMBUS_7_RX,
6650 .be_hw_params_fixup = msm_be_hw_params_fixup,
6651 .init = &msm_wcn_init_lito,
6652 .ops = &msm_wcn_ops_lito,
6653 /* dai link has playback support */
6654 .ignore_pmdown_time = 1,
6655 .ignore_suspend = 1,
6656 },
6657 {
6658 .name = LPASS_BE_SLIMBUS_7_TX,
6659 .stream_name = "Slimbus7 Capture",
6660 .cpu_dai_name = "msm-dai-q6-dev.16399",
6661 .platform_name = "msm-pcm-routing",
6662 .codec_name = "btfmslim_slave",
6663 .codec_dai_name = "btfm_bt_sco_slim_tx",
6664 .no_pcm = 1,
6665 .dpcm_capture = 1,
6666 .id = MSM_BACKEND_DAI_SLIMBUS_7_TX,
6667 .be_hw_params_fixup = msm_be_hw_params_fixup,
6668 .ops = &msm_wcn_ops_lito,
6669 .ignore_suspend = 1,
6670 },
6671 {
6672 .name = LPASS_BE_SLIMBUS_8_TX,
6673 .stream_name = "Slimbus8 Capture",
6674 .cpu_dai_name = "msm-dai-q6-dev.16401",
6675 .platform_name = "msm-pcm-routing",
6676 .codec_name = "btfmslim_slave",
6677 .codec_dai_name = "btfm_fm_slim_tx",
6678 .no_pcm = 1,
6679 .dpcm_capture = 1,
6680 .id = MSM_BACKEND_DAI_SLIMBUS_8_TX,
6681 .be_hw_params_fixup = msm_be_hw_params_fixup,
6682 .ops = &msm_wcn_ops_lito,
6683 .ignore_suspend = 1,
6684 },
6685};
6686
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -08006687static struct snd_soc_dai_link ext_disp_be_dai_link[] = {
6688 /* DISP PORT BACK END DAI Link */
6689 {
6690 .name = LPASS_BE_DISPLAY_PORT,
6691 .stream_name = "Display Port Playback",
Vignesh Kulothunganf86a3552019-07-11 15:46:25 -07006692 .cpu_dai_name = "msm-dai-q6-dp.0",
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -08006693 .platform_name = "msm-pcm-routing",
6694 .codec_name = "msm-ext-disp-audio-codec-rx",
6695 .codec_dai_name = "msm_dp_audio_codec_rx_dai",
6696 .no_pcm = 1,
6697 .dpcm_playback = 1,
6698 .id = MSM_BACKEND_DAI_DISPLAY_PORT_RX,
6699 .be_hw_params_fixup = msm_be_hw_params_fixup,
6700 .ignore_pmdown_time = 1,
6701 .ignore_suspend = 1,
6702 },
6703 /* DISP PORT 1 BACK END DAI Link */
6704 {
6705 .name = LPASS_BE_DISPLAY_PORT1,
6706 .stream_name = "Display Port1 Playback",
Vignesh Kulothunganf86a3552019-07-11 15:46:25 -07006707 .cpu_dai_name = "msm-dai-q6-dp.1",
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -08006708 .platform_name = "msm-pcm-routing",
6709 .codec_name = "msm-ext-disp-audio-codec-rx",
6710 .codec_dai_name = "msm_dp_audio_codec_rx1_dai",
6711 .no_pcm = 1,
6712 .dpcm_playback = 1,
6713 .id = MSM_BACKEND_DAI_DISPLAY_PORT_RX_1,
6714 .be_hw_params_fixup = msm_be_hw_params_fixup,
6715 .ignore_pmdown_time = 1,
6716 .ignore_suspend = 1,
6717 },
6718};
6719
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07006720static struct snd_soc_dai_link msm_mi2s_be_dai_links[] = {
6721 {
6722 .name = LPASS_BE_PRI_MI2S_RX,
6723 .stream_name = "Primary MI2S Playback",
6724 .cpu_dai_name = "msm-dai-q6-mi2s.0",
6725 .platform_name = "msm-pcm-routing",
6726 .codec_name = "msm-stub-codec.1",
6727 .codec_dai_name = "msm-stub-rx",
6728 .no_pcm = 1,
6729 .dpcm_playback = 1,
6730 .id = MSM_BACKEND_DAI_PRI_MI2S_RX,
6731 .be_hw_params_fixup = msm_be_hw_params_fixup,
6732 .ops = &msm_mi2s_be_ops,
6733 .ignore_suspend = 1,
6734 .ignore_pmdown_time = 1,
6735 },
6736 {
6737 .name = LPASS_BE_PRI_MI2S_TX,
6738 .stream_name = "Primary MI2S Capture",
6739 .cpu_dai_name = "msm-dai-q6-mi2s.0",
6740 .platform_name = "msm-pcm-routing",
6741 .codec_name = "msm-stub-codec.1",
6742 .codec_dai_name = "msm-stub-tx",
6743 .no_pcm = 1,
6744 .dpcm_capture = 1,
6745 .id = MSM_BACKEND_DAI_PRI_MI2S_TX,
6746 .be_hw_params_fixup = msm_be_hw_params_fixup,
6747 .ops = &msm_mi2s_be_ops,
6748 .ignore_suspend = 1,
6749 },
6750 {
6751 .name = LPASS_BE_SEC_MI2S_RX,
6752 .stream_name = "Secondary MI2S Playback",
6753 .cpu_dai_name = "msm-dai-q6-mi2s.1",
6754 .platform_name = "msm-pcm-routing",
6755 .codec_name = "msm-stub-codec.1",
6756 .codec_dai_name = "msm-stub-rx",
6757 .no_pcm = 1,
6758 .dpcm_playback = 1,
6759 .id = MSM_BACKEND_DAI_SECONDARY_MI2S_RX,
6760 .be_hw_params_fixup = msm_be_hw_params_fixup,
6761 .ops = &msm_mi2s_be_ops,
6762 .ignore_suspend = 1,
6763 .ignore_pmdown_time = 1,
6764 },
6765 {
6766 .name = LPASS_BE_SEC_MI2S_TX,
6767 .stream_name = "Secondary MI2S Capture",
6768 .cpu_dai_name = "msm-dai-q6-mi2s.1",
6769 .platform_name = "msm-pcm-routing",
6770 .codec_name = "msm-stub-codec.1",
6771 .codec_dai_name = "msm-stub-tx",
6772 .no_pcm = 1,
6773 .dpcm_capture = 1,
6774 .id = MSM_BACKEND_DAI_SECONDARY_MI2S_TX,
6775 .be_hw_params_fixup = msm_be_hw_params_fixup,
6776 .ops = &msm_mi2s_be_ops,
6777 .ignore_suspend = 1,
6778 },
6779 {
6780 .name = LPASS_BE_TERT_MI2S_RX,
6781 .stream_name = "Tertiary MI2S Playback",
6782 .cpu_dai_name = "msm-dai-q6-mi2s.2",
6783 .platform_name = "msm-pcm-routing",
6784 .codec_name = "msm-stub-codec.1",
6785 .codec_dai_name = "msm-stub-rx",
6786 .no_pcm = 1,
6787 .dpcm_playback = 1,
6788 .id = MSM_BACKEND_DAI_TERTIARY_MI2S_RX,
6789 .be_hw_params_fixup = msm_be_hw_params_fixup,
6790 .ops = &msm_mi2s_be_ops,
6791 .ignore_suspend = 1,
6792 .ignore_pmdown_time = 1,
6793 },
6794 {
6795 .name = LPASS_BE_TERT_MI2S_TX,
6796 .stream_name = "Tertiary MI2S Capture",
6797 .cpu_dai_name = "msm-dai-q6-mi2s.2",
6798 .platform_name = "msm-pcm-routing",
6799 .codec_name = "msm-stub-codec.1",
6800 .codec_dai_name = "msm-stub-tx",
6801 .no_pcm = 1,
6802 .dpcm_capture = 1,
6803 .id = MSM_BACKEND_DAI_TERTIARY_MI2S_TX,
6804 .be_hw_params_fixup = msm_be_hw_params_fixup,
6805 .ops = &msm_mi2s_be_ops,
6806 .ignore_suspend = 1,
6807 },
Karthikeyan Mani12dcf642019-01-29 11:21:15 -08006808 {
6809 .name = LPASS_BE_QUAT_MI2S_RX,
6810 .stream_name = "Quaternary MI2S Playback",
6811 .cpu_dai_name = "msm-dai-q6-mi2s.3",
6812 .platform_name = "msm-pcm-routing",
6813 .codec_name = "msm-stub-codec.1",
6814 .codec_dai_name = "msm-stub-rx",
6815 .no_pcm = 1,
6816 .dpcm_playback = 1,
6817 .id = MSM_BACKEND_DAI_QUATERNARY_MI2S_RX,
6818 .be_hw_params_fixup = msm_be_hw_params_fixup,
6819 .ops = &msm_mi2s_be_ops,
6820 .ignore_suspend = 1,
6821 .ignore_pmdown_time = 1,
6822 },
6823 {
6824 .name = LPASS_BE_QUAT_MI2S_TX,
6825 .stream_name = "Quaternary MI2S Capture",
6826 .cpu_dai_name = "msm-dai-q6-mi2s.3",
6827 .platform_name = "msm-pcm-routing",
6828 .codec_name = "msm-stub-codec.1",
6829 .codec_dai_name = "msm-stub-tx",
6830 .no_pcm = 1,
6831 .dpcm_capture = 1,
6832 .id = MSM_BACKEND_DAI_QUATERNARY_MI2S_TX,
6833 .be_hw_params_fixup = msm_be_hw_params_fixup,
6834 .ops = &msm_mi2s_be_ops,
6835 .ignore_suspend = 1,
6836 },
6837 {
6838 .name = LPASS_BE_QUIN_MI2S_RX,
6839 .stream_name = "Quinary MI2S Playback",
6840 .cpu_dai_name = "msm-dai-q6-mi2s.4",
6841 .platform_name = "msm-pcm-routing",
6842 .codec_name = "msm-stub-codec.1",
6843 .codec_dai_name = "msm-stub-rx",
6844 .no_pcm = 1,
6845 .dpcm_playback = 1,
6846 .id = MSM_BACKEND_DAI_QUINARY_MI2S_RX,
6847 .be_hw_params_fixup = msm_be_hw_params_fixup,
6848 .ops = &msm_mi2s_be_ops,
6849 .ignore_suspend = 1,
6850 .ignore_pmdown_time = 1,
6851 },
6852 {
6853 .name = LPASS_BE_QUIN_MI2S_TX,
6854 .stream_name = "Quinary MI2S Capture",
6855 .cpu_dai_name = "msm-dai-q6-mi2s.4",
6856 .platform_name = "msm-pcm-routing",
6857 .codec_name = "msm-stub-codec.1",
6858 .codec_dai_name = "msm-stub-tx",
6859 .no_pcm = 1,
6860 .dpcm_capture = 1,
6861 .id = MSM_BACKEND_DAI_QUINARY_MI2S_TX,
6862 .be_hw_params_fixup = msm_be_hw_params_fixup,
6863 .ops = &msm_mi2s_be_ops,
6864 .ignore_suspend = 1,
6865 },
6866 {
6867 .name = LPASS_BE_SENARY_MI2S_RX,
6868 .stream_name = "Senary MI2S Playback",
6869 .cpu_dai_name = "msm-dai-q6-mi2s.5",
6870 .platform_name = "msm-pcm-routing",
6871 .codec_name = "msm-stub-codec.1",
6872 .codec_dai_name = "msm-stub-rx",
6873 .no_pcm = 1,
6874 .dpcm_playback = 1,
6875 .id = MSM_BACKEND_DAI_SENARY_MI2S_RX,
6876 .be_hw_params_fixup = msm_be_hw_params_fixup,
6877 .ops = &msm_mi2s_be_ops,
6878 .ignore_suspend = 1,
6879 .ignore_pmdown_time = 1,
6880 },
6881 {
6882 .name = LPASS_BE_SENARY_MI2S_TX,
6883 .stream_name = "Senary MI2S Capture",
6884 .cpu_dai_name = "msm-dai-q6-mi2s.5",
6885 .platform_name = "msm-pcm-routing",
6886 .codec_name = "msm-stub-codec.1",
6887 .codec_dai_name = "msm-stub-tx",
6888 .no_pcm = 1,
6889 .dpcm_capture = 1,
6890 .id = MSM_BACKEND_DAI_SENARY_MI2S_TX,
6891 .be_hw_params_fixup = msm_be_hw_params_fixup,
6892 .ops = &msm_mi2s_be_ops,
6893 .ignore_suspend = 1,
6894 },
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07006895};
6896
6897static struct snd_soc_dai_link msm_auxpcm_be_dai_links[] = {
6898 /* Primary AUX PCM Backend DAI Links */
6899 {
6900 .name = LPASS_BE_AUXPCM_RX,
6901 .stream_name = "AUX PCM Playback",
6902 .cpu_dai_name = "msm-dai-q6-auxpcm.1",
6903 .platform_name = "msm-pcm-routing",
6904 .codec_name = "msm-stub-codec.1",
6905 .codec_dai_name = "msm-stub-rx",
6906 .no_pcm = 1,
6907 .dpcm_playback = 1,
6908 .id = MSM_BACKEND_DAI_AUXPCM_RX,
6909 .be_hw_params_fixup = msm_be_hw_params_fixup,
Karthikeyan Mani12dcf642019-01-29 11:21:15 -08006910 .ops = &kona_aux_be_ops,
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07006911 .ignore_pmdown_time = 1,
6912 .ignore_suspend = 1,
6913 },
6914 {
6915 .name = LPASS_BE_AUXPCM_TX,
6916 .stream_name = "AUX PCM Capture",
6917 .cpu_dai_name = "msm-dai-q6-auxpcm.1",
6918 .platform_name = "msm-pcm-routing",
6919 .codec_name = "msm-stub-codec.1",
6920 .codec_dai_name = "msm-stub-tx",
6921 .no_pcm = 1,
6922 .dpcm_capture = 1,
6923 .id = MSM_BACKEND_DAI_AUXPCM_TX,
6924 .be_hw_params_fixup = msm_be_hw_params_fixup,
Karthikeyan Mani12dcf642019-01-29 11:21:15 -08006925 .ops = &kona_aux_be_ops,
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07006926 .ignore_suspend = 1,
6927 },
6928 /* Secondary AUX PCM Backend DAI Links */
6929 {
6930 .name = LPASS_BE_SEC_AUXPCM_RX,
6931 .stream_name = "Sec AUX PCM Playback",
6932 .cpu_dai_name = "msm-dai-q6-auxpcm.2",
6933 .platform_name = "msm-pcm-routing",
6934 .codec_name = "msm-stub-codec.1",
6935 .codec_dai_name = "msm-stub-rx",
6936 .no_pcm = 1,
6937 .dpcm_playback = 1,
6938 .id = MSM_BACKEND_DAI_SEC_AUXPCM_RX,
6939 .be_hw_params_fixup = msm_be_hw_params_fixup,
Karthikeyan Mani12dcf642019-01-29 11:21:15 -08006940 .ops = &kona_aux_be_ops,
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07006941 .ignore_pmdown_time = 1,
6942 .ignore_suspend = 1,
6943 },
6944 {
6945 .name = LPASS_BE_SEC_AUXPCM_TX,
6946 .stream_name = "Sec AUX PCM Capture",
6947 .cpu_dai_name = "msm-dai-q6-auxpcm.2",
6948 .platform_name = "msm-pcm-routing",
6949 .codec_name = "msm-stub-codec.1",
6950 .codec_dai_name = "msm-stub-tx",
6951 .no_pcm = 1,
6952 .dpcm_capture = 1,
6953 .id = MSM_BACKEND_DAI_SEC_AUXPCM_TX,
6954 .be_hw_params_fixup = msm_be_hw_params_fixup,
Karthikeyan Mani12dcf642019-01-29 11:21:15 -08006955 .ops = &kona_aux_be_ops,
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07006956 .ignore_suspend = 1,
6957 },
6958 /* Tertiary AUX PCM Backend DAI Links */
6959 {
6960 .name = LPASS_BE_TERT_AUXPCM_RX,
6961 .stream_name = "Tert AUX PCM Playback",
6962 .cpu_dai_name = "msm-dai-q6-auxpcm.3",
6963 .platform_name = "msm-pcm-routing",
6964 .codec_name = "msm-stub-codec.1",
6965 .codec_dai_name = "msm-stub-rx",
6966 .no_pcm = 1,
6967 .dpcm_playback = 1,
6968 .id = MSM_BACKEND_DAI_TERT_AUXPCM_RX,
6969 .be_hw_params_fixup = msm_be_hw_params_fixup,
Karthikeyan Mani12dcf642019-01-29 11:21:15 -08006970 .ops = &kona_aux_be_ops,
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07006971 .ignore_suspend = 1,
6972 },
6973 {
6974 .name = LPASS_BE_TERT_AUXPCM_TX,
6975 .stream_name = "Tert AUX PCM Capture",
6976 .cpu_dai_name = "msm-dai-q6-auxpcm.3",
6977 .platform_name = "msm-pcm-routing",
6978 .codec_name = "msm-stub-codec.1",
6979 .codec_dai_name = "msm-stub-tx",
6980 .no_pcm = 1,
6981 .dpcm_capture = 1,
6982 .id = MSM_BACKEND_DAI_TERT_AUXPCM_TX,
6983 .be_hw_params_fixup = msm_be_hw_params_fixup,
Karthikeyan Mani12dcf642019-01-29 11:21:15 -08006984 .ops = &kona_aux_be_ops,
6985 .ignore_suspend = 1,
6986 },
6987 /* Quaternary AUX PCM Backend DAI Links */
6988 {
6989 .name = LPASS_BE_QUAT_AUXPCM_RX,
6990 .stream_name = "Quat AUX PCM Playback",
6991 .cpu_dai_name = "msm-dai-q6-auxpcm.4",
6992 .platform_name = "msm-pcm-routing",
6993 .codec_name = "msm-stub-codec.1",
6994 .codec_dai_name = "msm-stub-rx",
6995 .no_pcm = 1,
6996 .dpcm_playback = 1,
6997 .id = MSM_BACKEND_DAI_QUAT_AUXPCM_RX,
6998 .be_hw_params_fixup = msm_be_hw_params_fixup,
6999 .ops = &kona_aux_be_ops,
7000 .ignore_suspend = 1,
7001 },
7002 {
7003 .name = LPASS_BE_QUAT_AUXPCM_TX,
7004 .stream_name = "Quat AUX PCM Capture",
7005 .cpu_dai_name = "msm-dai-q6-auxpcm.4",
7006 .platform_name = "msm-pcm-routing",
7007 .codec_name = "msm-stub-codec.1",
7008 .codec_dai_name = "msm-stub-tx",
7009 .no_pcm = 1,
7010 .dpcm_capture = 1,
7011 .id = MSM_BACKEND_DAI_QUAT_AUXPCM_TX,
7012 .be_hw_params_fixup = msm_be_hw_params_fixup,
7013 .ops = &kona_aux_be_ops,
7014 .ignore_suspend = 1,
7015 },
7016 /* Quinary AUX PCM Backend DAI Links */
7017 {
7018 .name = LPASS_BE_QUIN_AUXPCM_RX,
7019 .stream_name = "Quin AUX PCM Playback",
7020 .cpu_dai_name = "msm-dai-q6-auxpcm.5",
7021 .platform_name = "msm-pcm-routing",
7022 .codec_name = "msm-stub-codec.1",
7023 .codec_dai_name = "msm-stub-rx",
7024 .no_pcm = 1,
7025 .dpcm_playback = 1,
7026 .id = MSM_BACKEND_DAI_QUIN_AUXPCM_RX,
7027 .be_hw_params_fixup = msm_be_hw_params_fixup,
7028 .ops = &kona_aux_be_ops,
7029 .ignore_suspend = 1,
7030 },
7031 {
7032 .name = LPASS_BE_QUIN_AUXPCM_TX,
7033 .stream_name = "Quin AUX PCM Capture",
7034 .cpu_dai_name = "msm-dai-q6-auxpcm.5",
7035 .platform_name = "msm-pcm-routing",
7036 .codec_name = "msm-stub-codec.1",
7037 .codec_dai_name = "msm-stub-tx",
7038 .no_pcm = 1,
7039 .dpcm_capture = 1,
7040 .id = MSM_BACKEND_DAI_QUIN_AUXPCM_TX,
7041 .be_hw_params_fixup = msm_be_hw_params_fixup,
7042 .ops = &kona_aux_be_ops,
7043 .ignore_suspend = 1,
7044 },
7045 /* Senary AUX PCM Backend DAI Links */
7046 {
7047 .name = LPASS_BE_SEN_AUXPCM_RX,
7048 .stream_name = "Sen AUX PCM Playback",
7049 .cpu_dai_name = "msm-dai-q6-auxpcm.6",
7050 .platform_name = "msm-pcm-routing",
7051 .codec_name = "msm-stub-codec.1",
7052 .codec_dai_name = "msm-stub-rx",
7053 .no_pcm = 1,
7054 .dpcm_playback = 1,
7055 .id = MSM_BACKEND_DAI_SEN_AUXPCM_RX,
7056 .be_hw_params_fixup = msm_be_hw_params_fixup,
7057 .ops = &kona_aux_be_ops,
7058 .ignore_suspend = 1,
7059 },
7060 {
7061 .name = LPASS_BE_SEN_AUXPCM_TX,
7062 .stream_name = "Sen AUX PCM Capture",
7063 .cpu_dai_name = "msm-dai-q6-auxpcm.6",
7064 .platform_name = "msm-pcm-routing",
7065 .codec_name = "msm-stub-codec.1",
7066 .codec_dai_name = "msm-stub-tx",
7067 .no_pcm = 1,
7068 .dpcm_capture = 1,
7069 .id = MSM_BACKEND_DAI_SEN_AUXPCM_TX,
7070 .be_hw_params_fixup = msm_be_hw_params_fixup,
7071 .ops = &kona_aux_be_ops,
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07007072 .ignore_suspend = 1,
7073 },
7074};
7075
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07007076static struct snd_soc_dai_link msm_wsa_cdc_dma_be_dai_links[] = {
7077 /* WSA CDC DMA Backend DAI Links */
7078 {
7079 .name = LPASS_BE_WSA_CDC_DMA_RX_0,
7080 .stream_name = "WSA CDC DMA0 Playback",
7081 .cpu_dai_name = "msm-dai-cdc-dma-dev.45056",
7082 .platform_name = "msm-pcm-routing",
7083 .codec_name = "bolero_codec",
7084 .codec_dai_name = "wsa_macro_rx1",
7085 .no_pcm = 1,
7086 .dpcm_playback = 1,
7087 .init = &msm_int_audrx_init,
7088 .id = MSM_BACKEND_DAI_WSA_CDC_DMA_RX_0,
7089 .be_hw_params_fixup = msm_be_hw_params_fixup,
7090 .ignore_pmdown_time = 1,
7091 .ignore_suspend = 1,
7092 .ops = &msm_cdc_dma_be_ops,
7093 },
7094 {
7095 .name = LPASS_BE_WSA_CDC_DMA_RX_1,
7096 .stream_name = "WSA CDC DMA1 Playback",
7097 .cpu_dai_name = "msm-dai-cdc-dma-dev.45058",
7098 .platform_name = "msm-pcm-routing",
7099 .codec_name = "bolero_codec",
7100 .codec_dai_name = "wsa_macro_rx_mix",
7101 .no_pcm = 1,
7102 .dpcm_playback = 1,
7103 .id = MSM_BACKEND_DAI_WSA_CDC_DMA_RX_1,
7104 .be_hw_params_fixup = msm_be_hw_params_fixup,
7105 .ignore_pmdown_time = 1,
7106 .ignore_suspend = 1,
7107 .ops = &msm_cdc_dma_be_ops,
7108 },
7109 {
7110 .name = LPASS_BE_WSA_CDC_DMA_TX_1,
7111 .stream_name = "WSA CDC DMA1 Capture",
7112 .cpu_dai_name = "msm-dai-cdc-dma-dev.45059",
7113 .platform_name = "msm-pcm-routing",
7114 .codec_name = "bolero_codec",
7115 .codec_dai_name = "wsa_macro_echo",
7116 .no_pcm = 1,
7117 .dpcm_capture = 1,
7118 .id = MSM_BACKEND_DAI_WSA_CDC_DMA_TX_1,
7119 .be_hw_params_fixup = msm_be_hw_params_fixup,
7120 .ignore_suspend = 1,
7121 .ops = &msm_cdc_dma_be_ops,
7122 },
7123};
7124
7125static struct snd_soc_dai_link msm_rx_tx_cdc_dma_be_dai_links[] = {
7126 /* RX CDC DMA Backend DAI Links */
7127 {
7128 .name = LPASS_BE_RX_CDC_DMA_RX_0,
7129 .stream_name = "RX CDC DMA0 Playback",
7130 .cpu_dai_name = "msm-dai-cdc-dma-dev.45104",
7131 .platform_name = "msm-pcm-routing",
7132 .codec_name = "bolero_codec",
7133 .codec_dai_name = "rx_macro_rx1",
Sudheer Papothiff2733c2019-05-17 01:49:27 +05307134 .dynamic_be = 1,
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07007135 .no_pcm = 1,
7136 .dpcm_playback = 1,
7137 .id = MSM_BACKEND_DAI_RX_CDC_DMA_RX_0,
7138 .be_hw_params_fixup = msm_be_hw_params_fixup,
7139 .ignore_pmdown_time = 1,
7140 .ignore_suspend = 1,
7141 .ops = &msm_cdc_dma_be_ops,
7142 },
7143 {
7144 .name = LPASS_BE_RX_CDC_DMA_RX_1,
7145 .stream_name = "RX CDC DMA1 Playback",
7146 .cpu_dai_name = "msm-dai-cdc-dma-dev.45106",
7147 .platform_name = "msm-pcm-routing",
7148 .codec_name = "bolero_codec",
7149 .codec_dai_name = "rx_macro_rx2",
Sudheer Papothiff2733c2019-05-17 01:49:27 +05307150 .dynamic_be = 1,
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07007151 .no_pcm = 1,
7152 .dpcm_playback = 1,
7153 .id = MSM_BACKEND_DAI_RX_CDC_DMA_RX_1,
7154 .be_hw_params_fixup = msm_be_hw_params_fixup,
7155 .ignore_pmdown_time = 1,
7156 .ignore_suspend = 1,
7157 .ops = &msm_cdc_dma_be_ops,
7158 },
7159 {
7160 .name = LPASS_BE_RX_CDC_DMA_RX_2,
7161 .stream_name = "RX CDC DMA2 Playback",
7162 .cpu_dai_name = "msm-dai-cdc-dma-dev.45108",
7163 .platform_name = "msm-pcm-routing",
7164 .codec_name = "bolero_codec",
7165 .codec_dai_name = "rx_macro_rx3",
Sudheer Papothiff2733c2019-05-17 01:49:27 +05307166 .dynamic_be = 1,
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07007167 .no_pcm = 1,
7168 .dpcm_playback = 1,
7169 .id = MSM_BACKEND_DAI_RX_CDC_DMA_RX_2,
7170 .be_hw_params_fixup = msm_be_hw_params_fixup,
7171 .ignore_pmdown_time = 1,
7172 .ignore_suspend = 1,
7173 .ops = &msm_cdc_dma_be_ops,
7174 },
7175 {
7176 .name = LPASS_BE_RX_CDC_DMA_RX_3,
7177 .stream_name = "RX CDC DMA3 Playback",
7178 .cpu_dai_name = "msm-dai-cdc-dma-dev.45110",
7179 .platform_name = "msm-pcm-routing",
7180 .codec_name = "bolero_codec",
7181 .codec_dai_name = "rx_macro_rx4",
Sudheer Papothiff2733c2019-05-17 01:49:27 +05307182 .dynamic_be = 1,
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07007183 .no_pcm = 1,
7184 .dpcm_playback = 1,
7185 .id = MSM_BACKEND_DAI_RX_CDC_DMA_RX_3,
7186 .be_hw_params_fixup = msm_be_hw_params_fixup,
7187 .ignore_pmdown_time = 1,
7188 .ignore_suspend = 1,
7189 .ops = &msm_cdc_dma_be_ops,
7190 },
7191 /* TX CDC DMA Backend DAI Links */
7192 {
7193 .name = LPASS_BE_TX_CDC_DMA_TX_3,
7194 .stream_name = "TX CDC DMA3 Capture",
7195 .cpu_dai_name = "msm-dai-cdc-dma-dev.45111",
7196 .platform_name = "msm-pcm-routing",
7197 .codec_name = "bolero_codec",
7198 .codec_dai_name = "tx_macro_tx1",
7199 .no_pcm = 1,
7200 .dpcm_capture = 1,
7201 .id = MSM_BACKEND_DAI_TX_CDC_DMA_TX_3,
7202 .be_hw_params_fixup = msm_be_hw_params_fixup,
7203 .ignore_suspend = 1,
7204 .ops = &msm_cdc_dma_be_ops,
7205 },
7206 {
7207 .name = LPASS_BE_TX_CDC_DMA_TX_4,
7208 .stream_name = "TX CDC DMA4 Capture",
7209 .cpu_dai_name = "msm-dai-cdc-dma-dev.45113",
7210 .platform_name = "msm-pcm-routing",
7211 .codec_name = "bolero_codec",
7212 .codec_dai_name = "tx_macro_tx2",
7213 .no_pcm = 1,
7214 .dpcm_capture = 1,
7215 .id = MSM_BACKEND_DAI_TX_CDC_DMA_TX_4,
7216 .be_hw_params_fixup = msm_be_hw_params_fixup,
7217 .ignore_suspend = 1,
7218 .ops = &msm_cdc_dma_be_ops,
7219 },
7220};
7221
Xiaoyu Ye2228bf02018-12-12 15:47:20 -08007222static struct snd_soc_dai_link msm_va_cdc_dma_be_dai_links[] = {
7223 {
7224 .name = LPASS_BE_VA_CDC_DMA_TX_0,
7225 .stream_name = "VA CDC DMA0 Capture",
7226 .cpu_dai_name = "msm-dai-cdc-dma-dev.45089",
7227 .platform_name = "msm-pcm-routing",
7228 .codec_name = "bolero_codec",
7229 .codec_dai_name = "va_macro_tx1",
7230 .no_pcm = 1,
7231 .dpcm_capture = 1,
7232 .id = MSM_BACKEND_DAI_VA_CDC_DMA_TX_0,
7233 .be_hw_params_fixup = msm_be_hw_params_fixup,
7234 .ignore_suspend = 1,
7235 .ops = &msm_cdc_dma_be_ops,
7236 },
7237 {
7238 .name = LPASS_BE_VA_CDC_DMA_TX_1,
7239 .stream_name = "VA CDC DMA1 Capture",
7240 .cpu_dai_name = "msm-dai-cdc-dma-dev.45091",
7241 .platform_name = "msm-pcm-routing",
7242 .codec_name = "bolero_codec",
7243 .codec_dai_name = "va_macro_tx2",
7244 .no_pcm = 1,
7245 .dpcm_capture = 1,
7246 .id = MSM_BACKEND_DAI_VA_CDC_DMA_TX_1,
7247 .be_hw_params_fixup = msm_be_hw_params_fixup,
7248 .ignore_suspend = 1,
7249 .ops = &msm_cdc_dma_be_ops,
7250 },
7251 {
7252 .name = LPASS_BE_VA_CDC_DMA_TX_2,
7253 .stream_name = "VA CDC DMA2 Capture",
7254 .cpu_dai_name = "msm-dai-cdc-dma-dev.45093",
7255 .platform_name = "msm-pcm-routing",
7256 .codec_name = "bolero_codec",
7257 .codec_dai_name = "va_macro_tx3",
7258 .no_pcm = 1,
7259 .dpcm_capture = 1,
7260 .id = MSM_BACKEND_DAI_VA_CDC_DMA_TX_2,
7261 .be_hw_params_fixup = msm_be_hw_params_fixup,
7262 .ignore_suspend = 1,
7263 .ops = &msm_cdc_dma_be_ops,
7264 },
7265};
7266
Meng Wange8e53822019-03-18 10:49:50 +08007267static struct snd_soc_dai_link msm_afe_rxtx_lb_be_dai_link[] = {
7268 {
7269 .name = LPASS_BE_AFE_LOOPBACK_TX,
7270 .stream_name = "AFE Loopback Capture",
7271 .cpu_dai_name = "msm-dai-q6-dev.24577",
7272 .platform_name = "msm-pcm-routing",
7273 .codec_name = "msm-stub-codec.1",
7274 .codec_dai_name = "msm-stub-tx",
7275 .no_pcm = 1,
7276 .dpcm_capture = 1,
7277 .id = MSM_BACKEND_DAI_AFE_LOOPBACK_TX,
7278 .be_hw_params_fixup = msm_be_hw_params_fixup,
7279 .ignore_pmdown_time = 1,
7280 .ignore_suspend = 1,
7281 },
7282};
7283
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07007284static struct snd_soc_dai_link msm_kona_dai_links[
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07007285 ARRAY_SIZE(msm_common_dai_links) +
7286 ARRAY_SIZE(msm_bolero_fe_dai_links) +
7287 ARRAY_SIZE(msm_common_misc_fe_dai_links) +
7288 ARRAY_SIZE(msm_common_be_dai_links) +
7289 ARRAY_SIZE(msm_mi2s_be_dai_links) +
7290 ARRAY_SIZE(msm_auxpcm_be_dai_links) +
7291 ARRAY_SIZE(msm_wsa_cdc_dma_be_dai_links) +
Xiaoyu Ye2228bf02018-12-12 15:47:20 -08007292 ARRAY_SIZE(msm_rx_tx_cdc_dma_be_dai_links) +
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -08007293 ARRAY_SIZE(msm_va_cdc_dma_be_dai_links) +
7294 ARRAY_SIZE(ext_disp_be_dai_link) +
Meng Wange8e53822019-03-18 10:49:50 +08007295 ARRAY_SIZE(msm_wcn_be_dai_links) +
Vatsal Bucha82b30ba2019-04-17 12:43:54 +05307296 ARRAY_SIZE(msm_afe_rxtx_lb_be_dai_link) +
Aditya Bavanari2d763ba2020-02-17 13:26:50 +05307297 ARRAY_SIZE(msm_wcn_btfm_be_dai_links) +
7298 ARRAY_SIZE(msm_tdm_be_dai_links)];
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07007299
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -07007300static int msm_populate_dai_link_component_of_node(
7301 struct snd_soc_card *card)
7302{
7303 int i, index, ret = 0;
7304 struct device *cdev = card->dev;
7305 struct snd_soc_dai_link *dai_link = card->dai_link;
7306 struct device_node *np;
7307
7308 if (!cdev) {
7309 dev_err(cdev, "%s: Sound card device memory NULL\n", __func__);
7310 return -ENODEV;
7311 }
7312
7313 for (i = 0; i < card->num_links; i++) {
7314 if (dai_link[i].platform_of_node && dai_link[i].cpu_of_node)
7315 continue;
7316
7317 /* populate platform_of_node for snd card dai links */
7318 if (dai_link[i].platform_name &&
7319 !dai_link[i].platform_of_node) {
7320 index = of_property_match_string(cdev->of_node,
7321 "asoc-platform-names",
7322 dai_link[i].platform_name);
7323 if (index < 0) {
7324 dev_err(cdev, "%s: No match found for platform name: %s\n",
7325 __func__, dai_link[i].platform_name);
7326 ret = index;
7327 goto err;
7328 }
7329 np = of_parse_phandle(cdev->of_node, "asoc-platform",
7330 index);
7331 if (!np) {
7332 dev_err(cdev, "%s: retrieving phandle for platform %s, index %d failed\n",
7333 __func__, dai_link[i].platform_name,
7334 index);
7335 ret = -ENODEV;
7336 goto err;
7337 }
7338 dai_link[i].platform_of_node = np;
7339 dai_link[i].platform_name = NULL;
7340 }
7341
7342 /* populate cpu_of_node for snd card dai links */
7343 if (dai_link[i].cpu_dai_name && !dai_link[i].cpu_of_node) {
7344 index = of_property_match_string(cdev->of_node,
7345 "asoc-cpu-names",
7346 dai_link[i].cpu_dai_name);
7347 if (index >= 0) {
7348 np = of_parse_phandle(cdev->of_node, "asoc-cpu",
7349 index);
7350 if (!np) {
7351 dev_err(cdev, "%s: retrieving phandle for cpu dai %s failed\n",
7352 __func__,
7353 dai_link[i].cpu_dai_name);
7354 ret = -ENODEV;
7355 goto err;
7356 }
7357 dai_link[i].cpu_of_node = np;
7358 dai_link[i].cpu_dai_name = NULL;
7359 }
7360 }
7361
7362 /* populate codec_of_node for snd card dai links */
7363 if (dai_link[i].codec_name && !dai_link[i].codec_of_node) {
7364 index = of_property_match_string(cdev->of_node,
7365 "asoc-codec-names",
7366 dai_link[i].codec_name);
7367 if (index < 0)
7368 continue;
7369 np = of_parse_phandle(cdev->of_node, "asoc-codec",
7370 index);
7371 if (!np) {
7372 dev_err(cdev, "%s: retrieving phandle for codec %s failed\n",
7373 __func__, dai_link[i].codec_name);
7374 ret = -ENODEV;
7375 goto err;
7376 }
7377 dai_link[i].codec_of_node = np;
7378 dai_link[i].codec_name = NULL;
7379 }
7380 }
7381
7382err:
7383 return ret;
7384}
7385
7386static int msm_audrx_stub_init(struct snd_soc_pcm_runtime *rtd)
7387{
7388 int ret = -EINVAL;
7389 struct snd_soc_component *component = snd_soc_rtdcom_lookup(rtd, "msm-stub-codec");
7390
7391 if (!component) {
7392 pr_err("* %s: No match for msm-stub-codec component\n", __func__);
7393 return ret;
7394 }
7395
7396 ret = snd_soc_add_component_controls(component, msm_snd_controls,
7397 ARRAY_SIZE(msm_snd_controls));
7398 if (ret < 0) {
7399 dev_err(component->dev,
7400 "%s: add_codec_controls failed, err = %d\n",
7401 __func__, ret);
7402 return ret;
7403 }
7404
7405 return ret;
7406}
7407
7408static int msm_snd_stub_hw_params(struct snd_pcm_substream *substream,
7409 struct snd_pcm_hw_params *params)
7410{
7411 return 0;
7412}
7413
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -07007414static struct snd_soc_ops msm_stub_be_ops = {
7415 .hw_params = msm_snd_stub_hw_params,
7416};
7417
7418struct snd_soc_card snd_soc_card_stub_msm = {
7419 .name = "kona-stub-snd-card",
7420};
7421
7422static struct snd_soc_dai_link msm_stub_fe_dai_links[] = {
7423 /* FrontEnd DAI Links */
7424 {
7425 .name = "MSMSTUB Media1",
7426 .stream_name = "MultiMedia1",
7427 .cpu_dai_name = "MultiMedia1",
7428 .platform_name = "msm-pcm-dsp.0",
7429 .dynamic = 1,
7430 .async_ops = ASYNC_DPCM_SND_SOC_PREPARE,
7431 .dpcm_playback = 1,
7432 .dpcm_capture = 1,
7433 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
7434 SND_SOC_DPCM_TRIGGER_POST},
7435 .codec_dai_name = "snd-soc-dummy-dai",
7436 .codec_name = "snd-soc-dummy",
7437 .ignore_suspend = 1,
7438 /* this dainlink has playback support */
7439 .ignore_pmdown_time = 1,
7440 .id = MSM_FRONTEND_DAI_MULTIMEDIA1
7441 },
7442};
7443
7444static struct snd_soc_dai_link msm_stub_be_dai_links[] = {
7445 /* Backend DAI Links */
7446 {
7447 .name = LPASS_BE_AUXPCM_RX,
7448 .stream_name = "AUX PCM Playback",
7449 .cpu_dai_name = "msm-dai-q6-auxpcm.1",
7450 .platform_name = "msm-pcm-routing",
7451 .codec_name = "msm-stub-codec.1",
7452 .codec_dai_name = "msm-stub-rx",
7453 .no_pcm = 1,
7454 .dpcm_playback = 1,
7455 .id = MSM_BACKEND_DAI_AUXPCM_RX,
7456 .init = &msm_audrx_stub_init,
7457 .be_hw_params_fixup = msm_be_hw_params_fixup,
7458 .ignore_pmdown_time = 1,
7459 .ignore_suspend = 1,
7460 .ops = &msm_stub_be_ops,
7461 },
7462 {
7463 .name = LPASS_BE_AUXPCM_TX,
7464 .stream_name = "AUX PCM Capture",
7465 .cpu_dai_name = "msm-dai-q6-auxpcm.1",
7466 .platform_name = "msm-pcm-routing",
7467 .codec_name = "msm-stub-codec.1",
7468 .codec_dai_name = "msm-stub-tx",
7469 .no_pcm = 1,
7470 .dpcm_capture = 1,
7471 .id = MSM_BACKEND_DAI_AUXPCM_TX,
7472 .be_hw_params_fixup = msm_be_hw_params_fixup,
7473 .ignore_suspend = 1,
7474 .ops = &msm_stub_be_ops,
7475 },
7476};
7477
7478static struct snd_soc_dai_link msm_stub_dai_links[
7479 ARRAY_SIZE(msm_stub_fe_dai_links) +
7480 ARRAY_SIZE(msm_stub_be_dai_links)];
7481
7482static const struct of_device_id kona_asoc_machine_of_match[] = {
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07007483 { .compatible = "qcom,kona-asoc-snd",
7484 .data = "codec"},
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -07007485 { .compatible = "qcom,kona-asoc-snd-stub",
7486 .data = "stub_codec"},
7487 {},
7488};
7489
7490static struct snd_soc_card *populate_snd_card_dailinks(struct device *dev)
7491{
7492 struct snd_soc_card *card = NULL;
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07007493 struct snd_soc_dai_link *dailink = NULL;
7494 int len_1 = 0;
7495 int len_2 = 0;
7496 int total_links = 0;
7497 int rc = 0;
7498 u32 mi2s_audio_intf = 0;
7499 u32 auxpcm_audio_intf = 0;
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -08007500 u32 val = 0;
Vatsal Bucha82b30ba2019-04-17 12:43:54 +05307501 u32 wcn_btfm_intf = 0;
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -07007502 const struct of_device_id *match;
7503
7504 match = of_match_node(kona_asoc_machine_of_match, dev->of_node);
7505 if (!match) {
7506 dev_err(dev, "%s: No DT match found for sound card\n",
7507 __func__);
7508 return NULL;
7509 }
7510
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07007511 if (!strcmp(match->data, "codec")) {
7512 card = &snd_soc_card_kona_msm;
7513
7514 memcpy(msm_kona_dai_links + total_links,
7515 msm_common_dai_links,
7516 sizeof(msm_common_dai_links));
7517 total_links += ARRAY_SIZE(msm_common_dai_links);
7518
7519 memcpy(msm_kona_dai_links + total_links,
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07007520 msm_bolero_fe_dai_links,
7521 sizeof(msm_bolero_fe_dai_links));
7522 total_links +=
7523 ARRAY_SIZE(msm_bolero_fe_dai_links);
7524
7525 memcpy(msm_kona_dai_links + total_links,
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07007526 msm_common_misc_fe_dai_links,
7527 sizeof(msm_common_misc_fe_dai_links));
7528 total_links += ARRAY_SIZE(msm_common_misc_fe_dai_links);
7529
7530 memcpy(msm_kona_dai_links + total_links,
7531 msm_common_be_dai_links,
7532 sizeof(msm_common_be_dai_links));
7533 total_links += ARRAY_SIZE(msm_common_be_dai_links);
7534
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07007535 memcpy(msm_kona_dai_links + total_links,
7536 msm_wsa_cdc_dma_be_dai_links,
7537 sizeof(msm_wsa_cdc_dma_be_dai_links));
7538 total_links +=
7539 ARRAY_SIZE(msm_wsa_cdc_dma_be_dai_links);
7540
7541 memcpy(msm_kona_dai_links + total_links,
7542 msm_rx_tx_cdc_dma_be_dai_links,
7543 sizeof(msm_rx_tx_cdc_dma_be_dai_links));
7544 total_links +=
7545 ARRAY_SIZE(msm_rx_tx_cdc_dma_be_dai_links);
7546
Xiaoyu Ye2228bf02018-12-12 15:47:20 -08007547 memcpy(msm_kona_dai_links + total_links,
7548 msm_va_cdc_dma_be_dai_links,
7549 sizeof(msm_va_cdc_dma_be_dai_links));
7550 total_links +=
7551 ARRAY_SIZE(msm_va_cdc_dma_be_dai_links);
7552
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07007553 rc = of_property_read_u32(dev->of_node, "qcom,mi2s-audio-intf",
7554 &mi2s_audio_intf);
7555 if (rc) {
7556 dev_dbg(dev, "%s: No DT match MI2S audio interface\n",
7557 __func__);
7558 } else {
7559 if (mi2s_audio_intf) {
7560 memcpy(msm_kona_dai_links + total_links,
7561 msm_mi2s_be_dai_links,
7562 sizeof(msm_mi2s_be_dai_links));
7563 total_links +=
7564 ARRAY_SIZE(msm_mi2s_be_dai_links);
7565 }
7566 }
7567
7568 rc = of_property_read_u32(dev->of_node,
7569 "qcom,auxpcm-audio-intf",
7570 &auxpcm_audio_intf);
7571 if (rc) {
7572 dev_dbg(dev, "%s: No DT match Aux PCM interface\n",
7573 __func__);
7574 } else {
7575 if (auxpcm_audio_intf) {
7576 memcpy(msm_kona_dai_links + total_links,
7577 msm_auxpcm_be_dai_links,
7578 sizeof(msm_auxpcm_be_dai_links));
7579 total_links +=
7580 ARRAY_SIZE(msm_auxpcm_be_dai_links);
7581 }
7582 }
7583
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -08007584 rc = of_property_read_u32(dev->of_node,
7585 "qcom,ext-disp-audio-rx", &val);
7586 if (!rc && val) {
7587 dev_dbg(dev, "%s(): ext disp audio support present\n",
7588 __func__);
7589 memcpy(msm_kona_dai_links + total_links,
7590 ext_disp_be_dai_link,
7591 sizeof(ext_disp_be_dai_link));
7592 total_links += ARRAY_SIZE(ext_disp_be_dai_link);
7593 }
7594
7595 rc = of_property_read_u32(dev->of_node, "qcom,wcn-bt", &val);
7596 if (!rc && val) {
7597 dev_dbg(dev, "%s(): WCN BT support present\n",
7598 __func__);
7599 memcpy(msm_kona_dai_links + total_links,
7600 msm_wcn_be_dai_links,
7601 sizeof(msm_wcn_be_dai_links));
7602 total_links += ARRAY_SIZE(msm_wcn_be_dai_links);
7603 }
7604
Meng Wange8e53822019-03-18 10:49:50 +08007605 rc = of_property_read_u32(dev->of_node, "qcom,afe-rxtx-lb",
7606 &val);
7607 if (!rc && val) {
7608 memcpy(msm_kona_dai_links + total_links,
7609 msm_afe_rxtx_lb_be_dai_link,
7610 sizeof(msm_afe_rxtx_lb_be_dai_link));
7611 total_links +=
7612 ARRAY_SIZE(msm_afe_rxtx_lb_be_dai_link);
7613 }
Vatsal Bucha82b30ba2019-04-17 12:43:54 +05307614
Aditya Bavanari2d763ba2020-02-17 13:26:50 +05307615 rc = of_property_read_u32(dev->of_node, "qcom,tdm-audio-intf",
7616 &val);
7617 if (!rc && val) {
7618 memcpy(msm_kona_dai_links + total_links,
7619 msm_tdm_be_dai_links,
7620 sizeof(msm_tdm_be_dai_links));
7621 total_links +=
7622 ARRAY_SIZE(msm_tdm_be_dai_links);
7623 }
7624
Vatsal Bucha82b30ba2019-04-17 12:43:54 +05307625 rc = of_property_read_u32(dev->of_node, "qcom,wcn-btfm",
7626 &wcn_btfm_intf);
7627 if (rc) {
7628 dev_dbg(dev, "%s: No DT match wcn btfm interface\n",
7629 __func__);
7630 } else {
7631 if (wcn_btfm_intf) {
7632 memcpy(msm_kona_dai_links + total_links,
7633 msm_wcn_btfm_be_dai_links,
7634 sizeof(msm_wcn_btfm_be_dai_links));
7635 total_links +=
7636 ARRAY_SIZE(msm_wcn_btfm_be_dai_links);
7637 }
7638 }
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07007639 dailink = msm_kona_dai_links;
7640 } else if(!strcmp(match->data, "stub_codec")) {
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -07007641 card = &snd_soc_card_stub_msm;
7642 len_1 = ARRAY_SIZE(msm_stub_fe_dai_links);
7643 len_2 = len_1 + ARRAY_SIZE(msm_stub_be_dai_links);
7644
7645 memcpy(msm_stub_dai_links,
7646 msm_stub_fe_dai_links,
7647 sizeof(msm_stub_fe_dai_links));
7648 memcpy(msm_stub_dai_links + len_1,
7649 msm_stub_be_dai_links,
7650 sizeof(msm_stub_be_dai_links));
7651
7652 dailink = msm_stub_dai_links;
7653 total_links = len_2;
7654 }
7655
7656 if (card) {
7657 card->dai_link = dailink;
7658 card->num_links = total_links;
7659 }
7660
7661 return card;
7662}
7663
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07007664static int msm_wsa881x_init(struct snd_soc_component *component)
7665{
7666 u8 spkleft_ports[WSA881X_MAX_SWR_PORTS] = {0, 1, 2, 3};
7667 u8 spkright_ports[WSA881X_MAX_SWR_PORTS] = {0, 1, 2, 3};
7668 u8 spkleft_port_types[WSA881X_MAX_SWR_PORTS] = {SPKR_L, SPKR_L_COMP,
7669 SPKR_L_BOOST, SPKR_L_VI};
7670 u8 spkright_port_types[WSA881X_MAX_SWR_PORTS] = {SPKR_R, SPKR_R_COMP,
7671 SPKR_R_BOOST, SPKR_R_VI};
7672 unsigned int ch_rate[WSA881X_MAX_SWR_PORTS] = {2400, 600, 300, 1200};
7673 unsigned int ch_mask[WSA881X_MAX_SWR_PORTS] = {0x1, 0xF, 0x3, 0x3};
7674 struct msm_asoc_mach_data *pdata;
7675 struct snd_soc_dapm_context *dapm;
7676 struct snd_card *card;
7677 struct snd_info_entry *entry;
7678 int ret = 0;
7679
7680 if (!component) {
7681 pr_err("%s component is NULL\n", __func__);
7682 return -EINVAL;
7683 }
7684
7685 card = component->card->snd_card;
7686 dapm = snd_soc_component_get_dapm(component);
7687
7688 if (!strcmp(component->name_prefix, "SpkrLeft")) {
7689 dev_dbg(component->dev, "%s: setting left ch map to codec %s\n",
7690 __func__, component->name);
Laxminath Kasam99690f12020-03-15 15:38:21 +05307691 if (strnstr(component->name, "wsa883x", sizeof(component->name)))
7692 wsa883x_set_channel_map(component, &spkleft_ports[0],
7693 WSA881X_MAX_SWR_PORTS, &ch_mask[0],
7694 &ch_rate[0], &spkleft_port_types[0]);
7695 else
7696 wsa881x_set_channel_map(component, &spkleft_ports[0],
7697 WSA881X_MAX_SWR_PORTS, &ch_mask[0],
7698 &ch_rate[0], &spkleft_port_types[0]);
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07007699 if (dapm->component) {
7700 snd_soc_dapm_ignore_suspend(dapm, "SpkrLeft IN");
7701 snd_soc_dapm_ignore_suspend(dapm, "SpkrLeft SPKR");
7702 }
7703 } else if (!strcmp(component->name_prefix, "SpkrRight")) {
7704 dev_dbg(component->dev, "%s: setting right ch map to codec %s\n",
7705 __func__, component->name);
Laxminath Kasam99690f12020-03-15 15:38:21 +05307706 if (strnstr(component->name, "wsa883x", sizeof(component->name)))
7707 wsa883x_set_channel_map(component, &spkright_ports[0],
7708 WSA881X_MAX_SWR_PORTS, &ch_mask[0],
7709 &ch_rate[0], &spkright_port_types[0]);
7710 else
7711 wsa881x_set_channel_map(component, &spkright_ports[0],
7712 WSA881X_MAX_SWR_PORTS, &ch_mask[0],
7713 &ch_rate[0], &spkright_port_types[0]);
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07007714 if (dapm->component) {
7715 snd_soc_dapm_ignore_suspend(dapm, "SpkrRight IN");
7716 snd_soc_dapm_ignore_suspend(dapm, "SpkrRight SPKR");
7717 }
7718 } else {
7719 dev_err(component->dev, "%s: wrong codec name %s\n", __func__,
7720 component->name);
7721 ret = -EINVAL;
7722 goto err;
7723 }
7724 pdata = snd_soc_card_get_drvdata(component->card);
7725 if (!pdata->codec_root) {
7726 entry = snd_info_create_subdir(card->module, "codecs",
7727 card->proc_root);
7728 if (!entry) {
7729 pr_err("%s: Cannot create codecs module entry\n",
7730 __func__);
7731 ret = 0;
7732 goto err;
7733 }
7734 pdata->codec_root = entry;
7735 }
Laxminath Kasam99690f12020-03-15 15:38:21 +05307736 if (strnstr(component->name, "wsa883x", sizeof(component->name)))
7737 wsa883x_codec_info_create_codec_entry(pdata->codec_root,
7738 component);
7739 else
7740 wsa881x_codec_info_create_codec_entry(pdata->codec_root,
7741 component);
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07007742err:
7743 return ret;
7744}
7745
7746static int msm_aux_codec_init(struct snd_soc_component *component)
7747{
7748 struct snd_soc_dapm_context *dapm = snd_soc_component_get_dapm(component);
7749 int ret = 0;
Vignesh Kulothungan406c2bf2019-07-19 10:17:55 -07007750 int codec_variant = -1;
Karthikeyan Mani5eb13422018-11-05 13:49:17 -08007751 void *mbhc_calibration;
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07007752 struct snd_info_entry *entry;
7753 struct snd_card *card = component->card->snd_card;
7754 struct msm_asoc_mach_data *pdata;
7755
7756 snd_soc_dapm_ignore_suspend(dapm, "EAR");
7757 snd_soc_dapm_ignore_suspend(dapm, "AUX");
7758 snd_soc_dapm_ignore_suspend(dapm, "HPHL");
7759 snd_soc_dapm_ignore_suspend(dapm, "HPHR");
7760 snd_soc_dapm_ignore_suspend(dapm, "AMIC1");
7761 snd_soc_dapm_ignore_suspend(dapm, "AMIC2");
7762 snd_soc_dapm_ignore_suspend(dapm, "AMIC3");
7763 snd_soc_dapm_ignore_suspend(dapm, "AMIC4");
7764 snd_soc_dapm_sync(dapm);
7765
7766 pdata = snd_soc_card_get_drvdata(component->card);
7767 if (!pdata->codec_root) {
7768 entry = snd_info_create_subdir(card->module, "codecs",
7769 card->proc_root);
7770 if (!entry) {
Karthikeyan Mani5eb13422018-11-05 13:49:17 -08007771 dev_dbg(component->dev, "%s: Cannot create codecs module entry\n",
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07007772 __func__);
7773 ret = 0;
Karthikeyan Mani5eb13422018-11-05 13:49:17 -08007774 goto mbhc_cfg_cal;
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07007775 }
7776 pdata->codec_root = entry;
7777 }
Kunlei Zhangf61a2312020-02-11 15:37:03 +08007778 if (!strncmp(component->driver->name, "wcd937x", 7)) {
7779 wcd937x_info_create_codec_entry(pdata->codec_root, component);
Vignesh Kulothungan406c2bf2019-07-19 10:17:55 -07007780 ret = snd_soc_add_component_controls(component,
Kunlei Zhangf61a2312020-02-11 15:37:03 +08007781 msm_int_wcd937x_snd_controls,
7782 ARRAY_SIZE(msm_int_wcd937x_snd_controls));
7783 } else {
7784 wcd938x_info_create_codec_entry(pdata->codec_root, component);
7785 codec_variant = wcd938x_get_codec_variant(component);
7786 dev_dbg(component->dev, "%s: variant %d\n", __func__, codec_variant);
7787 if (codec_variant == WCD9380)
7788 ret = snd_soc_add_component_controls(component,
7789 msm_int_wcd9380_snd_controls,
7790 ARRAY_SIZE(msm_int_wcd9380_snd_controls));
7791 else if (codec_variant == WCD9385)
7792 ret = snd_soc_add_component_controls(component,
7793 msm_int_wcd9385_snd_controls,
7794 ARRAY_SIZE(msm_int_wcd9385_snd_controls));
7795 }
Vignesh Kulothungan406c2bf2019-07-19 10:17:55 -07007796
7797 if (ret < 0) {
7798 dev_err(component->dev, "%s: add codec specific snd controls failed: %d\n",
7799 __func__, ret);
7800 return ret;
7801 }
7802
Karthikeyan Mani5eb13422018-11-05 13:49:17 -08007803mbhc_cfg_cal:
7804 mbhc_calibration = def_wcd_mbhc_cal();
7805 if (!mbhc_calibration)
7806 return -ENOMEM;
7807 wcd_mbhc_cfg.calibration = mbhc_calibration;
Kunlei Zhangf61a2312020-02-11 15:37:03 +08007808 if (!strncmp(component->driver->name, "wcd937x", 7))
7809 ret = wcd937x_mbhc_hs_detect(component, &wcd_mbhc_cfg);
7810 else
7811 ret = wcd938x_mbhc_hs_detect(component, &wcd_mbhc_cfg);
Karthikeyan Mani5eb13422018-11-05 13:49:17 -08007812 if (ret) {
7813 dev_err(component->dev, "%s: mbhc hs detect failed, err:%d\n",
7814 __func__, ret);
7815 goto err_hs_detect;
7816 }
7817 return 0;
7818
7819err_hs_detect:
7820 kfree(mbhc_calibration);
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07007821 return ret;
7822}
7823
7824static int msm_init_aux_dev(struct platform_device *pdev,
7825 struct snd_soc_card *card)
7826{
7827 struct device_node *wsa_of_node;
7828 struct device_node *aux_codec_of_node;
7829 u32 wsa_max_devs;
7830 u32 wsa_dev_cnt;
Sudheer Papothid6d524d2019-06-19 02:31:11 +05307831 u32 codec_max_aux_devs = 0;
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07007832 u32 codec_aux_dev_cnt = 0;
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07007833 int i;
Xiao Lid8bb93c2020-01-07 12:59:05 +08007834 struct msm_wsa881x_dev_info *wsa881x_dev_info = NULL;
7835 struct aux_codec_dev_info *aux_cdc_dev_info = NULL;
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07007836 const char *auxdev_name_prefix[1];
7837 char *dev_name_str = NULL;
7838 int found = 0;
7839 int codecs_found = 0;
7840 int ret = 0;
7841
7842 /* Get maximum WSA device count for this platform */
7843 ret = of_property_read_u32(pdev->dev.of_node,
7844 "qcom,wsa-max-devs", &wsa_max_devs);
7845 if (ret) {
7846 dev_info(&pdev->dev,
7847 "%s: wsa-max-devs property missing in DT %s, ret = %d\n",
7848 __func__, pdev->dev.of_node->full_name, ret);
7849 wsa_max_devs = 0;
7850 goto codec_aux_dev;
7851 }
7852 if (wsa_max_devs == 0) {
7853 dev_warn(&pdev->dev,
7854 "%s: Max WSA devices is 0 for this target?\n",
7855 __func__);
7856 goto codec_aux_dev;
7857 }
7858
7859 /* Get count of WSA device phandles for this platform */
7860 wsa_dev_cnt = of_count_phandle_with_args(pdev->dev.of_node,
7861 "qcom,wsa-devs", NULL);
7862 if (wsa_dev_cnt == -ENOENT) {
7863 dev_warn(&pdev->dev, "%s: No wsa device defined in DT.\n",
7864 __func__);
7865 goto err;
7866 } else if (wsa_dev_cnt <= 0) {
7867 dev_err(&pdev->dev,
7868 "%s: Error reading wsa device from DT. wsa_dev_cnt = %d\n",
7869 __func__, wsa_dev_cnt);
7870 ret = -EINVAL;
7871 goto err;
7872 }
7873
7874 /*
7875 * Expect total phandles count to be NOT less than maximum possible
7876 * WSA count. However, if it is less, then assign same value to
7877 * max count as well.
7878 */
7879 if (wsa_dev_cnt < wsa_max_devs) {
7880 dev_dbg(&pdev->dev,
7881 "%s: wsa_max_devs = %d cannot exceed wsa_dev_cnt = %d\n",
7882 __func__, wsa_max_devs, wsa_dev_cnt);
7883 wsa_max_devs = wsa_dev_cnt;
7884 }
7885
7886 /* Make sure prefix string passed for each WSA device */
7887 ret = of_property_count_strings(pdev->dev.of_node,
7888 "qcom,wsa-aux-dev-prefix");
7889 if (ret != wsa_dev_cnt) {
7890 dev_err(&pdev->dev,
7891 "%s: expecting %d wsa prefix. Defined only %d in DT\n",
7892 __func__, wsa_dev_cnt, ret);
7893 ret = -EINVAL;
7894 goto err;
7895 }
7896
7897 /*
7898 * Alloc mem to store phandle and index info of WSA device, if already
7899 * registered with ALSA core
7900 */
7901 wsa881x_dev_info = devm_kcalloc(&pdev->dev, wsa_max_devs,
7902 sizeof(struct msm_wsa881x_dev_info),
7903 GFP_KERNEL);
7904 if (!wsa881x_dev_info) {
7905 ret = -ENOMEM;
7906 goto err;
7907 }
7908
7909 /*
7910 * search and check whether all WSA devices are already
7911 * registered with ALSA core or not. If found a node, store
7912 * the node and the index in a local array of struct for later
7913 * use.
7914 */
7915 for (i = 0; i < wsa_dev_cnt; i++) {
7916 wsa_of_node = of_parse_phandle(pdev->dev.of_node,
7917 "qcom,wsa-devs", i);
7918 if (unlikely(!wsa_of_node)) {
7919 /* we should not be here */
7920 dev_err(&pdev->dev,
7921 "%s: wsa dev node is not present\n",
7922 __func__);
7923 ret = -EINVAL;
7924 goto err;
7925 }
Aditya Bavanari4fcf3b42020-06-02 16:00:14 +05307926 if (soc_find_component_locked(wsa_of_node, NULL)) {
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07007927 /* WSA device registered with ALSA core */
7928 wsa881x_dev_info[found].of_node = wsa_of_node;
7929 wsa881x_dev_info[found].index = i;
7930 found++;
7931 if (found == wsa_max_devs)
7932 break;
7933 }
7934 }
7935
7936 if (found < wsa_max_devs) {
7937 dev_dbg(&pdev->dev,
7938 "%s: failed to find %d components. Found only %d\n",
7939 __func__, wsa_max_devs, found);
7940 return -EPROBE_DEFER;
7941 }
7942 dev_info(&pdev->dev,
7943 "%s: found %d wsa881x devices registered with ALSA core\n",
7944 __func__, found);
7945
7946codec_aux_dev:
Sudheer Papothid6d524d2019-06-19 02:31:11 +05307947 /* Get maximum aux codec device count for this platform */
7948 ret = of_property_read_u32(pdev->dev.of_node,
7949 "qcom,codec-max-aux-devs",
7950 &codec_max_aux_devs);
7951 if (ret) {
7952 dev_err(&pdev->dev,
7953 "%s: codec-max-aux-devs property missing in DT %s, ret = %d\n",
7954 __func__, pdev->dev.of_node->full_name, ret);
7955 codec_max_aux_devs = 0;
7956 goto aux_dev_register;
7957 }
7958 if (codec_max_aux_devs == 0) {
7959 dev_dbg(&pdev->dev,
7960 "%s: Max aux codec devices is 0 for this target?\n",
7961 __func__);
7962 goto aux_dev_register;
7963 }
7964
Karthikeyan Mani1a111b92019-02-12 21:35:31 -08007965 /* Get count of aux codec device phandles for this platform */
7966 codec_aux_dev_cnt = of_count_phandle_with_args(
7967 pdev->dev.of_node,
7968 "qcom,codec-aux-devs", NULL);
7969 if (codec_aux_dev_cnt == -ENOENT) {
7970 dev_warn(&pdev->dev, "%s: No aux codec defined in DT.\n",
7971 __func__);
7972 goto err;
7973 } else if (codec_aux_dev_cnt <= 0) {
7974 dev_err(&pdev->dev,
7975 "%s: Error reading aux codec device from DT, dev_cnt=%d\n",
7976 __func__, codec_aux_dev_cnt);
7977 ret = -EINVAL;
7978 goto err;
7979 }
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07007980
Karthikeyan Mani1a111b92019-02-12 21:35:31 -08007981 /*
Sudheer Papothid6d524d2019-06-19 02:31:11 +05307982 * Expect total phandles count to be NOT less than maximum possible
7983 * AUX device count. However, if it is less, then assign same value to
7984 * max count as well.
7985 */
7986 if (codec_aux_dev_cnt < codec_max_aux_devs) {
7987 dev_dbg(&pdev->dev,
7988 "%s: codec_max_aux_devs = %d cannot exceed codec_aux_dev_cnt = %d\n",
7989 __func__, codec_max_aux_devs,
7990 codec_aux_dev_cnt);
7991 codec_max_aux_devs = codec_aux_dev_cnt;
7992 }
7993
7994 /*
Karthikeyan Mani1a111b92019-02-12 21:35:31 -08007995 * Alloc mem to store phandle and index info of aux codec
7996 * if already registered with ALSA core
7997 */
7998 aux_cdc_dev_info = devm_kcalloc(&pdev->dev, codec_aux_dev_cnt,
7999 sizeof(struct aux_codec_dev_info),
8000 GFP_KERNEL);
8001 if (!aux_cdc_dev_info) {
8002 ret = -ENOMEM;
8003 goto err;
8004 }
8005
8006 /*
8007 * search and check whether all aux codecs are already
8008 * registered with ALSA core or not. If found a node, store
8009 * the node and the index in a local array of struct for later
8010 * use.
8011 */
8012 for (i = 0; i < codec_aux_dev_cnt; i++) {
8013 aux_codec_of_node = of_parse_phandle(pdev->dev.of_node,
8014 "qcom,codec-aux-devs", i);
8015 if (unlikely(!aux_codec_of_node)) {
8016 /* we should not be here */
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07008017 dev_err(&pdev->dev,
Karthikeyan Mani1a111b92019-02-12 21:35:31 -08008018 "%s: aux codec dev node is not present\n",
8019 __func__);
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07008020 ret = -EINVAL;
8021 goto err;
8022 }
Aditya Bavanari4fcf3b42020-06-02 16:00:14 +05308023 if (soc_find_component_locked(aux_codec_of_node, NULL)) {
Karthikeyan Mani1a111b92019-02-12 21:35:31 -08008024 /* AUX codec registered with ALSA core */
8025 aux_cdc_dev_info[codecs_found].of_node =
8026 aux_codec_of_node;
8027 aux_cdc_dev_info[codecs_found].index = i;
8028 codecs_found++;
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07008029 }
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07008030 }
8031
Karthikeyan Mani1a111b92019-02-12 21:35:31 -08008032 if (codecs_found < codec_aux_dev_cnt) {
8033 dev_dbg(&pdev->dev,
8034 "%s: failed to find %d components. Found only %d\n",
8035 __func__, codec_aux_dev_cnt, codecs_found);
8036 return -EPROBE_DEFER;
8037 }
8038 dev_info(&pdev->dev,
8039 "%s: found %d AUX codecs registered with ALSA core\n",
8040 __func__, codecs_found);
8041
Sudheer Papothid6d524d2019-06-19 02:31:11 +05308042aux_dev_register:
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07008043 card->num_aux_devs = wsa_max_devs + codec_aux_dev_cnt;
8044 card->num_configs = wsa_max_devs + codec_aux_dev_cnt;
8045
8046 /* Alloc array of AUX devs struct */
8047 msm_aux_dev = devm_kcalloc(&pdev->dev, card->num_aux_devs,
8048 sizeof(struct snd_soc_aux_dev),
8049 GFP_KERNEL);
8050 if (!msm_aux_dev) {
8051 ret = -ENOMEM;
8052 goto err;
8053 }
8054
8055 /* Alloc array of codec conf struct */
8056 msm_codec_conf = devm_kcalloc(&pdev->dev, card->num_configs,
8057 sizeof(struct snd_soc_codec_conf),
8058 GFP_KERNEL);
8059 if (!msm_codec_conf) {
8060 ret = -ENOMEM;
8061 goto err;
8062 }
8063
8064 for (i = 0; i < wsa_max_devs; i++) {
8065 dev_name_str = devm_kzalloc(&pdev->dev, DEV_NAME_STR_LEN,
8066 GFP_KERNEL);
8067 if (!dev_name_str) {
8068 ret = -ENOMEM;
8069 goto err;
8070 }
8071
8072 ret = of_property_read_string_index(pdev->dev.of_node,
8073 "qcom,wsa-aux-dev-prefix",
8074 wsa881x_dev_info[i].index,
8075 auxdev_name_prefix);
8076 if (ret) {
8077 dev_err(&pdev->dev,
8078 "%s: failed to read wsa aux dev prefix, ret = %d\n",
8079 __func__, ret);
8080 ret = -EINVAL;
8081 goto err;
8082 }
8083
8084 snprintf(dev_name_str, strlen("wsa881x.%d"), "wsa881x.%d", i);
8085 msm_aux_dev[i].name = dev_name_str;
8086 msm_aux_dev[i].codec_name = NULL;
8087 msm_aux_dev[i].codec_of_node =
8088 wsa881x_dev_info[i].of_node;
8089 msm_aux_dev[i].init = msm_wsa881x_init;
8090 msm_codec_conf[i].dev_name = NULL;
8091 msm_codec_conf[i].name_prefix = auxdev_name_prefix[0];
8092 msm_codec_conf[i].of_node =
8093 wsa881x_dev_info[i].of_node;
8094 }
8095
8096 for (i = 0; i < codec_aux_dev_cnt; i++) {
8097 msm_aux_dev[wsa_max_devs + i].name = NULL;
8098 msm_aux_dev[wsa_max_devs + i].codec_name = NULL;
8099 msm_aux_dev[wsa_max_devs + i].codec_of_node =
8100 aux_cdc_dev_info[i].of_node;
8101 msm_aux_dev[wsa_max_devs + i].init = msm_aux_codec_init;
8102 msm_codec_conf[wsa_max_devs + i].dev_name = NULL;
8103 msm_codec_conf[wsa_max_devs + i].name_prefix =
8104 NULL;
8105 msm_codec_conf[wsa_max_devs + i].of_node =
8106 aux_cdc_dev_info[i].of_node;
8107 }
8108
8109 card->codec_conf = msm_codec_conf;
8110 card->aux_dev = msm_aux_dev;
8111err:
8112 return ret;
8113}
8114
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07008115static void msm_i2s_auxpcm_init(struct platform_device *pdev)
8116{
8117 int count = 0;
8118 u32 mi2s_master_slave[MI2S_MAX];
8119 int ret = 0;
8120
8121 for (count = 0; count < MI2S_MAX; count++) {
8122 mutex_init(&mi2s_intf_conf[count].lock);
8123 mi2s_intf_conf[count].ref_cnt = 0;
8124 }
8125
8126 ret = of_property_read_u32_array(pdev->dev.of_node,
8127 "qcom,msm-mi2s-master",
8128 mi2s_master_slave, MI2S_MAX);
8129 if (ret) {
8130 dev_dbg(&pdev->dev, "%s: no qcom,msm-mi2s-master in DT node\n",
8131 __func__);
8132 } else {
8133 for (count = 0; count < MI2S_MAX; count++) {
8134 mi2s_intf_conf[count].msm_is_mi2s_master =
8135 mi2s_master_slave[count];
8136 }
8137 }
8138}
8139
8140static void msm_i2s_auxpcm_deinit(void)
8141{
8142 int count = 0;
8143
8144 for (count = 0; count < MI2S_MAX; count++) {
8145 mutex_destroy(&mi2s_intf_conf[count].lock);
8146 mi2s_intf_conf[count].ref_cnt = 0;
8147 mi2s_intf_conf[count].msm_is_mi2s_master = 0;
8148 }
8149}
8150
8151static int kona_ssr_enable(struct device *dev, void *data)
8152{
8153 struct platform_device *pdev = to_platform_device(dev);
8154 struct snd_soc_card *card = platform_get_drvdata(pdev);
8155 int ret = 0;
8156
8157 if (!card) {
8158 dev_err(dev, "%s: card is NULL\n", __func__);
8159 ret = -EINVAL;
8160 goto err;
8161 }
8162
8163 if (!strcmp(card->name, "kona-stub-snd-card")) {
8164 /* TODO */
8165 dev_dbg(dev, "%s: TODO \n", __func__);
8166 }
8167
8168 snd_soc_card_change_online_state(card, 1);
8169 dev_dbg(dev, "%s: setting snd_card to ONLINE\n", __func__);
8170
8171err:
8172 return ret;
8173}
8174
8175static void kona_ssr_disable(struct device *dev, void *data)
8176{
8177 struct platform_device *pdev = to_platform_device(dev);
8178 struct snd_soc_card *card = platform_get_drvdata(pdev);
8179
8180 if (!card) {
8181 dev_err(dev, "%s: card is NULL\n", __func__);
8182 return;
8183 }
8184
8185 dev_dbg(dev, "%s: setting snd_card to OFFLINE\n", __func__);
8186 snd_soc_card_change_online_state(card, 0);
8187
8188 if (!strcmp(card->name, "kona-stub-snd-card")) {
8189 /* TODO */
8190 dev_dbg(dev, "%s: TODO \n", __func__);
8191 }
8192}
8193
8194static const struct snd_event_ops kona_ssr_ops = {
8195 .enable = kona_ssr_enable,
8196 .disable = kona_ssr_disable,
8197};
8198
8199static int msm_audio_ssr_compare(struct device *dev, void *data)
8200{
8201 struct device_node *node = data;
8202
8203 dev_dbg(dev, "%s: dev->of_node = 0x%p, node = 0x%p\n",
8204 __func__, dev->of_node, node);
8205 return (dev->of_node && dev->of_node == node);
8206}
8207
8208static int msm_audio_ssr_register(struct device *dev)
8209{
8210 struct device_node *np = dev->of_node;
8211 struct snd_event_clients *ssr_clients = NULL;
8212 struct device_node *node = NULL;
8213 int ret = 0;
8214 int i = 0;
8215
8216 for (i = 0; ; i++) {
8217 node = of_parse_phandle(np, "qcom,msm_audio_ssr_devs", i);
8218 if (!node)
8219 break;
8220 snd_event_mstr_add_client(&ssr_clients,
8221 msm_audio_ssr_compare, node);
8222 }
8223
8224 ret = snd_event_master_register(dev, &kona_ssr_ops,
8225 ssr_clients, NULL);
8226 if (!ret)
8227 snd_event_notify(dev, SND_EVENT_UP);
8228
8229 return ret;
8230}
8231
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -07008232static int msm_asoc_machine_probe(struct platform_device *pdev)
8233{
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07008234 struct snd_soc_card *card = NULL;
8235 struct msm_asoc_mach_data *pdata = NULL;
8236 const char *mbhc_audio_jack_type = NULL;
8237 int ret = 0;
Karthikeyan Mani12dcf642019-01-29 11:21:15 -08008238 uint index = 0;
Karthikeyan Mani1a9d7502019-09-23 21:00:20 -07008239 struct clk *lpass_audio_hw_vote = NULL;
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -07008240
8241 if (!pdev->dev.of_node) {
8242 dev_err(&pdev->dev, "%s: No platform supplied from device tree\n", __func__);
8243 return -EINVAL;
8244 }
8245
8246 pdata = devm_kzalloc(&pdev->dev,
8247 sizeof(struct msm_asoc_mach_data), GFP_KERNEL);
8248 if (!pdata)
8249 return -ENOMEM;
8250
Vatsal Bucha71e0b482019-09-11 14:51:20 +05308251 of_property_read_u32(pdev->dev.of_node,
8252 "qcom,lito-is-v2-enabled",
8253 &pdata->lito_v2_enabled);
8254
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -07008255 card = populate_snd_card_dailinks(&pdev->dev);
8256 if (!card) {
8257 dev_err(&pdev->dev, "%s: Card uninitialized\n", __func__);
8258 ret = -EINVAL;
8259 goto err;
8260 }
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07008261
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -07008262 card->dev = &pdev->dev;
8263 platform_set_drvdata(pdev, card);
8264 snd_soc_card_set_drvdata(card, pdata);
8265
8266 ret = snd_soc_of_parse_card_name(card, "qcom,model");
8267 if (ret) {
8268 dev_err(&pdev->dev, "%s: parse card name failed, err:%d\n",
8269 __func__, ret);
8270 goto err;
8271 }
8272
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07008273 ret = snd_soc_of_parse_audio_routing(card, "qcom,audio-routing");
8274 if (ret) {
8275 dev_err(&pdev->dev, "%s: parse audio routing failed, err:%d\n",
8276 __func__, ret);
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -07008277 goto err;
8278 }
8279
8280 ret = msm_populate_dai_link_component_of_node(card);
8281 if (ret) {
8282 ret = -EPROBE_DEFER;
8283 goto err;
8284 }
8285
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07008286 ret = msm_init_aux_dev(pdev, card);
8287 if (ret)
8288 goto err;
8289
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -07008290 ret = devm_snd_soc_register_card(&pdev->dev, card);
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07008291 if (ret == -EPROBE_DEFER) {
8292 if (codec_reg_done)
8293 ret = -EINVAL;
8294 goto err;
8295 } else if (ret) {
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -07008296 dev_err(&pdev->dev, "%s: snd_soc_register_card failed (%d)\n",
8297 __func__, ret);
8298 goto err;
8299 }
8300 dev_info(&pdev->dev, "%s: Sound card %s registered\n",
8301 __func__, card->name);
8302
Vignesh Kulothungan0d196602019-11-26 16:51:55 -08008303 ret = of_property_read_u32(pdev->dev.of_node, "qcom,tdm-max-slots",
8304 &pdata->tdm_max_slots);
8305 if (ret) {
8306 dev_err(&pdev->dev, "%s: No DT match for tdm max slots\n",
8307 __func__);
8308 }
8309
8310 if ((pdata->tdm_max_slots <= 0) || (pdata->tdm_max_slots >
8311 TDM_MAX_SLOTS)) {
8312 pdata->tdm_max_slots = TDM_MAX_SLOTS;
8313 dev_err(&pdev->dev, "%s: Using default tdm max slot: %d\n",
8314 __func__, pdata->tdm_max_slots);
8315 }
8316
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07008317 pdata->hph_en1_gpio_p = of_parse_phandle(pdev->dev.of_node,
8318 "qcom,hph-en1-gpio", 0);
8319 if (!pdata->hph_en1_gpio_p) {
8320 dev_dbg(&pdev->dev, "%s: property %s not detected in node %s\n",
8321 __func__, "qcom,hph-en1-gpio",
8322 pdev->dev.of_node->full_name);
8323 }
8324
8325 pdata->hph_en0_gpio_p = of_parse_phandle(pdev->dev.of_node,
8326 "qcom,hph-en0-gpio", 0);
8327 if (!pdata->hph_en0_gpio_p) {
8328 dev_dbg(&pdev->dev, "%s: property %s not detected in node %s\n",
8329 __func__, "qcom,hph-en0-gpio",
8330 pdev->dev.of_node->full_name);
8331 }
8332
8333 ret = of_property_read_string(pdev->dev.of_node,
8334 "qcom,mbhc-audio-jack-type", &mbhc_audio_jack_type);
8335 if (ret) {
8336 dev_dbg(&pdev->dev, "%s: Looking up %s property in node %s failed\n",
8337 __func__, "qcom,mbhc-audio-jack-type",
8338 pdev->dev.of_node->full_name);
8339 dev_dbg(&pdev->dev, "Jack type properties set to default\n");
8340 } else {
8341 if (!strcmp(mbhc_audio_jack_type, "4-pole-jack")) {
8342 wcd_mbhc_cfg.enable_anc_mic_detect = false;
8343 dev_dbg(&pdev->dev, "This hardware has 4 pole jack");
8344 } else if (!strcmp(mbhc_audio_jack_type, "5-pole-jack")) {
8345 wcd_mbhc_cfg.enable_anc_mic_detect = true;
8346 dev_dbg(&pdev->dev, "This hardware has 5 pole jack");
8347 } else if (!strcmp(mbhc_audio_jack_type, "6-pole-jack")) {
8348 wcd_mbhc_cfg.enable_anc_mic_detect = true;
8349 dev_dbg(&pdev->dev, "This hardware has 6 pole jack");
8350 } else {
8351 wcd_mbhc_cfg.enable_anc_mic_detect = false;
8352 dev_dbg(&pdev->dev, "Unknown value, set to default\n");
8353 }
8354 }
Karthikeyan Mani5eb13422018-11-05 13:49:17 -08008355 /*
8356 * Parse US-Euro gpio info from DT. Report no error if us-euro
8357 * entry is not found in DT file as some targets do not support
8358 * US-Euro detection
8359 */
8360 pdata->us_euro_gpio_p = of_parse_phandle(pdev->dev.of_node,
8361 "qcom,us-euro-gpios", 0);
8362 if (!pdata->us_euro_gpio_p) {
8363 dev_dbg(&pdev->dev, "property %s not detected in node %s",
8364 "qcom,us-euro-gpios", pdev->dev.of_node->full_name);
8365 } else {
8366 dev_dbg(&pdev->dev, "%s detected\n",
8367 "qcom,us-euro-gpios");
8368 wcd_mbhc_cfg.swap_gnd_mic = msm_swap_gnd_mic;
8369 }
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07008370
Meng Wanga60b4082019-02-25 17:02:23 +08008371 if (wcd_mbhc_cfg.enable_usbc_analog)
8372 wcd_mbhc_cfg.swap_gnd_mic = msm_usbc_swap_gnd_mic;
8373
8374 pdata->fsa_handle = of_parse_phandle(pdev->dev.of_node,
8375 "fsa4480-i2c-handle", 0);
8376 if (!pdata->fsa_handle)
8377 dev_dbg(&pdev->dev, "property %s not detected in node %s\n",
8378 "fsa4480-i2c-handle", pdev->dev.of_node->full_name);
8379
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07008380 msm_i2s_auxpcm_init(pdev);
Karthikeyan Mani1a111b92019-02-12 21:35:31 -08008381 pdata->dmic01_gpio_p = of_parse_phandle(pdev->dev.of_node,
8382 "qcom,cdc-dmic01-gpios",
8383 0);
8384 pdata->dmic23_gpio_p = of_parse_phandle(pdev->dev.of_node,
8385 "qcom,cdc-dmic23-gpios",
8386 0);
8387 pdata->dmic45_gpio_p = of_parse_phandle(pdev->dev.of_node,
8388 "qcom,cdc-dmic45-gpios",
8389 0);
Laxminath Kasam168173e2019-09-16 12:59:43 +05308390 if (pdata->dmic01_gpio_p)
8391 msm_cdc_pinctrl_set_wakeup_capable(pdata->dmic01_gpio_p, false);
8392 if (pdata->dmic23_gpio_p)
8393 msm_cdc_pinctrl_set_wakeup_capable(pdata->dmic23_gpio_p, false);
Sudheer Papothic51afbc2019-08-01 10:25:32 +05308394 if (pdata->dmic45_gpio_p)
8395 msm_cdc_pinctrl_set_wakeup_capable(pdata->dmic45_gpio_p, false);
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07008396
Karthikeyan Mani12dcf642019-01-29 11:21:15 -08008397 pdata->mi2s_gpio_p[PRIM_MI2S] = of_parse_phandle(pdev->dev.of_node,
8398 "qcom,pri-mi2s-gpios", 0);
8399 pdata->mi2s_gpio_p[SEC_MI2S] = of_parse_phandle(pdev->dev.of_node,
8400 "qcom,sec-mi2s-gpios", 0);
8401 pdata->mi2s_gpio_p[TERT_MI2S] = of_parse_phandle(pdev->dev.of_node,
8402 "qcom,tert-mi2s-gpios", 0);
8403 pdata->mi2s_gpio_p[QUAT_MI2S] = of_parse_phandle(pdev->dev.of_node,
8404 "qcom,quat-mi2s-gpios", 0);
8405 pdata->mi2s_gpio_p[QUIN_MI2S] = of_parse_phandle(pdev->dev.of_node,
8406 "qcom,quin-mi2s-gpios", 0);
8407 pdata->mi2s_gpio_p[SEN_MI2S] = of_parse_phandle(pdev->dev.of_node,
8408 "qcom,sen-mi2s-gpios", 0);
Meng Wang4f5815c2020-02-13 14:10:20 +08008409 for (index = PRIM_MI2S; index < MI2S_MAX; index++) {
8410 if (pdata->mi2s_gpio_p[index])
8411 msm_cdc_pinctrl_set_wakeup_capable(pdata->mi2s_gpio_p[index], false);
Karthikeyan Mani12dcf642019-01-29 11:21:15 -08008412 atomic_set(&(pdata->mi2s_gpio_ref_count[index]), 0);
Meng Wang4f5815c2020-02-13 14:10:20 +08008413 }
Karthikeyan Mani12dcf642019-01-29 11:21:15 -08008414
Karthikeyan Mani1a9d7502019-09-23 21:00:20 -07008415 /* Register LPASS audio hw vote */
8416 lpass_audio_hw_vote = devm_clk_get(&pdev->dev, "lpass_audio_hw_vote");
8417 if (IS_ERR(lpass_audio_hw_vote)) {
8418 ret = PTR_ERR(lpass_audio_hw_vote);
8419 dev_dbg(&pdev->dev, "%s: clk get %s failed %d\n",
8420 __func__, "lpass_audio_hw_vote", ret);
8421 lpass_audio_hw_vote = NULL;
8422 ret = 0;
8423 }
8424 pdata->lpass_audio_hw_vote = lpass_audio_hw_vote;
8425 pdata->core_audio_vote_count = 0;
8426
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07008427 ret = msm_audio_ssr_register(&pdev->dev);
8428 if (ret)
8429 pr_err("%s: Registration with SND event FWK failed ret = %d\n",
8430 __func__, ret);
8431
8432 is_initial_boot = true;
8433
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -07008434 return 0;
8435err:
8436 devm_kfree(&pdev->dev, pdata);
8437 return ret;
8438}
8439
8440static int msm_asoc_machine_remove(struct platform_device *pdev)
8441{
8442 struct snd_soc_card *card = platform_get_drvdata(pdev);
8443
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07008444 snd_event_master_deregister(&pdev->dev);
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -07008445 snd_soc_unregister_card(card);
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07008446 msm_i2s_auxpcm_deinit();
8447
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -07008448 return 0;
8449}
8450
8451static struct platform_driver kona_asoc_machine_driver = {
8452 .driver = {
8453 .name = DRV_NAME,
8454 .owner = THIS_MODULE,
8455 .pm = &snd_soc_pm_ops,
8456 .of_match_table = kona_asoc_machine_of_match,
Xiaojun Sang53cd13a2018-06-29 15:14:37 +08008457 .suppress_bind_attrs = true,
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -07008458 },
8459 .probe = msm_asoc_machine_probe,
8460 .remove = msm_asoc_machine_remove,
8461};
8462module_platform_driver(kona_asoc_machine_driver);
8463
8464MODULE_DESCRIPTION("ALSA SoC msm");
8465MODULE_LICENSE("GPL v2");
8466MODULE_ALIAS("platform:" DRV_NAME);
8467MODULE_DEVICE_TABLE(of, kona_asoc_machine_of_match);