blob: 96da89973e8de1b827ee2c99ba9f15caa73606b0 [file] [log] [blame]
Mitchel Humpherys85d08692012-10-23 12:56:35 -07001/* Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -07002 *
3 * This program is free software; you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License version 2 and
5 * only version 2 as published by the Free Software Foundation.
6 *
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
11 */
12
13/include/ "skeleton.dtsi"
Mitchel Humpherys52ffaec2012-10-09 15:40:13 -070014/include/ "msm8226-ion.dtsi"
Patrick Dalye8977aa2012-11-06 15:25:58 -080015/include/ "msm-gdsc.dtsi"
Mitchel Humpherys85d08692012-10-23 12:56:35 -070016/include/ "msm8226-iommu.dtsi"
Praveen Chidambaramc8af25e2012-12-19 11:27:36 -070017/include/ "msm8226-pm.dtsi"
Eric Holmberg3d112ee2013-01-29 19:12:39 -070018/include/ "msm8226-smp2p.dtsi"
liu zhongf5c0edb2013-01-25 11:18:53 -070019/include/ "msm8226-gpu.dtsi"
Gagan Macf5b34d82013-01-28 17:11:10 -070020/include/ "msm8226-bus.dtsi"
Sree Sesha Aravind Vadrevu82a171d2013-02-26 20:17:01 -080021/include/ "msm8226-mdss.dtsi"
Aparna Dasbbee0842013-02-28 21:35:15 -080022/include/ "msm8226-coresight.dtsi"
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -070023
24/ {
25 model = "Qualcomm MSM 8226";
26 compatible = "qcom,msm8226";
27 interrupt-parent = <&intc>;
28
29 intc: interrupt-controller@f9000000 {
30 compatible = "qcom,msm-qgic2";
31 interrupt-controller;
32 #interrupt-cells = <3>;
33 reg = <0xF9000000 0x1000>,
34 <0xF9002000 0x1000>;
35 };
36
37 msmgpio: gpio@fd510000 {
38 compatible = "qcom,msm-gpio";
39 interrupt-controller;
40 #interrupt-cells = <2>;
41 reg = <0xfd510000 0x4000>;
Syed Rameez Mustafa86cccfc2012-12-10 18:06:08 -080042 gpio-controller;
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -070043 #gpio-cells = <2>;
Rohit Vaswani341c2032012-11-08 18:49:29 -080044 ngpio = <117>;
Rohit Vaswanid2001522012-12-05 19:23:44 -080045 interrupts = <0 208 0>;
Rohit Vaswanied0a4ef2012-12-11 15:14:42 -080046 qcom,direct-connect-irqs = <8>;
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -070047 };
48
Gilad Avidovd59217c2013-02-01 13:45:59 -070049 aliases {
50 spi0 = &spi_0;
51 };
52
Laura Abbottf3196b22013-03-11 16:22:34 -070053 memory {
54 secure_mem: secure_region {
55 linux,contiguous-region;
56 reg = <0 0x3800000>;
57 label = "secure_mem";
58 };
59 };
60
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -070061 timer {
Syed Rameez Mustafa0824d6c2012-11-29 18:53:56 -080062 compatible = "arm,armv7-timer";
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -070063 interrupts = <1 2 0 1 3 0>;
64 clock-frequency = <19200000>;
65 };
66
67 serial@f991f000 {
68 compatible = "qcom,msm-lsuart-v14";
69 reg = <0xf991f000 0x1000>;
70 interrupts = <0 109 0>;
71 status = "disabled";
72 };
73
74 serial@f995e000 {
75 compatible = "qcom,msm-lsuart-v14";
76 reg = <0xf995e000 0x1000>;
77 interrupts = <0 114 0>;
78 status = "disabled";
79 };
80
Abhimanyu Kapur032b1f42013-01-18 00:10:50 -080081 qcom,msm-imem@fe805000 {
82 compatible = "qcom,msm-imem";
83 reg = <0xfe805000 0x1000>; /* Address and size of IMEM */
84 };
85
Yan He7c06ce32012-12-03 17:12:31 -080086 qcom,sps@f9984000 {
87 compatible = "qcom,msm_sps";
88 reg = <0xf9984000 0x15000>,
89 <0xf9999000 0xb000>;
90 interrupts = <0 94 0>;
91 };
92
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -070093 usb@f9a55000 {
94 compatible = "qcom,hsusb-otg";
95 reg = <0xf9a55000 0x400>;
Mayank Ranaac2a54f2013-01-17 10:14:35 +053096 interrupts = <0 134 0>, <0 140 0>;
97 interrupt-names = "core_irq", "async_irq";
Mayank Rana8335a772013-03-06 10:12:27 +053098 hsusb_vdd_dig-supply = <&pm8226_s1_corner>;
David Keitel7184c6e2013-02-11 13:23:04 -080099 HSUSB_1p8-supply = <&pm8226_l10>;
100 HSUSB_3p3-supply = <&pm8226_l20>;
Mayank Rana8335a772013-03-06 10:12:27 +0530101 qcom,vdd-voltage-level = <1 5 7>;
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700102
103 qcom,hsusb-otg-phy-type = <2>;
104 qcom,hsusb-otg-mode = <1>;
Vamsi Krishna0d564102013-03-02 15:26:55 -0800105 qcom,hsusb-otg-otg-control = <2>;
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700106 qcom,hsusb-otg-disable-reset;
Mayank Rana15f01b52013-03-08 18:28:56 +0530107 qcom,dp-manual-pullup;
Mayank Rana5403e2a2013-02-26 11:18:39 +0530108
109 qcom,msm-bus,name = "usb2";
110 qcom,msm-bus,num-cases = <2>;
111 qcom,msm-bus,active-only = <0>;
112 qcom,msm-bus,num-paths = <1>;
113 qcom,msm-bus,vectors-KBps =
114 <87 512 0 0>,
115 <87 512 60000 960000>;
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700116 };
117
Mayank Rana6bd9a272013-01-29 16:23:23 +0530118 android_usb@fe8050c8 {
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700119 compatible = "qcom,android-usb";
Mayank Rana6bd9a272013-01-29 16:23:23 +0530120 reg = <0xfe8050c8 0xc8>;
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700121 };
122
Bhalchandra Gajare555bceb2012-12-12 22:48:34 -0800123 wcd9xxx_intc: wcd9xxx-irq {
124 compatible = "qcom,wcd9xxx-irq";
125 interrupt-controller;
126 #interrupt-cells = <1>;
127 interrupt-parent = <&msmgpio>;
128 interrupts = <68 0>;
129 interrupt-names = "cdc-int";
130 };
131
Bhalchandra Gajarefb785972012-12-06 19:25:10 -0800132 slim@fe12f000 {
133 cell-index = <1>;
134 compatible = "qcom,slim-ngd";
135 reg = <0xfe12f000 0x35000>,
136 <0xfe104000 0x20000>;
137 reg-names = "slimbus_physical", "slimbus_bam_physical";
138 interrupts = <0 163 0>, <0 164 0>;
139 interrupt-names = "slimbus_irq", "slimbus_bam_irq";
Bhalchandra Gajare555bceb2012-12-12 22:48:34 -0800140
141 tapan_codec {
142 compatible = "qcom,tapan-slim-pgd";
143 elemental-addr = [00 01 E0 00 17 02];
144
145 interrupt-parent = <&wcd9xxx_intc>;
146 interrupts = <0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
147 17 18 19 20 21 22 23 24 25 26 27 28>;
148 qcom,cdc-reset-gpio = <&msmgpio 72 0>;
149
David Keitel7184c6e2013-02-11 13:23:04 -0800150 cdc-vdd-buck-supply = <&pm8226_s4>;
Bhalchandra Gajare555bceb2012-12-12 22:48:34 -0800151 qcom,cdc-vdd-buck-voltage = <2100000 2100000>;
152 qcom,cdc-vdd-buck-current = <650000>;
153
David Keitel7184c6e2013-02-11 13:23:04 -0800154 cdc-vdd-h-supply = <&pm8226_l6>;
Bhalchandra Gajare555bceb2012-12-12 22:48:34 -0800155 qcom,cdc-vdd-h-voltage = <1800000 1800000>;
156 qcom,cdc-vdd-h-current = <25000>;
157
David Keitel7184c6e2013-02-11 13:23:04 -0800158 cdc-vdd-px-supply = <&pm8226_l6>;
Bhalchandra Gajare555bceb2012-12-12 22:48:34 -0800159 qcom,cdc-vdd-px-voltage = <1800000 1800000>;
160 qcom,cdc-vdd-px-current = <25000>;
161
David Keitel7184c6e2013-02-11 13:23:04 -0800162 cdc-vdd-a-1p2v-supply = <&pm8226_l4>;
Bhalchandra Gajare555bceb2012-12-12 22:48:34 -0800163 qcom,cdc-vdd-a-1p2v-voltage = <1200000 1200000>;
164 qcom,cdc-vdd-a-1p2v-current = <10000>;
165
David Keitel7184c6e2013-02-11 13:23:04 -0800166 cdc-vdd-cx-supply = <&pm8226_l4>;
Bhalchandra Gajare555bceb2012-12-12 22:48:34 -0800167 qcom,cdc-vdd-cx-voltage = <1200000 1200000>;
168 qcom,cdc-vdd-cx-current = <10000>;
169
170 qcom,cdc-micbias-ldoh-v = <0x3>;
171 qcom,cdc-micbias-cfilt1-mv = <1800>;
172 qcom,cdc-micbias-cfilt2-mv = <1800>;
173 qcom,cdc-micbias-cfilt3-mv = <1800>;
174
175 qcom,cdc-micbias1-cfilt-sel = <0x0>;
176 qcom,cdc-micbias2-cfilt-sel = <0x1>;
177 qcom,cdc-micbias3-cfilt-sel = <0x2>;
178
179 qcom,cdc-mclk-clk-rate = <9600000>;
180 qcom,cdc-slim-ifd = "tapan-slim-ifd";
181 qcom,cdc-slim-ifd-elemental-addr = [00 00 E0 00 17 02];
182 };
Bhalchandra Gajarefb785972012-12-06 19:25:10 -0800183 };
184
Bhalchandra Gajaree1915b82012-12-12 17:28:39 -0800185 qcom,msm-adsp-loader {
186 compatible = "qcom,adsp-loader";
187 qcom,adsp-state = <0>;
188 };
189
Bhalchandra Gajare03a40ec2012-12-17 11:38:28 -0800190 sound {
191 compatible = "qcom,msm8226-audio-tapan";
192 qcom,model = "msm8226-tapan-snd-card";
193
194 qcom,audio-routing =
195 "RX_BIAS", "MCLK",
196 "LDO_H", "MCLK",
197 "AMIC1", "MIC BIAS1 Internal1",
198 "MIC BIAS1 Internal1", "Handset Mic",
199 "AMIC2", "MIC BIAS2 External",
200 "MIC BIAS2 External", "Headset Mic",
201 "AMIC3", "MIC BIAS2 External",
202 "MIC BIAS2 External", "ANCRight Headset Mic",
203 "AMIC4", "MIC BIAS2 External",
204 "MIC BIAS2 External", "ANCLeft Headset Mic",
205 "DMIC1", "MIC BIAS1 External",
206 "MIC BIAS1 External", "Digital Mic1",
207 "DMIC2", "MIC BIAS1 External",
208 "MIC BIAS1 External", "Digital Mic2",
209 "DMIC3", "MIC BIAS3 External",
210 "MIC BIAS3 External", "Digital Mic3",
211 "DMIC4", "MIC BIAS3 External",
Bhalchandra Gajare510d4422013-03-01 21:07:12 -0800212 "MIC BIAS3 External", "Digital Mic4";
213
Bhalchandra Gajare03a40ec2012-12-17 11:38:28 -0800214 qcom,tapan-mclk-clk-freq = <9600000>;
215 };
216
217 qcom,msm-pcm {
218 compatible = "qcom,msm-pcm-dsp";
Bhalchandra Gajare510d4422013-03-01 21:07:12 -0800219 qcom,msm-pcm-dsp-id = <0>;
Bhalchandra Gajare03a40ec2012-12-17 11:38:28 -0800220 };
221
222 qcom,msm-pcm-routing {
223 compatible = "qcom,msm-pcm-routing";
224 };
225
Bhalchandra Gajare18468a62013-03-11 18:32:49 -0700226 qcom,msm-pcm-low-latency {
227 compatible = "qcom,msm-pcm-dsp";
228 qcom,msm-pcm-dsp-id = <1>;
229 qcom,msm-pcm-low-latency;
230 };
231
Bhalchandra Gajare03a40ec2012-12-17 11:38:28 -0800232 qcom,msm-pcm-lpa {
233 compatible = "qcom,msm-pcm-lpa";
234 };
235
236 qcom,msm-compr-dsp {
237 compatible = "qcom,msm-compr-dsp";
238 };
239
240 qcom,msm-voip-dsp {
241 compatible = "qcom,msm-voip-dsp";
242 };
243
244 qcom,msm-pcm-voice {
245 compatible = "qcom,msm-pcm-voice";
246 };
247
248 qcom,msm-stub-codec {
249 compatible = "qcom,msm-stub-codec";
250 };
251
252 qcom,msm-dai-fe {
253 compatible = "qcom,msm-dai-fe";
254 };
255
256 qcom,msm-pcm-afe {
257 compatible = "qcom,msm-pcm-afe";
258 };
259
260 qcom,msm-dai-q6-hdmi {
261 compatible = "qcom,msm-dai-q6-hdmi";
262 qcom,msm-dai-q6-dev-id = <8>;
263 };
264
265 qcom,msm-dai-q6 {
266 compatible = "qcom,msm-dai-q6";
267 qcom,msm-dai-q6-sb-0-rx {
268 compatible = "qcom,msm-dai-q6-dev";
269 qcom,msm-dai-q6-dev-id = <16384>;
270 };
271
272 qcom,msm-dai-q6-sb-0-tx {
273 compatible = "qcom,msm-dai-q6-dev";
274 qcom,msm-dai-q6-dev-id = <16385>;
275 };
276
277 qcom,msm-dai-q6-sb-1-rx {
278 compatible = "qcom,msm-dai-q6-dev";
279 qcom,msm-dai-q6-dev-id = <16386>;
280 };
281
282 qcom,msm-dai-q6-sb-1-tx {
283 compatible = "qcom,msm-dai-q6-dev";
284 qcom,msm-dai-q6-dev-id = <16387>;
285 };
286
287 qcom,msm-dai-q6-sb-3-rx {
288 compatible = "qcom,msm-dai-q6-dev";
289 qcom,msm-dai-q6-dev-id = <16390>;
290 };
291
292 qcom,msm-dai-q6-sb-3-tx {
293 compatible = "qcom,msm-dai-q6-dev";
294 qcom,msm-dai-q6-dev-id = <16391>;
295 };
296
297 qcom,msm-dai-q6-sb-4-rx {
298 compatible = "qcom,msm-dai-q6-dev";
299 qcom,msm-dai-q6-dev-id = <16392>;
300 };
301
302 qcom,msm-dai-q6-sb-4-tx {
303 compatible = "qcom,msm-dai-q6-dev";
304 qcom,msm-dai-q6-dev-id = <16393>;
305 };
306
307 qcom,msm-dai-q6-bt-sco-rx {
308 compatible = "qcom,msm-dai-q6-dev";
309 qcom,msm-dai-q6-dev-id = <12288>;
310 };
311
312 qcom,msm-dai-q6-bt-sco-tx {
313 compatible = "qcom,msm-dai-q6-dev";
314 qcom,msm-dai-q6-dev-id = <12289>;
315 };
316
317 qcom,msm-dai-q6-int-fm-rx {
318 compatible = "qcom,msm-dai-q6-dev";
319 qcom,msm-dai-q6-dev-id = <12292>;
320 };
321
322 qcom,msm-dai-q6-int-fm-tx {
323 compatible = "qcom,msm-dai-q6-dev";
324 qcom,msm-dai-q6-dev-id = <12293>;
325 };
326
327 qcom,msm-dai-q6-be-afe-pcm-rx {
328 compatible = "qcom,msm-dai-q6-dev";
329 qcom,msm-dai-q6-dev-id = <224>;
330 };
331
332 qcom,msm-dai-q6-be-afe-pcm-tx {
333 compatible = "qcom,msm-dai-q6-dev";
334 qcom,msm-dai-q6-dev-id = <225>;
335 };
336
337 qcom,msm-dai-q6-afe-proxy-rx {
338 compatible = "qcom,msm-dai-q6-dev";
339 qcom,msm-dai-q6-dev-id = <241>;
340 };
341
342 qcom,msm-dai-q6-afe-proxy-tx {
343 compatible = "qcom,msm-dai-q6-dev";
344 qcom,msm-dai-q6-dev-id = <240>;
345 };
346 };
347
348 qcom,msm-pcm-hostless {
349 compatible = "qcom,msm-pcm-hostless";
350 };
351
Mitchel Humpherys5fe1c9b2012-10-09 17:30:19 -0700352 qcom,wdt@f9017000 {
353 compatible = "qcom,msm-watchdog";
354 reg = <0xf9017000 0x1000>;
355 interrupts = <0 3 0>, <0 4 0>;
356 qcom,bark-time = <11000>;
357 qcom,pet-time = <10000>;
Mitchel Humpherys1be23802012-11-16 15:52:32 -0800358 qcom,ipi-ping;
Mitchel Humpherys5fe1c9b2012-10-09 17:30:19 -0700359 };
360
Jeff Hugo7f9705b62012-10-12 10:38:26 -0600361 qcom,smem@fa00000 {
362 compatible = "qcom,smem";
363 reg = <0xfa00000 0x200000>,
Stepan Moskovchenkod6ee8262013-02-06 11:26:05 -0800364 <0xf9011000 0x1000>,
Jeff Hugo7f9705b62012-10-12 10:38:26 -0600365 <0xfc428000 0x4000>;
366 reg-names = "smem", "irq-reg-base", "aux-mem1";
367
368 qcom,smd-modem {
369 compatible = "qcom,smd";
370 qcom,smd-edge = <0>;
371 qcom,smd-irq-offset = <0x8>;
372 qcom,smd-irq-bitmask = <0x1000>;
373 qcom,pil-string = "modem";
374 interrupts = <0 25 1>;
David Ngb715e322012-12-01 12:57:08 -0800375 };
Jeff Hugo7f9705b62012-10-12 10:38:26 -0600376
377 qcom,smsm-modem {
378 compatible = "qcom,smsm";
379 qcom,smsm-edge = <0>;
380 qcom,smsm-irq-offset = <0x8>;
381 qcom,smsm-irq-bitmask = <0x2000>;
382 interrupts = <0 26 1>;
David Ngb715e322012-12-01 12:57:08 -0800383 };
Jeff Hugo7f9705b62012-10-12 10:38:26 -0600384
385 qcom,smd-adsp {
386 compatible = "qcom,smd";
387 qcom,smd-edge = <1>;
388 qcom,smd-irq-offset = <0x8>;
389 qcom,smd-irq-bitmask = <0x100>;
390 qcom,pil-string = "adsp";
391 interrupts = <0 156 1>;
David Ngb715e322012-12-01 12:57:08 -0800392 };
Jeff Hugo7f9705b62012-10-12 10:38:26 -0600393
394 qcom,smsm-adsp {
395 compatible = "qcom,smsm";
396 qcom,smsm-edge = <1>;
397 qcom,smsm-irq-offset = <0x8>;
398 qcom,smsm-irq-bitmask = <0x200>;
399 interrupts = <0 157 1>;
David Ngb715e322012-12-01 12:57:08 -0800400 };
Jeff Hugo7f9705b62012-10-12 10:38:26 -0600401
402 qcom,smd-wcnss {
403 compatible = "qcom,smd";
404 qcom,smd-edge = <6>;
405 qcom,smd-irq-offset = <0x8>;
406 qcom,smd-irq-bitmask = <0x20000>;
407 qcom,pil-string = "wcnss";
408 interrupts = <0 142 1>;
David Ngb715e322012-12-01 12:57:08 -0800409 };
Jeff Hugo7f9705b62012-10-12 10:38:26 -0600410
411 qcom,smsm-wcnss {
412 compatible = "qcom,smsm";
413 qcom,smsm-edge = <6>;
414 qcom,smsm-irq-offset = <0x8>;
415 qcom,smsm-irq-bitmask = <0x80000>;
416 interrupts = <0 144 1>;
David Ngb715e322012-12-01 12:57:08 -0800417 };
Jeff Hugo7f9705b62012-10-12 10:38:26 -0600418
419 qcom,smd-rpm {
420 compatible = "qcom,smd";
421 qcom,smd-edge = <15>;
422 qcom,smd-irq-offset = <0x8>;
423 qcom,smd-irq-bitmask = <0x1>;
424 interrupts = <0 168 1>;
425 qcom,irq-no-suspend;
David Ngb715e322012-12-01 12:57:08 -0800426 };
Jeff Hugo7f9705b62012-10-12 10:38:26 -0600427 };
428
Praveen Chidambaramc8af25e2012-12-19 11:27:36 -0700429 rpm_bus: qcom,rpm-smd {
430 compatible = "qcom,rpm-smd";
431 rpm-channel-name = "rpm_requests";
432 rpm-channel-type = <15>; /* SMD_APPS_RPM */
433 rpm-standalone;
434 };
435
Asutosh Das99912e62012-12-06 12:38:46 +0530436 sdcc1: qcom,sdcc@f9824000 {
437 cell-index = <1>; /* SDC1 eMMC slot */
438 compatible = "qcom,msm-sdcc";
439
Asutosh Das6b82fc52012-11-23 12:00:26 +0530440 reg = <0xf9824000 0x800>,
441 <0xf9824800 0x100>,
442 <0xf9804000 0x7000>;
443 reg-names = "core_mem", "dml_mem", "bam_mem";
444 interrupts = <0 123 0>, <0 137 0>;
445 interrupt-names = "core_irq", "bam_irq";
Asutosh Das99912e62012-12-06 12:38:46 +0530446
447 qcom,bus-width = <8>;
448 status = "disabled";
449 };
450
451 sdcc2: qcom,sdcc@f98a4000 {
452 cell-index = <2>; /* SDC2 SD card slot */
453 compatible = "qcom,msm-sdcc";
454
Asutosh Das6b82fc52012-11-23 12:00:26 +0530455 reg = <0xf98a4000 0x800>,
456 <0xf98a4800 0x100>,
457 <0xf9884000 0x7000>;
458 reg-names = "core_mem", "dml_mem", "bam_mem";
459 interrupts = <0 125 0>, <0 220 0>;
460 interrupt-names = "core_irq", "bam_irq";
Asutosh Das99912e62012-12-06 12:38:46 +0530461
462 qcom,bus-width = <4>;
463 status = "disabled";
464 };
Kenneth Heitkee5804002012-11-15 17:50:07 -0700465
466 spmi_bus: qcom,spmi@fc4c0000 {
467 cell-index = <0>;
468 compatible = "qcom,spmi-pmic-arb";
Kenneth Heitke366b8a42012-12-18 13:51:37 -0700469 reg-names = "core", "intr", "cnfg";
Kenneth Heitkee5804002012-11-15 17:50:07 -0700470 reg = <0xfc4cf000 0x1000>,
Kenneth Heitke366b8a42012-12-18 13:51:37 -0700471 <0Xfc4cb000 0x1000>,
472 <0Xfc4ca000 0x1000>;
Kenneth Heitkee5804002012-11-15 17:50:07 -0700473 /* 190,ee0_krait_hlos_spmi_periph_irq */
474 /* 187,channel_0_krait_hlos_trans_done_irq */
475 interrupts = <0 190 0>, <0 187 0>;
476 qcom,not-wakeup;
477 qcom,pmic-arb-ee = <0>;
478 qcom,pmic-arb-channel = <0>;
Kenneth Heitkee5804002012-11-15 17:50:07 -0700479 };
480
Gilad Avidov28e18eb2012-11-21 18:13:25 -0700481 i2c@f9926000 { /* BLSP-1 QUP-4 */
482 cell-index = <0>;
483 compatible = "qcom,i2c-qup";
484 reg = <0xf9926000 0x1000>;
485 #address-cells = <1>;
486 #size-cells = <0>;
487 reg-names = "qup_phys_addr";
488 interrupts = <0 98 0>;
489 interrupt-names = "qup_err_intr";
490 qcom,i2c-bus-freq = <100000>;
491 };
Patrick Daly99a52ca2012-10-23 12:00:45 -0700492
Amy Maloche41708ba2013-03-03 15:19:27 -0800493 i2c@f9927000 { /* BLSP1 QUP5 */
494 cell-index = <5>;
495 compatible = "qcom,i2c-qup";
496 #address-cells = <1>;
497 #size-cells = <0>;
498 reg-names = "qup_phys_addr";
499 reg = <0xf9927000 0x1000>;
500 interrupt-names = "qup_err_intr";
501 interrupts = <0 99 0>;
502 qcom,i2c-bus-freq = <100000>;
503 qcom,i2c-src-freq = <19200000>;
504 };
505
Patrick Daly99a52ca2012-10-23 12:00:45 -0700506 qcom,acpuclk@f9011050 {
507 compatible = "qcom,acpuclk-a7";
508 reg = <0xf9011050 0x8>;
509 reg-names = "rcg_base";
David Keitel7184c6e2013-02-11 13:23:04 -0800510 a7_cpu-supply = <&pm8226_s2>;
511 a7_mem-supply = <&pm8226_l3>;
Patrick Daly99a52ca2012-10-23 12:00:45 -0700512 };
Mitchel Humpherys00beacf2012-10-11 13:53:43 -0700513
514 qcom,ocmem@fdd00000 {
515 compatible = "qcom,msm-ocmem";
516 reg = <0xfdd00000 0x2000>,
517 <0xfdd02000 0x2000>,
518 <0xfe039000 0x400>,
Mitchel Humpherys1da744d2013-03-08 17:20:41 -0800519 <0xfec00000 0x20000>;
Mitchel Humpherys00beacf2012-10-11 13:53:43 -0700520 reg-names = "ocmem_ctrl_physical", "dm_ctrl_physical", "br_ctrl_physical", "ocmem_physical";
521 interrupts = <0 76 0 0 77 0>;
522 interrupt-names = "ocmem_irq", "dm_irq";
523 qcom,ocmem-num-regions = <0x1>;
524 qcom,ocmem-num-macros = <0x2>;
525 qcom,resource-type = <0x706d636f>;
526 #address-cells = <1>;
527 #size-cells = <1>;
Mitchel Humpherys1da744d2013-03-08 17:20:41 -0800528 ranges = <0x0 0xfec00000 0x20000>;
Mitchel Humpherys00beacf2012-10-11 13:53:43 -0700529
530 partition@0 {
Mitchel Humpherys1da744d2013-03-08 17:20:41 -0800531 reg = <0x0 0x20000>;
Mitchel Humpherys00beacf2012-10-11 13:53:43 -0700532 qcom,ocmem-part-name = "graphics";
Mitchel Humpherys1da744d2013-03-08 17:20:41 -0800533 qcom,ocmem-part-min = <0x20000>;
Mitchel Humpherys00beacf2012-10-11 13:53:43 -0700534 };
535 };
536
Patrick Dalyb83f0b02013-01-09 12:36:19 -0800537 qcom,venus@fdce0000 {
538 compatible = "qcom,pil-venus";
539 reg = <0xfdce0000 0x4000>,
540 <0xfdc80000 0x400>;
541 reg-names = "wrapper_base", "vbif_base";
542 vdd-supply = <&gdsc_venus>;
543
544 qcom,firmware-name = "venus";
545 };
Patrick Daly1e3bc6c2013-01-09 12:34:25 -0800546
547 qcom,pronto@fb21b000 {
548 compatible = "qcom,pil-pronto";
549 reg = <0xfb21b000 0x3000>,
550 <0xfc401700 0x4>,
551 <0xfd485300 0xc>;
552 reg-names = "pmu_base", "clk_base", "halt_base";
553 interrupts = <0 149 1>;
David Keitel7184c6e2013-02-11 13:23:04 -0800554 vdd_pronto_pll-supply = <&pm8226_l8>;
Patrick Daly1e3bc6c2013-01-09 12:34:25 -0800555
556 qcom,firmware-name = "wcnss";
557 };
Neeti Desai1f7ca2d2012-11-21 13:25:57 -0800558
Patrick Daly4df59842013-01-09 12:31:40 -0800559 qcom,lpass@fe200000 {
560 compatible = "qcom,pil-q6v5-lpass";
561 reg = <0xfe200000 0x00100>,
562 <0xfd485100 0x00010>;
563 reg-names = "qdsp6_base", "halt_base";
David Keitelf4c8b8b2013-02-25 15:25:27 -0800564 vdd_cx-supply = <&pm8226_s1_corner>;
Patrick Daly4df59842013-01-09 12:31:40 -0800565 interrupts = <0 162 1>;
566
567 qcom,firmware-name = "adsp";
568 };
569
Patrick Daly742337f2013-01-29 12:06:06 -0800570 qcom,mss@fc880000 {
571 compatible = "qcom,pil-q6v5-mss";
572 reg = <0xfc880000 0x100>,
573 <0xfd485000 0x400>,
574 <0xfc820000 0x020>,
575 <0xfc401680 0x004>,
576 <0x0d1fc000 0x4000>,
577 <0xfd485194 0x4>;
578 reg-names = "qdsp6_base", "halt_base", "rmb_base",
579 "restart_reg", "metadata_base", "cxrail_bhs_reg";
580
581 interrupts = <0 24 1>;
582 vdd_mss-supply = <&pm8226_s1>;
583 vdd_cx-supply = <&pm8226_s1_corner>;
584 vdd_mx-supply = <&pm8226_l3>;
585 vdd_pll-supply = <&pm8226_l8>;
586 qcom,vdd_pll = <1800000>;
587
588 qcom,is-loadable;
589 qcom,firmware-name = "mba";
590 qcom,pil-self-auth;
591 };
592
Neeti Desai1f7ca2d2012-11-21 13:25:57 -0800593 qcom,msm-mem-hole {
594 compatible = "qcom,msm-mem-hole";
Neeti Desaif5756012013-02-25 17:56:35 -0800595 qcom,memblock-remove = <0x8400000 0x7b00000>; /* Address and Size of Hole */
Neeti Desai1f7ca2d2012-11-21 13:25:57 -0800596 };
Siddartha Mohanadossfcd98562013-02-13 08:53:22 -0800597
598 tsens: tsens@fc4a8000 {
599 compatible = "qcom,msm-tsens";
600 reg = <0xfc4a8000 0x2000>,
601 <0xfc4b8000 0x1000>;
602 reg-names = "tsens_physical", "tsens_eeprom_physical";
603 interrupts = <0 184 0>;
Siddartha Mohanadoss9a4e94a2013-03-06 19:15:59 -0800604 qcom,sensors = <4>;
605 qcom,slope = <2901 2846 3038 2955>;
Siddartha Mohanadossfcd98562013-02-13 08:53:22 -0800606 qcom,calib-mode = "fuse_map2";
607 };
Praveen Chidambarama03bda52013-02-12 21:23:13 -0700608
609 qcom,msm-thermal {
610 compatible = "qcom,msm-thermal";
611 qcom,sensor-id = <0>;
612 qcom,poll-ms = <250>;
613 qcom,limit-temp = <60>;
614 qcom,temp-hysteresis = <10>;
615 qcom,freq-step = <2>;
616 };
617
Gilad Avidovd59217c2013-02-01 13:45:59 -0700618 spi_0: spi@f9923000 { /* BLSP1 QUP1 */
619 compatible = "qcom,spi-qup-v2";
620 #address-cells = <1>;
621 #size-cells = <0>;
622 reg-names = "spi_physical", "spi_bam_physical";
623 reg = <0xf9923000 0x1000>,
624 <0xf9904000 0xF000>;
625 interrupt-names = "spi_irq", "spi_bam_irq";
626 interrupts = <0 95 0>, <0 238 0>;
627 spi-max-frequency = <19200000>;
628
629 gpios = <&msmgpio 3 0>, /* CLK */
630 <&msmgpio 1 0>, /* MISO */
631 <&msmgpio 0 0>; /* MOSI */
aiqunyb1e82f32013-03-13 15:35:53 -0700632 cs-gpios = <&msmgpio 22 0>;
Gilad Avidovd59217c2013-02-01 13:45:59 -0700633
634 qcom,infinite-mode = <0>;
635 qcom,use-bam;
636 qcom,ver-reg-exists;
637 qcom,bam-consumer-pipe-index = <12>;
638 qcom,bam-producer-pipe-index = <13>;
639 };
640
Jeff Hugo72e10912013-03-05 11:17:38 -0700641 qcom,bam_dmux@fc834000 {
642 compatible = "qcom,bam_dmux";
643 reg = <0xfc834000 0x7000>;
644 interrupts = <0 29 1>;
645 };
Pushkar Joshi4f3aa0b2013-03-07 22:44:04 -0800646
647 qcom,msm-rtb {
648 compatible = "qcom,msm-rtb";
649 qcom,memory-reservation-type = "EBI1";
650 qcom,memory-reservation-size = <0x100000>; /* 1M EBI1 buffer */
651 };
Hariprasad Dhalinarasimhaadf89cc2013-03-13 13:41:05 -0700652
Hariprasad Dhalinarasimhab548ee52013-03-11 19:06:30 -0700653 qcom,msm-rng@f9bff000 {
654 compatible = "qcom,msm-rng";
655 reg = <0xf9bff000 0x200>;
656 qcom,msm-rng-iface-clk;
657 };
Hariprasad Dhalinarasimhaadf89cc2013-03-13 13:41:05 -0700658
659 qcom,tz-log@fc5b82c {
660 compatible = "qcom,tz-log";
661 reg = <0x0fc5b82c 0x1000>;
662 };
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700663};
David Collins37ddb972012-10-17 15:00:26 -0700664
Patrick Dalye8977aa2012-11-06 15:25:58 -0800665&gdsc_venus {
666 status = "ok";
667};
668
669&gdsc_mdss {
670 status = "ok";
671};
672
673&gdsc_jpeg {
674 status = "ok";
675};
676
677&gdsc_vfe {
678 status = "ok";
679};
680
681&gdsc_oxili_cx {
682 status = "ok";
683};
684
685&gdsc_usb_hsic {
686 status = "ok";
687};
688
David Keitel376b2682013-03-05 18:40:01 -0800689/include/ "msm-pm8226-rpm-regulator.dtsi"
Kenneth Heitkebea6ca22013-02-07 17:23:21 -0700690/include/ "msm-pm8226.dtsi"
David Keitel7184c6e2013-02-11 13:23:04 -0800691/include/ "msm8226-regulator.dtsi"
Siddartha Mohanadossae99e772013-02-19 15:44:40 -0800692
693&pm8226_vadc {
694 chan@0 {
695 label = "usb_in";
696 reg = <0>;
697 qcom,decimation = <0>;
698 qcom,pre-div-channel-scaling = <4>;
699 qcom,calibration-type = "absolute";
700 qcom,scale-function = <0>;
701 qcom,hw-settle-time = <0>;
702 qcom,fast-avg-setup = <0>;
703 };
704
705 chan@2 {
706 label = "vchg_sns";
707 reg = <2>;
708 qcom,decimation = <0>;
709 qcom,pre-div-channel-scaling = <3>;
710 qcom,calibration-type = "absolute";
711 qcom,scale-function = <0>;
712 qcom,hw-settle-time = <0>;
713 qcom,fast-avg-setup = <0>;
714 };
715
716 chan@5 {
717 label = "vcoin";
718 reg = <5>;
719 qcom,decimation = <0>;
720 qcom,pre-div-channel-scaling = <1>;
721 qcom,calibration-type = "absolute";
722 qcom,scale-function = <0>;
723 qcom,hw-settle-time = <0>;
724 qcom,fast-avg-setup = <0>;
725 };
726
727 chan@6 {
728 label = "vbat_sns";
729 reg = <6>;
730 qcom,decimation = <0>;
731 qcom,pre-div-channel-scaling = <1>;
732 qcom,calibration-type = "absolute";
733 qcom,scale-function = <0>;
734 qcom,hw-settle-time = <0>;
735 qcom,fast-avg-setup = <0>;
736 };
737
738 chan@7 {
739 label = "vph_pwr";
740 reg = <7>;
741 qcom,decimation = <0>;
742 qcom,pre-div-channel-scaling = <1>;
743 qcom,calibration-type = "absolute";
744 qcom,scale-function = <0>;
745 qcom,hw-settle-time = <0>;
746 qcom,fast-avg-setup = <0>;
747 };
748
749 chan@30 {
750 label = "batt_therm";
751 reg = <0x30>;
752 qcom,decimation = <0>;
753 qcom,pre-div-channel-scaling = <0>;
754 qcom,calibration-type = "ratiometric";
755 qcom,scale-function = <1>;
Siddartha Mohanadoss74cece62013-02-22 10:07:30 -0800756 qcom,hw-settle-time = <2>;
Siddartha Mohanadossae99e772013-02-19 15:44:40 -0800757 qcom,fast-avg-setup = <0>;
758 };
759
760 chan@31 {
761 label = "batt_id";
762 reg = <0x31>;
763 qcom,decimation = <0>;
764 qcom,pre-div-channel-scaling = <0>;
765 qcom,calibration-type = "ratiometric";
766 qcom,scale-function = <0>;
767 qcom,hw-settle-time = <2>;
768 qcom,fast-avg-setup = <0>;
769 };
770
771 chan@b2 {
772 label = "xo_therm_pu2";
773 reg = <0xb2>;
774 qcom,decimation = <0>;
775 qcom,pre-div-channel-scaling = <0>;
776 qcom,calibration-type = "ratiometric";
777 qcom,scale-function = <4>;
Siddartha Mohanadoss74cece62013-02-22 10:07:30 -0800778 qcom,hw-settle-time = <2>;
Siddartha Mohanadossae99e772013-02-19 15:44:40 -0800779 qcom,fast-avg-setup = <0>;
780 };
David Keitelc51a7e52013-03-02 00:14:48 -0800781
782};
783
784&pm8226_chg {
785 status = "ok";
786
David Keitelc51a7e52013-03-02 00:14:48 -0800787 qcom,chg-chgr@1000 {
788 status = "ok";
789 };
790
791 qcom,chg-buck@1100 {
792 status = "ok";
793 };
794
Fenglin Wu009098a2013-03-08 15:50:51 -0800795 qcom,chg-bat-if@1200 {
796 status = "ok";
797 };
798
David Keitelc51a7e52013-03-02 00:14:48 -0800799 qcom,chg-usb-chgpth@1300 {
800 status = "ok";
801 };
802
803 qcom,chg-boost@1500 {
804 status = "ok";
805 };
806
807 qcom,chg-misc@1600 {
808 status = "ok";
809 };
Siddartha Mohanadossae99e772013-02-19 15:44:40 -0800810};