blob: cdcc5e5fdd082ab3c8f1db64e19d963c91f13367 [file] [log] [blame]
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001/*
2 * Copyright (C) 2012 The Android Open Source Project
3 *
4 * Licensed under the Apache License, Version 2.0 (the "License");
5 * you may not use this file except in compliance with the License.
6 * You may obtain a copy of the License at
7 *
8 * http://www.apache.org/licenses/LICENSE-2.0
9 *
10 * Unless required by applicable law or agreed to in writing, software
11 * distributed under the License is distributed on an "AS IS" BASIS,
12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13 * See the License for the specific language governing permissions and
14 * limitations under the License.
15 */
Greg Hackmann86eb1c62012-05-30 09:25:51 -070016#include <errno.h>
17#include <fcntl.h>
Greg Hackmann29724852012-07-23 15:31:10 -070018#include <poll.h>
Greg Hackmann86eb1c62012-05-30 09:25:51 -070019#include <pthread.h>
20#include <stdio.h>
21#include <stdlib.h>
22
23#include <sys/ioctl.h>
24#include <sys/mman.h>
25#include <sys/time.h>
26#include <sys/resource.h>
27
28#include <s3c-fb.h>
29
30#include <EGL/egl.h>
31
Erik Gilling87e707e2012-06-29 17:35:13 -070032#define HWC_REMOVE_DEPRECATED_VERSIONS 1
33
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -070034#include <cutils/compiler.h>
Greg Hackmann86eb1c62012-05-30 09:25:51 -070035#include <cutils/log.h>
Greg Hackmann6e0f76d2012-09-17 17:47:09 -070036#include <cutils/properties.h>
Greg Hackmann86eb1c62012-05-30 09:25:51 -070037#include <hardware/gralloc.h>
38#include <hardware/hardware.h>
39#include <hardware/hwcomposer.h>
40#include <hardware_legacy/uevent.h>
Greg Hackmann600867e2012-08-23 12:58:02 -070041#include <utils/String8.h>
Greg Hackmann86eb1c62012-05-30 09:25:51 -070042#include <utils/Vector.h>
43
Greg Hackmannf4cc0c32012-05-30 09:28:52 -070044#include <sync/sync.h>
45
Greg Hackmann86eb1c62012-05-30 09:25:51 -070046#include "ion.h"
47#include "gralloc_priv.h"
Benoit Gobycdd61b32012-07-09 12:09:59 -070048#include "exynos_gscaler.h"
Greg Hackmann9130e702012-07-30 14:53:04 -070049#include "exynos_format.h"
Benoit Goby8bad7e32012-08-16 14:17:14 -070050#include "exynos_v4l2.h"
51#include "s5p_tvout_v4l2.h"
Greg Hackmann86eb1c62012-05-30 09:25:51 -070052
Greg Hackmannf9509d32012-09-12 09:49:29 -070053const size_t NUM_HW_WINDOWS = 5;
Greg Hackmann86eb1c62012-05-30 09:25:51 -070054const size_t NO_FB_NEEDED = NUM_HW_WINDOWS + 1;
Greg Hackmannf9509d32012-09-12 09:49:29 -070055const size_t MAX_PIXELS = 2560 * 1600 * 2;
Greg Hackmann9130e702012-07-30 14:53:04 -070056const size_t GSC_W_ALIGNMENT = 16;
57const size_t GSC_H_ALIGNMENT = 16;
Greg Hackmann2ddbc742012-08-17 15:41:29 -070058const int AVAILABLE_GSC_UNITS[] = { 0, 3 };
59const size_t NUM_GSC_UNITS = sizeof(AVAILABLE_GSC_UNITS) /
60 sizeof(AVAILABLE_GSC_UNITS[0]);
Greg Hackmann86eb1c62012-05-30 09:25:51 -070061
Erik Gilling87e707e2012-06-29 17:35:13 -070062struct exynos5_hwc_composer_device_1_t;
Greg Hackmann86eb1c62012-05-30 09:25:51 -070063
Greg Hackmann9130e702012-07-30 14:53:04 -070064struct exynos5_gsc_map_t {
65 enum {
66 GSC_NONE = 0,
67 GSC_M2M,
68 // TODO: GSC_LOCAL_PATH
69 } mode;
70 int idx;
71};
72
Greg Hackmann86eb1c62012-05-30 09:25:51 -070073struct exynos5_hwc_post_data_t {
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -070074 int overlay_map[NUM_HW_WINDOWS];
75 exynos5_gsc_map_t gsc_map[NUM_HW_WINDOWS];
76 size_t fb_window;
Greg Hackmann86eb1c62012-05-30 09:25:51 -070077};
78
Greg Hackmann44a6d422012-09-17 17:31:30 -070079const size_t NUM_GSC_DST_BUFS = 3;
Greg Hackmann9130e702012-07-30 14:53:04 -070080struct exynos5_gsc_data_t {
81 void *gsc;
82 exynos_gsc_img src_cfg;
83 exynos_gsc_img dst_cfg;
84 buffer_handle_t dst_buf[NUM_GSC_DST_BUFS];
85 size_t current_buf;
86};
87
Erik Gilling87e707e2012-06-29 17:35:13 -070088struct exynos5_hwc_composer_device_1_t {
Greg Hackmannf6f2e542012-07-16 16:10:27 -070089 hwc_composer_device_1_t base;
Greg Hackmann86eb1c62012-05-30 09:25:51 -070090
Greg Hackmannf6f2e542012-07-16 16:10:27 -070091 int fd;
Greg Hackmann29724852012-07-23 15:31:10 -070092 int vsync_fd;
Greg Hackmannf6f2e542012-07-16 16:10:27 -070093 exynos5_hwc_post_data_t bufs;
Greg Hackmann86eb1c62012-05-30 09:25:51 -070094
Greg Hackmannf6f2e542012-07-16 16:10:27 -070095 const private_module_t *gralloc_module;
Greg Hackmann9130e702012-07-30 14:53:04 -070096 alloc_device_t *alloc_device;
Jesse Hallda5a71d2012-08-21 12:12:55 -070097 const hwc_procs_t *procs;
Greg Hackmannf6f2e542012-07-16 16:10:27 -070098 pthread_t vsync_thread;
Greg Hackmann6e0f76d2012-09-17 17:47:09 -070099 int force_gpu;
Benoit Gobycdd61b32012-07-09 12:09:59 -0700100
Greg Hackmannd92fe212012-09-11 14:28:41 -0700101 int32_t xres;
102 int32_t yres;
103 int32_t xdpi;
104 int32_t ydpi;
105 int32_t vsync_period;
106
Benoit Goby8bad7e32012-08-16 14:17:14 -0700107 int hdmi_mixer0;
108 int hdmi_layer0;
109 int hdmi_layer1;
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700110 bool hdmi_hpd;
Benoit Goby8bad7e32012-08-16 14:17:14 -0700111 bool hdmi_enabled;
Benoit Gobyad4e3582012-08-30 17:17:34 -0700112 bool hdmi_blanked;
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700113 void *hdmi_gsc;
Benoit Goby8bad7e32012-08-16 14:17:14 -0700114 int hdmi_w;
115 int hdmi_h;
116 exynos_gsc_img hdmi_src;
117 exynos_gsc_img hdmi_dst;
Greg Hackmann9130e702012-07-30 14:53:04 -0700118
119 exynos5_gsc_data_t gsc[NUM_GSC_UNITS];
Greg Hackmann600867e2012-08-23 12:58:02 -0700120
121 struct s3c_fb_win_config last_config[NUM_HW_WINDOWS];
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -0700122 size_t last_fb_window;
Greg Hackmann600867e2012-08-23 12:58:02 -0700123 const void *last_handles[NUM_HW_WINDOWS];
124 exynos5_gsc_map_t last_gsc_map[NUM_HW_WINDOWS];
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700125};
126
Greg Hackmann9130e702012-07-30 14:53:04 -0700127static void dump_handle(private_handle_t *h)
128{
Greg Hackmanneba34a92012-08-14 16:10:05 -0700129 ALOGV("\t\tformat = %d, width = %u, height = %u, stride = %u, vstride = %u",
130 h->format, h->width, h->height, h->stride, h->vstride);
Greg Hackmann9130e702012-07-30 14:53:04 -0700131}
132
Erik Gilling87e707e2012-06-29 17:35:13 -0700133static void dump_layer(hwc_layer_1_t const *l)
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700134{
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700135 ALOGV("\ttype=%d, flags=%08x, handle=%p, tr=%02x, blend=%04x, "
136 "{%d,%d,%d,%d}, {%d,%d,%d,%d}",
137 l->compositionType, l->flags, l->handle, l->transform,
138 l->blending,
139 l->sourceCrop.left,
140 l->sourceCrop.top,
141 l->sourceCrop.right,
142 l->sourceCrop.bottom,
143 l->displayFrame.left,
144 l->displayFrame.top,
145 l->displayFrame.right,
146 l->displayFrame.bottom);
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700147
Greg Hackmann9130e702012-07-30 14:53:04 -0700148 if(l->handle && !(l->flags & HWC_SKIP_LAYER))
149 dump_handle(private_handle_t::dynamicCast(l->handle));
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700150}
151
152static void dump_config(s3c_fb_win_config &c)
153{
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700154 ALOGV("\tstate = %u", c.state);
155 if (c.state == c.S3C_FB_WIN_STATE_BUFFER) {
156 ALOGV("\t\tfd = %d, offset = %u, stride = %u, "
157 "x = %d, y = %d, w = %u, h = %u, "
Greg Hackmann93cc5e72012-08-03 13:29:33 -0700158 "format = %u, blending = %u",
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700159 c.fd, c.offset, c.stride,
160 c.x, c.y, c.w, c.h,
Greg Hackmann93cc5e72012-08-03 13:29:33 -0700161 c.format, c.blending);
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700162 }
163 else if (c.state == c.S3C_FB_WIN_STATE_COLOR) {
164 ALOGV("\t\tcolor = %u", c.color);
165 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700166}
167
Greg Hackmann9130e702012-07-30 14:53:04 -0700168static void dump_gsc_img(exynos_gsc_img &c)
169{
170 ALOGV("\tx = %u, y = %u, w = %u, h = %u, fw = %u, fh = %u",
171 c.x, c.y, c.w, c.h, c.fw, c.fh);
172 ALOGV("\taddr = {%u, %u, %u}, rot = %u, cacheable = %u, drmMode = %u",
173 c.yaddr, c.uaddr, c.vaddr, c.rot, c.cacheable, c.drmMode);
174}
175
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700176inline int WIDTH(const hwc_rect &rect) { return rect.right - rect.left; }
177inline int HEIGHT(const hwc_rect &rect) { return rect.bottom - rect.top; }
Greg Hackmann31991d52012-07-13 13:23:11 -0700178template<typename T> inline T max(T a, T b) { return (a > b) ? a : b; }
179template<typename T> inline T min(T a, T b) { return (a < b) ? a : b; }
180
181static bool is_transformed(const hwc_layer_1_t &layer)
182{
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700183 return layer.transform != 0;
Greg Hackmann31991d52012-07-13 13:23:11 -0700184}
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700185
Greg Hackmann9130e702012-07-30 14:53:04 -0700186static bool is_rotated(const hwc_layer_1_t &layer)
187{
188 return (layer.transform & HAL_TRANSFORM_ROT_90) ||
189 (layer.transform & HAL_TRANSFORM_ROT_180);
190}
191
Erik Gilling87e707e2012-06-29 17:35:13 -0700192static bool is_scaled(const hwc_layer_1_t &layer)
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700193{
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700194 return WIDTH(layer.displayFrame) != WIDTH(layer.sourceCrop) ||
195 HEIGHT(layer.displayFrame) != HEIGHT(layer.sourceCrop);
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700196}
197
Benoit Goby8bad7e32012-08-16 14:17:14 -0700198static inline bool gsc_dst_cfg_changed(exynos_gsc_img &c1, exynos_gsc_img &c2)
199{
200 return c1.x != c2.x ||
201 c1.y != c2.y ||
202 c1.w != c2.w ||
203 c1.h != c2.h ||
204 c1.format != c2.format ||
205 c1.rot != c2.rot ||
206 c1.cacheable != c2.cacheable ||
207 c1.drmMode != c2.drmMode;
208}
209
210static inline bool gsc_src_cfg_changed(exynos_gsc_img &c1, exynos_gsc_img &c2)
211{
212 return gsc_dst_cfg_changed(c1, c2) ||
213 c1.fw != c2.fw ||
214 c1.fh != c2.fh;
215}
216
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700217static enum s3c_fb_pixel_format exynos5_format_to_s3c_format(int format)
218{
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700219 switch (format) {
220 case HAL_PIXEL_FORMAT_RGBA_8888:
221 return S3C_FB_PIXEL_FORMAT_RGBA_8888;
222 case HAL_PIXEL_FORMAT_RGBX_8888:
223 return S3C_FB_PIXEL_FORMAT_RGBX_8888;
224 case HAL_PIXEL_FORMAT_RGBA_5551:
225 return S3C_FB_PIXEL_FORMAT_RGBA_5551;
Sanghee Kim05cbd792012-09-14 23:58:28 -0700226 case HAL_PIXEL_FORMAT_RGB_565:
227 return S3C_FB_PIXEL_FORMAT_RGB_565;
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700228 default:
229 return S3C_FB_PIXEL_FORMAT_MAX;
230 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700231}
232
233static bool exynos5_format_is_supported(int format)
234{
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700235 return exynos5_format_to_s3c_format(format) < S3C_FB_PIXEL_FORMAT_MAX;
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700236}
237
Greg Hackmannf8c24e52012-08-14 15:50:51 -0700238static bool exynos5_format_is_rgb(int format)
239{
240 switch (format) {
241 case HAL_PIXEL_FORMAT_RGBA_8888:
242 case HAL_PIXEL_FORMAT_RGBX_8888:
243 case HAL_PIXEL_FORMAT_RGB_888:
244 case HAL_PIXEL_FORMAT_RGB_565:
245 case HAL_PIXEL_FORMAT_BGRA_8888:
246 case HAL_PIXEL_FORMAT_RGBA_5551:
247 case HAL_PIXEL_FORMAT_RGBA_4444:
248 return true;
249
250 default:
251 return false;
252 }
253}
254
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700255static bool exynos5_format_is_supported_by_gscaler(int format)
256{
Greg Hackmann9130e702012-07-30 14:53:04 -0700257 switch (format) {
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700258 case HAL_PIXEL_FORMAT_RGBX_8888:
259 case HAL_PIXEL_FORMAT_RGB_565:
Rebecca Schultz Zavinc853be72012-08-23 00:03:05 -0700260 case HAL_PIXEL_FORMAT_EXYNOS_YV12:
Greg Hackmann9130e702012-07-30 14:53:04 -0700261 case HAL_PIXEL_FORMAT_YCbCr_420_SP:
Greg Hackmann9130e702012-07-30 14:53:04 -0700262 case HAL_PIXEL_FORMAT_YCbCr_420_SP_TILED:
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700263 return true;
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700264
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700265 default:
266 return false;
267 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700268}
269
Greg Hackmann296668e2012-08-14 15:51:40 -0700270static bool exynos5_format_is_ycrcb(int format)
271{
Rebecca Schultz Zavinc853be72012-08-23 00:03:05 -0700272 return format == HAL_PIXEL_FORMAT_EXYNOS_YV12;
Greg Hackmann296668e2012-08-14 15:51:40 -0700273}
274
Greg Hackmann9130e702012-07-30 14:53:04 -0700275static bool exynos5_format_requires_gscaler(int format)
276{
Sanghee Kim05cbd792012-09-14 23:58:28 -0700277 return (exynos5_format_is_supported_by_gscaler(format) &&
278 (format != HAL_PIXEL_FORMAT_RGBX_8888) && (format != HAL_PIXEL_FORMAT_RGB_565));
Greg Hackmann9130e702012-07-30 14:53:04 -0700279}
280
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700281static uint8_t exynos5_format_to_bpp(int format)
282{
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700283 switch (format) {
284 case HAL_PIXEL_FORMAT_RGBA_8888:
285 case HAL_PIXEL_FORMAT_RGBX_8888:
286 return 32;
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700287
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700288 case HAL_PIXEL_FORMAT_RGBA_5551:
289 case HAL_PIXEL_FORMAT_RGBA_4444:
Sanghee Kim05cbd792012-09-14 23:58:28 -0700290 case HAL_PIXEL_FORMAT_RGB_565:
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700291 return 16;
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700292
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700293 default:
294 ALOGW("unrecognized pixel format %u", format);
295 return 0;
296 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700297}
298
Greg Hackmann227ae8a2012-08-03 16:16:58 -0700299static bool exynos5_supports_gscaler(hwc_layer_1_t &layer, int format,
300 bool local_path)
Greg Hackmann9130e702012-07-30 14:53:04 -0700301{
302 private_handle_t *handle = private_handle_t::dynamicCast(layer.handle);
303
Rebecca Schultz Zavin23cd5952012-09-12 00:30:52 -0700304 int max_w = is_rotated(layer) ? 2048 : 4800;
305 int max_h = is_rotated(layer) ? 2048 : 3344;
Greg Hackmann9130e702012-07-30 14:53:04 -0700306
Rebecca Schultz Zavin23cd5952012-09-12 00:30:52 -0700307 bool rot90or270 = !!(layer.transform & HAL_TRANSFORM_ROT_90);
308 // n.b.: HAL_TRANSFORM_ROT_270 = HAL_TRANSFORM_ROT_90 |
309 // HAL_TRANSFORM_ROT_180
Greg Hackmann9130e702012-07-30 14:53:04 -0700310
Rebecca Schultz Zavin23cd5952012-09-12 00:30:52 -0700311 int src_w = WIDTH(layer.sourceCrop), src_h = HEIGHT(layer.sourceCrop);
312 int dest_w, dest_h;
313 if (rot90or270) {
314 dest_w = HEIGHT(layer.displayFrame);
315 dest_h = WIDTH(layer.displayFrame);
316 } else {
317 dest_w = WIDTH(layer.displayFrame);
318 dest_h = HEIGHT(layer.displayFrame);
319 }
320 int max_downscale = local_path ? 4 : 16;
321 const int max_upscale = 8;
Greg Hackmann227ae8a2012-08-03 16:16:58 -0700322
Rebecca Schultz Zavin23cd5952012-09-12 00:30:52 -0700323 return exynos5_format_is_supported_by_gscaler(format) &&
324 handle->stride <= max_w &&
325 handle->stride % GSC_W_ALIGNMENT == 0 &&
326 src_w <= dest_w * max_downscale &&
327 dest_w <= src_w * max_upscale &&
328 handle->vstride <= max_h &&
329 handle->vstride % GSC_H_ALIGNMENT == 0 &&
330 src_h <= dest_h * max_downscale &&
331 dest_h <= src_h * max_upscale &&
332 // per 46.2
333 (!rot90or270 || layer.sourceCrop.top % 2 == 0) &&
334 (!rot90or270 || layer.sourceCrop.left % 2 == 0);
335 // per 46.3.1.6
Greg Hackmann9130e702012-07-30 14:53:04 -0700336}
337
Greg Hackmann09c45c22012-09-20 09:35:37 -0700338static bool exynos5_requires_gscaler(hwc_layer_1_t &layer, int format)
339{
340 return exynos5_format_requires_gscaler(format) || is_scaled(layer)
341 || is_transformed(layer);
342}
343
Benoit Gobyd6bb7ce2012-08-09 16:11:22 -0700344int hdmi_get_config(struct exynos5_hwc_composer_device_1_t *dev)
345{
346 struct v4l2_dv_preset preset;
347 struct v4l2_dv_enum_preset enum_preset;
Benoit Gobyd6bb7ce2012-08-09 16:11:22 -0700348 int index = 0;
349 bool found = false;
350 int ret;
351
Benoit Goby8bad7e32012-08-16 14:17:14 -0700352 if (ioctl(dev->hdmi_layer0, VIDIOC_G_DV_PRESET, &preset) < 0) {
Benoit Gobyd6bb7ce2012-08-09 16:11:22 -0700353 ALOGE("%s: g_dv_preset error, %d", __func__, errno);
354 return -1;
355 }
356
357 while (true) {
358 enum_preset.index = index++;
Benoit Goby8bad7e32012-08-16 14:17:14 -0700359 ret = ioctl(dev->hdmi_layer0, VIDIOC_ENUM_DV_PRESETS, &enum_preset);
Benoit Gobyd6bb7ce2012-08-09 16:11:22 -0700360
361 if (ret < 0) {
362 if (errno == EINVAL)
363 break;
364 ALOGE("%s: enum_dv_presets error, %d", __func__, errno);
365 return -1;
366 }
367
368 ALOGV("%s: %d preset=%02d width=%d height=%d name=%s",
369 __func__, enum_preset.index, enum_preset.preset,
370 enum_preset.width, enum_preset.height, enum_preset.name);
371
372 if (preset.preset == enum_preset.preset) {
Benoit Goby8bad7e32012-08-16 14:17:14 -0700373 dev->hdmi_w = enum_preset.width;
374 dev->hdmi_h = enum_preset.height;
Benoit Gobyd6bb7ce2012-08-09 16:11:22 -0700375 found = true;
376 }
377 }
378
379 return found ? 0 : -1;
380}
381
Greg Hackmann93cc5e72012-08-03 13:29:33 -0700382static enum s3c_fb_blending exynos5_blending_to_s3c_blending(int32_t blending)
383{
384 switch (blending) {
385 case HWC_BLENDING_NONE:
386 return S3C_FB_BLENDING_NONE;
387 case HWC_BLENDING_PREMULT:
388 return S3C_FB_BLENDING_PREMULT;
389 case HWC_BLENDING_COVERAGE:
390 return S3C_FB_BLENDING_COVERAGE;
391
392 default:
393 return S3C_FB_BLENDING_MAX;
394 }
395}
396
397static bool exynos5_blending_is_supported(int32_t blending)
398{
399 return exynos5_blending_to_s3c_blending(blending) < S3C_FB_BLENDING_MAX;
400}
401
Benoit Goby8bad7e32012-08-16 14:17:14 -0700402static int hdmi_start_background(struct exynos5_hwc_composer_device_1_t *dev)
403{
404 struct v4l2_requestbuffers reqbuf;
405 struct v4l2_subdev_format sd_fmt;
406 struct v4l2_subdev_crop sd_crop;
407 struct v4l2_format fmt;
408 struct v4l2_buffer buffer;
409 struct v4l2_plane planes[1];
410
411 memset(&reqbuf, 0, sizeof(reqbuf));
412 memset(&sd_fmt, 0, sizeof(sd_fmt));
413 memset(&sd_crop, 0, sizeof(sd_crop));
414 memset(&fmt, 0, sizeof(fmt));
415 memset(&buffer, 0, sizeof(buffer));
416 memset(planes, 0, sizeof(planes));
417
418 sd_fmt.pad = MIXER_G1_SUBDEV_PAD_SINK;
419 sd_fmt.which = V4L2_SUBDEV_FORMAT_ACTIVE;
420 sd_fmt.format.width = 1;
421 sd_fmt.format.height = 1;
422 sd_fmt.format.code = V4L2_MBUS_FMT_XRGB8888_4X8_LE;
423 if (exynos_subdev_s_fmt(dev->hdmi_mixer0, &sd_fmt) < 0) {
424 ALOGE("%s: s_fmt failed pad=%d", __func__, sd_fmt.pad);
425 return -1;
426 }
427
428 sd_crop.pad = MIXER_G1_SUBDEV_PAD_SINK;
429 sd_crop.which = V4L2_SUBDEV_FORMAT_ACTIVE;
430 sd_crop.rect.left = 0;
431 sd_crop.rect.top = 0;
432 sd_crop.rect.width = 1;
433 sd_crop.rect.height = 1;
434 if (exynos_subdev_s_crop(dev->hdmi_mixer0, &sd_crop) < 0) {
435 ALOGE("%s: set_crop failed pad=%d", __func__, sd_crop.pad);
436 return -1;
437 }
438
439 sd_fmt.pad = MIXER_G1_SUBDEV_PAD_SOURCE;
440 sd_fmt.which = V4L2_SUBDEV_FORMAT_ACTIVE;
441 sd_fmt.format.width = dev->hdmi_w;
442 sd_fmt.format.height = dev->hdmi_h;
443 sd_fmt.format.code = V4L2_MBUS_FMT_XRGB8888_4X8_LE;
444 if (exynos_subdev_s_fmt(dev->hdmi_mixer0, &sd_fmt) < 0) {
445 ALOGE("%s: s_fmt failed pad=%d", __func__, sd_fmt.pad);
446 return -1;
447 }
448
449 sd_crop.pad = MIXER_G1_SUBDEV_PAD_SOURCE;
450 sd_crop.which = V4L2_SUBDEV_FORMAT_ACTIVE;
451 sd_crop.rect.left = 0;
452 sd_crop.rect.top = 0;
453 sd_crop.rect.width = 1;
454 sd_crop.rect.height = 1;
455 if (exynos_subdev_s_crop(dev->hdmi_mixer0, &sd_crop) < 0) {
456 ALOGE("%s: s_crop failed pad=%d", __func__, sd_crop.pad);
457 return -1;
458 }
459
460 fmt.type = V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE;
461 fmt.fmt.pix_mp.width = 1;
462 fmt.fmt.pix_mp.height = 1;
463 fmt.fmt.pix_mp.pixelformat = V4L2_PIX_FMT_BGR32;
464 fmt.fmt.pix_mp.field = V4L2_FIELD_ANY;
465 fmt.fmt.pix_mp.num_planes = 1;
466 if (exynos_v4l2_s_fmt(dev->hdmi_layer1, &fmt) < 0) {
467 ALOGE("%s::videodev set format failed", __func__);
468 return -1;
469 }
470
471 reqbuf.count = 1;
472 reqbuf.type = V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE;
473 reqbuf.memory = V4L2_MEMORY_MMAP;
474
475 if (exynos_v4l2_reqbufs(dev->hdmi_layer1, &reqbuf) < 0) {
476 ALOGE("%s: exynos_v4l2_reqbufs failed %d", __func__, errno);
477 return -1;
478 }
479
480 if (reqbuf.count != 1) {
481 ALOGE("%s: didn't get buffer", __func__);
482 return -1;
483 }
484
485 memset(&buffer, 0, sizeof(buffer));
486 buffer.type = reqbuf.type;
487 buffer.memory = V4L2_MEMORY_MMAP;
488 buffer.length = 1;
489 buffer.m.planes = planes;
490 if (exynos_v4l2_querybuf(dev->hdmi_layer1, &buffer) < 0) {
491 ALOGE("%s: exynos_v4l2_querybuf failed %d", __func__, errno);
492 return -1;
493 }
494
495 void *start = mmap(NULL, planes[0].length, PROT_READ | PROT_WRITE,
496 MAP_SHARED, dev->hdmi_layer1, planes[0].m.mem_offset);
497 if (start == MAP_FAILED) {
498 ALOGE("%s: mmap failed %d", __func__, errno);
499 return -1;
500 }
501
502 memset(start, 0, planes[0].length);
503
504 munmap(start, planes[0].length);
505
506 if (exynos_v4l2_qbuf(dev->hdmi_layer1, &buffer) < 0) {
507 ALOGE("%s: exynos_v4l2_qbuf failed %d", __func__, errno);
508 return -1;
509 }
510
511 if (exynos_v4l2_streamon(dev->hdmi_layer1, buffer.type) < 0) {
512 ALOGE("%s:stream on failed", __func__);
513 return -1;
514 }
515
516 if (exynos_v4l2_s_ctrl(dev->hdmi_layer1, V4L2_CID_TV_LAYER_PRIO, 0) < 0) {
517 ALOGE("%s: s_ctrl LAYER_PRIO failed", __func__);
518 return -1;
519 }
520
521 return 0;
522}
523
524static int hdmi_stop_background(struct exynos5_hwc_composer_device_1_t *dev)
525{
526 struct v4l2_requestbuffers reqbuf;
527
528 if (exynos_v4l2_streamoff(dev->hdmi_layer1, V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE) < 0) {
529 ALOGE("%s:stream off failed", __func__);
530 return -1;
531 }
532
533 memset(&reqbuf, 0, sizeof(reqbuf));
534 reqbuf.count = 0;
535 reqbuf.type = V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE;
536 reqbuf.memory = V4L2_MEMORY_MMAP;
537 if (exynos_v4l2_reqbufs(dev->hdmi_layer1, &reqbuf) < 0) {
538 ALOGE("%s: exynos_v4l2_reqbufs failed %d", __func__, errno);
539 return -1;
540 }
541
542 return 0;
543}
544
Benoit Gobycdd61b32012-07-09 12:09:59 -0700545static int hdmi_enable(struct exynos5_hwc_composer_device_1_t *dev)
546{
Benoit Goby8bad7e32012-08-16 14:17:14 -0700547 if (dev->hdmi_enabled)
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700548 return 0;
Benoit Gobycdd61b32012-07-09 12:09:59 -0700549
Benoit Gobyad4e3582012-08-30 17:17:34 -0700550 if (dev->hdmi_blanked)
551 return 0;
552
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700553 dev->hdmi_gsc = exynos_gsc_create_exclusive(3, GSC_OUTPUT_MODE, GSC_OUT_TV);
554 if (!dev->hdmi_gsc) {
555 ALOGE("%s: exynos_gsc_create_exclusive failed", __func__);
556 return -ENODEV;
557 }
Benoit Gobycdd61b32012-07-09 12:09:59 -0700558
Benoit Goby8bad7e32012-08-16 14:17:14 -0700559 memset(&dev->hdmi_src, 0, sizeof(dev->hdmi_src));
Benoit Gobycdd61b32012-07-09 12:09:59 -0700560
Benoit Goby8bad7e32012-08-16 14:17:14 -0700561 if (hdmi_start_background(dev) < 0) {
562 ALOGE("%s: hdmi_start_background failed", __func__);
563 return -1;
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700564 }
Benoit Gobycdd61b32012-07-09 12:09:59 -0700565
Benoit Goby8bad7e32012-08-16 14:17:14 -0700566 dev->hdmi_enabled = true;
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700567 return 0;
Benoit Gobycdd61b32012-07-09 12:09:59 -0700568}
569
570static void hdmi_disable(struct exynos5_hwc_composer_device_1_t *dev)
571{
Benoit Goby8bad7e32012-08-16 14:17:14 -0700572 if (!dev->hdmi_enabled)
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700573 return;
574 exynos_gsc_destroy(dev->hdmi_gsc);
Benoit Gobyad4e3582012-08-30 17:17:34 -0700575 hdmi_stop_background(dev);
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700576 dev->hdmi_gsc = NULL;
Benoit Goby8bad7e32012-08-16 14:17:14 -0700577 dev->hdmi_enabled = false;
Benoit Gobycdd61b32012-07-09 12:09:59 -0700578}
579
Benoit Goby922abbf2012-09-19 19:24:19 -0700580static int hdmi_configure_fblayer(struct exynos5_hwc_composer_device_1_t *dev,
581 hwc_layer_1_t &layer)
Benoit Goby8bad7e32012-08-16 14:17:14 -0700582{
583 exynos_gsc_img src_cfg, dst_cfg;
584 memset(&src_cfg, 0, sizeof(src_cfg));
585 memset(&dst_cfg, 0, sizeof(dst_cfg));
Benoit Goby922abbf2012-09-19 19:24:19 -0700586 private_handle_t *h = private_handle_t::dynamicCast(layer.handle);
Benoit Goby8bad7e32012-08-16 14:17:14 -0700587
588 src_cfg.x = layer.sourceCrop.left;
589 src_cfg.y = layer.sourceCrop.top;
590 src_cfg.w = WIDTH(layer.sourceCrop);
Benoit Goby922abbf2012-09-19 19:24:19 -0700591 src_cfg.fw = h->stride;
Benoit Goby8bad7e32012-08-16 14:17:14 -0700592 src_cfg.h = HEIGHT(layer.sourceCrop);
Benoit Goby922abbf2012-09-19 19:24:19 -0700593 src_cfg.fh = h->vstride;
594 src_cfg.format = HAL_PIXEL_FORMAT_BGRA_8888;
595 src_cfg.yaddr = h->fd;
Benoit Goby8bad7e32012-08-16 14:17:14 -0700596
Benoit Goby922abbf2012-09-19 19:24:19 -0700597 dst_cfg.w = dev->hdmi_w;
598 dst_cfg.fw = dev->hdmi_w;
599 dst_cfg.h = dev->hdmi_h;
600 dst_cfg.fh = dev->hdmi_h;
Benoit Goby8bad7e32012-08-16 14:17:14 -0700601 dst_cfg.format = HAL_PIXEL_FORMAT_EXYNOS_YV12;
602 dst_cfg.rot = layer.transform;
603
Benoit Goby922abbf2012-09-19 19:24:19 -0700604 if (gsc_src_cfg_changed(src_cfg, dev->hdmi_src)
605 || gsc_dst_cfg_changed(dst_cfg, dev->hdmi_dst)) {
Benoit Goby8bad7e32012-08-16 14:17:14 -0700606
Benoit Goby922abbf2012-09-19 19:24:19 -0700607 ALOGV("HDMI source config:");
608 dump_gsc_img(src_cfg);
609 ALOGV("HDMI dest config:");
610 dump_gsc_img(dst_cfg);
Benoit Gobycdd61b32012-07-09 12:09:59 -0700611
Benoit Goby922abbf2012-09-19 19:24:19 -0700612 exynos_gsc_stop_exclusive(dev->hdmi_gsc);
Benoit Gobycdd61b32012-07-09 12:09:59 -0700613
Benoit Goby922abbf2012-09-19 19:24:19 -0700614 int ret = exynos_gsc_config_exclusive(dev->hdmi_gsc, &src_cfg, &dst_cfg);
615 if (ret < 0) {
616 ALOGE("%s: exynos_gsc_config_exclusive failed %d", __func__, ret);
617 return ret;
618 }
619
620 dev->hdmi_src = src_cfg;
621 dev->hdmi_dst = dst_cfg;
Benoit Goby8bad7e32012-08-16 14:17:14 -0700622 }
Benoit Gobycdd61b32012-07-09 12:09:59 -0700623
Benoit Goby922abbf2012-09-19 19:24:19 -0700624 int ret = exynos_gsc_run_exclusive(dev->hdmi_gsc, &src_cfg, NULL);
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700625 if (ret < 0) {
626 ALOGE("%s: exynos_gsc_run_exclusive failed %d", __func__, ret);
627 return ret;
628 }
Benoit Gobycdd61b32012-07-09 12:09:59 -0700629
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700630 return 0;
Benoit Gobycdd61b32012-07-09 12:09:59 -0700631}
632
Greg Hackmann81575142012-09-19 15:09:04 -0700633bool exynos5_is_offscreen(hwc_layer_1_t &layer,
634 struct exynos5_hwc_composer_device_1_t *pdev)
635{
636 return layer.sourceCrop.left > pdev->xres ||
637 layer.sourceCrop.right < 0 ||
638 layer.sourceCrop.top > pdev->yres ||
639 layer.sourceCrop.bottom < 0;
640}
641
642bool exynos5_supports_overlay(hwc_layer_1_t &layer, size_t i,
643 struct exynos5_hwc_composer_device_1_t *pdev)
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700644{
Greg Hackmannd82ad202012-07-24 13:49:47 -0700645 if (layer.flags & HWC_SKIP_LAYER) {
646 ALOGV("\tlayer %u: skipping", i);
647 return false;
648 }
649
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700650 private_handle_t *handle = private_handle_t::dynamicCast(layer.handle);
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700651
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700652 if (!handle) {
653 ALOGV("\tlayer %u: handle is NULL", i);
654 return false;
655 }
Greg Hackmannf8c24e52012-08-14 15:50:51 -0700656 if (!exynos5_format_is_rgb(handle->format) &&
657 !exynos5_format_is_supported_by_gscaler(handle->format)) {
658 ALOGW("\tlayer %u: unexpected format %u", i, handle->format);
659 return false;
660 }
661
Greg Hackmann09c45c22012-09-20 09:35:37 -0700662 if (exynos5_requires_gscaler(layer, handle->format)) {
Greg Hackmann227ae8a2012-08-03 16:16:58 -0700663 if (!exynos5_supports_gscaler(layer, handle->format, false)) {
Greg Hackmann9130e702012-07-30 14:53:04 -0700664 ALOGV("\tlayer %u: gscaler required but not supported", i);
665 return false;
666 }
667 } else {
668 if (!exynos5_format_is_supported(handle->format)) {
669 ALOGV("\tlayer %u: pixel format %u not supported", i, handle->format);
670 return false;
671 }
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700672 }
Greg Hackmann93cc5e72012-08-03 13:29:33 -0700673 if (!exynos5_blending_is_supported(layer.blending)) {
674 ALOGV("\tlayer %u: blending %d not supported", i, layer.blending);
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700675 return false;
676 }
Greg Hackmann81575142012-09-19 15:09:04 -0700677 if (CC_UNLIKELY(exynos5_is_offscreen(layer, pdev))) {
678 ALOGW("\tlayer %u: off-screen", i);
679 return false;
680 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700681
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700682 return true;
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700683}
684
Greg Hackmann31991d52012-07-13 13:23:11 -0700685inline bool intersect(const hwc_rect &r1, const hwc_rect &r2)
686{
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700687 return !(r1.left > r2.right ||
688 r1.right < r2.left ||
689 r1.top > r2.bottom ||
690 r1.bottom < r2.top);
Greg Hackmann31991d52012-07-13 13:23:11 -0700691}
692
693inline hwc_rect intersection(const hwc_rect &r1, const hwc_rect &r2)
694{
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700695 hwc_rect i;
696 i.top = max(r1.top, r2.top);
697 i.bottom = min(r1.bottom, r2.bottom);
698 i.left = max(r1.left, r2.left);
699 i.right = min(r1.right, r2.right);
700 return i;
Greg Hackmann31991d52012-07-13 13:23:11 -0700701}
702
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -0700703static int exynos5_prepare_fimd(exynos5_hwc_composer_device_1_t *pdev,
Benoit Goby4f439962012-09-21 17:16:45 -0700704 hwc_display_contents_1_t* contents)
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700705{
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -0700706 ALOGV("preparing %u layers for FIMD", contents->numHwLayers);
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700707
Greg Hackmann9130e702012-07-30 14:53:04 -0700708 memset(pdev->bufs.gsc_map, 0, sizeof(pdev->bufs.gsc_map));
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700709
Benoit Goby4f439962012-09-21 17:16:45 -0700710 bool force_fb = pdev->force_gpu;
Erik Gilling87e707e2012-06-29 17:35:13 -0700711 for (size_t i = 0; i < NUM_HW_WINDOWS; i++)
712 pdev->bufs.overlay_map[i] = -1;
713
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700714 bool fb_needed = false;
715 size_t first_fb = 0, last_fb = 0;
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700716
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700717 // find unsupported overlays
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -0700718 for (size_t i = 0; i < contents->numHwLayers; i++) {
719 hwc_layer_1_t &layer = contents->hwLayers[i];
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700720
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -0700721 if (layer.compositionType == HWC_FRAMEBUFFER_TARGET) {
722 ALOGV("\tlayer %u: framebuffer target", i);
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700723 continue;
724 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700725
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -0700726 if (layer.compositionType == HWC_BACKGROUND && !force_fb) {
727 ALOGV("\tlayer %u: background supported", i);
728 dump_layer(&contents->hwLayers[i]);
729 continue;
730 }
731
Greg Hackmann81575142012-09-19 15:09:04 -0700732 if (exynos5_supports_overlay(contents->hwLayers[i], i, pdev) &&
733 !force_fb) {
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700734 ALOGV("\tlayer %u: overlay supported", i);
735 layer.compositionType = HWC_OVERLAY;
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -0700736 dump_layer(&contents->hwLayers[i]);
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700737 continue;
738 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700739
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700740 if (!fb_needed) {
741 first_fb = i;
742 fb_needed = true;
743 }
744 last_fb = i;
745 layer.compositionType = HWC_FRAMEBUFFER;
Greg Hackmann9130e702012-07-30 14:53:04 -0700746
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -0700747 dump_layer(&contents->hwLayers[i]);
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700748 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700749
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700750 // can't composite overlays sandwiched between framebuffers
751 if (fb_needed)
752 for (size_t i = first_fb; i < last_fb; i++)
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -0700753 contents->hwLayers[i].compositionType = HWC_FRAMEBUFFER;
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700754
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700755 // Incrementally try to add our supported layers to hardware windows.
756 // If adding a layer would violate a hardware constraint, force it
757 // into the framebuffer and try again. (Revisiting the entire list is
758 // necessary because adding a layer to the framebuffer can cause other
759 // windows to retroactively violate constraints.)
760 bool changed;
761 do {
762 android::Vector<hwc_rect> rects;
763 android::Vector<hwc_rect> overlaps;
Greg Hackmann9130e702012-07-30 14:53:04 -0700764 size_t pixels_left, windows_left, gsc_left = NUM_GSC_UNITS;
Greg Hackmann31991d52012-07-13 13:23:11 -0700765
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700766 if (fb_needed) {
767 hwc_rect_t fb_rect;
768 fb_rect.top = fb_rect.left = 0;
Greg Hackmannd92fe212012-09-11 14:28:41 -0700769 fb_rect.right = pdev->xres - 1;
770 fb_rect.bottom = pdev->yres - 1;
771 pixels_left = MAX_PIXELS - pdev->xres * pdev->yres;
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700772 windows_left = NUM_HW_WINDOWS - 1;
773 rects.push_back(fb_rect);
774 }
775 else {
776 pixels_left = MAX_PIXELS;
777 windows_left = NUM_HW_WINDOWS;
778 }
Benoit Goby8bad7e32012-08-16 14:17:14 -0700779 if (pdev->hdmi_enabled)
Greg Hackmann9130e702012-07-30 14:53:04 -0700780 gsc_left--;
781
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700782 changed = false;
Greg Hackmann31991d52012-07-13 13:23:11 -0700783
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -0700784 for (size_t i = 0; i < contents->numHwLayers; i++) {
785 hwc_layer_1_t &layer = contents->hwLayers[i];
786 if ((layer.flags & HWC_SKIP_LAYER) ||
787 layer.compositionType == HWC_FRAMEBUFFER_TARGET)
Greg Hackmann9130e702012-07-30 14:53:04 -0700788 continue;
789
790 private_handle_t *handle = private_handle_t::dynamicCast(
791 layer.handle);
Greg Hackmann31991d52012-07-13 13:23:11 -0700792
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700793 // we've already accounted for the framebuffer above
794 if (layer.compositionType == HWC_FRAMEBUFFER)
795 continue;
Greg Hackmann31991d52012-07-13 13:23:11 -0700796
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700797 // only layer 0 can be HWC_BACKGROUND, so we can
798 // unconditionally allow it without extra checks
799 if (layer.compositionType == HWC_BACKGROUND) {
800 windows_left--;
801 continue;
802 }
Greg Hackmann31991d52012-07-13 13:23:11 -0700803
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700804 size_t pixels_needed = WIDTH(layer.displayFrame) *
805 HEIGHT(layer.displayFrame);
806 bool can_compose = windows_left && pixels_needed <= pixels_left;
Greg Hackmann09c45c22012-09-20 09:35:37 -0700807 bool gsc_required = exynos5_requires_gscaler(layer, handle->format);
Greg Hackmann9130e702012-07-30 14:53:04 -0700808 if (gsc_required)
809 can_compose = can_compose && gsc_left;
Greg Hackmann31991d52012-07-13 13:23:11 -0700810
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700811 // hwc_rect_t right and bottom values are normally exclusive;
812 // the intersection logic is simpler if we make them inclusive
813 hwc_rect_t visible_rect = layer.displayFrame;
814 visible_rect.right--; visible_rect.bottom--;
Greg Hackmann31991d52012-07-13 13:23:11 -0700815
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700816 // no more than 2 layers can overlap on a given pixel
817 for (size_t j = 0; can_compose && j < overlaps.size(); j++) {
818 if (intersect(visible_rect, overlaps.itemAt(j)))
819 can_compose = false;
820 }
Greg Hackmann31991d52012-07-13 13:23:11 -0700821
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700822 if (!can_compose) {
823 layer.compositionType = HWC_FRAMEBUFFER;
824 if (!fb_needed) {
825 first_fb = last_fb = i;
826 fb_needed = true;
827 }
828 else {
829 first_fb = min(i, first_fb);
830 last_fb = max(i, last_fb);
831 }
832 changed = true;
833 break;
834 }
Greg Hackmann31991d52012-07-13 13:23:11 -0700835
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700836 for (size_t j = 0; j < rects.size(); j++) {
837 const hwc_rect_t &other_rect = rects.itemAt(j);
838 if (intersect(visible_rect, other_rect))
839 overlaps.push_back(intersection(visible_rect, other_rect));
840 }
841 rects.push_back(visible_rect);
842 pixels_left -= pixels_needed;
843 windows_left--;
Greg Hackmann9130e702012-07-30 14:53:04 -0700844 if (gsc_required)
845 gsc_left--;
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700846 }
Greg Hackmann31991d52012-07-13 13:23:11 -0700847
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700848 if (changed)
849 for (size_t i = first_fb; i < last_fb; i++)
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -0700850 contents->hwLayers[i].compositionType = HWC_FRAMEBUFFER;
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700851 } while(changed);
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700852
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700853 unsigned int nextWindow = 0;
Greg Hackmann9130e702012-07-30 14:53:04 -0700854 int nextGsc = 0;
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700855
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -0700856 for (size_t i = 0; i < contents->numHwLayers; i++) {
857 hwc_layer_1_t &layer = contents->hwLayers[i];
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700858
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700859 if (fb_needed && i == first_fb) {
860 ALOGV("assigning framebuffer to window %u\n",
861 nextWindow);
862 nextWindow++;
863 continue;
864 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700865
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -0700866 if (layer.compositionType != HWC_FRAMEBUFFER &&
867 layer.compositionType != HWC_FRAMEBUFFER_TARGET) {
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700868 ALOGV("assigning layer %u to window %u", i, nextWindow);
869 pdev->bufs.overlay_map[nextWindow] = i;
Greg Hackmann9130e702012-07-30 14:53:04 -0700870 if (layer.compositionType == HWC_OVERLAY) {
871 private_handle_t *handle =
872 private_handle_t::dynamicCast(layer.handle);
Greg Hackmann09c45c22012-09-20 09:35:37 -0700873 if (exynos5_requires_gscaler(layer, handle->format)) {
Greg Hackmann2ddbc742012-08-17 15:41:29 -0700874 ALOGV("\tusing gscaler %u", AVAILABLE_GSC_UNITS[nextGsc]);
Greg Hackmann3088b972012-09-12 15:07:23 -0700875 pdev->bufs.gsc_map[nextWindow].mode =
Greg Hackmann9130e702012-07-30 14:53:04 -0700876 exynos5_gsc_map_t::GSC_M2M;
Greg Hackmann3088b972012-09-12 15:07:23 -0700877 pdev->bufs.gsc_map[nextWindow].idx = nextGsc++;
Greg Hackmann9130e702012-07-30 14:53:04 -0700878 }
879 }
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700880 nextWindow++;
881 }
882 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700883
Greg Hackmann9130e702012-07-30 14:53:04 -0700884 for (size_t i = nextGsc; i < NUM_GSC_UNITS; i++) {
885 for (size_t j = 0; j < NUM_GSC_DST_BUFS; j++)
886 if (pdev->gsc[i].dst_buf[j])
887 pdev->alloc_device->free(pdev->alloc_device,
888 pdev->gsc[i].dst_buf[j]);
889 memset(&pdev->gsc[i], 0, sizeof(pdev->gsc[i]));
890 }
891
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700892 if (fb_needed)
893 pdev->bufs.fb_window = first_fb;
894 else
895 pdev->bufs.fb_window = NO_FB_NEEDED;
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700896
Greg Hackmann9130e702012-07-30 14:53:04 -0700897 return 0;
898}
899
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -0700900static int exynos5_prepare_hdmi(exynos5_hwc_composer_device_1_t *pdev,
901 hwc_display_contents_1_t* contents)
902{
Benoit Goby922abbf2012-09-19 19:24:19 -0700903 ALOGV("preparing %u layers for HDMI", contents->numHwLayers);
904
905 for (size_t i = 0; i < contents->numHwLayers; i++) {
906 hwc_layer_1_t &layer = contents->hwLayers[i];
907
908 if (layer.compositionType == HWC_FRAMEBUFFER_TARGET) {
909 ALOGV("\tlayer %u: framebuffer target", i);
910 dump_layer(&layer);
911 continue;
912 }
913
914 if (layer.compositionType == HWC_BACKGROUND) {
915 ALOGV("\tlayer %u: background layer", i);
916 dump_layer(&layer);
917 continue;
918 }
919
920 layer.compositionType = HWC_FRAMEBUFFER;
921 dump_layer(&layer);
922 }
923
924 return 0;
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -0700925}
926
927static int exynos5_prepare(hwc_composer_device_1_t *dev,
928 size_t numDisplays, hwc_display_contents_1_t** displays)
929{
930 if (!numDisplays || !displays)
931 return 0;
932
933 exynos5_hwc_composer_device_1_t *pdev =
934 (exynos5_hwc_composer_device_1_t *)dev;
935 hwc_display_contents_1_t *fimd_contents = displays[HWC_DISPLAY_PRIMARY];
936 hwc_display_contents_1_t *hdmi_contents = displays[HWC_DISPLAY_EXTERNAL];
937
938 if (pdev->hdmi_hpd) {
939 hdmi_enable(pdev);
940 } else {
941 hdmi_disable(pdev);
942 }
943
944 if (fimd_contents) {
Benoit Goby4f439962012-09-21 17:16:45 -0700945 int err = exynos5_prepare_fimd(pdev, fimd_contents);
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -0700946 if (err)
947 return err;
948 }
949
950 if (hdmi_contents) {
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -0700951 int err = exynos5_prepare_hdmi(pdev, hdmi_contents);
952 if (err)
953 return err;
954 }
955
956 return 0;
957}
958
Greg Hackmann9130e702012-07-30 14:53:04 -0700959static int exynos5_config_gsc_m2m(hwc_layer_1_t &layer,
960 alloc_device_t* alloc_device, exynos5_gsc_data_t *gsc_data,
961 int gsc_idx)
962{
963 ALOGV("configuring gscaler %u for memory-to-memory", gsc_idx);
964
965 private_handle_t *src_handle = private_handle_t::dynamicCast(layer.handle);
966 buffer_handle_t dst_buf;
967 private_handle_t *dst_handle;
968 int ret = 0;
969
970 exynos_gsc_img src_cfg, dst_cfg;
971 memset(&src_cfg, 0, sizeof(src_cfg));
972 memset(&dst_cfg, 0, sizeof(dst_cfg));
973
974 src_cfg.x = layer.sourceCrop.left;
975 src_cfg.y = layer.sourceCrop.top;
976 src_cfg.w = WIDTH(layer.sourceCrop);
977 src_cfg.fw = src_handle->stride;
978 src_cfg.h = HEIGHT(layer.sourceCrop);
Greg Hackmanneba34a92012-08-14 16:10:05 -0700979 src_cfg.fh = src_handle->vstride;
Greg Hackmann9130e702012-07-30 14:53:04 -0700980 src_cfg.yaddr = src_handle->fd;
Greg Hackmann296668e2012-08-14 15:51:40 -0700981 if (exynos5_format_is_ycrcb(src_handle->format)) {
982 src_cfg.uaddr = src_handle->fd2;
983 src_cfg.vaddr = src_handle->fd1;
984 } else {
985 src_cfg.uaddr = src_handle->fd1;
986 src_cfg.vaddr = src_handle->fd2;
987 }
Greg Hackmann9130e702012-07-30 14:53:04 -0700988 src_cfg.format = src_handle->format;
Sanghee Kim7bd58622012-08-08 23:31:10 -0700989 src_cfg.drmMode = !!(src_handle->flags & GRALLOC_USAGE_PROTECTED);
Greg Hackmann9130e702012-07-30 14:53:04 -0700990
991 dst_cfg.x = 0;
992 dst_cfg.y = 0;
993 dst_cfg.w = WIDTH(layer.displayFrame);
994 dst_cfg.h = HEIGHT(layer.displayFrame);
Greg Hackmann9130e702012-07-30 14:53:04 -0700995 dst_cfg.rot = layer.transform;
Sanghee Kim6c195c52012-08-30 22:59:43 -0700996 dst_cfg.drmMode = src_cfg.drmMode;
Greg Hackmann09c45c22012-09-20 09:35:37 -0700997 if (exynos5_format_is_rgb(src_handle->format))
998 dst_cfg.format = HAL_PIXEL_FORMAT_RGBX_8888;
999 else
1000 dst_cfg.format = HAL_PIXEL_FORMAT_BGRA_8888;
1001 // RGB surfaces are already in the right color order from the GPU,
1002 // YUV surfaces need the Gscaler to swap R & B
Greg Hackmann9130e702012-07-30 14:53:04 -07001003
1004 ALOGV("source configuration:");
1005 dump_gsc_img(src_cfg);
1006
1007 if (gsc_src_cfg_changed(src_cfg, gsc_data->src_cfg) ||
1008 gsc_dst_cfg_changed(dst_cfg, gsc_data->dst_cfg)) {
1009 int dst_stride;
1010 int usage = GRALLOC_USAGE_SW_READ_NEVER |
1011 GRALLOC_USAGE_SW_WRITE_NEVER |
1012 GRALLOC_USAGE_HW_COMPOSER;
Sanghee Kim7bd58622012-08-08 23:31:10 -07001013
1014 if (src_handle->flags & GRALLOC_USAGE_PROTECTED)
1015 usage |= GRALLOC_USAGE_PROTECTED;
Greg Hackmann9130e702012-07-30 14:53:04 -07001016
1017 int w = ALIGN(WIDTH(layer.displayFrame), GSC_W_ALIGNMENT);
1018 int h = ALIGN(HEIGHT(layer.displayFrame), GSC_H_ALIGNMENT);
1019
1020 for (size_t i = 0; i < NUM_GSC_DST_BUFS; i++) {
1021 if (gsc_data->dst_buf[i]) {
1022 alloc_device->free(alloc_device, gsc_data->dst_buf[i]);
1023 gsc_data->dst_buf[i] = NULL;
1024 }
1025
1026 int ret = alloc_device->alloc(alloc_device, w, h,
1027 HAL_PIXEL_FORMAT_RGBX_8888, usage, &gsc_data->dst_buf[i],
1028 &dst_stride);
1029 if (ret < 0) {
1030 ALOGE("failed to allocate destination buffer: %s",
1031 strerror(-ret));
1032 goto err_alloc;
1033 }
1034 }
1035
1036 gsc_data->current_buf = 0;
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001037 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001038
Greg Hackmann9130e702012-07-30 14:53:04 -07001039 dst_buf = gsc_data->dst_buf[gsc_data->current_buf];
1040 dst_handle = private_handle_t::dynamicCast(dst_buf);
1041
1042 dst_cfg.fw = dst_handle->stride;
Greg Hackmanneba34a92012-08-14 16:10:05 -07001043 dst_cfg.fh = dst_handle->vstride;
Greg Hackmann9130e702012-07-30 14:53:04 -07001044 dst_cfg.yaddr = dst_handle->fd;
1045
1046 ALOGV("destination configuration:");
1047 dump_gsc_img(dst_cfg);
1048
Greg Hackmann2ddbc742012-08-17 15:41:29 -07001049 gsc_data->gsc = exynos_gsc_create_exclusive(AVAILABLE_GSC_UNITS[gsc_idx],
1050 GSC_M2M_MODE, GSC_DUMMY);
Greg Hackmann9130e702012-07-30 14:53:04 -07001051 if (!gsc_data->gsc) {
1052 ALOGE("failed to create gscaler handle");
1053 ret = -1;
1054 goto err_alloc;
1055 }
1056
1057 ret = exynos_gsc_config_exclusive(gsc_data->gsc, &src_cfg, &dst_cfg);
1058 if (ret < 0) {
1059 ALOGE("failed to configure gscaler %u", gsc_idx);
1060 goto err_gsc_config;
1061 }
1062
1063 ret = exynos_gsc_run_exclusive(gsc_data->gsc, &src_cfg, &dst_cfg);
1064 if (ret < 0) {
1065 ALOGE("failed to run gscaler %u", gsc_idx);
1066 goto err_gsc_config;
1067 }
1068
1069 gsc_data->src_cfg = src_cfg;
1070 gsc_data->dst_cfg = dst_cfg;
1071
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001072 return 0;
Greg Hackmann9130e702012-07-30 14:53:04 -07001073
1074err_gsc_config:
1075 exynos_gsc_destroy(gsc_data->gsc);
1076 gsc_data->gsc = NULL;
1077err_alloc:
1078 for (size_t i = 0; i < NUM_GSC_DST_BUFS; i++) {
1079 if (gsc_data->dst_buf[i]) {
1080 alloc_device->free(alloc_device, gsc_data->dst_buf[i]);
1081 gsc_data->dst_buf[i] = NULL;
1082 }
1083 }
Greg Hackmann7dddd2a2012-09-12 15:11:07 -07001084 memset(&gsc_data->src_cfg, 0, sizeof(gsc_data->src_cfg));
1085 memset(&gsc_data->dst_cfg, 0, sizeof(gsc_data->dst_cfg));
Greg Hackmann9130e702012-07-30 14:53:04 -07001086 return ret;
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001087}
1088
1089static void exynos5_config_handle(private_handle_t *handle,
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001090 hwc_rect_t &sourceCrop, hwc_rect_t &displayFrame,
Greg Hackmannbb3bd9e2012-09-18 13:10:33 -07001091 int32_t blending, int fence_fd, s3c_fb_win_config &cfg,
Greg Hackmann81575142012-09-19 15:09:04 -07001092 exynos5_hwc_composer_device_1_t *pdev)
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001093{
Greg Hackmann81575142012-09-19 15:09:04 -07001094 uint32_t x, y;
1095 uint32_t w = WIDTH(displayFrame);
1096 uint32_t h = HEIGHT(displayFrame);
1097 uint8_t bpp = exynos5_format_to_bpp(handle->format);
1098 uint32_t offset = (sourceCrop.top * handle->stride + sourceCrop.left) * bpp / 8;
1099
1100 if (displayFrame.left < 0) {
1101 unsigned int crop = -displayFrame.left;
1102 ALOGV("layer off left side of screen; cropping %u pixels from left edge",
1103 crop);
1104 x = 0;
1105 w -= crop;
1106 offset += crop * bpp / 8;
1107 } else {
1108 x = displayFrame.left;
1109 }
1110
1111 if (displayFrame.right > pdev->xres) {
1112 unsigned int crop = displayFrame.right - pdev->xres;
1113 ALOGV("layer off right side of screen; cropping %u pixels from right edge",
1114 crop);
1115 w -= crop;
1116 }
1117
1118 if (displayFrame.top < 0) {
1119 unsigned int crop = -displayFrame.top;
1120 ALOGV("layer off top side of screen; cropping %u pixels from top edge",
1121 crop);
1122 y = 0;
1123 h -= crop;
1124 offset += handle->stride * crop * bpp / 8;
1125 } else {
1126 y = displayFrame.top;
1127 }
1128
1129 if (displayFrame.bottom > pdev->yres) {
1130 int crop = displayFrame.bottom - pdev->yres;
1131 ALOGV("layer off bottom side of screen; cropping %u pixels from bottom edge",
1132 crop);
1133 h -= crop;
1134 }
1135
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001136 cfg.state = cfg.S3C_FB_WIN_STATE_BUFFER;
1137 cfg.fd = handle->fd;
Greg Hackmann81575142012-09-19 15:09:04 -07001138 cfg.x = x;
1139 cfg.y = y;
1140 cfg.w = w;
1141 cfg.h = h;
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001142 cfg.format = exynos5_format_to_s3c_format(handle->format);
Greg Hackmann81575142012-09-19 15:09:04 -07001143 cfg.offset = offset;
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001144 cfg.stride = handle->stride * bpp / 8;
Greg Hackmann93cc5e72012-08-03 13:29:33 -07001145 cfg.blending = exynos5_blending_to_s3c_blending(blending);
Greg Hackmannbb3bd9e2012-09-18 13:10:33 -07001146 cfg.fence_fd = fence_fd;
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001147}
1148
Erik Gilling87e707e2012-06-29 17:35:13 -07001149static void exynos5_config_overlay(hwc_layer_1_t *layer, s3c_fb_win_config &cfg,
Greg Hackmannd92fe212012-09-11 14:28:41 -07001150 exynos5_hwc_composer_device_1_t *pdev)
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001151{
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001152 if (layer->compositionType == HWC_BACKGROUND) {
1153 hwc_color_t color = layer->backgroundColor;
1154 cfg.state = cfg.S3C_FB_WIN_STATE_COLOR;
1155 cfg.color = (color.r << 16) | (color.g << 8) | color.b;
1156 cfg.x = 0;
1157 cfg.y = 0;
Greg Hackmannd92fe212012-09-11 14:28:41 -07001158 cfg.w = pdev->xres;
1159 cfg.h = pdev->yres;
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001160 return;
1161 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001162
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001163 private_handle_t *handle = private_handle_t::dynamicCast(layer->handle);
Greg Hackmann93cc5e72012-08-03 13:29:33 -07001164 exynos5_config_handle(handle, layer->sourceCrop, layer->displayFrame,
Greg Hackmannbb3bd9e2012-09-18 13:10:33 -07001165 layer->blending, layer->acquireFenceFd, cfg, pdev);
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001166}
1167
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -07001168static int exynos5_post_fimd(exynos5_hwc_composer_device_1_t *pdev,
Benoit Goby922abbf2012-09-19 19:24:19 -07001169 hwc_display_contents_1_t* contents)
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001170{
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -07001171 exynos5_hwc_post_data_t *pdata = &pdev->bufs;
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001172 struct s3c_fb_win_config_data win_data;
1173 struct s3c_fb_win_config *config = win_data.config;
Greg Hackmannbb3bd9e2012-09-18 13:10:33 -07001174
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001175 memset(config, 0, sizeof(win_data.config));
Greg Hackmannbb3bd9e2012-09-18 13:10:33 -07001176 for (size_t i = 0; i < NUM_HW_WINDOWS; i++)
1177 config[i].fence_fd = -1;
Greg Hackmann9130e702012-07-30 14:53:04 -07001178
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001179 for (size_t i = 0; i < NUM_HW_WINDOWS; i++) {
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -07001180 int layer_idx = pdata->overlay_map[i];
1181 if (layer_idx != -1) {
1182 hwc_layer_1_t &layer = contents->hwLayers[layer_idx];
Greg Hackmann9130e702012-07-30 14:53:04 -07001183 private_handle_t *handle =
1184 private_handle_t::dynamicCast(layer.handle);
1185
1186 if (pdata->gsc_map[i].mode == exynos5_gsc_map_t::GSC_M2M) {
1187 int gsc_idx = pdata->gsc_map[i].idx;
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -07001188 exynos5_gsc_data_t &gsc = pdev->gsc[gsc_idx];
Greg Hackmann9130e702012-07-30 14:53:04 -07001189
Greg Hackmannbb3bd9e2012-09-18 13:10:33 -07001190 if (layer.acquireFenceFd != -1) {
1191 int err = sync_wait(layer.acquireFenceFd, 100);
1192 if (err != 0)
1193 ALOGW("fence for layer %zu didn't signal in 100 ms: %s",
1194 i, strerror(errno));
1195 close(layer.acquireFenceFd);
1196 }
1197
1198 int err = exynos5_config_gsc_m2m(layer, pdev->alloc_device, &gsc,
1199 gsc_idx);
1200 if (err < 0) {
Greg Hackmann9130e702012-07-30 14:53:04 -07001201 ALOGE("failed to queue gscaler %u input for layer %u",
1202 gsc_idx, i);
1203 continue;
1204 }
1205
Greg Hackmannbb3bd9e2012-09-18 13:10:33 -07001206 err = exynos_gsc_stop_exclusive(gsc.gsc);
Greg Hackmann9130e702012-07-30 14:53:04 -07001207 exynos_gsc_destroy(gsc.gsc);
1208 gsc.gsc = NULL;
1209 if (err < 0) {
1210 ALOGE("failed to dequeue gscaler output for layer %u", i);
1211 continue;
1212 }
1213
1214 buffer_handle_t dst_buf = gsc.dst_buf[gsc.current_buf];
1215 gsc.current_buf = (gsc.current_buf + 1) % NUM_GSC_DST_BUFS;
1216 private_handle_t *dst_handle =
1217 private_handle_t::dynamicCast(dst_buf);
Greg Hackmann90219f32012-08-16 17:28:57 -07001218 hwc_rect_t sourceCrop = { 0, 0,
1219 WIDTH(layer.displayFrame), HEIGHT(layer.displayFrame) };
1220 exynos5_config_handle(dst_handle, sourceCrop,
Greg Hackmannbb3bd9e2012-09-18 13:10:33 -07001221 layer.displayFrame, layer.blending, -1, config[i],
1222 pdev);
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -07001223 } else {
1224 exynos5_config_overlay(&layer, config[i], pdev);
Erik Gilling87e707e2012-06-29 17:35:13 -07001225 }
1226 }
Greg Hackmann93cc5e72012-08-03 13:29:33 -07001227 if (i == 0 && config[i].blending != S3C_FB_BLENDING_NONE) {
1228 ALOGV("blending not supported on window 0; forcing BLENDING_NONE");
1229 config[i].blending = S3C_FB_BLENDING_NONE;
1230 }
1231
Greg Hackmann9130e702012-07-30 14:53:04 -07001232 ALOGV("window %u configuration:", i);
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001233 dump_config(config[i]);
1234 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001235
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -07001236 int ret = ioctl(pdev->fd, S3CFB_WIN_CONFIG, &win_data);
Greg Hackmannbb3bd9e2012-09-18 13:10:33 -07001237 for (size_t i = 0; i < NUM_HW_WINDOWS; i++)
1238 if (config[i].fence_fd != -1)
1239 close(config[i].fence_fd);
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -07001240 if (ret < 0) {
1241 ALOGE("ioctl S3CFB_WIN_CONFIG failed: %s", strerror(errno));
1242 return ret;
1243 }
1244
1245 memcpy(pdev->last_config, &win_data.config, sizeof(win_data.config));
1246 memcpy(pdev->last_gsc_map, pdata->gsc_map, sizeof(pdata->gsc_map));
1247 pdev->last_fb_window = pdata->fb_window;
1248 for (size_t i = 0; i < NUM_HW_WINDOWS; i++) {
1249 int layer_idx = pdata->overlay_map[i];
1250 if (layer_idx != -1) {
1251 hwc_layer_1_t &layer = contents->hwLayers[layer_idx];
1252 pdev->last_handles[i] = layer.handle;
1253 }
1254 }
1255
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -07001256 return win_data.fence;
1257}
1258
1259static int exynos5_set_fimd(exynos5_hwc_composer_device_1_t *pdev,
Benoit Goby922abbf2012-09-19 19:24:19 -07001260 hwc_display_contents_1_t* contents)
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -07001261{
1262 if (!contents->dpy || !contents->sur)
1263 return 0;
1264
1265 hwc_layer_1_t *fb_layer = NULL;
1266
1267 if (pdev->bufs.fb_window != NO_FB_NEEDED) {
1268 for (size_t i = 0; i < contents->numHwLayers; i++) {
1269 if (contents->hwLayers[i].compositionType ==
1270 HWC_FRAMEBUFFER_TARGET) {
1271 pdev->bufs.overlay_map[pdev->bufs.fb_window] = i;
1272 fb_layer = &contents->hwLayers[i];
1273 break;
Greg Hackmann600867e2012-08-23 12:58:02 -07001274 }
1275 }
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -07001276
1277 if (CC_UNLIKELY(!fb_layer)) {
1278 ALOGE("framebuffer target expected, but not provided");
1279 return -EINVAL;
1280 }
1281
1282 ALOGV("framebuffer target buffer:");
1283 dump_layer(fb_layer);
Greg Hackmann600867e2012-08-23 12:58:02 -07001284 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001285
Benoit Goby922abbf2012-09-19 19:24:19 -07001286 int fence = exynos5_post_fimd(pdev, contents);
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -07001287 if (fence < 0)
1288 return fence;
1289
1290 for (size_t i = 0; i < NUM_HW_WINDOWS; i++) {
1291 if (pdev->bufs.overlay_map[i] != -1) {
1292 hwc_layer_1_t &layer =
1293 contents->hwLayers[pdev->bufs.overlay_map[i]];
1294 int dup_fd = dup(fence);
1295 if (dup_fd < 0)
1296 ALOGW("release fence dup failed: %s", strerror(errno));
1297 layer.releaseFenceFd = dup_fd;
Benoit Goby8bad7e32012-08-16 14:17:14 -07001298 }
1299 }
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -07001300 close(fence);
Benoit Gobycdd61b32012-07-09 12:09:59 -07001301
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -07001302 return 0;
1303}
1304
1305static int exynos5_set_hdmi(exynos5_hwc_composer_device_1_t *pdev,
1306 hwc_display_contents_1_t* contents)
1307{
Benoit Goby922abbf2012-09-19 19:24:19 -07001308 for (size_t i = 0; i < contents->numHwLayers; i++) {
1309 hwc_layer_1_t &layer = contents->hwLayers[i];
1310
1311 if (layer.acquireFenceFd != -1) {
1312 int err = sync_wait(layer.acquireFenceFd, 100);
1313 if (err != 0)
1314 ALOGW("fence for layer %zu didn't signal in 100 ms: %s",
1315 i, strerror(errno));
1316 close(layer.acquireFenceFd);
1317 }
Benoit Goby48a69542012-09-21 17:12:28 -07001318 }
1319
1320 if (!pdev->hdmi_enabled)
1321 return 0;
1322
1323 for (size_t i = 0; i < contents->numHwLayers; i++) {
1324 hwc_layer_1_t &layer = contents->hwLayers[i];
Benoit Goby922abbf2012-09-19 19:24:19 -07001325
1326 if (layer.compositionType == HWC_FRAMEBUFFER_TARGET) {
1327 if (!layer.handle)
1328 continue;
1329
1330 ALOGV("HDMI FB layer:");
1331 dump_layer(&layer);
1332
1333 hdmi_configure_fblayer(pdev, layer);
1334 }
1335 }
1336
1337 return 0;
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001338}
1339
Jesse Halle94046d2012-07-31 14:34:08 -07001340static int exynos5_set(struct hwc_composer_device_1 *dev,
1341 size_t numDisplays, hwc_display_contents_1_t** displays)
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001342{
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -07001343 if (!numDisplays || !displays)
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001344 return 0;
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001345
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -07001346 exynos5_hwc_composer_device_1_t *pdev =
1347 (exynos5_hwc_composer_device_1_t *)dev;
1348 hwc_display_contents_1_t *fimd_contents = displays[HWC_DISPLAY_PRIMARY];
1349 hwc_display_contents_1_t *hdmi_contents = displays[HWC_DISPLAY_EXTERNAL];
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001350
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -07001351 if (fimd_contents) {
Benoit Goby922abbf2012-09-19 19:24:19 -07001352 int err = exynos5_set_fimd(pdev, fimd_contents);
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -07001353 if (err)
1354 return err;
Greg Hackmann0fbe1702012-08-22 11:27:38 -07001355 }
Erik Gilling87e707e2012-06-29 17:35:13 -07001356
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -07001357 if (hdmi_contents) {
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -07001358 int err = exynos5_set_hdmi(pdev, hdmi_contents);
1359 if (err)
1360 return err;
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001361 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001362
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001363 return 0;
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001364}
1365
Erik Gilling87e707e2012-06-29 17:35:13 -07001366static void exynos5_registerProcs(struct hwc_composer_device_1* dev,
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001367 hwc_procs_t const* procs)
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001368{
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001369 struct exynos5_hwc_composer_device_1_t* pdev =
1370 (struct exynos5_hwc_composer_device_1_t*)dev;
Jesse Hallda5a71d2012-08-21 12:12:55 -07001371 pdev->procs = procs;
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001372}
1373
Erik Gilling87e707e2012-06-29 17:35:13 -07001374static int exynos5_query(struct hwc_composer_device_1* dev, int what, int *value)
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001375{
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001376 struct exynos5_hwc_composer_device_1_t *pdev =
1377 (struct exynos5_hwc_composer_device_1_t *)dev;
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001378
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001379 switch (what) {
1380 case HWC_BACKGROUND_LAYER_SUPPORTED:
1381 // we support the background layer
1382 value[0] = 1;
1383 break;
1384 case HWC_VSYNC_PERIOD:
1385 // vsync period in nanosecond
Greg Hackmannd92fe212012-09-11 14:28:41 -07001386 value[0] = pdev->vsync_period;
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001387 break;
1388 default:
1389 // unsupported query
1390 return -EINVAL;
1391 }
1392 return 0;
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001393}
1394
Jesse Halle94046d2012-07-31 14:34:08 -07001395static int exynos5_eventControl(struct hwc_composer_device_1 *dev, int dpy,
1396 int event, int enabled)
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001397{
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001398 struct exynos5_hwc_composer_device_1_t *pdev =
1399 (struct exynos5_hwc_composer_device_1_t *)dev;
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001400
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001401 switch (event) {
1402 case HWC_EVENT_VSYNC:
1403 __u32 val = !!enabled;
1404 int err = ioctl(pdev->fd, S3CFB_SET_VSYNC_INT, &val);
1405 if (err < 0) {
1406 ALOGE("vsync ioctl failed");
1407 return -errno;
1408 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001409
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001410 return 0;
1411 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001412
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001413 return -EINVAL;
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001414}
1415
Benoit Gobycdd61b32012-07-09 12:09:59 -07001416static void handle_hdmi_uevent(struct exynos5_hwc_composer_device_1_t *pdev,
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001417 const char *buff, int len)
Benoit Gobycdd61b32012-07-09 12:09:59 -07001418{
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001419 const char *s = buff;
1420 s += strlen(s) + 1;
Benoit Gobycdd61b32012-07-09 12:09:59 -07001421
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001422 while (*s) {
1423 if (!strncmp(s, "SWITCH_STATE=", strlen("SWITCH_STATE=")))
1424 pdev->hdmi_hpd = atoi(s + strlen("SWITCH_STATE=")) == 1;
Benoit Gobycdd61b32012-07-09 12:09:59 -07001425
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001426 s += strlen(s) + 1;
1427 if (s - buff >= len)
1428 break;
1429 }
Benoit Gobycdd61b32012-07-09 12:09:59 -07001430
Benoit Gobyd6bb7ce2012-08-09 16:11:22 -07001431 if (pdev->hdmi_hpd) {
1432 if (hdmi_get_config(pdev)) {
1433 ALOGE("Error reading HDMI configuration");
1434 pdev->hdmi_hpd = false;
1435 return;
1436 }
1437 }
1438
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001439 ALOGV("HDMI HPD changed to %s", pdev->hdmi_hpd ? "enabled" : "disabled");
Benoit Gobyd6bb7ce2012-08-09 16:11:22 -07001440 if (pdev->hdmi_hpd)
Benoit Goby8bad7e32012-08-16 14:17:14 -07001441 ALOGI("HDMI Resolution changed to %dx%d", pdev->hdmi_h, pdev->hdmi_w);
Benoit Gobycdd61b32012-07-09 12:09:59 -07001442
Jesse Hallda5a71d2012-08-21 12:12:55 -07001443 /* hwc_dev->procs is set right after the device is opened, but there is
1444 * still a race condition where a hotplug event might occur after the open
1445 * but before the procs are registered. */
1446 if (pdev->procs)
Benoit Gobya93919c2012-09-20 22:36:09 -07001447 pdev->procs->hotplug(pdev->procs, HWC_DISPLAY_EXTERNAL, pdev->hdmi_hpd);
Benoit Gobycdd61b32012-07-09 12:09:59 -07001448}
1449
Greg Hackmann29724852012-07-23 15:31:10 -07001450static void handle_vsync_event(struct exynos5_hwc_composer_device_1_t *pdev)
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001451{
Jesse Hallda5a71d2012-08-21 12:12:55 -07001452 if (!pdev->procs)
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001453 return;
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001454
Greg Hackmannfbeb8532012-07-26 14:21:16 -07001455 int err = lseek(pdev->vsync_fd, 0, SEEK_SET);
1456 if (err < 0) {
1457 ALOGE("error seeking to vsync timestamp: %s", strerror(errno));
1458 return;
1459 }
1460
Greg Hackmann29724852012-07-23 15:31:10 -07001461 char buf[4096];
Greg Hackmannfbeb8532012-07-26 14:21:16 -07001462 err = read(pdev->vsync_fd, buf, sizeof(buf));
Greg Hackmann29724852012-07-23 15:31:10 -07001463 if (err < 0) {
1464 ALOGE("error reading vsync timestamp: %s", strerror(errno));
1465 return;
Greg Hackmann3464b1d2012-07-24 09:46:23 -07001466 }
Greg Hackmann29724852012-07-23 15:31:10 -07001467 buf[sizeof(buf) - 1] = '\0';
Greg Hackmann3464b1d2012-07-24 09:46:23 -07001468
Greg Hackmann29724852012-07-23 15:31:10 -07001469 errno = 0;
1470 uint64_t timestamp = strtoull(buf, NULL, 0);
1471 if (!errno)
1472 pdev->procs->vsync(pdev->procs, 0, timestamp);
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001473}
1474
1475static void *hwc_vsync_thread(void *data)
1476{
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001477 struct exynos5_hwc_composer_device_1_t *pdev =
1478 (struct exynos5_hwc_composer_device_1_t *)data;
1479 char uevent_desc[4096];
1480 memset(uevent_desc, 0, sizeof(uevent_desc));
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001481
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001482 setpriority(PRIO_PROCESS, 0, HAL_PRIORITY_URGENT_DISPLAY);
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001483
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001484 uevent_init();
Greg Hackmann29724852012-07-23 15:31:10 -07001485
Greg Hackmannfbeb8532012-07-26 14:21:16 -07001486 char temp[4096];
1487 int err = read(pdev->vsync_fd, temp, sizeof(temp));
1488 if (err < 0) {
1489 ALOGE("error reading vsync timestamp: %s", strerror(errno));
1490 return NULL;
1491 }
1492
Greg Hackmann29724852012-07-23 15:31:10 -07001493 struct pollfd fds[2];
1494 fds[0].fd = pdev->vsync_fd;
1495 fds[0].events = POLLPRI;
1496 fds[1].fd = uevent_get_fd();
1497 fds[1].events = POLLIN;
1498
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001499 while (true) {
Greg Hackmann29724852012-07-23 15:31:10 -07001500 int err = poll(fds, 2, -1);
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001501
Greg Hackmann29724852012-07-23 15:31:10 -07001502 if (err > 0) {
1503 if (fds[0].revents & POLLPRI) {
1504 handle_vsync_event(pdev);
1505 }
1506 else if (fds[1].revents & POLLIN) {
1507 int len = uevent_next_event(uevent_desc,
1508 sizeof(uevent_desc) - 2);
Benoit Gobycdd61b32012-07-09 12:09:59 -07001509
Greg Hackmann29724852012-07-23 15:31:10 -07001510 bool hdmi = !strcmp(uevent_desc,
1511 "change@/devices/virtual/switch/hdmi");
1512 if (hdmi)
1513 handle_hdmi_uevent(pdev, uevent_desc, len);
1514 }
1515 }
1516 else if (err == -1) {
1517 if (errno == EINTR)
1518 break;
1519 ALOGE("error in vsync thread: %s", strerror(errno));
1520 }
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001521 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001522
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001523 return NULL;
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001524}
1525
Jesse Halle94046d2012-07-31 14:34:08 -07001526static int exynos5_blank(struct hwc_composer_device_1 *dev, int dpy, int blank)
Colin Cross00359a82012-07-12 17:54:17 -07001527{
1528 struct exynos5_hwc_composer_device_1_t *pdev =
1529 (struct exynos5_hwc_composer_device_1_t *)dev;
1530
1531 int fb_blank = blank ? FB_BLANK_POWERDOWN : FB_BLANK_UNBLANK;
1532 int err = ioctl(pdev->fd, FBIOBLANK, fb_blank);
1533 if (err < 0) {
1534 ALOGE("%sblank ioctl failed", blank ? "" : "un");
1535 return -errno;
1536 }
1537
Benoit Gobyad4e3582012-08-30 17:17:34 -07001538 if (pdev->hdmi_hpd) {
1539 if (blank && !pdev->hdmi_blanked)
1540 hdmi_disable(pdev);
1541 pdev->hdmi_blanked = !!blank;
1542 }
1543
Colin Cross00359a82012-07-12 17:54:17 -07001544 return 0;
1545}
1546
Greg Hackmann600867e2012-08-23 12:58:02 -07001547static void exynos5_dump(hwc_composer_device_1* dev, char *buff, int buff_len)
1548{
1549 if (buff_len <= 0)
1550 return;
1551
1552 struct exynos5_hwc_composer_device_1_t *pdev =
1553 (struct exynos5_hwc_composer_device_1_t *)dev;
1554
1555 android::String8 result;
1556
Benoit Goby8bad7e32012-08-16 14:17:14 -07001557 result.appendFormat(" hdmi_enabled=%u\n", pdev->hdmi_enabled);
1558 if (pdev->hdmi_enabled)
1559 result.appendFormat(" w=%u, h=%u\n", pdev->hdmi_w, pdev->hdmi_h);
Greg Hackmann600867e2012-08-23 12:58:02 -07001560 result.append(
1561 " type | handle | color | blend | format | position | size | gsc \n"
1562 "----------+----------|----------+-------+--------+---------------+---------------------\n");
1563 // 8_______ | 8_______ | 8_______ | 5____ | 6_____ | [5____,5____] | [5____,5____] | 3__ \n"
1564
1565 for (size_t i = 0; i < NUM_HW_WINDOWS; i++) {
1566 struct s3c_fb_win_config &config = pdev->last_config[i];
1567 if (config.state == config.S3C_FB_WIN_STATE_DISABLED) {
1568 result.appendFormat(" %8s | %8s | %8s | %5s | %6s | %13s | %13s",
1569 "DISABLED", "-", "-", "-", "-", "-", "-");
1570 }
1571 else {
1572 if (config.state == config.S3C_FB_WIN_STATE_COLOR)
1573 result.appendFormat(" %8s | %8s | %8x | %5s | %6s", "COLOR",
1574 "-", config.color, "-", "-");
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -07001575 else
1576 result.appendFormat(" %8s | %8x | %8s | %5x | %6x",
1577 pdev->last_fb_window == i ? "FB" : "OVERLAY",
1578 intptr_t(pdev->last_handles[i]),
1579 "-", config.blending, config.format);
Greg Hackmann600867e2012-08-23 12:58:02 -07001580
1581 result.appendFormat(" | [%5d,%5d] | [%5u,%5u]", config.x, config.y,
1582 config.w, config.h);
1583 }
1584 if (pdev->last_gsc_map[i].mode == exynos5_gsc_map_t::GSC_NONE)
1585 result.appendFormat(" | %3s", "-");
1586 else
1587 result.appendFormat(" | %3d",
1588 AVAILABLE_GSC_UNITS[pdev->last_gsc_map[i].idx]);
1589 result.append("\n");
1590 }
1591
1592 strlcpy(buff, result.string(), buff_len);
1593}
1594
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -07001595static int exynos5_getDisplayConfigs(struct hwc_composer_device_1 *dev,
1596 int disp, uint32_t *configs, size_t *numConfigs)
1597{
1598 struct exynos5_hwc_composer_device_1_t *pdev =
1599 (struct exynos5_hwc_composer_device_1_t *)dev;
1600
1601 if (*numConfigs == 0)
1602 return 0;
1603
1604 if (disp == HWC_DISPLAY_PRIMARY) {
1605 configs[0] = 0;
1606 *numConfigs = 1;
1607 return 0;
1608 } else if (disp == HWC_DISPLAY_EXTERNAL) {
Benoit Goby922abbf2012-09-19 19:24:19 -07001609 if (!pdev->hdmi_hpd) {
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -07001610 return -EINVAL;
1611 }
1612
1613 int err = hdmi_get_config(pdev);
1614 if (err) {
1615 return -EINVAL;
1616 }
1617
1618 configs[0] = 0;
1619 *numConfigs = 1;
1620 return 0;
1621 }
1622
1623 return -EINVAL;
1624}
1625
1626static int32_t exynos5_fimd_attribute(struct exynos5_hwc_composer_device_1_t *pdev,
1627 const uint32_t attribute)
1628{
1629 switch(attribute) {
1630 case HWC_DISPLAY_VSYNC_PERIOD:
1631 return pdev->vsync_period;
1632
1633 case HWC_DISPLAY_WIDTH:
1634 return pdev->xres;
1635
1636 case HWC_DISPLAY_HEIGHT:
1637 return pdev->yres;
1638
1639 case HWC_DISPLAY_DPI_X:
1640 return pdev->xdpi;
1641
1642 case HWC_DISPLAY_DPI_Y:
1643 return pdev->ydpi;
1644
1645 default:
1646 ALOGE("unknown display attribute %u", attribute);
1647 return -EINVAL;
1648 }
1649}
1650
1651static int32_t exynos5_hdmi_attribute(struct exynos5_hwc_composer_device_1_t *pdev,
1652 const uint32_t attribute)
1653{
1654 switch(attribute) {
1655 case HWC_DISPLAY_VSYNC_PERIOD:
1656 return pdev->vsync_period;
1657
1658 case HWC_DISPLAY_WIDTH:
1659 return pdev->hdmi_w;
1660
1661 case HWC_DISPLAY_HEIGHT:
1662 return pdev->hdmi_h;
1663
1664 case HWC_DISPLAY_DPI_X:
1665 case HWC_DISPLAY_DPI_Y:
1666 return 0; // unknown
1667
1668 default:
1669 ALOGE("unknown display attribute %u", attribute);
1670 return -EINVAL;
1671 }
1672}
1673
Jesse Hall54aa0d22012-09-20 11:43:49 -07001674static int exynos5_getDisplayAttributes(struct hwc_composer_device_1 *dev,
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -07001675 int disp, uint32_t config, const uint32_t *attributes, int32_t *values)
1676{
1677 struct exynos5_hwc_composer_device_1_t *pdev =
1678 (struct exynos5_hwc_composer_device_1_t *)dev;
1679
1680 for (int i = 0; attributes[i] != HWC_DISPLAY_NO_ATTRIBUTE; i++) {
1681 if (disp == HWC_DISPLAY_PRIMARY)
1682 values[i] = exynos5_fimd_attribute(pdev, attributes[i]);
1683 else if (disp == HWC_DISPLAY_EXTERNAL)
1684 values[i] = exynos5_hdmi_attribute(pdev, attributes[i]);
Jesse Hall54aa0d22012-09-20 11:43:49 -07001685 else {
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -07001686 ALOGE("unknown display type %u", disp);
Jesse Hall54aa0d22012-09-20 11:43:49 -07001687 return -EINVAL;
1688 }
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -07001689 }
Jesse Hall54aa0d22012-09-20 11:43:49 -07001690
1691 return 0;
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -07001692}
1693
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001694static int exynos5_close(hw_device_t* device);
1695
1696static int exynos5_open(const struct hw_module_t *module, const char *name,
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001697 struct hw_device_t **device)
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001698{
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001699 int ret;
Greg Hackmannd92fe212012-09-11 14:28:41 -07001700 int refreshRate;
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001701 int sw_fd;
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001702
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001703 if (strcmp(name, HWC_HARDWARE_COMPOSER)) {
1704 return -EINVAL;
1705 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001706
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001707 struct exynos5_hwc_composer_device_1_t *dev;
1708 dev = (struct exynos5_hwc_composer_device_1_t *)malloc(sizeof(*dev));
1709 memset(dev, 0, sizeof(*dev));
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001710
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001711 if (hw_get_module(GRALLOC_HARDWARE_MODULE_ID,
1712 (const struct hw_module_t **)&dev->gralloc_module)) {
1713 ALOGE("failed to get gralloc hw module");
1714 ret = -EINVAL;
1715 goto err_get_module;
1716 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001717
Greg Hackmann9130e702012-07-30 14:53:04 -07001718 if (gralloc_open((const hw_module_t *)dev->gralloc_module,
1719 &dev->alloc_device)) {
1720 ALOGE("failed to open gralloc");
1721 ret = -EINVAL;
1722 goto err_get_module;
1723 }
1724
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001725 dev->fd = open("/dev/graphics/fb0", O_RDWR);
1726 if (dev->fd < 0) {
1727 ALOGE("failed to open framebuffer");
1728 ret = dev->fd;
Greg Hackmann9130e702012-07-30 14:53:04 -07001729 goto err_open_fb;
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001730 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001731
Greg Hackmannd92fe212012-09-11 14:28:41 -07001732 struct fb_var_screeninfo info;
1733 if (ioctl(dev->fd, FBIOGET_VSCREENINFO, &info) == -1) {
1734 ALOGE("FBIOGET_VSCREENINFO ioctl failed: %s", strerror(errno));
1735 ret = -errno;
1736 goto err_ioctl;
1737 }
1738
1739 refreshRate = 1000000000000LLU /
1740 (
1741 uint64_t( info.upper_margin + info.lower_margin + info.yres )
1742 * ( info.left_margin + info.right_margin + info.xres )
1743 * info.pixclock
1744 );
1745
1746 if (refreshRate == 0) {
1747 ALOGW("invalid refresh rate, assuming 60 Hz");
1748 refreshRate = 60;
1749 }
1750
Greg Hackmann0c1ba822012-09-13 13:38:12 -07001751 dev->xres = 2560;
1752 dev->yres = 1600;
Greg Hackmannd92fe212012-09-11 14:28:41 -07001753 dev->xdpi = 1000 * (info.xres * 25.4f) / info.width;
1754 dev->ydpi = 1000 * (info.yres * 25.4f) / info.height;
1755 dev->vsync_period = 1000000000 / refreshRate;
1756
1757 ALOGV("using\n"
1758 "xres = %d px\n"
1759 "yres = %d px\n"
1760 "width = %d mm (%f dpi)\n"
1761 "height = %d mm (%f dpi)\n"
1762 "refresh rate = %d Hz\n",
1763 dev->xres, dev->yres, info.width, dev->xdpi / 1000.0,
1764 info.height, dev->ydpi / 1000.0, refreshRate);
1765
Benoit Goby8bad7e32012-08-16 14:17:14 -07001766 dev->hdmi_mixer0 = open("/dev/v4l-subdev7", O_RDWR);
1767 if (dev->hdmi_layer0 < 0) {
1768 ALOGE("failed to open hdmi mixer0 subdev");
1769 ret = dev->hdmi_layer0;
Benoit Gobyd6bb7ce2012-08-09 16:11:22 -07001770 goto err_ioctl;
1771 }
1772
Benoit Goby8bad7e32012-08-16 14:17:14 -07001773 dev->hdmi_layer0 = open("/dev/video16", O_RDWR);
1774 if (dev->hdmi_layer0 < 0) {
1775 ALOGE("failed to open hdmi layer0 device");
1776 ret = dev->hdmi_layer0;
1777 goto err_mixer0;
1778 }
1779
1780 dev->hdmi_layer1 = open("/dev/video17", O_RDWR);
1781 if (dev->hdmi_layer1 < 0) {
1782 ALOGE("failed to open hdmi layer1 device");
1783 ret = dev->hdmi_layer1;
1784 goto err_hdmi0;
1785 }
1786
Greg Hackmann29724852012-07-23 15:31:10 -07001787 dev->vsync_fd = open("/sys/devices/platform/exynos5-fb.1/vsync", O_RDONLY);
1788 if (dev->vsync_fd < 0) {
1789 ALOGE("failed to open vsync attribute");
1790 ret = dev->vsync_fd;
Benoit Goby8bad7e32012-08-16 14:17:14 -07001791 goto err_hdmi1;
Greg Hackmann29724852012-07-23 15:31:10 -07001792 }
1793
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001794 sw_fd = open("/sys/class/switch/hdmi/state", O_RDONLY);
1795 if (sw_fd) {
1796 char val;
Benoit Goby4e0f1682012-08-30 17:42:41 -07001797 if (read(sw_fd, &val, 1) == 1 && val == '1') {
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001798 dev->hdmi_hpd = true;
Benoit Goby4e0f1682012-08-30 17:42:41 -07001799 if (hdmi_get_config(dev)) {
1800 ALOGE("Error reading HDMI configuration");
1801 dev->hdmi_hpd = false;
1802 }
1803 }
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001804 }
Benoit Gobycdd61b32012-07-09 12:09:59 -07001805
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001806 dev->base.common.tag = HARDWARE_DEVICE_TAG;
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -07001807 dev->base.common.version = HWC_DEVICE_API_VERSION_1_1;
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001808 dev->base.common.module = const_cast<hw_module_t *>(module);
1809 dev->base.common.close = exynos5_close;
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001810
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001811 dev->base.prepare = exynos5_prepare;
1812 dev->base.set = exynos5_set;
Jesse Hallda5a71d2012-08-21 12:12:55 -07001813 dev->base.eventControl = exynos5_eventControl;
1814 dev->base.blank = exynos5_blank;
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001815 dev->base.query = exynos5_query;
Jesse Hallda5a71d2012-08-21 12:12:55 -07001816 dev->base.registerProcs = exynos5_registerProcs;
Greg Hackmann600867e2012-08-23 12:58:02 -07001817 dev->base.dump = exynos5_dump;
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -07001818 dev->base.getDisplayConfigs = exynos5_getDisplayConfigs;
1819 dev->base.getDisplayAttributes = exynos5_getDisplayAttributes;
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001820
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001821 *device = &dev->base.common;
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001822
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001823 ret = pthread_create(&dev->vsync_thread, NULL, hwc_vsync_thread, dev);
1824 if (ret) {
1825 ALOGE("failed to start vsync thread: %s", strerror(ret));
1826 ret = -ret;
Greg Hackmann29724852012-07-23 15:31:10 -07001827 goto err_vsync;
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001828 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001829
Greg Hackmann6e0f76d2012-09-17 17:47:09 -07001830 char value[PROPERTY_VALUE_MAX];
1831 property_get("debug.hwc.force_gpu", value, "0");
1832 dev->force_gpu = atoi(value);
1833
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001834 return 0;
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001835
Greg Hackmann29724852012-07-23 15:31:10 -07001836err_vsync:
1837 close(dev->vsync_fd);
Benoit Goby8bad7e32012-08-16 14:17:14 -07001838err_mixer0:
1839 close(dev->hdmi_mixer0);
1840err_hdmi1:
1841 close(dev->hdmi_layer0);
1842err_hdmi0:
1843 close(dev->hdmi_layer1);
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001844err_ioctl:
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001845 close(dev->fd);
Greg Hackmann9130e702012-07-30 14:53:04 -07001846err_open_fb:
1847 gralloc_close(dev->alloc_device);
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001848err_get_module:
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001849 free(dev);
1850 return ret;
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001851}
1852
1853static int exynos5_close(hw_device_t *device)
1854{
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001855 struct exynos5_hwc_composer_device_1_t *dev =
1856 (struct exynos5_hwc_composer_device_1_t *)device;
Greg Hackmann29724852012-07-23 15:31:10 -07001857 pthread_kill(dev->vsync_thread, SIGTERM);
1858 pthread_join(dev->vsync_thread, NULL);
Greg Hackmann9130e702012-07-30 14:53:04 -07001859 for (size_t i = 0; i < NUM_GSC_UNITS; i++) {
1860 if (dev->gsc[i].gsc)
1861 exynos_gsc_destroy(dev->gsc[i].gsc);
1862 for (size_t j = 0; i < NUM_GSC_DST_BUFS; j++)
1863 if (dev->gsc[i].dst_buf[j])
1864 dev->alloc_device->free(dev->alloc_device, dev->gsc[i].dst_buf[j]);
1865 }
1866 gralloc_close(dev->alloc_device);
Greg Hackmann29724852012-07-23 15:31:10 -07001867 close(dev->vsync_fd);
Benoit Goby8bad7e32012-08-16 14:17:14 -07001868 close(dev->hdmi_mixer0);
1869 close(dev->hdmi_layer0);
1870 close(dev->hdmi_layer1);
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001871 close(dev->fd);
1872 return 0;
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001873}
1874
1875static struct hw_module_methods_t exynos5_hwc_module_methods = {
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001876 open: exynos5_open,
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001877};
1878
1879hwc_module_t HAL_MODULE_INFO_SYM = {
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001880 common: {
1881 tag: HARDWARE_MODULE_TAG,
1882 module_api_version: HWC_MODULE_API_VERSION_0_1,
1883 hal_api_version: HARDWARE_HAL_API_VERSION,
1884 id: HWC_HARDWARE_MODULE_ID,
1885 name: "Samsung exynos5 hwcomposer module",
1886 author: "Google",
1887 methods: &exynos5_hwc_module_methods,
1888 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001889};