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Greg Hackmann86eb1c62012-05-30 09:25:51 -07001/*
2 * Copyright (C) 2012 The Android Open Source Project
3 *
4 * Licensed under the Apache License, Version 2.0 (the "License");
5 * you may not use this file except in compliance with the License.
6 * You may obtain a copy of the License at
7 *
8 * http://www.apache.org/licenses/LICENSE-2.0
9 *
10 * Unless required by applicable law or agreed to in writing, software
11 * distributed under the License is distributed on an "AS IS" BASIS,
12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13 * See the License for the specific language governing permissions and
14 * limitations under the License.
15 */
Greg Hackmann86eb1c62012-05-30 09:25:51 -070016#include <errno.h>
17#include <fcntl.h>
Greg Hackmann29724852012-07-23 15:31:10 -070018#include <poll.h>
Greg Hackmann86eb1c62012-05-30 09:25:51 -070019#include <pthread.h>
20#include <stdio.h>
21#include <stdlib.h>
22
23#include <sys/ioctl.h>
24#include <sys/mman.h>
25#include <sys/time.h>
26#include <sys/resource.h>
27
28#include <s3c-fb.h>
29
30#include <EGL/egl.h>
31
Erik Gilling87e707e2012-06-29 17:35:13 -070032#define HWC_REMOVE_DEPRECATED_VERSIONS 1
33
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -070034#include <cutils/compiler.h>
Greg Hackmann86eb1c62012-05-30 09:25:51 -070035#include <cutils/log.h>
36#include <hardware/gralloc.h>
37#include <hardware/hardware.h>
38#include <hardware/hwcomposer.h>
39#include <hardware_legacy/uevent.h>
Greg Hackmann600867e2012-08-23 12:58:02 -070040#include <utils/String8.h>
Greg Hackmann86eb1c62012-05-30 09:25:51 -070041#include <utils/Vector.h>
42
Greg Hackmannf4cc0c32012-05-30 09:28:52 -070043#include <sync/sync.h>
44
Greg Hackmann86eb1c62012-05-30 09:25:51 -070045#include "ion.h"
46#include "gralloc_priv.h"
Benoit Gobycdd61b32012-07-09 12:09:59 -070047#include "exynos_gscaler.h"
Greg Hackmann9130e702012-07-30 14:53:04 -070048#include "exynos_format.h"
Benoit Goby8bad7e32012-08-16 14:17:14 -070049#include "exynos_v4l2.h"
50#include "s5p_tvout_v4l2.h"
Greg Hackmann86eb1c62012-05-30 09:25:51 -070051
Greg Hackmannf9509d32012-09-12 09:49:29 -070052const size_t NUM_HW_WINDOWS = 5;
Greg Hackmann86eb1c62012-05-30 09:25:51 -070053const size_t NO_FB_NEEDED = NUM_HW_WINDOWS + 1;
Greg Hackmannf9509d32012-09-12 09:49:29 -070054const size_t MAX_PIXELS = 2560 * 1600 * 2;
Greg Hackmann9130e702012-07-30 14:53:04 -070055const size_t GSC_W_ALIGNMENT = 16;
56const size_t GSC_H_ALIGNMENT = 16;
Greg Hackmann2ddbc742012-08-17 15:41:29 -070057const int AVAILABLE_GSC_UNITS[] = { 0, 3 };
58const size_t NUM_GSC_UNITS = sizeof(AVAILABLE_GSC_UNITS) /
59 sizeof(AVAILABLE_GSC_UNITS[0]);
Greg Hackmann86eb1c62012-05-30 09:25:51 -070060
Erik Gilling87e707e2012-06-29 17:35:13 -070061struct exynos5_hwc_composer_device_1_t;
Greg Hackmann86eb1c62012-05-30 09:25:51 -070062
Greg Hackmann9130e702012-07-30 14:53:04 -070063struct exynos5_gsc_map_t {
64 enum {
65 GSC_NONE = 0,
66 GSC_M2M,
67 // TODO: GSC_LOCAL_PATH
68 } mode;
69 int idx;
70};
71
Greg Hackmann86eb1c62012-05-30 09:25:51 -070072struct exynos5_hwc_post_data_t {
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -070073 int overlay_map[NUM_HW_WINDOWS];
74 exynos5_gsc_map_t gsc_map[NUM_HW_WINDOWS];
75 size_t fb_window;
Greg Hackmann86eb1c62012-05-30 09:25:51 -070076};
77
Greg Hackmann44a6d422012-09-17 17:31:30 -070078const size_t NUM_GSC_DST_BUFS = 3;
Greg Hackmann9130e702012-07-30 14:53:04 -070079struct exynos5_gsc_data_t {
80 void *gsc;
81 exynos_gsc_img src_cfg;
82 exynos_gsc_img dst_cfg;
83 buffer_handle_t dst_buf[NUM_GSC_DST_BUFS];
84 size_t current_buf;
85};
86
Erik Gilling87e707e2012-06-29 17:35:13 -070087struct exynos5_hwc_composer_device_1_t {
Greg Hackmannf6f2e542012-07-16 16:10:27 -070088 hwc_composer_device_1_t base;
Greg Hackmann86eb1c62012-05-30 09:25:51 -070089
Greg Hackmannf6f2e542012-07-16 16:10:27 -070090 int fd;
Greg Hackmann29724852012-07-23 15:31:10 -070091 int vsync_fd;
Greg Hackmannf6f2e542012-07-16 16:10:27 -070092 exynos5_hwc_post_data_t bufs;
Greg Hackmann86eb1c62012-05-30 09:25:51 -070093
Greg Hackmannf6f2e542012-07-16 16:10:27 -070094 const private_module_t *gralloc_module;
Greg Hackmann9130e702012-07-30 14:53:04 -070095 alloc_device_t *alloc_device;
Jesse Hallda5a71d2012-08-21 12:12:55 -070096 const hwc_procs_t *procs;
Greg Hackmannf6f2e542012-07-16 16:10:27 -070097 pthread_t vsync_thread;
Benoit Gobycdd61b32012-07-09 12:09:59 -070098
Greg Hackmannd92fe212012-09-11 14:28:41 -070099 int32_t xres;
100 int32_t yres;
101 int32_t xdpi;
102 int32_t ydpi;
103 int32_t vsync_period;
104
Benoit Goby8bad7e32012-08-16 14:17:14 -0700105 int hdmi_mixer0;
106 int hdmi_layer0;
107 int hdmi_layer1;
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700108 bool hdmi_hpd;
Benoit Goby8bad7e32012-08-16 14:17:14 -0700109 bool hdmi_enabled;
Benoit Gobyad4e3582012-08-30 17:17:34 -0700110 bool hdmi_blanked;
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700111 void *hdmi_gsc;
Benoit Goby8bad7e32012-08-16 14:17:14 -0700112 int hdmi_w;
113 int hdmi_h;
114 exynos_gsc_img hdmi_src;
115 exynos_gsc_img hdmi_dst;
Greg Hackmann9130e702012-07-30 14:53:04 -0700116
117 exynos5_gsc_data_t gsc[NUM_GSC_UNITS];
Greg Hackmann600867e2012-08-23 12:58:02 -0700118
119 struct s3c_fb_win_config last_config[NUM_HW_WINDOWS];
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -0700120 size_t last_fb_window;
Greg Hackmann600867e2012-08-23 12:58:02 -0700121 const void *last_handles[NUM_HW_WINDOWS];
122 exynos5_gsc_map_t last_gsc_map[NUM_HW_WINDOWS];
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700123};
124
Greg Hackmann9130e702012-07-30 14:53:04 -0700125static void dump_handle(private_handle_t *h)
126{
Greg Hackmanneba34a92012-08-14 16:10:05 -0700127 ALOGV("\t\tformat = %d, width = %u, height = %u, stride = %u, vstride = %u",
128 h->format, h->width, h->height, h->stride, h->vstride);
Greg Hackmann9130e702012-07-30 14:53:04 -0700129}
130
Erik Gilling87e707e2012-06-29 17:35:13 -0700131static void dump_layer(hwc_layer_1_t const *l)
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700132{
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700133 ALOGV("\ttype=%d, flags=%08x, handle=%p, tr=%02x, blend=%04x, "
134 "{%d,%d,%d,%d}, {%d,%d,%d,%d}",
135 l->compositionType, l->flags, l->handle, l->transform,
136 l->blending,
137 l->sourceCrop.left,
138 l->sourceCrop.top,
139 l->sourceCrop.right,
140 l->sourceCrop.bottom,
141 l->displayFrame.left,
142 l->displayFrame.top,
143 l->displayFrame.right,
144 l->displayFrame.bottom);
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700145
Greg Hackmann9130e702012-07-30 14:53:04 -0700146 if(l->handle && !(l->flags & HWC_SKIP_LAYER))
147 dump_handle(private_handle_t::dynamicCast(l->handle));
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700148}
149
150static void dump_config(s3c_fb_win_config &c)
151{
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700152 ALOGV("\tstate = %u", c.state);
153 if (c.state == c.S3C_FB_WIN_STATE_BUFFER) {
154 ALOGV("\t\tfd = %d, offset = %u, stride = %u, "
155 "x = %d, y = %d, w = %u, h = %u, "
Greg Hackmann93cc5e72012-08-03 13:29:33 -0700156 "format = %u, blending = %u",
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700157 c.fd, c.offset, c.stride,
158 c.x, c.y, c.w, c.h,
Greg Hackmann93cc5e72012-08-03 13:29:33 -0700159 c.format, c.blending);
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700160 }
161 else if (c.state == c.S3C_FB_WIN_STATE_COLOR) {
162 ALOGV("\t\tcolor = %u", c.color);
163 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700164}
165
Greg Hackmann9130e702012-07-30 14:53:04 -0700166static void dump_gsc_img(exynos_gsc_img &c)
167{
168 ALOGV("\tx = %u, y = %u, w = %u, h = %u, fw = %u, fh = %u",
169 c.x, c.y, c.w, c.h, c.fw, c.fh);
170 ALOGV("\taddr = {%u, %u, %u}, rot = %u, cacheable = %u, drmMode = %u",
171 c.yaddr, c.uaddr, c.vaddr, c.rot, c.cacheable, c.drmMode);
172}
173
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700174inline int WIDTH(const hwc_rect &rect) { return rect.right - rect.left; }
175inline int HEIGHT(const hwc_rect &rect) { return rect.bottom - rect.top; }
Greg Hackmann31991d52012-07-13 13:23:11 -0700176template<typename T> inline T max(T a, T b) { return (a > b) ? a : b; }
177template<typename T> inline T min(T a, T b) { return (a < b) ? a : b; }
178
179static bool is_transformed(const hwc_layer_1_t &layer)
180{
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700181 return layer.transform != 0;
Greg Hackmann31991d52012-07-13 13:23:11 -0700182}
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700183
Greg Hackmann9130e702012-07-30 14:53:04 -0700184static bool is_rotated(const hwc_layer_1_t &layer)
185{
186 return (layer.transform & HAL_TRANSFORM_ROT_90) ||
187 (layer.transform & HAL_TRANSFORM_ROT_180);
188}
189
Erik Gilling87e707e2012-06-29 17:35:13 -0700190static bool is_scaled(const hwc_layer_1_t &layer)
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700191{
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700192 return WIDTH(layer.displayFrame) != WIDTH(layer.sourceCrop) ||
193 HEIGHT(layer.displayFrame) != HEIGHT(layer.sourceCrop);
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700194}
195
Benoit Goby8bad7e32012-08-16 14:17:14 -0700196static inline bool gsc_dst_cfg_changed(exynos_gsc_img &c1, exynos_gsc_img &c2)
197{
198 return c1.x != c2.x ||
199 c1.y != c2.y ||
200 c1.w != c2.w ||
201 c1.h != c2.h ||
202 c1.format != c2.format ||
203 c1.rot != c2.rot ||
204 c1.cacheable != c2.cacheable ||
205 c1.drmMode != c2.drmMode;
206}
207
208static inline bool gsc_src_cfg_changed(exynos_gsc_img &c1, exynos_gsc_img &c2)
209{
210 return gsc_dst_cfg_changed(c1, c2) ||
211 c1.fw != c2.fw ||
212 c1.fh != c2.fh;
213}
214
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700215static enum s3c_fb_pixel_format exynos5_format_to_s3c_format(int format)
216{
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700217 switch (format) {
218 case HAL_PIXEL_FORMAT_RGBA_8888:
219 return S3C_FB_PIXEL_FORMAT_RGBA_8888;
220 case HAL_PIXEL_FORMAT_RGBX_8888:
221 return S3C_FB_PIXEL_FORMAT_RGBX_8888;
222 case HAL_PIXEL_FORMAT_RGBA_5551:
223 return S3C_FB_PIXEL_FORMAT_RGBA_5551;
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700224
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700225 default:
226 return S3C_FB_PIXEL_FORMAT_MAX;
227 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700228}
229
230static bool exynos5_format_is_supported(int format)
231{
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700232 return exynos5_format_to_s3c_format(format) < S3C_FB_PIXEL_FORMAT_MAX;
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700233}
234
Greg Hackmannf8c24e52012-08-14 15:50:51 -0700235static bool exynos5_format_is_rgb(int format)
236{
237 switch (format) {
238 case HAL_PIXEL_FORMAT_RGBA_8888:
239 case HAL_PIXEL_FORMAT_RGBX_8888:
240 case HAL_PIXEL_FORMAT_RGB_888:
241 case HAL_PIXEL_FORMAT_RGB_565:
242 case HAL_PIXEL_FORMAT_BGRA_8888:
243 case HAL_PIXEL_FORMAT_RGBA_5551:
244 case HAL_PIXEL_FORMAT_RGBA_4444:
245 return true;
246
247 default:
248 return false;
249 }
250}
251
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700252static bool exynos5_format_is_supported_by_gscaler(int format)
253{
Greg Hackmann9130e702012-07-30 14:53:04 -0700254 switch (format) {
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700255 case HAL_PIXEL_FORMAT_RGBX_8888:
256 case HAL_PIXEL_FORMAT_RGB_565:
Rebecca Schultz Zavinc853be72012-08-23 00:03:05 -0700257 case HAL_PIXEL_FORMAT_EXYNOS_YV12:
Greg Hackmann9130e702012-07-30 14:53:04 -0700258 case HAL_PIXEL_FORMAT_YCbCr_420_SP:
Greg Hackmann9130e702012-07-30 14:53:04 -0700259 case HAL_PIXEL_FORMAT_YCbCr_420_SP_TILED:
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700260 return true;
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700261
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700262 default:
263 return false;
264 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700265}
266
Greg Hackmann296668e2012-08-14 15:51:40 -0700267static bool exynos5_format_is_ycrcb(int format)
268{
Rebecca Schultz Zavinc853be72012-08-23 00:03:05 -0700269 return format == HAL_PIXEL_FORMAT_EXYNOS_YV12;
Greg Hackmann296668e2012-08-14 15:51:40 -0700270}
271
Greg Hackmann9130e702012-07-30 14:53:04 -0700272static bool exynos5_format_requires_gscaler(int format)
273{
274 return exynos5_format_is_supported_by_gscaler(format) &&
275 format != HAL_PIXEL_FORMAT_RGBX_8888;
276}
277
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700278static uint8_t exynos5_format_to_bpp(int format)
279{
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700280 switch (format) {
281 case HAL_PIXEL_FORMAT_RGBA_8888:
282 case HAL_PIXEL_FORMAT_RGBX_8888:
283 return 32;
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700284
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700285 case HAL_PIXEL_FORMAT_RGBA_5551:
286 case HAL_PIXEL_FORMAT_RGBA_4444:
287 return 16;
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700288
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700289 default:
290 ALOGW("unrecognized pixel format %u", format);
291 return 0;
292 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700293}
294
Greg Hackmann227ae8a2012-08-03 16:16:58 -0700295static bool exynos5_supports_gscaler(hwc_layer_1_t &layer, int format,
296 bool local_path)
Greg Hackmann9130e702012-07-30 14:53:04 -0700297{
298 private_handle_t *handle = private_handle_t::dynamicCast(layer.handle);
299
Rebecca Schultz Zavin23cd5952012-09-12 00:30:52 -0700300 int max_w = is_rotated(layer) ? 2048 : 4800;
301 int max_h = is_rotated(layer) ? 2048 : 3344;
Greg Hackmann9130e702012-07-30 14:53:04 -0700302
Rebecca Schultz Zavin23cd5952012-09-12 00:30:52 -0700303 bool rot90or270 = !!(layer.transform & HAL_TRANSFORM_ROT_90);
304 // n.b.: HAL_TRANSFORM_ROT_270 = HAL_TRANSFORM_ROT_90 |
305 // HAL_TRANSFORM_ROT_180
Greg Hackmann9130e702012-07-30 14:53:04 -0700306
Rebecca Schultz Zavin23cd5952012-09-12 00:30:52 -0700307 int src_w = WIDTH(layer.sourceCrop), src_h = HEIGHT(layer.sourceCrop);
308 int dest_w, dest_h;
309 if (rot90or270) {
310 dest_w = HEIGHT(layer.displayFrame);
311 dest_h = WIDTH(layer.displayFrame);
312 } else {
313 dest_w = WIDTH(layer.displayFrame);
314 dest_h = HEIGHT(layer.displayFrame);
315 }
316 int max_downscale = local_path ? 4 : 16;
317 const int max_upscale = 8;
Greg Hackmann227ae8a2012-08-03 16:16:58 -0700318
Rebecca Schultz Zavin23cd5952012-09-12 00:30:52 -0700319 return exynos5_format_is_supported_by_gscaler(format) &&
320 handle->stride <= max_w &&
321 handle->stride % GSC_W_ALIGNMENT == 0 &&
322 src_w <= dest_w * max_downscale &&
323 dest_w <= src_w * max_upscale &&
324 handle->vstride <= max_h &&
325 handle->vstride % GSC_H_ALIGNMENT == 0 &&
326 src_h <= dest_h * max_downscale &&
327 dest_h <= src_h * max_upscale &&
328 // per 46.2
329 (!rot90or270 || layer.sourceCrop.top % 2 == 0) &&
330 (!rot90or270 || layer.sourceCrop.left % 2 == 0);
331 // per 46.3.1.6
Greg Hackmann9130e702012-07-30 14:53:04 -0700332}
333
Benoit Gobyd6bb7ce2012-08-09 16:11:22 -0700334int hdmi_get_config(struct exynos5_hwc_composer_device_1_t *dev)
335{
336 struct v4l2_dv_preset preset;
337 struct v4l2_dv_enum_preset enum_preset;
Benoit Gobyd6bb7ce2012-08-09 16:11:22 -0700338 int index = 0;
339 bool found = false;
340 int ret;
341
Benoit Goby8bad7e32012-08-16 14:17:14 -0700342 if (ioctl(dev->hdmi_layer0, VIDIOC_G_DV_PRESET, &preset) < 0) {
Benoit Gobyd6bb7ce2012-08-09 16:11:22 -0700343 ALOGE("%s: g_dv_preset error, %d", __func__, errno);
344 return -1;
345 }
346
347 while (true) {
348 enum_preset.index = index++;
Benoit Goby8bad7e32012-08-16 14:17:14 -0700349 ret = ioctl(dev->hdmi_layer0, VIDIOC_ENUM_DV_PRESETS, &enum_preset);
Benoit Gobyd6bb7ce2012-08-09 16:11:22 -0700350
351 if (ret < 0) {
352 if (errno == EINVAL)
353 break;
354 ALOGE("%s: enum_dv_presets error, %d", __func__, errno);
355 return -1;
356 }
357
358 ALOGV("%s: %d preset=%02d width=%d height=%d name=%s",
359 __func__, enum_preset.index, enum_preset.preset,
360 enum_preset.width, enum_preset.height, enum_preset.name);
361
362 if (preset.preset == enum_preset.preset) {
Benoit Goby8bad7e32012-08-16 14:17:14 -0700363 dev->hdmi_w = enum_preset.width;
364 dev->hdmi_h = enum_preset.height;
Benoit Gobyd6bb7ce2012-08-09 16:11:22 -0700365 found = true;
366 }
367 }
368
369 return found ? 0 : -1;
370}
371
Greg Hackmann93cc5e72012-08-03 13:29:33 -0700372static enum s3c_fb_blending exynos5_blending_to_s3c_blending(int32_t blending)
373{
374 switch (blending) {
375 case HWC_BLENDING_NONE:
376 return S3C_FB_BLENDING_NONE;
377 case HWC_BLENDING_PREMULT:
378 return S3C_FB_BLENDING_PREMULT;
379 case HWC_BLENDING_COVERAGE:
380 return S3C_FB_BLENDING_COVERAGE;
381
382 default:
383 return S3C_FB_BLENDING_MAX;
384 }
385}
386
387static bool exynos5_blending_is_supported(int32_t blending)
388{
389 return exynos5_blending_to_s3c_blending(blending) < S3C_FB_BLENDING_MAX;
390}
391
Benoit Goby8bad7e32012-08-16 14:17:14 -0700392static int hdmi_start_background(struct exynos5_hwc_composer_device_1_t *dev)
393{
394 struct v4l2_requestbuffers reqbuf;
395 struct v4l2_subdev_format sd_fmt;
396 struct v4l2_subdev_crop sd_crop;
397 struct v4l2_format fmt;
398 struct v4l2_buffer buffer;
399 struct v4l2_plane planes[1];
400
401 memset(&reqbuf, 0, sizeof(reqbuf));
402 memset(&sd_fmt, 0, sizeof(sd_fmt));
403 memset(&sd_crop, 0, sizeof(sd_crop));
404 memset(&fmt, 0, sizeof(fmt));
405 memset(&buffer, 0, sizeof(buffer));
406 memset(planes, 0, sizeof(planes));
407
408 sd_fmt.pad = MIXER_G1_SUBDEV_PAD_SINK;
409 sd_fmt.which = V4L2_SUBDEV_FORMAT_ACTIVE;
410 sd_fmt.format.width = 1;
411 sd_fmt.format.height = 1;
412 sd_fmt.format.code = V4L2_MBUS_FMT_XRGB8888_4X8_LE;
413 if (exynos_subdev_s_fmt(dev->hdmi_mixer0, &sd_fmt) < 0) {
414 ALOGE("%s: s_fmt failed pad=%d", __func__, sd_fmt.pad);
415 return -1;
416 }
417
418 sd_crop.pad = MIXER_G1_SUBDEV_PAD_SINK;
419 sd_crop.which = V4L2_SUBDEV_FORMAT_ACTIVE;
420 sd_crop.rect.left = 0;
421 sd_crop.rect.top = 0;
422 sd_crop.rect.width = 1;
423 sd_crop.rect.height = 1;
424 if (exynos_subdev_s_crop(dev->hdmi_mixer0, &sd_crop) < 0) {
425 ALOGE("%s: set_crop failed pad=%d", __func__, sd_crop.pad);
426 return -1;
427 }
428
429 sd_fmt.pad = MIXER_G1_SUBDEV_PAD_SOURCE;
430 sd_fmt.which = V4L2_SUBDEV_FORMAT_ACTIVE;
431 sd_fmt.format.width = dev->hdmi_w;
432 sd_fmt.format.height = dev->hdmi_h;
433 sd_fmt.format.code = V4L2_MBUS_FMT_XRGB8888_4X8_LE;
434 if (exynos_subdev_s_fmt(dev->hdmi_mixer0, &sd_fmt) < 0) {
435 ALOGE("%s: s_fmt failed pad=%d", __func__, sd_fmt.pad);
436 return -1;
437 }
438
439 sd_crop.pad = MIXER_G1_SUBDEV_PAD_SOURCE;
440 sd_crop.which = V4L2_SUBDEV_FORMAT_ACTIVE;
441 sd_crop.rect.left = 0;
442 sd_crop.rect.top = 0;
443 sd_crop.rect.width = 1;
444 sd_crop.rect.height = 1;
445 if (exynos_subdev_s_crop(dev->hdmi_mixer0, &sd_crop) < 0) {
446 ALOGE("%s: s_crop failed pad=%d", __func__, sd_crop.pad);
447 return -1;
448 }
449
450 fmt.type = V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE;
451 fmt.fmt.pix_mp.width = 1;
452 fmt.fmt.pix_mp.height = 1;
453 fmt.fmt.pix_mp.pixelformat = V4L2_PIX_FMT_BGR32;
454 fmt.fmt.pix_mp.field = V4L2_FIELD_ANY;
455 fmt.fmt.pix_mp.num_planes = 1;
456 if (exynos_v4l2_s_fmt(dev->hdmi_layer1, &fmt) < 0) {
457 ALOGE("%s::videodev set format failed", __func__);
458 return -1;
459 }
460
461 reqbuf.count = 1;
462 reqbuf.type = V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE;
463 reqbuf.memory = V4L2_MEMORY_MMAP;
464
465 if (exynos_v4l2_reqbufs(dev->hdmi_layer1, &reqbuf) < 0) {
466 ALOGE("%s: exynos_v4l2_reqbufs failed %d", __func__, errno);
467 return -1;
468 }
469
470 if (reqbuf.count != 1) {
471 ALOGE("%s: didn't get buffer", __func__);
472 return -1;
473 }
474
475 memset(&buffer, 0, sizeof(buffer));
476 buffer.type = reqbuf.type;
477 buffer.memory = V4L2_MEMORY_MMAP;
478 buffer.length = 1;
479 buffer.m.planes = planes;
480 if (exynos_v4l2_querybuf(dev->hdmi_layer1, &buffer) < 0) {
481 ALOGE("%s: exynos_v4l2_querybuf failed %d", __func__, errno);
482 return -1;
483 }
484
485 void *start = mmap(NULL, planes[0].length, PROT_READ | PROT_WRITE,
486 MAP_SHARED, dev->hdmi_layer1, planes[0].m.mem_offset);
487 if (start == MAP_FAILED) {
488 ALOGE("%s: mmap failed %d", __func__, errno);
489 return -1;
490 }
491
492 memset(start, 0, planes[0].length);
493
494 munmap(start, planes[0].length);
495
496 if (exynos_v4l2_qbuf(dev->hdmi_layer1, &buffer) < 0) {
497 ALOGE("%s: exynos_v4l2_qbuf failed %d", __func__, errno);
498 return -1;
499 }
500
501 if (exynos_v4l2_streamon(dev->hdmi_layer1, buffer.type) < 0) {
502 ALOGE("%s:stream on failed", __func__);
503 return -1;
504 }
505
506 if (exynos_v4l2_s_ctrl(dev->hdmi_layer1, V4L2_CID_TV_LAYER_PRIO, 0) < 0) {
507 ALOGE("%s: s_ctrl LAYER_PRIO failed", __func__);
508 return -1;
509 }
510
511 return 0;
512}
513
514static int hdmi_stop_background(struct exynos5_hwc_composer_device_1_t *dev)
515{
516 struct v4l2_requestbuffers reqbuf;
517
518 if (exynos_v4l2_streamoff(dev->hdmi_layer1, V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE) < 0) {
519 ALOGE("%s:stream off failed", __func__);
520 return -1;
521 }
522
523 memset(&reqbuf, 0, sizeof(reqbuf));
524 reqbuf.count = 0;
525 reqbuf.type = V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE;
526 reqbuf.memory = V4L2_MEMORY_MMAP;
527 if (exynos_v4l2_reqbufs(dev->hdmi_layer1, &reqbuf) < 0) {
528 ALOGE("%s: exynos_v4l2_reqbufs failed %d", __func__, errno);
529 return -1;
530 }
531
532 return 0;
533}
534
Benoit Gobycdd61b32012-07-09 12:09:59 -0700535static int hdmi_enable(struct exynos5_hwc_composer_device_1_t *dev)
536{
Benoit Goby8bad7e32012-08-16 14:17:14 -0700537 if (dev->hdmi_enabled)
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700538 return 0;
Benoit Gobycdd61b32012-07-09 12:09:59 -0700539
Benoit Gobyad4e3582012-08-30 17:17:34 -0700540 if (dev->hdmi_blanked)
541 return 0;
542
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700543 dev->hdmi_gsc = exynos_gsc_create_exclusive(3, GSC_OUTPUT_MODE, GSC_OUT_TV);
544 if (!dev->hdmi_gsc) {
545 ALOGE("%s: exynos_gsc_create_exclusive failed", __func__);
546 return -ENODEV;
547 }
Benoit Gobycdd61b32012-07-09 12:09:59 -0700548
Benoit Goby8bad7e32012-08-16 14:17:14 -0700549 memset(&dev->hdmi_src, 0, sizeof(dev->hdmi_src));
Benoit Gobycdd61b32012-07-09 12:09:59 -0700550
Benoit Goby8bad7e32012-08-16 14:17:14 -0700551 if (hdmi_start_background(dev) < 0) {
552 ALOGE("%s: hdmi_start_background failed", __func__);
553 return -1;
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700554 }
Benoit Gobycdd61b32012-07-09 12:09:59 -0700555
Benoit Goby8bad7e32012-08-16 14:17:14 -0700556 dev->hdmi_enabled = true;
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700557 return 0;
Benoit Gobycdd61b32012-07-09 12:09:59 -0700558}
559
560static void hdmi_disable(struct exynos5_hwc_composer_device_1_t *dev)
561{
Benoit Goby8bad7e32012-08-16 14:17:14 -0700562 if (!dev->hdmi_enabled)
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700563 return;
564 exynos_gsc_destroy(dev->hdmi_gsc);
Benoit Gobyad4e3582012-08-30 17:17:34 -0700565 hdmi_stop_background(dev);
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700566 dev->hdmi_gsc = NULL;
Benoit Goby8bad7e32012-08-16 14:17:14 -0700567 dev->hdmi_enabled = false;
Benoit Gobycdd61b32012-07-09 12:09:59 -0700568}
569
Benoit Goby8bad7e32012-08-16 14:17:14 -0700570static int hdmi_configure(struct exynos5_hwc_composer_device_1_t *dev,
571 exynos_gsc_img &src_cfg,
572 exynos_gsc_img &dst_cfg)
573{
574 if (!gsc_src_cfg_changed(src_cfg, dev->hdmi_src)
575 && !gsc_dst_cfg_changed(dst_cfg, dev->hdmi_dst))
576 return 0;
577
578 ALOGV("HDMI source config:");
579 dump_gsc_img(src_cfg);
580 ALOGV("HDMI dest config:");
581 dump_gsc_img(dst_cfg);
582
583 exynos_gsc_stop_exclusive(dev->hdmi_gsc);
584
585 int ret = exynos_gsc_config_exclusive(dev->hdmi_gsc, &src_cfg, &dst_cfg);
586 if (ret < 0) {
587 ALOGE("%s: exynos_gsc_config_exclusive failed %d", __func__, ret);
588 return ret;
589 }
590
591 dev->hdmi_src = src_cfg;
592 dev->hdmi_dst = dst_cfg;
593 return ret;
594}
595
596static int hdmi_configure_handle(struct exynos5_hwc_composer_device_1_t *dev, private_handle_t *h)
597{
598 exynos_gsc_img src_cfg, dst_cfg;
599 memset(&src_cfg, 0, sizeof(src_cfg));
600 memset(&dst_cfg, 0, sizeof(dst_cfg));
601
602 src_cfg.w = src_cfg.fw = h->width;
603 src_cfg.h = src_cfg.fh = h->height;
604 src_cfg.format = HAL_PIXEL_FORMAT_BGRA_8888;
605
606 dst_cfg.w = dst_cfg.fw = dev->hdmi_w;
607 dst_cfg.h = dst_cfg.fh = dev->hdmi_h;
608 dst_cfg.format = HAL_PIXEL_FORMAT_EXYNOS_YV12;
609
610 return hdmi_configure(dev, src_cfg, dst_cfg);
611}
612
613static int hdmi_configure_layer(struct exynos5_hwc_composer_device_1_t *dev, hwc_layer_1_t &layer)
614{
615 exynos_gsc_img src_cfg, dst_cfg;
616 memset(&src_cfg, 0, sizeof(src_cfg));
617 memset(&dst_cfg, 0, sizeof(dst_cfg));
618 private_handle_t *src_handle = private_handle_t::dynamicCast(layer.handle);
619
620 src_cfg.x = layer.sourceCrop.left;
621 src_cfg.y = layer.sourceCrop.top;
622 src_cfg.w = WIDTH(layer.sourceCrop);
623 src_cfg.fw = src_handle->stride;
624 src_cfg.h = HEIGHT(layer.sourceCrop);
625 src_cfg.fh = src_handle->vstride;
626 src_cfg.format = src_handle->format;
627
628 if (dev->hdmi_w * src_cfg.h < dev->hdmi_h * src_cfg.w) {
629 dst_cfg.w = dev->hdmi_w;
630 dst_cfg.fw = dev->hdmi_w;
631 dst_cfg.fh = dev->hdmi_h;
632 dst_cfg.h = dev->hdmi_w * src_cfg.h / src_cfg.w;
633 dst_cfg.y = (dev->hdmi_h - dst_cfg.h) / 2;
634 }
635 else {
636 dst_cfg.w = dev->hdmi_h * src_cfg.w / src_cfg.h;
637 dst_cfg.fw = dev->hdmi_w;
638 dst_cfg.h = dev->hdmi_h;
639 dst_cfg.fh = dev->hdmi_h;
640 dst_cfg.x = (dev->hdmi_w - dst_cfg.w) / 2;
641 }
642 dst_cfg.format = HAL_PIXEL_FORMAT_EXYNOS_YV12;
643 dst_cfg.rot = layer.transform;
644
645 return hdmi_configure(dev, src_cfg, dst_cfg);
646}
647
648static int hdmi_output(struct exynos5_hwc_composer_device_1_t *dev, private_handle_t *h)
Benoit Gobycdd61b32012-07-09 12:09:59 -0700649{
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700650 exynos_gsc_img src_info;
651 exynos_gsc_img dst_info;
Benoit Gobycdd61b32012-07-09 12:09:59 -0700652
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700653 memset(&src_info, 0, sizeof(src_info));
654 memset(&dst_info, 0, sizeof(dst_info));
Benoit Gobycdd61b32012-07-09 12:09:59 -0700655
Benoit Goby8bad7e32012-08-16 14:17:14 -0700656 src_info.yaddr = h->fd;
657 if (exynos5_format_is_ycrcb(h->format)) {
658 src_info.uaddr = h->fd2;
659 src_info.vaddr = h->fd1;
660 } else {
661 src_info.uaddr = h->fd1;
662 src_info.vaddr = h->fd2;
663 }
Benoit Gobycdd61b32012-07-09 12:09:59 -0700664
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700665 int ret = exynos_gsc_run_exclusive(dev->hdmi_gsc, &src_info, &dst_info);
666 if (ret < 0) {
667 ALOGE("%s: exynos_gsc_run_exclusive failed %d", __func__, ret);
668 return ret;
669 }
Benoit Gobycdd61b32012-07-09 12:09:59 -0700670
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700671 return 0;
Benoit Gobycdd61b32012-07-09 12:09:59 -0700672}
673
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700674bool exynos5_supports_overlay(hwc_layer_1_t &layer, size_t i)
675{
Greg Hackmannd82ad202012-07-24 13:49:47 -0700676 if (layer.flags & HWC_SKIP_LAYER) {
677 ALOGV("\tlayer %u: skipping", i);
678 return false;
679 }
680
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700681 private_handle_t *handle = private_handle_t::dynamicCast(layer.handle);
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700682
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700683 if (!handle) {
684 ALOGV("\tlayer %u: handle is NULL", i);
685 return false;
686 }
Greg Hackmannf8c24e52012-08-14 15:50:51 -0700687 if (!exynos5_format_is_rgb(handle->format) &&
688 !exynos5_format_is_supported_by_gscaler(handle->format)) {
689 ALOGW("\tlayer %u: unexpected format %u", i, handle->format);
690 return false;
691 }
692
Greg Hackmann9e6b8ca2012-09-12 09:28:22 -0700693 if (exynos5_format_requires_gscaler(handle->format)) {
Greg Hackmann227ae8a2012-08-03 16:16:58 -0700694 if (!exynos5_supports_gscaler(layer, handle->format, false)) {
Greg Hackmann9130e702012-07-30 14:53:04 -0700695 ALOGV("\tlayer %u: gscaler required but not supported", i);
696 return false;
697 }
698 } else {
699 if (!exynos5_format_is_supported(handle->format)) {
700 ALOGV("\tlayer %u: pixel format %u not supported", i, handle->format);
701 return false;
702 }
Greg Hackmann9e6b8ca2012-09-12 09:28:22 -0700703 if (is_scaled(layer)) {
704 ALOGV("\tlayer %u: scaling not supported", i);
705 return false;
706 }
707 if (is_transformed(layer)) {
708 ALOGV("\tlayer %u: transformations not supported", i);
709 return false;
710 }
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700711 }
Greg Hackmann93cc5e72012-08-03 13:29:33 -0700712 if (!exynos5_blending_is_supported(layer.blending)) {
713 ALOGV("\tlayer %u: blending %d not supported", i, layer.blending);
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700714 return false;
715 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700716
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700717 return true;
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700718}
719
Greg Hackmann31991d52012-07-13 13:23:11 -0700720inline bool intersect(const hwc_rect &r1, const hwc_rect &r2)
721{
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700722 return !(r1.left > r2.right ||
723 r1.right < r2.left ||
724 r1.top > r2.bottom ||
725 r1.bottom < r2.top);
Greg Hackmann31991d52012-07-13 13:23:11 -0700726}
727
728inline hwc_rect intersection(const hwc_rect &r1, const hwc_rect &r2)
729{
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700730 hwc_rect i;
731 i.top = max(r1.top, r2.top);
732 i.bottom = min(r1.bottom, r2.bottom);
733 i.left = max(r1.left, r2.left);
734 i.right = min(r1.right, r2.right);
735 return i;
Greg Hackmann31991d52012-07-13 13:23:11 -0700736}
737
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -0700738static int exynos5_prepare_fimd(exynos5_hwc_composer_device_1_t *pdev,
739 hwc_display_contents_1_t* contents, bool force_fb)
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700740{
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -0700741 ALOGV("preparing %u layers for FIMD", contents->numHwLayers);
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700742
Greg Hackmann9130e702012-07-30 14:53:04 -0700743 memset(pdev->bufs.gsc_map, 0, sizeof(pdev->bufs.gsc_map));
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700744
Erik Gilling87e707e2012-06-29 17:35:13 -0700745 for (size_t i = 0; i < NUM_HW_WINDOWS; i++)
746 pdev->bufs.overlay_map[i] = -1;
747
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700748 bool fb_needed = false;
749 size_t first_fb = 0, last_fb = 0;
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700750
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700751 // find unsupported overlays
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -0700752 for (size_t i = 0; i < contents->numHwLayers; i++) {
753 hwc_layer_1_t &layer = contents->hwLayers[i];
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700754
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -0700755 if (layer.compositionType == HWC_FRAMEBUFFER_TARGET) {
756 ALOGV("\tlayer %u: framebuffer target", i);
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700757 continue;
758 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700759
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -0700760 if (layer.compositionType == HWC_BACKGROUND && !force_fb) {
761 ALOGV("\tlayer %u: background supported", i);
762 dump_layer(&contents->hwLayers[i]);
763 continue;
764 }
765
766 if (exynos5_supports_overlay(contents->hwLayers[i], i) && !force_fb) {
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700767 ALOGV("\tlayer %u: overlay supported", i);
768 layer.compositionType = HWC_OVERLAY;
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -0700769 dump_layer(&contents->hwLayers[i]);
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700770 continue;
771 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700772
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700773 if (!fb_needed) {
774 first_fb = i;
775 fb_needed = true;
776 }
777 last_fb = i;
778 layer.compositionType = HWC_FRAMEBUFFER;
Greg Hackmann9130e702012-07-30 14:53:04 -0700779
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -0700780 dump_layer(&contents->hwLayers[i]);
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700781 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700782
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700783 // can't composite overlays sandwiched between framebuffers
784 if (fb_needed)
785 for (size_t i = first_fb; i < last_fb; i++)
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -0700786 contents->hwLayers[i].compositionType = HWC_FRAMEBUFFER;
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700787
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700788 // Incrementally try to add our supported layers to hardware windows.
789 // If adding a layer would violate a hardware constraint, force it
790 // into the framebuffer and try again. (Revisiting the entire list is
791 // necessary because adding a layer to the framebuffer can cause other
792 // windows to retroactively violate constraints.)
793 bool changed;
794 do {
795 android::Vector<hwc_rect> rects;
796 android::Vector<hwc_rect> overlaps;
Greg Hackmann9130e702012-07-30 14:53:04 -0700797 size_t pixels_left, windows_left, gsc_left = NUM_GSC_UNITS;
Greg Hackmann31991d52012-07-13 13:23:11 -0700798
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700799 if (fb_needed) {
800 hwc_rect_t fb_rect;
801 fb_rect.top = fb_rect.left = 0;
Greg Hackmannd92fe212012-09-11 14:28:41 -0700802 fb_rect.right = pdev->xres - 1;
803 fb_rect.bottom = pdev->yres - 1;
804 pixels_left = MAX_PIXELS - pdev->xres * pdev->yres;
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700805 windows_left = NUM_HW_WINDOWS - 1;
806 rects.push_back(fb_rect);
807 }
808 else {
809 pixels_left = MAX_PIXELS;
810 windows_left = NUM_HW_WINDOWS;
811 }
Benoit Goby8bad7e32012-08-16 14:17:14 -0700812 if (pdev->hdmi_enabled)
Greg Hackmann9130e702012-07-30 14:53:04 -0700813 gsc_left--;
814
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700815 changed = false;
Greg Hackmann31991d52012-07-13 13:23:11 -0700816
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -0700817 for (size_t i = 0; i < contents->numHwLayers; i++) {
818 hwc_layer_1_t &layer = contents->hwLayers[i];
819 if ((layer.flags & HWC_SKIP_LAYER) ||
820 layer.compositionType == HWC_FRAMEBUFFER_TARGET)
Greg Hackmann9130e702012-07-30 14:53:04 -0700821 continue;
822
823 private_handle_t *handle = private_handle_t::dynamicCast(
824 layer.handle);
Greg Hackmann31991d52012-07-13 13:23:11 -0700825
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700826 // we've already accounted for the framebuffer above
827 if (layer.compositionType == HWC_FRAMEBUFFER)
828 continue;
Greg Hackmann31991d52012-07-13 13:23:11 -0700829
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700830 // only layer 0 can be HWC_BACKGROUND, so we can
831 // unconditionally allow it without extra checks
832 if (layer.compositionType == HWC_BACKGROUND) {
833 windows_left--;
834 continue;
835 }
Greg Hackmann31991d52012-07-13 13:23:11 -0700836
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700837 size_t pixels_needed = WIDTH(layer.displayFrame) *
838 HEIGHT(layer.displayFrame);
839 bool can_compose = windows_left && pixels_needed <= pixels_left;
Greg Hackmann9e6b8ca2012-09-12 09:28:22 -0700840 bool gsc_required = exynos5_format_requires_gscaler(handle->format);
Greg Hackmann9130e702012-07-30 14:53:04 -0700841 if (gsc_required)
842 can_compose = can_compose && gsc_left;
Greg Hackmann31991d52012-07-13 13:23:11 -0700843
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700844 // hwc_rect_t right and bottom values are normally exclusive;
845 // the intersection logic is simpler if we make them inclusive
846 hwc_rect_t visible_rect = layer.displayFrame;
847 visible_rect.right--; visible_rect.bottom--;
Greg Hackmann31991d52012-07-13 13:23:11 -0700848
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700849 // no more than 2 layers can overlap on a given pixel
850 for (size_t j = 0; can_compose && j < overlaps.size(); j++) {
851 if (intersect(visible_rect, overlaps.itemAt(j)))
852 can_compose = false;
853 }
Greg Hackmann31991d52012-07-13 13:23:11 -0700854
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700855 if (!can_compose) {
856 layer.compositionType = HWC_FRAMEBUFFER;
857 if (!fb_needed) {
858 first_fb = last_fb = i;
859 fb_needed = true;
860 }
861 else {
862 first_fb = min(i, first_fb);
863 last_fb = max(i, last_fb);
864 }
865 changed = true;
866 break;
867 }
Greg Hackmann31991d52012-07-13 13:23:11 -0700868
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700869 for (size_t j = 0; j < rects.size(); j++) {
870 const hwc_rect_t &other_rect = rects.itemAt(j);
871 if (intersect(visible_rect, other_rect))
872 overlaps.push_back(intersection(visible_rect, other_rect));
873 }
874 rects.push_back(visible_rect);
875 pixels_left -= pixels_needed;
876 windows_left--;
Greg Hackmann9130e702012-07-30 14:53:04 -0700877 if (gsc_required)
878 gsc_left--;
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700879 }
Greg Hackmann31991d52012-07-13 13:23:11 -0700880
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700881 if (changed)
882 for (size_t i = first_fb; i < last_fb; i++)
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -0700883 contents->hwLayers[i].compositionType = HWC_FRAMEBUFFER;
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700884 } while(changed);
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700885
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700886 unsigned int nextWindow = 0;
Greg Hackmann9130e702012-07-30 14:53:04 -0700887 int nextGsc = 0;
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700888
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -0700889 for (size_t i = 0; i < contents->numHwLayers; i++) {
890 hwc_layer_1_t &layer = contents->hwLayers[i];
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700891
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700892 if (fb_needed && i == first_fb) {
893 ALOGV("assigning framebuffer to window %u\n",
894 nextWindow);
895 nextWindow++;
896 continue;
897 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700898
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -0700899 if (layer.compositionType != HWC_FRAMEBUFFER &&
900 layer.compositionType != HWC_FRAMEBUFFER_TARGET) {
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700901 ALOGV("assigning layer %u to window %u", i, nextWindow);
902 pdev->bufs.overlay_map[nextWindow] = i;
Greg Hackmann9130e702012-07-30 14:53:04 -0700903 if (layer.compositionType == HWC_OVERLAY) {
904 private_handle_t *handle =
905 private_handle_t::dynamicCast(layer.handle);
Greg Hackmann9e6b8ca2012-09-12 09:28:22 -0700906 if (exynos5_format_requires_gscaler(handle->format)) {
Greg Hackmann2ddbc742012-08-17 15:41:29 -0700907 ALOGV("\tusing gscaler %u", AVAILABLE_GSC_UNITS[nextGsc]);
Greg Hackmann3088b972012-09-12 15:07:23 -0700908 pdev->bufs.gsc_map[nextWindow].mode =
Greg Hackmann9130e702012-07-30 14:53:04 -0700909 exynos5_gsc_map_t::GSC_M2M;
Greg Hackmann3088b972012-09-12 15:07:23 -0700910 pdev->bufs.gsc_map[nextWindow].idx = nextGsc++;
Greg Hackmann9130e702012-07-30 14:53:04 -0700911 }
912 }
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700913 nextWindow++;
914 }
915 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700916
Greg Hackmann9130e702012-07-30 14:53:04 -0700917 for (size_t i = nextGsc; i < NUM_GSC_UNITS; i++) {
918 for (size_t j = 0; j < NUM_GSC_DST_BUFS; j++)
919 if (pdev->gsc[i].dst_buf[j])
920 pdev->alloc_device->free(pdev->alloc_device,
921 pdev->gsc[i].dst_buf[j]);
922 memset(&pdev->gsc[i], 0, sizeof(pdev->gsc[i]));
923 }
924
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700925 if (fb_needed)
926 pdev->bufs.fb_window = first_fb;
927 else
928 pdev->bufs.fb_window = NO_FB_NEEDED;
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700929
Greg Hackmann9130e702012-07-30 14:53:04 -0700930 return 0;
931}
932
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -0700933static int exynos5_prepare_hdmi(exynos5_hwc_composer_device_1_t *pdev,
934 hwc_display_contents_1_t* contents)
935{
936 ALOGE("exynos5_prepare_hdmi() not implemented");
937 return -EINVAL;
938}
939
940static int exynos5_prepare(hwc_composer_device_1_t *dev,
941 size_t numDisplays, hwc_display_contents_1_t** displays)
942{
943 if (!numDisplays || !displays)
944 return 0;
945
946 exynos5_hwc_composer_device_1_t *pdev =
947 (exynos5_hwc_composer_device_1_t *)dev;
948 hwc_display_contents_1_t *fimd_contents = displays[HWC_DISPLAY_PRIMARY];
949 hwc_display_contents_1_t *hdmi_contents = displays[HWC_DISPLAY_EXTERNAL];
950
951 if (pdev->hdmi_hpd) {
952 hdmi_enable(pdev);
953 } else {
954 hdmi_disable(pdev);
955 }
956
957 if (fimd_contents) {
958 bool force_fb = pdev->hdmi_enabled && !hdmi_contents;
959 int err = exynos5_prepare_fimd(pdev, fimd_contents, force_fb);
960 if (err)
961 return err;
962 }
963
964 if (hdmi_contents) {
965 if (!pdev->hdmi_enabled) {
966 ALOGE("HDMI disabled; can't prepare contents of external display");
967 return -EINVAL;
968 }
969 int err = exynos5_prepare_hdmi(pdev, hdmi_contents);
970 if (err)
971 return err;
972 }
973
974 return 0;
975}
976
Greg Hackmann9130e702012-07-30 14:53:04 -0700977static int exynos5_config_gsc_m2m(hwc_layer_1_t &layer,
978 alloc_device_t* alloc_device, exynos5_gsc_data_t *gsc_data,
979 int gsc_idx)
980{
981 ALOGV("configuring gscaler %u for memory-to-memory", gsc_idx);
982
983 private_handle_t *src_handle = private_handle_t::dynamicCast(layer.handle);
984 buffer_handle_t dst_buf;
985 private_handle_t *dst_handle;
986 int ret = 0;
987
988 exynos_gsc_img src_cfg, dst_cfg;
989 memset(&src_cfg, 0, sizeof(src_cfg));
990 memset(&dst_cfg, 0, sizeof(dst_cfg));
991
992 src_cfg.x = layer.sourceCrop.left;
993 src_cfg.y = layer.sourceCrop.top;
994 src_cfg.w = WIDTH(layer.sourceCrop);
995 src_cfg.fw = src_handle->stride;
996 src_cfg.h = HEIGHT(layer.sourceCrop);
Greg Hackmanneba34a92012-08-14 16:10:05 -0700997 src_cfg.fh = src_handle->vstride;
Greg Hackmann9130e702012-07-30 14:53:04 -0700998 src_cfg.yaddr = src_handle->fd;
Greg Hackmann296668e2012-08-14 15:51:40 -0700999 if (exynos5_format_is_ycrcb(src_handle->format)) {
1000 src_cfg.uaddr = src_handle->fd2;
1001 src_cfg.vaddr = src_handle->fd1;
1002 } else {
1003 src_cfg.uaddr = src_handle->fd1;
1004 src_cfg.vaddr = src_handle->fd2;
1005 }
Greg Hackmann9130e702012-07-30 14:53:04 -07001006 src_cfg.format = src_handle->format;
Sanghee Kim7bd58622012-08-08 23:31:10 -07001007 src_cfg.drmMode = !!(src_handle->flags & GRALLOC_USAGE_PROTECTED);
Greg Hackmann9130e702012-07-30 14:53:04 -07001008
1009 dst_cfg.x = 0;
1010 dst_cfg.y = 0;
1011 dst_cfg.w = WIDTH(layer.displayFrame);
1012 dst_cfg.h = HEIGHT(layer.displayFrame);
Greg Hackmanna00c0432012-07-31 15:20:00 -07001013 dst_cfg.format = HAL_PIXEL_FORMAT_BGRA_8888;
Greg Hackmann9130e702012-07-30 14:53:04 -07001014 dst_cfg.rot = layer.transform;
Sanghee Kim6c195c52012-08-30 22:59:43 -07001015 dst_cfg.drmMode = src_cfg.drmMode;
Greg Hackmann9130e702012-07-30 14:53:04 -07001016
1017 ALOGV("source configuration:");
1018 dump_gsc_img(src_cfg);
1019
1020 if (gsc_src_cfg_changed(src_cfg, gsc_data->src_cfg) ||
1021 gsc_dst_cfg_changed(dst_cfg, gsc_data->dst_cfg)) {
1022 int dst_stride;
1023 int usage = GRALLOC_USAGE_SW_READ_NEVER |
1024 GRALLOC_USAGE_SW_WRITE_NEVER |
1025 GRALLOC_USAGE_HW_COMPOSER;
Sanghee Kim7bd58622012-08-08 23:31:10 -07001026
1027 if (src_handle->flags & GRALLOC_USAGE_PROTECTED)
1028 usage |= GRALLOC_USAGE_PROTECTED;
Greg Hackmann9130e702012-07-30 14:53:04 -07001029
1030 int w = ALIGN(WIDTH(layer.displayFrame), GSC_W_ALIGNMENT);
1031 int h = ALIGN(HEIGHT(layer.displayFrame), GSC_H_ALIGNMENT);
1032
1033 for (size_t i = 0; i < NUM_GSC_DST_BUFS; i++) {
1034 if (gsc_data->dst_buf[i]) {
1035 alloc_device->free(alloc_device, gsc_data->dst_buf[i]);
1036 gsc_data->dst_buf[i] = NULL;
1037 }
1038
1039 int ret = alloc_device->alloc(alloc_device, w, h,
1040 HAL_PIXEL_FORMAT_RGBX_8888, usage, &gsc_data->dst_buf[i],
1041 &dst_stride);
1042 if (ret < 0) {
1043 ALOGE("failed to allocate destination buffer: %s",
1044 strerror(-ret));
1045 goto err_alloc;
1046 }
1047 }
1048
1049 gsc_data->current_buf = 0;
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001050 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001051
Greg Hackmann9130e702012-07-30 14:53:04 -07001052 dst_buf = gsc_data->dst_buf[gsc_data->current_buf];
1053 dst_handle = private_handle_t::dynamicCast(dst_buf);
1054
1055 dst_cfg.fw = dst_handle->stride;
Greg Hackmanneba34a92012-08-14 16:10:05 -07001056 dst_cfg.fh = dst_handle->vstride;
Greg Hackmann9130e702012-07-30 14:53:04 -07001057 dst_cfg.yaddr = dst_handle->fd;
1058
1059 ALOGV("destination configuration:");
1060 dump_gsc_img(dst_cfg);
1061
Greg Hackmann2ddbc742012-08-17 15:41:29 -07001062 gsc_data->gsc = exynos_gsc_create_exclusive(AVAILABLE_GSC_UNITS[gsc_idx],
1063 GSC_M2M_MODE, GSC_DUMMY);
Greg Hackmann9130e702012-07-30 14:53:04 -07001064 if (!gsc_data->gsc) {
1065 ALOGE("failed to create gscaler handle");
1066 ret = -1;
1067 goto err_alloc;
1068 }
1069
1070 ret = exynos_gsc_config_exclusive(gsc_data->gsc, &src_cfg, &dst_cfg);
1071 if (ret < 0) {
1072 ALOGE("failed to configure gscaler %u", gsc_idx);
1073 goto err_gsc_config;
1074 }
1075
1076 ret = exynos_gsc_run_exclusive(gsc_data->gsc, &src_cfg, &dst_cfg);
1077 if (ret < 0) {
1078 ALOGE("failed to run gscaler %u", gsc_idx);
1079 goto err_gsc_config;
1080 }
1081
1082 gsc_data->src_cfg = src_cfg;
1083 gsc_data->dst_cfg = dst_cfg;
1084
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001085 return 0;
Greg Hackmann9130e702012-07-30 14:53:04 -07001086
1087err_gsc_config:
1088 exynos_gsc_destroy(gsc_data->gsc);
1089 gsc_data->gsc = NULL;
1090err_alloc:
1091 for (size_t i = 0; i < NUM_GSC_DST_BUFS; i++) {
1092 if (gsc_data->dst_buf[i]) {
1093 alloc_device->free(alloc_device, gsc_data->dst_buf[i]);
1094 gsc_data->dst_buf[i] = NULL;
1095 }
1096 }
Greg Hackmann7dddd2a2012-09-12 15:11:07 -07001097 memset(&gsc_data->src_cfg, 0, sizeof(gsc_data->src_cfg));
1098 memset(&gsc_data->dst_cfg, 0, sizeof(gsc_data->dst_cfg));
Greg Hackmann9130e702012-07-30 14:53:04 -07001099 return ret;
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001100}
1101
1102static void exynos5_config_handle(private_handle_t *handle,
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001103 hwc_rect_t &sourceCrop, hwc_rect_t &displayFrame,
Greg Hackmann93cc5e72012-08-03 13:29:33 -07001104 int32_t blending, s3c_fb_win_config &cfg)
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001105{
1106 cfg.state = cfg.S3C_FB_WIN_STATE_BUFFER;
1107 cfg.fd = handle->fd;
1108 cfg.x = displayFrame.left;
1109 cfg.y = displayFrame.top;
1110 cfg.w = WIDTH(displayFrame);
1111 cfg.h = HEIGHT(displayFrame);
1112 cfg.format = exynos5_format_to_s3c_format(handle->format);
1113 uint8_t bpp = exynos5_format_to_bpp(handle->format);
1114 cfg.offset = (sourceCrop.top * handle->stride + sourceCrop.left) * bpp / 8;
1115 cfg.stride = handle->stride * bpp / 8;
Greg Hackmann93cc5e72012-08-03 13:29:33 -07001116 cfg.blending = exynos5_blending_to_s3c_blending(blending);
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001117}
1118
Erik Gilling87e707e2012-06-29 17:35:13 -07001119static void exynos5_config_overlay(hwc_layer_1_t *layer, s3c_fb_win_config &cfg,
Greg Hackmannd92fe212012-09-11 14:28:41 -07001120 exynos5_hwc_composer_device_1_t *pdev)
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001121{
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001122 if (layer->compositionType == HWC_BACKGROUND) {
1123 hwc_color_t color = layer->backgroundColor;
1124 cfg.state = cfg.S3C_FB_WIN_STATE_COLOR;
1125 cfg.color = (color.r << 16) | (color.g << 8) | color.b;
1126 cfg.x = 0;
1127 cfg.y = 0;
Greg Hackmannd92fe212012-09-11 14:28:41 -07001128 cfg.w = pdev->xres;
1129 cfg.h = pdev->yres;
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001130 return;
1131 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001132
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001133 private_handle_t *handle = private_handle_t::dynamicCast(layer->handle);
Greg Hackmann93cc5e72012-08-03 13:29:33 -07001134 exynos5_config_handle(handle, layer->sourceCrop, layer->displayFrame,
1135 layer->blending, cfg);
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001136}
1137
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -07001138static int exynos5_post_fimd(exynos5_hwc_composer_device_1_t *pdev,
1139 hwc_display_contents_1_t* contents, hwc_layer_1_t *fb_layer,
1140 bool hdmi_mirroring)
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001141{
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -07001142 exynos5_hwc_post_data_t *pdata = &pdev->bufs;
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001143 struct s3c_fb_win_config_data win_data;
1144 struct s3c_fb_win_config *config = win_data.config;
1145 memset(config, 0, sizeof(win_data.config));
Greg Hackmann9130e702012-07-30 14:53:04 -07001146
1147 for (size_t i = 0; i < NUM_HW_WINDOWS; i++) {
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -07001148 int layer_idx = pdata->overlay_map[i];
1149 if (layer_idx != -1) {
1150 hwc_layer_1_t &layer = contents->hwLayers[layer_idx];
Greg Hackmann9130e702012-07-30 14:53:04 -07001151
1152 if (layer.acquireFenceFd != -1) {
1153 int err = sync_wait(layer.acquireFenceFd, 100);
1154 if (err != 0)
1155 ALOGW("fence for layer %zu didn't signal in 100 ms: %s",
1156 i, strerror(errno));
1157 close(layer.acquireFenceFd);
1158 }
1159
1160 if (pdata->gsc_map[i].mode == exynos5_gsc_map_t::GSC_M2M) {
1161 int gsc_idx = pdata->gsc_map[i].idx;
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -07001162 exynos5_config_gsc_m2m(layer, pdev->alloc_device,
1163 &pdev->gsc[gsc_idx], gsc_idx);
Greg Hackmann9130e702012-07-30 14:53:04 -07001164 }
1165 }
1166 }
1167
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001168 for (size_t i = 0; i < NUM_HW_WINDOWS; i++) {
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -07001169 int layer_idx = pdata->overlay_map[i];
1170 if (layer_idx != -1) {
1171 hwc_layer_1_t &layer = contents->hwLayers[layer_idx];
Greg Hackmann9130e702012-07-30 14:53:04 -07001172 private_handle_t *handle =
1173 private_handle_t::dynamicCast(layer.handle);
1174
1175 if (pdata->gsc_map[i].mode == exynos5_gsc_map_t::GSC_M2M) {
1176 int gsc_idx = pdata->gsc_map[i].idx;
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -07001177 exynos5_gsc_data_t &gsc = pdev->gsc[gsc_idx];
Greg Hackmann9130e702012-07-30 14:53:04 -07001178
1179 if (!gsc.gsc) {
1180 ALOGE("failed to queue gscaler %u input for layer %u",
1181 gsc_idx, i);
1182 continue;
1183 }
1184
1185 int err = exynos_gsc_stop_exclusive(gsc.gsc);
1186 exynos_gsc_destroy(gsc.gsc);
1187 gsc.gsc = NULL;
1188 if (err < 0) {
1189 ALOGE("failed to dequeue gscaler output for layer %u", i);
1190 continue;
1191 }
1192
1193 buffer_handle_t dst_buf = gsc.dst_buf[gsc.current_buf];
1194 gsc.current_buf = (gsc.current_buf + 1) % NUM_GSC_DST_BUFS;
1195 private_handle_t *dst_handle =
1196 private_handle_t::dynamicCast(dst_buf);
Greg Hackmann90219f32012-08-16 17:28:57 -07001197 hwc_rect_t sourceCrop = { 0, 0,
1198 WIDTH(layer.displayFrame), HEIGHT(layer.displayFrame) };
1199 exynos5_config_handle(dst_handle, sourceCrop,
Greg Hackmann93cc5e72012-08-03 13:29:33 -07001200 layer.displayFrame, layer.blending, config[i]);
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -07001201 } else {
1202 exynos5_config_overlay(&layer, config[i], pdev);
Erik Gilling87e707e2012-06-29 17:35:13 -07001203 }
1204 }
Greg Hackmann93cc5e72012-08-03 13:29:33 -07001205 if (i == 0 && config[i].blending != S3C_FB_BLENDING_NONE) {
1206 ALOGV("blending not supported on window 0; forcing BLENDING_NONE");
1207 config[i].blending = S3C_FB_BLENDING_NONE;
1208 }
1209
Greg Hackmann9130e702012-07-30 14:53:04 -07001210 ALOGV("window %u configuration:", i);
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001211 dump_config(config[i]);
1212 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001213
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -07001214 int ret = ioctl(pdev->fd, S3CFB_WIN_CONFIG, &win_data);
1215 if (ret < 0) {
1216 ALOGE("ioctl S3CFB_WIN_CONFIG failed: %s", strerror(errno));
1217 return ret;
1218 }
1219
1220 memcpy(pdev->last_config, &win_data.config, sizeof(win_data.config));
1221 memcpy(pdev->last_gsc_map, pdata->gsc_map, sizeof(pdata->gsc_map));
1222 pdev->last_fb_window = pdata->fb_window;
1223 for (size_t i = 0; i < NUM_HW_WINDOWS; i++) {
1224 int layer_idx = pdata->overlay_map[i];
1225 if (layer_idx != -1) {
1226 hwc_layer_1_t &layer = contents->hwLayers[layer_idx];
1227 pdev->last_handles[i] = layer.handle;
1228 }
1229 }
1230
1231 if (hdmi_mirroring) {
1232 private_handle_t *fb = private_handle_t::dynamicCast(fb_layer->handle);
1233 hdmi_configure_handle(pdev, fb);
1234 hdmi_output(pdev, fb);
1235 }
1236
1237 return win_data.fence;
1238}
1239
1240static int exynos5_set_fimd(exynos5_hwc_composer_device_1_t *pdev,
1241 hwc_display_contents_1_t* contents, bool hdmi_mirroring)
1242{
1243 if (!contents->dpy || !contents->sur)
1244 return 0;
1245
1246 hwc_layer_1_t *fb_layer = NULL;
1247
1248 if (pdev->bufs.fb_window != NO_FB_NEEDED) {
1249 for (size_t i = 0; i < contents->numHwLayers; i++) {
1250 if (contents->hwLayers[i].compositionType ==
1251 HWC_FRAMEBUFFER_TARGET) {
1252 pdev->bufs.overlay_map[pdev->bufs.fb_window] = i;
1253 fb_layer = &contents->hwLayers[i];
1254 break;
Greg Hackmann600867e2012-08-23 12:58:02 -07001255 }
1256 }
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -07001257
1258 if (CC_UNLIKELY(!fb_layer)) {
1259 ALOGE("framebuffer target expected, but not provided");
1260 return -EINVAL;
1261 }
1262
1263 ALOGV("framebuffer target buffer:");
1264 dump_layer(fb_layer);
Greg Hackmann600867e2012-08-23 12:58:02 -07001265 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001266
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -07001267 int fence = exynos5_post_fimd(pdev, contents, fb_layer, hdmi_mirroring);
1268 if (fence < 0)
1269 return fence;
1270
1271 for (size_t i = 0; i < NUM_HW_WINDOWS; i++) {
1272 if (pdev->bufs.overlay_map[i] != -1) {
1273 hwc_layer_1_t &layer =
1274 contents->hwLayers[pdev->bufs.overlay_map[i]];
1275 int dup_fd = dup(fence);
1276 if (dup_fd < 0)
1277 ALOGW("release fence dup failed: %s", strerror(errno));
1278 layer.releaseFenceFd = dup_fd;
Benoit Goby8bad7e32012-08-16 14:17:14 -07001279 }
1280 }
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -07001281 close(fence);
Benoit Gobycdd61b32012-07-09 12:09:59 -07001282
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -07001283 return 0;
1284}
1285
1286static int exynos5_set_hdmi(exynos5_hwc_composer_device_1_t *pdev,
1287 hwc_display_contents_1_t* contents)
1288{
1289 ALOGE("exynos5_set_hdmi() not implemented");
1290 return -EINVAL;
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001291}
1292
Jesse Halle94046d2012-07-31 14:34:08 -07001293static int exynos5_set(struct hwc_composer_device_1 *dev,
1294 size_t numDisplays, hwc_display_contents_1_t** displays)
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001295{
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -07001296 if (!numDisplays || !displays)
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001297 return 0;
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001298
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -07001299 exynos5_hwc_composer_device_1_t *pdev =
1300 (exynos5_hwc_composer_device_1_t *)dev;
1301 hwc_display_contents_1_t *fimd_contents = displays[HWC_DISPLAY_PRIMARY];
1302 hwc_display_contents_1_t *hdmi_contents = displays[HWC_DISPLAY_EXTERNAL];
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001303
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -07001304 if (fimd_contents) {
1305 bool hdmi_mirroring = pdev->hdmi_enabled && !hdmi_contents;
1306 int err = exynos5_set_fimd(pdev, fimd_contents, hdmi_mirroring);
1307 if (err)
1308 return err;
Greg Hackmann0fbe1702012-08-22 11:27:38 -07001309 }
Erik Gilling87e707e2012-06-29 17:35:13 -07001310
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -07001311 if (hdmi_contents) {
1312 if (!pdev->hdmi_enabled) {
1313 ALOGE("HDMI disabled; can't set contents of external display");
1314 return -EINVAL;
Erik Gilling87e707e2012-06-29 17:35:13 -07001315 }
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -07001316 int err = exynos5_set_hdmi(pdev, hdmi_contents);
1317 if (err)
1318 return err;
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001319 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001320
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001321 return 0;
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001322}
1323
Erik Gilling87e707e2012-06-29 17:35:13 -07001324static void exynos5_registerProcs(struct hwc_composer_device_1* dev,
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001325 hwc_procs_t const* procs)
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001326{
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001327 struct exynos5_hwc_composer_device_1_t* pdev =
1328 (struct exynos5_hwc_composer_device_1_t*)dev;
Jesse Hallda5a71d2012-08-21 12:12:55 -07001329 pdev->procs = procs;
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001330}
1331
Erik Gilling87e707e2012-06-29 17:35:13 -07001332static int exynos5_query(struct hwc_composer_device_1* dev, int what, int *value)
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001333{
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001334 struct exynos5_hwc_composer_device_1_t *pdev =
1335 (struct exynos5_hwc_composer_device_1_t *)dev;
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001336
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001337 switch (what) {
1338 case HWC_BACKGROUND_LAYER_SUPPORTED:
1339 // we support the background layer
1340 value[0] = 1;
1341 break;
1342 case HWC_VSYNC_PERIOD:
1343 // vsync period in nanosecond
Greg Hackmannd92fe212012-09-11 14:28:41 -07001344 value[0] = pdev->vsync_period;
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001345 break;
1346 default:
1347 // unsupported query
1348 return -EINVAL;
1349 }
1350 return 0;
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001351}
1352
Jesse Halle94046d2012-07-31 14:34:08 -07001353static int exynos5_eventControl(struct hwc_composer_device_1 *dev, int dpy,
1354 int event, int enabled)
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001355{
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001356 struct exynos5_hwc_composer_device_1_t *pdev =
1357 (struct exynos5_hwc_composer_device_1_t *)dev;
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001358
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001359 switch (event) {
1360 case HWC_EVENT_VSYNC:
1361 __u32 val = !!enabled;
1362 int err = ioctl(pdev->fd, S3CFB_SET_VSYNC_INT, &val);
1363 if (err < 0) {
1364 ALOGE("vsync ioctl failed");
1365 return -errno;
1366 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001367
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001368 return 0;
1369 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001370
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001371 return -EINVAL;
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001372}
1373
Benoit Gobycdd61b32012-07-09 12:09:59 -07001374static void handle_hdmi_uevent(struct exynos5_hwc_composer_device_1_t *pdev,
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001375 const char *buff, int len)
Benoit Gobycdd61b32012-07-09 12:09:59 -07001376{
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001377 const char *s = buff;
1378 s += strlen(s) + 1;
Benoit Gobycdd61b32012-07-09 12:09:59 -07001379
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001380 while (*s) {
1381 if (!strncmp(s, "SWITCH_STATE=", strlen("SWITCH_STATE=")))
1382 pdev->hdmi_hpd = atoi(s + strlen("SWITCH_STATE=")) == 1;
Benoit Gobycdd61b32012-07-09 12:09:59 -07001383
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001384 s += strlen(s) + 1;
1385 if (s - buff >= len)
1386 break;
1387 }
Benoit Gobycdd61b32012-07-09 12:09:59 -07001388
Benoit Gobyd6bb7ce2012-08-09 16:11:22 -07001389 if (pdev->hdmi_hpd) {
1390 if (hdmi_get_config(pdev)) {
1391 ALOGE("Error reading HDMI configuration");
1392 pdev->hdmi_hpd = false;
1393 return;
1394 }
1395 }
1396
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001397 ALOGV("HDMI HPD changed to %s", pdev->hdmi_hpd ? "enabled" : "disabled");
Benoit Gobyd6bb7ce2012-08-09 16:11:22 -07001398 if (pdev->hdmi_hpd)
Benoit Goby8bad7e32012-08-16 14:17:14 -07001399 ALOGI("HDMI Resolution changed to %dx%d", pdev->hdmi_h, pdev->hdmi_w);
Benoit Gobycdd61b32012-07-09 12:09:59 -07001400
Jesse Hallda5a71d2012-08-21 12:12:55 -07001401 /* hwc_dev->procs is set right after the device is opened, but there is
1402 * still a race condition where a hotplug event might occur after the open
1403 * but before the procs are registered. */
1404 if (pdev->procs)
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001405 pdev->procs->invalidate(pdev->procs);
Benoit Gobycdd61b32012-07-09 12:09:59 -07001406}
1407
Greg Hackmann29724852012-07-23 15:31:10 -07001408static void handle_vsync_event(struct exynos5_hwc_composer_device_1_t *pdev)
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001409{
Jesse Hallda5a71d2012-08-21 12:12:55 -07001410 if (!pdev->procs)
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001411 return;
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001412
Greg Hackmannfbeb8532012-07-26 14:21:16 -07001413 int err = lseek(pdev->vsync_fd, 0, SEEK_SET);
1414 if (err < 0) {
1415 ALOGE("error seeking to vsync timestamp: %s", strerror(errno));
1416 return;
1417 }
1418
Greg Hackmann29724852012-07-23 15:31:10 -07001419 char buf[4096];
Greg Hackmannfbeb8532012-07-26 14:21:16 -07001420 err = read(pdev->vsync_fd, buf, sizeof(buf));
Greg Hackmann29724852012-07-23 15:31:10 -07001421 if (err < 0) {
1422 ALOGE("error reading vsync timestamp: %s", strerror(errno));
1423 return;
Greg Hackmann3464b1d2012-07-24 09:46:23 -07001424 }
Greg Hackmann29724852012-07-23 15:31:10 -07001425 buf[sizeof(buf) - 1] = '\0';
Greg Hackmann3464b1d2012-07-24 09:46:23 -07001426
Greg Hackmann29724852012-07-23 15:31:10 -07001427 errno = 0;
1428 uint64_t timestamp = strtoull(buf, NULL, 0);
1429 if (!errno)
1430 pdev->procs->vsync(pdev->procs, 0, timestamp);
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001431}
1432
1433static void *hwc_vsync_thread(void *data)
1434{
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001435 struct exynos5_hwc_composer_device_1_t *pdev =
1436 (struct exynos5_hwc_composer_device_1_t *)data;
1437 char uevent_desc[4096];
1438 memset(uevent_desc, 0, sizeof(uevent_desc));
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001439
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001440 setpriority(PRIO_PROCESS, 0, HAL_PRIORITY_URGENT_DISPLAY);
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001441
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001442 uevent_init();
Greg Hackmann29724852012-07-23 15:31:10 -07001443
Greg Hackmannfbeb8532012-07-26 14:21:16 -07001444 char temp[4096];
1445 int err = read(pdev->vsync_fd, temp, sizeof(temp));
1446 if (err < 0) {
1447 ALOGE("error reading vsync timestamp: %s", strerror(errno));
1448 return NULL;
1449 }
1450
Greg Hackmann29724852012-07-23 15:31:10 -07001451 struct pollfd fds[2];
1452 fds[0].fd = pdev->vsync_fd;
1453 fds[0].events = POLLPRI;
1454 fds[1].fd = uevent_get_fd();
1455 fds[1].events = POLLIN;
1456
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001457 while (true) {
Greg Hackmann29724852012-07-23 15:31:10 -07001458 int err = poll(fds, 2, -1);
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001459
Greg Hackmann29724852012-07-23 15:31:10 -07001460 if (err > 0) {
1461 if (fds[0].revents & POLLPRI) {
1462 handle_vsync_event(pdev);
1463 }
1464 else if (fds[1].revents & POLLIN) {
1465 int len = uevent_next_event(uevent_desc,
1466 sizeof(uevent_desc) - 2);
Benoit Gobycdd61b32012-07-09 12:09:59 -07001467
Greg Hackmann29724852012-07-23 15:31:10 -07001468 bool hdmi = !strcmp(uevent_desc,
1469 "change@/devices/virtual/switch/hdmi");
1470 if (hdmi)
1471 handle_hdmi_uevent(pdev, uevent_desc, len);
1472 }
1473 }
1474 else if (err == -1) {
1475 if (errno == EINTR)
1476 break;
1477 ALOGE("error in vsync thread: %s", strerror(errno));
1478 }
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001479 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001480
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001481 return NULL;
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001482}
1483
Jesse Halle94046d2012-07-31 14:34:08 -07001484static int exynos5_blank(struct hwc_composer_device_1 *dev, int dpy, int blank)
Colin Cross00359a82012-07-12 17:54:17 -07001485{
1486 struct exynos5_hwc_composer_device_1_t *pdev =
1487 (struct exynos5_hwc_composer_device_1_t *)dev;
1488
1489 int fb_blank = blank ? FB_BLANK_POWERDOWN : FB_BLANK_UNBLANK;
1490 int err = ioctl(pdev->fd, FBIOBLANK, fb_blank);
1491 if (err < 0) {
1492 ALOGE("%sblank ioctl failed", blank ? "" : "un");
1493 return -errno;
1494 }
1495
Benoit Gobyad4e3582012-08-30 17:17:34 -07001496 if (pdev->hdmi_hpd) {
1497 if (blank && !pdev->hdmi_blanked)
1498 hdmi_disable(pdev);
1499 pdev->hdmi_blanked = !!blank;
1500 }
1501
Colin Cross00359a82012-07-12 17:54:17 -07001502 return 0;
1503}
1504
Greg Hackmann600867e2012-08-23 12:58:02 -07001505static void exynos5_dump(hwc_composer_device_1* dev, char *buff, int buff_len)
1506{
1507 if (buff_len <= 0)
1508 return;
1509
1510 struct exynos5_hwc_composer_device_1_t *pdev =
1511 (struct exynos5_hwc_composer_device_1_t *)dev;
1512
1513 android::String8 result;
1514
Benoit Goby8bad7e32012-08-16 14:17:14 -07001515 result.appendFormat(" hdmi_enabled=%u\n", pdev->hdmi_enabled);
1516 if (pdev->hdmi_enabled)
1517 result.appendFormat(" w=%u, h=%u\n", pdev->hdmi_w, pdev->hdmi_h);
Greg Hackmann600867e2012-08-23 12:58:02 -07001518 result.append(
1519 " type | handle | color | blend | format | position | size | gsc \n"
1520 "----------+----------|----------+-------+--------+---------------+---------------------\n");
1521 // 8_______ | 8_______ | 8_______ | 5____ | 6_____ | [5____,5____] | [5____,5____] | 3__ \n"
1522
1523 for (size_t i = 0; i < NUM_HW_WINDOWS; i++) {
1524 struct s3c_fb_win_config &config = pdev->last_config[i];
1525 if (config.state == config.S3C_FB_WIN_STATE_DISABLED) {
1526 result.appendFormat(" %8s | %8s | %8s | %5s | %6s | %13s | %13s",
1527 "DISABLED", "-", "-", "-", "-", "-", "-");
1528 }
1529 else {
1530 if (config.state == config.S3C_FB_WIN_STATE_COLOR)
1531 result.appendFormat(" %8s | %8s | %8x | %5s | %6s", "COLOR",
1532 "-", config.color, "-", "-");
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -07001533 else
1534 result.appendFormat(" %8s | %8x | %8s | %5x | %6x",
1535 pdev->last_fb_window == i ? "FB" : "OVERLAY",
1536 intptr_t(pdev->last_handles[i]),
1537 "-", config.blending, config.format);
Greg Hackmann600867e2012-08-23 12:58:02 -07001538
1539 result.appendFormat(" | [%5d,%5d] | [%5u,%5u]", config.x, config.y,
1540 config.w, config.h);
1541 }
1542 if (pdev->last_gsc_map[i].mode == exynos5_gsc_map_t::GSC_NONE)
1543 result.appendFormat(" | %3s", "-");
1544 else
1545 result.appendFormat(" | %3d",
1546 AVAILABLE_GSC_UNITS[pdev->last_gsc_map[i].idx]);
1547 result.append("\n");
1548 }
1549
1550 strlcpy(buff, result.string(), buff_len);
1551}
1552
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -07001553static int exynos5_getDisplayConfigs(struct hwc_composer_device_1 *dev,
1554 int disp, uint32_t *configs, size_t *numConfigs)
1555{
1556 struct exynos5_hwc_composer_device_1_t *pdev =
1557 (struct exynos5_hwc_composer_device_1_t *)dev;
1558
1559 if (*numConfigs == 0)
1560 return 0;
1561
1562 if (disp == HWC_DISPLAY_PRIMARY) {
1563 configs[0] = 0;
1564 *numConfigs = 1;
1565 return 0;
1566 } else if (disp == HWC_DISPLAY_EXTERNAL) {
1567 if (!pdev->hdmi_enabled) {
1568 return -EINVAL;
1569 }
1570
1571 int err = hdmi_get_config(pdev);
1572 if (err) {
1573 return -EINVAL;
1574 }
1575
1576 configs[0] = 0;
1577 *numConfigs = 1;
1578 return 0;
1579 }
1580
1581 return -EINVAL;
1582}
1583
1584static int32_t exynos5_fimd_attribute(struct exynos5_hwc_composer_device_1_t *pdev,
1585 const uint32_t attribute)
1586{
1587 switch(attribute) {
1588 case HWC_DISPLAY_VSYNC_PERIOD:
1589 return pdev->vsync_period;
1590
1591 case HWC_DISPLAY_WIDTH:
1592 return pdev->xres;
1593
1594 case HWC_DISPLAY_HEIGHT:
1595 return pdev->yres;
1596
1597 case HWC_DISPLAY_DPI_X:
1598 return pdev->xdpi;
1599
1600 case HWC_DISPLAY_DPI_Y:
1601 return pdev->ydpi;
1602
1603 default:
1604 ALOGE("unknown display attribute %u", attribute);
1605 return -EINVAL;
1606 }
1607}
1608
1609static int32_t exynos5_hdmi_attribute(struct exynos5_hwc_composer_device_1_t *pdev,
1610 const uint32_t attribute)
1611{
1612 switch(attribute) {
1613 case HWC_DISPLAY_VSYNC_PERIOD:
1614 return pdev->vsync_period;
1615
1616 case HWC_DISPLAY_WIDTH:
1617 return pdev->hdmi_w;
1618
1619 case HWC_DISPLAY_HEIGHT:
1620 return pdev->hdmi_h;
1621
1622 case HWC_DISPLAY_DPI_X:
1623 case HWC_DISPLAY_DPI_Y:
1624 return 0; // unknown
1625
1626 default:
1627 ALOGE("unknown display attribute %u", attribute);
1628 return -EINVAL;
1629 }
1630}
1631
1632static void exynos5_getDisplayAttributes(struct hwc_composer_device_1 *dev,
1633 int disp, uint32_t config, const uint32_t *attributes, int32_t *values)
1634{
1635 struct exynos5_hwc_composer_device_1_t *pdev =
1636 (struct exynos5_hwc_composer_device_1_t *)dev;
1637
1638 for (int i = 0; attributes[i] != HWC_DISPLAY_NO_ATTRIBUTE; i++) {
1639 if (disp == HWC_DISPLAY_PRIMARY)
1640 values[i] = exynos5_fimd_attribute(pdev, attributes[i]);
1641 else if (disp == HWC_DISPLAY_EXTERNAL)
1642 values[i] = exynos5_hdmi_attribute(pdev, attributes[i]);
1643 else
1644 ALOGE("unknown display type %u", disp);
1645 }
1646}
1647
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001648static int exynos5_close(hw_device_t* device);
1649
1650static int exynos5_open(const struct hw_module_t *module, const char *name,
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001651 struct hw_device_t **device)
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001652{
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001653 int ret;
Greg Hackmannd92fe212012-09-11 14:28:41 -07001654 int refreshRate;
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001655 int sw_fd;
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001656
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001657 if (strcmp(name, HWC_HARDWARE_COMPOSER)) {
1658 return -EINVAL;
1659 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001660
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001661 struct exynos5_hwc_composer_device_1_t *dev;
1662 dev = (struct exynos5_hwc_composer_device_1_t *)malloc(sizeof(*dev));
1663 memset(dev, 0, sizeof(*dev));
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001664
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001665 if (hw_get_module(GRALLOC_HARDWARE_MODULE_ID,
1666 (const struct hw_module_t **)&dev->gralloc_module)) {
1667 ALOGE("failed to get gralloc hw module");
1668 ret = -EINVAL;
1669 goto err_get_module;
1670 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001671
Greg Hackmann9130e702012-07-30 14:53:04 -07001672 if (gralloc_open((const hw_module_t *)dev->gralloc_module,
1673 &dev->alloc_device)) {
1674 ALOGE("failed to open gralloc");
1675 ret = -EINVAL;
1676 goto err_get_module;
1677 }
1678
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001679 dev->fd = open("/dev/graphics/fb0", O_RDWR);
1680 if (dev->fd < 0) {
1681 ALOGE("failed to open framebuffer");
1682 ret = dev->fd;
Greg Hackmann9130e702012-07-30 14:53:04 -07001683 goto err_open_fb;
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001684 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001685
Greg Hackmannd92fe212012-09-11 14:28:41 -07001686 struct fb_var_screeninfo info;
1687 if (ioctl(dev->fd, FBIOGET_VSCREENINFO, &info) == -1) {
1688 ALOGE("FBIOGET_VSCREENINFO ioctl failed: %s", strerror(errno));
1689 ret = -errno;
1690 goto err_ioctl;
1691 }
1692
1693 refreshRate = 1000000000000LLU /
1694 (
1695 uint64_t( info.upper_margin + info.lower_margin + info.yres )
1696 * ( info.left_margin + info.right_margin + info.xres )
1697 * info.pixclock
1698 );
1699
1700 if (refreshRate == 0) {
1701 ALOGW("invalid refresh rate, assuming 60 Hz");
1702 refreshRate = 60;
1703 }
1704
Greg Hackmann0c1ba822012-09-13 13:38:12 -07001705 dev->xres = 2560;
1706 dev->yres = 1600;
Greg Hackmannd92fe212012-09-11 14:28:41 -07001707 dev->xdpi = 1000 * (info.xres * 25.4f) / info.width;
1708 dev->ydpi = 1000 * (info.yres * 25.4f) / info.height;
1709 dev->vsync_period = 1000000000 / refreshRate;
1710
1711 ALOGV("using\n"
1712 "xres = %d px\n"
1713 "yres = %d px\n"
1714 "width = %d mm (%f dpi)\n"
1715 "height = %d mm (%f dpi)\n"
1716 "refresh rate = %d Hz\n",
1717 dev->xres, dev->yres, info.width, dev->xdpi / 1000.0,
1718 info.height, dev->ydpi / 1000.0, refreshRate);
1719
Benoit Goby8bad7e32012-08-16 14:17:14 -07001720 dev->hdmi_mixer0 = open("/dev/v4l-subdev7", O_RDWR);
1721 if (dev->hdmi_layer0 < 0) {
1722 ALOGE("failed to open hdmi mixer0 subdev");
1723 ret = dev->hdmi_layer0;
Benoit Gobyd6bb7ce2012-08-09 16:11:22 -07001724 goto err_ioctl;
1725 }
1726
Benoit Goby8bad7e32012-08-16 14:17:14 -07001727 dev->hdmi_layer0 = open("/dev/video16", O_RDWR);
1728 if (dev->hdmi_layer0 < 0) {
1729 ALOGE("failed to open hdmi layer0 device");
1730 ret = dev->hdmi_layer0;
1731 goto err_mixer0;
1732 }
1733
1734 dev->hdmi_layer1 = open("/dev/video17", O_RDWR);
1735 if (dev->hdmi_layer1 < 0) {
1736 ALOGE("failed to open hdmi layer1 device");
1737 ret = dev->hdmi_layer1;
1738 goto err_hdmi0;
1739 }
1740
Greg Hackmann29724852012-07-23 15:31:10 -07001741 dev->vsync_fd = open("/sys/devices/platform/exynos5-fb.1/vsync", O_RDONLY);
1742 if (dev->vsync_fd < 0) {
1743 ALOGE("failed to open vsync attribute");
1744 ret = dev->vsync_fd;
Benoit Goby8bad7e32012-08-16 14:17:14 -07001745 goto err_hdmi1;
Greg Hackmann29724852012-07-23 15:31:10 -07001746 }
1747
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001748 sw_fd = open("/sys/class/switch/hdmi/state", O_RDONLY);
1749 if (sw_fd) {
1750 char val;
Benoit Goby4e0f1682012-08-30 17:42:41 -07001751 if (read(sw_fd, &val, 1) == 1 && val == '1') {
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001752 dev->hdmi_hpd = true;
Benoit Goby4e0f1682012-08-30 17:42:41 -07001753 if (hdmi_get_config(dev)) {
1754 ALOGE("Error reading HDMI configuration");
1755 dev->hdmi_hpd = false;
1756 }
1757 }
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001758 }
Benoit Gobycdd61b32012-07-09 12:09:59 -07001759
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001760 dev->base.common.tag = HARDWARE_DEVICE_TAG;
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -07001761 dev->base.common.version = HWC_DEVICE_API_VERSION_1_1;
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001762 dev->base.common.module = const_cast<hw_module_t *>(module);
1763 dev->base.common.close = exynos5_close;
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001764
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001765 dev->base.prepare = exynos5_prepare;
1766 dev->base.set = exynos5_set;
Jesse Hallda5a71d2012-08-21 12:12:55 -07001767 dev->base.eventControl = exynos5_eventControl;
1768 dev->base.blank = exynos5_blank;
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001769 dev->base.query = exynos5_query;
Jesse Hallda5a71d2012-08-21 12:12:55 -07001770 dev->base.registerProcs = exynos5_registerProcs;
Greg Hackmann600867e2012-08-23 12:58:02 -07001771 dev->base.dump = exynos5_dump;
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -07001772 dev->base.getDisplayConfigs = exynos5_getDisplayConfigs;
1773 dev->base.getDisplayAttributes = exynos5_getDisplayAttributes;
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001774
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001775 *device = &dev->base.common;
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001776
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001777 ret = pthread_create(&dev->vsync_thread, NULL, hwc_vsync_thread, dev);
1778 if (ret) {
1779 ALOGE("failed to start vsync thread: %s", strerror(ret));
1780 ret = -ret;
Greg Hackmann29724852012-07-23 15:31:10 -07001781 goto err_vsync;
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001782 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001783
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001784 return 0;
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001785
Greg Hackmann29724852012-07-23 15:31:10 -07001786err_vsync:
1787 close(dev->vsync_fd);
Benoit Goby8bad7e32012-08-16 14:17:14 -07001788err_mixer0:
1789 close(dev->hdmi_mixer0);
1790err_hdmi1:
1791 close(dev->hdmi_layer0);
1792err_hdmi0:
1793 close(dev->hdmi_layer1);
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001794err_ioctl:
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001795 close(dev->fd);
Greg Hackmann9130e702012-07-30 14:53:04 -07001796err_open_fb:
1797 gralloc_close(dev->alloc_device);
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001798err_get_module:
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001799 free(dev);
1800 return ret;
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001801}
1802
1803static int exynos5_close(hw_device_t *device)
1804{
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001805 struct exynos5_hwc_composer_device_1_t *dev =
1806 (struct exynos5_hwc_composer_device_1_t *)device;
Greg Hackmann29724852012-07-23 15:31:10 -07001807 pthread_kill(dev->vsync_thread, SIGTERM);
1808 pthread_join(dev->vsync_thread, NULL);
Greg Hackmann9130e702012-07-30 14:53:04 -07001809 for (size_t i = 0; i < NUM_GSC_UNITS; i++) {
1810 if (dev->gsc[i].gsc)
1811 exynos_gsc_destroy(dev->gsc[i].gsc);
1812 for (size_t j = 0; i < NUM_GSC_DST_BUFS; j++)
1813 if (dev->gsc[i].dst_buf[j])
1814 dev->alloc_device->free(dev->alloc_device, dev->gsc[i].dst_buf[j]);
1815 }
1816 gralloc_close(dev->alloc_device);
Greg Hackmann29724852012-07-23 15:31:10 -07001817 close(dev->vsync_fd);
Benoit Goby8bad7e32012-08-16 14:17:14 -07001818 close(dev->hdmi_mixer0);
1819 close(dev->hdmi_layer0);
1820 close(dev->hdmi_layer1);
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001821 close(dev->fd);
1822 return 0;
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001823}
1824
1825static struct hw_module_methods_t exynos5_hwc_module_methods = {
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001826 open: exynos5_open,
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001827};
1828
1829hwc_module_t HAL_MODULE_INFO_SYM = {
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001830 common: {
1831 tag: HARDWARE_MODULE_TAG,
1832 module_api_version: HWC_MODULE_API_VERSION_0_1,
1833 hal_api_version: HARDWARE_HAL_API_VERSION,
1834 id: HWC_HARDWARE_MODULE_ID,
1835 name: "Samsung exynos5 hwcomposer module",
1836 author: "Google",
1837 methods: &exynos5_hwc_module_methods,
1838 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001839};