blob: 37f393f27efc730707b217feee8415fbd42de046 [file] [log] [blame]
Linus Torvalds1da177e2005-04-16 15:20:36 -07001/*
2 * File: msi.c
3 * Purpose: PCI Message Signaled Interrupt (MSI)
4 *
5 * Copyright (C) 2003-2004 Intel
6 * Copyright (C) Tom Long Nguyen (tom.l.nguyen@intel.com)
Christoph Hellwigaff17162016-07-12 18:20:17 +09007 * Copyright (C) 2016 Christoph Hellwig.
Linus Torvalds1da177e2005-04-16 15:20:36 -07008 */
9
Eric W. Biederman1ce03372006-10-04 02:16:41 -070010#include <linux/err.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070011#include <linux/mm.h>
12#include <linux/irq.h>
13#include <linux/interrupt.h>
Paul Gortmaker363c75d2011-05-27 09:37:25 -040014#include <linux/export.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070015#include <linux/ioport.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070016#include <linux/pci.h>
17#include <linux/proc_fs.h>
Eric W. Biederman3b7d1922006-10-04 02:16:59 -070018#include <linux/msi.h>
Dan Williams4fdadeb2007-04-26 18:21:38 -070019#include <linux/smp.h>
Hidetoshi Seto500559a2009-08-10 10:14:15 +090020#include <linux/errno.h>
21#include <linux/io.h>
Tomasz Nowickibe2021b2016-09-12 20:32:22 +020022#include <linux/acpi_iort.h>
Tejun Heo5a0e3ad2010-03-24 17:04:11 +090023#include <linux/slab.h>
Jiang Liu3878eae2014-11-11 21:02:18 +080024#include <linux/irqdomain.h>
David Daneyb6eec9b2015-10-08 15:10:49 -070025#include <linux/of_irq.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070026
27#include "pci.h"
Linus Torvalds1da177e2005-04-16 15:20:36 -070028
Linus Torvalds1da177e2005-04-16 15:20:36 -070029static int pci_msi_enable = 1;
Yijing Wang38737d82014-10-27 10:44:36 +080030int pci_msi_ignore_mask;
Linus Torvalds1da177e2005-04-16 15:20:36 -070031
Bjorn Helgaas527eee22013-04-17 17:44:48 -060032#define msix_table_size(flags) ((flags & PCI_MSIX_FLAGS_QSIZE) + 1)
33
Jiang Liu8e047ad2014-11-15 22:24:07 +080034#ifdef CONFIG_PCI_MSI_IRQ_DOMAIN
35static struct irq_domain *pci_msi_default_domain;
36static DEFINE_MUTEX(pci_msi_domain_lock);
37
38struct irq_domain * __weak arch_get_pci_msi_domain(struct pci_dev *dev)
39{
40 return pci_msi_default_domain;
41}
42
Marc Zyngier020c3122014-11-15 10:49:12 +000043static struct irq_domain *pci_msi_get_domain(struct pci_dev *dev)
44{
Marc Zyngierd8a1cb72015-07-28 14:46:14 +010045 struct irq_domain *domain;
Marc Zyngier020c3122014-11-15 10:49:12 +000046
Marc Zyngierd8a1cb72015-07-28 14:46:14 +010047 domain = dev_get_msi_domain(&dev->dev);
48 if (domain)
49 return domain;
Marc Zyngier020c3122014-11-15 10:49:12 +000050
Marc Zyngierd8a1cb72015-07-28 14:46:14 +010051 return arch_get_pci_msi_domain(dev);
Marc Zyngier020c3122014-11-15 10:49:12 +000052}
53
Jiang Liu8e047ad2014-11-15 22:24:07 +080054static int pci_msi_setup_msi_irqs(struct pci_dev *dev, int nvec, int type)
55{
56 struct irq_domain *domain;
57
Marc Zyngier020c3122014-11-15 10:49:12 +000058 domain = pci_msi_get_domain(dev);
Marc Zyngier3845d292015-12-04 10:28:14 -060059 if (domain && irq_domain_is_hierarchy(domain))
Jiang Liu8e047ad2014-11-15 22:24:07 +080060 return pci_msi_domain_alloc_irqs(domain, dev, nvec, type);
61
62 return arch_setup_msi_irqs(dev, nvec, type);
63}
64
65static void pci_msi_teardown_msi_irqs(struct pci_dev *dev)
66{
67 struct irq_domain *domain;
68
Marc Zyngier020c3122014-11-15 10:49:12 +000069 domain = pci_msi_get_domain(dev);
Marc Zyngier3845d292015-12-04 10:28:14 -060070 if (domain && irq_domain_is_hierarchy(domain))
Jiang Liu8e047ad2014-11-15 22:24:07 +080071 pci_msi_domain_free_irqs(domain, dev);
72 else
73 arch_teardown_msi_irqs(dev);
74}
75#else
76#define pci_msi_setup_msi_irqs arch_setup_msi_irqs
77#define pci_msi_teardown_msi_irqs arch_teardown_msi_irqs
78#endif
Bjorn Helgaas527eee22013-04-17 17:44:48 -060079
Adrian Bunk6a9e7f22007-12-11 23:19:41 +010080/* Arch hooks */
81
Thomas Petazzoni4287d822013-08-09 22:27:06 +020082int __weak arch_setup_msi_irq(struct pci_dev *dev, struct msi_desc *desc)
83{
Lorenzo Pieralisi2291ec02015-08-03 22:04:06 -050084 struct msi_controller *chip = dev->bus->msi;
Thierry Reding0cbdcfc2013-08-09 22:27:08 +020085 int err;
86
87 if (!chip || !chip->setup_irq)
88 return -EINVAL;
89
90 err = chip->setup_irq(chip, dev, desc);
91 if (err < 0)
92 return err;
93
94 irq_set_chip_data(desc->irq, chip);
95
96 return 0;
Thomas Petazzoni4287d822013-08-09 22:27:06 +020097}
98
99void __weak arch_teardown_msi_irq(unsigned int irq)
100{
Yijing Wangc2791b82014-11-11 17:45:45 -0700101 struct msi_controller *chip = irq_get_chip_data(irq);
Thierry Reding0cbdcfc2013-08-09 22:27:08 +0200102
103 if (!chip || !chip->teardown_irq)
104 return;
105
106 chip->teardown_irq(chip, irq);
Thomas Petazzoni4287d822013-08-09 22:27:06 +0200107}
108
Thomas Petazzoni4287d822013-08-09 22:27:06 +0200109int __weak arch_setup_msi_irqs(struct pci_dev *dev, int nvec, int type)
Adrian Bunk6a9e7f22007-12-11 23:19:41 +0100110{
Lucas Stach339e5b42015-09-18 13:58:34 -0500111 struct msi_controller *chip = dev->bus->msi;
Adrian Bunk6a9e7f22007-12-11 23:19:41 +0100112 struct msi_desc *entry;
113 int ret;
114
Lucas Stach339e5b42015-09-18 13:58:34 -0500115 if (chip && chip->setup_irqs)
116 return chip->setup_irqs(chip, dev, nvec, type);
Matthew Wilcox1c8d7b02009-03-17 08:54:10 -0400117 /*
118 * If an architecture wants to support multiple MSI, it needs to
119 * override arch_setup_msi_irqs()
120 */
121 if (type == PCI_CAP_ID_MSI && nvec > 1)
122 return 1;
123
Jiang Liu5004e982015-07-09 16:00:41 +0800124 for_each_pci_msi_entry(entry, dev) {
Adrian Bunk6a9e7f22007-12-11 23:19:41 +0100125 ret = arch_setup_msi_irq(dev, entry);
Michael Ellermanb5fbf532009-02-11 22:27:02 +1100126 if (ret < 0)
Adrian Bunk6a9e7f22007-12-11 23:19:41 +0100127 return ret;
Michael Ellermanb5fbf532009-02-11 22:27:02 +1100128 if (ret > 0)
129 return -ENOSPC;
Adrian Bunk6a9e7f22007-12-11 23:19:41 +0100130 }
131
132 return 0;
133}
134
Thomas Petazzoni4287d822013-08-09 22:27:06 +0200135/*
136 * We have a default implementation available as a separate non-weak
137 * function, as it is used by the Xen x86 PCI code
138 */
Thomas Gleixner1525bf02010-10-06 16:05:35 -0400139void default_teardown_msi_irqs(struct pci_dev *dev)
Adrian Bunk6a9e7f22007-12-11 23:19:41 +0100140{
Jiang Liu63a7b172014-11-06 22:20:32 +0800141 int i;
Adrian Bunk6a9e7f22007-12-11 23:19:41 +0100142 struct msi_desc *entry;
143
Jiang Liu5004e982015-07-09 16:00:41 +0800144 for_each_pci_msi_entry(entry, dev)
Jiang Liu63a7b172014-11-06 22:20:32 +0800145 if (entry->irq)
146 for (i = 0; i < entry->nvec_used; i++)
147 arch_teardown_msi_irq(entry->irq + i);
Adrian Bunk6a9e7f22007-12-11 23:19:41 +0100148}
149
Thomas Petazzoni4287d822013-08-09 22:27:06 +0200150void __weak arch_teardown_msi_irqs(struct pci_dev *dev)
151{
152 return default_teardown_msi_irqs(dev);
153}
Konrad Rzeszutek Wilk76ccc292011-12-16 17:38:18 -0500154
DuanZhenzhongac8344c2013-12-04 13:09:16 +0800155static void default_restore_msi_irq(struct pci_dev *dev, int irq)
Konrad Rzeszutek Wilk76ccc292011-12-16 17:38:18 -0500156{
157 struct msi_desc *entry;
158
159 entry = NULL;
160 if (dev->msix_enabled) {
Jiang Liu5004e982015-07-09 16:00:41 +0800161 for_each_pci_msi_entry(entry, dev) {
Konrad Rzeszutek Wilk76ccc292011-12-16 17:38:18 -0500162 if (irq == entry->irq)
163 break;
164 }
165 } else if (dev->msi_enabled) {
166 entry = irq_get_msi_desc(irq);
167 }
168
169 if (entry)
Jiang Liu83a18912014-11-09 23:10:34 +0800170 __pci_write_msi_msg(entry, &entry->msg);
Konrad Rzeszutek Wilk76ccc292011-12-16 17:38:18 -0500171}
Thomas Petazzoni4287d822013-08-09 22:27:06 +0200172
DuanZhenzhongac8344c2013-12-04 13:09:16 +0800173void __weak arch_restore_msi_irqs(struct pci_dev *dev)
Thomas Petazzoni4287d822013-08-09 22:27:06 +0200174{
DuanZhenzhongac8344c2013-12-04 13:09:16 +0800175 return default_restore_msi_irqs(dev);
Thomas Petazzoni4287d822013-08-09 22:27:06 +0200176}
Konrad Rzeszutek Wilk76ccc292011-12-16 17:38:18 -0500177
Matthew Wilcoxbffac3c2009-01-21 19:19:19 -0500178static inline __attribute_const__ u32 msi_mask(unsigned x)
179{
Matthew Wilcox0b49ec32009-02-08 20:27:47 -0700180 /* Don't shift by >= width of type */
181 if (x >= 5)
182 return 0xffffffff;
183 return (1 << (1 << x)) - 1;
Matthew Wilcoxbffac3c2009-01-21 19:19:19 -0500184}
185
Matthew Wilcoxce6fce42008-07-25 15:42:58 -0600186/*
187 * PCI 2.3 does not specify mask bits for each MSI interrupt. Attempting to
188 * mask all MSI interrupts by clearing the MSI enable bit does not work
189 * reliably as devices without an INTx disable bit will then generate a
190 * level IRQ which will never be cleared.
Matthew Wilcoxce6fce42008-07-25 15:42:58 -0600191 */
Thomas Gleixner23ed8d52014-11-23 11:55:58 +0100192u32 __pci_msi_desc_mask_irq(struct msi_desc *desc, u32 mask, u32 flag)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700193{
Matthew Wilcoxf2440d92009-03-17 08:54:09 -0400194 u32 mask_bits = desc->masked;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700195
Yijing Wang38737d82014-10-27 10:44:36 +0800196 if (pci_msi_ignore_mask || !desc->msi_attrib.maskbit)
Hidetoshi Seto12abb8b2009-06-24 12:08:09 +0900197 return 0;
Matthew Wilcoxf2440d92009-03-17 08:54:09 -0400198
199 mask_bits &= ~mask;
200 mask_bits |= flag;
Jiang Liue39758e2015-07-09 16:00:43 +0800201 pci_write_config_dword(msi_desc_to_pci_dev(desc), desc->mask_pos,
202 mask_bits);
Hidetoshi Seto12abb8b2009-06-24 12:08:09 +0900203
204 return mask_bits;
205}
206
207static void msi_mask_irq(struct msi_desc *desc, u32 mask, u32 flag)
208{
Thomas Gleixner23ed8d52014-11-23 11:55:58 +0100209 desc->masked = __pci_msi_desc_mask_irq(desc, mask, flag);
Matthew Wilcoxf2440d92009-03-17 08:54:09 -0400210}
211
Christoph Hellwig5eb6d662016-07-12 18:20:14 +0900212static void __iomem *pci_msix_desc_addr(struct msi_desc *desc)
213{
214 return desc->mask_base +
215 desc->msi_attrib.entry_nr * PCI_MSIX_ENTRY_SIZE;
216}
217
Matthew Wilcoxf2440d92009-03-17 08:54:09 -0400218/*
219 * This internal function does not flush PCI writes to the device.
220 * All users must ensure that they read from the device before either
221 * assuming that the device state is up to date, or returning out of this
222 * file. This saves a few milliseconds when initialising devices with lots
223 * of MSI-X interrupts.
224 */
Thomas Gleixner23ed8d52014-11-23 11:55:58 +0100225u32 __pci_msix_desc_mask_irq(struct msi_desc *desc, u32 flag)
Matthew Wilcoxf2440d92009-03-17 08:54:09 -0400226{
227 u32 mask_bits = desc->masked;
Yijing Wang38737d82014-10-27 10:44:36 +0800228
229 if (pci_msi_ignore_mask)
230 return 0;
231
Sheng Yang8d805282010-11-11 15:46:55 +0800232 mask_bits &= ~PCI_MSIX_ENTRY_CTRL_MASKBIT;
233 if (flag)
234 mask_bits |= PCI_MSIX_ENTRY_CTRL_MASKBIT;
Christoph Hellwig5eb6d662016-07-12 18:20:14 +0900235 writel(mask_bits, pci_msix_desc_addr(desc) + PCI_MSIX_ENTRY_VECTOR_CTRL);
Hidetoshi Seto12abb8b2009-06-24 12:08:09 +0900236
237 return mask_bits;
238}
239
240static void msix_mask_irq(struct msi_desc *desc, u32 flag)
241{
Thomas Gleixner23ed8d52014-11-23 11:55:58 +0100242 desc->masked = __pci_msix_desc_mask_irq(desc, flag);
Matthew Wilcoxf2440d92009-03-17 08:54:09 -0400243}
244
Thomas Gleixner1c9db522010-09-28 16:46:51 +0200245static void msi_set_mask_bit(struct irq_data *data, u32 flag)
Matthew Wilcoxf2440d92009-03-17 08:54:09 -0400246{
Jiang Liuc391f262015-06-01 16:05:41 +0800247 struct msi_desc *desc = irq_data_get_msi_desc(data);
Matthew Wilcoxf2440d92009-03-17 08:54:09 -0400248
249 if (desc->msi_attrib.is_msix) {
250 msix_mask_irq(desc, flag);
251 readl(desc->mask_base); /* Flush write to device */
Matthew Wilcox24d27552009-03-17 08:54:06 -0400252 } else {
Yijing Wanga281b782014-07-08 10:08:55 +0800253 unsigned offset = data->irq - desc->irq;
Matthew Wilcox1c8d7b02009-03-17 08:54:10 -0400254 msi_mask_irq(desc, 1 << offset, flag << offset);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700255 }
Matthew Wilcoxf2440d92009-03-17 08:54:09 -0400256}
257
Thomas Gleixner23ed8d52014-11-23 11:55:58 +0100258/**
259 * pci_msi_mask_irq - Generic irq chip callback to mask PCI/MSI interrupts
260 * @data: pointer to irqdata associated to that interrupt
261 */
262void pci_msi_mask_irq(struct irq_data *data)
Matthew Wilcoxf2440d92009-03-17 08:54:09 -0400263{
Thomas Gleixner1c9db522010-09-28 16:46:51 +0200264 msi_set_mask_bit(data, 1);
Matthew Wilcoxf2440d92009-03-17 08:54:09 -0400265}
Jake Oshinsa4289dc2015-12-10 17:52:59 +0000266EXPORT_SYMBOL_GPL(pci_msi_mask_irq);
Matthew Wilcoxf2440d92009-03-17 08:54:09 -0400267
Thomas Gleixner23ed8d52014-11-23 11:55:58 +0100268/**
269 * pci_msi_unmask_irq - Generic irq chip callback to unmask PCI/MSI interrupts
270 * @data: pointer to irqdata associated to that interrupt
271 */
272void pci_msi_unmask_irq(struct irq_data *data)
Matthew Wilcoxf2440d92009-03-17 08:54:09 -0400273{
Thomas Gleixner1c9db522010-09-28 16:46:51 +0200274 msi_set_mask_bit(data, 0);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700275}
Jake Oshinsa4289dc2015-12-10 17:52:59 +0000276EXPORT_SYMBOL_GPL(pci_msi_unmask_irq);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700277
DuanZhenzhongac8344c2013-12-04 13:09:16 +0800278void default_restore_msi_irqs(struct pci_dev *dev)
279{
280 struct msi_desc *entry;
281
Jiang Liu5004e982015-07-09 16:00:41 +0800282 for_each_pci_msi_entry(entry, dev)
DuanZhenzhongac8344c2013-12-04 13:09:16 +0800283 default_restore_msi_irq(dev, entry->irq);
DuanZhenzhongac8344c2013-12-04 13:09:16 +0800284}
285
Jiang Liu891d4a42014-11-09 23:10:33 +0800286void __pci_read_msi_msg(struct msi_desc *entry, struct msi_msg *msg)
Eric W. Biederman0366f8f2006-10-04 02:16:33 -0700287{
Jiang Liue39758e2015-07-09 16:00:43 +0800288 struct pci_dev *dev = msi_desc_to_pci_dev(entry);
289
290 BUG_ON(dev->current_state != PCI_D0);
Eric W. Biederman0366f8f2006-10-04 02:16:33 -0700291
Ben Hutchings30da5522010-07-23 14:56:28 +0100292 if (entry->msi_attrib.is_msix) {
Christoph Hellwig5eb6d662016-07-12 18:20:14 +0900293 void __iomem *base = pci_msix_desc_addr(entry);
Ben Hutchings30da5522010-07-23 14:56:28 +0100294
295 msg->address_lo = readl(base + PCI_MSIX_ENTRY_LOWER_ADDR);
296 msg->address_hi = readl(base + PCI_MSIX_ENTRY_UPPER_ADDR);
297 msg->data = readl(base + PCI_MSIX_ENTRY_DATA);
298 } else {
Bjorn Helgaasf5322162013-04-17 17:34:36 -0600299 int pos = dev->msi_cap;
Ben Hutchings30da5522010-07-23 14:56:28 +0100300 u16 data;
301
Bjorn Helgaas9925ad02013-04-17 17:39:57 -0600302 pci_read_config_dword(dev, pos + PCI_MSI_ADDRESS_LO,
303 &msg->address_lo);
Ben Hutchings30da5522010-07-23 14:56:28 +0100304 if (entry->msi_attrib.is_64) {
Bjorn Helgaas9925ad02013-04-17 17:39:57 -0600305 pci_read_config_dword(dev, pos + PCI_MSI_ADDRESS_HI,
306 &msg->address_hi);
Bjorn Helgaas2f221342013-04-17 17:41:13 -0600307 pci_read_config_word(dev, pos + PCI_MSI_DATA_64, &data);
Ben Hutchings30da5522010-07-23 14:56:28 +0100308 } else {
309 msg->address_hi = 0;
Bjorn Helgaas2f221342013-04-17 17:41:13 -0600310 pci_read_config_word(dev, pos + PCI_MSI_DATA_32, &data);
Ben Hutchings30da5522010-07-23 14:56:28 +0100311 }
312 msg->data = data;
313 }
Eric W. Biederman0366f8f2006-10-04 02:16:33 -0700314}
315
Jiang Liu83a18912014-11-09 23:10:34 +0800316void __pci_write_msi_msg(struct msi_desc *entry, struct msi_msg *msg)
Yinghai Lu3145e942008-12-05 18:58:34 -0800317{
Jiang Liue39758e2015-07-09 16:00:43 +0800318 struct pci_dev *dev = msi_desc_to_pci_dev(entry);
319
320 if (dev->current_state != PCI_D0) {
Ben Hutchingsfcd097f2010-06-17 20:16:36 +0100321 /* Don't touch the hardware now */
322 } else if (entry->msi_attrib.is_msix) {
Christoph Hellwig5eb6d662016-07-12 18:20:14 +0900323 void __iomem *base = pci_msix_desc_addr(entry);
Matthew Wilcox24d27552009-03-17 08:54:06 -0400324
Hidetoshi Seto2c21fd42009-06-23 17:40:04 +0900325 writel(msg->address_lo, base + PCI_MSIX_ENTRY_LOWER_ADDR);
326 writel(msg->address_hi, base + PCI_MSIX_ENTRY_UPPER_ADDR);
327 writel(msg->data, base + PCI_MSIX_ENTRY_DATA);
Matthew Wilcox24d27552009-03-17 08:54:06 -0400328 } else {
Bjorn Helgaasf5322162013-04-17 17:34:36 -0600329 int pos = dev->msi_cap;
Matthew Wilcox1c8d7b02009-03-17 08:54:10 -0400330 u16 msgctl;
331
Bjorn Helgaasf84ecd22013-04-17 17:38:32 -0600332 pci_read_config_word(dev, pos + PCI_MSI_FLAGS, &msgctl);
Matthew Wilcox1c8d7b02009-03-17 08:54:10 -0400333 msgctl &= ~PCI_MSI_FLAGS_QSIZE;
334 msgctl |= entry->msi_attrib.multiple << 4;
Bjorn Helgaasf84ecd22013-04-17 17:38:32 -0600335 pci_write_config_word(dev, pos + PCI_MSI_FLAGS, msgctl);
Eric W. Biederman0366f8f2006-10-04 02:16:33 -0700336
Bjorn Helgaas9925ad02013-04-17 17:39:57 -0600337 pci_write_config_dword(dev, pos + PCI_MSI_ADDRESS_LO,
338 msg->address_lo);
Eric W. Biederman0366f8f2006-10-04 02:16:33 -0700339 if (entry->msi_attrib.is_64) {
Bjorn Helgaas9925ad02013-04-17 17:39:57 -0600340 pci_write_config_dword(dev, pos + PCI_MSI_ADDRESS_HI,
341 msg->address_hi);
Bjorn Helgaas2f221342013-04-17 17:41:13 -0600342 pci_write_config_word(dev, pos + PCI_MSI_DATA_64,
343 msg->data);
Eric W. Biederman0366f8f2006-10-04 02:16:33 -0700344 } else {
Bjorn Helgaas2f221342013-04-17 17:41:13 -0600345 pci_write_config_word(dev, pos + PCI_MSI_DATA_32,
346 msg->data);
Eric W. Biederman0366f8f2006-10-04 02:16:33 -0700347 }
Eric W. Biederman0366f8f2006-10-04 02:16:33 -0700348 }
Eric W. Biederman392ee1e2007-03-08 13:04:57 -0700349 entry->msg = *msg;
Eric W. Biederman0366f8f2006-10-04 02:16:33 -0700350}
351
Jiang Liu83a18912014-11-09 23:10:34 +0800352void pci_write_msi_msg(unsigned int irq, struct msi_msg *msg)
Yinghai Lu3145e942008-12-05 18:58:34 -0800353{
Thomas Gleixnerdced35a2011-03-28 17:49:12 +0200354 struct msi_desc *entry = irq_get_msi_desc(irq);
Yinghai Lu3145e942008-12-05 18:58:34 -0800355
Jiang Liu83a18912014-11-09 23:10:34 +0800356 __pci_write_msi_msg(entry, msg);
Yinghai Lu3145e942008-12-05 18:58:34 -0800357}
Jiang Liu83a18912014-11-09 23:10:34 +0800358EXPORT_SYMBOL_GPL(pci_write_msi_msg);
Yinghai Lu3145e942008-12-05 18:58:34 -0800359
Hidetoshi Setof56e4482009-08-06 11:32:51 +0900360static void free_msi_irqs(struct pci_dev *dev)
361{
Jiang Liu5004e982015-07-09 16:00:41 +0800362 struct list_head *msi_list = dev_to_msi_list(&dev->dev);
Hidetoshi Setof56e4482009-08-06 11:32:51 +0900363 struct msi_desc *entry, *tmp;
Greg Kroah-Hartman1c51b502013-12-19 12:30:17 -0800364 struct attribute **msi_attrs;
365 struct device_attribute *dev_attr;
Jiang Liu63a7b172014-11-06 22:20:32 +0800366 int i, count = 0;
Hidetoshi Setof56e4482009-08-06 11:32:51 +0900367
Jiang Liu5004e982015-07-09 16:00:41 +0800368 for_each_pci_msi_entry(entry, dev)
Jiang Liu63a7b172014-11-06 22:20:32 +0800369 if (entry->irq)
370 for (i = 0; i < entry->nvec_used; i++)
371 BUG_ON(irq_has_action(entry->irq + i));
Hidetoshi Setof56e4482009-08-06 11:32:51 +0900372
Jiang Liu8e047ad2014-11-15 22:24:07 +0800373 pci_msi_teardown_msi_irqs(dev);
Hidetoshi Setof56e4482009-08-06 11:32:51 +0900374
Jiang Liu5004e982015-07-09 16:00:41 +0800375 list_for_each_entry_safe(entry, tmp, msi_list, list) {
Hidetoshi Setof56e4482009-08-06 11:32:51 +0900376 if (entry->msi_attrib.is_msix) {
Jiang Liu5004e982015-07-09 16:00:41 +0800377 if (list_is_last(&entry->list, msi_list))
Hidetoshi Setof56e4482009-08-06 11:32:51 +0900378 iounmap(entry->mask_base);
379 }
Neil Horman424eb392012-01-03 10:29:54 -0500380
Hidetoshi Setof56e4482009-08-06 11:32:51 +0900381 list_del(&entry->list);
382 kfree(entry);
383 }
Greg Kroah-Hartman1c51b502013-12-19 12:30:17 -0800384
385 if (dev->msi_irq_groups) {
386 sysfs_remove_groups(&dev->dev.kobj, dev->msi_irq_groups);
387 msi_attrs = dev->msi_irq_groups[0]->attrs;
Alexei Starovoitovb701c0b2014-06-04 15:49:50 -0700388 while (msi_attrs[count]) {
Greg Kroah-Hartman1c51b502013-12-19 12:30:17 -0800389 dev_attr = container_of(msi_attrs[count],
390 struct device_attribute, attr);
391 kfree(dev_attr->attr.name);
392 kfree(dev_attr);
393 ++count;
394 }
395 kfree(msi_attrs);
396 kfree(dev->msi_irq_groups[0]);
397 kfree(dev->msi_irq_groups);
398 dev->msi_irq_groups = NULL;
399 }
Hidetoshi Setof56e4482009-08-06 11:32:51 +0900400}
Satoru Takeuchic54c1872007-01-18 13:50:05 +0900401
David Millerba698ad2007-10-25 01:16:30 -0700402static void pci_intx_for_msi(struct pci_dev *dev, int enable)
403{
404 if (!(dev->dev_flags & PCI_DEV_FLAGS_MSI_INTX_DISABLE_BUG))
405 pci_intx(dev, enable);
406}
407
Michael Ellerman8fed4b62007-01-25 19:34:08 +1100408static void __pci_restore_msi_state(struct pci_dev *dev)
Shaohua Li41017f02006-02-08 17:11:38 +0800409{
Shaohua Li41017f02006-02-08 17:11:38 +0800410 u16 control;
Eric W. Biederman392ee1e2007-03-08 13:04:57 -0700411 struct msi_desc *entry;
Shaohua Li41017f02006-02-08 17:11:38 +0800412
Eric W. Biedermanb1cbf4e2007-03-05 00:30:10 -0800413 if (!dev->msi_enabled)
414 return;
415
Thomas Gleixnerdced35a2011-03-28 17:49:12 +0200416 entry = irq_get_msi_desc(dev->irq);
Shaohua Li41017f02006-02-08 17:11:38 +0800417
David Millerba698ad2007-10-25 01:16:30 -0700418 pci_intx_for_msi(dev, 0);
Michael S. Tsirkin61b64ab2015-05-07 09:52:21 -0500419 pci_msi_set_enable(dev, 0);
DuanZhenzhongac8344c2013-12-04 13:09:16 +0800420 arch_restore_msi_irqs(dev);
Eric W. Biederman392ee1e2007-03-08 13:04:57 -0700421
Bjorn Helgaasf5322162013-04-17 17:34:36 -0600422 pci_read_config_word(dev, dev->msi_cap + PCI_MSI_FLAGS, &control);
Yijing Wang31ea5d42014-06-19 16:30:30 +0800423 msi_mask_irq(entry, msi_mask(entry->msi_attrib.multi_cap),
424 entry->masked);
Jesse Barnesabad2ec2008-08-07 08:52:37 -0700425 control &= ~PCI_MSI_FLAGS_QSIZE;
Matthew Wilcox1c8d7b02009-03-17 08:54:10 -0400426 control |= (entry->msi_attrib.multiple << 4) | PCI_MSI_FLAGS_ENABLE;
Bjorn Helgaasf5322162013-04-17 17:34:36 -0600427 pci_write_config_word(dev, dev->msi_cap + PCI_MSI_FLAGS, control);
Michael Ellerman8fed4b62007-01-25 19:34:08 +1100428}
429
430static void __pci_restore_msix_state(struct pci_dev *dev)
Shaohua Li41017f02006-02-08 17:11:38 +0800431{
Shaohua Li41017f02006-02-08 17:11:38 +0800432 struct msi_desc *entry;
Shaohua Li41017f02006-02-08 17:11:38 +0800433
Eric W. Biedermanded86d82007-01-28 12:42:52 -0700434 if (!dev->msix_enabled)
435 return;
Jiang Liu5004e982015-07-09 16:00:41 +0800436 BUG_ON(list_empty(dev_to_msi_list(&dev->dev)));
Eric W. Biedermanded86d82007-01-28 12:42:52 -0700437
Shaohua Li41017f02006-02-08 17:11:38 +0800438 /* route the table */
David Millerba698ad2007-10-25 01:16:30 -0700439 pci_intx_for_msi(dev, 0);
Michael S. Tsirkin61b64ab2015-05-07 09:52:21 -0500440 pci_msix_clear_and_set_ctrl(dev, 0,
Yijing Wang66f0d0c2014-06-19 16:29:53 +0800441 PCI_MSIX_FLAGS_ENABLE | PCI_MSIX_FLAGS_MASKALL);
Shaohua Li41017f02006-02-08 17:11:38 +0800442
DuanZhenzhongac8344c2013-12-04 13:09:16 +0800443 arch_restore_msi_irqs(dev);
Jiang Liu5004e982015-07-09 16:00:41 +0800444 for_each_pci_msi_entry(entry, dev)
Matthew Wilcoxf2440d92009-03-17 08:54:09 -0400445 msix_mask_irq(entry, entry->masked);
Shaohua Li41017f02006-02-08 17:11:38 +0800446
Michael S. Tsirkin61b64ab2015-05-07 09:52:21 -0500447 pci_msix_clear_and_set_ctrl(dev, PCI_MSIX_FLAGS_MASKALL, 0);
Shaohua Li41017f02006-02-08 17:11:38 +0800448}
Michael Ellerman8fed4b62007-01-25 19:34:08 +1100449
450void pci_restore_msi_state(struct pci_dev *dev)
451{
452 __pci_restore_msi_state(dev);
453 __pci_restore_msix_state(dev);
454}
Linas Vepstas94688cf2007-11-07 15:43:59 -0600455EXPORT_SYMBOL_GPL(pci_restore_msi_state);
Shaohua Li41017f02006-02-08 17:11:38 +0800456
Greg Kroah-Hartman1c51b502013-12-19 12:30:17 -0800457static ssize_t msi_mode_show(struct device *dev, struct device_attribute *attr,
Neil Hormanda8d1c82011-10-06 14:08:18 -0400458 char *buf)
459{
Greg Kroah-Hartman1c51b502013-12-19 12:30:17 -0800460 struct msi_desc *entry;
461 unsigned long irq;
462 int retval;
463
464 retval = kstrtoul(attr->attr.name, 10, &irq);
465 if (retval)
466 return retval;
467
Yijing Wange11ece52014-07-08 10:09:19 +0800468 entry = irq_get_msi_desc(irq);
469 if (entry)
470 return sprintf(buf, "%s\n",
471 entry->msi_attrib.is_msix ? "msix" : "msi");
472
Greg Kroah-Hartman1c51b502013-12-19 12:30:17 -0800473 return -ENODEV;
Neil Hormanda8d1c82011-10-06 14:08:18 -0400474}
475
Neil Hormanda8d1c82011-10-06 14:08:18 -0400476static int populate_msi_sysfs(struct pci_dev *pdev)
477{
Greg Kroah-Hartman1c51b502013-12-19 12:30:17 -0800478 struct attribute **msi_attrs;
479 struct attribute *msi_attr;
480 struct device_attribute *msi_dev_attr;
481 struct attribute_group *msi_irq_group;
482 const struct attribute_group **msi_irq_groups;
Neil Hormanda8d1c82011-10-06 14:08:18 -0400483 struct msi_desc *entry;
Greg Kroah-Hartman1c51b502013-12-19 12:30:17 -0800484 int ret = -ENOMEM;
485 int num_msi = 0;
Neil Hormanda8d1c82011-10-06 14:08:18 -0400486 int count = 0;
Romain Bezuta8676062015-09-24 01:31:16 +0200487 int i;
Neil Hormanda8d1c82011-10-06 14:08:18 -0400488
Greg Kroah-Hartman1c51b502013-12-19 12:30:17 -0800489 /* Determine how many msi entries we have */
Jiang Liu5004e982015-07-09 16:00:41 +0800490 for_each_pci_msi_entry(entry, pdev)
Romain Bezuta8676062015-09-24 01:31:16 +0200491 num_msi += entry->nvec_used;
Greg Kroah-Hartman1c51b502013-12-19 12:30:17 -0800492 if (!num_msi)
493 return 0;
494
495 /* Dynamically create the MSI attributes for the PCI device */
496 msi_attrs = kzalloc(sizeof(void *) * (num_msi + 1), GFP_KERNEL);
497 if (!msi_attrs)
498 return -ENOMEM;
Jiang Liu5004e982015-07-09 16:00:41 +0800499 for_each_pci_msi_entry(entry, pdev) {
Romain Bezuta8676062015-09-24 01:31:16 +0200500 for (i = 0; i < entry->nvec_used; i++) {
501 msi_dev_attr = kzalloc(sizeof(*msi_dev_attr), GFP_KERNEL);
502 if (!msi_dev_attr)
503 goto error_attrs;
504 msi_attrs[count] = &msi_dev_attr->attr;
Greg Kroah-Hartman86bb4f62014-02-13 10:47:20 -0700505
Romain Bezuta8676062015-09-24 01:31:16 +0200506 sysfs_attr_init(&msi_dev_attr->attr);
507 msi_dev_attr->attr.name = kasprintf(GFP_KERNEL, "%d",
508 entry->irq + i);
509 if (!msi_dev_attr->attr.name)
510 goto error_attrs;
511 msi_dev_attr->attr.mode = S_IRUGO;
512 msi_dev_attr->show = msi_mode_show;
513 ++count;
514 }
Greg Kroah-Hartman1c51b502013-12-19 12:30:17 -0800515 }
516
517 msi_irq_group = kzalloc(sizeof(*msi_irq_group), GFP_KERNEL);
518 if (!msi_irq_group)
519 goto error_attrs;
520 msi_irq_group->name = "msi_irqs";
521 msi_irq_group->attrs = msi_attrs;
522
523 msi_irq_groups = kzalloc(sizeof(void *) * 2, GFP_KERNEL);
524 if (!msi_irq_groups)
525 goto error_irq_group;
526 msi_irq_groups[0] = msi_irq_group;
527
528 ret = sysfs_create_groups(&pdev->dev.kobj, msi_irq_groups);
529 if (ret)
530 goto error_irq_groups;
531 pdev->msi_irq_groups = msi_irq_groups;
Neil Hormanda8d1c82011-10-06 14:08:18 -0400532
533 return 0;
534
Greg Kroah-Hartman1c51b502013-12-19 12:30:17 -0800535error_irq_groups:
536 kfree(msi_irq_groups);
537error_irq_group:
538 kfree(msi_irq_group);
539error_attrs:
540 count = 0;
541 msi_attr = msi_attrs[count];
542 while (msi_attr) {
543 msi_dev_attr = container_of(msi_attr, struct device_attribute, attr);
544 kfree(msi_attr->name);
545 kfree(msi_dev_attr);
546 ++count;
547 msi_attr = msi_attrs[count];
Neil Hormanda8d1c82011-10-06 14:08:18 -0400548 }
Greg Kroah-Hartman29237752014-02-13 10:47:35 -0700549 kfree(msi_attrs);
Neil Hormanda8d1c82011-10-06 14:08:18 -0400550 return ret;
551}
552
Thomas Gleixnere75eafb2016-09-14 16:18:49 +0200553static struct msi_desc *
554msi_setup_entry(struct pci_dev *dev, int nvec, bool affinity)
Yijing Wangd873b4d2014-07-08 10:07:23 +0800555{
Thomas Gleixnere75eafb2016-09-14 16:18:49 +0200556 struct cpumask *masks = NULL;
Yijing Wangd873b4d2014-07-08 10:07:23 +0800557 struct msi_desc *entry;
Thomas Gleixnere75eafb2016-09-14 16:18:49 +0200558 u16 control;
559
560 if (affinity) {
561 masks = irq_create_affinity_masks(dev->irq_affinity, nvec);
562 if (!masks)
563 pr_err("Unable to allocate affinity masks, ignoring\n");
564 }
Yijing Wangd873b4d2014-07-08 10:07:23 +0800565
566 /* MSI Entry Initialization */
Thomas Gleixnere75eafb2016-09-14 16:18:49 +0200567 entry = alloc_msi_entry(&dev->dev, nvec, masks);
Yijing Wangd873b4d2014-07-08 10:07:23 +0800568 if (!entry)
Thomas Gleixnere75eafb2016-09-14 16:18:49 +0200569 goto out;
Yijing Wangd873b4d2014-07-08 10:07:23 +0800570
571 pci_read_config_word(dev, dev->msi_cap + PCI_MSI_FLAGS, &control);
572
573 entry->msi_attrib.is_msix = 0;
574 entry->msi_attrib.is_64 = !!(control & PCI_MSI_FLAGS_64BIT);
575 entry->msi_attrib.entry_nr = 0;
576 entry->msi_attrib.maskbit = !!(control & PCI_MSI_FLAGS_MASKBIT);
577 entry->msi_attrib.default_irq = dev->irq; /* Save IOAPIC IRQ */
Yijing Wangd873b4d2014-07-08 10:07:23 +0800578 entry->msi_attrib.multi_cap = (control & PCI_MSI_FLAGS_QMASK) >> 1;
Jiang Liu63a7b172014-11-06 22:20:32 +0800579 entry->msi_attrib.multiple = ilog2(__roundup_pow_of_two(nvec));
Yijing Wangd873b4d2014-07-08 10:07:23 +0800580
581 if (control & PCI_MSI_FLAGS_64BIT)
582 entry->mask_pos = dev->msi_cap + PCI_MSI_MASK_64;
583 else
584 entry->mask_pos = dev->msi_cap + PCI_MSI_MASK_32;
585
586 /* Save the initial mask status */
587 if (entry->msi_attrib.maskbit)
588 pci_read_config_dword(dev, entry->mask_pos, &entry->masked);
589
Thomas Gleixnere75eafb2016-09-14 16:18:49 +0200590out:
591 kfree(masks);
Yijing Wangd873b4d2014-07-08 10:07:23 +0800592 return entry;
593}
594
Benjamin Herrenschmidtf144d142014-10-03 15:13:24 +1000595static int msi_verify_entries(struct pci_dev *dev)
596{
597 struct msi_desc *entry;
598
Jiang Liu5004e982015-07-09 16:00:41 +0800599 for_each_pci_msi_entry(entry, dev) {
Benjamin Herrenschmidtf144d142014-10-03 15:13:24 +1000600 if (!dev->no_64bit_msi || !entry->msg.address_hi)
601 continue;
602 dev_err(&dev->dev, "Device has broken 64-bit MSI but arch"
603 " tried to assign one above 4G\n");
604 return -EIO;
605 }
606 return 0;
607}
608
Linus Torvalds1da177e2005-04-16 15:20:36 -0700609/**
610 * msi_capability_init - configure device's MSI capability structure
611 * @dev: pointer to the pci_dev data structure of MSI device function
Matthew Wilcox1c8d7b02009-03-17 08:54:10 -0400612 * @nvec: number of interrupts to allocate
Stephen Hemminger62c61512016-10-23 09:32:34 -0700613 * @affinity: flag to indicate cpu irq affinity mask should be set
Linus Torvalds1da177e2005-04-16 15:20:36 -0700614 *
Matthew Wilcox1c8d7b02009-03-17 08:54:10 -0400615 * Setup the MSI capability structure of the device with the requested
616 * number of interrupts. A return value of zero indicates the successful
617 * setup of an entry with the new MSI irq. A negative return value indicates
618 * an error, and a positive return value indicates the number of interrupts
619 * which could have been allocated.
620 */
Thomas Gleixnere75eafb2016-09-14 16:18:49 +0200621static int msi_capability_init(struct pci_dev *dev, int nvec, bool affinity)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700622{
623 struct msi_desc *entry;
Gavin Shanf4651362013-04-04 16:54:32 +0000624 int ret;
Matthew Wilcoxf2440d92009-03-17 08:54:09 -0400625 unsigned mask;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700626
Michael S. Tsirkin61b64ab2015-05-07 09:52:21 -0500627 pci_msi_set_enable(dev, 0); /* Disable MSI during set up */
Matthew Wilcox110828c2009-06-16 06:31:45 -0600628
Thomas Gleixnere75eafb2016-09-14 16:18:49 +0200629 entry = msi_setup_entry(dev, nvec, affinity);
Eric W. Biedermanf7feaca2007-01-28 12:56:37 -0700630 if (!entry)
631 return -ENOMEM;
Eric W. Biederman1ce03372006-10-04 02:16:41 -0700632
Matthew Wilcoxf2440d92009-03-17 08:54:09 -0400633 /* All MSIs are unmasked by default, Mask them all */
Yijing Wang31ea5d42014-06-19 16:30:30 +0800634 mask = msi_mask(entry->msi_attrib.multi_cap);
Matthew Wilcoxf2440d92009-03-17 08:54:09 -0400635 msi_mask_irq(entry, mask, mask);
636
Jiang Liu5004e982015-07-09 16:00:41 +0800637 list_add_tail(&entry->list, dev_to_msi_list(&dev->dev));
Michael Ellerman9c831332007-04-18 19:39:21 +1000638
Linus Torvalds1da177e2005-04-16 15:20:36 -0700639 /* Configure MSI capability structure */
Jiang Liu8e047ad2014-11-15 22:24:07 +0800640 ret = pci_msi_setup_msi_irqs(dev, nvec, PCI_CAP_ID_MSI);
Michael Ellerman7fe37302007-04-18 19:39:21 +1000641 if (ret) {
Hidetoshi Seto7ba19302009-06-23 17:39:27 +0900642 msi_mask_irq(entry, mask, ~mask);
Hidetoshi Setof56e4482009-08-06 11:32:51 +0900643 free_msi_irqs(dev);
Michael Ellerman7fe37302007-04-18 19:39:21 +1000644 return ret;
Mark Maulefd58e552006-04-10 21:17:48 -0500645 }
Eric W. Biedermanf7feaca2007-01-28 12:56:37 -0700646
Benjamin Herrenschmidtf144d142014-10-03 15:13:24 +1000647 ret = msi_verify_entries(dev);
648 if (ret) {
649 msi_mask_irq(entry, mask, ~mask);
650 free_msi_irqs(dev);
651 return ret;
652 }
653
Neil Hormanda8d1c82011-10-06 14:08:18 -0400654 ret = populate_msi_sysfs(dev);
655 if (ret) {
656 msi_mask_irq(entry, mask, ~mask);
657 free_msi_irqs(dev);
658 return ret;
659 }
660
Linus Torvalds1da177e2005-04-16 15:20:36 -0700661 /* Set MSI enabled bits */
David Millerba698ad2007-10-25 01:16:30 -0700662 pci_intx_for_msi(dev, 0);
Michael S. Tsirkin61b64ab2015-05-07 09:52:21 -0500663 pci_msi_set_enable(dev, 1);
Eric W. Biedermanb1cbf4e2007-03-05 00:30:10 -0800664 dev->msi_enabled = 1;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700665
Jiang Liu5f226992015-07-30 14:00:08 -0500666 pcibios_free_irq(dev);
Michael Ellerman7fe37302007-04-18 19:39:21 +1000667 dev->irq = entry->irq;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700668 return 0;
669}
670
Gavin Shan520fe9d2013-04-04 16:54:33 +0000671static void __iomem *msix_map_region(struct pci_dev *dev, unsigned nr_entries)
Hidetoshi Seto5a05a9d2009-08-06 11:34:34 +0900672{
Kenji Kaneshige4302e0f2010-06-17 10:42:44 +0900673 resource_size_t phys_addr;
Hidetoshi Seto5a05a9d2009-08-06 11:34:34 +0900674 u32 table_offset;
Yijing Wang6a878e52015-01-28 09:52:17 +0800675 unsigned long flags;
Hidetoshi Seto5a05a9d2009-08-06 11:34:34 +0900676 u8 bir;
677
Bjorn Helgaas909094c2013-04-17 17:43:40 -0600678 pci_read_config_dword(dev, dev->msix_cap + PCI_MSIX_TABLE,
679 &table_offset);
Bjorn Helgaas4d187602013-04-17 18:10:07 -0600680 bir = (u8)(table_offset & PCI_MSIX_TABLE_BIR);
Yijing Wang6a878e52015-01-28 09:52:17 +0800681 flags = pci_resource_flags(dev, bir);
682 if (!flags || (flags & IORESOURCE_UNSET))
683 return NULL;
684
Bjorn Helgaas4d187602013-04-17 18:10:07 -0600685 table_offset &= PCI_MSIX_TABLE_OFFSET;
Hidetoshi Seto5a05a9d2009-08-06 11:34:34 +0900686 phys_addr = pci_resource_start(dev, bir) + table_offset;
687
688 return ioremap_nocache(phys_addr, nr_entries * PCI_MSIX_ENTRY_SIZE);
689}
690
Gavin Shan520fe9d2013-04-04 16:54:33 +0000691static int msix_setup_entries(struct pci_dev *dev, void __iomem *base,
Thomas Gleixnere75eafb2016-09-14 16:18:49 +0200692 struct msix_entry *entries, int nvec,
693 bool affinity)
Hidetoshi Setod9d70702009-08-06 11:35:48 +0900694{
Thomas Gleixnere75eafb2016-09-14 16:18:49 +0200695 struct cpumask *curmsk, *masks = NULL;
Hidetoshi Setod9d70702009-08-06 11:35:48 +0900696 struct msi_desc *entry;
Thomas Gleixnere75eafb2016-09-14 16:18:49 +0200697 int ret, i;
Hidetoshi Setod9d70702009-08-06 11:35:48 +0900698
Thomas Gleixnere75eafb2016-09-14 16:18:49 +0200699 if (affinity) {
700 masks = irq_create_affinity_masks(dev->irq_affinity, nvec);
701 if (!masks)
702 pr_err("Unable to allocate affinity masks, ignoring\n");
703 }
Christoph Hellwig4ef33682016-07-12 18:20:18 +0900704
Thomas Gleixnere75eafb2016-09-14 16:18:49 +0200705 for (i = 0, curmsk = masks; i < nvec; i++) {
706 entry = alloc_msi_entry(&dev->dev, 1, curmsk);
Hidetoshi Setod9d70702009-08-06 11:35:48 +0900707 if (!entry) {
708 if (!i)
709 iounmap(base);
710 else
711 free_msi_irqs(dev);
712 /* No enough memory. Don't try again */
Thomas Gleixnere75eafb2016-09-14 16:18:49 +0200713 ret = -ENOMEM;
714 goto out;
Hidetoshi Setod9d70702009-08-06 11:35:48 +0900715 }
716
717 entry->msi_attrib.is_msix = 1;
718 entry->msi_attrib.is_64 = 1;
Christoph Hellwig3ac020e2016-07-12 18:20:16 +0900719 if (entries)
720 entry->msi_attrib.entry_nr = entries[i].entry;
721 else
722 entry->msi_attrib.entry_nr = i;
Hidetoshi Setod9d70702009-08-06 11:35:48 +0900723 entry->msi_attrib.default_irq = dev->irq;
Hidetoshi Setod9d70702009-08-06 11:35:48 +0900724 entry->mask_base = base;
725
Jiang Liu5004e982015-07-09 16:00:41 +0800726 list_add_tail(&entry->list, dev_to_msi_list(&dev->dev));
Thomas Gleixnere75eafb2016-09-14 16:18:49 +0200727 if (masks)
728 curmsk++;
Hidetoshi Setod9d70702009-08-06 11:35:48 +0900729 }
Thomas Gleixnere75eafb2016-09-14 16:18:49 +0200730 ret = 0;
731out:
732 kfree(masks);
Christophe JAILLETc16283d2017-10-07 22:36:49 +0000733 return ret;
Hidetoshi Setod9d70702009-08-06 11:35:48 +0900734}
735
Hidetoshi Seto75cb3422009-08-06 11:35:10 +0900736static void msix_program_entries(struct pci_dev *dev,
Gavin Shan520fe9d2013-04-04 16:54:33 +0000737 struct msix_entry *entries)
Hidetoshi Seto75cb3422009-08-06 11:35:10 +0900738{
739 struct msi_desc *entry;
740 int i = 0;
741
Jiang Liu5004e982015-07-09 16:00:41 +0800742 for_each_pci_msi_entry(entry, dev) {
Christoph Hellwig3ac020e2016-07-12 18:20:16 +0900743 if (entries)
744 entries[i++].vector = entry->irq;
Christoph Hellwig12eb21d2016-07-12 18:20:15 +0900745 entry->masked = readl(pci_msix_desc_addr(entry) +
746 PCI_MSIX_ENTRY_VECTOR_CTRL);
Hidetoshi Seto75cb3422009-08-06 11:35:10 +0900747 msix_mask_irq(entry, 1);
Hidetoshi Seto75cb3422009-08-06 11:35:10 +0900748 }
749}
750
Linus Torvalds1da177e2005-04-16 15:20:36 -0700751/**
752 * msix_capability_init - configure device's MSI-X capability
753 * @dev: pointer to the pci_dev data structure of MSI-X device function
Randy Dunlap8f7020d2005-10-23 11:57:38 -0700754 * @entries: pointer to an array of struct msix_entry entries
755 * @nvec: number of @entries
Stephen Hemminger62c61512016-10-23 09:32:34 -0700756 * @affinity: flag to indicate cpu irq affinity mask should be set
Linus Torvalds1da177e2005-04-16 15:20:36 -0700757 *
Steven Coleeaae4b32005-05-03 18:38:30 -0600758 * Setup the MSI-X capability structure of device function with a
Eric W. Biederman1ce03372006-10-04 02:16:41 -0700759 * single MSI-X irq. A return of zero indicates the successful setup of
760 * requested MSI-X entries with allocated irqs or non-zero for otherwise.
Linus Torvalds1da177e2005-04-16 15:20:36 -0700761 **/
Thomas Gleixnere75eafb2016-09-14 16:18:49 +0200762static int msix_capability_init(struct pci_dev *dev, struct msix_entry *entries,
763 int nvec, bool affinity)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700764{
Gavin Shan520fe9d2013-04-04 16:54:33 +0000765 int ret;
Hidetoshi Seto5a05a9d2009-08-06 11:34:34 +0900766 u16 control;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700767 void __iomem *base;
768
Matthew Wilcoxf5982822009-06-18 19:15:59 -0700769 /* Ensure MSI-X is disabled while it is set up */
Michael S. Tsirkin61b64ab2015-05-07 09:52:21 -0500770 pci_msix_clear_and_set_ctrl(dev, PCI_MSIX_FLAGS_ENABLE, 0);
Matthew Wilcoxf5982822009-06-18 19:15:59 -0700771
Yijing Wang66f0d0c2014-06-19 16:29:53 +0800772 pci_read_config_word(dev, dev->msix_cap + PCI_MSIX_FLAGS, &control);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700773 /* Request & Map MSI-X table region */
Bjorn Helgaas527eee22013-04-17 17:44:48 -0600774 base = msix_map_region(dev, msix_table_size(control));
Hidetoshi Seto5a05a9d2009-08-06 11:34:34 +0900775 if (!base)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700776 return -ENOMEM;
777
Thomas Gleixnere75eafb2016-09-14 16:18:49 +0200778 ret = msix_setup_entries(dev, base, entries, nvec, affinity);
Hidetoshi Setod9d70702009-08-06 11:35:48 +0900779 if (ret)
780 return ret;
Michael Ellerman9c831332007-04-18 19:39:21 +1000781
Jiang Liu8e047ad2014-11-15 22:24:07 +0800782 ret = pci_msi_setup_msi_irqs(dev, nvec, PCI_CAP_ID_MSIX);
Hidetoshi Seto583871d2009-08-06 11:33:39 +0900783 if (ret)
Alexander Gordeev2adc7902013-12-16 09:34:56 +0100784 goto out_avail;
Michael Ellerman9c831332007-04-18 19:39:21 +1000785
Benjamin Herrenschmidtf144d142014-10-03 15:13:24 +1000786 /* Check if all MSI entries honor device restrictions */
787 ret = msi_verify_entries(dev);
788 if (ret)
789 goto out_free;
790
Matthew Wilcoxf5982822009-06-18 19:15:59 -0700791 /*
792 * Some devices require MSI-X to be enabled before we can touch the
793 * MSI-X registers. We need to mask all the vectors to prevent
794 * interrupts coming in before they're fully set up.
795 */
Michael S. Tsirkin61b64ab2015-05-07 09:52:21 -0500796 pci_msix_clear_and_set_ctrl(dev, 0,
Yijing Wang66f0d0c2014-06-19 16:29:53 +0800797 PCI_MSIX_FLAGS_MASKALL | PCI_MSIX_FLAGS_ENABLE);
Matthew Wilcoxf5982822009-06-18 19:15:59 -0700798
Hidetoshi Seto75cb3422009-08-06 11:35:10 +0900799 msix_program_entries(dev, entries);
Matthew Wilcoxf5982822009-06-18 19:15:59 -0700800
Neil Hormanda8d1c82011-10-06 14:08:18 -0400801 ret = populate_msi_sysfs(dev);
Alexander Gordeev2adc7902013-12-16 09:34:56 +0100802 if (ret)
803 goto out_free;
Neil Hormanda8d1c82011-10-06 14:08:18 -0400804
Matthew Wilcoxf5982822009-06-18 19:15:59 -0700805 /* Set MSI-X enabled bits and unmask the function */
David Millerba698ad2007-10-25 01:16:30 -0700806 pci_intx_for_msi(dev, 0);
Eric W. Biedermanb1cbf4e2007-03-05 00:30:10 -0800807 dev->msix_enabled = 1;
Michael S. Tsirkin61b64ab2015-05-07 09:52:21 -0500808 pci_msix_clear_and_set_ctrl(dev, PCI_MSIX_FLAGS_MASKALL, 0);
Matthew Wilcox8d181012009-05-08 07:13:33 -0600809
Jiang Liu5f226992015-07-30 14:00:08 -0500810 pcibios_free_irq(dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700811 return 0;
Hidetoshi Seto583871d2009-08-06 11:33:39 +0900812
Alexander Gordeev2adc7902013-12-16 09:34:56 +0100813out_avail:
Hidetoshi Seto583871d2009-08-06 11:33:39 +0900814 if (ret < 0) {
815 /*
816 * If we had some success, report the number of irqs
817 * we succeeded in setting up.
818 */
Hidetoshi Setod9d70702009-08-06 11:35:48 +0900819 struct msi_desc *entry;
Hidetoshi Seto583871d2009-08-06 11:33:39 +0900820 int avail = 0;
821
Jiang Liu5004e982015-07-09 16:00:41 +0800822 for_each_pci_msi_entry(entry, dev) {
Hidetoshi Seto583871d2009-08-06 11:33:39 +0900823 if (entry->irq != 0)
824 avail++;
825 }
826 if (avail != 0)
827 ret = avail;
828 }
829
Alexander Gordeev2adc7902013-12-16 09:34:56 +0100830out_free:
Hidetoshi Seto583871d2009-08-06 11:33:39 +0900831 free_msi_irqs(dev);
832
833 return ret;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700834}
835
836/**
Alexander Gordeeva06cd742014-09-23 12:45:58 -0600837 * pci_msi_supported - check whether MSI may be enabled on a device
Brice Goglin24334a12006-08-31 01:55:07 -0400838 * @dev: pointer to the pci_dev data structure of MSI device function
Michael Ellermanc9953a72007-04-05 17:19:08 +1000839 * @nvec: how many MSIs have been requested ?
Brice Goglin24334a12006-08-31 01:55:07 -0400840 *
Bjorn Helgaasf7625982013-11-14 11:28:18 -0700841 * Look at global flags, the device itself, and its parent buses
Michael Ellerman17bbc122007-04-05 17:19:07 +1000842 * to determine if MSI/-X are supported for the device. If MSI/-X is
Alexander Gordeeva06cd742014-09-23 12:45:58 -0600843 * supported return 1, else return 0.
Brice Goglin24334a12006-08-31 01:55:07 -0400844 **/
Alexander Gordeeva06cd742014-09-23 12:45:58 -0600845static int pci_msi_supported(struct pci_dev *dev, int nvec)
Brice Goglin24334a12006-08-31 01:55:07 -0400846{
847 struct pci_bus *bus;
848
Brice Goglin0306ebf2006-10-05 10:24:31 +0200849 /* MSI must be globally enabled and supported by the device */
Alexander Gordeev27e20602014-09-23 14:25:11 -0600850 if (!pci_msi_enable)
Alexander Gordeeva06cd742014-09-23 12:45:58 -0600851 return 0;
Alexander Gordeev27e20602014-09-23 14:25:11 -0600852
853 if (!dev || dev->no_msi || dev->current_state != PCI_D0)
Alexander Gordeeva06cd742014-09-23 12:45:58 -0600854 return 0;
Brice Goglin24334a12006-08-31 01:55:07 -0400855
Michael Ellerman314e77b2007-04-05 17:19:12 +1000856 /*
857 * You can't ask to have 0 or less MSIs configured.
858 * a) it's stupid ..
859 * b) the list manipulation code assumes nvec >= 1.
860 */
861 if (nvec < 1)
Alexander Gordeeva06cd742014-09-23 12:45:58 -0600862 return 0;
Michael Ellerman314e77b2007-04-05 17:19:12 +1000863
Hidetoshi Seto500559a2009-08-10 10:14:15 +0900864 /*
865 * Any bridge which does NOT route MSI transactions from its
866 * secondary bus to its primary bus must set NO_MSI flag on
Brice Goglin0306ebf2006-10-05 10:24:31 +0200867 * the secondary pci_bus.
868 * We expect only arch-specific PCI host bus controller driver
869 * or quirks for specific PCI bridges to be setting NO_MSI.
870 */
Brice Goglin24334a12006-08-31 01:55:07 -0400871 for (bus = dev->bus; bus; bus = bus->parent)
872 if (bus->bus_flags & PCI_BUS_FLAGS_NO_MSI)
Alexander Gordeeva06cd742014-09-23 12:45:58 -0600873 return 0;
Brice Goglin24334a12006-08-31 01:55:07 -0400874
Alexander Gordeeva06cd742014-09-23 12:45:58 -0600875 return 1;
Brice Goglin24334a12006-08-31 01:55:07 -0400876}
877
878/**
Alexander Gordeevd1ac1d22013-12-30 08:28:13 +0100879 * pci_msi_vec_count - Return the number of MSI vectors a device can send
880 * @dev: device to report about
881 *
882 * This function returns the number of MSI vectors a device requested via
883 * Multiple Message Capable register. It returns a negative errno if the
884 * device is not capable sending MSI interrupts. Otherwise, the call succeeds
885 * and returns a power of two, up to a maximum of 2^5 (32), according to the
886 * MSI specification.
887 **/
888int pci_msi_vec_count(struct pci_dev *dev)
889{
890 int ret;
891 u16 msgctl;
892
893 if (!dev->msi_cap)
894 return -EINVAL;
895
896 pci_read_config_word(dev, dev->msi_cap + PCI_MSI_FLAGS, &msgctl);
897 ret = 1 << ((msgctl & PCI_MSI_FLAGS_QMASK) >> 1);
898
899 return ret;
900}
901EXPORT_SYMBOL(pci_msi_vec_count);
902
Matthew Wilcoxf2440d92009-03-17 08:54:09 -0400903void pci_msi_shutdown(struct pci_dev *dev)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700904{
Matthew Wilcoxf2440d92009-03-17 08:54:09 -0400905 struct msi_desc *desc;
906 u32 mask;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700907
Michael Ellerman128bc5f2007-03-22 21:51:39 +1100908 if (!pci_msi_enable || !dev || !dev->msi_enabled)
Eric W. Biedermanded86d82007-01-28 12:42:52 -0700909 return;
910
Jiang Liu5004e982015-07-09 16:00:41 +0800911 BUG_ON(list_empty(dev_to_msi_list(&dev->dev)));
Jiang Liu4a7cc832015-07-09 16:00:44 +0800912 desc = first_pci_msi_entry(dev);
Matthew Wilcox110828c2009-06-16 06:31:45 -0600913
Michael S. Tsirkin61b64ab2015-05-07 09:52:21 -0500914 pci_msi_set_enable(dev, 0);
David Millerba698ad2007-10-25 01:16:30 -0700915 pci_intx_for_msi(dev, 1);
Eric W. Biedermanb1cbf4e2007-03-05 00:30:10 -0800916 dev->msi_enabled = 0;
Eric W. Biederman7bd007e2006-10-04 02:16:31 -0700917
Hidetoshi Seto12abb8b2009-06-24 12:08:09 +0900918 /* Return the device with MSI unmasked as initial states */
Yijing Wang31ea5d42014-06-19 16:30:30 +0800919 mask = msi_mask(desc->msi_attrib.multi_cap);
Hidetoshi Seto12abb8b2009-06-24 12:08:09 +0900920 /* Keep cached state to be restored */
Thomas Gleixner23ed8d52014-11-23 11:55:58 +0100921 __pci_msi_desc_mask_irq(desc, mask, ~mask);
Michael Ellermane387b9e2007-03-22 21:51:27 +1100922
923 /* Restore dev->irq to its default pin-assertion irq */
Matthew Wilcoxf2440d92009-03-17 08:54:09 -0400924 dev->irq = desc->msi_attrib.default_irq;
Jiang Liu5f226992015-07-30 14:00:08 -0500925 pcibios_alloc_irq(dev);
Yinghai Lud52877c2008-04-23 14:58:09 -0700926}
Matthew Wilcox24d27552009-03-17 08:54:06 -0400927
Hidetoshi Seto500559a2009-08-10 10:14:15 +0900928void pci_disable_msi(struct pci_dev *dev)
Yinghai Lud52877c2008-04-23 14:58:09 -0700929{
Yinghai Lud52877c2008-04-23 14:58:09 -0700930 if (!pci_msi_enable || !dev || !dev->msi_enabled)
931 return;
932
933 pci_msi_shutdown(dev);
Hidetoshi Setof56e4482009-08-06 11:32:51 +0900934 free_msi_irqs(dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700935}
Michael Ellerman4cc086f2007-03-22 21:51:34 +1100936EXPORT_SYMBOL(pci_disable_msi);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700937
Linus Torvalds1da177e2005-04-16 15:20:36 -0700938/**
Alexander Gordeevff1aa432013-12-30 08:28:15 +0100939 * pci_msix_vec_count - return the number of device's MSI-X table entries
Rafael J. Wysockia52e2e32009-01-24 00:21:14 +0100940 * @dev: pointer to the pci_dev data structure of MSI-X device function
Alexander Gordeevff1aa432013-12-30 08:28:15 +0100941 * This function returns the number of device's MSI-X table entries and
942 * therefore the number of MSI-X vectors device is capable of sending.
943 * It returns a negative errno if the device is not capable of sending MSI-X
944 * interrupts.
945 **/
946int pci_msix_vec_count(struct pci_dev *dev)
Rafael J. Wysockia52e2e32009-01-24 00:21:14 +0100947{
Rafael J. Wysockia52e2e32009-01-24 00:21:14 +0100948 u16 control;
949
Gavin Shan520fe9d2013-04-04 16:54:33 +0000950 if (!dev->msix_cap)
Alexander Gordeevff1aa432013-12-30 08:28:15 +0100951 return -EINVAL;
Rafael J. Wysockia52e2e32009-01-24 00:21:14 +0100952
Bjorn Helgaasf84ecd22013-04-17 17:38:32 -0600953 pci_read_config_word(dev, dev->msix_cap + PCI_MSIX_FLAGS, &control);
Bjorn Helgaas527eee22013-04-17 17:44:48 -0600954 return msix_table_size(control);
Rafael J. Wysockia52e2e32009-01-24 00:21:14 +0100955}
Alexander Gordeevff1aa432013-12-30 08:28:15 +0100956EXPORT_SYMBOL(pci_msix_vec_count);
Rafael J. Wysockia52e2e32009-01-24 00:21:14 +0100957
Thomas Gleixnere75eafb2016-09-14 16:18:49 +0200958static int __pci_enable_msix(struct pci_dev *dev, struct msix_entry *entries,
959 int nvec, bool affinity)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700960{
Bjorn Helgaas5ec09402014-09-23 14:38:28 -0600961 int nr_entries;
Eric W. Biedermanded86d82007-01-28 12:42:52 -0700962 int i, j;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700963
Alexander Gordeeva06cd742014-09-23 12:45:58 -0600964 if (!pci_msi_supported(dev, nvec))
965 return -EINVAL;
Michael Ellermanc9953a72007-04-05 17:19:08 +1000966
Alexander Gordeevff1aa432013-12-30 08:28:15 +0100967 nr_entries = pci_msix_vec_count(dev);
968 if (nr_entries < 0)
969 return nr_entries;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700970 if (nvec > nr_entries)
Michael S. Tsirkin57fbf522009-05-07 11:28:41 +0300971 return nr_entries;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700972
Christoph Hellwig3ac020e2016-07-12 18:20:16 +0900973 if (entries) {
974 /* Check for any invalid entries */
975 for (i = 0; i < nvec; i++) {
976 if (entries[i].entry >= nr_entries)
977 return -EINVAL; /* invalid entry */
978 for (j = i + 1; j < nvec; j++) {
979 if (entries[i].entry == entries[j].entry)
980 return -EINVAL; /* duplicate entry */
981 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700982 }
983 }
Eric W. Biederman7bd007e2006-10-04 02:16:31 -0700984
Eric W. Biederman1ce03372006-10-04 02:16:41 -0700985 /* Check whether driver already requested for MSI irq */
Hidetoshi Seto500559a2009-08-10 10:14:15 +0900986 if (dev->msi_enabled) {
Ryan Desfosses227f0642014-04-18 20:13:50 -0400987 dev_info(&dev->dev, "can't enable MSI-X (MSI IRQ already assigned)\n");
Linus Torvalds1da177e2005-04-16 15:20:36 -0700988 return -EINVAL;
989 }
Thomas Gleixnere75eafb2016-09-14 16:18:49 +0200990 return msix_capability_init(dev, entries, nvec, affinity);
991}
992
993/**
994 * pci_enable_msix - configure device's MSI-X capability structure
995 * @dev: pointer to the pci_dev data structure of MSI-X device function
996 * @entries: pointer to an array of MSI-X entries (optional)
997 * @nvec: number of MSI-X irqs requested for allocation by device driver
998 *
999 * Setup the MSI-X capability structure of device function with the number
1000 * of requested irqs upon its software driver call to request for
1001 * MSI-X mode enabled on its hardware device function. A return of zero
1002 * indicates the successful configuration of MSI-X capability structure
1003 * with new allocated MSI-X irqs. A return of < 0 indicates a failure.
1004 * Or a return of > 0 indicates that driver request is exceeding the number
1005 * of irqs or MSI-X vectors available. Driver should use the returned value to
1006 * re-send its request.
1007 **/
1008int pci_enable_msix(struct pci_dev *dev, struct msix_entry *entries, int nvec)
1009{
1010 return __pci_enable_msix(dev, entries, nvec, false);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001011}
Michael Ellerman4cc086f2007-03-22 21:51:34 +11001012EXPORT_SYMBOL(pci_enable_msix);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001013
Hidetoshi Seto500559a2009-08-10 10:14:15 +09001014void pci_msix_shutdown(struct pci_dev *dev)
Michael Ellermanfc4afc72007-03-22 21:51:33 +11001015{
Hidetoshi Seto12abb8b2009-06-24 12:08:09 +09001016 struct msi_desc *entry;
1017
Michael Ellerman128bc5f2007-03-22 21:51:39 +11001018 if (!pci_msi_enable || !dev || !dev->msix_enabled)
Eric W. Biedermanded86d82007-01-28 12:42:52 -07001019 return;
1020
Hidetoshi Seto12abb8b2009-06-24 12:08:09 +09001021 /* Return the device with MSI-X masked as initial states */
Jiang Liu5004e982015-07-09 16:00:41 +08001022 for_each_pci_msi_entry(entry, dev) {
Hidetoshi Seto12abb8b2009-06-24 12:08:09 +09001023 /* Keep cached states to be restored */
Thomas Gleixner23ed8d52014-11-23 11:55:58 +01001024 __pci_msix_desc_mask_irq(entry, 1);
Hidetoshi Seto12abb8b2009-06-24 12:08:09 +09001025 }
1026
Michael S. Tsirkin61b64ab2015-05-07 09:52:21 -05001027 pci_msix_clear_and_set_ctrl(dev, PCI_MSIX_FLAGS_ENABLE, 0);
David Millerba698ad2007-10-25 01:16:30 -07001028 pci_intx_for_msi(dev, 1);
Eric W. Biedermanb1cbf4e2007-03-05 00:30:10 -08001029 dev->msix_enabled = 0;
Jiang Liu5f226992015-07-30 14:00:08 -05001030 pcibios_alloc_irq(dev);
Yinghai Lud52877c2008-04-23 14:58:09 -07001031}
Hidetoshi Setoc9018512009-08-06 11:31:27 +09001032
Hidetoshi Seto500559a2009-08-10 10:14:15 +09001033void pci_disable_msix(struct pci_dev *dev)
Yinghai Lud52877c2008-04-23 14:58:09 -07001034{
1035 if (!pci_msi_enable || !dev || !dev->msix_enabled)
1036 return;
1037
1038 pci_msix_shutdown(dev);
Hidetoshi Setof56e4482009-08-06 11:32:51 +09001039 free_msi_irqs(dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001040}
Michael Ellerman4cc086f2007-03-22 21:51:34 +11001041EXPORT_SYMBOL(pci_disable_msix);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001042
Matthew Wilcox309e57d2006-03-05 22:33:34 -07001043void pci_no_msi(void)
1044{
1045 pci_msi_enable = 0;
1046}
Michael Ellermanc9953a72007-04-05 17:19:08 +10001047
Andrew Patterson07ae95f2008-11-10 15:31:05 -07001048/**
1049 * pci_msi_enabled - is MSI enabled?
1050 *
1051 * Returns true if MSI has not been disabled by the command-line option
1052 * pci=nomsi.
1053 **/
1054int pci_msi_enabled(void)
1055{
1056 return pci_msi_enable;
1057}
1058EXPORT_SYMBOL(pci_msi_enabled);
1059
Christoph Hellwig4ef33682016-07-12 18:20:18 +09001060static int __pci_enable_msi_range(struct pci_dev *dev, int minvec, int maxvec,
1061 unsigned int flags)
Alexander Gordeev302a2522013-12-30 08:28:16 +01001062{
Thomas Gleixnere75eafb2016-09-14 16:18:49 +02001063 bool affinity = flags & PCI_IRQ_AFFINITY;
Alexander Gordeev034cd972014-04-14 15:28:35 +02001064 int nvec;
Alexander Gordeev302a2522013-12-30 08:28:16 +01001065 int rc;
1066
Alexander Gordeeva06cd742014-09-23 12:45:58 -06001067 if (!pci_msi_supported(dev, minvec))
1068 return -EINVAL;
Alexander Gordeev034cd972014-04-14 15:28:35 +02001069
Alexander Gordeev034cd972014-04-14 15:28:35 +02001070 /* Check whether driver already requested MSI-X irqs */
1071 if (dev->msix_enabled) {
1072 dev_info(&dev->dev,
1073 "can't enable MSI (MSI-X already enabled)\n");
1074 return -EINVAL;
1075 }
1076
Alexander Gordeev302a2522013-12-30 08:28:16 +01001077 if (maxvec < minvec)
1078 return -ERANGE;
1079
Tonghao Zhanga84331382018-09-24 07:00:41 -07001080 if (WARN_ON_ONCE(dev->msi_enabled))
1081 return -EINVAL;
1082
Alexander Gordeev034cd972014-04-14 15:28:35 +02001083 nvec = pci_msi_vec_count(dev);
1084 if (nvec < 0)
1085 return nvec;
Christoph Hellwig4ef33682016-07-12 18:20:18 +09001086 if (nvec < minvec)
Alexander Gordeev034cd972014-04-14 15:28:35 +02001087 return -EINVAL;
Christoph Hellwig4ef33682016-07-12 18:20:18 +09001088
1089 if (nvec > maxvec)
Alexander Gordeev034cd972014-04-14 15:28:35 +02001090 nvec = maxvec;
1091
Christoph Hellwig4ef33682016-07-12 18:20:18 +09001092 for (;;) {
Thomas Gleixnere75eafb2016-09-14 16:18:49 +02001093 if (affinity) {
1094 nvec = irq_calc_affinity_vectors(dev->irq_affinity,
1095 nvec);
Christoph Hellwig4ef33682016-07-12 18:20:18 +09001096 if (nvec < minvec)
Alexander Gordeev302a2522013-12-30 08:28:16 +01001097 return -ENOSPC;
Alexander Gordeev302a2522013-12-30 08:28:16 +01001098 }
Alexander Gordeev302a2522013-12-30 08:28:16 +01001099
Thomas Gleixnere75eafb2016-09-14 16:18:49 +02001100 rc = msi_capability_init(dev, nvec, affinity);
Christoph Hellwig4ef33682016-07-12 18:20:18 +09001101 if (rc == 0)
1102 return nvec;
1103
Christoph Hellwig4ef33682016-07-12 18:20:18 +09001104 if (rc < 0)
1105 return rc;
1106 if (rc < minvec)
1107 return -ENOSPC;
1108
1109 nvec = rc;
1110 }
1111}
1112
1113/**
1114 * pci_enable_msi_range - configure device's MSI capability structure
1115 * @dev: device to configure
1116 * @minvec: minimal number of interrupts to configure
1117 * @maxvec: maximum number of interrupts to configure
1118 *
1119 * This function tries to allocate a maximum possible number of interrupts in a
1120 * range between @minvec and @maxvec. It returns a negative errno if an error
1121 * occurs. If it succeeds, it returns the actual number of interrupts allocated
1122 * and updates the @dev's irq member to the lowest new interrupt number;
1123 * the other interrupt numbers allocated to this device are consecutive.
1124 **/
1125int pci_enable_msi_range(struct pci_dev *dev, int minvec, int maxvec)
1126{
Christoph Hellwig4fe0d152016-08-11 07:11:04 -07001127 return __pci_enable_msi_range(dev, minvec, maxvec, 0);
Alexander Gordeev302a2522013-12-30 08:28:16 +01001128}
1129EXPORT_SYMBOL(pci_enable_msi_range);
1130
Christoph Hellwig4ef33682016-07-12 18:20:18 +09001131static int __pci_enable_msix_range(struct pci_dev *dev,
1132 struct msix_entry *entries, int minvec, int maxvec,
1133 unsigned int flags)
1134{
Thomas Gleixnere75eafb2016-09-14 16:18:49 +02001135 bool affinity = flags & PCI_IRQ_AFFINITY;
1136 int rc, nvec = maxvec;
Christoph Hellwig4ef33682016-07-12 18:20:18 +09001137
1138 if (maxvec < minvec)
1139 return -ERANGE;
1140
Tonghao Zhanga84331382018-09-24 07:00:41 -07001141 if (WARN_ON_ONCE(dev->msix_enabled))
1142 return -EINVAL;
1143
Christoph Hellwig4ef33682016-07-12 18:20:18 +09001144 for (;;) {
Thomas Gleixnere75eafb2016-09-14 16:18:49 +02001145 if (affinity) {
1146 nvec = irq_calc_affinity_vectors(dev->irq_affinity,
1147 nvec);
Christoph Hellwig4ef33682016-07-12 18:20:18 +09001148 if (nvec < minvec)
1149 return -ENOSPC;
1150 }
1151
Thomas Gleixnere75eafb2016-09-14 16:18:49 +02001152 rc = __pci_enable_msix(dev, entries, nvec, affinity);
Christoph Hellwig4ef33682016-07-12 18:20:18 +09001153 if (rc == 0)
1154 return nvec;
1155
Christoph Hellwig4ef33682016-07-12 18:20:18 +09001156 if (rc < 0)
1157 return rc;
1158 if (rc < minvec)
1159 return -ENOSPC;
1160
1161 nvec = rc;
1162 }
1163}
1164
Alexander Gordeev302a2522013-12-30 08:28:16 +01001165/**
1166 * pci_enable_msix_range - configure device's MSI-X capability structure
1167 * @dev: pointer to the pci_dev data structure of MSI-X device function
1168 * @entries: pointer to an array of MSI-X entries
1169 * @minvec: minimum number of MSI-X irqs requested
1170 * @maxvec: maximum number of MSI-X irqs requested
1171 *
1172 * Setup the MSI-X capability structure of device function with a maximum
1173 * possible number of interrupts in the range between @minvec and @maxvec
1174 * upon its software driver call to request for MSI-X mode enabled on its
1175 * hardware device function. It returns a negative errno if an error occurs.
1176 * If it succeeds, it returns the actual number of interrupts allocated and
1177 * indicates the successful configuration of MSI-X capability structure
1178 * with new allocated MSI-X interrupts.
1179 **/
1180int pci_enable_msix_range(struct pci_dev *dev, struct msix_entry *entries,
Christoph Hellwig4ef33682016-07-12 18:20:18 +09001181 int minvec, int maxvec)
Alexander Gordeev302a2522013-12-30 08:28:16 +01001182{
Christoph Hellwig4fe0d152016-08-11 07:11:04 -07001183 return __pci_enable_msix_range(dev, entries, minvec, maxvec, 0);
Alexander Gordeev302a2522013-12-30 08:28:16 +01001184}
1185EXPORT_SYMBOL(pci_enable_msix_range);
Jiang Liu3878eae2014-11-11 21:02:18 +08001186
Christoph Hellwigaff17162016-07-12 18:20:17 +09001187/**
1188 * pci_alloc_irq_vectors - allocate multiple IRQs for a device
1189 * @dev: PCI device to operate on
1190 * @min_vecs: minimum number of vectors required (must be >= 1)
1191 * @max_vecs: maximum (desired) number of vectors
1192 * @flags: flags or quirks for the allocation
1193 *
1194 * Allocate up to @max_vecs interrupt vectors for @dev, using MSI-X or MSI
1195 * vectors if available, and fall back to a single legacy vector
1196 * if neither is available. Return the number of vectors allocated,
1197 * (which might be smaller than @max_vecs) if successful, or a negative
1198 * error code on error. If less than @min_vecs interrupt vectors are
1199 * available for @dev the function will fail with -ENOSPC.
1200 *
1201 * To get the Linux IRQ number used for a vector that can be passed to
1202 * request_irq() use the pci_irq_vector() helper.
1203 */
1204int pci_alloc_irq_vectors(struct pci_dev *dev, unsigned int min_vecs,
1205 unsigned int max_vecs, unsigned int flags)
1206{
1207 int vecs = -ENOSPC;
1208
Christoph Hellwig4fe0d152016-08-11 07:11:04 -07001209 if (flags & PCI_IRQ_MSIX) {
Christoph Hellwig4ef33682016-07-12 18:20:18 +09001210 vecs = __pci_enable_msix_range(dev, NULL, min_vecs, max_vecs,
1211 flags);
Christoph Hellwigaff17162016-07-12 18:20:17 +09001212 if (vecs > 0)
1213 return vecs;
1214 }
1215
Christoph Hellwig4fe0d152016-08-11 07:11:04 -07001216 if (flags & PCI_IRQ_MSI) {
Christoph Hellwig4ef33682016-07-12 18:20:18 +09001217 vecs = __pci_enable_msi_range(dev, min_vecs, max_vecs, flags);
Christoph Hellwigaff17162016-07-12 18:20:17 +09001218 if (vecs > 0)
1219 return vecs;
1220 }
1221
1222 /* use legacy irq if allowed */
Christoph Hellwig5d0bdf22016-08-11 07:11:05 -07001223 if ((flags & PCI_IRQ_LEGACY) && min_vecs == 1) {
1224 pci_intx(dev, 1);
Christoph Hellwigaff17162016-07-12 18:20:17 +09001225 return 1;
Christoph Hellwig5d0bdf22016-08-11 07:11:05 -07001226 }
1227
Christoph Hellwigaff17162016-07-12 18:20:17 +09001228 return vecs;
1229}
1230EXPORT_SYMBOL(pci_alloc_irq_vectors);
1231
1232/**
1233 * pci_free_irq_vectors - free previously allocated IRQs for a device
1234 * @dev: PCI device to operate on
1235 *
1236 * Undoes the allocations and enabling in pci_alloc_irq_vectors().
1237 */
1238void pci_free_irq_vectors(struct pci_dev *dev)
1239{
1240 pci_disable_msix(dev);
1241 pci_disable_msi(dev);
1242}
1243EXPORT_SYMBOL(pci_free_irq_vectors);
1244
1245/**
1246 * pci_irq_vector - return Linux IRQ number of a device vector
1247 * @dev: PCI device to operate on
1248 * @nr: device-relative interrupt vector index (0-based).
1249 */
1250int pci_irq_vector(struct pci_dev *dev, unsigned int nr)
1251{
1252 if (dev->msix_enabled) {
1253 struct msi_desc *entry;
1254 int i = 0;
1255
1256 for_each_pci_msi_entry(entry, dev) {
1257 if (i == nr)
1258 return entry->irq;
1259 i++;
1260 }
1261 WARN_ON_ONCE(1);
1262 return -EINVAL;
1263 }
1264
1265 if (dev->msi_enabled) {
1266 struct msi_desc *entry = first_pci_msi_entry(dev);
1267
1268 if (WARN_ON_ONCE(nr >= entry->nvec_used))
1269 return -EINVAL;
1270 } else {
1271 if (WARN_ON_ONCE(nr > 0))
1272 return -EINVAL;
1273 }
1274
1275 return dev->irq + nr;
1276}
1277EXPORT_SYMBOL(pci_irq_vector);
1278
Thomas Gleixneree8d41e2016-09-14 16:18:51 +02001279/**
1280 * pci_irq_get_affinity - return the affinity of a particular msi vector
1281 * @dev: PCI device to operate on
1282 * @nr: device-relative interrupt vector index (0-based).
1283 */
1284const struct cpumask *pci_irq_get_affinity(struct pci_dev *dev, int nr)
1285{
1286 if (dev->msix_enabled) {
1287 struct msi_desc *entry;
1288 int i = 0;
1289
1290 for_each_pci_msi_entry(entry, dev) {
1291 if (i == nr)
1292 return entry->affinity;
1293 i++;
1294 }
1295 WARN_ON_ONCE(1);
1296 return NULL;
1297 } else if (dev->msi_enabled) {
1298 struct msi_desc *entry = first_pci_msi_entry(dev);
1299
Jan Beulich5cbea792016-11-08 00:43:54 -07001300 if (WARN_ON_ONCE(!entry || !entry->affinity ||
1301 nr >= entry->nvec_used))
Thomas Gleixneree8d41e2016-09-14 16:18:51 +02001302 return NULL;
1303
1304 return &entry->affinity[nr];
1305 } else {
1306 return cpu_possible_mask;
1307 }
1308}
1309EXPORT_SYMBOL(pci_irq_get_affinity);
1310
Jiang Liu25a98bd2015-07-09 16:00:45 +08001311struct pci_dev *msi_desc_to_pci_dev(struct msi_desc *desc)
1312{
1313 return to_pci_dev(desc->dev);
1314}
Jake Oshinsa4289dc2015-12-10 17:52:59 +00001315EXPORT_SYMBOL(msi_desc_to_pci_dev);
Jiang Liu25a98bd2015-07-09 16:00:45 +08001316
Jiang Liuc179c9b2015-07-09 16:00:36 +08001317void *msi_desc_to_pci_sysdata(struct msi_desc *desc)
1318{
1319 struct pci_dev *dev = msi_desc_to_pci_dev(desc);
1320
1321 return dev->bus->sysdata;
1322}
1323EXPORT_SYMBOL_GPL(msi_desc_to_pci_sysdata);
1324
Jiang Liu3878eae2014-11-11 21:02:18 +08001325#ifdef CONFIG_PCI_MSI_IRQ_DOMAIN
1326/**
1327 * pci_msi_domain_write_msg - Helper to write MSI message to PCI config space
1328 * @irq_data: Pointer to interrupt data of the MSI interrupt
1329 * @msg: Pointer to the message
1330 */
1331void pci_msi_domain_write_msg(struct irq_data *irq_data, struct msi_msg *msg)
1332{
Jiang Liu507a8832015-06-01 16:05:42 +08001333 struct msi_desc *desc = irq_data_get_msi_desc(irq_data);
Jiang Liu3878eae2014-11-11 21:02:18 +08001334
1335 /*
1336 * For MSI-X desc->irq is always equal to irq_data->irq. For
1337 * MSI only the first interrupt of MULTI MSI passes the test.
1338 */
1339 if (desc->irq == irq_data->irq)
1340 __pci_write_msi_msg(desc, msg);
1341}
1342
1343/**
1344 * pci_msi_domain_calc_hwirq - Generate a unique ID for an MSI source
1345 * @dev: Pointer to the PCI device
1346 * @desc: Pointer to the msi descriptor
1347 *
1348 * The ID number is only used within the irqdomain.
1349 */
1350irq_hw_number_t pci_msi_domain_calc_hwirq(struct pci_dev *dev,
1351 struct msi_desc *desc)
1352{
1353 return (irq_hw_number_t)desc->msi_attrib.entry_nr |
1354 PCI_DEVID(dev->bus->number, dev->devfn) << 11 |
1355 (pci_domain_nr(dev->bus) & 0xFFFFFFFF) << 27;
1356}
1357
1358static inline bool pci_msi_desc_is_multi_msi(struct msi_desc *desc)
1359{
1360 return !desc->msi_attrib.is_msix && desc->nvec_used > 1;
1361}
1362
1363/**
1364 * pci_msi_domain_check_cap - Verify that @domain supports the capabilities for @dev
1365 * @domain: The interrupt domain to check
1366 * @info: The domain info for verification
1367 * @dev: The device to check
1368 *
1369 * Returns:
1370 * 0 if the functionality is supported
1371 * 1 if Multi MSI is requested, but the domain does not support it
1372 * -ENOTSUPP otherwise
1373 */
1374int pci_msi_domain_check_cap(struct irq_domain *domain,
1375 struct msi_domain_info *info, struct device *dev)
1376{
1377 struct msi_desc *desc = first_pci_msi_entry(to_pci_dev(dev));
1378
1379 /* Special handling to support pci_enable_msi_range() */
1380 if (pci_msi_desc_is_multi_msi(desc) &&
1381 !(info->flags & MSI_FLAG_MULTI_PCI_MSI))
1382 return 1;
1383 else if (desc->msi_attrib.is_msix && !(info->flags & MSI_FLAG_PCI_MSIX))
1384 return -ENOTSUPP;
1385
1386 return 0;
1387}
1388
1389static int pci_msi_domain_handle_error(struct irq_domain *domain,
1390 struct msi_desc *desc, int error)
1391{
1392 /* Special handling to support pci_enable_msi_range() */
1393 if (pci_msi_desc_is_multi_msi(desc) && error == -ENOSPC)
1394 return 1;
1395
1396 return error;
1397}
1398
1399#ifdef GENERIC_MSI_DOMAIN_OPS
1400static void pci_msi_domain_set_desc(msi_alloc_info_t *arg,
1401 struct msi_desc *desc)
1402{
1403 arg->desc = desc;
1404 arg->hwirq = pci_msi_domain_calc_hwirq(msi_desc_to_pci_dev(desc),
1405 desc);
1406}
1407#else
1408#define pci_msi_domain_set_desc NULL
1409#endif
1410
1411static struct msi_domain_ops pci_msi_domain_ops_default = {
1412 .set_desc = pci_msi_domain_set_desc,
1413 .msi_check = pci_msi_domain_check_cap,
1414 .handle_error = pci_msi_domain_handle_error,
1415};
1416
1417static void pci_msi_domain_update_dom_ops(struct msi_domain_info *info)
1418{
1419 struct msi_domain_ops *ops = info->ops;
1420
1421 if (ops == NULL) {
1422 info->ops = &pci_msi_domain_ops_default;
1423 } else {
1424 if (ops->set_desc == NULL)
1425 ops->set_desc = pci_msi_domain_set_desc;
1426 if (ops->msi_check == NULL)
1427 ops->msi_check = pci_msi_domain_check_cap;
1428 if (ops->handle_error == NULL)
1429 ops->handle_error = pci_msi_domain_handle_error;
1430 }
1431}
1432
1433static void pci_msi_domain_update_chip_ops(struct msi_domain_info *info)
1434{
1435 struct irq_chip *chip = info->chip;
1436
1437 BUG_ON(!chip);
1438 if (!chip->irq_write_msi_msg)
1439 chip->irq_write_msi_msg = pci_msi_domain_write_msg;
Marc Zyngier0701c532015-10-13 19:14:45 +01001440 if (!chip->irq_mask)
1441 chip->irq_mask = pci_msi_mask_irq;
1442 if (!chip->irq_unmask)
1443 chip->irq_unmask = pci_msi_unmask_irq;
Jiang Liu3878eae2014-11-11 21:02:18 +08001444}
1445
1446/**
Marc Zyngierbe5436c2015-10-13 12:51:44 +01001447 * pci_msi_create_irq_domain - Create a MSI interrupt domain
1448 * @fwnode: Optional fwnode of the interrupt controller
Jiang Liu3878eae2014-11-11 21:02:18 +08001449 * @info: MSI domain info
1450 * @parent: Parent irq domain
1451 *
1452 * Updates the domain and chip ops and creates a MSI interrupt domain.
1453 *
1454 * Returns:
1455 * A domain pointer or NULL in case of failure.
1456 */
Marc Zyngierbe5436c2015-10-13 12:51:44 +01001457struct irq_domain *pci_msi_create_irq_domain(struct fwnode_handle *fwnode,
Jiang Liu3878eae2014-11-11 21:02:18 +08001458 struct msi_domain_info *info,
1459 struct irq_domain *parent)
1460{
Marc Zyngier03808392015-07-28 14:46:09 +01001461 struct irq_domain *domain;
1462
Jiang Liu3878eae2014-11-11 21:02:18 +08001463 if (info->flags & MSI_FLAG_USE_DEF_DOM_OPS)
1464 pci_msi_domain_update_dom_ops(info);
1465 if (info->flags & MSI_FLAG_USE_DEF_CHIP_OPS)
1466 pci_msi_domain_update_chip_ops(info);
1467
Marc Zyngierf3b09462016-07-13 17:18:33 +01001468 info->flags |= MSI_FLAG_ACTIVATE_EARLY;
1469
Marc Zyngierbe5436c2015-10-13 12:51:44 +01001470 domain = msi_create_irq_domain(fwnode, info, parent);
Marc Zyngier03808392015-07-28 14:46:09 +01001471 if (!domain)
1472 return NULL;
1473
1474 domain->bus_token = DOMAIN_BUS_PCI_MSI;
1475 return domain;
Jiang Liu3878eae2014-11-11 21:02:18 +08001476}
Jake Oshinsa4289dc2015-12-10 17:52:59 +00001477EXPORT_SYMBOL_GPL(pci_msi_create_irq_domain);
Jiang Liu3878eae2014-11-11 21:02:18 +08001478
1479/**
1480 * pci_msi_domain_alloc_irqs - Allocate interrupts for @dev in @domain
1481 * @domain: The interrupt domain to allocate from
1482 * @dev: The device for which to allocate
1483 * @nvec: The number of interrupts to allocate
1484 * @type: Unused to allow simpler migration from the arch_XXX interfaces
1485 *
1486 * Returns:
1487 * A virtual interrupt number or an error code in case of failure
1488 */
1489int pci_msi_domain_alloc_irqs(struct irq_domain *domain, struct pci_dev *dev,
1490 int nvec, int type)
1491{
1492 return msi_domain_alloc_irqs(domain, &dev->dev, nvec);
1493}
1494
1495/**
1496 * pci_msi_domain_free_irqs - Free interrupts for @dev in @domain
1497 * @domain: The interrupt domain
1498 * @dev: The device for which to free interrupts
1499 */
1500void pci_msi_domain_free_irqs(struct irq_domain *domain, struct pci_dev *dev)
1501{
1502 msi_domain_free_irqs(domain, &dev->dev);
1503}
Jiang Liu8e047ad2014-11-15 22:24:07 +08001504
1505/**
1506 * pci_msi_create_default_irq_domain - Create a default MSI interrupt domain
Marc Zyngierbe5436c2015-10-13 12:51:44 +01001507 * @fwnode: Optional fwnode of the interrupt controller
Jiang Liu8e047ad2014-11-15 22:24:07 +08001508 * @info: MSI domain info
1509 * @parent: Parent irq domain
1510 *
1511 * Returns: A domain pointer or NULL in case of failure. If successful
1512 * the default PCI/MSI irqdomain pointer is updated.
1513 */
Marc Zyngierbe5436c2015-10-13 12:51:44 +01001514struct irq_domain *pci_msi_create_default_irq_domain(struct fwnode_handle *fwnode,
Jiang Liu8e047ad2014-11-15 22:24:07 +08001515 struct msi_domain_info *info, struct irq_domain *parent)
1516{
1517 struct irq_domain *domain;
1518
1519 mutex_lock(&pci_msi_domain_lock);
1520 if (pci_msi_default_domain) {
1521 pr_err("PCI: default irq domain for PCI MSI has already been created.\n");
1522 domain = NULL;
1523 } else {
Marc Zyngierbe5436c2015-10-13 12:51:44 +01001524 domain = pci_msi_create_irq_domain(fwnode, info, parent);
Jiang Liu8e047ad2014-11-15 22:24:07 +08001525 pci_msi_default_domain = domain;
1526 }
1527 mutex_unlock(&pci_msi_domain_lock);
1528
1529 return domain;
1530}
David Daneyb6eec9b2015-10-08 15:10:49 -07001531
1532static int get_msi_id_cb(struct pci_dev *pdev, u16 alias, void *data)
1533{
1534 u32 *pa = data;
1535
1536 *pa = alias;
1537 return 0;
1538}
1539/**
1540 * pci_msi_domain_get_msi_rid - Get the MSI requester id (RID)
1541 * @domain: The interrupt domain
1542 * @pdev: The PCI device.
1543 *
1544 * The RID for a device is formed from the alias, with a firmware
1545 * supplied mapping applied
1546 *
1547 * Returns: The RID.
1548 */
1549u32 pci_msi_domain_get_msi_rid(struct irq_domain *domain, struct pci_dev *pdev)
1550{
1551 struct device_node *of_node;
1552 u32 rid = 0;
1553
1554 pci_for_each_dma_alias(pdev, get_msi_id_cb, &rid);
1555
1556 of_node = irq_domain_get_of_node(domain);
Tomasz Nowickibe2021b2016-09-12 20:32:22 +02001557 rid = of_node ? of_msi_map_rid(&pdev->dev, of_node, rid) :
1558 iort_msi_map_rid(&pdev->dev, rid);
David Daneyb6eec9b2015-10-08 15:10:49 -07001559
1560 return rid;
1561}
Marc Zyngier54fa97e2015-10-02 14:43:06 +01001562
1563/**
1564 * pci_msi_get_device_domain - Get the MSI domain for a given PCI device
1565 * @pdev: The PCI device
1566 *
1567 * Use the firmware data to find a device-specific MSI domain
1568 * (i.e. not one that is ste as a default).
1569 *
1570 * Returns: The coresponding MSI domain or NULL if none has been found.
1571 */
1572struct irq_domain *pci_msi_get_device_domain(struct pci_dev *pdev)
1573{
Tomasz Nowickibe2021b2016-09-12 20:32:22 +02001574 struct irq_domain *dom;
Marc Zyngier54fa97e2015-10-02 14:43:06 +01001575 u32 rid = 0;
1576
1577 pci_for_each_dma_alias(pdev, get_msi_id_cb, &rid);
Tomasz Nowickibe2021b2016-09-12 20:32:22 +02001578 dom = of_msi_map_get_device_domain(&pdev->dev, rid);
1579 if (!dom)
1580 dom = iort_get_device_domain(&pdev->dev, rid);
1581 return dom;
Marc Zyngier54fa97e2015-10-02 14:43:06 +01001582}
Jiang Liu3878eae2014-11-11 21:02:18 +08001583#endif /* CONFIG_PCI_MSI_IRQ_DOMAIN */