Emilio López | e874a66 | 2013-02-25 11:44:26 -0300 | [diff] [blame] | 1 | /* |
| 2 | * Copyright 2013 Emilio López |
| 3 | * |
| 4 | * Emilio López <emilio@elopez.com.ar> |
| 5 | * |
| 6 | * This program is free software; you can redistribute it and/or modify |
| 7 | * it under the terms of the GNU General Public License as published by |
| 8 | * the Free Software Foundation; either version 2 of the License, or |
| 9 | * (at your option) any later version. |
| 10 | * |
| 11 | * This program is distributed in the hope that it will be useful, |
| 12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 14 | * GNU General Public License for more details. |
| 15 | */ |
| 16 | |
| 17 | #include <linux/clk-provider.h> |
| 18 | #include <linux/clkdev.h> |
Emilio López | e874a66 | 2013-02-25 11:44:26 -0300 | [diff] [blame] | 19 | #include <linux/of.h> |
| 20 | #include <linux/of_address.h> |
Hans de Goede | cfb0086 | 2014-02-07 16:21:49 +0100 | [diff] [blame] | 21 | #include <linux/reset-controller.h> |
Maxime Ripard | 601da9d | 2014-07-04 22:24:52 +0200 | [diff] [blame] | 22 | #include <linux/spinlock.h> |
Emilio López | e874a66 | 2013-02-25 11:44:26 -0300 | [diff] [blame] | 23 | |
| 24 | #include "clk-factors.h" |
| 25 | |
| 26 | static DEFINE_SPINLOCK(clk_lock); |
| 27 | |
Emilio López | 40a5dcb | 2013-12-23 00:32:32 -0300 | [diff] [blame] | 28 | /* Maximum number of parents our clocks have */ |
| 29 | #define SUNXI_MAX_PARENTS 5 |
| 30 | |
Emilio López | e874a66 | 2013-02-25 11:44:26 -0300 | [diff] [blame] | 31 | /** |
Maxime Ripard | 81ba6c5 | 2013-07-22 18:21:32 +0200 | [diff] [blame] | 32 | * sun4i_get_pll1_factors() - calculates n, k, m, p factors for PLL1 |
Emilio López | e874a66 | 2013-02-25 11:44:26 -0300 | [diff] [blame] | 33 | * PLL1 rate is calculated as follows |
| 34 | * rate = (parent_rate * n * (k + 1) >> p) / (m + 1); |
| 35 | * parent_rate is always 24Mhz |
| 36 | */ |
| 37 | |
Maxime Ripard | 81ba6c5 | 2013-07-22 18:21:32 +0200 | [diff] [blame] | 38 | static void sun4i_get_pll1_factors(u32 *freq, u32 parent_rate, |
Emilio López | e874a66 | 2013-02-25 11:44:26 -0300 | [diff] [blame] | 39 | u8 *n, u8 *k, u8 *m, u8 *p) |
| 40 | { |
| 41 | u8 div; |
| 42 | |
| 43 | /* Normalize value to a 6M multiple */ |
| 44 | div = *freq / 6000000; |
| 45 | *freq = 6000000 * div; |
| 46 | |
| 47 | /* we were called to round the frequency, we can now return */ |
| 48 | if (n == NULL) |
| 49 | return; |
| 50 | |
| 51 | /* m is always zero for pll1 */ |
| 52 | *m = 0; |
| 53 | |
| 54 | /* k is 1 only on these cases */ |
| 55 | if (*freq >= 768000000 || *freq == 42000000 || *freq == 54000000) |
| 56 | *k = 1; |
| 57 | else |
| 58 | *k = 0; |
| 59 | |
| 60 | /* p will be 3 for divs under 10 */ |
| 61 | if (div < 10) |
| 62 | *p = 3; |
| 63 | |
| 64 | /* p will be 2 for divs between 10 - 20 and odd divs under 32 */ |
| 65 | else if (div < 20 || (div < 32 && (div & 1))) |
| 66 | *p = 2; |
| 67 | |
| 68 | /* p will be 1 for even divs under 32, divs under 40 and odd pairs |
| 69 | * of divs between 40-62 */ |
| 70 | else if (div < 40 || (div < 64 && (div & 2))) |
| 71 | *p = 1; |
| 72 | |
| 73 | /* any other entries have p = 0 */ |
| 74 | else |
| 75 | *p = 0; |
| 76 | |
| 77 | /* calculate a suitable n based on k and p */ |
| 78 | div <<= *p; |
| 79 | div /= (*k + 1); |
| 80 | *n = div / 4; |
| 81 | } |
| 82 | |
Maxime Ripard | 6a721db | 2013-07-23 23:34:10 +0200 | [diff] [blame] | 83 | /** |
| 84 | * sun6i_a31_get_pll1_factors() - calculates n, k and m factors for PLL1 |
| 85 | * PLL1 rate is calculated as follows |
| 86 | * rate = parent_rate * (n + 1) * (k + 1) / (m + 1); |
| 87 | * parent_rate should always be 24MHz |
| 88 | */ |
| 89 | static void sun6i_a31_get_pll1_factors(u32 *freq, u32 parent_rate, |
| 90 | u8 *n, u8 *k, u8 *m, u8 *p) |
| 91 | { |
| 92 | /* |
| 93 | * We can operate only on MHz, this will make our life easier |
| 94 | * later. |
| 95 | */ |
| 96 | u32 freq_mhz = *freq / 1000000; |
| 97 | u32 parent_freq_mhz = parent_rate / 1000000; |
Emilio López | e874a66 | 2013-02-25 11:44:26 -0300 | [diff] [blame] | 98 | |
Maxime Ripard | 6a721db | 2013-07-23 23:34:10 +0200 | [diff] [blame] | 99 | /* |
| 100 | * Round down the frequency to the closest multiple of either |
| 101 | * 6 or 16 |
| 102 | */ |
| 103 | u32 round_freq_6 = round_down(freq_mhz, 6); |
| 104 | u32 round_freq_16 = round_down(freq_mhz, 16); |
| 105 | |
| 106 | if (round_freq_6 > round_freq_16) |
| 107 | freq_mhz = round_freq_6; |
| 108 | else |
| 109 | freq_mhz = round_freq_16; |
| 110 | |
| 111 | *freq = freq_mhz * 1000000; |
| 112 | |
| 113 | /* |
| 114 | * If the factors pointer are null, we were just called to |
| 115 | * round down the frequency. |
| 116 | * Exit. |
| 117 | */ |
| 118 | if (n == NULL) |
| 119 | return; |
| 120 | |
| 121 | /* If the frequency is a multiple of 32 MHz, k is always 3 */ |
| 122 | if (!(freq_mhz % 32)) |
| 123 | *k = 3; |
| 124 | /* If the frequency is a multiple of 9 MHz, k is always 2 */ |
| 125 | else if (!(freq_mhz % 9)) |
| 126 | *k = 2; |
| 127 | /* If the frequency is a multiple of 8 MHz, k is always 1 */ |
| 128 | else if (!(freq_mhz % 8)) |
| 129 | *k = 1; |
| 130 | /* Otherwise, we don't use the k factor */ |
| 131 | else |
| 132 | *k = 0; |
| 133 | |
| 134 | /* |
| 135 | * If the frequency is a multiple of 2 but not a multiple of |
| 136 | * 3, m is 3. This is the first time we use 6 here, yet we |
| 137 | * will use it on several other places. |
| 138 | * We use this number because it's the lowest frequency we can |
| 139 | * generate (with n = 0, k = 0, m = 3), so every other frequency |
| 140 | * somehow relates to this frequency. |
| 141 | */ |
| 142 | if ((freq_mhz % 6) == 2 || (freq_mhz % 6) == 4) |
| 143 | *m = 2; |
| 144 | /* |
| 145 | * If the frequency is a multiple of 6MHz, but the factor is |
| 146 | * odd, m will be 3 |
| 147 | */ |
| 148 | else if ((freq_mhz / 6) & 1) |
| 149 | *m = 3; |
| 150 | /* Otherwise, we end up with m = 1 */ |
| 151 | else |
| 152 | *m = 1; |
| 153 | |
| 154 | /* Calculate n thanks to the above factors we already got */ |
| 155 | *n = freq_mhz * (*m + 1) / ((*k + 1) * parent_freq_mhz) - 1; |
| 156 | |
| 157 | /* |
| 158 | * If n end up being outbound, and that we can still decrease |
| 159 | * m, do it. |
| 160 | */ |
| 161 | if ((*n + 1) > 31 && (*m + 1) > 1) { |
| 162 | *n = (*n + 1) / 2 - 1; |
| 163 | *m = (*m + 1) / 2 - 1; |
| 164 | } |
| 165 | } |
Emilio López | e874a66 | 2013-02-25 11:44:26 -0300 | [diff] [blame] | 166 | |
| 167 | /** |
Chen-Yu Tsai | 515c1a4 | 2014-06-26 23:55:43 +0800 | [diff] [blame] | 168 | * sun8i_a23_get_pll1_factors() - calculates n, k, m, p factors for PLL1 |
| 169 | * PLL1 rate is calculated as follows |
| 170 | * rate = (parent_rate * (n + 1) * (k + 1) >> p) / (m + 1); |
| 171 | * parent_rate is always 24Mhz |
| 172 | */ |
| 173 | |
| 174 | static void sun8i_a23_get_pll1_factors(u32 *freq, u32 parent_rate, |
| 175 | u8 *n, u8 *k, u8 *m, u8 *p) |
| 176 | { |
| 177 | u8 div; |
| 178 | |
| 179 | /* Normalize value to a 6M multiple */ |
| 180 | div = *freq / 6000000; |
| 181 | *freq = 6000000 * div; |
| 182 | |
| 183 | /* we were called to round the frequency, we can now return */ |
| 184 | if (n == NULL) |
| 185 | return; |
| 186 | |
| 187 | /* m is always zero for pll1 */ |
| 188 | *m = 0; |
| 189 | |
| 190 | /* k is 1 only on these cases */ |
| 191 | if (*freq >= 768000000 || *freq == 42000000 || *freq == 54000000) |
| 192 | *k = 1; |
| 193 | else |
| 194 | *k = 0; |
| 195 | |
| 196 | /* p will be 2 for divs under 20 and odd divs under 32 */ |
| 197 | if (div < 20 || (div < 32 && (div & 1))) |
| 198 | *p = 2; |
| 199 | |
| 200 | /* p will be 1 for even divs under 32, divs under 40 and odd pairs |
| 201 | * of divs between 40-62 */ |
| 202 | else if (div < 40 || (div < 64 && (div & 2))) |
| 203 | *p = 1; |
| 204 | |
| 205 | /* any other entries have p = 0 */ |
| 206 | else |
| 207 | *p = 0; |
| 208 | |
| 209 | /* calculate a suitable n based on k and p */ |
| 210 | div <<= *p; |
| 211 | div /= (*k + 1); |
| 212 | *n = div / 4 - 1; |
| 213 | } |
| 214 | |
| 215 | /** |
Emilio López | d584c13 | 2013-12-23 00:32:37 -0300 | [diff] [blame] | 216 | * sun4i_get_pll5_factors() - calculates n, k factors for PLL5 |
| 217 | * PLL5 rate is calculated as follows |
| 218 | * rate = parent_rate * n * (k + 1) |
| 219 | * parent_rate is always 24Mhz |
| 220 | */ |
| 221 | |
| 222 | static void sun4i_get_pll5_factors(u32 *freq, u32 parent_rate, |
| 223 | u8 *n, u8 *k, u8 *m, u8 *p) |
| 224 | { |
| 225 | u8 div; |
| 226 | |
| 227 | /* Normalize value to a parent_rate multiple (24M) */ |
| 228 | div = *freq / parent_rate; |
| 229 | *freq = parent_rate * div; |
| 230 | |
| 231 | /* we were called to round the frequency, we can now return */ |
| 232 | if (n == NULL) |
| 233 | return; |
| 234 | |
| 235 | if (div < 31) |
| 236 | *k = 0; |
| 237 | else if (div / 2 < 31) |
| 238 | *k = 1; |
| 239 | else if (div / 3 < 31) |
| 240 | *k = 2; |
| 241 | else |
| 242 | *k = 3; |
| 243 | |
| 244 | *n = DIV_ROUND_UP(div, (*k+1)); |
| 245 | } |
| 246 | |
Maxime Ripard | 92ef67c | 2014-02-05 14:05:03 +0100 | [diff] [blame] | 247 | /** |
| 248 | * sun6i_a31_get_pll6_factors() - calculates n, k factors for A31 PLL6 |
| 249 | * PLL6 rate is calculated as follows |
| 250 | * rate = parent_rate * n * (k + 1) / 2 |
| 251 | * parent_rate is always 24Mhz |
| 252 | */ |
Emilio López | d584c13 | 2013-12-23 00:32:37 -0300 | [diff] [blame] | 253 | |
Maxime Ripard | 92ef67c | 2014-02-05 14:05:03 +0100 | [diff] [blame] | 254 | static void sun6i_a31_get_pll6_factors(u32 *freq, u32 parent_rate, |
| 255 | u8 *n, u8 *k, u8 *m, u8 *p) |
| 256 | { |
| 257 | u8 div; |
| 258 | |
| 259 | /* |
| 260 | * We always have 24MHz / 2, so we can just say that our |
| 261 | * parent clock is 12MHz. |
| 262 | */ |
| 263 | parent_rate = parent_rate / 2; |
| 264 | |
| 265 | /* Normalize value to a parent_rate multiple (24M / 2) */ |
| 266 | div = *freq / parent_rate; |
| 267 | *freq = parent_rate * div; |
| 268 | |
| 269 | /* we were called to round the frequency, we can now return */ |
| 270 | if (n == NULL) |
| 271 | return; |
| 272 | |
| 273 | *k = div / 32; |
| 274 | if (*k > 3) |
| 275 | *k = 3; |
| 276 | |
| 277 | *n = DIV_ROUND_UP(div, (*k+1)); |
| 278 | } |
Emilio López | d584c13 | 2013-12-23 00:32:37 -0300 | [diff] [blame] | 279 | |
| 280 | /** |
Maxime Ripard | 81ba6c5 | 2013-07-22 18:21:32 +0200 | [diff] [blame] | 281 | * sun4i_get_apb1_factors() - calculates m, p factors for APB1 |
Emilio López | e874a66 | 2013-02-25 11:44:26 -0300 | [diff] [blame] | 282 | * APB1 rate is calculated as follows |
| 283 | * rate = (parent_rate >> p) / (m + 1); |
| 284 | */ |
| 285 | |
Maxime Ripard | 81ba6c5 | 2013-07-22 18:21:32 +0200 | [diff] [blame] | 286 | static void sun4i_get_apb1_factors(u32 *freq, u32 parent_rate, |
Emilio López | e874a66 | 2013-02-25 11:44:26 -0300 | [diff] [blame] | 287 | u8 *n, u8 *k, u8 *m, u8 *p) |
| 288 | { |
| 289 | u8 calcm, calcp; |
| 290 | |
| 291 | if (parent_rate < *freq) |
| 292 | *freq = parent_rate; |
| 293 | |
Emilio López | 2226013 | 2014-03-19 15:19:32 -0300 | [diff] [blame] | 294 | parent_rate = DIV_ROUND_UP(parent_rate, *freq); |
Emilio López | e874a66 | 2013-02-25 11:44:26 -0300 | [diff] [blame] | 295 | |
| 296 | /* Invalid rate! */ |
| 297 | if (parent_rate > 32) |
| 298 | return; |
| 299 | |
| 300 | if (parent_rate <= 4) |
| 301 | calcp = 0; |
| 302 | else if (parent_rate <= 8) |
| 303 | calcp = 1; |
| 304 | else if (parent_rate <= 16) |
| 305 | calcp = 2; |
| 306 | else |
| 307 | calcp = 3; |
| 308 | |
| 309 | calcm = (parent_rate >> calcp) - 1; |
| 310 | |
| 311 | *freq = (parent_rate >> calcp) / (calcm + 1); |
| 312 | |
| 313 | /* we were called to round the frequency, we can now return */ |
| 314 | if (n == NULL) |
| 315 | return; |
| 316 | |
| 317 | *m = calcm; |
| 318 | *p = calcp; |
| 319 | } |
| 320 | |
| 321 | |
| 322 | |
Emilio López | 7551769 | 2013-12-23 00:32:39 -0300 | [diff] [blame] | 323 | |
| 324 | /** |
Chen-Yu Tsai | 6f86341 | 2013-12-24 21:26:17 +0800 | [diff] [blame] | 325 | * sun7i_a20_get_out_factors() - calculates m, p factors for CLK_OUT_A/B |
| 326 | * CLK_OUT rate is calculated as follows |
| 327 | * rate = (parent_rate >> p) / (m + 1); |
| 328 | */ |
| 329 | |
| 330 | static void sun7i_a20_get_out_factors(u32 *freq, u32 parent_rate, |
| 331 | u8 *n, u8 *k, u8 *m, u8 *p) |
| 332 | { |
| 333 | u8 div, calcm, calcp; |
| 334 | |
| 335 | /* These clocks can only divide, so we will never be able to achieve |
| 336 | * frequencies higher than the parent frequency */ |
| 337 | if (*freq > parent_rate) |
| 338 | *freq = parent_rate; |
| 339 | |
Emilio López | 2226013 | 2014-03-19 15:19:32 -0300 | [diff] [blame] | 340 | div = DIV_ROUND_UP(parent_rate, *freq); |
Chen-Yu Tsai | 6f86341 | 2013-12-24 21:26:17 +0800 | [diff] [blame] | 341 | |
| 342 | if (div < 32) |
| 343 | calcp = 0; |
| 344 | else if (div / 2 < 32) |
| 345 | calcp = 1; |
| 346 | else if (div / 4 < 32) |
| 347 | calcp = 2; |
| 348 | else |
| 349 | calcp = 3; |
| 350 | |
| 351 | calcm = DIV_ROUND_UP(div, 1 << calcp); |
| 352 | |
| 353 | *freq = (parent_rate >> calcp) / calcm; |
| 354 | |
| 355 | /* we were called to round the frequency, we can now return */ |
| 356 | if (n == NULL) |
| 357 | return; |
| 358 | |
| 359 | *m = calcm - 1; |
| 360 | *p = calcp; |
| 361 | } |
| 362 | |
Chen-Yu Tsai | e4c6d6c | 2014-02-10 18:35:47 +0800 | [diff] [blame] | 363 | /** |
Emilio López | 9571397 | 2014-05-02 17:57:16 +0200 | [diff] [blame] | 364 | * clk_sunxi_mmc_phase_control() - configures MMC clock phase control |
| 365 | */ |
| 366 | |
Hans de Goede | a97181a | 2014-05-12 14:04:47 +0200 | [diff] [blame] | 367 | void clk_sunxi_mmc_phase_control(struct clk *clk, u8 sample, u8 output) |
Emilio López | 9571397 | 2014-05-02 17:57:16 +0200 | [diff] [blame] | 368 | { |
| 369 | #define to_clk_composite(_hw) container_of(_hw, struct clk_composite, hw) |
| 370 | #define to_clk_factors(_hw) container_of(_hw, struct clk_factors, hw) |
| 371 | |
Hans de Goede | a97181a | 2014-05-12 14:04:47 +0200 | [diff] [blame] | 372 | struct clk_hw *hw = __clk_get_hw(clk); |
Emilio López | 9571397 | 2014-05-02 17:57:16 +0200 | [diff] [blame] | 373 | struct clk_composite *composite = to_clk_composite(hw); |
| 374 | struct clk_hw *rate_hw = composite->rate_hw; |
| 375 | struct clk_factors *factors = to_clk_factors(rate_hw); |
| 376 | unsigned long flags = 0; |
| 377 | u32 reg; |
| 378 | |
| 379 | if (factors->lock) |
| 380 | spin_lock_irqsave(factors->lock, flags); |
| 381 | |
| 382 | reg = readl(factors->reg); |
| 383 | |
| 384 | /* set sample clock phase control */ |
| 385 | reg &= ~(0x7 << 20); |
| 386 | reg |= ((sample & 0x7) << 20); |
| 387 | |
| 388 | /* set output clock phase control */ |
| 389 | reg &= ~(0x7 << 8); |
| 390 | reg |= ((output & 0x7) << 8); |
| 391 | |
| 392 | writel(reg, factors->reg); |
| 393 | |
| 394 | if (factors->lock) |
| 395 | spin_unlock_irqrestore(factors->lock, flags); |
| 396 | } |
| 397 | EXPORT_SYMBOL(clk_sunxi_mmc_phase_control); |
| 398 | |
| 399 | |
| 400 | /** |
Emilio López | e874a66 | 2013-02-25 11:44:26 -0300 | [diff] [blame] | 401 | * sunxi_factors_clk_setup() - Setup function for factor clocks |
| 402 | */ |
| 403 | |
Maxime Ripard | 81ba6c5 | 2013-07-22 18:21:32 +0200 | [diff] [blame] | 404 | static struct clk_factors_config sun4i_pll1_config = { |
Emilio López | e874a66 | 2013-02-25 11:44:26 -0300 | [diff] [blame] | 405 | .nshift = 8, |
| 406 | .nwidth = 5, |
| 407 | .kshift = 4, |
| 408 | .kwidth = 2, |
| 409 | .mshift = 0, |
| 410 | .mwidth = 2, |
| 411 | .pshift = 16, |
| 412 | .pwidth = 2, |
| 413 | }; |
| 414 | |
Maxime Ripard | 6a721db | 2013-07-23 23:34:10 +0200 | [diff] [blame] | 415 | static struct clk_factors_config sun6i_a31_pll1_config = { |
| 416 | .nshift = 8, |
| 417 | .nwidth = 5, |
| 418 | .kshift = 4, |
| 419 | .kwidth = 2, |
| 420 | .mshift = 0, |
| 421 | .mwidth = 2, |
| 422 | }; |
| 423 | |
Chen-Yu Tsai | 515c1a4 | 2014-06-26 23:55:43 +0800 | [diff] [blame] | 424 | static struct clk_factors_config sun8i_a23_pll1_config = { |
| 425 | .nshift = 8, |
| 426 | .nwidth = 5, |
| 427 | .kshift = 4, |
| 428 | .kwidth = 2, |
| 429 | .mshift = 0, |
| 430 | .mwidth = 2, |
| 431 | .pshift = 16, |
| 432 | .pwidth = 2, |
| 433 | .n_start = 1, |
| 434 | }; |
| 435 | |
Emilio López | d584c13 | 2013-12-23 00:32:37 -0300 | [diff] [blame] | 436 | static struct clk_factors_config sun4i_pll5_config = { |
| 437 | .nshift = 8, |
| 438 | .nwidth = 5, |
| 439 | .kshift = 4, |
| 440 | .kwidth = 2, |
| 441 | }; |
| 442 | |
Maxime Ripard | 92ef67c | 2014-02-05 14:05:03 +0100 | [diff] [blame] | 443 | static struct clk_factors_config sun6i_a31_pll6_config = { |
| 444 | .nshift = 8, |
| 445 | .nwidth = 5, |
| 446 | .kshift = 4, |
| 447 | .kwidth = 2, |
| 448 | }; |
| 449 | |
Maxime Ripard | 81ba6c5 | 2013-07-22 18:21:32 +0200 | [diff] [blame] | 450 | static struct clk_factors_config sun4i_apb1_config = { |
Emilio López | e874a66 | 2013-02-25 11:44:26 -0300 | [diff] [blame] | 451 | .mshift = 0, |
| 452 | .mwidth = 5, |
| 453 | .pshift = 16, |
| 454 | .pwidth = 2, |
| 455 | }; |
| 456 | |
Emilio López | 7551769 | 2013-12-23 00:32:39 -0300 | [diff] [blame] | 457 | /* user manual says "n" but it's really "p" */ |
Chen-Yu Tsai | 6f86341 | 2013-12-24 21:26:17 +0800 | [diff] [blame] | 458 | static struct clk_factors_config sun7i_a20_out_config = { |
| 459 | .mshift = 8, |
| 460 | .mwidth = 5, |
| 461 | .pshift = 20, |
| 462 | .pwidth = 2, |
| 463 | }; |
| 464 | |
Sachin Kamat | 52be7cc | 2013-08-12 14:44:06 +0530 | [diff] [blame] | 465 | static const struct factors_data sun4i_pll1_data __initconst = { |
Emilio López | d838ff3 | 2013-12-23 00:32:34 -0300 | [diff] [blame] | 466 | .enable = 31, |
Maxime Ripard | 81ba6c5 | 2013-07-22 18:21:32 +0200 | [diff] [blame] | 467 | .table = &sun4i_pll1_config, |
| 468 | .getter = sun4i_get_pll1_factors, |
Emilio López | e874a66 | 2013-02-25 11:44:26 -0300 | [diff] [blame] | 469 | }; |
| 470 | |
Sachin Kamat | 52be7cc | 2013-08-12 14:44:06 +0530 | [diff] [blame] | 471 | static const struct factors_data sun6i_a31_pll1_data __initconst = { |
Emilio López | d838ff3 | 2013-12-23 00:32:34 -0300 | [diff] [blame] | 472 | .enable = 31, |
Maxime Ripard | 6a721db | 2013-07-23 23:34:10 +0200 | [diff] [blame] | 473 | .table = &sun6i_a31_pll1_config, |
| 474 | .getter = sun6i_a31_get_pll1_factors, |
| 475 | }; |
| 476 | |
Chen-Yu Tsai | 515c1a4 | 2014-06-26 23:55:43 +0800 | [diff] [blame] | 477 | static const struct factors_data sun8i_a23_pll1_data __initconst = { |
| 478 | .enable = 31, |
| 479 | .table = &sun8i_a23_pll1_config, |
| 480 | .getter = sun8i_a23_get_pll1_factors, |
| 481 | }; |
| 482 | |
Emilio López | 5a8ddf2 | 2014-03-19 15:19:30 -0300 | [diff] [blame] | 483 | static const struct factors_data sun7i_a20_pll4_data __initconst = { |
| 484 | .enable = 31, |
| 485 | .table = &sun4i_pll5_config, |
| 486 | .getter = sun4i_get_pll5_factors, |
| 487 | }; |
| 488 | |
Emilio López | d584c13 | 2013-12-23 00:32:37 -0300 | [diff] [blame] | 489 | static const struct factors_data sun4i_pll5_data __initconst = { |
| 490 | .enable = 31, |
| 491 | .table = &sun4i_pll5_config, |
| 492 | .getter = sun4i_get_pll5_factors, |
Chen-Yu Tsai | 667f542 | 2014-02-03 09:51:39 +0800 | [diff] [blame] | 493 | .name = "pll5", |
| 494 | }; |
| 495 | |
| 496 | static const struct factors_data sun4i_pll6_data __initconst = { |
| 497 | .enable = 31, |
| 498 | .table = &sun4i_pll5_config, |
| 499 | .getter = sun4i_get_pll5_factors, |
| 500 | .name = "pll6", |
Emilio López | d584c13 | 2013-12-23 00:32:37 -0300 | [diff] [blame] | 501 | }; |
| 502 | |
Maxime Ripard | 92ef67c | 2014-02-05 14:05:03 +0100 | [diff] [blame] | 503 | static const struct factors_data sun6i_a31_pll6_data __initconst = { |
| 504 | .enable = 31, |
| 505 | .table = &sun6i_a31_pll6_config, |
| 506 | .getter = sun6i_a31_get_pll6_factors, |
| 507 | }; |
| 508 | |
Sachin Kamat | 52be7cc | 2013-08-12 14:44:06 +0530 | [diff] [blame] | 509 | static const struct factors_data sun4i_apb1_data __initconst = { |
Emilio López | 93746e7 | 2014-11-06 11:40:29 +0800 | [diff] [blame] | 510 | .mux = 24, |
| 511 | .muxmask = BIT(1) | BIT(0), |
Maxime Ripard | 81ba6c5 | 2013-07-22 18:21:32 +0200 | [diff] [blame] | 512 | .table = &sun4i_apb1_config, |
| 513 | .getter = sun4i_get_apb1_factors, |
Emilio López | e874a66 | 2013-02-25 11:44:26 -0300 | [diff] [blame] | 514 | }; |
| 515 | |
Chen-Yu Tsai | 6f86341 | 2013-12-24 21:26:17 +0800 | [diff] [blame] | 516 | static const struct factors_data sun7i_a20_out_data __initconst = { |
| 517 | .enable = 31, |
| 518 | .mux = 24, |
Chen-Yu Tsai | e94f8cb3 | 2014-10-20 22:10:26 +0800 | [diff] [blame] | 519 | .muxmask = BIT(1) | BIT(0), |
Chen-Yu Tsai | 6f86341 | 2013-12-24 21:26:17 +0800 | [diff] [blame] | 520 | .table = &sun7i_a20_out_config, |
| 521 | .getter = sun7i_a20_get_out_factors, |
| 522 | }; |
| 523 | |
Emilio López | 5f4e0be | 2013-12-23 00:32:36 -0300 | [diff] [blame] | 524 | static struct clk * __init sunxi_factors_clk_setup(struct device_node *node, |
Maxime Ripard | 601da9d | 2014-07-04 22:24:52 +0200 | [diff] [blame] | 525 | const struct factors_data *data) |
Emilio López | e874a66 | 2013-02-25 11:44:26 -0300 | [diff] [blame] | 526 | { |
Maxime Ripard | 601da9d | 2014-07-04 22:24:52 +0200 | [diff] [blame] | 527 | return sunxi_factors_register(node, data, &clk_lock); |
Emilio López | e874a66 | 2013-02-25 11:44:26 -0300 | [diff] [blame] | 528 | } |
| 529 | |
| 530 | |
| 531 | |
| 532 | /** |
| 533 | * sunxi_mux_clk_setup() - Setup function for muxes |
| 534 | */ |
| 535 | |
| 536 | #define SUNXI_MUX_GATE_WIDTH 2 |
| 537 | |
| 538 | struct mux_data { |
| 539 | u8 shift; |
| 540 | }; |
| 541 | |
Sachin Kamat | 52be7cc | 2013-08-12 14:44:06 +0530 | [diff] [blame] | 542 | static const struct mux_data sun4i_cpu_mux_data __initconst = { |
Emilio López | e874a66 | 2013-02-25 11:44:26 -0300 | [diff] [blame] | 543 | .shift = 16, |
| 544 | }; |
| 545 | |
Sachin Kamat | 52be7cc | 2013-08-12 14:44:06 +0530 | [diff] [blame] | 546 | static const struct mux_data sun6i_a31_ahb1_mux_data __initconst = { |
Maxime Ripard | 6a721db | 2013-07-23 23:34:10 +0200 | [diff] [blame] | 547 | .shift = 12, |
| 548 | }; |
| 549 | |
Emilio López | e874a66 | 2013-02-25 11:44:26 -0300 | [diff] [blame] | 550 | static void __init sunxi_mux_clk_setup(struct device_node *node, |
| 551 | struct mux_data *data) |
| 552 | { |
| 553 | struct clk *clk; |
| 554 | const char *clk_name = node->name; |
Emilio López | edaf3fb | 2013-12-23 00:32:33 -0300 | [diff] [blame] | 555 | const char *parents[SUNXI_MAX_PARENTS]; |
Emilio López | 89a9456 | 2014-07-28 00:49:42 -0300 | [diff] [blame] | 556 | void __iomem *reg; |
Emilio López | e874a66 | 2013-02-25 11:44:26 -0300 | [diff] [blame] | 557 | int i = 0; |
| 558 | |
| 559 | reg = of_iomap(node, 0); |
| 560 | |
Emilio López | edaf3fb | 2013-12-23 00:32:33 -0300 | [diff] [blame] | 561 | while (i < SUNXI_MAX_PARENTS && |
| 562 | (parents[i] = of_clk_get_parent_name(node, i)) != NULL) |
Emilio López | e874a66 | 2013-02-25 11:44:26 -0300 | [diff] [blame] | 563 | i++; |
| 564 | |
Chen-Yu Tsai | f64111e | 2014-02-03 09:51:37 +0800 | [diff] [blame] | 565 | of_property_read_string(node, "clock-output-names", &clk_name); |
| 566 | |
James Hogan | 819c1de | 2013-07-29 12:25:01 +0100 | [diff] [blame] | 567 | clk = clk_register_mux(NULL, clk_name, parents, i, |
| 568 | CLK_SET_RATE_NO_REPARENT, reg, |
Emilio López | e874a66 | 2013-02-25 11:44:26 -0300 | [diff] [blame] | 569 | data->shift, SUNXI_MUX_GATE_WIDTH, |
| 570 | 0, &clk_lock); |
| 571 | |
| 572 | if (clk) { |
| 573 | of_clk_add_provider(node, of_clk_src_simple_get, clk); |
| 574 | clk_register_clkdev(clk, clk_name, NULL); |
| 575 | } |
| 576 | } |
| 577 | |
| 578 | |
| 579 | |
| 580 | /** |
| 581 | * sunxi_divider_clk_setup() - Setup function for simple divider clocks |
| 582 | */ |
| 583 | |
Emilio López | e874a66 | 2013-02-25 11:44:26 -0300 | [diff] [blame] | 584 | struct div_data { |
Maxime Ripard | 70855bb | 2013-07-23 09:25:56 +0200 | [diff] [blame] | 585 | u8 shift; |
| 586 | u8 pow; |
| 587 | u8 width; |
Chen-Yu Tsai | ea5671b | 2014-06-26 23:55:42 +0800 | [diff] [blame] | 588 | const struct clk_div_table *table; |
Emilio López | e874a66 | 2013-02-25 11:44:26 -0300 | [diff] [blame] | 589 | }; |
| 590 | |
Sachin Kamat | 52be7cc | 2013-08-12 14:44:06 +0530 | [diff] [blame] | 591 | static const struct div_data sun4i_axi_data __initconst = { |
Maxime Ripard | 70855bb | 2013-07-23 09:25:56 +0200 | [diff] [blame] | 592 | .shift = 0, |
| 593 | .pow = 0, |
| 594 | .width = 2, |
Emilio López | e874a66 | 2013-02-25 11:44:26 -0300 | [diff] [blame] | 595 | }; |
| 596 | |
Chen-Yu Tsai | 515c1a4 | 2014-06-26 23:55:43 +0800 | [diff] [blame] | 597 | static const struct clk_div_table sun8i_a23_axi_table[] __initconst = { |
| 598 | { .val = 0, .div = 1 }, |
| 599 | { .val = 1, .div = 2 }, |
| 600 | { .val = 2, .div = 3 }, |
| 601 | { .val = 3, .div = 4 }, |
| 602 | { .val = 4, .div = 4 }, |
| 603 | { .val = 5, .div = 4 }, |
| 604 | { .val = 6, .div = 4 }, |
| 605 | { .val = 7, .div = 4 }, |
| 606 | { } /* sentinel */ |
| 607 | }; |
| 608 | |
| 609 | static const struct div_data sun8i_a23_axi_data __initconst = { |
| 610 | .width = 3, |
| 611 | .table = sun8i_a23_axi_table, |
| 612 | }; |
| 613 | |
Sachin Kamat | 52be7cc | 2013-08-12 14:44:06 +0530 | [diff] [blame] | 614 | static const struct div_data sun4i_ahb_data __initconst = { |
Maxime Ripard | 70855bb | 2013-07-23 09:25:56 +0200 | [diff] [blame] | 615 | .shift = 4, |
| 616 | .pow = 1, |
| 617 | .width = 2, |
Emilio López | e874a66 | 2013-02-25 11:44:26 -0300 | [diff] [blame] | 618 | }; |
| 619 | |
Chen-Yu Tsai | cfe4c93 | 2014-09-06 14:45:10 +0800 | [diff] [blame] | 620 | static const struct clk_div_table sun4i_apb0_table[] __initconst = { |
| 621 | { .val = 0, .div = 2 }, |
| 622 | { .val = 1, .div = 2 }, |
| 623 | { .val = 2, .div = 4 }, |
| 624 | { .val = 3, .div = 8 }, |
| 625 | { } /* sentinel */ |
| 626 | }; |
| 627 | |
Sachin Kamat | 52be7cc | 2013-08-12 14:44:06 +0530 | [diff] [blame] | 628 | static const struct div_data sun4i_apb0_data __initconst = { |
Maxime Ripard | 70855bb | 2013-07-23 09:25:56 +0200 | [diff] [blame] | 629 | .shift = 8, |
| 630 | .pow = 1, |
| 631 | .width = 2, |
Chen-Yu Tsai | cfe4c93 | 2014-09-06 14:45:10 +0800 | [diff] [blame] | 632 | .table = sun4i_apb0_table, |
Emilio López | e874a66 | 2013-02-25 11:44:26 -0300 | [diff] [blame] | 633 | }; |
| 634 | |
| 635 | static void __init sunxi_divider_clk_setup(struct device_node *node, |
| 636 | struct div_data *data) |
| 637 | { |
| 638 | struct clk *clk; |
| 639 | const char *clk_name = node->name; |
| 640 | const char *clk_parent; |
Emilio López | 89a9456 | 2014-07-28 00:49:42 -0300 | [diff] [blame] | 641 | void __iomem *reg; |
Emilio López | e874a66 | 2013-02-25 11:44:26 -0300 | [diff] [blame] | 642 | |
| 643 | reg = of_iomap(node, 0); |
| 644 | |
| 645 | clk_parent = of_clk_get_parent_name(node, 0); |
| 646 | |
Chen-Yu Tsai | f64111e | 2014-02-03 09:51:37 +0800 | [diff] [blame] | 647 | of_property_read_string(node, "clock-output-names", &clk_name); |
| 648 | |
Chen-Yu Tsai | ea5671b | 2014-06-26 23:55:42 +0800 | [diff] [blame] | 649 | clk = clk_register_divider_table(NULL, clk_name, clk_parent, 0, |
| 650 | reg, data->shift, data->width, |
| 651 | data->pow ? CLK_DIVIDER_POWER_OF_TWO : 0, |
| 652 | data->table, &clk_lock); |
Emilio López | e874a66 | 2013-02-25 11:44:26 -0300 | [diff] [blame] | 653 | if (clk) { |
| 654 | of_clk_add_provider(node, of_clk_src_simple_get, clk); |
| 655 | clk_register_clkdev(clk, clk_name, NULL); |
| 656 | } |
| 657 | } |
| 658 | |
| 659 | |
Emilio López | 13569a7 | 2013-03-27 18:20:37 -0300 | [diff] [blame] | 660 | |
| 661 | /** |
Hans de Goede | cfb0086 | 2014-02-07 16:21:49 +0100 | [diff] [blame] | 662 | * sunxi_gates_reset... - reset bits in leaf gate clk registers handling |
| 663 | */ |
| 664 | |
| 665 | struct gates_reset_data { |
| 666 | void __iomem *reg; |
| 667 | spinlock_t *lock; |
| 668 | struct reset_controller_dev rcdev; |
| 669 | }; |
| 670 | |
| 671 | static int sunxi_gates_reset_assert(struct reset_controller_dev *rcdev, |
| 672 | unsigned long id) |
| 673 | { |
| 674 | struct gates_reset_data *data = container_of(rcdev, |
| 675 | struct gates_reset_data, |
| 676 | rcdev); |
| 677 | unsigned long flags; |
| 678 | u32 reg; |
| 679 | |
| 680 | spin_lock_irqsave(data->lock, flags); |
| 681 | |
| 682 | reg = readl(data->reg); |
| 683 | writel(reg & ~BIT(id), data->reg); |
| 684 | |
| 685 | spin_unlock_irqrestore(data->lock, flags); |
| 686 | |
| 687 | return 0; |
| 688 | } |
| 689 | |
| 690 | static int sunxi_gates_reset_deassert(struct reset_controller_dev *rcdev, |
| 691 | unsigned long id) |
| 692 | { |
| 693 | struct gates_reset_data *data = container_of(rcdev, |
| 694 | struct gates_reset_data, |
| 695 | rcdev); |
| 696 | unsigned long flags; |
| 697 | u32 reg; |
| 698 | |
| 699 | spin_lock_irqsave(data->lock, flags); |
| 700 | |
| 701 | reg = readl(data->reg); |
| 702 | writel(reg | BIT(id), data->reg); |
| 703 | |
| 704 | spin_unlock_irqrestore(data->lock, flags); |
| 705 | |
| 706 | return 0; |
| 707 | } |
| 708 | |
| 709 | static struct reset_control_ops sunxi_gates_reset_ops = { |
| 710 | .assert = sunxi_gates_reset_assert, |
| 711 | .deassert = sunxi_gates_reset_deassert, |
| 712 | }; |
| 713 | |
| 714 | /** |
Emilio López | 13569a7 | 2013-03-27 18:20:37 -0300 | [diff] [blame] | 715 | * sunxi_gates_clk_setup() - Setup function for leaf gates on clocks |
| 716 | */ |
| 717 | |
| 718 | #define SUNXI_GATES_MAX_SIZE 64 |
| 719 | |
| 720 | struct gates_data { |
| 721 | DECLARE_BITMAP(mask, SUNXI_GATES_MAX_SIZE); |
Hans de Goede | cfb0086 | 2014-02-07 16:21:49 +0100 | [diff] [blame] | 722 | u32 reset_mask; |
Emilio López | 13569a7 | 2013-03-27 18:20:37 -0300 | [diff] [blame] | 723 | }; |
| 724 | |
Sachin Kamat | 52be7cc | 2013-08-12 14:44:06 +0530 | [diff] [blame] | 725 | static const struct gates_data sun4i_axi_gates_data __initconst = { |
Emilio López | 13569a7 | 2013-03-27 18:20:37 -0300 | [diff] [blame] | 726 | .mask = {1}, |
| 727 | }; |
| 728 | |
Sachin Kamat | 52be7cc | 2013-08-12 14:44:06 +0530 | [diff] [blame] | 729 | static const struct gates_data sun4i_ahb_gates_data __initconst = { |
Emilio López | 13569a7 | 2013-03-27 18:20:37 -0300 | [diff] [blame] | 730 | .mask = {0x7F77FFF, 0x14FB3F}, |
| 731 | }; |
| 732 | |
Sachin Kamat | 52be7cc | 2013-08-12 14:44:06 +0530 | [diff] [blame] | 733 | static const struct gates_data sun5i_a10s_ahb_gates_data __initconst = { |
Maxime Ripard | 2371dd8 | 2013-07-16 11:21:59 +0200 | [diff] [blame] | 734 | .mask = {0x147667e7, 0x185915}, |
| 735 | }; |
| 736 | |
Sachin Kamat | 52be7cc | 2013-08-12 14:44:06 +0530 | [diff] [blame] | 737 | static const struct gates_data sun5i_a13_ahb_gates_data __initconst = { |
Maxime Ripard | 4f985b4 | 2013-04-30 11:56:22 +0200 | [diff] [blame] | 738 | .mask = {0x107067e7, 0x185111}, |
| 739 | }; |
| 740 | |
Sachin Kamat | 52be7cc | 2013-08-12 14:44:06 +0530 | [diff] [blame] | 741 | static const struct gates_data sun6i_a31_ahb1_gates_data __initconst = { |
Maxime Ripard | 6a721db | 2013-07-23 23:34:10 +0200 | [diff] [blame] | 742 | .mask = {0xEDFE7F62, 0x794F931}, |
| 743 | }; |
| 744 | |
Sachin Kamat | 52be7cc | 2013-08-12 14:44:06 +0530 | [diff] [blame] | 745 | static const struct gates_data sun7i_a20_ahb_gates_data __initconst = { |
Maxime Ripard | 1fb2e4a | 2013-07-25 21:06:56 +0200 | [diff] [blame] | 746 | .mask = { 0x12f77fff, 0x16ff3f }, |
| 747 | }; |
| 748 | |
Chen-Yu Tsai | 515c1a4 | 2014-06-26 23:55:43 +0800 | [diff] [blame] | 749 | static const struct gates_data sun8i_a23_ahb1_gates_data __initconst = { |
| 750 | .mask = {0x25386742, 0x2505111}, |
| 751 | }; |
| 752 | |
Chen-Yu Tsai | 0b0f080 | 2014-10-20 22:10:28 +0800 | [diff] [blame] | 753 | static const struct gates_data sun9i_a80_ahb0_gates_data __initconst = { |
| 754 | .mask = {0xF5F12B}, |
| 755 | }; |
| 756 | |
| 757 | static const struct gates_data sun9i_a80_ahb1_gates_data __initconst = { |
| 758 | .mask = {0x1E20003}, |
| 759 | }; |
| 760 | |
| 761 | static const struct gates_data sun9i_a80_ahb2_gates_data __initconst = { |
| 762 | .mask = {0x9B7}, |
| 763 | }; |
| 764 | |
Sachin Kamat | 52be7cc | 2013-08-12 14:44:06 +0530 | [diff] [blame] | 765 | static const struct gates_data sun4i_apb0_gates_data __initconst = { |
Emilio López | 13569a7 | 2013-03-27 18:20:37 -0300 | [diff] [blame] | 766 | .mask = {0x4EF}, |
| 767 | }; |
| 768 | |
Sachin Kamat | 52be7cc | 2013-08-12 14:44:06 +0530 | [diff] [blame] | 769 | static const struct gates_data sun5i_a10s_apb0_gates_data __initconst = { |
Maxime Ripard | 2371dd8 | 2013-07-16 11:21:59 +0200 | [diff] [blame] | 770 | .mask = {0x469}, |
| 771 | }; |
| 772 | |
Sachin Kamat | 52be7cc | 2013-08-12 14:44:06 +0530 | [diff] [blame] | 773 | static const struct gates_data sun5i_a13_apb0_gates_data __initconst = { |
Maxime Ripard | 4f985b4 | 2013-04-30 11:56:22 +0200 | [diff] [blame] | 774 | .mask = {0x61}, |
| 775 | }; |
| 776 | |
Sachin Kamat | 52be7cc | 2013-08-12 14:44:06 +0530 | [diff] [blame] | 777 | static const struct gates_data sun7i_a20_apb0_gates_data __initconst = { |
Maxime Ripard | 1fb2e4a | 2013-07-25 21:06:56 +0200 | [diff] [blame] | 778 | .mask = { 0x4ff }, |
| 779 | }; |
| 780 | |
Chen-Yu Tsai | 0b0f080 | 2014-10-20 22:10:28 +0800 | [diff] [blame] | 781 | static const struct gates_data sun9i_a80_apb0_gates_data __initconst = { |
| 782 | .mask = {0xEB822}, |
| 783 | }; |
| 784 | |
Sachin Kamat | 52be7cc | 2013-08-12 14:44:06 +0530 | [diff] [blame] | 785 | static const struct gates_data sun4i_apb1_gates_data __initconst = { |
Emilio López | 13569a7 | 2013-03-27 18:20:37 -0300 | [diff] [blame] | 786 | .mask = {0xFF00F7}, |
| 787 | }; |
| 788 | |
Sachin Kamat | 52be7cc | 2013-08-12 14:44:06 +0530 | [diff] [blame] | 789 | static const struct gates_data sun5i_a10s_apb1_gates_data __initconst = { |
Maxime Ripard | 2371dd8 | 2013-07-16 11:21:59 +0200 | [diff] [blame] | 790 | .mask = {0xf0007}, |
| 791 | }; |
| 792 | |
Sachin Kamat | 52be7cc | 2013-08-12 14:44:06 +0530 | [diff] [blame] | 793 | static const struct gates_data sun5i_a13_apb1_gates_data __initconst = { |
Maxime Ripard | 4f985b4 | 2013-04-30 11:56:22 +0200 | [diff] [blame] | 794 | .mask = {0xa0007}, |
| 795 | }; |
| 796 | |
Sachin Kamat | 52be7cc | 2013-08-12 14:44:06 +0530 | [diff] [blame] | 797 | static const struct gates_data sun6i_a31_apb1_gates_data __initconst = { |
Maxime Ripard | 6a721db | 2013-07-23 23:34:10 +0200 | [diff] [blame] | 798 | .mask = {0x3031}, |
| 799 | }; |
| 800 | |
Chen-Yu Tsai | 515c1a4 | 2014-06-26 23:55:43 +0800 | [diff] [blame] | 801 | static const struct gates_data sun8i_a23_apb1_gates_data __initconst = { |
| 802 | .mask = {0x3021}, |
| 803 | }; |
| 804 | |
Sachin Kamat | 52be7cc | 2013-08-12 14:44:06 +0530 | [diff] [blame] | 805 | static const struct gates_data sun6i_a31_apb2_gates_data __initconst = { |
Maxime Ripard | 6a721db | 2013-07-23 23:34:10 +0200 | [diff] [blame] | 806 | .mask = {0x3F000F}, |
| 807 | }; |
| 808 | |
Sachin Kamat | 52be7cc | 2013-08-12 14:44:06 +0530 | [diff] [blame] | 809 | static const struct gates_data sun7i_a20_apb1_gates_data __initconst = { |
Maxime Ripard | 1fb2e4a | 2013-07-25 21:06:56 +0200 | [diff] [blame] | 810 | .mask = { 0xff80ff }, |
| 811 | }; |
| 812 | |
Chen-Yu Tsai | 0b0f080 | 2014-10-20 22:10:28 +0800 | [diff] [blame] | 813 | static const struct gates_data sun9i_a80_apb1_gates_data __initconst = { |
| 814 | .mask = {0x3F001F}, |
| 815 | }; |
| 816 | |
Chen-Yu Tsai | 515c1a4 | 2014-06-26 23:55:43 +0800 | [diff] [blame] | 817 | static const struct gates_data sun8i_a23_apb2_gates_data __initconst = { |
| 818 | .mask = {0x1F0007}, |
| 819 | }; |
| 820 | |
Roman Byshko | 5abdbf2 | 2014-02-07 16:21:50 +0100 | [diff] [blame] | 821 | static const struct gates_data sun4i_a10_usb_gates_data __initconst = { |
| 822 | .mask = {0x1C0}, |
| 823 | .reset_mask = 0x07, |
| 824 | }; |
| 825 | |
| 826 | static const struct gates_data sun5i_a13_usb_gates_data __initconst = { |
| 827 | .mask = {0x140}, |
| 828 | .reset_mask = 0x03, |
| 829 | }; |
| 830 | |
Maxime Ripard | e0e7943 | 2014-05-13 17:44:15 +0200 | [diff] [blame] | 831 | static const struct gates_data sun6i_a31_usb_gates_data __initconst = { |
| 832 | .mask = { BIT(18) | BIT(17) | BIT(16) | BIT(10) | BIT(9) | BIT(8) }, |
| 833 | .reset_mask = BIT(2) | BIT(1) | BIT(0), |
| 834 | }; |
| 835 | |
Emilio López | 13569a7 | 2013-03-27 18:20:37 -0300 | [diff] [blame] | 836 | static void __init sunxi_gates_clk_setup(struct device_node *node, |
| 837 | struct gates_data *data) |
| 838 | { |
| 839 | struct clk_onecell_data *clk_data; |
Hans de Goede | cfb0086 | 2014-02-07 16:21:49 +0100 | [diff] [blame] | 840 | struct gates_reset_data *reset_data; |
Emilio López | 13569a7 | 2013-03-27 18:20:37 -0300 | [diff] [blame] | 841 | const char *clk_parent; |
| 842 | const char *clk_name; |
Emilio López | 89a9456 | 2014-07-28 00:49:42 -0300 | [diff] [blame] | 843 | void __iomem *reg; |
Emilio López | 13569a7 | 2013-03-27 18:20:37 -0300 | [diff] [blame] | 844 | int qty; |
| 845 | int i = 0; |
| 846 | int j = 0; |
Emilio López | 13569a7 | 2013-03-27 18:20:37 -0300 | [diff] [blame] | 847 | |
| 848 | reg = of_iomap(node, 0); |
| 849 | |
| 850 | clk_parent = of_clk_get_parent_name(node, 0); |
| 851 | |
| 852 | /* Worst-case size approximation and memory allocation */ |
| 853 | qty = find_last_bit(data->mask, SUNXI_GATES_MAX_SIZE); |
| 854 | clk_data = kmalloc(sizeof(struct clk_onecell_data), GFP_KERNEL); |
| 855 | if (!clk_data) |
| 856 | return; |
| 857 | clk_data->clks = kzalloc((qty+1) * sizeof(struct clk *), GFP_KERNEL); |
| 858 | if (!clk_data->clks) { |
| 859 | kfree(clk_data); |
| 860 | return; |
| 861 | } |
| 862 | |
| 863 | for_each_set_bit(i, data->mask, SUNXI_GATES_MAX_SIZE) { |
| 864 | of_property_read_string_index(node, "clock-output-names", |
| 865 | j, &clk_name); |
| 866 | |
Emilio López | 13569a7 | 2013-03-27 18:20:37 -0300 | [diff] [blame] | 867 | clk_data->clks[i] = clk_register_gate(NULL, clk_name, |
Chen-Yu Tsai | 70eab19 | 2014-06-26 23:55:40 +0800 | [diff] [blame] | 868 | clk_parent, 0, |
Emilio López | 13569a7 | 2013-03-27 18:20:37 -0300 | [diff] [blame] | 869 | reg + 4 * (i/32), i % 32, |
| 870 | 0, &clk_lock); |
| 871 | WARN_ON(IS_ERR(clk_data->clks[i])); |
Chen-Yu Tsai | d14e470 | 2014-06-26 23:55:39 +0800 | [diff] [blame] | 872 | clk_register_clkdev(clk_data->clks[i], clk_name, NULL); |
Emilio López | 13569a7 | 2013-03-27 18:20:37 -0300 | [diff] [blame] | 873 | |
| 874 | j++; |
| 875 | } |
| 876 | |
| 877 | /* Adjust to the real max */ |
| 878 | clk_data->clk_num = i; |
| 879 | |
| 880 | of_clk_add_provider(node, of_clk_src_onecell_get, clk_data); |
Hans de Goede | cfb0086 | 2014-02-07 16:21:49 +0100 | [diff] [blame] | 881 | |
| 882 | /* Register a reset controler for gates with reset bits */ |
| 883 | if (data->reset_mask == 0) |
| 884 | return; |
| 885 | |
| 886 | reset_data = kzalloc(sizeof(*reset_data), GFP_KERNEL); |
| 887 | if (!reset_data) |
| 888 | return; |
| 889 | |
| 890 | reset_data->reg = reg; |
| 891 | reset_data->lock = &clk_lock; |
| 892 | reset_data->rcdev.nr_resets = __fls(data->reset_mask) + 1; |
| 893 | reset_data->rcdev.ops = &sunxi_gates_reset_ops; |
| 894 | reset_data->rcdev.of_node = node; |
| 895 | reset_controller_register(&reset_data->rcdev); |
Emilio López | 13569a7 | 2013-03-27 18:20:37 -0300 | [diff] [blame] | 896 | } |
| 897 | |
Emilio López | d584c13 | 2013-12-23 00:32:37 -0300 | [diff] [blame] | 898 | |
| 899 | |
| 900 | /** |
| 901 | * sunxi_divs_clk_setup() helper data |
| 902 | */ |
| 903 | |
| 904 | #define SUNXI_DIVS_MAX_QTY 2 |
| 905 | #define SUNXI_DIVISOR_WIDTH 2 |
| 906 | |
| 907 | struct divs_data { |
| 908 | const struct factors_data *factors; /* data for the factor clock */ |
Chen-Yu Tsai | 13d52f6 | 2014-11-13 02:08:30 +0800 | [diff] [blame^] | 909 | int ndivs; /* number of children */ |
Emilio López | d584c13 | 2013-12-23 00:32:37 -0300 | [diff] [blame] | 910 | struct { |
| 911 | u8 fixed; /* is it a fixed divisor? if not... */ |
| 912 | struct clk_div_table *table; /* is it a table based divisor? */ |
| 913 | u8 shift; /* otherwise it's a normal divisor with this shift */ |
| 914 | u8 pow; /* is it power-of-two based? */ |
| 915 | u8 gate; /* is it independently gateable? */ |
| 916 | } div[SUNXI_DIVS_MAX_QTY]; |
| 917 | }; |
| 918 | |
| 919 | static struct clk_div_table pll6_sata_tbl[] = { |
| 920 | { .val = 0, .div = 6, }, |
| 921 | { .val = 1, .div = 12, }, |
| 922 | { .val = 2, .div = 18, }, |
| 923 | { .val = 3, .div = 24, }, |
| 924 | { } /* sentinel */ |
| 925 | }; |
| 926 | |
| 927 | static const struct divs_data pll5_divs_data __initconst = { |
| 928 | .factors = &sun4i_pll5_data, |
Chen-Yu Tsai | 13d52f6 | 2014-11-13 02:08:30 +0800 | [diff] [blame^] | 929 | .ndivs = 2, |
Emilio López | d584c13 | 2013-12-23 00:32:37 -0300 | [diff] [blame] | 930 | .div = { |
| 931 | { .shift = 0, .pow = 0, }, /* M, DDR */ |
| 932 | { .shift = 16, .pow = 1, }, /* P, other */ |
| 933 | } |
| 934 | }; |
| 935 | |
| 936 | static const struct divs_data pll6_divs_data __initconst = { |
Chen-Yu Tsai | 667f542 | 2014-02-03 09:51:39 +0800 | [diff] [blame] | 937 | .factors = &sun4i_pll6_data, |
Chen-Yu Tsai | 13d52f6 | 2014-11-13 02:08:30 +0800 | [diff] [blame^] | 938 | .ndivs = 2, |
Emilio López | d584c13 | 2013-12-23 00:32:37 -0300 | [diff] [blame] | 939 | .div = { |
| 940 | { .shift = 0, .table = pll6_sata_tbl, .gate = 14 }, /* M, SATA */ |
| 941 | { .fixed = 2 }, /* P, other */ |
| 942 | } |
| 943 | }; |
| 944 | |
| 945 | /** |
| 946 | * sunxi_divs_clk_setup() - Setup function for leaf divisors on clocks |
| 947 | * |
| 948 | * These clocks look something like this |
| 949 | * ________________________ |
| 950 | * | ___divisor 1---|----> to consumer |
| 951 | * parent >--| pll___/___divisor 2---|----> to consumer |
| 952 | * | \_______________|____> to consumer |
| 953 | * |________________________| |
| 954 | */ |
| 955 | |
| 956 | static void __init sunxi_divs_clk_setup(struct device_node *node, |
| 957 | struct divs_data *data) |
| 958 | { |
| 959 | struct clk_onecell_data *clk_data; |
Chen-Yu Tsai | 97e36b3 | 2014-02-03 09:51:40 +0800 | [diff] [blame] | 960 | const char *parent; |
Emilio López | d584c13 | 2013-12-23 00:32:37 -0300 | [diff] [blame] | 961 | const char *clk_name; |
| 962 | struct clk **clks, *pclk; |
| 963 | struct clk_hw *gate_hw, *rate_hw; |
| 964 | const struct clk_ops *rate_ops; |
| 965 | struct clk_gate *gate = NULL; |
| 966 | struct clk_fixed_factor *fix_factor; |
| 967 | struct clk_divider *divider; |
Emilio López | 89a9456 | 2014-07-28 00:49:42 -0300 | [diff] [blame] | 968 | void __iomem *reg; |
Chen-Yu Tsai | 13d52f6 | 2014-11-13 02:08:30 +0800 | [diff] [blame^] | 969 | int ndivs = SUNXI_DIVS_MAX_QTY, i = 0; |
Emilio López | d584c13 | 2013-12-23 00:32:37 -0300 | [diff] [blame] | 970 | int flags, clkflags; |
| 971 | |
| 972 | /* Set up factor clock that we will be dividing */ |
| 973 | pclk = sunxi_factors_clk_setup(node, data->factors); |
Chen-Yu Tsai | 97e36b3 | 2014-02-03 09:51:40 +0800 | [diff] [blame] | 974 | parent = __clk_get_name(pclk); |
Emilio López | d584c13 | 2013-12-23 00:32:37 -0300 | [diff] [blame] | 975 | |
| 976 | reg = of_iomap(node, 0); |
| 977 | |
| 978 | clk_data = kmalloc(sizeof(struct clk_onecell_data), GFP_KERNEL); |
| 979 | if (!clk_data) |
| 980 | return; |
| 981 | |
Emilio López | d193368 | 2014-01-24 22:32:41 -0300 | [diff] [blame] | 982 | clks = kzalloc((SUNXI_DIVS_MAX_QTY+1) * sizeof(*clks), GFP_KERNEL); |
Emilio López | d584c13 | 2013-12-23 00:32:37 -0300 | [diff] [blame] | 983 | if (!clks) |
| 984 | goto free_clkdata; |
| 985 | |
| 986 | clk_data->clks = clks; |
| 987 | |
| 988 | /* It's not a good idea to have automatic reparenting changing |
| 989 | * our RAM clock! */ |
| 990 | clkflags = !strcmp("pll5", parent) ? 0 : CLK_SET_RATE_PARENT; |
| 991 | |
Chen-Yu Tsai | 13d52f6 | 2014-11-13 02:08:30 +0800 | [diff] [blame^] | 992 | /* if number of children known, use it */ |
| 993 | if (data->ndivs) |
| 994 | ndivs = data->ndivs; |
| 995 | |
| 996 | for (i = 0; i < ndivs; i++) { |
Emilio López | d584c13 | 2013-12-23 00:32:37 -0300 | [diff] [blame] | 997 | if (of_property_read_string_index(node, "clock-output-names", |
| 998 | i, &clk_name) != 0) |
| 999 | break; |
| 1000 | |
| 1001 | gate_hw = NULL; |
| 1002 | rate_hw = NULL; |
| 1003 | rate_ops = NULL; |
| 1004 | |
| 1005 | /* If this leaf clock can be gated, create a gate */ |
| 1006 | if (data->div[i].gate) { |
| 1007 | gate = kzalloc(sizeof(*gate), GFP_KERNEL); |
| 1008 | if (!gate) |
| 1009 | goto free_clks; |
| 1010 | |
| 1011 | gate->reg = reg; |
| 1012 | gate->bit_idx = data->div[i].gate; |
| 1013 | gate->lock = &clk_lock; |
| 1014 | |
| 1015 | gate_hw = &gate->hw; |
| 1016 | } |
| 1017 | |
| 1018 | /* Leaves can be fixed or configurable divisors */ |
| 1019 | if (data->div[i].fixed) { |
| 1020 | fix_factor = kzalloc(sizeof(*fix_factor), GFP_KERNEL); |
| 1021 | if (!fix_factor) |
| 1022 | goto free_gate; |
| 1023 | |
| 1024 | fix_factor->mult = 1; |
| 1025 | fix_factor->div = data->div[i].fixed; |
| 1026 | |
| 1027 | rate_hw = &fix_factor->hw; |
| 1028 | rate_ops = &clk_fixed_factor_ops; |
| 1029 | } else { |
| 1030 | divider = kzalloc(sizeof(*divider), GFP_KERNEL); |
| 1031 | if (!divider) |
| 1032 | goto free_gate; |
| 1033 | |
| 1034 | flags = data->div[i].pow ? CLK_DIVIDER_POWER_OF_TWO : 0; |
| 1035 | |
| 1036 | divider->reg = reg; |
| 1037 | divider->shift = data->div[i].shift; |
| 1038 | divider->width = SUNXI_DIVISOR_WIDTH; |
| 1039 | divider->flags = flags; |
| 1040 | divider->lock = &clk_lock; |
| 1041 | divider->table = data->div[i].table; |
| 1042 | |
| 1043 | rate_hw = ÷r->hw; |
| 1044 | rate_ops = &clk_divider_ops; |
| 1045 | } |
| 1046 | |
| 1047 | /* Wrap the (potential) gate and the divisor on a composite |
| 1048 | * clock to unify them */ |
| 1049 | clks[i] = clk_register_composite(NULL, clk_name, &parent, 1, |
| 1050 | NULL, NULL, |
| 1051 | rate_hw, rate_ops, |
| 1052 | gate_hw, &clk_gate_ops, |
| 1053 | clkflags); |
| 1054 | |
| 1055 | WARN_ON(IS_ERR(clk_data->clks[i])); |
| 1056 | clk_register_clkdev(clks[i], clk_name, NULL); |
| 1057 | } |
| 1058 | |
| 1059 | /* The last clock available on the getter is the parent */ |
| 1060 | clks[i++] = pclk; |
| 1061 | |
| 1062 | /* Adjust to the real max */ |
| 1063 | clk_data->clk_num = i; |
| 1064 | |
| 1065 | of_clk_add_provider(node, of_clk_src_onecell_get, clk_data); |
| 1066 | |
| 1067 | return; |
| 1068 | |
| 1069 | free_gate: |
| 1070 | kfree(gate); |
| 1071 | free_clks: |
| 1072 | kfree(clks); |
| 1073 | free_clkdata: |
| 1074 | kfree(clk_data); |
| 1075 | } |
| 1076 | |
| 1077 | |
| 1078 | |
Emilio López | e874a66 | 2013-02-25 11:44:26 -0300 | [diff] [blame] | 1079 | /* Matches for factors clocks */ |
Sachin Kamat | 52be7cc | 2013-08-12 14:44:06 +0530 | [diff] [blame] | 1080 | static const struct of_device_id clk_factors_match[] __initconst = { |
Maxime Ripard | fd1b22f | 2014-02-06 09:55:57 +0100 | [diff] [blame] | 1081 | {.compatible = "allwinner,sun4i-a10-pll1-clk", .data = &sun4i_pll1_data,}, |
Maxime Ripard | 6a721db | 2013-07-23 23:34:10 +0200 | [diff] [blame] | 1082 | {.compatible = "allwinner,sun6i-a31-pll1-clk", .data = &sun6i_a31_pll1_data,}, |
Chen-Yu Tsai | 515c1a4 | 2014-06-26 23:55:43 +0800 | [diff] [blame] | 1083 | {.compatible = "allwinner,sun8i-a23-pll1-clk", .data = &sun8i_a23_pll1_data,}, |
Emilio López | 5a8ddf2 | 2014-03-19 15:19:30 -0300 | [diff] [blame] | 1084 | {.compatible = "allwinner,sun7i-a20-pll4-clk", .data = &sun7i_a20_pll4_data,}, |
Maxime Ripard | 92ef67c | 2014-02-05 14:05:03 +0100 | [diff] [blame] | 1085 | {.compatible = "allwinner,sun6i-a31-pll6-clk", .data = &sun6i_a31_pll6_data,}, |
Maxime Ripard | fd1b22f | 2014-02-06 09:55:57 +0100 | [diff] [blame] | 1086 | {.compatible = "allwinner,sun4i-a10-apb1-clk", .data = &sun4i_apb1_data,}, |
Chen-Yu Tsai | 6f86341 | 2013-12-24 21:26:17 +0800 | [diff] [blame] | 1087 | {.compatible = "allwinner,sun7i-a20-out-clk", .data = &sun7i_a20_out_data,}, |
Emilio López | e874a66 | 2013-02-25 11:44:26 -0300 | [diff] [blame] | 1088 | {} |
| 1089 | }; |
| 1090 | |
| 1091 | /* Matches for divider clocks */ |
Sachin Kamat | 52be7cc | 2013-08-12 14:44:06 +0530 | [diff] [blame] | 1092 | static const struct of_device_id clk_div_match[] __initconst = { |
Maxime Ripard | fd1b22f | 2014-02-06 09:55:57 +0100 | [diff] [blame] | 1093 | {.compatible = "allwinner,sun4i-a10-axi-clk", .data = &sun4i_axi_data,}, |
Chen-Yu Tsai | 515c1a4 | 2014-06-26 23:55:43 +0800 | [diff] [blame] | 1094 | {.compatible = "allwinner,sun8i-a23-axi-clk", .data = &sun8i_a23_axi_data,}, |
Maxime Ripard | fd1b22f | 2014-02-06 09:55:57 +0100 | [diff] [blame] | 1095 | {.compatible = "allwinner,sun4i-a10-ahb-clk", .data = &sun4i_ahb_data,}, |
| 1096 | {.compatible = "allwinner,sun4i-a10-apb0-clk", .data = &sun4i_apb0_data,}, |
Emilio López | e874a66 | 2013-02-25 11:44:26 -0300 | [diff] [blame] | 1097 | {} |
| 1098 | }; |
| 1099 | |
Emilio López | d584c13 | 2013-12-23 00:32:37 -0300 | [diff] [blame] | 1100 | /* Matches for divided outputs */ |
| 1101 | static const struct of_device_id clk_divs_match[] __initconst = { |
Maxime Ripard | fd1b22f | 2014-02-06 09:55:57 +0100 | [diff] [blame] | 1102 | {.compatible = "allwinner,sun4i-a10-pll5-clk", .data = &pll5_divs_data,}, |
| 1103 | {.compatible = "allwinner,sun4i-a10-pll6-clk", .data = &pll6_divs_data,}, |
Emilio López | d584c13 | 2013-12-23 00:32:37 -0300 | [diff] [blame] | 1104 | {} |
| 1105 | }; |
| 1106 | |
Emilio López | e874a66 | 2013-02-25 11:44:26 -0300 | [diff] [blame] | 1107 | /* Matches for mux clocks */ |
Sachin Kamat | 52be7cc | 2013-08-12 14:44:06 +0530 | [diff] [blame] | 1108 | static const struct of_device_id clk_mux_match[] __initconst = { |
Maxime Ripard | fd1b22f | 2014-02-06 09:55:57 +0100 | [diff] [blame] | 1109 | {.compatible = "allwinner,sun4i-a10-cpu-clk", .data = &sun4i_cpu_mux_data,}, |
Maxime Ripard | 6a721db | 2013-07-23 23:34:10 +0200 | [diff] [blame] | 1110 | {.compatible = "allwinner,sun6i-a31-ahb1-mux-clk", .data = &sun6i_a31_ahb1_mux_data,}, |
Emilio López | e874a66 | 2013-02-25 11:44:26 -0300 | [diff] [blame] | 1111 | {} |
| 1112 | }; |
| 1113 | |
Emilio López | 13569a7 | 2013-03-27 18:20:37 -0300 | [diff] [blame] | 1114 | /* Matches for gate clocks */ |
Sachin Kamat | 52be7cc | 2013-08-12 14:44:06 +0530 | [diff] [blame] | 1115 | static const struct of_device_id clk_gates_match[] __initconst = { |
Maxime Ripard | fd1b22f | 2014-02-06 09:55:57 +0100 | [diff] [blame] | 1116 | {.compatible = "allwinner,sun4i-a10-axi-gates-clk", .data = &sun4i_axi_gates_data,}, |
| 1117 | {.compatible = "allwinner,sun4i-a10-ahb-gates-clk", .data = &sun4i_ahb_gates_data,}, |
Maxime Ripard | 2371dd8 | 2013-07-16 11:21:59 +0200 | [diff] [blame] | 1118 | {.compatible = "allwinner,sun5i-a10s-ahb-gates-clk", .data = &sun5i_a10s_ahb_gates_data,}, |
Maxime Ripard | 4f985b4 | 2013-04-30 11:56:22 +0200 | [diff] [blame] | 1119 | {.compatible = "allwinner,sun5i-a13-ahb-gates-clk", .data = &sun5i_a13_ahb_gates_data,}, |
Maxime Ripard | 6a721db | 2013-07-23 23:34:10 +0200 | [diff] [blame] | 1120 | {.compatible = "allwinner,sun6i-a31-ahb1-gates-clk", .data = &sun6i_a31_ahb1_gates_data,}, |
Maxime Ripard | 1fb2e4a | 2013-07-25 21:06:56 +0200 | [diff] [blame] | 1121 | {.compatible = "allwinner,sun7i-a20-ahb-gates-clk", .data = &sun7i_a20_ahb_gates_data,}, |
Chen-Yu Tsai | 515c1a4 | 2014-06-26 23:55:43 +0800 | [diff] [blame] | 1122 | {.compatible = "allwinner,sun8i-a23-ahb1-gates-clk", .data = &sun8i_a23_ahb1_gates_data,}, |
Chen-Yu Tsai | 0b0f080 | 2014-10-20 22:10:28 +0800 | [diff] [blame] | 1123 | {.compatible = "allwinner,sun9i-a80-ahb0-gates-clk", .data = &sun9i_a80_ahb0_gates_data,}, |
| 1124 | {.compatible = "allwinner,sun9i-a80-ahb1-gates-clk", .data = &sun9i_a80_ahb1_gates_data,}, |
| 1125 | {.compatible = "allwinner,sun9i-a80-ahb2-gates-clk", .data = &sun9i_a80_ahb2_gates_data,}, |
Maxime Ripard | fd1b22f | 2014-02-06 09:55:57 +0100 | [diff] [blame] | 1126 | {.compatible = "allwinner,sun4i-a10-apb0-gates-clk", .data = &sun4i_apb0_gates_data,}, |
Maxime Ripard | 2371dd8 | 2013-07-16 11:21:59 +0200 | [diff] [blame] | 1127 | {.compatible = "allwinner,sun5i-a10s-apb0-gates-clk", .data = &sun5i_a10s_apb0_gates_data,}, |
Maxime Ripard | 4f985b4 | 2013-04-30 11:56:22 +0200 | [diff] [blame] | 1128 | {.compatible = "allwinner,sun5i-a13-apb0-gates-clk", .data = &sun5i_a13_apb0_gates_data,}, |
Maxime Ripard | 1fb2e4a | 2013-07-25 21:06:56 +0200 | [diff] [blame] | 1129 | {.compatible = "allwinner,sun7i-a20-apb0-gates-clk", .data = &sun7i_a20_apb0_gates_data,}, |
Chen-Yu Tsai | 0b0f080 | 2014-10-20 22:10:28 +0800 | [diff] [blame] | 1130 | {.compatible = "allwinner,sun9i-a80-apb0-gates-clk", .data = &sun9i_a80_apb0_gates_data,}, |
Maxime Ripard | fd1b22f | 2014-02-06 09:55:57 +0100 | [diff] [blame] | 1131 | {.compatible = "allwinner,sun4i-a10-apb1-gates-clk", .data = &sun4i_apb1_gates_data,}, |
Maxime Ripard | 2371dd8 | 2013-07-16 11:21:59 +0200 | [diff] [blame] | 1132 | {.compatible = "allwinner,sun5i-a10s-apb1-gates-clk", .data = &sun5i_a10s_apb1_gates_data,}, |
Maxime Ripard | 4f985b4 | 2013-04-30 11:56:22 +0200 | [diff] [blame] | 1133 | {.compatible = "allwinner,sun5i-a13-apb1-gates-clk", .data = &sun5i_a13_apb1_gates_data,}, |
Maxime Ripard | 6a721db | 2013-07-23 23:34:10 +0200 | [diff] [blame] | 1134 | {.compatible = "allwinner,sun6i-a31-apb1-gates-clk", .data = &sun6i_a31_apb1_gates_data,}, |
Maxime Ripard | 1fb2e4a | 2013-07-25 21:06:56 +0200 | [diff] [blame] | 1135 | {.compatible = "allwinner,sun7i-a20-apb1-gates-clk", .data = &sun7i_a20_apb1_gates_data,}, |
Chen-Yu Tsai | 515c1a4 | 2014-06-26 23:55:43 +0800 | [diff] [blame] | 1136 | {.compatible = "allwinner,sun8i-a23-apb1-gates-clk", .data = &sun8i_a23_apb1_gates_data,}, |
Chen-Yu Tsai | 0b0f080 | 2014-10-20 22:10:28 +0800 | [diff] [blame] | 1137 | {.compatible = "allwinner,sun9i-a80-apb1-gates-clk", .data = &sun9i_a80_apb1_gates_data,}, |
Maxime Ripard | 6a721db | 2013-07-23 23:34:10 +0200 | [diff] [blame] | 1138 | {.compatible = "allwinner,sun6i-a31-apb2-gates-clk", .data = &sun6i_a31_apb2_gates_data,}, |
Chen-Yu Tsai | 515c1a4 | 2014-06-26 23:55:43 +0800 | [diff] [blame] | 1139 | {.compatible = "allwinner,sun8i-a23-apb2-gates-clk", .data = &sun8i_a23_apb2_gates_data,}, |
Roman Byshko | 5abdbf2 | 2014-02-07 16:21:50 +0100 | [diff] [blame] | 1140 | {.compatible = "allwinner,sun4i-a10-usb-clk", .data = &sun4i_a10_usb_gates_data,}, |
| 1141 | {.compatible = "allwinner,sun5i-a13-usb-clk", .data = &sun5i_a13_usb_gates_data,}, |
Maxime Ripard | e0e7943 | 2014-05-13 17:44:15 +0200 | [diff] [blame] | 1142 | {.compatible = "allwinner,sun6i-a31-usb-clk", .data = &sun6i_a31_usb_gates_data,}, |
Emilio López | 13569a7 | 2013-03-27 18:20:37 -0300 | [diff] [blame] | 1143 | {} |
| 1144 | }; |
| 1145 | |
Emilio López | e874a66 | 2013-02-25 11:44:26 -0300 | [diff] [blame] | 1146 | static void __init of_sunxi_table_clock_setup(const struct of_device_id *clk_match, |
| 1147 | void *function) |
| 1148 | { |
| 1149 | struct device_node *np; |
| 1150 | const struct div_data *data; |
| 1151 | const struct of_device_id *match; |
| 1152 | void (*setup_function)(struct device_node *, const void *) = function; |
| 1153 | |
Rob Herring | cb7d5f4 | 2014-05-12 11:24:31 -0500 | [diff] [blame] | 1154 | for_each_matching_node_and_match(np, clk_match, &match) { |
Emilio López | e874a66 | 2013-02-25 11:44:26 -0300 | [diff] [blame] | 1155 | data = match->data; |
| 1156 | setup_function(np, data); |
| 1157 | } |
| 1158 | } |
| 1159 | |
Maxime Ripard | 134a669 | 2014-05-09 22:33:39 -0500 | [diff] [blame] | 1160 | static void __init sunxi_init_clocks(const char *clocks[], int nclocks) |
Emilio López | 8e6a4c4 | 2013-09-20 22:03:12 -0300 | [diff] [blame] | 1161 | { |
Maxime Ripard | 134a669 | 2014-05-09 22:33:39 -0500 | [diff] [blame] | 1162 | unsigned int i; |
Emilio López | 8e6a4c4 | 2013-09-20 22:03:12 -0300 | [diff] [blame] | 1163 | |
Emilio López | e874a66 | 2013-02-25 11:44:26 -0300 | [diff] [blame] | 1164 | /* Register factor clocks */ |
| 1165 | of_sunxi_table_clock_setup(clk_factors_match, sunxi_factors_clk_setup); |
| 1166 | |
| 1167 | /* Register divider clocks */ |
| 1168 | of_sunxi_table_clock_setup(clk_div_match, sunxi_divider_clk_setup); |
| 1169 | |
Emilio López | d584c13 | 2013-12-23 00:32:37 -0300 | [diff] [blame] | 1170 | /* Register divided output clocks */ |
| 1171 | of_sunxi_table_clock_setup(clk_divs_match, sunxi_divs_clk_setup); |
| 1172 | |
Emilio López | e874a66 | 2013-02-25 11:44:26 -0300 | [diff] [blame] | 1173 | /* Register mux clocks */ |
| 1174 | of_sunxi_table_clock_setup(clk_mux_match, sunxi_mux_clk_setup); |
Emilio López | 13569a7 | 2013-03-27 18:20:37 -0300 | [diff] [blame] | 1175 | |
| 1176 | /* Register gate clocks */ |
| 1177 | of_sunxi_table_clock_setup(clk_gates_match, sunxi_gates_clk_setup); |
Emilio López | 8e6a4c4 | 2013-09-20 22:03:12 -0300 | [diff] [blame] | 1178 | |
Maxime Ripard | 134a669 | 2014-05-09 22:33:39 -0500 | [diff] [blame] | 1179 | /* Protect the clocks that needs to stay on */ |
| 1180 | for (i = 0; i < nclocks; i++) { |
| 1181 | struct clk *clk = clk_get(NULL, clocks[i]); |
| 1182 | |
| 1183 | if (!IS_ERR(clk)) |
| 1184 | clk_prepare_enable(clk); |
| 1185 | } |
Emilio López | e874a66 | 2013-02-25 11:44:26 -0300 | [diff] [blame] | 1186 | } |
Maxime Ripard | 134a669 | 2014-05-09 22:33:39 -0500 | [diff] [blame] | 1187 | |
| 1188 | static const char *sun4i_a10_critical_clocks[] __initdata = { |
| 1189 | "pll5_ddr", |
Chen-Yu Tsai | 70eab19 | 2014-06-26 23:55:40 +0800 | [diff] [blame] | 1190 | "ahb_sdram", |
Maxime Ripard | 134a669 | 2014-05-09 22:33:39 -0500 | [diff] [blame] | 1191 | }; |
| 1192 | |
| 1193 | static void __init sun4i_a10_init_clocks(struct device_node *node) |
| 1194 | { |
| 1195 | sunxi_init_clocks(sun4i_a10_critical_clocks, |
| 1196 | ARRAY_SIZE(sun4i_a10_critical_clocks)); |
| 1197 | } |
| 1198 | CLK_OF_DECLARE(sun4i_a10_clk_init, "allwinner,sun4i-a10", sun4i_a10_init_clocks); |
| 1199 | |
| 1200 | static const char *sun5i_critical_clocks[] __initdata = { |
Maxime Ripard | 134a669 | 2014-05-09 22:33:39 -0500 | [diff] [blame] | 1201 | "pll5_ddr", |
Chen-Yu Tsai | 70eab19 | 2014-06-26 23:55:40 +0800 | [diff] [blame] | 1202 | "ahb_sdram", |
Maxime Ripard | 134a669 | 2014-05-09 22:33:39 -0500 | [diff] [blame] | 1203 | }; |
| 1204 | |
| 1205 | static void __init sun5i_init_clocks(struct device_node *node) |
| 1206 | { |
| 1207 | sunxi_init_clocks(sun5i_critical_clocks, |
| 1208 | ARRAY_SIZE(sun5i_critical_clocks)); |
| 1209 | } |
| 1210 | CLK_OF_DECLARE(sun5i_a10s_clk_init, "allwinner,sun5i-a10s", sun5i_init_clocks); |
| 1211 | CLK_OF_DECLARE(sun5i_a13_clk_init, "allwinner,sun5i-a13", sun5i_init_clocks); |
| 1212 | CLK_OF_DECLARE(sun7i_a20_clk_init, "allwinner,sun7i-a20", sun5i_init_clocks); |
| 1213 | |
| 1214 | static const char *sun6i_critical_clocks[] __initdata = { |
Maxime Ripard | 2df73f4 | 2014-05-09 22:33:40 -0500 | [diff] [blame] | 1215 | "cpu", |
Maxime Ripard | efb3184 | 2014-05-09 22:33:41 -0500 | [diff] [blame] | 1216 | "ahb1_sdram", |
Maxime Ripard | 134a669 | 2014-05-09 22:33:39 -0500 | [diff] [blame] | 1217 | }; |
| 1218 | |
| 1219 | static void __init sun6i_init_clocks(struct device_node *node) |
| 1220 | { |
| 1221 | sunxi_init_clocks(sun6i_critical_clocks, |
| 1222 | ARRAY_SIZE(sun6i_critical_clocks)); |
| 1223 | } |
| 1224 | CLK_OF_DECLARE(sun6i_a31_clk_init, "allwinner,sun6i-a31", sun6i_init_clocks); |
Chen-Yu Tsai | 515c1a4 | 2014-06-26 23:55:43 +0800 | [diff] [blame] | 1225 | CLK_OF_DECLARE(sun8i_a23_clk_init, "allwinner,sun8i-a23", sun6i_init_clocks); |
Chen-Yu Tsai | 0b0f080 | 2014-10-20 22:10:28 +0800 | [diff] [blame] | 1226 | |
| 1227 | static void __init sun9i_init_clocks(struct device_node *node) |
| 1228 | { |
| 1229 | sunxi_init_clocks(NULL, 0); |
| 1230 | } |
| 1231 | CLK_OF_DECLARE(sun9i_a80_clk_init, "allwinner,sun9i-a80", sun9i_init_clocks); |