blob: 8460c4807567c5626c752834d8b5645f5fa2028e [file] [log] [blame]
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001/*
2 * drivers/net/ethernet/mellanox/mlxsw/spectrum.c
3 * Copyright (c) 2015 Mellanox Technologies. All rights reserved.
4 * Copyright (c) 2015 Jiri Pirko <jiri@mellanox.com>
5 * Copyright (c) 2015 Ido Schimmel <idosch@mellanox.com>
6 * Copyright (c) 2015 Elad Raz <eladr@mellanox.com>
7 *
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions are met:
10 *
11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the distribution.
16 * 3. Neither the names of the copyright holders nor the names of its
17 * contributors may be used to endorse or promote products derived from
18 * this software without specific prior written permission.
19 *
20 * Alternatively, this software may be distributed under the terms of the
21 * GNU General Public License ("GPL") version 2 as published by the Free
22 * Software Foundation.
23 *
24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
27 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
28 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
29 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
30 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
31 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
32 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
33 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
34 * POSSIBILITY OF SUCH DAMAGE.
35 */
36
37#include <linux/kernel.h>
38#include <linux/module.h>
39#include <linux/types.h>
40#include <linux/netdevice.h>
41#include <linux/etherdevice.h>
42#include <linux/ethtool.h>
43#include <linux/slab.h>
44#include <linux/device.h>
45#include <linux/skbuff.h>
46#include <linux/if_vlan.h>
47#include <linux/if_bridge.h>
48#include <linux/workqueue.h>
49#include <linux/jiffies.h>
50#include <linux/bitops.h>
Ido Schimmel7f71eb42015-12-15 16:03:37 +010051#include <linux/list.h>
Ido Schimmel80bedf12016-06-20 23:03:59 +020052#include <linux/notifier.h>
Ido Schimmel90183b92016-04-06 17:10:08 +020053#include <linux/dcbnl.h>
Ido Schimmel99724c12016-07-04 08:23:14 +020054#include <linux/inetdevice.h>
Jiri Pirko56ade8f2015-10-16 14:01:37 +020055#include <net/switchdev.h>
56#include <generated/utsrelease.h>
Yotam Gigi763b4b72016-07-21 12:03:17 +020057#include <net/pkt_cls.h>
58#include <net/tc_act/tc_mirred.h>
Jiri Pirkoe7322632016-09-01 10:37:43 +020059#include <net/netevent.h>
Jiri Pirko56ade8f2015-10-16 14:01:37 +020060
61#include "spectrum.h"
62#include "core.h"
63#include "reg.h"
64#include "port.h"
65#include "trap.h"
66#include "txheader.h"
67
68static const char mlxsw_sp_driver_name[] = "mlxsw_spectrum";
69static const char mlxsw_sp_driver_version[] = "1.0";
70
71/* tx_hdr_version
72 * Tx header version.
73 * Must be set to 1.
74 */
75MLXSW_ITEM32(tx, hdr, version, 0x00, 28, 4);
76
77/* tx_hdr_ctl
78 * Packet control type.
79 * 0 - Ethernet control (e.g. EMADs, LACP)
80 * 1 - Ethernet data
81 */
82MLXSW_ITEM32(tx, hdr, ctl, 0x00, 26, 2);
83
84/* tx_hdr_proto
85 * Packet protocol type. Must be set to 1 (Ethernet).
86 */
87MLXSW_ITEM32(tx, hdr, proto, 0x00, 21, 3);
88
89/* tx_hdr_rx_is_router
90 * Packet is sent from the router. Valid for data packets only.
91 */
92MLXSW_ITEM32(tx, hdr, rx_is_router, 0x00, 19, 1);
93
94/* tx_hdr_fid_valid
95 * Indicates if the 'fid' field is valid and should be used for
96 * forwarding lookup. Valid for data packets only.
97 */
98MLXSW_ITEM32(tx, hdr, fid_valid, 0x00, 16, 1);
99
100/* tx_hdr_swid
101 * Switch partition ID. Must be set to 0.
102 */
103MLXSW_ITEM32(tx, hdr, swid, 0x00, 12, 3);
104
105/* tx_hdr_control_tclass
106 * Indicates if the packet should use the control TClass and not one
107 * of the data TClasses.
108 */
109MLXSW_ITEM32(tx, hdr, control_tclass, 0x00, 6, 1);
110
111/* tx_hdr_etclass
112 * Egress TClass to be used on the egress device on the egress port.
113 */
114MLXSW_ITEM32(tx, hdr, etclass, 0x00, 0, 4);
115
116/* tx_hdr_port_mid
117 * Destination local port for unicast packets.
118 * Destination multicast ID for multicast packets.
119 *
120 * Control packets are directed to a specific egress port, while data
121 * packets are transmitted through the CPU port (0) into the switch partition,
122 * where forwarding rules are applied.
123 */
124MLXSW_ITEM32(tx, hdr, port_mid, 0x04, 16, 16);
125
126/* tx_hdr_fid
127 * Forwarding ID used for L2 forwarding lookup. Valid only if 'fid_valid' is
128 * set, otherwise calculated based on the packet's VID using VID to FID mapping.
129 * Valid for data packets only.
130 */
131MLXSW_ITEM32(tx, hdr, fid, 0x08, 0, 16);
132
133/* tx_hdr_type
134 * 0 - Data packets
135 * 6 - Control packets
136 */
137MLXSW_ITEM32(tx, hdr, type, 0x0C, 0, 4);
138
Yotam Gigi763b4b72016-07-21 12:03:17 +0200139static bool mlxsw_sp_port_dev_check(const struct net_device *dev);
140
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200141static void mlxsw_sp_txhdr_construct(struct sk_buff *skb,
142 const struct mlxsw_tx_info *tx_info)
143{
144 char *txhdr = skb_push(skb, MLXSW_TXHDR_LEN);
145
146 memset(txhdr, 0, MLXSW_TXHDR_LEN);
147
148 mlxsw_tx_hdr_version_set(txhdr, MLXSW_TXHDR_VERSION_1);
149 mlxsw_tx_hdr_ctl_set(txhdr, MLXSW_TXHDR_ETH_CTL);
150 mlxsw_tx_hdr_proto_set(txhdr, MLXSW_TXHDR_PROTO_ETH);
151 mlxsw_tx_hdr_swid_set(txhdr, 0);
152 mlxsw_tx_hdr_control_tclass_set(txhdr, 1);
153 mlxsw_tx_hdr_port_mid_set(txhdr, tx_info->local_port);
154 mlxsw_tx_hdr_type_set(txhdr, MLXSW_TXHDR_TYPE_CONTROL);
155}
156
157static int mlxsw_sp_base_mac_get(struct mlxsw_sp *mlxsw_sp)
158{
159 char spad_pl[MLXSW_REG_SPAD_LEN];
160 int err;
161
162 err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(spad), spad_pl);
163 if (err)
164 return err;
165 mlxsw_reg_spad_base_mac_memcpy_from(spad_pl, mlxsw_sp->base_mac);
166 return 0;
167}
168
Yotam Gigi763b4b72016-07-21 12:03:17 +0200169static int mlxsw_sp_span_init(struct mlxsw_sp *mlxsw_sp)
170{
171 struct mlxsw_resources *resources;
172 int i;
173
174 resources = mlxsw_core_resources_get(mlxsw_sp->core);
175 if (!resources->max_span_valid)
176 return -EIO;
177
178 mlxsw_sp->span.entries_count = resources->max_span;
179 mlxsw_sp->span.entries = kcalloc(mlxsw_sp->span.entries_count,
180 sizeof(struct mlxsw_sp_span_entry),
181 GFP_KERNEL);
182 if (!mlxsw_sp->span.entries)
183 return -ENOMEM;
184
185 for (i = 0; i < mlxsw_sp->span.entries_count; i++)
186 INIT_LIST_HEAD(&mlxsw_sp->span.entries[i].bound_ports_list);
187
188 return 0;
189}
190
191static void mlxsw_sp_span_fini(struct mlxsw_sp *mlxsw_sp)
192{
193 int i;
194
195 for (i = 0; i < mlxsw_sp->span.entries_count; i++) {
196 struct mlxsw_sp_span_entry *curr = &mlxsw_sp->span.entries[i];
197
198 WARN_ON_ONCE(!list_empty(&curr->bound_ports_list));
199 }
200 kfree(mlxsw_sp->span.entries);
201}
202
203static struct mlxsw_sp_span_entry *
204mlxsw_sp_span_entry_create(struct mlxsw_sp_port *port)
205{
206 struct mlxsw_sp *mlxsw_sp = port->mlxsw_sp;
207 struct mlxsw_sp_span_entry *span_entry;
208 char mpat_pl[MLXSW_REG_MPAT_LEN];
209 u8 local_port = port->local_port;
210 int index;
211 int i;
212 int err;
213
214 /* find a free entry to use */
215 index = -1;
216 for (i = 0; i < mlxsw_sp->span.entries_count; i++) {
217 if (!mlxsw_sp->span.entries[i].used) {
218 index = i;
219 span_entry = &mlxsw_sp->span.entries[i];
220 break;
221 }
222 }
223 if (index < 0)
224 return NULL;
225
226 /* create a new port analayzer entry for local_port */
227 mlxsw_reg_mpat_pack(mpat_pl, index, local_port, true);
228 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(mpat), mpat_pl);
229 if (err)
230 return NULL;
231
232 span_entry->used = true;
233 span_entry->id = index;
Yotam Gigi2d644d42016-11-11 16:34:25 +0100234 span_entry->ref_count = 1;
Yotam Gigi763b4b72016-07-21 12:03:17 +0200235 span_entry->local_port = local_port;
236 return span_entry;
237}
238
239static void mlxsw_sp_span_entry_destroy(struct mlxsw_sp *mlxsw_sp,
240 struct mlxsw_sp_span_entry *span_entry)
241{
242 u8 local_port = span_entry->local_port;
243 char mpat_pl[MLXSW_REG_MPAT_LEN];
244 int pa_id = span_entry->id;
245
246 mlxsw_reg_mpat_pack(mpat_pl, pa_id, local_port, false);
247 mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(mpat), mpat_pl);
248 span_entry->used = false;
249}
250
Ido Schimmel1a9234e662016-09-19 08:29:26 +0200251static struct mlxsw_sp_span_entry *
Yuval Mintzf860ca52017-09-12 08:50:53 +0200252mlxsw_sp_span_entry_find(struct mlxsw_sp *mlxsw_sp, u8 local_port)
Yotam Gigi763b4b72016-07-21 12:03:17 +0200253{
Yotam Gigi763b4b72016-07-21 12:03:17 +0200254 int i;
255
256 for (i = 0; i < mlxsw_sp->span.entries_count; i++) {
257 struct mlxsw_sp_span_entry *curr = &mlxsw_sp->span.entries[i];
258
Yuval Mintzf860ca52017-09-12 08:50:53 +0200259 if (curr->used && curr->local_port == local_port)
Yotam Gigi763b4b72016-07-21 12:03:17 +0200260 return curr;
261 }
262 return NULL;
263}
264
Ido Schimmel1a9234e662016-09-19 08:29:26 +0200265static struct mlxsw_sp_span_entry
266*mlxsw_sp_span_entry_get(struct mlxsw_sp_port *port)
Yotam Gigi763b4b72016-07-21 12:03:17 +0200267{
268 struct mlxsw_sp_span_entry *span_entry;
269
Yuval Mintzf860ca52017-09-12 08:50:53 +0200270 span_entry = mlxsw_sp_span_entry_find(port->mlxsw_sp,
271 port->local_port);
Yotam Gigi763b4b72016-07-21 12:03:17 +0200272 if (span_entry) {
Yotam Gigi2d644d42016-11-11 16:34:25 +0100273 /* Already exists, just take a reference */
Yotam Gigi763b4b72016-07-21 12:03:17 +0200274 span_entry->ref_count++;
275 return span_entry;
276 }
277
278 return mlxsw_sp_span_entry_create(port);
279}
280
281static int mlxsw_sp_span_entry_put(struct mlxsw_sp *mlxsw_sp,
282 struct mlxsw_sp_span_entry *span_entry)
283{
Yotam Gigi2d644d42016-11-11 16:34:25 +0100284 WARN_ON(!span_entry->ref_count);
Yotam Gigi763b4b72016-07-21 12:03:17 +0200285 if (--span_entry->ref_count == 0)
286 mlxsw_sp_span_entry_destroy(mlxsw_sp, span_entry);
287 return 0;
288}
289
290static bool mlxsw_sp_span_is_egress_mirror(struct mlxsw_sp_port *port)
291{
292 struct mlxsw_sp *mlxsw_sp = port->mlxsw_sp;
293 struct mlxsw_sp_span_inspected_port *p;
294 int i;
295
296 for (i = 0; i < mlxsw_sp->span.entries_count; i++) {
297 struct mlxsw_sp_span_entry *curr = &mlxsw_sp->span.entries[i];
298
299 list_for_each_entry(p, &curr->bound_ports_list, list)
300 if (p->local_port == port->local_port &&
301 p->type == MLXSW_SP_SPAN_EGRESS)
302 return true;
303 }
304
305 return false;
306}
307
308static int mlxsw_sp_span_mtu_to_buffsize(int mtu)
309{
310 return MLXSW_SP_BYTES_TO_CELLS(mtu * 5 / 2) + 1;
311}
312
313static int mlxsw_sp_span_port_mtu_update(struct mlxsw_sp_port *port, u16 mtu)
314{
315 struct mlxsw_sp *mlxsw_sp = port->mlxsw_sp;
316 char sbib_pl[MLXSW_REG_SBIB_LEN];
317 int err;
318
319 /* If port is egress mirrored, the shared buffer size should be
320 * updated according to the mtu value
321 */
322 if (mlxsw_sp_span_is_egress_mirror(port)) {
323 mlxsw_reg_sbib_pack(sbib_pl, port->local_port,
324 mlxsw_sp_span_mtu_to_buffsize(mtu));
325 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sbib), sbib_pl);
326 if (err) {
327 netdev_err(port->dev, "Could not update shared buffer for mirroring\n");
328 return err;
329 }
330 }
331
332 return 0;
333}
334
335static struct mlxsw_sp_span_inspected_port *
336mlxsw_sp_span_entry_bound_port_find(struct mlxsw_sp_port *port,
337 struct mlxsw_sp_span_entry *span_entry)
338{
339 struct mlxsw_sp_span_inspected_port *p;
340
341 list_for_each_entry(p, &span_entry->bound_ports_list, list)
342 if (port->local_port == p->local_port)
343 return p;
344 return NULL;
345}
346
347static int
348mlxsw_sp_span_inspected_port_bind(struct mlxsw_sp_port *port,
349 struct mlxsw_sp_span_entry *span_entry,
350 enum mlxsw_sp_span_type type)
351{
352 struct mlxsw_sp_span_inspected_port *inspected_port;
353 struct mlxsw_sp *mlxsw_sp = port->mlxsw_sp;
354 char mpar_pl[MLXSW_REG_MPAR_LEN];
355 char sbib_pl[MLXSW_REG_SBIB_LEN];
356 int pa_id = span_entry->id;
357 int err;
358
359 /* if it is an egress SPAN, bind a shared buffer to it */
360 if (type == MLXSW_SP_SPAN_EGRESS) {
361 mlxsw_reg_sbib_pack(sbib_pl, port->local_port,
362 mlxsw_sp_span_mtu_to_buffsize(port->dev->mtu));
363 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sbib), sbib_pl);
364 if (err) {
365 netdev_err(port->dev, "Could not create shared buffer for mirroring\n");
366 return err;
367 }
368 }
369
370 /* bind the port to the SPAN entry */
Ido Schimmel1a9234e662016-09-19 08:29:26 +0200371 mlxsw_reg_mpar_pack(mpar_pl, port->local_port,
372 (enum mlxsw_reg_mpar_i_e) type, true, pa_id);
Yotam Gigi763b4b72016-07-21 12:03:17 +0200373 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(mpar), mpar_pl);
374 if (err)
375 goto err_mpar_reg_write;
376
377 inspected_port = kzalloc(sizeof(*inspected_port), GFP_KERNEL);
378 if (!inspected_port) {
379 err = -ENOMEM;
380 goto err_inspected_port_alloc;
381 }
382 inspected_port->local_port = port->local_port;
383 inspected_port->type = type;
384 list_add_tail(&inspected_port->list, &span_entry->bound_ports_list);
385
386 return 0;
387
388err_mpar_reg_write:
389err_inspected_port_alloc:
390 if (type == MLXSW_SP_SPAN_EGRESS) {
391 mlxsw_reg_sbib_pack(sbib_pl, port->local_port, 0);
392 mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sbib), sbib_pl);
393 }
394 return err;
395}
396
397static void
398mlxsw_sp_span_inspected_port_unbind(struct mlxsw_sp_port *port,
399 struct mlxsw_sp_span_entry *span_entry,
400 enum mlxsw_sp_span_type type)
401{
402 struct mlxsw_sp_span_inspected_port *inspected_port;
403 struct mlxsw_sp *mlxsw_sp = port->mlxsw_sp;
404 char mpar_pl[MLXSW_REG_MPAR_LEN];
405 char sbib_pl[MLXSW_REG_SBIB_LEN];
406 int pa_id = span_entry->id;
407
408 inspected_port = mlxsw_sp_span_entry_bound_port_find(port, span_entry);
409 if (!inspected_port)
410 return;
411
412 /* remove the inspected port */
Ido Schimmel1a9234e662016-09-19 08:29:26 +0200413 mlxsw_reg_mpar_pack(mpar_pl, port->local_port,
414 (enum mlxsw_reg_mpar_i_e) type, false, pa_id);
Yotam Gigi763b4b72016-07-21 12:03:17 +0200415 mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(mpar), mpar_pl);
416
417 /* remove the SBIB buffer if it was egress SPAN */
418 if (type == MLXSW_SP_SPAN_EGRESS) {
419 mlxsw_reg_sbib_pack(sbib_pl, port->local_port, 0);
420 mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sbib), sbib_pl);
421 }
422
423 mlxsw_sp_span_entry_put(mlxsw_sp, span_entry);
424
425 list_del(&inspected_port->list);
426 kfree(inspected_port);
427}
428
429static int mlxsw_sp_span_mirror_add(struct mlxsw_sp_port *from,
430 struct mlxsw_sp_port *to,
431 enum mlxsw_sp_span_type type)
432{
433 struct mlxsw_sp *mlxsw_sp = from->mlxsw_sp;
434 struct mlxsw_sp_span_entry *span_entry;
435 int err;
436
437 span_entry = mlxsw_sp_span_entry_get(to);
438 if (!span_entry)
439 return -ENOENT;
440
441 netdev_dbg(from->dev, "Adding inspected port to SPAN entry %d\n",
442 span_entry->id);
443
444 err = mlxsw_sp_span_inspected_port_bind(from, span_entry, type);
445 if (err)
446 goto err_port_bind;
447
448 return 0;
449
450err_port_bind:
451 mlxsw_sp_span_entry_put(mlxsw_sp, span_entry);
452 return err;
453}
454
455static void mlxsw_sp_span_mirror_remove(struct mlxsw_sp_port *from,
Yuval Mintzf860ca52017-09-12 08:50:53 +0200456 u8 destination_port,
Yotam Gigi763b4b72016-07-21 12:03:17 +0200457 enum mlxsw_sp_span_type type)
458{
459 struct mlxsw_sp_span_entry *span_entry;
460
Yuval Mintzf860ca52017-09-12 08:50:53 +0200461 span_entry = mlxsw_sp_span_entry_find(from->mlxsw_sp,
462 destination_port);
Yotam Gigi763b4b72016-07-21 12:03:17 +0200463 if (!span_entry) {
464 netdev_err(from->dev, "no span entry found\n");
465 return;
466 }
467
468 netdev_dbg(from->dev, "removing inspected port from SPAN entry %d\n",
469 span_entry->id);
470 mlxsw_sp_span_inspected_port_unbind(from, span_entry, type);
471}
472
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200473static int mlxsw_sp_port_admin_status_set(struct mlxsw_sp_port *mlxsw_sp_port,
474 bool is_up)
475{
476 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
477 char paos_pl[MLXSW_REG_PAOS_LEN];
478
479 mlxsw_reg_paos_pack(paos_pl, mlxsw_sp_port->local_port,
480 is_up ? MLXSW_PORT_ADMIN_STATUS_UP :
481 MLXSW_PORT_ADMIN_STATUS_DOWN);
482 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(paos), paos_pl);
483}
484
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200485static int mlxsw_sp_port_dev_addr_set(struct mlxsw_sp_port *mlxsw_sp_port,
486 unsigned char *addr)
487{
488 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
489 char ppad_pl[MLXSW_REG_PPAD_LEN];
490
491 mlxsw_reg_ppad_pack(ppad_pl, true, mlxsw_sp_port->local_port);
492 mlxsw_reg_ppad_mac_memcpy_to(ppad_pl, addr);
493 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ppad), ppad_pl);
494}
495
496static int mlxsw_sp_port_dev_addr_init(struct mlxsw_sp_port *mlxsw_sp_port)
497{
498 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
499 unsigned char *addr = mlxsw_sp_port->dev->dev_addr;
500
501 ether_addr_copy(addr, mlxsw_sp->base_mac);
502 addr[ETH_ALEN - 1] += mlxsw_sp_port->local_port;
503 return mlxsw_sp_port_dev_addr_set(mlxsw_sp_port, addr);
504}
505
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200506static int mlxsw_sp_port_mtu_set(struct mlxsw_sp_port *mlxsw_sp_port, u16 mtu)
507{
508 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
509 char pmtu_pl[MLXSW_REG_PMTU_LEN];
510 int max_mtu;
511 int err;
512
513 mtu += MLXSW_TXHDR_LEN + ETH_HLEN;
514 mlxsw_reg_pmtu_pack(pmtu_pl, mlxsw_sp_port->local_port, 0);
515 err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(pmtu), pmtu_pl);
516 if (err)
517 return err;
518 max_mtu = mlxsw_reg_pmtu_max_mtu_get(pmtu_pl);
519
520 if (mtu > max_mtu)
521 return -EINVAL;
522
523 mlxsw_reg_pmtu_pack(pmtu_pl, mlxsw_sp_port->local_port, mtu);
524 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(pmtu), pmtu_pl);
525}
526
Ido Schimmelbe945352016-06-09 09:51:39 +0200527static int __mlxsw_sp_port_swid_set(struct mlxsw_sp *mlxsw_sp, u8 local_port,
528 u8 swid)
529{
530 char pspa_pl[MLXSW_REG_PSPA_LEN];
531
532 mlxsw_reg_pspa_pack(pspa_pl, swid, local_port);
533 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(pspa), pspa_pl);
534}
535
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200536static int mlxsw_sp_port_swid_set(struct mlxsw_sp_port *mlxsw_sp_port, u8 swid)
537{
538 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200539
Ido Schimmelbe945352016-06-09 09:51:39 +0200540 return __mlxsw_sp_port_swid_set(mlxsw_sp, mlxsw_sp_port->local_port,
541 swid);
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200542}
543
544static int mlxsw_sp_port_vp_mode_set(struct mlxsw_sp_port *mlxsw_sp_port,
545 bool enable)
546{
547 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
548 char svpe_pl[MLXSW_REG_SVPE_LEN];
549
550 mlxsw_reg_svpe_pack(svpe_pl, mlxsw_sp_port->local_port, enable);
551 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(svpe), svpe_pl);
552}
553
554int mlxsw_sp_port_vid_to_fid_set(struct mlxsw_sp_port *mlxsw_sp_port,
555 enum mlxsw_reg_svfa_mt mt, bool valid, u16 fid,
556 u16 vid)
557{
558 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
559 char svfa_pl[MLXSW_REG_SVFA_LEN];
560
561 mlxsw_reg_svfa_pack(svfa_pl, mlxsw_sp_port->local_port, mt, valid,
562 fid, vid);
563 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(svfa), svfa_pl);
564}
565
Ido Schimmel584d73d2016-08-24 12:00:26 +0200566int __mlxsw_sp_port_vid_learning_set(struct mlxsw_sp_port *mlxsw_sp_port,
567 u16 vid_begin, u16 vid_end,
568 bool learn_enable)
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200569{
570 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
571 char *spvmlr_pl;
572 int err;
573
574 spvmlr_pl = kmalloc(MLXSW_REG_SPVMLR_LEN, GFP_KERNEL);
575 if (!spvmlr_pl)
576 return -ENOMEM;
Ido Schimmel584d73d2016-08-24 12:00:26 +0200577 mlxsw_reg_spvmlr_pack(spvmlr_pl, mlxsw_sp_port->local_port, vid_begin,
578 vid_end, learn_enable);
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200579 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(spvmlr), spvmlr_pl);
580 kfree(spvmlr_pl);
581 return err;
582}
583
Ido Schimmel584d73d2016-08-24 12:00:26 +0200584static int mlxsw_sp_port_vid_learning_set(struct mlxsw_sp_port *mlxsw_sp_port,
585 u16 vid, bool learn_enable)
586{
587 return __mlxsw_sp_port_vid_learning_set(mlxsw_sp_port, vid, vid,
588 learn_enable);
589}
590
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200591static int
592mlxsw_sp_port_system_port_mapping_set(struct mlxsw_sp_port *mlxsw_sp_port)
593{
594 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
595 char sspr_pl[MLXSW_REG_SSPR_LEN];
596
597 mlxsw_reg_sspr_pack(sspr_pl, mlxsw_sp_port->local_port);
598 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sspr), sspr_pl);
599}
600
Ido Schimmeld664b412016-06-09 09:51:40 +0200601static int mlxsw_sp_port_module_info_get(struct mlxsw_sp *mlxsw_sp,
602 u8 local_port, u8 *p_module,
603 u8 *p_width, u8 *p_lane)
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200604{
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200605 char pmlp_pl[MLXSW_REG_PMLP_LEN];
606 int err;
607
Ido Schimmel558c2d52016-02-26 17:32:29 +0100608 mlxsw_reg_pmlp_pack(pmlp_pl, local_port);
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200609 err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(pmlp), pmlp_pl);
610 if (err)
611 return err;
Ido Schimmel558c2d52016-02-26 17:32:29 +0100612 *p_module = mlxsw_reg_pmlp_module_get(pmlp_pl, 0);
613 *p_width = mlxsw_reg_pmlp_width_get(pmlp_pl);
Ido Schimmel2bf9a582016-04-05 10:20:04 +0200614 *p_lane = mlxsw_reg_pmlp_tx_lane_get(pmlp_pl, 0);
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200615 return 0;
616}
617
Ido Schimmel18f1e702016-02-26 17:32:31 +0100618static int mlxsw_sp_port_module_map(struct mlxsw_sp *mlxsw_sp, u8 local_port,
619 u8 module, u8 width, u8 lane)
620{
621 char pmlp_pl[MLXSW_REG_PMLP_LEN];
622 int i;
623
624 mlxsw_reg_pmlp_pack(pmlp_pl, local_port);
625 mlxsw_reg_pmlp_width_set(pmlp_pl, width);
626 for (i = 0; i < width; i++) {
627 mlxsw_reg_pmlp_module_set(pmlp_pl, i, module);
628 mlxsw_reg_pmlp_tx_lane_set(pmlp_pl, i, lane + i); /* Rx & Tx */
629 }
630
631 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(pmlp), pmlp_pl);
632}
633
Ido Schimmel3e9b27b2016-02-26 17:32:28 +0100634static int mlxsw_sp_port_module_unmap(struct mlxsw_sp *mlxsw_sp, u8 local_port)
635{
636 char pmlp_pl[MLXSW_REG_PMLP_LEN];
637
638 mlxsw_reg_pmlp_pack(pmlp_pl, local_port);
639 mlxsw_reg_pmlp_width_set(pmlp_pl, 0);
640 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(pmlp), pmlp_pl);
641}
642
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200643static int mlxsw_sp_port_open(struct net_device *dev)
644{
645 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
646 int err;
647
648 err = mlxsw_sp_port_admin_status_set(mlxsw_sp_port, true);
649 if (err)
650 return err;
651 netif_start_queue(dev);
652 return 0;
653}
654
655static int mlxsw_sp_port_stop(struct net_device *dev)
656{
657 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
658
659 netif_stop_queue(dev);
660 return mlxsw_sp_port_admin_status_set(mlxsw_sp_port, false);
661}
662
663static netdev_tx_t mlxsw_sp_port_xmit(struct sk_buff *skb,
664 struct net_device *dev)
665{
666 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
667 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
668 struct mlxsw_sp_port_pcpu_stats *pcpu_stats;
669 const struct mlxsw_tx_info tx_info = {
670 .local_port = mlxsw_sp_port->local_port,
671 .is_emad = false,
672 };
673 u64 len;
674 int err;
675
Jiri Pirko307c2432016-04-08 19:11:22 +0200676 if (mlxsw_core_skb_transmit_busy(mlxsw_sp->core, &tx_info))
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200677 return NETDEV_TX_BUSY;
678
679 if (unlikely(skb_headroom(skb) < MLXSW_TXHDR_LEN)) {
680 struct sk_buff *skb_orig = skb;
681
682 skb = skb_realloc_headroom(skb, MLXSW_TXHDR_LEN);
683 if (!skb) {
684 this_cpu_inc(mlxsw_sp_port->pcpu_stats->tx_dropped);
685 dev_kfree_skb_any(skb_orig);
686 return NETDEV_TX_OK;
687 }
Arkadi Sharshevsky7c249f32017-01-12 09:10:37 +0100688 dev_consume_skb_any(skb_orig);
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200689 }
690
691 if (eth_skb_pad(skb)) {
692 this_cpu_inc(mlxsw_sp_port->pcpu_stats->tx_dropped);
693 return NETDEV_TX_OK;
694 }
695
696 mlxsw_sp_txhdr_construct(skb, &tx_info);
Nogah Frankel63dcdd32016-06-17 15:09:05 +0200697 /* TX header is consumed by HW on the way so we shouldn't count its
698 * bytes as being sent.
699 */
700 len = skb->len - MLXSW_TXHDR_LEN;
701
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200702 /* Due to a race we might fail here because of a full queue. In that
703 * unlikely case we simply drop the packet.
704 */
Jiri Pirko307c2432016-04-08 19:11:22 +0200705 err = mlxsw_core_skb_transmit(mlxsw_sp->core, skb, &tx_info);
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200706
707 if (!err) {
708 pcpu_stats = this_cpu_ptr(mlxsw_sp_port->pcpu_stats);
709 u64_stats_update_begin(&pcpu_stats->syncp);
710 pcpu_stats->tx_packets++;
711 pcpu_stats->tx_bytes += len;
712 u64_stats_update_end(&pcpu_stats->syncp);
713 } else {
714 this_cpu_inc(mlxsw_sp_port->pcpu_stats->tx_dropped);
715 dev_kfree_skb_any(skb);
716 }
717 return NETDEV_TX_OK;
718}
719
Jiri Pirkoc5b9b512015-12-03 12:12:22 +0100720static void mlxsw_sp_set_rx_mode(struct net_device *dev)
721{
722}
723
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200724static int mlxsw_sp_port_set_mac_address(struct net_device *dev, void *p)
725{
726 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
727 struct sockaddr *addr = p;
728 int err;
729
730 if (!is_valid_ether_addr(addr->sa_data))
731 return -EADDRNOTAVAIL;
732
733 err = mlxsw_sp_port_dev_addr_set(mlxsw_sp_port, addr->sa_data);
734 if (err)
735 return err;
736 memcpy(dev->dev_addr, addr->sa_data, dev->addr_len);
737 return 0;
738}
739
Ido Schimmel9f7ec052016-04-06 17:10:14 +0200740static void mlxsw_sp_pg_buf_pack(char *pbmc_pl, int pg_index, int mtu,
Ido Schimmeld81a6bd2016-04-06 17:10:16 +0200741 bool pause_en, bool pfc_en, u16 delay)
Ido Schimmel8e8dfe92016-04-06 17:10:10 +0200742{
743 u16 pg_size = 2 * MLXSW_SP_BYTES_TO_CELLS(mtu);
744
Ido Schimmeld81a6bd2016-04-06 17:10:16 +0200745 delay = pfc_en ? mlxsw_sp_pfc_delay_get(mtu, delay) :
746 MLXSW_SP_PAUSE_DELAY;
Ido Schimmel9f7ec052016-04-06 17:10:14 +0200747
Ido Schimmeld81a6bd2016-04-06 17:10:16 +0200748 if (pause_en || pfc_en)
Ido Schimmel9f7ec052016-04-06 17:10:14 +0200749 mlxsw_reg_pbmc_lossless_buffer_pack(pbmc_pl, pg_index,
Ido Schimmeld81a6bd2016-04-06 17:10:16 +0200750 pg_size + delay, pg_size);
751 else
Ido Schimmel9f7ec052016-04-06 17:10:14 +0200752 mlxsw_reg_pbmc_lossy_buffer_pack(pbmc_pl, pg_index, pg_size);
Ido Schimmel8e8dfe92016-04-06 17:10:10 +0200753}
754
755int __mlxsw_sp_port_headroom_set(struct mlxsw_sp_port *mlxsw_sp_port, int mtu,
Ido Schimmeld81a6bd2016-04-06 17:10:16 +0200756 u8 *prio_tc, bool pause_en,
757 struct ieee_pfc *my_pfc)
Ido Schimmelff6551e2016-04-06 17:10:03 +0200758{
759 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
Ido Schimmeld81a6bd2016-04-06 17:10:16 +0200760 u8 pfc_en = !!my_pfc ? my_pfc->pfc_en : 0;
761 u16 delay = !!my_pfc ? my_pfc->delay : 0;
Ido Schimmelff6551e2016-04-06 17:10:03 +0200762 char pbmc_pl[MLXSW_REG_PBMC_LEN];
Ido Schimmel8e8dfe92016-04-06 17:10:10 +0200763 int i, j, err;
Ido Schimmelff6551e2016-04-06 17:10:03 +0200764
765 mlxsw_reg_pbmc_pack(pbmc_pl, mlxsw_sp_port->local_port, 0, 0);
766 err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(pbmc), pbmc_pl);
767 if (err)
768 return err;
Ido Schimmel8e8dfe92016-04-06 17:10:10 +0200769
770 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
771 bool configure = false;
Ido Schimmeld81a6bd2016-04-06 17:10:16 +0200772 bool pfc = false;
Ido Schimmel8e8dfe92016-04-06 17:10:10 +0200773
774 for (j = 0; j < IEEE_8021QAZ_MAX_TCS; j++) {
775 if (prio_tc[j] == i) {
Ido Schimmeld81a6bd2016-04-06 17:10:16 +0200776 pfc = pfc_en & BIT(j);
Ido Schimmel8e8dfe92016-04-06 17:10:10 +0200777 configure = true;
778 break;
779 }
780 }
781
782 if (!configure)
783 continue;
Ido Schimmeld81a6bd2016-04-06 17:10:16 +0200784 mlxsw_sp_pg_buf_pack(pbmc_pl, i, mtu, pause_en, pfc, delay);
Ido Schimmel8e8dfe92016-04-06 17:10:10 +0200785 }
786
Ido Schimmelff6551e2016-04-06 17:10:03 +0200787 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(pbmc), pbmc_pl);
788}
789
Ido Schimmel8e8dfe92016-04-06 17:10:10 +0200790static int mlxsw_sp_port_headroom_set(struct mlxsw_sp_port *mlxsw_sp_port,
Ido Schimmel9f7ec052016-04-06 17:10:14 +0200791 int mtu, bool pause_en)
Ido Schimmel8e8dfe92016-04-06 17:10:10 +0200792{
793 u8 def_prio_tc[IEEE_8021QAZ_MAX_TCS] = {0};
794 bool dcb_en = !!mlxsw_sp_port->dcb.ets;
Ido Schimmeld81a6bd2016-04-06 17:10:16 +0200795 struct ieee_pfc *my_pfc;
Ido Schimmel8e8dfe92016-04-06 17:10:10 +0200796 u8 *prio_tc;
797
798 prio_tc = dcb_en ? mlxsw_sp_port->dcb.ets->prio_tc : def_prio_tc;
Ido Schimmeld81a6bd2016-04-06 17:10:16 +0200799 my_pfc = dcb_en ? mlxsw_sp_port->dcb.pfc : NULL;
Ido Schimmel8e8dfe92016-04-06 17:10:10 +0200800
Ido Schimmel9f7ec052016-04-06 17:10:14 +0200801 return __mlxsw_sp_port_headroom_set(mlxsw_sp_port, mtu, prio_tc,
Ido Schimmeld81a6bd2016-04-06 17:10:16 +0200802 pause_en, my_pfc);
Ido Schimmel8e8dfe92016-04-06 17:10:10 +0200803}
804
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200805static int mlxsw_sp_port_change_mtu(struct net_device *dev, int mtu)
806{
807 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
Ido Schimmel9f7ec052016-04-06 17:10:14 +0200808 bool pause_en = mlxsw_sp_port_is_pause_en(mlxsw_sp_port);
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200809 int err;
810
Ido Schimmel9f7ec052016-04-06 17:10:14 +0200811 err = mlxsw_sp_port_headroom_set(mlxsw_sp_port, mtu, pause_en);
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200812 if (err)
813 return err;
Yotam Gigi763b4b72016-07-21 12:03:17 +0200814 err = mlxsw_sp_span_port_mtu_update(mlxsw_sp_port, mtu);
815 if (err)
816 goto err_span_port_mtu_update;
Ido Schimmelff6551e2016-04-06 17:10:03 +0200817 err = mlxsw_sp_port_mtu_set(mlxsw_sp_port, mtu);
818 if (err)
819 goto err_port_mtu_set;
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200820 dev->mtu = mtu;
821 return 0;
Ido Schimmelff6551e2016-04-06 17:10:03 +0200822
823err_port_mtu_set:
Yotam Gigi763b4b72016-07-21 12:03:17 +0200824 mlxsw_sp_span_port_mtu_update(mlxsw_sp_port, dev->mtu);
825err_span_port_mtu_update:
Ido Schimmel9f7ec052016-04-06 17:10:14 +0200826 mlxsw_sp_port_headroom_set(mlxsw_sp_port, dev->mtu, pause_en);
Ido Schimmelff6551e2016-04-06 17:10:03 +0200827 return err;
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200828}
829
Or Gerlitz4bdcc6c2016-09-20 08:14:08 +0300830static int
Nogah Frankelfc1bbb02016-09-16 15:05:38 +0200831mlxsw_sp_port_get_sw_stats64(const struct net_device *dev,
832 struct rtnl_link_stats64 *stats)
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200833{
834 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
835 struct mlxsw_sp_port_pcpu_stats *p;
836 u64 rx_packets, rx_bytes, tx_packets, tx_bytes;
837 u32 tx_dropped = 0;
838 unsigned int start;
839 int i;
840
841 for_each_possible_cpu(i) {
842 p = per_cpu_ptr(mlxsw_sp_port->pcpu_stats, i);
843 do {
844 start = u64_stats_fetch_begin_irq(&p->syncp);
845 rx_packets = p->rx_packets;
846 rx_bytes = p->rx_bytes;
847 tx_packets = p->tx_packets;
848 tx_bytes = p->tx_bytes;
849 } while (u64_stats_fetch_retry_irq(&p->syncp, start));
850
851 stats->rx_packets += rx_packets;
852 stats->rx_bytes += rx_bytes;
853 stats->tx_packets += tx_packets;
854 stats->tx_bytes += tx_bytes;
855 /* tx_dropped is u32, updated without syncp protection. */
856 tx_dropped += p->tx_dropped;
857 }
858 stats->tx_dropped = tx_dropped;
Nogah Frankelfc1bbb02016-09-16 15:05:38 +0200859 return 0;
860}
861
Or Gerlitz4bdcc6c2016-09-20 08:14:08 +0300862static bool mlxsw_sp_port_has_offload_stats(int attr_id)
Nogah Frankelfc1bbb02016-09-16 15:05:38 +0200863{
864 switch (attr_id) {
865 case IFLA_OFFLOAD_XSTATS_CPU_HIT:
866 return true;
867 }
868
869 return false;
870}
871
Or Gerlitz4bdcc6c2016-09-20 08:14:08 +0300872static int mlxsw_sp_port_get_offload_stats(int attr_id, const struct net_device *dev,
873 void *sp)
Nogah Frankelfc1bbb02016-09-16 15:05:38 +0200874{
875 switch (attr_id) {
876 case IFLA_OFFLOAD_XSTATS_CPU_HIT:
877 return mlxsw_sp_port_get_sw_stats64(dev, sp);
878 }
879
880 return -EINVAL;
881}
882
883static int mlxsw_sp_port_get_stats_raw(struct net_device *dev, int grp,
884 int prio, char *ppcnt_pl)
885{
886 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
887 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
888
889 mlxsw_reg_ppcnt_pack(ppcnt_pl, mlxsw_sp_port->local_port, grp, prio);
890 return mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(ppcnt), ppcnt_pl);
891}
892
893static int mlxsw_sp_port_get_hw_stats(struct net_device *dev,
894 struct rtnl_link_stats64 *stats)
895{
896 char ppcnt_pl[MLXSW_REG_PPCNT_LEN];
897 int err;
898
899 err = mlxsw_sp_port_get_stats_raw(dev, MLXSW_REG_PPCNT_IEEE_8023_CNT,
900 0, ppcnt_pl);
901 if (err)
902 goto out;
903
904 stats->tx_packets =
905 mlxsw_reg_ppcnt_a_frames_transmitted_ok_get(ppcnt_pl);
906 stats->rx_packets =
907 mlxsw_reg_ppcnt_a_frames_received_ok_get(ppcnt_pl);
908 stats->tx_bytes =
909 mlxsw_reg_ppcnt_a_octets_transmitted_ok_get(ppcnt_pl);
910 stats->rx_bytes =
911 mlxsw_reg_ppcnt_a_octets_received_ok_get(ppcnt_pl);
912 stats->multicast =
913 mlxsw_reg_ppcnt_a_multicast_frames_received_ok_get(ppcnt_pl);
914
915 stats->rx_crc_errors =
916 mlxsw_reg_ppcnt_a_frame_check_sequence_errors_get(ppcnt_pl);
917 stats->rx_frame_errors =
918 mlxsw_reg_ppcnt_a_alignment_errors_get(ppcnt_pl);
919
920 stats->rx_length_errors = (
921 mlxsw_reg_ppcnt_a_in_range_length_errors_get(ppcnt_pl) +
922 mlxsw_reg_ppcnt_a_out_of_range_length_field_get(ppcnt_pl) +
923 mlxsw_reg_ppcnt_a_frame_too_long_errors_get(ppcnt_pl));
924
925 stats->rx_errors = (stats->rx_crc_errors +
926 stats->rx_frame_errors + stats->rx_length_errors);
927
928out:
929 return err;
930}
931
932static void update_stats_cache(struct work_struct *work)
933{
934 struct mlxsw_sp_port *mlxsw_sp_port =
935 container_of(work, struct mlxsw_sp_port,
936 hw_stats.update_dw.work);
937
938 if (!netif_carrier_ok(mlxsw_sp_port->dev))
939 goto out;
940
941 mlxsw_sp_port_get_hw_stats(mlxsw_sp_port->dev,
942 mlxsw_sp_port->hw_stats.cache);
943
944out:
945 mlxsw_core_schedule_dw(&mlxsw_sp_port->hw_stats.update_dw,
946 MLXSW_HW_STATS_UPDATE_TIME);
947}
948
949/* Return the stats from a cache that is updated periodically,
950 * as this function might get called in an atomic context.
951 */
952static struct rtnl_link_stats64 *
953mlxsw_sp_port_get_stats64(struct net_device *dev,
954 struct rtnl_link_stats64 *stats)
955{
956 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
957
958 memcpy(stats, mlxsw_sp_port->hw_stats.cache, sizeof(*stats));
959
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200960 return stats;
961}
962
963int mlxsw_sp_port_vlan_set(struct mlxsw_sp_port *mlxsw_sp_port, u16 vid_begin,
964 u16 vid_end, bool is_member, bool untagged)
965{
966 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
967 char *spvm_pl;
968 int err;
969
970 spvm_pl = kmalloc(MLXSW_REG_SPVM_LEN, GFP_KERNEL);
971 if (!spvm_pl)
972 return -ENOMEM;
973
974 mlxsw_reg_spvm_pack(spvm_pl, mlxsw_sp_port->local_port, vid_begin,
975 vid_end, is_member, untagged);
976 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(spvm), spvm_pl);
977 kfree(spvm_pl);
978 return err;
979}
980
981static int mlxsw_sp_port_vp_mode_trans(struct mlxsw_sp_port *mlxsw_sp_port)
982{
983 enum mlxsw_reg_svfa_mt mt = MLXSW_REG_SVFA_MT_PORT_VID_TO_FID;
984 u16 vid, last_visited_vid;
985 int err;
986
987 for_each_set_bit(vid, mlxsw_sp_port->active_vlans, VLAN_N_VID) {
988 err = mlxsw_sp_port_vid_to_fid_set(mlxsw_sp_port, mt, true, vid,
989 vid);
990 if (err) {
991 last_visited_vid = vid;
992 goto err_port_vid_to_fid_set;
993 }
994 }
995
996 err = mlxsw_sp_port_vp_mode_set(mlxsw_sp_port, true);
997 if (err) {
998 last_visited_vid = VLAN_N_VID;
999 goto err_port_vid_to_fid_set;
1000 }
1001
1002 return 0;
1003
1004err_port_vid_to_fid_set:
1005 for_each_set_bit(vid, mlxsw_sp_port->active_vlans, last_visited_vid)
1006 mlxsw_sp_port_vid_to_fid_set(mlxsw_sp_port, mt, false, vid,
1007 vid);
1008 return err;
1009}
1010
1011static int mlxsw_sp_port_vlan_mode_trans(struct mlxsw_sp_port *mlxsw_sp_port)
1012{
1013 enum mlxsw_reg_svfa_mt mt = MLXSW_REG_SVFA_MT_PORT_VID_TO_FID;
1014 u16 vid;
1015 int err;
1016
1017 err = mlxsw_sp_port_vp_mode_set(mlxsw_sp_port, false);
1018 if (err)
1019 return err;
1020
1021 for_each_set_bit(vid, mlxsw_sp_port->active_vlans, VLAN_N_VID) {
1022 err = mlxsw_sp_port_vid_to_fid_set(mlxsw_sp_port, mt, false,
1023 vid, vid);
1024 if (err)
1025 return err;
1026 }
1027
1028 return 0;
1029}
1030
Ido Schimmel7f71eb42015-12-15 16:03:37 +01001031static struct mlxsw_sp_port *
Ido Schimmel0355b592016-06-20 23:04:13 +02001032mlxsw_sp_port_vport_create(struct mlxsw_sp_port *mlxsw_sp_port, u16 vid)
Ido Schimmel7f71eb42015-12-15 16:03:37 +01001033{
1034 struct mlxsw_sp_port *mlxsw_sp_vport;
1035
1036 mlxsw_sp_vport = kzalloc(sizeof(*mlxsw_sp_vport), GFP_KERNEL);
1037 if (!mlxsw_sp_vport)
1038 return NULL;
1039
1040 /* dev will be set correctly after the VLAN device is linked
1041 * with the real device. In case of bridge SELF invocation, dev
1042 * will remain as is.
1043 */
1044 mlxsw_sp_vport->dev = mlxsw_sp_port->dev;
1045 mlxsw_sp_vport->mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
1046 mlxsw_sp_vport->local_port = mlxsw_sp_port->local_port;
1047 mlxsw_sp_vport->stp_state = BR_STATE_FORWARDING;
Ido Schimmel272c4472015-12-15 16:03:47 +01001048 mlxsw_sp_vport->lagged = mlxsw_sp_port->lagged;
1049 mlxsw_sp_vport->lag_id = mlxsw_sp_port->lag_id;
Ido Schimmel0355b592016-06-20 23:04:13 +02001050 mlxsw_sp_vport->vport.vid = vid;
Ido Schimmel7f71eb42015-12-15 16:03:37 +01001051
1052 list_add(&mlxsw_sp_vport->vport.list, &mlxsw_sp_port->vports_list);
1053
1054 return mlxsw_sp_vport;
1055}
1056
1057static void mlxsw_sp_port_vport_destroy(struct mlxsw_sp_port *mlxsw_sp_vport)
1058{
1059 list_del(&mlxsw_sp_vport->vport.list);
1060 kfree(mlxsw_sp_vport);
1061}
1062
Ido Schimmel05978482016-08-17 16:39:30 +02001063static int mlxsw_sp_port_add_vid(struct net_device *dev,
1064 __be16 __always_unused proto, u16 vid)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001065{
1066 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
Ido Schimmel7f71eb42015-12-15 16:03:37 +01001067 struct mlxsw_sp_port *mlxsw_sp_vport;
Ido Schimmel52697a92016-07-02 11:00:09 +02001068 bool untagged = vid == 1;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001069 int err;
1070
1071 /* VLAN 0 is added to HW filter when device goes up, but it is
1072 * reserved in our case, so simply return.
1073 */
1074 if (!vid)
1075 return 0;
1076
Ido Schimmelfa66d7e2016-08-17 16:39:29 +02001077 if (mlxsw_sp_port_vport_find(mlxsw_sp_port, vid))
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001078 return 0;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001079
Ido Schimmel0355b592016-06-20 23:04:13 +02001080 mlxsw_sp_vport = mlxsw_sp_port_vport_create(mlxsw_sp_port, vid);
Ido Schimmelfa66d7e2016-08-17 16:39:29 +02001081 if (!mlxsw_sp_vport)
Ido Schimmel0355b592016-06-20 23:04:13 +02001082 return -ENOMEM;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001083
1084 /* When adding the first VLAN interface on a bridged port we need to
1085 * transition all the active 802.1Q bridge VLANs to use explicit
1086 * {Port, VID} to FID mappings and set the port's mode to Virtual mode.
1087 */
Ido Schimmel7f71eb42015-12-15 16:03:37 +01001088 if (list_is_singular(&mlxsw_sp_port->vports_list)) {
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001089 err = mlxsw_sp_port_vp_mode_trans(mlxsw_sp_port);
Ido Schimmelfa66d7e2016-08-17 16:39:29 +02001090 if (err)
Ido Schimmel7f71eb42015-12-15 16:03:37 +01001091 goto err_port_vp_mode_trans;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001092 }
1093
Ido Schimmel52697a92016-07-02 11:00:09 +02001094 err = mlxsw_sp_port_vlan_set(mlxsw_sp_vport, vid, vid, true, untagged);
Ido Schimmelfa66d7e2016-08-17 16:39:29 +02001095 if (err)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001096 goto err_port_add_vid;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001097
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001098 return 0;
1099
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001100err_port_add_vid:
Ido Schimmel7f71eb42015-12-15 16:03:37 +01001101 if (list_is_singular(&mlxsw_sp_port->vports_list))
1102 mlxsw_sp_port_vlan_mode_trans(mlxsw_sp_port);
1103err_port_vp_mode_trans:
Ido Schimmel7f71eb42015-12-15 16:03:37 +01001104 mlxsw_sp_port_vport_destroy(mlxsw_sp_vport);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001105 return err;
1106}
1107
Ido Schimmel32d863f2016-07-02 11:00:10 +02001108static int mlxsw_sp_port_kill_vid(struct net_device *dev,
1109 __be16 __always_unused proto, u16 vid)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001110{
1111 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
Ido Schimmel7f71eb42015-12-15 16:03:37 +01001112 struct mlxsw_sp_port *mlxsw_sp_vport;
Ido Schimmel1c800752016-06-20 23:04:20 +02001113 struct mlxsw_sp_fid *f;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001114
1115 /* VLAN 0 is removed from HW filter when device goes down, but
1116 * it is reserved in our case, so simply return.
1117 */
1118 if (!vid)
1119 return 0;
1120
Ido Schimmel7f71eb42015-12-15 16:03:37 +01001121 mlxsw_sp_vport = mlxsw_sp_port_vport_find(mlxsw_sp_port, vid);
Ido Schimmel7a355832016-08-17 16:39:28 +02001122 if (WARN_ON(!mlxsw_sp_vport))
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001123 return 0;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001124
Ido Schimmel7a355832016-08-17 16:39:28 +02001125 mlxsw_sp_port_vlan_set(mlxsw_sp_vport, vid, vid, false, false);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001126
Ido Schimmel1c800752016-06-20 23:04:20 +02001127 /* Drop FID reference. If this was the last reference the
1128 * resources will be freed.
1129 */
1130 f = mlxsw_sp_vport_fid_get(mlxsw_sp_vport);
1131 if (f && !WARN_ON(!f->leave))
1132 f->leave(mlxsw_sp_vport);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001133
1134 /* When removing the last VLAN interface on a bridged port we need to
1135 * transition all active 802.1Q bridge VLANs to use VID to FID
1136 * mappings and set port's mode to VLAN mode.
1137 */
Ido Schimmel7a355832016-08-17 16:39:28 +02001138 if (list_is_singular(&mlxsw_sp_port->vports_list))
1139 mlxsw_sp_port_vlan_mode_trans(mlxsw_sp_port);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001140
Ido Schimmel7f71eb42015-12-15 16:03:37 +01001141 mlxsw_sp_port_vport_destroy(mlxsw_sp_vport);
1142
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001143 return 0;
1144}
1145
Ido Schimmel2bf9a582016-04-05 10:20:04 +02001146static int mlxsw_sp_port_get_phys_port_name(struct net_device *dev, char *name,
1147 size_t len)
1148{
1149 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
Ido Schimmeld664b412016-06-09 09:51:40 +02001150 u8 module = mlxsw_sp_port->mapping.module;
1151 u8 width = mlxsw_sp_port->mapping.width;
1152 u8 lane = mlxsw_sp_port->mapping.lane;
Ido Schimmel2bf9a582016-04-05 10:20:04 +02001153 int err;
1154
Ido Schimmel2bf9a582016-04-05 10:20:04 +02001155 if (!mlxsw_sp_port->split)
1156 err = snprintf(name, len, "p%d", module + 1);
1157 else
1158 err = snprintf(name, len, "p%ds%d", module + 1,
1159 lane / width);
1160
1161 if (err >= len)
1162 return -EINVAL;
1163
1164 return 0;
1165}
1166
Yotam Gigi763b4b72016-07-21 12:03:17 +02001167static struct mlxsw_sp_port_mall_tc_entry *
1168mlxsw_sp_port_mirror_entry_find(struct mlxsw_sp_port *port,
1169 unsigned long cookie) {
1170 struct mlxsw_sp_port_mall_tc_entry *mall_tc_entry;
1171
1172 list_for_each_entry(mall_tc_entry, &port->mall_tc_list, list)
1173 if (mall_tc_entry->cookie == cookie)
1174 return mall_tc_entry;
1175
1176 return NULL;
1177}
1178
1179static int
1180mlxsw_sp_port_add_cls_matchall_mirror(struct mlxsw_sp_port *mlxsw_sp_port,
1181 struct tc_cls_matchall_offload *cls,
1182 const struct tc_action *a,
1183 bool ingress)
1184{
1185 struct mlxsw_sp_port_mall_tc_entry *mall_tc_entry;
1186 struct net *net = dev_net(mlxsw_sp_port->dev);
1187 enum mlxsw_sp_span_type span_type;
1188 struct mlxsw_sp_port *to_port;
1189 struct net_device *to_dev;
1190 int ifindex;
1191 int err;
1192
1193 ifindex = tcf_mirred_ifindex(a);
1194 to_dev = __dev_get_by_index(net, ifindex);
1195 if (!to_dev) {
1196 netdev_err(mlxsw_sp_port->dev, "Could not find requested device\n");
1197 return -EINVAL;
1198 }
1199
1200 if (!mlxsw_sp_port_dev_check(to_dev)) {
1201 netdev_err(mlxsw_sp_port->dev, "Cannot mirror to a non-spectrum port");
1202 return -ENOTSUPP;
1203 }
1204 to_port = netdev_priv(to_dev);
1205
1206 mall_tc_entry = kzalloc(sizeof(*mall_tc_entry), GFP_KERNEL);
1207 if (!mall_tc_entry)
1208 return -ENOMEM;
1209
1210 mall_tc_entry->cookie = cls->cookie;
1211 mall_tc_entry->type = MLXSW_SP_PORT_MALL_MIRROR;
1212 mall_tc_entry->mirror.to_local_port = to_port->local_port;
1213 mall_tc_entry->mirror.ingress = ingress;
1214 list_add_tail(&mall_tc_entry->list, &mlxsw_sp_port->mall_tc_list);
1215
1216 span_type = ingress ? MLXSW_SP_SPAN_INGRESS : MLXSW_SP_SPAN_EGRESS;
1217 err = mlxsw_sp_span_mirror_add(mlxsw_sp_port, to_port, span_type);
1218 if (err)
1219 goto err_mirror_add;
1220 return 0;
1221
1222err_mirror_add:
1223 list_del(&mall_tc_entry->list);
1224 kfree(mall_tc_entry);
1225 return err;
1226}
1227
1228static int mlxsw_sp_port_add_cls_matchall(struct mlxsw_sp_port *mlxsw_sp_port,
1229 __be16 protocol,
1230 struct tc_cls_matchall_offload *cls,
1231 bool ingress)
1232{
Yotam Gigi763b4b72016-07-21 12:03:17 +02001233 const struct tc_action *a;
WANG Cong22dc13c2016-08-13 22:35:00 -07001234 LIST_HEAD(actions);
Yotam Gigi763b4b72016-07-21 12:03:17 +02001235 int err;
1236
Ido Schimmel86cb13e2016-07-25 13:12:33 +03001237 if (!tc_single_action(cls->exts)) {
Yotam Gigi763b4b72016-07-21 12:03:17 +02001238 netdev_err(mlxsw_sp_port->dev, "only singular actions are supported\n");
1239 return -ENOTSUPP;
1240 }
1241
WANG Cong22dc13c2016-08-13 22:35:00 -07001242 tcf_exts_to_list(cls->exts, &actions);
1243 list_for_each_entry(a, &actions, list) {
Ido Schimmel86cb13e2016-07-25 13:12:33 +03001244 if (!is_tcf_mirred_mirror(a) || protocol != htons(ETH_P_ALL))
1245 return -ENOTSUPP;
1246
Yotam Gigi763b4b72016-07-21 12:03:17 +02001247 err = mlxsw_sp_port_add_cls_matchall_mirror(mlxsw_sp_port, cls,
1248 a, ingress);
1249 if (err)
1250 return err;
Yotam Gigi763b4b72016-07-21 12:03:17 +02001251 }
1252
1253 return 0;
1254}
1255
1256static void mlxsw_sp_port_del_cls_matchall(struct mlxsw_sp_port *mlxsw_sp_port,
1257 struct tc_cls_matchall_offload *cls)
1258{
Yotam Gigi763b4b72016-07-21 12:03:17 +02001259 struct mlxsw_sp_port_mall_tc_entry *mall_tc_entry;
1260 enum mlxsw_sp_span_type span_type;
Yotam Gigi763b4b72016-07-21 12:03:17 +02001261
1262 mall_tc_entry = mlxsw_sp_port_mirror_entry_find(mlxsw_sp_port,
1263 cls->cookie);
1264 if (!mall_tc_entry) {
1265 netdev_dbg(mlxsw_sp_port->dev, "tc entry not found on port\n");
1266 return;
1267 }
1268
1269 switch (mall_tc_entry->type) {
1270 case MLXSW_SP_PORT_MALL_MIRROR:
Yotam Gigi763b4b72016-07-21 12:03:17 +02001271 span_type = mall_tc_entry->mirror.ingress ?
1272 MLXSW_SP_SPAN_INGRESS : MLXSW_SP_SPAN_EGRESS;
1273
Yuval Mintzf860ca52017-09-12 08:50:53 +02001274 mlxsw_sp_span_mirror_remove(mlxsw_sp_port,
1275 mall_tc_entry->mirror.to_local_port,
1276 span_type);
Yotam Gigi763b4b72016-07-21 12:03:17 +02001277 break;
1278 default:
1279 WARN_ON(1);
1280 }
1281
1282 list_del(&mall_tc_entry->list);
1283 kfree(mall_tc_entry);
1284}
1285
1286static int mlxsw_sp_setup_tc(struct net_device *dev, u32 handle,
1287 __be16 proto, struct tc_to_netdev *tc)
1288{
1289 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
1290 bool ingress = TC_H_MAJ(handle) == TC_H_MAJ(TC_H_INGRESS);
1291
1292 if (tc->type == TC_SETUP_MATCHALL) {
1293 switch (tc->cls_mall->command) {
1294 case TC_CLSMATCHALL_REPLACE:
1295 return mlxsw_sp_port_add_cls_matchall(mlxsw_sp_port,
1296 proto,
1297 tc->cls_mall,
1298 ingress);
1299 case TC_CLSMATCHALL_DESTROY:
1300 mlxsw_sp_port_del_cls_matchall(mlxsw_sp_port,
1301 tc->cls_mall);
1302 return 0;
1303 default:
1304 return -EINVAL;
1305 }
1306 }
1307
1308 return -ENOTSUPP;
1309}
1310
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001311static const struct net_device_ops mlxsw_sp_port_netdev_ops = {
1312 .ndo_open = mlxsw_sp_port_open,
1313 .ndo_stop = mlxsw_sp_port_stop,
1314 .ndo_start_xmit = mlxsw_sp_port_xmit,
Yotam Gigi763b4b72016-07-21 12:03:17 +02001315 .ndo_setup_tc = mlxsw_sp_setup_tc,
Jiri Pirkoc5b9b512015-12-03 12:12:22 +01001316 .ndo_set_rx_mode = mlxsw_sp_set_rx_mode,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001317 .ndo_set_mac_address = mlxsw_sp_port_set_mac_address,
1318 .ndo_change_mtu = mlxsw_sp_port_change_mtu,
1319 .ndo_get_stats64 = mlxsw_sp_port_get_stats64,
Nogah Frankelfc1bbb02016-09-16 15:05:38 +02001320 .ndo_has_offload_stats = mlxsw_sp_port_has_offload_stats,
1321 .ndo_get_offload_stats = mlxsw_sp_port_get_offload_stats,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001322 .ndo_vlan_rx_add_vid = mlxsw_sp_port_add_vid,
1323 .ndo_vlan_rx_kill_vid = mlxsw_sp_port_kill_vid,
Jiri Pirko6cf3c972016-07-05 11:27:39 +02001324 .ndo_neigh_construct = mlxsw_sp_router_neigh_construct,
1325 .ndo_neigh_destroy = mlxsw_sp_router_neigh_destroy,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001326 .ndo_fdb_add = switchdev_port_fdb_add,
1327 .ndo_fdb_del = switchdev_port_fdb_del,
1328 .ndo_fdb_dump = switchdev_port_fdb_dump,
1329 .ndo_bridge_setlink = switchdev_port_bridge_setlink,
1330 .ndo_bridge_getlink = switchdev_port_bridge_getlink,
1331 .ndo_bridge_dellink = switchdev_port_bridge_dellink,
Ido Schimmel2bf9a582016-04-05 10:20:04 +02001332 .ndo_get_phys_port_name = mlxsw_sp_port_get_phys_port_name,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001333};
1334
1335static void mlxsw_sp_port_get_drvinfo(struct net_device *dev,
1336 struct ethtool_drvinfo *drvinfo)
1337{
1338 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
1339 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
1340
1341 strlcpy(drvinfo->driver, mlxsw_sp_driver_name, sizeof(drvinfo->driver));
1342 strlcpy(drvinfo->version, mlxsw_sp_driver_version,
1343 sizeof(drvinfo->version));
1344 snprintf(drvinfo->fw_version, sizeof(drvinfo->fw_version),
1345 "%d.%d.%d",
1346 mlxsw_sp->bus_info->fw_rev.major,
1347 mlxsw_sp->bus_info->fw_rev.minor,
1348 mlxsw_sp->bus_info->fw_rev.subminor);
1349 strlcpy(drvinfo->bus_info, mlxsw_sp->bus_info->device_name,
1350 sizeof(drvinfo->bus_info));
1351}
1352
Ido Schimmel9f7ec052016-04-06 17:10:14 +02001353static void mlxsw_sp_port_get_pauseparam(struct net_device *dev,
1354 struct ethtool_pauseparam *pause)
1355{
1356 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
1357
1358 pause->rx_pause = mlxsw_sp_port->link.rx_pause;
1359 pause->tx_pause = mlxsw_sp_port->link.tx_pause;
1360}
1361
1362static int mlxsw_sp_port_pause_set(struct mlxsw_sp_port *mlxsw_sp_port,
1363 struct ethtool_pauseparam *pause)
1364{
1365 char pfcc_pl[MLXSW_REG_PFCC_LEN];
1366
1367 mlxsw_reg_pfcc_pack(pfcc_pl, mlxsw_sp_port->local_port);
1368 mlxsw_reg_pfcc_pprx_set(pfcc_pl, pause->rx_pause);
1369 mlxsw_reg_pfcc_pptx_set(pfcc_pl, pause->tx_pause);
1370
1371 return mlxsw_reg_write(mlxsw_sp_port->mlxsw_sp->core, MLXSW_REG(pfcc),
1372 pfcc_pl);
1373}
1374
1375static int mlxsw_sp_port_set_pauseparam(struct net_device *dev,
1376 struct ethtool_pauseparam *pause)
1377{
1378 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
1379 bool pause_en = pause->tx_pause || pause->rx_pause;
1380 int err;
1381
Ido Schimmeld81a6bd2016-04-06 17:10:16 +02001382 if (mlxsw_sp_port->dcb.pfc && mlxsw_sp_port->dcb.pfc->pfc_en) {
1383 netdev_err(dev, "PFC already enabled on port\n");
1384 return -EINVAL;
1385 }
1386
Ido Schimmel9f7ec052016-04-06 17:10:14 +02001387 if (pause->autoneg) {
1388 netdev_err(dev, "PAUSE frames autonegotiation isn't supported\n");
1389 return -EINVAL;
1390 }
1391
1392 err = mlxsw_sp_port_headroom_set(mlxsw_sp_port, dev->mtu, pause_en);
1393 if (err) {
1394 netdev_err(dev, "Failed to configure port's headroom\n");
1395 return err;
1396 }
1397
1398 err = mlxsw_sp_port_pause_set(mlxsw_sp_port, pause);
1399 if (err) {
1400 netdev_err(dev, "Failed to set PAUSE parameters\n");
1401 goto err_port_pause_configure;
1402 }
1403
1404 mlxsw_sp_port->link.rx_pause = pause->rx_pause;
1405 mlxsw_sp_port->link.tx_pause = pause->tx_pause;
1406
1407 return 0;
1408
1409err_port_pause_configure:
1410 pause_en = mlxsw_sp_port_is_pause_en(mlxsw_sp_port);
1411 mlxsw_sp_port_headroom_set(mlxsw_sp_port, dev->mtu, pause_en);
1412 return err;
1413}
1414
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001415struct mlxsw_sp_port_hw_stats {
1416 char str[ETH_GSTRING_LEN];
1417 u64 (*getter)(char *payload);
1418};
1419
Ido Schimmel7ed674b2016-07-19 15:35:53 +02001420static struct mlxsw_sp_port_hw_stats mlxsw_sp_port_hw_stats[] = {
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001421 {
1422 .str = "a_frames_transmitted_ok",
1423 .getter = mlxsw_reg_ppcnt_a_frames_transmitted_ok_get,
1424 },
1425 {
1426 .str = "a_frames_received_ok",
1427 .getter = mlxsw_reg_ppcnt_a_frames_received_ok_get,
1428 },
1429 {
1430 .str = "a_frame_check_sequence_errors",
1431 .getter = mlxsw_reg_ppcnt_a_frame_check_sequence_errors_get,
1432 },
1433 {
1434 .str = "a_alignment_errors",
1435 .getter = mlxsw_reg_ppcnt_a_alignment_errors_get,
1436 },
1437 {
1438 .str = "a_octets_transmitted_ok",
1439 .getter = mlxsw_reg_ppcnt_a_octets_transmitted_ok_get,
1440 },
1441 {
1442 .str = "a_octets_received_ok",
1443 .getter = mlxsw_reg_ppcnt_a_octets_received_ok_get,
1444 },
1445 {
1446 .str = "a_multicast_frames_xmitted_ok",
1447 .getter = mlxsw_reg_ppcnt_a_multicast_frames_xmitted_ok_get,
1448 },
1449 {
1450 .str = "a_broadcast_frames_xmitted_ok",
1451 .getter = mlxsw_reg_ppcnt_a_broadcast_frames_xmitted_ok_get,
1452 },
1453 {
1454 .str = "a_multicast_frames_received_ok",
1455 .getter = mlxsw_reg_ppcnt_a_multicast_frames_received_ok_get,
1456 },
1457 {
1458 .str = "a_broadcast_frames_received_ok",
1459 .getter = mlxsw_reg_ppcnt_a_broadcast_frames_received_ok_get,
1460 },
1461 {
1462 .str = "a_in_range_length_errors",
1463 .getter = mlxsw_reg_ppcnt_a_in_range_length_errors_get,
1464 },
1465 {
1466 .str = "a_out_of_range_length_field",
1467 .getter = mlxsw_reg_ppcnt_a_out_of_range_length_field_get,
1468 },
1469 {
1470 .str = "a_frame_too_long_errors",
1471 .getter = mlxsw_reg_ppcnt_a_frame_too_long_errors_get,
1472 },
1473 {
1474 .str = "a_symbol_error_during_carrier",
1475 .getter = mlxsw_reg_ppcnt_a_symbol_error_during_carrier_get,
1476 },
1477 {
1478 .str = "a_mac_control_frames_transmitted",
1479 .getter = mlxsw_reg_ppcnt_a_mac_control_frames_transmitted_get,
1480 },
1481 {
1482 .str = "a_mac_control_frames_received",
1483 .getter = mlxsw_reg_ppcnt_a_mac_control_frames_received_get,
1484 },
1485 {
1486 .str = "a_unsupported_opcodes_received",
1487 .getter = mlxsw_reg_ppcnt_a_unsupported_opcodes_received_get,
1488 },
1489 {
1490 .str = "a_pause_mac_ctrl_frames_received",
1491 .getter = mlxsw_reg_ppcnt_a_pause_mac_ctrl_frames_received_get,
1492 },
1493 {
1494 .str = "a_pause_mac_ctrl_frames_xmitted",
1495 .getter = mlxsw_reg_ppcnt_a_pause_mac_ctrl_frames_transmitted_get,
1496 },
1497};
1498
1499#define MLXSW_SP_PORT_HW_STATS_LEN ARRAY_SIZE(mlxsw_sp_port_hw_stats)
1500
Ido Schimmel7ed674b2016-07-19 15:35:53 +02001501static struct mlxsw_sp_port_hw_stats mlxsw_sp_port_hw_prio_stats[] = {
1502 {
1503 .str = "rx_octets_prio",
1504 .getter = mlxsw_reg_ppcnt_rx_octets_get,
1505 },
1506 {
1507 .str = "rx_frames_prio",
1508 .getter = mlxsw_reg_ppcnt_rx_frames_get,
1509 },
1510 {
1511 .str = "tx_octets_prio",
1512 .getter = mlxsw_reg_ppcnt_tx_octets_get,
1513 },
1514 {
1515 .str = "tx_frames_prio",
1516 .getter = mlxsw_reg_ppcnt_tx_frames_get,
1517 },
1518 {
1519 .str = "rx_pause_prio",
1520 .getter = mlxsw_reg_ppcnt_rx_pause_get,
1521 },
1522 {
1523 .str = "rx_pause_duration_prio",
1524 .getter = mlxsw_reg_ppcnt_rx_pause_duration_get,
1525 },
1526 {
1527 .str = "tx_pause_prio",
1528 .getter = mlxsw_reg_ppcnt_tx_pause_get,
1529 },
1530 {
1531 .str = "tx_pause_duration_prio",
1532 .getter = mlxsw_reg_ppcnt_tx_pause_duration_get,
1533 },
1534};
1535
1536#define MLXSW_SP_PORT_HW_PRIO_STATS_LEN ARRAY_SIZE(mlxsw_sp_port_hw_prio_stats)
1537
Ido Schimmeldf4750e82016-07-19 15:35:54 +02001538static u64 mlxsw_reg_ppcnt_tc_transmit_queue_bytes_get(char *ppcnt_pl)
1539{
1540 u64 transmit_queue = mlxsw_reg_ppcnt_tc_transmit_queue_get(ppcnt_pl);
1541
1542 return MLXSW_SP_CELLS_TO_BYTES(transmit_queue);
1543}
1544
1545static struct mlxsw_sp_port_hw_stats mlxsw_sp_port_hw_tc_stats[] = {
1546 {
1547 .str = "tc_transmit_queue_tc",
1548 .getter = mlxsw_reg_ppcnt_tc_transmit_queue_bytes_get,
1549 },
1550 {
1551 .str = "tc_no_buffer_discard_uc_tc",
1552 .getter = mlxsw_reg_ppcnt_tc_no_buffer_discard_uc_get,
1553 },
1554};
1555
1556#define MLXSW_SP_PORT_HW_TC_STATS_LEN ARRAY_SIZE(mlxsw_sp_port_hw_tc_stats)
1557
Ido Schimmel7ed674b2016-07-19 15:35:53 +02001558#define MLXSW_SP_PORT_ETHTOOL_STATS_LEN (MLXSW_SP_PORT_HW_STATS_LEN + \
Ido Schimmeldf4750e82016-07-19 15:35:54 +02001559 (MLXSW_SP_PORT_HW_PRIO_STATS_LEN + \
1560 MLXSW_SP_PORT_HW_TC_STATS_LEN) * \
Ido Schimmel7ed674b2016-07-19 15:35:53 +02001561 IEEE_8021QAZ_MAX_TCS)
1562
1563static void mlxsw_sp_port_get_prio_strings(u8 **p, int prio)
1564{
1565 int i;
1566
1567 for (i = 0; i < MLXSW_SP_PORT_HW_PRIO_STATS_LEN; i++) {
Florian Fainellifa5a4be2019-02-21 20:09:26 -08001568 snprintf(*p, ETH_GSTRING_LEN, "%.29s_%.1d",
Ido Schimmel7ed674b2016-07-19 15:35:53 +02001569 mlxsw_sp_port_hw_prio_stats[i].str, prio);
1570 *p += ETH_GSTRING_LEN;
1571 }
1572}
1573
Ido Schimmeldf4750e82016-07-19 15:35:54 +02001574static void mlxsw_sp_port_get_tc_strings(u8 **p, int tc)
1575{
1576 int i;
1577
1578 for (i = 0; i < MLXSW_SP_PORT_HW_TC_STATS_LEN; i++) {
Florian Fainellifa5a4be2019-02-21 20:09:26 -08001579 snprintf(*p, ETH_GSTRING_LEN, "%.29s_%.1d",
Ido Schimmeldf4750e82016-07-19 15:35:54 +02001580 mlxsw_sp_port_hw_tc_stats[i].str, tc);
1581 *p += ETH_GSTRING_LEN;
1582 }
1583}
1584
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001585static void mlxsw_sp_port_get_strings(struct net_device *dev,
1586 u32 stringset, u8 *data)
1587{
1588 u8 *p = data;
1589 int i;
1590
1591 switch (stringset) {
1592 case ETH_SS_STATS:
1593 for (i = 0; i < MLXSW_SP_PORT_HW_STATS_LEN; i++) {
1594 memcpy(p, mlxsw_sp_port_hw_stats[i].str,
1595 ETH_GSTRING_LEN);
1596 p += ETH_GSTRING_LEN;
1597 }
Ido Schimmel7ed674b2016-07-19 15:35:53 +02001598
1599 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++)
1600 mlxsw_sp_port_get_prio_strings(&p, i);
1601
Ido Schimmeldf4750e82016-07-19 15:35:54 +02001602 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++)
1603 mlxsw_sp_port_get_tc_strings(&p, i);
1604
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001605 break;
1606 }
1607}
1608
Ido Schimmel3a66ee32015-11-27 13:45:55 +01001609static int mlxsw_sp_port_set_phys_id(struct net_device *dev,
1610 enum ethtool_phys_id_state state)
1611{
1612 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
1613 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
1614 char mlcr_pl[MLXSW_REG_MLCR_LEN];
1615 bool active;
1616
1617 switch (state) {
1618 case ETHTOOL_ID_ACTIVE:
1619 active = true;
1620 break;
1621 case ETHTOOL_ID_INACTIVE:
1622 active = false;
1623 break;
1624 default:
1625 return -EOPNOTSUPP;
1626 }
1627
1628 mlxsw_reg_mlcr_pack(mlcr_pl, mlxsw_sp_port->local_port, active);
1629 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(mlcr), mlcr_pl);
1630}
1631
Ido Schimmel7ed674b2016-07-19 15:35:53 +02001632static int
1633mlxsw_sp_get_hw_stats_by_group(struct mlxsw_sp_port_hw_stats **p_hw_stats,
1634 int *p_len, enum mlxsw_reg_ppcnt_grp grp)
1635{
1636 switch (grp) {
1637 case MLXSW_REG_PPCNT_IEEE_8023_CNT:
1638 *p_hw_stats = mlxsw_sp_port_hw_stats;
1639 *p_len = MLXSW_SP_PORT_HW_STATS_LEN;
1640 break;
1641 case MLXSW_REG_PPCNT_PRIO_CNT:
1642 *p_hw_stats = mlxsw_sp_port_hw_prio_stats;
1643 *p_len = MLXSW_SP_PORT_HW_PRIO_STATS_LEN;
1644 break;
Ido Schimmeldf4750e82016-07-19 15:35:54 +02001645 case MLXSW_REG_PPCNT_TC_CNT:
1646 *p_hw_stats = mlxsw_sp_port_hw_tc_stats;
1647 *p_len = MLXSW_SP_PORT_HW_TC_STATS_LEN;
1648 break;
Ido Schimmel7ed674b2016-07-19 15:35:53 +02001649 default:
1650 WARN_ON(1);
1651 return -ENOTSUPP;
1652 }
1653 return 0;
1654}
1655
1656static void __mlxsw_sp_port_get_stats(struct net_device *dev,
1657 enum mlxsw_reg_ppcnt_grp grp, int prio,
1658 u64 *data, int data_index)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001659{
Ido Schimmel7ed674b2016-07-19 15:35:53 +02001660 struct mlxsw_sp_port_hw_stats *hw_stats;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001661 char ppcnt_pl[MLXSW_REG_PPCNT_LEN];
Ido Schimmel7ed674b2016-07-19 15:35:53 +02001662 int i, len;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001663 int err;
1664
Ido Schimmel7ed674b2016-07-19 15:35:53 +02001665 err = mlxsw_sp_get_hw_stats_by_group(&hw_stats, &len, grp);
1666 if (err)
1667 return;
Nogah Frankelfc1bbb02016-09-16 15:05:38 +02001668 mlxsw_sp_port_get_stats_raw(dev, grp, prio, ppcnt_pl);
Ido Schimmel7ed674b2016-07-19 15:35:53 +02001669 for (i = 0; i < len; i++)
Colin Ian Kingfaac0ff2016-09-23 12:02:45 +01001670 data[data_index + i] = hw_stats[i].getter(ppcnt_pl);
Ido Schimmel7ed674b2016-07-19 15:35:53 +02001671}
1672
1673static void mlxsw_sp_port_get_stats(struct net_device *dev,
1674 struct ethtool_stats *stats, u64 *data)
1675{
1676 int i, data_index = 0;
1677
1678 /* IEEE 802.3 Counters */
1679 __mlxsw_sp_port_get_stats(dev, MLXSW_REG_PPCNT_IEEE_8023_CNT, 0,
1680 data, data_index);
1681 data_index = MLXSW_SP_PORT_HW_STATS_LEN;
1682
1683 /* Per-Priority Counters */
1684 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
1685 __mlxsw_sp_port_get_stats(dev, MLXSW_REG_PPCNT_PRIO_CNT, i,
1686 data, data_index);
1687 data_index += MLXSW_SP_PORT_HW_PRIO_STATS_LEN;
1688 }
Ido Schimmeldf4750e82016-07-19 15:35:54 +02001689
1690 /* Per-TC Counters */
1691 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
1692 __mlxsw_sp_port_get_stats(dev, MLXSW_REG_PPCNT_TC_CNT, i,
1693 data, data_index);
1694 data_index += MLXSW_SP_PORT_HW_TC_STATS_LEN;
1695 }
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001696}
1697
1698static int mlxsw_sp_port_get_sset_count(struct net_device *dev, int sset)
1699{
1700 switch (sset) {
1701 case ETH_SS_STATS:
Ido Schimmel7ed674b2016-07-19 15:35:53 +02001702 return MLXSW_SP_PORT_ETHTOOL_STATS_LEN;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001703 default:
1704 return -EOPNOTSUPP;
1705 }
1706}
1707
1708struct mlxsw_sp_port_link_mode {
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001709 enum ethtool_link_mode_bit_indices mask_ethtool;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001710 u32 mask;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001711 u32 speed;
1712};
1713
1714static const struct mlxsw_sp_port_link_mode mlxsw_sp_port_link_mode[] = {
1715 {
1716 .mask = MLXSW_REG_PTYS_ETH_SPEED_100BASE_T,
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001717 .mask_ethtool = ETHTOOL_LINK_MODE_100baseT_Full_BIT,
1718 .speed = SPEED_100,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001719 },
1720 {
1721 .mask = MLXSW_REG_PTYS_ETH_SPEED_SGMII |
1722 MLXSW_REG_PTYS_ETH_SPEED_1000BASE_KX,
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001723 .mask_ethtool = ETHTOOL_LINK_MODE_1000baseKX_Full_BIT,
1724 .speed = SPEED_1000,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001725 },
1726 {
1727 .mask = MLXSW_REG_PTYS_ETH_SPEED_10GBASE_T,
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001728 .mask_ethtool = ETHTOOL_LINK_MODE_10000baseT_Full_BIT,
1729 .speed = SPEED_10000,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001730 },
1731 {
1732 .mask = MLXSW_REG_PTYS_ETH_SPEED_10GBASE_CX4 |
1733 MLXSW_REG_PTYS_ETH_SPEED_10GBASE_KX4,
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001734 .mask_ethtool = ETHTOOL_LINK_MODE_10000baseKX4_Full_BIT,
1735 .speed = SPEED_10000,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001736 },
1737 {
1738 .mask = MLXSW_REG_PTYS_ETH_SPEED_10GBASE_KR |
1739 MLXSW_REG_PTYS_ETH_SPEED_10GBASE_CR |
1740 MLXSW_REG_PTYS_ETH_SPEED_10GBASE_SR |
1741 MLXSW_REG_PTYS_ETH_SPEED_10GBASE_ER_LR,
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001742 .mask_ethtool = ETHTOOL_LINK_MODE_10000baseKR_Full_BIT,
1743 .speed = SPEED_10000,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001744 },
1745 {
1746 .mask = MLXSW_REG_PTYS_ETH_SPEED_20GBASE_KR2,
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001747 .mask_ethtool = ETHTOOL_LINK_MODE_20000baseKR2_Full_BIT,
1748 .speed = SPEED_20000,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001749 },
1750 {
1751 .mask = MLXSW_REG_PTYS_ETH_SPEED_40GBASE_CR4,
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001752 .mask_ethtool = ETHTOOL_LINK_MODE_40000baseCR4_Full_BIT,
1753 .speed = SPEED_40000,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001754 },
1755 {
1756 .mask = MLXSW_REG_PTYS_ETH_SPEED_40GBASE_KR4,
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001757 .mask_ethtool = ETHTOOL_LINK_MODE_40000baseKR4_Full_BIT,
1758 .speed = SPEED_40000,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001759 },
1760 {
1761 .mask = MLXSW_REG_PTYS_ETH_SPEED_40GBASE_SR4,
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001762 .mask_ethtool = ETHTOOL_LINK_MODE_40000baseSR4_Full_BIT,
1763 .speed = SPEED_40000,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001764 },
1765 {
1766 .mask = MLXSW_REG_PTYS_ETH_SPEED_40GBASE_LR4_ER4,
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001767 .mask_ethtool = ETHTOOL_LINK_MODE_40000baseLR4_Full_BIT,
1768 .speed = SPEED_40000,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001769 },
1770 {
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001771 .mask = MLXSW_REG_PTYS_ETH_SPEED_25GBASE_CR,
1772 .mask_ethtool = ETHTOOL_LINK_MODE_25000baseCR_Full_BIT,
1773 .speed = SPEED_25000,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001774 },
1775 {
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001776 .mask = MLXSW_REG_PTYS_ETH_SPEED_25GBASE_KR,
1777 .mask_ethtool = ETHTOOL_LINK_MODE_25000baseKR_Full_BIT,
1778 .speed = SPEED_25000,
1779 },
1780 {
1781 .mask = MLXSW_REG_PTYS_ETH_SPEED_25GBASE_SR,
1782 .mask_ethtool = ETHTOOL_LINK_MODE_25000baseSR_Full_BIT,
1783 .speed = SPEED_25000,
1784 },
1785 {
1786 .mask = MLXSW_REG_PTYS_ETH_SPEED_25GBASE_SR,
1787 .mask_ethtool = ETHTOOL_LINK_MODE_25000baseSR_Full_BIT,
1788 .speed = SPEED_25000,
1789 },
1790 {
1791 .mask = MLXSW_REG_PTYS_ETH_SPEED_50GBASE_CR2,
1792 .mask_ethtool = ETHTOOL_LINK_MODE_50000baseCR2_Full_BIT,
1793 .speed = SPEED_50000,
1794 },
1795 {
1796 .mask = MLXSW_REG_PTYS_ETH_SPEED_50GBASE_KR2,
1797 .mask_ethtool = ETHTOOL_LINK_MODE_50000baseKR2_Full_BIT,
1798 .speed = SPEED_50000,
1799 },
1800 {
1801 .mask = MLXSW_REG_PTYS_ETH_SPEED_50GBASE_SR2,
1802 .mask_ethtool = ETHTOOL_LINK_MODE_50000baseSR2_Full_BIT,
1803 .speed = SPEED_50000,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001804 },
1805 {
1806 .mask = MLXSW_REG_PTYS_ETH_SPEED_56GBASE_R4,
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001807 .mask_ethtool = ETHTOOL_LINK_MODE_56000baseKR4_Full_BIT,
1808 .speed = SPEED_56000,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001809 },
1810 {
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001811 .mask = MLXSW_REG_PTYS_ETH_SPEED_56GBASE_R4,
1812 .mask_ethtool = ETHTOOL_LINK_MODE_56000baseCR4_Full_BIT,
1813 .speed = SPEED_56000,
1814 },
1815 {
1816 .mask = MLXSW_REG_PTYS_ETH_SPEED_56GBASE_R4,
1817 .mask_ethtool = ETHTOOL_LINK_MODE_56000baseSR4_Full_BIT,
1818 .speed = SPEED_56000,
1819 },
1820 {
1821 .mask = MLXSW_REG_PTYS_ETH_SPEED_56GBASE_R4,
1822 .mask_ethtool = ETHTOOL_LINK_MODE_56000baseLR4_Full_BIT,
1823 .speed = SPEED_56000,
1824 },
1825 {
1826 .mask = MLXSW_REG_PTYS_ETH_SPEED_100GBASE_CR4,
1827 .mask_ethtool = ETHTOOL_LINK_MODE_100000baseCR4_Full_BIT,
1828 .speed = SPEED_100000,
1829 },
1830 {
1831 .mask = MLXSW_REG_PTYS_ETH_SPEED_100GBASE_SR4,
1832 .mask_ethtool = ETHTOOL_LINK_MODE_100000baseSR4_Full_BIT,
1833 .speed = SPEED_100000,
1834 },
1835 {
1836 .mask = MLXSW_REG_PTYS_ETH_SPEED_100GBASE_KR4,
1837 .mask_ethtool = ETHTOOL_LINK_MODE_100000baseKR4_Full_BIT,
1838 .speed = SPEED_100000,
1839 },
1840 {
1841 .mask = MLXSW_REG_PTYS_ETH_SPEED_100GBASE_LR4_ER4,
1842 .mask_ethtool = ETHTOOL_LINK_MODE_100000baseLR4_ER4_Full_BIT,
1843 .speed = SPEED_100000,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001844 },
1845};
1846
1847#define MLXSW_SP_PORT_LINK_MODE_LEN ARRAY_SIZE(mlxsw_sp_port_link_mode)
1848
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001849static void
1850mlxsw_sp_from_ptys_supported_port(u32 ptys_eth_proto,
1851 struct ethtool_link_ksettings *cmd)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001852{
1853 if (ptys_eth_proto & (MLXSW_REG_PTYS_ETH_SPEED_10GBASE_CR |
1854 MLXSW_REG_PTYS_ETH_SPEED_10GBASE_SR |
1855 MLXSW_REG_PTYS_ETH_SPEED_40GBASE_CR4 |
1856 MLXSW_REG_PTYS_ETH_SPEED_40GBASE_SR4 |
1857 MLXSW_REG_PTYS_ETH_SPEED_100GBASE_SR4 |
1858 MLXSW_REG_PTYS_ETH_SPEED_SGMII))
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001859 ethtool_link_ksettings_add_link_mode(cmd, supported, FIBRE);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001860
1861 if (ptys_eth_proto & (MLXSW_REG_PTYS_ETH_SPEED_10GBASE_KR |
1862 MLXSW_REG_PTYS_ETH_SPEED_10GBASE_KX4 |
1863 MLXSW_REG_PTYS_ETH_SPEED_40GBASE_KR4 |
1864 MLXSW_REG_PTYS_ETH_SPEED_100GBASE_KR4 |
1865 MLXSW_REG_PTYS_ETH_SPEED_1000BASE_KX))
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001866 ethtool_link_ksettings_add_link_mode(cmd, supported, Backplane);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001867}
1868
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001869static void mlxsw_sp_from_ptys_link(u32 ptys_eth_proto, unsigned long *mode)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001870{
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001871 int i;
1872
1873 for (i = 0; i < MLXSW_SP_PORT_LINK_MODE_LEN; i++) {
1874 if (ptys_eth_proto & mlxsw_sp_port_link_mode[i].mask)
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001875 __set_bit(mlxsw_sp_port_link_mode[i].mask_ethtool,
1876 mode);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001877 }
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001878}
1879
1880static void mlxsw_sp_from_ptys_speed_duplex(bool carrier_ok, u32 ptys_eth_proto,
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001881 struct ethtool_link_ksettings *cmd)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001882{
1883 u32 speed = SPEED_UNKNOWN;
1884 u8 duplex = DUPLEX_UNKNOWN;
1885 int i;
1886
1887 if (!carrier_ok)
1888 goto out;
1889
1890 for (i = 0; i < MLXSW_SP_PORT_LINK_MODE_LEN; i++) {
1891 if (ptys_eth_proto & mlxsw_sp_port_link_mode[i].mask) {
1892 speed = mlxsw_sp_port_link_mode[i].speed;
1893 duplex = DUPLEX_FULL;
1894 break;
1895 }
1896 }
1897out:
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001898 cmd->base.speed = speed;
1899 cmd->base.duplex = duplex;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001900}
1901
1902static u8 mlxsw_sp_port_connector_port(u32 ptys_eth_proto)
1903{
1904 if (ptys_eth_proto & (MLXSW_REG_PTYS_ETH_SPEED_10GBASE_SR |
1905 MLXSW_REG_PTYS_ETH_SPEED_40GBASE_SR4 |
1906 MLXSW_REG_PTYS_ETH_SPEED_100GBASE_SR4 |
1907 MLXSW_REG_PTYS_ETH_SPEED_SGMII))
1908 return PORT_FIBRE;
1909
1910 if (ptys_eth_proto & (MLXSW_REG_PTYS_ETH_SPEED_10GBASE_CR |
1911 MLXSW_REG_PTYS_ETH_SPEED_40GBASE_CR4 |
1912 MLXSW_REG_PTYS_ETH_SPEED_100GBASE_CR4))
1913 return PORT_DA;
1914
1915 if (ptys_eth_proto & (MLXSW_REG_PTYS_ETH_SPEED_10GBASE_KR |
1916 MLXSW_REG_PTYS_ETH_SPEED_10GBASE_KX4 |
1917 MLXSW_REG_PTYS_ETH_SPEED_40GBASE_KR4 |
1918 MLXSW_REG_PTYS_ETH_SPEED_100GBASE_KR4))
1919 return PORT_NONE;
1920
1921 return PORT_OTHER;
1922}
1923
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001924static u32
1925mlxsw_sp_to_ptys_advert_link(const struct ethtool_link_ksettings *cmd)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001926{
1927 u32 ptys_proto = 0;
1928 int i;
1929
1930 for (i = 0; i < MLXSW_SP_PORT_LINK_MODE_LEN; i++) {
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001931 if (test_bit(mlxsw_sp_port_link_mode[i].mask_ethtool,
1932 cmd->link_modes.advertising))
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001933 ptys_proto |= mlxsw_sp_port_link_mode[i].mask;
1934 }
1935 return ptys_proto;
1936}
1937
1938static u32 mlxsw_sp_to_ptys_speed(u32 speed)
1939{
1940 u32 ptys_proto = 0;
1941 int i;
1942
1943 for (i = 0; i < MLXSW_SP_PORT_LINK_MODE_LEN; i++) {
1944 if (speed == mlxsw_sp_port_link_mode[i].speed)
1945 ptys_proto |= mlxsw_sp_port_link_mode[i].mask;
1946 }
1947 return ptys_proto;
1948}
1949
Ido Schimmel18f1e702016-02-26 17:32:31 +01001950static u32 mlxsw_sp_to_ptys_upper_speed(u32 upper_speed)
1951{
1952 u32 ptys_proto = 0;
1953 int i;
1954
1955 for (i = 0; i < MLXSW_SP_PORT_LINK_MODE_LEN; i++) {
1956 if (mlxsw_sp_port_link_mode[i].speed <= upper_speed)
1957 ptys_proto |= mlxsw_sp_port_link_mode[i].mask;
1958 }
1959 return ptys_proto;
1960}
1961
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001962static void mlxsw_sp_port_get_link_supported(u32 eth_proto_cap,
1963 struct ethtool_link_ksettings *cmd)
1964{
1965 ethtool_link_ksettings_add_link_mode(cmd, supported, Asym_Pause);
1966 ethtool_link_ksettings_add_link_mode(cmd, supported, Autoneg);
1967 ethtool_link_ksettings_add_link_mode(cmd, supported, Pause);
1968
1969 mlxsw_sp_from_ptys_supported_port(eth_proto_cap, cmd);
1970 mlxsw_sp_from_ptys_link(eth_proto_cap, cmd->link_modes.supported);
1971}
1972
1973static void mlxsw_sp_port_get_link_advertise(u32 eth_proto_admin, bool autoneg,
1974 struct ethtool_link_ksettings *cmd)
1975{
1976 if (!autoneg)
1977 return;
1978
1979 ethtool_link_ksettings_add_link_mode(cmd, advertising, Autoneg);
1980 mlxsw_sp_from_ptys_link(eth_proto_admin, cmd->link_modes.advertising);
1981}
1982
1983static void
1984mlxsw_sp_port_get_link_lp_advertise(u32 eth_proto_lp, u8 autoneg_status,
1985 struct ethtool_link_ksettings *cmd)
1986{
1987 if (autoneg_status != MLXSW_REG_PTYS_AN_STATUS_OK || !eth_proto_lp)
1988 return;
1989
1990 ethtool_link_ksettings_add_link_mode(cmd, lp_advertising, Autoneg);
1991 mlxsw_sp_from_ptys_link(eth_proto_lp, cmd->link_modes.lp_advertising);
1992}
1993
1994static int mlxsw_sp_port_get_link_ksettings(struct net_device *dev,
1995 struct ethtool_link_ksettings *cmd)
1996{
1997 u32 eth_proto_cap, eth_proto_admin, eth_proto_oper, eth_proto_lp;
1998 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
1999 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
2000 char ptys_pl[MLXSW_REG_PTYS_LEN];
2001 u8 autoneg_status;
2002 bool autoneg;
2003 int err;
2004
2005 autoneg = mlxsw_sp_port->link.autoneg;
2006 mlxsw_reg_ptys_pack(ptys_pl, mlxsw_sp_port->local_port, 0);
2007 err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(ptys), ptys_pl);
2008 if (err)
2009 return err;
2010 mlxsw_reg_ptys_unpack(ptys_pl, &eth_proto_cap, &eth_proto_admin,
2011 &eth_proto_oper);
2012
2013 mlxsw_sp_port_get_link_supported(eth_proto_cap, cmd);
2014
2015 mlxsw_sp_port_get_link_advertise(eth_proto_admin, autoneg, cmd);
2016
2017 eth_proto_lp = mlxsw_reg_ptys_eth_proto_lp_advertise_get(ptys_pl);
2018 autoneg_status = mlxsw_reg_ptys_an_status_get(ptys_pl);
2019 mlxsw_sp_port_get_link_lp_advertise(eth_proto_lp, autoneg_status, cmd);
2020
2021 cmd->base.autoneg = autoneg ? AUTONEG_ENABLE : AUTONEG_DISABLE;
2022 cmd->base.port = mlxsw_sp_port_connector_port(eth_proto_oper);
2023 mlxsw_sp_from_ptys_speed_duplex(netif_carrier_ok(dev), eth_proto_oper,
2024 cmd);
2025
2026 return 0;
2027}
2028
2029static int
2030mlxsw_sp_port_set_link_ksettings(struct net_device *dev,
2031 const struct ethtool_link_ksettings *cmd)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002032{
2033 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
2034 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
2035 char ptys_pl[MLXSW_REG_PTYS_LEN];
Ido Schimmelb9d66a32016-09-12 13:26:27 +02002036 u32 eth_proto_cap, eth_proto_new;
Ido Schimmel0c83f882016-09-12 13:26:23 +02002037 bool autoneg;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002038 int err;
2039
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002040 mlxsw_reg_ptys_pack(ptys_pl, mlxsw_sp_port->local_port, 0);
2041 err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(ptys), ptys_pl);
Ido Schimmelb9d66a32016-09-12 13:26:27 +02002042 if (err)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002043 return err;
Ido Schimmelb9d66a32016-09-12 13:26:27 +02002044 mlxsw_reg_ptys_unpack(ptys_pl, &eth_proto_cap, NULL, NULL);
2045
2046 autoneg = cmd->base.autoneg == AUTONEG_ENABLE;
Amit Cohen7219a582019-05-29 10:59:45 +03002047 if (!autoneg && cmd->base.speed == SPEED_56000) {
2048 netdev_err(dev, "56G not supported with autoneg off\n");
2049 return -EINVAL;
2050 }
Ido Schimmelb9d66a32016-09-12 13:26:27 +02002051 eth_proto_new = autoneg ?
2052 mlxsw_sp_to_ptys_advert_link(cmd) :
2053 mlxsw_sp_to_ptys_speed(cmd->base.speed);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002054
2055 eth_proto_new = eth_proto_new & eth_proto_cap;
2056 if (!eth_proto_new) {
Ido Schimmelb9d66a32016-09-12 13:26:27 +02002057 netdev_err(dev, "No supported speed requested\n");
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002058 return -EINVAL;
2059 }
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002060
2061 mlxsw_reg_ptys_pack(ptys_pl, mlxsw_sp_port->local_port, eth_proto_new);
2062 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ptys), ptys_pl);
Ido Schimmelb9d66a32016-09-12 13:26:27 +02002063 if (err)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002064 return err;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002065
Amit Cohen7962b912019-04-18 07:14:16 +00002066 mlxsw_sp_port->link.autoneg = autoneg;
2067
Ido Schimmel6277d462016-07-15 11:14:58 +02002068 if (!netif_running(dev))
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002069 return 0;
2070
Ido Schimmelb9d66a32016-09-12 13:26:27 +02002071 mlxsw_sp_port_admin_status_set(mlxsw_sp_port, false);
2072 mlxsw_sp_port_admin_status_set(mlxsw_sp_port, true);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002073
2074 return 0;
2075}
2076
2077static const struct ethtool_ops mlxsw_sp_port_ethtool_ops = {
2078 .get_drvinfo = mlxsw_sp_port_get_drvinfo,
2079 .get_link = ethtool_op_get_link,
Ido Schimmel9f7ec052016-04-06 17:10:14 +02002080 .get_pauseparam = mlxsw_sp_port_get_pauseparam,
2081 .set_pauseparam = mlxsw_sp_port_set_pauseparam,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002082 .get_strings = mlxsw_sp_port_get_strings,
Ido Schimmel3a66ee32015-11-27 13:45:55 +01002083 .set_phys_id = mlxsw_sp_port_set_phys_id,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002084 .get_ethtool_stats = mlxsw_sp_port_get_stats,
2085 .get_sset_count = mlxsw_sp_port_get_sset_count,
Ido Schimmelb9d66a32016-09-12 13:26:27 +02002086 .get_link_ksettings = mlxsw_sp_port_get_link_ksettings,
2087 .set_link_ksettings = mlxsw_sp_port_set_link_ksettings,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002088};
2089
Ido Schimmel18f1e702016-02-26 17:32:31 +01002090static int
2091mlxsw_sp_port_speed_by_width_set(struct mlxsw_sp_port *mlxsw_sp_port, u8 width)
2092{
2093 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
2094 u32 upper_speed = MLXSW_SP_PORT_BASE_SPEED * width;
2095 char ptys_pl[MLXSW_REG_PTYS_LEN];
2096 u32 eth_proto_admin;
2097
2098 eth_proto_admin = mlxsw_sp_to_ptys_upper_speed(upper_speed);
2099 mlxsw_reg_ptys_pack(ptys_pl, mlxsw_sp_port->local_port,
2100 eth_proto_admin);
2101 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ptys), ptys_pl);
2102}
2103
Ido Schimmel8e8dfe92016-04-06 17:10:10 +02002104int mlxsw_sp_port_ets_set(struct mlxsw_sp_port *mlxsw_sp_port,
2105 enum mlxsw_reg_qeec_hr hr, u8 index, u8 next_index,
2106 bool dwrr, u8 dwrr_weight)
Ido Schimmel90183b92016-04-06 17:10:08 +02002107{
2108 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
2109 char qeec_pl[MLXSW_REG_QEEC_LEN];
2110
2111 mlxsw_reg_qeec_pack(qeec_pl, mlxsw_sp_port->local_port, hr, index,
2112 next_index);
2113 mlxsw_reg_qeec_de_set(qeec_pl, true);
2114 mlxsw_reg_qeec_dwrr_set(qeec_pl, dwrr);
2115 mlxsw_reg_qeec_dwrr_weight_set(qeec_pl, dwrr_weight);
2116 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(qeec), qeec_pl);
2117}
2118
Ido Schimmelcc7cf512016-04-06 17:10:11 +02002119int mlxsw_sp_port_ets_maxrate_set(struct mlxsw_sp_port *mlxsw_sp_port,
2120 enum mlxsw_reg_qeec_hr hr, u8 index,
2121 u8 next_index, u32 maxrate)
Ido Schimmel90183b92016-04-06 17:10:08 +02002122{
2123 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
2124 char qeec_pl[MLXSW_REG_QEEC_LEN];
2125
2126 mlxsw_reg_qeec_pack(qeec_pl, mlxsw_sp_port->local_port, hr, index,
2127 next_index);
2128 mlxsw_reg_qeec_mase_set(qeec_pl, true);
2129 mlxsw_reg_qeec_max_shaper_rate_set(qeec_pl, maxrate);
2130 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(qeec), qeec_pl);
2131}
2132
Ido Schimmel8e8dfe92016-04-06 17:10:10 +02002133int mlxsw_sp_port_prio_tc_set(struct mlxsw_sp_port *mlxsw_sp_port,
2134 u8 switch_prio, u8 tclass)
Ido Schimmel90183b92016-04-06 17:10:08 +02002135{
2136 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
2137 char qtct_pl[MLXSW_REG_QTCT_LEN];
2138
2139 mlxsw_reg_qtct_pack(qtct_pl, mlxsw_sp_port->local_port, switch_prio,
2140 tclass);
2141 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(qtct), qtct_pl);
2142}
2143
2144static int mlxsw_sp_port_ets_init(struct mlxsw_sp_port *mlxsw_sp_port)
2145{
2146 int err, i;
2147
2148 /* Setup the elements hierarcy, so that each TC is linked to
2149 * one subgroup, which are all member in the same group.
2150 */
2151 err = mlxsw_sp_port_ets_set(mlxsw_sp_port,
2152 MLXSW_REG_QEEC_HIERARCY_GROUP, 0, 0, false,
2153 0);
2154 if (err)
2155 return err;
2156 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
2157 err = mlxsw_sp_port_ets_set(mlxsw_sp_port,
2158 MLXSW_REG_QEEC_HIERARCY_SUBGROUP, i,
2159 0, false, 0);
2160 if (err)
2161 return err;
2162 }
2163 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
2164 err = mlxsw_sp_port_ets_set(mlxsw_sp_port,
2165 MLXSW_REG_QEEC_HIERARCY_TC, i, i,
2166 false, 0);
2167 if (err)
2168 return err;
2169 }
2170
2171 /* Make sure the max shaper is disabled in all hierarcies that
2172 * support it.
2173 */
2174 err = mlxsw_sp_port_ets_maxrate_set(mlxsw_sp_port,
2175 MLXSW_REG_QEEC_HIERARCY_PORT, 0, 0,
2176 MLXSW_REG_QEEC_MAS_DIS);
2177 if (err)
2178 return err;
2179 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
2180 err = mlxsw_sp_port_ets_maxrate_set(mlxsw_sp_port,
2181 MLXSW_REG_QEEC_HIERARCY_SUBGROUP,
2182 i, 0,
2183 MLXSW_REG_QEEC_MAS_DIS);
2184 if (err)
2185 return err;
2186 }
2187 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
2188 err = mlxsw_sp_port_ets_maxrate_set(mlxsw_sp_port,
2189 MLXSW_REG_QEEC_HIERARCY_TC,
2190 i, i,
2191 MLXSW_REG_QEEC_MAS_DIS);
2192 if (err)
2193 return err;
Petr Machataa59c40c12018-09-20 09:21:24 +03002194
2195 err = mlxsw_sp_port_ets_maxrate_set(mlxsw_sp_port,
2196 MLXSW_REG_QEEC_HIERARCY_TC,
2197 i + 8, i,
2198 MLXSW_REG_QEEC_MAS_DIS);
2199 if (err)
2200 return err;
Ido Schimmel90183b92016-04-06 17:10:08 +02002201 }
2202
2203 /* Map all priorities to traffic class 0. */
2204 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
2205 err = mlxsw_sp_port_prio_tc_set(mlxsw_sp_port, i, 0);
2206 if (err)
2207 return err;
2208 }
2209
2210 return 0;
2211}
2212
Ido Schimmel05978482016-08-17 16:39:30 +02002213static int mlxsw_sp_port_pvid_vport_create(struct mlxsw_sp_port *mlxsw_sp_port)
2214{
2215 mlxsw_sp_port->pvid = 1;
2216
2217 return mlxsw_sp_port_add_vid(mlxsw_sp_port->dev, 0, 1);
2218}
2219
2220static int mlxsw_sp_port_pvid_vport_destroy(struct mlxsw_sp_port *mlxsw_sp_port)
2221{
2222 return mlxsw_sp_port_kill_vid(mlxsw_sp_port->dev, 0, 1);
2223}
2224
Ido Schimmelbe945352016-06-09 09:51:39 +02002225static int mlxsw_sp_port_create(struct mlxsw_sp *mlxsw_sp, u8 local_port,
Ido Schimmeld664b412016-06-09 09:51:40 +02002226 bool split, u8 module, u8 width, u8 lane)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002227{
2228 struct mlxsw_sp_port *mlxsw_sp_port;
2229 struct net_device *dev;
Ido Schimmelbd40e9d2015-12-15 16:03:36 +01002230 size_t bytes;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002231 int err;
2232
2233 dev = alloc_etherdev(sizeof(struct mlxsw_sp_port));
2234 if (!dev)
2235 return -ENOMEM;
2236 mlxsw_sp_port = netdev_priv(dev);
2237 mlxsw_sp_port->dev = dev;
2238 mlxsw_sp_port->mlxsw_sp = mlxsw_sp;
2239 mlxsw_sp_port->local_port = local_port;
Ido Schimmel18f1e702016-02-26 17:32:31 +01002240 mlxsw_sp_port->split = split;
Ido Schimmeld664b412016-06-09 09:51:40 +02002241 mlxsw_sp_port->mapping.module = module;
2242 mlxsw_sp_port->mapping.width = width;
2243 mlxsw_sp_port->mapping.lane = lane;
Ido Schimmel0c83f882016-09-12 13:26:23 +02002244 mlxsw_sp_port->link.autoneg = 1;
Ido Schimmelbd40e9d2015-12-15 16:03:36 +01002245 bytes = DIV_ROUND_UP(VLAN_N_VID, BITS_PER_BYTE);
2246 mlxsw_sp_port->active_vlans = kzalloc(bytes, GFP_KERNEL);
2247 if (!mlxsw_sp_port->active_vlans) {
2248 err = -ENOMEM;
2249 goto err_port_active_vlans_alloc;
2250 }
Elad Razfc1273a2016-01-06 13:01:11 +01002251 mlxsw_sp_port->untagged_vlans = kzalloc(bytes, GFP_KERNEL);
2252 if (!mlxsw_sp_port->untagged_vlans) {
2253 err = -ENOMEM;
2254 goto err_port_untagged_vlans_alloc;
2255 }
Ido Schimmel7f71eb42015-12-15 16:03:37 +01002256 INIT_LIST_HEAD(&mlxsw_sp_port->vports_list);
Yotam Gigi763b4b72016-07-21 12:03:17 +02002257 INIT_LIST_HEAD(&mlxsw_sp_port->mall_tc_list);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002258
2259 mlxsw_sp_port->pcpu_stats =
2260 netdev_alloc_pcpu_stats(struct mlxsw_sp_port_pcpu_stats);
2261 if (!mlxsw_sp_port->pcpu_stats) {
2262 err = -ENOMEM;
2263 goto err_alloc_stats;
2264 }
2265
Nogah Frankelfc1bbb02016-09-16 15:05:38 +02002266 mlxsw_sp_port->hw_stats.cache =
2267 kzalloc(sizeof(*mlxsw_sp_port->hw_stats.cache), GFP_KERNEL);
2268
2269 if (!mlxsw_sp_port->hw_stats.cache) {
2270 err = -ENOMEM;
2271 goto err_alloc_hw_stats;
2272 }
2273 INIT_DELAYED_WORK(&mlxsw_sp_port->hw_stats.update_dw,
2274 &update_stats_cache);
2275
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002276 dev->netdev_ops = &mlxsw_sp_port_netdev_ops;
2277 dev->ethtool_ops = &mlxsw_sp_port_ethtool_ops;
2278
Ido Schimmel3247ff22016-09-08 08:16:02 +02002279 err = mlxsw_sp_port_swid_set(mlxsw_sp_port, 0);
2280 if (err) {
2281 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to set SWID\n",
2282 mlxsw_sp_port->local_port);
2283 goto err_port_swid_set;
2284 }
2285
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002286 err = mlxsw_sp_port_dev_addr_init(mlxsw_sp_port);
2287 if (err) {
2288 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Unable to init port mac address\n",
2289 mlxsw_sp_port->local_port);
2290 goto err_dev_addr_init;
2291 }
2292
2293 netif_carrier_off(dev);
2294
2295 dev->features |= NETIF_F_NETNS_LOCAL | NETIF_F_LLTX | NETIF_F_SG |
Yotam Gigi763b4b72016-07-21 12:03:17 +02002296 NETIF_F_HW_VLAN_CTAG_FILTER | NETIF_F_HW_TC;
2297 dev->hw_features |= NETIF_F_HW_TC;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002298
2299 /* Each packet needs to have a Tx header (metadata) on top all other
2300 * headers.
2301 */
Yotam Gigifeb7d382016-10-04 09:46:04 +02002302 dev->needed_headroom = MLXSW_TXHDR_LEN;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002303
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002304 err = mlxsw_sp_port_system_port_mapping_set(mlxsw_sp_port);
2305 if (err) {
2306 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to set system port mapping\n",
2307 mlxsw_sp_port->local_port);
2308 goto err_port_system_port_mapping_set;
2309 }
2310
Ido Schimmel18f1e702016-02-26 17:32:31 +01002311 err = mlxsw_sp_port_speed_by_width_set(mlxsw_sp_port, width);
2312 if (err) {
2313 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to enable speeds\n",
2314 mlxsw_sp_port->local_port);
2315 goto err_port_speed_by_width_set;
2316 }
2317
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002318 err = mlxsw_sp_port_mtu_set(mlxsw_sp_port, ETH_DATA_LEN);
2319 if (err) {
2320 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to set MTU\n",
2321 mlxsw_sp_port->local_port);
2322 goto err_port_mtu_set;
2323 }
2324
2325 err = mlxsw_sp_port_admin_status_set(mlxsw_sp_port, false);
2326 if (err)
2327 goto err_port_admin_status_set;
2328
2329 err = mlxsw_sp_port_buffers_init(mlxsw_sp_port);
2330 if (err) {
2331 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to initialize buffers\n",
2332 mlxsw_sp_port->local_port);
2333 goto err_port_buffers_init;
2334 }
2335
Ido Schimmel90183b92016-04-06 17:10:08 +02002336 err = mlxsw_sp_port_ets_init(mlxsw_sp_port);
2337 if (err) {
2338 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to initialize ETS\n",
2339 mlxsw_sp_port->local_port);
2340 goto err_port_ets_init;
2341 }
2342
Ido Schimmelf00817d2016-04-06 17:10:09 +02002343 /* ETS and buffers must be initialized before DCB. */
2344 err = mlxsw_sp_port_dcb_init(mlxsw_sp_port);
2345 if (err) {
2346 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to initialize DCB\n",
2347 mlxsw_sp_port->local_port);
2348 goto err_port_dcb_init;
2349 }
2350
Ido Schimmel05978482016-08-17 16:39:30 +02002351 err = mlxsw_sp_port_pvid_vport_create(mlxsw_sp_port);
2352 if (err) {
2353 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to create PVID vPort\n",
2354 mlxsw_sp_port->local_port);
2355 goto err_port_pvid_vport_create;
2356 }
2357
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002358 mlxsw_sp_port_switchdev_init(mlxsw_sp_port);
Ido Schimmel2f258442016-08-17 16:39:31 +02002359 mlxsw_sp->ports[local_port] = mlxsw_sp_port;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002360 err = register_netdev(dev);
2361 if (err) {
2362 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to register netdev\n",
2363 mlxsw_sp_port->local_port);
2364 goto err_register_netdev;
2365 }
2366
Jiri Pirko932762b2016-04-08 19:11:21 +02002367 err = mlxsw_core_port_init(mlxsw_sp->core, &mlxsw_sp_port->core_port,
2368 mlxsw_sp_port->local_port, dev,
2369 mlxsw_sp_port->split, module);
2370 if (err) {
2371 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to init core port\n",
2372 mlxsw_sp_port->local_port);
2373 goto err_core_port_init;
2374 }
Jiri Pirkoc4745502016-02-26 17:32:26 +01002375
Nogah Frankelfc1bbb02016-09-16 15:05:38 +02002376 mlxsw_core_schedule_dw(&mlxsw_sp_port->hw_stats.update_dw, 0);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002377 return 0;
2378
Jiri Pirko932762b2016-04-08 19:11:21 +02002379err_core_port_init:
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002380 unregister_netdev(dev);
2381err_register_netdev:
Ido Schimmel2f258442016-08-17 16:39:31 +02002382 mlxsw_sp->ports[local_port] = NULL;
Ido Schimmel05832722016-08-17 16:39:35 +02002383 mlxsw_sp_port_switchdev_fini(mlxsw_sp_port);
Ido Schimmel05978482016-08-17 16:39:30 +02002384 mlxsw_sp_port_pvid_vport_destroy(mlxsw_sp_port);
2385err_port_pvid_vport_create:
Ido Schimmel4de34eb2016-08-04 17:36:22 +03002386 mlxsw_sp_port_dcb_fini(mlxsw_sp_port);
Ido Schimmelf00817d2016-04-06 17:10:09 +02002387err_port_dcb_init:
Ido Schimmel90183b92016-04-06 17:10:08 +02002388err_port_ets_init:
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002389err_port_buffers_init:
2390err_port_admin_status_set:
2391err_port_mtu_set:
Ido Schimmel18f1e702016-02-26 17:32:31 +01002392err_port_speed_by_width_set:
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002393err_port_system_port_mapping_set:
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002394err_dev_addr_init:
Ido Schimmel3247ff22016-09-08 08:16:02 +02002395 mlxsw_sp_port_swid_set(mlxsw_sp_port, MLXSW_PORT_SWID_DISABLED_PORT);
2396err_port_swid_set:
Nogah Frankelfc1bbb02016-09-16 15:05:38 +02002397 kfree(mlxsw_sp_port->hw_stats.cache);
2398err_alloc_hw_stats:
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002399 free_percpu(mlxsw_sp_port->pcpu_stats);
2400err_alloc_stats:
Elad Razfc1273a2016-01-06 13:01:11 +01002401 kfree(mlxsw_sp_port->untagged_vlans);
2402err_port_untagged_vlans_alloc:
Ido Schimmelbd40e9d2015-12-15 16:03:36 +01002403 kfree(mlxsw_sp_port->active_vlans);
2404err_port_active_vlans_alloc:
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002405 free_netdev(dev);
2406 return err;
2407}
2408
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002409static void mlxsw_sp_port_remove(struct mlxsw_sp *mlxsw_sp, u8 local_port)
2410{
2411 struct mlxsw_sp_port *mlxsw_sp_port = mlxsw_sp->ports[local_port];
2412
2413 if (!mlxsw_sp_port)
2414 return;
Nogah Frankelfc1bbb02016-09-16 15:05:38 +02002415 cancel_delayed_work_sync(&mlxsw_sp_port->hw_stats.update_dw);
Jiri Pirko932762b2016-04-08 19:11:21 +02002416 mlxsw_core_port_fini(&mlxsw_sp_port->core_port);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002417 unregister_netdev(mlxsw_sp_port->dev); /* This calls ndo_stop */
Ido Schimmel2f258442016-08-17 16:39:31 +02002418 mlxsw_sp->ports[local_port] = NULL;
Ido Schimmel05832722016-08-17 16:39:35 +02002419 mlxsw_sp_port_switchdev_fini(mlxsw_sp_port);
Ido Schimmel05978482016-08-17 16:39:30 +02002420 mlxsw_sp_port_pvid_vport_destroy(mlxsw_sp_port);
Ido Schimmelf00817d2016-04-06 17:10:09 +02002421 mlxsw_sp_port_dcb_fini(mlxsw_sp_port);
Ido Schimmel3e9b27b2016-02-26 17:32:28 +01002422 mlxsw_sp_port_swid_set(mlxsw_sp_port, MLXSW_PORT_SWID_DISABLED_PORT);
2423 mlxsw_sp_port_module_unmap(mlxsw_sp, mlxsw_sp_port->local_port);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002424 free_percpu(mlxsw_sp_port->pcpu_stats);
Nogah Frankelfc1bbb02016-09-16 15:05:38 +02002425 kfree(mlxsw_sp_port->hw_stats.cache);
Elad Razfc1273a2016-01-06 13:01:11 +01002426 kfree(mlxsw_sp_port->untagged_vlans);
Ido Schimmelbd40e9d2015-12-15 16:03:36 +01002427 kfree(mlxsw_sp_port->active_vlans);
Ido Schimmel32d863f2016-07-02 11:00:10 +02002428 WARN_ON_ONCE(!list_empty(&mlxsw_sp_port->vports_list));
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002429 free_netdev(mlxsw_sp_port->dev);
2430}
2431
2432static void mlxsw_sp_ports_remove(struct mlxsw_sp *mlxsw_sp)
2433{
2434 int i;
2435
2436 for (i = 1; i < MLXSW_PORT_MAX_PORTS; i++)
2437 mlxsw_sp_port_remove(mlxsw_sp, i);
2438 kfree(mlxsw_sp->ports);
2439}
2440
2441static int mlxsw_sp_ports_create(struct mlxsw_sp *mlxsw_sp)
2442{
Ido Schimmeld664b412016-06-09 09:51:40 +02002443 u8 module, width, lane;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002444 size_t alloc_size;
2445 int i;
2446 int err;
2447
2448 alloc_size = sizeof(struct mlxsw_sp_port *) * MLXSW_PORT_MAX_PORTS;
2449 mlxsw_sp->ports = kzalloc(alloc_size, GFP_KERNEL);
2450 if (!mlxsw_sp->ports)
2451 return -ENOMEM;
2452
2453 for (i = 1; i < MLXSW_PORT_MAX_PORTS; i++) {
Ido Schimmel558c2d52016-02-26 17:32:29 +01002454 err = mlxsw_sp_port_module_info_get(mlxsw_sp, i, &module,
Ido Schimmeld664b412016-06-09 09:51:40 +02002455 &width, &lane);
Ido Schimmel558c2d52016-02-26 17:32:29 +01002456 if (err)
2457 goto err_port_module_info_get;
2458 if (!width)
2459 continue;
2460 mlxsw_sp->port_to_module[i] = module;
Ido Schimmeld664b412016-06-09 09:51:40 +02002461 err = mlxsw_sp_port_create(mlxsw_sp, i, false, module, width,
2462 lane);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002463 if (err)
2464 goto err_port_create;
2465 }
2466 return 0;
2467
2468err_port_create:
Ido Schimmel558c2d52016-02-26 17:32:29 +01002469err_port_module_info_get:
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002470 for (i--; i >= 1; i--)
2471 mlxsw_sp_port_remove(mlxsw_sp, i);
2472 kfree(mlxsw_sp->ports);
2473 return err;
2474}
2475
Ido Schimmel18f1e702016-02-26 17:32:31 +01002476static u8 mlxsw_sp_cluster_base_port_get(u8 local_port)
2477{
2478 u8 offset = (local_port - 1) % MLXSW_SP_PORTS_PER_CLUSTER_MAX;
2479
2480 return local_port - offset;
2481}
2482
Ido Schimmelbe945352016-06-09 09:51:39 +02002483static int mlxsw_sp_port_split_create(struct mlxsw_sp *mlxsw_sp, u8 base_port,
2484 u8 module, unsigned int count)
2485{
2486 u8 width = MLXSW_PORT_MODULE_MAX_WIDTH / count;
2487 int err, i;
2488
2489 for (i = 0; i < count; i++) {
2490 err = mlxsw_sp_port_module_map(mlxsw_sp, base_port + i, module,
2491 width, i * width);
2492 if (err)
2493 goto err_port_module_map;
2494 }
2495
2496 for (i = 0; i < count; i++) {
2497 err = __mlxsw_sp_port_swid_set(mlxsw_sp, base_port + i, 0);
2498 if (err)
2499 goto err_port_swid_set;
2500 }
2501
2502 for (i = 0; i < count; i++) {
2503 err = mlxsw_sp_port_create(mlxsw_sp, base_port + i, true,
Ido Schimmeld664b412016-06-09 09:51:40 +02002504 module, width, i * width);
Ido Schimmelbe945352016-06-09 09:51:39 +02002505 if (err)
2506 goto err_port_create;
2507 }
2508
2509 return 0;
2510
2511err_port_create:
2512 for (i--; i >= 0; i--)
2513 mlxsw_sp_port_remove(mlxsw_sp, base_port + i);
2514 i = count;
2515err_port_swid_set:
2516 for (i--; i >= 0; i--)
2517 __mlxsw_sp_port_swid_set(mlxsw_sp, base_port + i,
2518 MLXSW_PORT_SWID_DISABLED_PORT);
2519 i = count;
2520err_port_module_map:
2521 for (i--; i >= 0; i--)
2522 mlxsw_sp_port_module_unmap(mlxsw_sp, base_port + i);
2523 return err;
2524}
2525
2526static void mlxsw_sp_port_unsplit_create(struct mlxsw_sp *mlxsw_sp,
2527 u8 base_port, unsigned int count)
2528{
2529 u8 local_port, module, width = MLXSW_PORT_MODULE_MAX_WIDTH;
2530 int i;
2531
2532 /* Split by four means we need to re-create two ports, otherwise
2533 * only one.
2534 */
2535 count = count / 2;
2536
2537 for (i = 0; i < count; i++) {
2538 local_port = base_port + i * 2;
2539 module = mlxsw_sp->port_to_module[local_port];
2540
2541 mlxsw_sp_port_module_map(mlxsw_sp, local_port, module, width,
2542 0);
2543 }
2544
2545 for (i = 0; i < count; i++)
2546 __mlxsw_sp_port_swid_set(mlxsw_sp, base_port + i * 2, 0);
2547
2548 for (i = 0; i < count; i++) {
2549 local_port = base_port + i * 2;
2550 module = mlxsw_sp->port_to_module[local_port];
2551
2552 mlxsw_sp_port_create(mlxsw_sp, local_port, false, module,
Ido Schimmeld664b412016-06-09 09:51:40 +02002553 width, 0);
Ido Schimmelbe945352016-06-09 09:51:39 +02002554 }
2555}
2556
Jiri Pirkob2f10572016-04-08 19:11:23 +02002557static int mlxsw_sp_port_split(struct mlxsw_core *mlxsw_core, u8 local_port,
2558 unsigned int count)
Ido Schimmel18f1e702016-02-26 17:32:31 +01002559{
Jiri Pirkob2f10572016-04-08 19:11:23 +02002560 struct mlxsw_sp *mlxsw_sp = mlxsw_core_driver_priv(mlxsw_core);
Ido Schimmel18f1e702016-02-26 17:32:31 +01002561 struct mlxsw_sp_port *mlxsw_sp_port;
Ido Schimmel18f1e702016-02-26 17:32:31 +01002562 u8 module, cur_width, base_port;
2563 int i;
2564 int err;
2565
2566 mlxsw_sp_port = mlxsw_sp->ports[local_port];
2567 if (!mlxsw_sp_port) {
2568 dev_err(mlxsw_sp->bus_info->dev, "Port number \"%d\" does not exist\n",
2569 local_port);
2570 return -EINVAL;
2571 }
2572
Ido Schimmeld664b412016-06-09 09:51:40 +02002573 module = mlxsw_sp_port->mapping.module;
2574 cur_width = mlxsw_sp_port->mapping.width;
2575
Ido Schimmel18f1e702016-02-26 17:32:31 +01002576 if (count != 2 && count != 4) {
2577 netdev_err(mlxsw_sp_port->dev, "Port can only be split into 2 or 4 ports\n");
2578 return -EINVAL;
2579 }
2580
Ido Schimmel18f1e702016-02-26 17:32:31 +01002581 if (cur_width != MLXSW_PORT_MODULE_MAX_WIDTH) {
2582 netdev_err(mlxsw_sp_port->dev, "Port cannot be split further\n");
2583 return -EINVAL;
2584 }
2585
2586 /* Make sure we have enough slave (even) ports for the split. */
2587 if (count == 2) {
2588 base_port = local_port;
2589 if (mlxsw_sp->ports[base_port + 1]) {
2590 netdev_err(mlxsw_sp_port->dev, "Invalid split configuration\n");
2591 return -EINVAL;
2592 }
2593 } else {
2594 base_port = mlxsw_sp_cluster_base_port_get(local_port);
2595 if (mlxsw_sp->ports[base_port + 1] ||
2596 mlxsw_sp->ports[base_port + 3]) {
2597 netdev_err(mlxsw_sp_port->dev, "Invalid split configuration\n");
2598 return -EINVAL;
2599 }
2600 }
2601
2602 for (i = 0; i < count; i++)
2603 mlxsw_sp_port_remove(mlxsw_sp, base_port + i);
2604
Ido Schimmelbe945352016-06-09 09:51:39 +02002605 err = mlxsw_sp_port_split_create(mlxsw_sp, base_port, module, count);
2606 if (err) {
2607 dev_err(mlxsw_sp->bus_info->dev, "Failed to create split ports\n");
2608 goto err_port_split_create;
Ido Schimmel18f1e702016-02-26 17:32:31 +01002609 }
2610
2611 return 0;
2612
Ido Schimmelbe945352016-06-09 09:51:39 +02002613err_port_split_create:
2614 mlxsw_sp_port_unsplit_create(mlxsw_sp, base_port, count);
Ido Schimmel18f1e702016-02-26 17:32:31 +01002615 return err;
2616}
2617
Jiri Pirkob2f10572016-04-08 19:11:23 +02002618static int mlxsw_sp_port_unsplit(struct mlxsw_core *mlxsw_core, u8 local_port)
Ido Schimmel18f1e702016-02-26 17:32:31 +01002619{
Jiri Pirkob2f10572016-04-08 19:11:23 +02002620 struct mlxsw_sp *mlxsw_sp = mlxsw_core_driver_priv(mlxsw_core);
Ido Schimmel18f1e702016-02-26 17:32:31 +01002621 struct mlxsw_sp_port *mlxsw_sp_port;
Ido Schimmeld664b412016-06-09 09:51:40 +02002622 u8 cur_width, base_port;
Ido Schimmel18f1e702016-02-26 17:32:31 +01002623 unsigned int count;
2624 int i;
Ido Schimmel18f1e702016-02-26 17:32:31 +01002625
2626 mlxsw_sp_port = mlxsw_sp->ports[local_port];
2627 if (!mlxsw_sp_port) {
2628 dev_err(mlxsw_sp->bus_info->dev, "Port number \"%d\" does not exist\n",
2629 local_port);
2630 return -EINVAL;
2631 }
2632
2633 if (!mlxsw_sp_port->split) {
2634 netdev_err(mlxsw_sp_port->dev, "Port wasn't split\n");
2635 return -EINVAL;
2636 }
2637
Ido Schimmeld664b412016-06-09 09:51:40 +02002638 cur_width = mlxsw_sp_port->mapping.width;
Ido Schimmel18f1e702016-02-26 17:32:31 +01002639 count = cur_width == 1 ? 4 : 2;
2640
2641 base_port = mlxsw_sp_cluster_base_port_get(local_port);
2642
2643 /* Determine which ports to remove. */
2644 if (count == 2 && local_port >= base_port + 2)
2645 base_port = base_port + 2;
2646
2647 for (i = 0; i < count; i++)
2648 mlxsw_sp_port_remove(mlxsw_sp, base_port + i);
2649
Ido Schimmelbe945352016-06-09 09:51:39 +02002650 mlxsw_sp_port_unsplit_create(mlxsw_sp, base_port, count);
Ido Schimmel18f1e702016-02-26 17:32:31 +01002651
2652 return 0;
2653}
2654
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002655static void mlxsw_sp_pude_event_func(const struct mlxsw_reg_info *reg,
2656 char *pude_pl, void *priv)
2657{
2658 struct mlxsw_sp *mlxsw_sp = priv;
2659 struct mlxsw_sp_port *mlxsw_sp_port;
2660 enum mlxsw_reg_pude_oper_status status;
2661 u8 local_port;
2662
2663 local_port = mlxsw_reg_pude_local_port_get(pude_pl);
2664 mlxsw_sp_port = mlxsw_sp->ports[local_port];
Ido Schimmelbbf2a472016-07-02 11:00:14 +02002665 if (!mlxsw_sp_port)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002666 return;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002667
2668 status = mlxsw_reg_pude_oper_status_get(pude_pl);
2669 if (status == MLXSW_PORT_OPER_STATUS_UP) {
2670 netdev_info(mlxsw_sp_port->dev, "link up\n");
2671 netif_carrier_on(mlxsw_sp_port->dev);
2672 } else {
2673 netdev_info(mlxsw_sp_port->dev, "link down\n");
2674 netif_carrier_off(mlxsw_sp_port->dev);
2675 }
2676}
2677
2678static struct mlxsw_event_listener mlxsw_sp_pude_event = {
2679 .func = mlxsw_sp_pude_event_func,
2680 .trap_id = MLXSW_TRAP_ID_PUDE,
2681};
2682
2683static int mlxsw_sp_event_register(struct mlxsw_sp *mlxsw_sp,
2684 enum mlxsw_event_trap_id trap_id)
2685{
2686 struct mlxsw_event_listener *el;
2687 char hpkt_pl[MLXSW_REG_HPKT_LEN];
2688 int err;
2689
2690 switch (trap_id) {
2691 case MLXSW_TRAP_ID_PUDE:
2692 el = &mlxsw_sp_pude_event;
2693 break;
2694 }
2695 err = mlxsw_core_event_listener_register(mlxsw_sp->core, el, mlxsw_sp);
2696 if (err)
2697 return err;
2698
2699 mlxsw_reg_hpkt_pack(hpkt_pl, MLXSW_REG_HPKT_ACTION_FORWARD, trap_id);
2700 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(hpkt), hpkt_pl);
2701 if (err)
2702 goto err_event_trap_set;
2703
2704 return 0;
2705
2706err_event_trap_set:
2707 mlxsw_core_event_listener_unregister(mlxsw_sp->core, el, mlxsw_sp);
2708 return err;
2709}
2710
2711static void mlxsw_sp_event_unregister(struct mlxsw_sp *mlxsw_sp,
2712 enum mlxsw_event_trap_id trap_id)
2713{
2714 struct mlxsw_event_listener *el;
2715
2716 switch (trap_id) {
2717 case MLXSW_TRAP_ID_PUDE:
2718 el = &mlxsw_sp_pude_event;
2719 break;
2720 }
2721 mlxsw_core_event_listener_unregister(mlxsw_sp->core, el, mlxsw_sp);
2722}
2723
2724static void mlxsw_sp_rx_listener_func(struct sk_buff *skb, u8 local_port,
2725 void *priv)
2726{
2727 struct mlxsw_sp *mlxsw_sp = priv;
2728 struct mlxsw_sp_port *mlxsw_sp_port = mlxsw_sp->ports[local_port];
2729 struct mlxsw_sp_port_pcpu_stats *pcpu_stats;
2730
2731 if (unlikely(!mlxsw_sp_port)) {
2732 dev_warn_ratelimited(mlxsw_sp->bus_info->dev, "Port %d: skb received for non-existent port\n",
2733 local_port);
2734 return;
2735 }
2736
2737 skb->dev = mlxsw_sp_port->dev;
2738
2739 pcpu_stats = this_cpu_ptr(mlxsw_sp_port->pcpu_stats);
2740 u64_stats_update_begin(&pcpu_stats->syncp);
2741 pcpu_stats->rx_packets++;
2742 pcpu_stats->rx_bytes += skb->len;
2743 u64_stats_update_end(&pcpu_stats->syncp);
2744
2745 skb->protocol = eth_type_trans(skb, skb->dev);
2746 netif_receive_skb(skb);
2747}
2748
Ido Schimmel1c6c6d22016-08-25 18:42:40 +02002749static void mlxsw_sp_rx_listener_mark_func(struct sk_buff *skb, u8 local_port,
2750 void *priv)
2751{
2752 skb->offload_fwd_mark = 1;
2753 return mlxsw_sp_rx_listener_func(skb, local_port, priv);
2754}
2755
Ido Schimmel63a81142016-08-25 18:42:39 +02002756#define MLXSW_SP_RXL(_func, _trap_id, _action) \
2757 { \
2758 .func = _func, \
2759 .local_port = MLXSW_PORT_DONT_CARE, \
2760 .trap_id = MLXSW_TRAP_ID_##_trap_id, \
2761 .action = MLXSW_REG_HPKT_ACTION_##_action, \
Ido Schimmel93393b32016-08-25 18:42:38 +02002762 }
2763
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002764static const struct mlxsw_rx_listener mlxsw_sp_rx_listener[] = {
Ido Schimmel63a81142016-08-25 18:42:39 +02002765 MLXSW_SP_RXL(mlxsw_sp_rx_listener_func, FDB_MC, TRAP_TO_CPU),
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002766 /* Traps for specific L2 packet types, not trapped as FDB MC */
Ido Schimmel63a81142016-08-25 18:42:39 +02002767 MLXSW_SP_RXL(mlxsw_sp_rx_listener_func, STP, TRAP_TO_CPU),
2768 MLXSW_SP_RXL(mlxsw_sp_rx_listener_func, LACP, TRAP_TO_CPU),
2769 MLXSW_SP_RXL(mlxsw_sp_rx_listener_func, EAPOL, TRAP_TO_CPU),
2770 MLXSW_SP_RXL(mlxsw_sp_rx_listener_func, LLDP, TRAP_TO_CPU),
2771 MLXSW_SP_RXL(mlxsw_sp_rx_listener_func, MMRP, TRAP_TO_CPU),
2772 MLXSW_SP_RXL(mlxsw_sp_rx_listener_func, MVRP, TRAP_TO_CPU),
2773 MLXSW_SP_RXL(mlxsw_sp_rx_listener_func, RPVST, TRAP_TO_CPU),
Ido Schimmel1c6c6d22016-08-25 18:42:40 +02002774 MLXSW_SP_RXL(mlxsw_sp_rx_listener_mark_func, DHCP, MIRROR_TO_CPU),
2775 MLXSW_SP_RXL(mlxsw_sp_rx_listener_mark_func, IGMP_QUERY, MIRROR_TO_CPU),
Ido Schimmel63a81142016-08-25 18:42:39 +02002776 MLXSW_SP_RXL(mlxsw_sp_rx_listener_func, IGMP_V1_REPORT, TRAP_TO_CPU),
2777 MLXSW_SP_RXL(mlxsw_sp_rx_listener_func, IGMP_V2_REPORT, TRAP_TO_CPU),
2778 MLXSW_SP_RXL(mlxsw_sp_rx_listener_func, IGMP_V2_LEAVE, TRAP_TO_CPU),
2779 MLXSW_SP_RXL(mlxsw_sp_rx_listener_func, IGMP_V3_REPORT, TRAP_TO_CPU),
Ido Schimmel1c6c6d22016-08-25 18:42:40 +02002780 MLXSW_SP_RXL(mlxsw_sp_rx_listener_mark_func, ARPBC, MIRROR_TO_CPU),
2781 MLXSW_SP_RXL(mlxsw_sp_rx_listener_mark_func, ARPUC, MIRROR_TO_CPU),
Ido Schimmel93393b32016-08-25 18:42:38 +02002782 /* L3 traps */
Ido Schimmel63a81142016-08-25 18:42:39 +02002783 MLXSW_SP_RXL(mlxsw_sp_rx_listener_func, MTUERROR, TRAP_TO_CPU),
2784 MLXSW_SP_RXL(mlxsw_sp_rx_listener_func, TTLERROR, TRAP_TO_CPU),
2785 MLXSW_SP_RXL(mlxsw_sp_rx_listener_func, LBERROR, TRAP_TO_CPU),
Ido Schimmel1c6c6d22016-08-25 18:42:40 +02002786 MLXSW_SP_RXL(mlxsw_sp_rx_listener_mark_func, OSPF, TRAP_TO_CPU),
Ido Schimmel63a81142016-08-25 18:42:39 +02002787 MLXSW_SP_RXL(mlxsw_sp_rx_listener_func, IP2ME, TRAP_TO_CPU),
2788 MLXSW_SP_RXL(mlxsw_sp_rx_listener_func, RTR_INGRESS0, TRAP_TO_CPU),
2789 MLXSW_SP_RXL(mlxsw_sp_rx_listener_func, HOST_MISS_IPV4, TRAP_TO_CPU),
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002790};
2791
2792static int mlxsw_sp_traps_init(struct mlxsw_sp *mlxsw_sp)
2793{
2794 char htgt_pl[MLXSW_REG_HTGT_LEN];
2795 char hpkt_pl[MLXSW_REG_HPKT_LEN];
2796 int i;
2797 int err;
2798
2799 mlxsw_reg_htgt_pack(htgt_pl, MLXSW_REG_HTGT_TRAP_GROUP_RX);
2800 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(htgt), htgt_pl);
2801 if (err)
2802 return err;
2803
2804 mlxsw_reg_htgt_pack(htgt_pl, MLXSW_REG_HTGT_TRAP_GROUP_CTRL);
2805 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(htgt), htgt_pl);
2806 if (err)
2807 return err;
2808
2809 for (i = 0; i < ARRAY_SIZE(mlxsw_sp_rx_listener); i++) {
2810 err = mlxsw_core_rx_listener_register(mlxsw_sp->core,
2811 &mlxsw_sp_rx_listener[i],
2812 mlxsw_sp);
2813 if (err)
2814 goto err_rx_listener_register;
2815
Ido Schimmel63a81142016-08-25 18:42:39 +02002816 mlxsw_reg_hpkt_pack(hpkt_pl, mlxsw_sp_rx_listener[i].action,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002817 mlxsw_sp_rx_listener[i].trap_id);
2818 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(hpkt), hpkt_pl);
2819 if (err)
2820 goto err_rx_trap_set;
2821 }
2822 return 0;
2823
2824err_rx_trap_set:
2825 mlxsw_core_rx_listener_unregister(mlxsw_sp->core,
2826 &mlxsw_sp_rx_listener[i],
2827 mlxsw_sp);
2828err_rx_listener_register:
2829 for (i--; i >= 0; i--) {
Ido Schimmel10f00aa2016-07-02 11:00:19 +02002830 mlxsw_reg_hpkt_pack(hpkt_pl, MLXSW_REG_HPKT_ACTION_DISCARD,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002831 mlxsw_sp_rx_listener[i].trap_id);
2832 mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(hpkt), hpkt_pl);
2833
2834 mlxsw_core_rx_listener_unregister(mlxsw_sp->core,
2835 &mlxsw_sp_rx_listener[i],
2836 mlxsw_sp);
2837 }
2838 return err;
2839}
2840
2841static void mlxsw_sp_traps_fini(struct mlxsw_sp *mlxsw_sp)
2842{
2843 char hpkt_pl[MLXSW_REG_HPKT_LEN];
2844 int i;
2845
2846 for (i = 0; i < ARRAY_SIZE(mlxsw_sp_rx_listener); i++) {
Ido Schimmel10f00aa2016-07-02 11:00:19 +02002847 mlxsw_reg_hpkt_pack(hpkt_pl, MLXSW_REG_HPKT_ACTION_DISCARD,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002848 mlxsw_sp_rx_listener[i].trap_id);
2849 mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(hpkt), hpkt_pl);
2850
2851 mlxsw_core_rx_listener_unregister(mlxsw_sp->core,
2852 &mlxsw_sp_rx_listener[i],
2853 mlxsw_sp);
2854 }
2855}
2856
2857static int __mlxsw_sp_flood_init(struct mlxsw_core *mlxsw_core,
2858 enum mlxsw_reg_sfgc_type type,
2859 enum mlxsw_reg_sfgc_bridge_type bridge_type)
2860{
2861 enum mlxsw_flood_table_type table_type;
2862 enum mlxsw_sp_flood_table flood_table;
2863 char sfgc_pl[MLXSW_REG_SFGC_LEN];
2864
Ido Schimmel19ae6122015-12-15 16:03:39 +01002865 if (bridge_type == MLXSW_REG_SFGC_BRIDGE_TYPE_VFID)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002866 table_type = MLXSW_REG_SFGC_TABLE_TYPE_FID;
Ido Schimmel19ae6122015-12-15 16:03:39 +01002867 else
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002868 table_type = MLXSW_REG_SFGC_TABLE_TYPE_FID_OFFEST;
Ido Schimmel19ae6122015-12-15 16:03:39 +01002869
2870 if (type == MLXSW_REG_SFGC_TYPE_UNKNOWN_UNICAST)
2871 flood_table = MLXSW_SP_FLOOD_TABLE_UC;
2872 else
2873 flood_table = MLXSW_SP_FLOOD_TABLE_BM;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002874
2875 mlxsw_reg_sfgc_pack(sfgc_pl, type, bridge_type, table_type,
2876 flood_table);
2877 return mlxsw_reg_write(mlxsw_core, MLXSW_REG(sfgc), sfgc_pl);
2878}
2879
2880static int mlxsw_sp_flood_init(struct mlxsw_sp *mlxsw_sp)
2881{
2882 int type, err;
2883
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002884 for (type = 0; type < MLXSW_REG_SFGC_TYPE_MAX; type++) {
2885 if (type == MLXSW_REG_SFGC_TYPE_RESERVED)
2886 continue;
2887
2888 err = __mlxsw_sp_flood_init(mlxsw_sp->core, type,
2889 MLXSW_REG_SFGC_BRIDGE_TYPE_VFID);
2890 if (err)
2891 return err;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002892
2893 err = __mlxsw_sp_flood_init(mlxsw_sp->core, type,
2894 MLXSW_REG_SFGC_BRIDGE_TYPE_1Q_FID);
2895 if (err)
2896 return err;
2897 }
2898
2899 return 0;
2900}
2901
Jiri Pirko0d65fc12015-12-03 12:12:28 +01002902static int mlxsw_sp_lag_init(struct mlxsw_sp *mlxsw_sp)
2903{
Nogah Frankelce0bd2b2016-09-20 11:16:50 +02002904 struct mlxsw_resources *resources;
Jiri Pirko0d65fc12015-12-03 12:12:28 +01002905 char slcr_pl[MLXSW_REG_SLCR_LEN];
Nogah Frankelce0bd2b2016-09-20 11:16:50 +02002906 int err;
Jiri Pirko0d65fc12015-12-03 12:12:28 +01002907
2908 mlxsw_reg_slcr_pack(slcr_pl, MLXSW_REG_SLCR_LAG_HASH_SMAC |
2909 MLXSW_REG_SLCR_LAG_HASH_DMAC |
2910 MLXSW_REG_SLCR_LAG_HASH_ETHERTYPE |
2911 MLXSW_REG_SLCR_LAG_HASH_VLANID |
2912 MLXSW_REG_SLCR_LAG_HASH_SIP |
2913 MLXSW_REG_SLCR_LAG_HASH_DIP |
2914 MLXSW_REG_SLCR_LAG_HASH_SPORT |
2915 MLXSW_REG_SLCR_LAG_HASH_DPORT |
2916 MLXSW_REG_SLCR_LAG_HASH_IPPROTO);
Nogah Frankelce0bd2b2016-09-20 11:16:50 +02002917 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(slcr), slcr_pl);
2918 if (err)
2919 return err;
2920
2921 resources = mlxsw_core_resources_get(mlxsw_sp->core);
2922 if (!(resources->max_lag_valid && resources->max_ports_in_lag_valid))
2923 return -EIO;
2924
2925 mlxsw_sp->lags = kcalloc(resources->max_lag,
2926 sizeof(struct mlxsw_sp_upper),
2927 GFP_KERNEL);
2928 if (!mlxsw_sp->lags)
2929 return -ENOMEM;
2930
2931 return 0;
2932}
2933
2934static void mlxsw_sp_lag_fini(struct mlxsw_sp *mlxsw_sp)
2935{
2936 kfree(mlxsw_sp->lags);
Jiri Pirko0d65fc12015-12-03 12:12:28 +01002937}
2938
Jiri Pirkob2f10572016-04-08 19:11:23 +02002939static int mlxsw_sp_init(struct mlxsw_core *mlxsw_core,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002940 const struct mlxsw_bus_info *mlxsw_bus_info)
2941{
Jiri Pirkob2f10572016-04-08 19:11:23 +02002942 struct mlxsw_sp *mlxsw_sp = mlxsw_core_driver_priv(mlxsw_core);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002943 int err;
2944
2945 mlxsw_sp->core = mlxsw_core;
2946 mlxsw_sp->bus_info = mlxsw_bus_info;
Ido Schimmel14d39462016-06-20 23:04:15 +02002947 INIT_LIST_HEAD(&mlxsw_sp->fids);
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02002948 INIT_LIST_HEAD(&mlxsw_sp->vfids.list);
Elad Raz3a49b4f2016-01-10 21:06:28 +01002949 INIT_LIST_HEAD(&mlxsw_sp->br_mids.list);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002950
2951 err = mlxsw_sp_base_mac_get(mlxsw_sp);
2952 if (err) {
2953 dev_err(mlxsw_sp->bus_info->dev, "Failed to get base mac\n");
2954 return err;
2955 }
2956
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002957 err = mlxsw_sp_event_register(mlxsw_sp, MLXSW_TRAP_ID_PUDE);
2958 if (err) {
2959 dev_err(mlxsw_sp->bus_info->dev, "Failed to register for PUDE events\n");
Ido Schimmelbbf2a472016-07-02 11:00:14 +02002960 return err;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002961 }
2962
2963 err = mlxsw_sp_traps_init(mlxsw_sp);
2964 if (err) {
2965 dev_err(mlxsw_sp->bus_info->dev, "Failed to set traps for RX\n");
2966 goto err_rx_listener_register;
2967 }
2968
2969 err = mlxsw_sp_flood_init(mlxsw_sp);
2970 if (err) {
2971 dev_err(mlxsw_sp->bus_info->dev, "Failed to initialize flood tables\n");
2972 goto err_flood_init;
2973 }
2974
2975 err = mlxsw_sp_buffers_init(mlxsw_sp);
2976 if (err) {
2977 dev_err(mlxsw_sp->bus_info->dev, "Failed to initialize buffers\n");
2978 goto err_buffers_init;
2979 }
2980
Jiri Pirko0d65fc12015-12-03 12:12:28 +01002981 err = mlxsw_sp_lag_init(mlxsw_sp);
2982 if (err) {
2983 dev_err(mlxsw_sp->bus_info->dev, "Failed to initialize LAG\n");
2984 goto err_lag_init;
2985 }
2986
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002987 err = mlxsw_sp_switchdev_init(mlxsw_sp);
2988 if (err) {
2989 dev_err(mlxsw_sp->bus_info->dev, "Failed to initialize switchdev\n");
2990 goto err_switchdev_init;
2991 }
2992
Ido Schimmel464dce12016-07-02 11:00:15 +02002993 err = mlxsw_sp_router_init(mlxsw_sp);
2994 if (err) {
2995 dev_err(mlxsw_sp->bus_info->dev, "Failed to initialize router\n");
2996 goto err_router_init;
2997 }
2998
Yotam Gigi763b4b72016-07-21 12:03:17 +02002999 err = mlxsw_sp_span_init(mlxsw_sp);
3000 if (err) {
3001 dev_err(mlxsw_sp->bus_info->dev, "Failed to init span system\n");
3002 goto err_span_init;
3003 }
3004
Ido Schimmelbbf2a472016-07-02 11:00:14 +02003005 err = mlxsw_sp_ports_create(mlxsw_sp);
3006 if (err) {
3007 dev_err(mlxsw_sp->bus_info->dev, "Failed to create ports\n");
3008 goto err_ports_create;
3009 }
3010
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003011 return 0;
3012
Ido Schimmelbbf2a472016-07-02 11:00:14 +02003013err_ports_create:
Yotam Gigi763b4b72016-07-21 12:03:17 +02003014 mlxsw_sp_span_fini(mlxsw_sp);
3015err_span_init:
Ido Schimmel464dce12016-07-02 11:00:15 +02003016 mlxsw_sp_router_fini(mlxsw_sp);
3017err_router_init:
Ido Schimmelbbf2a472016-07-02 11:00:14 +02003018 mlxsw_sp_switchdev_fini(mlxsw_sp);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003019err_switchdev_init:
Nogah Frankelce0bd2b2016-09-20 11:16:50 +02003020 mlxsw_sp_lag_fini(mlxsw_sp);
Jiri Pirko0d65fc12015-12-03 12:12:28 +01003021err_lag_init:
Jiri Pirko0f433fa2016-04-14 18:19:24 +02003022 mlxsw_sp_buffers_fini(mlxsw_sp);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003023err_buffers_init:
3024err_flood_init:
3025 mlxsw_sp_traps_fini(mlxsw_sp);
3026err_rx_listener_register:
3027 mlxsw_sp_event_unregister(mlxsw_sp, MLXSW_TRAP_ID_PUDE);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003028 return err;
3029}
3030
Jiri Pirkob2f10572016-04-08 19:11:23 +02003031static void mlxsw_sp_fini(struct mlxsw_core *mlxsw_core)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003032{
Jiri Pirkob2f10572016-04-08 19:11:23 +02003033 struct mlxsw_sp *mlxsw_sp = mlxsw_core_driver_priv(mlxsw_core);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003034
Ido Schimmelbbf2a472016-07-02 11:00:14 +02003035 mlxsw_sp_ports_remove(mlxsw_sp);
Yotam Gigi763b4b72016-07-21 12:03:17 +02003036 mlxsw_sp_span_fini(mlxsw_sp);
Ido Schimmel464dce12016-07-02 11:00:15 +02003037 mlxsw_sp_router_fini(mlxsw_sp);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003038 mlxsw_sp_switchdev_fini(mlxsw_sp);
Nogah Frankelce0bd2b2016-09-20 11:16:50 +02003039 mlxsw_sp_lag_fini(mlxsw_sp);
Jiri Pirko5113bfd2016-05-06 22:20:59 +02003040 mlxsw_sp_buffers_fini(mlxsw_sp);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003041 mlxsw_sp_traps_fini(mlxsw_sp);
3042 mlxsw_sp_event_unregister(mlxsw_sp, MLXSW_TRAP_ID_PUDE);
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02003043 WARN_ON(!list_empty(&mlxsw_sp->vfids.list));
Ido Schimmel14d39462016-06-20 23:04:15 +02003044 WARN_ON(!list_empty(&mlxsw_sp->fids));
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003045}
3046
3047static struct mlxsw_config_profile mlxsw_sp_config_profile = {
3048 .used_max_vepa_channels = 1,
3049 .max_vepa_channels = 0,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003050 .used_max_mid = 1,
Elad Raz53ae6282016-01-10 21:06:26 +01003051 .max_mid = MLXSW_SP_MID_MAX,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003052 .used_max_pgt = 1,
3053 .max_pgt = 0,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003054 .used_flood_tables = 1,
3055 .used_flood_mode = 1,
3056 .flood_mode = 3,
3057 .max_fid_offset_flood_tables = 2,
3058 .fid_offset_flood_table_size = VLAN_N_VID - 1,
Ido Schimmel19ae6122015-12-15 16:03:39 +01003059 .max_fid_flood_tables = 2,
3060 .fid_flood_table_size = MLXSW_SP_VFID_MAX,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003061 .used_max_ib_mc = 1,
3062 .max_ib_mc = 0,
3063 .used_max_pkey = 1,
3064 .max_pkey = 0,
Nogah Frankel403547d2016-09-20 11:16:52 +02003065 .used_kvd_split_data = 1,
3066 .kvd_hash_granularity = MLXSW_SP_KVD_GRANULARITY,
3067 .kvd_hash_single_parts = 2,
3068 .kvd_hash_double_parts = 1,
Jiri Pirkoc6022422016-07-05 11:27:46 +02003069 .kvd_linear_size = MLXSW_SP_KVD_LINEAR_SIZE,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003070 .swid_config = {
3071 {
3072 .used_type = 1,
3073 .type = MLXSW_PORT_SWID_TYPE_ETH,
3074 }
3075 },
Nogah Frankel57d316b2016-07-21 12:03:09 +02003076 .resource_query_enable = 1,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003077};
3078
3079static struct mlxsw_driver mlxsw_sp_driver = {
Jiri Pirko2d0ed392016-04-14 18:19:30 +02003080 .kind = MLXSW_DEVICE_KIND_SPECTRUM,
3081 .owner = THIS_MODULE,
3082 .priv_size = sizeof(struct mlxsw_sp),
3083 .init = mlxsw_sp_init,
3084 .fini = mlxsw_sp_fini,
3085 .port_split = mlxsw_sp_port_split,
3086 .port_unsplit = mlxsw_sp_port_unsplit,
3087 .sb_pool_get = mlxsw_sp_sb_pool_get,
3088 .sb_pool_set = mlxsw_sp_sb_pool_set,
3089 .sb_port_pool_get = mlxsw_sp_sb_port_pool_get,
3090 .sb_port_pool_set = mlxsw_sp_sb_port_pool_set,
3091 .sb_tc_pool_bind_get = mlxsw_sp_sb_tc_pool_bind_get,
3092 .sb_tc_pool_bind_set = mlxsw_sp_sb_tc_pool_bind_set,
3093 .sb_occ_snapshot = mlxsw_sp_sb_occ_snapshot,
3094 .sb_occ_max_clear = mlxsw_sp_sb_occ_max_clear,
3095 .sb_occ_port_pool_get = mlxsw_sp_sb_occ_port_pool_get,
3096 .sb_occ_tc_port_bind_get = mlxsw_sp_sb_occ_tc_port_bind_get,
3097 .txhdr_construct = mlxsw_sp_txhdr_construct,
3098 .txhdr_len = MLXSW_TXHDR_LEN,
3099 .profile = &mlxsw_sp_config_profile,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003100};
3101
Jiri Pirko7ce856a2016-07-04 08:23:12 +02003102static bool mlxsw_sp_port_dev_check(const struct net_device *dev)
3103{
3104 return dev->netdev_ops == &mlxsw_sp_port_netdev_ops;
3105}
3106
3107static struct mlxsw_sp_port *mlxsw_sp_port_dev_lower_find(struct net_device *dev)
3108{
3109 struct net_device *lower_dev;
3110 struct list_head *iter;
3111
3112 if (mlxsw_sp_port_dev_check(dev))
3113 return netdev_priv(dev);
3114
3115 netdev_for_each_all_lower_dev(dev, lower_dev, iter) {
3116 if (mlxsw_sp_port_dev_check(lower_dev))
3117 return netdev_priv(lower_dev);
3118 }
3119 return NULL;
3120}
3121
3122static struct mlxsw_sp *mlxsw_sp_lower_get(struct net_device *dev)
3123{
3124 struct mlxsw_sp_port *mlxsw_sp_port;
3125
3126 mlxsw_sp_port = mlxsw_sp_port_dev_lower_find(dev);
3127 return mlxsw_sp_port ? mlxsw_sp_port->mlxsw_sp : NULL;
3128}
3129
3130static struct mlxsw_sp_port *mlxsw_sp_port_dev_lower_find_rcu(struct net_device *dev)
3131{
3132 struct net_device *lower_dev;
3133 struct list_head *iter;
3134
3135 if (mlxsw_sp_port_dev_check(dev))
3136 return netdev_priv(dev);
3137
3138 netdev_for_each_all_lower_dev_rcu(dev, lower_dev, iter) {
3139 if (mlxsw_sp_port_dev_check(lower_dev))
3140 return netdev_priv(lower_dev);
3141 }
3142 return NULL;
3143}
3144
3145struct mlxsw_sp_port *mlxsw_sp_port_lower_dev_hold(struct net_device *dev)
3146{
3147 struct mlxsw_sp_port *mlxsw_sp_port;
3148
3149 rcu_read_lock();
3150 mlxsw_sp_port = mlxsw_sp_port_dev_lower_find_rcu(dev);
3151 if (mlxsw_sp_port)
3152 dev_hold(mlxsw_sp_port->dev);
3153 rcu_read_unlock();
3154 return mlxsw_sp_port;
3155}
3156
3157void mlxsw_sp_port_dev_put(struct mlxsw_sp_port *mlxsw_sp_port)
3158{
3159 dev_put(mlxsw_sp_port->dev);
3160}
3161
Ido Schimmel99724c12016-07-04 08:23:14 +02003162static bool mlxsw_sp_rif_should_config(struct mlxsw_sp_rif *r,
3163 unsigned long event)
3164{
3165 switch (event) {
3166 case NETDEV_UP:
3167 if (!r)
3168 return true;
3169 r->ref_count++;
3170 return false;
3171 case NETDEV_DOWN:
3172 if (r && --r->ref_count == 0)
3173 return true;
3174 /* It is possible we already removed the RIF ourselves
3175 * if it was assigned to a netdev that is now a bridge
3176 * or LAG slave.
3177 */
3178 return false;
3179 }
3180
3181 return false;
3182}
3183
3184static int mlxsw_sp_avail_rif_get(struct mlxsw_sp *mlxsw_sp)
3185{
Nogah Frankel8f8a62d2016-09-20 11:16:57 +02003186 struct mlxsw_resources *resources;
Ido Schimmel99724c12016-07-04 08:23:14 +02003187 int i;
3188
Nogah Frankel8f8a62d2016-09-20 11:16:57 +02003189 resources = mlxsw_core_resources_get(mlxsw_sp->core);
3190 for (i = 0; i < resources->max_rif; i++)
Ido Schimmel99724c12016-07-04 08:23:14 +02003191 if (!mlxsw_sp->rifs[i])
3192 return i;
3193
Nogah Frankel8f8a62d2016-09-20 11:16:57 +02003194 return MLXSW_SP_INVALID_RIF;
Ido Schimmel99724c12016-07-04 08:23:14 +02003195}
3196
3197static void mlxsw_sp_vport_rif_sp_attr_get(struct mlxsw_sp_port *mlxsw_sp_vport,
3198 bool *p_lagged, u16 *p_system_port)
3199{
3200 u8 local_port = mlxsw_sp_vport->local_port;
3201
3202 *p_lagged = mlxsw_sp_vport->lagged;
3203 *p_system_port = *p_lagged ? mlxsw_sp_vport->lag_id : local_port;
3204}
3205
3206static int mlxsw_sp_vport_rif_sp_op(struct mlxsw_sp_port *mlxsw_sp_vport,
3207 struct net_device *l3_dev, u16 rif,
3208 bool create)
3209{
3210 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_vport->mlxsw_sp;
3211 bool lagged = mlxsw_sp_vport->lagged;
3212 char ritr_pl[MLXSW_REG_RITR_LEN];
3213 u16 system_port;
3214
3215 mlxsw_reg_ritr_pack(ritr_pl, create, MLXSW_REG_RITR_SP_IF, rif,
3216 l3_dev->mtu, l3_dev->dev_addr);
3217
3218 mlxsw_sp_vport_rif_sp_attr_get(mlxsw_sp_vport, &lagged, &system_port);
3219 mlxsw_reg_ritr_sp_if_pack(ritr_pl, lagged, system_port,
3220 mlxsw_sp_vport_vid_get(mlxsw_sp_vport));
3221
3222 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ritr), ritr_pl);
3223}
3224
3225static void mlxsw_sp_vport_rif_sp_leave(struct mlxsw_sp_port *mlxsw_sp_vport);
3226
3227static struct mlxsw_sp_fid *
3228mlxsw_sp_rfid_alloc(u16 fid, struct net_device *l3_dev)
3229{
3230 struct mlxsw_sp_fid *f;
3231
3232 f = kzalloc(sizeof(*f), GFP_KERNEL);
3233 if (!f)
3234 return NULL;
3235
3236 f->leave = mlxsw_sp_vport_rif_sp_leave;
3237 f->ref_count = 0;
3238 f->dev = l3_dev;
3239 f->fid = fid;
3240
3241 return f;
3242}
3243
3244static struct mlxsw_sp_rif *
3245mlxsw_sp_rif_alloc(u16 rif, struct net_device *l3_dev, struct mlxsw_sp_fid *f)
3246{
3247 struct mlxsw_sp_rif *r;
3248
3249 r = kzalloc(sizeof(*r), GFP_KERNEL);
3250 if (!r)
3251 return NULL;
3252
3253 ether_addr_copy(r->addr, l3_dev->dev_addr);
3254 r->mtu = l3_dev->mtu;
3255 r->ref_count = 1;
3256 r->dev = l3_dev;
3257 r->rif = rif;
3258 r->f = f;
3259
3260 return r;
3261}
3262
3263static struct mlxsw_sp_rif *
3264mlxsw_sp_vport_rif_sp_create(struct mlxsw_sp_port *mlxsw_sp_vport,
3265 struct net_device *l3_dev)
3266{
3267 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_vport->mlxsw_sp;
3268 struct mlxsw_sp_fid *f;
3269 struct mlxsw_sp_rif *r;
3270 u16 fid, rif;
3271 int err;
3272
3273 rif = mlxsw_sp_avail_rif_get(mlxsw_sp);
Nogah Frankel8f8a62d2016-09-20 11:16:57 +02003274 if (rif == MLXSW_SP_INVALID_RIF)
Ido Schimmel99724c12016-07-04 08:23:14 +02003275 return ERR_PTR(-ERANGE);
3276
3277 err = mlxsw_sp_vport_rif_sp_op(mlxsw_sp_vport, l3_dev, rif, true);
3278 if (err)
3279 return ERR_PTR(err);
3280
3281 fid = mlxsw_sp_rif_sp_to_fid(rif);
3282 err = mlxsw_sp_rif_fdb_op(mlxsw_sp, l3_dev->dev_addr, fid, true);
3283 if (err)
3284 goto err_rif_fdb_op;
3285
3286 f = mlxsw_sp_rfid_alloc(fid, l3_dev);
3287 if (!f) {
3288 err = -ENOMEM;
3289 goto err_rfid_alloc;
3290 }
3291
3292 r = mlxsw_sp_rif_alloc(rif, l3_dev, f);
3293 if (!r) {
3294 err = -ENOMEM;
3295 goto err_rif_alloc;
3296 }
3297
3298 f->r = r;
3299 mlxsw_sp->rifs[rif] = r;
3300
3301 return r;
3302
3303err_rif_alloc:
3304 kfree(f);
3305err_rfid_alloc:
3306 mlxsw_sp_rif_fdb_op(mlxsw_sp, l3_dev->dev_addr, fid, false);
3307err_rif_fdb_op:
3308 mlxsw_sp_vport_rif_sp_op(mlxsw_sp_vport, l3_dev, rif, false);
3309 return ERR_PTR(err);
3310}
3311
3312static void mlxsw_sp_vport_rif_sp_destroy(struct mlxsw_sp_port *mlxsw_sp_vport,
3313 struct mlxsw_sp_rif *r)
3314{
3315 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_vport->mlxsw_sp;
3316 struct net_device *l3_dev = r->dev;
3317 struct mlxsw_sp_fid *f = r->f;
3318 u16 fid = f->fid;
3319 u16 rif = r->rif;
3320
3321 mlxsw_sp->rifs[rif] = NULL;
3322 f->r = NULL;
3323
3324 kfree(r);
3325
3326 kfree(f);
3327
3328 mlxsw_sp_rif_fdb_op(mlxsw_sp, l3_dev->dev_addr, fid, false);
3329
3330 mlxsw_sp_vport_rif_sp_op(mlxsw_sp_vport, l3_dev, rif, false);
3331}
3332
3333static int mlxsw_sp_vport_rif_sp_join(struct mlxsw_sp_port *mlxsw_sp_vport,
3334 struct net_device *l3_dev)
3335{
3336 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_vport->mlxsw_sp;
3337 struct mlxsw_sp_rif *r;
3338
3339 r = mlxsw_sp_rif_find_by_dev(mlxsw_sp, l3_dev);
3340 if (!r) {
3341 r = mlxsw_sp_vport_rif_sp_create(mlxsw_sp_vport, l3_dev);
3342 if (IS_ERR(r))
3343 return PTR_ERR(r);
3344 }
3345
3346 mlxsw_sp_vport_fid_set(mlxsw_sp_vport, r->f);
3347 r->f->ref_count++;
3348
3349 netdev_dbg(mlxsw_sp_vport->dev, "Joined FID=%d\n", r->f->fid);
3350
3351 return 0;
3352}
3353
3354static void mlxsw_sp_vport_rif_sp_leave(struct mlxsw_sp_port *mlxsw_sp_vport)
3355{
3356 struct mlxsw_sp_fid *f = mlxsw_sp_vport_fid_get(mlxsw_sp_vport);
3357
3358 netdev_dbg(mlxsw_sp_vport->dev, "Left FID=%d\n", f->fid);
3359
3360 mlxsw_sp_vport_fid_set(mlxsw_sp_vport, NULL);
3361 if (--f->ref_count == 0)
3362 mlxsw_sp_vport_rif_sp_destroy(mlxsw_sp_vport, f->r);
3363}
3364
3365static int mlxsw_sp_inetaddr_vport_event(struct net_device *l3_dev,
3366 struct net_device *port_dev,
3367 unsigned long event, u16 vid)
3368{
3369 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(port_dev);
3370 struct mlxsw_sp_port *mlxsw_sp_vport;
3371
3372 mlxsw_sp_vport = mlxsw_sp_port_vport_find(mlxsw_sp_port, vid);
3373 if (WARN_ON(!mlxsw_sp_vport))
3374 return -EINVAL;
3375
3376 switch (event) {
3377 case NETDEV_UP:
3378 return mlxsw_sp_vport_rif_sp_join(mlxsw_sp_vport, l3_dev);
3379 case NETDEV_DOWN:
3380 mlxsw_sp_vport_rif_sp_leave(mlxsw_sp_vport);
3381 break;
3382 }
3383
3384 return 0;
3385}
3386
3387static int mlxsw_sp_inetaddr_port_event(struct net_device *port_dev,
3388 unsigned long event)
3389{
3390 if (netif_is_bridge_port(port_dev) || netif_is_lag_port(port_dev))
3391 return 0;
3392
3393 return mlxsw_sp_inetaddr_vport_event(port_dev, port_dev, event, 1);
3394}
3395
3396static int __mlxsw_sp_inetaddr_lag_event(struct net_device *l3_dev,
3397 struct net_device *lag_dev,
3398 unsigned long event, u16 vid)
3399{
3400 struct net_device *port_dev;
3401 struct list_head *iter;
3402 int err;
3403
3404 netdev_for_each_lower_dev(lag_dev, port_dev, iter) {
3405 if (mlxsw_sp_port_dev_check(port_dev)) {
3406 err = mlxsw_sp_inetaddr_vport_event(l3_dev, port_dev,
3407 event, vid);
3408 if (err)
3409 return err;
3410 }
3411 }
3412
3413 return 0;
3414}
3415
3416static int mlxsw_sp_inetaddr_lag_event(struct net_device *lag_dev,
3417 unsigned long event)
3418{
3419 if (netif_is_bridge_port(lag_dev))
3420 return 0;
3421
3422 return __mlxsw_sp_inetaddr_lag_event(lag_dev, lag_dev, event, 1);
3423}
3424
Ido Schimmel99f44bb2016-07-04 08:23:17 +02003425static struct mlxsw_sp_fid *mlxsw_sp_bridge_fid_get(struct mlxsw_sp *mlxsw_sp,
3426 struct net_device *l3_dev)
3427{
3428 u16 fid;
3429
3430 if (is_vlan_dev(l3_dev))
3431 fid = vlan_dev_vlan_id(l3_dev);
3432 else if (mlxsw_sp->master_bridge.dev == l3_dev)
3433 fid = 1;
3434 else
3435 return mlxsw_sp_vfid_find(mlxsw_sp, l3_dev);
3436
3437 return mlxsw_sp_fid_find(mlxsw_sp, fid);
3438}
3439
Ido Schimmelf888f582016-08-24 11:18:51 +02003440static enum mlxsw_flood_table_type mlxsw_sp_flood_table_type_get(u16 fid)
3441{
3442 return mlxsw_sp_fid_is_vfid(fid) ? MLXSW_REG_SFGC_TABLE_TYPE_FID :
3443 MLXSW_REG_SFGC_TABLE_TYPE_FID_OFFEST;
3444}
3445
3446static u16 mlxsw_sp_flood_table_index_get(u16 fid)
3447{
3448 return mlxsw_sp_fid_is_vfid(fid) ? mlxsw_sp_fid_to_vfid(fid) : fid;
3449}
3450
3451static int mlxsw_sp_router_port_flood_set(struct mlxsw_sp *mlxsw_sp, u16 fid,
3452 bool set)
3453{
3454 enum mlxsw_flood_table_type table_type;
3455 char *sftr_pl;
3456 u16 index;
3457 int err;
3458
3459 sftr_pl = kmalloc(MLXSW_REG_SFTR_LEN, GFP_KERNEL);
3460 if (!sftr_pl)
3461 return -ENOMEM;
3462
3463 table_type = mlxsw_sp_flood_table_type_get(fid);
3464 index = mlxsw_sp_flood_table_index_get(fid);
3465 mlxsw_reg_sftr_pack(sftr_pl, MLXSW_SP_FLOOD_TABLE_BM, index, table_type,
3466 1, MLXSW_PORT_ROUTER_PORT, set);
3467 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sftr), sftr_pl);
3468
3469 kfree(sftr_pl);
3470 return err;
3471}
3472
Ido Schimmel99f44bb2016-07-04 08:23:17 +02003473static enum mlxsw_reg_ritr_if_type mlxsw_sp_rif_type_get(u16 fid)
3474{
3475 if (mlxsw_sp_fid_is_vfid(fid))
3476 return MLXSW_REG_RITR_FID_IF;
3477 else
3478 return MLXSW_REG_RITR_VLAN_IF;
3479}
3480
3481static int mlxsw_sp_rif_bridge_op(struct mlxsw_sp *mlxsw_sp,
3482 struct net_device *l3_dev,
3483 u16 fid, u16 rif,
3484 bool create)
3485{
3486 enum mlxsw_reg_ritr_if_type rif_type;
3487 char ritr_pl[MLXSW_REG_RITR_LEN];
3488
3489 rif_type = mlxsw_sp_rif_type_get(fid);
3490 mlxsw_reg_ritr_pack(ritr_pl, create, rif_type, rif, l3_dev->mtu,
3491 l3_dev->dev_addr);
3492 mlxsw_reg_ritr_fid_set(ritr_pl, rif_type, fid);
3493
3494 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ritr), ritr_pl);
3495}
3496
3497static int mlxsw_sp_rif_bridge_create(struct mlxsw_sp *mlxsw_sp,
3498 struct net_device *l3_dev,
3499 struct mlxsw_sp_fid *f)
3500{
3501 struct mlxsw_sp_rif *r;
3502 u16 rif;
3503 int err;
3504
3505 rif = mlxsw_sp_avail_rif_get(mlxsw_sp);
Nogah Frankel8f8a62d2016-09-20 11:16:57 +02003506 if (rif == MLXSW_SP_INVALID_RIF)
Ido Schimmel99f44bb2016-07-04 08:23:17 +02003507 return -ERANGE;
3508
Ido Schimmelf888f582016-08-24 11:18:51 +02003509 err = mlxsw_sp_router_port_flood_set(mlxsw_sp, f->fid, true);
Ido Schimmel99f44bb2016-07-04 08:23:17 +02003510 if (err)
3511 return err;
3512
Ido Schimmelf888f582016-08-24 11:18:51 +02003513 err = mlxsw_sp_rif_bridge_op(mlxsw_sp, l3_dev, f->fid, rif, true);
3514 if (err)
3515 goto err_rif_bridge_op;
3516
Ido Schimmel99f44bb2016-07-04 08:23:17 +02003517 err = mlxsw_sp_rif_fdb_op(mlxsw_sp, l3_dev->dev_addr, f->fid, true);
3518 if (err)
3519 goto err_rif_fdb_op;
3520
3521 r = mlxsw_sp_rif_alloc(rif, l3_dev, f);
3522 if (!r) {
3523 err = -ENOMEM;
3524 goto err_rif_alloc;
3525 }
3526
3527 f->r = r;
3528 mlxsw_sp->rifs[rif] = r;
3529
3530 netdev_dbg(l3_dev, "RIF=%d created\n", rif);
3531
3532 return 0;
3533
3534err_rif_alloc:
3535 mlxsw_sp_rif_fdb_op(mlxsw_sp, l3_dev->dev_addr, f->fid, false);
3536err_rif_fdb_op:
3537 mlxsw_sp_rif_bridge_op(mlxsw_sp, l3_dev, f->fid, rif, false);
Ido Schimmelf888f582016-08-24 11:18:51 +02003538err_rif_bridge_op:
3539 mlxsw_sp_router_port_flood_set(mlxsw_sp, f->fid, false);
Ido Schimmel99f44bb2016-07-04 08:23:17 +02003540 return err;
3541}
3542
3543void mlxsw_sp_rif_bridge_destroy(struct mlxsw_sp *mlxsw_sp,
3544 struct mlxsw_sp_rif *r)
3545{
3546 struct net_device *l3_dev = r->dev;
3547 struct mlxsw_sp_fid *f = r->f;
3548 u16 rif = r->rif;
3549
3550 mlxsw_sp->rifs[rif] = NULL;
3551 f->r = NULL;
3552
3553 kfree(r);
3554
3555 mlxsw_sp_rif_fdb_op(mlxsw_sp, l3_dev->dev_addr, f->fid, false);
3556
3557 mlxsw_sp_rif_bridge_op(mlxsw_sp, l3_dev, f->fid, rif, false);
3558
Ido Schimmelf888f582016-08-24 11:18:51 +02003559 mlxsw_sp_router_port_flood_set(mlxsw_sp, f->fid, false);
3560
Ido Schimmel99f44bb2016-07-04 08:23:17 +02003561 netdev_dbg(l3_dev, "RIF=%d destroyed\n", rif);
3562}
3563
3564static int mlxsw_sp_inetaddr_bridge_event(struct net_device *l3_dev,
3565 struct net_device *br_dev,
3566 unsigned long event)
3567{
3568 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_lower_get(l3_dev);
3569 struct mlxsw_sp_fid *f;
3570
3571 /* FID can either be an actual FID if the L3 device is the
3572 * VLAN-aware bridge or a VLAN device on top. Otherwise, the
3573 * L3 device is a VLAN-unaware bridge and we get a vFID.
3574 */
3575 f = mlxsw_sp_bridge_fid_get(mlxsw_sp, l3_dev);
3576 if (WARN_ON(!f))
3577 return -EINVAL;
3578
3579 switch (event) {
3580 case NETDEV_UP:
3581 return mlxsw_sp_rif_bridge_create(mlxsw_sp, l3_dev, f);
3582 case NETDEV_DOWN:
3583 mlxsw_sp_rif_bridge_destroy(mlxsw_sp, f->r);
3584 break;
3585 }
3586
3587 return 0;
3588}
3589
Ido Schimmel99724c12016-07-04 08:23:14 +02003590static int mlxsw_sp_inetaddr_vlan_event(struct net_device *vlan_dev,
3591 unsigned long event)
3592{
3593 struct net_device *real_dev = vlan_dev_real_dev(vlan_dev);
Ido Schimmel99f44bb2016-07-04 08:23:17 +02003594 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_lower_get(vlan_dev);
Ido Schimmel99724c12016-07-04 08:23:14 +02003595 u16 vid = vlan_dev_vlan_id(vlan_dev);
3596
3597 if (mlxsw_sp_port_dev_check(real_dev))
3598 return mlxsw_sp_inetaddr_vport_event(vlan_dev, real_dev, event,
3599 vid);
3600 else if (netif_is_lag_master(real_dev))
3601 return __mlxsw_sp_inetaddr_lag_event(vlan_dev, real_dev, event,
3602 vid);
Ido Schimmel99f44bb2016-07-04 08:23:17 +02003603 else if (netif_is_bridge_master(real_dev) &&
3604 mlxsw_sp->master_bridge.dev == real_dev)
3605 return mlxsw_sp_inetaddr_bridge_event(vlan_dev, real_dev,
3606 event);
Ido Schimmel99724c12016-07-04 08:23:14 +02003607
3608 return 0;
3609}
3610
3611static int mlxsw_sp_inetaddr_event(struct notifier_block *unused,
3612 unsigned long event, void *ptr)
3613{
3614 struct in_ifaddr *ifa = (struct in_ifaddr *) ptr;
3615 struct net_device *dev = ifa->ifa_dev->dev;
3616 struct mlxsw_sp *mlxsw_sp;
3617 struct mlxsw_sp_rif *r;
3618 int err = 0;
3619
3620 mlxsw_sp = mlxsw_sp_lower_get(dev);
3621 if (!mlxsw_sp)
3622 goto out;
3623
3624 r = mlxsw_sp_rif_find_by_dev(mlxsw_sp, dev);
3625 if (!mlxsw_sp_rif_should_config(r, event))
3626 goto out;
3627
3628 if (mlxsw_sp_port_dev_check(dev))
3629 err = mlxsw_sp_inetaddr_port_event(dev, event);
3630 else if (netif_is_lag_master(dev))
3631 err = mlxsw_sp_inetaddr_lag_event(dev, event);
Ido Schimmel99f44bb2016-07-04 08:23:17 +02003632 else if (netif_is_bridge_master(dev))
3633 err = mlxsw_sp_inetaddr_bridge_event(dev, dev, event);
Ido Schimmel99724c12016-07-04 08:23:14 +02003634 else if (is_vlan_dev(dev))
3635 err = mlxsw_sp_inetaddr_vlan_event(dev, event);
3636
3637out:
3638 return notifier_from_errno(err);
3639}
3640
Ido Schimmel6e095fd2016-07-04 08:23:13 +02003641static int mlxsw_sp_rif_edit(struct mlxsw_sp *mlxsw_sp, u16 rif,
3642 const char *mac, int mtu)
3643{
3644 char ritr_pl[MLXSW_REG_RITR_LEN];
3645 int err;
3646
3647 mlxsw_reg_ritr_rif_pack(ritr_pl, rif);
3648 err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(ritr), ritr_pl);
3649 if (err)
3650 return err;
3651
3652 mlxsw_reg_ritr_mtu_set(ritr_pl, mtu);
3653 mlxsw_reg_ritr_if_mac_memcpy_to(ritr_pl, mac);
3654 mlxsw_reg_ritr_op_set(ritr_pl, MLXSW_REG_RITR_RIF_CREATE);
3655 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ritr), ritr_pl);
3656}
3657
3658static int mlxsw_sp_netdevice_router_port_event(struct net_device *dev)
3659{
3660 struct mlxsw_sp *mlxsw_sp;
3661 struct mlxsw_sp_rif *r;
3662 int err;
3663
3664 mlxsw_sp = mlxsw_sp_lower_get(dev);
3665 if (!mlxsw_sp)
3666 return 0;
3667
3668 r = mlxsw_sp_rif_find_by_dev(mlxsw_sp, dev);
3669 if (!r)
3670 return 0;
3671
3672 err = mlxsw_sp_rif_fdb_op(mlxsw_sp, r->addr, r->f->fid, false);
3673 if (err)
3674 return err;
3675
3676 err = mlxsw_sp_rif_edit(mlxsw_sp, r->rif, dev->dev_addr, dev->mtu);
3677 if (err)
3678 goto err_rif_edit;
3679
3680 err = mlxsw_sp_rif_fdb_op(mlxsw_sp, dev->dev_addr, r->f->fid, true);
3681 if (err)
3682 goto err_rif_fdb_op;
3683
3684 ether_addr_copy(r->addr, dev->dev_addr);
3685 r->mtu = dev->mtu;
3686
3687 netdev_dbg(dev, "Updated RIF=%d\n", r->rif);
3688
3689 return 0;
3690
3691err_rif_fdb_op:
3692 mlxsw_sp_rif_edit(mlxsw_sp, r->rif, r->addr, r->mtu);
3693err_rif_edit:
3694 mlxsw_sp_rif_fdb_op(mlxsw_sp, r->addr, r->f->fid, true);
3695 return err;
3696}
3697
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02003698static bool mlxsw_sp_lag_port_fid_member(struct mlxsw_sp_port *lag_port,
3699 u16 fid)
3700{
3701 if (mlxsw_sp_fid_is_vfid(fid))
3702 return mlxsw_sp_port_vport_find_by_fid(lag_port, fid);
3703 else
3704 return test_bit(fid, lag_port->active_vlans);
3705}
3706
3707static bool mlxsw_sp_port_fdb_should_flush(struct mlxsw_sp_port *mlxsw_sp_port,
3708 u16 fid)
Ido Schimmel039c49a2016-01-27 15:20:18 +01003709{
3710 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02003711 u8 local_port = mlxsw_sp_port->local_port;
3712 u16 lag_id = mlxsw_sp_port->lag_id;
Nogah Frankelce0bd2b2016-09-20 11:16:50 +02003713 struct mlxsw_resources *resources;
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02003714 int i, count = 0;
Ido Schimmel039c49a2016-01-27 15:20:18 +01003715
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02003716 if (!mlxsw_sp_port->lagged)
3717 return true;
Ido Schimmel039c49a2016-01-27 15:20:18 +01003718
Nogah Frankelce0bd2b2016-09-20 11:16:50 +02003719 resources = mlxsw_core_resources_get(mlxsw_sp->core);
3720 for (i = 0; i < resources->max_ports_in_lag; i++) {
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02003721 struct mlxsw_sp_port *lag_port;
3722
3723 lag_port = mlxsw_sp_port_lagged_get(mlxsw_sp, lag_id, i);
3724 if (!lag_port || lag_port->local_port == local_port)
3725 continue;
3726 if (mlxsw_sp_lag_port_fid_member(lag_port, fid))
3727 count++;
3728 }
3729
3730 return !count;
Ido Schimmel039c49a2016-01-27 15:20:18 +01003731}
3732
3733static int
3734mlxsw_sp_port_fdb_flush_by_port_fid(const struct mlxsw_sp_port *mlxsw_sp_port,
3735 u16 fid)
3736{
3737 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
3738 char sfdf_pl[MLXSW_REG_SFDF_LEN];
3739
3740 mlxsw_reg_sfdf_pack(sfdf_pl, MLXSW_REG_SFDF_FLUSH_PER_PORT_AND_FID);
3741 mlxsw_reg_sfdf_fid_set(sfdf_pl, fid);
3742 mlxsw_reg_sfdf_port_fid_system_port_set(sfdf_pl,
3743 mlxsw_sp_port->local_port);
3744
Ido Schimmel22305372016-06-20 23:04:21 +02003745 netdev_dbg(mlxsw_sp_port->dev, "FDB flushed using Port=%d, FID=%d\n",
3746 mlxsw_sp_port->local_port, fid);
3747
Ido Schimmel039c49a2016-01-27 15:20:18 +01003748 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sfdf), sfdf_pl);
3749}
3750
3751static int
Ido Schimmel039c49a2016-01-27 15:20:18 +01003752mlxsw_sp_port_fdb_flush_by_lag_id_fid(const struct mlxsw_sp_port *mlxsw_sp_port,
3753 u16 fid)
3754{
3755 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
3756 char sfdf_pl[MLXSW_REG_SFDF_LEN];
3757
3758 mlxsw_reg_sfdf_pack(sfdf_pl, MLXSW_REG_SFDF_FLUSH_PER_LAG_AND_FID);
3759 mlxsw_reg_sfdf_fid_set(sfdf_pl, fid);
3760 mlxsw_reg_sfdf_lag_fid_lag_id_set(sfdf_pl, mlxsw_sp_port->lag_id);
3761
Ido Schimmel22305372016-06-20 23:04:21 +02003762 netdev_dbg(mlxsw_sp_port->dev, "FDB flushed using LAG ID=%d, FID=%d\n",
3763 mlxsw_sp_port->lag_id, fid);
3764
Ido Schimmel039c49a2016-01-27 15:20:18 +01003765 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sfdf), sfdf_pl);
3766}
3767
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02003768int mlxsw_sp_port_fdb_flush(struct mlxsw_sp_port *mlxsw_sp_port, u16 fid)
Ido Schimmel039c49a2016-01-27 15:20:18 +01003769{
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02003770 if (!mlxsw_sp_port_fdb_should_flush(mlxsw_sp_port, fid))
3771 return 0;
Ido Schimmel039c49a2016-01-27 15:20:18 +01003772
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02003773 if (mlxsw_sp_port->lagged)
3774 return mlxsw_sp_port_fdb_flush_by_lag_id_fid(mlxsw_sp_port,
Ido Schimmel039c49a2016-01-27 15:20:18 +01003775 fid);
3776 else
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02003777 return mlxsw_sp_port_fdb_flush_by_port_fid(mlxsw_sp_port, fid);
Ido Schimmel039c49a2016-01-27 15:20:18 +01003778}
3779
Ido Schimmel701b1862016-07-04 08:23:16 +02003780static void mlxsw_sp_master_bridge_gone_sync(struct mlxsw_sp *mlxsw_sp)
3781{
3782 struct mlxsw_sp_fid *f, *tmp;
3783
3784 list_for_each_entry_safe(f, tmp, &mlxsw_sp->fids, list)
3785 if (--f->ref_count == 0)
3786 mlxsw_sp_fid_destroy(mlxsw_sp, f);
3787 else
3788 WARN_ON_ONCE(1);
3789}
3790
Ido Schimmel7117a572016-06-20 23:04:06 +02003791static bool mlxsw_sp_master_bridge_check(struct mlxsw_sp *mlxsw_sp,
3792 struct net_device *br_dev)
3793{
3794 return !mlxsw_sp->master_bridge.dev ||
3795 mlxsw_sp->master_bridge.dev == br_dev;
3796}
3797
3798static void mlxsw_sp_master_bridge_inc(struct mlxsw_sp *mlxsw_sp,
3799 struct net_device *br_dev)
3800{
3801 mlxsw_sp->master_bridge.dev = br_dev;
3802 mlxsw_sp->master_bridge.ref_count++;
3803}
3804
3805static void mlxsw_sp_master_bridge_dec(struct mlxsw_sp *mlxsw_sp)
3806{
Ido Schimmel701b1862016-07-04 08:23:16 +02003807 if (--mlxsw_sp->master_bridge.ref_count == 0) {
Ido Schimmel7117a572016-06-20 23:04:06 +02003808 mlxsw_sp->master_bridge.dev = NULL;
Ido Schimmel701b1862016-07-04 08:23:16 +02003809 /* It's possible upper VLAN devices are still holding
3810 * references to underlying FIDs. Drop the reference
3811 * and release the resources if it was the last one.
3812 * If it wasn't, then something bad happened.
3813 */
3814 mlxsw_sp_master_bridge_gone_sync(mlxsw_sp);
3815 }
Ido Schimmel7117a572016-06-20 23:04:06 +02003816}
3817
3818static int mlxsw_sp_port_bridge_join(struct mlxsw_sp_port *mlxsw_sp_port,
3819 struct net_device *br_dev)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003820{
3821 struct net_device *dev = mlxsw_sp_port->dev;
3822 int err;
3823
3824 /* When port is not bridged untagged packets are tagged with
3825 * PVID=VID=1, thereby creating an implicit VLAN interface in
3826 * the device. Remove it and let bridge code take care of its
3827 * own VLANs.
3828 */
3829 err = mlxsw_sp_port_kill_vid(dev, 0, 1);
Ido Schimmel6c72a3d2016-01-04 10:42:26 +01003830 if (err)
3831 return err;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003832
Ido Schimmel7117a572016-06-20 23:04:06 +02003833 mlxsw_sp_master_bridge_inc(mlxsw_sp_port->mlxsw_sp, br_dev);
3834
Ido Schimmel6c72a3d2016-01-04 10:42:26 +01003835 mlxsw_sp_port->learning = 1;
3836 mlxsw_sp_port->learning_sync = 1;
3837 mlxsw_sp_port->uc_flood = 1;
3838 mlxsw_sp_port->bridged = 1;
3839
3840 return 0;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003841}
3842
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02003843static void mlxsw_sp_port_bridge_leave(struct mlxsw_sp_port *mlxsw_sp_port)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003844{
3845 struct net_device *dev = mlxsw_sp_port->dev;
Ido Schimmel5a8f4522016-01-04 10:42:25 +01003846
Ido Schimmel28a01d22016-02-18 11:30:02 +01003847 mlxsw_sp_port_pvid_set(mlxsw_sp_port, 1);
3848
Ido Schimmel7117a572016-06-20 23:04:06 +02003849 mlxsw_sp_master_bridge_dec(mlxsw_sp_port->mlxsw_sp);
3850
Ido Schimmel6c72a3d2016-01-04 10:42:26 +01003851 mlxsw_sp_port->learning = 0;
3852 mlxsw_sp_port->learning_sync = 0;
3853 mlxsw_sp_port->uc_flood = 0;
Ido Schimmel5a8f4522016-01-04 10:42:25 +01003854 mlxsw_sp_port->bridged = 0;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003855
3856 /* Add implicit VLAN interface in the device, so that untagged
3857 * packets will be classified to the default vFID.
3858 */
Ido Schimmel82e6db02016-06-20 23:04:04 +02003859 mlxsw_sp_port_add_vid(dev, 0, 1);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003860}
3861
Jiri Pirko0d65fc12015-12-03 12:12:28 +01003862static int mlxsw_sp_lag_create(struct mlxsw_sp *mlxsw_sp, u16 lag_id)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003863{
Jiri Pirko0d65fc12015-12-03 12:12:28 +01003864 char sldr_pl[MLXSW_REG_SLDR_LEN];
3865
3866 mlxsw_reg_sldr_lag_create_pack(sldr_pl, lag_id);
3867 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sldr), sldr_pl);
3868}
3869
3870static int mlxsw_sp_lag_destroy(struct mlxsw_sp *mlxsw_sp, u16 lag_id)
3871{
3872 char sldr_pl[MLXSW_REG_SLDR_LEN];
3873
3874 mlxsw_reg_sldr_lag_destroy_pack(sldr_pl, lag_id);
3875 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sldr), sldr_pl);
3876}
3877
3878static int mlxsw_sp_lag_col_port_add(struct mlxsw_sp_port *mlxsw_sp_port,
3879 u16 lag_id, u8 port_index)
3880{
3881 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
3882 char slcor_pl[MLXSW_REG_SLCOR_LEN];
3883
3884 mlxsw_reg_slcor_port_add_pack(slcor_pl, mlxsw_sp_port->local_port,
3885 lag_id, port_index);
3886 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(slcor), slcor_pl);
3887}
3888
3889static int mlxsw_sp_lag_col_port_remove(struct mlxsw_sp_port *mlxsw_sp_port,
3890 u16 lag_id)
3891{
3892 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
3893 char slcor_pl[MLXSW_REG_SLCOR_LEN];
3894
3895 mlxsw_reg_slcor_port_remove_pack(slcor_pl, mlxsw_sp_port->local_port,
3896 lag_id);
3897 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(slcor), slcor_pl);
3898}
3899
3900static int mlxsw_sp_lag_col_port_enable(struct mlxsw_sp_port *mlxsw_sp_port,
3901 u16 lag_id)
3902{
3903 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
3904 char slcor_pl[MLXSW_REG_SLCOR_LEN];
3905
3906 mlxsw_reg_slcor_col_enable_pack(slcor_pl, mlxsw_sp_port->local_port,
3907 lag_id);
3908 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(slcor), slcor_pl);
3909}
3910
3911static int mlxsw_sp_lag_col_port_disable(struct mlxsw_sp_port *mlxsw_sp_port,
3912 u16 lag_id)
3913{
3914 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
3915 char slcor_pl[MLXSW_REG_SLCOR_LEN];
3916
3917 mlxsw_reg_slcor_col_disable_pack(slcor_pl, mlxsw_sp_port->local_port,
3918 lag_id);
3919 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(slcor), slcor_pl);
3920}
3921
3922static int mlxsw_sp_lag_index_get(struct mlxsw_sp *mlxsw_sp,
3923 struct net_device *lag_dev,
3924 u16 *p_lag_id)
3925{
Nogah Frankelce0bd2b2016-09-20 11:16:50 +02003926 struct mlxsw_resources *resources;
Jiri Pirko0d65fc12015-12-03 12:12:28 +01003927 struct mlxsw_sp_upper *lag;
3928 int free_lag_id = -1;
3929 int i;
3930
Nogah Frankelce0bd2b2016-09-20 11:16:50 +02003931 resources = mlxsw_core_resources_get(mlxsw_sp->core);
3932 for (i = 0; i < resources->max_lag; i++) {
Jiri Pirko0d65fc12015-12-03 12:12:28 +01003933 lag = mlxsw_sp_lag_get(mlxsw_sp, i);
3934 if (lag->ref_count) {
3935 if (lag->dev == lag_dev) {
3936 *p_lag_id = i;
3937 return 0;
3938 }
3939 } else if (free_lag_id < 0) {
3940 free_lag_id = i;
3941 }
3942 }
3943 if (free_lag_id < 0)
3944 return -EBUSY;
3945 *p_lag_id = free_lag_id;
3946 return 0;
3947}
3948
3949static bool
3950mlxsw_sp_master_lag_check(struct mlxsw_sp *mlxsw_sp,
3951 struct net_device *lag_dev,
3952 struct netdev_lag_upper_info *lag_upper_info)
3953{
3954 u16 lag_id;
3955
3956 if (mlxsw_sp_lag_index_get(mlxsw_sp, lag_dev, &lag_id) != 0)
3957 return false;
3958 if (lag_upper_info->tx_type != NETDEV_LAG_TX_TYPE_HASH)
3959 return false;
3960 return true;
3961}
3962
3963static int mlxsw_sp_port_lag_index_get(struct mlxsw_sp *mlxsw_sp,
3964 u16 lag_id, u8 *p_port_index)
3965{
Nogah Frankelce0bd2b2016-09-20 11:16:50 +02003966 struct mlxsw_resources *resources;
Jiri Pirko0d65fc12015-12-03 12:12:28 +01003967 int i;
3968
Nogah Frankelce0bd2b2016-09-20 11:16:50 +02003969 resources = mlxsw_core_resources_get(mlxsw_sp->core);
3970 for (i = 0; i < resources->max_ports_in_lag; i++) {
Jiri Pirko0d65fc12015-12-03 12:12:28 +01003971 if (!mlxsw_sp_port_lagged_get(mlxsw_sp, lag_id, i)) {
3972 *p_port_index = i;
3973 return 0;
3974 }
3975 }
3976 return -EBUSY;
3977}
3978
Ido Schimmel86bf95b2016-07-02 11:00:11 +02003979static void
3980mlxsw_sp_port_pvid_vport_lag_join(struct mlxsw_sp_port *mlxsw_sp_port,
3981 u16 lag_id)
3982{
3983 struct mlxsw_sp_port *mlxsw_sp_vport;
Ido Schimmel11943ff2016-07-02 11:00:12 +02003984 struct mlxsw_sp_fid *f;
Ido Schimmel86bf95b2016-07-02 11:00:11 +02003985
3986 mlxsw_sp_vport = mlxsw_sp_port_vport_find(mlxsw_sp_port, 1);
3987 if (WARN_ON(!mlxsw_sp_vport))
3988 return;
3989
Ido Schimmel11943ff2016-07-02 11:00:12 +02003990 /* If vPort is assigned a RIF, then leave it since it's no
3991 * longer valid.
3992 */
3993 f = mlxsw_sp_vport_fid_get(mlxsw_sp_vport);
3994 if (f)
3995 f->leave(mlxsw_sp_vport);
3996
Ido Schimmel86bf95b2016-07-02 11:00:11 +02003997 mlxsw_sp_vport->lag_id = lag_id;
3998 mlxsw_sp_vport->lagged = 1;
3999}
4000
4001static void
4002mlxsw_sp_port_pvid_vport_lag_leave(struct mlxsw_sp_port *mlxsw_sp_port)
4003{
4004 struct mlxsw_sp_port *mlxsw_sp_vport;
Ido Schimmel11943ff2016-07-02 11:00:12 +02004005 struct mlxsw_sp_fid *f;
Ido Schimmel86bf95b2016-07-02 11:00:11 +02004006
4007 mlxsw_sp_vport = mlxsw_sp_port_vport_find(mlxsw_sp_port, 1);
4008 if (WARN_ON(!mlxsw_sp_vport))
4009 return;
4010
Ido Schimmel11943ff2016-07-02 11:00:12 +02004011 f = mlxsw_sp_vport_fid_get(mlxsw_sp_vport);
4012 if (f)
4013 f->leave(mlxsw_sp_vport);
4014
Ido Schimmel86bf95b2016-07-02 11:00:11 +02004015 mlxsw_sp_vport->lagged = 0;
4016}
4017
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004018static int mlxsw_sp_port_lag_join(struct mlxsw_sp_port *mlxsw_sp_port,
4019 struct net_device *lag_dev)
4020{
4021 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
4022 struct mlxsw_sp_upper *lag;
4023 u16 lag_id;
4024 u8 port_index;
4025 int err;
4026
4027 err = mlxsw_sp_lag_index_get(mlxsw_sp, lag_dev, &lag_id);
4028 if (err)
4029 return err;
4030 lag = mlxsw_sp_lag_get(mlxsw_sp, lag_id);
4031 if (!lag->ref_count) {
4032 err = mlxsw_sp_lag_create(mlxsw_sp, lag_id);
4033 if (err)
4034 return err;
4035 lag->dev = lag_dev;
4036 }
4037
4038 err = mlxsw_sp_port_lag_index_get(mlxsw_sp, lag_id, &port_index);
4039 if (err)
4040 return err;
4041 err = mlxsw_sp_lag_col_port_add(mlxsw_sp_port, lag_id, port_index);
4042 if (err)
4043 goto err_col_port_add;
4044 err = mlxsw_sp_lag_col_port_enable(mlxsw_sp_port, lag_id);
4045 if (err)
4046 goto err_col_port_enable;
4047
4048 mlxsw_core_lag_mapping_set(mlxsw_sp->core, lag_id, port_index,
4049 mlxsw_sp_port->local_port);
4050 mlxsw_sp_port->lag_id = lag_id;
4051 mlxsw_sp_port->lagged = 1;
4052 lag->ref_count++;
Ido Schimmel86bf95b2016-07-02 11:00:11 +02004053
4054 mlxsw_sp_port_pvid_vport_lag_join(mlxsw_sp_port, lag_id);
4055
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004056 return 0;
4057
Ido Schimmel51554db2016-05-06 22:18:39 +02004058err_col_port_enable:
4059 mlxsw_sp_lag_col_port_remove(mlxsw_sp_port, lag_id);
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004060err_col_port_add:
4061 if (!lag->ref_count)
4062 mlxsw_sp_lag_destroy(mlxsw_sp, lag_id);
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004063 return err;
4064}
4065
Ido Schimmel82e6db02016-06-20 23:04:04 +02004066static void mlxsw_sp_port_lag_leave(struct mlxsw_sp_port *mlxsw_sp_port,
4067 struct net_device *lag_dev)
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004068{
4069 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004070 u16 lag_id = mlxsw_sp_port->lag_id;
Ido Schimmel1c800752016-06-20 23:04:20 +02004071 struct mlxsw_sp_upper *lag;
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004072
4073 if (!mlxsw_sp_port->lagged)
Ido Schimmel82e6db02016-06-20 23:04:04 +02004074 return;
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004075 lag = mlxsw_sp_lag_get(mlxsw_sp, lag_id);
4076 WARN_ON(lag->ref_count == 0);
4077
Ido Schimmel82e6db02016-06-20 23:04:04 +02004078 mlxsw_sp_lag_col_port_disable(mlxsw_sp_port, lag_id);
4079 mlxsw_sp_lag_col_port_remove(mlxsw_sp_port, lag_id);
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004080
Ido Schimmel4dc236c2016-01-27 15:20:16 +01004081 if (mlxsw_sp_port->bridged) {
4082 mlxsw_sp_port_active_vlans_del(mlxsw_sp_port);
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02004083 mlxsw_sp_port_bridge_leave(mlxsw_sp_port);
Ido Schimmel4dc236c2016-01-27 15:20:16 +01004084 }
4085
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02004086 if (lag->ref_count == 1)
Ido Schimmel82e6db02016-06-20 23:04:04 +02004087 mlxsw_sp_lag_destroy(mlxsw_sp, lag_id);
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004088
4089 mlxsw_core_lag_mapping_clear(mlxsw_sp->core, lag_id,
4090 mlxsw_sp_port->local_port);
4091 mlxsw_sp_port->lagged = 0;
4092 lag->ref_count--;
Ido Schimmel86bf95b2016-07-02 11:00:11 +02004093
4094 mlxsw_sp_port_pvid_vport_lag_leave(mlxsw_sp_port);
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004095}
4096
Jiri Pirko74581202015-12-03 12:12:30 +01004097static int mlxsw_sp_lag_dist_port_add(struct mlxsw_sp_port *mlxsw_sp_port,
4098 u16 lag_id)
4099{
4100 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
4101 char sldr_pl[MLXSW_REG_SLDR_LEN];
4102
4103 mlxsw_reg_sldr_lag_add_port_pack(sldr_pl, lag_id,
4104 mlxsw_sp_port->local_port);
4105 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sldr), sldr_pl);
4106}
4107
4108static int mlxsw_sp_lag_dist_port_remove(struct mlxsw_sp_port *mlxsw_sp_port,
4109 u16 lag_id)
4110{
4111 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
4112 char sldr_pl[MLXSW_REG_SLDR_LEN];
4113
4114 mlxsw_reg_sldr_lag_remove_port_pack(sldr_pl, lag_id,
4115 mlxsw_sp_port->local_port);
4116 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sldr), sldr_pl);
4117}
4118
4119static int mlxsw_sp_port_lag_tx_en_set(struct mlxsw_sp_port *mlxsw_sp_port,
4120 bool lag_tx_enabled)
4121{
4122 if (lag_tx_enabled)
4123 return mlxsw_sp_lag_dist_port_add(mlxsw_sp_port,
4124 mlxsw_sp_port->lag_id);
4125 else
4126 return mlxsw_sp_lag_dist_port_remove(mlxsw_sp_port,
4127 mlxsw_sp_port->lag_id);
4128}
4129
4130static int mlxsw_sp_port_lag_changed(struct mlxsw_sp_port *mlxsw_sp_port,
4131 struct netdev_lag_lower_state_info *info)
4132{
4133 return mlxsw_sp_port_lag_tx_en_set(mlxsw_sp_port, info->tx_enabled);
4134}
4135
Ido Schimmel9589a7b52015-12-15 16:03:43 +01004136static int mlxsw_sp_port_vlan_link(struct mlxsw_sp_port *mlxsw_sp_port,
4137 struct net_device *vlan_dev)
4138{
4139 struct mlxsw_sp_port *mlxsw_sp_vport;
4140 u16 vid = vlan_dev_vlan_id(vlan_dev);
4141
4142 mlxsw_sp_vport = mlxsw_sp_port_vport_find(mlxsw_sp_port, vid);
Ido Schimmel423b9372016-06-20 23:04:03 +02004143 if (WARN_ON(!mlxsw_sp_vport))
Ido Schimmel9589a7b52015-12-15 16:03:43 +01004144 return -EINVAL;
Ido Schimmel9589a7b52015-12-15 16:03:43 +01004145
4146 mlxsw_sp_vport->dev = vlan_dev;
4147
4148 return 0;
4149}
4150
Ido Schimmel82e6db02016-06-20 23:04:04 +02004151static void mlxsw_sp_port_vlan_unlink(struct mlxsw_sp_port *mlxsw_sp_port,
4152 struct net_device *vlan_dev)
Ido Schimmel9589a7b52015-12-15 16:03:43 +01004153{
4154 struct mlxsw_sp_port *mlxsw_sp_vport;
4155 u16 vid = vlan_dev_vlan_id(vlan_dev);
4156
4157 mlxsw_sp_vport = mlxsw_sp_port_vport_find(mlxsw_sp_port, vid);
Ido Schimmel423b9372016-06-20 23:04:03 +02004158 if (WARN_ON(!mlxsw_sp_vport))
Ido Schimmel82e6db02016-06-20 23:04:04 +02004159 return;
Ido Schimmel9589a7b52015-12-15 16:03:43 +01004160
4161 mlxsw_sp_vport->dev = mlxsw_sp_port->dev;
Ido Schimmel9589a7b52015-12-15 16:03:43 +01004162}
4163
Jiri Pirko74581202015-12-03 12:12:30 +01004164static int mlxsw_sp_netdevice_port_upper_event(struct net_device *dev,
4165 unsigned long event, void *ptr)
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004166{
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004167 struct netdev_notifier_changeupper_info *info;
4168 struct mlxsw_sp_port *mlxsw_sp_port;
4169 struct net_device *upper_dev;
4170 struct mlxsw_sp *mlxsw_sp;
Ido Schimmel80bedf12016-06-20 23:03:59 +02004171 int err = 0;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004172
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004173 mlxsw_sp_port = netdev_priv(dev);
4174 mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
4175 info = ptr;
4176
4177 switch (event) {
4178 case NETDEV_PRECHANGEUPPER:
4179 upper_dev = info->upper_dev;
Ido Schimmel59fe9b32016-06-20 23:04:00 +02004180 if (!is_vlan_dev(upper_dev) &&
4181 !netif_is_lag_master(upper_dev) &&
4182 !netif_is_bridge_master(upper_dev))
4183 return -EINVAL;
Ido Schimmel6ec43902016-06-20 23:04:01 +02004184 if (!info->linking)
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004185 break;
Ido Schimmel73ee5a732017-09-01 10:52:31 +02004186 if (netdev_has_any_upper_dev(upper_dev))
4187 return -EINVAL;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004188 /* HW limitation forbids to put ports to multiple bridges. */
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004189 if (netif_is_bridge_master(upper_dev) &&
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004190 !mlxsw_sp_master_bridge_check(mlxsw_sp, upper_dev))
Ido Schimmel80bedf12016-06-20 23:03:59 +02004191 return -EINVAL;
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004192 if (netif_is_lag_master(upper_dev) &&
4193 !mlxsw_sp_master_lag_check(mlxsw_sp, upper_dev,
4194 info->upper_info))
Ido Schimmel80bedf12016-06-20 23:03:59 +02004195 return -EINVAL;
Ido Schimmel6ec43902016-06-20 23:04:01 +02004196 if (netif_is_lag_master(upper_dev) && vlan_uses_dev(dev))
4197 return -EINVAL;
4198 if (netif_is_lag_port(dev) && is_vlan_dev(upper_dev) &&
4199 !netif_is_lag_master(vlan_dev_real_dev(upper_dev)))
4200 return -EINVAL;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004201 break;
4202 case NETDEV_CHANGEUPPER:
4203 upper_dev = info->upper_dev;
Ido Schimmel9589a7b52015-12-15 16:03:43 +01004204 if (is_vlan_dev(upper_dev)) {
Ido Schimmel80bedf12016-06-20 23:03:59 +02004205 if (info->linking)
Ido Schimmel9589a7b52015-12-15 16:03:43 +01004206 err = mlxsw_sp_port_vlan_link(mlxsw_sp_port,
4207 upper_dev);
Ido Schimmel80bedf12016-06-20 23:03:59 +02004208 else
Ido Schimmel82e6db02016-06-20 23:04:04 +02004209 mlxsw_sp_port_vlan_unlink(mlxsw_sp_port,
4210 upper_dev);
Ido Schimmel9589a7b52015-12-15 16:03:43 +01004211 } else if (netif_is_bridge_master(upper_dev)) {
Ido Schimmel7117a572016-06-20 23:04:06 +02004212 if (info->linking)
4213 err = mlxsw_sp_port_bridge_join(mlxsw_sp_port,
4214 upper_dev);
4215 else
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02004216 mlxsw_sp_port_bridge_leave(mlxsw_sp_port);
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004217 } else if (netif_is_lag_master(upper_dev)) {
Ido Schimmel80bedf12016-06-20 23:03:59 +02004218 if (info->linking)
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004219 err = mlxsw_sp_port_lag_join(mlxsw_sp_port,
4220 upper_dev);
Ido Schimmel80bedf12016-06-20 23:03:59 +02004221 else
Ido Schimmel82e6db02016-06-20 23:04:04 +02004222 mlxsw_sp_port_lag_leave(mlxsw_sp_port,
4223 upper_dev);
Ido Schimmel59fe9b32016-06-20 23:04:00 +02004224 } else {
4225 err = -EINVAL;
4226 WARN_ON(1);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004227 }
4228 break;
4229 }
4230
Ido Schimmel80bedf12016-06-20 23:03:59 +02004231 return err;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004232}
4233
Jiri Pirko74581202015-12-03 12:12:30 +01004234static int mlxsw_sp_netdevice_port_lower_event(struct net_device *dev,
4235 unsigned long event, void *ptr)
4236{
4237 struct netdev_notifier_changelowerstate_info *info;
4238 struct mlxsw_sp_port *mlxsw_sp_port;
4239 int err;
4240
4241 mlxsw_sp_port = netdev_priv(dev);
4242 info = ptr;
4243
4244 switch (event) {
4245 case NETDEV_CHANGELOWERSTATE:
4246 if (netif_is_lag_port(dev) && mlxsw_sp_port->lagged) {
4247 err = mlxsw_sp_port_lag_changed(mlxsw_sp_port,
4248 info->lower_state_info);
4249 if (err)
4250 netdev_err(dev, "Failed to reflect link aggregation lower state change\n");
4251 }
4252 break;
4253 }
4254
Ido Schimmel80bedf12016-06-20 23:03:59 +02004255 return 0;
Jiri Pirko74581202015-12-03 12:12:30 +01004256}
4257
4258static int mlxsw_sp_netdevice_port_event(struct net_device *dev,
4259 unsigned long event, void *ptr)
4260{
4261 switch (event) {
4262 case NETDEV_PRECHANGEUPPER:
4263 case NETDEV_CHANGEUPPER:
4264 return mlxsw_sp_netdevice_port_upper_event(dev, event, ptr);
4265 case NETDEV_CHANGELOWERSTATE:
4266 return mlxsw_sp_netdevice_port_lower_event(dev, event, ptr);
4267 }
4268
Ido Schimmel80bedf12016-06-20 23:03:59 +02004269 return 0;
Jiri Pirko74581202015-12-03 12:12:30 +01004270}
4271
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004272static int mlxsw_sp_netdevice_lag_event(struct net_device *lag_dev,
4273 unsigned long event, void *ptr)
4274{
4275 struct net_device *dev;
4276 struct list_head *iter;
4277 int ret;
4278
4279 netdev_for_each_lower_dev(lag_dev, dev, iter) {
4280 if (mlxsw_sp_port_dev_check(dev)) {
4281 ret = mlxsw_sp_netdevice_port_event(dev, event, ptr);
Ido Schimmel80bedf12016-06-20 23:03:59 +02004282 if (ret)
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004283 return ret;
4284 }
4285 }
4286
Ido Schimmel80bedf12016-06-20 23:03:59 +02004287 return 0;
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004288}
4289
Ido Schimmel701b1862016-07-04 08:23:16 +02004290static int mlxsw_sp_master_bridge_vlan_link(struct mlxsw_sp *mlxsw_sp,
4291 struct net_device *vlan_dev)
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004292{
Ido Schimmel701b1862016-07-04 08:23:16 +02004293 u16 fid = vlan_dev_vlan_id(vlan_dev);
Ido Schimmeld0ec8752016-06-20 23:04:12 +02004294 struct mlxsw_sp_fid *f;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004295
Ido Schimmel701b1862016-07-04 08:23:16 +02004296 f = mlxsw_sp_fid_find(mlxsw_sp, fid);
4297 if (!f) {
4298 f = mlxsw_sp_fid_create(mlxsw_sp, fid);
4299 if (IS_ERR(f))
4300 return PTR_ERR(f);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004301 }
4302
Ido Schimmel701b1862016-07-04 08:23:16 +02004303 f->ref_count++;
4304
4305 return 0;
4306}
4307
4308static void mlxsw_sp_master_bridge_vlan_unlink(struct mlxsw_sp *mlxsw_sp,
4309 struct net_device *vlan_dev)
4310{
4311 u16 fid = vlan_dev_vlan_id(vlan_dev);
4312 struct mlxsw_sp_fid *f;
4313
4314 f = mlxsw_sp_fid_find(mlxsw_sp, fid);
Ido Schimmel99f44bb2016-07-04 08:23:17 +02004315 if (f && f->r)
4316 mlxsw_sp_rif_bridge_destroy(mlxsw_sp, f->r);
Ido Schimmel701b1862016-07-04 08:23:16 +02004317 if (f && --f->ref_count == 0)
4318 mlxsw_sp_fid_destroy(mlxsw_sp, f);
4319}
4320
4321static int mlxsw_sp_netdevice_bridge_event(struct net_device *br_dev,
4322 unsigned long event, void *ptr)
4323{
4324 struct netdev_notifier_changeupper_info *info;
4325 struct net_device *upper_dev;
4326 struct mlxsw_sp *mlxsw_sp;
4327 int err;
4328
4329 mlxsw_sp = mlxsw_sp_lower_get(br_dev);
4330 if (!mlxsw_sp)
4331 return 0;
4332 if (br_dev != mlxsw_sp->master_bridge.dev)
4333 return 0;
4334
4335 info = ptr;
4336
4337 switch (event) {
4338 case NETDEV_CHANGEUPPER:
4339 upper_dev = info->upper_dev;
4340 if (!is_vlan_dev(upper_dev))
4341 break;
4342 if (info->linking) {
4343 err = mlxsw_sp_master_bridge_vlan_link(mlxsw_sp,
4344 upper_dev);
4345 if (err)
4346 return err;
4347 } else {
4348 mlxsw_sp_master_bridge_vlan_unlink(mlxsw_sp, upper_dev);
4349 }
4350 break;
4351 }
4352
4353 return 0;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004354}
4355
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004356static u16 mlxsw_sp_avail_vfid_get(const struct mlxsw_sp *mlxsw_sp)
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004357{
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004358 return find_first_zero_bit(mlxsw_sp->vfids.mapped,
Ido Schimmel99724c12016-07-04 08:23:14 +02004359 MLXSW_SP_VFID_MAX);
4360}
4361
4362static int mlxsw_sp_vfid_op(struct mlxsw_sp *mlxsw_sp, u16 fid, bool create)
4363{
4364 char sfmr_pl[MLXSW_REG_SFMR_LEN];
4365
4366 mlxsw_reg_sfmr_pack(sfmr_pl, !create, fid, 0);
4367 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sfmr), sfmr_pl);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004368}
4369
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004370static void mlxsw_sp_vport_vfid_leave(struct mlxsw_sp_port *mlxsw_sp_vport);
Ido Schimmel1c800752016-06-20 23:04:20 +02004371
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004372static struct mlxsw_sp_fid *mlxsw_sp_vfid_create(struct mlxsw_sp *mlxsw_sp,
4373 struct net_device *br_dev)
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004374{
4375 struct device *dev = mlxsw_sp->bus_info->dev;
Ido Schimmeld0ec8752016-06-20 23:04:12 +02004376 struct mlxsw_sp_fid *f;
Ido Schimmelc7e920b2016-06-20 23:04:09 +02004377 u16 vfid, fid;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004378 int err;
4379
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004380 vfid = mlxsw_sp_avail_vfid_get(mlxsw_sp);
Ido Schimmelc7e920b2016-06-20 23:04:09 +02004381 if (vfid == MLXSW_SP_VFID_MAX) {
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004382 dev_err(dev, "No available vFIDs\n");
4383 return ERR_PTR(-ERANGE);
4384 }
4385
Ido Schimmelc7e920b2016-06-20 23:04:09 +02004386 fid = mlxsw_sp_vfid_to_fid(vfid);
4387 err = mlxsw_sp_vfid_op(mlxsw_sp, fid, true);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004388 if (err) {
Ido Schimmelc7e920b2016-06-20 23:04:09 +02004389 dev_err(dev, "Failed to create FID=%d\n", fid);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004390 return ERR_PTR(err);
4391 }
4392
Ido Schimmelc7e920b2016-06-20 23:04:09 +02004393 f = kzalloc(sizeof(*f), GFP_KERNEL);
4394 if (!f)
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004395 goto err_allocate_vfid;
4396
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004397 f->leave = mlxsw_sp_vport_vfid_leave;
Ido Schimmeld0ec8752016-06-20 23:04:12 +02004398 f->fid = fid;
4399 f->dev = br_dev;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004400
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004401 list_add(&f->list, &mlxsw_sp->vfids.list);
4402 set_bit(vfid, mlxsw_sp->vfids.mapped);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004403
Ido Schimmelc7e920b2016-06-20 23:04:09 +02004404 return f;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004405
4406err_allocate_vfid:
Ido Schimmelc7e920b2016-06-20 23:04:09 +02004407 mlxsw_sp_vfid_op(mlxsw_sp, fid, false);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004408 return ERR_PTR(-ENOMEM);
4409}
4410
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004411static void mlxsw_sp_vfid_destroy(struct mlxsw_sp *mlxsw_sp,
4412 struct mlxsw_sp_fid *f)
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004413{
Ido Schimmeld0ec8752016-06-20 23:04:12 +02004414 u16 vfid = mlxsw_sp_fid_to_vfid(f->fid);
Ido Schimmel99f44bb2016-07-04 08:23:17 +02004415 u16 fid = f->fid;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004416
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004417 clear_bit(vfid, mlxsw_sp->vfids.mapped);
Ido Schimmeld0ec8752016-06-20 23:04:12 +02004418 list_del(&f->list);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004419
Ido Schimmel99f44bb2016-07-04 08:23:17 +02004420 if (f->r)
4421 mlxsw_sp_rif_bridge_destroy(mlxsw_sp, f->r);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004422
Ido Schimmeld0ec8752016-06-20 23:04:12 +02004423 kfree(f);
Ido Schimmel99f44bb2016-07-04 08:23:17 +02004424
4425 mlxsw_sp_vfid_op(mlxsw_sp, fid, false);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004426}
4427
Ido Schimmel99724c12016-07-04 08:23:14 +02004428static int mlxsw_sp_vport_fid_map(struct mlxsw_sp_port *mlxsw_sp_vport, u16 fid,
4429 bool valid)
4430{
4431 enum mlxsw_reg_svfa_mt mt = MLXSW_REG_SVFA_MT_PORT_VID_TO_FID;
4432 u16 vid = mlxsw_sp_vport_vid_get(mlxsw_sp_vport);
4433
4434 return mlxsw_sp_port_vid_to_fid_set(mlxsw_sp_vport, mt, valid, fid,
4435 vid);
4436}
4437
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004438static int mlxsw_sp_vport_vfid_join(struct mlxsw_sp_port *mlxsw_sp_vport,
4439 struct net_device *br_dev)
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004440{
Ido Schimmel0355b592016-06-20 23:04:13 +02004441 struct mlxsw_sp_fid *f;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004442 int err;
4443
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004444 f = mlxsw_sp_vfid_find(mlxsw_sp_vport->mlxsw_sp, br_dev);
Ido Schimmel0355b592016-06-20 23:04:13 +02004445 if (!f) {
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004446 f = mlxsw_sp_vfid_create(mlxsw_sp_vport->mlxsw_sp, br_dev);
Ido Schimmel0355b592016-06-20 23:04:13 +02004447 if (IS_ERR(f))
4448 return PTR_ERR(f);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004449 }
4450
Ido Schimmel0355b592016-06-20 23:04:13 +02004451 err = mlxsw_sp_vport_flood_set(mlxsw_sp_vport, f->fid, true);
4452 if (err)
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004453 goto err_vport_flood_set;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004454
Ido Schimmel0355b592016-06-20 23:04:13 +02004455 err = mlxsw_sp_vport_fid_map(mlxsw_sp_vport, f->fid, true);
4456 if (err)
4457 goto err_vport_fid_map;
Ido Schimmel6a9863a2016-02-15 13:19:54 +01004458
Ido Schimmel41b996c2016-06-20 23:04:17 +02004459 mlxsw_sp_vport_fid_set(mlxsw_sp_vport, f);
Ido Schimmel0355b592016-06-20 23:04:13 +02004460 f->ref_count++;
Ido Schimmel039c49a2016-01-27 15:20:18 +01004461
Ido Schimmel22305372016-06-20 23:04:21 +02004462 netdev_dbg(mlxsw_sp_vport->dev, "Joined FID=%d\n", f->fid);
4463
Ido Schimmel0355b592016-06-20 23:04:13 +02004464 return 0;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004465
Ido Schimmel9c4d4422016-06-20 23:04:10 +02004466err_vport_fid_map:
Ido Schimmel0355b592016-06-20 23:04:13 +02004467 mlxsw_sp_vport_flood_set(mlxsw_sp_vport, f->fid, false);
4468err_vport_flood_set:
4469 if (!f->ref_count)
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004470 mlxsw_sp_vfid_destroy(mlxsw_sp_vport->mlxsw_sp, f);
Ido Schimmel0355b592016-06-20 23:04:13 +02004471 return err;
4472}
4473
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004474static void mlxsw_sp_vport_vfid_leave(struct mlxsw_sp_port *mlxsw_sp_vport)
Ido Schimmel0355b592016-06-20 23:04:13 +02004475{
Ido Schimmel41b996c2016-06-20 23:04:17 +02004476 struct mlxsw_sp_fid *f = mlxsw_sp_vport_fid_get(mlxsw_sp_vport);
Ido Schimmel0355b592016-06-20 23:04:13 +02004477
Ido Schimmel22305372016-06-20 23:04:21 +02004478 netdev_dbg(mlxsw_sp_vport->dev, "Left FID=%d\n", f->fid);
4479
Ido Schimmel0355b592016-06-20 23:04:13 +02004480 mlxsw_sp_vport_fid_map(mlxsw_sp_vport, f->fid, false);
4481
4482 mlxsw_sp_vport_flood_set(mlxsw_sp_vport, f->fid, false);
4483
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02004484 mlxsw_sp_port_fdb_flush(mlxsw_sp_vport, f->fid);
4485
Ido Schimmel41b996c2016-06-20 23:04:17 +02004486 mlxsw_sp_vport_fid_set(mlxsw_sp_vport, NULL);
Ido Schimmel0355b592016-06-20 23:04:13 +02004487 if (--f->ref_count == 0)
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004488 mlxsw_sp_vfid_destroy(mlxsw_sp_vport->mlxsw_sp, f);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004489}
4490
4491static int mlxsw_sp_vport_bridge_join(struct mlxsw_sp_port *mlxsw_sp_vport,
4492 struct net_device *br_dev)
4493{
Ido Schimmel99724c12016-07-04 08:23:14 +02004494 struct mlxsw_sp_fid *f = mlxsw_sp_vport_fid_get(mlxsw_sp_vport);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004495 u16 vid = mlxsw_sp_vport_vid_get(mlxsw_sp_vport);
4496 struct net_device *dev = mlxsw_sp_vport->dev;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004497 int err;
4498
Ido Schimmel99724c12016-07-04 08:23:14 +02004499 if (f && !WARN_ON(!f->leave))
4500 f->leave(mlxsw_sp_vport);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004501
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004502 err = mlxsw_sp_vport_vfid_join(mlxsw_sp_vport, br_dev);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004503 if (err) {
Ido Schimmel0355b592016-06-20 23:04:13 +02004504 netdev_err(dev, "Failed to join vFID\n");
Ido Schimmel99724c12016-07-04 08:23:14 +02004505 return err;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004506 }
4507
4508 err = mlxsw_sp_port_vid_learning_set(mlxsw_sp_vport, vid, true);
4509 if (err) {
4510 netdev_err(dev, "Failed to enable learning\n");
4511 goto err_port_vid_learning_set;
4512 }
4513
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004514 mlxsw_sp_vport->learning = 1;
4515 mlxsw_sp_vport->learning_sync = 1;
4516 mlxsw_sp_vport->uc_flood = 1;
4517 mlxsw_sp_vport->bridged = 1;
4518
4519 return 0;
4520
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004521err_port_vid_learning_set:
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004522 mlxsw_sp_vport_vfid_leave(mlxsw_sp_vport);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004523 return err;
4524}
4525
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02004526static void mlxsw_sp_vport_bridge_leave(struct mlxsw_sp_port *mlxsw_sp_vport)
Ido Schimmel0355b592016-06-20 23:04:13 +02004527{
4528 u16 vid = mlxsw_sp_vport_vid_get(mlxsw_sp_vport);
Ido Schimmel0355b592016-06-20 23:04:13 +02004529
4530 mlxsw_sp_port_vid_learning_set(mlxsw_sp_vport, vid, false);
4531
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004532 mlxsw_sp_vport_vfid_leave(mlxsw_sp_vport);
Ido Schimmel0355b592016-06-20 23:04:13 +02004533
Ido Schimmel0355b592016-06-20 23:04:13 +02004534 mlxsw_sp_vport->learning = 0;
4535 mlxsw_sp_vport->learning_sync = 0;
4536 mlxsw_sp_vport->uc_flood = 0;
4537 mlxsw_sp_vport->bridged = 0;
4538}
4539
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004540static bool
4541mlxsw_sp_port_master_bridge_check(const struct mlxsw_sp_port *mlxsw_sp_port,
4542 const struct net_device *br_dev)
4543{
4544 struct mlxsw_sp_port *mlxsw_sp_vport;
4545
4546 list_for_each_entry(mlxsw_sp_vport, &mlxsw_sp_port->vports_list,
4547 vport.list) {
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004548 struct net_device *dev = mlxsw_sp_vport_dev_get(mlxsw_sp_vport);
Ido Schimmel56918b62016-06-20 23:04:18 +02004549
4550 if (dev && dev == br_dev)
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004551 return false;
4552 }
4553
4554 return true;
4555}
4556
4557static int mlxsw_sp_netdevice_vport_event(struct net_device *dev,
4558 unsigned long event, void *ptr,
4559 u16 vid)
4560{
4561 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
4562 struct netdev_notifier_changeupper_info *info = ptr;
4563 struct mlxsw_sp_port *mlxsw_sp_vport;
4564 struct net_device *upper_dev;
Ido Schimmel80bedf12016-06-20 23:03:59 +02004565 int err = 0;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004566
4567 mlxsw_sp_vport = mlxsw_sp_port_vport_find(mlxsw_sp_port, vid);
4568
4569 switch (event) {
4570 case NETDEV_PRECHANGEUPPER:
4571 upper_dev = info->upper_dev;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004572 if (!netif_is_bridge_master(upper_dev))
Ido Schimmel80bedf12016-06-20 23:03:59 +02004573 return -EINVAL;
Ido Schimmelddbe9932016-06-20 23:04:02 +02004574 if (!info->linking)
4575 break;
Ido Schimmel2f1a56e2018-07-08 14:23:19 +03004576 if (netdev_has_any_upper_dev(upper_dev))
4577 return -EINVAL;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004578 /* We can't have multiple VLAN interfaces configured on
4579 * the same port and being members in the same bridge.
4580 */
4581 if (!mlxsw_sp_port_master_bridge_check(mlxsw_sp_port,
4582 upper_dev))
Ido Schimmel80bedf12016-06-20 23:03:59 +02004583 return -EINVAL;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004584 break;
4585 case NETDEV_CHANGEUPPER:
4586 upper_dev = info->upper_dev;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004587 if (info->linking) {
Ido Schimmel423b9372016-06-20 23:04:03 +02004588 if (WARN_ON(!mlxsw_sp_vport))
Ido Schimmel80bedf12016-06-20 23:03:59 +02004589 return -EINVAL;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004590 err = mlxsw_sp_vport_bridge_join(mlxsw_sp_vport,
4591 upper_dev);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004592 } else {
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004593 if (!mlxsw_sp_vport)
Ido Schimmel80bedf12016-06-20 23:03:59 +02004594 return 0;
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02004595 mlxsw_sp_vport_bridge_leave(mlxsw_sp_vport);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004596 }
4597 }
4598
Ido Schimmel80bedf12016-06-20 23:03:59 +02004599 return err;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004600}
4601
Ido Schimmel272c4472015-12-15 16:03:47 +01004602static int mlxsw_sp_netdevice_lag_vport_event(struct net_device *lag_dev,
4603 unsigned long event, void *ptr,
4604 u16 vid)
4605{
4606 struct net_device *dev;
4607 struct list_head *iter;
4608 int ret;
4609
4610 netdev_for_each_lower_dev(lag_dev, dev, iter) {
4611 if (mlxsw_sp_port_dev_check(dev)) {
4612 ret = mlxsw_sp_netdevice_vport_event(dev, event, ptr,
4613 vid);
Ido Schimmel80bedf12016-06-20 23:03:59 +02004614 if (ret)
Ido Schimmel272c4472015-12-15 16:03:47 +01004615 return ret;
4616 }
4617 }
4618
Ido Schimmel80bedf12016-06-20 23:03:59 +02004619 return 0;
Ido Schimmel272c4472015-12-15 16:03:47 +01004620}
4621
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004622static int mlxsw_sp_netdevice_vlan_event(struct net_device *vlan_dev,
4623 unsigned long event, void *ptr)
4624{
4625 struct net_device *real_dev = vlan_dev_real_dev(vlan_dev);
4626 u16 vid = vlan_dev_vlan_id(vlan_dev);
4627
Ido Schimmel272c4472015-12-15 16:03:47 +01004628 if (mlxsw_sp_port_dev_check(real_dev))
4629 return mlxsw_sp_netdevice_vport_event(real_dev, event, ptr,
4630 vid);
4631 else if (netif_is_lag_master(real_dev))
4632 return mlxsw_sp_netdevice_lag_vport_event(real_dev, event, ptr,
4633 vid);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004634
Ido Schimmel80bedf12016-06-20 23:03:59 +02004635 return 0;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004636}
4637
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004638static int mlxsw_sp_netdevice_event(struct notifier_block *unused,
4639 unsigned long event, void *ptr)
4640{
4641 struct net_device *dev = netdev_notifier_info_to_dev(ptr);
Ido Schimmel80bedf12016-06-20 23:03:59 +02004642 int err = 0;
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004643
Ido Schimmel6e095fd2016-07-04 08:23:13 +02004644 if (event == NETDEV_CHANGEADDR || event == NETDEV_CHANGEMTU)
4645 err = mlxsw_sp_netdevice_router_port_event(dev);
4646 else if (mlxsw_sp_port_dev_check(dev))
Ido Schimmel80bedf12016-06-20 23:03:59 +02004647 err = mlxsw_sp_netdevice_port_event(dev, event, ptr);
4648 else if (netif_is_lag_master(dev))
4649 err = mlxsw_sp_netdevice_lag_event(dev, event, ptr);
Ido Schimmel701b1862016-07-04 08:23:16 +02004650 else if (netif_is_bridge_master(dev))
4651 err = mlxsw_sp_netdevice_bridge_event(dev, event, ptr);
Ido Schimmel80bedf12016-06-20 23:03:59 +02004652 else if (is_vlan_dev(dev))
4653 err = mlxsw_sp_netdevice_vlan_event(dev, event, ptr);
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004654
Ido Schimmel80bedf12016-06-20 23:03:59 +02004655 return notifier_from_errno(err);
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004656}
4657
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004658static struct notifier_block mlxsw_sp_netdevice_nb __read_mostly = {
4659 .notifier_call = mlxsw_sp_netdevice_event,
4660};
4661
Ido Schimmel99724c12016-07-04 08:23:14 +02004662static struct notifier_block mlxsw_sp_inetaddr_nb __read_mostly = {
4663 .notifier_call = mlxsw_sp_inetaddr_event,
4664 .priority = 10, /* Must be called before FIB notifier block */
4665};
4666
Jiri Pirkoe7322632016-09-01 10:37:43 +02004667static struct notifier_block mlxsw_sp_router_netevent_nb __read_mostly = {
4668 .notifier_call = mlxsw_sp_router_netevent_event,
4669};
4670
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004671static int __init mlxsw_sp_module_init(void)
4672{
4673 int err;
4674
4675 register_netdevice_notifier(&mlxsw_sp_netdevice_nb);
Ido Schimmel99724c12016-07-04 08:23:14 +02004676 register_inetaddr_notifier(&mlxsw_sp_inetaddr_nb);
Jiri Pirkoe7322632016-09-01 10:37:43 +02004677 register_netevent_notifier(&mlxsw_sp_router_netevent_nb);
4678
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004679 err = mlxsw_core_driver_register(&mlxsw_sp_driver);
4680 if (err)
4681 goto err_core_driver_register;
4682 return 0;
4683
4684err_core_driver_register:
Jiri Pirkoe7322632016-09-01 10:37:43 +02004685 unregister_netevent_notifier(&mlxsw_sp_router_netevent_nb);
Jiri Pirkode7d6292016-09-01 10:37:42 +02004686 unregister_inetaddr_notifier(&mlxsw_sp_inetaddr_nb);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004687 unregister_netdevice_notifier(&mlxsw_sp_netdevice_nb);
4688 return err;
4689}
4690
4691static void __exit mlxsw_sp_module_exit(void)
4692{
4693 mlxsw_core_driver_unregister(&mlxsw_sp_driver);
Jiri Pirkoe7322632016-09-01 10:37:43 +02004694 unregister_netevent_notifier(&mlxsw_sp_router_netevent_nb);
Ido Schimmel99724c12016-07-04 08:23:14 +02004695 unregister_inetaddr_notifier(&mlxsw_sp_inetaddr_nb);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004696 unregister_netdevice_notifier(&mlxsw_sp_netdevice_nb);
4697}
4698
4699module_init(mlxsw_sp_module_init);
4700module_exit(mlxsw_sp_module_exit);
4701
4702MODULE_LICENSE("Dual BSD/GPL");
4703MODULE_AUTHOR("Jiri Pirko <jiri@mellanox.com>");
4704MODULE_DESCRIPTION("Mellanox Spectrum driver");
4705MODULE_MLXSW_DRIVER_ALIAS(MLXSW_DEVICE_KIND_SPECTRUM);