blob: 16f210e0b8334284723d9ef4e50ee2975edb2b94 [file] [log] [blame]
Kalle Valo5e3dd152013-06-12 20:52:10 +03001/*
2 * Copyright (c) 2005-2011 Atheros Communications Inc.
3 * Copyright (c) 2011-2013 Qualcomm Atheros, Inc.
4 *
5 * Permission to use, copy, modify, and/or distribute this software for any
6 * purpose with or without fee is hereby granted, provided that the above
7 * copyright notice and this permission notice appear in all copies.
8 *
9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
10 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
11 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
12 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
13 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
14 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
15 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
16 */
17
18#include <linux/module.h>
19#include <linux/firmware.h>
Toshi Kikuchi5aabff02014-12-02 10:55:54 +020020#include <linux/of.h>
Kalle Valo5e3dd152013-06-12 20:52:10 +030021
22#include "core.h"
23#include "mac.h"
24#include "htc.h"
25#include "hif.h"
26#include "wmi.h"
27#include "bmi.h"
28#include "debug.h"
29#include "htt.h"
Kalle Valo43d2a302014-09-10 18:23:30 +030030#include "testmode.h"
Kalle Valo5e3dd152013-06-12 20:52:10 +030031
32unsigned int ath10k_debug_mask;
33static bool uart_print;
34static unsigned int ath10k_p2p;
Rajkumar Manoharan8868b122014-11-17 16:44:14 +020035static bool skip_otp;
36
Kalle Valo5e3dd152013-06-12 20:52:10 +030037module_param_named(debug_mask, ath10k_debug_mask, uint, 0644);
38module_param(uart_print, bool, 0644);
39module_param_named(p2p, ath10k_p2p, uint, 0644);
Rajkumar Manoharan8868b122014-11-17 16:44:14 +020040module_param(skip_otp, bool, 0644);
41
Kalle Valo5e3dd152013-06-12 20:52:10 +030042MODULE_PARM_DESC(debug_mask, "Debugging mask");
43MODULE_PARM_DESC(uart_print, "Uart target debugging");
44MODULE_PARM_DESC(p2p, "Enable ath10k P2P support");
Rajkumar Manoharan8868b122014-11-17 16:44:14 +020045MODULE_PARM_DESC(skip_otp, "Skip otp failure for calibration in testmode");
Kalle Valo5e3dd152013-06-12 20:52:10 +030046
47static const struct ath10k_hw_params ath10k_hw_params_list[] = {
48 {
Kalle Valo5e3dd152013-06-12 20:52:10 +030049 .id = QCA988X_HW_2_0_VERSION,
50 .name = "qca988x hw2.0",
51 .patch_load_addr = QCA988X_HW_2_0_PATCH_LOAD_ADDR,
Michal Kazior3a8200b2014-12-02 10:55:55 +020052 .uart_pin = 7,
Kalle Valo5e3dd152013-06-12 20:52:10 +030053 .fw = {
54 .dir = QCA988X_HW_2_0_FW_DIR,
55 .fw = QCA988X_HW_2_0_FW_FILE,
56 .otp = QCA988X_HW_2_0_OTP_FILE,
57 .board = QCA988X_HW_2_0_BOARD_DATA_FILE,
Michal Kazior9764a2a2014-12-02 10:55:54 +020058 .board_size = QCA988X_BOARD_DATA_SZ,
59 .board_ext_size = QCA988X_BOARD_EXT_DATA_SZ,
Kalle Valo5e3dd152013-06-12 20:52:10 +030060 },
61 },
62};
63
64static void ath10k_send_suspend_complete(struct ath10k *ar)
65{
Michal Kazior7aa7a722014-08-25 12:09:38 +020066 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot suspend complete\n");
Kalle Valo5e3dd152013-06-12 20:52:10 +030067
Marek Puzyniak9042e172014-02-10 17:14:23 +010068 complete(&ar->target_suspend);
Kalle Valo5e3dd152013-06-12 20:52:10 +030069}
70
Kalle Valo5e3dd152013-06-12 20:52:10 +030071static int ath10k_init_configure_target(struct ath10k *ar)
72{
73 u32 param_host;
74 int ret;
75
76 /* tell target which HTC version it is used*/
77 ret = ath10k_bmi_write32(ar, hi_app_host_interest,
78 HTC_PROTOCOL_VERSION);
79 if (ret) {
Michal Kazior7aa7a722014-08-25 12:09:38 +020080 ath10k_err(ar, "settings HTC version failed\n");
Kalle Valo5e3dd152013-06-12 20:52:10 +030081 return ret;
82 }
83
84 /* set the firmware mode to STA/IBSS/AP */
85 ret = ath10k_bmi_read32(ar, hi_option_flag, &param_host);
86 if (ret) {
Michal Kazior7aa7a722014-08-25 12:09:38 +020087 ath10k_err(ar, "setting firmware mode (1/2) failed\n");
Kalle Valo5e3dd152013-06-12 20:52:10 +030088 return ret;
89 }
90
91 /* TODO following parameters need to be re-visited. */
92 /* num_device */
93 param_host |= (1 << HI_OPTION_NUM_DEV_SHIFT);
94 /* Firmware mode */
95 /* FIXME: Why FW_MODE_AP ??.*/
96 param_host |= (HI_OPTION_FW_MODE_AP << HI_OPTION_FW_MODE_SHIFT);
97 /* mac_addr_method */
98 param_host |= (1 << HI_OPTION_MAC_ADDR_METHOD_SHIFT);
99 /* firmware_bridge */
100 param_host |= (0 << HI_OPTION_FW_BRIDGE_SHIFT);
101 /* fwsubmode */
102 param_host |= (0 << HI_OPTION_FW_SUBMODE_SHIFT);
103
104 ret = ath10k_bmi_write32(ar, hi_option_flag, param_host);
105 if (ret) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200106 ath10k_err(ar, "setting firmware mode (2/2) failed\n");
Kalle Valo5e3dd152013-06-12 20:52:10 +0300107 return ret;
108 }
109
110 /* We do all byte-swapping on the host */
111 ret = ath10k_bmi_write32(ar, hi_be, 0);
112 if (ret) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200113 ath10k_err(ar, "setting host CPU BE mode failed\n");
Kalle Valo5e3dd152013-06-12 20:52:10 +0300114 return ret;
115 }
116
117 /* FW descriptor/Data swap flags */
118 ret = ath10k_bmi_write32(ar, hi_fw_swap, 0);
119
120 if (ret) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200121 ath10k_err(ar, "setting FW data/desc swap flags failed\n");
Kalle Valo5e3dd152013-06-12 20:52:10 +0300122 return ret;
123 }
124
125 return 0;
126}
127
128static const struct firmware *ath10k_fetch_fw_file(struct ath10k *ar,
129 const char *dir,
130 const char *file)
131{
132 char filename[100];
133 const struct firmware *fw;
134 int ret;
135
136 if (file == NULL)
137 return ERR_PTR(-ENOENT);
138
139 if (dir == NULL)
140 dir = ".";
141
142 snprintf(filename, sizeof(filename), "%s/%s", dir, file);
143 ret = request_firmware(&fw, filename, ar->dev);
144 if (ret)
145 return ERR_PTR(ret);
146
147 return fw;
148}
149
Kalle Valoa58227e2014-10-13 09:40:59 +0300150static int ath10k_push_board_ext_data(struct ath10k *ar, const void *data,
151 size_t data_len)
Kalle Valo5e3dd152013-06-12 20:52:10 +0300152{
Michal Kazior9764a2a2014-12-02 10:55:54 +0200153 u32 board_data_size = ar->hw_params.fw.board_size;
154 u32 board_ext_data_size = ar->hw_params.fw.board_ext_size;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300155 u32 board_ext_data_addr;
156 int ret;
157
158 ret = ath10k_bmi_read32(ar, hi_board_ext_data, &board_ext_data_addr);
159 if (ret) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200160 ath10k_err(ar, "could not read board ext data addr (%d)\n",
161 ret);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300162 return ret;
163 }
164
Michal Kazior7aa7a722014-08-25 12:09:38 +0200165 ath10k_dbg(ar, ATH10K_DBG_BOOT,
Kalle Valoeffea962013-09-08 17:55:44 +0300166 "boot push board extended data addr 0x%x\n",
Kalle Valo5e3dd152013-06-12 20:52:10 +0300167 board_ext_data_addr);
168
169 if (board_ext_data_addr == 0)
170 return 0;
171
Kalle Valoa58227e2014-10-13 09:40:59 +0300172 if (data_len != (board_data_size + board_ext_data_size)) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200173 ath10k_err(ar, "invalid board (ext) data sizes %zu != %d+%d\n",
Kalle Valoa58227e2014-10-13 09:40:59 +0300174 data_len, board_data_size, board_ext_data_size);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300175 return -EINVAL;
176 }
177
178 ret = ath10k_bmi_write_memory(ar, board_ext_data_addr,
Kalle Valoa58227e2014-10-13 09:40:59 +0300179 data + board_data_size,
Kalle Valo5e3dd152013-06-12 20:52:10 +0300180 board_ext_data_size);
181 if (ret) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200182 ath10k_err(ar, "could not write board ext data (%d)\n", ret);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300183 return ret;
184 }
185
186 ret = ath10k_bmi_write32(ar, hi_board_ext_data_config,
187 (board_ext_data_size << 16) | 1);
188 if (ret) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200189 ath10k_err(ar, "could not write board ext data bit (%d)\n",
190 ret);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300191 return ret;
192 }
193
194 return 0;
195}
196
Kalle Valoa58227e2014-10-13 09:40:59 +0300197static int ath10k_download_board_data(struct ath10k *ar, const void *data,
198 size_t data_len)
Kalle Valo5e3dd152013-06-12 20:52:10 +0300199{
Michal Kazior9764a2a2014-12-02 10:55:54 +0200200 u32 board_data_size = ar->hw_params.fw.board_size;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300201 u32 address;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300202 int ret;
203
Kalle Valoa58227e2014-10-13 09:40:59 +0300204 ret = ath10k_push_board_ext_data(ar, data, data_len);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300205 if (ret) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200206 ath10k_err(ar, "could not push board ext data (%d)\n", ret);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300207 goto exit;
208 }
209
210 ret = ath10k_bmi_read32(ar, hi_board_data, &address);
211 if (ret) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200212 ath10k_err(ar, "could not read board data addr (%d)\n", ret);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300213 goto exit;
214 }
215
Kalle Valoa58227e2014-10-13 09:40:59 +0300216 ret = ath10k_bmi_write_memory(ar, address, data,
Kalle Valo958df3a2013-09-27 19:55:01 +0300217 min_t(u32, board_data_size,
Kalle Valoa58227e2014-10-13 09:40:59 +0300218 data_len));
Kalle Valo5e3dd152013-06-12 20:52:10 +0300219 if (ret) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200220 ath10k_err(ar, "could not write board data (%d)\n", ret);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300221 goto exit;
222 }
223
224 ret = ath10k_bmi_write32(ar, hi_board_data_initialized, 1);
225 if (ret) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200226 ath10k_err(ar, "could not write board data bit (%d)\n", ret);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300227 goto exit;
228 }
229
230exit:
Kalle Valo5e3dd152013-06-12 20:52:10 +0300231 return ret;
232}
233
Kalle Valoa58227e2014-10-13 09:40:59 +0300234static int ath10k_download_cal_file(struct ath10k *ar)
235{
236 int ret;
237
238 if (!ar->cal_file)
239 return -ENOENT;
240
241 if (IS_ERR(ar->cal_file))
242 return PTR_ERR(ar->cal_file);
243
244 ret = ath10k_download_board_data(ar, ar->cal_file->data,
245 ar->cal_file->size);
246 if (ret) {
247 ath10k_err(ar, "failed to download cal_file data: %d\n", ret);
248 return ret;
249 }
250
251 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot cal file downloaded\n");
252
253 return 0;
254}
255
Toshi Kikuchi5aabff02014-12-02 10:55:54 +0200256static int ath10k_download_cal_dt(struct ath10k *ar)
257{
258 struct device_node *node;
259 int data_len;
260 void *data;
261 int ret;
262
263 node = ar->dev->of_node;
264 if (!node)
265 /* Device Tree is optional, don't print any warnings if
266 * there's no node for ath10k.
267 */
268 return -ENOENT;
269
270 if (!of_get_property(node, "qcom,ath10k-calibration-data",
271 &data_len)) {
272 /* The calibration data node is optional */
273 return -ENOENT;
274 }
275
276 if (data_len != QCA988X_CAL_DATA_LEN) {
277 ath10k_warn(ar, "invalid calibration data length in DT: %d\n",
278 data_len);
279 ret = -EMSGSIZE;
280 goto out;
281 }
282
283 data = kmalloc(data_len, GFP_KERNEL);
284 if (!data) {
285 ret = -ENOMEM;
286 goto out;
287 }
288
289 ret = of_property_read_u8_array(node, "qcom,ath10k-calibration-data",
290 data, data_len);
291 if (ret) {
292 ath10k_warn(ar, "failed to read calibration data from DT: %d\n",
293 ret);
294 goto out_free;
295 }
296
297 ret = ath10k_download_board_data(ar, data, data_len);
298 if (ret) {
299 ath10k_warn(ar, "failed to download calibration data from Device Tree: %d\n",
300 ret);
301 goto out_free;
302 }
303
304 ret = 0;
305
306out_free:
307 kfree(data);
308
309out:
310 return ret;
311}
312
Kalle Valo5e3dd152013-06-12 20:52:10 +0300313static int ath10k_download_and_run_otp(struct ath10k *ar)
314{
Kalle Valod6d4a582014-03-11 17:33:19 +0200315 u32 result, address = ar->hw_params.patch_load_addr;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300316 int ret;
317
Kalle Valoa58227e2014-10-13 09:40:59 +0300318 ret = ath10k_download_board_data(ar, ar->board_data, ar->board_len);
Kalle Valo83091552014-10-13 09:40:53 +0300319 if (ret) {
320 ath10k_err(ar, "failed to download board data: %d\n", ret);
321 return ret;
322 }
323
Kalle Valo5e3dd152013-06-12 20:52:10 +0300324 /* OTP is optional */
325
Kalle Valo7f06ea12014-03-11 17:33:28 +0200326 if (!ar->otp_data || !ar->otp_len) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200327 ath10k_warn(ar, "Not running otp, calibration will be incorrect (otp-data %p otp_len %zd)!\n",
Ben Greear36a8f412014-03-24 12:20:42 -0700328 ar->otp_data, ar->otp_len);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300329 return 0;
Kalle Valo7f06ea12014-03-11 17:33:28 +0200330 }
331
Michal Kazior7aa7a722014-08-25 12:09:38 +0200332 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot upload otp to 0x%x len %zd\n",
Kalle Valo7f06ea12014-03-11 17:33:28 +0200333 address, ar->otp_len);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300334
Kalle Valo958df3a2013-09-27 19:55:01 +0300335 ret = ath10k_bmi_fast_download(ar, address, ar->otp_data, ar->otp_len);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300336 if (ret) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200337 ath10k_err(ar, "could not write otp (%d)\n", ret);
Kalle Valo7f06ea12014-03-11 17:33:28 +0200338 return ret;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300339 }
340
Kalle Valod6d4a582014-03-11 17:33:19 +0200341 ret = ath10k_bmi_execute(ar, address, 0, &result);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300342 if (ret) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200343 ath10k_err(ar, "could not execute otp (%d)\n", ret);
Kalle Valo7f06ea12014-03-11 17:33:28 +0200344 return ret;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300345 }
346
Michal Kazior7aa7a722014-08-25 12:09:38 +0200347 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot otp execute result %d\n", result);
Kalle Valo7f06ea12014-03-11 17:33:28 +0200348
Rajkumar Manoharan8868b122014-11-17 16:44:14 +0200349 if (!skip_otp && result != 0) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200350 ath10k_err(ar, "otp calibration failed: %d", result);
Kalle Valo7f06ea12014-03-11 17:33:28 +0200351 return -EINVAL;
352 }
353
354 return 0;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300355}
356
Kalle Valo43d2a302014-09-10 18:23:30 +0300357static int ath10k_download_fw(struct ath10k *ar, enum ath10k_firmware_mode mode)
Kalle Valo5e3dd152013-06-12 20:52:10 +0300358{
Kalle Valo43d2a302014-09-10 18:23:30 +0300359 u32 address, data_len;
360 const char *mode_name;
361 const void *data;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300362 int ret;
363
Kalle Valo5e3dd152013-06-12 20:52:10 +0300364 address = ar->hw_params.patch_load_addr;
365
Kalle Valo43d2a302014-09-10 18:23:30 +0300366 switch (mode) {
367 case ATH10K_FIRMWARE_MODE_NORMAL:
368 data = ar->firmware_data;
369 data_len = ar->firmware_len;
370 mode_name = "normal";
371 break;
372 case ATH10K_FIRMWARE_MODE_UTF:
373 data = ar->testmode.utf->data;
374 data_len = ar->testmode.utf->size;
375 mode_name = "utf";
376 break;
377 default:
378 ath10k_err(ar, "unknown firmware mode: %d\n", mode);
379 return -EINVAL;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300380 }
381
Kalle Valo43d2a302014-09-10 18:23:30 +0300382 ath10k_dbg(ar, ATH10K_DBG_BOOT,
383 "boot uploading firmware image %p len %d mode %s\n",
384 data, data_len, mode_name);
385
386 ret = ath10k_bmi_fast_download(ar, address, data, data_len);
387 if (ret) {
388 ath10k_err(ar, "failed to download %s firmware: %d\n",
389 mode_name, ret);
390 return ret;
391 }
392
Michal Kazior29385052013-07-16 09:38:58 +0200393 return ret;
394}
395
396static void ath10k_core_free_firmware_files(struct ath10k *ar)
397{
Kalle Valo36527912013-09-27 19:54:55 +0300398 if (ar->board && !IS_ERR(ar->board))
399 release_firmware(ar->board);
Michal Kazior29385052013-07-16 09:38:58 +0200400
401 if (ar->otp && !IS_ERR(ar->otp))
402 release_firmware(ar->otp);
403
404 if (ar->firmware && !IS_ERR(ar->firmware))
405 release_firmware(ar->firmware);
406
Kalle Valoa58227e2014-10-13 09:40:59 +0300407 if (ar->cal_file && !IS_ERR(ar->cal_file))
408 release_firmware(ar->cal_file);
409
Kalle Valo36527912013-09-27 19:54:55 +0300410 ar->board = NULL;
Kalle Valo958df3a2013-09-27 19:55:01 +0300411 ar->board_data = NULL;
412 ar->board_len = 0;
413
Michal Kazior29385052013-07-16 09:38:58 +0200414 ar->otp = NULL;
Kalle Valo958df3a2013-09-27 19:55:01 +0300415 ar->otp_data = NULL;
416 ar->otp_len = 0;
417
Michal Kazior29385052013-07-16 09:38:58 +0200418 ar->firmware = NULL;
Kalle Valo958df3a2013-09-27 19:55:01 +0300419 ar->firmware_data = NULL;
420 ar->firmware_len = 0;
Kalle Valoa58227e2014-10-13 09:40:59 +0300421
422 ar->cal_file = NULL;
423}
424
425static int ath10k_fetch_cal_file(struct ath10k *ar)
426{
427 char filename[100];
428
429 /* cal-<bus>-<id>.bin */
430 scnprintf(filename, sizeof(filename), "cal-%s-%s.bin",
431 ath10k_bus_str(ar->hif.bus), dev_name(ar->dev));
432
433 ar->cal_file = ath10k_fetch_fw_file(ar, ATH10K_FW_DIR, filename);
434 if (IS_ERR(ar->cal_file))
435 /* calibration file is optional, don't print any warnings */
436 return PTR_ERR(ar->cal_file);
437
438 ath10k_dbg(ar, ATH10K_DBG_BOOT, "found calibration file %s/%s\n",
439 ATH10K_FW_DIR, filename);
440
441 return 0;
Michal Kazior29385052013-07-16 09:38:58 +0200442}
443
Kalle Valo1a222432013-09-27 19:55:07 +0300444static int ath10k_core_fetch_firmware_api_1(struct ath10k *ar)
Michal Kazior29385052013-07-16 09:38:58 +0200445{
446 int ret = 0;
447
448 if (ar->hw_params.fw.fw == NULL) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200449 ath10k_err(ar, "firmware file not defined\n");
Michal Kazior29385052013-07-16 09:38:58 +0200450 return -EINVAL;
451 }
452
453 if (ar->hw_params.fw.board == NULL) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200454 ath10k_err(ar, "board data file not defined");
Michal Kazior29385052013-07-16 09:38:58 +0200455 return -EINVAL;
456 }
457
Kalle Valo36527912013-09-27 19:54:55 +0300458 ar->board = ath10k_fetch_fw_file(ar,
459 ar->hw_params.fw.dir,
460 ar->hw_params.fw.board);
461 if (IS_ERR(ar->board)) {
462 ret = PTR_ERR(ar->board);
Michal Kazior7aa7a722014-08-25 12:09:38 +0200463 ath10k_err(ar, "could not fetch board data (%d)\n", ret);
Michal Kazior29385052013-07-16 09:38:58 +0200464 goto err;
465 }
466
Kalle Valo958df3a2013-09-27 19:55:01 +0300467 ar->board_data = ar->board->data;
468 ar->board_len = ar->board->size;
469
Michal Kazior29385052013-07-16 09:38:58 +0200470 ar->firmware = ath10k_fetch_fw_file(ar,
471 ar->hw_params.fw.dir,
472 ar->hw_params.fw.fw);
473 if (IS_ERR(ar->firmware)) {
474 ret = PTR_ERR(ar->firmware);
Michal Kazior7aa7a722014-08-25 12:09:38 +0200475 ath10k_err(ar, "could not fetch firmware (%d)\n", ret);
Michal Kazior29385052013-07-16 09:38:58 +0200476 goto err;
477 }
478
Kalle Valo958df3a2013-09-27 19:55:01 +0300479 ar->firmware_data = ar->firmware->data;
480 ar->firmware_len = ar->firmware->size;
481
Michal Kazior29385052013-07-16 09:38:58 +0200482 /* OTP may be undefined. If so, don't fetch it at all */
483 if (ar->hw_params.fw.otp == NULL)
484 return 0;
485
486 ar->otp = ath10k_fetch_fw_file(ar,
487 ar->hw_params.fw.dir,
488 ar->hw_params.fw.otp);
489 if (IS_ERR(ar->otp)) {
490 ret = PTR_ERR(ar->otp);
Michal Kazior7aa7a722014-08-25 12:09:38 +0200491 ath10k_err(ar, "could not fetch otp (%d)\n", ret);
Michal Kazior29385052013-07-16 09:38:58 +0200492 goto err;
493 }
494
Kalle Valo958df3a2013-09-27 19:55:01 +0300495 ar->otp_data = ar->otp->data;
496 ar->otp_len = ar->otp->size;
497
Michal Kazior29385052013-07-16 09:38:58 +0200498 return 0;
499
500err:
501 ath10k_core_free_firmware_files(ar);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300502 return ret;
503}
504
Kalle Valo1a222432013-09-27 19:55:07 +0300505static int ath10k_core_fetch_firmware_api_n(struct ath10k *ar, const char *name)
506{
507 size_t magic_len, len, ie_len;
508 int ie_id, i, index, bit, ret;
509 struct ath10k_fw_ie *hdr;
510 const u8 *data;
Kalle Valo202e86e2014-12-03 10:10:08 +0200511 __le32 *timestamp, *version;
Kalle Valo1a222432013-09-27 19:55:07 +0300512
513 /* first fetch the firmware file (firmware-*.bin) */
514 ar->firmware = ath10k_fetch_fw_file(ar, ar->hw_params.fw.dir, name);
515 if (IS_ERR(ar->firmware)) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200516 ath10k_err(ar, "could not fetch firmware file '%s/%s': %ld\n",
Ben Greear53c02282014-03-24 12:20:41 -0700517 ar->hw_params.fw.dir, name, PTR_ERR(ar->firmware));
Kalle Valo1a222432013-09-27 19:55:07 +0300518 return PTR_ERR(ar->firmware);
519 }
520
521 data = ar->firmware->data;
522 len = ar->firmware->size;
523
524 /* magic also includes the null byte, check that as well */
525 magic_len = strlen(ATH10K_FIRMWARE_MAGIC) + 1;
526
527 if (len < magic_len) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200528 ath10k_err(ar, "firmware file '%s/%s' too small to contain magic: %zu\n",
Ben Greear53c02282014-03-24 12:20:41 -0700529 ar->hw_params.fw.dir, name, len);
Michal Kazior9bab1cc2013-10-04 08:13:20 +0200530 ret = -EINVAL;
531 goto err;
Kalle Valo1a222432013-09-27 19:55:07 +0300532 }
533
534 if (memcmp(data, ATH10K_FIRMWARE_MAGIC, magic_len) != 0) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200535 ath10k_err(ar, "invalid firmware magic\n");
Michal Kazior9bab1cc2013-10-04 08:13:20 +0200536 ret = -EINVAL;
537 goto err;
Kalle Valo1a222432013-09-27 19:55:07 +0300538 }
539
540 /* jump over the padding */
541 magic_len = ALIGN(magic_len, 4);
542
543 len -= magic_len;
544 data += magic_len;
545
546 /* loop elements */
547 while (len > sizeof(struct ath10k_fw_ie)) {
548 hdr = (struct ath10k_fw_ie *)data;
549
550 ie_id = le32_to_cpu(hdr->id);
551 ie_len = le32_to_cpu(hdr->len);
552
553 len -= sizeof(*hdr);
554 data += sizeof(*hdr);
555
556 if (len < ie_len) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200557 ath10k_err(ar, "invalid length for FW IE %d (%zu < %zu)\n",
Kalle Valo1a222432013-09-27 19:55:07 +0300558 ie_id, len, ie_len);
Michal Kazior9bab1cc2013-10-04 08:13:20 +0200559 ret = -EINVAL;
560 goto err;
Kalle Valo1a222432013-09-27 19:55:07 +0300561 }
562
563 switch (ie_id) {
564 case ATH10K_FW_IE_FW_VERSION:
565 if (ie_len > sizeof(ar->hw->wiphy->fw_version) - 1)
566 break;
567
568 memcpy(ar->hw->wiphy->fw_version, data, ie_len);
569 ar->hw->wiphy->fw_version[ie_len] = '\0';
570
Michal Kazior7aa7a722014-08-25 12:09:38 +0200571 ath10k_dbg(ar, ATH10K_DBG_BOOT,
Kalle Valo1a222432013-09-27 19:55:07 +0300572 "found fw version %s\n",
573 ar->hw->wiphy->fw_version);
574 break;
575 case ATH10K_FW_IE_TIMESTAMP:
576 if (ie_len != sizeof(u32))
577 break;
578
579 timestamp = (__le32 *)data;
580
Michal Kazior7aa7a722014-08-25 12:09:38 +0200581 ath10k_dbg(ar, ATH10K_DBG_BOOT, "found fw timestamp %d\n",
Kalle Valo1a222432013-09-27 19:55:07 +0300582 le32_to_cpup(timestamp));
583 break;
584 case ATH10K_FW_IE_FEATURES:
Michal Kazior7aa7a722014-08-25 12:09:38 +0200585 ath10k_dbg(ar, ATH10K_DBG_BOOT,
Kalle Valo1a222432013-09-27 19:55:07 +0300586 "found firmware features ie (%zd B)\n",
587 ie_len);
588
589 for (i = 0; i < ATH10K_FW_FEATURE_COUNT; i++) {
590 index = i / 8;
591 bit = i % 8;
592
593 if (index == ie_len)
594 break;
595
Ben Greearf591a1a2014-02-04 19:51:38 +0200596 if (data[index] & (1 << bit)) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200597 ath10k_dbg(ar, ATH10K_DBG_BOOT,
Ben Greearf591a1a2014-02-04 19:51:38 +0200598 "Enabling feature bit: %i\n",
599 i);
Kalle Valo1a222432013-09-27 19:55:07 +0300600 __set_bit(i, ar->fw_features);
Ben Greearf591a1a2014-02-04 19:51:38 +0200601 }
Kalle Valo1a222432013-09-27 19:55:07 +0300602 }
603
Michal Kazior7aa7a722014-08-25 12:09:38 +0200604 ath10k_dbg_dump(ar, ATH10K_DBG_BOOT, "features", "",
Kalle Valo1a222432013-09-27 19:55:07 +0300605 ar->fw_features,
606 sizeof(ar->fw_features));
607 break;
608 case ATH10K_FW_IE_FW_IMAGE:
Michal Kazior7aa7a722014-08-25 12:09:38 +0200609 ath10k_dbg(ar, ATH10K_DBG_BOOT,
Kalle Valo1a222432013-09-27 19:55:07 +0300610 "found fw image ie (%zd B)\n",
611 ie_len);
612
613 ar->firmware_data = data;
614 ar->firmware_len = ie_len;
615
616 break;
617 case ATH10K_FW_IE_OTP_IMAGE:
Michal Kazior7aa7a722014-08-25 12:09:38 +0200618 ath10k_dbg(ar, ATH10K_DBG_BOOT,
Kalle Valo1a222432013-09-27 19:55:07 +0300619 "found otp image ie (%zd B)\n",
620 ie_len);
621
622 ar->otp_data = data;
623 ar->otp_len = ie_len;
624
625 break;
Kalle Valo202e86e2014-12-03 10:10:08 +0200626 case ATH10K_FW_IE_WMI_OP_VERSION:
627 if (ie_len != sizeof(u32))
628 break;
629
630 version = (__le32 *)data;
631
632 ar->wmi.op_version = le32_to_cpup(version);
633
634 ath10k_dbg(ar, ATH10K_DBG_BOOT, "found fw ie wmi op version %d\n",
635 ar->wmi.op_version);
636 break;
Kalle Valo1a222432013-09-27 19:55:07 +0300637 default:
Michal Kazior7aa7a722014-08-25 12:09:38 +0200638 ath10k_warn(ar, "Unknown FW IE: %u\n",
Kalle Valo1a222432013-09-27 19:55:07 +0300639 le32_to_cpu(hdr->id));
640 break;
641 }
642
643 /* jump over the padding */
644 ie_len = ALIGN(ie_len, 4);
645
646 len -= ie_len;
647 data += ie_len;
Fengguang Wue05634e2013-10-08 21:48:15 +0300648 }
Kalle Valo1a222432013-09-27 19:55:07 +0300649
650 if (!ar->firmware_data || !ar->firmware_len) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200651 ath10k_warn(ar, "No ATH10K_FW_IE_FW_IMAGE found from '%s/%s', skipping\n",
Ben Greear53c02282014-03-24 12:20:41 -0700652 ar->hw_params.fw.dir, name);
Kalle Valo1a222432013-09-27 19:55:07 +0300653 ret = -ENOMEDIUM;
654 goto err;
655 }
656
657 /* now fetch the board file */
658 if (ar->hw_params.fw.board == NULL) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200659 ath10k_err(ar, "board data file not defined");
Kalle Valo1a222432013-09-27 19:55:07 +0300660 ret = -EINVAL;
661 goto err;
662 }
663
664 ar->board = ath10k_fetch_fw_file(ar,
665 ar->hw_params.fw.dir,
666 ar->hw_params.fw.board);
667 if (IS_ERR(ar->board)) {
668 ret = PTR_ERR(ar->board);
Michal Kazior7aa7a722014-08-25 12:09:38 +0200669 ath10k_err(ar, "could not fetch board data '%s/%s' (%d)\n",
Ben Greear53c02282014-03-24 12:20:41 -0700670 ar->hw_params.fw.dir, ar->hw_params.fw.board,
671 ret);
Kalle Valo1a222432013-09-27 19:55:07 +0300672 goto err;
673 }
674
675 ar->board_data = ar->board->data;
676 ar->board_len = ar->board->size;
677
678 return 0;
679
680err:
681 ath10k_core_free_firmware_files(ar);
682 return ret;
683}
684
685static int ath10k_core_fetch_firmware_files(struct ath10k *ar)
686{
687 int ret;
688
Kalle Valoa58227e2014-10-13 09:40:59 +0300689 /* calibration file is optional, don't check for any errors */
690 ath10k_fetch_cal_file(ar);
691
Michal Kazior24c88f72014-07-25 13:32:17 +0200692 ar->fw_api = 3;
Michal Kazior7aa7a722014-08-25 12:09:38 +0200693 ath10k_dbg(ar, ATH10K_DBG_BOOT, "trying fw api %d\n", ar->fw_api);
Michal Kazior24c88f72014-07-25 13:32:17 +0200694
695 ret = ath10k_core_fetch_firmware_api_n(ar, ATH10K_FW_API3_FILE);
696 if (ret == 0)
697 goto success;
698
Ben Greear53c02282014-03-24 12:20:41 -0700699 ar->fw_api = 2;
Michal Kazior7aa7a722014-08-25 12:09:38 +0200700 ath10k_dbg(ar, ATH10K_DBG_BOOT, "trying fw api %d\n", ar->fw_api);
Ben Greear53c02282014-03-24 12:20:41 -0700701
Kalle Valo1a222432013-09-27 19:55:07 +0300702 ret = ath10k_core_fetch_firmware_api_n(ar, ATH10K_FW_API2_FILE);
Ben Greear53c02282014-03-24 12:20:41 -0700703 if (ret == 0)
704 goto success;
705
706 ar->fw_api = 1;
Michal Kazior7aa7a722014-08-25 12:09:38 +0200707 ath10k_dbg(ar, ATH10K_DBG_BOOT, "trying fw api %d\n", ar->fw_api);
Kalle Valo1a222432013-09-27 19:55:07 +0300708
709 ret = ath10k_core_fetch_firmware_api_1(ar);
710 if (ret)
711 return ret;
712
Ben Greear53c02282014-03-24 12:20:41 -0700713success:
Michal Kazior7aa7a722014-08-25 12:09:38 +0200714 ath10k_dbg(ar, ATH10K_DBG_BOOT, "using fw api %d\n", ar->fw_api);
Kalle Valo1a222432013-09-27 19:55:07 +0300715
716 return 0;
717}
718
Kalle Valo83091552014-10-13 09:40:53 +0300719static int ath10k_download_cal_data(struct ath10k *ar)
Kalle Valo5e3dd152013-06-12 20:52:10 +0300720{
721 int ret;
722
Kalle Valoa58227e2014-10-13 09:40:59 +0300723 ret = ath10k_download_cal_file(ar);
724 if (ret == 0) {
725 ar->cal_mode = ATH10K_CAL_MODE_FILE;
726 goto done;
727 }
728
729 ath10k_dbg(ar, ATH10K_DBG_BOOT,
Toshi Kikuchi5aabff02014-12-02 10:55:54 +0200730 "boot did not find a calibration file, try DT next: %d\n",
731 ret);
732
733 ret = ath10k_download_cal_dt(ar);
734 if (ret == 0) {
735 ar->cal_mode = ATH10K_CAL_MODE_DT;
736 goto done;
737 }
738
739 ath10k_dbg(ar, ATH10K_DBG_BOOT,
740 "boot did not find DT entry, try OTP next: %d\n",
Kalle Valoa58227e2014-10-13 09:40:59 +0300741 ret);
742
Kalle Valo5e3dd152013-06-12 20:52:10 +0300743 ret = ath10k_download_and_run_otp(ar);
Ben Greear36a8f412014-03-24 12:20:42 -0700744 if (ret) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200745 ath10k_err(ar, "failed to run otp: %d\n", ret);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300746 return ret;
Ben Greear36a8f412014-03-24 12:20:42 -0700747 }
Kalle Valo5e3dd152013-06-12 20:52:10 +0300748
Kalle Valoa58227e2014-10-13 09:40:59 +0300749 ar->cal_mode = ATH10K_CAL_MODE_OTP;
750
751done:
752 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot using calibration mode %s\n",
753 ath10k_cal_mode_str(ar->cal_mode));
754 return 0;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300755}
756
757static int ath10k_init_uart(struct ath10k *ar)
758{
759 int ret;
760
761 /*
762 * Explicitly setting UART prints to zero as target turns it on
763 * based on scratch registers.
764 */
765 ret = ath10k_bmi_write32(ar, hi_serial_enable, 0);
766 if (ret) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200767 ath10k_warn(ar, "could not disable UART prints (%d)\n", ret);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300768 return ret;
769 }
770
Kalle Valoc8c39af2013-11-20 10:00:41 +0200771 if (!uart_print)
Kalle Valo5e3dd152013-06-12 20:52:10 +0300772 return 0;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300773
Michal Kazior3a8200b2014-12-02 10:55:55 +0200774 ret = ath10k_bmi_write32(ar, hi_dbg_uart_txpin, ar->hw_params.uart_pin);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300775 if (ret) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200776 ath10k_warn(ar, "could not enable UART prints (%d)\n", ret);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300777 return ret;
778 }
779
780 ret = ath10k_bmi_write32(ar, hi_serial_enable, 1);
781 if (ret) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200782 ath10k_warn(ar, "could not enable UART prints (%d)\n", ret);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300783 return ret;
784 }
785
Bartosz Markowski03fc1372013-09-03 14:24:02 +0200786 /* Set the UART baud rate to 19200. */
787 ret = ath10k_bmi_write32(ar, hi_desired_baud_rate, 19200);
788 if (ret) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200789 ath10k_warn(ar, "could not set the baud rate (%d)\n", ret);
Bartosz Markowski03fc1372013-09-03 14:24:02 +0200790 return ret;
791 }
792
Michal Kazior7aa7a722014-08-25 12:09:38 +0200793 ath10k_info(ar, "UART prints enabled\n");
Kalle Valo5e3dd152013-06-12 20:52:10 +0300794 return 0;
795}
796
797static int ath10k_init_hw_params(struct ath10k *ar)
798{
799 const struct ath10k_hw_params *uninitialized_var(hw_params);
800 int i;
801
802 for (i = 0; i < ARRAY_SIZE(ath10k_hw_params_list); i++) {
803 hw_params = &ath10k_hw_params_list[i];
804
805 if (hw_params->id == ar->target_version)
806 break;
807 }
808
809 if (i == ARRAY_SIZE(ath10k_hw_params_list)) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200810 ath10k_err(ar, "Unsupported hardware version: 0x%x\n",
Kalle Valo5e3dd152013-06-12 20:52:10 +0300811 ar->target_version);
812 return -EINVAL;
813 }
814
815 ar->hw_params = *hw_params;
816
Michal Kazior7aa7a722014-08-25 12:09:38 +0200817 ath10k_dbg(ar, ATH10K_DBG_BOOT, "Hardware name %s version 0x%x\n",
Kalle Valoc8c39af2013-11-20 10:00:41 +0200818 ar->hw_params.name, ar->target_version);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300819
820 return 0;
821}
822
Michal Kazioraffd3212013-07-16 09:54:35 +0200823static void ath10k_core_restart(struct work_struct *work)
824{
825 struct ath10k *ar = container_of(work, struct ath10k, restart_work);
826
Michal Kazior7962b0d2014-10-28 10:34:38 +0100827 set_bit(ATH10K_FLAG_CRASH_FLUSH, &ar->dev_flags);
828
829 /* Place a barrier to make sure the compiler doesn't reorder
830 * CRASH_FLUSH and calling other functions.
831 */
832 barrier();
833
834 ieee80211_stop_queues(ar->hw);
835 ath10k_drain_tx(ar);
836 complete_all(&ar->scan.started);
837 complete_all(&ar->scan.completed);
838 complete_all(&ar->scan.on_channel);
839 complete_all(&ar->offchan_tx_completed);
840 complete_all(&ar->install_key_done);
841 complete_all(&ar->vdev_setup_done);
842 wake_up(&ar->htt.empty_tx_wq);
843 wake_up(&ar->wmi.tx_credits_wq);
844 wake_up(&ar->peer_mapping_wq);
845
Michal Kazioraffd3212013-07-16 09:54:35 +0200846 mutex_lock(&ar->conf_mutex);
847
848 switch (ar->state) {
849 case ATH10K_STATE_ON:
Michal Kazioraffd3212013-07-16 09:54:35 +0200850 ar->state = ATH10K_STATE_RESTARTING;
Michal Kazior61e9aab2014-08-22 14:33:18 +0200851 ath10k_hif_stop(ar);
Michal Kazior5c81c7f2014-08-05 14:54:44 +0200852 ath10k_scan_finish(ar);
Michal Kazioraffd3212013-07-16 09:54:35 +0200853 ieee80211_restart_hw(ar->hw);
854 break;
855 case ATH10K_STATE_OFF:
Michal Kazior5e90de82013-10-16 16:46:05 +0300856 /* this can happen if driver is being unloaded
857 * or if the crash happens during FW probing */
Michal Kazior7aa7a722014-08-25 12:09:38 +0200858 ath10k_warn(ar, "cannot restart a device that hasn't been started\n");
Michal Kazioraffd3212013-07-16 09:54:35 +0200859 break;
860 case ATH10K_STATE_RESTARTING:
Michal Kaziorc5058f52014-05-26 12:46:03 +0300861 /* hw restart might be requested from multiple places */
862 break;
Michal Kazioraffd3212013-07-16 09:54:35 +0200863 case ATH10K_STATE_RESTARTED:
864 ar->state = ATH10K_STATE_WEDGED;
865 /* fall through */
866 case ATH10K_STATE_WEDGED:
Michal Kazior7aa7a722014-08-25 12:09:38 +0200867 ath10k_warn(ar, "device is wedged, will not restart\n");
Michal Kazioraffd3212013-07-16 09:54:35 +0200868 break;
Kalle Valo43d2a302014-09-10 18:23:30 +0300869 case ATH10K_STATE_UTF:
870 ath10k_warn(ar, "firmware restart in UTF mode not supported\n");
871 break;
Michal Kazioraffd3212013-07-16 09:54:35 +0200872 }
873
874 mutex_unlock(&ar->conf_mutex);
875}
876
Kalle Valo5f2144d2014-12-03 10:09:59 +0200877static int ath10k_core_init_firmware_features(struct ath10k *ar)
Michal Kaziorcfd10612014-11-25 15:16:05 +0100878{
Kalle Valo5f2144d2014-12-03 10:09:59 +0200879 if (test_bit(ATH10K_FW_FEATURE_WMI_10_2, ar->fw_features) &&
880 !test_bit(ATH10K_FW_FEATURE_WMI_10X, ar->fw_features)) {
881 ath10k_err(ar, "feature bits corrupted: 10.2 feature requires 10.x feature to be set as well");
882 return -EINVAL;
883 }
884
Kalle Valo202e86e2014-12-03 10:10:08 +0200885 if (ar->wmi.op_version >= ATH10K_FW_WMI_OP_VERSION_MAX) {
886 ath10k_err(ar, "unsupported WMI OP version (max %d): %d\n",
887 ATH10K_FW_WMI_OP_VERSION_MAX, ar->wmi.op_version);
888 return -EINVAL;
889 }
890
891 /* Backwards compatibility for firmwares without
892 * ATH10K_FW_IE_WMI_OP_VERSION.
893 */
894 if (ar->wmi.op_version == ATH10K_FW_WMI_OP_VERSION_UNSET) {
895 if (test_bit(ATH10K_FW_FEATURE_WMI_10X, ar->fw_features)) {
896 if (test_bit(ATH10K_FW_FEATURE_WMI_10_2, ar->fw_features))
897 ar->wmi.op_version = ATH10K_FW_WMI_OP_VERSION_10_2;
898 else
899 ar->wmi.op_version = ATH10K_FW_WMI_OP_VERSION_10_1;
900 } else {
901 ar->wmi.op_version = ATH10K_FW_WMI_OP_VERSION_MAIN;
902 }
903 }
904
905 switch (ar->wmi.op_version) {
906 case ATH10K_FW_WMI_OP_VERSION_MAIN:
Michal Kaziorcfd10612014-11-25 15:16:05 +0100907 ar->max_num_peers = TARGET_NUM_PEERS;
908 ar->max_num_stations = TARGET_NUM_STATIONS;
Kalle Valo202e86e2014-12-03 10:10:08 +0200909 break;
910 case ATH10K_FW_WMI_OP_VERSION_10_1:
911 case ATH10K_FW_WMI_OP_VERSION_10_2:
912 ar->max_num_peers = TARGET_10X_NUM_PEERS;
913 ar->max_num_stations = TARGET_10X_NUM_STATIONS;
914 break;
915 case ATH10K_FW_WMI_OP_VERSION_UNSET:
916 case ATH10K_FW_WMI_OP_VERSION_MAX:
917 WARN_ON(1);
918 return -EINVAL;
Michal Kaziorcfd10612014-11-25 15:16:05 +0100919 }
Kalle Valo5f2144d2014-12-03 10:09:59 +0200920
921 return 0;
Michal Kaziorcfd10612014-11-25 15:16:05 +0100922}
923
Kalle Valo43d2a302014-09-10 18:23:30 +0300924int ath10k_core_start(struct ath10k *ar, enum ath10k_firmware_mode mode)
Kalle Valo5e3dd152013-06-12 20:52:10 +0300925{
Kalle Valo5e3dd152013-06-12 20:52:10 +0300926 int status;
927
Kalle Valo60631c52013-10-08 21:45:25 +0300928 lockdep_assert_held(&ar->conf_mutex);
929
Michal Kazior7962b0d2014-10-28 10:34:38 +0100930 clear_bit(ATH10K_FLAG_CRASH_FLUSH, &ar->dev_flags);
931
Michal Kazior64d151d2013-07-16 09:38:53 +0200932 ath10k_bmi_start(ar);
933
Kalle Valo5e3dd152013-06-12 20:52:10 +0300934 if (ath10k_init_configure_target(ar)) {
935 status = -EINVAL;
936 goto err;
937 }
938
Kalle Valo83091552014-10-13 09:40:53 +0300939 status = ath10k_download_cal_data(ar);
940 if (status)
941 goto err;
942
943 status = ath10k_download_fw(ar, mode);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300944 if (status)
945 goto err;
946
947 status = ath10k_init_uart(ar);
948 if (status)
949 goto err;
950
Michal Kaziorcd003fa2013-07-05 16:15:13 +0300951 ar->htc.htc_ops.target_send_suspend_complete =
952 ath10k_send_suspend_complete;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300953
Michal Kaziorcd003fa2013-07-05 16:15:13 +0300954 status = ath10k_htc_init(ar);
955 if (status) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200956 ath10k_err(ar, "could not init HTC (%d)\n", status);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300957 goto err;
958 }
959
960 status = ath10k_bmi_done(ar);
961 if (status)
Michal Kaziorcd003fa2013-07-05 16:15:13 +0300962 goto err;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300963
964 status = ath10k_wmi_attach(ar);
965 if (status) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200966 ath10k_err(ar, "WMI attach failed: %d\n", status);
Michal Kaziorcd003fa2013-07-05 16:15:13 +0300967 goto err;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300968 }
969
Michal Kazior95bf21f2014-05-16 17:15:39 +0300970 status = ath10k_htt_init(ar);
971 if (status) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200972 ath10k_err(ar, "failed to init htt: %d\n", status);
Michal Kazior95bf21f2014-05-16 17:15:39 +0300973 goto err_wmi_detach;
974 }
975
976 status = ath10k_htt_tx_alloc(&ar->htt);
977 if (status) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200978 ath10k_err(ar, "failed to alloc htt tx: %d\n", status);
Michal Kazior95bf21f2014-05-16 17:15:39 +0300979 goto err_wmi_detach;
980 }
981
982 status = ath10k_htt_rx_alloc(&ar->htt);
983 if (status) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200984 ath10k_err(ar, "failed to alloc htt rx: %d\n", status);
Michal Kazior95bf21f2014-05-16 17:15:39 +0300985 goto err_htt_tx_detach;
986 }
987
Michal Kazior67e3c632013-11-08 08:05:18 +0100988 status = ath10k_hif_start(ar);
989 if (status) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200990 ath10k_err(ar, "could not start HIF: %d\n", status);
Michal Kazior95bf21f2014-05-16 17:15:39 +0300991 goto err_htt_rx_detach;
Michal Kazior67e3c632013-11-08 08:05:18 +0100992 }
993
994 status = ath10k_htc_wait_target(&ar->htc);
995 if (status) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200996 ath10k_err(ar, "failed to connect to HTC: %d\n", status);
Michal Kazior67e3c632013-11-08 08:05:18 +0100997 goto err_hif_stop;
998 }
Kalle Valo5e3dd152013-06-12 20:52:10 +0300999
Kalle Valo43d2a302014-09-10 18:23:30 +03001000 if (mode == ATH10K_FIRMWARE_MODE_NORMAL) {
1001 status = ath10k_htt_connect(&ar->htt);
1002 if (status) {
1003 ath10k_err(ar, "failed to connect htt (%d)\n", status);
1004 goto err_hif_stop;
1005 }
Kalle Valo5e3dd152013-06-12 20:52:10 +03001006 }
1007
Michal Kazior95bf21f2014-05-16 17:15:39 +03001008 status = ath10k_wmi_connect(ar);
1009 if (status) {
Michal Kazior7aa7a722014-08-25 12:09:38 +02001010 ath10k_err(ar, "could not connect wmi: %d\n", status);
Michal Kazior95bf21f2014-05-16 17:15:39 +03001011 goto err_hif_stop;
1012 }
1013
1014 status = ath10k_htc_start(&ar->htc);
1015 if (status) {
Michal Kazior7aa7a722014-08-25 12:09:38 +02001016 ath10k_err(ar, "failed to start htc: %d\n", status);
Michal Kazior95bf21f2014-05-16 17:15:39 +03001017 goto err_hif_stop;
1018 }
1019
Kalle Valo43d2a302014-09-10 18:23:30 +03001020 if (mode == ATH10K_FIRMWARE_MODE_NORMAL) {
1021 status = ath10k_wmi_wait_for_service_ready(ar);
1022 if (status <= 0) {
1023 ath10k_warn(ar, "wmi service ready event not received");
1024 status = -ETIMEDOUT;
1025 goto err_hif_stop;
1026 }
Michal Kazior95bf21f2014-05-16 17:15:39 +03001027 }
Kalle Valo5e3dd152013-06-12 20:52:10 +03001028
Michal Kazior7aa7a722014-08-25 12:09:38 +02001029 ath10k_dbg(ar, ATH10K_DBG_BOOT, "firmware %s booted\n",
Kalle Valoc8c39af2013-11-20 10:00:41 +02001030 ar->hw->wiphy->fw_version);
Kalle Valo5e3dd152013-06-12 20:52:10 +03001031
Kalle Valo5e3dd152013-06-12 20:52:10 +03001032 status = ath10k_wmi_cmd_init(ar);
1033 if (status) {
Michal Kazior7aa7a722014-08-25 12:09:38 +02001034 ath10k_err(ar, "could not send WMI init command (%d)\n",
1035 status);
Michal Kaziorb7967dc2014-08-07 11:03:31 +02001036 goto err_hif_stop;
Kalle Valo5e3dd152013-06-12 20:52:10 +03001037 }
1038
1039 status = ath10k_wmi_wait_for_unified_ready(ar);
1040 if (status <= 0) {
Michal Kazior7aa7a722014-08-25 12:09:38 +02001041 ath10k_err(ar, "wmi unified ready event not received\n");
Kalle Valo5e3dd152013-06-12 20:52:10 +03001042 status = -ETIMEDOUT;
Michal Kaziorb7967dc2014-08-07 11:03:31 +02001043 goto err_hif_stop;
Kalle Valo5e3dd152013-06-12 20:52:10 +03001044 }
1045
Kalle Valo43d2a302014-09-10 18:23:30 +03001046 /* we don't care about HTT in UTF mode */
1047 if (mode == ATH10K_FIRMWARE_MODE_NORMAL) {
1048 status = ath10k_htt_setup(&ar->htt);
1049 if (status) {
1050 ath10k_err(ar, "failed to setup htt: %d\n", status);
1051 goto err_hif_stop;
1052 }
Michal Kazior95bf21f2014-05-16 17:15:39 +03001053 }
Kalle Valo5e3dd152013-06-12 20:52:10 +03001054
Kalle Valodb66ea02013-09-03 11:44:03 +03001055 status = ath10k_debug_start(ar);
1056 if (status)
Michal Kaziorb7967dc2014-08-07 11:03:31 +02001057 goto err_hif_stop;
Kalle Valodb66ea02013-09-03 11:44:03 +03001058
Bartosz Markowskidfa413d2014-06-02 21:19:45 +03001059 if (test_bit(ATH10K_FW_FEATURE_WMI_10X, ar->fw_features))
Ben Greear16c11172014-09-23 14:17:16 -07001060 ar->free_vdev_map = (1LL << TARGET_10X_NUM_VDEVS) - 1;
Bartosz Markowskidfa413d2014-06-02 21:19:45 +03001061 else
Ben Greear16c11172014-09-23 14:17:16 -07001062 ar->free_vdev_map = (1LL << TARGET_NUM_VDEVS) - 1;
Bartosz Markowskidfa413d2014-06-02 21:19:45 +03001063
Michal Kazior05791192013-10-16 15:44:45 +03001064 INIT_LIST_HEAD(&ar->arvifs);
Michal Kazior1a1b8a82013-07-16 09:38:55 +02001065
Michal Kaziordd30a362013-07-16 09:38:51 +02001066 return 0;
1067
Michal Kazior67e3c632013-11-08 08:05:18 +01001068err_hif_stop:
1069 ath10k_hif_stop(ar);
Michal Kazior95bf21f2014-05-16 17:15:39 +03001070err_htt_rx_detach:
1071 ath10k_htt_rx_free(&ar->htt);
1072err_htt_tx_detach:
1073 ath10k_htt_tx_free(&ar->htt);
Michal Kaziordd30a362013-07-16 09:38:51 +02001074err_wmi_detach:
1075 ath10k_wmi_detach(ar);
1076err:
1077 return status;
1078}
Michal Kazior818bdd12013-07-16 09:38:57 +02001079EXPORT_SYMBOL(ath10k_core_start);
Michal Kaziordd30a362013-07-16 09:38:51 +02001080
Marek Puzyniak00f54822014-02-10 17:14:24 +01001081int ath10k_wait_for_suspend(struct ath10k *ar, u32 suspend_opt)
1082{
1083 int ret;
1084
1085 reinit_completion(&ar->target_suspend);
1086
1087 ret = ath10k_wmi_pdev_suspend_target(ar, suspend_opt);
1088 if (ret) {
Michal Kazior7aa7a722014-08-25 12:09:38 +02001089 ath10k_warn(ar, "could not suspend target (%d)\n", ret);
Marek Puzyniak00f54822014-02-10 17:14:24 +01001090 return ret;
1091 }
1092
1093 ret = wait_for_completion_timeout(&ar->target_suspend, 1 * HZ);
1094
1095 if (ret == 0) {
Michal Kazior7aa7a722014-08-25 12:09:38 +02001096 ath10k_warn(ar, "suspend timed out - target pause event never came\n");
Marek Puzyniak00f54822014-02-10 17:14:24 +01001097 return -ETIMEDOUT;
1098 }
1099
1100 return 0;
1101}
1102
Michal Kaziordd30a362013-07-16 09:38:51 +02001103void ath10k_core_stop(struct ath10k *ar)
1104{
Kalle Valo60631c52013-10-08 21:45:25 +03001105 lockdep_assert_held(&ar->conf_mutex);
1106
Marek Puzyniak00f54822014-02-10 17:14:24 +01001107 /* try to suspend target */
Kalle Valo43d2a302014-09-10 18:23:30 +03001108 if (ar->state != ATH10K_STATE_RESTARTING &&
1109 ar->state != ATH10K_STATE_UTF)
Michal Kazior216a1832014-04-23 19:30:04 +03001110 ath10k_wait_for_suspend(ar, WMI_PDEV_SUSPEND_AND_DISABLE_INTR);
1111
Kalle Valodb66ea02013-09-03 11:44:03 +03001112 ath10k_debug_stop(ar);
Michal Kazior95bf21f2014-05-16 17:15:39 +03001113 ath10k_hif_stop(ar);
1114 ath10k_htt_tx_free(&ar->htt);
1115 ath10k_htt_rx_free(&ar->htt);
Michal Kaziordd30a362013-07-16 09:38:51 +02001116 ath10k_wmi_detach(ar);
1117}
Michal Kazior818bdd12013-07-16 09:38:57 +02001118EXPORT_SYMBOL(ath10k_core_stop);
1119
1120/* mac80211 manages fw/hw initialization through start/stop hooks. However in
1121 * order to know what hw capabilities should be advertised to mac80211 it is
1122 * necessary to load the firmware (and tear it down immediately since start
1123 * hook will try to init it again) before registering */
1124static int ath10k_core_probe_fw(struct ath10k *ar)
1125{
Michal Kazior29385052013-07-16 09:38:58 +02001126 struct bmi_target_info target_info;
1127 int ret = 0;
Michal Kazior818bdd12013-07-16 09:38:57 +02001128
1129 ret = ath10k_hif_power_up(ar);
1130 if (ret) {
Michal Kazior7aa7a722014-08-25 12:09:38 +02001131 ath10k_err(ar, "could not start pci hif (%d)\n", ret);
Michal Kazior818bdd12013-07-16 09:38:57 +02001132 return ret;
1133 }
1134
Michal Kazior29385052013-07-16 09:38:58 +02001135 memset(&target_info, 0, sizeof(target_info));
1136 ret = ath10k_bmi_get_target_info(ar, &target_info);
1137 if (ret) {
Michal Kazior7aa7a722014-08-25 12:09:38 +02001138 ath10k_err(ar, "could not get target info (%d)\n", ret);
Kalle Valoc6ce4922014-12-03 10:09:31 +02001139 goto err_power_down;
Michal Kazior29385052013-07-16 09:38:58 +02001140 }
1141
1142 ar->target_version = target_info.version;
1143 ar->hw->wiphy->hw_version = target_info.version;
1144
1145 ret = ath10k_init_hw_params(ar);
1146 if (ret) {
Michal Kazior7aa7a722014-08-25 12:09:38 +02001147 ath10k_err(ar, "could not get hw params (%d)\n", ret);
Kalle Valoc6ce4922014-12-03 10:09:31 +02001148 goto err_power_down;
Michal Kazior29385052013-07-16 09:38:58 +02001149 }
1150
1151 ret = ath10k_core_fetch_firmware_files(ar);
1152 if (ret) {
Michal Kazior7aa7a722014-08-25 12:09:38 +02001153 ath10k_err(ar, "could not fetch firmware files (%d)\n", ret);
Kalle Valoc6ce4922014-12-03 10:09:31 +02001154 goto err_power_down;
Michal Kazior29385052013-07-16 09:38:58 +02001155 }
1156
Kalle Valo5f2144d2014-12-03 10:09:59 +02001157 ret = ath10k_core_init_firmware_features(ar);
1158 if (ret) {
1159 ath10k_err(ar, "fatal problem with firmware features: %d\n",
1160 ret);
1161 goto err_free_firmware_files;
1162 }
Michal Kaziorcfd10612014-11-25 15:16:05 +01001163
Kalle Valo60631c52013-10-08 21:45:25 +03001164 mutex_lock(&ar->conf_mutex);
1165
Kalle Valo43d2a302014-09-10 18:23:30 +03001166 ret = ath10k_core_start(ar, ATH10K_FIRMWARE_MODE_NORMAL);
Michal Kazior818bdd12013-07-16 09:38:57 +02001167 if (ret) {
Michal Kazior7aa7a722014-08-25 12:09:38 +02001168 ath10k_err(ar, "could not init core (%d)\n", ret);
Kalle Valoc6ce4922014-12-03 10:09:31 +02001169 goto err_unlock;
Michal Kazior818bdd12013-07-16 09:38:57 +02001170 }
1171
Michal Kazior8079de02014-08-22 14:23:29 +02001172 ath10k_print_driver_info(ar);
Michal Kazior818bdd12013-07-16 09:38:57 +02001173 ath10k_core_stop(ar);
Kalle Valo60631c52013-10-08 21:45:25 +03001174
1175 mutex_unlock(&ar->conf_mutex);
1176
Michal Kazior818bdd12013-07-16 09:38:57 +02001177 ath10k_hif_power_down(ar);
1178 return 0;
Kalle Valoc6ce4922014-12-03 10:09:31 +02001179
1180err_unlock:
1181 mutex_unlock(&ar->conf_mutex);
1182
Kalle Valo5f2144d2014-12-03 10:09:59 +02001183err_free_firmware_files:
Kalle Valoc6ce4922014-12-03 10:09:31 +02001184 ath10k_core_free_firmware_files(ar);
1185
1186err_power_down:
1187 ath10k_hif_power_down(ar);
1188
1189 return ret;
Michal Kazior818bdd12013-07-16 09:38:57 +02001190}
Michal Kaziordd30a362013-07-16 09:38:51 +02001191
Michal Kazior6782cb62014-05-23 12:28:47 +02001192static void ath10k_core_register_work(struct work_struct *work)
Michal Kaziordd30a362013-07-16 09:38:51 +02001193{
Michal Kazior6782cb62014-05-23 12:28:47 +02001194 struct ath10k *ar = container_of(work, struct ath10k, register_work);
Michal Kaziordd30a362013-07-16 09:38:51 +02001195 int status;
1196
Michal Kazior818bdd12013-07-16 09:38:57 +02001197 status = ath10k_core_probe_fw(ar);
1198 if (status) {
Michal Kazior7aa7a722014-08-25 12:09:38 +02001199 ath10k_err(ar, "could not probe fw (%d)\n", status);
Michal Kazior6782cb62014-05-23 12:28:47 +02001200 goto err;
Michal Kazior818bdd12013-07-16 09:38:57 +02001201 }
Michal Kaziordd30a362013-07-16 09:38:51 +02001202
Kalle Valo5e3dd152013-06-12 20:52:10 +03001203 status = ath10k_mac_register(ar);
Michal Kazior818bdd12013-07-16 09:38:57 +02001204 if (status) {
Michal Kazior7aa7a722014-08-25 12:09:38 +02001205 ath10k_err(ar, "could not register to mac80211 (%d)\n", status);
Michal Kazior29385052013-07-16 09:38:58 +02001206 goto err_release_fw;
Michal Kazior818bdd12013-07-16 09:38:57 +02001207 }
Kalle Valo5e3dd152013-06-12 20:52:10 +03001208
Michal Kaziore13cf7a2014-09-04 09:13:08 +02001209 status = ath10k_debug_register(ar);
Kalle Valo5e3dd152013-06-12 20:52:10 +03001210 if (status) {
Michal Kazior7aa7a722014-08-25 12:09:38 +02001211 ath10k_err(ar, "unable to initialize debugfs\n");
Kalle Valo5e3dd152013-06-12 20:52:10 +03001212 goto err_unregister_mac;
1213 }
1214
Simon Wunderlich855aed12014-08-02 09:12:54 +03001215 status = ath10k_spectral_create(ar);
1216 if (status) {
Michal Kazior7aa7a722014-08-25 12:09:38 +02001217 ath10k_err(ar, "failed to initialize spectral\n");
Simon Wunderlich855aed12014-08-02 09:12:54 +03001218 goto err_debug_destroy;
1219 }
1220
Michal Kazior6782cb62014-05-23 12:28:47 +02001221 set_bit(ATH10K_FLAG_CORE_REGISTERED, &ar->dev_flags);
1222 return;
Kalle Valo5e3dd152013-06-12 20:52:10 +03001223
Simon Wunderlich855aed12014-08-02 09:12:54 +03001224err_debug_destroy:
1225 ath10k_debug_destroy(ar);
Kalle Valo5e3dd152013-06-12 20:52:10 +03001226err_unregister_mac:
1227 ath10k_mac_unregister(ar);
Michal Kazior29385052013-07-16 09:38:58 +02001228err_release_fw:
1229 ath10k_core_free_firmware_files(ar);
Michal Kazior6782cb62014-05-23 12:28:47 +02001230err:
Michal Kaziora491a922014-07-14 16:07:29 +03001231 /* TODO: It's probably a good idea to release device from the driver
1232 * but calling device_release_driver() here will cause a deadlock.
1233 */
Michal Kazior6782cb62014-05-23 12:28:47 +02001234 return;
1235}
1236
1237int ath10k_core_register(struct ath10k *ar, u32 chip_id)
1238{
Michal Kazior6782cb62014-05-23 12:28:47 +02001239 ar->chip_id = chip_id;
Michal Kazior6782cb62014-05-23 12:28:47 +02001240 queue_work(ar->workqueue, &ar->register_work);
1241
1242 return 0;
Kalle Valo5e3dd152013-06-12 20:52:10 +03001243}
1244EXPORT_SYMBOL(ath10k_core_register);
1245
1246void ath10k_core_unregister(struct ath10k *ar)
1247{
Michal Kazior6782cb62014-05-23 12:28:47 +02001248 cancel_work_sync(&ar->register_work);
1249
1250 if (!test_bit(ATH10K_FLAG_CORE_REGISTERED, &ar->dev_flags))
1251 return;
1252
Simon Wunderlich804eef1472014-08-12 17:12:17 +02001253 /* Stop spectral before unregistering from mac80211 to remove the
1254 * relayfs debugfs file cleanly. Otherwise the parent debugfs tree
1255 * would be already be free'd recursively, leading to a double free.
1256 */
1257 ath10k_spectral_destroy(ar);
1258
Kalle Valo5e3dd152013-06-12 20:52:10 +03001259 /* We must unregister from mac80211 before we stop HTC and HIF.
1260 * Otherwise we will fail to submit commands to FW and mac80211 will be
1261 * unhappy about callback failures. */
1262 ath10k_mac_unregister(ar);
Kalle Valodb66ea02013-09-03 11:44:03 +03001263
Kalle Valo43d2a302014-09-10 18:23:30 +03001264 ath10k_testmode_destroy(ar);
1265
Michal Kazior29385052013-07-16 09:38:58 +02001266 ath10k_core_free_firmware_files(ar);
Ben Greear6f1f56e2013-11-04 09:18:16 -08001267
Michal Kaziore13cf7a2014-09-04 09:13:08 +02001268 ath10k_debug_unregister(ar);
Kalle Valo5e3dd152013-06-12 20:52:10 +03001269}
1270EXPORT_SYMBOL(ath10k_core_unregister);
1271
Michal Kaziore7b54192014-08-07 11:03:27 +02001272struct ath10k *ath10k_core_create(size_t priv_size, struct device *dev,
Kalle Valoe07db352014-10-13 09:40:47 +03001273 enum ath10k_bus bus,
Michal Kazior0d0a6932014-05-23 12:28:45 +02001274 const struct ath10k_hif_ops *hif_ops)
1275{
1276 struct ath10k *ar;
Michal Kaziore13cf7a2014-09-04 09:13:08 +02001277 int ret;
Michal Kazior0d0a6932014-05-23 12:28:45 +02001278
Michal Kaziore7b54192014-08-07 11:03:27 +02001279 ar = ath10k_mac_create(priv_size);
Michal Kazior0d0a6932014-05-23 12:28:45 +02001280 if (!ar)
1281 return NULL;
1282
1283 ar->ath_common.priv = ar;
1284 ar->ath_common.hw = ar->hw;
1285
1286 ar->p2p = !!ath10k_p2p;
1287 ar->dev = dev;
1288
Michal Kazior0d0a6932014-05-23 12:28:45 +02001289 ar->hif.ops = hif_ops;
Kalle Valoe07db352014-10-13 09:40:47 +03001290 ar->hif.bus = bus;
Michal Kazior0d0a6932014-05-23 12:28:45 +02001291
1292 init_completion(&ar->scan.started);
1293 init_completion(&ar->scan.completed);
1294 init_completion(&ar->scan.on_channel);
1295 init_completion(&ar->target_suspend);
1296
1297 init_completion(&ar->install_key_done);
1298 init_completion(&ar->vdev_setup_done);
1299
Michal Kazior5c81c7f2014-08-05 14:54:44 +02001300 INIT_DELAYED_WORK(&ar->scan.timeout, ath10k_scan_timeout_work);
Michal Kazior0d0a6932014-05-23 12:28:45 +02001301
1302 ar->workqueue = create_singlethread_workqueue("ath10k_wq");
1303 if (!ar->workqueue)
Michal Kaziore13cf7a2014-09-04 09:13:08 +02001304 goto err_free_mac;
Michal Kazior0d0a6932014-05-23 12:28:45 +02001305
1306 mutex_init(&ar->conf_mutex);
1307 spin_lock_init(&ar->data_lock);
1308
1309 INIT_LIST_HEAD(&ar->peers);
1310 init_waitqueue_head(&ar->peer_mapping_wq);
Michal Kazior7962b0d2014-10-28 10:34:38 +01001311 init_waitqueue_head(&ar->htt.empty_tx_wq);
1312 init_waitqueue_head(&ar->wmi.tx_credits_wq);
Michal Kazior0d0a6932014-05-23 12:28:45 +02001313
1314 init_completion(&ar->offchan_tx_completed);
1315 INIT_WORK(&ar->offchan_tx_work, ath10k_offchan_tx_work);
1316 skb_queue_head_init(&ar->offchan_tx_queue);
1317
1318 INIT_WORK(&ar->wmi_mgmt_tx_work, ath10k_mgmt_over_wmi_tx_work);
1319 skb_queue_head_init(&ar->wmi_mgmt_tx_queue);
1320
Michal Kazior6782cb62014-05-23 12:28:47 +02001321 INIT_WORK(&ar->register_work, ath10k_core_register_work);
Michal Kazior0d0a6932014-05-23 12:28:45 +02001322 INIT_WORK(&ar->restart_work, ath10k_core_restart);
1323
Michal Kaziore13cf7a2014-09-04 09:13:08 +02001324 ret = ath10k_debug_create(ar);
1325 if (ret)
1326 goto err_free_wq;
1327
Michal Kazior0d0a6932014-05-23 12:28:45 +02001328 return ar;
1329
Michal Kaziore13cf7a2014-09-04 09:13:08 +02001330err_free_wq:
1331 destroy_workqueue(ar->workqueue);
1332
1333err_free_mac:
Michal Kazior0d0a6932014-05-23 12:28:45 +02001334 ath10k_mac_destroy(ar);
Michal Kaziore13cf7a2014-09-04 09:13:08 +02001335
Michal Kazior0d0a6932014-05-23 12:28:45 +02001336 return NULL;
1337}
1338EXPORT_SYMBOL(ath10k_core_create);
1339
1340void ath10k_core_destroy(struct ath10k *ar)
1341{
1342 flush_workqueue(ar->workqueue);
1343 destroy_workqueue(ar->workqueue);
1344
Michal Kaziore13cf7a2014-09-04 09:13:08 +02001345 ath10k_debug_destroy(ar);
Michal Kazior0d0a6932014-05-23 12:28:45 +02001346 ath10k_mac_destroy(ar);
1347}
1348EXPORT_SYMBOL(ath10k_core_destroy);
1349
Kalle Valo5e3dd152013-06-12 20:52:10 +03001350MODULE_AUTHOR("Qualcomm Atheros");
1351MODULE_DESCRIPTION("Core module for QCA988X PCIe devices.");
1352MODULE_LICENSE("Dual BSD/GPL");