blob: 9c9e199970af9c6fd436fb5c185eb98492146c58 [file] [log] [blame]
Ben Gamari20172632009-02-17 20:08:50 -05001/*
2 * Copyright © 2008 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 *
23 * Authors:
24 * Eric Anholt <eric@anholt.net>
25 * Keith Packard <keithp@keithp.com>
26 *
27 */
28
29#include <linux/seq_file.h>
Chris Wilsonf3cd4742009-10-13 22:20:20 +010030#include <linux/debugfs.h>
Tejun Heo5a0e3ad2010-03-24 17:04:11 +090031#include <linux/slab.h>
Paul Gortmaker2d1a8a42011-08-30 18:16:33 -040032#include <linux/export.h>
Ben Gamari20172632009-02-17 20:08:50 -050033#include "drmP.h"
34#include "drm.h"
Simon Farnsworth4e5359c2010-09-01 17:47:52 +010035#include "intel_drv.h"
Chris Wilsone5c65262010-11-01 11:35:28 +000036#include "intel_ringbuffer.h"
Ben Gamari20172632009-02-17 20:08:50 -050037#include "i915_drm.h"
38#include "i915_drv.h"
39
40#define DRM_I915_RING_DEBUG 1
41
42
43#if defined(CONFIG_DEBUG_FS)
44
Chris Wilsonf13d3f72010-09-20 17:36:15 +010045enum {
Chris Wilson69dc4982010-10-19 10:36:51 +010046 ACTIVE_LIST,
Chris Wilsonf13d3f72010-09-20 17:36:15 +010047 INACTIVE_LIST,
Chris Wilsond21d5972010-09-26 11:19:33 +010048 PINNED_LIST,
Chris Wilsonf13d3f72010-09-20 17:36:15 +010049};
Ben Gamari433e12f2009-02-17 20:08:51 -050050
Chris Wilson70d39fe2010-08-25 16:03:34 +010051static const char *yesno(int v)
52{
53 return v ? "yes" : "no";
54}
55
56static int i915_capabilities(struct seq_file *m, void *data)
57{
58 struct drm_info_node *node = (struct drm_info_node *) m->private;
59 struct drm_device *dev = node->minor->dev;
60 const struct intel_device_info *info = INTEL_INFO(dev);
61
62 seq_printf(m, "gen: %d\n", info->gen);
Paulo Zanoni03d00ac2011-10-14 18:17:41 -030063 seq_printf(m, "pch: %d\n", INTEL_PCH_TYPE(dev));
Daniel Vetterc96ea642012-08-08 22:01:51 +020064#define DEV_INFO_FLAG(x) seq_printf(m, #x ": %s\n", yesno(info->x))
65#define DEV_INFO_SEP ;
66 DEV_INFO_FLAGS;
67#undef DEV_INFO_FLAG
68#undef DEV_INFO_SEP
Chris Wilson70d39fe2010-08-25 16:03:34 +010069
70 return 0;
71}
Ben Gamari433e12f2009-02-17 20:08:51 -050072
Chris Wilson05394f32010-11-08 19:18:58 +000073static const char *get_pin_flag(struct drm_i915_gem_object *obj)
Chris Wilsona6172a82009-02-11 14:26:38 +000074{
Chris Wilson05394f32010-11-08 19:18:58 +000075 if (obj->user_pin_count > 0)
Chris Wilsona6172a82009-02-11 14:26:38 +000076 return "P";
Chris Wilson05394f32010-11-08 19:18:58 +000077 else if (obj->pin_count > 0)
Chris Wilsona6172a82009-02-11 14:26:38 +000078 return "p";
79 else
80 return " ";
81}
82
Chris Wilson05394f32010-11-08 19:18:58 +000083static const char *get_tiling_flag(struct drm_i915_gem_object *obj)
Chris Wilsona6172a82009-02-11 14:26:38 +000084{
Akshay Joshi0206e352011-08-16 15:34:10 -040085 switch (obj->tiling_mode) {
86 default:
87 case I915_TILING_NONE: return " ";
88 case I915_TILING_X: return "X";
89 case I915_TILING_Y: return "Y";
90 }
Chris Wilsona6172a82009-02-11 14:26:38 +000091}
92
Chris Wilson93dfb402011-03-29 16:59:50 -070093static const char *cache_level_str(int type)
Chris Wilson08c18322011-01-10 00:00:24 +000094{
95 switch (type) {
Chris Wilson93dfb402011-03-29 16:59:50 -070096 case I915_CACHE_NONE: return " uncached";
97 case I915_CACHE_LLC: return " snooped (LLC)";
98 case I915_CACHE_LLC_MLC: return " snooped (LLC+MLC)";
Chris Wilson08c18322011-01-10 00:00:24 +000099 default: return "";
100 }
101}
102
Chris Wilson37811fc2010-08-25 22:45:57 +0100103static void
104describe_obj(struct seq_file *m, struct drm_i915_gem_object *obj)
105{
Chris Wilson0201f1e2012-07-20 12:41:01 +0100106 seq_printf(m, "%p: %s%s %8zdKiB %04x %04x %d %d %d%s%s%s",
Chris Wilson37811fc2010-08-25 22:45:57 +0100107 &obj->base,
108 get_pin_flag(obj),
109 get_tiling_flag(obj),
Eric Anholta05a5862011-12-20 08:54:15 -0800110 obj->base.size / 1024,
Chris Wilson37811fc2010-08-25 22:45:57 +0100111 obj->base.read_domains,
112 obj->base.write_domain,
Chris Wilson0201f1e2012-07-20 12:41:01 +0100113 obj->last_read_seqno,
114 obj->last_write_seqno,
Chris Wilsoncaea7472010-11-12 13:53:37 +0000115 obj->last_fenced_seqno,
Chris Wilson93dfb402011-03-29 16:59:50 -0700116 cache_level_str(obj->cache_level),
Chris Wilson37811fc2010-08-25 22:45:57 +0100117 obj->dirty ? " dirty" : "",
118 obj->madv == I915_MADV_DONTNEED ? " purgeable" : "");
119 if (obj->base.name)
120 seq_printf(m, " (name: %d)", obj->base.name);
121 if (obj->fence_reg != I915_FENCE_REG_NONE)
122 seq_printf(m, " (fence: %d)", obj->fence_reg);
123 if (obj->gtt_space != NULL)
Chris Wilsona00b10c2010-09-24 21:15:47 +0100124 seq_printf(m, " (gtt offset: %08x, size: %08x)",
125 obj->gtt_offset, (unsigned int)obj->gtt_space->size);
Chris Wilson6299f992010-11-24 12:23:44 +0000126 if (obj->pin_mappable || obj->fault_mappable) {
127 char s[3], *t = s;
128 if (obj->pin_mappable)
129 *t++ = 'p';
130 if (obj->fault_mappable)
131 *t++ = 'f';
132 *t = '\0';
133 seq_printf(m, " (%s mappable)", s);
134 }
Chris Wilson69dc4982010-10-19 10:36:51 +0100135 if (obj->ring != NULL)
136 seq_printf(m, " (%s)", obj->ring->name);
Chris Wilson37811fc2010-08-25 22:45:57 +0100137}
138
Ben Gamari433e12f2009-02-17 20:08:51 -0500139static int i915_gem_object_list_info(struct seq_file *m, void *data)
Ben Gamari20172632009-02-17 20:08:50 -0500140{
141 struct drm_info_node *node = (struct drm_info_node *) m->private;
Ben Gamari433e12f2009-02-17 20:08:51 -0500142 uintptr_t list = (uintptr_t) node->info_ent->data;
143 struct list_head *head;
Ben Gamari20172632009-02-17 20:08:50 -0500144 struct drm_device *dev = node->minor->dev;
145 drm_i915_private_t *dev_priv = dev->dev_private;
Chris Wilson05394f32010-11-08 19:18:58 +0000146 struct drm_i915_gem_object *obj;
Chris Wilson8f2480f2010-09-26 11:44:19 +0100147 size_t total_obj_size, total_gtt_size;
148 int count, ret;
Chris Wilsonde227ef2010-07-03 07:58:38 +0100149
150 ret = mutex_lock_interruptible(&dev->struct_mutex);
151 if (ret)
152 return ret;
Ben Gamari20172632009-02-17 20:08:50 -0500153
Ben Gamari433e12f2009-02-17 20:08:51 -0500154 switch (list) {
155 case ACTIVE_LIST:
156 seq_printf(m, "Active:\n");
Chris Wilson69dc4982010-10-19 10:36:51 +0100157 head = &dev_priv->mm.active_list;
Ben Gamari433e12f2009-02-17 20:08:51 -0500158 break;
159 case INACTIVE_LIST:
Ben Gamaria17458f2009-07-01 15:01:36 -0400160 seq_printf(m, "Inactive:\n");
Ben Gamari433e12f2009-02-17 20:08:51 -0500161 head = &dev_priv->mm.inactive_list;
162 break;
Ben Gamari433e12f2009-02-17 20:08:51 -0500163 default:
Chris Wilsonde227ef2010-07-03 07:58:38 +0100164 mutex_unlock(&dev->struct_mutex);
165 return -EINVAL;
Ben Gamari433e12f2009-02-17 20:08:51 -0500166 }
167
Chris Wilson8f2480f2010-09-26 11:44:19 +0100168 total_obj_size = total_gtt_size = count = 0;
Chris Wilson05394f32010-11-08 19:18:58 +0000169 list_for_each_entry(obj, head, mm_list) {
Chris Wilson37811fc2010-08-25 22:45:57 +0100170 seq_printf(m, " ");
Chris Wilson05394f32010-11-08 19:18:58 +0000171 describe_obj(m, obj);
Eric Anholtf4ceda82009-02-17 23:53:41 -0800172 seq_printf(m, "\n");
Chris Wilson05394f32010-11-08 19:18:58 +0000173 total_obj_size += obj->base.size;
174 total_gtt_size += obj->gtt_space->size;
Chris Wilson8f2480f2010-09-26 11:44:19 +0100175 count++;
Ben Gamari20172632009-02-17 20:08:50 -0500176 }
Chris Wilsonde227ef2010-07-03 07:58:38 +0100177 mutex_unlock(&dev->struct_mutex);
Carl Worth5e118f42009-03-20 11:54:25 -0700178
Chris Wilson8f2480f2010-09-26 11:44:19 +0100179 seq_printf(m, "Total %d objects, %zu bytes, %zu GTT size\n",
180 count, total_obj_size, total_gtt_size);
Ben Gamari20172632009-02-17 20:08:50 -0500181 return 0;
182}
183
Chris Wilson6299f992010-11-24 12:23:44 +0000184#define count_objects(list, member) do { \
185 list_for_each_entry(obj, list, member) { \
186 size += obj->gtt_space->size; \
187 ++count; \
188 if (obj->map_and_fenceable) { \
189 mappable_size += obj->gtt_space->size; \
190 ++mappable_count; \
191 } \
192 } \
Akshay Joshi0206e352011-08-16 15:34:10 -0400193} while (0)
Chris Wilson6299f992010-11-24 12:23:44 +0000194
Chris Wilson73aa8082010-09-30 11:46:12 +0100195static int i915_gem_object_info(struct seq_file *m, void* data)
196{
197 struct drm_info_node *node = (struct drm_info_node *) m->private;
198 struct drm_device *dev = node->minor->dev;
199 struct drm_i915_private *dev_priv = dev->dev_private;
Chris Wilson6299f992010-11-24 12:23:44 +0000200 u32 count, mappable_count;
201 size_t size, mappable_size;
202 struct drm_i915_gem_object *obj;
Chris Wilson73aa8082010-09-30 11:46:12 +0100203 int ret;
204
205 ret = mutex_lock_interruptible(&dev->struct_mutex);
206 if (ret)
207 return ret;
208
Chris Wilson6299f992010-11-24 12:23:44 +0000209 seq_printf(m, "%u objects, %zu bytes\n",
210 dev_priv->mm.object_count,
211 dev_priv->mm.object_memory);
212
213 size = count = mappable_size = mappable_count = 0;
214 count_objects(&dev_priv->mm.gtt_list, gtt_list);
215 seq_printf(m, "%u [%u] objects, %zu [%zu] bytes in gtt\n",
216 count, mappable_count, size, mappable_size);
217
218 size = count = mappable_size = mappable_count = 0;
219 count_objects(&dev_priv->mm.active_list, mm_list);
Chris Wilson6299f992010-11-24 12:23:44 +0000220 seq_printf(m, " %u [%u] active objects, %zu [%zu] bytes\n",
221 count, mappable_count, size, mappable_size);
222
223 size = count = mappable_size = mappable_count = 0;
Chris Wilson6299f992010-11-24 12:23:44 +0000224 count_objects(&dev_priv->mm.inactive_list, mm_list);
225 seq_printf(m, " %u [%u] inactive objects, %zu [%zu] bytes\n",
226 count, mappable_count, size, mappable_size);
227
228 size = count = mappable_size = mappable_count = 0;
Chris Wilson6299f992010-11-24 12:23:44 +0000229 list_for_each_entry(obj, &dev_priv->mm.gtt_list, gtt_list) {
230 if (obj->fault_mappable) {
231 size += obj->gtt_space->size;
232 ++count;
233 }
234 if (obj->pin_mappable) {
235 mappable_size += obj->gtt_space->size;
236 ++mappable_count;
237 }
238 }
239 seq_printf(m, "%u pinned mappable objects, %zu bytes\n",
240 mappable_count, mappable_size);
241 seq_printf(m, "%u fault mappable objects, %zu bytes\n",
242 count, size);
243
244 seq_printf(m, "%zu [%zu] gtt total\n",
245 dev_priv->mm.gtt_total, dev_priv->mm.mappable_gtt_total);
Chris Wilson73aa8082010-09-30 11:46:12 +0100246
247 mutex_unlock(&dev->struct_mutex);
248
249 return 0;
250}
251
Chris Wilson08c18322011-01-10 00:00:24 +0000252static int i915_gem_gtt_info(struct seq_file *m, void* data)
253{
254 struct drm_info_node *node = (struct drm_info_node *) m->private;
255 struct drm_device *dev = node->minor->dev;
Chris Wilson1b502472012-04-24 15:47:30 +0100256 uintptr_t list = (uintptr_t) node->info_ent->data;
Chris Wilson08c18322011-01-10 00:00:24 +0000257 struct drm_i915_private *dev_priv = dev->dev_private;
258 struct drm_i915_gem_object *obj;
259 size_t total_obj_size, total_gtt_size;
260 int count, ret;
261
262 ret = mutex_lock_interruptible(&dev->struct_mutex);
263 if (ret)
264 return ret;
265
266 total_obj_size = total_gtt_size = count = 0;
267 list_for_each_entry(obj, &dev_priv->mm.gtt_list, gtt_list) {
Chris Wilson1b502472012-04-24 15:47:30 +0100268 if (list == PINNED_LIST && obj->pin_count == 0)
269 continue;
270
Chris Wilson08c18322011-01-10 00:00:24 +0000271 seq_printf(m, " ");
272 describe_obj(m, obj);
273 seq_printf(m, "\n");
274 total_obj_size += obj->base.size;
275 total_gtt_size += obj->gtt_space->size;
276 count++;
277 }
278
279 mutex_unlock(&dev->struct_mutex);
280
281 seq_printf(m, "Total %d objects, %zu bytes, %zu GTT size\n",
282 count, total_obj_size, total_gtt_size);
283
284 return 0;
285}
286
Simon Farnsworth4e5359c2010-09-01 17:47:52 +0100287static int i915_gem_pageflip_info(struct seq_file *m, void *data)
288{
289 struct drm_info_node *node = (struct drm_info_node *) m->private;
290 struct drm_device *dev = node->minor->dev;
291 unsigned long flags;
292 struct intel_crtc *crtc;
293
294 list_for_each_entry(crtc, &dev->mode_config.crtc_list, base.head) {
Jesse Barnes9db4a9c2011-02-07 12:26:52 -0800295 const char pipe = pipe_name(crtc->pipe);
296 const char plane = plane_name(crtc->plane);
Simon Farnsworth4e5359c2010-09-01 17:47:52 +0100297 struct intel_unpin_work *work;
298
299 spin_lock_irqsave(&dev->event_lock, flags);
300 work = crtc->unpin_work;
301 if (work == NULL) {
Jesse Barnes9db4a9c2011-02-07 12:26:52 -0800302 seq_printf(m, "No flip due on pipe %c (plane %c)\n",
Simon Farnsworth4e5359c2010-09-01 17:47:52 +0100303 pipe, plane);
304 } else {
305 if (!work->pending) {
Jesse Barnes9db4a9c2011-02-07 12:26:52 -0800306 seq_printf(m, "Flip queued on pipe %c (plane %c)\n",
Simon Farnsworth4e5359c2010-09-01 17:47:52 +0100307 pipe, plane);
308 } else {
Jesse Barnes9db4a9c2011-02-07 12:26:52 -0800309 seq_printf(m, "Flip pending (waiting for vsync) on pipe %c (plane %c)\n",
Simon Farnsworth4e5359c2010-09-01 17:47:52 +0100310 pipe, plane);
311 }
312 if (work->enable_stall_check)
313 seq_printf(m, "Stall check enabled, ");
314 else
315 seq_printf(m, "Stall check waiting for page flip ioctl, ");
316 seq_printf(m, "%d prepares\n", work->pending);
317
318 if (work->old_fb_obj) {
Chris Wilson05394f32010-11-08 19:18:58 +0000319 struct drm_i915_gem_object *obj = work->old_fb_obj;
320 if (obj)
321 seq_printf(m, "Old framebuffer gtt_offset 0x%08x\n", obj->gtt_offset);
Simon Farnsworth4e5359c2010-09-01 17:47:52 +0100322 }
323 if (work->pending_flip_obj) {
Chris Wilson05394f32010-11-08 19:18:58 +0000324 struct drm_i915_gem_object *obj = work->pending_flip_obj;
325 if (obj)
326 seq_printf(m, "New framebuffer gtt_offset 0x%08x\n", obj->gtt_offset);
Simon Farnsworth4e5359c2010-09-01 17:47:52 +0100327 }
328 }
329 spin_unlock_irqrestore(&dev->event_lock, flags);
330 }
331
332 return 0;
333}
334
Ben Gamari20172632009-02-17 20:08:50 -0500335static int i915_gem_request_info(struct seq_file *m, void *data)
336{
337 struct drm_info_node *node = (struct drm_info_node *) m->private;
338 struct drm_device *dev = node->minor->dev;
339 drm_i915_private_t *dev_priv = dev->dev_private;
340 struct drm_i915_gem_request *gem_request;
Chris Wilsonc2c347a92010-10-27 15:11:53 +0100341 int ret, count;
Chris Wilsonde227ef2010-07-03 07:58:38 +0100342
343 ret = mutex_lock_interruptible(&dev->struct_mutex);
344 if (ret)
345 return ret;
Ben Gamari20172632009-02-17 20:08:50 -0500346
Chris Wilsonc2c347a92010-10-27 15:11:53 +0100347 count = 0;
Chris Wilson1ec14ad2010-12-04 11:30:53 +0000348 if (!list_empty(&dev_priv->ring[RCS].request_list)) {
Chris Wilsonc2c347a92010-10-27 15:11:53 +0100349 seq_printf(m, "Render requests:\n");
350 list_for_each_entry(gem_request,
Chris Wilson1ec14ad2010-12-04 11:30:53 +0000351 &dev_priv->ring[RCS].request_list,
Chris Wilsonc2c347a92010-10-27 15:11:53 +0100352 list) {
353 seq_printf(m, " %d @ %d\n",
354 gem_request->seqno,
355 (int) (jiffies - gem_request->emitted_jiffies));
356 }
357 count++;
358 }
Chris Wilson1ec14ad2010-12-04 11:30:53 +0000359 if (!list_empty(&dev_priv->ring[VCS].request_list)) {
Chris Wilsonc2c347a92010-10-27 15:11:53 +0100360 seq_printf(m, "BSD requests:\n");
361 list_for_each_entry(gem_request,
Chris Wilson1ec14ad2010-12-04 11:30:53 +0000362 &dev_priv->ring[VCS].request_list,
Chris Wilsonc2c347a92010-10-27 15:11:53 +0100363 list) {
364 seq_printf(m, " %d @ %d\n",
365 gem_request->seqno,
366 (int) (jiffies - gem_request->emitted_jiffies));
367 }
368 count++;
369 }
Chris Wilson1ec14ad2010-12-04 11:30:53 +0000370 if (!list_empty(&dev_priv->ring[BCS].request_list)) {
Chris Wilsonc2c347a92010-10-27 15:11:53 +0100371 seq_printf(m, "BLT requests:\n");
372 list_for_each_entry(gem_request,
Chris Wilson1ec14ad2010-12-04 11:30:53 +0000373 &dev_priv->ring[BCS].request_list,
Chris Wilsonc2c347a92010-10-27 15:11:53 +0100374 list) {
375 seq_printf(m, " %d @ %d\n",
376 gem_request->seqno,
377 (int) (jiffies - gem_request->emitted_jiffies));
378 }
379 count++;
Ben Gamari20172632009-02-17 20:08:50 -0500380 }
Chris Wilsonde227ef2010-07-03 07:58:38 +0100381 mutex_unlock(&dev->struct_mutex);
382
Chris Wilsonc2c347a92010-10-27 15:11:53 +0100383 if (count == 0)
384 seq_printf(m, "No requests\n");
385
Ben Gamari20172632009-02-17 20:08:50 -0500386 return 0;
387}
388
Chris Wilsonb2223492010-10-27 15:27:33 +0100389static void i915_ring_seqno_info(struct seq_file *m,
390 struct intel_ring_buffer *ring)
391{
392 if (ring->get_seqno) {
393 seq_printf(m, "Current sequence (%s): %d\n",
394 ring->name, ring->get_seqno(ring));
Chris Wilsonb2223492010-10-27 15:27:33 +0100395 }
396}
397
Ben Gamari20172632009-02-17 20:08:50 -0500398static int i915_gem_seqno_info(struct seq_file *m, void *data)
399{
400 struct drm_info_node *node = (struct drm_info_node *) m->private;
401 struct drm_device *dev = node->minor->dev;
402 drm_i915_private_t *dev_priv = dev->dev_private;
Chris Wilson1ec14ad2010-12-04 11:30:53 +0000403 int ret, i;
Chris Wilsonde227ef2010-07-03 07:58:38 +0100404
405 ret = mutex_lock_interruptible(&dev->struct_mutex);
406 if (ret)
407 return ret;
Ben Gamari20172632009-02-17 20:08:50 -0500408
Chris Wilson1ec14ad2010-12-04 11:30:53 +0000409 for (i = 0; i < I915_NUM_RINGS; i++)
410 i915_ring_seqno_info(m, &dev_priv->ring[i]);
Chris Wilsonde227ef2010-07-03 07:58:38 +0100411
412 mutex_unlock(&dev->struct_mutex);
413
Ben Gamari20172632009-02-17 20:08:50 -0500414 return 0;
415}
416
417
418static int i915_interrupt_info(struct seq_file *m, void *data)
419{
420 struct drm_info_node *node = (struct drm_info_node *) m->private;
421 struct drm_device *dev = node->minor->dev;
422 drm_i915_private_t *dev_priv = dev->dev_private;
Jesse Barnes9db4a9c2011-02-07 12:26:52 -0800423 int ret, i, pipe;
Chris Wilsonde227ef2010-07-03 07:58:38 +0100424
425 ret = mutex_lock_interruptible(&dev->struct_mutex);
426 if (ret)
427 return ret;
Ben Gamari20172632009-02-17 20:08:50 -0500428
Jesse Barnes7e231dbe2012-03-28 13:39:38 -0700429 if (IS_VALLEYVIEW(dev)) {
430 seq_printf(m, "Display IER:\t%08x\n",
431 I915_READ(VLV_IER));
432 seq_printf(m, "Display IIR:\t%08x\n",
433 I915_READ(VLV_IIR));
434 seq_printf(m, "Display IIR_RW:\t%08x\n",
435 I915_READ(VLV_IIR_RW));
436 seq_printf(m, "Display IMR:\t%08x\n",
437 I915_READ(VLV_IMR));
438 for_each_pipe(pipe)
439 seq_printf(m, "Pipe %c stat:\t%08x\n",
440 pipe_name(pipe),
441 I915_READ(PIPESTAT(pipe)));
442
443 seq_printf(m, "Master IER:\t%08x\n",
444 I915_READ(VLV_MASTER_IER));
445
446 seq_printf(m, "Render IER:\t%08x\n",
447 I915_READ(GTIER));
448 seq_printf(m, "Render IIR:\t%08x\n",
449 I915_READ(GTIIR));
450 seq_printf(m, "Render IMR:\t%08x\n",
451 I915_READ(GTIMR));
452
453 seq_printf(m, "PM IER:\t\t%08x\n",
454 I915_READ(GEN6_PMIER));
455 seq_printf(m, "PM IIR:\t\t%08x\n",
456 I915_READ(GEN6_PMIIR));
457 seq_printf(m, "PM IMR:\t\t%08x\n",
458 I915_READ(GEN6_PMIMR));
459
460 seq_printf(m, "Port hotplug:\t%08x\n",
461 I915_READ(PORT_HOTPLUG_EN));
462 seq_printf(m, "DPFLIPSTAT:\t%08x\n",
463 I915_READ(VLV_DPFLIPSTAT));
464 seq_printf(m, "DPINVGTT:\t%08x\n",
465 I915_READ(DPINVGTT));
466
467 } else if (!HAS_PCH_SPLIT(dev)) {
Zhenyu Wang5f6a1692009-08-10 21:37:24 +0800468 seq_printf(m, "Interrupt enable: %08x\n",
469 I915_READ(IER));
470 seq_printf(m, "Interrupt identity: %08x\n",
471 I915_READ(IIR));
472 seq_printf(m, "Interrupt mask: %08x\n",
473 I915_READ(IMR));
Jesse Barnes9db4a9c2011-02-07 12:26:52 -0800474 for_each_pipe(pipe)
475 seq_printf(m, "Pipe %c stat: %08x\n",
476 pipe_name(pipe),
477 I915_READ(PIPESTAT(pipe)));
Zhenyu Wang5f6a1692009-08-10 21:37:24 +0800478 } else {
479 seq_printf(m, "North Display Interrupt enable: %08x\n",
480 I915_READ(DEIER));
481 seq_printf(m, "North Display Interrupt identity: %08x\n",
482 I915_READ(DEIIR));
483 seq_printf(m, "North Display Interrupt mask: %08x\n",
484 I915_READ(DEIMR));
485 seq_printf(m, "South Display Interrupt enable: %08x\n",
486 I915_READ(SDEIER));
487 seq_printf(m, "South Display Interrupt identity: %08x\n",
488 I915_READ(SDEIIR));
489 seq_printf(m, "South Display Interrupt mask: %08x\n",
490 I915_READ(SDEIMR));
491 seq_printf(m, "Graphics Interrupt enable: %08x\n",
492 I915_READ(GTIER));
493 seq_printf(m, "Graphics Interrupt identity: %08x\n",
494 I915_READ(GTIIR));
495 seq_printf(m, "Graphics Interrupt mask: %08x\n",
496 I915_READ(GTIMR));
497 }
Ben Gamari20172632009-02-17 20:08:50 -0500498 seq_printf(m, "Interrupts received: %d\n",
499 atomic_read(&dev_priv->irq_received));
Chris Wilson9862e602011-01-04 22:22:17 +0000500 for (i = 0; i < I915_NUM_RINGS; i++) {
Jesse Barnesda64c6f2011-08-09 09:17:46 -0700501 if (IS_GEN6(dev) || IS_GEN7(dev)) {
Chris Wilson9862e602011-01-04 22:22:17 +0000502 seq_printf(m, "Graphics Interrupt mask (%s): %08x\n",
503 dev_priv->ring[i].name,
504 I915_READ_IMR(&dev_priv->ring[i]));
505 }
Chris Wilson1ec14ad2010-12-04 11:30:53 +0000506 i915_ring_seqno_info(m, &dev_priv->ring[i]);
Chris Wilson9862e602011-01-04 22:22:17 +0000507 }
Chris Wilsonde227ef2010-07-03 07:58:38 +0100508 mutex_unlock(&dev->struct_mutex);
509
Ben Gamari20172632009-02-17 20:08:50 -0500510 return 0;
511}
512
Chris Wilsona6172a82009-02-11 14:26:38 +0000513static int i915_gem_fence_regs_info(struct seq_file *m, void *data)
514{
515 struct drm_info_node *node = (struct drm_info_node *) m->private;
516 struct drm_device *dev = node->minor->dev;
517 drm_i915_private_t *dev_priv = dev->dev_private;
Chris Wilsonde227ef2010-07-03 07:58:38 +0100518 int i, ret;
519
520 ret = mutex_lock_interruptible(&dev->struct_mutex);
521 if (ret)
522 return ret;
Chris Wilsona6172a82009-02-11 14:26:38 +0000523
524 seq_printf(m, "Reserved fences = %d\n", dev_priv->fence_reg_start);
525 seq_printf(m, "Total fences = %d\n", dev_priv->num_fence_regs);
526 for (i = 0; i < dev_priv->num_fence_regs; i++) {
Chris Wilson05394f32010-11-08 19:18:58 +0000527 struct drm_i915_gem_object *obj = dev_priv->fence_regs[i].obj;
Chris Wilsona6172a82009-02-11 14:26:38 +0000528
Chris Wilsonc2c347a92010-10-27 15:11:53 +0100529 seq_printf(m, "Fenced object[%2d] = ", i);
530 if (obj == NULL)
531 seq_printf(m, "unused");
532 else
Chris Wilson05394f32010-11-08 19:18:58 +0000533 describe_obj(m, obj);
Chris Wilsonc2c347a92010-10-27 15:11:53 +0100534 seq_printf(m, "\n");
Chris Wilsona6172a82009-02-11 14:26:38 +0000535 }
536
Chris Wilson05394f32010-11-08 19:18:58 +0000537 mutex_unlock(&dev->struct_mutex);
Chris Wilsona6172a82009-02-11 14:26:38 +0000538 return 0;
539}
540
Ben Gamari20172632009-02-17 20:08:50 -0500541static int i915_hws_info(struct seq_file *m, void *data)
542{
543 struct drm_info_node *node = (struct drm_info_node *) m->private;
544 struct drm_device *dev = node->minor->dev;
545 drm_i915_private_t *dev_priv = dev->dev_private;
Chris Wilson4066c0a2010-10-29 21:00:54 +0100546 struct intel_ring_buffer *ring;
Chris Wilson311bd682011-01-13 19:06:50 +0000547 const volatile u32 __iomem *hws;
Chris Wilson4066c0a2010-10-29 21:00:54 +0100548 int i;
Ben Gamari20172632009-02-17 20:08:50 -0500549
Chris Wilson1ec14ad2010-12-04 11:30:53 +0000550 ring = &dev_priv->ring[(uintptr_t)node->info_ent->data];
Chris Wilson311bd682011-01-13 19:06:50 +0000551 hws = (volatile u32 __iomem *)ring->status_page.page_addr;
Ben Gamari20172632009-02-17 20:08:50 -0500552 if (hws == NULL)
553 return 0;
554
555 for (i = 0; i < 4096 / sizeof(u32) / 4; i += 4) {
556 seq_printf(m, "0x%08x: 0x%08x 0x%08x 0x%08x 0x%08x\n",
557 i * 4,
558 hws[i], hws[i + 1], hws[i + 2], hws[i + 3]);
559 }
560 return 0;
561}
562
Chris Wilsone5c65262010-11-01 11:35:28 +0000563static const char *ring_str(int ring)
564{
565 switch (ring) {
Daniel Vetter96154f22011-12-14 13:57:00 +0100566 case RCS: return "render";
567 case VCS: return "bsd";
568 case BCS: return "blt";
Chris Wilsone5c65262010-11-01 11:35:28 +0000569 default: return "";
570 }
571}
572
Chris Wilson9df30792010-02-18 10:24:56 +0000573static const char *pin_flag(int pinned)
574{
575 if (pinned > 0)
576 return " P";
577 else if (pinned < 0)
578 return " p";
579 else
580 return "";
581}
582
583static const char *tiling_flag(int tiling)
584{
585 switch (tiling) {
586 default:
587 case I915_TILING_NONE: return "";
588 case I915_TILING_X: return " X";
589 case I915_TILING_Y: return " Y";
590 }
591}
592
593static const char *dirty_flag(int dirty)
594{
595 return dirty ? " dirty" : "";
596}
597
598static const char *purgeable_flag(int purgeable)
599{
600 return purgeable ? " purgeable" : "";
601}
602
Chris Wilsonc724e8a2010-11-22 08:07:02 +0000603static void print_error_buffers(struct seq_file *m,
604 const char *name,
605 struct drm_i915_error_buffer *err,
606 int count)
607{
608 seq_printf(m, "%s [%d]:\n", name, count);
609
610 while (count--) {
Chris Wilson0201f1e2012-07-20 12:41:01 +0100611 seq_printf(m, " %08x %8u %04x %04x %x %x%s%s%s%s%s%s%s",
Chris Wilsonc724e8a2010-11-22 08:07:02 +0000612 err->gtt_offset,
613 err->size,
614 err->read_domains,
615 err->write_domain,
Chris Wilson0201f1e2012-07-20 12:41:01 +0100616 err->rseqno, err->wseqno,
Chris Wilsonc724e8a2010-11-22 08:07:02 +0000617 pin_flag(err->pinned),
618 tiling_flag(err->tiling),
619 dirty_flag(err->dirty),
620 purgeable_flag(err->purgeable),
Daniel Vetter96154f22011-12-14 13:57:00 +0100621 err->ring != -1 ? " " : "",
Chris Wilsona779e5a2011-01-09 21:07:49 +0000622 ring_str(err->ring),
Chris Wilson93dfb402011-03-29 16:59:50 -0700623 cache_level_str(err->cache_level));
Chris Wilsonc724e8a2010-11-22 08:07:02 +0000624
625 if (err->name)
626 seq_printf(m, " (name: %d)", err->name);
627 if (err->fence_reg != I915_FENCE_REG_NONE)
628 seq_printf(m, " (fence: %d)", err->fence_reg);
629
630 seq_printf(m, "\n");
631 err++;
632 }
633}
634
Daniel Vetterd27b1e02011-12-14 13:57:01 +0100635static void i915_ring_error_state(struct seq_file *m,
636 struct drm_device *dev,
637 struct drm_i915_error_state *error,
638 unsigned ring)
639{
Ben Widawskyec34a012012-04-03 23:03:00 -0700640 BUG_ON(ring >= I915_NUM_RINGS); /* shut up confused gcc */
Daniel Vetterd27b1e02011-12-14 13:57:01 +0100641 seq_printf(m, "%s command stream:\n", ring_str(ring));
Daniel Vetterc1cd90e2011-12-14 13:57:02 +0100642 seq_printf(m, " HEAD: 0x%08x\n", error->head[ring]);
643 seq_printf(m, " TAIL: 0x%08x\n", error->tail[ring]);
Daniel Vetterd27b1e02011-12-14 13:57:01 +0100644 seq_printf(m, " ACTHD: 0x%08x\n", error->acthd[ring]);
645 seq_printf(m, " IPEIR: 0x%08x\n", error->ipeir[ring]);
646 seq_printf(m, " IPEHR: 0x%08x\n", error->ipehr[ring]);
647 seq_printf(m, " INSTDONE: 0x%08x\n", error->instdone[ring]);
Daniel Vetterc1cd90e2011-12-14 13:57:02 +0100648 if (ring == RCS && INTEL_INFO(dev)->gen >= 4) {
649 seq_printf(m, " INSTDONE1: 0x%08x\n", error->instdone1);
650 seq_printf(m, " BBADDR: 0x%08llx\n", error->bbaddr);
Daniel Vetterd27b1e02011-12-14 13:57:01 +0100651 }
Daniel Vetterc1cd90e2011-12-14 13:57:02 +0100652 if (INTEL_INFO(dev)->gen >= 4)
653 seq_printf(m, " INSTPS: 0x%08x\n", error->instps[ring]);
654 seq_printf(m, " INSTPM: 0x%08x\n", error->instpm[ring]);
Daniel Vetter9d2f41f2012-04-02 21:41:45 +0200655 seq_printf(m, " FADDR: 0x%08x\n", error->faddr[ring]);
Daniel Vetter33f3f512011-12-14 13:57:39 +0100656 if (INTEL_INFO(dev)->gen >= 6) {
Chris Wilson12f55812012-07-05 17:14:01 +0100657 seq_printf(m, " RC PSMI: 0x%08x\n", error->rc_psmi[ring]);
Daniel Vetter33f3f512011-12-14 13:57:39 +0100658 seq_printf(m, " FAULT_REG: 0x%08x\n", error->fault_reg[ring]);
Daniel Vetter7e3b8732012-02-01 22:26:45 +0100659 seq_printf(m, " SYNC_0: 0x%08x\n",
660 error->semaphore_mboxes[ring][0]);
661 seq_printf(m, " SYNC_1: 0x%08x\n",
662 error->semaphore_mboxes[ring][1]);
Daniel Vetter33f3f512011-12-14 13:57:39 +0100663 }
Daniel Vetterd27b1e02011-12-14 13:57:01 +0100664 seq_printf(m, " seqno: 0x%08x\n", error->seqno[ring]);
Ben Widawsky9574b3f2012-04-26 16:03:01 -0700665 seq_printf(m, " waiting: %s\n", yesno(error->waiting[ring]));
Daniel Vetter7e3b8732012-02-01 22:26:45 +0100666 seq_printf(m, " ring->head: 0x%08x\n", error->cpu_ring_head[ring]);
667 seq_printf(m, " ring->tail: 0x%08x\n", error->cpu_ring_tail[ring]);
Daniel Vetterd27b1e02011-12-14 13:57:01 +0100668}
669
Daniel Vetterd5442302012-04-27 15:17:40 +0200670struct i915_error_state_file_priv {
671 struct drm_device *dev;
672 struct drm_i915_error_state *error;
673};
674
Jesse Barnes63eeaf32009-06-18 16:56:52 -0700675static int i915_error_state(struct seq_file *m, void *unused)
676{
Daniel Vetterd5442302012-04-27 15:17:40 +0200677 struct i915_error_state_file_priv *error_priv = m->private;
678 struct drm_device *dev = error_priv->dev;
Jesse Barnes63eeaf32009-06-18 16:56:52 -0700679 drm_i915_private_t *dev_priv = dev->dev_private;
Daniel Vetterd5442302012-04-27 15:17:40 +0200680 struct drm_i915_error_state *error = error_priv->error;
Chris Wilsonb4519512012-05-11 14:29:30 +0100681 struct intel_ring_buffer *ring;
Chris Wilson52d39a22012-02-15 11:25:37 +0000682 int i, j, page, offset, elt;
Jesse Barnes63eeaf32009-06-18 16:56:52 -0700683
Daniel Vetter742cbee2012-04-27 15:17:39 +0200684 if (!error) {
Jesse Barnes63eeaf32009-06-18 16:56:52 -0700685 seq_printf(m, "no error state collected\n");
Daniel Vetter742cbee2012-04-27 15:17:39 +0200686 return 0;
Jesse Barnes63eeaf32009-06-18 16:56:52 -0700687 }
688
Jesse Barnes8a905232009-07-11 16:48:03 -0400689 seq_printf(m, "Time: %ld s %ld us\n", error->time.tv_sec,
690 error->time.tv_usec);
Chris Wilson9df30792010-02-18 10:24:56 +0000691 seq_printf(m, "PCI ID: 0x%04x\n", dev->pci_device);
Chris Wilson1d8f38f2010-10-29 19:00:51 +0100692 seq_printf(m, "EIR: 0x%08x\n", error->eir);
Ben Widawskybe998e22012-04-26 16:03:00 -0700693 seq_printf(m, "IER: 0x%08x\n", error->ier);
Chris Wilson1d8f38f2010-10-29 19:00:51 +0100694 seq_printf(m, "PGTBL_ER: 0x%08x\n", error->pgtbl_er);
Ben Widawskyb9a39062012-06-04 14:42:52 -0700695 seq_printf(m, "CCID: 0x%08x\n", error->ccid);
Chris Wilson9df30792010-02-18 10:24:56 +0000696
Daniel Vetterbf3301a2011-05-12 22:17:12 +0100697 for (i = 0; i < dev_priv->num_fence_regs; i++)
Chris Wilson748ebc62010-10-24 10:28:47 +0100698 seq_printf(m, " fence[%d] = %08llx\n", i, error->fence[i]);
699
Daniel Vetter33f3f512011-12-14 13:57:39 +0100700 if (INTEL_INFO(dev)->gen >= 6) {
Daniel Vetterd27b1e02011-12-14 13:57:01 +0100701 seq_printf(m, "ERROR: 0x%08x\n", error->error);
Daniel Vetter33f3f512011-12-14 13:57:39 +0100702 seq_printf(m, "DONE_REG: 0x%08x\n", error->done_reg);
703 }
Daniel Vetterd27b1e02011-12-14 13:57:01 +0100704
Chris Wilsonb4519512012-05-11 14:29:30 +0100705 for_each_ring(ring, dev_priv, i)
706 i915_ring_error_state(m, dev, error, i);
Daniel Vetterd27b1e02011-12-14 13:57:01 +0100707
Chris Wilsonc724e8a2010-11-22 08:07:02 +0000708 if (error->active_bo)
709 print_error_buffers(m, "Active",
710 error->active_bo,
711 error->active_bo_count);
Chris Wilson9df30792010-02-18 10:24:56 +0000712
Chris Wilsonc724e8a2010-11-22 08:07:02 +0000713 if (error->pinned_bo)
714 print_error_buffers(m, "Pinned",
715 error->pinned_bo,
716 error->pinned_bo_count);
Chris Wilson9df30792010-02-18 10:24:56 +0000717
Chris Wilson52d39a22012-02-15 11:25:37 +0000718 for (i = 0; i < ARRAY_SIZE(error->ring); i++) {
719 struct drm_i915_error_object *obj;
Chris Wilson9df30792010-02-18 10:24:56 +0000720
Chris Wilson52d39a22012-02-15 11:25:37 +0000721 if ((obj = error->ring[i].batchbuffer)) {
Chris Wilsonbcfb2e22011-01-07 21:06:07 +0000722 seq_printf(m, "%s --- gtt_offset = 0x%08x\n",
723 dev_priv->ring[i].name,
724 obj->gtt_offset);
Chris Wilson9df30792010-02-18 10:24:56 +0000725 offset = 0;
726 for (page = 0; page < obj->page_count; page++) {
727 for (elt = 0; elt < PAGE_SIZE/4; elt++) {
728 seq_printf(m, "%08x : %08x\n", offset, obj->pages[page][elt]);
729 offset += 4;
730 }
731 }
732 }
Chris Wilson9df30792010-02-18 10:24:56 +0000733
Chris Wilson52d39a22012-02-15 11:25:37 +0000734 if (error->ring[i].num_requests) {
735 seq_printf(m, "%s --- %d requests\n",
736 dev_priv->ring[i].name,
737 error->ring[i].num_requests);
738 for (j = 0; j < error->ring[i].num_requests; j++) {
Chris Wilsonee4f42b2012-02-15 11:25:38 +0000739 seq_printf(m, " seqno 0x%08x, emitted %ld, tail 0x%08x\n",
Chris Wilson52d39a22012-02-15 11:25:37 +0000740 error->ring[i].requests[j].seqno,
Chris Wilsonee4f42b2012-02-15 11:25:38 +0000741 error->ring[i].requests[j].jiffies,
742 error->ring[i].requests[j].tail);
Chris Wilson52d39a22012-02-15 11:25:37 +0000743 }
744 }
745
746 if ((obj = error->ring[i].ringbuffer)) {
Chris Wilsone2f973d2011-01-27 19:15:11 +0000747 seq_printf(m, "%s --- ringbuffer = 0x%08x\n",
748 dev_priv->ring[i].name,
749 obj->gtt_offset);
750 offset = 0;
751 for (page = 0; page < obj->page_count; page++) {
752 for (elt = 0; elt < PAGE_SIZE/4; elt++) {
753 seq_printf(m, "%08x : %08x\n",
754 offset,
755 obj->pages[page][elt]);
756 offset += 4;
757 }
Chris Wilson9df30792010-02-18 10:24:56 +0000758 }
759 }
760 }
Jesse Barnes63eeaf32009-06-18 16:56:52 -0700761
Chris Wilson6ef3d422010-08-04 20:26:07 +0100762 if (error->overlay)
763 intel_overlay_print_error_state(m, error->overlay);
764
Chris Wilsonc4a1d9e2010-11-21 13:12:35 +0000765 if (error->display)
766 intel_display_print_error_state(m, dev, error->display);
767
Jesse Barnes63eeaf32009-06-18 16:56:52 -0700768 return 0;
769}
Ben Gamari6911a9b2009-04-02 11:24:54 -0700770
Daniel Vetterd5442302012-04-27 15:17:40 +0200771static ssize_t
772i915_error_state_write(struct file *filp,
773 const char __user *ubuf,
774 size_t cnt,
775 loff_t *ppos)
776{
777 struct seq_file *m = filp->private_data;
778 struct i915_error_state_file_priv *error_priv = m->private;
779 struct drm_device *dev = error_priv->dev;
Daniel Vetter22bcfc62012-08-09 15:07:02 +0200780 int ret;
Daniel Vetterd5442302012-04-27 15:17:40 +0200781
782 DRM_DEBUG_DRIVER("Resetting error state\n");
783
Daniel Vetter22bcfc62012-08-09 15:07:02 +0200784 ret = mutex_lock_interruptible(&dev->struct_mutex);
785 if (ret)
786 return ret;
787
Daniel Vetterd5442302012-04-27 15:17:40 +0200788 i915_destroy_error_state(dev);
789 mutex_unlock(&dev->struct_mutex);
790
791 return cnt;
792}
793
794static int i915_error_state_open(struct inode *inode, struct file *file)
795{
796 struct drm_device *dev = inode->i_private;
797 drm_i915_private_t *dev_priv = dev->dev_private;
798 struct i915_error_state_file_priv *error_priv;
799 unsigned long flags;
800
801 error_priv = kzalloc(sizeof(*error_priv), GFP_KERNEL);
802 if (!error_priv)
803 return -ENOMEM;
804
805 error_priv->dev = dev;
806
807 spin_lock_irqsave(&dev_priv->error_lock, flags);
808 error_priv->error = dev_priv->first_error;
809 if (error_priv->error)
810 kref_get(&error_priv->error->ref);
811 spin_unlock_irqrestore(&dev_priv->error_lock, flags);
812
813 return single_open(file, i915_error_state, error_priv);
814}
815
816static int i915_error_state_release(struct inode *inode, struct file *file)
817{
818 struct seq_file *m = file->private_data;
819 struct i915_error_state_file_priv *error_priv = m->private;
820
821 if (error_priv->error)
822 kref_put(&error_priv->error->ref, i915_error_state_free);
823 kfree(error_priv);
824
825 return single_release(inode, file);
826}
827
828static const struct file_operations i915_error_state_fops = {
829 .owner = THIS_MODULE,
830 .open = i915_error_state_open,
831 .read = seq_read,
832 .write = i915_error_state_write,
833 .llseek = default_llseek,
834 .release = i915_error_state_release,
835};
836
Jesse Barnesf97108d2010-01-29 11:27:07 -0800837static int i915_rstdby_delays(struct seq_file *m, void *unused)
838{
839 struct drm_info_node *node = (struct drm_info_node *) m->private;
840 struct drm_device *dev = node->minor->dev;
841 drm_i915_private_t *dev_priv = dev->dev_private;
Ben Widawsky616fdb52011-10-05 11:44:54 -0700842 u16 crstanddelay;
843 int ret;
844
845 ret = mutex_lock_interruptible(&dev->struct_mutex);
846 if (ret)
847 return ret;
848
849 crstanddelay = I915_READ16(CRSTANDVID);
850
851 mutex_unlock(&dev->struct_mutex);
Jesse Barnesf97108d2010-01-29 11:27:07 -0800852
853 seq_printf(m, "w/ctx: %d, w/o ctx: %d\n", (crstanddelay >> 8) & 0x3f, (crstanddelay & 0x3f));
854
855 return 0;
856}
857
858static int i915_cur_delayinfo(struct seq_file *m, void *unused)
859{
860 struct drm_info_node *node = (struct drm_info_node *) m->private;
861 struct drm_device *dev = node->minor->dev;
862 drm_i915_private_t *dev_priv = dev->dev_private;
Ben Widawskyd1ebd8162011-04-25 20:11:50 +0100863 int ret;
Jesse Barnesf97108d2010-01-29 11:27:07 -0800864
Jesse Barnes3b8d8d92010-12-17 14:19:02 -0800865 if (IS_GEN5(dev)) {
866 u16 rgvswctl = I915_READ16(MEMSWCTL);
867 u16 rgvstat = I915_READ16(MEMSTAT_ILK);
868
869 seq_printf(m, "Requested P-state: %d\n", (rgvswctl >> 8) & 0xf);
870 seq_printf(m, "Requested VID: %d\n", rgvswctl & 0x3f);
871 seq_printf(m, "Current VID: %d\n", (rgvstat & MEMSTAT_VID_MASK) >>
872 MEMSTAT_VID_SHIFT);
873 seq_printf(m, "Current P-state: %d\n",
874 (rgvstat & MEMSTAT_PSTATE_MASK) >> MEMSTAT_PSTATE_SHIFT);
Jesse Barnes1c70c0c2011-06-29 13:34:36 -0700875 } else if (IS_GEN6(dev) || IS_GEN7(dev)) {
Jesse Barnes3b8d8d92010-12-17 14:19:02 -0800876 u32 gt_perf_status = I915_READ(GEN6_GT_PERF_STATUS);
877 u32 rp_state_limits = I915_READ(GEN6_RP_STATE_LIMITS);
878 u32 rp_state_cap = I915_READ(GEN6_RP_STATE_CAP);
Jesse Barnesccab5c82011-01-18 15:49:25 -0800879 u32 rpstat;
880 u32 rpupei, rpcurup, rpprevup;
881 u32 rpdownei, rpcurdown, rpprevdown;
Jesse Barnes3b8d8d92010-12-17 14:19:02 -0800882 int max_freq;
883
884 /* RPSTAT1 is in the GT power well */
Ben Widawskyd1ebd8162011-04-25 20:11:50 +0100885 ret = mutex_lock_interruptible(&dev->struct_mutex);
886 if (ret)
887 return ret;
888
Ben Widawskyfcca7922011-04-25 11:23:07 -0700889 gen6_gt_force_wake_get(dev_priv);
Jesse Barnes3b8d8d92010-12-17 14:19:02 -0800890
Jesse Barnesccab5c82011-01-18 15:49:25 -0800891 rpstat = I915_READ(GEN6_RPSTAT1);
892 rpupei = I915_READ(GEN6_RP_CUR_UP_EI);
893 rpcurup = I915_READ(GEN6_RP_CUR_UP);
894 rpprevup = I915_READ(GEN6_RP_PREV_UP);
895 rpdownei = I915_READ(GEN6_RP_CUR_DOWN_EI);
896 rpcurdown = I915_READ(GEN6_RP_CUR_DOWN);
897 rpprevdown = I915_READ(GEN6_RP_PREV_DOWN);
898
Ben Widawskyd1ebd8162011-04-25 20:11:50 +0100899 gen6_gt_force_wake_put(dev_priv);
900 mutex_unlock(&dev->struct_mutex);
901
Jesse Barnes3b8d8d92010-12-17 14:19:02 -0800902 seq_printf(m, "GT_PERF_STATUS: 0x%08x\n", gt_perf_status);
Jesse Barnesccab5c82011-01-18 15:49:25 -0800903 seq_printf(m, "RPSTAT1: 0x%08x\n", rpstat);
Jesse Barnes3b8d8d92010-12-17 14:19:02 -0800904 seq_printf(m, "Render p-state ratio: %d\n",
905 (gt_perf_status & 0xff00) >> 8);
906 seq_printf(m, "Render p-state VID: %d\n",
907 gt_perf_status & 0xff);
908 seq_printf(m, "Render p-state limit: %d\n",
909 rp_state_limits & 0xff);
Jesse Barnesccab5c82011-01-18 15:49:25 -0800910 seq_printf(m, "CAGF: %dMHz\n", ((rpstat & GEN6_CAGF_MASK) >>
Jesse Barnese281fca2011-03-18 10:32:07 -0700911 GEN6_CAGF_SHIFT) * 50);
Jesse Barnesccab5c82011-01-18 15:49:25 -0800912 seq_printf(m, "RP CUR UP EI: %dus\n", rpupei &
913 GEN6_CURICONT_MASK);
914 seq_printf(m, "RP CUR UP: %dus\n", rpcurup &
915 GEN6_CURBSYTAVG_MASK);
916 seq_printf(m, "RP PREV UP: %dus\n", rpprevup &
917 GEN6_CURBSYTAVG_MASK);
918 seq_printf(m, "RP CUR DOWN EI: %dus\n", rpdownei &
919 GEN6_CURIAVG_MASK);
920 seq_printf(m, "RP CUR DOWN: %dus\n", rpcurdown &
921 GEN6_CURBSYTAVG_MASK);
922 seq_printf(m, "RP PREV DOWN: %dus\n", rpprevdown &
923 GEN6_CURBSYTAVG_MASK);
Jesse Barnes3b8d8d92010-12-17 14:19:02 -0800924
925 max_freq = (rp_state_cap & 0xff0000) >> 16;
926 seq_printf(m, "Lowest (RPN) frequency: %dMHz\n",
Jesse Barnese281fca2011-03-18 10:32:07 -0700927 max_freq * 50);
Jesse Barnes3b8d8d92010-12-17 14:19:02 -0800928
929 max_freq = (rp_state_cap & 0xff00) >> 8;
930 seq_printf(m, "Nominal (RP1) frequency: %dMHz\n",
Jesse Barnese281fca2011-03-18 10:32:07 -0700931 max_freq * 50);
Jesse Barnes3b8d8d92010-12-17 14:19:02 -0800932
933 max_freq = rp_state_cap & 0xff;
934 seq_printf(m, "Max non-overclocked (RP0) frequency: %dMHz\n",
Jesse Barnese281fca2011-03-18 10:32:07 -0700935 max_freq * 50);
Jesse Barnes3b8d8d92010-12-17 14:19:02 -0800936 } else {
937 seq_printf(m, "no P-state info available\n");
938 }
Jesse Barnesf97108d2010-01-29 11:27:07 -0800939
940 return 0;
941}
942
943static int i915_delayfreq_table(struct seq_file *m, void *unused)
944{
945 struct drm_info_node *node = (struct drm_info_node *) m->private;
946 struct drm_device *dev = node->minor->dev;
947 drm_i915_private_t *dev_priv = dev->dev_private;
948 u32 delayfreq;
Ben Widawsky616fdb52011-10-05 11:44:54 -0700949 int ret, i;
950
951 ret = mutex_lock_interruptible(&dev->struct_mutex);
952 if (ret)
953 return ret;
Jesse Barnesf97108d2010-01-29 11:27:07 -0800954
955 for (i = 0; i < 16; i++) {
956 delayfreq = I915_READ(PXVFREQ_BASE + i * 4);
Jesse Barnes7648fa92010-05-20 14:28:11 -0700957 seq_printf(m, "P%02dVIDFREQ: 0x%08x (VID: %d)\n", i, delayfreq,
958 (delayfreq & PXVFREQ_PX_MASK) >> PXVFREQ_PX_SHIFT);
Jesse Barnesf97108d2010-01-29 11:27:07 -0800959 }
960
Ben Widawsky616fdb52011-10-05 11:44:54 -0700961 mutex_unlock(&dev->struct_mutex);
962
Jesse Barnesf97108d2010-01-29 11:27:07 -0800963 return 0;
964}
965
966static inline int MAP_TO_MV(int map)
967{
968 return 1250 - (map * 25);
969}
970
971static int i915_inttoext_table(struct seq_file *m, void *unused)
972{
973 struct drm_info_node *node = (struct drm_info_node *) m->private;
974 struct drm_device *dev = node->minor->dev;
975 drm_i915_private_t *dev_priv = dev->dev_private;
976 u32 inttoext;
Ben Widawsky616fdb52011-10-05 11:44:54 -0700977 int ret, i;
978
979 ret = mutex_lock_interruptible(&dev->struct_mutex);
980 if (ret)
981 return ret;
Jesse Barnesf97108d2010-01-29 11:27:07 -0800982
983 for (i = 1; i <= 32; i++) {
984 inttoext = I915_READ(INTTOEXT_BASE_ILK + i * 4);
985 seq_printf(m, "INTTOEXT%02d: 0x%08x\n", i, inttoext);
986 }
987
Ben Widawsky616fdb52011-10-05 11:44:54 -0700988 mutex_unlock(&dev->struct_mutex);
989
Jesse Barnesf97108d2010-01-29 11:27:07 -0800990 return 0;
991}
992
Ben Widawsky4d855292011-12-12 19:34:16 -0800993static int ironlake_drpc_info(struct seq_file *m)
Jesse Barnesf97108d2010-01-29 11:27:07 -0800994{
995 struct drm_info_node *node = (struct drm_info_node *) m->private;
996 struct drm_device *dev = node->minor->dev;
997 drm_i915_private_t *dev_priv = dev->dev_private;
Ben Widawsky616fdb52011-10-05 11:44:54 -0700998 u32 rgvmodectl, rstdbyctl;
999 u16 crstandvid;
1000 int ret;
1001
1002 ret = mutex_lock_interruptible(&dev->struct_mutex);
1003 if (ret)
1004 return ret;
1005
1006 rgvmodectl = I915_READ(MEMMODECTL);
1007 rstdbyctl = I915_READ(RSTDBYCTL);
1008 crstandvid = I915_READ16(CRSTANDVID);
1009
1010 mutex_unlock(&dev->struct_mutex);
Jesse Barnesf97108d2010-01-29 11:27:07 -08001011
1012 seq_printf(m, "HD boost: %s\n", (rgvmodectl & MEMMODE_BOOST_EN) ?
1013 "yes" : "no");
1014 seq_printf(m, "Boost freq: %d\n",
1015 (rgvmodectl & MEMMODE_BOOST_FREQ_MASK) >>
1016 MEMMODE_BOOST_FREQ_SHIFT);
1017 seq_printf(m, "HW control enabled: %s\n",
1018 rgvmodectl & MEMMODE_HWIDLE_EN ? "yes" : "no");
1019 seq_printf(m, "SW control enabled: %s\n",
1020 rgvmodectl & MEMMODE_SWMODE_EN ? "yes" : "no");
1021 seq_printf(m, "Gated voltage change: %s\n",
1022 rgvmodectl & MEMMODE_RCLK_GATE ? "yes" : "no");
1023 seq_printf(m, "Starting frequency: P%d\n",
1024 (rgvmodectl & MEMMODE_FSTART_MASK) >> MEMMODE_FSTART_SHIFT);
Jesse Barnes7648fa92010-05-20 14:28:11 -07001025 seq_printf(m, "Max P-state: P%d\n",
Jesse Barnesf97108d2010-01-29 11:27:07 -08001026 (rgvmodectl & MEMMODE_FMAX_MASK) >> MEMMODE_FMAX_SHIFT);
Jesse Barnes7648fa92010-05-20 14:28:11 -07001027 seq_printf(m, "Min P-state: P%d\n", (rgvmodectl & MEMMODE_FMIN_MASK));
1028 seq_printf(m, "RS1 VID: %d\n", (crstandvid & 0x3f));
1029 seq_printf(m, "RS2 VID: %d\n", ((crstandvid >> 8) & 0x3f));
1030 seq_printf(m, "Render standby enabled: %s\n",
1031 (rstdbyctl & RCX_SW_EXIT) ? "no" : "yes");
Jesse Barnes88271da2011-01-05 12:01:24 -08001032 seq_printf(m, "Current RS state: ");
1033 switch (rstdbyctl & RSX_STATUS_MASK) {
1034 case RSX_STATUS_ON:
1035 seq_printf(m, "on\n");
1036 break;
1037 case RSX_STATUS_RC1:
1038 seq_printf(m, "RC1\n");
1039 break;
1040 case RSX_STATUS_RC1E:
1041 seq_printf(m, "RC1E\n");
1042 break;
1043 case RSX_STATUS_RS1:
1044 seq_printf(m, "RS1\n");
1045 break;
1046 case RSX_STATUS_RS2:
1047 seq_printf(m, "RS2 (RC6)\n");
1048 break;
1049 case RSX_STATUS_RS3:
1050 seq_printf(m, "RC3 (RC6+)\n");
1051 break;
1052 default:
1053 seq_printf(m, "unknown\n");
1054 break;
1055 }
Jesse Barnesf97108d2010-01-29 11:27:07 -08001056
1057 return 0;
1058}
1059
Ben Widawsky4d855292011-12-12 19:34:16 -08001060static int gen6_drpc_info(struct seq_file *m)
1061{
1062
1063 struct drm_info_node *node = (struct drm_info_node *) m->private;
1064 struct drm_device *dev = node->minor->dev;
1065 struct drm_i915_private *dev_priv = dev->dev_private;
1066 u32 rpmodectl1, gt_core_status, rcctl1;
Daniel Vetter93b525d2012-01-25 13:52:43 +01001067 unsigned forcewake_count;
Ben Widawsky4d855292011-12-12 19:34:16 -08001068 int count=0, ret;
1069
1070
1071 ret = mutex_lock_interruptible(&dev->struct_mutex);
1072 if (ret)
1073 return ret;
1074
Daniel Vetter93b525d2012-01-25 13:52:43 +01001075 spin_lock_irq(&dev_priv->gt_lock);
1076 forcewake_count = dev_priv->forcewake_count;
1077 spin_unlock_irq(&dev_priv->gt_lock);
1078
1079 if (forcewake_count) {
1080 seq_printf(m, "RC information inaccurate because somebody "
1081 "holds a forcewake reference \n");
Ben Widawsky4d855292011-12-12 19:34:16 -08001082 } else {
1083 /* NB: we cannot use forcewake, else we read the wrong values */
1084 while (count++ < 50 && (I915_READ_NOTRACE(FORCEWAKE_ACK) & 1))
1085 udelay(10);
1086 seq_printf(m, "RC information accurate: %s\n", yesno(count < 51));
1087 }
1088
1089 gt_core_status = readl(dev_priv->regs + GEN6_GT_CORE_STATUS);
1090 trace_i915_reg_rw(false, GEN6_GT_CORE_STATUS, gt_core_status, 4);
1091
1092 rpmodectl1 = I915_READ(GEN6_RP_CONTROL);
1093 rcctl1 = I915_READ(GEN6_RC_CONTROL);
1094 mutex_unlock(&dev->struct_mutex);
1095
1096 seq_printf(m, "Video Turbo Mode: %s\n",
1097 yesno(rpmodectl1 & GEN6_RP_MEDIA_TURBO));
1098 seq_printf(m, "HW control enabled: %s\n",
1099 yesno(rpmodectl1 & GEN6_RP_ENABLE));
1100 seq_printf(m, "SW control enabled: %s\n",
1101 yesno((rpmodectl1 & GEN6_RP_MEDIA_MODE_MASK) ==
1102 GEN6_RP_MEDIA_SW_MODE));
Eric Anholtfff24e22012-01-23 16:14:05 -08001103 seq_printf(m, "RC1e Enabled: %s\n",
Ben Widawsky4d855292011-12-12 19:34:16 -08001104 yesno(rcctl1 & GEN6_RC_CTL_RC1e_ENABLE));
1105 seq_printf(m, "RC6 Enabled: %s\n",
1106 yesno(rcctl1 & GEN6_RC_CTL_RC6_ENABLE));
1107 seq_printf(m, "Deep RC6 Enabled: %s\n",
1108 yesno(rcctl1 & GEN6_RC_CTL_RC6p_ENABLE));
1109 seq_printf(m, "Deepest RC6 Enabled: %s\n",
1110 yesno(rcctl1 & GEN6_RC_CTL_RC6pp_ENABLE));
1111 seq_printf(m, "Current RC state: ");
1112 switch (gt_core_status & GEN6_RCn_MASK) {
1113 case GEN6_RC0:
1114 if (gt_core_status & GEN6_CORE_CPD_STATE_MASK)
1115 seq_printf(m, "Core Power Down\n");
1116 else
1117 seq_printf(m, "on\n");
1118 break;
1119 case GEN6_RC3:
1120 seq_printf(m, "RC3\n");
1121 break;
1122 case GEN6_RC6:
1123 seq_printf(m, "RC6\n");
1124 break;
1125 case GEN6_RC7:
1126 seq_printf(m, "RC7\n");
1127 break;
1128 default:
1129 seq_printf(m, "Unknown\n");
1130 break;
1131 }
1132
1133 seq_printf(m, "Core Power Down: %s\n",
1134 yesno(gt_core_status & GEN6_CORE_CPD_STATE_MASK));
Ben Widawskycce66a22012-03-27 18:59:38 -07001135
1136 /* Not exactly sure what this is */
1137 seq_printf(m, "RC6 \"Locked to RPn\" residency since boot: %u\n",
1138 I915_READ(GEN6_GT_GFX_RC6_LOCKED));
1139 seq_printf(m, "RC6 residency since boot: %u\n",
1140 I915_READ(GEN6_GT_GFX_RC6));
1141 seq_printf(m, "RC6+ residency since boot: %u\n",
1142 I915_READ(GEN6_GT_GFX_RC6p));
1143 seq_printf(m, "RC6++ residency since boot: %u\n",
1144 I915_READ(GEN6_GT_GFX_RC6pp));
1145
Ben Widawsky4d855292011-12-12 19:34:16 -08001146 return 0;
1147}
1148
1149static int i915_drpc_info(struct seq_file *m, void *unused)
1150{
1151 struct drm_info_node *node = (struct drm_info_node *) m->private;
1152 struct drm_device *dev = node->minor->dev;
1153
1154 if (IS_GEN6(dev) || IS_GEN7(dev))
1155 return gen6_drpc_info(m);
1156 else
1157 return ironlake_drpc_info(m);
1158}
1159
Jesse Barnesb5e50c32010-02-05 12:42:41 -08001160static int i915_fbc_status(struct seq_file *m, void *unused)
1161{
1162 struct drm_info_node *node = (struct drm_info_node *) m->private;
1163 struct drm_device *dev = node->minor->dev;
Jesse Barnesb5e50c32010-02-05 12:42:41 -08001164 drm_i915_private_t *dev_priv = dev->dev_private;
Jesse Barnesb5e50c32010-02-05 12:42:41 -08001165
Adam Jacksonee5382a2010-04-23 11:17:39 -04001166 if (!I915_HAS_FBC(dev)) {
Jesse Barnesb5e50c32010-02-05 12:42:41 -08001167 seq_printf(m, "FBC unsupported on this chipset\n");
1168 return 0;
1169 }
1170
Adam Jacksonee5382a2010-04-23 11:17:39 -04001171 if (intel_fbc_enabled(dev)) {
Jesse Barnesb5e50c32010-02-05 12:42:41 -08001172 seq_printf(m, "FBC enabled\n");
1173 } else {
1174 seq_printf(m, "FBC disabled: ");
1175 switch (dev_priv->no_fbc_reason) {
Chris Wilsonbed4a672010-09-11 10:47:47 +01001176 case FBC_NO_OUTPUT:
1177 seq_printf(m, "no outputs");
1178 break;
Jesse Barnesb5e50c32010-02-05 12:42:41 -08001179 case FBC_STOLEN_TOO_SMALL:
1180 seq_printf(m, "not enough stolen memory");
1181 break;
1182 case FBC_UNSUPPORTED_MODE:
1183 seq_printf(m, "mode not supported");
1184 break;
1185 case FBC_MODE_TOO_LARGE:
1186 seq_printf(m, "mode too large");
1187 break;
1188 case FBC_BAD_PLANE:
1189 seq_printf(m, "FBC unsupported on plane");
1190 break;
1191 case FBC_NOT_TILED:
1192 seq_printf(m, "scanout buffer not tiled");
1193 break;
Jesse Barnes9c928d12010-07-23 15:20:00 -07001194 case FBC_MULTIPLE_PIPES:
1195 seq_printf(m, "multiple pipes are enabled");
1196 break;
Jesse Barnesc1a9f042011-05-05 15:24:21 -07001197 case FBC_MODULE_PARAM:
1198 seq_printf(m, "disabled per module param (default off)");
1199 break;
Jesse Barnesb5e50c32010-02-05 12:42:41 -08001200 default:
1201 seq_printf(m, "unknown reason");
1202 }
1203 seq_printf(m, "\n");
1204 }
1205 return 0;
1206}
1207
Jesse Barnes4a9bef32010-02-05 12:47:35 -08001208static int i915_sr_status(struct seq_file *m, void *unused)
1209{
1210 struct drm_info_node *node = (struct drm_info_node *) m->private;
1211 struct drm_device *dev = node->minor->dev;
1212 drm_i915_private_t *dev_priv = dev->dev_private;
1213 bool sr_enabled = false;
1214
Yuanhan Liu13982612010-12-15 15:42:31 +08001215 if (HAS_PCH_SPLIT(dev))
Chris Wilson5ba2aaa2010-08-19 18:04:08 +01001216 sr_enabled = I915_READ(WM1_LP_ILK) & WM1_LP_SR_EN;
Chris Wilsona6c45cf2010-09-17 00:32:17 +01001217 else if (IS_CRESTLINE(dev) || IS_I945G(dev) || IS_I945GM(dev))
Jesse Barnes4a9bef32010-02-05 12:47:35 -08001218 sr_enabled = I915_READ(FW_BLC_SELF) & FW_BLC_SELF_EN;
1219 else if (IS_I915GM(dev))
1220 sr_enabled = I915_READ(INSTPM) & INSTPM_SELF_EN;
1221 else if (IS_PINEVIEW(dev))
1222 sr_enabled = I915_READ(DSPFW3) & PINEVIEW_SELF_REFRESH_EN;
1223
Chris Wilson5ba2aaa2010-08-19 18:04:08 +01001224 seq_printf(m, "self-refresh: %s\n",
1225 sr_enabled ? "enabled" : "disabled");
Jesse Barnes4a9bef32010-02-05 12:47:35 -08001226
1227 return 0;
1228}
1229
Jesse Barnes7648fa92010-05-20 14:28:11 -07001230static int i915_emon_status(struct seq_file *m, void *unused)
1231{
1232 struct drm_info_node *node = (struct drm_info_node *) m->private;
1233 struct drm_device *dev = node->minor->dev;
1234 drm_i915_private_t *dev_priv = dev->dev_private;
1235 unsigned long temp, chipset, gfx;
Chris Wilsonde227ef2010-07-03 07:58:38 +01001236 int ret;
1237
Chris Wilson582be6b2012-04-30 19:35:02 +01001238 if (!IS_GEN5(dev))
1239 return -ENODEV;
1240
Chris Wilsonde227ef2010-07-03 07:58:38 +01001241 ret = mutex_lock_interruptible(&dev->struct_mutex);
1242 if (ret)
1243 return ret;
Jesse Barnes7648fa92010-05-20 14:28:11 -07001244
1245 temp = i915_mch_val(dev_priv);
1246 chipset = i915_chipset_val(dev_priv);
1247 gfx = i915_gfx_val(dev_priv);
Chris Wilsonde227ef2010-07-03 07:58:38 +01001248 mutex_unlock(&dev->struct_mutex);
Jesse Barnes7648fa92010-05-20 14:28:11 -07001249
1250 seq_printf(m, "GMCH temp: %ld\n", temp);
1251 seq_printf(m, "Chipset power: %ld\n", chipset);
1252 seq_printf(m, "GFX power: %ld\n", gfx);
1253 seq_printf(m, "Total power: %ld\n", chipset + gfx);
1254
1255 return 0;
1256}
1257
Jesse Barnes23b2f8b2011-06-28 13:04:16 -07001258static int i915_ring_freq_table(struct seq_file *m, void *unused)
1259{
1260 struct drm_info_node *node = (struct drm_info_node *) m->private;
1261 struct drm_device *dev = node->minor->dev;
1262 drm_i915_private_t *dev_priv = dev->dev_private;
1263 int ret;
1264 int gpu_freq, ia_freq;
1265
Jesse Barnes1c70c0c2011-06-29 13:34:36 -07001266 if (!(IS_GEN6(dev) || IS_GEN7(dev))) {
Jesse Barnes23b2f8b2011-06-28 13:04:16 -07001267 seq_printf(m, "unsupported on this chipset\n");
1268 return 0;
1269 }
1270
1271 ret = mutex_lock_interruptible(&dev->struct_mutex);
1272 if (ret)
1273 return ret;
1274
1275 seq_printf(m, "GPU freq (MHz)\tEffective CPU freq (MHz)\n");
1276
1277 for (gpu_freq = dev_priv->min_delay; gpu_freq <= dev_priv->max_delay;
1278 gpu_freq++) {
1279 I915_WRITE(GEN6_PCODE_DATA, gpu_freq);
1280 I915_WRITE(GEN6_PCODE_MAILBOX, GEN6_PCODE_READY |
1281 GEN6_PCODE_READ_MIN_FREQ_TABLE);
1282 if (wait_for((I915_READ(GEN6_PCODE_MAILBOX) &
1283 GEN6_PCODE_READY) == 0, 10)) {
1284 DRM_ERROR("pcode read of freq table timed out\n");
1285 continue;
1286 }
1287 ia_freq = I915_READ(GEN6_PCODE_DATA);
1288 seq_printf(m, "%d\t\t%d\n", gpu_freq * 50, ia_freq * 100);
1289 }
1290
1291 mutex_unlock(&dev->struct_mutex);
1292
1293 return 0;
1294}
1295
Jesse Barnes7648fa92010-05-20 14:28:11 -07001296static int i915_gfxec(struct seq_file *m, void *unused)
1297{
1298 struct drm_info_node *node = (struct drm_info_node *) m->private;
1299 struct drm_device *dev = node->minor->dev;
1300 drm_i915_private_t *dev_priv = dev->dev_private;
Ben Widawsky616fdb52011-10-05 11:44:54 -07001301 int ret;
1302
1303 ret = mutex_lock_interruptible(&dev->struct_mutex);
1304 if (ret)
1305 return ret;
Jesse Barnes7648fa92010-05-20 14:28:11 -07001306
1307 seq_printf(m, "GFXEC: %ld\n", (unsigned long)I915_READ(0x112f4));
1308
Ben Widawsky616fdb52011-10-05 11:44:54 -07001309 mutex_unlock(&dev->struct_mutex);
1310
Jesse Barnes7648fa92010-05-20 14:28:11 -07001311 return 0;
1312}
1313
Chris Wilson44834a62010-08-19 16:09:23 +01001314static int i915_opregion(struct seq_file *m, void *unused)
1315{
1316 struct drm_info_node *node = (struct drm_info_node *) m->private;
1317 struct drm_device *dev = node->minor->dev;
1318 drm_i915_private_t *dev_priv = dev->dev_private;
1319 struct intel_opregion *opregion = &dev_priv->opregion;
Daniel Vetter0d38f002012-04-21 22:49:10 +02001320 void *data = kmalloc(OPREGION_SIZE, GFP_KERNEL);
Chris Wilson44834a62010-08-19 16:09:23 +01001321 int ret;
1322
Daniel Vetter0d38f002012-04-21 22:49:10 +02001323 if (data == NULL)
1324 return -ENOMEM;
1325
Chris Wilson44834a62010-08-19 16:09:23 +01001326 ret = mutex_lock_interruptible(&dev->struct_mutex);
1327 if (ret)
Daniel Vetter0d38f002012-04-21 22:49:10 +02001328 goto out;
Chris Wilson44834a62010-08-19 16:09:23 +01001329
Daniel Vetter0d38f002012-04-21 22:49:10 +02001330 if (opregion->header) {
1331 memcpy_fromio(data, opregion->header, OPREGION_SIZE);
1332 seq_write(m, data, OPREGION_SIZE);
1333 }
Chris Wilson44834a62010-08-19 16:09:23 +01001334
1335 mutex_unlock(&dev->struct_mutex);
1336
Daniel Vetter0d38f002012-04-21 22:49:10 +02001337out:
1338 kfree(data);
Chris Wilson44834a62010-08-19 16:09:23 +01001339 return 0;
1340}
1341
Chris Wilson37811fc2010-08-25 22:45:57 +01001342static int i915_gem_framebuffer_info(struct seq_file *m, void *data)
1343{
1344 struct drm_info_node *node = (struct drm_info_node *) m->private;
1345 struct drm_device *dev = node->minor->dev;
1346 drm_i915_private_t *dev_priv = dev->dev_private;
1347 struct intel_fbdev *ifbdev;
1348 struct intel_framebuffer *fb;
1349 int ret;
1350
1351 ret = mutex_lock_interruptible(&dev->mode_config.mutex);
1352 if (ret)
1353 return ret;
1354
1355 ifbdev = dev_priv->fbdev;
1356 fb = to_intel_framebuffer(ifbdev->helper.fb);
1357
1358 seq_printf(m, "fbcon size: %d x %d, depth %d, %d bpp, obj ",
1359 fb->base.width,
1360 fb->base.height,
1361 fb->base.depth,
1362 fb->base.bits_per_pixel);
Chris Wilson05394f32010-11-08 19:18:58 +00001363 describe_obj(m, fb->obj);
Chris Wilson37811fc2010-08-25 22:45:57 +01001364 seq_printf(m, "\n");
1365
1366 list_for_each_entry(fb, &dev->mode_config.fb_list, base.head) {
1367 if (&fb->base == ifbdev->helper.fb)
1368 continue;
1369
1370 seq_printf(m, "user size: %d x %d, depth %d, %d bpp, obj ",
1371 fb->base.width,
1372 fb->base.height,
1373 fb->base.depth,
1374 fb->base.bits_per_pixel);
Chris Wilson05394f32010-11-08 19:18:58 +00001375 describe_obj(m, fb->obj);
Chris Wilson37811fc2010-08-25 22:45:57 +01001376 seq_printf(m, "\n");
1377 }
1378
1379 mutex_unlock(&dev->mode_config.mutex);
1380
1381 return 0;
1382}
1383
Ben Widawskye76d3632011-03-19 18:14:29 -07001384static int i915_context_status(struct seq_file *m, void *unused)
1385{
1386 struct drm_info_node *node = (struct drm_info_node *) m->private;
1387 struct drm_device *dev = node->minor->dev;
1388 drm_i915_private_t *dev_priv = dev->dev_private;
1389 int ret;
1390
1391 ret = mutex_lock_interruptible(&dev->mode_config.mutex);
1392 if (ret)
1393 return ret;
1394
Ben Widawskydc501fb2011-06-29 11:41:51 -07001395 if (dev_priv->pwrctx) {
1396 seq_printf(m, "power context ");
1397 describe_obj(m, dev_priv->pwrctx);
1398 seq_printf(m, "\n");
1399 }
Ben Widawskye76d3632011-03-19 18:14:29 -07001400
Ben Widawskydc501fb2011-06-29 11:41:51 -07001401 if (dev_priv->renderctx) {
1402 seq_printf(m, "render context ");
1403 describe_obj(m, dev_priv->renderctx);
1404 seq_printf(m, "\n");
1405 }
Ben Widawskye76d3632011-03-19 18:14:29 -07001406
1407 mutex_unlock(&dev->mode_config.mutex);
1408
1409 return 0;
1410}
1411
Ben Widawsky6d794d42011-04-25 11:25:56 -07001412static int i915_gen6_forcewake_count_info(struct seq_file *m, void *data)
1413{
1414 struct drm_info_node *node = (struct drm_info_node *) m->private;
1415 struct drm_device *dev = node->minor->dev;
1416 struct drm_i915_private *dev_priv = dev->dev_private;
Daniel Vetter9f1f46a2011-12-14 13:57:03 +01001417 unsigned forcewake_count;
Ben Widawsky6d794d42011-04-25 11:25:56 -07001418
Daniel Vetter9f1f46a2011-12-14 13:57:03 +01001419 spin_lock_irq(&dev_priv->gt_lock);
1420 forcewake_count = dev_priv->forcewake_count;
1421 spin_unlock_irq(&dev_priv->gt_lock);
1422
1423 seq_printf(m, "forcewake count = %u\n", forcewake_count);
Ben Widawsky6d794d42011-04-25 11:25:56 -07001424
1425 return 0;
1426}
1427
Daniel Vetterea16a3c2011-12-14 13:57:16 +01001428static const char *swizzle_string(unsigned swizzle)
1429{
1430 switch(swizzle) {
1431 case I915_BIT_6_SWIZZLE_NONE:
1432 return "none";
1433 case I915_BIT_6_SWIZZLE_9:
1434 return "bit9";
1435 case I915_BIT_6_SWIZZLE_9_10:
1436 return "bit9/bit10";
1437 case I915_BIT_6_SWIZZLE_9_11:
1438 return "bit9/bit11";
1439 case I915_BIT_6_SWIZZLE_9_10_11:
1440 return "bit9/bit10/bit11";
1441 case I915_BIT_6_SWIZZLE_9_17:
1442 return "bit9/bit17";
1443 case I915_BIT_6_SWIZZLE_9_10_17:
1444 return "bit9/bit10/bit17";
1445 case I915_BIT_6_SWIZZLE_UNKNOWN:
1446 return "unkown";
1447 }
1448
1449 return "bug";
1450}
1451
1452static int i915_swizzle_info(struct seq_file *m, void *data)
1453{
1454 struct drm_info_node *node = (struct drm_info_node *) m->private;
1455 struct drm_device *dev = node->minor->dev;
1456 struct drm_i915_private *dev_priv = dev->dev_private;
Daniel Vetter22bcfc62012-08-09 15:07:02 +02001457 int ret;
Daniel Vetterea16a3c2011-12-14 13:57:16 +01001458
Daniel Vetter22bcfc62012-08-09 15:07:02 +02001459 ret = mutex_lock_interruptible(&dev->struct_mutex);
1460 if (ret)
1461 return ret;
1462
Daniel Vetterea16a3c2011-12-14 13:57:16 +01001463 seq_printf(m, "bit6 swizzle for X-tiling = %s\n",
1464 swizzle_string(dev_priv->mm.bit_6_swizzle_x));
1465 seq_printf(m, "bit6 swizzle for Y-tiling = %s\n",
1466 swizzle_string(dev_priv->mm.bit_6_swizzle_y));
1467
1468 if (IS_GEN3(dev) || IS_GEN4(dev)) {
1469 seq_printf(m, "DDC = 0x%08x\n",
1470 I915_READ(DCC));
1471 seq_printf(m, "C0DRB3 = 0x%04x\n",
1472 I915_READ16(C0DRB3));
1473 seq_printf(m, "C1DRB3 = 0x%04x\n",
1474 I915_READ16(C1DRB3));
Daniel Vetter3fa7d232012-01-31 16:47:56 +01001475 } else if (IS_GEN6(dev) || IS_GEN7(dev)) {
1476 seq_printf(m, "MAD_DIMM_C0 = 0x%08x\n",
1477 I915_READ(MAD_DIMM_C0));
1478 seq_printf(m, "MAD_DIMM_C1 = 0x%08x\n",
1479 I915_READ(MAD_DIMM_C1));
1480 seq_printf(m, "MAD_DIMM_C2 = 0x%08x\n",
1481 I915_READ(MAD_DIMM_C2));
1482 seq_printf(m, "TILECTL = 0x%08x\n",
1483 I915_READ(TILECTL));
1484 seq_printf(m, "ARB_MODE = 0x%08x\n",
1485 I915_READ(ARB_MODE));
1486 seq_printf(m, "DISP_ARB_CTL = 0x%08x\n",
1487 I915_READ(DISP_ARB_CTL));
Daniel Vetterea16a3c2011-12-14 13:57:16 +01001488 }
1489 mutex_unlock(&dev->struct_mutex);
1490
1491 return 0;
1492}
1493
Daniel Vetter3cf17fc2012-02-09 17:15:49 +01001494static int i915_ppgtt_info(struct seq_file *m, void *data)
1495{
1496 struct drm_info_node *node = (struct drm_info_node *) m->private;
1497 struct drm_device *dev = node->minor->dev;
1498 struct drm_i915_private *dev_priv = dev->dev_private;
1499 struct intel_ring_buffer *ring;
1500 int i, ret;
1501
1502
1503 ret = mutex_lock_interruptible(&dev->struct_mutex);
1504 if (ret)
1505 return ret;
1506 if (INTEL_INFO(dev)->gen == 6)
1507 seq_printf(m, "GFX_MODE: 0x%08x\n", I915_READ(GFX_MODE));
1508
1509 for (i = 0; i < I915_NUM_RINGS; i++) {
1510 ring = &dev_priv->ring[i];
1511
1512 seq_printf(m, "%s\n", ring->name);
1513 if (INTEL_INFO(dev)->gen == 7)
1514 seq_printf(m, "GFX_MODE: 0x%08x\n", I915_READ(RING_MODE_GEN7(ring)));
1515 seq_printf(m, "PP_DIR_BASE: 0x%08x\n", I915_READ(RING_PP_DIR_BASE(ring)));
1516 seq_printf(m, "PP_DIR_BASE_READ: 0x%08x\n", I915_READ(RING_PP_DIR_BASE_READ(ring)));
1517 seq_printf(m, "PP_DIR_DCLV: 0x%08x\n", I915_READ(RING_PP_DIR_DCLV(ring)));
1518 }
1519 if (dev_priv->mm.aliasing_ppgtt) {
1520 struct i915_hw_ppgtt *ppgtt = dev_priv->mm.aliasing_ppgtt;
1521
1522 seq_printf(m, "aliasing PPGTT:\n");
1523 seq_printf(m, "pd gtt offset: 0x%08x\n", ppgtt->pd_offset);
1524 }
1525 seq_printf(m, "ECOCHK: 0x%08x\n", I915_READ(GAM_ECOCHK));
1526 mutex_unlock(&dev->struct_mutex);
1527
1528 return 0;
1529}
1530
Jesse Barnes57f350b2012-03-28 13:39:25 -07001531static int i915_dpio_info(struct seq_file *m, void *data)
1532{
1533 struct drm_info_node *node = (struct drm_info_node *) m->private;
1534 struct drm_device *dev = node->minor->dev;
1535 struct drm_i915_private *dev_priv = dev->dev_private;
1536 int ret;
1537
1538
1539 if (!IS_VALLEYVIEW(dev)) {
1540 seq_printf(m, "unsupported\n");
1541 return 0;
1542 }
1543
1544 ret = mutex_lock_interruptible(&dev->mode_config.mutex);
1545 if (ret)
1546 return ret;
1547
1548 seq_printf(m, "DPIO_CTL: 0x%08x\n", I915_READ(DPIO_CTL));
1549
1550 seq_printf(m, "DPIO_DIV_A: 0x%08x\n",
1551 intel_dpio_read(dev_priv, _DPIO_DIV_A));
1552 seq_printf(m, "DPIO_DIV_B: 0x%08x\n",
1553 intel_dpio_read(dev_priv, _DPIO_DIV_B));
1554
1555 seq_printf(m, "DPIO_REFSFR_A: 0x%08x\n",
1556 intel_dpio_read(dev_priv, _DPIO_REFSFR_A));
1557 seq_printf(m, "DPIO_REFSFR_B: 0x%08x\n",
1558 intel_dpio_read(dev_priv, _DPIO_REFSFR_B));
1559
1560 seq_printf(m, "DPIO_CORE_CLK_A: 0x%08x\n",
1561 intel_dpio_read(dev_priv, _DPIO_CORE_CLK_A));
1562 seq_printf(m, "DPIO_CORE_CLK_B: 0x%08x\n",
1563 intel_dpio_read(dev_priv, _DPIO_CORE_CLK_B));
1564
1565 seq_printf(m, "DPIO_LFP_COEFF_A: 0x%08x\n",
1566 intel_dpio_read(dev_priv, _DPIO_LFP_COEFF_A));
1567 seq_printf(m, "DPIO_LFP_COEFF_B: 0x%08x\n",
1568 intel_dpio_read(dev_priv, _DPIO_LFP_COEFF_B));
1569
1570 seq_printf(m, "DPIO_FASTCLK_DISABLE: 0x%08x\n",
1571 intel_dpio_read(dev_priv, DPIO_FASTCLK_DISABLE));
1572
1573 mutex_unlock(&dev->mode_config.mutex);
1574
1575 return 0;
1576}
1577
Chris Wilsonf3cd4742009-10-13 22:20:20 +01001578static ssize_t
1579i915_wedged_read(struct file *filp,
1580 char __user *ubuf,
1581 size_t max,
1582 loff_t *ppos)
1583{
1584 struct drm_device *dev = filp->private_data;
1585 drm_i915_private_t *dev_priv = dev->dev_private;
1586 char buf[80];
1587 int len;
1588
Akshay Joshi0206e352011-08-16 15:34:10 -04001589 len = snprintf(buf, sizeof(buf),
Chris Wilsonf3cd4742009-10-13 22:20:20 +01001590 "wedged : %d\n",
1591 atomic_read(&dev_priv->mm.wedged));
1592
Akshay Joshi0206e352011-08-16 15:34:10 -04001593 if (len > sizeof(buf))
1594 len = sizeof(buf);
Dan Carpenterf4433a82010-09-08 21:44:47 +02001595
Chris Wilsonf3cd4742009-10-13 22:20:20 +01001596 return simple_read_from_buffer(ubuf, max, ppos, buf, len);
1597}
1598
1599static ssize_t
1600i915_wedged_write(struct file *filp,
1601 const char __user *ubuf,
1602 size_t cnt,
1603 loff_t *ppos)
1604{
1605 struct drm_device *dev = filp->private_data;
Chris Wilsonf3cd4742009-10-13 22:20:20 +01001606 char buf[20];
1607 int val = 1;
1608
1609 if (cnt > 0) {
Akshay Joshi0206e352011-08-16 15:34:10 -04001610 if (cnt > sizeof(buf) - 1)
Chris Wilsonf3cd4742009-10-13 22:20:20 +01001611 return -EINVAL;
1612
1613 if (copy_from_user(buf, ubuf, cnt))
1614 return -EFAULT;
1615 buf[cnt] = 0;
1616
1617 val = simple_strtoul(buf, NULL, 0);
1618 }
1619
1620 DRM_INFO("Manually setting wedged to %d\n", val);
Chris Wilson527f9e92010-11-11 01:16:58 +00001621 i915_handle_error(dev, val);
Chris Wilsonf3cd4742009-10-13 22:20:20 +01001622
1623 return cnt;
1624}
1625
1626static const struct file_operations i915_wedged_fops = {
1627 .owner = THIS_MODULE,
Stephen Boyd234e3402012-04-05 14:25:11 -07001628 .open = simple_open,
Chris Wilsonf3cd4742009-10-13 22:20:20 +01001629 .read = i915_wedged_read,
1630 .write = i915_wedged_write,
Arnd Bergmann6038f372010-08-15 18:52:59 +02001631 .llseek = default_llseek,
Chris Wilsonf3cd4742009-10-13 22:20:20 +01001632};
1633
Jesse Barnes358733e2011-07-27 11:53:01 -07001634static ssize_t
Daniel Vettere5eb3d62012-05-03 14:48:16 +02001635i915_ring_stop_read(struct file *filp,
1636 char __user *ubuf,
1637 size_t max,
1638 loff_t *ppos)
1639{
1640 struct drm_device *dev = filp->private_data;
1641 drm_i915_private_t *dev_priv = dev->dev_private;
1642 char buf[20];
1643 int len;
1644
1645 len = snprintf(buf, sizeof(buf),
1646 "0x%08x\n", dev_priv->stop_rings);
1647
1648 if (len > sizeof(buf))
1649 len = sizeof(buf);
1650
1651 return simple_read_from_buffer(ubuf, max, ppos, buf, len);
1652}
1653
1654static ssize_t
1655i915_ring_stop_write(struct file *filp,
1656 const char __user *ubuf,
1657 size_t cnt,
1658 loff_t *ppos)
1659{
1660 struct drm_device *dev = filp->private_data;
1661 struct drm_i915_private *dev_priv = dev->dev_private;
1662 char buf[20];
Daniel Vetter22bcfc62012-08-09 15:07:02 +02001663 int val = 0, ret;
Daniel Vettere5eb3d62012-05-03 14:48:16 +02001664
1665 if (cnt > 0) {
1666 if (cnt > sizeof(buf) - 1)
1667 return -EINVAL;
1668
1669 if (copy_from_user(buf, ubuf, cnt))
1670 return -EFAULT;
1671 buf[cnt] = 0;
1672
1673 val = simple_strtoul(buf, NULL, 0);
1674 }
1675
1676 DRM_DEBUG_DRIVER("Stopping rings 0x%08x\n", val);
1677
Daniel Vetter22bcfc62012-08-09 15:07:02 +02001678 ret = mutex_lock_interruptible(&dev->struct_mutex);
1679 if (ret)
1680 return ret;
1681
Daniel Vettere5eb3d62012-05-03 14:48:16 +02001682 dev_priv->stop_rings = val;
1683 mutex_unlock(&dev->struct_mutex);
1684
1685 return cnt;
1686}
1687
1688static const struct file_operations i915_ring_stop_fops = {
1689 .owner = THIS_MODULE,
1690 .open = simple_open,
1691 .read = i915_ring_stop_read,
1692 .write = i915_ring_stop_write,
1693 .llseek = default_llseek,
1694};
Daniel Vetterd5442302012-04-27 15:17:40 +02001695
Daniel Vettere5eb3d62012-05-03 14:48:16 +02001696static ssize_t
Jesse Barnes358733e2011-07-27 11:53:01 -07001697i915_max_freq_read(struct file *filp,
1698 char __user *ubuf,
1699 size_t max,
1700 loff_t *ppos)
1701{
1702 struct drm_device *dev = filp->private_data;
1703 drm_i915_private_t *dev_priv = dev->dev_private;
1704 char buf[80];
Daniel Vetter004777c2012-08-09 15:07:01 +02001705 int len, ret;
1706
1707 if (!(IS_GEN6(dev) || IS_GEN7(dev)))
1708 return -ENODEV;
1709
1710 ret = mutex_lock_interruptible(&dev->struct_mutex);
1711 if (ret)
1712 return ret;
Jesse Barnes358733e2011-07-27 11:53:01 -07001713
Akshay Joshi0206e352011-08-16 15:34:10 -04001714 len = snprintf(buf, sizeof(buf),
Jesse Barnes358733e2011-07-27 11:53:01 -07001715 "max freq: %d\n", dev_priv->max_delay * 50);
Daniel Vetter004777c2012-08-09 15:07:01 +02001716 mutex_unlock(&dev->struct_mutex);
Jesse Barnes358733e2011-07-27 11:53:01 -07001717
Akshay Joshi0206e352011-08-16 15:34:10 -04001718 if (len > sizeof(buf))
1719 len = sizeof(buf);
Jesse Barnes358733e2011-07-27 11:53:01 -07001720
1721 return simple_read_from_buffer(ubuf, max, ppos, buf, len);
1722}
1723
1724static ssize_t
1725i915_max_freq_write(struct file *filp,
1726 const char __user *ubuf,
1727 size_t cnt,
1728 loff_t *ppos)
1729{
1730 struct drm_device *dev = filp->private_data;
1731 struct drm_i915_private *dev_priv = dev->dev_private;
1732 char buf[20];
Daniel Vetter004777c2012-08-09 15:07:01 +02001733 int val = 1, ret;
1734
1735 if (!(IS_GEN6(dev) || IS_GEN7(dev)))
1736 return -ENODEV;
Jesse Barnes358733e2011-07-27 11:53:01 -07001737
1738 if (cnt > 0) {
Akshay Joshi0206e352011-08-16 15:34:10 -04001739 if (cnt > sizeof(buf) - 1)
Jesse Barnes358733e2011-07-27 11:53:01 -07001740 return -EINVAL;
1741
1742 if (copy_from_user(buf, ubuf, cnt))
1743 return -EFAULT;
1744 buf[cnt] = 0;
1745
1746 val = simple_strtoul(buf, NULL, 0);
1747 }
1748
1749 DRM_DEBUG_DRIVER("Manually setting max freq to %d\n", val);
1750
Daniel Vetter004777c2012-08-09 15:07:01 +02001751 ret = mutex_lock_interruptible(&dev->struct_mutex);
1752 if (ret)
1753 return ret;
1754
Jesse Barnes358733e2011-07-27 11:53:01 -07001755 /*
1756 * Turbo will still be enabled, but won't go above the set value.
1757 */
1758 dev_priv->max_delay = val / 50;
1759
1760 gen6_set_rps(dev, val / 50);
Daniel Vetter004777c2012-08-09 15:07:01 +02001761 mutex_unlock(&dev->struct_mutex);
Jesse Barnes358733e2011-07-27 11:53:01 -07001762
1763 return cnt;
1764}
1765
1766static const struct file_operations i915_max_freq_fops = {
1767 .owner = THIS_MODULE,
Stephen Boyd234e3402012-04-05 14:25:11 -07001768 .open = simple_open,
Jesse Barnes358733e2011-07-27 11:53:01 -07001769 .read = i915_max_freq_read,
1770 .write = i915_max_freq_write,
1771 .llseek = default_llseek,
1772};
1773
Jesse Barnes07b7ddd2011-08-03 11:28:44 -07001774static ssize_t
Jesse Barnes1523c312012-05-25 12:34:54 -07001775i915_min_freq_read(struct file *filp, char __user *ubuf, size_t max,
1776 loff_t *ppos)
1777{
1778 struct drm_device *dev = filp->private_data;
1779 drm_i915_private_t *dev_priv = dev->dev_private;
1780 char buf[80];
Daniel Vetter004777c2012-08-09 15:07:01 +02001781 int len, ret;
1782
1783 if (!(IS_GEN6(dev) || IS_GEN7(dev)))
1784 return -ENODEV;
1785
1786 ret = mutex_lock_interruptible(&dev->struct_mutex);
1787 if (ret)
1788 return ret;
Jesse Barnes1523c312012-05-25 12:34:54 -07001789
1790 len = snprintf(buf, sizeof(buf),
1791 "min freq: %d\n", dev_priv->min_delay * 50);
Daniel Vetter004777c2012-08-09 15:07:01 +02001792 mutex_unlock(&dev->struct_mutex);
Jesse Barnes1523c312012-05-25 12:34:54 -07001793
1794 if (len > sizeof(buf))
1795 len = sizeof(buf);
1796
1797 return simple_read_from_buffer(ubuf, max, ppos, buf, len);
1798}
1799
1800static ssize_t
1801i915_min_freq_write(struct file *filp, const char __user *ubuf, size_t cnt,
1802 loff_t *ppos)
1803{
1804 struct drm_device *dev = filp->private_data;
1805 struct drm_i915_private *dev_priv = dev->dev_private;
1806 char buf[20];
Daniel Vetter004777c2012-08-09 15:07:01 +02001807 int val = 1, ret;
1808
1809 if (!(IS_GEN6(dev) || IS_GEN7(dev)))
1810 return -ENODEV;
Jesse Barnes1523c312012-05-25 12:34:54 -07001811
1812 if (cnt > 0) {
1813 if (cnt > sizeof(buf) - 1)
1814 return -EINVAL;
1815
1816 if (copy_from_user(buf, ubuf, cnt))
1817 return -EFAULT;
1818 buf[cnt] = 0;
1819
1820 val = simple_strtoul(buf, NULL, 0);
1821 }
1822
1823 DRM_DEBUG_DRIVER("Manually setting min freq to %d\n", val);
1824
Daniel Vetter004777c2012-08-09 15:07:01 +02001825 ret = mutex_lock_interruptible(&dev->struct_mutex);
1826 if (ret)
1827 return ret;
1828
Jesse Barnes1523c312012-05-25 12:34:54 -07001829 /*
1830 * Turbo will still be enabled, but won't go below the set value.
1831 */
1832 dev_priv->min_delay = val / 50;
1833
1834 gen6_set_rps(dev, val / 50);
Daniel Vetter004777c2012-08-09 15:07:01 +02001835 mutex_unlock(&dev->struct_mutex);
Jesse Barnes1523c312012-05-25 12:34:54 -07001836
1837 return cnt;
1838}
1839
1840static const struct file_operations i915_min_freq_fops = {
1841 .owner = THIS_MODULE,
1842 .open = simple_open,
1843 .read = i915_min_freq_read,
1844 .write = i915_min_freq_write,
1845 .llseek = default_llseek,
1846};
1847
1848static ssize_t
Jesse Barnes07b7ddd2011-08-03 11:28:44 -07001849i915_cache_sharing_read(struct file *filp,
1850 char __user *ubuf,
1851 size_t max,
1852 loff_t *ppos)
1853{
1854 struct drm_device *dev = filp->private_data;
1855 drm_i915_private_t *dev_priv = dev->dev_private;
1856 char buf[80];
1857 u32 snpcr;
Daniel Vetter22bcfc62012-08-09 15:07:02 +02001858 int len, ret;
Jesse Barnes07b7ddd2011-08-03 11:28:44 -07001859
Daniel Vetter004777c2012-08-09 15:07:01 +02001860 if (!(IS_GEN6(dev) || IS_GEN7(dev)))
1861 return -ENODEV;
1862
Daniel Vetter22bcfc62012-08-09 15:07:02 +02001863 ret = mutex_lock_interruptible(&dev->struct_mutex);
1864 if (ret)
1865 return ret;
1866
Jesse Barnes07b7ddd2011-08-03 11:28:44 -07001867 snpcr = I915_READ(GEN6_MBCUNIT_SNPCR);
1868 mutex_unlock(&dev_priv->dev->struct_mutex);
1869
Akshay Joshi0206e352011-08-16 15:34:10 -04001870 len = snprintf(buf, sizeof(buf),
Jesse Barnes07b7ddd2011-08-03 11:28:44 -07001871 "%d\n", (snpcr & GEN6_MBC_SNPCR_MASK) >>
1872 GEN6_MBC_SNPCR_SHIFT);
1873
Akshay Joshi0206e352011-08-16 15:34:10 -04001874 if (len > sizeof(buf))
1875 len = sizeof(buf);
Jesse Barnes07b7ddd2011-08-03 11:28:44 -07001876
1877 return simple_read_from_buffer(ubuf, max, ppos, buf, len);
1878}
1879
1880static ssize_t
1881i915_cache_sharing_write(struct file *filp,
1882 const char __user *ubuf,
1883 size_t cnt,
1884 loff_t *ppos)
1885{
1886 struct drm_device *dev = filp->private_data;
1887 struct drm_i915_private *dev_priv = dev->dev_private;
1888 char buf[20];
1889 u32 snpcr;
1890 int val = 1;
1891
Daniel Vetter004777c2012-08-09 15:07:01 +02001892 if (!(IS_GEN6(dev) || IS_GEN7(dev)))
1893 return -ENODEV;
1894
Jesse Barnes07b7ddd2011-08-03 11:28:44 -07001895 if (cnt > 0) {
Akshay Joshi0206e352011-08-16 15:34:10 -04001896 if (cnt > sizeof(buf) - 1)
Jesse Barnes07b7ddd2011-08-03 11:28:44 -07001897 return -EINVAL;
1898
1899 if (copy_from_user(buf, ubuf, cnt))
1900 return -EFAULT;
1901 buf[cnt] = 0;
1902
1903 val = simple_strtoul(buf, NULL, 0);
1904 }
1905
1906 if (val < 0 || val > 3)
1907 return -EINVAL;
1908
1909 DRM_DEBUG_DRIVER("Manually setting uncore sharing to %d\n", val);
1910
1911 /* Update the cache sharing policy here as well */
1912 snpcr = I915_READ(GEN6_MBCUNIT_SNPCR);
1913 snpcr &= ~GEN6_MBC_SNPCR_MASK;
1914 snpcr |= (val << GEN6_MBC_SNPCR_SHIFT);
1915 I915_WRITE(GEN6_MBCUNIT_SNPCR, snpcr);
1916
1917 return cnt;
1918}
1919
1920static const struct file_operations i915_cache_sharing_fops = {
1921 .owner = THIS_MODULE,
Stephen Boyd234e3402012-04-05 14:25:11 -07001922 .open = simple_open,
Jesse Barnes07b7ddd2011-08-03 11:28:44 -07001923 .read = i915_cache_sharing_read,
1924 .write = i915_cache_sharing_write,
1925 .llseek = default_llseek,
1926};
1927
Chris Wilsonf3cd4742009-10-13 22:20:20 +01001928/* As the drm_debugfs_init() routines are called before dev->dev_private is
1929 * allocated we need to hook into the minor for release. */
1930static int
1931drm_add_fake_info_node(struct drm_minor *minor,
1932 struct dentry *ent,
1933 const void *key)
1934{
1935 struct drm_info_node *node;
1936
1937 node = kmalloc(sizeof(struct drm_info_node), GFP_KERNEL);
1938 if (node == NULL) {
1939 debugfs_remove(ent);
1940 return -ENOMEM;
1941 }
1942
1943 node->minor = minor;
1944 node->dent = ent;
1945 node->info_ent = (void *) key;
Marcin Slusarzb3e067c2011-11-09 22:20:35 +01001946
1947 mutex_lock(&minor->debugfs_lock);
1948 list_add(&node->list, &minor->debugfs_list);
1949 mutex_unlock(&minor->debugfs_lock);
Chris Wilsonf3cd4742009-10-13 22:20:20 +01001950
1951 return 0;
1952}
1953
Ben Widawsky6d794d42011-04-25 11:25:56 -07001954static int i915_forcewake_open(struct inode *inode, struct file *file)
1955{
1956 struct drm_device *dev = inode->i_private;
1957 struct drm_i915_private *dev_priv = dev->dev_private;
1958 int ret;
1959
Daniel Vetter075edca2012-01-24 09:44:28 +01001960 if (INTEL_INFO(dev)->gen < 6)
Ben Widawsky6d794d42011-04-25 11:25:56 -07001961 return 0;
1962
1963 ret = mutex_lock_interruptible(&dev->struct_mutex);
1964 if (ret)
1965 return ret;
1966 gen6_gt_force_wake_get(dev_priv);
1967 mutex_unlock(&dev->struct_mutex);
1968
1969 return 0;
1970}
1971
Ben Widawskyc43b5632012-04-16 14:07:40 -07001972static int i915_forcewake_release(struct inode *inode, struct file *file)
Ben Widawsky6d794d42011-04-25 11:25:56 -07001973{
1974 struct drm_device *dev = inode->i_private;
1975 struct drm_i915_private *dev_priv = dev->dev_private;
Daniel Vetter22bcfc62012-08-09 15:07:02 +02001976 int ret;
Ben Widawsky6d794d42011-04-25 11:25:56 -07001977
Daniel Vetter075edca2012-01-24 09:44:28 +01001978 if (INTEL_INFO(dev)->gen < 6)
Ben Widawsky6d794d42011-04-25 11:25:56 -07001979 return 0;
1980
1981 /*
1982 * It's bad that we can potentially hang userspace if struct_mutex gets
1983 * forever stuck. However, if we cannot acquire this lock it means that
1984 * almost certainly the driver has hung, is not unload-able. Therefore
1985 * hanging here is probably a minor inconvenience not to be seen my
1986 * almost every user.
1987 */
Daniel Vetter22bcfc62012-08-09 15:07:02 +02001988 ret = mutex_lock_interruptible(&dev->struct_mutex);
1989 if (ret)
1990 return ret;
1991
Ben Widawsky6d794d42011-04-25 11:25:56 -07001992 gen6_gt_force_wake_put(dev_priv);
1993 mutex_unlock(&dev->struct_mutex);
1994
1995 return 0;
1996}
1997
1998static const struct file_operations i915_forcewake_fops = {
1999 .owner = THIS_MODULE,
2000 .open = i915_forcewake_open,
2001 .release = i915_forcewake_release,
2002};
2003
2004static int i915_forcewake_create(struct dentry *root, struct drm_minor *minor)
2005{
2006 struct drm_device *dev = minor->dev;
2007 struct dentry *ent;
2008
2009 ent = debugfs_create_file("i915_forcewake_user",
Ben Widawsky8eb57292011-05-11 15:10:58 -07002010 S_IRUSR,
Ben Widawsky6d794d42011-04-25 11:25:56 -07002011 root, dev,
2012 &i915_forcewake_fops);
2013 if (IS_ERR(ent))
2014 return PTR_ERR(ent);
2015
Ben Widawsky8eb57292011-05-11 15:10:58 -07002016 return drm_add_fake_info_node(minor, ent, &i915_forcewake_fops);
Ben Widawsky6d794d42011-04-25 11:25:56 -07002017}
2018
Daniel Vetter6a9c3082011-12-14 13:57:11 +01002019static int i915_debugfs_create(struct dentry *root,
2020 struct drm_minor *minor,
2021 const char *name,
2022 const struct file_operations *fops)
Jesse Barnes358733e2011-07-27 11:53:01 -07002023{
2024 struct drm_device *dev = minor->dev;
2025 struct dentry *ent;
2026
Daniel Vetter6a9c3082011-12-14 13:57:11 +01002027 ent = debugfs_create_file(name,
Jesse Barnes358733e2011-07-27 11:53:01 -07002028 S_IRUGO | S_IWUSR,
2029 root, dev,
Daniel Vetter6a9c3082011-12-14 13:57:11 +01002030 fops);
Jesse Barnes358733e2011-07-27 11:53:01 -07002031 if (IS_ERR(ent))
2032 return PTR_ERR(ent);
2033
Daniel Vetter6a9c3082011-12-14 13:57:11 +01002034 return drm_add_fake_info_node(minor, ent, fops);
Jesse Barnes07b7ddd2011-08-03 11:28:44 -07002035}
2036
Ben Gamari27c202a2009-07-01 22:26:52 -04002037static struct drm_info_list i915_debugfs_list[] = {
Chris Wilson311bd682011-01-13 19:06:50 +00002038 {"i915_capabilities", i915_capabilities, 0},
Chris Wilson73aa8082010-09-30 11:46:12 +01002039 {"i915_gem_objects", i915_gem_object_info, 0},
Chris Wilson08c18322011-01-10 00:00:24 +00002040 {"i915_gem_gtt", i915_gem_gtt_info, 0},
Chris Wilson1b502472012-04-24 15:47:30 +01002041 {"i915_gem_pinned", i915_gem_gtt_info, 0, (void *) PINNED_LIST},
Ben Gamari433e12f2009-02-17 20:08:51 -05002042 {"i915_gem_active", i915_gem_object_list_info, 0, (void *) ACTIVE_LIST},
Ben Gamari433e12f2009-02-17 20:08:51 -05002043 {"i915_gem_inactive", i915_gem_object_list_info, 0, (void *) INACTIVE_LIST},
Simon Farnsworth4e5359c2010-09-01 17:47:52 +01002044 {"i915_gem_pageflip", i915_gem_pageflip_info, 0},
Ben Gamari20172632009-02-17 20:08:50 -05002045 {"i915_gem_request", i915_gem_request_info, 0},
2046 {"i915_gem_seqno", i915_gem_seqno_info, 0},
Chris Wilsona6172a82009-02-11 14:26:38 +00002047 {"i915_gem_fence_regs", i915_gem_fence_regs_info, 0},
Ben Gamari20172632009-02-17 20:08:50 -05002048 {"i915_gem_interrupt", i915_interrupt_info, 0},
Chris Wilson1ec14ad2010-12-04 11:30:53 +00002049 {"i915_gem_hws", i915_hws_info, 0, (void *)RCS},
2050 {"i915_gem_hws_blt", i915_hws_info, 0, (void *)BCS},
2051 {"i915_gem_hws_bsd", i915_hws_info, 0, (void *)VCS},
Jesse Barnesf97108d2010-01-29 11:27:07 -08002052 {"i915_rstdby_delays", i915_rstdby_delays, 0},
2053 {"i915_cur_delayinfo", i915_cur_delayinfo, 0},
2054 {"i915_delayfreq_table", i915_delayfreq_table, 0},
2055 {"i915_inttoext_table", i915_inttoext_table, 0},
2056 {"i915_drpc_info", i915_drpc_info, 0},
Jesse Barnes7648fa92010-05-20 14:28:11 -07002057 {"i915_emon_status", i915_emon_status, 0},
Jesse Barnes23b2f8b2011-06-28 13:04:16 -07002058 {"i915_ring_freq_table", i915_ring_freq_table, 0},
Jesse Barnes7648fa92010-05-20 14:28:11 -07002059 {"i915_gfxec", i915_gfxec, 0},
Jesse Barnesb5e50c32010-02-05 12:42:41 -08002060 {"i915_fbc_status", i915_fbc_status, 0},
Jesse Barnes4a9bef32010-02-05 12:47:35 -08002061 {"i915_sr_status", i915_sr_status, 0},
Chris Wilson44834a62010-08-19 16:09:23 +01002062 {"i915_opregion", i915_opregion, 0},
Chris Wilson37811fc2010-08-25 22:45:57 +01002063 {"i915_gem_framebuffer", i915_gem_framebuffer_info, 0},
Ben Widawskye76d3632011-03-19 18:14:29 -07002064 {"i915_context_status", i915_context_status, 0},
Ben Widawsky6d794d42011-04-25 11:25:56 -07002065 {"i915_gen6_forcewake_count", i915_gen6_forcewake_count_info, 0},
Daniel Vetterea16a3c2011-12-14 13:57:16 +01002066 {"i915_swizzle_info", i915_swizzle_info, 0},
Daniel Vetter3cf17fc2012-02-09 17:15:49 +01002067 {"i915_ppgtt_info", i915_ppgtt_info, 0},
Jesse Barnes57f350b2012-03-28 13:39:25 -07002068 {"i915_dpio", i915_dpio_info, 0},
Ben Gamari20172632009-02-17 20:08:50 -05002069};
Ben Gamari27c202a2009-07-01 22:26:52 -04002070#define I915_DEBUGFS_ENTRIES ARRAY_SIZE(i915_debugfs_list)
Ben Gamari20172632009-02-17 20:08:50 -05002071
Ben Gamari27c202a2009-07-01 22:26:52 -04002072int i915_debugfs_init(struct drm_minor *minor)
Ben Gamari20172632009-02-17 20:08:50 -05002073{
Chris Wilsonf3cd4742009-10-13 22:20:20 +01002074 int ret;
2075
Daniel Vetter6a9c3082011-12-14 13:57:11 +01002076 ret = i915_debugfs_create(minor->debugfs_root, minor,
2077 "i915_wedged",
2078 &i915_wedged_fops);
Chris Wilsonf3cd4742009-10-13 22:20:20 +01002079 if (ret)
2080 return ret;
2081
Ben Widawsky6d794d42011-04-25 11:25:56 -07002082 ret = i915_forcewake_create(minor->debugfs_root, minor);
2083 if (ret)
2084 return ret;
Daniel Vetter6a9c3082011-12-14 13:57:11 +01002085
2086 ret = i915_debugfs_create(minor->debugfs_root, minor,
2087 "i915_max_freq",
2088 &i915_max_freq_fops);
Jesse Barnes358733e2011-07-27 11:53:01 -07002089 if (ret)
2090 return ret;
Daniel Vetter6a9c3082011-12-14 13:57:11 +01002091
2092 ret = i915_debugfs_create(minor->debugfs_root, minor,
Jesse Barnes1523c312012-05-25 12:34:54 -07002093 "i915_min_freq",
2094 &i915_min_freq_fops);
2095 if (ret)
2096 return ret;
2097
2098 ret = i915_debugfs_create(minor->debugfs_root, minor,
Daniel Vetter6a9c3082011-12-14 13:57:11 +01002099 "i915_cache_sharing",
2100 &i915_cache_sharing_fops);
Jesse Barnes07b7ddd2011-08-03 11:28:44 -07002101 if (ret)
2102 return ret;
Daniel Vetter004777c2012-08-09 15:07:01 +02002103
Daniel Vettere5eb3d62012-05-03 14:48:16 +02002104 ret = i915_debugfs_create(minor->debugfs_root, minor,
2105 "i915_ring_stop",
2106 &i915_ring_stop_fops);
2107 if (ret)
2108 return ret;
Ben Widawsky6d794d42011-04-25 11:25:56 -07002109
Daniel Vetterd5442302012-04-27 15:17:40 +02002110 ret = i915_debugfs_create(minor->debugfs_root, minor,
2111 "i915_error_state",
2112 &i915_error_state_fops);
2113 if (ret)
2114 return ret;
2115
Ben Gamari27c202a2009-07-01 22:26:52 -04002116 return drm_debugfs_create_files(i915_debugfs_list,
2117 I915_DEBUGFS_ENTRIES,
Ben Gamari20172632009-02-17 20:08:50 -05002118 minor->debugfs_root, minor);
2119}
2120
Ben Gamari27c202a2009-07-01 22:26:52 -04002121void i915_debugfs_cleanup(struct drm_minor *minor)
Ben Gamari20172632009-02-17 20:08:50 -05002122{
Ben Gamari27c202a2009-07-01 22:26:52 -04002123 drm_debugfs_remove_files(i915_debugfs_list,
2124 I915_DEBUGFS_ENTRIES, minor);
Ben Widawsky6d794d42011-04-25 11:25:56 -07002125 drm_debugfs_remove_files((struct drm_info_list *) &i915_forcewake_fops,
2126 1, minor);
Kristian Høgsberg33db6792009-11-11 12:19:16 -05002127 drm_debugfs_remove_files((struct drm_info_list *) &i915_wedged_fops,
2128 1, minor);
Jesse Barnes358733e2011-07-27 11:53:01 -07002129 drm_debugfs_remove_files((struct drm_info_list *) &i915_max_freq_fops,
2130 1, minor);
Jesse Barnes1523c312012-05-25 12:34:54 -07002131 drm_debugfs_remove_files((struct drm_info_list *) &i915_min_freq_fops,
2132 1, minor);
Jesse Barnes07b7ddd2011-08-03 11:28:44 -07002133 drm_debugfs_remove_files((struct drm_info_list *) &i915_cache_sharing_fops,
2134 1, minor);
Daniel Vettere5eb3d62012-05-03 14:48:16 +02002135 drm_debugfs_remove_files((struct drm_info_list *) &i915_ring_stop_fops,
2136 1, minor);
Daniel Vetter6bd459d2012-05-21 19:56:52 +02002137 drm_debugfs_remove_files((struct drm_info_list *) &i915_error_state_fops,
2138 1, minor);
Ben Gamari20172632009-02-17 20:08:50 -05002139}
2140
2141#endif /* CONFIG_DEBUG_FS */