Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 1 | /* |
| 2 | * New driver for Marvell Yukon 2 chipset. |
| 3 | * Based on earlier sk98lin, and skge driver. |
| 4 | * |
| 5 | * This driver intentionally does not support all the features |
| 6 | * of the original driver such as link fail-over and link management because |
| 7 | * those should be done at higher levels. |
| 8 | * |
| 9 | * Copyright (C) 2005 Stephen Hemminger <shemminger@osdl.org> |
| 10 | * |
| 11 | * This program is free software; you can redistribute it and/or modify |
| 12 | * it under the terms of the GNU General Public License as published by |
| 13 | * the Free Software Foundation; either version 2 of the License, or |
| 14 | * (at your option) any later version. |
| 15 | * |
| 16 | * This program is distributed in the hope that it will be useful, |
| 17 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
Stephen Hemminger | 793b883 | 2005-09-14 16:06:14 -0700 | [diff] [blame] | 18 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 19 | * GNU General Public License for more details. |
| 20 | * |
| 21 | * You should have received a copy of the GNU General Public License |
| 22 | * along with this program; if not, write to the Free Software |
| 23 | * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. |
| 24 | */ |
| 25 | |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 26 | #include <linux/config.h> |
Stephen Hemminger | 793b883 | 2005-09-14 16:06:14 -0700 | [diff] [blame] | 27 | #include <linux/crc32.h> |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 28 | #include <linux/kernel.h> |
| 29 | #include <linux/version.h> |
| 30 | #include <linux/module.h> |
| 31 | #include <linux/netdevice.h> |
Andrew Morton | d0bbccf | 2005-11-10 15:29:27 -0800 | [diff] [blame] | 32 | #include <linux/dma-mapping.h> |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 33 | #include <linux/etherdevice.h> |
| 34 | #include <linux/ethtool.h> |
| 35 | #include <linux/pci.h> |
| 36 | #include <linux/ip.h> |
| 37 | #include <linux/tcp.h> |
| 38 | #include <linux/in.h> |
| 39 | #include <linux/delay.h> |
Stephen Hemminger | 91c86df | 2005-12-09 11:34:57 -0800 | [diff] [blame] | 40 | #include <linux/workqueue.h> |
shemminger@osdl.org | d1f1370 | 2005-09-27 15:02:57 -0700 | [diff] [blame] | 41 | #include <linux/if_vlan.h> |
Stephen Hemminger | d70cd51 | 2005-12-09 11:35:09 -0800 | [diff] [blame] | 42 | #include <linux/prefetch.h> |
shemminger@osdl.org | ef743d3 | 2005-11-30 11:45:12 -0800 | [diff] [blame] | 43 | #include <linux/mii.h> |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 44 | |
| 45 | #include <asm/irq.h> |
| 46 | |
shemminger@osdl.org | d1f1370 | 2005-09-27 15:02:57 -0700 | [diff] [blame] | 47 | #if defined(CONFIG_VLAN_8021Q) || defined(CONFIG_VLAN_8021Q_MODULE) |
| 48 | #define SKY2_VLAN_TAG_USED 1 |
| 49 | #endif |
| 50 | |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 51 | #include "sky2.h" |
| 52 | |
| 53 | #define DRV_NAME "sky2" |
Stephen Hemminger | fa8d354 | 2006-01-30 11:38:01 -0800 | [diff] [blame] | 54 | #define DRV_VERSION "0.15" |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 55 | #define PFX DRV_NAME " " |
| 56 | |
| 57 | /* |
| 58 | * The Yukon II chipset takes 64 bit command blocks (called list elements) |
| 59 | * that are organized into three (receive, transmit, status) different rings |
| 60 | * similar to Tigon3. A transmit can require several elements; |
| 61 | * a receive requires one (or two if using 64 bit dma). |
| 62 | */ |
| 63 | |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 64 | #define is_ec_a1(hw) \ |
shemminger@osdl.org | 2143764 | 2005-11-30 11:45:11 -0800 | [diff] [blame] | 65 | unlikely((hw)->chip_id == CHIP_ID_YUKON_EC && \ |
| 66 | (hw)->chip_rev == CHIP_REV_YU_EC_A1) |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 67 | |
shemminger@osdl.org | 13210ce | 2005-11-30 11:45:14 -0800 | [diff] [blame] | 68 | #define RX_LE_SIZE 512 |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 69 | #define RX_LE_BYTES (RX_LE_SIZE*sizeof(struct sky2_rx_le)) |
shemminger@osdl.org | bea8610 | 2005-10-26 12:16:10 -0700 | [diff] [blame] | 70 | #define RX_MAX_PENDING (RX_LE_SIZE/2 - 2) |
shemminger@osdl.org | 13210ce | 2005-11-30 11:45:14 -0800 | [diff] [blame] | 71 | #define RX_DEF_PENDING RX_MAX_PENDING |
Stephen Hemminger | 82788c7 | 2006-01-17 13:43:10 -0800 | [diff] [blame] | 72 | #define RX_SKB_ALIGN 8 |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 73 | |
Stephen Hemminger | 793b883 | 2005-09-14 16:06:14 -0700 | [diff] [blame] | 74 | #define TX_RING_SIZE 512 |
| 75 | #define TX_DEF_PENDING (TX_RING_SIZE - 1) |
| 76 | #define TX_MIN_PENDING 64 |
| 77 | #define MAX_SKB_TX_LE (4 + 2*MAX_SKB_FRAGS) |
| 78 | |
| 79 | #define STATUS_RING_SIZE 2048 /* 2 ports * (TX + 2*RX) */ |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 80 | #define STATUS_LE_BYTES (STATUS_RING_SIZE*sizeof(struct sky2_status_le)) |
| 81 | #define ETH_JUMBO_MTU 9000 |
| 82 | #define TX_WATCHDOG (5 * HZ) |
| 83 | #define NAPI_WEIGHT 64 |
| 84 | #define PHY_RETRIES 1000 |
| 85 | |
| 86 | static const u32 default_msg = |
Stephen Hemminger | 793b883 | 2005-09-14 16:06:14 -0700 | [diff] [blame] | 87 | NETIF_MSG_DRV | NETIF_MSG_PROBE | NETIF_MSG_LINK |
| 88 | | NETIF_MSG_TIMER | NETIF_MSG_TX_ERR | NETIF_MSG_RX_ERR |
Stephen Hemminger | 3be92a7 | 2006-01-17 13:43:17 -0800 | [diff] [blame] | 89 | | NETIF_MSG_IFUP | NETIF_MSG_IFDOWN; |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 90 | |
Stephen Hemminger | 793b883 | 2005-09-14 16:06:14 -0700 | [diff] [blame] | 91 | static int debug = -1; /* defaults above */ |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 92 | module_param(debug, int, 0); |
| 93 | MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)"); |
| 94 | |
Stephen Hemminger | bdb5c58 | 2005-12-09 11:34:55 -0800 | [diff] [blame] | 95 | static int copybreak __read_mostly = 256; |
| 96 | module_param(copybreak, int, 0); |
| 97 | MODULE_PARM_DESC(copybreak, "Receive copy threshold"); |
| 98 | |
Stephen Hemminger | 4d52b48 | 2006-01-30 11:38:00 -0800 | [diff] [blame] | 99 | static int disable_msi = 0; |
| 100 | module_param(disable_msi, int, 0); |
| 101 | MODULE_PARM_DESC(disable_msi, "Disable Message Signaled Interrupt (MSI)"); |
| 102 | |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 103 | static const struct pci_device_id sky2_id_table[] = { |
Stephen Hemminger | 793b883 | 2005-09-14 16:06:14 -0700 | [diff] [blame] | 104 | { PCI_DEVICE(PCI_VENDOR_ID_SYSKONNECT, 0x9000) }, |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 105 | { PCI_DEVICE(PCI_VENDOR_ID_SYSKONNECT, 0x9E00) }, |
| 106 | { PCI_DEVICE(PCI_VENDOR_ID_DLINK, 0x4b00) }, |
| 107 | { PCI_DEVICE(PCI_VENDOR_ID_DLINK, 0x4b01) }, |
| 108 | { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4340) }, |
| 109 | { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4341) }, |
| 110 | { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4342) }, |
| 111 | { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4343) }, |
| 112 | { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4344) }, |
| 113 | { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4345) }, |
| 114 | { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4346) }, |
| 115 | { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4347) }, |
| 116 | { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4350) }, |
| 117 | { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4351) }, |
shemminger@osdl.org | 5a5b1ea | 2005-11-30 11:45:15 -0800 | [diff] [blame] | 118 | { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4352) }, |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 119 | { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4360) }, |
| 120 | { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4361) }, |
| 121 | { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4362) }, |
shemminger@osdl.org | 5a5b1ea | 2005-11-30 11:45:15 -0800 | [diff] [blame] | 122 | { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4363) }, |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 123 | { 0 } |
| 124 | }; |
Stephen Hemminger | 793b883 | 2005-09-14 16:06:14 -0700 | [diff] [blame] | 125 | |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 126 | MODULE_DEVICE_TABLE(pci, sky2_id_table); |
| 127 | |
| 128 | /* Avoid conditionals by using array */ |
| 129 | static const unsigned txqaddr[] = { Q_XA1, Q_XA2 }; |
| 130 | static const unsigned rxqaddr[] = { Q_R1, Q_R2 }; |
| 131 | |
Stephen Hemminger | 92f965e | 2005-12-09 11:34:53 -0800 | [diff] [blame] | 132 | /* This driver supports yukon2 chipset only */ |
| 133 | static const char *yukon2_name[] = { |
| 134 | "XL", /* 0xb3 */ |
| 135 | "EC Ultra", /* 0xb4 */ |
| 136 | "UNKNOWN", /* 0xb5 */ |
| 137 | "EC", /* 0xb6 */ |
| 138 | "FE", /* 0xb7 */ |
Stephen Hemminger | 793b883 | 2005-09-14 16:06:14 -0700 | [diff] [blame] | 139 | }; |
| 140 | |
Stephen Hemminger | 793b883 | 2005-09-14 16:06:14 -0700 | [diff] [blame] | 141 | /* Access to external PHY */ |
shemminger@osdl.org | ef743d3 | 2005-11-30 11:45:12 -0800 | [diff] [blame] | 142 | static int gm_phy_write(struct sky2_hw *hw, unsigned port, u16 reg, u16 val) |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 143 | { |
| 144 | int i; |
| 145 | |
| 146 | gma_write16(hw, port, GM_SMI_DATA, val); |
| 147 | gma_write16(hw, port, GM_SMI_CTRL, |
| 148 | GM_SMI_CT_PHY_AD(PHY_ADDR_MARV) | GM_SMI_CT_REG_AD(reg)); |
| 149 | |
| 150 | for (i = 0; i < PHY_RETRIES; i++) { |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 151 | if (!(gma_read16(hw, port, GM_SMI_CTRL) & GM_SMI_CT_BUSY)) |
shemminger@osdl.org | ef743d3 | 2005-11-30 11:45:12 -0800 | [diff] [blame] | 152 | return 0; |
Stephen Hemminger | 793b883 | 2005-09-14 16:06:14 -0700 | [diff] [blame] | 153 | udelay(1); |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 154 | } |
shemminger@osdl.org | ef743d3 | 2005-11-30 11:45:12 -0800 | [diff] [blame] | 155 | |
Stephen Hemminger | 793b883 | 2005-09-14 16:06:14 -0700 | [diff] [blame] | 156 | printk(KERN_WARNING PFX "%s: phy write timeout\n", hw->dev[port]->name); |
shemminger@osdl.org | ef743d3 | 2005-11-30 11:45:12 -0800 | [diff] [blame] | 157 | return -ETIMEDOUT; |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 158 | } |
| 159 | |
shemminger@osdl.org | ef743d3 | 2005-11-30 11:45:12 -0800 | [diff] [blame] | 160 | static int __gm_phy_read(struct sky2_hw *hw, unsigned port, u16 reg, u16 *val) |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 161 | { |
| 162 | int i; |
| 163 | |
Stephen Hemminger | 793b883 | 2005-09-14 16:06:14 -0700 | [diff] [blame] | 164 | gma_write16(hw, port, GM_SMI_CTRL, GM_SMI_CT_PHY_AD(PHY_ADDR_MARV) |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 165 | | GM_SMI_CT_REG_AD(reg) | GM_SMI_CT_OP_RD); |
| 166 | |
| 167 | for (i = 0; i < PHY_RETRIES; i++) { |
shemminger@osdl.org | ef743d3 | 2005-11-30 11:45:12 -0800 | [diff] [blame] | 168 | if (gma_read16(hw, port, GM_SMI_CTRL) & GM_SMI_CT_RD_VAL) { |
| 169 | *val = gma_read16(hw, port, GM_SMI_DATA); |
| 170 | return 0; |
| 171 | } |
| 172 | |
Stephen Hemminger | 793b883 | 2005-09-14 16:06:14 -0700 | [diff] [blame] | 173 | udelay(1); |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 174 | } |
| 175 | |
shemminger@osdl.org | ef743d3 | 2005-11-30 11:45:12 -0800 | [diff] [blame] | 176 | return -ETIMEDOUT; |
| 177 | } |
| 178 | |
| 179 | static u16 gm_phy_read(struct sky2_hw *hw, unsigned port, u16 reg) |
| 180 | { |
| 181 | u16 v; |
| 182 | |
| 183 | if (__gm_phy_read(hw, port, reg, &v) != 0) |
| 184 | printk(KERN_WARNING PFX "%s: phy read timeout\n", hw->dev[port]->name); |
| 185 | return v; |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 186 | } |
| 187 | |
shemminger@osdl.org | 5afa0a9 | 2005-09-27 15:03:00 -0700 | [diff] [blame] | 188 | static int sky2_set_power_state(struct sky2_hw *hw, pci_power_t state) |
| 189 | { |
| 190 | u16 power_control; |
| 191 | u32 reg1; |
| 192 | int vaux; |
| 193 | int ret = 0; |
| 194 | |
| 195 | pr_debug("sky2_set_power_state %d\n", state); |
| 196 | sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_ON); |
| 197 | |
Stephen Hemminger | 56a645c | 2006-02-22 11:45:02 -0800 | [diff] [blame^] | 198 | power_control = sky2_pci_read16(hw, hw->pm_cap + PCI_PM_PMC); |
Stephen Hemminger | 08c06d8 | 2006-01-30 11:37:54 -0800 | [diff] [blame] | 199 | vaux = (sky2_read16(hw, B0_CTST) & Y2_VAUX_AVAIL) && |
shemminger@osdl.org | 5afa0a9 | 2005-09-27 15:03:00 -0700 | [diff] [blame] | 200 | (power_control & PCI_PM_CAP_PME_D3cold); |
| 201 | |
Stephen Hemminger | 56a645c | 2006-02-22 11:45:02 -0800 | [diff] [blame^] | 202 | power_control = sky2_pci_read16(hw, hw->pm_cap + PCI_PM_CTRL); |
shemminger@osdl.org | 5afa0a9 | 2005-09-27 15:03:00 -0700 | [diff] [blame] | 203 | |
| 204 | power_control |= PCI_PM_CTRL_PME_STATUS; |
| 205 | power_control &= ~(PCI_PM_CTRL_STATE_MASK); |
| 206 | |
| 207 | switch (state) { |
| 208 | case PCI_D0: |
| 209 | /* switch power to VCC (WA for VAUX problem) */ |
| 210 | sky2_write8(hw, B0_POWER_CTRL, |
| 211 | PC_VAUX_ENA | PC_VCC_ENA | PC_VAUX_OFF | PC_VCC_ON); |
| 212 | |
| 213 | /* disable Core Clock Division, */ |
| 214 | sky2_write32(hw, B2_Y2_CLK_CTRL, Y2_CLK_DIV_DIS); |
| 215 | |
| 216 | if (hw->chip_id == CHIP_ID_YUKON_XL && hw->chip_rev > 1) |
| 217 | /* enable bits are inverted */ |
| 218 | sky2_write8(hw, B2_Y2_CLK_GATE, |
| 219 | Y2_PCI_CLK_LNK1_DIS | Y2_COR_CLK_LNK1_DIS | |
| 220 | Y2_CLK_GAT_LNK1_DIS | Y2_PCI_CLK_LNK2_DIS | |
| 221 | Y2_COR_CLK_LNK2_DIS | Y2_CLK_GAT_LNK2_DIS); |
| 222 | else |
| 223 | sky2_write8(hw, B2_Y2_CLK_GATE, 0); |
| 224 | |
| 225 | /* Turn off phy power saving */ |
Stephen Hemminger | 56a645c | 2006-02-22 11:45:02 -0800 | [diff] [blame^] | 226 | reg1 = sky2_pci_read32(hw, PCI_DEV_REG1); |
shemminger@osdl.org | 5afa0a9 | 2005-09-27 15:03:00 -0700 | [diff] [blame] | 227 | reg1 &= ~(PCI_Y2_PHY1_POWD | PCI_Y2_PHY2_POWD); |
| 228 | |
shemminger@osdl.org | d571b69 | 2005-10-26 12:16:09 -0700 | [diff] [blame] | 229 | /* looks like this XL is back asswards .. */ |
shemminger@osdl.org | 5afa0a9 | 2005-09-27 15:03:00 -0700 | [diff] [blame] | 230 | if (hw->chip_id == CHIP_ID_YUKON_XL && hw->chip_rev > 1) { |
| 231 | reg1 |= PCI_Y2_PHY1_COMA; |
| 232 | if (hw->ports > 1) |
| 233 | reg1 |= PCI_Y2_PHY2_COMA; |
| 234 | } |
Stephen Hemminger | 977bdf0 | 2006-02-22 11:44:58 -0800 | [diff] [blame] | 235 | |
| 236 | if (hw->chip_id == CHIP_ID_YUKON_EC_U) { |
Stephen Hemminger | 56a645c | 2006-02-22 11:45:02 -0800 | [diff] [blame^] | 237 | sky2_pci_write32(hw, PCI_DEV_REG3, 0); |
| 238 | reg1 = sky2_pci_read32(hw, PCI_DEV_REG4); |
Stephen Hemminger | 977bdf0 | 2006-02-22 11:44:58 -0800 | [diff] [blame] | 239 | reg1 &= P_ASPM_CONTROL_MSK; |
Stephen Hemminger | 56a645c | 2006-02-22 11:45:02 -0800 | [diff] [blame^] | 240 | sky2_pci_write32(hw, PCI_DEV_REG4, reg1); |
| 241 | sky2_pci_write32(hw, PCI_DEV_REG5, 0); |
Stephen Hemminger | 977bdf0 | 2006-02-22 11:44:58 -0800 | [diff] [blame] | 242 | } |
| 243 | |
Stephen Hemminger | 56a645c | 2006-02-22 11:45:02 -0800 | [diff] [blame^] | 244 | sky2_pci_write32(hw, PCI_DEV_REG1, reg1); |
Stephen Hemminger | 977bdf0 | 2006-02-22 11:44:58 -0800 | [diff] [blame] | 245 | |
shemminger@osdl.org | 5afa0a9 | 2005-09-27 15:03:00 -0700 | [diff] [blame] | 246 | break; |
| 247 | |
| 248 | case PCI_D3hot: |
| 249 | case PCI_D3cold: |
| 250 | /* Turn on phy power saving */ |
Stephen Hemminger | 56a645c | 2006-02-22 11:45:02 -0800 | [diff] [blame^] | 251 | reg1 = sky2_pci_read32(hw, PCI_DEV_REG1); |
shemminger@osdl.org | 5afa0a9 | 2005-09-27 15:03:00 -0700 | [diff] [blame] | 252 | if (hw->chip_id == CHIP_ID_YUKON_XL && hw->chip_rev > 1) |
| 253 | reg1 &= ~(PCI_Y2_PHY1_POWD | PCI_Y2_PHY2_POWD); |
| 254 | else |
| 255 | reg1 |= (PCI_Y2_PHY1_POWD | PCI_Y2_PHY2_POWD); |
Stephen Hemminger | 56a645c | 2006-02-22 11:45:02 -0800 | [diff] [blame^] | 256 | sky2_pci_write32(hw, PCI_DEV_REG1, reg1); |
shemminger@osdl.org | 5afa0a9 | 2005-09-27 15:03:00 -0700 | [diff] [blame] | 257 | |
| 258 | if (hw->chip_id == CHIP_ID_YUKON_XL && hw->chip_rev > 1) |
| 259 | sky2_write8(hw, B2_Y2_CLK_GATE, 0); |
| 260 | else |
| 261 | /* enable bits are inverted */ |
| 262 | sky2_write8(hw, B2_Y2_CLK_GATE, |
| 263 | Y2_PCI_CLK_LNK1_DIS | Y2_COR_CLK_LNK1_DIS | |
| 264 | Y2_CLK_GAT_LNK1_DIS | Y2_PCI_CLK_LNK2_DIS | |
| 265 | Y2_COR_CLK_LNK2_DIS | Y2_CLK_GAT_LNK2_DIS); |
| 266 | |
| 267 | /* switch power to VAUX */ |
| 268 | if (vaux && state != PCI_D3cold) |
| 269 | sky2_write8(hw, B0_POWER_CTRL, |
| 270 | (PC_VAUX_ENA | PC_VCC_ENA | |
| 271 | PC_VAUX_ON | PC_VCC_OFF)); |
| 272 | break; |
| 273 | default: |
| 274 | printk(KERN_ERR PFX "Unknown power state %d\n", state); |
| 275 | ret = -1; |
| 276 | } |
| 277 | |
Stephen Hemminger | 56a645c | 2006-02-22 11:45:02 -0800 | [diff] [blame^] | 278 | sky2_pci_write16(hw, hw->pm_cap + PCI_PM_CTRL, power_control); |
shemminger@osdl.org | 5afa0a9 | 2005-09-27 15:03:00 -0700 | [diff] [blame] | 279 | sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_OFF); |
| 280 | return ret; |
| 281 | } |
| 282 | |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 283 | static void sky2_phy_reset(struct sky2_hw *hw, unsigned port) |
| 284 | { |
| 285 | u16 reg; |
| 286 | |
| 287 | /* disable all GMAC IRQ's */ |
| 288 | sky2_write8(hw, SK_REG(port, GMAC_IRQ_MSK), 0); |
| 289 | /* disable PHY IRQs */ |
| 290 | gm_phy_write(hw, port, PHY_MARV_INT_MASK, 0); |
Stephen Hemminger | 793b883 | 2005-09-14 16:06:14 -0700 | [diff] [blame] | 291 | |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 292 | gma_write16(hw, port, GM_MC_ADDR_H1, 0); /* clear MC hash */ |
| 293 | gma_write16(hw, port, GM_MC_ADDR_H2, 0); |
| 294 | gma_write16(hw, port, GM_MC_ADDR_H3, 0); |
| 295 | gma_write16(hw, port, GM_MC_ADDR_H4, 0); |
| 296 | |
| 297 | reg = gma_read16(hw, port, GM_RX_CTRL); |
| 298 | reg |= GM_RXCR_UCF_ENA | GM_RXCR_MCF_ENA; |
| 299 | gma_write16(hw, port, GM_RX_CTRL, reg); |
| 300 | } |
| 301 | |
| 302 | static void sky2_phy_init(struct sky2_hw *hw, unsigned port) |
| 303 | { |
| 304 | struct sky2_port *sky2 = netdev_priv(hw->dev[port]); |
Stephen Hemminger | 793b883 | 2005-09-14 16:06:14 -0700 | [diff] [blame] | 305 | u16 ctrl, ct1000, adv, pg, ledctrl, ledover; |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 306 | |
Stephen Hemminger | 793b883 | 2005-09-14 16:06:14 -0700 | [diff] [blame] | 307 | if (sky2->autoneg == AUTONEG_ENABLE && hw->chip_id != CHIP_ID_YUKON_XL) { |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 308 | u16 ectrl = gm_phy_read(hw, port, PHY_MARV_EXT_CTRL); |
| 309 | |
| 310 | ectrl &= ~(PHY_M_EC_M_DSC_MSK | PHY_M_EC_S_DSC_MSK | |
Stephen Hemminger | 793b883 | 2005-09-14 16:06:14 -0700 | [diff] [blame] | 311 | PHY_M_EC_MAC_S_MSK); |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 312 | ectrl |= PHY_M_EC_MAC_S(MAC_TX_CLK_25_MHZ); |
| 313 | |
| 314 | if (hw->chip_id == CHIP_ID_YUKON_EC) |
| 315 | ectrl |= PHY_M_EC_DSC_2(2) | PHY_M_EC_DOWN_S_ENA; |
| 316 | else |
| 317 | ectrl |= PHY_M_EC_M_DSC(2) | PHY_M_EC_S_DSC(3); |
| 318 | |
| 319 | gm_phy_write(hw, port, PHY_MARV_EXT_CTRL, ectrl); |
| 320 | } |
| 321 | |
| 322 | ctrl = gm_phy_read(hw, port, PHY_MARV_PHY_CTRL); |
| 323 | if (hw->copper) { |
| 324 | if (hw->chip_id == CHIP_ID_YUKON_FE) { |
| 325 | /* enable automatic crossover */ |
| 326 | ctrl |= PHY_M_PC_MDI_XMODE(PHY_M_PC_ENA_AUTO) >> 1; |
| 327 | } else { |
| 328 | /* disable energy detect */ |
| 329 | ctrl &= ~PHY_M_PC_EN_DET_MSK; |
| 330 | |
| 331 | /* enable automatic crossover */ |
| 332 | ctrl |= PHY_M_PC_MDI_XMODE(PHY_M_PC_ENA_AUTO); |
| 333 | |
| 334 | if (sky2->autoneg == AUTONEG_ENABLE && |
| 335 | hw->chip_id == CHIP_ID_YUKON_XL) { |
| 336 | ctrl &= ~PHY_M_PC_DSC_MSK; |
| 337 | ctrl |= PHY_M_PC_DSC(2) | PHY_M_PC_DOWN_S_ENA; |
| 338 | } |
| 339 | } |
| 340 | gm_phy_write(hw, port, PHY_MARV_PHY_CTRL, ctrl); |
| 341 | } else { |
| 342 | /* workaround for deviation #4.88 (CRC errors) */ |
| 343 | /* disable Automatic Crossover */ |
| 344 | |
| 345 | ctrl &= ~PHY_M_PC_MDIX_MSK; |
| 346 | gm_phy_write(hw, port, PHY_MARV_PHY_CTRL, ctrl); |
| 347 | |
| 348 | if (hw->chip_id == CHIP_ID_YUKON_XL) { |
| 349 | /* Fiber: select 1000BASE-X only mode MAC Specific Ctrl Reg. */ |
| 350 | gm_phy_write(hw, port, PHY_MARV_EXT_ADR, 2); |
| 351 | ctrl = gm_phy_read(hw, port, PHY_MARV_PHY_CTRL); |
| 352 | ctrl &= ~PHY_M_MAC_MD_MSK; |
| 353 | ctrl |= PHY_M_MAC_MODE_SEL(PHY_M_MAC_MD_1000BX); |
| 354 | gm_phy_write(hw, port, PHY_MARV_PHY_CTRL, ctrl); |
| 355 | |
| 356 | /* select page 1 to access Fiber registers */ |
| 357 | gm_phy_write(hw, port, PHY_MARV_EXT_ADR, 1); |
| 358 | } |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 359 | } |
| 360 | |
| 361 | ctrl = gm_phy_read(hw, port, PHY_MARV_CTRL); |
| 362 | if (sky2->autoneg == AUTONEG_DISABLE) |
| 363 | ctrl &= ~PHY_CT_ANE; |
| 364 | else |
| 365 | ctrl |= PHY_CT_ANE; |
| 366 | |
| 367 | ctrl |= PHY_CT_RESET; |
| 368 | gm_phy_write(hw, port, PHY_MARV_CTRL, ctrl); |
| 369 | |
| 370 | ctrl = 0; |
| 371 | ct1000 = 0; |
| 372 | adv = PHY_AN_CSMA; |
| 373 | |
| 374 | if (sky2->autoneg == AUTONEG_ENABLE) { |
| 375 | if (hw->copper) { |
| 376 | if (sky2->advertising & ADVERTISED_1000baseT_Full) |
| 377 | ct1000 |= PHY_M_1000C_AFD; |
| 378 | if (sky2->advertising & ADVERTISED_1000baseT_Half) |
| 379 | ct1000 |= PHY_M_1000C_AHD; |
| 380 | if (sky2->advertising & ADVERTISED_100baseT_Full) |
| 381 | adv |= PHY_M_AN_100_FD; |
| 382 | if (sky2->advertising & ADVERTISED_100baseT_Half) |
| 383 | adv |= PHY_M_AN_100_HD; |
| 384 | if (sky2->advertising & ADVERTISED_10baseT_Full) |
| 385 | adv |= PHY_M_AN_10_FD; |
| 386 | if (sky2->advertising & ADVERTISED_10baseT_Half) |
| 387 | adv |= PHY_M_AN_10_HD; |
Stephen Hemminger | 793b883 | 2005-09-14 16:06:14 -0700 | [diff] [blame] | 388 | } else /* special defines for FIBER (88E1011S only) */ |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 389 | adv |= PHY_M_AN_1000X_AHD | PHY_M_AN_1000X_AFD; |
| 390 | |
| 391 | /* Set Flow-control capabilities */ |
| 392 | if (sky2->tx_pause && sky2->rx_pause) |
Stephen Hemminger | 793b883 | 2005-09-14 16:06:14 -0700 | [diff] [blame] | 393 | adv |= PHY_AN_PAUSE_CAP; /* symmetric */ |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 394 | else if (sky2->rx_pause && !sky2->tx_pause) |
Stephen Hemminger | 793b883 | 2005-09-14 16:06:14 -0700 | [diff] [blame] | 395 | adv |= PHY_AN_PAUSE_ASYM | PHY_AN_PAUSE_CAP; |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 396 | else if (!sky2->rx_pause && sky2->tx_pause) |
| 397 | adv |= PHY_AN_PAUSE_ASYM; /* local */ |
| 398 | |
| 399 | /* Restart Auto-negotiation */ |
| 400 | ctrl |= PHY_CT_ANE | PHY_CT_RE_CFG; |
| 401 | } else { |
| 402 | /* forced speed/duplex settings */ |
| 403 | ct1000 = PHY_M_1000C_MSE; |
| 404 | |
| 405 | if (sky2->duplex == DUPLEX_FULL) |
| 406 | ctrl |= PHY_CT_DUP_MD; |
| 407 | |
| 408 | switch (sky2->speed) { |
| 409 | case SPEED_1000: |
| 410 | ctrl |= PHY_CT_SP1000; |
| 411 | break; |
| 412 | case SPEED_100: |
| 413 | ctrl |= PHY_CT_SP100; |
| 414 | break; |
| 415 | } |
| 416 | |
| 417 | ctrl |= PHY_CT_RESET; |
| 418 | } |
| 419 | |
| 420 | if (hw->chip_id != CHIP_ID_YUKON_FE) |
| 421 | gm_phy_write(hw, port, PHY_MARV_1000T_CTRL, ct1000); |
| 422 | |
| 423 | gm_phy_write(hw, port, PHY_MARV_AUNE_ADV, adv); |
| 424 | gm_phy_write(hw, port, PHY_MARV_CTRL, ctrl); |
| 425 | |
| 426 | /* Setup Phy LED's */ |
| 427 | ledctrl = PHY_M_LED_PULS_DUR(PULS_170MS); |
| 428 | ledover = 0; |
| 429 | |
| 430 | switch (hw->chip_id) { |
| 431 | case CHIP_ID_YUKON_FE: |
| 432 | /* on 88E3082 these bits are at 11..9 (shifted left) */ |
| 433 | ledctrl |= PHY_M_LED_BLINK_RT(BLINK_84MS) << 1; |
| 434 | |
| 435 | ctrl = gm_phy_read(hw, port, PHY_MARV_FE_LED_PAR); |
| 436 | |
| 437 | /* delete ACT LED control bits */ |
| 438 | ctrl &= ~PHY_M_FELP_LED1_MSK; |
| 439 | /* change ACT LED control to blink mode */ |
| 440 | ctrl |= PHY_M_FELP_LED1_CTRL(LED_PAR_CTRL_ACT_BL); |
| 441 | gm_phy_write(hw, port, PHY_MARV_FE_LED_PAR, ctrl); |
| 442 | break; |
| 443 | |
| 444 | case CHIP_ID_YUKON_XL: |
Stephen Hemminger | 793b883 | 2005-09-14 16:06:14 -0700 | [diff] [blame] | 445 | pg = gm_phy_read(hw, port, PHY_MARV_EXT_ADR); |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 446 | |
| 447 | /* select page 3 to access LED control register */ |
| 448 | gm_phy_write(hw, port, PHY_MARV_EXT_ADR, 3); |
| 449 | |
| 450 | /* set LED Function Control register */ |
Stephen Hemminger | 793b883 | 2005-09-14 16:06:14 -0700 | [diff] [blame] | 451 | gm_phy_write(hw, port, PHY_MARV_PHY_CTRL, (PHY_M_LEDC_LOS_CTRL(1) | /* LINK/ACT */ |
| 452 | PHY_M_LEDC_INIT_CTRL(7) | /* 10 Mbps */ |
| 453 | PHY_M_LEDC_STA1_CTRL(7) | /* 100 Mbps */ |
| 454 | PHY_M_LEDC_STA0_CTRL(7))); /* 1000 Mbps */ |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 455 | |
| 456 | /* set Polarity Control register */ |
| 457 | gm_phy_write(hw, port, PHY_MARV_PHY_STAT, |
Stephen Hemminger | 793b883 | 2005-09-14 16:06:14 -0700 | [diff] [blame] | 458 | (PHY_M_POLC_LS1_P_MIX(4) | |
| 459 | PHY_M_POLC_IS0_P_MIX(4) | |
| 460 | PHY_M_POLC_LOS_CTRL(2) | |
| 461 | PHY_M_POLC_INIT_CTRL(2) | |
| 462 | PHY_M_POLC_STA1_CTRL(2) | |
| 463 | PHY_M_POLC_STA0_CTRL(2))); |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 464 | |
| 465 | /* restore page register */ |
Stephen Hemminger | 793b883 | 2005-09-14 16:06:14 -0700 | [diff] [blame] | 466 | gm_phy_write(hw, port, PHY_MARV_EXT_ADR, pg); |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 467 | break; |
| 468 | |
| 469 | default: |
| 470 | /* set Tx LED (LED_TX) to blink mode on Rx OR Tx activity */ |
| 471 | ledctrl |= PHY_M_LED_BLINK_RT(BLINK_84MS) | PHY_M_LEDC_TX_CTRL; |
| 472 | /* turn off the Rx LED (LED_RX) */ |
| 473 | ledover |= PHY_M_LED_MO_RX(MO_LED_OFF); |
| 474 | } |
| 475 | |
Stephen Hemminger | 977bdf0 | 2006-02-22 11:44:58 -0800 | [diff] [blame] | 476 | if (hw->chip_id == CHIP_ID_YUKON_EC_U && hw->chip_rev >= 2) { |
| 477 | /* apply fixes in PHY AFE */ |
| 478 | gm_phy_write(hw, port, 22, 255); |
| 479 | /* increase differential signal amplitude in 10BASE-T */ |
| 480 | gm_phy_write(hw, port, 24, 0xaa99); |
| 481 | gm_phy_write(hw, port, 23, 0x2011); |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 482 | |
Stephen Hemminger | 977bdf0 | 2006-02-22 11:44:58 -0800 | [diff] [blame] | 483 | /* fix for IEEE A/B Symmetry failure in 1000BASE-T */ |
| 484 | gm_phy_write(hw, port, 24, 0xa204); |
| 485 | gm_phy_write(hw, port, 23, 0x2002); |
| 486 | |
| 487 | /* set page register to 0 */ |
| 488 | gm_phy_write(hw, port, 22, 0); |
| 489 | } else { |
| 490 | gm_phy_write(hw, port, PHY_MARV_LED_CTRL, ledctrl); |
| 491 | |
| 492 | if (sky2->autoneg == AUTONEG_DISABLE || sky2->speed == SPEED_100) { |
| 493 | /* turn on 100 Mbps LED (LED_LINK100) */ |
| 494 | ledover |= PHY_M_LED_MO_100(MO_LED_ON); |
| 495 | } |
| 496 | |
| 497 | if (ledover) |
| 498 | gm_phy_write(hw, port, PHY_MARV_LED_OVER, ledover); |
| 499 | |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 500 | } |
shemminger@osdl.org | d571b69 | 2005-10-26 12:16:09 -0700 | [diff] [blame] | 501 | /* Enable phy interrupt on auto-negotiation complete (or link up) */ |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 502 | if (sky2->autoneg == AUTONEG_ENABLE) |
| 503 | gm_phy_write(hw, port, PHY_MARV_INT_MASK, PHY_M_IS_AN_COMPL); |
| 504 | else |
| 505 | gm_phy_write(hw, port, PHY_MARV_INT_MASK, PHY_M_DEF_MSK); |
| 506 | } |
| 507 | |
Stephen Hemminger | 1b53756 | 2005-12-20 15:08:07 -0800 | [diff] [blame] | 508 | /* Force a renegotiation */ |
| 509 | static void sky2_phy_reinit(struct sky2_port *sky2) |
| 510 | { |
| 511 | down(&sky2->phy_sema); |
| 512 | sky2_phy_init(sky2->hw, sky2->port); |
| 513 | up(&sky2->phy_sema); |
| 514 | } |
| 515 | |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 516 | static void sky2_mac_init(struct sky2_hw *hw, unsigned port) |
| 517 | { |
| 518 | struct sky2_port *sky2 = netdev_priv(hw->dev[port]); |
| 519 | u16 reg; |
| 520 | int i; |
| 521 | const u8 *addr = hw->dev[port]->dev_addr; |
| 522 | |
shemminger@osdl.org | 42eeea0 | 2005-11-30 11:45:13 -0800 | [diff] [blame] | 523 | sky2_write32(hw, SK_REG(port, GPHY_CTRL), GPC_RST_SET); |
| 524 | sky2_write32(hw, SK_REG(port, GPHY_CTRL), GPC_RST_CLR|GPC_ENA_PAUSE); |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 525 | |
| 526 | sky2_write8(hw, SK_REG(port, GMAC_CTRL), GMC_RST_CLR); |
| 527 | |
Stephen Hemminger | 793b883 | 2005-09-14 16:06:14 -0700 | [diff] [blame] | 528 | if (hw->chip_id == CHIP_ID_YUKON_XL && hw->chip_rev == 0 && port == 1) { |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 529 | /* WA DEV_472 -- looks like crossed wires on port 2 */ |
| 530 | /* clear GMAC 1 Control reset */ |
| 531 | sky2_write8(hw, SK_REG(0, GMAC_CTRL), GMC_RST_CLR); |
| 532 | do { |
| 533 | sky2_write8(hw, SK_REG(1, GMAC_CTRL), GMC_RST_SET); |
| 534 | sky2_write8(hw, SK_REG(1, GMAC_CTRL), GMC_RST_CLR); |
| 535 | } while (gm_phy_read(hw, 1, PHY_MARV_ID0) != PHY_MARV_ID0_VAL || |
| 536 | gm_phy_read(hw, 1, PHY_MARV_ID1) != PHY_MARV_ID1_Y2 || |
| 537 | gm_phy_read(hw, 1, PHY_MARV_INT_MASK) != 0); |
| 538 | } |
| 539 | |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 540 | if (sky2->autoneg == AUTONEG_DISABLE) { |
| 541 | reg = gma_read16(hw, port, GM_GP_CTRL); |
| 542 | reg |= GM_GPCR_AU_ALL_DIS; |
| 543 | gma_write16(hw, port, GM_GP_CTRL, reg); |
| 544 | gma_read16(hw, port, GM_GP_CTRL); |
| 545 | |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 546 | switch (sky2->speed) { |
| 547 | case SPEED_1000: |
Stephen Hemminger | 6f4c56b | 2006-02-10 15:58:59 -0800 | [diff] [blame] | 548 | reg &= ~GM_GPCR_SPEED_100; |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 549 | reg |= GM_GPCR_SPEED_1000; |
Stephen Hemminger | 6f4c56b | 2006-02-10 15:58:59 -0800 | [diff] [blame] | 550 | break; |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 551 | case SPEED_100: |
Stephen Hemminger | 6f4c56b | 2006-02-10 15:58:59 -0800 | [diff] [blame] | 552 | reg &= ~GM_GPCR_SPEED_1000; |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 553 | reg |= GM_GPCR_SPEED_100; |
Stephen Hemminger | 6f4c56b | 2006-02-10 15:58:59 -0800 | [diff] [blame] | 554 | break; |
| 555 | case SPEED_10: |
| 556 | reg &= ~(GM_GPCR_SPEED_1000 | GM_GPCR_SPEED_100); |
| 557 | break; |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 558 | } |
| 559 | |
| 560 | if (sky2->duplex == DUPLEX_FULL) |
| 561 | reg |= GM_GPCR_DUP_FULL; |
| 562 | } else |
| 563 | reg = GM_GPCR_SPEED_1000 | GM_GPCR_SPEED_100 | GM_GPCR_DUP_FULL; |
| 564 | |
| 565 | if (!sky2->tx_pause && !sky2->rx_pause) { |
| 566 | sky2_write32(hw, SK_REG(port, GMAC_CTRL), GMC_PAUSE_OFF); |
Stephen Hemminger | 793b883 | 2005-09-14 16:06:14 -0700 | [diff] [blame] | 567 | reg |= |
| 568 | GM_GPCR_FC_TX_DIS | GM_GPCR_FC_RX_DIS | GM_GPCR_AU_FCT_DIS; |
| 569 | } else if (sky2->tx_pause && !sky2->rx_pause) { |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 570 | /* disable Rx flow-control */ |
| 571 | reg |= GM_GPCR_FC_RX_DIS | GM_GPCR_AU_FCT_DIS; |
| 572 | } |
| 573 | |
| 574 | gma_write16(hw, port, GM_GP_CTRL, reg); |
| 575 | |
Stephen Hemminger | 793b883 | 2005-09-14 16:06:14 -0700 | [diff] [blame] | 576 | sky2_read16(hw, SK_REG(port, GMAC_IRQ_SRC)); |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 577 | |
Stephen Hemminger | 91c86df | 2005-12-09 11:34:57 -0800 | [diff] [blame] | 578 | down(&sky2->phy_sema); |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 579 | sky2_phy_init(hw, port); |
Stephen Hemminger | 91c86df | 2005-12-09 11:34:57 -0800 | [diff] [blame] | 580 | up(&sky2->phy_sema); |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 581 | |
| 582 | /* MIB clear */ |
| 583 | reg = gma_read16(hw, port, GM_PHY_ADDR); |
| 584 | gma_write16(hw, port, GM_PHY_ADDR, reg | GM_PAR_MIB_CLR); |
| 585 | |
| 586 | for (i = 0; i < GM_MIB_CNT_SIZE; i++) |
Stephen Hemminger | 793b883 | 2005-09-14 16:06:14 -0700 | [diff] [blame] | 587 | gma_read16(hw, port, GM_MIB_CNT_BASE + 8 * i); |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 588 | gma_write16(hw, port, GM_PHY_ADDR, reg); |
| 589 | |
| 590 | /* transmit control */ |
| 591 | gma_write16(hw, port, GM_TX_CTRL, TX_COL_THR(TX_COL_DEF)); |
| 592 | |
| 593 | /* receive control reg: unicast + multicast + no FCS */ |
| 594 | gma_write16(hw, port, GM_RX_CTRL, |
Stephen Hemminger | 793b883 | 2005-09-14 16:06:14 -0700 | [diff] [blame] | 595 | GM_RXCR_UCF_ENA | GM_RXCR_CRC_DIS | GM_RXCR_MCF_ENA); |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 596 | |
| 597 | /* transmit flow control */ |
| 598 | gma_write16(hw, port, GM_TX_FLOW_CTRL, 0xffff); |
| 599 | |
| 600 | /* transmit parameter */ |
| 601 | gma_write16(hw, port, GM_TX_PARAM, |
| 602 | TX_JAM_LEN_VAL(TX_JAM_LEN_DEF) | |
| 603 | TX_JAM_IPG_VAL(TX_JAM_IPG_DEF) | |
| 604 | TX_IPG_JAM_DATA(TX_IPG_JAM_DEF) | |
| 605 | TX_BACK_OFF_LIM(TX_BOF_LIM_DEF)); |
| 606 | |
| 607 | /* serial mode register */ |
| 608 | reg = DATA_BLIND_VAL(DATA_BLIND_DEF) | |
shemminger@osdl.org | 6b1a3ae | 2005-09-27 15:02:55 -0700 | [diff] [blame] | 609 | GM_SMOD_VLAN_ENA | IPG_DATA_VAL(IPG_DATA_DEF); |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 610 | |
shemminger@osdl.org | 6b1a3ae | 2005-09-27 15:02:55 -0700 | [diff] [blame] | 611 | if (hw->dev[port]->mtu > ETH_DATA_LEN) |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 612 | reg |= GM_SMOD_JUMBO_ENA; |
| 613 | |
| 614 | gma_write16(hw, port, GM_SERIAL_MODE, reg); |
| 615 | |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 616 | /* virtual address for data */ |
| 617 | gma_set_addr(hw, port, GM_SRC_ADDR_2L, addr); |
| 618 | |
Stephen Hemminger | 793b883 | 2005-09-14 16:06:14 -0700 | [diff] [blame] | 619 | /* physical address: used for pause frames */ |
| 620 | gma_set_addr(hw, port, GM_SRC_ADDR_1L, addr); |
| 621 | |
| 622 | /* ignore counter overflows */ |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 623 | gma_write16(hw, port, GM_TX_IRQ_MSK, 0); |
| 624 | gma_write16(hw, port, GM_RX_IRQ_MSK, 0); |
| 625 | gma_write16(hw, port, GM_TR_IRQ_MSK, 0); |
| 626 | |
| 627 | /* Configure Rx MAC FIFO */ |
| 628 | sky2_write8(hw, SK_REG(port, RX_GMF_CTRL_T), GMF_RST_CLR); |
Stephen Hemminger | 793b883 | 2005-09-14 16:06:14 -0700 | [diff] [blame] | 629 | sky2_write16(hw, SK_REG(port, RX_GMF_CTRL_T), |
shemminger@osdl.org | d1f1370 | 2005-09-27 15:02:57 -0700 | [diff] [blame] | 630 | GMF_RX_CTRL_DEF); |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 631 | |
shemminger@osdl.org | d571b69 | 2005-10-26 12:16:09 -0700 | [diff] [blame] | 632 | /* Flush Rx MAC FIFO on any flow control or error */ |
shemminger@osdl.org | 42eeea0 | 2005-11-30 11:45:13 -0800 | [diff] [blame] | 633 | sky2_write16(hw, SK_REG(port, RX_GMF_FL_MSK), GMR_FS_ANY_ERR); |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 634 | |
Stephen Hemminger | 793b883 | 2005-09-14 16:06:14 -0700 | [diff] [blame] | 635 | /* Set threshold to 0xa (64 bytes) |
| 636 | * ASF disabled so no need to do WA dev #4.30 |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 637 | */ |
| 638 | sky2_write16(hw, SK_REG(port, RX_GMF_FL_THR), RX_GMF_FL_THR_DEF); |
| 639 | |
| 640 | /* Configure Tx MAC FIFO */ |
| 641 | sky2_write8(hw, SK_REG(port, TX_GMF_CTRL_T), GMF_RST_CLR); |
| 642 | sky2_write16(hw, SK_REG(port, TX_GMF_CTRL_T), GMF_OPER_ON); |
shemminger@osdl.org | 5a5b1ea | 2005-11-30 11:45:15 -0800 | [diff] [blame] | 643 | |
| 644 | if (hw->chip_id == CHIP_ID_YUKON_EC_U) { |
| 645 | sky2_write8(hw, SK_REG(port, RX_GMF_LP_THR), 768/8); |
| 646 | sky2_write8(hw, SK_REG(port, RX_GMF_UP_THR), 1024/8); |
| 647 | if (hw->dev[port]->mtu > ETH_DATA_LEN) { |
| 648 | /* set Tx GMAC FIFO Almost Empty Threshold */ |
| 649 | sky2_write32(hw, SK_REG(port, TX_GMF_AE_THR), 0x180); |
| 650 | /* Disable Store & Forward mode for TX */ |
| 651 | sky2_write32(hw, SK_REG(port, TX_GMF_CTRL_T), TX_STFW_DIS); |
| 652 | } |
| 653 | } |
| 654 | |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 655 | } |
| 656 | |
Stephen Hemminger | 1c28f6b | 2006-01-17 13:43:13 -0800 | [diff] [blame] | 657 | /* Assign Ram Buffer allocation. |
| 658 | * start and end are in units of 4k bytes |
| 659 | * ram registers are in units of 64bit words |
| 660 | */ |
| 661 | static void sky2_ramset(struct sky2_hw *hw, u16 q, u8 startk, u8 endk) |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 662 | { |
Stephen Hemminger | 1c28f6b | 2006-01-17 13:43:13 -0800 | [diff] [blame] | 663 | u32 start, end; |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 664 | |
Stephen Hemminger | 1c28f6b | 2006-01-17 13:43:13 -0800 | [diff] [blame] | 665 | start = startk * 4096/8; |
| 666 | end = (endk * 4096/8) - 1; |
Stephen Hemminger | 793b883 | 2005-09-14 16:06:14 -0700 | [diff] [blame] | 667 | |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 668 | sky2_write8(hw, RB_ADDR(q, RB_CTRL), RB_RST_CLR); |
| 669 | sky2_write32(hw, RB_ADDR(q, RB_START), start); |
| 670 | sky2_write32(hw, RB_ADDR(q, RB_END), end); |
| 671 | sky2_write32(hw, RB_ADDR(q, RB_WP), start); |
| 672 | sky2_write32(hw, RB_ADDR(q, RB_RP), start); |
| 673 | |
| 674 | if (q == Q_R1 || q == Q_R2) { |
Stephen Hemminger | 1c28f6b | 2006-01-17 13:43:13 -0800 | [diff] [blame] | 675 | u32 space = (endk - startk) * 4096/8; |
| 676 | u32 tp = space - space/4; |
Stephen Hemminger | 793b883 | 2005-09-14 16:06:14 -0700 | [diff] [blame] | 677 | |
Stephen Hemminger | 1c28f6b | 2006-01-17 13:43:13 -0800 | [diff] [blame] | 678 | /* On receive queue's set the thresholds |
| 679 | * give receiver priority when > 3/4 full |
| 680 | * send pause when down to 2K |
| 681 | */ |
| 682 | sky2_write32(hw, RB_ADDR(q, RB_RX_UTHP), tp); |
| 683 | sky2_write32(hw, RB_ADDR(q, RB_RX_LTHP), space/2); |
Stephen Hemminger | 793b883 | 2005-09-14 16:06:14 -0700 | [diff] [blame] | 684 | |
Stephen Hemminger | 1c28f6b | 2006-01-17 13:43:13 -0800 | [diff] [blame] | 685 | tp = space - 2048/8; |
| 686 | sky2_write32(hw, RB_ADDR(q, RB_RX_UTPP), tp); |
| 687 | sky2_write32(hw, RB_ADDR(q, RB_RX_LTPP), space/4); |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 688 | } else { |
| 689 | /* Enable store & forward on Tx queue's because |
| 690 | * Tx FIFO is only 1K on Yukon |
| 691 | */ |
| 692 | sky2_write8(hw, RB_ADDR(q, RB_CTRL), RB_ENA_STFWD); |
| 693 | } |
| 694 | |
| 695 | sky2_write8(hw, RB_ADDR(q, RB_CTRL), RB_ENA_OP_MD); |
Stephen Hemminger | 793b883 | 2005-09-14 16:06:14 -0700 | [diff] [blame] | 696 | sky2_read8(hw, RB_ADDR(q, RB_CTRL)); |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 697 | } |
| 698 | |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 699 | /* Setup Bus Memory Interface */ |
shemminger@osdl.org | af4ed7e | 2005-11-30 11:45:21 -0800 | [diff] [blame] | 700 | static void sky2_qset(struct sky2_hw *hw, u16 q) |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 701 | { |
| 702 | sky2_write32(hw, Q_ADDR(q, Q_CSR), BMU_CLR_RESET); |
| 703 | sky2_write32(hw, Q_ADDR(q, Q_CSR), BMU_OPER_INIT); |
| 704 | sky2_write32(hw, Q_ADDR(q, Q_CSR), BMU_FIFO_OP_ON); |
shemminger@osdl.org | af4ed7e | 2005-11-30 11:45:21 -0800 | [diff] [blame] | 705 | sky2_write32(hw, Q_ADDR(q, Q_WM), BMU_WM_DEFAULT); |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 706 | } |
| 707 | |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 708 | /* Setup prefetch unit registers. This is the interface between |
| 709 | * hardware and driver list elements |
| 710 | */ |
Stephen Hemminger | 8cc048e | 2005-12-09 11:35:07 -0800 | [diff] [blame] | 711 | static void sky2_prefetch_init(struct sky2_hw *hw, u32 qaddr, |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 712 | u64 addr, u32 last) |
| 713 | { |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 714 | sky2_write32(hw, Y2_QADDR(qaddr, PREF_UNIT_CTRL), PREF_UNIT_RST_SET); |
| 715 | sky2_write32(hw, Y2_QADDR(qaddr, PREF_UNIT_CTRL), PREF_UNIT_RST_CLR); |
| 716 | sky2_write32(hw, Y2_QADDR(qaddr, PREF_UNIT_ADDR_HI), addr >> 32); |
| 717 | sky2_write32(hw, Y2_QADDR(qaddr, PREF_UNIT_ADDR_LO), (u32) addr); |
| 718 | sky2_write16(hw, Y2_QADDR(qaddr, PREF_UNIT_LAST_IDX), last); |
| 719 | sky2_write32(hw, Y2_QADDR(qaddr, PREF_UNIT_CTRL), PREF_UNIT_OP_ON); |
Stephen Hemminger | 793b883 | 2005-09-14 16:06:14 -0700 | [diff] [blame] | 720 | |
| 721 | sky2_read32(hw, Y2_QADDR(qaddr, PREF_UNIT_CTRL)); |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 722 | } |
| 723 | |
Stephen Hemminger | 793b883 | 2005-09-14 16:06:14 -0700 | [diff] [blame] | 724 | static inline struct sky2_tx_le *get_tx_le(struct sky2_port *sky2) |
| 725 | { |
| 726 | struct sky2_tx_le *le = sky2->tx_le + sky2->tx_prod; |
| 727 | |
| 728 | sky2->tx_prod = (sky2->tx_prod + 1) % TX_RING_SIZE; |
| 729 | return le; |
| 730 | } |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 731 | |
| 732 | /* |
shemminger@osdl.org | d571b69 | 2005-10-26 12:16:09 -0700 | [diff] [blame] | 733 | * This is a workaround code taken from SysKonnect sk98lin driver |
Stephen Hemminger | 793b883 | 2005-09-14 16:06:14 -0700 | [diff] [blame] | 734 | * to deal with chip bug on Yukon EC rev 0 in the wraparound case. |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 735 | */ |
Stephen Hemminger | 28bd181 | 2006-01-17 13:43:19 -0800 | [diff] [blame] | 736 | static void sky2_put_idx(struct sky2_hw *hw, unsigned q, |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 737 | u16 idx, u16 *last, u16 size) |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 738 | { |
Stephen Hemminger | 762c2de | 2006-01-17 13:43:14 -0800 | [diff] [blame] | 739 | wmb(); |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 740 | if (is_ec_a1(hw) && idx < *last) { |
| 741 | u16 hwget = sky2_read16(hw, Y2_QADDR(q, PREF_UNIT_GET_IDX)); |
| 742 | |
| 743 | if (hwget == 0) { |
| 744 | /* Start prefetching again */ |
Stephen Hemminger | 793b883 | 2005-09-14 16:06:14 -0700 | [diff] [blame] | 745 | sky2_write8(hw, Y2_QADDR(q, PREF_UNIT_FIFO_WM), 0xe0); |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 746 | goto setnew; |
| 747 | } |
| 748 | |
Stephen Hemminger | 793b883 | 2005-09-14 16:06:14 -0700 | [diff] [blame] | 749 | if (hwget == size - 1) { |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 750 | /* set watermark to one list element */ |
| 751 | sky2_write8(hw, Y2_QADDR(q, PREF_UNIT_FIFO_WM), 8); |
| 752 | |
| 753 | /* set put index to first list element */ |
| 754 | sky2_write16(hw, Y2_QADDR(q, PREF_UNIT_PUT_IDX), 0); |
Stephen Hemminger | 793b883 | 2005-09-14 16:06:14 -0700 | [diff] [blame] | 755 | } else /* have hardware go to end of list */ |
| 756 | sky2_write16(hw, Y2_QADDR(q, PREF_UNIT_PUT_IDX), |
| 757 | size - 1); |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 758 | } else { |
Stephen Hemminger | 793b883 | 2005-09-14 16:06:14 -0700 | [diff] [blame] | 759 | setnew: |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 760 | sky2_write16(hw, Y2_QADDR(q, PREF_UNIT_PUT_IDX), idx); |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 761 | } |
shemminger@osdl.org | bea8610 | 2005-10-26 12:16:10 -0700 | [diff] [blame] | 762 | *last = idx; |
Stephen Hemminger | 762c2de | 2006-01-17 13:43:14 -0800 | [diff] [blame] | 763 | mmiowb(); |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 764 | } |
| 765 | |
Stephen Hemminger | 793b883 | 2005-09-14 16:06:14 -0700 | [diff] [blame] | 766 | |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 767 | static inline struct sky2_rx_le *sky2_next_rx(struct sky2_port *sky2) |
| 768 | { |
| 769 | struct sky2_rx_le *le = sky2->rx_le + sky2->rx_put; |
| 770 | sky2->rx_put = (sky2->rx_put + 1) % RX_LE_SIZE; |
| 771 | return le; |
| 772 | } |
| 773 | |
shemminger@osdl.org | a018e33 | 2005-11-30 11:45:16 -0800 | [diff] [blame] | 774 | /* Return high part of DMA address (could be 32 or 64 bit) */ |
| 775 | static inline u32 high32(dma_addr_t a) |
| 776 | { |
Stephen Hemminger | a036119 | 2006-01-17 13:43:16 -0800 | [diff] [blame] | 777 | return sizeof(a) > sizeof(u32) ? (a >> 16) >> 16 : 0; |
shemminger@osdl.org | a018e33 | 2005-11-30 11:45:16 -0800 | [diff] [blame] | 778 | } |
| 779 | |
Stephen Hemminger | 793b883 | 2005-09-14 16:06:14 -0700 | [diff] [blame] | 780 | /* Build description to hardware about buffer */ |
Stephen Hemminger | 28bd181 | 2006-01-17 13:43:19 -0800 | [diff] [blame] | 781 | static void sky2_rx_add(struct sky2_port *sky2, dma_addr_t map) |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 782 | { |
| 783 | struct sky2_rx_le *le; |
Stephen Hemminger | 734d186 | 2005-12-09 11:35:00 -0800 | [diff] [blame] | 784 | u32 hi = high32(map); |
| 785 | u16 len = sky2->rx_bufsize; |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 786 | |
Stephen Hemminger | 793b883 | 2005-09-14 16:06:14 -0700 | [diff] [blame] | 787 | if (sky2->rx_addr64 != hi) { |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 788 | le = sky2_next_rx(sky2); |
Stephen Hemminger | 793b883 | 2005-09-14 16:06:14 -0700 | [diff] [blame] | 789 | le->addr = cpu_to_le32(hi); |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 790 | le->ctrl = 0; |
| 791 | le->opcode = OP_ADDR64 | HW_OWNER; |
Stephen Hemminger | 734d186 | 2005-12-09 11:35:00 -0800 | [diff] [blame] | 792 | sky2->rx_addr64 = high32(map + len); |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 793 | } |
Stephen Hemminger | 793b883 | 2005-09-14 16:06:14 -0700 | [diff] [blame] | 794 | |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 795 | le = sky2_next_rx(sky2); |
Stephen Hemminger | 734d186 | 2005-12-09 11:35:00 -0800 | [diff] [blame] | 796 | le->addr = cpu_to_le32((u32) map); |
| 797 | le->length = cpu_to_le16(len); |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 798 | le->ctrl = 0; |
| 799 | le->opcode = OP_PACKET | HW_OWNER; |
| 800 | } |
| 801 | |
Stephen Hemminger | 793b883 | 2005-09-14 16:06:14 -0700 | [diff] [blame] | 802 | |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 803 | /* Tell chip where to start receive checksum. |
| 804 | * Actually has two checksums, but set both same to avoid possible byte |
| 805 | * order problems. |
| 806 | */ |
Stephen Hemminger | 793b883 | 2005-09-14 16:06:14 -0700 | [diff] [blame] | 807 | static void rx_set_checksum(struct sky2_port *sky2) |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 808 | { |
| 809 | struct sky2_rx_le *le; |
| 810 | |
Stephen Hemminger | 793b883 | 2005-09-14 16:06:14 -0700 | [diff] [blame] | 811 | le = sky2_next_rx(sky2); |
| 812 | le->addr = (ETH_HLEN << 16) | ETH_HLEN; |
| 813 | le->ctrl = 0; |
| 814 | le->opcode = OP_TCPSTART | HW_OWNER; |
| 815 | |
Stephen Hemminger | 793b883 | 2005-09-14 16:06:14 -0700 | [diff] [blame] | 816 | sky2_write32(sky2->hw, |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 817 | Q_ADDR(rxqaddr[sky2->port], Q_CSR), |
| 818 | sky2->rx_csum ? BMU_ENA_RX_CHKSUM : BMU_DIS_RX_CHKSUM); |
| 819 | |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 820 | } |
| 821 | |
shemminger@osdl.org | 6b1a3ae | 2005-09-27 15:02:55 -0700 | [diff] [blame] | 822 | /* |
| 823 | * The RX Stop command will not work for Yukon-2 if the BMU does not |
| 824 | * reach the end of packet and since we can't make sure that we have |
| 825 | * incoming data, we must reset the BMU while it is not doing a DMA |
| 826 | * transfer. Since it is possible that the RX path is still active, |
| 827 | * the RX RAM buffer will be stopped first, so any possible incoming |
| 828 | * data will not trigger a DMA. After the RAM buffer is stopped, the |
| 829 | * BMU is polled until any DMA in progress is ended and only then it |
| 830 | * will be reset. |
| 831 | */ |
| 832 | static void sky2_rx_stop(struct sky2_port *sky2) |
| 833 | { |
| 834 | struct sky2_hw *hw = sky2->hw; |
| 835 | unsigned rxq = rxqaddr[sky2->port]; |
| 836 | int i; |
| 837 | |
| 838 | /* disable the RAM Buffer receive queue */ |
| 839 | sky2_write8(hw, RB_ADDR(rxq, RB_CTRL), RB_DIS_OP_MD); |
| 840 | |
| 841 | for (i = 0; i < 0xffff; i++) |
| 842 | if (sky2_read8(hw, RB_ADDR(rxq, Q_RSL)) |
| 843 | == sky2_read8(hw, RB_ADDR(rxq, Q_RL))) |
| 844 | goto stopped; |
| 845 | |
| 846 | printk(KERN_WARNING PFX "%s: receiver stop failed\n", |
| 847 | sky2->netdev->name); |
| 848 | stopped: |
| 849 | sky2_write32(hw, Q_ADDR(rxq, Q_CSR), BMU_RST_SET | BMU_FIFO_RST); |
| 850 | |
| 851 | /* reset the Rx prefetch unit */ |
| 852 | sky2_write32(hw, Y2_QADDR(rxq, PREF_UNIT_CTRL), PREF_UNIT_RST_SET); |
| 853 | } |
Stephen Hemminger | 793b883 | 2005-09-14 16:06:14 -0700 | [diff] [blame] | 854 | |
shemminger@osdl.org | d571b69 | 2005-10-26 12:16:09 -0700 | [diff] [blame] | 855 | /* Clean out receive buffer area, assumes receiver hardware stopped */ |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 856 | static void sky2_rx_clean(struct sky2_port *sky2) |
| 857 | { |
| 858 | unsigned i; |
| 859 | |
| 860 | memset(sky2->rx_le, 0, RX_LE_BYTES); |
Stephen Hemminger | 793b883 | 2005-09-14 16:06:14 -0700 | [diff] [blame] | 861 | for (i = 0; i < sky2->rx_pending; i++) { |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 862 | struct ring_info *re = sky2->rx_ring + i; |
| 863 | |
| 864 | if (re->skb) { |
Stephen Hemminger | 793b883 | 2005-09-14 16:06:14 -0700 | [diff] [blame] | 865 | pci_unmap_single(sky2->hw->pdev, |
Stephen Hemminger | 734d186 | 2005-12-09 11:35:00 -0800 | [diff] [blame] | 866 | re->mapaddr, sky2->rx_bufsize, |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 867 | PCI_DMA_FROMDEVICE); |
| 868 | kfree_skb(re->skb); |
| 869 | re->skb = NULL; |
| 870 | } |
| 871 | } |
| 872 | } |
| 873 | |
shemminger@osdl.org | ef743d3 | 2005-11-30 11:45:12 -0800 | [diff] [blame] | 874 | /* Basic MII support */ |
| 875 | static int sky2_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd) |
| 876 | { |
| 877 | struct mii_ioctl_data *data = if_mii(ifr); |
| 878 | struct sky2_port *sky2 = netdev_priv(dev); |
| 879 | struct sky2_hw *hw = sky2->hw; |
| 880 | int err = -EOPNOTSUPP; |
| 881 | |
| 882 | if (!netif_running(dev)) |
| 883 | return -ENODEV; /* Phy still in reset */ |
| 884 | |
| 885 | switch(cmd) { |
| 886 | case SIOCGMIIPHY: |
| 887 | data->phy_id = PHY_ADDR_MARV; |
| 888 | |
| 889 | /* fallthru */ |
| 890 | case SIOCGMIIREG: { |
| 891 | u16 val = 0; |
Stephen Hemminger | 91c86df | 2005-12-09 11:34:57 -0800 | [diff] [blame] | 892 | |
| 893 | down(&sky2->phy_sema); |
shemminger@osdl.org | ef743d3 | 2005-11-30 11:45:12 -0800 | [diff] [blame] | 894 | err = __gm_phy_read(hw, sky2->port, data->reg_num & 0x1f, &val); |
Stephen Hemminger | 91c86df | 2005-12-09 11:34:57 -0800 | [diff] [blame] | 895 | up(&sky2->phy_sema); |
| 896 | |
shemminger@osdl.org | ef743d3 | 2005-11-30 11:45:12 -0800 | [diff] [blame] | 897 | data->val_out = val; |
| 898 | break; |
| 899 | } |
| 900 | |
| 901 | case SIOCSMIIREG: |
| 902 | if (!capable(CAP_NET_ADMIN)) |
| 903 | return -EPERM; |
| 904 | |
Stephen Hemminger | 91c86df | 2005-12-09 11:34:57 -0800 | [diff] [blame] | 905 | down(&sky2->phy_sema); |
shemminger@osdl.org | ef743d3 | 2005-11-30 11:45:12 -0800 | [diff] [blame] | 906 | err = gm_phy_write(hw, sky2->port, data->reg_num & 0x1f, |
| 907 | data->val_in); |
Stephen Hemminger | 91c86df | 2005-12-09 11:34:57 -0800 | [diff] [blame] | 908 | up(&sky2->phy_sema); |
shemminger@osdl.org | ef743d3 | 2005-11-30 11:45:12 -0800 | [diff] [blame] | 909 | break; |
| 910 | } |
| 911 | return err; |
| 912 | } |
| 913 | |
shemminger@osdl.org | d1f1370 | 2005-09-27 15:02:57 -0700 | [diff] [blame] | 914 | #ifdef SKY2_VLAN_TAG_USED |
| 915 | static void sky2_vlan_rx_register(struct net_device *dev, struct vlan_group *grp) |
| 916 | { |
| 917 | struct sky2_port *sky2 = netdev_priv(dev); |
| 918 | struct sky2_hw *hw = sky2->hw; |
| 919 | u16 port = sky2->port; |
shemminger@osdl.org | d1f1370 | 2005-09-27 15:02:57 -0700 | [diff] [blame] | 920 | |
Stephen Hemminger | 302d125 | 2006-01-17 13:43:20 -0800 | [diff] [blame] | 921 | spin_lock_bh(&sky2->tx_lock); |
shemminger@osdl.org | d1f1370 | 2005-09-27 15:02:57 -0700 | [diff] [blame] | 922 | |
| 923 | sky2_write32(hw, SK_REG(port, RX_GMF_CTRL_T), RX_VLAN_STRIP_ON); |
| 924 | sky2_write32(hw, SK_REG(port, TX_GMF_CTRL_T), TX_VLAN_TAG_ON); |
| 925 | sky2->vlgrp = grp; |
| 926 | |
Stephen Hemminger | 302d125 | 2006-01-17 13:43:20 -0800 | [diff] [blame] | 927 | spin_unlock_bh(&sky2->tx_lock); |
shemminger@osdl.org | d1f1370 | 2005-09-27 15:02:57 -0700 | [diff] [blame] | 928 | } |
| 929 | |
| 930 | static void sky2_vlan_rx_kill_vid(struct net_device *dev, unsigned short vid) |
| 931 | { |
| 932 | struct sky2_port *sky2 = netdev_priv(dev); |
| 933 | struct sky2_hw *hw = sky2->hw; |
| 934 | u16 port = sky2->port; |
shemminger@osdl.org | d1f1370 | 2005-09-27 15:02:57 -0700 | [diff] [blame] | 935 | |
Stephen Hemminger | 302d125 | 2006-01-17 13:43:20 -0800 | [diff] [blame] | 936 | spin_lock_bh(&sky2->tx_lock); |
shemminger@osdl.org | d1f1370 | 2005-09-27 15:02:57 -0700 | [diff] [blame] | 937 | |
| 938 | sky2_write32(hw, SK_REG(port, RX_GMF_CTRL_T), RX_VLAN_STRIP_OFF); |
| 939 | sky2_write32(hw, SK_REG(port, TX_GMF_CTRL_T), TX_VLAN_TAG_OFF); |
| 940 | if (sky2->vlgrp) |
| 941 | sky2->vlgrp->vlan_devices[vid] = NULL; |
| 942 | |
Stephen Hemminger | 302d125 | 2006-01-17 13:43:20 -0800 | [diff] [blame] | 943 | spin_unlock_bh(&sky2->tx_lock); |
shemminger@osdl.org | d1f1370 | 2005-09-27 15:02:57 -0700 | [diff] [blame] | 944 | } |
| 945 | #endif |
| 946 | |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 947 | /* |
Stephen Hemminger | 82788c7 | 2006-01-17 13:43:10 -0800 | [diff] [blame] | 948 | * It appears the hardware has a bug in the FIFO logic that |
| 949 | * cause it to hang if the FIFO gets overrun and the receive buffer |
| 950 | * is not aligned. ALso alloc_skb() won't align properly if slab |
| 951 | * debugging is enabled. |
| 952 | */ |
| 953 | static inline struct sk_buff *sky2_alloc_skb(unsigned int size, gfp_t gfp_mask) |
| 954 | { |
| 955 | struct sk_buff *skb; |
| 956 | |
| 957 | skb = alloc_skb(size + RX_SKB_ALIGN, gfp_mask); |
| 958 | if (likely(skb)) { |
| 959 | unsigned long p = (unsigned long) skb->data; |
| 960 | skb_reserve(skb, |
| 961 | ((p + RX_SKB_ALIGN - 1) & ~(RX_SKB_ALIGN - 1)) - p); |
| 962 | } |
| 963 | |
| 964 | return skb; |
| 965 | } |
| 966 | |
| 967 | /* |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 968 | * Allocate and setup receiver buffer pool. |
| 969 | * In case of 64 bit dma, there are 2X as many list elements |
| 970 | * available as ring entries |
| 971 | * and need to reserve one list element so we don't wrap around. |
| 972 | */ |
shemminger@osdl.org | 6b1a3ae | 2005-09-27 15:02:55 -0700 | [diff] [blame] | 973 | static int sky2_rx_start(struct sky2_port *sky2) |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 974 | { |
shemminger@osdl.org | 6b1a3ae | 2005-09-27 15:02:55 -0700 | [diff] [blame] | 975 | struct sky2_hw *hw = sky2->hw; |
shemminger@osdl.org | 6b1a3ae | 2005-09-27 15:02:55 -0700 | [diff] [blame] | 976 | unsigned rxq = rxqaddr[sky2->port]; |
| 977 | int i; |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 978 | |
shemminger@osdl.org | 6b1a3ae | 2005-09-27 15:02:55 -0700 | [diff] [blame] | 979 | sky2->rx_put = sky2->rx_next = 0; |
shemminger@osdl.org | af4ed7e | 2005-11-30 11:45:21 -0800 | [diff] [blame] | 980 | sky2_qset(hw, rxq); |
Stephen Hemminger | 977bdf0 | 2006-02-22 11:44:58 -0800 | [diff] [blame] | 981 | |
| 982 | if (hw->chip_id == CHIP_ID_YUKON_EC_U && hw->chip_rev >= 2) { |
| 983 | /* MAC Rx RAM Read is controlled by hardware */ |
| 984 | sky2_write32(hw, Q_ADDR(rxq, Q_F), F_M_RX_RAM_DIS); |
| 985 | } |
| 986 | |
shemminger@osdl.org | 6b1a3ae | 2005-09-27 15:02:55 -0700 | [diff] [blame] | 987 | sky2_prefetch_init(hw, rxq, sky2->rx_le_map, RX_LE_SIZE - 1); |
| 988 | |
| 989 | rx_set_checksum(sky2); |
Stephen Hemminger | 793b883 | 2005-09-14 16:06:14 -0700 | [diff] [blame] | 990 | for (i = 0; i < sky2->rx_pending; i++) { |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 991 | struct ring_info *re = sky2->rx_ring + i; |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 992 | |
Stephen Hemminger | 82788c7 | 2006-01-17 13:43:10 -0800 | [diff] [blame] | 993 | re->skb = sky2_alloc_skb(sky2->rx_bufsize, GFP_KERNEL); |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 994 | if (!re->skb) |
| 995 | goto nomem; |
| 996 | |
shemminger@osdl.org | 6b1a3ae | 2005-09-27 15:02:55 -0700 | [diff] [blame] | 997 | re->mapaddr = pci_map_single(hw->pdev, re->skb->data, |
Stephen Hemminger | 734d186 | 2005-12-09 11:35:00 -0800 | [diff] [blame] | 998 | sky2->rx_bufsize, PCI_DMA_FROMDEVICE); |
| 999 | sky2_rx_add(sky2, re->mapaddr); |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 1000 | } |
| 1001 | |
shemminger@osdl.org | 6b1a3ae | 2005-09-27 15:02:55 -0700 | [diff] [blame] | 1002 | /* Tell chip about available buffers */ |
| 1003 | sky2_write16(hw, Y2_QADDR(rxq, PREF_UNIT_PUT_IDX), sky2->rx_put); |
| 1004 | sky2->rx_last_put = sky2_read16(hw, Y2_QADDR(rxq, PREF_UNIT_PUT_IDX)); |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 1005 | return 0; |
| 1006 | nomem: |
| 1007 | sky2_rx_clean(sky2); |
| 1008 | return -ENOMEM; |
| 1009 | } |
| 1010 | |
| 1011 | /* Bring up network interface. */ |
| 1012 | static int sky2_up(struct net_device *dev) |
| 1013 | { |
| 1014 | struct sky2_port *sky2 = netdev_priv(dev); |
| 1015 | struct sky2_hw *hw = sky2->hw; |
| 1016 | unsigned port = sky2->port; |
| 1017 | u32 ramsize, rxspace; |
| 1018 | int err = -ENOMEM; |
| 1019 | |
| 1020 | if (netif_msg_ifup(sky2)) |
| 1021 | printk(KERN_INFO PFX "%s: enabling interface\n", dev->name); |
| 1022 | |
| 1023 | /* must be power of 2 */ |
| 1024 | sky2->tx_le = pci_alloc_consistent(hw->pdev, |
Stephen Hemminger | 793b883 | 2005-09-14 16:06:14 -0700 | [diff] [blame] | 1025 | TX_RING_SIZE * |
| 1026 | sizeof(struct sky2_tx_le), |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 1027 | &sky2->tx_le_map); |
| 1028 | if (!sky2->tx_le) |
| 1029 | goto err_out; |
| 1030 | |
Stephen Hemminger | 6cdbbdf | 2005-12-09 11:35:01 -0800 | [diff] [blame] | 1031 | sky2->tx_ring = kcalloc(TX_RING_SIZE, sizeof(struct tx_ring_info), |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 1032 | GFP_KERNEL); |
| 1033 | if (!sky2->tx_ring) |
| 1034 | goto err_out; |
| 1035 | sky2->tx_prod = sky2->tx_cons = 0; |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 1036 | |
| 1037 | sky2->rx_le = pci_alloc_consistent(hw->pdev, RX_LE_BYTES, |
| 1038 | &sky2->rx_le_map); |
| 1039 | if (!sky2->rx_le) |
| 1040 | goto err_out; |
| 1041 | memset(sky2->rx_le, 0, RX_LE_BYTES); |
| 1042 | |
Stephen Hemminger | 6cdbbdf | 2005-12-09 11:35:01 -0800 | [diff] [blame] | 1043 | sky2->rx_ring = kcalloc(sky2->rx_pending, sizeof(struct ring_info), |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 1044 | GFP_KERNEL); |
| 1045 | if (!sky2->rx_ring) |
| 1046 | goto err_out; |
| 1047 | |
| 1048 | sky2_mac_init(hw, port); |
| 1049 | |
Stephen Hemminger | 1c28f6b | 2006-01-17 13:43:13 -0800 | [diff] [blame] | 1050 | /* Determine available ram buffer space (in 4K blocks). |
| 1051 | * Note: not sure about the FE setting below yet |
| 1052 | */ |
| 1053 | if (hw->chip_id == CHIP_ID_YUKON_FE) |
| 1054 | ramsize = 4; |
| 1055 | else |
| 1056 | ramsize = sky2_read8(hw, B2_E_0); |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 1057 | |
Stephen Hemminger | 1c28f6b | 2006-01-17 13:43:13 -0800 | [diff] [blame] | 1058 | /* Give transmitter one third (rounded up) */ |
| 1059 | rxspace = ramsize - (ramsize + 2) / 3; |
| 1060 | |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 1061 | sky2_ramset(hw, rxqaddr[port], 0, rxspace); |
Stephen Hemminger | 1c28f6b | 2006-01-17 13:43:13 -0800 | [diff] [blame] | 1062 | sky2_ramset(hw, txqaddr[port], rxspace, ramsize); |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 1063 | |
Stephen Hemminger | 793b883 | 2005-09-14 16:06:14 -0700 | [diff] [blame] | 1064 | /* Make sure SyncQ is disabled */ |
| 1065 | sky2_write8(hw, RB_ADDR(port == 0 ? Q_XS1 : Q_XS2, RB_CTRL), |
| 1066 | RB_RST_SET); |
| 1067 | |
shemminger@osdl.org | af4ed7e | 2005-11-30 11:45:21 -0800 | [diff] [blame] | 1068 | sky2_qset(hw, txqaddr[port]); |
shemminger@osdl.org | 5a5b1ea | 2005-11-30 11:45:15 -0800 | [diff] [blame] | 1069 | |
Stephen Hemminger | 977bdf0 | 2006-02-22 11:44:58 -0800 | [diff] [blame] | 1070 | /* Set almost empty threshold */ |
| 1071 | if (hw->chip_id == CHIP_ID_YUKON_EC_U && hw->chip_rev == 1) |
| 1072 | sky2_write16(hw, Q_ADDR(txqaddr[port], Q_AL), 0x1a0); |
shemminger@osdl.org | 5a5b1ea | 2005-11-30 11:45:15 -0800 | [diff] [blame] | 1073 | |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 1074 | sky2_prefetch_init(hw, txqaddr[port], sky2->tx_le_map, |
| 1075 | TX_RING_SIZE - 1); |
| 1076 | |
shemminger@osdl.org | 6b1a3ae | 2005-09-27 15:02:55 -0700 | [diff] [blame] | 1077 | err = sky2_rx_start(sky2); |
| 1078 | if (err) |
| 1079 | goto err_out; |
| 1080 | |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 1081 | /* Enable interrupts from phy/mac for port */ |
| 1082 | hw->intr_mask |= (port == 0) ? Y2_IS_PORT_1 : Y2_IS_PORT_2; |
| 1083 | sky2_write32(hw, B0_IMSK, hw->intr_mask); |
| 1084 | return 0; |
| 1085 | |
| 1086 | err_out: |
Stephen Hemminger | 1b53756 | 2005-12-20 15:08:07 -0800 | [diff] [blame] | 1087 | if (sky2->rx_le) { |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 1088 | pci_free_consistent(hw->pdev, RX_LE_BYTES, |
| 1089 | sky2->rx_le, sky2->rx_le_map); |
Stephen Hemminger | 1b53756 | 2005-12-20 15:08:07 -0800 | [diff] [blame] | 1090 | sky2->rx_le = NULL; |
| 1091 | } |
| 1092 | if (sky2->tx_le) { |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 1093 | pci_free_consistent(hw->pdev, |
| 1094 | TX_RING_SIZE * sizeof(struct sky2_tx_le), |
| 1095 | sky2->tx_le, sky2->tx_le_map); |
Stephen Hemminger | 1b53756 | 2005-12-20 15:08:07 -0800 | [diff] [blame] | 1096 | sky2->tx_le = NULL; |
| 1097 | } |
| 1098 | kfree(sky2->tx_ring); |
| 1099 | kfree(sky2->rx_ring); |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 1100 | |
Stephen Hemminger | 1b53756 | 2005-12-20 15:08:07 -0800 | [diff] [blame] | 1101 | sky2->tx_ring = NULL; |
| 1102 | sky2->rx_ring = NULL; |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 1103 | return err; |
| 1104 | } |
| 1105 | |
Stephen Hemminger | 793b883 | 2005-09-14 16:06:14 -0700 | [diff] [blame] | 1106 | /* Modular subtraction in ring */ |
| 1107 | static inline int tx_dist(unsigned tail, unsigned head) |
| 1108 | { |
Stephen Hemminger | 129372d | 2005-12-09 11:34:59 -0800 | [diff] [blame] | 1109 | return (head - tail) % TX_RING_SIZE; |
Stephen Hemminger | 793b883 | 2005-09-14 16:06:14 -0700 | [diff] [blame] | 1110 | } |
| 1111 | |
| 1112 | /* Number of list elements available for next tx */ |
| 1113 | static inline int tx_avail(const struct sky2_port *sky2) |
| 1114 | { |
| 1115 | return sky2->tx_pending - tx_dist(sky2->tx_cons, sky2->tx_prod); |
| 1116 | } |
| 1117 | |
| 1118 | /* Estimate of number of transmit list elements required */ |
Stephen Hemminger | 28bd181 | 2006-01-17 13:43:19 -0800 | [diff] [blame] | 1119 | static unsigned tx_le_req(const struct sk_buff *skb) |
Stephen Hemminger | 793b883 | 2005-09-14 16:06:14 -0700 | [diff] [blame] | 1120 | { |
| 1121 | unsigned count; |
| 1122 | |
| 1123 | count = sizeof(dma_addr_t) / sizeof(u32); |
| 1124 | count += skb_shinfo(skb)->nr_frags * count; |
| 1125 | |
| 1126 | if (skb_shinfo(skb)->tso_size) |
| 1127 | ++count; |
| 1128 | |
Stephen Hemminger | 0e3ff6a | 2005-12-09 11:35:02 -0800 | [diff] [blame] | 1129 | if (skb->ip_summed == CHECKSUM_HW) |
Stephen Hemminger | 793b883 | 2005-09-14 16:06:14 -0700 | [diff] [blame] | 1130 | ++count; |
| 1131 | |
| 1132 | return count; |
| 1133 | } |
| 1134 | |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 1135 | /* |
Stephen Hemminger | 793b883 | 2005-09-14 16:06:14 -0700 | [diff] [blame] | 1136 | * Put one packet in ring for transmit. |
| 1137 | * A single packet can generate multiple list elements, and |
| 1138 | * the number of ring elements will probably be less than the number |
| 1139 | * of list elements used. |
Stephen Hemminger | f2e4656 | 2005-12-09 11:34:58 -0800 | [diff] [blame] | 1140 | * |
| 1141 | * No BH disabling for tx_lock here (like tg3) |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 1142 | */ |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 1143 | static int sky2_xmit_frame(struct sk_buff *skb, struct net_device *dev) |
| 1144 | { |
| 1145 | struct sky2_port *sky2 = netdev_priv(dev); |
| 1146 | struct sky2_hw *hw = sky2->hw; |
shemminger@osdl.org | d1f1370 | 2005-09-27 15:02:57 -0700 | [diff] [blame] | 1147 | struct sky2_tx_le *le = NULL; |
Stephen Hemminger | 6cdbbdf | 2005-12-09 11:35:01 -0800 | [diff] [blame] | 1148 | struct tx_ring_info *re; |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 1149 | unsigned i, len; |
| 1150 | dma_addr_t mapping; |
| 1151 | u32 addr64; |
| 1152 | u16 mss; |
| 1153 | u8 ctrl; |
| 1154 | |
Stephen Hemminger | 302d125 | 2006-01-17 13:43:20 -0800 | [diff] [blame] | 1155 | /* No BH disabling for tx_lock here. We are running in BH disabled |
| 1156 | * context and TX reclaim runs via poll inside of a software |
| 1157 | * interrupt, and no related locks in IRQ processing. |
| 1158 | */ |
Stephen Hemminger | f2e4656 | 2005-12-09 11:34:58 -0800 | [diff] [blame] | 1159 | if (!spin_trylock(&sky2->tx_lock)) |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 1160 | return NETDEV_TX_LOCKED; |
| 1161 | |
Stephen Hemminger | 793b883 | 2005-09-14 16:06:14 -0700 | [diff] [blame] | 1162 | if (unlikely(tx_avail(sky2) < tx_le_req(skb))) { |
Stephen Hemminger | 8c463ef | 2005-12-09 11:35:08 -0800 | [diff] [blame] | 1163 | /* There is a known but harmless race with lockless tx |
| 1164 | * and netif_stop_queue. |
| 1165 | */ |
| 1166 | if (!netif_queue_stopped(dev)) { |
| 1167 | netif_stop_queue(dev); |
Stephen Hemminger | 3be92a7 | 2006-01-17 13:43:17 -0800 | [diff] [blame] | 1168 | if (net_ratelimit()) |
| 1169 | printk(KERN_WARNING PFX "%s: ring full when queue awake!\n", |
| 1170 | dev->name); |
Stephen Hemminger | 8c463ef | 2005-12-09 11:35:08 -0800 | [diff] [blame] | 1171 | } |
Stephen Hemminger | f2e4656 | 2005-12-09 11:34:58 -0800 | [diff] [blame] | 1172 | spin_unlock(&sky2->tx_lock); |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 1173 | |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 1174 | return NETDEV_TX_BUSY; |
| 1175 | } |
| 1176 | |
Stephen Hemminger | 793b883 | 2005-09-14 16:06:14 -0700 | [diff] [blame] | 1177 | if (unlikely(netif_msg_tx_queued(sky2))) |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 1178 | printk(KERN_DEBUG "%s: tx queued, slot %u, len %d\n", |
| 1179 | dev->name, sky2->tx_prod, skb->len); |
| 1180 | |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 1181 | len = skb_headlen(skb); |
| 1182 | mapping = pci_map_single(hw->pdev, skb->data, len, PCI_DMA_TODEVICE); |
shemminger@osdl.org | a018e33 | 2005-11-30 11:45:16 -0800 | [diff] [blame] | 1183 | addr64 = high32(mapping); |
Stephen Hemminger | 793b883 | 2005-09-14 16:06:14 -0700 | [diff] [blame] | 1184 | |
| 1185 | re = sky2->tx_ring + sky2->tx_prod; |
| 1186 | |
shemminger@osdl.org | a018e33 | 2005-11-30 11:45:16 -0800 | [diff] [blame] | 1187 | /* Send high bits if changed or crosses boundary */ |
| 1188 | if (addr64 != sky2->tx_addr64 || high32(mapping + len) != sky2->tx_addr64) { |
Stephen Hemminger | 793b883 | 2005-09-14 16:06:14 -0700 | [diff] [blame] | 1189 | le = get_tx_le(sky2); |
| 1190 | le->tx.addr = cpu_to_le32(addr64); |
| 1191 | le->ctrl = 0; |
| 1192 | le->opcode = OP_ADDR64 | HW_OWNER; |
shemminger@osdl.org | a018e33 | 2005-11-30 11:45:16 -0800 | [diff] [blame] | 1193 | sky2->tx_addr64 = high32(mapping + len); |
Stephen Hemminger | 793b883 | 2005-09-14 16:06:14 -0700 | [diff] [blame] | 1194 | } |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 1195 | |
| 1196 | /* Check for TCP Segmentation Offload */ |
| 1197 | mss = skb_shinfo(skb)->tso_size; |
Stephen Hemminger | 793b883 | 2005-09-14 16:06:14 -0700 | [diff] [blame] | 1198 | if (mss != 0) { |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 1199 | /* just drop the packet if non-linear expansion fails */ |
| 1200 | if (skb_header_cloned(skb) && |
| 1201 | pskb_expand_head(skb, 0, 0, GFP_ATOMIC)) { |
Stephen Hemminger | 793b883 | 2005-09-14 16:06:14 -0700 | [diff] [blame] | 1202 | dev_kfree_skb_any(skb); |
| 1203 | goto out_unlock; |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 1204 | } |
| 1205 | |
| 1206 | mss += ((skb->h.th->doff - 5) * 4); /* TCP options */ |
| 1207 | mss += (skb->nh.iph->ihl * 4) + sizeof(struct tcphdr); |
| 1208 | mss += ETH_HLEN; |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 1209 | } |
| 1210 | |
Stephen Hemminger | 793b883 | 2005-09-14 16:06:14 -0700 | [diff] [blame] | 1211 | if (mss != sky2->tx_last_mss) { |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 1212 | le = get_tx_le(sky2); |
Stephen Hemminger | 793b883 | 2005-09-14 16:06:14 -0700 | [diff] [blame] | 1213 | le->tx.tso.size = cpu_to_le16(mss); |
| 1214 | le->tx.tso.rsvd = 0; |
| 1215 | le->opcode = OP_LRGLEN | HW_OWNER; |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 1216 | le->ctrl = 0; |
Stephen Hemminger | 793b883 | 2005-09-14 16:06:14 -0700 | [diff] [blame] | 1217 | sky2->tx_last_mss = mss; |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 1218 | } |
| 1219 | |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 1220 | ctrl = 0; |
shemminger@osdl.org | d1f1370 | 2005-09-27 15:02:57 -0700 | [diff] [blame] | 1221 | #ifdef SKY2_VLAN_TAG_USED |
| 1222 | /* Add VLAN tag, can piggyback on LRGLEN or ADDR64 */ |
| 1223 | if (sky2->vlgrp && vlan_tx_tag_present(skb)) { |
| 1224 | if (!le) { |
| 1225 | le = get_tx_le(sky2); |
| 1226 | le->tx.addr = 0; |
| 1227 | le->opcode = OP_VLAN|HW_OWNER; |
| 1228 | le->ctrl = 0; |
| 1229 | } else |
| 1230 | le->opcode |= OP_VLAN; |
| 1231 | le->length = cpu_to_be16(vlan_tx_tag_get(skb)); |
| 1232 | ctrl |= INS_VLAN; |
| 1233 | } |
| 1234 | #endif |
| 1235 | |
| 1236 | /* Handle TCP checksum offload */ |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 1237 | if (skb->ip_summed == CHECKSUM_HW) { |
Stephen Hemminger | 793b883 | 2005-09-14 16:06:14 -0700 | [diff] [blame] | 1238 | u16 hdr = skb->h.raw - skb->data; |
| 1239 | u16 offset = hdr + skb->csum; |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 1240 | |
| 1241 | ctrl = CALSUM | WR_SUM | INIT_SUM | LOCK_SUM; |
| 1242 | if (skb->nh.iph->protocol == IPPROTO_UDP) |
| 1243 | ctrl |= UDPTCP; |
| 1244 | |
| 1245 | le = get_tx_le(sky2); |
| 1246 | le->tx.csum.start = cpu_to_le16(hdr); |
Stephen Hemminger | 793b883 | 2005-09-14 16:06:14 -0700 | [diff] [blame] | 1247 | le->tx.csum.offset = cpu_to_le16(offset); |
| 1248 | le->length = 0; /* initial checksum value */ |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 1249 | le->ctrl = 1; /* one packet */ |
Stephen Hemminger | 793b883 | 2005-09-14 16:06:14 -0700 | [diff] [blame] | 1250 | le->opcode = OP_TCPLISW | HW_OWNER; |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 1251 | } |
| 1252 | |
| 1253 | le = get_tx_le(sky2); |
| 1254 | le->tx.addr = cpu_to_le32((u32) mapping); |
| 1255 | le->length = cpu_to_le16(len); |
| 1256 | le->ctrl = ctrl; |
Stephen Hemminger | 793b883 | 2005-09-14 16:06:14 -0700 | [diff] [blame] | 1257 | le->opcode = mss ? (OP_LARGESEND | HW_OWNER) : (OP_PACKET | HW_OWNER); |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 1258 | |
Stephen Hemminger | 793b883 | 2005-09-14 16:06:14 -0700 | [diff] [blame] | 1259 | /* Record the transmit mapping info */ |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 1260 | re->skb = skb; |
Stephen Hemminger | 6cdbbdf | 2005-12-09 11:35:01 -0800 | [diff] [blame] | 1261 | pci_unmap_addr_set(re, mapaddr, mapping); |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 1262 | |
| 1263 | for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) { |
| 1264 | skb_frag_t *frag = &skb_shinfo(skb)->frags[i]; |
Stephen Hemminger | 6cdbbdf | 2005-12-09 11:35:01 -0800 | [diff] [blame] | 1265 | struct tx_ring_info *fre; |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 1266 | |
| 1267 | mapping = pci_map_page(hw->pdev, frag->page, frag->page_offset, |
| 1268 | frag->size, PCI_DMA_TODEVICE); |
Stephen Hemminger | a036119 | 2006-01-17 13:43:16 -0800 | [diff] [blame] | 1269 | addr64 = high32(mapping); |
Stephen Hemminger | 793b883 | 2005-09-14 16:06:14 -0700 | [diff] [blame] | 1270 | if (addr64 != sky2->tx_addr64) { |
| 1271 | le = get_tx_le(sky2); |
| 1272 | le->tx.addr = cpu_to_le32(addr64); |
| 1273 | le->ctrl = 0; |
| 1274 | le->opcode = OP_ADDR64 | HW_OWNER; |
| 1275 | sky2->tx_addr64 = addr64; |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 1276 | } |
| 1277 | |
| 1278 | le = get_tx_le(sky2); |
| 1279 | le->tx.addr = cpu_to_le32((u32) mapping); |
| 1280 | le->length = cpu_to_le16(frag->size); |
| 1281 | le->ctrl = ctrl; |
Stephen Hemminger | 793b883 | 2005-09-14 16:06:14 -0700 | [diff] [blame] | 1282 | le->opcode = OP_BUFFER | HW_OWNER; |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 1283 | |
Stephen Hemminger | 793b883 | 2005-09-14 16:06:14 -0700 | [diff] [blame] | 1284 | fre = sky2->tx_ring |
| 1285 | + ((re - sky2->tx_ring) + i + 1) % TX_RING_SIZE; |
Stephen Hemminger | 6cdbbdf | 2005-12-09 11:35:01 -0800 | [diff] [blame] | 1286 | pci_unmap_addr_set(fre, mapaddr, mapping); |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 1287 | } |
Stephen Hemminger | 6cdbbdf | 2005-12-09 11:35:01 -0800 | [diff] [blame] | 1288 | |
Stephen Hemminger | 793b883 | 2005-09-14 16:06:14 -0700 | [diff] [blame] | 1289 | re->idx = sky2->tx_prod; |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 1290 | le->ctrl |= EOP; |
| 1291 | |
shemminger@osdl.org | 724bca3 | 2005-09-27 15:03:01 -0700 | [diff] [blame] | 1292 | sky2_put_idx(hw, txqaddr[sky2->port], sky2->tx_prod, |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 1293 | &sky2->tx_last_put, TX_RING_SIZE); |
| 1294 | |
Stephen Hemminger | 0e3ff6a | 2005-12-09 11:35:02 -0800 | [diff] [blame] | 1295 | if (tx_avail(sky2) <= MAX_SKB_TX_LE) |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 1296 | netif_stop_queue(dev); |
Stephen Hemminger | 793b883 | 2005-09-14 16:06:14 -0700 | [diff] [blame] | 1297 | |
| 1298 | out_unlock: |
Stephen Hemminger | f2e4656 | 2005-12-09 11:34:58 -0800 | [diff] [blame] | 1299 | spin_unlock(&sky2->tx_lock); |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 1300 | |
| 1301 | dev->trans_start = jiffies; |
| 1302 | return NETDEV_TX_OK; |
| 1303 | } |
| 1304 | |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 1305 | /* |
Stephen Hemminger | 793b883 | 2005-09-14 16:06:14 -0700 | [diff] [blame] | 1306 | * Free ring elements from starting at tx_cons until "done" |
| 1307 | * |
| 1308 | * NB: the hardware will tell us about partial completion of multi-part |
shemminger@osdl.org | d571b69 | 2005-10-26 12:16:09 -0700 | [diff] [blame] | 1309 | * buffers; these are deferred until completion. |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 1310 | */ |
shemminger@osdl.org | d11c13e | 2005-09-27 15:02:56 -0700 | [diff] [blame] | 1311 | static void sky2_tx_complete(struct sky2_port *sky2, u16 done) |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 1312 | { |
shemminger@osdl.org | d11c13e | 2005-09-27 15:02:56 -0700 | [diff] [blame] | 1313 | struct net_device *dev = sky2->netdev; |
Stephen Hemminger | af2a58a | 2005-12-09 11:35:04 -0800 | [diff] [blame] | 1314 | struct pci_dev *pdev = sky2->hw->pdev; |
| 1315 | u16 nxt, put; |
Stephen Hemminger | 793b883 | 2005-09-14 16:06:14 -0700 | [diff] [blame] | 1316 | unsigned i; |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 1317 | |
Stephen Hemminger | 0e3ff6a | 2005-12-09 11:35:02 -0800 | [diff] [blame] | 1318 | BUG_ON(done >= TX_RING_SIZE); |
shemminger@osdl.org | 2224795 | 2005-11-30 11:45:19 -0800 | [diff] [blame] | 1319 | |
shemminger@osdl.org | d11c13e | 2005-09-27 15:02:56 -0700 | [diff] [blame] | 1320 | if (unlikely(netif_msg_tx_done(sky2))) |
shemminger@osdl.org | d571b69 | 2005-10-26 12:16:09 -0700 | [diff] [blame] | 1321 | printk(KERN_DEBUG "%s: tx done, up to %u\n", |
shemminger@osdl.org | d11c13e | 2005-09-27 15:02:56 -0700 | [diff] [blame] | 1322 | dev->name, done); |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 1323 | |
Stephen Hemminger | af2a58a | 2005-12-09 11:35:04 -0800 | [diff] [blame] | 1324 | for (put = sky2->tx_cons; put != done; put = nxt) { |
| 1325 | struct tx_ring_info *re = sky2->tx_ring + put; |
| 1326 | struct sk_buff *skb = re->skb; |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 1327 | |
Stephen Hemminger | af2a58a | 2005-12-09 11:35:04 -0800 | [diff] [blame] | 1328 | nxt = re->idx; |
| 1329 | BUG_ON(nxt >= TX_RING_SIZE); |
Stephen Hemminger | d70cd51 | 2005-12-09 11:35:09 -0800 | [diff] [blame] | 1330 | prefetch(sky2->tx_ring + nxt); |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 1331 | |
Stephen Hemminger | 793b883 | 2005-09-14 16:06:14 -0700 | [diff] [blame] | 1332 | /* Check for partial status */ |
Stephen Hemminger | af2a58a | 2005-12-09 11:35:04 -0800 | [diff] [blame] | 1333 | if (tx_dist(put, done) < tx_dist(put, nxt)) |
| 1334 | break; |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 1335 | |
Stephen Hemminger | 793b883 | 2005-09-14 16:06:14 -0700 | [diff] [blame] | 1336 | skb = re->skb; |
Stephen Hemminger | af2a58a | 2005-12-09 11:35:04 -0800 | [diff] [blame] | 1337 | pci_unmap_single(pdev, pci_unmap_addr(re, mapaddr), |
Stephen Hemminger | 734d186 | 2005-12-09 11:35:00 -0800 | [diff] [blame] | 1338 | skb_headlen(skb), PCI_DMA_TODEVICE); |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 1339 | |
Stephen Hemminger | 793b883 | 2005-09-14 16:06:14 -0700 | [diff] [blame] | 1340 | for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) { |
Stephen Hemminger | 6cdbbdf | 2005-12-09 11:35:01 -0800 | [diff] [blame] | 1341 | struct tx_ring_info *fre; |
Stephen Hemminger | af2a58a | 2005-12-09 11:35:04 -0800 | [diff] [blame] | 1342 | fre = sky2->tx_ring + (put + i + 1) % TX_RING_SIZE; |
| 1343 | pci_unmap_page(pdev, pci_unmap_addr(fre, mapaddr), |
| 1344 | skb_shinfo(skb)->frags[i].size, |
Stephen Hemminger | 734d186 | 2005-12-09 11:35:00 -0800 | [diff] [blame] | 1345 | PCI_DMA_TODEVICE); |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 1346 | } |
| 1347 | |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 1348 | dev_kfree_skb_any(skb); |
Stephen Hemminger | 793b883 | 2005-09-14 16:06:14 -0700 | [diff] [blame] | 1349 | } |
Stephen Hemminger | 793b883 | 2005-09-14 16:06:14 -0700 | [diff] [blame] | 1350 | |
Stephen Hemminger | af2a58a | 2005-12-09 11:35:04 -0800 | [diff] [blame] | 1351 | sky2->tx_cons = put; |
Stephen Hemminger | 793b883 | 2005-09-14 16:06:14 -0700 | [diff] [blame] | 1352 | if (netif_queue_stopped(dev) && tx_avail(sky2) > MAX_SKB_TX_LE) |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 1353 | netif_wake_queue(dev); |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 1354 | } |
| 1355 | |
| 1356 | /* Cleanup all untransmitted buffers, assume transmitter not running */ |
Stephen Hemminger | 13b97b7 | 2005-12-09 11:35:03 -0800 | [diff] [blame] | 1357 | static void sky2_tx_clean(struct sky2_port *sky2) |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 1358 | { |
Stephen Hemminger | 302d125 | 2006-01-17 13:43:20 -0800 | [diff] [blame] | 1359 | spin_lock_bh(&sky2->tx_lock); |
shemminger@osdl.org | d11c13e | 2005-09-27 15:02:56 -0700 | [diff] [blame] | 1360 | sky2_tx_complete(sky2, sky2->tx_prod); |
Stephen Hemminger | 302d125 | 2006-01-17 13:43:20 -0800 | [diff] [blame] | 1361 | spin_unlock_bh(&sky2->tx_lock); |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 1362 | } |
| 1363 | |
| 1364 | /* Network shutdown */ |
| 1365 | static int sky2_down(struct net_device *dev) |
| 1366 | { |
| 1367 | struct sky2_port *sky2 = netdev_priv(dev); |
| 1368 | struct sky2_hw *hw = sky2->hw; |
| 1369 | unsigned port = sky2->port; |
| 1370 | u16 ctrl; |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 1371 | |
Stephen Hemminger | 1b53756 | 2005-12-20 15:08:07 -0800 | [diff] [blame] | 1372 | /* Never really got started! */ |
| 1373 | if (!sky2->tx_le) |
| 1374 | return 0; |
| 1375 | |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 1376 | if (netif_msg_ifdown(sky2)) |
| 1377 | printk(KERN_INFO PFX "%s: disabling interface\n", dev->name); |
| 1378 | |
shemminger@osdl.org | 018d1c6 | 2005-11-30 11:45:18 -0800 | [diff] [blame] | 1379 | /* Stop more packets from being queued */ |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 1380 | netif_stop_queue(dev); |
| 1381 | |
shemminger@osdl.org | 018d1c6 | 2005-11-30 11:45:18 -0800 | [diff] [blame] | 1382 | /* Disable port IRQ */ |
| 1383 | local_irq_disable(); |
| 1384 | hw->intr_mask &= ~((sky2->port == 0) ? Y2_IS_IRQ_PHY1 : Y2_IS_IRQ_PHY2); |
| 1385 | sky2_write32(hw, B0_IMSK, hw->intr_mask); |
| 1386 | local_irq_enable(); |
| 1387 | |
Stephen Hemminger | 91c86df | 2005-12-09 11:34:57 -0800 | [diff] [blame] | 1388 | flush_scheduled_work(); |
shemminger@osdl.org | 018d1c6 | 2005-11-30 11:45:18 -0800 | [diff] [blame] | 1389 | |
Stephen Hemminger | 793b883 | 2005-09-14 16:06:14 -0700 | [diff] [blame] | 1390 | sky2_phy_reset(hw, port); |
| 1391 | |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 1392 | /* Stop transmitter */ |
| 1393 | sky2_write32(hw, Q_ADDR(txqaddr[port], Q_CSR), BMU_STOP); |
| 1394 | sky2_read32(hw, Q_ADDR(txqaddr[port], Q_CSR)); |
| 1395 | |
| 1396 | sky2_write32(hw, RB_ADDR(txqaddr[port], RB_CTRL), |
Stephen Hemminger | 793b883 | 2005-09-14 16:06:14 -0700 | [diff] [blame] | 1397 | RB_RST_SET | RB_DIS_OP_MD); |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 1398 | |
| 1399 | ctrl = gma_read16(hw, port, GM_GP_CTRL); |
Stephen Hemminger | 793b883 | 2005-09-14 16:06:14 -0700 | [diff] [blame] | 1400 | ctrl &= ~(GM_GPCR_TX_ENA | GM_GPCR_RX_ENA); |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 1401 | gma_write16(hw, port, GM_GP_CTRL, ctrl); |
| 1402 | |
| 1403 | sky2_write8(hw, SK_REG(port, GPHY_CTRL), GPC_RST_SET); |
| 1404 | |
| 1405 | /* Workaround shared GMAC reset */ |
Stephen Hemminger | 793b883 | 2005-09-14 16:06:14 -0700 | [diff] [blame] | 1406 | if (!(hw->chip_id == CHIP_ID_YUKON_XL && hw->chip_rev == 0 |
| 1407 | && port == 0 && hw->dev[1] && netif_running(hw->dev[1]))) |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 1408 | sky2_write8(hw, SK_REG(port, GMAC_CTRL), GMC_RST_SET); |
| 1409 | |
| 1410 | /* Disable Force Sync bit and Enable Alloc bit */ |
| 1411 | sky2_write8(hw, SK_REG(port, TXA_CTRL), |
| 1412 | TXA_DIS_FSYNC | TXA_DIS_ALLOC | TXA_STOP_RC); |
| 1413 | |
| 1414 | /* Stop Interval Timer and Limit Counter of Tx Arbiter */ |
| 1415 | sky2_write32(hw, SK_REG(port, TXA_ITI_INI), 0L); |
| 1416 | sky2_write32(hw, SK_REG(port, TXA_LIM_INI), 0L); |
| 1417 | |
| 1418 | /* Reset the PCI FIFO of the async Tx queue */ |
Stephen Hemminger | 793b883 | 2005-09-14 16:06:14 -0700 | [diff] [blame] | 1419 | sky2_write32(hw, Q_ADDR(txqaddr[port], Q_CSR), |
| 1420 | BMU_RST_SET | BMU_FIFO_RST); |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 1421 | |
| 1422 | /* Reset the Tx prefetch units */ |
| 1423 | sky2_write32(hw, Y2_QADDR(txqaddr[port], PREF_UNIT_CTRL), |
| 1424 | PREF_UNIT_RST_SET); |
| 1425 | |
| 1426 | sky2_write32(hw, RB_ADDR(txqaddr[port], RB_CTRL), RB_RST_SET); |
| 1427 | |
shemminger@osdl.org | 6b1a3ae | 2005-09-27 15:02:55 -0700 | [diff] [blame] | 1428 | sky2_rx_stop(sky2); |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 1429 | |
| 1430 | sky2_write8(hw, SK_REG(port, RX_GMF_CTRL_T), GMF_RST_SET); |
| 1431 | sky2_write8(hw, SK_REG(port, TX_GMF_CTRL_T), GMF_RST_SET); |
| 1432 | |
shemminger@osdl.org | d571b69 | 2005-10-26 12:16:09 -0700 | [diff] [blame] | 1433 | /* turn off LED's */ |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 1434 | sky2_write16(hw, B0_Y2LED, LED_STAT_OFF); |
| 1435 | |
shemminger@osdl.org | 018d1c6 | 2005-11-30 11:45:18 -0800 | [diff] [blame] | 1436 | synchronize_irq(hw->pdev->irq); |
| 1437 | |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 1438 | sky2_tx_clean(sky2); |
| 1439 | sky2_rx_clean(sky2); |
| 1440 | |
| 1441 | pci_free_consistent(hw->pdev, RX_LE_BYTES, |
| 1442 | sky2->rx_le, sky2->rx_le_map); |
| 1443 | kfree(sky2->rx_ring); |
| 1444 | |
| 1445 | pci_free_consistent(hw->pdev, |
| 1446 | TX_RING_SIZE * sizeof(struct sky2_tx_le), |
| 1447 | sky2->tx_le, sky2->tx_le_map); |
| 1448 | kfree(sky2->tx_ring); |
| 1449 | |
Stephen Hemminger | 1b53756 | 2005-12-20 15:08:07 -0800 | [diff] [blame] | 1450 | sky2->tx_le = NULL; |
| 1451 | sky2->rx_le = NULL; |
| 1452 | |
| 1453 | sky2->rx_ring = NULL; |
| 1454 | sky2->tx_ring = NULL; |
| 1455 | |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 1456 | return 0; |
| 1457 | } |
| 1458 | |
| 1459 | static u16 sky2_phy_speed(const struct sky2_hw *hw, u16 aux) |
| 1460 | { |
Stephen Hemminger | 793b883 | 2005-09-14 16:06:14 -0700 | [diff] [blame] | 1461 | if (!hw->copper) |
| 1462 | return SPEED_1000; |
| 1463 | |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 1464 | if (hw->chip_id == CHIP_ID_YUKON_FE) |
| 1465 | return (aux & PHY_M_PS_SPEED_100) ? SPEED_100 : SPEED_10; |
| 1466 | |
| 1467 | switch (aux & PHY_M_PS_SPEED_MSK) { |
| 1468 | case PHY_M_PS_SPEED_1000: |
| 1469 | return SPEED_1000; |
| 1470 | case PHY_M_PS_SPEED_100: |
| 1471 | return SPEED_100; |
| 1472 | default: |
| 1473 | return SPEED_10; |
| 1474 | } |
| 1475 | } |
| 1476 | |
| 1477 | static void sky2_link_up(struct sky2_port *sky2) |
| 1478 | { |
| 1479 | struct sky2_hw *hw = sky2->hw; |
| 1480 | unsigned port = sky2->port; |
| 1481 | u16 reg; |
| 1482 | |
| 1483 | /* Enable Transmit FIFO Underrun */ |
Stephen Hemminger | 793b883 | 2005-09-14 16:06:14 -0700 | [diff] [blame] | 1484 | sky2_write8(hw, SK_REG(port, GMAC_IRQ_MSK), GMAC_DEF_MSK); |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 1485 | |
| 1486 | reg = gma_read16(hw, port, GM_GP_CTRL); |
Stephen Hemminger | 6f4c56b | 2006-02-10 15:58:59 -0800 | [diff] [blame] | 1487 | if (sky2->autoneg == AUTONEG_DISABLE) { |
| 1488 | reg |= GM_GPCR_AU_ALL_DIS; |
| 1489 | |
| 1490 | /* Is write/read necessary? Copied from sky2_mac_init */ |
| 1491 | gma_write16(hw, port, GM_GP_CTRL, reg); |
| 1492 | gma_read16(hw, port, GM_GP_CTRL); |
| 1493 | |
| 1494 | switch (sky2->speed) { |
| 1495 | case SPEED_1000: |
| 1496 | reg &= ~GM_GPCR_SPEED_100; |
| 1497 | reg |= GM_GPCR_SPEED_1000; |
| 1498 | break; |
| 1499 | case SPEED_100: |
| 1500 | reg &= ~GM_GPCR_SPEED_1000; |
| 1501 | reg |= GM_GPCR_SPEED_100; |
| 1502 | break; |
| 1503 | case SPEED_10: |
| 1504 | reg &= ~(GM_GPCR_SPEED_1000 | GM_GPCR_SPEED_100); |
| 1505 | break; |
| 1506 | } |
| 1507 | } else |
| 1508 | reg &= ~GM_GPCR_AU_ALL_DIS; |
| 1509 | |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 1510 | if (sky2->duplex == DUPLEX_FULL || sky2->autoneg == AUTONEG_ENABLE) |
| 1511 | reg |= GM_GPCR_DUP_FULL; |
| 1512 | |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 1513 | /* enable Rx/Tx */ |
| 1514 | reg |= GM_GPCR_RX_ENA | GM_GPCR_TX_ENA; |
| 1515 | gma_write16(hw, port, GM_GP_CTRL, reg); |
| 1516 | gma_read16(hw, port, GM_GP_CTRL); |
| 1517 | |
| 1518 | gm_phy_write(hw, port, PHY_MARV_INT_MASK, PHY_M_DEF_MSK); |
| 1519 | |
| 1520 | netif_carrier_on(sky2->netdev); |
| 1521 | netif_wake_queue(sky2->netdev); |
| 1522 | |
| 1523 | /* Turn on link LED */ |
Stephen Hemminger | 793b883 | 2005-09-14 16:06:14 -0700 | [diff] [blame] | 1524 | sky2_write8(hw, SK_REG(port, LNK_LED_REG), |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 1525 | LINKLED_ON | LINKLED_BLINK_OFF | LINKLED_LINKSYNC_OFF); |
| 1526 | |
Stephen Hemminger | 793b883 | 2005-09-14 16:06:14 -0700 | [diff] [blame] | 1527 | if (hw->chip_id == CHIP_ID_YUKON_XL) { |
| 1528 | u16 pg = gm_phy_read(hw, port, PHY_MARV_EXT_ADR); |
| 1529 | |
| 1530 | gm_phy_write(hw, port, PHY_MARV_EXT_ADR, 3); |
| 1531 | gm_phy_write(hw, port, PHY_MARV_PHY_CTRL, PHY_M_LEDC_LOS_CTRL(1) | /* LINK/ACT */ |
| 1532 | PHY_M_LEDC_INIT_CTRL(sky2->speed == |
| 1533 | SPEED_10 ? 7 : 0) | |
| 1534 | PHY_M_LEDC_STA1_CTRL(sky2->speed == |
| 1535 | SPEED_100 ? 7 : 0) | |
| 1536 | PHY_M_LEDC_STA0_CTRL(sky2->speed == |
| 1537 | SPEED_1000 ? 7 : 0)); |
| 1538 | gm_phy_write(hw, port, PHY_MARV_EXT_ADR, pg); |
| 1539 | } |
| 1540 | |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 1541 | if (netif_msg_link(sky2)) |
| 1542 | printk(KERN_INFO PFX |
shemminger@osdl.org | d571b69 | 2005-10-26 12:16:09 -0700 | [diff] [blame] | 1543 | "%s: Link is up at %d Mbps, %s duplex, flow control %s\n", |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 1544 | sky2->netdev->name, sky2->speed, |
| 1545 | sky2->duplex == DUPLEX_FULL ? "full" : "half", |
| 1546 | (sky2->tx_pause && sky2->rx_pause) ? "both" : |
Stephen Hemminger | 793b883 | 2005-09-14 16:06:14 -0700 | [diff] [blame] | 1547 | sky2->tx_pause ? "tx" : sky2->rx_pause ? "rx" : "none"); |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 1548 | } |
| 1549 | |
| 1550 | static void sky2_link_down(struct sky2_port *sky2) |
| 1551 | { |
| 1552 | struct sky2_hw *hw = sky2->hw; |
| 1553 | unsigned port = sky2->port; |
| 1554 | u16 reg; |
| 1555 | |
| 1556 | gm_phy_write(hw, port, PHY_MARV_INT_MASK, 0); |
| 1557 | |
| 1558 | reg = gma_read16(hw, port, GM_GP_CTRL); |
| 1559 | reg &= ~(GM_GPCR_RX_ENA | GM_GPCR_TX_ENA); |
| 1560 | gma_write16(hw, port, GM_GP_CTRL, reg); |
| 1561 | gma_read16(hw, port, GM_GP_CTRL); /* PCI post */ |
| 1562 | |
| 1563 | if (sky2->rx_pause && !sky2->tx_pause) { |
| 1564 | /* restore Asymmetric Pause bit */ |
| 1565 | gm_phy_write(hw, port, PHY_MARV_AUNE_ADV, |
Stephen Hemminger | 793b883 | 2005-09-14 16:06:14 -0700 | [diff] [blame] | 1566 | gm_phy_read(hw, port, PHY_MARV_AUNE_ADV) |
| 1567 | | PHY_M_AN_ASP); |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 1568 | } |
| 1569 | |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 1570 | netif_carrier_off(sky2->netdev); |
| 1571 | netif_stop_queue(sky2->netdev); |
| 1572 | |
| 1573 | /* Turn on link LED */ |
| 1574 | sky2_write8(hw, SK_REG(port, LNK_LED_REG), LINKLED_OFF); |
| 1575 | |
| 1576 | if (netif_msg_link(sky2)) |
| 1577 | printk(KERN_INFO PFX "%s: Link is down.\n", sky2->netdev->name); |
| 1578 | sky2_phy_init(hw, port); |
| 1579 | } |
| 1580 | |
Stephen Hemminger | 793b883 | 2005-09-14 16:06:14 -0700 | [diff] [blame] | 1581 | static int sky2_autoneg_done(struct sky2_port *sky2, u16 aux) |
| 1582 | { |
| 1583 | struct sky2_hw *hw = sky2->hw; |
| 1584 | unsigned port = sky2->port; |
| 1585 | u16 lpa; |
| 1586 | |
| 1587 | lpa = gm_phy_read(hw, port, PHY_MARV_AUNE_LP); |
| 1588 | |
| 1589 | if (lpa & PHY_M_AN_RF) { |
| 1590 | printk(KERN_ERR PFX "%s: remote fault", sky2->netdev->name); |
| 1591 | return -1; |
| 1592 | } |
| 1593 | |
| 1594 | if (hw->chip_id != CHIP_ID_YUKON_FE && |
| 1595 | gm_phy_read(hw, port, PHY_MARV_1000T_STAT) & PHY_B_1000S_MSF) { |
| 1596 | printk(KERN_ERR PFX "%s: master/slave fault", |
| 1597 | sky2->netdev->name); |
| 1598 | return -1; |
| 1599 | } |
| 1600 | |
| 1601 | if (!(aux & PHY_M_PS_SPDUP_RES)) { |
| 1602 | printk(KERN_ERR PFX "%s: speed/duplex mismatch", |
| 1603 | sky2->netdev->name); |
| 1604 | return -1; |
| 1605 | } |
| 1606 | |
| 1607 | sky2->duplex = (aux & PHY_M_PS_FULL_DUP) ? DUPLEX_FULL : DUPLEX_HALF; |
| 1608 | |
| 1609 | sky2->speed = sky2_phy_speed(hw, aux); |
| 1610 | |
| 1611 | /* Pause bits are offset (9..8) */ |
| 1612 | if (hw->chip_id == CHIP_ID_YUKON_XL) |
| 1613 | aux >>= 6; |
| 1614 | |
| 1615 | sky2->rx_pause = (aux & PHY_M_PS_RX_P_EN) != 0; |
| 1616 | sky2->tx_pause = (aux & PHY_M_PS_TX_P_EN) != 0; |
| 1617 | |
| 1618 | if ((sky2->tx_pause || sky2->rx_pause) |
| 1619 | && !(sky2->speed < SPEED_1000 && sky2->duplex == DUPLEX_HALF)) |
| 1620 | sky2_write8(hw, SK_REG(port, GMAC_CTRL), GMC_PAUSE_ON); |
| 1621 | else |
| 1622 | sky2_write8(hw, SK_REG(port, GMAC_CTRL), GMC_PAUSE_OFF); |
| 1623 | |
| 1624 | return 0; |
| 1625 | } |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 1626 | |
| 1627 | /* |
Stephen Hemminger | 91c86df | 2005-12-09 11:34:57 -0800 | [diff] [blame] | 1628 | * Interrupt from PHY are handled outside of interrupt context |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 1629 | * because accessing phy registers requires spin wait which might |
| 1630 | * cause excess interrupt latency. |
| 1631 | */ |
Stephen Hemminger | 91c86df | 2005-12-09 11:34:57 -0800 | [diff] [blame] | 1632 | static void sky2_phy_task(void *arg) |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 1633 | { |
Stephen Hemminger | 91c86df | 2005-12-09 11:34:57 -0800 | [diff] [blame] | 1634 | struct sky2_port *sky2 = arg; |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 1635 | struct sky2_hw *hw = sky2->hw; |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 1636 | u16 istatus, phystat; |
| 1637 | |
Stephen Hemminger | 91c86df | 2005-12-09 11:34:57 -0800 | [diff] [blame] | 1638 | down(&sky2->phy_sema); |
Stephen Hemminger | 793b883 | 2005-09-14 16:06:14 -0700 | [diff] [blame] | 1639 | istatus = gm_phy_read(hw, sky2->port, PHY_MARV_INT_STAT); |
| 1640 | phystat = gm_phy_read(hw, sky2->port, PHY_MARV_PHY_STAT); |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 1641 | |
| 1642 | if (netif_msg_intr(sky2)) |
| 1643 | printk(KERN_INFO PFX "%s: phy interrupt status 0x%x 0x%x\n", |
| 1644 | sky2->netdev->name, istatus, phystat); |
| 1645 | |
| 1646 | if (istatus & PHY_M_IS_AN_COMPL) { |
Stephen Hemminger | 793b883 | 2005-09-14 16:06:14 -0700 | [diff] [blame] | 1647 | if (sky2_autoneg_done(sky2, phystat) == 0) |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 1648 | sky2_link_up(sky2); |
Stephen Hemminger | 793b883 | 2005-09-14 16:06:14 -0700 | [diff] [blame] | 1649 | goto out; |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 1650 | } |
| 1651 | |
Stephen Hemminger | 793b883 | 2005-09-14 16:06:14 -0700 | [diff] [blame] | 1652 | if (istatus & PHY_M_IS_LSP_CHANGE) |
| 1653 | sky2->speed = sky2_phy_speed(hw, phystat); |
| 1654 | |
| 1655 | if (istatus & PHY_M_IS_DUP_CHANGE) |
| 1656 | sky2->duplex = |
| 1657 | (phystat & PHY_M_PS_FULL_DUP) ? DUPLEX_FULL : DUPLEX_HALF; |
| 1658 | |
| 1659 | if (istatus & PHY_M_IS_LST_CHANGE) { |
| 1660 | if (phystat & PHY_M_PS_LINK_UP) |
| 1661 | sky2_link_up(sky2); |
| 1662 | else |
| 1663 | sky2_link_down(sky2); |
| 1664 | } |
| 1665 | out: |
Stephen Hemminger | 91c86df | 2005-12-09 11:34:57 -0800 | [diff] [blame] | 1666 | up(&sky2->phy_sema); |
Stephen Hemminger | 793b883 | 2005-09-14 16:06:14 -0700 | [diff] [blame] | 1667 | |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 1668 | local_irq_disable(); |
Stephen Hemminger | 793b883 | 2005-09-14 16:06:14 -0700 | [diff] [blame] | 1669 | hw->intr_mask |= (sky2->port == 0) ? Y2_IS_IRQ_PHY1 : Y2_IS_IRQ_PHY2; |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 1670 | sky2_write32(hw, B0_IMSK, hw->intr_mask); |
| 1671 | local_irq_enable(); |
| 1672 | } |
| 1673 | |
Stephen Hemminger | 302d125 | 2006-01-17 13:43:20 -0800 | [diff] [blame] | 1674 | |
| 1675 | /* Transmit timeout is only called if we are running, carries is up |
| 1676 | * and tx queue is full (stopped). |
| 1677 | */ |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 1678 | static void sky2_tx_timeout(struct net_device *dev) |
| 1679 | { |
| 1680 | struct sky2_port *sky2 = netdev_priv(dev); |
Stephen Hemminger | 8cc048e | 2005-12-09 11:35:07 -0800 | [diff] [blame] | 1681 | struct sky2_hw *hw = sky2->hw; |
| 1682 | unsigned txq = txqaddr[sky2->port]; |
Stephen Hemminger | 302d125 | 2006-01-17 13:43:20 -0800 | [diff] [blame] | 1683 | u16 ridx; |
| 1684 | |
| 1685 | /* Maybe we just missed an status interrupt */ |
| 1686 | spin_lock(&sky2->tx_lock); |
| 1687 | ridx = sky2_read16(hw, |
| 1688 | sky2->port == 0 ? STAT_TXA1_RIDX : STAT_TXA2_RIDX); |
| 1689 | sky2_tx_complete(sky2, ridx); |
| 1690 | spin_unlock(&sky2->tx_lock); |
| 1691 | |
| 1692 | if (!netif_queue_stopped(dev)) { |
| 1693 | if (net_ratelimit()) |
| 1694 | pr_info(PFX "transmit interrupt missed? recovered\n"); |
| 1695 | return; |
| 1696 | } |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 1697 | |
| 1698 | if (netif_msg_timer(sky2)) |
| 1699 | printk(KERN_ERR PFX "%s: tx timeout\n", dev->name); |
| 1700 | |
Stephen Hemminger | 8cc048e | 2005-12-09 11:35:07 -0800 | [diff] [blame] | 1701 | sky2_write32(hw, Q_ADDR(txq, Q_CSR), BMU_STOP); |
Stephen Hemminger | 8cc048e | 2005-12-09 11:35:07 -0800 | [diff] [blame] | 1702 | sky2_write32(hw, Y2_QADDR(txq, PREF_UNIT_CTRL), PREF_UNIT_RST_SET); |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 1703 | |
| 1704 | sky2_tx_clean(sky2); |
Stephen Hemminger | 8cc048e | 2005-12-09 11:35:07 -0800 | [diff] [blame] | 1705 | |
| 1706 | sky2_qset(hw, txq); |
| 1707 | sky2_prefetch_init(hw, txq, sky2->tx_le_map, TX_RING_SIZE - 1); |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 1708 | } |
| 1709 | |
Stephen Hemminger | 734d186 | 2005-12-09 11:35:00 -0800 | [diff] [blame] | 1710 | |
| 1711 | #define roundup(x, y) ((((x)+((y)-1))/(y))*(y)) |
| 1712 | /* Want receive buffer size to be multiple of 64 bits, and incl room for vlan */ |
| 1713 | static inline unsigned sky2_buf_size(int mtu) |
| 1714 | { |
| 1715 | return roundup(mtu + ETH_HLEN + 4, 8); |
| 1716 | } |
| 1717 | |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 1718 | static int sky2_change_mtu(struct net_device *dev, int new_mtu) |
| 1719 | { |
shemminger@osdl.org | 6b1a3ae | 2005-09-27 15:02:55 -0700 | [diff] [blame] | 1720 | struct sky2_port *sky2 = netdev_priv(dev); |
| 1721 | struct sky2_hw *hw = sky2->hw; |
| 1722 | int err; |
| 1723 | u16 ctl, mode; |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 1724 | |
| 1725 | if (new_mtu < ETH_ZLEN || new_mtu > ETH_JUMBO_MTU) |
| 1726 | return -EINVAL; |
| 1727 | |
shemminger@osdl.org | 5a5b1ea | 2005-11-30 11:45:15 -0800 | [diff] [blame] | 1728 | if (hw->chip_id == CHIP_ID_YUKON_EC_U && new_mtu > ETH_DATA_LEN) |
| 1729 | return -EINVAL; |
| 1730 | |
shemminger@osdl.org | 6b1a3ae | 2005-09-27 15:02:55 -0700 | [diff] [blame] | 1731 | if (!netif_running(dev)) { |
| 1732 | dev->mtu = new_mtu; |
| 1733 | return 0; |
| 1734 | } |
| 1735 | |
shemminger@osdl.org | 6b1a3ae | 2005-09-27 15:02:55 -0700 | [diff] [blame] | 1736 | sky2_write32(hw, B0_IMSK, 0); |
| 1737 | |
shemminger@osdl.org | 018d1c6 | 2005-11-30 11:45:18 -0800 | [diff] [blame] | 1738 | dev->trans_start = jiffies; /* prevent tx timeout */ |
| 1739 | netif_stop_queue(dev); |
| 1740 | netif_poll_disable(hw->dev[0]); |
| 1741 | |
shemminger@osdl.org | 6b1a3ae | 2005-09-27 15:02:55 -0700 | [diff] [blame] | 1742 | ctl = gma_read16(hw, sky2->port, GM_GP_CTRL); |
| 1743 | gma_write16(hw, sky2->port, GM_GP_CTRL, ctl & ~GM_GPCR_RX_ENA); |
| 1744 | sky2_rx_stop(sky2); |
| 1745 | sky2_rx_clean(sky2); |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 1746 | |
| 1747 | dev->mtu = new_mtu; |
Stephen Hemminger | 734d186 | 2005-12-09 11:35:00 -0800 | [diff] [blame] | 1748 | sky2->rx_bufsize = sky2_buf_size(new_mtu); |
shemminger@osdl.org | 6b1a3ae | 2005-09-27 15:02:55 -0700 | [diff] [blame] | 1749 | mode = DATA_BLIND_VAL(DATA_BLIND_DEF) | |
| 1750 | GM_SMOD_VLAN_ENA | IPG_DATA_VAL(IPG_DATA_DEF); |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 1751 | |
shemminger@osdl.org | 6b1a3ae | 2005-09-27 15:02:55 -0700 | [diff] [blame] | 1752 | if (dev->mtu > ETH_DATA_LEN) |
| 1753 | mode |= GM_SMOD_JUMBO_ENA; |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 1754 | |
shemminger@osdl.org | 6b1a3ae | 2005-09-27 15:02:55 -0700 | [diff] [blame] | 1755 | gma_write16(hw, sky2->port, GM_SERIAL_MODE, mode); |
| 1756 | |
| 1757 | sky2_write8(hw, RB_ADDR(rxqaddr[sky2->port], RB_CTRL), RB_ENA_OP_MD); |
| 1758 | |
| 1759 | err = sky2_rx_start(sky2); |
shemminger@osdl.org | 6b1a3ae | 2005-09-27 15:02:55 -0700 | [diff] [blame] | 1760 | sky2_write32(hw, B0_IMSK, hw->intr_mask); |
shemminger@osdl.org | 018d1c6 | 2005-11-30 11:45:18 -0800 | [diff] [blame] | 1761 | |
Stephen Hemminger | 1b53756 | 2005-12-20 15:08:07 -0800 | [diff] [blame] | 1762 | if (err) |
| 1763 | dev_close(dev); |
| 1764 | else { |
| 1765 | gma_write16(hw, sky2->port, GM_GP_CTRL, ctl); |
| 1766 | |
| 1767 | netif_poll_enable(hw->dev[0]); |
| 1768 | netif_wake_queue(dev); |
| 1769 | } |
| 1770 | |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 1771 | return err; |
| 1772 | } |
| 1773 | |
| 1774 | /* |
| 1775 | * Receive one packet. |
| 1776 | * For small packets or errors, just reuse existing skb. |
shemminger@osdl.org | d571b69 | 2005-10-26 12:16:09 -0700 | [diff] [blame] | 1777 | * For larger packets, get new buffer. |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 1778 | */ |
shemminger@osdl.org | d11c13e | 2005-09-27 15:02:56 -0700 | [diff] [blame] | 1779 | static struct sk_buff *sky2_receive(struct sky2_port *sky2, |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 1780 | u16 length, u32 status) |
| 1781 | { |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 1782 | struct ring_info *re = sky2->rx_ring + sky2->rx_next; |
Stephen Hemminger | 79e57d3 | 2005-09-19 15:42:33 -0700 | [diff] [blame] | 1783 | struct sk_buff *skb = NULL; |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 1784 | |
| 1785 | if (unlikely(netif_msg_rx_status(sky2))) |
| 1786 | printk(KERN_DEBUG PFX "%s: rx slot %u status 0x%x len %d\n", |
shemminger@osdl.org | d11c13e | 2005-09-27 15:02:56 -0700 | [diff] [blame] | 1787 | sky2->netdev->name, sky2->rx_next, status, length); |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 1788 | |
Stephen Hemminger | 793b883 | 2005-09-14 16:06:14 -0700 | [diff] [blame] | 1789 | sky2->rx_next = (sky2->rx_next + 1) % sky2->rx_pending; |
Stephen Hemminger | d70cd51 | 2005-12-09 11:35:09 -0800 | [diff] [blame] | 1790 | prefetch(sky2->rx_ring + sky2->rx_next); |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 1791 | |
shemminger@osdl.org | 42eeea0 | 2005-11-30 11:45:13 -0800 | [diff] [blame] | 1792 | if (status & GMR_FS_ANY_ERR) |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 1793 | goto error; |
| 1794 | |
shemminger@osdl.org | 42eeea0 | 2005-11-30 11:45:13 -0800 | [diff] [blame] | 1795 | if (!(status & GMR_FS_RX_OK)) |
| 1796 | goto resubmit; |
| 1797 | |
Stephen Hemminger | 6e15b71 | 2005-12-20 15:08:09 -0800 | [diff] [blame] | 1798 | if ((status >> 16) != length || length > sky2->rx_bufsize) |
| 1799 | goto oversize; |
| 1800 | |
Stephen Hemminger | bdb5c58 | 2005-12-09 11:34:55 -0800 | [diff] [blame] | 1801 | if (length < copybreak) { |
Stephen Hemminger | 79e57d3 | 2005-09-19 15:42:33 -0700 | [diff] [blame] | 1802 | skb = alloc_skb(length + 2, GFP_ATOMIC); |
| 1803 | if (!skb) |
Stephen Hemminger | 793b883 | 2005-09-14 16:06:14 -0700 | [diff] [blame] | 1804 | goto resubmit; |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 1805 | |
Stephen Hemminger | 79e57d3 | 2005-09-19 15:42:33 -0700 | [diff] [blame] | 1806 | skb_reserve(skb, 2); |
Stephen Hemminger | 793b883 | 2005-09-14 16:06:14 -0700 | [diff] [blame] | 1807 | pci_dma_sync_single_for_cpu(sky2->hw->pdev, re->mapaddr, |
| 1808 | length, PCI_DMA_FROMDEVICE); |
Stephen Hemminger | 79e57d3 | 2005-09-19 15:42:33 -0700 | [diff] [blame] | 1809 | memcpy(skb->data, re->skb->data, length); |
shemminger@osdl.org | d11c13e | 2005-09-27 15:02:56 -0700 | [diff] [blame] | 1810 | skb->ip_summed = re->skb->ip_summed; |
| 1811 | skb->csum = re->skb->csum; |
Stephen Hemminger | 793b883 | 2005-09-14 16:06:14 -0700 | [diff] [blame] | 1812 | pci_dma_sync_single_for_device(sky2->hw->pdev, re->mapaddr, |
| 1813 | length, PCI_DMA_FROMDEVICE); |
Stephen Hemminger | 793b883 | 2005-09-14 16:06:14 -0700 | [diff] [blame] | 1814 | } else { |
Stephen Hemminger | 79e57d3 | 2005-09-19 15:42:33 -0700 | [diff] [blame] | 1815 | struct sk_buff *nskb; |
| 1816 | |
Stephen Hemminger | 82788c7 | 2006-01-17 13:43:10 -0800 | [diff] [blame] | 1817 | nskb = sky2_alloc_skb(sky2->rx_bufsize, GFP_ATOMIC); |
Stephen Hemminger | 793b883 | 2005-09-14 16:06:14 -0700 | [diff] [blame] | 1818 | if (!nskb) |
| 1819 | goto resubmit; |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 1820 | |
Stephen Hemminger | 793b883 | 2005-09-14 16:06:14 -0700 | [diff] [blame] | 1821 | skb = re->skb; |
Stephen Hemminger | 79e57d3 | 2005-09-19 15:42:33 -0700 | [diff] [blame] | 1822 | re->skb = nskb; |
Stephen Hemminger | 793b883 | 2005-09-14 16:06:14 -0700 | [diff] [blame] | 1823 | pci_unmap_single(sky2->hw->pdev, re->mapaddr, |
Stephen Hemminger | 734d186 | 2005-12-09 11:35:00 -0800 | [diff] [blame] | 1824 | sky2->rx_bufsize, PCI_DMA_FROMDEVICE); |
Stephen Hemminger | 793b883 | 2005-09-14 16:06:14 -0700 | [diff] [blame] | 1825 | prefetch(skb->data); |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 1826 | |
Stephen Hemminger | 793b883 | 2005-09-14 16:06:14 -0700 | [diff] [blame] | 1827 | re->mapaddr = pci_map_single(sky2->hw->pdev, nskb->data, |
Stephen Hemminger | 734d186 | 2005-12-09 11:35:00 -0800 | [diff] [blame] | 1828 | sky2->rx_bufsize, PCI_DMA_FROMDEVICE); |
Stephen Hemminger | 793b883 | 2005-09-14 16:06:14 -0700 | [diff] [blame] | 1829 | } |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 1830 | |
Stephen Hemminger | 79e57d3 | 2005-09-19 15:42:33 -0700 | [diff] [blame] | 1831 | skb_put(skb, length); |
Stephen Hemminger | 793b883 | 2005-09-14 16:06:14 -0700 | [diff] [blame] | 1832 | resubmit: |
shemminger@osdl.org | d11c13e | 2005-09-27 15:02:56 -0700 | [diff] [blame] | 1833 | re->skb->ip_summed = CHECKSUM_NONE; |
Stephen Hemminger | 734d186 | 2005-12-09 11:35:00 -0800 | [diff] [blame] | 1834 | sky2_rx_add(sky2, re->mapaddr); |
Stephen Hemminger | 79e57d3 | 2005-09-19 15:42:33 -0700 | [diff] [blame] | 1835 | |
shemminger@osdl.org | bea8610 | 2005-10-26 12:16:10 -0700 | [diff] [blame] | 1836 | /* Tell receiver about new buffers. */ |
| 1837 | sky2_put_idx(sky2->hw, rxqaddr[sky2->port], sky2->rx_put, |
| 1838 | &sky2->rx_last_put, RX_LE_SIZE); |
| 1839 | |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 1840 | return skb; |
| 1841 | |
Stephen Hemminger | 6e15b71 | 2005-12-20 15:08:09 -0800 | [diff] [blame] | 1842 | oversize: |
| 1843 | ++sky2->net_stats.rx_over_errors; |
| 1844 | goto resubmit; |
| 1845 | |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 1846 | error: |
Stephen Hemminger | 6e15b71 | 2005-12-20 15:08:09 -0800 | [diff] [blame] | 1847 | ++sky2->net_stats.rx_errors; |
| 1848 | |
Stephen Hemminger | 3be92a7 | 2006-01-17 13:43:17 -0800 | [diff] [blame] | 1849 | if (netif_msg_rx_err(sky2) && net_ratelimit()) |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 1850 | printk(KERN_INFO PFX "%s: rx error, status 0x%x length %d\n", |
| 1851 | sky2->netdev->name, status, length); |
Stephen Hemminger | 793b883 | 2005-09-14 16:06:14 -0700 | [diff] [blame] | 1852 | |
| 1853 | if (status & (GMR_FS_LONG_ERR | GMR_FS_UN_SIZE)) |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 1854 | sky2->net_stats.rx_length_errors++; |
| 1855 | if (status & GMR_FS_FRAGMENT) |
| 1856 | sky2->net_stats.rx_frame_errors++; |
| 1857 | if (status & GMR_FS_CRC_ERR) |
| 1858 | sky2->net_stats.rx_crc_errors++; |
Stephen Hemminger | 793b883 | 2005-09-14 16:06:14 -0700 | [diff] [blame] | 1859 | if (status & GMR_FS_RX_FF_OV) |
| 1860 | sky2->net_stats.rx_fifo_errors++; |
Stephen Hemminger | 79e57d3 | 2005-09-19 15:42:33 -0700 | [diff] [blame] | 1861 | |
Stephen Hemminger | 793b883 | 2005-09-14 16:06:14 -0700 | [diff] [blame] | 1862 | goto resubmit; |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 1863 | } |
| 1864 | |
shemminger@osdl.org | 2224795 | 2005-11-30 11:45:19 -0800 | [diff] [blame] | 1865 | /* |
| 1866 | * Check for transmit complete |
Stephen Hemminger | 793b883 | 2005-09-14 16:06:14 -0700 | [diff] [blame] | 1867 | */ |
Stephen Hemminger | 13b97b7 | 2005-12-09 11:35:03 -0800 | [diff] [blame] | 1868 | #define TX_NO_STATUS 0xffff |
shemminger@osdl.org | 2224795 | 2005-11-30 11:45:19 -0800 | [diff] [blame] | 1869 | |
Stephen Hemminger | 28bd181 | 2006-01-17 13:43:19 -0800 | [diff] [blame] | 1870 | static void sky2_tx_check(struct sky2_hw *hw, int port, u16 last) |
Stephen Hemminger | 13b97b7 | 2005-12-09 11:35:03 -0800 | [diff] [blame] | 1871 | { |
| 1872 | if (last != TX_NO_STATUS) { |
| 1873 | struct net_device *dev = hw->dev[port]; |
| 1874 | if (dev && netif_running(dev)) { |
| 1875 | struct sky2_port *sky2 = netdev_priv(dev); |
Stephen Hemminger | 302d125 | 2006-01-17 13:43:20 -0800 | [diff] [blame] | 1876 | |
| 1877 | spin_lock(&sky2->tx_lock); |
Stephen Hemminger | 13b97b7 | 2005-12-09 11:35:03 -0800 | [diff] [blame] | 1878 | sky2_tx_complete(sky2, last); |
Stephen Hemminger | 302d125 | 2006-01-17 13:43:20 -0800 | [diff] [blame] | 1879 | spin_unlock(&sky2->tx_lock); |
Stephen Hemminger | 13b97b7 | 2005-12-09 11:35:03 -0800 | [diff] [blame] | 1880 | } |
shemminger@osdl.org | 2224795 | 2005-11-30 11:45:19 -0800 | [diff] [blame] | 1881 | } |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 1882 | } |
| 1883 | |
| 1884 | /* |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 1885 | * Both ports share the same status interrupt, therefore there is only |
| 1886 | * one poll routine. |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 1887 | */ |
shemminger@osdl.org | d11c13e | 2005-09-27 15:02:56 -0700 | [diff] [blame] | 1888 | static int sky2_poll(struct net_device *dev0, int *budget) |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 1889 | { |
shemminger@osdl.org | d11c13e | 2005-09-27 15:02:56 -0700 | [diff] [blame] | 1890 | struct sky2_hw *hw = ((struct sky2_port *) netdev_priv(dev0))->hw; |
| 1891 | unsigned int to_do = min(dev0->quota, *budget); |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 1892 | unsigned int work_done = 0; |
Stephen Hemminger | 793b883 | 2005-09-14 16:06:14 -0700 | [diff] [blame] | 1893 | u16 hwidx; |
Stephen Hemminger | 13b97b7 | 2005-12-09 11:35:03 -0800 | [diff] [blame] | 1894 | u16 tx_done[2] = { TX_NO_STATUS, TX_NO_STATUS }; |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 1895 | |
Stephen Hemminger | f9a66c7 | 2006-01-30 11:37:58 -0800 | [diff] [blame] | 1896 | sky2_write32(hw, STAT_CTRL, SC_STAT_CLR_IRQ); |
| 1897 | |
Stephen Hemminger | a8fd626 | 2006-02-22 11:45:00 -0800 | [diff] [blame] | 1898 | /* |
| 1899 | * Kick the STAT_LEV_TIMER_CTRL timer. |
| 1900 | * This fixes my hangs on Yukon-EC (0xb6) rev 1. |
| 1901 | * The if clause is there to start the timer only if it has been |
| 1902 | * configured correctly and not been disabled via ethtool. |
| 1903 | */ |
| 1904 | if (sky2_read8(hw, STAT_LEV_TIMER_CTRL) == TIM_START) { |
| 1905 | sky2_write8(hw, STAT_LEV_TIMER_CTRL, TIM_STOP); |
| 1906 | sky2_write8(hw, STAT_LEV_TIMER_CTRL, TIM_START); |
| 1907 | } |
| 1908 | |
Stephen Hemminger | 793b883 | 2005-09-14 16:06:14 -0700 | [diff] [blame] | 1909 | hwidx = sky2_read16(hw, STAT_PUT_IDX); |
Stephen Hemminger | 79e57d3 | 2005-09-19 15:42:33 -0700 | [diff] [blame] | 1910 | BUG_ON(hwidx >= STATUS_RING_SIZE); |
Stephen Hemminger | af2a58a | 2005-12-09 11:35:04 -0800 | [diff] [blame] | 1911 | rmb(); |
shemminger@osdl.org | bea8610 | 2005-10-26 12:16:10 -0700 | [diff] [blame] | 1912 | |
shemminger@osdl.org | 13210ce | 2005-11-30 11:45:14 -0800 | [diff] [blame] | 1913 | while (hwidx != hw->st_idx) { |
| 1914 | struct sky2_status_le *le = hw->st_le + hw->st_idx; |
| 1915 | struct net_device *dev; |
shemminger@osdl.org | d11c13e | 2005-09-27 15:02:56 -0700 | [diff] [blame] | 1916 | struct sky2_port *sky2; |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 1917 | struct sk_buff *skb; |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 1918 | u32 status; |
| 1919 | u16 length; |
| 1920 | |
shemminger@osdl.org | 13210ce | 2005-11-30 11:45:14 -0800 | [diff] [blame] | 1921 | le = hw->st_le + hw->st_idx; |
shemminger@osdl.org | bea8610 | 2005-10-26 12:16:10 -0700 | [diff] [blame] | 1922 | hw->st_idx = (hw->st_idx + 1) % STATUS_RING_SIZE; |
shemminger@osdl.org | 13210ce | 2005-11-30 11:45:14 -0800 | [diff] [blame] | 1923 | prefetch(hw->st_le + hw->st_idx); |
shemminger@osdl.org | bea8610 | 2005-10-26 12:16:10 -0700 | [diff] [blame] | 1924 | |
shemminger@osdl.org | 13210ce | 2005-11-30 11:45:14 -0800 | [diff] [blame] | 1925 | BUG_ON(le->link >= 2); |
| 1926 | dev = hw->dev[le->link]; |
| 1927 | if (dev == NULL || !netif_running(dev)) |
| 1928 | continue; |
| 1929 | |
| 1930 | sky2 = netdev_priv(dev); |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 1931 | status = le32_to_cpu(le->status); |
| 1932 | length = le16_to_cpu(le->length); |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 1933 | |
Stephen Hemminger | dc4d5ea | 2006-01-17 13:43:15 -0800 | [diff] [blame] | 1934 | switch (le->opcode & ~HW_OWNER) { |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 1935 | case OP_RXSTAT: |
shemminger@osdl.org | d11c13e | 2005-09-27 15:02:56 -0700 | [diff] [blame] | 1936 | skb = sky2_receive(sky2, length, status); |
shemminger@osdl.org | d1f1370 | 2005-09-27 15:02:57 -0700 | [diff] [blame] | 1937 | if (!skb) |
| 1938 | break; |
shemminger@osdl.org | 13210ce | 2005-11-30 11:45:14 -0800 | [diff] [blame] | 1939 | |
| 1940 | skb->dev = dev; |
| 1941 | skb->protocol = eth_type_trans(skb, dev); |
| 1942 | dev->last_rx = jiffies; |
| 1943 | |
shemminger@osdl.org | d1f1370 | 2005-09-27 15:02:57 -0700 | [diff] [blame] | 1944 | #ifdef SKY2_VLAN_TAG_USED |
| 1945 | if (sky2->vlgrp && (status & GMR_FS_VLAN)) { |
| 1946 | vlan_hwaccel_receive_skb(skb, |
| 1947 | sky2->vlgrp, |
| 1948 | be16_to_cpu(sky2->rx_tag)); |
| 1949 | } else |
| 1950 | #endif |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 1951 | netif_receive_skb(skb); |
shemminger@osdl.org | 13210ce | 2005-11-30 11:45:14 -0800 | [diff] [blame] | 1952 | |
| 1953 | if (++work_done >= to_do) |
| 1954 | goto exit_loop; |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 1955 | break; |
| 1956 | |
shemminger@osdl.org | d1f1370 | 2005-09-27 15:02:57 -0700 | [diff] [blame] | 1957 | #ifdef SKY2_VLAN_TAG_USED |
| 1958 | case OP_RXVLAN: |
| 1959 | sky2->rx_tag = length; |
| 1960 | break; |
| 1961 | |
| 1962 | case OP_RXCHKSVLAN: |
| 1963 | sky2->rx_tag = length; |
| 1964 | /* fall through */ |
| 1965 | #endif |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 1966 | case OP_RXCHKS: |
shemminger@osdl.org | d11c13e | 2005-09-27 15:02:56 -0700 | [diff] [blame] | 1967 | skb = sky2->rx_ring[sky2->rx_next].skb; |
| 1968 | skb->ip_summed = CHECKSUM_HW; |
| 1969 | skb->csum = le16_to_cpu(status); |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 1970 | break; |
| 1971 | |
| 1972 | case OP_TXINDEXLE: |
Stephen Hemminger | 13b97b7 | 2005-12-09 11:35:03 -0800 | [diff] [blame] | 1973 | /* TX index reports status for both ports */ |
| 1974 | tx_done[0] = status & 0xffff; |
| 1975 | tx_done[1] = ((status >> 24) & 0xff) |
| 1976 | | (u16)(length & 0xf) << 8; |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 1977 | break; |
| 1978 | |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 1979 | default: |
| 1980 | if (net_ratelimit()) |
Stephen Hemminger | 793b883 | 2005-09-14 16:06:14 -0700 | [diff] [blame] | 1981 | printk(KERN_WARNING PFX |
Stephen Hemminger | dc4d5ea | 2006-01-17 13:43:15 -0800 | [diff] [blame] | 1982 | "unknown status opcode 0x%x\n", le->opcode); |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 1983 | break; |
| 1984 | } |
shemminger@osdl.org | 13210ce | 2005-11-30 11:45:14 -0800 | [diff] [blame] | 1985 | } |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 1986 | |
shemminger@osdl.org | 13210ce | 2005-11-30 11:45:14 -0800 | [diff] [blame] | 1987 | exit_loop: |
Stephen Hemminger | 13b97b7 | 2005-12-09 11:35:03 -0800 | [diff] [blame] | 1988 | sky2_tx_check(hw, 0, tx_done[0]); |
| 1989 | sky2_tx_check(hw, 1, tx_done[1]); |
| 1990 | |
Stephen Hemminger | 9a6d343 | 2006-02-22 11:45:01 -0800 | [diff] [blame] | 1991 | if (sky2_read8(hw, STAT_TX_TIMER_CTRL) == TIM_START) { |
| 1992 | sky2_write8(hw, STAT_TX_TIMER_CTRL, TIM_STOP); |
| 1993 | sky2_write8(hw, STAT_TX_TIMER_CTRL, TIM_START); |
| 1994 | } |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 1995 | |
Stephen Hemminger | 9a6d343 | 2006-02-22 11:45:01 -0800 | [diff] [blame] | 1996 | if (likely(work_done < to_do)) { |
shemminger@osdl.org | bea8610 | 2005-10-26 12:16:10 -0700 | [diff] [blame] | 1997 | netif_rx_complete(dev0); |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 1998 | hw->intr_mask |= Y2_IS_STAT_BMU; |
| 1999 | sky2_write32(hw, B0_IMSK, hw->intr_mask); |
shemminger@osdl.org | 13210ce | 2005-11-30 11:45:14 -0800 | [diff] [blame] | 2000 | return 0; |
| 2001 | } else { |
| 2002 | *budget -= work_done; |
| 2003 | dev0->quota -= work_done; |
| 2004 | return 1; |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 2005 | } |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 2006 | } |
| 2007 | |
| 2008 | static void sky2_hw_error(struct sky2_hw *hw, unsigned port, u32 status) |
| 2009 | { |
| 2010 | struct net_device *dev = hw->dev[port]; |
| 2011 | |
Stephen Hemminger | 3be92a7 | 2006-01-17 13:43:17 -0800 | [diff] [blame] | 2012 | if (net_ratelimit()) |
| 2013 | printk(KERN_INFO PFX "%s: hw error interrupt status 0x%x\n", |
| 2014 | dev->name, status); |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 2015 | |
| 2016 | if (status & Y2_IS_PAR_RD1) { |
Stephen Hemminger | 3be92a7 | 2006-01-17 13:43:17 -0800 | [diff] [blame] | 2017 | if (net_ratelimit()) |
| 2018 | printk(KERN_ERR PFX "%s: ram data read parity error\n", |
| 2019 | dev->name); |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 2020 | /* Clear IRQ */ |
| 2021 | sky2_write16(hw, RAM_BUFFER(port, B3_RI_CTRL), RI_CLR_RD_PERR); |
| 2022 | } |
| 2023 | |
| 2024 | if (status & Y2_IS_PAR_WR1) { |
Stephen Hemminger | 3be92a7 | 2006-01-17 13:43:17 -0800 | [diff] [blame] | 2025 | if (net_ratelimit()) |
| 2026 | printk(KERN_ERR PFX "%s: ram data write parity error\n", |
| 2027 | dev->name); |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 2028 | |
| 2029 | sky2_write16(hw, RAM_BUFFER(port, B3_RI_CTRL), RI_CLR_WR_PERR); |
| 2030 | } |
| 2031 | |
| 2032 | if (status & Y2_IS_PAR_MAC1) { |
Stephen Hemminger | 3be92a7 | 2006-01-17 13:43:17 -0800 | [diff] [blame] | 2033 | if (net_ratelimit()) |
| 2034 | printk(KERN_ERR PFX "%s: MAC parity error\n", dev->name); |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 2035 | sky2_write8(hw, SK_REG(port, TX_GMF_CTRL_T), GMF_CLI_TX_PE); |
| 2036 | } |
| 2037 | |
| 2038 | if (status & Y2_IS_PAR_RX1) { |
Stephen Hemminger | 3be92a7 | 2006-01-17 13:43:17 -0800 | [diff] [blame] | 2039 | if (net_ratelimit()) |
| 2040 | printk(KERN_ERR PFX "%s: RX parity error\n", dev->name); |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 2041 | sky2_write32(hw, Q_ADDR(rxqaddr[port], Q_CSR), BMU_CLR_IRQ_PAR); |
| 2042 | } |
| 2043 | |
| 2044 | if (status & Y2_IS_TCP_TXA1) { |
Stephen Hemminger | 3be92a7 | 2006-01-17 13:43:17 -0800 | [diff] [blame] | 2045 | if (net_ratelimit()) |
| 2046 | printk(KERN_ERR PFX "%s: TCP segmentation error\n", |
| 2047 | dev->name); |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 2048 | sky2_write32(hw, Q_ADDR(txqaddr[port], Q_CSR), BMU_CLR_IRQ_TCP); |
| 2049 | } |
| 2050 | } |
| 2051 | |
| 2052 | static void sky2_hw_intr(struct sky2_hw *hw) |
| 2053 | { |
| 2054 | u32 status = sky2_read32(hw, B0_HWE_ISRC); |
| 2055 | |
Stephen Hemminger | 793b883 | 2005-09-14 16:06:14 -0700 | [diff] [blame] | 2056 | if (status & Y2_IS_TIST_OV) |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 2057 | sky2_write8(hw, GMAC_TI_ST_CTRL, GMT_ST_CLR_IRQ); |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 2058 | |
| 2059 | if (status & (Y2_IS_MST_ERR | Y2_IS_IRQ_STAT)) { |
Stephen Hemminger | 793b883 | 2005-09-14 16:06:14 -0700 | [diff] [blame] | 2060 | u16 pci_err; |
| 2061 | |
Stephen Hemminger | 56a645c | 2006-02-22 11:45:02 -0800 | [diff] [blame^] | 2062 | pci_err = sky2_pci_read16(hw, PCI_STATUS); |
Stephen Hemminger | 3be92a7 | 2006-01-17 13:43:17 -0800 | [diff] [blame] | 2063 | if (net_ratelimit()) |
| 2064 | printk(KERN_ERR PFX "%s: pci hw error (0x%x)\n", |
| 2065 | pci_name(hw->pdev), pci_err); |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 2066 | |
| 2067 | sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_ON); |
Stephen Hemminger | 56a645c | 2006-02-22 11:45:02 -0800 | [diff] [blame^] | 2068 | sky2_pci_write16(hw, PCI_STATUS, |
Stephen Hemminger | 793b883 | 2005-09-14 16:06:14 -0700 | [diff] [blame] | 2069 | pci_err | PCI_STATUS_ERROR_BITS); |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 2070 | sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_OFF); |
| 2071 | } |
| 2072 | |
| 2073 | if (status & Y2_IS_PCI_EXP) { |
shemminger@osdl.org | d571b69 | 2005-10-26 12:16:09 -0700 | [diff] [blame] | 2074 | /* PCI-Express uncorrectable Error occurred */ |
Stephen Hemminger | 793b883 | 2005-09-14 16:06:14 -0700 | [diff] [blame] | 2075 | u32 pex_err; |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 2076 | |
Stephen Hemminger | 56a645c | 2006-02-22 11:45:02 -0800 | [diff] [blame^] | 2077 | pex_err = sky2_pci_read32(hw, PEX_UNC_ERR_STAT); |
Stephen Hemminger | 793b883 | 2005-09-14 16:06:14 -0700 | [diff] [blame] | 2078 | |
Stephen Hemminger | 3be92a7 | 2006-01-17 13:43:17 -0800 | [diff] [blame] | 2079 | if (net_ratelimit()) |
| 2080 | printk(KERN_ERR PFX "%s: pci express error (0x%x)\n", |
| 2081 | pci_name(hw->pdev), pex_err); |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 2082 | |
| 2083 | /* clear the interrupt */ |
| 2084 | sky2_write32(hw, B2_TST_CTRL1, TST_CFG_WRITE_ON); |
Stephen Hemminger | 56a645c | 2006-02-22 11:45:02 -0800 | [diff] [blame^] | 2085 | sky2_pci_write32(hw, PEX_UNC_ERR_STAT, |
Stephen Hemminger | 793b883 | 2005-09-14 16:06:14 -0700 | [diff] [blame] | 2086 | 0xffffffffUL); |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 2087 | sky2_write32(hw, B2_TST_CTRL1, TST_CFG_WRITE_OFF); |
| 2088 | |
| 2089 | if (pex_err & PEX_FATAL_ERRORS) { |
| 2090 | u32 hwmsk = sky2_read32(hw, B0_HWE_IMSK); |
| 2091 | hwmsk &= ~Y2_IS_PCI_EXP; |
| 2092 | sky2_write32(hw, B0_HWE_IMSK, hwmsk); |
| 2093 | } |
| 2094 | } |
| 2095 | |
| 2096 | if (status & Y2_HWE_L1_MASK) |
| 2097 | sky2_hw_error(hw, 0, status); |
| 2098 | status >>= 8; |
| 2099 | if (status & Y2_HWE_L1_MASK) |
| 2100 | sky2_hw_error(hw, 1, status); |
| 2101 | } |
| 2102 | |
| 2103 | static void sky2_mac_intr(struct sky2_hw *hw, unsigned port) |
| 2104 | { |
| 2105 | struct net_device *dev = hw->dev[port]; |
| 2106 | struct sky2_port *sky2 = netdev_priv(dev); |
| 2107 | u8 status = sky2_read8(hw, SK_REG(port, GMAC_IRQ_SRC)); |
| 2108 | |
| 2109 | if (netif_msg_intr(sky2)) |
| 2110 | printk(KERN_INFO PFX "%s: mac interrupt status 0x%x\n", |
| 2111 | dev->name, status); |
| 2112 | |
| 2113 | if (status & GM_IS_RX_FF_OR) { |
| 2114 | ++sky2->net_stats.rx_fifo_errors; |
| 2115 | sky2_write8(hw, SK_REG(port, RX_GMF_CTRL_T), GMF_CLI_RX_FO); |
| 2116 | } |
| 2117 | |
| 2118 | if (status & GM_IS_TX_FF_UR) { |
| 2119 | ++sky2->net_stats.tx_fifo_errors; |
| 2120 | sky2_write8(hw, SK_REG(port, TX_GMF_CTRL_T), GMF_CLI_TX_FU); |
| 2121 | } |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 2122 | } |
| 2123 | |
| 2124 | static void sky2_phy_intr(struct sky2_hw *hw, unsigned port) |
| 2125 | { |
| 2126 | struct net_device *dev = hw->dev[port]; |
| 2127 | struct sky2_port *sky2 = netdev_priv(dev); |
| 2128 | |
| 2129 | hw->intr_mask &= ~(port == 0 ? Y2_IS_IRQ_PHY1 : Y2_IS_IRQ_PHY2); |
| 2130 | sky2_write32(hw, B0_IMSK, hw->intr_mask); |
Stephen Hemminger | 91c86df | 2005-12-09 11:34:57 -0800 | [diff] [blame] | 2131 | schedule_work(&sky2->phy_task); |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 2132 | } |
| 2133 | |
| 2134 | static irqreturn_t sky2_intr(int irq, void *dev_id, struct pt_regs *regs) |
| 2135 | { |
| 2136 | struct sky2_hw *hw = dev_id; |
shemminger@osdl.org | bea8610 | 2005-10-26 12:16:10 -0700 | [diff] [blame] | 2137 | struct net_device *dev0 = hw->dev[0]; |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 2138 | u32 status; |
| 2139 | |
| 2140 | status = sky2_read32(hw, B0_Y2_SP_ISRC2); |
Stephen Hemminger | 793b883 | 2005-09-14 16:06:14 -0700 | [diff] [blame] | 2141 | if (status == 0 || status == ~0) |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 2142 | return IRQ_NONE; |
| 2143 | |
| 2144 | if (status & Y2_IS_HW_ERR) |
| 2145 | sky2_hw_intr(hw); |
| 2146 | |
Stephen Hemminger | 793b883 | 2005-09-14 16:06:14 -0700 | [diff] [blame] | 2147 | /* Do NAPI for Rx and Tx status */ |
shemminger@osdl.org | bea8610 | 2005-10-26 12:16:10 -0700 | [diff] [blame] | 2148 | if (status & Y2_IS_STAT_BMU) { |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 2149 | hw->intr_mask &= ~Y2_IS_STAT_BMU; |
| 2150 | sky2_write32(hw, B0_IMSK, hw->intr_mask); |
shemminger@osdl.org | bea8610 | 2005-10-26 12:16:10 -0700 | [diff] [blame] | 2151 | |
shemminger@osdl.org | 0a12257 | 2005-11-30 11:45:17 -0800 | [diff] [blame] | 2152 | if (likely(__netif_rx_schedule_prep(dev0))) { |
| 2153 | prefetch(&hw->st_le[hw->st_idx]); |
shemminger@osdl.org | bea8610 | 2005-10-26 12:16:10 -0700 | [diff] [blame] | 2154 | __netif_rx_schedule(dev0); |
shemminger@osdl.org | 0a12257 | 2005-11-30 11:45:17 -0800 | [diff] [blame] | 2155 | } |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 2156 | } |
| 2157 | |
Stephen Hemminger | 793b883 | 2005-09-14 16:06:14 -0700 | [diff] [blame] | 2158 | if (status & Y2_IS_IRQ_PHY1) |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 2159 | sky2_phy_intr(hw, 0); |
| 2160 | |
| 2161 | if (status & Y2_IS_IRQ_PHY2) |
| 2162 | sky2_phy_intr(hw, 1); |
| 2163 | |
| 2164 | if (status & Y2_IS_IRQ_MAC1) |
| 2165 | sky2_mac_intr(hw, 0); |
| 2166 | |
| 2167 | if (status & Y2_IS_IRQ_MAC2) |
| 2168 | sky2_mac_intr(hw, 1); |
| 2169 | |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 2170 | sky2_write32(hw, B0_Y2_SP_ICR, 2); |
Stephen Hemminger | 793b883 | 2005-09-14 16:06:14 -0700 | [diff] [blame] | 2171 | |
| 2172 | sky2_read32(hw, B0_IMSK); |
| 2173 | |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 2174 | return IRQ_HANDLED; |
| 2175 | } |
| 2176 | |
| 2177 | #ifdef CONFIG_NET_POLL_CONTROLLER |
| 2178 | static void sky2_netpoll(struct net_device *dev) |
| 2179 | { |
| 2180 | struct sky2_port *sky2 = netdev_priv(dev); |
| 2181 | |
Stephen Hemminger | 793b883 | 2005-09-14 16:06:14 -0700 | [diff] [blame] | 2182 | sky2_intr(sky2->hw->pdev->irq, sky2->hw, NULL); |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 2183 | } |
| 2184 | #endif |
| 2185 | |
| 2186 | /* Chip internal frequency for clock calculations */ |
Stephen Hemminger | fb17358 | 2005-12-09 11:34:56 -0800 | [diff] [blame] | 2187 | static inline u32 sky2_mhz(const struct sky2_hw *hw) |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 2188 | { |
Stephen Hemminger | 793b883 | 2005-09-14 16:06:14 -0700 | [diff] [blame] | 2189 | switch (hw->chip_id) { |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 2190 | case CHIP_ID_YUKON_EC: |
shemminger@osdl.org | 5a5b1ea | 2005-11-30 11:45:15 -0800 | [diff] [blame] | 2191 | case CHIP_ID_YUKON_EC_U: |
Stephen Hemminger | fb17358 | 2005-12-09 11:34:56 -0800 | [diff] [blame] | 2192 | return 125; /* 125 Mhz */ |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 2193 | case CHIP_ID_YUKON_FE: |
Stephen Hemminger | fb17358 | 2005-12-09 11:34:56 -0800 | [diff] [blame] | 2194 | return 100; /* 100 Mhz */ |
Stephen Hemminger | 793b883 | 2005-09-14 16:06:14 -0700 | [diff] [blame] | 2195 | default: /* YUKON_XL */ |
Stephen Hemminger | fb17358 | 2005-12-09 11:34:56 -0800 | [diff] [blame] | 2196 | return 156; /* 156 Mhz */ |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 2197 | } |
| 2198 | } |
| 2199 | |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 2200 | static inline u32 sky2_us2clk(const struct sky2_hw *hw, u32 us) |
| 2201 | { |
Stephen Hemminger | fb17358 | 2005-12-09 11:34:56 -0800 | [diff] [blame] | 2202 | return sky2_mhz(hw) * us; |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 2203 | } |
| 2204 | |
Stephen Hemminger | fb17358 | 2005-12-09 11:34:56 -0800 | [diff] [blame] | 2205 | static inline u32 sky2_clk2us(const struct sky2_hw *hw, u32 clk) |
| 2206 | { |
| 2207 | return clk / sky2_mhz(hw); |
| 2208 | } |
| 2209 | |
| 2210 | |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 2211 | static int sky2_reset(struct sky2_hw *hw) |
| 2212 | { |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 2213 | u16 status; |
| 2214 | u8 t8, pmd_type; |
Stephen Hemminger | 56a645c | 2006-02-22 11:45:02 -0800 | [diff] [blame^] | 2215 | int i; |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 2216 | |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 2217 | sky2_write8(hw, B0_CTST, CS_RST_CLR); |
Stephen Hemminger | 08c06d8 | 2006-01-30 11:37:54 -0800 | [diff] [blame] | 2218 | |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 2219 | hw->chip_id = sky2_read8(hw, B2_CHIP_ID); |
| 2220 | if (hw->chip_id < CHIP_ID_YUKON_XL || hw->chip_id > CHIP_ID_YUKON_FE) { |
| 2221 | printk(KERN_ERR PFX "%s: unsupported chip type 0x%x\n", |
| 2222 | pci_name(hw->pdev), hw->chip_id); |
| 2223 | return -EOPNOTSUPP; |
| 2224 | } |
| 2225 | |
| 2226 | /* disable ASF */ |
| 2227 | if (hw->chip_id <= CHIP_ID_YUKON_EC) { |
| 2228 | sky2_write8(hw, B28_Y2_ASF_STAT_CMD, Y2_ASF_RESET); |
| 2229 | sky2_write16(hw, B0_CTST, Y2_ASF_DISABLE); |
| 2230 | } |
| 2231 | |
| 2232 | /* do a SW reset */ |
| 2233 | sky2_write8(hw, B0_CTST, CS_RST_SET); |
| 2234 | sky2_write8(hw, B0_CTST, CS_RST_CLR); |
| 2235 | |
| 2236 | /* clear PCI errors, if any */ |
Stephen Hemminger | 56a645c | 2006-02-22 11:45:02 -0800 | [diff] [blame^] | 2237 | status = sky2_pci_read16(hw, PCI_STATUS); |
Stephen Hemminger | 2d42d21 | 2006-01-30 11:37:55 -0800 | [diff] [blame] | 2238 | |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 2239 | sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_ON); |
Stephen Hemminger | 56a645c | 2006-02-22 11:45:02 -0800 | [diff] [blame^] | 2240 | sky2_pci_write16(hw, PCI_STATUS, status | PCI_STATUS_ERROR_BITS); |
| 2241 | |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 2242 | |
| 2243 | sky2_write8(hw, B0_CTST, CS_MRST_CLR); |
| 2244 | |
| 2245 | /* clear any PEX errors */ |
Stephen Hemminger | 56a645c | 2006-02-22 11:45:02 -0800 | [diff] [blame^] | 2246 | if (pci_find_capability(hw->pdev, PCI_CAP_ID_EXP)) |
| 2247 | sky2_pci_write32(hw, PEX_UNC_ERR_STAT, 0xffffffffUL); |
| 2248 | |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 2249 | |
| 2250 | pmd_type = sky2_read8(hw, B2_PMD_TYP); |
| 2251 | hw->copper = !(pmd_type == 'L' || pmd_type == 'S'); |
| 2252 | |
| 2253 | hw->ports = 1; |
| 2254 | t8 = sky2_read8(hw, B2_Y2_HW_RES); |
| 2255 | if ((t8 & CFG_DUAL_MAC_MSK) == CFG_DUAL_MAC_MSK) { |
| 2256 | if (!(sky2_read8(hw, B2_Y2_CLK_GATE) & Y2_STATUS_LNK2_INAC)) |
| 2257 | ++hw->ports; |
| 2258 | } |
| 2259 | hw->chip_rev = (sky2_read8(hw, B2_MAC_CFG) & CFG_CHIP_R_MSK) >> 4; |
| 2260 | |
shemminger@osdl.org | 5afa0a9 | 2005-09-27 15:03:00 -0700 | [diff] [blame] | 2261 | sky2_set_power_state(hw, PCI_D0); |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 2262 | |
| 2263 | for (i = 0; i < hw->ports; i++) { |
| 2264 | sky2_write8(hw, SK_REG(i, GMAC_LINK_CTRL), GMLC_RST_SET); |
| 2265 | sky2_write8(hw, SK_REG(i, GMAC_LINK_CTRL), GMLC_RST_CLR); |
| 2266 | } |
| 2267 | |
| 2268 | sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_OFF); |
| 2269 | |
Stephen Hemminger | 793b883 | 2005-09-14 16:06:14 -0700 | [diff] [blame] | 2270 | /* Clear I2C IRQ noise */ |
| 2271 | sky2_write32(hw, B2_I2C_IRQ, 1); |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 2272 | |
| 2273 | /* turn off hardware timer (unused) */ |
| 2274 | sky2_write8(hw, B2_TI_CTRL, TIM_STOP); |
| 2275 | sky2_write8(hw, B2_TI_CTRL, TIM_CLR_IRQ); |
Stephen Hemminger | 793b883 | 2005-09-14 16:06:14 -0700 | [diff] [blame] | 2276 | |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 2277 | sky2_write8(hw, B0_Y2LED, LED_STAT_ON); |
| 2278 | |
Stephen Hemminger | 69634ee | 2005-12-09 11:35:06 -0800 | [diff] [blame] | 2279 | /* Turn off descriptor polling */ |
| 2280 | sky2_write32(hw, B28_DPT_CTRL, DPT_STOP); |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 2281 | |
| 2282 | /* Turn off receive timestamp */ |
| 2283 | sky2_write8(hw, GMAC_TI_ST_CTRL, GMT_ST_STOP); |
Stephen Hemminger | 793b883 | 2005-09-14 16:06:14 -0700 | [diff] [blame] | 2284 | sky2_write8(hw, GMAC_TI_ST_CTRL, GMT_ST_CLR_IRQ); |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 2285 | |
| 2286 | /* enable the Tx Arbiters */ |
| 2287 | for (i = 0; i < hw->ports; i++) |
| 2288 | sky2_write8(hw, SK_REG(i, TXA_CTRL), TXA_ENA_ARB); |
| 2289 | |
| 2290 | /* Initialize ram interface */ |
| 2291 | for (i = 0; i < hw->ports; i++) { |
Stephen Hemminger | 793b883 | 2005-09-14 16:06:14 -0700 | [diff] [blame] | 2292 | sky2_write8(hw, RAM_BUFFER(i, B3_RI_CTRL), RI_RST_CLR); |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 2293 | |
| 2294 | sky2_write8(hw, RAM_BUFFER(i, B3_RI_WTO_R1), SK_RI_TO_53); |
| 2295 | sky2_write8(hw, RAM_BUFFER(i, B3_RI_WTO_XA1), SK_RI_TO_53); |
| 2296 | sky2_write8(hw, RAM_BUFFER(i, B3_RI_WTO_XS1), SK_RI_TO_53); |
| 2297 | sky2_write8(hw, RAM_BUFFER(i, B3_RI_RTO_R1), SK_RI_TO_53); |
| 2298 | sky2_write8(hw, RAM_BUFFER(i, B3_RI_RTO_XA1), SK_RI_TO_53); |
| 2299 | sky2_write8(hw, RAM_BUFFER(i, B3_RI_RTO_XS1), SK_RI_TO_53); |
| 2300 | sky2_write8(hw, RAM_BUFFER(i, B3_RI_WTO_R2), SK_RI_TO_53); |
| 2301 | sky2_write8(hw, RAM_BUFFER(i, B3_RI_WTO_XA2), SK_RI_TO_53); |
| 2302 | sky2_write8(hw, RAM_BUFFER(i, B3_RI_WTO_XS2), SK_RI_TO_53); |
| 2303 | sky2_write8(hw, RAM_BUFFER(i, B3_RI_RTO_R2), SK_RI_TO_53); |
| 2304 | sky2_write8(hw, RAM_BUFFER(i, B3_RI_RTO_XA2), SK_RI_TO_53); |
| 2305 | sky2_write8(hw, RAM_BUFFER(i, B3_RI_RTO_XS2), SK_RI_TO_53); |
| 2306 | } |
| 2307 | |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 2308 | sky2_write32(hw, B0_HWE_IMSK, Y2_HWE_ALL_MASK); |
| 2309 | |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 2310 | for (i = 0; i < hw->ports; i++) |
| 2311 | sky2_phy_reset(hw, i); |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 2312 | |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 2313 | memset(hw->st_le, 0, STATUS_LE_BYTES); |
| 2314 | hw->st_idx = 0; |
| 2315 | |
| 2316 | sky2_write32(hw, STAT_CTRL, SC_STAT_RST_SET); |
| 2317 | sky2_write32(hw, STAT_CTRL, SC_STAT_RST_CLR); |
| 2318 | |
| 2319 | sky2_write32(hw, STAT_LIST_ADDR_LO, hw->st_dma); |
Stephen Hemminger | 793b883 | 2005-09-14 16:06:14 -0700 | [diff] [blame] | 2320 | sky2_write32(hw, STAT_LIST_ADDR_HI, (u64) hw->st_dma >> 32); |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 2321 | |
| 2322 | /* Set the list last index */ |
Stephen Hemminger | 793b883 | 2005-09-14 16:06:14 -0700 | [diff] [blame] | 2323 | sky2_write16(hw, STAT_LAST_IDX, STATUS_RING_SIZE - 1); |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 2324 | |
Stephen Hemminger | 793b883 | 2005-09-14 16:06:14 -0700 | [diff] [blame] | 2325 | /* These status setup values are copied from SysKonnect's driver */ |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 2326 | if (is_ec_a1(hw)) { |
| 2327 | /* WA for dev. #4.3 */ |
Stephen Hemminger | 793b883 | 2005-09-14 16:06:14 -0700 | [diff] [blame] | 2328 | sky2_write16(hw, STAT_TX_IDX_TH, 0xfff); /* Tx Threshold */ |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 2329 | |
| 2330 | /* set Status-FIFO watermark */ |
| 2331 | sky2_write8(hw, STAT_FIFO_WM, 0x21); /* WA for dev. #4.18 */ |
| 2332 | |
| 2333 | /* set Status-FIFO ISR watermark */ |
Stephen Hemminger | 793b883 | 2005-09-14 16:06:14 -0700 | [diff] [blame] | 2334 | sky2_write8(hw, STAT_FIFO_ISR_WM, 0x07); /* WA for dev. #4.18 */ |
Stephen Hemminger | 69634ee | 2005-12-09 11:35:06 -0800 | [diff] [blame] | 2335 | sky2_write32(hw, STAT_TX_TIMER_INI, sky2_us2clk(hw, 10000)); |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 2336 | } else { |
Stephen Hemminger | 69634ee | 2005-12-09 11:35:06 -0800 | [diff] [blame] | 2337 | sky2_write16(hw, STAT_TX_IDX_TH, 10); |
| 2338 | sky2_write8(hw, STAT_FIFO_WM, 16); |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 2339 | |
| 2340 | /* set Status-FIFO ISR watermark */ |
| 2341 | if (hw->chip_id == CHIP_ID_YUKON_XL && hw->chip_rev == 0) |
Stephen Hemminger | 69634ee | 2005-12-09 11:35:06 -0800 | [diff] [blame] | 2342 | sky2_write8(hw, STAT_FIFO_ISR_WM, 4); |
| 2343 | else |
| 2344 | sky2_write8(hw, STAT_FIFO_ISR_WM, 16); |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 2345 | |
Stephen Hemminger | 69634ee | 2005-12-09 11:35:06 -0800 | [diff] [blame] | 2346 | sky2_write32(hw, STAT_TX_TIMER_INI, sky2_us2clk(hw, 1000)); |
Stephen Hemminger | 9a6d343 | 2006-02-22 11:45:01 -0800 | [diff] [blame] | 2347 | sky2_write32(hw, STAT_ISR_TIMER_INI, sky2_us2clk(hw, 7)); |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 2348 | } |
| 2349 | |
Stephen Hemminger | 793b883 | 2005-09-14 16:06:14 -0700 | [diff] [blame] | 2350 | /* enable status unit */ |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 2351 | sky2_write32(hw, STAT_CTRL, SC_STAT_OP_ON); |
| 2352 | |
| 2353 | sky2_write8(hw, STAT_TX_TIMER_CTRL, TIM_START); |
| 2354 | sky2_write8(hw, STAT_LEV_TIMER_CTRL, TIM_START); |
| 2355 | sky2_write8(hw, STAT_ISR_TIMER_CTRL, TIM_START); |
| 2356 | |
| 2357 | return 0; |
| 2358 | } |
| 2359 | |
Stephen Hemminger | 28bd181 | 2006-01-17 13:43:19 -0800 | [diff] [blame] | 2360 | static u32 sky2_supported_modes(const struct sky2_hw *hw) |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 2361 | { |
| 2362 | u32 modes; |
| 2363 | if (hw->copper) { |
Stephen Hemminger | 793b883 | 2005-09-14 16:06:14 -0700 | [diff] [blame] | 2364 | modes = SUPPORTED_10baseT_Half |
| 2365 | | SUPPORTED_10baseT_Full |
| 2366 | | SUPPORTED_100baseT_Half |
| 2367 | | SUPPORTED_100baseT_Full |
| 2368 | | SUPPORTED_Autoneg | SUPPORTED_TP; |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 2369 | |
| 2370 | if (hw->chip_id != CHIP_ID_YUKON_FE) |
| 2371 | modes |= SUPPORTED_1000baseT_Half |
Stephen Hemminger | 793b883 | 2005-09-14 16:06:14 -0700 | [diff] [blame] | 2372 | | SUPPORTED_1000baseT_Full; |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 2373 | } else |
| 2374 | modes = SUPPORTED_1000baseT_Full | SUPPORTED_FIBRE |
Stephen Hemminger | 793b883 | 2005-09-14 16:06:14 -0700 | [diff] [blame] | 2375 | | SUPPORTED_Autoneg; |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 2376 | return modes; |
| 2377 | } |
| 2378 | |
Stephen Hemminger | 793b883 | 2005-09-14 16:06:14 -0700 | [diff] [blame] | 2379 | static int sky2_get_settings(struct net_device *dev, struct ethtool_cmd *ecmd) |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 2380 | { |
| 2381 | struct sky2_port *sky2 = netdev_priv(dev); |
| 2382 | struct sky2_hw *hw = sky2->hw; |
| 2383 | |
| 2384 | ecmd->transceiver = XCVR_INTERNAL; |
| 2385 | ecmd->supported = sky2_supported_modes(hw); |
| 2386 | ecmd->phy_address = PHY_ADDR_MARV; |
| 2387 | if (hw->copper) { |
| 2388 | ecmd->supported = SUPPORTED_10baseT_Half |
Stephen Hemminger | 793b883 | 2005-09-14 16:06:14 -0700 | [diff] [blame] | 2389 | | SUPPORTED_10baseT_Full |
| 2390 | | SUPPORTED_100baseT_Half |
| 2391 | | SUPPORTED_100baseT_Full |
| 2392 | | SUPPORTED_1000baseT_Half |
| 2393 | | SUPPORTED_1000baseT_Full |
| 2394 | | SUPPORTED_Autoneg | SUPPORTED_TP; |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 2395 | ecmd->port = PORT_TP; |
| 2396 | } else |
| 2397 | ecmd->port = PORT_FIBRE; |
| 2398 | |
| 2399 | ecmd->advertising = sky2->advertising; |
| 2400 | ecmd->autoneg = sky2->autoneg; |
| 2401 | ecmd->speed = sky2->speed; |
| 2402 | ecmd->duplex = sky2->duplex; |
| 2403 | return 0; |
| 2404 | } |
| 2405 | |
| 2406 | static int sky2_set_settings(struct net_device *dev, struct ethtool_cmd *ecmd) |
| 2407 | { |
| 2408 | struct sky2_port *sky2 = netdev_priv(dev); |
| 2409 | const struct sky2_hw *hw = sky2->hw; |
| 2410 | u32 supported = sky2_supported_modes(hw); |
| 2411 | |
| 2412 | if (ecmd->autoneg == AUTONEG_ENABLE) { |
| 2413 | ecmd->advertising = supported; |
| 2414 | sky2->duplex = -1; |
| 2415 | sky2->speed = -1; |
| 2416 | } else { |
| 2417 | u32 setting; |
| 2418 | |
Stephen Hemminger | 793b883 | 2005-09-14 16:06:14 -0700 | [diff] [blame] | 2419 | switch (ecmd->speed) { |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 2420 | case SPEED_1000: |
| 2421 | if (ecmd->duplex == DUPLEX_FULL) |
| 2422 | setting = SUPPORTED_1000baseT_Full; |
| 2423 | else if (ecmd->duplex == DUPLEX_HALF) |
| 2424 | setting = SUPPORTED_1000baseT_Half; |
| 2425 | else |
| 2426 | return -EINVAL; |
| 2427 | break; |
| 2428 | case SPEED_100: |
| 2429 | if (ecmd->duplex == DUPLEX_FULL) |
| 2430 | setting = SUPPORTED_100baseT_Full; |
| 2431 | else if (ecmd->duplex == DUPLEX_HALF) |
| 2432 | setting = SUPPORTED_100baseT_Half; |
| 2433 | else |
| 2434 | return -EINVAL; |
| 2435 | break; |
| 2436 | |
| 2437 | case SPEED_10: |
| 2438 | if (ecmd->duplex == DUPLEX_FULL) |
| 2439 | setting = SUPPORTED_10baseT_Full; |
| 2440 | else if (ecmd->duplex == DUPLEX_HALF) |
| 2441 | setting = SUPPORTED_10baseT_Half; |
| 2442 | else |
| 2443 | return -EINVAL; |
| 2444 | break; |
| 2445 | default: |
| 2446 | return -EINVAL; |
| 2447 | } |
| 2448 | |
| 2449 | if ((setting & supported) == 0) |
| 2450 | return -EINVAL; |
| 2451 | |
| 2452 | sky2->speed = ecmd->speed; |
| 2453 | sky2->duplex = ecmd->duplex; |
| 2454 | } |
| 2455 | |
| 2456 | sky2->autoneg = ecmd->autoneg; |
| 2457 | sky2->advertising = ecmd->advertising; |
| 2458 | |
Stephen Hemminger | 1b53756 | 2005-12-20 15:08:07 -0800 | [diff] [blame] | 2459 | if (netif_running(dev)) |
| 2460 | sky2_phy_reinit(sky2); |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 2461 | |
| 2462 | return 0; |
| 2463 | } |
| 2464 | |
| 2465 | static void sky2_get_drvinfo(struct net_device *dev, |
| 2466 | struct ethtool_drvinfo *info) |
| 2467 | { |
| 2468 | struct sky2_port *sky2 = netdev_priv(dev); |
| 2469 | |
| 2470 | strcpy(info->driver, DRV_NAME); |
| 2471 | strcpy(info->version, DRV_VERSION); |
| 2472 | strcpy(info->fw_version, "N/A"); |
| 2473 | strcpy(info->bus_info, pci_name(sky2->hw->pdev)); |
| 2474 | } |
| 2475 | |
| 2476 | static const struct sky2_stat { |
Stephen Hemminger | 793b883 | 2005-09-14 16:06:14 -0700 | [diff] [blame] | 2477 | char name[ETH_GSTRING_LEN]; |
| 2478 | u16 offset; |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 2479 | } sky2_stats[] = { |
| 2480 | { "tx_bytes", GM_TXO_OK_HI }, |
| 2481 | { "rx_bytes", GM_RXO_OK_HI }, |
| 2482 | { "tx_broadcast", GM_TXF_BC_OK }, |
| 2483 | { "rx_broadcast", GM_RXF_BC_OK }, |
| 2484 | { "tx_multicast", GM_TXF_MC_OK }, |
| 2485 | { "rx_multicast", GM_RXF_MC_OK }, |
| 2486 | { "tx_unicast", GM_TXF_UC_OK }, |
| 2487 | { "rx_unicast", GM_RXF_UC_OK }, |
| 2488 | { "tx_mac_pause", GM_TXF_MPAUSE }, |
| 2489 | { "rx_mac_pause", GM_RXF_MPAUSE }, |
| 2490 | { "collisions", GM_TXF_SNG_COL }, |
| 2491 | { "late_collision",GM_TXF_LAT_COL }, |
| 2492 | { "aborted", GM_TXF_ABO_COL }, |
| 2493 | { "multi_collisions", GM_TXF_MUL_COL }, |
| 2494 | { "fifo_underrun", GM_TXE_FIFO_UR }, |
| 2495 | { "fifo_overflow", GM_RXE_FIFO_OV }, |
| 2496 | { "rx_toolong", GM_RXF_LNG_ERR }, |
| 2497 | { "rx_jabber", GM_RXF_JAB_PKT }, |
| 2498 | { "rx_runt", GM_RXE_FRAG }, |
| 2499 | { "rx_too_long", GM_RXF_LNG_ERR }, |
| 2500 | { "rx_fcs_error", GM_RXF_FCS_ERR }, |
| 2501 | }; |
| 2502 | |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 2503 | static u32 sky2_get_rx_csum(struct net_device *dev) |
| 2504 | { |
| 2505 | struct sky2_port *sky2 = netdev_priv(dev); |
| 2506 | |
| 2507 | return sky2->rx_csum; |
| 2508 | } |
| 2509 | |
| 2510 | static int sky2_set_rx_csum(struct net_device *dev, u32 data) |
| 2511 | { |
| 2512 | struct sky2_port *sky2 = netdev_priv(dev); |
| 2513 | |
| 2514 | sky2->rx_csum = data; |
Stephen Hemminger | 793b883 | 2005-09-14 16:06:14 -0700 | [diff] [blame] | 2515 | |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 2516 | sky2_write32(sky2->hw, Q_ADDR(rxqaddr[sky2->port], Q_CSR), |
| 2517 | data ? BMU_ENA_RX_CHKSUM : BMU_DIS_RX_CHKSUM); |
| 2518 | |
| 2519 | return 0; |
| 2520 | } |
| 2521 | |
| 2522 | static u32 sky2_get_msglevel(struct net_device *netdev) |
| 2523 | { |
| 2524 | struct sky2_port *sky2 = netdev_priv(netdev); |
| 2525 | return sky2->msg_enable; |
| 2526 | } |
| 2527 | |
Stephen Hemminger | 9a7ae0a | 2005-09-27 15:28:42 -0700 | [diff] [blame] | 2528 | static int sky2_nway_reset(struct net_device *dev) |
| 2529 | { |
| 2530 | struct sky2_port *sky2 = netdev_priv(dev); |
Stephen Hemminger | 9a7ae0a | 2005-09-27 15:28:42 -0700 | [diff] [blame] | 2531 | |
| 2532 | if (sky2->autoneg != AUTONEG_ENABLE) |
| 2533 | return -EINVAL; |
| 2534 | |
Stephen Hemminger | 1b53756 | 2005-12-20 15:08:07 -0800 | [diff] [blame] | 2535 | sky2_phy_reinit(sky2); |
Stephen Hemminger | 9a7ae0a | 2005-09-27 15:28:42 -0700 | [diff] [blame] | 2536 | |
| 2537 | return 0; |
| 2538 | } |
| 2539 | |
Stephen Hemminger | 793b883 | 2005-09-14 16:06:14 -0700 | [diff] [blame] | 2540 | static void sky2_phy_stats(struct sky2_port *sky2, u64 * data, unsigned count) |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 2541 | { |
| 2542 | struct sky2_hw *hw = sky2->hw; |
| 2543 | unsigned port = sky2->port; |
| 2544 | int i; |
| 2545 | |
| 2546 | data[0] = (u64) gma_read32(hw, port, GM_TXO_OK_HI) << 32 |
Stephen Hemminger | 793b883 | 2005-09-14 16:06:14 -0700 | [diff] [blame] | 2547 | | (u64) gma_read32(hw, port, GM_TXO_OK_LO); |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 2548 | data[1] = (u64) gma_read32(hw, port, GM_RXO_OK_HI) << 32 |
Stephen Hemminger | 793b883 | 2005-09-14 16:06:14 -0700 | [diff] [blame] | 2549 | | (u64) gma_read32(hw, port, GM_RXO_OK_LO); |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 2550 | |
Stephen Hemminger | 793b883 | 2005-09-14 16:06:14 -0700 | [diff] [blame] | 2551 | for (i = 2; i < count; i++) |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 2552 | data[i] = (u64) gma_read32(hw, port, sky2_stats[i].offset); |
| 2553 | } |
| 2554 | |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 2555 | static void sky2_set_msglevel(struct net_device *netdev, u32 value) |
| 2556 | { |
| 2557 | struct sky2_port *sky2 = netdev_priv(netdev); |
| 2558 | sky2->msg_enable = value; |
| 2559 | } |
| 2560 | |
| 2561 | static int sky2_get_stats_count(struct net_device *dev) |
| 2562 | { |
| 2563 | return ARRAY_SIZE(sky2_stats); |
| 2564 | } |
| 2565 | |
| 2566 | static void sky2_get_ethtool_stats(struct net_device *dev, |
Stephen Hemminger | 793b883 | 2005-09-14 16:06:14 -0700 | [diff] [blame] | 2567 | struct ethtool_stats *stats, u64 * data) |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 2568 | { |
| 2569 | struct sky2_port *sky2 = netdev_priv(dev); |
| 2570 | |
Stephen Hemminger | 793b883 | 2005-09-14 16:06:14 -0700 | [diff] [blame] | 2571 | sky2_phy_stats(sky2, data, ARRAY_SIZE(sky2_stats)); |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 2572 | } |
| 2573 | |
Stephen Hemminger | 793b883 | 2005-09-14 16:06:14 -0700 | [diff] [blame] | 2574 | static void sky2_get_strings(struct net_device *dev, u32 stringset, u8 * data) |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 2575 | { |
| 2576 | int i; |
| 2577 | |
| 2578 | switch (stringset) { |
| 2579 | case ETH_SS_STATS: |
| 2580 | for (i = 0; i < ARRAY_SIZE(sky2_stats); i++) |
| 2581 | memcpy(data + i * ETH_GSTRING_LEN, |
| 2582 | sky2_stats[i].name, ETH_GSTRING_LEN); |
| 2583 | break; |
| 2584 | } |
| 2585 | } |
| 2586 | |
| 2587 | /* Use hardware MIB variables for critical path statistics and |
| 2588 | * transmit feedback not reported at interrupt. |
| 2589 | * Other errors are accounted for in interrupt handler. |
| 2590 | */ |
| 2591 | static struct net_device_stats *sky2_get_stats(struct net_device *dev) |
| 2592 | { |
| 2593 | struct sky2_port *sky2 = netdev_priv(dev); |
Stephen Hemminger | 793b883 | 2005-09-14 16:06:14 -0700 | [diff] [blame] | 2594 | u64 data[13]; |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 2595 | |
Stephen Hemminger | 793b883 | 2005-09-14 16:06:14 -0700 | [diff] [blame] | 2596 | sky2_phy_stats(sky2, data, ARRAY_SIZE(data)); |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 2597 | |
| 2598 | sky2->net_stats.tx_bytes = data[0]; |
| 2599 | sky2->net_stats.rx_bytes = data[1]; |
| 2600 | sky2->net_stats.tx_packets = data[2] + data[4] + data[6]; |
| 2601 | sky2->net_stats.rx_packets = data[3] + data[5] + data[7]; |
| 2602 | sky2->net_stats.multicast = data[5] + data[7]; |
| 2603 | sky2->net_stats.collisions = data[10]; |
| 2604 | sky2->net_stats.tx_aborted_errors = data[12]; |
| 2605 | |
| 2606 | return &sky2->net_stats; |
| 2607 | } |
| 2608 | |
| 2609 | static int sky2_set_mac_address(struct net_device *dev, void *p) |
| 2610 | { |
| 2611 | struct sky2_port *sky2 = netdev_priv(dev); |
Stephen Hemminger | a8ab1ec | 2006-01-30 11:37:57 -0800 | [diff] [blame] | 2612 | struct sky2_hw *hw = sky2->hw; |
| 2613 | unsigned port = sky2->port; |
| 2614 | const struct sockaddr *addr = p; |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 2615 | |
| 2616 | if (!is_valid_ether_addr(addr->sa_data)) |
| 2617 | return -EADDRNOTAVAIL; |
| 2618 | |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 2619 | memcpy(dev->dev_addr, addr->sa_data, ETH_ALEN); |
Stephen Hemminger | a8ab1ec | 2006-01-30 11:37:57 -0800 | [diff] [blame] | 2620 | memcpy_toio(hw->regs + B2_MAC_1 + port * 8, |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 2621 | dev->dev_addr, ETH_ALEN); |
Stephen Hemminger | a8ab1ec | 2006-01-30 11:37:57 -0800 | [diff] [blame] | 2622 | memcpy_toio(hw->regs + B2_MAC_2 + port * 8, |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 2623 | dev->dev_addr, ETH_ALEN); |
Stephen Hemminger | 1b53756 | 2005-12-20 15:08:07 -0800 | [diff] [blame] | 2624 | |
Stephen Hemminger | a8ab1ec | 2006-01-30 11:37:57 -0800 | [diff] [blame] | 2625 | /* virtual address for data */ |
| 2626 | gma_set_addr(hw, port, GM_SRC_ADDR_2L, dev->dev_addr); |
| 2627 | |
| 2628 | /* physical address: used for pause frames */ |
| 2629 | gma_set_addr(hw, port, GM_SRC_ADDR_1L, dev->dev_addr); |
Stephen Hemminger | 1b53756 | 2005-12-20 15:08:07 -0800 | [diff] [blame] | 2630 | |
| 2631 | return 0; |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 2632 | } |
| 2633 | |
| 2634 | static void sky2_set_multicast(struct net_device *dev) |
| 2635 | { |
| 2636 | struct sky2_port *sky2 = netdev_priv(dev); |
| 2637 | struct sky2_hw *hw = sky2->hw; |
| 2638 | unsigned port = sky2->port; |
| 2639 | struct dev_mc_list *list = dev->mc_list; |
| 2640 | u16 reg; |
| 2641 | u8 filter[8]; |
| 2642 | |
| 2643 | memset(filter, 0, sizeof(filter)); |
| 2644 | |
| 2645 | reg = gma_read16(hw, port, GM_RX_CTRL); |
| 2646 | reg |= GM_RXCR_UCF_ENA; |
| 2647 | |
shemminger@osdl.org | d571b69 | 2005-10-26 12:16:09 -0700 | [diff] [blame] | 2648 | if (dev->flags & IFF_PROMISC) /* promiscuous */ |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 2649 | reg &= ~(GM_RXCR_UCF_ENA | GM_RXCR_MCF_ENA); |
Stephen Hemminger | 793b883 | 2005-09-14 16:06:14 -0700 | [diff] [blame] | 2650 | else if ((dev->flags & IFF_ALLMULTI) || dev->mc_count > 16) /* all multicast */ |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 2651 | memset(filter, 0xff, sizeof(filter)); |
Stephen Hemminger | 793b883 | 2005-09-14 16:06:14 -0700 | [diff] [blame] | 2652 | else if (dev->mc_count == 0) /* no multicast */ |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 2653 | reg &= ~GM_RXCR_MCF_ENA; |
| 2654 | else { |
| 2655 | int i; |
| 2656 | reg |= GM_RXCR_MCF_ENA; |
| 2657 | |
| 2658 | for (i = 0; list && i < dev->mc_count; i++, list = list->next) { |
| 2659 | u32 bit = ether_crc(ETH_ALEN, list->dmi_addr) & 0x3f; |
Stephen Hemminger | 793b883 | 2005-09-14 16:06:14 -0700 | [diff] [blame] | 2660 | filter[bit / 8] |= 1 << (bit % 8); |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 2661 | } |
| 2662 | } |
| 2663 | |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 2664 | gma_write16(hw, port, GM_MC_ADDR_H1, |
Stephen Hemminger | 793b883 | 2005-09-14 16:06:14 -0700 | [diff] [blame] | 2665 | (u16) filter[0] | ((u16) filter[1] << 8)); |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 2666 | gma_write16(hw, port, GM_MC_ADDR_H2, |
Stephen Hemminger | 793b883 | 2005-09-14 16:06:14 -0700 | [diff] [blame] | 2667 | (u16) filter[2] | ((u16) filter[3] << 8)); |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 2668 | gma_write16(hw, port, GM_MC_ADDR_H3, |
Stephen Hemminger | 793b883 | 2005-09-14 16:06:14 -0700 | [diff] [blame] | 2669 | (u16) filter[4] | ((u16) filter[5] << 8)); |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 2670 | gma_write16(hw, port, GM_MC_ADDR_H4, |
Stephen Hemminger | 793b883 | 2005-09-14 16:06:14 -0700 | [diff] [blame] | 2671 | (u16) filter[6] | ((u16) filter[7] << 8)); |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 2672 | |
| 2673 | gma_write16(hw, port, GM_RX_CTRL, reg); |
| 2674 | } |
| 2675 | |
| 2676 | /* Can have one global because blinking is controlled by |
| 2677 | * ethtool and that is always under RTNL mutex |
| 2678 | */ |
Stephen Hemminger | 91c86df | 2005-12-09 11:34:57 -0800 | [diff] [blame] | 2679 | static void sky2_led(struct sky2_hw *hw, unsigned port, int on) |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 2680 | { |
Stephen Hemminger | 793b883 | 2005-09-14 16:06:14 -0700 | [diff] [blame] | 2681 | u16 pg; |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 2682 | |
Stephen Hemminger | 793b883 | 2005-09-14 16:06:14 -0700 | [diff] [blame] | 2683 | switch (hw->chip_id) { |
| 2684 | case CHIP_ID_YUKON_XL: |
| 2685 | pg = gm_phy_read(hw, port, PHY_MARV_EXT_ADR); |
| 2686 | gm_phy_write(hw, port, PHY_MARV_EXT_ADR, 3); |
| 2687 | gm_phy_write(hw, port, PHY_MARV_PHY_CTRL, |
| 2688 | on ? (PHY_M_LEDC_LOS_CTRL(1) | |
| 2689 | PHY_M_LEDC_INIT_CTRL(7) | |
| 2690 | PHY_M_LEDC_STA1_CTRL(7) | |
| 2691 | PHY_M_LEDC_STA0_CTRL(7)) |
| 2692 | : 0); |
| 2693 | |
| 2694 | gm_phy_write(hw, port, PHY_MARV_EXT_ADR, pg); |
| 2695 | break; |
| 2696 | |
| 2697 | default: |
| 2698 | gm_phy_write(hw, port, PHY_MARV_LED_CTRL, 0); |
| 2699 | gm_phy_write(hw, port, PHY_MARV_LED_OVER, |
| 2700 | on ? PHY_M_LED_MO_DUP(MO_LED_ON) | |
| 2701 | PHY_M_LED_MO_10(MO_LED_ON) | |
| 2702 | PHY_M_LED_MO_100(MO_LED_ON) | |
| 2703 | PHY_M_LED_MO_1000(MO_LED_ON) | |
| 2704 | PHY_M_LED_MO_RX(MO_LED_ON) |
| 2705 | : PHY_M_LED_MO_DUP(MO_LED_OFF) | |
| 2706 | PHY_M_LED_MO_10(MO_LED_OFF) | |
| 2707 | PHY_M_LED_MO_100(MO_LED_OFF) | |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 2708 | PHY_M_LED_MO_1000(MO_LED_OFF) | |
| 2709 | PHY_M_LED_MO_RX(MO_LED_OFF)); |
| 2710 | |
Stephen Hemminger | 793b883 | 2005-09-14 16:06:14 -0700 | [diff] [blame] | 2711 | } |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 2712 | } |
| 2713 | |
| 2714 | /* blink LED's for finding board */ |
| 2715 | static int sky2_phys_id(struct net_device *dev, u32 data) |
| 2716 | { |
| 2717 | struct sky2_port *sky2 = netdev_priv(dev); |
| 2718 | struct sky2_hw *hw = sky2->hw; |
| 2719 | unsigned port = sky2->port; |
Stephen Hemminger | 793b883 | 2005-09-14 16:06:14 -0700 | [diff] [blame] | 2720 | u16 ledctrl, ledover = 0; |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 2721 | long ms; |
Stephen Hemminger | 91c86df | 2005-12-09 11:34:57 -0800 | [diff] [blame] | 2722 | int interrupted; |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 2723 | int onoff = 1; |
| 2724 | |
Stephen Hemminger | 793b883 | 2005-09-14 16:06:14 -0700 | [diff] [blame] | 2725 | if (!data || data > (u32) (MAX_SCHEDULE_TIMEOUT / HZ)) |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 2726 | ms = jiffies_to_msecs(MAX_SCHEDULE_TIMEOUT); |
| 2727 | else |
| 2728 | ms = data * 1000; |
| 2729 | |
| 2730 | /* save initial values */ |
Stephen Hemminger | 91c86df | 2005-12-09 11:34:57 -0800 | [diff] [blame] | 2731 | down(&sky2->phy_sema); |
Stephen Hemminger | 793b883 | 2005-09-14 16:06:14 -0700 | [diff] [blame] | 2732 | if (hw->chip_id == CHIP_ID_YUKON_XL) { |
| 2733 | u16 pg = gm_phy_read(hw, port, PHY_MARV_EXT_ADR); |
| 2734 | gm_phy_write(hw, port, PHY_MARV_EXT_ADR, 3); |
| 2735 | ledctrl = gm_phy_read(hw, port, PHY_MARV_PHY_CTRL); |
| 2736 | gm_phy_write(hw, port, PHY_MARV_EXT_ADR, pg); |
| 2737 | } else { |
| 2738 | ledctrl = gm_phy_read(hw, port, PHY_MARV_LED_CTRL); |
| 2739 | ledover = gm_phy_read(hw, port, PHY_MARV_LED_OVER); |
| 2740 | } |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 2741 | |
Stephen Hemminger | 91c86df | 2005-12-09 11:34:57 -0800 | [diff] [blame] | 2742 | interrupted = 0; |
| 2743 | while (!interrupted && ms > 0) { |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 2744 | sky2_led(hw, port, onoff); |
| 2745 | onoff = !onoff; |
| 2746 | |
Stephen Hemminger | 91c86df | 2005-12-09 11:34:57 -0800 | [diff] [blame] | 2747 | up(&sky2->phy_sema); |
| 2748 | interrupted = msleep_interruptible(250); |
| 2749 | down(&sky2->phy_sema); |
| 2750 | |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 2751 | ms -= 250; |
| 2752 | } |
| 2753 | |
| 2754 | /* resume regularly scheduled programming */ |
Stephen Hemminger | 793b883 | 2005-09-14 16:06:14 -0700 | [diff] [blame] | 2755 | if (hw->chip_id == CHIP_ID_YUKON_XL) { |
| 2756 | u16 pg = gm_phy_read(hw, port, PHY_MARV_EXT_ADR); |
| 2757 | gm_phy_write(hw, port, PHY_MARV_EXT_ADR, 3); |
| 2758 | gm_phy_write(hw, port, PHY_MARV_PHY_CTRL, ledctrl); |
| 2759 | gm_phy_write(hw, port, PHY_MARV_EXT_ADR, pg); |
| 2760 | } else { |
| 2761 | gm_phy_write(hw, port, PHY_MARV_LED_CTRL, ledctrl); |
| 2762 | gm_phy_write(hw, port, PHY_MARV_LED_OVER, ledover); |
| 2763 | } |
Stephen Hemminger | 91c86df | 2005-12-09 11:34:57 -0800 | [diff] [blame] | 2764 | up(&sky2->phy_sema); |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 2765 | |
| 2766 | return 0; |
| 2767 | } |
| 2768 | |
| 2769 | static void sky2_get_pauseparam(struct net_device *dev, |
| 2770 | struct ethtool_pauseparam *ecmd) |
| 2771 | { |
| 2772 | struct sky2_port *sky2 = netdev_priv(dev); |
| 2773 | |
| 2774 | ecmd->tx_pause = sky2->tx_pause; |
| 2775 | ecmd->rx_pause = sky2->rx_pause; |
| 2776 | ecmd->autoneg = sky2->autoneg; |
| 2777 | } |
| 2778 | |
| 2779 | static int sky2_set_pauseparam(struct net_device *dev, |
| 2780 | struct ethtool_pauseparam *ecmd) |
| 2781 | { |
| 2782 | struct sky2_port *sky2 = netdev_priv(dev); |
| 2783 | int err = 0; |
| 2784 | |
| 2785 | sky2->autoneg = ecmd->autoneg; |
| 2786 | sky2->tx_pause = ecmd->tx_pause != 0; |
| 2787 | sky2->rx_pause = ecmd->rx_pause != 0; |
| 2788 | |
Stephen Hemminger | 1b53756 | 2005-12-20 15:08:07 -0800 | [diff] [blame] | 2789 | sky2_phy_reinit(sky2); |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 2790 | |
| 2791 | return err; |
| 2792 | } |
| 2793 | |
| 2794 | #ifdef CONFIG_PM |
| 2795 | static void sky2_get_wol(struct net_device *dev, struct ethtool_wolinfo *wol) |
| 2796 | { |
| 2797 | struct sky2_port *sky2 = netdev_priv(dev); |
| 2798 | |
| 2799 | wol->supported = WAKE_MAGIC; |
| 2800 | wol->wolopts = sky2->wol ? WAKE_MAGIC : 0; |
| 2801 | } |
| 2802 | |
| 2803 | static int sky2_set_wol(struct net_device *dev, struct ethtool_wolinfo *wol) |
| 2804 | { |
| 2805 | struct sky2_port *sky2 = netdev_priv(dev); |
| 2806 | struct sky2_hw *hw = sky2->hw; |
| 2807 | |
| 2808 | if (wol->wolopts != WAKE_MAGIC && wol->wolopts != 0) |
| 2809 | return -EOPNOTSUPP; |
| 2810 | |
| 2811 | sky2->wol = wol->wolopts == WAKE_MAGIC; |
| 2812 | |
| 2813 | if (sky2->wol) { |
| 2814 | memcpy_toio(hw->regs + WOL_MAC_ADDR, dev->dev_addr, ETH_ALEN); |
| 2815 | |
| 2816 | sky2_write16(hw, WOL_CTRL_STAT, |
| 2817 | WOL_CTL_ENA_PME_ON_MAGIC_PKT | |
| 2818 | WOL_CTL_ENA_MAGIC_PKT_UNIT); |
| 2819 | } else |
| 2820 | sky2_write16(hw, WOL_CTRL_STAT, WOL_CTL_DEFAULT); |
| 2821 | |
| 2822 | return 0; |
| 2823 | } |
| 2824 | #endif |
| 2825 | |
Stephen Hemminger | fb17358 | 2005-12-09 11:34:56 -0800 | [diff] [blame] | 2826 | static int sky2_get_coalesce(struct net_device *dev, |
| 2827 | struct ethtool_coalesce *ecmd) |
| 2828 | { |
| 2829 | struct sky2_port *sky2 = netdev_priv(dev); |
| 2830 | struct sky2_hw *hw = sky2->hw; |
| 2831 | |
| 2832 | if (sky2_read8(hw, STAT_TX_TIMER_CTRL) == TIM_STOP) |
| 2833 | ecmd->tx_coalesce_usecs = 0; |
| 2834 | else { |
| 2835 | u32 clks = sky2_read32(hw, STAT_TX_TIMER_INI); |
| 2836 | ecmd->tx_coalesce_usecs = sky2_clk2us(hw, clks); |
| 2837 | } |
| 2838 | ecmd->tx_max_coalesced_frames = sky2_read16(hw, STAT_TX_IDX_TH); |
| 2839 | |
| 2840 | if (sky2_read8(hw, STAT_LEV_TIMER_CTRL) == TIM_STOP) |
| 2841 | ecmd->rx_coalesce_usecs = 0; |
| 2842 | else { |
| 2843 | u32 clks = sky2_read32(hw, STAT_LEV_TIMER_INI); |
| 2844 | ecmd->rx_coalesce_usecs = sky2_clk2us(hw, clks); |
| 2845 | } |
| 2846 | ecmd->rx_max_coalesced_frames = sky2_read8(hw, STAT_FIFO_WM); |
| 2847 | |
| 2848 | if (sky2_read8(hw, STAT_ISR_TIMER_CTRL) == TIM_STOP) |
| 2849 | ecmd->rx_coalesce_usecs_irq = 0; |
| 2850 | else { |
| 2851 | u32 clks = sky2_read32(hw, STAT_ISR_TIMER_INI); |
| 2852 | ecmd->rx_coalesce_usecs_irq = sky2_clk2us(hw, clks); |
| 2853 | } |
| 2854 | |
| 2855 | ecmd->rx_max_coalesced_frames_irq = sky2_read8(hw, STAT_FIFO_ISR_WM); |
| 2856 | |
| 2857 | return 0; |
| 2858 | } |
| 2859 | |
| 2860 | /* Note: this affect both ports */ |
| 2861 | static int sky2_set_coalesce(struct net_device *dev, |
| 2862 | struct ethtool_coalesce *ecmd) |
| 2863 | { |
| 2864 | struct sky2_port *sky2 = netdev_priv(dev); |
| 2865 | struct sky2_hw *hw = sky2->hw; |
| 2866 | const u32 tmin = sky2_clk2us(hw, 1); |
| 2867 | const u32 tmax = 5000; |
| 2868 | |
| 2869 | if (ecmd->tx_coalesce_usecs != 0 && |
| 2870 | (ecmd->tx_coalesce_usecs < tmin || ecmd->tx_coalesce_usecs > tmax)) |
| 2871 | return -EINVAL; |
| 2872 | |
| 2873 | if (ecmd->rx_coalesce_usecs != 0 && |
| 2874 | (ecmd->rx_coalesce_usecs < tmin || ecmd->rx_coalesce_usecs > tmax)) |
| 2875 | return -EINVAL; |
| 2876 | |
| 2877 | if (ecmd->rx_coalesce_usecs_irq != 0 && |
| 2878 | (ecmd->rx_coalesce_usecs_irq < tmin || ecmd->rx_coalesce_usecs_irq > tmax)) |
| 2879 | return -EINVAL; |
| 2880 | |
Stephen Hemminger | ff81fbb | 2006-02-22 11:44:59 -0800 | [diff] [blame] | 2881 | if (ecmd->tx_max_coalesced_frames >= TX_RING_SIZE-1) |
Stephen Hemminger | fb17358 | 2005-12-09 11:34:56 -0800 | [diff] [blame] | 2882 | return -EINVAL; |
Stephen Hemminger | ff81fbb | 2006-02-22 11:44:59 -0800 | [diff] [blame] | 2883 | if (ecmd->rx_max_coalesced_frames > RX_MAX_PENDING) |
Stephen Hemminger | fb17358 | 2005-12-09 11:34:56 -0800 | [diff] [blame] | 2884 | return -EINVAL; |
Stephen Hemminger | ff81fbb | 2006-02-22 11:44:59 -0800 | [diff] [blame] | 2885 | if (ecmd->rx_max_coalesced_frames_irq >RX_MAX_PENDING) |
Stephen Hemminger | fb17358 | 2005-12-09 11:34:56 -0800 | [diff] [blame] | 2886 | return -EINVAL; |
| 2887 | |
| 2888 | if (ecmd->tx_coalesce_usecs == 0) |
| 2889 | sky2_write8(hw, STAT_TX_TIMER_CTRL, TIM_STOP); |
| 2890 | else { |
| 2891 | sky2_write32(hw, STAT_TX_TIMER_INI, |
| 2892 | sky2_us2clk(hw, ecmd->tx_coalesce_usecs)); |
| 2893 | sky2_write8(hw, STAT_TX_TIMER_CTRL, TIM_START); |
| 2894 | } |
| 2895 | sky2_write16(hw, STAT_TX_IDX_TH, ecmd->tx_max_coalesced_frames); |
| 2896 | |
| 2897 | if (ecmd->rx_coalesce_usecs == 0) |
| 2898 | sky2_write8(hw, STAT_LEV_TIMER_CTRL, TIM_STOP); |
| 2899 | else { |
| 2900 | sky2_write32(hw, STAT_LEV_TIMER_INI, |
| 2901 | sky2_us2clk(hw, ecmd->rx_coalesce_usecs)); |
| 2902 | sky2_write8(hw, STAT_LEV_TIMER_CTRL, TIM_START); |
| 2903 | } |
| 2904 | sky2_write8(hw, STAT_FIFO_WM, ecmd->rx_max_coalesced_frames); |
| 2905 | |
| 2906 | if (ecmd->rx_coalesce_usecs_irq == 0) |
| 2907 | sky2_write8(hw, STAT_ISR_TIMER_CTRL, TIM_STOP); |
| 2908 | else { |
Stephen Hemminger | d28d487 | 2006-01-30 11:37:56 -0800 | [diff] [blame] | 2909 | sky2_write32(hw, STAT_ISR_TIMER_INI, |
Stephen Hemminger | fb17358 | 2005-12-09 11:34:56 -0800 | [diff] [blame] | 2910 | sky2_us2clk(hw, ecmd->rx_coalesce_usecs_irq)); |
| 2911 | sky2_write8(hw, STAT_ISR_TIMER_CTRL, TIM_START); |
| 2912 | } |
| 2913 | sky2_write8(hw, STAT_FIFO_ISR_WM, ecmd->rx_max_coalesced_frames_irq); |
| 2914 | return 0; |
| 2915 | } |
| 2916 | |
Stephen Hemminger | 793b883 | 2005-09-14 16:06:14 -0700 | [diff] [blame] | 2917 | static void sky2_get_ringparam(struct net_device *dev, |
| 2918 | struct ethtool_ringparam *ering) |
| 2919 | { |
| 2920 | struct sky2_port *sky2 = netdev_priv(dev); |
| 2921 | |
| 2922 | ering->rx_max_pending = RX_MAX_PENDING; |
| 2923 | ering->rx_mini_max_pending = 0; |
| 2924 | ering->rx_jumbo_max_pending = 0; |
| 2925 | ering->tx_max_pending = TX_RING_SIZE - 1; |
| 2926 | |
| 2927 | ering->rx_pending = sky2->rx_pending; |
| 2928 | ering->rx_mini_pending = 0; |
| 2929 | ering->rx_jumbo_pending = 0; |
| 2930 | ering->tx_pending = sky2->tx_pending; |
| 2931 | } |
| 2932 | |
| 2933 | static int sky2_set_ringparam(struct net_device *dev, |
| 2934 | struct ethtool_ringparam *ering) |
| 2935 | { |
| 2936 | struct sky2_port *sky2 = netdev_priv(dev); |
| 2937 | int err = 0; |
| 2938 | |
| 2939 | if (ering->rx_pending > RX_MAX_PENDING || |
| 2940 | ering->rx_pending < 8 || |
| 2941 | ering->tx_pending < MAX_SKB_TX_LE || |
| 2942 | ering->tx_pending > TX_RING_SIZE - 1) |
| 2943 | return -EINVAL; |
| 2944 | |
| 2945 | if (netif_running(dev)) |
| 2946 | sky2_down(dev); |
| 2947 | |
| 2948 | sky2->rx_pending = ering->rx_pending; |
| 2949 | sky2->tx_pending = ering->tx_pending; |
| 2950 | |
Stephen Hemminger | 1b53756 | 2005-12-20 15:08:07 -0800 | [diff] [blame] | 2951 | if (netif_running(dev)) { |
Stephen Hemminger | 793b883 | 2005-09-14 16:06:14 -0700 | [diff] [blame] | 2952 | err = sky2_up(dev); |
Stephen Hemminger | 1b53756 | 2005-12-20 15:08:07 -0800 | [diff] [blame] | 2953 | if (err) |
| 2954 | dev_close(dev); |
Stephen Hemminger | 6ed995b | 2005-12-20 15:08:08 -0800 | [diff] [blame] | 2955 | else |
| 2956 | sky2_set_multicast(dev); |
Stephen Hemminger | 1b53756 | 2005-12-20 15:08:07 -0800 | [diff] [blame] | 2957 | } |
Stephen Hemminger | 793b883 | 2005-09-14 16:06:14 -0700 | [diff] [blame] | 2958 | |
| 2959 | return err; |
| 2960 | } |
| 2961 | |
Stephen Hemminger | 793b883 | 2005-09-14 16:06:14 -0700 | [diff] [blame] | 2962 | static int sky2_get_regs_len(struct net_device *dev) |
| 2963 | { |
Stephen Hemminger | 6e4cbb3 | 2005-09-19 15:47:57 -0700 | [diff] [blame] | 2964 | return 0x4000; |
Stephen Hemminger | 793b883 | 2005-09-14 16:06:14 -0700 | [diff] [blame] | 2965 | } |
| 2966 | |
| 2967 | /* |
| 2968 | * Returns copy of control register region |
Stephen Hemminger | 6e4cbb3 | 2005-09-19 15:47:57 -0700 | [diff] [blame] | 2969 | * Note: access to the RAM address register set will cause timeouts. |
Stephen Hemminger | 793b883 | 2005-09-14 16:06:14 -0700 | [diff] [blame] | 2970 | */ |
| 2971 | static void sky2_get_regs(struct net_device *dev, struct ethtool_regs *regs, |
| 2972 | void *p) |
| 2973 | { |
| 2974 | const struct sky2_port *sky2 = netdev_priv(dev); |
Stephen Hemminger | 793b883 | 2005-09-14 16:06:14 -0700 | [diff] [blame] | 2975 | const void __iomem *io = sky2->hw->regs; |
Stephen Hemminger | 793b883 | 2005-09-14 16:06:14 -0700 | [diff] [blame] | 2976 | |
Stephen Hemminger | 6e4cbb3 | 2005-09-19 15:47:57 -0700 | [diff] [blame] | 2977 | BUG_ON(regs->len < B3_RI_WTO_R1); |
Stephen Hemminger | 793b883 | 2005-09-14 16:06:14 -0700 | [diff] [blame] | 2978 | regs->version = 1; |
Stephen Hemminger | 6e4cbb3 | 2005-09-19 15:47:57 -0700 | [diff] [blame] | 2979 | memset(p, 0, regs->len); |
Stephen Hemminger | 793b883 | 2005-09-14 16:06:14 -0700 | [diff] [blame] | 2980 | |
Stephen Hemminger | 6e4cbb3 | 2005-09-19 15:47:57 -0700 | [diff] [blame] | 2981 | memcpy_fromio(p, io, B3_RAM_ADDR); |
| 2982 | |
| 2983 | memcpy_fromio(p + B3_RI_WTO_R1, |
| 2984 | io + B3_RI_WTO_R1, |
| 2985 | regs->len - B3_RI_WTO_R1); |
Stephen Hemminger | 793b883 | 2005-09-14 16:06:14 -0700 | [diff] [blame] | 2986 | } |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 2987 | |
| 2988 | static struct ethtool_ops sky2_ethtool_ops = { |
Stephen Hemminger | 793b883 | 2005-09-14 16:06:14 -0700 | [diff] [blame] | 2989 | .get_settings = sky2_get_settings, |
| 2990 | .set_settings = sky2_set_settings, |
| 2991 | .get_drvinfo = sky2_get_drvinfo, |
| 2992 | .get_msglevel = sky2_get_msglevel, |
| 2993 | .set_msglevel = sky2_set_msglevel, |
Stephen Hemminger | 9a7ae0a | 2005-09-27 15:28:42 -0700 | [diff] [blame] | 2994 | .nway_reset = sky2_nway_reset, |
Stephen Hemminger | 793b883 | 2005-09-14 16:06:14 -0700 | [diff] [blame] | 2995 | .get_regs_len = sky2_get_regs_len, |
| 2996 | .get_regs = sky2_get_regs, |
| 2997 | .get_link = ethtool_op_get_link, |
| 2998 | .get_sg = ethtool_op_get_sg, |
| 2999 | .set_sg = ethtool_op_set_sg, |
| 3000 | .get_tx_csum = ethtool_op_get_tx_csum, |
| 3001 | .set_tx_csum = ethtool_op_set_tx_csum, |
| 3002 | .get_tso = ethtool_op_get_tso, |
| 3003 | .set_tso = ethtool_op_set_tso, |
| 3004 | .get_rx_csum = sky2_get_rx_csum, |
| 3005 | .set_rx_csum = sky2_set_rx_csum, |
| 3006 | .get_strings = sky2_get_strings, |
Stephen Hemminger | fb17358 | 2005-12-09 11:34:56 -0800 | [diff] [blame] | 3007 | .get_coalesce = sky2_get_coalesce, |
| 3008 | .set_coalesce = sky2_set_coalesce, |
Stephen Hemminger | 793b883 | 2005-09-14 16:06:14 -0700 | [diff] [blame] | 3009 | .get_ringparam = sky2_get_ringparam, |
| 3010 | .set_ringparam = sky2_set_ringparam, |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 3011 | .get_pauseparam = sky2_get_pauseparam, |
| 3012 | .set_pauseparam = sky2_set_pauseparam, |
| 3013 | #ifdef CONFIG_PM |
Stephen Hemminger | 793b883 | 2005-09-14 16:06:14 -0700 | [diff] [blame] | 3014 | .get_wol = sky2_get_wol, |
| 3015 | .set_wol = sky2_set_wol, |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 3016 | #endif |
Stephen Hemminger | 793b883 | 2005-09-14 16:06:14 -0700 | [diff] [blame] | 3017 | .phys_id = sky2_phys_id, |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 3018 | .get_stats_count = sky2_get_stats_count, |
| 3019 | .get_ethtool_stats = sky2_get_ethtool_stats, |
Stephen Hemminger | 2995bfb | 2005-09-28 10:01:03 -0700 | [diff] [blame] | 3020 | .get_perm_addr = ethtool_op_get_perm_addr, |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 3021 | }; |
| 3022 | |
| 3023 | /* Initialize network device */ |
| 3024 | static __devinit struct net_device *sky2_init_netdev(struct sky2_hw *hw, |
| 3025 | unsigned port, int highmem) |
| 3026 | { |
| 3027 | struct sky2_port *sky2; |
| 3028 | struct net_device *dev = alloc_etherdev(sizeof(*sky2)); |
| 3029 | |
| 3030 | if (!dev) { |
| 3031 | printk(KERN_ERR "sky2 etherdev alloc failed"); |
| 3032 | return NULL; |
| 3033 | } |
| 3034 | |
| 3035 | SET_MODULE_OWNER(dev); |
| 3036 | SET_NETDEV_DEV(dev, &hw->pdev->dev); |
shemminger@osdl.org | ef743d3 | 2005-11-30 11:45:12 -0800 | [diff] [blame] | 3037 | dev->irq = hw->pdev->irq; |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 3038 | dev->open = sky2_up; |
| 3039 | dev->stop = sky2_down; |
shemminger@osdl.org | ef743d3 | 2005-11-30 11:45:12 -0800 | [diff] [blame] | 3040 | dev->do_ioctl = sky2_ioctl; |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 3041 | dev->hard_start_xmit = sky2_xmit_frame; |
| 3042 | dev->get_stats = sky2_get_stats; |
| 3043 | dev->set_multicast_list = sky2_set_multicast; |
| 3044 | dev->set_mac_address = sky2_set_mac_address; |
| 3045 | dev->change_mtu = sky2_change_mtu; |
| 3046 | SET_ETHTOOL_OPS(dev, &sky2_ethtool_ops); |
| 3047 | dev->tx_timeout = sky2_tx_timeout; |
| 3048 | dev->watchdog_timeo = TX_WATCHDOG; |
| 3049 | if (port == 0) |
| 3050 | dev->poll = sky2_poll; |
| 3051 | dev->weight = NAPI_WEIGHT; |
| 3052 | #ifdef CONFIG_NET_POLL_CONTROLLER |
| 3053 | dev->poll_controller = sky2_netpoll; |
| 3054 | #endif |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 3055 | |
| 3056 | sky2 = netdev_priv(dev); |
| 3057 | sky2->netdev = dev; |
| 3058 | sky2->hw = hw; |
| 3059 | sky2->msg_enable = netif_msg_init(debug, default_msg); |
| 3060 | |
| 3061 | spin_lock_init(&sky2->tx_lock); |
| 3062 | /* Auto speed and flow control */ |
| 3063 | sky2->autoneg = AUTONEG_ENABLE; |
Stephen Hemminger | 585b5601 | 2005-12-09 11:35:10 -0800 | [diff] [blame] | 3064 | sky2->tx_pause = 1; |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 3065 | sky2->rx_pause = 1; |
| 3066 | sky2->duplex = -1; |
| 3067 | sky2->speed = -1; |
| 3068 | sky2->advertising = sky2_supported_modes(hw); |
Stephen Hemminger | 75d070c | 2005-12-09 11:35:11 -0800 | [diff] [blame] | 3069 | |
| 3070 | /* Receive checksum disabled for Yukon XL |
| 3071 | * because of observed problems with incorrect |
| 3072 | * values when multiple packets are received in one interrupt |
| 3073 | */ |
| 3074 | sky2->rx_csum = (hw->chip_id != CHIP_ID_YUKON_XL); |
| 3075 | |
Stephen Hemminger | 91c86df | 2005-12-09 11:34:57 -0800 | [diff] [blame] | 3076 | INIT_WORK(&sky2->phy_task, sky2_phy_task, sky2); |
| 3077 | init_MUTEX(&sky2->phy_sema); |
Stephen Hemminger | 793b883 | 2005-09-14 16:06:14 -0700 | [diff] [blame] | 3078 | sky2->tx_pending = TX_DEF_PENDING; |
| 3079 | sky2->rx_pending = is_ec_a1(hw) ? 8 : RX_DEF_PENDING; |
Stephen Hemminger | 734d186 | 2005-12-09 11:35:00 -0800 | [diff] [blame] | 3080 | sky2->rx_bufsize = sky2_buf_size(ETH_DATA_LEN); |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 3081 | |
| 3082 | hw->dev[port] = dev; |
| 3083 | |
| 3084 | sky2->port = port; |
| 3085 | |
shemminger@osdl.org | 5a5b1ea | 2005-11-30 11:45:15 -0800 | [diff] [blame] | 3086 | dev->features |= NETIF_F_LLTX; |
| 3087 | if (hw->chip_id != CHIP_ID_YUKON_EC_U) |
| 3088 | dev->features |= NETIF_F_TSO; |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 3089 | if (highmem) |
| 3090 | dev->features |= NETIF_F_HIGHDMA; |
Stephen Hemminger | 793b883 | 2005-09-14 16:06:14 -0700 | [diff] [blame] | 3091 | dev->features |= NETIF_F_IP_CSUM | NETIF_F_SG; |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 3092 | |
shemminger@osdl.org | d1f1370 | 2005-09-27 15:02:57 -0700 | [diff] [blame] | 3093 | #ifdef SKY2_VLAN_TAG_USED |
| 3094 | dev->features |= NETIF_F_HW_VLAN_TX | NETIF_F_HW_VLAN_RX; |
| 3095 | dev->vlan_rx_register = sky2_vlan_rx_register; |
| 3096 | dev->vlan_rx_kill_vid = sky2_vlan_rx_kill_vid; |
| 3097 | #endif |
| 3098 | |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 3099 | /* read the mac address */ |
Stephen Hemminger | 793b883 | 2005-09-14 16:06:14 -0700 | [diff] [blame] | 3100 | memcpy_fromio(dev->dev_addr, hw->regs + B2_MAC_1 + port * 8, ETH_ALEN); |
Stephen Hemminger | 2995bfb | 2005-09-28 10:01:03 -0700 | [diff] [blame] | 3101 | memcpy(dev->perm_addr, dev->dev_addr, dev->addr_len); |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 3102 | |
| 3103 | /* device is off until link detection */ |
| 3104 | netif_carrier_off(dev); |
| 3105 | netif_stop_queue(dev); |
| 3106 | |
| 3107 | return dev; |
| 3108 | } |
| 3109 | |
Stephen Hemminger | 28bd181 | 2006-01-17 13:43:19 -0800 | [diff] [blame] | 3110 | static void __devinit sky2_show_addr(struct net_device *dev) |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 3111 | { |
| 3112 | const struct sky2_port *sky2 = netdev_priv(dev); |
| 3113 | |
| 3114 | if (netif_msg_probe(sky2)) |
| 3115 | printk(KERN_INFO PFX "%s: addr %02x:%02x:%02x:%02x:%02x:%02x\n", |
| 3116 | dev->name, |
| 3117 | dev->dev_addr[0], dev->dev_addr[1], dev->dev_addr[2], |
| 3118 | dev->dev_addr[3], dev->dev_addr[4], dev->dev_addr[5]); |
| 3119 | } |
| 3120 | |
Stephen Hemminger | 4d52b48 | 2006-01-30 11:38:00 -0800 | [diff] [blame] | 3121 | /* Handle software interrupt used during MSI test */ |
| 3122 | static irqreturn_t __devinit sky2_test_intr(int irq, void *dev_id, |
| 3123 | struct pt_regs *regs) |
| 3124 | { |
| 3125 | struct sky2_hw *hw = dev_id; |
| 3126 | u32 status = sky2_read32(hw, B0_Y2_SP_ISRC2); |
| 3127 | |
| 3128 | if (status == 0) |
| 3129 | return IRQ_NONE; |
| 3130 | |
| 3131 | if (status & Y2_IS_IRQ_SW) { |
| 3132 | sky2_write8(hw, B0_CTST, CS_CL_SW_IRQ); |
| 3133 | hw->msi = 1; |
| 3134 | } |
| 3135 | sky2_write32(hw, B0_Y2_SP_ICR, 2); |
| 3136 | |
| 3137 | sky2_read32(hw, B0_IMSK); |
| 3138 | return IRQ_HANDLED; |
| 3139 | } |
| 3140 | |
| 3141 | /* Test interrupt path by forcing a a software IRQ */ |
| 3142 | static int __devinit sky2_test_msi(struct sky2_hw *hw) |
| 3143 | { |
| 3144 | struct pci_dev *pdev = hw->pdev; |
| 3145 | int i, err; |
| 3146 | |
| 3147 | sky2_write32(hw, B0_IMSK, Y2_IS_IRQ_SW); |
| 3148 | |
| 3149 | err = request_irq(pdev->irq, sky2_test_intr, SA_SHIRQ, DRV_NAME, hw); |
| 3150 | if (err) { |
| 3151 | printk(KERN_ERR PFX "%s: cannot assign irq %d\n", |
| 3152 | pci_name(pdev), pdev->irq); |
| 3153 | return err; |
| 3154 | } |
| 3155 | |
| 3156 | sky2_write8(hw, B0_CTST, CS_ST_SW_IRQ); |
| 3157 | wmb(); |
| 3158 | |
| 3159 | for (i = 0; i < 10; i++) { |
| 3160 | barrier(); |
| 3161 | if (hw->msi) |
| 3162 | goto found; |
| 3163 | mdelay(1); |
| 3164 | } |
| 3165 | |
| 3166 | err = -EOPNOTSUPP; |
| 3167 | sky2_write8(hw, B0_CTST, CS_CL_SW_IRQ); |
| 3168 | found: |
| 3169 | sky2_write32(hw, B0_IMSK, 0); |
| 3170 | |
| 3171 | free_irq(pdev->irq, hw); |
| 3172 | |
| 3173 | return err; |
| 3174 | } |
| 3175 | |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 3176 | static int __devinit sky2_probe(struct pci_dev *pdev, |
| 3177 | const struct pci_device_id *ent) |
| 3178 | { |
Stephen Hemminger | 793b883 | 2005-09-14 16:06:14 -0700 | [diff] [blame] | 3179 | struct net_device *dev, *dev1 = NULL; |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 3180 | struct sky2_hw *hw; |
shemminger@osdl.org | 5afa0a9 | 2005-09-27 15:03:00 -0700 | [diff] [blame] | 3181 | int err, pm_cap, using_dac = 0; |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 3182 | |
Stephen Hemminger | 793b883 | 2005-09-14 16:06:14 -0700 | [diff] [blame] | 3183 | err = pci_enable_device(pdev); |
| 3184 | if (err) { |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 3185 | printk(KERN_ERR PFX "%s cannot enable PCI device\n", |
| 3186 | pci_name(pdev)); |
| 3187 | goto err_out; |
| 3188 | } |
| 3189 | |
Stephen Hemminger | 793b883 | 2005-09-14 16:06:14 -0700 | [diff] [blame] | 3190 | err = pci_request_regions(pdev, DRV_NAME); |
| 3191 | if (err) { |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 3192 | printk(KERN_ERR PFX "%s cannot obtain PCI resources\n", |
| 3193 | pci_name(pdev)); |
Stephen Hemminger | 793b883 | 2005-09-14 16:06:14 -0700 | [diff] [blame] | 3194 | goto err_out; |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 3195 | } |
| 3196 | |
| 3197 | pci_set_master(pdev); |
| 3198 | |
shemminger@osdl.org | 5afa0a9 | 2005-09-27 15:03:00 -0700 | [diff] [blame] | 3199 | /* Find power-management capability. */ |
| 3200 | pm_cap = pci_find_capability(pdev, PCI_CAP_ID_PM); |
| 3201 | if (pm_cap == 0) { |
| 3202 | printk(KERN_ERR PFX "Cannot find PowerManagement capability, " |
| 3203 | "aborting.\n"); |
| 3204 | err = -EIO; |
| 3205 | goto err_out_free_regions; |
| 3206 | } |
| 3207 | |
Stephen Hemminger | d1f3d4d | 2006-01-17 13:43:11 -0800 | [diff] [blame] | 3208 | if (sizeof(dma_addr_t) > sizeof(u32) && |
| 3209 | !(err = pci_set_dma_mask(pdev, DMA_64BIT_MASK))) { |
| 3210 | using_dac = 1; |
| 3211 | err = pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK); |
| 3212 | if (err < 0) { |
| 3213 | printk(KERN_ERR PFX "%s unable to obtain 64 bit DMA " |
| 3214 | "for consistent allocations\n", pci_name(pdev)); |
| 3215 | goto err_out_free_regions; |
| 3216 | } |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 3217 | |
Stephen Hemminger | d1f3d4d | 2006-01-17 13:43:11 -0800 | [diff] [blame] | 3218 | } else { |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 3219 | err = pci_set_dma_mask(pdev, DMA_32BIT_MASK); |
| 3220 | if (err) { |
| 3221 | printk(KERN_ERR PFX "%s no usable DMA configuration\n", |
| 3222 | pci_name(pdev)); |
| 3223 | goto err_out_free_regions; |
| 3224 | } |
| 3225 | } |
Stephen Hemminger | d1f3d4d | 2006-01-17 13:43:11 -0800 | [diff] [blame] | 3226 | |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 3227 | err = -ENOMEM; |
Stephen Hemminger | 6aad85d | 2006-01-17 13:43:18 -0800 | [diff] [blame] | 3228 | hw = kzalloc(sizeof(*hw), GFP_KERNEL); |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 3229 | if (!hw) { |
| 3230 | printk(KERN_ERR PFX "%s: cannot allocate hardware struct\n", |
| 3231 | pci_name(pdev)); |
| 3232 | goto err_out_free_regions; |
| 3233 | } |
| 3234 | |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 3235 | hw->pdev = pdev; |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 3236 | |
| 3237 | hw->regs = ioremap_nocache(pci_resource_start(pdev, 0), 0x4000); |
| 3238 | if (!hw->regs) { |
| 3239 | printk(KERN_ERR PFX "%s: cannot map device registers\n", |
| 3240 | pci_name(pdev)); |
| 3241 | goto err_out_free_hw; |
| 3242 | } |
shemminger@osdl.org | 5afa0a9 | 2005-09-27 15:03:00 -0700 | [diff] [blame] | 3243 | hw->pm_cap = pm_cap; |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 3244 | |
Stephen Hemminger | 56a645c | 2006-02-22 11:45:02 -0800 | [diff] [blame^] | 3245 | #ifdef __BIG_ENDIAN |
| 3246 | /* byte swap descriptors in hardware */ |
| 3247 | { |
| 3248 | u32 reg; |
| 3249 | |
| 3250 | reg = sky2_pci_read32(hw, PCI_DEV_REG2); |
| 3251 | reg |= PCI_REV_DESC; |
| 3252 | sky2_pci_write32(hw, PCI_DEV_REG2, reg); |
| 3253 | } |
| 3254 | #endif |
| 3255 | |
Stephen Hemminger | 08c06d8 | 2006-01-30 11:37:54 -0800 | [diff] [blame] | 3256 | /* ring for status responses */ |
| 3257 | hw->st_le = pci_alloc_consistent(hw->pdev, STATUS_LE_BYTES, |
| 3258 | &hw->st_dma); |
| 3259 | if (!hw->st_le) |
| 3260 | goto err_out_iounmap; |
| 3261 | |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 3262 | err = sky2_reset(hw); |
| 3263 | if (err) |
Stephen Hemminger | 793b883 | 2005-09-14 16:06:14 -0700 | [diff] [blame] | 3264 | goto err_out_iounmap; |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 3265 | |
shemminger@osdl.org | 5f4f9dc | 2005-11-30 11:45:23 -0800 | [diff] [blame] | 3266 | printk(KERN_INFO PFX "v%s addr 0x%lx irq %d Yukon-%s (0x%x) rev %d\n", |
| 3267 | DRV_VERSION, pci_resource_start(pdev, 0), pdev->irq, |
Stephen Hemminger | 92f965e | 2005-12-09 11:34:53 -0800 | [diff] [blame] | 3268 | yukon2_name[hw->chip_id - CHIP_ID_YUKON_XL], |
Stephen Hemminger | 793b883 | 2005-09-14 16:06:14 -0700 | [diff] [blame] | 3269 | hw->chip_id, hw->chip_rev); |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 3270 | |
Stephen Hemminger | 793b883 | 2005-09-14 16:06:14 -0700 | [diff] [blame] | 3271 | dev = sky2_init_netdev(hw, 0, using_dac); |
| 3272 | if (!dev) |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 3273 | goto err_out_free_pci; |
| 3274 | |
Stephen Hemminger | 793b883 | 2005-09-14 16:06:14 -0700 | [diff] [blame] | 3275 | err = register_netdev(dev); |
| 3276 | if (err) { |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 3277 | printk(KERN_ERR PFX "%s: cannot register net device\n", |
| 3278 | pci_name(pdev)); |
| 3279 | goto err_out_free_netdev; |
| 3280 | } |
| 3281 | |
| 3282 | sky2_show_addr(dev); |
| 3283 | |
| 3284 | if (hw->ports > 1 && (dev1 = sky2_init_netdev(hw, 1, using_dac))) { |
| 3285 | if (register_netdev(dev1) == 0) |
| 3286 | sky2_show_addr(dev1); |
| 3287 | else { |
| 3288 | /* Failure to register second port need not be fatal */ |
Stephen Hemminger | 793b883 | 2005-09-14 16:06:14 -0700 | [diff] [blame] | 3289 | printk(KERN_WARNING PFX |
| 3290 | "register of second port failed\n"); |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 3291 | hw->dev[1] = NULL; |
| 3292 | free_netdev(dev1); |
| 3293 | } |
| 3294 | } |
| 3295 | |
Stephen Hemminger | 4d52b48 | 2006-01-30 11:38:00 -0800 | [diff] [blame] | 3296 | if (!disable_msi && pci_enable_msi(pdev) == 0) { |
| 3297 | err = sky2_test_msi(hw); |
| 3298 | if (err == -EOPNOTSUPP) { |
| 3299 | /* MSI test failed, go back to INTx mode */ |
| 3300 | printk(KERN_WARNING PFX "%s: No interrupt was generated using MSI, " |
| 3301 | "switching to INTx mode. Please report this failure to " |
| 3302 | "the PCI maintainer and include system chipset information.\n", |
| 3303 | pci_name(pdev)); |
| 3304 | pci_disable_msi(pdev); |
| 3305 | } |
| 3306 | else if (err) |
| 3307 | goto err_out_unregister; |
| 3308 | } |
| 3309 | |
Stephen Hemminger | db992c9 | 2006-01-30 11:37:59 -0800 | [diff] [blame] | 3310 | err = request_irq(pdev->irq, sky2_intr, SA_SHIRQ | SA_SAMPLE_RANDOM, |
| 3311 | DRV_NAME, hw); |
Stephen Hemminger | 793b883 | 2005-09-14 16:06:14 -0700 | [diff] [blame] | 3312 | if (err) { |
| 3313 | printk(KERN_ERR PFX "%s: cannot assign irq %d\n", |
| 3314 | pci_name(pdev), pdev->irq); |
| 3315 | goto err_out_unregister; |
| 3316 | } |
| 3317 | |
| 3318 | hw->intr_mask = Y2_IS_BASE; |
| 3319 | sky2_write32(hw, B0_IMSK, hw->intr_mask); |
| 3320 | |
| 3321 | pci_set_drvdata(pdev, hw); |
| 3322 | |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 3323 | return 0; |
| 3324 | |
Stephen Hemminger | 793b883 | 2005-09-14 16:06:14 -0700 | [diff] [blame] | 3325 | err_out_unregister: |
Stephen Hemminger | 4d52b48 | 2006-01-30 11:38:00 -0800 | [diff] [blame] | 3326 | if (hw->msi) |
| 3327 | pci_disable_msi(pdev); |
Stephen Hemminger | 793b883 | 2005-09-14 16:06:14 -0700 | [diff] [blame] | 3328 | if (dev1) { |
| 3329 | unregister_netdev(dev1); |
| 3330 | free_netdev(dev1); |
| 3331 | } |
| 3332 | unregister_netdev(dev); |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 3333 | err_out_free_netdev: |
| 3334 | free_netdev(dev); |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 3335 | err_out_free_pci: |
Stephen Hemminger | 793b883 | 2005-09-14 16:06:14 -0700 | [diff] [blame] | 3336 | sky2_write8(hw, B0_CTST, CS_RST_SET); |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 3337 | pci_free_consistent(hw->pdev, STATUS_LE_BYTES, hw->st_le, hw->st_dma); |
| 3338 | err_out_iounmap: |
| 3339 | iounmap(hw->regs); |
| 3340 | err_out_free_hw: |
| 3341 | kfree(hw); |
| 3342 | err_out_free_regions: |
| 3343 | pci_release_regions(pdev); |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 3344 | pci_disable_device(pdev); |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 3345 | err_out: |
| 3346 | return err; |
| 3347 | } |
| 3348 | |
| 3349 | static void __devexit sky2_remove(struct pci_dev *pdev) |
| 3350 | { |
Stephen Hemminger | 793b883 | 2005-09-14 16:06:14 -0700 | [diff] [blame] | 3351 | struct sky2_hw *hw = pci_get_drvdata(pdev); |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 3352 | struct net_device *dev0, *dev1; |
| 3353 | |
Stephen Hemminger | 793b883 | 2005-09-14 16:06:14 -0700 | [diff] [blame] | 3354 | if (!hw) |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 3355 | return; |
| 3356 | |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 3357 | dev0 = hw->dev[0]; |
Stephen Hemminger | 793b883 | 2005-09-14 16:06:14 -0700 | [diff] [blame] | 3358 | dev1 = hw->dev[1]; |
| 3359 | if (dev1) |
| 3360 | unregister_netdev(dev1); |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 3361 | unregister_netdev(dev0); |
| 3362 | |
Stephen Hemminger | 793b883 | 2005-09-14 16:06:14 -0700 | [diff] [blame] | 3363 | sky2_write32(hw, B0_IMSK, 0); |
shemminger@osdl.org | 5afa0a9 | 2005-09-27 15:03:00 -0700 | [diff] [blame] | 3364 | sky2_set_power_state(hw, PCI_D3hot); |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 3365 | sky2_write16(hw, B0_Y2LED, LED_STAT_OFF); |
Stephen Hemminger | 793b883 | 2005-09-14 16:06:14 -0700 | [diff] [blame] | 3366 | sky2_write8(hw, B0_CTST, CS_RST_SET); |
shemminger@osdl.org | 5afa0a9 | 2005-09-27 15:03:00 -0700 | [diff] [blame] | 3367 | sky2_read8(hw, B0_CTST); |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 3368 | |
| 3369 | free_irq(pdev->irq, hw); |
Stephen Hemminger | 4d52b48 | 2006-01-30 11:38:00 -0800 | [diff] [blame] | 3370 | if (hw->msi) |
| 3371 | pci_disable_msi(pdev); |
Stephen Hemminger | 793b883 | 2005-09-14 16:06:14 -0700 | [diff] [blame] | 3372 | pci_free_consistent(pdev, STATUS_LE_BYTES, hw->st_le, hw->st_dma); |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 3373 | pci_release_regions(pdev); |
| 3374 | pci_disable_device(pdev); |
Stephen Hemminger | 793b883 | 2005-09-14 16:06:14 -0700 | [diff] [blame] | 3375 | |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 3376 | if (dev1) |
| 3377 | free_netdev(dev1); |
| 3378 | free_netdev(dev0); |
| 3379 | iounmap(hw->regs); |
| 3380 | kfree(hw); |
shemminger@osdl.org | 5afa0a9 | 2005-09-27 15:03:00 -0700 | [diff] [blame] | 3381 | |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 3382 | pci_set_drvdata(pdev, NULL); |
| 3383 | } |
| 3384 | |
| 3385 | #ifdef CONFIG_PM |
| 3386 | static int sky2_suspend(struct pci_dev *pdev, pm_message_t state) |
| 3387 | { |
Stephen Hemminger | 793b883 | 2005-09-14 16:06:14 -0700 | [diff] [blame] | 3388 | struct sky2_hw *hw = pci_get_drvdata(pdev); |
shemminger@osdl.org | 5afa0a9 | 2005-09-27 15:03:00 -0700 | [diff] [blame] | 3389 | int i; |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 3390 | |
| 3391 | for (i = 0; i < 2; i++) { |
| 3392 | struct net_device *dev = hw->dev[i]; |
| 3393 | |
| 3394 | if (dev) { |
shemminger@osdl.org | 5afa0a9 | 2005-09-27 15:03:00 -0700 | [diff] [blame] | 3395 | if (!netif_running(dev)) |
| 3396 | continue; |
| 3397 | |
| 3398 | sky2_down(dev); |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 3399 | netif_device_detach(dev); |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 3400 | } |
| 3401 | } |
| 3402 | |
shemminger@osdl.org | 5afa0a9 | 2005-09-27 15:03:00 -0700 | [diff] [blame] | 3403 | return sky2_set_power_state(hw, pci_choose_state(pdev, state)); |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 3404 | } |
| 3405 | |
| 3406 | static int sky2_resume(struct pci_dev *pdev) |
| 3407 | { |
Stephen Hemminger | 793b883 | 2005-09-14 16:06:14 -0700 | [diff] [blame] | 3408 | struct sky2_hw *hw = pci_get_drvdata(pdev); |
Stephen Hemminger | 08c06d8 | 2006-01-30 11:37:54 -0800 | [diff] [blame] | 3409 | int i, err; |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 3410 | |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 3411 | pci_restore_state(pdev); |
| 3412 | pci_enable_wake(pdev, PCI_D0, 0); |
Stephen Hemminger | 08c06d8 | 2006-01-30 11:37:54 -0800 | [diff] [blame] | 3413 | err = sky2_set_power_state(hw, PCI_D0); |
| 3414 | if (err) |
| 3415 | goto out; |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 3416 | |
Stephen Hemminger | 08c06d8 | 2006-01-30 11:37:54 -0800 | [diff] [blame] | 3417 | err = sky2_reset(hw); |
| 3418 | if (err) |
| 3419 | goto out; |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 3420 | |
| 3421 | for (i = 0; i < 2; i++) { |
| 3422 | struct net_device *dev = hw->dev[i]; |
Stephen Hemminger | 08c06d8 | 2006-01-30 11:37:54 -0800 | [diff] [blame] | 3423 | if (dev && netif_running(dev)) { |
| 3424 | netif_device_attach(dev); |
| 3425 | err = sky2_up(dev); |
| 3426 | if (err) { |
| 3427 | printk(KERN_ERR PFX "%s: could not up: %d\n", |
| 3428 | dev->name, err); |
| 3429 | dev_close(dev); |
| 3430 | break; |
shemminger@osdl.org | 5afa0a9 | 2005-09-27 15:03:00 -0700 | [diff] [blame] | 3431 | } |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 3432 | } |
| 3433 | } |
Stephen Hemminger | 08c06d8 | 2006-01-30 11:37:54 -0800 | [diff] [blame] | 3434 | out: |
| 3435 | return err; |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 3436 | } |
| 3437 | #endif |
| 3438 | |
| 3439 | static struct pci_driver sky2_driver = { |
Stephen Hemminger | 793b883 | 2005-09-14 16:06:14 -0700 | [diff] [blame] | 3440 | .name = DRV_NAME, |
| 3441 | .id_table = sky2_id_table, |
| 3442 | .probe = sky2_probe, |
| 3443 | .remove = __devexit_p(sky2_remove), |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 3444 | #ifdef CONFIG_PM |
Stephen Hemminger | 793b883 | 2005-09-14 16:06:14 -0700 | [diff] [blame] | 3445 | .suspend = sky2_suspend, |
| 3446 | .resume = sky2_resume, |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 3447 | #endif |
| 3448 | }; |
| 3449 | |
| 3450 | static int __init sky2_init_module(void) |
| 3451 | { |
shemminger@osdl.org | 50241c4 | 2005-11-30 11:45:22 -0800 | [diff] [blame] | 3452 | return pci_register_driver(&sky2_driver); |
Stephen Hemminger | cd28ab6 | 2005-08-16 16:36:49 -0700 | [diff] [blame] | 3453 | } |
| 3454 | |
| 3455 | static void __exit sky2_cleanup_module(void) |
| 3456 | { |
| 3457 | pci_unregister_driver(&sky2_driver); |
| 3458 | } |
| 3459 | |
| 3460 | module_init(sky2_init_module); |
| 3461 | module_exit(sky2_cleanup_module); |
| 3462 | |
| 3463 | MODULE_DESCRIPTION("Marvell Yukon 2 Gigabit Ethernet driver"); |
| 3464 | MODULE_AUTHOR("Stephen Hemminger <shemminger@osdl.org>"); |
| 3465 | MODULE_LICENSE("GPL"); |
shemminger@osdl.org | 5f4f9dc | 2005-11-30 11:45:23 -0800 | [diff] [blame] | 3466 | MODULE_VERSION(DRV_VERSION); |