Ben Gamari | 2017263 | 2009-02-17 20:08:50 -0500 | [diff] [blame] | 1 | /* |
| 2 | * Copyright © 2008 Intel Corporation |
| 3 | * |
| 4 | * Permission is hereby granted, free of charge, to any person obtaining a |
| 5 | * copy of this software and associated documentation files (the "Software"), |
| 6 | * to deal in the Software without restriction, including without limitation |
| 7 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, |
| 8 | * and/or sell copies of the Software, and to permit persons to whom the |
| 9 | * Software is furnished to do so, subject to the following conditions: |
| 10 | * |
| 11 | * The above copyright notice and this permission notice (including the next |
| 12 | * paragraph) shall be included in all copies or substantial portions of the |
| 13 | * Software. |
| 14 | * |
| 15 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
| 16 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
| 17 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL |
| 18 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER |
| 19 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING |
| 20 | * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS |
| 21 | * IN THE SOFTWARE. |
| 22 | * |
| 23 | * Authors: |
| 24 | * Eric Anholt <eric@anholt.net> |
| 25 | * Keith Packard <keithp@keithp.com> |
| 26 | * |
| 27 | */ |
| 28 | |
| 29 | #include <linux/seq_file.h> |
Chris Wilson | f3cd474 | 2009-10-13 22:20:20 +0100 | [diff] [blame] | 30 | #include <linux/debugfs.h> |
Tejun Heo | 5a0e3ad | 2010-03-24 17:04:11 +0900 | [diff] [blame] | 31 | #include <linux/slab.h> |
Paul Gortmaker | 2d1a8a4 | 2011-08-30 18:16:33 -0400 | [diff] [blame] | 32 | #include <linux/export.h> |
Ben Gamari | 2017263 | 2009-02-17 20:08:50 -0500 | [diff] [blame] | 33 | #include "drmP.h" |
| 34 | #include "drm.h" |
Simon Farnsworth | 4e5359c | 2010-09-01 17:47:52 +0100 | [diff] [blame] | 35 | #include "intel_drv.h" |
Chris Wilson | e5c6526 | 2010-11-01 11:35:28 +0000 | [diff] [blame] | 36 | #include "intel_ringbuffer.h" |
Ben Gamari | 2017263 | 2009-02-17 20:08:50 -0500 | [diff] [blame] | 37 | #include "i915_drm.h" |
| 38 | #include "i915_drv.h" |
| 39 | |
| 40 | #define DRM_I915_RING_DEBUG 1 |
| 41 | |
| 42 | |
| 43 | #if defined(CONFIG_DEBUG_FS) |
| 44 | |
Chris Wilson | f13d3f7 | 2010-09-20 17:36:15 +0100 | [diff] [blame] | 45 | enum { |
Chris Wilson | 69dc498 | 2010-10-19 10:36:51 +0100 | [diff] [blame] | 46 | ACTIVE_LIST, |
Chris Wilson | f13d3f7 | 2010-09-20 17:36:15 +0100 | [diff] [blame] | 47 | FLUSHING_LIST, |
| 48 | INACTIVE_LIST, |
Chris Wilson | d21d597 | 2010-09-26 11:19:33 +0100 | [diff] [blame] | 49 | PINNED_LIST, |
Chris Wilson | f13d3f7 | 2010-09-20 17:36:15 +0100 | [diff] [blame] | 50 | }; |
Ben Gamari | 433e12f | 2009-02-17 20:08:51 -0500 | [diff] [blame] | 51 | |
Chris Wilson | 70d39fe | 2010-08-25 16:03:34 +0100 | [diff] [blame] | 52 | static const char *yesno(int v) |
| 53 | { |
| 54 | return v ? "yes" : "no"; |
| 55 | } |
| 56 | |
| 57 | static int i915_capabilities(struct seq_file *m, void *data) |
| 58 | { |
| 59 | struct drm_info_node *node = (struct drm_info_node *) m->private; |
| 60 | struct drm_device *dev = node->minor->dev; |
| 61 | const struct intel_device_info *info = INTEL_INFO(dev); |
| 62 | |
| 63 | seq_printf(m, "gen: %d\n", info->gen); |
Paulo Zanoni | 03d00ac | 2011-10-14 18:17:41 -0300 | [diff] [blame] | 64 | seq_printf(m, "pch: %d\n", INTEL_PCH_TYPE(dev)); |
Chris Wilson | 70d39fe | 2010-08-25 16:03:34 +0100 | [diff] [blame] | 65 | #define B(x) seq_printf(m, #x ": %s\n", yesno(info->x)) |
| 66 | B(is_mobile); |
Chris Wilson | 70d39fe | 2010-08-25 16:03:34 +0100 | [diff] [blame] | 67 | B(is_i85x); |
| 68 | B(is_i915g); |
Chris Wilson | 70d39fe | 2010-08-25 16:03:34 +0100 | [diff] [blame] | 69 | B(is_i945gm); |
Chris Wilson | 70d39fe | 2010-08-25 16:03:34 +0100 | [diff] [blame] | 70 | B(is_g33); |
| 71 | B(need_gfx_hws); |
| 72 | B(is_g4x); |
| 73 | B(is_pineview); |
| 74 | B(is_broadwater); |
| 75 | B(is_crestline); |
Chris Wilson | 70d39fe | 2010-08-25 16:03:34 +0100 | [diff] [blame] | 76 | B(has_fbc); |
Chris Wilson | 70d39fe | 2010-08-25 16:03:34 +0100 | [diff] [blame] | 77 | B(has_pipe_cxsr); |
| 78 | B(has_hotplug); |
| 79 | B(cursor_needs_physical); |
| 80 | B(has_overlay); |
| 81 | B(overlay_needs_physical); |
Chris Wilson | a6c45cf | 2010-09-17 00:32:17 +0100 | [diff] [blame] | 82 | B(supports_tv); |
Chris Wilson | 549f736 | 2010-10-19 11:19:32 +0100 | [diff] [blame] | 83 | B(has_bsd_ring); |
| 84 | B(has_blt_ring); |
Eugeni Dodonov | 3d29b84 | 2012-01-17 14:43:53 -0200 | [diff] [blame] | 85 | B(has_llc); |
Chris Wilson | 70d39fe | 2010-08-25 16:03:34 +0100 | [diff] [blame] | 86 | #undef B |
| 87 | |
| 88 | return 0; |
| 89 | } |
Ben Gamari | 433e12f | 2009-02-17 20:08:51 -0500 | [diff] [blame] | 90 | |
Chris Wilson | 05394f3 | 2010-11-08 19:18:58 +0000 | [diff] [blame] | 91 | static const char *get_pin_flag(struct drm_i915_gem_object *obj) |
Chris Wilson | a6172a8 | 2009-02-11 14:26:38 +0000 | [diff] [blame] | 92 | { |
Chris Wilson | 05394f3 | 2010-11-08 19:18:58 +0000 | [diff] [blame] | 93 | if (obj->user_pin_count > 0) |
Chris Wilson | a6172a8 | 2009-02-11 14:26:38 +0000 | [diff] [blame] | 94 | return "P"; |
Chris Wilson | 05394f3 | 2010-11-08 19:18:58 +0000 | [diff] [blame] | 95 | else if (obj->pin_count > 0) |
Chris Wilson | a6172a8 | 2009-02-11 14:26:38 +0000 | [diff] [blame] | 96 | return "p"; |
| 97 | else |
| 98 | return " "; |
| 99 | } |
| 100 | |
Chris Wilson | 05394f3 | 2010-11-08 19:18:58 +0000 | [diff] [blame] | 101 | static const char *get_tiling_flag(struct drm_i915_gem_object *obj) |
Chris Wilson | a6172a8 | 2009-02-11 14:26:38 +0000 | [diff] [blame] | 102 | { |
Akshay Joshi | 0206e35 | 2011-08-16 15:34:10 -0400 | [diff] [blame] | 103 | switch (obj->tiling_mode) { |
| 104 | default: |
| 105 | case I915_TILING_NONE: return " "; |
| 106 | case I915_TILING_X: return "X"; |
| 107 | case I915_TILING_Y: return "Y"; |
| 108 | } |
Chris Wilson | a6172a8 | 2009-02-11 14:26:38 +0000 | [diff] [blame] | 109 | } |
| 110 | |
Chris Wilson | 93dfb40 | 2011-03-29 16:59:50 -0700 | [diff] [blame] | 111 | static const char *cache_level_str(int type) |
Chris Wilson | 08c1832 | 2011-01-10 00:00:24 +0000 | [diff] [blame] | 112 | { |
| 113 | switch (type) { |
Chris Wilson | 93dfb40 | 2011-03-29 16:59:50 -0700 | [diff] [blame] | 114 | case I915_CACHE_NONE: return " uncached"; |
| 115 | case I915_CACHE_LLC: return " snooped (LLC)"; |
| 116 | case I915_CACHE_LLC_MLC: return " snooped (LLC+MLC)"; |
Chris Wilson | 08c1832 | 2011-01-10 00:00:24 +0000 | [diff] [blame] | 117 | default: return ""; |
| 118 | } |
| 119 | } |
| 120 | |
Chris Wilson | 37811fc | 2010-08-25 22:45:57 +0100 | [diff] [blame] | 121 | static void |
| 122 | describe_obj(struct seq_file *m, struct drm_i915_gem_object *obj) |
| 123 | { |
Eric Anholt | a05a586 | 2011-12-20 08:54:15 -0800 | [diff] [blame] | 124 | seq_printf(m, "%p: %s%s %8zdKiB %04x %04x %d %d%s%s%s", |
Chris Wilson | 37811fc | 2010-08-25 22:45:57 +0100 | [diff] [blame] | 125 | &obj->base, |
| 126 | get_pin_flag(obj), |
| 127 | get_tiling_flag(obj), |
Eric Anholt | a05a586 | 2011-12-20 08:54:15 -0800 | [diff] [blame] | 128 | obj->base.size / 1024, |
Chris Wilson | 37811fc | 2010-08-25 22:45:57 +0100 | [diff] [blame] | 129 | obj->base.read_domains, |
| 130 | obj->base.write_domain, |
| 131 | obj->last_rendering_seqno, |
Chris Wilson | caea747 | 2010-11-12 13:53:37 +0000 | [diff] [blame] | 132 | obj->last_fenced_seqno, |
Chris Wilson | 93dfb40 | 2011-03-29 16:59:50 -0700 | [diff] [blame] | 133 | cache_level_str(obj->cache_level), |
Chris Wilson | 37811fc | 2010-08-25 22:45:57 +0100 | [diff] [blame] | 134 | obj->dirty ? " dirty" : "", |
| 135 | obj->madv == I915_MADV_DONTNEED ? " purgeable" : ""); |
| 136 | if (obj->base.name) |
| 137 | seq_printf(m, " (name: %d)", obj->base.name); |
| 138 | if (obj->fence_reg != I915_FENCE_REG_NONE) |
| 139 | seq_printf(m, " (fence: %d)", obj->fence_reg); |
| 140 | if (obj->gtt_space != NULL) |
Chris Wilson | a00b10c | 2010-09-24 21:15:47 +0100 | [diff] [blame] | 141 | seq_printf(m, " (gtt offset: %08x, size: %08x)", |
| 142 | obj->gtt_offset, (unsigned int)obj->gtt_space->size); |
Chris Wilson | 6299f99 | 2010-11-24 12:23:44 +0000 | [diff] [blame] | 143 | if (obj->pin_mappable || obj->fault_mappable) { |
| 144 | char s[3], *t = s; |
| 145 | if (obj->pin_mappable) |
| 146 | *t++ = 'p'; |
| 147 | if (obj->fault_mappable) |
| 148 | *t++ = 'f'; |
| 149 | *t = '\0'; |
| 150 | seq_printf(m, " (%s mappable)", s); |
| 151 | } |
Chris Wilson | 69dc498 | 2010-10-19 10:36:51 +0100 | [diff] [blame] | 152 | if (obj->ring != NULL) |
| 153 | seq_printf(m, " (%s)", obj->ring->name); |
Chris Wilson | 37811fc | 2010-08-25 22:45:57 +0100 | [diff] [blame] | 154 | } |
| 155 | |
Ben Gamari | 433e12f | 2009-02-17 20:08:51 -0500 | [diff] [blame] | 156 | static int i915_gem_object_list_info(struct seq_file *m, void *data) |
Ben Gamari | 2017263 | 2009-02-17 20:08:50 -0500 | [diff] [blame] | 157 | { |
| 158 | struct drm_info_node *node = (struct drm_info_node *) m->private; |
Ben Gamari | 433e12f | 2009-02-17 20:08:51 -0500 | [diff] [blame] | 159 | uintptr_t list = (uintptr_t) node->info_ent->data; |
| 160 | struct list_head *head; |
Ben Gamari | 2017263 | 2009-02-17 20:08:50 -0500 | [diff] [blame] | 161 | struct drm_device *dev = node->minor->dev; |
| 162 | drm_i915_private_t *dev_priv = dev->dev_private; |
Chris Wilson | 05394f3 | 2010-11-08 19:18:58 +0000 | [diff] [blame] | 163 | struct drm_i915_gem_object *obj; |
Chris Wilson | 8f2480f | 2010-09-26 11:44:19 +0100 | [diff] [blame] | 164 | size_t total_obj_size, total_gtt_size; |
| 165 | int count, ret; |
Chris Wilson | de227ef | 2010-07-03 07:58:38 +0100 | [diff] [blame] | 166 | |
| 167 | ret = mutex_lock_interruptible(&dev->struct_mutex); |
| 168 | if (ret) |
| 169 | return ret; |
Ben Gamari | 2017263 | 2009-02-17 20:08:50 -0500 | [diff] [blame] | 170 | |
Ben Gamari | 433e12f | 2009-02-17 20:08:51 -0500 | [diff] [blame] | 171 | switch (list) { |
| 172 | case ACTIVE_LIST: |
| 173 | seq_printf(m, "Active:\n"); |
Chris Wilson | 69dc498 | 2010-10-19 10:36:51 +0100 | [diff] [blame] | 174 | head = &dev_priv->mm.active_list; |
Ben Gamari | 433e12f | 2009-02-17 20:08:51 -0500 | [diff] [blame] | 175 | break; |
| 176 | case INACTIVE_LIST: |
Ben Gamari | a17458f | 2009-07-01 15:01:36 -0400 | [diff] [blame] | 177 | seq_printf(m, "Inactive:\n"); |
Ben Gamari | 433e12f | 2009-02-17 20:08:51 -0500 | [diff] [blame] | 178 | head = &dev_priv->mm.inactive_list; |
| 179 | break; |
| 180 | case FLUSHING_LIST: |
| 181 | seq_printf(m, "Flushing:\n"); |
| 182 | head = &dev_priv->mm.flushing_list; |
| 183 | break; |
| 184 | default: |
Chris Wilson | de227ef | 2010-07-03 07:58:38 +0100 | [diff] [blame] | 185 | mutex_unlock(&dev->struct_mutex); |
| 186 | return -EINVAL; |
Ben Gamari | 433e12f | 2009-02-17 20:08:51 -0500 | [diff] [blame] | 187 | } |
| 188 | |
Chris Wilson | 8f2480f | 2010-09-26 11:44:19 +0100 | [diff] [blame] | 189 | total_obj_size = total_gtt_size = count = 0; |
Chris Wilson | 05394f3 | 2010-11-08 19:18:58 +0000 | [diff] [blame] | 190 | list_for_each_entry(obj, head, mm_list) { |
Chris Wilson | 37811fc | 2010-08-25 22:45:57 +0100 | [diff] [blame] | 191 | seq_printf(m, " "); |
Chris Wilson | 05394f3 | 2010-11-08 19:18:58 +0000 | [diff] [blame] | 192 | describe_obj(m, obj); |
Eric Anholt | f4ceda8 | 2009-02-17 23:53:41 -0800 | [diff] [blame] | 193 | seq_printf(m, "\n"); |
Chris Wilson | 05394f3 | 2010-11-08 19:18:58 +0000 | [diff] [blame] | 194 | total_obj_size += obj->base.size; |
| 195 | total_gtt_size += obj->gtt_space->size; |
Chris Wilson | 8f2480f | 2010-09-26 11:44:19 +0100 | [diff] [blame] | 196 | count++; |
Ben Gamari | 2017263 | 2009-02-17 20:08:50 -0500 | [diff] [blame] | 197 | } |
Chris Wilson | de227ef | 2010-07-03 07:58:38 +0100 | [diff] [blame] | 198 | mutex_unlock(&dev->struct_mutex); |
Carl Worth | 5e118f4 | 2009-03-20 11:54:25 -0700 | [diff] [blame] | 199 | |
Chris Wilson | 8f2480f | 2010-09-26 11:44:19 +0100 | [diff] [blame] | 200 | seq_printf(m, "Total %d objects, %zu bytes, %zu GTT size\n", |
| 201 | count, total_obj_size, total_gtt_size); |
Ben Gamari | 2017263 | 2009-02-17 20:08:50 -0500 | [diff] [blame] | 202 | return 0; |
| 203 | } |
| 204 | |
Chris Wilson | 6299f99 | 2010-11-24 12:23:44 +0000 | [diff] [blame] | 205 | #define count_objects(list, member) do { \ |
| 206 | list_for_each_entry(obj, list, member) { \ |
| 207 | size += obj->gtt_space->size; \ |
| 208 | ++count; \ |
| 209 | if (obj->map_and_fenceable) { \ |
| 210 | mappable_size += obj->gtt_space->size; \ |
| 211 | ++mappable_count; \ |
| 212 | } \ |
| 213 | } \ |
Akshay Joshi | 0206e35 | 2011-08-16 15:34:10 -0400 | [diff] [blame] | 214 | } while (0) |
Chris Wilson | 6299f99 | 2010-11-24 12:23:44 +0000 | [diff] [blame] | 215 | |
Chris Wilson | 73aa808 | 2010-09-30 11:46:12 +0100 | [diff] [blame] | 216 | static int i915_gem_object_info(struct seq_file *m, void* data) |
| 217 | { |
| 218 | struct drm_info_node *node = (struct drm_info_node *) m->private; |
| 219 | struct drm_device *dev = node->minor->dev; |
| 220 | struct drm_i915_private *dev_priv = dev->dev_private; |
Chris Wilson | 6299f99 | 2010-11-24 12:23:44 +0000 | [diff] [blame] | 221 | u32 count, mappable_count; |
| 222 | size_t size, mappable_size; |
| 223 | struct drm_i915_gem_object *obj; |
Chris Wilson | 73aa808 | 2010-09-30 11:46:12 +0100 | [diff] [blame] | 224 | int ret; |
| 225 | |
| 226 | ret = mutex_lock_interruptible(&dev->struct_mutex); |
| 227 | if (ret) |
| 228 | return ret; |
| 229 | |
Chris Wilson | 6299f99 | 2010-11-24 12:23:44 +0000 | [diff] [blame] | 230 | seq_printf(m, "%u objects, %zu bytes\n", |
| 231 | dev_priv->mm.object_count, |
| 232 | dev_priv->mm.object_memory); |
| 233 | |
| 234 | size = count = mappable_size = mappable_count = 0; |
| 235 | count_objects(&dev_priv->mm.gtt_list, gtt_list); |
| 236 | seq_printf(m, "%u [%u] objects, %zu [%zu] bytes in gtt\n", |
| 237 | count, mappable_count, size, mappable_size); |
| 238 | |
| 239 | size = count = mappable_size = mappable_count = 0; |
| 240 | count_objects(&dev_priv->mm.active_list, mm_list); |
| 241 | count_objects(&dev_priv->mm.flushing_list, mm_list); |
| 242 | seq_printf(m, " %u [%u] active objects, %zu [%zu] bytes\n", |
| 243 | count, mappable_count, size, mappable_size); |
| 244 | |
| 245 | size = count = mappable_size = mappable_count = 0; |
Chris Wilson | 6299f99 | 2010-11-24 12:23:44 +0000 | [diff] [blame] | 246 | count_objects(&dev_priv->mm.inactive_list, mm_list); |
| 247 | seq_printf(m, " %u [%u] inactive objects, %zu [%zu] bytes\n", |
| 248 | count, mappable_count, size, mappable_size); |
| 249 | |
| 250 | size = count = mappable_size = mappable_count = 0; |
Chris Wilson | 6299f99 | 2010-11-24 12:23:44 +0000 | [diff] [blame] | 251 | list_for_each_entry(obj, &dev_priv->mm.gtt_list, gtt_list) { |
| 252 | if (obj->fault_mappable) { |
| 253 | size += obj->gtt_space->size; |
| 254 | ++count; |
| 255 | } |
| 256 | if (obj->pin_mappable) { |
| 257 | mappable_size += obj->gtt_space->size; |
| 258 | ++mappable_count; |
| 259 | } |
| 260 | } |
| 261 | seq_printf(m, "%u pinned mappable objects, %zu bytes\n", |
| 262 | mappable_count, mappable_size); |
| 263 | seq_printf(m, "%u fault mappable objects, %zu bytes\n", |
| 264 | count, size); |
| 265 | |
| 266 | seq_printf(m, "%zu [%zu] gtt total\n", |
| 267 | dev_priv->mm.gtt_total, dev_priv->mm.mappable_gtt_total); |
Chris Wilson | 73aa808 | 2010-09-30 11:46:12 +0100 | [diff] [blame] | 268 | |
| 269 | mutex_unlock(&dev->struct_mutex); |
| 270 | |
| 271 | return 0; |
| 272 | } |
| 273 | |
Chris Wilson | 08c1832 | 2011-01-10 00:00:24 +0000 | [diff] [blame] | 274 | static int i915_gem_gtt_info(struct seq_file *m, void* data) |
| 275 | { |
| 276 | struct drm_info_node *node = (struct drm_info_node *) m->private; |
| 277 | struct drm_device *dev = node->minor->dev; |
Chris Wilson | 1b50247 | 2012-04-24 15:47:30 +0100 | [diff] [blame] | 278 | uintptr_t list = (uintptr_t) node->info_ent->data; |
Chris Wilson | 08c1832 | 2011-01-10 00:00:24 +0000 | [diff] [blame] | 279 | struct drm_i915_private *dev_priv = dev->dev_private; |
| 280 | struct drm_i915_gem_object *obj; |
| 281 | size_t total_obj_size, total_gtt_size; |
| 282 | int count, ret; |
| 283 | |
| 284 | ret = mutex_lock_interruptible(&dev->struct_mutex); |
| 285 | if (ret) |
| 286 | return ret; |
| 287 | |
| 288 | total_obj_size = total_gtt_size = count = 0; |
| 289 | list_for_each_entry(obj, &dev_priv->mm.gtt_list, gtt_list) { |
Chris Wilson | 1b50247 | 2012-04-24 15:47:30 +0100 | [diff] [blame] | 290 | if (list == PINNED_LIST && obj->pin_count == 0) |
| 291 | continue; |
| 292 | |
Chris Wilson | 08c1832 | 2011-01-10 00:00:24 +0000 | [diff] [blame] | 293 | seq_printf(m, " "); |
| 294 | describe_obj(m, obj); |
| 295 | seq_printf(m, "\n"); |
| 296 | total_obj_size += obj->base.size; |
| 297 | total_gtt_size += obj->gtt_space->size; |
| 298 | count++; |
| 299 | } |
| 300 | |
| 301 | mutex_unlock(&dev->struct_mutex); |
| 302 | |
| 303 | seq_printf(m, "Total %d objects, %zu bytes, %zu GTT size\n", |
| 304 | count, total_obj_size, total_gtt_size); |
| 305 | |
| 306 | return 0; |
| 307 | } |
| 308 | |
Simon Farnsworth | 4e5359c | 2010-09-01 17:47:52 +0100 | [diff] [blame] | 309 | static int i915_gem_pageflip_info(struct seq_file *m, void *data) |
| 310 | { |
| 311 | struct drm_info_node *node = (struct drm_info_node *) m->private; |
| 312 | struct drm_device *dev = node->minor->dev; |
| 313 | unsigned long flags; |
| 314 | struct intel_crtc *crtc; |
| 315 | |
| 316 | list_for_each_entry(crtc, &dev->mode_config.crtc_list, base.head) { |
Jesse Barnes | 9db4a9c | 2011-02-07 12:26:52 -0800 | [diff] [blame] | 317 | const char pipe = pipe_name(crtc->pipe); |
| 318 | const char plane = plane_name(crtc->plane); |
Simon Farnsworth | 4e5359c | 2010-09-01 17:47:52 +0100 | [diff] [blame] | 319 | struct intel_unpin_work *work; |
| 320 | |
| 321 | spin_lock_irqsave(&dev->event_lock, flags); |
| 322 | work = crtc->unpin_work; |
| 323 | if (work == NULL) { |
Jesse Barnes | 9db4a9c | 2011-02-07 12:26:52 -0800 | [diff] [blame] | 324 | seq_printf(m, "No flip due on pipe %c (plane %c)\n", |
Simon Farnsworth | 4e5359c | 2010-09-01 17:47:52 +0100 | [diff] [blame] | 325 | pipe, plane); |
| 326 | } else { |
| 327 | if (!work->pending) { |
Jesse Barnes | 9db4a9c | 2011-02-07 12:26:52 -0800 | [diff] [blame] | 328 | seq_printf(m, "Flip queued on pipe %c (plane %c)\n", |
Simon Farnsworth | 4e5359c | 2010-09-01 17:47:52 +0100 | [diff] [blame] | 329 | pipe, plane); |
| 330 | } else { |
Jesse Barnes | 9db4a9c | 2011-02-07 12:26:52 -0800 | [diff] [blame] | 331 | seq_printf(m, "Flip pending (waiting for vsync) on pipe %c (plane %c)\n", |
Simon Farnsworth | 4e5359c | 2010-09-01 17:47:52 +0100 | [diff] [blame] | 332 | pipe, plane); |
| 333 | } |
| 334 | if (work->enable_stall_check) |
| 335 | seq_printf(m, "Stall check enabled, "); |
| 336 | else |
| 337 | seq_printf(m, "Stall check waiting for page flip ioctl, "); |
| 338 | seq_printf(m, "%d prepares\n", work->pending); |
| 339 | |
| 340 | if (work->old_fb_obj) { |
Chris Wilson | 05394f3 | 2010-11-08 19:18:58 +0000 | [diff] [blame] | 341 | struct drm_i915_gem_object *obj = work->old_fb_obj; |
| 342 | if (obj) |
| 343 | seq_printf(m, "Old framebuffer gtt_offset 0x%08x\n", obj->gtt_offset); |
Simon Farnsworth | 4e5359c | 2010-09-01 17:47:52 +0100 | [diff] [blame] | 344 | } |
| 345 | if (work->pending_flip_obj) { |
Chris Wilson | 05394f3 | 2010-11-08 19:18:58 +0000 | [diff] [blame] | 346 | struct drm_i915_gem_object *obj = work->pending_flip_obj; |
| 347 | if (obj) |
| 348 | seq_printf(m, "New framebuffer gtt_offset 0x%08x\n", obj->gtt_offset); |
Simon Farnsworth | 4e5359c | 2010-09-01 17:47:52 +0100 | [diff] [blame] | 349 | } |
| 350 | } |
| 351 | spin_unlock_irqrestore(&dev->event_lock, flags); |
| 352 | } |
| 353 | |
| 354 | return 0; |
| 355 | } |
| 356 | |
Ben Gamari | 2017263 | 2009-02-17 20:08:50 -0500 | [diff] [blame] | 357 | static int i915_gem_request_info(struct seq_file *m, void *data) |
| 358 | { |
| 359 | struct drm_info_node *node = (struct drm_info_node *) m->private; |
| 360 | struct drm_device *dev = node->minor->dev; |
| 361 | drm_i915_private_t *dev_priv = dev->dev_private; |
| 362 | struct drm_i915_gem_request *gem_request; |
Chris Wilson | c2c347a9 | 2010-10-27 15:11:53 +0100 | [diff] [blame] | 363 | int ret, count; |
Chris Wilson | de227ef | 2010-07-03 07:58:38 +0100 | [diff] [blame] | 364 | |
| 365 | ret = mutex_lock_interruptible(&dev->struct_mutex); |
| 366 | if (ret) |
| 367 | return ret; |
Ben Gamari | 2017263 | 2009-02-17 20:08:50 -0500 | [diff] [blame] | 368 | |
Chris Wilson | c2c347a9 | 2010-10-27 15:11:53 +0100 | [diff] [blame] | 369 | count = 0; |
Chris Wilson | 1ec14ad | 2010-12-04 11:30:53 +0000 | [diff] [blame] | 370 | if (!list_empty(&dev_priv->ring[RCS].request_list)) { |
Chris Wilson | c2c347a9 | 2010-10-27 15:11:53 +0100 | [diff] [blame] | 371 | seq_printf(m, "Render requests:\n"); |
| 372 | list_for_each_entry(gem_request, |
Chris Wilson | 1ec14ad | 2010-12-04 11:30:53 +0000 | [diff] [blame] | 373 | &dev_priv->ring[RCS].request_list, |
Chris Wilson | c2c347a9 | 2010-10-27 15:11:53 +0100 | [diff] [blame] | 374 | list) { |
| 375 | seq_printf(m, " %d @ %d\n", |
| 376 | gem_request->seqno, |
| 377 | (int) (jiffies - gem_request->emitted_jiffies)); |
| 378 | } |
| 379 | count++; |
| 380 | } |
Chris Wilson | 1ec14ad | 2010-12-04 11:30:53 +0000 | [diff] [blame] | 381 | if (!list_empty(&dev_priv->ring[VCS].request_list)) { |
Chris Wilson | c2c347a9 | 2010-10-27 15:11:53 +0100 | [diff] [blame] | 382 | seq_printf(m, "BSD requests:\n"); |
| 383 | list_for_each_entry(gem_request, |
Chris Wilson | 1ec14ad | 2010-12-04 11:30:53 +0000 | [diff] [blame] | 384 | &dev_priv->ring[VCS].request_list, |
Chris Wilson | c2c347a9 | 2010-10-27 15:11:53 +0100 | [diff] [blame] | 385 | list) { |
| 386 | seq_printf(m, " %d @ %d\n", |
| 387 | gem_request->seqno, |
| 388 | (int) (jiffies - gem_request->emitted_jiffies)); |
| 389 | } |
| 390 | count++; |
| 391 | } |
Chris Wilson | 1ec14ad | 2010-12-04 11:30:53 +0000 | [diff] [blame] | 392 | if (!list_empty(&dev_priv->ring[BCS].request_list)) { |
Chris Wilson | c2c347a9 | 2010-10-27 15:11:53 +0100 | [diff] [blame] | 393 | seq_printf(m, "BLT requests:\n"); |
| 394 | list_for_each_entry(gem_request, |
Chris Wilson | 1ec14ad | 2010-12-04 11:30:53 +0000 | [diff] [blame] | 395 | &dev_priv->ring[BCS].request_list, |
Chris Wilson | c2c347a9 | 2010-10-27 15:11:53 +0100 | [diff] [blame] | 396 | list) { |
| 397 | seq_printf(m, " %d @ %d\n", |
| 398 | gem_request->seqno, |
| 399 | (int) (jiffies - gem_request->emitted_jiffies)); |
| 400 | } |
| 401 | count++; |
Ben Gamari | 2017263 | 2009-02-17 20:08:50 -0500 | [diff] [blame] | 402 | } |
Chris Wilson | de227ef | 2010-07-03 07:58:38 +0100 | [diff] [blame] | 403 | mutex_unlock(&dev->struct_mutex); |
| 404 | |
Chris Wilson | c2c347a9 | 2010-10-27 15:11:53 +0100 | [diff] [blame] | 405 | if (count == 0) |
| 406 | seq_printf(m, "No requests\n"); |
| 407 | |
Ben Gamari | 2017263 | 2009-02-17 20:08:50 -0500 | [diff] [blame] | 408 | return 0; |
| 409 | } |
| 410 | |
Chris Wilson | b222349 | 2010-10-27 15:27:33 +0100 | [diff] [blame] | 411 | static void i915_ring_seqno_info(struct seq_file *m, |
| 412 | struct intel_ring_buffer *ring) |
| 413 | { |
| 414 | if (ring->get_seqno) { |
| 415 | seq_printf(m, "Current sequence (%s): %d\n", |
| 416 | ring->name, ring->get_seqno(ring)); |
Chris Wilson | b222349 | 2010-10-27 15:27:33 +0100 | [diff] [blame] | 417 | } |
| 418 | } |
| 419 | |
Ben Gamari | 2017263 | 2009-02-17 20:08:50 -0500 | [diff] [blame] | 420 | static int i915_gem_seqno_info(struct seq_file *m, void *data) |
| 421 | { |
| 422 | struct drm_info_node *node = (struct drm_info_node *) m->private; |
| 423 | struct drm_device *dev = node->minor->dev; |
| 424 | drm_i915_private_t *dev_priv = dev->dev_private; |
Chris Wilson | 1ec14ad | 2010-12-04 11:30:53 +0000 | [diff] [blame] | 425 | int ret, i; |
Chris Wilson | de227ef | 2010-07-03 07:58:38 +0100 | [diff] [blame] | 426 | |
| 427 | ret = mutex_lock_interruptible(&dev->struct_mutex); |
| 428 | if (ret) |
| 429 | return ret; |
Ben Gamari | 2017263 | 2009-02-17 20:08:50 -0500 | [diff] [blame] | 430 | |
Chris Wilson | 1ec14ad | 2010-12-04 11:30:53 +0000 | [diff] [blame] | 431 | for (i = 0; i < I915_NUM_RINGS; i++) |
| 432 | i915_ring_seqno_info(m, &dev_priv->ring[i]); |
Chris Wilson | de227ef | 2010-07-03 07:58:38 +0100 | [diff] [blame] | 433 | |
| 434 | mutex_unlock(&dev->struct_mutex); |
| 435 | |
Ben Gamari | 2017263 | 2009-02-17 20:08:50 -0500 | [diff] [blame] | 436 | return 0; |
| 437 | } |
| 438 | |
| 439 | |
| 440 | static int i915_interrupt_info(struct seq_file *m, void *data) |
| 441 | { |
| 442 | struct drm_info_node *node = (struct drm_info_node *) m->private; |
| 443 | struct drm_device *dev = node->minor->dev; |
| 444 | drm_i915_private_t *dev_priv = dev->dev_private; |
Jesse Barnes | 9db4a9c | 2011-02-07 12:26:52 -0800 | [diff] [blame] | 445 | int ret, i, pipe; |
Chris Wilson | de227ef | 2010-07-03 07:58:38 +0100 | [diff] [blame] | 446 | |
| 447 | ret = mutex_lock_interruptible(&dev->struct_mutex); |
| 448 | if (ret) |
| 449 | return ret; |
Ben Gamari | 2017263 | 2009-02-17 20:08:50 -0500 | [diff] [blame] | 450 | |
Jesse Barnes | 7e231dbe | 2012-03-28 13:39:38 -0700 | [diff] [blame] | 451 | if (IS_VALLEYVIEW(dev)) { |
| 452 | seq_printf(m, "Display IER:\t%08x\n", |
| 453 | I915_READ(VLV_IER)); |
| 454 | seq_printf(m, "Display IIR:\t%08x\n", |
| 455 | I915_READ(VLV_IIR)); |
| 456 | seq_printf(m, "Display IIR_RW:\t%08x\n", |
| 457 | I915_READ(VLV_IIR_RW)); |
| 458 | seq_printf(m, "Display IMR:\t%08x\n", |
| 459 | I915_READ(VLV_IMR)); |
| 460 | for_each_pipe(pipe) |
| 461 | seq_printf(m, "Pipe %c stat:\t%08x\n", |
| 462 | pipe_name(pipe), |
| 463 | I915_READ(PIPESTAT(pipe))); |
| 464 | |
| 465 | seq_printf(m, "Master IER:\t%08x\n", |
| 466 | I915_READ(VLV_MASTER_IER)); |
| 467 | |
| 468 | seq_printf(m, "Render IER:\t%08x\n", |
| 469 | I915_READ(GTIER)); |
| 470 | seq_printf(m, "Render IIR:\t%08x\n", |
| 471 | I915_READ(GTIIR)); |
| 472 | seq_printf(m, "Render IMR:\t%08x\n", |
| 473 | I915_READ(GTIMR)); |
| 474 | |
| 475 | seq_printf(m, "PM IER:\t\t%08x\n", |
| 476 | I915_READ(GEN6_PMIER)); |
| 477 | seq_printf(m, "PM IIR:\t\t%08x\n", |
| 478 | I915_READ(GEN6_PMIIR)); |
| 479 | seq_printf(m, "PM IMR:\t\t%08x\n", |
| 480 | I915_READ(GEN6_PMIMR)); |
| 481 | |
| 482 | seq_printf(m, "Port hotplug:\t%08x\n", |
| 483 | I915_READ(PORT_HOTPLUG_EN)); |
| 484 | seq_printf(m, "DPFLIPSTAT:\t%08x\n", |
| 485 | I915_READ(VLV_DPFLIPSTAT)); |
| 486 | seq_printf(m, "DPINVGTT:\t%08x\n", |
| 487 | I915_READ(DPINVGTT)); |
| 488 | |
| 489 | } else if (!HAS_PCH_SPLIT(dev)) { |
Zhenyu Wang | 5f6a169 | 2009-08-10 21:37:24 +0800 | [diff] [blame] | 490 | seq_printf(m, "Interrupt enable: %08x\n", |
| 491 | I915_READ(IER)); |
| 492 | seq_printf(m, "Interrupt identity: %08x\n", |
| 493 | I915_READ(IIR)); |
| 494 | seq_printf(m, "Interrupt mask: %08x\n", |
| 495 | I915_READ(IMR)); |
Jesse Barnes | 9db4a9c | 2011-02-07 12:26:52 -0800 | [diff] [blame] | 496 | for_each_pipe(pipe) |
| 497 | seq_printf(m, "Pipe %c stat: %08x\n", |
| 498 | pipe_name(pipe), |
| 499 | I915_READ(PIPESTAT(pipe))); |
Zhenyu Wang | 5f6a169 | 2009-08-10 21:37:24 +0800 | [diff] [blame] | 500 | } else { |
| 501 | seq_printf(m, "North Display Interrupt enable: %08x\n", |
| 502 | I915_READ(DEIER)); |
| 503 | seq_printf(m, "North Display Interrupt identity: %08x\n", |
| 504 | I915_READ(DEIIR)); |
| 505 | seq_printf(m, "North Display Interrupt mask: %08x\n", |
| 506 | I915_READ(DEIMR)); |
| 507 | seq_printf(m, "South Display Interrupt enable: %08x\n", |
| 508 | I915_READ(SDEIER)); |
| 509 | seq_printf(m, "South Display Interrupt identity: %08x\n", |
| 510 | I915_READ(SDEIIR)); |
| 511 | seq_printf(m, "South Display Interrupt mask: %08x\n", |
| 512 | I915_READ(SDEIMR)); |
| 513 | seq_printf(m, "Graphics Interrupt enable: %08x\n", |
| 514 | I915_READ(GTIER)); |
| 515 | seq_printf(m, "Graphics Interrupt identity: %08x\n", |
| 516 | I915_READ(GTIIR)); |
| 517 | seq_printf(m, "Graphics Interrupt mask: %08x\n", |
| 518 | I915_READ(GTIMR)); |
| 519 | } |
Ben Gamari | 2017263 | 2009-02-17 20:08:50 -0500 | [diff] [blame] | 520 | seq_printf(m, "Interrupts received: %d\n", |
| 521 | atomic_read(&dev_priv->irq_received)); |
Chris Wilson | 9862e60 | 2011-01-04 22:22:17 +0000 | [diff] [blame] | 522 | for (i = 0; i < I915_NUM_RINGS; i++) { |
Jesse Barnes | da64c6f | 2011-08-09 09:17:46 -0700 | [diff] [blame] | 523 | if (IS_GEN6(dev) || IS_GEN7(dev)) { |
Chris Wilson | 9862e60 | 2011-01-04 22:22:17 +0000 | [diff] [blame] | 524 | seq_printf(m, "Graphics Interrupt mask (%s): %08x\n", |
| 525 | dev_priv->ring[i].name, |
| 526 | I915_READ_IMR(&dev_priv->ring[i])); |
| 527 | } |
Chris Wilson | 1ec14ad | 2010-12-04 11:30:53 +0000 | [diff] [blame] | 528 | i915_ring_seqno_info(m, &dev_priv->ring[i]); |
Chris Wilson | 9862e60 | 2011-01-04 22:22:17 +0000 | [diff] [blame] | 529 | } |
Chris Wilson | de227ef | 2010-07-03 07:58:38 +0100 | [diff] [blame] | 530 | mutex_unlock(&dev->struct_mutex); |
| 531 | |
Ben Gamari | 2017263 | 2009-02-17 20:08:50 -0500 | [diff] [blame] | 532 | return 0; |
| 533 | } |
| 534 | |
Chris Wilson | a6172a8 | 2009-02-11 14:26:38 +0000 | [diff] [blame] | 535 | static int i915_gem_fence_regs_info(struct seq_file *m, void *data) |
| 536 | { |
| 537 | struct drm_info_node *node = (struct drm_info_node *) m->private; |
| 538 | struct drm_device *dev = node->minor->dev; |
| 539 | drm_i915_private_t *dev_priv = dev->dev_private; |
Chris Wilson | de227ef | 2010-07-03 07:58:38 +0100 | [diff] [blame] | 540 | int i, ret; |
| 541 | |
| 542 | ret = mutex_lock_interruptible(&dev->struct_mutex); |
| 543 | if (ret) |
| 544 | return ret; |
Chris Wilson | a6172a8 | 2009-02-11 14:26:38 +0000 | [diff] [blame] | 545 | |
| 546 | seq_printf(m, "Reserved fences = %d\n", dev_priv->fence_reg_start); |
| 547 | seq_printf(m, "Total fences = %d\n", dev_priv->num_fence_regs); |
| 548 | for (i = 0; i < dev_priv->num_fence_regs; i++) { |
Chris Wilson | 05394f3 | 2010-11-08 19:18:58 +0000 | [diff] [blame] | 549 | struct drm_i915_gem_object *obj = dev_priv->fence_regs[i].obj; |
Chris Wilson | a6172a8 | 2009-02-11 14:26:38 +0000 | [diff] [blame] | 550 | |
Chris Wilson | c2c347a9 | 2010-10-27 15:11:53 +0100 | [diff] [blame] | 551 | seq_printf(m, "Fenced object[%2d] = ", i); |
| 552 | if (obj == NULL) |
| 553 | seq_printf(m, "unused"); |
| 554 | else |
Chris Wilson | 05394f3 | 2010-11-08 19:18:58 +0000 | [diff] [blame] | 555 | describe_obj(m, obj); |
Chris Wilson | c2c347a9 | 2010-10-27 15:11:53 +0100 | [diff] [blame] | 556 | seq_printf(m, "\n"); |
Chris Wilson | a6172a8 | 2009-02-11 14:26:38 +0000 | [diff] [blame] | 557 | } |
| 558 | |
Chris Wilson | 05394f3 | 2010-11-08 19:18:58 +0000 | [diff] [blame] | 559 | mutex_unlock(&dev->struct_mutex); |
Chris Wilson | a6172a8 | 2009-02-11 14:26:38 +0000 | [diff] [blame] | 560 | return 0; |
| 561 | } |
| 562 | |
Ben Gamari | 2017263 | 2009-02-17 20:08:50 -0500 | [diff] [blame] | 563 | static int i915_hws_info(struct seq_file *m, void *data) |
| 564 | { |
| 565 | struct drm_info_node *node = (struct drm_info_node *) m->private; |
| 566 | struct drm_device *dev = node->minor->dev; |
| 567 | drm_i915_private_t *dev_priv = dev->dev_private; |
Chris Wilson | 4066c0a | 2010-10-29 21:00:54 +0100 | [diff] [blame] | 568 | struct intel_ring_buffer *ring; |
Chris Wilson | 311bd68 | 2011-01-13 19:06:50 +0000 | [diff] [blame] | 569 | const volatile u32 __iomem *hws; |
Chris Wilson | 4066c0a | 2010-10-29 21:00:54 +0100 | [diff] [blame] | 570 | int i; |
Ben Gamari | 2017263 | 2009-02-17 20:08:50 -0500 | [diff] [blame] | 571 | |
Chris Wilson | 1ec14ad | 2010-12-04 11:30:53 +0000 | [diff] [blame] | 572 | ring = &dev_priv->ring[(uintptr_t)node->info_ent->data]; |
Chris Wilson | 311bd68 | 2011-01-13 19:06:50 +0000 | [diff] [blame] | 573 | hws = (volatile u32 __iomem *)ring->status_page.page_addr; |
Ben Gamari | 2017263 | 2009-02-17 20:08:50 -0500 | [diff] [blame] | 574 | if (hws == NULL) |
| 575 | return 0; |
| 576 | |
| 577 | for (i = 0; i < 4096 / sizeof(u32) / 4; i += 4) { |
| 578 | seq_printf(m, "0x%08x: 0x%08x 0x%08x 0x%08x 0x%08x\n", |
| 579 | i * 4, |
| 580 | hws[i], hws[i + 1], hws[i + 2], hws[i + 3]); |
| 581 | } |
| 582 | return 0; |
| 583 | } |
| 584 | |
Chris Wilson | e5c6526 | 2010-11-01 11:35:28 +0000 | [diff] [blame] | 585 | static const char *ring_str(int ring) |
| 586 | { |
| 587 | switch (ring) { |
Daniel Vetter | 96154f2 | 2011-12-14 13:57:00 +0100 | [diff] [blame] | 588 | case RCS: return "render"; |
| 589 | case VCS: return "bsd"; |
| 590 | case BCS: return "blt"; |
Chris Wilson | e5c6526 | 2010-11-01 11:35:28 +0000 | [diff] [blame] | 591 | default: return ""; |
| 592 | } |
| 593 | } |
| 594 | |
Chris Wilson | 9df3079 | 2010-02-18 10:24:56 +0000 | [diff] [blame] | 595 | static const char *pin_flag(int pinned) |
| 596 | { |
| 597 | if (pinned > 0) |
| 598 | return " P"; |
| 599 | else if (pinned < 0) |
| 600 | return " p"; |
| 601 | else |
| 602 | return ""; |
| 603 | } |
| 604 | |
| 605 | static const char *tiling_flag(int tiling) |
| 606 | { |
| 607 | switch (tiling) { |
| 608 | default: |
| 609 | case I915_TILING_NONE: return ""; |
| 610 | case I915_TILING_X: return " X"; |
| 611 | case I915_TILING_Y: return " Y"; |
| 612 | } |
| 613 | } |
| 614 | |
| 615 | static const char *dirty_flag(int dirty) |
| 616 | { |
| 617 | return dirty ? " dirty" : ""; |
| 618 | } |
| 619 | |
| 620 | static const char *purgeable_flag(int purgeable) |
| 621 | { |
| 622 | return purgeable ? " purgeable" : ""; |
| 623 | } |
| 624 | |
Chris Wilson | c724e8a | 2010-11-22 08:07:02 +0000 | [diff] [blame] | 625 | static void print_error_buffers(struct seq_file *m, |
| 626 | const char *name, |
| 627 | struct drm_i915_error_buffer *err, |
| 628 | int count) |
| 629 | { |
| 630 | seq_printf(m, "%s [%d]:\n", name, count); |
| 631 | |
| 632 | while (count--) { |
Daniel Vetter | 96154f2 | 2011-12-14 13:57:00 +0100 | [diff] [blame] | 633 | seq_printf(m, " %08x %8u %04x %04x %08x%s%s%s%s%s%s%s", |
Chris Wilson | c724e8a | 2010-11-22 08:07:02 +0000 | [diff] [blame] | 634 | err->gtt_offset, |
| 635 | err->size, |
| 636 | err->read_domains, |
| 637 | err->write_domain, |
| 638 | err->seqno, |
| 639 | pin_flag(err->pinned), |
| 640 | tiling_flag(err->tiling), |
| 641 | dirty_flag(err->dirty), |
| 642 | purgeable_flag(err->purgeable), |
Daniel Vetter | 96154f2 | 2011-12-14 13:57:00 +0100 | [diff] [blame] | 643 | err->ring != -1 ? " " : "", |
Chris Wilson | a779e5a | 2011-01-09 21:07:49 +0000 | [diff] [blame] | 644 | ring_str(err->ring), |
Chris Wilson | 93dfb40 | 2011-03-29 16:59:50 -0700 | [diff] [blame] | 645 | cache_level_str(err->cache_level)); |
Chris Wilson | c724e8a | 2010-11-22 08:07:02 +0000 | [diff] [blame] | 646 | |
| 647 | if (err->name) |
| 648 | seq_printf(m, " (name: %d)", err->name); |
| 649 | if (err->fence_reg != I915_FENCE_REG_NONE) |
| 650 | seq_printf(m, " (fence: %d)", err->fence_reg); |
| 651 | |
| 652 | seq_printf(m, "\n"); |
| 653 | err++; |
| 654 | } |
| 655 | } |
| 656 | |
Daniel Vetter | d27b1e0 | 2011-12-14 13:57:01 +0100 | [diff] [blame] | 657 | static void i915_ring_error_state(struct seq_file *m, |
| 658 | struct drm_device *dev, |
| 659 | struct drm_i915_error_state *error, |
| 660 | unsigned ring) |
| 661 | { |
Ben Widawsky | ec34a01 | 2012-04-03 23:03:00 -0700 | [diff] [blame] | 662 | BUG_ON(ring >= I915_NUM_RINGS); /* shut up confused gcc */ |
Daniel Vetter | d27b1e0 | 2011-12-14 13:57:01 +0100 | [diff] [blame] | 663 | seq_printf(m, "%s command stream:\n", ring_str(ring)); |
Daniel Vetter | c1cd90e | 2011-12-14 13:57:02 +0100 | [diff] [blame] | 664 | seq_printf(m, " HEAD: 0x%08x\n", error->head[ring]); |
| 665 | seq_printf(m, " TAIL: 0x%08x\n", error->tail[ring]); |
Daniel Vetter | d27b1e0 | 2011-12-14 13:57:01 +0100 | [diff] [blame] | 666 | seq_printf(m, " ACTHD: 0x%08x\n", error->acthd[ring]); |
| 667 | seq_printf(m, " IPEIR: 0x%08x\n", error->ipeir[ring]); |
| 668 | seq_printf(m, " IPEHR: 0x%08x\n", error->ipehr[ring]); |
| 669 | seq_printf(m, " INSTDONE: 0x%08x\n", error->instdone[ring]); |
Daniel Vetter | c1cd90e | 2011-12-14 13:57:02 +0100 | [diff] [blame] | 670 | if (ring == RCS && INTEL_INFO(dev)->gen >= 4) { |
| 671 | seq_printf(m, " INSTDONE1: 0x%08x\n", error->instdone1); |
| 672 | seq_printf(m, " BBADDR: 0x%08llx\n", error->bbaddr); |
Daniel Vetter | d27b1e0 | 2011-12-14 13:57:01 +0100 | [diff] [blame] | 673 | } |
Daniel Vetter | c1cd90e | 2011-12-14 13:57:02 +0100 | [diff] [blame] | 674 | if (INTEL_INFO(dev)->gen >= 4) |
| 675 | seq_printf(m, " INSTPS: 0x%08x\n", error->instps[ring]); |
| 676 | seq_printf(m, " INSTPM: 0x%08x\n", error->instpm[ring]); |
Daniel Vetter | 9d2f41f | 2012-04-02 21:41:45 +0200 | [diff] [blame] | 677 | seq_printf(m, " FADDR: 0x%08x\n", error->faddr[ring]); |
Daniel Vetter | 33f3f51 | 2011-12-14 13:57:39 +0100 | [diff] [blame] | 678 | if (INTEL_INFO(dev)->gen >= 6) { |
Daniel Vetter | 33f3f51 | 2011-12-14 13:57:39 +0100 | [diff] [blame] | 679 | seq_printf(m, " FAULT_REG: 0x%08x\n", error->fault_reg[ring]); |
Daniel Vetter | 7e3b873 | 2012-02-01 22:26:45 +0100 | [diff] [blame] | 680 | seq_printf(m, " SYNC_0: 0x%08x\n", |
| 681 | error->semaphore_mboxes[ring][0]); |
| 682 | seq_printf(m, " SYNC_1: 0x%08x\n", |
| 683 | error->semaphore_mboxes[ring][1]); |
Daniel Vetter | 33f3f51 | 2011-12-14 13:57:39 +0100 | [diff] [blame] | 684 | } |
Daniel Vetter | d27b1e0 | 2011-12-14 13:57:01 +0100 | [diff] [blame] | 685 | seq_printf(m, " seqno: 0x%08x\n", error->seqno[ring]); |
Ben Widawsky | 9574b3f | 2012-04-26 16:03:01 -0700 | [diff] [blame] | 686 | seq_printf(m, " waiting: %s\n", yesno(error->waiting[ring])); |
Daniel Vetter | 7e3b873 | 2012-02-01 22:26:45 +0100 | [diff] [blame] | 687 | seq_printf(m, " ring->head: 0x%08x\n", error->cpu_ring_head[ring]); |
| 688 | seq_printf(m, " ring->tail: 0x%08x\n", error->cpu_ring_tail[ring]); |
Daniel Vetter | d27b1e0 | 2011-12-14 13:57:01 +0100 | [diff] [blame] | 689 | } |
| 690 | |
Daniel Vetter | d544230 | 2012-04-27 15:17:40 +0200 | [diff] [blame] | 691 | struct i915_error_state_file_priv { |
| 692 | struct drm_device *dev; |
| 693 | struct drm_i915_error_state *error; |
| 694 | }; |
| 695 | |
Jesse Barnes | 63eeaf3 | 2009-06-18 16:56:52 -0700 | [diff] [blame] | 696 | static int i915_error_state(struct seq_file *m, void *unused) |
| 697 | { |
Daniel Vetter | d544230 | 2012-04-27 15:17:40 +0200 | [diff] [blame] | 698 | struct i915_error_state_file_priv *error_priv = m->private; |
| 699 | struct drm_device *dev = error_priv->dev; |
Jesse Barnes | 63eeaf3 | 2009-06-18 16:56:52 -0700 | [diff] [blame] | 700 | drm_i915_private_t *dev_priv = dev->dev_private; |
Daniel Vetter | d544230 | 2012-04-27 15:17:40 +0200 | [diff] [blame] | 701 | struct drm_i915_error_state *error = error_priv->error; |
Chris Wilson | 52d39a2 | 2012-02-15 11:25:37 +0000 | [diff] [blame] | 702 | int i, j, page, offset, elt; |
Jesse Barnes | 63eeaf3 | 2009-06-18 16:56:52 -0700 | [diff] [blame] | 703 | |
Daniel Vetter | 742cbee | 2012-04-27 15:17:39 +0200 | [diff] [blame] | 704 | if (!error) { |
Jesse Barnes | 63eeaf3 | 2009-06-18 16:56:52 -0700 | [diff] [blame] | 705 | seq_printf(m, "no error state collected\n"); |
Daniel Vetter | 742cbee | 2012-04-27 15:17:39 +0200 | [diff] [blame] | 706 | return 0; |
Jesse Barnes | 63eeaf3 | 2009-06-18 16:56:52 -0700 | [diff] [blame] | 707 | } |
| 708 | |
Jesse Barnes | 63eeaf3 | 2009-06-18 16:56:52 -0700 | [diff] [blame] | 709 | |
Jesse Barnes | 8a90523 | 2009-07-11 16:48:03 -0400 | [diff] [blame] | 710 | seq_printf(m, "Time: %ld s %ld us\n", error->time.tv_sec, |
| 711 | error->time.tv_usec); |
Chris Wilson | 9df3079 | 2010-02-18 10:24:56 +0000 | [diff] [blame] | 712 | seq_printf(m, "PCI ID: 0x%04x\n", dev->pci_device); |
Chris Wilson | 1d8f38f | 2010-10-29 19:00:51 +0100 | [diff] [blame] | 713 | seq_printf(m, "EIR: 0x%08x\n", error->eir); |
Ben Widawsky | be998e2 | 2012-04-26 16:03:00 -0700 | [diff] [blame] | 714 | seq_printf(m, "IER: 0x%08x\n", error->ier); |
Chris Wilson | 1d8f38f | 2010-10-29 19:00:51 +0100 | [diff] [blame] | 715 | seq_printf(m, "PGTBL_ER: 0x%08x\n", error->pgtbl_er); |
Chris Wilson | 9df3079 | 2010-02-18 10:24:56 +0000 | [diff] [blame] | 716 | |
Daniel Vetter | bf3301a | 2011-05-12 22:17:12 +0100 | [diff] [blame] | 717 | for (i = 0; i < dev_priv->num_fence_regs; i++) |
Chris Wilson | 748ebc6 | 2010-10-24 10:28:47 +0100 | [diff] [blame] | 718 | seq_printf(m, " fence[%d] = %08llx\n", i, error->fence[i]); |
| 719 | |
Daniel Vetter | 33f3f51 | 2011-12-14 13:57:39 +0100 | [diff] [blame] | 720 | if (INTEL_INFO(dev)->gen >= 6) { |
Daniel Vetter | d27b1e0 | 2011-12-14 13:57:01 +0100 | [diff] [blame] | 721 | seq_printf(m, "ERROR: 0x%08x\n", error->error); |
Daniel Vetter | 33f3f51 | 2011-12-14 13:57:39 +0100 | [diff] [blame] | 722 | seq_printf(m, "DONE_REG: 0x%08x\n", error->done_reg); |
| 723 | } |
Daniel Vetter | d27b1e0 | 2011-12-14 13:57:01 +0100 | [diff] [blame] | 724 | |
| 725 | i915_ring_error_state(m, dev, error, RCS); |
| 726 | if (HAS_BLT(dev)) |
| 727 | i915_ring_error_state(m, dev, error, BCS); |
| 728 | if (HAS_BSD(dev)) |
| 729 | i915_ring_error_state(m, dev, error, VCS); |
| 730 | |
Chris Wilson | c724e8a | 2010-11-22 08:07:02 +0000 | [diff] [blame] | 731 | if (error->active_bo) |
| 732 | print_error_buffers(m, "Active", |
| 733 | error->active_bo, |
| 734 | error->active_bo_count); |
Chris Wilson | 9df3079 | 2010-02-18 10:24:56 +0000 | [diff] [blame] | 735 | |
Chris Wilson | c724e8a | 2010-11-22 08:07:02 +0000 | [diff] [blame] | 736 | if (error->pinned_bo) |
| 737 | print_error_buffers(m, "Pinned", |
| 738 | error->pinned_bo, |
| 739 | error->pinned_bo_count); |
Chris Wilson | 9df3079 | 2010-02-18 10:24:56 +0000 | [diff] [blame] | 740 | |
Chris Wilson | 52d39a2 | 2012-02-15 11:25:37 +0000 | [diff] [blame] | 741 | for (i = 0; i < ARRAY_SIZE(error->ring); i++) { |
| 742 | struct drm_i915_error_object *obj; |
Chris Wilson | 9df3079 | 2010-02-18 10:24:56 +0000 | [diff] [blame] | 743 | |
Chris Wilson | 52d39a2 | 2012-02-15 11:25:37 +0000 | [diff] [blame] | 744 | if ((obj = error->ring[i].batchbuffer)) { |
Chris Wilson | bcfb2e2 | 2011-01-07 21:06:07 +0000 | [diff] [blame] | 745 | seq_printf(m, "%s --- gtt_offset = 0x%08x\n", |
| 746 | dev_priv->ring[i].name, |
| 747 | obj->gtt_offset); |
Chris Wilson | 9df3079 | 2010-02-18 10:24:56 +0000 | [diff] [blame] | 748 | offset = 0; |
| 749 | for (page = 0; page < obj->page_count; page++) { |
| 750 | for (elt = 0; elt < PAGE_SIZE/4; elt++) { |
| 751 | seq_printf(m, "%08x : %08x\n", offset, obj->pages[page][elt]); |
| 752 | offset += 4; |
| 753 | } |
| 754 | } |
| 755 | } |
Chris Wilson | 9df3079 | 2010-02-18 10:24:56 +0000 | [diff] [blame] | 756 | |
Chris Wilson | 52d39a2 | 2012-02-15 11:25:37 +0000 | [diff] [blame] | 757 | if (error->ring[i].num_requests) { |
| 758 | seq_printf(m, "%s --- %d requests\n", |
| 759 | dev_priv->ring[i].name, |
| 760 | error->ring[i].num_requests); |
| 761 | for (j = 0; j < error->ring[i].num_requests; j++) { |
Chris Wilson | ee4f42b | 2012-02-15 11:25:38 +0000 | [diff] [blame] | 762 | seq_printf(m, " seqno 0x%08x, emitted %ld, tail 0x%08x\n", |
Chris Wilson | 52d39a2 | 2012-02-15 11:25:37 +0000 | [diff] [blame] | 763 | error->ring[i].requests[j].seqno, |
Chris Wilson | ee4f42b | 2012-02-15 11:25:38 +0000 | [diff] [blame] | 764 | error->ring[i].requests[j].jiffies, |
| 765 | error->ring[i].requests[j].tail); |
Chris Wilson | 52d39a2 | 2012-02-15 11:25:37 +0000 | [diff] [blame] | 766 | } |
| 767 | } |
| 768 | |
| 769 | if ((obj = error->ring[i].ringbuffer)) { |
Chris Wilson | e2f973d | 2011-01-27 19:15:11 +0000 | [diff] [blame] | 770 | seq_printf(m, "%s --- ringbuffer = 0x%08x\n", |
| 771 | dev_priv->ring[i].name, |
| 772 | obj->gtt_offset); |
| 773 | offset = 0; |
| 774 | for (page = 0; page < obj->page_count; page++) { |
| 775 | for (elt = 0; elt < PAGE_SIZE/4; elt++) { |
| 776 | seq_printf(m, "%08x : %08x\n", |
| 777 | offset, |
| 778 | obj->pages[page][elt]); |
| 779 | offset += 4; |
| 780 | } |
Chris Wilson | 9df3079 | 2010-02-18 10:24:56 +0000 | [diff] [blame] | 781 | } |
| 782 | } |
| 783 | } |
Jesse Barnes | 63eeaf3 | 2009-06-18 16:56:52 -0700 | [diff] [blame] | 784 | |
Chris Wilson | 6ef3d42 | 2010-08-04 20:26:07 +0100 | [diff] [blame] | 785 | if (error->overlay) |
| 786 | intel_overlay_print_error_state(m, error->overlay); |
| 787 | |
Chris Wilson | c4a1d9e | 2010-11-21 13:12:35 +0000 | [diff] [blame] | 788 | if (error->display) |
| 789 | intel_display_print_error_state(m, dev, error->display); |
| 790 | |
Jesse Barnes | 63eeaf3 | 2009-06-18 16:56:52 -0700 | [diff] [blame] | 791 | return 0; |
| 792 | } |
Ben Gamari | 6911a9b | 2009-04-02 11:24:54 -0700 | [diff] [blame] | 793 | |
Daniel Vetter | d544230 | 2012-04-27 15:17:40 +0200 | [diff] [blame] | 794 | static ssize_t |
| 795 | i915_error_state_write(struct file *filp, |
| 796 | const char __user *ubuf, |
| 797 | size_t cnt, |
| 798 | loff_t *ppos) |
| 799 | { |
| 800 | struct seq_file *m = filp->private_data; |
| 801 | struct i915_error_state_file_priv *error_priv = m->private; |
| 802 | struct drm_device *dev = error_priv->dev; |
| 803 | |
| 804 | DRM_DEBUG_DRIVER("Resetting error state\n"); |
| 805 | |
| 806 | mutex_lock(&dev->struct_mutex); |
| 807 | i915_destroy_error_state(dev); |
| 808 | mutex_unlock(&dev->struct_mutex); |
| 809 | |
| 810 | return cnt; |
| 811 | } |
| 812 | |
| 813 | static int i915_error_state_open(struct inode *inode, struct file *file) |
| 814 | { |
| 815 | struct drm_device *dev = inode->i_private; |
| 816 | drm_i915_private_t *dev_priv = dev->dev_private; |
| 817 | struct i915_error_state_file_priv *error_priv; |
| 818 | unsigned long flags; |
| 819 | |
| 820 | error_priv = kzalloc(sizeof(*error_priv), GFP_KERNEL); |
| 821 | if (!error_priv) |
| 822 | return -ENOMEM; |
| 823 | |
| 824 | error_priv->dev = dev; |
| 825 | |
| 826 | spin_lock_irqsave(&dev_priv->error_lock, flags); |
| 827 | error_priv->error = dev_priv->first_error; |
| 828 | if (error_priv->error) |
| 829 | kref_get(&error_priv->error->ref); |
| 830 | spin_unlock_irqrestore(&dev_priv->error_lock, flags); |
| 831 | |
| 832 | return single_open(file, i915_error_state, error_priv); |
| 833 | } |
| 834 | |
| 835 | static int i915_error_state_release(struct inode *inode, struct file *file) |
| 836 | { |
| 837 | struct seq_file *m = file->private_data; |
| 838 | struct i915_error_state_file_priv *error_priv = m->private; |
| 839 | |
| 840 | if (error_priv->error) |
| 841 | kref_put(&error_priv->error->ref, i915_error_state_free); |
| 842 | kfree(error_priv); |
| 843 | |
| 844 | return single_release(inode, file); |
| 845 | } |
| 846 | |
| 847 | static const struct file_operations i915_error_state_fops = { |
| 848 | .owner = THIS_MODULE, |
| 849 | .open = i915_error_state_open, |
| 850 | .read = seq_read, |
| 851 | .write = i915_error_state_write, |
| 852 | .llseek = default_llseek, |
| 853 | .release = i915_error_state_release, |
| 854 | }; |
| 855 | |
Jesse Barnes | f97108d | 2010-01-29 11:27:07 -0800 | [diff] [blame] | 856 | static int i915_rstdby_delays(struct seq_file *m, void *unused) |
| 857 | { |
| 858 | struct drm_info_node *node = (struct drm_info_node *) m->private; |
| 859 | struct drm_device *dev = node->minor->dev; |
| 860 | drm_i915_private_t *dev_priv = dev->dev_private; |
Ben Widawsky | 616fdb5 | 2011-10-05 11:44:54 -0700 | [diff] [blame] | 861 | u16 crstanddelay; |
| 862 | int ret; |
| 863 | |
| 864 | ret = mutex_lock_interruptible(&dev->struct_mutex); |
| 865 | if (ret) |
| 866 | return ret; |
| 867 | |
| 868 | crstanddelay = I915_READ16(CRSTANDVID); |
| 869 | |
| 870 | mutex_unlock(&dev->struct_mutex); |
Jesse Barnes | f97108d | 2010-01-29 11:27:07 -0800 | [diff] [blame] | 871 | |
| 872 | seq_printf(m, "w/ctx: %d, w/o ctx: %d\n", (crstanddelay >> 8) & 0x3f, (crstanddelay & 0x3f)); |
| 873 | |
| 874 | return 0; |
| 875 | } |
| 876 | |
| 877 | static int i915_cur_delayinfo(struct seq_file *m, void *unused) |
| 878 | { |
| 879 | struct drm_info_node *node = (struct drm_info_node *) m->private; |
| 880 | struct drm_device *dev = node->minor->dev; |
| 881 | drm_i915_private_t *dev_priv = dev->dev_private; |
Ben Widawsky | d1ebd816 | 2011-04-25 20:11:50 +0100 | [diff] [blame] | 882 | int ret; |
Jesse Barnes | f97108d | 2010-01-29 11:27:07 -0800 | [diff] [blame] | 883 | |
Jesse Barnes | 3b8d8d9 | 2010-12-17 14:19:02 -0800 | [diff] [blame] | 884 | if (IS_GEN5(dev)) { |
| 885 | u16 rgvswctl = I915_READ16(MEMSWCTL); |
| 886 | u16 rgvstat = I915_READ16(MEMSTAT_ILK); |
| 887 | |
| 888 | seq_printf(m, "Requested P-state: %d\n", (rgvswctl >> 8) & 0xf); |
| 889 | seq_printf(m, "Requested VID: %d\n", rgvswctl & 0x3f); |
| 890 | seq_printf(m, "Current VID: %d\n", (rgvstat & MEMSTAT_VID_MASK) >> |
| 891 | MEMSTAT_VID_SHIFT); |
| 892 | seq_printf(m, "Current P-state: %d\n", |
| 893 | (rgvstat & MEMSTAT_PSTATE_MASK) >> MEMSTAT_PSTATE_SHIFT); |
Jesse Barnes | 1c70c0c | 2011-06-29 13:34:36 -0700 | [diff] [blame] | 894 | } else if (IS_GEN6(dev) || IS_GEN7(dev)) { |
Jesse Barnes | 3b8d8d9 | 2010-12-17 14:19:02 -0800 | [diff] [blame] | 895 | u32 gt_perf_status = I915_READ(GEN6_GT_PERF_STATUS); |
| 896 | u32 rp_state_limits = I915_READ(GEN6_RP_STATE_LIMITS); |
| 897 | u32 rp_state_cap = I915_READ(GEN6_RP_STATE_CAP); |
Jesse Barnes | ccab5c8 | 2011-01-18 15:49:25 -0800 | [diff] [blame] | 898 | u32 rpstat; |
| 899 | u32 rpupei, rpcurup, rpprevup; |
| 900 | u32 rpdownei, rpcurdown, rpprevdown; |
Jesse Barnes | 3b8d8d9 | 2010-12-17 14:19:02 -0800 | [diff] [blame] | 901 | int max_freq; |
| 902 | |
| 903 | /* RPSTAT1 is in the GT power well */ |
Ben Widawsky | d1ebd816 | 2011-04-25 20:11:50 +0100 | [diff] [blame] | 904 | ret = mutex_lock_interruptible(&dev->struct_mutex); |
| 905 | if (ret) |
| 906 | return ret; |
| 907 | |
Ben Widawsky | fcca792 | 2011-04-25 11:23:07 -0700 | [diff] [blame] | 908 | gen6_gt_force_wake_get(dev_priv); |
Jesse Barnes | 3b8d8d9 | 2010-12-17 14:19:02 -0800 | [diff] [blame] | 909 | |
Jesse Barnes | ccab5c8 | 2011-01-18 15:49:25 -0800 | [diff] [blame] | 910 | rpstat = I915_READ(GEN6_RPSTAT1); |
| 911 | rpupei = I915_READ(GEN6_RP_CUR_UP_EI); |
| 912 | rpcurup = I915_READ(GEN6_RP_CUR_UP); |
| 913 | rpprevup = I915_READ(GEN6_RP_PREV_UP); |
| 914 | rpdownei = I915_READ(GEN6_RP_CUR_DOWN_EI); |
| 915 | rpcurdown = I915_READ(GEN6_RP_CUR_DOWN); |
| 916 | rpprevdown = I915_READ(GEN6_RP_PREV_DOWN); |
| 917 | |
Ben Widawsky | d1ebd816 | 2011-04-25 20:11:50 +0100 | [diff] [blame] | 918 | gen6_gt_force_wake_put(dev_priv); |
| 919 | mutex_unlock(&dev->struct_mutex); |
| 920 | |
Jesse Barnes | 3b8d8d9 | 2010-12-17 14:19:02 -0800 | [diff] [blame] | 921 | seq_printf(m, "GT_PERF_STATUS: 0x%08x\n", gt_perf_status); |
Jesse Barnes | ccab5c8 | 2011-01-18 15:49:25 -0800 | [diff] [blame] | 922 | seq_printf(m, "RPSTAT1: 0x%08x\n", rpstat); |
Jesse Barnes | 3b8d8d9 | 2010-12-17 14:19:02 -0800 | [diff] [blame] | 923 | seq_printf(m, "Render p-state ratio: %d\n", |
| 924 | (gt_perf_status & 0xff00) >> 8); |
| 925 | seq_printf(m, "Render p-state VID: %d\n", |
| 926 | gt_perf_status & 0xff); |
| 927 | seq_printf(m, "Render p-state limit: %d\n", |
| 928 | rp_state_limits & 0xff); |
Jesse Barnes | ccab5c8 | 2011-01-18 15:49:25 -0800 | [diff] [blame] | 929 | seq_printf(m, "CAGF: %dMHz\n", ((rpstat & GEN6_CAGF_MASK) >> |
Jesse Barnes | e281fca | 2011-03-18 10:32:07 -0700 | [diff] [blame] | 930 | GEN6_CAGF_SHIFT) * 50); |
Jesse Barnes | ccab5c8 | 2011-01-18 15:49:25 -0800 | [diff] [blame] | 931 | seq_printf(m, "RP CUR UP EI: %dus\n", rpupei & |
| 932 | GEN6_CURICONT_MASK); |
| 933 | seq_printf(m, "RP CUR UP: %dus\n", rpcurup & |
| 934 | GEN6_CURBSYTAVG_MASK); |
| 935 | seq_printf(m, "RP PREV UP: %dus\n", rpprevup & |
| 936 | GEN6_CURBSYTAVG_MASK); |
| 937 | seq_printf(m, "RP CUR DOWN EI: %dus\n", rpdownei & |
| 938 | GEN6_CURIAVG_MASK); |
| 939 | seq_printf(m, "RP CUR DOWN: %dus\n", rpcurdown & |
| 940 | GEN6_CURBSYTAVG_MASK); |
| 941 | seq_printf(m, "RP PREV DOWN: %dus\n", rpprevdown & |
| 942 | GEN6_CURBSYTAVG_MASK); |
Jesse Barnes | 3b8d8d9 | 2010-12-17 14:19:02 -0800 | [diff] [blame] | 943 | |
| 944 | max_freq = (rp_state_cap & 0xff0000) >> 16; |
| 945 | seq_printf(m, "Lowest (RPN) frequency: %dMHz\n", |
Jesse Barnes | e281fca | 2011-03-18 10:32:07 -0700 | [diff] [blame] | 946 | max_freq * 50); |
Jesse Barnes | 3b8d8d9 | 2010-12-17 14:19:02 -0800 | [diff] [blame] | 947 | |
| 948 | max_freq = (rp_state_cap & 0xff00) >> 8; |
| 949 | seq_printf(m, "Nominal (RP1) frequency: %dMHz\n", |
Jesse Barnes | e281fca | 2011-03-18 10:32:07 -0700 | [diff] [blame] | 950 | max_freq * 50); |
Jesse Barnes | 3b8d8d9 | 2010-12-17 14:19:02 -0800 | [diff] [blame] | 951 | |
| 952 | max_freq = rp_state_cap & 0xff; |
| 953 | seq_printf(m, "Max non-overclocked (RP0) frequency: %dMHz\n", |
Jesse Barnes | e281fca | 2011-03-18 10:32:07 -0700 | [diff] [blame] | 954 | max_freq * 50); |
Jesse Barnes | 3b8d8d9 | 2010-12-17 14:19:02 -0800 | [diff] [blame] | 955 | } else { |
| 956 | seq_printf(m, "no P-state info available\n"); |
| 957 | } |
Jesse Barnes | f97108d | 2010-01-29 11:27:07 -0800 | [diff] [blame] | 958 | |
| 959 | return 0; |
| 960 | } |
| 961 | |
| 962 | static int i915_delayfreq_table(struct seq_file *m, void *unused) |
| 963 | { |
| 964 | struct drm_info_node *node = (struct drm_info_node *) m->private; |
| 965 | struct drm_device *dev = node->minor->dev; |
| 966 | drm_i915_private_t *dev_priv = dev->dev_private; |
| 967 | u32 delayfreq; |
Ben Widawsky | 616fdb5 | 2011-10-05 11:44:54 -0700 | [diff] [blame] | 968 | int ret, i; |
| 969 | |
| 970 | ret = mutex_lock_interruptible(&dev->struct_mutex); |
| 971 | if (ret) |
| 972 | return ret; |
Jesse Barnes | f97108d | 2010-01-29 11:27:07 -0800 | [diff] [blame] | 973 | |
| 974 | for (i = 0; i < 16; i++) { |
| 975 | delayfreq = I915_READ(PXVFREQ_BASE + i * 4); |
Jesse Barnes | 7648fa9 | 2010-05-20 14:28:11 -0700 | [diff] [blame] | 976 | seq_printf(m, "P%02dVIDFREQ: 0x%08x (VID: %d)\n", i, delayfreq, |
| 977 | (delayfreq & PXVFREQ_PX_MASK) >> PXVFREQ_PX_SHIFT); |
Jesse Barnes | f97108d | 2010-01-29 11:27:07 -0800 | [diff] [blame] | 978 | } |
| 979 | |
Ben Widawsky | 616fdb5 | 2011-10-05 11:44:54 -0700 | [diff] [blame] | 980 | mutex_unlock(&dev->struct_mutex); |
| 981 | |
Jesse Barnes | f97108d | 2010-01-29 11:27:07 -0800 | [diff] [blame] | 982 | return 0; |
| 983 | } |
| 984 | |
| 985 | static inline int MAP_TO_MV(int map) |
| 986 | { |
| 987 | return 1250 - (map * 25); |
| 988 | } |
| 989 | |
| 990 | static int i915_inttoext_table(struct seq_file *m, void *unused) |
| 991 | { |
| 992 | struct drm_info_node *node = (struct drm_info_node *) m->private; |
| 993 | struct drm_device *dev = node->minor->dev; |
| 994 | drm_i915_private_t *dev_priv = dev->dev_private; |
| 995 | u32 inttoext; |
Ben Widawsky | 616fdb5 | 2011-10-05 11:44:54 -0700 | [diff] [blame] | 996 | int ret, i; |
| 997 | |
| 998 | ret = mutex_lock_interruptible(&dev->struct_mutex); |
| 999 | if (ret) |
| 1000 | return ret; |
Jesse Barnes | f97108d | 2010-01-29 11:27:07 -0800 | [diff] [blame] | 1001 | |
| 1002 | for (i = 1; i <= 32; i++) { |
| 1003 | inttoext = I915_READ(INTTOEXT_BASE_ILK + i * 4); |
| 1004 | seq_printf(m, "INTTOEXT%02d: 0x%08x\n", i, inttoext); |
| 1005 | } |
| 1006 | |
Ben Widawsky | 616fdb5 | 2011-10-05 11:44:54 -0700 | [diff] [blame] | 1007 | mutex_unlock(&dev->struct_mutex); |
| 1008 | |
Jesse Barnes | f97108d | 2010-01-29 11:27:07 -0800 | [diff] [blame] | 1009 | return 0; |
| 1010 | } |
| 1011 | |
Ben Widawsky | 4d85529 | 2011-12-12 19:34:16 -0800 | [diff] [blame] | 1012 | static int ironlake_drpc_info(struct seq_file *m) |
Jesse Barnes | f97108d | 2010-01-29 11:27:07 -0800 | [diff] [blame] | 1013 | { |
| 1014 | struct drm_info_node *node = (struct drm_info_node *) m->private; |
| 1015 | struct drm_device *dev = node->minor->dev; |
| 1016 | drm_i915_private_t *dev_priv = dev->dev_private; |
Ben Widawsky | 616fdb5 | 2011-10-05 11:44:54 -0700 | [diff] [blame] | 1017 | u32 rgvmodectl, rstdbyctl; |
| 1018 | u16 crstandvid; |
| 1019 | int ret; |
| 1020 | |
| 1021 | ret = mutex_lock_interruptible(&dev->struct_mutex); |
| 1022 | if (ret) |
| 1023 | return ret; |
| 1024 | |
| 1025 | rgvmodectl = I915_READ(MEMMODECTL); |
| 1026 | rstdbyctl = I915_READ(RSTDBYCTL); |
| 1027 | crstandvid = I915_READ16(CRSTANDVID); |
| 1028 | |
| 1029 | mutex_unlock(&dev->struct_mutex); |
Jesse Barnes | f97108d | 2010-01-29 11:27:07 -0800 | [diff] [blame] | 1030 | |
| 1031 | seq_printf(m, "HD boost: %s\n", (rgvmodectl & MEMMODE_BOOST_EN) ? |
| 1032 | "yes" : "no"); |
| 1033 | seq_printf(m, "Boost freq: %d\n", |
| 1034 | (rgvmodectl & MEMMODE_BOOST_FREQ_MASK) >> |
| 1035 | MEMMODE_BOOST_FREQ_SHIFT); |
| 1036 | seq_printf(m, "HW control enabled: %s\n", |
| 1037 | rgvmodectl & MEMMODE_HWIDLE_EN ? "yes" : "no"); |
| 1038 | seq_printf(m, "SW control enabled: %s\n", |
| 1039 | rgvmodectl & MEMMODE_SWMODE_EN ? "yes" : "no"); |
| 1040 | seq_printf(m, "Gated voltage change: %s\n", |
| 1041 | rgvmodectl & MEMMODE_RCLK_GATE ? "yes" : "no"); |
| 1042 | seq_printf(m, "Starting frequency: P%d\n", |
| 1043 | (rgvmodectl & MEMMODE_FSTART_MASK) >> MEMMODE_FSTART_SHIFT); |
Jesse Barnes | 7648fa9 | 2010-05-20 14:28:11 -0700 | [diff] [blame] | 1044 | seq_printf(m, "Max P-state: P%d\n", |
Jesse Barnes | f97108d | 2010-01-29 11:27:07 -0800 | [diff] [blame] | 1045 | (rgvmodectl & MEMMODE_FMAX_MASK) >> MEMMODE_FMAX_SHIFT); |
Jesse Barnes | 7648fa9 | 2010-05-20 14:28:11 -0700 | [diff] [blame] | 1046 | seq_printf(m, "Min P-state: P%d\n", (rgvmodectl & MEMMODE_FMIN_MASK)); |
| 1047 | seq_printf(m, "RS1 VID: %d\n", (crstandvid & 0x3f)); |
| 1048 | seq_printf(m, "RS2 VID: %d\n", ((crstandvid >> 8) & 0x3f)); |
| 1049 | seq_printf(m, "Render standby enabled: %s\n", |
| 1050 | (rstdbyctl & RCX_SW_EXIT) ? "no" : "yes"); |
Jesse Barnes | 88271da | 2011-01-05 12:01:24 -0800 | [diff] [blame] | 1051 | seq_printf(m, "Current RS state: "); |
| 1052 | switch (rstdbyctl & RSX_STATUS_MASK) { |
| 1053 | case RSX_STATUS_ON: |
| 1054 | seq_printf(m, "on\n"); |
| 1055 | break; |
| 1056 | case RSX_STATUS_RC1: |
| 1057 | seq_printf(m, "RC1\n"); |
| 1058 | break; |
| 1059 | case RSX_STATUS_RC1E: |
| 1060 | seq_printf(m, "RC1E\n"); |
| 1061 | break; |
| 1062 | case RSX_STATUS_RS1: |
| 1063 | seq_printf(m, "RS1\n"); |
| 1064 | break; |
| 1065 | case RSX_STATUS_RS2: |
| 1066 | seq_printf(m, "RS2 (RC6)\n"); |
| 1067 | break; |
| 1068 | case RSX_STATUS_RS3: |
| 1069 | seq_printf(m, "RC3 (RC6+)\n"); |
| 1070 | break; |
| 1071 | default: |
| 1072 | seq_printf(m, "unknown\n"); |
| 1073 | break; |
| 1074 | } |
Jesse Barnes | f97108d | 2010-01-29 11:27:07 -0800 | [diff] [blame] | 1075 | |
| 1076 | return 0; |
| 1077 | } |
| 1078 | |
Ben Widawsky | 4d85529 | 2011-12-12 19:34:16 -0800 | [diff] [blame] | 1079 | static int gen6_drpc_info(struct seq_file *m) |
| 1080 | { |
| 1081 | |
| 1082 | struct drm_info_node *node = (struct drm_info_node *) m->private; |
| 1083 | struct drm_device *dev = node->minor->dev; |
| 1084 | struct drm_i915_private *dev_priv = dev->dev_private; |
| 1085 | u32 rpmodectl1, gt_core_status, rcctl1; |
Daniel Vetter | 93b525d | 2012-01-25 13:52:43 +0100 | [diff] [blame] | 1086 | unsigned forcewake_count; |
Ben Widawsky | 4d85529 | 2011-12-12 19:34:16 -0800 | [diff] [blame] | 1087 | int count=0, ret; |
| 1088 | |
| 1089 | |
| 1090 | ret = mutex_lock_interruptible(&dev->struct_mutex); |
| 1091 | if (ret) |
| 1092 | return ret; |
| 1093 | |
Daniel Vetter | 93b525d | 2012-01-25 13:52:43 +0100 | [diff] [blame] | 1094 | spin_lock_irq(&dev_priv->gt_lock); |
| 1095 | forcewake_count = dev_priv->forcewake_count; |
| 1096 | spin_unlock_irq(&dev_priv->gt_lock); |
| 1097 | |
| 1098 | if (forcewake_count) { |
| 1099 | seq_printf(m, "RC information inaccurate because somebody " |
| 1100 | "holds a forcewake reference \n"); |
Ben Widawsky | 4d85529 | 2011-12-12 19:34:16 -0800 | [diff] [blame] | 1101 | } else { |
| 1102 | /* NB: we cannot use forcewake, else we read the wrong values */ |
| 1103 | while (count++ < 50 && (I915_READ_NOTRACE(FORCEWAKE_ACK) & 1)) |
| 1104 | udelay(10); |
| 1105 | seq_printf(m, "RC information accurate: %s\n", yesno(count < 51)); |
| 1106 | } |
| 1107 | |
| 1108 | gt_core_status = readl(dev_priv->regs + GEN6_GT_CORE_STATUS); |
| 1109 | trace_i915_reg_rw(false, GEN6_GT_CORE_STATUS, gt_core_status, 4); |
| 1110 | |
| 1111 | rpmodectl1 = I915_READ(GEN6_RP_CONTROL); |
| 1112 | rcctl1 = I915_READ(GEN6_RC_CONTROL); |
| 1113 | mutex_unlock(&dev->struct_mutex); |
| 1114 | |
| 1115 | seq_printf(m, "Video Turbo Mode: %s\n", |
| 1116 | yesno(rpmodectl1 & GEN6_RP_MEDIA_TURBO)); |
| 1117 | seq_printf(m, "HW control enabled: %s\n", |
| 1118 | yesno(rpmodectl1 & GEN6_RP_ENABLE)); |
| 1119 | seq_printf(m, "SW control enabled: %s\n", |
| 1120 | yesno((rpmodectl1 & GEN6_RP_MEDIA_MODE_MASK) == |
| 1121 | GEN6_RP_MEDIA_SW_MODE)); |
Eric Anholt | fff24e2 | 2012-01-23 16:14:05 -0800 | [diff] [blame] | 1122 | seq_printf(m, "RC1e Enabled: %s\n", |
Ben Widawsky | 4d85529 | 2011-12-12 19:34:16 -0800 | [diff] [blame] | 1123 | yesno(rcctl1 & GEN6_RC_CTL_RC1e_ENABLE)); |
| 1124 | seq_printf(m, "RC6 Enabled: %s\n", |
| 1125 | yesno(rcctl1 & GEN6_RC_CTL_RC6_ENABLE)); |
| 1126 | seq_printf(m, "Deep RC6 Enabled: %s\n", |
| 1127 | yesno(rcctl1 & GEN6_RC_CTL_RC6p_ENABLE)); |
| 1128 | seq_printf(m, "Deepest RC6 Enabled: %s\n", |
| 1129 | yesno(rcctl1 & GEN6_RC_CTL_RC6pp_ENABLE)); |
| 1130 | seq_printf(m, "Current RC state: "); |
| 1131 | switch (gt_core_status & GEN6_RCn_MASK) { |
| 1132 | case GEN6_RC0: |
| 1133 | if (gt_core_status & GEN6_CORE_CPD_STATE_MASK) |
| 1134 | seq_printf(m, "Core Power Down\n"); |
| 1135 | else |
| 1136 | seq_printf(m, "on\n"); |
| 1137 | break; |
| 1138 | case GEN6_RC3: |
| 1139 | seq_printf(m, "RC3\n"); |
| 1140 | break; |
| 1141 | case GEN6_RC6: |
| 1142 | seq_printf(m, "RC6\n"); |
| 1143 | break; |
| 1144 | case GEN6_RC7: |
| 1145 | seq_printf(m, "RC7\n"); |
| 1146 | break; |
| 1147 | default: |
| 1148 | seq_printf(m, "Unknown\n"); |
| 1149 | break; |
| 1150 | } |
| 1151 | |
| 1152 | seq_printf(m, "Core Power Down: %s\n", |
| 1153 | yesno(gt_core_status & GEN6_CORE_CPD_STATE_MASK)); |
Ben Widawsky | cce66a2 | 2012-03-27 18:59:38 -0700 | [diff] [blame] | 1154 | |
| 1155 | /* Not exactly sure what this is */ |
| 1156 | seq_printf(m, "RC6 \"Locked to RPn\" residency since boot: %u\n", |
| 1157 | I915_READ(GEN6_GT_GFX_RC6_LOCKED)); |
| 1158 | seq_printf(m, "RC6 residency since boot: %u\n", |
| 1159 | I915_READ(GEN6_GT_GFX_RC6)); |
| 1160 | seq_printf(m, "RC6+ residency since boot: %u\n", |
| 1161 | I915_READ(GEN6_GT_GFX_RC6p)); |
| 1162 | seq_printf(m, "RC6++ residency since boot: %u\n", |
| 1163 | I915_READ(GEN6_GT_GFX_RC6pp)); |
| 1164 | |
Ben Widawsky | 4d85529 | 2011-12-12 19:34:16 -0800 | [diff] [blame] | 1165 | return 0; |
| 1166 | } |
| 1167 | |
| 1168 | static int i915_drpc_info(struct seq_file *m, void *unused) |
| 1169 | { |
| 1170 | struct drm_info_node *node = (struct drm_info_node *) m->private; |
| 1171 | struct drm_device *dev = node->minor->dev; |
| 1172 | |
| 1173 | if (IS_GEN6(dev) || IS_GEN7(dev)) |
| 1174 | return gen6_drpc_info(m); |
| 1175 | else |
| 1176 | return ironlake_drpc_info(m); |
| 1177 | } |
| 1178 | |
Jesse Barnes | b5e50c3 | 2010-02-05 12:42:41 -0800 | [diff] [blame] | 1179 | static int i915_fbc_status(struct seq_file *m, void *unused) |
| 1180 | { |
| 1181 | struct drm_info_node *node = (struct drm_info_node *) m->private; |
| 1182 | struct drm_device *dev = node->minor->dev; |
Jesse Barnes | b5e50c3 | 2010-02-05 12:42:41 -0800 | [diff] [blame] | 1183 | drm_i915_private_t *dev_priv = dev->dev_private; |
Jesse Barnes | b5e50c3 | 2010-02-05 12:42:41 -0800 | [diff] [blame] | 1184 | |
Adam Jackson | ee5382a | 2010-04-23 11:17:39 -0400 | [diff] [blame] | 1185 | if (!I915_HAS_FBC(dev)) { |
Jesse Barnes | b5e50c3 | 2010-02-05 12:42:41 -0800 | [diff] [blame] | 1186 | seq_printf(m, "FBC unsupported on this chipset\n"); |
| 1187 | return 0; |
| 1188 | } |
| 1189 | |
Adam Jackson | ee5382a | 2010-04-23 11:17:39 -0400 | [diff] [blame] | 1190 | if (intel_fbc_enabled(dev)) { |
Jesse Barnes | b5e50c3 | 2010-02-05 12:42:41 -0800 | [diff] [blame] | 1191 | seq_printf(m, "FBC enabled\n"); |
| 1192 | } else { |
| 1193 | seq_printf(m, "FBC disabled: "); |
| 1194 | switch (dev_priv->no_fbc_reason) { |
Chris Wilson | bed4a67 | 2010-09-11 10:47:47 +0100 | [diff] [blame] | 1195 | case FBC_NO_OUTPUT: |
| 1196 | seq_printf(m, "no outputs"); |
| 1197 | break; |
Jesse Barnes | b5e50c3 | 2010-02-05 12:42:41 -0800 | [diff] [blame] | 1198 | case FBC_STOLEN_TOO_SMALL: |
| 1199 | seq_printf(m, "not enough stolen memory"); |
| 1200 | break; |
| 1201 | case FBC_UNSUPPORTED_MODE: |
| 1202 | seq_printf(m, "mode not supported"); |
| 1203 | break; |
| 1204 | case FBC_MODE_TOO_LARGE: |
| 1205 | seq_printf(m, "mode too large"); |
| 1206 | break; |
| 1207 | case FBC_BAD_PLANE: |
| 1208 | seq_printf(m, "FBC unsupported on plane"); |
| 1209 | break; |
| 1210 | case FBC_NOT_TILED: |
| 1211 | seq_printf(m, "scanout buffer not tiled"); |
| 1212 | break; |
Jesse Barnes | 9c928d1 | 2010-07-23 15:20:00 -0700 | [diff] [blame] | 1213 | case FBC_MULTIPLE_PIPES: |
| 1214 | seq_printf(m, "multiple pipes are enabled"); |
| 1215 | break; |
Jesse Barnes | c1a9f04 | 2011-05-05 15:24:21 -0700 | [diff] [blame] | 1216 | case FBC_MODULE_PARAM: |
| 1217 | seq_printf(m, "disabled per module param (default off)"); |
| 1218 | break; |
Jesse Barnes | b5e50c3 | 2010-02-05 12:42:41 -0800 | [diff] [blame] | 1219 | default: |
| 1220 | seq_printf(m, "unknown reason"); |
| 1221 | } |
| 1222 | seq_printf(m, "\n"); |
| 1223 | } |
| 1224 | return 0; |
| 1225 | } |
| 1226 | |
Jesse Barnes | 4a9bef3 | 2010-02-05 12:47:35 -0800 | [diff] [blame] | 1227 | static int i915_sr_status(struct seq_file *m, void *unused) |
| 1228 | { |
| 1229 | struct drm_info_node *node = (struct drm_info_node *) m->private; |
| 1230 | struct drm_device *dev = node->minor->dev; |
| 1231 | drm_i915_private_t *dev_priv = dev->dev_private; |
| 1232 | bool sr_enabled = false; |
| 1233 | |
Yuanhan Liu | 1398261 | 2010-12-15 15:42:31 +0800 | [diff] [blame] | 1234 | if (HAS_PCH_SPLIT(dev)) |
Chris Wilson | 5ba2aaa | 2010-08-19 18:04:08 +0100 | [diff] [blame] | 1235 | sr_enabled = I915_READ(WM1_LP_ILK) & WM1_LP_SR_EN; |
Chris Wilson | a6c45cf | 2010-09-17 00:32:17 +0100 | [diff] [blame] | 1236 | else if (IS_CRESTLINE(dev) || IS_I945G(dev) || IS_I945GM(dev)) |
Jesse Barnes | 4a9bef3 | 2010-02-05 12:47:35 -0800 | [diff] [blame] | 1237 | sr_enabled = I915_READ(FW_BLC_SELF) & FW_BLC_SELF_EN; |
| 1238 | else if (IS_I915GM(dev)) |
| 1239 | sr_enabled = I915_READ(INSTPM) & INSTPM_SELF_EN; |
| 1240 | else if (IS_PINEVIEW(dev)) |
| 1241 | sr_enabled = I915_READ(DSPFW3) & PINEVIEW_SELF_REFRESH_EN; |
| 1242 | |
Chris Wilson | 5ba2aaa | 2010-08-19 18:04:08 +0100 | [diff] [blame] | 1243 | seq_printf(m, "self-refresh: %s\n", |
| 1244 | sr_enabled ? "enabled" : "disabled"); |
Jesse Barnes | 4a9bef3 | 2010-02-05 12:47:35 -0800 | [diff] [blame] | 1245 | |
| 1246 | return 0; |
| 1247 | } |
| 1248 | |
Jesse Barnes | 7648fa9 | 2010-05-20 14:28:11 -0700 | [diff] [blame] | 1249 | static int i915_emon_status(struct seq_file *m, void *unused) |
| 1250 | { |
| 1251 | struct drm_info_node *node = (struct drm_info_node *) m->private; |
| 1252 | struct drm_device *dev = node->minor->dev; |
| 1253 | drm_i915_private_t *dev_priv = dev->dev_private; |
| 1254 | unsigned long temp, chipset, gfx; |
Chris Wilson | de227ef | 2010-07-03 07:58:38 +0100 | [diff] [blame] | 1255 | int ret; |
| 1256 | |
Chris Wilson | 582be6b | 2012-04-30 19:35:02 +0100 | [diff] [blame] | 1257 | if (!IS_GEN5(dev)) |
| 1258 | return -ENODEV; |
| 1259 | |
Chris Wilson | de227ef | 2010-07-03 07:58:38 +0100 | [diff] [blame] | 1260 | ret = mutex_lock_interruptible(&dev->struct_mutex); |
| 1261 | if (ret) |
| 1262 | return ret; |
Jesse Barnes | 7648fa9 | 2010-05-20 14:28:11 -0700 | [diff] [blame] | 1263 | |
| 1264 | temp = i915_mch_val(dev_priv); |
| 1265 | chipset = i915_chipset_val(dev_priv); |
| 1266 | gfx = i915_gfx_val(dev_priv); |
Chris Wilson | de227ef | 2010-07-03 07:58:38 +0100 | [diff] [blame] | 1267 | mutex_unlock(&dev->struct_mutex); |
Jesse Barnes | 7648fa9 | 2010-05-20 14:28:11 -0700 | [diff] [blame] | 1268 | |
| 1269 | seq_printf(m, "GMCH temp: %ld\n", temp); |
| 1270 | seq_printf(m, "Chipset power: %ld\n", chipset); |
| 1271 | seq_printf(m, "GFX power: %ld\n", gfx); |
| 1272 | seq_printf(m, "Total power: %ld\n", chipset + gfx); |
| 1273 | |
| 1274 | return 0; |
| 1275 | } |
| 1276 | |
Jesse Barnes | 23b2f8b | 2011-06-28 13:04:16 -0700 | [diff] [blame] | 1277 | static int i915_ring_freq_table(struct seq_file *m, void *unused) |
| 1278 | { |
| 1279 | struct drm_info_node *node = (struct drm_info_node *) m->private; |
| 1280 | struct drm_device *dev = node->minor->dev; |
| 1281 | drm_i915_private_t *dev_priv = dev->dev_private; |
| 1282 | int ret; |
| 1283 | int gpu_freq, ia_freq; |
| 1284 | |
Jesse Barnes | 1c70c0c | 2011-06-29 13:34:36 -0700 | [diff] [blame] | 1285 | if (!(IS_GEN6(dev) || IS_GEN7(dev))) { |
Jesse Barnes | 23b2f8b | 2011-06-28 13:04:16 -0700 | [diff] [blame] | 1286 | seq_printf(m, "unsupported on this chipset\n"); |
| 1287 | return 0; |
| 1288 | } |
| 1289 | |
| 1290 | ret = mutex_lock_interruptible(&dev->struct_mutex); |
| 1291 | if (ret) |
| 1292 | return ret; |
| 1293 | |
| 1294 | seq_printf(m, "GPU freq (MHz)\tEffective CPU freq (MHz)\n"); |
| 1295 | |
| 1296 | for (gpu_freq = dev_priv->min_delay; gpu_freq <= dev_priv->max_delay; |
| 1297 | gpu_freq++) { |
| 1298 | I915_WRITE(GEN6_PCODE_DATA, gpu_freq); |
| 1299 | I915_WRITE(GEN6_PCODE_MAILBOX, GEN6_PCODE_READY | |
| 1300 | GEN6_PCODE_READ_MIN_FREQ_TABLE); |
| 1301 | if (wait_for((I915_READ(GEN6_PCODE_MAILBOX) & |
| 1302 | GEN6_PCODE_READY) == 0, 10)) { |
| 1303 | DRM_ERROR("pcode read of freq table timed out\n"); |
| 1304 | continue; |
| 1305 | } |
| 1306 | ia_freq = I915_READ(GEN6_PCODE_DATA); |
| 1307 | seq_printf(m, "%d\t\t%d\n", gpu_freq * 50, ia_freq * 100); |
| 1308 | } |
| 1309 | |
| 1310 | mutex_unlock(&dev->struct_mutex); |
| 1311 | |
| 1312 | return 0; |
| 1313 | } |
| 1314 | |
Jesse Barnes | 7648fa9 | 2010-05-20 14:28:11 -0700 | [diff] [blame] | 1315 | static int i915_gfxec(struct seq_file *m, void *unused) |
| 1316 | { |
| 1317 | struct drm_info_node *node = (struct drm_info_node *) m->private; |
| 1318 | struct drm_device *dev = node->minor->dev; |
| 1319 | drm_i915_private_t *dev_priv = dev->dev_private; |
Ben Widawsky | 616fdb5 | 2011-10-05 11:44:54 -0700 | [diff] [blame] | 1320 | int ret; |
| 1321 | |
| 1322 | ret = mutex_lock_interruptible(&dev->struct_mutex); |
| 1323 | if (ret) |
| 1324 | return ret; |
Jesse Barnes | 7648fa9 | 2010-05-20 14:28:11 -0700 | [diff] [blame] | 1325 | |
| 1326 | seq_printf(m, "GFXEC: %ld\n", (unsigned long)I915_READ(0x112f4)); |
| 1327 | |
Ben Widawsky | 616fdb5 | 2011-10-05 11:44:54 -0700 | [diff] [blame] | 1328 | mutex_unlock(&dev->struct_mutex); |
| 1329 | |
Jesse Barnes | 7648fa9 | 2010-05-20 14:28:11 -0700 | [diff] [blame] | 1330 | return 0; |
| 1331 | } |
| 1332 | |
Chris Wilson | 44834a6 | 2010-08-19 16:09:23 +0100 | [diff] [blame] | 1333 | static int i915_opregion(struct seq_file *m, void *unused) |
| 1334 | { |
| 1335 | struct drm_info_node *node = (struct drm_info_node *) m->private; |
| 1336 | struct drm_device *dev = node->minor->dev; |
| 1337 | drm_i915_private_t *dev_priv = dev->dev_private; |
| 1338 | struct intel_opregion *opregion = &dev_priv->opregion; |
Daniel Vetter | 0d38f00 | 2012-04-21 22:49:10 +0200 | [diff] [blame] | 1339 | void *data = kmalloc(OPREGION_SIZE, GFP_KERNEL); |
Chris Wilson | 44834a6 | 2010-08-19 16:09:23 +0100 | [diff] [blame] | 1340 | int ret; |
| 1341 | |
Daniel Vetter | 0d38f00 | 2012-04-21 22:49:10 +0200 | [diff] [blame] | 1342 | if (data == NULL) |
| 1343 | return -ENOMEM; |
| 1344 | |
Chris Wilson | 44834a6 | 2010-08-19 16:09:23 +0100 | [diff] [blame] | 1345 | ret = mutex_lock_interruptible(&dev->struct_mutex); |
| 1346 | if (ret) |
Daniel Vetter | 0d38f00 | 2012-04-21 22:49:10 +0200 | [diff] [blame] | 1347 | goto out; |
Chris Wilson | 44834a6 | 2010-08-19 16:09:23 +0100 | [diff] [blame] | 1348 | |
Daniel Vetter | 0d38f00 | 2012-04-21 22:49:10 +0200 | [diff] [blame] | 1349 | if (opregion->header) { |
| 1350 | memcpy_fromio(data, opregion->header, OPREGION_SIZE); |
| 1351 | seq_write(m, data, OPREGION_SIZE); |
| 1352 | } |
Chris Wilson | 44834a6 | 2010-08-19 16:09:23 +0100 | [diff] [blame] | 1353 | |
| 1354 | mutex_unlock(&dev->struct_mutex); |
| 1355 | |
Daniel Vetter | 0d38f00 | 2012-04-21 22:49:10 +0200 | [diff] [blame] | 1356 | out: |
| 1357 | kfree(data); |
Chris Wilson | 44834a6 | 2010-08-19 16:09:23 +0100 | [diff] [blame] | 1358 | return 0; |
| 1359 | } |
| 1360 | |
Chris Wilson | 37811fc | 2010-08-25 22:45:57 +0100 | [diff] [blame] | 1361 | static int i915_gem_framebuffer_info(struct seq_file *m, void *data) |
| 1362 | { |
| 1363 | struct drm_info_node *node = (struct drm_info_node *) m->private; |
| 1364 | struct drm_device *dev = node->minor->dev; |
| 1365 | drm_i915_private_t *dev_priv = dev->dev_private; |
| 1366 | struct intel_fbdev *ifbdev; |
| 1367 | struct intel_framebuffer *fb; |
| 1368 | int ret; |
| 1369 | |
| 1370 | ret = mutex_lock_interruptible(&dev->mode_config.mutex); |
| 1371 | if (ret) |
| 1372 | return ret; |
| 1373 | |
| 1374 | ifbdev = dev_priv->fbdev; |
| 1375 | fb = to_intel_framebuffer(ifbdev->helper.fb); |
| 1376 | |
| 1377 | seq_printf(m, "fbcon size: %d x %d, depth %d, %d bpp, obj ", |
| 1378 | fb->base.width, |
| 1379 | fb->base.height, |
| 1380 | fb->base.depth, |
| 1381 | fb->base.bits_per_pixel); |
Chris Wilson | 05394f3 | 2010-11-08 19:18:58 +0000 | [diff] [blame] | 1382 | describe_obj(m, fb->obj); |
Chris Wilson | 37811fc | 2010-08-25 22:45:57 +0100 | [diff] [blame] | 1383 | seq_printf(m, "\n"); |
| 1384 | |
| 1385 | list_for_each_entry(fb, &dev->mode_config.fb_list, base.head) { |
| 1386 | if (&fb->base == ifbdev->helper.fb) |
| 1387 | continue; |
| 1388 | |
| 1389 | seq_printf(m, "user size: %d x %d, depth %d, %d bpp, obj ", |
| 1390 | fb->base.width, |
| 1391 | fb->base.height, |
| 1392 | fb->base.depth, |
| 1393 | fb->base.bits_per_pixel); |
Chris Wilson | 05394f3 | 2010-11-08 19:18:58 +0000 | [diff] [blame] | 1394 | describe_obj(m, fb->obj); |
Chris Wilson | 37811fc | 2010-08-25 22:45:57 +0100 | [diff] [blame] | 1395 | seq_printf(m, "\n"); |
| 1396 | } |
| 1397 | |
| 1398 | mutex_unlock(&dev->mode_config.mutex); |
| 1399 | |
| 1400 | return 0; |
| 1401 | } |
| 1402 | |
Ben Widawsky | e76d363 | 2011-03-19 18:14:29 -0700 | [diff] [blame] | 1403 | static int i915_context_status(struct seq_file *m, void *unused) |
| 1404 | { |
| 1405 | struct drm_info_node *node = (struct drm_info_node *) m->private; |
| 1406 | struct drm_device *dev = node->minor->dev; |
| 1407 | drm_i915_private_t *dev_priv = dev->dev_private; |
| 1408 | int ret; |
| 1409 | |
| 1410 | ret = mutex_lock_interruptible(&dev->mode_config.mutex); |
| 1411 | if (ret) |
| 1412 | return ret; |
| 1413 | |
Ben Widawsky | dc501fb | 2011-06-29 11:41:51 -0700 | [diff] [blame] | 1414 | if (dev_priv->pwrctx) { |
| 1415 | seq_printf(m, "power context "); |
| 1416 | describe_obj(m, dev_priv->pwrctx); |
| 1417 | seq_printf(m, "\n"); |
| 1418 | } |
Ben Widawsky | e76d363 | 2011-03-19 18:14:29 -0700 | [diff] [blame] | 1419 | |
Ben Widawsky | dc501fb | 2011-06-29 11:41:51 -0700 | [diff] [blame] | 1420 | if (dev_priv->renderctx) { |
| 1421 | seq_printf(m, "render context "); |
| 1422 | describe_obj(m, dev_priv->renderctx); |
| 1423 | seq_printf(m, "\n"); |
| 1424 | } |
Ben Widawsky | e76d363 | 2011-03-19 18:14:29 -0700 | [diff] [blame] | 1425 | |
| 1426 | mutex_unlock(&dev->mode_config.mutex); |
| 1427 | |
| 1428 | return 0; |
| 1429 | } |
| 1430 | |
Ben Widawsky | 6d794d4 | 2011-04-25 11:25:56 -0700 | [diff] [blame] | 1431 | static int i915_gen6_forcewake_count_info(struct seq_file *m, void *data) |
| 1432 | { |
| 1433 | struct drm_info_node *node = (struct drm_info_node *) m->private; |
| 1434 | struct drm_device *dev = node->minor->dev; |
| 1435 | struct drm_i915_private *dev_priv = dev->dev_private; |
Daniel Vetter | 9f1f46a | 2011-12-14 13:57:03 +0100 | [diff] [blame] | 1436 | unsigned forcewake_count; |
Ben Widawsky | 6d794d4 | 2011-04-25 11:25:56 -0700 | [diff] [blame] | 1437 | |
Daniel Vetter | 9f1f46a | 2011-12-14 13:57:03 +0100 | [diff] [blame] | 1438 | spin_lock_irq(&dev_priv->gt_lock); |
| 1439 | forcewake_count = dev_priv->forcewake_count; |
| 1440 | spin_unlock_irq(&dev_priv->gt_lock); |
| 1441 | |
| 1442 | seq_printf(m, "forcewake count = %u\n", forcewake_count); |
Ben Widawsky | 6d794d4 | 2011-04-25 11:25:56 -0700 | [diff] [blame] | 1443 | |
| 1444 | return 0; |
| 1445 | } |
| 1446 | |
Daniel Vetter | ea16a3c | 2011-12-14 13:57:16 +0100 | [diff] [blame] | 1447 | static const char *swizzle_string(unsigned swizzle) |
| 1448 | { |
| 1449 | switch(swizzle) { |
| 1450 | case I915_BIT_6_SWIZZLE_NONE: |
| 1451 | return "none"; |
| 1452 | case I915_BIT_6_SWIZZLE_9: |
| 1453 | return "bit9"; |
| 1454 | case I915_BIT_6_SWIZZLE_9_10: |
| 1455 | return "bit9/bit10"; |
| 1456 | case I915_BIT_6_SWIZZLE_9_11: |
| 1457 | return "bit9/bit11"; |
| 1458 | case I915_BIT_6_SWIZZLE_9_10_11: |
| 1459 | return "bit9/bit10/bit11"; |
| 1460 | case I915_BIT_6_SWIZZLE_9_17: |
| 1461 | return "bit9/bit17"; |
| 1462 | case I915_BIT_6_SWIZZLE_9_10_17: |
| 1463 | return "bit9/bit10/bit17"; |
| 1464 | case I915_BIT_6_SWIZZLE_UNKNOWN: |
| 1465 | return "unkown"; |
| 1466 | } |
| 1467 | |
| 1468 | return "bug"; |
| 1469 | } |
| 1470 | |
| 1471 | static int i915_swizzle_info(struct seq_file *m, void *data) |
| 1472 | { |
| 1473 | struct drm_info_node *node = (struct drm_info_node *) m->private; |
| 1474 | struct drm_device *dev = node->minor->dev; |
| 1475 | struct drm_i915_private *dev_priv = dev->dev_private; |
| 1476 | |
| 1477 | mutex_lock(&dev->struct_mutex); |
| 1478 | seq_printf(m, "bit6 swizzle for X-tiling = %s\n", |
| 1479 | swizzle_string(dev_priv->mm.bit_6_swizzle_x)); |
| 1480 | seq_printf(m, "bit6 swizzle for Y-tiling = %s\n", |
| 1481 | swizzle_string(dev_priv->mm.bit_6_swizzle_y)); |
| 1482 | |
| 1483 | if (IS_GEN3(dev) || IS_GEN4(dev)) { |
| 1484 | seq_printf(m, "DDC = 0x%08x\n", |
| 1485 | I915_READ(DCC)); |
| 1486 | seq_printf(m, "C0DRB3 = 0x%04x\n", |
| 1487 | I915_READ16(C0DRB3)); |
| 1488 | seq_printf(m, "C1DRB3 = 0x%04x\n", |
| 1489 | I915_READ16(C1DRB3)); |
Daniel Vetter | 3fa7d23 | 2012-01-31 16:47:56 +0100 | [diff] [blame] | 1490 | } else if (IS_GEN6(dev) || IS_GEN7(dev)) { |
| 1491 | seq_printf(m, "MAD_DIMM_C0 = 0x%08x\n", |
| 1492 | I915_READ(MAD_DIMM_C0)); |
| 1493 | seq_printf(m, "MAD_DIMM_C1 = 0x%08x\n", |
| 1494 | I915_READ(MAD_DIMM_C1)); |
| 1495 | seq_printf(m, "MAD_DIMM_C2 = 0x%08x\n", |
| 1496 | I915_READ(MAD_DIMM_C2)); |
| 1497 | seq_printf(m, "TILECTL = 0x%08x\n", |
| 1498 | I915_READ(TILECTL)); |
| 1499 | seq_printf(m, "ARB_MODE = 0x%08x\n", |
| 1500 | I915_READ(ARB_MODE)); |
| 1501 | seq_printf(m, "DISP_ARB_CTL = 0x%08x\n", |
| 1502 | I915_READ(DISP_ARB_CTL)); |
Daniel Vetter | ea16a3c | 2011-12-14 13:57:16 +0100 | [diff] [blame] | 1503 | } |
| 1504 | mutex_unlock(&dev->struct_mutex); |
| 1505 | |
| 1506 | return 0; |
| 1507 | } |
| 1508 | |
Daniel Vetter | 3cf17fc | 2012-02-09 17:15:49 +0100 | [diff] [blame] | 1509 | static int i915_ppgtt_info(struct seq_file *m, void *data) |
| 1510 | { |
| 1511 | struct drm_info_node *node = (struct drm_info_node *) m->private; |
| 1512 | struct drm_device *dev = node->minor->dev; |
| 1513 | struct drm_i915_private *dev_priv = dev->dev_private; |
| 1514 | struct intel_ring_buffer *ring; |
| 1515 | int i, ret; |
| 1516 | |
| 1517 | |
| 1518 | ret = mutex_lock_interruptible(&dev->struct_mutex); |
| 1519 | if (ret) |
| 1520 | return ret; |
| 1521 | if (INTEL_INFO(dev)->gen == 6) |
| 1522 | seq_printf(m, "GFX_MODE: 0x%08x\n", I915_READ(GFX_MODE)); |
| 1523 | |
| 1524 | for (i = 0; i < I915_NUM_RINGS; i++) { |
| 1525 | ring = &dev_priv->ring[i]; |
| 1526 | |
| 1527 | seq_printf(m, "%s\n", ring->name); |
| 1528 | if (INTEL_INFO(dev)->gen == 7) |
| 1529 | seq_printf(m, "GFX_MODE: 0x%08x\n", I915_READ(RING_MODE_GEN7(ring))); |
| 1530 | seq_printf(m, "PP_DIR_BASE: 0x%08x\n", I915_READ(RING_PP_DIR_BASE(ring))); |
| 1531 | seq_printf(m, "PP_DIR_BASE_READ: 0x%08x\n", I915_READ(RING_PP_DIR_BASE_READ(ring))); |
| 1532 | seq_printf(m, "PP_DIR_DCLV: 0x%08x\n", I915_READ(RING_PP_DIR_DCLV(ring))); |
| 1533 | } |
| 1534 | if (dev_priv->mm.aliasing_ppgtt) { |
| 1535 | struct i915_hw_ppgtt *ppgtt = dev_priv->mm.aliasing_ppgtt; |
| 1536 | |
| 1537 | seq_printf(m, "aliasing PPGTT:\n"); |
| 1538 | seq_printf(m, "pd gtt offset: 0x%08x\n", ppgtt->pd_offset); |
| 1539 | } |
| 1540 | seq_printf(m, "ECOCHK: 0x%08x\n", I915_READ(GAM_ECOCHK)); |
| 1541 | mutex_unlock(&dev->struct_mutex); |
| 1542 | |
| 1543 | return 0; |
| 1544 | } |
| 1545 | |
Jesse Barnes | 57f350b | 2012-03-28 13:39:25 -0700 | [diff] [blame] | 1546 | static int i915_dpio_info(struct seq_file *m, void *data) |
| 1547 | { |
| 1548 | struct drm_info_node *node = (struct drm_info_node *) m->private; |
| 1549 | struct drm_device *dev = node->minor->dev; |
| 1550 | struct drm_i915_private *dev_priv = dev->dev_private; |
| 1551 | int ret; |
| 1552 | |
| 1553 | |
| 1554 | if (!IS_VALLEYVIEW(dev)) { |
| 1555 | seq_printf(m, "unsupported\n"); |
| 1556 | return 0; |
| 1557 | } |
| 1558 | |
| 1559 | ret = mutex_lock_interruptible(&dev->mode_config.mutex); |
| 1560 | if (ret) |
| 1561 | return ret; |
| 1562 | |
| 1563 | seq_printf(m, "DPIO_CTL: 0x%08x\n", I915_READ(DPIO_CTL)); |
| 1564 | |
| 1565 | seq_printf(m, "DPIO_DIV_A: 0x%08x\n", |
| 1566 | intel_dpio_read(dev_priv, _DPIO_DIV_A)); |
| 1567 | seq_printf(m, "DPIO_DIV_B: 0x%08x\n", |
| 1568 | intel_dpio_read(dev_priv, _DPIO_DIV_B)); |
| 1569 | |
| 1570 | seq_printf(m, "DPIO_REFSFR_A: 0x%08x\n", |
| 1571 | intel_dpio_read(dev_priv, _DPIO_REFSFR_A)); |
| 1572 | seq_printf(m, "DPIO_REFSFR_B: 0x%08x\n", |
| 1573 | intel_dpio_read(dev_priv, _DPIO_REFSFR_B)); |
| 1574 | |
| 1575 | seq_printf(m, "DPIO_CORE_CLK_A: 0x%08x\n", |
| 1576 | intel_dpio_read(dev_priv, _DPIO_CORE_CLK_A)); |
| 1577 | seq_printf(m, "DPIO_CORE_CLK_B: 0x%08x\n", |
| 1578 | intel_dpio_read(dev_priv, _DPIO_CORE_CLK_B)); |
| 1579 | |
| 1580 | seq_printf(m, "DPIO_LFP_COEFF_A: 0x%08x\n", |
| 1581 | intel_dpio_read(dev_priv, _DPIO_LFP_COEFF_A)); |
| 1582 | seq_printf(m, "DPIO_LFP_COEFF_B: 0x%08x\n", |
| 1583 | intel_dpio_read(dev_priv, _DPIO_LFP_COEFF_B)); |
| 1584 | |
| 1585 | seq_printf(m, "DPIO_FASTCLK_DISABLE: 0x%08x\n", |
| 1586 | intel_dpio_read(dev_priv, DPIO_FASTCLK_DISABLE)); |
| 1587 | |
| 1588 | mutex_unlock(&dev->mode_config.mutex); |
| 1589 | |
| 1590 | return 0; |
| 1591 | } |
| 1592 | |
Chris Wilson | f3cd474 | 2009-10-13 22:20:20 +0100 | [diff] [blame] | 1593 | static ssize_t |
| 1594 | i915_wedged_read(struct file *filp, |
| 1595 | char __user *ubuf, |
| 1596 | size_t max, |
| 1597 | loff_t *ppos) |
| 1598 | { |
| 1599 | struct drm_device *dev = filp->private_data; |
| 1600 | drm_i915_private_t *dev_priv = dev->dev_private; |
| 1601 | char buf[80]; |
| 1602 | int len; |
| 1603 | |
Akshay Joshi | 0206e35 | 2011-08-16 15:34:10 -0400 | [diff] [blame] | 1604 | len = snprintf(buf, sizeof(buf), |
Chris Wilson | f3cd474 | 2009-10-13 22:20:20 +0100 | [diff] [blame] | 1605 | "wedged : %d\n", |
| 1606 | atomic_read(&dev_priv->mm.wedged)); |
| 1607 | |
Akshay Joshi | 0206e35 | 2011-08-16 15:34:10 -0400 | [diff] [blame] | 1608 | if (len > sizeof(buf)) |
| 1609 | len = sizeof(buf); |
Dan Carpenter | f4433a8 | 2010-09-08 21:44:47 +0200 | [diff] [blame] | 1610 | |
Chris Wilson | f3cd474 | 2009-10-13 22:20:20 +0100 | [diff] [blame] | 1611 | return simple_read_from_buffer(ubuf, max, ppos, buf, len); |
| 1612 | } |
| 1613 | |
| 1614 | static ssize_t |
| 1615 | i915_wedged_write(struct file *filp, |
| 1616 | const char __user *ubuf, |
| 1617 | size_t cnt, |
| 1618 | loff_t *ppos) |
| 1619 | { |
| 1620 | struct drm_device *dev = filp->private_data; |
Chris Wilson | f3cd474 | 2009-10-13 22:20:20 +0100 | [diff] [blame] | 1621 | char buf[20]; |
| 1622 | int val = 1; |
| 1623 | |
| 1624 | if (cnt > 0) { |
Akshay Joshi | 0206e35 | 2011-08-16 15:34:10 -0400 | [diff] [blame] | 1625 | if (cnt > sizeof(buf) - 1) |
Chris Wilson | f3cd474 | 2009-10-13 22:20:20 +0100 | [diff] [blame] | 1626 | return -EINVAL; |
| 1627 | |
| 1628 | if (copy_from_user(buf, ubuf, cnt)) |
| 1629 | return -EFAULT; |
| 1630 | buf[cnt] = 0; |
| 1631 | |
| 1632 | val = simple_strtoul(buf, NULL, 0); |
| 1633 | } |
| 1634 | |
| 1635 | DRM_INFO("Manually setting wedged to %d\n", val); |
Chris Wilson | 527f9e9 | 2010-11-11 01:16:58 +0000 | [diff] [blame] | 1636 | i915_handle_error(dev, val); |
Chris Wilson | f3cd474 | 2009-10-13 22:20:20 +0100 | [diff] [blame] | 1637 | |
| 1638 | return cnt; |
| 1639 | } |
| 1640 | |
| 1641 | static const struct file_operations i915_wedged_fops = { |
| 1642 | .owner = THIS_MODULE, |
Stephen Boyd | 234e340 | 2012-04-05 14:25:11 -0700 | [diff] [blame] | 1643 | .open = simple_open, |
Chris Wilson | f3cd474 | 2009-10-13 22:20:20 +0100 | [diff] [blame] | 1644 | .read = i915_wedged_read, |
| 1645 | .write = i915_wedged_write, |
Arnd Bergmann | 6038f37 | 2010-08-15 18:52:59 +0200 | [diff] [blame] | 1646 | .llseek = default_llseek, |
Chris Wilson | f3cd474 | 2009-10-13 22:20:20 +0100 | [diff] [blame] | 1647 | }; |
| 1648 | |
Jesse Barnes | 358733e | 2011-07-27 11:53:01 -0700 | [diff] [blame] | 1649 | static ssize_t |
Daniel Vetter | e5eb3d6 | 2012-05-03 14:48:16 +0200 | [diff] [blame] | 1650 | i915_ring_stop_read(struct file *filp, |
| 1651 | char __user *ubuf, |
| 1652 | size_t max, |
| 1653 | loff_t *ppos) |
| 1654 | { |
| 1655 | struct drm_device *dev = filp->private_data; |
| 1656 | drm_i915_private_t *dev_priv = dev->dev_private; |
| 1657 | char buf[20]; |
| 1658 | int len; |
| 1659 | |
| 1660 | len = snprintf(buf, sizeof(buf), |
| 1661 | "0x%08x\n", dev_priv->stop_rings); |
| 1662 | |
| 1663 | if (len > sizeof(buf)) |
| 1664 | len = sizeof(buf); |
| 1665 | |
| 1666 | return simple_read_from_buffer(ubuf, max, ppos, buf, len); |
| 1667 | } |
| 1668 | |
| 1669 | static ssize_t |
| 1670 | i915_ring_stop_write(struct file *filp, |
| 1671 | const char __user *ubuf, |
| 1672 | size_t cnt, |
| 1673 | loff_t *ppos) |
| 1674 | { |
| 1675 | struct drm_device *dev = filp->private_data; |
| 1676 | struct drm_i915_private *dev_priv = dev->dev_private; |
| 1677 | char buf[20]; |
| 1678 | int val = 0; |
| 1679 | |
| 1680 | if (cnt > 0) { |
| 1681 | if (cnt > sizeof(buf) - 1) |
| 1682 | return -EINVAL; |
| 1683 | |
| 1684 | if (copy_from_user(buf, ubuf, cnt)) |
| 1685 | return -EFAULT; |
| 1686 | buf[cnt] = 0; |
| 1687 | |
| 1688 | val = simple_strtoul(buf, NULL, 0); |
| 1689 | } |
| 1690 | |
| 1691 | DRM_DEBUG_DRIVER("Stopping rings 0x%08x\n", val); |
| 1692 | |
| 1693 | mutex_lock(&dev->struct_mutex); |
| 1694 | dev_priv->stop_rings = val; |
| 1695 | mutex_unlock(&dev->struct_mutex); |
| 1696 | |
| 1697 | return cnt; |
| 1698 | } |
| 1699 | |
| 1700 | static const struct file_operations i915_ring_stop_fops = { |
| 1701 | .owner = THIS_MODULE, |
| 1702 | .open = simple_open, |
| 1703 | .read = i915_ring_stop_read, |
| 1704 | .write = i915_ring_stop_write, |
| 1705 | .llseek = default_llseek, |
| 1706 | }; |
Daniel Vetter | d544230 | 2012-04-27 15:17:40 +0200 | [diff] [blame] | 1707 | |
Daniel Vetter | e5eb3d6 | 2012-05-03 14:48:16 +0200 | [diff] [blame] | 1708 | static ssize_t |
Jesse Barnes | 358733e | 2011-07-27 11:53:01 -0700 | [diff] [blame] | 1709 | i915_max_freq_read(struct file *filp, |
| 1710 | char __user *ubuf, |
| 1711 | size_t max, |
| 1712 | loff_t *ppos) |
| 1713 | { |
| 1714 | struct drm_device *dev = filp->private_data; |
| 1715 | drm_i915_private_t *dev_priv = dev->dev_private; |
| 1716 | char buf[80]; |
| 1717 | int len; |
| 1718 | |
Akshay Joshi | 0206e35 | 2011-08-16 15:34:10 -0400 | [diff] [blame] | 1719 | len = snprintf(buf, sizeof(buf), |
Jesse Barnes | 358733e | 2011-07-27 11:53:01 -0700 | [diff] [blame] | 1720 | "max freq: %d\n", dev_priv->max_delay * 50); |
| 1721 | |
Akshay Joshi | 0206e35 | 2011-08-16 15:34:10 -0400 | [diff] [blame] | 1722 | if (len > sizeof(buf)) |
| 1723 | len = sizeof(buf); |
Jesse Barnes | 358733e | 2011-07-27 11:53:01 -0700 | [diff] [blame] | 1724 | |
| 1725 | return simple_read_from_buffer(ubuf, max, ppos, buf, len); |
| 1726 | } |
| 1727 | |
| 1728 | static ssize_t |
| 1729 | i915_max_freq_write(struct file *filp, |
| 1730 | const char __user *ubuf, |
| 1731 | size_t cnt, |
| 1732 | loff_t *ppos) |
| 1733 | { |
| 1734 | struct drm_device *dev = filp->private_data; |
| 1735 | struct drm_i915_private *dev_priv = dev->dev_private; |
| 1736 | char buf[20]; |
| 1737 | int val = 1; |
| 1738 | |
| 1739 | if (cnt > 0) { |
Akshay Joshi | 0206e35 | 2011-08-16 15:34:10 -0400 | [diff] [blame] | 1740 | if (cnt > sizeof(buf) - 1) |
Jesse Barnes | 358733e | 2011-07-27 11:53:01 -0700 | [diff] [blame] | 1741 | return -EINVAL; |
| 1742 | |
| 1743 | if (copy_from_user(buf, ubuf, cnt)) |
| 1744 | return -EFAULT; |
| 1745 | buf[cnt] = 0; |
| 1746 | |
| 1747 | val = simple_strtoul(buf, NULL, 0); |
| 1748 | } |
| 1749 | |
| 1750 | DRM_DEBUG_DRIVER("Manually setting max freq to %d\n", val); |
| 1751 | |
| 1752 | /* |
| 1753 | * Turbo will still be enabled, but won't go above the set value. |
| 1754 | */ |
| 1755 | dev_priv->max_delay = val / 50; |
| 1756 | |
| 1757 | gen6_set_rps(dev, val / 50); |
| 1758 | |
| 1759 | return cnt; |
| 1760 | } |
| 1761 | |
| 1762 | static const struct file_operations i915_max_freq_fops = { |
| 1763 | .owner = THIS_MODULE, |
Stephen Boyd | 234e340 | 2012-04-05 14:25:11 -0700 | [diff] [blame] | 1764 | .open = simple_open, |
Jesse Barnes | 358733e | 2011-07-27 11:53:01 -0700 | [diff] [blame] | 1765 | .read = i915_max_freq_read, |
| 1766 | .write = i915_max_freq_write, |
| 1767 | .llseek = default_llseek, |
| 1768 | }; |
| 1769 | |
Jesse Barnes | 07b7ddd | 2011-08-03 11:28:44 -0700 | [diff] [blame] | 1770 | static ssize_t |
| 1771 | i915_cache_sharing_read(struct file *filp, |
| 1772 | char __user *ubuf, |
| 1773 | size_t max, |
| 1774 | loff_t *ppos) |
| 1775 | { |
| 1776 | struct drm_device *dev = filp->private_data; |
| 1777 | drm_i915_private_t *dev_priv = dev->dev_private; |
| 1778 | char buf[80]; |
| 1779 | u32 snpcr; |
| 1780 | int len; |
| 1781 | |
| 1782 | mutex_lock(&dev_priv->dev->struct_mutex); |
| 1783 | snpcr = I915_READ(GEN6_MBCUNIT_SNPCR); |
| 1784 | mutex_unlock(&dev_priv->dev->struct_mutex); |
| 1785 | |
Akshay Joshi | 0206e35 | 2011-08-16 15:34:10 -0400 | [diff] [blame] | 1786 | len = snprintf(buf, sizeof(buf), |
Jesse Barnes | 07b7ddd | 2011-08-03 11:28:44 -0700 | [diff] [blame] | 1787 | "%d\n", (snpcr & GEN6_MBC_SNPCR_MASK) >> |
| 1788 | GEN6_MBC_SNPCR_SHIFT); |
| 1789 | |
Akshay Joshi | 0206e35 | 2011-08-16 15:34:10 -0400 | [diff] [blame] | 1790 | if (len > sizeof(buf)) |
| 1791 | len = sizeof(buf); |
Jesse Barnes | 07b7ddd | 2011-08-03 11:28:44 -0700 | [diff] [blame] | 1792 | |
| 1793 | return simple_read_from_buffer(ubuf, max, ppos, buf, len); |
| 1794 | } |
| 1795 | |
| 1796 | static ssize_t |
| 1797 | i915_cache_sharing_write(struct file *filp, |
| 1798 | const char __user *ubuf, |
| 1799 | size_t cnt, |
| 1800 | loff_t *ppos) |
| 1801 | { |
| 1802 | struct drm_device *dev = filp->private_data; |
| 1803 | struct drm_i915_private *dev_priv = dev->dev_private; |
| 1804 | char buf[20]; |
| 1805 | u32 snpcr; |
| 1806 | int val = 1; |
| 1807 | |
| 1808 | if (cnt > 0) { |
Akshay Joshi | 0206e35 | 2011-08-16 15:34:10 -0400 | [diff] [blame] | 1809 | if (cnt > sizeof(buf) - 1) |
Jesse Barnes | 07b7ddd | 2011-08-03 11:28:44 -0700 | [diff] [blame] | 1810 | return -EINVAL; |
| 1811 | |
| 1812 | if (copy_from_user(buf, ubuf, cnt)) |
| 1813 | return -EFAULT; |
| 1814 | buf[cnt] = 0; |
| 1815 | |
| 1816 | val = simple_strtoul(buf, NULL, 0); |
| 1817 | } |
| 1818 | |
| 1819 | if (val < 0 || val > 3) |
| 1820 | return -EINVAL; |
| 1821 | |
| 1822 | DRM_DEBUG_DRIVER("Manually setting uncore sharing to %d\n", val); |
| 1823 | |
| 1824 | /* Update the cache sharing policy here as well */ |
| 1825 | snpcr = I915_READ(GEN6_MBCUNIT_SNPCR); |
| 1826 | snpcr &= ~GEN6_MBC_SNPCR_MASK; |
| 1827 | snpcr |= (val << GEN6_MBC_SNPCR_SHIFT); |
| 1828 | I915_WRITE(GEN6_MBCUNIT_SNPCR, snpcr); |
| 1829 | |
| 1830 | return cnt; |
| 1831 | } |
| 1832 | |
| 1833 | static const struct file_operations i915_cache_sharing_fops = { |
| 1834 | .owner = THIS_MODULE, |
Stephen Boyd | 234e340 | 2012-04-05 14:25:11 -0700 | [diff] [blame] | 1835 | .open = simple_open, |
Jesse Barnes | 07b7ddd | 2011-08-03 11:28:44 -0700 | [diff] [blame] | 1836 | .read = i915_cache_sharing_read, |
| 1837 | .write = i915_cache_sharing_write, |
| 1838 | .llseek = default_llseek, |
| 1839 | }; |
| 1840 | |
Chris Wilson | f3cd474 | 2009-10-13 22:20:20 +0100 | [diff] [blame] | 1841 | /* As the drm_debugfs_init() routines are called before dev->dev_private is |
| 1842 | * allocated we need to hook into the minor for release. */ |
| 1843 | static int |
| 1844 | drm_add_fake_info_node(struct drm_minor *minor, |
| 1845 | struct dentry *ent, |
| 1846 | const void *key) |
| 1847 | { |
| 1848 | struct drm_info_node *node; |
| 1849 | |
| 1850 | node = kmalloc(sizeof(struct drm_info_node), GFP_KERNEL); |
| 1851 | if (node == NULL) { |
| 1852 | debugfs_remove(ent); |
| 1853 | return -ENOMEM; |
| 1854 | } |
| 1855 | |
| 1856 | node->minor = minor; |
| 1857 | node->dent = ent; |
| 1858 | node->info_ent = (void *) key; |
Marcin Slusarz | b3e067c | 2011-11-09 22:20:35 +0100 | [diff] [blame] | 1859 | |
| 1860 | mutex_lock(&minor->debugfs_lock); |
| 1861 | list_add(&node->list, &minor->debugfs_list); |
| 1862 | mutex_unlock(&minor->debugfs_lock); |
Chris Wilson | f3cd474 | 2009-10-13 22:20:20 +0100 | [diff] [blame] | 1863 | |
| 1864 | return 0; |
| 1865 | } |
| 1866 | |
Ben Widawsky | 6d794d4 | 2011-04-25 11:25:56 -0700 | [diff] [blame] | 1867 | static int i915_forcewake_open(struct inode *inode, struct file *file) |
| 1868 | { |
| 1869 | struct drm_device *dev = inode->i_private; |
| 1870 | struct drm_i915_private *dev_priv = dev->dev_private; |
| 1871 | int ret; |
| 1872 | |
Daniel Vetter | 075edca | 2012-01-24 09:44:28 +0100 | [diff] [blame] | 1873 | if (INTEL_INFO(dev)->gen < 6) |
Ben Widawsky | 6d794d4 | 2011-04-25 11:25:56 -0700 | [diff] [blame] | 1874 | return 0; |
| 1875 | |
| 1876 | ret = mutex_lock_interruptible(&dev->struct_mutex); |
| 1877 | if (ret) |
| 1878 | return ret; |
| 1879 | gen6_gt_force_wake_get(dev_priv); |
| 1880 | mutex_unlock(&dev->struct_mutex); |
| 1881 | |
| 1882 | return 0; |
| 1883 | } |
| 1884 | |
Ben Widawsky | c43b563 | 2012-04-16 14:07:40 -0700 | [diff] [blame] | 1885 | static int i915_forcewake_release(struct inode *inode, struct file *file) |
Ben Widawsky | 6d794d4 | 2011-04-25 11:25:56 -0700 | [diff] [blame] | 1886 | { |
| 1887 | struct drm_device *dev = inode->i_private; |
| 1888 | struct drm_i915_private *dev_priv = dev->dev_private; |
| 1889 | |
Daniel Vetter | 075edca | 2012-01-24 09:44:28 +0100 | [diff] [blame] | 1890 | if (INTEL_INFO(dev)->gen < 6) |
Ben Widawsky | 6d794d4 | 2011-04-25 11:25:56 -0700 | [diff] [blame] | 1891 | return 0; |
| 1892 | |
| 1893 | /* |
| 1894 | * It's bad that we can potentially hang userspace if struct_mutex gets |
| 1895 | * forever stuck. However, if we cannot acquire this lock it means that |
| 1896 | * almost certainly the driver has hung, is not unload-able. Therefore |
| 1897 | * hanging here is probably a minor inconvenience not to be seen my |
| 1898 | * almost every user. |
| 1899 | */ |
| 1900 | mutex_lock(&dev->struct_mutex); |
| 1901 | gen6_gt_force_wake_put(dev_priv); |
| 1902 | mutex_unlock(&dev->struct_mutex); |
| 1903 | |
| 1904 | return 0; |
| 1905 | } |
| 1906 | |
| 1907 | static const struct file_operations i915_forcewake_fops = { |
| 1908 | .owner = THIS_MODULE, |
| 1909 | .open = i915_forcewake_open, |
| 1910 | .release = i915_forcewake_release, |
| 1911 | }; |
| 1912 | |
| 1913 | static int i915_forcewake_create(struct dentry *root, struct drm_minor *minor) |
| 1914 | { |
| 1915 | struct drm_device *dev = minor->dev; |
| 1916 | struct dentry *ent; |
| 1917 | |
| 1918 | ent = debugfs_create_file("i915_forcewake_user", |
Ben Widawsky | 8eb5729 | 2011-05-11 15:10:58 -0700 | [diff] [blame] | 1919 | S_IRUSR, |
Ben Widawsky | 6d794d4 | 2011-04-25 11:25:56 -0700 | [diff] [blame] | 1920 | root, dev, |
| 1921 | &i915_forcewake_fops); |
| 1922 | if (IS_ERR(ent)) |
| 1923 | return PTR_ERR(ent); |
| 1924 | |
Ben Widawsky | 8eb5729 | 2011-05-11 15:10:58 -0700 | [diff] [blame] | 1925 | return drm_add_fake_info_node(minor, ent, &i915_forcewake_fops); |
Ben Widawsky | 6d794d4 | 2011-04-25 11:25:56 -0700 | [diff] [blame] | 1926 | } |
| 1927 | |
Daniel Vetter | 6a9c308 | 2011-12-14 13:57:11 +0100 | [diff] [blame] | 1928 | static int i915_debugfs_create(struct dentry *root, |
| 1929 | struct drm_minor *minor, |
| 1930 | const char *name, |
| 1931 | const struct file_operations *fops) |
Jesse Barnes | 358733e | 2011-07-27 11:53:01 -0700 | [diff] [blame] | 1932 | { |
| 1933 | struct drm_device *dev = minor->dev; |
| 1934 | struct dentry *ent; |
| 1935 | |
Daniel Vetter | 6a9c308 | 2011-12-14 13:57:11 +0100 | [diff] [blame] | 1936 | ent = debugfs_create_file(name, |
Jesse Barnes | 358733e | 2011-07-27 11:53:01 -0700 | [diff] [blame] | 1937 | S_IRUGO | S_IWUSR, |
| 1938 | root, dev, |
Daniel Vetter | 6a9c308 | 2011-12-14 13:57:11 +0100 | [diff] [blame] | 1939 | fops); |
Jesse Barnes | 358733e | 2011-07-27 11:53:01 -0700 | [diff] [blame] | 1940 | if (IS_ERR(ent)) |
| 1941 | return PTR_ERR(ent); |
| 1942 | |
Daniel Vetter | 6a9c308 | 2011-12-14 13:57:11 +0100 | [diff] [blame] | 1943 | return drm_add_fake_info_node(minor, ent, fops); |
Jesse Barnes | 07b7ddd | 2011-08-03 11:28:44 -0700 | [diff] [blame] | 1944 | } |
| 1945 | |
Ben Gamari | 27c202a | 2009-07-01 22:26:52 -0400 | [diff] [blame] | 1946 | static struct drm_info_list i915_debugfs_list[] = { |
Chris Wilson | 311bd68 | 2011-01-13 19:06:50 +0000 | [diff] [blame] | 1947 | {"i915_capabilities", i915_capabilities, 0}, |
Chris Wilson | 73aa808 | 2010-09-30 11:46:12 +0100 | [diff] [blame] | 1948 | {"i915_gem_objects", i915_gem_object_info, 0}, |
Chris Wilson | 08c1832 | 2011-01-10 00:00:24 +0000 | [diff] [blame] | 1949 | {"i915_gem_gtt", i915_gem_gtt_info, 0}, |
Chris Wilson | 1b50247 | 2012-04-24 15:47:30 +0100 | [diff] [blame] | 1950 | {"i915_gem_pinned", i915_gem_gtt_info, 0, (void *) PINNED_LIST}, |
Ben Gamari | 433e12f | 2009-02-17 20:08:51 -0500 | [diff] [blame] | 1951 | {"i915_gem_active", i915_gem_object_list_info, 0, (void *) ACTIVE_LIST}, |
| 1952 | {"i915_gem_flushing", i915_gem_object_list_info, 0, (void *) FLUSHING_LIST}, |
| 1953 | {"i915_gem_inactive", i915_gem_object_list_info, 0, (void *) INACTIVE_LIST}, |
Simon Farnsworth | 4e5359c | 2010-09-01 17:47:52 +0100 | [diff] [blame] | 1954 | {"i915_gem_pageflip", i915_gem_pageflip_info, 0}, |
Ben Gamari | 2017263 | 2009-02-17 20:08:50 -0500 | [diff] [blame] | 1955 | {"i915_gem_request", i915_gem_request_info, 0}, |
| 1956 | {"i915_gem_seqno", i915_gem_seqno_info, 0}, |
Chris Wilson | a6172a8 | 2009-02-11 14:26:38 +0000 | [diff] [blame] | 1957 | {"i915_gem_fence_regs", i915_gem_fence_regs_info, 0}, |
Ben Gamari | 2017263 | 2009-02-17 20:08:50 -0500 | [diff] [blame] | 1958 | {"i915_gem_interrupt", i915_interrupt_info, 0}, |
Chris Wilson | 1ec14ad | 2010-12-04 11:30:53 +0000 | [diff] [blame] | 1959 | {"i915_gem_hws", i915_hws_info, 0, (void *)RCS}, |
| 1960 | {"i915_gem_hws_blt", i915_hws_info, 0, (void *)BCS}, |
| 1961 | {"i915_gem_hws_bsd", i915_hws_info, 0, (void *)VCS}, |
Jesse Barnes | f97108d | 2010-01-29 11:27:07 -0800 | [diff] [blame] | 1962 | {"i915_rstdby_delays", i915_rstdby_delays, 0}, |
| 1963 | {"i915_cur_delayinfo", i915_cur_delayinfo, 0}, |
| 1964 | {"i915_delayfreq_table", i915_delayfreq_table, 0}, |
| 1965 | {"i915_inttoext_table", i915_inttoext_table, 0}, |
| 1966 | {"i915_drpc_info", i915_drpc_info, 0}, |
Jesse Barnes | 7648fa9 | 2010-05-20 14:28:11 -0700 | [diff] [blame] | 1967 | {"i915_emon_status", i915_emon_status, 0}, |
Jesse Barnes | 23b2f8b | 2011-06-28 13:04:16 -0700 | [diff] [blame] | 1968 | {"i915_ring_freq_table", i915_ring_freq_table, 0}, |
Jesse Barnes | 7648fa9 | 2010-05-20 14:28:11 -0700 | [diff] [blame] | 1969 | {"i915_gfxec", i915_gfxec, 0}, |
Jesse Barnes | b5e50c3 | 2010-02-05 12:42:41 -0800 | [diff] [blame] | 1970 | {"i915_fbc_status", i915_fbc_status, 0}, |
Jesse Barnes | 4a9bef3 | 2010-02-05 12:47:35 -0800 | [diff] [blame] | 1971 | {"i915_sr_status", i915_sr_status, 0}, |
Chris Wilson | 44834a6 | 2010-08-19 16:09:23 +0100 | [diff] [blame] | 1972 | {"i915_opregion", i915_opregion, 0}, |
Chris Wilson | 37811fc | 2010-08-25 22:45:57 +0100 | [diff] [blame] | 1973 | {"i915_gem_framebuffer", i915_gem_framebuffer_info, 0}, |
Ben Widawsky | e76d363 | 2011-03-19 18:14:29 -0700 | [diff] [blame] | 1974 | {"i915_context_status", i915_context_status, 0}, |
Ben Widawsky | 6d794d4 | 2011-04-25 11:25:56 -0700 | [diff] [blame] | 1975 | {"i915_gen6_forcewake_count", i915_gen6_forcewake_count_info, 0}, |
Daniel Vetter | ea16a3c | 2011-12-14 13:57:16 +0100 | [diff] [blame] | 1976 | {"i915_swizzle_info", i915_swizzle_info, 0}, |
Daniel Vetter | 3cf17fc | 2012-02-09 17:15:49 +0100 | [diff] [blame] | 1977 | {"i915_ppgtt_info", i915_ppgtt_info, 0}, |
Jesse Barnes | 57f350b | 2012-03-28 13:39:25 -0700 | [diff] [blame] | 1978 | {"i915_dpio", i915_dpio_info, 0}, |
Ben Gamari | 2017263 | 2009-02-17 20:08:50 -0500 | [diff] [blame] | 1979 | }; |
Ben Gamari | 27c202a | 2009-07-01 22:26:52 -0400 | [diff] [blame] | 1980 | #define I915_DEBUGFS_ENTRIES ARRAY_SIZE(i915_debugfs_list) |
Ben Gamari | 2017263 | 2009-02-17 20:08:50 -0500 | [diff] [blame] | 1981 | |
Ben Gamari | 27c202a | 2009-07-01 22:26:52 -0400 | [diff] [blame] | 1982 | int i915_debugfs_init(struct drm_minor *minor) |
Ben Gamari | 2017263 | 2009-02-17 20:08:50 -0500 | [diff] [blame] | 1983 | { |
Chris Wilson | f3cd474 | 2009-10-13 22:20:20 +0100 | [diff] [blame] | 1984 | int ret; |
| 1985 | |
Daniel Vetter | 6a9c308 | 2011-12-14 13:57:11 +0100 | [diff] [blame] | 1986 | ret = i915_debugfs_create(minor->debugfs_root, minor, |
| 1987 | "i915_wedged", |
| 1988 | &i915_wedged_fops); |
Chris Wilson | f3cd474 | 2009-10-13 22:20:20 +0100 | [diff] [blame] | 1989 | if (ret) |
| 1990 | return ret; |
| 1991 | |
Ben Widawsky | 6d794d4 | 2011-04-25 11:25:56 -0700 | [diff] [blame] | 1992 | ret = i915_forcewake_create(minor->debugfs_root, minor); |
| 1993 | if (ret) |
| 1994 | return ret; |
Daniel Vetter | 6a9c308 | 2011-12-14 13:57:11 +0100 | [diff] [blame] | 1995 | |
| 1996 | ret = i915_debugfs_create(minor->debugfs_root, minor, |
| 1997 | "i915_max_freq", |
| 1998 | &i915_max_freq_fops); |
Jesse Barnes | 358733e | 2011-07-27 11:53:01 -0700 | [diff] [blame] | 1999 | if (ret) |
| 2000 | return ret; |
Daniel Vetter | 6a9c308 | 2011-12-14 13:57:11 +0100 | [diff] [blame] | 2001 | |
| 2002 | ret = i915_debugfs_create(minor->debugfs_root, minor, |
| 2003 | "i915_cache_sharing", |
| 2004 | &i915_cache_sharing_fops); |
Jesse Barnes | 07b7ddd | 2011-08-03 11:28:44 -0700 | [diff] [blame] | 2005 | if (ret) |
| 2006 | return ret; |
Daniel Vetter | e5eb3d6 | 2012-05-03 14:48:16 +0200 | [diff] [blame] | 2007 | ret = i915_debugfs_create(minor->debugfs_root, minor, |
| 2008 | "i915_ring_stop", |
| 2009 | &i915_ring_stop_fops); |
| 2010 | if (ret) |
| 2011 | return ret; |
Ben Widawsky | 6d794d4 | 2011-04-25 11:25:56 -0700 | [diff] [blame] | 2012 | |
Daniel Vetter | d544230 | 2012-04-27 15:17:40 +0200 | [diff] [blame] | 2013 | ret = i915_debugfs_create(minor->debugfs_root, minor, |
| 2014 | "i915_error_state", |
| 2015 | &i915_error_state_fops); |
| 2016 | if (ret) |
| 2017 | return ret; |
| 2018 | |
Ben Gamari | 27c202a | 2009-07-01 22:26:52 -0400 | [diff] [blame] | 2019 | return drm_debugfs_create_files(i915_debugfs_list, |
| 2020 | I915_DEBUGFS_ENTRIES, |
Ben Gamari | 2017263 | 2009-02-17 20:08:50 -0500 | [diff] [blame] | 2021 | minor->debugfs_root, minor); |
| 2022 | } |
| 2023 | |
Ben Gamari | 27c202a | 2009-07-01 22:26:52 -0400 | [diff] [blame] | 2024 | void i915_debugfs_cleanup(struct drm_minor *minor) |
Ben Gamari | 2017263 | 2009-02-17 20:08:50 -0500 | [diff] [blame] | 2025 | { |
Ben Gamari | 27c202a | 2009-07-01 22:26:52 -0400 | [diff] [blame] | 2026 | drm_debugfs_remove_files(i915_debugfs_list, |
| 2027 | I915_DEBUGFS_ENTRIES, minor); |
Ben Widawsky | 6d794d4 | 2011-04-25 11:25:56 -0700 | [diff] [blame] | 2028 | drm_debugfs_remove_files((struct drm_info_list *) &i915_forcewake_fops, |
| 2029 | 1, minor); |
Kristian Høgsberg | 33db679 | 2009-11-11 12:19:16 -0500 | [diff] [blame] | 2030 | drm_debugfs_remove_files((struct drm_info_list *) &i915_wedged_fops, |
| 2031 | 1, minor); |
Jesse Barnes | 358733e | 2011-07-27 11:53:01 -0700 | [diff] [blame] | 2032 | drm_debugfs_remove_files((struct drm_info_list *) &i915_max_freq_fops, |
| 2033 | 1, minor); |
Jesse Barnes | 07b7ddd | 2011-08-03 11:28:44 -0700 | [diff] [blame] | 2034 | drm_debugfs_remove_files((struct drm_info_list *) &i915_cache_sharing_fops, |
| 2035 | 1, minor); |
Daniel Vetter | e5eb3d6 | 2012-05-03 14:48:16 +0200 | [diff] [blame] | 2036 | drm_debugfs_remove_files((struct drm_info_list *) &i915_ring_stop_fops, |
| 2037 | 1, minor); |
Ben Gamari | 2017263 | 2009-02-17 20:08:50 -0500 | [diff] [blame] | 2038 | } |
| 2039 | |
| 2040 | #endif /* CONFIG_DEBUG_FS */ |