Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1 | /* |
| 2 | * Intel IO-APIC support for multi-Pentium hosts. |
| 3 | * |
Ingo Molnar | 8f47e16 | 2009-01-31 02:03:42 +0100 | [diff] [blame] | 4 | * Copyright (C) 1997, 1998, 1999, 2000, 2009 Ingo Molnar, Hajnalka Szabo |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5 | * |
| 6 | * Many thanks to Stig Venaas for trying out countless experimental |
| 7 | * patches and reporting/debugging problems patiently! |
| 8 | * |
| 9 | * (c) 1999, Multiple IO-APIC support, developed by |
| 10 | * Ken-ichi Yaku <yaku@css1.kbnes.nec.co.jp> and |
| 11 | * Hidemi Kishimoto <kisimoto@css1.kbnes.nec.co.jp>, |
| 12 | * further tested and cleaned up by Zach Brown <zab@redhat.com> |
| 13 | * and Ingo Molnar <mingo@redhat.com> |
| 14 | * |
| 15 | * Fixes |
| 16 | * Maciej W. Rozycki : Bits for genuine 82489DX APICs; |
| 17 | * thanks to Eric Gilmore |
| 18 | * and Rolf G. Tews |
| 19 | * for testing these extensively |
| 20 | * Paul Diefenbaugh : Added full ACPI support |
| 21 | */ |
| 22 | |
| 23 | #include <linux/mm.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 24 | #include <linux/interrupt.h> |
| 25 | #include <linux/init.h> |
| 26 | #include <linux/delay.h> |
| 27 | #include <linux/sched.h> |
Yinghai Lu | d4057bd | 2008-08-19 20:50:38 -0700 | [diff] [blame] | 28 | #include <linux/pci.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 29 | #include <linux/mc146818rtc.h> |
| 30 | #include <linux/compiler.h> |
| 31 | #include <linux/acpi.h> |
Alexey Dobriyan | 129f694 | 2005-06-23 00:08:33 -0700 | [diff] [blame] | 32 | #include <linux/module.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 33 | #include <linux/sysdev.h> |
Eric W. Biederman | 3b7d192 | 2006-10-04 02:16:59 -0700 | [diff] [blame] | 34 | #include <linux/msi.h> |
Eric W. Biederman | 95d7788 | 2006-10-04 02:17:01 -0700 | [diff] [blame] | 35 | #include <linux/htirq.h> |
Nigel Cunningham | 7dfb710 | 2006-12-06 20:34:23 -0800 | [diff] [blame] | 36 | #include <linux/freezer.h> |
Eric W. Biederman | f26d6a2 | 2007-05-02 19:27:19 +0200 | [diff] [blame] | 37 | #include <linux/kthread.h> |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 38 | #include <linux/jiffies.h> /* time_after() */ |
Yinghai Lu | d4057bd | 2008-08-19 20:50:38 -0700 | [diff] [blame] | 39 | #ifdef CONFIG_ACPI |
| 40 | #include <acpi/acpi_bus.h> |
| 41 | #endif |
| 42 | #include <linux/bootmem.h> |
| 43 | #include <linux/dmar.h> |
venkatesh.pallipadi@intel.com | 58ac1e7 | 2008-09-05 18:02:17 -0700 | [diff] [blame] | 44 | #include <linux/hpet.h> |
Ashok Raj | 54d5d42 | 2005-09-06 15:16:15 -0700 | [diff] [blame] | 45 | |
Yinghai Lu | d4057bd | 2008-08-19 20:50:38 -0700 | [diff] [blame] | 46 | #include <asm/idle.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 47 | #include <asm/io.h> |
| 48 | #include <asm/smp.h> |
Jaswinder Singh Rajput | 6d652ea | 2009-01-07 21:38:59 +0530 | [diff] [blame] | 49 | #include <asm/cpu.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 50 | #include <asm/desc.h> |
Yinghai Lu | d4057bd | 2008-08-19 20:50:38 -0700 | [diff] [blame] | 51 | #include <asm/proto.h> |
| 52 | #include <asm/acpi.h> |
| 53 | #include <asm/dma.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 54 | #include <asm/timer.h> |
Ingo Molnar | 306e440 | 2005-06-30 02:58:55 -0700 | [diff] [blame] | 55 | #include <asm/i8259.h> |
Don Zickus | 3e4ff11 | 2006-06-26 13:57:01 +0200 | [diff] [blame] | 56 | #include <asm/nmi.h> |
Eric W. Biederman | 2d3fcc1 | 2006-10-04 02:16:43 -0700 | [diff] [blame] | 57 | #include <asm/msidef.h> |
Eric W. Biederman | 8b955b0 | 2006-10-04 02:16:55 -0700 | [diff] [blame] | 58 | #include <asm/hypertransport.h> |
Yinghai Lu | a4dbc34 | 2008-07-25 02:14:28 -0700 | [diff] [blame] | 59 | #include <asm/setup.h> |
Yinghai Lu | d4057bd | 2008-08-19 20:50:38 -0700 | [diff] [blame] | 60 | #include <asm/irq_remapping.h> |
venkatesh.pallipadi@intel.com | 58ac1e7 | 2008-09-05 18:02:17 -0700 | [diff] [blame] | 61 | #include <asm/hpet.h> |
Jaswinder Singh Rajput | 2c1b284 | 2009-04-11 00:03:10 +0530 | [diff] [blame] | 62 | #include <asm/hw_irq.h> |
Dean Nelson | 4173a0e | 2008-10-02 12:18:21 -0500 | [diff] [blame] | 63 | #include <asm/uv/uv_hub.h> |
| 64 | #include <asm/uv/uv_irq.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 65 | |
Ingo Molnar | 7b6aa33 | 2009-02-17 13:58:15 +0100 | [diff] [blame] | 66 | #include <asm/apic.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 67 | |
Maciej W. Rozycki | 32f71af | 2008-07-21 00:52:49 +0100 | [diff] [blame] | 68 | #define __apicdebuginit(type) static type __init |
| 69 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 70 | /* |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 71 | * Is the SiS APIC rmw bug present ? |
| 72 | * -1 = don't know, 0 = no, 1 = yes |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 73 | */ |
| 74 | int sis_apic_bug = -1; |
| 75 | |
Yinghai Lu | efa2559 | 2008-08-19 20:50:36 -0700 | [diff] [blame] | 76 | static DEFINE_SPINLOCK(ioapic_lock); |
| 77 | static DEFINE_SPINLOCK(vector_lock); |
| 78 | |
Yinghai Lu | efa2559 | 2008-08-19 20:50:36 -0700 | [diff] [blame] | 79 | /* |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 80 | * # of IRQ routing registers |
| 81 | */ |
| 82 | int nr_ioapic_registers[MAX_IO_APICS]; |
| 83 | |
Alexey Starikovskiy | 9f640cc | 2008-04-04 23:41:13 +0400 | [diff] [blame] | 84 | /* I/O APIC entries */ |
Jaswinder Singh Rajput | b5ba7e6 | 2009-01-12 17:46:17 +0530 | [diff] [blame] | 85 | struct mpc_ioapic mp_ioapics[MAX_IO_APICS]; |
Alexey Starikovskiy | 9f640cc | 2008-04-04 23:41:13 +0400 | [diff] [blame] | 86 | int nr_ioapics; |
| 87 | |
Alexey Starikovskiy | 584f734 | 2008-04-04 23:41:32 +0400 | [diff] [blame] | 88 | /* MP IRQ source entries */ |
Jaswinder Singh Rajput | c2c2174 | 2009-01-12 17:47:22 +0530 | [diff] [blame] | 89 | struct mpc_intsrc mp_irqs[MAX_IRQ_SOURCES]; |
Alexey Starikovskiy | 584f734 | 2008-04-04 23:41:32 +0400 | [diff] [blame] | 90 | |
| 91 | /* # of MP IRQ source entries */ |
| 92 | int mp_irq_entries; |
| 93 | |
Alexey Starikovskiy | 8732fc4 | 2008-05-19 19:47:16 +0400 | [diff] [blame] | 94 | #if defined (CONFIG_MCA) || defined (CONFIG_EISA) |
| 95 | int mp_bus_id_to_type[MAX_MP_BUSSES]; |
| 96 | #endif |
| 97 | |
| 98 | DECLARE_BITMAP(mp_bus_not_pci, MAX_MP_BUSSES); |
| 99 | |
Yinghai Lu | efa2559 | 2008-08-19 20:50:36 -0700 | [diff] [blame] | 100 | int skip_ioapic_setup; |
| 101 | |
Ingo Molnar | 65a4e57 | 2009-01-31 03:36:17 +0100 | [diff] [blame] | 102 | void arch_disable_smp_support(void) |
| 103 | { |
| 104 | #ifdef CONFIG_PCI |
| 105 | noioapicquirk = 1; |
| 106 | noioapicreroute = -1; |
| 107 | #endif |
| 108 | skip_ioapic_setup = 1; |
| 109 | } |
| 110 | |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 111 | static int __init parse_noapic(char *str) |
Yinghai Lu | efa2559 | 2008-08-19 20:50:36 -0700 | [diff] [blame] | 112 | { |
| 113 | /* disable IO-APIC */ |
Ingo Molnar | 65a4e57 | 2009-01-31 03:36:17 +0100 | [diff] [blame] | 114 | arch_disable_smp_support(); |
Yinghai Lu | efa2559 | 2008-08-19 20:50:36 -0700 | [diff] [blame] | 115 | return 0; |
| 116 | } |
| 117 | early_param("noapic", parse_noapic); |
Chuck Ebbert | 66759a0 | 2005-09-12 18:49:25 +0200 | [diff] [blame] | 118 | |
Yinghai Lu | 0f978f4 | 2008-08-19 20:50:26 -0700 | [diff] [blame] | 119 | struct irq_pin_list; |
Thomas Gleixner | d6c88a5 | 2008-10-15 15:27:23 +0200 | [diff] [blame] | 120 | |
| 121 | /* |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 122 | * This is performance-critical, we want to do it O(1) |
| 123 | * |
| 124 | * the indexing order of this array favors 1:1 mappings |
| 125 | * between pins and IRQs. |
| 126 | */ |
| 127 | |
Yinghai Lu | 0f978f4 | 2008-08-19 20:50:26 -0700 | [diff] [blame] | 128 | struct irq_pin_list { |
| 129 | int apic, pin; |
| 130 | struct irq_pin_list *next; |
| 131 | }; |
Yinghai Lu | 301e619 | 2008-08-19 20:50:02 -0700 | [diff] [blame] | 132 | |
Yinghai Lu | 85ac16d | 2009-04-27 18:00:38 -0700 | [diff] [blame] | 133 | static struct irq_pin_list *get_one_free_irq_2_pin(int node) |
Yinghai Lu | 0f978f4 | 2008-08-19 20:50:26 -0700 | [diff] [blame] | 134 | { |
Yinghai Lu | 0b8f1ef | 2008-12-05 18:58:31 -0800 | [diff] [blame] | 135 | struct irq_pin_list *pin; |
Yinghai Lu | 0f978f4 | 2008-08-19 20:50:26 -0700 | [diff] [blame] | 136 | |
Yinghai Lu | 0b8f1ef | 2008-12-05 18:58:31 -0800 | [diff] [blame] | 137 | pin = kzalloc_node(sizeof(*pin), GFP_ATOMIC, node); |
Yinghai Lu | 0f978f4 | 2008-08-19 20:50:26 -0700 | [diff] [blame] | 138 | |
Yinghai Lu | 0f978f4 | 2008-08-19 20:50:26 -0700 | [diff] [blame] | 139 | return pin; |
| 140 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 141 | |
Yinghai Lu | 0b8f1ef | 2008-12-05 18:58:31 -0800 | [diff] [blame] | 142 | struct irq_cfg { |
| 143 | struct irq_pin_list *irq_2_pin; |
Mike Travis | 22f65d3 | 2008-12-16 17:33:56 -0800 | [diff] [blame] | 144 | cpumask_var_t domain; |
| 145 | cpumask_var_t old_domain; |
Yinghai Lu | 0b8f1ef | 2008-12-05 18:58:31 -0800 | [diff] [blame] | 146 | unsigned move_cleanup_count; |
| 147 | u8 vector; |
| 148 | u8 move_in_progress : 1; |
| 149 | }; |
| 150 | |
| 151 | /* irq_cfg is indexed by the sum of all RTEs in all I/O APICs. */ |
| 152 | #ifdef CONFIG_SPARSE_IRQ |
| 153 | static struct irq_cfg irq_cfgx[] = { |
| 154 | #else |
| 155 | static struct irq_cfg irq_cfgx[NR_IRQS] = { |
| 156 | #endif |
Mike Travis | 22f65d3 | 2008-12-16 17:33:56 -0800 | [diff] [blame] | 157 | [0] = { .vector = IRQ0_VECTOR, }, |
| 158 | [1] = { .vector = IRQ1_VECTOR, }, |
| 159 | [2] = { .vector = IRQ2_VECTOR, }, |
| 160 | [3] = { .vector = IRQ3_VECTOR, }, |
| 161 | [4] = { .vector = IRQ4_VECTOR, }, |
| 162 | [5] = { .vector = IRQ5_VECTOR, }, |
| 163 | [6] = { .vector = IRQ6_VECTOR, }, |
| 164 | [7] = { .vector = IRQ7_VECTOR, }, |
| 165 | [8] = { .vector = IRQ8_VECTOR, }, |
| 166 | [9] = { .vector = IRQ9_VECTOR, }, |
| 167 | [10] = { .vector = IRQ10_VECTOR, }, |
| 168 | [11] = { .vector = IRQ11_VECTOR, }, |
| 169 | [12] = { .vector = IRQ12_VECTOR, }, |
| 170 | [13] = { .vector = IRQ13_VECTOR, }, |
| 171 | [14] = { .vector = IRQ14_VECTOR, }, |
| 172 | [15] = { .vector = IRQ15_VECTOR, }, |
Yinghai Lu | 0b8f1ef | 2008-12-05 18:58:31 -0800 | [diff] [blame] | 173 | }; |
| 174 | |
Yinghai Lu | 13a0c3c | 2008-12-26 02:05:47 -0800 | [diff] [blame] | 175 | int __init arch_early_irq_init(void) |
Yinghai Lu | 0b8f1ef | 2008-12-05 18:58:31 -0800 | [diff] [blame] | 176 | { |
| 177 | struct irq_cfg *cfg; |
| 178 | struct irq_desc *desc; |
| 179 | int count; |
Yinghai Lu | dad213ae | 2009-05-28 18:14:40 -0700 | [diff] [blame] | 180 | int node; |
Yinghai Lu | 0b8f1ef | 2008-12-05 18:58:31 -0800 | [diff] [blame] | 181 | int i; |
| 182 | |
| 183 | cfg = irq_cfgx; |
| 184 | count = ARRAY_SIZE(irq_cfgx); |
Yinghai Lu | dad213ae | 2009-05-28 18:14:40 -0700 | [diff] [blame] | 185 | node= cpu_to_node(boot_cpu_id); |
Yinghai Lu | 0b8f1ef | 2008-12-05 18:58:31 -0800 | [diff] [blame] | 186 | |
| 187 | for (i = 0; i < count; i++) { |
| 188 | desc = irq_to_desc(i); |
| 189 | desc->chip_data = &cfg[i]; |
Yinghai Lu | 12274e9 | 2009-06-11 15:07:48 -0700 | [diff] [blame] | 190 | zalloc_cpumask_var_node(&cfg[i].domain, GFP_NOWAIT, node); |
| 191 | zalloc_cpumask_var_node(&cfg[i].old_domain, GFP_NOWAIT, node); |
Mike Travis | 22f65d3 | 2008-12-16 17:33:56 -0800 | [diff] [blame] | 192 | if (i < NR_IRQS_LEGACY) |
| 193 | cpumask_setall(cfg[i].domain); |
Yinghai Lu | 0b8f1ef | 2008-12-05 18:58:31 -0800 | [diff] [blame] | 194 | } |
Yinghai Lu | 13a0c3c | 2008-12-26 02:05:47 -0800 | [diff] [blame] | 195 | |
| 196 | return 0; |
Yinghai Lu | 0b8f1ef | 2008-12-05 18:58:31 -0800 | [diff] [blame] | 197 | } |
| 198 | |
| 199 | #ifdef CONFIG_SPARSE_IRQ |
| 200 | static struct irq_cfg *irq_cfg(unsigned int irq) |
| 201 | { |
| 202 | struct irq_cfg *cfg = NULL; |
| 203 | struct irq_desc *desc; |
| 204 | |
| 205 | desc = irq_to_desc(irq); |
| 206 | if (desc) |
| 207 | cfg = desc->chip_data; |
| 208 | |
| 209 | return cfg; |
| 210 | } |
| 211 | |
Yinghai Lu | 85ac16d | 2009-04-27 18:00:38 -0700 | [diff] [blame] | 212 | static struct irq_cfg *get_one_free_irq_cfg(int node) |
Yinghai Lu | 0b8f1ef | 2008-12-05 18:58:31 -0800 | [diff] [blame] | 213 | { |
| 214 | struct irq_cfg *cfg; |
Yinghai Lu | 0b8f1ef | 2008-12-05 18:58:31 -0800 | [diff] [blame] | 215 | |
| 216 | cfg = kzalloc_node(sizeof(*cfg), GFP_ATOMIC, node); |
Mike Travis | 22f65d3 | 2008-12-16 17:33:56 -0800 | [diff] [blame] | 217 | if (cfg) { |
Mike Travis | 80855f7 | 2008-12-31 18:08:47 -0800 | [diff] [blame] | 218 | if (!alloc_cpumask_var_node(&cfg->domain, GFP_ATOMIC, node)) { |
Mike Travis | 22f65d3 | 2008-12-16 17:33:56 -0800 | [diff] [blame] | 219 | kfree(cfg); |
| 220 | cfg = NULL; |
Mike Travis | 80855f7 | 2008-12-31 18:08:47 -0800 | [diff] [blame] | 221 | } else if (!alloc_cpumask_var_node(&cfg->old_domain, |
| 222 | GFP_ATOMIC, node)) { |
Mike Travis | 22f65d3 | 2008-12-16 17:33:56 -0800 | [diff] [blame] | 223 | free_cpumask_var(cfg->domain); |
| 224 | kfree(cfg); |
| 225 | cfg = NULL; |
| 226 | } else { |
| 227 | cpumask_clear(cfg->domain); |
| 228 | cpumask_clear(cfg->old_domain); |
| 229 | } |
| 230 | } |
Yinghai Lu | 0b8f1ef | 2008-12-05 18:58:31 -0800 | [diff] [blame] | 231 | |
| 232 | return cfg; |
| 233 | } |
| 234 | |
Yinghai Lu | 85ac16d | 2009-04-27 18:00:38 -0700 | [diff] [blame] | 235 | int arch_init_chip_data(struct irq_desc *desc, int node) |
Yinghai Lu | 0b8f1ef | 2008-12-05 18:58:31 -0800 | [diff] [blame] | 236 | { |
| 237 | struct irq_cfg *cfg; |
| 238 | |
| 239 | cfg = desc->chip_data; |
| 240 | if (!cfg) { |
Yinghai Lu | 85ac16d | 2009-04-27 18:00:38 -0700 | [diff] [blame] | 241 | desc->chip_data = get_one_free_irq_cfg(node); |
Yinghai Lu | 0b8f1ef | 2008-12-05 18:58:31 -0800 | [diff] [blame] | 242 | if (!desc->chip_data) { |
| 243 | printk(KERN_ERR "can not alloc irq_cfg\n"); |
| 244 | BUG_ON(1); |
| 245 | } |
| 246 | } |
Yinghai Lu | 13a0c3c | 2008-12-26 02:05:47 -0800 | [diff] [blame] | 247 | |
| 248 | return 0; |
Yinghai Lu | 0b8f1ef | 2008-12-05 18:58:31 -0800 | [diff] [blame] | 249 | } |
| 250 | |
Yinghai Lu | fcef591 | 2009-04-27 17:58:23 -0700 | [diff] [blame] | 251 | /* for move_irq_desc */ |
Yinghai Lu | 48a1b10 | 2008-12-11 00:15:01 -0800 | [diff] [blame] | 252 | static void |
Yinghai Lu | 85ac16d | 2009-04-27 18:00:38 -0700 | [diff] [blame] | 253 | init_copy_irq_2_pin(struct irq_cfg *old_cfg, struct irq_cfg *cfg, int node) |
Yinghai Lu | 48a1b10 | 2008-12-11 00:15:01 -0800 | [diff] [blame] | 254 | { |
| 255 | struct irq_pin_list *old_entry, *head, *tail, *entry; |
| 256 | |
| 257 | cfg->irq_2_pin = NULL; |
| 258 | old_entry = old_cfg->irq_2_pin; |
| 259 | if (!old_entry) |
| 260 | return; |
| 261 | |
Yinghai Lu | 85ac16d | 2009-04-27 18:00:38 -0700 | [diff] [blame] | 262 | entry = get_one_free_irq_2_pin(node); |
Yinghai Lu | 48a1b10 | 2008-12-11 00:15:01 -0800 | [diff] [blame] | 263 | if (!entry) |
| 264 | return; |
| 265 | |
| 266 | entry->apic = old_entry->apic; |
| 267 | entry->pin = old_entry->pin; |
| 268 | head = entry; |
| 269 | tail = entry; |
| 270 | old_entry = old_entry->next; |
| 271 | while (old_entry) { |
Yinghai Lu | 85ac16d | 2009-04-27 18:00:38 -0700 | [diff] [blame] | 272 | entry = get_one_free_irq_2_pin(node); |
Yinghai Lu | 48a1b10 | 2008-12-11 00:15:01 -0800 | [diff] [blame] | 273 | if (!entry) { |
| 274 | entry = head; |
| 275 | while (entry) { |
| 276 | head = entry->next; |
| 277 | kfree(entry); |
| 278 | entry = head; |
| 279 | } |
| 280 | /* still use the old one */ |
| 281 | return; |
| 282 | } |
| 283 | entry->apic = old_entry->apic; |
| 284 | entry->pin = old_entry->pin; |
| 285 | tail->next = entry; |
| 286 | tail = entry; |
| 287 | old_entry = old_entry->next; |
| 288 | } |
| 289 | |
| 290 | tail->next = NULL; |
| 291 | cfg->irq_2_pin = head; |
| 292 | } |
| 293 | |
| 294 | static void free_irq_2_pin(struct irq_cfg *old_cfg, struct irq_cfg *cfg) |
| 295 | { |
| 296 | struct irq_pin_list *entry, *next; |
| 297 | |
| 298 | if (old_cfg->irq_2_pin == cfg->irq_2_pin) |
| 299 | return; |
| 300 | |
| 301 | entry = old_cfg->irq_2_pin; |
| 302 | |
| 303 | while (entry) { |
| 304 | next = entry->next; |
| 305 | kfree(entry); |
| 306 | entry = next; |
| 307 | } |
| 308 | old_cfg->irq_2_pin = NULL; |
| 309 | } |
| 310 | |
| 311 | void arch_init_copy_chip_data(struct irq_desc *old_desc, |
Yinghai Lu | 85ac16d | 2009-04-27 18:00:38 -0700 | [diff] [blame] | 312 | struct irq_desc *desc, int node) |
Yinghai Lu | 48a1b10 | 2008-12-11 00:15:01 -0800 | [diff] [blame] | 313 | { |
| 314 | struct irq_cfg *cfg; |
| 315 | struct irq_cfg *old_cfg; |
| 316 | |
Yinghai Lu | 85ac16d | 2009-04-27 18:00:38 -0700 | [diff] [blame] | 317 | cfg = get_one_free_irq_cfg(node); |
Yinghai Lu | 48a1b10 | 2008-12-11 00:15:01 -0800 | [diff] [blame] | 318 | |
| 319 | if (!cfg) |
| 320 | return; |
| 321 | |
| 322 | desc->chip_data = cfg; |
| 323 | |
| 324 | old_cfg = old_desc->chip_data; |
| 325 | |
| 326 | memcpy(cfg, old_cfg, sizeof(struct irq_cfg)); |
| 327 | |
Yinghai Lu | 85ac16d | 2009-04-27 18:00:38 -0700 | [diff] [blame] | 328 | init_copy_irq_2_pin(old_cfg, cfg, node); |
Yinghai Lu | 48a1b10 | 2008-12-11 00:15:01 -0800 | [diff] [blame] | 329 | } |
| 330 | |
| 331 | static void free_irq_cfg(struct irq_cfg *old_cfg) |
| 332 | { |
| 333 | kfree(old_cfg); |
| 334 | } |
| 335 | |
| 336 | void arch_free_chip_data(struct irq_desc *old_desc, struct irq_desc *desc) |
| 337 | { |
| 338 | struct irq_cfg *old_cfg, *cfg; |
| 339 | |
| 340 | old_cfg = old_desc->chip_data; |
| 341 | cfg = desc->chip_data; |
| 342 | |
| 343 | if (old_cfg == cfg) |
| 344 | return; |
| 345 | |
| 346 | if (old_cfg) { |
| 347 | free_irq_2_pin(old_cfg, cfg); |
| 348 | free_irq_cfg(old_cfg); |
| 349 | old_desc->chip_data = NULL; |
| 350 | } |
| 351 | } |
Yinghai Lu | fcef591 | 2009-04-27 17:58:23 -0700 | [diff] [blame] | 352 | /* end for move_irq_desc */ |
Yinghai Lu | 48a1b10 | 2008-12-11 00:15:01 -0800 | [diff] [blame] | 353 | |
Yinghai Lu | 0b8f1ef | 2008-12-05 18:58:31 -0800 | [diff] [blame] | 354 | #else |
| 355 | static struct irq_cfg *irq_cfg(unsigned int irq) |
| 356 | { |
| 357 | return irq < nr_irqs ? irq_cfgx + irq : NULL; |
| 358 | } |
| 359 | |
| 360 | #endif |
| 361 | |
Linus Torvalds | 130fe05 | 2006-11-01 09:11:00 -0800 | [diff] [blame] | 362 | struct io_apic { |
| 363 | unsigned int index; |
| 364 | unsigned int unused[3]; |
| 365 | unsigned int data; |
Suresh Siddha | 0280f7c | 2009-03-16 17:05:01 -0700 | [diff] [blame] | 366 | unsigned int unused2[11]; |
| 367 | unsigned int eoi; |
Linus Torvalds | 130fe05 | 2006-11-01 09:11:00 -0800 | [diff] [blame] | 368 | }; |
| 369 | |
| 370 | static __attribute_const__ struct io_apic __iomem *io_apic_base(int idx) |
| 371 | { |
| 372 | return (void __iomem *) __fix_to_virt(FIX_IO_APIC_BASE_0 + idx) |
Jaswinder Singh Rajput | b5ba7e6 | 2009-01-12 17:46:17 +0530 | [diff] [blame] | 373 | + (mp_ioapics[idx].apicaddr & ~PAGE_MASK); |
Linus Torvalds | 130fe05 | 2006-11-01 09:11:00 -0800 | [diff] [blame] | 374 | } |
| 375 | |
Suresh Siddha | 0280f7c | 2009-03-16 17:05:01 -0700 | [diff] [blame] | 376 | static inline void io_apic_eoi(unsigned int apic, unsigned int vector) |
| 377 | { |
| 378 | struct io_apic __iomem *io_apic = io_apic_base(apic); |
| 379 | writel(vector, &io_apic->eoi); |
| 380 | } |
| 381 | |
Linus Torvalds | 130fe05 | 2006-11-01 09:11:00 -0800 | [diff] [blame] | 382 | static inline unsigned int io_apic_read(unsigned int apic, unsigned int reg) |
| 383 | { |
| 384 | struct io_apic __iomem *io_apic = io_apic_base(apic); |
| 385 | writel(reg, &io_apic->index); |
| 386 | return readl(&io_apic->data); |
| 387 | } |
| 388 | |
| 389 | static inline void io_apic_write(unsigned int apic, unsigned int reg, unsigned int value) |
| 390 | { |
| 391 | struct io_apic __iomem *io_apic = io_apic_base(apic); |
| 392 | writel(reg, &io_apic->index); |
| 393 | writel(value, &io_apic->data); |
| 394 | } |
| 395 | |
| 396 | /* |
| 397 | * Re-write a value: to be used for read-modify-write |
| 398 | * cycles where the read already set up the index register. |
| 399 | * |
| 400 | * Older SiS APIC requires we rewrite the index register |
| 401 | */ |
| 402 | static inline void io_apic_modify(unsigned int apic, unsigned int reg, unsigned int value) |
| 403 | { |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 404 | struct io_apic __iomem *io_apic = io_apic_base(apic); |
Thomas Gleixner | d6c88a5 | 2008-10-15 15:27:23 +0200 | [diff] [blame] | 405 | |
| 406 | if (sis_apic_bug) |
| 407 | writel(reg, &io_apic->index); |
Linus Torvalds | 130fe05 | 2006-11-01 09:11:00 -0800 | [diff] [blame] | 408 | writel(value, &io_apic->data); |
| 409 | } |
| 410 | |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 411 | static bool io_apic_level_ack_pending(struct irq_cfg *cfg) |
Yinghai Lu | 047c8fd | 2008-08-19 20:50:41 -0700 | [diff] [blame] | 412 | { |
| 413 | struct irq_pin_list *entry; |
| 414 | unsigned long flags; |
Yinghai Lu | 047c8fd | 2008-08-19 20:50:41 -0700 | [diff] [blame] | 415 | |
| 416 | spin_lock_irqsave(&ioapic_lock, flags); |
| 417 | entry = cfg->irq_2_pin; |
| 418 | for (;;) { |
| 419 | unsigned int reg; |
| 420 | int pin; |
| 421 | |
| 422 | if (!entry) |
| 423 | break; |
| 424 | pin = entry->pin; |
| 425 | reg = io_apic_read(entry->apic, 0x10 + pin*2); |
| 426 | /* Is the remote IRR bit set? */ |
| 427 | if (reg & IO_APIC_REDIR_REMOTE_IRR) { |
| 428 | spin_unlock_irqrestore(&ioapic_lock, flags); |
| 429 | return true; |
| 430 | } |
| 431 | if (!entry->next) |
| 432 | break; |
| 433 | entry = entry->next; |
| 434 | } |
| 435 | spin_unlock_irqrestore(&ioapic_lock, flags); |
| 436 | |
| 437 | return false; |
| 438 | } |
Yinghai Lu | 047c8fd | 2008-08-19 20:50:41 -0700 | [diff] [blame] | 439 | |
Andi Kleen | cf4c6a2 | 2006-09-26 10:52:30 +0200 | [diff] [blame] | 440 | union entry_union { |
| 441 | struct { u32 w1, w2; }; |
| 442 | struct IO_APIC_route_entry entry; |
| 443 | }; |
| 444 | |
| 445 | static struct IO_APIC_route_entry ioapic_read_entry(int apic, int pin) |
| 446 | { |
| 447 | union entry_union eu; |
| 448 | unsigned long flags; |
| 449 | spin_lock_irqsave(&ioapic_lock, flags); |
| 450 | eu.w1 = io_apic_read(apic, 0x10 + 2 * pin); |
| 451 | eu.w2 = io_apic_read(apic, 0x11 + 2 * pin); |
| 452 | spin_unlock_irqrestore(&ioapic_lock, flags); |
| 453 | return eu.entry; |
| 454 | } |
| 455 | |
Linus Torvalds | f9dadfa | 2006-11-01 10:05:35 -0800 | [diff] [blame] | 456 | /* |
| 457 | * When we write a new IO APIC routing entry, we need to write the high |
| 458 | * word first! If the mask bit in the low word is clear, we will enable |
| 459 | * the interrupt, and we need to make sure the entry is fully populated |
| 460 | * before that happens. |
| 461 | */ |
Andi Kleen | d15512f | 2006-12-07 02:14:07 +0100 | [diff] [blame] | 462 | static void |
| 463 | __ioapic_write_entry(int apic, int pin, struct IO_APIC_route_entry e) |
| 464 | { |
Figo.zhang | 50a8d4d | 2009-06-17 22:25:20 +0800 | [diff] [blame] | 465 | union entry_union eu = {{0, 0}}; |
| 466 | |
Andi Kleen | d15512f | 2006-12-07 02:14:07 +0100 | [diff] [blame] | 467 | eu.entry = e; |
| 468 | io_apic_write(apic, 0x11 + 2*pin, eu.w2); |
| 469 | io_apic_write(apic, 0x10 + 2*pin, eu.w1); |
| 470 | } |
| 471 | |
Jeremy Fitzhardinge | ca97ab9 | 2009-02-09 12:05:47 -0800 | [diff] [blame] | 472 | void ioapic_write_entry(int apic, int pin, struct IO_APIC_route_entry e) |
Andi Kleen | cf4c6a2 | 2006-09-26 10:52:30 +0200 | [diff] [blame] | 473 | { |
| 474 | unsigned long flags; |
Andi Kleen | cf4c6a2 | 2006-09-26 10:52:30 +0200 | [diff] [blame] | 475 | spin_lock_irqsave(&ioapic_lock, flags); |
Andi Kleen | d15512f | 2006-12-07 02:14:07 +0100 | [diff] [blame] | 476 | __ioapic_write_entry(apic, pin, e); |
Linus Torvalds | f9dadfa | 2006-11-01 10:05:35 -0800 | [diff] [blame] | 477 | spin_unlock_irqrestore(&ioapic_lock, flags); |
| 478 | } |
| 479 | |
| 480 | /* |
| 481 | * When we mask an IO APIC routing entry, we need to write the low |
| 482 | * word first, in order to set the mask bit before we change the |
| 483 | * high bits! |
| 484 | */ |
| 485 | static void ioapic_mask_entry(int apic, int pin) |
| 486 | { |
| 487 | unsigned long flags; |
| 488 | union entry_union eu = { .entry.mask = 1 }; |
| 489 | |
| 490 | spin_lock_irqsave(&ioapic_lock, flags); |
Andi Kleen | cf4c6a2 | 2006-09-26 10:52:30 +0200 | [diff] [blame] | 491 | io_apic_write(apic, 0x10 + 2*pin, eu.w1); |
| 492 | io_apic_write(apic, 0x11 + 2*pin, eu.w2); |
| 493 | spin_unlock_irqrestore(&ioapic_lock, flags); |
| 494 | } |
| 495 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 496 | /* |
| 497 | * The common case is 1:1 IRQ<->pin mappings. Sometimes there are |
| 498 | * shared ISA-space IRQs, so we have to support them. We are super |
| 499 | * fast in the common case, and fast for shared ISA-space IRQs. |
| 500 | */ |
Yinghai Lu | 85ac16d | 2009-04-27 18:00:38 -0700 | [diff] [blame] | 501 | static void add_pin_to_irq_node(struct irq_cfg *cfg, int node, int apic, int pin) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 502 | { |
Yinghai Lu | 0f978f4 | 2008-08-19 20:50:26 -0700 | [diff] [blame] | 503 | struct irq_pin_list *entry; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 504 | |
Yinghai Lu | 0f978f4 | 2008-08-19 20:50:26 -0700 | [diff] [blame] | 505 | entry = cfg->irq_2_pin; |
| 506 | if (!entry) { |
Yinghai Lu | 85ac16d | 2009-04-27 18:00:38 -0700 | [diff] [blame] | 507 | entry = get_one_free_irq_2_pin(node); |
Yinghai Lu | 0b8f1ef | 2008-12-05 18:58:31 -0800 | [diff] [blame] | 508 | if (!entry) { |
| 509 | printk(KERN_ERR "can not alloc irq_2_pin to add %d - %d\n", |
| 510 | apic, pin); |
| 511 | return; |
| 512 | } |
Yinghai Lu | 0f978f4 | 2008-08-19 20:50:26 -0700 | [diff] [blame] | 513 | cfg->irq_2_pin = entry; |
| 514 | entry->apic = apic; |
| 515 | entry->pin = pin; |
Yinghai Lu | 0f978f4 | 2008-08-19 20:50:26 -0700 | [diff] [blame] | 516 | return; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 517 | } |
Yinghai Lu | 0f978f4 | 2008-08-19 20:50:26 -0700 | [diff] [blame] | 518 | |
| 519 | while (entry->next) { |
| 520 | /* not again, please */ |
| 521 | if (entry->apic == apic && entry->pin == pin) |
| 522 | return; |
| 523 | |
| 524 | entry = entry->next; |
| 525 | } |
| 526 | |
Yinghai Lu | 85ac16d | 2009-04-27 18:00:38 -0700 | [diff] [blame] | 527 | entry->next = get_one_free_irq_2_pin(node); |
Yinghai Lu | 0f978f4 | 2008-08-19 20:50:26 -0700 | [diff] [blame] | 528 | entry = entry->next; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 529 | entry->apic = apic; |
| 530 | entry->pin = pin; |
| 531 | } |
| 532 | |
| 533 | /* |
| 534 | * Reroute an IRQ to a different pin. |
| 535 | */ |
Yinghai Lu | 85ac16d | 2009-04-27 18:00:38 -0700 | [diff] [blame] | 536 | static void __init replace_pin_at_irq_node(struct irq_cfg *cfg, int node, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 537 | int oldapic, int oldpin, |
| 538 | int newapic, int newpin) |
| 539 | { |
Yinghai Lu | 0f978f4 | 2008-08-19 20:50:26 -0700 | [diff] [blame] | 540 | struct irq_pin_list *entry = cfg->irq_2_pin; |
| 541 | int replaced = 0; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 542 | |
Yinghai Lu | 0f978f4 | 2008-08-19 20:50:26 -0700 | [diff] [blame] | 543 | while (entry) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 544 | if (entry->apic == oldapic && entry->pin == oldpin) { |
| 545 | entry->apic = newapic; |
| 546 | entry->pin = newpin; |
Yinghai Lu | 0f978f4 | 2008-08-19 20:50:26 -0700 | [diff] [blame] | 547 | replaced = 1; |
| 548 | /* every one is different, right? */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 549 | break; |
Yinghai Lu | 0f978f4 | 2008-08-19 20:50:26 -0700 | [diff] [blame] | 550 | } |
| 551 | entry = entry->next; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 552 | } |
Yinghai Lu | 0f978f4 | 2008-08-19 20:50:26 -0700 | [diff] [blame] | 553 | |
| 554 | /* why? call replace before add? */ |
| 555 | if (!replaced) |
Yinghai Lu | 85ac16d | 2009-04-27 18:00:38 -0700 | [diff] [blame] | 556 | add_pin_to_irq_node(cfg, node, newapic, newpin); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 557 | } |
| 558 | |
Jeremy Fitzhardinge | 2f210de | 2009-06-08 02:55:22 -0700 | [diff] [blame] | 559 | static void io_apic_modify_irq(struct irq_cfg *cfg, |
| 560 | int mask_and, int mask_or, |
| 561 | void (*final)(struct irq_pin_list *entry)) |
Cyrill Gorcunov | 87783be | 2008-09-10 22:19:50 +0400 | [diff] [blame] | 562 | { |
| 563 | int pin; |
Cyrill Gorcunov | 87783be | 2008-09-10 22:19:50 +0400 | [diff] [blame] | 564 | struct irq_pin_list *entry; |
| 565 | |
Cyrill Gorcunov | 87783be | 2008-09-10 22:19:50 +0400 | [diff] [blame] | 566 | for (entry = cfg->irq_2_pin; entry != NULL; entry = entry->next) { |
| 567 | unsigned int reg; |
| 568 | pin = entry->pin; |
| 569 | reg = io_apic_read(entry->apic, 0x10 + pin * 2); |
| 570 | reg &= mask_and; |
| 571 | reg |= mask_or; |
| 572 | io_apic_modify(entry->apic, 0x10 + pin * 2, reg); |
| 573 | if (final) |
| 574 | final(entry); |
| 575 | } |
Yinghai Lu | 047c8fd | 2008-08-19 20:50:41 -0700 | [diff] [blame] | 576 | } |
| 577 | |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 578 | static void __unmask_IO_APIC_irq(struct irq_cfg *cfg) |
Cyrill Gorcunov | 87783be | 2008-09-10 22:19:50 +0400 | [diff] [blame] | 579 | { |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 580 | io_apic_modify_irq(cfg, ~IO_APIC_REDIR_MASKED, 0, NULL); |
Cyrill Gorcunov | 87783be | 2008-09-10 22:19:50 +0400 | [diff] [blame] | 581 | } |
Yinghai Lu | 4e738e2 | 2008-08-19 20:50:47 -0700 | [diff] [blame] | 582 | |
Jaswinder Singh Rajput | 7f3e632 | 2008-12-29 20:34:35 +0530 | [diff] [blame] | 583 | static void io_apic_sync(struct irq_pin_list *entry) |
Yinghai Lu | 4e738e2 | 2008-08-19 20:50:47 -0700 | [diff] [blame] | 584 | { |
Cyrill Gorcunov | 87783be | 2008-09-10 22:19:50 +0400 | [diff] [blame] | 585 | /* |
| 586 | * Synchronize the IO-APIC and the CPU by doing |
| 587 | * a dummy read from the IO-APIC |
| 588 | */ |
| 589 | struct io_apic __iomem *io_apic; |
| 590 | io_apic = io_apic_base(entry->apic); |
Yinghai Lu | 4e738e2 | 2008-08-19 20:50:47 -0700 | [diff] [blame] | 591 | readl(&io_apic->data); |
| 592 | } |
| 593 | |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 594 | static void __mask_IO_APIC_irq(struct irq_cfg *cfg) |
Cyrill Gorcunov | 87783be | 2008-09-10 22:19:50 +0400 | [diff] [blame] | 595 | { |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 596 | io_apic_modify_irq(cfg, ~0, IO_APIC_REDIR_MASKED, &io_apic_sync); |
Cyrill Gorcunov | 87783be | 2008-09-10 22:19:50 +0400 | [diff] [blame] | 597 | } |
Yinghai Lu | 047c8fd | 2008-08-19 20:50:41 -0700 | [diff] [blame] | 598 | |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 599 | static void __mask_and_edge_IO_APIC_irq(struct irq_cfg *cfg) |
Cyrill Gorcunov | 87783be | 2008-09-10 22:19:50 +0400 | [diff] [blame] | 600 | { |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 601 | io_apic_modify_irq(cfg, ~IO_APIC_REDIR_LEVEL_TRIGGER, |
Cyrill Gorcunov | 87783be | 2008-09-10 22:19:50 +0400 | [diff] [blame] | 602 | IO_APIC_REDIR_MASKED, NULL); |
| 603 | } |
Yinghai Lu | 047c8fd | 2008-08-19 20:50:41 -0700 | [diff] [blame] | 604 | |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 605 | static void __unmask_and_level_IO_APIC_irq(struct irq_cfg *cfg) |
Cyrill Gorcunov | 87783be | 2008-09-10 22:19:50 +0400 | [diff] [blame] | 606 | { |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 607 | io_apic_modify_irq(cfg, ~IO_APIC_REDIR_MASKED, |
Cyrill Gorcunov | 87783be | 2008-09-10 22:19:50 +0400 | [diff] [blame] | 608 | IO_APIC_REDIR_LEVEL_TRIGGER, NULL); |
| 609 | } |
Yinghai Lu | 047c8fd | 2008-08-19 20:50:41 -0700 | [diff] [blame] | 610 | |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 611 | static void mask_IO_APIC_irq_desc(struct irq_desc *desc) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 612 | { |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 613 | struct irq_cfg *cfg = desc->chip_data; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 614 | unsigned long flags; |
| 615 | |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 616 | BUG_ON(!cfg); |
| 617 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 618 | spin_lock_irqsave(&ioapic_lock, flags); |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 619 | __mask_IO_APIC_irq(cfg); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 620 | spin_unlock_irqrestore(&ioapic_lock, flags); |
| 621 | } |
| 622 | |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 623 | static void unmask_IO_APIC_irq_desc(struct irq_desc *desc) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 624 | { |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 625 | struct irq_cfg *cfg = desc->chip_data; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 626 | unsigned long flags; |
| 627 | |
| 628 | spin_lock_irqsave(&ioapic_lock, flags); |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 629 | __unmask_IO_APIC_irq(cfg); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 630 | spin_unlock_irqrestore(&ioapic_lock, flags); |
| 631 | } |
| 632 | |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 633 | static void mask_IO_APIC_irq(unsigned int irq) |
| 634 | { |
| 635 | struct irq_desc *desc = irq_to_desc(irq); |
| 636 | |
| 637 | mask_IO_APIC_irq_desc(desc); |
| 638 | } |
| 639 | static void unmask_IO_APIC_irq(unsigned int irq) |
| 640 | { |
| 641 | struct irq_desc *desc = irq_to_desc(irq); |
| 642 | |
| 643 | unmask_IO_APIC_irq_desc(desc); |
| 644 | } |
| 645 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 646 | static void clear_IO_APIC_pin(unsigned int apic, unsigned int pin) |
| 647 | { |
| 648 | struct IO_APIC_route_entry entry; |
Paolo Ciarrocchi | 3606244 | 2008-06-08 13:07:18 +0200 | [diff] [blame] | 649 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 650 | /* Check delivery_mode to be sure we're not clearing an SMI pin */ |
Andi Kleen | cf4c6a2 | 2006-09-26 10:52:30 +0200 | [diff] [blame] | 651 | entry = ioapic_read_entry(apic, pin); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 652 | if (entry.delivery_mode == dest_SMI) |
| 653 | return; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 654 | /* |
| 655 | * Disable it in the IO-APIC irq-routing table: |
| 656 | */ |
Linus Torvalds | f9dadfa | 2006-11-01 10:05:35 -0800 | [diff] [blame] | 657 | ioapic_mask_entry(apic, pin); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 658 | } |
| 659 | |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 660 | static void clear_IO_APIC (void) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 661 | { |
| 662 | int apic, pin; |
| 663 | |
| 664 | for (apic = 0; apic < nr_ioapics; apic++) |
| 665 | for (pin = 0; pin < nr_ioapic_registers[apic]; pin++) |
| 666 | clear_IO_APIC_pin(apic, pin); |
| 667 | } |
| 668 | |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 669 | #ifdef CONFIG_X86_32 |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 670 | /* |
| 671 | * support for broken MP BIOSs, enables hand-redirection of PIRQ0-7 to |
| 672 | * specific CPU-side IRQs. |
| 673 | */ |
| 674 | |
| 675 | #define MAX_PIRQS 8 |
Yinghai Lu | 3bd25d0 | 2009-02-15 02:54:03 -0800 | [diff] [blame] | 676 | static int pirq_entries[MAX_PIRQS] = { |
| 677 | [0 ... MAX_PIRQS - 1] = -1 |
| 678 | }; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 679 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 680 | static int __init ioapic_pirq_setup(char *str) |
| 681 | { |
| 682 | int i, max; |
| 683 | int ints[MAX_PIRQS+1]; |
| 684 | |
| 685 | get_options(str, ARRAY_SIZE(ints), ints); |
| 686 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 687 | apic_printk(APIC_VERBOSE, KERN_INFO |
| 688 | "PIRQ redirection, working around broken MP-BIOS.\n"); |
| 689 | max = MAX_PIRQS; |
| 690 | if (ints[0] < MAX_PIRQS) |
| 691 | max = ints[0]; |
| 692 | |
| 693 | for (i = 0; i < max; i++) { |
| 694 | apic_printk(APIC_VERBOSE, KERN_DEBUG |
| 695 | "... PIRQ%d -> IRQ %d\n", i, ints[i+1]); |
| 696 | /* |
| 697 | * PIRQs are mapped upside down, usually. |
| 698 | */ |
| 699 | pirq_entries[MAX_PIRQS-i-1] = ints[i+1]; |
| 700 | } |
| 701 | return 1; |
| 702 | } |
| 703 | |
| 704 | __setup("pirq=", ioapic_pirq_setup); |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 705 | #endif /* CONFIG_X86_32 */ |
| 706 | |
Fenghua Yu | b24696b | 2009-03-27 14:22:44 -0700 | [diff] [blame] | 707 | struct IO_APIC_route_entry **alloc_ioapic_entries(void) |
| 708 | { |
| 709 | int apic; |
| 710 | struct IO_APIC_route_entry **ioapic_entries; |
| 711 | |
| 712 | ioapic_entries = kzalloc(sizeof(*ioapic_entries) * nr_ioapics, |
| 713 | GFP_ATOMIC); |
| 714 | if (!ioapic_entries) |
| 715 | return 0; |
| 716 | |
| 717 | for (apic = 0; apic < nr_ioapics; apic++) { |
| 718 | ioapic_entries[apic] = |
| 719 | kzalloc(sizeof(struct IO_APIC_route_entry) * |
| 720 | nr_ioapic_registers[apic], GFP_ATOMIC); |
| 721 | if (!ioapic_entries[apic]) |
| 722 | goto nomem; |
| 723 | } |
| 724 | |
| 725 | return ioapic_entries; |
| 726 | |
| 727 | nomem: |
| 728 | while (--apic >= 0) |
| 729 | kfree(ioapic_entries[apic]); |
| 730 | kfree(ioapic_entries); |
| 731 | |
| 732 | return 0; |
| 733 | } |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 734 | |
| 735 | /* |
Suresh Siddha | 05c3dc2 | 2009-03-16 17:05:03 -0700 | [diff] [blame] | 736 | * Saves all the IO-APIC RTE's |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 737 | */ |
Fenghua Yu | b24696b | 2009-03-27 14:22:44 -0700 | [diff] [blame] | 738 | int save_IO_APIC_setup(struct IO_APIC_route_entry **ioapic_entries) |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 739 | { |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 740 | int apic, pin; |
| 741 | |
Fenghua Yu | b24696b | 2009-03-27 14:22:44 -0700 | [diff] [blame] | 742 | if (!ioapic_entries) |
| 743 | return -ENOMEM; |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 744 | |
| 745 | for (apic = 0; apic < nr_ioapics; apic++) { |
Fenghua Yu | b24696b | 2009-03-27 14:22:44 -0700 | [diff] [blame] | 746 | if (!ioapic_entries[apic]) |
| 747 | return -ENOMEM; |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 748 | |
Suresh Siddha | 05c3dc2 | 2009-03-16 17:05:03 -0700 | [diff] [blame] | 749 | for (pin = 0; pin < nr_ioapic_registers[apic]; pin++) |
Fenghua Yu | b24696b | 2009-03-27 14:22:44 -0700 | [diff] [blame] | 750 | ioapic_entries[apic][pin] = |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 751 | ioapic_read_entry(apic, pin); |
Fenghua Yu | b24696b | 2009-03-27 14:22:44 -0700 | [diff] [blame] | 752 | } |
Cyrill Gorcunov | 5ffa4eb | 2008-09-18 23:37:57 +0400 | [diff] [blame] | 753 | |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 754 | return 0; |
| 755 | } |
| 756 | |
Fenghua Yu | b24696b | 2009-03-27 14:22:44 -0700 | [diff] [blame] | 757 | /* |
| 758 | * Mask all IO APIC entries. |
| 759 | */ |
| 760 | void mask_IO_APIC_setup(struct IO_APIC_route_entry **ioapic_entries) |
Suresh Siddha | 05c3dc2 | 2009-03-16 17:05:03 -0700 | [diff] [blame] | 761 | { |
| 762 | int apic, pin; |
| 763 | |
Fenghua Yu | b24696b | 2009-03-27 14:22:44 -0700 | [diff] [blame] | 764 | if (!ioapic_entries) |
| 765 | return; |
| 766 | |
Suresh Siddha | 05c3dc2 | 2009-03-16 17:05:03 -0700 | [diff] [blame] | 767 | for (apic = 0; apic < nr_ioapics; apic++) { |
Fenghua Yu | b24696b | 2009-03-27 14:22:44 -0700 | [diff] [blame] | 768 | if (!ioapic_entries[apic]) |
Suresh Siddha | 05c3dc2 | 2009-03-16 17:05:03 -0700 | [diff] [blame] | 769 | break; |
Fenghua Yu | b24696b | 2009-03-27 14:22:44 -0700 | [diff] [blame] | 770 | |
Suresh Siddha | 05c3dc2 | 2009-03-16 17:05:03 -0700 | [diff] [blame] | 771 | for (pin = 0; pin < nr_ioapic_registers[apic]; pin++) { |
| 772 | struct IO_APIC_route_entry entry; |
| 773 | |
Fenghua Yu | b24696b | 2009-03-27 14:22:44 -0700 | [diff] [blame] | 774 | entry = ioapic_entries[apic][pin]; |
Suresh Siddha | 05c3dc2 | 2009-03-16 17:05:03 -0700 | [diff] [blame] | 775 | if (!entry.mask) { |
| 776 | entry.mask = 1; |
| 777 | ioapic_write_entry(apic, pin, entry); |
| 778 | } |
| 779 | } |
| 780 | } |
| 781 | } |
| 782 | |
Fenghua Yu | b24696b | 2009-03-27 14:22:44 -0700 | [diff] [blame] | 783 | /* |
| 784 | * Restore IO APIC entries which was saved in ioapic_entries. |
| 785 | */ |
| 786 | int restore_IO_APIC_setup(struct IO_APIC_route_entry **ioapic_entries) |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 787 | { |
| 788 | int apic, pin; |
| 789 | |
Fenghua Yu | b24696b | 2009-03-27 14:22:44 -0700 | [diff] [blame] | 790 | if (!ioapic_entries) |
| 791 | return -ENOMEM; |
| 792 | |
Cyrill Gorcunov | 5ffa4eb | 2008-09-18 23:37:57 +0400 | [diff] [blame] | 793 | for (apic = 0; apic < nr_ioapics; apic++) { |
Fenghua Yu | b24696b | 2009-03-27 14:22:44 -0700 | [diff] [blame] | 794 | if (!ioapic_entries[apic]) |
| 795 | return -ENOMEM; |
| 796 | |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 797 | for (pin = 0; pin < nr_ioapic_registers[apic]; pin++) |
| 798 | ioapic_write_entry(apic, pin, |
Fenghua Yu | b24696b | 2009-03-27 14:22:44 -0700 | [diff] [blame] | 799 | ioapic_entries[apic][pin]); |
Cyrill Gorcunov | 5ffa4eb | 2008-09-18 23:37:57 +0400 | [diff] [blame] | 800 | } |
Fenghua Yu | b24696b | 2009-03-27 14:22:44 -0700 | [diff] [blame] | 801 | return 0; |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 802 | } |
| 803 | |
Fenghua Yu | b24696b | 2009-03-27 14:22:44 -0700 | [diff] [blame] | 804 | void free_ioapic_entries(struct IO_APIC_route_entry **ioapic_entries) |
| 805 | { |
| 806 | int apic; |
| 807 | |
| 808 | for (apic = 0; apic < nr_ioapics; apic++) |
| 809 | kfree(ioapic_entries[apic]); |
| 810 | |
| 811 | kfree(ioapic_entries); |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 812 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 813 | |
| 814 | /* |
| 815 | * Find the IRQ entry number of a certain pin. |
| 816 | */ |
| 817 | static int find_irq_entry(int apic, int pin, int type) |
| 818 | { |
| 819 | int i; |
| 820 | |
| 821 | for (i = 0; i < mp_irq_entries; i++) |
Jaswinder Singh Rajput | c2c2174 | 2009-01-12 17:47:22 +0530 | [diff] [blame] | 822 | if (mp_irqs[i].irqtype == type && |
| 823 | (mp_irqs[i].dstapic == mp_ioapics[apic].apicid || |
| 824 | mp_irqs[i].dstapic == MP_APIC_ALL) && |
| 825 | mp_irqs[i].dstirq == pin) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 826 | return i; |
| 827 | |
| 828 | return -1; |
| 829 | } |
| 830 | |
| 831 | /* |
| 832 | * Find the pin to which IRQ[irq] (ISA) is connected |
| 833 | */ |
Eric W. Biederman | fcfd636 | 2005-10-30 14:59:39 -0800 | [diff] [blame] | 834 | static int __init find_isa_irq_pin(int irq, int type) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 835 | { |
| 836 | int i; |
| 837 | |
| 838 | for (i = 0; i < mp_irq_entries; i++) { |
Jaswinder Singh Rajput | c2c2174 | 2009-01-12 17:47:22 +0530 | [diff] [blame] | 839 | int lbus = mp_irqs[i].srcbus; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 840 | |
Alexey Starikovskiy | d27e2b8 | 2008-03-20 14:54:18 +0300 | [diff] [blame] | 841 | if (test_bit(lbus, mp_bus_not_pci) && |
Jaswinder Singh Rajput | c2c2174 | 2009-01-12 17:47:22 +0530 | [diff] [blame] | 842 | (mp_irqs[i].irqtype == type) && |
| 843 | (mp_irqs[i].srcbusirq == irq)) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 844 | |
Jaswinder Singh Rajput | c2c2174 | 2009-01-12 17:47:22 +0530 | [diff] [blame] | 845 | return mp_irqs[i].dstirq; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 846 | } |
| 847 | return -1; |
| 848 | } |
| 849 | |
Eric W. Biederman | fcfd636 | 2005-10-30 14:59:39 -0800 | [diff] [blame] | 850 | static int __init find_isa_irq_apic(int irq, int type) |
| 851 | { |
| 852 | int i; |
| 853 | |
| 854 | for (i = 0; i < mp_irq_entries; i++) { |
Jaswinder Singh Rajput | c2c2174 | 2009-01-12 17:47:22 +0530 | [diff] [blame] | 855 | int lbus = mp_irqs[i].srcbus; |
Eric W. Biederman | fcfd636 | 2005-10-30 14:59:39 -0800 | [diff] [blame] | 856 | |
Alexey Starikovskiy | 73b2961 | 2008-03-20 14:54:24 +0300 | [diff] [blame] | 857 | if (test_bit(lbus, mp_bus_not_pci) && |
Jaswinder Singh Rajput | c2c2174 | 2009-01-12 17:47:22 +0530 | [diff] [blame] | 858 | (mp_irqs[i].irqtype == type) && |
| 859 | (mp_irqs[i].srcbusirq == irq)) |
Eric W. Biederman | fcfd636 | 2005-10-30 14:59:39 -0800 | [diff] [blame] | 860 | break; |
| 861 | } |
| 862 | if (i < mp_irq_entries) { |
| 863 | int apic; |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 864 | for(apic = 0; apic < nr_ioapics; apic++) { |
Jaswinder Singh Rajput | c2c2174 | 2009-01-12 17:47:22 +0530 | [diff] [blame] | 865 | if (mp_ioapics[apic].apicid == mp_irqs[i].dstapic) |
Eric W. Biederman | fcfd636 | 2005-10-30 14:59:39 -0800 | [diff] [blame] | 866 | return apic; |
| 867 | } |
| 868 | } |
| 869 | |
| 870 | return -1; |
| 871 | } |
| 872 | |
Alexey Starikovskiy | c0a282c | 2008-03-20 14:55:02 +0300 | [diff] [blame] | 873 | #if defined(CONFIG_EISA) || defined(CONFIG_MCA) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 874 | /* |
| 875 | * EISA Edge/Level control register, ELCR |
| 876 | */ |
| 877 | static int EISA_ELCR(unsigned int irq) |
| 878 | { |
Yinghai Lu | 99d093d | 2008-12-05 18:58:32 -0800 | [diff] [blame] | 879 | if (irq < NR_IRQS_LEGACY) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 880 | unsigned int port = 0x4d0 + (irq >> 3); |
| 881 | return (inb(port) >> (irq & 7)) & 1; |
| 882 | } |
| 883 | apic_printk(APIC_VERBOSE, KERN_INFO |
| 884 | "Broken MPtable reports ISA irq %d\n", irq); |
| 885 | return 0; |
| 886 | } |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 887 | |
Alexey Starikovskiy | c0a282c | 2008-03-20 14:55:02 +0300 | [diff] [blame] | 888 | #endif |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 889 | |
Alexey Starikovskiy | 6728801 | 2008-03-20 14:54:36 +0300 | [diff] [blame] | 890 | /* ISA interrupts are always polarity zero edge triggered, |
| 891 | * when listed as conforming in the MP table. */ |
| 892 | |
| 893 | #define default_ISA_trigger(idx) (0) |
| 894 | #define default_ISA_polarity(idx) (0) |
| 895 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 896 | /* EISA interrupts are always polarity zero and can be edge or level |
| 897 | * trigger depending on the ELCR value. If an interrupt is listed as |
| 898 | * EISA conforming in the MP table, that means its trigger type must |
| 899 | * be read in from the ELCR */ |
| 900 | |
Jaswinder Singh Rajput | c2c2174 | 2009-01-12 17:47:22 +0530 | [diff] [blame] | 901 | #define default_EISA_trigger(idx) (EISA_ELCR(mp_irqs[idx].srcbusirq)) |
Alexey Starikovskiy | 6728801 | 2008-03-20 14:54:36 +0300 | [diff] [blame] | 902 | #define default_EISA_polarity(idx) default_ISA_polarity(idx) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 903 | |
| 904 | /* PCI interrupts are always polarity one level triggered, |
| 905 | * when listed as conforming in the MP table. */ |
| 906 | |
| 907 | #define default_PCI_trigger(idx) (1) |
| 908 | #define default_PCI_polarity(idx) (1) |
| 909 | |
| 910 | /* MCA interrupts are always polarity zero level triggered, |
| 911 | * when listed as conforming in the MP table. */ |
| 912 | |
| 913 | #define default_MCA_trigger(idx) (1) |
Alexey Starikovskiy | 6728801 | 2008-03-20 14:54:36 +0300 | [diff] [blame] | 914 | #define default_MCA_polarity(idx) default_ISA_polarity(idx) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 915 | |
Shaohua Li | 61fd47e | 2007-11-17 01:05:28 -0500 | [diff] [blame] | 916 | static int MPBIOS_polarity(int idx) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 917 | { |
Jaswinder Singh Rajput | c2c2174 | 2009-01-12 17:47:22 +0530 | [diff] [blame] | 918 | int bus = mp_irqs[idx].srcbus; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 919 | int polarity; |
| 920 | |
| 921 | /* |
| 922 | * Determine IRQ line polarity (high active or low active): |
| 923 | */ |
Jaswinder Singh Rajput | c2c2174 | 2009-01-12 17:47:22 +0530 | [diff] [blame] | 924 | switch (mp_irqs[idx].irqflag & 3) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 925 | { |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 926 | case 0: /* conforms, ie. bus-type dependent polarity */ |
| 927 | if (test_bit(bus, mp_bus_not_pci)) |
| 928 | polarity = default_ISA_polarity(idx); |
| 929 | else |
| 930 | polarity = default_PCI_polarity(idx); |
| 931 | break; |
| 932 | case 1: /* high active */ |
| 933 | { |
| 934 | polarity = 0; |
| 935 | break; |
| 936 | } |
| 937 | case 2: /* reserved */ |
| 938 | { |
| 939 | printk(KERN_WARNING "broken BIOS!!\n"); |
| 940 | polarity = 1; |
| 941 | break; |
| 942 | } |
| 943 | case 3: /* low active */ |
| 944 | { |
| 945 | polarity = 1; |
| 946 | break; |
| 947 | } |
| 948 | default: /* invalid */ |
| 949 | { |
| 950 | printk(KERN_WARNING "broken BIOS!!\n"); |
| 951 | polarity = 1; |
| 952 | break; |
| 953 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 954 | } |
| 955 | return polarity; |
| 956 | } |
| 957 | |
| 958 | static int MPBIOS_trigger(int idx) |
| 959 | { |
Jaswinder Singh Rajput | c2c2174 | 2009-01-12 17:47:22 +0530 | [diff] [blame] | 960 | int bus = mp_irqs[idx].srcbus; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 961 | int trigger; |
| 962 | |
| 963 | /* |
| 964 | * Determine IRQ trigger mode (edge or level sensitive): |
| 965 | */ |
Jaswinder Singh Rajput | c2c2174 | 2009-01-12 17:47:22 +0530 | [diff] [blame] | 966 | switch ((mp_irqs[idx].irqflag>>2) & 3) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 967 | { |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 968 | case 0: /* conforms, ie. bus-type dependent */ |
| 969 | if (test_bit(bus, mp_bus_not_pci)) |
| 970 | trigger = default_ISA_trigger(idx); |
| 971 | else |
| 972 | trigger = default_PCI_trigger(idx); |
Alexey Starikovskiy | c0a282c | 2008-03-20 14:55:02 +0300 | [diff] [blame] | 973 | #if defined(CONFIG_EISA) || defined(CONFIG_MCA) |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 974 | switch (mp_bus_id_to_type[bus]) { |
| 975 | case MP_BUS_ISA: /* ISA pin */ |
| 976 | { |
| 977 | /* set before the switch */ |
| 978 | break; |
| 979 | } |
| 980 | case MP_BUS_EISA: /* EISA pin */ |
| 981 | { |
| 982 | trigger = default_EISA_trigger(idx); |
| 983 | break; |
| 984 | } |
| 985 | case MP_BUS_PCI: /* PCI pin */ |
| 986 | { |
| 987 | /* set before the switch */ |
| 988 | break; |
| 989 | } |
| 990 | case MP_BUS_MCA: /* MCA pin */ |
| 991 | { |
| 992 | trigger = default_MCA_trigger(idx); |
| 993 | break; |
| 994 | } |
| 995 | default: |
| 996 | { |
| 997 | printk(KERN_WARNING "broken BIOS!!\n"); |
| 998 | trigger = 1; |
| 999 | break; |
| 1000 | } |
| 1001 | } |
| 1002 | #endif |
| 1003 | break; |
| 1004 | case 1: /* edge */ |
Paolo Ciarrocchi | 3606244 | 2008-06-08 13:07:18 +0200 | [diff] [blame] | 1005 | { |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 1006 | trigger = 0; |
Paolo Ciarrocchi | 3606244 | 2008-06-08 13:07:18 +0200 | [diff] [blame] | 1007 | break; |
| 1008 | } |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 1009 | case 2: /* reserved */ |
Paolo Ciarrocchi | 3606244 | 2008-06-08 13:07:18 +0200 | [diff] [blame] | 1010 | { |
| 1011 | printk(KERN_WARNING "broken BIOS!!\n"); |
| 1012 | trigger = 1; |
| 1013 | break; |
| 1014 | } |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 1015 | case 3: /* level */ |
| 1016 | { |
| 1017 | trigger = 1; |
| 1018 | break; |
| 1019 | } |
| 1020 | default: /* invalid */ |
| 1021 | { |
| 1022 | printk(KERN_WARNING "broken BIOS!!\n"); |
| 1023 | trigger = 0; |
| 1024 | break; |
| 1025 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1026 | } |
| 1027 | return trigger; |
| 1028 | } |
| 1029 | |
| 1030 | static inline int irq_polarity(int idx) |
| 1031 | { |
| 1032 | return MPBIOS_polarity(idx); |
| 1033 | } |
| 1034 | |
| 1035 | static inline int irq_trigger(int idx) |
| 1036 | { |
| 1037 | return MPBIOS_trigger(idx); |
| 1038 | } |
| 1039 | |
Yinghai Lu | efa2559 | 2008-08-19 20:50:36 -0700 | [diff] [blame] | 1040 | int (*ioapic_renumber_irq)(int ioapic, int irq); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1041 | static int pin_2_irq(int idx, int apic, int pin) |
| 1042 | { |
| 1043 | int irq, i; |
Jaswinder Singh Rajput | c2c2174 | 2009-01-12 17:47:22 +0530 | [diff] [blame] | 1044 | int bus = mp_irqs[idx].srcbus; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1045 | |
| 1046 | /* |
| 1047 | * Debugging check, we are in big trouble if this message pops up! |
| 1048 | */ |
Jaswinder Singh Rajput | c2c2174 | 2009-01-12 17:47:22 +0530 | [diff] [blame] | 1049 | if (mp_irqs[idx].dstirq != pin) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1050 | printk(KERN_ERR "broken BIOS or MPTABLE parser, ayiee!!\n"); |
| 1051 | |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 1052 | if (test_bit(bus, mp_bus_not_pci)) { |
Jaswinder Singh Rajput | c2c2174 | 2009-01-12 17:47:22 +0530 | [diff] [blame] | 1053 | irq = mp_irqs[idx].srcbusirq; |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 1054 | } else { |
Alexey Starikovskiy | 643befe | 2008-03-20 14:54:49 +0300 | [diff] [blame] | 1055 | /* |
| 1056 | * PCI IRQs are mapped in order |
| 1057 | */ |
| 1058 | i = irq = 0; |
| 1059 | while (i < apic) |
| 1060 | irq += nr_ioapic_registers[i++]; |
| 1061 | irq += pin; |
Thomas Gleixner | d6c88a5 | 2008-10-15 15:27:23 +0200 | [diff] [blame] | 1062 | /* |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 1063 | * For MPS mode, so far only needed by ES7000 platform |
| 1064 | */ |
Thomas Gleixner | d6c88a5 | 2008-10-15 15:27:23 +0200 | [diff] [blame] | 1065 | if (ioapic_renumber_irq) |
| 1066 | irq = ioapic_renumber_irq(apic, irq); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1067 | } |
| 1068 | |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 1069 | #ifdef CONFIG_X86_32 |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1070 | /* |
| 1071 | * PCI IRQ command line redirection. Yes, limits are hardcoded. |
| 1072 | */ |
| 1073 | if ((pin >= 16) && (pin <= 23)) { |
| 1074 | if (pirq_entries[pin-16] != -1) { |
| 1075 | if (!pirq_entries[pin-16]) { |
| 1076 | apic_printk(APIC_VERBOSE, KERN_DEBUG |
| 1077 | "disabling PIRQ%d\n", pin-16); |
| 1078 | } else { |
| 1079 | irq = pirq_entries[pin-16]; |
| 1080 | apic_printk(APIC_VERBOSE, KERN_DEBUG |
| 1081 | "using PIRQ%d -> IRQ %d\n", |
| 1082 | pin-16, irq); |
| 1083 | } |
| 1084 | } |
| 1085 | } |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 1086 | #endif |
| 1087 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1088 | return irq; |
| 1089 | } |
| 1090 | |
Yinghai Lu | e20c06f | 2009-05-06 10:08:22 -0700 | [diff] [blame] | 1091 | /* |
| 1092 | * Find a specific PCI IRQ entry. |
| 1093 | * Not an __init, possibly needed by modules |
| 1094 | */ |
| 1095 | int IO_APIC_get_PCI_irq_vector(int bus, int slot, int pin, |
Yinghai Lu | e519807 | 2009-05-15 13:05:16 -0700 | [diff] [blame] | 1096 | struct io_apic_irq_attr *irq_attr) |
Yinghai Lu | e20c06f | 2009-05-06 10:08:22 -0700 | [diff] [blame] | 1097 | { |
| 1098 | int apic, i, best_guess = -1; |
| 1099 | |
| 1100 | apic_printk(APIC_DEBUG, |
| 1101 | "querying PCI -> IRQ mapping bus:%d, slot:%d, pin:%d.\n", |
| 1102 | bus, slot, pin); |
| 1103 | if (test_bit(bus, mp_bus_not_pci)) { |
| 1104 | apic_printk(APIC_VERBOSE, |
| 1105 | "PCI BIOS passed nonexistent PCI bus %d!\n", bus); |
| 1106 | return -1; |
| 1107 | } |
| 1108 | for (i = 0; i < mp_irq_entries; i++) { |
| 1109 | int lbus = mp_irqs[i].srcbus; |
| 1110 | |
| 1111 | for (apic = 0; apic < nr_ioapics; apic++) |
| 1112 | if (mp_ioapics[apic].apicid == mp_irqs[i].dstapic || |
| 1113 | mp_irqs[i].dstapic == MP_APIC_ALL) |
| 1114 | break; |
| 1115 | |
| 1116 | if (!test_bit(lbus, mp_bus_not_pci) && |
| 1117 | !mp_irqs[i].irqtype && |
| 1118 | (bus == lbus) && |
| 1119 | (slot == ((mp_irqs[i].srcbusirq >> 2) & 0x1f))) { |
| 1120 | int irq = pin_2_irq(i, apic, mp_irqs[i].dstirq); |
| 1121 | |
| 1122 | if (!(apic || IO_APIC_IRQ(irq))) |
| 1123 | continue; |
| 1124 | |
| 1125 | if (pin == (mp_irqs[i].srcbusirq & 3)) { |
Yinghai Lu | e519807 | 2009-05-15 13:05:16 -0700 | [diff] [blame] | 1126 | set_io_apic_irq_attr(irq_attr, apic, |
| 1127 | mp_irqs[i].dstirq, |
| 1128 | irq_trigger(i), |
| 1129 | irq_polarity(i)); |
Yinghai Lu | e20c06f | 2009-05-06 10:08:22 -0700 | [diff] [blame] | 1130 | return irq; |
| 1131 | } |
| 1132 | /* |
| 1133 | * Use the first all-but-pin matching entry as a |
| 1134 | * best-guess fuzzy result for broken mptables. |
| 1135 | */ |
| 1136 | if (best_guess < 0) { |
Yinghai Lu | e519807 | 2009-05-15 13:05:16 -0700 | [diff] [blame] | 1137 | set_io_apic_irq_attr(irq_attr, apic, |
| 1138 | mp_irqs[i].dstirq, |
| 1139 | irq_trigger(i), |
| 1140 | irq_polarity(i)); |
Yinghai Lu | e20c06f | 2009-05-06 10:08:22 -0700 | [diff] [blame] | 1141 | best_guess = irq; |
| 1142 | } |
| 1143 | } |
| 1144 | } |
| 1145 | return best_guess; |
| 1146 | } |
| 1147 | EXPORT_SYMBOL(IO_APIC_get_PCI_irq_vector); |
| 1148 | |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 1149 | void lock_vector_lock(void) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1150 | { |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 1151 | /* Used to the online set of cpus does not change |
| 1152 | * during assign_irq_vector. |
| 1153 | */ |
| 1154 | spin_lock(&vector_lock); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1155 | } |
| 1156 | |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 1157 | void unlock_vector_lock(void) |
Eric W. Biederman | ace80ab | 2006-10-04 02:16:47 -0700 | [diff] [blame] | 1158 | { |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 1159 | spin_unlock(&vector_lock); |
| 1160 | } |
| 1161 | |
Mike Travis | e798673 | 2008-12-16 17:33:52 -0800 | [diff] [blame] | 1162 | static int |
| 1163 | __assign_irq_vector(int irq, struct irq_cfg *cfg, const struct cpumask *mask) |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 1164 | { |
Yinghai Lu | 047c8fd | 2008-08-19 20:50:41 -0700 | [diff] [blame] | 1165 | /* |
| 1166 | * NOTE! The local APIC isn't very good at handling |
| 1167 | * multiple interrupts at the same interrupt level. |
| 1168 | * As the interrupt level is determined by taking the |
| 1169 | * vector number and shifting that right by 4, we |
| 1170 | * want to spread these out a bit so that they don't |
| 1171 | * all fall in the same interrupt level. |
| 1172 | * |
| 1173 | * Also, we've got to be careful not to trash gate |
| 1174 | * 0x80, because int 0x80 is hm, kind of importantish. ;) |
| 1175 | */ |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 1176 | static int current_vector = FIRST_DEVICE_VECTOR, current_offset = 0; |
| 1177 | unsigned int old_vector; |
Mike Travis | 22f65d3 | 2008-12-16 17:33:56 -0800 | [diff] [blame] | 1178 | int cpu, err; |
| 1179 | cpumask_var_t tmp_mask; |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 1180 | |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 1181 | if ((cfg->move_in_progress) || cfg->move_cleanup_count) |
| 1182 | return -EBUSY; |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 1183 | |
Mike Travis | 22f65d3 | 2008-12-16 17:33:56 -0800 | [diff] [blame] | 1184 | if (!alloc_cpumask_var(&tmp_mask, GFP_ATOMIC)) |
| 1185 | return -ENOMEM; |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 1186 | |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 1187 | old_vector = cfg->vector; |
| 1188 | if (old_vector) { |
Mike Travis | 22f65d3 | 2008-12-16 17:33:56 -0800 | [diff] [blame] | 1189 | cpumask_and(tmp_mask, mask, cpu_online_mask); |
| 1190 | cpumask_and(tmp_mask, cfg->domain, tmp_mask); |
| 1191 | if (!cpumask_empty(tmp_mask)) { |
| 1192 | free_cpumask_var(tmp_mask); |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 1193 | return 0; |
Mike Travis | 22f65d3 | 2008-12-16 17:33:56 -0800 | [diff] [blame] | 1194 | } |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 1195 | } |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 1196 | |
Mike Travis | e798673 | 2008-12-16 17:33:52 -0800 | [diff] [blame] | 1197 | /* Only try and allocate irqs on cpus that are present */ |
Mike Travis | 22f65d3 | 2008-12-16 17:33:56 -0800 | [diff] [blame] | 1198 | err = -ENOSPC; |
| 1199 | for_each_cpu_and(cpu, mask, cpu_online_mask) { |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 1200 | int new_cpu; |
| 1201 | int vector, offset; |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 1202 | |
Ingo Molnar | e2d40b1 | 2009-01-28 06:50:47 +0100 | [diff] [blame] | 1203 | apic->vector_allocation_domain(cpu, tmp_mask); |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 1204 | |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 1205 | vector = current_vector; |
| 1206 | offset = current_offset; |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 1207 | next: |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 1208 | vector += 8; |
| 1209 | if (vector >= first_system_vector) { |
Mike Travis | e798673 | 2008-12-16 17:33:52 -0800 | [diff] [blame] | 1210 | /* If out of vectors on large boxen, must share them. */ |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 1211 | offset = (offset + 1) % 8; |
| 1212 | vector = FIRST_DEVICE_VECTOR + offset; |
Yinghai Lu | 7a959cf | 2008-08-19 20:50:32 -0700 | [diff] [blame] | 1213 | } |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 1214 | if (unlikely(current_vector == vector)) |
| 1215 | continue; |
Yinghai Lu | b77b881 | 2008-12-19 15:23:44 -0800 | [diff] [blame] | 1216 | |
| 1217 | if (test_bit(vector, used_vectors)) |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 1218 | goto next; |
Yinghai Lu | b77b881 | 2008-12-19 15:23:44 -0800 | [diff] [blame] | 1219 | |
Mike Travis | 22f65d3 | 2008-12-16 17:33:56 -0800 | [diff] [blame] | 1220 | for_each_cpu_and(new_cpu, tmp_mask, cpu_online_mask) |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 1221 | if (per_cpu(vector_irq, new_cpu)[vector] != -1) |
| 1222 | goto next; |
| 1223 | /* Found one! */ |
| 1224 | current_vector = vector; |
| 1225 | current_offset = offset; |
| 1226 | if (old_vector) { |
| 1227 | cfg->move_in_progress = 1; |
Mike Travis | 22f65d3 | 2008-12-16 17:33:56 -0800 | [diff] [blame] | 1228 | cpumask_copy(cfg->old_domain, cfg->domain); |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 1229 | } |
Mike Travis | 22f65d3 | 2008-12-16 17:33:56 -0800 | [diff] [blame] | 1230 | for_each_cpu_and(new_cpu, tmp_mask, cpu_online_mask) |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 1231 | per_cpu(vector_irq, new_cpu)[vector] = irq; |
| 1232 | cfg->vector = vector; |
Mike Travis | 22f65d3 | 2008-12-16 17:33:56 -0800 | [diff] [blame] | 1233 | cpumask_copy(cfg->domain, tmp_mask); |
| 1234 | err = 0; |
| 1235 | break; |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 1236 | } |
Mike Travis | 22f65d3 | 2008-12-16 17:33:56 -0800 | [diff] [blame] | 1237 | free_cpumask_var(tmp_mask); |
| 1238 | return err; |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 1239 | } |
| 1240 | |
Mike Travis | e798673 | 2008-12-16 17:33:52 -0800 | [diff] [blame] | 1241 | static int |
| 1242 | assign_irq_vector(int irq, struct irq_cfg *cfg, const struct cpumask *mask) |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 1243 | { |
| 1244 | int err; |
Eric W. Biederman | ace80ab | 2006-10-04 02:16:47 -0700 | [diff] [blame] | 1245 | unsigned long flags; |
Eric W. Biederman | ace80ab | 2006-10-04 02:16:47 -0700 | [diff] [blame] | 1246 | |
| 1247 | spin_lock_irqsave(&vector_lock, flags); |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 1248 | err = __assign_irq_vector(irq, cfg, mask); |
Eric W. Biederman | ace80ab | 2006-10-04 02:16:47 -0700 | [diff] [blame] | 1249 | spin_unlock_irqrestore(&vector_lock, flags); |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 1250 | return err; |
| 1251 | } |
| 1252 | |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 1253 | static void __clear_irq_vector(int irq, struct irq_cfg *cfg) |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 1254 | { |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 1255 | int cpu, vector; |
| 1256 | |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 1257 | BUG_ON(!cfg->vector); |
| 1258 | |
| 1259 | vector = cfg->vector; |
Mike Travis | 22f65d3 | 2008-12-16 17:33:56 -0800 | [diff] [blame] | 1260 | for_each_cpu_and(cpu, cfg->domain, cpu_online_mask) |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 1261 | per_cpu(vector_irq, cpu)[vector] = -1; |
| 1262 | |
| 1263 | cfg->vector = 0; |
Mike Travis | 22f65d3 | 2008-12-16 17:33:56 -0800 | [diff] [blame] | 1264 | cpumask_clear(cfg->domain); |
Matthew Wilcox | 0ca4b6b | 2008-11-20 14:09:33 -0700 | [diff] [blame] | 1265 | |
| 1266 | if (likely(!cfg->move_in_progress)) |
| 1267 | return; |
Mike Travis | 22f65d3 | 2008-12-16 17:33:56 -0800 | [diff] [blame] | 1268 | for_each_cpu_and(cpu, cfg->old_domain, cpu_online_mask) { |
Matthew Wilcox | 0ca4b6b | 2008-11-20 14:09:33 -0700 | [diff] [blame] | 1269 | for (vector = FIRST_EXTERNAL_VECTOR; vector < NR_VECTORS; |
| 1270 | vector++) { |
| 1271 | if (per_cpu(vector_irq, cpu)[vector] != irq) |
| 1272 | continue; |
| 1273 | per_cpu(vector_irq, cpu)[vector] = -1; |
| 1274 | break; |
| 1275 | } |
| 1276 | } |
| 1277 | cfg->move_in_progress = 0; |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 1278 | } |
| 1279 | |
| 1280 | void __setup_vector_irq(int cpu) |
| 1281 | { |
| 1282 | /* Initialize vector_irq on a new cpu */ |
| 1283 | /* This function must be called with vector_lock held */ |
| 1284 | int irq, vector; |
| 1285 | struct irq_cfg *cfg; |
Yinghai Lu | 0b8f1ef | 2008-12-05 18:58:31 -0800 | [diff] [blame] | 1286 | struct irq_desc *desc; |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 1287 | |
| 1288 | /* Mark the inuse vectors */ |
Yinghai Lu | 0b8f1ef | 2008-12-05 18:58:31 -0800 | [diff] [blame] | 1289 | for_each_irq_desc(irq, desc) { |
Yinghai Lu | 0b8f1ef | 2008-12-05 18:58:31 -0800 | [diff] [blame] | 1290 | cfg = desc->chip_data; |
Mike Travis | 22f65d3 | 2008-12-16 17:33:56 -0800 | [diff] [blame] | 1291 | if (!cpumask_test_cpu(cpu, cfg->domain)) |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 1292 | continue; |
| 1293 | vector = cfg->vector; |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 1294 | per_cpu(vector_irq, cpu)[vector] = irq; |
| 1295 | } |
| 1296 | /* Mark the free vectors */ |
| 1297 | for (vector = 0; vector < NR_VECTORS; ++vector) { |
| 1298 | irq = per_cpu(vector_irq, cpu)[vector]; |
| 1299 | if (irq < 0) |
| 1300 | continue; |
| 1301 | |
| 1302 | cfg = irq_cfg(irq); |
Mike Travis | 22f65d3 | 2008-12-16 17:33:56 -0800 | [diff] [blame] | 1303 | if (!cpumask_test_cpu(cpu, cfg->domain)) |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 1304 | per_cpu(vector_irq, cpu)[vector] = -1; |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 1305 | } |
Eric W. Biederman | ace80ab | 2006-10-04 02:16:47 -0700 | [diff] [blame] | 1306 | } |
Glauber Costa | 3fde690 | 2008-05-28 20:34:19 -0700 | [diff] [blame] | 1307 | |
Ingo Molnar | f5b9ed7 | 2006-10-04 02:16:26 -0700 | [diff] [blame] | 1308 | static struct irq_chip ioapic_chip; |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 1309 | static struct irq_chip ir_ioapic_chip; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1310 | |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 1311 | #define IOAPIC_AUTO -1 |
| 1312 | #define IOAPIC_EDGE 0 |
| 1313 | #define IOAPIC_LEVEL 1 |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1314 | |
Yinghai Lu | 047c8fd | 2008-08-19 20:50:41 -0700 | [diff] [blame] | 1315 | #ifdef CONFIG_X86_32 |
Yinghai Lu | 1d02519 | 2008-08-19 20:50:34 -0700 | [diff] [blame] | 1316 | static inline int IO_APIC_irq_trigger(int irq) |
| 1317 | { |
Thomas Gleixner | d6c88a5 | 2008-10-15 15:27:23 +0200 | [diff] [blame] | 1318 | int apic, idx, pin; |
Yinghai Lu | 1d02519 | 2008-08-19 20:50:34 -0700 | [diff] [blame] | 1319 | |
Thomas Gleixner | d6c88a5 | 2008-10-15 15:27:23 +0200 | [diff] [blame] | 1320 | for (apic = 0; apic < nr_ioapics; apic++) { |
| 1321 | for (pin = 0; pin < nr_ioapic_registers[apic]; pin++) { |
| 1322 | idx = find_irq_entry(apic, pin, mp_INT); |
| 1323 | if ((idx != -1) && (irq == pin_2_irq(idx, apic, pin))) |
| 1324 | return irq_trigger(idx); |
| 1325 | } |
| 1326 | } |
| 1327 | /* |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 1328 | * nonexistent IRQs are edge default |
| 1329 | */ |
Thomas Gleixner | d6c88a5 | 2008-10-15 15:27:23 +0200 | [diff] [blame] | 1330 | return 0; |
Yinghai Lu | 1d02519 | 2008-08-19 20:50:34 -0700 | [diff] [blame] | 1331 | } |
Yinghai Lu | 047c8fd | 2008-08-19 20:50:41 -0700 | [diff] [blame] | 1332 | #else |
| 1333 | static inline int IO_APIC_irq_trigger(int irq) |
| 1334 | { |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 1335 | return 1; |
Yinghai Lu | 047c8fd | 2008-08-19 20:50:41 -0700 | [diff] [blame] | 1336 | } |
| 1337 | #endif |
Yinghai Lu | 1d02519 | 2008-08-19 20:50:34 -0700 | [diff] [blame] | 1338 | |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 1339 | static void ioapic_register_intr(int irq, struct irq_desc *desc, unsigned long trigger) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1340 | { |
Yinghai Lu | 199751d | 2008-08-19 20:50:27 -0700 | [diff] [blame] | 1341 | |
Jan Beulich | 6ebcc00 | 2006-06-26 13:56:46 +0200 | [diff] [blame] | 1342 | if ((trigger == IOAPIC_AUTO && IO_APIC_irq_trigger(irq)) || |
Yinghai Lu | 047c8fd | 2008-08-19 20:50:41 -0700 | [diff] [blame] | 1343 | trigger == IOAPIC_LEVEL) |
Yinghai Lu | 08678b0 | 2008-08-19 20:50:05 -0700 | [diff] [blame] | 1344 | desc->status |= IRQ_LEVEL; |
Yinghai Lu | 047c8fd | 2008-08-19 20:50:41 -0700 | [diff] [blame] | 1345 | else |
| 1346 | desc->status &= ~IRQ_LEVEL; |
| 1347 | |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 1348 | if (irq_remapped(irq)) { |
| 1349 | desc->status |= IRQ_MOVE_PCNTXT; |
| 1350 | if (trigger) |
| 1351 | set_irq_chip_and_handler_name(irq, &ir_ioapic_chip, |
| 1352 | handle_fasteoi_irq, |
| 1353 | "fasteoi"); |
| 1354 | else |
| 1355 | set_irq_chip_and_handler_name(irq, &ir_ioapic_chip, |
| 1356 | handle_edge_irq, "edge"); |
| 1357 | return; |
| 1358 | } |
Suresh Siddha | 29b61be | 2009-03-16 17:05:02 -0700 | [diff] [blame] | 1359 | |
Yinghai Lu | 047c8fd | 2008-08-19 20:50:41 -0700 | [diff] [blame] | 1360 | if ((trigger == IOAPIC_AUTO && IO_APIC_irq_trigger(irq)) || |
| 1361 | trigger == IOAPIC_LEVEL) |
Ingo Molnar | a460e74 | 2006-10-17 00:10:03 -0700 | [diff] [blame] | 1362 | set_irq_chip_and_handler_name(irq, &ioapic_chip, |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 1363 | handle_fasteoi_irq, |
| 1364 | "fasteoi"); |
Yinghai Lu | 047c8fd | 2008-08-19 20:50:41 -0700 | [diff] [blame] | 1365 | else |
Ingo Molnar | a460e74 | 2006-10-17 00:10:03 -0700 | [diff] [blame] | 1366 | set_irq_chip_and_handler_name(irq, &ioapic_chip, |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 1367 | handle_edge_irq, "edge"); |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 1368 | } |
| 1369 | |
Jeremy Fitzhardinge | ca97ab9 | 2009-02-09 12:05:47 -0800 | [diff] [blame] | 1370 | int setup_ioapic_entry(int apic_id, int irq, |
| 1371 | struct IO_APIC_route_entry *entry, |
| 1372 | unsigned int destination, int trigger, |
Suresh Siddha | 0280f7c | 2009-03-16 17:05:01 -0700 | [diff] [blame] | 1373 | int polarity, int vector, int pin) |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 1374 | { |
| 1375 | /* |
| 1376 | * add it to the IO-APIC irq-routing table: |
| 1377 | */ |
| 1378 | memset(entry,0,sizeof(*entry)); |
| 1379 | |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 1380 | if (intr_remapping_enabled) { |
Ingo Molnar | c8d46cf | 2009-01-28 00:14:11 +0100 | [diff] [blame] | 1381 | struct intel_iommu *iommu = map_ioapic_to_ir(apic_id); |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 1382 | struct irte irte; |
| 1383 | struct IR_IO_APIC_route_entry *ir_entry = |
| 1384 | (struct IR_IO_APIC_route_entry *) entry; |
| 1385 | int index; |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 1386 | |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 1387 | if (!iommu) |
Ingo Molnar | c8d46cf | 2009-01-28 00:14:11 +0100 | [diff] [blame] | 1388 | panic("No mapping iommu for ioapic %d\n", apic_id); |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 1389 | |
| 1390 | index = alloc_irte(iommu, irq, 1); |
| 1391 | if (index < 0) |
Ingo Molnar | c8d46cf | 2009-01-28 00:14:11 +0100 | [diff] [blame] | 1392 | panic("Failed to allocate IRTE for ioapic %d\n", apic_id); |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 1393 | |
| 1394 | memset(&irte, 0, sizeof(irte)); |
| 1395 | |
| 1396 | irte.present = 1; |
Ingo Molnar | 9b5bc8d | 2009-01-28 04:09:58 +0100 | [diff] [blame] | 1397 | irte.dst_mode = apic->irq_dest_mode; |
Suresh Siddha | 0280f7c | 2009-03-16 17:05:01 -0700 | [diff] [blame] | 1398 | /* |
| 1399 | * Trigger mode in the IRTE will always be edge, and the |
| 1400 | * actual level or edge trigger will be setup in the IO-APIC |
| 1401 | * RTE. This will help simplify level triggered irq migration. |
| 1402 | * For more details, see the comments above explainig IO-APIC |
| 1403 | * irq migration in the presence of interrupt-remapping. |
| 1404 | */ |
| 1405 | irte.trigger_mode = 0; |
Ingo Molnar | 9b5bc8d | 2009-01-28 04:09:58 +0100 | [diff] [blame] | 1406 | irte.dlvry_mode = apic->irq_delivery_mode; |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 1407 | irte.vector = vector; |
| 1408 | irte.dest_id = IRTE_DEST(destination); |
| 1409 | |
Weidong Han | f007e99 | 2009-05-23 00:41:15 +0800 | [diff] [blame] | 1410 | /* Set source-id of interrupt request */ |
| 1411 | set_ioapic_sid(&irte, apic_id); |
| 1412 | |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 1413 | modify_irte(irq, &irte); |
| 1414 | |
| 1415 | ir_entry->index2 = (index >> 15) & 0x1; |
| 1416 | ir_entry->zero = 0; |
| 1417 | ir_entry->format = 1; |
| 1418 | ir_entry->index = (index & 0x7fff); |
Suresh Siddha | 0280f7c | 2009-03-16 17:05:01 -0700 | [diff] [blame] | 1419 | /* |
| 1420 | * IO-APIC RTE will be configured with virtual vector. |
| 1421 | * irq handler will do the explicit EOI to the io-apic. |
| 1422 | */ |
| 1423 | ir_entry->vector = pin; |
Suresh Siddha | 29b61be | 2009-03-16 17:05:02 -0700 | [diff] [blame] | 1424 | } else { |
Ingo Molnar | 9b5bc8d | 2009-01-28 04:09:58 +0100 | [diff] [blame] | 1425 | entry->delivery_mode = apic->irq_delivery_mode; |
| 1426 | entry->dest_mode = apic->irq_dest_mode; |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 1427 | entry->dest = destination; |
Suresh Siddha | 0280f7c | 2009-03-16 17:05:01 -0700 | [diff] [blame] | 1428 | entry->vector = vector; |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 1429 | } |
| 1430 | |
| 1431 | entry->mask = 0; /* enable IRQ */ |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 1432 | entry->trigger = trigger; |
| 1433 | entry->polarity = polarity; |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 1434 | |
| 1435 | /* Mask level triggered irqs. |
| 1436 | * Use IRQ_DELAYED_DISABLE for edge triggered irqs. |
| 1437 | */ |
| 1438 | if (trigger) |
| 1439 | entry->mask = 1; |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 1440 | return 0; |
| 1441 | } |
| 1442 | |
Ingo Molnar | c8d46cf | 2009-01-28 00:14:11 +0100 | [diff] [blame] | 1443 | static void setup_IO_APIC_irq(int apic_id, int pin, unsigned int irq, struct irq_desc *desc, |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 1444 | int trigger, int polarity) |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 1445 | { |
| 1446 | struct irq_cfg *cfg; |
| 1447 | struct IO_APIC_route_entry entry; |
Mike Travis | 22f65d3 | 2008-12-16 17:33:56 -0800 | [diff] [blame] | 1448 | unsigned int dest; |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 1449 | |
| 1450 | if (!IO_APIC_IRQ(irq)) |
| 1451 | return; |
| 1452 | |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 1453 | cfg = desc->chip_data; |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 1454 | |
Ingo Molnar | fe402e1 | 2009-01-28 04:32:51 +0100 | [diff] [blame] | 1455 | if (assign_irq_vector(irq, cfg, apic->target_cpus())) |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 1456 | return; |
| 1457 | |
Ingo Molnar | debccb3 | 2009-01-28 15:20:18 +0100 | [diff] [blame] | 1458 | dest = apic->cpu_mask_to_apicid_and(cfg->domain, apic->target_cpus()); |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 1459 | |
| 1460 | apic_printk(APIC_VERBOSE,KERN_DEBUG |
| 1461 | "IOAPIC[%d]: Set routing entry (%d-%d -> 0x%x -> " |
| 1462 | "IRQ %d Mode:%i Active:%i)\n", |
Ingo Molnar | c8d46cf | 2009-01-28 00:14:11 +0100 | [diff] [blame] | 1463 | apic_id, mp_ioapics[apic_id].apicid, pin, cfg->vector, |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 1464 | irq, trigger, polarity); |
| 1465 | |
| 1466 | |
Ingo Molnar | c8d46cf | 2009-01-28 00:14:11 +0100 | [diff] [blame] | 1467 | if (setup_ioapic_entry(mp_ioapics[apic_id].apicid, irq, &entry, |
Suresh Siddha | 0280f7c | 2009-03-16 17:05:01 -0700 | [diff] [blame] | 1468 | dest, trigger, polarity, cfg->vector, pin)) { |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 1469 | printk("Failed to setup ioapic entry for ioapic %d, pin %d\n", |
Ingo Molnar | c8d46cf | 2009-01-28 00:14:11 +0100 | [diff] [blame] | 1470 | mp_ioapics[apic_id].apicid, pin); |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 1471 | __clear_irq_vector(irq, cfg); |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 1472 | return; |
| 1473 | } |
| 1474 | |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 1475 | ioapic_register_intr(irq, desc, trigger); |
Yinghai Lu | 99d093d | 2008-12-05 18:58:32 -0800 | [diff] [blame] | 1476 | if (irq < NR_IRQS_LEGACY) |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 1477 | disable_8259A_irq(irq); |
| 1478 | |
Ingo Molnar | c8d46cf | 2009-01-28 00:14:11 +0100 | [diff] [blame] | 1479 | ioapic_write_entry(apic_id, pin, entry); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1480 | } |
| 1481 | |
Yinghai Lu | b9c61b70 | 2009-05-06 10:10:06 -0700 | [diff] [blame] | 1482 | static struct { |
| 1483 | DECLARE_BITMAP(pin_programmed, MP_MAX_IOAPIC_PIN + 1); |
| 1484 | } mp_ioapic_routing[MAX_IO_APICS]; |
| 1485 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1486 | static void __init setup_IO_APIC_irqs(void) |
| 1487 | { |
Yinghai Lu | b9c61b70 | 2009-05-06 10:10:06 -0700 | [diff] [blame] | 1488 | int apic_id = 0, pin, idx, irq; |
Cyrill Gorcunov | 3c2cbd2 | 2008-09-06 14:15:33 +0400 | [diff] [blame] | 1489 | int notcon = 0; |
Yinghai Lu | 0b8f1ef | 2008-12-05 18:58:31 -0800 | [diff] [blame] | 1490 | struct irq_desc *desc; |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 1491 | struct irq_cfg *cfg; |
Yinghai Lu | 85ac16d | 2009-04-27 18:00:38 -0700 | [diff] [blame] | 1492 | int node = cpu_to_node(boot_cpu_id); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1493 | |
| 1494 | apic_printk(APIC_VERBOSE, KERN_DEBUG "init IO_APIC IRQs\n"); |
| 1495 | |
Yinghai Lu | b9c61b70 | 2009-05-06 10:10:06 -0700 | [diff] [blame] | 1496 | #ifdef CONFIG_ACPI |
| 1497 | if (!acpi_disabled && acpi_ioapic) { |
| 1498 | apic_id = mp_find_ioapic(0); |
| 1499 | if (apic_id < 0) |
| 1500 | apic_id = 0; |
| 1501 | } |
| 1502 | #endif |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1503 | |
Yinghai Lu | b9c61b70 | 2009-05-06 10:10:06 -0700 | [diff] [blame] | 1504 | for (pin = 0; pin < nr_ioapic_registers[apic_id]; pin++) { |
| 1505 | idx = find_irq_entry(apic_id, pin, mp_INT); |
| 1506 | if (idx == -1) { |
| 1507 | if (!notcon) { |
| 1508 | notcon = 1; |
Cyrill Gorcunov | 56ffa1a | 2008-09-13 13:11:16 +0400 | [diff] [blame] | 1509 | apic_printk(APIC_VERBOSE, |
Yinghai Lu | b9c61b70 | 2009-05-06 10:10:06 -0700 | [diff] [blame] | 1510 | KERN_DEBUG " %d-%d", |
| 1511 | mp_ioapics[apic_id].apicid, pin); |
| 1512 | } else |
| 1513 | apic_printk(APIC_VERBOSE, " %d-%d", |
| 1514 | mp_ioapics[apic_id].apicid, pin); |
| 1515 | continue; |
Cyrill Gorcunov | 3c2cbd2 | 2008-09-06 14:15:33 +0400 | [diff] [blame] | 1516 | } |
Yinghai Lu | b9c61b70 | 2009-05-06 10:10:06 -0700 | [diff] [blame] | 1517 | if (notcon) { |
| 1518 | apic_printk(APIC_VERBOSE, |
| 1519 | " (apicid-pin) not connected\n"); |
| 1520 | notcon = 0; |
| 1521 | } |
| 1522 | |
| 1523 | irq = pin_2_irq(idx, apic_id, pin); |
| 1524 | |
| 1525 | /* |
| 1526 | * Skip the timer IRQ if there's a quirk handler |
| 1527 | * installed and if it returns 1: |
| 1528 | */ |
| 1529 | if (apic->multi_timer_check && |
| 1530 | apic->multi_timer_check(apic_id, irq)) |
| 1531 | continue; |
| 1532 | |
| 1533 | desc = irq_to_desc_alloc_node(irq, node); |
| 1534 | if (!desc) { |
| 1535 | printk(KERN_INFO "can not get irq_desc for %d\n", irq); |
| 1536 | continue; |
| 1537 | } |
| 1538 | cfg = desc->chip_data; |
| 1539 | add_pin_to_irq_node(cfg, node, apic_id, pin); |
Yinghai Lu | 4c6f18f | 2009-05-18 10:23:28 -0700 | [diff] [blame] | 1540 | /* |
| 1541 | * don't mark it in pin_programmed, so later acpi could |
| 1542 | * set it correctly when irq < 16 |
| 1543 | */ |
Yinghai Lu | b9c61b70 | 2009-05-06 10:10:06 -0700 | [diff] [blame] | 1544 | setup_IO_APIC_irq(apic_id, pin, irq, desc, |
| 1545 | irq_trigger(idx), irq_polarity(idx)); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1546 | } |
| 1547 | |
Cyrill Gorcunov | 3c2cbd2 | 2008-09-06 14:15:33 +0400 | [diff] [blame] | 1548 | if (notcon) |
| 1549 | apic_printk(APIC_VERBOSE, |
Cyrill Gorcunov | 2a554fb | 2008-09-08 19:38:06 +0400 | [diff] [blame] | 1550 | " (apicid-pin) not connected\n"); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1551 | } |
| 1552 | |
| 1553 | /* |
Maciej W. Rozycki | f7633ce | 2008-05-27 21:19:34 +0100 | [diff] [blame] | 1554 | * Set up the timer pin, possibly with the 8259A-master behind. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1555 | */ |
Ingo Molnar | c8d46cf | 2009-01-28 00:14:11 +0100 | [diff] [blame] | 1556 | static void __init setup_timer_IRQ0_pin(unsigned int apic_id, unsigned int pin, |
Maciej W. Rozycki | f7633ce | 2008-05-27 21:19:34 +0100 | [diff] [blame] | 1557 | int vector) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1558 | { |
| 1559 | struct IO_APIC_route_entry entry; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1560 | |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 1561 | if (intr_remapping_enabled) |
| 1562 | return; |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 1563 | |
Paolo Ciarrocchi | 3606244 | 2008-06-08 13:07:18 +0200 | [diff] [blame] | 1564 | memset(&entry, 0, sizeof(entry)); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1565 | |
| 1566 | /* |
| 1567 | * We use logical delivery to get the timer IRQ |
| 1568 | * to the first CPU. |
| 1569 | */ |
Ingo Molnar | 9b5bc8d | 2009-01-28 04:09:58 +0100 | [diff] [blame] | 1570 | entry.dest_mode = apic->irq_dest_mode; |
Yinghai Lu | f72dcca | 2009-02-08 16:18:03 -0800 | [diff] [blame] | 1571 | entry.mask = 0; /* don't mask IRQ for edge */ |
Ingo Molnar | debccb3 | 2009-01-28 15:20:18 +0100 | [diff] [blame] | 1572 | entry.dest = apic->cpu_mask_to_apicid(apic->target_cpus()); |
Ingo Molnar | 9b5bc8d | 2009-01-28 04:09:58 +0100 | [diff] [blame] | 1573 | entry.delivery_mode = apic->irq_delivery_mode; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1574 | entry.polarity = 0; |
| 1575 | entry.trigger = 0; |
| 1576 | entry.vector = vector; |
| 1577 | |
| 1578 | /* |
| 1579 | * The timer IRQ doesn't have to know that behind the |
Maciej W. Rozycki | f7633ce | 2008-05-27 21:19:34 +0100 | [diff] [blame] | 1580 | * scene we may have a 8259A-master in AEOI mode ... |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1581 | */ |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 1582 | set_irq_chip_and_handler_name(0, &ioapic_chip, handle_edge_irq, "edge"); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1583 | |
| 1584 | /* |
| 1585 | * Add it to the IO-APIC irq-routing table: |
| 1586 | */ |
Ingo Molnar | c8d46cf | 2009-01-28 00:14:11 +0100 | [diff] [blame] | 1587 | ioapic_write_entry(apic_id, pin, entry); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1588 | } |
| 1589 | |
Maciej W. Rozycki | 32f71af | 2008-07-21 00:52:49 +0100 | [diff] [blame] | 1590 | |
| 1591 | __apicdebuginit(void) print_IO_APIC(void) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1592 | { |
| 1593 | int apic, i; |
| 1594 | union IO_APIC_reg_00 reg_00; |
| 1595 | union IO_APIC_reg_01 reg_01; |
| 1596 | union IO_APIC_reg_02 reg_02; |
| 1597 | union IO_APIC_reg_03 reg_03; |
| 1598 | unsigned long flags; |
Yinghai Lu | 0f978f4 | 2008-08-19 20:50:26 -0700 | [diff] [blame] | 1599 | struct irq_cfg *cfg; |
Yinghai Lu | 0b8f1ef | 2008-12-05 18:58:31 -0800 | [diff] [blame] | 1600 | struct irq_desc *desc; |
Yinghai Lu | 8f09cd2 | 2008-08-19 20:50:51 -0700 | [diff] [blame] | 1601 | unsigned int irq; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1602 | |
| 1603 | if (apic_verbosity == APIC_QUIET) |
| 1604 | return; |
| 1605 | |
Paolo Ciarrocchi | 3606244 | 2008-06-08 13:07:18 +0200 | [diff] [blame] | 1606 | printk(KERN_DEBUG "number of MP IRQ sources: %d.\n", mp_irq_entries); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1607 | for (i = 0; i < nr_ioapics; i++) |
| 1608 | printk(KERN_DEBUG "number of IO-APIC #%d registers: %d.\n", |
Jaswinder Singh Rajput | b5ba7e6 | 2009-01-12 17:46:17 +0530 | [diff] [blame] | 1609 | mp_ioapics[i].apicid, nr_ioapic_registers[i]); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1610 | |
| 1611 | /* |
| 1612 | * We are a bit conservative about what we expect. We have to |
| 1613 | * know about every hardware change ASAP. |
| 1614 | */ |
| 1615 | printk(KERN_INFO "testing the IO APIC.......................\n"); |
| 1616 | |
| 1617 | for (apic = 0; apic < nr_ioapics; apic++) { |
| 1618 | |
| 1619 | spin_lock_irqsave(&ioapic_lock, flags); |
| 1620 | reg_00.raw = io_apic_read(apic, 0); |
| 1621 | reg_01.raw = io_apic_read(apic, 1); |
| 1622 | if (reg_01.bits.version >= 0x10) |
| 1623 | reg_02.raw = io_apic_read(apic, 2); |
Thomas Gleixner | d6c88a5 | 2008-10-15 15:27:23 +0200 | [diff] [blame] | 1624 | if (reg_01.bits.version >= 0x20) |
| 1625 | reg_03.raw = io_apic_read(apic, 3); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1626 | spin_unlock_irqrestore(&ioapic_lock, flags); |
| 1627 | |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 1628 | printk("\n"); |
Jaswinder Singh Rajput | b5ba7e6 | 2009-01-12 17:46:17 +0530 | [diff] [blame] | 1629 | printk(KERN_DEBUG "IO APIC #%d......\n", mp_ioapics[apic].apicid); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1630 | printk(KERN_DEBUG ".... register #00: %08X\n", reg_00.raw); |
| 1631 | printk(KERN_DEBUG "....... : physical APIC id: %02X\n", reg_00.bits.ID); |
| 1632 | printk(KERN_DEBUG "....... : Delivery Type: %X\n", reg_00.bits.delivery_type); |
| 1633 | printk(KERN_DEBUG "....... : LTS : %X\n", reg_00.bits.LTS); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1634 | |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 1635 | printk(KERN_DEBUG ".... register #01: %08X\n", *(int *)®_01); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1636 | printk(KERN_DEBUG "....... : max redirection entries: %04X\n", reg_01.bits.entries); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1637 | |
| 1638 | printk(KERN_DEBUG "....... : PRQ implemented: %X\n", reg_01.bits.PRQ); |
| 1639 | printk(KERN_DEBUG "....... : IO APIC version: %04X\n", reg_01.bits.version); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1640 | |
| 1641 | /* |
| 1642 | * Some Intel chipsets with IO APIC VERSION of 0x1? don't have reg_02, |
| 1643 | * but the value of reg_02 is read as the previous read register |
| 1644 | * value, so ignore it if reg_02 == reg_01. |
| 1645 | */ |
| 1646 | if (reg_01.bits.version >= 0x10 && reg_02.raw != reg_01.raw) { |
| 1647 | printk(KERN_DEBUG ".... register #02: %08X\n", reg_02.raw); |
| 1648 | printk(KERN_DEBUG "....... : arbitration: %02X\n", reg_02.bits.arbitration); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1649 | } |
| 1650 | |
| 1651 | /* |
| 1652 | * Some Intel chipsets with IO APIC VERSION of 0x2? don't have reg_02 |
| 1653 | * or reg_03, but the value of reg_0[23] is read as the previous read |
| 1654 | * register value, so ignore it if reg_03 == reg_0[12]. |
| 1655 | */ |
| 1656 | if (reg_01.bits.version >= 0x20 && reg_03.raw != reg_02.raw && |
| 1657 | reg_03.raw != reg_01.raw) { |
| 1658 | printk(KERN_DEBUG ".... register #03: %08X\n", reg_03.raw); |
| 1659 | printk(KERN_DEBUG "....... : Boot DT : %X\n", reg_03.bits.boot_DT); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1660 | } |
| 1661 | |
| 1662 | printk(KERN_DEBUG ".... IRQ redirection table:\n"); |
| 1663 | |
Yinghai Lu | d83e94a | 2008-08-19 20:50:33 -0700 | [diff] [blame] | 1664 | printk(KERN_DEBUG " NR Dst Mask Trig IRR Pol" |
| 1665 | " Stat Dmod Deli Vect: \n"); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1666 | |
| 1667 | for (i = 0; i <= reg_01.bits.entries; i++) { |
| 1668 | struct IO_APIC_route_entry entry; |
| 1669 | |
Andi Kleen | cf4c6a2 | 2006-09-26 10:52:30 +0200 | [diff] [blame] | 1670 | entry = ioapic_read_entry(apic, i); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1671 | |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 1672 | printk(KERN_DEBUG " %02x %03X ", |
| 1673 | i, |
| 1674 | entry.dest |
| 1675 | ); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1676 | |
| 1677 | printk("%1d %1d %1d %1d %1d %1d %1d %02X\n", |
| 1678 | entry.mask, |
| 1679 | entry.trigger, |
| 1680 | entry.irr, |
| 1681 | entry.polarity, |
| 1682 | entry.delivery_status, |
| 1683 | entry.dest_mode, |
| 1684 | entry.delivery_mode, |
| 1685 | entry.vector |
| 1686 | ); |
| 1687 | } |
| 1688 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1689 | printk(KERN_DEBUG "IRQ to pin mappings:\n"); |
Yinghai Lu | 0b8f1ef | 2008-12-05 18:58:31 -0800 | [diff] [blame] | 1690 | for_each_irq_desc(irq, desc) { |
| 1691 | struct irq_pin_list *entry; |
| 1692 | |
Yinghai Lu | 0b8f1ef | 2008-12-05 18:58:31 -0800 | [diff] [blame] | 1693 | cfg = desc->chip_data; |
| 1694 | entry = cfg->irq_2_pin; |
Yinghai Lu | 0f978f4 | 2008-08-19 20:50:26 -0700 | [diff] [blame] | 1695 | if (!entry) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1696 | continue; |
Yinghai Lu | 8f09cd2 | 2008-08-19 20:50:51 -0700 | [diff] [blame] | 1697 | printk(KERN_DEBUG "IRQ%d ", irq); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1698 | for (;;) { |
| 1699 | printk("-> %d:%d", entry->apic, entry->pin); |
| 1700 | if (!entry->next) |
| 1701 | break; |
Yinghai Lu | 0f978f4 | 2008-08-19 20:50:26 -0700 | [diff] [blame] | 1702 | entry = entry->next; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1703 | } |
| 1704 | printk("\n"); |
| 1705 | } |
| 1706 | |
| 1707 | printk(KERN_INFO ".................................... done.\n"); |
| 1708 | |
| 1709 | return; |
| 1710 | } |
| 1711 | |
Ingo Molnar | 251e1e4 | 2009-07-02 08:54:01 +0200 | [diff] [blame] | 1712 | __apicdebuginit(void) print_APIC_field(int base) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1713 | { |
Ingo Molnar | 251e1e4 | 2009-07-02 08:54:01 +0200 | [diff] [blame] | 1714 | int i; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1715 | |
| 1716 | if (apic_verbosity == APIC_QUIET) |
| 1717 | return; |
| 1718 | |
Ingo Molnar | 251e1e4 | 2009-07-02 08:54:01 +0200 | [diff] [blame] | 1719 | printk(KERN_DEBUG); |
| 1720 | |
| 1721 | for (i = 0; i < 8; i++) |
| 1722 | printk(KERN_CONT "%08x", apic_read(base + i*0x10)); |
| 1723 | |
| 1724 | printk(KERN_CONT "\n"); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1725 | } |
| 1726 | |
Maciej W. Rozycki | 32f71af | 2008-07-21 00:52:49 +0100 | [diff] [blame] | 1727 | __apicdebuginit(void) print_local_APIC(void *dummy) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1728 | { |
Andreas Herrmann | 97a5271 | 2009-05-08 18:23:50 +0200 | [diff] [blame] | 1729 | unsigned int i, v, ver, maxlvt; |
Hiroshi Shimamoto | 7ab6af7 | 2008-07-30 17:36:48 -0700 | [diff] [blame] | 1730 | u64 icr; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1731 | |
| 1732 | if (apic_verbosity == APIC_QUIET) |
| 1733 | return; |
| 1734 | |
Ingo Molnar | 251e1e4 | 2009-07-02 08:54:01 +0200 | [diff] [blame] | 1735 | printk(KERN_DEBUG "printing local APIC contents on CPU#%d/%d:\n", |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1736 | smp_processor_id(), hard_smp_processor_id()); |
Andreas Herrmann | 6682311 | 2008-06-05 16:35:10 +0200 | [diff] [blame] | 1737 | v = apic_read(APIC_ID); |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 1738 | printk(KERN_INFO "... APIC ID: %08x (%01x)\n", v, read_apic_id()); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1739 | v = apic_read(APIC_LVR); |
| 1740 | printk(KERN_INFO "... APIC VERSION: %08x\n", v); |
| 1741 | ver = GET_APIC_VERSION(v); |
Thomas Gleixner | e05d723 | 2007-02-16 01:27:58 -0800 | [diff] [blame] | 1742 | maxlvt = lapic_get_maxlvt(); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1743 | |
| 1744 | v = apic_read(APIC_TASKPRI); |
| 1745 | printk(KERN_DEBUG "... APIC TASKPRI: %08x (%02x)\n", v, v & APIC_TPRI_MASK); |
| 1746 | |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 1747 | if (APIC_INTEGRATED(ver)) { /* !82489DX */ |
Yinghai Lu | a11b5ab | 2008-09-03 16:58:31 -0700 | [diff] [blame] | 1748 | if (!APIC_XAPIC(ver)) { |
| 1749 | v = apic_read(APIC_ARBPRI); |
| 1750 | printk(KERN_DEBUG "... APIC ARBPRI: %08x (%02x)\n", v, |
| 1751 | v & APIC_ARBPRI_MASK); |
| 1752 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1753 | v = apic_read(APIC_PROCPRI); |
| 1754 | printk(KERN_DEBUG "... APIC PROCPRI: %08x\n", v); |
| 1755 | } |
| 1756 | |
Yinghai Lu | a11b5ab | 2008-09-03 16:58:31 -0700 | [diff] [blame] | 1757 | /* |
| 1758 | * Remote read supported only in the 82489DX and local APIC for |
| 1759 | * Pentium processors. |
| 1760 | */ |
| 1761 | if (!APIC_INTEGRATED(ver) || maxlvt == 3) { |
| 1762 | v = apic_read(APIC_RRR); |
| 1763 | printk(KERN_DEBUG "... APIC RRR: %08x\n", v); |
| 1764 | } |
| 1765 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1766 | v = apic_read(APIC_LDR); |
| 1767 | printk(KERN_DEBUG "... APIC LDR: %08x\n", v); |
Yinghai Lu | a11b5ab | 2008-09-03 16:58:31 -0700 | [diff] [blame] | 1768 | if (!x2apic_enabled()) { |
| 1769 | v = apic_read(APIC_DFR); |
| 1770 | printk(KERN_DEBUG "... APIC DFR: %08x\n", v); |
| 1771 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1772 | v = apic_read(APIC_SPIV); |
| 1773 | printk(KERN_DEBUG "... APIC SPIV: %08x\n", v); |
| 1774 | |
| 1775 | printk(KERN_DEBUG "... APIC ISR field:\n"); |
Ingo Molnar | 251e1e4 | 2009-07-02 08:54:01 +0200 | [diff] [blame] | 1776 | print_APIC_field(APIC_ISR); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1777 | printk(KERN_DEBUG "... APIC TMR field:\n"); |
Ingo Molnar | 251e1e4 | 2009-07-02 08:54:01 +0200 | [diff] [blame] | 1778 | print_APIC_field(APIC_TMR); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1779 | printk(KERN_DEBUG "... APIC IRR field:\n"); |
Ingo Molnar | 251e1e4 | 2009-07-02 08:54:01 +0200 | [diff] [blame] | 1780 | print_APIC_field(APIC_IRR); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1781 | |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 1782 | if (APIC_INTEGRATED(ver)) { /* !82489DX */ |
| 1783 | if (maxlvt > 3) /* Due to the Pentium erratum 3AP. */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1784 | apic_write(APIC_ESR, 0); |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 1785 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1786 | v = apic_read(APIC_ESR); |
| 1787 | printk(KERN_DEBUG "... APIC ESR: %08x\n", v); |
| 1788 | } |
| 1789 | |
Hiroshi Shimamoto | 7ab6af7 | 2008-07-30 17:36:48 -0700 | [diff] [blame] | 1790 | icr = apic_icr_read(); |
Ingo Molnar | 0c425ce | 2008-08-18 13:04:26 +0200 | [diff] [blame] | 1791 | printk(KERN_DEBUG "... APIC ICR: %08x\n", (u32)icr); |
| 1792 | printk(KERN_DEBUG "... APIC ICR2: %08x\n", (u32)(icr >> 32)); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1793 | |
| 1794 | v = apic_read(APIC_LVTT); |
| 1795 | printk(KERN_DEBUG "... APIC LVTT: %08x\n", v); |
| 1796 | |
| 1797 | if (maxlvt > 3) { /* PC is LVT#4. */ |
| 1798 | v = apic_read(APIC_LVTPC); |
| 1799 | printk(KERN_DEBUG "... APIC LVTPC: %08x\n", v); |
| 1800 | } |
| 1801 | v = apic_read(APIC_LVT0); |
| 1802 | printk(KERN_DEBUG "... APIC LVT0: %08x\n", v); |
| 1803 | v = apic_read(APIC_LVT1); |
| 1804 | printk(KERN_DEBUG "... APIC LVT1: %08x\n", v); |
| 1805 | |
| 1806 | if (maxlvt > 2) { /* ERR is LVT#3. */ |
| 1807 | v = apic_read(APIC_LVTERR); |
| 1808 | printk(KERN_DEBUG "... APIC LVTERR: %08x\n", v); |
| 1809 | } |
| 1810 | |
| 1811 | v = apic_read(APIC_TMICT); |
| 1812 | printk(KERN_DEBUG "... APIC TMICT: %08x\n", v); |
| 1813 | v = apic_read(APIC_TMCCT); |
| 1814 | printk(KERN_DEBUG "... APIC TMCCT: %08x\n", v); |
| 1815 | v = apic_read(APIC_TDCR); |
| 1816 | printk(KERN_DEBUG "... APIC TDCR: %08x\n", v); |
Andreas Herrmann | 97a5271 | 2009-05-08 18:23:50 +0200 | [diff] [blame] | 1817 | |
| 1818 | if (boot_cpu_has(X86_FEATURE_EXTAPIC)) { |
| 1819 | v = apic_read(APIC_EFEAT); |
| 1820 | maxlvt = (v >> 16) & 0xff; |
| 1821 | printk(KERN_DEBUG "... APIC EFEAT: %08x\n", v); |
| 1822 | v = apic_read(APIC_ECTRL); |
| 1823 | printk(KERN_DEBUG "... APIC ECTRL: %08x\n", v); |
| 1824 | for (i = 0; i < maxlvt; i++) { |
| 1825 | v = apic_read(APIC_EILVTn(i)); |
| 1826 | printk(KERN_DEBUG "... APIC EILVT%d: %08x\n", i, v); |
| 1827 | } |
| 1828 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1829 | printk("\n"); |
| 1830 | } |
| 1831 | |
Maciej W. Rozycki | 32f71af | 2008-07-21 00:52:49 +0100 | [diff] [blame] | 1832 | __apicdebuginit(void) print_all_local_APICs(void) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1833 | { |
Yinghai Lu | ffd5aae | 2008-08-19 20:50:50 -0700 | [diff] [blame] | 1834 | int cpu; |
| 1835 | |
| 1836 | preempt_disable(); |
| 1837 | for_each_online_cpu(cpu) |
| 1838 | smp_call_function_single(cpu, print_local_APIC, NULL, 1); |
| 1839 | preempt_enable(); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1840 | } |
| 1841 | |
Maciej W. Rozycki | 32f71af | 2008-07-21 00:52:49 +0100 | [diff] [blame] | 1842 | __apicdebuginit(void) print_PIC(void) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1843 | { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1844 | unsigned int v; |
| 1845 | unsigned long flags; |
| 1846 | |
| 1847 | if (apic_verbosity == APIC_QUIET) |
| 1848 | return; |
| 1849 | |
| 1850 | printk(KERN_DEBUG "\nprinting PIC contents\n"); |
| 1851 | |
| 1852 | spin_lock_irqsave(&i8259A_lock, flags); |
| 1853 | |
| 1854 | v = inb(0xa1) << 8 | inb(0x21); |
| 1855 | printk(KERN_DEBUG "... PIC IMR: %04x\n", v); |
| 1856 | |
| 1857 | v = inb(0xa0) << 8 | inb(0x20); |
| 1858 | printk(KERN_DEBUG "... PIC IRR: %04x\n", v); |
| 1859 | |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 1860 | outb(0x0b,0xa0); |
| 1861 | outb(0x0b,0x20); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1862 | v = inb(0xa0) << 8 | inb(0x20); |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 1863 | outb(0x0a,0xa0); |
| 1864 | outb(0x0a,0x20); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1865 | |
| 1866 | spin_unlock_irqrestore(&i8259A_lock, flags); |
| 1867 | |
| 1868 | printk(KERN_DEBUG "... PIC ISR: %04x\n", v); |
| 1869 | |
| 1870 | v = inb(0x4d1) << 8 | inb(0x4d0); |
| 1871 | printk(KERN_DEBUG "... PIC ELCR: %04x\n", v); |
| 1872 | } |
| 1873 | |
Maciej W. Rozycki | 32f71af | 2008-07-21 00:52:49 +0100 | [diff] [blame] | 1874 | __apicdebuginit(int) print_all_ICs(void) |
| 1875 | { |
| 1876 | print_PIC(); |
Yinghai Lu | 4797f6b | 2009-05-02 10:40:57 -0700 | [diff] [blame] | 1877 | |
| 1878 | /* don't print out if apic is not there */ |
| 1879 | if (!cpu_has_apic || disable_apic) |
| 1880 | return 0; |
| 1881 | |
Maciej W. Rozycki | 32f71af | 2008-07-21 00:52:49 +0100 | [diff] [blame] | 1882 | print_all_local_APICs(); |
| 1883 | print_IO_APIC(); |
| 1884 | |
| 1885 | return 0; |
| 1886 | } |
| 1887 | |
| 1888 | fs_initcall(print_all_ICs); |
| 1889 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1890 | |
Yinghai Lu | efa2559 | 2008-08-19 20:50:36 -0700 | [diff] [blame] | 1891 | /* Where if anywhere is the i8259 connect in external int mode */ |
| 1892 | static struct { int pin, apic; } ioapic_i8259 = { -1, -1 }; |
| 1893 | |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 1894 | void __init enable_IO_APIC(void) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1895 | { |
| 1896 | union IO_APIC_reg_01 reg_01; |
Eric W. Biederman | fcfd636 | 2005-10-30 14:59:39 -0800 | [diff] [blame] | 1897 | int i8259_apic, i8259_pin; |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 1898 | int apic; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1899 | unsigned long flags; |
| 1900 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1901 | /* |
| 1902 | * The number of IO-APIC IRQ registers (== #pins): |
| 1903 | */ |
Eric W. Biederman | fcfd636 | 2005-10-30 14:59:39 -0800 | [diff] [blame] | 1904 | for (apic = 0; apic < nr_ioapics; apic++) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1905 | spin_lock_irqsave(&ioapic_lock, flags); |
Eric W. Biederman | fcfd636 | 2005-10-30 14:59:39 -0800 | [diff] [blame] | 1906 | reg_01.raw = io_apic_read(apic, 1); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1907 | spin_unlock_irqrestore(&ioapic_lock, flags); |
Eric W. Biederman | fcfd636 | 2005-10-30 14:59:39 -0800 | [diff] [blame] | 1908 | nr_ioapic_registers[apic] = reg_01.bits.entries+1; |
| 1909 | } |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 1910 | for(apic = 0; apic < nr_ioapics; apic++) { |
Eric W. Biederman | fcfd636 | 2005-10-30 14:59:39 -0800 | [diff] [blame] | 1911 | int pin; |
| 1912 | /* See if any of the pins is in ExtINT mode */ |
Eric W. Biederman | 1008fdd | 2006-01-11 22:46:06 +0100 | [diff] [blame] | 1913 | for (pin = 0; pin < nr_ioapic_registers[apic]; pin++) { |
Eric W. Biederman | fcfd636 | 2005-10-30 14:59:39 -0800 | [diff] [blame] | 1914 | struct IO_APIC_route_entry entry; |
Andi Kleen | cf4c6a2 | 2006-09-26 10:52:30 +0200 | [diff] [blame] | 1915 | entry = ioapic_read_entry(apic, pin); |
Eric W. Biederman | fcfd636 | 2005-10-30 14:59:39 -0800 | [diff] [blame] | 1916 | |
Eric W. Biederman | fcfd636 | 2005-10-30 14:59:39 -0800 | [diff] [blame] | 1917 | /* If the interrupt line is enabled and in ExtInt mode |
| 1918 | * I have found the pin where the i8259 is connected. |
| 1919 | */ |
| 1920 | if ((entry.mask == 0) && (entry.delivery_mode == dest_ExtINT)) { |
| 1921 | ioapic_i8259.apic = apic; |
| 1922 | ioapic_i8259.pin = pin; |
| 1923 | goto found_i8259; |
| 1924 | } |
| 1925 | } |
| 1926 | } |
| 1927 | found_i8259: |
| 1928 | /* Look to see what if the MP table has reported the ExtINT */ |
| 1929 | /* If we could not find the appropriate pin by looking at the ioapic |
| 1930 | * the i8259 probably is not connected the ioapic but give the |
| 1931 | * mptable a chance anyway. |
| 1932 | */ |
| 1933 | i8259_pin = find_isa_irq_pin(0, mp_ExtINT); |
| 1934 | i8259_apic = find_isa_irq_apic(0, mp_ExtINT); |
| 1935 | /* Trust the MP table if nothing is setup in the hardware */ |
| 1936 | if ((ioapic_i8259.pin == -1) && (i8259_pin >= 0)) { |
| 1937 | printk(KERN_WARNING "ExtINT not setup in hardware but reported by MP table\n"); |
| 1938 | ioapic_i8259.pin = i8259_pin; |
| 1939 | ioapic_i8259.apic = i8259_apic; |
| 1940 | } |
| 1941 | /* Complain if the MP table and the hardware disagree */ |
| 1942 | if (((ioapic_i8259.apic != i8259_apic) || (ioapic_i8259.pin != i8259_pin)) && |
| 1943 | (i8259_pin >= 0) && (ioapic_i8259.pin >= 0)) |
| 1944 | { |
| 1945 | printk(KERN_WARNING "ExtINT in hardware and MP table differ\n"); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1946 | } |
| 1947 | |
| 1948 | /* |
| 1949 | * Do not trust the IO-APIC being empty at bootup |
| 1950 | */ |
| 1951 | clear_IO_APIC(); |
| 1952 | } |
| 1953 | |
| 1954 | /* |
| 1955 | * Not an __init, needed by the reboot code |
| 1956 | */ |
| 1957 | void disable_IO_APIC(void) |
| 1958 | { |
| 1959 | /* |
| 1960 | * Clear the IO-APIC before rebooting: |
| 1961 | */ |
| 1962 | clear_IO_APIC(); |
| 1963 | |
Eric W. Biederman | 650927e | 2005-06-25 14:57:44 -0700 | [diff] [blame] | 1964 | /* |
Karsten Wiese | 0b968d2 | 2005-09-09 12:59:04 +0200 | [diff] [blame] | 1965 | * If the i8259 is routed through an IOAPIC |
Eric W. Biederman | 650927e | 2005-06-25 14:57:44 -0700 | [diff] [blame] | 1966 | * Put that IOAPIC in virtual wire mode |
Karsten Wiese | 0b968d2 | 2005-09-09 12:59:04 +0200 | [diff] [blame] | 1967 | * so legacy interrupts can be delivered. |
Suresh Siddha | 7c6d9f9 | 2009-03-16 17:04:59 -0700 | [diff] [blame] | 1968 | * |
| 1969 | * With interrupt-remapping, for now we will use virtual wire A mode, |
| 1970 | * as virtual wire B is little complex (need to configure both |
| 1971 | * IOAPIC RTE aswell as interrupt-remapping table entry). |
| 1972 | * As this gets called during crash dump, keep this simple for now. |
Eric W. Biederman | 650927e | 2005-06-25 14:57:44 -0700 | [diff] [blame] | 1973 | */ |
Suresh Siddha | 7c6d9f9 | 2009-03-16 17:04:59 -0700 | [diff] [blame] | 1974 | if (ioapic_i8259.pin != -1 && !intr_remapping_enabled) { |
Eric W. Biederman | 650927e | 2005-06-25 14:57:44 -0700 | [diff] [blame] | 1975 | struct IO_APIC_route_entry entry; |
Eric W. Biederman | 650927e | 2005-06-25 14:57:44 -0700 | [diff] [blame] | 1976 | |
| 1977 | memset(&entry, 0, sizeof(entry)); |
| 1978 | entry.mask = 0; /* Enabled */ |
| 1979 | entry.trigger = 0; /* Edge */ |
| 1980 | entry.irr = 0; |
| 1981 | entry.polarity = 0; /* High */ |
| 1982 | entry.delivery_status = 0; |
| 1983 | entry.dest_mode = 0; /* Physical */ |
Eric W. Biederman | fcfd636 | 2005-10-30 14:59:39 -0800 | [diff] [blame] | 1984 | entry.delivery_mode = dest_ExtINT; /* ExtInt */ |
Eric W. Biederman | 650927e | 2005-06-25 14:57:44 -0700 | [diff] [blame] | 1985 | entry.vector = 0; |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 1986 | entry.dest = read_apic_id(); |
Eric W. Biederman | 650927e | 2005-06-25 14:57:44 -0700 | [diff] [blame] | 1987 | |
| 1988 | /* |
| 1989 | * Add it to the IO-APIC irq-routing table: |
| 1990 | */ |
Andi Kleen | cf4c6a2 | 2006-09-26 10:52:30 +0200 | [diff] [blame] | 1991 | ioapic_write_entry(ioapic_i8259.apic, ioapic_i8259.pin, entry); |
Eric W. Biederman | 650927e | 2005-06-25 14:57:44 -0700 | [diff] [blame] | 1992 | } |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 1993 | |
Suresh Siddha | 7c6d9f9 | 2009-03-16 17:04:59 -0700 | [diff] [blame] | 1994 | /* |
| 1995 | * Use virtual wire A mode when interrupt remapping is enabled. |
| 1996 | */ |
Cyrill Gorcunov | 3f4c395 | 2009-06-17 22:13:22 +0400 | [diff] [blame] | 1997 | if (cpu_has_apic) |
| 1998 | disconnect_bsp_APIC(!intr_remapping_enabled && |
| 1999 | ioapic_i8259.pin != -1); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2000 | } |
| 2001 | |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 2002 | #ifdef CONFIG_X86_32 |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2003 | /* |
| 2004 | * function to set the IO-APIC physical IDs based on the |
| 2005 | * values stored in the MPC table. |
| 2006 | * |
| 2007 | * by Matt Domsch <Matt_Domsch@dell.com> Tue Dec 21 12:25:05 CST 1999 |
| 2008 | */ |
| 2009 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2010 | static void __init setup_ioapic_ids_from_mpc(void) |
| 2011 | { |
| 2012 | union IO_APIC_reg_00 reg_00; |
| 2013 | physid_mask_t phys_id_present_map; |
Ingo Molnar | c8d46cf | 2009-01-28 00:14:11 +0100 | [diff] [blame] | 2014 | int apic_id; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2015 | int i; |
| 2016 | unsigned char old_id; |
| 2017 | unsigned long flags; |
| 2018 | |
Yinghai Lu | a4dbc34 | 2008-07-25 02:14:28 -0700 | [diff] [blame] | 2019 | if (x86_quirks->setup_ioapic_ids && x86_quirks->setup_ioapic_ids()) |
Yinghai Lu | d49c428 | 2008-06-08 18:31:54 -0700 | [diff] [blame] | 2020 | return; |
Yinghai Lu | d49c428 | 2008-06-08 18:31:54 -0700 | [diff] [blame] | 2021 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2022 | /* |
Natalie Protasevich | ca05fea | 2005-06-23 00:08:22 -0700 | [diff] [blame] | 2023 | * Don't check I/O APIC IDs for xAPIC systems. They have |
| 2024 | * no meaning without the serial APIC bus. |
| 2025 | */ |
Shaohua Li | 7c5c1e4 | 2006-03-23 02:59:53 -0800 | [diff] [blame] | 2026 | if (!(boot_cpu_data.x86_vendor == X86_VENDOR_INTEL) |
| 2027 | || APIC_XAPIC(apic_version[boot_cpu_physical_apicid])) |
Natalie Protasevich | ca05fea | 2005-06-23 00:08:22 -0700 | [diff] [blame] | 2028 | return; |
| 2029 | /* |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2030 | * This is broken; anything with a real cpu count has to |
| 2031 | * circumvent this idiocy regardless. |
| 2032 | */ |
Ingo Molnar | d190cb8 | 2009-01-28 06:50:47 +0100 | [diff] [blame] | 2033 | phys_id_present_map = apic->ioapic_phys_id_map(phys_cpu_present_map); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2034 | |
| 2035 | /* |
| 2036 | * Set the IOAPIC ID to the value stored in the MPC table. |
| 2037 | */ |
Ingo Molnar | c8d46cf | 2009-01-28 00:14:11 +0100 | [diff] [blame] | 2038 | for (apic_id = 0; apic_id < nr_ioapics; apic_id++) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2039 | |
| 2040 | /* Read the register 0 value */ |
| 2041 | spin_lock_irqsave(&ioapic_lock, flags); |
Ingo Molnar | c8d46cf | 2009-01-28 00:14:11 +0100 | [diff] [blame] | 2042 | reg_00.raw = io_apic_read(apic_id, 0); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2043 | spin_unlock_irqrestore(&ioapic_lock, flags); |
Paolo Ciarrocchi | 3606244 | 2008-06-08 13:07:18 +0200 | [diff] [blame] | 2044 | |
Ingo Molnar | c8d46cf | 2009-01-28 00:14:11 +0100 | [diff] [blame] | 2045 | old_id = mp_ioapics[apic_id].apicid; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2046 | |
Ingo Molnar | c8d46cf | 2009-01-28 00:14:11 +0100 | [diff] [blame] | 2047 | if (mp_ioapics[apic_id].apicid >= get_physical_broadcast()) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2048 | printk(KERN_ERR "BIOS bug, IO-APIC#%d ID is %d in the MPC table!...\n", |
Ingo Molnar | c8d46cf | 2009-01-28 00:14:11 +0100 | [diff] [blame] | 2049 | apic_id, mp_ioapics[apic_id].apicid); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2050 | printk(KERN_ERR "... fixing up to %d. (tell your hw vendor)\n", |
| 2051 | reg_00.bits.ID); |
Ingo Molnar | c8d46cf | 2009-01-28 00:14:11 +0100 | [diff] [blame] | 2052 | mp_ioapics[apic_id].apicid = reg_00.bits.ID; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2053 | } |
| 2054 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2055 | /* |
| 2056 | * Sanity check, is the ID really free? Every APIC in a |
| 2057 | * system must have a unique ID or we get lots of nice |
| 2058 | * 'stuck on smp_invalidate_needed IPI wait' messages. |
| 2059 | */ |
Ingo Molnar | d1d7cae | 2009-01-28 05:41:42 +0100 | [diff] [blame] | 2060 | if (apic->check_apicid_used(phys_id_present_map, |
Ingo Molnar | c8d46cf | 2009-01-28 00:14:11 +0100 | [diff] [blame] | 2061 | mp_ioapics[apic_id].apicid)) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2062 | printk(KERN_ERR "BIOS bug, IO-APIC#%d ID %d is already used!...\n", |
Ingo Molnar | c8d46cf | 2009-01-28 00:14:11 +0100 | [diff] [blame] | 2063 | apic_id, mp_ioapics[apic_id].apicid); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2064 | for (i = 0; i < get_physical_broadcast(); i++) |
| 2065 | if (!physid_isset(i, phys_id_present_map)) |
| 2066 | break; |
| 2067 | if (i >= get_physical_broadcast()) |
| 2068 | panic("Max APIC ID exceeded!\n"); |
| 2069 | printk(KERN_ERR "... fixing up to %d. (tell your hw vendor)\n", |
| 2070 | i); |
| 2071 | physid_set(i, phys_id_present_map); |
Ingo Molnar | c8d46cf | 2009-01-28 00:14:11 +0100 | [diff] [blame] | 2072 | mp_ioapics[apic_id].apicid = i; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2073 | } else { |
| 2074 | physid_mask_t tmp; |
Ingo Molnar | 8058714 | 2009-01-28 06:50:47 +0100 | [diff] [blame] | 2075 | tmp = apic->apicid_to_cpu_present(mp_ioapics[apic_id].apicid); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2076 | apic_printk(APIC_VERBOSE, "Setting %d in the " |
| 2077 | "phys_id_present_map\n", |
Ingo Molnar | c8d46cf | 2009-01-28 00:14:11 +0100 | [diff] [blame] | 2078 | mp_ioapics[apic_id].apicid); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2079 | physids_or(phys_id_present_map, phys_id_present_map, tmp); |
| 2080 | } |
| 2081 | |
| 2082 | |
| 2083 | /* |
| 2084 | * We need to adjust the IRQ routing table |
| 2085 | * if the ID changed. |
| 2086 | */ |
Ingo Molnar | c8d46cf | 2009-01-28 00:14:11 +0100 | [diff] [blame] | 2087 | if (old_id != mp_ioapics[apic_id].apicid) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2088 | for (i = 0; i < mp_irq_entries; i++) |
Jaswinder Singh Rajput | c2c2174 | 2009-01-12 17:47:22 +0530 | [diff] [blame] | 2089 | if (mp_irqs[i].dstapic == old_id) |
| 2090 | mp_irqs[i].dstapic |
Ingo Molnar | c8d46cf | 2009-01-28 00:14:11 +0100 | [diff] [blame] | 2091 | = mp_ioapics[apic_id].apicid; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2092 | |
| 2093 | /* |
| 2094 | * Read the right value from the MPC table and |
| 2095 | * write it into the ID register. |
Paolo Ciarrocchi | 3606244 | 2008-06-08 13:07:18 +0200 | [diff] [blame] | 2096 | */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2097 | apic_printk(APIC_VERBOSE, KERN_INFO |
| 2098 | "...changing IO-APIC physical APIC ID to %d ...", |
Ingo Molnar | c8d46cf | 2009-01-28 00:14:11 +0100 | [diff] [blame] | 2099 | mp_ioapics[apic_id].apicid); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2100 | |
Ingo Molnar | c8d46cf | 2009-01-28 00:14:11 +0100 | [diff] [blame] | 2101 | reg_00.bits.ID = mp_ioapics[apic_id].apicid; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2102 | spin_lock_irqsave(&ioapic_lock, flags); |
Ingo Molnar | c8d46cf | 2009-01-28 00:14:11 +0100 | [diff] [blame] | 2103 | io_apic_write(apic_id, 0, reg_00.raw); |
Yinghai Lu | a2d332f | 2008-08-21 12:56:32 -0700 | [diff] [blame] | 2104 | spin_unlock_irqrestore(&ioapic_lock, flags); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2105 | |
| 2106 | /* |
| 2107 | * Sanity check |
| 2108 | */ |
| 2109 | spin_lock_irqsave(&ioapic_lock, flags); |
Ingo Molnar | c8d46cf | 2009-01-28 00:14:11 +0100 | [diff] [blame] | 2110 | reg_00.raw = io_apic_read(apic_id, 0); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2111 | spin_unlock_irqrestore(&ioapic_lock, flags); |
Ingo Molnar | c8d46cf | 2009-01-28 00:14:11 +0100 | [diff] [blame] | 2112 | if (reg_00.bits.ID != mp_ioapics[apic_id].apicid) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2113 | printk("could not set ID!\n"); |
| 2114 | else |
| 2115 | apic_printk(APIC_VERBOSE, " ok.\n"); |
| 2116 | } |
| 2117 | } |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 2118 | #endif |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2119 | |
Zachary Amsden | 7ce0bcf | 2007-02-13 13:26:21 +0100 | [diff] [blame] | 2120 | int no_timer_check __initdata; |
Zachary Amsden | 8542b20 | 2006-12-07 02:14:09 +0100 | [diff] [blame] | 2121 | |
| 2122 | static int __init notimercheck(char *s) |
| 2123 | { |
| 2124 | no_timer_check = 1; |
| 2125 | return 1; |
| 2126 | } |
| 2127 | __setup("no_timer_check", notimercheck); |
| 2128 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2129 | /* |
| 2130 | * There is a nasty bug in some older SMP boards, their mptable lies |
| 2131 | * about the timer IRQ. We do the following to work around the situation: |
| 2132 | * |
| 2133 | * - timer IRQ defaults to IO-APIC IRQ |
| 2134 | * - if this function detects that timer IRQs are defunct, then we fall |
| 2135 | * back to ISA timer IRQs |
| 2136 | */ |
Adrian Bunk | f0a7a5c | 2007-07-21 17:10:29 +0200 | [diff] [blame] | 2137 | static int __init timer_irq_works(void) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2138 | { |
| 2139 | unsigned long t1 = jiffies; |
Ingo Molnar | 4aae070 | 2007-12-18 18:05:58 +0100 | [diff] [blame] | 2140 | unsigned long flags; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2141 | |
Zachary Amsden | 8542b20 | 2006-12-07 02:14:09 +0100 | [diff] [blame] | 2142 | if (no_timer_check) |
| 2143 | return 1; |
| 2144 | |
Ingo Molnar | 4aae070 | 2007-12-18 18:05:58 +0100 | [diff] [blame] | 2145 | local_save_flags(flags); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2146 | local_irq_enable(); |
| 2147 | /* Let ten ticks pass... */ |
| 2148 | mdelay((10 * 1000) / HZ); |
Ingo Molnar | 4aae070 | 2007-12-18 18:05:58 +0100 | [diff] [blame] | 2149 | local_irq_restore(flags); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2150 | |
| 2151 | /* |
| 2152 | * Expect a few ticks at least, to be sure some possible |
| 2153 | * glue logic does not lock up after one or two first |
| 2154 | * ticks in a non-ExtINT mode. Also the local APIC |
| 2155 | * might have cached one ExtINT interrupt. Finally, at |
| 2156 | * least one tick may be lost due to delays. |
| 2157 | */ |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 2158 | |
| 2159 | /* jiffies wrap? */ |
Julia Lawall | 1d16b53 | 2008-01-30 13:32:19 +0100 | [diff] [blame] | 2160 | if (time_after(jiffies, t1 + 4)) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2161 | return 1; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2162 | return 0; |
| 2163 | } |
| 2164 | |
| 2165 | /* |
| 2166 | * In the SMP+IOAPIC case it might happen that there are an unspecified |
| 2167 | * number of pending IRQ events unhandled. These cases are very rare, |
| 2168 | * so we 'resend' these IRQs via IPIs, to the same CPU. It's much |
| 2169 | * better to do it this way as thus we do not have to be aware of |
| 2170 | * 'pending' interrupts in the IRQ path, except at this point. |
| 2171 | */ |
| 2172 | /* |
| 2173 | * Edge triggered needs to resend any interrupt |
| 2174 | * that was delayed but this is now handled in the device |
| 2175 | * independent code. |
| 2176 | */ |
| 2177 | |
| 2178 | /* |
| 2179 | * Starting up a edge-triggered IO-APIC interrupt is |
| 2180 | * nasty - we need to make sure that we get the edge. |
| 2181 | * If it is already asserted for some reason, we need |
| 2182 | * return 1 to indicate that is was pending. |
| 2183 | * |
| 2184 | * This is not complete - we should be able to fake |
| 2185 | * an edge even if it isn't on the 8259A... |
| 2186 | */ |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 2187 | |
Ingo Molnar | f5b9ed7 | 2006-10-04 02:16:26 -0700 | [diff] [blame] | 2188 | static unsigned int startup_ioapic_irq(unsigned int irq) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2189 | { |
| 2190 | int was_pending = 0; |
| 2191 | unsigned long flags; |
Yinghai Lu | 0b8f1ef | 2008-12-05 18:58:31 -0800 | [diff] [blame] | 2192 | struct irq_cfg *cfg; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2193 | |
| 2194 | spin_lock_irqsave(&ioapic_lock, flags); |
Yinghai Lu | 99d093d | 2008-12-05 18:58:32 -0800 | [diff] [blame] | 2195 | if (irq < NR_IRQS_LEGACY) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2196 | disable_8259A_irq(irq); |
| 2197 | if (i8259A_irq_pending(irq)) |
| 2198 | was_pending = 1; |
| 2199 | } |
Yinghai Lu | 0b8f1ef | 2008-12-05 18:58:31 -0800 | [diff] [blame] | 2200 | cfg = irq_cfg(irq); |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 2201 | __unmask_IO_APIC_irq(cfg); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2202 | spin_unlock_irqrestore(&ioapic_lock, flags); |
| 2203 | |
| 2204 | return was_pending; |
| 2205 | } |
| 2206 | |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 2207 | #ifdef CONFIG_X86_64 |
Eric W. Biederman | ace80ab | 2006-10-04 02:16:47 -0700 | [diff] [blame] | 2208 | static int ioapic_retrigger_irq(unsigned int irq) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2209 | { |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 2210 | |
| 2211 | struct irq_cfg *cfg = irq_cfg(irq); |
| 2212 | unsigned long flags; |
| 2213 | |
| 2214 | spin_lock_irqsave(&vector_lock, flags); |
Ingo Molnar | dac5f41 | 2009-01-28 15:42:24 +0100 | [diff] [blame] | 2215 | apic->send_IPI_mask(cpumask_of(cpumask_first(cfg->domain)), cfg->vector); |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 2216 | spin_unlock_irqrestore(&vector_lock, flags); |
Ingo Molnar | c0ad90a | 2006-06-29 02:24:44 -0700 | [diff] [blame] | 2217 | |
| 2218 | return 1; |
| 2219 | } |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 2220 | #else |
| 2221 | static int ioapic_retrigger_irq(unsigned int irq) |
| 2222 | { |
Ingo Molnar | dac5f41 | 2009-01-28 15:42:24 +0100 | [diff] [blame] | 2223 | apic->send_IPI_self(irq_cfg(irq)->vector); |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 2224 | |
Thomas Gleixner | d6c88a5 | 2008-10-15 15:27:23 +0200 | [diff] [blame] | 2225 | return 1; |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 2226 | } |
| 2227 | #endif |
| 2228 | |
| 2229 | /* |
| 2230 | * Level and edge triggered IO-APIC interrupts need different handling, |
| 2231 | * so we use two separate IRQ descriptors. Edge triggered IRQs can be |
| 2232 | * handled with the level-triggered descriptor, but that one has slightly |
| 2233 | * more overhead. Level-triggered interrupts cannot be handled with the |
| 2234 | * edge-triggered handler, without risking IRQ storms and other ugly |
| 2235 | * races. |
| 2236 | */ |
Ingo Molnar | c0ad90a | 2006-06-29 02:24:44 -0700 | [diff] [blame] | 2237 | |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 2238 | #ifdef CONFIG_SMP |
Gary Hade | e85abf8 | 2009-04-08 14:07:25 -0700 | [diff] [blame] | 2239 | static void send_cleanup_vector(struct irq_cfg *cfg) |
| 2240 | { |
| 2241 | cpumask_var_t cleanup_mask; |
| 2242 | |
| 2243 | if (unlikely(!alloc_cpumask_var(&cleanup_mask, GFP_ATOMIC))) { |
| 2244 | unsigned int i; |
| 2245 | cfg->move_cleanup_count = 0; |
| 2246 | for_each_cpu_and(i, cfg->old_domain, cpu_online_mask) |
| 2247 | cfg->move_cleanup_count++; |
| 2248 | for_each_cpu_and(i, cfg->old_domain, cpu_online_mask) |
| 2249 | apic->send_IPI_mask(cpumask_of(i), IRQ_MOVE_CLEANUP_VECTOR); |
| 2250 | } else { |
| 2251 | cpumask_and(cleanup_mask, cfg->old_domain, cpu_online_mask); |
| 2252 | cfg->move_cleanup_count = cpumask_weight(cleanup_mask); |
| 2253 | apic->send_IPI_mask(cleanup_mask, IRQ_MOVE_CLEANUP_VECTOR); |
| 2254 | free_cpumask_var(cleanup_mask); |
| 2255 | } |
| 2256 | cfg->move_in_progress = 0; |
| 2257 | } |
| 2258 | |
Ingo Molnar | 4420471 | 2009-05-01 19:02:50 +0200 | [diff] [blame] | 2259 | static void __target_IO_APIC_irq(unsigned int irq, unsigned int dest, struct irq_cfg *cfg) |
Gary Hade | e85abf8 | 2009-04-08 14:07:25 -0700 | [diff] [blame] | 2260 | { |
| 2261 | int apic, pin; |
| 2262 | struct irq_pin_list *entry; |
| 2263 | u8 vector = cfg->vector; |
| 2264 | |
| 2265 | entry = cfg->irq_2_pin; |
| 2266 | for (;;) { |
| 2267 | unsigned int reg; |
| 2268 | |
| 2269 | if (!entry) |
| 2270 | break; |
| 2271 | |
| 2272 | apic = entry->apic; |
| 2273 | pin = entry->pin; |
| 2274 | /* |
| 2275 | * With interrupt-remapping, destination information comes |
| 2276 | * from interrupt-remapping table entry. |
| 2277 | */ |
| 2278 | if (!irq_remapped(irq)) |
| 2279 | io_apic_write(apic, 0x11 + pin*2, dest); |
| 2280 | reg = io_apic_read(apic, 0x10 + pin*2); |
| 2281 | reg &= ~IO_APIC_REDIR_VECTOR_MASK; |
| 2282 | reg |= vector; |
| 2283 | io_apic_modify(apic, 0x10 + pin*2, reg); |
| 2284 | if (!entry->next) |
| 2285 | break; |
| 2286 | entry = entry->next; |
| 2287 | } |
| 2288 | } |
| 2289 | |
Ingo Molnar | 4420471 | 2009-05-01 19:02:50 +0200 | [diff] [blame] | 2290 | static int |
| 2291 | assign_irq_vector(int irq, struct irq_cfg *cfg, const struct cpumask *mask); |
| 2292 | |
Gary Hade | e85abf8 | 2009-04-08 14:07:25 -0700 | [diff] [blame] | 2293 | /* |
| 2294 | * Either sets desc->affinity to a valid value, and returns |
| 2295 | * ->cpu_mask_to_apicid of that, or returns BAD_APICID and |
| 2296 | * leaves desc->affinity untouched. |
| 2297 | */ |
| 2298 | static unsigned int |
| 2299 | set_desc_affinity(struct irq_desc *desc, const struct cpumask *mask) |
| 2300 | { |
| 2301 | struct irq_cfg *cfg; |
| 2302 | unsigned int irq; |
| 2303 | |
| 2304 | if (!cpumask_intersects(mask, cpu_online_mask)) |
| 2305 | return BAD_APICID; |
| 2306 | |
| 2307 | irq = desc->irq; |
| 2308 | cfg = desc->chip_data; |
| 2309 | if (assign_irq_vector(irq, cfg, mask)) |
| 2310 | return BAD_APICID; |
| 2311 | |
Gary Hade | e85abf8 | 2009-04-08 14:07:25 -0700 | [diff] [blame] | 2312 | cpumask_copy(desc->affinity, mask); |
| 2313 | |
| 2314 | return apic->cpu_mask_to_apicid_and(desc->affinity, cfg->domain); |
| 2315 | } |
| 2316 | |
Ingo Molnar | 4420471 | 2009-05-01 19:02:50 +0200 | [diff] [blame] | 2317 | static int |
Gary Hade | e85abf8 | 2009-04-08 14:07:25 -0700 | [diff] [blame] | 2318 | set_ioapic_affinity_irq_desc(struct irq_desc *desc, const struct cpumask *mask) |
| 2319 | { |
| 2320 | struct irq_cfg *cfg; |
| 2321 | unsigned long flags; |
| 2322 | unsigned int dest; |
| 2323 | unsigned int irq; |
Ingo Molnar | 4420471 | 2009-05-01 19:02:50 +0200 | [diff] [blame] | 2324 | int ret = -1; |
Gary Hade | e85abf8 | 2009-04-08 14:07:25 -0700 | [diff] [blame] | 2325 | |
| 2326 | irq = desc->irq; |
| 2327 | cfg = desc->chip_data; |
| 2328 | |
| 2329 | spin_lock_irqsave(&ioapic_lock, flags); |
| 2330 | dest = set_desc_affinity(desc, mask); |
| 2331 | if (dest != BAD_APICID) { |
| 2332 | /* Only the high 8 bits are valid. */ |
| 2333 | dest = SET_APIC_LOGICAL_ID(dest); |
| 2334 | __target_IO_APIC_irq(irq, dest, cfg); |
Ingo Molnar | 4420471 | 2009-05-01 19:02:50 +0200 | [diff] [blame] | 2335 | ret = 0; |
Gary Hade | e85abf8 | 2009-04-08 14:07:25 -0700 | [diff] [blame] | 2336 | } |
| 2337 | spin_unlock_irqrestore(&ioapic_lock, flags); |
Ingo Molnar | 4420471 | 2009-05-01 19:02:50 +0200 | [diff] [blame] | 2338 | |
| 2339 | return ret; |
Gary Hade | e85abf8 | 2009-04-08 14:07:25 -0700 | [diff] [blame] | 2340 | } |
| 2341 | |
Ingo Molnar | 4420471 | 2009-05-01 19:02:50 +0200 | [diff] [blame] | 2342 | static int |
Gary Hade | e85abf8 | 2009-04-08 14:07:25 -0700 | [diff] [blame] | 2343 | set_ioapic_affinity_irq(unsigned int irq, const struct cpumask *mask) |
| 2344 | { |
| 2345 | struct irq_desc *desc; |
| 2346 | |
| 2347 | desc = irq_to_desc(irq); |
| 2348 | |
Ingo Molnar | 4420471 | 2009-05-01 19:02:50 +0200 | [diff] [blame] | 2349 | return set_ioapic_affinity_irq_desc(desc, mask); |
Gary Hade | e85abf8 | 2009-04-08 14:07:25 -0700 | [diff] [blame] | 2350 | } |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 2351 | |
| 2352 | #ifdef CONFIG_INTR_REMAP |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 2353 | |
| 2354 | /* |
| 2355 | * Migrate the IO-APIC irq in the presence of intr-remapping. |
| 2356 | * |
Suresh Siddha | 0280f7c | 2009-03-16 17:05:01 -0700 | [diff] [blame] | 2357 | * For both level and edge triggered, irq migration is a simple atomic |
| 2358 | * update(of vector and cpu destination) of IRTE and flush the hardware cache. |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 2359 | * |
Suresh Siddha | 0280f7c | 2009-03-16 17:05:01 -0700 | [diff] [blame] | 2360 | * For level triggered, we eliminate the io-apic RTE modification (with the |
| 2361 | * updated vector information), by using a virtual vector (io-apic pin number). |
| 2362 | * Real vector that is used for interrupting cpu will be coming from |
| 2363 | * the interrupt-remapping table entry. |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 2364 | */ |
Yinghai Lu | d5dedd4 | 2009-04-27 17:59:21 -0700 | [diff] [blame] | 2365 | static int |
Mike Travis | e798673 | 2008-12-16 17:33:52 -0800 | [diff] [blame] | 2366 | migrate_ioapic_irq_desc(struct irq_desc *desc, const struct cpumask *mask) |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 2367 | { |
| 2368 | struct irq_cfg *cfg; |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 2369 | struct irte irte; |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 2370 | unsigned int dest; |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 2371 | unsigned int irq; |
Yinghai Lu | d5dedd4 | 2009-04-27 17:59:21 -0700 | [diff] [blame] | 2372 | int ret = -1; |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 2373 | |
Mike Travis | 22f65d3 | 2008-12-16 17:33:56 -0800 | [diff] [blame] | 2374 | if (!cpumask_intersects(mask, cpu_online_mask)) |
Yinghai Lu | d5dedd4 | 2009-04-27 17:59:21 -0700 | [diff] [blame] | 2375 | return ret; |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 2376 | |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 2377 | irq = desc->irq; |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 2378 | if (get_irte(irq, &irte)) |
Yinghai Lu | d5dedd4 | 2009-04-27 17:59:21 -0700 | [diff] [blame] | 2379 | return ret; |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 2380 | |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 2381 | cfg = desc->chip_data; |
| 2382 | if (assign_irq_vector(irq, cfg, mask)) |
Yinghai Lu | d5dedd4 | 2009-04-27 17:59:21 -0700 | [diff] [blame] | 2383 | return ret; |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 2384 | |
Ingo Molnar | debccb3 | 2009-01-28 15:20:18 +0100 | [diff] [blame] | 2385 | dest = apic->cpu_mask_to_apicid_and(cfg->domain, mask); |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 2386 | |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 2387 | irte.vector = cfg->vector; |
| 2388 | irte.dest_id = IRTE_DEST(dest); |
| 2389 | |
| 2390 | /* |
| 2391 | * Modified the IRTE and flushes the Interrupt entry cache. |
| 2392 | */ |
| 2393 | modify_irte(irq, &irte); |
| 2394 | |
Mike Travis | 22f65d3 | 2008-12-16 17:33:56 -0800 | [diff] [blame] | 2395 | if (cfg->move_in_progress) |
| 2396 | send_cleanup_vector(cfg); |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 2397 | |
Mike Travis | 7f7ace0 | 2009-01-10 21:58:08 -0800 | [diff] [blame] | 2398 | cpumask_copy(desc->affinity, mask); |
Yinghai Lu | d5dedd4 | 2009-04-27 17:59:21 -0700 | [diff] [blame] | 2399 | |
| 2400 | return 0; |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 2401 | } |
| 2402 | |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 2403 | /* |
| 2404 | * Migrates the IRQ destination in the process context. |
| 2405 | */ |
Yinghai Lu | d5dedd4 | 2009-04-27 17:59:21 -0700 | [diff] [blame] | 2406 | static int set_ir_ioapic_affinity_irq_desc(struct irq_desc *desc, |
Rusty Russell | 968ea6d | 2008-12-13 21:55:51 +1030 | [diff] [blame] | 2407 | const struct cpumask *mask) |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 2408 | { |
Yinghai Lu | d5dedd4 | 2009-04-27 17:59:21 -0700 | [diff] [blame] | 2409 | return migrate_ioapic_irq_desc(desc, mask); |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 2410 | } |
Yinghai Lu | d5dedd4 | 2009-04-27 17:59:21 -0700 | [diff] [blame] | 2411 | static int set_ir_ioapic_affinity_irq(unsigned int irq, |
Rusty Russell | 0de2652 | 2008-12-13 21:20:26 +1030 | [diff] [blame] | 2412 | const struct cpumask *mask) |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 2413 | { |
| 2414 | struct irq_desc *desc = irq_to_desc(irq); |
| 2415 | |
Yinghai Lu | d5dedd4 | 2009-04-27 17:59:21 -0700 | [diff] [blame] | 2416 | return set_ir_ioapic_affinity_irq_desc(desc, mask); |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 2417 | } |
Suresh Siddha | 29b61be | 2009-03-16 17:05:02 -0700 | [diff] [blame] | 2418 | #else |
Yinghai Lu | d5dedd4 | 2009-04-27 17:59:21 -0700 | [diff] [blame] | 2419 | static inline int set_ir_ioapic_affinity_irq_desc(struct irq_desc *desc, |
Suresh Siddha | 29b61be | 2009-03-16 17:05:02 -0700 | [diff] [blame] | 2420 | const struct cpumask *mask) |
| 2421 | { |
Yinghai Lu | d5dedd4 | 2009-04-27 17:59:21 -0700 | [diff] [blame] | 2422 | return 0; |
Suresh Siddha | 29b61be | 2009-03-16 17:05:02 -0700 | [diff] [blame] | 2423 | } |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 2424 | #endif |
| 2425 | |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 2426 | asmlinkage void smp_irq_move_cleanup_interrupt(void) |
| 2427 | { |
| 2428 | unsigned vector, me; |
Hiroshi Shimamoto | 8f2466f | 2008-12-08 19:19:07 -0800 | [diff] [blame] | 2429 | |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 2430 | ack_APIC_irq(); |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 2431 | exit_idle(); |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 2432 | irq_enter(); |
| 2433 | |
| 2434 | me = smp_processor_id(); |
| 2435 | for (vector = FIRST_EXTERNAL_VECTOR; vector < NR_VECTORS; vector++) { |
| 2436 | unsigned int irq; |
Suresh Siddha | 68a8ca5 | 2009-03-16 17:05:04 -0700 | [diff] [blame] | 2437 | unsigned int irr; |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 2438 | struct irq_desc *desc; |
| 2439 | struct irq_cfg *cfg; |
| 2440 | irq = __get_cpu_var(vector_irq)[vector]; |
| 2441 | |
Yinghai Lu | 0b8f1ef | 2008-12-05 18:58:31 -0800 | [diff] [blame] | 2442 | if (irq == -1) |
| 2443 | continue; |
| 2444 | |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 2445 | desc = irq_to_desc(irq); |
| 2446 | if (!desc) |
| 2447 | continue; |
| 2448 | |
| 2449 | cfg = irq_cfg(irq); |
| 2450 | spin_lock(&desc->lock); |
| 2451 | if (!cfg->move_cleanup_count) |
| 2452 | goto unlock; |
| 2453 | |
Mike Travis | 22f65d3 | 2008-12-16 17:33:56 -0800 | [diff] [blame] | 2454 | if (vector == cfg->vector && cpumask_test_cpu(me, cfg->domain)) |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 2455 | goto unlock; |
| 2456 | |
Suresh Siddha | 68a8ca5 | 2009-03-16 17:05:04 -0700 | [diff] [blame] | 2457 | irr = apic_read(APIC_IRR + (vector / 32 * 0x10)); |
| 2458 | /* |
| 2459 | * Check if the vector that needs to be cleanedup is |
| 2460 | * registered at the cpu's IRR. If so, then this is not |
| 2461 | * the best time to clean it up. Lets clean it up in the |
| 2462 | * next attempt by sending another IRQ_MOVE_CLEANUP_VECTOR |
| 2463 | * to myself. |
| 2464 | */ |
| 2465 | if (irr & (1 << (vector % 32))) { |
| 2466 | apic->send_IPI_self(IRQ_MOVE_CLEANUP_VECTOR); |
| 2467 | goto unlock; |
| 2468 | } |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 2469 | __get_cpu_var(vector_irq)[vector] = -1; |
| 2470 | cfg->move_cleanup_count--; |
| 2471 | unlock: |
| 2472 | spin_unlock(&desc->lock); |
| 2473 | } |
| 2474 | |
| 2475 | irq_exit(); |
| 2476 | } |
| 2477 | |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 2478 | static void irq_complete_move(struct irq_desc **descp) |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 2479 | { |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 2480 | struct irq_desc *desc = *descp; |
| 2481 | struct irq_cfg *cfg = desc->chip_data; |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 2482 | unsigned vector, me; |
| 2483 | |
Yinghai Lu | fcef591 | 2009-04-27 17:58:23 -0700 | [diff] [blame] | 2484 | if (likely(!cfg->move_in_progress)) |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 2485 | return; |
| 2486 | |
| 2487 | vector = ~get_irq_regs()->orig_ax; |
| 2488 | me = smp_processor_id(); |
Yinghai Lu | 10b888d | 2009-01-31 14:50:07 -0800 | [diff] [blame] | 2489 | |
Yinghai Lu | fcef591 | 2009-04-27 17:58:23 -0700 | [diff] [blame] | 2490 | if (vector == cfg->vector && cpumask_test_cpu(me, cfg->domain)) |
Mike Travis | 22f65d3 | 2008-12-16 17:33:56 -0800 | [diff] [blame] | 2491 | send_cleanup_vector(cfg); |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 2492 | } |
| 2493 | #else |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 2494 | static inline void irq_complete_move(struct irq_desc **descp) {} |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 2495 | #endif |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 2496 | |
Yinghai Lu | 1d02519 | 2008-08-19 20:50:34 -0700 | [diff] [blame] | 2497 | static void ack_apic_edge(unsigned int irq) |
| 2498 | { |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 2499 | struct irq_desc *desc = irq_to_desc(irq); |
| 2500 | |
| 2501 | irq_complete_move(&desc); |
Yinghai Lu | 1d02519 | 2008-08-19 20:50:34 -0700 | [diff] [blame] | 2502 | move_native_irq(irq); |
| 2503 | ack_APIC_irq(); |
| 2504 | } |
| 2505 | |
Yinghai Lu | 3eb2cce | 2008-08-19 20:50:48 -0700 | [diff] [blame] | 2506 | atomic_t irq_mis_count; |
Yinghai Lu | 3eb2cce | 2008-08-19 20:50:48 -0700 | [diff] [blame] | 2507 | |
Yinghai Lu | 047c8fd | 2008-08-19 20:50:41 -0700 | [diff] [blame] | 2508 | static void ack_apic_level(unsigned int irq) |
| 2509 | { |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 2510 | struct irq_desc *desc = irq_to_desc(irq); |
Yinghai Lu | 3eb2cce | 2008-08-19 20:50:48 -0700 | [diff] [blame] | 2511 | unsigned long v; |
| 2512 | int i; |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 2513 | struct irq_cfg *cfg; |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 2514 | int do_unmask_irq = 0; |
Yinghai Lu | 047c8fd | 2008-08-19 20:50:41 -0700 | [diff] [blame] | 2515 | |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 2516 | irq_complete_move(&desc); |
Yinghai Lu | 047c8fd | 2008-08-19 20:50:41 -0700 | [diff] [blame] | 2517 | #ifdef CONFIG_GENERIC_PENDING_IRQ |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 2518 | /* If we are moving the irq we need to mask it */ |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 2519 | if (unlikely(desc->status & IRQ_MOVE_PENDING)) { |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 2520 | do_unmask_irq = 1; |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 2521 | mask_IO_APIC_irq_desc(desc); |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 2522 | } |
Yinghai Lu | 047c8fd | 2008-08-19 20:50:41 -0700 | [diff] [blame] | 2523 | #endif |
| 2524 | |
Yinghai Lu | 3eb2cce | 2008-08-19 20:50:48 -0700 | [diff] [blame] | 2525 | /* |
Jeremy Fitzhardinge | 916a0fe | 2009-06-08 03:00:22 -0700 | [diff] [blame^] | 2526 | * It appears there is an erratum which affects at least version 0x11 |
| 2527 | * of I/O APIC (that's the 82093AA and cores integrated into various |
| 2528 | * chipsets). Under certain conditions a level-triggered interrupt is |
| 2529 | * erroneously delivered as edge-triggered one but the respective IRR |
| 2530 | * bit gets set nevertheless. As a result the I/O unit expects an EOI |
| 2531 | * message but it will never arrive and further interrupts are blocked |
| 2532 | * from the source. The exact reason is so far unknown, but the |
| 2533 | * phenomenon was observed when two consecutive interrupt requests |
| 2534 | * from a given source get delivered to the same CPU and the source is |
| 2535 | * temporarily disabled in between. |
| 2536 | * |
| 2537 | * A workaround is to simulate an EOI message manually. We achieve it |
| 2538 | * by setting the trigger mode to edge and then to level when the edge |
| 2539 | * trigger mode gets detected in the TMR of a local APIC for a |
| 2540 | * level-triggered interrupt. We mask the source for the time of the |
| 2541 | * operation to prevent an edge-triggered interrupt escaping meanwhile. |
| 2542 | * The idea is from Manfred Spraul. --macro |
| 2543 | */ |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 2544 | cfg = desc->chip_data; |
| 2545 | i = cfg->vector; |
Yinghai Lu | 3eb2cce | 2008-08-19 20:50:48 -0700 | [diff] [blame] | 2546 | v = apic_read(APIC_TMR + ((i & ~0x1f) >> 1)); |
Yinghai Lu | 3eb2cce | 2008-08-19 20:50:48 -0700 | [diff] [blame] | 2547 | |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 2548 | /* |
| 2549 | * We must acknowledge the irq before we move it or the acknowledge will |
| 2550 | * not propagate properly. |
| 2551 | */ |
| 2552 | ack_APIC_irq(); |
Yinghai Lu | 047c8fd | 2008-08-19 20:50:41 -0700 | [diff] [blame] | 2553 | |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 2554 | /* Now we can move and renable the irq */ |
| 2555 | if (unlikely(do_unmask_irq)) { |
| 2556 | /* Only migrate the irq if the ack has been received. |
| 2557 | * |
| 2558 | * On rare occasions the broadcast level triggered ack gets |
| 2559 | * delayed going to ioapics, and if we reprogram the |
| 2560 | * vector while Remote IRR is still set the irq will never |
| 2561 | * fire again. |
| 2562 | * |
| 2563 | * To prevent this scenario we read the Remote IRR bit |
| 2564 | * of the ioapic. This has two effects. |
| 2565 | * - On any sane system the read of the ioapic will |
| 2566 | * flush writes (and acks) going to the ioapic from |
| 2567 | * this cpu. |
| 2568 | * - We get to see if the ACK has actually been delivered. |
| 2569 | * |
| 2570 | * Based on failed experiments of reprogramming the |
| 2571 | * ioapic entry from outside of irq context starting |
| 2572 | * with masking the ioapic entry and then polling until |
| 2573 | * Remote IRR was clear before reprogramming the |
| 2574 | * ioapic I don't trust the Remote IRR bit to be |
| 2575 | * completey accurate. |
| 2576 | * |
| 2577 | * However there appears to be no other way to plug |
| 2578 | * this race, so if the Remote IRR bit is not |
| 2579 | * accurate and is causing problems then it is a hardware bug |
| 2580 | * and you can go talk to the chipset vendor about it. |
| 2581 | */ |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 2582 | cfg = desc->chip_data; |
| 2583 | if (!io_apic_level_ack_pending(cfg)) |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 2584 | move_masked_irq(irq); |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 2585 | unmask_IO_APIC_irq_desc(desc); |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 2586 | } |
Yinghai Lu | 1d02519 | 2008-08-19 20:50:34 -0700 | [diff] [blame] | 2587 | |
Jeremy Fitzhardinge | 916a0fe | 2009-06-08 03:00:22 -0700 | [diff] [blame^] | 2588 | /* Tail end of version 0x11 I/O APIC bug workaround */ |
Yinghai Lu | 1d02519 | 2008-08-19 20:50:34 -0700 | [diff] [blame] | 2589 | if (!(v & (1 << (i & 0x1f)))) { |
| 2590 | atomic_inc(&irq_mis_count); |
| 2591 | spin_lock(&ioapic_lock); |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 2592 | __mask_and_edge_IO_APIC_irq(cfg); |
| 2593 | __unmask_and_level_IO_APIC_irq(cfg); |
Yinghai Lu | 1d02519 | 2008-08-19 20:50:34 -0700 | [diff] [blame] | 2594 | spin_unlock(&ioapic_lock); |
| 2595 | } |
Yinghai Lu | 3eb2cce | 2008-08-19 20:50:48 -0700 | [diff] [blame] | 2596 | } |
Yinghai Lu | 1d02519 | 2008-08-19 20:50:34 -0700 | [diff] [blame] | 2597 | |
Han, Weidong | d0b03bd | 2009-04-03 17:15:50 +0800 | [diff] [blame] | 2598 | #ifdef CONFIG_INTR_REMAP |
Suresh Siddha | 25629d8 | 2009-04-20 13:02:28 -0700 | [diff] [blame] | 2599 | static void __eoi_ioapic_irq(unsigned int irq, struct irq_cfg *cfg) |
| 2600 | { |
| 2601 | int apic, pin; |
| 2602 | struct irq_pin_list *entry; |
| 2603 | |
| 2604 | entry = cfg->irq_2_pin; |
| 2605 | for (;;) { |
| 2606 | |
| 2607 | if (!entry) |
| 2608 | break; |
| 2609 | |
| 2610 | apic = entry->apic; |
| 2611 | pin = entry->pin; |
| 2612 | io_apic_eoi(apic, pin); |
| 2613 | entry = entry->next; |
| 2614 | } |
| 2615 | } |
| 2616 | |
| 2617 | static void |
| 2618 | eoi_ioapic_irq(struct irq_desc *desc) |
| 2619 | { |
| 2620 | struct irq_cfg *cfg; |
| 2621 | unsigned long flags; |
| 2622 | unsigned int irq; |
| 2623 | |
| 2624 | irq = desc->irq; |
| 2625 | cfg = desc->chip_data; |
| 2626 | |
| 2627 | spin_lock_irqsave(&ioapic_lock, flags); |
| 2628 | __eoi_ioapic_irq(irq, cfg); |
| 2629 | spin_unlock_irqrestore(&ioapic_lock, flags); |
| 2630 | } |
| 2631 | |
Han, Weidong | d0b03bd | 2009-04-03 17:15:50 +0800 | [diff] [blame] | 2632 | static void ir_ack_apic_edge(unsigned int irq) |
| 2633 | { |
Weidong Han | 5d0ae2d | 2009-04-17 16:42:13 +0800 | [diff] [blame] | 2634 | ack_APIC_irq(); |
Han, Weidong | d0b03bd | 2009-04-03 17:15:50 +0800 | [diff] [blame] | 2635 | } |
| 2636 | |
| 2637 | static void ir_ack_apic_level(unsigned int irq) |
| 2638 | { |
Weidong Han | 5d0ae2d | 2009-04-17 16:42:13 +0800 | [diff] [blame] | 2639 | struct irq_desc *desc = irq_to_desc(irq); |
| 2640 | |
| 2641 | ack_APIC_irq(); |
| 2642 | eoi_ioapic_irq(desc); |
Han, Weidong | d0b03bd | 2009-04-03 17:15:50 +0800 | [diff] [blame] | 2643 | } |
| 2644 | #endif /* CONFIG_INTR_REMAP */ |
| 2645 | |
Ingo Molnar | f5b9ed7 | 2006-10-04 02:16:26 -0700 | [diff] [blame] | 2646 | static struct irq_chip ioapic_chip __read_mostly = { |
Thomas Gleixner | d6c88a5 | 2008-10-15 15:27:23 +0200 | [diff] [blame] | 2647 | .name = "IO-APIC", |
| 2648 | .startup = startup_ioapic_irq, |
| 2649 | .mask = mask_IO_APIC_irq, |
| 2650 | .unmask = unmask_IO_APIC_irq, |
| 2651 | .ack = ack_apic_edge, |
| 2652 | .eoi = ack_apic_level, |
Ashok Raj | 54d5d42 | 2005-09-06 15:16:15 -0700 | [diff] [blame] | 2653 | #ifdef CONFIG_SMP |
Thomas Gleixner | d6c88a5 | 2008-10-15 15:27:23 +0200 | [diff] [blame] | 2654 | .set_affinity = set_ioapic_affinity_irq, |
Ashok Raj | 54d5d42 | 2005-09-06 15:16:15 -0700 | [diff] [blame] | 2655 | #endif |
Eric W. Biederman | ace80ab | 2006-10-04 02:16:47 -0700 | [diff] [blame] | 2656 | .retrigger = ioapic_retrigger_irq, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2657 | }; |
| 2658 | |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 2659 | static struct irq_chip ir_ioapic_chip __read_mostly = { |
Thomas Gleixner | d6c88a5 | 2008-10-15 15:27:23 +0200 | [diff] [blame] | 2660 | .name = "IR-IO-APIC", |
| 2661 | .startup = startup_ioapic_irq, |
| 2662 | .mask = mask_IO_APIC_irq, |
| 2663 | .unmask = unmask_IO_APIC_irq, |
Jaswinder Singh Rajput | a1e38ca | 2009-03-23 02:11:25 +0530 | [diff] [blame] | 2664 | #ifdef CONFIG_INTR_REMAP |
Han, Weidong | d0b03bd | 2009-04-03 17:15:50 +0800 | [diff] [blame] | 2665 | .ack = ir_ack_apic_edge, |
| 2666 | .eoi = ir_ack_apic_level, |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 2667 | #ifdef CONFIG_SMP |
Thomas Gleixner | d6c88a5 | 2008-10-15 15:27:23 +0200 | [diff] [blame] | 2668 | .set_affinity = set_ir_ioapic_affinity_irq, |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 2669 | #endif |
Jaswinder Singh Rajput | a1e38ca | 2009-03-23 02:11:25 +0530 | [diff] [blame] | 2670 | #endif |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 2671 | .retrigger = ioapic_retrigger_irq, |
| 2672 | }; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2673 | |
| 2674 | static inline void init_IO_APIC_traps(void) |
| 2675 | { |
| 2676 | int irq; |
Yinghai Lu | 08678b0 | 2008-08-19 20:50:05 -0700 | [diff] [blame] | 2677 | struct irq_desc *desc; |
Yinghai Lu | da51a82 | 2008-08-19 20:50:25 -0700 | [diff] [blame] | 2678 | struct irq_cfg *cfg; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2679 | |
| 2680 | /* |
| 2681 | * NOTE! The local APIC isn't very good at handling |
| 2682 | * multiple interrupts at the same interrupt level. |
| 2683 | * As the interrupt level is determined by taking the |
| 2684 | * vector number and shifting that right by 4, we |
| 2685 | * want to spread these out a bit so that they don't |
| 2686 | * all fall in the same interrupt level. |
| 2687 | * |
| 2688 | * Also, we've got to be careful not to trash gate |
| 2689 | * 0x80, because int 0x80 is hm, kind of importantish. ;) |
| 2690 | */ |
Yinghai Lu | 0b8f1ef | 2008-12-05 18:58:31 -0800 | [diff] [blame] | 2691 | for_each_irq_desc(irq, desc) { |
Yinghai Lu | 0b8f1ef | 2008-12-05 18:58:31 -0800 | [diff] [blame] | 2692 | cfg = desc->chip_data; |
| 2693 | if (IO_APIC_IRQ(irq) && cfg && !cfg->vector) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2694 | /* |
| 2695 | * Hmm.. We don't have an entry for this, |
| 2696 | * so default to an old-fashioned 8259 |
| 2697 | * interrupt if we can.. |
| 2698 | */ |
Yinghai Lu | 99d093d | 2008-12-05 18:58:32 -0800 | [diff] [blame] | 2699 | if (irq < NR_IRQS_LEGACY) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2700 | make_8259A_irq(irq); |
Yinghai Lu | 0b8f1ef | 2008-12-05 18:58:31 -0800 | [diff] [blame] | 2701 | else |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2702 | /* Strange. Oh, well.. */ |
Yinghai Lu | 08678b0 | 2008-08-19 20:50:05 -0700 | [diff] [blame] | 2703 | desc->chip = &no_irq_chip; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2704 | } |
| 2705 | } |
| 2706 | } |
| 2707 | |
Ingo Molnar | f5b9ed7 | 2006-10-04 02:16:26 -0700 | [diff] [blame] | 2708 | /* |
| 2709 | * The local APIC irq-chip implementation: |
| 2710 | */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2711 | |
Paolo Ciarrocchi | 3606244 | 2008-06-08 13:07:18 +0200 | [diff] [blame] | 2712 | static void mask_lapic_irq(unsigned int irq) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2713 | { |
| 2714 | unsigned long v; |
| 2715 | |
| 2716 | v = apic_read(APIC_LVT0); |
Maciej W. Rozycki | 593f4a7 | 2008-07-16 19:15:30 +0100 | [diff] [blame] | 2717 | apic_write(APIC_LVT0, v | APIC_LVT_MASKED); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2718 | } |
| 2719 | |
Paolo Ciarrocchi | 3606244 | 2008-06-08 13:07:18 +0200 | [diff] [blame] | 2720 | static void unmask_lapic_irq(unsigned int irq) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2721 | { |
Ingo Molnar | f5b9ed7 | 2006-10-04 02:16:26 -0700 | [diff] [blame] | 2722 | unsigned long v; |
| 2723 | |
| 2724 | v = apic_read(APIC_LVT0); |
Maciej W. Rozycki | 593f4a7 | 2008-07-16 19:15:30 +0100 | [diff] [blame] | 2725 | apic_write(APIC_LVT0, v & ~APIC_LVT_MASKED); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2726 | } |
| 2727 | |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 2728 | static void ack_lapic_irq(unsigned int irq) |
Yinghai Lu | 1d02519 | 2008-08-19 20:50:34 -0700 | [diff] [blame] | 2729 | { |
| 2730 | ack_APIC_irq(); |
| 2731 | } |
| 2732 | |
Ingo Molnar | f5b9ed7 | 2006-10-04 02:16:26 -0700 | [diff] [blame] | 2733 | static struct irq_chip lapic_chip __read_mostly = { |
Maciej W. Rozycki | 9a1c619 | 2008-05-27 21:19:09 +0100 | [diff] [blame] | 2734 | .name = "local-APIC", |
Ingo Molnar | f5b9ed7 | 2006-10-04 02:16:26 -0700 | [diff] [blame] | 2735 | .mask = mask_lapic_irq, |
| 2736 | .unmask = unmask_lapic_irq, |
Maciej W. Rozycki | c88ac1d | 2008-07-11 19:35:17 +0100 | [diff] [blame] | 2737 | .ack = ack_lapic_irq, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2738 | }; |
| 2739 | |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 2740 | static void lapic_register_intr(int irq, struct irq_desc *desc) |
Maciej W. Rozycki | c88ac1d | 2008-07-11 19:35:17 +0100 | [diff] [blame] | 2741 | { |
Yinghai Lu | 08678b0 | 2008-08-19 20:50:05 -0700 | [diff] [blame] | 2742 | desc->status &= ~IRQ_LEVEL; |
Maciej W. Rozycki | c88ac1d | 2008-07-11 19:35:17 +0100 | [diff] [blame] | 2743 | set_irq_chip_and_handler_name(irq, &lapic_chip, handle_edge_irq, |
| 2744 | "edge"); |
Maciej W. Rozycki | c88ac1d | 2008-07-11 19:35:17 +0100 | [diff] [blame] | 2745 | } |
| 2746 | |
Jan Beulich | e942710 | 2008-01-30 13:31:24 +0100 | [diff] [blame] | 2747 | static void __init setup_nmi(void) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2748 | { |
| 2749 | /* |
Paolo Ciarrocchi | 3606244 | 2008-06-08 13:07:18 +0200 | [diff] [blame] | 2750 | * Dirty trick to enable the NMI watchdog ... |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2751 | * We put the 8259A master into AEOI mode and |
| 2752 | * unmask on all local APICs LVT0 as NMI. |
| 2753 | * |
| 2754 | * The idea to use the 8259A in AEOI mode ('8259A Virtual Wire') |
| 2755 | * is from Maciej W. Rozycki - so we do not have to EOI from |
| 2756 | * the NMI handler or the timer interrupt. |
Paolo Ciarrocchi | 3606244 | 2008-06-08 13:07:18 +0200 | [diff] [blame] | 2757 | */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2758 | apic_printk(APIC_VERBOSE, KERN_INFO "activating NMI Watchdog ..."); |
| 2759 | |
Jan Beulich | e942710 | 2008-01-30 13:31:24 +0100 | [diff] [blame] | 2760 | enable_NMI_through_LVT0(); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2761 | |
| 2762 | apic_printk(APIC_VERBOSE, " done.\n"); |
| 2763 | } |
| 2764 | |
| 2765 | /* |
| 2766 | * This looks a bit hackish but it's about the only one way of sending |
| 2767 | * a few INTA cycles to 8259As and any associated glue logic. ICR does |
| 2768 | * not support the ExtINT mode, unfortunately. We need to send these |
| 2769 | * cycles as some i82489DX-based boards have glue logic that keeps the |
| 2770 | * 8259A interrupt line asserted until INTA. --macro |
| 2771 | */ |
Jacek Luczak | 28acf28 | 2008-04-12 17:41:12 +0200 | [diff] [blame] | 2772 | static inline void __init unlock_ExtINT_logic(void) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2773 | { |
Eric W. Biederman | fcfd636 | 2005-10-30 14:59:39 -0800 | [diff] [blame] | 2774 | int apic, pin, i; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2775 | struct IO_APIC_route_entry entry0, entry1; |
| 2776 | unsigned char save_control, save_freq_select; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2777 | |
Eric W. Biederman | fcfd636 | 2005-10-30 14:59:39 -0800 | [diff] [blame] | 2778 | pin = find_isa_irq_pin(8, mp_INT); |
Adrian Bunk | 956fb53 | 2006-12-07 02:14:11 +0100 | [diff] [blame] | 2779 | if (pin == -1) { |
| 2780 | WARN_ON_ONCE(1); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2781 | return; |
Adrian Bunk | 956fb53 | 2006-12-07 02:14:11 +0100 | [diff] [blame] | 2782 | } |
| 2783 | apic = find_isa_irq_apic(8, mp_INT); |
| 2784 | if (apic == -1) { |
| 2785 | WARN_ON_ONCE(1); |
| 2786 | return; |
| 2787 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2788 | |
Andi Kleen | cf4c6a2 | 2006-09-26 10:52:30 +0200 | [diff] [blame] | 2789 | entry0 = ioapic_read_entry(apic, pin); |
Eric W. Biederman | fcfd636 | 2005-10-30 14:59:39 -0800 | [diff] [blame] | 2790 | clear_IO_APIC_pin(apic, pin); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2791 | |
| 2792 | memset(&entry1, 0, sizeof(entry1)); |
| 2793 | |
| 2794 | entry1.dest_mode = 0; /* physical delivery */ |
| 2795 | entry1.mask = 0; /* unmask IRQ now */ |
Yinghai Lu | d83e94a | 2008-08-19 20:50:33 -0700 | [diff] [blame] | 2796 | entry1.dest = hard_smp_processor_id(); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2797 | entry1.delivery_mode = dest_ExtINT; |
| 2798 | entry1.polarity = entry0.polarity; |
| 2799 | entry1.trigger = 0; |
| 2800 | entry1.vector = 0; |
| 2801 | |
Andi Kleen | cf4c6a2 | 2006-09-26 10:52:30 +0200 | [diff] [blame] | 2802 | ioapic_write_entry(apic, pin, entry1); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2803 | |
| 2804 | save_control = CMOS_READ(RTC_CONTROL); |
| 2805 | save_freq_select = CMOS_READ(RTC_FREQ_SELECT); |
| 2806 | CMOS_WRITE((save_freq_select & ~RTC_RATE_SELECT) | 0x6, |
| 2807 | RTC_FREQ_SELECT); |
| 2808 | CMOS_WRITE(save_control | RTC_PIE, RTC_CONTROL); |
| 2809 | |
| 2810 | i = 100; |
| 2811 | while (i-- > 0) { |
| 2812 | mdelay(10); |
| 2813 | if ((CMOS_READ(RTC_INTR_FLAGS) & RTC_PF) == RTC_PF) |
| 2814 | i -= 10; |
| 2815 | } |
| 2816 | |
| 2817 | CMOS_WRITE(save_control, RTC_CONTROL); |
| 2818 | CMOS_WRITE(save_freq_select, RTC_FREQ_SELECT); |
Eric W. Biederman | fcfd636 | 2005-10-30 14:59:39 -0800 | [diff] [blame] | 2819 | clear_IO_APIC_pin(apic, pin); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2820 | |
Andi Kleen | cf4c6a2 | 2006-09-26 10:52:30 +0200 | [diff] [blame] | 2821 | ioapic_write_entry(apic, pin, entry0); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2822 | } |
| 2823 | |
Yinghai Lu | efa2559 | 2008-08-19 20:50:36 -0700 | [diff] [blame] | 2824 | static int disable_timer_pin_1 __initdata; |
Yinghai Lu | 047c8fd | 2008-08-19 20:50:41 -0700 | [diff] [blame] | 2825 | /* Actually the next is obsolete, but keep it for paranoid reasons -AK */ |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 2826 | static int __init disable_timer_pin_setup(char *arg) |
Yinghai Lu | efa2559 | 2008-08-19 20:50:36 -0700 | [diff] [blame] | 2827 | { |
| 2828 | disable_timer_pin_1 = 1; |
| 2829 | return 0; |
| 2830 | } |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 2831 | early_param("disable_timer_pin_1", disable_timer_pin_setup); |
Yinghai Lu | efa2559 | 2008-08-19 20:50:36 -0700 | [diff] [blame] | 2832 | |
| 2833 | int timer_through_8259 __initdata; |
| 2834 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2835 | /* |
| 2836 | * This code may look a bit paranoid, but it's supposed to cooperate with |
| 2837 | * a wide range of boards and BIOS bugs. Fortunately only the timer IRQ |
| 2838 | * is so screwy. Thanks to Brian Perkins for testing/hacking this beast |
| 2839 | * fanatically on his truly buggy board. |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 2840 | * |
| 2841 | * FIXME: really need to revamp this for all platforms. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2842 | */ |
Zachary Amsden | 8542b20 | 2006-12-07 02:14:09 +0100 | [diff] [blame] | 2843 | static inline void __init check_timer(void) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2844 | { |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 2845 | struct irq_desc *desc = irq_to_desc(0); |
| 2846 | struct irq_cfg *cfg = desc->chip_data; |
Yinghai Lu | 85ac16d | 2009-04-27 18:00:38 -0700 | [diff] [blame] | 2847 | int node = cpu_to_node(boot_cpu_id); |
Eric W. Biederman | fcfd636 | 2005-10-30 14:59:39 -0800 | [diff] [blame] | 2848 | int apic1, pin1, apic2, pin2; |
Ingo Molnar | 4aae070 | 2007-12-18 18:05:58 +0100 | [diff] [blame] | 2849 | unsigned long flags; |
Yinghai Lu | 047c8fd | 2008-08-19 20:50:41 -0700 | [diff] [blame] | 2850 | int no_pin1 = 0; |
Ingo Molnar | 4aae070 | 2007-12-18 18:05:58 +0100 | [diff] [blame] | 2851 | |
| 2852 | local_irq_save(flags); |
Maciej W. Rozycki | d4d25de | 2007-11-26 20:42:19 +0100 | [diff] [blame] | 2853 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2854 | /* |
| 2855 | * get/set the timer IRQ vector: |
| 2856 | */ |
| 2857 | disable_8259A_irq(0); |
Ingo Molnar | fe402e1 | 2009-01-28 04:32:51 +0100 | [diff] [blame] | 2858 | assign_irq_vector(0, cfg, apic->target_cpus()); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2859 | |
| 2860 | /* |
Maciej W. Rozycki | d11d579 | 2008-05-21 22:09:11 +0100 | [diff] [blame] | 2861 | * As IRQ0 is to be enabled in the 8259A, the virtual |
| 2862 | * wire has to be disabled in the local APIC. Also |
| 2863 | * timer interrupts need to be acknowledged manually in |
| 2864 | * the 8259A for the i82489DX when using the NMI |
| 2865 | * watchdog as that APIC treats NMIs as level-triggered. |
| 2866 | * The AEOI mode will finish them in the 8259A |
| 2867 | * automatically. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2868 | */ |
Maciej W. Rozycki | 593f4a7 | 2008-07-16 19:15:30 +0100 | [diff] [blame] | 2869 | apic_write(APIC_LVT0, APIC_LVT_MASKED | APIC_DM_EXTINT); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2870 | init_8259A(1); |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 2871 | #ifdef CONFIG_X86_32 |
Yinghai Lu | f72dcca | 2009-02-08 16:18:03 -0800 | [diff] [blame] | 2872 | { |
| 2873 | unsigned int ver; |
| 2874 | |
| 2875 | ver = apic_read(APIC_LVR); |
| 2876 | ver = GET_APIC_VERSION(ver); |
| 2877 | timer_ack = (nmi_watchdog == NMI_IO_APIC && !APIC_INTEGRATED(ver)); |
| 2878 | } |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 2879 | #endif |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2880 | |
Eric W. Biederman | fcfd636 | 2005-10-30 14:59:39 -0800 | [diff] [blame] | 2881 | pin1 = find_isa_irq_pin(0, mp_INT); |
| 2882 | apic1 = find_isa_irq_apic(0, mp_INT); |
| 2883 | pin2 = ioapic_i8259.pin; |
| 2884 | apic2 = ioapic_i8259.apic; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2885 | |
Maciej W. Rozycki | 49a66a0b | 2008-07-14 19:08:13 +0100 | [diff] [blame] | 2886 | apic_printk(APIC_QUIET, KERN_INFO "..TIMER: vector=0x%02X " |
| 2887 | "apic1=%d pin1=%d apic2=%d pin2=%d\n", |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 2888 | cfg->vector, apic1, pin1, apic2, pin2); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2889 | |
Maciej W. Rozycki | 691874f | 2008-05-27 21:19:51 +0100 | [diff] [blame] | 2890 | /* |
| 2891 | * Some BIOS writers are clueless and report the ExtINTA |
| 2892 | * I/O APIC input from the cascaded 8259A as the timer |
| 2893 | * interrupt input. So just in case, if only one pin |
| 2894 | * was found above, try it both directly and through the |
| 2895 | * 8259A. |
| 2896 | */ |
| 2897 | if (pin1 == -1) { |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 2898 | if (intr_remapping_enabled) |
| 2899 | panic("BIOS bug: timer not connected to IO-APIC"); |
Maciej W. Rozycki | 691874f | 2008-05-27 21:19:51 +0100 | [diff] [blame] | 2900 | pin1 = pin2; |
| 2901 | apic1 = apic2; |
| 2902 | no_pin1 = 1; |
| 2903 | } else if (pin2 == -1) { |
| 2904 | pin2 = pin1; |
| 2905 | apic2 = apic1; |
| 2906 | } |
| 2907 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2908 | if (pin1 != -1) { |
| 2909 | /* |
| 2910 | * Ok, does IRQ0 through the IOAPIC work? |
| 2911 | */ |
Maciej W. Rozycki | 691874f | 2008-05-27 21:19:51 +0100 | [diff] [blame] | 2912 | if (no_pin1) { |
Yinghai Lu | 85ac16d | 2009-04-27 18:00:38 -0700 | [diff] [blame] | 2913 | add_pin_to_irq_node(cfg, node, apic1, pin1); |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 2914 | setup_timer_IRQ0_pin(apic1, pin1, cfg->vector); |
Yinghai Lu | f72dcca | 2009-02-08 16:18:03 -0800 | [diff] [blame] | 2915 | } else { |
| 2916 | /* for edge trigger, setup_IO_APIC_irq already |
| 2917 | * leave it unmasked. |
| 2918 | * so only need to unmask if it is level-trigger |
| 2919 | * do we really have level trigger timer? |
| 2920 | */ |
| 2921 | int idx; |
| 2922 | idx = find_irq_entry(apic1, pin1, mp_INT); |
| 2923 | if (idx != -1 && irq_trigger(idx)) |
| 2924 | unmask_IO_APIC_irq_desc(desc); |
Maciej W. Rozycki | 691874f | 2008-05-27 21:19:51 +0100 | [diff] [blame] | 2925 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2926 | if (timer_irq_works()) { |
| 2927 | if (nmi_watchdog == NMI_IO_APIC) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2928 | setup_nmi(); |
| 2929 | enable_8259A_irq(0); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2930 | } |
Chuck Ebbert | 66759a0 | 2005-09-12 18:49:25 +0200 | [diff] [blame] | 2931 | if (disable_timer_pin_1 > 0) |
| 2932 | clear_IO_APIC_pin(0, pin1); |
Ingo Molnar | 4aae070 | 2007-12-18 18:05:58 +0100 | [diff] [blame] | 2933 | goto out; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2934 | } |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 2935 | if (intr_remapping_enabled) |
| 2936 | panic("timer doesn't work through Interrupt-remapped IO-APIC"); |
Yinghai Lu | f72dcca | 2009-02-08 16:18:03 -0800 | [diff] [blame] | 2937 | local_irq_disable(); |
Eric W. Biederman | fcfd636 | 2005-10-30 14:59:39 -0800 | [diff] [blame] | 2938 | clear_IO_APIC_pin(apic1, pin1); |
Maciej W. Rozycki | 691874f | 2008-05-27 21:19:51 +0100 | [diff] [blame] | 2939 | if (!no_pin1) |
Maciej W. Rozycki | 49a66a0b | 2008-07-14 19:08:13 +0100 | [diff] [blame] | 2940 | apic_printk(APIC_QUIET, KERN_ERR "..MP-BIOS bug: " |
| 2941 | "8254 timer not connected to IO-APIC\n"); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2942 | |
Maciej W. Rozycki | 49a66a0b | 2008-07-14 19:08:13 +0100 | [diff] [blame] | 2943 | apic_printk(APIC_QUIET, KERN_INFO "...trying to set up timer " |
| 2944 | "(IRQ0) through the 8259A ...\n"); |
| 2945 | apic_printk(APIC_QUIET, KERN_INFO |
| 2946 | "..... (found apic %d pin %d) ...\n", apic2, pin2); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2947 | /* |
| 2948 | * legacy devices should be connected to IO APIC #0 |
| 2949 | */ |
Yinghai Lu | 85ac16d | 2009-04-27 18:00:38 -0700 | [diff] [blame] | 2950 | replace_pin_at_irq_node(cfg, node, apic1, pin1, apic2, pin2); |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 2951 | setup_timer_IRQ0_pin(apic2, pin2, cfg->vector); |
Maciej W. Rozycki | ecd2947 | 2008-05-21 22:09:19 +0100 | [diff] [blame] | 2952 | enable_8259A_irq(0); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2953 | if (timer_irq_works()) { |
Maciej W. Rozycki | 49a66a0b | 2008-07-14 19:08:13 +0100 | [diff] [blame] | 2954 | apic_printk(APIC_QUIET, KERN_INFO "....... works.\n"); |
Maciej W. Rozycki | 35542c5 | 2008-05-21 22:10:22 +0100 | [diff] [blame] | 2955 | timer_through_8259 = 1; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2956 | if (nmi_watchdog == NMI_IO_APIC) { |
Maciej W. Rozycki | 60134eb | 2008-05-21 22:09:34 +0100 | [diff] [blame] | 2957 | disable_8259A_irq(0); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2958 | setup_nmi(); |
Maciej W. Rozycki | 60134eb | 2008-05-21 22:09:34 +0100 | [diff] [blame] | 2959 | enable_8259A_irq(0); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2960 | } |
Ingo Molnar | 4aae070 | 2007-12-18 18:05:58 +0100 | [diff] [blame] | 2961 | goto out; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2962 | } |
| 2963 | /* |
| 2964 | * Cleanup, just in case ... |
| 2965 | */ |
Yinghai Lu | f72dcca | 2009-02-08 16:18:03 -0800 | [diff] [blame] | 2966 | local_irq_disable(); |
Maciej W. Rozycki | ecd2947 | 2008-05-21 22:09:19 +0100 | [diff] [blame] | 2967 | disable_8259A_irq(0); |
Eric W. Biederman | fcfd636 | 2005-10-30 14:59:39 -0800 | [diff] [blame] | 2968 | clear_IO_APIC_pin(apic2, pin2); |
Maciej W. Rozycki | 49a66a0b | 2008-07-14 19:08:13 +0100 | [diff] [blame] | 2969 | apic_printk(APIC_QUIET, KERN_INFO "....... failed.\n"); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2970 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2971 | |
| 2972 | if (nmi_watchdog == NMI_IO_APIC) { |
Maciej W. Rozycki | 49a66a0b | 2008-07-14 19:08:13 +0100 | [diff] [blame] | 2973 | apic_printk(APIC_QUIET, KERN_WARNING "timer doesn't work " |
| 2974 | "through the IO-APIC - disabling NMI Watchdog!\n"); |
Cyrill Gorcunov | 067fa0f | 2008-05-29 22:32:30 +0400 | [diff] [blame] | 2975 | nmi_watchdog = NMI_NONE; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2976 | } |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 2977 | #ifdef CONFIG_X86_32 |
Maciej W. Rozycki | d11d579 | 2008-05-21 22:09:11 +0100 | [diff] [blame] | 2978 | timer_ack = 0; |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 2979 | #endif |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2980 | |
Maciej W. Rozycki | 49a66a0b | 2008-07-14 19:08:13 +0100 | [diff] [blame] | 2981 | apic_printk(APIC_QUIET, KERN_INFO |
| 2982 | "...trying to set up timer as Virtual Wire IRQ...\n"); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2983 | |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 2984 | lapic_register_intr(0, desc); |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 2985 | apic_write(APIC_LVT0, APIC_DM_FIXED | cfg->vector); /* Fixed mode */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2986 | enable_8259A_irq(0); |
| 2987 | |
| 2988 | if (timer_irq_works()) { |
Maciej W. Rozycki | 49a66a0b | 2008-07-14 19:08:13 +0100 | [diff] [blame] | 2989 | apic_printk(APIC_QUIET, KERN_INFO "..... works.\n"); |
Ingo Molnar | 4aae070 | 2007-12-18 18:05:58 +0100 | [diff] [blame] | 2990 | goto out; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2991 | } |
Yinghai Lu | f72dcca | 2009-02-08 16:18:03 -0800 | [diff] [blame] | 2992 | local_irq_disable(); |
Maciej W. Rozycki | e67465f | 2008-05-21 22:09:26 +0100 | [diff] [blame] | 2993 | disable_8259A_irq(0); |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 2994 | apic_write(APIC_LVT0, APIC_LVT_MASKED | APIC_DM_FIXED | cfg->vector); |
Maciej W. Rozycki | 49a66a0b | 2008-07-14 19:08:13 +0100 | [diff] [blame] | 2995 | apic_printk(APIC_QUIET, KERN_INFO "..... failed.\n"); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2996 | |
Maciej W. Rozycki | 49a66a0b | 2008-07-14 19:08:13 +0100 | [diff] [blame] | 2997 | apic_printk(APIC_QUIET, KERN_INFO |
| 2998 | "...trying to set up timer as ExtINT IRQ...\n"); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2999 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3000 | init_8259A(0); |
| 3001 | make_8259A_irq(0); |
Maciej W. Rozycki | 593f4a7 | 2008-07-16 19:15:30 +0100 | [diff] [blame] | 3002 | apic_write(APIC_LVT0, APIC_DM_EXTINT); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3003 | |
| 3004 | unlock_ExtINT_logic(); |
| 3005 | |
| 3006 | if (timer_irq_works()) { |
Maciej W. Rozycki | 49a66a0b | 2008-07-14 19:08:13 +0100 | [diff] [blame] | 3007 | apic_printk(APIC_QUIET, KERN_INFO "..... works.\n"); |
Ingo Molnar | 4aae070 | 2007-12-18 18:05:58 +0100 | [diff] [blame] | 3008 | goto out; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3009 | } |
Yinghai Lu | f72dcca | 2009-02-08 16:18:03 -0800 | [diff] [blame] | 3010 | local_irq_disable(); |
Maciej W. Rozycki | 49a66a0b | 2008-07-14 19:08:13 +0100 | [diff] [blame] | 3011 | apic_printk(APIC_QUIET, KERN_INFO "..... failed :(.\n"); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3012 | panic("IO-APIC + timer doesn't work! Boot with apic=debug and send a " |
Maciej W. Rozycki | 49a66a0b | 2008-07-14 19:08:13 +0100 | [diff] [blame] | 3013 | "report. Then try booting with the 'noapic' option.\n"); |
Ingo Molnar | 4aae070 | 2007-12-18 18:05:58 +0100 | [diff] [blame] | 3014 | out: |
| 3015 | local_irq_restore(flags); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3016 | } |
| 3017 | |
| 3018 | /* |
Maciej W. Rozycki | af17478 | 2008-07-11 19:35:23 +0100 | [diff] [blame] | 3019 | * Traditionally ISA IRQ2 is the cascade IRQ, and is not available |
| 3020 | * to devices. However there may be an I/O APIC pin available for |
| 3021 | * this interrupt regardless. The pin may be left unconnected, but |
| 3022 | * typically it will be reused as an ExtINT cascade interrupt for |
| 3023 | * the master 8259A. In the MPS case such a pin will normally be |
| 3024 | * reported as an ExtINT interrupt in the MP table. With ACPI |
| 3025 | * there is no provision for ExtINT interrupts, and in the absence |
| 3026 | * of an override it would be treated as an ordinary ISA I/O APIC |
| 3027 | * interrupt, that is edge-triggered and unmasked by default. We |
| 3028 | * used to do this, but it caused problems on some systems because |
| 3029 | * of the NMI watchdog and sometimes IRQ0 of the 8254 timer using |
| 3030 | * the same ExtINT cascade interrupt to drive the local APIC of the |
| 3031 | * bootstrap processor. Therefore we refrain from routing IRQ2 to |
| 3032 | * the I/O APIC in all cases now. No actual device should request |
| 3033 | * it anyway. --macro |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3034 | */ |
| 3035 | #define PIC_IRQS (1 << PIC_CASCADE_IR) |
| 3036 | |
| 3037 | void __init setup_IO_APIC(void) |
| 3038 | { |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 3039 | |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 3040 | /* |
| 3041 | * calling enable_IO_APIC() is moved to setup_local_APIC for BP |
| 3042 | */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3043 | |
Maciej W. Rozycki | af17478 | 2008-07-11 19:35:23 +0100 | [diff] [blame] | 3044 | io_apic_irqs = ~PIC_IRQS; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3045 | |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 3046 | apic_printk(APIC_VERBOSE, "ENABLING IO-APIC IRQs\n"); |
Thomas Gleixner | d6c88a5 | 2008-10-15 15:27:23 +0200 | [diff] [blame] | 3047 | /* |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 3048 | * Set up IO-APIC IRQ routing. |
| 3049 | */ |
| 3050 | #ifdef CONFIG_X86_32 |
Thomas Gleixner | d6c88a5 | 2008-10-15 15:27:23 +0200 | [diff] [blame] | 3051 | if (!acpi_ioapic) |
| 3052 | setup_ioapic_ids_from_mpc(); |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 3053 | #endif |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3054 | sync_Arb_IDs(); |
| 3055 | setup_IO_APIC_irqs(); |
| 3056 | init_IO_APIC_traps(); |
Linus Torvalds | 1e4c85f | 2005-10-31 19:16:17 -0800 | [diff] [blame] | 3057 | check_timer(); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3058 | } |
| 3059 | |
| 3060 | /* |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 3061 | * Called after all the initialization is done. If we didnt find any |
| 3062 | * APIC bugs then we can allow the modify fast path |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3063 | */ |
Paolo Ciarrocchi | 3606244 | 2008-06-08 13:07:18 +0200 | [diff] [blame] | 3064 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3065 | static int __init io_apic_bug_finalize(void) |
| 3066 | { |
Thomas Gleixner | d6c88a5 | 2008-10-15 15:27:23 +0200 | [diff] [blame] | 3067 | if (sis_apic_bug == -1) |
| 3068 | sis_apic_bug = 0; |
| 3069 | return 0; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3070 | } |
| 3071 | |
| 3072 | late_initcall(io_apic_bug_finalize); |
| 3073 | |
| 3074 | struct sysfs_ioapic_data { |
| 3075 | struct sys_device dev; |
| 3076 | struct IO_APIC_route_entry entry[0]; |
| 3077 | }; |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 3078 | static struct sysfs_ioapic_data * mp_ioapic_data[MAX_IO_APICS]; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3079 | |
Pavel Machek | 438510f | 2005-04-16 15:25:24 -0700 | [diff] [blame] | 3080 | static int ioapic_suspend(struct sys_device *dev, pm_message_t state) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3081 | { |
| 3082 | struct IO_APIC_route_entry *entry; |
| 3083 | struct sysfs_ioapic_data *data; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3084 | int i; |
Paolo Ciarrocchi | 3606244 | 2008-06-08 13:07:18 +0200 | [diff] [blame] | 3085 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3086 | data = container_of(dev, struct sysfs_ioapic_data, dev); |
| 3087 | entry = data->entry; |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 3088 | for (i = 0; i < nr_ioapic_registers[dev->id]; i ++, entry ++ ) |
| 3089 | *entry = ioapic_read_entry(dev->id, i); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3090 | |
| 3091 | return 0; |
| 3092 | } |
| 3093 | |
| 3094 | static int ioapic_resume(struct sys_device *dev) |
| 3095 | { |
| 3096 | struct IO_APIC_route_entry *entry; |
| 3097 | struct sysfs_ioapic_data *data; |
| 3098 | unsigned long flags; |
| 3099 | union IO_APIC_reg_00 reg_00; |
| 3100 | int i; |
Paolo Ciarrocchi | 3606244 | 2008-06-08 13:07:18 +0200 | [diff] [blame] | 3101 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3102 | data = container_of(dev, struct sysfs_ioapic_data, dev); |
| 3103 | entry = data->entry; |
| 3104 | |
| 3105 | spin_lock_irqsave(&ioapic_lock, flags); |
| 3106 | reg_00.raw = io_apic_read(dev->id, 0); |
Jaswinder Singh Rajput | b5ba7e6 | 2009-01-12 17:46:17 +0530 | [diff] [blame] | 3107 | if (reg_00.bits.ID != mp_ioapics[dev->id].apicid) { |
| 3108 | reg_00.bits.ID = mp_ioapics[dev->id].apicid; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3109 | io_apic_write(dev->id, 0, reg_00.raw); |
| 3110 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3111 | spin_unlock_irqrestore(&ioapic_lock, flags); |
Paolo Ciarrocchi | 3606244 | 2008-06-08 13:07:18 +0200 | [diff] [blame] | 3112 | for (i = 0; i < nr_ioapic_registers[dev->id]; i++) |
Andi Kleen | cf4c6a2 | 2006-09-26 10:52:30 +0200 | [diff] [blame] | 3113 | ioapic_write_entry(dev->id, i, entry[i]); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3114 | |
| 3115 | return 0; |
| 3116 | } |
| 3117 | |
| 3118 | static struct sysdev_class ioapic_sysdev_class = { |
Kay Sievers | af5ca3f | 2007-12-20 02:09:39 +0100 | [diff] [blame] | 3119 | .name = "ioapic", |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3120 | .suspend = ioapic_suspend, |
| 3121 | .resume = ioapic_resume, |
| 3122 | }; |
| 3123 | |
| 3124 | static int __init ioapic_init_sysfs(void) |
| 3125 | { |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 3126 | struct sys_device * dev; |
| 3127 | int i, size, error; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3128 | |
| 3129 | error = sysdev_class_register(&ioapic_sysdev_class); |
| 3130 | if (error) |
| 3131 | return error; |
| 3132 | |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 3133 | for (i = 0; i < nr_ioapics; i++ ) { |
Paolo Ciarrocchi | 3606244 | 2008-06-08 13:07:18 +0200 | [diff] [blame] | 3134 | size = sizeof(struct sys_device) + nr_ioapic_registers[i] |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3135 | * sizeof(struct IO_APIC_route_entry); |
Christophe Jaillet | 25556c1 | 2008-06-22 22:13:48 +0200 | [diff] [blame] | 3136 | mp_ioapic_data[i] = kzalloc(size, GFP_KERNEL); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3137 | if (!mp_ioapic_data[i]) { |
| 3138 | printk(KERN_ERR "Can't suspend/resume IOAPIC %d\n", i); |
| 3139 | continue; |
| 3140 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3141 | dev = &mp_ioapic_data[i]->dev; |
Paolo Ciarrocchi | 3606244 | 2008-06-08 13:07:18 +0200 | [diff] [blame] | 3142 | dev->id = i; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3143 | dev->cls = &ioapic_sysdev_class; |
| 3144 | error = sysdev_register(dev); |
| 3145 | if (error) { |
| 3146 | kfree(mp_ioapic_data[i]); |
| 3147 | mp_ioapic_data[i] = NULL; |
| 3148 | printk(KERN_ERR "Can't suspend/resume IOAPIC %d\n", i); |
| 3149 | continue; |
| 3150 | } |
| 3151 | } |
| 3152 | |
| 3153 | return 0; |
| 3154 | } |
| 3155 | |
| 3156 | device_initcall(ioapic_init_sysfs); |
| 3157 | |
Yinghai Lu | abcaa2b | 2009-02-08 16:18:03 -0800 | [diff] [blame] | 3158 | static int nr_irqs_gsi = NR_IRQS_LEGACY; |
Eric W. Biederman | 3fc471e | 2006-10-04 02:16:39 -0700 | [diff] [blame] | 3159 | /* |
Eric W. Biederman | 95d7788 | 2006-10-04 02:17:01 -0700 | [diff] [blame] | 3160 | * Dynamic irq allocate and deallocation |
Eric W. Biederman | 3fc471e | 2006-10-04 02:16:39 -0700 | [diff] [blame] | 3161 | */ |
Yinghai Lu | d047f53a | 2009-04-27 18:02:23 -0700 | [diff] [blame] | 3162 | unsigned int create_irq_nr(unsigned int irq_want, int node) |
Eric W. Biederman | 3fc471e | 2006-10-04 02:16:39 -0700 | [diff] [blame] | 3163 | { |
Eric W. Biederman | ace80ab | 2006-10-04 02:16:47 -0700 | [diff] [blame] | 3164 | /* Allocate an unused irq */ |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 3165 | unsigned int irq; |
| 3166 | unsigned int new; |
Eric W. Biederman | 3fc471e | 2006-10-04 02:16:39 -0700 | [diff] [blame] | 3167 | unsigned long flags; |
Yinghai Lu | 0b8f1ef | 2008-12-05 18:58:31 -0800 | [diff] [blame] | 3168 | struct irq_cfg *cfg_new = NULL; |
Yinghai Lu | 0b8f1ef | 2008-12-05 18:58:31 -0800 | [diff] [blame] | 3169 | struct irq_desc *desc_new = NULL; |
Yinghai Lu | 199751d | 2008-08-19 20:50:27 -0700 | [diff] [blame] | 3170 | |
| 3171 | irq = 0; |
Yinghai Lu | abcaa2b | 2009-02-08 16:18:03 -0800 | [diff] [blame] | 3172 | if (irq_want < nr_irqs_gsi) |
| 3173 | irq_want = nr_irqs_gsi; |
| 3174 | |
Eric W. Biederman | ace80ab | 2006-10-04 02:16:47 -0700 | [diff] [blame] | 3175 | spin_lock_irqsave(&vector_lock, flags); |
Mike Travis | 9594949 | 2009-01-10 22:24:06 -0800 | [diff] [blame] | 3176 | for (new = irq_want; new < nr_irqs; new++) { |
Yinghai Lu | 85ac16d | 2009-04-27 18:00:38 -0700 | [diff] [blame] | 3177 | desc_new = irq_to_desc_alloc_node(new, node); |
Yinghai Lu | 0b8f1ef | 2008-12-05 18:58:31 -0800 | [diff] [blame] | 3178 | if (!desc_new) { |
| 3179 | printk(KERN_INFO "can not get irq_desc for %d\n", new); |
Eric W. Biederman | ace80ab | 2006-10-04 02:16:47 -0700 | [diff] [blame] | 3180 | continue; |
Yinghai Lu | 0b8f1ef | 2008-12-05 18:58:31 -0800 | [diff] [blame] | 3181 | } |
| 3182 | cfg_new = desc_new->chip_data; |
| 3183 | |
| 3184 | if (cfg_new->vector != 0) |
| 3185 | continue; |
Yinghai Lu | d047f53a | 2009-04-27 18:02:23 -0700 | [diff] [blame] | 3186 | |
Yinghai Lu | 15e957d | 2009-04-30 01:17:50 -0700 | [diff] [blame] | 3187 | desc_new = move_irq_desc(desc_new, node); |
Yinghai Lu | d047f53a | 2009-04-27 18:02:23 -0700 | [diff] [blame] | 3188 | |
Ingo Molnar | fe402e1 | 2009-01-28 04:32:51 +0100 | [diff] [blame] | 3189 | if (__assign_irq_vector(new, cfg_new, apic->target_cpus()) == 0) |
Eric W. Biederman | ace80ab | 2006-10-04 02:16:47 -0700 | [diff] [blame] | 3190 | irq = new; |
| 3191 | break; |
| 3192 | } |
| 3193 | spin_unlock_irqrestore(&vector_lock, flags); |
Eric W. Biederman | 3fc471e | 2006-10-04 02:16:39 -0700 | [diff] [blame] | 3194 | |
Yinghai Lu | 199751d | 2008-08-19 20:50:27 -0700 | [diff] [blame] | 3195 | if (irq > 0) { |
Eric W. Biederman | 3fc471e | 2006-10-04 02:16:39 -0700 | [diff] [blame] | 3196 | dynamic_irq_init(irq); |
Yinghai Lu | 0b8f1ef | 2008-12-05 18:58:31 -0800 | [diff] [blame] | 3197 | /* restore it, in case dynamic_irq_init clear it */ |
| 3198 | if (desc_new) |
| 3199 | desc_new->chip_data = cfg_new; |
Eric W. Biederman | 3fc471e | 2006-10-04 02:16:39 -0700 | [diff] [blame] | 3200 | } |
| 3201 | return irq; |
| 3202 | } |
| 3203 | |
Yinghai Lu | 199751d | 2008-08-19 20:50:27 -0700 | [diff] [blame] | 3204 | int create_irq(void) |
| 3205 | { |
Yinghai Lu | d047f53a | 2009-04-27 18:02:23 -0700 | [diff] [blame] | 3206 | int node = cpu_to_node(boot_cpu_id); |
Yinghai Lu | be5d535 | 2008-12-05 18:58:33 -0800 | [diff] [blame] | 3207 | unsigned int irq_want; |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 3208 | int irq; |
| 3209 | |
Yinghai Lu | be5d535 | 2008-12-05 18:58:33 -0800 | [diff] [blame] | 3210 | irq_want = nr_irqs_gsi; |
Yinghai Lu | d047f53a | 2009-04-27 18:02:23 -0700 | [diff] [blame] | 3211 | irq = create_irq_nr(irq_want, node); |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 3212 | |
| 3213 | if (irq == 0) |
| 3214 | irq = -1; |
| 3215 | |
| 3216 | return irq; |
Yinghai Lu | 199751d | 2008-08-19 20:50:27 -0700 | [diff] [blame] | 3217 | } |
| 3218 | |
Eric W. Biederman | 3fc471e | 2006-10-04 02:16:39 -0700 | [diff] [blame] | 3219 | void destroy_irq(unsigned int irq) |
| 3220 | { |
| 3221 | unsigned long flags; |
Yinghai Lu | 0b8f1ef | 2008-12-05 18:58:31 -0800 | [diff] [blame] | 3222 | struct irq_cfg *cfg; |
| 3223 | struct irq_desc *desc; |
Eric W. Biederman | 3fc471e | 2006-10-04 02:16:39 -0700 | [diff] [blame] | 3224 | |
Yinghai Lu | 0b8f1ef | 2008-12-05 18:58:31 -0800 | [diff] [blame] | 3225 | /* store it, in case dynamic_irq_cleanup clear it */ |
| 3226 | desc = irq_to_desc(irq); |
| 3227 | cfg = desc->chip_data; |
Eric W. Biederman | 3fc471e | 2006-10-04 02:16:39 -0700 | [diff] [blame] | 3228 | dynamic_irq_cleanup(irq); |
Yinghai Lu | 0b8f1ef | 2008-12-05 18:58:31 -0800 | [diff] [blame] | 3229 | /* connect back irq_cfg */ |
| 3230 | if (desc) |
| 3231 | desc->chip_data = cfg; |
Eric W. Biederman | 3fc471e | 2006-10-04 02:16:39 -0700 | [diff] [blame] | 3232 | |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 3233 | free_irte(irq); |
Eric W. Biederman | 3fc471e | 2006-10-04 02:16:39 -0700 | [diff] [blame] | 3234 | spin_lock_irqsave(&vector_lock, flags); |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 3235 | __clear_irq_vector(irq, cfg); |
Eric W. Biederman | 3fc471e | 2006-10-04 02:16:39 -0700 | [diff] [blame] | 3236 | spin_unlock_irqrestore(&vector_lock, flags); |
| 3237 | } |
Eric W. Biederman | 3fc471e | 2006-10-04 02:16:39 -0700 | [diff] [blame] | 3238 | |
Eric W. Biederman | 2d3fcc1 | 2006-10-04 02:16:43 -0700 | [diff] [blame] | 3239 | /* |
Simon Arlott | 27b46d7 | 2007-10-20 01:13:56 +0200 | [diff] [blame] | 3240 | * MSI message composition |
Eric W. Biederman | 2d3fcc1 | 2006-10-04 02:16:43 -0700 | [diff] [blame] | 3241 | */ |
| 3242 | #ifdef CONFIG_PCI_MSI |
Eric W. Biederman | 3b7d192 | 2006-10-04 02:16:59 -0700 | [diff] [blame] | 3243 | static int msi_compose_msg(struct pci_dev *pdev, unsigned int irq, struct msi_msg *msg) |
Eric W. Biederman | 2d3fcc1 | 2006-10-04 02:16:43 -0700 | [diff] [blame] | 3244 | { |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 3245 | struct irq_cfg *cfg; |
| 3246 | int err; |
Eric W. Biederman | 2d3fcc1 | 2006-10-04 02:16:43 -0700 | [diff] [blame] | 3247 | unsigned dest; |
| 3248 | |
Jan Beulich | f118263 | 2009-01-14 12:27:35 +0000 | [diff] [blame] | 3249 | if (disable_apic) |
| 3250 | return -ENXIO; |
| 3251 | |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 3252 | cfg = irq_cfg(irq); |
Ingo Molnar | fe402e1 | 2009-01-28 04:32:51 +0100 | [diff] [blame] | 3253 | err = assign_irq_vector(irq, cfg, apic->target_cpus()); |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 3254 | if (err) |
| 3255 | return err; |
Eric W. Biederman | 2d3fcc1 | 2006-10-04 02:16:43 -0700 | [diff] [blame] | 3256 | |
Ingo Molnar | debccb3 | 2009-01-28 15:20:18 +0100 | [diff] [blame] | 3257 | dest = apic->cpu_mask_to_apicid_and(cfg->domain, apic->target_cpus()); |
Eric W. Biederman | 2d3fcc1 | 2006-10-04 02:16:43 -0700 | [diff] [blame] | 3258 | |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 3259 | if (irq_remapped(irq)) { |
| 3260 | struct irte irte; |
| 3261 | int ir_index; |
| 3262 | u16 sub_handle; |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 3263 | |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 3264 | ir_index = map_irq_to_irte_handle(irq, &sub_handle); |
| 3265 | BUG_ON(ir_index == -1); |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 3266 | |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 3267 | memset (&irte, 0, sizeof(irte)); |
| 3268 | |
| 3269 | irte.present = 1; |
Ingo Molnar | 9b5bc8d | 2009-01-28 04:09:58 +0100 | [diff] [blame] | 3270 | irte.dst_mode = apic->irq_dest_mode; |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 3271 | irte.trigger_mode = 0; /* edge */ |
Ingo Molnar | 9b5bc8d | 2009-01-28 04:09:58 +0100 | [diff] [blame] | 3272 | irte.dlvry_mode = apic->irq_delivery_mode; |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 3273 | irte.vector = cfg->vector; |
| 3274 | irte.dest_id = IRTE_DEST(dest); |
| 3275 | |
Weidong Han | f007e99 | 2009-05-23 00:41:15 +0800 | [diff] [blame] | 3276 | /* Set source-id of interrupt request */ |
| 3277 | set_msi_sid(&irte, pdev); |
| 3278 | |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 3279 | modify_irte(irq, &irte); |
| 3280 | |
| 3281 | msg->address_hi = MSI_ADDR_BASE_HI; |
| 3282 | msg->data = sub_handle; |
| 3283 | msg->address_lo = MSI_ADDR_BASE_LO | MSI_ADDR_IR_EXT_INT | |
| 3284 | MSI_ADDR_IR_SHV | |
| 3285 | MSI_ADDR_IR_INDEX1(ir_index) | |
| 3286 | MSI_ADDR_IR_INDEX2(ir_index); |
Suresh Siddha | 29b61be | 2009-03-16 17:05:02 -0700 | [diff] [blame] | 3287 | } else { |
Suresh Siddha | 9d783ba | 2009-03-16 17:04:55 -0700 | [diff] [blame] | 3288 | if (x2apic_enabled()) |
| 3289 | msg->address_hi = MSI_ADDR_BASE_HI | |
| 3290 | MSI_ADDR_EXT_DEST_ID(dest); |
| 3291 | else |
| 3292 | msg->address_hi = MSI_ADDR_BASE_HI; |
| 3293 | |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 3294 | msg->address_lo = |
| 3295 | MSI_ADDR_BASE_LO | |
Ingo Molnar | 9b5bc8d | 2009-01-28 04:09:58 +0100 | [diff] [blame] | 3296 | ((apic->irq_dest_mode == 0) ? |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 3297 | MSI_ADDR_DEST_MODE_PHYSICAL: |
| 3298 | MSI_ADDR_DEST_MODE_LOGICAL) | |
Ingo Molnar | 9b5bc8d | 2009-01-28 04:09:58 +0100 | [diff] [blame] | 3299 | ((apic->irq_delivery_mode != dest_LowestPrio) ? |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 3300 | MSI_ADDR_REDIRECTION_CPU: |
| 3301 | MSI_ADDR_REDIRECTION_LOWPRI) | |
| 3302 | MSI_ADDR_DEST_ID(dest); |
| 3303 | |
| 3304 | msg->data = |
| 3305 | MSI_DATA_TRIGGER_EDGE | |
| 3306 | MSI_DATA_LEVEL_ASSERT | |
Ingo Molnar | 9b5bc8d | 2009-01-28 04:09:58 +0100 | [diff] [blame] | 3307 | ((apic->irq_delivery_mode != dest_LowestPrio) ? |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 3308 | MSI_DATA_DELIVERY_FIXED: |
| 3309 | MSI_DATA_DELIVERY_LOWPRI) | |
| 3310 | MSI_DATA_VECTOR(cfg->vector); |
| 3311 | } |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 3312 | return err; |
Eric W. Biederman | 2d3fcc1 | 2006-10-04 02:16:43 -0700 | [diff] [blame] | 3313 | } |
| 3314 | |
Eric W. Biederman | 3b7d192 | 2006-10-04 02:16:59 -0700 | [diff] [blame] | 3315 | #ifdef CONFIG_SMP |
Yinghai Lu | d5dedd4 | 2009-04-27 17:59:21 -0700 | [diff] [blame] | 3316 | static int set_msi_irq_affinity(unsigned int irq, const struct cpumask *mask) |
Eric W. Biederman | 3b7d192 | 2006-10-04 02:16:59 -0700 | [diff] [blame] | 3317 | { |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 3318 | struct irq_desc *desc = irq_to_desc(irq); |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 3319 | struct irq_cfg *cfg; |
Eric W. Biederman | 3b7d192 | 2006-10-04 02:16:59 -0700 | [diff] [blame] | 3320 | struct msi_msg msg; |
| 3321 | unsigned int dest; |
Eric W. Biederman | 3b7d192 | 2006-10-04 02:16:59 -0700 | [diff] [blame] | 3322 | |
Mike Travis | 22f65d3 | 2008-12-16 17:33:56 -0800 | [diff] [blame] | 3323 | dest = set_desc_affinity(desc, mask); |
| 3324 | if (dest == BAD_APICID) |
Yinghai Lu | d5dedd4 | 2009-04-27 17:59:21 -0700 | [diff] [blame] | 3325 | return -1; |
Eric W. Biederman | 3b7d192 | 2006-10-04 02:16:59 -0700 | [diff] [blame] | 3326 | |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 3327 | cfg = desc->chip_data; |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 3328 | |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 3329 | read_msi_msg_desc(desc, &msg); |
Eric W. Biederman | 3b7d192 | 2006-10-04 02:16:59 -0700 | [diff] [blame] | 3330 | |
| 3331 | msg.data &= ~MSI_DATA_VECTOR_MASK; |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 3332 | msg.data |= MSI_DATA_VECTOR(cfg->vector); |
Eric W. Biederman | 3b7d192 | 2006-10-04 02:16:59 -0700 | [diff] [blame] | 3333 | msg.address_lo &= ~MSI_ADDR_DEST_ID_MASK; |
| 3334 | msg.address_lo |= MSI_ADDR_DEST_ID(dest); |
| 3335 | |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 3336 | write_msi_msg_desc(desc, &msg); |
Yinghai Lu | d5dedd4 | 2009-04-27 17:59:21 -0700 | [diff] [blame] | 3337 | |
| 3338 | return 0; |
Eric W. Biederman | 3b7d192 | 2006-10-04 02:16:59 -0700 | [diff] [blame] | 3339 | } |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 3340 | #ifdef CONFIG_INTR_REMAP |
| 3341 | /* |
| 3342 | * Migrate the MSI irq to another cpumask. This migration is |
| 3343 | * done in the process context using interrupt-remapping hardware. |
| 3344 | */ |
Yinghai Lu | d5dedd4 | 2009-04-27 17:59:21 -0700 | [diff] [blame] | 3345 | static int |
Mike Travis | e798673 | 2008-12-16 17:33:52 -0800 | [diff] [blame] | 3346 | ir_set_msi_irq_affinity(unsigned int irq, const struct cpumask *mask) |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 3347 | { |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 3348 | struct irq_desc *desc = irq_to_desc(irq); |
Ingo Molnar | a7883de | 2008-12-19 00:59:09 +0100 | [diff] [blame] | 3349 | struct irq_cfg *cfg = desc->chip_data; |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 3350 | unsigned int dest; |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 3351 | struct irte irte; |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 3352 | |
| 3353 | if (get_irte(irq, &irte)) |
Yinghai Lu | d5dedd4 | 2009-04-27 17:59:21 -0700 | [diff] [blame] | 3354 | return -1; |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 3355 | |
Mike Travis | 22f65d3 | 2008-12-16 17:33:56 -0800 | [diff] [blame] | 3356 | dest = set_desc_affinity(desc, mask); |
| 3357 | if (dest == BAD_APICID) |
Yinghai Lu | d5dedd4 | 2009-04-27 17:59:21 -0700 | [diff] [blame] | 3358 | return -1; |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 3359 | |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 3360 | irte.vector = cfg->vector; |
| 3361 | irte.dest_id = IRTE_DEST(dest); |
| 3362 | |
| 3363 | /* |
| 3364 | * atomically update the IRTE with the new destination and vector. |
| 3365 | */ |
| 3366 | modify_irte(irq, &irte); |
| 3367 | |
| 3368 | /* |
| 3369 | * After this point, all the interrupts will start arriving |
| 3370 | * at the new destination. So, time to cleanup the previous |
| 3371 | * vector allocation. |
| 3372 | */ |
Mike Travis | 22f65d3 | 2008-12-16 17:33:56 -0800 | [diff] [blame] | 3373 | if (cfg->move_in_progress) |
| 3374 | send_cleanup_vector(cfg); |
Yinghai Lu | d5dedd4 | 2009-04-27 17:59:21 -0700 | [diff] [blame] | 3375 | |
| 3376 | return 0; |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 3377 | } |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 3378 | |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 3379 | #endif |
Eric W. Biederman | 3b7d192 | 2006-10-04 02:16:59 -0700 | [diff] [blame] | 3380 | #endif /* CONFIG_SMP */ |
| 3381 | |
| 3382 | /* |
| 3383 | * IRQ Chip for MSI PCI/PCI-X/PCI-Express Devices, |
| 3384 | * which implement the MSI or MSI-X Capability Structure. |
| 3385 | */ |
| 3386 | static struct irq_chip msi_chip = { |
| 3387 | .name = "PCI-MSI", |
| 3388 | .unmask = unmask_msi_irq, |
| 3389 | .mask = mask_msi_irq, |
Yinghai Lu | 1d02519 | 2008-08-19 20:50:34 -0700 | [diff] [blame] | 3390 | .ack = ack_apic_edge, |
Eric W. Biederman | 3b7d192 | 2006-10-04 02:16:59 -0700 | [diff] [blame] | 3391 | #ifdef CONFIG_SMP |
| 3392 | .set_affinity = set_msi_irq_affinity, |
| 3393 | #endif |
| 3394 | .retrigger = ioapic_retrigger_irq, |
| 3395 | }; |
| 3396 | |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 3397 | static struct irq_chip msi_ir_chip = { |
| 3398 | .name = "IR-PCI-MSI", |
| 3399 | .unmask = unmask_msi_irq, |
| 3400 | .mask = mask_msi_irq, |
Jaswinder Singh Rajput | a1e38ca | 2009-03-23 02:11:25 +0530 | [diff] [blame] | 3401 | #ifdef CONFIG_INTR_REMAP |
Han, Weidong | d0b03bd | 2009-04-03 17:15:50 +0800 | [diff] [blame] | 3402 | .ack = ir_ack_apic_edge, |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 3403 | #ifdef CONFIG_SMP |
| 3404 | .set_affinity = ir_set_msi_irq_affinity, |
| 3405 | #endif |
Jaswinder Singh Rajput | a1e38ca | 2009-03-23 02:11:25 +0530 | [diff] [blame] | 3406 | #endif |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 3407 | .retrigger = ioapic_retrigger_irq, |
| 3408 | }; |
| 3409 | |
| 3410 | /* |
| 3411 | * Map the PCI dev to the corresponding remapping hardware unit |
| 3412 | * and allocate 'nvec' consecutive interrupt-remapping table entries |
| 3413 | * in it. |
| 3414 | */ |
| 3415 | static int msi_alloc_irte(struct pci_dev *dev, int irq, int nvec) |
| 3416 | { |
| 3417 | struct intel_iommu *iommu; |
| 3418 | int index; |
| 3419 | |
| 3420 | iommu = map_dev_to_ir(dev); |
| 3421 | if (!iommu) { |
| 3422 | printk(KERN_ERR |
| 3423 | "Unable to map PCI %s to iommu\n", pci_name(dev)); |
| 3424 | return -ENOENT; |
| 3425 | } |
| 3426 | |
| 3427 | index = alloc_irte(iommu, irq, nvec); |
| 3428 | if (index < 0) { |
| 3429 | printk(KERN_ERR |
| 3430 | "Unable to allocate %d IRTE for PCI %s\n", nvec, |
Thomas Gleixner | d6c88a5 | 2008-10-15 15:27:23 +0200 | [diff] [blame] | 3431 | pci_name(dev)); |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 3432 | return -ENOSPC; |
| 3433 | } |
| 3434 | return index; |
| 3435 | } |
Yinghai Lu | 1d02519 | 2008-08-19 20:50:34 -0700 | [diff] [blame] | 3436 | |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 3437 | static int setup_msi_irq(struct pci_dev *dev, struct msi_desc *msidesc, int irq) |
Yinghai Lu | 1d02519 | 2008-08-19 20:50:34 -0700 | [diff] [blame] | 3438 | { |
| 3439 | int ret; |
| 3440 | struct msi_msg msg; |
| 3441 | |
| 3442 | ret = msi_compose_msg(dev, irq, &msg); |
| 3443 | if (ret < 0) |
| 3444 | return ret; |
| 3445 | |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 3446 | set_irq_msi(irq, msidesc); |
Yinghai Lu | 1d02519 | 2008-08-19 20:50:34 -0700 | [diff] [blame] | 3447 | write_msi_msg(irq, &msg); |
| 3448 | |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 3449 | if (irq_remapped(irq)) { |
| 3450 | struct irq_desc *desc = irq_to_desc(irq); |
| 3451 | /* |
| 3452 | * irq migration in process context |
| 3453 | */ |
| 3454 | desc->status |= IRQ_MOVE_PCNTXT; |
| 3455 | set_irq_chip_and_handler_name(irq, &msi_ir_chip, handle_edge_irq, "edge"); |
| 3456 | } else |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 3457 | set_irq_chip_and_handler_name(irq, &msi_chip, handle_edge_irq, "edge"); |
Yinghai Lu | 1d02519 | 2008-08-19 20:50:34 -0700 | [diff] [blame] | 3458 | |
Yinghai Lu | c81bba4 | 2008-09-25 11:53:11 -0700 | [diff] [blame] | 3459 | dev_printk(KERN_DEBUG, &dev->dev, "irq %d for MSI/MSI-X\n", irq); |
| 3460 | |
Yinghai Lu | 1d02519 | 2008-08-19 20:50:34 -0700 | [diff] [blame] | 3461 | return 0; |
| 3462 | } |
| 3463 | |
Yinghai Lu | 047c8fd | 2008-08-19 20:50:41 -0700 | [diff] [blame] | 3464 | int arch_setup_msi_irqs(struct pci_dev *dev, int nvec, int type) |
| 3465 | { |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 3466 | unsigned int irq; |
| 3467 | int ret, sub_handle; |
Yinghai Lu | 0b8f1ef | 2008-12-05 18:58:31 -0800 | [diff] [blame] | 3468 | struct msi_desc *msidesc; |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 3469 | unsigned int irq_want; |
Dmitri Vorobiev | 1cc1852 | 2009-03-22 19:11:09 +0200 | [diff] [blame] | 3470 | struct intel_iommu *iommu = NULL; |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 3471 | int index = 0; |
Yinghai Lu | d047f53a | 2009-04-27 18:02:23 -0700 | [diff] [blame] | 3472 | int node; |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 3473 | |
Matthew Wilcox | 1c8d7b0 | 2009-03-17 08:54:10 -0400 | [diff] [blame] | 3474 | /* x86 doesn't support multiple MSI yet */ |
| 3475 | if (type == PCI_CAP_ID_MSI && nvec > 1) |
| 3476 | return 1; |
| 3477 | |
Yinghai Lu | d047f53a | 2009-04-27 18:02:23 -0700 | [diff] [blame] | 3478 | node = dev_to_node(&dev->dev); |
Yinghai Lu | be5d535 | 2008-12-05 18:58:33 -0800 | [diff] [blame] | 3479 | irq_want = nr_irqs_gsi; |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 3480 | sub_handle = 0; |
Yinghai Lu | 0b8f1ef | 2008-12-05 18:58:31 -0800 | [diff] [blame] | 3481 | list_for_each_entry(msidesc, &dev->msi_list, list) { |
Yinghai Lu | d047f53a | 2009-04-27 18:02:23 -0700 | [diff] [blame] | 3482 | irq = create_irq_nr(irq_want, node); |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 3483 | if (irq == 0) |
| 3484 | return -1; |
Yinghai Lu | f1ee554 | 2009-02-08 16:18:03 -0800 | [diff] [blame] | 3485 | irq_want = irq + 1; |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 3486 | if (!intr_remapping_enabled) |
| 3487 | goto no_ir; |
| 3488 | |
| 3489 | if (!sub_handle) { |
| 3490 | /* |
| 3491 | * allocate the consecutive block of IRTE's |
| 3492 | * for 'nvec' |
| 3493 | */ |
| 3494 | index = msi_alloc_irte(dev, irq, nvec); |
| 3495 | if (index < 0) { |
| 3496 | ret = index; |
| 3497 | goto error; |
| 3498 | } |
| 3499 | } else { |
| 3500 | iommu = map_dev_to_ir(dev); |
| 3501 | if (!iommu) { |
| 3502 | ret = -ENOENT; |
| 3503 | goto error; |
| 3504 | } |
| 3505 | /* |
| 3506 | * setup the mapping between the irq and the IRTE |
| 3507 | * base index, the sub_handle pointing to the |
| 3508 | * appropriate interrupt remap table entry. |
| 3509 | */ |
| 3510 | set_irte_irq(irq, iommu, index, sub_handle); |
| 3511 | } |
| 3512 | no_ir: |
Yinghai Lu | 0b8f1ef | 2008-12-05 18:58:31 -0800 | [diff] [blame] | 3513 | ret = setup_msi_irq(dev, msidesc, irq); |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 3514 | if (ret < 0) |
| 3515 | goto error; |
| 3516 | sub_handle++; |
| 3517 | } |
| 3518 | return 0; |
Yinghai Lu | 047c8fd | 2008-08-19 20:50:41 -0700 | [diff] [blame] | 3519 | |
| 3520 | error: |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 3521 | destroy_irq(irq); |
| 3522 | return ret; |
Yinghai Lu | 047c8fd | 2008-08-19 20:50:41 -0700 | [diff] [blame] | 3523 | } |
| 3524 | |
Eric W. Biederman | 3b7d192 | 2006-10-04 02:16:59 -0700 | [diff] [blame] | 3525 | void arch_teardown_msi_irq(unsigned int irq) |
Eric W. Biederman | 2d3fcc1 | 2006-10-04 02:16:43 -0700 | [diff] [blame] | 3526 | { |
Eric W. Biederman | f7feaca | 2007-01-28 12:56:37 -0700 | [diff] [blame] | 3527 | destroy_irq(irq); |
Eric W. Biederman | 2d3fcc1 | 2006-10-04 02:16:43 -0700 | [diff] [blame] | 3528 | } |
| 3529 | |
Suresh Siddha | 9d783ba | 2009-03-16 17:04:55 -0700 | [diff] [blame] | 3530 | #if defined (CONFIG_DMAR) || defined (CONFIG_INTR_REMAP) |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 3531 | #ifdef CONFIG_SMP |
Yinghai Lu | d5dedd4 | 2009-04-27 17:59:21 -0700 | [diff] [blame] | 3532 | static int dmar_msi_set_affinity(unsigned int irq, const struct cpumask *mask) |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 3533 | { |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 3534 | struct irq_desc *desc = irq_to_desc(irq); |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 3535 | struct irq_cfg *cfg; |
| 3536 | struct msi_msg msg; |
| 3537 | unsigned int dest; |
Eric W. Biederman | 2d3fcc1 | 2006-10-04 02:16:43 -0700 | [diff] [blame] | 3538 | |
Mike Travis | 22f65d3 | 2008-12-16 17:33:56 -0800 | [diff] [blame] | 3539 | dest = set_desc_affinity(desc, mask); |
| 3540 | if (dest == BAD_APICID) |
Yinghai Lu | d5dedd4 | 2009-04-27 17:59:21 -0700 | [diff] [blame] | 3541 | return -1; |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 3542 | |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 3543 | cfg = desc->chip_data; |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 3544 | |
| 3545 | dmar_msi_read(irq, &msg); |
| 3546 | |
| 3547 | msg.data &= ~MSI_DATA_VECTOR_MASK; |
| 3548 | msg.data |= MSI_DATA_VECTOR(cfg->vector); |
| 3549 | msg.address_lo &= ~MSI_ADDR_DEST_ID_MASK; |
| 3550 | msg.address_lo |= MSI_ADDR_DEST_ID(dest); |
| 3551 | |
| 3552 | dmar_msi_write(irq, &msg); |
Yinghai Lu | d5dedd4 | 2009-04-27 17:59:21 -0700 | [diff] [blame] | 3553 | |
| 3554 | return 0; |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 3555 | } |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 3556 | |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 3557 | #endif /* CONFIG_SMP */ |
| 3558 | |
Jaswinder Singh Rajput | 8f7007a | 2009-06-10 12:41:01 -0700 | [diff] [blame] | 3559 | static struct irq_chip dmar_msi_type = { |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 3560 | .name = "DMAR_MSI", |
| 3561 | .unmask = dmar_msi_unmask, |
| 3562 | .mask = dmar_msi_mask, |
| 3563 | .ack = ack_apic_edge, |
| 3564 | #ifdef CONFIG_SMP |
| 3565 | .set_affinity = dmar_msi_set_affinity, |
| 3566 | #endif |
| 3567 | .retrigger = ioapic_retrigger_irq, |
| 3568 | }; |
| 3569 | |
| 3570 | int arch_setup_dmar_msi(unsigned int irq) |
| 3571 | { |
| 3572 | int ret; |
| 3573 | struct msi_msg msg; |
| 3574 | |
| 3575 | ret = msi_compose_msg(NULL, irq, &msg); |
| 3576 | if (ret < 0) |
| 3577 | return ret; |
| 3578 | dmar_msi_write(irq, &msg); |
| 3579 | set_irq_chip_and_handler_name(irq, &dmar_msi_type, handle_edge_irq, |
| 3580 | "edge"); |
| 3581 | return 0; |
| 3582 | } |
| 3583 | #endif |
| 3584 | |
venkatesh.pallipadi@intel.com | 58ac1e7 | 2008-09-05 18:02:17 -0700 | [diff] [blame] | 3585 | #ifdef CONFIG_HPET_TIMER |
| 3586 | |
| 3587 | #ifdef CONFIG_SMP |
Yinghai Lu | d5dedd4 | 2009-04-27 17:59:21 -0700 | [diff] [blame] | 3588 | static int hpet_msi_set_affinity(unsigned int irq, const struct cpumask *mask) |
venkatesh.pallipadi@intel.com | 58ac1e7 | 2008-09-05 18:02:17 -0700 | [diff] [blame] | 3589 | { |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 3590 | struct irq_desc *desc = irq_to_desc(irq); |
venkatesh.pallipadi@intel.com | 58ac1e7 | 2008-09-05 18:02:17 -0700 | [diff] [blame] | 3591 | struct irq_cfg *cfg; |
venkatesh.pallipadi@intel.com | 58ac1e7 | 2008-09-05 18:02:17 -0700 | [diff] [blame] | 3592 | struct msi_msg msg; |
| 3593 | unsigned int dest; |
venkatesh.pallipadi@intel.com | 58ac1e7 | 2008-09-05 18:02:17 -0700 | [diff] [blame] | 3594 | |
Mike Travis | 22f65d3 | 2008-12-16 17:33:56 -0800 | [diff] [blame] | 3595 | dest = set_desc_affinity(desc, mask); |
| 3596 | if (dest == BAD_APICID) |
Yinghai Lu | d5dedd4 | 2009-04-27 17:59:21 -0700 | [diff] [blame] | 3597 | return -1; |
venkatesh.pallipadi@intel.com | 58ac1e7 | 2008-09-05 18:02:17 -0700 | [diff] [blame] | 3598 | |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 3599 | cfg = desc->chip_data; |
venkatesh.pallipadi@intel.com | 58ac1e7 | 2008-09-05 18:02:17 -0700 | [diff] [blame] | 3600 | |
| 3601 | hpet_msi_read(irq, &msg); |
| 3602 | |
| 3603 | msg.data &= ~MSI_DATA_VECTOR_MASK; |
| 3604 | msg.data |= MSI_DATA_VECTOR(cfg->vector); |
| 3605 | msg.address_lo &= ~MSI_ADDR_DEST_ID_MASK; |
| 3606 | msg.address_lo |= MSI_ADDR_DEST_ID(dest); |
| 3607 | |
| 3608 | hpet_msi_write(irq, &msg); |
Yinghai Lu | d5dedd4 | 2009-04-27 17:59:21 -0700 | [diff] [blame] | 3609 | |
| 3610 | return 0; |
venkatesh.pallipadi@intel.com | 58ac1e7 | 2008-09-05 18:02:17 -0700 | [diff] [blame] | 3611 | } |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 3612 | |
venkatesh.pallipadi@intel.com | 58ac1e7 | 2008-09-05 18:02:17 -0700 | [diff] [blame] | 3613 | #endif /* CONFIG_SMP */ |
| 3614 | |
Dmitri Vorobiev | 1cc1852 | 2009-03-22 19:11:09 +0200 | [diff] [blame] | 3615 | static struct irq_chip hpet_msi_type = { |
venkatesh.pallipadi@intel.com | 58ac1e7 | 2008-09-05 18:02:17 -0700 | [diff] [blame] | 3616 | .name = "HPET_MSI", |
| 3617 | .unmask = hpet_msi_unmask, |
| 3618 | .mask = hpet_msi_mask, |
| 3619 | .ack = ack_apic_edge, |
| 3620 | #ifdef CONFIG_SMP |
| 3621 | .set_affinity = hpet_msi_set_affinity, |
| 3622 | #endif |
| 3623 | .retrigger = ioapic_retrigger_irq, |
| 3624 | }; |
| 3625 | |
| 3626 | int arch_setup_hpet_msi(unsigned int irq) |
| 3627 | { |
| 3628 | int ret; |
| 3629 | struct msi_msg msg; |
Pallipadi, Venkatesh | 6ec3cfe | 2009-04-13 15:20:58 -0700 | [diff] [blame] | 3630 | struct irq_desc *desc = irq_to_desc(irq); |
venkatesh.pallipadi@intel.com | 58ac1e7 | 2008-09-05 18:02:17 -0700 | [diff] [blame] | 3631 | |
| 3632 | ret = msi_compose_msg(NULL, irq, &msg); |
| 3633 | if (ret < 0) |
| 3634 | return ret; |
| 3635 | |
| 3636 | hpet_msi_write(irq, &msg); |
Pallipadi, Venkatesh | 6ec3cfe | 2009-04-13 15:20:58 -0700 | [diff] [blame] | 3637 | desc->status |= IRQ_MOVE_PCNTXT; |
venkatesh.pallipadi@intel.com | 58ac1e7 | 2008-09-05 18:02:17 -0700 | [diff] [blame] | 3638 | set_irq_chip_and_handler_name(irq, &hpet_msi_type, handle_edge_irq, |
| 3639 | "edge"); |
Yinghai Lu | c81bba4 | 2008-09-25 11:53:11 -0700 | [diff] [blame] | 3640 | |
venkatesh.pallipadi@intel.com | 58ac1e7 | 2008-09-05 18:02:17 -0700 | [diff] [blame] | 3641 | return 0; |
| 3642 | } |
| 3643 | #endif |
| 3644 | |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 3645 | #endif /* CONFIG_PCI_MSI */ |
Eric W. Biederman | 8b955b0 | 2006-10-04 02:16:55 -0700 | [diff] [blame] | 3646 | /* |
| 3647 | * Hypertransport interrupt support |
| 3648 | */ |
| 3649 | #ifdef CONFIG_HT_IRQ |
| 3650 | |
| 3651 | #ifdef CONFIG_SMP |
| 3652 | |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 3653 | static void target_ht_irq(unsigned int irq, unsigned int dest, u8 vector) |
Eric W. Biederman | 8b955b0 | 2006-10-04 02:16:55 -0700 | [diff] [blame] | 3654 | { |
Eric W. Biederman | ec68307 | 2006-11-08 17:44:57 -0800 | [diff] [blame] | 3655 | struct ht_irq_msg msg; |
| 3656 | fetch_ht_irq_msg(irq, &msg); |
Eric W. Biederman | 8b955b0 | 2006-10-04 02:16:55 -0700 | [diff] [blame] | 3657 | |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 3658 | msg.address_lo &= ~(HT_IRQ_LOW_VECTOR_MASK | HT_IRQ_LOW_DEST_ID_MASK); |
Eric W. Biederman | ec68307 | 2006-11-08 17:44:57 -0800 | [diff] [blame] | 3659 | msg.address_hi &= ~(HT_IRQ_HIGH_DEST_ID_MASK); |
Eric W. Biederman | 8b955b0 | 2006-10-04 02:16:55 -0700 | [diff] [blame] | 3660 | |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 3661 | msg.address_lo |= HT_IRQ_LOW_VECTOR(vector) | HT_IRQ_LOW_DEST_ID(dest); |
Eric W. Biederman | ec68307 | 2006-11-08 17:44:57 -0800 | [diff] [blame] | 3662 | msg.address_hi |= HT_IRQ_HIGH_DEST_ID(dest); |
Eric W. Biederman | 8b955b0 | 2006-10-04 02:16:55 -0700 | [diff] [blame] | 3663 | |
Eric W. Biederman | ec68307 | 2006-11-08 17:44:57 -0800 | [diff] [blame] | 3664 | write_ht_irq_msg(irq, &msg); |
Eric W. Biederman | 8b955b0 | 2006-10-04 02:16:55 -0700 | [diff] [blame] | 3665 | } |
| 3666 | |
Yinghai Lu | d5dedd4 | 2009-04-27 17:59:21 -0700 | [diff] [blame] | 3667 | static int set_ht_irq_affinity(unsigned int irq, const struct cpumask *mask) |
Eric W. Biederman | 8b955b0 | 2006-10-04 02:16:55 -0700 | [diff] [blame] | 3668 | { |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 3669 | struct irq_desc *desc = irq_to_desc(irq); |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 3670 | struct irq_cfg *cfg; |
Eric W. Biederman | 8b955b0 | 2006-10-04 02:16:55 -0700 | [diff] [blame] | 3671 | unsigned int dest; |
Eric W. Biederman | 8b955b0 | 2006-10-04 02:16:55 -0700 | [diff] [blame] | 3672 | |
Mike Travis | 22f65d3 | 2008-12-16 17:33:56 -0800 | [diff] [blame] | 3673 | dest = set_desc_affinity(desc, mask); |
| 3674 | if (dest == BAD_APICID) |
Yinghai Lu | d5dedd4 | 2009-04-27 17:59:21 -0700 | [diff] [blame] | 3675 | return -1; |
Eric W. Biederman | 8b955b0 | 2006-10-04 02:16:55 -0700 | [diff] [blame] | 3676 | |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 3677 | cfg = desc->chip_data; |
Eric W. Biederman | 8b955b0 | 2006-10-04 02:16:55 -0700 | [diff] [blame] | 3678 | |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 3679 | target_ht_irq(irq, dest, cfg->vector); |
Yinghai Lu | d5dedd4 | 2009-04-27 17:59:21 -0700 | [diff] [blame] | 3680 | |
| 3681 | return 0; |
Eric W. Biederman | 8b955b0 | 2006-10-04 02:16:55 -0700 | [diff] [blame] | 3682 | } |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 3683 | |
Eric W. Biederman | 8b955b0 | 2006-10-04 02:16:55 -0700 | [diff] [blame] | 3684 | #endif |
| 3685 | |
Aneesh Kumar K.V | c37e108 | 2006-10-11 01:20:43 -0700 | [diff] [blame] | 3686 | static struct irq_chip ht_irq_chip = { |
Eric W. Biederman | 8b955b0 | 2006-10-04 02:16:55 -0700 | [diff] [blame] | 3687 | .name = "PCI-HT", |
| 3688 | .mask = mask_ht_irq, |
| 3689 | .unmask = unmask_ht_irq, |
Yinghai Lu | 1d02519 | 2008-08-19 20:50:34 -0700 | [diff] [blame] | 3690 | .ack = ack_apic_edge, |
Eric W. Biederman | 8b955b0 | 2006-10-04 02:16:55 -0700 | [diff] [blame] | 3691 | #ifdef CONFIG_SMP |
| 3692 | .set_affinity = set_ht_irq_affinity, |
| 3693 | #endif |
| 3694 | .retrigger = ioapic_retrigger_irq, |
| 3695 | }; |
| 3696 | |
| 3697 | int arch_setup_ht_irq(unsigned int irq, struct pci_dev *dev) |
| 3698 | { |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 3699 | struct irq_cfg *cfg; |
| 3700 | int err; |
Eric W. Biederman | 8b955b0 | 2006-10-04 02:16:55 -0700 | [diff] [blame] | 3701 | |
Jan Beulich | f118263 | 2009-01-14 12:27:35 +0000 | [diff] [blame] | 3702 | if (disable_apic) |
| 3703 | return -ENXIO; |
| 3704 | |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 3705 | cfg = irq_cfg(irq); |
Ingo Molnar | fe402e1 | 2009-01-28 04:32:51 +0100 | [diff] [blame] | 3706 | err = assign_irq_vector(irq, cfg, apic->target_cpus()); |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 3707 | if (!err) { |
Eric W. Biederman | ec68307 | 2006-11-08 17:44:57 -0800 | [diff] [blame] | 3708 | struct ht_irq_msg msg; |
Eric W. Biederman | 8b955b0 | 2006-10-04 02:16:55 -0700 | [diff] [blame] | 3709 | unsigned dest; |
Eric W. Biederman | 8b955b0 | 2006-10-04 02:16:55 -0700 | [diff] [blame] | 3710 | |
Ingo Molnar | debccb3 | 2009-01-28 15:20:18 +0100 | [diff] [blame] | 3711 | dest = apic->cpu_mask_to_apicid_and(cfg->domain, |
| 3712 | apic->target_cpus()); |
Eric W. Biederman | 8b955b0 | 2006-10-04 02:16:55 -0700 | [diff] [blame] | 3713 | |
Eric W. Biederman | ec68307 | 2006-11-08 17:44:57 -0800 | [diff] [blame] | 3714 | msg.address_hi = HT_IRQ_HIGH_DEST_ID(dest); |
Eric W. Biederman | 8b955b0 | 2006-10-04 02:16:55 -0700 | [diff] [blame] | 3715 | |
Eric W. Biederman | ec68307 | 2006-11-08 17:44:57 -0800 | [diff] [blame] | 3716 | msg.address_lo = |
| 3717 | HT_IRQ_LOW_BASE | |
Eric W. Biederman | 8b955b0 | 2006-10-04 02:16:55 -0700 | [diff] [blame] | 3718 | HT_IRQ_LOW_DEST_ID(dest) | |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 3719 | HT_IRQ_LOW_VECTOR(cfg->vector) | |
Ingo Molnar | 9b5bc8d | 2009-01-28 04:09:58 +0100 | [diff] [blame] | 3720 | ((apic->irq_dest_mode == 0) ? |
Eric W. Biederman | 8b955b0 | 2006-10-04 02:16:55 -0700 | [diff] [blame] | 3721 | HT_IRQ_LOW_DM_PHYSICAL : |
| 3722 | HT_IRQ_LOW_DM_LOGICAL) | |
| 3723 | HT_IRQ_LOW_RQEOI_EDGE | |
Ingo Molnar | 9b5bc8d | 2009-01-28 04:09:58 +0100 | [diff] [blame] | 3724 | ((apic->irq_delivery_mode != dest_LowestPrio) ? |
Eric W. Biederman | 8b955b0 | 2006-10-04 02:16:55 -0700 | [diff] [blame] | 3725 | HT_IRQ_LOW_MT_FIXED : |
| 3726 | HT_IRQ_LOW_MT_ARBITRATED) | |
| 3727 | HT_IRQ_LOW_IRQ_MASKED; |
| 3728 | |
Eric W. Biederman | ec68307 | 2006-11-08 17:44:57 -0800 | [diff] [blame] | 3729 | write_ht_irq_msg(irq, &msg); |
Eric W. Biederman | 8b955b0 | 2006-10-04 02:16:55 -0700 | [diff] [blame] | 3730 | |
Ingo Molnar | a460e74 | 2006-10-17 00:10:03 -0700 | [diff] [blame] | 3731 | set_irq_chip_and_handler_name(irq, &ht_irq_chip, |
| 3732 | handle_edge_irq, "edge"); |
Yinghai Lu | c81bba4 | 2008-09-25 11:53:11 -0700 | [diff] [blame] | 3733 | |
| 3734 | dev_printk(KERN_DEBUG, &dev->dev, "irq %d for HT\n", irq); |
Eric W. Biederman | 8b955b0 | 2006-10-04 02:16:55 -0700 | [diff] [blame] | 3735 | } |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 3736 | return err; |
Eric W. Biederman | 8b955b0 | 2006-10-04 02:16:55 -0700 | [diff] [blame] | 3737 | } |
| 3738 | #endif /* CONFIG_HT_IRQ */ |
| 3739 | |
Nick Piggin | 03b4863 | 2009-01-20 04:36:04 +0100 | [diff] [blame] | 3740 | #ifdef CONFIG_X86_UV |
Dean Nelson | 4173a0e | 2008-10-02 12:18:21 -0500 | [diff] [blame] | 3741 | /* |
| 3742 | * Re-target the irq to the specified CPU and enable the specified MMR located |
| 3743 | * on the specified blade to allow the sending of MSIs to the specified CPU. |
| 3744 | */ |
| 3745 | int arch_enable_uv_irq(char *irq_name, unsigned int irq, int cpu, int mmr_blade, |
| 3746 | unsigned long mmr_offset) |
| 3747 | { |
Mike Travis | 22f65d3 | 2008-12-16 17:33:56 -0800 | [diff] [blame] | 3748 | const struct cpumask *eligible_cpu = cpumask_of(cpu); |
Dean Nelson | 4173a0e | 2008-10-02 12:18:21 -0500 | [diff] [blame] | 3749 | struct irq_cfg *cfg; |
| 3750 | int mmr_pnode; |
| 3751 | unsigned long mmr_value; |
| 3752 | struct uv_IO_APIC_route_entry *entry; |
| 3753 | unsigned long flags; |
| 3754 | int err; |
| 3755 | |
Cyrill Gorcunov | 1cbac97 | 2009-05-02 13:39:56 +0400 | [diff] [blame] | 3756 | BUILD_BUG_ON(sizeof(struct uv_IO_APIC_route_entry) != sizeof(unsigned long)); |
| 3757 | |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 3758 | cfg = irq_cfg(irq); |
| 3759 | |
Mike Travis | e798673 | 2008-12-16 17:33:52 -0800 | [diff] [blame] | 3760 | err = assign_irq_vector(irq, cfg, eligible_cpu); |
Dean Nelson | 4173a0e | 2008-10-02 12:18:21 -0500 | [diff] [blame] | 3761 | if (err != 0) |
| 3762 | return err; |
| 3763 | |
| 3764 | spin_lock_irqsave(&vector_lock, flags); |
| 3765 | set_irq_chip_and_handler_name(irq, &uv_irq_chip, handle_percpu_irq, |
| 3766 | irq_name); |
| 3767 | spin_unlock_irqrestore(&vector_lock, flags); |
| 3768 | |
Dean Nelson | 4173a0e | 2008-10-02 12:18:21 -0500 | [diff] [blame] | 3769 | mmr_value = 0; |
| 3770 | entry = (struct uv_IO_APIC_route_entry *)&mmr_value; |
Cyrill Gorcunov | 1cbac97 | 2009-05-02 13:39:56 +0400 | [diff] [blame] | 3771 | entry->vector = cfg->vector; |
| 3772 | entry->delivery_mode = apic->irq_delivery_mode; |
| 3773 | entry->dest_mode = apic->irq_dest_mode; |
| 3774 | entry->polarity = 0; |
| 3775 | entry->trigger = 0; |
| 3776 | entry->mask = 0; |
| 3777 | entry->dest = apic->cpu_mask_to_apicid(eligible_cpu); |
Dean Nelson | 4173a0e | 2008-10-02 12:18:21 -0500 | [diff] [blame] | 3778 | |
| 3779 | mmr_pnode = uv_blade_to_pnode(mmr_blade); |
| 3780 | uv_write_global_mmr64(mmr_pnode, mmr_offset, mmr_value); |
| 3781 | |
| 3782 | return irq; |
| 3783 | } |
| 3784 | |
| 3785 | /* |
| 3786 | * Disable the specified MMR located on the specified blade so that MSIs are |
| 3787 | * longer allowed to be sent. |
| 3788 | */ |
| 3789 | void arch_disable_uv_irq(int mmr_blade, unsigned long mmr_offset) |
| 3790 | { |
| 3791 | unsigned long mmr_value; |
| 3792 | struct uv_IO_APIC_route_entry *entry; |
| 3793 | int mmr_pnode; |
| 3794 | |
Cyrill Gorcunov | 1cbac97 | 2009-05-02 13:39:56 +0400 | [diff] [blame] | 3795 | BUILD_BUG_ON(sizeof(struct uv_IO_APIC_route_entry) != sizeof(unsigned long)); |
| 3796 | |
Dean Nelson | 4173a0e | 2008-10-02 12:18:21 -0500 | [diff] [blame] | 3797 | mmr_value = 0; |
| 3798 | entry = (struct uv_IO_APIC_route_entry *)&mmr_value; |
Dean Nelson | 4173a0e | 2008-10-02 12:18:21 -0500 | [diff] [blame] | 3799 | entry->mask = 1; |
| 3800 | |
| 3801 | mmr_pnode = uv_blade_to_pnode(mmr_blade); |
| 3802 | uv_write_global_mmr64(mmr_pnode, mmr_offset, mmr_value); |
| 3803 | } |
| 3804 | #endif /* CONFIG_X86_64 */ |
| 3805 | |
Yinghai Lu | 9d6a4d0 | 2008-08-19 20:50:52 -0700 | [diff] [blame] | 3806 | int __init io_apic_get_redir_entries (int ioapic) |
| 3807 | { |
| 3808 | union IO_APIC_reg_01 reg_01; |
| 3809 | unsigned long flags; |
| 3810 | |
| 3811 | spin_lock_irqsave(&ioapic_lock, flags); |
| 3812 | reg_01.raw = io_apic_read(ioapic, 1); |
| 3813 | spin_unlock_irqrestore(&ioapic_lock, flags); |
| 3814 | |
| 3815 | return reg_01.bits.entries; |
| 3816 | } |
| 3817 | |
Yinghai Lu | be5d535 | 2008-12-05 18:58:33 -0800 | [diff] [blame] | 3818 | void __init probe_nr_irqs_gsi(void) |
Yinghai Lu | 9d6a4d0 | 2008-08-19 20:50:52 -0700 | [diff] [blame] | 3819 | { |
Yinghai Lu | be5d535 | 2008-12-05 18:58:33 -0800 | [diff] [blame] | 3820 | int nr = 0; |
| 3821 | |
Yinghai Lu | cc6c500 | 2009-02-08 16:18:03 -0800 | [diff] [blame] | 3822 | nr = acpi_probe_gsi(); |
| 3823 | if (nr > nr_irqs_gsi) { |
Yinghai Lu | be5d535 | 2008-12-05 18:58:33 -0800 | [diff] [blame] | 3824 | nr_irqs_gsi = nr; |
Yinghai Lu | cc6c500 | 2009-02-08 16:18:03 -0800 | [diff] [blame] | 3825 | } else { |
| 3826 | /* for acpi=off or acpi is not compiled in */ |
| 3827 | int idx; |
| 3828 | |
| 3829 | nr = 0; |
| 3830 | for (idx = 0; idx < nr_ioapics; idx++) |
| 3831 | nr += io_apic_get_redir_entries(idx) + 1; |
| 3832 | |
| 3833 | if (nr > nr_irqs_gsi) |
| 3834 | nr_irqs_gsi = nr; |
| 3835 | } |
| 3836 | |
| 3837 | printk(KERN_DEBUG "nr_irqs_gsi: %d\n", nr_irqs_gsi); |
Yinghai Lu | 9d6a4d0 | 2008-08-19 20:50:52 -0700 | [diff] [blame] | 3838 | } |
| 3839 | |
Yinghai Lu | 4a046d1 | 2009-01-12 17:39:24 -0800 | [diff] [blame] | 3840 | #ifdef CONFIG_SPARSE_IRQ |
| 3841 | int __init arch_probe_nr_irqs(void) |
| 3842 | { |
| 3843 | int nr; |
| 3844 | |
Yinghai Lu | f1ee554 | 2009-02-08 16:18:03 -0800 | [diff] [blame] | 3845 | if (nr_irqs > (NR_VECTORS * nr_cpu_ids)) |
| 3846 | nr_irqs = NR_VECTORS * nr_cpu_ids; |
Yinghai Lu | 4a046d1 | 2009-01-12 17:39:24 -0800 | [diff] [blame] | 3847 | |
Yinghai Lu | f1ee554 | 2009-02-08 16:18:03 -0800 | [diff] [blame] | 3848 | nr = nr_irqs_gsi + 8 * nr_cpu_ids; |
| 3849 | #if defined(CONFIG_PCI_MSI) || defined(CONFIG_HT_IRQ) |
| 3850 | /* |
| 3851 | * for MSI and HT dyn irq |
| 3852 | */ |
| 3853 | nr += nr_irqs_gsi * 16; |
| 3854 | #endif |
| 3855 | if (nr < nr_irqs) |
Yinghai Lu | 4a046d1 | 2009-01-12 17:39:24 -0800 | [diff] [blame] | 3856 | nr_irqs = nr; |
| 3857 | |
| 3858 | return 0; |
| 3859 | } |
| 3860 | #endif |
| 3861 | |
Yinghai Lu | e519807 | 2009-05-15 13:05:16 -0700 | [diff] [blame] | 3862 | static int __io_apic_set_pci_routing(struct device *dev, int irq, |
| 3863 | struct io_apic_irq_attr *irq_attr) |
Yinghai Lu | 5ef2183 | 2009-05-06 10:08:50 -0700 | [diff] [blame] | 3864 | { |
| 3865 | struct irq_desc *desc; |
| 3866 | struct irq_cfg *cfg; |
| 3867 | int node; |
Yinghai Lu | e519807 | 2009-05-15 13:05:16 -0700 | [diff] [blame] | 3868 | int ioapic, pin; |
| 3869 | int trigger, polarity; |
Yinghai Lu | 5ef2183 | 2009-05-06 10:08:50 -0700 | [diff] [blame] | 3870 | |
Yinghai Lu | e519807 | 2009-05-15 13:05:16 -0700 | [diff] [blame] | 3871 | ioapic = irq_attr->ioapic; |
Yinghai Lu | 5ef2183 | 2009-05-06 10:08:50 -0700 | [diff] [blame] | 3872 | if (!IO_APIC_IRQ(irq)) { |
| 3873 | apic_printk(APIC_QUIET,KERN_ERR "IOAPIC[%d]: Invalid reference to IRQ 0\n", |
| 3874 | ioapic); |
| 3875 | return -EINVAL; |
| 3876 | } |
| 3877 | |
| 3878 | if (dev) |
| 3879 | node = dev_to_node(dev); |
| 3880 | else |
| 3881 | node = cpu_to_node(boot_cpu_id); |
| 3882 | |
| 3883 | desc = irq_to_desc_alloc_node(irq, node); |
| 3884 | if (!desc) { |
| 3885 | printk(KERN_INFO "can not get irq_desc %d\n", irq); |
| 3886 | return 0; |
| 3887 | } |
| 3888 | |
Yinghai Lu | e519807 | 2009-05-15 13:05:16 -0700 | [diff] [blame] | 3889 | pin = irq_attr->ioapic_pin; |
| 3890 | trigger = irq_attr->trigger; |
| 3891 | polarity = irq_attr->polarity; |
| 3892 | |
Yinghai Lu | 5ef2183 | 2009-05-06 10:08:50 -0700 | [diff] [blame] | 3893 | /* |
| 3894 | * IRQs < 16 are already in the irq_2_pin[] map |
| 3895 | */ |
| 3896 | if (irq >= NR_IRQS_LEGACY) { |
| 3897 | cfg = desc->chip_data; |
| 3898 | add_pin_to_irq_node(cfg, node, ioapic, pin); |
| 3899 | } |
| 3900 | |
Yinghai Lu | e519807 | 2009-05-15 13:05:16 -0700 | [diff] [blame] | 3901 | setup_IO_APIC_irq(ioapic, pin, irq, desc, trigger, polarity); |
Yinghai Lu | 5ef2183 | 2009-05-06 10:08:50 -0700 | [diff] [blame] | 3902 | |
| 3903 | return 0; |
| 3904 | } |
| 3905 | |
Yinghai Lu | e519807 | 2009-05-15 13:05:16 -0700 | [diff] [blame] | 3906 | int io_apic_set_pci_routing(struct device *dev, int irq, |
| 3907 | struct io_apic_irq_attr *irq_attr) |
Yinghai Lu | 5ef2183 | 2009-05-06 10:08:50 -0700 | [diff] [blame] | 3908 | { |
Yinghai Lu | e519807 | 2009-05-15 13:05:16 -0700 | [diff] [blame] | 3909 | int ioapic, pin; |
Yinghai Lu | 5ef2183 | 2009-05-06 10:08:50 -0700 | [diff] [blame] | 3910 | /* |
| 3911 | * Avoid pin reprogramming. PRTs typically include entries |
| 3912 | * with redundant pin->gsi mappings (but unique PCI devices); |
| 3913 | * we only program the IOAPIC on the first. |
| 3914 | */ |
Yinghai Lu | e519807 | 2009-05-15 13:05:16 -0700 | [diff] [blame] | 3915 | ioapic = irq_attr->ioapic; |
| 3916 | pin = irq_attr->ioapic_pin; |
Yinghai Lu | 5ef2183 | 2009-05-06 10:08:50 -0700 | [diff] [blame] | 3917 | if (test_bit(pin, mp_ioapic_routing[ioapic].pin_programmed)) { |
| 3918 | pr_debug("Pin %d-%d already programmed\n", |
| 3919 | mp_ioapics[ioapic].apicid, pin); |
| 3920 | return 0; |
| 3921 | } |
| 3922 | set_bit(pin, mp_ioapic_routing[ioapic].pin_programmed); |
| 3923 | |
Yinghai Lu | e519807 | 2009-05-15 13:05:16 -0700 | [diff] [blame] | 3924 | return __io_apic_set_pci_routing(dev, irq, irq_attr); |
Yinghai Lu | 5ef2183 | 2009-05-06 10:08:50 -0700 | [diff] [blame] | 3925 | } |
| 3926 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3927 | /* -------------------------------------------------------------------------- |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 3928 | ACPI-based IOAPIC Configuration |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3929 | -------------------------------------------------------------------------- */ |
| 3930 | |
Len Brown | 888ba6c | 2005-08-24 12:07:20 -0400 | [diff] [blame] | 3931 | #ifdef CONFIG_ACPI |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3932 | |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 3933 | #ifdef CONFIG_X86_32 |
Paolo Ciarrocchi | 3606244 | 2008-06-08 13:07:18 +0200 | [diff] [blame] | 3934 | int __init io_apic_get_unique_id(int ioapic, int apic_id) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3935 | { |
| 3936 | union IO_APIC_reg_00 reg_00; |
| 3937 | static physid_mask_t apic_id_map = PHYSID_MASK_NONE; |
| 3938 | physid_mask_t tmp; |
| 3939 | unsigned long flags; |
| 3940 | int i = 0; |
| 3941 | |
| 3942 | /* |
Paolo Ciarrocchi | 3606244 | 2008-06-08 13:07:18 +0200 | [diff] [blame] | 3943 | * The P4 platform supports up to 256 APIC IDs on two separate APIC |
| 3944 | * buses (one for LAPICs, one for IOAPICs), where predecessors only |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3945 | * supports up to 16 on one shared APIC bus. |
Paolo Ciarrocchi | 3606244 | 2008-06-08 13:07:18 +0200 | [diff] [blame] | 3946 | * |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3947 | * TBD: Expand LAPIC/IOAPIC support on P4-class systems to take full |
| 3948 | * advantage of new APIC bus architecture. |
| 3949 | */ |
| 3950 | |
| 3951 | if (physids_empty(apic_id_map)) |
Ingo Molnar | d190cb8 | 2009-01-28 06:50:47 +0100 | [diff] [blame] | 3952 | apic_id_map = apic->ioapic_phys_id_map(phys_cpu_present_map); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3953 | |
| 3954 | spin_lock_irqsave(&ioapic_lock, flags); |
| 3955 | reg_00.raw = io_apic_read(ioapic, 0); |
| 3956 | spin_unlock_irqrestore(&ioapic_lock, flags); |
| 3957 | |
| 3958 | if (apic_id >= get_physical_broadcast()) { |
| 3959 | printk(KERN_WARNING "IOAPIC[%d]: Invalid apic_id %d, trying " |
| 3960 | "%d\n", ioapic, apic_id, reg_00.bits.ID); |
| 3961 | apic_id = reg_00.bits.ID; |
| 3962 | } |
| 3963 | |
| 3964 | /* |
Paolo Ciarrocchi | 3606244 | 2008-06-08 13:07:18 +0200 | [diff] [blame] | 3965 | * Every APIC in a system must have a unique ID or we get lots of nice |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3966 | * 'stuck on smp_invalidate_needed IPI wait' messages. |
| 3967 | */ |
Ingo Molnar | d1d7cae | 2009-01-28 05:41:42 +0100 | [diff] [blame] | 3968 | if (apic->check_apicid_used(apic_id_map, apic_id)) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3969 | |
| 3970 | for (i = 0; i < get_physical_broadcast(); i++) { |
Ingo Molnar | d1d7cae | 2009-01-28 05:41:42 +0100 | [diff] [blame] | 3971 | if (!apic->check_apicid_used(apic_id_map, i)) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3972 | break; |
| 3973 | } |
| 3974 | |
| 3975 | if (i == get_physical_broadcast()) |
| 3976 | panic("Max apic_id exceeded!\n"); |
| 3977 | |
| 3978 | printk(KERN_WARNING "IOAPIC[%d]: apic_id %d already used, " |
| 3979 | "trying %d\n", ioapic, apic_id, i); |
| 3980 | |
| 3981 | apic_id = i; |
Paolo Ciarrocchi | 3606244 | 2008-06-08 13:07:18 +0200 | [diff] [blame] | 3982 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3983 | |
Ingo Molnar | 8058714 | 2009-01-28 06:50:47 +0100 | [diff] [blame] | 3984 | tmp = apic->apicid_to_cpu_present(apic_id); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3985 | physids_or(apic_id_map, apic_id_map, tmp); |
| 3986 | |
| 3987 | if (reg_00.bits.ID != apic_id) { |
| 3988 | reg_00.bits.ID = apic_id; |
| 3989 | |
| 3990 | spin_lock_irqsave(&ioapic_lock, flags); |
| 3991 | io_apic_write(ioapic, 0, reg_00.raw); |
| 3992 | reg_00.raw = io_apic_read(ioapic, 0); |
| 3993 | spin_unlock_irqrestore(&ioapic_lock, flags); |
| 3994 | |
| 3995 | /* Sanity check */ |
Andreas Deresch | 6070f9e | 2006-02-26 04:18:34 +0100 | [diff] [blame] | 3996 | if (reg_00.bits.ID != apic_id) { |
| 3997 | printk("IOAPIC[%d]: Unable to change apic_id!\n", ioapic); |
| 3998 | return -1; |
| 3999 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 4000 | } |
| 4001 | |
| 4002 | apic_printk(APIC_VERBOSE, KERN_INFO |
| 4003 | "IOAPIC[%d]: Assigned apic_id %d\n", ioapic, apic_id); |
| 4004 | |
| 4005 | return apic_id; |
| 4006 | } |
Naga Chumbalkar | 58f892e | 2009-05-26 21:48:07 +0000 | [diff] [blame] | 4007 | #endif |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 4008 | |
Paolo Ciarrocchi | 3606244 | 2008-06-08 13:07:18 +0200 | [diff] [blame] | 4009 | int __init io_apic_get_version(int ioapic) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 4010 | { |
| 4011 | union IO_APIC_reg_01 reg_01; |
| 4012 | unsigned long flags; |
| 4013 | |
| 4014 | spin_lock_irqsave(&ioapic_lock, flags); |
| 4015 | reg_01.raw = io_apic_read(ioapic, 1); |
| 4016 | spin_unlock_irqrestore(&ioapic_lock, flags); |
| 4017 | |
| 4018 | return reg_01.bits.version; |
| 4019 | } |
| 4020 | |
Shaohua Li | 61fd47e | 2007-11-17 01:05:28 -0500 | [diff] [blame] | 4021 | int acpi_get_override_irq(int bus_irq, int *trigger, int *polarity) |
| 4022 | { |
| 4023 | int i; |
| 4024 | |
| 4025 | if (skip_ioapic_setup) |
| 4026 | return -1; |
| 4027 | |
| 4028 | for (i = 0; i < mp_irq_entries; i++) |
Jaswinder Singh Rajput | c2c2174 | 2009-01-12 17:47:22 +0530 | [diff] [blame] | 4029 | if (mp_irqs[i].irqtype == mp_INT && |
| 4030 | mp_irqs[i].srcbusirq == bus_irq) |
Shaohua Li | 61fd47e | 2007-11-17 01:05:28 -0500 | [diff] [blame] | 4031 | break; |
| 4032 | if (i >= mp_irq_entries) |
| 4033 | return -1; |
| 4034 | |
| 4035 | *trigger = irq_trigger(i); |
| 4036 | *polarity = irq_polarity(i); |
| 4037 | return 0; |
| 4038 | } |
| 4039 | |
Len Brown | 888ba6c | 2005-08-24 12:07:20 -0400 | [diff] [blame] | 4040 | #endif /* CONFIG_ACPI */ |
Rusty Russell | 1a3f239 | 2006-09-26 10:52:32 +0200 | [diff] [blame] | 4041 | |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 4042 | /* |
| 4043 | * This function currently is only a helper for the i386 smp boot process where |
| 4044 | * we need to reprogram the ioredtbls to cater for the cpus which have come online |
Ingo Molnar | fe402e1 | 2009-01-28 04:32:51 +0100 | [diff] [blame] | 4045 | * so mask in all cases should simply be apic->target_cpus() |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 4046 | */ |
| 4047 | #ifdef CONFIG_SMP |
| 4048 | void __init setup_ioapic_dest(void) |
| 4049 | { |
Yinghai Lu | b9c61b70 | 2009-05-06 10:10:06 -0700 | [diff] [blame] | 4050 | int pin, ioapic = 0, irq, irq_entry; |
Thomas Gleixner | 6c2e940 | 2008-11-07 12:33:49 +0100 | [diff] [blame] | 4051 | struct irq_desc *desc; |
Mike Travis | 22f65d3 | 2008-12-16 17:33:56 -0800 | [diff] [blame] | 4052 | const struct cpumask *mask; |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 4053 | |
| 4054 | if (skip_ioapic_setup == 1) |
| 4055 | return; |
| 4056 | |
Yinghai Lu | b9c61b70 | 2009-05-06 10:10:06 -0700 | [diff] [blame] | 4057 | #ifdef CONFIG_ACPI |
| 4058 | if (!acpi_disabled && acpi_ioapic) { |
| 4059 | ioapic = mp_find_ioapic(0); |
| 4060 | if (ioapic < 0) |
| 4061 | ioapic = 0; |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 4062 | } |
Yinghai Lu | b9c61b70 | 2009-05-06 10:10:06 -0700 | [diff] [blame] | 4063 | #endif |
| 4064 | |
| 4065 | for (pin = 0; pin < nr_ioapic_registers[ioapic]; pin++) { |
| 4066 | irq_entry = find_irq_entry(ioapic, pin, mp_INT); |
| 4067 | if (irq_entry == -1) |
| 4068 | continue; |
| 4069 | irq = pin_2_irq(irq_entry, ioapic, pin); |
| 4070 | |
| 4071 | desc = irq_to_desc(irq); |
| 4072 | |
| 4073 | /* |
| 4074 | * Honour affinities which have been set in early boot |
| 4075 | */ |
| 4076 | if (desc->status & |
| 4077 | (IRQ_NO_BALANCING | IRQ_AFFINITY_SET)) |
| 4078 | mask = desc->affinity; |
| 4079 | else |
| 4080 | mask = apic->target_cpus(); |
| 4081 | |
| 4082 | if (intr_remapping_enabled) |
| 4083 | set_ir_ioapic_affinity_irq_desc(desc, mask); |
| 4084 | else |
| 4085 | set_ioapic_affinity_irq_desc(desc, mask); |
| 4086 | } |
| 4087 | |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 4088 | } |
| 4089 | #endif |
| 4090 | |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 4091 | #define IOAPIC_RESOURCE_NAME_SIZE 11 |
| 4092 | |
| 4093 | static struct resource *ioapic_resources; |
| 4094 | |
| 4095 | static struct resource * __init ioapic_setup_resources(void) |
| 4096 | { |
| 4097 | unsigned long n; |
| 4098 | struct resource *res; |
| 4099 | char *mem; |
| 4100 | int i; |
| 4101 | |
| 4102 | if (nr_ioapics <= 0) |
| 4103 | return NULL; |
| 4104 | |
| 4105 | n = IOAPIC_RESOURCE_NAME_SIZE + sizeof(struct resource); |
| 4106 | n *= nr_ioapics; |
| 4107 | |
| 4108 | mem = alloc_bootmem(n); |
| 4109 | res = (void *)mem; |
| 4110 | |
| 4111 | if (mem != NULL) { |
| 4112 | mem += sizeof(struct resource) * nr_ioapics; |
| 4113 | |
| 4114 | for (i = 0; i < nr_ioapics; i++) { |
| 4115 | res[i].name = mem; |
| 4116 | res[i].flags = IORESOURCE_MEM | IORESOURCE_BUSY; |
| 4117 | sprintf(mem, "IOAPIC %u", i); |
| 4118 | mem += IOAPIC_RESOURCE_NAME_SIZE; |
| 4119 | } |
| 4120 | } |
| 4121 | |
| 4122 | ioapic_resources = res; |
| 4123 | |
| 4124 | return res; |
| 4125 | } |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 4126 | |
Yinghai Lu | f3294a3 | 2008-06-27 01:41:56 -0700 | [diff] [blame] | 4127 | void __init ioapic_init_mappings(void) |
| 4128 | { |
| 4129 | unsigned long ioapic_phys, idx = FIX_IO_APIC_BASE_0; |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 4130 | struct resource *ioapic_res; |
Thomas Gleixner | d6c88a5 | 2008-10-15 15:27:23 +0200 | [diff] [blame] | 4131 | int i; |
Yinghai Lu | f3294a3 | 2008-06-27 01:41:56 -0700 | [diff] [blame] | 4132 | |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 4133 | ioapic_res = ioapic_setup_resources(); |
Yinghai Lu | f3294a3 | 2008-06-27 01:41:56 -0700 | [diff] [blame] | 4134 | for (i = 0; i < nr_ioapics; i++) { |
| 4135 | if (smp_found_config) { |
Jaswinder Singh Rajput | b5ba7e6 | 2009-01-12 17:46:17 +0530 | [diff] [blame] | 4136 | ioapic_phys = mp_ioapics[i].apicaddr; |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 4137 | #ifdef CONFIG_X86_32 |
Thomas Gleixner | d6c88a5 | 2008-10-15 15:27:23 +0200 | [diff] [blame] | 4138 | if (!ioapic_phys) { |
| 4139 | printk(KERN_ERR |
| 4140 | "WARNING: bogus zero IO-APIC " |
| 4141 | "address found in MPTABLE, " |
| 4142 | "disabling IO/APIC support!\n"); |
| 4143 | smp_found_config = 0; |
| 4144 | skip_ioapic_setup = 1; |
| 4145 | goto fake_ioapic_page; |
| 4146 | } |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 4147 | #endif |
Yinghai Lu | f3294a3 | 2008-06-27 01:41:56 -0700 | [diff] [blame] | 4148 | } else { |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 4149 | #ifdef CONFIG_X86_32 |
Yinghai Lu | f3294a3 | 2008-06-27 01:41:56 -0700 | [diff] [blame] | 4150 | fake_ioapic_page: |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 4151 | #endif |
Yinghai Lu | f3294a3 | 2008-06-27 01:41:56 -0700 | [diff] [blame] | 4152 | ioapic_phys = (unsigned long) |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 4153 | alloc_bootmem_pages(PAGE_SIZE); |
Yinghai Lu | f3294a3 | 2008-06-27 01:41:56 -0700 | [diff] [blame] | 4154 | ioapic_phys = __pa(ioapic_phys); |
| 4155 | } |
| 4156 | set_fixmap_nocache(idx, ioapic_phys); |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 4157 | apic_printk(APIC_VERBOSE, |
| 4158 | "mapped IOAPIC to %08lx (%08lx)\n", |
| 4159 | __fix_to_virt(idx), ioapic_phys); |
Yinghai Lu | f3294a3 | 2008-06-27 01:41:56 -0700 | [diff] [blame] | 4160 | idx++; |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 4161 | |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 4162 | if (ioapic_res != NULL) { |
| 4163 | ioapic_res->start = ioapic_phys; |
| 4164 | ioapic_res->end = ioapic_phys + (4 * 1024) - 1; |
| 4165 | ioapic_res++; |
| 4166 | } |
Yinghai Lu | f3294a3 | 2008-06-27 01:41:56 -0700 | [diff] [blame] | 4167 | } |
| 4168 | } |
| 4169 | |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 4170 | static int __init ioapic_insert_resources(void) |
| 4171 | { |
| 4172 | int i; |
| 4173 | struct resource *r = ioapic_resources; |
| 4174 | |
| 4175 | if (!r) { |
Bartlomiej Zolnierkiewicz | 04c93ce | 2009-03-20 21:02:55 +0100 | [diff] [blame] | 4176 | if (nr_ioapics > 0) { |
| 4177 | printk(KERN_ERR |
| 4178 | "IO APIC resources couldn't be allocated.\n"); |
| 4179 | return -1; |
| 4180 | } |
| 4181 | return 0; |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 4182 | } |
| 4183 | |
| 4184 | for (i = 0; i < nr_ioapics; i++) { |
| 4185 | insert_resource(&iomem_resource, r); |
| 4186 | r++; |
| 4187 | } |
| 4188 | |
| 4189 | return 0; |
| 4190 | } |
| 4191 | |
| 4192 | /* Insert the IO APIC resources after PCI initialization has occured to handle |
| 4193 | * IO APICS that are mapped in on a BAR in PCI space. */ |
| 4194 | late_initcall(ioapic_insert_resources); |