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Kalle Valo5e3dd152013-06-12 20:52:10 +03001/*
2 * Copyright (c) 2005-2011 Atheros Communications Inc.
3 * Copyright (c) 2011-2013 Qualcomm Atheros, Inc.
4 *
5 * Permission to use, copy, modify, and/or distribute this software for any
6 * purpose with or without fee is hereby granted, provided that the above
7 * copyright notice and this permission notice appear in all copies.
8 *
9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
10 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
11 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
12 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
13 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
14 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
15 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
16 */
17
18#ifndef _CORE_H_
19#define _CORE_H_
20
21#include <linux/completion.h>
22#include <linux/if_ether.h>
23#include <linux/types.h>
24#include <linux/pci.h>
25
Michal Kazioredb82362013-07-05 16:15:14 +030026#include "htt.h"
Kalle Valo5e3dd152013-06-12 20:52:10 +030027#include "htc.h"
28#include "hw.h"
29#include "targaddrs.h"
30#include "wmi.h"
31#include "../ath.h"
32#include "../regd.h"
Janusz Dziedzic9702c682013-11-20 09:59:41 +020033#include "../dfs_pattern_detector.h"
Kalle Valo5e3dd152013-06-12 20:52:10 +030034
35#define MS(_v, _f) (((_v) & _f##_MASK) >> _f##_LSB)
36#define SM(_v, _f) (((_v) << _f##_LSB) & _f##_MASK)
37#define WO(_f) ((_f##_OFFSET) >> 2)
38
39#define ATH10K_SCAN_ID 0
40#define WMI_READY_TIMEOUT (5 * HZ)
41#define ATH10K_FLUSH_TIMEOUT_HZ (5*HZ)
Michal Kazior2e1dea42013-07-31 10:32:40 +020042#define ATH10K_NUM_CHANS 38
Kalle Valo5e3dd152013-06-12 20:52:10 +030043
44/* Antenna noise floor */
45#define ATH10K_DEFAULT_NOISE_FLOOR -95
46
Bartosz Markowski71098612013-11-14 09:01:15 +010047#define ATH10K_MAX_NUM_MGMT_PENDING 128
Bartosz Markowski5e00d312013-09-26 17:47:12 +020048
Kalle Valo5a13e762014-01-20 11:01:46 +020049/* number of failed packets */
50#define ATH10K_KICKOUT_THRESHOLD 50
51
52/*
53 * Use insanely high numbers to make sure that the firmware implementation
54 * won't start, we have the same functionality already in hostapd. Unit
55 * is seconds.
56 */
57#define ATH10K_KEEPALIVE_MIN_IDLE 3747
58#define ATH10K_KEEPALIVE_MAX_IDLE 3895
59#define ATH10K_KEEPALIVE_MAX_UNRESPONSIVE 3900
60
Kalle Valo5e3dd152013-06-12 20:52:10 +030061struct ath10k;
62
Kalle Valo5e3dd152013-06-12 20:52:10 +030063struct ath10k_skb_cb {
64 dma_addr_t paddr;
65 bool is_mapped;
66 bool is_aborted;
Bartosz Markowski5e00d312013-09-26 17:47:12 +020067 u8 vdev_id;
Kalle Valo5e3dd152013-06-12 20:52:10 +030068
69 struct {
Kalle Valo5e3dd152013-06-12 20:52:10 +030070 u8 tid;
71 bool is_offchan;
Michal Kazior1f8bb152013-09-18 14:43:22 +020072
73 u8 frag_len;
74 u8 pad_len;
Kalle Valo5e3dd152013-06-12 20:52:10 +030075 } __packed htt;
Michal Kazior748afc42014-01-23 12:48:21 +010076
77 struct {
78 bool dtim_zero;
79 bool deliver_cab;
80 } bcn;
Kalle Valo5e3dd152013-06-12 20:52:10 +030081} __packed;
82
83static inline struct ath10k_skb_cb *ATH10K_SKB_CB(struct sk_buff *skb)
84{
85 BUILD_BUG_ON(sizeof(struct ath10k_skb_cb) >
86 IEEE80211_TX_INFO_DRIVER_DATA_SIZE);
87 return (struct ath10k_skb_cb *)&IEEE80211_SKB_CB(skb)->driver_data;
88}
89
90static inline int ath10k_skb_map(struct device *dev, struct sk_buff *skb)
91{
92 if (ATH10K_SKB_CB(skb)->is_mapped)
93 return -EINVAL;
94
95 ATH10K_SKB_CB(skb)->paddr = dma_map_single(dev, skb->data, skb->len,
96 DMA_TO_DEVICE);
97
98 if (unlikely(dma_mapping_error(dev, ATH10K_SKB_CB(skb)->paddr)))
99 return -EIO;
100
101 ATH10K_SKB_CB(skb)->is_mapped = true;
102 return 0;
103}
104
105static inline int ath10k_skb_unmap(struct device *dev, struct sk_buff *skb)
106{
107 if (!ATH10K_SKB_CB(skb)->is_mapped)
108 return -EINVAL;
109
110 dma_unmap_single(dev, ATH10K_SKB_CB(skb)->paddr, skb->len,
111 DMA_TO_DEVICE);
112 ATH10K_SKB_CB(skb)->is_mapped = false;
113 return 0;
114}
115
116static inline u32 host_interest_item_address(u32 item_offset)
117{
118 return QCA988X_HOST_INTEREST_ADDRESS + item_offset;
119}
120
121struct ath10k_bmi {
122 bool done_sent;
123};
124
Bartosz Markowskib3effe62013-09-26 17:47:11 +0200125#define ATH10K_MAX_MEM_REQS 16
126
127struct ath10k_mem_chunk {
128 void *vaddr;
129 dma_addr_t paddr;
130 u32 len;
131 u32 req_id;
132};
133
Kalle Valo5e3dd152013-06-12 20:52:10 +0300134struct ath10k_wmi {
135 enum ath10k_htc_ep_id eid;
136 struct completion service_ready;
137 struct completion unified_ready;
Michal Kaziorbe8b3942013-09-13 14:16:54 +0200138 wait_queue_head_t tx_credits_wq;
Bartosz Markowskice428702013-09-26 17:47:05 +0200139 struct wmi_cmd_map *cmd;
Bartosz Markowski6d1506e2013-09-26 17:47:15 +0200140 struct wmi_vdev_param_map *vdev_param;
Bartosz Markowski226a3392013-09-26 17:47:16 +0200141 struct wmi_pdev_param_map *pdev_param;
Bartosz Markowskib3effe62013-09-26 17:47:11 +0200142
143 u32 num_mem_chunks;
144 struct ath10k_mem_chunk mem_chunks[ATH10K_MAX_MEM_REQS];
Kalle Valo5e3dd152013-06-12 20:52:10 +0300145};
146
147struct ath10k_peer_stat {
148 u8 peer_macaddr[ETH_ALEN];
149 u32 peer_rssi;
150 u32 peer_tx_rate;
151};
152
153struct ath10k_target_stats {
154 /* PDEV stats */
155 s32 ch_noise_floor;
156 u32 tx_frame_count;
157 u32 rx_frame_count;
158 u32 rx_clear_count;
159 u32 cycle_count;
160 u32 phy_err_count;
161 u32 chan_tx_power;
162
163 /* PDEV TX stats */
164 s32 comp_queued;
165 s32 comp_delivered;
166 s32 msdu_enqued;
167 s32 mpdu_enqued;
168 s32 wmm_drop;
169 s32 local_enqued;
170 s32 local_freed;
171 s32 hw_queued;
172 s32 hw_reaped;
173 s32 underrun;
174 s32 tx_abort;
175 s32 mpdus_requed;
176 u32 tx_ko;
177 u32 data_rc;
178 u32 self_triggers;
179 u32 sw_retry_failure;
180 u32 illgl_rate_phy_err;
181 u32 pdev_cont_xretry;
182 u32 pdev_tx_timeout;
183 u32 pdev_resets;
184 u32 phy_underrun;
185 u32 txop_ovf;
186
187 /* PDEV RX stats */
188 s32 mid_ppdu_route_change;
189 s32 status_rcvd;
190 s32 r0_frags;
191 s32 r1_frags;
192 s32 r2_frags;
193 s32 r3_frags;
194 s32 htt_msdus;
195 s32 htt_mpdus;
196 s32 loc_msdus;
197 s32 loc_mpdus;
198 s32 oversize_amsdu;
199 s32 phy_errs;
200 s32 phy_err_drop;
201 s32 mpdu_errs;
202
203 /* VDEV STATS */
204
205 /* PEER STATS */
206 u8 peers;
207 struct ath10k_peer_stat peer_stat[TARGET_NUM_PEERS];
208
209 /* TODO: Beacon filter stats */
210
211};
212
Janusz Dziedzic9702c682013-11-20 09:59:41 +0200213struct ath10k_dfs_stats {
214 u32 phy_errors;
215 u32 pulses_total;
216 u32 pulses_detected;
217 u32 pulses_discarded;
218 u32 radar_detected;
219};
220
Kalle Valo5e3dd152013-06-12 20:52:10 +0300221#define ATH10K_MAX_NUM_PEER_IDS (1 << 11) /* htt rx_desc limit */
222
223struct ath10k_peer {
224 struct list_head list;
225 int vdev_id;
226 u8 addr[ETH_ALEN];
227 DECLARE_BITMAP(peer_ids, ATH10K_MAX_NUM_PEER_IDS);
228 struct ieee80211_key_conf *keys[WMI_MAX_KEY_INDEX + 1];
229};
230
Michal Kazior9797feb2014-02-14 14:49:48 +0100231struct ath10k_sta {
232 struct ath10k_vif *arvif;
233
234 /* the following are protected by ar->data_lock */
235 u32 changed; /* IEEE80211_RC_* */
236 u32 bw;
237 u32 nss;
238 u32 smps;
239
240 struct work_struct update_wk;
241};
242
Kalle Valo5e3dd152013-06-12 20:52:10 +0300243#define ATH10K_VDEV_SETUP_TIMEOUT_HZ (5*HZ)
244
245struct ath10k_vif {
Michal Kazior05791192013-10-16 15:44:45 +0300246 struct list_head list;
247
Kalle Valo5e3dd152013-06-12 20:52:10 +0300248 u32 vdev_id;
249 enum wmi_vdev_type vdev_type;
250 enum wmi_vdev_subtype vdev_subtype;
251 u32 beacon_interval;
252 u32 dtim_period;
Michal Kaziored543882013-09-13 14:16:56 +0200253 struct sk_buff *beacon;
Michal Kazior748afc42014-01-23 12:48:21 +0100254 /* protected by data_lock */
255 bool beacon_sent;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300256
257 struct ath10k *ar;
258 struct ieee80211_vif *vif;
259
Michal Kaziorc930f742014-01-23 11:38:25 +0100260 bool is_started;
261 bool is_up;
262 u32 aid;
263 u8 bssid[ETH_ALEN];
264
Michal Kaziorcc4827b2013-10-16 15:44:45 +0300265 struct work_struct wep_key_work;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300266 struct ieee80211_key_conf *wep_keys[WMI_MAX_KEY_INDEX + 1];
Michal Kaziorcc4827b2013-10-16 15:44:45 +0300267 u8 def_wep_key_idx;
268 u8 def_wep_key_newidx;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300269
270 u16 tx_seq_no;
271
272 union {
273 struct {
Kalle Valo5e3dd152013-06-12 20:52:10 +0300274 u32 uapsd;
275 } sta;
276 struct {
277 /* 127 stations; wmi limit */
278 u8 tim_bitmap[16];
279 u8 tim_len;
280 u32 ssid_len;
281 u8 ssid[IEEE80211_MAX_SSID_LEN];
282 bool hidden_ssid;
283 /* P2P_IE with NoA attribute for P2P_GO case */
284 u32 noa_len;
285 u8 *noa_data;
286 } ap;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300287 } u;
Janusz Dziedzic51ab1a02014-01-08 09:08:33 +0100288
289 u8 fixed_rate;
290 u8 fixed_nss;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300291};
292
293struct ath10k_vif_iter {
294 u32 vdev_id;
295 struct ath10k_vif *arvif;
296};
297
298struct ath10k_debug {
299 struct dentry *debugfs_phy;
300
301 struct ath10k_target_stats target_stats;
302 u32 wmi_service_bitmap[WMI_SERVICE_BM_SIZE];
303
304 struct completion event_stats_compl;
Kalle Valoa3d135e2013-09-03 11:44:10 +0300305
306 unsigned long htt_stats_mask;
307 struct delayed_work htt_stats_dwork;
Janusz Dziedzic9702c682013-11-20 09:59:41 +0200308 struct ath10k_dfs_stats dfs_stats;
309 struct ath_dfs_pool_stats dfs_pool_stats;
Kalle Valof118a3e2014-01-03 12:59:31 +0200310
311 u32 fw_dbglog_mask;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300312};
313
Michal Kaziorf7843d72013-07-16 09:38:52 +0200314enum ath10k_state {
315 ATH10K_STATE_OFF = 0,
316 ATH10K_STATE_ON,
Michal Kazioraffd3212013-07-16 09:54:35 +0200317
318 /* When doing firmware recovery the device is first powered down.
319 * mac80211 is supposed to call in to start() hook later on. It is
320 * however possible that driver unloading and firmware crash overlap.
321 * mac80211 can wait on conf_mutex in stop() while the device is
322 * stopped in ath10k_core_restart() work holding conf_mutex. The state
323 * RESTARTED means that the device is up and mac80211 has started hw
324 * reconfiguration. Once mac80211 is done with the reconfiguration we
325 * set the state to STATE_ON in restart_complete(). */
326 ATH10K_STATE_RESTARTING,
327 ATH10K_STATE_RESTARTED,
328
329 /* The device has crashed while restarting hw. This state is like ON
330 * but commands are blocked in HTC and -ECOMM response is given. This
331 * prevents completion timeouts and makes the driver more responsive to
332 * userspace commands. This is also prevents recursive recovery. */
333 ATH10K_STATE_WEDGED,
Michal Kaziorf7843d72013-07-16 09:38:52 +0200334};
335
Michal Kazior0d9b0432013-08-09 10:13:33 +0200336enum ath10k_fw_features {
337 /* wmi_mgmt_rx_hdr contains extra RSSI information */
338 ATH10K_FW_FEATURE_EXT_WMI_MGMT_RX = 0,
339
Bartosz Markowskice428702013-09-26 17:47:05 +0200340 /* firmware from 10X branch */
341 ATH10K_FW_FEATURE_WMI_10X = 1,
342
Bartosz Markowski5e00d312013-09-26 17:47:12 +0200343 /* firmware support tx frame management over WMI, otherwise it's HTT */
344 ATH10K_FW_FEATURE_HAS_WMI_MGMT_TX = 2,
345
Bartosz Markowskid3541812013-12-10 16:20:40 +0100346 /* Firmware does not support P2P */
347 ATH10K_FW_FEATURE_NO_P2P = 3,
348
Michal Kazior0d9b0432013-08-09 10:13:33 +0200349 /* keep last */
350 ATH10K_FW_FEATURE_COUNT,
351};
352
Marek Puzyniake8a50f82013-11-20 09:59:47 +0200353enum ath10k_dev_flags {
354 /* Indicates that ath10k device is during CAC phase of DFS */
355 ATH10K_CAC_RUNNING,
Kalle Valo650b91f2013-11-20 10:00:49 +0200356 ATH10K_FLAG_FIRST_BOOT_DONE,
Marek Puzyniake8a50f82013-11-20 09:59:47 +0200357};
358
Kalle Valo5e3dd152013-06-12 20:52:10 +0300359struct ath10k {
360 struct ath_common ath_common;
361 struct ieee80211_hw *hw;
362 struct device *dev;
363 u8 mac_addr[ETH_ALEN];
364
Kalle Valoe01ae682013-09-01 11:22:14 +0300365 u32 chip_id;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300366 u32 target_version;
367 u8 fw_version_major;
368 u32 fw_version_minor;
369 u16 fw_version_release;
370 u16 fw_version_build;
371 u32 phy_capability;
372 u32 hw_min_tx_power;
373 u32 hw_max_tx_power;
374 u32 ht_cap_info;
375 u32 vht_cap_info;
Michal Kazior8865bee42013-07-24 12:36:46 +0200376 u32 num_rf_chains;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300377
Michal Kazior0d9b0432013-08-09 10:13:33 +0200378 DECLARE_BITMAP(fw_features, ATH10K_FW_FEATURE_COUNT);
379
Kalle Valo5e3dd152013-06-12 20:52:10 +0300380 struct targetdef *targetdef;
381 struct hostdef *hostdef;
382
383 bool p2p;
384
385 struct {
386 void *priv;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300387 const struct ath10k_hif_ops *ops;
388 } hif;
389
Marek Puzyniak9042e172014-02-10 17:14:23 +0100390 struct completion target_suspend;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300391
392 struct ath10k_bmi bmi;
Michal Kazioredb82362013-07-05 16:15:14 +0300393 struct ath10k_wmi wmi;
Michal Kaziorcd003fa2013-07-05 16:15:13 +0300394 struct ath10k_htc htc;
Michal Kazioredb82362013-07-05 16:15:14 +0300395 struct ath10k_htt htt;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300396
397 struct ath10k_hw_params {
398 u32 id;
399 const char *name;
400 u32 patch_load_addr;
401
402 struct ath10k_hw_params_fw {
403 const char *dir;
404 const char *fw;
405 const char *otp;
406 const char *board;
407 } fw;
408 } hw_params;
409
Kalle Valo36527912013-09-27 19:54:55 +0300410 const struct firmware *board;
Kalle Valo958df3a2013-09-27 19:55:01 +0300411 const void *board_data;
412 size_t board_len;
413
Michal Kazior29385052013-07-16 09:38:58 +0200414 const struct firmware *otp;
Kalle Valo958df3a2013-09-27 19:55:01 +0300415 const void *otp_data;
416 size_t otp_len;
417
Michal Kazior29385052013-07-16 09:38:58 +0200418 const struct firmware *firmware;
Kalle Valo958df3a2013-09-27 19:55:01 +0300419 const void *firmware_data;
420 size_t firmware_len;
Michal Kazior29385052013-07-16 09:38:58 +0200421
Kalle Valo1a222432013-09-27 19:55:07 +0300422 int fw_api;
423
Kalle Valo5e3dd152013-06-12 20:52:10 +0300424 struct {
425 struct completion started;
426 struct completion completed;
427 struct completion on_channel;
428 struct timer_list timeout;
429 bool is_roc;
430 bool in_progress;
431 bool aborting;
432 int vdev_id;
433 int roc_freq;
434 } scan;
435
436 struct {
437 struct ieee80211_supported_band sbands[IEEE80211_NUM_BANDS];
438 } mac;
439
440 /* should never be NULL; needed for regular htt rx */
441 struct ieee80211_channel *rx_channel;
442
443 /* valid during scan; needed for mgmt rx during scan */
444 struct ieee80211_channel *scan_channel;
445
Michal Kaziorc930f742014-01-23 11:38:25 +0100446 /* current operating channel definition */
447 struct cfg80211_chan_def chandef;
448
Kalle Valo5e3dd152013-06-12 20:52:10 +0300449 int free_vdev_map;
450 int monitor_vdev_id;
451 bool monitor_enabled;
452 bool monitor_present;
453 unsigned int filter_flags;
Marek Puzyniake8a50f82013-11-20 09:59:47 +0200454 unsigned long dev_flags;
Marek Puzyniak7d9b40b2013-11-20 10:00:28 +0200455 u32 dfs_block_radar_events;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300456
457 struct wmi_pdev_set_wmm_params_arg wmm_params;
458 struct completion install_key_done;
459
460 struct completion vdev_setup_done;
461
462 struct workqueue_struct *workqueue;
463
464 /* prevents concurrent FW reconfiguration */
465 struct mutex conf_mutex;
466
467 /* protects shared structure data */
468 spinlock_t data_lock;
469
Michal Kazior05791192013-10-16 15:44:45 +0300470 struct list_head arvifs;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300471 struct list_head peers;
472 wait_queue_head_t peer_mapping_wq;
473
Bartosz Markowski0e759f32014-01-02 14:38:33 +0100474 /* number of created peers; protected by data_lock */
475 int num_peers;
476
Kalle Valo5e3dd152013-06-12 20:52:10 +0300477 struct work_struct offchan_tx_work;
478 struct sk_buff_head offchan_tx_queue;
479 struct completion offchan_tx_completed;
480 struct sk_buff *offchan_tx_skb;
481
Bartosz Markowski5e00d312013-09-26 17:47:12 +0200482 struct work_struct wmi_mgmt_tx_work;
483 struct sk_buff_head wmi_mgmt_tx_queue;
484
Michal Kaziorf7843d72013-07-16 09:38:52 +0200485 enum ath10k_state state;
486
Michal Kazioraffd3212013-07-16 09:54:35 +0200487 struct work_struct restart_work;
488
Michal Kazior2e1dea42013-07-31 10:32:40 +0200489 /* cycle count is reported twice for each visited channel during scan.
490 * access protected by data_lock */
491 u32 survey_last_rx_clear_count;
492 u32 survey_last_cycle_count;
493 struct survey_info survey[ATH10K_NUM_CHANS];
494
Janusz Dziedzic9702c682013-11-20 09:59:41 +0200495 struct dfs_pattern_detector *dfs_detector;
496
Kalle Valo5e3dd152013-06-12 20:52:10 +0300497#ifdef CONFIG_ATH10K_DEBUGFS
498 struct ath10k_debug debug;
499#endif
500};
501
502struct ath10k *ath10k_core_create(void *hif_priv, struct device *dev,
Kalle Valo5e3dd152013-06-12 20:52:10 +0300503 const struct ath10k_hif_ops *hif_ops);
504void ath10k_core_destroy(struct ath10k *ar);
505
Michal Kaziordd30a362013-07-16 09:38:51 +0200506int ath10k_core_start(struct ath10k *ar);
Marek Puzyniak00f54822014-02-10 17:14:24 +0100507int ath10k_wait_for_suspend(struct ath10k *ar, u32 suspend_opt);
Michal Kaziordd30a362013-07-16 09:38:51 +0200508void ath10k_core_stop(struct ath10k *ar);
Kalle Valoe01ae682013-09-01 11:22:14 +0300509int ath10k_core_register(struct ath10k *ar, u32 chip_id);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300510void ath10k_core_unregister(struct ath10k *ar);
511
Kalle Valo5e3dd152013-06-12 20:52:10 +0300512#endif /* _CORE_H_ */