Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1 | /************************************************************************** |
| 2 | * |
| 3 | * Copyright (C) 2000-2008 Alacritech, Inc. All rights reserved. |
| 4 | * |
| 5 | * Redistribution and use in source and binary forms, with or without |
| 6 | * modification, are permitted provided that the following conditions |
| 7 | * are met: |
| 8 | * |
| 9 | * 1. Redistributions of source code must retain the above copyright |
| 10 | * notice, this list of conditions and the following disclaimer. |
| 11 | * 2. Redistributions in binary form must reproduce the above |
| 12 | * copyright notice, this list of conditions and the following |
| 13 | * disclaimer in the documentation and/or other materials provided |
| 14 | * with the distribution. |
| 15 | * |
| 16 | * THIS SOFTWARE IS PROVIDED BY ALACRITECH, INC. ``AS IS'' AND ANY |
| 17 | * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
| 18 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR |
| 19 | * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL ALACRITECH, INC. OR |
| 20 | * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, |
| 21 | * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT |
| 22 | * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF |
| 23 | * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND |
| 24 | * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
| 25 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT |
| 26 | * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF |
| 27 | * SUCH DAMAGE. |
| 28 | * |
| 29 | * The views and conclusions contained in the software and documentation |
| 30 | * are those of the authors and should not be interpreted as representing |
| 31 | * official policies, either expressed or implied, of Alacritech, Inc. |
| 32 | * |
Mithlesh Thukral | 0d41472 | 2009-01-19 20:29:59 +0530 | [diff] [blame] | 33 | * Parts developed by LinSysSoft Sahara team |
| 34 | * |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 35 | **************************************************************************/ |
| 36 | |
| 37 | /* |
| 38 | * FILENAME: sxg.c |
| 39 | * |
| 40 | * The SXG driver for Alacritech's 10Gbe products. |
| 41 | * |
| 42 | * NOTE: This is the standard, non-accelerated version of Alacritech's |
| 43 | * IS-NIC driver. |
| 44 | */ |
| 45 | |
| 46 | #include <linux/kernel.h> |
| 47 | #include <linux/string.h> |
| 48 | #include <linux/errno.h> |
| 49 | #include <linux/module.h> |
| 50 | #include <linux/moduleparam.h> |
| 51 | #include <linux/ioport.h> |
| 52 | #include <linux/slab.h> |
| 53 | #include <linux/interrupt.h> |
| 54 | #include <linux/timer.h> |
| 55 | #include <linux/pci.h> |
| 56 | #include <linux/spinlock.h> |
| 57 | #include <linux/init.h> |
| 58 | #include <linux/netdevice.h> |
| 59 | #include <linux/etherdevice.h> |
| 60 | #include <linux/ethtool.h> |
| 61 | #include <linux/skbuff.h> |
| 62 | #include <linux/delay.h> |
| 63 | #include <linux/types.h> |
| 64 | #include <linux/dma-mapping.h> |
| 65 | #include <linux/mii.h> |
Mithlesh Thukral | 0d41472 | 2009-01-19 20:29:59 +0530 | [diff] [blame] | 66 | #include <linux/ip.h> |
| 67 | #include <linux/in.h> |
| 68 | #include <linux/tcp.h> |
| 69 | #include <linux/ipv6.h> |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 70 | |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 71 | #define SLIC_GET_STATS_ENABLED 0 |
| 72 | #define LINUX_FREES_ADAPTER_RESOURCES 1 |
| 73 | #define SXG_OFFLOAD_IP_CHECKSUM 0 |
| 74 | #define SXG_POWER_MANAGEMENT_ENABLED 0 |
| 75 | #define VPCI 0 |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 76 | #define ATK_DEBUG 1 |
| 77 | |
| 78 | #include "sxg_os.h" |
| 79 | #include "sxghw.h" |
| 80 | #include "sxghif.h" |
| 81 | #include "sxg.h" |
| 82 | #include "sxgdbg.h" |
| 83 | |
Mithlesh Thukral | a536efc | 2009-02-18 18:54:14 +0530 | [diff] [blame] | 84 | #include "sxgphycode-1.2.h" |
Mithlesh Thukral | a3915dd | 2009-01-19 20:28:13 +0530 | [diff] [blame] | 85 | #define SXG_UCODE_DBG 0 /* Turn on for debugging */ |
| 86 | #ifdef SXG_UCODE_DBG |
Mithlesh Thukral | a536efc | 2009-02-18 18:54:14 +0530 | [diff] [blame] | 87 | #include "saharadbgdownload-1.71.c" |
| 88 | #include "saharadbgdownloadB-1.10.c" |
Mithlesh Thukral | a3915dd | 2009-01-19 20:28:13 +0530 | [diff] [blame] | 89 | #else |
Mithlesh Thukral | a536efc | 2009-02-18 18:54:14 +0530 | [diff] [blame] | 90 | #include "saharadownload-1.55.c" |
| 91 | #include "saharadownloadB-1.8.c" |
Mithlesh Thukral | a3915dd | 2009-01-19 20:28:13 +0530 | [diff] [blame] | 92 | #endif |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 93 | |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 94 | static int sxg_allocate_buffer_memory(struct adapter_t *adapter, u32 Size, |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 95 | enum sxg_buffer_type BufferType); |
Mithlesh Thukral | 0d41472 | 2009-01-19 20:29:59 +0530 | [diff] [blame] | 96 | static int sxg_allocate_rcvblock_complete(struct adapter_t *adapter, |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 97 | void *RcvBlock, |
| 98 | dma_addr_t PhysicalAddress, |
| 99 | u32 Length); |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 100 | static void sxg_allocate_sgl_buffer_complete(struct adapter_t *adapter, |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 101 | struct sxg_scatter_gather *SxgSgl, |
J.R. Mauro | 5c7514e | 2008-10-05 20:38:52 -0400 | [diff] [blame] | 102 | dma_addr_t PhysicalAddress, |
| 103 | u32 Length); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 104 | |
| 105 | static void sxg_mcast_init_crc32(void); |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 106 | static int sxg_entry_open(struct net_device *dev); |
Mithlesh Thukral | 0d41472 | 2009-01-19 20:29:59 +0530 | [diff] [blame] | 107 | static int sxg_second_open(struct net_device * dev); |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 108 | static int sxg_entry_halt(struct net_device *dev); |
| 109 | static int sxg_ioctl(struct net_device *dev, struct ifreq *rq, int cmd); |
| 110 | static int sxg_send_packets(struct sk_buff *skb, struct net_device *dev); |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 111 | static int sxg_transmit_packet(struct adapter_t *adapter, struct sk_buff *skb); |
Mithlesh Thukral | d9d578b | 2009-01-19 20:23:22 +0530 | [diff] [blame] | 112 | static int sxg_dumb_sgl(struct sxg_x64_sgl *pSgl, |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 113 | struct sxg_scatter_gather *SxgSgl); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 114 | |
Mithlesh Thukral | b62a294 | 2009-01-30 20:19:03 +0530 | [diff] [blame] | 115 | static void sxg_handle_interrupt(struct adapter_t *adapter, int *work_done, |
| 116 | int budget); |
| 117 | static void sxg_interrupt(struct adapter_t *adapter); |
| 118 | static int sxg_poll(struct napi_struct *napi, int budget); |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 119 | static int sxg_process_isr(struct adapter_t *adapter, u32 MessageId); |
Mithlesh Thukral | b62a294 | 2009-01-30 20:19:03 +0530 | [diff] [blame] | 120 | static u32 sxg_process_event_queue(struct adapter_t *adapter, u32 RssId, |
| 121 | int *sxg_napi_continue, int *work_done, int budget); |
Mithlesh Thukral | c5e5cf5 | 2009-02-06 19:31:40 +0530 | [diff] [blame] | 122 | static void sxg_complete_slow_send(struct adapter_t *adapter); |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 123 | static struct sk_buff *sxg_slow_receive(struct adapter_t *adapter, |
| 124 | struct sxg_event *Event); |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 125 | static void sxg_process_rcv_error(struct adapter_t *adapter, u32 ErrorStatus); |
| 126 | static bool sxg_mac_filter(struct adapter_t *adapter, |
| 127 | struct ether_header *EtherHdr, ushort length); |
Mithlesh Thukral | 6a2946b | 2009-01-19 20:24:30 +0530 | [diff] [blame] | 128 | static struct net_device_stats *sxg_get_stats(struct net_device * dev); |
Mithlesh Thukral | d9d578b | 2009-01-19 20:23:22 +0530 | [diff] [blame] | 129 | void sxg_free_resources(struct adapter_t *adapter); |
| 130 | void sxg_free_rcvblocks(struct adapter_t *adapter); |
| 131 | void sxg_free_sgl_buffers(struct adapter_t *adapter); |
| 132 | void sxg_unmap_resources(struct adapter_t *adapter); |
| 133 | void sxg_free_mcast_addrs(struct adapter_t *adapter); |
| 134 | void sxg_collect_statistics(struct adapter_t *adapter); |
Mithlesh Thukral | 1782199f | 2009-02-06 19:32:28 +0530 | [diff] [blame] | 135 | static int sxg_register_interrupt(struct adapter_t *adapter); |
| 136 | static void sxg_remove_isr(struct adapter_t *adapter); |
| 137 | static irqreturn_t sxg_isr(int irq, void *dev_id); |
Mithlesh Thukral | d0128aa | 2009-01-05 21:18:04 +0530 | [diff] [blame] | 138 | |
Mithlesh Thukral | e5ea8da | 2009-03-20 17:37:32 +0530 | [diff] [blame^] | 139 | static void sxg_watchdog(unsigned long data); |
| 140 | static void sxg_update_link_status (struct work_struct *work); |
| 141 | |
Greg Kroah-Hartman | c6c25ed | 2008-10-21 10:41:45 -0700 | [diff] [blame] | 142 | #define XXXTODO 0 |
| 143 | |
Greg Kroah-Hartman | 96e7088 | 2009-01-21 08:17:45 -0800 | [diff] [blame] | 144 | #if XXXTODO |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 145 | static int sxg_mac_set_address(struct net_device *dev, void *ptr); |
Greg Kroah-Hartman | 96e7088 | 2009-01-21 08:17:45 -0800 | [diff] [blame] | 146 | #endif |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 147 | static void sxg_mcast_set_list(struct net_device *dev); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 148 | |
Mithlesh Thukral | 54aed11 | 2009-01-19 20:27:17 +0530 | [diff] [blame] | 149 | static int sxg_adapter_set_hwaddr(struct adapter_t *adapter); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 150 | |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 151 | static int sxg_initialize_adapter(struct adapter_t *adapter); |
| 152 | static void sxg_stock_rcv_buffers(struct adapter_t *adapter); |
| 153 | static void sxg_complete_descriptor_blocks(struct adapter_t *adapter, |
J.R. Mauro | 5c7514e | 2008-10-05 20:38:52 -0400 | [diff] [blame] | 154 | unsigned char Index); |
Mithlesh Thukral | 7c66b14 | 2009-02-06 19:30:40 +0530 | [diff] [blame] | 155 | int sxg_change_mtu (struct net_device *netdev, int new_mtu); |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 156 | static int sxg_initialize_link(struct adapter_t *adapter); |
| 157 | static int sxg_phy_init(struct adapter_t *adapter); |
| 158 | static void sxg_link_event(struct adapter_t *adapter); |
| 159 | static enum SXG_LINK_STATE sxg_get_link_state(struct adapter_t *adapter); |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 160 | static void sxg_link_state(struct adapter_t *adapter, |
| 161 | enum SXG_LINK_STATE LinkState); |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 162 | static int sxg_write_mdio_reg(struct adapter_t *adapter, |
J.R. Mauro | 5c7514e | 2008-10-05 20:38:52 -0400 | [diff] [blame] | 163 | u32 DevAddr, u32 RegAddr, u32 Value); |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 164 | static int sxg_read_mdio_reg(struct adapter_t *adapter, |
J.R. Mauro | 5c7514e | 2008-10-05 20:38:52 -0400 | [diff] [blame] | 165 | u32 DevAddr, u32 RegAddr, u32 *pValue); |
Mithlesh Thukral | b040b07 | 2009-01-28 07:08:11 +0530 | [diff] [blame] | 166 | static void sxg_set_mcast_addr(struct adapter_t *adapter); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 167 | |
| 168 | static unsigned int sxg_first_init = 1; |
| 169 | static char *sxg_banner = |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 170 | "Alacritech SLIC Technology(tm) Server and Storage \ |
| 171 | 10Gbe Accelerator (Non-Accelerated)\n"; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 172 | |
| 173 | static int sxg_debug = 1; |
| 174 | static int debug = -1; |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 175 | static struct net_device *head_netdevice = NULL; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 176 | |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 177 | static struct sxgbase_driver sxg_global = { |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 178 | .dynamic_intagg = 1, |
| 179 | }; |
| 180 | static int intagg_delay = 100; |
| 181 | static u32 dynamic_intagg = 0; |
| 182 | |
Mithlesh Thukral | 54aed11 | 2009-01-19 20:27:17 +0530 | [diff] [blame] | 183 | char sxg_driver_name[] = "sxg_nic"; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 184 | #define DRV_AUTHOR "Alacritech, Inc. Engineering" |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 185 | #define DRV_DESCRIPTION \ |
| 186 | "Alacritech SLIC Techonology(tm) Non-Accelerated 10Gbe Driver" |
| 187 | #define DRV_COPYRIGHT \ |
| 188 | "Copyright 2000-2008 Alacritech, Inc. All rights reserved." |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 189 | |
| 190 | MODULE_AUTHOR(DRV_AUTHOR); |
| 191 | MODULE_DESCRIPTION(DRV_DESCRIPTION); |
| 192 | MODULE_LICENSE("GPL"); |
| 193 | |
| 194 | module_param(dynamic_intagg, int, 0); |
| 195 | MODULE_PARM_DESC(dynamic_intagg, "Dynamic Interrupt Aggregation Setting"); |
| 196 | module_param(intagg_delay, int, 0); |
| 197 | MODULE_PARM_DESC(intagg_delay, "uSec Interrupt Aggregation Delay"); |
| 198 | |
| 199 | static struct pci_device_id sxg_pci_tbl[] __devinitdata = { |
| 200 | {PCI_DEVICE(SXG_VENDOR_ID, SXG_DEVICE_ID)}, |
| 201 | {0,} |
| 202 | }; |
J.R. Mauro | 5c7514e | 2008-10-05 20:38:52 -0400 | [diff] [blame] | 203 | |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 204 | MODULE_DEVICE_TABLE(pci, sxg_pci_tbl); |
| 205 | |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 206 | static inline void sxg_reg32_write(void __iomem *reg, u32 value, bool flush) |
| 207 | { |
| 208 | writel(value, reg); |
| 209 | if (flush) |
| 210 | mb(); |
| 211 | } |
| 212 | |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 213 | static inline void sxg_reg64_write(struct adapter_t *adapter, void __iomem *reg, |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 214 | u64 value, u32 cpu) |
| 215 | { |
| 216 | u32 value_high = (u32) (value >> 32); |
| 217 | u32 value_low = (u32) (value & 0x00000000FFFFFFFF); |
| 218 | unsigned long flags; |
| 219 | |
| 220 | spin_lock_irqsave(&adapter->Bit64RegLock, flags); |
| 221 | writel(value_high, (void __iomem *)(&adapter->UcodeRegs[cpu].Upper)); |
| 222 | writel(value_low, reg); |
| 223 | spin_unlock_irqrestore(&adapter->Bit64RegLock, flags); |
| 224 | } |
| 225 | |
| 226 | static void sxg_init_driver(void) |
| 227 | { |
| 228 | if (sxg_first_init) { |
| 229 | DBG_ERROR("sxg: %s sxg_first_init set jiffies[%lx]\n", |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 230 | __func__, jiffies); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 231 | sxg_first_init = 0; |
| 232 | spin_lock_init(&sxg_global.driver_lock); |
| 233 | } |
| 234 | } |
| 235 | |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 236 | static void sxg_dbg_macaddrs(struct adapter_t *adapter) |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 237 | { |
| 238 | DBG_ERROR(" (%s) curr %2.2X:%2.2X:%2.2X:%2.2X:%2.2X:%2.2X\n", |
| 239 | adapter->netdev->name, adapter->currmacaddr[0], |
| 240 | adapter->currmacaddr[1], adapter->currmacaddr[2], |
| 241 | adapter->currmacaddr[3], adapter->currmacaddr[4], |
| 242 | adapter->currmacaddr[5]); |
| 243 | DBG_ERROR(" (%s) mac %2.2X:%2.2X:%2.2X:%2.2X:%2.2X:%2.2X\n", |
| 244 | adapter->netdev->name, adapter->macaddr[0], |
| 245 | adapter->macaddr[1], adapter->macaddr[2], |
| 246 | adapter->macaddr[3], adapter->macaddr[4], |
| 247 | adapter->macaddr[5]); |
| 248 | return; |
| 249 | } |
| 250 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 251 | /* SXG Globals */ |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 252 | static struct sxg_driver SxgDriver; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 253 | |
| 254 | #ifdef ATKDBG |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 255 | static struct sxg_trace_buffer LSxgTraceBuffer; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 256 | #endif /* ATKDBG */ |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 257 | static struct sxg_trace_buffer *SxgTraceBuffer = NULL; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 258 | |
| 259 | /* |
Mithlesh Thukral | 1782199f | 2009-02-06 19:32:28 +0530 | [diff] [blame] | 260 | * MSI Related API's |
| 261 | */ |
| 262 | int sxg_register_intr(struct adapter_t *adapter); |
| 263 | int sxg_enable_msi_x(struct adapter_t *adapter); |
| 264 | int sxg_add_msi_isr(struct adapter_t *adapter); |
| 265 | void sxg_remove_msix_isr(struct adapter_t *adapter); |
| 266 | int sxg_set_interrupt_capability(struct adapter_t *adapter); |
| 267 | |
| 268 | int sxg_set_interrupt_capability(struct adapter_t *adapter) |
| 269 | { |
| 270 | int ret; |
| 271 | |
| 272 | ret = sxg_enable_msi_x(adapter); |
| 273 | if (ret != STATUS_SUCCESS) { |
| 274 | adapter->msi_enabled = FALSE; |
| 275 | DBG_ERROR("sxg_set_interrupt_capability MSI-X Disable\n"); |
| 276 | } else { |
| 277 | adapter->msi_enabled = TRUE; |
| 278 | DBG_ERROR("sxg_set_interrupt_capability MSI-X Enable\n"); |
| 279 | } |
| 280 | return ret; |
| 281 | } |
| 282 | |
| 283 | int sxg_register_intr(struct adapter_t *adapter) |
| 284 | { |
| 285 | int ret = 0; |
| 286 | |
| 287 | if (adapter->msi_enabled) { |
| 288 | ret = sxg_add_msi_isr(adapter); |
| 289 | } |
| 290 | else { |
| 291 | DBG_ERROR("MSI-X Enable Failed. Using Pin INT\n"); |
| 292 | ret = sxg_register_interrupt(adapter); |
| 293 | if (ret != STATUS_SUCCESS) { |
| 294 | DBG_ERROR("sxg_register_interrupt Failed\n"); |
| 295 | } |
| 296 | } |
| 297 | return ret; |
| 298 | } |
| 299 | |
| 300 | int sxg_enable_msi_x(struct adapter_t *adapter) |
| 301 | { |
| 302 | int ret; |
| 303 | |
| 304 | adapter->nr_msix_entries = 1; |
| 305 | adapter->msi_entries = kmalloc(adapter->nr_msix_entries * |
| 306 | sizeof(struct msix_entry),GFP_KERNEL); |
| 307 | if (!adapter->msi_entries) { |
| 308 | DBG_ERROR("%s:MSI Entries memory allocation Failed\n",__func__); |
| 309 | return -ENOMEM; |
| 310 | } |
| 311 | memset(adapter->msi_entries, 0, adapter->nr_msix_entries * |
| 312 | sizeof(struct msix_entry)); |
| 313 | |
| 314 | ret = pci_enable_msix(adapter->pcidev, adapter->msi_entries, |
| 315 | adapter->nr_msix_entries); |
| 316 | if (ret) { |
| 317 | DBG_ERROR("Enabling MSI-X with %d vectors failed\n", |
| 318 | adapter->nr_msix_entries); |
| 319 | /*Should try with less vector returned.*/ |
| 320 | kfree(adapter->msi_entries); |
| 321 | return STATUS_FAILURE; /*MSI-X Enable failed.*/ |
| 322 | } |
| 323 | return (STATUS_SUCCESS); |
| 324 | } |
| 325 | |
| 326 | int sxg_add_msi_isr(struct adapter_t *adapter) |
| 327 | { |
| 328 | int ret,i; |
| 329 | |
| 330 | if (!adapter->intrregistered) { |
| 331 | for (i=0; i<adapter->nr_msix_entries; i++) { |
| 332 | ret = request_irq (adapter->msi_entries[i].vector, |
| 333 | sxg_isr, |
| 334 | IRQF_SHARED, |
| 335 | adapter->netdev->name, |
| 336 | adapter->netdev); |
| 337 | if (ret) { |
| 338 | DBG_ERROR("sxg: MSI-X request_irq (%s) " |
| 339 | "FAILED [%x]\n", adapter->netdev->name, |
| 340 | ret); |
| 341 | return (ret); |
| 342 | } |
| 343 | } |
| 344 | } |
| 345 | adapter->msi_enabled = TRUE; |
| 346 | adapter->intrregistered = 1; |
| 347 | adapter->IntRegistered = TRUE; |
| 348 | return (STATUS_SUCCESS); |
| 349 | } |
| 350 | |
| 351 | void sxg_remove_msix_isr(struct adapter_t *adapter) |
| 352 | { |
| 353 | int i,vector; |
| 354 | struct net_device *netdev = adapter->netdev; |
| 355 | |
| 356 | for(i=0; i< adapter->nr_msix_entries;i++) |
| 357 | { |
| 358 | vector = adapter->msi_entries[i].vector; |
| 359 | DBG_ERROR("%s : Freeing IRQ vector#%d\n",__FUNCTION__,vector); |
| 360 | free_irq(vector,netdev); |
| 361 | } |
| 362 | } |
| 363 | |
| 364 | |
| 365 | static void sxg_remove_isr(struct adapter_t *adapter) |
| 366 | { |
| 367 | struct net_device *netdev = adapter->netdev; |
| 368 | if (adapter->msi_enabled) |
| 369 | sxg_remove_msix_isr(adapter); |
| 370 | else |
| 371 | free_irq(adapter->netdev->irq, netdev); |
| 372 | } |
| 373 | |
| 374 | void sxg_reset_interrupt_capability(struct adapter_t *adapter) |
| 375 | { |
| 376 | if (adapter->msi_enabled) { |
| 377 | pci_disable_msix(adapter->pcidev); |
| 378 | kfree(adapter->msi_entries); |
| 379 | adapter->msi_entries = NULL; |
| 380 | } |
| 381 | return; |
| 382 | } |
| 383 | |
| 384 | /* |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 385 | * sxg_download_microcode |
| 386 | * |
| 387 | * Download Microcode to Sahara adapter |
| 388 | * |
| 389 | * Arguments - |
| 390 | * adapter - A pointer to our adapter structure |
| 391 | * UcodeSel - microcode file selection |
| 392 | * |
| 393 | * Return |
| 394 | * int |
| 395 | */ |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 396 | static bool sxg_download_microcode(struct adapter_t *adapter, |
| 397 | enum SXG_UCODE_SEL UcodeSel) |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 398 | { |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 399 | struct sxg_hw_regs *HwRegs = adapter->HwRegs; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 400 | u32 Section; |
| 401 | u32 ThisSectionSize; |
J.R. Mauro | 5c7514e | 2008-10-05 20:38:52 -0400 | [diff] [blame] | 402 | u32 *Instruction = NULL; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 403 | u32 BaseAddress, AddressOffset, Address; |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 404 | /* u32 Failure; */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 405 | u32 ValueRead; |
| 406 | u32 i; |
| 407 | u32 numSections = 0; |
| 408 | u32 sectionSize[16]; |
| 409 | u32 sectionStart[16]; |
| 410 | |
| 411 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "DnldUcod", |
| 412 | adapter, 0, 0, 0); |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 413 | DBG_ERROR("sxg: %s ENTER\n", __func__); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 414 | |
| 415 | switch (UcodeSel) { |
Mithlesh Thukral | a536efc | 2009-02-18 18:54:14 +0530 | [diff] [blame] | 416 | case SXG_UCODE_SYSTEM: // System (operational) ucode |
| 417 | switch (adapter->asictype) { |
| 418 | case SAHARA_REV_A: |
| 419 | DBG_ERROR("%s SAHARA CARD REVISION A\n", |
| 420 | __func__); |
| 421 | numSections = SNumSections; |
| 422 | for (i = 0; i < numSections; i++) { |
| 423 | sectionSize[i] = |
| 424 | SSectionSize[i]; |
| 425 | sectionStart[i] = |
| 426 | SSectionStart[i]; |
| 427 | } |
| 428 | break; |
| 429 | case SAHARA_REV_B: |
| 430 | DBG_ERROR("%s SAHARA CARD REVISION B\n", |
| 431 | __func__); |
| 432 | numSections = SBNumSections; |
| 433 | for (i = 0; i < numSections; i++) { |
| 434 | sectionSize[i] = |
| 435 | SBSectionSize[i]; |
| 436 | sectionStart[i] = |
| 437 | SBSectionStart[i]; |
| 438 | } |
| 439 | break; |
| 440 | } |
| 441 | break; |
| 442 | default: |
| 443 | printk(KERN_ERR KBUILD_MODNAME |
| 444 | ": Woah, big error with the microcode!\n"); |
| 445 | break; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 446 | } |
| 447 | |
| 448 | DBG_ERROR("sxg: RESET THE CARD\n"); |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 449 | /* First, reset the card */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 450 | WRITE_REG(HwRegs->Reset, 0xDEAD, FLUSH); |
Mithlesh Thukral | a536efc | 2009-02-18 18:54:14 +0530 | [diff] [blame] | 451 | udelay(50); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 452 | |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 453 | /* |
| 454 | * Download each section of the microcode as specified in |
| 455 | * its download file. The *download.c file is generated using |
| 456 | * the saharaobjtoc facility which converts the metastep .obj |
| 457 | * file to a .c file which contains a two dimentional array. |
| 458 | */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 459 | for (Section = 0; Section < numSections; Section++) { |
| 460 | DBG_ERROR("sxg: SECTION # %d\n", Section); |
| 461 | switch (UcodeSel) { |
Mithlesh Thukral | a536efc | 2009-02-18 18:54:14 +0530 | [diff] [blame] | 462 | case SXG_UCODE_SYSTEM: |
| 463 | switch (adapter->asictype) { |
| 464 | case SAHARA_REV_A: |
| 465 | Instruction = (u32 *) & SaharaUCode[Section][0]; |
| 466 | break; |
| 467 | case SAHARA_REV_B: |
| 468 | Instruction = (u32 *) & SaharaUCodeB[Section][0]; |
| 469 | break; |
| 470 | } |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 471 | break; |
| 472 | default: |
| 473 | ASSERT(0); |
| 474 | break; |
| 475 | } |
Mithlesh Thukral | a536efc | 2009-02-18 18:54:14 +0530 | [diff] [blame] | 476 | |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 477 | BaseAddress = sectionStart[Section]; |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 478 | /* Size in instructions */ |
| 479 | ThisSectionSize = sectionSize[Section] / 12; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 480 | for (AddressOffset = 0; AddressOffset < ThisSectionSize; |
| 481 | AddressOffset++) { |
| 482 | Address = BaseAddress + AddressOffset; |
| 483 | ASSERT((Address & ~MICROCODE_ADDRESS_MASK) == 0); |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 484 | /* Write instruction bits 31 - 0 */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 485 | WRITE_REG(HwRegs->UcodeDataLow, *Instruction, FLUSH); |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 486 | /* Write instruction bits 63-32 */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 487 | WRITE_REG(HwRegs->UcodeDataMiddle, *(Instruction + 1), |
| 488 | FLUSH); |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 489 | /* Write instruction bits 95-64 */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 490 | WRITE_REG(HwRegs->UcodeDataHigh, *(Instruction + 2), |
| 491 | FLUSH); |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 492 | /* Write instruction address with the WRITE bit set */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 493 | WRITE_REG(HwRegs->UcodeAddr, |
| 494 | (Address | MICROCODE_ADDRESS_WRITE), FLUSH); |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 495 | /* |
| 496 | * Sahara bug in the ucode download logic - the write to DataLow |
| 497 | * for the next instruction could get corrupted. To avoid this, |
| 498 | * write to DataLow again for this instruction (which may get |
| 499 | * corrupted, but it doesn't matter), then increment the address |
| 500 | * and write the data for the next instruction to DataLow. That |
| 501 | * write should succeed. |
| 502 | */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 503 | WRITE_REG(HwRegs->UcodeDataLow, *Instruction, TRUE); |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 504 | /* Advance 3 u32S to start of next instruction */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 505 | Instruction += 3; |
| 506 | } |
| 507 | } |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 508 | /* |
| 509 | * Now repeat the entire operation reading the instruction back and |
| 510 | * checking for parity errors |
| 511 | */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 512 | for (Section = 0; Section < numSections; Section++) { |
| 513 | DBG_ERROR("sxg: check SECTION # %d\n", Section); |
| 514 | switch (UcodeSel) { |
Mithlesh Thukral | a536efc | 2009-02-18 18:54:14 +0530 | [diff] [blame] | 515 | case SXG_UCODE_SYSTEM: |
| 516 | switch (adapter->asictype) { |
| 517 | case SAHARA_REV_A: |
| 518 | Instruction = (u32 *) & |
| 519 | SaharaUCode[Section][0]; |
| 520 | break; |
| 521 | case SAHARA_REV_B: |
| 522 | Instruction = (u32 *) & |
| 523 | SaharaUCodeB[Section][0]; |
| 524 | break; |
| 525 | } |
| 526 | break; |
| 527 | default: |
| 528 | ASSERT(0); |
| 529 | break; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 530 | } |
| 531 | BaseAddress = sectionStart[Section]; |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 532 | /* Size in instructions */ |
| 533 | ThisSectionSize = sectionSize[Section] / 12; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 534 | for (AddressOffset = 0; AddressOffset < ThisSectionSize; |
| 535 | AddressOffset++) { |
| 536 | Address = BaseAddress + AddressOffset; |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 537 | /* Write the address with the READ bit set */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 538 | WRITE_REG(HwRegs->UcodeAddr, |
| 539 | (Address | MICROCODE_ADDRESS_READ), FLUSH); |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 540 | /* Read it back and check parity bit. */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 541 | READ_REG(HwRegs->UcodeAddr, ValueRead); |
| 542 | if (ValueRead & MICROCODE_ADDRESS_PARITY) { |
| 543 | DBG_ERROR("sxg: %s PARITY ERROR\n", |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 544 | __func__); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 545 | |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 546 | return FALSE; /* Parity error */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 547 | } |
| 548 | ASSERT((ValueRead & MICROCODE_ADDRESS_MASK) == Address); |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 549 | /* Read the instruction back and compare */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 550 | READ_REG(HwRegs->UcodeDataLow, ValueRead); |
| 551 | if (ValueRead != *Instruction) { |
| 552 | DBG_ERROR("sxg: %s MISCOMPARE LOW\n", |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 553 | __func__); |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 554 | return FALSE; /* Miscompare */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 555 | } |
| 556 | READ_REG(HwRegs->UcodeDataMiddle, ValueRead); |
| 557 | if (ValueRead != *(Instruction + 1)) { |
| 558 | DBG_ERROR("sxg: %s MISCOMPARE MIDDLE\n", |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 559 | __func__); |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 560 | return FALSE; /* Miscompare */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 561 | } |
| 562 | READ_REG(HwRegs->UcodeDataHigh, ValueRead); |
| 563 | if (ValueRead != *(Instruction + 2)) { |
| 564 | DBG_ERROR("sxg: %s MISCOMPARE HIGH\n", |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 565 | __func__); |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 566 | return FALSE; /* Miscompare */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 567 | } |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 568 | /* Advance 3 u32S to start of next instruction */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 569 | Instruction += 3; |
| 570 | } |
| 571 | } |
| 572 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 573 | /* Everything OK, Go. */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 574 | WRITE_REG(HwRegs->UcodeAddr, MICROCODE_ADDRESS_GO, FLUSH); |
| 575 | |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 576 | /* |
| 577 | * Poll the CardUp register to wait for microcode to initialize |
| 578 | * Give up after 10,000 attemps (500ms). |
| 579 | */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 580 | for (i = 0; i < 10000; i++) { |
| 581 | udelay(50); |
| 582 | READ_REG(adapter->UcodeRegs[0].CardUp, ValueRead); |
| 583 | if (ValueRead == 0xCAFE) { |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 584 | DBG_ERROR("sxg: %s BOO YA 0xCAFE\n", __func__); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 585 | break; |
| 586 | } |
| 587 | } |
| 588 | if (i == 10000) { |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 589 | DBG_ERROR("sxg: %s TIMEOUT\n", __func__); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 590 | |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 591 | return FALSE; /* Timeout */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 592 | } |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 593 | /* |
| 594 | * Now write the LoadSync register. This is used to |
| 595 | * synchronize with the card so it can scribble on the memory |
| 596 | * that contained 0xCAFE from the "CardUp" step above |
| 597 | */ |
Mithlesh Thukral | a536efc | 2009-02-18 18:54:14 +0530 | [diff] [blame] | 598 | if (UcodeSel == SXG_UCODE_SYSTEM) { |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 599 | WRITE_REG(adapter->UcodeRegs[0].LoadSync, 0, FLUSH); |
| 600 | } |
| 601 | |
| 602 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "XDnldUcd", |
| 603 | adapter, 0, 0, 0); |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 604 | DBG_ERROR("sxg: %s EXIT\n", __func__); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 605 | |
| 606 | return (TRUE); |
| 607 | } |
| 608 | |
| 609 | /* |
| 610 | * sxg_allocate_resources - Allocate memory and locks |
| 611 | * |
| 612 | * Arguments - |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 613 | * adapter - A pointer to our adapter structure |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 614 | * |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 615 | * Return - int |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 616 | */ |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 617 | static int sxg_allocate_resources(struct adapter_t *adapter) |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 618 | { |
Mithlesh Thukral | 9fd6966 | 2009-02-24 18:09:34 +0530 | [diff] [blame] | 619 | int status = STATUS_SUCCESS; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 620 | u32 RssIds, IsrCount; |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 621 | /* struct sxg_xmt_ring *XmtRing; */ |
| 622 | /* struct sxg_rcv_ring *RcvRing; */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 623 | |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 624 | DBG_ERROR("%s ENTER\n", __func__); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 625 | |
| 626 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "AllocRes", |
| 627 | adapter, 0, 0, 0); |
| 628 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 629 | /* Windows tells us how many CPUs it plans to use for */ |
| 630 | /* RSS */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 631 | RssIds = SXG_RSS_CPU_COUNT(adapter); |
Mithlesh Thukral | 1782199f | 2009-02-06 19:32:28 +0530 | [diff] [blame] | 632 | IsrCount = adapter->msi_enabled ? RssIds : 1; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 633 | |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 634 | DBG_ERROR("%s Setup the spinlocks\n", __func__); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 635 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 636 | /* Allocate spinlocks and initialize listheads first. */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 637 | spin_lock_init(&adapter->RcvQLock); |
| 638 | spin_lock_init(&adapter->SglQLock); |
| 639 | spin_lock_init(&adapter->XmtZeroLock); |
| 640 | spin_lock_init(&adapter->Bit64RegLock); |
| 641 | spin_lock_init(&adapter->AdapterLock); |
Mithlesh Thukral | 6a2946b | 2009-01-19 20:24:30 +0530 | [diff] [blame] | 642 | atomic_set(&adapter->pending_allocations, 0); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 643 | |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 644 | DBG_ERROR("%s Setup the lists\n", __func__); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 645 | |
| 646 | InitializeListHead(&adapter->FreeRcvBuffers); |
| 647 | InitializeListHead(&adapter->FreeRcvBlocks); |
| 648 | InitializeListHead(&adapter->AllRcvBlocks); |
| 649 | InitializeListHead(&adapter->FreeSglBuffers); |
| 650 | InitializeListHead(&adapter->AllSglBuffers); |
| 651 | |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 652 | /* |
| 653 | * Mark these basic allocations done. This flags essentially |
| 654 | * tells the SxgFreeResources routine that it can grab spinlocks |
| 655 | * and reference listheads. |
| 656 | */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 657 | adapter->BasicAllocations = TRUE; |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 658 | /* |
| 659 | * Main allocation loop. Start with the maximum supported by |
| 660 | * the microcode and back off if memory allocation |
| 661 | * fails. If we hit a minimum, fail. |
| 662 | */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 663 | |
| 664 | for (;;) { |
Greg Kroah-Hartman | d78404c | 2008-10-21 10:41:45 -0700 | [diff] [blame] | 665 | DBG_ERROR("%s Allocate XmtRings size[%x]\n", __func__, |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 666 | (unsigned int)(sizeof(struct sxg_xmt_ring) * 1)); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 667 | |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 668 | /* |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 669 | * Start with big items first - receive and transmit rings. |
| 670 | * At the moment I'm going to keep the ring size fixed and |
| 671 | * adjust the TCBs if we fail. Later we might |
| 672 | * consider reducing the ring size as well.. |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 673 | */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 674 | adapter->XmtRings = pci_alloc_consistent(adapter->pcidev, |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 675 | sizeof(struct sxg_xmt_ring) * |
| 676 | 1, |
| 677 | &adapter->PXmtRings); |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 678 | DBG_ERROR("%s XmtRings[%p]\n", __func__, adapter->XmtRings); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 679 | |
| 680 | if (!adapter->XmtRings) { |
| 681 | goto per_tcb_allocation_failed; |
| 682 | } |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 683 | memset(adapter->XmtRings, 0, sizeof(struct sxg_xmt_ring) * 1); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 684 | |
Greg Kroah-Hartman | d78404c | 2008-10-21 10:41:45 -0700 | [diff] [blame] | 685 | DBG_ERROR("%s Allocate RcvRings size[%x]\n", __func__, |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 686 | (unsigned int)(sizeof(struct sxg_rcv_ring) * 1)); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 687 | adapter->RcvRings = |
| 688 | pci_alloc_consistent(adapter->pcidev, |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 689 | sizeof(struct sxg_rcv_ring) * 1, |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 690 | &adapter->PRcvRings); |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 691 | DBG_ERROR("%s RcvRings[%p]\n", __func__, adapter->RcvRings); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 692 | if (!adapter->RcvRings) { |
| 693 | goto per_tcb_allocation_failed; |
| 694 | } |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 695 | memset(adapter->RcvRings, 0, sizeof(struct sxg_rcv_ring) * 1); |
Mithlesh Thukral | d9d578b | 2009-01-19 20:23:22 +0530 | [diff] [blame] | 696 | adapter->ucode_stats = kzalloc(sizeof(struct sxg_ucode_stats), GFP_ATOMIC); |
| 697 | adapter->pucode_stats = pci_map_single(adapter->pcidev, |
| 698 | adapter->ucode_stats, |
| 699 | sizeof(struct sxg_ucode_stats), |
| 700 | PCI_DMA_FROMDEVICE); |
| 701 | // memset(adapter->ucode_stats, 0, sizeof(struct sxg_ucode_stats)); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 702 | break; |
| 703 | |
| 704 | per_tcb_allocation_failed: |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 705 | /* an allocation failed. Free any successful allocations. */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 706 | if (adapter->XmtRings) { |
| 707 | pci_free_consistent(adapter->pcidev, |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 708 | sizeof(struct sxg_xmt_ring) * 1, |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 709 | adapter->XmtRings, |
| 710 | adapter->PXmtRings); |
| 711 | adapter->XmtRings = NULL; |
| 712 | } |
| 713 | if (adapter->RcvRings) { |
| 714 | pci_free_consistent(adapter->pcidev, |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 715 | sizeof(struct sxg_rcv_ring) * 1, |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 716 | adapter->RcvRings, |
| 717 | adapter->PRcvRings); |
| 718 | adapter->RcvRings = NULL; |
| 719 | } |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 720 | /* Loop around and try again.... */ |
Mithlesh Thukral | d9d578b | 2009-01-19 20:23:22 +0530 | [diff] [blame] | 721 | if (adapter->ucode_stats) { |
| 722 | pci_unmap_single(adapter->pcidev, |
| 723 | sizeof(struct sxg_ucode_stats), |
| 724 | adapter->pucode_stats, PCI_DMA_FROMDEVICE); |
| 725 | adapter->ucode_stats = NULL; |
| 726 | } |
| 727 | |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 728 | } |
| 729 | |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 730 | DBG_ERROR("%s Initialize RCV ZERO and XMT ZERO rings\n", __func__); |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 731 | /* Initialize rcv zero and xmt zero rings */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 732 | SXG_INITIALIZE_RING(adapter->RcvRingZeroInfo, SXG_RCV_RING_SIZE); |
| 733 | SXG_INITIALIZE_RING(adapter->XmtRingZeroInfo, SXG_XMT_RING_SIZE); |
| 734 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 735 | /* Sanity check receive data structure format */ |
Mithlesh Thukral | d0128aa | 2009-01-05 21:18:04 +0530 | [diff] [blame] | 736 | /* ASSERT((adapter->ReceiveBufferSize == SXG_RCV_DATA_BUFFER_SIZE) || |
| 737 | (adapter->ReceiveBufferSize == SXG_RCV_JUMBO_BUFFER_SIZE)); */ |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 738 | ASSERT(sizeof(struct sxg_rcv_descriptor_block) == |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 739 | SXG_RCV_DESCRIPTOR_BLOCK_SIZE); |
| 740 | |
Greg Kroah-Hartman | d78404c | 2008-10-21 10:41:45 -0700 | [diff] [blame] | 741 | DBG_ERROR("%s Allocate EventRings size[%x]\n", __func__, |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 742 | (unsigned int)(sizeof(struct sxg_event_ring) * RssIds)); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 743 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 744 | /* Allocate event queues. */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 745 | adapter->EventRings = pci_alloc_consistent(adapter->pcidev, |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 746 | sizeof(struct sxg_event_ring) * |
| 747 | RssIds, |
| 748 | &adapter->PEventRings); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 749 | |
| 750 | if (!adapter->EventRings) { |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 751 | /* Caller will call SxgFreeAdapter to clean up above |
| 752 | * allocations */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 753 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "XAResF8", |
| 754 | adapter, SXG_MAX_ENTRIES, 0, 0); |
| 755 | status = STATUS_RESOURCES; |
| 756 | goto per_tcb_allocation_failed; |
| 757 | } |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 758 | memset(adapter->EventRings, 0, sizeof(struct sxg_event_ring) * RssIds); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 759 | |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 760 | DBG_ERROR("%s Allocate ISR size[%x]\n", __func__, IsrCount); |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 761 | /* Allocate ISR */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 762 | adapter->Isr = pci_alloc_consistent(adapter->pcidev, |
| 763 | IsrCount, &adapter->PIsr); |
| 764 | if (!adapter->Isr) { |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 765 | /* Caller will call SxgFreeAdapter to clean up above |
| 766 | * allocations */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 767 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "XAResF9", |
| 768 | adapter, SXG_MAX_ENTRIES, 0, 0); |
| 769 | status = STATUS_RESOURCES; |
| 770 | goto per_tcb_allocation_failed; |
| 771 | } |
| 772 | memset(adapter->Isr, 0, sizeof(u32) * IsrCount); |
| 773 | |
Greg Kroah-Hartman | d78404c | 2008-10-21 10:41:45 -0700 | [diff] [blame] | 774 | DBG_ERROR("%s Allocate shared XMT ring zero index location size[%x]\n", |
| 775 | __func__, (unsigned int)sizeof(u32)); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 776 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 777 | /* Allocate shared XMT ring zero index location */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 778 | adapter->XmtRingZeroIndex = pci_alloc_consistent(adapter->pcidev, |
| 779 | sizeof(u32), |
| 780 | &adapter-> |
| 781 | PXmtRingZeroIndex); |
| 782 | if (!adapter->XmtRingZeroIndex) { |
| 783 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "XAResF10", |
| 784 | adapter, SXG_MAX_ENTRIES, 0, 0); |
| 785 | status = STATUS_RESOURCES; |
| 786 | goto per_tcb_allocation_failed; |
| 787 | } |
| 788 | memset(adapter->XmtRingZeroIndex, 0, sizeof(u32)); |
| 789 | |
| 790 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "XAlcResS", |
| 791 | adapter, SXG_MAX_ENTRIES, 0, 0); |
| 792 | |
Mithlesh Thukral | 0d41472 | 2009-01-19 20:29:59 +0530 | [diff] [blame] | 793 | return status; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 794 | } |
| 795 | |
| 796 | /* |
| 797 | * sxg_config_pci - |
| 798 | * |
| 799 | * Set up PCI Configuration space |
| 800 | * |
| 801 | * Arguments - |
| 802 | * pcidev - A pointer to our adapter structure |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 803 | */ |
| 804 | static void sxg_config_pci(struct pci_dev *pcidev) |
| 805 | { |
| 806 | u16 pci_command; |
| 807 | u16 new_command; |
| 808 | |
| 809 | pci_read_config_word(pcidev, PCI_COMMAND, &pci_command); |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 810 | DBG_ERROR("sxg: %s PCI command[%4.4x]\n", __func__, pci_command); |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 811 | /* Set the command register */ |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 812 | new_command = pci_command | ( |
| 813 | /* Memory Space Enable */ |
| 814 | PCI_COMMAND_MEMORY | |
| 815 | /* Bus master enable */ |
| 816 | PCI_COMMAND_MASTER | |
| 817 | /* Memory write and invalidate */ |
| 818 | PCI_COMMAND_INVALIDATE | |
| 819 | /* Parity error response */ |
| 820 | PCI_COMMAND_PARITY | |
| 821 | /* System ERR */ |
| 822 | PCI_COMMAND_SERR | |
| 823 | /* Fast back-to-back */ |
| 824 | PCI_COMMAND_FAST_BACK); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 825 | if (pci_command != new_command) { |
| 826 | DBG_ERROR("%s -- Updating PCI COMMAND register %4.4x->%4.4x.\n", |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 827 | __func__, pci_command, new_command); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 828 | pci_write_config_word(pcidev, PCI_COMMAND, new_command); |
| 829 | } |
| 830 | } |
| 831 | |
Mithlesh Thukral | 1323e5f | 2009-01-05 21:13:23 +0530 | [diff] [blame] | 832 | /* |
| 833 | * sxg_read_config |
| 834 | * @adapter : Pointer to the adapter structure for the card |
| 835 | * This function will read the configuration data from EEPROM/FLASH |
| 836 | */ |
| 837 | static inline int sxg_read_config(struct adapter_t *adapter) |
| 838 | { |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 839 | /* struct sxg_config data; */ |
Mithlesh Thukral | b9346e0 | 2009-03-20 17:35:58 +0530 | [diff] [blame] | 840 | struct sxg_config *config; |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 841 | struct sw_cfg_data *data; |
Mithlesh Thukral | 1323e5f | 2009-01-05 21:13:23 +0530 | [diff] [blame] | 842 | dma_addr_t p_addr; |
| 843 | unsigned long status; |
| 844 | unsigned long i; |
Mithlesh Thukral | b9346e0 | 2009-03-20 17:35:58 +0530 | [diff] [blame] | 845 | config = pci_alloc_consistent(adapter->pcidev, |
| 846 | sizeof(struct sxg_config), &p_addr); |
Mithlesh Thukral | 1323e5f | 2009-01-05 21:13:23 +0530 | [diff] [blame] | 847 | |
Mithlesh Thukral | b9346e0 | 2009-03-20 17:35:58 +0530 | [diff] [blame] | 848 | if(!config) { |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 849 | /* |
| 850 | * We cant get even this much memory. Raise a hell |
Mithlesh Thukral | 1323e5f | 2009-01-05 21:13:23 +0530 | [diff] [blame] | 851 | * Get out of here |
| 852 | */ |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 853 | printk(KERN_ERR"%s : Could not allocate memory for reading \ |
| 854 | EEPROM\n", __FUNCTION__); |
Mithlesh Thukral | 1323e5f | 2009-01-05 21:13:23 +0530 | [diff] [blame] | 855 | return -ENOMEM; |
| 856 | } |
| 857 | |
Mithlesh Thukral | b9346e0 | 2009-03-20 17:35:58 +0530 | [diff] [blame] | 858 | data = &config->SwCfg; |
| 859 | |
| 860 | /* Initialize (reflective memory) status register */ |
Mithlesh Thukral | 1323e5f | 2009-01-05 21:13:23 +0530 | [diff] [blame] | 861 | WRITE_REG(adapter->UcodeRegs[0].ConfigStat, SXG_CFG_TIMEOUT, TRUE); |
| 862 | |
Mithlesh Thukral | b9346e0 | 2009-03-20 17:35:58 +0530 | [diff] [blame] | 863 | /* Send request to fetch configuration data */ |
Mithlesh Thukral | 1323e5f | 2009-01-05 21:13:23 +0530 | [diff] [blame] | 864 | WRITE_REG64(adapter, adapter->UcodeRegs[0].Config, p_addr, 0); |
| 865 | for(i=0; i<1000; i++) { |
| 866 | READ_REG(adapter->UcodeRegs[0].ConfigStat, status); |
| 867 | if (status != SXG_CFG_TIMEOUT) |
| 868 | break; |
| 869 | mdelay(1); /* Do we really need this */ |
| 870 | } |
| 871 | |
| 872 | switch(status) { |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 873 | /* Config read from EEPROM succeeded */ |
| 874 | case SXG_CFG_LOAD_EEPROM: |
| 875 | /* Config read from Flash succeeded */ |
| 876 | case SXG_CFG_LOAD_FLASH: |
Mithlesh Thukral | b9346e0 | 2009-03-20 17:35:58 +0530 | [diff] [blame] | 877 | /* |
| 878 | * Copy the MAC address to adapter structure |
| 879 | * TODO: We are not doing the remaining part : FRU, etc |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 880 | */ |
Mithlesh Thukral | d0128aa | 2009-01-05 21:18:04 +0530 | [diff] [blame] | 881 | memcpy(adapter->macaddr, data->MacAddr[0].MacAddr, |
Mithlesh Thukral | b9346e0 | 2009-03-20 17:35:58 +0530 | [diff] [blame] | 882 | sizeof(struct sxg_config_mac)); |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 883 | break; |
| 884 | case SXG_CFG_TIMEOUT: |
| 885 | case SXG_CFG_LOAD_INVALID: |
| 886 | case SXG_CFG_LOAD_ERROR: |
| 887 | default: /* Fix default handler later */ |
| 888 | printk(KERN_WARNING"%s : We could not read the config \ |
| 889 | word. Status = %ld\n", __FUNCTION__, status); |
| 890 | break; |
Mithlesh Thukral | 1323e5f | 2009-01-05 21:13:23 +0530 | [diff] [blame] | 891 | } |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 892 | pci_free_consistent(adapter->pcidev, sizeof(struct sw_cfg_data), data, |
| 893 | p_addr); |
Mithlesh Thukral | 1323e5f | 2009-01-05 21:13:23 +0530 | [diff] [blame] | 894 | if (adapter->netdev) { |
| 895 | memcpy(adapter->netdev->dev_addr, adapter->currmacaddr, 6); |
| 896 | memcpy(adapter->netdev->perm_addr, adapter->currmacaddr, 6); |
| 897 | } |
Mithlesh Thukral | 1323e5f | 2009-01-05 21:13:23 +0530 | [diff] [blame] | 898 | sxg_dbg_macaddrs(adapter); |
| 899 | |
| 900 | return status; |
| 901 | } |
| 902 | |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 903 | static int sxg_entry_probe(struct pci_dev *pcidev, |
| 904 | const struct pci_device_id *pci_tbl_entry) |
| 905 | { |
| 906 | static int did_version = 0; |
| 907 | int err; |
| 908 | struct net_device *netdev; |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 909 | struct adapter_t *adapter; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 910 | void __iomem *memmapped_ioaddr; |
| 911 | u32 status = 0; |
| 912 | ulong mmio_start = 0; |
| 913 | ulong mmio_len = 0; |
Mithlesh Thukral | a536efc | 2009-02-18 18:54:14 +0530 | [diff] [blame] | 914 | unsigned char revision_id; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 915 | |
| 916 | DBG_ERROR("sxg: %s 2.6 VERSION ENTER jiffies[%lx] cpu %d\n", |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 917 | __func__, jiffies, smp_processor_id()); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 918 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 919 | /* Initialize trace buffer */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 920 | #ifdef ATKDBG |
| 921 | SxgTraceBuffer = &LSxgTraceBuffer; |
| 922 | SXG_TRACE_INIT(SxgTraceBuffer, TRACE_NOISY); |
| 923 | #endif |
| 924 | |
| 925 | sxg_global.dynamic_intagg = dynamic_intagg; |
| 926 | |
| 927 | err = pci_enable_device(pcidev); |
| 928 | |
| 929 | DBG_ERROR("Call pci_enable_device(%p) status[%x]\n", pcidev, err); |
| 930 | if (err) { |
| 931 | return err; |
| 932 | } |
| 933 | |
| 934 | if (sxg_debug > 0 && did_version++ == 0) { |
| 935 | printk(KERN_INFO "%s\n", sxg_banner); |
Mithlesh Thukral | 371d7a9 | 2009-01-19 20:22:34 +0530 | [diff] [blame] | 936 | printk(KERN_INFO "%s\n", SXG_DRV_VERSION); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 937 | } |
| 938 | |
Mithlesh Thukral | a536efc | 2009-02-18 18:54:14 +0530 | [diff] [blame] | 939 | pci_read_config_byte(pcidev, PCI_REVISION_ID, &revision_id); |
| 940 | |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 941 | if (!(err = pci_set_dma_mask(pcidev, DMA_64BIT_MASK))) { |
| 942 | DBG_ERROR("pci_set_dma_mask(DMA_64BIT_MASK) successful\n"); |
| 943 | } else { |
| 944 | if ((err = pci_set_dma_mask(pcidev, DMA_32BIT_MASK))) { |
| 945 | DBG_ERROR |
| 946 | ("No usable DMA configuration, aborting err[%x]\n", |
| 947 | err); |
| 948 | return err; |
| 949 | } |
| 950 | DBG_ERROR("pci_set_dma_mask(DMA_32BIT_MASK) successful\n"); |
| 951 | } |
| 952 | |
| 953 | DBG_ERROR("Call pci_request_regions\n"); |
| 954 | |
Mithlesh Thukral | 371d7a9 | 2009-01-19 20:22:34 +0530 | [diff] [blame] | 955 | err = pci_request_regions(pcidev, sxg_driver_name); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 956 | if (err) { |
| 957 | DBG_ERROR("pci_request_regions FAILED err[%x]\n", err); |
| 958 | return err; |
| 959 | } |
| 960 | |
| 961 | DBG_ERROR("call pci_set_master\n"); |
| 962 | pci_set_master(pcidev); |
| 963 | |
| 964 | DBG_ERROR("call alloc_etherdev\n"); |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 965 | netdev = alloc_etherdev(sizeof(struct adapter_t)); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 966 | if (!netdev) { |
| 967 | err = -ENOMEM; |
| 968 | goto err_out_exit_sxg_probe; |
| 969 | } |
| 970 | DBG_ERROR("alloc_etherdev for slic netdev[%p]\n", netdev); |
| 971 | |
| 972 | SET_NETDEV_DEV(netdev, &pcidev->dev); |
| 973 | |
| 974 | pci_set_drvdata(pcidev, netdev); |
| 975 | adapter = netdev_priv(netdev); |
Mithlesh Thukral | a536efc | 2009-02-18 18:54:14 +0530 | [diff] [blame] | 976 | if (revision_id == 1) { |
| 977 | adapter->asictype = SAHARA_REV_A; |
| 978 | } else if (revision_id == 2) { |
| 979 | adapter->asictype = SAHARA_REV_B; |
| 980 | } else { |
| 981 | ASSERT(0); |
| 982 | DBG_ERROR("%s Unexpected revision ID %x\n", __FUNCTION__, revision_id); |
| 983 | goto err_out_exit_sxg_probe; |
| 984 | } |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 985 | adapter->netdev = netdev; |
| 986 | adapter->pcidev = pcidev; |
| 987 | |
| 988 | mmio_start = pci_resource_start(pcidev, 0); |
| 989 | mmio_len = pci_resource_len(pcidev, 0); |
| 990 | |
| 991 | DBG_ERROR("sxg: call ioremap(mmio_start[%lx], mmio_len[%lx])\n", |
| 992 | mmio_start, mmio_len); |
| 993 | |
| 994 | memmapped_ioaddr = ioremap(mmio_start, mmio_len); |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 995 | DBG_ERROR("sxg: %s MEMMAPPED_IOADDR [%p]\n", __func__, |
J.R. Mauro | 5c7514e | 2008-10-05 20:38:52 -0400 | [diff] [blame] | 996 | memmapped_ioaddr); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 997 | if (!memmapped_ioaddr) { |
| 998 | DBG_ERROR("%s cannot remap MMIO region %lx @ %lx\n", |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 999 | __func__, mmio_len, mmio_start); |
Mithlesh Thukral | 0d41472 | 2009-01-19 20:29:59 +0530 | [diff] [blame] | 1000 | goto err_out_free_mmio_region_0; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1001 | } |
| 1002 | |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 1003 | DBG_ERROR("sxg: %s found Alacritech SXG PCI, MMIO at %p, start[%lx] \ |
| 1004 | len[%lx], IRQ %d.\n", __func__, memmapped_ioaddr, mmio_start, |
| 1005 | mmio_len, pcidev->irq); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1006 | |
J.R. Mauro | 5c7514e | 2008-10-05 20:38:52 -0400 | [diff] [blame] | 1007 | adapter->HwRegs = (void *)memmapped_ioaddr; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1008 | adapter->base_addr = memmapped_ioaddr; |
| 1009 | |
| 1010 | mmio_start = pci_resource_start(pcidev, 2); |
| 1011 | mmio_len = pci_resource_len(pcidev, 2); |
| 1012 | |
| 1013 | DBG_ERROR("sxg: call ioremap(mmio_start[%lx], mmio_len[%lx])\n", |
| 1014 | mmio_start, mmio_len); |
| 1015 | |
| 1016 | memmapped_ioaddr = ioremap(mmio_start, mmio_len); |
J.R. Mauro | 5c7514e | 2008-10-05 20:38:52 -0400 | [diff] [blame] | 1017 | DBG_ERROR("sxg: %s MEMMAPPED_IOADDR [%p]\n", __func__, |
| 1018 | memmapped_ioaddr); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1019 | if (!memmapped_ioaddr) { |
| 1020 | DBG_ERROR("%s cannot remap MMIO region %lx @ %lx\n", |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 1021 | __func__, mmio_len, mmio_start); |
Mithlesh Thukral | 0d41472 | 2009-01-19 20:29:59 +0530 | [diff] [blame] | 1022 | goto err_out_free_mmio_region_2; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1023 | } |
| 1024 | |
| 1025 | DBG_ERROR("sxg: %s found Alacritech SXG PCI, MMIO at %p, " |
| 1026 | "start[%lx] len[%lx], IRQ %d.\n", __func__, |
| 1027 | memmapped_ioaddr, mmio_start, mmio_len, pcidev->irq); |
| 1028 | |
| 1029 | adapter->UcodeRegs = (void *)memmapped_ioaddr; |
| 1030 | |
| 1031 | adapter->State = SXG_STATE_INITIALIZING; |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 1032 | /* |
| 1033 | * Maintain a list of all adapters anchored by |
| 1034 | * the global SxgDriver structure. |
| 1035 | */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1036 | adapter->Next = SxgDriver.Adapters; |
| 1037 | SxgDriver.Adapters = adapter; |
| 1038 | adapter->AdapterID = ++SxgDriver.AdapterID; |
| 1039 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 1040 | /* Initialize CRC table used to determine multicast hash */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1041 | sxg_mcast_init_crc32(); |
| 1042 | |
| 1043 | adapter->JumboEnabled = FALSE; |
| 1044 | adapter->RssEnabled = FALSE; |
| 1045 | if (adapter->JumboEnabled) { |
| 1046 | adapter->FrameSize = JUMBOMAXFRAME; |
| 1047 | adapter->ReceiveBufferSize = SXG_RCV_JUMBO_BUFFER_SIZE; |
| 1048 | } else { |
| 1049 | adapter->FrameSize = ETHERMAXFRAME; |
| 1050 | adapter->ReceiveBufferSize = SXG_RCV_DATA_BUFFER_SIZE; |
| 1051 | } |
| 1052 | |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 1053 | /* |
| 1054 | * status = SXG_READ_EEPROM(adapter); |
| 1055 | * if (!status) { |
| 1056 | * goto sxg_init_bad; |
| 1057 | * } |
| 1058 | */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1059 | |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 1060 | DBG_ERROR("sxg: %s ENTER sxg_config_pci\n", __func__); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1061 | sxg_config_pci(pcidev); |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 1062 | DBG_ERROR("sxg: %s EXIT sxg_config_pci\n", __func__); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1063 | |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 1064 | DBG_ERROR("sxg: %s ENTER sxg_init_driver\n", __func__); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1065 | sxg_init_driver(); |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 1066 | DBG_ERROR("sxg: %s EXIT sxg_init_driver\n", __func__); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1067 | |
| 1068 | adapter->vendid = pci_tbl_entry->vendor; |
| 1069 | adapter->devid = pci_tbl_entry->device; |
| 1070 | adapter->subsysid = pci_tbl_entry->subdevice; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1071 | adapter->slotnumber = ((pcidev->devfn >> 3) & 0x1F); |
| 1072 | adapter->functionnumber = (pcidev->devfn & 0x7); |
| 1073 | adapter->memorylength = pci_resource_len(pcidev, 0); |
| 1074 | adapter->irq = pcidev->irq; |
| 1075 | adapter->next_netdevice = head_netdevice; |
| 1076 | head_netdevice = netdev; |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 1077 | adapter->port = 0; /*adapter->functionnumber; */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1078 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 1079 | /* Allocate memory and other resources */ |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 1080 | DBG_ERROR("sxg: %s ENTER sxg_allocate_resources\n", __func__); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1081 | status = sxg_allocate_resources(adapter); |
| 1082 | DBG_ERROR("sxg: %s EXIT sxg_allocate_resources status %x\n", |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 1083 | __func__, status); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1084 | if (status != STATUS_SUCCESS) { |
| 1085 | goto err_out_unmap; |
| 1086 | } |
| 1087 | |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 1088 | DBG_ERROR("sxg: %s ENTER sxg_download_microcode\n", __func__); |
Mithlesh Thukral | a536efc | 2009-02-18 18:54:14 +0530 | [diff] [blame] | 1089 | if (sxg_download_microcode(adapter, SXG_UCODE_SYSTEM)) { |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1090 | DBG_ERROR("sxg: %s ENTER sxg_adapter_set_hwaddr\n", |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 1091 | __func__); |
Mithlesh Thukral | 1323e5f | 2009-01-05 21:13:23 +0530 | [diff] [blame] | 1092 | sxg_read_config(adapter); |
Mithlesh Thukral | 54aed11 | 2009-01-19 20:27:17 +0530 | [diff] [blame] | 1093 | status = sxg_adapter_set_hwaddr(adapter); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1094 | } else { |
| 1095 | adapter->state = ADAPT_FAIL; |
| 1096 | adapter->linkstate = LINK_DOWN; |
| 1097 | DBG_ERROR("sxg_download_microcode FAILED status[%x]\n", status); |
| 1098 | } |
| 1099 | |
| 1100 | netdev->base_addr = (unsigned long)adapter->base_addr; |
| 1101 | netdev->irq = adapter->irq; |
| 1102 | netdev->open = sxg_entry_open; |
| 1103 | netdev->stop = sxg_entry_halt; |
| 1104 | netdev->hard_start_xmit = sxg_send_packets; |
| 1105 | netdev->do_ioctl = sxg_ioctl; |
Mithlesh Thukral | 7c66b14 | 2009-02-06 19:30:40 +0530 | [diff] [blame] | 1106 | netdev->change_mtu = sxg_change_mtu; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1107 | #if XXXTODO |
| 1108 | netdev->set_mac_address = sxg_mac_set_address; |
Mithlesh Thukral | 6a2946b | 2009-01-19 20:24:30 +0530 | [diff] [blame] | 1109 | #endif |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1110 | netdev->get_stats = sxg_get_stats; |
Mithlesh Thukral | 1323e5f | 2009-01-05 21:13:23 +0530 | [diff] [blame] | 1111 | netdev->set_multicast_list = sxg_mcast_set_list; |
Mithlesh Thukral | 371d7a9 | 2009-01-19 20:22:34 +0530 | [diff] [blame] | 1112 | SET_ETHTOOL_OPS(netdev, &sxg_nic_ethtool_ops); |
Mithlesh Thukral | 9914f05 | 2009-02-18 18:51:29 +0530 | [diff] [blame] | 1113 | netdev->features |= NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM; |
Mithlesh Thukral | 1782199f | 2009-02-06 19:32:28 +0530 | [diff] [blame] | 1114 | err = sxg_set_interrupt_capability(adapter); |
| 1115 | if (err != STATUS_SUCCESS) |
| 1116 | DBG_ERROR("Cannot enable MSI-X capability\n"); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1117 | |
| 1118 | strcpy(netdev->name, "eth%d"); |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 1119 | /* strcpy(netdev->name, pci_name(pcidev)); */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1120 | if ((err = register_netdev(netdev))) { |
| 1121 | DBG_ERROR("Cannot register net device, aborting. %s\n", |
| 1122 | netdev->name); |
| 1123 | goto err_out_unmap; |
| 1124 | } |
| 1125 | |
Mithlesh Thukral | b62a294 | 2009-01-30 20:19:03 +0530 | [diff] [blame] | 1126 | netif_napi_add(netdev, &adapter->napi, |
| 1127 | sxg_poll, SXG_NETDEV_WEIGHT); |
Mithlesh Thukral | e5ea8da | 2009-03-20 17:37:32 +0530 | [diff] [blame^] | 1128 | netdev->watchdog_timeo = 2 * HZ; |
| 1129 | init_timer(&adapter->watchdog_timer); |
| 1130 | adapter->watchdog_timer.function = &sxg_watchdog; |
| 1131 | adapter->watchdog_timer.data = (unsigned long) adapter; |
| 1132 | INIT_WORK(&adapter->update_link_status, sxg_update_link_status); |
| 1133 | |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1134 | DBG_ERROR |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 1135 | ("sxg: %s addr 0x%lx, irq %d, MAC addr \ |
| 1136 | %02X:%02X:%02X:%02X:%02X:%02X\n", |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1137 | netdev->name, netdev->base_addr, pcidev->irq, netdev->dev_addr[0], |
| 1138 | netdev->dev_addr[1], netdev->dev_addr[2], netdev->dev_addr[3], |
| 1139 | netdev->dev_addr[4], netdev->dev_addr[5]); |
| 1140 | |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 1141 | /* sxg_init_bad: */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1142 | ASSERT(status == FALSE); |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 1143 | /* sxg_free_adapter(adapter); */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1144 | |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 1145 | DBG_ERROR("sxg: %s EXIT status[%x] jiffies[%lx] cpu %d\n", __func__, |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1146 | status, jiffies, smp_processor_id()); |
| 1147 | return status; |
| 1148 | |
| 1149 | err_out_unmap: |
Mithlesh Thukral | 0d41472 | 2009-01-19 20:29:59 +0530 | [diff] [blame] | 1150 | sxg_free_resources(adapter); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1151 | |
Mithlesh Thukral | 0d41472 | 2009-01-19 20:29:59 +0530 | [diff] [blame] | 1152 | err_out_free_mmio_region_2: |
| 1153 | |
| 1154 | mmio_start = pci_resource_start(pcidev, 2); |
| 1155 | mmio_len = pci_resource_len(pcidev, 2); |
| 1156 | release_mem_region(mmio_start, mmio_len); |
| 1157 | |
| 1158 | err_out_free_mmio_region_0: |
| 1159 | |
| 1160 | mmio_start = pci_resource_start(pcidev, 0); |
| 1161 | mmio_len = pci_resource_len(pcidev, 0); |
| 1162 | |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1163 | release_mem_region(mmio_start, mmio_len); |
| 1164 | |
| 1165 | err_out_exit_sxg_probe: |
| 1166 | |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 1167 | DBG_ERROR("%s EXIT jiffies[%lx] cpu %d\n", __func__, jiffies, |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1168 | smp_processor_id()); |
| 1169 | |
Mithlesh Thukral | 0d41472 | 2009-01-19 20:29:59 +0530 | [diff] [blame] | 1170 | pci_disable_device(pcidev); |
| 1171 | DBG_ERROR("sxg: %s deallocate device\n", __FUNCTION__); |
| 1172 | kfree(netdev); |
| 1173 | printk("Exit %s, Sxg driver loading failed..\n", __FUNCTION__); |
| 1174 | |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1175 | return -ENODEV; |
| 1176 | } |
| 1177 | |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1178 | /* |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 1179 | * LINE BASE Interrupt routines.. |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1180 | * |
| 1181 | * sxg_disable_interrupt |
| 1182 | * |
| 1183 | * DisableInterrupt Handler |
| 1184 | * |
| 1185 | * Arguments: |
| 1186 | * |
| 1187 | * adapter: Our adapter structure |
| 1188 | * |
| 1189 | * Return Value: |
| 1190 | * None. |
| 1191 | */ |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 1192 | static void sxg_disable_interrupt(struct adapter_t *adapter) |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1193 | { |
| 1194 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "DisIntr", |
| 1195 | adapter, adapter->InterruptsEnabled, 0, 0); |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 1196 | /* For now, RSS is disabled with line based interrupts */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1197 | ASSERT(adapter->RssEnabled == FALSE); |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 1198 | /* Turn off interrupts by writing to the icr register. */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1199 | WRITE_REG(adapter->UcodeRegs[0].Icr, SXG_ICR(0, SXG_ICR_DISABLE), TRUE); |
| 1200 | |
| 1201 | adapter->InterruptsEnabled = 0; |
| 1202 | |
| 1203 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "XDisIntr", |
| 1204 | adapter, adapter->InterruptsEnabled, 0, 0); |
| 1205 | } |
| 1206 | |
| 1207 | /* |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1208 | * sxg_enable_interrupt |
| 1209 | * |
| 1210 | * EnableInterrupt Handler |
| 1211 | * |
| 1212 | * Arguments: |
| 1213 | * |
| 1214 | * adapter: Our adapter structure |
| 1215 | * |
| 1216 | * Return Value: |
| 1217 | * None. |
| 1218 | */ |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 1219 | static void sxg_enable_interrupt(struct adapter_t *adapter) |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1220 | { |
| 1221 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "EnIntr", |
| 1222 | adapter, adapter->InterruptsEnabled, 0, 0); |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 1223 | /* For now, RSS is disabled with line based interrupts */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1224 | ASSERT(adapter->RssEnabled == FALSE); |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 1225 | /* Turn on interrupts by writing to the icr register. */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1226 | WRITE_REG(adapter->UcodeRegs[0].Icr, SXG_ICR(0, SXG_ICR_ENABLE), TRUE); |
| 1227 | |
| 1228 | adapter->InterruptsEnabled = 1; |
| 1229 | |
| 1230 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "XEnIntr", |
| 1231 | adapter, 0, 0, 0); |
| 1232 | } |
| 1233 | |
| 1234 | /* |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1235 | * sxg_isr - Process an line-based interrupt |
| 1236 | * |
| 1237 | * Arguments: |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 1238 | * Context - Our adapter structure |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1239 | * QueueDefault - Output parameter to queue to default CPU |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 1240 | * TargetCpus - Output bitmap to schedule DPC's |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1241 | * |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 1242 | * Return Value: TRUE if our interrupt |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1243 | */ |
| 1244 | static irqreturn_t sxg_isr(int irq, void *dev_id) |
| 1245 | { |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 1246 | struct net_device *dev = (struct net_device *) dev_id; |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 1247 | struct adapter_t *adapter = (struct adapter_t *) netdev_priv(dev); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1248 | |
Mithlesh Thukral | 6a2946b | 2009-01-19 20:24:30 +0530 | [diff] [blame] | 1249 | if(adapter->state != ADAPT_UP) |
| 1250 | return IRQ_NONE; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1251 | adapter->Stats.NumInts++; |
| 1252 | if (adapter->Isr[0] == 0) { |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 1253 | /* |
| 1254 | * The SLIC driver used to experience a number of spurious |
| 1255 | * interrupts due to the delay associated with the masking of |
| 1256 | * the interrupt (we'd bounce back in here). If we see that |
| 1257 | * again with Sahara,add a READ_REG of the Icr register after |
| 1258 | * the WRITE_REG below. |
| 1259 | */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1260 | adapter->Stats.FalseInts++; |
| 1261 | return IRQ_NONE; |
| 1262 | } |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 1263 | /* |
| 1264 | * Move the Isr contents and clear the value in |
| 1265 | * shared memory, and mask interrupts |
| 1266 | */ |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 1267 | /* ASSERT(adapter->IsrDpcsPending == 0); */ |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 1268 | #if XXXTODO /* RSS Stuff */ |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 1269 | /* |
| 1270 | * If RSS is enabled and the ISR specifies SXG_ISR_EVENT, then |
| 1271 | * schedule DPC's based on event queues. |
| 1272 | */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1273 | if (adapter->RssEnabled && (adapter->IsrCopy[0] & SXG_ISR_EVENT)) { |
| 1274 | for (i = 0; |
| 1275 | i < adapter->RssSystemInfo->ProcessorInfo.RssCpuCount; |
| 1276 | i++) { |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 1277 | struct sxg_event_ring *EventRing = |
| 1278 | &adapter->EventRings[i]; |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 1279 | struct sxg_event *Event = |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1280 | &EventRing->Ring[adapter->NextEvent[i]]; |
J.R. Mauro | 5c7514e | 2008-10-05 20:38:52 -0400 | [diff] [blame] | 1281 | unsigned char Cpu = |
| 1282 | adapter->RssSystemInfo->RssIdToCpu[i]; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1283 | if (Event->Status & EVENT_STATUS_VALID) { |
| 1284 | adapter->IsrDpcsPending++; |
| 1285 | CpuMask |= (1 << Cpu); |
| 1286 | } |
| 1287 | } |
| 1288 | } |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 1289 | /* |
| 1290 | * Now, either schedule the CPUs specified by the CpuMask, |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 1291 | * or queue default |
| 1292 | */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1293 | if (CpuMask) { |
| 1294 | *QueueDefault = FALSE; |
| 1295 | } else { |
| 1296 | adapter->IsrDpcsPending = 1; |
| 1297 | *QueueDefault = TRUE; |
| 1298 | } |
| 1299 | *TargetCpus = CpuMask; |
| 1300 | #endif |
Mithlesh Thukral | b62a294 | 2009-01-30 20:19:03 +0530 | [diff] [blame] | 1301 | sxg_interrupt(adapter); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1302 | |
| 1303 | return IRQ_HANDLED; |
| 1304 | } |
| 1305 | |
Mithlesh Thukral | b62a294 | 2009-01-30 20:19:03 +0530 | [diff] [blame] | 1306 | static void sxg_interrupt(struct adapter_t *adapter) |
| 1307 | { |
| 1308 | WRITE_REG(adapter->UcodeRegs[0].Icr, SXG_ICR(0, SXG_ICR_MASK), TRUE); |
| 1309 | |
Randy Dunlap | c1f46a00 | 2009-02-11 13:22:56 -0800 | [diff] [blame] | 1310 | if (napi_schedule_prep(&adapter->napi)) { |
| 1311 | __napi_schedule(&adapter->napi); |
Mithlesh Thukral | b62a294 | 2009-01-30 20:19:03 +0530 | [diff] [blame] | 1312 | } |
| 1313 | } |
| 1314 | |
| 1315 | static void sxg_handle_interrupt(struct adapter_t *adapter, int *work_done, |
| 1316 | int budget) |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1317 | { |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 1318 | /* unsigned char RssId = 0; */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1319 | u32 NewIsr; |
Mithlesh Thukral | b62a294 | 2009-01-30 20:19:03 +0530 | [diff] [blame] | 1320 | int sxg_napi_continue = 1; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1321 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "HndlIntr", |
| 1322 | adapter, adapter->IsrCopy[0], 0, 0); |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 1323 | /* For now, RSS is disabled with line based interrupts */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1324 | ASSERT(adapter->RssEnabled == FALSE); |
Mithlesh Thukral | b62a294 | 2009-01-30 20:19:03 +0530 | [diff] [blame] | 1325 | |
| 1326 | adapter->IsrCopy[0] = adapter->Isr[0]; |
| 1327 | adapter->Isr[0] = 0; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1328 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 1329 | /* Always process the event queue. */ |
Mithlesh Thukral | b62a294 | 2009-01-30 20:19:03 +0530 | [diff] [blame] | 1330 | while (sxg_napi_continue) |
| 1331 | { |
| 1332 | sxg_process_event_queue(adapter, |
| 1333 | (adapter->RssEnabled ? /*RssId */ 0 : 0), |
| 1334 | &sxg_napi_continue, work_done, budget); |
| 1335 | } |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1336 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 1337 | #if XXXTODO /* RSS stuff */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1338 | if (--adapter->IsrDpcsPending) { |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 1339 | /* We're done. */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1340 | ASSERT(adapter->RssEnabled); |
| 1341 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "DPCsPend", |
| 1342 | adapter, 0, 0, 0); |
| 1343 | return; |
| 1344 | } |
| 1345 | #endif |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 1346 | /* Last (or only) DPC processes the ISR and clears the interrupt. */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1347 | NewIsr = sxg_process_isr(adapter, 0); |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 1348 | /* Reenable interrupts */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1349 | adapter->IsrCopy[0] = 0; |
| 1350 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "ClearIsr", |
| 1351 | adapter, NewIsr, 0, 0); |
| 1352 | |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1353 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "XHndlInt", |
| 1354 | adapter, 0, 0, 0); |
| 1355 | } |
Mithlesh Thukral | b62a294 | 2009-01-30 20:19:03 +0530 | [diff] [blame] | 1356 | static int sxg_poll(struct napi_struct *napi, int budget) |
| 1357 | { |
| 1358 | struct adapter_t *adapter = container_of(napi, struct adapter_t, napi); |
| 1359 | int work_done = 0; |
| 1360 | |
| 1361 | sxg_handle_interrupt(adapter, &work_done, budget); |
| 1362 | |
| 1363 | if (work_done < budget) { |
Randy Dunlap | c1f46a00 | 2009-02-11 13:22:56 -0800 | [diff] [blame] | 1364 | napi_complete(napi); |
Mithlesh Thukral | b62a294 | 2009-01-30 20:19:03 +0530 | [diff] [blame] | 1365 | WRITE_REG(adapter->UcodeRegs[0].Isr, 0, TRUE); |
| 1366 | } |
Mithlesh Thukral | b62a294 | 2009-01-30 20:19:03 +0530 | [diff] [blame] | 1367 | return work_done; |
| 1368 | } |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1369 | |
| 1370 | /* |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1371 | * sxg_process_isr - Process an interrupt. Called from the line-based and |
| 1372 | * message based interrupt DPC routines |
| 1373 | * |
| 1374 | * Arguments: |
| 1375 | * adapter - Our adapter structure |
| 1376 | * Queue - The ISR that needs processing |
| 1377 | * |
| 1378 | * Return Value: |
| 1379 | * None |
| 1380 | */ |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 1381 | static int sxg_process_isr(struct adapter_t *adapter, u32 MessageId) |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1382 | { |
| 1383 | u32 Isr = adapter->IsrCopy[MessageId]; |
| 1384 | u32 NewIsr = 0; |
| 1385 | |
| 1386 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "ProcIsr", |
| 1387 | adapter, Isr, 0, 0); |
| 1388 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 1389 | /* Error */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1390 | if (Isr & SXG_ISR_ERR) { |
| 1391 | if (Isr & SXG_ISR_PDQF) { |
| 1392 | adapter->Stats.PdqFull++; |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 1393 | DBG_ERROR("%s: SXG_ISR_ERR PDQF!!\n", __func__); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1394 | } |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 1395 | /* No host buffer */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1396 | if (Isr & SXG_ISR_RMISS) { |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 1397 | /* |
| 1398 | * There is a bunch of code in the SLIC driver which |
| 1399 | * attempts to process more receive events per DPC |
| 1400 | * if we start to fall behind. We'll probablyd |
| 1401 | * need to do something similar here, but hold |
| 1402 | * off for now. I don't want to make the code more |
| 1403 | * complicated than strictly needed. |
| 1404 | */ |
Mithlesh Thukral | 6a2946b | 2009-01-19 20:24:30 +0530 | [diff] [blame] | 1405 | adapter->stats.rx_missed_errors++; |
Mithlesh Thukral | 54aed11 | 2009-01-19 20:27:17 +0530 | [diff] [blame] | 1406 | if (adapter->stats.rx_missed_errors< 5) { |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1407 | DBG_ERROR("%s: SXG_ISR_ERR RMISS!!\n", |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 1408 | __func__); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1409 | } |
| 1410 | } |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 1411 | /* Card crash */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1412 | if (Isr & SXG_ISR_DEAD) { |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 1413 | /* |
| 1414 | * Set aside the crash info and set the adapter state |
| 1415 | * to RESET |
| 1416 | */ |
| 1417 | adapter->CrashCpu = (unsigned char) |
| 1418 | ((Isr & SXG_ISR_CPU) >> SXG_ISR_CPU_SHIFT); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1419 | adapter->CrashLocation = (ushort) (Isr & SXG_ISR_CRASH); |
| 1420 | adapter->Dead = TRUE; |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 1421 | DBG_ERROR("%s: ISR_DEAD %x, CPU: %d\n", __func__, |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1422 | adapter->CrashLocation, adapter->CrashCpu); |
| 1423 | } |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 1424 | /* Event ring full */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1425 | if (Isr & SXG_ISR_ERFULL) { |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 1426 | /* |
| 1427 | * Same issue as RMISS, really. This means the |
| 1428 | * host is falling behind the card. Need to increase |
| 1429 | * event ring size, process more events per interrupt, |
| 1430 | * and/or reduce/remove interrupt aggregation. |
| 1431 | */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1432 | adapter->Stats.EventRingFull++; |
| 1433 | DBG_ERROR("%s: SXG_ISR_ERR EVENT RING FULL!!\n", |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 1434 | __func__); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1435 | } |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 1436 | /* Transmit drop - no DRAM buffers or XMT error */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1437 | if (Isr & SXG_ISR_XDROP) { |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 1438 | DBG_ERROR("%s: SXG_ISR_ERR XDROP!!\n", __func__); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1439 | } |
| 1440 | } |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 1441 | /* Slowpath send completions */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1442 | if (Isr & SXG_ISR_SPSEND) { |
Mithlesh Thukral | c5e5cf5 | 2009-02-06 19:31:40 +0530 | [diff] [blame] | 1443 | sxg_complete_slow_send(adapter); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1444 | } |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 1445 | /* Dump */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1446 | if (Isr & SXG_ISR_UPC) { |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 1447 | /* Maybe change when debug is added.. */ |
Mithlesh Thukral | 54aed11 | 2009-01-19 20:27:17 +0530 | [diff] [blame] | 1448 | // ASSERT(adapter->DumpCmdRunning); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1449 | adapter->DumpCmdRunning = FALSE; |
| 1450 | } |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 1451 | /* Link event */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1452 | if (Isr & SXG_ISR_LINK) { |
Mithlesh Thukral | e5ea8da | 2009-03-20 17:37:32 +0530 | [diff] [blame^] | 1453 | if (adapter->state != ADAPT_DOWN) { |
| 1454 | adapter->link_status_changed = 1; |
| 1455 | schedule_work(&adapter->update_link_status); |
| 1456 | } |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1457 | } |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 1458 | /* Debug - breakpoint hit */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1459 | if (Isr & SXG_ISR_BREAK) { |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 1460 | /* |
| 1461 | * At the moment AGDB isn't written to support interactive |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 1462 | * debug sessions. When it is, this interrupt will be used to |
| 1463 | * signal AGDB that it has hit a breakpoint. For now, ASSERT. |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 1464 | */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1465 | ASSERT(0); |
| 1466 | } |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 1467 | /* Heartbeat response */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1468 | if (Isr & SXG_ISR_PING) { |
| 1469 | adapter->PingOutstanding = FALSE; |
| 1470 | } |
| 1471 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "XProcIsr", |
| 1472 | adapter, Isr, NewIsr, 0); |
| 1473 | |
| 1474 | return (NewIsr); |
| 1475 | } |
| 1476 | |
| 1477 | /* |
Mithlesh Thukral | 9914f05 | 2009-02-18 18:51:29 +0530 | [diff] [blame] | 1478 | * sxg_rcv_checksum - Set the checksum for received packet |
| 1479 | * |
| 1480 | * Arguements: |
Mithlesh Thukral | bbb18b9 | 2009-02-24 18:07:59 +0530 | [diff] [blame] | 1481 | * @adapter - Adapter structure on which packet is received |
Mithlesh Thukral | 9914f05 | 2009-02-18 18:51:29 +0530 | [diff] [blame] | 1482 | * @skb - Packet which is receieved |
| 1483 | * @Event - Event read from hardware |
| 1484 | */ |
| 1485 | |
Mithlesh Thukral | bbb18b9 | 2009-02-24 18:07:59 +0530 | [diff] [blame] | 1486 | void sxg_rcv_checksum(struct adapter_t *adapter, struct sk_buff *skb, |
| 1487 | struct sxg_event *Event) |
Mithlesh Thukral | 9914f05 | 2009-02-18 18:51:29 +0530 | [diff] [blame] | 1488 | { |
| 1489 | skb->ip_summed = CHECKSUM_NONE; |
Mithlesh Thukral | bbb18b9 | 2009-02-24 18:07:59 +0530 | [diff] [blame] | 1490 | if (likely(adapter->flags & SXG_RCV_IP_CSUM_ENABLED)) { |
| 1491 | if (likely(adapter->flags & SXG_RCV_TCP_CSUM_ENABLED) |
| 1492 | && (Event->Status & EVENT_STATUS_TCPIP)) { |
| 1493 | if(!(Event->Status & EVENT_STATUS_TCPBAD)) |
| 1494 | skb->ip_summed = CHECKSUM_UNNECESSARY; |
| 1495 | if(!(Event->Status & EVENT_STATUS_IPBAD)) |
Mithlesh Thukral | 9914f05 | 2009-02-18 18:51:29 +0530 | [diff] [blame] | 1496 | skb->ip_summed = CHECKSUM_UNNECESSARY; |
Mithlesh Thukral | bbb18b9 | 2009-02-24 18:07:59 +0530 | [diff] [blame] | 1497 | } else if(Event->Status & EVENT_STATUS_IPONLY) { |
| 1498 | if(!(Event->Status & EVENT_STATUS_IPBAD)) |
| 1499 | skb->ip_summed = CHECKSUM_UNNECESSARY; |
Mithlesh Thukral | 9914f05 | 2009-02-18 18:51:29 +0530 | [diff] [blame] | 1500 | } |
| 1501 | } |
| 1502 | } |
| 1503 | |
| 1504 | /* |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1505 | * sxg_process_event_queue - Process our event queue |
| 1506 | * |
| 1507 | * Arguments: |
| 1508 | * - adapter - Adapter structure |
| 1509 | * - RssId - The event queue requiring processing |
| 1510 | * |
| 1511 | * Return Value: |
| 1512 | * None. |
| 1513 | */ |
Mithlesh Thukral | b62a294 | 2009-01-30 20:19:03 +0530 | [diff] [blame] | 1514 | static u32 sxg_process_event_queue(struct adapter_t *adapter, u32 RssId, |
| 1515 | int *sxg_napi_continue, int *work_done, int budget) |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1516 | { |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 1517 | struct sxg_event_ring *EventRing = &adapter->EventRings[RssId]; |
| 1518 | struct sxg_event *Event = &EventRing->Ring[adapter->NextEvent[RssId]]; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1519 | u32 EventsProcessed = 0, Batches = 0; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1520 | struct sk_buff *skb; |
| 1521 | #ifdef LINUX_HANDLES_RCV_INDICATION_LISTS |
| 1522 | struct sk_buff *prev_skb = NULL; |
| 1523 | struct sk_buff *IndicationList[SXG_RCV_ARRAYSIZE]; |
| 1524 | u32 Index; |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 1525 | struct sxg_rcv_data_buffer_hdr *RcvDataBufferHdr; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1526 | #endif |
| 1527 | u32 ReturnStatus = 0; |
Mithlesh Thukral | 7c66b14 | 2009-02-06 19:30:40 +0530 | [diff] [blame] | 1528 | int sxg_rcv_data_buffers = SXG_RCV_DATA_BUFFERS; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1529 | |
| 1530 | ASSERT((adapter->State == SXG_STATE_RUNNING) || |
| 1531 | (adapter->State == SXG_STATE_PAUSING) || |
| 1532 | (adapter->State == SXG_STATE_PAUSED) || |
| 1533 | (adapter->State == SXG_STATE_HALTING)); |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 1534 | /* |
| 1535 | * We may still have unprocessed events on the queue if |
| 1536 | * the card crashed. Don't process them. |
| 1537 | */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1538 | if (adapter->Dead) { |
| 1539 | return (0); |
| 1540 | } |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 1541 | /* |
| 1542 | * In theory there should only be a single processor that |
| 1543 | * accesses this queue, and only at interrupt-DPC time. So/ |
| 1544 | * we shouldn't need a lock for any of this. |
| 1545 | */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1546 | while (Event->Status & EVENT_STATUS_VALID) { |
Mithlesh Thukral | b62a294 | 2009-01-30 20:19:03 +0530 | [diff] [blame] | 1547 | (*sxg_napi_continue) = 1; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1548 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "Event", |
| 1549 | Event, Event->Code, Event->Status, |
| 1550 | adapter->NextEvent); |
| 1551 | switch (Event->Code) { |
| 1552 | case EVENT_CODE_BUFFERS: |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 1553 | /* struct sxg_ring_info Head & Tail == unsigned char */ |
| 1554 | ASSERT(!(Event->CommandIndex & 0xFF00)); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1555 | sxg_complete_descriptor_blocks(adapter, |
| 1556 | Event->CommandIndex); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1557 | break; |
| 1558 | case EVENT_CODE_SLOWRCV: |
Mithlesh Thukral | b62a294 | 2009-01-30 20:19:03 +0530 | [diff] [blame] | 1559 | (*work_done)++; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1560 | --adapter->RcvBuffersOnCard; |
| 1561 | if ((skb = sxg_slow_receive(adapter, Event))) { |
| 1562 | u32 rx_bytes; |
| 1563 | #ifdef LINUX_HANDLES_RCV_INDICATION_LISTS |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 1564 | /* Add it to our indication list */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1565 | SXG_ADD_RCV_PACKET(adapter, skb, prev_skb, |
| 1566 | IndicationList, num_skbs); |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 1567 | /* |
| 1568 | * Linux, we just pass up each skb to the |
| 1569 | * protocol above at this point, there is no |
| 1570 | * capability of an indication list. |
| 1571 | */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1572 | #else |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 1573 | /* CHECK skb_pull(skb, INIC_RCVBUF_HEADSIZE); */ |
| 1574 | /* (rcvbuf->length & IRHDDR_FLEN_MSK); */ |
| 1575 | rx_bytes = Event->Length; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1576 | adapter->stats.rx_packets++; |
| 1577 | adapter->stats.rx_bytes += rx_bytes; |
Mithlesh Thukral | bbb18b9 | 2009-02-24 18:07:59 +0530 | [diff] [blame] | 1578 | sxg_rcv_checksum(adapter, skb, Event); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1579 | skb->dev = adapter->netdev; |
Mithlesh Thukral | b62a294 | 2009-01-30 20:19:03 +0530 | [diff] [blame] | 1580 | netif_receive_skb(skb); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1581 | #endif |
| 1582 | } |
| 1583 | break; |
| 1584 | default: |
| 1585 | DBG_ERROR("%s: ERROR Invalid EventCode %d\n", |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 1586 | __func__, Event->Code); |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 1587 | /* ASSERT(0); */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1588 | } |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 1589 | /* |
| 1590 | * See if we need to restock card receive buffers. |
| 1591 | * There are two things to note here: |
| 1592 | * First - This test is not SMP safe. The |
| 1593 | * adapter->BuffersOnCard field is protected via atomic |
| 1594 | * interlocked calls, but we do not protect it with respect |
| 1595 | * to these tests. The only way to do that is with a lock, |
| 1596 | * and I don't want to grab a lock every time we adjust the |
| 1597 | * BuffersOnCard count. Instead, we allow the buffer |
| 1598 | * replenishment to be off once in a while. The worst that |
| 1599 | * can happen is the card is given on more-or-less descriptor |
| 1600 | * block than the arbitrary value we've chosen. No big deal |
| 1601 | * In short DO NOT ADD A LOCK HERE, OR WHERE RcvBuffersOnCard |
| 1602 | * is adjusted. |
| 1603 | * Second - We expect this test to rarely |
| 1604 | * evaluate to true. We attempt to refill descriptor blocks |
| 1605 | * as they are returned to us (sxg_complete_descriptor_blocks) |
| 1606 | * so The only time this should evaluate to true is when |
| 1607 | * sxg_complete_descriptor_blocks failed to allocate |
| 1608 | * receive buffers. |
| 1609 | */ |
Mithlesh Thukral | 7c66b14 | 2009-02-06 19:30:40 +0530 | [diff] [blame] | 1610 | if (adapter->JumboEnabled) |
| 1611 | sxg_rcv_data_buffers = SXG_JUMBO_RCV_DATA_BUFFERS; |
| 1612 | |
| 1613 | if (adapter->RcvBuffersOnCard < sxg_rcv_data_buffers) { |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1614 | sxg_stock_rcv_buffers(adapter); |
| 1615 | } |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 1616 | /* |
| 1617 | * It's more efficient to just set this to zero. |
| 1618 | * But clearing the top bit saves potential debug info... |
| 1619 | */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1620 | Event->Status &= ~EVENT_STATUS_VALID; |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 1621 | /* Advance to the next event */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1622 | SXG_ADVANCE_INDEX(adapter->NextEvent[RssId], EVENT_RING_SIZE); |
| 1623 | Event = &EventRing->Ring[adapter->NextEvent[RssId]]; |
| 1624 | EventsProcessed++; |
| 1625 | if (EventsProcessed == EVENT_RING_BATCH) { |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 1626 | /* Release a batch of events back to the card */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1627 | WRITE_REG(adapter->UcodeRegs[RssId].EventRelease, |
| 1628 | EVENT_RING_BATCH, FALSE); |
| 1629 | EventsProcessed = 0; |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 1630 | /* |
| 1631 | * If we've processed our batch limit, break out of the |
| 1632 | * loop and return SXG_ISR_EVENT to arrange for us to |
| 1633 | * be called again |
| 1634 | */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1635 | if (Batches++ == EVENT_BATCH_LIMIT) { |
| 1636 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, |
| 1637 | TRACE_NOISY, "EvtLimit", Batches, |
| 1638 | adapter->NextEvent, 0, 0); |
| 1639 | ReturnStatus = SXG_ISR_EVENT; |
| 1640 | break; |
| 1641 | } |
| 1642 | } |
Mithlesh Thukral | b62a294 | 2009-01-30 20:19:03 +0530 | [diff] [blame] | 1643 | if (*work_done >= budget) { |
| 1644 | WRITE_REG(adapter->UcodeRegs[RssId].EventRelease, |
| 1645 | EventsProcessed, FALSE); |
| 1646 | EventsProcessed = 0; |
| 1647 | (*sxg_napi_continue) = 0; |
| 1648 | break; |
| 1649 | } |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1650 | } |
Mithlesh Thukral | b62a294 | 2009-01-30 20:19:03 +0530 | [diff] [blame] | 1651 | if (!(Event->Status & EVENT_STATUS_VALID)) |
| 1652 | (*sxg_napi_continue) = 0; |
| 1653 | |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1654 | #ifdef LINUX_HANDLES_RCV_INDICATION_LISTS |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 1655 | /* Indicate any received dumb-nic frames */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1656 | SXG_INDICATE_PACKETS(adapter, IndicationList, num_skbs); |
| 1657 | #endif |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 1658 | /* Release events back to the card. */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1659 | if (EventsProcessed) { |
| 1660 | WRITE_REG(adapter->UcodeRegs[RssId].EventRelease, |
| 1661 | EventsProcessed, FALSE); |
| 1662 | } |
| 1663 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "XPrcEvnt", |
| 1664 | Batches, EventsProcessed, adapter->NextEvent, num_skbs); |
| 1665 | |
| 1666 | return (ReturnStatus); |
| 1667 | } |
| 1668 | |
| 1669 | /* |
| 1670 | * sxg_complete_slow_send - Complete slowpath or dumb-nic sends |
| 1671 | * |
| 1672 | * Arguments - |
| 1673 | * adapter - A pointer to our adapter structure |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1674 | * Return |
| 1675 | * None |
| 1676 | */ |
Mithlesh Thukral | c5e5cf5 | 2009-02-06 19:31:40 +0530 | [diff] [blame] | 1677 | static void sxg_complete_slow_send(struct adapter_t *adapter) |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1678 | { |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 1679 | struct sxg_xmt_ring *XmtRing = &adapter->XmtRings[0]; |
| 1680 | struct sxg_ring_info *XmtRingInfo = &adapter->XmtRingZeroInfo; |
J.R. Mauro | 5c7514e | 2008-10-05 20:38:52 -0400 | [diff] [blame] | 1681 | u32 *ContextType; |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 1682 | struct sxg_cmd *XmtCmd; |
Mithlesh Thukral | 54aed11 | 2009-01-19 20:27:17 +0530 | [diff] [blame] | 1683 | unsigned long flags = 0; |
| 1684 | unsigned long sgl_flags = 0; |
Mithlesh Thukral | d9d578b | 2009-01-19 20:23:22 +0530 | [diff] [blame] | 1685 | unsigned int processed_count = 0; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1686 | |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 1687 | /* |
| 1688 | * NOTE - This lock is dropped and regrabbed in this loop. |
| 1689 | * This means two different processors can both be running/ |
| 1690 | * through this loop. Be *very* careful. |
| 1691 | */ |
Mithlesh Thukral | c5e5cf5 | 2009-02-06 19:31:40 +0530 | [diff] [blame] | 1692 | spin_lock_irqsave(&adapter->XmtZeroLock, flags); |
Mithlesh Thukral | d9d578b | 2009-01-19 20:23:22 +0530 | [diff] [blame] | 1693 | |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1694 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "CmpSnds", |
| 1695 | adapter, XmtRingInfo->Head, XmtRingInfo->Tail, 0); |
| 1696 | |
Mithlesh Thukral | d9d578b | 2009-01-19 20:23:22 +0530 | [diff] [blame] | 1697 | while ((XmtRingInfo->Tail != *adapter->XmtRingZeroIndex) |
| 1698 | && processed_count++ < SXG_COMPLETE_SLOW_SEND_LIMIT) { |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 1699 | /* |
| 1700 | * Locate the current Cmd (ring descriptor entry), and |
| 1701 | * associated SGL, and advance the tail |
| 1702 | */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1703 | SXG_RETURN_CMD(XmtRing, XmtRingInfo, XmtCmd, ContextType); |
| 1704 | ASSERT(ContextType); |
| 1705 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "CmpSnd", |
| 1706 | XmtRingInfo->Head, XmtRingInfo->Tail, XmtCmd, 0); |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 1707 | /* Clear the SGL field. */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1708 | XmtCmd->Sgl = 0; |
| 1709 | |
| 1710 | switch (*ContextType) { |
| 1711 | case SXG_SGL_DUMB: |
| 1712 | { |
| 1713 | struct sk_buff *skb; |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 1714 | struct sxg_scatter_gather *SxgSgl = |
| 1715 | (struct sxg_scatter_gather *)ContextType; |
Mithlesh Thukral | d9d578b | 2009-01-19 20:23:22 +0530 | [diff] [blame] | 1716 | dma64_addr_t FirstSgeAddress; |
| 1717 | u32 FirstSgeLength; |
Mithlesh Thukral | 1323e5f | 2009-01-05 21:13:23 +0530 | [diff] [blame] | 1718 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 1719 | /* Dumb-nic send. Command context is the dumb-nic SGL */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1720 | skb = (struct sk_buff *)ContextType; |
Mithlesh Thukral | 1323e5f | 2009-01-05 21:13:23 +0530 | [diff] [blame] | 1721 | skb = SxgSgl->DumbPacket; |
Mithlesh Thukral | d9d578b | 2009-01-19 20:23:22 +0530 | [diff] [blame] | 1722 | FirstSgeAddress = XmtCmd->Buffer.FirstSgeAddress; |
| 1723 | FirstSgeLength = XmtCmd->Buffer.FirstSgeLength; |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 1724 | /* Complete the send */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1725 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, |
| 1726 | TRACE_IMPORTANT, "DmSndCmp", skb, 0, |
| 1727 | 0, 0); |
| 1728 | ASSERT(adapter->Stats.XmtQLen); |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 1729 | /* |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 1730 | * Now drop the lock and complete the send |
| 1731 | * back to Microsoft. We need to drop the lock |
| 1732 | * because Microsoft can come back with a |
| 1733 | * chimney send, which results in a double trip |
| 1734 | * in SxgTcpOuput |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 1735 | */ |
Mithlesh Thukral | c5e5cf5 | 2009-02-06 19:31:40 +0530 | [diff] [blame] | 1736 | spin_unlock_irqrestore( |
| 1737 | &adapter->XmtZeroLock, flags); |
Mithlesh Thukral | d9d578b | 2009-01-19 20:23:22 +0530 | [diff] [blame] | 1738 | |
| 1739 | SxgSgl->DumbPacket = NULL; |
| 1740 | SXG_COMPLETE_DUMB_SEND(adapter, skb, |
| 1741 | FirstSgeAddress, |
| 1742 | FirstSgeLength); |
Mithlesh Thukral | c5e5cf5 | 2009-02-06 19:31:40 +0530 | [diff] [blame] | 1743 | SXG_FREE_SGL_BUFFER(adapter, SxgSgl, NULL); |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 1744 | /* and reacquire.. */ |
Mithlesh Thukral | c5e5cf5 | 2009-02-06 19:31:40 +0530 | [diff] [blame] | 1745 | spin_lock_irqsave(&adapter->XmtZeroLock, flags); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1746 | } |
| 1747 | break; |
| 1748 | default: |
| 1749 | ASSERT(0); |
| 1750 | } |
| 1751 | } |
Mithlesh Thukral | c5e5cf5 | 2009-02-06 19:31:40 +0530 | [diff] [blame] | 1752 | spin_unlock_irqrestore(&adapter->XmtZeroLock, flags); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1753 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "CmpSnd", |
| 1754 | adapter, XmtRingInfo->Head, XmtRingInfo->Tail, 0); |
| 1755 | } |
| 1756 | |
| 1757 | /* |
| 1758 | * sxg_slow_receive |
| 1759 | * |
| 1760 | * Arguments - |
| 1761 | * adapter - A pointer to our adapter structure |
| 1762 | * Event - Receive event |
| 1763 | * |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 1764 | * Return - skb |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1765 | */ |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 1766 | static struct sk_buff *sxg_slow_receive(struct adapter_t *adapter, |
| 1767 | struct sxg_event *Event) |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1768 | { |
Mithlesh Thukral | d0128aa | 2009-01-05 21:18:04 +0530 | [diff] [blame] | 1769 | u32 BufferSize = adapter->ReceiveBufferSize; |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 1770 | struct sxg_rcv_data_buffer_hdr *RcvDataBufferHdr; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1771 | struct sk_buff *Packet; |
Mithlesh Thukral | d9d578b | 2009-01-19 20:23:22 +0530 | [diff] [blame] | 1772 | static int read_counter = 0; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1773 | |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 1774 | RcvDataBufferHdr = (struct sxg_rcv_data_buffer_hdr *) Event->HostHandle; |
Mithlesh Thukral | d9d578b | 2009-01-19 20:23:22 +0530 | [diff] [blame] | 1775 | if(read_counter++ & 0x100) |
| 1776 | { |
| 1777 | sxg_collect_statistics(adapter); |
| 1778 | read_counter = 0; |
| 1779 | } |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1780 | ASSERT(RcvDataBufferHdr); |
| 1781 | ASSERT(RcvDataBufferHdr->State == SXG_BUFFER_ONCARD); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1782 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_IMPORTANT, "SlowRcv", Event, |
| 1783 | RcvDataBufferHdr, RcvDataBufferHdr->State, |
Mithlesh Thukral | d0128aa | 2009-01-05 21:18:04 +0530 | [diff] [blame] | 1784 | /*RcvDataBufferHdr->VirtualAddress*/ 0); |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 1785 | /* Drop rcv frames in non-running state */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1786 | switch (adapter->State) { |
| 1787 | case SXG_STATE_RUNNING: |
| 1788 | break; |
| 1789 | case SXG_STATE_PAUSING: |
| 1790 | case SXG_STATE_PAUSED: |
| 1791 | case SXG_STATE_HALTING: |
| 1792 | goto drop; |
| 1793 | default: |
| 1794 | ASSERT(0); |
| 1795 | goto drop; |
| 1796 | } |
| 1797 | |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 1798 | /* |
| 1799 | * memcpy(SXG_RECEIVE_DATA_LOCATION(RcvDataBufferHdr), |
| 1800 | * RcvDataBufferHdr->VirtualAddress, Event->Length); |
| 1801 | */ |
Mithlesh Thukral | 1323e5f | 2009-01-05 21:13:23 +0530 | [diff] [blame] | 1802 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 1803 | /* Change buffer state to UPSTREAM */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1804 | RcvDataBufferHdr->State = SXG_BUFFER_UPSTREAM; |
| 1805 | if (Event->Status & EVENT_STATUS_RCVERR) { |
| 1806 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "RcvError", |
| 1807 | Event, Event->Status, Event->HostHandle, 0); |
J.R. Mauro | 5c7514e | 2008-10-05 20:38:52 -0400 | [diff] [blame] | 1808 | sxg_process_rcv_error(adapter, *(u32 *) |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1809 | SXG_RECEIVE_DATA_LOCATION |
| 1810 | (RcvDataBufferHdr)); |
| 1811 | goto drop; |
| 1812 | } |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 1813 | #if XXXTODO /* VLAN stuff */ |
| 1814 | /* If there's a VLAN tag, extract it and validate it */ |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 1815 | if (((struct ether_header *) |
| 1816 | (SXG_RECEIVE_DATA_LOCATION(RcvDataBufferHdr)))->EtherType |
| 1817 | == ETHERTYPE_VLAN) { |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1818 | if (SxgExtractVlanHeader(adapter, RcvDataBufferHdr, Event) != |
| 1819 | STATUS_SUCCESS) { |
| 1820 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, |
| 1821 | "BadVlan", Event, |
| 1822 | SXG_RECEIVE_DATA_LOCATION(RcvDataBufferHdr), |
| 1823 | Event->Length, 0); |
| 1824 | goto drop; |
| 1825 | } |
| 1826 | } |
| 1827 | #endif |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 1828 | /* Dumb-nic frame. See if it passes our mac filter and update stats */ |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 1829 | |
Mithlesh Thukral | b040b07 | 2009-01-28 07:08:11 +0530 | [diff] [blame] | 1830 | if (!sxg_mac_filter(adapter, |
| 1831 | (struct ether_header *)(SXG_RECEIVE_DATA_LOCATION(RcvDataBufferHdr)), |
| 1832 | Event->Length)) { |
| 1833 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "RcvFiltr", |
| 1834 | Event, SXG_RECEIVE_DATA_LOCATION(RcvDataBufferHdr), |
| 1835 | Event->Length, 0); |
| 1836 | goto drop; |
| 1837 | } |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1838 | |
| 1839 | Packet = RcvDataBufferHdr->SxgDumbRcvPacket; |
Mithlesh Thukral | 1323e5f | 2009-01-05 21:13:23 +0530 | [diff] [blame] | 1840 | SXG_ADJUST_RCV_PACKET(Packet, RcvDataBufferHdr, Event); |
| 1841 | Packet->protocol = eth_type_trans(Packet, adapter->netdev); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1842 | |
| 1843 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_IMPORTANT, "DumbRcv", |
| 1844 | RcvDataBufferHdr, Packet, Event->Length, 0); |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 1845 | /* Lastly adjust the receive packet length. */ |
Mithlesh Thukral | 1323e5f | 2009-01-05 21:13:23 +0530 | [diff] [blame] | 1846 | RcvDataBufferHdr->SxgDumbRcvPacket = NULL; |
Mithlesh Thukral | 54aed11 | 2009-01-19 20:27:17 +0530 | [diff] [blame] | 1847 | RcvDataBufferHdr->PhysicalAddress = (dma_addr_t)NULL; |
Mithlesh Thukral | d0128aa | 2009-01-05 21:18:04 +0530 | [diff] [blame] | 1848 | SXG_ALLOCATE_RCV_PACKET(adapter, RcvDataBufferHdr, BufferSize); |
| 1849 | if (RcvDataBufferHdr->skb) |
| 1850 | { |
| 1851 | spin_lock(&adapter->RcvQLock); |
| 1852 | SXG_FREE_RCV_DATA_BUFFER(adapter, RcvDataBufferHdr); |
Mithlesh Thukral | d9d578b | 2009-01-19 20:23:22 +0530 | [diff] [blame] | 1853 | // adapter->RcvBuffersOnCard ++; |
Mithlesh Thukral | d0128aa | 2009-01-05 21:18:04 +0530 | [diff] [blame] | 1854 | spin_unlock(&adapter->RcvQLock); |
| 1855 | } |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1856 | return (Packet); |
| 1857 | |
| 1858 | drop: |
| 1859 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "DropRcv", |
| 1860 | RcvDataBufferHdr, Event->Length, 0, 0); |
Mithlesh Thukral | 54aed11 | 2009-01-19 20:27:17 +0530 | [diff] [blame] | 1861 | adapter->stats.rx_dropped++; |
| 1862 | // adapter->Stats.RcvDiscards++; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1863 | spin_lock(&adapter->RcvQLock); |
| 1864 | SXG_FREE_RCV_DATA_BUFFER(adapter, RcvDataBufferHdr); |
| 1865 | spin_unlock(&adapter->RcvQLock); |
| 1866 | return (NULL); |
| 1867 | } |
| 1868 | |
| 1869 | /* |
| 1870 | * sxg_process_rcv_error - process receive error and update |
| 1871 | * stats |
| 1872 | * |
| 1873 | * Arguments: |
| 1874 | * adapter - Adapter structure |
| 1875 | * ErrorStatus - 4-byte receive error status |
| 1876 | * |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 1877 | * Return Value : None |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1878 | */ |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 1879 | static void sxg_process_rcv_error(struct adapter_t *adapter, u32 ErrorStatus) |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1880 | { |
| 1881 | u32 Error; |
| 1882 | |
Mithlesh Thukral | 54aed11 | 2009-01-19 20:27:17 +0530 | [diff] [blame] | 1883 | adapter->stats.rx_errors++; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1884 | |
| 1885 | if (ErrorStatus & SXG_RCV_STATUS_TRANSPORT_ERROR) { |
| 1886 | Error = ErrorStatus & SXG_RCV_STATUS_TRANSPORT_MASK; |
| 1887 | switch (Error) { |
| 1888 | case SXG_RCV_STATUS_TRANSPORT_CSUM: |
| 1889 | adapter->Stats.TransportCsum++; |
| 1890 | break; |
| 1891 | case SXG_RCV_STATUS_TRANSPORT_UFLOW: |
| 1892 | adapter->Stats.TransportUflow++; |
| 1893 | break; |
| 1894 | case SXG_RCV_STATUS_TRANSPORT_HDRLEN: |
| 1895 | adapter->Stats.TransportHdrLen++; |
| 1896 | break; |
| 1897 | } |
| 1898 | } |
| 1899 | if (ErrorStatus & SXG_RCV_STATUS_NETWORK_ERROR) { |
| 1900 | Error = ErrorStatus & SXG_RCV_STATUS_NETWORK_MASK; |
| 1901 | switch (Error) { |
| 1902 | case SXG_RCV_STATUS_NETWORK_CSUM: |
| 1903 | adapter->Stats.NetworkCsum++; |
| 1904 | break; |
| 1905 | case SXG_RCV_STATUS_NETWORK_UFLOW: |
| 1906 | adapter->Stats.NetworkUflow++; |
| 1907 | break; |
| 1908 | case SXG_RCV_STATUS_NETWORK_HDRLEN: |
| 1909 | adapter->Stats.NetworkHdrLen++; |
| 1910 | break; |
| 1911 | } |
| 1912 | } |
| 1913 | if (ErrorStatus & SXG_RCV_STATUS_PARITY) { |
| 1914 | adapter->Stats.Parity++; |
| 1915 | } |
| 1916 | if (ErrorStatus & SXG_RCV_STATUS_LINK_ERROR) { |
| 1917 | Error = ErrorStatus & SXG_RCV_STATUS_LINK_MASK; |
| 1918 | switch (Error) { |
| 1919 | case SXG_RCV_STATUS_LINK_PARITY: |
| 1920 | adapter->Stats.LinkParity++; |
| 1921 | break; |
| 1922 | case SXG_RCV_STATUS_LINK_EARLY: |
| 1923 | adapter->Stats.LinkEarly++; |
| 1924 | break; |
| 1925 | case SXG_RCV_STATUS_LINK_BUFOFLOW: |
| 1926 | adapter->Stats.LinkBufOflow++; |
| 1927 | break; |
| 1928 | case SXG_RCV_STATUS_LINK_CODE: |
| 1929 | adapter->Stats.LinkCode++; |
| 1930 | break; |
| 1931 | case SXG_RCV_STATUS_LINK_DRIBBLE: |
| 1932 | adapter->Stats.LinkDribble++; |
| 1933 | break; |
| 1934 | case SXG_RCV_STATUS_LINK_CRC: |
| 1935 | adapter->Stats.LinkCrc++; |
| 1936 | break; |
| 1937 | case SXG_RCV_STATUS_LINK_OFLOW: |
| 1938 | adapter->Stats.LinkOflow++; |
| 1939 | break; |
| 1940 | case SXG_RCV_STATUS_LINK_UFLOW: |
| 1941 | adapter->Stats.LinkUflow++; |
| 1942 | break; |
| 1943 | } |
| 1944 | } |
| 1945 | } |
| 1946 | |
| 1947 | /* |
| 1948 | * sxg_mac_filter |
| 1949 | * |
| 1950 | * Arguments: |
| 1951 | * adapter - Adapter structure |
| 1952 | * pether - Ethernet header |
| 1953 | * length - Frame length |
| 1954 | * |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 1955 | * Return Value : TRUE if the frame is to be allowed |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1956 | */ |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 1957 | static bool sxg_mac_filter(struct adapter_t *adapter, |
| 1958 | struct ether_header *EtherHdr, ushort length) |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1959 | { |
| 1960 | bool EqualAddr; |
Mithlesh Thukral | b040b07 | 2009-01-28 07:08:11 +0530 | [diff] [blame] | 1961 | struct net_device *dev = adapter->netdev; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1962 | |
| 1963 | if (SXG_MULTICAST_PACKET(EtherHdr)) { |
| 1964 | if (SXG_BROADCAST_PACKET(EtherHdr)) { |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 1965 | /* broadcast */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1966 | if (adapter->MacFilter & MAC_BCAST) { |
| 1967 | adapter->Stats.DumbRcvBcastPkts++; |
| 1968 | adapter->Stats.DumbRcvBcastBytes += length; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1969 | return (TRUE); |
| 1970 | } |
| 1971 | } else { |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 1972 | /* multicast */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1973 | if (adapter->MacFilter & MAC_ALLMCAST) { |
| 1974 | adapter->Stats.DumbRcvMcastPkts++; |
| 1975 | adapter->Stats.DumbRcvMcastBytes += length; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1976 | return (TRUE); |
| 1977 | } |
| 1978 | if (adapter->MacFilter & MAC_MCAST) { |
Mithlesh Thukral | b040b07 | 2009-01-28 07:08:11 +0530 | [diff] [blame] | 1979 | struct dev_mc_list *mclist = dev->mc_list; |
| 1980 | while (mclist) { |
| 1981 | ETHER_EQ_ADDR(mclist->da_addr, |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1982 | EtherHdr->ether_dhost, |
| 1983 | EqualAddr); |
| 1984 | if (EqualAddr) { |
| 1985 | adapter->Stats. |
| 1986 | DumbRcvMcastPkts++; |
| 1987 | adapter->Stats. |
| 1988 | DumbRcvMcastBytes += length; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1989 | return (TRUE); |
| 1990 | } |
Mithlesh Thukral | b040b07 | 2009-01-28 07:08:11 +0530 | [diff] [blame] | 1991 | mclist = mclist->next; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1992 | } |
| 1993 | } |
| 1994 | } |
| 1995 | } else if (adapter->MacFilter & MAC_DIRECTED) { |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 1996 | /* |
| 1997 | * Not broadcast or multicast. Must be directed at us or |
| 1998 | * the card is in promiscuous mode. Either way, consider it |
| 1999 | * ours if MAC_DIRECTED is set |
| 2000 | */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2001 | adapter->Stats.DumbRcvUcastPkts++; |
| 2002 | adapter->Stats.DumbRcvUcastBytes += length; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2003 | return (TRUE); |
| 2004 | } |
| 2005 | if (adapter->MacFilter & MAC_PROMISC) { |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2006 | /* Whatever it is, keep it. */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2007 | return (TRUE); |
| 2008 | } |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2009 | return (FALSE); |
| 2010 | } |
Mithlesh Thukral | b040b07 | 2009-01-28 07:08:11 +0530 | [diff] [blame] | 2011 | |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 2012 | static int sxg_register_interrupt(struct adapter_t *adapter) |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2013 | { |
| 2014 | if (!adapter->intrregistered) { |
| 2015 | int retval; |
| 2016 | |
| 2017 | DBG_ERROR |
| 2018 | ("sxg: %s AllocAdaptRsrcs adapter[%p] dev->irq[%x] %x\n", |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 2019 | __func__, adapter, adapter->netdev->irq, NR_IRQS); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2020 | |
J.R. Mauro | 5c7514e | 2008-10-05 20:38:52 -0400 | [diff] [blame] | 2021 | spin_unlock_irqrestore(&sxg_global.driver_lock, |
| 2022 | sxg_global.flags); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2023 | |
| 2024 | retval = request_irq(adapter->netdev->irq, |
| 2025 | &sxg_isr, |
| 2026 | IRQF_SHARED, |
| 2027 | adapter->netdev->name, adapter->netdev); |
| 2028 | |
| 2029 | spin_lock_irqsave(&sxg_global.driver_lock, sxg_global.flags); |
| 2030 | |
| 2031 | if (retval) { |
| 2032 | DBG_ERROR("sxg: request_irq (%s) FAILED [%x]\n", |
| 2033 | adapter->netdev->name, retval); |
| 2034 | return (retval); |
| 2035 | } |
| 2036 | adapter->intrregistered = 1; |
| 2037 | adapter->IntRegistered = TRUE; |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2038 | /* Disable RSS with line-based interrupts */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2039 | adapter->RssEnabled = FALSE; |
| 2040 | DBG_ERROR("sxg: %s AllocAdaptRsrcs adapter[%p] dev->irq[%x]\n", |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 2041 | __func__, adapter, adapter->netdev->irq); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2042 | } |
| 2043 | return (STATUS_SUCCESS); |
| 2044 | } |
| 2045 | |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 2046 | static void sxg_deregister_interrupt(struct adapter_t *adapter) |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2047 | { |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 2048 | DBG_ERROR("sxg: %s ENTER adapter[%p]\n", __func__, adapter); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2049 | #if XXXTODO |
| 2050 | slic_init_cleanup(adapter); |
| 2051 | #endif |
| 2052 | memset(&adapter->stats, 0, sizeof(struct net_device_stats)); |
| 2053 | adapter->error_interrupts = 0; |
| 2054 | adapter->rcv_interrupts = 0; |
| 2055 | adapter->xmit_interrupts = 0; |
| 2056 | adapter->linkevent_interrupts = 0; |
| 2057 | adapter->upr_interrupts = 0; |
| 2058 | adapter->num_isrs = 0; |
| 2059 | adapter->xmit_completes = 0; |
| 2060 | adapter->rcv_broadcasts = 0; |
| 2061 | adapter->rcv_multicasts = 0; |
| 2062 | adapter->rcv_unicasts = 0; |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 2063 | DBG_ERROR("sxg: %s EXIT\n", __func__); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2064 | } |
| 2065 | |
| 2066 | /* |
| 2067 | * sxg_if_init |
| 2068 | * |
| 2069 | * Perform initialization of our slic interface. |
| 2070 | * |
| 2071 | */ |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 2072 | static int sxg_if_init(struct adapter_t *adapter) |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2073 | { |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 2074 | struct net_device *dev = adapter->netdev; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2075 | int status = 0; |
| 2076 | |
Mithlesh Thukral | 1323e5f | 2009-01-05 21:13:23 +0530 | [diff] [blame] | 2077 | DBG_ERROR("sxg: %s (%s) ENTER states[%d:%d] flags[%x]\n", |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 2078 | __func__, adapter->netdev->name, |
Mithlesh Thukral | 1323e5f | 2009-01-05 21:13:23 +0530 | [diff] [blame] | 2079 | adapter->state, |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2080 | adapter->linkstate, dev->flags); |
| 2081 | |
| 2082 | /* adapter should be down at this point */ |
| 2083 | if (adapter->state != ADAPT_DOWN) { |
| 2084 | DBG_ERROR("sxg_if_init adapter->state != ADAPT_DOWN\n"); |
| 2085 | return (-EIO); |
| 2086 | } |
| 2087 | ASSERT(adapter->linkstate == LINK_DOWN); |
| 2088 | |
| 2089 | adapter->devflags_prev = dev->flags; |
Mithlesh Thukral | b040b07 | 2009-01-28 07:08:11 +0530 | [diff] [blame] | 2090 | adapter->MacFilter = MAC_DIRECTED; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2091 | if (dev->flags) { |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 2092 | DBG_ERROR("sxg: %s (%s) Set MAC options: ", __func__, |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2093 | adapter->netdev->name); |
| 2094 | if (dev->flags & IFF_BROADCAST) { |
Mithlesh Thukral | b040b07 | 2009-01-28 07:08:11 +0530 | [diff] [blame] | 2095 | adapter->MacFilter |= MAC_BCAST; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2096 | DBG_ERROR("BCAST "); |
| 2097 | } |
| 2098 | if (dev->flags & IFF_PROMISC) { |
Mithlesh Thukral | b040b07 | 2009-01-28 07:08:11 +0530 | [diff] [blame] | 2099 | adapter->MacFilter |= MAC_PROMISC; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2100 | DBG_ERROR("PROMISC "); |
| 2101 | } |
| 2102 | if (dev->flags & IFF_ALLMULTI) { |
Mithlesh Thukral | b040b07 | 2009-01-28 07:08:11 +0530 | [diff] [blame] | 2103 | adapter->MacFilter |= MAC_ALLMCAST; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2104 | DBG_ERROR("ALL_MCAST "); |
| 2105 | } |
| 2106 | if (dev->flags & IFF_MULTICAST) { |
Mithlesh Thukral | b040b07 | 2009-01-28 07:08:11 +0530 | [diff] [blame] | 2107 | adapter->MacFilter |= MAC_MCAST; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2108 | DBG_ERROR("MCAST "); |
| 2109 | } |
| 2110 | DBG_ERROR("\n"); |
| 2111 | } |
Mithlesh Thukral | 1782199f | 2009-02-06 19:32:28 +0530 | [diff] [blame] | 2112 | status = sxg_register_intr(adapter); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2113 | if (status != STATUS_SUCCESS) { |
Mithlesh Thukral | 1782199f | 2009-02-06 19:32:28 +0530 | [diff] [blame] | 2114 | DBG_ERROR("sxg_if_init: sxg_register_intr FAILED %x\n", |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2115 | status); |
| 2116 | sxg_deregister_interrupt(adapter); |
| 2117 | return (status); |
| 2118 | } |
| 2119 | |
| 2120 | adapter->state = ADAPT_UP; |
| 2121 | |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 2122 | /* clear any pending events, then enable interrupts */ |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 2123 | DBG_ERROR("sxg: %s ENABLE interrupts(slic)\n", __func__); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2124 | |
| 2125 | return (STATUS_SUCCESS); |
| 2126 | } |
| 2127 | |
Mithlesh Thukral | b62a294 | 2009-01-30 20:19:03 +0530 | [diff] [blame] | 2128 | void sxg_set_interrupt_aggregation(struct adapter_t *adapter) |
| 2129 | { |
| 2130 | /* |
| 2131 | * Top bit disables aggregation on xmt (SXG_AGG_XMT_DISABLE). |
| 2132 | * Make sure Max is less than 0x8000. |
| 2133 | */ |
| 2134 | adapter->max_aggregation = SXG_MAX_AGG_DEFAULT; |
| 2135 | adapter->min_aggregation = SXG_MIN_AGG_DEFAULT; |
| 2136 | WRITE_REG(adapter->UcodeRegs[0].Aggregation, |
| 2137 | ((adapter->max_aggregation << SXG_MAX_AGG_SHIFT) | |
| 2138 | adapter->min_aggregation), |
| 2139 | TRUE); |
| 2140 | } |
| 2141 | |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 2142 | static int sxg_entry_open(struct net_device *dev) |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2143 | { |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 2144 | struct adapter_t *adapter = (struct adapter_t *) netdev_priv(dev); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2145 | int status; |
Mithlesh Thukral | 0d41472 | 2009-01-19 20:29:59 +0530 | [diff] [blame] | 2146 | static int turn; |
Mithlesh Thukral | 7c66b14 | 2009-02-06 19:30:40 +0530 | [diff] [blame] | 2147 | int sxg_initial_rcv_data_buffers = SXG_INITIAL_RCV_DATA_BUFFERS; |
| 2148 | int i; |
| 2149 | |
| 2150 | if (adapter->JumboEnabled == TRUE) { |
| 2151 | sxg_initial_rcv_data_buffers = |
| 2152 | SXG_INITIAL_JUMBO_RCV_DATA_BUFFERS; |
| 2153 | SXG_INITIALIZE_RING(adapter->RcvRingZeroInfo, |
| 2154 | SXG_JUMBO_RCV_RING_SIZE); |
| 2155 | } |
| 2156 | |
| 2157 | /* |
| 2158 | * Allocate receive data buffers. We allocate a block of buffers and |
| 2159 | * a corresponding descriptor block at once. See sxghw.h:SXG_RCV_BLOCK |
| 2160 | */ |
| 2161 | |
| 2162 | for (i = 0; i < sxg_initial_rcv_data_buffers; |
| 2163 | i += SXG_RCV_DESCRIPTORS_PER_BLOCK) |
| 2164 | { |
| 2165 | status = sxg_allocate_buffer_memory(adapter, |
| 2166 | SXG_RCV_BLOCK_SIZE(SXG_RCV_DATA_HDR_SIZE), |
| 2167 | SXG_BUFFER_TYPE_RCV); |
| 2168 | if (status != STATUS_SUCCESS) |
| 2169 | return status; |
| 2170 | } |
| 2171 | /* |
| 2172 | * NBL resource allocation can fail in the 'AllocateComplete' routine, |
| 2173 | * which doesn't return status. Make sure we got the number of buffers |
| 2174 | * we requested |
| 2175 | */ |
| 2176 | |
| 2177 | if (adapter->FreeRcvBufferCount < sxg_initial_rcv_data_buffers) { |
| 2178 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "XAResF6", |
| 2179 | adapter, adapter->FreeRcvBufferCount, SXG_MAX_ENTRIES, |
| 2180 | 0); |
| 2181 | return (STATUS_RESOURCES); |
| 2182 | } |
| 2183 | /* |
| 2184 | * The microcode expects it to be downloaded on every open. |
| 2185 | */ |
| 2186 | DBG_ERROR("sxg: %s ENTER sxg_download_microcode\n", __FUNCTION__); |
Mithlesh Thukral | a536efc | 2009-02-18 18:54:14 +0530 | [diff] [blame] | 2187 | if (sxg_download_microcode(adapter, SXG_UCODE_SYSTEM)) { |
Mithlesh Thukral | 7c66b14 | 2009-02-06 19:30:40 +0530 | [diff] [blame] | 2188 | DBG_ERROR("sxg: %s ENTER sxg_adapter_set_hwaddr\n", |
| 2189 | __FUNCTION__); |
| 2190 | sxg_read_config(adapter); |
| 2191 | } else { |
| 2192 | adapter->state = ADAPT_FAIL; |
| 2193 | adapter->linkstate = LINK_DOWN; |
| 2194 | DBG_ERROR("sxg_download_microcode FAILED status[%x]\n", |
| 2195 | status); |
| 2196 | } |
| 2197 | msleep(5); |
Mithlesh Thukral | 0d41472 | 2009-01-19 20:29:59 +0530 | [diff] [blame] | 2198 | |
| 2199 | if (turn) { |
| 2200 | sxg_second_open(adapter->netdev); |
| 2201 | |
| 2202 | return STATUS_SUCCESS; |
| 2203 | } |
| 2204 | |
| 2205 | turn++; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2206 | |
| 2207 | ASSERT(adapter); |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 2208 | DBG_ERROR("sxg: %s adapter->activated[%d]\n", __func__, |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2209 | adapter->activated); |
| 2210 | DBG_ERROR |
| 2211 | ("sxg: %s (%s): [jiffies[%lx] cpu %d] dev[%p] adapt[%p] port[%d]\n", |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 2212 | __func__, adapter->netdev->name, jiffies, smp_processor_id(), |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2213 | adapter->netdev, adapter, adapter->port); |
| 2214 | |
| 2215 | netif_stop_queue(adapter->netdev); |
| 2216 | |
| 2217 | spin_lock_irqsave(&sxg_global.driver_lock, sxg_global.flags); |
| 2218 | if (!adapter->activated) { |
| 2219 | sxg_global.num_sxg_ports_active++; |
| 2220 | adapter->activated = 1; |
| 2221 | } |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2222 | /* Initialize the adapter */ |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 2223 | DBG_ERROR("sxg: %s ENTER sxg_initialize_adapter\n", __func__); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2224 | status = sxg_initialize_adapter(adapter); |
| 2225 | DBG_ERROR("sxg: %s EXIT sxg_initialize_adapter status[%x]\n", |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 2226 | __func__, status); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2227 | |
| 2228 | if (status == STATUS_SUCCESS) { |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 2229 | DBG_ERROR("sxg: %s ENTER sxg_if_init\n", __func__); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2230 | status = sxg_if_init(adapter); |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 2231 | DBG_ERROR("sxg: %s EXIT sxg_if_init status[%x]\n", __func__, |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2232 | status); |
| 2233 | } |
| 2234 | |
| 2235 | if (status != STATUS_SUCCESS) { |
| 2236 | if (adapter->activated) { |
| 2237 | sxg_global.num_sxg_ports_active--; |
| 2238 | adapter->activated = 0; |
| 2239 | } |
| 2240 | spin_unlock_irqrestore(&sxg_global.driver_lock, |
| 2241 | sxg_global.flags); |
| 2242 | return (status); |
| 2243 | } |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 2244 | DBG_ERROR("sxg: %s ENABLE ALL INTERRUPTS\n", __func__); |
Mithlesh Thukral | b62a294 | 2009-01-30 20:19:03 +0530 | [diff] [blame] | 2245 | sxg_set_interrupt_aggregation(adapter); |
| 2246 | napi_enable(&adapter->napi); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2247 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2248 | /* Enable interrupts */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2249 | SXG_ENABLE_ALL_INTERRUPTS(adapter); |
| 2250 | |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 2251 | DBG_ERROR("sxg: %s EXIT\n", __func__); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2252 | |
| 2253 | spin_unlock_irqrestore(&sxg_global.driver_lock, sxg_global.flags); |
| 2254 | return STATUS_SUCCESS; |
| 2255 | } |
| 2256 | |
Mithlesh Thukral | 0d41472 | 2009-01-19 20:29:59 +0530 | [diff] [blame] | 2257 | int sxg_second_open(struct net_device * dev) |
| 2258 | { |
| 2259 | struct adapter_t *adapter = (struct adapter_t*) netdev_priv(dev); |
Mithlesh Thukral | b62a294 | 2009-01-30 20:19:03 +0530 | [diff] [blame] | 2260 | int status = 0; |
Mithlesh Thukral | 0d41472 | 2009-01-19 20:29:59 +0530 | [diff] [blame] | 2261 | |
| 2262 | spin_lock_irqsave(&sxg_global.driver_lock, sxg_global.flags); |
| 2263 | netif_start_queue(adapter->netdev); |
| 2264 | adapter->state = ADAPT_UP; |
| 2265 | adapter->linkstate = LINK_UP; |
| 2266 | |
Mithlesh Thukral | b62a294 | 2009-01-30 20:19:03 +0530 | [diff] [blame] | 2267 | status = sxg_initialize_adapter(adapter); |
| 2268 | sxg_set_interrupt_aggregation(adapter); |
| 2269 | napi_enable(&adapter->napi); |
Mithlesh Thukral | 0d41472 | 2009-01-19 20:29:59 +0530 | [diff] [blame] | 2270 | /* Re-enable interrupts */ |
| 2271 | SXG_ENABLE_ALL_INTERRUPTS(adapter); |
| 2272 | |
Mithlesh Thukral | 544ed36 | 2009-03-20 17:35:12 +0530 | [diff] [blame] | 2273 | sxg_register_intr(adapter); |
Mithlesh Thukral | 1782199f | 2009-02-06 19:32:28 +0530 | [diff] [blame] | 2274 | spin_unlock_irqrestore(&sxg_global.driver_lock, sxg_global.flags); |
Mithlesh Thukral | e5ea8da | 2009-03-20 17:37:32 +0530 | [diff] [blame^] | 2275 | mod_timer(&adapter->watchdog_timer, jiffies); |
Mithlesh Thukral | 0d41472 | 2009-01-19 20:29:59 +0530 | [diff] [blame] | 2276 | return (STATUS_SUCCESS); |
| 2277 | |
| 2278 | } |
| 2279 | |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2280 | static void __devexit sxg_entry_remove(struct pci_dev *pcidev) |
| 2281 | { |
Mithlesh Thukral | 0d41472 | 2009-01-19 20:29:59 +0530 | [diff] [blame] | 2282 | u32 mmio_start = 0; |
| 2283 | u32 mmio_len = 0; |
| 2284 | |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 2285 | struct net_device *dev = pci_get_drvdata(pcidev); |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 2286 | struct adapter_t *adapter = (struct adapter_t *) netdev_priv(dev); |
Mithlesh Thukral | 6a2946b | 2009-01-19 20:24:30 +0530 | [diff] [blame] | 2287 | |
| 2288 | flush_scheduled_work(); |
Mithlesh Thukral | d0128aa | 2009-01-05 21:18:04 +0530 | [diff] [blame] | 2289 | |
| 2290 | /* Deallocate Resources */ |
Mithlesh Thukral | d9d578b | 2009-01-19 20:23:22 +0530 | [diff] [blame] | 2291 | unregister_netdev(dev); |
Mithlesh Thukral | 1782199f | 2009-02-06 19:32:28 +0530 | [diff] [blame] | 2292 | sxg_reset_interrupt_capability(adapter); |
Mithlesh Thukral | d9d578b | 2009-01-19 20:23:22 +0530 | [diff] [blame] | 2293 | sxg_free_resources(adapter); |
Mithlesh Thukral | d0128aa | 2009-01-05 21:18:04 +0530 | [diff] [blame] | 2294 | |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2295 | ASSERT(adapter); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2296 | |
Mithlesh Thukral | 0d41472 | 2009-01-19 20:29:59 +0530 | [diff] [blame] | 2297 | mmio_start = pci_resource_start(pcidev, 0); |
| 2298 | mmio_len = pci_resource_len(pcidev, 0); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2299 | |
Mithlesh Thukral | 0d41472 | 2009-01-19 20:29:59 +0530 | [diff] [blame] | 2300 | DBG_ERROR("sxg: %s rel_region(0) start[%x] len[%x]\n", __FUNCTION__, |
| 2301 | mmio_start, mmio_len); |
| 2302 | release_mem_region(mmio_start, mmio_len); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2303 | |
Mithlesh Thukral | d0128aa | 2009-01-05 21:18:04 +0530 | [diff] [blame] | 2304 | mmio_start = pci_resource_start(pcidev, 2); |
| 2305 | mmio_len = pci_resource_len(pcidev, 2); |
| 2306 | |
| 2307 | DBG_ERROR("sxg: %s rel_region(2) start[%x] len[%x]\n", __FUNCTION__, |
| 2308 | mmio_start, mmio_len); |
| 2309 | release_mem_region(mmio_start, mmio_len); |
| 2310 | |
Mithlesh Thukral | d0128aa | 2009-01-05 21:18:04 +0530 | [diff] [blame] | 2311 | pci_disable_device(pcidev); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2312 | |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 2313 | DBG_ERROR("sxg: %s deallocate device\n", __func__); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2314 | kfree(dev); |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 2315 | DBG_ERROR("sxg: %s EXIT\n", __func__); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2316 | } |
| 2317 | |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 2318 | static int sxg_entry_halt(struct net_device *dev) |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2319 | { |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 2320 | struct adapter_t *adapter = (struct adapter_t *) netdev_priv(dev); |
Mithlesh Thukral | 7c66b14 | 2009-02-06 19:30:40 +0530 | [diff] [blame] | 2321 | struct sxg_hw_regs *HwRegs = adapter->HwRegs; |
| 2322 | int i; |
| 2323 | u32 RssIds, IsrCount; |
| 2324 | unsigned long flags; |
| 2325 | |
| 2326 | RssIds = SXG_RSS_CPU_COUNT(adapter); |
Mithlesh Thukral | 1782199f | 2009-02-06 19:32:28 +0530 | [diff] [blame] | 2327 | IsrCount = adapter->msi_enabled ? RssIds : 1; |
Mithlesh Thukral | e5ea8da | 2009-03-20 17:37:32 +0530 | [diff] [blame^] | 2328 | /* Disable interrupts */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2329 | spin_lock_irqsave(&sxg_global.driver_lock, sxg_global.flags); |
Mithlesh Thukral | e5ea8da | 2009-03-20 17:37:32 +0530 | [diff] [blame^] | 2330 | SXG_DISABLE_ALL_INTERRUPTS(adapter); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2331 | adapter->state = ADAPT_DOWN; |
| 2332 | adapter->linkstate = LINK_DOWN; |
Mithlesh Thukral | e5ea8da | 2009-03-20 17:37:32 +0530 | [diff] [blame^] | 2333 | |
| 2334 | spin_unlock_irqrestore(&sxg_global.driver_lock, sxg_global.flags); |
| 2335 | sxg_deregister_interrupt(adapter); |
| 2336 | WRITE_REG(HwRegs->Reset, 0xDEAD, FLUSH); |
| 2337 | mdelay(5000); |
| 2338 | |
| 2339 | del_timer_sync(&adapter->watchdog_timer); |
| 2340 | netif_stop_queue(dev); |
| 2341 | netif_carrier_off(dev); |
| 2342 | |
| 2343 | napi_disable(&adapter->napi); |
| 2344 | |
| 2345 | WRITE_REG(adapter->UcodeRegs[0].RcvCmd, 0, true); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2346 | adapter->devflags_prev = 0; |
| 2347 | DBG_ERROR("sxg: %s (%s) set adapter[%p] state to ADAPT_DOWN(%d)\n", |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 2348 | __func__, dev->name, adapter, adapter->state); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2349 | |
Mithlesh Thukral | 7c66b14 | 2009-02-06 19:30:40 +0530 | [diff] [blame] | 2350 | spin_lock(&adapter->RcvQLock); |
| 2351 | /* Free all the blocks and the buffers, moved from remove() routine */ |
| 2352 | if (!(IsListEmpty(&adapter->AllRcvBlocks))) { |
| 2353 | sxg_free_rcvblocks(adapter); |
| 2354 | } |
| 2355 | |
| 2356 | |
| 2357 | InitializeListHead(&adapter->FreeRcvBuffers); |
| 2358 | InitializeListHead(&adapter->FreeRcvBlocks); |
| 2359 | InitializeListHead(&adapter->AllRcvBlocks); |
| 2360 | InitializeListHead(&adapter->FreeSglBuffers); |
| 2361 | InitializeListHead(&adapter->AllSglBuffers); |
| 2362 | |
| 2363 | adapter->FreeRcvBufferCount = 0; |
| 2364 | adapter->FreeRcvBlockCount = 0; |
| 2365 | adapter->AllRcvBlockCount = 0; |
| 2366 | adapter->RcvBuffersOnCard = 0; |
| 2367 | adapter->PendingRcvCount = 0; |
| 2368 | |
| 2369 | memset(adapter->RcvRings, 0, sizeof(struct sxg_rcv_ring) * 1); |
| 2370 | memset(adapter->EventRings, 0, sizeof(struct sxg_event_ring) * RssIds); |
| 2371 | memset(adapter->Isr, 0, sizeof(u32) * IsrCount); |
| 2372 | for (i = 0; i < SXG_MAX_RING_SIZE; i++) |
| 2373 | adapter->RcvRingZeroInfo.Context[i] = NULL; |
| 2374 | SXG_INITIALIZE_RING(adapter->RcvRingZeroInfo, SXG_RCV_RING_SIZE); |
| 2375 | SXG_INITIALIZE_RING(adapter->XmtRingZeroInfo, SXG_XMT_RING_SIZE); |
| 2376 | |
| 2377 | spin_unlock(&adapter->RcvQLock); |
| 2378 | |
| 2379 | spin_lock_irqsave(&adapter->XmtZeroLock, flags); |
| 2380 | adapter->AllSglBufferCount = 0; |
| 2381 | adapter->FreeSglBufferCount = 0; |
| 2382 | adapter->PendingXmtCount = 0; |
| 2383 | memset(adapter->XmtRings, 0, sizeof(struct sxg_xmt_ring) * 1); |
| 2384 | memset(adapter->XmtRingZeroIndex, 0, sizeof(u32)); |
| 2385 | spin_unlock_irqrestore(&adapter->XmtZeroLock, flags); |
| 2386 | |
Mithlesh Thukral | 7c66b14 | 2009-02-06 19:30:40 +0530 | [diff] [blame] | 2387 | for (i = 0; i < SXG_MAX_RSS; i++) { |
| 2388 | adapter->NextEvent[i] = 0; |
| 2389 | } |
| 2390 | atomic_set(&adapter->pending_allocations, 0); |
Mithlesh Thukral | 1782199f | 2009-02-06 19:32:28 +0530 | [diff] [blame] | 2391 | adapter->intrregistered = 0; |
| 2392 | sxg_remove_isr(adapter); |
| 2393 | DBG_ERROR("sxg: %s (%s) EXIT\n", __FUNCTION__, dev->name); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2394 | return (STATUS_SUCCESS); |
| 2395 | } |
| 2396 | |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 2397 | static int sxg_ioctl(struct net_device *dev, struct ifreq *rq, int cmd) |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2398 | { |
| 2399 | ASSERT(rq); |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 2400 | /* DBG_ERROR("sxg: %s cmd[%x] rq[%p] dev[%p]\n", __func__, cmd, rq, dev);*/ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2401 | switch (cmd) { |
| 2402 | case SIOCSLICSETINTAGG: |
| 2403 | { |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 2404 | /* struct adapter_t *adapter = (struct adapter_t *) |
| 2405 | * netdev_priv(dev); |
| 2406 | */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2407 | u32 data[7]; |
| 2408 | u32 intagg; |
| 2409 | |
| 2410 | if (copy_from_user(data, rq->ifr_data, 28)) { |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 2411 | DBG_ERROR("copy_from_user FAILED getting \ |
| 2412 | initial params\n"); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2413 | return -EFAULT; |
| 2414 | } |
| 2415 | intagg = data[0]; |
| 2416 | printk(KERN_EMERG |
| 2417 | "%s: set interrupt aggregation to %d\n", |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 2418 | __func__, intagg); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2419 | return 0; |
| 2420 | } |
| 2421 | |
| 2422 | default: |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 2423 | /* DBG_ERROR("sxg: %s UNSUPPORTED[%x]\n", __func__, cmd); */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2424 | return -EOPNOTSUPP; |
| 2425 | } |
| 2426 | return 0; |
| 2427 | } |
| 2428 | |
| 2429 | #define NORMAL_ETHFRAME 0 |
| 2430 | |
| 2431 | /* |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2432 | * sxg_send_packets - Send a skb packet |
| 2433 | * |
| 2434 | * Arguments: |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 2435 | * skb - The packet to send |
| 2436 | * dev - Our linux net device that refs our adapter |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2437 | * |
| 2438 | * Return: |
| 2439 | * 0 regardless of outcome XXXTODO refer to e1000 driver |
| 2440 | */ |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 2441 | static int sxg_send_packets(struct sk_buff *skb, struct net_device *dev) |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2442 | { |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 2443 | struct adapter_t *adapter = (struct adapter_t *) netdev_priv(dev); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2444 | u32 status = STATUS_SUCCESS; |
| 2445 | |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 2446 | /* |
| 2447 | * DBG_ERROR("sxg: %s ENTER sxg_send_packets skb[%p]\n", __FUNCTION__, |
| 2448 | * skb); |
| 2449 | */ |
Mithlesh Thukral | 1323e5f | 2009-01-05 21:13:23 +0530 | [diff] [blame] | 2450 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2451 | /* Check the adapter state */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2452 | switch (adapter->State) { |
| 2453 | case SXG_STATE_INITIALIZING: |
| 2454 | case SXG_STATE_HALTED: |
| 2455 | case SXG_STATE_SHUTDOWN: |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2456 | ASSERT(0); /* unexpected */ |
| 2457 | /* fall through */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2458 | case SXG_STATE_RESETTING: |
| 2459 | case SXG_STATE_SLEEP: |
| 2460 | case SXG_STATE_BOOTDIAG: |
| 2461 | case SXG_STATE_DIAG: |
| 2462 | case SXG_STATE_HALTING: |
| 2463 | status = STATUS_FAILURE; |
| 2464 | break; |
| 2465 | case SXG_STATE_RUNNING: |
| 2466 | if (adapter->LinkState != SXG_LINK_UP) { |
| 2467 | status = STATUS_FAILURE; |
| 2468 | } |
| 2469 | break; |
| 2470 | default: |
| 2471 | ASSERT(0); |
| 2472 | status = STATUS_FAILURE; |
| 2473 | } |
| 2474 | if (status != STATUS_SUCCESS) { |
| 2475 | goto xmit_fail; |
| 2476 | } |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2477 | /* send a packet */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2478 | status = sxg_transmit_packet(adapter, skb); |
| 2479 | if (status == STATUS_SUCCESS) { |
| 2480 | goto xmit_done; |
| 2481 | } |
| 2482 | |
| 2483 | xmit_fail: |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2484 | /* reject & complete all the packets if they cant be sent */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2485 | if (status != STATUS_SUCCESS) { |
| 2486 | #if XXXTODO |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 2487 | /* sxg_send_packets_fail(adapter, skb, status); */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2488 | #else |
| 2489 | SXG_DROP_DUMB_SEND(adapter, skb); |
| 2490 | adapter->stats.tx_dropped++; |
Mithlesh Thukral | d9d578b | 2009-01-19 20:23:22 +0530 | [diff] [blame] | 2491 | return NETDEV_TX_BUSY; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2492 | #endif |
| 2493 | } |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 2494 | DBG_ERROR("sxg: %s EXIT sxg_send_packets status[%x]\n", __func__, |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2495 | status); |
| 2496 | |
| 2497 | xmit_done: |
Mithlesh Thukral | d9d578b | 2009-01-19 20:23:22 +0530 | [diff] [blame] | 2498 | return NETDEV_TX_OK; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2499 | } |
| 2500 | |
| 2501 | /* |
| 2502 | * sxg_transmit_packet |
| 2503 | * |
| 2504 | * This function transmits a single packet. |
| 2505 | * |
| 2506 | * Arguments - |
| 2507 | * adapter - Pointer to our adapter structure |
| 2508 | * skb - The packet to be sent |
| 2509 | * |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 2510 | * Return - STATUS of send |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2511 | */ |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 2512 | static int sxg_transmit_packet(struct adapter_t *adapter, struct sk_buff *skb) |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2513 | { |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 2514 | struct sxg_x64_sgl *pSgl; |
| 2515 | struct sxg_scatter_gather *SxgSgl; |
Mithlesh Thukral | d9d578b | 2009-01-19 20:23:22 +0530 | [diff] [blame] | 2516 | unsigned long sgl_flags; |
Mithlesh Thukral | d0128aa | 2009-01-05 21:18:04 +0530 | [diff] [blame] | 2517 | /* void *SglBuffer; */ |
| 2518 | /* u32 SglBufferLength; */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2519 | |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 2520 | /* |
| 2521 | * The vast majority of work is done in the shared |
| 2522 | * sxg_dumb_sgl routine. |
| 2523 | */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2524 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "DumbSend", |
| 2525 | adapter, skb, 0, 0); |
| 2526 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2527 | /* Allocate a SGL buffer */ |
Mithlesh Thukral | d9d578b | 2009-01-19 20:23:22 +0530 | [diff] [blame] | 2528 | SXG_GET_SGL_BUFFER(adapter, SxgSgl, 0); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2529 | if (!SxgSgl) { |
| 2530 | adapter->Stats.NoSglBuf++; |
Mithlesh Thukral | 54aed11 | 2009-01-19 20:27:17 +0530 | [diff] [blame] | 2531 | adapter->stats.tx_errors++; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2532 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "SndPktF1", |
| 2533 | adapter, skb, 0, 0); |
| 2534 | return (STATUS_RESOURCES); |
| 2535 | } |
| 2536 | ASSERT(SxgSgl->adapter == adapter); |
Mithlesh Thukral | d0128aa | 2009-01-05 21:18:04 +0530 | [diff] [blame] | 2537 | /*SglBuffer = SXG_SGL_BUFFER(SxgSgl); |
| 2538 | SglBufferLength = SXG_SGL_BUF_SIZE; */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2539 | SxgSgl->VlanTag.VlanTci = 0; |
| 2540 | SxgSgl->VlanTag.VlanTpid = 0; |
| 2541 | SxgSgl->Type = SXG_SGL_DUMB; |
| 2542 | SxgSgl->DumbPacket = skb; |
| 2543 | pSgl = NULL; |
| 2544 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2545 | /* Call the common sxg_dumb_sgl routine to complete the send. */ |
Mithlesh Thukral | d9d578b | 2009-01-19 20:23:22 +0530 | [diff] [blame] | 2546 | return (sxg_dumb_sgl(pSgl, SxgSgl)); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2547 | } |
| 2548 | |
| 2549 | /* |
| 2550 | * sxg_dumb_sgl |
| 2551 | * |
| 2552 | * Arguments: |
| 2553 | * pSgl - |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 2554 | * SxgSgl - struct sxg_scatter_gather |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2555 | * |
| 2556 | * Return Value: |
Mithlesh Thukral | d9d578b | 2009-01-19 20:23:22 +0530 | [diff] [blame] | 2557 | * Status of send operation. |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2558 | */ |
Mithlesh Thukral | d9d578b | 2009-01-19 20:23:22 +0530 | [diff] [blame] | 2559 | static int sxg_dumb_sgl(struct sxg_x64_sgl *pSgl, |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 2560 | struct sxg_scatter_gather *SxgSgl) |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2561 | { |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 2562 | struct adapter_t *adapter = SxgSgl->adapter; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2563 | struct sk_buff *skb = SxgSgl->DumbPacket; |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2564 | /* For now, all dumb-nic sends go on RSS queue zero */ |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 2565 | struct sxg_xmt_ring *XmtRing = &adapter->XmtRings[0]; |
| 2566 | struct sxg_ring_info *XmtRingInfo = &adapter->XmtRingZeroInfo; |
| 2567 | struct sxg_cmd *XmtCmd = NULL; |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 2568 | /* u32 Index = 0; */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2569 | u32 DataLength = skb->len; |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 2570 | /* unsigned int BufLen; */ |
| 2571 | /* u32 SglOffset; */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2572 | u64 phys_addr; |
Mithlesh Thukral | d9d578b | 2009-01-19 20:23:22 +0530 | [diff] [blame] | 2573 | unsigned long flags; |
Mithlesh Thukral | 0d41472 | 2009-01-19 20:29:59 +0530 | [diff] [blame] | 2574 | unsigned long queue_id=0; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2575 | |
| 2576 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "DumbSgl", |
| 2577 | pSgl, SxgSgl, 0, 0); |
| 2578 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2579 | /* Set aside a pointer to the sgl */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2580 | SxgSgl->pSgl = pSgl; |
| 2581 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2582 | /* Sanity check that our SGL format is as we expect. */ |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 2583 | ASSERT(sizeof(struct sxg_x64_sge) == sizeof(struct sxg_x64_sge)); |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2584 | /* Shouldn't be a vlan tag on this frame */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2585 | ASSERT(SxgSgl->VlanTag.VlanTci == 0); |
| 2586 | ASSERT(SxgSgl->VlanTag.VlanTpid == 0); |
| 2587 | |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 2588 | /* |
| 2589 | * From here below we work with the SGL placed in our |
| 2590 | * buffer. |
| 2591 | */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2592 | |
| 2593 | SxgSgl->Sgl.NumberOfElements = 1; |
Mithlesh Thukral | 0d41472 | 2009-01-19 20:29:59 +0530 | [diff] [blame] | 2594 | /* |
| 2595 | * Set ucode Queue ID based on bottom bits of destination TCP port. |
| 2596 | * This Queue ID splits slowpath/dumb-nic packet processing across |
| 2597 | * multiple threads on the card to improve performance. It is split |
| 2598 | * using the TCP port to avoid out-of-order packets that can result |
| 2599 | * from multithreaded processing. We use the destination port because |
| 2600 | * we expect to be run on a server, so in nearly all cases the local |
| 2601 | * port is likely to be constant (well-known server port) and the |
| 2602 | * remote port is likely to be random. The exception to this is iSCSI, |
| 2603 | * in which case we use the sport instead. Note |
| 2604 | * that original attempt at XOR'ing source and dest port resulted in |
| 2605 | * poor balance on NTTTCP/iometer applications since they tend to |
| 2606 | * line up (even-even, odd-odd..). |
| 2607 | */ |
| 2608 | |
| 2609 | if (skb->protocol == htons(ETH_P_IP)) { |
| 2610 | struct iphdr *ip; |
| 2611 | |
| 2612 | ip = ip_hdr(skb); |
| 2613 | if ((ip->protocol == IPPROTO_TCP)&&(DataLength >= sizeof( |
| 2614 | struct tcphdr))){ |
| 2615 | queue_id = ((ntohs(tcp_hdr(skb)->dest) == ISCSI_PORT) ? |
| 2616 | (ntohs (tcp_hdr(skb)->source) & |
| 2617 | SXG_LARGE_SEND_QUEUE_MASK): |
| 2618 | (ntohs(tcp_hdr(skb)->dest) & |
| 2619 | SXG_LARGE_SEND_QUEUE_MASK)); |
| 2620 | } |
| 2621 | } else if (skb->protocol == htons(ETH_P_IPV6)) { |
Mithlesh Thukral | 9914f05 | 2009-02-18 18:51:29 +0530 | [diff] [blame] | 2622 | if ((ipv6_hdr(skb)->nexthdr == IPPROTO_TCP) && (DataLength >= |
Mithlesh Thukral | 0d41472 | 2009-01-19 20:29:59 +0530 | [diff] [blame] | 2623 | sizeof(struct tcphdr)) ) { |
| 2624 | queue_id = ((ntohs(tcp_hdr(skb)->dest) == ISCSI_PORT) ? |
| 2625 | (ntohs (tcp_hdr(skb)->source) & |
| 2626 | SXG_LARGE_SEND_QUEUE_MASK): |
| 2627 | (ntohs(tcp_hdr(skb)->dest) & |
| 2628 | SXG_LARGE_SEND_QUEUE_MASK)); |
| 2629 | } |
| 2630 | } |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2631 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2632 | /* Grab the spinlock and acquire a command */ |
Mithlesh Thukral | d9d578b | 2009-01-19 20:23:22 +0530 | [diff] [blame] | 2633 | spin_lock_irqsave(&adapter->XmtZeroLock, flags); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2634 | SXG_GET_CMD(XmtRing, XmtRingInfo, XmtCmd, SxgSgl); |
| 2635 | if (XmtCmd == NULL) { |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 2636 | /* |
| 2637 | * Call sxg_complete_slow_send to see if we can |
| 2638 | * free up any XmtRingZero entries and then try again |
| 2639 | */ |
Mithlesh Thukral | d9d578b | 2009-01-19 20:23:22 +0530 | [diff] [blame] | 2640 | |
| 2641 | spin_unlock_irqrestore(&adapter->XmtZeroLock, flags); |
Mithlesh Thukral | c5e5cf5 | 2009-02-06 19:31:40 +0530 | [diff] [blame] | 2642 | sxg_complete_slow_send(adapter); |
Mithlesh Thukral | d9d578b | 2009-01-19 20:23:22 +0530 | [diff] [blame] | 2643 | spin_lock_irqsave(&adapter->XmtZeroLock, flags); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2644 | SXG_GET_CMD(XmtRing, XmtRingInfo, XmtCmd, SxgSgl); |
| 2645 | if (XmtCmd == NULL) { |
| 2646 | adapter->Stats.XmtZeroFull++; |
| 2647 | goto abortcmd; |
| 2648 | } |
| 2649 | } |
| 2650 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "DumbCmd", |
| 2651 | XmtCmd, XmtRingInfo->Head, XmtRingInfo->Tail, 0); |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2652 | /* Update stats */ |
Mithlesh Thukral | 6a2946b | 2009-01-19 20:24:30 +0530 | [diff] [blame] | 2653 | adapter->stats.tx_packets++; |
Mithlesh Thukral | 6a2946b | 2009-01-19 20:24:30 +0530 | [diff] [blame] | 2654 | adapter->stats.tx_bytes += DataLength; |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2655 | #if XXXTODO /* Stats stuff */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2656 | if (SXG_MULTICAST_PACKET(EtherHdr)) { |
| 2657 | if (SXG_BROADCAST_PACKET(EtherHdr)) { |
| 2658 | adapter->Stats.DumbXmtBcastPkts++; |
| 2659 | adapter->Stats.DumbXmtBcastBytes += DataLength; |
| 2660 | } else { |
| 2661 | adapter->Stats.DumbXmtMcastPkts++; |
| 2662 | adapter->Stats.DumbXmtMcastBytes += DataLength; |
| 2663 | } |
| 2664 | } else { |
| 2665 | adapter->Stats.DumbXmtUcastPkts++; |
| 2666 | adapter->Stats.DumbXmtUcastBytes += DataLength; |
| 2667 | } |
| 2668 | #endif |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 2669 | /* |
| 2670 | * Fill in the command |
| 2671 | * Copy out the first SGE to the command and adjust for offset |
| 2672 | */ |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 2673 | phys_addr = pci_map_single(adapter->pcidev, skb->data, skb->len, |
J.R. Mauro | 5c7514e | 2008-10-05 20:38:52 -0400 | [diff] [blame] | 2674 | PCI_DMA_TODEVICE); |
Mithlesh Thukral | 7c66b14 | 2009-02-06 19:30:40 +0530 | [diff] [blame] | 2675 | |
| 2676 | /* |
| 2677 | * SAHARA SGL WORKAROUND |
| 2678 | * See if the SGL straddles a 64k boundary. If so, skip to |
| 2679 | * the start of the next 64k boundary and continue |
| 2680 | */ |
| 2681 | |
Mithlesh Thukral | a536efc | 2009-02-18 18:54:14 +0530 | [diff] [blame] | 2682 | if ((adapter->asictype == SAHARA_REV_A) && |
| 2683 | (SXG_INVALID_SGL(phys_addr,skb->data_len))) |
Mithlesh Thukral | 7c66b14 | 2009-02-06 19:30:40 +0530 | [diff] [blame] | 2684 | { |
| 2685 | spin_unlock_irqrestore(&adapter->XmtZeroLock, flags); |
| 2686 | /* Silently drop this packet */ |
| 2687 | printk(KERN_EMERG"Dropped a packet for 64k boundary problem\n"); |
| 2688 | return STATUS_SUCCESS; |
| 2689 | } |
Mithlesh Thukral | 1323e5f | 2009-01-05 21:13:23 +0530 | [diff] [blame] | 2690 | memset(XmtCmd, '\0', sizeof(*XmtCmd)); |
| 2691 | XmtCmd->Buffer.FirstSgeAddress = phys_addr; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2692 | XmtCmd->Buffer.FirstSgeLength = DataLength; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2693 | XmtCmd->Buffer.SgeOffset = 0; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2694 | XmtCmd->Buffer.TotalLength = DataLength; |
Mithlesh Thukral | 1323e5f | 2009-01-05 21:13:23 +0530 | [diff] [blame] | 2695 | XmtCmd->SgEntries = 1; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2696 | XmtCmd->Flags = 0; |
Mithlesh Thukral | 9914f05 | 2009-02-18 18:51:29 +0530 | [diff] [blame] | 2697 | |
| 2698 | if (skb->ip_summed == CHECKSUM_PARTIAL) { |
| 2699 | /* |
| 2700 | * We need to set the Checkum in IP header to 0. This is |
| 2701 | * required by hardware. |
| 2702 | */ |
| 2703 | ip_hdr(skb)->check = 0x0; |
| 2704 | XmtCmd->CsumFlags.Flags |= SXG_SLOWCMD_CSUM_IP; |
| 2705 | XmtCmd->CsumFlags.Flags |= SXG_SLOWCMD_CSUM_TCP; |
| 2706 | /* Dont know if length will require a change in case of VLAN */ |
| 2707 | XmtCmd->CsumFlags.MacLen = ETH_HLEN; |
| 2708 | XmtCmd->CsumFlags.IpHl = skb_network_header_len(skb) >> |
| 2709 | SXG_NW_HDR_LEN_SHIFT; |
| 2710 | } |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 2711 | /* |
| 2712 | * Advance transmit cmd descripter by 1. |
| 2713 | * NOTE - See comments in SxgTcpOutput where we write |
| 2714 | * to the XmtCmd register regarding CPU ID values and/or |
| 2715 | * multiple commands. |
Mithlesh Thukral | 0d41472 | 2009-01-19 20:29:59 +0530 | [diff] [blame] | 2716 | * Top 16 bits specify queue_id. See comments about queue_id above |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 2717 | */ |
Mithlesh Thukral | 0d41472 | 2009-01-19 20:29:59 +0530 | [diff] [blame] | 2718 | /* Four queues at the moment */ |
| 2719 | ASSERT((queue_id & ~SXG_LARGE_SEND_QUEUE_MASK) == 0); |
| 2720 | WRITE_REG(adapter->UcodeRegs[0].XmtCmd, ((queue_id << 16) | 1), TRUE); |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2721 | adapter->Stats.XmtQLen++; /* Stats within lock */ |
Mithlesh Thukral | d9d578b | 2009-01-19 20:23:22 +0530 | [diff] [blame] | 2722 | spin_unlock_irqrestore(&adapter->XmtZeroLock, flags); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2723 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "XDumSgl2", |
| 2724 | XmtCmd, pSgl, SxgSgl, 0); |
Mithlesh Thukral | d9d578b | 2009-01-19 20:23:22 +0530 | [diff] [blame] | 2725 | return STATUS_SUCCESS; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2726 | |
| 2727 | abortcmd: |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 2728 | /* |
| 2729 | * NOTE - Only jump to this label AFTER grabbing the |
| 2730 | * XmtZeroLock, and DO NOT DROP IT between the |
| 2731 | * command allocation and the following abort. |
| 2732 | */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2733 | if (XmtCmd) { |
| 2734 | SXG_ABORT_CMD(XmtRingInfo); |
| 2735 | } |
Mithlesh Thukral | d9d578b | 2009-01-19 20:23:22 +0530 | [diff] [blame] | 2736 | spin_unlock_irqrestore(&adapter->XmtZeroLock, flags); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2737 | |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 2738 | /* |
| 2739 | * failsgl: |
| 2740 | * Jump to this label if failure occurs before the |
| 2741 | * XmtZeroLock is grabbed |
| 2742 | */ |
Mithlesh Thukral | 6a2946b | 2009-01-19 20:24:30 +0530 | [diff] [blame] | 2743 | adapter->stats.tx_errors++; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2744 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_IMPORTANT, "DumSGFal", |
| 2745 | pSgl, SxgSgl, XmtRingInfo->Head, XmtRingInfo->Tail); |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 2746 | /* SxgSgl->DumbPacket is the skb */ |
Mithlesh Thukral | d9d578b | 2009-01-19 20:23:22 +0530 | [diff] [blame] | 2747 | // SXG_COMPLETE_DUMB_SEND(adapter, SxgSgl->DumbPacket); |
Mithlesh Thukral | 54aed11 | 2009-01-19 20:27:17 +0530 | [diff] [blame] | 2748 | |
| 2749 | return STATUS_FAILURE; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2750 | } |
| 2751 | |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2752 | /* |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 2753 | * Link management functions |
| 2754 | * |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2755 | * sxg_initialize_link - Initialize the link stuff |
| 2756 | * |
| 2757 | * Arguments - |
| 2758 | * adapter - A pointer to our adapter structure |
| 2759 | * |
| 2760 | * Return |
| 2761 | * status |
| 2762 | */ |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 2763 | static int sxg_initialize_link(struct adapter_t *adapter) |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2764 | { |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 2765 | struct sxg_hw_regs *HwRegs = adapter->HwRegs; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2766 | u32 Value; |
| 2767 | u32 ConfigData; |
| 2768 | u32 MaxFrame; |
Mithlesh Thukral | a536efc | 2009-02-18 18:54:14 +0530 | [diff] [blame] | 2769 | u32 AxgMacReg1; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2770 | int status; |
| 2771 | |
| 2772 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "InitLink", |
| 2773 | adapter, 0, 0, 0); |
| 2774 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2775 | /* Reset PHY and XGXS module */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2776 | WRITE_REG(HwRegs->LinkStatus, LS_SERDES_POWER_DOWN, TRUE); |
| 2777 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2778 | /* Reset transmit configuration register */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2779 | WRITE_REG(HwRegs->XmtConfig, XMT_CONFIG_RESET, TRUE); |
| 2780 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2781 | /* Reset receive configuration register */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2782 | WRITE_REG(HwRegs->RcvConfig, RCV_CONFIG_RESET, TRUE); |
| 2783 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2784 | /* Reset all MAC modules */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2785 | WRITE_REG(HwRegs->MacConfig0, AXGMAC_CFG0_SUB_RESET, TRUE); |
| 2786 | |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 2787 | /* |
| 2788 | * Link address 0 |
| 2789 | * XXXTODO - This assumes the MAC address (0a:0b:0c:0d:0e:0f) |
| 2790 | * is stored with the first nibble (0a) in the byte 0 |
| 2791 | * of the Mac address. Possibly reverse? |
| 2792 | */ |
Mithlesh Thukral | 1323e5f | 2009-01-05 21:13:23 +0530 | [diff] [blame] | 2793 | Value = *(u32 *) adapter->macaddr; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2794 | WRITE_REG(HwRegs->LinkAddress0Low, Value, TRUE); |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2795 | /* also write the MAC address to the MAC. Endian is reversed. */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2796 | WRITE_REG(HwRegs->MacAddressLow, ntohl(Value), TRUE); |
Mithlesh Thukral | 1323e5f | 2009-01-05 21:13:23 +0530 | [diff] [blame] | 2797 | Value = (*(u16 *) & adapter->macaddr[4] & 0x0000FFFF); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2798 | WRITE_REG(HwRegs->LinkAddress0High, Value | LINK_ADDRESS_ENABLE, TRUE); |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2799 | /* endian swap for the MAC (put high bytes in bits [31:16], swapped) */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2800 | Value = ntohl(Value); |
| 2801 | WRITE_REG(HwRegs->MacAddressHigh, Value, TRUE); |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2802 | /* Link address 1 */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2803 | WRITE_REG(HwRegs->LinkAddress1Low, 0, TRUE); |
| 2804 | WRITE_REG(HwRegs->LinkAddress1High, 0, TRUE); |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2805 | /* Link address 2 */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2806 | WRITE_REG(HwRegs->LinkAddress2Low, 0, TRUE); |
| 2807 | WRITE_REG(HwRegs->LinkAddress2High, 0, TRUE); |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2808 | /* Link address 3 */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2809 | WRITE_REG(HwRegs->LinkAddress3Low, 0, TRUE); |
| 2810 | WRITE_REG(HwRegs->LinkAddress3High, 0, TRUE); |
| 2811 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2812 | /* Enable MAC modules */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2813 | WRITE_REG(HwRegs->MacConfig0, 0, TRUE); |
| 2814 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2815 | /* Configure MAC */ |
Mithlesh Thukral | a536efc | 2009-02-18 18:54:14 +0530 | [diff] [blame] | 2816 | AxgMacReg1 = ( /* Enable XMT */ |
| 2817 | AXGMAC_CFG1_XMT_EN | |
| 2818 | /* Enable receive */ |
| 2819 | AXGMAC_CFG1_RCV_EN | |
| 2820 | /* short frame detection */ |
| 2821 | AXGMAC_CFG1_SHORT_ASSERT | |
| 2822 | /* Verify frame length */ |
| 2823 | AXGMAC_CFG1_CHECK_LEN | |
| 2824 | /* Generate FCS */ |
| 2825 | AXGMAC_CFG1_GEN_FCS | |
| 2826 | /* Pad frames to 64 bytes */ |
| 2827 | AXGMAC_CFG1_PAD_64); |
| 2828 | |
| 2829 | if (adapter->XmtFcEnabled) { |
| 2830 | AxgMacReg1 |= AXGMAC_CFG1_XMT_PAUSE; /* Allow sending of pause */ |
| 2831 | } |
| 2832 | if (adapter->RcvFcEnabled) { |
| 2833 | AxgMacReg1 |= AXGMAC_CFG1_RCV_PAUSE; /* Enable detection of pause */ |
| 2834 | } |
| 2835 | |
| 2836 | WRITE_REG(HwRegs->MacConfig1, AxgMacReg1, TRUE); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2837 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2838 | /* Set AXGMAC max frame length if jumbo. Not needed for standard MTU */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2839 | if (adapter->JumboEnabled) { |
| 2840 | WRITE_REG(HwRegs->MacMaxFrameLen, AXGMAC_MAXFRAME_JUMBO, TRUE); |
| 2841 | } |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 2842 | /* |
| 2843 | * AMIIM Configuration Register - |
| 2844 | * The value placed in the AXGMAC_AMIIM_CFG_HALF_CLOCK portion |
| 2845 | * (bottom bits) of this register is used to determine the MDC frequency |
| 2846 | * as specified in the A-XGMAC Design Document. This value must not be |
| 2847 | * zero. The following value (62 or 0x3E) is based on our MAC transmit |
| 2848 | * clock frequency (MTCLK) of 312.5 MHz. Given a maximum MDIO clock |
| 2849 | * frequency of 2.5 MHz (see the PHY spec), we get: |
| 2850 | * 312.5/(2*(X+1)) < 2.5 ==> X = 62. |
| 2851 | * This value happens to be the default value for this register, so we |
| 2852 | * really don't have to do this. |
| 2853 | */ |
Mithlesh Thukral | a536efc | 2009-02-18 18:54:14 +0530 | [diff] [blame] | 2854 | if (adapter->asictype == SAHARA_REV_B) { |
| 2855 | WRITE_REG(HwRegs->MacAmiimConfig, 0x0000001F, TRUE); |
| 2856 | } else { |
| 2857 | WRITE_REG(HwRegs->MacAmiimConfig, 0x0000003E, TRUE); |
| 2858 | } |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2859 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2860 | /* Power up and enable PHY and XAUI/XGXS/Serdes logic */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2861 | WRITE_REG(HwRegs->LinkStatus, |
Mithlesh Thukral | a536efc | 2009-02-18 18:54:14 +0530 | [diff] [blame] | 2862 | (LS_PHY_CLR_RESET | |
| 2863 | LS_XGXS_ENABLE | |
| 2864 | LS_XGXS_CTL | |
| 2865 | LS_PHY_CLK_EN | |
| 2866 | LS_ATTN_ALARM), |
| 2867 | TRUE); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2868 | DBG_ERROR("After Power Up and enable PHY in sxg_initialize_link\n"); |
| 2869 | |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 2870 | /* |
| 2871 | * Per information given by Aeluros, wait 100 ms after removing reset. |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 2872 | * It's not enough to wait for the self-clearing reset bit in reg 0 to |
| 2873 | * clear. |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 2874 | */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2875 | mdelay(100); |
| 2876 | |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 2877 | /* Verify the PHY has come up by checking that the Reset bit has |
| 2878 | * cleared. |
| 2879 | */ |
| 2880 | status = sxg_read_mdio_reg(adapter, |
| 2881 | MIIM_DEV_PHY_PMA, /* PHY PMA/PMD module */ |
| 2882 | PHY_PMA_CONTROL1, /* PMA/PMD control register */ |
| 2883 | &Value); |
| 2884 | DBG_ERROR("After sxg_read_mdio_reg Value[%x] fail=%x\n", Value, |
| 2885 | (Value & PMA_CONTROL1_RESET)); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2886 | if (status != STATUS_SUCCESS) |
| 2887 | return (STATUS_FAILURE); |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2888 | if (Value & PMA_CONTROL1_RESET) /* reset complete if bit is 0 */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2889 | return (STATUS_FAILURE); |
| 2890 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2891 | /* The SERDES should be initialized by now - confirm */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2892 | READ_REG(HwRegs->LinkStatus, Value); |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2893 | if (Value & LS_SERDES_DOWN) /* verify SERDES is initialized */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2894 | return (STATUS_FAILURE); |
| 2895 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2896 | /* The XAUI link should also be up - confirm */ |
| 2897 | if (!(Value & LS_XAUI_LINK_UP)) /* verify XAUI link is up */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2898 | return (STATUS_FAILURE); |
| 2899 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2900 | /* Initialize the PHY */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2901 | status = sxg_phy_init(adapter); |
| 2902 | if (status != STATUS_SUCCESS) |
| 2903 | return (STATUS_FAILURE); |
| 2904 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2905 | /* Enable the Link Alarm */ |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 2906 | |
| 2907 | /* MIIM_DEV_PHY_PMA - PHY PMA/PMD module |
| 2908 | * LASI_CONTROL - LASI control register |
| 2909 | * LASI_CTL_LS_ALARM_ENABLE - enable link alarm bit |
| 2910 | */ |
| 2911 | status = sxg_write_mdio_reg(adapter, MIIM_DEV_PHY_PMA, |
| 2912 | LASI_CONTROL, |
| 2913 | LASI_CTL_LS_ALARM_ENABLE); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2914 | if (status != STATUS_SUCCESS) |
| 2915 | return (STATUS_FAILURE); |
| 2916 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2917 | /* XXXTODO - temporary - verify bit is set */ |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 2918 | |
| 2919 | /* MIIM_DEV_PHY_PMA - PHY PMA/PMD module |
| 2920 | * LASI_CONTROL - LASI control register |
| 2921 | */ |
| 2922 | status = sxg_read_mdio_reg(adapter, MIIM_DEV_PHY_PMA, |
| 2923 | LASI_CONTROL, |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2924 | &Value); |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 2925 | |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2926 | if (status != STATUS_SUCCESS) |
| 2927 | return (STATUS_FAILURE); |
| 2928 | if (!(Value & LASI_CTL_LS_ALARM_ENABLE)) { |
| 2929 | DBG_ERROR("Error! LASI Control Alarm Enable bit not set!\n"); |
| 2930 | } |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2931 | /* Enable receive */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2932 | MaxFrame = adapter->JumboEnabled ? JUMBOMAXFRAME : ETHERMAXFRAME; |
| 2933 | ConfigData = (RCV_CONFIG_ENABLE | |
| 2934 | RCV_CONFIG_ENPARSE | |
| 2935 | RCV_CONFIG_RCVBAD | |
| 2936 | RCV_CONFIG_RCVPAUSE | |
| 2937 | RCV_CONFIG_TZIPV6 | |
| 2938 | RCV_CONFIG_TZIPV4 | |
| 2939 | RCV_CONFIG_HASH_16 | |
| 2940 | RCV_CONFIG_SOCKET | RCV_CONFIG_BUFSIZE(MaxFrame)); |
Mithlesh Thukral | a536efc | 2009-02-18 18:54:14 +0530 | [diff] [blame] | 2941 | |
| 2942 | if (adapter->asictype == SAHARA_REV_B) { |
| 2943 | ConfigData |= (RCV_CONFIG_HIPRICTL | |
| 2944 | RCV_CONFIG_NEWSTATUSFMT); |
| 2945 | } |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2946 | WRITE_REG(HwRegs->RcvConfig, ConfigData, TRUE); |
| 2947 | |
| 2948 | WRITE_REG(HwRegs->XmtConfig, XMT_CONFIG_ENABLE, TRUE); |
| 2949 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2950 | /* Mark the link as down. We'll get a link event when it comes up. */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2951 | sxg_link_state(adapter, SXG_LINK_DOWN); |
| 2952 | |
| 2953 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "XInitLnk", |
| 2954 | adapter, 0, 0, 0); |
| 2955 | return (STATUS_SUCCESS); |
| 2956 | } |
| 2957 | |
| 2958 | /* |
| 2959 | * sxg_phy_init - Initialize the PHY |
| 2960 | * |
| 2961 | * Arguments - |
| 2962 | * adapter - A pointer to our adapter structure |
| 2963 | * |
| 2964 | * Return |
| 2965 | * status |
| 2966 | */ |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 2967 | static int sxg_phy_init(struct adapter_t *adapter) |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2968 | { |
| 2969 | u32 Value; |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 2970 | struct phy_ucode *p; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2971 | int status; |
| 2972 | |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 2973 | DBG_ERROR("ENTER %s\n", __func__); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2974 | |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 2975 | /* MIIM_DEV_PHY_PMA - PHY PMA/PMD module |
| 2976 | * 0xC205 - PHY ID register (?) |
| 2977 | * &Value - XXXTODO - add def |
| 2978 | */ |
| 2979 | status = sxg_read_mdio_reg(adapter, MIIM_DEV_PHY_PMA, |
| 2980 | 0xC205, |
| 2981 | &Value); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2982 | if (status != STATUS_SUCCESS) |
| 2983 | return (STATUS_FAILURE); |
| 2984 | |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 2985 | if (Value == 0x0012) { |
| 2986 | /* 0x0012 == AEL2005C PHY(?) - XXXTODO - add def */ |
| 2987 | DBG_ERROR("AEL2005C PHY detected. Downloading PHY \ |
| 2988 | microcode.\n"); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2989 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2990 | /* Initialize AEL2005C PHY and download PHY microcode */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2991 | for (p = PhyUcode; p->Addr != 0xFFFF; p++) { |
| 2992 | if (p->Addr == 0) { |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2993 | /* if address == 0, data == sleep time in ms */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2994 | mdelay(p->Data); |
| 2995 | } else { |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 2996 | /* write the given data to the specified address */ |
| 2997 | status = sxg_write_mdio_reg(adapter, |
| 2998 | MIIM_DEV_PHY_PMA, |
| 2999 | /* PHY address */ |
| 3000 | p->Addr, |
| 3001 | /* PHY data */ |
| 3002 | p->Data); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3003 | if (status != STATUS_SUCCESS) |
| 3004 | return (STATUS_FAILURE); |
| 3005 | } |
| 3006 | } |
| 3007 | } |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 3008 | DBG_ERROR("EXIT %s\n", __func__); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3009 | |
| 3010 | return (STATUS_SUCCESS); |
| 3011 | } |
| 3012 | |
| 3013 | /* |
| 3014 | * sxg_link_event - Process a link event notification from the card |
| 3015 | * |
| 3016 | * Arguments - |
| 3017 | * adapter - A pointer to our adapter structure |
| 3018 | * |
| 3019 | * Return |
| 3020 | * None |
| 3021 | */ |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 3022 | static void sxg_link_event(struct adapter_t *adapter) |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3023 | { |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 3024 | struct sxg_hw_regs *HwRegs = adapter->HwRegs; |
Mithlesh Thukral | 0d41472 | 2009-01-19 20:29:59 +0530 | [diff] [blame] | 3025 | struct net_device *netdev = adapter->netdev; |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 3026 | enum SXG_LINK_STATE LinkState; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3027 | int status; |
| 3028 | u32 Value; |
| 3029 | |
Mithlesh Thukral | e5ea8da | 2009-03-20 17:37:32 +0530 | [diff] [blame^] | 3030 | if (adapter->state == ADAPT_DOWN) |
| 3031 | return; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3032 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "LinkEvnt", |
| 3033 | adapter, 0, 0, 0); |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 3034 | DBG_ERROR("ENTER %s\n", __func__); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3035 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 3036 | /* Check the Link Status register. We should have a Link Alarm. */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3037 | READ_REG(HwRegs->LinkStatus, Value); |
| 3038 | if (Value & LS_LINK_ALARM) { |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 3039 | /* |
| 3040 | * We got a Link Status alarm. First, pause to let the |
| 3041 | * link state settle (it can bounce a number of times) |
| 3042 | */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3043 | mdelay(10); |
| 3044 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 3045 | /* Now clear the alarm by reading the LASI status register. */ |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 3046 | /* MIIM_DEV_PHY_PMA - PHY PMA/PMD module */ |
| 3047 | status = sxg_read_mdio_reg(adapter, MIIM_DEV_PHY_PMA, |
| 3048 | /* LASI status register */ |
| 3049 | LASI_STATUS, |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3050 | &Value); |
| 3051 | if (status != STATUS_SUCCESS) { |
| 3052 | DBG_ERROR("Error reading LASI Status MDIO register!\n"); |
| 3053 | sxg_link_state(adapter, SXG_LINK_DOWN); |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 3054 | /* ASSERT(0); */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3055 | } |
Mithlesh Thukral | a536efc | 2009-02-18 18:54:14 +0530 | [diff] [blame] | 3056 | /* |
| 3057 | * We used to assert that the LASI_LS_ALARM bit was set, as |
| 3058 | * it should be. But there appears to be cases during |
| 3059 | * initialization (when the PHY is reset and re-initialized) |
| 3060 | * when we get a link alarm, but the status bit is 0 when we |
| 3061 | * read it. Rather than trying to assure this never happens |
| 3062 | * (and nver being certain), just ignore it. |
| 3063 | |
| 3064 | * ASSERT(Value & LASI_STATUS_LS_ALARM); |
| 3065 | */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3066 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 3067 | /* Now get and set the link state */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3068 | LinkState = sxg_get_link_state(adapter); |
| 3069 | sxg_link_state(adapter, LinkState); |
| 3070 | DBG_ERROR("SXG: Link Alarm occurred. Link is %s\n", |
| 3071 | ((LinkState == SXG_LINK_UP) ? "UP" : "DOWN")); |
Mithlesh Thukral | e5ea8da | 2009-03-20 17:37:32 +0530 | [diff] [blame^] | 3072 | if (LinkState == SXG_LINK_UP) { |
Mithlesh Thukral | 0d41472 | 2009-01-19 20:29:59 +0530 | [diff] [blame] | 3073 | netif_carrier_on(netdev); |
Mithlesh Thukral | e5ea8da | 2009-03-20 17:37:32 +0530 | [diff] [blame^] | 3074 | netif_tx_start_all_queues(netdev); |
| 3075 | } else { |
| 3076 | netif_tx_stop_all_queues(netdev); |
Mithlesh Thukral | 0d41472 | 2009-01-19 20:29:59 +0530 | [diff] [blame] | 3077 | netif_carrier_off(netdev); |
Mithlesh Thukral | e5ea8da | 2009-03-20 17:37:32 +0530 | [diff] [blame^] | 3078 | } |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3079 | } else { |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 3080 | /* |
| 3081 | * XXXTODO - Assuming Link Attention is only being generated |
| 3082 | * for the Link Alarm pin (and not for a XAUI Link Status change) |
| 3083 | * , then it's impossible to get here. Yet we've gotten here |
| 3084 | * twice (under extreme conditions - bouncing the link up and |
| 3085 | * down many times a second). Needs further investigation. |
| 3086 | */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3087 | DBG_ERROR("SXG: sxg_link_event: Can't get here!\n"); |
| 3088 | DBG_ERROR("SXG: Link Status == 0x%08X.\n", Value); |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 3089 | /* ASSERT(0); */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3090 | } |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 3091 | DBG_ERROR("EXIT %s\n", __func__); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3092 | |
| 3093 | } |
| 3094 | |
| 3095 | /* |
| 3096 | * sxg_get_link_state - Determine if the link is up or down |
| 3097 | * |
| 3098 | * Arguments - |
| 3099 | * adapter - A pointer to our adapter structure |
| 3100 | * |
| 3101 | * Return |
| 3102 | * Link State |
| 3103 | */ |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 3104 | static enum SXG_LINK_STATE sxg_get_link_state(struct adapter_t *adapter) |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3105 | { |
| 3106 | int status; |
| 3107 | u32 Value; |
| 3108 | |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 3109 | DBG_ERROR("ENTER %s\n", __func__); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3110 | |
| 3111 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "GetLink", |
| 3112 | adapter, 0, 0, 0); |
| 3113 | |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 3114 | /* |
| 3115 | * Per the Xenpak spec (and the IEEE 10Gb spec?), the link is up if |
| 3116 | * the following 3 bits (from 3 different MDIO registers) are all true. |
| 3117 | */ |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 3118 | |
| 3119 | /* MIIM_DEV_PHY_PMA - PHY PMA/PMD module */ |
| 3120 | status = sxg_read_mdio_reg(adapter, MIIM_DEV_PHY_PMA, |
| 3121 | /* PMA/PMD Receive Signal Detect register */ |
| 3122 | PHY_PMA_RCV_DET, |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3123 | &Value); |
| 3124 | if (status != STATUS_SUCCESS) |
| 3125 | goto bad; |
| 3126 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 3127 | /* If PMA/PMD receive signal detect is 0, then the link is down */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3128 | if (!(Value & PMA_RCV_DETECT)) |
| 3129 | return (SXG_LINK_DOWN); |
| 3130 | |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 3131 | /* MIIM_DEV_PHY_PCS - PHY PCS module */ |
| 3132 | status = sxg_read_mdio_reg(adapter, MIIM_DEV_PHY_PCS, |
| 3133 | /* PCS 10GBASE-R Status 1 register */ |
| 3134 | PHY_PCS_10G_STATUS1, |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3135 | &Value); |
| 3136 | if (status != STATUS_SUCCESS) |
| 3137 | goto bad; |
| 3138 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 3139 | /* If PCS is not locked to receive blocks, then the link is down */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3140 | if (!(Value & PCS_10B_BLOCK_LOCK)) |
| 3141 | return (SXG_LINK_DOWN); |
| 3142 | |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 3143 | status = sxg_read_mdio_reg(adapter, MIIM_DEV_PHY_XS,/* PHY XS module */ |
| 3144 | /* XS Lane Status register */ |
| 3145 | PHY_XS_LANE_STATUS, |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3146 | &Value); |
| 3147 | if (status != STATUS_SUCCESS) |
| 3148 | goto bad; |
| 3149 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 3150 | /* If XS transmit lanes are not aligned, then the link is down */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3151 | if (!(Value & XS_LANE_ALIGN)) |
| 3152 | return (SXG_LINK_DOWN); |
| 3153 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 3154 | /* All 3 bits are true, so the link is up */ |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 3155 | DBG_ERROR("EXIT %s\n", __func__); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3156 | |
| 3157 | return (SXG_LINK_UP); |
| 3158 | |
| 3159 | bad: |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 3160 | /* An error occurred reading an MDIO register. This shouldn't happen. */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3161 | DBG_ERROR("Error reading an MDIO register!\n"); |
| 3162 | ASSERT(0); |
| 3163 | return (SXG_LINK_DOWN); |
| 3164 | } |
| 3165 | |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 3166 | static void sxg_indicate_link_state(struct adapter_t *adapter, |
| 3167 | enum SXG_LINK_STATE LinkState) |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3168 | { |
| 3169 | if (adapter->LinkState == SXG_LINK_UP) { |
| 3170 | DBG_ERROR("%s: LINK now UP, call netif_start_queue\n", |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 3171 | __func__); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3172 | netif_start_queue(adapter->netdev); |
| 3173 | } else { |
| 3174 | DBG_ERROR("%s: LINK now DOWN, call netif_stop_queue\n", |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 3175 | __func__); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3176 | netif_stop_queue(adapter->netdev); |
| 3177 | } |
| 3178 | } |
| 3179 | |
| 3180 | /* |
Mithlesh Thukral | 7c66b14 | 2009-02-06 19:30:40 +0530 | [diff] [blame] | 3181 | * sxg_change_mtu - Change the Maximum Transfer Unit |
| 3182 | * * @returns 0 on success, negative on failure |
| 3183 | */ |
| 3184 | int sxg_change_mtu (struct net_device *netdev, int new_mtu) |
| 3185 | { |
| 3186 | struct adapter_t *adapter = (struct adapter_t *) netdev_priv(netdev); |
| 3187 | |
| 3188 | if (!((new_mtu == SXG_DEFAULT_MTU) || (new_mtu == SXG_JUMBO_MTU))) |
| 3189 | return -EINVAL; |
| 3190 | |
| 3191 | if(new_mtu == netdev->mtu) |
| 3192 | return 0; |
| 3193 | |
| 3194 | netdev->mtu = new_mtu; |
| 3195 | |
| 3196 | if (new_mtu == SXG_JUMBO_MTU) { |
| 3197 | adapter->JumboEnabled = TRUE; |
| 3198 | adapter->FrameSize = JUMBOMAXFRAME; |
| 3199 | adapter->ReceiveBufferSize = SXG_RCV_JUMBO_BUFFER_SIZE; |
| 3200 | } else { |
| 3201 | adapter->JumboEnabled = FALSE; |
| 3202 | adapter->FrameSize = ETHERMAXFRAME; |
| 3203 | adapter->ReceiveBufferSize = SXG_RCV_DATA_BUFFER_SIZE; |
| 3204 | } |
| 3205 | |
| 3206 | sxg_entry_halt(netdev); |
| 3207 | sxg_entry_open(netdev); |
| 3208 | return 0; |
| 3209 | } |
| 3210 | |
| 3211 | /* |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3212 | * sxg_link_state - Set the link state and if necessary, indicate. |
| 3213 | * This routine the central point of processing for all link state changes. |
| 3214 | * Nothing else in the driver should alter the link state or perform |
| 3215 | * link state indications |
| 3216 | * |
| 3217 | * Arguments - |
| 3218 | * adapter - A pointer to our adapter structure |
| 3219 | * LinkState - The link state |
| 3220 | * |
| 3221 | * Return |
| 3222 | * None |
| 3223 | */ |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 3224 | static void sxg_link_state(struct adapter_t *adapter, |
| 3225 | enum SXG_LINK_STATE LinkState) |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3226 | { |
| 3227 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_IMPORTANT, "LnkINDCT", |
| 3228 | adapter, LinkState, adapter->LinkState, adapter->State); |
| 3229 | |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 3230 | DBG_ERROR("ENTER %s\n", __func__); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3231 | |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 3232 | /* |
| 3233 | * Hold the adapter lock during this routine. Maybe move |
| 3234 | * the lock to the caller. |
| 3235 | */ |
Mithlesh Thukral | 6a2946b | 2009-01-19 20:24:30 +0530 | [diff] [blame] | 3236 | /* IMP TODO : Check if we can survive without taking this lock */ |
| 3237 | // spin_lock(&adapter->AdapterLock); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3238 | if (LinkState == adapter->LinkState) { |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 3239 | /* Nothing changed.. */ |
Mithlesh Thukral | 6a2946b | 2009-01-19 20:24:30 +0530 | [diff] [blame] | 3240 | // spin_unlock(&adapter->AdapterLock); |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 3241 | DBG_ERROR("EXIT #0 %s. Link status = %d\n", |
| 3242 | __func__, LinkState); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3243 | return; |
| 3244 | } |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 3245 | /* Save the adapter state */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3246 | adapter->LinkState = LinkState; |
| 3247 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 3248 | /* Drop the lock and indicate link state */ |
Mithlesh Thukral | 6a2946b | 2009-01-19 20:24:30 +0530 | [diff] [blame] | 3249 | // spin_unlock(&adapter->AdapterLock); |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 3250 | DBG_ERROR("EXIT #1 %s\n", __func__); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3251 | |
| 3252 | sxg_indicate_link_state(adapter, LinkState); |
| 3253 | } |
| 3254 | |
| 3255 | /* |
| 3256 | * sxg_write_mdio_reg - Write to a register on the MDIO bus |
| 3257 | * |
| 3258 | * Arguments - |
| 3259 | * adapter - A pointer to our adapter structure |
| 3260 | * DevAddr - MDIO device number being addressed |
| 3261 | * RegAddr - register address for the specified MDIO device |
| 3262 | * Value - value to write to the MDIO register |
| 3263 | * |
| 3264 | * Return |
| 3265 | * status |
| 3266 | */ |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 3267 | static int sxg_write_mdio_reg(struct adapter_t *adapter, |
J.R. Mauro | 5c7514e | 2008-10-05 20:38:52 -0400 | [diff] [blame] | 3268 | u32 DevAddr, u32 RegAddr, u32 Value) |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3269 | { |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 3270 | struct sxg_hw_regs *HwRegs = adapter->HwRegs; |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 3271 | /* Address operation (written to MIIM field reg) */ |
| 3272 | u32 AddrOp; |
| 3273 | /* Write operation (written to MIIM field reg) */ |
| 3274 | u32 WriteOp; |
| 3275 | u32 Cmd;/* Command (written to MIIM command reg) */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3276 | u32 ValueRead; |
| 3277 | u32 Timeout; |
| 3278 | |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 3279 | /* DBG_ERROR("ENTER %s\n", __func__); */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3280 | |
| 3281 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "WrtMDIO", |
| 3282 | adapter, 0, 0, 0); |
| 3283 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 3284 | /* Ensure values don't exceed field width */ |
| 3285 | DevAddr &= 0x001F; /* 5-bit field */ |
| 3286 | RegAddr &= 0xFFFF; /* 16-bit field */ |
| 3287 | Value &= 0xFFFF; /* 16-bit field */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3288 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 3289 | /* Set MIIM field register bits for an MIIM address operation */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3290 | AddrOp = (MIIM_PORT_NUM << AXGMAC_AMIIM_FIELD_PORT_SHIFT) | |
| 3291 | (DevAddr << AXGMAC_AMIIM_FIELD_DEV_SHIFT) | |
| 3292 | (MIIM_TA_10GB << AXGMAC_AMIIM_FIELD_TA_SHIFT) | |
| 3293 | (MIIM_OP_ADDR << AXGMAC_AMIIM_FIELD_OP_SHIFT) | RegAddr; |
| 3294 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 3295 | /* Set MIIM field register bits for an MIIM write operation */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3296 | WriteOp = (MIIM_PORT_NUM << AXGMAC_AMIIM_FIELD_PORT_SHIFT) | |
| 3297 | (DevAddr << AXGMAC_AMIIM_FIELD_DEV_SHIFT) | |
| 3298 | (MIIM_TA_10GB << AXGMAC_AMIIM_FIELD_TA_SHIFT) | |
| 3299 | (MIIM_OP_WRITE << AXGMAC_AMIIM_FIELD_OP_SHIFT) | Value; |
| 3300 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 3301 | /* Set MIIM command register bits to execute an MIIM command */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3302 | Cmd = AXGMAC_AMIIM_CMD_START | AXGMAC_AMIIM_CMD_10G_OPERATION; |
| 3303 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 3304 | /* Reset the command register command bit (in case it's not 0) */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3305 | WRITE_REG(HwRegs->MacAmiimCmd, 0, TRUE); |
| 3306 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 3307 | /* MIIM write to set the address of the specified MDIO register */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3308 | WRITE_REG(HwRegs->MacAmiimField, AddrOp, TRUE); |
| 3309 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 3310 | /* Write to MIIM Command Register to execute to address operation */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3311 | WRITE_REG(HwRegs->MacAmiimCmd, Cmd, TRUE); |
| 3312 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 3313 | /* Poll AMIIM Indicator register to wait for completion */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3314 | Timeout = SXG_LINK_TIMEOUT; |
| 3315 | do { |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 3316 | udelay(100); /* Timeout in 100us units */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3317 | READ_REG(HwRegs->MacAmiimIndicator, ValueRead); |
| 3318 | if (--Timeout == 0) { |
| 3319 | return (STATUS_FAILURE); |
| 3320 | } |
| 3321 | } while (ValueRead & AXGMAC_AMIIM_INDC_BUSY); |
| 3322 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 3323 | /* Reset the command register command bit */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3324 | WRITE_REG(HwRegs->MacAmiimCmd, 0, TRUE); |
| 3325 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 3326 | /* MIIM write to set up an MDIO write operation */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3327 | WRITE_REG(HwRegs->MacAmiimField, WriteOp, TRUE); |
| 3328 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 3329 | /* Write to MIIM Command Register to execute the write operation */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3330 | WRITE_REG(HwRegs->MacAmiimCmd, Cmd, TRUE); |
| 3331 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 3332 | /* Poll AMIIM Indicator register to wait for completion */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3333 | Timeout = SXG_LINK_TIMEOUT; |
| 3334 | do { |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 3335 | udelay(100); /* Timeout in 100us units */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3336 | READ_REG(HwRegs->MacAmiimIndicator, ValueRead); |
| 3337 | if (--Timeout == 0) { |
| 3338 | return (STATUS_FAILURE); |
| 3339 | } |
| 3340 | } while (ValueRead & AXGMAC_AMIIM_INDC_BUSY); |
| 3341 | |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 3342 | /* DBG_ERROR("EXIT %s\n", __func__); */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3343 | |
| 3344 | return (STATUS_SUCCESS); |
| 3345 | } |
| 3346 | |
| 3347 | /* |
| 3348 | * sxg_read_mdio_reg - Read a register on the MDIO bus |
| 3349 | * |
| 3350 | * Arguments - |
| 3351 | * adapter - A pointer to our adapter structure |
| 3352 | * DevAddr - MDIO device number being addressed |
| 3353 | * RegAddr - register address for the specified MDIO device |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 3354 | * pValue - pointer to where to put data read from the MDIO register |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3355 | * |
| 3356 | * Return |
| 3357 | * status |
| 3358 | */ |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 3359 | static int sxg_read_mdio_reg(struct adapter_t *adapter, |
J.R. Mauro | 5c7514e | 2008-10-05 20:38:52 -0400 | [diff] [blame] | 3360 | u32 DevAddr, u32 RegAddr, u32 *pValue) |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3361 | { |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 3362 | struct sxg_hw_regs *HwRegs = adapter->HwRegs; |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 3363 | u32 AddrOp; /* Address operation (written to MIIM field reg) */ |
| 3364 | u32 ReadOp; /* Read operation (written to MIIM field reg) */ |
| 3365 | u32 Cmd; /* Command (written to MIIM command reg) */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3366 | u32 ValueRead; |
| 3367 | u32 Timeout; |
| 3368 | |
| 3369 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "WrtMDIO", |
| 3370 | adapter, 0, 0, 0); |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 3371 | DBG_ERROR("ENTER %s\n", __FUNCTION__); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3372 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 3373 | /* Ensure values don't exceed field width */ |
| 3374 | DevAddr &= 0x001F; /* 5-bit field */ |
| 3375 | RegAddr &= 0xFFFF; /* 16-bit field */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3376 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 3377 | /* Set MIIM field register bits for an MIIM address operation */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3378 | AddrOp = (MIIM_PORT_NUM << AXGMAC_AMIIM_FIELD_PORT_SHIFT) | |
| 3379 | (DevAddr << AXGMAC_AMIIM_FIELD_DEV_SHIFT) | |
| 3380 | (MIIM_TA_10GB << AXGMAC_AMIIM_FIELD_TA_SHIFT) | |
| 3381 | (MIIM_OP_ADDR << AXGMAC_AMIIM_FIELD_OP_SHIFT) | RegAddr; |
| 3382 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 3383 | /* Set MIIM field register bits for an MIIM read operation */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3384 | ReadOp = (MIIM_PORT_NUM << AXGMAC_AMIIM_FIELD_PORT_SHIFT) | |
| 3385 | (DevAddr << AXGMAC_AMIIM_FIELD_DEV_SHIFT) | |
| 3386 | (MIIM_TA_10GB << AXGMAC_AMIIM_FIELD_TA_SHIFT) | |
| 3387 | (MIIM_OP_READ << AXGMAC_AMIIM_FIELD_OP_SHIFT); |
| 3388 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 3389 | /* Set MIIM command register bits to execute an MIIM command */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3390 | Cmd = AXGMAC_AMIIM_CMD_START | AXGMAC_AMIIM_CMD_10G_OPERATION; |
| 3391 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 3392 | /* Reset the command register command bit (in case it's not 0) */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3393 | WRITE_REG(HwRegs->MacAmiimCmd, 0, TRUE); |
| 3394 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 3395 | /* MIIM write to set the address of the specified MDIO register */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3396 | WRITE_REG(HwRegs->MacAmiimField, AddrOp, TRUE); |
| 3397 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 3398 | /* Write to MIIM Command Register to execute to address operation */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3399 | WRITE_REG(HwRegs->MacAmiimCmd, Cmd, TRUE); |
| 3400 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 3401 | /* Poll AMIIM Indicator register to wait for completion */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3402 | Timeout = SXG_LINK_TIMEOUT; |
| 3403 | do { |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 3404 | udelay(100); /* Timeout in 100us units */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3405 | READ_REG(HwRegs->MacAmiimIndicator, ValueRead); |
| 3406 | if (--Timeout == 0) { |
Mithlesh Thukral | 1323e5f | 2009-01-05 21:13:23 +0530 | [diff] [blame] | 3407 | DBG_ERROR("EXIT %s with STATUS_FAILURE 1\n", __FUNCTION__); |
| 3408 | |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3409 | return (STATUS_FAILURE); |
| 3410 | } |
| 3411 | } while (ValueRead & AXGMAC_AMIIM_INDC_BUSY); |
| 3412 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 3413 | /* Reset the command register command bit */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3414 | WRITE_REG(HwRegs->MacAmiimCmd, 0, TRUE); |
| 3415 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 3416 | /* MIIM write to set up an MDIO register read operation */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3417 | WRITE_REG(HwRegs->MacAmiimField, ReadOp, TRUE); |
| 3418 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 3419 | /* Write to MIIM Command Register to execute the read operation */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3420 | WRITE_REG(HwRegs->MacAmiimCmd, Cmd, TRUE); |
| 3421 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 3422 | /* Poll AMIIM Indicator register to wait for completion */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3423 | Timeout = SXG_LINK_TIMEOUT; |
| 3424 | do { |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 3425 | udelay(100); /* Timeout in 100us units */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3426 | READ_REG(HwRegs->MacAmiimIndicator, ValueRead); |
| 3427 | if (--Timeout == 0) { |
Mithlesh Thukral | 1323e5f | 2009-01-05 21:13:23 +0530 | [diff] [blame] | 3428 | DBG_ERROR("EXIT %s with STATUS_FAILURE 2\n", __FUNCTION__); |
| 3429 | |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3430 | return (STATUS_FAILURE); |
| 3431 | } |
| 3432 | } while (ValueRead & AXGMAC_AMIIM_INDC_BUSY); |
| 3433 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 3434 | /* Read the MDIO register data back from the field register */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3435 | READ_REG(HwRegs->MacAmiimField, *pValue); |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 3436 | *pValue &= 0xFFFF; /* data is in the lower 16 bits */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3437 | |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 3438 | DBG_ERROR("EXIT %s\n", __FUNCTION__); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3439 | |
| 3440 | return (STATUS_SUCCESS); |
| 3441 | } |
| 3442 | |
| 3443 | /* |
Greg Kroah-Hartman | c6c25ed | 2008-10-21 10:41:45 -0700 | [diff] [blame] | 3444 | * Functions to obtain the CRC corresponding to the destination mac address. |
| 3445 | * This is a standard ethernet CRC in that it is a 32-bit, reflected CRC using |
| 3446 | * the polynomial: |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 3447 | * x^32 + x^26 + x^23 + x^22 + x^16 + x^12 + x^11 + x^10 + x^8 + x^7 + x^5 |
| 3448 | * + x^4 + x^2 + x^1. |
Greg Kroah-Hartman | c6c25ed | 2008-10-21 10:41:45 -0700 | [diff] [blame] | 3449 | * |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 3450 | * After the CRC for the 6 bytes is generated (but before the value is |
| 3451 | * complemented), we must then transpose the value and return bits 30-23. |
Greg Kroah-Hartman | c6c25ed | 2008-10-21 10:41:45 -0700 | [diff] [blame] | 3452 | */ |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 3453 | static u32 sxg_crc_table[256];/* Table of CRC's for all possible byte values */ |
| 3454 | static u32 sxg_crc_init; /* Is table initialized */ |
Greg Kroah-Hartman | c6c25ed | 2008-10-21 10:41:45 -0700 | [diff] [blame] | 3455 | |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 3456 | /* Contruct the CRC32 table */ |
Greg Kroah-Hartman | c6c25ed | 2008-10-21 10:41:45 -0700 | [diff] [blame] | 3457 | static void sxg_mcast_init_crc32(void) |
| 3458 | { |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 3459 | u32 c; /* CRC shit reg */ |
| 3460 | u32 e = 0; /* Poly X-or pattern */ |
| 3461 | int i; /* counter */ |
Greg Kroah-Hartman | c6c25ed | 2008-10-21 10:41:45 -0700 | [diff] [blame] | 3462 | int k; /* byte being shifted into crc */ |
| 3463 | |
| 3464 | static int p[] = { 0, 1, 2, 4, 5, 7, 8, 10, 11, 12, 16, 22, 23, 26 }; |
| 3465 | |
| 3466 | for (i = 0; i < sizeof(p) / sizeof(int); i++) { |
| 3467 | e |= 1L << (31 - p[i]); |
| 3468 | } |
| 3469 | |
| 3470 | for (i = 1; i < 256; i++) { |
| 3471 | c = i; |
| 3472 | for (k = 8; k; k--) { |
| 3473 | c = c & 1 ? (c >> 1) ^ e : c >> 1; |
| 3474 | } |
| 3475 | sxg_crc_table[i] = c; |
| 3476 | } |
| 3477 | } |
| 3478 | |
Greg Kroah-Hartman | c6c25ed | 2008-10-21 10:41:45 -0700 | [diff] [blame] | 3479 | /* |
| 3480 | * Return the MAC hast as described above. |
| 3481 | */ |
| 3482 | static unsigned char sxg_mcast_get_mac_hash(char *macaddr) |
| 3483 | { |
| 3484 | u32 crc; |
| 3485 | char *p; |
| 3486 | int i; |
| 3487 | unsigned char machash = 0; |
| 3488 | |
| 3489 | if (!sxg_crc_init) { |
| 3490 | sxg_mcast_init_crc32(); |
| 3491 | sxg_crc_init = 1; |
| 3492 | } |
| 3493 | |
| 3494 | crc = 0xFFFFFFFF; /* Preload shift register, per crc-32 spec */ |
| 3495 | for (i = 0, p = macaddr; i < 6; ++p, ++i) { |
| 3496 | crc = (crc >> 8) ^ sxg_crc_table[(crc ^ *p) & 0xFF]; |
| 3497 | } |
| 3498 | |
| 3499 | /* Return bits 1-8, transposed */ |
| 3500 | for (i = 1; i < 9; i++) { |
| 3501 | machash |= (((crc >> i) & 1) << (8 - i)); |
| 3502 | } |
| 3503 | |
| 3504 | return (machash); |
| 3505 | } |
| 3506 | |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 3507 | static void sxg_mcast_set_mask(struct adapter_t *adapter) |
Greg Kroah-Hartman | c6c25ed | 2008-10-21 10:41:45 -0700 | [diff] [blame] | 3508 | { |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 3509 | struct sxg_ucode_regs *sxg_regs = adapter->UcodeRegs; |
Greg Kroah-Hartman | c6c25ed | 2008-10-21 10:41:45 -0700 | [diff] [blame] | 3510 | |
Mithlesh Thukral | b040b07 | 2009-01-28 07:08:11 +0530 | [diff] [blame] | 3511 | DBG_ERROR("%s ENTER (%s) MacFilter[%x] mask[%llx]\n", __FUNCTION__, |
Greg Kroah-Hartman | c6c25ed | 2008-10-21 10:41:45 -0700 | [diff] [blame] | 3512 | adapter->netdev->name, (unsigned int)adapter->MacFilter, |
| 3513 | adapter->MulticastMask); |
| 3514 | |
| 3515 | if (adapter->MacFilter & (MAC_ALLMCAST | MAC_PROMISC)) { |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 3516 | /* |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 3517 | * Turn on all multicast addresses. We have to do this for |
| 3518 | * promiscuous mode as well as ALLMCAST mode. It saves the |
| 3519 | * Microcode from having keep state about the MAC configuration |
Greg Kroah-Hartman | c6c25ed | 2008-10-21 10:41:45 -0700 | [diff] [blame] | 3520 | */ |
Mithlesh Thukral | b040b07 | 2009-01-28 07:08:11 +0530 | [diff] [blame] | 3521 | /* DBG_ERROR("sxg: %s MacFilter = MAC_ALLMCAST | MAC_PROMISC\n \ |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 3522 | * SLUT MODE!!!\n",__func__); |
| 3523 | */ |
Greg Kroah-Hartman | c6c25ed | 2008-10-21 10:41:45 -0700 | [diff] [blame] | 3524 | WRITE_REG(sxg_regs->McastLow, 0xFFFFFFFF, FLUSH); |
| 3525 | WRITE_REG(sxg_regs->McastHigh, 0xFFFFFFFF, FLUSH); |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 3526 | /* DBG_ERROR("%s (%s) WRITE to slic_regs slic_mcastlow&high \ |
| 3527 | * 0xFFFFFFFF\n",__func__, adapter->netdev->name); |
| 3528 | */ |
Greg Kroah-Hartman | c6c25ed | 2008-10-21 10:41:45 -0700 | [diff] [blame] | 3529 | |
| 3530 | } else { |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 3531 | /* |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 3532 | * Commit our multicast mast to the SLIC by writing to the |
| 3533 | * multicast address mask registers |
Greg Kroah-Hartman | c6c25ed | 2008-10-21 10:41:45 -0700 | [diff] [blame] | 3534 | */ |
| 3535 | DBG_ERROR("%s (%s) WRITE mcastlow[%lx] mcasthigh[%lx]\n", |
| 3536 | __func__, adapter->netdev->name, |
| 3537 | ((ulong) (adapter->MulticastMask & 0xFFFFFFFF)), |
| 3538 | ((ulong) |
| 3539 | ((adapter->MulticastMask >> 32) & 0xFFFFFFFF))); |
| 3540 | |
| 3541 | WRITE_REG(sxg_regs->McastLow, |
| 3542 | (u32) (adapter->MulticastMask & 0xFFFFFFFF), FLUSH); |
| 3543 | WRITE_REG(sxg_regs->McastHigh, |
| 3544 | (u32) ((adapter-> |
| 3545 | MulticastMask >> 32) & 0xFFFFFFFF), FLUSH); |
| 3546 | } |
| 3547 | } |
| 3548 | |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 3549 | static void sxg_mcast_set_bit(struct adapter_t *adapter, char *address) |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3550 | { |
| 3551 | unsigned char crcpoly; |
| 3552 | |
| 3553 | /* Get the CRC polynomial for the mac address */ |
| 3554 | crcpoly = sxg_mcast_get_mac_hash(address); |
| 3555 | |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 3556 | /* |
| 3557 | * We only have space on the SLIC for 64 entries. Lop |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3558 | * off the top two bits. (2^6 = 64) |
| 3559 | */ |
| 3560 | crcpoly &= 0x3F; |
| 3561 | |
| 3562 | /* OR in the new bit into our 64 bit mask. */ |
| 3563 | adapter->MulticastMask |= (u64) 1 << crcpoly; |
| 3564 | } |
Mithlesh Thukral | b040b07 | 2009-01-28 07:08:11 +0530 | [diff] [blame] | 3565 | |
| 3566 | /* |
| 3567 | * Function takes MAC addresses from dev_mc_list and generates the Mask |
| 3568 | */ |
| 3569 | |
| 3570 | static void sxg_set_mcast_addr(struct adapter_t *adapter) |
| 3571 | { |
| 3572 | struct dev_mc_list *mclist; |
| 3573 | struct net_device *dev = adapter->netdev; |
| 3574 | int i; |
| 3575 | |
| 3576 | if (adapter->MacFilter & (MAC_ALLMCAST | MAC_MCAST)) { |
| 3577 | for (i = 0, mclist = dev->mc_list; i < dev->mc_count; |
| 3578 | i++, mclist = mclist->next) { |
| 3579 | sxg_mcast_set_bit(adapter,mclist->da_addr); |
| 3580 | } |
| 3581 | } |
| 3582 | sxg_mcast_set_mask(adapter); |
| 3583 | } |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3584 | |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 3585 | static void sxg_mcast_set_list(struct net_device *dev) |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3586 | { |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 3587 | struct adapter_t *adapter = (struct adapter_t *) netdev_priv(dev); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3588 | |
| 3589 | ASSERT(adapter); |
Mithlesh Thukral | 559990c | 2009-01-30 20:20:19 +0530 | [diff] [blame] | 3590 | if (dev->flags & IFF_PROMISC) |
Mithlesh Thukral | 1323e5f | 2009-01-05 21:13:23 +0530 | [diff] [blame] | 3591 | adapter->MacFilter |= MAC_PROMISC; |
Mithlesh Thukral | b040b07 | 2009-01-28 07:08:11 +0530 | [diff] [blame] | 3592 | if (dev->flags & IFF_MULTICAST) |
| 3593 | adapter->MacFilter |= MAC_MCAST; |
Mithlesh Thukral | 559990c | 2009-01-30 20:20:19 +0530 | [diff] [blame] | 3594 | if (dev->flags & IFF_ALLMULTI) |
Mithlesh Thukral | b040b07 | 2009-01-28 07:08:11 +0530 | [diff] [blame] | 3595 | adapter->MacFilter |= MAC_ALLMCAST; |
Mithlesh Thukral | b040b07 | 2009-01-28 07:08:11 +0530 | [diff] [blame] | 3596 | |
Mithlesh Thukral | 1323e5f | 2009-01-05 21:13:23 +0530 | [diff] [blame] | 3597 | //XXX handle other flags as well |
Mithlesh Thukral | b040b07 | 2009-01-28 07:08:11 +0530 | [diff] [blame] | 3598 | sxg_set_mcast_addr(adapter); |
Mithlesh Thukral | 1323e5f | 2009-01-05 21:13:23 +0530 | [diff] [blame] | 3599 | } |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3600 | |
Mithlesh Thukral | d9d578b | 2009-01-19 20:23:22 +0530 | [diff] [blame] | 3601 | void sxg_free_sgl_buffers(struct adapter_t *adapter) |
Mithlesh Thukral | d0128aa | 2009-01-05 21:18:04 +0530 | [diff] [blame] | 3602 | { |
Mithlesh Thukral | d0128aa | 2009-01-05 21:18:04 +0530 | [diff] [blame] | 3603 | struct list_entry *ple; |
Mithlesh Thukral | d9d578b | 2009-01-19 20:23:22 +0530 | [diff] [blame] | 3604 | struct sxg_scatter_gather *Sgl; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3605 | |
Mithlesh Thukral | d9d578b | 2009-01-19 20:23:22 +0530 | [diff] [blame] | 3606 | while(!(IsListEmpty(&adapter->AllSglBuffers))) { |
Mithlesh Thukral | 6a2946b | 2009-01-19 20:24:30 +0530 | [diff] [blame] | 3607 | ple = RemoveHeadList(&adapter->AllSglBuffers); |
| 3608 | Sgl = container_of(ple, struct sxg_scatter_gather, AllList); |
| 3609 | kfree(Sgl); |
Mithlesh Thukral | d9d578b | 2009-01-19 20:23:22 +0530 | [diff] [blame] | 3610 | adapter->AllSglBufferCount--; |
Mithlesh Thukral | d0128aa | 2009-01-05 21:18:04 +0530 | [diff] [blame] | 3611 | } |
Mithlesh Thukral | d0128aa | 2009-01-05 21:18:04 +0530 | [diff] [blame] | 3612 | } |
Mithlesh Thukral | d9d578b | 2009-01-19 20:23:22 +0530 | [diff] [blame] | 3613 | |
| 3614 | void sxg_free_rcvblocks(struct adapter_t *adapter) |
| 3615 | { |
| 3616 | u32 i; |
| 3617 | void *temp_RcvBlock; |
| 3618 | struct list_entry *ple; |
| 3619 | struct sxg_rcv_block_hdr *RcvBlockHdr; |
| 3620 | struct sxg_rcv_data_buffer_hdr *RcvDataBufferHdr; |
| 3621 | ASSERT((adapter->state == SXG_STATE_INITIALIZING) || |
| 3622 | (adapter->state == SXG_STATE_HALTING)); |
| 3623 | while(!(IsListEmpty(&adapter->AllRcvBlocks))) { |
| 3624 | |
| 3625 | ple = RemoveHeadList(&adapter->AllRcvBlocks); |
| 3626 | RcvBlockHdr = container_of(ple, struct sxg_rcv_block_hdr, AllList); |
| 3627 | |
| 3628 | if(RcvBlockHdr->VirtualAddress) { |
| 3629 | temp_RcvBlock = RcvBlockHdr->VirtualAddress; |
| 3630 | |
| 3631 | for(i=0; i< SXG_RCV_DESCRIPTORS_PER_BLOCK; |
| 3632 | i++, temp_RcvBlock += SXG_RCV_DATA_HDR_SIZE) { |
| 3633 | RcvDataBufferHdr = |
| 3634 | (struct sxg_rcv_data_buffer_hdr *)temp_RcvBlock; |
| 3635 | SXG_FREE_RCV_PACKET(RcvDataBufferHdr); |
| 3636 | } |
| 3637 | } |
| 3638 | |
| 3639 | pci_free_consistent(adapter->pcidev, |
| 3640 | SXG_RCV_BLOCK_SIZE(SXG_RCV_DATA_HDR_SIZE), |
| 3641 | RcvBlockHdr->VirtualAddress, |
| 3642 | RcvBlockHdr->PhysicalAddress); |
| 3643 | adapter->AllRcvBlockCount--; |
| 3644 | } |
| 3645 | ASSERT(adapter->AllRcvBlockCount == 0); |
| 3646 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "XFrRBlk", |
| 3647 | adapter, 0, 0, 0); |
| 3648 | } |
| 3649 | void sxg_free_mcast_addrs(struct adapter_t *adapter) |
| 3650 | { |
| 3651 | struct sxg_multicast_address *address; |
| 3652 | while(adapter->MulticastAddrs) { |
| 3653 | address = adapter->MulticastAddrs; |
| 3654 | adapter->MulticastAddrs = address->Next; |
| 3655 | kfree(address); |
| 3656 | } |
| 3657 | |
| 3658 | adapter->MulticastMask= 0; |
| 3659 | } |
| 3660 | |
| 3661 | void sxg_unmap_resources(struct adapter_t *adapter) |
| 3662 | { |
| 3663 | if(adapter->HwRegs) { |
| 3664 | iounmap((void *)adapter->HwRegs); |
| 3665 | } |
| 3666 | if(adapter->UcodeRegs) { |
| 3667 | iounmap((void *)adapter->UcodeRegs); |
| 3668 | } |
| 3669 | |
| 3670 | ASSERT(adapter->AllRcvBlockCount == 0); |
| 3671 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "XFrRBlk", |
| 3672 | adapter, 0, 0, 0); |
| 3673 | } |
| 3674 | |
| 3675 | |
Mithlesh Thukral | d0128aa | 2009-01-05 21:18:04 +0530 | [diff] [blame] | 3676 | |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3677 | /* |
Mithlesh Thukral | d9d578b | 2009-01-19 20:23:22 +0530 | [diff] [blame] | 3678 | * sxg_free_resources - Free everything allocated in SxgAllocateResources |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3679 | * |
| 3680 | * Arguments - |
| 3681 | * adapter - A pointer to our adapter structure |
| 3682 | * |
| 3683 | * Return |
| 3684 | * none |
| 3685 | */ |
Mithlesh Thukral | d9d578b | 2009-01-19 20:23:22 +0530 | [diff] [blame] | 3686 | void sxg_free_resources(struct adapter_t *adapter) |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3687 | { |
| 3688 | u32 RssIds, IsrCount; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3689 | RssIds = SXG_RSS_CPU_COUNT(adapter); |
Mithlesh Thukral | 1782199f | 2009-02-06 19:32:28 +0530 | [diff] [blame] | 3690 | IsrCount = adapter->msi_enabled ? RssIds : 1; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3691 | |
| 3692 | if (adapter->BasicAllocations == FALSE) { |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 3693 | /* |
| 3694 | * No allocations have been made, including spinlocks, |
| 3695 | * or listhead initializations. Return. |
| 3696 | */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3697 | return; |
| 3698 | } |
Mithlesh Thukral | d9d578b | 2009-01-19 20:23:22 +0530 | [diff] [blame] | 3699 | |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3700 | if (!(IsListEmpty(&adapter->AllRcvBlocks))) { |
Mithlesh Thukral | d9d578b | 2009-01-19 20:23:22 +0530 | [diff] [blame] | 3701 | sxg_free_rcvblocks(adapter); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3702 | } |
| 3703 | if (!(IsListEmpty(&adapter->AllSglBuffers))) { |
Mithlesh Thukral | d9d578b | 2009-01-19 20:23:22 +0530 | [diff] [blame] | 3704 | sxg_free_sgl_buffers(adapter); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3705 | } |
Mithlesh Thukral | d0128aa | 2009-01-05 21:18:04 +0530 | [diff] [blame] | 3706 | |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3707 | if (adapter->XmtRingZeroIndex) { |
| 3708 | pci_free_consistent(adapter->pcidev, |
| 3709 | sizeof(u32), |
| 3710 | adapter->XmtRingZeroIndex, |
| 3711 | adapter->PXmtRingZeroIndex); |
| 3712 | } |
Mithlesh Thukral | d0128aa | 2009-01-05 21:18:04 +0530 | [diff] [blame] | 3713 | if (adapter->Isr) { |
| 3714 | pci_free_consistent(adapter->pcidev, |
| 3715 | sizeof(u32) * IsrCount, |
| 3716 | adapter->Isr, adapter->PIsr); |
| 3717 | } |
| 3718 | |
Mithlesh Thukral | d0128aa | 2009-01-05 21:18:04 +0530 | [diff] [blame] | 3719 | if (adapter->EventRings) { |
| 3720 | pci_free_consistent(adapter->pcidev, |
| 3721 | sizeof(struct sxg_event_ring) * RssIds, |
| 3722 | adapter->EventRings, adapter->PEventRings); |
| 3723 | } |
Mithlesh Thukral | d0128aa | 2009-01-05 21:18:04 +0530 | [diff] [blame] | 3724 | if (adapter->RcvRings) { |
| 3725 | pci_free_consistent(adapter->pcidev, |
Mithlesh Thukral | d9d578b | 2009-01-19 20:23:22 +0530 | [diff] [blame] | 3726 | sizeof(struct sxg_rcv_ring) * 1, |
Mithlesh Thukral | d0128aa | 2009-01-05 21:18:04 +0530 | [diff] [blame] | 3727 | adapter->RcvRings, |
| 3728 | adapter->PRcvRings); |
| 3729 | adapter->RcvRings = NULL; |
| 3730 | } |
| 3731 | |
Mithlesh Thukral | d0128aa | 2009-01-05 21:18:04 +0530 | [diff] [blame] | 3732 | if(adapter->XmtRings) { |
| 3733 | pci_free_consistent(adapter->pcidev, |
Mithlesh Thukral | d9d578b | 2009-01-19 20:23:22 +0530 | [diff] [blame] | 3734 | sizeof(struct sxg_xmt_ring) * 1, |
Mithlesh Thukral | d0128aa | 2009-01-05 21:18:04 +0530 | [diff] [blame] | 3735 | adapter->XmtRings, |
| 3736 | adapter->PXmtRings); |
| 3737 | adapter->XmtRings = NULL; |
| 3738 | } |
| 3739 | |
Mithlesh Thukral | d9d578b | 2009-01-19 20:23:22 +0530 | [diff] [blame] | 3740 | if (adapter->ucode_stats) { |
| 3741 | pci_unmap_single(adapter->pcidev, |
| 3742 | sizeof(struct sxg_ucode_stats), |
| 3743 | adapter->pucode_stats, PCI_DMA_FROMDEVICE); |
| 3744 | adapter->ucode_stats = NULL; |
| 3745 | } |
Mithlesh Thukral | d0128aa | 2009-01-05 21:18:04 +0530 | [diff] [blame] | 3746 | |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3747 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 3748 | /* Unmap register spaces */ |
Mithlesh Thukral | d9d578b | 2009-01-19 20:23:22 +0530 | [diff] [blame] | 3749 | sxg_unmap_resources(adapter); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3750 | |
Mithlesh Thukral | d9d578b | 2009-01-19 20:23:22 +0530 | [diff] [blame] | 3751 | sxg_free_mcast_addrs(adapter); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3752 | |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3753 | adapter->BasicAllocations = FALSE; |
| 3754 | |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3755 | } |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3756 | |
| 3757 | /* |
| 3758 | * sxg_allocate_complete - |
| 3759 | * |
| 3760 | * This routine is called when a memory allocation has completed. |
| 3761 | * |
| 3762 | * Arguments - |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 3763 | * struct adapter_t * - Our adapter structure |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3764 | * VirtualAddress - Memory virtual address |
| 3765 | * PhysicalAddress - Memory physical address |
| 3766 | * Length - Length of memory allocated (or 0) |
| 3767 | * Context - The type of buffer allocated |
| 3768 | * |
| 3769 | * Return |
| 3770 | * None. |
| 3771 | */ |
Mithlesh Thukral | 0d41472 | 2009-01-19 20:29:59 +0530 | [diff] [blame] | 3772 | static int sxg_allocate_complete(struct adapter_t *adapter, |
J.R. Mauro | 5c7514e | 2008-10-05 20:38:52 -0400 | [diff] [blame] | 3773 | void *VirtualAddress, |
| 3774 | dma_addr_t PhysicalAddress, |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 3775 | u32 Length, enum sxg_buffer_type Context) |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3776 | { |
Mithlesh Thukral | 0d41472 | 2009-01-19 20:29:59 +0530 | [diff] [blame] | 3777 | int status = 0; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3778 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "AllocCmp", |
| 3779 | adapter, VirtualAddress, Length, Context); |
Mithlesh Thukral | 6a2946b | 2009-01-19 20:24:30 +0530 | [diff] [blame] | 3780 | ASSERT(atomic_read(&adapter->pending_allocations)); |
| 3781 | atomic_dec(&adapter->pending_allocations); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3782 | |
| 3783 | switch (Context) { |
| 3784 | |
| 3785 | case SXG_BUFFER_TYPE_RCV: |
Mithlesh Thukral | 0d41472 | 2009-01-19 20:29:59 +0530 | [diff] [blame] | 3786 | status = sxg_allocate_rcvblock_complete(adapter, |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3787 | VirtualAddress, |
| 3788 | PhysicalAddress, Length); |
| 3789 | break; |
| 3790 | case SXG_BUFFER_TYPE_SGL: |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 3791 | sxg_allocate_sgl_buffer_complete(adapter, (struct sxg_scatter_gather *) |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3792 | VirtualAddress, |
| 3793 | PhysicalAddress, Length); |
| 3794 | break; |
| 3795 | } |
| 3796 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "XAlocCmp", |
| 3797 | adapter, VirtualAddress, Length, Context); |
Mithlesh Thukral | 0d41472 | 2009-01-19 20:29:59 +0530 | [diff] [blame] | 3798 | |
| 3799 | return status; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3800 | } |
| 3801 | |
| 3802 | /* |
| 3803 | * sxg_allocate_buffer_memory - Shared memory allocation routine used for |
| 3804 | * synchronous and asynchronous buffer allocations |
| 3805 | * |
| 3806 | * Arguments - |
| 3807 | * adapter - A pointer to our adapter structure |
| 3808 | * Size - block size to allocate |
| 3809 | * BufferType - Type of buffer to allocate |
| 3810 | * |
| 3811 | * Return |
| 3812 | * int |
| 3813 | */ |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 3814 | static int sxg_allocate_buffer_memory(struct adapter_t *adapter, |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 3815 | u32 Size, enum sxg_buffer_type BufferType) |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3816 | { |
| 3817 | int status; |
J.R. Mauro | 5c7514e | 2008-10-05 20:38:52 -0400 | [diff] [blame] | 3818 | void *Buffer; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3819 | dma_addr_t pBuffer; |
| 3820 | |
| 3821 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "AllocMem", |
| 3822 | adapter, Size, BufferType, 0); |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 3823 | /* |
| 3824 | * Grab the adapter lock and check the state. If we're in anything other |
| 3825 | * than INITIALIZING or RUNNING state, fail. This is to prevent |
| 3826 | * allocations in an improper driver state |
| 3827 | */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3828 | |
Mithlesh Thukral | 6a2946b | 2009-01-19 20:24:30 +0530 | [diff] [blame] | 3829 | atomic_inc(&adapter->pending_allocations); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3830 | |
Mithlesh Thukral | d9d578b | 2009-01-19 20:23:22 +0530 | [diff] [blame] | 3831 | if(BufferType != SXG_BUFFER_TYPE_SGL) |
| 3832 | Buffer = pci_alloc_consistent(adapter->pcidev, Size, &pBuffer); |
| 3833 | else { |
| 3834 | Buffer = kzalloc(Size, GFP_ATOMIC); |
Mithlesh Thukral | 54aed11 | 2009-01-19 20:27:17 +0530 | [diff] [blame] | 3835 | pBuffer = (dma_addr_t)NULL; |
Mithlesh Thukral | d9d578b | 2009-01-19 20:23:22 +0530 | [diff] [blame] | 3836 | } |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3837 | if (Buffer == NULL) { |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 3838 | /* |
| 3839 | * Decrement the AllocationsPending count while holding |
| 3840 | * the lock. Pause processing relies on this |
| 3841 | */ |
Mithlesh Thukral | 6a2946b | 2009-01-19 20:24:30 +0530 | [diff] [blame] | 3842 | atomic_dec(&adapter->pending_allocations); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3843 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "AlcMemF1", |
| 3844 | adapter, Size, BufferType, 0); |
| 3845 | return (STATUS_RESOURCES); |
| 3846 | } |
Mithlesh Thukral | 0d41472 | 2009-01-19 20:29:59 +0530 | [diff] [blame] | 3847 | status = sxg_allocate_complete(adapter, Buffer, pBuffer, Size, BufferType); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3848 | |
| 3849 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "XAlocMem", |
| 3850 | adapter, Size, BufferType, status); |
Mithlesh Thukral | 0d41472 | 2009-01-19 20:29:59 +0530 | [diff] [blame] | 3851 | return status; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3852 | } |
| 3853 | |
| 3854 | /* |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 3855 | * sxg_allocate_rcvblock_complete - Complete a receive descriptor |
| 3856 | * block allocation |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3857 | * |
| 3858 | * Arguments - |
| 3859 | * adapter - A pointer to our adapter structure |
| 3860 | * RcvBlock - receive block virtual address |
| 3861 | * PhysicalAddress - Physical address |
| 3862 | * Length - Memory length |
| 3863 | * |
| 3864 | * Return |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3865 | */ |
Mithlesh Thukral | 0d41472 | 2009-01-19 20:29:59 +0530 | [diff] [blame] | 3866 | static int sxg_allocate_rcvblock_complete(struct adapter_t *adapter, |
J.R. Mauro | 5c7514e | 2008-10-05 20:38:52 -0400 | [diff] [blame] | 3867 | void *RcvBlock, |
| 3868 | dma_addr_t PhysicalAddress, |
| 3869 | u32 Length) |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3870 | { |
| 3871 | u32 i; |
| 3872 | u32 BufferSize = adapter->ReceiveBufferSize; |
| 3873 | u64 Paddr; |
Mithlesh Thukral | d0128aa | 2009-01-05 21:18:04 +0530 | [diff] [blame] | 3874 | void *temp_RcvBlock; |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 3875 | struct sxg_rcv_block_hdr *RcvBlockHdr; |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 3876 | struct sxg_rcv_data_buffer_hdr *RcvDataBufferHdr; |
| 3877 | struct sxg_rcv_descriptor_block *RcvDescriptorBlock; |
| 3878 | struct sxg_rcv_descriptor_block_hdr *RcvDescriptorBlockHdr; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3879 | |
| 3880 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "AlRcvBlk", |
| 3881 | adapter, RcvBlock, Length, 0); |
| 3882 | if (RcvBlock == NULL) { |
| 3883 | goto fail; |
| 3884 | } |
| 3885 | memset(RcvBlock, 0, Length); |
| 3886 | ASSERT((BufferSize == SXG_RCV_DATA_BUFFER_SIZE) || |
| 3887 | (BufferSize == SXG_RCV_JUMBO_BUFFER_SIZE)); |
Mithlesh Thukral | d0128aa | 2009-01-05 21:18:04 +0530 | [diff] [blame] | 3888 | ASSERT(Length == SXG_RCV_BLOCK_SIZE(SXG_RCV_DATA_HDR_SIZE)); |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 3889 | /* |
| 3890 | * First, initialize the contained pool of receive data buffers. |
| 3891 | * This initialization requires NBL/NB/MDL allocations, if any of them |
| 3892 | * fail, free the block and return without queueing the shared memory |
| 3893 | */ |
Mithlesh Thukral | d0128aa | 2009-01-05 21:18:04 +0530 | [diff] [blame] | 3894 | //RcvDataBuffer = RcvBlock; |
| 3895 | temp_RcvBlock = RcvBlock; |
| 3896 | for (i = 0; i < SXG_RCV_DESCRIPTORS_PER_BLOCK; |
| 3897 | i++, temp_RcvBlock += SXG_RCV_DATA_HDR_SIZE) { |
| 3898 | RcvDataBufferHdr = (struct sxg_rcv_data_buffer_hdr *) |
| 3899 | temp_RcvBlock; |
| 3900 | /* For FREE macro assertion */ |
| 3901 | RcvDataBufferHdr->State = SXG_BUFFER_UPSTREAM; |
| 3902 | SXG_ALLOCATE_RCV_PACKET(adapter, RcvDataBufferHdr, BufferSize); |
| 3903 | if (RcvDataBufferHdr->SxgDumbRcvPacket == NULL) |
| 3904 | goto fail; |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 3905 | |
Mithlesh Thukral | d0128aa | 2009-01-05 21:18:04 +0530 | [diff] [blame] | 3906 | } |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3907 | |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 3908 | /* |
| 3909 | * Place this entire block of memory on the AllRcvBlocks queue so it |
| 3910 | * can be free later |
| 3911 | */ |
Mithlesh Thukral | d0128aa | 2009-01-05 21:18:04 +0530 | [diff] [blame] | 3912 | |
| 3913 | RcvBlockHdr = (struct sxg_rcv_block_hdr *) ((unsigned char *)RcvBlock + |
| 3914 | SXG_RCV_BLOCK_HDR_OFFSET(SXG_RCV_DATA_HDR_SIZE)); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3915 | RcvBlockHdr->VirtualAddress = RcvBlock; |
| 3916 | RcvBlockHdr->PhysicalAddress = PhysicalAddress; |
| 3917 | spin_lock(&adapter->RcvQLock); |
| 3918 | adapter->AllRcvBlockCount++; |
| 3919 | InsertTailList(&adapter->AllRcvBlocks, &RcvBlockHdr->AllList); |
| 3920 | spin_unlock(&adapter->RcvQLock); |
| 3921 | |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 3922 | /* Now free the contained receive data buffers that we |
| 3923 | * initialized above */ |
Mithlesh Thukral | d0128aa | 2009-01-05 21:18:04 +0530 | [diff] [blame] | 3924 | temp_RcvBlock = RcvBlock; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3925 | for (i = 0, Paddr = PhysicalAddress; |
| 3926 | i < SXG_RCV_DESCRIPTORS_PER_BLOCK; |
Mithlesh Thukral | d0128aa | 2009-01-05 21:18:04 +0530 | [diff] [blame] | 3927 | i++, Paddr += SXG_RCV_DATA_HDR_SIZE, |
| 3928 | temp_RcvBlock += SXG_RCV_DATA_HDR_SIZE) { |
| 3929 | RcvDataBufferHdr = |
| 3930 | (struct sxg_rcv_data_buffer_hdr *)temp_RcvBlock; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3931 | spin_lock(&adapter->RcvQLock); |
| 3932 | SXG_FREE_RCV_DATA_BUFFER(adapter, RcvDataBufferHdr); |
| 3933 | spin_unlock(&adapter->RcvQLock); |
| 3934 | } |
| 3935 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 3936 | /* Locate the descriptor block and put it on a separate free queue */ |
J.R. Mauro | 5c7514e | 2008-10-05 20:38:52 -0400 | [diff] [blame] | 3937 | RcvDescriptorBlock = |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 3938 | (struct sxg_rcv_descriptor_block *) ((unsigned char *)RcvBlock + |
J.R. Mauro | 5c7514e | 2008-10-05 20:38:52 -0400 | [diff] [blame] | 3939 | SXG_RCV_DESCRIPTOR_BLOCK_OFFSET |
Mithlesh Thukral | d0128aa | 2009-01-05 21:18:04 +0530 | [diff] [blame] | 3940 | (SXG_RCV_DATA_HDR_SIZE)); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3941 | RcvDescriptorBlockHdr = |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 3942 | (struct sxg_rcv_descriptor_block_hdr *) ((unsigned char *)RcvBlock + |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3943 | SXG_RCV_DESCRIPTOR_BLOCK_HDR_OFFSET |
Mithlesh Thukral | d0128aa | 2009-01-05 21:18:04 +0530 | [diff] [blame] | 3944 | (SXG_RCV_DATA_HDR_SIZE)); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3945 | RcvDescriptorBlockHdr->VirtualAddress = RcvDescriptorBlock; |
| 3946 | RcvDescriptorBlockHdr->PhysicalAddress = Paddr; |
| 3947 | spin_lock(&adapter->RcvQLock); |
| 3948 | SXG_FREE_RCV_DESCRIPTOR_BLOCK(adapter, RcvDescriptorBlockHdr); |
| 3949 | spin_unlock(&adapter->RcvQLock); |
| 3950 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "XAlRBlk", |
| 3951 | adapter, RcvBlock, Length, 0); |
Mithlesh Thukral | 0d41472 | 2009-01-19 20:29:59 +0530 | [diff] [blame] | 3952 | return STATUS_SUCCESS; |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 3953 | fail: |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 3954 | /* Free any allocated resources */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3955 | if (RcvBlock) { |
Mithlesh Thukral | d0128aa | 2009-01-05 21:18:04 +0530 | [diff] [blame] | 3956 | temp_RcvBlock = RcvBlock; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3957 | for (i = 0; i < SXG_RCV_DESCRIPTORS_PER_BLOCK; |
Mithlesh Thukral | d0128aa | 2009-01-05 21:18:04 +0530 | [diff] [blame] | 3958 | i++, temp_RcvBlock += SXG_RCV_DATA_HDR_SIZE) { |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3959 | RcvDataBufferHdr = |
Mithlesh Thukral | d0128aa | 2009-01-05 21:18:04 +0530 | [diff] [blame] | 3960 | (struct sxg_rcv_data_buffer_hdr *)temp_RcvBlock; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3961 | SXG_FREE_RCV_PACKET(RcvDataBufferHdr); |
| 3962 | } |
| 3963 | pci_free_consistent(adapter->pcidev, |
| 3964 | Length, RcvBlock, PhysicalAddress); |
| 3965 | } |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 3966 | DBG_ERROR("%s: OUT OF RESOURCES\n", __func__); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3967 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_IMPORTANT, "RcvAFail", |
| 3968 | adapter, adapter->FreeRcvBufferCount, |
| 3969 | adapter->FreeRcvBlockCount, adapter->AllRcvBlockCount); |
| 3970 | adapter->Stats.NoMem++; |
Mithlesh Thukral | 0d41472 | 2009-01-19 20:29:59 +0530 | [diff] [blame] | 3971 | /* As allocation failed, free all previously allocated blocks..*/ |
| 3972 | //sxg_free_rcvblocks(adapter); |
| 3973 | |
| 3974 | return STATUS_RESOURCES; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3975 | } |
| 3976 | |
| 3977 | /* |
| 3978 | * sxg_allocate_sgl_buffer_complete - Complete a SGL buffer allocation |
| 3979 | * |
| 3980 | * Arguments - |
| 3981 | * adapter - A pointer to our adapter structure |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 3982 | * SxgSgl - struct sxg_scatter_gather buffer |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3983 | * PhysicalAddress - Physical address |
| 3984 | * Length - Memory length |
| 3985 | * |
| 3986 | * Return |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3987 | */ |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 3988 | static void sxg_allocate_sgl_buffer_complete(struct adapter_t *adapter, |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 3989 | struct sxg_scatter_gather *SxgSgl, |
J.R. Mauro | 5c7514e | 2008-10-05 20:38:52 -0400 | [diff] [blame] | 3990 | dma_addr_t PhysicalAddress, |
| 3991 | u32 Length) |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3992 | { |
Mithlesh Thukral | d9d578b | 2009-01-19 20:23:22 +0530 | [diff] [blame] | 3993 | unsigned long sgl_flags; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3994 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "AlSglCmp", |
| 3995 | adapter, SxgSgl, Length, 0); |
Mithlesh Thukral | c5e5cf5 | 2009-02-06 19:31:40 +0530 | [diff] [blame] | 3996 | spin_lock_irqsave(&adapter->SglQLock, sgl_flags); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3997 | adapter->AllSglBufferCount++; |
Mithlesh Thukral | d9d578b | 2009-01-19 20:23:22 +0530 | [diff] [blame] | 3998 | /* PhysicalAddress; */ |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 3999 | SxgSgl->PhysicalAddress = PhysicalAddress; |
| 4000 | /* Initialize backpointer once */ |
| 4001 | SxgSgl->adapter = adapter; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4002 | InsertTailList(&adapter->AllSglBuffers, &SxgSgl->AllList); |
Mithlesh Thukral | c5e5cf5 | 2009-02-06 19:31:40 +0530 | [diff] [blame] | 4003 | spin_unlock_irqrestore(&adapter->SglQLock, sgl_flags); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4004 | SxgSgl->State = SXG_BUFFER_BUSY; |
Mithlesh Thukral | c5e5cf5 | 2009-02-06 19:31:40 +0530 | [diff] [blame] | 4005 | SXG_FREE_SGL_BUFFER(adapter, SxgSgl, NULL); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4006 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "XAlSgl", |
| 4007 | adapter, SxgSgl, Length, 0); |
| 4008 | } |
| 4009 | |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4010 | |
Mithlesh Thukral | 54aed11 | 2009-01-19 20:27:17 +0530 | [diff] [blame] | 4011 | static int sxg_adapter_set_hwaddr(struct adapter_t *adapter) |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4012 | { |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 4013 | /* |
| 4014 | * DBG_ERROR ("%s ENTER card->config_set[%x] port[%d] physport[%d] \ |
| 4015 | * funct#[%d]\n", __func__, card->config_set, |
| 4016 | * adapter->port, adapter->physport, adapter->functionnumber); |
| 4017 | * |
| 4018 | * sxg_dbg_macaddrs(adapter); |
| 4019 | */ |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 4020 | /* DBG_ERROR ("%s AFTER copying from config.macinfo into currmacaddr\n", |
| 4021 | * __FUNCTION__); |
| 4022 | */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4023 | |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 4024 | /* sxg_dbg_macaddrs(adapter); */ |
| 4025 | |
Mithlesh Thukral | 6a2946b | 2009-01-19 20:24:30 +0530 | [diff] [blame] | 4026 | struct net_device * dev = adapter->netdev; |
| 4027 | if(!dev) |
| 4028 | { |
| 4029 | printk("sxg: Dev is Null\n"); |
| 4030 | } |
| 4031 | |
| 4032 | DBG_ERROR("%s ENTER (%s)\n", __FUNCTION__, adapter->netdev->name); |
| 4033 | |
| 4034 | if (netif_running(dev)) { |
| 4035 | return -EBUSY; |
| 4036 | } |
| 4037 | if (!adapter) { |
| 4038 | return -EBUSY; |
| 4039 | } |
| 4040 | |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4041 | if (!(adapter->currmacaddr[0] || |
| 4042 | adapter->currmacaddr[1] || |
| 4043 | adapter->currmacaddr[2] || |
| 4044 | adapter->currmacaddr[3] || |
| 4045 | adapter->currmacaddr[4] || adapter->currmacaddr[5])) { |
| 4046 | memcpy(adapter->currmacaddr, adapter->macaddr, 6); |
| 4047 | } |
| 4048 | if (adapter->netdev) { |
| 4049 | memcpy(adapter->netdev->dev_addr, adapter->currmacaddr, 6); |
Mithlesh Thukral | 1323e5f | 2009-01-05 21:13:23 +0530 | [diff] [blame] | 4050 | memcpy(adapter->netdev->perm_addr, adapter->currmacaddr, 6); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4051 | } |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 4052 | /* DBG_ERROR ("%s EXIT port %d\n", __func__, adapter->port); */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4053 | sxg_dbg_macaddrs(adapter); |
| 4054 | |
Mithlesh Thukral | 54aed11 | 2009-01-19 20:27:17 +0530 | [diff] [blame] | 4055 | return 0; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4056 | } |
| 4057 | |
Greg Kroah-Hartman | c6c25ed | 2008-10-21 10:41:45 -0700 | [diff] [blame] | 4058 | #if XXXTODO |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 4059 | static int sxg_mac_set_address(struct net_device *dev, void *ptr) |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4060 | { |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 4061 | struct adapter_t *adapter = (struct adapter_t *) netdev_priv(dev); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4062 | struct sockaddr *addr = ptr; |
| 4063 | |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 4064 | DBG_ERROR("%s ENTER (%s)\n", __func__, adapter->netdev->name); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4065 | |
| 4066 | if (netif_running(dev)) { |
| 4067 | return -EBUSY; |
| 4068 | } |
| 4069 | if (!adapter) { |
| 4070 | return -EBUSY; |
| 4071 | } |
| 4072 | DBG_ERROR("sxg: %s (%s) curr %2.2X:%2.2X:%2.2X:%2.2X:%2.2X:%2.2X\n", |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 4073 | __func__, adapter->netdev->name, adapter->currmacaddr[0], |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4074 | adapter->currmacaddr[1], adapter->currmacaddr[2], |
| 4075 | adapter->currmacaddr[3], adapter->currmacaddr[4], |
| 4076 | adapter->currmacaddr[5]); |
| 4077 | memcpy(dev->dev_addr, addr->sa_data, dev->addr_len); |
| 4078 | memcpy(adapter->currmacaddr, addr->sa_data, dev->addr_len); |
| 4079 | DBG_ERROR("sxg: %s (%s) new %2.2X:%2.2X:%2.2X:%2.2X:%2.2X:%2.2X\n", |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 4080 | __func__, adapter->netdev->name, adapter->currmacaddr[0], |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4081 | adapter->currmacaddr[1], adapter->currmacaddr[2], |
| 4082 | adapter->currmacaddr[3], adapter->currmacaddr[4], |
| 4083 | adapter->currmacaddr[5]); |
| 4084 | |
| 4085 | sxg_config_set(adapter, TRUE); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4086 | return 0; |
| 4087 | } |
Greg Kroah-Hartman | c6c25ed | 2008-10-21 10:41:45 -0700 | [diff] [blame] | 4088 | #endif |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4089 | |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4090 | /* |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 4091 | * SXG DRIVER FUNCTIONS (below) |
| 4092 | * |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4093 | * sxg_initialize_adapter - Initialize adapter |
| 4094 | * |
| 4095 | * Arguments - |
| 4096 | * adapter - A pointer to our adapter structure |
| 4097 | * |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 4098 | * Return - int |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4099 | */ |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 4100 | static int sxg_initialize_adapter(struct adapter_t *adapter) |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4101 | { |
| 4102 | u32 RssIds, IsrCount; |
| 4103 | u32 i; |
| 4104 | int status; |
Mithlesh Thukral | 7c66b14 | 2009-02-06 19:30:40 +0530 | [diff] [blame] | 4105 | int sxg_rcv_ring_size = SXG_RCV_RING_SIZE; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4106 | |
| 4107 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "InitAdpt", |
| 4108 | adapter, 0, 0, 0); |
| 4109 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 4110 | RssIds = 1; /* XXXTODO SXG_RSS_CPU_COUNT(adapter); */ |
Mithlesh Thukral | 1782199f | 2009-02-06 19:32:28 +0530 | [diff] [blame] | 4111 | IsrCount = adapter->msi_enabled ? RssIds : 1; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4112 | |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 4113 | /* |
| 4114 | * Sanity check SXG_UCODE_REGS structure definition to |
| 4115 | * make sure the length is correct |
| 4116 | */ |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 4117 | ASSERT(sizeof(struct sxg_ucode_regs) == SXG_REGISTER_SIZE_PER_CPU); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4118 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 4119 | /* Disable interrupts */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4120 | SXG_DISABLE_ALL_INTERRUPTS(adapter); |
| 4121 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 4122 | /* Set MTU */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4123 | ASSERT((adapter->FrameSize == ETHERMAXFRAME) || |
| 4124 | (adapter->FrameSize == JUMBOMAXFRAME)); |
| 4125 | WRITE_REG(adapter->UcodeRegs[0].LinkMtu, adapter->FrameSize, TRUE); |
| 4126 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 4127 | /* Set event ring base address and size */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4128 | WRITE_REG64(adapter, |
| 4129 | adapter->UcodeRegs[0].EventBase, adapter->PEventRings, 0); |
| 4130 | WRITE_REG(adapter->UcodeRegs[0].EventSize, EVENT_RING_SIZE, TRUE); |
| 4131 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 4132 | /* Per-ISR initialization */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4133 | for (i = 0; i < IsrCount; i++) { |
| 4134 | u64 Addr; |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 4135 | /* Set interrupt status pointer */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4136 | Addr = adapter->PIsr + (i * sizeof(u32)); |
| 4137 | WRITE_REG64(adapter, adapter->UcodeRegs[i].Isp, Addr, i); |
| 4138 | } |
| 4139 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 4140 | /* XMT ring zero index */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4141 | WRITE_REG64(adapter, |
| 4142 | adapter->UcodeRegs[0].SPSendIndex, |
| 4143 | adapter->PXmtRingZeroIndex, 0); |
| 4144 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 4145 | /* Per-RSS initialization */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4146 | for (i = 0; i < RssIds; i++) { |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 4147 | /* Release all event ring entries to the Microcode */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4148 | WRITE_REG(adapter->UcodeRegs[i].EventRelease, EVENT_RING_SIZE, |
| 4149 | TRUE); |
| 4150 | } |
| 4151 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 4152 | /* Transmit ring base and size */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4153 | WRITE_REG64(adapter, |
| 4154 | adapter->UcodeRegs[0].XmtBase, adapter->PXmtRings, 0); |
| 4155 | WRITE_REG(adapter->UcodeRegs[0].XmtSize, SXG_XMT_RING_SIZE, TRUE); |
| 4156 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 4157 | /* Receive ring base and size */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4158 | WRITE_REG64(adapter, |
| 4159 | adapter->UcodeRegs[0].RcvBase, adapter->PRcvRings, 0); |
Mithlesh Thukral | 7c66b14 | 2009-02-06 19:30:40 +0530 | [diff] [blame] | 4160 | if (adapter->JumboEnabled == TRUE) |
| 4161 | sxg_rcv_ring_size = SXG_JUMBO_RCV_RING_SIZE; |
| 4162 | WRITE_REG(adapter->UcodeRegs[0].RcvSize, sxg_rcv_ring_size, TRUE); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4163 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 4164 | /* Populate the card with receive buffers */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4165 | sxg_stock_rcv_buffers(adapter); |
| 4166 | |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 4167 | /* |
| 4168 | * Initialize checksum offload capabilities. At the moment we always |
| 4169 | * enable IP and TCP receive checksums on the card. Depending on the |
| 4170 | * checksum configuration specified by the user, we can choose to |
| 4171 | * report or ignore the checksum information provided by the card. |
| 4172 | */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4173 | WRITE_REG(adapter->UcodeRegs[0].ReceiveChecksum, |
| 4174 | SXG_RCV_TCP_CSUM_ENABLED | SXG_RCV_IP_CSUM_ENABLED, TRUE); |
| 4175 | |
Mithlesh Thukral | 9914f05 | 2009-02-18 18:51:29 +0530 | [diff] [blame] | 4176 | adapter->flags |= (SXG_RCV_TCP_CSUM_ENABLED | SXG_RCV_IP_CSUM_ENABLED ); |
| 4177 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 4178 | /* Initialize the MAC, XAUI */ |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 4179 | DBG_ERROR("sxg: %s ENTER sxg_initialize_link\n", __func__); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4180 | status = sxg_initialize_link(adapter); |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 4181 | DBG_ERROR("sxg: %s EXIT sxg_initialize_link status[%x]\n", __func__, |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4182 | status); |
| 4183 | if (status != STATUS_SUCCESS) { |
| 4184 | return (status); |
| 4185 | } |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 4186 | /* |
| 4187 | * Initialize Dead to FALSE. |
| 4188 | * SlicCheckForHang or SlicDumpThread will take it from here. |
| 4189 | */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4190 | adapter->Dead = FALSE; |
| 4191 | adapter->PingOutstanding = FALSE; |
Mithlesh Thukral | a536efc | 2009-02-18 18:54:14 +0530 | [diff] [blame] | 4192 | adapter->XmtFcEnabled = TRUE; |
| 4193 | adapter->RcvFcEnabled = TRUE; |
| 4194 | |
Mithlesh Thukral | 1323e5f | 2009-01-05 21:13:23 +0530 | [diff] [blame] | 4195 | adapter->State = SXG_STATE_RUNNING; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4196 | |
| 4197 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "XInit", |
| 4198 | adapter, 0, 0, 0); |
| 4199 | return (STATUS_SUCCESS); |
| 4200 | } |
| 4201 | |
| 4202 | /* |
| 4203 | * sxg_fill_descriptor_block - Populate a descriptor block and give it to |
| 4204 | * the card. The caller should hold the RcvQLock |
| 4205 | * |
| 4206 | * Arguments - |
| 4207 | * adapter - A pointer to our adapter structure |
| 4208 | * RcvDescriptorBlockHdr - Descriptor block to fill |
| 4209 | * |
| 4210 | * Return |
| 4211 | * status |
| 4212 | */ |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 4213 | static int sxg_fill_descriptor_block(struct adapter_t *adapter, |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 4214 | struct sxg_rcv_descriptor_block_hdr *RcvDescriptorBlockHdr) |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4215 | { |
| 4216 | u32 i; |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 4217 | struct sxg_ring_info *RcvRingInfo = &adapter->RcvRingZeroInfo; |
| 4218 | struct sxg_rcv_data_buffer_hdr *RcvDataBufferHdr; |
| 4219 | struct sxg_rcv_descriptor_block *RcvDescriptorBlock; |
| 4220 | struct sxg_cmd *RingDescriptorCmd; |
| 4221 | struct sxg_rcv_ring *RingZero = &adapter->RcvRings[0]; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4222 | |
| 4223 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "FilBlk", |
| 4224 | adapter, adapter->RcvBuffersOnCard, |
| 4225 | adapter->FreeRcvBufferCount, adapter->AllRcvBlockCount); |
| 4226 | |
| 4227 | ASSERT(RcvDescriptorBlockHdr); |
| 4228 | |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 4229 | /* |
| 4230 | * If we don't have the resources to fill the descriptor block, |
| 4231 | * return failure |
| 4232 | */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4233 | if ((adapter->FreeRcvBufferCount < SXG_RCV_DESCRIPTORS_PER_BLOCK) || |
| 4234 | SXG_RING_FULL(RcvRingInfo)) { |
| 4235 | adapter->Stats.NoMem++; |
| 4236 | return (STATUS_FAILURE); |
| 4237 | } |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 4238 | /* Get a ring descriptor command */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4239 | SXG_GET_CMD(RingZero, |
| 4240 | RcvRingInfo, RingDescriptorCmd, RcvDescriptorBlockHdr); |
| 4241 | ASSERT(RingDescriptorCmd); |
| 4242 | RcvDescriptorBlockHdr->State = SXG_BUFFER_ONCARD; |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 4243 | RcvDescriptorBlock = (struct sxg_rcv_descriptor_block *) |
| 4244 | RcvDescriptorBlockHdr->VirtualAddress; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4245 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 4246 | /* Fill in the descriptor block */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4247 | for (i = 0; i < SXG_RCV_DESCRIPTORS_PER_BLOCK; i++) { |
| 4248 | SXG_GET_RCV_DATA_BUFFER(adapter, RcvDataBufferHdr); |
| 4249 | ASSERT(RcvDataBufferHdr); |
Mithlesh Thukral | 6a2946b | 2009-01-19 20:24:30 +0530 | [diff] [blame] | 4250 | // ASSERT(RcvDataBufferHdr->SxgDumbRcvPacket); |
Mithlesh Thukral | d9d578b | 2009-01-19 20:23:22 +0530 | [diff] [blame] | 4251 | if (!RcvDataBufferHdr->SxgDumbRcvPacket) { |
| 4252 | SXG_ALLOCATE_RCV_PACKET(adapter, RcvDataBufferHdr, |
| 4253 | adapter->ReceiveBufferSize); |
| 4254 | if(RcvDataBufferHdr->skb) |
| 4255 | RcvDataBufferHdr->SxgDumbRcvPacket = |
| 4256 | RcvDataBufferHdr->skb; |
| 4257 | else |
| 4258 | goto no_memory; |
| 4259 | } |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4260 | SXG_REINIATIALIZE_PACKET(RcvDataBufferHdr->SxgDumbRcvPacket); |
| 4261 | RcvDataBufferHdr->State = SXG_BUFFER_ONCARD; |
J.R. Mauro | 5c7514e | 2008-10-05 20:38:52 -0400 | [diff] [blame] | 4262 | RcvDescriptorBlock->Descriptors[i].VirtualAddress = |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 4263 | (void *)RcvDataBufferHdr; |
Mithlesh Thukral | 1323e5f | 2009-01-05 21:13:23 +0530 | [diff] [blame] | 4264 | |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4265 | RcvDescriptorBlock->Descriptors[i].PhysicalAddress = |
| 4266 | RcvDataBufferHdr->PhysicalAddress; |
| 4267 | } |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 4268 | /* Add the descriptor block to receive descriptor ring 0 */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4269 | RingDescriptorCmd->Sgl = RcvDescriptorBlockHdr->PhysicalAddress; |
| 4270 | |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 4271 | /* |
| 4272 | * RcvBuffersOnCard is not protected via the receive lock (see |
| 4273 | * sxg_process_event_queue) We don't want to grap a lock every time a |
| 4274 | * buffer is returned to us, so we use atomic interlocked functions |
| 4275 | * instead. |
| 4276 | */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4277 | adapter->RcvBuffersOnCard += SXG_RCV_DESCRIPTORS_PER_BLOCK; |
| 4278 | |
| 4279 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "DscBlk", |
| 4280 | RcvDescriptorBlockHdr, |
| 4281 | RingDescriptorCmd, RcvRingInfo->Head, RcvRingInfo->Tail); |
| 4282 | |
| 4283 | WRITE_REG(adapter->UcodeRegs[0].RcvCmd, 1, true); |
| 4284 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "XFilBlk", |
| 4285 | adapter, adapter->RcvBuffersOnCard, |
| 4286 | adapter->FreeRcvBufferCount, adapter->AllRcvBlockCount); |
| 4287 | return (STATUS_SUCCESS); |
Mithlesh Thukral | d9d578b | 2009-01-19 20:23:22 +0530 | [diff] [blame] | 4288 | no_memory: |
Mithlesh Thukral | b9d1081 | 2009-02-18 18:52:18 +0530 | [diff] [blame] | 4289 | for (; i >= 0 ; i--) { |
| 4290 | if (RcvDescriptorBlock->Descriptors[i].VirtualAddress) { |
| 4291 | RcvDataBufferHdr = (struct sxg_rcv_data_buffer_hdr *) |
| 4292 | RcvDescriptorBlock->Descriptors[i]. |
| 4293 | VirtualAddress; |
| 4294 | RcvDescriptorBlock->Descriptors[i].PhysicalAddress = |
| 4295 | (dma_addr_t)NULL; |
| 4296 | RcvDescriptorBlock->Descriptors[i].VirtualAddress=NULL; |
| 4297 | } |
| 4298 | SXG_FREE_RCV_DATA_BUFFER(adapter, RcvDataBufferHdr); |
| 4299 | } |
| 4300 | RcvDescriptorBlockHdr->State = SXG_BUFFER_FREE; |
| 4301 | SXG_RETURN_CMD(RingZero, RcvRingInfo, RingDescriptorCmd, |
| 4302 | RcvDescriptorBlockHdr); |
| 4303 | |
Mithlesh Thukral | d9d578b | 2009-01-19 20:23:22 +0530 | [diff] [blame] | 4304 | return (-ENOMEM); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4305 | } |
| 4306 | |
| 4307 | /* |
| 4308 | * sxg_stock_rcv_buffers - Stock the card with receive buffers |
| 4309 | * |
| 4310 | * Arguments - |
| 4311 | * adapter - A pointer to our adapter structure |
| 4312 | * |
| 4313 | * Return |
| 4314 | * None |
| 4315 | */ |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 4316 | static void sxg_stock_rcv_buffers(struct adapter_t *adapter) |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4317 | { |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 4318 | struct sxg_rcv_descriptor_block_hdr *RcvDescriptorBlockHdr; |
Mithlesh Thukral | 7c66b14 | 2009-02-06 19:30:40 +0530 | [diff] [blame] | 4319 | int sxg_rcv_data_buffers = SXG_RCV_DATA_BUFFERS; |
| 4320 | int sxg_min_rcv_data_buffers = SXG_MIN_RCV_DATA_BUFFERS; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4321 | |
| 4322 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "StockBuf", |
| 4323 | adapter, adapter->RcvBuffersOnCard, |
| 4324 | adapter->FreeRcvBufferCount, adapter->AllRcvBlockCount); |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 4325 | /* |
| 4326 | * First, see if we've got less than our minimum threshold of |
| 4327 | * receive buffers, there isn't an allocation in progress, and |
| 4328 | * we haven't exceeded our maximum.. get another block of buffers |
| 4329 | * None of this needs to be SMP safe. It's round numbers. |
| 4330 | */ |
Mithlesh Thukral | 7c66b14 | 2009-02-06 19:30:40 +0530 | [diff] [blame] | 4331 | if (adapter->JumboEnabled == TRUE) |
| 4332 | sxg_min_rcv_data_buffers = SXG_MIN_JUMBO_RCV_DATA_BUFFERS; |
| 4333 | if ((adapter->FreeRcvBufferCount < sxg_min_rcv_data_buffers) && |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4334 | (adapter->AllRcvBlockCount < SXG_MAX_RCV_BLOCKS) && |
Mithlesh Thukral | 6a2946b | 2009-01-19 20:24:30 +0530 | [diff] [blame] | 4335 | (atomic_read(&adapter->pending_allocations) == 0)) { |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4336 | sxg_allocate_buffer_memory(adapter, |
Mithlesh Thukral | d0128aa | 2009-01-05 21:18:04 +0530 | [diff] [blame] | 4337 | SXG_RCV_BLOCK_SIZE |
| 4338 | (SXG_RCV_DATA_HDR_SIZE), |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4339 | SXG_BUFFER_TYPE_RCV); |
| 4340 | } |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 4341 | /* Now grab the RcvQLock lock and proceed */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4342 | spin_lock(&adapter->RcvQLock); |
Mithlesh Thukral | 7c66b14 | 2009-02-06 19:30:40 +0530 | [diff] [blame] | 4343 | if (adapter->JumboEnabled) |
| 4344 | sxg_rcv_data_buffers = SXG_JUMBO_RCV_DATA_BUFFERS; |
| 4345 | while (adapter->RcvBuffersOnCard < sxg_rcv_data_buffers) { |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 4346 | struct list_entry *_ple; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4347 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 4348 | /* Get a descriptor block */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4349 | RcvDescriptorBlockHdr = NULL; |
| 4350 | if (adapter->FreeRcvBlockCount) { |
| 4351 | _ple = RemoveHeadList(&adapter->FreeRcvBlocks); |
J.R. Mauro | 5c7514e | 2008-10-05 20:38:52 -0400 | [diff] [blame] | 4352 | RcvDescriptorBlockHdr = |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 4353 | container_of(_ple, struct sxg_rcv_descriptor_block_hdr, |
J.R. Mauro | 5c7514e | 2008-10-05 20:38:52 -0400 | [diff] [blame] | 4354 | FreeList); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4355 | adapter->FreeRcvBlockCount--; |
| 4356 | RcvDescriptorBlockHdr->State = SXG_BUFFER_BUSY; |
| 4357 | } |
| 4358 | |
| 4359 | if (RcvDescriptorBlockHdr == NULL) { |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 4360 | /* Bail out.. */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4361 | adapter->Stats.NoMem++; |
| 4362 | break; |
| 4363 | } |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 4364 | /* Fill in the descriptor block and give it to the card */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4365 | if (sxg_fill_descriptor_block(adapter, RcvDescriptorBlockHdr) == |
| 4366 | STATUS_FAILURE) { |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 4367 | /* Free the descriptor block */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4368 | SXG_FREE_RCV_DESCRIPTOR_BLOCK(adapter, |
| 4369 | RcvDescriptorBlockHdr); |
| 4370 | break; |
| 4371 | } |
| 4372 | } |
| 4373 | spin_unlock(&adapter->RcvQLock); |
| 4374 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "XFilBlks", |
| 4375 | adapter, adapter->RcvBuffersOnCard, |
| 4376 | adapter->FreeRcvBufferCount, adapter->AllRcvBlockCount); |
| 4377 | } |
| 4378 | |
| 4379 | /* |
| 4380 | * sxg_complete_descriptor_blocks - Return descriptor blocks that have been |
| 4381 | * completed by the microcode |
| 4382 | * |
| 4383 | * Arguments - |
| 4384 | * adapter - A pointer to our adapter structure |
| 4385 | * Index - Where the microcode is up to |
| 4386 | * |
| 4387 | * Return |
| 4388 | * None |
| 4389 | */ |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 4390 | static void sxg_complete_descriptor_blocks(struct adapter_t *adapter, |
J.R. Mauro | 5c7514e | 2008-10-05 20:38:52 -0400 | [diff] [blame] | 4391 | unsigned char Index) |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4392 | { |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 4393 | struct sxg_rcv_ring *RingZero = &adapter->RcvRings[0]; |
| 4394 | struct sxg_ring_info *RcvRingInfo = &adapter->RcvRingZeroInfo; |
| 4395 | struct sxg_rcv_descriptor_block_hdr *RcvDescriptorBlockHdr; |
| 4396 | struct sxg_cmd *RingDescriptorCmd; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4397 | |
| 4398 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "CmpRBlks", |
| 4399 | adapter, Index, RcvRingInfo->Head, RcvRingInfo->Tail); |
| 4400 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 4401 | /* Now grab the RcvQLock lock and proceed */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4402 | spin_lock(&adapter->RcvQLock); |
| 4403 | ASSERT(Index != RcvRingInfo->Tail); |
Mithlesh Thukral | d9d578b | 2009-01-19 20:23:22 +0530 | [diff] [blame] | 4404 | while (sxg_ring_get_forward_diff(RcvRingInfo, Index, |
| 4405 | RcvRingInfo->Tail) > 3) { |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 4406 | /* |
| 4407 | * Locate the current Cmd (ring descriptor entry), and |
| 4408 | * associated receive descriptor block, and advance |
| 4409 | * the tail |
| 4410 | */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4411 | SXG_RETURN_CMD(RingZero, |
| 4412 | RcvRingInfo, |
| 4413 | RingDescriptorCmd, RcvDescriptorBlockHdr); |
| 4414 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "CmpRBlk", |
| 4415 | RcvRingInfo->Head, RcvRingInfo->Tail, |
| 4416 | RingDescriptorCmd, RcvDescriptorBlockHdr); |
| 4417 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 4418 | /* Clear the SGL field */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4419 | RingDescriptorCmd->Sgl = 0; |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 4420 | /* |
| 4421 | * Attempt to refill it and hand it right back to the |
| 4422 | * card. If we fail to refill it, free the descriptor block |
| 4423 | * header. The card will be restocked later via the |
| 4424 | * RcvBuffersOnCard test |
| 4425 | */ |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 4426 | if (sxg_fill_descriptor_block(adapter, |
| 4427 | RcvDescriptorBlockHdr) == STATUS_FAILURE) |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4428 | SXG_FREE_RCV_DESCRIPTOR_BLOCK(adapter, |
| 4429 | RcvDescriptorBlockHdr); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4430 | } |
| 4431 | spin_unlock(&adapter->RcvQLock); |
| 4432 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "XCRBlks", |
| 4433 | adapter, Index, RcvRingInfo->Head, RcvRingInfo->Tail); |
| 4434 | } |
| 4435 | |
Mithlesh Thukral | d9d578b | 2009-01-19 20:23:22 +0530 | [diff] [blame] | 4436 | /* |
| 4437 | * Read the statistics which the card has been maintaining. |
| 4438 | */ |
| 4439 | void sxg_collect_statistics(struct adapter_t *adapter) |
| 4440 | { |
| 4441 | if(adapter->ucode_stats) |
Mithlesh Thukral | 54aed11 | 2009-01-19 20:27:17 +0530 | [diff] [blame] | 4442 | WRITE_REG64(adapter, adapter->UcodeRegs[0].GetUcodeStats, |
| 4443 | adapter->pucode_stats, 0); |
Mithlesh Thukral | 6a2946b | 2009-01-19 20:24:30 +0530 | [diff] [blame] | 4444 | adapter->stats.rx_fifo_errors = adapter->ucode_stats->ERDrops; |
| 4445 | adapter->stats.rx_over_errors = adapter->ucode_stats->NBDrops; |
| 4446 | adapter->stats.tx_fifo_errors = adapter->ucode_stats->XDrops; |
| 4447 | } |
| 4448 | |
| 4449 | static struct net_device_stats *sxg_get_stats(struct net_device * dev) |
| 4450 | { |
| 4451 | struct adapter_t *adapter = netdev_priv(dev); |
| 4452 | |
| 4453 | sxg_collect_statistics(adapter); |
| 4454 | return (&adapter->stats); |
Mithlesh Thukral | d9d578b | 2009-01-19 20:23:22 +0530 | [diff] [blame] | 4455 | } |
| 4456 | |
Mithlesh Thukral | e5ea8da | 2009-03-20 17:37:32 +0530 | [diff] [blame^] | 4457 | static void sxg_watchdog(unsigned long data) |
| 4458 | { |
| 4459 | struct adapter_t *adapter = (struct adapter_t *) data; |
| 4460 | |
| 4461 | if (adapter->state != ADAPT_DOWN) { |
| 4462 | sxg_link_event(adapter); |
| 4463 | /* Reset the timer */ |
| 4464 | mod_timer(&adapter->watchdog_timer, round_jiffies(jiffies + 2 * HZ)); |
| 4465 | } |
| 4466 | } |
| 4467 | |
| 4468 | static void sxg_update_link_status (struct work_struct *work) |
| 4469 | { |
| 4470 | struct adapter_t *adapter = (struct adapter_t *)container_of |
| 4471 | (work, struct adapter_t, update_link_status); |
| 4472 | if (likely(adapter->link_status_changed)) { |
| 4473 | sxg_link_event(adapter); |
| 4474 | adapter->link_status_changed = 0; |
| 4475 | } |
| 4476 | } |
| 4477 | |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4478 | static struct pci_driver sxg_driver = { |
Mithlesh Thukral | 371d7a9 | 2009-01-19 20:22:34 +0530 | [diff] [blame] | 4479 | .name = sxg_driver_name, |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4480 | .id_table = sxg_pci_tbl, |
| 4481 | .probe = sxg_entry_probe, |
| 4482 | .remove = sxg_entry_remove, |
| 4483 | #if SXG_POWER_MANAGEMENT_ENABLED |
| 4484 | .suspend = sxgpm_suspend, |
| 4485 | .resume = sxgpm_resume, |
| 4486 | #endif |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 4487 | /* .shutdown = slic_shutdown, MOOK_INVESTIGATE */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4488 | }; |
| 4489 | |
| 4490 | static int __init sxg_module_init(void) |
| 4491 | { |
| 4492 | sxg_init_driver(); |
| 4493 | |
| 4494 | if (debug >= 0) |
| 4495 | sxg_debug = debug; |
| 4496 | |
| 4497 | return pci_register_driver(&sxg_driver); |
| 4498 | } |
| 4499 | |
| 4500 | static void __exit sxg_module_cleanup(void) |
| 4501 | { |
| 4502 | pci_unregister_driver(&sxg_driver); |
| 4503 | } |
| 4504 | |
| 4505 | module_init(sxg_module_init); |
| 4506 | module_exit(sxg_module_cleanup); |