Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1 | /* |
| 2 | * Intel IO-APIC support for multi-Pentium hosts. |
| 3 | * |
Ingo Molnar | 8f47e16 | 2009-01-31 02:03:42 +0100 | [diff] [blame] | 4 | * Copyright (C) 1997, 1998, 1999, 2000, 2009 Ingo Molnar, Hajnalka Szabo |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5 | * |
| 6 | * Many thanks to Stig Venaas for trying out countless experimental |
| 7 | * patches and reporting/debugging problems patiently! |
| 8 | * |
| 9 | * (c) 1999, Multiple IO-APIC support, developed by |
| 10 | * Ken-ichi Yaku <yaku@css1.kbnes.nec.co.jp> and |
| 11 | * Hidemi Kishimoto <kisimoto@css1.kbnes.nec.co.jp>, |
| 12 | * further tested and cleaned up by Zach Brown <zab@redhat.com> |
| 13 | * and Ingo Molnar <mingo@redhat.com> |
| 14 | * |
| 15 | * Fixes |
| 16 | * Maciej W. Rozycki : Bits for genuine 82489DX APICs; |
| 17 | * thanks to Eric Gilmore |
| 18 | * and Rolf G. Tews |
| 19 | * for testing these extensively |
| 20 | * Paul Diefenbaugh : Added full ACPI support |
| 21 | */ |
| 22 | |
| 23 | #include <linux/mm.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 24 | #include <linux/interrupt.h> |
| 25 | #include <linux/init.h> |
| 26 | #include <linux/delay.h> |
| 27 | #include <linux/sched.h> |
Yinghai Lu | d4057bd | 2008-08-19 20:50:38 -0700 | [diff] [blame] | 28 | #include <linux/pci.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 29 | #include <linux/mc146818rtc.h> |
| 30 | #include <linux/compiler.h> |
| 31 | #include <linux/acpi.h> |
Alexey Dobriyan | 129f694 | 2005-06-23 00:08:33 -0700 | [diff] [blame] | 32 | #include <linux/module.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 33 | #include <linux/sysdev.h> |
Eric W. Biederman | 3b7d192 | 2006-10-04 02:16:59 -0700 | [diff] [blame] | 34 | #include <linux/msi.h> |
Eric W. Biederman | 95d7788 | 2006-10-04 02:17:01 -0700 | [diff] [blame] | 35 | #include <linux/htirq.h> |
Nigel Cunningham | 7dfb710 | 2006-12-06 20:34:23 -0800 | [diff] [blame] | 36 | #include <linux/freezer.h> |
Eric W. Biederman | f26d6a2 | 2007-05-02 19:27:19 +0200 | [diff] [blame] | 37 | #include <linux/kthread.h> |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 38 | #include <linux/jiffies.h> /* time_after() */ |
Yinghai Lu | d4057bd | 2008-08-19 20:50:38 -0700 | [diff] [blame] | 39 | #ifdef CONFIG_ACPI |
| 40 | #include <acpi/acpi_bus.h> |
| 41 | #endif |
| 42 | #include <linux/bootmem.h> |
| 43 | #include <linux/dmar.h> |
venkatesh.pallipadi@intel.com | 58ac1e7 | 2008-09-05 18:02:17 -0700 | [diff] [blame] | 44 | #include <linux/hpet.h> |
Ashok Raj | 54d5d42 | 2005-09-06 15:16:15 -0700 | [diff] [blame] | 45 | |
Yinghai Lu | d4057bd | 2008-08-19 20:50:38 -0700 | [diff] [blame] | 46 | #include <asm/idle.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 47 | #include <asm/io.h> |
| 48 | #include <asm/smp.h> |
Jaswinder Singh Rajput | 6d652ea | 2009-01-07 21:38:59 +0530 | [diff] [blame] | 49 | #include <asm/cpu.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 50 | #include <asm/desc.h> |
Yinghai Lu | d4057bd | 2008-08-19 20:50:38 -0700 | [diff] [blame] | 51 | #include <asm/proto.h> |
| 52 | #include <asm/acpi.h> |
| 53 | #include <asm/dma.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 54 | #include <asm/timer.h> |
Ingo Molnar | 306e440 | 2005-06-30 02:58:55 -0700 | [diff] [blame] | 55 | #include <asm/i8259.h> |
Don Zickus | 3e4ff11 | 2006-06-26 13:57:01 +0200 | [diff] [blame] | 56 | #include <asm/nmi.h> |
Eric W. Biederman | 2d3fcc1 | 2006-10-04 02:16:43 -0700 | [diff] [blame] | 57 | #include <asm/msidef.h> |
Eric W. Biederman | 8b955b0 | 2006-10-04 02:16:55 -0700 | [diff] [blame] | 58 | #include <asm/hypertransport.h> |
Yinghai Lu | a4dbc34 | 2008-07-25 02:14:28 -0700 | [diff] [blame] | 59 | #include <asm/setup.h> |
Yinghai Lu | d4057bd | 2008-08-19 20:50:38 -0700 | [diff] [blame] | 60 | #include <asm/irq_remapping.h> |
venkatesh.pallipadi@intel.com | 58ac1e7 | 2008-09-05 18:02:17 -0700 | [diff] [blame] | 61 | #include <asm/hpet.h> |
Jaswinder Singh Rajput | 2c1b284 | 2009-04-11 00:03:10 +0530 | [diff] [blame] | 62 | #include <asm/hw_irq.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 63 | |
Ingo Molnar | 7b6aa33 | 2009-02-17 13:58:15 +0100 | [diff] [blame] | 64 | #include <asm/apic.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 65 | |
Maciej W. Rozycki | 32f71af | 2008-07-21 00:52:49 +0100 | [diff] [blame] | 66 | #define __apicdebuginit(type) static type __init |
Cyrill Gorcunov | 2977fb3 | 2009-08-01 11:47:59 +0400 | [diff] [blame] | 67 | #define for_each_irq_pin(entry, head) \ |
| 68 | for (entry = head; entry; entry = entry->next) |
Maciej W. Rozycki | 32f71af | 2008-07-21 00:52:49 +0100 | [diff] [blame] | 69 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 70 | /* |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 71 | * Is the SiS APIC rmw bug present ? |
| 72 | * -1 = don't know, 0 = no, 1 = yes |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 73 | */ |
| 74 | int sis_apic_bug = -1; |
| 75 | |
Thomas Gleixner | dade771 | 2009-07-25 18:39:36 +0200 | [diff] [blame] | 76 | static DEFINE_RAW_SPINLOCK(ioapic_lock); |
| 77 | static DEFINE_RAW_SPINLOCK(vector_lock); |
Yinghai Lu | efa2559 | 2008-08-19 20:50:36 -0700 | [diff] [blame] | 78 | |
Yinghai Lu | efa2559 | 2008-08-19 20:50:36 -0700 | [diff] [blame] | 79 | /* |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 80 | * # of IRQ routing registers |
| 81 | */ |
| 82 | int nr_ioapic_registers[MAX_IO_APICS]; |
| 83 | |
Alexey Starikovskiy | 9f640cc | 2008-04-04 23:41:13 +0400 | [diff] [blame] | 84 | /* I/O APIC entries */ |
Jaswinder Singh Rajput | b5ba7e6 | 2009-01-12 17:46:17 +0530 | [diff] [blame] | 85 | struct mpc_ioapic mp_ioapics[MAX_IO_APICS]; |
Alexey Starikovskiy | 9f640cc | 2008-04-04 23:41:13 +0400 | [diff] [blame] | 86 | int nr_ioapics; |
| 87 | |
Feng Tang | 2a4ab64 | 2009-07-07 23:01:15 -0400 | [diff] [blame] | 88 | /* IO APIC gsi routing info */ |
| 89 | struct mp_ioapic_gsi mp_gsi_routing[MAX_IO_APICS]; |
| 90 | |
Alexey Starikovskiy | 584f734 | 2008-04-04 23:41:32 +0400 | [diff] [blame] | 91 | /* MP IRQ source entries */ |
Jaswinder Singh Rajput | c2c2174 | 2009-01-12 17:47:22 +0530 | [diff] [blame] | 92 | struct mpc_intsrc mp_irqs[MAX_IRQ_SOURCES]; |
Alexey Starikovskiy | 584f734 | 2008-04-04 23:41:32 +0400 | [diff] [blame] | 93 | |
| 94 | /* # of MP IRQ source entries */ |
| 95 | int mp_irq_entries; |
| 96 | |
Thomas Gleixner | bc07844 | 2009-08-29 18:09:57 +0200 | [diff] [blame] | 97 | /* GSI interrupts */ |
| 98 | static int nr_irqs_gsi = NR_IRQS_LEGACY; |
| 99 | |
Alexey Starikovskiy | 8732fc4 | 2008-05-19 19:47:16 +0400 | [diff] [blame] | 100 | #if defined (CONFIG_MCA) || defined (CONFIG_EISA) |
| 101 | int mp_bus_id_to_type[MAX_MP_BUSSES]; |
| 102 | #endif |
| 103 | |
| 104 | DECLARE_BITMAP(mp_bus_not_pci, MAX_MP_BUSSES); |
| 105 | |
Yinghai Lu | efa2559 | 2008-08-19 20:50:36 -0700 | [diff] [blame] | 106 | int skip_ioapic_setup; |
| 107 | |
Ingo Molnar | 65a4e57 | 2009-01-31 03:36:17 +0100 | [diff] [blame] | 108 | void arch_disable_smp_support(void) |
| 109 | { |
| 110 | #ifdef CONFIG_PCI |
| 111 | noioapicquirk = 1; |
| 112 | noioapicreroute = -1; |
| 113 | #endif |
| 114 | skip_ioapic_setup = 1; |
| 115 | } |
| 116 | |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 117 | static int __init parse_noapic(char *str) |
Yinghai Lu | efa2559 | 2008-08-19 20:50:36 -0700 | [diff] [blame] | 118 | { |
| 119 | /* disable IO-APIC */ |
Ingo Molnar | 65a4e57 | 2009-01-31 03:36:17 +0100 | [diff] [blame] | 120 | arch_disable_smp_support(); |
Yinghai Lu | efa2559 | 2008-08-19 20:50:36 -0700 | [diff] [blame] | 121 | return 0; |
| 122 | } |
| 123 | early_param("noapic", parse_noapic); |
Chuck Ebbert | 66759a0 | 2005-09-12 18:49:25 +0200 | [diff] [blame] | 124 | |
Yinghai Lu | 0f978f4 | 2008-08-19 20:50:26 -0700 | [diff] [blame] | 125 | struct irq_pin_list { |
| 126 | int apic, pin; |
| 127 | struct irq_pin_list *next; |
| 128 | }; |
Yinghai Lu | 301e619 | 2008-08-19 20:50:02 -0700 | [diff] [blame] | 129 | |
Yinghai Lu | 85ac16d | 2009-04-27 18:00:38 -0700 | [diff] [blame] | 130 | static struct irq_pin_list *get_one_free_irq_2_pin(int node) |
Yinghai Lu | 0f978f4 | 2008-08-19 20:50:26 -0700 | [diff] [blame] | 131 | { |
Yinghai Lu | 0b8f1ef | 2008-12-05 18:58:31 -0800 | [diff] [blame] | 132 | struct irq_pin_list *pin; |
Yinghai Lu | 0f978f4 | 2008-08-19 20:50:26 -0700 | [diff] [blame] | 133 | |
Yinghai Lu | 0b8f1ef | 2008-12-05 18:58:31 -0800 | [diff] [blame] | 134 | pin = kzalloc_node(sizeof(*pin), GFP_ATOMIC, node); |
Yinghai Lu | 0f978f4 | 2008-08-19 20:50:26 -0700 | [diff] [blame] | 135 | |
Yinghai Lu | 0f978f4 | 2008-08-19 20:50:26 -0700 | [diff] [blame] | 136 | return pin; |
| 137 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 138 | |
Yinghai Lu | 0b8f1ef | 2008-12-05 18:58:31 -0800 | [diff] [blame] | 139 | /* irq_cfg is indexed by the sum of all RTEs in all I/O APICs. */ |
| 140 | #ifdef CONFIG_SPARSE_IRQ |
Suresh Siddha | 9794339 | 2010-01-19 12:20:54 -0800 | [diff] [blame] | 141 | static struct irq_cfg irq_cfgx[NR_IRQS_LEGACY]; |
Yinghai Lu | 0b8f1ef | 2008-12-05 18:58:31 -0800 | [diff] [blame] | 142 | #else |
Suresh Siddha | 9794339 | 2010-01-19 12:20:54 -0800 | [diff] [blame] | 143 | static struct irq_cfg irq_cfgx[NR_IRQS]; |
Yinghai Lu | 0b8f1ef | 2008-12-05 18:58:31 -0800 | [diff] [blame] | 144 | #endif |
Yinghai Lu | 0b8f1ef | 2008-12-05 18:58:31 -0800 | [diff] [blame] | 145 | |
Thomas Gleixner | bc07844 | 2009-08-29 18:09:57 +0200 | [diff] [blame] | 146 | void __init io_apic_disable_legacy(void) |
| 147 | { |
| 148 | nr_legacy_irqs = 0; |
| 149 | nr_irqs_gsi = 0; |
| 150 | } |
| 151 | |
Yinghai Lu | 13a0c3c | 2008-12-26 02:05:47 -0800 | [diff] [blame] | 152 | int __init arch_early_irq_init(void) |
Yinghai Lu | 0b8f1ef | 2008-12-05 18:58:31 -0800 | [diff] [blame] | 153 | { |
| 154 | struct irq_cfg *cfg; |
| 155 | struct irq_desc *desc; |
| 156 | int count; |
Yinghai Lu | dad213ae | 2009-05-28 18:14:40 -0700 | [diff] [blame] | 157 | int node; |
Yinghai Lu | 0b8f1ef | 2008-12-05 18:58:31 -0800 | [diff] [blame] | 158 | int i; |
| 159 | |
| 160 | cfg = irq_cfgx; |
| 161 | count = ARRAY_SIZE(irq_cfgx); |
Yinghai Lu | dad213ae | 2009-05-28 18:14:40 -0700 | [diff] [blame] | 162 | node= cpu_to_node(boot_cpu_id); |
Yinghai Lu | 0b8f1ef | 2008-12-05 18:58:31 -0800 | [diff] [blame] | 163 | |
| 164 | for (i = 0; i < count; i++) { |
| 165 | desc = irq_to_desc(i); |
| 166 | desc->chip_data = &cfg[i]; |
Yinghai Lu | 12274e9 | 2009-06-11 15:07:48 -0700 | [diff] [blame] | 167 | zalloc_cpumask_var_node(&cfg[i].domain, GFP_NOWAIT, node); |
| 168 | zalloc_cpumask_var_node(&cfg[i].old_domain, GFP_NOWAIT, node); |
Suresh Siddha | 9794339 | 2010-01-19 12:20:54 -0800 | [diff] [blame] | 169 | /* |
| 170 | * For legacy IRQ's, start with assigning irq0 to irq15 to |
| 171 | * IRQ0_VECTOR to IRQ15_VECTOR on cpu 0. |
| 172 | */ |
| 173 | if (i < nr_legacy_irqs) { |
| 174 | cfg[i].vector = IRQ0_VECTOR + i; |
| 175 | cpumask_set_cpu(0, cfg[i].domain); |
| 176 | } |
Yinghai Lu | 0b8f1ef | 2008-12-05 18:58:31 -0800 | [diff] [blame] | 177 | } |
Yinghai Lu | 13a0c3c | 2008-12-26 02:05:47 -0800 | [diff] [blame] | 178 | |
| 179 | return 0; |
Yinghai Lu | 0b8f1ef | 2008-12-05 18:58:31 -0800 | [diff] [blame] | 180 | } |
| 181 | |
| 182 | #ifdef CONFIG_SPARSE_IRQ |
Dimitri Sivanich | 9338ad6 | 2009-10-13 15:32:36 -0500 | [diff] [blame] | 183 | struct irq_cfg *irq_cfg(unsigned int irq) |
Yinghai Lu | 0b8f1ef | 2008-12-05 18:58:31 -0800 | [diff] [blame] | 184 | { |
| 185 | struct irq_cfg *cfg = NULL; |
| 186 | struct irq_desc *desc; |
| 187 | |
| 188 | desc = irq_to_desc(irq); |
| 189 | if (desc) |
| 190 | cfg = desc->chip_data; |
| 191 | |
| 192 | return cfg; |
| 193 | } |
| 194 | |
Yinghai Lu | 85ac16d | 2009-04-27 18:00:38 -0700 | [diff] [blame] | 195 | static struct irq_cfg *get_one_free_irq_cfg(int node) |
Yinghai Lu | 0b8f1ef | 2008-12-05 18:58:31 -0800 | [diff] [blame] | 196 | { |
| 197 | struct irq_cfg *cfg; |
Yinghai Lu | 0b8f1ef | 2008-12-05 18:58:31 -0800 | [diff] [blame] | 198 | |
| 199 | cfg = kzalloc_node(sizeof(*cfg), GFP_ATOMIC, node); |
Mike Travis | 22f65d3 | 2008-12-16 17:33:56 -0800 | [diff] [blame] | 200 | if (cfg) { |
Li Zefan | 79f5599 | 2009-06-15 14:58:26 +0800 | [diff] [blame] | 201 | if (!zalloc_cpumask_var_node(&cfg->domain, GFP_ATOMIC, node)) { |
Mike Travis | 22f65d3 | 2008-12-16 17:33:56 -0800 | [diff] [blame] | 202 | kfree(cfg); |
| 203 | cfg = NULL; |
Li Zefan | 79f5599 | 2009-06-15 14:58:26 +0800 | [diff] [blame] | 204 | } else if (!zalloc_cpumask_var_node(&cfg->old_domain, |
Mike Travis | 80855f7 | 2008-12-31 18:08:47 -0800 | [diff] [blame] | 205 | GFP_ATOMIC, node)) { |
Mike Travis | 22f65d3 | 2008-12-16 17:33:56 -0800 | [diff] [blame] | 206 | free_cpumask_var(cfg->domain); |
| 207 | kfree(cfg); |
| 208 | cfg = NULL; |
Mike Travis | 22f65d3 | 2008-12-16 17:33:56 -0800 | [diff] [blame] | 209 | } |
| 210 | } |
Yinghai Lu | 0b8f1ef | 2008-12-05 18:58:31 -0800 | [diff] [blame] | 211 | |
| 212 | return cfg; |
| 213 | } |
| 214 | |
Yinghai Lu | 85ac16d | 2009-04-27 18:00:38 -0700 | [diff] [blame] | 215 | int arch_init_chip_data(struct irq_desc *desc, int node) |
Yinghai Lu | 0b8f1ef | 2008-12-05 18:58:31 -0800 | [diff] [blame] | 216 | { |
| 217 | struct irq_cfg *cfg; |
| 218 | |
| 219 | cfg = desc->chip_data; |
| 220 | if (!cfg) { |
Yinghai Lu | 85ac16d | 2009-04-27 18:00:38 -0700 | [diff] [blame] | 221 | desc->chip_data = get_one_free_irq_cfg(node); |
Yinghai Lu | 0b8f1ef | 2008-12-05 18:58:31 -0800 | [diff] [blame] | 222 | if (!desc->chip_data) { |
| 223 | printk(KERN_ERR "can not alloc irq_cfg\n"); |
| 224 | BUG_ON(1); |
| 225 | } |
| 226 | } |
Yinghai Lu | 13a0c3c | 2008-12-26 02:05:47 -0800 | [diff] [blame] | 227 | |
| 228 | return 0; |
Yinghai Lu | 0b8f1ef | 2008-12-05 18:58:31 -0800 | [diff] [blame] | 229 | } |
| 230 | |
Yinghai Lu | fcef591 | 2009-04-27 17:58:23 -0700 | [diff] [blame] | 231 | /* for move_irq_desc */ |
Yinghai Lu | 48a1b10 | 2008-12-11 00:15:01 -0800 | [diff] [blame] | 232 | static void |
Yinghai Lu | 85ac16d | 2009-04-27 18:00:38 -0700 | [diff] [blame] | 233 | init_copy_irq_2_pin(struct irq_cfg *old_cfg, struct irq_cfg *cfg, int node) |
Yinghai Lu | 48a1b10 | 2008-12-11 00:15:01 -0800 | [diff] [blame] | 234 | { |
| 235 | struct irq_pin_list *old_entry, *head, *tail, *entry; |
| 236 | |
| 237 | cfg->irq_2_pin = NULL; |
| 238 | old_entry = old_cfg->irq_2_pin; |
| 239 | if (!old_entry) |
| 240 | return; |
| 241 | |
Yinghai Lu | 85ac16d | 2009-04-27 18:00:38 -0700 | [diff] [blame] | 242 | entry = get_one_free_irq_2_pin(node); |
Yinghai Lu | 48a1b10 | 2008-12-11 00:15:01 -0800 | [diff] [blame] | 243 | if (!entry) |
| 244 | return; |
| 245 | |
| 246 | entry->apic = old_entry->apic; |
| 247 | entry->pin = old_entry->pin; |
| 248 | head = entry; |
| 249 | tail = entry; |
| 250 | old_entry = old_entry->next; |
| 251 | while (old_entry) { |
Yinghai Lu | 85ac16d | 2009-04-27 18:00:38 -0700 | [diff] [blame] | 252 | entry = get_one_free_irq_2_pin(node); |
Yinghai Lu | 48a1b10 | 2008-12-11 00:15:01 -0800 | [diff] [blame] | 253 | if (!entry) { |
| 254 | entry = head; |
| 255 | while (entry) { |
| 256 | head = entry->next; |
| 257 | kfree(entry); |
| 258 | entry = head; |
| 259 | } |
| 260 | /* still use the old one */ |
| 261 | return; |
| 262 | } |
| 263 | entry->apic = old_entry->apic; |
| 264 | entry->pin = old_entry->pin; |
| 265 | tail->next = entry; |
| 266 | tail = entry; |
| 267 | old_entry = old_entry->next; |
| 268 | } |
| 269 | |
| 270 | tail->next = NULL; |
| 271 | cfg->irq_2_pin = head; |
| 272 | } |
| 273 | |
| 274 | static void free_irq_2_pin(struct irq_cfg *old_cfg, struct irq_cfg *cfg) |
| 275 | { |
| 276 | struct irq_pin_list *entry, *next; |
| 277 | |
| 278 | if (old_cfg->irq_2_pin == cfg->irq_2_pin) |
| 279 | return; |
| 280 | |
| 281 | entry = old_cfg->irq_2_pin; |
| 282 | |
| 283 | while (entry) { |
| 284 | next = entry->next; |
| 285 | kfree(entry); |
| 286 | entry = next; |
| 287 | } |
| 288 | old_cfg->irq_2_pin = NULL; |
| 289 | } |
| 290 | |
| 291 | void arch_init_copy_chip_data(struct irq_desc *old_desc, |
Yinghai Lu | 85ac16d | 2009-04-27 18:00:38 -0700 | [diff] [blame] | 292 | struct irq_desc *desc, int node) |
Yinghai Lu | 48a1b10 | 2008-12-11 00:15:01 -0800 | [diff] [blame] | 293 | { |
| 294 | struct irq_cfg *cfg; |
| 295 | struct irq_cfg *old_cfg; |
| 296 | |
Yinghai Lu | 85ac16d | 2009-04-27 18:00:38 -0700 | [diff] [blame] | 297 | cfg = get_one_free_irq_cfg(node); |
Yinghai Lu | 48a1b10 | 2008-12-11 00:15:01 -0800 | [diff] [blame] | 298 | |
| 299 | if (!cfg) |
| 300 | return; |
| 301 | |
| 302 | desc->chip_data = cfg; |
| 303 | |
| 304 | old_cfg = old_desc->chip_data; |
| 305 | |
| 306 | memcpy(cfg, old_cfg, sizeof(struct irq_cfg)); |
| 307 | |
Yinghai Lu | 85ac16d | 2009-04-27 18:00:38 -0700 | [diff] [blame] | 308 | init_copy_irq_2_pin(old_cfg, cfg, node); |
Yinghai Lu | 48a1b10 | 2008-12-11 00:15:01 -0800 | [diff] [blame] | 309 | } |
| 310 | |
| 311 | static void free_irq_cfg(struct irq_cfg *old_cfg) |
| 312 | { |
| 313 | kfree(old_cfg); |
| 314 | } |
| 315 | |
| 316 | void arch_free_chip_data(struct irq_desc *old_desc, struct irq_desc *desc) |
| 317 | { |
| 318 | struct irq_cfg *old_cfg, *cfg; |
| 319 | |
| 320 | old_cfg = old_desc->chip_data; |
| 321 | cfg = desc->chip_data; |
| 322 | |
| 323 | if (old_cfg == cfg) |
| 324 | return; |
| 325 | |
| 326 | if (old_cfg) { |
| 327 | free_irq_2_pin(old_cfg, cfg); |
| 328 | free_irq_cfg(old_cfg); |
| 329 | old_desc->chip_data = NULL; |
| 330 | } |
| 331 | } |
Yinghai Lu | fcef591 | 2009-04-27 17:58:23 -0700 | [diff] [blame] | 332 | /* end for move_irq_desc */ |
Yinghai Lu | 48a1b10 | 2008-12-11 00:15:01 -0800 | [diff] [blame] | 333 | |
Yinghai Lu | 0b8f1ef | 2008-12-05 18:58:31 -0800 | [diff] [blame] | 334 | #else |
Dimitri Sivanich | 9338ad6 | 2009-10-13 15:32:36 -0500 | [diff] [blame] | 335 | struct irq_cfg *irq_cfg(unsigned int irq) |
Yinghai Lu | 0b8f1ef | 2008-12-05 18:58:31 -0800 | [diff] [blame] | 336 | { |
| 337 | return irq < nr_irqs ? irq_cfgx + irq : NULL; |
| 338 | } |
| 339 | |
| 340 | #endif |
| 341 | |
Linus Torvalds | 130fe05 | 2006-11-01 09:11:00 -0800 | [diff] [blame] | 342 | struct io_apic { |
| 343 | unsigned int index; |
| 344 | unsigned int unused[3]; |
| 345 | unsigned int data; |
Suresh Siddha | 0280f7c | 2009-03-16 17:05:01 -0700 | [diff] [blame] | 346 | unsigned int unused2[11]; |
| 347 | unsigned int eoi; |
Linus Torvalds | 130fe05 | 2006-11-01 09:11:00 -0800 | [diff] [blame] | 348 | }; |
| 349 | |
| 350 | static __attribute_const__ struct io_apic __iomem *io_apic_base(int idx) |
| 351 | { |
| 352 | return (void __iomem *) __fix_to_virt(FIX_IO_APIC_BASE_0 + idx) |
Jaswinder Singh Rajput | b5ba7e6 | 2009-01-12 17:46:17 +0530 | [diff] [blame] | 353 | + (mp_ioapics[idx].apicaddr & ~PAGE_MASK); |
Linus Torvalds | 130fe05 | 2006-11-01 09:11:00 -0800 | [diff] [blame] | 354 | } |
| 355 | |
Suresh Siddha | 0280f7c | 2009-03-16 17:05:01 -0700 | [diff] [blame] | 356 | static inline void io_apic_eoi(unsigned int apic, unsigned int vector) |
| 357 | { |
| 358 | struct io_apic __iomem *io_apic = io_apic_base(apic); |
| 359 | writel(vector, &io_apic->eoi); |
| 360 | } |
| 361 | |
Linus Torvalds | 130fe05 | 2006-11-01 09:11:00 -0800 | [diff] [blame] | 362 | static inline unsigned int io_apic_read(unsigned int apic, unsigned int reg) |
| 363 | { |
| 364 | struct io_apic __iomem *io_apic = io_apic_base(apic); |
| 365 | writel(reg, &io_apic->index); |
| 366 | return readl(&io_apic->data); |
| 367 | } |
| 368 | |
| 369 | static inline void io_apic_write(unsigned int apic, unsigned int reg, unsigned int value) |
| 370 | { |
| 371 | struct io_apic __iomem *io_apic = io_apic_base(apic); |
| 372 | writel(reg, &io_apic->index); |
| 373 | writel(value, &io_apic->data); |
| 374 | } |
| 375 | |
| 376 | /* |
| 377 | * Re-write a value: to be used for read-modify-write |
| 378 | * cycles where the read already set up the index register. |
| 379 | * |
| 380 | * Older SiS APIC requires we rewrite the index register |
| 381 | */ |
| 382 | static inline void io_apic_modify(unsigned int apic, unsigned int reg, unsigned int value) |
| 383 | { |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 384 | struct io_apic __iomem *io_apic = io_apic_base(apic); |
Thomas Gleixner | d6c88a5 | 2008-10-15 15:27:23 +0200 | [diff] [blame] | 385 | |
| 386 | if (sis_apic_bug) |
| 387 | writel(reg, &io_apic->index); |
Linus Torvalds | 130fe05 | 2006-11-01 09:11:00 -0800 | [diff] [blame] | 388 | writel(value, &io_apic->data); |
| 389 | } |
| 390 | |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 391 | static bool io_apic_level_ack_pending(struct irq_cfg *cfg) |
Yinghai Lu | 047c8fd | 2008-08-19 20:50:41 -0700 | [diff] [blame] | 392 | { |
| 393 | struct irq_pin_list *entry; |
| 394 | unsigned long flags; |
Yinghai Lu | 047c8fd | 2008-08-19 20:50:41 -0700 | [diff] [blame] | 395 | |
Thomas Gleixner | dade771 | 2009-07-25 18:39:36 +0200 | [diff] [blame] | 396 | raw_spin_lock_irqsave(&ioapic_lock, flags); |
Cyrill Gorcunov | 2977fb3 | 2009-08-01 11:47:59 +0400 | [diff] [blame] | 397 | for_each_irq_pin(entry, cfg->irq_2_pin) { |
Yinghai Lu | 047c8fd | 2008-08-19 20:50:41 -0700 | [diff] [blame] | 398 | unsigned int reg; |
| 399 | int pin; |
| 400 | |
Yinghai Lu | 047c8fd | 2008-08-19 20:50:41 -0700 | [diff] [blame] | 401 | pin = entry->pin; |
| 402 | reg = io_apic_read(entry->apic, 0x10 + pin*2); |
| 403 | /* Is the remote IRR bit set? */ |
| 404 | if (reg & IO_APIC_REDIR_REMOTE_IRR) { |
Thomas Gleixner | dade771 | 2009-07-25 18:39:36 +0200 | [diff] [blame] | 405 | raw_spin_unlock_irqrestore(&ioapic_lock, flags); |
Yinghai Lu | 047c8fd | 2008-08-19 20:50:41 -0700 | [diff] [blame] | 406 | return true; |
| 407 | } |
Yinghai Lu | 047c8fd | 2008-08-19 20:50:41 -0700 | [diff] [blame] | 408 | } |
Thomas Gleixner | dade771 | 2009-07-25 18:39:36 +0200 | [diff] [blame] | 409 | raw_spin_unlock_irqrestore(&ioapic_lock, flags); |
Yinghai Lu | 047c8fd | 2008-08-19 20:50:41 -0700 | [diff] [blame] | 410 | |
| 411 | return false; |
| 412 | } |
Yinghai Lu | 047c8fd | 2008-08-19 20:50:41 -0700 | [diff] [blame] | 413 | |
Andi Kleen | cf4c6a2 | 2006-09-26 10:52:30 +0200 | [diff] [blame] | 414 | union entry_union { |
| 415 | struct { u32 w1, w2; }; |
| 416 | struct IO_APIC_route_entry entry; |
| 417 | }; |
| 418 | |
| 419 | static struct IO_APIC_route_entry ioapic_read_entry(int apic, int pin) |
| 420 | { |
| 421 | union entry_union eu; |
| 422 | unsigned long flags; |
Thomas Gleixner | dade771 | 2009-07-25 18:39:36 +0200 | [diff] [blame] | 423 | raw_spin_lock_irqsave(&ioapic_lock, flags); |
Andi Kleen | cf4c6a2 | 2006-09-26 10:52:30 +0200 | [diff] [blame] | 424 | eu.w1 = io_apic_read(apic, 0x10 + 2 * pin); |
| 425 | eu.w2 = io_apic_read(apic, 0x11 + 2 * pin); |
Thomas Gleixner | dade771 | 2009-07-25 18:39:36 +0200 | [diff] [blame] | 426 | raw_spin_unlock_irqrestore(&ioapic_lock, flags); |
Andi Kleen | cf4c6a2 | 2006-09-26 10:52:30 +0200 | [diff] [blame] | 427 | return eu.entry; |
| 428 | } |
| 429 | |
Linus Torvalds | f9dadfa | 2006-11-01 10:05:35 -0800 | [diff] [blame] | 430 | /* |
| 431 | * When we write a new IO APIC routing entry, we need to write the high |
| 432 | * word first! If the mask bit in the low word is clear, we will enable |
| 433 | * the interrupt, and we need to make sure the entry is fully populated |
| 434 | * before that happens. |
| 435 | */ |
Andi Kleen | d15512f | 2006-12-07 02:14:07 +0100 | [diff] [blame] | 436 | static void |
| 437 | __ioapic_write_entry(int apic, int pin, struct IO_APIC_route_entry e) |
| 438 | { |
Figo.zhang | 50a8d4d | 2009-06-17 22:25:20 +0800 | [diff] [blame] | 439 | union entry_union eu = {{0, 0}}; |
| 440 | |
Andi Kleen | d15512f | 2006-12-07 02:14:07 +0100 | [diff] [blame] | 441 | eu.entry = e; |
| 442 | io_apic_write(apic, 0x11 + 2*pin, eu.w2); |
| 443 | io_apic_write(apic, 0x10 + 2*pin, eu.w1); |
| 444 | } |
| 445 | |
Jeremy Fitzhardinge | ca97ab9 | 2009-02-09 12:05:47 -0800 | [diff] [blame] | 446 | void ioapic_write_entry(int apic, int pin, struct IO_APIC_route_entry e) |
Andi Kleen | cf4c6a2 | 2006-09-26 10:52:30 +0200 | [diff] [blame] | 447 | { |
| 448 | unsigned long flags; |
Thomas Gleixner | dade771 | 2009-07-25 18:39:36 +0200 | [diff] [blame] | 449 | raw_spin_lock_irqsave(&ioapic_lock, flags); |
Andi Kleen | d15512f | 2006-12-07 02:14:07 +0100 | [diff] [blame] | 450 | __ioapic_write_entry(apic, pin, e); |
Thomas Gleixner | dade771 | 2009-07-25 18:39:36 +0200 | [diff] [blame] | 451 | raw_spin_unlock_irqrestore(&ioapic_lock, flags); |
Linus Torvalds | f9dadfa | 2006-11-01 10:05:35 -0800 | [diff] [blame] | 452 | } |
| 453 | |
| 454 | /* |
| 455 | * When we mask an IO APIC routing entry, we need to write the low |
| 456 | * word first, in order to set the mask bit before we change the |
| 457 | * high bits! |
| 458 | */ |
| 459 | static void ioapic_mask_entry(int apic, int pin) |
| 460 | { |
| 461 | unsigned long flags; |
| 462 | union entry_union eu = { .entry.mask = 1 }; |
| 463 | |
Thomas Gleixner | dade771 | 2009-07-25 18:39:36 +0200 | [diff] [blame] | 464 | raw_spin_lock_irqsave(&ioapic_lock, flags); |
Andi Kleen | cf4c6a2 | 2006-09-26 10:52:30 +0200 | [diff] [blame] | 465 | io_apic_write(apic, 0x10 + 2*pin, eu.w1); |
| 466 | io_apic_write(apic, 0x11 + 2*pin, eu.w2); |
Thomas Gleixner | dade771 | 2009-07-25 18:39:36 +0200 | [diff] [blame] | 467 | raw_spin_unlock_irqrestore(&ioapic_lock, flags); |
Andi Kleen | cf4c6a2 | 2006-09-26 10:52:30 +0200 | [diff] [blame] | 468 | } |
| 469 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 470 | /* |
| 471 | * The common case is 1:1 IRQ<->pin mappings. Sometimes there are |
| 472 | * shared ISA-space IRQs, so we have to support them. We are super |
| 473 | * fast in the common case, and fast for shared ISA-space IRQs. |
| 474 | */ |
Cyrill Gorcunov | f3d1915 | 2009-08-06 00:09:31 +0400 | [diff] [blame] | 475 | static int |
| 476 | add_pin_to_irq_node_nopanic(struct irq_cfg *cfg, int node, int apic, int pin) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 477 | { |
Cyrill Gorcunov | 2977fb3 | 2009-08-01 11:47:59 +0400 | [diff] [blame] | 478 | struct irq_pin_list **last, *entry; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 479 | |
Cyrill Gorcunov | 2977fb3 | 2009-08-01 11:47:59 +0400 | [diff] [blame] | 480 | /* don't allow duplicates */ |
| 481 | last = &cfg->irq_2_pin; |
| 482 | for_each_irq_pin(entry, cfg->irq_2_pin) { |
Yinghai Lu | 0f978f4 | 2008-08-19 20:50:26 -0700 | [diff] [blame] | 483 | if (entry->apic == apic && entry->pin == pin) |
Cyrill Gorcunov | f3d1915 | 2009-08-06 00:09:31 +0400 | [diff] [blame] | 484 | return 0; |
Cyrill Gorcunov | 2977fb3 | 2009-08-01 11:47:59 +0400 | [diff] [blame] | 485 | last = &entry->next; |
Yinghai Lu | 0f978f4 | 2008-08-19 20:50:26 -0700 | [diff] [blame] | 486 | } |
| 487 | |
Jeremy Fitzhardinge | 875e68e | 2009-06-08 03:24:11 -0700 | [diff] [blame] | 488 | entry = get_one_free_irq_2_pin(node); |
Cyrill Gorcunov | a7428cd | 2009-08-01 11:48:00 +0400 | [diff] [blame] | 489 | if (!entry) { |
Cyrill Gorcunov | f3d1915 | 2009-08-06 00:09:31 +0400 | [diff] [blame] | 490 | printk(KERN_ERR "can not alloc irq_pin_list (%d,%d,%d)\n", |
| 491 | node, apic, pin); |
| 492 | return -ENOMEM; |
Cyrill Gorcunov | a7428cd | 2009-08-01 11:48:00 +0400 | [diff] [blame] | 493 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 494 | entry->apic = apic; |
| 495 | entry->pin = pin; |
Jeremy Fitzhardinge | 875e68e | 2009-06-08 03:24:11 -0700 | [diff] [blame] | 496 | |
Cyrill Gorcunov | 2977fb3 | 2009-08-01 11:47:59 +0400 | [diff] [blame] | 497 | *last = entry; |
Cyrill Gorcunov | f3d1915 | 2009-08-06 00:09:31 +0400 | [diff] [blame] | 498 | return 0; |
| 499 | } |
| 500 | |
| 501 | static void add_pin_to_irq_node(struct irq_cfg *cfg, int node, int apic, int pin) |
| 502 | { |
| 503 | if (add_pin_to_irq_node_nopanic(cfg, node, apic, pin)) |
| 504 | panic("IO-APIC: failed to add irq-pin. Can not proceed\n"); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 505 | } |
| 506 | |
| 507 | /* |
| 508 | * Reroute an IRQ to a different pin. |
| 509 | */ |
Yinghai Lu | 85ac16d | 2009-04-27 18:00:38 -0700 | [diff] [blame] | 510 | static void __init replace_pin_at_irq_node(struct irq_cfg *cfg, int node, |
Jeremy Fitzhardinge | 4eea6ff | 2009-06-08 03:32:15 -0700 | [diff] [blame] | 511 | int oldapic, int oldpin, |
| 512 | int newapic, int newpin) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 513 | { |
Jeremy Fitzhardinge | 535b642 | 2009-06-08 03:29:26 -0700 | [diff] [blame] | 514 | struct irq_pin_list *entry; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 515 | |
Cyrill Gorcunov | 2977fb3 | 2009-08-01 11:47:59 +0400 | [diff] [blame] | 516 | for_each_irq_pin(entry, cfg->irq_2_pin) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 517 | if (entry->apic == oldapic && entry->pin == oldpin) { |
| 518 | entry->apic = newapic; |
| 519 | entry->pin = newpin; |
Yinghai Lu | 0f978f4 | 2008-08-19 20:50:26 -0700 | [diff] [blame] | 520 | /* every one is different, right? */ |
Jeremy Fitzhardinge | 4eea6ff | 2009-06-08 03:32:15 -0700 | [diff] [blame] | 521 | return; |
Yinghai Lu | 0f978f4 | 2008-08-19 20:50:26 -0700 | [diff] [blame] | 522 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 523 | } |
Yinghai Lu | 0f978f4 | 2008-08-19 20:50:26 -0700 | [diff] [blame] | 524 | |
Jeremy Fitzhardinge | 4eea6ff | 2009-06-08 03:32:15 -0700 | [diff] [blame] | 525 | /* old apic/pin didn't exist, so just add new ones */ |
| 526 | add_pin_to_irq_node(cfg, node, newapic, newpin); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 527 | } |
| 528 | |
Suresh Siddha | c29d9db | 2009-12-01 15:31:16 -0800 | [diff] [blame] | 529 | static void __io_apic_modify_irq(struct irq_pin_list *entry, |
| 530 | int mask_and, int mask_or, |
| 531 | void (*final)(struct irq_pin_list *entry)) |
| 532 | { |
| 533 | unsigned int reg, pin; |
| 534 | |
| 535 | pin = entry->pin; |
| 536 | reg = io_apic_read(entry->apic, 0x10 + pin * 2); |
| 537 | reg &= mask_and; |
| 538 | reg |= mask_or; |
| 539 | io_apic_modify(entry->apic, 0x10 + pin * 2, reg); |
| 540 | if (final) |
| 541 | final(entry); |
| 542 | } |
| 543 | |
Jeremy Fitzhardinge | 2f210de | 2009-06-08 02:55:22 -0700 | [diff] [blame] | 544 | static void io_apic_modify_irq(struct irq_cfg *cfg, |
| 545 | int mask_and, int mask_or, |
| 546 | void (*final)(struct irq_pin_list *entry)) |
Cyrill Gorcunov | 87783be | 2008-09-10 22:19:50 +0400 | [diff] [blame] | 547 | { |
Cyrill Gorcunov | 87783be | 2008-09-10 22:19:50 +0400 | [diff] [blame] | 548 | struct irq_pin_list *entry; |
| 549 | |
Suresh Siddha | c29d9db | 2009-12-01 15:31:16 -0800 | [diff] [blame] | 550 | for_each_irq_pin(entry, cfg->irq_2_pin) |
| 551 | __io_apic_modify_irq(entry, mask_and, mask_or, final); |
| 552 | } |
| 553 | |
| 554 | static void __mask_and_edge_IO_APIC_irq(struct irq_pin_list *entry) |
| 555 | { |
| 556 | __io_apic_modify_irq(entry, ~IO_APIC_REDIR_LEVEL_TRIGGER, |
| 557 | IO_APIC_REDIR_MASKED, NULL); |
| 558 | } |
| 559 | |
| 560 | static void __unmask_and_level_IO_APIC_irq(struct irq_pin_list *entry) |
| 561 | { |
| 562 | __io_apic_modify_irq(entry, ~IO_APIC_REDIR_MASKED, |
| 563 | IO_APIC_REDIR_LEVEL_TRIGGER, NULL); |
Yinghai Lu | 047c8fd | 2008-08-19 20:50:41 -0700 | [diff] [blame] | 564 | } |
| 565 | |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 566 | static void __unmask_IO_APIC_irq(struct irq_cfg *cfg) |
Cyrill Gorcunov | 87783be | 2008-09-10 22:19:50 +0400 | [diff] [blame] | 567 | { |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 568 | io_apic_modify_irq(cfg, ~IO_APIC_REDIR_MASKED, 0, NULL); |
Cyrill Gorcunov | 87783be | 2008-09-10 22:19:50 +0400 | [diff] [blame] | 569 | } |
Yinghai Lu | 4e738e2 | 2008-08-19 20:50:47 -0700 | [diff] [blame] | 570 | |
Jaswinder Singh Rajput | 7f3e632 | 2008-12-29 20:34:35 +0530 | [diff] [blame] | 571 | static void io_apic_sync(struct irq_pin_list *entry) |
Yinghai Lu | 4e738e2 | 2008-08-19 20:50:47 -0700 | [diff] [blame] | 572 | { |
Cyrill Gorcunov | 87783be | 2008-09-10 22:19:50 +0400 | [diff] [blame] | 573 | /* |
| 574 | * Synchronize the IO-APIC and the CPU by doing |
| 575 | * a dummy read from the IO-APIC |
| 576 | */ |
| 577 | struct io_apic __iomem *io_apic; |
| 578 | io_apic = io_apic_base(entry->apic); |
Yinghai Lu | 4e738e2 | 2008-08-19 20:50:47 -0700 | [diff] [blame] | 579 | readl(&io_apic->data); |
| 580 | } |
| 581 | |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 582 | static void __mask_IO_APIC_irq(struct irq_cfg *cfg) |
Cyrill Gorcunov | 87783be | 2008-09-10 22:19:50 +0400 | [diff] [blame] | 583 | { |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 584 | io_apic_modify_irq(cfg, ~0, IO_APIC_REDIR_MASKED, &io_apic_sync); |
Cyrill Gorcunov | 87783be | 2008-09-10 22:19:50 +0400 | [diff] [blame] | 585 | } |
Yinghai Lu | 047c8fd | 2008-08-19 20:50:41 -0700 | [diff] [blame] | 586 | |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 587 | static void mask_IO_APIC_irq_desc(struct irq_desc *desc) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 588 | { |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 589 | struct irq_cfg *cfg = desc->chip_data; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 590 | unsigned long flags; |
| 591 | |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 592 | BUG_ON(!cfg); |
| 593 | |
Thomas Gleixner | dade771 | 2009-07-25 18:39:36 +0200 | [diff] [blame] | 594 | raw_spin_lock_irqsave(&ioapic_lock, flags); |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 595 | __mask_IO_APIC_irq(cfg); |
Thomas Gleixner | dade771 | 2009-07-25 18:39:36 +0200 | [diff] [blame] | 596 | raw_spin_unlock_irqrestore(&ioapic_lock, flags); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 597 | } |
| 598 | |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 599 | static void unmask_IO_APIC_irq_desc(struct irq_desc *desc) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 600 | { |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 601 | struct irq_cfg *cfg = desc->chip_data; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 602 | unsigned long flags; |
| 603 | |
Thomas Gleixner | dade771 | 2009-07-25 18:39:36 +0200 | [diff] [blame] | 604 | raw_spin_lock_irqsave(&ioapic_lock, flags); |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 605 | __unmask_IO_APIC_irq(cfg); |
Thomas Gleixner | dade771 | 2009-07-25 18:39:36 +0200 | [diff] [blame] | 606 | raw_spin_unlock_irqrestore(&ioapic_lock, flags); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 607 | } |
| 608 | |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 609 | static void mask_IO_APIC_irq(unsigned int irq) |
| 610 | { |
| 611 | struct irq_desc *desc = irq_to_desc(irq); |
| 612 | |
| 613 | mask_IO_APIC_irq_desc(desc); |
| 614 | } |
| 615 | static void unmask_IO_APIC_irq(unsigned int irq) |
| 616 | { |
| 617 | struct irq_desc *desc = irq_to_desc(irq); |
| 618 | |
| 619 | unmask_IO_APIC_irq_desc(desc); |
| 620 | } |
| 621 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 622 | static void clear_IO_APIC_pin(unsigned int apic, unsigned int pin) |
| 623 | { |
| 624 | struct IO_APIC_route_entry entry; |
Paolo Ciarrocchi | 3606244 | 2008-06-08 13:07:18 +0200 | [diff] [blame] | 625 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 626 | /* Check delivery_mode to be sure we're not clearing an SMI pin */ |
Andi Kleen | cf4c6a2 | 2006-09-26 10:52:30 +0200 | [diff] [blame] | 627 | entry = ioapic_read_entry(apic, pin); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 628 | if (entry.delivery_mode == dest_SMI) |
| 629 | return; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 630 | /* |
| 631 | * Disable it in the IO-APIC irq-routing table: |
| 632 | */ |
Linus Torvalds | f9dadfa | 2006-11-01 10:05:35 -0800 | [diff] [blame] | 633 | ioapic_mask_entry(apic, pin); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 634 | } |
| 635 | |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 636 | static void clear_IO_APIC (void) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 637 | { |
| 638 | int apic, pin; |
| 639 | |
| 640 | for (apic = 0; apic < nr_ioapics; apic++) |
| 641 | for (pin = 0; pin < nr_ioapic_registers[apic]; pin++) |
| 642 | clear_IO_APIC_pin(apic, pin); |
| 643 | } |
| 644 | |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 645 | #ifdef CONFIG_X86_32 |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 646 | /* |
| 647 | * support for broken MP BIOSs, enables hand-redirection of PIRQ0-7 to |
| 648 | * specific CPU-side IRQs. |
| 649 | */ |
| 650 | |
| 651 | #define MAX_PIRQS 8 |
Yinghai Lu | 3bd25d0 | 2009-02-15 02:54:03 -0800 | [diff] [blame] | 652 | static int pirq_entries[MAX_PIRQS] = { |
| 653 | [0 ... MAX_PIRQS - 1] = -1 |
| 654 | }; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 655 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 656 | static int __init ioapic_pirq_setup(char *str) |
| 657 | { |
| 658 | int i, max; |
| 659 | int ints[MAX_PIRQS+1]; |
| 660 | |
| 661 | get_options(str, ARRAY_SIZE(ints), ints); |
| 662 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 663 | apic_printk(APIC_VERBOSE, KERN_INFO |
| 664 | "PIRQ redirection, working around broken MP-BIOS.\n"); |
| 665 | max = MAX_PIRQS; |
| 666 | if (ints[0] < MAX_PIRQS) |
| 667 | max = ints[0]; |
| 668 | |
| 669 | for (i = 0; i < max; i++) { |
| 670 | apic_printk(APIC_VERBOSE, KERN_DEBUG |
| 671 | "... PIRQ%d -> IRQ %d\n", i, ints[i+1]); |
| 672 | /* |
| 673 | * PIRQs are mapped upside down, usually. |
| 674 | */ |
| 675 | pirq_entries[MAX_PIRQS-i-1] = ints[i+1]; |
| 676 | } |
| 677 | return 1; |
| 678 | } |
| 679 | |
| 680 | __setup("pirq=", ioapic_pirq_setup); |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 681 | #endif /* CONFIG_X86_32 */ |
| 682 | |
Fenghua Yu | b24696b | 2009-03-27 14:22:44 -0700 | [diff] [blame] | 683 | struct IO_APIC_route_entry **alloc_ioapic_entries(void) |
| 684 | { |
| 685 | int apic; |
| 686 | struct IO_APIC_route_entry **ioapic_entries; |
| 687 | |
| 688 | ioapic_entries = kzalloc(sizeof(*ioapic_entries) * nr_ioapics, |
| 689 | GFP_ATOMIC); |
| 690 | if (!ioapic_entries) |
| 691 | return 0; |
| 692 | |
| 693 | for (apic = 0; apic < nr_ioapics; apic++) { |
| 694 | ioapic_entries[apic] = |
| 695 | kzalloc(sizeof(struct IO_APIC_route_entry) * |
| 696 | nr_ioapic_registers[apic], GFP_ATOMIC); |
| 697 | if (!ioapic_entries[apic]) |
| 698 | goto nomem; |
| 699 | } |
| 700 | |
| 701 | return ioapic_entries; |
| 702 | |
| 703 | nomem: |
| 704 | while (--apic >= 0) |
| 705 | kfree(ioapic_entries[apic]); |
| 706 | kfree(ioapic_entries); |
| 707 | |
| 708 | return 0; |
| 709 | } |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 710 | |
| 711 | /* |
Suresh Siddha | 05c3dc2 | 2009-03-16 17:05:03 -0700 | [diff] [blame] | 712 | * Saves all the IO-APIC RTE's |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 713 | */ |
Fenghua Yu | b24696b | 2009-03-27 14:22:44 -0700 | [diff] [blame] | 714 | int save_IO_APIC_setup(struct IO_APIC_route_entry **ioapic_entries) |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 715 | { |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 716 | int apic, pin; |
| 717 | |
Fenghua Yu | b24696b | 2009-03-27 14:22:44 -0700 | [diff] [blame] | 718 | if (!ioapic_entries) |
| 719 | return -ENOMEM; |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 720 | |
| 721 | for (apic = 0; apic < nr_ioapics; apic++) { |
Fenghua Yu | b24696b | 2009-03-27 14:22:44 -0700 | [diff] [blame] | 722 | if (!ioapic_entries[apic]) |
| 723 | return -ENOMEM; |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 724 | |
Suresh Siddha | 05c3dc2 | 2009-03-16 17:05:03 -0700 | [diff] [blame] | 725 | for (pin = 0; pin < nr_ioapic_registers[apic]; pin++) |
Fenghua Yu | b24696b | 2009-03-27 14:22:44 -0700 | [diff] [blame] | 726 | ioapic_entries[apic][pin] = |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 727 | ioapic_read_entry(apic, pin); |
Fenghua Yu | b24696b | 2009-03-27 14:22:44 -0700 | [diff] [blame] | 728 | } |
Cyrill Gorcunov | 5ffa4eb | 2008-09-18 23:37:57 +0400 | [diff] [blame] | 729 | |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 730 | return 0; |
| 731 | } |
| 732 | |
Fenghua Yu | b24696b | 2009-03-27 14:22:44 -0700 | [diff] [blame] | 733 | /* |
| 734 | * Mask all IO APIC entries. |
| 735 | */ |
| 736 | void mask_IO_APIC_setup(struct IO_APIC_route_entry **ioapic_entries) |
Suresh Siddha | 05c3dc2 | 2009-03-16 17:05:03 -0700 | [diff] [blame] | 737 | { |
| 738 | int apic, pin; |
| 739 | |
Fenghua Yu | b24696b | 2009-03-27 14:22:44 -0700 | [diff] [blame] | 740 | if (!ioapic_entries) |
| 741 | return; |
| 742 | |
Suresh Siddha | 05c3dc2 | 2009-03-16 17:05:03 -0700 | [diff] [blame] | 743 | for (apic = 0; apic < nr_ioapics; apic++) { |
Fenghua Yu | b24696b | 2009-03-27 14:22:44 -0700 | [diff] [blame] | 744 | if (!ioapic_entries[apic]) |
Suresh Siddha | 05c3dc2 | 2009-03-16 17:05:03 -0700 | [diff] [blame] | 745 | break; |
Fenghua Yu | b24696b | 2009-03-27 14:22:44 -0700 | [diff] [blame] | 746 | |
Suresh Siddha | 05c3dc2 | 2009-03-16 17:05:03 -0700 | [diff] [blame] | 747 | for (pin = 0; pin < nr_ioapic_registers[apic]; pin++) { |
| 748 | struct IO_APIC_route_entry entry; |
| 749 | |
Fenghua Yu | b24696b | 2009-03-27 14:22:44 -0700 | [diff] [blame] | 750 | entry = ioapic_entries[apic][pin]; |
Suresh Siddha | 05c3dc2 | 2009-03-16 17:05:03 -0700 | [diff] [blame] | 751 | if (!entry.mask) { |
| 752 | entry.mask = 1; |
| 753 | ioapic_write_entry(apic, pin, entry); |
| 754 | } |
| 755 | } |
| 756 | } |
| 757 | } |
| 758 | |
Fenghua Yu | b24696b | 2009-03-27 14:22:44 -0700 | [diff] [blame] | 759 | /* |
| 760 | * Restore IO APIC entries which was saved in ioapic_entries. |
| 761 | */ |
| 762 | int restore_IO_APIC_setup(struct IO_APIC_route_entry **ioapic_entries) |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 763 | { |
| 764 | int apic, pin; |
| 765 | |
Fenghua Yu | b24696b | 2009-03-27 14:22:44 -0700 | [diff] [blame] | 766 | if (!ioapic_entries) |
| 767 | return -ENOMEM; |
| 768 | |
Cyrill Gorcunov | 5ffa4eb | 2008-09-18 23:37:57 +0400 | [diff] [blame] | 769 | for (apic = 0; apic < nr_ioapics; apic++) { |
Fenghua Yu | b24696b | 2009-03-27 14:22:44 -0700 | [diff] [blame] | 770 | if (!ioapic_entries[apic]) |
| 771 | return -ENOMEM; |
| 772 | |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 773 | for (pin = 0; pin < nr_ioapic_registers[apic]; pin++) |
| 774 | ioapic_write_entry(apic, pin, |
Fenghua Yu | b24696b | 2009-03-27 14:22:44 -0700 | [diff] [blame] | 775 | ioapic_entries[apic][pin]); |
Cyrill Gorcunov | 5ffa4eb | 2008-09-18 23:37:57 +0400 | [diff] [blame] | 776 | } |
Fenghua Yu | b24696b | 2009-03-27 14:22:44 -0700 | [diff] [blame] | 777 | return 0; |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 778 | } |
| 779 | |
Fenghua Yu | b24696b | 2009-03-27 14:22:44 -0700 | [diff] [blame] | 780 | void free_ioapic_entries(struct IO_APIC_route_entry **ioapic_entries) |
| 781 | { |
| 782 | int apic; |
| 783 | |
| 784 | for (apic = 0; apic < nr_ioapics; apic++) |
| 785 | kfree(ioapic_entries[apic]); |
| 786 | |
| 787 | kfree(ioapic_entries); |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 788 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 789 | |
| 790 | /* |
| 791 | * Find the IRQ entry number of a certain pin. |
| 792 | */ |
| 793 | static int find_irq_entry(int apic, int pin, int type) |
| 794 | { |
| 795 | int i; |
| 796 | |
| 797 | for (i = 0; i < mp_irq_entries; i++) |
Jaswinder Singh Rajput | c2c2174 | 2009-01-12 17:47:22 +0530 | [diff] [blame] | 798 | if (mp_irqs[i].irqtype == type && |
| 799 | (mp_irqs[i].dstapic == mp_ioapics[apic].apicid || |
| 800 | mp_irqs[i].dstapic == MP_APIC_ALL) && |
| 801 | mp_irqs[i].dstirq == pin) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 802 | return i; |
| 803 | |
| 804 | return -1; |
| 805 | } |
| 806 | |
| 807 | /* |
| 808 | * Find the pin to which IRQ[irq] (ISA) is connected |
| 809 | */ |
Eric W. Biederman | fcfd636 | 2005-10-30 14:59:39 -0800 | [diff] [blame] | 810 | static int __init find_isa_irq_pin(int irq, int type) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 811 | { |
| 812 | int i; |
| 813 | |
| 814 | for (i = 0; i < mp_irq_entries; i++) { |
Jaswinder Singh Rajput | c2c2174 | 2009-01-12 17:47:22 +0530 | [diff] [blame] | 815 | int lbus = mp_irqs[i].srcbus; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 816 | |
Alexey Starikovskiy | d27e2b8 | 2008-03-20 14:54:18 +0300 | [diff] [blame] | 817 | if (test_bit(lbus, mp_bus_not_pci) && |
Jaswinder Singh Rajput | c2c2174 | 2009-01-12 17:47:22 +0530 | [diff] [blame] | 818 | (mp_irqs[i].irqtype == type) && |
| 819 | (mp_irqs[i].srcbusirq == irq)) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 820 | |
Jaswinder Singh Rajput | c2c2174 | 2009-01-12 17:47:22 +0530 | [diff] [blame] | 821 | return mp_irqs[i].dstirq; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 822 | } |
| 823 | return -1; |
| 824 | } |
| 825 | |
Eric W. Biederman | fcfd636 | 2005-10-30 14:59:39 -0800 | [diff] [blame] | 826 | static int __init find_isa_irq_apic(int irq, int type) |
| 827 | { |
| 828 | int i; |
| 829 | |
| 830 | for (i = 0; i < mp_irq_entries; i++) { |
Jaswinder Singh Rajput | c2c2174 | 2009-01-12 17:47:22 +0530 | [diff] [blame] | 831 | int lbus = mp_irqs[i].srcbus; |
Eric W. Biederman | fcfd636 | 2005-10-30 14:59:39 -0800 | [diff] [blame] | 832 | |
Alexey Starikovskiy | 73b2961 | 2008-03-20 14:54:24 +0300 | [diff] [blame] | 833 | if (test_bit(lbus, mp_bus_not_pci) && |
Jaswinder Singh Rajput | c2c2174 | 2009-01-12 17:47:22 +0530 | [diff] [blame] | 834 | (mp_irqs[i].irqtype == type) && |
| 835 | (mp_irqs[i].srcbusirq == irq)) |
Eric W. Biederman | fcfd636 | 2005-10-30 14:59:39 -0800 | [diff] [blame] | 836 | break; |
| 837 | } |
| 838 | if (i < mp_irq_entries) { |
| 839 | int apic; |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 840 | for(apic = 0; apic < nr_ioapics; apic++) { |
Jaswinder Singh Rajput | c2c2174 | 2009-01-12 17:47:22 +0530 | [diff] [blame] | 841 | if (mp_ioapics[apic].apicid == mp_irqs[i].dstapic) |
Eric W. Biederman | fcfd636 | 2005-10-30 14:59:39 -0800 | [diff] [blame] | 842 | return apic; |
| 843 | } |
| 844 | } |
| 845 | |
| 846 | return -1; |
| 847 | } |
| 848 | |
Alexey Starikovskiy | c0a282c | 2008-03-20 14:55:02 +0300 | [diff] [blame] | 849 | #if defined(CONFIG_EISA) || defined(CONFIG_MCA) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 850 | /* |
| 851 | * EISA Edge/Level control register, ELCR |
| 852 | */ |
| 853 | static int EISA_ELCR(unsigned int irq) |
| 854 | { |
Thomas Gleixner | bc07844 | 2009-08-29 18:09:57 +0200 | [diff] [blame] | 855 | if (irq < nr_legacy_irqs) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 856 | unsigned int port = 0x4d0 + (irq >> 3); |
| 857 | return (inb(port) >> (irq & 7)) & 1; |
| 858 | } |
| 859 | apic_printk(APIC_VERBOSE, KERN_INFO |
| 860 | "Broken MPtable reports ISA irq %d\n", irq); |
| 861 | return 0; |
| 862 | } |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 863 | |
Alexey Starikovskiy | c0a282c | 2008-03-20 14:55:02 +0300 | [diff] [blame] | 864 | #endif |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 865 | |
Alexey Starikovskiy | 6728801 | 2008-03-20 14:54:36 +0300 | [diff] [blame] | 866 | /* ISA interrupts are always polarity zero edge triggered, |
| 867 | * when listed as conforming in the MP table. */ |
| 868 | |
| 869 | #define default_ISA_trigger(idx) (0) |
| 870 | #define default_ISA_polarity(idx) (0) |
| 871 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 872 | /* EISA interrupts are always polarity zero and can be edge or level |
| 873 | * trigger depending on the ELCR value. If an interrupt is listed as |
| 874 | * EISA conforming in the MP table, that means its trigger type must |
| 875 | * be read in from the ELCR */ |
| 876 | |
Jaswinder Singh Rajput | c2c2174 | 2009-01-12 17:47:22 +0530 | [diff] [blame] | 877 | #define default_EISA_trigger(idx) (EISA_ELCR(mp_irqs[idx].srcbusirq)) |
Alexey Starikovskiy | 6728801 | 2008-03-20 14:54:36 +0300 | [diff] [blame] | 878 | #define default_EISA_polarity(idx) default_ISA_polarity(idx) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 879 | |
| 880 | /* PCI interrupts are always polarity one level triggered, |
| 881 | * when listed as conforming in the MP table. */ |
| 882 | |
| 883 | #define default_PCI_trigger(idx) (1) |
| 884 | #define default_PCI_polarity(idx) (1) |
| 885 | |
| 886 | /* MCA interrupts are always polarity zero level triggered, |
| 887 | * when listed as conforming in the MP table. */ |
| 888 | |
| 889 | #define default_MCA_trigger(idx) (1) |
Alexey Starikovskiy | 6728801 | 2008-03-20 14:54:36 +0300 | [diff] [blame] | 890 | #define default_MCA_polarity(idx) default_ISA_polarity(idx) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 891 | |
Shaohua Li | 61fd47e | 2007-11-17 01:05:28 -0500 | [diff] [blame] | 892 | static int MPBIOS_polarity(int idx) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 893 | { |
Jaswinder Singh Rajput | c2c2174 | 2009-01-12 17:47:22 +0530 | [diff] [blame] | 894 | int bus = mp_irqs[idx].srcbus; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 895 | int polarity; |
| 896 | |
| 897 | /* |
| 898 | * Determine IRQ line polarity (high active or low active): |
| 899 | */ |
Jaswinder Singh Rajput | c2c2174 | 2009-01-12 17:47:22 +0530 | [diff] [blame] | 900 | switch (mp_irqs[idx].irqflag & 3) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 901 | { |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 902 | case 0: /* conforms, ie. bus-type dependent polarity */ |
| 903 | if (test_bit(bus, mp_bus_not_pci)) |
| 904 | polarity = default_ISA_polarity(idx); |
| 905 | else |
| 906 | polarity = default_PCI_polarity(idx); |
| 907 | break; |
| 908 | case 1: /* high active */ |
| 909 | { |
| 910 | polarity = 0; |
| 911 | break; |
| 912 | } |
| 913 | case 2: /* reserved */ |
| 914 | { |
| 915 | printk(KERN_WARNING "broken BIOS!!\n"); |
| 916 | polarity = 1; |
| 917 | break; |
| 918 | } |
| 919 | case 3: /* low active */ |
| 920 | { |
| 921 | polarity = 1; |
| 922 | break; |
| 923 | } |
| 924 | default: /* invalid */ |
| 925 | { |
| 926 | printk(KERN_WARNING "broken BIOS!!\n"); |
| 927 | polarity = 1; |
| 928 | break; |
| 929 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 930 | } |
| 931 | return polarity; |
| 932 | } |
| 933 | |
| 934 | static int MPBIOS_trigger(int idx) |
| 935 | { |
Jaswinder Singh Rajput | c2c2174 | 2009-01-12 17:47:22 +0530 | [diff] [blame] | 936 | int bus = mp_irqs[idx].srcbus; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 937 | int trigger; |
| 938 | |
| 939 | /* |
| 940 | * Determine IRQ trigger mode (edge or level sensitive): |
| 941 | */ |
Jaswinder Singh Rajput | c2c2174 | 2009-01-12 17:47:22 +0530 | [diff] [blame] | 942 | switch ((mp_irqs[idx].irqflag>>2) & 3) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 943 | { |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 944 | case 0: /* conforms, ie. bus-type dependent */ |
| 945 | if (test_bit(bus, mp_bus_not_pci)) |
| 946 | trigger = default_ISA_trigger(idx); |
| 947 | else |
| 948 | trigger = default_PCI_trigger(idx); |
Alexey Starikovskiy | c0a282c | 2008-03-20 14:55:02 +0300 | [diff] [blame] | 949 | #if defined(CONFIG_EISA) || defined(CONFIG_MCA) |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 950 | switch (mp_bus_id_to_type[bus]) { |
| 951 | case MP_BUS_ISA: /* ISA pin */ |
| 952 | { |
| 953 | /* set before the switch */ |
| 954 | break; |
| 955 | } |
| 956 | case MP_BUS_EISA: /* EISA pin */ |
| 957 | { |
| 958 | trigger = default_EISA_trigger(idx); |
| 959 | break; |
| 960 | } |
| 961 | case MP_BUS_PCI: /* PCI pin */ |
| 962 | { |
| 963 | /* set before the switch */ |
| 964 | break; |
| 965 | } |
| 966 | case MP_BUS_MCA: /* MCA pin */ |
| 967 | { |
| 968 | trigger = default_MCA_trigger(idx); |
| 969 | break; |
| 970 | } |
| 971 | default: |
| 972 | { |
| 973 | printk(KERN_WARNING "broken BIOS!!\n"); |
| 974 | trigger = 1; |
| 975 | break; |
| 976 | } |
| 977 | } |
| 978 | #endif |
| 979 | break; |
| 980 | case 1: /* edge */ |
Paolo Ciarrocchi | 3606244 | 2008-06-08 13:07:18 +0200 | [diff] [blame] | 981 | { |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 982 | trigger = 0; |
Paolo Ciarrocchi | 3606244 | 2008-06-08 13:07:18 +0200 | [diff] [blame] | 983 | break; |
| 984 | } |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 985 | case 2: /* reserved */ |
Paolo Ciarrocchi | 3606244 | 2008-06-08 13:07:18 +0200 | [diff] [blame] | 986 | { |
| 987 | printk(KERN_WARNING "broken BIOS!!\n"); |
| 988 | trigger = 1; |
| 989 | break; |
| 990 | } |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 991 | case 3: /* level */ |
| 992 | { |
| 993 | trigger = 1; |
| 994 | break; |
| 995 | } |
| 996 | default: /* invalid */ |
| 997 | { |
| 998 | printk(KERN_WARNING "broken BIOS!!\n"); |
| 999 | trigger = 0; |
| 1000 | break; |
| 1001 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1002 | } |
| 1003 | return trigger; |
| 1004 | } |
| 1005 | |
| 1006 | static inline int irq_polarity(int idx) |
| 1007 | { |
| 1008 | return MPBIOS_polarity(idx); |
| 1009 | } |
| 1010 | |
| 1011 | static inline int irq_trigger(int idx) |
| 1012 | { |
| 1013 | return MPBIOS_trigger(idx); |
| 1014 | } |
| 1015 | |
Yinghai Lu | efa2559 | 2008-08-19 20:50:36 -0700 | [diff] [blame] | 1016 | int (*ioapic_renumber_irq)(int ioapic, int irq); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1017 | static int pin_2_irq(int idx, int apic, int pin) |
| 1018 | { |
| 1019 | int irq, i; |
Jaswinder Singh Rajput | c2c2174 | 2009-01-12 17:47:22 +0530 | [diff] [blame] | 1020 | int bus = mp_irqs[idx].srcbus; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1021 | |
| 1022 | /* |
| 1023 | * Debugging check, we are in big trouble if this message pops up! |
| 1024 | */ |
Jaswinder Singh Rajput | c2c2174 | 2009-01-12 17:47:22 +0530 | [diff] [blame] | 1025 | if (mp_irqs[idx].dstirq != pin) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1026 | printk(KERN_ERR "broken BIOS or MPTABLE parser, ayiee!!\n"); |
| 1027 | |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 1028 | if (test_bit(bus, mp_bus_not_pci)) { |
Jaswinder Singh Rajput | c2c2174 | 2009-01-12 17:47:22 +0530 | [diff] [blame] | 1029 | irq = mp_irqs[idx].srcbusirq; |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 1030 | } else { |
Alexey Starikovskiy | 643befe | 2008-03-20 14:54:49 +0300 | [diff] [blame] | 1031 | /* |
| 1032 | * PCI IRQs are mapped in order |
| 1033 | */ |
| 1034 | i = irq = 0; |
| 1035 | while (i < apic) |
| 1036 | irq += nr_ioapic_registers[i++]; |
| 1037 | irq += pin; |
Thomas Gleixner | d6c88a5 | 2008-10-15 15:27:23 +0200 | [diff] [blame] | 1038 | /* |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 1039 | * For MPS mode, so far only needed by ES7000 platform |
| 1040 | */ |
Thomas Gleixner | d6c88a5 | 2008-10-15 15:27:23 +0200 | [diff] [blame] | 1041 | if (ioapic_renumber_irq) |
| 1042 | irq = ioapic_renumber_irq(apic, irq); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1043 | } |
| 1044 | |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 1045 | #ifdef CONFIG_X86_32 |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1046 | /* |
| 1047 | * PCI IRQ command line redirection. Yes, limits are hardcoded. |
| 1048 | */ |
| 1049 | if ((pin >= 16) && (pin <= 23)) { |
| 1050 | if (pirq_entries[pin-16] != -1) { |
| 1051 | if (!pirq_entries[pin-16]) { |
| 1052 | apic_printk(APIC_VERBOSE, KERN_DEBUG |
| 1053 | "disabling PIRQ%d\n", pin-16); |
| 1054 | } else { |
| 1055 | irq = pirq_entries[pin-16]; |
| 1056 | apic_printk(APIC_VERBOSE, KERN_DEBUG |
| 1057 | "using PIRQ%d -> IRQ %d\n", |
| 1058 | pin-16, irq); |
| 1059 | } |
| 1060 | } |
| 1061 | } |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 1062 | #endif |
| 1063 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1064 | return irq; |
| 1065 | } |
| 1066 | |
Yinghai Lu | e20c06f | 2009-05-06 10:08:22 -0700 | [diff] [blame] | 1067 | /* |
| 1068 | * Find a specific PCI IRQ entry. |
| 1069 | * Not an __init, possibly needed by modules |
| 1070 | */ |
| 1071 | int IO_APIC_get_PCI_irq_vector(int bus, int slot, int pin, |
Yinghai Lu | e519807 | 2009-05-15 13:05:16 -0700 | [diff] [blame] | 1072 | struct io_apic_irq_attr *irq_attr) |
Yinghai Lu | e20c06f | 2009-05-06 10:08:22 -0700 | [diff] [blame] | 1073 | { |
| 1074 | int apic, i, best_guess = -1; |
| 1075 | |
| 1076 | apic_printk(APIC_DEBUG, |
| 1077 | "querying PCI -> IRQ mapping bus:%d, slot:%d, pin:%d.\n", |
| 1078 | bus, slot, pin); |
| 1079 | if (test_bit(bus, mp_bus_not_pci)) { |
| 1080 | apic_printk(APIC_VERBOSE, |
| 1081 | "PCI BIOS passed nonexistent PCI bus %d!\n", bus); |
| 1082 | return -1; |
| 1083 | } |
| 1084 | for (i = 0; i < mp_irq_entries; i++) { |
| 1085 | int lbus = mp_irqs[i].srcbus; |
| 1086 | |
| 1087 | for (apic = 0; apic < nr_ioapics; apic++) |
| 1088 | if (mp_ioapics[apic].apicid == mp_irqs[i].dstapic || |
| 1089 | mp_irqs[i].dstapic == MP_APIC_ALL) |
| 1090 | break; |
| 1091 | |
| 1092 | if (!test_bit(lbus, mp_bus_not_pci) && |
| 1093 | !mp_irqs[i].irqtype && |
| 1094 | (bus == lbus) && |
| 1095 | (slot == ((mp_irqs[i].srcbusirq >> 2) & 0x1f))) { |
| 1096 | int irq = pin_2_irq(i, apic, mp_irqs[i].dstirq); |
| 1097 | |
| 1098 | if (!(apic || IO_APIC_IRQ(irq))) |
| 1099 | continue; |
| 1100 | |
| 1101 | if (pin == (mp_irqs[i].srcbusirq & 3)) { |
Yinghai Lu | e519807 | 2009-05-15 13:05:16 -0700 | [diff] [blame] | 1102 | set_io_apic_irq_attr(irq_attr, apic, |
| 1103 | mp_irqs[i].dstirq, |
| 1104 | irq_trigger(i), |
| 1105 | irq_polarity(i)); |
Yinghai Lu | e20c06f | 2009-05-06 10:08:22 -0700 | [diff] [blame] | 1106 | return irq; |
| 1107 | } |
| 1108 | /* |
| 1109 | * Use the first all-but-pin matching entry as a |
| 1110 | * best-guess fuzzy result for broken mptables. |
| 1111 | */ |
| 1112 | if (best_guess < 0) { |
Yinghai Lu | e519807 | 2009-05-15 13:05:16 -0700 | [diff] [blame] | 1113 | set_io_apic_irq_attr(irq_attr, apic, |
| 1114 | mp_irqs[i].dstirq, |
| 1115 | irq_trigger(i), |
| 1116 | irq_polarity(i)); |
Yinghai Lu | e20c06f | 2009-05-06 10:08:22 -0700 | [diff] [blame] | 1117 | best_guess = irq; |
| 1118 | } |
| 1119 | } |
| 1120 | } |
| 1121 | return best_guess; |
| 1122 | } |
| 1123 | EXPORT_SYMBOL(IO_APIC_get_PCI_irq_vector); |
| 1124 | |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 1125 | void lock_vector_lock(void) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1126 | { |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 1127 | /* Used to the online set of cpus does not change |
| 1128 | * during assign_irq_vector. |
| 1129 | */ |
Thomas Gleixner | dade771 | 2009-07-25 18:39:36 +0200 | [diff] [blame] | 1130 | raw_spin_lock(&vector_lock); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1131 | } |
| 1132 | |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 1133 | void unlock_vector_lock(void) |
Eric W. Biederman | ace80ab | 2006-10-04 02:16:47 -0700 | [diff] [blame] | 1134 | { |
Thomas Gleixner | dade771 | 2009-07-25 18:39:36 +0200 | [diff] [blame] | 1135 | raw_spin_unlock(&vector_lock); |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 1136 | } |
| 1137 | |
Mike Travis | e798673 | 2008-12-16 17:33:52 -0800 | [diff] [blame] | 1138 | static int |
| 1139 | __assign_irq_vector(int irq, struct irq_cfg *cfg, const struct cpumask *mask) |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 1140 | { |
Yinghai Lu | 047c8fd | 2008-08-19 20:50:41 -0700 | [diff] [blame] | 1141 | /* |
| 1142 | * NOTE! The local APIC isn't very good at handling |
| 1143 | * multiple interrupts at the same interrupt level. |
| 1144 | * As the interrupt level is determined by taking the |
| 1145 | * vector number and shifting that right by 4, we |
| 1146 | * want to spread these out a bit so that they don't |
| 1147 | * all fall in the same interrupt level. |
| 1148 | * |
| 1149 | * Also, we've got to be careful not to trash gate |
| 1150 | * 0x80, because int 0x80 is hm, kind of importantish. ;) |
| 1151 | */ |
Suresh Siddha | 6579b47 | 2010-01-13 16:19:11 -0800 | [diff] [blame] | 1152 | static int current_vector = FIRST_EXTERNAL_VECTOR + VECTOR_OFFSET_START; |
H. Peter Anvin | ea94396 | 2010-01-04 21:14:41 -0800 | [diff] [blame] | 1153 | static int current_offset = VECTOR_OFFSET_START % 8; |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 1154 | unsigned int old_vector; |
Mike Travis | 22f65d3 | 2008-12-16 17:33:56 -0800 | [diff] [blame] | 1155 | int cpu, err; |
| 1156 | cpumask_var_t tmp_mask; |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 1157 | |
Suresh Siddha | 23359a8 | 2009-10-26 14:24:33 -0800 | [diff] [blame] | 1158 | if (cfg->move_in_progress) |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 1159 | return -EBUSY; |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 1160 | |
Mike Travis | 22f65d3 | 2008-12-16 17:33:56 -0800 | [diff] [blame] | 1161 | if (!alloc_cpumask_var(&tmp_mask, GFP_ATOMIC)) |
| 1162 | return -ENOMEM; |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 1163 | |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 1164 | old_vector = cfg->vector; |
| 1165 | if (old_vector) { |
Mike Travis | 22f65d3 | 2008-12-16 17:33:56 -0800 | [diff] [blame] | 1166 | cpumask_and(tmp_mask, mask, cpu_online_mask); |
| 1167 | cpumask_and(tmp_mask, cfg->domain, tmp_mask); |
| 1168 | if (!cpumask_empty(tmp_mask)) { |
| 1169 | free_cpumask_var(tmp_mask); |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 1170 | return 0; |
Mike Travis | 22f65d3 | 2008-12-16 17:33:56 -0800 | [diff] [blame] | 1171 | } |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 1172 | } |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 1173 | |
Mike Travis | e798673 | 2008-12-16 17:33:52 -0800 | [diff] [blame] | 1174 | /* Only try and allocate irqs on cpus that are present */ |
Mike Travis | 22f65d3 | 2008-12-16 17:33:56 -0800 | [diff] [blame] | 1175 | err = -ENOSPC; |
| 1176 | for_each_cpu_and(cpu, mask, cpu_online_mask) { |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 1177 | int new_cpu; |
| 1178 | int vector, offset; |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 1179 | |
Ingo Molnar | e2d40b1 | 2009-01-28 06:50:47 +0100 | [diff] [blame] | 1180 | apic->vector_allocation_domain(cpu, tmp_mask); |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 1181 | |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 1182 | vector = current_vector; |
| 1183 | offset = current_offset; |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 1184 | next: |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 1185 | vector += 8; |
| 1186 | if (vector >= first_system_vector) { |
Mike Travis | e798673 | 2008-12-16 17:33:52 -0800 | [diff] [blame] | 1187 | /* If out of vectors on large boxen, must share them. */ |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 1188 | offset = (offset + 1) % 8; |
Suresh Siddha | 6579b47 | 2010-01-13 16:19:11 -0800 | [diff] [blame] | 1189 | vector = FIRST_EXTERNAL_VECTOR + offset; |
Yinghai Lu | 7a959cf | 2008-08-19 20:50:32 -0700 | [diff] [blame] | 1190 | } |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 1191 | if (unlikely(current_vector == vector)) |
| 1192 | continue; |
Yinghai Lu | b77b881 | 2008-12-19 15:23:44 -0800 | [diff] [blame] | 1193 | |
| 1194 | if (test_bit(vector, used_vectors)) |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 1195 | goto next; |
Yinghai Lu | b77b881 | 2008-12-19 15:23:44 -0800 | [diff] [blame] | 1196 | |
Mike Travis | 22f65d3 | 2008-12-16 17:33:56 -0800 | [diff] [blame] | 1197 | for_each_cpu_and(new_cpu, tmp_mask, cpu_online_mask) |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 1198 | if (per_cpu(vector_irq, new_cpu)[vector] != -1) |
| 1199 | goto next; |
| 1200 | /* Found one! */ |
| 1201 | current_vector = vector; |
| 1202 | current_offset = offset; |
| 1203 | if (old_vector) { |
| 1204 | cfg->move_in_progress = 1; |
Mike Travis | 22f65d3 | 2008-12-16 17:33:56 -0800 | [diff] [blame] | 1205 | cpumask_copy(cfg->old_domain, cfg->domain); |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 1206 | } |
Mike Travis | 22f65d3 | 2008-12-16 17:33:56 -0800 | [diff] [blame] | 1207 | for_each_cpu_and(new_cpu, tmp_mask, cpu_online_mask) |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 1208 | per_cpu(vector_irq, new_cpu)[vector] = irq; |
| 1209 | cfg->vector = vector; |
Mike Travis | 22f65d3 | 2008-12-16 17:33:56 -0800 | [diff] [blame] | 1210 | cpumask_copy(cfg->domain, tmp_mask); |
| 1211 | err = 0; |
| 1212 | break; |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 1213 | } |
Mike Travis | 22f65d3 | 2008-12-16 17:33:56 -0800 | [diff] [blame] | 1214 | free_cpumask_var(tmp_mask); |
| 1215 | return err; |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 1216 | } |
| 1217 | |
Dimitri Sivanich | 9338ad6 | 2009-10-13 15:32:36 -0500 | [diff] [blame] | 1218 | int assign_irq_vector(int irq, struct irq_cfg *cfg, const struct cpumask *mask) |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 1219 | { |
| 1220 | int err; |
Eric W. Biederman | ace80ab | 2006-10-04 02:16:47 -0700 | [diff] [blame] | 1221 | unsigned long flags; |
Eric W. Biederman | ace80ab | 2006-10-04 02:16:47 -0700 | [diff] [blame] | 1222 | |
Thomas Gleixner | dade771 | 2009-07-25 18:39:36 +0200 | [diff] [blame] | 1223 | raw_spin_lock_irqsave(&vector_lock, flags); |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 1224 | err = __assign_irq_vector(irq, cfg, mask); |
Thomas Gleixner | dade771 | 2009-07-25 18:39:36 +0200 | [diff] [blame] | 1225 | raw_spin_unlock_irqrestore(&vector_lock, flags); |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 1226 | return err; |
| 1227 | } |
| 1228 | |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 1229 | static void __clear_irq_vector(int irq, struct irq_cfg *cfg) |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 1230 | { |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 1231 | int cpu, vector; |
| 1232 | |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 1233 | BUG_ON(!cfg->vector); |
| 1234 | |
| 1235 | vector = cfg->vector; |
Mike Travis | 22f65d3 | 2008-12-16 17:33:56 -0800 | [diff] [blame] | 1236 | for_each_cpu_and(cpu, cfg->domain, cpu_online_mask) |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 1237 | per_cpu(vector_irq, cpu)[vector] = -1; |
| 1238 | |
| 1239 | cfg->vector = 0; |
Mike Travis | 22f65d3 | 2008-12-16 17:33:56 -0800 | [diff] [blame] | 1240 | cpumask_clear(cfg->domain); |
Matthew Wilcox | 0ca4b6b | 2008-11-20 14:09:33 -0700 | [diff] [blame] | 1241 | |
| 1242 | if (likely(!cfg->move_in_progress)) |
| 1243 | return; |
Mike Travis | 22f65d3 | 2008-12-16 17:33:56 -0800 | [diff] [blame] | 1244 | for_each_cpu_and(cpu, cfg->old_domain, cpu_online_mask) { |
Matthew Wilcox | 0ca4b6b | 2008-11-20 14:09:33 -0700 | [diff] [blame] | 1245 | for (vector = FIRST_EXTERNAL_VECTOR; vector < NR_VECTORS; |
| 1246 | vector++) { |
| 1247 | if (per_cpu(vector_irq, cpu)[vector] != irq) |
| 1248 | continue; |
| 1249 | per_cpu(vector_irq, cpu)[vector] = -1; |
| 1250 | break; |
| 1251 | } |
| 1252 | } |
| 1253 | cfg->move_in_progress = 0; |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 1254 | } |
| 1255 | |
| 1256 | void __setup_vector_irq(int cpu) |
| 1257 | { |
| 1258 | /* Initialize vector_irq on a new cpu */ |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 1259 | int irq, vector; |
| 1260 | struct irq_cfg *cfg; |
Yinghai Lu | 0b8f1ef | 2008-12-05 18:58:31 -0800 | [diff] [blame] | 1261 | struct irq_desc *desc; |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 1262 | |
Suresh Siddha | 9d133e5 | 2010-01-29 11:42:21 -0800 | [diff] [blame] | 1263 | /* |
| 1264 | * vector_lock will make sure that we don't run into irq vector |
| 1265 | * assignments that might be happening on another cpu in parallel, |
| 1266 | * while we setup our initial vector to irq mappings. |
| 1267 | */ |
Thomas Gleixner | dade771 | 2009-07-25 18:39:36 +0200 | [diff] [blame] | 1268 | raw_spin_lock(&vector_lock); |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 1269 | /* Mark the inuse vectors */ |
Yinghai Lu | 0b8f1ef | 2008-12-05 18:58:31 -0800 | [diff] [blame] | 1270 | for_each_irq_desc(irq, desc) { |
Yinghai Lu | 0b8f1ef | 2008-12-05 18:58:31 -0800 | [diff] [blame] | 1271 | cfg = desc->chip_data; |
Mike Travis | 22f65d3 | 2008-12-16 17:33:56 -0800 | [diff] [blame] | 1272 | if (!cpumask_test_cpu(cpu, cfg->domain)) |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 1273 | continue; |
| 1274 | vector = cfg->vector; |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 1275 | per_cpu(vector_irq, cpu)[vector] = irq; |
| 1276 | } |
| 1277 | /* Mark the free vectors */ |
| 1278 | for (vector = 0; vector < NR_VECTORS; ++vector) { |
| 1279 | irq = per_cpu(vector_irq, cpu)[vector]; |
| 1280 | if (irq < 0) |
| 1281 | continue; |
| 1282 | |
| 1283 | cfg = irq_cfg(irq); |
Mike Travis | 22f65d3 | 2008-12-16 17:33:56 -0800 | [diff] [blame] | 1284 | if (!cpumask_test_cpu(cpu, cfg->domain)) |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 1285 | per_cpu(vector_irq, cpu)[vector] = -1; |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 1286 | } |
Thomas Gleixner | dade771 | 2009-07-25 18:39:36 +0200 | [diff] [blame] | 1287 | raw_spin_unlock(&vector_lock); |
Eric W. Biederman | ace80ab | 2006-10-04 02:16:47 -0700 | [diff] [blame] | 1288 | } |
Glauber Costa | 3fde690 | 2008-05-28 20:34:19 -0700 | [diff] [blame] | 1289 | |
Ingo Molnar | f5b9ed7 | 2006-10-04 02:16:26 -0700 | [diff] [blame] | 1290 | static struct irq_chip ioapic_chip; |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 1291 | static struct irq_chip ir_ioapic_chip; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1292 | |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 1293 | #define IOAPIC_AUTO -1 |
| 1294 | #define IOAPIC_EDGE 0 |
| 1295 | #define IOAPIC_LEVEL 1 |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1296 | |
Yinghai Lu | 047c8fd | 2008-08-19 20:50:41 -0700 | [diff] [blame] | 1297 | #ifdef CONFIG_X86_32 |
Yinghai Lu | 1d02519 | 2008-08-19 20:50:34 -0700 | [diff] [blame] | 1298 | static inline int IO_APIC_irq_trigger(int irq) |
| 1299 | { |
Thomas Gleixner | d6c88a5 | 2008-10-15 15:27:23 +0200 | [diff] [blame] | 1300 | int apic, idx, pin; |
Yinghai Lu | 1d02519 | 2008-08-19 20:50:34 -0700 | [diff] [blame] | 1301 | |
Thomas Gleixner | d6c88a5 | 2008-10-15 15:27:23 +0200 | [diff] [blame] | 1302 | for (apic = 0; apic < nr_ioapics; apic++) { |
| 1303 | for (pin = 0; pin < nr_ioapic_registers[apic]; pin++) { |
| 1304 | idx = find_irq_entry(apic, pin, mp_INT); |
| 1305 | if ((idx != -1) && (irq == pin_2_irq(idx, apic, pin))) |
| 1306 | return irq_trigger(idx); |
| 1307 | } |
| 1308 | } |
| 1309 | /* |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 1310 | * nonexistent IRQs are edge default |
| 1311 | */ |
Thomas Gleixner | d6c88a5 | 2008-10-15 15:27:23 +0200 | [diff] [blame] | 1312 | return 0; |
Yinghai Lu | 1d02519 | 2008-08-19 20:50:34 -0700 | [diff] [blame] | 1313 | } |
Yinghai Lu | 047c8fd | 2008-08-19 20:50:41 -0700 | [diff] [blame] | 1314 | #else |
| 1315 | static inline int IO_APIC_irq_trigger(int irq) |
| 1316 | { |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 1317 | return 1; |
Yinghai Lu | 047c8fd | 2008-08-19 20:50:41 -0700 | [diff] [blame] | 1318 | } |
| 1319 | #endif |
Yinghai Lu | 1d02519 | 2008-08-19 20:50:34 -0700 | [diff] [blame] | 1320 | |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 1321 | static void ioapic_register_intr(int irq, struct irq_desc *desc, unsigned long trigger) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1322 | { |
Yinghai Lu | 199751d | 2008-08-19 20:50:27 -0700 | [diff] [blame] | 1323 | |
Jan Beulich | 6ebcc00 | 2006-06-26 13:56:46 +0200 | [diff] [blame] | 1324 | if ((trigger == IOAPIC_AUTO && IO_APIC_irq_trigger(irq)) || |
Yinghai Lu | 047c8fd | 2008-08-19 20:50:41 -0700 | [diff] [blame] | 1325 | trigger == IOAPIC_LEVEL) |
Yinghai Lu | 08678b0 | 2008-08-19 20:50:05 -0700 | [diff] [blame] | 1326 | desc->status |= IRQ_LEVEL; |
Yinghai Lu | 047c8fd | 2008-08-19 20:50:41 -0700 | [diff] [blame] | 1327 | else |
| 1328 | desc->status &= ~IRQ_LEVEL; |
| 1329 | |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 1330 | if (irq_remapped(irq)) { |
| 1331 | desc->status |= IRQ_MOVE_PCNTXT; |
| 1332 | if (trigger) |
| 1333 | set_irq_chip_and_handler_name(irq, &ir_ioapic_chip, |
| 1334 | handle_fasteoi_irq, |
| 1335 | "fasteoi"); |
| 1336 | else |
| 1337 | set_irq_chip_and_handler_name(irq, &ir_ioapic_chip, |
| 1338 | handle_edge_irq, "edge"); |
| 1339 | return; |
| 1340 | } |
Suresh Siddha | 29b61be | 2009-03-16 17:05:02 -0700 | [diff] [blame] | 1341 | |
Yinghai Lu | 047c8fd | 2008-08-19 20:50:41 -0700 | [diff] [blame] | 1342 | if ((trigger == IOAPIC_AUTO && IO_APIC_irq_trigger(irq)) || |
| 1343 | trigger == IOAPIC_LEVEL) |
Ingo Molnar | a460e74 | 2006-10-17 00:10:03 -0700 | [diff] [blame] | 1344 | set_irq_chip_and_handler_name(irq, &ioapic_chip, |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 1345 | handle_fasteoi_irq, |
| 1346 | "fasteoi"); |
Yinghai Lu | 047c8fd | 2008-08-19 20:50:41 -0700 | [diff] [blame] | 1347 | else |
Ingo Molnar | a460e74 | 2006-10-17 00:10:03 -0700 | [diff] [blame] | 1348 | set_irq_chip_and_handler_name(irq, &ioapic_chip, |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 1349 | handle_edge_irq, "edge"); |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 1350 | } |
| 1351 | |
Jeremy Fitzhardinge | ca97ab9 | 2009-02-09 12:05:47 -0800 | [diff] [blame] | 1352 | int setup_ioapic_entry(int apic_id, int irq, |
| 1353 | struct IO_APIC_route_entry *entry, |
| 1354 | unsigned int destination, int trigger, |
Suresh Siddha | 0280f7c | 2009-03-16 17:05:01 -0700 | [diff] [blame] | 1355 | int polarity, int vector, int pin) |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 1356 | { |
| 1357 | /* |
| 1358 | * add it to the IO-APIC irq-routing table: |
| 1359 | */ |
| 1360 | memset(entry,0,sizeof(*entry)); |
| 1361 | |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 1362 | if (intr_remapping_enabled) { |
Ingo Molnar | c8d46cf | 2009-01-28 00:14:11 +0100 | [diff] [blame] | 1363 | struct intel_iommu *iommu = map_ioapic_to_ir(apic_id); |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 1364 | struct irte irte; |
| 1365 | struct IR_IO_APIC_route_entry *ir_entry = |
| 1366 | (struct IR_IO_APIC_route_entry *) entry; |
| 1367 | int index; |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 1368 | |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 1369 | if (!iommu) |
Ingo Molnar | c8d46cf | 2009-01-28 00:14:11 +0100 | [diff] [blame] | 1370 | panic("No mapping iommu for ioapic %d\n", apic_id); |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 1371 | |
| 1372 | index = alloc_irte(iommu, irq, 1); |
| 1373 | if (index < 0) |
Ingo Molnar | c8d46cf | 2009-01-28 00:14:11 +0100 | [diff] [blame] | 1374 | panic("Failed to allocate IRTE for ioapic %d\n", apic_id); |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 1375 | |
| 1376 | memset(&irte, 0, sizeof(irte)); |
| 1377 | |
| 1378 | irte.present = 1; |
Ingo Molnar | 9b5bc8d | 2009-01-28 04:09:58 +0100 | [diff] [blame] | 1379 | irte.dst_mode = apic->irq_dest_mode; |
Suresh Siddha | 0280f7c | 2009-03-16 17:05:01 -0700 | [diff] [blame] | 1380 | /* |
| 1381 | * Trigger mode in the IRTE will always be edge, and the |
| 1382 | * actual level or edge trigger will be setup in the IO-APIC |
| 1383 | * RTE. This will help simplify level triggered irq migration. |
| 1384 | * For more details, see the comments above explainig IO-APIC |
| 1385 | * irq migration in the presence of interrupt-remapping. |
| 1386 | */ |
| 1387 | irte.trigger_mode = 0; |
Ingo Molnar | 9b5bc8d | 2009-01-28 04:09:58 +0100 | [diff] [blame] | 1388 | irte.dlvry_mode = apic->irq_delivery_mode; |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 1389 | irte.vector = vector; |
| 1390 | irte.dest_id = IRTE_DEST(destination); |
| 1391 | |
Weidong Han | f007e99 | 2009-05-23 00:41:15 +0800 | [diff] [blame] | 1392 | /* Set source-id of interrupt request */ |
| 1393 | set_ioapic_sid(&irte, apic_id); |
| 1394 | |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 1395 | modify_irte(irq, &irte); |
| 1396 | |
| 1397 | ir_entry->index2 = (index >> 15) & 0x1; |
| 1398 | ir_entry->zero = 0; |
| 1399 | ir_entry->format = 1; |
| 1400 | ir_entry->index = (index & 0x7fff); |
Suresh Siddha | 0280f7c | 2009-03-16 17:05:01 -0700 | [diff] [blame] | 1401 | /* |
| 1402 | * IO-APIC RTE will be configured with virtual vector. |
| 1403 | * irq handler will do the explicit EOI to the io-apic. |
| 1404 | */ |
| 1405 | ir_entry->vector = pin; |
Suresh Siddha | 29b61be | 2009-03-16 17:05:02 -0700 | [diff] [blame] | 1406 | } else { |
Ingo Molnar | 9b5bc8d | 2009-01-28 04:09:58 +0100 | [diff] [blame] | 1407 | entry->delivery_mode = apic->irq_delivery_mode; |
| 1408 | entry->dest_mode = apic->irq_dest_mode; |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 1409 | entry->dest = destination; |
Suresh Siddha | 0280f7c | 2009-03-16 17:05:01 -0700 | [diff] [blame] | 1410 | entry->vector = vector; |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 1411 | } |
| 1412 | |
| 1413 | entry->mask = 0; /* enable IRQ */ |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 1414 | entry->trigger = trigger; |
| 1415 | entry->polarity = polarity; |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 1416 | |
| 1417 | /* Mask level triggered irqs. |
| 1418 | * Use IRQ_DELAYED_DISABLE for edge triggered irqs. |
| 1419 | */ |
| 1420 | if (trigger) |
| 1421 | entry->mask = 1; |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 1422 | return 0; |
| 1423 | } |
| 1424 | |
Ingo Molnar | c8d46cf | 2009-01-28 00:14:11 +0100 | [diff] [blame] | 1425 | static void setup_IO_APIC_irq(int apic_id, int pin, unsigned int irq, struct irq_desc *desc, |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 1426 | int trigger, int polarity) |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 1427 | { |
| 1428 | struct irq_cfg *cfg; |
| 1429 | struct IO_APIC_route_entry entry; |
Mike Travis | 22f65d3 | 2008-12-16 17:33:56 -0800 | [diff] [blame] | 1430 | unsigned int dest; |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 1431 | |
| 1432 | if (!IO_APIC_IRQ(irq)) |
| 1433 | return; |
| 1434 | |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 1435 | cfg = desc->chip_data; |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 1436 | |
Suresh Siddha | 69c89ef | 2010-01-29 11:42:20 -0800 | [diff] [blame] | 1437 | /* |
| 1438 | * For legacy irqs, cfg->domain starts with cpu 0 for legacy |
| 1439 | * controllers like 8259. Now that IO-APIC can handle this irq, update |
| 1440 | * the cfg->domain. |
| 1441 | */ |
| 1442 | if (irq < nr_legacy_irqs && cpumask_test_cpu(0, cfg->domain)) |
| 1443 | apic->vector_allocation_domain(0, cfg->domain); |
| 1444 | |
Ingo Molnar | fe402e1 | 2009-01-28 04:32:51 +0100 | [diff] [blame] | 1445 | if (assign_irq_vector(irq, cfg, apic->target_cpus())) |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 1446 | return; |
| 1447 | |
Ingo Molnar | debccb3 | 2009-01-28 15:20:18 +0100 | [diff] [blame] | 1448 | dest = apic->cpu_mask_to_apicid_and(cfg->domain, apic->target_cpus()); |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 1449 | |
| 1450 | apic_printk(APIC_VERBOSE,KERN_DEBUG |
| 1451 | "IOAPIC[%d]: Set routing entry (%d-%d -> 0x%x -> " |
| 1452 | "IRQ %d Mode:%i Active:%i)\n", |
Ingo Molnar | c8d46cf | 2009-01-28 00:14:11 +0100 | [diff] [blame] | 1453 | apic_id, mp_ioapics[apic_id].apicid, pin, cfg->vector, |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 1454 | irq, trigger, polarity); |
| 1455 | |
| 1456 | |
Ingo Molnar | c8d46cf | 2009-01-28 00:14:11 +0100 | [diff] [blame] | 1457 | if (setup_ioapic_entry(mp_ioapics[apic_id].apicid, irq, &entry, |
Suresh Siddha | 0280f7c | 2009-03-16 17:05:01 -0700 | [diff] [blame] | 1458 | dest, trigger, polarity, cfg->vector, pin)) { |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 1459 | printk("Failed to setup ioapic entry for ioapic %d, pin %d\n", |
Ingo Molnar | c8d46cf | 2009-01-28 00:14:11 +0100 | [diff] [blame] | 1460 | mp_ioapics[apic_id].apicid, pin); |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 1461 | __clear_irq_vector(irq, cfg); |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 1462 | return; |
| 1463 | } |
| 1464 | |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 1465 | ioapic_register_intr(irq, desc, trigger); |
Thomas Gleixner | bc07844 | 2009-08-29 18:09:57 +0200 | [diff] [blame] | 1466 | if (irq < nr_legacy_irqs) |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 1467 | disable_8259A_irq(irq); |
| 1468 | |
Ingo Molnar | c8d46cf | 2009-01-28 00:14:11 +0100 | [diff] [blame] | 1469 | ioapic_write_entry(apic_id, pin, entry); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1470 | } |
| 1471 | |
Yinghai Lu | b9c61b70 | 2009-05-06 10:10:06 -0700 | [diff] [blame] | 1472 | static struct { |
| 1473 | DECLARE_BITMAP(pin_programmed, MP_MAX_IOAPIC_PIN + 1); |
| 1474 | } mp_ioapic_routing[MAX_IO_APICS]; |
| 1475 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1476 | static void __init setup_IO_APIC_irqs(void) |
| 1477 | { |
Eric W. Biederman | fad5399 | 2010-02-28 01:06:34 -0800 | [diff] [blame^] | 1478 | int apic_id, pin, idx, irq; |
Cyrill Gorcunov | 3c2cbd2 | 2008-09-06 14:15:33 +0400 | [diff] [blame] | 1479 | int notcon = 0; |
Yinghai Lu | 0b8f1ef | 2008-12-05 18:58:31 -0800 | [diff] [blame] | 1480 | struct irq_desc *desc; |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 1481 | struct irq_cfg *cfg; |
Yinghai Lu | 85ac16d | 2009-04-27 18:00:38 -0700 | [diff] [blame] | 1482 | int node = cpu_to_node(boot_cpu_id); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1483 | |
| 1484 | apic_printk(APIC_VERBOSE, KERN_DEBUG "init IO_APIC IRQs\n"); |
| 1485 | |
Eric W. Biederman | fad5399 | 2010-02-28 01:06:34 -0800 | [diff] [blame^] | 1486 | for (apic_id = 0; apic_id < nr_ioapics; apic_id++) |
Yinghai Lu | b9c61b70 | 2009-05-06 10:10:06 -0700 | [diff] [blame] | 1487 | for (pin = 0; pin < nr_ioapic_registers[apic_id]; pin++) { |
| 1488 | idx = find_irq_entry(apic_id, pin, mp_INT); |
| 1489 | if (idx == -1) { |
| 1490 | if (!notcon) { |
| 1491 | notcon = 1; |
Cyrill Gorcunov | 56ffa1a | 2008-09-13 13:11:16 +0400 | [diff] [blame] | 1492 | apic_printk(APIC_VERBOSE, |
Yinghai Lu | b9c61b70 | 2009-05-06 10:10:06 -0700 | [diff] [blame] | 1493 | KERN_DEBUG " %d-%d", |
| 1494 | mp_ioapics[apic_id].apicid, pin); |
| 1495 | } else |
| 1496 | apic_printk(APIC_VERBOSE, " %d-%d", |
| 1497 | mp_ioapics[apic_id].apicid, pin); |
| 1498 | continue; |
Cyrill Gorcunov | 3c2cbd2 | 2008-09-06 14:15:33 +0400 | [diff] [blame] | 1499 | } |
Yinghai Lu | b9c61b70 | 2009-05-06 10:10:06 -0700 | [diff] [blame] | 1500 | if (notcon) { |
| 1501 | apic_printk(APIC_VERBOSE, |
| 1502 | " (apicid-pin) not connected\n"); |
| 1503 | notcon = 0; |
| 1504 | } |
| 1505 | |
| 1506 | irq = pin_2_irq(idx, apic_id, pin); |
| 1507 | |
Eric W. Biederman | fad5399 | 2010-02-28 01:06:34 -0800 | [diff] [blame^] | 1508 | if ((apic_id > 0) && (irq > 16)) |
| 1509 | continue; |
| 1510 | |
Yinghai Lu | b9c61b70 | 2009-05-06 10:10:06 -0700 | [diff] [blame] | 1511 | /* |
| 1512 | * Skip the timer IRQ if there's a quirk handler |
| 1513 | * installed and if it returns 1: |
| 1514 | */ |
| 1515 | if (apic->multi_timer_check && |
| 1516 | apic->multi_timer_check(apic_id, irq)) |
| 1517 | continue; |
| 1518 | |
| 1519 | desc = irq_to_desc_alloc_node(irq, node); |
| 1520 | if (!desc) { |
| 1521 | printk(KERN_INFO "can not get irq_desc for %d\n", irq); |
| 1522 | continue; |
| 1523 | } |
| 1524 | cfg = desc->chip_data; |
| 1525 | add_pin_to_irq_node(cfg, node, apic_id, pin); |
Yinghai Lu | 4c6f18f | 2009-05-18 10:23:28 -0700 | [diff] [blame] | 1526 | /* |
| 1527 | * don't mark it in pin_programmed, so later acpi could |
| 1528 | * set it correctly when irq < 16 |
| 1529 | */ |
Yinghai Lu | b9c61b70 | 2009-05-06 10:10:06 -0700 | [diff] [blame] | 1530 | setup_IO_APIC_irq(apic_id, pin, irq, desc, |
| 1531 | irq_trigger(idx), irq_polarity(idx)); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1532 | } |
| 1533 | |
Cyrill Gorcunov | 3c2cbd2 | 2008-09-06 14:15:33 +0400 | [diff] [blame] | 1534 | if (notcon) |
| 1535 | apic_printk(APIC_VERBOSE, |
Cyrill Gorcunov | 2a554fb | 2008-09-08 19:38:06 +0400 | [diff] [blame] | 1536 | " (apicid-pin) not connected\n"); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1537 | } |
| 1538 | |
| 1539 | /* |
Yinghai Lu | 18dce6b | 2010-02-10 01:20:05 -0800 | [diff] [blame] | 1540 | * for the gsit that is not in first ioapic |
| 1541 | * but could not use acpi_register_gsi() |
| 1542 | * like some special sci in IBM x3330 |
| 1543 | */ |
| 1544 | void setup_IO_APIC_irq_extra(u32 gsi) |
| 1545 | { |
| 1546 | int apic_id = 0, pin, idx, irq; |
| 1547 | int node = cpu_to_node(boot_cpu_id); |
| 1548 | struct irq_desc *desc; |
| 1549 | struct irq_cfg *cfg; |
| 1550 | |
| 1551 | /* |
| 1552 | * Convert 'gsi' to 'ioapic.pin'. |
| 1553 | */ |
| 1554 | apic_id = mp_find_ioapic(gsi); |
| 1555 | if (apic_id < 0) |
| 1556 | return; |
| 1557 | |
| 1558 | pin = mp_find_ioapic_pin(apic_id, gsi); |
| 1559 | idx = find_irq_entry(apic_id, pin, mp_INT); |
| 1560 | if (idx == -1) |
| 1561 | return; |
| 1562 | |
| 1563 | irq = pin_2_irq(idx, apic_id, pin); |
| 1564 | #ifdef CONFIG_SPARSE_IRQ |
| 1565 | desc = irq_to_desc(irq); |
| 1566 | if (desc) |
| 1567 | return; |
| 1568 | #endif |
| 1569 | desc = irq_to_desc_alloc_node(irq, node); |
| 1570 | if (!desc) { |
| 1571 | printk(KERN_INFO "can not get irq_desc for %d\n", irq); |
| 1572 | return; |
| 1573 | } |
| 1574 | |
| 1575 | cfg = desc->chip_data; |
| 1576 | add_pin_to_irq_node(cfg, node, apic_id, pin); |
| 1577 | |
| 1578 | if (test_bit(pin, mp_ioapic_routing[apic_id].pin_programmed)) { |
| 1579 | pr_debug("Pin %d-%d already programmed\n", |
| 1580 | mp_ioapics[apic_id].apicid, pin); |
| 1581 | return; |
| 1582 | } |
| 1583 | set_bit(pin, mp_ioapic_routing[apic_id].pin_programmed); |
| 1584 | |
| 1585 | setup_IO_APIC_irq(apic_id, pin, irq, desc, |
| 1586 | irq_trigger(idx), irq_polarity(idx)); |
| 1587 | } |
| 1588 | |
| 1589 | /* |
Maciej W. Rozycki | f7633ce | 2008-05-27 21:19:34 +0100 | [diff] [blame] | 1590 | * Set up the timer pin, possibly with the 8259A-master behind. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1591 | */ |
Ingo Molnar | c8d46cf | 2009-01-28 00:14:11 +0100 | [diff] [blame] | 1592 | static void __init setup_timer_IRQ0_pin(unsigned int apic_id, unsigned int pin, |
Maciej W. Rozycki | f7633ce | 2008-05-27 21:19:34 +0100 | [diff] [blame] | 1593 | int vector) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1594 | { |
| 1595 | struct IO_APIC_route_entry entry; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1596 | |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 1597 | if (intr_remapping_enabled) |
| 1598 | return; |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 1599 | |
Paolo Ciarrocchi | 3606244 | 2008-06-08 13:07:18 +0200 | [diff] [blame] | 1600 | memset(&entry, 0, sizeof(entry)); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1601 | |
| 1602 | /* |
| 1603 | * We use logical delivery to get the timer IRQ |
| 1604 | * to the first CPU. |
| 1605 | */ |
Ingo Molnar | 9b5bc8d | 2009-01-28 04:09:58 +0100 | [diff] [blame] | 1606 | entry.dest_mode = apic->irq_dest_mode; |
Yinghai Lu | f72dcca | 2009-02-08 16:18:03 -0800 | [diff] [blame] | 1607 | entry.mask = 0; /* don't mask IRQ for edge */ |
Ingo Molnar | debccb3 | 2009-01-28 15:20:18 +0100 | [diff] [blame] | 1608 | entry.dest = apic->cpu_mask_to_apicid(apic->target_cpus()); |
Ingo Molnar | 9b5bc8d | 2009-01-28 04:09:58 +0100 | [diff] [blame] | 1609 | entry.delivery_mode = apic->irq_delivery_mode; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1610 | entry.polarity = 0; |
| 1611 | entry.trigger = 0; |
| 1612 | entry.vector = vector; |
| 1613 | |
| 1614 | /* |
| 1615 | * The timer IRQ doesn't have to know that behind the |
Maciej W. Rozycki | f7633ce | 2008-05-27 21:19:34 +0100 | [diff] [blame] | 1616 | * scene we may have a 8259A-master in AEOI mode ... |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1617 | */ |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 1618 | set_irq_chip_and_handler_name(0, &ioapic_chip, handle_edge_irq, "edge"); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1619 | |
| 1620 | /* |
| 1621 | * Add it to the IO-APIC irq-routing table: |
| 1622 | */ |
Ingo Molnar | c8d46cf | 2009-01-28 00:14:11 +0100 | [diff] [blame] | 1623 | ioapic_write_entry(apic_id, pin, entry); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1624 | } |
| 1625 | |
Maciej W. Rozycki | 32f71af | 2008-07-21 00:52:49 +0100 | [diff] [blame] | 1626 | |
| 1627 | __apicdebuginit(void) print_IO_APIC(void) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1628 | { |
| 1629 | int apic, i; |
| 1630 | union IO_APIC_reg_00 reg_00; |
| 1631 | union IO_APIC_reg_01 reg_01; |
| 1632 | union IO_APIC_reg_02 reg_02; |
| 1633 | union IO_APIC_reg_03 reg_03; |
| 1634 | unsigned long flags; |
Yinghai Lu | 0f978f4 | 2008-08-19 20:50:26 -0700 | [diff] [blame] | 1635 | struct irq_cfg *cfg; |
Yinghai Lu | 0b8f1ef | 2008-12-05 18:58:31 -0800 | [diff] [blame] | 1636 | struct irq_desc *desc; |
Yinghai Lu | 8f09cd2 | 2008-08-19 20:50:51 -0700 | [diff] [blame] | 1637 | unsigned int irq; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1638 | |
Paolo Ciarrocchi | 3606244 | 2008-06-08 13:07:18 +0200 | [diff] [blame] | 1639 | printk(KERN_DEBUG "number of MP IRQ sources: %d.\n", mp_irq_entries); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1640 | for (i = 0; i < nr_ioapics; i++) |
| 1641 | printk(KERN_DEBUG "number of IO-APIC #%d registers: %d.\n", |
Jaswinder Singh Rajput | b5ba7e6 | 2009-01-12 17:46:17 +0530 | [diff] [blame] | 1642 | mp_ioapics[i].apicid, nr_ioapic_registers[i]); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1643 | |
| 1644 | /* |
| 1645 | * We are a bit conservative about what we expect. We have to |
| 1646 | * know about every hardware change ASAP. |
| 1647 | */ |
| 1648 | printk(KERN_INFO "testing the IO APIC.......................\n"); |
| 1649 | |
| 1650 | for (apic = 0; apic < nr_ioapics; apic++) { |
| 1651 | |
Thomas Gleixner | dade771 | 2009-07-25 18:39:36 +0200 | [diff] [blame] | 1652 | raw_spin_lock_irqsave(&ioapic_lock, flags); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1653 | reg_00.raw = io_apic_read(apic, 0); |
| 1654 | reg_01.raw = io_apic_read(apic, 1); |
| 1655 | if (reg_01.bits.version >= 0x10) |
| 1656 | reg_02.raw = io_apic_read(apic, 2); |
Thomas Gleixner | d6c88a5 | 2008-10-15 15:27:23 +0200 | [diff] [blame] | 1657 | if (reg_01.bits.version >= 0x20) |
| 1658 | reg_03.raw = io_apic_read(apic, 3); |
Thomas Gleixner | dade771 | 2009-07-25 18:39:36 +0200 | [diff] [blame] | 1659 | raw_spin_unlock_irqrestore(&ioapic_lock, flags); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1660 | |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 1661 | printk("\n"); |
Jaswinder Singh Rajput | b5ba7e6 | 2009-01-12 17:46:17 +0530 | [diff] [blame] | 1662 | printk(KERN_DEBUG "IO APIC #%d......\n", mp_ioapics[apic].apicid); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1663 | printk(KERN_DEBUG ".... register #00: %08X\n", reg_00.raw); |
| 1664 | printk(KERN_DEBUG "....... : physical APIC id: %02X\n", reg_00.bits.ID); |
| 1665 | printk(KERN_DEBUG "....... : Delivery Type: %X\n", reg_00.bits.delivery_type); |
| 1666 | printk(KERN_DEBUG "....... : LTS : %X\n", reg_00.bits.LTS); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1667 | |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 1668 | printk(KERN_DEBUG ".... register #01: %08X\n", *(int *)®_01); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1669 | printk(KERN_DEBUG "....... : max redirection entries: %04X\n", reg_01.bits.entries); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1670 | |
| 1671 | printk(KERN_DEBUG "....... : PRQ implemented: %X\n", reg_01.bits.PRQ); |
| 1672 | printk(KERN_DEBUG "....... : IO APIC version: %04X\n", reg_01.bits.version); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1673 | |
| 1674 | /* |
| 1675 | * Some Intel chipsets with IO APIC VERSION of 0x1? don't have reg_02, |
| 1676 | * but the value of reg_02 is read as the previous read register |
| 1677 | * value, so ignore it if reg_02 == reg_01. |
| 1678 | */ |
| 1679 | if (reg_01.bits.version >= 0x10 && reg_02.raw != reg_01.raw) { |
| 1680 | printk(KERN_DEBUG ".... register #02: %08X\n", reg_02.raw); |
| 1681 | printk(KERN_DEBUG "....... : arbitration: %02X\n", reg_02.bits.arbitration); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1682 | } |
| 1683 | |
| 1684 | /* |
| 1685 | * Some Intel chipsets with IO APIC VERSION of 0x2? don't have reg_02 |
| 1686 | * or reg_03, but the value of reg_0[23] is read as the previous read |
| 1687 | * register value, so ignore it if reg_03 == reg_0[12]. |
| 1688 | */ |
| 1689 | if (reg_01.bits.version >= 0x20 && reg_03.raw != reg_02.raw && |
| 1690 | reg_03.raw != reg_01.raw) { |
| 1691 | printk(KERN_DEBUG ".... register #03: %08X\n", reg_03.raw); |
| 1692 | printk(KERN_DEBUG "....... : Boot DT : %X\n", reg_03.bits.boot_DT); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1693 | } |
| 1694 | |
| 1695 | printk(KERN_DEBUG ".... IRQ redirection table:\n"); |
| 1696 | |
Yinghai Lu | d83e94a | 2008-08-19 20:50:33 -0700 | [diff] [blame] | 1697 | printk(KERN_DEBUG " NR Dst Mask Trig IRR Pol" |
| 1698 | " Stat Dmod Deli Vect: \n"); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1699 | |
| 1700 | for (i = 0; i <= reg_01.bits.entries; i++) { |
| 1701 | struct IO_APIC_route_entry entry; |
| 1702 | |
Andi Kleen | cf4c6a2 | 2006-09-26 10:52:30 +0200 | [diff] [blame] | 1703 | entry = ioapic_read_entry(apic, i); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1704 | |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 1705 | printk(KERN_DEBUG " %02x %03X ", |
| 1706 | i, |
| 1707 | entry.dest |
| 1708 | ); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1709 | |
| 1710 | printk("%1d %1d %1d %1d %1d %1d %1d %02X\n", |
| 1711 | entry.mask, |
| 1712 | entry.trigger, |
| 1713 | entry.irr, |
| 1714 | entry.polarity, |
| 1715 | entry.delivery_status, |
| 1716 | entry.dest_mode, |
| 1717 | entry.delivery_mode, |
| 1718 | entry.vector |
| 1719 | ); |
| 1720 | } |
| 1721 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1722 | printk(KERN_DEBUG "IRQ to pin mappings:\n"); |
Yinghai Lu | 0b8f1ef | 2008-12-05 18:58:31 -0800 | [diff] [blame] | 1723 | for_each_irq_desc(irq, desc) { |
| 1724 | struct irq_pin_list *entry; |
| 1725 | |
Yinghai Lu | 0b8f1ef | 2008-12-05 18:58:31 -0800 | [diff] [blame] | 1726 | cfg = desc->chip_data; |
| 1727 | entry = cfg->irq_2_pin; |
Yinghai Lu | 0f978f4 | 2008-08-19 20:50:26 -0700 | [diff] [blame] | 1728 | if (!entry) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1729 | continue; |
Yinghai Lu | 8f09cd2 | 2008-08-19 20:50:51 -0700 | [diff] [blame] | 1730 | printk(KERN_DEBUG "IRQ%d ", irq); |
Cyrill Gorcunov | 2977fb3 | 2009-08-01 11:47:59 +0400 | [diff] [blame] | 1731 | for_each_irq_pin(entry, cfg->irq_2_pin) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1732 | printk("-> %d:%d", entry->apic, entry->pin); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1733 | printk("\n"); |
| 1734 | } |
| 1735 | |
| 1736 | printk(KERN_INFO ".................................... done.\n"); |
| 1737 | |
| 1738 | return; |
| 1739 | } |
| 1740 | |
Ingo Molnar | 251e1e4 | 2009-07-02 08:54:01 +0200 | [diff] [blame] | 1741 | __apicdebuginit(void) print_APIC_field(int base) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1742 | { |
Ingo Molnar | 251e1e4 | 2009-07-02 08:54:01 +0200 | [diff] [blame] | 1743 | int i; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1744 | |
Ingo Molnar | 251e1e4 | 2009-07-02 08:54:01 +0200 | [diff] [blame] | 1745 | printk(KERN_DEBUG); |
| 1746 | |
| 1747 | for (i = 0; i < 8; i++) |
| 1748 | printk(KERN_CONT "%08x", apic_read(base + i*0x10)); |
| 1749 | |
| 1750 | printk(KERN_CONT "\n"); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1751 | } |
| 1752 | |
Maciej W. Rozycki | 32f71af | 2008-07-21 00:52:49 +0100 | [diff] [blame] | 1753 | __apicdebuginit(void) print_local_APIC(void *dummy) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1754 | { |
Andreas Herrmann | 97a5271 | 2009-05-08 18:23:50 +0200 | [diff] [blame] | 1755 | unsigned int i, v, ver, maxlvt; |
Hiroshi Shimamoto | 7ab6af7 | 2008-07-30 17:36:48 -0700 | [diff] [blame] | 1756 | u64 icr; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1757 | |
Ingo Molnar | 251e1e4 | 2009-07-02 08:54:01 +0200 | [diff] [blame] | 1758 | printk(KERN_DEBUG "printing local APIC contents on CPU#%d/%d:\n", |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1759 | smp_processor_id(), hard_smp_processor_id()); |
Andreas Herrmann | 6682311 | 2008-06-05 16:35:10 +0200 | [diff] [blame] | 1760 | v = apic_read(APIC_ID); |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 1761 | printk(KERN_INFO "... APIC ID: %08x (%01x)\n", v, read_apic_id()); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1762 | v = apic_read(APIC_LVR); |
| 1763 | printk(KERN_INFO "... APIC VERSION: %08x\n", v); |
| 1764 | ver = GET_APIC_VERSION(v); |
Thomas Gleixner | e05d723 | 2007-02-16 01:27:58 -0800 | [diff] [blame] | 1765 | maxlvt = lapic_get_maxlvt(); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1766 | |
| 1767 | v = apic_read(APIC_TASKPRI); |
| 1768 | printk(KERN_DEBUG "... APIC TASKPRI: %08x (%02x)\n", v, v & APIC_TPRI_MASK); |
| 1769 | |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 1770 | if (APIC_INTEGRATED(ver)) { /* !82489DX */ |
Yinghai Lu | a11b5ab | 2008-09-03 16:58:31 -0700 | [diff] [blame] | 1771 | if (!APIC_XAPIC(ver)) { |
| 1772 | v = apic_read(APIC_ARBPRI); |
| 1773 | printk(KERN_DEBUG "... APIC ARBPRI: %08x (%02x)\n", v, |
| 1774 | v & APIC_ARBPRI_MASK); |
| 1775 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1776 | v = apic_read(APIC_PROCPRI); |
| 1777 | printk(KERN_DEBUG "... APIC PROCPRI: %08x\n", v); |
| 1778 | } |
| 1779 | |
Yinghai Lu | a11b5ab | 2008-09-03 16:58:31 -0700 | [diff] [blame] | 1780 | /* |
| 1781 | * Remote read supported only in the 82489DX and local APIC for |
| 1782 | * Pentium processors. |
| 1783 | */ |
| 1784 | if (!APIC_INTEGRATED(ver) || maxlvt == 3) { |
| 1785 | v = apic_read(APIC_RRR); |
| 1786 | printk(KERN_DEBUG "... APIC RRR: %08x\n", v); |
| 1787 | } |
| 1788 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1789 | v = apic_read(APIC_LDR); |
| 1790 | printk(KERN_DEBUG "... APIC LDR: %08x\n", v); |
Yinghai Lu | a11b5ab | 2008-09-03 16:58:31 -0700 | [diff] [blame] | 1791 | if (!x2apic_enabled()) { |
| 1792 | v = apic_read(APIC_DFR); |
| 1793 | printk(KERN_DEBUG "... APIC DFR: %08x\n", v); |
| 1794 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1795 | v = apic_read(APIC_SPIV); |
| 1796 | printk(KERN_DEBUG "... APIC SPIV: %08x\n", v); |
| 1797 | |
| 1798 | printk(KERN_DEBUG "... APIC ISR field:\n"); |
Ingo Molnar | 251e1e4 | 2009-07-02 08:54:01 +0200 | [diff] [blame] | 1799 | print_APIC_field(APIC_ISR); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1800 | printk(KERN_DEBUG "... APIC TMR field:\n"); |
Ingo Molnar | 251e1e4 | 2009-07-02 08:54:01 +0200 | [diff] [blame] | 1801 | print_APIC_field(APIC_TMR); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1802 | printk(KERN_DEBUG "... APIC IRR field:\n"); |
Ingo Molnar | 251e1e4 | 2009-07-02 08:54:01 +0200 | [diff] [blame] | 1803 | print_APIC_field(APIC_IRR); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1804 | |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 1805 | if (APIC_INTEGRATED(ver)) { /* !82489DX */ |
| 1806 | if (maxlvt > 3) /* Due to the Pentium erratum 3AP. */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1807 | apic_write(APIC_ESR, 0); |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 1808 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1809 | v = apic_read(APIC_ESR); |
| 1810 | printk(KERN_DEBUG "... APIC ESR: %08x\n", v); |
| 1811 | } |
| 1812 | |
Hiroshi Shimamoto | 7ab6af7 | 2008-07-30 17:36:48 -0700 | [diff] [blame] | 1813 | icr = apic_icr_read(); |
Ingo Molnar | 0c425ce | 2008-08-18 13:04:26 +0200 | [diff] [blame] | 1814 | printk(KERN_DEBUG "... APIC ICR: %08x\n", (u32)icr); |
| 1815 | printk(KERN_DEBUG "... APIC ICR2: %08x\n", (u32)(icr >> 32)); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1816 | |
| 1817 | v = apic_read(APIC_LVTT); |
| 1818 | printk(KERN_DEBUG "... APIC LVTT: %08x\n", v); |
| 1819 | |
| 1820 | if (maxlvt > 3) { /* PC is LVT#4. */ |
| 1821 | v = apic_read(APIC_LVTPC); |
| 1822 | printk(KERN_DEBUG "... APIC LVTPC: %08x\n", v); |
| 1823 | } |
| 1824 | v = apic_read(APIC_LVT0); |
| 1825 | printk(KERN_DEBUG "... APIC LVT0: %08x\n", v); |
| 1826 | v = apic_read(APIC_LVT1); |
| 1827 | printk(KERN_DEBUG "... APIC LVT1: %08x\n", v); |
| 1828 | |
| 1829 | if (maxlvt > 2) { /* ERR is LVT#3. */ |
| 1830 | v = apic_read(APIC_LVTERR); |
| 1831 | printk(KERN_DEBUG "... APIC LVTERR: %08x\n", v); |
| 1832 | } |
| 1833 | |
| 1834 | v = apic_read(APIC_TMICT); |
| 1835 | printk(KERN_DEBUG "... APIC TMICT: %08x\n", v); |
| 1836 | v = apic_read(APIC_TMCCT); |
| 1837 | printk(KERN_DEBUG "... APIC TMCCT: %08x\n", v); |
| 1838 | v = apic_read(APIC_TDCR); |
| 1839 | printk(KERN_DEBUG "... APIC TDCR: %08x\n", v); |
Andreas Herrmann | 97a5271 | 2009-05-08 18:23:50 +0200 | [diff] [blame] | 1840 | |
| 1841 | if (boot_cpu_has(X86_FEATURE_EXTAPIC)) { |
| 1842 | v = apic_read(APIC_EFEAT); |
| 1843 | maxlvt = (v >> 16) & 0xff; |
| 1844 | printk(KERN_DEBUG "... APIC EFEAT: %08x\n", v); |
| 1845 | v = apic_read(APIC_ECTRL); |
| 1846 | printk(KERN_DEBUG "... APIC ECTRL: %08x\n", v); |
| 1847 | for (i = 0; i < maxlvt; i++) { |
| 1848 | v = apic_read(APIC_EILVTn(i)); |
| 1849 | printk(KERN_DEBUG "... APIC EILVT%d: %08x\n", i, v); |
| 1850 | } |
| 1851 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1852 | printk("\n"); |
| 1853 | } |
| 1854 | |
Cyrill Gorcunov | 2626eb2 | 2009-10-14 00:07:05 +0400 | [diff] [blame] | 1855 | __apicdebuginit(void) print_local_APICs(int maxcpu) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1856 | { |
Yinghai Lu | ffd5aae | 2008-08-19 20:50:50 -0700 | [diff] [blame] | 1857 | int cpu; |
| 1858 | |
Cyrill Gorcunov | 2626eb2 | 2009-10-14 00:07:05 +0400 | [diff] [blame] | 1859 | if (!maxcpu) |
| 1860 | return; |
| 1861 | |
Yinghai Lu | ffd5aae | 2008-08-19 20:50:50 -0700 | [diff] [blame] | 1862 | preempt_disable(); |
Cyrill Gorcunov | 2626eb2 | 2009-10-14 00:07:05 +0400 | [diff] [blame] | 1863 | for_each_online_cpu(cpu) { |
| 1864 | if (cpu >= maxcpu) |
| 1865 | break; |
Yinghai Lu | ffd5aae | 2008-08-19 20:50:50 -0700 | [diff] [blame] | 1866 | smp_call_function_single(cpu, print_local_APIC, NULL, 1); |
Cyrill Gorcunov | 2626eb2 | 2009-10-14 00:07:05 +0400 | [diff] [blame] | 1867 | } |
Yinghai Lu | ffd5aae | 2008-08-19 20:50:50 -0700 | [diff] [blame] | 1868 | preempt_enable(); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1869 | } |
| 1870 | |
Maciej W. Rozycki | 32f71af | 2008-07-21 00:52:49 +0100 | [diff] [blame] | 1871 | __apicdebuginit(void) print_PIC(void) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1872 | { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1873 | unsigned int v; |
| 1874 | unsigned long flags; |
| 1875 | |
Cyrill Gorcunov | 2626eb2 | 2009-10-14 00:07:05 +0400 | [diff] [blame] | 1876 | if (!nr_legacy_irqs) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1877 | return; |
| 1878 | |
| 1879 | printk(KERN_DEBUG "\nprinting PIC contents\n"); |
| 1880 | |
Thomas Gleixner | 5619c28 | 2009-07-25 18:35:11 +0200 | [diff] [blame] | 1881 | raw_spin_lock_irqsave(&i8259A_lock, flags); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1882 | |
| 1883 | v = inb(0xa1) << 8 | inb(0x21); |
| 1884 | printk(KERN_DEBUG "... PIC IMR: %04x\n", v); |
| 1885 | |
| 1886 | v = inb(0xa0) << 8 | inb(0x20); |
| 1887 | printk(KERN_DEBUG "... PIC IRR: %04x\n", v); |
| 1888 | |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 1889 | outb(0x0b,0xa0); |
| 1890 | outb(0x0b,0x20); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1891 | v = inb(0xa0) << 8 | inb(0x20); |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 1892 | outb(0x0a,0xa0); |
| 1893 | outb(0x0a,0x20); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1894 | |
Thomas Gleixner | 5619c28 | 2009-07-25 18:35:11 +0200 | [diff] [blame] | 1895 | raw_spin_unlock_irqrestore(&i8259A_lock, flags); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1896 | |
| 1897 | printk(KERN_DEBUG "... PIC ISR: %04x\n", v); |
| 1898 | |
| 1899 | v = inb(0x4d1) << 8 | inb(0x4d0); |
| 1900 | printk(KERN_DEBUG "... PIC ELCR: %04x\n", v); |
| 1901 | } |
| 1902 | |
Cyrill Gorcunov | 2626eb2 | 2009-10-14 00:07:05 +0400 | [diff] [blame] | 1903 | static int __initdata show_lapic = 1; |
| 1904 | static __init int setup_show_lapic(char *arg) |
Maciej W. Rozycki | 32f71af | 2008-07-21 00:52:49 +0100 | [diff] [blame] | 1905 | { |
Cyrill Gorcunov | 2626eb2 | 2009-10-14 00:07:05 +0400 | [diff] [blame] | 1906 | int num = -1; |
| 1907 | |
| 1908 | if (strcmp(arg, "all") == 0) { |
| 1909 | show_lapic = CONFIG_NR_CPUS; |
| 1910 | } else { |
| 1911 | get_option(&arg, &num); |
| 1912 | if (num >= 0) |
| 1913 | show_lapic = num; |
| 1914 | } |
| 1915 | |
| 1916 | return 1; |
| 1917 | } |
| 1918 | __setup("show_lapic=", setup_show_lapic); |
| 1919 | |
| 1920 | __apicdebuginit(int) print_ICs(void) |
| 1921 | { |
| 1922 | if (apic_verbosity == APIC_QUIET) |
| 1923 | return 0; |
| 1924 | |
Maciej W. Rozycki | 32f71af | 2008-07-21 00:52:49 +0100 | [diff] [blame] | 1925 | print_PIC(); |
Yinghai Lu | 4797f6b | 2009-05-02 10:40:57 -0700 | [diff] [blame] | 1926 | |
| 1927 | /* don't print out if apic is not there */ |
Cyrill Gorcunov | 8312136 | 2009-09-15 11:12:30 +0400 | [diff] [blame] | 1928 | if (!cpu_has_apic && !apic_from_smp_config()) |
Yinghai Lu | 4797f6b | 2009-05-02 10:40:57 -0700 | [diff] [blame] | 1929 | return 0; |
| 1930 | |
Cyrill Gorcunov | 2626eb2 | 2009-10-14 00:07:05 +0400 | [diff] [blame] | 1931 | print_local_APICs(show_lapic); |
Maciej W. Rozycki | 32f71af | 2008-07-21 00:52:49 +0100 | [diff] [blame] | 1932 | print_IO_APIC(); |
| 1933 | |
| 1934 | return 0; |
| 1935 | } |
| 1936 | |
Cyrill Gorcunov | 2626eb2 | 2009-10-14 00:07:05 +0400 | [diff] [blame] | 1937 | fs_initcall(print_ICs); |
Maciej W. Rozycki | 32f71af | 2008-07-21 00:52:49 +0100 | [diff] [blame] | 1938 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1939 | |
Yinghai Lu | efa2559 | 2008-08-19 20:50:36 -0700 | [diff] [blame] | 1940 | /* Where if anywhere is the i8259 connect in external int mode */ |
| 1941 | static struct { int pin, apic; } ioapic_i8259 = { -1, -1 }; |
| 1942 | |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 1943 | void __init enable_IO_APIC(void) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1944 | { |
| 1945 | union IO_APIC_reg_01 reg_01; |
Eric W. Biederman | fcfd636 | 2005-10-30 14:59:39 -0800 | [diff] [blame] | 1946 | int i8259_apic, i8259_pin; |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 1947 | int apic; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1948 | unsigned long flags; |
| 1949 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1950 | /* |
| 1951 | * The number of IO-APIC IRQ registers (== #pins): |
| 1952 | */ |
Eric W. Biederman | fcfd636 | 2005-10-30 14:59:39 -0800 | [diff] [blame] | 1953 | for (apic = 0; apic < nr_ioapics; apic++) { |
Thomas Gleixner | dade771 | 2009-07-25 18:39:36 +0200 | [diff] [blame] | 1954 | raw_spin_lock_irqsave(&ioapic_lock, flags); |
Eric W. Biederman | fcfd636 | 2005-10-30 14:59:39 -0800 | [diff] [blame] | 1955 | reg_01.raw = io_apic_read(apic, 1); |
Thomas Gleixner | dade771 | 2009-07-25 18:39:36 +0200 | [diff] [blame] | 1956 | raw_spin_unlock_irqrestore(&ioapic_lock, flags); |
Eric W. Biederman | fcfd636 | 2005-10-30 14:59:39 -0800 | [diff] [blame] | 1957 | nr_ioapic_registers[apic] = reg_01.bits.entries+1; |
| 1958 | } |
Thomas Gleixner | bc07844 | 2009-08-29 18:09:57 +0200 | [diff] [blame] | 1959 | |
| 1960 | if (!nr_legacy_irqs) |
| 1961 | return; |
| 1962 | |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 1963 | for(apic = 0; apic < nr_ioapics; apic++) { |
Eric W. Biederman | fcfd636 | 2005-10-30 14:59:39 -0800 | [diff] [blame] | 1964 | int pin; |
| 1965 | /* See if any of the pins is in ExtINT mode */ |
Eric W. Biederman | 1008fdd | 2006-01-11 22:46:06 +0100 | [diff] [blame] | 1966 | for (pin = 0; pin < nr_ioapic_registers[apic]; pin++) { |
Eric W. Biederman | fcfd636 | 2005-10-30 14:59:39 -0800 | [diff] [blame] | 1967 | struct IO_APIC_route_entry entry; |
Andi Kleen | cf4c6a2 | 2006-09-26 10:52:30 +0200 | [diff] [blame] | 1968 | entry = ioapic_read_entry(apic, pin); |
Eric W. Biederman | fcfd636 | 2005-10-30 14:59:39 -0800 | [diff] [blame] | 1969 | |
Eric W. Biederman | fcfd636 | 2005-10-30 14:59:39 -0800 | [diff] [blame] | 1970 | /* If the interrupt line is enabled and in ExtInt mode |
| 1971 | * I have found the pin where the i8259 is connected. |
| 1972 | */ |
| 1973 | if ((entry.mask == 0) && (entry.delivery_mode == dest_ExtINT)) { |
| 1974 | ioapic_i8259.apic = apic; |
| 1975 | ioapic_i8259.pin = pin; |
| 1976 | goto found_i8259; |
| 1977 | } |
| 1978 | } |
| 1979 | } |
| 1980 | found_i8259: |
| 1981 | /* Look to see what if the MP table has reported the ExtINT */ |
| 1982 | /* If we could not find the appropriate pin by looking at the ioapic |
| 1983 | * the i8259 probably is not connected the ioapic but give the |
| 1984 | * mptable a chance anyway. |
| 1985 | */ |
| 1986 | i8259_pin = find_isa_irq_pin(0, mp_ExtINT); |
| 1987 | i8259_apic = find_isa_irq_apic(0, mp_ExtINT); |
| 1988 | /* Trust the MP table if nothing is setup in the hardware */ |
| 1989 | if ((ioapic_i8259.pin == -1) && (i8259_pin >= 0)) { |
| 1990 | printk(KERN_WARNING "ExtINT not setup in hardware but reported by MP table\n"); |
| 1991 | ioapic_i8259.pin = i8259_pin; |
| 1992 | ioapic_i8259.apic = i8259_apic; |
| 1993 | } |
| 1994 | /* Complain if the MP table and the hardware disagree */ |
| 1995 | if (((ioapic_i8259.apic != i8259_apic) || (ioapic_i8259.pin != i8259_pin)) && |
| 1996 | (i8259_pin >= 0) && (ioapic_i8259.pin >= 0)) |
| 1997 | { |
| 1998 | printk(KERN_WARNING "ExtINT in hardware and MP table differ\n"); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1999 | } |
| 2000 | |
| 2001 | /* |
| 2002 | * Do not trust the IO-APIC being empty at bootup |
| 2003 | */ |
| 2004 | clear_IO_APIC(); |
| 2005 | } |
| 2006 | |
| 2007 | /* |
| 2008 | * Not an __init, needed by the reboot code |
| 2009 | */ |
| 2010 | void disable_IO_APIC(void) |
| 2011 | { |
| 2012 | /* |
| 2013 | * Clear the IO-APIC before rebooting: |
| 2014 | */ |
| 2015 | clear_IO_APIC(); |
| 2016 | |
Thomas Gleixner | bc07844 | 2009-08-29 18:09:57 +0200 | [diff] [blame] | 2017 | if (!nr_legacy_irqs) |
| 2018 | return; |
| 2019 | |
Eric W. Biederman | 650927e | 2005-06-25 14:57:44 -0700 | [diff] [blame] | 2020 | /* |
Karsten Wiese | 0b968d2 | 2005-09-09 12:59:04 +0200 | [diff] [blame] | 2021 | * If the i8259 is routed through an IOAPIC |
Eric W. Biederman | 650927e | 2005-06-25 14:57:44 -0700 | [diff] [blame] | 2022 | * Put that IOAPIC in virtual wire mode |
Karsten Wiese | 0b968d2 | 2005-09-09 12:59:04 +0200 | [diff] [blame] | 2023 | * so legacy interrupts can be delivered. |
Suresh Siddha | 7c6d9f9 | 2009-03-16 17:04:59 -0700 | [diff] [blame] | 2024 | * |
| 2025 | * With interrupt-remapping, for now we will use virtual wire A mode, |
| 2026 | * as virtual wire B is little complex (need to configure both |
| 2027 | * IOAPIC RTE aswell as interrupt-remapping table entry). |
| 2028 | * As this gets called during crash dump, keep this simple for now. |
Eric W. Biederman | 650927e | 2005-06-25 14:57:44 -0700 | [diff] [blame] | 2029 | */ |
Suresh Siddha | 7c6d9f9 | 2009-03-16 17:04:59 -0700 | [diff] [blame] | 2030 | if (ioapic_i8259.pin != -1 && !intr_remapping_enabled) { |
Eric W. Biederman | 650927e | 2005-06-25 14:57:44 -0700 | [diff] [blame] | 2031 | struct IO_APIC_route_entry entry; |
Eric W. Biederman | 650927e | 2005-06-25 14:57:44 -0700 | [diff] [blame] | 2032 | |
| 2033 | memset(&entry, 0, sizeof(entry)); |
| 2034 | entry.mask = 0; /* Enabled */ |
| 2035 | entry.trigger = 0; /* Edge */ |
| 2036 | entry.irr = 0; |
| 2037 | entry.polarity = 0; /* High */ |
| 2038 | entry.delivery_status = 0; |
| 2039 | entry.dest_mode = 0; /* Physical */ |
Eric W. Biederman | fcfd636 | 2005-10-30 14:59:39 -0800 | [diff] [blame] | 2040 | entry.delivery_mode = dest_ExtINT; /* ExtInt */ |
Eric W. Biederman | 650927e | 2005-06-25 14:57:44 -0700 | [diff] [blame] | 2041 | entry.vector = 0; |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 2042 | entry.dest = read_apic_id(); |
Eric W. Biederman | 650927e | 2005-06-25 14:57:44 -0700 | [diff] [blame] | 2043 | |
| 2044 | /* |
| 2045 | * Add it to the IO-APIC irq-routing table: |
| 2046 | */ |
Andi Kleen | cf4c6a2 | 2006-09-26 10:52:30 +0200 | [diff] [blame] | 2047 | ioapic_write_entry(ioapic_i8259.apic, ioapic_i8259.pin, entry); |
Eric W. Biederman | 650927e | 2005-06-25 14:57:44 -0700 | [diff] [blame] | 2048 | } |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 2049 | |
Suresh Siddha | 7c6d9f9 | 2009-03-16 17:04:59 -0700 | [diff] [blame] | 2050 | /* |
| 2051 | * Use virtual wire A mode when interrupt remapping is enabled. |
| 2052 | */ |
Cyrill Gorcunov | 8312136 | 2009-09-15 11:12:30 +0400 | [diff] [blame] | 2053 | if (cpu_has_apic || apic_from_smp_config()) |
Cyrill Gorcunov | 3f4c395 | 2009-06-17 22:13:22 +0400 | [diff] [blame] | 2054 | disconnect_bsp_APIC(!intr_remapping_enabled && |
| 2055 | ioapic_i8259.pin != -1); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2056 | } |
| 2057 | |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 2058 | #ifdef CONFIG_X86_32 |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2059 | /* |
| 2060 | * function to set the IO-APIC physical IDs based on the |
| 2061 | * values stored in the MPC table. |
| 2062 | * |
| 2063 | * by Matt Domsch <Matt_Domsch@dell.com> Tue Dec 21 12:25:05 CST 1999 |
| 2064 | */ |
| 2065 | |
Thomas Gleixner | de93410 | 2009-08-20 09:27:29 +0200 | [diff] [blame] | 2066 | void __init setup_ioapic_ids_from_mpc(void) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2067 | { |
| 2068 | union IO_APIC_reg_00 reg_00; |
| 2069 | physid_mask_t phys_id_present_map; |
Ingo Molnar | c8d46cf | 2009-01-28 00:14:11 +0100 | [diff] [blame] | 2070 | int apic_id; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2071 | int i; |
| 2072 | unsigned char old_id; |
| 2073 | unsigned long flags; |
| 2074 | |
Thomas Gleixner | de93410 | 2009-08-20 09:27:29 +0200 | [diff] [blame] | 2075 | if (acpi_ioapic) |
Yinghai Lu | d49c428 | 2008-06-08 18:31:54 -0700 | [diff] [blame] | 2076 | return; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2077 | /* |
Natalie Protasevich | ca05fea | 2005-06-23 00:08:22 -0700 | [diff] [blame] | 2078 | * Don't check I/O APIC IDs for xAPIC systems. They have |
| 2079 | * no meaning without the serial APIC bus. |
| 2080 | */ |
Shaohua Li | 7c5c1e4 | 2006-03-23 02:59:53 -0800 | [diff] [blame] | 2081 | if (!(boot_cpu_data.x86_vendor == X86_VENDOR_INTEL) |
| 2082 | || APIC_XAPIC(apic_version[boot_cpu_physical_apicid])) |
Natalie Protasevich | ca05fea | 2005-06-23 00:08:22 -0700 | [diff] [blame] | 2083 | return; |
| 2084 | /* |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2085 | * This is broken; anything with a real cpu count has to |
| 2086 | * circumvent this idiocy regardless. |
| 2087 | */ |
Cyrill Gorcunov | 7abc075 | 2009-11-10 01:06:59 +0300 | [diff] [blame] | 2088 | apic->ioapic_phys_id_map(&phys_cpu_present_map, &phys_id_present_map); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2089 | |
| 2090 | /* |
| 2091 | * Set the IOAPIC ID to the value stored in the MPC table. |
| 2092 | */ |
Ingo Molnar | c8d46cf | 2009-01-28 00:14:11 +0100 | [diff] [blame] | 2093 | for (apic_id = 0; apic_id < nr_ioapics; apic_id++) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2094 | |
| 2095 | /* Read the register 0 value */ |
Thomas Gleixner | dade771 | 2009-07-25 18:39:36 +0200 | [diff] [blame] | 2096 | raw_spin_lock_irqsave(&ioapic_lock, flags); |
Ingo Molnar | c8d46cf | 2009-01-28 00:14:11 +0100 | [diff] [blame] | 2097 | reg_00.raw = io_apic_read(apic_id, 0); |
Thomas Gleixner | dade771 | 2009-07-25 18:39:36 +0200 | [diff] [blame] | 2098 | raw_spin_unlock_irqrestore(&ioapic_lock, flags); |
Paolo Ciarrocchi | 3606244 | 2008-06-08 13:07:18 +0200 | [diff] [blame] | 2099 | |
Ingo Molnar | c8d46cf | 2009-01-28 00:14:11 +0100 | [diff] [blame] | 2100 | old_id = mp_ioapics[apic_id].apicid; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2101 | |
Ingo Molnar | c8d46cf | 2009-01-28 00:14:11 +0100 | [diff] [blame] | 2102 | if (mp_ioapics[apic_id].apicid >= get_physical_broadcast()) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2103 | printk(KERN_ERR "BIOS bug, IO-APIC#%d ID is %d in the MPC table!...\n", |
Ingo Molnar | c8d46cf | 2009-01-28 00:14:11 +0100 | [diff] [blame] | 2104 | apic_id, mp_ioapics[apic_id].apicid); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2105 | printk(KERN_ERR "... fixing up to %d. (tell your hw vendor)\n", |
| 2106 | reg_00.bits.ID); |
Ingo Molnar | c8d46cf | 2009-01-28 00:14:11 +0100 | [diff] [blame] | 2107 | mp_ioapics[apic_id].apicid = reg_00.bits.ID; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2108 | } |
| 2109 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2110 | /* |
| 2111 | * Sanity check, is the ID really free? Every APIC in a |
| 2112 | * system must have a unique ID or we get lots of nice |
| 2113 | * 'stuck on smp_invalidate_needed IPI wait' messages. |
| 2114 | */ |
Cyrill Gorcunov | 7abc075 | 2009-11-10 01:06:59 +0300 | [diff] [blame] | 2115 | if (apic->check_apicid_used(&phys_id_present_map, |
Ingo Molnar | c8d46cf | 2009-01-28 00:14:11 +0100 | [diff] [blame] | 2116 | mp_ioapics[apic_id].apicid)) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2117 | printk(KERN_ERR "BIOS bug, IO-APIC#%d ID %d is already used!...\n", |
Ingo Molnar | c8d46cf | 2009-01-28 00:14:11 +0100 | [diff] [blame] | 2118 | apic_id, mp_ioapics[apic_id].apicid); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2119 | for (i = 0; i < get_physical_broadcast(); i++) |
| 2120 | if (!physid_isset(i, phys_id_present_map)) |
| 2121 | break; |
| 2122 | if (i >= get_physical_broadcast()) |
| 2123 | panic("Max APIC ID exceeded!\n"); |
| 2124 | printk(KERN_ERR "... fixing up to %d. (tell your hw vendor)\n", |
| 2125 | i); |
| 2126 | physid_set(i, phys_id_present_map); |
Ingo Molnar | c8d46cf | 2009-01-28 00:14:11 +0100 | [diff] [blame] | 2127 | mp_ioapics[apic_id].apicid = i; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2128 | } else { |
| 2129 | physid_mask_t tmp; |
Cyrill Gorcunov | 7abc075 | 2009-11-10 01:06:59 +0300 | [diff] [blame] | 2130 | apic->apicid_to_cpu_present(mp_ioapics[apic_id].apicid, &tmp); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2131 | apic_printk(APIC_VERBOSE, "Setting %d in the " |
| 2132 | "phys_id_present_map\n", |
Ingo Molnar | c8d46cf | 2009-01-28 00:14:11 +0100 | [diff] [blame] | 2133 | mp_ioapics[apic_id].apicid); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2134 | physids_or(phys_id_present_map, phys_id_present_map, tmp); |
| 2135 | } |
| 2136 | |
| 2137 | |
| 2138 | /* |
| 2139 | * We need to adjust the IRQ routing table |
| 2140 | * if the ID changed. |
| 2141 | */ |
Ingo Molnar | c8d46cf | 2009-01-28 00:14:11 +0100 | [diff] [blame] | 2142 | if (old_id != mp_ioapics[apic_id].apicid) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2143 | for (i = 0; i < mp_irq_entries; i++) |
Jaswinder Singh Rajput | c2c2174 | 2009-01-12 17:47:22 +0530 | [diff] [blame] | 2144 | if (mp_irqs[i].dstapic == old_id) |
| 2145 | mp_irqs[i].dstapic |
Ingo Molnar | c8d46cf | 2009-01-28 00:14:11 +0100 | [diff] [blame] | 2146 | = mp_ioapics[apic_id].apicid; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2147 | |
| 2148 | /* |
| 2149 | * Read the right value from the MPC table and |
| 2150 | * write it into the ID register. |
Paolo Ciarrocchi | 3606244 | 2008-06-08 13:07:18 +0200 | [diff] [blame] | 2151 | */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2152 | apic_printk(APIC_VERBOSE, KERN_INFO |
| 2153 | "...changing IO-APIC physical APIC ID to %d ...", |
Ingo Molnar | c8d46cf | 2009-01-28 00:14:11 +0100 | [diff] [blame] | 2154 | mp_ioapics[apic_id].apicid); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2155 | |
Ingo Molnar | c8d46cf | 2009-01-28 00:14:11 +0100 | [diff] [blame] | 2156 | reg_00.bits.ID = mp_ioapics[apic_id].apicid; |
Thomas Gleixner | dade771 | 2009-07-25 18:39:36 +0200 | [diff] [blame] | 2157 | raw_spin_lock_irqsave(&ioapic_lock, flags); |
Ingo Molnar | c8d46cf | 2009-01-28 00:14:11 +0100 | [diff] [blame] | 2158 | io_apic_write(apic_id, 0, reg_00.raw); |
Thomas Gleixner | dade771 | 2009-07-25 18:39:36 +0200 | [diff] [blame] | 2159 | raw_spin_unlock_irqrestore(&ioapic_lock, flags); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2160 | |
| 2161 | /* |
| 2162 | * Sanity check |
| 2163 | */ |
Thomas Gleixner | dade771 | 2009-07-25 18:39:36 +0200 | [diff] [blame] | 2164 | raw_spin_lock_irqsave(&ioapic_lock, flags); |
Ingo Molnar | c8d46cf | 2009-01-28 00:14:11 +0100 | [diff] [blame] | 2165 | reg_00.raw = io_apic_read(apic_id, 0); |
Thomas Gleixner | dade771 | 2009-07-25 18:39:36 +0200 | [diff] [blame] | 2166 | raw_spin_unlock_irqrestore(&ioapic_lock, flags); |
Ingo Molnar | c8d46cf | 2009-01-28 00:14:11 +0100 | [diff] [blame] | 2167 | if (reg_00.bits.ID != mp_ioapics[apic_id].apicid) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2168 | printk("could not set ID!\n"); |
| 2169 | else |
| 2170 | apic_printk(APIC_VERBOSE, " ok.\n"); |
| 2171 | } |
| 2172 | } |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 2173 | #endif |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2174 | |
Zachary Amsden | 7ce0bcf | 2007-02-13 13:26:21 +0100 | [diff] [blame] | 2175 | int no_timer_check __initdata; |
Zachary Amsden | 8542b20 | 2006-12-07 02:14:09 +0100 | [diff] [blame] | 2176 | |
| 2177 | static int __init notimercheck(char *s) |
| 2178 | { |
| 2179 | no_timer_check = 1; |
| 2180 | return 1; |
| 2181 | } |
| 2182 | __setup("no_timer_check", notimercheck); |
| 2183 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2184 | /* |
| 2185 | * There is a nasty bug in some older SMP boards, their mptable lies |
| 2186 | * about the timer IRQ. We do the following to work around the situation: |
| 2187 | * |
| 2188 | * - timer IRQ defaults to IO-APIC IRQ |
| 2189 | * - if this function detects that timer IRQs are defunct, then we fall |
| 2190 | * back to ISA timer IRQs |
| 2191 | */ |
Adrian Bunk | f0a7a5c | 2007-07-21 17:10:29 +0200 | [diff] [blame] | 2192 | static int __init timer_irq_works(void) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2193 | { |
| 2194 | unsigned long t1 = jiffies; |
Ingo Molnar | 4aae070 | 2007-12-18 18:05:58 +0100 | [diff] [blame] | 2195 | unsigned long flags; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2196 | |
Zachary Amsden | 8542b20 | 2006-12-07 02:14:09 +0100 | [diff] [blame] | 2197 | if (no_timer_check) |
| 2198 | return 1; |
| 2199 | |
Ingo Molnar | 4aae070 | 2007-12-18 18:05:58 +0100 | [diff] [blame] | 2200 | local_save_flags(flags); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2201 | local_irq_enable(); |
| 2202 | /* Let ten ticks pass... */ |
| 2203 | mdelay((10 * 1000) / HZ); |
Ingo Molnar | 4aae070 | 2007-12-18 18:05:58 +0100 | [diff] [blame] | 2204 | local_irq_restore(flags); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2205 | |
| 2206 | /* |
| 2207 | * Expect a few ticks at least, to be sure some possible |
| 2208 | * glue logic does not lock up after one or two first |
| 2209 | * ticks in a non-ExtINT mode. Also the local APIC |
| 2210 | * might have cached one ExtINT interrupt. Finally, at |
| 2211 | * least one tick may be lost due to delays. |
| 2212 | */ |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 2213 | |
| 2214 | /* jiffies wrap? */ |
Julia Lawall | 1d16b53 | 2008-01-30 13:32:19 +0100 | [diff] [blame] | 2215 | if (time_after(jiffies, t1 + 4)) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2216 | return 1; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2217 | return 0; |
| 2218 | } |
| 2219 | |
| 2220 | /* |
| 2221 | * In the SMP+IOAPIC case it might happen that there are an unspecified |
| 2222 | * number of pending IRQ events unhandled. These cases are very rare, |
| 2223 | * so we 'resend' these IRQs via IPIs, to the same CPU. It's much |
| 2224 | * better to do it this way as thus we do not have to be aware of |
| 2225 | * 'pending' interrupts in the IRQ path, except at this point. |
| 2226 | */ |
| 2227 | /* |
| 2228 | * Edge triggered needs to resend any interrupt |
| 2229 | * that was delayed but this is now handled in the device |
| 2230 | * independent code. |
| 2231 | */ |
| 2232 | |
| 2233 | /* |
| 2234 | * Starting up a edge-triggered IO-APIC interrupt is |
| 2235 | * nasty - we need to make sure that we get the edge. |
| 2236 | * If it is already asserted for some reason, we need |
| 2237 | * return 1 to indicate that is was pending. |
| 2238 | * |
| 2239 | * This is not complete - we should be able to fake |
| 2240 | * an edge even if it isn't on the 8259A... |
| 2241 | */ |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 2242 | |
Ingo Molnar | f5b9ed7 | 2006-10-04 02:16:26 -0700 | [diff] [blame] | 2243 | static unsigned int startup_ioapic_irq(unsigned int irq) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2244 | { |
| 2245 | int was_pending = 0; |
| 2246 | unsigned long flags; |
Yinghai Lu | 0b8f1ef | 2008-12-05 18:58:31 -0800 | [diff] [blame] | 2247 | struct irq_cfg *cfg; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2248 | |
Thomas Gleixner | dade771 | 2009-07-25 18:39:36 +0200 | [diff] [blame] | 2249 | raw_spin_lock_irqsave(&ioapic_lock, flags); |
Thomas Gleixner | bc07844 | 2009-08-29 18:09:57 +0200 | [diff] [blame] | 2250 | if (irq < nr_legacy_irqs) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2251 | disable_8259A_irq(irq); |
| 2252 | if (i8259A_irq_pending(irq)) |
| 2253 | was_pending = 1; |
| 2254 | } |
Yinghai Lu | 0b8f1ef | 2008-12-05 18:58:31 -0800 | [diff] [blame] | 2255 | cfg = irq_cfg(irq); |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 2256 | __unmask_IO_APIC_irq(cfg); |
Thomas Gleixner | dade771 | 2009-07-25 18:39:36 +0200 | [diff] [blame] | 2257 | raw_spin_unlock_irqrestore(&ioapic_lock, flags); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2258 | |
| 2259 | return was_pending; |
| 2260 | } |
| 2261 | |
Eric W. Biederman | ace80ab | 2006-10-04 02:16:47 -0700 | [diff] [blame] | 2262 | static int ioapic_retrigger_irq(unsigned int irq) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2263 | { |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 2264 | |
| 2265 | struct irq_cfg *cfg = irq_cfg(irq); |
| 2266 | unsigned long flags; |
| 2267 | |
Thomas Gleixner | dade771 | 2009-07-25 18:39:36 +0200 | [diff] [blame] | 2268 | raw_spin_lock_irqsave(&vector_lock, flags); |
Ingo Molnar | dac5f41 | 2009-01-28 15:42:24 +0100 | [diff] [blame] | 2269 | apic->send_IPI_mask(cpumask_of(cpumask_first(cfg->domain)), cfg->vector); |
Thomas Gleixner | dade771 | 2009-07-25 18:39:36 +0200 | [diff] [blame] | 2270 | raw_spin_unlock_irqrestore(&vector_lock, flags); |
Ingo Molnar | c0ad90a | 2006-06-29 02:24:44 -0700 | [diff] [blame] | 2271 | |
| 2272 | return 1; |
| 2273 | } |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 2274 | |
| 2275 | /* |
| 2276 | * Level and edge triggered IO-APIC interrupts need different handling, |
| 2277 | * so we use two separate IRQ descriptors. Edge triggered IRQs can be |
| 2278 | * handled with the level-triggered descriptor, but that one has slightly |
| 2279 | * more overhead. Level-triggered interrupts cannot be handled with the |
| 2280 | * edge-triggered handler, without risking IRQ storms and other ugly |
| 2281 | * races. |
| 2282 | */ |
Ingo Molnar | c0ad90a | 2006-06-29 02:24:44 -0700 | [diff] [blame] | 2283 | |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 2284 | #ifdef CONFIG_SMP |
Dimitri Sivanich | 9338ad6 | 2009-10-13 15:32:36 -0500 | [diff] [blame] | 2285 | void send_cleanup_vector(struct irq_cfg *cfg) |
Gary Hade | e85abf8 | 2009-04-08 14:07:25 -0700 | [diff] [blame] | 2286 | { |
| 2287 | cpumask_var_t cleanup_mask; |
| 2288 | |
| 2289 | if (unlikely(!alloc_cpumask_var(&cleanup_mask, GFP_ATOMIC))) { |
| 2290 | unsigned int i; |
Gary Hade | e85abf8 | 2009-04-08 14:07:25 -0700 | [diff] [blame] | 2291 | for_each_cpu_and(i, cfg->old_domain, cpu_online_mask) |
| 2292 | apic->send_IPI_mask(cpumask_of(i), IRQ_MOVE_CLEANUP_VECTOR); |
| 2293 | } else { |
| 2294 | cpumask_and(cleanup_mask, cfg->old_domain, cpu_online_mask); |
Gary Hade | e85abf8 | 2009-04-08 14:07:25 -0700 | [diff] [blame] | 2295 | apic->send_IPI_mask(cleanup_mask, IRQ_MOVE_CLEANUP_VECTOR); |
| 2296 | free_cpumask_var(cleanup_mask); |
| 2297 | } |
| 2298 | cfg->move_in_progress = 0; |
| 2299 | } |
| 2300 | |
Ingo Molnar | 4420471 | 2009-05-01 19:02:50 +0200 | [diff] [blame] | 2301 | static void __target_IO_APIC_irq(unsigned int irq, unsigned int dest, struct irq_cfg *cfg) |
Gary Hade | e85abf8 | 2009-04-08 14:07:25 -0700 | [diff] [blame] | 2302 | { |
| 2303 | int apic, pin; |
| 2304 | struct irq_pin_list *entry; |
| 2305 | u8 vector = cfg->vector; |
| 2306 | |
Cyrill Gorcunov | 2977fb3 | 2009-08-01 11:47:59 +0400 | [diff] [blame] | 2307 | for_each_irq_pin(entry, cfg->irq_2_pin) { |
Gary Hade | e85abf8 | 2009-04-08 14:07:25 -0700 | [diff] [blame] | 2308 | unsigned int reg; |
| 2309 | |
Gary Hade | e85abf8 | 2009-04-08 14:07:25 -0700 | [diff] [blame] | 2310 | apic = entry->apic; |
| 2311 | pin = entry->pin; |
| 2312 | /* |
| 2313 | * With interrupt-remapping, destination information comes |
| 2314 | * from interrupt-remapping table entry. |
| 2315 | */ |
| 2316 | if (!irq_remapped(irq)) |
| 2317 | io_apic_write(apic, 0x11 + pin*2, dest); |
| 2318 | reg = io_apic_read(apic, 0x10 + pin*2); |
| 2319 | reg &= ~IO_APIC_REDIR_VECTOR_MASK; |
| 2320 | reg |= vector; |
| 2321 | io_apic_modify(apic, 0x10 + pin*2, reg); |
Gary Hade | e85abf8 | 2009-04-08 14:07:25 -0700 | [diff] [blame] | 2322 | } |
| 2323 | } |
| 2324 | |
| 2325 | /* |
| 2326 | * Either sets desc->affinity to a valid value, and returns |
Suresh Siddha | 18374d8 | 2009-12-17 18:29:46 -0800 | [diff] [blame] | 2327 | * ->cpu_mask_to_apicid of that in dest_id, or returns -1 and |
Gary Hade | e85abf8 | 2009-04-08 14:07:25 -0700 | [diff] [blame] | 2328 | * leaves desc->affinity untouched. |
| 2329 | */ |
Dimitri Sivanich | 9338ad6 | 2009-10-13 15:32:36 -0500 | [diff] [blame] | 2330 | unsigned int |
Suresh Siddha | 18374d8 | 2009-12-17 18:29:46 -0800 | [diff] [blame] | 2331 | set_desc_affinity(struct irq_desc *desc, const struct cpumask *mask, |
| 2332 | unsigned int *dest_id) |
Gary Hade | e85abf8 | 2009-04-08 14:07:25 -0700 | [diff] [blame] | 2333 | { |
| 2334 | struct irq_cfg *cfg; |
| 2335 | unsigned int irq; |
| 2336 | |
| 2337 | if (!cpumask_intersects(mask, cpu_online_mask)) |
Suresh Siddha | 18374d8 | 2009-12-17 18:29:46 -0800 | [diff] [blame] | 2338 | return -1; |
Gary Hade | e85abf8 | 2009-04-08 14:07:25 -0700 | [diff] [blame] | 2339 | |
| 2340 | irq = desc->irq; |
| 2341 | cfg = desc->chip_data; |
| 2342 | if (assign_irq_vector(irq, cfg, mask)) |
Suresh Siddha | 18374d8 | 2009-12-17 18:29:46 -0800 | [diff] [blame] | 2343 | return -1; |
Gary Hade | e85abf8 | 2009-04-08 14:07:25 -0700 | [diff] [blame] | 2344 | |
Gary Hade | e85abf8 | 2009-04-08 14:07:25 -0700 | [diff] [blame] | 2345 | cpumask_copy(desc->affinity, mask); |
| 2346 | |
Suresh Siddha | 18374d8 | 2009-12-17 18:29:46 -0800 | [diff] [blame] | 2347 | *dest_id = apic->cpu_mask_to_apicid_and(desc->affinity, cfg->domain); |
| 2348 | return 0; |
Gary Hade | e85abf8 | 2009-04-08 14:07:25 -0700 | [diff] [blame] | 2349 | } |
| 2350 | |
Ingo Molnar | 4420471 | 2009-05-01 19:02:50 +0200 | [diff] [blame] | 2351 | static int |
Gary Hade | e85abf8 | 2009-04-08 14:07:25 -0700 | [diff] [blame] | 2352 | set_ioapic_affinity_irq_desc(struct irq_desc *desc, const struct cpumask *mask) |
| 2353 | { |
| 2354 | struct irq_cfg *cfg; |
| 2355 | unsigned long flags; |
| 2356 | unsigned int dest; |
| 2357 | unsigned int irq; |
Ingo Molnar | 4420471 | 2009-05-01 19:02:50 +0200 | [diff] [blame] | 2358 | int ret = -1; |
Gary Hade | e85abf8 | 2009-04-08 14:07:25 -0700 | [diff] [blame] | 2359 | |
| 2360 | irq = desc->irq; |
| 2361 | cfg = desc->chip_data; |
| 2362 | |
Thomas Gleixner | dade771 | 2009-07-25 18:39:36 +0200 | [diff] [blame] | 2363 | raw_spin_lock_irqsave(&ioapic_lock, flags); |
Suresh Siddha | 18374d8 | 2009-12-17 18:29:46 -0800 | [diff] [blame] | 2364 | ret = set_desc_affinity(desc, mask, &dest); |
| 2365 | if (!ret) { |
Gary Hade | e85abf8 | 2009-04-08 14:07:25 -0700 | [diff] [blame] | 2366 | /* Only the high 8 bits are valid. */ |
| 2367 | dest = SET_APIC_LOGICAL_ID(dest); |
| 2368 | __target_IO_APIC_irq(irq, dest, cfg); |
| 2369 | } |
Thomas Gleixner | dade771 | 2009-07-25 18:39:36 +0200 | [diff] [blame] | 2370 | raw_spin_unlock_irqrestore(&ioapic_lock, flags); |
Ingo Molnar | 4420471 | 2009-05-01 19:02:50 +0200 | [diff] [blame] | 2371 | |
| 2372 | return ret; |
Gary Hade | e85abf8 | 2009-04-08 14:07:25 -0700 | [diff] [blame] | 2373 | } |
| 2374 | |
Ingo Molnar | 4420471 | 2009-05-01 19:02:50 +0200 | [diff] [blame] | 2375 | static int |
Gary Hade | e85abf8 | 2009-04-08 14:07:25 -0700 | [diff] [blame] | 2376 | set_ioapic_affinity_irq(unsigned int irq, const struct cpumask *mask) |
| 2377 | { |
| 2378 | struct irq_desc *desc; |
| 2379 | |
| 2380 | desc = irq_to_desc(irq); |
| 2381 | |
Ingo Molnar | 4420471 | 2009-05-01 19:02:50 +0200 | [diff] [blame] | 2382 | return set_ioapic_affinity_irq_desc(desc, mask); |
Gary Hade | e85abf8 | 2009-04-08 14:07:25 -0700 | [diff] [blame] | 2383 | } |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 2384 | |
| 2385 | #ifdef CONFIG_INTR_REMAP |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 2386 | |
| 2387 | /* |
| 2388 | * Migrate the IO-APIC irq in the presence of intr-remapping. |
| 2389 | * |
Suresh Siddha | 0280f7c | 2009-03-16 17:05:01 -0700 | [diff] [blame] | 2390 | * For both level and edge triggered, irq migration is a simple atomic |
| 2391 | * update(of vector and cpu destination) of IRTE and flush the hardware cache. |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 2392 | * |
Suresh Siddha | 0280f7c | 2009-03-16 17:05:01 -0700 | [diff] [blame] | 2393 | * For level triggered, we eliminate the io-apic RTE modification (with the |
| 2394 | * updated vector information), by using a virtual vector (io-apic pin number). |
| 2395 | * Real vector that is used for interrupting cpu will be coming from |
| 2396 | * the interrupt-remapping table entry. |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 2397 | */ |
Yinghai Lu | d5dedd4 | 2009-04-27 17:59:21 -0700 | [diff] [blame] | 2398 | static int |
Mike Travis | e798673 | 2008-12-16 17:33:52 -0800 | [diff] [blame] | 2399 | migrate_ioapic_irq_desc(struct irq_desc *desc, const struct cpumask *mask) |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 2400 | { |
| 2401 | struct irq_cfg *cfg; |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 2402 | struct irte irte; |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 2403 | unsigned int dest; |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 2404 | unsigned int irq; |
Yinghai Lu | d5dedd4 | 2009-04-27 17:59:21 -0700 | [diff] [blame] | 2405 | int ret = -1; |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 2406 | |
Mike Travis | 22f65d3 | 2008-12-16 17:33:56 -0800 | [diff] [blame] | 2407 | if (!cpumask_intersects(mask, cpu_online_mask)) |
Yinghai Lu | d5dedd4 | 2009-04-27 17:59:21 -0700 | [diff] [blame] | 2408 | return ret; |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 2409 | |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 2410 | irq = desc->irq; |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 2411 | if (get_irte(irq, &irte)) |
Yinghai Lu | d5dedd4 | 2009-04-27 17:59:21 -0700 | [diff] [blame] | 2412 | return ret; |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 2413 | |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 2414 | cfg = desc->chip_data; |
| 2415 | if (assign_irq_vector(irq, cfg, mask)) |
Yinghai Lu | d5dedd4 | 2009-04-27 17:59:21 -0700 | [diff] [blame] | 2416 | return ret; |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 2417 | |
Ingo Molnar | debccb3 | 2009-01-28 15:20:18 +0100 | [diff] [blame] | 2418 | dest = apic->cpu_mask_to_apicid_and(cfg->domain, mask); |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 2419 | |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 2420 | irte.vector = cfg->vector; |
| 2421 | irte.dest_id = IRTE_DEST(dest); |
| 2422 | |
| 2423 | /* |
| 2424 | * Modified the IRTE and flushes the Interrupt entry cache. |
| 2425 | */ |
| 2426 | modify_irte(irq, &irte); |
| 2427 | |
Mike Travis | 22f65d3 | 2008-12-16 17:33:56 -0800 | [diff] [blame] | 2428 | if (cfg->move_in_progress) |
| 2429 | send_cleanup_vector(cfg); |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 2430 | |
Mike Travis | 7f7ace0 | 2009-01-10 21:58:08 -0800 | [diff] [blame] | 2431 | cpumask_copy(desc->affinity, mask); |
Yinghai Lu | d5dedd4 | 2009-04-27 17:59:21 -0700 | [diff] [blame] | 2432 | |
| 2433 | return 0; |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 2434 | } |
| 2435 | |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 2436 | /* |
| 2437 | * Migrates the IRQ destination in the process context. |
| 2438 | */ |
Yinghai Lu | d5dedd4 | 2009-04-27 17:59:21 -0700 | [diff] [blame] | 2439 | static int set_ir_ioapic_affinity_irq_desc(struct irq_desc *desc, |
Rusty Russell | 968ea6d | 2008-12-13 21:55:51 +1030 | [diff] [blame] | 2440 | const struct cpumask *mask) |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 2441 | { |
Yinghai Lu | d5dedd4 | 2009-04-27 17:59:21 -0700 | [diff] [blame] | 2442 | return migrate_ioapic_irq_desc(desc, mask); |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 2443 | } |
Yinghai Lu | d5dedd4 | 2009-04-27 17:59:21 -0700 | [diff] [blame] | 2444 | static int set_ir_ioapic_affinity_irq(unsigned int irq, |
Rusty Russell | 0de2652 | 2008-12-13 21:20:26 +1030 | [diff] [blame] | 2445 | const struct cpumask *mask) |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 2446 | { |
| 2447 | struct irq_desc *desc = irq_to_desc(irq); |
| 2448 | |
Yinghai Lu | d5dedd4 | 2009-04-27 17:59:21 -0700 | [diff] [blame] | 2449 | return set_ir_ioapic_affinity_irq_desc(desc, mask); |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 2450 | } |
Suresh Siddha | 29b61be | 2009-03-16 17:05:02 -0700 | [diff] [blame] | 2451 | #else |
Yinghai Lu | d5dedd4 | 2009-04-27 17:59:21 -0700 | [diff] [blame] | 2452 | static inline int set_ir_ioapic_affinity_irq_desc(struct irq_desc *desc, |
Suresh Siddha | 29b61be | 2009-03-16 17:05:02 -0700 | [diff] [blame] | 2453 | const struct cpumask *mask) |
| 2454 | { |
Yinghai Lu | d5dedd4 | 2009-04-27 17:59:21 -0700 | [diff] [blame] | 2455 | return 0; |
Suresh Siddha | 29b61be | 2009-03-16 17:05:02 -0700 | [diff] [blame] | 2456 | } |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 2457 | #endif |
| 2458 | |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 2459 | asmlinkage void smp_irq_move_cleanup_interrupt(void) |
| 2460 | { |
| 2461 | unsigned vector, me; |
Hiroshi Shimamoto | 8f2466f | 2008-12-08 19:19:07 -0800 | [diff] [blame] | 2462 | |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 2463 | ack_APIC_irq(); |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 2464 | exit_idle(); |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 2465 | irq_enter(); |
| 2466 | |
| 2467 | me = smp_processor_id(); |
| 2468 | for (vector = FIRST_EXTERNAL_VECTOR; vector < NR_VECTORS; vector++) { |
| 2469 | unsigned int irq; |
Suresh Siddha | 68a8ca5 | 2009-03-16 17:05:04 -0700 | [diff] [blame] | 2470 | unsigned int irr; |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 2471 | struct irq_desc *desc; |
| 2472 | struct irq_cfg *cfg; |
| 2473 | irq = __get_cpu_var(vector_irq)[vector]; |
| 2474 | |
Yinghai Lu | 0b8f1ef | 2008-12-05 18:58:31 -0800 | [diff] [blame] | 2475 | if (irq == -1) |
| 2476 | continue; |
| 2477 | |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 2478 | desc = irq_to_desc(irq); |
| 2479 | if (!desc) |
| 2480 | continue; |
| 2481 | |
| 2482 | cfg = irq_cfg(irq); |
Thomas Gleixner | 239007b | 2009-11-17 16:46:45 +0100 | [diff] [blame] | 2483 | raw_spin_lock(&desc->lock); |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 2484 | |
Suresh Siddha | 7f41c2e | 2010-01-06 10:56:31 -0800 | [diff] [blame] | 2485 | /* |
| 2486 | * Check if the irq migration is in progress. If so, we |
| 2487 | * haven't received the cleanup request yet for this irq. |
| 2488 | */ |
| 2489 | if (cfg->move_in_progress) |
| 2490 | goto unlock; |
| 2491 | |
Mike Travis | 22f65d3 | 2008-12-16 17:33:56 -0800 | [diff] [blame] | 2492 | if (vector == cfg->vector && cpumask_test_cpu(me, cfg->domain)) |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 2493 | goto unlock; |
| 2494 | |
Suresh Siddha | 68a8ca5 | 2009-03-16 17:05:04 -0700 | [diff] [blame] | 2495 | irr = apic_read(APIC_IRR + (vector / 32 * 0x10)); |
| 2496 | /* |
| 2497 | * Check if the vector that needs to be cleanedup is |
| 2498 | * registered at the cpu's IRR. If so, then this is not |
| 2499 | * the best time to clean it up. Lets clean it up in the |
| 2500 | * next attempt by sending another IRQ_MOVE_CLEANUP_VECTOR |
| 2501 | * to myself. |
| 2502 | */ |
| 2503 | if (irr & (1 << (vector % 32))) { |
| 2504 | apic->send_IPI_self(IRQ_MOVE_CLEANUP_VECTOR); |
| 2505 | goto unlock; |
| 2506 | } |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 2507 | __get_cpu_var(vector_irq)[vector] = -1; |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 2508 | unlock: |
Thomas Gleixner | 239007b | 2009-11-17 16:46:45 +0100 | [diff] [blame] | 2509 | raw_spin_unlock(&desc->lock); |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 2510 | } |
| 2511 | |
| 2512 | irq_exit(); |
| 2513 | } |
| 2514 | |
Suresh Siddha | a5e74b8 | 2009-10-26 14:24:34 -0800 | [diff] [blame] | 2515 | static void __irq_complete_move(struct irq_desc **descp, unsigned vector) |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 2516 | { |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 2517 | struct irq_desc *desc = *descp; |
| 2518 | struct irq_cfg *cfg = desc->chip_data; |
Suresh Siddha | a5e74b8 | 2009-10-26 14:24:34 -0800 | [diff] [blame] | 2519 | unsigned me; |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 2520 | |
Yinghai Lu | fcef591 | 2009-04-27 17:58:23 -0700 | [diff] [blame] | 2521 | if (likely(!cfg->move_in_progress)) |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 2522 | return; |
| 2523 | |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 2524 | me = smp_processor_id(); |
Yinghai Lu | 10b888d | 2009-01-31 14:50:07 -0800 | [diff] [blame] | 2525 | |
Yinghai Lu | fcef591 | 2009-04-27 17:58:23 -0700 | [diff] [blame] | 2526 | if (vector == cfg->vector && cpumask_test_cpu(me, cfg->domain)) |
Mike Travis | 22f65d3 | 2008-12-16 17:33:56 -0800 | [diff] [blame] | 2527 | send_cleanup_vector(cfg); |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 2528 | } |
Suresh Siddha | a5e74b8 | 2009-10-26 14:24:34 -0800 | [diff] [blame] | 2529 | |
| 2530 | static void irq_complete_move(struct irq_desc **descp) |
| 2531 | { |
| 2532 | __irq_complete_move(descp, ~get_irq_regs()->orig_ax); |
| 2533 | } |
| 2534 | |
| 2535 | void irq_force_complete_move(int irq) |
| 2536 | { |
| 2537 | struct irq_desc *desc = irq_to_desc(irq); |
| 2538 | struct irq_cfg *cfg = desc->chip_data; |
| 2539 | |
| 2540 | __irq_complete_move(&desc, cfg->vector); |
| 2541 | } |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 2542 | #else |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 2543 | static inline void irq_complete_move(struct irq_desc **descp) {} |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 2544 | #endif |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 2545 | |
Yinghai Lu | 1d02519 | 2008-08-19 20:50:34 -0700 | [diff] [blame] | 2546 | static void ack_apic_edge(unsigned int irq) |
| 2547 | { |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 2548 | struct irq_desc *desc = irq_to_desc(irq); |
| 2549 | |
| 2550 | irq_complete_move(&desc); |
Yinghai Lu | 1d02519 | 2008-08-19 20:50:34 -0700 | [diff] [blame] | 2551 | move_native_irq(irq); |
| 2552 | ack_APIC_irq(); |
| 2553 | } |
| 2554 | |
Yinghai Lu | 3eb2cce | 2008-08-19 20:50:48 -0700 | [diff] [blame] | 2555 | atomic_t irq_mis_count; |
Yinghai Lu | 3eb2cce | 2008-08-19 20:50:48 -0700 | [diff] [blame] | 2556 | |
Suresh Siddha | c29d9db | 2009-12-01 15:31:16 -0800 | [diff] [blame] | 2557 | /* |
| 2558 | * IO-APIC versions below 0x20 don't support EOI register. |
| 2559 | * For the record, here is the information about various versions: |
| 2560 | * 0Xh 82489DX |
| 2561 | * 1Xh I/OAPIC or I/O(x)APIC which are not PCI 2.2 Compliant |
| 2562 | * 2Xh I/O(x)APIC which is PCI 2.2 Compliant |
| 2563 | * 30h-FFh Reserved |
| 2564 | * |
| 2565 | * Some of the Intel ICH Specs (ICH2 to ICH5) documents the io-apic |
| 2566 | * version as 0x2. This is an error with documentation and these ICH chips |
| 2567 | * use io-apic's of version 0x20. |
| 2568 | * |
| 2569 | * For IO-APIC's with EOI register, we use that to do an explicit EOI. |
| 2570 | * Otherwise, we simulate the EOI message manually by changing the trigger |
| 2571 | * mode to edge and then back to level, with RTE being masked during this. |
| 2572 | */ |
Suresh Siddha | b3ec0a3 | 2009-10-26 14:24:35 -0800 | [diff] [blame] | 2573 | static void __eoi_ioapic_irq(unsigned int irq, struct irq_cfg *cfg) |
| 2574 | { |
| 2575 | struct irq_pin_list *entry; |
| 2576 | |
| 2577 | for_each_irq_pin(entry, cfg->irq_2_pin) { |
Suresh Siddha | c29d9db | 2009-12-01 15:31:16 -0800 | [diff] [blame] | 2578 | if (mp_ioapics[entry->apic].apicver >= 0x20) { |
| 2579 | /* |
| 2580 | * Intr-remapping uses pin number as the virtual vector |
| 2581 | * in the RTE. Actual vector is programmed in |
| 2582 | * intr-remapping table entry. Hence for the io-apic |
| 2583 | * EOI we use the pin number. |
| 2584 | */ |
| 2585 | if (irq_remapped(irq)) |
| 2586 | io_apic_eoi(entry->apic, entry->pin); |
| 2587 | else |
| 2588 | io_apic_eoi(entry->apic, cfg->vector); |
| 2589 | } else { |
| 2590 | __mask_and_edge_IO_APIC_irq(entry); |
| 2591 | __unmask_and_level_IO_APIC_irq(entry); |
| 2592 | } |
Suresh Siddha | b3ec0a3 | 2009-10-26 14:24:35 -0800 | [diff] [blame] | 2593 | } |
| 2594 | } |
| 2595 | |
| 2596 | static void eoi_ioapic_irq(struct irq_desc *desc) |
| 2597 | { |
| 2598 | struct irq_cfg *cfg; |
| 2599 | unsigned long flags; |
| 2600 | unsigned int irq; |
| 2601 | |
| 2602 | irq = desc->irq; |
| 2603 | cfg = desc->chip_data; |
| 2604 | |
Thomas Gleixner | dade771 | 2009-07-25 18:39:36 +0200 | [diff] [blame] | 2605 | raw_spin_lock_irqsave(&ioapic_lock, flags); |
Suresh Siddha | b3ec0a3 | 2009-10-26 14:24:35 -0800 | [diff] [blame] | 2606 | __eoi_ioapic_irq(irq, cfg); |
Thomas Gleixner | dade771 | 2009-07-25 18:39:36 +0200 | [diff] [blame] | 2607 | raw_spin_unlock_irqrestore(&ioapic_lock, flags); |
Suresh Siddha | b3ec0a3 | 2009-10-26 14:24:35 -0800 | [diff] [blame] | 2608 | } |
| 2609 | |
Yinghai Lu | 047c8fd | 2008-08-19 20:50:41 -0700 | [diff] [blame] | 2610 | static void ack_apic_level(unsigned int irq) |
| 2611 | { |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 2612 | struct irq_desc *desc = irq_to_desc(irq); |
Yinghai Lu | 3eb2cce | 2008-08-19 20:50:48 -0700 | [diff] [blame] | 2613 | unsigned long v; |
| 2614 | int i; |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 2615 | struct irq_cfg *cfg; |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 2616 | int do_unmask_irq = 0; |
Yinghai Lu | 047c8fd | 2008-08-19 20:50:41 -0700 | [diff] [blame] | 2617 | |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 2618 | irq_complete_move(&desc); |
Yinghai Lu | 047c8fd | 2008-08-19 20:50:41 -0700 | [diff] [blame] | 2619 | #ifdef CONFIG_GENERIC_PENDING_IRQ |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 2620 | /* If we are moving the irq we need to mask it */ |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 2621 | if (unlikely(desc->status & IRQ_MOVE_PENDING)) { |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 2622 | do_unmask_irq = 1; |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 2623 | mask_IO_APIC_irq_desc(desc); |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 2624 | } |
Yinghai Lu | 047c8fd | 2008-08-19 20:50:41 -0700 | [diff] [blame] | 2625 | #endif |
| 2626 | |
Yinghai Lu | 3eb2cce | 2008-08-19 20:50:48 -0700 | [diff] [blame] | 2627 | /* |
Jeremy Fitzhardinge | 916a0fe | 2009-06-08 03:00:22 -0700 | [diff] [blame] | 2628 | * It appears there is an erratum which affects at least version 0x11 |
| 2629 | * of I/O APIC (that's the 82093AA and cores integrated into various |
| 2630 | * chipsets). Under certain conditions a level-triggered interrupt is |
| 2631 | * erroneously delivered as edge-triggered one but the respective IRR |
| 2632 | * bit gets set nevertheless. As a result the I/O unit expects an EOI |
| 2633 | * message but it will never arrive and further interrupts are blocked |
| 2634 | * from the source. The exact reason is so far unknown, but the |
| 2635 | * phenomenon was observed when two consecutive interrupt requests |
| 2636 | * from a given source get delivered to the same CPU and the source is |
| 2637 | * temporarily disabled in between. |
| 2638 | * |
| 2639 | * A workaround is to simulate an EOI message manually. We achieve it |
| 2640 | * by setting the trigger mode to edge and then to level when the edge |
| 2641 | * trigger mode gets detected in the TMR of a local APIC for a |
| 2642 | * level-triggered interrupt. We mask the source for the time of the |
| 2643 | * operation to prevent an edge-triggered interrupt escaping meanwhile. |
| 2644 | * The idea is from Manfred Spraul. --macro |
Suresh Siddha | 1c83995 | 2009-12-01 15:31:17 -0800 | [diff] [blame] | 2645 | * |
| 2646 | * Also in the case when cpu goes offline, fixup_irqs() will forward |
| 2647 | * any unhandled interrupt on the offlined cpu to the new cpu |
| 2648 | * destination that is handling the corresponding interrupt. This |
| 2649 | * interrupt forwarding is done via IPI's. Hence, in this case also |
| 2650 | * level-triggered io-apic interrupt will be seen as an edge |
| 2651 | * interrupt in the IRR. And we can't rely on the cpu's EOI |
| 2652 | * to be broadcasted to the IO-APIC's which will clear the remoteIRR |
| 2653 | * corresponding to the level-triggered interrupt. Hence on IO-APIC's |
| 2654 | * supporting EOI register, we do an explicit EOI to clear the |
| 2655 | * remote IRR and on IO-APIC's which don't have an EOI register, |
| 2656 | * we use the above logic (mask+edge followed by unmask+level) from |
| 2657 | * Manfred Spraul to clear the remote IRR. |
Jeremy Fitzhardinge | 916a0fe | 2009-06-08 03:00:22 -0700 | [diff] [blame] | 2658 | */ |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 2659 | cfg = desc->chip_data; |
| 2660 | i = cfg->vector; |
Yinghai Lu | 3eb2cce | 2008-08-19 20:50:48 -0700 | [diff] [blame] | 2661 | v = apic_read(APIC_TMR + ((i & ~0x1f) >> 1)); |
Yinghai Lu | 3eb2cce | 2008-08-19 20:50:48 -0700 | [diff] [blame] | 2662 | |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 2663 | /* |
| 2664 | * We must acknowledge the irq before we move it or the acknowledge will |
| 2665 | * not propagate properly. |
| 2666 | */ |
| 2667 | ack_APIC_irq(); |
Yinghai Lu | 047c8fd | 2008-08-19 20:50:41 -0700 | [diff] [blame] | 2668 | |
Suresh Siddha | 1c83995 | 2009-12-01 15:31:17 -0800 | [diff] [blame] | 2669 | /* |
| 2670 | * Tail end of clearing remote IRR bit (either by delivering the EOI |
| 2671 | * message via io-apic EOI register write or simulating it using |
| 2672 | * mask+edge followed by unnask+level logic) manually when the |
| 2673 | * level triggered interrupt is seen as the edge triggered interrupt |
| 2674 | * at the cpu. |
| 2675 | */ |
Maciej W. Rozycki | ca64c47 | 2009-12-01 15:31:15 -0800 | [diff] [blame] | 2676 | if (!(v & (1 << (i & 0x1f)))) { |
| 2677 | atomic_inc(&irq_mis_count); |
| 2678 | |
Suresh Siddha | c29d9db | 2009-12-01 15:31:16 -0800 | [diff] [blame] | 2679 | eoi_ioapic_irq(desc); |
Maciej W. Rozycki | ca64c47 | 2009-12-01 15:31:15 -0800 | [diff] [blame] | 2680 | } |
| 2681 | |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 2682 | /* Now we can move and renable the irq */ |
| 2683 | if (unlikely(do_unmask_irq)) { |
| 2684 | /* Only migrate the irq if the ack has been received. |
| 2685 | * |
| 2686 | * On rare occasions the broadcast level triggered ack gets |
| 2687 | * delayed going to ioapics, and if we reprogram the |
| 2688 | * vector while Remote IRR is still set the irq will never |
| 2689 | * fire again. |
| 2690 | * |
| 2691 | * To prevent this scenario we read the Remote IRR bit |
| 2692 | * of the ioapic. This has two effects. |
| 2693 | * - On any sane system the read of the ioapic will |
| 2694 | * flush writes (and acks) going to the ioapic from |
| 2695 | * this cpu. |
| 2696 | * - We get to see if the ACK has actually been delivered. |
| 2697 | * |
| 2698 | * Based on failed experiments of reprogramming the |
| 2699 | * ioapic entry from outside of irq context starting |
| 2700 | * with masking the ioapic entry and then polling until |
| 2701 | * Remote IRR was clear before reprogramming the |
| 2702 | * ioapic I don't trust the Remote IRR bit to be |
| 2703 | * completey accurate. |
| 2704 | * |
| 2705 | * However there appears to be no other way to plug |
| 2706 | * this race, so if the Remote IRR bit is not |
| 2707 | * accurate and is causing problems then it is a hardware bug |
| 2708 | * and you can go talk to the chipset vendor about it. |
| 2709 | */ |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 2710 | cfg = desc->chip_data; |
| 2711 | if (!io_apic_level_ack_pending(cfg)) |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 2712 | move_masked_irq(irq); |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 2713 | unmask_IO_APIC_irq_desc(desc); |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 2714 | } |
Yinghai Lu | 3eb2cce | 2008-08-19 20:50:48 -0700 | [diff] [blame] | 2715 | } |
Yinghai Lu | 1d02519 | 2008-08-19 20:50:34 -0700 | [diff] [blame] | 2716 | |
Han, Weidong | d0b03bd | 2009-04-03 17:15:50 +0800 | [diff] [blame] | 2717 | #ifdef CONFIG_INTR_REMAP |
| 2718 | static void ir_ack_apic_edge(unsigned int irq) |
| 2719 | { |
Weidong Han | 5d0ae2d | 2009-04-17 16:42:13 +0800 | [diff] [blame] | 2720 | ack_APIC_irq(); |
Han, Weidong | d0b03bd | 2009-04-03 17:15:50 +0800 | [diff] [blame] | 2721 | } |
| 2722 | |
| 2723 | static void ir_ack_apic_level(unsigned int irq) |
| 2724 | { |
Weidong Han | 5d0ae2d | 2009-04-17 16:42:13 +0800 | [diff] [blame] | 2725 | struct irq_desc *desc = irq_to_desc(irq); |
| 2726 | |
| 2727 | ack_APIC_irq(); |
| 2728 | eoi_ioapic_irq(desc); |
Han, Weidong | d0b03bd | 2009-04-03 17:15:50 +0800 | [diff] [blame] | 2729 | } |
| 2730 | #endif /* CONFIG_INTR_REMAP */ |
| 2731 | |
Ingo Molnar | f5b9ed7 | 2006-10-04 02:16:26 -0700 | [diff] [blame] | 2732 | static struct irq_chip ioapic_chip __read_mostly = { |
Thomas Gleixner | d6c88a5 | 2008-10-15 15:27:23 +0200 | [diff] [blame] | 2733 | .name = "IO-APIC", |
| 2734 | .startup = startup_ioapic_irq, |
| 2735 | .mask = mask_IO_APIC_irq, |
| 2736 | .unmask = unmask_IO_APIC_irq, |
| 2737 | .ack = ack_apic_edge, |
| 2738 | .eoi = ack_apic_level, |
Ashok Raj | 54d5d42 | 2005-09-06 15:16:15 -0700 | [diff] [blame] | 2739 | #ifdef CONFIG_SMP |
Thomas Gleixner | d6c88a5 | 2008-10-15 15:27:23 +0200 | [diff] [blame] | 2740 | .set_affinity = set_ioapic_affinity_irq, |
Ashok Raj | 54d5d42 | 2005-09-06 15:16:15 -0700 | [diff] [blame] | 2741 | #endif |
Eric W. Biederman | ace80ab | 2006-10-04 02:16:47 -0700 | [diff] [blame] | 2742 | .retrigger = ioapic_retrigger_irq, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2743 | }; |
| 2744 | |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 2745 | static struct irq_chip ir_ioapic_chip __read_mostly = { |
Thomas Gleixner | d6c88a5 | 2008-10-15 15:27:23 +0200 | [diff] [blame] | 2746 | .name = "IR-IO-APIC", |
| 2747 | .startup = startup_ioapic_irq, |
| 2748 | .mask = mask_IO_APIC_irq, |
| 2749 | .unmask = unmask_IO_APIC_irq, |
Jaswinder Singh Rajput | a1e38ca | 2009-03-23 02:11:25 +0530 | [diff] [blame] | 2750 | #ifdef CONFIG_INTR_REMAP |
Han, Weidong | d0b03bd | 2009-04-03 17:15:50 +0800 | [diff] [blame] | 2751 | .ack = ir_ack_apic_edge, |
| 2752 | .eoi = ir_ack_apic_level, |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 2753 | #ifdef CONFIG_SMP |
Thomas Gleixner | d6c88a5 | 2008-10-15 15:27:23 +0200 | [diff] [blame] | 2754 | .set_affinity = set_ir_ioapic_affinity_irq, |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 2755 | #endif |
Jaswinder Singh Rajput | a1e38ca | 2009-03-23 02:11:25 +0530 | [diff] [blame] | 2756 | #endif |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 2757 | .retrigger = ioapic_retrigger_irq, |
| 2758 | }; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2759 | |
| 2760 | static inline void init_IO_APIC_traps(void) |
| 2761 | { |
| 2762 | int irq; |
Yinghai Lu | 08678b0 | 2008-08-19 20:50:05 -0700 | [diff] [blame] | 2763 | struct irq_desc *desc; |
Yinghai Lu | da51a82 | 2008-08-19 20:50:25 -0700 | [diff] [blame] | 2764 | struct irq_cfg *cfg; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2765 | |
| 2766 | /* |
| 2767 | * NOTE! The local APIC isn't very good at handling |
| 2768 | * multiple interrupts at the same interrupt level. |
| 2769 | * As the interrupt level is determined by taking the |
| 2770 | * vector number and shifting that right by 4, we |
| 2771 | * want to spread these out a bit so that they don't |
| 2772 | * all fall in the same interrupt level. |
| 2773 | * |
| 2774 | * Also, we've got to be careful not to trash gate |
| 2775 | * 0x80, because int 0x80 is hm, kind of importantish. ;) |
| 2776 | */ |
Yinghai Lu | 0b8f1ef | 2008-12-05 18:58:31 -0800 | [diff] [blame] | 2777 | for_each_irq_desc(irq, desc) { |
Yinghai Lu | 0b8f1ef | 2008-12-05 18:58:31 -0800 | [diff] [blame] | 2778 | cfg = desc->chip_data; |
| 2779 | if (IO_APIC_IRQ(irq) && cfg && !cfg->vector) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2780 | /* |
| 2781 | * Hmm.. We don't have an entry for this, |
| 2782 | * so default to an old-fashioned 8259 |
| 2783 | * interrupt if we can.. |
| 2784 | */ |
Thomas Gleixner | bc07844 | 2009-08-29 18:09:57 +0200 | [diff] [blame] | 2785 | if (irq < nr_legacy_irqs) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2786 | make_8259A_irq(irq); |
Yinghai Lu | 0b8f1ef | 2008-12-05 18:58:31 -0800 | [diff] [blame] | 2787 | else |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2788 | /* Strange. Oh, well.. */ |
Yinghai Lu | 08678b0 | 2008-08-19 20:50:05 -0700 | [diff] [blame] | 2789 | desc->chip = &no_irq_chip; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2790 | } |
| 2791 | } |
| 2792 | } |
| 2793 | |
Ingo Molnar | f5b9ed7 | 2006-10-04 02:16:26 -0700 | [diff] [blame] | 2794 | /* |
| 2795 | * The local APIC irq-chip implementation: |
| 2796 | */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2797 | |
Paolo Ciarrocchi | 3606244 | 2008-06-08 13:07:18 +0200 | [diff] [blame] | 2798 | static void mask_lapic_irq(unsigned int irq) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2799 | { |
| 2800 | unsigned long v; |
| 2801 | |
| 2802 | v = apic_read(APIC_LVT0); |
Maciej W. Rozycki | 593f4a7 | 2008-07-16 19:15:30 +0100 | [diff] [blame] | 2803 | apic_write(APIC_LVT0, v | APIC_LVT_MASKED); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2804 | } |
| 2805 | |
Paolo Ciarrocchi | 3606244 | 2008-06-08 13:07:18 +0200 | [diff] [blame] | 2806 | static void unmask_lapic_irq(unsigned int irq) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2807 | { |
Ingo Molnar | f5b9ed7 | 2006-10-04 02:16:26 -0700 | [diff] [blame] | 2808 | unsigned long v; |
| 2809 | |
| 2810 | v = apic_read(APIC_LVT0); |
Maciej W. Rozycki | 593f4a7 | 2008-07-16 19:15:30 +0100 | [diff] [blame] | 2811 | apic_write(APIC_LVT0, v & ~APIC_LVT_MASKED); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2812 | } |
| 2813 | |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 2814 | static void ack_lapic_irq(unsigned int irq) |
Yinghai Lu | 1d02519 | 2008-08-19 20:50:34 -0700 | [diff] [blame] | 2815 | { |
| 2816 | ack_APIC_irq(); |
| 2817 | } |
| 2818 | |
Ingo Molnar | f5b9ed7 | 2006-10-04 02:16:26 -0700 | [diff] [blame] | 2819 | static struct irq_chip lapic_chip __read_mostly = { |
Maciej W. Rozycki | 9a1c619 | 2008-05-27 21:19:09 +0100 | [diff] [blame] | 2820 | .name = "local-APIC", |
Ingo Molnar | f5b9ed7 | 2006-10-04 02:16:26 -0700 | [diff] [blame] | 2821 | .mask = mask_lapic_irq, |
| 2822 | .unmask = unmask_lapic_irq, |
Maciej W. Rozycki | c88ac1d | 2008-07-11 19:35:17 +0100 | [diff] [blame] | 2823 | .ack = ack_lapic_irq, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2824 | }; |
| 2825 | |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 2826 | static void lapic_register_intr(int irq, struct irq_desc *desc) |
Maciej W. Rozycki | c88ac1d | 2008-07-11 19:35:17 +0100 | [diff] [blame] | 2827 | { |
Yinghai Lu | 08678b0 | 2008-08-19 20:50:05 -0700 | [diff] [blame] | 2828 | desc->status &= ~IRQ_LEVEL; |
Maciej W. Rozycki | c88ac1d | 2008-07-11 19:35:17 +0100 | [diff] [blame] | 2829 | set_irq_chip_and_handler_name(irq, &lapic_chip, handle_edge_irq, |
| 2830 | "edge"); |
Maciej W. Rozycki | c88ac1d | 2008-07-11 19:35:17 +0100 | [diff] [blame] | 2831 | } |
| 2832 | |
Jan Beulich | e942710 | 2008-01-30 13:31:24 +0100 | [diff] [blame] | 2833 | static void __init setup_nmi(void) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2834 | { |
| 2835 | /* |
Paolo Ciarrocchi | 3606244 | 2008-06-08 13:07:18 +0200 | [diff] [blame] | 2836 | * Dirty trick to enable the NMI watchdog ... |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2837 | * We put the 8259A master into AEOI mode and |
| 2838 | * unmask on all local APICs LVT0 as NMI. |
| 2839 | * |
| 2840 | * The idea to use the 8259A in AEOI mode ('8259A Virtual Wire') |
| 2841 | * is from Maciej W. Rozycki - so we do not have to EOI from |
| 2842 | * the NMI handler or the timer interrupt. |
Paolo Ciarrocchi | 3606244 | 2008-06-08 13:07:18 +0200 | [diff] [blame] | 2843 | */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2844 | apic_printk(APIC_VERBOSE, KERN_INFO "activating NMI Watchdog ..."); |
| 2845 | |
Jan Beulich | e942710 | 2008-01-30 13:31:24 +0100 | [diff] [blame] | 2846 | enable_NMI_through_LVT0(); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2847 | |
| 2848 | apic_printk(APIC_VERBOSE, " done.\n"); |
| 2849 | } |
| 2850 | |
| 2851 | /* |
| 2852 | * This looks a bit hackish but it's about the only one way of sending |
| 2853 | * a few INTA cycles to 8259As and any associated glue logic. ICR does |
| 2854 | * not support the ExtINT mode, unfortunately. We need to send these |
| 2855 | * cycles as some i82489DX-based boards have glue logic that keeps the |
| 2856 | * 8259A interrupt line asserted until INTA. --macro |
| 2857 | */ |
Jacek Luczak | 28acf28 | 2008-04-12 17:41:12 +0200 | [diff] [blame] | 2858 | static inline void __init unlock_ExtINT_logic(void) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2859 | { |
Eric W. Biederman | fcfd636 | 2005-10-30 14:59:39 -0800 | [diff] [blame] | 2860 | int apic, pin, i; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2861 | struct IO_APIC_route_entry entry0, entry1; |
| 2862 | unsigned char save_control, save_freq_select; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2863 | |
Eric W. Biederman | fcfd636 | 2005-10-30 14:59:39 -0800 | [diff] [blame] | 2864 | pin = find_isa_irq_pin(8, mp_INT); |
Adrian Bunk | 956fb53 | 2006-12-07 02:14:11 +0100 | [diff] [blame] | 2865 | if (pin == -1) { |
| 2866 | WARN_ON_ONCE(1); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2867 | return; |
Adrian Bunk | 956fb53 | 2006-12-07 02:14:11 +0100 | [diff] [blame] | 2868 | } |
| 2869 | apic = find_isa_irq_apic(8, mp_INT); |
| 2870 | if (apic == -1) { |
| 2871 | WARN_ON_ONCE(1); |
| 2872 | return; |
| 2873 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2874 | |
Andi Kleen | cf4c6a2 | 2006-09-26 10:52:30 +0200 | [diff] [blame] | 2875 | entry0 = ioapic_read_entry(apic, pin); |
Eric W. Biederman | fcfd636 | 2005-10-30 14:59:39 -0800 | [diff] [blame] | 2876 | clear_IO_APIC_pin(apic, pin); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2877 | |
| 2878 | memset(&entry1, 0, sizeof(entry1)); |
| 2879 | |
| 2880 | entry1.dest_mode = 0; /* physical delivery */ |
| 2881 | entry1.mask = 0; /* unmask IRQ now */ |
Yinghai Lu | d83e94a | 2008-08-19 20:50:33 -0700 | [diff] [blame] | 2882 | entry1.dest = hard_smp_processor_id(); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2883 | entry1.delivery_mode = dest_ExtINT; |
| 2884 | entry1.polarity = entry0.polarity; |
| 2885 | entry1.trigger = 0; |
| 2886 | entry1.vector = 0; |
| 2887 | |
Andi Kleen | cf4c6a2 | 2006-09-26 10:52:30 +0200 | [diff] [blame] | 2888 | ioapic_write_entry(apic, pin, entry1); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2889 | |
| 2890 | save_control = CMOS_READ(RTC_CONTROL); |
| 2891 | save_freq_select = CMOS_READ(RTC_FREQ_SELECT); |
| 2892 | CMOS_WRITE((save_freq_select & ~RTC_RATE_SELECT) | 0x6, |
| 2893 | RTC_FREQ_SELECT); |
| 2894 | CMOS_WRITE(save_control | RTC_PIE, RTC_CONTROL); |
| 2895 | |
| 2896 | i = 100; |
| 2897 | while (i-- > 0) { |
| 2898 | mdelay(10); |
| 2899 | if ((CMOS_READ(RTC_INTR_FLAGS) & RTC_PF) == RTC_PF) |
| 2900 | i -= 10; |
| 2901 | } |
| 2902 | |
| 2903 | CMOS_WRITE(save_control, RTC_CONTROL); |
| 2904 | CMOS_WRITE(save_freq_select, RTC_FREQ_SELECT); |
Eric W. Biederman | fcfd636 | 2005-10-30 14:59:39 -0800 | [diff] [blame] | 2905 | clear_IO_APIC_pin(apic, pin); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2906 | |
Andi Kleen | cf4c6a2 | 2006-09-26 10:52:30 +0200 | [diff] [blame] | 2907 | ioapic_write_entry(apic, pin, entry0); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2908 | } |
| 2909 | |
Yinghai Lu | efa2559 | 2008-08-19 20:50:36 -0700 | [diff] [blame] | 2910 | static int disable_timer_pin_1 __initdata; |
Yinghai Lu | 047c8fd | 2008-08-19 20:50:41 -0700 | [diff] [blame] | 2911 | /* Actually the next is obsolete, but keep it for paranoid reasons -AK */ |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 2912 | static int __init disable_timer_pin_setup(char *arg) |
Yinghai Lu | efa2559 | 2008-08-19 20:50:36 -0700 | [diff] [blame] | 2913 | { |
| 2914 | disable_timer_pin_1 = 1; |
| 2915 | return 0; |
| 2916 | } |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 2917 | early_param("disable_timer_pin_1", disable_timer_pin_setup); |
Yinghai Lu | efa2559 | 2008-08-19 20:50:36 -0700 | [diff] [blame] | 2918 | |
| 2919 | int timer_through_8259 __initdata; |
| 2920 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2921 | /* |
| 2922 | * This code may look a bit paranoid, but it's supposed to cooperate with |
| 2923 | * a wide range of boards and BIOS bugs. Fortunately only the timer IRQ |
| 2924 | * is so screwy. Thanks to Brian Perkins for testing/hacking this beast |
| 2925 | * fanatically on his truly buggy board. |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 2926 | * |
| 2927 | * FIXME: really need to revamp this for all platforms. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2928 | */ |
Zachary Amsden | 8542b20 | 2006-12-07 02:14:09 +0100 | [diff] [blame] | 2929 | static inline void __init check_timer(void) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2930 | { |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 2931 | struct irq_desc *desc = irq_to_desc(0); |
| 2932 | struct irq_cfg *cfg = desc->chip_data; |
Yinghai Lu | 85ac16d | 2009-04-27 18:00:38 -0700 | [diff] [blame] | 2933 | int node = cpu_to_node(boot_cpu_id); |
Eric W. Biederman | fcfd636 | 2005-10-30 14:59:39 -0800 | [diff] [blame] | 2934 | int apic1, pin1, apic2, pin2; |
Ingo Molnar | 4aae070 | 2007-12-18 18:05:58 +0100 | [diff] [blame] | 2935 | unsigned long flags; |
Yinghai Lu | 047c8fd | 2008-08-19 20:50:41 -0700 | [diff] [blame] | 2936 | int no_pin1 = 0; |
Ingo Molnar | 4aae070 | 2007-12-18 18:05:58 +0100 | [diff] [blame] | 2937 | |
| 2938 | local_irq_save(flags); |
Maciej W. Rozycki | d4d25de | 2007-11-26 20:42:19 +0100 | [diff] [blame] | 2939 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2940 | /* |
| 2941 | * get/set the timer IRQ vector: |
| 2942 | */ |
| 2943 | disable_8259A_irq(0); |
Ingo Molnar | fe402e1 | 2009-01-28 04:32:51 +0100 | [diff] [blame] | 2944 | assign_irq_vector(0, cfg, apic->target_cpus()); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2945 | |
| 2946 | /* |
Maciej W. Rozycki | d11d579 | 2008-05-21 22:09:11 +0100 | [diff] [blame] | 2947 | * As IRQ0 is to be enabled in the 8259A, the virtual |
| 2948 | * wire has to be disabled in the local APIC. Also |
| 2949 | * timer interrupts need to be acknowledged manually in |
| 2950 | * the 8259A for the i82489DX when using the NMI |
| 2951 | * watchdog as that APIC treats NMIs as level-triggered. |
| 2952 | * The AEOI mode will finish them in the 8259A |
| 2953 | * automatically. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2954 | */ |
Maciej W. Rozycki | 593f4a7 | 2008-07-16 19:15:30 +0100 | [diff] [blame] | 2955 | apic_write(APIC_LVT0, APIC_LVT_MASKED | APIC_DM_EXTINT); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2956 | init_8259A(1); |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 2957 | #ifdef CONFIG_X86_32 |
Yinghai Lu | f72dcca | 2009-02-08 16:18:03 -0800 | [diff] [blame] | 2958 | { |
| 2959 | unsigned int ver; |
| 2960 | |
| 2961 | ver = apic_read(APIC_LVR); |
| 2962 | ver = GET_APIC_VERSION(ver); |
| 2963 | timer_ack = (nmi_watchdog == NMI_IO_APIC && !APIC_INTEGRATED(ver)); |
| 2964 | } |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 2965 | #endif |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2966 | |
Eric W. Biederman | fcfd636 | 2005-10-30 14:59:39 -0800 | [diff] [blame] | 2967 | pin1 = find_isa_irq_pin(0, mp_INT); |
| 2968 | apic1 = find_isa_irq_apic(0, mp_INT); |
| 2969 | pin2 = ioapic_i8259.pin; |
| 2970 | apic2 = ioapic_i8259.apic; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2971 | |
Maciej W. Rozycki | 49a66a0b | 2008-07-14 19:08:13 +0100 | [diff] [blame] | 2972 | apic_printk(APIC_QUIET, KERN_INFO "..TIMER: vector=0x%02X " |
| 2973 | "apic1=%d pin1=%d apic2=%d pin2=%d\n", |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 2974 | cfg->vector, apic1, pin1, apic2, pin2); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2975 | |
Maciej W. Rozycki | 691874f | 2008-05-27 21:19:51 +0100 | [diff] [blame] | 2976 | /* |
| 2977 | * Some BIOS writers are clueless and report the ExtINTA |
| 2978 | * I/O APIC input from the cascaded 8259A as the timer |
| 2979 | * interrupt input. So just in case, if only one pin |
| 2980 | * was found above, try it both directly and through the |
| 2981 | * 8259A. |
| 2982 | */ |
| 2983 | if (pin1 == -1) { |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 2984 | if (intr_remapping_enabled) |
| 2985 | panic("BIOS bug: timer not connected to IO-APIC"); |
Maciej W. Rozycki | 691874f | 2008-05-27 21:19:51 +0100 | [diff] [blame] | 2986 | pin1 = pin2; |
| 2987 | apic1 = apic2; |
| 2988 | no_pin1 = 1; |
| 2989 | } else if (pin2 == -1) { |
| 2990 | pin2 = pin1; |
| 2991 | apic2 = apic1; |
| 2992 | } |
| 2993 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2994 | if (pin1 != -1) { |
| 2995 | /* |
| 2996 | * Ok, does IRQ0 through the IOAPIC work? |
| 2997 | */ |
Maciej W. Rozycki | 691874f | 2008-05-27 21:19:51 +0100 | [diff] [blame] | 2998 | if (no_pin1) { |
Yinghai Lu | 85ac16d | 2009-04-27 18:00:38 -0700 | [diff] [blame] | 2999 | add_pin_to_irq_node(cfg, node, apic1, pin1); |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 3000 | setup_timer_IRQ0_pin(apic1, pin1, cfg->vector); |
Yinghai Lu | f72dcca | 2009-02-08 16:18:03 -0800 | [diff] [blame] | 3001 | } else { |
| 3002 | /* for edge trigger, setup_IO_APIC_irq already |
| 3003 | * leave it unmasked. |
| 3004 | * so only need to unmask if it is level-trigger |
| 3005 | * do we really have level trigger timer? |
| 3006 | */ |
| 3007 | int idx; |
| 3008 | idx = find_irq_entry(apic1, pin1, mp_INT); |
| 3009 | if (idx != -1 && irq_trigger(idx)) |
| 3010 | unmask_IO_APIC_irq_desc(desc); |
Maciej W. Rozycki | 691874f | 2008-05-27 21:19:51 +0100 | [diff] [blame] | 3011 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3012 | if (timer_irq_works()) { |
| 3013 | if (nmi_watchdog == NMI_IO_APIC) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3014 | setup_nmi(); |
| 3015 | enable_8259A_irq(0); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3016 | } |
Chuck Ebbert | 66759a0 | 2005-09-12 18:49:25 +0200 | [diff] [blame] | 3017 | if (disable_timer_pin_1 > 0) |
| 3018 | clear_IO_APIC_pin(0, pin1); |
Ingo Molnar | 4aae070 | 2007-12-18 18:05:58 +0100 | [diff] [blame] | 3019 | goto out; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3020 | } |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 3021 | if (intr_remapping_enabled) |
| 3022 | panic("timer doesn't work through Interrupt-remapped IO-APIC"); |
Yinghai Lu | f72dcca | 2009-02-08 16:18:03 -0800 | [diff] [blame] | 3023 | local_irq_disable(); |
Eric W. Biederman | fcfd636 | 2005-10-30 14:59:39 -0800 | [diff] [blame] | 3024 | clear_IO_APIC_pin(apic1, pin1); |
Maciej W. Rozycki | 691874f | 2008-05-27 21:19:51 +0100 | [diff] [blame] | 3025 | if (!no_pin1) |
Maciej W. Rozycki | 49a66a0b | 2008-07-14 19:08:13 +0100 | [diff] [blame] | 3026 | apic_printk(APIC_QUIET, KERN_ERR "..MP-BIOS bug: " |
| 3027 | "8254 timer not connected to IO-APIC\n"); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3028 | |
Maciej W. Rozycki | 49a66a0b | 2008-07-14 19:08:13 +0100 | [diff] [blame] | 3029 | apic_printk(APIC_QUIET, KERN_INFO "...trying to set up timer " |
| 3030 | "(IRQ0) through the 8259A ...\n"); |
| 3031 | apic_printk(APIC_QUIET, KERN_INFO |
| 3032 | "..... (found apic %d pin %d) ...\n", apic2, pin2); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3033 | /* |
| 3034 | * legacy devices should be connected to IO APIC #0 |
| 3035 | */ |
Yinghai Lu | 85ac16d | 2009-04-27 18:00:38 -0700 | [diff] [blame] | 3036 | replace_pin_at_irq_node(cfg, node, apic1, pin1, apic2, pin2); |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 3037 | setup_timer_IRQ0_pin(apic2, pin2, cfg->vector); |
Maciej W. Rozycki | ecd2947 | 2008-05-21 22:09:19 +0100 | [diff] [blame] | 3038 | enable_8259A_irq(0); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3039 | if (timer_irq_works()) { |
Maciej W. Rozycki | 49a66a0b | 2008-07-14 19:08:13 +0100 | [diff] [blame] | 3040 | apic_printk(APIC_QUIET, KERN_INFO "....... works.\n"); |
Maciej W. Rozycki | 35542c5 | 2008-05-21 22:10:22 +0100 | [diff] [blame] | 3041 | timer_through_8259 = 1; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3042 | if (nmi_watchdog == NMI_IO_APIC) { |
Maciej W. Rozycki | 60134eb | 2008-05-21 22:09:34 +0100 | [diff] [blame] | 3043 | disable_8259A_irq(0); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3044 | setup_nmi(); |
Maciej W. Rozycki | 60134eb | 2008-05-21 22:09:34 +0100 | [diff] [blame] | 3045 | enable_8259A_irq(0); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3046 | } |
Ingo Molnar | 4aae070 | 2007-12-18 18:05:58 +0100 | [diff] [blame] | 3047 | goto out; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3048 | } |
| 3049 | /* |
| 3050 | * Cleanup, just in case ... |
| 3051 | */ |
Yinghai Lu | f72dcca | 2009-02-08 16:18:03 -0800 | [diff] [blame] | 3052 | local_irq_disable(); |
Maciej W. Rozycki | ecd2947 | 2008-05-21 22:09:19 +0100 | [diff] [blame] | 3053 | disable_8259A_irq(0); |
Eric W. Biederman | fcfd636 | 2005-10-30 14:59:39 -0800 | [diff] [blame] | 3054 | clear_IO_APIC_pin(apic2, pin2); |
Maciej W. Rozycki | 49a66a0b | 2008-07-14 19:08:13 +0100 | [diff] [blame] | 3055 | apic_printk(APIC_QUIET, KERN_INFO "....... failed.\n"); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3056 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3057 | |
| 3058 | if (nmi_watchdog == NMI_IO_APIC) { |
Maciej W. Rozycki | 49a66a0b | 2008-07-14 19:08:13 +0100 | [diff] [blame] | 3059 | apic_printk(APIC_QUIET, KERN_WARNING "timer doesn't work " |
| 3060 | "through the IO-APIC - disabling NMI Watchdog!\n"); |
Cyrill Gorcunov | 067fa0f | 2008-05-29 22:32:30 +0400 | [diff] [blame] | 3061 | nmi_watchdog = NMI_NONE; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3062 | } |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 3063 | #ifdef CONFIG_X86_32 |
Maciej W. Rozycki | d11d579 | 2008-05-21 22:09:11 +0100 | [diff] [blame] | 3064 | timer_ack = 0; |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 3065 | #endif |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3066 | |
Maciej W. Rozycki | 49a66a0b | 2008-07-14 19:08:13 +0100 | [diff] [blame] | 3067 | apic_printk(APIC_QUIET, KERN_INFO |
| 3068 | "...trying to set up timer as Virtual Wire IRQ...\n"); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3069 | |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 3070 | lapic_register_intr(0, desc); |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 3071 | apic_write(APIC_LVT0, APIC_DM_FIXED | cfg->vector); /* Fixed mode */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3072 | enable_8259A_irq(0); |
| 3073 | |
| 3074 | if (timer_irq_works()) { |
Maciej W. Rozycki | 49a66a0b | 2008-07-14 19:08:13 +0100 | [diff] [blame] | 3075 | apic_printk(APIC_QUIET, KERN_INFO "..... works.\n"); |
Ingo Molnar | 4aae070 | 2007-12-18 18:05:58 +0100 | [diff] [blame] | 3076 | goto out; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3077 | } |
Yinghai Lu | f72dcca | 2009-02-08 16:18:03 -0800 | [diff] [blame] | 3078 | local_irq_disable(); |
Maciej W. Rozycki | e67465f | 2008-05-21 22:09:26 +0100 | [diff] [blame] | 3079 | disable_8259A_irq(0); |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 3080 | apic_write(APIC_LVT0, APIC_LVT_MASKED | APIC_DM_FIXED | cfg->vector); |
Maciej W. Rozycki | 49a66a0b | 2008-07-14 19:08:13 +0100 | [diff] [blame] | 3081 | apic_printk(APIC_QUIET, KERN_INFO "..... failed.\n"); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3082 | |
Maciej W. Rozycki | 49a66a0b | 2008-07-14 19:08:13 +0100 | [diff] [blame] | 3083 | apic_printk(APIC_QUIET, KERN_INFO |
| 3084 | "...trying to set up timer as ExtINT IRQ...\n"); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3085 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3086 | init_8259A(0); |
| 3087 | make_8259A_irq(0); |
Maciej W. Rozycki | 593f4a7 | 2008-07-16 19:15:30 +0100 | [diff] [blame] | 3088 | apic_write(APIC_LVT0, APIC_DM_EXTINT); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3089 | |
| 3090 | unlock_ExtINT_logic(); |
| 3091 | |
| 3092 | if (timer_irq_works()) { |
Maciej W. Rozycki | 49a66a0b | 2008-07-14 19:08:13 +0100 | [diff] [blame] | 3093 | apic_printk(APIC_QUIET, KERN_INFO "..... works.\n"); |
Ingo Molnar | 4aae070 | 2007-12-18 18:05:58 +0100 | [diff] [blame] | 3094 | goto out; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3095 | } |
Yinghai Lu | f72dcca | 2009-02-08 16:18:03 -0800 | [diff] [blame] | 3096 | local_irq_disable(); |
Maciej W. Rozycki | 49a66a0b | 2008-07-14 19:08:13 +0100 | [diff] [blame] | 3097 | apic_printk(APIC_QUIET, KERN_INFO "..... failed :(.\n"); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3098 | panic("IO-APIC + timer doesn't work! Boot with apic=debug and send a " |
Maciej W. Rozycki | 49a66a0b | 2008-07-14 19:08:13 +0100 | [diff] [blame] | 3099 | "report. Then try booting with the 'noapic' option.\n"); |
Ingo Molnar | 4aae070 | 2007-12-18 18:05:58 +0100 | [diff] [blame] | 3100 | out: |
| 3101 | local_irq_restore(flags); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3102 | } |
| 3103 | |
| 3104 | /* |
Maciej W. Rozycki | af17478 | 2008-07-11 19:35:23 +0100 | [diff] [blame] | 3105 | * Traditionally ISA IRQ2 is the cascade IRQ, and is not available |
| 3106 | * to devices. However there may be an I/O APIC pin available for |
| 3107 | * this interrupt regardless. The pin may be left unconnected, but |
| 3108 | * typically it will be reused as an ExtINT cascade interrupt for |
| 3109 | * the master 8259A. In the MPS case such a pin will normally be |
| 3110 | * reported as an ExtINT interrupt in the MP table. With ACPI |
| 3111 | * there is no provision for ExtINT interrupts, and in the absence |
| 3112 | * of an override it would be treated as an ordinary ISA I/O APIC |
| 3113 | * interrupt, that is edge-triggered and unmasked by default. We |
| 3114 | * used to do this, but it caused problems on some systems because |
| 3115 | * of the NMI watchdog and sometimes IRQ0 of the 8254 timer using |
| 3116 | * the same ExtINT cascade interrupt to drive the local APIC of the |
| 3117 | * bootstrap processor. Therefore we refrain from routing IRQ2 to |
| 3118 | * the I/O APIC in all cases now. No actual device should request |
| 3119 | * it anyway. --macro |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3120 | */ |
Thomas Gleixner | bc07844 | 2009-08-29 18:09:57 +0200 | [diff] [blame] | 3121 | #define PIC_IRQS (1UL << PIC_CASCADE_IR) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3122 | |
| 3123 | void __init setup_IO_APIC(void) |
| 3124 | { |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 3125 | |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 3126 | /* |
| 3127 | * calling enable_IO_APIC() is moved to setup_local_APIC for BP |
| 3128 | */ |
Thomas Gleixner | bc07844 | 2009-08-29 18:09:57 +0200 | [diff] [blame] | 3129 | io_apic_irqs = nr_legacy_irqs ? ~PIC_IRQS : ~0UL; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3130 | |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 3131 | apic_printk(APIC_VERBOSE, "ENABLING IO-APIC IRQs\n"); |
Thomas Gleixner | d6c88a5 | 2008-10-15 15:27:23 +0200 | [diff] [blame] | 3132 | /* |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 3133 | * Set up IO-APIC IRQ routing. |
| 3134 | */ |
Thomas Gleixner | de93410 | 2009-08-20 09:27:29 +0200 | [diff] [blame] | 3135 | x86_init.mpparse.setup_ioapic_ids(); |
| 3136 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3137 | sync_Arb_IDs(); |
| 3138 | setup_IO_APIC_irqs(); |
| 3139 | init_IO_APIC_traps(); |
Thomas Gleixner | bc07844 | 2009-08-29 18:09:57 +0200 | [diff] [blame] | 3140 | if (nr_legacy_irqs) |
| 3141 | check_timer(); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3142 | } |
| 3143 | |
| 3144 | /* |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 3145 | * Called after all the initialization is done. If we didnt find any |
| 3146 | * APIC bugs then we can allow the modify fast path |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3147 | */ |
Paolo Ciarrocchi | 3606244 | 2008-06-08 13:07:18 +0200 | [diff] [blame] | 3148 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3149 | static int __init io_apic_bug_finalize(void) |
| 3150 | { |
Thomas Gleixner | d6c88a5 | 2008-10-15 15:27:23 +0200 | [diff] [blame] | 3151 | if (sis_apic_bug == -1) |
| 3152 | sis_apic_bug = 0; |
| 3153 | return 0; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3154 | } |
| 3155 | |
| 3156 | late_initcall(io_apic_bug_finalize); |
| 3157 | |
| 3158 | struct sysfs_ioapic_data { |
| 3159 | struct sys_device dev; |
| 3160 | struct IO_APIC_route_entry entry[0]; |
| 3161 | }; |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 3162 | static struct sysfs_ioapic_data * mp_ioapic_data[MAX_IO_APICS]; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3163 | |
Pavel Machek | 438510f | 2005-04-16 15:25:24 -0700 | [diff] [blame] | 3164 | static int ioapic_suspend(struct sys_device *dev, pm_message_t state) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3165 | { |
| 3166 | struct IO_APIC_route_entry *entry; |
| 3167 | struct sysfs_ioapic_data *data; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3168 | int i; |
Paolo Ciarrocchi | 3606244 | 2008-06-08 13:07:18 +0200 | [diff] [blame] | 3169 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3170 | data = container_of(dev, struct sysfs_ioapic_data, dev); |
| 3171 | entry = data->entry; |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 3172 | for (i = 0; i < nr_ioapic_registers[dev->id]; i ++, entry ++ ) |
| 3173 | *entry = ioapic_read_entry(dev->id, i); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3174 | |
| 3175 | return 0; |
| 3176 | } |
| 3177 | |
| 3178 | static int ioapic_resume(struct sys_device *dev) |
| 3179 | { |
| 3180 | struct IO_APIC_route_entry *entry; |
| 3181 | struct sysfs_ioapic_data *data; |
| 3182 | unsigned long flags; |
| 3183 | union IO_APIC_reg_00 reg_00; |
| 3184 | int i; |
Paolo Ciarrocchi | 3606244 | 2008-06-08 13:07:18 +0200 | [diff] [blame] | 3185 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3186 | data = container_of(dev, struct sysfs_ioapic_data, dev); |
| 3187 | entry = data->entry; |
| 3188 | |
Thomas Gleixner | dade771 | 2009-07-25 18:39:36 +0200 | [diff] [blame] | 3189 | raw_spin_lock_irqsave(&ioapic_lock, flags); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3190 | reg_00.raw = io_apic_read(dev->id, 0); |
Jaswinder Singh Rajput | b5ba7e6 | 2009-01-12 17:46:17 +0530 | [diff] [blame] | 3191 | if (reg_00.bits.ID != mp_ioapics[dev->id].apicid) { |
| 3192 | reg_00.bits.ID = mp_ioapics[dev->id].apicid; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3193 | io_apic_write(dev->id, 0, reg_00.raw); |
| 3194 | } |
Thomas Gleixner | dade771 | 2009-07-25 18:39:36 +0200 | [diff] [blame] | 3195 | raw_spin_unlock_irqrestore(&ioapic_lock, flags); |
Paolo Ciarrocchi | 3606244 | 2008-06-08 13:07:18 +0200 | [diff] [blame] | 3196 | for (i = 0; i < nr_ioapic_registers[dev->id]; i++) |
Andi Kleen | cf4c6a2 | 2006-09-26 10:52:30 +0200 | [diff] [blame] | 3197 | ioapic_write_entry(dev->id, i, entry[i]); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3198 | |
| 3199 | return 0; |
| 3200 | } |
| 3201 | |
| 3202 | static struct sysdev_class ioapic_sysdev_class = { |
Kay Sievers | af5ca3f | 2007-12-20 02:09:39 +0100 | [diff] [blame] | 3203 | .name = "ioapic", |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3204 | .suspend = ioapic_suspend, |
| 3205 | .resume = ioapic_resume, |
| 3206 | }; |
| 3207 | |
| 3208 | static int __init ioapic_init_sysfs(void) |
| 3209 | { |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 3210 | struct sys_device * dev; |
| 3211 | int i, size, error; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3212 | |
| 3213 | error = sysdev_class_register(&ioapic_sysdev_class); |
| 3214 | if (error) |
| 3215 | return error; |
| 3216 | |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 3217 | for (i = 0; i < nr_ioapics; i++ ) { |
Paolo Ciarrocchi | 3606244 | 2008-06-08 13:07:18 +0200 | [diff] [blame] | 3218 | size = sizeof(struct sys_device) + nr_ioapic_registers[i] |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3219 | * sizeof(struct IO_APIC_route_entry); |
Christophe Jaillet | 25556c1 | 2008-06-22 22:13:48 +0200 | [diff] [blame] | 3220 | mp_ioapic_data[i] = kzalloc(size, GFP_KERNEL); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3221 | if (!mp_ioapic_data[i]) { |
| 3222 | printk(KERN_ERR "Can't suspend/resume IOAPIC %d\n", i); |
| 3223 | continue; |
| 3224 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3225 | dev = &mp_ioapic_data[i]->dev; |
Paolo Ciarrocchi | 3606244 | 2008-06-08 13:07:18 +0200 | [diff] [blame] | 3226 | dev->id = i; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3227 | dev->cls = &ioapic_sysdev_class; |
| 3228 | error = sysdev_register(dev); |
| 3229 | if (error) { |
| 3230 | kfree(mp_ioapic_data[i]); |
| 3231 | mp_ioapic_data[i] = NULL; |
| 3232 | printk(KERN_ERR "Can't suspend/resume IOAPIC %d\n", i); |
| 3233 | continue; |
| 3234 | } |
| 3235 | } |
| 3236 | |
| 3237 | return 0; |
| 3238 | } |
| 3239 | |
| 3240 | device_initcall(ioapic_init_sysfs); |
| 3241 | |
Eric W. Biederman | 3fc471e | 2006-10-04 02:16:39 -0700 | [diff] [blame] | 3242 | /* |
Eric W. Biederman | 95d7788 | 2006-10-04 02:17:01 -0700 | [diff] [blame] | 3243 | * Dynamic irq allocate and deallocation |
Eric W. Biederman | 3fc471e | 2006-10-04 02:16:39 -0700 | [diff] [blame] | 3244 | */ |
Yinghai Lu | d047f53a | 2009-04-27 18:02:23 -0700 | [diff] [blame] | 3245 | unsigned int create_irq_nr(unsigned int irq_want, int node) |
Eric W. Biederman | 3fc471e | 2006-10-04 02:16:39 -0700 | [diff] [blame] | 3246 | { |
Eric W. Biederman | ace80ab | 2006-10-04 02:16:47 -0700 | [diff] [blame] | 3247 | /* Allocate an unused irq */ |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 3248 | unsigned int irq; |
| 3249 | unsigned int new; |
Eric W. Biederman | 3fc471e | 2006-10-04 02:16:39 -0700 | [diff] [blame] | 3250 | unsigned long flags; |
Yinghai Lu | 0b8f1ef | 2008-12-05 18:58:31 -0800 | [diff] [blame] | 3251 | struct irq_cfg *cfg_new = NULL; |
Yinghai Lu | 0b8f1ef | 2008-12-05 18:58:31 -0800 | [diff] [blame] | 3252 | struct irq_desc *desc_new = NULL; |
Yinghai Lu | 199751d | 2008-08-19 20:50:27 -0700 | [diff] [blame] | 3253 | |
| 3254 | irq = 0; |
Yinghai Lu | abcaa2b | 2009-02-08 16:18:03 -0800 | [diff] [blame] | 3255 | if (irq_want < nr_irqs_gsi) |
| 3256 | irq_want = nr_irqs_gsi; |
| 3257 | |
Thomas Gleixner | dade771 | 2009-07-25 18:39:36 +0200 | [diff] [blame] | 3258 | raw_spin_lock_irqsave(&vector_lock, flags); |
Mike Travis | 9594949 | 2009-01-10 22:24:06 -0800 | [diff] [blame] | 3259 | for (new = irq_want; new < nr_irqs; new++) { |
Yinghai Lu | 85ac16d | 2009-04-27 18:00:38 -0700 | [diff] [blame] | 3260 | desc_new = irq_to_desc_alloc_node(new, node); |
Yinghai Lu | 0b8f1ef | 2008-12-05 18:58:31 -0800 | [diff] [blame] | 3261 | if (!desc_new) { |
| 3262 | printk(KERN_INFO "can not get irq_desc for %d\n", new); |
Eric W. Biederman | ace80ab | 2006-10-04 02:16:47 -0700 | [diff] [blame] | 3263 | continue; |
Yinghai Lu | 0b8f1ef | 2008-12-05 18:58:31 -0800 | [diff] [blame] | 3264 | } |
| 3265 | cfg_new = desc_new->chip_data; |
| 3266 | |
| 3267 | if (cfg_new->vector != 0) |
| 3268 | continue; |
Yinghai Lu | d047f53a | 2009-04-27 18:02:23 -0700 | [diff] [blame] | 3269 | |
Yinghai Lu | 15e957d | 2009-04-30 01:17:50 -0700 | [diff] [blame] | 3270 | desc_new = move_irq_desc(desc_new, node); |
Yinghai Lu | 37ef2a3 | 2009-11-21 00:23:37 -0800 | [diff] [blame] | 3271 | cfg_new = desc_new->chip_data; |
Yinghai Lu | d047f53a | 2009-04-27 18:02:23 -0700 | [diff] [blame] | 3272 | |
Ingo Molnar | fe402e1 | 2009-01-28 04:32:51 +0100 | [diff] [blame] | 3273 | if (__assign_irq_vector(new, cfg_new, apic->target_cpus()) == 0) |
Eric W. Biederman | ace80ab | 2006-10-04 02:16:47 -0700 | [diff] [blame] | 3274 | irq = new; |
| 3275 | break; |
| 3276 | } |
Thomas Gleixner | dade771 | 2009-07-25 18:39:36 +0200 | [diff] [blame] | 3277 | raw_spin_unlock_irqrestore(&vector_lock, flags); |
Eric W. Biederman | 3fc471e | 2006-10-04 02:16:39 -0700 | [diff] [blame] | 3278 | |
Brandon Phiilps | ced5b69 | 2010-02-10 01:20:06 -0800 | [diff] [blame] | 3279 | if (irq > 0) |
| 3280 | dynamic_irq_init_keep_chip_data(irq); |
| 3281 | |
Eric W. Biederman | 3fc471e | 2006-10-04 02:16:39 -0700 | [diff] [blame] | 3282 | return irq; |
| 3283 | } |
| 3284 | |
Yinghai Lu | 199751d | 2008-08-19 20:50:27 -0700 | [diff] [blame] | 3285 | int create_irq(void) |
| 3286 | { |
Yinghai Lu | d047f53a | 2009-04-27 18:02:23 -0700 | [diff] [blame] | 3287 | int node = cpu_to_node(boot_cpu_id); |
Yinghai Lu | be5d535 | 2008-12-05 18:58:33 -0800 | [diff] [blame] | 3288 | unsigned int irq_want; |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 3289 | int irq; |
| 3290 | |
Yinghai Lu | be5d535 | 2008-12-05 18:58:33 -0800 | [diff] [blame] | 3291 | irq_want = nr_irqs_gsi; |
Yinghai Lu | d047f53a | 2009-04-27 18:02:23 -0700 | [diff] [blame] | 3292 | irq = create_irq_nr(irq_want, node); |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 3293 | |
| 3294 | if (irq == 0) |
| 3295 | irq = -1; |
| 3296 | |
| 3297 | return irq; |
Yinghai Lu | 199751d | 2008-08-19 20:50:27 -0700 | [diff] [blame] | 3298 | } |
| 3299 | |
Eric W. Biederman | 3fc471e | 2006-10-04 02:16:39 -0700 | [diff] [blame] | 3300 | void destroy_irq(unsigned int irq) |
| 3301 | { |
| 3302 | unsigned long flags; |
Eric W. Biederman | 3fc471e | 2006-10-04 02:16:39 -0700 | [diff] [blame] | 3303 | |
Brandon Phiilps | ced5b69 | 2010-02-10 01:20:06 -0800 | [diff] [blame] | 3304 | dynamic_irq_cleanup_keep_chip_data(irq); |
Eric W. Biederman | 3fc471e | 2006-10-04 02:16:39 -0700 | [diff] [blame] | 3305 | |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 3306 | free_irte(irq); |
Thomas Gleixner | dade771 | 2009-07-25 18:39:36 +0200 | [diff] [blame] | 3307 | raw_spin_lock_irqsave(&vector_lock, flags); |
Brandon Philips | eb5b379 | 2010-02-07 13:02:50 -0800 | [diff] [blame] | 3308 | __clear_irq_vector(irq, get_irq_chip_data(irq)); |
Thomas Gleixner | dade771 | 2009-07-25 18:39:36 +0200 | [diff] [blame] | 3309 | raw_spin_unlock_irqrestore(&vector_lock, flags); |
Eric W. Biederman | 3fc471e | 2006-10-04 02:16:39 -0700 | [diff] [blame] | 3310 | } |
Eric W. Biederman | 3fc471e | 2006-10-04 02:16:39 -0700 | [diff] [blame] | 3311 | |
Eric W. Biederman | 2d3fcc1 | 2006-10-04 02:16:43 -0700 | [diff] [blame] | 3312 | /* |
Simon Arlott | 27b46d7 | 2007-10-20 01:13:56 +0200 | [diff] [blame] | 3313 | * MSI message composition |
Eric W. Biederman | 2d3fcc1 | 2006-10-04 02:16:43 -0700 | [diff] [blame] | 3314 | */ |
| 3315 | #ifdef CONFIG_PCI_MSI |
Suresh Siddha | c8bc6f3 | 2009-08-04 12:07:09 -0700 | [diff] [blame] | 3316 | static int msi_compose_msg(struct pci_dev *pdev, unsigned int irq, |
| 3317 | struct msi_msg *msg, u8 hpet_id) |
Eric W. Biederman | 2d3fcc1 | 2006-10-04 02:16:43 -0700 | [diff] [blame] | 3318 | { |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 3319 | struct irq_cfg *cfg; |
| 3320 | int err; |
Eric W. Biederman | 2d3fcc1 | 2006-10-04 02:16:43 -0700 | [diff] [blame] | 3321 | unsigned dest; |
| 3322 | |
Jan Beulich | f118263 | 2009-01-14 12:27:35 +0000 | [diff] [blame] | 3323 | if (disable_apic) |
| 3324 | return -ENXIO; |
| 3325 | |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 3326 | cfg = irq_cfg(irq); |
Ingo Molnar | fe402e1 | 2009-01-28 04:32:51 +0100 | [diff] [blame] | 3327 | err = assign_irq_vector(irq, cfg, apic->target_cpus()); |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 3328 | if (err) |
| 3329 | return err; |
Eric W. Biederman | 2d3fcc1 | 2006-10-04 02:16:43 -0700 | [diff] [blame] | 3330 | |
Ingo Molnar | debccb3 | 2009-01-28 15:20:18 +0100 | [diff] [blame] | 3331 | dest = apic->cpu_mask_to_apicid_and(cfg->domain, apic->target_cpus()); |
Eric W. Biederman | 2d3fcc1 | 2006-10-04 02:16:43 -0700 | [diff] [blame] | 3332 | |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 3333 | if (irq_remapped(irq)) { |
| 3334 | struct irte irte; |
| 3335 | int ir_index; |
| 3336 | u16 sub_handle; |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 3337 | |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 3338 | ir_index = map_irq_to_irte_handle(irq, &sub_handle); |
| 3339 | BUG_ON(ir_index == -1); |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 3340 | |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 3341 | memset (&irte, 0, sizeof(irte)); |
| 3342 | |
| 3343 | irte.present = 1; |
Ingo Molnar | 9b5bc8d | 2009-01-28 04:09:58 +0100 | [diff] [blame] | 3344 | irte.dst_mode = apic->irq_dest_mode; |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 3345 | irte.trigger_mode = 0; /* edge */ |
Ingo Molnar | 9b5bc8d | 2009-01-28 04:09:58 +0100 | [diff] [blame] | 3346 | irte.dlvry_mode = apic->irq_delivery_mode; |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 3347 | irte.vector = cfg->vector; |
| 3348 | irte.dest_id = IRTE_DEST(dest); |
| 3349 | |
Weidong Han | f007e99 | 2009-05-23 00:41:15 +0800 | [diff] [blame] | 3350 | /* Set source-id of interrupt request */ |
Suresh Siddha | c8bc6f3 | 2009-08-04 12:07:09 -0700 | [diff] [blame] | 3351 | if (pdev) |
| 3352 | set_msi_sid(&irte, pdev); |
| 3353 | else |
| 3354 | set_hpet_sid(&irte, hpet_id); |
Weidong Han | f007e99 | 2009-05-23 00:41:15 +0800 | [diff] [blame] | 3355 | |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 3356 | modify_irte(irq, &irte); |
| 3357 | |
| 3358 | msg->address_hi = MSI_ADDR_BASE_HI; |
| 3359 | msg->data = sub_handle; |
| 3360 | msg->address_lo = MSI_ADDR_BASE_LO | MSI_ADDR_IR_EXT_INT | |
| 3361 | MSI_ADDR_IR_SHV | |
| 3362 | MSI_ADDR_IR_INDEX1(ir_index) | |
| 3363 | MSI_ADDR_IR_INDEX2(ir_index); |
Suresh Siddha | 29b61be | 2009-03-16 17:05:02 -0700 | [diff] [blame] | 3364 | } else { |
Suresh Siddha | 9d783ba | 2009-03-16 17:04:55 -0700 | [diff] [blame] | 3365 | if (x2apic_enabled()) |
| 3366 | msg->address_hi = MSI_ADDR_BASE_HI | |
| 3367 | MSI_ADDR_EXT_DEST_ID(dest); |
| 3368 | else |
| 3369 | msg->address_hi = MSI_ADDR_BASE_HI; |
| 3370 | |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 3371 | msg->address_lo = |
| 3372 | MSI_ADDR_BASE_LO | |
Ingo Molnar | 9b5bc8d | 2009-01-28 04:09:58 +0100 | [diff] [blame] | 3373 | ((apic->irq_dest_mode == 0) ? |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 3374 | MSI_ADDR_DEST_MODE_PHYSICAL: |
| 3375 | MSI_ADDR_DEST_MODE_LOGICAL) | |
Ingo Molnar | 9b5bc8d | 2009-01-28 04:09:58 +0100 | [diff] [blame] | 3376 | ((apic->irq_delivery_mode != dest_LowestPrio) ? |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 3377 | MSI_ADDR_REDIRECTION_CPU: |
| 3378 | MSI_ADDR_REDIRECTION_LOWPRI) | |
| 3379 | MSI_ADDR_DEST_ID(dest); |
| 3380 | |
| 3381 | msg->data = |
| 3382 | MSI_DATA_TRIGGER_EDGE | |
| 3383 | MSI_DATA_LEVEL_ASSERT | |
Ingo Molnar | 9b5bc8d | 2009-01-28 04:09:58 +0100 | [diff] [blame] | 3384 | ((apic->irq_delivery_mode != dest_LowestPrio) ? |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 3385 | MSI_DATA_DELIVERY_FIXED: |
| 3386 | MSI_DATA_DELIVERY_LOWPRI) | |
| 3387 | MSI_DATA_VECTOR(cfg->vector); |
| 3388 | } |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 3389 | return err; |
Eric W. Biederman | 2d3fcc1 | 2006-10-04 02:16:43 -0700 | [diff] [blame] | 3390 | } |
| 3391 | |
Eric W. Biederman | 3b7d192 | 2006-10-04 02:16:59 -0700 | [diff] [blame] | 3392 | #ifdef CONFIG_SMP |
Yinghai Lu | d5dedd4 | 2009-04-27 17:59:21 -0700 | [diff] [blame] | 3393 | static int set_msi_irq_affinity(unsigned int irq, const struct cpumask *mask) |
Eric W. Biederman | 3b7d192 | 2006-10-04 02:16:59 -0700 | [diff] [blame] | 3394 | { |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 3395 | struct irq_desc *desc = irq_to_desc(irq); |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 3396 | struct irq_cfg *cfg; |
Eric W. Biederman | 3b7d192 | 2006-10-04 02:16:59 -0700 | [diff] [blame] | 3397 | struct msi_msg msg; |
| 3398 | unsigned int dest; |
Eric W. Biederman | 3b7d192 | 2006-10-04 02:16:59 -0700 | [diff] [blame] | 3399 | |
Suresh Siddha | 18374d8 | 2009-12-17 18:29:46 -0800 | [diff] [blame] | 3400 | if (set_desc_affinity(desc, mask, &dest)) |
Yinghai Lu | d5dedd4 | 2009-04-27 17:59:21 -0700 | [diff] [blame] | 3401 | return -1; |
Eric W. Biederman | 3b7d192 | 2006-10-04 02:16:59 -0700 | [diff] [blame] | 3402 | |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 3403 | cfg = desc->chip_data; |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 3404 | |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 3405 | read_msi_msg_desc(desc, &msg); |
Eric W. Biederman | 3b7d192 | 2006-10-04 02:16:59 -0700 | [diff] [blame] | 3406 | |
| 3407 | msg.data &= ~MSI_DATA_VECTOR_MASK; |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 3408 | msg.data |= MSI_DATA_VECTOR(cfg->vector); |
Eric W. Biederman | 3b7d192 | 2006-10-04 02:16:59 -0700 | [diff] [blame] | 3409 | msg.address_lo &= ~MSI_ADDR_DEST_ID_MASK; |
| 3410 | msg.address_lo |= MSI_ADDR_DEST_ID(dest); |
| 3411 | |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 3412 | write_msi_msg_desc(desc, &msg); |
Yinghai Lu | d5dedd4 | 2009-04-27 17:59:21 -0700 | [diff] [blame] | 3413 | |
| 3414 | return 0; |
Eric W. Biederman | 3b7d192 | 2006-10-04 02:16:59 -0700 | [diff] [blame] | 3415 | } |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 3416 | #ifdef CONFIG_INTR_REMAP |
| 3417 | /* |
| 3418 | * Migrate the MSI irq to another cpumask. This migration is |
| 3419 | * done in the process context using interrupt-remapping hardware. |
| 3420 | */ |
Yinghai Lu | d5dedd4 | 2009-04-27 17:59:21 -0700 | [diff] [blame] | 3421 | static int |
Mike Travis | e798673 | 2008-12-16 17:33:52 -0800 | [diff] [blame] | 3422 | ir_set_msi_irq_affinity(unsigned int irq, const struct cpumask *mask) |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 3423 | { |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 3424 | struct irq_desc *desc = irq_to_desc(irq); |
Ingo Molnar | a7883de | 2008-12-19 00:59:09 +0100 | [diff] [blame] | 3425 | struct irq_cfg *cfg = desc->chip_data; |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 3426 | unsigned int dest; |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 3427 | struct irte irte; |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 3428 | |
| 3429 | if (get_irte(irq, &irte)) |
Yinghai Lu | d5dedd4 | 2009-04-27 17:59:21 -0700 | [diff] [blame] | 3430 | return -1; |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 3431 | |
Suresh Siddha | 18374d8 | 2009-12-17 18:29:46 -0800 | [diff] [blame] | 3432 | if (set_desc_affinity(desc, mask, &dest)) |
Yinghai Lu | d5dedd4 | 2009-04-27 17:59:21 -0700 | [diff] [blame] | 3433 | return -1; |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 3434 | |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 3435 | irte.vector = cfg->vector; |
| 3436 | irte.dest_id = IRTE_DEST(dest); |
| 3437 | |
| 3438 | /* |
| 3439 | * atomically update the IRTE with the new destination and vector. |
| 3440 | */ |
| 3441 | modify_irte(irq, &irte); |
| 3442 | |
| 3443 | /* |
| 3444 | * After this point, all the interrupts will start arriving |
| 3445 | * at the new destination. So, time to cleanup the previous |
| 3446 | * vector allocation. |
| 3447 | */ |
Mike Travis | 22f65d3 | 2008-12-16 17:33:56 -0800 | [diff] [blame] | 3448 | if (cfg->move_in_progress) |
| 3449 | send_cleanup_vector(cfg); |
Yinghai Lu | d5dedd4 | 2009-04-27 17:59:21 -0700 | [diff] [blame] | 3450 | |
| 3451 | return 0; |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 3452 | } |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 3453 | |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 3454 | #endif |
Eric W. Biederman | 3b7d192 | 2006-10-04 02:16:59 -0700 | [diff] [blame] | 3455 | #endif /* CONFIG_SMP */ |
| 3456 | |
| 3457 | /* |
| 3458 | * IRQ Chip for MSI PCI/PCI-X/PCI-Express Devices, |
| 3459 | * which implement the MSI or MSI-X Capability Structure. |
| 3460 | */ |
| 3461 | static struct irq_chip msi_chip = { |
| 3462 | .name = "PCI-MSI", |
| 3463 | .unmask = unmask_msi_irq, |
| 3464 | .mask = mask_msi_irq, |
Yinghai Lu | 1d02519 | 2008-08-19 20:50:34 -0700 | [diff] [blame] | 3465 | .ack = ack_apic_edge, |
Eric W. Biederman | 3b7d192 | 2006-10-04 02:16:59 -0700 | [diff] [blame] | 3466 | #ifdef CONFIG_SMP |
| 3467 | .set_affinity = set_msi_irq_affinity, |
| 3468 | #endif |
| 3469 | .retrigger = ioapic_retrigger_irq, |
| 3470 | }; |
| 3471 | |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 3472 | static struct irq_chip msi_ir_chip = { |
| 3473 | .name = "IR-PCI-MSI", |
| 3474 | .unmask = unmask_msi_irq, |
| 3475 | .mask = mask_msi_irq, |
Jaswinder Singh Rajput | a1e38ca | 2009-03-23 02:11:25 +0530 | [diff] [blame] | 3476 | #ifdef CONFIG_INTR_REMAP |
Han, Weidong | d0b03bd | 2009-04-03 17:15:50 +0800 | [diff] [blame] | 3477 | .ack = ir_ack_apic_edge, |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 3478 | #ifdef CONFIG_SMP |
| 3479 | .set_affinity = ir_set_msi_irq_affinity, |
| 3480 | #endif |
Jaswinder Singh Rajput | a1e38ca | 2009-03-23 02:11:25 +0530 | [diff] [blame] | 3481 | #endif |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 3482 | .retrigger = ioapic_retrigger_irq, |
| 3483 | }; |
| 3484 | |
| 3485 | /* |
| 3486 | * Map the PCI dev to the corresponding remapping hardware unit |
| 3487 | * and allocate 'nvec' consecutive interrupt-remapping table entries |
| 3488 | * in it. |
| 3489 | */ |
| 3490 | static int msi_alloc_irte(struct pci_dev *dev, int irq, int nvec) |
| 3491 | { |
| 3492 | struct intel_iommu *iommu; |
| 3493 | int index; |
| 3494 | |
| 3495 | iommu = map_dev_to_ir(dev); |
| 3496 | if (!iommu) { |
| 3497 | printk(KERN_ERR |
| 3498 | "Unable to map PCI %s to iommu\n", pci_name(dev)); |
| 3499 | return -ENOENT; |
| 3500 | } |
| 3501 | |
| 3502 | index = alloc_irte(iommu, irq, nvec); |
| 3503 | if (index < 0) { |
| 3504 | printk(KERN_ERR |
| 3505 | "Unable to allocate %d IRTE for PCI %s\n", nvec, |
Thomas Gleixner | d6c88a5 | 2008-10-15 15:27:23 +0200 | [diff] [blame] | 3506 | pci_name(dev)); |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 3507 | return -ENOSPC; |
| 3508 | } |
| 3509 | return index; |
| 3510 | } |
Yinghai Lu | 1d02519 | 2008-08-19 20:50:34 -0700 | [diff] [blame] | 3511 | |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 3512 | static int setup_msi_irq(struct pci_dev *dev, struct msi_desc *msidesc, int irq) |
Yinghai Lu | 1d02519 | 2008-08-19 20:50:34 -0700 | [diff] [blame] | 3513 | { |
| 3514 | int ret; |
| 3515 | struct msi_msg msg; |
| 3516 | |
Suresh Siddha | c8bc6f3 | 2009-08-04 12:07:09 -0700 | [diff] [blame] | 3517 | ret = msi_compose_msg(dev, irq, &msg, -1); |
Yinghai Lu | 1d02519 | 2008-08-19 20:50:34 -0700 | [diff] [blame] | 3518 | if (ret < 0) |
| 3519 | return ret; |
| 3520 | |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 3521 | set_irq_msi(irq, msidesc); |
Yinghai Lu | 1d02519 | 2008-08-19 20:50:34 -0700 | [diff] [blame] | 3522 | write_msi_msg(irq, &msg); |
| 3523 | |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 3524 | if (irq_remapped(irq)) { |
| 3525 | struct irq_desc *desc = irq_to_desc(irq); |
| 3526 | /* |
| 3527 | * irq migration in process context |
| 3528 | */ |
| 3529 | desc->status |= IRQ_MOVE_PCNTXT; |
| 3530 | set_irq_chip_and_handler_name(irq, &msi_ir_chip, handle_edge_irq, "edge"); |
| 3531 | } else |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 3532 | set_irq_chip_and_handler_name(irq, &msi_chip, handle_edge_irq, "edge"); |
Yinghai Lu | 1d02519 | 2008-08-19 20:50:34 -0700 | [diff] [blame] | 3533 | |
Yinghai Lu | c81bba4 | 2008-09-25 11:53:11 -0700 | [diff] [blame] | 3534 | dev_printk(KERN_DEBUG, &dev->dev, "irq %d for MSI/MSI-X\n", irq); |
| 3535 | |
Yinghai Lu | 1d02519 | 2008-08-19 20:50:34 -0700 | [diff] [blame] | 3536 | return 0; |
| 3537 | } |
| 3538 | |
Yinghai Lu | 047c8fd | 2008-08-19 20:50:41 -0700 | [diff] [blame] | 3539 | int arch_setup_msi_irqs(struct pci_dev *dev, int nvec, int type) |
| 3540 | { |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 3541 | unsigned int irq; |
| 3542 | int ret, sub_handle; |
Yinghai Lu | 0b8f1ef | 2008-12-05 18:58:31 -0800 | [diff] [blame] | 3543 | struct msi_desc *msidesc; |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 3544 | unsigned int irq_want; |
Dmitri Vorobiev | 1cc1852 | 2009-03-22 19:11:09 +0200 | [diff] [blame] | 3545 | struct intel_iommu *iommu = NULL; |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 3546 | int index = 0; |
Yinghai Lu | d047f53a | 2009-04-27 18:02:23 -0700 | [diff] [blame] | 3547 | int node; |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 3548 | |
Matthew Wilcox | 1c8d7b0 | 2009-03-17 08:54:10 -0400 | [diff] [blame] | 3549 | /* x86 doesn't support multiple MSI yet */ |
| 3550 | if (type == PCI_CAP_ID_MSI && nvec > 1) |
| 3551 | return 1; |
| 3552 | |
Yinghai Lu | d047f53a | 2009-04-27 18:02:23 -0700 | [diff] [blame] | 3553 | node = dev_to_node(&dev->dev); |
Yinghai Lu | be5d535 | 2008-12-05 18:58:33 -0800 | [diff] [blame] | 3554 | irq_want = nr_irqs_gsi; |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 3555 | sub_handle = 0; |
Yinghai Lu | 0b8f1ef | 2008-12-05 18:58:31 -0800 | [diff] [blame] | 3556 | list_for_each_entry(msidesc, &dev->msi_list, list) { |
Yinghai Lu | d047f53a | 2009-04-27 18:02:23 -0700 | [diff] [blame] | 3557 | irq = create_irq_nr(irq_want, node); |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 3558 | if (irq == 0) |
| 3559 | return -1; |
Yinghai Lu | f1ee554 | 2009-02-08 16:18:03 -0800 | [diff] [blame] | 3560 | irq_want = irq + 1; |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 3561 | if (!intr_remapping_enabled) |
| 3562 | goto no_ir; |
| 3563 | |
| 3564 | if (!sub_handle) { |
| 3565 | /* |
| 3566 | * allocate the consecutive block of IRTE's |
| 3567 | * for 'nvec' |
| 3568 | */ |
| 3569 | index = msi_alloc_irte(dev, irq, nvec); |
| 3570 | if (index < 0) { |
| 3571 | ret = index; |
| 3572 | goto error; |
| 3573 | } |
| 3574 | } else { |
| 3575 | iommu = map_dev_to_ir(dev); |
| 3576 | if (!iommu) { |
| 3577 | ret = -ENOENT; |
| 3578 | goto error; |
| 3579 | } |
| 3580 | /* |
| 3581 | * setup the mapping between the irq and the IRTE |
| 3582 | * base index, the sub_handle pointing to the |
| 3583 | * appropriate interrupt remap table entry. |
| 3584 | */ |
| 3585 | set_irte_irq(irq, iommu, index, sub_handle); |
| 3586 | } |
| 3587 | no_ir: |
Yinghai Lu | 0b8f1ef | 2008-12-05 18:58:31 -0800 | [diff] [blame] | 3588 | ret = setup_msi_irq(dev, msidesc, irq); |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 3589 | if (ret < 0) |
| 3590 | goto error; |
| 3591 | sub_handle++; |
| 3592 | } |
| 3593 | return 0; |
Yinghai Lu | 047c8fd | 2008-08-19 20:50:41 -0700 | [diff] [blame] | 3594 | |
| 3595 | error: |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 3596 | destroy_irq(irq); |
| 3597 | return ret; |
Yinghai Lu | 047c8fd | 2008-08-19 20:50:41 -0700 | [diff] [blame] | 3598 | } |
| 3599 | |
Eric W. Biederman | 3b7d192 | 2006-10-04 02:16:59 -0700 | [diff] [blame] | 3600 | void arch_teardown_msi_irq(unsigned int irq) |
Eric W. Biederman | 2d3fcc1 | 2006-10-04 02:16:43 -0700 | [diff] [blame] | 3601 | { |
Eric W. Biederman | f7feaca | 2007-01-28 12:56:37 -0700 | [diff] [blame] | 3602 | destroy_irq(irq); |
Eric W. Biederman | 2d3fcc1 | 2006-10-04 02:16:43 -0700 | [diff] [blame] | 3603 | } |
| 3604 | |
Suresh Siddha | 9d783ba | 2009-03-16 17:04:55 -0700 | [diff] [blame] | 3605 | #if defined (CONFIG_DMAR) || defined (CONFIG_INTR_REMAP) |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 3606 | #ifdef CONFIG_SMP |
Yinghai Lu | d5dedd4 | 2009-04-27 17:59:21 -0700 | [diff] [blame] | 3607 | static int dmar_msi_set_affinity(unsigned int irq, const struct cpumask *mask) |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 3608 | { |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 3609 | struct irq_desc *desc = irq_to_desc(irq); |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 3610 | struct irq_cfg *cfg; |
| 3611 | struct msi_msg msg; |
| 3612 | unsigned int dest; |
Eric W. Biederman | 2d3fcc1 | 2006-10-04 02:16:43 -0700 | [diff] [blame] | 3613 | |
Suresh Siddha | 18374d8 | 2009-12-17 18:29:46 -0800 | [diff] [blame] | 3614 | if (set_desc_affinity(desc, mask, &dest)) |
Yinghai Lu | d5dedd4 | 2009-04-27 17:59:21 -0700 | [diff] [blame] | 3615 | return -1; |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 3616 | |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 3617 | cfg = desc->chip_data; |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 3618 | |
| 3619 | dmar_msi_read(irq, &msg); |
| 3620 | |
| 3621 | msg.data &= ~MSI_DATA_VECTOR_MASK; |
| 3622 | msg.data |= MSI_DATA_VECTOR(cfg->vector); |
| 3623 | msg.address_lo &= ~MSI_ADDR_DEST_ID_MASK; |
| 3624 | msg.address_lo |= MSI_ADDR_DEST_ID(dest); |
| 3625 | |
| 3626 | dmar_msi_write(irq, &msg); |
Yinghai Lu | d5dedd4 | 2009-04-27 17:59:21 -0700 | [diff] [blame] | 3627 | |
| 3628 | return 0; |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 3629 | } |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 3630 | |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 3631 | #endif /* CONFIG_SMP */ |
| 3632 | |
Jaswinder Singh Rajput | 8f7007a | 2009-06-10 12:41:01 -0700 | [diff] [blame] | 3633 | static struct irq_chip dmar_msi_type = { |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 3634 | .name = "DMAR_MSI", |
| 3635 | .unmask = dmar_msi_unmask, |
| 3636 | .mask = dmar_msi_mask, |
| 3637 | .ack = ack_apic_edge, |
| 3638 | #ifdef CONFIG_SMP |
| 3639 | .set_affinity = dmar_msi_set_affinity, |
| 3640 | #endif |
| 3641 | .retrigger = ioapic_retrigger_irq, |
| 3642 | }; |
| 3643 | |
| 3644 | int arch_setup_dmar_msi(unsigned int irq) |
| 3645 | { |
| 3646 | int ret; |
| 3647 | struct msi_msg msg; |
| 3648 | |
Suresh Siddha | c8bc6f3 | 2009-08-04 12:07:09 -0700 | [diff] [blame] | 3649 | ret = msi_compose_msg(NULL, irq, &msg, -1); |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 3650 | if (ret < 0) |
| 3651 | return ret; |
| 3652 | dmar_msi_write(irq, &msg); |
| 3653 | set_irq_chip_and_handler_name(irq, &dmar_msi_type, handle_edge_irq, |
| 3654 | "edge"); |
| 3655 | return 0; |
| 3656 | } |
| 3657 | #endif |
| 3658 | |
venkatesh.pallipadi@intel.com | 58ac1e7 | 2008-09-05 18:02:17 -0700 | [diff] [blame] | 3659 | #ifdef CONFIG_HPET_TIMER |
| 3660 | |
| 3661 | #ifdef CONFIG_SMP |
Yinghai Lu | d5dedd4 | 2009-04-27 17:59:21 -0700 | [diff] [blame] | 3662 | static int hpet_msi_set_affinity(unsigned int irq, const struct cpumask *mask) |
venkatesh.pallipadi@intel.com | 58ac1e7 | 2008-09-05 18:02:17 -0700 | [diff] [blame] | 3663 | { |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 3664 | struct irq_desc *desc = irq_to_desc(irq); |
venkatesh.pallipadi@intel.com | 58ac1e7 | 2008-09-05 18:02:17 -0700 | [diff] [blame] | 3665 | struct irq_cfg *cfg; |
venkatesh.pallipadi@intel.com | 58ac1e7 | 2008-09-05 18:02:17 -0700 | [diff] [blame] | 3666 | struct msi_msg msg; |
| 3667 | unsigned int dest; |
venkatesh.pallipadi@intel.com | 58ac1e7 | 2008-09-05 18:02:17 -0700 | [diff] [blame] | 3668 | |
Suresh Siddha | 18374d8 | 2009-12-17 18:29:46 -0800 | [diff] [blame] | 3669 | if (set_desc_affinity(desc, mask, &dest)) |
Yinghai Lu | d5dedd4 | 2009-04-27 17:59:21 -0700 | [diff] [blame] | 3670 | return -1; |
venkatesh.pallipadi@intel.com | 58ac1e7 | 2008-09-05 18:02:17 -0700 | [diff] [blame] | 3671 | |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 3672 | cfg = desc->chip_data; |
venkatesh.pallipadi@intel.com | 58ac1e7 | 2008-09-05 18:02:17 -0700 | [diff] [blame] | 3673 | |
| 3674 | hpet_msi_read(irq, &msg); |
| 3675 | |
| 3676 | msg.data &= ~MSI_DATA_VECTOR_MASK; |
| 3677 | msg.data |= MSI_DATA_VECTOR(cfg->vector); |
| 3678 | msg.address_lo &= ~MSI_ADDR_DEST_ID_MASK; |
| 3679 | msg.address_lo |= MSI_ADDR_DEST_ID(dest); |
| 3680 | |
| 3681 | hpet_msi_write(irq, &msg); |
Yinghai Lu | d5dedd4 | 2009-04-27 17:59:21 -0700 | [diff] [blame] | 3682 | |
| 3683 | return 0; |
venkatesh.pallipadi@intel.com | 58ac1e7 | 2008-09-05 18:02:17 -0700 | [diff] [blame] | 3684 | } |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 3685 | |
venkatesh.pallipadi@intel.com | 58ac1e7 | 2008-09-05 18:02:17 -0700 | [diff] [blame] | 3686 | #endif /* CONFIG_SMP */ |
| 3687 | |
Suresh Siddha | c8bc6f3 | 2009-08-04 12:07:09 -0700 | [diff] [blame] | 3688 | static struct irq_chip ir_hpet_msi_type = { |
| 3689 | .name = "IR-HPET_MSI", |
| 3690 | .unmask = hpet_msi_unmask, |
| 3691 | .mask = hpet_msi_mask, |
| 3692 | #ifdef CONFIG_INTR_REMAP |
| 3693 | .ack = ir_ack_apic_edge, |
| 3694 | #ifdef CONFIG_SMP |
| 3695 | .set_affinity = ir_set_msi_irq_affinity, |
| 3696 | #endif |
| 3697 | #endif |
| 3698 | .retrigger = ioapic_retrigger_irq, |
| 3699 | }; |
| 3700 | |
Dmitri Vorobiev | 1cc1852 | 2009-03-22 19:11:09 +0200 | [diff] [blame] | 3701 | static struct irq_chip hpet_msi_type = { |
venkatesh.pallipadi@intel.com | 58ac1e7 | 2008-09-05 18:02:17 -0700 | [diff] [blame] | 3702 | .name = "HPET_MSI", |
| 3703 | .unmask = hpet_msi_unmask, |
| 3704 | .mask = hpet_msi_mask, |
| 3705 | .ack = ack_apic_edge, |
| 3706 | #ifdef CONFIG_SMP |
| 3707 | .set_affinity = hpet_msi_set_affinity, |
| 3708 | #endif |
| 3709 | .retrigger = ioapic_retrigger_irq, |
| 3710 | }; |
| 3711 | |
Suresh Siddha | c8bc6f3 | 2009-08-04 12:07:09 -0700 | [diff] [blame] | 3712 | int arch_setup_hpet_msi(unsigned int irq, unsigned int id) |
venkatesh.pallipadi@intel.com | 58ac1e7 | 2008-09-05 18:02:17 -0700 | [diff] [blame] | 3713 | { |
| 3714 | int ret; |
| 3715 | struct msi_msg msg; |
Pallipadi, Venkatesh | 6ec3cfe | 2009-04-13 15:20:58 -0700 | [diff] [blame] | 3716 | struct irq_desc *desc = irq_to_desc(irq); |
venkatesh.pallipadi@intel.com | 58ac1e7 | 2008-09-05 18:02:17 -0700 | [diff] [blame] | 3717 | |
Suresh Siddha | c8bc6f3 | 2009-08-04 12:07:09 -0700 | [diff] [blame] | 3718 | if (intr_remapping_enabled) { |
| 3719 | struct intel_iommu *iommu = map_hpet_to_ir(id); |
| 3720 | int index; |
| 3721 | |
| 3722 | if (!iommu) |
| 3723 | return -1; |
| 3724 | |
| 3725 | index = alloc_irte(iommu, irq, 1); |
| 3726 | if (index < 0) |
| 3727 | return -1; |
| 3728 | } |
| 3729 | |
| 3730 | ret = msi_compose_msg(NULL, irq, &msg, id); |
venkatesh.pallipadi@intel.com | 58ac1e7 | 2008-09-05 18:02:17 -0700 | [diff] [blame] | 3731 | if (ret < 0) |
| 3732 | return ret; |
| 3733 | |
| 3734 | hpet_msi_write(irq, &msg); |
Pallipadi, Venkatesh | 6ec3cfe | 2009-04-13 15:20:58 -0700 | [diff] [blame] | 3735 | desc->status |= IRQ_MOVE_PCNTXT; |
Suresh Siddha | c8bc6f3 | 2009-08-04 12:07:09 -0700 | [diff] [blame] | 3736 | if (irq_remapped(irq)) |
| 3737 | set_irq_chip_and_handler_name(irq, &ir_hpet_msi_type, |
| 3738 | handle_edge_irq, "edge"); |
| 3739 | else |
| 3740 | set_irq_chip_and_handler_name(irq, &hpet_msi_type, |
| 3741 | handle_edge_irq, "edge"); |
Yinghai Lu | c81bba4 | 2008-09-25 11:53:11 -0700 | [diff] [blame] | 3742 | |
venkatesh.pallipadi@intel.com | 58ac1e7 | 2008-09-05 18:02:17 -0700 | [diff] [blame] | 3743 | return 0; |
| 3744 | } |
| 3745 | #endif |
| 3746 | |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 3747 | #endif /* CONFIG_PCI_MSI */ |
Eric W. Biederman | 8b955b0 | 2006-10-04 02:16:55 -0700 | [diff] [blame] | 3748 | /* |
| 3749 | * Hypertransport interrupt support |
| 3750 | */ |
| 3751 | #ifdef CONFIG_HT_IRQ |
| 3752 | |
| 3753 | #ifdef CONFIG_SMP |
| 3754 | |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 3755 | static void target_ht_irq(unsigned int irq, unsigned int dest, u8 vector) |
Eric W. Biederman | 8b955b0 | 2006-10-04 02:16:55 -0700 | [diff] [blame] | 3756 | { |
Eric W. Biederman | ec68307 | 2006-11-08 17:44:57 -0800 | [diff] [blame] | 3757 | struct ht_irq_msg msg; |
| 3758 | fetch_ht_irq_msg(irq, &msg); |
Eric W. Biederman | 8b955b0 | 2006-10-04 02:16:55 -0700 | [diff] [blame] | 3759 | |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 3760 | msg.address_lo &= ~(HT_IRQ_LOW_VECTOR_MASK | HT_IRQ_LOW_DEST_ID_MASK); |
Eric W. Biederman | ec68307 | 2006-11-08 17:44:57 -0800 | [diff] [blame] | 3761 | msg.address_hi &= ~(HT_IRQ_HIGH_DEST_ID_MASK); |
Eric W. Biederman | 8b955b0 | 2006-10-04 02:16:55 -0700 | [diff] [blame] | 3762 | |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 3763 | msg.address_lo |= HT_IRQ_LOW_VECTOR(vector) | HT_IRQ_LOW_DEST_ID(dest); |
Eric W. Biederman | ec68307 | 2006-11-08 17:44:57 -0800 | [diff] [blame] | 3764 | msg.address_hi |= HT_IRQ_HIGH_DEST_ID(dest); |
Eric W. Biederman | 8b955b0 | 2006-10-04 02:16:55 -0700 | [diff] [blame] | 3765 | |
Eric W. Biederman | ec68307 | 2006-11-08 17:44:57 -0800 | [diff] [blame] | 3766 | write_ht_irq_msg(irq, &msg); |
Eric W. Biederman | 8b955b0 | 2006-10-04 02:16:55 -0700 | [diff] [blame] | 3767 | } |
| 3768 | |
Yinghai Lu | d5dedd4 | 2009-04-27 17:59:21 -0700 | [diff] [blame] | 3769 | static int set_ht_irq_affinity(unsigned int irq, const struct cpumask *mask) |
Eric W. Biederman | 8b955b0 | 2006-10-04 02:16:55 -0700 | [diff] [blame] | 3770 | { |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 3771 | struct irq_desc *desc = irq_to_desc(irq); |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 3772 | struct irq_cfg *cfg; |
Eric W. Biederman | 8b955b0 | 2006-10-04 02:16:55 -0700 | [diff] [blame] | 3773 | unsigned int dest; |
Eric W. Biederman | 8b955b0 | 2006-10-04 02:16:55 -0700 | [diff] [blame] | 3774 | |
Suresh Siddha | 18374d8 | 2009-12-17 18:29:46 -0800 | [diff] [blame] | 3775 | if (set_desc_affinity(desc, mask, &dest)) |
Yinghai Lu | d5dedd4 | 2009-04-27 17:59:21 -0700 | [diff] [blame] | 3776 | return -1; |
Eric W. Biederman | 8b955b0 | 2006-10-04 02:16:55 -0700 | [diff] [blame] | 3777 | |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 3778 | cfg = desc->chip_data; |
Eric W. Biederman | 8b955b0 | 2006-10-04 02:16:55 -0700 | [diff] [blame] | 3779 | |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 3780 | target_ht_irq(irq, dest, cfg->vector); |
Yinghai Lu | d5dedd4 | 2009-04-27 17:59:21 -0700 | [diff] [blame] | 3781 | |
| 3782 | return 0; |
Eric W. Biederman | 8b955b0 | 2006-10-04 02:16:55 -0700 | [diff] [blame] | 3783 | } |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 3784 | |
Eric W. Biederman | 8b955b0 | 2006-10-04 02:16:55 -0700 | [diff] [blame] | 3785 | #endif |
| 3786 | |
Aneesh Kumar K.V | c37e108 | 2006-10-11 01:20:43 -0700 | [diff] [blame] | 3787 | static struct irq_chip ht_irq_chip = { |
Eric W. Biederman | 8b955b0 | 2006-10-04 02:16:55 -0700 | [diff] [blame] | 3788 | .name = "PCI-HT", |
| 3789 | .mask = mask_ht_irq, |
| 3790 | .unmask = unmask_ht_irq, |
Yinghai Lu | 1d02519 | 2008-08-19 20:50:34 -0700 | [diff] [blame] | 3791 | .ack = ack_apic_edge, |
Eric W. Biederman | 8b955b0 | 2006-10-04 02:16:55 -0700 | [diff] [blame] | 3792 | #ifdef CONFIG_SMP |
| 3793 | .set_affinity = set_ht_irq_affinity, |
| 3794 | #endif |
| 3795 | .retrigger = ioapic_retrigger_irq, |
| 3796 | }; |
| 3797 | |
| 3798 | int arch_setup_ht_irq(unsigned int irq, struct pci_dev *dev) |
| 3799 | { |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 3800 | struct irq_cfg *cfg; |
| 3801 | int err; |
Eric W. Biederman | 8b955b0 | 2006-10-04 02:16:55 -0700 | [diff] [blame] | 3802 | |
Jan Beulich | f118263 | 2009-01-14 12:27:35 +0000 | [diff] [blame] | 3803 | if (disable_apic) |
| 3804 | return -ENXIO; |
| 3805 | |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 3806 | cfg = irq_cfg(irq); |
Ingo Molnar | fe402e1 | 2009-01-28 04:32:51 +0100 | [diff] [blame] | 3807 | err = assign_irq_vector(irq, cfg, apic->target_cpus()); |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 3808 | if (!err) { |
Eric W. Biederman | ec68307 | 2006-11-08 17:44:57 -0800 | [diff] [blame] | 3809 | struct ht_irq_msg msg; |
Eric W. Biederman | 8b955b0 | 2006-10-04 02:16:55 -0700 | [diff] [blame] | 3810 | unsigned dest; |
Eric W. Biederman | 8b955b0 | 2006-10-04 02:16:55 -0700 | [diff] [blame] | 3811 | |
Ingo Molnar | debccb3 | 2009-01-28 15:20:18 +0100 | [diff] [blame] | 3812 | dest = apic->cpu_mask_to_apicid_and(cfg->domain, |
| 3813 | apic->target_cpus()); |
Eric W. Biederman | 8b955b0 | 2006-10-04 02:16:55 -0700 | [diff] [blame] | 3814 | |
Eric W. Biederman | ec68307 | 2006-11-08 17:44:57 -0800 | [diff] [blame] | 3815 | msg.address_hi = HT_IRQ_HIGH_DEST_ID(dest); |
Eric W. Biederman | 8b955b0 | 2006-10-04 02:16:55 -0700 | [diff] [blame] | 3816 | |
Eric W. Biederman | ec68307 | 2006-11-08 17:44:57 -0800 | [diff] [blame] | 3817 | msg.address_lo = |
| 3818 | HT_IRQ_LOW_BASE | |
Eric W. Biederman | 8b955b0 | 2006-10-04 02:16:55 -0700 | [diff] [blame] | 3819 | HT_IRQ_LOW_DEST_ID(dest) | |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 3820 | HT_IRQ_LOW_VECTOR(cfg->vector) | |
Ingo Molnar | 9b5bc8d | 2009-01-28 04:09:58 +0100 | [diff] [blame] | 3821 | ((apic->irq_dest_mode == 0) ? |
Eric W. Biederman | 8b955b0 | 2006-10-04 02:16:55 -0700 | [diff] [blame] | 3822 | HT_IRQ_LOW_DM_PHYSICAL : |
| 3823 | HT_IRQ_LOW_DM_LOGICAL) | |
| 3824 | HT_IRQ_LOW_RQEOI_EDGE | |
Ingo Molnar | 9b5bc8d | 2009-01-28 04:09:58 +0100 | [diff] [blame] | 3825 | ((apic->irq_delivery_mode != dest_LowestPrio) ? |
Eric W. Biederman | 8b955b0 | 2006-10-04 02:16:55 -0700 | [diff] [blame] | 3826 | HT_IRQ_LOW_MT_FIXED : |
| 3827 | HT_IRQ_LOW_MT_ARBITRATED) | |
| 3828 | HT_IRQ_LOW_IRQ_MASKED; |
| 3829 | |
Eric W. Biederman | ec68307 | 2006-11-08 17:44:57 -0800 | [diff] [blame] | 3830 | write_ht_irq_msg(irq, &msg); |
Eric W. Biederman | 8b955b0 | 2006-10-04 02:16:55 -0700 | [diff] [blame] | 3831 | |
Ingo Molnar | a460e74 | 2006-10-17 00:10:03 -0700 | [diff] [blame] | 3832 | set_irq_chip_and_handler_name(irq, &ht_irq_chip, |
| 3833 | handle_edge_irq, "edge"); |
Yinghai Lu | c81bba4 | 2008-09-25 11:53:11 -0700 | [diff] [blame] | 3834 | |
| 3835 | dev_printk(KERN_DEBUG, &dev->dev, "irq %d for HT\n", irq); |
Eric W. Biederman | 8b955b0 | 2006-10-04 02:16:55 -0700 | [diff] [blame] | 3836 | } |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 3837 | return err; |
Eric W. Biederman | 8b955b0 | 2006-10-04 02:16:55 -0700 | [diff] [blame] | 3838 | } |
| 3839 | #endif /* CONFIG_HT_IRQ */ |
| 3840 | |
Yinghai Lu | 9d6a4d0 | 2008-08-19 20:50:52 -0700 | [diff] [blame] | 3841 | int __init io_apic_get_redir_entries (int ioapic) |
| 3842 | { |
| 3843 | union IO_APIC_reg_01 reg_01; |
| 3844 | unsigned long flags; |
| 3845 | |
Thomas Gleixner | dade771 | 2009-07-25 18:39:36 +0200 | [diff] [blame] | 3846 | raw_spin_lock_irqsave(&ioapic_lock, flags); |
Yinghai Lu | 9d6a4d0 | 2008-08-19 20:50:52 -0700 | [diff] [blame] | 3847 | reg_01.raw = io_apic_read(ioapic, 1); |
Thomas Gleixner | dade771 | 2009-07-25 18:39:36 +0200 | [diff] [blame] | 3848 | raw_spin_unlock_irqrestore(&ioapic_lock, flags); |
Yinghai Lu | 9d6a4d0 | 2008-08-19 20:50:52 -0700 | [diff] [blame] | 3849 | |
| 3850 | return reg_01.bits.entries; |
| 3851 | } |
| 3852 | |
Yinghai Lu | be5d535 | 2008-12-05 18:58:33 -0800 | [diff] [blame] | 3853 | void __init probe_nr_irqs_gsi(void) |
Yinghai Lu | 9d6a4d0 | 2008-08-19 20:50:52 -0700 | [diff] [blame] | 3854 | { |
Yinghai Lu | be5d535 | 2008-12-05 18:58:33 -0800 | [diff] [blame] | 3855 | int nr = 0; |
| 3856 | |
Yinghai Lu | cc6c500 | 2009-02-08 16:18:03 -0800 | [diff] [blame] | 3857 | nr = acpi_probe_gsi(); |
| 3858 | if (nr > nr_irqs_gsi) { |
Yinghai Lu | be5d535 | 2008-12-05 18:58:33 -0800 | [diff] [blame] | 3859 | nr_irqs_gsi = nr; |
Yinghai Lu | cc6c500 | 2009-02-08 16:18:03 -0800 | [diff] [blame] | 3860 | } else { |
| 3861 | /* for acpi=off or acpi is not compiled in */ |
| 3862 | int idx; |
| 3863 | |
| 3864 | nr = 0; |
| 3865 | for (idx = 0; idx < nr_ioapics; idx++) |
| 3866 | nr += io_apic_get_redir_entries(idx) + 1; |
| 3867 | |
| 3868 | if (nr > nr_irqs_gsi) |
| 3869 | nr_irqs_gsi = nr; |
| 3870 | } |
| 3871 | |
| 3872 | printk(KERN_DEBUG "nr_irqs_gsi: %d\n", nr_irqs_gsi); |
Yinghai Lu | 9d6a4d0 | 2008-08-19 20:50:52 -0700 | [diff] [blame] | 3873 | } |
| 3874 | |
Ingo Molnar | 21c2fd9 | 2010-02-26 11:17:16 +0100 | [diff] [blame] | 3875 | #ifdef CONFIG_SPARSE_IRQ |
| 3876 | int __init arch_probe_nr_irqs(void) |
| 3877 | { |
| 3878 | int nr; |
| 3879 | |
| 3880 | if (nr_irqs > (NR_VECTORS * nr_cpu_ids)) |
| 3881 | nr_irqs = NR_VECTORS * nr_cpu_ids; |
| 3882 | |
| 3883 | nr = nr_irqs_gsi + 8 * nr_cpu_ids; |
| 3884 | #if defined(CONFIG_PCI_MSI) || defined(CONFIG_HT_IRQ) |
| 3885 | /* |
| 3886 | * for MSI and HT dyn irq |
| 3887 | */ |
| 3888 | nr += nr_irqs_gsi * 16; |
| 3889 | #endif |
| 3890 | if (nr < nr_irqs) |
| 3891 | nr_irqs = nr; |
| 3892 | |
| 3893 | return 0; |
| 3894 | } |
| 3895 | #endif |
| 3896 | |
Yinghai Lu | e519807 | 2009-05-15 13:05:16 -0700 | [diff] [blame] | 3897 | static int __io_apic_set_pci_routing(struct device *dev, int irq, |
| 3898 | struct io_apic_irq_attr *irq_attr) |
Yinghai Lu | 5ef2183 | 2009-05-06 10:08:50 -0700 | [diff] [blame] | 3899 | { |
| 3900 | struct irq_desc *desc; |
| 3901 | struct irq_cfg *cfg; |
| 3902 | int node; |
Yinghai Lu | e519807 | 2009-05-15 13:05:16 -0700 | [diff] [blame] | 3903 | int ioapic, pin; |
| 3904 | int trigger, polarity; |
Yinghai Lu | 5ef2183 | 2009-05-06 10:08:50 -0700 | [diff] [blame] | 3905 | |
Yinghai Lu | e519807 | 2009-05-15 13:05:16 -0700 | [diff] [blame] | 3906 | ioapic = irq_attr->ioapic; |
Yinghai Lu | 5ef2183 | 2009-05-06 10:08:50 -0700 | [diff] [blame] | 3907 | if (!IO_APIC_IRQ(irq)) { |
| 3908 | apic_printk(APIC_QUIET,KERN_ERR "IOAPIC[%d]: Invalid reference to IRQ 0\n", |
| 3909 | ioapic); |
| 3910 | return -EINVAL; |
| 3911 | } |
| 3912 | |
| 3913 | if (dev) |
| 3914 | node = dev_to_node(dev); |
| 3915 | else |
| 3916 | node = cpu_to_node(boot_cpu_id); |
| 3917 | |
| 3918 | desc = irq_to_desc_alloc_node(irq, node); |
| 3919 | if (!desc) { |
| 3920 | printk(KERN_INFO "can not get irq_desc %d\n", irq); |
| 3921 | return 0; |
| 3922 | } |
| 3923 | |
Yinghai Lu | e519807 | 2009-05-15 13:05:16 -0700 | [diff] [blame] | 3924 | pin = irq_attr->ioapic_pin; |
| 3925 | trigger = irq_attr->trigger; |
| 3926 | polarity = irq_attr->polarity; |
| 3927 | |
Yinghai Lu | 5ef2183 | 2009-05-06 10:08:50 -0700 | [diff] [blame] | 3928 | /* |
| 3929 | * IRQs < 16 are already in the irq_2_pin[] map |
| 3930 | */ |
Thomas Gleixner | bc07844 | 2009-08-29 18:09:57 +0200 | [diff] [blame] | 3931 | if (irq >= nr_legacy_irqs) { |
Yinghai Lu | 5ef2183 | 2009-05-06 10:08:50 -0700 | [diff] [blame] | 3932 | cfg = desc->chip_data; |
Cyrill Gorcunov | f3d1915 | 2009-08-06 00:09:31 +0400 | [diff] [blame] | 3933 | if (add_pin_to_irq_node_nopanic(cfg, node, ioapic, pin)) { |
| 3934 | printk(KERN_INFO "can not add pin %d for irq %d\n", |
| 3935 | pin, irq); |
| 3936 | return 0; |
| 3937 | } |
Yinghai Lu | 5ef2183 | 2009-05-06 10:08:50 -0700 | [diff] [blame] | 3938 | } |
| 3939 | |
Yinghai Lu | e519807 | 2009-05-15 13:05:16 -0700 | [diff] [blame] | 3940 | setup_IO_APIC_irq(ioapic, pin, irq, desc, trigger, polarity); |
Yinghai Lu | 5ef2183 | 2009-05-06 10:08:50 -0700 | [diff] [blame] | 3941 | |
| 3942 | return 0; |
| 3943 | } |
| 3944 | |
Yinghai Lu | e519807 | 2009-05-15 13:05:16 -0700 | [diff] [blame] | 3945 | int io_apic_set_pci_routing(struct device *dev, int irq, |
| 3946 | struct io_apic_irq_attr *irq_attr) |
Yinghai Lu | 5ef2183 | 2009-05-06 10:08:50 -0700 | [diff] [blame] | 3947 | { |
Yinghai Lu | e519807 | 2009-05-15 13:05:16 -0700 | [diff] [blame] | 3948 | int ioapic, pin; |
Yinghai Lu | 5ef2183 | 2009-05-06 10:08:50 -0700 | [diff] [blame] | 3949 | /* |
| 3950 | * Avoid pin reprogramming. PRTs typically include entries |
| 3951 | * with redundant pin->gsi mappings (but unique PCI devices); |
| 3952 | * we only program the IOAPIC on the first. |
| 3953 | */ |
Yinghai Lu | e519807 | 2009-05-15 13:05:16 -0700 | [diff] [blame] | 3954 | ioapic = irq_attr->ioapic; |
| 3955 | pin = irq_attr->ioapic_pin; |
Yinghai Lu | 5ef2183 | 2009-05-06 10:08:50 -0700 | [diff] [blame] | 3956 | if (test_bit(pin, mp_ioapic_routing[ioapic].pin_programmed)) { |
| 3957 | pr_debug("Pin %d-%d already programmed\n", |
| 3958 | mp_ioapics[ioapic].apicid, pin); |
| 3959 | return 0; |
| 3960 | } |
| 3961 | set_bit(pin, mp_ioapic_routing[ioapic].pin_programmed); |
| 3962 | |
Yinghai Lu | e519807 | 2009-05-15 13:05:16 -0700 | [diff] [blame] | 3963 | return __io_apic_set_pci_routing(dev, irq, irq_attr); |
Yinghai Lu | 5ef2183 | 2009-05-06 10:08:50 -0700 | [diff] [blame] | 3964 | } |
| 3965 | |
Feng Tang | 2a4ab64 | 2009-07-07 23:01:15 -0400 | [diff] [blame] | 3966 | u8 __init io_apic_unique_id(u8 id) |
| 3967 | { |
| 3968 | #ifdef CONFIG_X86_32 |
| 3969 | if ((boot_cpu_data.x86_vendor == X86_VENDOR_INTEL) && |
| 3970 | !APIC_XAPIC(apic_version[boot_cpu_physical_apicid])) |
| 3971 | return io_apic_get_unique_id(nr_ioapics, id); |
| 3972 | else |
| 3973 | return id; |
| 3974 | #else |
| 3975 | int i; |
| 3976 | DECLARE_BITMAP(used, 256); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3977 | |
Feng Tang | 2a4ab64 | 2009-07-07 23:01:15 -0400 | [diff] [blame] | 3978 | bitmap_zero(used, 256); |
| 3979 | for (i = 0; i < nr_ioapics; i++) { |
| 3980 | struct mpc_ioapic *ia = &mp_ioapics[i]; |
| 3981 | __set_bit(ia->apicid, used); |
| 3982 | } |
| 3983 | if (!test_bit(id, used)) |
| 3984 | return id; |
| 3985 | return find_first_zero_bit(used, 256); |
| 3986 | #endif |
| 3987 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3988 | |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 3989 | #ifdef CONFIG_X86_32 |
Paolo Ciarrocchi | 3606244 | 2008-06-08 13:07:18 +0200 | [diff] [blame] | 3990 | int __init io_apic_get_unique_id(int ioapic, int apic_id) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3991 | { |
| 3992 | union IO_APIC_reg_00 reg_00; |
| 3993 | static physid_mask_t apic_id_map = PHYSID_MASK_NONE; |
| 3994 | physid_mask_t tmp; |
| 3995 | unsigned long flags; |
| 3996 | int i = 0; |
| 3997 | |
| 3998 | /* |
Paolo Ciarrocchi | 3606244 | 2008-06-08 13:07:18 +0200 | [diff] [blame] | 3999 | * The P4 platform supports up to 256 APIC IDs on two separate APIC |
| 4000 | * buses (one for LAPICs, one for IOAPICs), where predecessors only |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 4001 | * supports up to 16 on one shared APIC bus. |
Paolo Ciarrocchi | 3606244 | 2008-06-08 13:07:18 +0200 | [diff] [blame] | 4002 | * |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 4003 | * TBD: Expand LAPIC/IOAPIC support on P4-class systems to take full |
| 4004 | * advantage of new APIC bus architecture. |
| 4005 | */ |
| 4006 | |
| 4007 | if (physids_empty(apic_id_map)) |
Cyrill Gorcunov | 7abc075 | 2009-11-10 01:06:59 +0300 | [diff] [blame] | 4008 | apic->ioapic_phys_id_map(&phys_cpu_present_map, &apic_id_map); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 4009 | |
Thomas Gleixner | dade771 | 2009-07-25 18:39:36 +0200 | [diff] [blame] | 4010 | raw_spin_lock_irqsave(&ioapic_lock, flags); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 4011 | reg_00.raw = io_apic_read(ioapic, 0); |
Thomas Gleixner | dade771 | 2009-07-25 18:39:36 +0200 | [diff] [blame] | 4012 | raw_spin_unlock_irqrestore(&ioapic_lock, flags); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 4013 | |
| 4014 | if (apic_id >= get_physical_broadcast()) { |
| 4015 | printk(KERN_WARNING "IOAPIC[%d]: Invalid apic_id %d, trying " |
| 4016 | "%d\n", ioapic, apic_id, reg_00.bits.ID); |
| 4017 | apic_id = reg_00.bits.ID; |
| 4018 | } |
| 4019 | |
| 4020 | /* |
Paolo Ciarrocchi | 3606244 | 2008-06-08 13:07:18 +0200 | [diff] [blame] | 4021 | * Every APIC in a system must have a unique ID or we get lots of nice |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 4022 | * 'stuck on smp_invalidate_needed IPI wait' messages. |
| 4023 | */ |
Cyrill Gorcunov | 7abc075 | 2009-11-10 01:06:59 +0300 | [diff] [blame] | 4024 | if (apic->check_apicid_used(&apic_id_map, apic_id)) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 4025 | |
| 4026 | for (i = 0; i < get_physical_broadcast(); i++) { |
Cyrill Gorcunov | 7abc075 | 2009-11-10 01:06:59 +0300 | [diff] [blame] | 4027 | if (!apic->check_apicid_used(&apic_id_map, i)) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 4028 | break; |
| 4029 | } |
| 4030 | |
| 4031 | if (i == get_physical_broadcast()) |
| 4032 | panic("Max apic_id exceeded!\n"); |
| 4033 | |
| 4034 | printk(KERN_WARNING "IOAPIC[%d]: apic_id %d already used, " |
| 4035 | "trying %d\n", ioapic, apic_id, i); |
| 4036 | |
| 4037 | apic_id = i; |
Paolo Ciarrocchi | 3606244 | 2008-06-08 13:07:18 +0200 | [diff] [blame] | 4038 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 4039 | |
Cyrill Gorcunov | 7abc075 | 2009-11-10 01:06:59 +0300 | [diff] [blame] | 4040 | apic->apicid_to_cpu_present(apic_id, &tmp); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 4041 | physids_or(apic_id_map, apic_id_map, tmp); |
| 4042 | |
| 4043 | if (reg_00.bits.ID != apic_id) { |
| 4044 | reg_00.bits.ID = apic_id; |
| 4045 | |
Thomas Gleixner | dade771 | 2009-07-25 18:39:36 +0200 | [diff] [blame] | 4046 | raw_spin_lock_irqsave(&ioapic_lock, flags); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 4047 | io_apic_write(ioapic, 0, reg_00.raw); |
| 4048 | reg_00.raw = io_apic_read(ioapic, 0); |
Thomas Gleixner | dade771 | 2009-07-25 18:39:36 +0200 | [diff] [blame] | 4049 | raw_spin_unlock_irqrestore(&ioapic_lock, flags); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 4050 | |
| 4051 | /* Sanity check */ |
Andreas Deresch | 6070f9e | 2006-02-26 04:18:34 +0100 | [diff] [blame] | 4052 | if (reg_00.bits.ID != apic_id) { |
| 4053 | printk("IOAPIC[%d]: Unable to change apic_id!\n", ioapic); |
| 4054 | return -1; |
| 4055 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 4056 | } |
| 4057 | |
| 4058 | apic_printk(APIC_VERBOSE, KERN_INFO |
| 4059 | "IOAPIC[%d]: Assigned apic_id %d\n", ioapic, apic_id); |
| 4060 | |
| 4061 | return apic_id; |
| 4062 | } |
Naga Chumbalkar | 58f892e | 2009-05-26 21:48:07 +0000 | [diff] [blame] | 4063 | #endif |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 4064 | |
Paolo Ciarrocchi | 3606244 | 2008-06-08 13:07:18 +0200 | [diff] [blame] | 4065 | int __init io_apic_get_version(int ioapic) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 4066 | { |
| 4067 | union IO_APIC_reg_01 reg_01; |
| 4068 | unsigned long flags; |
| 4069 | |
Thomas Gleixner | dade771 | 2009-07-25 18:39:36 +0200 | [diff] [blame] | 4070 | raw_spin_lock_irqsave(&ioapic_lock, flags); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 4071 | reg_01.raw = io_apic_read(ioapic, 1); |
Thomas Gleixner | dade771 | 2009-07-25 18:39:36 +0200 | [diff] [blame] | 4072 | raw_spin_unlock_irqrestore(&ioapic_lock, flags); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 4073 | |
| 4074 | return reg_01.bits.version; |
| 4075 | } |
| 4076 | |
Shaohua Li | 61fd47e | 2007-11-17 01:05:28 -0500 | [diff] [blame] | 4077 | int acpi_get_override_irq(int bus_irq, int *trigger, int *polarity) |
| 4078 | { |
| 4079 | int i; |
| 4080 | |
| 4081 | if (skip_ioapic_setup) |
| 4082 | return -1; |
| 4083 | |
| 4084 | for (i = 0; i < mp_irq_entries; i++) |
Jaswinder Singh Rajput | c2c2174 | 2009-01-12 17:47:22 +0530 | [diff] [blame] | 4085 | if (mp_irqs[i].irqtype == mp_INT && |
| 4086 | mp_irqs[i].srcbusirq == bus_irq) |
Shaohua Li | 61fd47e | 2007-11-17 01:05:28 -0500 | [diff] [blame] | 4087 | break; |
| 4088 | if (i >= mp_irq_entries) |
| 4089 | return -1; |
| 4090 | |
| 4091 | *trigger = irq_trigger(i); |
| 4092 | *polarity = irq_polarity(i); |
| 4093 | return 0; |
| 4094 | } |
| 4095 | |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 4096 | /* |
| 4097 | * This function currently is only a helper for the i386 smp boot process where |
| 4098 | * we need to reprogram the ioredtbls to cater for the cpus which have come online |
Ingo Molnar | fe402e1 | 2009-01-28 04:32:51 +0100 | [diff] [blame] | 4099 | * so mask in all cases should simply be apic->target_cpus() |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 4100 | */ |
| 4101 | #ifdef CONFIG_SMP |
| 4102 | void __init setup_ioapic_dest(void) |
| 4103 | { |
Eric W. Biederman | fad5399 | 2010-02-28 01:06:34 -0800 | [diff] [blame^] | 4104 | int pin, ioapic, irq, irq_entry; |
Thomas Gleixner | 6c2e940 | 2008-11-07 12:33:49 +0100 | [diff] [blame] | 4105 | struct irq_desc *desc; |
Mike Travis | 22f65d3 | 2008-12-16 17:33:56 -0800 | [diff] [blame] | 4106 | const struct cpumask *mask; |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 4107 | |
| 4108 | if (skip_ioapic_setup == 1) |
| 4109 | return; |
| 4110 | |
Eric W. Biederman | fad5399 | 2010-02-28 01:06:34 -0800 | [diff] [blame^] | 4111 | for (ioapic = 0; ioapic < nr_ioapics; ioapic++) |
Yinghai Lu | b9c61b70 | 2009-05-06 10:10:06 -0700 | [diff] [blame] | 4112 | for (pin = 0; pin < nr_ioapic_registers[ioapic]; pin++) { |
| 4113 | irq_entry = find_irq_entry(ioapic, pin, mp_INT); |
| 4114 | if (irq_entry == -1) |
| 4115 | continue; |
| 4116 | irq = pin_2_irq(irq_entry, ioapic, pin); |
| 4117 | |
Eric W. Biederman | fad5399 | 2010-02-28 01:06:34 -0800 | [diff] [blame^] | 4118 | if ((ioapic > 0) && (irq > 16)) |
| 4119 | continue; |
| 4120 | |
Yinghai Lu | b9c61b70 | 2009-05-06 10:10:06 -0700 | [diff] [blame] | 4121 | desc = irq_to_desc(irq); |
| 4122 | |
| 4123 | /* |
| 4124 | * Honour affinities which have been set in early boot |
| 4125 | */ |
| 4126 | if (desc->status & |
| 4127 | (IRQ_NO_BALANCING | IRQ_AFFINITY_SET)) |
| 4128 | mask = desc->affinity; |
| 4129 | else |
| 4130 | mask = apic->target_cpus(); |
| 4131 | |
| 4132 | if (intr_remapping_enabled) |
| 4133 | set_ir_ioapic_affinity_irq_desc(desc, mask); |
| 4134 | else |
| 4135 | set_ioapic_affinity_irq_desc(desc, mask); |
| 4136 | } |
| 4137 | |
Yinghai Lu | 497c9a1 | 2008-08-19 20:50:28 -0700 | [diff] [blame] | 4138 | } |
| 4139 | #endif |
| 4140 | |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 4141 | #define IOAPIC_RESOURCE_NAME_SIZE 11 |
| 4142 | |
| 4143 | static struct resource *ioapic_resources; |
| 4144 | |
Cyrill Gorcunov | ffc4383 | 2009-08-24 21:53:39 +0400 | [diff] [blame] | 4145 | static struct resource * __init ioapic_setup_resources(int nr_ioapics) |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 4146 | { |
| 4147 | unsigned long n; |
| 4148 | struct resource *res; |
| 4149 | char *mem; |
| 4150 | int i; |
| 4151 | |
| 4152 | if (nr_ioapics <= 0) |
| 4153 | return NULL; |
| 4154 | |
| 4155 | n = IOAPIC_RESOURCE_NAME_SIZE + sizeof(struct resource); |
| 4156 | n *= nr_ioapics; |
| 4157 | |
| 4158 | mem = alloc_bootmem(n); |
| 4159 | res = (void *)mem; |
| 4160 | |
Cyrill Gorcunov | ffc4383 | 2009-08-24 21:53:39 +0400 | [diff] [blame] | 4161 | mem += sizeof(struct resource) * nr_ioapics; |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 4162 | |
Cyrill Gorcunov | ffc4383 | 2009-08-24 21:53:39 +0400 | [diff] [blame] | 4163 | for (i = 0; i < nr_ioapics; i++) { |
| 4164 | res[i].name = mem; |
| 4165 | res[i].flags = IORESOURCE_MEM | IORESOURCE_BUSY; |
Cyrill Gorcunov | 4343fe1 | 2009-11-08 18:54:31 +0300 | [diff] [blame] | 4166 | snprintf(mem, IOAPIC_RESOURCE_NAME_SIZE, "IOAPIC %u", i); |
Cyrill Gorcunov | ffc4383 | 2009-08-24 21:53:39 +0400 | [diff] [blame] | 4167 | mem += IOAPIC_RESOURCE_NAME_SIZE; |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 4168 | } |
| 4169 | |
| 4170 | ioapic_resources = res; |
| 4171 | |
| 4172 | return res; |
| 4173 | } |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 4174 | |
Yinghai Lu | f3294a3 | 2008-06-27 01:41:56 -0700 | [diff] [blame] | 4175 | void __init ioapic_init_mappings(void) |
| 4176 | { |
| 4177 | unsigned long ioapic_phys, idx = FIX_IO_APIC_BASE_0; |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 4178 | struct resource *ioapic_res; |
Thomas Gleixner | d6c88a5 | 2008-10-15 15:27:23 +0200 | [diff] [blame] | 4179 | int i; |
Yinghai Lu | f3294a3 | 2008-06-27 01:41:56 -0700 | [diff] [blame] | 4180 | |
Cyrill Gorcunov | ffc4383 | 2009-08-24 21:53:39 +0400 | [diff] [blame] | 4181 | ioapic_res = ioapic_setup_resources(nr_ioapics); |
Yinghai Lu | f3294a3 | 2008-06-27 01:41:56 -0700 | [diff] [blame] | 4182 | for (i = 0; i < nr_ioapics; i++) { |
| 4183 | if (smp_found_config) { |
Jaswinder Singh Rajput | b5ba7e6 | 2009-01-12 17:46:17 +0530 | [diff] [blame] | 4184 | ioapic_phys = mp_ioapics[i].apicaddr; |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 4185 | #ifdef CONFIG_X86_32 |
Thomas Gleixner | d6c88a5 | 2008-10-15 15:27:23 +0200 | [diff] [blame] | 4186 | if (!ioapic_phys) { |
| 4187 | printk(KERN_ERR |
| 4188 | "WARNING: bogus zero IO-APIC " |
| 4189 | "address found in MPTABLE, " |
| 4190 | "disabling IO/APIC support!\n"); |
| 4191 | smp_found_config = 0; |
| 4192 | skip_ioapic_setup = 1; |
| 4193 | goto fake_ioapic_page; |
| 4194 | } |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 4195 | #endif |
Yinghai Lu | f3294a3 | 2008-06-27 01:41:56 -0700 | [diff] [blame] | 4196 | } else { |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 4197 | #ifdef CONFIG_X86_32 |
Yinghai Lu | f3294a3 | 2008-06-27 01:41:56 -0700 | [diff] [blame] | 4198 | fake_ioapic_page: |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 4199 | #endif |
Cyrill Gorcunov | e79c65a | 2009-11-16 18:14:26 +0300 | [diff] [blame] | 4200 | ioapic_phys = (unsigned long)alloc_bootmem_pages(PAGE_SIZE); |
Yinghai Lu | f3294a3 | 2008-06-27 01:41:56 -0700 | [diff] [blame] | 4201 | ioapic_phys = __pa(ioapic_phys); |
| 4202 | } |
| 4203 | set_fixmap_nocache(idx, ioapic_phys); |
Cyrill Gorcunov | e79c65a | 2009-11-16 18:14:26 +0300 | [diff] [blame] | 4204 | apic_printk(APIC_VERBOSE, "mapped IOAPIC to %08lx (%08lx)\n", |
| 4205 | __fix_to_virt(idx) + (ioapic_phys & ~PAGE_MASK), |
| 4206 | ioapic_phys); |
Yinghai Lu | f3294a3 | 2008-06-27 01:41:56 -0700 | [diff] [blame] | 4207 | idx++; |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 4208 | |
Cyrill Gorcunov | ffc4383 | 2009-08-24 21:53:39 +0400 | [diff] [blame] | 4209 | ioapic_res->start = ioapic_phys; |
Cyrill Gorcunov | e79c65a | 2009-11-16 18:14:26 +0300 | [diff] [blame] | 4210 | ioapic_res->end = ioapic_phys + IO_APIC_SLOT_SIZE - 1; |
Cyrill Gorcunov | ffc4383 | 2009-08-24 21:53:39 +0400 | [diff] [blame] | 4211 | ioapic_res++; |
Yinghai Lu | f3294a3 | 2008-06-27 01:41:56 -0700 | [diff] [blame] | 4212 | } |
| 4213 | } |
| 4214 | |
Yinghai Lu | 857fdc5 | 2009-07-10 09:36:20 -0700 | [diff] [blame] | 4215 | void __init ioapic_insert_resources(void) |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 4216 | { |
| 4217 | int i; |
| 4218 | struct resource *r = ioapic_resources; |
| 4219 | |
| 4220 | if (!r) { |
Yinghai Lu | 857fdc5 | 2009-07-10 09:36:20 -0700 | [diff] [blame] | 4221 | if (nr_ioapics > 0) |
Bartlomiej Zolnierkiewicz | 04c93ce | 2009-03-20 21:02:55 +0100 | [diff] [blame] | 4222 | printk(KERN_ERR |
| 4223 | "IO APIC resources couldn't be allocated.\n"); |
Yinghai Lu | 857fdc5 | 2009-07-10 09:36:20 -0700 | [diff] [blame] | 4224 | return; |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 4225 | } |
| 4226 | |
| 4227 | for (i = 0; i < nr_ioapics; i++) { |
| 4228 | insert_resource(&iomem_resource, r); |
| 4229 | r++; |
| 4230 | } |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 4231 | } |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 4232 | |
Feng Tang | 2a4ab64 | 2009-07-07 23:01:15 -0400 | [diff] [blame] | 4233 | int mp_find_ioapic(int gsi) |
| 4234 | { |
| 4235 | int i = 0; |
| 4236 | |
| 4237 | /* Find the IOAPIC that manages this GSI. */ |
| 4238 | for (i = 0; i < nr_ioapics; i++) { |
| 4239 | if ((gsi >= mp_gsi_routing[i].gsi_base) |
| 4240 | && (gsi <= mp_gsi_routing[i].gsi_end)) |
| 4241 | return i; |
| 4242 | } |
| 4243 | |
| 4244 | printk(KERN_ERR "ERROR: Unable to locate IOAPIC for GSI %d\n", gsi); |
| 4245 | return -1; |
| 4246 | } |
| 4247 | |
| 4248 | int mp_find_ioapic_pin(int ioapic, int gsi) |
| 4249 | { |
| 4250 | if (WARN_ON(ioapic == -1)) |
| 4251 | return -1; |
| 4252 | if (WARN_ON(gsi > mp_gsi_routing[ioapic].gsi_end)) |
| 4253 | return -1; |
| 4254 | |
| 4255 | return gsi - mp_gsi_routing[ioapic].gsi_base; |
| 4256 | } |
| 4257 | |
| 4258 | static int bad_ioapic(unsigned long address) |
| 4259 | { |
| 4260 | if (nr_ioapics >= MAX_IO_APICS) { |
| 4261 | printk(KERN_WARNING "WARING: Max # of I/O APICs (%d) exceeded " |
| 4262 | "(found %d), skipping\n", MAX_IO_APICS, nr_ioapics); |
| 4263 | return 1; |
| 4264 | } |
| 4265 | if (!address) { |
| 4266 | printk(KERN_WARNING "WARNING: Bogus (zero) I/O APIC address" |
| 4267 | " found in table, skipping!\n"); |
| 4268 | return 1; |
| 4269 | } |
Ingo Molnar | 54168ed | 2008-08-20 09:07:45 +0200 | [diff] [blame] | 4270 | return 0; |
| 4271 | } |
| 4272 | |
Feng Tang | 2a4ab64 | 2009-07-07 23:01:15 -0400 | [diff] [blame] | 4273 | void __init mp_register_ioapic(int id, u32 address, u32 gsi_base) |
| 4274 | { |
| 4275 | int idx = 0; |
| 4276 | |
| 4277 | if (bad_ioapic(address)) |
| 4278 | return; |
| 4279 | |
| 4280 | idx = nr_ioapics; |
| 4281 | |
| 4282 | mp_ioapics[idx].type = MP_IOAPIC; |
| 4283 | mp_ioapics[idx].flags = MPC_APIC_USABLE; |
| 4284 | mp_ioapics[idx].apicaddr = address; |
| 4285 | |
| 4286 | set_fixmap_nocache(FIX_IO_APIC_BASE_0 + idx, address); |
| 4287 | mp_ioapics[idx].apicid = io_apic_unique_id(id); |
| 4288 | mp_ioapics[idx].apicver = io_apic_get_version(idx); |
| 4289 | |
| 4290 | /* |
| 4291 | * Build basic GSI lookup table to facilitate gsi->io_apic lookups |
| 4292 | * and to prevent reprogramming of IOAPIC pins (PCI GSIs). |
| 4293 | */ |
| 4294 | mp_gsi_routing[idx].gsi_base = gsi_base; |
| 4295 | mp_gsi_routing[idx].gsi_end = gsi_base + |
| 4296 | io_apic_get_redir_entries(idx); |
| 4297 | |
| 4298 | printk(KERN_INFO "IOAPIC[%d]: apic_id %d, version %d, address 0x%x, " |
| 4299 | "GSI %d-%d\n", idx, mp_ioapics[idx].apicid, |
| 4300 | mp_ioapics[idx].apicver, mp_ioapics[idx].apicaddr, |
| 4301 | mp_gsi_routing[idx].gsi_base, mp_gsi_routing[idx].gsi_end); |
| 4302 | |
| 4303 | nr_ioapics++; |
| 4304 | } |