blob: fa312610c2d24f79460ef609d8a7f199ae1cda19 [file] [log] [blame]
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001/*
2 * drivers/net/ethernet/mellanox/mlxsw/spectrum.c
3 * Copyright (c) 2015 Mellanox Technologies. All rights reserved.
4 * Copyright (c) 2015 Jiri Pirko <jiri@mellanox.com>
5 * Copyright (c) 2015 Ido Schimmel <idosch@mellanox.com>
6 * Copyright (c) 2015 Elad Raz <eladr@mellanox.com>
7 *
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions are met:
10 *
11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the distribution.
16 * 3. Neither the names of the copyright holders nor the names of its
17 * contributors may be used to endorse or promote products derived from
18 * this software without specific prior written permission.
19 *
20 * Alternatively, this software may be distributed under the terms of the
21 * GNU General Public License ("GPL") version 2 as published by the Free
22 * Software Foundation.
23 *
24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
27 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
28 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
29 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
30 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
31 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
32 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
33 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
34 * POSSIBILITY OF SUCH DAMAGE.
35 */
36
37#include <linux/kernel.h>
38#include <linux/module.h>
39#include <linux/types.h>
40#include <linux/netdevice.h>
41#include <linux/etherdevice.h>
42#include <linux/ethtool.h>
43#include <linux/slab.h>
44#include <linux/device.h>
45#include <linux/skbuff.h>
46#include <linux/if_vlan.h>
47#include <linux/if_bridge.h>
48#include <linux/workqueue.h>
49#include <linux/jiffies.h>
50#include <linux/bitops.h>
Ido Schimmel7f71eb42015-12-15 16:03:37 +010051#include <linux/list.h>
Ido Schimmel80bedf12016-06-20 23:03:59 +020052#include <linux/notifier.h>
Ido Schimmel90183b92016-04-06 17:10:08 +020053#include <linux/dcbnl.h>
Ido Schimmel99724c12016-07-04 08:23:14 +020054#include <linux/inetdevice.h>
Jiri Pirko56ade8f2015-10-16 14:01:37 +020055#include <net/switchdev.h>
56#include <generated/utsrelease.h>
Yotam Gigi763b4b72016-07-21 12:03:17 +020057#include <net/pkt_cls.h>
58#include <net/tc_act/tc_mirred.h>
Jiri Pirkoe7322632016-09-01 10:37:43 +020059#include <net/netevent.h>
Jiri Pirko56ade8f2015-10-16 14:01:37 +020060
61#include "spectrum.h"
62#include "core.h"
63#include "reg.h"
64#include "port.h"
65#include "trap.h"
66#include "txheader.h"
67
68static const char mlxsw_sp_driver_name[] = "mlxsw_spectrum";
69static const char mlxsw_sp_driver_version[] = "1.0";
70
71/* tx_hdr_version
72 * Tx header version.
73 * Must be set to 1.
74 */
75MLXSW_ITEM32(tx, hdr, version, 0x00, 28, 4);
76
77/* tx_hdr_ctl
78 * Packet control type.
79 * 0 - Ethernet control (e.g. EMADs, LACP)
80 * 1 - Ethernet data
81 */
82MLXSW_ITEM32(tx, hdr, ctl, 0x00, 26, 2);
83
84/* tx_hdr_proto
85 * Packet protocol type. Must be set to 1 (Ethernet).
86 */
87MLXSW_ITEM32(tx, hdr, proto, 0x00, 21, 3);
88
89/* tx_hdr_rx_is_router
90 * Packet is sent from the router. Valid for data packets only.
91 */
92MLXSW_ITEM32(tx, hdr, rx_is_router, 0x00, 19, 1);
93
94/* tx_hdr_fid_valid
95 * Indicates if the 'fid' field is valid and should be used for
96 * forwarding lookup. Valid for data packets only.
97 */
98MLXSW_ITEM32(tx, hdr, fid_valid, 0x00, 16, 1);
99
100/* tx_hdr_swid
101 * Switch partition ID. Must be set to 0.
102 */
103MLXSW_ITEM32(tx, hdr, swid, 0x00, 12, 3);
104
105/* tx_hdr_control_tclass
106 * Indicates if the packet should use the control TClass and not one
107 * of the data TClasses.
108 */
109MLXSW_ITEM32(tx, hdr, control_tclass, 0x00, 6, 1);
110
111/* tx_hdr_etclass
112 * Egress TClass to be used on the egress device on the egress port.
113 */
114MLXSW_ITEM32(tx, hdr, etclass, 0x00, 0, 4);
115
116/* tx_hdr_port_mid
117 * Destination local port for unicast packets.
118 * Destination multicast ID for multicast packets.
119 *
120 * Control packets are directed to a specific egress port, while data
121 * packets are transmitted through the CPU port (0) into the switch partition,
122 * where forwarding rules are applied.
123 */
124MLXSW_ITEM32(tx, hdr, port_mid, 0x04, 16, 16);
125
126/* tx_hdr_fid
127 * Forwarding ID used for L2 forwarding lookup. Valid only if 'fid_valid' is
128 * set, otherwise calculated based on the packet's VID using VID to FID mapping.
129 * Valid for data packets only.
130 */
131MLXSW_ITEM32(tx, hdr, fid, 0x08, 0, 16);
132
133/* tx_hdr_type
134 * 0 - Data packets
135 * 6 - Control packets
136 */
137MLXSW_ITEM32(tx, hdr, type, 0x0C, 0, 4);
138
Yotam Gigi763b4b72016-07-21 12:03:17 +0200139static bool mlxsw_sp_port_dev_check(const struct net_device *dev);
140
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200141static void mlxsw_sp_txhdr_construct(struct sk_buff *skb,
142 const struct mlxsw_tx_info *tx_info)
143{
144 char *txhdr = skb_push(skb, MLXSW_TXHDR_LEN);
145
146 memset(txhdr, 0, MLXSW_TXHDR_LEN);
147
148 mlxsw_tx_hdr_version_set(txhdr, MLXSW_TXHDR_VERSION_1);
149 mlxsw_tx_hdr_ctl_set(txhdr, MLXSW_TXHDR_ETH_CTL);
150 mlxsw_tx_hdr_proto_set(txhdr, MLXSW_TXHDR_PROTO_ETH);
151 mlxsw_tx_hdr_swid_set(txhdr, 0);
152 mlxsw_tx_hdr_control_tclass_set(txhdr, 1);
153 mlxsw_tx_hdr_port_mid_set(txhdr, tx_info->local_port);
154 mlxsw_tx_hdr_type_set(txhdr, MLXSW_TXHDR_TYPE_CONTROL);
155}
156
157static int mlxsw_sp_base_mac_get(struct mlxsw_sp *mlxsw_sp)
158{
159 char spad_pl[MLXSW_REG_SPAD_LEN];
160 int err;
161
162 err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(spad), spad_pl);
163 if (err)
164 return err;
165 mlxsw_reg_spad_base_mac_memcpy_from(spad_pl, mlxsw_sp->base_mac);
166 return 0;
167}
168
Yotam Gigi763b4b72016-07-21 12:03:17 +0200169static int mlxsw_sp_span_init(struct mlxsw_sp *mlxsw_sp)
170{
171 struct mlxsw_resources *resources;
172 int i;
173
174 resources = mlxsw_core_resources_get(mlxsw_sp->core);
175 if (!resources->max_span_valid)
176 return -EIO;
177
178 mlxsw_sp->span.entries_count = resources->max_span;
179 mlxsw_sp->span.entries = kcalloc(mlxsw_sp->span.entries_count,
180 sizeof(struct mlxsw_sp_span_entry),
181 GFP_KERNEL);
182 if (!mlxsw_sp->span.entries)
183 return -ENOMEM;
184
185 for (i = 0; i < mlxsw_sp->span.entries_count; i++)
186 INIT_LIST_HEAD(&mlxsw_sp->span.entries[i].bound_ports_list);
187
188 return 0;
189}
190
191static void mlxsw_sp_span_fini(struct mlxsw_sp *mlxsw_sp)
192{
193 int i;
194
195 for (i = 0; i < mlxsw_sp->span.entries_count; i++) {
196 struct mlxsw_sp_span_entry *curr = &mlxsw_sp->span.entries[i];
197
198 WARN_ON_ONCE(!list_empty(&curr->bound_ports_list));
199 }
200 kfree(mlxsw_sp->span.entries);
201}
202
203static struct mlxsw_sp_span_entry *
204mlxsw_sp_span_entry_create(struct mlxsw_sp_port *port)
205{
206 struct mlxsw_sp *mlxsw_sp = port->mlxsw_sp;
207 struct mlxsw_sp_span_entry *span_entry;
208 char mpat_pl[MLXSW_REG_MPAT_LEN];
209 u8 local_port = port->local_port;
210 int index;
211 int i;
212 int err;
213
214 /* find a free entry to use */
215 index = -1;
216 for (i = 0; i < mlxsw_sp->span.entries_count; i++) {
217 if (!mlxsw_sp->span.entries[i].used) {
218 index = i;
219 span_entry = &mlxsw_sp->span.entries[i];
220 break;
221 }
222 }
223 if (index < 0)
224 return NULL;
225
226 /* create a new port analayzer entry for local_port */
227 mlxsw_reg_mpat_pack(mpat_pl, index, local_port, true);
228 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(mpat), mpat_pl);
229 if (err)
230 return NULL;
231
232 span_entry->used = true;
233 span_entry->id = index;
234 span_entry->ref_count = 0;
235 span_entry->local_port = local_port;
236 return span_entry;
237}
238
239static void mlxsw_sp_span_entry_destroy(struct mlxsw_sp *mlxsw_sp,
240 struct mlxsw_sp_span_entry *span_entry)
241{
242 u8 local_port = span_entry->local_port;
243 char mpat_pl[MLXSW_REG_MPAT_LEN];
244 int pa_id = span_entry->id;
245
246 mlxsw_reg_mpat_pack(mpat_pl, pa_id, local_port, false);
247 mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(mpat), mpat_pl);
248 span_entry->used = false;
249}
250
Ido Schimmel1a9234e662016-09-19 08:29:26 +0200251static struct mlxsw_sp_span_entry *
252mlxsw_sp_span_entry_find(struct mlxsw_sp_port *port)
Yotam Gigi763b4b72016-07-21 12:03:17 +0200253{
254 struct mlxsw_sp *mlxsw_sp = port->mlxsw_sp;
255 int i;
256
257 for (i = 0; i < mlxsw_sp->span.entries_count; i++) {
258 struct mlxsw_sp_span_entry *curr = &mlxsw_sp->span.entries[i];
259
260 if (curr->used && curr->local_port == port->local_port)
261 return curr;
262 }
263 return NULL;
264}
265
Ido Schimmel1a9234e662016-09-19 08:29:26 +0200266static struct mlxsw_sp_span_entry
267*mlxsw_sp_span_entry_get(struct mlxsw_sp_port *port)
Yotam Gigi763b4b72016-07-21 12:03:17 +0200268{
269 struct mlxsw_sp_span_entry *span_entry;
270
271 span_entry = mlxsw_sp_span_entry_find(port);
272 if (span_entry) {
273 span_entry->ref_count++;
274 return span_entry;
275 }
276
277 return mlxsw_sp_span_entry_create(port);
278}
279
280static int mlxsw_sp_span_entry_put(struct mlxsw_sp *mlxsw_sp,
281 struct mlxsw_sp_span_entry *span_entry)
282{
283 if (--span_entry->ref_count == 0)
284 mlxsw_sp_span_entry_destroy(mlxsw_sp, span_entry);
285 return 0;
286}
287
288static bool mlxsw_sp_span_is_egress_mirror(struct mlxsw_sp_port *port)
289{
290 struct mlxsw_sp *mlxsw_sp = port->mlxsw_sp;
291 struct mlxsw_sp_span_inspected_port *p;
292 int i;
293
294 for (i = 0; i < mlxsw_sp->span.entries_count; i++) {
295 struct mlxsw_sp_span_entry *curr = &mlxsw_sp->span.entries[i];
296
297 list_for_each_entry(p, &curr->bound_ports_list, list)
298 if (p->local_port == port->local_port &&
299 p->type == MLXSW_SP_SPAN_EGRESS)
300 return true;
301 }
302
303 return false;
304}
305
306static int mlxsw_sp_span_mtu_to_buffsize(int mtu)
307{
308 return MLXSW_SP_BYTES_TO_CELLS(mtu * 5 / 2) + 1;
309}
310
311static int mlxsw_sp_span_port_mtu_update(struct mlxsw_sp_port *port, u16 mtu)
312{
313 struct mlxsw_sp *mlxsw_sp = port->mlxsw_sp;
314 char sbib_pl[MLXSW_REG_SBIB_LEN];
315 int err;
316
317 /* If port is egress mirrored, the shared buffer size should be
318 * updated according to the mtu value
319 */
320 if (mlxsw_sp_span_is_egress_mirror(port)) {
321 mlxsw_reg_sbib_pack(sbib_pl, port->local_port,
322 mlxsw_sp_span_mtu_to_buffsize(mtu));
323 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sbib), sbib_pl);
324 if (err) {
325 netdev_err(port->dev, "Could not update shared buffer for mirroring\n");
326 return err;
327 }
328 }
329
330 return 0;
331}
332
333static struct mlxsw_sp_span_inspected_port *
334mlxsw_sp_span_entry_bound_port_find(struct mlxsw_sp_port *port,
335 struct mlxsw_sp_span_entry *span_entry)
336{
337 struct mlxsw_sp_span_inspected_port *p;
338
339 list_for_each_entry(p, &span_entry->bound_ports_list, list)
340 if (port->local_port == p->local_port)
341 return p;
342 return NULL;
343}
344
345static int
346mlxsw_sp_span_inspected_port_bind(struct mlxsw_sp_port *port,
347 struct mlxsw_sp_span_entry *span_entry,
348 enum mlxsw_sp_span_type type)
349{
350 struct mlxsw_sp_span_inspected_port *inspected_port;
351 struct mlxsw_sp *mlxsw_sp = port->mlxsw_sp;
352 char mpar_pl[MLXSW_REG_MPAR_LEN];
353 char sbib_pl[MLXSW_REG_SBIB_LEN];
354 int pa_id = span_entry->id;
355 int err;
356
357 /* if it is an egress SPAN, bind a shared buffer to it */
358 if (type == MLXSW_SP_SPAN_EGRESS) {
359 mlxsw_reg_sbib_pack(sbib_pl, port->local_port,
360 mlxsw_sp_span_mtu_to_buffsize(port->dev->mtu));
361 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sbib), sbib_pl);
362 if (err) {
363 netdev_err(port->dev, "Could not create shared buffer for mirroring\n");
364 return err;
365 }
366 }
367
368 /* bind the port to the SPAN entry */
Ido Schimmel1a9234e662016-09-19 08:29:26 +0200369 mlxsw_reg_mpar_pack(mpar_pl, port->local_port,
370 (enum mlxsw_reg_mpar_i_e) type, true, pa_id);
Yotam Gigi763b4b72016-07-21 12:03:17 +0200371 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(mpar), mpar_pl);
372 if (err)
373 goto err_mpar_reg_write;
374
375 inspected_port = kzalloc(sizeof(*inspected_port), GFP_KERNEL);
376 if (!inspected_port) {
377 err = -ENOMEM;
378 goto err_inspected_port_alloc;
379 }
380 inspected_port->local_port = port->local_port;
381 inspected_port->type = type;
382 list_add_tail(&inspected_port->list, &span_entry->bound_ports_list);
383
384 return 0;
385
386err_mpar_reg_write:
387err_inspected_port_alloc:
388 if (type == MLXSW_SP_SPAN_EGRESS) {
389 mlxsw_reg_sbib_pack(sbib_pl, port->local_port, 0);
390 mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sbib), sbib_pl);
391 }
392 return err;
393}
394
395static void
396mlxsw_sp_span_inspected_port_unbind(struct mlxsw_sp_port *port,
397 struct mlxsw_sp_span_entry *span_entry,
398 enum mlxsw_sp_span_type type)
399{
400 struct mlxsw_sp_span_inspected_port *inspected_port;
401 struct mlxsw_sp *mlxsw_sp = port->mlxsw_sp;
402 char mpar_pl[MLXSW_REG_MPAR_LEN];
403 char sbib_pl[MLXSW_REG_SBIB_LEN];
404 int pa_id = span_entry->id;
405
406 inspected_port = mlxsw_sp_span_entry_bound_port_find(port, span_entry);
407 if (!inspected_port)
408 return;
409
410 /* remove the inspected port */
Ido Schimmel1a9234e662016-09-19 08:29:26 +0200411 mlxsw_reg_mpar_pack(mpar_pl, port->local_port,
412 (enum mlxsw_reg_mpar_i_e) type, false, pa_id);
Yotam Gigi763b4b72016-07-21 12:03:17 +0200413 mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(mpar), mpar_pl);
414
415 /* remove the SBIB buffer if it was egress SPAN */
416 if (type == MLXSW_SP_SPAN_EGRESS) {
417 mlxsw_reg_sbib_pack(sbib_pl, port->local_port, 0);
418 mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sbib), sbib_pl);
419 }
420
421 mlxsw_sp_span_entry_put(mlxsw_sp, span_entry);
422
423 list_del(&inspected_port->list);
424 kfree(inspected_port);
425}
426
427static int mlxsw_sp_span_mirror_add(struct mlxsw_sp_port *from,
428 struct mlxsw_sp_port *to,
429 enum mlxsw_sp_span_type type)
430{
431 struct mlxsw_sp *mlxsw_sp = from->mlxsw_sp;
432 struct mlxsw_sp_span_entry *span_entry;
433 int err;
434
435 span_entry = mlxsw_sp_span_entry_get(to);
436 if (!span_entry)
437 return -ENOENT;
438
439 netdev_dbg(from->dev, "Adding inspected port to SPAN entry %d\n",
440 span_entry->id);
441
442 err = mlxsw_sp_span_inspected_port_bind(from, span_entry, type);
443 if (err)
444 goto err_port_bind;
445
446 return 0;
447
448err_port_bind:
449 mlxsw_sp_span_entry_put(mlxsw_sp, span_entry);
450 return err;
451}
452
453static void mlxsw_sp_span_mirror_remove(struct mlxsw_sp_port *from,
454 struct mlxsw_sp_port *to,
455 enum mlxsw_sp_span_type type)
456{
457 struct mlxsw_sp_span_entry *span_entry;
458
459 span_entry = mlxsw_sp_span_entry_find(to);
460 if (!span_entry) {
461 netdev_err(from->dev, "no span entry found\n");
462 return;
463 }
464
465 netdev_dbg(from->dev, "removing inspected port from SPAN entry %d\n",
466 span_entry->id);
467 mlxsw_sp_span_inspected_port_unbind(from, span_entry, type);
468}
469
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200470static int mlxsw_sp_port_admin_status_set(struct mlxsw_sp_port *mlxsw_sp_port,
471 bool is_up)
472{
473 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
474 char paos_pl[MLXSW_REG_PAOS_LEN];
475
476 mlxsw_reg_paos_pack(paos_pl, mlxsw_sp_port->local_port,
477 is_up ? MLXSW_PORT_ADMIN_STATUS_UP :
478 MLXSW_PORT_ADMIN_STATUS_DOWN);
479 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(paos), paos_pl);
480}
481
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200482static int mlxsw_sp_port_dev_addr_set(struct mlxsw_sp_port *mlxsw_sp_port,
483 unsigned char *addr)
484{
485 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
486 char ppad_pl[MLXSW_REG_PPAD_LEN];
487
488 mlxsw_reg_ppad_pack(ppad_pl, true, mlxsw_sp_port->local_port);
489 mlxsw_reg_ppad_mac_memcpy_to(ppad_pl, addr);
490 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ppad), ppad_pl);
491}
492
493static int mlxsw_sp_port_dev_addr_init(struct mlxsw_sp_port *mlxsw_sp_port)
494{
495 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
496 unsigned char *addr = mlxsw_sp_port->dev->dev_addr;
497
498 ether_addr_copy(addr, mlxsw_sp->base_mac);
499 addr[ETH_ALEN - 1] += mlxsw_sp_port->local_port;
500 return mlxsw_sp_port_dev_addr_set(mlxsw_sp_port, addr);
501}
502
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200503static int mlxsw_sp_port_mtu_set(struct mlxsw_sp_port *mlxsw_sp_port, u16 mtu)
504{
505 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
506 char pmtu_pl[MLXSW_REG_PMTU_LEN];
507 int max_mtu;
508 int err;
509
510 mtu += MLXSW_TXHDR_LEN + ETH_HLEN;
511 mlxsw_reg_pmtu_pack(pmtu_pl, mlxsw_sp_port->local_port, 0);
512 err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(pmtu), pmtu_pl);
513 if (err)
514 return err;
515 max_mtu = mlxsw_reg_pmtu_max_mtu_get(pmtu_pl);
516
517 if (mtu > max_mtu)
518 return -EINVAL;
519
520 mlxsw_reg_pmtu_pack(pmtu_pl, mlxsw_sp_port->local_port, mtu);
521 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(pmtu), pmtu_pl);
522}
523
Ido Schimmelbe945352016-06-09 09:51:39 +0200524static int __mlxsw_sp_port_swid_set(struct mlxsw_sp *mlxsw_sp, u8 local_port,
525 u8 swid)
526{
527 char pspa_pl[MLXSW_REG_PSPA_LEN];
528
529 mlxsw_reg_pspa_pack(pspa_pl, swid, local_port);
530 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(pspa), pspa_pl);
531}
532
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200533static int mlxsw_sp_port_swid_set(struct mlxsw_sp_port *mlxsw_sp_port, u8 swid)
534{
535 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200536
Ido Schimmelbe945352016-06-09 09:51:39 +0200537 return __mlxsw_sp_port_swid_set(mlxsw_sp, mlxsw_sp_port->local_port,
538 swid);
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200539}
540
541static int mlxsw_sp_port_vp_mode_set(struct mlxsw_sp_port *mlxsw_sp_port,
542 bool enable)
543{
544 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
545 char svpe_pl[MLXSW_REG_SVPE_LEN];
546
547 mlxsw_reg_svpe_pack(svpe_pl, mlxsw_sp_port->local_port, enable);
548 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(svpe), svpe_pl);
549}
550
551int mlxsw_sp_port_vid_to_fid_set(struct mlxsw_sp_port *mlxsw_sp_port,
552 enum mlxsw_reg_svfa_mt mt, bool valid, u16 fid,
553 u16 vid)
554{
555 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
556 char svfa_pl[MLXSW_REG_SVFA_LEN];
557
558 mlxsw_reg_svfa_pack(svfa_pl, mlxsw_sp_port->local_port, mt, valid,
559 fid, vid);
560 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(svfa), svfa_pl);
561}
562
Ido Schimmel584d73d2016-08-24 12:00:26 +0200563int __mlxsw_sp_port_vid_learning_set(struct mlxsw_sp_port *mlxsw_sp_port,
564 u16 vid_begin, u16 vid_end,
565 bool learn_enable)
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200566{
567 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
568 char *spvmlr_pl;
569 int err;
570
571 spvmlr_pl = kmalloc(MLXSW_REG_SPVMLR_LEN, GFP_KERNEL);
572 if (!spvmlr_pl)
573 return -ENOMEM;
Ido Schimmel584d73d2016-08-24 12:00:26 +0200574 mlxsw_reg_spvmlr_pack(spvmlr_pl, mlxsw_sp_port->local_port, vid_begin,
575 vid_end, learn_enable);
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200576 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(spvmlr), spvmlr_pl);
577 kfree(spvmlr_pl);
578 return err;
579}
580
Ido Schimmel584d73d2016-08-24 12:00:26 +0200581static int mlxsw_sp_port_vid_learning_set(struct mlxsw_sp_port *mlxsw_sp_port,
582 u16 vid, bool learn_enable)
583{
584 return __mlxsw_sp_port_vid_learning_set(mlxsw_sp_port, vid, vid,
585 learn_enable);
586}
587
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200588static int
589mlxsw_sp_port_system_port_mapping_set(struct mlxsw_sp_port *mlxsw_sp_port)
590{
591 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
592 char sspr_pl[MLXSW_REG_SSPR_LEN];
593
594 mlxsw_reg_sspr_pack(sspr_pl, mlxsw_sp_port->local_port);
595 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sspr), sspr_pl);
596}
597
Ido Schimmeld664b412016-06-09 09:51:40 +0200598static int mlxsw_sp_port_module_info_get(struct mlxsw_sp *mlxsw_sp,
599 u8 local_port, u8 *p_module,
600 u8 *p_width, u8 *p_lane)
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200601{
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200602 char pmlp_pl[MLXSW_REG_PMLP_LEN];
603 int err;
604
Ido Schimmel558c2d52016-02-26 17:32:29 +0100605 mlxsw_reg_pmlp_pack(pmlp_pl, local_port);
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200606 err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(pmlp), pmlp_pl);
607 if (err)
608 return err;
Ido Schimmel558c2d52016-02-26 17:32:29 +0100609 *p_module = mlxsw_reg_pmlp_module_get(pmlp_pl, 0);
610 *p_width = mlxsw_reg_pmlp_width_get(pmlp_pl);
Ido Schimmel2bf9a582016-04-05 10:20:04 +0200611 *p_lane = mlxsw_reg_pmlp_tx_lane_get(pmlp_pl, 0);
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200612 return 0;
613}
614
Ido Schimmel18f1e702016-02-26 17:32:31 +0100615static int mlxsw_sp_port_module_map(struct mlxsw_sp *mlxsw_sp, u8 local_port,
616 u8 module, u8 width, u8 lane)
617{
618 char pmlp_pl[MLXSW_REG_PMLP_LEN];
619 int i;
620
621 mlxsw_reg_pmlp_pack(pmlp_pl, local_port);
622 mlxsw_reg_pmlp_width_set(pmlp_pl, width);
623 for (i = 0; i < width; i++) {
624 mlxsw_reg_pmlp_module_set(pmlp_pl, i, module);
625 mlxsw_reg_pmlp_tx_lane_set(pmlp_pl, i, lane + i); /* Rx & Tx */
626 }
627
628 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(pmlp), pmlp_pl);
629}
630
Ido Schimmel3e9b27b2016-02-26 17:32:28 +0100631static int mlxsw_sp_port_module_unmap(struct mlxsw_sp *mlxsw_sp, u8 local_port)
632{
633 char pmlp_pl[MLXSW_REG_PMLP_LEN];
634
635 mlxsw_reg_pmlp_pack(pmlp_pl, local_port);
636 mlxsw_reg_pmlp_width_set(pmlp_pl, 0);
637 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(pmlp), pmlp_pl);
638}
639
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200640static int mlxsw_sp_port_open(struct net_device *dev)
641{
642 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
643 int err;
644
645 err = mlxsw_sp_port_admin_status_set(mlxsw_sp_port, true);
646 if (err)
647 return err;
648 netif_start_queue(dev);
649 return 0;
650}
651
652static int mlxsw_sp_port_stop(struct net_device *dev)
653{
654 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
655
656 netif_stop_queue(dev);
657 return mlxsw_sp_port_admin_status_set(mlxsw_sp_port, false);
658}
659
660static netdev_tx_t mlxsw_sp_port_xmit(struct sk_buff *skb,
661 struct net_device *dev)
662{
663 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
664 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
665 struct mlxsw_sp_port_pcpu_stats *pcpu_stats;
666 const struct mlxsw_tx_info tx_info = {
667 .local_port = mlxsw_sp_port->local_port,
668 .is_emad = false,
669 };
670 u64 len;
671 int err;
672
Jiri Pirko307c2432016-04-08 19:11:22 +0200673 if (mlxsw_core_skb_transmit_busy(mlxsw_sp->core, &tx_info))
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200674 return NETDEV_TX_BUSY;
675
676 if (unlikely(skb_headroom(skb) < MLXSW_TXHDR_LEN)) {
677 struct sk_buff *skb_orig = skb;
678
679 skb = skb_realloc_headroom(skb, MLXSW_TXHDR_LEN);
680 if (!skb) {
681 this_cpu_inc(mlxsw_sp_port->pcpu_stats->tx_dropped);
682 dev_kfree_skb_any(skb_orig);
683 return NETDEV_TX_OK;
684 }
685 }
686
687 if (eth_skb_pad(skb)) {
688 this_cpu_inc(mlxsw_sp_port->pcpu_stats->tx_dropped);
689 return NETDEV_TX_OK;
690 }
691
692 mlxsw_sp_txhdr_construct(skb, &tx_info);
Nogah Frankel63dcdd32016-06-17 15:09:05 +0200693 /* TX header is consumed by HW on the way so we shouldn't count its
694 * bytes as being sent.
695 */
696 len = skb->len - MLXSW_TXHDR_LEN;
697
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200698 /* Due to a race we might fail here because of a full queue. In that
699 * unlikely case we simply drop the packet.
700 */
Jiri Pirko307c2432016-04-08 19:11:22 +0200701 err = mlxsw_core_skb_transmit(mlxsw_sp->core, skb, &tx_info);
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200702
703 if (!err) {
704 pcpu_stats = this_cpu_ptr(mlxsw_sp_port->pcpu_stats);
705 u64_stats_update_begin(&pcpu_stats->syncp);
706 pcpu_stats->tx_packets++;
707 pcpu_stats->tx_bytes += len;
708 u64_stats_update_end(&pcpu_stats->syncp);
709 } else {
710 this_cpu_inc(mlxsw_sp_port->pcpu_stats->tx_dropped);
711 dev_kfree_skb_any(skb);
712 }
713 return NETDEV_TX_OK;
714}
715
Jiri Pirkoc5b9b512015-12-03 12:12:22 +0100716static void mlxsw_sp_set_rx_mode(struct net_device *dev)
717{
718}
719
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200720static int mlxsw_sp_port_set_mac_address(struct net_device *dev, void *p)
721{
722 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
723 struct sockaddr *addr = p;
724 int err;
725
726 if (!is_valid_ether_addr(addr->sa_data))
727 return -EADDRNOTAVAIL;
728
729 err = mlxsw_sp_port_dev_addr_set(mlxsw_sp_port, addr->sa_data);
730 if (err)
731 return err;
732 memcpy(dev->dev_addr, addr->sa_data, dev->addr_len);
733 return 0;
734}
735
Ido Schimmel9f7ec052016-04-06 17:10:14 +0200736static void mlxsw_sp_pg_buf_pack(char *pbmc_pl, int pg_index, int mtu,
Ido Schimmeld81a6bd2016-04-06 17:10:16 +0200737 bool pause_en, bool pfc_en, u16 delay)
Ido Schimmel8e8dfe92016-04-06 17:10:10 +0200738{
739 u16 pg_size = 2 * MLXSW_SP_BYTES_TO_CELLS(mtu);
740
Ido Schimmeld81a6bd2016-04-06 17:10:16 +0200741 delay = pfc_en ? mlxsw_sp_pfc_delay_get(mtu, delay) :
742 MLXSW_SP_PAUSE_DELAY;
Ido Schimmel9f7ec052016-04-06 17:10:14 +0200743
Ido Schimmeld81a6bd2016-04-06 17:10:16 +0200744 if (pause_en || pfc_en)
Ido Schimmel9f7ec052016-04-06 17:10:14 +0200745 mlxsw_reg_pbmc_lossless_buffer_pack(pbmc_pl, pg_index,
Ido Schimmeld81a6bd2016-04-06 17:10:16 +0200746 pg_size + delay, pg_size);
747 else
Ido Schimmel9f7ec052016-04-06 17:10:14 +0200748 mlxsw_reg_pbmc_lossy_buffer_pack(pbmc_pl, pg_index, pg_size);
Ido Schimmel8e8dfe92016-04-06 17:10:10 +0200749}
750
751int __mlxsw_sp_port_headroom_set(struct mlxsw_sp_port *mlxsw_sp_port, int mtu,
Ido Schimmeld81a6bd2016-04-06 17:10:16 +0200752 u8 *prio_tc, bool pause_en,
753 struct ieee_pfc *my_pfc)
Ido Schimmelff6551e2016-04-06 17:10:03 +0200754{
755 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
Ido Schimmeld81a6bd2016-04-06 17:10:16 +0200756 u8 pfc_en = !!my_pfc ? my_pfc->pfc_en : 0;
757 u16 delay = !!my_pfc ? my_pfc->delay : 0;
Ido Schimmelff6551e2016-04-06 17:10:03 +0200758 char pbmc_pl[MLXSW_REG_PBMC_LEN];
Ido Schimmel8e8dfe92016-04-06 17:10:10 +0200759 int i, j, err;
Ido Schimmelff6551e2016-04-06 17:10:03 +0200760
761 mlxsw_reg_pbmc_pack(pbmc_pl, mlxsw_sp_port->local_port, 0, 0);
762 err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(pbmc), pbmc_pl);
763 if (err)
764 return err;
Ido Schimmel8e8dfe92016-04-06 17:10:10 +0200765
766 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
767 bool configure = false;
Ido Schimmeld81a6bd2016-04-06 17:10:16 +0200768 bool pfc = false;
Ido Schimmel8e8dfe92016-04-06 17:10:10 +0200769
770 for (j = 0; j < IEEE_8021QAZ_MAX_TCS; j++) {
771 if (prio_tc[j] == i) {
Ido Schimmeld81a6bd2016-04-06 17:10:16 +0200772 pfc = pfc_en & BIT(j);
Ido Schimmel8e8dfe92016-04-06 17:10:10 +0200773 configure = true;
774 break;
775 }
776 }
777
778 if (!configure)
779 continue;
Ido Schimmeld81a6bd2016-04-06 17:10:16 +0200780 mlxsw_sp_pg_buf_pack(pbmc_pl, i, mtu, pause_en, pfc, delay);
Ido Schimmel8e8dfe92016-04-06 17:10:10 +0200781 }
782
Ido Schimmelff6551e2016-04-06 17:10:03 +0200783 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(pbmc), pbmc_pl);
784}
785
Ido Schimmel8e8dfe92016-04-06 17:10:10 +0200786static int mlxsw_sp_port_headroom_set(struct mlxsw_sp_port *mlxsw_sp_port,
Ido Schimmel9f7ec052016-04-06 17:10:14 +0200787 int mtu, bool pause_en)
Ido Schimmel8e8dfe92016-04-06 17:10:10 +0200788{
789 u8 def_prio_tc[IEEE_8021QAZ_MAX_TCS] = {0};
790 bool dcb_en = !!mlxsw_sp_port->dcb.ets;
Ido Schimmeld81a6bd2016-04-06 17:10:16 +0200791 struct ieee_pfc *my_pfc;
Ido Schimmel8e8dfe92016-04-06 17:10:10 +0200792 u8 *prio_tc;
793
794 prio_tc = dcb_en ? mlxsw_sp_port->dcb.ets->prio_tc : def_prio_tc;
Ido Schimmeld81a6bd2016-04-06 17:10:16 +0200795 my_pfc = dcb_en ? mlxsw_sp_port->dcb.pfc : NULL;
Ido Schimmel8e8dfe92016-04-06 17:10:10 +0200796
Ido Schimmel9f7ec052016-04-06 17:10:14 +0200797 return __mlxsw_sp_port_headroom_set(mlxsw_sp_port, mtu, prio_tc,
Ido Schimmeld81a6bd2016-04-06 17:10:16 +0200798 pause_en, my_pfc);
Ido Schimmel8e8dfe92016-04-06 17:10:10 +0200799}
800
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200801static int mlxsw_sp_port_change_mtu(struct net_device *dev, int mtu)
802{
803 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
Ido Schimmel9f7ec052016-04-06 17:10:14 +0200804 bool pause_en = mlxsw_sp_port_is_pause_en(mlxsw_sp_port);
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200805 int err;
806
Ido Schimmel9f7ec052016-04-06 17:10:14 +0200807 err = mlxsw_sp_port_headroom_set(mlxsw_sp_port, mtu, pause_en);
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200808 if (err)
809 return err;
Yotam Gigi763b4b72016-07-21 12:03:17 +0200810 err = mlxsw_sp_span_port_mtu_update(mlxsw_sp_port, mtu);
811 if (err)
812 goto err_span_port_mtu_update;
Ido Schimmelff6551e2016-04-06 17:10:03 +0200813 err = mlxsw_sp_port_mtu_set(mlxsw_sp_port, mtu);
814 if (err)
815 goto err_port_mtu_set;
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200816 dev->mtu = mtu;
817 return 0;
Ido Schimmelff6551e2016-04-06 17:10:03 +0200818
819err_port_mtu_set:
Yotam Gigi763b4b72016-07-21 12:03:17 +0200820 mlxsw_sp_span_port_mtu_update(mlxsw_sp_port, dev->mtu);
821err_span_port_mtu_update:
Ido Schimmel9f7ec052016-04-06 17:10:14 +0200822 mlxsw_sp_port_headroom_set(mlxsw_sp_port, dev->mtu, pause_en);
Ido Schimmelff6551e2016-04-06 17:10:03 +0200823 return err;
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200824}
825
Nogah Frankelfc1bbb02016-09-16 15:05:38 +0200826int
827mlxsw_sp_port_get_sw_stats64(const struct net_device *dev,
828 struct rtnl_link_stats64 *stats)
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200829{
830 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
831 struct mlxsw_sp_port_pcpu_stats *p;
832 u64 rx_packets, rx_bytes, tx_packets, tx_bytes;
833 u32 tx_dropped = 0;
834 unsigned int start;
835 int i;
836
837 for_each_possible_cpu(i) {
838 p = per_cpu_ptr(mlxsw_sp_port->pcpu_stats, i);
839 do {
840 start = u64_stats_fetch_begin_irq(&p->syncp);
841 rx_packets = p->rx_packets;
842 rx_bytes = p->rx_bytes;
843 tx_packets = p->tx_packets;
844 tx_bytes = p->tx_bytes;
845 } while (u64_stats_fetch_retry_irq(&p->syncp, start));
846
847 stats->rx_packets += rx_packets;
848 stats->rx_bytes += rx_bytes;
849 stats->tx_packets += tx_packets;
850 stats->tx_bytes += tx_bytes;
851 /* tx_dropped is u32, updated without syncp protection. */
852 tx_dropped += p->tx_dropped;
853 }
854 stats->tx_dropped = tx_dropped;
Nogah Frankelfc1bbb02016-09-16 15:05:38 +0200855 return 0;
856}
857
858bool mlxsw_sp_port_has_offload_stats(int attr_id)
859{
860 switch (attr_id) {
861 case IFLA_OFFLOAD_XSTATS_CPU_HIT:
862 return true;
863 }
864
865 return false;
866}
867
868int mlxsw_sp_port_get_offload_stats(int attr_id, const struct net_device *dev,
869 void *sp)
870{
871 switch (attr_id) {
872 case IFLA_OFFLOAD_XSTATS_CPU_HIT:
873 return mlxsw_sp_port_get_sw_stats64(dev, sp);
874 }
875
876 return -EINVAL;
877}
878
879static int mlxsw_sp_port_get_stats_raw(struct net_device *dev, int grp,
880 int prio, char *ppcnt_pl)
881{
882 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
883 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
884
885 mlxsw_reg_ppcnt_pack(ppcnt_pl, mlxsw_sp_port->local_port, grp, prio);
886 return mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(ppcnt), ppcnt_pl);
887}
888
889static int mlxsw_sp_port_get_hw_stats(struct net_device *dev,
890 struct rtnl_link_stats64 *stats)
891{
892 char ppcnt_pl[MLXSW_REG_PPCNT_LEN];
893 int err;
894
895 err = mlxsw_sp_port_get_stats_raw(dev, MLXSW_REG_PPCNT_IEEE_8023_CNT,
896 0, ppcnt_pl);
897 if (err)
898 goto out;
899
900 stats->tx_packets =
901 mlxsw_reg_ppcnt_a_frames_transmitted_ok_get(ppcnt_pl);
902 stats->rx_packets =
903 mlxsw_reg_ppcnt_a_frames_received_ok_get(ppcnt_pl);
904 stats->tx_bytes =
905 mlxsw_reg_ppcnt_a_octets_transmitted_ok_get(ppcnt_pl);
906 stats->rx_bytes =
907 mlxsw_reg_ppcnt_a_octets_received_ok_get(ppcnt_pl);
908 stats->multicast =
909 mlxsw_reg_ppcnt_a_multicast_frames_received_ok_get(ppcnt_pl);
910
911 stats->rx_crc_errors =
912 mlxsw_reg_ppcnt_a_frame_check_sequence_errors_get(ppcnt_pl);
913 stats->rx_frame_errors =
914 mlxsw_reg_ppcnt_a_alignment_errors_get(ppcnt_pl);
915
916 stats->rx_length_errors = (
917 mlxsw_reg_ppcnt_a_in_range_length_errors_get(ppcnt_pl) +
918 mlxsw_reg_ppcnt_a_out_of_range_length_field_get(ppcnt_pl) +
919 mlxsw_reg_ppcnt_a_frame_too_long_errors_get(ppcnt_pl));
920
921 stats->rx_errors = (stats->rx_crc_errors +
922 stats->rx_frame_errors + stats->rx_length_errors);
923
924out:
925 return err;
926}
927
928static void update_stats_cache(struct work_struct *work)
929{
930 struct mlxsw_sp_port *mlxsw_sp_port =
931 container_of(work, struct mlxsw_sp_port,
932 hw_stats.update_dw.work);
933
934 if (!netif_carrier_ok(mlxsw_sp_port->dev))
935 goto out;
936
937 mlxsw_sp_port_get_hw_stats(mlxsw_sp_port->dev,
938 mlxsw_sp_port->hw_stats.cache);
939
940out:
941 mlxsw_core_schedule_dw(&mlxsw_sp_port->hw_stats.update_dw,
942 MLXSW_HW_STATS_UPDATE_TIME);
943}
944
945/* Return the stats from a cache that is updated periodically,
946 * as this function might get called in an atomic context.
947 */
948static struct rtnl_link_stats64 *
949mlxsw_sp_port_get_stats64(struct net_device *dev,
950 struct rtnl_link_stats64 *stats)
951{
952 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
953
954 memcpy(stats, mlxsw_sp_port->hw_stats.cache, sizeof(*stats));
955
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200956 return stats;
957}
958
959int mlxsw_sp_port_vlan_set(struct mlxsw_sp_port *mlxsw_sp_port, u16 vid_begin,
960 u16 vid_end, bool is_member, bool untagged)
961{
962 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
963 char *spvm_pl;
964 int err;
965
966 spvm_pl = kmalloc(MLXSW_REG_SPVM_LEN, GFP_KERNEL);
967 if (!spvm_pl)
968 return -ENOMEM;
969
970 mlxsw_reg_spvm_pack(spvm_pl, mlxsw_sp_port->local_port, vid_begin,
971 vid_end, is_member, untagged);
972 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(spvm), spvm_pl);
973 kfree(spvm_pl);
974 return err;
975}
976
977static int mlxsw_sp_port_vp_mode_trans(struct mlxsw_sp_port *mlxsw_sp_port)
978{
979 enum mlxsw_reg_svfa_mt mt = MLXSW_REG_SVFA_MT_PORT_VID_TO_FID;
980 u16 vid, last_visited_vid;
981 int err;
982
983 for_each_set_bit(vid, mlxsw_sp_port->active_vlans, VLAN_N_VID) {
984 err = mlxsw_sp_port_vid_to_fid_set(mlxsw_sp_port, mt, true, vid,
985 vid);
986 if (err) {
987 last_visited_vid = vid;
988 goto err_port_vid_to_fid_set;
989 }
990 }
991
992 err = mlxsw_sp_port_vp_mode_set(mlxsw_sp_port, true);
993 if (err) {
994 last_visited_vid = VLAN_N_VID;
995 goto err_port_vid_to_fid_set;
996 }
997
998 return 0;
999
1000err_port_vid_to_fid_set:
1001 for_each_set_bit(vid, mlxsw_sp_port->active_vlans, last_visited_vid)
1002 mlxsw_sp_port_vid_to_fid_set(mlxsw_sp_port, mt, false, vid,
1003 vid);
1004 return err;
1005}
1006
1007static int mlxsw_sp_port_vlan_mode_trans(struct mlxsw_sp_port *mlxsw_sp_port)
1008{
1009 enum mlxsw_reg_svfa_mt mt = MLXSW_REG_SVFA_MT_PORT_VID_TO_FID;
1010 u16 vid;
1011 int err;
1012
1013 err = mlxsw_sp_port_vp_mode_set(mlxsw_sp_port, false);
1014 if (err)
1015 return err;
1016
1017 for_each_set_bit(vid, mlxsw_sp_port->active_vlans, VLAN_N_VID) {
1018 err = mlxsw_sp_port_vid_to_fid_set(mlxsw_sp_port, mt, false,
1019 vid, vid);
1020 if (err)
1021 return err;
1022 }
1023
1024 return 0;
1025}
1026
Ido Schimmel7f71eb42015-12-15 16:03:37 +01001027static struct mlxsw_sp_port *
Ido Schimmel0355b592016-06-20 23:04:13 +02001028mlxsw_sp_port_vport_create(struct mlxsw_sp_port *mlxsw_sp_port, u16 vid)
Ido Schimmel7f71eb42015-12-15 16:03:37 +01001029{
1030 struct mlxsw_sp_port *mlxsw_sp_vport;
1031
1032 mlxsw_sp_vport = kzalloc(sizeof(*mlxsw_sp_vport), GFP_KERNEL);
1033 if (!mlxsw_sp_vport)
1034 return NULL;
1035
1036 /* dev will be set correctly after the VLAN device is linked
1037 * with the real device. In case of bridge SELF invocation, dev
1038 * will remain as is.
1039 */
1040 mlxsw_sp_vport->dev = mlxsw_sp_port->dev;
1041 mlxsw_sp_vport->mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
1042 mlxsw_sp_vport->local_port = mlxsw_sp_port->local_port;
1043 mlxsw_sp_vport->stp_state = BR_STATE_FORWARDING;
Ido Schimmel272c4472015-12-15 16:03:47 +01001044 mlxsw_sp_vport->lagged = mlxsw_sp_port->lagged;
1045 mlxsw_sp_vport->lag_id = mlxsw_sp_port->lag_id;
Ido Schimmel0355b592016-06-20 23:04:13 +02001046 mlxsw_sp_vport->vport.vid = vid;
Ido Schimmel7f71eb42015-12-15 16:03:37 +01001047
1048 list_add(&mlxsw_sp_vport->vport.list, &mlxsw_sp_port->vports_list);
1049
1050 return mlxsw_sp_vport;
1051}
1052
1053static void mlxsw_sp_port_vport_destroy(struct mlxsw_sp_port *mlxsw_sp_vport)
1054{
1055 list_del(&mlxsw_sp_vport->vport.list);
1056 kfree(mlxsw_sp_vport);
1057}
1058
Ido Schimmel05978482016-08-17 16:39:30 +02001059static int mlxsw_sp_port_add_vid(struct net_device *dev,
1060 __be16 __always_unused proto, u16 vid)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001061{
1062 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
Ido Schimmel7f71eb42015-12-15 16:03:37 +01001063 struct mlxsw_sp_port *mlxsw_sp_vport;
Ido Schimmel52697a92016-07-02 11:00:09 +02001064 bool untagged = vid == 1;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001065 int err;
1066
1067 /* VLAN 0 is added to HW filter when device goes up, but it is
1068 * reserved in our case, so simply return.
1069 */
1070 if (!vid)
1071 return 0;
1072
Ido Schimmelfa66d7e2016-08-17 16:39:29 +02001073 if (mlxsw_sp_port_vport_find(mlxsw_sp_port, vid))
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001074 return 0;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001075
Ido Schimmel0355b592016-06-20 23:04:13 +02001076 mlxsw_sp_vport = mlxsw_sp_port_vport_create(mlxsw_sp_port, vid);
Ido Schimmelfa66d7e2016-08-17 16:39:29 +02001077 if (!mlxsw_sp_vport)
Ido Schimmel0355b592016-06-20 23:04:13 +02001078 return -ENOMEM;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001079
1080 /* When adding the first VLAN interface on a bridged port we need to
1081 * transition all the active 802.1Q bridge VLANs to use explicit
1082 * {Port, VID} to FID mappings and set the port's mode to Virtual mode.
1083 */
Ido Schimmel7f71eb42015-12-15 16:03:37 +01001084 if (list_is_singular(&mlxsw_sp_port->vports_list)) {
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001085 err = mlxsw_sp_port_vp_mode_trans(mlxsw_sp_port);
Ido Schimmelfa66d7e2016-08-17 16:39:29 +02001086 if (err)
Ido Schimmel7f71eb42015-12-15 16:03:37 +01001087 goto err_port_vp_mode_trans;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001088 }
1089
Ido Schimmel52697a92016-07-02 11:00:09 +02001090 err = mlxsw_sp_port_vlan_set(mlxsw_sp_vport, vid, vid, true, untagged);
Ido Schimmelfa66d7e2016-08-17 16:39:29 +02001091 if (err)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001092 goto err_port_add_vid;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001093
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001094 return 0;
1095
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001096err_port_add_vid:
Ido Schimmel7f71eb42015-12-15 16:03:37 +01001097 if (list_is_singular(&mlxsw_sp_port->vports_list))
1098 mlxsw_sp_port_vlan_mode_trans(mlxsw_sp_port);
1099err_port_vp_mode_trans:
Ido Schimmel7f71eb42015-12-15 16:03:37 +01001100 mlxsw_sp_port_vport_destroy(mlxsw_sp_vport);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001101 return err;
1102}
1103
Ido Schimmel32d863f2016-07-02 11:00:10 +02001104static int mlxsw_sp_port_kill_vid(struct net_device *dev,
1105 __be16 __always_unused proto, u16 vid)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001106{
1107 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
Ido Schimmel7f71eb42015-12-15 16:03:37 +01001108 struct mlxsw_sp_port *mlxsw_sp_vport;
Ido Schimmel1c800752016-06-20 23:04:20 +02001109 struct mlxsw_sp_fid *f;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001110
1111 /* VLAN 0 is removed from HW filter when device goes down, but
1112 * it is reserved in our case, so simply return.
1113 */
1114 if (!vid)
1115 return 0;
1116
Ido Schimmel7f71eb42015-12-15 16:03:37 +01001117 mlxsw_sp_vport = mlxsw_sp_port_vport_find(mlxsw_sp_port, vid);
Ido Schimmel7a355832016-08-17 16:39:28 +02001118 if (WARN_ON(!mlxsw_sp_vport))
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001119 return 0;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001120
Ido Schimmel7a355832016-08-17 16:39:28 +02001121 mlxsw_sp_port_vlan_set(mlxsw_sp_vport, vid, vid, false, false);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001122
Ido Schimmel1c800752016-06-20 23:04:20 +02001123 /* Drop FID reference. If this was the last reference the
1124 * resources will be freed.
1125 */
1126 f = mlxsw_sp_vport_fid_get(mlxsw_sp_vport);
1127 if (f && !WARN_ON(!f->leave))
1128 f->leave(mlxsw_sp_vport);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001129
1130 /* When removing the last VLAN interface on a bridged port we need to
1131 * transition all active 802.1Q bridge VLANs to use VID to FID
1132 * mappings and set port's mode to VLAN mode.
1133 */
Ido Schimmel7a355832016-08-17 16:39:28 +02001134 if (list_is_singular(&mlxsw_sp_port->vports_list))
1135 mlxsw_sp_port_vlan_mode_trans(mlxsw_sp_port);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001136
Ido Schimmel7f71eb42015-12-15 16:03:37 +01001137 mlxsw_sp_port_vport_destroy(mlxsw_sp_vport);
1138
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001139 return 0;
1140}
1141
Ido Schimmel2bf9a582016-04-05 10:20:04 +02001142static int mlxsw_sp_port_get_phys_port_name(struct net_device *dev, char *name,
1143 size_t len)
1144{
1145 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
Ido Schimmeld664b412016-06-09 09:51:40 +02001146 u8 module = mlxsw_sp_port->mapping.module;
1147 u8 width = mlxsw_sp_port->mapping.width;
1148 u8 lane = mlxsw_sp_port->mapping.lane;
Ido Schimmel2bf9a582016-04-05 10:20:04 +02001149 int err;
1150
Ido Schimmel2bf9a582016-04-05 10:20:04 +02001151 if (!mlxsw_sp_port->split)
1152 err = snprintf(name, len, "p%d", module + 1);
1153 else
1154 err = snprintf(name, len, "p%ds%d", module + 1,
1155 lane / width);
1156
1157 if (err >= len)
1158 return -EINVAL;
1159
1160 return 0;
1161}
1162
Yotam Gigi763b4b72016-07-21 12:03:17 +02001163static struct mlxsw_sp_port_mall_tc_entry *
1164mlxsw_sp_port_mirror_entry_find(struct mlxsw_sp_port *port,
1165 unsigned long cookie) {
1166 struct mlxsw_sp_port_mall_tc_entry *mall_tc_entry;
1167
1168 list_for_each_entry(mall_tc_entry, &port->mall_tc_list, list)
1169 if (mall_tc_entry->cookie == cookie)
1170 return mall_tc_entry;
1171
1172 return NULL;
1173}
1174
1175static int
1176mlxsw_sp_port_add_cls_matchall_mirror(struct mlxsw_sp_port *mlxsw_sp_port,
1177 struct tc_cls_matchall_offload *cls,
1178 const struct tc_action *a,
1179 bool ingress)
1180{
1181 struct mlxsw_sp_port_mall_tc_entry *mall_tc_entry;
1182 struct net *net = dev_net(mlxsw_sp_port->dev);
1183 enum mlxsw_sp_span_type span_type;
1184 struct mlxsw_sp_port *to_port;
1185 struct net_device *to_dev;
1186 int ifindex;
1187 int err;
1188
1189 ifindex = tcf_mirred_ifindex(a);
1190 to_dev = __dev_get_by_index(net, ifindex);
1191 if (!to_dev) {
1192 netdev_err(mlxsw_sp_port->dev, "Could not find requested device\n");
1193 return -EINVAL;
1194 }
1195
1196 if (!mlxsw_sp_port_dev_check(to_dev)) {
1197 netdev_err(mlxsw_sp_port->dev, "Cannot mirror to a non-spectrum port");
1198 return -ENOTSUPP;
1199 }
1200 to_port = netdev_priv(to_dev);
1201
1202 mall_tc_entry = kzalloc(sizeof(*mall_tc_entry), GFP_KERNEL);
1203 if (!mall_tc_entry)
1204 return -ENOMEM;
1205
1206 mall_tc_entry->cookie = cls->cookie;
1207 mall_tc_entry->type = MLXSW_SP_PORT_MALL_MIRROR;
1208 mall_tc_entry->mirror.to_local_port = to_port->local_port;
1209 mall_tc_entry->mirror.ingress = ingress;
1210 list_add_tail(&mall_tc_entry->list, &mlxsw_sp_port->mall_tc_list);
1211
1212 span_type = ingress ? MLXSW_SP_SPAN_INGRESS : MLXSW_SP_SPAN_EGRESS;
1213 err = mlxsw_sp_span_mirror_add(mlxsw_sp_port, to_port, span_type);
1214 if (err)
1215 goto err_mirror_add;
1216 return 0;
1217
1218err_mirror_add:
1219 list_del(&mall_tc_entry->list);
1220 kfree(mall_tc_entry);
1221 return err;
1222}
1223
1224static int mlxsw_sp_port_add_cls_matchall(struct mlxsw_sp_port *mlxsw_sp_port,
1225 __be16 protocol,
1226 struct tc_cls_matchall_offload *cls,
1227 bool ingress)
1228{
Yotam Gigi763b4b72016-07-21 12:03:17 +02001229 const struct tc_action *a;
WANG Cong22dc13c2016-08-13 22:35:00 -07001230 LIST_HEAD(actions);
Yotam Gigi763b4b72016-07-21 12:03:17 +02001231 int err;
1232
Ido Schimmel86cb13e2016-07-25 13:12:33 +03001233 if (!tc_single_action(cls->exts)) {
Yotam Gigi763b4b72016-07-21 12:03:17 +02001234 netdev_err(mlxsw_sp_port->dev, "only singular actions are supported\n");
1235 return -ENOTSUPP;
1236 }
1237
WANG Cong22dc13c2016-08-13 22:35:00 -07001238 tcf_exts_to_list(cls->exts, &actions);
1239 list_for_each_entry(a, &actions, list) {
Ido Schimmel86cb13e2016-07-25 13:12:33 +03001240 if (!is_tcf_mirred_mirror(a) || protocol != htons(ETH_P_ALL))
1241 return -ENOTSUPP;
1242
Yotam Gigi763b4b72016-07-21 12:03:17 +02001243 err = mlxsw_sp_port_add_cls_matchall_mirror(mlxsw_sp_port, cls,
1244 a, ingress);
1245 if (err)
1246 return err;
Yotam Gigi763b4b72016-07-21 12:03:17 +02001247 }
1248
1249 return 0;
1250}
1251
1252static void mlxsw_sp_port_del_cls_matchall(struct mlxsw_sp_port *mlxsw_sp_port,
1253 struct tc_cls_matchall_offload *cls)
1254{
1255 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
1256 struct mlxsw_sp_port_mall_tc_entry *mall_tc_entry;
1257 enum mlxsw_sp_span_type span_type;
1258 struct mlxsw_sp_port *to_port;
1259
1260 mall_tc_entry = mlxsw_sp_port_mirror_entry_find(mlxsw_sp_port,
1261 cls->cookie);
1262 if (!mall_tc_entry) {
1263 netdev_dbg(mlxsw_sp_port->dev, "tc entry not found on port\n");
1264 return;
1265 }
1266
1267 switch (mall_tc_entry->type) {
1268 case MLXSW_SP_PORT_MALL_MIRROR:
1269 to_port = mlxsw_sp->ports[mall_tc_entry->mirror.to_local_port];
1270 span_type = mall_tc_entry->mirror.ingress ?
1271 MLXSW_SP_SPAN_INGRESS : MLXSW_SP_SPAN_EGRESS;
1272
1273 mlxsw_sp_span_mirror_remove(mlxsw_sp_port, to_port, span_type);
1274 break;
1275 default:
1276 WARN_ON(1);
1277 }
1278
1279 list_del(&mall_tc_entry->list);
1280 kfree(mall_tc_entry);
1281}
1282
1283static int mlxsw_sp_setup_tc(struct net_device *dev, u32 handle,
1284 __be16 proto, struct tc_to_netdev *tc)
1285{
1286 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
1287 bool ingress = TC_H_MAJ(handle) == TC_H_MAJ(TC_H_INGRESS);
1288
1289 if (tc->type == TC_SETUP_MATCHALL) {
1290 switch (tc->cls_mall->command) {
1291 case TC_CLSMATCHALL_REPLACE:
1292 return mlxsw_sp_port_add_cls_matchall(mlxsw_sp_port,
1293 proto,
1294 tc->cls_mall,
1295 ingress);
1296 case TC_CLSMATCHALL_DESTROY:
1297 mlxsw_sp_port_del_cls_matchall(mlxsw_sp_port,
1298 tc->cls_mall);
1299 return 0;
1300 default:
1301 return -EINVAL;
1302 }
1303 }
1304
1305 return -ENOTSUPP;
1306}
1307
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001308static const struct net_device_ops mlxsw_sp_port_netdev_ops = {
1309 .ndo_open = mlxsw_sp_port_open,
1310 .ndo_stop = mlxsw_sp_port_stop,
1311 .ndo_start_xmit = mlxsw_sp_port_xmit,
Yotam Gigi763b4b72016-07-21 12:03:17 +02001312 .ndo_setup_tc = mlxsw_sp_setup_tc,
Jiri Pirkoc5b9b512015-12-03 12:12:22 +01001313 .ndo_set_rx_mode = mlxsw_sp_set_rx_mode,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001314 .ndo_set_mac_address = mlxsw_sp_port_set_mac_address,
1315 .ndo_change_mtu = mlxsw_sp_port_change_mtu,
1316 .ndo_get_stats64 = mlxsw_sp_port_get_stats64,
Nogah Frankelfc1bbb02016-09-16 15:05:38 +02001317 .ndo_has_offload_stats = mlxsw_sp_port_has_offload_stats,
1318 .ndo_get_offload_stats = mlxsw_sp_port_get_offload_stats,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001319 .ndo_vlan_rx_add_vid = mlxsw_sp_port_add_vid,
1320 .ndo_vlan_rx_kill_vid = mlxsw_sp_port_kill_vid,
Jiri Pirko6cf3c972016-07-05 11:27:39 +02001321 .ndo_neigh_construct = mlxsw_sp_router_neigh_construct,
1322 .ndo_neigh_destroy = mlxsw_sp_router_neigh_destroy,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001323 .ndo_fdb_add = switchdev_port_fdb_add,
1324 .ndo_fdb_del = switchdev_port_fdb_del,
1325 .ndo_fdb_dump = switchdev_port_fdb_dump,
1326 .ndo_bridge_setlink = switchdev_port_bridge_setlink,
1327 .ndo_bridge_getlink = switchdev_port_bridge_getlink,
1328 .ndo_bridge_dellink = switchdev_port_bridge_dellink,
Ido Schimmel2bf9a582016-04-05 10:20:04 +02001329 .ndo_get_phys_port_name = mlxsw_sp_port_get_phys_port_name,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001330};
1331
1332static void mlxsw_sp_port_get_drvinfo(struct net_device *dev,
1333 struct ethtool_drvinfo *drvinfo)
1334{
1335 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
1336 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
1337
1338 strlcpy(drvinfo->driver, mlxsw_sp_driver_name, sizeof(drvinfo->driver));
1339 strlcpy(drvinfo->version, mlxsw_sp_driver_version,
1340 sizeof(drvinfo->version));
1341 snprintf(drvinfo->fw_version, sizeof(drvinfo->fw_version),
1342 "%d.%d.%d",
1343 mlxsw_sp->bus_info->fw_rev.major,
1344 mlxsw_sp->bus_info->fw_rev.minor,
1345 mlxsw_sp->bus_info->fw_rev.subminor);
1346 strlcpy(drvinfo->bus_info, mlxsw_sp->bus_info->device_name,
1347 sizeof(drvinfo->bus_info));
1348}
1349
Ido Schimmel9f7ec052016-04-06 17:10:14 +02001350static void mlxsw_sp_port_get_pauseparam(struct net_device *dev,
1351 struct ethtool_pauseparam *pause)
1352{
1353 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
1354
1355 pause->rx_pause = mlxsw_sp_port->link.rx_pause;
1356 pause->tx_pause = mlxsw_sp_port->link.tx_pause;
1357}
1358
1359static int mlxsw_sp_port_pause_set(struct mlxsw_sp_port *mlxsw_sp_port,
1360 struct ethtool_pauseparam *pause)
1361{
1362 char pfcc_pl[MLXSW_REG_PFCC_LEN];
1363
1364 mlxsw_reg_pfcc_pack(pfcc_pl, mlxsw_sp_port->local_port);
1365 mlxsw_reg_pfcc_pprx_set(pfcc_pl, pause->rx_pause);
1366 mlxsw_reg_pfcc_pptx_set(pfcc_pl, pause->tx_pause);
1367
1368 return mlxsw_reg_write(mlxsw_sp_port->mlxsw_sp->core, MLXSW_REG(pfcc),
1369 pfcc_pl);
1370}
1371
1372static int mlxsw_sp_port_set_pauseparam(struct net_device *dev,
1373 struct ethtool_pauseparam *pause)
1374{
1375 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
1376 bool pause_en = pause->tx_pause || pause->rx_pause;
1377 int err;
1378
Ido Schimmeld81a6bd2016-04-06 17:10:16 +02001379 if (mlxsw_sp_port->dcb.pfc && mlxsw_sp_port->dcb.pfc->pfc_en) {
1380 netdev_err(dev, "PFC already enabled on port\n");
1381 return -EINVAL;
1382 }
1383
Ido Schimmel9f7ec052016-04-06 17:10:14 +02001384 if (pause->autoneg) {
1385 netdev_err(dev, "PAUSE frames autonegotiation isn't supported\n");
1386 return -EINVAL;
1387 }
1388
1389 err = mlxsw_sp_port_headroom_set(mlxsw_sp_port, dev->mtu, pause_en);
1390 if (err) {
1391 netdev_err(dev, "Failed to configure port's headroom\n");
1392 return err;
1393 }
1394
1395 err = mlxsw_sp_port_pause_set(mlxsw_sp_port, pause);
1396 if (err) {
1397 netdev_err(dev, "Failed to set PAUSE parameters\n");
1398 goto err_port_pause_configure;
1399 }
1400
1401 mlxsw_sp_port->link.rx_pause = pause->rx_pause;
1402 mlxsw_sp_port->link.tx_pause = pause->tx_pause;
1403
1404 return 0;
1405
1406err_port_pause_configure:
1407 pause_en = mlxsw_sp_port_is_pause_en(mlxsw_sp_port);
1408 mlxsw_sp_port_headroom_set(mlxsw_sp_port, dev->mtu, pause_en);
1409 return err;
1410}
1411
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001412struct mlxsw_sp_port_hw_stats {
1413 char str[ETH_GSTRING_LEN];
1414 u64 (*getter)(char *payload);
1415};
1416
Ido Schimmel7ed674b2016-07-19 15:35:53 +02001417static struct mlxsw_sp_port_hw_stats mlxsw_sp_port_hw_stats[] = {
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001418 {
1419 .str = "a_frames_transmitted_ok",
1420 .getter = mlxsw_reg_ppcnt_a_frames_transmitted_ok_get,
1421 },
1422 {
1423 .str = "a_frames_received_ok",
1424 .getter = mlxsw_reg_ppcnt_a_frames_received_ok_get,
1425 },
1426 {
1427 .str = "a_frame_check_sequence_errors",
1428 .getter = mlxsw_reg_ppcnt_a_frame_check_sequence_errors_get,
1429 },
1430 {
1431 .str = "a_alignment_errors",
1432 .getter = mlxsw_reg_ppcnt_a_alignment_errors_get,
1433 },
1434 {
1435 .str = "a_octets_transmitted_ok",
1436 .getter = mlxsw_reg_ppcnt_a_octets_transmitted_ok_get,
1437 },
1438 {
1439 .str = "a_octets_received_ok",
1440 .getter = mlxsw_reg_ppcnt_a_octets_received_ok_get,
1441 },
1442 {
1443 .str = "a_multicast_frames_xmitted_ok",
1444 .getter = mlxsw_reg_ppcnt_a_multicast_frames_xmitted_ok_get,
1445 },
1446 {
1447 .str = "a_broadcast_frames_xmitted_ok",
1448 .getter = mlxsw_reg_ppcnt_a_broadcast_frames_xmitted_ok_get,
1449 },
1450 {
1451 .str = "a_multicast_frames_received_ok",
1452 .getter = mlxsw_reg_ppcnt_a_multicast_frames_received_ok_get,
1453 },
1454 {
1455 .str = "a_broadcast_frames_received_ok",
1456 .getter = mlxsw_reg_ppcnt_a_broadcast_frames_received_ok_get,
1457 },
1458 {
1459 .str = "a_in_range_length_errors",
1460 .getter = mlxsw_reg_ppcnt_a_in_range_length_errors_get,
1461 },
1462 {
1463 .str = "a_out_of_range_length_field",
1464 .getter = mlxsw_reg_ppcnt_a_out_of_range_length_field_get,
1465 },
1466 {
1467 .str = "a_frame_too_long_errors",
1468 .getter = mlxsw_reg_ppcnt_a_frame_too_long_errors_get,
1469 },
1470 {
1471 .str = "a_symbol_error_during_carrier",
1472 .getter = mlxsw_reg_ppcnt_a_symbol_error_during_carrier_get,
1473 },
1474 {
1475 .str = "a_mac_control_frames_transmitted",
1476 .getter = mlxsw_reg_ppcnt_a_mac_control_frames_transmitted_get,
1477 },
1478 {
1479 .str = "a_mac_control_frames_received",
1480 .getter = mlxsw_reg_ppcnt_a_mac_control_frames_received_get,
1481 },
1482 {
1483 .str = "a_unsupported_opcodes_received",
1484 .getter = mlxsw_reg_ppcnt_a_unsupported_opcodes_received_get,
1485 },
1486 {
1487 .str = "a_pause_mac_ctrl_frames_received",
1488 .getter = mlxsw_reg_ppcnt_a_pause_mac_ctrl_frames_received_get,
1489 },
1490 {
1491 .str = "a_pause_mac_ctrl_frames_xmitted",
1492 .getter = mlxsw_reg_ppcnt_a_pause_mac_ctrl_frames_transmitted_get,
1493 },
1494};
1495
1496#define MLXSW_SP_PORT_HW_STATS_LEN ARRAY_SIZE(mlxsw_sp_port_hw_stats)
1497
Ido Schimmel7ed674b2016-07-19 15:35:53 +02001498static struct mlxsw_sp_port_hw_stats mlxsw_sp_port_hw_prio_stats[] = {
1499 {
1500 .str = "rx_octets_prio",
1501 .getter = mlxsw_reg_ppcnt_rx_octets_get,
1502 },
1503 {
1504 .str = "rx_frames_prio",
1505 .getter = mlxsw_reg_ppcnt_rx_frames_get,
1506 },
1507 {
1508 .str = "tx_octets_prio",
1509 .getter = mlxsw_reg_ppcnt_tx_octets_get,
1510 },
1511 {
1512 .str = "tx_frames_prio",
1513 .getter = mlxsw_reg_ppcnt_tx_frames_get,
1514 },
1515 {
1516 .str = "rx_pause_prio",
1517 .getter = mlxsw_reg_ppcnt_rx_pause_get,
1518 },
1519 {
1520 .str = "rx_pause_duration_prio",
1521 .getter = mlxsw_reg_ppcnt_rx_pause_duration_get,
1522 },
1523 {
1524 .str = "tx_pause_prio",
1525 .getter = mlxsw_reg_ppcnt_tx_pause_get,
1526 },
1527 {
1528 .str = "tx_pause_duration_prio",
1529 .getter = mlxsw_reg_ppcnt_tx_pause_duration_get,
1530 },
1531};
1532
1533#define MLXSW_SP_PORT_HW_PRIO_STATS_LEN ARRAY_SIZE(mlxsw_sp_port_hw_prio_stats)
1534
Ido Schimmeldf4750e2016-07-19 15:35:54 +02001535static u64 mlxsw_reg_ppcnt_tc_transmit_queue_bytes_get(char *ppcnt_pl)
1536{
1537 u64 transmit_queue = mlxsw_reg_ppcnt_tc_transmit_queue_get(ppcnt_pl);
1538
1539 return MLXSW_SP_CELLS_TO_BYTES(transmit_queue);
1540}
1541
1542static struct mlxsw_sp_port_hw_stats mlxsw_sp_port_hw_tc_stats[] = {
1543 {
1544 .str = "tc_transmit_queue_tc",
1545 .getter = mlxsw_reg_ppcnt_tc_transmit_queue_bytes_get,
1546 },
1547 {
1548 .str = "tc_no_buffer_discard_uc_tc",
1549 .getter = mlxsw_reg_ppcnt_tc_no_buffer_discard_uc_get,
1550 },
1551};
1552
1553#define MLXSW_SP_PORT_HW_TC_STATS_LEN ARRAY_SIZE(mlxsw_sp_port_hw_tc_stats)
1554
Ido Schimmel7ed674b2016-07-19 15:35:53 +02001555#define MLXSW_SP_PORT_ETHTOOL_STATS_LEN (MLXSW_SP_PORT_HW_STATS_LEN + \
Ido Schimmeldf4750e2016-07-19 15:35:54 +02001556 (MLXSW_SP_PORT_HW_PRIO_STATS_LEN + \
1557 MLXSW_SP_PORT_HW_TC_STATS_LEN) * \
Ido Schimmel7ed674b2016-07-19 15:35:53 +02001558 IEEE_8021QAZ_MAX_TCS)
1559
1560static void mlxsw_sp_port_get_prio_strings(u8 **p, int prio)
1561{
1562 int i;
1563
1564 for (i = 0; i < MLXSW_SP_PORT_HW_PRIO_STATS_LEN; i++) {
1565 snprintf(*p, ETH_GSTRING_LEN, "%s_%d",
1566 mlxsw_sp_port_hw_prio_stats[i].str, prio);
1567 *p += ETH_GSTRING_LEN;
1568 }
1569}
1570
Ido Schimmeldf4750e2016-07-19 15:35:54 +02001571static void mlxsw_sp_port_get_tc_strings(u8 **p, int tc)
1572{
1573 int i;
1574
1575 for (i = 0; i < MLXSW_SP_PORT_HW_TC_STATS_LEN; i++) {
1576 snprintf(*p, ETH_GSTRING_LEN, "%s_%d",
1577 mlxsw_sp_port_hw_tc_stats[i].str, tc);
1578 *p += ETH_GSTRING_LEN;
1579 }
1580}
1581
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001582static void mlxsw_sp_port_get_strings(struct net_device *dev,
1583 u32 stringset, u8 *data)
1584{
1585 u8 *p = data;
1586 int i;
1587
1588 switch (stringset) {
1589 case ETH_SS_STATS:
1590 for (i = 0; i < MLXSW_SP_PORT_HW_STATS_LEN; i++) {
1591 memcpy(p, mlxsw_sp_port_hw_stats[i].str,
1592 ETH_GSTRING_LEN);
1593 p += ETH_GSTRING_LEN;
1594 }
Ido Schimmel7ed674b2016-07-19 15:35:53 +02001595
1596 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++)
1597 mlxsw_sp_port_get_prio_strings(&p, i);
1598
Ido Schimmeldf4750e2016-07-19 15:35:54 +02001599 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++)
1600 mlxsw_sp_port_get_tc_strings(&p, i);
1601
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001602 break;
1603 }
1604}
1605
Ido Schimmel3a66ee32015-11-27 13:45:55 +01001606static int mlxsw_sp_port_set_phys_id(struct net_device *dev,
1607 enum ethtool_phys_id_state state)
1608{
1609 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
1610 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
1611 char mlcr_pl[MLXSW_REG_MLCR_LEN];
1612 bool active;
1613
1614 switch (state) {
1615 case ETHTOOL_ID_ACTIVE:
1616 active = true;
1617 break;
1618 case ETHTOOL_ID_INACTIVE:
1619 active = false;
1620 break;
1621 default:
1622 return -EOPNOTSUPP;
1623 }
1624
1625 mlxsw_reg_mlcr_pack(mlcr_pl, mlxsw_sp_port->local_port, active);
1626 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(mlcr), mlcr_pl);
1627}
1628
Ido Schimmel7ed674b2016-07-19 15:35:53 +02001629static int
1630mlxsw_sp_get_hw_stats_by_group(struct mlxsw_sp_port_hw_stats **p_hw_stats,
1631 int *p_len, enum mlxsw_reg_ppcnt_grp grp)
1632{
1633 switch (grp) {
1634 case MLXSW_REG_PPCNT_IEEE_8023_CNT:
1635 *p_hw_stats = mlxsw_sp_port_hw_stats;
1636 *p_len = MLXSW_SP_PORT_HW_STATS_LEN;
1637 break;
1638 case MLXSW_REG_PPCNT_PRIO_CNT:
1639 *p_hw_stats = mlxsw_sp_port_hw_prio_stats;
1640 *p_len = MLXSW_SP_PORT_HW_PRIO_STATS_LEN;
1641 break;
Ido Schimmeldf4750e2016-07-19 15:35:54 +02001642 case MLXSW_REG_PPCNT_TC_CNT:
1643 *p_hw_stats = mlxsw_sp_port_hw_tc_stats;
1644 *p_len = MLXSW_SP_PORT_HW_TC_STATS_LEN;
1645 break;
Ido Schimmel7ed674b2016-07-19 15:35:53 +02001646 default:
1647 WARN_ON(1);
1648 return -ENOTSUPP;
1649 }
1650 return 0;
1651}
1652
1653static void __mlxsw_sp_port_get_stats(struct net_device *dev,
1654 enum mlxsw_reg_ppcnt_grp grp, int prio,
1655 u64 *data, int data_index)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001656{
Ido Schimmel7ed674b2016-07-19 15:35:53 +02001657 struct mlxsw_sp_port_hw_stats *hw_stats;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001658 char ppcnt_pl[MLXSW_REG_PPCNT_LEN];
Ido Schimmel7ed674b2016-07-19 15:35:53 +02001659 int i, len;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001660 int err;
1661
Ido Schimmel7ed674b2016-07-19 15:35:53 +02001662 err = mlxsw_sp_get_hw_stats_by_group(&hw_stats, &len, grp);
1663 if (err)
1664 return;
Nogah Frankelfc1bbb02016-09-16 15:05:38 +02001665 mlxsw_sp_port_get_stats_raw(dev, grp, prio, ppcnt_pl);
Ido Schimmel7ed674b2016-07-19 15:35:53 +02001666 for (i = 0; i < len; i++)
1667 data[data_index + i] = !err ? hw_stats[i].getter(ppcnt_pl) : 0;
1668}
1669
1670static void mlxsw_sp_port_get_stats(struct net_device *dev,
1671 struct ethtool_stats *stats, u64 *data)
1672{
1673 int i, data_index = 0;
1674
1675 /* IEEE 802.3 Counters */
1676 __mlxsw_sp_port_get_stats(dev, MLXSW_REG_PPCNT_IEEE_8023_CNT, 0,
1677 data, data_index);
1678 data_index = MLXSW_SP_PORT_HW_STATS_LEN;
1679
1680 /* Per-Priority Counters */
1681 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
1682 __mlxsw_sp_port_get_stats(dev, MLXSW_REG_PPCNT_PRIO_CNT, i,
1683 data, data_index);
1684 data_index += MLXSW_SP_PORT_HW_PRIO_STATS_LEN;
1685 }
Ido Schimmeldf4750e2016-07-19 15:35:54 +02001686
1687 /* Per-TC Counters */
1688 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
1689 __mlxsw_sp_port_get_stats(dev, MLXSW_REG_PPCNT_TC_CNT, i,
1690 data, data_index);
1691 data_index += MLXSW_SP_PORT_HW_TC_STATS_LEN;
1692 }
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001693}
1694
1695static int mlxsw_sp_port_get_sset_count(struct net_device *dev, int sset)
1696{
1697 switch (sset) {
1698 case ETH_SS_STATS:
Ido Schimmel7ed674b2016-07-19 15:35:53 +02001699 return MLXSW_SP_PORT_ETHTOOL_STATS_LEN;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001700 default:
1701 return -EOPNOTSUPP;
1702 }
1703}
1704
1705struct mlxsw_sp_port_link_mode {
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001706 enum ethtool_link_mode_bit_indices mask_ethtool;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001707 u32 mask;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001708 u32 speed;
1709};
1710
1711static const struct mlxsw_sp_port_link_mode mlxsw_sp_port_link_mode[] = {
1712 {
1713 .mask = MLXSW_REG_PTYS_ETH_SPEED_100BASE_T,
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001714 .mask_ethtool = ETHTOOL_LINK_MODE_100baseT_Full_BIT,
1715 .speed = SPEED_100,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001716 },
1717 {
1718 .mask = MLXSW_REG_PTYS_ETH_SPEED_SGMII |
1719 MLXSW_REG_PTYS_ETH_SPEED_1000BASE_KX,
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001720 .mask_ethtool = ETHTOOL_LINK_MODE_1000baseKX_Full_BIT,
1721 .speed = SPEED_1000,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001722 },
1723 {
1724 .mask = MLXSW_REG_PTYS_ETH_SPEED_10GBASE_T,
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001725 .mask_ethtool = ETHTOOL_LINK_MODE_10000baseT_Full_BIT,
1726 .speed = SPEED_10000,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001727 },
1728 {
1729 .mask = MLXSW_REG_PTYS_ETH_SPEED_10GBASE_CX4 |
1730 MLXSW_REG_PTYS_ETH_SPEED_10GBASE_KX4,
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001731 .mask_ethtool = ETHTOOL_LINK_MODE_10000baseKX4_Full_BIT,
1732 .speed = SPEED_10000,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001733 },
1734 {
1735 .mask = MLXSW_REG_PTYS_ETH_SPEED_10GBASE_KR |
1736 MLXSW_REG_PTYS_ETH_SPEED_10GBASE_CR |
1737 MLXSW_REG_PTYS_ETH_SPEED_10GBASE_SR |
1738 MLXSW_REG_PTYS_ETH_SPEED_10GBASE_ER_LR,
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001739 .mask_ethtool = ETHTOOL_LINK_MODE_10000baseKR_Full_BIT,
1740 .speed = SPEED_10000,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001741 },
1742 {
1743 .mask = MLXSW_REG_PTYS_ETH_SPEED_20GBASE_KR2,
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001744 .mask_ethtool = ETHTOOL_LINK_MODE_20000baseKR2_Full_BIT,
1745 .speed = SPEED_20000,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001746 },
1747 {
1748 .mask = MLXSW_REG_PTYS_ETH_SPEED_40GBASE_CR4,
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001749 .mask_ethtool = ETHTOOL_LINK_MODE_40000baseCR4_Full_BIT,
1750 .speed = SPEED_40000,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001751 },
1752 {
1753 .mask = MLXSW_REG_PTYS_ETH_SPEED_40GBASE_KR4,
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001754 .mask_ethtool = ETHTOOL_LINK_MODE_40000baseKR4_Full_BIT,
1755 .speed = SPEED_40000,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001756 },
1757 {
1758 .mask = MLXSW_REG_PTYS_ETH_SPEED_40GBASE_SR4,
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001759 .mask_ethtool = ETHTOOL_LINK_MODE_40000baseSR4_Full_BIT,
1760 .speed = SPEED_40000,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001761 },
1762 {
1763 .mask = MLXSW_REG_PTYS_ETH_SPEED_40GBASE_LR4_ER4,
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001764 .mask_ethtool = ETHTOOL_LINK_MODE_40000baseLR4_Full_BIT,
1765 .speed = SPEED_40000,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001766 },
1767 {
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001768 .mask = MLXSW_REG_PTYS_ETH_SPEED_25GBASE_CR,
1769 .mask_ethtool = ETHTOOL_LINK_MODE_25000baseCR_Full_BIT,
1770 .speed = SPEED_25000,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001771 },
1772 {
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001773 .mask = MLXSW_REG_PTYS_ETH_SPEED_25GBASE_KR,
1774 .mask_ethtool = ETHTOOL_LINK_MODE_25000baseKR_Full_BIT,
1775 .speed = SPEED_25000,
1776 },
1777 {
1778 .mask = MLXSW_REG_PTYS_ETH_SPEED_25GBASE_SR,
1779 .mask_ethtool = ETHTOOL_LINK_MODE_25000baseSR_Full_BIT,
1780 .speed = SPEED_25000,
1781 },
1782 {
1783 .mask = MLXSW_REG_PTYS_ETH_SPEED_25GBASE_SR,
1784 .mask_ethtool = ETHTOOL_LINK_MODE_25000baseSR_Full_BIT,
1785 .speed = SPEED_25000,
1786 },
1787 {
1788 .mask = MLXSW_REG_PTYS_ETH_SPEED_50GBASE_CR2,
1789 .mask_ethtool = ETHTOOL_LINK_MODE_50000baseCR2_Full_BIT,
1790 .speed = SPEED_50000,
1791 },
1792 {
1793 .mask = MLXSW_REG_PTYS_ETH_SPEED_50GBASE_KR2,
1794 .mask_ethtool = ETHTOOL_LINK_MODE_50000baseKR2_Full_BIT,
1795 .speed = SPEED_50000,
1796 },
1797 {
1798 .mask = MLXSW_REG_PTYS_ETH_SPEED_50GBASE_SR2,
1799 .mask_ethtool = ETHTOOL_LINK_MODE_50000baseSR2_Full_BIT,
1800 .speed = SPEED_50000,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001801 },
1802 {
1803 .mask = MLXSW_REG_PTYS_ETH_SPEED_56GBASE_R4,
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001804 .mask_ethtool = ETHTOOL_LINK_MODE_56000baseKR4_Full_BIT,
1805 .speed = SPEED_56000,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001806 },
1807 {
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001808 .mask = MLXSW_REG_PTYS_ETH_SPEED_56GBASE_R4,
1809 .mask_ethtool = ETHTOOL_LINK_MODE_56000baseCR4_Full_BIT,
1810 .speed = SPEED_56000,
1811 },
1812 {
1813 .mask = MLXSW_REG_PTYS_ETH_SPEED_56GBASE_R4,
1814 .mask_ethtool = ETHTOOL_LINK_MODE_56000baseSR4_Full_BIT,
1815 .speed = SPEED_56000,
1816 },
1817 {
1818 .mask = MLXSW_REG_PTYS_ETH_SPEED_56GBASE_R4,
1819 .mask_ethtool = ETHTOOL_LINK_MODE_56000baseLR4_Full_BIT,
1820 .speed = SPEED_56000,
1821 },
1822 {
1823 .mask = MLXSW_REG_PTYS_ETH_SPEED_100GBASE_CR4,
1824 .mask_ethtool = ETHTOOL_LINK_MODE_100000baseCR4_Full_BIT,
1825 .speed = SPEED_100000,
1826 },
1827 {
1828 .mask = MLXSW_REG_PTYS_ETH_SPEED_100GBASE_SR4,
1829 .mask_ethtool = ETHTOOL_LINK_MODE_100000baseSR4_Full_BIT,
1830 .speed = SPEED_100000,
1831 },
1832 {
1833 .mask = MLXSW_REG_PTYS_ETH_SPEED_100GBASE_KR4,
1834 .mask_ethtool = ETHTOOL_LINK_MODE_100000baseKR4_Full_BIT,
1835 .speed = SPEED_100000,
1836 },
1837 {
1838 .mask = MLXSW_REG_PTYS_ETH_SPEED_100GBASE_LR4_ER4,
1839 .mask_ethtool = ETHTOOL_LINK_MODE_100000baseLR4_ER4_Full_BIT,
1840 .speed = SPEED_100000,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001841 },
1842};
1843
1844#define MLXSW_SP_PORT_LINK_MODE_LEN ARRAY_SIZE(mlxsw_sp_port_link_mode)
1845
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001846static void
1847mlxsw_sp_from_ptys_supported_port(u32 ptys_eth_proto,
1848 struct ethtool_link_ksettings *cmd)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001849{
1850 if (ptys_eth_proto & (MLXSW_REG_PTYS_ETH_SPEED_10GBASE_CR |
1851 MLXSW_REG_PTYS_ETH_SPEED_10GBASE_SR |
1852 MLXSW_REG_PTYS_ETH_SPEED_40GBASE_CR4 |
1853 MLXSW_REG_PTYS_ETH_SPEED_40GBASE_SR4 |
1854 MLXSW_REG_PTYS_ETH_SPEED_100GBASE_SR4 |
1855 MLXSW_REG_PTYS_ETH_SPEED_SGMII))
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001856 ethtool_link_ksettings_add_link_mode(cmd, supported, FIBRE);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001857
1858 if (ptys_eth_proto & (MLXSW_REG_PTYS_ETH_SPEED_10GBASE_KR |
1859 MLXSW_REG_PTYS_ETH_SPEED_10GBASE_KX4 |
1860 MLXSW_REG_PTYS_ETH_SPEED_40GBASE_KR4 |
1861 MLXSW_REG_PTYS_ETH_SPEED_100GBASE_KR4 |
1862 MLXSW_REG_PTYS_ETH_SPEED_1000BASE_KX))
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001863 ethtool_link_ksettings_add_link_mode(cmd, supported, Backplane);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001864}
1865
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001866static void mlxsw_sp_from_ptys_link(u32 ptys_eth_proto, unsigned long *mode)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001867{
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001868 int i;
1869
1870 for (i = 0; i < MLXSW_SP_PORT_LINK_MODE_LEN; i++) {
1871 if (ptys_eth_proto & mlxsw_sp_port_link_mode[i].mask)
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001872 __set_bit(mlxsw_sp_port_link_mode[i].mask_ethtool,
1873 mode);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001874 }
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001875}
1876
1877static void mlxsw_sp_from_ptys_speed_duplex(bool carrier_ok, u32 ptys_eth_proto,
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001878 struct ethtool_link_ksettings *cmd)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001879{
1880 u32 speed = SPEED_UNKNOWN;
1881 u8 duplex = DUPLEX_UNKNOWN;
1882 int i;
1883
1884 if (!carrier_ok)
1885 goto out;
1886
1887 for (i = 0; i < MLXSW_SP_PORT_LINK_MODE_LEN; i++) {
1888 if (ptys_eth_proto & mlxsw_sp_port_link_mode[i].mask) {
1889 speed = mlxsw_sp_port_link_mode[i].speed;
1890 duplex = DUPLEX_FULL;
1891 break;
1892 }
1893 }
1894out:
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001895 cmd->base.speed = speed;
1896 cmd->base.duplex = duplex;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001897}
1898
1899static u8 mlxsw_sp_port_connector_port(u32 ptys_eth_proto)
1900{
1901 if (ptys_eth_proto & (MLXSW_REG_PTYS_ETH_SPEED_10GBASE_SR |
1902 MLXSW_REG_PTYS_ETH_SPEED_40GBASE_SR4 |
1903 MLXSW_REG_PTYS_ETH_SPEED_100GBASE_SR4 |
1904 MLXSW_REG_PTYS_ETH_SPEED_SGMII))
1905 return PORT_FIBRE;
1906
1907 if (ptys_eth_proto & (MLXSW_REG_PTYS_ETH_SPEED_10GBASE_CR |
1908 MLXSW_REG_PTYS_ETH_SPEED_40GBASE_CR4 |
1909 MLXSW_REG_PTYS_ETH_SPEED_100GBASE_CR4))
1910 return PORT_DA;
1911
1912 if (ptys_eth_proto & (MLXSW_REG_PTYS_ETH_SPEED_10GBASE_KR |
1913 MLXSW_REG_PTYS_ETH_SPEED_10GBASE_KX4 |
1914 MLXSW_REG_PTYS_ETH_SPEED_40GBASE_KR4 |
1915 MLXSW_REG_PTYS_ETH_SPEED_100GBASE_KR4))
1916 return PORT_NONE;
1917
1918 return PORT_OTHER;
1919}
1920
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001921static u32
1922mlxsw_sp_to_ptys_advert_link(const struct ethtool_link_ksettings *cmd)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001923{
1924 u32 ptys_proto = 0;
1925 int i;
1926
1927 for (i = 0; i < MLXSW_SP_PORT_LINK_MODE_LEN; i++) {
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001928 if (test_bit(mlxsw_sp_port_link_mode[i].mask_ethtool,
1929 cmd->link_modes.advertising))
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001930 ptys_proto |= mlxsw_sp_port_link_mode[i].mask;
1931 }
1932 return ptys_proto;
1933}
1934
1935static u32 mlxsw_sp_to_ptys_speed(u32 speed)
1936{
1937 u32 ptys_proto = 0;
1938 int i;
1939
1940 for (i = 0; i < MLXSW_SP_PORT_LINK_MODE_LEN; i++) {
1941 if (speed == mlxsw_sp_port_link_mode[i].speed)
1942 ptys_proto |= mlxsw_sp_port_link_mode[i].mask;
1943 }
1944 return ptys_proto;
1945}
1946
Ido Schimmel18f1e702016-02-26 17:32:31 +01001947static u32 mlxsw_sp_to_ptys_upper_speed(u32 upper_speed)
1948{
1949 u32 ptys_proto = 0;
1950 int i;
1951
1952 for (i = 0; i < MLXSW_SP_PORT_LINK_MODE_LEN; i++) {
1953 if (mlxsw_sp_port_link_mode[i].speed <= upper_speed)
1954 ptys_proto |= mlxsw_sp_port_link_mode[i].mask;
1955 }
1956 return ptys_proto;
1957}
1958
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001959static void mlxsw_sp_port_get_link_supported(u32 eth_proto_cap,
1960 struct ethtool_link_ksettings *cmd)
1961{
1962 ethtool_link_ksettings_add_link_mode(cmd, supported, Asym_Pause);
1963 ethtool_link_ksettings_add_link_mode(cmd, supported, Autoneg);
1964 ethtool_link_ksettings_add_link_mode(cmd, supported, Pause);
1965
1966 mlxsw_sp_from_ptys_supported_port(eth_proto_cap, cmd);
1967 mlxsw_sp_from_ptys_link(eth_proto_cap, cmd->link_modes.supported);
1968}
1969
1970static void mlxsw_sp_port_get_link_advertise(u32 eth_proto_admin, bool autoneg,
1971 struct ethtool_link_ksettings *cmd)
1972{
1973 if (!autoneg)
1974 return;
1975
1976 ethtool_link_ksettings_add_link_mode(cmd, advertising, Autoneg);
1977 mlxsw_sp_from_ptys_link(eth_proto_admin, cmd->link_modes.advertising);
1978}
1979
1980static void
1981mlxsw_sp_port_get_link_lp_advertise(u32 eth_proto_lp, u8 autoneg_status,
1982 struct ethtool_link_ksettings *cmd)
1983{
1984 if (autoneg_status != MLXSW_REG_PTYS_AN_STATUS_OK || !eth_proto_lp)
1985 return;
1986
1987 ethtool_link_ksettings_add_link_mode(cmd, lp_advertising, Autoneg);
1988 mlxsw_sp_from_ptys_link(eth_proto_lp, cmd->link_modes.lp_advertising);
1989}
1990
1991static int mlxsw_sp_port_get_link_ksettings(struct net_device *dev,
1992 struct ethtool_link_ksettings *cmd)
1993{
1994 u32 eth_proto_cap, eth_proto_admin, eth_proto_oper, eth_proto_lp;
1995 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
1996 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
1997 char ptys_pl[MLXSW_REG_PTYS_LEN];
1998 u8 autoneg_status;
1999 bool autoneg;
2000 int err;
2001
2002 autoneg = mlxsw_sp_port->link.autoneg;
2003 mlxsw_reg_ptys_pack(ptys_pl, mlxsw_sp_port->local_port, 0);
2004 err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(ptys), ptys_pl);
2005 if (err)
2006 return err;
2007 mlxsw_reg_ptys_unpack(ptys_pl, &eth_proto_cap, &eth_proto_admin,
2008 &eth_proto_oper);
2009
2010 mlxsw_sp_port_get_link_supported(eth_proto_cap, cmd);
2011
2012 mlxsw_sp_port_get_link_advertise(eth_proto_admin, autoneg, cmd);
2013
2014 eth_proto_lp = mlxsw_reg_ptys_eth_proto_lp_advertise_get(ptys_pl);
2015 autoneg_status = mlxsw_reg_ptys_an_status_get(ptys_pl);
2016 mlxsw_sp_port_get_link_lp_advertise(eth_proto_lp, autoneg_status, cmd);
2017
2018 cmd->base.autoneg = autoneg ? AUTONEG_ENABLE : AUTONEG_DISABLE;
2019 cmd->base.port = mlxsw_sp_port_connector_port(eth_proto_oper);
2020 mlxsw_sp_from_ptys_speed_duplex(netif_carrier_ok(dev), eth_proto_oper,
2021 cmd);
2022
2023 return 0;
2024}
2025
2026static int
2027mlxsw_sp_port_set_link_ksettings(struct net_device *dev,
2028 const struct ethtool_link_ksettings *cmd)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002029{
2030 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
2031 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
2032 char ptys_pl[MLXSW_REG_PTYS_LEN];
Ido Schimmelb9d66a32016-09-12 13:26:27 +02002033 u32 eth_proto_cap, eth_proto_new;
Ido Schimmel0c83f882016-09-12 13:26:23 +02002034 bool autoneg;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002035 int err;
2036
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002037 mlxsw_reg_ptys_pack(ptys_pl, mlxsw_sp_port->local_port, 0);
2038 err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(ptys), ptys_pl);
Ido Schimmelb9d66a32016-09-12 13:26:27 +02002039 if (err)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002040 return err;
Ido Schimmelb9d66a32016-09-12 13:26:27 +02002041 mlxsw_reg_ptys_unpack(ptys_pl, &eth_proto_cap, NULL, NULL);
2042
2043 autoneg = cmd->base.autoneg == AUTONEG_ENABLE;
2044 eth_proto_new = autoneg ?
2045 mlxsw_sp_to_ptys_advert_link(cmd) :
2046 mlxsw_sp_to_ptys_speed(cmd->base.speed);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002047
2048 eth_proto_new = eth_proto_new & eth_proto_cap;
2049 if (!eth_proto_new) {
Ido Schimmelb9d66a32016-09-12 13:26:27 +02002050 netdev_err(dev, "No supported speed requested\n");
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002051 return -EINVAL;
2052 }
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002053
2054 mlxsw_reg_ptys_pack(ptys_pl, mlxsw_sp_port->local_port, eth_proto_new);
2055 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ptys), ptys_pl);
Ido Schimmelb9d66a32016-09-12 13:26:27 +02002056 if (err)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002057 return err;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002058
Ido Schimmel6277d462016-07-15 11:14:58 +02002059 if (!netif_running(dev))
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002060 return 0;
2061
Ido Schimmel0c83f882016-09-12 13:26:23 +02002062 mlxsw_sp_port->link.autoneg = autoneg;
2063
Ido Schimmelb9d66a32016-09-12 13:26:27 +02002064 mlxsw_sp_port_admin_status_set(mlxsw_sp_port, false);
2065 mlxsw_sp_port_admin_status_set(mlxsw_sp_port, true);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002066
2067 return 0;
2068}
2069
2070static const struct ethtool_ops mlxsw_sp_port_ethtool_ops = {
2071 .get_drvinfo = mlxsw_sp_port_get_drvinfo,
2072 .get_link = ethtool_op_get_link,
Ido Schimmel9f7ec052016-04-06 17:10:14 +02002073 .get_pauseparam = mlxsw_sp_port_get_pauseparam,
2074 .set_pauseparam = mlxsw_sp_port_set_pauseparam,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002075 .get_strings = mlxsw_sp_port_get_strings,
Ido Schimmel3a66ee32015-11-27 13:45:55 +01002076 .set_phys_id = mlxsw_sp_port_set_phys_id,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002077 .get_ethtool_stats = mlxsw_sp_port_get_stats,
2078 .get_sset_count = mlxsw_sp_port_get_sset_count,
Ido Schimmelb9d66a32016-09-12 13:26:27 +02002079 .get_link_ksettings = mlxsw_sp_port_get_link_ksettings,
2080 .set_link_ksettings = mlxsw_sp_port_set_link_ksettings,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002081};
2082
Ido Schimmel18f1e702016-02-26 17:32:31 +01002083static int
2084mlxsw_sp_port_speed_by_width_set(struct mlxsw_sp_port *mlxsw_sp_port, u8 width)
2085{
2086 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
2087 u32 upper_speed = MLXSW_SP_PORT_BASE_SPEED * width;
2088 char ptys_pl[MLXSW_REG_PTYS_LEN];
2089 u32 eth_proto_admin;
2090
2091 eth_proto_admin = mlxsw_sp_to_ptys_upper_speed(upper_speed);
2092 mlxsw_reg_ptys_pack(ptys_pl, mlxsw_sp_port->local_port,
2093 eth_proto_admin);
2094 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ptys), ptys_pl);
2095}
2096
Ido Schimmel8e8dfe92016-04-06 17:10:10 +02002097int mlxsw_sp_port_ets_set(struct mlxsw_sp_port *mlxsw_sp_port,
2098 enum mlxsw_reg_qeec_hr hr, u8 index, u8 next_index,
2099 bool dwrr, u8 dwrr_weight)
Ido Schimmel90183b92016-04-06 17:10:08 +02002100{
2101 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
2102 char qeec_pl[MLXSW_REG_QEEC_LEN];
2103
2104 mlxsw_reg_qeec_pack(qeec_pl, mlxsw_sp_port->local_port, hr, index,
2105 next_index);
2106 mlxsw_reg_qeec_de_set(qeec_pl, true);
2107 mlxsw_reg_qeec_dwrr_set(qeec_pl, dwrr);
2108 mlxsw_reg_qeec_dwrr_weight_set(qeec_pl, dwrr_weight);
2109 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(qeec), qeec_pl);
2110}
2111
Ido Schimmelcc7cf512016-04-06 17:10:11 +02002112int mlxsw_sp_port_ets_maxrate_set(struct mlxsw_sp_port *mlxsw_sp_port,
2113 enum mlxsw_reg_qeec_hr hr, u8 index,
2114 u8 next_index, u32 maxrate)
Ido Schimmel90183b92016-04-06 17:10:08 +02002115{
2116 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
2117 char qeec_pl[MLXSW_REG_QEEC_LEN];
2118
2119 mlxsw_reg_qeec_pack(qeec_pl, mlxsw_sp_port->local_port, hr, index,
2120 next_index);
2121 mlxsw_reg_qeec_mase_set(qeec_pl, true);
2122 mlxsw_reg_qeec_max_shaper_rate_set(qeec_pl, maxrate);
2123 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(qeec), qeec_pl);
2124}
2125
Ido Schimmel8e8dfe92016-04-06 17:10:10 +02002126int mlxsw_sp_port_prio_tc_set(struct mlxsw_sp_port *mlxsw_sp_port,
2127 u8 switch_prio, u8 tclass)
Ido Schimmel90183b92016-04-06 17:10:08 +02002128{
2129 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
2130 char qtct_pl[MLXSW_REG_QTCT_LEN];
2131
2132 mlxsw_reg_qtct_pack(qtct_pl, mlxsw_sp_port->local_port, switch_prio,
2133 tclass);
2134 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(qtct), qtct_pl);
2135}
2136
2137static int mlxsw_sp_port_ets_init(struct mlxsw_sp_port *mlxsw_sp_port)
2138{
2139 int err, i;
2140
2141 /* Setup the elements hierarcy, so that each TC is linked to
2142 * one subgroup, which are all member in the same group.
2143 */
2144 err = mlxsw_sp_port_ets_set(mlxsw_sp_port,
2145 MLXSW_REG_QEEC_HIERARCY_GROUP, 0, 0, false,
2146 0);
2147 if (err)
2148 return err;
2149 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
2150 err = mlxsw_sp_port_ets_set(mlxsw_sp_port,
2151 MLXSW_REG_QEEC_HIERARCY_SUBGROUP, i,
2152 0, false, 0);
2153 if (err)
2154 return err;
2155 }
2156 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
2157 err = mlxsw_sp_port_ets_set(mlxsw_sp_port,
2158 MLXSW_REG_QEEC_HIERARCY_TC, i, i,
2159 false, 0);
2160 if (err)
2161 return err;
2162 }
2163
2164 /* Make sure the max shaper is disabled in all hierarcies that
2165 * support it.
2166 */
2167 err = mlxsw_sp_port_ets_maxrate_set(mlxsw_sp_port,
2168 MLXSW_REG_QEEC_HIERARCY_PORT, 0, 0,
2169 MLXSW_REG_QEEC_MAS_DIS);
2170 if (err)
2171 return err;
2172 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
2173 err = mlxsw_sp_port_ets_maxrate_set(mlxsw_sp_port,
2174 MLXSW_REG_QEEC_HIERARCY_SUBGROUP,
2175 i, 0,
2176 MLXSW_REG_QEEC_MAS_DIS);
2177 if (err)
2178 return err;
2179 }
2180 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
2181 err = mlxsw_sp_port_ets_maxrate_set(mlxsw_sp_port,
2182 MLXSW_REG_QEEC_HIERARCY_TC,
2183 i, i,
2184 MLXSW_REG_QEEC_MAS_DIS);
2185 if (err)
2186 return err;
2187 }
2188
2189 /* Map all priorities to traffic class 0. */
2190 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
2191 err = mlxsw_sp_port_prio_tc_set(mlxsw_sp_port, i, 0);
2192 if (err)
2193 return err;
2194 }
2195
2196 return 0;
2197}
2198
Ido Schimmel05978482016-08-17 16:39:30 +02002199static int mlxsw_sp_port_pvid_vport_create(struct mlxsw_sp_port *mlxsw_sp_port)
2200{
2201 mlxsw_sp_port->pvid = 1;
2202
2203 return mlxsw_sp_port_add_vid(mlxsw_sp_port->dev, 0, 1);
2204}
2205
2206static int mlxsw_sp_port_pvid_vport_destroy(struct mlxsw_sp_port *mlxsw_sp_port)
2207{
2208 return mlxsw_sp_port_kill_vid(mlxsw_sp_port->dev, 0, 1);
2209}
2210
Ido Schimmelbe945352016-06-09 09:51:39 +02002211static int mlxsw_sp_port_create(struct mlxsw_sp *mlxsw_sp, u8 local_port,
Ido Schimmeld664b412016-06-09 09:51:40 +02002212 bool split, u8 module, u8 width, u8 lane)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002213{
2214 struct mlxsw_sp_port *mlxsw_sp_port;
2215 struct net_device *dev;
Ido Schimmelbd40e9d2015-12-15 16:03:36 +01002216 size_t bytes;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002217 int err;
2218
2219 dev = alloc_etherdev(sizeof(struct mlxsw_sp_port));
2220 if (!dev)
2221 return -ENOMEM;
2222 mlxsw_sp_port = netdev_priv(dev);
2223 mlxsw_sp_port->dev = dev;
2224 mlxsw_sp_port->mlxsw_sp = mlxsw_sp;
2225 mlxsw_sp_port->local_port = local_port;
Ido Schimmel18f1e702016-02-26 17:32:31 +01002226 mlxsw_sp_port->split = split;
Ido Schimmeld664b412016-06-09 09:51:40 +02002227 mlxsw_sp_port->mapping.module = module;
2228 mlxsw_sp_port->mapping.width = width;
2229 mlxsw_sp_port->mapping.lane = lane;
Ido Schimmel0c83f882016-09-12 13:26:23 +02002230 mlxsw_sp_port->link.autoneg = 1;
Ido Schimmelbd40e9d2015-12-15 16:03:36 +01002231 bytes = DIV_ROUND_UP(VLAN_N_VID, BITS_PER_BYTE);
2232 mlxsw_sp_port->active_vlans = kzalloc(bytes, GFP_KERNEL);
2233 if (!mlxsw_sp_port->active_vlans) {
2234 err = -ENOMEM;
2235 goto err_port_active_vlans_alloc;
2236 }
Elad Razfc1273a2016-01-06 13:01:11 +01002237 mlxsw_sp_port->untagged_vlans = kzalloc(bytes, GFP_KERNEL);
2238 if (!mlxsw_sp_port->untagged_vlans) {
2239 err = -ENOMEM;
2240 goto err_port_untagged_vlans_alloc;
2241 }
Ido Schimmel7f71eb42015-12-15 16:03:37 +01002242 INIT_LIST_HEAD(&mlxsw_sp_port->vports_list);
Yotam Gigi763b4b72016-07-21 12:03:17 +02002243 INIT_LIST_HEAD(&mlxsw_sp_port->mall_tc_list);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002244
2245 mlxsw_sp_port->pcpu_stats =
2246 netdev_alloc_pcpu_stats(struct mlxsw_sp_port_pcpu_stats);
2247 if (!mlxsw_sp_port->pcpu_stats) {
2248 err = -ENOMEM;
2249 goto err_alloc_stats;
2250 }
2251
Nogah Frankelfc1bbb02016-09-16 15:05:38 +02002252 mlxsw_sp_port->hw_stats.cache =
2253 kzalloc(sizeof(*mlxsw_sp_port->hw_stats.cache), GFP_KERNEL);
2254
2255 if (!mlxsw_sp_port->hw_stats.cache) {
2256 err = -ENOMEM;
2257 goto err_alloc_hw_stats;
2258 }
2259 INIT_DELAYED_WORK(&mlxsw_sp_port->hw_stats.update_dw,
2260 &update_stats_cache);
2261
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002262 dev->netdev_ops = &mlxsw_sp_port_netdev_ops;
2263 dev->ethtool_ops = &mlxsw_sp_port_ethtool_ops;
2264
Ido Schimmel3247ff22016-09-08 08:16:02 +02002265 err = mlxsw_sp_port_swid_set(mlxsw_sp_port, 0);
2266 if (err) {
2267 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to set SWID\n",
2268 mlxsw_sp_port->local_port);
2269 goto err_port_swid_set;
2270 }
2271
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002272 err = mlxsw_sp_port_dev_addr_init(mlxsw_sp_port);
2273 if (err) {
2274 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Unable to init port mac address\n",
2275 mlxsw_sp_port->local_port);
2276 goto err_dev_addr_init;
2277 }
2278
2279 netif_carrier_off(dev);
2280
2281 dev->features |= NETIF_F_NETNS_LOCAL | NETIF_F_LLTX | NETIF_F_SG |
Yotam Gigi763b4b72016-07-21 12:03:17 +02002282 NETIF_F_HW_VLAN_CTAG_FILTER | NETIF_F_HW_TC;
2283 dev->hw_features |= NETIF_F_HW_TC;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002284
2285 /* Each packet needs to have a Tx header (metadata) on top all other
2286 * headers.
2287 */
2288 dev->hard_header_len += MLXSW_TXHDR_LEN;
2289
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002290 err = mlxsw_sp_port_system_port_mapping_set(mlxsw_sp_port);
2291 if (err) {
2292 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to set system port mapping\n",
2293 mlxsw_sp_port->local_port);
2294 goto err_port_system_port_mapping_set;
2295 }
2296
Ido Schimmel18f1e702016-02-26 17:32:31 +01002297 err = mlxsw_sp_port_speed_by_width_set(mlxsw_sp_port, width);
2298 if (err) {
2299 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to enable speeds\n",
2300 mlxsw_sp_port->local_port);
2301 goto err_port_speed_by_width_set;
2302 }
2303
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002304 err = mlxsw_sp_port_mtu_set(mlxsw_sp_port, ETH_DATA_LEN);
2305 if (err) {
2306 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to set MTU\n",
2307 mlxsw_sp_port->local_port);
2308 goto err_port_mtu_set;
2309 }
2310
2311 err = mlxsw_sp_port_admin_status_set(mlxsw_sp_port, false);
2312 if (err)
2313 goto err_port_admin_status_set;
2314
2315 err = mlxsw_sp_port_buffers_init(mlxsw_sp_port);
2316 if (err) {
2317 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to initialize buffers\n",
2318 mlxsw_sp_port->local_port);
2319 goto err_port_buffers_init;
2320 }
2321
Ido Schimmel90183b92016-04-06 17:10:08 +02002322 err = mlxsw_sp_port_ets_init(mlxsw_sp_port);
2323 if (err) {
2324 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to initialize ETS\n",
2325 mlxsw_sp_port->local_port);
2326 goto err_port_ets_init;
2327 }
2328
Ido Schimmelf00817d2016-04-06 17:10:09 +02002329 /* ETS and buffers must be initialized before DCB. */
2330 err = mlxsw_sp_port_dcb_init(mlxsw_sp_port);
2331 if (err) {
2332 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to initialize DCB\n",
2333 mlxsw_sp_port->local_port);
2334 goto err_port_dcb_init;
2335 }
2336
Ido Schimmel05978482016-08-17 16:39:30 +02002337 err = mlxsw_sp_port_pvid_vport_create(mlxsw_sp_port);
2338 if (err) {
2339 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to create PVID vPort\n",
2340 mlxsw_sp_port->local_port);
2341 goto err_port_pvid_vport_create;
2342 }
2343
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002344 mlxsw_sp_port_switchdev_init(mlxsw_sp_port);
Ido Schimmel2f258442016-08-17 16:39:31 +02002345 mlxsw_sp->ports[local_port] = mlxsw_sp_port;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002346 err = register_netdev(dev);
2347 if (err) {
2348 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to register netdev\n",
2349 mlxsw_sp_port->local_port);
2350 goto err_register_netdev;
2351 }
2352
Jiri Pirko932762b2016-04-08 19:11:21 +02002353 err = mlxsw_core_port_init(mlxsw_sp->core, &mlxsw_sp_port->core_port,
2354 mlxsw_sp_port->local_port, dev,
2355 mlxsw_sp_port->split, module);
2356 if (err) {
2357 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to init core port\n",
2358 mlxsw_sp_port->local_port);
2359 goto err_core_port_init;
2360 }
Jiri Pirkoc4745502016-02-26 17:32:26 +01002361
Nogah Frankelfc1bbb02016-09-16 15:05:38 +02002362 mlxsw_core_schedule_dw(&mlxsw_sp_port->hw_stats.update_dw, 0);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002363 return 0;
2364
Jiri Pirko932762b2016-04-08 19:11:21 +02002365err_core_port_init:
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002366 unregister_netdev(dev);
2367err_register_netdev:
Ido Schimmel2f258442016-08-17 16:39:31 +02002368 mlxsw_sp->ports[local_port] = NULL;
Ido Schimmel05832722016-08-17 16:39:35 +02002369 mlxsw_sp_port_switchdev_fini(mlxsw_sp_port);
Ido Schimmel05978482016-08-17 16:39:30 +02002370 mlxsw_sp_port_pvid_vport_destroy(mlxsw_sp_port);
2371err_port_pvid_vport_create:
Ido Schimmel4de34eb2016-08-04 17:36:22 +03002372 mlxsw_sp_port_dcb_fini(mlxsw_sp_port);
Ido Schimmelf00817d2016-04-06 17:10:09 +02002373err_port_dcb_init:
Ido Schimmel90183b92016-04-06 17:10:08 +02002374err_port_ets_init:
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002375err_port_buffers_init:
2376err_port_admin_status_set:
2377err_port_mtu_set:
Ido Schimmel18f1e702016-02-26 17:32:31 +01002378err_port_speed_by_width_set:
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002379err_port_system_port_mapping_set:
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002380err_dev_addr_init:
Ido Schimmel3247ff22016-09-08 08:16:02 +02002381 mlxsw_sp_port_swid_set(mlxsw_sp_port, MLXSW_PORT_SWID_DISABLED_PORT);
2382err_port_swid_set:
Nogah Frankelfc1bbb02016-09-16 15:05:38 +02002383 kfree(mlxsw_sp_port->hw_stats.cache);
2384err_alloc_hw_stats:
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002385 free_percpu(mlxsw_sp_port->pcpu_stats);
2386err_alloc_stats:
Elad Razfc1273a2016-01-06 13:01:11 +01002387 kfree(mlxsw_sp_port->untagged_vlans);
2388err_port_untagged_vlans_alloc:
Ido Schimmelbd40e9d2015-12-15 16:03:36 +01002389 kfree(mlxsw_sp_port->active_vlans);
2390err_port_active_vlans_alloc:
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002391 free_netdev(dev);
2392 return err;
2393}
2394
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002395static void mlxsw_sp_port_remove(struct mlxsw_sp *mlxsw_sp, u8 local_port)
2396{
2397 struct mlxsw_sp_port *mlxsw_sp_port = mlxsw_sp->ports[local_port];
2398
2399 if (!mlxsw_sp_port)
2400 return;
Nogah Frankelfc1bbb02016-09-16 15:05:38 +02002401 cancel_delayed_work_sync(&mlxsw_sp_port->hw_stats.update_dw);
Jiri Pirko932762b2016-04-08 19:11:21 +02002402 mlxsw_core_port_fini(&mlxsw_sp_port->core_port);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002403 unregister_netdev(mlxsw_sp_port->dev); /* This calls ndo_stop */
Ido Schimmel2f258442016-08-17 16:39:31 +02002404 mlxsw_sp->ports[local_port] = NULL;
Ido Schimmel05832722016-08-17 16:39:35 +02002405 mlxsw_sp_port_switchdev_fini(mlxsw_sp_port);
Ido Schimmel05978482016-08-17 16:39:30 +02002406 mlxsw_sp_port_pvid_vport_destroy(mlxsw_sp_port);
Ido Schimmelf00817d2016-04-06 17:10:09 +02002407 mlxsw_sp_port_dcb_fini(mlxsw_sp_port);
Ido Schimmel3e9b27b2016-02-26 17:32:28 +01002408 mlxsw_sp_port_swid_set(mlxsw_sp_port, MLXSW_PORT_SWID_DISABLED_PORT);
2409 mlxsw_sp_port_module_unmap(mlxsw_sp, mlxsw_sp_port->local_port);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002410 free_percpu(mlxsw_sp_port->pcpu_stats);
Nogah Frankelfc1bbb02016-09-16 15:05:38 +02002411 kfree(mlxsw_sp_port->hw_stats.cache);
Elad Razfc1273a2016-01-06 13:01:11 +01002412 kfree(mlxsw_sp_port->untagged_vlans);
Ido Schimmelbd40e9d2015-12-15 16:03:36 +01002413 kfree(mlxsw_sp_port->active_vlans);
Ido Schimmel32d863f2016-07-02 11:00:10 +02002414 WARN_ON_ONCE(!list_empty(&mlxsw_sp_port->vports_list));
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002415 free_netdev(mlxsw_sp_port->dev);
2416}
2417
2418static void mlxsw_sp_ports_remove(struct mlxsw_sp *mlxsw_sp)
2419{
2420 int i;
2421
2422 for (i = 1; i < MLXSW_PORT_MAX_PORTS; i++)
2423 mlxsw_sp_port_remove(mlxsw_sp, i);
2424 kfree(mlxsw_sp->ports);
2425}
2426
2427static int mlxsw_sp_ports_create(struct mlxsw_sp *mlxsw_sp)
2428{
Ido Schimmeld664b412016-06-09 09:51:40 +02002429 u8 module, width, lane;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002430 size_t alloc_size;
2431 int i;
2432 int err;
2433
2434 alloc_size = sizeof(struct mlxsw_sp_port *) * MLXSW_PORT_MAX_PORTS;
2435 mlxsw_sp->ports = kzalloc(alloc_size, GFP_KERNEL);
2436 if (!mlxsw_sp->ports)
2437 return -ENOMEM;
2438
2439 for (i = 1; i < MLXSW_PORT_MAX_PORTS; i++) {
Ido Schimmel558c2d52016-02-26 17:32:29 +01002440 err = mlxsw_sp_port_module_info_get(mlxsw_sp, i, &module,
Ido Schimmeld664b412016-06-09 09:51:40 +02002441 &width, &lane);
Ido Schimmel558c2d52016-02-26 17:32:29 +01002442 if (err)
2443 goto err_port_module_info_get;
2444 if (!width)
2445 continue;
2446 mlxsw_sp->port_to_module[i] = module;
Ido Schimmeld664b412016-06-09 09:51:40 +02002447 err = mlxsw_sp_port_create(mlxsw_sp, i, false, module, width,
2448 lane);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002449 if (err)
2450 goto err_port_create;
2451 }
2452 return 0;
2453
2454err_port_create:
Ido Schimmel558c2d52016-02-26 17:32:29 +01002455err_port_module_info_get:
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002456 for (i--; i >= 1; i--)
2457 mlxsw_sp_port_remove(mlxsw_sp, i);
2458 kfree(mlxsw_sp->ports);
2459 return err;
2460}
2461
Ido Schimmel18f1e702016-02-26 17:32:31 +01002462static u8 mlxsw_sp_cluster_base_port_get(u8 local_port)
2463{
2464 u8 offset = (local_port - 1) % MLXSW_SP_PORTS_PER_CLUSTER_MAX;
2465
2466 return local_port - offset;
2467}
2468
Ido Schimmelbe945352016-06-09 09:51:39 +02002469static int mlxsw_sp_port_split_create(struct mlxsw_sp *mlxsw_sp, u8 base_port,
2470 u8 module, unsigned int count)
2471{
2472 u8 width = MLXSW_PORT_MODULE_MAX_WIDTH / count;
2473 int err, i;
2474
2475 for (i = 0; i < count; i++) {
2476 err = mlxsw_sp_port_module_map(mlxsw_sp, base_port + i, module,
2477 width, i * width);
2478 if (err)
2479 goto err_port_module_map;
2480 }
2481
2482 for (i = 0; i < count; i++) {
2483 err = __mlxsw_sp_port_swid_set(mlxsw_sp, base_port + i, 0);
2484 if (err)
2485 goto err_port_swid_set;
2486 }
2487
2488 for (i = 0; i < count; i++) {
2489 err = mlxsw_sp_port_create(mlxsw_sp, base_port + i, true,
Ido Schimmeld664b412016-06-09 09:51:40 +02002490 module, width, i * width);
Ido Schimmelbe945352016-06-09 09:51:39 +02002491 if (err)
2492 goto err_port_create;
2493 }
2494
2495 return 0;
2496
2497err_port_create:
2498 for (i--; i >= 0; i--)
2499 mlxsw_sp_port_remove(mlxsw_sp, base_port + i);
2500 i = count;
2501err_port_swid_set:
2502 for (i--; i >= 0; i--)
2503 __mlxsw_sp_port_swid_set(mlxsw_sp, base_port + i,
2504 MLXSW_PORT_SWID_DISABLED_PORT);
2505 i = count;
2506err_port_module_map:
2507 for (i--; i >= 0; i--)
2508 mlxsw_sp_port_module_unmap(mlxsw_sp, base_port + i);
2509 return err;
2510}
2511
2512static void mlxsw_sp_port_unsplit_create(struct mlxsw_sp *mlxsw_sp,
2513 u8 base_port, unsigned int count)
2514{
2515 u8 local_port, module, width = MLXSW_PORT_MODULE_MAX_WIDTH;
2516 int i;
2517
2518 /* Split by four means we need to re-create two ports, otherwise
2519 * only one.
2520 */
2521 count = count / 2;
2522
2523 for (i = 0; i < count; i++) {
2524 local_port = base_port + i * 2;
2525 module = mlxsw_sp->port_to_module[local_port];
2526
2527 mlxsw_sp_port_module_map(mlxsw_sp, local_port, module, width,
2528 0);
2529 }
2530
2531 for (i = 0; i < count; i++)
2532 __mlxsw_sp_port_swid_set(mlxsw_sp, base_port + i * 2, 0);
2533
2534 for (i = 0; i < count; i++) {
2535 local_port = base_port + i * 2;
2536 module = mlxsw_sp->port_to_module[local_port];
2537
2538 mlxsw_sp_port_create(mlxsw_sp, local_port, false, module,
Ido Schimmeld664b412016-06-09 09:51:40 +02002539 width, 0);
Ido Schimmelbe945352016-06-09 09:51:39 +02002540 }
2541}
2542
Jiri Pirkob2f10572016-04-08 19:11:23 +02002543static int mlxsw_sp_port_split(struct mlxsw_core *mlxsw_core, u8 local_port,
2544 unsigned int count)
Ido Schimmel18f1e702016-02-26 17:32:31 +01002545{
Jiri Pirkob2f10572016-04-08 19:11:23 +02002546 struct mlxsw_sp *mlxsw_sp = mlxsw_core_driver_priv(mlxsw_core);
Ido Schimmel18f1e702016-02-26 17:32:31 +01002547 struct mlxsw_sp_port *mlxsw_sp_port;
Ido Schimmel18f1e702016-02-26 17:32:31 +01002548 u8 module, cur_width, base_port;
2549 int i;
2550 int err;
2551
2552 mlxsw_sp_port = mlxsw_sp->ports[local_port];
2553 if (!mlxsw_sp_port) {
2554 dev_err(mlxsw_sp->bus_info->dev, "Port number \"%d\" does not exist\n",
2555 local_port);
2556 return -EINVAL;
2557 }
2558
Ido Schimmeld664b412016-06-09 09:51:40 +02002559 module = mlxsw_sp_port->mapping.module;
2560 cur_width = mlxsw_sp_port->mapping.width;
2561
Ido Schimmel18f1e702016-02-26 17:32:31 +01002562 if (count != 2 && count != 4) {
2563 netdev_err(mlxsw_sp_port->dev, "Port can only be split into 2 or 4 ports\n");
2564 return -EINVAL;
2565 }
2566
Ido Schimmel18f1e702016-02-26 17:32:31 +01002567 if (cur_width != MLXSW_PORT_MODULE_MAX_WIDTH) {
2568 netdev_err(mlxsw_sp_port->dev, "Port cannot be split further\n");
2569 return -EINVAL;
2570 }
2571
2572 /* Make sure we have enough slave (even) ports for the split. */
2573 if (count == 2) {
2574 base_port = local_port;
2575 if (mlxsw_sp->ports[base_port + 1]) {
2576 netdev_err(mlxsw_sp_port->dev, "Invalid split configuration\n");
2577 return -EINVAL;
2578 }
2579 } else {
2580 base_port = mlxsw_sp_cluster_base_port_get(local_port);
2581 if (mlxsw_sp->ports[base_port + 1] ||
2582 mlxsw_sp->ports[base_port + 3]) {
2583 netdev_err(mlxsw_sp_port->dev, "Invalid split configuration\n");
2584 return -EINVAL;
2585 }
2586 }
2587
2588 for (i = 0; i < count; i++)
2589 mlxsw_sp_port_remove(mlxsw_sp, base_port + i);
2590
Ido Schimmelbe945352016-06-09 09:51:39 +02002591 err = mlxsw_sp_port_split_create(mlxsw_sp, base_port, module, count);
2592 if (err) {
2593 dev_err(mlxsw_sp->bus_info->dev, "Failed to create split ports\n");
2594 goto err_port_split_create;
Ido Schimmel18f1e702016-02-26 17:32:31 +01002595 }
2596
2597 return 0;
2598
Ido Schimmelbe945352016-06-09 09:51:39 +02002599err_port_split_create:
2600 mlxsw_sp_port_unsplit_create(mlxsw_sp, base_port, count);
Ido Schimmel18f1e702016-02-26 17:32:31 +01002601 return err;
2602}
2603
Jiri Pirkob2f10572016-04-08 19:11:23 +02002604static int mlxsw_sp_port_unsplit(struct mlxsw_core *mlxsw_core, u8 local_port)
Ido Schimmel18f1e702016-02-26 17:32:31 +01002605{
Jiri Pirkob2f10572016-04-08 19:11:23 +02002606 struct mlxsw_sp *mlxsw_sp = mlxsw_core_driver_priv(mlxsw_core);
Ido Schimmel18f1e702016-02-26 17:32:31 +01002607 struct mlxsw_sp_port *mlxsw_sp_port;
Ido Schimmeld664b412016-06-09 09:51:40 +02002608 u8 cur_width, base_port;
Ido Schimmel18f1e702016-02-26 17:32:31 +01002609 unsigned int count;
2610 int i;
Ido Schimmel18f1e702016-02-26 17:32:31 +01002611
2612 mlxsw_sp_port = mlxsw_sp->ports[local_port];
2613 if (!mlxsw_sp_port) {
2614 dev_err(mlxsw_sp->bus_info->dev, "Port number \"%d\" does not exist\n",
2615 local_port);
2616 return -EINVAL;
2617 }
2618
2619 if (!mlxsw_sp_port->split) {
2620 netdev_err(mlxsw_sp_port->dev, "Port wasn't split\n");
2621 return -EINVAL;
2622 }
2623
Ido Schimmeld664b412016-06-09 09:51:40 +02002624 cur_width = mlxsw_sp_port->mapping.width;
Ido Schimmel18f1e702016-02-26 17:32:31 +01002625 count = cur_width == 1 ? 4 : 2;
2626
2627 base_port = mlxsw_sp_cluster_base_port_get(local_port);
2628
2629 /* Determine which ports to remove. */
2630 if (count == 2 && local_port >= base_port + 2)
2631 base_port = base_port + 2;
2632
2633 for (i = 0; i < count; i++)
2634 mlxsw_sp_port_remove(mlxsw_sp, base_port + i);
2635
Ido Schimmelbe945352016-06-09 09:51:39 +02002636 mlxsw_sp_port_unsplit_create(mlxsw_sp, base_port, count);
Ido Schimmel18f1e702016-02-26 17:32:31 +01002637
2638 return 0;
2639}
2640
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002641static void mlxsw_sp_pude_event_func(const struct mlxsw_reg_info *reg,
2642 char *pude_pl, void *priv)
2643{
2644 struct mlxsw_sp *mlxsw_sp = priv;
2645 struct mlxsw_sp_port *mlxsw_sp_port;
2646 enum mlxsw_reg_pude_oper_status status;
2647 u8 local_port;
2648
2649 local_port = mlxsw_reg_pude_local_port_get(pude_pl);
2650 mlxsw_sp_port = mlxsw_sp->ports[local_port];
Ido Schimmelbbf2a472016-07-02 11:00:14 +02002651 if (!mlxsw_sp_port)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002652 return;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002653
2654 status = mlxsw_reg_pude_oper_status_get(pude_pl);
2655 if (status == MLXSW_PORT_OPER_STATUS_UP) {
2656 netdev_info(mlxsw_sp_port->dev, "link up\n");
2657 netif_carrier_on(mlxsw_sp_port->dev);
2658 } else {
2659 netdev_info(mlxsw_sp_port->dev, "link down\n");
2660 netif_carrier_off(mlxsw_sp_port->dev);
2661 }
2662}
2663
2664static struct mlxsw_event_listener mlxsw_sp_pude_event = {
2665 .func = mlxsw_sp_pude_event_func,
2666 .trap_id = MLXSW_TRAP_ID_PUDE,
2667};
2668
2669static int mlxsw_sp_event_register(struct mlxsw_sp *mlxsw_sp,
2670 enum mlxsw_event_trap_id trap_id)
2671{
2672 struct mlxsw_event_listener *el;
2673 char hpkt_pl[MLXSW_REG_HPKT_LEN];
2674 int err;
2675
2676 switch (trap_id) {
2677 case MLXSW_TRAP_ID_PUDE:
2678 el = &mlxsw_sp_pude_event;
2679 break;
2680 }
2681 err = mlxsw_core_event_listener_register(mlxsw_sp->core, el, mlxsw_sp);
2682 if (err)
2683 return err;
2684
2685 mlxsw_reg_hpkt_pack(hpkt_pl, MLXSW_REG_HPKT_ACTION_FORWARD, trap_id);
2686 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(hpkt), hpkt_pl);
2687 if (err)
2688 goto err_event_trap_set;
2689
2690 return 0;
2691
2692err_event_trap_set:
2693 mlxsw_core_event_listener_unregister(mlxsw_sp->core, el, mlxsw_sp);
2694 return err;
2695}
2696
2697static void mlxsw_sp_event_unregister(struct mlxsw_sp *mlxsw_sp,
2698 enum mlxsw_event_trap_id trap_id)
2699{
2700 struct mlxsw_event_listener *el;
2701
2702 switch (trap_id) {
2703 case MLXSW_TRAP_ID_PUDE:
2704 el = &mlxsw_sp_pude_event;
2705 break;
2706 }
2707 mlxsw_core_event_listener_unregister(mlxsw_sp->core, el, mlxsw_sp);
2708}
2709
2710static void mlxsw_sp_rx_listener_func(struct sk_buff *skb, u8 local_port,
2711 void *priv)
2712{
2713 struct mlxsw_sp *mlxsw_sp = priv;
2714 struct mlxsw_sp_port *mlxsw_sp_port = mlxsw_sp->ports[local_port];
2715 struct mlxsw_sp_port_pcpu_stats *pcpu_stats;
2716
2717 if (unlikely(!mlxsw_sp_port)) {
2718 dev_warn_ratelimited(mlxsw_sp->bus_info->dev, "Port %d: skb received for non-existent port\n",
2719 local_port);
2720 return;
2721 }
2722
2723 skb->dev = mlxsw_sp_port->dev;
2724
2725 pcpu_stats = this_cpu_ptr(mlxsw_sp_port->pcpu_stats);
2726 u64_stats_update_begin(&pcpu_stats->syncp);
2727 pcpu_stats->rx_packets++;
2728 pcpu_stats->rx_bytes += skb->len;
2729 u64_stats_update_end(&pcpu_stats->syncp);
2730
2731 skb->protocol = eth_type_trans(skb, skb->dev);
2732 netif_receive_skb(skb);
2733}
2734
Ido Schimmel1c6c6d22016-08-25 18:42:40 +02002735static void mlxsw_sp_rx_listener_mark_func(struct sk_buff *skb, u8 local_port,
2736 void *priv)
2737{
2738 skb->offload_fwd_mark = 1;
2739 return mlxsw_sp_rx_listener_func(skb, local_port, priv);
2740}
2741
Ido Schimmel63a81142016-08-25 18:42:39 +02002742#define MLXSW_SP_RXL(_func, _trap_id, _action) \
2743 { \
2744 .func = _func, \
2745 .local_port = MLXSW_PORT_DONT_CARE, \
2746 .trap_id = MLXSW_TRAP_ID_##_trap_id, \
2747 .action = MLXSW_REG_HPKT_ACTION_##_action, \
Ido Schimmel93393b32016-08-25 18:42:38 +02002748 }
2749
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002750static const struct mlxsw_rx_listener mlxsw_sp_rx_listener[] = {
Ido Schimmel63a81142016-08-25 18:42:39 +02002751 MLXSW_SP_RXL(mlxsw_sp_rx_listener_func, FDB_MC, TRAP_TO_CPU),
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002752 /* Traps for specific L2 packet types, not trapped as FDB MC */
Ido Schimmel63a81142016-08-25 18:42:39 +02002753 MLXSW_SP_RXL(mlxsw_sp_rx_listener_func, STP, TRAP_TO_CPU),
2754 MLXSW_SP_RXL(mlxsw_sp_rx_listener_func, LACP, TRAP_TO_CPU),
2755 MLXSW_SP_RXL(mlxsw_sp_rx_listener_func, EAPOL, TRAP_TO_CPU),
2756 MLXSW_SP_RXL(mlxsw_sp_rx_listener_func, LLDP, TRAP_TO_CPU),
2757 MLXSW_SP_RXL(mlxsw_sp_rx_listener_func, MMRP, TRAP_TO_CPU),
2758 MLXSW_SP_RXL(mlxsw_sp_rx_listener_func, MVRP, TRAP_TO_CPU),
2759 MLXSW_SP_RXL(mlxsw_sp_rx_listener_func, RPVST, TRAP_TO_CPU),
Ido Schimmel1c6c6d22016-08-25 18:42:40 +02002760 MLXSW_SP_RXL(mlxsw_sp_rx_listener_mark_func, DHCP, MIRROR_TO_CPU),
2761 MLXSW_SP_RXL(mlxsw_sp_rx_listener_mark_func, IGMP_QUERY, MIRROR_TO_CPU),
Ido Schimmel63a81142016-08-25 18:42:39 +02002762 MLXSW_SP_RXL(mlxsw_sp_rx_listener_func, IGMP_V1_REPORT, TRAP_TO_CPU),
2763 MLXSW_SP_RXL(mlxsw_sp_rx_listener_func, IGMP_V2_REPORT, TRAP_TO_CPU),
2764 MLXSW_SP_RXL(mlxsw_sp_rx_listener_func, IGMP_V2_LEAVE, TRAP_TO_CPU),
2765 MLXSW_SP_RXL(mlxsw_sp_rx_listener_func, IGMP_V3_REPORT, TRAP_TO_CPU),
Ido Schimmel1c6c6d22016-08-25 18:42:40 +02002766 MLXSW_SP_RXL(mlxsw_sp_rx_listener_mark_func, ARPBC, MIRROR_TO_CPU),
2767 MLXSW_SP_RXL(mlxsw_sp_rx_listener_mark_func, ARPUC, MIRROR_TO_CPU),
Ido Schimmel93393b32016-08-25 18:42:38 +02002768 /* L3 traps */
Ido Schimmel63a81142016-08-25 18:42:39 +02002769 MLXSW_SP_RXL(mlxsw_sp_rx_listener_func, MTUERROR, TRAP_TO_CPU),
2770 MLXSW_SP_RXL(mlxsw_sp_rx_listener_func, TTLERROR, TRAP_TO_CPU),
2771 MLXSW_SP_RXL(mlxsw_sp_rx_listener_func, LBERROR, TRAP_TO_CPU),
Ido Schimmel1c6c6d22016-08-25 18:42:40 +02002772 MLXSW_SP_RXL(mlxsw_sp_rx_listener_mark_func, OSPF, TRAP_TO_CPU),
Ido Schimmel63a81142016-08-25 18:42:39 +02002773 MLXSW_SP_RXL(mlxsw_sp_rx_listener_func, IP2ME, TRAP_TO_CPU),
2774 MLXSW_SP_RXL(mlxsw_sp_rx_listener_func, RTR_INGRESS0, TRAP_TO_CPU),
2775 MLXSW_SP_RXL(mlxsw_sp_rx_listener_func, HOST_MISS_IPV4, TRAP_TO_CPU),
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002776};
2777
2778static int mlxsw_sp_traps_init(struct mlxsw_sp *mlxsw_sp)
2779{
2780 char htgt_pl[MLXSW_REG_HTGT_LEN];
2781 char hpkt_pl[MLXSW_REG_HPKT_LEN];
2782 int i;
2783 int err;
2784
2785 mlxsw_reg_htgt_pack(htgt_pl, MLXSW_REG_HTGT_TRAP_GROUP_RX);
2786 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(htgt), htgt_pl);
2787 if (err)
2788 return err;
2789
2790 mlxsw_reg_htgt_pack(htgt_pl, MLXSW_REG_HTGT_TRAP_GROUP_CTRL);
2791 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(htgt), htgt_pl);
2792 if (err)
2793 return err;
2794
2795 for (i = 0; i < ARRAY_SIZE(mlxsw_sp_rx_listener); i++) {
2796 err = mlxsw_core_rx_listener_register(mlxsw_sp->core,
2797 &mlxsw_sp_rx_listener[i],
2798 mlxsw_sp);
2799 if (err)
2800 goto err_rx_listener_register;
2801
Ido Schimmel63a81142016-08-25 18:42:39 +02002802 mlxsw_reg_hpkt_pack(hpkt_pl, mlxsw_sp_rx_listener[i].action,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002803 mlxsw_sp_rx_listener[i].trap_id);
2804 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(hpkt), hpkt_pl);
2805 if (err)
2806 goto err_rx_trap_set;
2807 }
2808 return 0;
2809
2810err_rx_trap_set:
2811 mlxsw_core_rx_listener_unregister(mlxsw_sp->core,
2812 &mlxsw_sp_rx_listener[i],
2813 mlxsw_sp);
2814err_rx_listener_register:
2815 for (i--; i >= 0; i--) {
Ido Schimmel10f00aa2016-07-02 11:00:19 +02002816 mlxsw_reg_hpkt_pack(hpkt_pl, MLXSW_REG_HPKT_ACTION_DISCARD,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002817 mlxsw_sp_rx_listener[i].trap_id);
2818 mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(hpkt), hpkt_pl);
2819
2820 mlxsw_core_rx_listener_unregister(mlxsw_sp->core,
2821 &mlxsw_sp_rx_listener[i],
2822 mlxsw_sp);
2823 }
2824 return err;
2825}
2826
2827static void mlxsw_sp_traps_fini(struct mlxsw_sp *mlxsw_sp)
2828{
2829 char hpkt_pl[MLXSW_REG_HPKT_LEN];
2830 int i;
2831
2832 for (i = 0; i < ARRAY_SIZE(mlxsw_sp_rx_listener); i++) {
Ido Schimmel10f00aa2016-07-02 11:00:19 +02002833 mlxsw_reg_hpkt_pack(hpkt_pl, MLXSW_REG_HPKT_ACTION_DISCARD,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002834 mlxsw_sp_rx_listener[i].trap_id);
2835 mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(hpkt), hpkt_pl);
2836
2837 mlxsw_core_rx_listener_unregister(mlxsw_sp->core,
2838 &mlxsw_sp_rx_listener[i],
2839 mlxsw_sp);
2840 }
2841}
2842
2843static int __mlxsw_sp_flood_init(struct mlxsw_core *mlxsw_core,
2844 enum mlxsw_reg_sfgc_type type,
2845 enum mlxsw_reg_sfgc_bridge_type bridge_type)
2846{
2847 enum mlxsw_flood_table_type table_type;
2848 enum mlxsw_sp_flood_table flood_table;
2849 char sfgc_pl[MLXSW_REG_SFGC_LEN];
2850
Ido Schimmel19ae6122015-12-15 16:03:39 +01002851 if (bridge_type == MLXSW_REG_SFGC_BRIDGE_TYPE_VFID)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002852 table_type = MLXSW_REG_SFGC_TABLE_TYPE_FID;
Ido Schimmel19ae6122015-12-15 16:03:39 +01002853 else
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002854 table_type = MLXSW_REG_SFGC_TABLE_TYPE_FID_OFFEST;
Ido Schimmel19ae6122015-12-15 16:03:39 +01002855
2856 if (type == MLXSW_REG_SFGC_TYPE_UNKNOWN_UNICAST)
2857 flood_table = MLXSW_SP_FLOOD_TABLE_UC;
2858 else
2859 flood_table = MLXSW_SP_FLOOD_TABLE_BM;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002860
2861 mlxsw_reg_sfgc_pack(sfgc_pl, type, bridge_type, table_type,
2862 flood_table);
2863 return mlxsw_reg_write(mlxsw_core, MLXSW_REG(sfgc), sfgc_pl);
2864}
2865
2866static int mlxsw_sp_flood_init(struct mlxsw_sp *mlxsw_sp)
2867{
2868 int type, err;
2869
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002870 for (type = 0; type < MLXSW_REG_SFGC_TYPE_MAX; type++) {
2871 if (type == MLXSW_REG_SFGC_TYPE_RESERVED)
2872 continue;
2873
2874 err = __mlxsw_sp_flood_init(mlxsw_sp->core, type,
2875 MLXSW_REG_SFGC_BRIDGE_TYPE_VFID);
2876 if (err)
2877 return err;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002878
2879 err = __mlxsw_sp_flood_init(mlxsw_sp->core, type,
2880 MLXSW_REG_SFGC_BRIDGE_TYPE_1Q_FID);
2881 if (err)
2882 return err;
2883 }
2884
2885 return 0;
2886}
2887
Jiri Pirko0d65fc12015-12-03 12:12:28 +01002888static int mlxsw_sp_lag_init(struct mlxsw_sp *mlxsw_sp)
2889{
2890 char slcr_pl[MLXSW_REG_SLCR_LEN];
2891
2892 mlxsw_reg_slcr_pack(slcr_pl, MLXSW_REG_SLCR_LAG_HASH_SMAC |
2893 MLXSW_REG_SLCR_LAG_HASH_DMAC |
2894 MLXSW_REG_SLCR_LAG_HASH_ETHERTYPE |
2895 MLXSW_REG_SLCR_LAG_HASH_VLANID |
2896 MLXSW_REG_SLCR_LAG_HASH_SIP |
2897 MLXSW_REG_SLCR_LAG_HASH_DIP |
2898 MLXSW_REG_SLCR_LAG_HASH_SPORT |
2899 MLXSW_REG_SLCR_LAG_HASH_DPORT |
2900 MLXSW_REG_SLCR_LAG_HASH_IPPROTO);
2901 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(slcr), slcr_pl);
2902}
2903
Jiri Pirkob2f10572016-04-08 19:11:23 +02002904static int mlxsw_sp_init(struct mlxsw_core *mlxsw_core,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002905 const struct mlxsw_bus_info *mlxsw_bus_info)
2906{
Jiri Pirkob2f10572016-04-08 19:11:23 +02002907 struct mlxsw_sp *mlxsw_sp = mlxsw_core_driver_priv(mlxsw_core);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002908 int err;
2909
2910 mlxsw_sp->core = mlxsw_core;
2911 mlxsw_sp->bus_info = mlxsw_bus_info;
Ido Schimmel14d39462016-06-20 23:04:15 +02002912 INIT_LIST_HEAD(&mlxsw_sp->fids);
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02002913 INIT_LIST_HEAD(&mlxsw_sp->vfids.list);
Elad Raz3a49b4f2016-01-10 21:06:28 +01002914 INIT_LIST_HEAD(&mlxsw_sp->br_mids.list);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002915
2916 err = mlxsw_sp_base_mac_get(mlxsw_sp);
2917 if (err) {
2918 dev_err(mlxsw_sp->bus_info->dev, "Failed to get base mac\n");
2919 return err;
2920 }
2921
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002922 err = mlxsw_sp_event_register(mlxsw_sp, MLXSW_TRAP_ID_PUDE);
2923 if (err) {
2924 dev_err(mlxsw_sp->bus_info->dev, "Failed to register for PUDE events\n");
Ido Schimmelbbf2a472016-07-02 11:00:14 +02002925 return err;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002926 }
2927
2928 err = mlxsw_sp_traps_init(mlxsw_sp);
2929 if (err) {
2930 dev_err(mlxsw_sp->bus_info->dev, "Failed to set traps for RX\n");
2931 goto err_rx_listener_register;
2932 }
2933
2934 err = mlxsw_sp_flood_init(mlxsw_sp);
2935 if (err) {
2936 dev_err(mlxsw_sp->bus_info->dev, "Failed to initialize flood tables\n");
2937 goto err_flood_init;
2938 }
2939
2940 err = mlxsw_sp_buffers_init(mlxsw_sp);
2941 if (err) {
2942 dev_err(mlxsw_sp->bus_info->dev, "Failed to initialize buffers\n");
2943 goto err_buffers_init;
2944 }
2945
Jiri Pirko0d65fc12015-12-03 12:12:28 +01002946 err = mlxsw_sp_lag_init(mlxsw_sp);
2947 if (err) {
2948 dev_err(mlxsw_sp->bus_info->dev, "Failed to initialize LAG\n");
2949 goto err_lag_init;
2950 }
2951
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002952 err = mlxsw_sp_switchdev_init(mlxsw_sp);
2953 if (err) {
2954 dev_err(mlxsw_sp->bus_info->dev, "Failed to initialize switchdev\n");
2955 goto err_switchdev_init;
2956 }
2957
Ido Schimmel464dce12016-07-02 11:00:15 +02002958 err = mlxsw_sp_router_init(mlxsw_sp);
2959 if (err) {
2960 dev_err(mlxsw_sp->bus_info->dev, "Failed to initialize router\n");
2961 goto err_router_init;
2962 }
2963
Yotam Gigi763b4b72016-07-21 12:03:17 +02002964 err = mlxsw_sp_span_init(mlxsw_sp);
2965 if (err) {
2966 dev_err(mlxsw_sp->bus_info->dev, "Failed to init span system\n");
2967 goto err_span_init;
2968 }
2969
Ido Schimmelbbf2a472016-07-02 11:00:14 +02002970 err = mlxsw_sp_ports_create(mlxsw_sp);
2971 if (err) {
2972 dev_err(mlxsw_sp->bus_info->dev, "Failed to create ports\n");
2973 goto err_ports_create;
2974 }
2975
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002976 return 0;
2977
Ido Schimmelbbf2a472016-07-02 11:00:14 +02002978err_ports_create:
Yotam Gigi763b4b72016-07-21 12:03:17 +02002979 mlxsw_sp_span_fini(mlxsw_sp);
2980err_span_init:
Ido Schimmel464dce12016-07-02 11:00:15 +02002981 mlxsw_sp_router_fini(mlxsw_sp);
2982err_router_init:
Ido Schimmelbbf2a472016-07-02 11:00:14 +02002983 mlxsw_sp_switchdev_fini(mlxsw_sp);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002984err_switchdev_init:
Jiri Pirko0d65fc12015-12-03 12:12:28 +01002985err_lag_init:
Jiri Pirko0f433fa2016-04-14 18:19:24 +02002986 mlxsw_sp_buffers_fini(mlxsw_sp);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002987err_buffers_init:
2988err_flood_init:
2989 mlxsw_sp_traps_fini(mlxsw_sp);
2990err_rx_listener_register:
2991 mlxsw_sp_event_unregister(mlxsw_sp, MLXSW_TRAP_ID_PUDE);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002992 return err;
2993}
2994
Jiri Pirkob2f10572016-04-08 19:11:23 +02002995static void mlxsw_sp_fini(struct mlxsw_core *mlxsw_core)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002996{
Jiri Pirkob2f10572016-04-08 19:11:23 +02002997 struct mlxsw_sp *mlxsw_sp = mlxsw_core_driver_priv(mlxsw_core);
Ido Schimmelfa3054f2016-07-02 11:00:16 +02002998 int i;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002999
Ido Schimmelbbf2a472016-07-02 11:00:14 +02003000 mlxsw_sp_ports_remove(mlxsw_sp);
Yotam Gigi763b4b72016-07-21 12:03:17 +02003001 mlxsw_sp_span_fini(mlxsw_sp);
Ido Schimmel464dce12016-07-02 11:00:15 +02003002 mlxsw_sp_router_fini(mlxsw_sp);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003003 mlxsw_sp_switchdev_fini(mlxsw_sp);
Jiri Pirko5113bfd2016-05-06 22:20:59 +02003004 mlxsw_sp_buffers_fini(mlxsw_sp);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003005 mlxsw_sp_traps_fini(mlxsw_sp);
3006 mlxsw_sp_event_unregister(mlxsw_sp, MLXSW_TRAP_ID_PUDE);
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02003007 WARN_ON(!list_empty(&mlxsw_sp->vfids.list));
Ido Schimmel14d39462016-06-20 23:04:15 +02003008 WARN_ON(!list_empty(&mlxsw_sp->fids));
Ido Schimmelfa3054f2016-07-02 11:00:16 +02003009 for (i = 0; i < MLXSW_SP_RIF_MAX; i++)
3010 WARN_ON_ONCE(mlxsw_sp->rifs[i]);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003011}
3012
3013static struct mlxsw_config_profile mlxsw_sp_config_profile = {
3014 .used_max_vepa_channels = 1,
3015 .max_vepa_channels = 0,
3016 .used_max_lag = 1,
Jiri Pirko0d65fc12015-12-03 12:12:28 +01003017 .max_lag = MLXSW_SP_LAG_MAX,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003018 .used_max_port_per_lag = 1,
Jiri Pirko0d65fc12015-12-03 12:12:28 +01003019 .max_port_per_lag = MLXSW_SP_PORT_PER_LAG_MAX,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003020 .used_max_mid = 1,
Elad Raz53ae6282016-01-10 21:06:26 +01003021 .max_mid = MLXSW_SP_MID_MAX,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003022 .used_max_pgt = 1,
3023 .max_pgt = 0,
3024 .used_max_system_port = 1,
3025 .max_system_port = 64,
3026 .used_max_vlan_groups = 1,
3027 .max_vlan_groups = 127,
3028 .used_max_regions = 1,
3029 .max_regions = 400,
3030 .used_flood_tables = 1,
3031 .used_flood_mode = 1,
3032 .flood_mode = 3,
3033 .max_fid_offset_flood_tables = 2,
3034 .fid_offset_flood_table_size = VLAN_N_VID - 1,
Ido Schimmel19ae6122015-12-15 16:03:39 +01003035 .max_fid_flood_tables = 2,
3036 .fid_flood_table_size = MLXSW_SP_VFID_MAX,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003037 .used_max_ib_mc = 1,
3038 .max_ib_mc = 0,
3039 .used_max_pkey = 1,
3040 .max_pkey = 0,
Jiri Pirkoc6022422016-07-05 11:27:46 +02003041 .used_kvd_sizes = 1,
3042 .kvd_linear_size = MLXSW_SP_KVD_LINEAR_SIZE,
3043 .kvd_hash_single_size = MLXSW_SP_KVD_HASH_SINGLE_SIZE,
3044 .kvd_hash_double_size = MLXSW_SP_KVD_HASH_DOUBLE_SIZE,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003045 .swid_config = {
3046 {
3047 .used_type = 1,
3048 .type = MLXSW_PORT_SWID_TYPE_ETH,
3049 }
3050 },
Nogah Frankel57d316b2016-07-21 12:03:09 +02003051 .resource_query_enable = 1,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003052};
3053
3054static struct mlxsw_driver mlxsw_sp_driver = {
Jiri Pirko2d0ed392016-04-14 18:19:30 +02003055 .kind = MLXSW_DEVICE_KIND_SPECTRUM,
3056 .owner = THIS_MODULE,
3057 .priv_size = sizeof(struct mlxsw_sp),
3058 .init = mlxsw_sp_init,
3059 .fini = mlxsw_sp_fini,
3060 .port_split = mlxsw_sp_port_split,
3061 .port_unsplit = mlxsw_sp_port_unsplit,
3062 .sb_pool_get = mlxsw_sp_sb_pool_get,
3063 .sb_pool_set = mlxsw_sp_sb_pool_set,
3064 .sb_port_pool_get = mlxsw_sp_sb_port_pool_get,
3065 .sb_port_pool_set = mlxsw_sp_sb_port_pool_set,
3066 .sb_tc_pool_bind_get = mlxsw_sp_sb_tc_pool_bind_get,
3067 .sb_tc_pool_bind_set = mlxsw_sp_sb_tc_pool_bind_set,
3068 .sb_occ_snapshot = mlxsw_sp_sb_occ_snapshot,
3069 .sb_occ_max_clear = mlxsw_sp_sb_occ_max_clear,
3070 .sb_occ_port_pool_get = mlxsw_sp_sb_occ_port_pool_get,
3071 .sb_occ_tc_port_bind_get = mlxsw_sp_sb_occ_tc_port_bind_get,
3072 .txhdr_construct = mlxsw_sp_txhdr_construct,
3073 .txhdr_len = MLXSW_TXHDR_LEN,
3074 .profile = &mlxsw_sp_config_profile,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003075};
3076
Jiri Pirko7ce856a2016-07-04 08:23:12 +02003077static bool mlxsw_sp_port_dev_check(const struct net_device *dev)
3078{
3079 return dev->netdev_ops == &mlxsw_sp_port_netdev_ops;
3080}
3081
3082static struct mlxsw_sp_port *mlxsw_sp_port_dev_lower_find(struct net_device *dev)
3083{
3084 struct net_device *lower_dev;
3085 struct list_head *iter;
3086
3087 if (mlxsw_sp_port_dev_check(dev))
3088 return netdev_priv(dev);
3089
3090 netdev_for_each_all_lower_dev(dev, lower_dev, iter) {
3091 if (mlxsw_sp_port_dev_check(lower_dev))
3092 return netdev_priv(lower_dev);
3093 }
3094 return NULL;
3095}
3096
3097static struct mlxsw_sp *mlxsw_sp_lower_get(struct net_device *dev)
3098{
3099 struct mlxsw_sp_port *mlxsw_sp_port;
3100
3101 mlxsw_sp_port = mlxsw_sp_port_dev_lower_find(dev);
3102 return mlxsw_sp_port ? mlxsw_sp_port->mlxsw_sp : NULL;
3103}
3104
3105static struct mlxsw_sp_port *mlxsw_sp_port_dev_lower_find_rcu(struct net_device *dev)
3106{
3107 struct net_device *lower_dev;
3108 struct list_head *iter;
3109
3110 if (mlxsw_sp_port_dev_check(dev))
3111 return netdev_priv(dev);
3112
3113 netdev_for_each_all_lower_dev_rcu(dev, lower_dev, iter) {
3114 if (mlxsw_sp_port_dev_check(lower_dev))
3115 return netdev_priv(lower_dev);
3116 }
3117 return NULL;
3118}
3119
3120struct mlxsw_sp_port *mlxsw_sp_port_lower_dev_hold(struct net_device *dev)
3121{
3122 struct mlxsw_sp_port *mlxsw_sp_port;
3123
3124 rcu_read_lock();
3125 mlxsw_sp_port = mlxsw_sp_port_dev_lower_find_rcu(dev);
3126 if (mlxsw_sp_port)
3127 dev_hold(mlxsw_sp_port->dev);
3128 rcu_read_unlock();
3129 return mlxsw_sp_port;
3130}
3131
3132void mlxsw_sp_port_dev_put(struct mlxsw_sp_port *mlxsw_sp_port)
3133{
3134 dev_put(mlxsw_sp_port->dev);
3135}
3136
Ido Schimmel99724c12016-07-04 08:23:14 +02003137static bool mlxsw_sp_rif_should_config(struct mlxsw_sp_rif *r,
3138 unsigned long event)
3139{
3140 switch (event) {
3141 case NETDEV_UP:
3142 if (!r)
3143 return true;
3144 r->ref_count++;
3145 return false;
3146 case NETDEV_DOWN:
3147 if (r && --r->ref_count == 0)
3148 return true;
3149 /* It is possible we already removed the RIF ourselves
3150 * if it was assigned to a netdev that is now a bridge
3151 * or LAG slave.
3152 */
3153 return false;
3154 }
3155
3156 return false;
3157}
3158
3159static int mlxsw_sp_avail_rif_get(struct mlxsw_sp *mlxsw_sp)
3160{
3161 int i;
3162
3163 for (i = 0; i < MLXSW_SP_RIF_MAX; i++)
3164 if (!mlxsw_sp->rifs[i])
3165 return i;
3166
3167 return MLXSW_SP_RIF_MAX;
3168}
3169
3170static void mlxsw_sp_vport_rif_sp_attr_get(struct mlxsw_sp_port *mlxsw_sp_vport,
3171 bool *p_lagged, u16 *p_system_port)
3172{
3173 u8 local_port = mlxsw_sp_vport->local_port;
3174
3175 *p_lagged = mlxsw_sp_vport->lagged;
3176 *p_system_port = *p_lagged ? mlxsw_sp_vport->lag_id : local_port;
3177}
3178
3179static int mlxsw_sp_vport_rif_sp_op(struct mlxsw_sp_port *mlxsw_sp_vport,
3180 struct net_device *l3_dev, u16 rif,
3181 bool create)
3182{
3183 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_vport->mlxsw_sp;
3184 bool lagged = mlxsw_sp_vport->lagged;
3185 char ritr_pl[MLXSW_REG_RITR_LEN];
3186 u16 system_port;
3187
3188 mlxsw_reg_ritr_pack(ritr_pl, create, MLXSW_REG_RITR_SP_IF, rif,
3189 l3_dev->mtu, l3_dev->dev_addr);
3190
3191 mlxsw_sp_vport_rif_sp_attr_get(mlxsw_sp_vport, &lagged, &system_port);
3192 mlxsw_reg_ritr_sp_if_pack(ritr_pl, lagged, system_port,
3193 mlxsw_sp_vport_vid_get(mlxsw_sp_vport));
3194
3195 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ritr), ritr_pl);
3196}
3197
3198static void mlxsw_sp_vport_rif_sp_leave(struct mlxsw_sp_port *mlxsw_sp_vport);
3199
3200static struct mlxsw_sp_fid *
3201mlxsw_sp_rfid_alloc(u16 fid, struct net_device *l3_dev)
3202{
3203 struct mlxsw_sp_fid *f;
3204
3205 f = kzalloc(sizeof(*f), GFP_KERNEL);
3206 if (!f)
3207 return NULL;
3208
3209 f->leave = mlxsw_sp_vport_rif_sp_leave;
3210 f->ref_count = 0;
3211 f->dev = l3_dev;
3212 f->fid = fid;
3213
3214 return f;
3215}
3216
3217static struct mlxsw_sp_rif *
3218mlxsw_sp_rif_alloc(u16 rif, struct net_device *l3_dev, struct mlxsw_sp_fid *f)
3219{
3220 struct mlxsw_sp_rif *r;
3221
3222 r = kzalloc(sizeof(*r), GFP_KERNEL);
3223 if (!r)
3224 return NULL;
3225
3226 ether_addr_copy(r->addr, l3_dev->dev_addr);
3227 r->mtu = l3_dev->mtu;
3228 r->ref_count = 1;
3229 r->dev = l3_dev;
3230 r->rif = rif;
3231 r->f = f;
3232
3233 return r;
3234}
3235
3236static struct mlxsw_sp_rif *
3237mlxsw_sp_vport_rif_sp_create(struct mlxsw_sp_port *mlxsw_sp_vport,
3238 struct net_device *l3_dev)
3239{
3240 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_vport->mlxsw_sp;
3241 struct mlxsw_sp_fid *f;
3242 struct mlxsw_sp_rif *r;
3243 u16 fid, rif;
3244 int err;
3245
3246 rif = mlxsw_sp_avail_rif_get(mlxsw_sp);
3247 if (rif == MLXSW_SP_RIF_MAX)
3248 return ERR_PTR(-ERANGE);
3249
3250 err = mlxsw_sp_vport_rif_sp_op(mlxsw_sp_vport, l3_dev, rif, true);
3251 if (err)
3252 return ERR_PTR(err);
3253
3254 fid = mlxsw_sp_rif_sp_to_fid(rif);
3255 err = mlxsw_sp_rif_fdb_op(mlxsw_sp, l3_dev->dev_addr, fid, true);
3256 if (err)
3257 goto err_rif_fdb_op;
3258
3259 f = mlxsw_sp_rfid_alloc(fid, l3_dev);
3260 if (!f) {
3261 err = -ENOMEM;
3262 goto err_rfid_alloc;
3263 }
3264
3265 r = mlxsw_sp_rif_alloc(rif, l3_dev, f);
3266 if (!r) {
3267 err = -ENOMEM;
3268 goto err_rif_alloc;
3269 }
3270
3271 f->r = r;
3272 mlxsw_sp->rifs[rif] = r;
3273
3274 return r;
3275
3276err_rif_alloc:
3277 kfree(f);
3278err_rfid_alloc:
3279 mlxsw_sp_rif_fdb_op(mlxsw_sp, l3_dev->dev_addr, fid, false);
3280err_rif_fdb_op:
3281 mlxsw_sp_vport_rif_sp_op(mlxsw_sp_vport, l3_dev, rif, false);
3282 return ERR_PTR(err);
3283}
3284
3285static void mlxsw_sp_vport_rif_sp_destroy(struct mlxsw_sp_port *mlxsw_sp_vport,
3286 struct mlxsw_sp_rif *r)
3287{
3288 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_vport->mlxsw_sp;
3289 struct net_device *l3_dev = r->dev;
3290 struct mlxsw_sp_fid *f = r->f;
3291 u16 fid = f->fid;
3292 u16 rif = r->rif;
3293
3294 mlxsw_sp->rifs[rif] = NULL;
3295 f->r = NULL;
3296
3297 kfree(r);
3298
3299 kfree(f);
3300
3301 mlxsw_sp_rif_fdb_op(mlxsw_sp, l3_dev->dev_addr, fid, false);
3302
3303 mlxsw_sp_vport_rif_sp_op(mlxsw_sp_vport, l3_dev, rif, false);
3304}
3305
3306static int mlxsw_sp_vport_rif_sp_join(struct mlxsw_sp_port *mlxsw_sp_vport,
3307 struct net_device *l3_dev)
3308{
3309 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_vport->mlxsw_sp;
3310 struct mlxsw_sp_rif *r;
3311
3312 r = mlxsw_sp_rif_find_by_dev(mlxsw_sp, l3_dev);
3313 if (!r) {
3314 r = mlxsw_sp_vport_rif_sp_create(mlxsw_sp_vport, l3_dev);
3315 if (IS_ERR(r))
3316 return PTR_ERR(r);
3317 }
3318
3319 mlxsw_sp_vport_fid_set(mlxsw_sp_vport, r->f);
3320 r->f->ref_count++;
3321
3322 netdev_dbg(mlxsw_sp_vport->dev, "Joined FID=%d\n", r->f->fid);
3323
3324 return 0;
3325}
3326
3327static void mlxsw_sp_vport_rif_sp_leave(struct mlxsw_sp_port *mlxsw_sp_vport)
3328{
3329 struct mlxsw_sp_fid *f = mlxsw_sp_vport_fid_get(mlxsw_sp_vport);
3330
3331 netdev_dbg(mlxsw_sp_vport->dev, "Left FID=%d\n", f->fid);
3332
3333 mlxsw_sp_vport_fid_set(mlxsw_sp_vport, NULL);
3334 if (--f->ref_count == 0)
3335 mlxsw_sp_vport_rif_sp_destroy(mlxsw_sp_vport, f->r);
3336}
3337
3338static int mlxsw_sp_inetaddr_vport_event(struct net_device *l3_dev,
3339 struct net_device *port_dev,
3340 unsigned long event, u16 vid)
3341{
3342 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(port_dev);
3343 struct mlxsw_sp_port *mlxsw_sp_vport;
3344
3345 mlxsw_sp_vport = mlxsw_sp_port_vport_find(mlxsw_sp_port, vid);
3346 if (WARN_ON(!mlxsw_sp_vport))
3347 return -EINVAL;
3348
3349 switch (event) {
3350 case NETDEV_UP:
3351 return mlxsw_sp_vport_rif_sp_join(mlxsw_sp_vport, l3_dev);
3352 case NETDEV_DOWN:
3353 mlxsw_sp_vport_rif_sp_leave(mlxsw_sp_vport);
3354 break;
3355 }
3356
3357 return 0;
3358}
3359
3360static int mlxsw_sp_inetaddr_port_event(struct net_device *port_dev,
3361 unsigned long event)
3362{
3363 if (netif_is_bridge_port(port_dev) || netif_is_lag_port(port_dev))
3364 return 0;
3365
3366 return mlxsw_sp_inetaddr_vport_event(port_dev, port_dev, event, 1);
3367}
3368
3369static int __mlxsw_sp_inetaddr_lag_event(struct net_device *l3_dev,
3370 struct net_device *lag_dev,
3371 unsigned long event, u16 vid)
3372{
3373 struct net_device *port_dev;
3374 struct list_head *iter;
3375 int err;
3376
3377 netdev_for_each_lower_dev(lag_dev, port_dev, iter) {
3378 if (mlxsw_sp_port_dev_check(port_dev)) {
3379 err = mlxsw_sp_inetaddr_vport_event(l3_dev, port_dev,
3380 event, vid);
3381 if (err)
3382 return err;
3383 }
3384 }
3385
3386 return 0;
3387}
3388
3389static int mlxsw_sp_inetaddr_lag_event(struct net_device *lag_dev,
3390 unsigned long event)
3391{
3392 if (netif_is_bridge_port(lag_dev))
3393 return 0;
3394
3395 return __mlxsw_sp_inetaddr_lag_event(lag_dev, lag_dev, event, 1);
3396}
3397
Ido Schimmel99f44bb2016-07-04 08:23:17 +02003398static struct mlxsw_sp_fid *mlxsw_sp_bridge_fid_get(struct mlxsw_sp *mlxsw_sp,
3399 struct net_device *l3_dev)
3400{
3401 u16 fid;
3402
3403 if (is_vlan_dev(l3_dev))
3404 fid = vlan_dev_vlan_id(l3_dev);
3405 else if (mlxsw_sp->master_bridge.dev == l3_dev)
3406 fid = 1;
3407 else
3408 return mlxsw_sp_vfid_find(mlxsw_sp, l3_dev);
3409
3410 return mlxsw_sp_fid_find(mlxsw_sp, fid);
3411}
3412
Ido Schimmelf888f582016-08-24 11:18:51 +02003413static enum mlxsw_flood_table_type mlxsw_sp_flood_table_type_get(u16 fid)
3414{
3415 return mlxsw_sp_fid_is_vfid(fid) ? MLXSW_REG_SFGC_TABLE_TYPE_FID :
3416 MLXSW_REG_SFGC_TABLE_TYPE_FID_OFFEST;
3417}
3418
3419static u16 mlxsw_sp_flood_table_index_get(u16 fid)
3420{
3421 return mlxsw_sp_fid_is_vfid(fid) ? mlxsw_sp_fid_to_vfid(fid) : fid;
3422}
3423
3424static int mlxsw_sp_router_port_flood_set(struct mlxsw_sp *mlxsw_sp, u16 fid,
3425 bool set)
3426{
3427 enum mlxsw_flood_table_type table_type;
3428 char *sftr_pl;
3429 u16 index;
3430 int err;
3431
3432 sftr_pl = kmalloc(MLXSW_REG_SFTR_LEN, GFP_KERNEL);
3433 if (!sftr_pl)
3434 return -ENOMEM;
3435
3436 table_type = mlxsw_sp_flood_table_type_get(fid);
3437 index = mlxsw_sp_flood_table_index_get(fid);
3438 mlxsw_reg_sftr_pack(sftr_pl, MLXSW_SP_FLOOD_TABLE_BM, index, table_type,
3439 1, MLXSW_PORT_ROUTER_PORT, set);
3440 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sftr), sftr_pl);
3441
3442 kfree(sftr_pl);
3443 return err;
3444}
3445
Ido Schimmel99f44bb2016-07-04 08:23:17 +02003446static enum mlxsw_reg_ritr_if_type mlxsw_sp_rif_type_get(u16 fid)
3447{
3448 if (mlxsw_sp_fid_is_vfid(fid))
3449 return MLXSW_REG_RITR_FID_IF;
3450 else
3451 return MLXSW_REG_RITR_VLAN_IF;
3452}
3453
3454static int mlxsw_sp_rif_bridge_op(struct mlxsw_sp *mlxsw_sp,
3455 struct net_device *l3_dev,
3456 u16 fid, u16 rif,
3457 bool create)
3458{
3459 enum mlxsw_reg_ritr_if_type rif_type;
3460 char ritr_pl[MLXSW_REG_RITR_LEN];
3461
3462 rif_type = mlxsw_sp_rif_type_get(fid);
3463 mlxsw_reg_ritr_pack(ritr_pl, create, rif_type, rif, l3_dev->mtu,
3464 l3_dev->dev_addr);
3465 mlxsw_reg_ritr_fid_set(ritr_pl, rif_type, fid);
3466
3467 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ritr), ritr_pl);
3468}
3469
3470static int mlxsw_sp_rif_bridge_create(struct mlxsw_sp *mlxsw_sp,
3471 struct net_device *l3_dev,
3472 struct mlxsw_sp_fid *f)
3473{
3474 struct mlxsw_sp_rif *r;
3475 u16 rif;
3476 int err;
3477
3478 rif = mlxsw_sp_avail_rif_get(mlxsw_sp);
3479 if (rif == MLXSW_SP_RIF_MAX)
3480 return -ERANGE;
3481
Ido Schimmelf888f582016-08-24 11:18:51 +02003482 err = mlxsw_sp_router_port_flood_set(mlxsw_sp, f->fid, true);
Ido Schimmel99f44bb2016-07-04 08:23:17 +02003483 if (err)
3484 return err;
3485
Ido Schimmelf888f582016-08-24 11:18:51 +02003486 err = mlxsw_sp_rif_bridge_op(mlxsw_sp, l3_dev, f->fid, rif, true);
3487 if (err)
3488 goto err_rif_bridge_op;
3489
Ido Schimmel99f44bb2016-07-04 08:23:17 +02003490 err = mlxsw_sp_rif_fdb_op(mlxsw_sp, l3_dev->dev_addr, f->fid, true);
3491 if (err)
3492 goto err_rif_fdb_op;
3493
3494 r = mlxsw_sp_rif_alloc(rif, l3_dev, f);
3495 if (!r) {
3496 err = -ENOMEM;
3497 goto err_rif_alloc;
3498 }
3499
3500 f->r = r;
3501 mlxsw_sp->rifs[rif] = r;
3502
3503 netdev_dbg(l3_dev, "RIF=%d created\n", rif);
3504
3505 return 0;
3506
3507err_rif_alloc:
3508 mlxsw_sp_rif_fdb_op(mlxsw_sp, l3_dev->dev_addr, f->fid, false);
3509err_rif_fdb_op:
3510 mlxsw_sp_rif_bridge_op(mlxsw_sp, l3_dev, f->fid, rif, false);
Ido Schimmelf888f582016-08-24 11:18:51 +02003511err_rif_bridge_op:
3512 mlxsw_sp_router_port_flood_set(mlxsw_sp, f->fid, false);
Ido Schimmel99f44bb2016-07-04 08:23:17 +02003513 return err;
3514}
3515
3516void mlxsw_sp_rif_bridge_destroy(struct mlxsw_sp *mlxsw_sp,
3517 struct mlxsw_sp_rif *r)
3518{
3519 struct net_device *l3_dev = r->dev;
3520 struct mlxsw_sp_fid *f = r->f;
3521 u16 rif = r->rif;
3522
3523 mlxsw_sp->rifs[rif] = NULL;
3524 f->r = NULL;
3525
3526 kfree(r);
3527
3528 mlxsw_sp_rif_fdb_op(mlxsw_sp, l3_dev->dev_addr, f->fid, false);
3529
3530 mlxsw_sp_rif_bridge_op(mlxsw_sp, l3_dev, f->fid, rif, false);
3531
Ido Schimmelf888f582016-08-24 11:18:51 +02003532 mlxsw_sp_router_port_flood_set(mlxsw_sp, f->fid, false);
3533
Ido Schimmel99f44bb2016-07-04 08:23:17 +02003534 netdev_dbg(l3_dev, "RIF=%d destroyed\n", rif);
3535}
3536
3537static int mlxsw_sp_inetaddr_bridge_event(struct net_device *l3_dev,
3538 struct net_device *br_dev,
3539 unsigned long event)
3540{
3541 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_lower_get(l3_dev);
3542 struct mlxsw_sp_fid *f;
3543
3544 /* FID can either be an actual FID if the L3 device is the
3545 * VLAN-aware bridge or a VLAN device on top. Otherwise, the
3546 * L3 device is a VLAN-unaware bridge and we get a vFID.
3547 */
3548 f = mlxsw_sp_bridge_fid_get(mlxsw_sp, l3_dev);
3549 if (WARN_ON(!f))
3550 return -EINVAL;
3551
3552 switch (event) {
3553 case NETDEV_UP:
3554 return mlxsw_sp_rif_bridge_create(mlxsw_sp, l3_dev, f);
3555 case NETDEV_DOWN:
3556 mlxsw_sp_rif_bridge_destroy(mlxsw_sp, f->r);
3557 break;
3558 }
3559
3560 return 0;
3561}
3562
Ido Schimmel99724c12016-07-04 08:23:14 +02003563static int mlxsw_sp_inetaddr_vlan_event(struct net_device *vlan_dev,
3564 unsigned long event)
3565{
3566 struct net_device *real_dev = vlan_dev_real_dev(vlan_dev);
Ido Schimmel99f44bb2016-07-04 08:23:17 +02003567 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_lower_get(vlan_dev);
Ido Schimmel99724c12016-07-04 08:23:14 +02003568 u16 vid = vlan_dev_vlan_id(vlan_dev);
3569
3570 if (mlxsw_sp_port_dev_check(real_dev))
3571 return mlxsw_sp_inetaddr_vport_event(vlan_dev, real_dev, event,
3572 vid);
3573 else if (netif_is_lag_master(real_dev))
3574 return __mlxsw_sp_inetaddr_lag_event(vlan_dev, real_dev, event,
3575 vid);
Ido Schimmel99f44bb2016-07-04 08:23:17 +02003576 else if (netif_is_bridge_master(real_dev) &&
3577 mlxsw_sp->master_bridge.dev == real_dev)
3578 return mlxsw_sp_inetaddr_bridge_event(vlan_dev, real_dev,
3579 event);
Ido Schimmel99724c12016-07-04 08:23:14 +02003580
3581 return 0;
3582}
3583
3584static int mlxsw_sp_inetaddr_event(struct notifier_block *unused,
3585 unsigned long event, void *ptr)
3586{
3587 struct in_ifaddr *ifa = (struct in_ifaddr *) ptr;
3588 struct net_device *dev = ifa->ifa_dev->dev;
3589 struct mlxsw_sp *mlxsw_sp;
3590 struct mlxsw_sp_rif *r;
3591 int err = 0;
3592
3593 mlxsw_sp = mlxsw_sp_lower_get(dev);
3594 if (!mlxsw_sp)
3595 goto out;
3596
3597 r = mlxsw_sp_rif_find_by_dev(mlxsw_sp, dev);
3598 if (!mlxsw_sp_rif_should_config(r, event))
3599 goto out;
3600
3601 if (mlxsw_sp_port_dev_check(dev))
3602 err = mlxsw_sp_inetaddr_port_event(dev, event);
3603 else if (netif_is_lag_master(dev))
3604 err = mlxsw_sp_inetaddr_lag_event(dev, event);
Ido Schimmel99f44bb2016-07-04 08:23:17 +02003605 else if (netif_is_bridge_master(dev))
3606 err = mlxsw_sp_inetaddr_bridge_event(dev, dev, event);
Ido Schimmel99724c12016-07-04 08:23:14 +02003607 else if (is_vlan_dev(dev))
3608 err = mlxsw_sp_inetaddr_vlan_event(dev, event);
3609
3610out:
3611 return notifier_from_errno(err);
3612}
3613
Ido Schimmel6e095fd2016-07-04 08:23:13 +02003614static int mlxsw_sp_rif_edit(struct mlxsw_sp *mlxsw_sp, u16 rif,
3615 const char *mac, int mtu)
3616{
3617 char ritr_pl[MLXSW_REG_RITR_LEN];
3618 int err;
3619
3620 mlxsw_reg_ritr_rif_pack(ritr_pl, rif);
3621 err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(ritr), ritr_pl);
3622 if (err)
3623 return err;
3624
3625 mlxsw_reg_ritr_mtu_set(ritr_pl, mtu);
3626 mlxsw_reg_ritr_if_mac_memcpy_to(ritr_pl, mac);
3627 mlxsw_reg_ritr_op_set(ritr_pl, MLXSW_REG_RITR_RIF_CREATE);
3628 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ritr), ritr_pl);
3629}
3630
3631static int mlxsw_sp_netdevice_router_port_event(struct net_device *dev)
3632{
3633 struct mlxsw_sp *mlxsw_sp;
3634 struct mlxsw_sp_rif *r;
3635 int err;
3636
3637 mlxsw_sp = mlxsw_sp_lower_get(dev);
3638 if (!mlxsw_sp)
3639 return 0;
3640
3641 r = mlxsw_sp_rif_find_by_dev(mlxsw_sp, dev);
3642 if (!r)
3643 return 0;
3644
3645 err = mlxsw_sp_rif_fdb_op(mlxsw_sp, r->addr, r->f->fid, false);
3646 if (err)
3647 return err;
3648
3649 err = mlxsw_sp_rif_edit(mlxsw_sp, r->rif, dev->dev_addr, dev->mtu);
3650 if (err)
3651 goto err_rif_edit;
3652
3653 err = mlxsw_sp_rif_fdb_op(mlxsw_sp, dev->dev_addr, r->f->fid, true);
3654 if (err)
3655 goto err_rif_fdb_op;
3656
3657 ether_addr_copy(r->addr, dev->dev_addr);
3658 r->mtu = dev->mtu;
3659
3660 netdev_dbg(dev, "Updated RIF=%d\n", r->rif);
3661
3662 return 0;
3663
3664err_rif_fdb_op:
3665 mlxsw_sp_rif_edit(mlxsw_sp, r->rif, r->addr, r->mtu);
3666err_rif_edit:
3667 mlxsw_sp_rif_fdb_op(mlxsw_sp, r->addr, r->f->fid, true);
3668 return err;
3669}
3670
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02003671static bool mlxsw_sp_lag_port_fid_member(struct mlxsw_sp_port *lag_port,
3672 u16 fid)
3673{
3674 if (mlxsw_sp_fid_is_vfid(fid))
3675 return mlxsw_sp_port_vport_find_by_fid(lag_port, fid);
3676 else
3677 return test_bit(fid, lag_port->active_vlans);
3678}
3679
3680static bool mlxsw_sp_port_fdb_should_flush(struct mlxsw_sp_port *mlxsw_sp_port,
3681 u16 fid)
Ido Schimmel039c49a2016-01-27 15:20:18 +01003682{
3683 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02003684 u8 local_port = mlxsw_sp_port->local_port;
3685 u16 lag_id = mlxsw_sp_port->lag_id;
3686 int i, count = 0;
Ido Schimmel039c49a2016-01-27 15:20:18 +01003687
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02003688 if (!mlxsw_sp_port->lagged)
3689 return true;
Ido Schimmel039c49a2016-01-27 15:20:18 +01003690
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02003691 for (i = 0; i < MLXSW_SP_PORT_PER_LAG_MAX; i++) {
3692 struct mlxsw_sp_port *lag_port;
3693
3694 lag_port = mlxsw_sp_port_lagged_get(mlxsw_sp, lag_id, i);
3695 if (!lag_port || lag_port->local_port == local_port)
3696 continue;
3697 if (mlxsw_sp_lag_port_fid_member(lag_port, fid))
3698 count++;
3699 }
3700
3701 return !count;
Ido Schimmel039c49a2016-01-27 15:20:18 +01003702}
3703
3704static int
3705mlxsw_sp_port_fdb_flush_by_port_fid(const struct mlxsw_sp_port *mlxsw_sp_port,
3706 u16 fid)
3707{
3708 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
3709 char sfdf_pl[MLXSW_REG_SFDF_LEN];
3710
3711 mlxsw_reg_sfdf_pack(sfdf_pl, MLXSW_REG_SFDF_FLUSH_PER_PORT_AND_FID);
3712 mlxsw_reg_sfdf_fid_set(sfdf_pl, fid);
3713 mlxsw_reg_sfdf_port_fid_system_port_set(sfdf_pl,
3714 mlxsw_sp_port->local_port);
3715
Ido Schimmel22305372016-06-20 23:04:21 +02003716 netdev_dbg(mlxsw_sp_port->dev, "FDB flushed using Port=%d, FID=%d\n",
3717 mlxsw_sp_port->local_port, fid);
3718
Ido Schimmel039c49a2016-01-27 15:20:18 +01003719 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sfdf), sfdf_pl);
3720}
3721
3722static int
Ido Schimmel039c49a2016-01-27 15:20:18 +01003723mlxsw_sp_port_fdb_flush_by_lag_id_fid(const struct mlxsw_sp_port *mlxsw_sp_port,
3724 u16 fid)
3725{
3726 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
3727 char sfdf_pl[MLXSW_REG_SFDF_LEN];
3728
3729 mlxsw_reg_sfdf_pack(sfdf_pl, MLXSW_REG_SFDF_FLUSH_PER_LAG_AND_FID);
3730 mlxsw_reg_sfdf_fid_set(sfdf_pl, fid);
3731 mlxsw_reg_sfdf_lag_fid_lag_id_set(sfdf_pl, mlxsw_sp_port->lag_id);
3732
Ido Schimmel22305372016-06-20 23:04:21 +02003733 netdev_dbg(mlxsw_sp_port->dev, "FDB flushed using LAG ID=%d, FID=%d\n",
3734 mlxsw_sp_port->lag_id, fid);
3735
Ido Schimmel039c49a2016-01-27 15:20:18 +01003736 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sfdf), sfdf_pl);
3737}
3738
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02003739int mlxsw_sp_port_fdb_flush(struct mlxsw_sp_port *mlxsw_sp_port, u16 fid)
Ido Schimmel039c49a2016-01-27 15:20:18 +01003740{
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02003741 if (!mlxsw_sp_port_fdb_should_flush(mlxsw_sp_port, fid))
3742 return 0;
Ido Schimmel039c49a2016-01-27 15:20:18 +01003743
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02003744 if (mlxsw_sp_port->lagged)
3745 return mlxsw_sp_port_fdb_flush_by_lag_id_fid(mlxsw_sp_port,
Ido Schimmel039c49a2016-01-27 15:20:18 +01003746 fid);
3747 else
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02003748 return mlxsw_sp_port_fdb_flush_by_port_fid(mlxsw_sp_port, fid);
Ido Schimmel039c49a2016-01-27 15:20:18 +01003749}
3750
Ido Schimmel701b1862016-07-04 08:23:16 +02003751static void mlxsw_sp_master_bridge_gone_sync(struct mlxsw_sp *mlxsw_sp)
3752{
3753 struct mlxsw_sp_fid *f, *tmp;
3754
3755 list_for_each_entry_safe(f, tmp, &mlxsw_sp->fids, list)
3756 if (--f->ref_count == 0)
3757 mlxsw_sp_fid_destroy(mlxsw_sp, f);
3758 else
3759 WARN_ON_ONCE(1);
3760}
3761
Ido Schimmel7117a572016-06-20 23:04:06 +02003762static bool mlxsw_sp_master_bridge_check(struct mlxsw_sp *mlxsw_sp,
3763 struct net_device *br_dev)
3764{
3765 return !mlxsw_sp->master_bridge.dev ||
3766 mlxsw_sp->master_bridge.dev == br_dev;
3767}
3768
3769static void mlxsw_sp_master_bridge_inc(struct mlxsw_sp *mlxsw_sp,
3770 struct net_device *br_dev)
3771{
3772 mlxsw_sp->master_bridge.dev = br_dev;
3773 mlxsw_sp->master_bridge.ref_count++;
3774}
3775
3776static void mlxsw_sp_master_bridge_dec(struct mlxsw_sp *mlxsw_sp)
3777{
Ido Schimmel701b1862016-07-04 08:23:16 +02003778 if (--mlxsw_sp->master_bridge.ref_count == 0) {
Ido Schimmel7117a572016-06-20 23:04:06 +02003779 mlxsw_sp->master_bridge.dev = NULL;
Ido Schimmel701b1862016-07-04 08:23:16 +02003780 /* It's possible upper VLAN devices are still holding
3781 * references to underlying FIDs. Drop the reference
3782 * and release the resources if it was the last one.
3783 * If it wasn't, then something bad happened.
3784 */
3785 mlxsw_sp_master_bridge_gone_sync(mlxsw_sp);
3786 }
Ido Schimmel7117a572016-06-20 23:04:06 +02003787}
3788
3789static int mlxsw_sp_port_bridge_join(struct mlxsw_sp_port *mlxsw_sp_port,
3790 struct net_device *br_dev)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003791{
3792 struct net_device *dev = mlxsw_sp_port->dev;
3793 int err;
3794
3795 /* When port is not bridged untagged packets are tagged with
3796 * PVID=VID=1, thereby creating an implicit VLAN interface in
3797 * the device. Remove it and let bridge code take care of its
3798 * own VLANs.
3799 */
3800 err = mlxsw_sp_port_kill_vid(dev, 0, 1);
Ido Schimmel6c72a3d2016-01-04 10:42:26 +01003801 if (err)
3802 return err;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003803
Ido Schimmel7117a572016-06-20 23:04:06 +02003804 mlxsw_sp_master_bridge_inc(mlxsw_sp_port->mlxsw_sp, br_dev);
3805
Ido Schimmel6c72a3d2016-01-04 10:42:26 +01003806 mlxsw_sp_port->learning = 1;
3807 mlxsw_sp_port->learning_sync = 1;
3808 mlxsw_sp_port->uc_flood = 1;
3809 mlxsw_sp_port->bridged = 1;
3810
3811 return 0;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003812}
3813
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02003814static void mlxsw_sp_port_bridge_leave(struct mlxsw_sp_port *mlxsw_sp_port)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003815{
3816 struct net_device *dev = mlxsw_sp_port->dev;
Ido Schimmel5a8f4522016-01-04 10:42:25 +01003817
Ido Schimmel28a01d22016-02-18 11:30:02 +01003818 mlxsw_sp_port_pvid_set(mlxsw_sp_port, 1);
3819
Ido Schimmel7117a572016-06-20 23:04:06 +02003820 mlxsw_sp_master_bridge_dec(mlxsw_sp_port->mlxsw_sp);
3821
Ido Schimmel6c72a3d2016-01-04 10:42:26 +01003822 mlxsw_sp_port->learning = 0;
3823 mlxsw_sp_port->learning_sync = 0;
3824 mlxsw_sp_port->uc_flood = 0;
Ido Schimmel5a8f4522016-01-04 10:42:25 +01003825 mlxsw_sp_port->bridged = 0;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003826
3827 /* Add implicit VLAN interface in the device, so that untagged
3828 * packets will be classified to the default vFID.
3829 */
Ido Schimmel82e6db02016-06-20 23:04:04 +02003830 mlxsw_sp_port_add_vid(dev, 0, 1);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003831}
3832
Jiri Pirko0d65fc12015-12-03 12:12:28 +01003833static int mlxsw_sp_lag_create(struct mlxsw_sp *mlxsw_sp, u16 lag_id)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003834{
Jiri Pirko0d65fc12015-12-03 12:12:28 +01003835 char sldr_pl[MLXSW_REG_SLDR_LEN];
3836
3837 mlxsw_reg_sldr_lag_create_pack(sldr_pl, lag_id);
3838 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sldr), sldr_pl);
3839}
3840
3841static int mlxsw_sp_lag_destroy(struct mlxsw_sp *mlxsw_sp, u16 lag_id)
3842{
3843 char sldr_pl[MLXSW_REG_SLDR_LEN];
3844
3845 mlxsw_reg_sldr_lag_destroy_pack(sldr_pl, lag_id);
3846 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sldr), sldr_pl);
3847}
3848
3849static int mlxsw_sp_lag_col_port_add(struct mlxsw_sp_port *mlxsw_sp_port,
3850 u16 lag_id, u8 port_index)
3851{
3852 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
3853 char slcor_pl[MLXSW_REG_SLCOR_LEN];
3854
3855 mlxsw_reg_slcor_port_add_pack(slcor_pl, mlxsw_sp_port->local_port,
3856 lag_id, port_index);
3857 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(slcor), slcor_pl);
3858}
3859
3860static int mlxsw_sp_lag_col_port_remove(struct mlxsw_sp_port *mlxsw_sp_port,
3861 u16 lag_id)
3862{
3863 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
3864 char slcor_pl[MLXSW_REG_SLCOR_LEN];
3865
3866 mlxsw_reg_slcor_port_remove_pack(slcor_pl, mlxsw_sp_port->local_port,
3867 lag_id);
3868 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(slcor), slcor_pl);
3869}
3870
3871static int mlxsw_sp_lag_col_port_enable(struct mlxsw_sp_port *mlxsw_sp_port,
3872 u16 lag_id)
3873{
3874 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
3875 char slcor_pl[MLXSW_REG_SLCOR_LEN];
3876
3877 mlxsw_reg_slcor_col_enable_pack(slcor_pl, mlxsw_sp_port->local_port,
3878 lag_id);
3879 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(slcor), slcor_pl);
3880}
3881
3882static int mlxsw_sp_lag_col_port_disable(struct mlxsw_sp_port *mlxsw_sp_port,
3883 u16 lag_id)
3884{
3885 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
3886 char slcor_pl[MLXSW_REG_SLCOR_LEN];
3887
3888 mlxsw_reg_slcor_col_disable_pack(slcor_pl, mlxsw_sp_port->local_port,
3889 lag_id);
3890 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(slcor), slcor_pl);
3891}
3892
3893static int mlxsw_sp_lag_index_get(struct mlxsw_sp *mlxsw_sp,
3894 struct net_device *lag_dev,
3895 u16 *p_lag_id)
3896{
3897 struct mlxsw_sp_upper *lag;
3898 int free_lag_id = -1;
3899 int i;
3900
3901 for (i = 0; i < MLXSW_SP_LAG_MAX; i++) {
3902 lag = mlxsw_sp_lag_get(mlxsw_sp, i);
3903 if (lag->ref_count) {
3904 if (lag->dev == lag_dev) {
3905 *p_lag_id = i;
3906 return 0;
3907 }
3908 } else if (free_lag_id < 0) {
3909 free_lag_id = i;
3910 }
3911 }
3912 if (free_lag_id < 0)
3913 return -EBUSY;
3914 *p_lag_id = free_lag_id;
3915 return 0;
3916}
3917
3918static bool
3919mlxsw_sp_master_lag_check(struct mlxsw_sp *mlxsw_sp,
3920 struct net_device *lag_dev,
3921 struct netdev_lag_upper_info *lag_upper_info)
3922{
3923 u16 lag_id;
3924
3925 if (mlxsw_sp_lag_index_get(mlxsw_sp, lag_dev, &lag_id) != 0)
3926 return false;
3927 if (lag_upper_info->tx_type != NETDEV_LAG_TX_TYPE_HASH)
3928 return false;
3929 return true;
3930}
3931
3932static int mlxsw_sp_port_lag_index_get(struct mlxsw_sp *mlxsw_sp,
3933 u16 lag_id, u8 *p_port_index)
3934{
3935 int i;
3936
3937 for (i = 0; i < MLXSW_SP_PORT_PER_LAG_MAX; i++) {
3938 if (!mlxsw_sp_port_lagged_get(mlxsw_sp, lag_id, i)) {
3939 *p_port_index = i;
3940 return 0;
3941 }
3942 }
3943 return -EBUSY;
3944}
3945
Ido Schimmel86bf95b2016-07-02 11:00:11 +02003946static void
3947mlxsw_sp_port_pvid_vport_lag_join(struct mlxsw_sp_port *mlxsw_sp_port,
3948 u16 lag_id)
3949{
3950 struct mlxsw_sp_port *mlxsw_sp_vport;
Ido Schimmel11943ff2016-07-02 11:00:12 +02003951 struct mlxsw_sp_fid *f;
Ido Schimmel86bf95b2016-07-02 11:00:11 +02003952
3953 mlxsw_sp_vport = mlxsw_sp_port_vport_find(mlxsw_sp_port, 1);
3954 if (WARN_ON(!mlxsw_sp_vport))
3955 return;
3956
Ido Schimmel11943ff2016-07-02 11:00:12 +02003957 /* If vPort is assigned a RIF, then leave it since it's no
3958 * longer valid.
3959 */
3960 f = mlxsw_sp_vport_fid_get(mlxsw_sp_vport);
3961 if (f)
3962 f->leave(mlxsw_sp_vport);
3963
Ido Schimmel86bf95b2016-07-02 11:00:11 +02003964 mlxsw_sp_vport->lag_id = lag_id;
3965 mlxsw_sp_vport->lagged = 1;
3966}
3967
3968static void
3969mlxsw_sp_port_pvid_vport_lag_leave(struct mlxsw_sp_port *mlxsw_sp_port)
3970{
3971 struct mlxsw_sp_port *mlxsw_sp_vport;
Ido Schimmel11943ff2016-07-02 11:00:12 +02003972 struct mlxsw_sp_fid *f;
Ido Schimmel86bf95b2016-07-02 11:00:11 +02003973
3974 mlxsw_sp_vport = mlxsw_sp_port_vport_find(mlxsw_sp_port, 1);
3975 if (WARN_ON(!mlxsw_sp_vport))
3976 return;
3977
Ido Schimmel11943ff2016-07-02 11:00:12 +02003978 f = mlxsw_sp_vport_fid_get(mlxsw_sp_vport);
3979 if (f)
3980 f->leave(mlxsw_sp_vport);
3981
Ido Schimmel86bf95b2016-07-02 11:00:11 +02003982 mlxsw_sp_vport->lagged = 0;
3983}
3984
Jiri Pirko0d65fc12015-12-03 12:12:28 +01003985static int mlxsw_sp_port_lag_join(struct mlxsw_sp_port *mlxsw_sp_port,
3986 struct net_device *lag_dev)
3987{
3988 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
3989 struct mlxsw_sp_upper *lag;
3990 u16 lag_id;
3991 u8 port_index;
3992 int err;
3993
3994 err = mlxsw_sp_lag_index_get(mlxsw_sp, lag_dev, &lag_id);
3995 if (err)
3996 return err;
3997 lag = mlxsw_sp_lag_get(mlxsw_sp, lag_id);
3998 if (!lag->ref_count) {
3999 err = mlxsw_sp_lag_create(mlxsw_sp, lag_id);
4000 if (err)
4001 return err;
4002 lag->dev = lag_dev;
4003 }
4004
4005 err = mlxsw_sp_port_lag_index_get(mlxsw_sp, lag_id, &port_index);
4006 if (err)
4007 return err;
4008 err = mlxsw_sp_lag_col_port_add(mlxsw_sp_port, lag_id, port_index);
4009 if (err)
4010 goto err_col_port_add;
4011 err = mlxsw_sp_lag_col_port_enable(mlxsw_sp_port, lag_id);
4012 if (err)
4013 goto err_col_port_enable;
4014
4015 mlxsw_core_lag_mapping_set(mlxsw_sp->core, lag_id, port_index,
4016 mlxsw_sp_port->local_port);
4017 mlxsw_sp_port->lag_id = lag_id;
4018 mlxsw_sp_port->lagged = 1;
4019 lag->ref_count++;
Ido Schimmel86bf95b2016-07-02 11:00:11 +02004020
4021 mlxsw_sp_port_pvid_vport_lag_join(mlxsw_sp_port, lag_id);
4022
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004023 return 0;
4024
Ido Schimmel51554db2016-05-06 22:18:39 +02004025err_col_port_enable:
4026 mlxsw_sp_lag_col_port_remove(mlxsw_sp_port, lag_id);
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004027err_col_port_add:
4028 if (!lag->ref_count)
4029 mlxsw_sp_lag_destroy(mlxsw_sp, lag_id);
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004030 return err;
4031}
4032
Ido Schimmel82e6db02016-06-20 23:04:04 +02004033static void mlxsw_sp_port_lag_leave(struct mlxsw_sp_port *mlxsw_sp_port,
4034 struct net_device *lag_dev)
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004035{
4036 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004037 u16 lag_id = mlxsw_sp_port->lag_id;
Ido Schimmel1c800752016-06-20 23:04:20 +02004038 struct mlxsw_sp_upper *lag;
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004039
4040 if (!mlxsw_sp_port->lagged)
Ido Schimmel82e6db02016-06-20 23:04:04 +02004041 return;
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004042 lag = mlxsw_sp_lag_get(mlxsw_sp, lag_id);
4043 WARN_ON(lag->ref_count == 0);
4044
Ido Schimmel82e6db02016-06-20 23:04:04 +02004045 mlxsw_sp_lag_col_port_disable(mlxsw_sp_port, lag_id);
4046 mlxsw_sp_lag_col_port_remove(mlxsw_sp_port, lag_id);
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004047
Ido Schimmel4dc236c2016-01-27 15:20:16 +01004048 if (mlxsw_sp_port->bridged) {
4049 mlxsw_sp_port_active_vlans_del(mlxsw_sp_port);
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02004050 mlxsw_sp_port_bridge_leave(mlxsw_sp_port);
Ido Schimmel4dc236c2016-01-27 15:20:16 +01004051 }
4052
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02004053 if (lag->ref_count == 1)
Ido Schimmel82e6db02016-06-20 23:04:04 +02004054 mlxsw_sp_lag_destroy(mlxsw_sp, lag_id);
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004055
4056 mlxsw_core_lag_mapping_clear(mlxsw_sp->core, lag_id,
4057 mlxsw_sp_port->local_port);
4058 mlxsw_sp_port->lagged = 0;
4059 lag->ref_count--;
Ido Schimmel86bf95b2016-07-02 11:00:11 +02004060
4061 mlxsw_sp_port_pvid_vport_lag_leave(mlxsw_sp_port);
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004062}
4063
Jiri Pirko74581202015-12-03 12:12:30 +01004064static int mlxsw_sp_lag_dist_port_add(struct mlxsw_sp_port *mlxsw_sp_port,
4065 u16 lag_id)
4066{
4067 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
4068 char sldr_pl[MLXSW_REG_SLDR_LEN];
4069
4070 mlxsw_reg_sldr_lag_add_port_pack(sldr_pl, lag_id,
4071 mlxsw_sp_port->local_port);
4072 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sldr), sldr_pl);
4073}
4074
4075static int mlxsw_sp_lag_dist_port_remove(struct mlxsw_sp_port *mlxsw_sp_port,
4076 u16 lag_id)
4077{
4078 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
4079 char sldr_pl[MLXSW_REG_SLDR_LEN];
4080
4081 mlxsw_reg_sldr_lag_remove_port_pack(sldr_pl, lag_id,
4082 mlxsw_sp_port->local_port);
4083 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sldr), sldr_pl);
4084}
4085
4086static int mlxsw_sp_port_lag_tx_en_set(struct mlxsw_sp_port *mlxsw_sp_port,
4087 bool lag_tx_enabled)
4088{
4089 if (lag_tx_enabled)
4090 return mlxsw_sp_lag_dist_port_add(mlxsw_sp_port,
4091 mlxsw_sp_port->lag_id);
4092 else
4093 return mlxsw_sp_lag_dist_port_remove(mlxsw_sp_port,
4094 mlxsw_sp_port->lag_id);
4095}
4096
4097static int mlxsw_sp_port_lag_changed(struct mlxsw_sp_port *mlxsw_sp_port,
4098 struct netdev_lag_lower_state_info *info)
4099{
4100 return mlxsw_sp_port_lag_tx_en_set(mlxsw_sp_port, info->tx_enabled);
4101}
4102
Ido Schimmel9589a7b52015-12-15 16:03:43 +01004103static int mlxsw_sp_port_vlan_link(struct mlxsw_sp_port *mlxsw_sp_port,
4104 struct net_device *vlan_dev)
4105{
4106 struct mlxsw_sp_port *mlxsw_sp_vport;
4107 u16 vid = vlan_dev_vlan_id(vlan_dev);
4108
4109 mlxsw_sp_vport = mlxsw_sp_port_vport_find(mlxsw_sp_port, vid);
Ido Schimmel423b9372016-06-20 23:04:03 +02004110 if (WARN_ON(!mlxsw_sp_vport))
Ido Schimmel9589a7b52015-12-15 16:03:43 +01004111 return -EINVAL;
Ido Schimmel9589a7b52015-12-15 16:03:43 +01004112
4113 mlxsw_sp_vport->dev = vlan_dev;
4114
4115 return 0;
4116}
4117
Ido Schimmel82e6db02016-06-20 23:04:04 +02004118static void mlxsw_sp_port_vlan_unlink(struct mlxsw_sp_port *mlxsw_sp_port,
4119 struct net_device *vlan_dev)
Ido Schimmel9589a7b52015-12-15 16:03:43 +01004120{
4121 struct mlxsw_sp_port *mlxsw_sp_vport;
4122 u16 vid = vlan_dev_vlan_id(vlan_dev);
4123
4124 mlxsw_sp_vport = mlxsw_sp_port_vport_find(mlxsw_sp_port, vid);
Ido Schimmel423b9372016-06-20 23:04:03 +02004125 if (WARN_ON(!mlxsw_sp_vport))
Ido Schimmel82e6db02016-06-20 23:04:04 +02004126 return;
Ido Schimmel9589a7b52015-12-15 16:03:43 +01004127
4128 mlxsw_sp_vport->dev = mlxsw_sp_port->dev;
Ido Schimmel9589a7b52015-12-15 16:03:43 +01004129}
4130
Jiri Pirko74581202015-12-03 12:12:30 +01004131static int mlxsw_sp_netdevice_port_upper_event(struct net_device *dev,
4132 unsigned long event, void *ptr)
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004133{
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004134 struct netdev_notifier_changeupper_info *info;
4135 struct mlxsw_sp_port *mlxsw_sp_port;
4136 struct net_device *upper_dev;
4137 struct mlxsw_sp *mlxsw_sp;
Ido Schimmel80bedf12016-06-20 23:03:59 +02004138 int err = 0;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004139
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004140 mlxsw_sp_port = netdev_priv(dev);
4141 mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
4142 info = ptr;
4143
4144 switch (event) {
4145 case NETDEV_PRECHANGEUPPER:
4146 upper_dev = info->upper_dev;
Ido Schimmel59fe9b32016-06-20 23:04:00 +02004147 if (!is_vlan_dev(upper_dev) &&
4148 !netif_is_lag_master(upper_dev) &&
4149 !netif_is_bridge_master(upper_dev))
4150 return -EINVAL;
Ido Schimmel6ec43902016-06-20 23:04:01 +02004151 if (!info->linking)
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004152 break;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004153 /* HW limitation forbids to put ports to multiple bridges. */
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004154 if (netif_is_bridge_master(upper_dev) &&
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004155 !mlxsw_sp_master_bridge_check(mlxsw_sp, upper_dev))
Ido Schimmel80bedf12016-06-20 23:03:59 +02004156 return -EINVAL;
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004157 if (netif_is_lag_master(upper_dev) &&
4158 !mlxsw_sp_master_lag_check(mlxsw_sp, upper_dev,
4159 info->upper_info))
Ido Schimmel80bedf12016-06-20 23:03:59 +02004160 return -EINVAL;
Ido Schimmel6ec43902016-06-20 23:04:01 +02004161 if (netif_is_lag_master(upper_dev) && vlan_uses_dev(dev))
4162 return -EINVAL;
4163 if (netif_is_lag_port(dev) && is_vlan_dev(upper_dev) &&
4164 !netif_is_lag_master(vlan_dev_real_dev(upper_dev)))
4165 return -EINVAL;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004166 break;
4167 case NETDEV_CHANGEUPPER:
4168 upper_dev = info->upper_dev;
Ido Schimmel9589a7b52015-12-15 16:03:43 +01004169 if (is_vlan_dev(upper_dev)) {
Ido Schimmel80bedf12016-06-20 23:03:59 +02004170 if (info->linking)
Ido Schimmel9589a7b52015-12-15 16:03:43 +01004171 err = mlxsw_sp_port_vlan_link(mlxsw_sp_port,
4172 upper_dev);
Ido Schimmel80bedf12016-06-20 23:03:59 +02004173 else
Ido Schimmel82e6db02016-06-20 23:04:04 +02004174 mlxsw_sp_port_vlan_unlink(mlxsw_sp_port,
4175 upper_dev);
Ido Schimmel9589a7b52015-12-15 16:03:43 +01004176 } else if (netif_is_bridge_master(upper_dev)) {
Ido Schimmel7117a572016-06-20 23:04:06 +02004177 if (info->linking)
4178 err = mlxsw_sp_port_bridge_join(mlxsw_sp_port,
4179 upper_dev);
4180 else
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02004181 mlxsw_sp_port_bridge_leave(mlxsw_sp_port);
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004182 } else if (netif_is_lag_master(upper_dev)) {
Ido Schimmel80bedf12016-06-20 23:03:59 +02004183 if (info->linking)
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004184 err = mlxsw_sp_port_lag_join(mlxsw_sp_port,
4185 upper_dev);
Ido Schimmel80bedf12016-06-20 23:03:59 +02004186 else
Ido Schimmel82e6db02016-06-20 23:04:04 +02004187 mlxsw_sp_port_lag_leave(mlxsw_sp_port,
4188 upper_dev);
Ido Schimmel59fe9b32016-06-20 23:04:00 +02004189 } else {
4190 err = -EINVAL;
4191 WARN_ON(1);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004192 }
4193 break;
4194 }
4195
Ido Schimmel80bedf12016-06-20 23:03:59 +02004196 return err;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004197}
4198
Jiri Pirko74581202015-12-03 12:12:30 +01004199static int mlxsw_sp_netdevice_port_lower_event(struct net_device *dev,
4200 unsigned long event, void *ptr)
4201{
4202 struct netdev_notifier_changelowerstate_info *info;
4203 struct mlxsw_sp_port *mlxsw_sp_port;
4204 int err;
4205
4206 mlxsw_sp_port = netdev_priv(dev);
4207 info = ptr;
4208
4209 switch (event) {
4210 case NETDEV_CHANGELOWERSTATE:
4211 if (netif_is_lag_port(dev) && mlxsw_sp_port->lagged) {
4212 err = mlxsw_sp_port_lag_changed(mlxsw_sp_port,
4213 info->lower_state_info);
4214 if (err)
4215 netdev_err(dev, "Failed to reflect link aggregation lower state change\n");
4216 }
4217 break;
4218 }
4219
Ido Schimmel80bedf12016-06-20 23:03:59 +02004220 return 0;
Jiri Pirko74581202015-12-03 12:12:30 +01004221}
4222
4223static int mlxsw_sp_netdevice_port_event(struct net_device *dev,
4224 unsigned long event, void *ptr)
4225{
4226 switch (event) {
4227 case NETDEV_PRECHANGEUPPER:
4228 case NETDEV_CHANGEUPPER:
4229 return mlxsw_sp_netdevice_port_upper_event(dev, event, ptr);
4230 case NETDEV_CHANGELOWERSTATE:
4231 return mlxsw_sp_netdevice_port_lower_event(dev, event, ptr);
4232 }
4233
Ido Schimmel80bedf12016-06-20 23:03:59 +02004234 return 0;
Jiri Pirko74581202015-12-03 12:12:30 +01004235}
4236
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004237static int mlxsw_sp_netdevice_lag_event(struct net_device *lag_dev,
4238 unsigned long event, void *ptr)
4239{
4240 struct net_device *dev;
4241 struct list_head *iter;
4242 int ret;
4243
4244 netdev_for_each_lower_dev(lag_dev, dev, iter) {
4245 if (mlxsw_sp_port_dev_check(dev)) {
4246 ret = mlxsw_sp_netdevice_port_event(dev, event, ptr);
Ido Schimmel80bedf12016-06-20 23:03:59 +02004247 if (ret)
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004248 return ret;
4249 }
4250 }
4251
Ido Schimmel80bedf12016-06-20 23:03:59 +02004252 return 0;
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004253}
4254
Ido Schimmel701b1862016-07-04 08:23:16 +02004255static int mlxsw_sp_master_bridge_vlan_link(struct mlxsw_sp *mlxsw_sp,
4256 struct net_device *vlan_dev)
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004257{
Ido Schimmel701b1862016-07-04 08:23:16 +02004258 u16 fid = vlan_dev_vlan_id(vlan_dev);
Ido Schimmeld0ec8752016-06-20 23:04:12 +02004259 struct mlxsw_sp_fid *f;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004260
Ido Schimmel701b1862016-07-04 08:23:16 +02004261 f = mlxsw_sp_fid_find(mlxsw_sp, fid);
4262 if (!f) {
4263 f = mlxsw_sp_fid_create(mlxsw_sp, fid);
4264 if (IS_ERR(f))
4265 return PTR_ERR(f);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004266 }
4267
Ido Schimmel701b1862016-07-04 08:23:16 +02004268 f->ref_count++;
4269
4270 return 0;
4271}
4272
4273static void mlxsw_sp_master_bridge_vlan_unlink(struct mlxsw_sp *mlxsw_sp,
4274 struct net_device *vlan_dev)
4275{
4276 u16 fid = vlan_dev_vlan_id(vlan_dev);
4277 struct mlxsw_sp_fid *f;
4278
4279 f = mlxsw_sp_fid_find(mlxsw_sp, fid);
Ido Schimmel99f44bb2016-07-04 08:23:17 +02004280 if (f && f->r)
4281 mlxsw_sp_rif_bridge_destroy(mlxsw_sp, f->r);
Ido Schimmel701b1862016-07-04 08:23:16 +02004282 if (f && --f->ref_count == 0)
4283 mlxsw_sp_fid_destroy(mlxsw_sp, f);
4284}
4285
4286static int mlxsw_sp_netdevice_bridge_event(struct net_device *br_dev,
4287 unsigned long event, void *ptr)
4288{
4289 struct netdev_notifier_changeupper_info *info;
4290 struct net_device *upper_dev;
4291 struct mlxsw_sp *mlxsw_sp;
4292 int err;
4293
4294 mlxsw_sp = mlxsw_sp_lower_get(br_dev);
4295 if (!mlxsw_sp)
4296 return 0;
4297 if (br_dev != mlxsw_sp->master_bridge.dev)
4298 return 0;
4299
4300 info = ptr;
4301
4302 switch (event) {
4303 case NETDEV_CHANGEUPPER:
4304 upper_dev = info->upper_dev;
4305 if (!is_vlan_dev(upper_dev))
4306 break;
4307 if (info->linking) {
4308 err = mlxsw_sp_master_bridge_vlan_link(mlxsw_sp,
4309 upper_dev);
4310 if (err)
4311 return err;
4312 } else {
4313 mlxsw_sp_master_bridge_vlan_unlink(mlxsw_sp, upper_dev);
4314 }
4315 break;
4316 }
4317
4318 return 0;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004319}
4320
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004321static u16 mlxsw_sp_avail_vfid_get(const struct mlxsw_sp *mlxsw_sp)
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004322{
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004323 return find_first_zero_bit(mlxsw_sp->vfids.mapped,
Ido Schimmel99724c12016-07-04 08:23:14 +02004324 MLXSW_SP_VFID_MAX);
4325}
4326
4327static int mlxsw_sp_vfid_op(struct mlxsw_sp *mlxsw_sp, u16 fid, bool create)
4328{
4329 char sfmr_pl[MLXSW_REG_SFMR_LEN];
4330
4331 mlxsw_reg_sfmr_pack(sfmr_pl, !create, fid, 0);
4332 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sfmr), sfmr_pl);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004333}
4334
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004335static void mlxsw_sp_vport_vfid_leave(struct mlxsw_sp_port *mlxsw_sp_vport);
Ido Schimmel1c800752016-06-20 23:04:20 +02004336
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004337static struct mlxsw_sp_fid *mlxsw_sp_vfid_create(struct mlxsw_sp *mlxsw_sp,
4338 struct net_device *br_dev)
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004339{
4340 struct device *dev = mlxsw_sp->bus_info->dev;
Ido Schimmeld0ec8752016-06-20 23:04:12 +02004341 struct mlxsw_sp_fid *f;
Ido Schimmelc7e920b2016-06-20 23:04:09 +02004342 u16 vfid, fid;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004343 int err;
4344
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004345 vfid = mlxsw_sp_avail_vfid_get(mlxsw_sp);
Ido Schimmelc7e920b2016-06-20 23:04:09 +02004346 if (vfid == MLXSW_SP_VFID_MAX) {
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004347 dev_err(dev, "No available vFIDs\n");
4348 return ERR_PTR(-ERANGE);
4349 }
4350
Ido Schimmelc7e920b2016-06-20 23:04:09 +02004351 fid = mlxsw_sp_vfid_to_fid(vfid);
4352 err = mlxsw_sp_vfid_op(mlxsw_sp, fid, true);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004353 if (err) {
Ido Schimmelc7e920b2016-06-20 23:04:09 +02004354 dev_err(dev, "Failed to create FID=%d\n", fid);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004355 return ERR_PTR(err);
4356 }
4357
Ido Schimmelc7e920b2016-06-20 23:04:09 +02004358 f = kzalloc(sizeof(*f), GFP_KERNEL);
4359 if (!f)
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004360 goto err_allocate_vfid;
4361
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004362 f->leave = mlxsw_sp_vport_vfid_leave;
Ido Schimmeld0ec8752016-06-20 23:04:12 +02004363 f->fid = fid;
4364 f->dev = br_dev;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004365
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004366 list_add(&f->list, &mlxsw_sp->vfids.list);
4367 set_bit(vfid, mlxsw_sp->vfids.mapped);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004368
Ido Schimmelc7e920b2016-06-20 23:04:09 +02004369 return f;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004370
4371err_allocate_vfid:
Ido Schimmelc7e920b2016-06-20 23:04:09 +02004372 mlxsw_sp_vfid_op(mlxsw_sp, fid, false);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004373 return ERR_PTR(-ENOMEM);
4374}
4375
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004376static void mlxsw_sp_vfid_destroy(struct mlxsw_sp *mlxsw_sp,
4377 struct mlxsw_sp_fid *f)
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004378{
Ido Schimmeld0ec8752016-06-20 23:04:12 +02004379 u16 vfid = mlxsw_sp_fid_to_vfid(f->fid);
Ido Schimmel99f44bb2016-07-04 08:23:17 +02004380 u16 fid = f->fid;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004381
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004382 clear_bit(vfid, mlxsw_sp->vfids.mapped);
Ido Schimmeld0ec8752016-06-20 23:04:12 +02004383 list_del(&f->list);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004384
Ido Schimmel99f44bb2016-07-04 08:23:17 +02004385 if (f->r)
4386 mlxsw_sp_rif_bridge_destroy(mlxsw_sp, f->r);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004387
Ido Schimmeld0ec8752016-06-20 23:04:12 +02004388 kfree(f);
Ido Schimmel99f44bb2016-07-04 08:23:17 +02004389
4390 mlxsw_sp_vfid_op(mlxsw_sp, fid, false);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004391}
4392
Ido Schimmel99724c12016-07-04 08:23:14 +02004393static int mlxsw_sp_vport_fid_map(struct mlxsw_sp_port *mlxsw_sp_vport, u16 fid,
4394 bool valid)
4395{
4396 enum mlxsw_reg_svfa_mt mt = MLXSW_REG_SVFA_MT_PORT_VID_TO_FID;
4397 u16 vid = mlxsw_sp_vport_vid_get(mlxsw_sp_vport);
4398
4399 return mlxsw_sp_port_vid_to_fid_set(mlxsw_sp_vport, mt, valid, fid,
4400 vid);
4401}
4402
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004403static int mlxsw_sp_vport_vfid_join(struct mlxsw_sp_port *mlxsw_sp_vport,
4404 struct net_device *br_dev)
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004405{
Ido Schimmel0355b592016-06-20 23:04:13 +02004406 struct mlxsw_sp_fid *f;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004407 int err;
4408
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004409 f = mlxsw_sp_vfid_find(mlxsw_sp_vport->mlxsw_sp, br_dev);
Ido Schimmel0355b592016-06-20 23:04:13 +02004410 if (!f) {
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004411 f = mlxsw_sp_vfid_create(mlxsw_sp_vport->mlxsw_sp, br_dev);
Ido Schimmel0355b592016-06-20 23:04:13 +02004412 if (IS_ERR(f))
4413 return PTR_ERR(f);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004414 }
4415
Ido Schimmel0355b592016-06-20 23:04:13 +02004416 err = mlxsw_sp_vport_flood_set(mlxsw_sp_vport, f->fid, true);
4417 if (err)
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004418 goto err_vport_flood_set;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004419
Ido Schimmel0355b592016-06-20 23:04:13 +02004420 err = mlxsw_sp_vport_fid_map(mlxsw_sp_vport, f->fid, true);
4421 if (err)
4422 goto err_vport_fid_map;
Ido Schimmel6a9863a2016-02-15 13:19:54 +01004423
Ido Schimmel41b996c2016-06-20 23:04:17 +02004424 mlxsw_sp_vport_fid_set(mlxsw_sp_vport, f);
Ido Schimmel0355b592016-06-20 23:04:13 +02004425 f->ref_count++;
Ido Schimmel039c49a2016-01-27 15:20:18 +01004426
Ido Schimmel22305372016-06-20 23:04:21 +02004427 netdev_dbg(mlxsw_sp_vport->dev, "Joined FID=%d\n", f->fid);
4428
Ido Schimmel0355b592016-06-20 23:04:13 +02004429 return 0;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004430
Ido Schimmel9c4d4422016-06-20 23:04:10 +02004431err_vport_fid_map:
Ido Schimmel0355b592016-06-20 23:04:13 +02004432 mlxsw_sp_vport_flood_set(mlxsw_sp_vport, f->fid, false);
4433err_vport_flood_set:
4434 if (!f->ref_count)
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004435 mlxsw_sp_vfid_destroy(mlxsw_sp_vport->mlxsw_sp, f);
Ido Schimmel0355b592016-06-20 23:04:13 +02004436 return err;
4437}
4438
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004439static void mlxsw_sp_vport_vfid_leave(struct mlxsw_sp_port *mlxsw_sp_vport)
Ido Schimmel0355b592016-06-20 23:04:13 +02004440{
Ido Schimmel41b996c2016-06-20 23:04:17 +02004441 struct mlxsw_sp_fid *f = mlxsw_sp_vport_fid_get(mlxsw_sp_vport);
Ido Schimmel0355b592016-06-20 23:04:13 +02004442
Ido Schimmel22305372016-06-20 23:04:21 +02004443 netdev_dbg(mlxsw_sp_vport->dev, "Left FID=%d\n", f->fid);
4444
Ido Schimmel0355b592016-06-20 23:04:13 +02004445 mlxsw_sp_vport_fid_map(mlxsw_sp_vport, f->fid, false);
4446
4447 mlxsw_sp_vport_flood_set(mlxsw_sp_vport, f->fid, false);
4448
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02004449 mlxsw_sp_port_fdb_flush(mlxsw_sp_vport, f->fid);
4450
Ido Schimmel41b996c2016-06-20 23:04:17 +02004451 mlxsw_sp_vport_fid_set(mlxsw_sp_vport, NULL);
Ido Schimmel0355b592016-06-20 23:04:13 +02004452 if (--f->ref_count == 0)
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004453 mlxsw_sp_vfid_destroy(mlxsw_sp_vport->mlxsw_sp, f);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004454}
4455
4456static int mlxsw_sp_vport_bridge_join(struct mlxsw_sp_port *mlxsw_sp_vport,
4457 struct net_device *br_dev)
4458{
Ido Schimmel99724c12016-07-04 08:23:14 +02004459 struct mlxsw_sp_fid *f = mlxsw_sp_vport_fid_get(mlxsw_sp_vport);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004460 u16 vid = mlxsw_sp_vport_vid_get(mlxsw_sp_vport);
4461 struct net_device *dev = mlxsw_sp_vport->dev;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004462 int err;
4463
Ido Schimmel99724c12016-07-04 08:23:14 +02004464 if (f && !WARN_ON(!f->leave))
4465 f->leave(mlxsw_sp_vport);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004466
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004467 err = mlxsw_sp_vport_vfid_join(mlxsw_sp_vport, br_dev);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004468 if (err) {
Ido Schimmel0355b592016-06-20 23:04:13 +02004469 netdev_err(dev, "Failed to join vFID\n");
Ido Schimmel99724c12016-07-04 08:23:14 +02004470 return err;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004471 }
4472
4473 err = mlxsw_sp_port_vid_learning_set(mlxsw_sp_vport, vid, true);
4474 if (err) {
4475 netdev_err(dev, "Failed to enable learning\n");
4476 goto err_port_vid_learning_set;
4477 }
4478
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004479 mlxsw_sp_vport->learning = 1;
4480 mlxsw_sp_vport->learning_sync = 1;
4481 mlxsw_sp_vport->uc_flood = 1;
4482 mlxsw_sp_vport->bridged = 1;
4483
4484 return 0;
4485
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004486err_port_vid_learning_set:
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004487 mlxsw_sp_vport_vfid_leave(mlxsw_sp_vport);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004488 return err;
4489}
4490
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02004491static void mlxsw_sp_vport_bridge_leave(struct mlxsw_sp_port *mlxsw_sp_vport)
Ido Schimmel0355b592016-06-20 23:04:13 +02004492{
4493 u16 vid = mlxsw_sp_vport_vid_get(mlxsw_sp_vport);
Ido Schimmel0355b592016-06-20 23:04:13 +02004494
4495 mlxsw_sp_port_vid_learning_set(mlxsw_sp_vport, vid, false);
4496
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004497 mlxsw_sp_vport_vfid_leave(mlxsw_sp_vport);
Ido Schimmel0355b592016-06-20 23:04:13 +02004498
Ido Schimmel0355b592016-06-20 23:04:13 +02004499 mlxsw_sp_vport->learning = 0;
4500 mlxsw_sp_vport->learning_sync = 0;
4501 mlxsw_sp_vport->uc_flood = 0;
4502 mlxsw_sp_vport->bridged = 0;
4503}
4504
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004505static bool
4506mlxsw_sp_port_master_bridge_check(const struct mlxsw_sp_port *mlxsw_sp_port,
4507 const struct net_device *br_dev)
4508{
4509 struct mlxsw_sp_port *mlxsw_sp_vport;
4510
4511 list_for_each_entry(mlxsw_sp_vport, &mlxsw_sp_port->vports_list,
4512 vport.list) {
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004513 struct net_device *dev = mlxsw_sp_vport_dev_get(mlxsw_sp_vport);
Ido Schimmel56918b62016-06-20 23:04:18 +02004514
4515 if (dev && dev == br_dev)
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004516 return false;
4517 }
4518
4519 return true;
4520}
4521
4522static int mlxsw_sp_netdevice_vport_event(struct net_device *dev,
4523 unsigned long event, void *ptr,
4524 u16 vid)
4525{
4526 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
4527 struct netdev_notifier_changeupper_info *info = ptr;
4528 struct mlxsw_sp_port *mlxsw_sp_vport;
4529 struct net_device *upper_dev;
Ido Schimmel80bedf12016-06-20 23:03:59 +02004530 int err = 0;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004531
4532 mlxsw_sp_vport = mlxsw_sp_port_vport_find(mlxsw_sp_port, vid);
4533
4534 switch (event) {
4535 case NETDEV_PRECHANGEUPPER:
4536 upper_dev = info->upper_dev;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004537 if (!netif_is_bridge_master(upper_dev))
Ido Schimmel80bedf12016-06-20 23:03:59 +02004538 return -EINVAL;
Ido Schimmelddbe9932016-06-20 23:04:02 +02004539 if (!info->linking)
4540 break;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004541 /* We can't have multiple VLAN interfaces configured on
4542 * the same port and being members in the same bridge.
4543 */
4544 if (!mlxsw_sp_port_master_bridge_check(mlxsw_sp_port,
4545 upper_dev))
Ido Schimmel80bedf12016-06-20 23:03:59 +02004546 return -EINVAL;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004547 break;
4548 case NETDEV_CHANGEUPPER:
4549 upper_dev = info->upper_dev;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004550 if (info->linking) {
Ido Schimmel423b9372016-06-20 23:04:03 +02004551 if (WARN_ON(!mlxsw_sp_vport))
Ido Schimmel80bedf12016-06-20 23:03:59 +02004552 return -EINVAL;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004553 err = mlxsw_sp_vport_bridge_join(mlxsw_sp_vport,
4554 upper_dev);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004555 } else {
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004556 if (!mlxsw_sp_vport)
Ido Schimmel80bedf12016-06-20 23:03:59 +02004557 return 0;
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02004558 mlxsw_sp_vport_bridge_leave(mlxsw_sp_vport);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004559 }
4560 }
4561
Ido Schimmel80bedf12016-06-20 23:03:59 +02004562 return err;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004563}
4564
Ido Schimmel272c4472015-12-15 16:03:47 +01004565static int mlxsw_sp_netdevice_lag_vport_event(struct net_device *lag_dev,
4566 unsigned long event, void *ptr,
4567 u16 vid)
4568{
4569 struct net_device *dev;
4570 struct list_head *iter;
4571 int ret;
4572
4573 netdev_for_each_lower_dev(lag_dev, dev, iter) {
4574 if (mlxsw_sp_port_dev_check(dev)) {
4575 ret = mlxsw_sp_netdevice_vport_event(dev, event, ptr,
4576 vid);
Ido Schimmel80bedf12016-06-20 23:03:59 +02004577 if (ret)
Ido Schimmel272c4472015-12-15 16:03:47 +01004578 return ret;
4579 }
4580 }
4581
Ido Schimmel80bedf12016-06-20 23:03:59 +02004582 return 0;
Ido Schimmel272c4472015-12-15 16:03:47 +01004583}
4584
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004585static int mlxsw_sp_netdevice_vlan_event(struct net_device *vlan_dev,
4586 unsigned long event, void *ptr)
4587{
4588 struct net_device *real_dev = vlan_dev_real_dev(vlan_dev);
4589 u16 vid = vlan_dev_vlan_id(vlan_dev);
4590
Ido Schimmel272c4472015-12-15 16:03:47 +01004591 if (mlxsw_sp_port_dev_check(real_dev))
4592 return mlxsw_sp_netdevice_vport_event(real_dev, event, ptr,
4593 vid);
4594 else if (netif_is_lag_master(real_dev))
4595 return mlxsw_sp_netdevice_lag_vport_event(real_dev, event, ptr,
4596 vid);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004597
Ido Schimmel80bedf12016-06-20 23:03:59 +02004598 return 0;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004599}
4600
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004601static int mlxsw_sp_netdevice_event(struct notifier_block *unused,
4602 unsigned long event, void *ptr)
4603{
4604 struct net_device *dev = netdev_notifier_info_to_dev(ptr);
Ido Schimmel80bedf12016-06-20 23:03:59 +02004605 int err = 0;
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004606
Ido Schimmel6e095fd2016-07-04 08:23:13 +02004607 if (event == NETDEV_CHANGEADDR || event == NETDEV_CHANGEMTU)
4608 err = mlxsw_sp_netdevice_router_port_event(dev);
4609 else if (mlxsw_sp_port_dev_check(dev))
Ido Schimmel80bedf12016-06-20 23:03:59 +02004610 err = mlxsw_sp_netdevice_port_event(dev, event, ptr);
4611 else if (netif_is_lag_master(dev))
4612 err = mlxsw_sp_netdevice_lag_event(dev, event, ptr);
Ido Schimmel701b1862016-07-04 08:23:16 +02004613 else if (netif_is_bridge_master(dev))
4614 err = mlxsw_sp_netdevice_bridge_event(dev, event, ptr);
Ido Schimmel80bedf12016-06-20 23:03:59 +02004615 else if (is_vlan_dev(dev))
4616 err = mlxsw_sp_netdevice_vlan_event(dev, event, ptr);
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004617
Ido Schimmel80bedf12016-06-20 23:03:59 +02004618 return notifier_from_errno(err);
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004619}
4620
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004621static struct notifier_block mlxsw_sp_netdevice_nb __read_mostly = {
4622 .notifier_call = mlxsw_sp_netdevice_event,
4623};
4624
Ido Schimmel99724c12016-07-04 08:23:14 +02004625static struct notifier_block mlxsw_sp_inetaddr_nb __read_mostly = {
4626 .notifier_call = mlxsw_sp_inetaddr_event,
4627 .priority = 10, /* Must be called before FIB notifier block */
4628};
4629
Jiri Pirkoe7322632016-09-01 10:37:43 +02004630static struct notifier_block mlxsw_sp_router_netevent_nb __read_mostly = {
4631 .notifier_call = mlxsw_sp_router_netevent_event,
4632};
4633
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004634static int __init mlxsw_sp_module_init(void)
4635{
4636 int err;
4637
4638 register_netdevice_notifier(&mlxsw_sp_netdevice_nb);
Ido Schimmel99724c12016-07-04 08:23:14 +02004639 register_inetaddr_notifier(&mlxsw_sp_inetaddr_nb);
Jiri Pirkoe7322632016-09-01 10:37:43 +02004640 register_netevent_notifier(&mlxsw_sp_router_netevent_nb);
4641
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004642 err = mlxsw_core_driver_register(&mlxsw_sp_driver);
4643 if (err)
4644 goto err_core_driver_register;
4645 return 0;
4646
4647err_core_driver_register:
Jiri Pirkoe7322632016-09-01 10:37:43 +02004648 unregister_netevent_notifier(&mlxsw_sp_router_netevent_nb);
Jiri Pirkode7d6292016-09-01 10:37:42 +02004649 unregister_inetaddr_notifier(&mlxsw_sp_inetaddr_nb);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004650 unregister_netdevice_notifier(&mlxsw_sp_netdevice_nb);
4651 return err;
4652}
4653
4654static void __exit mlxsw_sp_module_exit(void)
4655{
4656 mlxsw_core_driver_unregister(&mlxsw_sp_driver);
Jiri Pirkoe7322632016-09-01 10:37:43 +02004657 unregister_netevent_notifier(&mlxsw_sp_router_netevent_nb);
Ido Schimmel99724c12016-07-04 08:23:14 +02004658 unregister_inetaddr_notifier(&mlxsw_sp_inetaddr_nb);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004659 unregister_netdevice_notifier(&mlxsw_sp_netdevice_nb);
4660}
4661
4662module_init(mlxsw_sp_module_init);
4663module_exit(mlxsw_sp_module_exit);
4664
4665MODULE_LICENSE("Dual BSD/GPL");
4666MODULE_AUTHOR("Jiri Pirko <jiri@mellanox.com>");
4667MODULE_DESCRIPTION("Mellanox Spectrum driver");
4668MODULE_MLXSW_DRIVER_ALIAS(MLXSW_DEVICE_KIND_SPECTRUM);