blob: c7d50eccff9eb8dfacf71b4a04b1cc571ae6fa0d [file] [log] [blame]
Eli Cohend29b7962014-10-02 12:19:43 +03001/*
Saeed Mahameede2816822015-05-28 22:28:40 +03002 * Copyright (c) 2013-2015, Mellanox Technologies, Ltd. All rights reserved.
Eli Cohend29b7962014-10-02 12:19:43 +03003 *
4 * This software is available to you under a choice of one of two
5 * licenses. You may choose to be licensed under the terms of the GNU
6 * General Public License (GPL) Version 2, available from the file
7 * COPYING in the main directory of this source tree, or the
8 * OpenIB.org BSD license below:
9 *
10 * Redistribution and use in source and binary forms, with or
11 * without modification, are permitted provided that the following
12 * conditions are met:
13 *
14 * - Redistributions of source code must retain the above
15 * copyright notice, this list of conditions and the following
16 * disclaimer.
17 *
18 * - Redistributions in binary form must reproduce the above
19 * copyright notice, this list of conditions and the following
20 * disclaimer in the documentation and/or other materials
21 * provided with the distribution.
22 *
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
30 * SOFTWARE.
Saeed Mahameede2816822015-05-28 22:28:40 +030031*/
Eli Cohend29b7962014-10-02 12:19:43 +030032#ifndef MLX5_IFC_H
33#define MLX5_IFC_H
34
Ilan Tayarie29341f2017-03-13 20:05:45 +020035#include "mlx5_ifc_fpga.h"
36
Eli Cohend29b7962014-10-02 12:19:43 +030037enum {
Saeed Mahameede2816822015-05-28 22:28:40 +030038 MLX5_EVENT_TYPE_CODING_COMPLETION_EVENTS = 0x0,
39 MLX5_EVENT_TYPE_CODING_PATH_MIGRATED_SUCCEEDED = 0x1,
40 MLX5_EVENT_TYPE_CODING_COMMUNICATION_ESTABLISHED = 0x2,
41 MLX5_EVENT_TYPE_CODING_SEND_QUEUE_DRAINED = 0x3,
42 MLX5_EVENT_TYPE_CODING_LAST_WQE_REACHED = 0x13,
43 MLX5_EVENT_TYPE_CODING_SRQ_LIMIT = 0x14,
44 MLX5_EVENT_TYPE_CODING_DCT_ALL_CONNECTIONS_CLOSED = 0x1c,
45 MLX5_EVENT_TYPE_CODING_DCT_ACCESS_KEY_VIOLATION = 0x1d,
46 MLX5_EVENT_TYPE_CODING_CQ_ERROR = 0x4,
47 MLX5_EVENT_TYPE_CODING_LOCAL_WQ_CATASTROPHIC_ERROR = 0x5,
48 MLX5_EVENT_TYPE_CODING_PATH_MIGRATION_FAILED = 0x7,
49 MLX5_EVENT_TYPE_CODING_PAGE_FAULT_EVENT = 0xc,
50 MLX5_EVENT_TYPE_CODING_INVALID_REQUEST_LOCAL_WQ_ERROR = 0x10,
51 MLX5_EVENT_TYPE_CODING_LOCAL_ACCESS_VIOLATION_WQ_ERROR = 0x11,
52 MLX5_EVENT_TYPE_CODING_LOCAL_SRQ_CATASTROPHIC_ERROR = 0x12,
53 MLX5_EVENT_TYPE_CODING_INTERNAL_ERROR = 0x8,
54 MLX5_EVENT_TYPE_CODING_PORT_STATE_CHANGE = 0x9,
55 MLX5_EVENT_TYPE_CODING_GPIO_EVENT = 0x15,
56 MLX5_EVENT_TYPE_CODING_REMOTE_CONFIGURATION_PROTOCOL_EVENT = 0x19,
57 MLX5_EVENT_TYPE_CODING_DOORBELL_BLUEFLAME_CONGESTION_EVENT = 0x1a,
58 MLX5_EVENT_TYPE_CODING_STALL_VL_EVENT = 0x1b,
59 MLX5_EVENT_TYPE_CODING_DROPPED_PACKET_LOGGED_EVENT = 0x1f,
60 MLX5_EVENT_TYPE_CODING_COMMAND_INTERFACE_COMPLETION = 0xa,
Ilan Tayarie29341f2017-03-13 20:05:45 +020061 MLX5_EVENT_TYPE_CODING_PAGE_REQUEST = 0xb,
62 MLX5_EVENT_TYPE_CODING_FPGA_ERROR = 0x20,
Saeed Mahameede2816822015-05-28 22:28:40 +030063};
64
65enum {
66 MLX5_MODIFY_TIR_BITMASK_LRO = 0x0,
67 MLX5_MODIFY_TIR_BITMASK_INDIRECT_TABLE = 0x1,
68 MLX5_MODIFY_TIR_BITMASK_HASH = 0x2,
69 MLX5_MODIFY_TIR_BITMASK_TUNNELED_OFFLOAD_EN = 0x3
70};
71
72enum {
Eran Ben Elishaf91e6d82015-12-14 16:34:09 +020073 MLX5_SET_HCA_CAP_OP_MOD_GENERAL_DEVICE = 0x0,
74 MLX5_SET_HCA_CAP_OP_MOD_ATOMIC = 0x3,
75};
76
77enum {
Eli Cohend29b7962014-10-02 12:19:43 +030078 MLX5_CMD_OP_QUERY_HCA_CAP = 0x100,
79 MLX5_CMD_OP_QUERY_ADAPTER = 0x101,
80 MLX5_CMD_OP_INIT_HCA = 0x102,
81 MLX5_CMD_OP_TEARDOWN_HCA = 0x103,
82 MLX5_CMD_OP_ENABLE_HCA = 0x104,
83 MLX5_CMD_OP_DISABLE_HCA = 0x105,
84 MLX5_CMD_OP_QUERY_PAGES = 0x107,
85 MLX5_CMD_OP_MANAGE_PAGES = 0x108,
86 MLX5_CMD_OP_SET_HCA_CAP = 0x109,
Saeed Mahameede2816822015-05-28 22:28:40 +030087 MLX5_CMD_OP_QUERY_ISSI = 0x10a,
88 MLX5_CMD_OP_SET_ISSI = 0x10b,
Saeed Mahameed0dbc6fe2016-11-17 13:45:59 +020089 MLX5_CMD_OP_SET_DRIVER_VERSION = 0x10d,
Eli Cohend29b7962014-10-02 12:19:43 +030090 MLX5_CMD_OP_CREATE_MKEY = 0x200,
91 MLX5_CMD_OP_QUERY_MKEY = 0x201,
92 MLX5_CMD_OP_DESTROY_MKEY = 0x202,
93 MLX5_CMD_OP_QUERY_SPECIAL_CONTEXTS = 0x203,
94 MLX5_CMD_OP_PAGE_FAULT_RESUME = 0x204,
95 MLX5_CMD_OP_CREATE_EQ = 0x301,
96 MLX5_CMD_OP_DESTROY_EQ = 0x302,
97 MLX5_CMD_OP_QUERY_EQ = 0x303,
98 MLX5_CMD_OP_GEN_EQE = 0x304,
99 MLX5_CMD_OP_CREATE_CQ = 0x400,
100 MLX5_CMD_OP_DESTROY_CQ = 0x401,
101 MLX5_CMD_OP_QUERY_CQ = 0x402,
102 MLX5_CMD_OP_MODIFY_CQ = 0x403,
103 MLX5_CMD_OP_CREATE_QP = 0x500,
104 MLX5_CMD_OP_DESTROY_QP = 0x501,
105 MLX5_CMD_OP_RST2INIT_QP = 0x502,
106 MLX5_CMD_OP_INIT2RTR_QP = 0x503,
107 MLX5_CMD_OP_RTR2RTS_QP = 0x504,
108 MLX5_CMD_OP_RTS2RTS_QP = 0x505,
109 MLX5_CMD_OP_SQERR2RTS_QP = 0x506,
110 MLX5_CMD_OP_2ERR_QP = 0x507,
111 MLX5_CMD_OP_2RST_QP = 0x50a,
112 MLX5_CMD_OP_QUERY_QP = 0x50b,
Saeed Mahameede2816822015-05-28 22:28:40 +0300113 MLX5_CMD_OP_SQD_RTS_QP = 0x50c,
Eli Cohend29b7962014-10-02 12:19:43 +0300114 MLX5_CMD_OP_INIT2INIT_QP = 0x50e,
115 MLX5_CMD_OP_CREATE_PSV = 0x600,
116 MLX5_CMD_OP_DESTROY_PSV = 0x601,
117 MLX5_CMD_OP_CREATE_SRQ = 0x700,
118 MLX5_CMD_OP_DESTROY_SRQ = 0x701,
119 MLX5_CMD_OP_QUERY_SRQ = 0x702,
120 MLX5_CMD_OP_ARM_RQ = 0x703,
Saeed Mahameede2816822015-05-28 22:28:40 +0300121 MLX5_CMD_OP_CREATE_XRC_SRQ = 0x705,
122 MLX5_CMD_OP_DESTROY_XRC_SRQ = 0x706,
123 MLX5_CMD_OP_QUERY_XRC_SRQ = 0x707,
124 MLX5_CMD_OP_ARM_XRC_SRQ = 0x708,
Eli Cohend29b7962014-10-02 12:19:43 +0300125 MLX5_CMD_OP_CREATE_DCT = 0x710,
126 MLX5_CMD_OP_DESTROY_DCT = 0x711,
127 MLX5_CMD_OP_DRAIN_DCT = 0x712,
128 MLX5_CMD_OP_QUERY_DCT = 0x713,
129 MLX5_CMD_OP_ARM_DCT_FOR_KEY_VIOLATION = 0x714,
Saeed Mahameed74862162016-06-09 15:11:34 +0300130 MLX5_CMD_OP_CREATE_XRQ = 0x717,
131 MLX5_CMD_OP_DESTROY_XRQ = 0x718,
132 MLX5_CMD_OP_QUERY_XRQ = 0x719,
133 MLX5_CMD_OP_ARM_XRQ = 0x71a,
Eli Cohend29b7962014-10-02 12:19:43 +0300134 MLX5_CMD_OP_QUERY_VPORT_STATE = 0x750,
135 MLX5_CMD_OP_MODIFY_VPORT_STATE = 0x751,
136 MLX5_CMD_OP_QUERY_ESW_VPORT_CONTEXT = 0x752,
137 MLX5_CMD_OP_MODIFY_ESW_VPORT_CONTEXT = 0x753,
138 MLX5_CMD_OP_QUERY_NIC_VPORT_CONTEXT = 0x754,
139 MLX5_CMD_OP_MODIFY_NIC_VPORT_CONTEXT = 0x755,
Saeed Mahameede2816822015-05-28 22:28:40 +0300140 MLX5_CMD_OP_QUERY_ROCE_ADDRESS = 0x760,
Eli Cohend29b7962014-10-02 12:19:43 +0300141 MLX5_CMD_OP_SET_ROCE_ADDRESS = 0x761,
Saeed Mahameede2816822015-05-28 22:28:40 +0300142 MLX5_CMD_OP_QUERY_HCA_VPORT_CONTEXT = 0x762,
143 MLX5_CMD_OP_MODIFY_HCA_VPORT_CONTEXT = 0x763,
144 MLX5_CMD_OP_QUERY_HCA_VPORT_GID = 0x764,
145 MLX5_CMD_OP_QUERY_HCA_VPORT_PKEY = 0x765,
Eli Cohend29b7962014-10-02 12:19:43 +0300146 MLX5_CMD_OP_QUERY_VPORT_COUNTER = 0x770,
147 MLX5_CMD_OP_ALLOC_Q_COUNTER = 0x771,
148 MLX5_CMD_OP_DEALLOC_Q_COUNTER = 0x772,
149 MLX5_CMD_OP_QUERY_Q_COUNTER = 0x773,
Eran Ben Elisha37e92a92017-11-13 10:11:27 +0200150 MLX5_CMD_OP_SET_PP_RATE_LIMIT = 0x780,
Saeed Mahameed74862162016-06-09 15:11:34 +0300151 MLX5_CMD_OP_QUERY_RATE_LIMIT = 0x781,
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +0300152 MLX5_CMD_OP_CREATE_SCHEDULING_ELEMENT = 0x782,
153 MLX5_CMD_OP_DESTROY_SCHEDULING_ELEMENT = 0x783,
154 MLX5_CMD_OP_QUERY_SCHEDULING_ELEMENT = 0x784,
155 MLX5_CMD_OP_MODIFY_SCHEDULING_ELEMENT = 0x785,
156 MLX5_CMD_OP_CREATE_QOS_PARA_VPORT = 0x786,
157 MLX5_CMD_OP_DESTROY_QOS_PARA_VPORT = 0x787,
Eli Cohend29b7962014-10-02 12:19:43 +0300158 MLX5_CMD_OP_ALLOC_PD = 0x800,
159 MLX5_CMD_OP_DEALLOC_PD = 0x801,
160 MLX5_CMD_OP_ALLOC_UAR = 0x802,
161 MLX5_CMD_OP_DEALLOC_UAR = 0x803,
162 MLX5_CMD_OP_CONFIG_INT_MODERATION = 0x804,
163 MLX5_CMD_OP_ACCESS_REG = 0x805,
164 MLX5_CMD_OP_ATTACH_TO_MCG = 0x806,
Saeed Mahameed20bb5662016-07-17 02:01:45 +0300165 MLX5_CMD_OP_DETACH_FROM_MCG = 0x807,
Eli Cohend29b7962014-10-02 12:19:43 +0300166 MLX5_CMD_OP_GET_DROPPED_PACKET_LOG = 0x80a,
167 MLX5_CMD_OP_MAD_IFC = 0x50d,
168 MLX5_CMD_OP_QUERY_MAD_DEMUX = 0x80b,
169 MLX5_CMD_OP_SET_MAD_DEMUX = 0x80c,
170 MLX5_CMD_OP_NOP = 0x80d,
171 MLX5_CMD_OP_ALLOC_XRCD = 0x80e,
172 MLX5_CMD_OP_DEALLOC_XRCD = 0x80f,
Saeed Mahameede2816822015-05-28 22:28:40 +0300173 MLX5_CMD_OP_ALLOC_TRANSPORT_DOMAIN = 0x816,
174 MLX5_CMD_OP_DEALLOC_TRANSPORT_DOMAIN = 0x817,
175 MLX5_CMD_OP_QUERY_CONG_STATUS = 0x822,
176 MLX5_CMD_OP_MODIFY_CONG_STATUS = 0x823,
177 MLX5_CMD_OP_QUERY_CONG_PARAMS = 0x824,
178 MLX5_CMD_OP_MODIFY_CONG_PARAMS = 0x825,
179 MLX5_CMD_OP_QUERY_CONG_STATISTICS = 0x826,
180 MLX5_CMD_OP_ADD_VXLAN_UDP_DPORT = 0x827,
181 MLX5_CMD_OP_DELETE_VXLAN_UDP_DPORT = 0x828,
182 MLX5_CMD_OP_SET_L2_TABLE_ENTRY = 0x829,
183 MLX5_CMD_OP_QUERY_L2_TABLE_ENTRY = 0x82a,
184 MLX5_CMD_OP_DELETE_L2_TABLE_ENTRY = 0x82b,
Tariq Toukan928cfe82016-02-22 18:17:29 +0200185 MLX5_CMD_OP_SET_WOL_ROL = 0x830,
186 MLX5_CMD_OP_QUERY_WOL_ROL = 0x831,
Aviv Heller84df61e2016-05-10 13:47:50 +0300187 MLX5_CMD_OP_CREATE_LAG = 0x840,
188 MLX5_CMD_OP_MODIFY_LAG = 0x841,
189 MLX5_CMD_OP_QUERY_LAG = 0x842,
190 MLX5_CMD_OP_DESTROY_LAG = 0x843,
191 MLX5_CMD_OP_CREATE_VPORT_LAG = 0x844,
192 MLX5_CMD_OP_DESTROY_VPORT_LAG = 0x845,
Eli Cohend29b7962014-10-02 12:19:43 +0300193 MLX5_CMD_OP_CREATE_TIR = 0x900,
194 MLX5_CMD_OP_MODIFY_TIR = 0x901,
195 MLX5_CMD_OP_DESTROY_TIR = 0x902,
196 MLX5_CMD_OP_QUERY_TIR = 0x903,
Eli Cohend29b7962014-10-02 12:19:43 +0300197 MLX5_CMD_OP_CREATE_SQ = 0x904,
198 MLX5_CMD_OP_MODIFY_SQ = 0x905,
199 MLX5_CMD_OP_DESTROY_SQ = 0x906,
200 MLX5_CMD_OP_QUERY_SQ = 0x907,
201 MLX5_CMD_OP_CREATE_RQ = 0x908,
202 MLX5_CMD_OP_MODIFY_RQ = 0x909,
Maor Gottliebc1e0bfc2017-05-30 10:29:11 +0300203 MLX5_CMD_OP_SET_DELAY_DROP_PARAMS = 0x910,
Eli Cohend29b7962014-10-02 12:19:43 +0300204 MLX5_CMD_OP_DESTROY_RQ = 0x90a,
205 MLX5_CMD_OP_QUERY_RQ = 0x90b,
206 MLX5_CMD_OP_CREATE_RMP = 0x90c,
207 MLX5_CMD_OP_MODIFY_RMP = 0x90d,
208 MLX5_CMD_OP_DESTROY_RMP = 0x90e,
209 MLX5_CMD_OP_QUERY_RMP = 0x90f,
Saeed Mahameede2816822015-05-28 22:28:40 +0300210 MLX5_CMD_OP_CREATE_TIS = 0x912,
211 MLX5_CMD_OP_MODIFY_TIS = 0x913,
212 MLX5_CMD_OP_DESTROY_TIS = 0x914,
213 MLX5_CMD_OP_QUERY_TIS = 0x915,
214 MLX5_CMD_OP_CREATE_RQT = 0x916,
215 MLX5_CMD_OP_MODIFY_RQT = 0x917,
216 MLX5_CMD_OP_DESTROY_RQT = 0x918,
217 MLX5_CMD_OP_QUERY_RQT = 0x919,
Maor Gottlieb2cc43b42016-01-11 10:25:59 +0200218 MLX5_CMD_OP_SET_FLOW_TABLE_ROOT = 0x92f,
Saeed Mahameede2816822015-05-28 22:28:40 +0300219 MLX5_CMD_OP_CREATE_FLOW_TABLE = 0x930,
220 MLX5_CMD_OP_DESTROY_FLOW_TABLE = 0x931,
221 MLX5_CMD_OP_QUERY_FLOW_TABLE = 0x932,
222 MLX5_CMD_OP_CREATE_FLOW_GROUP = 0x933,
223 MLX5_CMD_OP_DESTROY_FLOW_GROUP = 0x934,
224 MLX5_CMD_OP_QUERY_FLOW_GROUP = 0x935,
225 MLX5_CMD_OP_SET_FLOW_TABLE_ENTRY = 0x936,
226 MLX5_CMD_OP_QUERY_FLOW_TABLE_ENTRY = 0x937,
Maor Gottlieb34a40e62016-01-11 10:26:00 +0200227 MLX5_CMD_OP_DELETE_FLOW_TABLE_ENTRY = 0x938,
Amir Vadai9dc0b282016-05-13 12:55:39 +0000228 MLX5_CMD_OP_ALLOC_FLOW_COUNTER = 0x939,
229 MLX5_CMD_OP_DEALLOC_FLOW_COUNTER = 0x93a,
230 MLX5_CMD_OP_QUERY_FLOW_COUNTER = 0x93b,
Shahar Klein86d56a12016-06-10 00:07:30 +0300231 MLX5_CMD_OP_MODIFY_FLOW_TABLE = 0x93c,
Hadar Hen Zion7adbde22016-08-03 15:08:33 +0300232 MLX5_CMD_OP_ALLOC_ENCAP_HEADER = 0x93d,
233 MLX5_CMD_OP_DEALLOC_ENCAP_HEADER = 0x93e,
Or Gerlitz2a69cb92017-01-19 19:31:25 +0200234 MLX5_CMD_OP_ALLOC_MODIFY_HEADER_CONTEXT = 0x940,
235 MLX5_CMD_OP_DEALLOC_MODIFY_HEADER_CONTEXT = 0x941,
Ilan Tayari60621182017-03-27 14:52:09 +0300236 MLX5_CMD_OP_FPGA_CREATE_QP = 0x960,
237 MLX5_CMD_OP_FPGA_MODIFY_QP = 0x961,
238 MLX5_CMD_OP_FPGA_QUERY_QP = 0x962,
239 MLX5_CMD_OP_FPGA_DESTROY_QP = 0x963,
240 MLX5_CMD_OP_FPGA_QUERY_QP_COUNTERS = 0x964,
Shahar Klein86d56a12016-06-10 00:07:30 +0300241 MLX5_CMD_OP_MAX
Saeed Mahameede2816822015-05-28 22:28:40 +0300242};
243
244struct mlx5_ifc_flow_table_fields_supported_bits {
245 u8 outer_dmac[0x1];
246 u8 outer_smac[0x1];
247 u8 outer_ether_type[0x1];
Ariel Levkovich19cc7522017-04-03 13:11:03 +0300248 u8 outer_ip_version[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300249 u8 outer_first_prio[0x1];
250 u8 outer_first_cfi[0x1];
251 u8 outer_first_vid[0x1];
Or Gerlitza8ade552017-06-07 17:49:56 +0300252 u8 outer_ipv4_ttl[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300253 u8 outer_second_prio[0x1];
254 u8 outer_second_cfi[0x1];
255 u8 outer_second_vid[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200256 u8 reserved_at_b[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300257 u8 outer_sip[0x1];
258 u8 outer_dip[0x1];
259 u8 outer_frag[0x1];
260 u8 outer_ip_protocol[0x1];
261 u8 outer_ip_ecn[0x1];
262 u8 outer_ip_dscp[0x1];
263 u8 outer_udp_sport[0x1];
264 u8 outer_udp_dport[0x1];
265 u8 outer_tcp_sport[0x1];
266 u8 outer_tcp_dport[0x1];
267 u8 outer_tcp_flags[0x1];
268 u8 outer_gre_protocol[0x1];
269 u8 outer_gre_key[0x1];
270 u8 outer_vxlan_vni[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200271 u8 reserved_at_1a[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +0300272 u8 source_eswitch_port[0x1];
273
274 u8 inner_dmac[0x1];
275 u8 inner_smac[0x1];
276 u8 inner_ether_type[0x1];
Ariel Levkovich19cc7522017-04-03 13:11:03 +0300277 u8 inner_ip_version[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300278 u8 inner_first_prio[0x1];
279 u8 inner_first_cfi[0x1];
280 u8 inner_first_vid[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200281 u8 reserved_at_27[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300282 u8 inner_second_prio[0x1];
283 u8 inner_second_cfi[0x1];
284 u8 inner_second_vid[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200285 u8 reserved_at_2b[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300286 u8 inner_sip[0x1];
287 u8 inner_dip[0x1];
288 u8 inner_frag[0x1];
289 u8 inner_ip_protocol[0x1];
290 u8 inner_ip_ecn[0x1];
291 u8 inner_ip_dscp[0x1];
292 u8 inner_udp_sport[0x1];
293 u8 inner_udp_dport[0x1];
294 u8 inner_tcp_sport[0x1];
295 u8 inner_tcp_dport[0x1];
296 u8 inner_tcp_flags[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200297 u8 reserved_at_37[0x9];
Boris Pismenny3346c482017-08-20 15:13:08 +0300298 u8 reserved_at_40[0x17];
299 u8 outer_esp_spi[0x1];
300 u8 reserved_at_58[0x2];
Yishai Hadasa550ddf2017-08-17 15:52:33 +0300301 u8 bth_dst_qp[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300302
Yishai Hadasa550ddf2017-08-17 15:52:33 +0300303 u8 reserved_at_5b[0x25];
Saeed Mahameede2816822015-05-28 22:28:40 +0300304};
305
306struct mlx5_ifc_flow_table_prop_layout_bits {
307 u8 ft_support[0x1];
Amir Vadai9dc0b282016-05-13 12:55:39 +0000308 u8 reserved_at_1[0x1];
309 u8 flow_counter[0x1];
Maor Gottlieb26a81452015-12-10 17:12:39 +0200310 u8 flow_modify_en[0x1];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +0200311 u8 modify_root[0x1];
Maor Gottlieb34a40e62016-01-11 10:26:00 +0200312 u8 identified_miss_table_mode[0x1];
313 u8 flow_table_modify[0x1];
Hadar Hen Zion7adbde22016-08-03 15:08:33 +0300314 u8 encap[0x1];
315 u8 decap[0x1];
316 u8 reserved_at_9[0x17];
Saeed Mahameede2816822015-05-28 22:28:40 +0300317
Matan Barakb4ff3a32016-02-09 14:57:42 +0200318 u8 reserved_at_20[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +0300319 u8 log_max_ft_size[0x6];
Or Gerlitz2a69cb92017-01-19 19:31:25 +0200320 u8 log_max_modify_header_context[0x8];
321 u8 max_modify_header_actions[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +0300322 u8 max_ft_level[0x8];
323
Matan Barakb4ff3a32016-02-09 14:57:42 +0200324 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +0300325
Matan Barakb4ff3a32016-02-09 14:57:42 +0200326 u8 reserved_at_60[0x18];
Maor Gottlieb26a81452015-12-10 17:12:39 +0200327 u8 log_max_ft_num[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +0300328
Matan Barakb4ff3a32016-02-09 14:57:42 +0200329 u8 reserved_at_80[0x18];
Maor Gottlieb26a81452015-12-10 17:12:39 +0200330 u8 log_max_destination[0x8];
331
Raed Salem16f1c5b2017-07-30 11:02:51 +0300332 u8 log_max_flow_counter[0x8];
333 u8 reserved_at_a8[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +0300334 u8 log_max_flow[0x8];
335
Matan Barakb4ff3a32016-02-09 14:57:42 +0200336 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +0300337
338 struct mlx5_ifc_flow_table_fields_supported_bits ft_field_support;
339
340 struct mlx5_ifc_flow_table_fields_supported_bits ft_field_bitmask_support;
341};
342
343struct mlx5_ifc_odp_per_transport_service_cap_bits {
344 u8 send[0x1];
345 u8 receive[0x1];
346 u8 write[0x1];
347 u8 read[0x1];
Artemy Kovalyov17d2f882017-01-02 11:37:47 +0200348 u8 atomic[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300349 u8 srq_receive[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200350 u8 reserved_at_6[0x1a];
Saeed Mahameede2816822015-05-28 22:28:40 +0300351};
352
Maor Gottliebb4d1f032016-01-11 10:26:05 +0200353struct mlx5_ifc_ipv4_layout_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +0200354 u8 reserved_at_0[0x60];
Maor Gottliebb4d1f032016-01-11 10:26:05 +0200355
356 u8 ipv4[0x20];
357};
358
359struct mlx5_ifc_ipv6_layout_bits {
360 u8 ipv6[16][0x8];
361};
362
363union mlx5_ifc_ipv6_layout_ipv4_layout_auto_bits {
364 struct mlx5_ifc_ipv6_layout_bits ipv6_layout;
365 struct mlx5_ifc_ipv4_layout_bits ipv4_layout;
Matan Barakb4ff3a32016-02-09 14:57:42 +0200366 u8 reserved_at_0[0x80];
Maor Gottliebb4d1f032016-01-11 10:26:05 +0200367};
368
Saeed Mahameede2816822015-05-28 22:28:40 +0300369struct mlx5_ifc_fte_match_set_lyr_2_4_bits {
370 u8 smac_47_16[0x20];
371
372 u8 smac_15_0[0x10];
373 u8 ethertype[0x10];
374
375 u8 dmac_47_16[0x20];
376
377 u8 dmac_15_0[0x10];
378 u8 first_prio[0x3];
379 u8 first_cfi[0x1];
380 u8 first_vid[0xc];
381
382 u8 ip_protocol[0x8];
383 u8 ip_dscp[0x6];
384 u8 ip_ecn[0x2];
Mohamad Haj Yahia10543362016-10-09 16:25:43 +0300385 u8 cvlan_tag[0x1];
386 u8 svlan_tag[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300387 u8 frag[0x1];
Ariel Levkovich19cc7522017-04-03 13:11:03 +0300388 u8 ip_version[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +0300389 u8 tcp_flags[0x9];
390
391 u8 tcp_sport[0x10];
392 u8 tcp_dport[0x10];
393
Or Gerlitza8ade552017-06-07 17:49:56 +0300394 u8 reserved_at_c0[0x18];
395 u8 ttl_hoplimit[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +0300396
397 u8 udp_sport[0x10];
398 u8 udp_dport[0x10];
399
Maor Gottliebb4d1f032016-01-11 10:26:05 +0200400 union mlx5_ifc_ipv6_layout_ipv4_layout_auto_bits src_ipv4_src_ipv6;
Saeed Mahameede2816822015-05-28 22:28:40 +0300401
Maor Gottliebb4d1f032016-01-11 10:26:05 +0200402 union mlx5_ifc_ipv6_layout_ipv4_layout_auto_bits dst_ipv4_dst_ipv6;
Saeed Mahameede2816822015-05-28 22:28:40 +0300403};
404
405struct mlx5_ifc_fte_match_set_misc_bits {
Saeed Mahameed74862162016-06-09 15:11:34 +0300406 u8 reserved_at_0[0x8];
407 u8 source_sqn[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +0300408
Matan Barakb4ff3a32016-02-09 14:57:42 +0200409 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +0300410 u8 source_port[0x10];
411
412 u8 outer_second_prio[0x3];
413 u8 outer_second_cfi[0x1];
414 u8 outer_second_vid[0xc];
415 u8 inner_second_prio[0x3];
416 u8 inner_second_cfi[0x1];
417 u8 inner_second_vid[0xc];
418
Mohamad Haj Yahia10543362016-10-09 16:25:43 +0300419 u8 outer_second_cvlan_tag[0x1];
420 u8 inner_second_cvlan_tag[0x1];
421 u8 outer_second_svlan_tag[0x1];
422 u8 inner_second_svlan_tag[0x1];
423 u8 reserved_at_64[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +0300424 u8 gre_protocol[0x10];
425
426 u8 gre_key_h[0x18];
427 u8 gre_key_l[0x8];
428
429 u8 vxlan_vni[0x18];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200430 u8 reserved_at_b8[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +0300431
Matan Barakb4ff3a32016-02-09 14:57:42 +0200432 u8 reserved_at_c0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +0300433
Matan Barakb4ff3a32016-02-09 14:57:42 +0200434 u8 reserved_at_e0[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +0300435 u8 outer_ipv6_flow_label[0x14];
436
Matan Barakb4ff3a32016-02-09 14:57:42 +0200437 u8 reserved_at_100[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +0300438 u8 inner_ipv6_flow_label[0x14];
439
Yishai Hadasa550ddf2017-08-17 15:52:33 +0300440 u8 reserved_at_120[0x28];
441 u8 bth_dst_qp[0x18];
Boris Pismenny3346c482017-08-20 15:13:08 +0300442 u8 reserved_at_160[0x20];
443 u8 outer_esp_spi[0x20];
444 u8 reserved_at_1a0[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +0300445};
446
447struct mlx5_ifc_cmd_pas_bits {
448 u8 pa_h[0x20];
449
450 u8 pa_l[0x14];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200451 u8 reserved_at_34[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +0300452};
453
454struct mlx5_ifc_uint64_bits {
455 u8 hi[0x20];
456
457 u8 lo[0x20];
458};
459
460enum {
461 MLX5_ADS_STAT_RATE_NO_LIMIT = 0x0,
462 MLX5_ADS_STAT_RATE_2_5GBPS = 0x7,
463 MLX5_ADS_STAT_RATE_10GBPS = 0x8,
464 MLX5_ADS_STAT_RATE_30GBPS = 0x9,
465 MLX5_ADS_STAT_RATE_5GBPS = 0xa,
466 MLX5_ADS_STAT_RATE_20GBPS = 0xb,
467 MLX5_ADS_STAT_RATE_40GBPS = 0xc,
468 MLX5_ADS_STAT_RATE_60GBPS = 0xd,
469 MLX5_ADS_STAT_RATE_80GBPS = 0xe,
470 MLX5_ADS_STAT_RATE_120GBPS = 0xf,
471};
472
473struct mlx5_ifc_ads_bits {
474 u8 fl[0x1];
475 u8 free_ar[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200476 u8 reserved_at_2[0xe];
Saeed Mahameede2816822015-05-28 22:28:40 +0300477 u8 pkey_index[0x10];
478
Matan Barakb4ff3a32016-02-09 14:57:42 +0200479 u8 reserved_at_20[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +0300480 u8 grh[0x1];
481 u8 mlid[0x7];
482 u8 rlid[0x10];
483
484 u8 ack_timeout[0x5];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200485 u8 reserved_at_45[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +0300486 u8 src_addr_index[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200487 u8 reserved_at_50[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +0300488 u8 stat_rate[0x4];
489 u8 hop_limit[0x8];
490
Matan Barakb4ff3a32016-02-09 14:57:42 +0200491 u8 reserved_at_60[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +0300492 u8 tclass[0x8];
493 u8 flow_label[0x14];
494
495 u8 rgid_rip[16][0x8];
496
Matan Barakb4ff3a32016-02-09 14:57:42 +0200497 u8 reserved_at_100[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +0300498 u8 f_dscp[0x1];
499 u8 f_ecn[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200500 u8 reserved_at_106[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300501 u8 f_eth_prio[0x1];
502 u8 ecn[0x2];
503 u8 dscp[0x6];
504 u8 udp_sport[0x10];
505
506 u8 dei_cfi[0x1];
507 u8 eth_prio[0x3];
508 u8 sl[0x4];
Daniel Jurgens32f69e42018-01-04 17:25:36 +0200509 u8 vhca_port_num[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +0300510 u8 rmac_47_32[0x10];
511
512 u8 rmac_31_0[0x20];
513};
514
515struct mlx5_ifc_flow_table_nic_cap_bits {
Maor Gottliebb3638e12016-03-07 18:51:46 +0200516 u8 nic_rx_multi_path_tirs[0x1];
Maor Gottliebcea824d2016-05-31 14:09:09 +0300517 u8 nic_rx_multi_path_tirs_fts[0x1];
518 u8 allow_sniffer_and_nic_rx_shared_tir[0x1];
519 u8 reserved_at_3[0x1fd];
Saeed Mahameede2816822015-05-28 22:28:40 +0300520
521 struct mlx5_ifc_flow_table_prop_layout_bits flow_table_properties_nic_receive;
522
Matan Barakb4ff3a32016-02-09 14:57:42 +0200523 u8 reserved_at_400[0x200];
Saeed Mahameede2816822015-05-28 22:28:40 +0300524
525 struct mlx5_ifc_flow_table_prop_layout_bits flow_table_properties_nic_receive_sniffer;
526
527 struct mlx5_ifc_flow_table_prop_layout_bits flow_table_properties_nic_transmit;
528
Matan Barakb4ff3a32016-02-09 14:57:42 +0200529 u8 reserved_at_a00[0x200];
Saeed Mahameede2816822015-05-28 22:28:40 +0300530
531 struct mlx5_ifc_flow_table_prop_layout_bits flow_table_properties_nic_transmit_sniffer;
532
Matan Barakb4ff3a32016-02-09 14:57:42 +0200533 u8 reserved_at_e00[0x7200];
Saeed Mahameede2816822015-05-28 22:28:40 +0300534};
535
Saeed Mahameed495716b2015-12-01 18:03:19 +0200536struct mlx5_ifc_flow_table_eswitch_cap_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +0200537 u8 reserved_at_0[0x200];
Saeed Mahameed495716b2015-12-01 18:03:19 +0200538
539 struct mlx5_ifc_flow_table_prop_layout_bits flow_table_properties_nic_esw_fdb;
540
541 struct mlx5_ifc_flow_table_prop_layout_bits flow_table_properties_esw_acl_ingress;
542
543 struct mlx5_ifc_flow_table_prop_layout_bits flow_table_properties_esw_acl_egress;
544
Matan Barakb4ff3a32016-02-09 14:57:42 +0200545 u8 reserved_at_800[0x7800];
Saeed Mahameed495716b2015-12-01 18:03:19 +0200546};
547
Saeed Mahameedd6666752015-12-01 18:03:22 +0200548struct mlx5_ifc_e_switch_cap_bits {
549 u8 vport_svlan_strip[0x1];
550 u8 vport_cvlan_strip[0x1];
551 u8 vport_svlan_insert[0x1];
552 u8 vport_cvlan_insert_if_not_exist[0x1];
553 u8 vport_cvlan_insert_overwrite[0x1];
Noa Osherovich23898c72016-06-10 00:07:37 +0300554 u8 reserved_at_5[0x19];
555 u8 nic_vport_node_guid_modify[0x1];
556 u8 nic_vport_port_guid_modify[0x1];
Saeed Mahameedd6666752015-12-01 18:03:22 +0200557
Hadar Hen Zion7adbde22016-08-03 15:08:33 +0300558 u8 vxlan_encap_decap[0x1];
559 u8 nvgre_encap_decap[0x1];
560 u8 reserved_at_22[0x9];
561 u8 log_max_encap_headers[0x5];
562 u8 reserved_2b[0x6];
563 u8 max_encap_header_size[0xa];
564
565 u8 reserved_40[0x7c0];
566
Saeed Mahameedd6666752015-12-01 18:03:22 +0200567};
568
Saeed Mahameed74862162016-06-09 15:11:34 +0300569struct mlx5_ifc_qos_cap_bits {
570 u8 packet_pacing[0x1];
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +0300571 u8 esw_scheduling[0x1];
Mohamad Haj Yahiac9497c92016-12-15 14:02:53 +0200572 u8 esw_bw_share[0x1];
573 u8 esw_rate_limit[0x1];
574 u8 reserved_at_4[0x1c];
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +0300575
576 u8 reserved_at_20[0x20];
577
Saeed Mahameed74862162016-06-09 15:11:34 +0300578 u8 packet_pacing_max_rate[0x20];
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +0300579
Saeed Mahameed74862162016-06-09 15:11:34 +0300580 u8 packet_pacing_min_rate[0x20];
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +0300581
582 u8 reserved_at_80[0x10];
Saeed Mahameed74862162016-06-09 15:11:34 +0300583 u8 packet_pacing_rate_table_size[0x10];
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +0300584
585 u8 esw_element_type[0x10];
586 u8 esw_tsar_type[0x10];
587
588 u8 reserved_at_c0[0x10];
589 u8 max_qos_para_vport[0x10];
590
591 u8 max_tsar_bw_share[0x20];
592
593 u8 reserved_at_100[0x700];
Saeed Mahameed74862162016-06-09 15:11:34 +0300594};
595
Inbar Karmy2fcb12d2017-08-17 16:39:47 +0300596struct mlx5_ifc_debug_cap_bits {
597 u8 reserved_at_0[0x20];
598
599 u8 reserved_at_20[0x2];
600 u8 stall_detect[0x1];
601 u8 reserved_at_23[0x1d];
602
603 u8 reserved_at_40[0x7c0];
604};
605
Saeed Mahameede2816822015-05-28 22:28:40 +0300606struct mlx5_ifc_per_protocol_networking_offload_caps_bits {
607 u8 csum_cap[0x1];
608 u8 vlan_cap[0x1];
609 u8 lro_cap[0x1];
610 u8 lro_psh_flag[0x1];
611 u8 lro_time_stamp[0x1];
Saeed Mahameed2b31f7a2016-11-28 18:04:50 +0200612 u8 reserved_at_5[0x2];
613 u8 wqe_vlan_insert[0x1];
Tariq Toukan66189962015-11-12 19:35:26 +0200614 u8 self_lb_en_modifiable[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200615 u8 reserved_at_9[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +0300616 u8 max_lso_cap[0x5];
Leon Romanovskyc226dc22016-10-31 12:15:20 +0200617 u8 multi_pkt_send_wqe[0x2];
Hadar Hen Zioncff92d72016-07-24 16:12:40 +0300618 u8 wqe_inline_mode[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +0300619 u8 rss_ind_tbl_cap[0x4];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +0300620 u8 reg_umr_sq[0x1];
621 u8 scatter_fcs[0x1];
Bodong Wang050da902017-08-17 15:52:35 +0300622 u8 enhanced_multi_pkt_send_wqe[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300623 u8 tunnel_lso_const_out_ip_id[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200624 u8 reserved_at_1c[0x2];
Gal Pressman27299842017-08-13 13:34:42 +0300625 u8 tunnel_stateless_gre[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300626 u8 tunnel_stateless_vxlan[0x1];
627
Ilan Tayari547eede2017-04-18 16:04:28 +0300628 u8 swp[0x1];
629 u8 swp_csum[0x1];
630 u8 swp_lso[0x1];
Maor Gottlieb4d350f12017-10-19 08:25:54 +0300631 u8 reserved_at_23[0x1b];
632 u8 max_geneve_opt_len[0x1];
633 u8 tunnel_stateless_geneve_rx[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300634
Matan Barakb4ff3a32016-02-09 14:57:42 +0200635 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +0300636 u8 lro_min_mss_size[0x10];
637
Matan Barakb4ff3a32016-02-09 14:57:42 +0200638 u8 reserved_at_60[0x120];
Saeed Mahameede2816822015-05-28 22:28:40 +0300639
640 u8 lro_timer_supported_periods[4][0x20];
641
Matan Barakb4ff3a32016-02-09 14:57:42 +0200642 u8 reserved_at_200[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +0300643};
644
645struct mlx5_ifc_roce_cap_bits {
646 u8 roce_apm[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200647 u8 reserved_at_1[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +0300648
Matan Barakb4ff3a32016-02-09 14:57:42 +0200649 u8 reserved_at_20[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +0300650
Matan Barakb4ff3a32016-02-09 14:57:42 +0200651 u8 reserved_at_80[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +0300652 u8 l3_type[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200653 u8 reserved_at_90[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +0300654 u8 roce_version[0x8];
655
Matan Barakb4ff3a32016-02-09 14:57:42 +0200656 u8 reserved_at_a0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +0300657 u8 r_roce_dest_udp_port[0x10];
658
659 u8 r_roce_max_src_udp_port[0x10];
660 u8 r_roce_min_src_udp_port[0x10];
661
Matan Barakb4ff3a32016-02-09 14:57:42 +0200662 u8 reserved_at_e0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +0300663 u8 roce_address_table_size[0x10];
664
Matan Barakb4ff3a32016-02-09 14:57:42 +0200665 u8 reserved_at_100[0x700];
Saeed Mahameede2816822015-05-28 22:28:40 +0300666};
667
668enum {
669 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_1_BYTE = 0x0,
670 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_2_BYTES = 0x2,
671 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_4_BYTES = 0x4,
672 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_8_BYTES = 0x8,
673 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_16_BYTES = 0x10,
674 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_32_BYTES = 0x20,
675 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_64_BYTES = 0x40,
676 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_128_BYTES = 0x80,
677 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_256_BYTES = 0x100,
678};
679
680enum {
681 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_1_BYTE = 0x1,
682 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_2_BYTES = 0x2,
683 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_4_BYTES = 0x4,
684 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_8_BYTES = 0x8,
685 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_16_BYTES = 0x10,
686 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_32_BYTES = 0x20,
687 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_64_BYTES = 0x40,
688 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_128_BYTES = 0x80,
689 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_256_BYTES = 0x100,
690};
691
692struct mlx5_ifc_atomic_caps_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +0200693 u8 reserved_at_0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +0300694
Or Gerlitzbd108382017-05-28 15:24:17 +0300695 u8 atomic_req_8B_endianness_mode[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200696 u8 reserved_at_42[0x4];
Or Gerlitzbd108382017-05-28 15:24:17 +0300697 u8 supported_atomic_req_8B_endianness_mode_1[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300698
Matan Barakb4ff3a32016-02-09 14:57:42 +0200699 u8 reserved_at_47[0x19];
Saeed Mahameede2816822015-05-28 22:28:40 +0300700
Matan Barakb4ff3a32016-02-09 14:57:42 +0200701 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +0300702
Matan Barakb4ff3a32016-02-09 14:57:42 +0200703 u8 reserved_at_80[0x10];
Eran Ben Elishaf91e6d82015-12-14 16:34:09 +0200704 u8 atomic_operations[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +0300705
Matan Barakb4ff3a32016-02-09 14:57:42 +0200706 u8 reserved_at_a0[0x10];
Eran Ben Elishaf91e6d82015-12-14 16:34:09 +0200707 u8 atomic_size_qp[0x10];
708
Matan Barakb4ff3a32016-02-09 14:57:42 +0200709 u8 reserved_at_c0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +0300710 u8 atomic_size_dc[0x10];
711
Matan Barakb4ff3a32016-02-09 14:57:42 +0200712 u8 reserved_at_e0[0x720];
Saeed Mahameede2816822015-05-28 22:28:40 +0300713};
714
715struct mlx5_ifc_odp_cap_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +0200716 u8 reserved_at_0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +0300717
718 u8 sig[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200719 u8 reserved_at_41[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +0300720
Matan Barakb4ff3a32016-02-09 14:57:42 +0200721 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +0300722
723 struct mlx5_ifc_odp_per_transport_service_cap_bits rc_odp_caps;
724
725 struct mlx5_ifc_odp_per_transport_service_cap_bits uc_odp_caps;
726
727 struct mlx5_ifc_odp_per_transport_service_cap_bits ud_odp_caps;
728
Matan Barakb4ff3a32016-02-09 14:57:42 +0200729 u8 reserved_at_e0[0x720];
Saeed Mahameede2816822015-05-28 22:28:40 +0300730};
731
Sagi Grimberg3f0393a2016-02-23 10:25:23 +0200732struct mlx5_ifc_calc_op {
733 u8 reserved_at_0[0x10];
734 u8 reserved_at_10[0x9];
735 u8 op_swap_endianness[0x1];
736 u8 op_min[0x1];
737 u8 op_xor[0x1];
738 u8 op_or[0x1];
739 u8 op_and[0x1];
740 u8 op_max[0x1];
741 u8 op_add[0x1];
742};
743
744struct mlx5_ifc_vector_calc_cap_bits {
745 u8 calc_matrix[0x1];
746 u8 reserved_at_1[0x1f];
747 u8 reserved_at_20[0x8];
748 u8 max_vec_count[0x8];
749 u8 reserved_at_30[0xd];
750 u8 max_chunk_size[0x3];
751 struct mlx5_ifc_calc_op calc0;
752 struct mlx5_ifc_calc_op calc1;
753 struct mlx5_ifc_calc_op calc2;
754 struct mlx5_ifc_calc_op calc3;
755
756 u8 reserved_at_e0[0x720];
757};
758
Saeed Mahameede2816822015-05-28 22:28:40 +0300759enum {
760 MLX5_WQ_TYPE_LINKED_LIST = 0x0,
761 MLX5_WQ_TYPE_CYCLIC = 0x1,
Saeed Mahameed7d5e1422016-04-11 23:10:22 +0300762 MLX5_WQ_TYPE_LINKED_LIST_STRIDING_RQ = 0x2,
Noa Osherovichccc87082017-10-17 18:01:13 +0300763 MLX5_WQ_TYPE_CYCLIC_STRIDING_RQ = 0x3,
Saeed Mahameede2816822015-05-28 22:28:40 +0300764};
765
766enum {
767 MLX5_WQ_END_PAD_MODE_NONE = 0x0,
768 MLX5_WQ_END_PAD_MODE_ALIGN = 0x1,
769};
770
771enum {
772 MLX5_CMD_HCA_CAP_GID_TABLE_SIZE_8_GID_ENTRIES = 0x0,
773 MLX5_CMD_HCA_CAP_GID_TABLE_SIZE_16_GID_ENTRIES = 0x1,
774 MLX5_CMD_HCA_CAP_GID_TABLE_SIZE_32_GID_ENTRIES = 0x2,
775 MLX5_CMD_HCA_CAP_GID_TABLE_SIZE_64_GID_ENTRIES = 0x3,
776 MLX5_CMD_HCA_CAP_GID_TABLE_SIZE_128_GID_ENTRIES = 0x4,
777};
778
779enum {
780 MLX5_CMD_HCA_CAP_PKEY_TABLE_SIZE_128_ENTRIES = 0x0,
781 MLX5_CMD_HCA_CAP_PKEY_TABLE_SIZE_256_ENTRIES = 0x1,
782 MLX5_CMD_HCA_CAP_PKEY_TABLE_SIZE_512_ENTRIES = 0x2,
783 MLX5_CMD_HCA_CAP_PKEY_TABLE_SIZE_1K_ENTRIES = 0x3,
784 MLX5_CMD_HCA_CAP_PKEY_TABLE_SIZE_2K_ENTRIES = 0x4,
785 MLX5_CMD_HCA_CAP_PKEY_TABLE_SIZE_4K_ENTRIES = 0x5,
786};
787
788enum {
789 MLX5_CMD_HCA_CAP_PORT_TYPE_IB = 0x0,
790 MLX5_CMD_HCA_CAP_PORT_TYPE_ETHERNET = 0x1,
791};
792
793enum {
794 MLX5_CMD_HCA_CAP_CMDIF_CHECKSUM_DISABLED = 0x0,
795 MLX5_CMD_HCA_CAP_CMDIF_CHECKSUM_INITIAL_STATE = 0x1,
796 MLX5_CMD_HCA_CAP_CMDIF_CHECKSUM_ENABLED = 0x3,
797};
798
799enum {
800 MLX5_CAP_PORT_TYPE_IB = 0x0,
801 MLX5_CAP_PORT_TYPE_ETH = 0x1,
Eli Cohend29b7962014-10-02 12:19:43 +0300802};
803
Max Gurtovoy1410a902017-05-28 10:53:10 +0300804enum {
805 MLX5_CAP_UMR_FENCE_STRONG = 0x0,
806 MLX5_CAP_UMR_FENCE_SMALL = 0x1,
807 MLX5_CAP_UMR_FENCE_NONE = 0x2,
808};
809
Eli Cohenb7755162014-10-02 12:19:44 +0300810struct mlx5_ifc_cmd_hca_cap_bits {
Daniel Jurgens32f69e42018-01-04 17:25:36 +0200811 u8 reserved_at_0[0x30];
812 u8 vhca_id[0x10];
813
814 u8 reserved_at_40[0x40];
Eli Cohenb7755162014-10-02 12:19:44 +0300815
816 u8 log_max_srq_sz[0x8];
817 u8 log_max_qp_sz[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200818 u8 reserved_at_90[0xb];
Eli Cohenb7755162014-10-02 12:19:44 +0300819 u8 log_max_qp[0x5];
820
Matan Barakb4ff3a32016-02-09 14:57:42 +0200821 u8 reserved_at_a0[0xb];
Saeed Mahameede2816822015-05-28 22:28:40 +0300822 u8 log_max_srq[0x5];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200823 u8 reserved_at_b0[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +0300824
Matan Barakb4ff3a32016-02-09 14:57:42 +0200825 u8 reserved_at_c0[0x8];
Eli Cohenb7755162014-10-02 12:19:44 +0300826 u8 log_max_cq_sz[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200827 u8 reserved_at_d0[0xb];
Eli Cohenb7755162014-10-02 12:19:44 +0300828 u8 log_max_cq[0x5];
829
830 u8 log_max_eq_sz[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200831 u8 reserved_at_e8[0x2];
Eli Cohenb7755162014-10-02 12:19:44 +0300832 u8 log_max_mkey[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200833 u8 reserved_at_f0[0xc];
Eli Cohenb7755162014-10-02 12:19:44 +0300834 u8 log_max_eq[0x4];
835
836 u8 max_indirection[0x8];
Artemy Kovalyovbcda1ac2017-01-02 11:37:41 +0200837 u8 fixed_buffer_size[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300838 u8 log_max_mrw_sz[0x7];
Majd Dibbiny8812c242017-02-09 14:20:12 +0200839 u8 force_teardown[0x1];
840 u8 reserved_at_111[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300841 u8 log_max_bsf_list_size[0x6];
Artemy Kovalyovbcda1ac2017-01-02 11:37:41 +0200842 u8 umr_extended_translation_offset[0x1];
843 u8 null_mkey[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300844 u8 log_max_klm_list_size[0x6];
845
Matan Barakb4ff3a32016-02-09 14:57:42 +0200846 u8 reserved_at_120[0xa];
Eli Cohenb7755162014-10-02 12:19:44 +0300847 u8 log_max_ra_req_dc[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200848 u8 reserved_at_130[0xa];
Eli Cohenb7755162014-10-02 12:19:44 +0300849 u8 log_max_ra_res_dc[0x6];
850
Matan Barakb4ff3a32016-02-09 14:57:42 +0200851 u8 reserved_at_140[0xa];
Eli Cohenb7755162014-10-02 12:19:44 +0300852 u8 log_max_ra_req_qp[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200853 u8 reserved_at_150[0xa];
Eli Cohenb7755162014-10-02 12:19:44 +0300854 u8 log_max_ra_res_qp[0x6];
855
Daniel Jurgensf32f5bd2015-11-19 17:12:26 +0200856 u8 end_pad[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300857 u8 cc_query_allowed[0x1];
858 u8 cc_modify_allowed[0x1];
Daniel Jurgensf32f5bd2015-11-19 17:12:26 +0200859 u8 start_pad[0x1];
860 u8 cache_line_128byte[0x1];
Huy Nguyenc02762e2017-07-18 16:03:17 -0500861 u8 reserved_at_165[0xa];
862 u8 qcam_reg[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300863 u8 gid_table_size[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +0300864
Saeed Mahameede2816822015-05-28 22:28:40 +0300865 u8 out_of_seq_cnt[0x1];
866 u8 vport_counters[0x1];
Saeed Mahameed74862162016-06-09 15:11:34 +0300867 u8 retransmission_q_counters[0x1];
Inbar Karmy2fcb12d2017-08-17 16:39:47 +0300868 u8 debug[0x1];
Alex Vesker83b502a2016-08-04 17:32:02 +0300869 u8 modify_rq_counter_set_id[0x1];
Maor Gottliebc1e0bfc2017-05-30 10:29:11 +0300870 u8 rq_delay_drop[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300871 u8 max_qp_cnt[0xa];
872 u8 pkey_table_size[0x10];
873
Saeed Mahameede2816822015-05-28 22:28:40 +0300874 u8 vport_group_manager[0x1];
875 u8 vhca_group_manager[0x1];
876 u8 ib_virt[0x1];
877 u8 eth_virt[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200878 u8 reserved_at_1a4[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300879 u8 ets[0x1];
880 u8 nic_flow_table[0x1];
Saeed Mahameed54f0a412015-12-01 18:03:10 +0200881 u8 eswitch_flow_table[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300882 u8 early_vf_enable[0x1];
Gal Pressmancfdcbcea2016-12-08 15:52:00 +0200883 u8 mcam_reg[0x1];
884 u8 pcam_reg[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300885 u8 local_ca_ack_delay[0x5];
Huy Nguyen4ce3bf22016-11-17 13:45:56 +0200886 u8 port_module_event[0x1];
Parav Pandit58dcb602017-06-19 07:19:37 +0300887 u8 enhanced_error_q_counters[0x1];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +0300888 u8 ports_check[0x1];
Max Gurtovoy7b135582017-01-02 11:37:38 +0200889 u8 reserved_at_1b3[0x1];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +0300890 u8 disable_link_up[0x1];
891 u8 beacon_led[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300892 u8 port_type[0x2];
Eli Cohenb7755162014-10-02 12:19:44 +0300893 u8 num_ports[0x8];
894
Eugenia Emantayevf9a1ef72016-10-10 16:05:53 +0300895 u8 reserved_at_1c0[0x1];
896 u8 pps[0x1];
897 u8 pps_modify[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300898 u8 log_max_msg[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300899 u8 reserved_at_1c8[0x4];
Saeed Mahameed4f3961e2016-02-22 18:17:25 +0200900 u8 max_tc[0x4];
Saeed Mahameed74862162016-06-09 15:11:34 +0300901 u8 reserved_at_1d0[0x1];
902 u8 dcbx[0x1];
Maor Gottlieb246ac982017-05-30 10:29:12 +0300903 u8 general_notification_event[0x1];
904 u8 reserved_at_1d3[0x2];
Ilan Tayarie29341f2017-03-13 20:05:45 +0200905 u8 fpga[0x1];
Tariq Toukan928cfe82016-02-22 18:17:29 +0200906 u8 rol_s[0x1];
907 u8 rol_g[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300908 u8 reserved_at_1d8[0x1];
Tariq Toukan928cfe82016-02-22 18:17:29 +0200909 u8 wol_s[0x1];
910 u8 wol_g[0x1];
911 u8 wol_a[0x1];
912 u8 wol_b[0x1];
913 u8 wol_m[0x1];
914 u8 wol_u[0x1];
915 u8 wol_p[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300916
917 u8 stat_rate_support[0x10];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300918 u8 reserved_at_1f0[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +0300919 u8 cqe_version[0x4];
Eli Cohenb7755162014-10-02 12:19:44 +0300920
Saeed Mahameede2816822015-05-28 22:28:40 +0300921 u8 compact_address_vector[0x1];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +0300922 u8 striding_rq[0x1];
Erez Shitrit500a3d02017-04-13 06:36:51 +0300923 u8 reserved_at_202[0x1];
924 u8 ipoib_enhanced_offloads[0x1];
Erez Shitrit1015c2e2016-02-21 16:27:16 +0200925 u8 ipoib_basic_offloads[0x1];
Max Gurtovoy1410a902017-05-28 10:53:10 +0300926 u8 reserved_at_205[0x5];
927 u8 umr_fence[0x2];
928 u8 reserved_at_20c[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +0300929 u8 drain_sigerr[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300930 u8 cmdif_checksum[0x2];
931 u8 sigerr_cqe[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300932 u8 reserved_at_213[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300933 u8 wq_signature[0x1];
934 u8 sctr_data_cqe[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300935 u8 reserved_at_216[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300936 u8 sho[0x1];
937 u8 tph[0x1];
938 u8 rf[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300939 u8 dct[0x1];
Saeed Mahameed74862162016-06-09 15:11:34 +0300940 u8 qos[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300941 u8 eth_net_offloads[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300942 u8 roce[0x1];
943 u8 atomic[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300944 u8 reserved_at_21f[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300945
946 u8 cq_oi[0x1];
947 u8 cq_resize[0x1];
948 u8 cq_moderation[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300949 u8 reserved_at_223[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +0300950 u8 cq_eq_remap[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300951 u8 pg[0x1];
952 u8 block_lb_mc[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300953 u8 reserved_at_229[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300954 u8 scqe_break_moderation[0x1];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +0300955 u8 cq_period_start_from_cqe[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300956 u8 cd[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300957 u8 reserved_at_22d[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300958 u8 apm[0x1];
Sagi Grimberg3f0393a2016-02-23 10:25:23 +0200959 u8 vector_calc[0x1];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +0300960 u8 umr_ptr_rlky[0x1];
Matan Barakd2370e02016-02-29 18:05:30 +0200961 u8 imaicl[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300962 u8 reserved_at_232[0x4];
Eli Cohenb7755162014-10-02 12:19:44 +0300963 u8 qkv[0x1];
964 u8 pkv[0x1];
Haggai Eranb11a4f92016-02-29 15:45:03 +0200965 u8 set_deth_sqpn[0x1];
966 u8 reserved_at_239[0x3];
Eli Cohenb7755162014-10-02 12:19:44 +0300967 u8 xrc[0x1];
968 u8 ud[0x1];
969 u8 uc[0x1];
970 u8 rc[0x1];
971
Eli Cohena6d51b62017-01-03 23:55:23 +0200972 u8 uar_4k[0x1];
973 u8 reserved_at_241[0x9];
Eli Cohenb7755162014-10-02 12:19:44 +0300974 u8 uar_sz[0x6];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300975 u8 reserved_at_250[0x8];
Eli Cohenb7755162014-10-02 12:19:44 +0300976 u8 log_pg_sz[0x8];
977
978 u8 bf[0x1];
Saeed Mahameed0dbc6fe2016-11-17 13:45:59 +0200979 u8 driver_version[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300980 u8 pad_tx_eth_packet[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300981 u8 reserved_at_263[0x8];
Eli Cohenb7755162014-10-02 12:19:44 +0300982 u8 log_bf_reg_size[0x5];
Aviv Heller84df61e2016-05-10 13:47:50 +0300983
984 u8 reserved_at_270[0xb];
985 u8 lag_master[0x1];
986 u8 num_lag_ports[0x4];
Eli Cohenb7755162014-10-02 12:19:44 +0300987
Tariq Toukane1c9c622016-04-11 23:10:21 +0300988 u8 reserved_at_280[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +0300989 u8 max_wqe_sz_sq[0x10];
990
Tariq Toukane1c9c622016-04-11 23:10:21 +0300991 u8 reserved_at_2a0[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +0300992 u8 max_wqe_sz_rq[0x10];
993
Rabie Louloua8ffcc72017-07-09 13:39:30 +0300994 u8 max_flow_counter_31_16[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +0300995 u8 max_wqe_sz_sq_dc[0x10];
996
Tariq Toukane1c9c622016-04-11 23:10:21 +0300997 u8 reserved_at_2e0[0x7];
Eli Cohenb7755162014-10-02 12:19:44 +0300998 u8 max_qp_mcg[0x19];
999
Tariq Toukane1c9c622016-04-11 23:10:21 +03001000 u8 reserved_at_300[0x18];
Eli Cohenb7755162014-10-02 12:19:44 +03001001 u8 log_max_mcg[0x8];
1002
Tariq Toukane1c9c622016-04-11 23:10:21 +03001003 u8 reserved_at_320[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001004 u8 log_max_transport_domain[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001005 u8 reserved_at_328[0x3];
Eli Cohenb7755162014-10-02 12:19:44 +03001006 u8 log_max_pd[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001007 u8 reserved_at_330[0xb];
Eli Cohenb7755162014-10-02 12:19:44 +03001008 u8 log_max_xrcd[0x5];
1009
Amir Vadaia351a1b02016-07-14 10:32:38 +03001010 u8 reserved_at_340[0x8];
1011 u8 log_max_flow_counter_bulk[0x8];
Rabie Louloua8ffcc72017-07-09 13:39:30 +03001012 u8 max_flow_counter_15_0[0x10];
Amir Vadaia351a1b02016-07-14 10:32:38 +03001013
Eli Cohenb7755162014-10-02 12:19:44 +03001014
Tariq Toukane1c9c622016-04-11 23:10:21 +03001015 u8 reserved_at_360[0x3];
Eli Cohenb7755162014-10-02 12:19:44 +03001016 u8 log_max_rq[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001017 u8 reserved_at_368[0x3];
Eli Cohenb7755162014-10-02 12:19:44 +03001018 u8 log_max_sq[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001019 u8 reserved_at_370[0x3];
Eli Cohenb7755162014-10-02 12:19:44 +03001020 u8 log_max_tir[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001021 u8 reserved_at_378[0x3];
Eli Cohenb7755162014-10-02 12:19:44 +03001022 u8 log_max_tis[0x5];
1023
Saeed Mahameede2816822015-05-28 22:28:40 +03001024 u8 basic_cyclic_rcv_wqe[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001025 u8 reserved_at_381[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03001026 u8 log_max_rmp[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001027 u8 reserved_at_388[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001028 u8 log_max_rqt[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001029 u8 reserved_at_390[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001030 u8 log_max_rqt_size[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001031 u8 reserved_at_398[0x3];
Eli Cohenb7755162014-10-02 12:19:44 +03001032 u8 log_max_tis_per_sq[0x5];
1033
Tariq Toukane1c9c622016-04-11 23:10:21 +03001034 u8 reserved_at_3a0[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001035 u8 log_max_stride_sz_rq[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001036 u8 reserved_at_3a8[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001037 u8 log_min_stride_sz_rq[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001038 u8 reserved_at_3b0[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001039 u8 log_max_stride_sz_sq[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001040 u8 reserved_at_3b8[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001041 u8 log_min_stride_sz_sq[0x5];
Eli Cohenb7755162014-10-02 12:19:44 +03001042
Or Gerlitz40817cd2017-06-25 12:38:45 +03001043 u8 hairpin[0x1];
1044 u8 reserved_at_3c1[0x2];
1045 u8 log_max_hairpin_queues[0x5];
1046 u8 reserved_at_3c8[0x3];
1047 u8 log_max_hairpin_wq_data_sz[0x5];
Or Gerlitz4d533e02018-01-04 12:26:21 +02001048 u8 reserved_at_3d0[0x3];
1049 u8 log_max_hairpin_num_packets[0x5];
1050 u8 reserved_at_3d8[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001051 u8 log_max_wq_sz[0x5];
1052
Saeed Mahameed54f0a412015-12-01 18:03:10 +02001053 u8 nic_vport_change_event[0x1];
Eran Ben Elisha8978cc92018-01-09 11:41:10 +02001054 u8 disable_local_lb_uc[0x1];
1055 u8 disable_local_lb_mc[0x1];
Or Gerlitz40817cd2017-06-25 12:38:45 +03001056 u8 log_min_hairpin_wq_data_sz[0x5];
1057 u8 reserved_at_3e8[0x3];
Saeed Mahameed54f0a412015-12-01 18:03:10 +02001058 u8 log_max_vlan_list[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001059 u8 reserved_at_3f0[0x3];
Saeed Mahameed54f0a412015-12-01 18:03:10 +02001060 u8 log_max_current_mc_list[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001061 u8 reserved_at_3f8[0x3];
Saeed Mahameed54f0a412015-12-01 18:03:10 +02001062 u8 log_max_current_uc_list[0x5];
1063
Tariq Toukane1c9c622016-04-11 23:10:21 +03001064 u8 reserved_at_400[0x80];
Saeed Mahameed54f0a412015-12-01 18:03:10 +02001065
Tariq Toukane1c9c622016-04-11 23:10:21 +03001066 u8 reserved_at_480[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001067 u8 log_max_l2_table[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001068 u8 reserved_at_488[0x8];
Eli Cohenb7755162014-10-02 12:19:44 +03001069 u8 log_uar_page_sz[0x10];
1070
Tariq Toukane1c9c622016-04-11 23:10:21 +03001071 u8 reserved_at_4a0[0x20];
Linus Torvalds048ccca2016-01-23 18:45:06 -08001072 u8 device_frequency_mhz[0x20];
Eran Ben Elishab0844442015-12-29 14:58:30 +02001073 u8 device_frequency_khz[0x20];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001074
Eli Cohena6d51b62017-01-03 23:55:23 +02001075 u8 reserved_at_500[0x20];
1076 u8 num_of_uars_per_page[0x20];
1077 u8 reserved_at_540[0x40];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001078
Guy Levi0ff8e792017-10-19 08:25:51 +03001079 u8 reserved_at_580[0x3d];
1080 u8 cqe_128_always[0x1];
1081 u8 cqe_compression_128[0x1];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03001082 u8 cqe_compression[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +03001083
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03001084 u8 cqe_compression_timeout[0x10];
1085 u8 cqe_compression_max_num[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +03001086
Saeed Mahameed74862162016-06-09 15:11:34 +03001087 u8 reserved_at_5e0[0x10];
1088 u8 tag_matching[0x1];
1089 u8 rndv_offload_rc[0x1];
1090 u8 rndv_offload_dc[0x1];
1091 u8 log_tag_matching_list_sz[0x5];
Max Gurtovoy7b135582017-01-02 11:37:38 +02001092 u8 reserved_at_5f8[0x3];
Saeed Mahameed74862162016-06-09 15:11:34 +03001093 u8 log_max_xrq[0x5];
1094
Daniel Jurgens32f69e42018-01-04 17:25:36 +02001095 u8 affiliate_nic_vport_criteria[0x8];
1096 u8 native_port_num[0x8];
1097 u8 num_vhca_ports[0x8];
1098 u8 reserved_at_618[0x6];
1099 u8 sw_owner_id[0x1];
Daniel Jurgens8737f812018-01-04 17:25:32 +02001100 u8 reserved_at_61f[0x1e1];
Saeed Mahameede2816822015-05-28 22:28:40 +03001101};
1102
Saeed Mahameed81848732015-12-01 18:03:20 +02001103enum mlx5_flow_destination_type {
1104 MLX5_FLOW_DESTINATION_TYPE_VPORT = 0x0,
1105 MLX5_FLOW_DESTINATION_TYPE_FLOW_TABLE = 0x1,
1106 MLX5_FLOW_DESTINATION_TYPE_TIR = 0x2,
Amir Vadaibd5251db2016-05-13 12:55:40 +00001107
Aviad Yehezkel5f418372018-02-18 13:17:17 +02001108 MLX5_FLOW_DESTINATION_TYPE_PORT = 0x99,
Amir Vadaibd5251db2016-05-13 12:55:40 +00001109 MLX5_FLOW_DESTINATION_TYPE_COUNTER = 0x100,
Saeed Mahameede2816822015-05-28 22:28:40 +03001110};
1111
1112struct mlx5_ifc_dest_format_struct_bits {
1113 u8 destination_type[0x8];
1114 u8 destination_id[0x18];
1115
Matan Barakb4ff3a32016-02-09 14:57:42 +02001116 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03001117};
1118
Amir Vadai9dc0b282016-05-13 12:55:39 +00001119struct mlx5_ifc_flow_counter_list_bits {
Rabie Louloua8ffcc72017-07-09 13:39:30 +03001120 u8 flow_counter_id[0x20];
Amir Vadai9dc0b282016-05-13 12:55:39 +00001121
1122 u8 reserved_at_20[0x20];
1123};
1124
1125union mlx5_ifc_dest_format_struct_flow_counter_list_auto_bits {
1126 struct mlx5_ifc_dest_format_struct_bits dest_format_struct;
1127 struct mlx5_ifc_flow_counter_list_bits flow_counter_list;
1128 u8 reserved_at_0[0x40];
1129};
1130
Saeed Mahameede2816822015-05-28 22:28:40 +03001131struct mlx5_ifc_fte_match_param_bits {
1132 struct mlx5_ifc_fte_match_set_lyr_2_4_bits outer_headers;
1133
1134 struct mlx5_ifc_fte_match_set_misc_bits misc_parameters;
1135
1136 struct mlx5_ifc_fte_match_set_lyr_2_4_bits inner_headers;
1137
Matan Barakb4ff3a32016-02-09 14:57:42 +02001138 u8 reserved_at_600[0xa00];
Saeed Mahameede2816822015-05-28 22:28:40 +03001139};
1140
1141enum {
1142 MLX5_RX_HASH_FIELD_SELECT_SELECTED_FIELDS_SRC_IP = 0x0,
1143 MLX5_RX_HASH_FIELD_SELECT_SELECTED_FIELDS_DST_IP = 0x1,
1144 MLX5_RX_HASH_FIELD_SELECT_SELECTED_FIELDS_L4_SPORT = 0x2,
1145 MLX5_RX_HASH_FIELD_SELECT_SELECTED_FIELDS_L4_DPORT = 0x3,
1146 MLX5_RX_HASH_FIELD_SELECT_SELECTED_FIELDS_IPSEC_SPI = 0x4,
1147};
1148
1149struct mlx5_ifc_rx_hash_field_select_bits {
1150 u8 l3_prot_type[0x1];
1151 u8 l4_prot_type[0x1];
1152 u8 selected_fields[0x1e];
1153};
1154
1155enum {
1156 MLX5_WQ_WQ_TYPE_WQ_LINKED_LIST = 0x0,
1157 MLX5_WQ_WQ_TYPE_WQ_CYCLIC = 0x1,
1158};
1159
1160enum {
1161 MLX5_WQ_END_PADDING_MODE_END_PAD_NONE = 0x0,
1162 MLX5_WQ_END_PADDING_MODE_END_PAD_ALIGN = 0x1,
1163};
1164
1165struct mlx5_ifc_wq_bits {
1166 u8 wq_type[0x4];
1167 u8 wq_signature[0x1];
1168 u8 end_padding_mode[0x2];
1169 u8 cd_slave[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001170 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03001171
1172 u8 hds_skip_first_sge[0x1];
1173 u8 log2_hds_buf_size[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001174 u8 reserved_at_24[0x7];
Saeed Mahameede2816822015-05-28 22:28:40 +03001175 u8 page_offset[0x5];
1176 u8 lwm[0x10];
1177
Matan Barakb4ff3a32016-02-09 14:57:42 +02001178 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03001179 u8 pd[0x18];
1180
Matan Barakb4ff3a32016-02-09 14:57:42 +02001181 u8 reserved_at_60[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03001182 u8 uar_page[0x18];
1183
1184 u8 dbr_addr[0x40];
1185
1186 u8 hw_counter[0x20];
1187
1188 u8 sw_counter[0x20];
1189
Matan Barakb4ff3a32016-02-09 14:57:42 +02001190 u8 reserved_at_100[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03001191 u8 log_wq_stride[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001192 u8 reserved_at_110[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001193 u8 log_wq_pg_sz[0x5];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001194 u8 reserved_at_118[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001195 u8 log_wq_sz[0x5];
1196
Or Gerlitz4d533e02018-01-04 12:26:21 +02001197 u8 reserved_at_120[0x3];
1198 u8 log_hairpin_num_packets[0x5];
1199 u8 reserved_at_128[0x3];
Or Gerlitz40817cd2017-06-25 12:38:45 +03001200 u8 log_hairpin_data_sz[0x5];
1201 u8 reserved_at_130[0x5];
1202
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03001203 u8 log_wqe_num_of_strides[0x3];
1204 u8 two_byte_shift_en[0x1];
1205 u8 reserved_at_139[0x4];
1206 u8 log_wqe_stride_size[0x3];
1207
1208 u8 reserved_at_140[0x4c0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001209
1210 struct mlx5_ifc_cmd_pas_bits pas[0];
1211};
1212
1213struct mlx5_ifc_rq_num_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001214 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03001215 u8 rq_num[0x18];
1216};
1217
1218struct mlx5_ifc_mac_address_layout_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001219 u8 reserved_at_0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03001220 u8 mac_addr_47_32[0x10];
1221
1222 u8 mac_addr_31_0[0x20];
1223};
1224
Saeed Mahameedc0046cf2015-12-01 18:03:15 +02001225struct mlx5_ifc_vlan_layout_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001226 u8 reserved_at_0[0x14];
Saeed Mahameedc0046cf2015-12-01 18:03:15 +02001227 u8 vlan[0x0c];
1228
Matan Barakb4ff3a32016-02-09 14:57:42 +02001229 u8 reserved_at_20[0x20];
Saeed Mahameedc0046cf2015-12-01 18:03:15 +02001230};
1231
Saeed Mahameede2816822015-05-28 22:28:40 +03001232struct mlx5_ifc_cong_control_r_roce_ecn_np_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001233 u8 reserved_at_0[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001234
1235 u8 min_time_between_cnps[0x20];
1236
Matan Barakb4ff3a32016-02-09 14:57:42 +02001237 u8 reserved_at_c0[0x12];
Saeed Mahameede2816822015-05-28 22:28:40 +03001238 u8 cnp_dscp[0x6];
Parav Pandit4a2da0b2017-05-30 10:05:15 +03001239 u8 reserved_at_d8[0x4];
1240 u8 cnp_prio_mode[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03001241 u8 cnp_802p_prio[0x3];
1242
Matan Barakb4ff3a32016-02-09 14:57:42 +02001243 u8 reserved_at_e0[0x720];
Saeed Mahameede2816822015-05-28 22:28:40 +03001244};
1245
1246struct mlx5_ifc_cong_control_r_roce_ecn_rp_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001247 u8 reserved_at_0[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03001248
Matan Barakb4ff3a32016-02-09 14:57:42 +02001249 u8 reserved_at_60[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03001250 u8 clamp_tgt_rate[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001251 u8 reserved_at_65[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001252 u8 clamp_tgt_rate_after_time_inc[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001253 u8 reserved_at_69[0x17];
Saeed Mahameede2816822015-05-28 22:28:40 +03001254
Matan Barakb4ff3a32016-02-09 14:57:42 +02001255 u8 reserved_at_80[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03001256
1257 u8 rpg_time_reset[0x20];
1258
1259 u8 rpg_byte_reset[0x20];
1260
1261 u8 rpg_threshold[0x20];
1262
1263 u8 rpg_max_rate[0x20];
1264
1265 u8 rpg_ai_rate[0x20];
1266
1267 u8 rpg_hai_rate[0x20];
1268
1269 u8 rpg_gd[0x20];
1270
1271 u8 rpg_min_dec_fac[0x20];
1272
1273 u8 rpg_min_rate[0x20];
1274
Matan Barakb4ff3a32016-02-09 14:57:42 +02001275 u8 reserved_at_1c0[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001276
1277 u8 rate_to_set_on_first_cnp[0x20];
1278
1279 u8 dce_tcp_g[0x20];
1280
1281 u8 dce_tcp_rtt[0x20];
1282
1283 u8 rate_reduce_monitor_period[0x20];
1284
Matan Barakb4ff3a32016-02-09 14:57:42 +02001285 u8 reserved_at_320[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03001286
1287 u8 initial_alpha_value[0x20];
1288
Matan Barakb4ff3a32016-02-09 14:57:42 +02001289 u8 reserved_at_360[0x4a0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001290};
1291
1292struct mlx5_ifc_cong_control_802_1qau_rp_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001293 u8 reserved_at_0[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03001294
1295 u8 rppp_max_rps[0x20];
1296
1297 u8 rpg_time_reset[0x20];
1298
1299 u8 rpg_byte_reset[0x20];
1300
1301 u8 rpg_threshold[0x20];
1302
1303 u8 rpg_max_rate[0x20];
1304
1305 u8 rpg_ai_rate[0x20];
1306
1307 u8 rpg_hai_rate[0x20];
1308
1309 u8 rpg_gd[0x20];
1310
1311 u8 rpg_min_dec_fac[0x20];
1312
1313 u8 rpg_min_rate[0x20];
1314
Matan Barakb4ff3a32016-02-09 14:57:42 +02001315 u8 reserved_at_1c0[0x640];
Saeed Mahameede2816822015-05-28 22:28:40 +03001316};
1317
1318enum {
1319 MLX5_RESIZE_FIELD_SELECT_RESIZE_FIELD_SELECT_LOG_CQ_SIZE = 0x1,
1320 MLX5_RESIZE_FIELD_SELECT_RESIZE_FIELD_SELECT_PAGE_OFFSET = 0x2,
1321 MLX5_RESIZE_FIELD_SELECT_RESIZE_FIELD_SELECT_LOG_PAGE_SIZE = 0x4,
1322};
1323
1324struct mlx5_ifc_resize_field_select_bits {
1325 u8 resize_field_select[0x20];
1326};
1327
1328enum {
1329 MLX5_MODIFY_FIELD_SELECT_MODIFY_FIELD_SELECT_CQ_PERIOD = 0x1,
1330 MLX5_MODIFY_FIELD_SELECT_MODIFY_FIELD_SELECT_CQ_MAX_COUNT = 0x2,
1331 MLX5_MODIFY_FIELD_SELECT_MODIFY_FIELD_SELECT_OI = 0x4,
1332 MLX5_MODIFY_FIELD_SELECT_MODIFY_FIELD_SELECT_C_EQN = 0x8,
1333};
1334
1335struct mlx5_ifc_modify_field_select_bits {
1336 u8 modify_field_select[0x20];
1337};
1338
1339struct mlx5_ifc_field_select_r_roce_np_bits {
1340 u8 field_select_r_roce_np[0x20];
1341};
1342
1343struct mlx5_ifc_field_select_r_roce_rp_bits {
1344 u8 field_select_r_roce_rp[0x20];
1345};
1346
1347enum {
1348 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPPP_MAX_RPS = 0x4,
1349 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_TIME_RESET = 0x8,
1350 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_BYTE_RESET = 0x10,
1351 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_THRESHOLD = 0x20,
1352 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_MAX_RATE = 0x40,
1353 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_AI_RATE = 0x80,
1354 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_HAI_RATE = 0x100,
1355 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_GD = 0x200,
1356 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_MIN_DEC_FAC = 0x400,
1357 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_MIN_RATE = 0x800,
1358};
1359
1360struct mlx5_ifc_field_select_802_1qau_rp_bits {
1361 u8 field_select_8021qaurp[0x20];
1362};
1363
1364struct mlx5_ifc_phys_layer_cntrs_bits {
1365 u8 time_since_last_clear_high[0x20];
1366
1367 u8 time_since_last_clear_low[0x20];
1368
1369 u8 symbol_errors_high[0x20];
1370
1371 u8 symbol_errors_low[0x20];
1372
1373 u8 sync_headers_errors_high[0x20];
1374
1375 u8 sync_headers_errors_low[0x20];
1376
1377 u8 edpl_bip_errors_lane0_high[0x20];
1378
1379 u8 edpl_bip_errors_lane0_low[0x20];
1380
1381 u8 edpl_bip_errors_lane1_high[0x20];
1382
1383 u8 edpl_bip_errors_lane1_low[0x20];
1384
1385 u8 edpl_bip_errors_lane2_high[0x20];
1386
1387 u8 edpl_bip_errors_lane2_low[0x20];
1388
1389 u8 edpl_bip_errors_lane3_high[0x20];
1390
1391 u8 edpl_bip_errors_lane3_low[0x20];
1392
1393 u8 fc_fec_corrected_blocks_lane0_high[0x20];
1394
1395 u8 fc_fec_corrected_blocks_lane0_low[0x20];
1396
1397 u8 fc_fec_corrected_blocks_lane1_high[0x20];
1398
1399 u8 fc_fec_corrected_blocks_lane1_low[0x20];
1400
1401 u8 fc_fec_corrected_blocks_lane2_high[0x20];
1402
1403 u8 fc_fec_corrected_blocks_lane2_low[0x20];
1404
1405 u8 fc_fec_corrected_blocks_lane3_high[0x20];
1406
1407 u8 fc_fec_corrected_blocks_lane3_low[0x20];
1408
1409 u8 fc_fec_uncorrectable_blocks_lane0_high[0x20];
1410
1411 u8 fc_fec_uncorrectable_blocks_lane0_low[0x20];
1412
1413 u8 fc_fec_uncorrectable_blocks_lane1_high[0x20];
1414
1415 u8 fc_fec_uncorrectable_blocks_lane1_low[0x20];
1416
1417 u8 fc_fec_uncorrectable_blocks_lane2_high[0x20];
1418
1419 u8 fc_fec_uncorrectable_blocks_lane2_low[0x20];
1420
1421 u8 fc_fec_uncorrectable_blocks_lane3_high[0x20];
1422
1423 u8 fc_fec_uncorrectable_blocks_lane3_low[0x20];
1424
1425 u8 rs_fec_corrected_blocks_high[0x20];
1426
1427 u8 rs_fec_corrected_blocks_low[0x20];
1428
1429 u8 rs_fec_uncorrectable_blocks_high[0x20];
1430
1431 u8 rs_fec_uncorrectable_blocks_low[0x20];
1432
1433 u8 rs_fec_no_errors_blocks_high[0x20];
1434
1435 u8 rs_fec_no_errors_blocks_low[0x20];
1436
1437 u8 rs_fec_single_error_blocks_high[0x20];
1438
1439 u8 rs_fec_single_error_blocks_low[0x20];
1440
1441 u8 rs_fec_corrected_symbols_total_high[0x20];
1442
1443 u8 rs_fec_corrected_symbols_total_low[0x20];
1444
1445 u8 rs_fec_corrected_symbols_lane0_high[0x20];
1446
1447 u8 rs_fec_corrected_symbols_lane0_low[0x20];
1448
1449 u8 rs_fec_corrected_symbols_lane1_high[0x20];
1450
1451 u8 rs_fec_corrected_symbols_lane1_low[0x20];
1452
1453 u8 rs_fec_corrected_symbols_lane2_high[0x20];
1454
1455 u8 rs_fec_corrected_symbols_lane2_low[0x20];
1456
1457 u8 rs_fec_corrected_symbols_lane3_high[0x20];
1458
1459 u8 rs_fec_corrected_symbols_lane3_low[0x20];
1460
1461 u8 link_down_events[0x20];
1462
1463 u8 successful_recovery_events[0x20];
1464
Matan Barakb4ff3a32016-02-09 14:57:42 +02001465 u8 reserved_at_640[0x180];
Saeed Mahameede2816822015-05-28 22:28:40 +03001466};
1467
Gal Pressmand8dc0502016-09-27 17:04:51 +03001468struct mlx5_ifc_phys_layer_statistical_cntrs_bits {
1469 u8 time_since_last_clear_high[0x20];
1470
1471 u8 time_since_last_clear_low[0x20];
1472
1473 u8 phy_received_bits_high[0x20];
1474
1475 u8 phy_received_bits_low[0x20];
1476
1477 u8 phy_symbol_errors_high[0x20];
1478
1479 u8 phy_symbol_errors_low[0x20];
1480
1481 u8 phy_corrected_bits_high[0x20];
1482
1483 u8 phy_corrected_bits_low[0x20];
1484
1485 u8 phy_corrected_bits_lane0_high[0x20];
1486
1487 u8 phy_corrected_bits_lane0_low[0x20];
1488
1489 u8 phy_corrected_bits_lane1_high[0x20];
1490
1491 u8 phy_corrected_bits_lane1_low[0x20];
1492
1493 u8 phy_corrected_bits_lane2_high[0x20];
1494
1495 u8 phy_corrected_bits_lane2_low[0x20];
1496
1497 u8 phy_corrected_bits_lane3_high[0x20];
1498
1499 u8 phy_corrected_bits_lane3_low[0x20];
1500
1501 u8 reserved_at_200[0x5c0];
1502};
1503
Meny Yossefi1c64bf62016-02-18 18:15:00 +02001504struct mlx5_ifc_ib_port_cntrs_grp_data_layout_bits {
1505 u8 symbol_error_counter[0x10];
1506
1507 u8 link_error_recovery_counter[0x8];
1508
1509 u8 link_downed_counter[0x8];
1510
1511 u8 port_rcv_errors[0x10];
1512
1513 u8 port_rcv_remote_physical_errors[0x10];
1514
1515 u8 port_rcv_switch_relay_errors[0x10];
1516
1517 u8 port_xmit_discards[0x10];
1518
1519 u8 port_xmit_constraint_errors[0x8];
1520
1521 u8 port_rcv_constraint_errors[0x8];
1522
1523 u8 reserved_at_70[0x8];
1524
1525 u8 link_overrun_errors[0x8];
1526
1527 u8 reserved_at_80[0x10];
1528
1529 u8 vl_15_dropped[0x10];
1530
Tim Wright133bea02017-05-01 17:30:08 +01001531 u8 reserved_at_a0[0x80];
1532
1533 u8 port_xmit_wait[0x20];
Meny Yossefi1c64bf62016-02-18 18:15:00 +02001534};
1535
Saeed Mahameede2816822015-05-28 22:28:40 +03001536struct mlx5_ifc_eth_per_traffic_grp_data_layout_bits {
1537 u8 transmit_queue_high[0x20];
1538
1539 u8 transmit_queue_low[0x20];
1540
Matan Barakb4ff3a32016-02-09 14:57:42 +02001541 u8 reserved_at_40[0x780];
Saeed Mahameede2816822015-05-28 22:28:40 +03001542};
1543
1544struct mlx5_ifc_eth_per_prio_grp_data_layout_bits {
1545 u8 rx_octets_high[0x20];
1546
1547 u8 rx_octets_low[0x20];
1548
Matan Barakb4ff3a32016-02-09 14:57:42 +02001549 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001550
1551 u8 rx_frames_high[0x20];
1552
1553 u8 rx_frames_low[0x20];
1554
1555 u8 tx_octets_high[0x20];
1556
1557 u8 tx_octets_low[0x20];
1558
Matan Barakb4ff3a32016-02-09 14:57:42 +02001559 u8 reserved_at_180[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001560
1561 u8 tx_frames_high[0x20];
1562
1563 u8 tx_frames_low[0x20];
1564
1565 u8 rx_pause_high[0x20];
1566
1567 u8 rx_pause_low[0x20];
1568
1569 u8 rx_pause_duration_high[0x20];
1570
1571 u8 rx_pause_duration_low[0x20];
1572
1573 u8 tx_pause_high[0x20];
1574
1575 u8 tx_pause_low[0x20];
1576
1577 u8 tx_pause_duration_high[0x20];
1578
1579 u8 tx_pause_duration_low[0x20];
1580
1581 u8 rx_pause_transition_high[0x20];
1582
1583 u8 rx_pause_transition_low[0x20];
1584
Inbar Karmy2fcb12d2017-08-17 16:39:47 +03001585 u8 reserved_at_3c0[0x40];
1586
1587 u8 device_stall_minor_watermark_cnt_high[0x20];
1588
1589 u8 device_stall_minor_watermark_cnt_low[0x20];
1590
1591 u8 device_stall_critical_watermark_cnt_high[0x20];
1592
1593 u8 device_stall_critical_watermark_cnt_low[0x20];
1594
1595 u8 reserved_at_480[0x340];
Saeed Mahameede2816822015-05-28 22:28:40 +03001596};
1597
1598struct mlx5_ifc_eth_extended_cntrs_grp_data_layout_bits {
1599 u8 port_transmit_wait_high[0x20];
1600
1601 u8 port_transmit_wait_low[0x20];
1602
Gal Pressman2dba0792017-06-18 14:56:45 +03001603 u8 reserved_at_40[0x100];
1604
1605 u8 rx_buffer_almost_full_high[0x20];
1606
1607 u8 rx_buffer_almost_full_low[0x20];
1608
1609 u8 rx_buffer_full_high[0x20];
1610
1611 u8 rx_buffer_full_low[0x20];
1612
1613 u8 reserved_at_1c0[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03001614};
1615
1616struct mlx5_ifc_eth_3635_cntrs_grp_data_layout_bits {
1617 u8 dot3stats_alignment_errors_high[0x20];
1618
1619 u8 dot3stats_alignment_errors_low[0x20];
1620
1621 u8 dot3stats_fcs_errors_high[0x20];
1622
1623 u8 dot3stats_fcs_errors_low[0x20];
1624
1625 u8 dot3stats_single_collision_frames_high[0x20];
1626
1627 u8 dot3stats_single_collision_frames_low[0x20];
1628
1629 u8 dot3stats_multiple_collision_frames_high[0x20];
1630
1631 u8 dot3stats_multiple_collision_frames_low[0x20];
1632
1633 u8 dot3stats_sqe_test_errors_high[0x20];
1634
1635 u8 dot3stats_sqe_test_errors_low[0x20];
1636
1637 u8 dot3stats_deferred_transmissions_high[0x20];
1638
1639 u8 dot3stats_deferred_transmissions_low[0x20];
1640
1641 u8 dot3stats_late_collisions_high[0x20];
1642
1643 u8 dot3stats_late_collisions_low[0x20];
1644
1645 u8 dot3stats_excessive_collisions_high[0x20];
1646
1647 u8 dot3stats_excessive_collisions_low[0x20];
1648
1649 u8 dot3stats_internal_mac_transmit_errors_high[0x20];
1650
1651 u8 dot3stats_internal_mac_transmit_errors_low[0x20];
1652
1653 u8 dot3stats_carrier_sense_errors_high[0x20];
1654
1655 u8 dot3stats_carrier_sense_errors_low[0x20];
1656
1657 u8 dot3stats_frame_too_longs_high[0x20];
1658
1659 u8 dot3stats_frame_too_longs_low[0x20];
1660
1661 u8 dot3stats_internal_mac_receive_errors_high[0x20];
1662
1663 u8 dot3stats_internal_mac_receive_errors_low[0x20];
1664
1665 u8 dot3stats_symbol_errors_high[0x20];
1666
1667 u8 dot3stats_symbol_errors_low[0x20];
1668
1669 u8 dot3control_in_unknown_opcodes_high[0x20];
1670
1671 u8 dot3control_in_unknown_opcodes_low[0x20];
1672
1673 u8 dot3in_pause_frames_high[0x20];
1674
1675 u8 dot3in_pause_frames_low[0x20];
1676
1677 u8 dot3out_pause_frames_high[0x20];
1678
1679 u8 dot3out_pause_frames_low[0x20];
1680
Matan Barakb4ff3a32016-02-09 14:57:42 +02001681 u8 reserved_at_400[0x3c0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001682};
1683
1684struct mlx5_ifc_eth_2819_cntrs_grp_data_layout_bits {
1685 u8 ether_stats_drop_events_high[0x20];
1686
1687 u8 ether_stats_drop_events_low[0x20];
1688
1689 u8 ether_stats_octets_high[0x20];
1690
1691 u8 ether_stats_octets_low[0x20];
1692
1693 u8 ether_stats_pkts_high[0x20];
1694
1695 u8 ether_stats_pkts_low[0x20];
1696
1697 u8 ether_stats_broadcast_pkts_high[0x20];
1698
1699 u8 ether_stats_broadcast_pkts_low[0x20];
1700
1701 u8 ether_stats_multicast_pkts_high[0x20];
1702
1703 u8 ether_stats_multicast_pkts_low[0x20];
1704
1705 u8 ether_stats_crc_align_errors_high[0x20];
1706
1707 u8 ether_stats_crc_align_errors_low[0x20];
1708
1709 u8 ether_stats_undersize_pkts_high[0x20];
1710
1711 u8 ether_stats_undersize_pkts_low[0x20];
1712
1713 u8 ether_stats_oversize_pkts_high[0x20];
1714
1715 u8 ether_stats_oversize_pkts_low[0x20];
1716
1717 u8 ether_stats_fragments_high[0x20];
1718
1719 u8 ether_stats_fragments_low[0x20];
1720
1721 u8 ether_stats_jabbers_high[0x20];
1722
1723 u8 ether_stats_jabbers_low[0x20];
1724
1725 u8 ether_stats_collisions_high[0x20];
1726
1727 u8 ether_stats_collisions_low[0x20];
1728
1729 u8 ether_stats_pkts64octets_high[0x20];
1730
1731 u8 ether_stats_pkts64octets_low[0x20];
1732
1733 u8 ether_stats_pkts65to127octets_high[0x20];
1734
1735 u8 ether_stats_pkts65to127octets_low[0x20];
1736
1737 u8 ether_stats_pkts128to255octets_high[0x20];
1738
1739 u8 ether_stats_pkts128to255octets_low[0x20];
1740
1741 u8 ether_stats_pkts256to511octets_high[0x20];
1742
1743 u8 ether_stats_pkts256to511octets_low[0x20];
1744
1745 u8 ether_stats_pkts512to1023octets_high[0x20];
1746
1747 u8 ether_stats_pkts512to1023octets_low[0x20];
1748
1749 u8 ether_stats_pkts1024to1518octets_high[0x20];
1750
1751 u8 ether_stats_pkts1024to1518octets_low[0x20];
1752
1753 u8 ether_stats_pkts1519to2047octets_high[0x20];
1754
1755 u8 ether_stats_pkts1519to2047octets_low[0x20];
1756
1757 u8 ether_stats_pkts2048to4095octets_high[0x20];
1758
1759 u8 ether_stats_pkts2048to4095octets_low[0x20];
1760
1761 u8 ether_stats_pkts4096to8191octets_high[0x20];
1762
1763 u8 ether_stats_pkts4096to8191octets_low[0x20];
1764
1765 u8 ether_stats_pkts8192to10239octets_high[0x20];
1766
1767 u8 ether_stats_pkts8192to10239octets_low[0x20];
1768
Matan Barakb4ff3a32016-02-09 14:57:42 +02001769 u8 reserved_at_540[0x280];
Saeed Mahameede2816822015-05-28 22:28:40 +03001770};
1771
1772struct mlx5_ifc_eth_2863_cntrs_grp_data_layout_bits {
1773 u8 if_in_octets_high[0x20];
1774
1775 u8 if_in_octets_low[0x20];
1776
1777 u8 if_in_ucast_pkts_high[0x20];
1778
1779 u8 if_in_ucast_pkts_low[0x20];
1780
1781 u8 if_in_discards_high[0x20];
1782
1783 u8 if_in_discards_low[0x20];
1784
1785 u8 if_in_errors_high[0x20];
1786
1787 u8 if_in_errors_low[0x20];
1788
1789 u8 if_in_unknown_protos_high[0x20];
1790
1791 u8 if_in_unknown_protos_low[0x20];
1792
1793 u8 if_out_octets_high[0x20];
1794
1795 u8 if_out_octets_low[0x20];
1796
1797 u8 if_out_ucast_pkts_high[0x20];
1798
1799 u8 if_out_ucast_pkts_low[0x20];
1800
1801 u8 if_out_discards_high[0x20];
1802
1803 u8 if_out_discards_low[0x20];
1804
1805 u8 if_out_errors_high[0x20];
1806
1807 u8 if_out_errors_low[0x20];
1808
1809 u8 if_in_multicast_pkts_high[0x20];
1810
1811 u8 if_in_multicast_pkts_low[0x20];
1812
1813 u8 if_in_broadcast_pkts_high[0x20];
1814
1815 u8 if_in_broadcast_pkts_low[0x20];
1816
1817 u8 if_out_multicast_pkts_high[0x20];
1818
1819 u8 if_out_multicast_pkts_low[0x20];
1820
1821 u8 if_out_broadcast_pkts_high[0x20];
1822
1823 u8 if_out_broadcast_pkts_low[0x20];
1824
Matan Barakb4ff3a32016-02-09 14:57:42 +02001825 u8 reserved_at_340[0x480];
Saeed Mahameede2816822015-05-28 22:28:40 +03001826};
1827
1828struct mlx5_ifc_eth_802_3_cntrs_grp_data_layout_bits {
1829 u8 a_frames_transmitted_ok_high[0x20];
1830
1831 u8 a_frames_transmitted_ok_low[0x20];
1832
1833 u8 a_frames_received_ok_high[0x20];
1834
1835 u8 a_frames_received_ok_low[0x20];
1836
1837 u8 a_frame_check_sequence_errors_high[0x20];
1838
1839 u8 a_frame_check_sequence_errors_low[0x20];
1840
1841 u8 a_alignment_errors_high[0x20];
1842
1843 u8 a_alignment_errors_low[0x20];
1844
1845 u8 a_octets_transmitted_ok_high[0x20];
1846
1847 u8 a_octets_transmitted_ok_low[0x20];
1848
1849 u8 a_octets_received_ok_high[0x20];
1850
1851 u8 a_octets_received_ok_low[0x20];
1852
1853 u8 a_multicast_frames_xmitted_ok_high[0x20];
1854
1855 u8 a_multicast_frames_xmitted_ok_low[0x20];
1856
1857 u8 a_broadcast_frames_xmitted_ok_high[0x20];
1858
1859 u8 a_broadcast_frames_xmitted_ok_low[0x20];
1860
1861 u8 a_multicast_frames_received_ok_high[0x20];
1862
1863 u8 a_multicast_frames_received_ok_low[0x20];
1864
1865 u8 a_broadcast_frames_received_ok_high[0x20];
1866
1867 u8 a_broadcast_frames_received_ok_low[0x20];
1868
1869 u8 a_in_range_length_errors_high[0x20];
1870
1871 u8 a_in_range_length_errors_low[0x20];
1872
1873 u8 a_out_of_range_length_field_high[0x20];
1874
1875 u8 a_out_of_range_length_field_low[0x20];
1876
1877 u8 a_frame_too_long_errors_high[0x20];
1878
1879 u8 a_frame_too_long_errors_low[0x20];
1880
1881 u8 a_symbol_error_during_carrier_high[0x20];
1882
1883 u8 a_symbol_error_during_carrier_low[0x20];
1884
1885 u8 a_mac_control_frames_transmitted_high[0x20];
1886
1887 u8 a_mac_control_frames_transmitted_low[0x20];
1888
1889 u8 a_mac_control_frames_received_high[0x20];
1890
1891 u8 a_mac_control_frames_received_low[0x20];
1892
1893 u8 a_unsupported_opcodes_received_high[0x20];
1894
1895 u8 a_unsupported_opcodes_received_low[0x20];
1896
1897 u8 a_pause_mac_ctrl_frames_received_high[0x20];
1898
1899 u8 a_pause_mac_ctrl_frames_received_low[0x20];
1900
1901 u8 a_pause_mac_ctrl_frames_transmitted_high[0x20];
1902
1903 u8 a_pause_mac_ctrl_frames_transmitted_low[0x20];
1904
Matan Barakb4ff3a32016-02-09 14:57:42 +02001905 u8 reserved_at_4c0[0x300];
Saeed Mahameede2816822015-05-28 22:28:40 +03001906};
1907
Gal Pressman8ed1a632016-11-17 13:46:01 +02001908struct mlx5_ifc_pcie_perf_cntrs_grp_data_layout_bits {
1909 u8 life_time_counter_high[0x20];
1910
1911 u8 life_time_counter_low[0x20];
1912
1913 u8 rx_errors[0x20];
1914
1915 u8 tx_errors[0x20];
1916
1917 u8 l0_to_recovery_eieos[0x20];
1918
1919 u8 l0_to_recovery_ts[0x20];
1920
1921 u8 l0_to_recovery_framing[0x20];
1922
1923 u8 l0_to_recovery_retrain[0x20];
1924
1925 u8 crc_error_dllp[0x20];
1926
1927 u8 crc_error_tlp[0x20];
1928
Eran Ben Elishaefae7f72017-05-12 02:47:02 +03001929 u8 tx_overflow_buffer_pkt_high[0x20];
1930
1931 u8 tx_overflow_buffer_pkt_low[0x20];
Gal Pressman5405fa22017-06-15 18:29:23 +03001932
1933 u8 outbound_stalled_reads[0x20];
1934
1935 u8 outbound_stalled_writes[0x20];
1936
1937 u8 outbound_stalled_reads_events[0x20];
1938
1939 u8 outbound_stalled_writes_events[0x20];
1940
1941 u8 reserved_at_200[0x5c0];
Gal Pressman8ed1a632016-11-17 13:46:01 +02001942};
1943
Saeed Mahameede2816822015-05-28 22:28:40 +03001944struct mlx5_ifc_cmd_inter_comp_event_bits {
1945 u8 command_completion_vector[0x20];
1946
Matan Barakb4ff3a32016-02-09 14:57:42 +02001947 u8 reserved_at_20[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001948};
1949
1950struct mlx5_ifc_stall_vl_event_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001951 u8 reserved_at_0[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03001952 u8 port_num[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001953 u8 reserved_at_19[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001954 u8 vl[0x4];
1955
Matan Barakb4ff3a32016-02-09 14:57:42 +02001956 u8 reserved_at_20[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001957};
1958
1959struct mlx5_ifc_db_bf_congestion_event_bits {
1960 u8 event_subtype[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001961 u8 reserved_at_8[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03001962 u8 congestion_level[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001963 u8 reserved_at_18[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03001964
Matan Barakb4ff3a32016-02-09 14:57:42 +02001965 u8 reserved_at_20[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001966};
1967
1968struct mlx5_ifc_gpio_event_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001969 u8 reserved_at_0[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03001970
1971 u8 gpio_event_hi[0x20];
1972
1973 u8 gpio_event_lo[0x20];
1974
Matan Barakb4ff3a32016-02-09 14:57:42 +02001975 u8 reserved_at_a0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03001976};
1977
1978struct mlx5_ifc_port_state_change_event_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001979 u8 reserved_at_0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03001980
1981 u8 port_num[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001982 u8 reserved_at_44[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03001983
Matan Barakb4ff3a32016-02-09 14:57:42 +02001984 u8 reserved_at_60[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03001985};
1986
1987struct mlx5_ifc_dropped_packet_logged_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001988 u8 reserved_at_0[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001989};
1990
1991enum {
1992 MLX5_CQ_ERROR_SYNDROME_CQ_OVERRUN = 0x1,
1993 MLX5_CQ_ERROR_SYNDROME_CQ_ACCESS_VIOLATION_ERROR = 0x2,
1994};
1995
1996struct mlx5_ifc_cq_error_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001997 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03001998 u8 cqn[0x18];
1999
Matan Barakb4ff3a32016-02-09 14:57:42 +02002000 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002001
Matan Barakb4ff3a32016-02-09 14:57:42 +02002002 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002003 u8 syndrome[0x8];
2004
Matan Barakb4ff3a32016-02-09 14:57:42 +02002005 u8 reserved_at_60[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03002006};
2007
2008struct mlx5_ifc_rdma_page_fault_event_bits {
2009 u8 bytes_committed[0x20];
2010
2011 u8 r_key[0x20];
2012
Matan Barakb4ff3a32016-02-09 14:57:42 +02002013 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03002014 u8 packet_len[0x10];
2015
2016 u8 rdma_op_len[0x20];
2017
2018 u8 rdma_va[0x40];
2019
Matan Barakb4ff3a32016-02-09 14:57:42 +02002020 u8 reserved_at_c0[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03002021 u8 rdma[0x1];
2022 u8 write[0x1];
2023 u8 requestor[0x1];
2024 u8 qp_number[0x18];
2025};
2026
2027struct mlx5_ifc_wqe_associated_page_fault_event_bits {
2028 u8 bytes_committed[0x20];
2029
Matan Barakb4ff3a32016-02-09 14:57:42 +02002030 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03002031 u8 wqe_index[0x10];
2032
Matan Barakb4ff3a32016-02-09 14:57:42 +02002033 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03002034 u8 len[0x10];
2035
Matan Barakb4ff3a32016-02-09 14:57:42 +02002036 u8 reserved_at_60[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03002037
Matan Barakb4ff3a32016-02-09 14:57:42 +02002038 u8 reserved_at_c0[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03002039 u8 rdma[0x1];
2040 u8 write_read[0x1];
2041 u8 requestor[0x1];
2042 u8 qpn[0x18];
2043};
2044
2045struct mlx5_ifc_qp_events_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002046 u8 reserved_at_0[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002047
2048 u8 type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002049 u8 reserved_at_a8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002050
Matan Barakb4ff3a32016-02-09 14:57:42 +02002051 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002052 u8 qpn_rqn_sqn[0x18];
2053};
2054
2055struct mlx5_ifc_dct_events_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002056 u8 reserved_at_0[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002057
Matan Barakb4ff3a32016-02-09 14:57:42 +02002058 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002059 u8 dct_number[0x18];
2060};
2061
2062struct mlx5_ifc_comp_event_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002063 u8 reserved_at_0[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002064
Matan Barakb4ff3a32016-02-09 14:57:42 +02002065 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002066 u8 cq_number[0x18];
2067};
2068
2069enum {
2070 MLX5_QPC_STATE_RST = 0x0,
2071 MLX5_QPC_STATE_INIT = 0x1,
2072 MLX5_QPC_STATE_RTR = 0x2,
2073 MLX5_QPC_STATE_RTS = 0x3,
2074 MLX5_QPC_STATE_SQER = 0x4,
2075 MLX5_QPC_STATE_ERR = 0x6,
2076 MLX5_QPC_STATE_SQD = 0x7,
2077 MLX5_QPC_STATE_SUSPENDED = 0x9,
2078};
2079
2080enum {
2081 MLX5_QPC_ST_RC = 0x0,
2082 MLX5_QPC_ST_UC = 0x1,
2083 MLX5_QPC_ST_UD = 0x2,
2084 MLX5_QPC_ST_XRC = 0x3,
2085 MLX5_QPC_ST_DCI = 0x5,
2086 MLX5_QPC_ST_QP0 = 0x7,
2087 MLX5_QPC_ST_QP1 = 0x8,
2088 MLX5_QPC_ST_RAW_DATAGRAM = 0x9,
2089 MLX5_QPC_ST_REG_UMR = 0xc,
2090};
2091
2092enum {
2093 MLX5_QPC_PM_STATE_ARMED = 0x0,
2094 MLX5_QPC_PM_STATE_REARM = 0x1,
2095 MLX5_QPC_PM_STATE_RESERVED = 0x2,
2096 MLX5_QPC_PM_STATE_MIGRATED = 0x3,
2097};
2098
2099enum {
Artemy Kovalyov6e446362017-08-15 11:59:02 +03002100 MLX5_QPC_OFFLOAD_TYPE_RNDV = 0x1,
2101};
2102
2103enum {
Saeed Mahameede2816822015-05-28 22:28:40 +03002104 MLX5_QPC_END_PADDING_MODE_SCATTER_AS_IS = 0x0,
2105 MLX5_QPC_END_PADDING_MODE_PAD_TO_CACHE_LINE_ALIGNMENT = 0x1,
2106};
2107
2108enum {
2109 MLX5_QPC_MTU_256_BYTES = 0x1,
2110 MLX5_QPC_MTU_512_BYTES = 0x2,
2111 MLX5_QPC_MTU_1K_BYTES = 0x3,
2112 MLX5_QPC_MTU_2K_BYTES = 0x4,
2113 MLX5_QPC_MTU_4K_BYTES = 0x5,
2114 MLX5_QPC_MTU_RAW_ETHERNET_QP = 0x7,
2115};
2116
2117enum {
2118 MLX5_QPC_ATOMIC_MODE_IB_SPEC = 0x1,
2119 MLX5_QPC_ATOMIC_MODE_ONLY_8B = 0x2,
2120 MLX5_QPC_ATOMIC_MODE_UP_TO_8B = 0x3,
2121 MLX5_QPC_ATOMIC_MODE_UP_TO_16B = 0x4,
2122 MLX5_QPC_ATOMIC_MODE_UP_TO_32B = 0x5,
2123 MLX5_QPC_ATOMIC_MODE_UP_TO_64B = 0x6,
2124 MLX5_QPC_ATOMIC_MODE_UP_TO_128B = 0x7,
2125 MLX5_QPC_ATOMIC_MODE_UP_TO_256B = 0x8,
2126};
2127
2128enum {
2129 MLX5_QPC_CS_REQ_DISABLE = 0x0,
2130 MLX5_QPC_CS_REQ_UP_TO_32B = 0x11,
2131 MLX5_QPC_CS_REQ_UP_TO_64B = 0x22,
2132};
2133
2134enum {
2135 MLX5_QPC_CS_RES_DISABLE = 0x0,
2136 MLX5_QPC_CS_RES_UP_TO_32B = 0x1,
2137 MLX5_QPC_CS_RES_UP_TO_64B = 0x2,
2138};
2139
2140struct mlx5_ifc_qpc_bits {
2141 u8 state[0x4];
Aviv Heller84df61e2016-05-10 13:47:50 +03002142 u8 lag_tx_port_affinity[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002143 u8 st[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002144 u8 reserved_at_10[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002145 u8 pm_state[0x2];
Artemy Kovalyov6e446362017-08-15 11:59:02 +03002146 u8 reserved_at_15[0x3];
2147 u8 offload_type[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002148 u8 end_padding_mode[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002149 u8 reserved_at_1e[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002150
2151 u8 wq_signature[0x1];
2152 u8 block_lb_mc[0x1];
2153 u8 atomic_like_write_en[0x1];
2154 u8 latency_sensitive[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002155 u8 reserved_at_24[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002156 u8 drain_sigerr[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002157 u8 reserved_at_26[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002158 u8 pd[0x18];
2159
2160 u8 mtu[0x3];
2161 u8 log_msg_max[0x5];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002162 u8 reserved_at_48[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002163 u8 log_rq_size[0x4];
2164 u8 log_rq_stride[0x3];
2165 u8 no_sq[0x1];
2166 u8 log_sq_size[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002167 u8 reserved_at_55[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03002168 u8 rlky[0x1];
Erez Shitrit1015c2e2016-02-21 16:27:16 +02002169 u8 ulp_stateless_offload_mode[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002170
2171 u8 counter_set_id[0x8];
2172 u8 uar_page[0x18];
2173
Matan Barakb4ff3a32016-02-09 14:57:42 +02002174 u8 reserved_at_80[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002175 u8 user_index[0x18];
2176
Matan Barakb4ff3a32016-02-09 14:57:42 +02002177 u8 reserved_at_a0[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002178 u8 log_page_size[0x5];
2179 u8 remote_qpn[0x18];
2180
2181 struct mlx5_ifc_ads_bits primary_address_path;
2182
2183 struct mlx5_ifc_ads_bits secondary_address_path;
2184
2185 u8 log_ack_req_freq[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002186 u8 reserved_at_384[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002187 u8 log_sra_max[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002188 u8 reserved_at_38b[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002189 u8 retry_count[0x3];
2190 u8 rnr_retry[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002191 u8 reserved_at_393[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002192 u8 fre[0x1];
2193 u8 cur_rnr_retry[0x3];
2194 u8 cur_retry_count[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002195 u8 reserved_at_39b[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03002196
Matan Barakb4ff3a32016-02-09 14:57:42 +02002197 u8 reserved_at_3a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002198
Matan Barakb4ff3a32016-02-09 14:57:42 +02002199 u8 reserved_at_3c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002200 u8 next_send_psn[0x18];
2201
Matan Barakb4ff3a32016-02-09 14:57:42 +02002202 u8 reserved_at_3e0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002203 u8 cqn_snd[0x18];
2204
Saeed Mahameed09a7d9e2016-07-19 01:17:59 +03002205 u8 reserved_at_400[0x8];
2206 u8 deth_sqpn[0x18];
2207
2208 u8 reserved_at_420[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002209
Matan Barakb4ff3a32016-02-09 14:57:42 +02002210 u8 reserved_at_440[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002211 u8 last_acked_psn[0x18];
2212
Matan Barakb4ff3a32016-02-09 14:57:42 +02002213 u8 reserved_at_460[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002214 u8 ssn[0x18];
2215
Matan Barakb4ff3a32016-02-09 14:57:42 +02002216 u8 reserved_at_480[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002217 u8 log_rra_max[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002218 u8 reserved_at_48b[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002219 u8 atomic_mode[0x4];
2220 u8 rre[0x1];
2221 u8 rwe[0x1];
2222 u8 rae[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002223 u8 reserved_at_493[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002224 u8 page_offset[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002225 u8 reserved_at_49a[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002226 u8 cd_slave_receive[0x1];
2227 u8 cd_slave_send[0x1];
2228 u8 cd_master[0x1];
2229
Matan Barakb4ff3a32016-02-09 14:57:42 +02002230 u8 reserved_at_4a0[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002231 u8 min_rnr_nak[0x5];
2232 u8 next_rcv_psn[0x18];
2233
Matan Barakb4ff3a32016-02-09 14:57:42 +02002234 u8 reserved_at_4c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002235 u8 xrcd[0x18];
2236
Matan Barakb4ff3a32016-02-09 14:57:42 +02002237 u8 reserved_at_4e0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002238 u8 cqn_rcv[0x18];
2239
2240 u8 dbr_addr[0x40];
2241
2242 u8 q_key[0x20];
2243
Matan Barakb4ff3a32016-02-09 14:57:42 +02002244 u8 reserved_at_560[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03002245 u8 rq_type[0x3];
Saeed Mahameed74862162016-06-09 15:11:34 +03002246 u8 srqn_rmpn_xrqn[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002247
Matan Barakb4ff3a32016-02-09 14:57:42 +02002248 u8 reserved_at_580[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002249 u8 rmsn[0x18];
2250
2251 u8 hw_sq_wqebb_counter[0x10];
2252 u8 sw_sq_wqebb_counter[0x10];
2253
2254 u8 hw_rq_counter[0x20];
2255
2256 u8 sw_rq_counter[0x20];
2257
Matan Barakb4ff3a32016-02-09 14:57:42 +02002258 u8 reserved_at_600[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002259
Matan Barakb4ff3a32016-02-09 14:57:42 +02002260 u8 reserved_at_620[0xf];
Saeed Mahameede2816822015-05-28 22:28:40 +03002261 u8 cgs[0x1];
2262 u8 cs_req[0x8];
2263 u8 cs_res[0x8];
2264
2265 u8 dc_access_key[0x40];
2266
Matan Barakb4ff3a32016-02-09 14:57:42 +02002267 u8 reserved_at_680[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002268};
2269
2270struct mlx5_ifc_roce_addr_layout_bits {
2271 u8 source_l3_address[16][0x8];
2272
Matan Barakb4ff3a32016-02-09 14:57:42 +02002273 u8 reserved_at_80[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002274 u8 vlan_valid[0x1];
2275 u8 vlan_id[0xc];
2276 u8 source_mac_47_32[0x10];
2277
2278 u8 source_mac_31_0[0x20];
2279
Matan Barakb4ff3a32016-02-09 14:57:42 +02002280 u8 reserved_at_c0[0x14];
Saeed Mahameede2816822015-05-28 22:28:40 +03002281 u8 roce_l3_type[0x4];
2282 u8 roce_version[0x8];
2283
Matan Barakb4ff3a32016-02-09 14:57:42 +02002284 u8 reserved_at_e0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002285};
2286
2287union mlx5_ifc_hca_cap_union_bits {
2288 struct mlx5_ifc_cmd_hca_cap_bits cmd_hca_cap;
2289 struct mlx5_ifc_odp_cap_bits odp_cap;
2290 struct mlx5_ifc_atomic_caps_bits atomic_caps;
2291 struct mlx5_ifc_roce_cap_bits roce_cap;
2292 struct mlx5_ifc_per_protocol_networking_offload_caps_bits per_protocol_networking_offload_caps;
2293 struct mlx5_ifc_flow_table_nic_cap_bits flow_table_nic_cap;
Saeed Mahameed495716b2015-12-01 18:03:19 +02002294 struct mlx5_ifc_flow_table_eswitch_cap_bits flow_table_eswitch_cap;
Saeed Mahameedd6666752015-12-01 18:03:22 +02002295 struct mlx5_ifc_e_switch_cap_bits e_switch_cap;
Sagi Grimberg3f0393a2016-02-23 10:25:23 +02002296 struct mlx5_ifc_vector_calc_cap_bits vector_calc_cap;
Saeed Mahameed74862162016-06-09 15:11:34 +03002297 struct mlx5_ifc_qos_cap_bits qos_cap;
Ilan Tayarie29341f2017-03-13 20:05:45 +02002298 struct mlx5_ifc_fpga_cap_bits fpga_cap;
Matan Barakb4ff3a32016-02-09 14:57:42 +02002299 u8 reserved_at_0[0x8000];
Saeed Mahameede2816822015-05-28 22:28:40 +03002300};
2301
2302enum {
2303 MLX5_FLOW_CONTEXT_ACTION_ALLOW = 0x1,
2304 MLX5_FLOW_CONTEXT_ACTION_DROP = 0x2,
2305 MLX5_FLOW_CONTEXT_ACTION_FWD_DEST = 0x4,
Amir Vadai9dc0b282016-05-13 12:55:39 +00002306 MLX5_FLOW_CONTEXT_ACTION_COUNT = 0x8,
Hadar Hen Zion7adbde22016-08-03 15:08:33 +03002307 MLX5_FLOW_CONTEXT_ACTION_ENCAP = 0x10,
2308 MLX5_FLOW_CONTEXT_ACTION_DECAP = 0x20,
Or Gerlitz2a69cb92017-01-19 19:31:25 +02002309 MLX5_FLOW_CONTEXT_ACTION_MOD_HDR = 0x40,
Saeed Mahameede2816822015-05-28 22:28:40 +03002310};
2311
2312struct mlx5_ifc_flow_context_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002313 u8 reserved_at_0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002314
2315 u8 group_id[0x20];
2316
Matan Barakb4ff3a32016-02-09 14:57:42 +02002317 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002318 u8 flow_tag[0x18];
2319
Matan Barakb4ff3a32016-02-09 14:57:42 +02002320 u8 reserved_at_60[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03002321 u8 action[0x10];
2322
Matan Barakb4ff3a32016-02-09 14:57:42 +02002323 u8 reserved_at_80[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002324 u8 destination_list_size[0x18];
2325
Amir Vadai9dc0b282016-05-13 12:55:39 +00002326 u8 reserved_at_a0[0x8];
2327 u8 flow_counter_list_size[0x18];
2328
Hadar Hen Zion7adbde22016-08-03 15:08:33 +03002329 u8 encap_id[0x20];
2330
Or Gerlitz2a69cb92017-01-19 19:31:25 +02002331 u8 modify_header_id[0x20];
2332
2333 u8 reserved_at_100[0x100];
Saeed Mahameede2816822015-05-28 22:28:40 +03002334
2335 struct mlx5_ifc_fte_match_param_bits match_value;
2336
Matan Barakb4ff3a32016-02-09 14:57:42 +02002337 u8 reserved_at_1200[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03002338
Amir Vadai9dc0b282016-05-13 12:55:39 +00002339 union mlx5_ifc_dest_format_struct_flow_counter_list_auto_bits destination[0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002340};
2341
2342enum {
2343 MLX5_XRC_SRQC_STATE_GOOD = 0x0,
2344 MLX5_XRC_SRQC_STATE_ERROR = 0x1,
2345};
2346
2347struct mlx5_ifc_xrc_srqc_bits {
2348 u8 state[0x4];
2349 u8 log_xrc_srq_size[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002350 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002351
2352 u8 wq_signature[0x1];
2353 u8 cont_srq[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002354 u8 reserved_at_22[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002355 u8 rlky[0x1];
2356 u8 basic_cyclic_rcv_wqe[0x1];
2357 u8 log_rq_stride[0x3];
2358 u8 xrcd[0x18];
2359
2360 u8 page_offset[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002361 u8 reserved_at_46[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002362 u8 cqn[0x18];
2363
Matan Barakb4ff3a32016-02-09 14:57:42 +02002364 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002365
2366 u8 user_index_equal_xrc_srqn[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002367 u8 reserved_at_81[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002368 u8 log_page_size[0x6];
2369 u8 user_index[0x18];
2370
Matan Barakb4ff3a32016-02-09 14:57:42 +02002371 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002372
Matan Barakb4ff3a32016-02-09 14:57:42 +02002373 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002374 u8 pd[0x18];
2375
2376 u8 lwm[0x10];
2377 u8 wqe_cnt[0x10];
2378
Matan Barakb4ff3a32016-02-09 14:57:42 +02002379 u8 reserved_at_100[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03002380
2381 u8 db_record_addr_h[0x20];
2382
2383 u8 db_record_addr_l[0x1e];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002384 u8 reserved_at_17e[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002385
Matan Barakb4ff3a32016-02-09 14:57:42 +02002386 u8 reserved_at_180[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03002387};
2388
2389struct mlx5_ifc_traffic_counter_bits {
2390 u8 packets[0x40];
2391
2392 u8 octets[0x40];
2393};
2394
2395struct mlx5_ifc_tisc_bits {
Aviv Heller84df61e2016-05-10 13:47:50 +03002396 u8 strict_lag_tx_port_affinity[0x1];
2397 u8 reserved_at_1[0x3];
2398 u8 lag_tx_port_affinity[0x04];
2399
2400 u8 reserved_at_8[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002401 u8 prio[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002402 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03002403
Matan Barakb4ff3a32016-02-09 14:57:42 +02002404 u8 reserved_at_20[0x100];
Saeed Mahameede2816822015-05-28 22:28:40 +03002405
Matan Barakb4ff3a32016-02-09 14:57:42 +02002406 u8 reserved_at_120[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002407 u8 transport_domain[0x18];
2408
Erez Shitrit500a3d02017-04-13 06:36:51 +03002409 u8 reserved_at_140[0x8];
2410 u8 underlay_qpn[0x18];
2411 u8 reserved_at_160[0x3a0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002412};
2413
2414enum {
2415 MLX5_TIRC_DISP_TYPE_DIRECT = 0x0,
2416 MLX5_TIRC_DISP_TYPE_INDIRECT = 0x1,
2417};
2418
2419enum {
2420 MLX5_TIRC_LRO_ENABLE_MASK_IPV4_LRO = 0x1,
2421 MLX5_TIRC_LRO_ENABLE_MASK_IPV6_LRO = 0x2,
2422};
2423
2424enum {
Saeed Mahameed2be69672015-07-23 23:35:56 +03002425 MLX5_RX_HASH_FN_NONE = 0x0,
2426 MLX5_RX_HASH_FN_INVERTED_XOR8 = 0x1,
2427 MLX5_RX_HASH_FN_TOEPLITZ = 0x2,
Saeed Mahameede2816822015-05-28 22:28:40 +03002428};
2429
2430enum {
2431 MLX5_TIRC_SELF_LB_BLOCK_BLOCK_UNICAST_ = 0x1,
2432 MLX5_TIRC_SELF_LB_BLOCK_BLOCK_MULTICAST_ = 0x2,
2433};
2434
2435struct mlx5_ifc_tirc_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002436 u8 reserved_at_0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002437
2438 u8 disp_type[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002439 u8 reserved_at_24[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03002440
Matan Barakb4ff3a32016-02-09 14:57:42 +02002441 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03002442
Matan Barakb4ff3a32016-02-09 14:57:42 +02002443 u8 reserved_at_80[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002444 u8 lro_timeout_period_usecs[0x10];
2445 u8 lro_enable_mask[0x4];
2446 u8 lro_max_ip_payload_size[0x8];
2447
Matan Barakb4ff3a32016-02-09 14:57:42 +02002448 u8 reserved_at_a0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03002449
Matan Barakb4ff3a32016-02-09 14:57:42 +02002450 u8 reserved_at_e0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002451 u8 inline_rqn[0x18];
2452
2453 u8 rx_hash_symmetric[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002454 u8 reserved_at_101[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002455 u8 tunneled_offload_en[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002456 u8 reserved_at_103[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03002457 u8 indirect_table[0x18];
2458
2459 u8 rx_hash_fn[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002460 u8 reserved_at_124[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002461 u8 self_lb_block[0x2];
2462 u8 transport_domain[0x18];
2463
2464 u8 rx_hash_toeplitz_key[10][0x20];
2465
2466 struct mlx5_ifc_rx_hash_field_select_bits rx_hash_field_selector_outer;
2467
2468 struct mlx5_ifc_rx_hash_field_select_bits rx_hash_field_selector_inner;
2469
Matan Barakb4ff3a32016-02-09 14:57:42 +02002470 u8 reserved_at_2c0[0x4c0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002471};
2472
2473enum {
2474 MLX5_SRQC_STATE_GOOD = 0x0,
2475 MLX5_SRQC_STATE_ERROR = 0x1,
2476};
2477
2478struct mlx5_ifc_srqc_bits {
2479 u8 state[0x4];
2480 u8 log_srq_size[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002481 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002482
2483 u8 wq_signature[0x1];
2484 u8 cont_srq[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002485 u8 reserved_at_22[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002486 u8 rlky[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002487 u8 reserved_at_24[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002488 u8 log_rq_stride[0x3];
2489 u8 xrcd[0x18];
2490
2491 u8 page_offset[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002492 u8 reserved_at_46[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002493 u8 cqn[0x18];
2494
Matan Barakb4ff3a32016-02-09 14:57:42 +02002495 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002496
Matan Barakb4ff3a32016-02-09 14:57:42 +02002497 u8 reserved_at_80[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002498 u8 log_page_size[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002499 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002500
Matan Barakb4ff3a32016-02-09 14:57:42 +02002501 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002502
Matan Barakb4ff3a32016-02-09 14:57:42 +02002503 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002504 u8 pd[0x18];
2505
2506 u8 lwm[0x10];
2507 u8 wqe_cnt[0x10];
2508
Matan Barakb4ff3a32016-02-09 14:57:42 +02002509 u8 reserved_at_100[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03002510
Haggai Abramonvsky01949d02015-06-04 19:30:38 +03002511 u8 dbr_addr[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03002512
Matan Barakb4ff3a32016-02-09 14:57:42 +02002513 u8 reserved_at_180[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03002514};
2515
2516enum {
2517 MLX5_SQC_STATE_RST = 0x0,
2518 MLX5_SQC_STATE_RDY = 0x1,
2519 MLX5_SQC_STATE_ERR = 0x3,
2520};
2521
2522struct mlx5_ifc_sqc_bits {
2523 u8 rlky[0x1];
2524 u8 cd_master[0x1];
2525 u8 fre[0x1];
2526 u8 flush_in_error_en[0x1];
Bodong Wang795b6092017-08-17 15:52:34 +03002527 u8 allow_multi_pkt_send_wqe[0x1];
Hadar Hen Zioncff92d72016-07-24 16:12:40 +03002528 u8 min_wqe_inline_mode[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002529 u8 state[0x4];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03002530 u8 reg_umr[0x1];
Ilan Tayari547eede2017-04-18 16:04:28 +03002531 u8 allow_swp[0x1];
Or Gerlitz40817cd2017-06-25 12:38:45 +03002532 u8 hairpin[0x1];
2533 u8 reserved_at_f[0x11];
Saeed Mahameede2816822015-05-28 22:28:40 +03002534
Matan Barakb4ff3a32016-02-09 14:57:42 +02002535 u8 reserved_at_20[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002536 u8 user_index[0x18];
2537
Matan Barakb4ff3a32016-02-09 14:57:42 +02002538 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002539 u8 cqn[0x18];
2540
Or Gerlitz40817cd2017-06-25 12:38:45 +03002541 u8 reserved_at_60[0x8];
2542 u8 hairpin_peer_rq[0x18];
2543
2544 u8 reserved_at_80[0x10];
2545 u8 hairpin_peer_vhca[0x10];
2546
2547 u8 reserved_at_a0[0x50];
Saeed Mahameede2816822015-05-28 22:28:40 +03002548
Saeed Mahameed74862162016-06-09 15:11:34 +03002549 u8 packet_pacing_rate_limit_index[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03002550 u8 tis_lst_sz[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002551 u8 reserved_at_110[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03002552
Matan Barakb4ff3a32016-02-09 14:57:42 +02002553 u8 reserved_at_120[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03002554
Matan Barakb4ff3a32016-02-09 14:57:42 +02002555 u8 reserved_at_160[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002556 u8 tis_num_0[0x18];
2557
2558 struct mlx5_ifc_wq_bits wq;
2559};
2560
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +03002561enum {
2562 SCHEDULING_CONTEXT_ELEMENT_TYPE_TSAR = 0x0,
2563 SCHEDULING_CONTEXT_ELEMENT_TYPE_VPORT = 0x1,
2564 SCHEDULING_CONTEXT_ELEMENT_TYPE_VPORT_TC = 0x2,
2565 SCHEDULING_CONTEXT_ELEMENT_TYPE_PARA_VPORT_TC = 0x3,
2566};
2567
2568struct mlx5_ifc_scheduling_context_bits {
2569 u8 element_type[0x8];
2570 u8 reserved_at_8[0x18];
2571
2572 u8 element_attributes[0x20];
2573
2574 u8 parent_element_id[0x20];
2575
2576 u8 reserved_at_60[0x40];
2577
2578 u8 bw_share[0x20];
2579
2580 u8 max_average_bw[0x20];
2581
2582 u8 reserved_at_e0[0x120];
2583};
2584
Saeed Mahameede2816822015-05-28 22:28:40 +03002585struct mlx5_ifc_rqtc_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002586 u8 reserved_at_0[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002587
Matan Barakb4ff3a32016-02-09 14:57:42 +02002588 u8 reserved_at_a0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03002589 u8 rqt_max_size[0x10];
2590
Matan Barakb4ff3a32016-02-09 14:57:42 +02002591 u8 reserved_at_c0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03002592 u8 rqt_actual_size[0x10];
2593
Matan Barakb4ff3a32016-02-09 14:57:42 +02002594 u8 reserved_at_e0[0x6a0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002595
2596 struct mlx5_ifc_rq_num_bits rq_num[0];
2597};
2598
2599enum {
2600 MLX5_RQC_MEM_RQ_TYPE_MEMORY_RQ_INLINE = 0x0,
2601 MLX5_RQC_MEM_RQ_TYPE_MEMORY_RQ_RMP = 0x1,
2602};
2603
2604enum {
2605 MLX5_RQC_STATE_RST = 0x0,
2606 MLX5_RQC_STATE_RDY = 0x1,
2607 MLX5_RQC_STATE_ERR = 0x3,
2608};
2609
2610struct mlx5_ifc_rqc_bits {
2611 u8 rlky[0x1];
Maor Gottlieb03404e82017-05-30 10:29:13 +03002612 u8 delay_drop_en[0x1];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03002613 u8 scatter_fcs[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002614 u8 vsd[0x1];
2615 u8 mem_rq_type[0x4];
2616 u8 state[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002617 u8 reserved_at_c[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002618 u8 flush_in_error_en[0x1];
Or Gerlitz40817cd2017-06-25 12:38:45 +03002619 u8 hairpin[0x1];
2620 u8 reserved_at_f[0x11];
Saeed Mahameede2816822015-05-28 22:28:40 +03002621
Matan Barakb4ff3a32016-02-09 14:57:42 +02002622 u8 reserved_at_20[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002623 u8 user_index[0x18];
2624
Matan Barakb4ff3a32016-02-09 14:57:42 +02002625 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002626 u8 cqn[0x18];
2627
2628 u8 counter_set_id[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002629 u8 reserved_at_68[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002630
Matan Barakb4ff3a32016-02-09 14:57:42 +02002631 u8 reserved_at_80[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002632 u8 rmpn[0x18];
2633
Or Gerlitz40817cd2017-06-25 12:38:45 +03002634 u8 reserved_at_a0[0x8];
2635 u8 hairpin_peer_sq[0x18];
2636
2637 u8 reserved_at_c0[0x10];
2638 u8 hairpin_peer_vhca[0x10];
2639
2640 u8 reserved_at_e0[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002641
2642 struct mlx5_ifc_wq_bits wq;
2643};
2644
2645enum {
2646 MLX5_RMPC_STATE_RDY = 0x1,
2647 MLX5_RMPC_STATE_ERR = 0x3,
2648};
2649
2650struct mlx5_ifc_rmpc_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002651 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002652 u8 state[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002653 u8 reserved_at_c[0x14];
Saeed Mahameede2816822015-05-28 22:28:40 +03002654
2655 u8 basic_cyclic_rcv_wqe[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002656 u8 reserved_at_21[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03002657
Matan Barakb4ff3a32016-02-09 14:57:42 +02002658 u8 reserved_at_40[0x140];
Saeed Mahameede2816822015-05-28 22:28:40 +03002659
2660 struct mlx5_ifc_wq_bits wq;
2661};
2662
Saeed Mahameede2816822015-05-28 22:28:40 +03002663struct mlx5_ifc_nic_vport_context_bits {
Hadar Hen Zioncff92d72016-07-24 16:12:40 +03002664 u8 reserved_at_0[0x5];
2665 u8 min_wqe_inline_mode[0x3];
Huy Nguyenbded7472017-05-30 09:42:53 +03002666 u8 reserved_at_8[0x15];
2667 u8 disable_mc_local_lb[0x1];
2668 u8 disable_uc_local_lb[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002669 u8 roce_en[0x1];
2670
Saeed Mahameedd82b7312015-12-01 18:03:14 +02002671 u8 arm_change_event[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002672 u8 reserved_at_21[0x1a];
Saeed Mahameedd82b7312015-12-01 18:03:14 +02002673 u8 event_on_mtu[0x1];
2674 u8 event_on_promisc_change[0x1];
2675 u8 event_on_vlan_change[0x1];
2676 u8 event_on_mc_address_change[0x1];
2677 u8 event_on_uc_address_change[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002678
Daniel Jurgens32f69e42018-01-04 17:25:36 +02002679 u8 reserved_at_40[0xc];
2680
2681 u8 affiliation_criteria[0x4];
2682 u8 affiliated_vhca_id[0x10];
2683
2684 u8 reserved_at_60[0xd0];
Saeed Mahameedd82b7312015-12-01 18:03:14 +02002685
2686 u8 mtu[0x10];
2687
Achiad Shochat9efa7522015-12-23 18:47:20 +02002688 u8 system_image_guid[0x40];
2689 u8 port_guid[0x40];
2690 u8 node_guid[0x40];
2691
Matan Barakb4ff3a32016-02-09 14:57:42 +02002692 u8 reserved_at_200[0x140];
Achiad Shochat9efa7522015-12-23 18:47:20 +02002693 u8 qkey_violation_counter[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002694 u8 reserved_at_350[0x430];
Saeed Mahameedd82b7312015-12-01 18:03:14 +02002695
2696 u8 promisc_uc[0x1];
2697 u8 promisc_mc[0x1];
2698 u8 promisc_all[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002699 u8 reserved_at_783[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002700 u8 allowed_list_type[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002701 u8 reserved_at_788[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03002702 u8 allowed_list_size[0xc];
2703
2704 struct mlx5_ifc_mac_address_layout_bits permanent_address;
2705
Matan Barakb4ff3a32016-02-09 14:57:42 +02002706 u8 reserved_at_7e0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002707
2708 u8 current_uc_mac_address[0][0x40];
2709};
2710
2711enum {
2712 MLX5_MKC_ACCESS_MODE_PA = 0x0,
2713 MLX5_MKC_ACCESS_MODE_MTT = 0x1,
2714 MLX5_MKC_ACCESS_MODE_KLMS = 0x2,
Artemy Kovalyovbcda1ac2017-01-02 11:37:41 +02002715 MLX5_MKC_ACCESS_MODE_KSM = 0x3,
Saeed Mahameede2816822015-05-28 22:28:40 +03002716};
2717
2718struct mlx5_ifc_mkc_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002719 u8 reserved_at_0[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002720 u8 free[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002721 u8 reserved_at_2[0xd];
Saeed Mahameede2816822015-05-28 22:28:40 +03002722 u8 small_fence_on_rdma_read_response[0x1];
2723 u8 umr_en[0x1];
2724 u8 a[0x1];
2725 u8 rw[0x1];
2726 u8 rr[0x1];
2727 u8 lw[0x1];
2728 u8 lr[0x1];
2729 u8 access_mode[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002730 u8 reserved_at_18[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002731
2732 u8 qpn[0x18];
2733 u8 mkey_7_0[0x8];
2734
Matan Barakb4ff3a32016-02-09 14:57:42 +02002735 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002736
2737 u8 length64[0x1];
2738 u8 bsf_en[0x1];
2739 u8 sync_umr[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002740 u8 reserved_at_63[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002741 u8 expected_sigerr_count[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002742 u8 reserved_at_66[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002743 u8 en_rinval[0x1];
2744 u8 pd[0x18];
2745
2746 u8 start_addr[0x40];
2747
2748 u8 len[0x40];
2749
2750 u8 bsf_octword_size[0x20];
2751
Matan Barakb4ff3a32016-02-09 14:57:42 +02002752 u8 reserved_at_120[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03002753
2754 u8 translations_octword_size[0x20];
2755
Matan Barakb4ff3a32016-02-09 14:57:42 +02002756 u8 reserved_at_1c0[0x1b];
Saeed Mahameede2816822015-05-28 22:28:40 +03002757 u8 log_page_size[0x5];
2758
Matan Barakb4ff3a32016-02-09 14:57:42 +02002759 u8 reserved_at_1e0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002760};
2761
2762struct mlx5_ifc_pkey_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002763 u8 reserved_at_0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03002764 u8 pkey[0x10];
2765};
2766
2767struct mlx5_ifc_array128_auto_bits {
2768 u8 array128_auto[16][0x8];
2769};
2770
2771struct mlx5_ifc_hca_vport_context_bits {
2772 u8 field_select[0x20];
2773
Matan Barakb4ff3a32016-02-09 14:57:42 +02002774 u8 reserved_at_20[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002775
2776 u8 sm_virt_aware[0x1];
2777 u8 has_smi[0x1];
2778 u8 has_raw[0x1];
2779 u8 grh_required[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002780 u8 reserved_at_104[0xc];
Majd Dibbiny707c4602015-06-04 19:30:41 +03002781 u8 port_physical_state[0x4];
2782 u8 vport_state_policy[0x4];
2783 u8 port_state[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002784 u8 vport_state[0x4];
2785
Matan Barakb4ff3a32016-02-09 14:57:42 +02002786 u8 reserved_at_120[0x20];
Majd Dibbiny707c4602015-06-04 19:30:41 +03002787
2788 u8 system_image_guid[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03002789
2790 u8 port_guid[0x40];
2791
2792 u8 node_guid[0x40];
2793
2794 u8 cap_mask1[0x20];
2795
2796 u8 cap_mask1_field_select[0x20];
2797
2798 u8 cap_mask2[0x20];
2799
2800 u8 cap_mask2_field_select[0x20];
2801
Matan Barakb4ff3a32016-02-09 14:57:42 +02002802 u8 reserved_at_280[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03002803
2804 u8 lid[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002805 u8 reserved_at_310[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002806 u8 init_type_reply[0x4];
2807 u8 lmc[0x3];
2808 u8 subnet_timeout[0x5];
2809
2810 u8 sm_lid[0x10];
2811 u8 sm_sl[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002812 u8 reserved_at_334[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03002813
2814 u8 qkey_violation_counter[0x10];
2815 u8 pkey_violation_counter[0x10];
2816
Matan Barakb4ff3a32016-02-09 14:57:42 +02002817 u8 reserved_at_360[0xca0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002818};
2819
Saeed Mahameedd6666752015-12-01 18:03:22 +02002820struct mlx5_ifc_esw_vport_context_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002821 u8 reserved_at_0[0x3];
Saeed Mahameedd6666752015-12-01 18:03:22 +02002822 u8 vport_svlan_strip[0x1];
2823 u8 vport_cvlan_strip[0x1];
2824 u8 vport_svlan_insert[0x1];
2825 u8 vport_cvlan_insert[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002826 u8 reserved_at_8[0x18];
Saeed Mahameedd6666752015-12-01 18:03:22 +02002827
Matan Barakb4ff3a32016-02-09 14:57:42 +02002828 u8 reserved_at_20[0x20];
Saeed Mahameedd6666752015-12-01 18:03:22 +02002829
2830 u8 svlan_cfi[0x1];
2831 u8 svlan_pcp[0x3];
2832 u8 svlan_id[0xc];
2833 u8 cvlan_cfi[0x1];
2834 u8 cvlan_pcp[0x3];
2835 u8 cvlan_id[0xc];
2836
Matan Barakb4ff3a32016-02-09 14:57:42 +02002837 u8 reserved_at_60[0x7a0];
Saeed Mahameedd6666752015-12-01 18:03:22 +02002838};
2839
Saeed Mahameede2816822015-05-28 22:28:40 +03002840enum {
2841 MLX5_EQC_STATUS_OK = 0x0,
2842 MLX5_EQC_STATUS_EQ_WRITE_FAILURE = 0xa,
2843};
2844
2845enum {
2846 MLX5_EQC_ST_ARMED = 0x9,
2847 MLX5_EQC_ST_FIRED = 0xa,
2848};
2849
2850struct mlx5_ifc_eqc_bits {
2851 u8 status[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002852 u8 reserved_at_4[0x9];
Saeed Mahameede2816822015-05-28 22:28:40 +03002853 u8 ec[0x1];
2854 u8 oi[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002855 u8 reserved_at_f[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03002856 u8 st[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002857 u8 reserved_at_18[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002858
Matan Barakb4ff3a32016-02-09 14:57:42 +02002859 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002860
Matan Barakb4ff3a32016-02-09 14:57:42 +02002861 u8 reserved_at_40[0x14];
Saeed Mahameede2816822015-05-28 22:28:40 +03002862 u8 page_offset[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002863 u8 reserved_at_5a[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03002864
Matan Barakb4ff3a32016-02-09 14:57:42 +02002865 u8 reserved_at_60[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002866 u8 log_eq_size[0x5];
2867 u8 uar_page[0x18];
2868
Matan Barakb4ff3a32016-02-09 14:57:42 +02002869 u8 reserved_at_80[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002870
Matan Barakb4ff3a32016-02-09 14:57:42 +02002871 u8 reserved_at_a0[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002872 u8 intr[0x8];
2873
Matan Barakb4ff3a32016-02-09 14:57:42 +02002874 u8 reserved_at_c0[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002875 u8 log_page_size[0x5];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002876 u8 reserved_at_c8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002877
Matan Barakb4ff3a32016-02-09 14:57:42 +02002878 u8 reserved_at_e0[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03002879
Matan Barakb4ff3a32016-02-09 14:57:42 +02002880 u8 reserved_at_140[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002881 u8 consumer_counter[0x18];
2882
Matan Barakb4ff3a32016-02-09 14:57:42 +02002883 u8 reserved_at_160[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002884 u8 producer_counter[0x18];
2885
Matan Barakb4ff3a32016-02-09 14:57:42 +02002886 u8 reserved_at_180[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03002887};
2888
2889enum {
2890 MLX5_DCTC_STATE_ACTIVE = 0x0,
2891 MLX5_DCTC_STATE_DRAINING = 0x1,
2892 MLX5_DCTC_STATE_DRAINED = 0x2,
2893};
2894
2895enum {
2896 MLX5_DCTC_CS_RES_DISABLE = 0x0,
2897 MLX5_DCTC_CS_RES_NA = 0x1,
2898 MLX5_DCTC_CS_RES_UP_TO_64B = 0x2,
2899};
2900
2901enum {
2902 MLX5_DCTC_MTU_256_BYTES = 0x1,
2903 MLX5_DCTC_MTU_512_BYTES = 0x2,
2904 MLX5_DCTC_MTU_1K_BYTES = 0x3,
2905 MLX5_DCTC_MTU_2K_BYTES = 0x4,
2906 MLX5_DCTC_MTU_4K_BYTES = 0x5,
2907};
2908
2909struct mlx5_ifc_dctc_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002910 u8 reserved_at_0[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002911 u8 state[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002912 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002913
Matan Barakb4ff3a32016-02-09 14:57:42 +02002914 u8 reserved_at_20[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002915 u8 user_index[0x18];
2916
Matan Barakb4ff3a32016-02-09 14:57:42 +02002917 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002918 u8 cqn[0x18];
2919
2920 u8 counter_set_id[0x8];
2921 u8 atomic_mode[0x4];
2922 u8 rre[0x1];
2923 u8 rwe[0x1];
2924 u8 rae[0x1];
2925 u8 atomic_like_write_en[0x1];
2926 u8 latency_sensitive[0x1];
2927 u8 rlky[0x1];
2928 u8 free_ar[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002929 u8 reserved_at_73[0xd];
Saeed Mahameede2816822015-05-28 22:28:40 +03002930
Matan Barakb4ff3a32016-02-09 14:57:42 +02002931 u8 reserved_at_80[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002932 u8 cs_res[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002933 u8 reserved_at_90[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002934 u8 min_rnr_nak[0x5];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002935 u8 reserved_at_98[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002936
Matan Barakb4ff3a32016-02-09 14:57:42 +02002937 u8 reserved_at_a0[0x8];
Saeed Mahameed74862162016-06-09 15:11:34 +03002938 u8 srqn_xrqn[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002939
Matan Barakb4ff3a32016-02-09 14:57:42 +02002940 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002941 u8 pd[0x18];
2942
2943 u8 tclass[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002944 u8 reserved_at_e8[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002945 u8 flow_label[0x14];
2946
2947 u8 dc_access_key[0x40];
2948
Matan Barakb4ff3a32016-02-09 14:57:42 +02002949 u8 reserved_at_140[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03002950 u8 mtu[0x3];
2951 u8 port[0x8];
2952 u8 pkey_index[0x10];
2953
Matan Barakb4ff3a32016-02-09 14:57:42 +02002954 u8 reserved_at_160[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002955 u8 my_addr_index[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002956 u8 reserved_at_170[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002957 u8 hop_limit[0x8];
2958
2959 u8 dc_access_key_violation_count[0x20];
2960
Matan Barakb4ff3a32016-02-09 14:57:42 +02002961 u8 reserved_at_1a0[0x14];
Saeed Mahameede2816822015-05-28 22:28:40 +03002962 u8 dei_cfi[0x1];
2963 u8 eth_prio[0x3];
2964 u8 ecn[0x2];
2965 u8 dscp[0x6];
2966
Matan Barakb4ff3a32016-02-09 14:57:42 +02002967 u8 reserved_at_1c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03002968};
2969
2970enum {
2971 MLX5_CQC_STATUS_OK = 0x0,
2972 MLX5_CQC_STATUS_CQ_OVERFLOW = 0x9,
2973 MLX5_CQC_STATUS_CQ_WRITE_FAIL = 0xa,
2974};
2975
2976enum {
2977 MLX5_CQC_CQE_SZ_64_BYTES = 0x0,
2978 MLX5_CQC_CQE_SZ_128_BYTES = 0x1,
2979};
2980
2981enum {
2982 MLX5_CQC_ST_SOLICITED_NOTIFICATION_REQUEST_ARMED = 0x6,
2983 MLX5_CQC_ST_NOTIFICATION_REQUEST_ARMED = 0x9,
2984 MLX5_CQC_ST_FIRED = 0xa,
2985};
2986
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03002987enum {
2988 MLX5_CQ_PERIOD_MODE_START_FROM_EQE = 0x0,
2989 MLX5_CQ_PERIOD_MODE_START_FROM_CQE = 0x1,
Saeed Mahameed74862162016-06-09 15:11:34 +03002990 MLX5_CQ_PERIOD_NUM_MODES
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03002991};
2992
Saeed Mahameede2816822015-05-28 22:28:40 +03002993struct mlx5_ifc_cqc_bits {
2994 u8 status[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002995 u8 reserved_at_4[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002996 u8 cqe_sz[0x3];
2997 u8 cc[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002998 u8 reserved_at_c[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002999 u8 scqe_break_moderation_en[0x1];
3000 u8 oi[0x1];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03003001 u8 cq_period_mode[0x2];
3002 u8 cqe_comp_en[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03003003 u8 mini_cqe_res_format[0x2];
3004 u8 st[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003005 u8 reserved_at_18[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003006
Matan Barakb4ff3a32016-02-09 14:57:42 +02003007 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003008
Matan Barakb4ff3a32016-02-09 14:57:42 +02003009 u8 reserved_at_40[0x14];
Saeed Mahameede2816822015-05-28 22:28:40 +03003010 u8 page_offset[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003011 u8 reserved_at_5a[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03003012
Matan Barakb4ff3a32016-02-09 14:57:42 +02003013 u8 reserved_at_60[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03003014 u8 log_cq_size[0x5];
3015 u8 uar_page[0x18];
3016
Matan Barakb4ff3a32016-02-09 14:57:42 +02003017 u8 reserved_at_80[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03003018 u8 cq_period[0xc];
3019 u8 cq_max_count[0x10];
3020
Matan Barakb4ff3a32016-02-09 14:57:42 +02003021 u8 reserved_at_a0[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003022 u8 c_eqn[0x8];
3023
Matan Barakb4ff3a32016-02-09 14:57:42 +02003024 u8 reserved_at_c0[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03003025 u8 log_page_size[0x5];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003026 u8 reserved_at_c8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003027
Matan Barakb4ff3a32016-02-09 14:57:42 +02003028 u8 reserved_at_e0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003029
Matan Barakb4ff3a32016-02-09 14:57:42 +02003030 u8 reserved_at_100[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003031 u8 last_notified_index[0x18];
3032
Matan Barakb4ff3a32016-02-09 14:57:42 +02003033 u8 reserved_at_120[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003034 u8 last_solicit_index[0x18];
3035
Matan Barakb4ff3a32016-02-09 14:57:42 +02003036 u8 reserved_at_140[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003037 u8 consumer_counter[0x18];
3038
Matan Barakb4ff3a32016-02-09 14:57:42 +02003039 u8 reserved_at_160[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003040 u8 producer_counter[0x18];
3041
Matan Barakb4ff3a32016-02-09 14:57:42 +02003042 u8 reserved_at_180[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003043
3044 u8 dbr_addr[0x40];
3045};
3046
3047union mlx5_ifc_cong_control_roce_ecn_auto_bits {
3048 struct mlx5_ifc_cong_control_802_1qau_rp_bits cong_control_802_1qau_rp;
3049 struct mlx5_ifc_cong_control_r_roce_ecn_rp_bits cong_control_r_roce_ecn_rp;
3050 struct mlx5_ifc_cong_control_r_roce_ecn_np_bits cong_control_r_roce_ecn_np;
Matan Barakb4ff3a32016-02-09 14:57:42 +02003051 u8 reserved_at_0[0x800];
Saeed Mahameede2816822015-05-28 22:28:40 +03003052};
3053
3054struct mlx5_ifc_query_adapter_param_block_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02003055 u8 reserved_at_0[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003056
Matan Barakb4ff3a32016-02-09 14:57:42 +02003057 u8 reserved_at_c0[0x8];
Majd Dibbiny211e6c82015-06-04 19:30:42 +03003058 u8 ieee_vendor_id[0x18];
3059
Matan Barakb4ff3a32016-02-09 14:57:42 +02003060 u8 reserved_at_e0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003061 u8 vsd_vendor_id[0x10];
3062
3063 u8 vsd[208][0x8];
3064
3065 u8 vsd_contd_psid[16][0x8];
3066};
3067
Saeed Mahameed74862162016-06-09 15:11:34 +03003068enum {
3069 MLX5_XRQC_STATE_GOOD = 0x0,
3070 MLX5_XRQC_STATE_ERROR = 0x1,
3071};
3072
3073enum {
3074 MLX5_XRQC_TOPOLOGY_NO_SPECIAL_TOPOLOGY = 0x0,
3075 MLX5_XRQC_TOPOLOGY_TAG_MATCHING = 0x1,
3076};
3077
3078enum {
3079 MLX5_XRQC_OFFLOAD_RNDV = 0x1,
3080};
3081
3082struct mlx5_ifc_tag_matching_topology_context_bits {
3083 u8 log_matching_list_sz[0x4];
3084 u8 reserved_at_4[0xc];
3085 u8 append_next_index[0x10];
3086
3087 u8 sw_phase_cnt[0x10];
3088 u8 hw_phase_cnt[0x10];
3089
3090 u8 reserved_at_40[0x40];
3091};
3092
3093struct mlx5_ifc_xrqc_bits {
3094 u8 state[0x4];
3095 u8 rlkey[0x1];
3096 u8 reserved_at_5[0xf];
3097 u8 topology[0x4];
3098 u8 reserved_at_18[0x4];
3099 u8 offload[0x4];
3100
3101 u8 reserved_at_20[0x8];
3102 u8 user_index[0x18];
3103
3104 u8 reserved_at_40[0x8];
3105 u8 cqn[0x18];
3106
3107 u8 reserved_at_60[0xa0];
3108
3109 struct mlx5_ifc_tag_matching_topology_context_bits tag_matching_topology_context;
3110
Artemy Kovalyov6e446362017-08-15 11:59:02 +03003111 u8 reserved_at_180[0x280];
Saeed Mahameed74862162016-06-09 15:11:34 +03003112
3113 struct mlx5_ifc_wq_bits wq;
3114};
3115
Saeed Mahameede2816822015-05-28 22:28:40 +03003116union mlx5_ifc_modify_field_select_resize_field_select_auto_bits {
3117 struct mlx5_ifc_modify_field_select_bits modify_field_select;
3118 struct mlx5_ifc_resize_field_select_bits resize_field_select;
Matan Barakb4ff3a32016-02-09 14:57:42 +02003119 u8 reserved_at_0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003120};
3121
3122union mlx5_ifc_field_select_802_1_r_roce_auto_bits {
3123 struct mlx5_ifc_field_select_802_1qau_rp_bits field_select_802_1qau_rp;
3124 struct mlx5_ifc_field_select_r_roce_rp_bits field_select_r_roce_rp;
3125 struct mlx5_ifc_field_select_r_roce_np_bits field_select_r_roce_np;
Matan Barakb4ff3a32016-02-09 14:57:42 +02003126 u8 reserved_at_0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003127};
3128
3129union mlx5_ifc_eth_cntrs_grp_data_layout_auto_bits {
3130 struct mlx5_ifc_eth_802_3_cntrs_grp_data_layout_bits eth_802_3_cntrs_grp_data_layout;
3131 struct mlx5_ifc_eth_2863_cntrs_grp_data_layout_bits eth_2863_cntrs_grp_data_layout;
3132 struct mlx5_ifc_eth_2819_cntrs_grp_data_layout_bits eth_2819_cntrs_grp_data_layout;
3133 struct mlx5_ifc_eth_3635_cntrs_grp_data_layout_bits eth_3635_cntrs_grp_data_layout;
3134 struct mlx5_ifc_eth_extended_cntrs_grp_data_layout_bits eth_extended_cntrs_grp_data_layout;
3135 struct mlx5_ifc_eth_per_prio_grp_data_layout_bits eth_per_prio_grp_data_layout;
3136 struct mlx5_ifc_eth_per_traffic_grp_data_layout_bits eth_per_traffic_grp_data_layout;
Meny Yossefi1c64bf62016-02-18 18:15:00 +02003137 struct mlx5_ifc_ib_port_cntrs_grp_data_layout_bits ib_port_cntrs_grp_data_layout;
Saeed Mahameede2816822015-05-28 22:28:40 +03003138 struct mlx5_ifc_phys_layer_cntrs_bits phys_layer_cntrs;
Gal Pressmand8dc0502016-09-27 17:04:51 +03003139 struct mlx5_ifc_phys_layer_statistical_cntrs_bits phys_layer_statistical_cntrs;
Matan Barakb4ff3a32016-02-09 14:57:42 +02003140 u8 reserved_at_0[0x7c0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003141};
3142
Gal Pressman8ed1a632016-11-17 13:46:01 +02003143union mlx5_ifc_pcie_cntrs_grp_data_layout_auto_bits {
3144 struct mlx5_ifc_pcie_perf_cntrs_grp_data_layout_bits pcie_perf_cntrs_grp_data_layout;
3145 u8 reserved_at_0[0x7c0];
3146};
3147
Saeed Mahameede2816822015-05-28 22:28:40 +03003148union mlx5_ifc_event_auto_bits {
3149 struct mlx5_ifc_comp_event_bits comp_event;
3150 struct mlx5_ifc_dct_events_bits dct_events;
3151 struct mlx5_ifc_qp_events_bits qp_events;
3152 struct mlx5_ifc_wqe_associated_page_fault_event_bits wqe_associated_page_fault_event;
3153 struct mlx5_ifc_rdma_page_fault_event_bits rdma_page_fault_event;
3154 struct mlx5_ifc_cq_error_bits cq_error;
3155 struct mlx5_ifc_dropped_packet_logged_bits dropped_packet_logged;
3156 struct mlx5_ifc_port_state_change_event_bits port_state_change_event;
3157 struct mlx5_ifc_gpio_event_bits gpio_event;
3158 struct mlx5_ifc_db_bf_congestion_event_bits db_bf_congestion_event;
3159 struct mlx5_ifc_stall_vl_event_bits stall_vl_event;
3160 struct mlx5_ifc_cmd_inter_comp_event_bits cmd_inter_comp_event;
Matan Barakb4ff3a32016-02-09 14:57:42 +02003161 u8 reserved_at_0[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003162};
3163
3164struct mlx5_ifc_health_buffer_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02003165 u8 reserved_at_0[0x100];
Saeed Mahameede2816822015-05-28 22:28:40 +03003166
3167 u8 assert_existptr[0x20];
3168
3169 u8 assert_callra[0x20];
3170
Matan Barakb4ff3a32016-02-09 14:57:42 +02003171 u8 reserved_at_140[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003172
3173 u8 fw_version[0x20];
3174
3175 u8 hw_id[0x20];
3176
Matan Barakb4ff3a32016-02-09 14:57:42 +02003177 u8 reserved_at_1c0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003178
3179 u8 irisc_index[0x8];
3180 u8 synd[0x8];
3181 u8 ext_synd[0x10];
3182};
3183
3184struct mlx5_ifc_register_loopback_control_bits {
3185 u8 no_lb[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003186 u8 reserved_at_1[0x7];
Saeed Mahameede2816822015-05-28 22:28:40 +03003187 u8 port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003188 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003189
Matan Barakb4ff3a32016-02-09 14:57:42 +02003190 u8 reserved_at_20[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03003191};
3192
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +03003193struct mlx5_ifc_vport_tc_element_bits {
3194 u8 traffic_class[0x4];
3195 u8 reserved_at_4[0xc];
3196 u8 vport_number[0x10];
3197};
3198
3199struct mlx5_ifc_vport_element_bits {
3200 u8 reserved_at_0[0x10];
3201 u8 vport_number[0x10];
3202};
3203
3204enum {
3205 TSAR_ELEMENT_TSAR_TYPE_DWRR = 0x0,
3206 TSAR_ELEMENT_TSAR_TYPE_ROUND_ROBIN = 0x1,
3207 TSAR_ELEMENT_TSAR_TYPE_ETS = 0x2,
3208};
3209
3210struct mlx5_ifc_tsar_element_bits {
3211 u8 reserved_at_0[0x8];
3212 u8 tsar_type[0x8];
3213 u8 reserved_at_10[0x10];
3214};
3215
Majd Dibbiny8812c242017-02-09 14:20:12 +02003216enum {
3217 MLX5_TEARDOWN_HCA_OUT_FORCE_STATE_SUCCESS = 0x0,
3218 MLX5_TEARDOWN_HCA_OUT_FORCE_STATE_FAIL = 0x1,
3219};
3220
Saeed Mahameede2816822015-05-28 22:28:40 +03003221struct mlx5_ifc_teardown_hca_out_bits {
3222 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003223 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003224
3225 u8 syndrome[0x20];
3226
Majd Dibbiny8812c242017-02-09 14:20:12 +02003227 u8 reserved_at_40[0x3f];
3228
3229 u8 force_state[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03003230};
3231
3232enum {
3233 MLX5_TEARDOWN_HCA_IN_PROFILE_GRACEFUL_CLOSE = 0x0,
Majd Dibbiny8812c242017-02-09 14:20:12 +02003234 MLX5_TEARDOWN_HCA_IN_PROFILE_FORCE_CLOSE = 0x1,
Saeed Mahameede2816822015-05-28 22:28:40 +03003235};
3236
3237struct mlx5_ifc_teardown_hca_in_bits {
3238 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003239 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003240
Matan Barakb4ff3a32016-02-09 14:57:42 +02003241 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003242 u8 op_mod[0x10];
3243
Matan Barakb4ff3a32016-02-09 14:57:42 +02003244 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003245 u8 profile[0x10];
3246
Matan Barakb4ff3a32016-02-09 14:57:42 +02003247 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003248};
3249
3250struct mlx5_ifc_sqerr2rts_qp_out_bits {
3251 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003252 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003253
3254 u8 syndrome[0x20];
3255
Matan Barakb4ff3a32016-02-09 14:57:42 +02003256 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003257};
3258
3259struct mlx5_ifc_sqerr2rts_qp_in_bits {
3260 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003261 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003262
Matan Barakb4ff3a32016-02-09 14:57:42 +02003263 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003264 u8 op_mod[0x10];
3265
Matan Barakb4ff3a32016-02-09 14:57:42 +02003266 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003267 u8 qpn[0x18];
3268
Matan Barakb4ff3a32016-02-09 14:57:42 +02003269 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003270
3271 u8 opt_param_mask[0x20];
3272
Matan Barakb4ff3a32016-02-09 14:57:42 +02003273 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003274
3275 struct mlx5_ifc_qpc_bits qpc;
3276
Matan Barakb4ff3a32016-02-09 14:57:42 +02003277 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03003278};
3279
3280struct mlx5_ifc_sqd2rts_qp_out_bits {
3281 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003282 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003283
3284 u8 syndrome[0x20];
3285
Matan Barakb4ff3a32016-02-09 14:57:42 +02003286 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003287};
3288
3289struct mlx5_ifc_sqd2rts_qp_in_bits {
3290 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003291 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003292
Matan Barakb4ff3a32016-02-09 14:57:42 +02003293 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003294 u8 op_mod[0x10];
3295
Matan Barakb4ff3a32016-02-09 14:57:42 +02003296 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003297 u8 qpn[0x18];
3298
Matan Barakb4ff3a32016-02-09 14:57:42 +02003299 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003300
3301 u8 opt_param_mask[0x20];
3302
Matan Barakb4ff3a32016-02-09 14:57:42 +02003303 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003304
3305 struct mlx5_ifc_qpc_bits qpc;
3306
Matan Barakb4ff3a32016-02-09 14:57:42 +02003307 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03003308};
3309
3310struct mlx5_ifc_set_roce_address_out_bits {
3311 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003312 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003313
3314 u8 syndrome[0x20];
3315
Matan Barakb4ff3a32016-02-09 14:57:42 +02003316 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003317};
3318
3319struct mlx5_ifc_set_roce_address_in_bits {
3320 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003321 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003322
Matan Barakb4ff3a32016-02-09 14:57:42 +02003323 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003324 u8 op_mod[0x10];
3325
3326 u8 roce_address_index[0x10];
Daniel Jurgens32f69e42018-01-04 17:25:36 +02003327 u8 reserved_at_50[0xc];
3328 u8 vhca_port_num[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03003329
Matan Barakb4ff3a32016-02-09 14:57:42 +02003330 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003331
3332 struct mlx5_ifc_roce_addr_layout_bits roce_address;
3333};
3334
3335struct mlx5_ifc_set_mad_demux_out_bits {
3336 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003337 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003338
3339 u8 syndrome[0x20];
3340
Matan Barakb4ff3a32016-02-09 14:57:42 +02003341 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003342};
3343
3344enum {
3345 MLX5_SET_MAD_DEMUX_IN_DEMUX_MODE_PASS_ALL = 0x0,
3346 MLX5_SET_MAD_DEMUX_IN_DEMUX_MODE_SELECTIVE = 0x2,
3347};
3348
3349struct mlx5_ifc_set_mad_demux_in_bits {
3350 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003351 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003352
Matan Barakb4ff3a32016-02-09 14:57:42 +02003353 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003354 u8 op_mod[0x10];
3355
Matan Barakb4ff3a32016-02-09 14:57:42 +02003356 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003357
Matan Barakb4ff3a32016-02-09 14:57:42 +02003358 u8 reserved_at_60[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03003359 u8 demux_mode[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003360 u8 reserved_at_68[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003361};
3362
3363struct mlx5_ifc_set_l2_table_entry_out_bits {
3364 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003365 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003366
3367 u8 syndrome[0x20];
3368
Matan Barakb4ff3a32016-02-09 14:57:42 +02003369 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003370};
3371
3372struct mlx5_ifc_set_l2_table_entry_in_bits {
3373 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003374 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003375
Matan Barakb4ff3a32016-02-09 14:57:42 +02003376 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003377 u8 op_mod[0x10];
3378
Matan Barakb4ff3a32016-02-09 14:57:42 +02003379 u8 reserved_at_40[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03003380
Matan Barakb4ff3a32016-02-09 14:57:42 +02003381 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003382 u8 table_index[0x18];
3383
Matan Barakb4ff3a32016-02-09 14:57:42 +02003384 u8 reserved_at_c0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003385
Matan Barakb4ff3a32016-02-09 14:57:42 +02003386 u8 reserved_at_e0[0x13];
Saeed Mahameede2816822015-05-28 22:28:40 +03003387 u8 vlan_valid[0x1];
3388 u8 vlan[0xc];
3389
3390 struct mlx5_ifc_mac_address_layout_bits mac_address;
3391
Matan Barakb4ff3a32016-02-09 14:57:42 +02003392 u8 reserved_at_140[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003393};
3394
3395struct mlx5_ifc_set_issi_out_bits {
3396 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003397 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003398
3399 u8 syndrome[0x20];
3400
Matan Barakb4ff3a32016-02-09 14:57:42 +02003401 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003402};
3403
3404struct mlx5_ifc_set_issi_in_bits {
3405 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003406 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003407
Matan Barakb4ff3a32016-02-09 14:57:42 +02003408 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003409 u8 op_mod[0x10];
3410
Matan Barakb4ff3a32016-02-09 14:57:42 +02003411 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003412 u8 current_issi[0x10];
3413
Matan Barakb4ff3a32016-02-09 14:57:42 +02003414 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003415};
3416
3417struct mlx5_ifc_set_hca_cap_out_bits {
3418 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003419 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003420
3421 u8 syndrome[0x20];
3422
Matan Barakb4ff3a32016-02-09 14:57:42 +02003423 u8 reserved_at_40[0x40];
Eli Cohenb7755162014-10-02 12:19:44 +03003424};
3425
3426struct mlx5_ifc_set_hca_cap_in_bits {
3427 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003428 u8 reserved_at_10[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +03003429
Matan Barakb4ff3a32016-02-09 14:57:42 +02003430 u8 reserved_at_20[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +03003431 u8 op_mod[0x10];
3432
Matan Barakb4ff3a32016-02-09 14:57:42 +02003433 u8 reserved_at_40[0x40];
Eli Cohenb7755162014-10-02 12:19:44 +03003434
Saeed Mahameede2816822015-05-28 22:28:40 +03003435 union mlx5_ifc_hca_cap_union_bits capability;
3436};
3437
Maor Gottlieb26a81452015-12-10 17:12:39 +02003438enum {
3439 MLX5_SET_FTE_MODIFY_ENABLE_MASK_ACTION = 0x0,
3440 MLX5_SET_FTE_MODIFY_ENABLE_MASK_FLOW_TAG = 0x1,
3441 MLX5_SET_FTE_MODIFY_ENABLE_MASK_DESTINATION_LIST = 0x2,
3442 MLX5_SET_FTE_MODIFY_ENABLE_MASK_FLOW_COUNTERS = 0x3
3443};
3444
Saeed Mahameede2816822015-05-28 22:28:40 +03003445struct mlx5_ifc_set_fte_out_bits {
3446 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003447 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003448
3449 u8 syndrome[0x20];
3450
Matan Barakb4ff3a32016-02-09 14:57:42 +02003451 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003452};
3453
3454struct mlx5_ifc_set_fte_in_bits {
3455 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003456 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003457
Matan Barakb4ff3a32016-02-09 14:57:42 +02003458 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003459 u8 op_mod[0x10];
3460
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03003461 u8 other_vport[0x1];
3462 u8 reserved_at_41[0xf];
3463 u8 vport_number[0x10];
3464
3465 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003466
3467 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003468 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003469
Matan Barakb4ff3a32016-02-09 14:57:42 +02003470 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003471 u8 table_id[0x18];
3472
Matan Barakb4ff3a32016-02-09 14:57:42 +02003473 u8 reserved_at_c0[0x18];
Maor Gottlieb26a81452015-12-10 17:12:39 +02003474 u8 modify_enable_mask[0x8];
3475
Matan Barakb4ff3a32016-02-09 14:57:42 +02003476 u8 reserved_at_e0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003477
3478 u8 flow_index[0x20];
3479
Matan Barakb4ff3a32016-02-09 14:57:42 +02003480 u8 reserved_at_120[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003481
3482 struct mlx5_ifc_flow_context_bits flow_context;
3483};
3484
3485struct mlx5_ifc_rts2rts_qp_out_bits {
3486 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003487 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003488
3489 u8 syndrome[0x20];
3490
Matan Barakb4ff3a32016-02-09 14:57:42 +02003491 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003492};
3493
3494struct mlx5_ifc_rts2rts_qp_in_bits {
3495 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003496 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003497
Matan Barakb4ff3a32016-02-09 14:57:42 +02003498 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003499 u8 op_mod[0x10];
3500
Matan Barakb4ff3a32016-02-09 14:57:42 +02003501 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003502 u8 qpn[0x18];
3503
Matan Barakb4ff3a32016-02-09 14:57:42 +02003504 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003505
3506 u8 opt_param_mask[0x20];
3507
Matan Barakb4ff3a32016-02-09 14:57:42 +02003508 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003509
3510 struct mlx5_ifc_qpc_bits qpc;
3511
Matan Barakb4ff3a32016-02-09 14:57:42 +02003512 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03003513};
3514
3515struct mlx5_ifc_rtr2rts_qp_out_bits {
3516 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003517 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003518
3519 u8 syndrome[0x20];
3520
Matan Barakb4ff3a32016-02-09 14:57:42 +02003521 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003522};
3523
3524struct mlx5_ifc_rtr2rts_qp_in_bits {
3525 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003526 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003527
Matan Barakb4ff3a32016-02-09 14:57:42 +02003528 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003529 u8 op_mod[0x10];
3530
Matan Barakb4ff3a32016-02-09 14:57:42 +02003531 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003532 u8 qpn[0x18];
3533
Matan Barakb4ff3a32016-02-09 14:57:42 +02003534 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003535
3536 u8 opt_param_mask[0x20];
3537
Matan Barakb4ff3a32016-02-09 14:57:42 +02003538 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003539
3540 struct mlx5_ifc_qpc_bits qpc;
3541
Matan Barakb4ff3a32016-02-09 14:57:42 +02003542 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03003543};
3544
3545struct mlx5_ifc_rst2init_qp_out_bits {
3546 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003547 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003548
3549 u8 syndrome[0x20];
3550
Matan Barakb4ff3a32016-02-09 14:57:42 +02003551 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003552};
3553
3554struct mlx5_ifc_rst2init_qp_in_bits {
3555 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003556 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003557
Matan Barakb4ff3a32016-02-09 14:57:42 +02003558 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003559 u8 op_mod[0x10];
3560
Matan Barakb4ff3a32016-02-09 14:57:42 +02003561 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003562 u8 qpn[0x18];
3563
Matan Barakb4ff3a32016-02-09 14:57:42 +02003564 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003565
3566 u8 opt_param_mask[0x20];
3567
Matan Barakb4ff3a32016-02-09 14:57:42 +02003568 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003569
3570 struct mlx5_ifc_qpc_bits qpc;
3571
Matan Barakb4ff3a32016-02-09 14:57:42 +02003572 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03003573};
3574
Saeed Mahameed74862162016-06-09 15:11:34 +03003575struct mlx5_ifc_query_xrq_out_bits {
3576 u8 status[0x8];
3577 u8 reserved_at_8[0x18];
3578
3579 u8 syndrome[0x20];
3580
3581 u8 reserved_at_40[0x40];
3582
3583 struct mlx5_ifc_xrqc_bits xrq_context;
3584};
3585
3586struct mlx5_ifc_query_xrq_in_bits {
3587 u8 opcode[0x10];
3588 u8 reserved_at_10[0x10];
3589
3590 u8 reserved_at_20[0x10];
3591 u8 op_mod[0x10];
3592
3593 u8 reserved_at_40[0x8];
3594 u8 xrqn[0x18];
3595
3596 u8 reserved_at_60[0x20];
3597};
3598
Saeed Mahameede2816822015-05-28 22:28:40 +03003599struct mlx5_ifc_query_xrc_srq_out_bits {
3600 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003601 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003602
3603 u8 syndrome[0x20];
3604
Matan Barakb4ff3a32016-02-09 14:57:42 +02003605 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003606
3607 struct mlx5_ifc_xrc_srqc_bits xrc_srq_context_entry;
3608
Matan Barakb4ff3a32016-02-09 14:57:42 +02003609 u8 reserved_at_280[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03003610
3611 u8 pas[0][0x40];
3612};
3613
3614struct mlx5_ifc_query_xrc_srq_in_bits {
3615 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003616 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003617
Matan Barakb4ff3a32016-02-09 14:57:42 +02003618 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003619 u8 op_mod[0x10];
3620
Matan Barakb4ff3a32016-02-09 14:57:42 +02003621 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003622 u8 xrc_srqn[0x18];
3623
Matan Barakb4ff3a32016-02-09 14:57:42 +02003624 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003625};
3626
3627enum {
3628 MLX5_QUERY_VPORT_STATE_OUT_STATE_DOWN = 0x0,
3629 MLX5_QUERY_VPORT_STATE_OUT_STATE_UP = 0x1,
3630};
3631
3632struct mlx5_ifc_query_vport_state_out_bits {
3633 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003634 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003635
3636 u8 syndrome[0x20];
3637
Matan Barakb4ff3a32016-02-09 14:57:42 +02003638 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003639
Matan Barakb4ff3a32016-02-09 14:57:42 +02003640 u8 reserved_at_60[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003641 u8 admin_state[0x4];
3642 u8 state[0x4];
3643};
3644
3645enum {
3646 MLX5_QUERY_VPORT_STATE_IN_OP_MOD_VNIC_VPORT = 0x0,
Saeed Mahameede7546512015-12-01 18:03:13 +02003647 MLX5_QUERY_VPORT_STATE_IN_OP_MOD_ESW_VPORT = 0x1,
Saeed Mahameede2816822015-05-28 22:28:40 +03003648};
3649
3650struct mlx5_ifc_query_vport_state_in_bits {
3651 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003652 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003653
Matan Barakb4ff3a32016-02-09 14:57:42 +02003654 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003655 u8 op_mod[0x10];
3656
3657 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003658 u8 reserved_at_41[0xf];
Saeed Mahameede2816822015-05-28 22:28:40 +03003659 u8 vport_number[0x10];
3660
Matan Barakb4ff3a32016-02-09 14:57:42 +02003661 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003662};
3663
3664struct mlx5_ifc_query_vport_counter_out_bits {
3665 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003666 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003667
3668 u8 syndrome[0x20];
3669
Matan Barakb4ff3a32016-02-09 14:57:42 +02003670 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003671
3672 struct mlx5_ifc_traffic_counter_bits received_errors;
3673
3674 struct mlx5_ifc_traffic_counter_bits transmit_errors;
3675
3676 struct mlx5_ifc_traffic_counter_bits received_ib_unicast;
3677
3678 struct mlx5_ifc_traffic_counter_bits transmitted_ib_unicast;
3679
3680 struct mlx5_ifc_traffic_counter_bits received_ib_multicast;
3681
3682 struct mlx5_ifc_traffic_counter_bits transmitted_ib_multicast;
3683
3684 struct mlx5_ifc_traffic_counter_bits received_eth_broadcast;
3685
3686 struct mlx5_ifc_traffic_counter_bits transmitted_eth_broadcast;
3687
3688 struct mlx5_ifc_traffic_counter_bits received_eth_unicast;
3689
3690 struct mlx5_ifc_traffic_counter_bits transmitted_eth_unicast;
3691
3692 struct mlx5_ifc_traffic_counter_bits received_eth_multicast;
3693
3694 struct mlx5_ifc_traffic_counter_bits transmitted_eth_multicast;
3695
Matan Barakb4ff3a32016-02-09 14:57:42 +02003696 u8 reserved_at_680[0xa00];
Saeed Mahameede2816822015-05-28 22:28:40 +03003697};
3698
3699enum {
3700 MLX5_QUERY_VPORT_COUNTER_IN_OP_MOD_VPORT_COUNTERS = 0x0,
3701};
3702
3703struct mlx5_ifc_query_vport_counter_in_bits {
3704 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003705 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003706
Matan Barakb4ff3a32016-02-09 14:57:42 +02003707 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003708 u8 op_mod[0x10];
3709
3710 u8 other_vport[0x1];
Meny Yossefib54ba272016-02-18 18:14:59 +02003711 u8 reserved_at_41[0xb];
3712 u8 port_num[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03003713 u8 vport_number[0x10];
3714
Matan Barakb4ff3a32016-02-09 14:57:42 +02003715 u8 reserved_at_60[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03003716
3717 u8 clear[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003718 u8 reserved_at_c1[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03003719
Matan Barakb4ff3a32016-02-09 14:57:42 +02003720 u8 reserved_at_e0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003721};
3722
3723struct mlx5_ifc_query_tis_out_bits {
3724 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003725 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003726
3727 u8 syndrome[0x20];
3728
Matan Barakb4ff3a32016-02-09 14:57:42 +02003729 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003730
3731 struct mlx5_ifc_tisc_bits tis_context;
3732};
3733
3734struct mlx5_ifc_query_tis_in_bits {
3735 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003736 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003737
Matan Barakb4ff3a32016-02-09 14:57:42 +02003738 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003739 u8 op_mod[0x10];
3740
Matan Barakb4ff3a32016-02-09 14:57:42 +02003741 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003742 u8 tisn[0x18];
3743
Matan Barakb4ff3a32016-02-09 14:57:42 +02003744 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003745};
3746
3747struct mlx5_ifc_query_tir_out_bits {
3748 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003749 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003750
3751 u8 syndrome[0x20];
3752
Matan Barakb4ff3a32016-02-09 14:57:42 +02003753 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003754
3755 struct mlx5_ifc_tirc_bits tir_context;
3756};
3757
3758struct mlx5_ifc_query_tir_in_bits {
3759 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003760 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003761
Matan Barakb4ff3a32016-02-09 14:57:42 +02003762 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003763 u8 op_mod[0x10];
3764
Matan Barakb4ff3a32016-02-09 14:57:42 +02003765 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003766 u8 tirn[0x18];
3767
Matan Barakb4ff3a32016-02-09 14:57:42 +02003768 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003769};
3770
3771struct mlx5_ifc_query_srq_out_bits {
3772 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003773 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003774
3775 u8 syndrome[0x20];
3776
Matan Barakb4ff3a32016-02-09 14:57:42 +02003777 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003778
3779 struct mlx5_ifc_srqc_bits srq_context_entry;
3780
Matan Barakb4ff3a32016-02-09 14:57:42 +02003781 u8 reserved_at_280[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03003782
3783 u8 pas[0][0x40];
3784};
3785
3786struct mlx5_ifc_query_srq_in_bits {
3787 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003788 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003789
Matan Barakb4ff3a32016-02-09 14:57:42 +02003790 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003791 u8 op_mod[0x10];
3792
Matan Barakb4ff3a32016-02-09 14:57:42 +02003793 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003794 u8 srqn[0x18];
3795
Matan Barakb4ff3a32016-02-09 14:57:42 +02003796 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003797};
3798
3799struct mlx5_ifc_query_sq_out_bits {
3800 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003801 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003802
3803 u8 syndrome[0x20];
3804
Matan Barakb4ff3a32016-02-09 14:57:42 +02003805 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003806
3807 struct mlx5_ifc_sqc_bits sq_context;
3808};
3809
3810struct mlx5_ifc_query_sq_in_bits {
3811 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003812 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003813
Matan Barakb4ff3a32016-02-09 14:57:42 +02003814 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003815 u8 op_mod[0x10];
3816
Matan Barakb4ff3a32016-02-09 14:57:42 +02003817 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003818 u8 sqn[0x18];
3819
Matan Barakb4ff3a32016-02-09 14:57:42 +02003820 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003821};
3822
3823struct mlx5_ifc_query_special_contexts_out_bits {
3824 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003825 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003826
3827 u8 syndrome[0x20];
3828
Saeed Mahameedec22eb52016-07-16 06:28:36 +03003829 u8 dump_fill_mkey[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003830
3831 u8 resd_lkey[0x20];
Artemy Kovalyovbcda1ac2017-01-02 11:37:41 +02003832
3833 u8 null_mkey[0x20];
3834
3835 u8 reserved_at_a0[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03003836};
3837
3838struct mlx5_ifc_query_special_contexts_in_bits {
3839 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003840 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003841
Matan Barakb4ff3a32016-02-09 14:57:42 +02003842 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003843 u8 op_mod[0x10];
3844
Matan Barakb4ff3a32016-02-09 14:57:42 +02003845 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003846};
3847
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +03003848struct mlx5_ifc_query_scheduling_element_out_bits {
3849 u8 opcode[0x10];
3850 u8 reserved_at_10[0x10];
3851
3852 u8 reserved_at_20[0x10];
3853 u8 op_mod[0x10];
3854
3855 u8 reserved_at_40[0xc0];
3856
3857 struct mlx5_ifc_scheduling_context_bits scheduling_context;
3858
3859 u8 reserved_at_300[0x100];
3860};
3861
3862enum {
3863 SCHEDULING_HIERARCHY_E_SWITCH = 0x2,
3864};
3865
3866struct mlx5_ifc_query_scheduling_element_in_bits {
3867 u8 opcode[0x10];
3868 u8 reserved_at_10[0x10];
3869
3870 u8 reserved_at_20[0x10];
3871 u8 op_mod[0x10];
3872
3873 u8 scheduling_hierarchy[0x8];
3874 u8 reserved_at_48[0x18];
3875
3876 u8 scheduling_element_id[0x20];
3877
3878 u8 reserved_at_80[0x180];
3879};
3880
Saeed Mahameede2816822015-05-28 22:28:40 +03003881struct mlx5_ifc_query_rqt_out_bits {
3882 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003883 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003884
3885 u8 syndrome[0x20];
3886
Matan Barakb4ff3a32016-02-09 14:57:42 +02003887 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003888
3889 struct mlx5_ifc_rqtc_bits rqt_context;
3890};
3891
3892struct mlx5_ifc_query_rqt_in_bits {
3893 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003894 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003895
Matan Barakb4ff3a32016-02-09 14:57:42 +02003896 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003897 u8 op_mod[0x10];
3898
Matan Barakb4ff3a32016-02-09 14:57:42 +02003899 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003900 u8 rqtn[0x18];
3901
Matan Barakb4ff3a32016-02-09 14:57:42 +02003902 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003903};
3904
3905struct mlx5_ifc_query_rq_out_bits {
3906 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003907 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003908
3909 u8 syndrome[0x20];
3910
Matan Barakb4ff3a32016-02-09 14:57:42 +02003911 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003912
3913 struct mlx5_ifc_rqc_bits rq_context;
3914};
3915
3916struct mlx5_ifc_query_rq_in_bits {
3917 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003918 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003919
Matan Barakb4ff3a32016-02-09 14:57:42 +02003920 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003921 u8 op_mod[0x10];
3922
Matan Barakb4ff3a32016-02-09 14:57:42 +02003923 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003924 u8 rqn[0x18];
3925
Matan Barakb4ff3a32016-02-09 14:57:42 +02003926 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003927};
3928
3929struct mlx5_ifc_query_roce_address_out_bits {
3930 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003931 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003932
3933 u8 syndrome[0x20];
3934
Matan Barakb4ff3a32016-02-09 14:57:42 +02003935 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003936
3937 struct mlx5_ifc_roce_addr_layout_bits roce_address;
3938};
3939
3940struct mlx5_ifc_query_roce_address_in_bits {
3941 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003942 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003943
Matan Barakb4ff3a32016-02-09 14:57:42 +02003944 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003945 u8 op_mod[0x10];
3946
3947 u8 roce_address_index[0x10];
Daniel Jurgens32f69e42018-01-04 17:25:36 +02003948 u8 reserved_at_50[0xc];
3949 u8 vhca_port_num[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03003950
Matan Barakb4ff3a32016-02-09 14:57:42 +02003951 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003952};
3953
3954struct mlx5_ifc_query_rmp_out_bits {
3955 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003956 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003957
3958 u8 syndrome[0x20];
3959
Matan Barakb4ff3a32016-02-09 14:57:42 +02003960 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003961
3962 struct mlx5_ifc_rmpc_bits rmp_context;
3963};
3964
3965struct mlx5_ifc_query_rmp_in_bits {
3966 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003967 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003968
Matan Barakb4ff3a32016-02-09 14:57:42 +02003969 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003970 u8 op_mod[0x10];
3971
Matan Barakb4ff3a32016-02-09 14:57:42 +02003972 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003973 u8 rmpn[0x18];
3974
Matan Barakb4ff3a32016-02-09 14:57:42 +02003975 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003976};
3977
3978struct mlx5_ifc_query_qp_out_bits {
3979 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003980 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003981
3982 u8 syndrome[0x20];
3983
Matan Barakb4ff3a32016-02-09 14:57:42 +02003984 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003985
3986 u8 opt_param_mask[0x20];
3987
Matan Barakb4ff3a32016-02-09 14:57:42 +02003988 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003989
3990 struct mlx5_ifc_qpc_bits qpc;
3991
Matan Barakb4ff3a32016-02-09 14:57:42 +02003992 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03003993
3994 u8 pas[0][0x40];
3995};
3996
3997struct mlx5_ifc_query_qp_in_bits {
3998 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003999 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004000
Matan Barakb4ff3a32016-02-09 14:57:42 +02004001 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004002 u8 op_mod[0x10];
4003
Matan Barakb4ff3a32016-02-09 14:57:42 +02004004 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004005 u8 qpn[0x18];
4006
Matan Barakb4ff3a32016-02-09 14:57:42 +02004007 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004008};
4009
4010struct mlx5_ifc_query_q_counter_out_bits {
4011 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004012 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004013
4014 u8 syndrome[0x20];
4015
Matan Barakb4ff3a32016-02-09 14:57:42 +02004016 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004017
4018 u8 rx_write_requests[0x20];
4019
Matan Barakb4ff3a32016-02-09 14:57:42 +02004020 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004021
4022 u8 rx_read_requests[0x20];
4023
Matan Barakb4ff3a32016-02-09 14:57:42 +02004024 u8 reserved_at_e0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004025
4026 u8 rx_atomic_requests[0x20];
4027
Matan Barakb4ff3a32016-02-09 14:57:42 +02004028 u8 reserved_at_120[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004029
4030 u8 rx_dct_connect[0x20];
4031
Matan Barakb4ff3a32016-02-09 14:57:42 +02004032 u8 reserved_at_160[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004033
4034 u8 out_of_buffer[0x20];
4035
Matan Barakb4ff3a32016-02-09 14:57:42 +02004036 u8 reserved_at_1a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004037
4038 u8 out_of_sequence[0x20];
4039
Saeed Mahameed74862162016-06-09 15:11:34 +03004040 u8 reserved_at_1e0[0x20];
4041
4042 u8 duplicate_request[0x20];
4043
4044 u8 reserved_at_220[0x20];
4045
4046 u8 rnr_nak_retry_err[0x20];
4047
4048 u8 reserved_at_260[0x20];
4049
4050 u8 packet_seq_err[0x20];
4051
4052 u8 reserved_at_2a0[0x20];
4053
4054 u8 implied_nak_seq_err[0x20];
4055
4056 u8 reserved_at_2e0[0x20];
4057
4058 u8 local_ack_timeout_err[0x20];
4059
Parav Pandit58dcb602017-06-19 07:19:37 +03004060 u8 reserved_at_320[0xa0];
4061
4062 u8 resp_local_length_error[0x20];
4063
4064 u8 req_local_length_error[0x20];
4065
4066 u8 resp_local_qp_error[0x20];
4067
4068 u8 local_operation_error[0x20];
4069
4070 u8 resp_local_protection[0x20];
4071
4072 u8 req_local_protection[0x20];
4073
4074 u8 resp_cqe_error[0x20];
4075
4076 u8 req_cqe_error[0x20];
4077
4078 u8 req_mw_binding[0x20];
4079
4080 u8 req_bad_response[0x20];
4081
4082 u8 req_remote_invalid_request[0x20];
4083
4084 u8 resp_remote_invalid_request[0x20];
4085
4086 u8 req_remote_access_errors[0x20];
4087
4088 u8 resp_remote_access_errors[0x20];
4089
4090 u8 req_remote_operation_errors[0x20];
4091
4092 u8 req_transport_retries_exceeded[0x20];
4093
4094 u8 cq_overflow[0x20];
4095
4096 u8 resp_cqe_flush_error[0x20];
4097
4098 u8 req_cqe_flush_error[0x20];
4099
4100 u8 reserved_at_620[0x1e0];
Saeed Mahameede2816822015-05-28 22:28:40 +03004101};
4102
4103struct mlx5_ifc_query_q_counter_in_bits {
4104 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004105 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004106
Matan Barakb4ff3a32016-02-09 14:57:42 +02004107 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004108 u8 op_mod[0x10];
4109
Matan Barakb4ff3a32016-02-09 14:57:42 +02004110 u8 reserved_at_40[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03004111
4112 u8 clear[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004113 u8 reserved_at_c1[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03004114
Matan Barakb4ff3a32016-02-09 14:57:42 +02004115 u8 reserved_at_e0[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004116 u8 counter_set_id[0x8];
4117};
4118
4119struct mlx5_ifc_query_pages_out_bits {
4120 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004121 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004122
4123 u8 syndrome[0x20];
4124
Matan Barakb4ff3a32016-02-09 14:57:42 +02004125 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004126 u8 function_id[0x10];
4127
4128 u8 num_pages[0x20];
4129};
4130
4131enum {
4132 MLX5_QUERY_PAGES_IN_OP_MOD_BOOT_PAGES = 0x1,
4133 MLX5_QUERY_PAGES_IN_OP_MOD_INIT_PAGES = 0x2,
4134 MLX5_QUERY_PAGES_IN_OP_MOD_REGULAR_PAGES = 0x3,
4135};
4136
4137struct mlx5_ifc_query_pages_in_bits {
4138 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004139 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004140
Matan Barakb4ff3a32016-02-09 14:57:42 +02004141 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004142 u8 op_mod[0x10];
4143
Matan Barakb4ff3a32016-02-09 14:57:42 +02004144 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004145 u8 function_id[0x10];
4146
Matan Barakb4ff3a32016-02-09 14:57:42 +02004147 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004148};
4149
4150struct mlx5_ifc_query_nic_vport_context_out_bits {
4151 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004152 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004153
4154 u8 syndrome[0x20];
4155
Matan Barakb4ff3a32016-02-09 14:57:42 +02004156 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004157
4158 struct mlx5_ifc_nic_vport_context_bits nic_vport_context;
4159};
4160
4161struct mlx5_ifc_query_nic_vport_context_in_bits {
4162 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004163 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004164
Matan Barakb4ff3a32016-02-09 14:57:42 +02004165 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004166 u8 op_mod[0x10];
4167
4168 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004169 u8 reserved_at_41[0xf];
Saeed Mahameede2816822015-05-28 22:28:40 +03004170 u8 vport_number[0x10];
4171
Matan Barakb4ff3a32016-02-09 14:57:42 +02004172 u8 reserved_at_60[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03004173 u8 allowed_list_type[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004174 u8 reserved_at_68[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004175};
4176
4177struct mlx5_ifc_query_mkey_out_bits {
4178 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004179 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004180
4181 u8 syndrome[0x20];
4182
Matan Barakb4ff3a32016-02-09 14:57:42 +02004183 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004184
4185 struct mlx5_ifc_mkc_bits memory_key_mkey_entry;
4186
Matan Barakb4ff3a32016-02-09 14:57:42 +02004187 u8 reserved_at_280[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03004188
4189 u8 bsf0_klm0_pas_mtt0_1[16][0x8];
4190
4191 u8 bsf1_klm1_pas_mtt2_3[16][0x8];
4192};
4193
4194struct mlx5_ifc_query_mkey_in_bits {
4195 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004196 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004197
Matan Barakb4ff3a32016-02-09 14:57:42 +02004198 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004199 u8 op_mod[0x10];
4200
Matan Barakb4ff3a32016-02-09 14:57:42 +02004201 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004202 u8 mkey_index[0x18];
4203
4204 u8 pg_access[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004205 u8 reserved_at_61[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03004206};
4207
4208struct mlx5_ifc_query_mad_demux_out_bits {
4209 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004210 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004211
4212 u8 syndrome[0x20];
4213
Matan Barakb4ff3a32016-02-09 14:57:42 +02004214 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004215
4216 u8 mad_dumux_parameters_block[0x20];
4217};
4218
4219struct mlx5_ifc_query_mad_demux_in_bits {
4220 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004221 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004222
Matan Barakb4ff3a32016-02-09 14:57:42 +02004223 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004224 u8 op_mod[0x10];
4225
Matan Barakb4ff3a32016-02-09 14:57:42 +02004226 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004227};
4228
4229struct mlx5_ifc_query_l2_table_entry_out_bits {
4230 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004231 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004232
4233 u8 syndrome[0x20];
4234
Matan Barakb4ff3a32016-02-09 14:57:42 +02004235 u8 reserved_at_40[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03004236
Matan Barakb4ff3a32016-02-09 14:57:42 +02004237 u8 reserved_at_e0[0x13];
Saeed Mahameede2816822015-05-28 22:28:40 +03004238 u8 vlan_valid[0x1];
4239 u8 vlan[0xc];
4240
4241 struct mlx5_ifc_mac_address_layout_bits mac_address;
4242
Matan Barakb4ff3a32016-02-09 14:57:42 +02004243 u8 reserved_at_140[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03004244};
4245
4246struct mlx5_ifc_query_l2_table_entry_in_bits {
4247 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004248 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004249
Matan Barakb4ff3a32016-02-09 14:57:42 +02004250 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004251 u8 op_mod[0x10];
4252
Matan Barakb4ff3a32016-02-09 14:57:42 +02004253 u8 reserved_at_40[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03004254
Matan Barakb4ff3a32016-02-09 14:57:42 +02004255 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004256 u8 table_index[0x18];
4257
Matan Barakb4ff3a32016-02-09 14:57:42 +02004258 u8 reserved_at_c0[0x140];
Saeed Mahameede2816822015-05-28 22:28:40 +03004259};
4260
4261struct mlx5_ifc_query_issi_out_bits {
4262 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004263 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004264
4265 u8 syndrome[0x20];
4266
Matan Barakb4ff3a32016-02-09 14:57:42 +02004267 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004268 u8 current_issi[0x10];
4269
Matan Barakb4ff3a32016-02-09 14:57:42 +02004270 u8 reserved_at_60[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03004271
Matan Barakb4ff3a32016-02-09 14:57:42 +02004272 u8 reserved_at_100[76][0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004273 u8 supported_issi_dw0[0x20];
4274};
4275
4276struct mlx5_ifc_query_issi_in_bits {
4277 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004278 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004279
Matan Barakb4ff3a32016-02-09 14:57:42 +02004280 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004281 u8 op_mod[0x10];
4282
Matan Barakb4ff3a32016-02-09 14:57:42 +02004283 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004284};
4285
Saeed Mahameed0dbc6fe2016-11-17 13:45:59 +02004286struct mlx5_ifc_set_driver_version_out_bits {
4287 u8 status[0x8];
4288 u8 reserved_0[0x18];
4289
4290 u8 syndrome[0x20];
4291 u8 reserved_1[0x40];
4292};
4293
4294struct mlx5_ifc_set_driver_version_in_bits {
4295 u8 opcode[0x10];
4296 u8 reserved_0[0x10];
4297
4298 u8 reserved_1[0x10];
4299 u8 op_mod[0x10];
4300
4301 u8 reserved_2[0x40];
4302 u8 driver_version[64][0x8];
4303};
4304
Saeed Mahameede2816822015-05-28 22:28:40 +03004305struct mlx5_ifc_query_hca_vport_pkey_out_bits {
4306 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004307 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004308
4309 u8 syndrome[0x20];
4310
Matan Barakb4ff3a32016-02-09 14:57:42 +02004311 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004312
4313 struct mlx5_ifc_pkey_bits pkey[0];
4314};
4315
4316struct mlx5_ifc_query_hca_vport_pkey_in_bits {
4317 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004318 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004319
Matan Barakb4ff3a32016-02-09 14:57:42 +02004320 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004321 u8 op_mod[0x10];
4322
4323 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004324 u8 reserved_at_41[0xb];
Majd Dibbiny707c4602015-06-04 19:30:41 +03004325 u8 port_num[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03004326 u8 vport_number[0x10];
4327
Matan Barakb4ff3a32016-02-09 14:57:42 +02004328 u8 reserved_at_60[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004329 u8 pkey_index[0x10];
4330};
4331
Eli Coheneff901d2016-03-11 22:58:42 +02004332enum {
4333 MLX5_HCA_VPORT_SEL_PORT_GUID = 1 << 0,
4334 MLX5_HCA_VPORT_SEL_NODE_GUID = 1 << 1,
4335 MLX5_HCA_VPORT_SEL_STATE_POLICY = 1 << 2,
4336};
4337
Saeed Mahameede2816822015-05-28 22:28:40 +03004338struct mlx5_ifc_query_hca_vport_gid_out_bits {
4339 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004340 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004341
4342 u8 syndrome[0x20];
4343
Matan Barakb4ff3a32016-02-09 14:57:42 +02004344 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004345
4346 u8 gids_num[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004347 u8 reserved_at_70[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004348
4349 struct mlx5_ifc_array128_auto_bits gid[0];
4350};
4351
4352struct mlx5_ifc_query_hca_vport_gid_in_bits {
4353 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004354 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004355
Matan Barakb4ff3a32016-02-09 14:57:42 +02004356 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004357 u8 op_mod[0x10];
4358
4359 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004360 u8 reserved_at_41[0xb];
Majd Dibbiny707c4602015-06-04 19:30:41 +03004361 u8 port_num[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03004362 u8 vport_number[0x10];
4363
Matan Barakb4ff3a32016-02-09 14:57:42 +02004364 u8 reserved_at_60[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004365 u8 gid_index[0x10];
4366};
4367
4368struct mlx5_ifc_query_hca_vport_context_out_bits {
4369 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004370 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004371
4372 u8 syndrome[0x20];
4373
Matan Barakb4ff3a32016-02-09 14:57:42 +02004374 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004375
4376 struct mlx5_ifc_hca_vport_context_bits hca_vport_context;
4377};
4378
4379struct mlx5_ifc_query_hca_vport_context_in_bits {
4380 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004381 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004382
Matan Barakb4ff3a32016-02-09 14:57:42 +02004383 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004384 u8 op_mod[0x10];
4385
4386 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004387 u8 reserved_at_41[0xb];
Majd Dibbiny707c4602015-06-04 19:30:41 +03004388 u8 port_num[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03004389 u8 vport_number[0x10];
4390
Matan Barakb4ff3a32016-02-09 14:57:42 +02004391 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004392};
4393
4394struct mlx5_ifc_query_hca_cap_out_bits {
4395 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004396 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004397
4398 u8 syndrome[0x20];
4399
Matan Barakb4ff3a32016-02-09 14:57:42 +02004400 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004401
4402 union mlx5_ifc_hca_cap_union_bits capability;
Eli Cohenb7755162014-10-02 12:19:44 +03004403};
4404
4405struct mlx5_ifc_query_hca_cap_in_bits {
4406 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004407 u8 reserved_at_10[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +03004408
Matan Barakb4ff3a32016-02-09 14:57:42 +02004409 u8 reserved_at_20[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +03004410 u8 op_mod[0x10];
4411
Matan Barakb4ff3a32016-02-09 14:57:42 +02004412 u8 reserved_at_40[0x40];
Eli Cohenb7755162014-10-02 12:19:44 +03004413};
4414
Saeed Mahameede2816822015-05-28 22:28:40 +03004415struct mlx5_ifc_query_flow_table_out_bits {
Eli Cohenb7755162014-10-02 12:19:44 +03004416 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004417 u8 reserved_at_8[0x18];
Eli Cohenb7755162014-10-02 12:19:44 +03004418
4419 u8 syndrome[0x20];
4420
Matan Barakb4ff3a32016-02-09 14:57:42 +02004421 u8 reserved_at_40[0x80];
Eli Cohenb7755162014-10-02 12:19:44 +03004422
Matan Barakb4ff3a32016-02-09 14:57:42 +02004423 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004424 u8 level[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004425 u8 reserved_at_d0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004426 u8 log_size[0x8];
4427
Matan Barakb4ff3a32016-02-09 14:57:42 +02004428 u8 reserved_at_e0[0x120];
Eli Cohenb7755162014-10-02 12:19:44 +03004429};
4430
Saeed Mahameede2816822015-05-28 22:28:40 +03004431struct mlx5_ifc_query_flow_table_in_bits {
4432 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004433 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004434
Matan Barakb4ff3a32016-02-09 14:57:42 +02004435 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004436 u8 op_mod[0x10];
4437
Matan Barakb4ff3a32016-02-09 14:57:42 +02004438 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004439
4440 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004441 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004442
Matan Barakb4ff3a32016-02-09 14:57:42 +02004443 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004444 u8 table_id[0x18];
4445
Matan Barakb4ff3a32016-02-09 14:57:42 +02004446 u8 reserved_at_c0[0x140];
Saeed Mahameede2816822015-05-28 22:28:40 +03004447};
4448
4449struct mlx5_ifc_query_fte_out_bits {
4450 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004451 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004452
4453 u8 syndrome[0x20];
4454
Matan Barakb4ff3a32016-02-09 14:57:42 +02004455 u8 reserved_at_40[0x1c0];
Saeed Mahameede2816822015-05-28 22:28:40 +03004456
4457 struct mlx5_ifc_flow_context_bits flow_context;
4458};
4459
4460struct mlx5_ifc_query_fte_in_bits {
4461 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004462 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004463
Matan Barakb4ff3a32016-02-09 14:57:42 +02004464 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004465 u8 op_mod[0x10];
4466
Matan Barakb4ff3a32016-02-09 14:57:42 +02004467 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004468
4469 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004470 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004471
Matan Barakb4ff3a32016-02-09 14:57:42 +02004472 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004473 u8 table_id[0x18];
4474
Matan Barakb4ff3a32016-02-09 14:57:42 +02004475 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004476
4477 u8 flow_index[0x20];
4478
Matan Barakb4ff3a32016-02-09 14:57:42 +02004479 u8 reserved_at_120[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03004480};
4481
4482enum {
4483 MLX5_QUERY_FLOW_GROUP_OUT_MATCH_CRITERIA_ENABLE_OUTER_HEADERS = 0x0,
4484 MLX5_QUERY_FLOW_GROUP_OUT_MATCH_CRITERIA_ENABLE_MISC_PARAMETERS = 0x1,
4485 MLX5_QUERY_FLOW_GROUP_OUT_MATCH_CRITERIA_ENABLE_INNER_HEADERS = 0x2,
4486};
4487
4488struct mlx5_ifc_query_flow_group_out_bits {
4489 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004490 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004491
4492 u8 syndrome[0x20];
4493
Matan Barakb4ff3a32016-02-09 14:57:42 +02004494 u8 reserved_at_40[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03004495
4496 u8 start_flow_index[0x20];
4497
Matan Barakb4ff3a32016-02-09 14:57:42 +02004498 u8 reserved_at_100[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004499
4500 u8 end_flow_index[0x20];
4501
Matan Barakb4ff3a32016-02-09 14:57:42 +02004502 u8 reserved_at_140[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03004503
Matan Barakb4ff3a32016-02-09 14:57:42 +02004504 u8 reserved_at_1e0[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004505 u8 match_criteria_enable[0x8];
4506
4507 struct mlx5_ifc_fte_match_param_bits match_criteria;
4508
Matan Barakb4ff3a32016-02-09 14:57:42 +02004509 u8 reserved_at_1200[0xe00];
Saeed Mahameede2816822015-05-28 22:28:40 +03004510};
4511
4512struct mlx5_ifc_query_flow_group_in_bits {
4513 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004514 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004515
Matan Barakb4ff3a32016-02-09 14:57:42 +02004516 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004517 u8 op_mod[0x10];
4518
Matan Barakb4ff3a32016-02-09 14:57:42 +02004519 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004520
4521 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004522 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004523
Matan Barakb4ff3a32016-02-09 14:57:42 +02004524 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004525 u8 table_id[0x18];
4526
4527 u8 group_id[0x20];
4528
Matan Barakb4ff3a32016-02-09 14:57:42 +02004529 u8 reserved_at_e0[0x120];
Saeed Mahameede2816822015-05-28 22:28:40 +03004530};
4531
Amir Vadai9dc0b282016-05-13 12:55:39 +00004532struct mlx5_ifc_query_flow_counter_out_bits {
4533 u8 status[0x8];
4534 u8 reserved_at_8[0x18];
4535
4536 u8 syndrome[0x20];
4537
4538 u8 reserved_at_40[0x40];
4539
4540 struct mlx5_ifc_traffic_counter_bits flow_statistics[0];
4541};
4542
4543struct mlx5_ifc_query_flow_counter_in_bits {
4544 u8 opcode[0x10];
4545 u8 reserved_at_10[0x10];
4546
4547 u8 reserved_at_20[0x10];
4548 u8 op_mod[0x10];
4549
4550 u8 reserved_at_40[0x80];
4551
4552 u8 clear[0x1];
4553 u8 reserved_at_c1[0xf];
4554 u8 num_of_counters[0x10];
4555
Rabie Louloua8ffcc72017-07-09 13:39:30 +03004556 u8 flow_counter_id[0x20];
Amir Vadai9dc0b282016-05-13 12:55:39 +00004557};
4558
Saeed Mahameedd6666752015-12-01 18:03:22 +02004559struct mlx5_ifc_query_esw_vport_context_out_bits {
4560 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004561 u8 reserved_at_8[0x18];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004562
4563 u8 syndrome[0x20];
4564
Matan Barakb4ff3a32016-02-09 14:57:42 +02004565 u8 reserved_at_40[0x40];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004566
4567 struct mlx5_ifc_esw_vport_context_bits esw_vport_context;
4568};
4569
4570struct mlx5_ifc_query_esw_vport_context_in_bits {
4571 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004572 u8 reserved_at_10[0x10];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004573
Matan Barakb4ff3a32016-02-09 14:57:42 +02004574 u8 reserved_at_20[0x10];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004575 u8 op_mod[0x10];
4576
4577 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004578 u8 reserved_at_41[0xf];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004579 u8 vport_number[0x10];
4580
Matan Barakb4ff3a32016-02-09 14:57:42 +02004581 u8 reserved_at_60[0x20];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004582};
4583
4584struct mlx5_ifc_modify_esw_vport_context_out_bits {
4585 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004586 u8 reserved_at_8[0x18];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004587
4588 u8 syndrome[0x20];
4589
Matan Barakb4ff3a32016-02-09 14:57:42 +02004590 u8 reserved_at_40[0x40];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004591};
4592
4593struct mlx5_ifc_esw_vport_context_fields_select_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02004594 u8 reserved_at_0[0x1c];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004595 u8 vport_cvlan_insert[0x1];
4596 u8 vport_svlan_insert[0x1];
4597 u8 vport_cvlan_strip[0x1];
4598 u8 vport_svlan_strip[0x1];
4599};
4600
4601struct mlx5_ifc_modify_esw_vport_context_in_bits {
4602 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004603 u8 reserved_at_10[0x10];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004604
Matan Barakb4ff3a32016-02-09 14:57:42 +02004605 u8 reserved_at_20[0x10];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004606 u8 op_mod[0x10];
4607
4608 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004609 u8 reserved_at_41[0xf];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004610 u8 vport_number[0x10];
4611
4612 struct mlx5_ifc_esw_vport_context_fields_select_bits field_select;
4613
4614 struct mlx5_ifc_esw_vport_context_bits esw_vport_context;
4615};
4616
Saeed Mahameede2816822015-05-28 22:28:40 +03004617struct mlx5_ifc_query_eq_out_bits {
Eli Cohenb7755162014-10-02 12:19:44 +03004618 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004619 u8 reserved_at_8[0x18];
Eli Cohenb7755162014-10-02 12:19:44 +03004620
4621 u8 syndrome[0x20];
4622
Matan Barakb4ff3a32016-02-09 14:57:42 +02004623 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004624
4625 struct mlx5_ifc_eqc_bits eq_context_entry;
4626
Matan Barakb4ff3a32016-02-09 14:57:42 +02004627 u8 reserved_at_280[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004628
4629 u8 event_bitmask[0x40];
4630
Matan Barakb4ff3a32016-02-09 14:57:42 +02004631 u8 reserved_at_300[0x580];
Saeed Mahameede2816822015-05-28 22:28:40 +03004632
4633 u8 pas[0][0x40];
4634};
4635
4636struct mlx5_ifc_query_eq_in_bits {
4637 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004638 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004639
Matan Barakb4ff3a32016-02-09 14:57:42 +02004640 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004641 u8 op_mod[0x10];
4642
Matan Barakb4ff3a32016-02-09 14:57:42 +02004643 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004644 u8 eq_number[0x8];
4645
Matan Barakb4ff3a32016-02-09 14:57:42 +02004646 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004647};
4648
Hadar Hen Zion7adbde22016-08-03 15:08:33 +03004649struct mlx5_ifc_encap_header_in_bits {
4650 u8 reserved_at_0[0x5];
4651 u8 header_type[0x3];
4652 u8 reserved_at_8[0xe];
4653 u8 encap_header_size[0xa];
4654
4655 u8 reserved_at_20[0x10];
4656 u8 encap_header[2][0x8];
4657
4658 u8 more_encap_header[0][0x8];
4659};
4660
4661struct mlx5_ifc_query_encap_header_out_bits {
4662 u8 status[0x8];
4663 u8 reserved_at_8[0x18];
4664
4665 u8 syndrome[0x20];
4666
4667 u8 reserved_at_40[0xa0];
4668
4669 struct mlx5_ifc_encap_header_in_bits encap_header[0];
4670};
4671
4672struct mlx5_ifc_query_encap_header_in_bits {
4673 u8 opcode[0x10];
4674 u8 reserved_at_10[0x10];
4675
4676 u8 reserved_at_20[0x10];
4677 u8 op_mod[0x10];
4678
4679 u8 encap_id[0x20];
4680
4681 u8 reserved_at_60[0xa0];
4682};
4683
4684struct mlx5_ifc_alloc_encap_header_out_bits {
4685 u8 status[0x8];
4686 u8 reserved_at_8[0x18];
4687
4688 u8 syndrome[0x20];
4689
4690 u8 encap_id[0x20];
4691
4692 u8 reserved_at_60[0x20];
4693};
4694
4695struct mlx5_ifc_alloc_encap_header_in_bits {
4696 u8 opcode[0x10];
4697 u8 reserved_at_10[0x10];
4698
4699 u8 reserved_at_20[0x10];
4700 u8 op_mod[0x10];
4701
4702 u8 reserved_at_40[0xa0];
4703
4704 struct mlx5_ifc_encap_header_in_bits encap_header;
4705};
4706
4707struct mlx5_ifc_dealloc_encap_header_out_bits {
4708 u8 status[0x8];
4709 u8 reserved_at_8[0x18];
4710
4711 u8 syndrome[0x20];
4712
4713 u8 reserved_at_40[0x40];
4714};
4715
4716struct mlx5_ifc_dealloc_encap_header_in_bits {
4717 u8 opcode[0x10];
4718 u8 reserved_at_10[0x10];
4719
4720 u8 reserved_20[0x10];
4721 u8 op_mod[0x10];
4722
4723 u8 encap_id[0x20];
4724
4725 u8 reserved_60[0x20];
4726};
4727
Or Gerlitz2a69cb92017-01-19 19:31:25 +02004728struct mlx5_ifc_set_action_in_bits {
4729 u8 action_type[0x4];
4730 u8 field[0xc];
4731 u8 reserved_at_10[0x3];
4732 u8 offset[0x5];
4733 u8 reserved_at_18[0x3];
4734 u8 length[0x5];
4735
4736 u8 data[0x20];
4737};
4738
4739struct mlx5_ifc_add_action_in_bits {
4740 u8 action_type[0x4];
4741 u8 field[0xc];
4742 u8 reserved_at_10[0x10];
4743
4744 u8 data[0x20];
4745};
4746
4747union mlx5_ifc_set_action_in_add_action_in_auto_bits {
4748 struct mlx5_ifc_set_action_in_bits set_action_in;
4749 struct mlx5_ifc_add_action_in_bits add_action_in;
4750 u8 reserved_at_0[0x40];
4751};
4752
4753enum {
4754 MLX5_ACTION_TYPE_SET = 0x1,
4755 MLX5_ACTION_TYPE_ADD = 0x2,
4756};
4757
4758enum {
4759 MLX5_ACTION_IN_FIELD_OUT_SMAC_47_16 = 0x1,
4760 MLX5_ACTION_IN_FIELD_OUT_SMAC_15_0 = 0x2,
4761 MLX5_ACTION_IN_FIELD_OUT_ETHERTYPE = 0x3,
4762 MLX5_ACTION_IN_FIELD_OUT_DMAC_47_16 = 0x4,
4763 MLX5_ACTION_IN_FIELD_OUT_DMAC_15_0 = 0x5,
4764 MLX5_ACTION_IN_FIELD_OUT_IP_DSCP = 0x6,
4765 MLX5_ACTION_IN_FIELD_OUT_TCP_FLAGS = 0x7,
4766 MLX5_ACTION_IN_FIELD_OUT_TCP_SPORT = 0x8,
4767 MLX5_ACTION_IN_FIELD_OUT_TCP_DPORT = 0x9,
4768 MLX5_ACTION_IN_FIELD_OUT_IP_TTL = 0xa,
4769 MLX5_ACTION_IN_FIELD_OUT_UDP_SPORT = 0xb,
4770 MLX5_ACTION_IN_FIELD_OUT_UDP_DPORT = 0xc,
4771 MLX5_ACTION_IN_FIELD_OUT_SIPV6_127_96 = 0xd,
4772 MLX5_ACTION_IN_FIELD_OUT_SIPV6_95_64 = 0xe,
4773 MLX5_ACTION_IN_FIELD_OUT_SIPV6_63_32 = 0xf,
4774 MLX5_ACTION_IN_FIELD_OUT_SIPV6_31_0 = 0x10,
4775 MLX5_ACTION_IN_FIELD_OUT_DIPV6_127_96 = 0x11,
4776 MLX5_ACTION_IN_FIELD_OUT_DIPV6_95_64 = 0x12,
4777 MLX5_ACTION_IN_FIELD_OUT_DIPV6_63_32 = 0x13,
4778 MLX5_ACTION_IN_FIELD_OUT_DIPV6_31_0 = 0x14,
4779 MLX5_ACTION_IN_FIELD_OUT_SIPV4 = 0x15,
4780 MLX5_ACTION_IN_FIELD_OUT_DIPV4 = 0x16,
Or Gerlitz0c0316f2017-06-13 11:09:57 +03004781 MLX5_ACTION_IN_FIELD_OUT_IPV6_HOPLIMIT = 0x47,
Or Gerlitz2a69cb92017-01-19 19:31:25 +02004782};
4783
4784struct mlx5_ifc_alloc_modify_header_context_out_bits {
4785 u8 status[0x8];
4786 u8 reserved_at_8[0x18];
4787
4788 u8 syndrome[0x20];
4789
4790 u8 modify_header_id[0x20];
4791
4792 u8 reserved_at_60[0x20];
4793};
4794
4795struct mlx5_ifc_alloc_modify_header_context_in_bits {
4796 u8 opcode[0x10];
4797 u8 reserved_at_10[0x10];
4798
4799 u8 reserved_at_20[0x10];
4800 u8 op_mod[0x10];
4801
4802 u8 reserved_at_40[0x20];
4803
4804 u8 table_type[0x8];
4805 u8 reserved_at_68[0x10];
4806 u8 num_of_actions[0x8];
4807
4808 union mlx5_ifc_set_action_in_add_action_in_auto_bits actions[0];
4809};
4810
4811struct mlx5_ifc_dealloc_modify_header_context_out_bits {
4812 u8 status[0x8];
4813 u8 reserved_at_8[0x18];
4814
4815 u8 syndrome[0x20];
4816
4817 u8 reserved_at_40[0x40];
4818};
4819
4820struct mlx5_ifc_dealloc_modify_header_context_in_bits {
4821 u8 opcode[0x10];
4822 u8 reserved_at_10[0x10];
4823
4824 u8 reserved_at_20[0x10];
4825 u8 op_mod[0x10];
4826
4827 u8 modify_header_id[0x20];
4828
4829 u8 reserved_at_60[0x20];
4830};
4831
Saeed Mahameede2816822015-05-28 22:28:40 +03004832struct mlx5_ifc_query_dct_out_bits {
4833 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004834 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004835
4836 u8 syndrome[0x20];
4837
Matan Barakb4ff3a32016-02-09 14:57:42 +02004838 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004839
4840 struct mlx5_ifc_dctc_bits dct_context_entry;
4841
Matan Barakb4ff3a32016-02-09 14:57:42 +02004842 u8 reserved_at_280[0x180];
Saeed Mahameede2816822015-05-28 22:28:40 +03004843};
4844
4845struct mlx5_ifc_query_dct_in_bits {
4846 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004847 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004848
Matan Barakb4ff3a32016-02-09 14:57:42 +02004849 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004850 u8 op_mod[0x10];
4851
Matan Barakb4ff3a32016-02-09 14:57:42 +02004852 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004853 u8 dctn[0x18];
4854
Matan Barakb4ff3a32016-02-09 14:57:42 +02004855 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004856};
4857
4858struct mlx5_ifc_query_cq_out_bits {
4859 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004860 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004861
4862 u8 syndrome[0x20];
4863
Matan Barakb4ff3a32016-02-09 14:57:42 +02004864 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004865
4866 struct mlx5_ifc_cqc_bits cq_context;
4867
Matan Barakb4ff3a32016-02-09 14:57:42 +02004868 u8 reserved_at_280[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03004869
4870 u8 pas[0][0x40];
4871};
4872
4873struct mlx5_ifc_query_cq_in_bits {
4874 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004875 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004876
Matan Barakb4ff3a32016-02-09 14:57:42 +02004877 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004878 u8 op_mod[0x10];
4879
Matan Barakb4ff3a32016-02-09 14:57:42 +02004880 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004881 u8 cqn[0x18];
4882
Matan Barakb4ff3a32016-02-09 14:57:42 +02004883 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004884};
4885
4886struct mlx5_ifc_query_cong_status_out_bits {
4887 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004888 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004889
4890 u8 syndrome[0x20];
4891
Matan Barakb4ff3a32016-02-09 14:57:42 +02004892 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004893
4894 u8 enable[0x1];
4895 u8 tag_enable[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004896 u8 reserved_at_62[0x1e];
Saeed Mahameede2816822015-05-28 22:28:40 +03004897};
4898
4899struct mlx5_ifc_query_cong_status_in_bits {
4900 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004901 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004902
Matan Barakb4ff3a32016-02-09 14:57:42 +02004903 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004904 u8 op_mod[0x10];
4905
Matan Barakb4ff3a32016-02-09 14:57:42 +02004906 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004907 u8 priority[0x4];
4908 u8 cong_protocol[0x4];
4909
Matan Barakb4ff3a32016-02-09 14:57:42 +02004910 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004911};
4912
4913struct mlx5_ifc_query_cong_statistics_out_bits {
4914 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004915 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004916
4917 u8 syndrome[0x20];
4918
Matan Barakb4ff3a32016-02-09 14:57:42 +02004919 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004920
Parav Pandite1f24a72017-04-16 07:29:29 +03004921 u8 rp_cur_flows[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004922
4923 u8 sum_flows[0x20];
4924
Parav Pandite1f24a72017-04-16 07:29:29 +03004925 u8 rp_cnp_ignored_high[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004926
Parav Pandite1f24a72017-04-16 07:29:29 +03004927 u8 rp_cnp_ignored_low[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004928
Parav Pandite1f24a72017-04-16 07:29:29 +03004929 u8 rp_cnp_handled_high[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004930
Parav Pandite1f24a72017-04-16 07:29:29 +03004931 u8 rp_cnp_handled_low[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004932
Matan Barakb4ff3a32016-02-09 14:57:42 +02004933 u8 reserved_at_140[0x100];
Saeed Mahameede2816822015-05-28 22:28:40 +03004934
4935 u8 time_stamp_high[0x20];
4936
4937 u8 time_stamp_low[0x20];
4938
4939 u8 accumulators_period[0x20];
4940
Parav Pandite1f24a72017-04-16 07:29:29 +03004941 u8 np_ecn_marked_roce_packets_high[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004942
Parav Pandite1f24a72017-04-16 07:29:29 +03004943 u8 np_ecn_marked_roce_packets_low[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004944
Parav Pandite1f24a72017-04-16 07:29:29 +03004945 u8 np_cnp_sent_high[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004946
Parav Pandite1f24a72017-04-16 07:29:29 +03004947 u8 np_cnp_sent_low[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004948
Matan Barakb4ff3a32016-02-09 14:57:42 +02004949 u8 reserved_at_320[0x560];
Saeed Mahameede2816822015-05-28 22:28:40 +03004950};
4951
4952struct mlx5_ifc_query_cong_statistics_in_bits {
4953 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004954 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004955
Matan Barakb4ff3a32016-02-09 14:57:42 +02004956 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004957 u8 op_mod[0x10];
4958
4959 u8 clear[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004960 u8 reserved_at_41[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03004961
Matan Barakb4ff3a32016-02-09 14:57:42 +02004962 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004963};
4964
4965struct mlx5_ifc_query_cong_params_out_bits {
4966 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004967 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004968
4969 u8 syndrome[0x20];
4970
Matan Barakb4ff3a32016-02-09 14:57:42 +02004971 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004972
4973 union mlx5_ifc_cong_control_roce_ecn_auto_bits congestion_parameters;
4974};
4975
4976struct mlx5_ifc_query_cong_params_in_bits {
4977 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004978 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004979
Matan Barakb4ff3a32016-02-09 14:57:42 +02004980 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004981 u8 op_mod[0x10];
4982
Matan Barakb4ff3a32016-02-09 14:57:42 +02004983 u8 reserved_at_40[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03004984 u8 cong_protocol[0x4];
4985
Matan Barakb4ff3a32016-02-09 14:57:42 +02004986 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004987};
4988
4989struct mlx5_ifc_query_adapter_out_bits {
4990 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004991 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004992
4993 u8 syndrome[0x20];
4994
Matan Barakb4ff3a32016-02-09 14:57:42 +02004995 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004996
4997 struct mlx5_ifc_query_adapter_param_block_bits query_adapter_struct;
4998};
4999
5000struct mlx5_ifc_query_adapter_in_bits {
5001 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005002 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005003
Matan Barakb4ff3a32016-02-09 14:57:42 +02005004 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005005 u8 op_mod[0x10];
5006
Matan Barakb4ff3a32016-02-09 14:57:42 +02005007 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005008};
5009
5010struct mlx5_ifc_qp_2rst_out_bits {
5011 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005012 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005013
5014 u8 syndrome[0x20];
5015
Matan Barakb4ff3a32016-02-09 14:57:42 +02005016 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005017};
5018
5019struct mlx5_ifc_qp_2rst_in_bits {
5020 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005021 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005022
Matan Barakb4ff3a32016-02-09 14:57:42 +02005023 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005024 u8 op_mod[0x10];
5025
Matan Barakb4ff3a32016-02-09 14:57:42 +02005026 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005027 u8 qpn[0x18];
5028
Matan Barakb4ff3a32016-02-09 14:57:42 +02005029 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005030};
5031
5032struct mlx5_ifc_qp_2err_out_bits {
5033 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005034 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005035
5036 u8 syndrome[0x20];
5037
Matan Barakb4ff3a32016-02-09 14:57:42 +02005038 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005039};
5040
5041struct mlx5_ifc_qp_2err_in_bits {
5042 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005043 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005044
Matan Barakb4ff3a32016-02-09 14:57:42 +02005045 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005046 u8 op_mod[0x10];
5047
Matan Barakb4ff3a32016-02-09 14:57:42 +02005048 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005049 u8 qpn[0x18];
5050
Matan Barakb4ff3a32016-02-09 14:57:42 +02005051 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005052};
5053
5054struct mlx5_ifc_page_fault_resume_out_bits {
5055 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005056 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005057
5058 u8 syndrome[0x20];
5059
Matan Barakb4ff3a32016-02-09 14:57:42 +02005060 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005061};
5062
5063struct mlx5_ifc_page_fault_resume_in_bits {
5064 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005065 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005066
Matan Barakb4ff3a32016-02-09 14:57:42 +02005067 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005068 u8 op_mod[0x10];
5069
5070 u8 error[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005071 u8 reserved_at_41[0x4];
Artemy Kovalyov223cdc72017-01-02 11:37:45 +02005072 u8 page_fault_type[0x3];
5073 u8 wq_number[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005074
Artemy Kovalyov223cdc72017-01-02 11:37:45 +02005075 u8 reserved_at_60[0x8];
5076 u8 token[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005077};
5078
5079struct mlx5_ifc_nop_out_bits {
5080 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005081 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005082
5083 u8 syndrome[0x20];
5084
Matan Barakb4ff3a32016-02-09 14:57:42 +02005085 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005086};
5087
5088struct mlx5_ifc_nop_in_bits {
5089 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005090 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005091
Matan Barakb4ff3a32016-02-09 14:57:42 +02005092 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005093 u8 op_mod[0x10];
5094
Matan Barakb4ff3a32016-02-09 14:57:42 +02005095 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005096};
5097
5098struct mlx5_ifc_modify_vport_state_out_bits {
5099 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005100 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005101
5102 u8 syndrome[0x20];
5103
Matan Barakb4ff3a32016-02-09 14:57:42 +02005104 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005105};
5106
5107struct mlx5_ifc_modify_vport_state_in_bits {
5108 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005109 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005110
Matan Barakb4ff3a32016-02-09 14:57:42 +02005111 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005112 u8 op_mod[0x10];
5113
5114 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005115 u8 reserved_at_41[0xf];
Saeed Mahameede2816822015-05-28 22:28:40 +03005116 u8 vport_number[0x10];
5117
Matan Barakb4ff3a32016-02-09 14:57:42 +02005118 u8 reserved_at_60[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005119 u8 admin_state[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005120 u8 reserved_at_7c[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03005121};
5122
5123struct mlx5_ifc_modify_tis_out_bits {
5124 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005125 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005126
5127 u8 syndrome[0x20];
5128
Matan Barakb4ff3a32016-02-09 14:57:42 +02005129 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005130};
5131
majd@mellanox.com75850d02016-01-14 19:13:06 +02005132struct mlx5_ifc_modify_tis_bitmask_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02005133 u8 reserved_at_0[0x20];
majd@mellanox.com75850d02016-01-14 19:13:06 +02005134
Aviv Heller84df61e2016-05-10 13:47:50 +03005135 u8 reserved_at_20[0x1d];
5136 u8 lag_tx_port_affinity[0x1];
5137 u8 strict_lag_tx_port_affinity[0x1];
majd@mellanox.com75850d02016-01-14 19:13:06 +02005138 u8 prio[0x1];
5139};
5140
Saeed Mahameede2816822015-05-28 22:28:40 +03005141struct mlx5_ifc_modify_tis_in_bits {
5142 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005143 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005144
Matan Barakb4ff3a32016-02-09 14:57:42 +02005145 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005146 u8 op_mod[0x10];
5147
Matan Barakb4ff3a32016-02-09 14:57:42 +02005148 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005149 u8 tisn[0x18];
5150
Matan Barakb4ff3a32016-02-09 14:57:42 +02005151 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005152
majd@mellanox.com75850d02016-01-14 19:13:06 +02005153 struct mlx5_ifc_modify_tis_bitmask_bits bitmask;
Saeed Mahameede2816822015-05-28 22:28:40 +03005154
Matan Barakb4ff3a32016-02-09 14:57:42 +02005155 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005156
5157 struct mlx5_ifc_tisc_bits ctx;
5158};
5159
Achiad Shochatd9eea402015-08-04 14:05:42 +03005160struct mlx5_ifc_modify_tir_bitmask_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02005161 u8 reserved_at_0[0x20];
Achiad Shochatd9eea402015-08-04 14:05:42 +03005162
Matan Barakb4ff3a32016-02-09 14:57:42 +02005163 u8 reserved_at_20[0x1b];
Tariq Toukan66189962015-11-12 19:35:26 +02005164 u8 self_lb_en[0x1];
Tariq Toukanbdfc0282016-02-29 21:17:12 +02005165 u8 reserved_at_3c[0x1];
5166 u8 hash[0x1];
5167 u8 reserved_at_3e[0x1];
Achiad Shochatd9eea402015-08-04 14:05:42 +03005168 u8 lro[0x1];
5169};
5170
Saeed Mahameede2816822015-05-28 22:28:40 +03005171struct mlx5_ifc_modify_tir_out_bits {
5172 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005173 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005174
5175 u8 syndrome[0x20];
5176
Matan Barakb4ff3a32016-02-09 14:57:42 +02005177 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005178};
5179
5180struct mlx5_ifc_modify_tir_in_bits {
5181 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005182 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005183
Matan Barakb4ff3a32016-02-09 14:57:42 +02005184 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005185 u8 op_mod[0x10];
5186
Matan Barakb4ff3a32016-02-09 14:57:42 +02005187 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005188 u8 tirn[0x18];
5189
Matan Barakb4ff3a32016-02-09 14:57:42 +02005190 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005191
Achiad Shochatd9eea402015-08-04 14:05:42 +03005192 struct mlx5_ifc_modify_tir_bitmask_bits bitmask;
Saeed Mahameede2816822015-05-28 22:28:40 +03005193
Matan Barakb4ff3a32016-02-09 14:57:42 +02005194 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005195
5196 struct mlx5_ifc_tirc_bits ctx;
5197};
5198
5199struct mlx5_ifc_modify_sq_out_bits {
5200 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005201 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005202
5203 u8 syndrome[0x20];
5204
Matan Barakb4ff3a32016-02-09 14:57:42 +02005205 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005206};
5207
5208struct mlx5_ifc_modify_sq_in_bits {
5209 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005210 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005211
Matan Barakb4ff3a32016-02-09 14:57:42 +02005212 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005213 u8 op_mod[0x10];
5214
5215 u8 sq_state[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005216 u8 reserved_at_44[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03005217 u8 sqn[0x18];
5218
Matan Barakb4ff3a32016-02-09 14:57:42 +02005219 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005220
5221 u8 modify_bitmask[0x40];
5222
Matan Barakb4ff3a32016-02-09 14:57:42 +02005223 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005224
5225 struct mlx5_ifc_sqc_bits ctx;
5226};
5227
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +03005228struct mlx5_ifc_modify_scheduling_element_out_bits {
5229 u8 status[0x8];
5230 u8 reserved_at_8[0x18];
5231
5232 u8 syndrome[0x20];
5233
5234 u8 reserved_at_40[0x1c0];
5235};
5236
5237enum {
5238 MODIFY_SCHEDULING_ELEMENT_IN_MODIFY_BITMASK_BW_SHARE = 0x1,
5239 MODIFY_SCHEDULING_ELEMENT_IN_MODIFY_BITMASK_MAX_AVERAGE_BW = 0x2,
5240};
5241
5242struct mlx5_ifc_modify_scheduling_element_in_bits {
5243 u8 opcode[0x10];
5244 u8 reserved_at_10[0x10];
5245
5246 u8 reserved_at_20[0x10];
5247 u8 op_mod[0x10];
5248
5249 u8 scheduling_hierarchy[0x8];
5250 u8 reserved_at_48[0x18];
5251
5252 u8 scheduling_element_id[0x20];
5253
5254 u8 reserved_at_80[0x20];
5255
5256 u8 modify_bitmask[0x20];
5257
5258 u8 reserved_at_c0[0x40];
5259
5260 struct mlx5_ifc_scheduling_context_bits scheduling_context;
5261
5262 u8 reserved_at_300[0x100];
5263};
5264
Saeed Mahameede2816822015-05-28 22:28:40 +03005265struct mlx5_ifc_modify_rqt_out_bits {
5266 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005267 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005268
5269 u8 syndrome[0x20];
5270
Matan Barakb4ff3a32016-02-09 14:57:42 +02005271 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005272};
5273
Achiad Shochat5c503682015-08-04 14:05:43 +03005274struct mlx5_ifc_rqt_bitmask_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02005275 u8 reserved_at_0[0x20];
Achiad Shochat5c503682015-08-04 14:05:43 +03005276
Matan Barakb4ff3a32016-02-09 14:57:42 +02005277 u8 reserved_at_20[0x1f];
Achiad Shochat5c503682015-08-04 14:05:43 +03005278 u8 rqn_list[0x1];
5279};
5280
Saeed Mahameede2816822015-05-28 22:28:40 +03005281struct mlx5_ifc_modify_rqt_in_bits {
5282 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005283 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005284
Matan Barakb4ff3a32016-02-09 14:57:42 +02005285 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005286 u8 op_mod[0x10];
5287
Matan Barakb4ff3a32016-02-09 14:57:42 +02005288 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005289 u8 rqtn[0x18];
5290
Matan Barakb4ff3a32016-02-09 14:57:42 +02005291 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005292
Achiad Shochat5c503682015-08-04 14:05:43 +03005293 struct mlx5_ifc_rqt_bitmask_bits bitmask;
Saeed Mahameede2816822015-05-28 22:28:40 +03005294
Matan Barakb4ff3a32016-02-09 14:57:42 +02005295 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005296
5297 struct mlx5_ifc_rqtc_bits ctx;
5298};
5299
5300struct mlx5_ifc_modify_rq_out_bits {
5301 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005302 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005303
5304 u8 syndrome[0x20];
5305
Matan Barakb4ff3a32016-02-09 14:57:42 +02005306 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005307};
5308
Alex Vesker83b502a2016-08-04 17:32:02 +03005309enum {
5310 MLX5_MODIFY_RQ_IN_MODIFY_BITMASK_VSD = 1ULL << 1,
Guy Ergas102722f2017-02-20 16:18:17 +02005311 MLX5_MODIFY_RQ_IN_MODIFY_BITMASK_SCATTER_FCS = 1ULL << 2,
Majd Dibbiny23a69642017-01-18 15:25:10 +02005312 MLX5_MODIFY_RQ_IN_MODIFY_BITMASK_RQ_COUNTER_SET_ID = 1ULL << 3,
Alex Vesker83b502a2016-08-04 17:32:02 +03005313};
5314
Saeed Mahameede2816822015-05-28 22:28:40 +03005315struct mlx5_ifc_modify_rq_in_bits {
5316 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005317 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005318
Matan Barakb4ff3a32016-02-09 14:57:42 +02005319 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005320 u8 op_mod[0x10];
5321
5322 u8 rq_state[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005323 u8 reserved_at_44[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03005324 u8 rqn[0x18];
5325
Matan Barakb4ff3a32016-02-09 14:57:42 +02005326 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005327
5328 u8 modify_bitmask[0x40];
5329
Matan Barakb4ff3a32016-02-09 14:57:42 +02005330 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005331
5332 struct mlx5_ifc_rqc_bits ctx;
5333};
5334
5335struct mlx5_ifc_modify_rmp_out_bits {
5336 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005337 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005338
5339 u8 syndrome[0x20];
5340
Matan Barakb4ff3a32016-02-09 14:57:42 +02005341 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005342};
5343
Haggai Abramonvsky01949d02015-06-04 19:30:38 +03005344struct mlx5_ifc_rmp_bitmask_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02005345 u8 reserved_at_0[0x20];
Haggai Abramonvsky01949d02015-06-04 19:30:38 +03005346
Matan Barakb4ff3a32016-02-09 14:57:42 +02005347 u8 reserved_at_20[0x1f];
Haggai Abramonvsky01949d02015-06-04 19:30:38 +03005348 u8 lwm[0x1];
5349};
5350
Saeed Mahameede2816822015-05-28 22:28:40 +03005351struct mlx5_ifc_modify_rmp_in_bits {
5352 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005353 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005354
Matan Barakb4ff3a32016-02-09 14:57:42 +02005355 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005356 u8 op_mod[0x10];
5357
5358 u8 rmp_state[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005359 u8 reserved_at_44[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03005360 u8 rmpn[0x18];
5361
Matan Barakb4ff3a32016-02-09 14:57:42 +02005362 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005363
Haggai Abramonvsky01949d02015-06-04 19:30:38 +03005364 struct mlx5_ifc_rmp_bitmask_bits bitmask;
Saeed Mahameede2816822015-05-28 22:28:40 +03005365
Matan Barakb4ff3a32016-02-09 14:57:42 +02005366 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005367
5368 struct mlx5_ifc_rmpc_bits ctx;
5369};
5370
5371struct mlx5_ifc_modify_nic_vport_context_out_bits {
5372 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005373 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005374
5375 u8 syndrome[0x20];
5376
Matan Barakb4ff3a32016-02-09 14:57:42 +02005377 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005378};
5379
5380struct mlx5_ifc_modify_nic_vport_field_select_bits {
Daniel Jurgens32f69e42018-01-04 17:25:36 +02005381 u8 reserved_at_0[0x12];
5382 u8 affiliation[0x1];
5383 u8 reserved_at_e[0x1];
Huy Nguyenbded7472017-05-30 09:42:53 +03005384 u8 disable_uc_local_lb[0x1];
5385 u8 disable_mc_local_lb[0x1];
Noa Osherovich23898c72016-06-10 00:07:37 +03005386 u8 node_guid[0x1];
5387 u8 port_guid[0x1];
Hadar Hen Zion9def7122016-08-03 17:27:30 +03005388 u8 min_inline[0x1];
Saeed Mahameedd82b7312015-12-01 18:03:14 +02005389 u8 mtu[0x1];
5390 u8 change_event[0x1];
5391 u8 promisc[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03005392 u8 permanent_address[0x1];
5393 u8 addresses_list[0x1];
5394 u8 roce_en[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005395 u8 reserved_at_1f[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03005396};
5397
5398struct mlx5_ifc_modify_nic_vport_context_in_bits {
5399 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005400 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005401
Matan Barakb4ff3a32016-02-09 14:57:42 +02005402 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005403 u8 op_mod[0x10];
5404
5405 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005406 u8 reserved_at_41[0xf];
Saeed Mahameede2816822015-05-28 22:28:40 +03005407 u8 vport_number[0x10];
5408
5409 struct mlx5_ifc_modify_nic_vport_field_select_bits field_select;
5410
Matan Barakb4ff3a32016-02-09 14:57:42 +02005411 u8 reserved_at_80[0x780];
Saeed Mahameede2816822015-05-28 22:28:40 +03005412
5413 struct mlx5_ifc_nic_vport_context_bits nic_vport_context;
5414};
5415
5416struct mlx5_ifc_modify_hca_vport_context_out_bits {
5417 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005418 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005419
5420 u8 syndrome[0x20];
5421
Matan Barakb4ff3a32016-02-09 14:57:42 +02005422 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005423};
5424
5425struct mlx5_ifc_modify_hca_vport_context_in_bits {
5426 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005427 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005428
Matan Barakb4ff3a32016-02-09 14:57:42 +02005429 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005430 u8 op_mod[0x10];
5431
5432 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005433 u8 reserved_at_41[0xb];
Majd Dibbiny707c4602015-06-04 19:30:41 +03005434 u8 port_num[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03005435 u8 vport_number[0x10];
5436
Matan Barakb4ff3a32016-02-09 14:57:42 +02005437 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005438
5439 struct mlx5_ifc_hca_vport_context_bits hca_vport_context;
5440};
5441
5442struct mlx5_ifc_modify_cq_out_bits {
5443 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005444 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005445
5446 u8 syndrome[0x20];
5447
Matan Barakb4ff3a32016-02-09 14:57:42 +02005448 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005449};
5450
5451enum {
5452 MLX5_MODIFY_CQ_IN_OP_MOD_MODIFY_CQ = 0x0,
5453 MLX5_MODIFY_CQ_IN_OP_MOD_RESIZE_CQ = 0x1,
5454};
5455
5456struct mlx5_ifc_modify_cq_in_bits {
5457 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005458 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005459
Matan Barakb4ff3a32016-02-09 14:57:42 +02005460 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005461 u8 op_mod[0x10];
5462
Matan Barakb4ff3a32016-02-09 14:57:42 +02005463 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005464 u8 cqn[0x18];
5465
5466 union mlx5_ifc_modify_field_select_resize_field_select_auto_bits modify_field_select_resize_field_select;
5467
5468 struct mlx5_ifc_cqc_bits cq_context;
5469
Matan Barakb4ff3a32016-02-09 14:57:42 +02005470 u8 reserved_at_280[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03005471
5472 u8 pas[0][0x40];
5473};
5474
5475struct mlx5_ifc_modify_cong_status_out_bits {
5476 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005477 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005478
5479 u8 syndrome[0x20];
5480
Matan Barakb4ff3a32016-02-09 14:57:42 +02005481 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005482};
5483
5484struct mlx5_ifc_modify_cong_status_in_bits {
5485 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005486 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005487
Matan Barakb4ff3a32016-02-09 14:57:42 +02005488 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005489 u8 op_mod[0x10];
5490
Matan Barakb4ff3a32016-02-09 14:57:42 +02005491 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005492 u8 priority[0x4];
5493 u8 cong_protocol[0x4];
5494
5495 u8 enable[0x1];
5496 u8 tag_enable[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005497 u8 reserved_at_62[0x1e];
Saeed Mahameede2816822015-05-28 22:28:40 +03005498};
5499
5500struct mlx5_ifc_modify_cong_params_out_bits {
5501 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005502 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005503
5504 u8 syndrome[0x20];
5505
Matan Barakb4ff3a32016-02-09 14:57:42 +02005506 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005507};
5508
5509struct mlx5_ifc_modify_cong_params_in_bits {
5510 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005511 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005512
Matan Barakb4ff3a32016-02-09 14:57:42 +02005513 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005514 u8 op_mod[0x10];
5515
Matan Barakb4ff3a32016-02-09 14:57:42 +02005516 u8 reserved_at_40[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03005517 u8 cong_protocol[0x4];
5518
5519 union mlx5_ifc_field_select_802_1_r_roce_auto_bits field_select;
5520
Matan Barakb4ff3a32016-02-09 14:57:42 +02005521 u8 reserved_at_80[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03005522
5523 union mlx5_ifc_cong_control_roce_ecn_auto_bits congestion_parameters;
5524};
5525
5526struct mlx5_ifc_manage_pages_out_bits {
5527 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005528 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005529
5530 u8 syndrome[0x20];
5531
5532 u8 output_num_entries[0x20];
5533
Matan Barakb4ff3a32016-02-09 14:57:42 +02005534 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005535
5536 u8 pas[0][0x40];
5537};
5538
5539enum {
5540 MLX5_MANAGE_PAGES_IN_OP_MOD_ALLOCATION_FAIL = 0x0,
5541 MLX5_MANAGE_PAGES_IN_OP_MOD_ALLOCATION_SUCCESS = 0x1,
5542 MLX5_MANAGE_PAGES_IN_OP_MOD_HCA_RETURN_PAGES = 0x2,
5543};
5544
5545struct mlx5_ifc_manage_pages_in_bits {
5546 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005547 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005548
Matan Barakb4ff3a32016-02-09 14:57:42 +02005549 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005550 u8 op_mod[0x10];
5551
Matan Barakb4ff3a32016-02-09 14:57:42 +02005552 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005553 u8 function_id[0x10];
5554
5555 u8 input_num_entries[0x20];
5556
5557 u8 pas[0][0x40];
5558};
5559
5560struct mlx5_ifc_mad_ifc_out_bits {
5561 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005562 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005563
5564 u8 syndrome[0x20];
5565
Matan Barakb4ff3a32016-02-09 14:57:42 +02005566 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005567
5568 u8 response_mad_packet[256][0x8];
5569};
5570
5571struct mlx5_ifc_mad_ifc_in_bits {
5572 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005573 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005574
Matan Barakb4ff3a32016-02-09 14:57:42 +02005575 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005576 u8 op_mod[0x10];
5577
5578 u8 remote_lid[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005579 u8 reserved_at_50[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005580 u8 port[0x8];
5581
Matan Barakb4ff3a32016-02-09 14:57:42 +02005582 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005583
5584 u8 mad[256][0x8];
5585};
5586
5587struct mlx5_ifc_init_hca_out_bits {
5588 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005589 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005590
5591 u8 syndrome[0x20];
5592
Matan Barakb4ff3a32016-02-09 14:57:42 +02005593 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005594};
5595
5596struct mlx5_ifc_init_hca_in_bits {
5597 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005598 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005599
Matan Barakb4ff3a32016-02-09 14:57:42 +02005600 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005601 u8 op_mod[0x10];
5602
Matan Barakb4ff3a32016-02-09 14:57:42 +02005603 u8 reserved_at_40[0x40];
Daniel Jurgens8737f812018-01-04 17:25:32 +02005604 u8 sw_owner_id[4][0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005605};
5606
5607struct mlx5_ifc_init2rtr_qp_out_bits {
5608 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005609 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005610
5611 u8 syndrome[0x20];
5612
Matan Barakb4ff3a32016-02-09 14:57:42 +02005613 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005614};
5615
5616struct mlx5_ifc_init2rtr_qp_in_bits {
5617 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005618 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005619
Matan Barakb4ff3a32016-02-09 14:57:42 +02005620 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005621 u8 op_mod[0x10];
5622
Matan Barakb4ff3a32016-02-09 14:57:42 +02005623 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005624 u8 qpn[0x18];
5625
Matan Barakb4ff3a32016-02-09 14:57:42 +02005626 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005627
5628 u8 opt_param_mask[0x20];
5629
Matan Barakb4ff3a32016-02-09 14:57:42 +02005630 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005631
5632 struct mlx5_ifc_qpc_bits qpc;
5633
Matan Barakb4ff3a32016-02-09 14:57:42 +02005634 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03005635};
5636
5637struct mlx5_ifc_init2init_qp_out_bits {
5638 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005639 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005640
5641 u8 syndrome[0x20];
5642
Matan Barakb4ff3a32016-02-09 14:57:42 +02005643 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005644};
5645
5646struct mlx5_ifc_init2init_qp_in_bits {
5647 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005648 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005649
Matan Barakb4ff3a32016-02-09 14:57:42 +02005650 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005651 u8 op_mod[0x10];
5652
Matan Barakb4ff3a32016-02-09 14:57:42 +02005653 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005654 u8 qpn[0x18];
5655
Matan Barakb4ff3a32016-02-09 14:57:42 +02005656 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005657
5658 u8 opt_param_mask[0x20];
5659
Matan Barakb4ff3a32016-02-09 14:57:42 +02005660 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005661
5662 struct mlx5_ifc_qpc_bits qpc;
5663
Matan Barakb4ff3a32016-02-09 14:57:42 +02005664 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03005665};
5666
5667struct mlx5_ifc_get_dropped_packet_log_out_bits {
5668 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005669 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005670
5671 u8 syndrome[0x20];
5672
Matan Barakb4ff3a32016-02-09 14:57:42 +02005673 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005674
5675 u8 packet_headers_log[128][0x8];
5676
5677 u8 packet_syndrome[64][0x8];
5678};
5679
5680struct mlx5_ifc_get_dropped_packet_log_in_bits {
5681 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005682 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005683
Matan Barakb4ff3a32016-02-09 14:57:42 +02005684 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005685 u8 op_mod[0x10];
5686
Matan Barakb4ff3a32016-02-09 14:57:42 +02005687 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005688};
5689
5690struct mlx5_ifc_gen_eqe_in_bits {
5691 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005692 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005693
Matan Barakb4ff3a32016-02-09 14:57:42 +02005694 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005695 u8 op_mod[0x10];
5696
Matan Barakb4ff3a32016-02-09 14:57:42 +02005697 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005698 u8 eq_number[0x8];
5699
Matan Barakb4ff3a32016-02-09 14:57:42 +02005700 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005701
5702 u8 eqe[64][0x8];
5703};
5704
5705struct mlx5_ifc_gen_eq_out_bits {
5706 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005707 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005708
5709 u8 syndrome[0x20];
5710
Matan Barakb4ff3a32016-02-09 14:57:42 +02005711 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005712};
5713
5714struct mlx5_ifc_enable_hca_out_bits {
5715 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005716 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005717
5718 u8 syndrome[0x20];
5719
Matan Barakb4ff3a32016-02-09 14:57:42 +02005720 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005721};
5722
5723struct mlx5_ifc_enable_hca_in_bits {
5724 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005725 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005726
Matan Barakb4ff3a32016-02-09 14:57:42 +02005727 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005728 u8 op_mod[0x10];
5729
Matan Barakb4ff3a32016-02-09 14:57:42 +02005730 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005731 u8 function_id[0x10];
5732
Matan Barakb4ff3a32016-02-09 14:57:42 +02005733 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005734};
5735
5736struct mlx5_ifc_drain_dct_out_bits {
5737 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005738 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005739
5740 u8 syndrome[0x20];
5741
Matan Barakb4ff3a32016-02-09 14:57:42 +02005742 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005743};
5744
5745struct mlx5_ifc_drain_dct_in_bits {
5746 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005747 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005748
Matan Barakb4ff3a32016-02-09 14:57:42 +02005749 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005750 u8 op_mod[0x10];
5751
Matan Barakb4ff3a32016-02-09 14:57:42 +02005752 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005753 u8 dctn[0x18];
5754
Matan Barakb4ff3a32016-02-09 14:57:42 +02005755 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005756};
5757
5758struct mlx5_ifc_disable_hca_out_bits {
5759 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005760 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005761
5762 u8 syndrome[0x20];
5763
Matan Barakb4ff3a32016-02-09 14:57:42 +02005764 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005765};
5766
5767struct mlx5_ifc_disable_hca_in_bits {
5768 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005769 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005770
Matan Barakb4ff3a32016-02-09 14:57:42 +02005771 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005772 u8 op_mod[0x10];
5773
Matan Barakb4ff3a32016-02-09 14:57:42 +02005774 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005775 u8 function_id[0x10];
5776
Matan Barakb4ff3a32016-02-09 14:57:42 +02005777 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005778};
5779
5780struct mlx5_ifc_detach_from_mcg_out_bits {
5781 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005782 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005783
5784 u8 syndrome[0x20];
5785
Matan Barakb4ff3a32016-02-09 14:57:42 +02005786 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005787};
5788
5789struct mlx5_ifc_detach_from_mcg_in_bits {
5790 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005791 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005792
Matan Barakb4ff3a32016-02-09 14:57:42 +02005793 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005794 u8 op_mod[0x10];
5795
Matan Barakb4ff3a32016-02-09 14:57:42 +02005796 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005797 u8 qpn[0x18];
5798
Matan Barakb4ff3a32016-02-09 14:57:42 +02005799 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005800
5801 u8 multicast_gid[16][0x8];
5802};
5803
Saeed Mahameed74862162016-06-09 15:11:34 +03005804struct mlx5_ifc_destroy_xrq_out_bits {
5805 u8 status[0x8];
5806 u8 reserved_at_8[0x18];
5807
5808 u8 syndrome[0x20];
5809
5810 u8 reserved_at_40[0x40];
5811};
5812
5813struct mlx5_ifc_destroy_xrq_in_bits {
5814 u8 opcode[0x10];
5815 u8 reserved_at_10[0x10];
5816
5817 u8 reserved_at_20[0x10];
5818 u8 op_mod[0x10];
5819
5820 u8 reserved_at_40[0x8];
5821 u8 xrqn[0x18];
5822
5823 u8 reserved_at_60[0x20];
5824};
5825
Saeed Mahameede2816822015-05-28 22:28:40 +03005826struct mlx5_ifc_destroy_xrc_srq_out_bits {
5827 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005828 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005829
5830 u8 syndrome[0x20];
5831
Matan Barakb4ff3a32016-02-09 14:57:42 +02005832 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005833};
5834
5835struct mlx5_ifc_destroy_xrc_srq_in_bits {
5836 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005837 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005838
Matan Barakb4ff3a32016-02-09 14:57:42 +02005839 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005840 u8 op_mod[0x10];
5841
Matan Barakb4ff3a32016-02-09 14:57:42 +02005842 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005843 u8 xrc_srqn[0x18];
5844
Matan Barakb4ff3a32016-02-09 14:57:42 +02005845 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005846};
5847
5848struct mlx5_ifc_destroy_tis_out_bits {
5849 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005850 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005851
5852 u8 syndrome[0x20];
5853
Matan Barakb4ff3a32016-02-09 14:57:42 +02005854 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005855};
5856
5857struct mlx5_ifc_destroy_tis_in_bits {
5858 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005859 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005860
Matan Barakb4ff3a32016-02-09 14:57:42 +02005861 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005862 u8 op_mod[0x10];
5863
Matan Barakb4ff3a32016-02-09 14:57:42 +02005864 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005865 u8 tisn[0x18];
5866
Matan Barakb4ff3a32016-02-09 14:57:42 +02005867 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005868};
5869
5870struct mlx5_ifc_destroy_tir_out_bits {
5871 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005872 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005873
5874 u8 syndrome[0x20];
5875
Matan Barakb4ff3a32016-02-09 14:57:42 +02005876 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005877};
5878
5879struct mlx5_ifc_destroy_tir_in_bits {
5880 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005881 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005882
Matan Barakb4ff3a32016-02-09 14:57:42 +02005883 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005884 u8 op_mod[0x10];
5885
Matan Barakb4ff3a32016-02-09 14:57:42 +02005886 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005887 u8 tirn[0x18];
5888
Matan Barakb4ff3a32016-02-09 14:57:42 +02005889 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005890};
5891
5892struct mlx5_ifc_destroy_srq_out_bits {
5893 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005894 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005895
5896 u8 syndrome[0x20];
5897
Matan Barakb4ff3a32016-02-09 14:57:42 +02005898 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005899};
5900
5901struct mlx5_ifc_destroy_srq_in_bits {
5902 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005903 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005904
Matan Barakb4ff3a32016-02-09 14:57:42 +02005905 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005906 u8 op_mod[0x10];
5907
Matan Barakb4ff3a32016-02-09 14:57:42 +02005908 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005909 u8 srqn[0x18];
5910
Matan Barakb4ff3a32016-02-09 14:57:42 +02005911 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005912};
5913
5914struct mlx5_ifc_destroy_sq_out_bits {
5915 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005916 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005917
5918 u8 syndrome[0x20];
5919
Matan Barakb4ff3a32016-02-09 14:57:42 +02005920 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005921};
5922
5923struct mlx5_ifc_destroy_sq_in_bits {
5924 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005925 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005926
Matan Barakb4ff3a32016-02-09 14:57:42 +02005927 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005928 u8 op_mod[0x10];
5929
Matan Barakb4ff3a32016-02-09 14:57:42 +02005930 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005931 u8 sqn[0x18];
5932
Matan Barakb4ff3a32016-02-09 14:57:42 +02005933 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005934};
5935
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +03005936struct mlx5_ifc_destroy_scheduling_element_out_bits {
5937 u8 status[0x8];
5938 u8 reserved_at_8[0x18];
5939
5940 u8 syndrome[0x20];
5941
5942 u8 reserved_at_40[0x1c0];
5943};
5944
5945struct mlx5_ifc_destroy_scheduling_element_in_bits {
5946 u8 opcode[0x10];
5947 u8 reserved_at_10[0x10];
5948
5949 u8 reserved_at_20[0x10];
5950 u8 op_mod[0x10];
5951
5952 u8 scheduling_hierarchy[0x8];
5953 u8 reserved_at_48[0x18];
5954
5955 u8 scheduling_element_id[0x20];
5956
5957 u8 reserved_at_80[0x180];
5958};
5959
Saeed Mahameede2816822015-05-28 22:28:40 +03005960struct mlx5_ifc_destroy_rqt_out_bits {
5961 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005962 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005963
5964 u8 syndrome[0x20];
5965
Matan Barakb4ff3a32016-02-09 14:57:42 +02005966 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005967};
5968
5969struct mlx5_ifc_destroy_rqt_in_bits {
5970 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005971 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005972
Matan Barakb4ff3a32016-02-09 14:57:42 +02005973 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005974 u8 op_mod[0x10];
5975
Matan Barakb4ff3a32016-02-09 14:57:42 +02005976 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005977 u8 rqtn[0x18];
5978
Matan Barakb4ff3a32016-02-09 14:57:42 +02005979 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005980};
5981
5982struct mlx5_ifc_destroy_rq_out_bits {
5983 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005984 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005985
5986 u8 syndrome[0x20];
5987
Matan Barakb4ff3a32016-02-09 14:57:42 +02005988 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005989};
5990
5991struct mlx5_ifc_destroy_rq_in_bits {
5992 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005993 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005994
Matan Barakb4ff3a32016-02-09 14:57:42 +02005995 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005996 u8 op_mod[0x10];
5997
Matan Barakb4ff3a32016-02-09 14:57:42 +02005998 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005999 u8 rqn[0x18];
6000
Matan Barakb4ff3a32016-02-09 14:57:42 +02006001 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006002};
6003
Maor Gottliebc1e0bfc2017-05-30 10:29:11 +03006004struct mlx5_ifc_set_delay_drop_params_in_bits {
6005 u8 opcode[0x10];
6006 u8 reserved_at_10[0x10];
6007
6008 u8 reserved_at_20[0x10];
6009 u8 op_mod[0x10];
6010
6011 u8 reserved_at_40[0x20];
6012
6013 u8 reserved_at_60[0x10];
6014 u8 delay_drop_timeout[0x10];
6015};
6016
6017struct mlx5_ifc_set_delay_drop_params_out_bits {
6018 u8 status[0x8];
6019 u8 reserved_at_8[0x18];
6020
6021 u8 syndrome[0x20];
6022
6023 u8 reserved_at_40[0x40];
6024};
6025
Saeed Mahameede2816822015-05-28 22:28:40 +03006026struct mlx5_ifc_destroy_rmp_out_bits {
6027 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006028 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006029
6030 u8 syndrome[0x20];
6031
Matan Barakb4ff3a32016-02-09 14:57:42 +02006032 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006033};
6034
6035struct mlx5_ifc_destroy_rmp_in_bits {
6036 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006037 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006038
Matan Barakb4ff3a32016-02-09 14:57:42 +02006039 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006040 u8 op_mod[0x10];
6041
Matan Barakb4ff3a32016-02-09 14:57:42 +02006042 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006043 u8 rmpn[0x18];
6044
Matan Barakb4ff3a32016-02-09 14:57:42 +02006045 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006046};
6047
6048struct mlx5_ifc_destroy_qp_out_bits {
6049 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006050 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006051
6052 u8 syndrome[0x20];
6053
Matan Barakb4ff3a32016-02-09 14:57:42 +02006054 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006055};
6056
6057struct mlx5_ifc_destroy_qp_in_bits {
6058 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006059 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006060
Matan Barakb4ff3a32016-02-09 14:57:42 +02006061 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006062 u8 op_mod[0x10];
6063
Matan Barakb4ff3a32016-02-09 14:57:42 +02006064 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006065 u8 qpn[0x18];
6066
Matan Barakb4ff3a32016-02-09 14:57:42 +02006067 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006068};
6069
6070struct mlx5_ifc_destroy_psv_out_bits {
6071 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006072 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006073
6074 u8 syndrome[0x20];
6075
Matan Barakb4ff3a32016-02-09 14:57:42 +02006076 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006077};
6078
6079struct mlx5_ifc_destroy_psv_in_bits {
6080 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006081 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006082
Matan Barakb4ff3a32016-02-09 14:57:42 +02006083 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006084 u8 op_mod[0x10];
6085
Matan Barakb4ff3a32016-02-09 14:57:42 +02006086 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006087 u8 psvn[0x18];
6088
Matan Barakb4ff3a32016-02-09 14:57:42 +02006089 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006090};
6091
6092struct mlx5_ifc_destroy_mkey_out_bits {
6093 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006094 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006095
6096 u8 syndrome[0x20];
6097
Matan Barakb4ff3a32016-02-09 14:57:42 +02006098 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006099};
6100
6101struct mlx5_ifc_destroy_mkey_in_bits {
6102 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006103 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006104
Matan Barakb4ff3a32016-02-09 14:57:42 +02006105 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006106 u8 op_mod[0x10];
6107
Matan Barakb4ff3a32016-02-09 14:57:42 +02006108 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006109 u8 mkey_index[0x18];
6110
Matan Barakb4ff3a32016-02-09 14:57:42 +02006111 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006112};
6113
6114struct mlx5_ifc_destroy_flow_table_out_bits {
6115 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006116 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006117
6118 u8 syndrome[0x20];
6119
Matan Barakb4ff3a32016-02-09 14:57:42 +02006120 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006121};
6122
6123struct mlx5_ifc_destroy_flow_table_in_bits {
6124 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006125 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006126
Matan Barakb4ff3a32016-02-09 14:57:42 +02006127 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006128 u8 op_mod[0x10];
6129
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03006130 u8 other_vport[0x1];
6131 u8 reserved_at_41[0xf];
6132 u8 vport_number[0x10];
6133
6134 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006135
6136 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006137 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006138
Matan Barakb4ff3a32016-02-09 14:57:42 +02006139 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006140 u8 table_id[0x18];
6141
Matan Barakb4ff3a32016-02-09 14:57:42 +02006142 u8 reserved_at_c0[0x140];
Saeed Mahameede2816822015-05-28 22:28:40 +03006143};
6144
6145struct mlx5_ifc_destroy_flow_group_out_bits {
6146 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006147 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006148
6149 u8 syndrome[0x20];
6150
Matan Barakb4ff3a32016-02-09 14:57:42 +02006151 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006152};
6153
6154struct mlx5_ifc_destroy_flow_group_in_bits {
6155 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006156 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006157
Matan Barakb4ff3a32016-02-09 14:57:42 +02006158 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006159 u8 op_mod[0x10];
6160
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03006161 u8 other_vport[0x1];
6162 u8 reserved_at_41[0xf];
6163 u8 vport_number[0x10];
6164
6165 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006166
6167 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006168 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006169
Matan Barakb4ff3a32016-02-09 14:57:42 +02006170 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006171 u8 table_id[0x18];
6172
6173 u8 group_id[0x20];
6174
Matan Barakb4ff3a32016-02-09 14:57:42 +02006175 u8 reserved_at_e0[0x120];
Saeed Mahameede2816822015-05-28 22:28:40 +03006176};
6177
6178struct mlx5_ifc_destroy_eq_out_bits {
6179 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006180 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006181
6182 u8 syndrome[0x20];
6183
Matan Barakb4ff3a32016-02-09 14:57:42 +02006184 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006185};
6186
6187struct mlx5_ifc_destroy_eq_in_bits {
6188 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006189 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006190
Matan Barakb4ff3a32016-02-09 14:57:42 +02006191 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006192 u8 op_mod[0x10];
6193
Matan Barakb4ff3a32016-02-09 14:57:42 +02006194 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006195 u8 eq_number[0x8];
6196
Matan Barakb4ff3a32016-02-09 14:57:42 +02006197 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006198};
6199
6200struct mlx5_ifc_destroy_dct_out_bits {
6201 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006202 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006203
6204 u8 syndrome[0x20];
6205
Matan Barakb4ff3a32016-02-09 14:57:42 +02006206 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006207};
6208
6209struct mlx5_ifc_destroy_dct_in_bits {
6210 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006211 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006212
Matan Barakb4ff3a32016-02-09 14:57:42 +02006213 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006214 u8 op_mod[0x10];
6215
Matan Barakb4ff3a32016-02-09 14:57:42 +02006216 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006217 u8 dctn[0x18];
6218
Matan Barakb4ff3a32016-02-09 14:57:42 +02006219 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006220};
6221
6222struct mlx5_ifc_destroy_cq_out_bits {
6223 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006224 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006225
6226 u8 syndrome[0x20];
6227
Matan Barakb4ff3a32016-02-09 14:57:42 +02006228 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006229};
6230
6231struct mlx5_ifc_destroy_cq_in_bits {
6232 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006233 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006234
Matan Barakb4ff3a32016-02-09 14:57:42 +02006235 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006236 u8 op_mod[0x10];
6237
Matan Barakb4ff3a32016-02-09 14:57:42 +02006238 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006239 u8 cqn[0x18];
6240
Matan Barakb4ff3a32016-02-09 14:57:42 +02006241 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006242};
6243
6244struct mlx5_ifc_delete_vxlan_udp_dport_out_bits {
6245 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006246 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006247
6248 u8 syndrome[0x20];
6249
Matan Barakb4ff3a32016-02-09 14:57:42 +02006250 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006251};
6252
6253struct mlx5_ifc_delete_vxlan_udp_dport_in_bits {
6254 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006255 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006256
Matan Barakb4ff3a32016-02-09 14:57:42 +02006257 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006258 u8 op_mod[0x10];
6259
Matan Barakb4ff3a32016-02-09 14:57:42 +02006260 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006261
Matan Barakb4ff3a32016-02-09 14:57:42 +02006262 u8 reserved_at_60[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006263 u8 vxlan_udp_port[0x10];
6264};
6265
6266struct mlx5_ifc_delete_l2_table_entry_out_bits {
6267 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006268 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006269
6270 u8 syndrome[0x20];
6271
Matan Barakb4ff3a32016-02-09 14:57:42 +02006272 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006273};
6274
6275struct mlx5_ifc_delete_l2_table_entry_in_bits {
6276 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006277 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006278
Matan Barakb4ff3a32016-02-09 14:57:42 +02006279 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006280 u8 op_mod[0x10];
6281
Matan Barakb4ff3a32016-02-09 14:57:42 +02006282 u8 reserved_at_40[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03006283
Matan Barakb4ff3a32016-02-09 14:57:42 +02006284 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006285 u8 table_index[0x18];
6286
Matan Barakb4ff3a32016-02-09 14:57:42 +02006287 u8 reserved_at_c0[0x140];
Saeed Mahameede2816822015-05-28 22:28:40 +03006288};
6289
6290struct mlx5_ifc_delete_fte_out_bits {
6291 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006292 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006293
6294 u8 syndrome[0x20];
6295
Matan Barakb4ff3a32016-02-09 14:57:42 +02006296 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006297};
6298
6299struct mlx5_ifc_delete_fte_in_bits {
6300 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006301 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006302
Matan Barakb4ff3a32016-02-09 14:57:42 +02006303 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006304 u8 op_mod[0x10];
6305
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03006306 u8 other_vport[0x1];
6307 u8 reserved_at_41[0xf];
6308 u8 vport_number[0x10];
6309
6310 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006311
6312 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006313 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006314
Matan Barakb4ff3a32016-02-09 14:57:42 +02006315 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006316 u8 table_id[0x18];
6317
Matan Barakb4ff3a32016-02-09 14:57:42 +02006318 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006319
6320 u8 flow_index[0x20];
6321
Matan Barakb4ff3a32016-02-09 14:57:42 +02006322 u8 reserved_at_120[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03006323};
6324
6325struct mlx5_ifc_dealloc_xrcd_out_bits {
6326 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006327 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006328
6329 u8 syndrome[0x20];
6330
Matan Barakb4ff3a32016-02-09 14:57:42 +02006331 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006332};
6333
6334struct mlx5_ifc_dealloc_xrcd_in_bits {
6335 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006336 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006337
Matan Barakb4ff3a32016-02-09 14:57:42 +02006338 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006339 u8 op_mod[0x10];
6340
Matan Barakb4ff3a32016-02-09 14:57:42 +02006341 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006342 u8 xrcd[0x18];
6343
Matan Barakb4ff3a32016-02-09 14:57:42 +02006344 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006345};
6346
6347struct mlx5_ifc_dealloc_uar_out_bits {
6348 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006349 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006350
6351 u8 syndrome[0x20];
6352
Matan Barakb4ff3a32016-02-09 14:57:42 +02006353 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006354};
6355
6356struct mlx5_ifc_dealloc_uar_in_bits {
6357 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006358 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006359
Matan Barakb4ff3a32016-02-09 14:57:42 +02006360 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006361 u8 op_mod[0x10];
6362
Matan Barakb4ff3a32016-02-09 14:57:42 +02006363 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006364 u8 uar[0x18];
6365
Matan Barakb4ff3a32016-02-09 14:57:42 +02006366 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006367};
6368
6369struct mlx5_ifc_dealloc_transport_domain_out_bits {
6370 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006371 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006372
6373 u8 syndrome[0x20];
6374
Matan Barakb4ff3a32016-02-09 14:57:42 +02006375 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006376};
6377
6378struct mlx5_ifc_dealloc_transport_domain_in_bits {
6379 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006380 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006381
Matan Barakb4ff3a32016-02-09 14:57:42 +02006382 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006383 u8 op_mod[0x10];
6384
Matan Barakb4ff3a32016-02-09 14:57:42 +02006385 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006386 u8 transport_domain[0x18];
6387
Matan Barakb4ff3a32016-02-09 14:57:42 +02006388 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006389};
6390
6391struct mlx5_ifc_dealloc_q_counter_out_bits {
6392 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006393 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006394
6395 u8 syndrome[0x20];
6396
Matan Barakb4ff3a32016-02-09 14:57:42 +02006397 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006398};
6399
6400struct mlx5_ifc_dealloc_q_counter_in_bits {
6401 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006402 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006403
Matan Barakb4ff3a32016-02-09 14:57:42 +02006404 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006405 u8 op_mod[0x10];
6406
Matan Barakb4ff3a32016-02-09 14:57:42 +02006407 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006408 u8 counter_set_id[0x8];
6409
Matan Barakb4ff3a32016-02-09 14:57:42 +02006410 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006411};
6412
6413struct mlx5_ifc_dealloc_pd_out_bits {
6414 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006415 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006416
6417 u8 syndrome[0x20];
6418
Matan Barakb4ff3a32016-02-09 14:57:42 +02006419 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006420};
6421
6422struct mlx5_ifc_dealloc_pd_in_bits {
6423 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006424 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006425
Matan Barakb4ff3a32016-02-09 14:57:42 +02006426 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006427 u8 op_mod[0x10];
6428
Matan Barakb4ff3a32016-02-09 14:57:42 +02006429 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006430 u8 pd[0x18];
6431
Matan Barakb4ff3a32016-02-09 14:57:42 +02006432 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006433};
6434
Amir Vadai9dc0b282016-05-13 12:55:39 +00006435struct mlx5_ifc_dealloc_flow_counter_out_bits {
6436 u8 status[0x8];
6437 u8 reserved_at_8[0x18];
6438
6439 u8 syndrome[0x20];
6440
6441 u8 reserved_at_40[0x40];
6442};
6443
6444struct mlx5_ifc_dealloc_flow_counter_in_bits {
6445 u8 opcode[0x10];
6446 u8 reserved_at_10[0x10];
6447
6448 u8 reserved_at_20[0x10];
6449 u8 op_mod[0x10];
6450
Rabie Louloua8ffcc72017-07-09 13:39:30 +03006451 u8 flow_counter_id[0x20];
Amir Vadai9dc0b282016-05-13 12:55:39 +00006452
6453 u8 reserved_at_60[0x20];
6454};
6455
Saeed Mahameed74862162016-06-09 15:11:34 +03006456struct mlx5_ifc_create_xrq_out_bits {
6457 u8 status[0x8];
6458 u8 reserved_at_8[0x18];
6459
6460 u8 syndrome[0x20];
6461
6462 u8 reserved_at_40[0x8];
6463 u8 xrqn[0x18];
6464
6465 u8 reserved_at_60[0x20];
6466};
6467
6468struct mlx5_ifc_create_xrq_in_bits {
6469 u8 opcode[0x10];
6470 u8 reserved_at_10[0x10];
6471
6472 u8 reserved_at_20[0x10];
6473 u8 op_mod[0x10];
6474
6475 u8 reserved_at_40[0x40];
6476
6477 struct mlx5_ifc_xrqc_bits xrq_context;
6478};
6479
Saeed Mahameede2816822015-05-28 22:28:40 +03006480struct mlx5_ifc_create_xrc_srq_out_bits {
6481 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006482 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006483
6484 u8 syndrome[0x20];
6485
Matan Barakb4ff3a32016-02-09 14:57:42 +02006486 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006487 u8 xrc_srqn[0x18];
6488
Matan Barakb4ff3a32016-02-09 14:57:42 +02006489 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006490};
6491
6492struct mlx5_ifc_create_xrc_srq_in_bits {
6493 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006494 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006495
Matan Barakb4ff3a32016-02-09 14:57:42 +02006496 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006497 u8 op_mod[0x10];
6498
Matan Barakb4ff3a32016-02-09 14:57:42 +02006499 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006500
6501 struct mlx5_ifc_xrc_srqc_bits xrc_srq_context_entry;
6502
Matan Barakb4ff3a32016-02-09 14:57:42 +02006503 u8 reserved_at_280[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03006504
6505 u8 pas[0][0x40];
6506};
6507
6508struct mlx5_ifc_create_tis_out_bits {
6509 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006510 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006511
6512 u8 syndrome[0x20];
6513
Matan Barakb4ff3a32016-02-09 14:57:42 +02006514 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006515 u8 tisn[0x18];
6516
Matan Barakb4ff3a32016-02-09 14:57:42 +02006517 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006518};
6519
6520struct mlx5_ifc_create_tis_in_bits {
6521 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006522 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006523
Matan Barakb4ff3a32016-02-09 14:57:42 +02006524 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006525 u8 op_mod[0x10];
6526
Matan Barakb4ff3a32016-02-09 14:57:42 +02006527 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03006528
6529 struct mlx5_ifc_tisc_bits ctx;
6530};
6531
6532struct mlx5_ifc_create_tir_out_bits {
6533 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006534 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006535
6536 u8 syndrome[0x20];
6537
Matan Barakb4ff3a32016-02-09 14:57:42 +02006538 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006539 u8 tirn[0x18];
6540
Matan Barakb4ff3a32016-02-09 14:57:42 +02006541 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006542};
6543
6544struct mlx5_ifc_create_tir_in_bits {
6545 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006546 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006547
Matan Barakb4ff3a32016-02-09 14:57:42 +02006548 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006549 u8 op_mod[0x10];
6550
Matan Barakb4ff3a32016-02-09 14:57:42 +02006551 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03006552
6553 struct mlx5_ifc_tirc_bits ctx;
6554};
6555
6556struct mlx5_ifc_create_srq_out_bits {
6557 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006558 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006559
6560 u8 syndrome[0x20];
6561
Matan Barakb4ff3a32016-02-09 14:57:42 +02006562 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006563 u8 srqn[0x18];
6564
Matan Barakb4ff3a32016-02-09 14:57:42 +02006565 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006566};
6567
6568struct mlx5_ifc_create_srq_in_bits {
6569 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006570 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006571
Matan Barakb4ff3a32016-02-09 14:57:42 +02006572 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006573 u8 op_mod[0x10];
6574
Matan Barakb4ff3a32016-02-09 14:57:42 +02006575 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006576
6577 struct mlx5_ifc_srqc_bits srq_context_entry;
6578
Matan Barakb4ff3a32016-02-09 14:57:42 +02006579 u8 reserved_at_280[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03006580
6581 u8 pas[0][0x40];
6582};
6583
6584struct mlx5_ifc_create_sq_out_bits {
6585 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006586 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006587
6588 u8 syndrome[0x20];
6589
Matan Barakb4ff3a32016-02-09 14:57:42 +02006590 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006591 u8 sqn[0x18];
6592
Matan Barakb4ff3a32016-02-09 14:57:42 +02006593 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006594};
6595
6596struct mlx5_ifc_create_sq_in_bits {
6597 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006598 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006599
Matan Barakb4ff3a32016-02-09 14:57:42 +02006600 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006601 u8 op_mod[0x10];
6602
Matan Barakb4ff3a32016-02-09 14:57:42 +02006603 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03006604
6605 struct mlx5_ifc_sqc_bits ctx;
6606};
6607
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +03006608struct mlx5_ifc_create_scheduling_element_out_bits {
6609 u8 status[0x8];
6610 u8 reserved_at_8[0x18];
6611
6612 u8 syndrome[0x20];
6613
6614 u8 reserved_at_40[0x40];
6615
6616 u8 scheduling_element_id[0x20];
6617
6618 u8 reserved_at_a0[0x160];
6619};
6620
6621struct mlx5_ifc_create_scheduling_element_in_bits {
6622 u8 opcode[0x10];
6623 u8 reserved_at_10[0x10];
6624
6625 u8 reserved_at_20[0x10];
6626 u8 op_mod[0x10];
6627
6628 u8 scheduling_hierarchy[0x8];
6629 u8 reserved_at_48[0x18];
6630
6631 u8 reserved_at_60[0xa0];
6632
6633 struct mlx5_ifc_scheduling_context_bits scheduling_context;
6634
6635 u8 reserved_at_300[0x100];
6636};
6637
Saeed Mahameede2816822015-05-28 22:28:40 +03006638struct mlx5_ifc_create_rqt_out_bits {
6639 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006640 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006641
6642 u8 syndrome[0x20];
6643
Matan Barakb4ff3a32016-02-09 14:57:42 +02006644 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006645 u8 rqtn[0x18];
6646
Matan Barakb4ff3a32016-02-09 14:57:42 +02006647 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006648};
6649
6650struct mlx5_ifc_create_rqt_in_bits {
6651 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006652 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006653
Matan Barakb4ff3a32016-02-09 14:57:42 +02006654 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006655 u8 op_mod[0x10];
6656
Matan Barakb4ff3a32016-02-09 14:57:42 +02006657 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03006658
6659 struct mlx5_ifc_rqtc_bits rqt_context;
6660};
6661
6662struct mlx5_ifc_create_rq_out_bits {
6663 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006664 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006665
6666 u8 syndrome[0x20];
6667
Matan Barakb4ff3a32016-02-09 14:57:42 +02006668 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006669 u8 rqn[0x18];
6670
Matan Barakb4ff3a32016-02-09 14:57:42 +02006671 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006672};
6673
6674struct mlx5_ifc_create_rq_in_bits {
6675 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006676 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006677
Matan Barakb4ff3a32016-02-09 14:57:42 +02006678 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006679 u8 op_mod[0x10];
6680
Matan Barakb4ff3a32016-02-09 14:57:42 +02006681 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03006682
6683 struct mlx5_ifc_rqc_bits ctx;
6684};
6685
6686struct mlx5_ifc_create_rmp_out_bits {
6687 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006688 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006689
6690 u8 syndrome[0x20];
6691
Matan Barakb4ff3a32016-02-09 14:57:42 +02006692 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006693 u8 rmpn[0x18];
6694
Matan Barakb4ff3a32016-02-09 14:57:42 +02006695 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006696};
6697
6698struct mlx5_ifc_create_rmp_in_bits {
6699 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006700 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006701
Matan Barakb4ff3a32016-02-09 14:57:42 +02006702 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006703 u8 op_mod[0x10];
6704
Matan Barakb4ff3a32016-02-09 14:57:42 +02006705 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03006706
6707 struct mlx5_ifc_rmpc_bits ctx;
6708};
6709
6710struct mlx5_ifc_create_qp_out_bits {
6711 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006712 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006713
6714 u8 syndrome[0x20];
6715
Matan Barakb4ff3a32016-02-09 14:57:42 +02006716 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006717 u8 qpn[0x18];
6718
Matan Barakb4ff3a32016-02-09 14:57:42 +02006719 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006720};
6721
6722struct mlx5_ifc_create_qp_in_bits {
6723 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006724 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006725
Matan Barakb4ff3a32016-02-09 14:57:42 +02006726 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006727 u8 op_mod[0x10];
6728
Matan Barakb4ff3a32016-02-09 14:57:42 +02006729 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006730
6731 u8 opt_param_mask[0x20];
6732
Matan Barakb4ff3a32016-02-09 14:57:42 +02006733 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006734
6735 struct mlx5_ifc_qpc_bits qpc;
6736
Matan Barakb4ff3a32016-02-09 14:57:42 +02006737 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03006738
6739 u8 pas[0][0x40];
6740};
6741
6742struct mlx5_ifc_create_psv_out_bits {
6743 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006744 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006745
6746 u8 syndrome[0x20];
6747
Matan Barakb4ff3a32016-02-09 14:57:42 +02006748 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006749
Matan Barakb4ff3a32016-02-09 14:57:42 +02006750 u8 reserved_at_80[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006751 u8 psv0_index[0x18];
6752
Matan Barakb4ff3a32016-02-09 14:57:42 +02006753 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006754 u8 psv1_index[0x18];
6755
Matan Barakb4ff3a32016-02-09 14:57:42 +02006756 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006757 u8 psv2_index[0x18];
6758
Matan Barakb4ff3a32016-02-09 14:57:42 +02006759 u8 reserved_at_e0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006760 u8 psv3_index[0x18];
6761};
6762
6763struct mlx5_ifc_create_psv_in_bits {
6764 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006765 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006766
Matan Barakb4ff3a32016-02-09 14:57:42 +02006767 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006768 u8 op_mod[0x10];
6769
6770 u8 num_psv[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006771 u8 reserved_at_44[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03006772 u8 pd[0x18];
6773
Matan Barakb4ff3a32016-02-09 14:57:42 +02006774 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006775};
6776
6777struct mlx5_ifc_create_mkey_out_bits {
6778 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006779 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006780
6781 u8 syndrome[0x20];
6782
Matan Barakb4ff3a32016-02-09 14:57:42 +02006783 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006784 u8 mkey_index[0x18];
6785
Matan Barakb4ff3a32016-02-09 14:57:42 +02006786 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006787};
6788
6789struct mlx5_ifc_create_mkey_in_bits {
6790 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006791 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006792
Matan Barakb4ff3a32016-02-09 14:57:42 +02006793 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006794 u8 op_mod[0x10];
6795
Matan Barakb4ff3a32016-02-09 14:57:42 +02006796 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006797
6798 u8 pg_access[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006799 u8 reserved_at_61[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03006800
6801 struct mlx5_ifc_mkc_bits memory_key_mkey_entry;
6802
Matan Barakb4ff3a32016-02-09 14:57:42 +02006803 u8 reserved_at_280[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03006804
6805 u8 translations_octword_actual_size[0x20];
6806
Matan Barakb4ff3a32016-02-09 14:57:42 +02006807 u8 reserved_at_320[0x560];
Saeed Mahameede2816822015-05-28 22:28:40 +03006808
6809 u8 klm_pas_mtt[0][0x20];
6810};
6811
6812struct mlx5_ifc_create_flow_table_out_bits {
6813 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006814 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006815
6816 u8 syndrome[0x20];
6817
Matan Barakb4ff3a32016-02-09 14:57:42 +02006818 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006819 u8 table_id[0x18];
6820
Matan Barakb4ff3a32016-02-09 14:57:42 +02006821 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006822};
6823
Maor Gottlieb0c90e9c2017-03-12 11:35:23 +02006824struct mlx5_ifc_flow_table_context_bits {
6825 u8 encap_en[0x1];
6826 u8 decap_en[0x1];
6827 u8 reserved_at_2[0x2];
6828 u8 table_miss_action[0x4];
6829 u8 level[0x8];
6830 u8 reserved_at_10[0x8];
6831 u8 log_size[0x8];
6832
6833 u8 reserved_at_20[0x8];
6834 u8 table_miss_id[0x18];
6835
6836 u8 reserved_at_40[0x8];
6837 u8 lag_master_next_table_id[0x18];
6838
6839 u8 reserved_at_60[0xe0];
6840};
6841
Saeed Mahameede2816822015-05-28 22:28:40 +03006842struct mlx5_ifc_create_flow_table_in_bits {
6843 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006844 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006845
Matan Barakb4ff3a32016-02-09 14:57:42 +02006846 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006847 u8 op_mod[0x10];
6848
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03006849 u8 other_vport[0x1];
6850 u8 reserved_at_41[0xf];
6851 u8 vport_number[0x10];
6852
6853 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006854
6855 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006856 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006857
Matan Barakb4ff3a32016-02-09 14:57:42 +02006858 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006859
Maor Gottlieb0c90e9c2017-03-12 11:35:23 +02006860 struct mlx5_ifc_flow_table_context_bits flow_table_context;
Saeed Mahameede2816822015-05-28 22:28:40 +03006861};
6862
6863struct mlx5_ifc_create_flow_group_out_bits {
6864 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006865 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006866
6867 u8 syndrome[0x20];
6868
Matan Barakb4ff3a32016-02-09 14:57:42 +02006869 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006870 u8 group_id[0x18];
6871
Matan Barakb4ff3a32016-02-09 14:57:42 +02006872 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006873};
6874
6875enum {
6876 MLX5_CREATE_FLOW_GROUP_IN_MATCH_CRITERIA_ENABLE_OUTER_HEADERS = 0x0,
6877 MLX5_CREATE_FLOW_GROUP_IN_MATCH_CRITERIA_ENABLE_MISC_PARAMETERS = 0x1,
6878 MLX5_CREATE_FLOW_GROUP_IN_MATCH_CRITERIA_ENABLE_INNER_HEADERS = 0x2,
6879};
6880
6881struct mlx5_ifc_create_flow_group_in_bits {
6882 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006883 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006884
Matan Barakb4ff3a32016-02-09 14:57:42 +02006885 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006886 u8 op_mod[0x10];
6887
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03006888 u8 other_vport[0x1];
6889 u8 reserved_at_41[0xf];
6890 u8 vport_number[0x10];
6891
6892 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006893
6894 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006895 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006896
Matan Barakb4ff3a32016-02-09 14:57:42 +02006897 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006898 u8 table_id[0x18];
6899
Matan Barakb4ff3a32016-02-09 14:57:42 +02006900 u8 reserved_at_c0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006901
6902 u8 start_flow_index[0x20];
6903
Matan Barakb4ff3a32016-02-09 14:57:42 +02006904 u8 reserved_at_100[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006905
6906 u8 end_flow_index[0x20];
6907
Matan Barakb4ff3a32016-02-09 14:57:42 +02006908 u8 reserved_at_140[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03006909
Matan Barakb4ff3a32016-02-09 14:57:42 +02006910 u8 reserved_at_1e0[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006911 u8 match_criteria_enable[0x8];
6912
6913 struct mlx5_ifc_fte_match_param_bits match_criteria;
6914
Matan Barakb4ff3a32016-02-09 14:57:42 +02006915 u8 reserved_at_1200[0xe00];
Saeed Mahameede2816822015-05-28 22:28:40 +03006916};
6917
6918struct mlx5_ifc_create_eq_out_bits {
6919 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006920 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006921
6922 u8 syndrome[0x20];
6923
Matan Barakb4ff3a32016-02-09 14:57:42 +02006924 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006925 u8 eq_number[0x8];
6926
Matan Barakb4ff3a32016-02-09 14:57:42 +02006927 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006928};
6929
6930struct mlx5_ifc_create_eq_in_bits {
6931 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006932 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006933
Matan Barakb4ff3a32016-02-09 14:57:42 +02006934 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006935 u8 op_mod[0x10];
6936
Matan Barakb4ff3a32016-02-09 14:57:42 +02006937 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006938
6939 struct mlx5_ifc_eqc_bits eq_context_entry;
6940
Matan Barakb4ff3a32016-02-09 14:57:42 +02006941 u8 reserved_at_280[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006942
6943 u8 event_bitmask[0x40];
6944
Matan Barakb4ff3a32016-02-09 14:57:42 +02006945 u8 reserved_at_300[0x580];
Saeed Mahameede2816822015-05-28 22:28:40 +03006946
6947 u8 pas[0][0x40];
6948};
6949
6950struct mlx5_ifc_create_dct_out_bits {
6951 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006952 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006953
6954 u8 syndrome[0x20];
6955
Matan Barakb4ff3a32016-02-09 14:57:42 +02006956 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006957 u8 dctn[0x18];
6958
Matan Barakb4ff3a32016-02-09 14:57:42 +02006959 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006960};
6961
6962struct mlx5_ifc_create_dct_in_bits {
6963 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006964 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006965
Matan Barakb4ff3a32016-02-09 14:57:42 +02006966 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006967 u8 op_mod[0x10];
6968
Matan Barakb4ff3a32016-02-09 14:57:42 +02006969 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006970
6971 struct mlx5_ifc_dctc_bits dct_context_entry;
6972
Matan Barakb4ff3a32016-02-09 14:57:42 +02006973 u8 reserved_at_280[0x180];
Saeed Mahameede2816822015-05-28 22:28:40 +03006974};
6975
6976struct mlx5_ifc_create_cq_out_bits {
6977 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006978 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006979
6980 u8 syndrome[0x20];
6981
Matan Barakb4ff3a32016-02-09 14:57:42 +02006982 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006983 u8 cqn[0x18];
6984
Matan Barakb4ff3a32016-02-09 14:57:42 +02006985 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006986};
6987
6988struct mlx5_ifc_create_cq_in_bits {
6989 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006990 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006991
Matan Barakb4ff3a32016-02-09 14:57:42 +02006992 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006993 u8 op_mod[0x10];
6994
Matan Barakb4ff3a32016-02-09 14:57:42 +02006995 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006996
6997 struct mlx5_ifc_cqc_bits cq_context;
6998
Matan Barakb4ff3a32016-02-09 14:57:42 +02006999 u8 reserved_at_280[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03007000
7001 u8 pas[0][0x40];
7002};
7003
7004struct mlx5_ifc_config_int_moderation_out_bits {
7005 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007006 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007007
7008 u8 syndrome[0x20];
7009
Matan Barakb4ff3a32016-02-09 14:57:42 +02007010 u8 reserved_at_40[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007011 u8 min_delay[0xc];
7012 u8 int_vector[0x10];
7013
Matan Barakb4ff3a32016-02-09 14:57:42 +02007014 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007015};
7016
7017enum {
7018 MLX5_CONFIG_INT_MODERATION_IN_OP_MOD_WRITE = 0x0,
7019 MLX5_CONFIG_INT_MODERATION_IN_OP_MOD_READ = 0x1,
7020};
7021
7022struct mlx5_ifc_config_int_moderation_in_bits {
7023 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007024 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007025
Matan Barakb4ff3a32016-02-09 14:57:42 +02007026 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007027 u8 op_mod[0x10];
7028
Matan Barakb4ff3a32016-02-09 14:57:42 +02007029 u8 reserved_at_40[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007030 u8 min_delay[0xc];
7031 u8 int_vector[0x10];
7032
Matan Barakb4ff3a32016-02-09 14:57:42 +02007033 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007034};
7035
7036struct mlx5_ifc_attach_to_mcg_out_bits {
7037 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007038 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007039
7040 u8 syndrome[0x20];
7041
Matan Barakb4ff3a32016-02-09 14:57:42 +02007042 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007043};
7044
7045struct mlx5_ifc_attach_to_mcg_in_bits {
7046 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007047 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007048
Matan Barakb4ff3a32016-02-09 14:57:42 +02007049 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007050 u8 op_mod[0x10];
7051
Matan Barakb4ff3a32016-02-09 14:57:42 +02007052 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007053 u8 qpn[0x18];
7054
Matan Barakb4ff3a32016-02-09 14:57:42 +02007055 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007056
7057 u8 multicast_gid[16][0x8];
7058};
7059
Saeed Mahameed74862162016-06-09 15:11:34 +03007060struct mlx5_ifc_arm_xrq_out_bits {
7061 u8 status[0x8];
7062 u8 reserved_at_8[0x18];
7063
7064 u8 syndrome[0x20];
7065
7066 u8 reserved_at_40[0x40];
7067};
7068
7069struct mlx5_ifc_arm_xrq_in_bits {
7070 u8 opcode[0x10];
7071 u8 reserved_at_10[0x10];
7072
7073 u8 reserved_at_20[0x10];
7074 u8 op_mod[0x10];
7075
7076 u8 reserved_at_40[0x8];
7077 u8 xrqn[0x18];
7078
7079 u8 reserved_at_60[0x10];
7080 u8 lwm[0x10];
7081};
7082
Saeed Mahameede2816822015-05-28 22:28:40 +03007083struct mlx5_ifc_arm_xrc_srq_out_bits {
7084 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007085 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007086
7087 u8 syndrome[0x20];
7088
Matan Barakb4ff3a32016-02-09 14:57:42 +02007089 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007090};
7091
7092enum {
7093 MLX5_ARM_XRC_SRQ_IN_OP_MOD_XRC_SRQ = 0x1,
7094};
7095
7096struct mlx5_ifc_arm_xrc_srq_in_bits {
7097 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007098 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007099
Matan Barakb4ff3a32016-02-09 14:57:42 +02007100 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007101 u8 op_mod[0x10];
7102
Matan Barakb4ff3a32016-02-09 14:57:42 +02007103 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007104 u8 xrc_srqn[0x18];
7105
Matan Barakb4ff3a32016-02-09 14:57:42 +02007106 u8 reserved_at_60[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007107 u8 lwm[0x10];
7108};
7109
7110struct mlx5_ifc_arm_rq_out_bits {
7111 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007112 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007113
7114 u8 syndrome[0x20];
7115
Matan Barakb4ff3a32016-02-09 14:57:42 +02007116 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007117};
7118
7119enum {
Saeed Mahameed74862162016-06-09 15:11:34 +03007120 MLX5_ARM_RQ_IN_OP_MOD_SRQ = 0x1,
7121 MLX5_ARM_RQ_IN_OP_MOD_XRQ = 0x2,
Saeed Mahameede2816822015-05-28 22:28:40 +03007122};
7123
7124struct mlx5_ifc_arm_rq_in_bits {
7125 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007126 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007127
Matan Barakb4ff3a32016-02-09 14:57:42 +02007128 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007129 u8 op_mod[0x10];
7130
Matan Barakb4ff3a32016-02-09 14:57:42 +02007131 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007132 u8 srq_number[0x18];
7133
Matan Barakb4ff3a32016-02-09 14:57:42 +02007134 u8 reserved_at_60[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007135 u8 lwm[0x10];
7136};
7137
7138struct mlx5_ifc_arm_dct_out_bits {
7139 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007140 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007141
7142 u8 syndrome[0x20];
7143
Matan Barakb4ff3a32016-02-09 14:57:42 +02007144 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007145};
7146
7147struct mlx5_ifc_arm_dct_in_bits {
7148 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007149 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007150
Matan Barakb4ff3a32016-02-09 14:57:42 +02007151 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007152 u8 op_mod[0x10];
7153
Matan Barakb4ff3a32016-02-09 14:57:42 +02007154 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007155 u8 dct_number[0x18];
7156
Matan Barakb4ff3a32016-02-09 14:57:42 +02007157 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007158};
7159
7160struct mlx5_ifc_alloc_xrcd_out_bits {
7161 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007162 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007163
7164 u8 syndrome[0x20];
7165
Matan Barakb4ff3a32016-02-09 14:57:42 +02007166 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007167 u8 xrcd[0x18];
7168
Matan Barakb4ff3a32016-02-09 14:57:42 +02007169 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007170};
7171
7172struct mlx5_ifc_alloc_xrcd_in_bits {
7173 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007174 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007175
Matan Barakb4ff3a32016-02-09 14:57:42 +02007176 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007177 u8 op_mod[0x10];
7178
Matan Barakb4ff3a32016-02-09 14:57:42 +02007179 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007180};
7181
7182struct mlx5_ifc_alloc_uar_out_bits {
7183 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007184 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007185
7186 u8 syndrome[0x20];
7187
Matan Barakb4ff3a32016-02-09 14:57:42 +02007188 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007189 u8 uar[0x18];
7190
Matan Barakb4ff3a32016-02-09 14:57:42 +02007191 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007192};
7193
7194struct mlx5_ifc_alloc_uar_in_bits {
7195 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007196 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007197
Matan Barakb4ff3a32016-02-09 14:57:42 +02007198 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007199 u8 op_mod[0x10];
7200
Matan Barakb4ff3a32016-02-09 14:57:42 +02007201 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007202};
7203
7204struct mlx5_ifc_alloc_transport_domain_out_bits {
7205 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007206 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007207
7208 u8 syndrome[0x20];
7209
Matan Barakb4ff3a32016-02-09 14:57:42 +02007210 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007211 u8 transport_domain[0x18];
7212
Matan Barakb4ff3a32016-02-09 14:57:42 +02007213 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007214};
7215
7216struct mlx5_ifc_alloc_transport_domain_in_bits {
7217 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007218 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007219
Matan Barakb4ff3a32016-02-09 14:57:42 +02007220 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007221 u8 op_mod[0x10];
7222
Matan Barakb4ff3a32016-02-09 14:57:42 +02007223 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007224};
7225
7226struct mlx5_ifc_alloc_q_counter_out_bits {
7227 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007228 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007229
7230 u8 syndrome[0x20];
7231
Matan Barakb4ff3a32016-02-09 14:57:42 +02007232 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007233 u8 counter_set_id[0x8];
7234
Matan Barakb4ff3a32016-02-09 14:57:42 +02007235 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007236};
7237
7238struct mlx5_ifc_alloc_q_counter_in_bits {
7239 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007240 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007241
Matan Barakb4ff3a32016-02-09 14:57:42 +02007242 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007243 u8 op_mod[0x10];
7244
Matan Barakb4ff3a32016-02-09 14:57:42 +02007245 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007246};
7247
7248struct mlx5_ifc_alloc_pd_out_bits {
7249 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007250 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007251
7252 u8 syndrome[0x20];
7253
Matan Barakb4ff3a32016-02-09 14:57:42 +02007254 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007255 u8 pd[0x18];
7256
Matan Barakb4ff3a32016-02-09 14:57:42 +02007257 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007258};
7259
7260struct mlx5_ifc_alloc_pd_in_bits {
7261 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007262 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007263
Matan Barakb4ff3a32016-02-09 14:57:42 +02007264 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007265 u8 op_mod[0x10];
7266
Matan Barakb4ff3a32016-02-09 14:57:42 +02007267 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007268};
7269
Amir Vadai9dc0b282016-05-13 12:55:39 +00007270struct mlx5_ifc_alloc_flow_counter_out_bits {
7271 u8 status[0x8];
7272 u8 reserved_at_8[0x18];
7273
7274 u8 syndrome[0x20];
7275
Rabie Louloua8ffcc72017-07-09 13:39:30 +03007276 u8 flow_counter_id[0x20];
Amir Vadai9dc0b282016-05-13 12:55:39 +00007277
7278 u8 reserved_at_60[0x20];
7279};
7280
7281struct mlx5_ifc_alloc_flow_counter_in_bits {
7282 u8 opcode[0x10];
7283 u8 reserved_at_10[0x10];
7284
7285 u8 reserved_at_20[0x10];
7286 u8 op_mod[0x10];
7287
7288 u8 reserved_at_40[0x40];
7289};
7290
Saeed Mahameede2816822015-05-28 22:28:40 +03007291struct mlx5_ifc_add_vxlan_udp_dport_out_bits {
7292 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007293 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007294
7295 u8 syndrome[0x20];
7296
Matan Barakb4ff3a32016-02-09 14:57:42 +02007297 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007298};
7299
7300struct mlx5_ifc_add_vxlan_udp_dport_in_bits {
7301 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007302 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007303
Matan Barakb4ff3a32016-02-09 14:57:42 +02007304 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007305 u8 op_mod[0x10];
7306
Matan Barakb4ff3a32016-02-09 14:57:42 +02007307 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007308
Matan Barakb4ff3a32016-02-09 14:57:42 +02007309 u8 reserved_at_60[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007310 u8 vxlan_udp_port[0x10];
7311};
7312
Eran Ben Elisha37e92a92017-11-13 10:11:27 +02007313struct mlx5_ifc_set_pp_rate_limit_out_bits {
Saeed Mahameed74862162016-06-09 15:11:34 +03007314 u8 status[0x8];
7315 u8 reserved_at_8[0x18];
7316
7317 u8 syndrome[0x20];
7318
7319 u8 reserved_at_40[0x40];
7320};
7321
Eran Ben Elisha37e92a92017-11-13 10:11:27 +02007322struct mlx5_ifc_set_pp_rate_limit_in_bits {
Saeed Mahameed74862162016-06-09 15:11:34 +03007323 u8 opcode[0x10];
7324 u8 reserved_at_10[0x10];
7325
7326 u8 reserved_at_20[0x10];
7327 u8 op_mod[0x10];
7328
7329 u8 reserved_at_40[0x10];
7330 u8 rate_limit_index[0x10];
7331
7332 u8 reserved_at_60[0x20];
7333
7334 u8 rate_limit[0x20];
Eran Ben Elisha37e92a92017-11-13 10:11:27 +02007335
7336 u8 reserved_at_a0[0x160];
Saeed Mahameed74862162016-06-09 15:11:34 +03007337};
7338
Saeed Mahameede2816822015-05-28 22:28:40 +03007339struct mlx5_ifc_access_register_out_bits {
7340 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007341 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007342
7343 u8 syndrome[0x20];
7344
Matan Barakb4ff3a32016-02-09 14:57:42 +02007345 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007346
7347 u8 register_data[0][0x20];
7348};
7349
7350enum {
7351 MLX5_ACCESS_REGISTER_IN_OP_MOD_WRITE = 0x0,
7352 MLX5_ACCESS_REGISTER_IN_OP_MOD_READ = 0x1,
7353};
7354
7355struct mlx5_ifc_access_register_in_bits {
7356 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007357 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007358
Matan Barakb4ff3a32016-02-09 14:57:42 +02007359 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007360 u8 op_mod[0x10];
7361
Matan Barakb4ff3a32016-02-09 14:57:42 +02007362 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007363 u8 register_id[0x10];
7364
7365 u8 argument[0x20];
7366
7367 u8 register_data[0][0x20];
7368};
7369
7370struct mlx5_ifc_sltp_reg_bits {
7371 u8 status[0x4];
7372 u8 version[0x4];
7373 u8 local_port[0x8];
7374 u8 pnat[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007375 u8 reserved_at_12[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03007376 u8 lane[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007377 u8 reserved_at_18[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007378
Matan Barakb4ff3a32016-02-09 14:57:42 +02007379 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007380
Matan Barakb4ff3a32016-02-09 14:57:42 +02007381 u8 reserved_at_40[0x7];
Saeed Mahameede2816822015-05-28 22:28:40 +03007382 u8 polarity[0x1];
7383 u8 ob_tap0[0x8];
7384 u8 ob_tap1[0x8];
7385 u8 ob_tap2[0x8];
7386
Matan Barakb4ff3a32016-02-09 14:57:42 +02007387 u8 reserved_at_60[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03007388 u8 ob_preemp_mode[0x4];
7389 u8 ob_reg[0x8];
7390 u8 ob_bias[0x8];
7391
Matan Barakb4ff3a32016-02-09 14:57:42 +02007392 u8 reserved_at_80[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007393};
7394
7395struct mlx5_ifc_slrg_reg_bits {
7396 u8 status[0x4];
7397 u8 version[0x4];
7398 u8 local_port[0x8];
7399 u8 pnat[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007400 u8 reserved_at_12[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03007401 u8 lane[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007402 u8 reserved_at_18[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007403
7404 u8 time_to_link_up[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007405 u8 reserved_at_30[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03007406 u8 grade_lane_speed[0x4];
7407
7408 u8 grade_version[0x8];
7409 u8 grade[0x18];
7410
Matan Barakb4ff3a32016-02-09 14:57:42 +02007411 u8 reserved_at_60[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007412 u8 height_grade_type[0x4];
7413 u8 height_grade[0x18];
7414
7415 u8 height_dz[0x10];
7416 u8 height_dv[0x10];
7417
Matan Barakb4ff3a32016-02-09 14:57:42 +02007418 u8 reserved_at_a0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007419 u8 height_sigma[0x10];
7420
Matan Barakb4ff3a32016-02-09 14:57:42 +02007421 u8 reserved_at_c0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007422
Matan Barakb4ff3a32016-02-09 14:57:42 +02007423 u8 reserved_at_e0[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007424 u8 phase_grade_type[0x4];
7425 u8 phase_grade[0x18];
7426
Matan Barakb4ff3a32016-02-09 14:57:42 +02007427 u8 reserved_at_100[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007428 u8 phase_eo_pos[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007429 u8 reserved_at_110[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007430 u8 phase_eo_neg[0x8];
7431
7432 u8 ffe_set_tested[0x10];
7433 u8 test_errors_per_lane[0x10];
7434};
7435
7436struct mlx5_ifc_pvlc_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007437 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007438 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007439 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007440
Matan Barakb4ff3a32016-02-09 14:57:42 +02007441 u8 reserved_at_20[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007442 u8 vl_hw_cap[0x4];
7443
Matan Barakb4ff3a32016-02-09 14:57:42 +02007444 u8 reserved_at_40[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007445 u8 vl_admin[0x4];
7446
Matan Barakb4ff3a32016-02-09 14:57:42 +02007447 u8 reserved_at_60[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007448 u8 vl_operational[0x4];
7449};
7450
7451struct mlx5_ifc_pude_reg_bits {
7452 u8 swid[0x8];
7453 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007454 u8 reserved_at_10[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007455 u8 admin_status[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007456 u8 reserved_at_18[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007457 u8 oper_status[0x4];
7458
Matan Barakb4ff3a32016-02-09 14:57:42 +02007459 u8 reserved_at_20[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03007460};
7461
7462struct mlx5_ifc_ptys_reg_bits {
Bodong Wange7e31ca2016-09-07 19:07:58 +03007463 u8 reserved_at_0[0x1];
Saeed Mahameed74862162016-06-09 15:11:34 +03007464 u8 an_disable_admin[0x1];
Bodong Wange7e31ca2016-09-07 19:07:58 +03007465 u8 an_disable_cap[0x1];
7466 u8 reserved_at_3[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03007467 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007468 u8 reserved_at_10[0xd];
Saeed Mahameede2816822015-05-28 22:28:40 +03007469 u8 proto_mask[0x3];
7470
Saeed Mahameed74862162016-06-09 15:11:34 +03007471 u8 an_status[0x4];
7472 u8 reserved_at_24[0x3c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007473
7474 u8 eth_proto_capability[0x20];
7475
7476 u8 ib_link_width_capability[0x10];
7477 u8 ib_proto_capability[0x10];
7478
Matan Barakb4ff3a32016-02-09 14:57:42 +02007479 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007480
7481 u8 eth_proto_admin[0x20];
7482
7483 u8 ib_link_width_admin[0x10];
7484 u8 ib_proto_admin[0x10];
7485
Matan Barakb4ff3a32016-02-09 14:57:42 +02007486 u8 reserved_at_100[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007487
7488 u8 eth_proto_oper[0x20];
7489
7490 u8 ib_link_width_oper[0x10];
7491 u8 ib_proto_oper[0x10];
7492
Eran Ben Elisha5b4793f2017-02-13 14:00:59 +02007493 u8 reserved_at_160[0x1c];
7494 u8 connector_type[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007495
7496 u8 eth_proto_lp_advertise[0x20];
7497
Matan Barakb4ff3a32016-02-09 14:57:42 +02007498 u8 reserved_at_1a0[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03007499};
7500
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03007501struct mlx5_ifc_mlcr_reg_bits {
7502 u8 reserved_at_0[0x8];
7503 u8 local_port[0x8];
7504 u8 reserved_at_10[0x20];
7505
7506 u8 beacon_duration[0x10];
7507 u8 reserved_at_40[0x10];
7508
7509 u8 beacon_remain[0x10];
7510};
7511
Saeed Mahameede2816822015-05-28 22:28:40 +03007512struct mlx5_ifc_ptas_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007513 u8 reserved_at_0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007514
7515 u8 algorithm_options[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007516 u8 reserved_at_30[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007517 u8 repetitions_mode[0x4];
7518 u8 num_of_repetitions[0x8];
7519
7520 u8 grade_version[0x8];
7521 u8 height_grade_type[0x4];
7522 u8 phase_grade_type[0x4];
7523 u8 height_grade_weight[0x8];
7524 u8 phase_grade_weight[0x8];
7525
7526 u8 gisim_measure_bits[0x10];
7527 u8 adaptive_tap_measure_bits[0x10];
7528
7529 u8 ber_bath_high_error_threshold[0x10];
7530 u8 ber_bath_mid_error_threshold[0x10];
7531
7532 u8 ber_bath_low_error_threshold[0x10];
7533 u8 one_ratio_high_threshold[0x10];
7534
7535 u8 one_ratio_high_mid_threshold[0x10];
7536 u8 one_ratio_low_mid_threshold[0x10];
7537
7538 u8 one_ratio_low_threshold[0x10];
7539 u8 ndeo_error_threshold[0x10];
7540
7541 u8 mixer_offset_step_size[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007542 u8 reserved_at_110[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007543 u8 mix90_phase_for_voltage_bath[0x8];
7544
7545 u8 mixer_offset_start[0x10];
7546 u8 mixer_offset_end[0x10];
7547
Matan Barakb4ff3a32016-02-09 14:57:42 +02007548 u8 reserved_at_140[0x15];
Saeed Mahameede2816822015-05-28 22:28:40 +03007549 u8 ber_test_time[0xb];
7550};
7551
7552struct mlx5_ifc_pspa_reg_bits {
7553 u8 swid[0x8];
7554 u8 local_port[0x8];
7555 u8 sub_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007556 u8 reserved_at_18[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007557
Matan Barakb4ff3a32016-02-09 14:57:42 +02007558 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007559};
7560
7561struct mlx5_ifc_pqdr_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007562 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007563 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007564 u8 reserved_at_10[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03007565 u8 prio[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007566 u8 reserved_at_18[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03007567 u8 mode[0x2];
7568
Matan Barakb4ff3a32016-02-09 14:57:42 +02007569 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007570
Matan Barakb4ff3a32016-02-09 14:57:42 +02007571 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007572 u8 min_threshold[0x10];
7573
Matan Barakb4ff3a32016-02-09 14:57:42 +02007574 u8 reserved_at_60[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007575 u8 max_threshold[0x10];
7576
Matan Barakb4ff3a32016-02-09 14:57:42 +02007577 u8 reserved_at_80[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007578 u8 mark_probability_denominator[0x10];
7579
Matan Barakb4ff3a32016-02-09 14:57:42 +02007580 u8 reserved_at_a0[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03007581};
7582
7583struct mlx5_ifc_ppsc_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007584 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007585 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007586 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007587
Matan Barakb4ff3a32016-02-09 14:57:42 +02007588 u8 reserved_at_20[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03007589
Matan Barakb4ff3a32016-02-09 14:57:42 +02007590 u8 reserved_at_80[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007591 u8 wrps_admin[0x4];
7592
Matan Barakb4ff3a32016-02-09 14:57:42 +02007593 u8 reserved_at_a0[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007594 u8 wrps_status[0x4];
7595
Matan Barakb4ff3a32016-02-09 14:57:42 +02007596 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007597 u8 up_threshold[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007598 u8 reserved_at_d0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007599 u8 down_threshold[0x8];
7600
Matan Barakb4ff3a32016-02-09 14:57:42 +02007601 u8 reserved_at_e0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007602
Matan Barakb4ff3a32016-02-09 14:57:42 +02007603 u8 reserved_at_100[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007604 u8 srps_admin[0x4];
7605
Matan Barakb4ff3a32016-02-09 14:57:42 +02007606 u8 reserved_at_120[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007607 u8 srps_status[0x4];
7608
Matan Barakb4ff3a32016-02-09 14:57:42 +02007609 u8 reserved_at_140[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007610};
7611
7612struct mlx5_ifc_pplr_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007613 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007614 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007615 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007616
Matan Barakb4ff3a32016-02-09 14:57:42 +02007617 u8 reserved_at_20[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007618 u8 lb_cap[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007619 u8 reserved_at_30[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007620 u8 lb_en[0x8];
7621};
7622
7623struct mlx5_ifc_pplm_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007624 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007625 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007626 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007627
Matan Barakb4ff3a32016-02-09 14:57:42 +02007628 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007629
7630 u8 port_profile_mode[0x8];
7631 u8 static_port_profile[0x8];
7632 u8 active_port_profile[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007633 u8 reserved_at_58[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007634
7635 u8 retransmission_active[0x8];
7636 u8 fec_mode_active[0x18];
7637
Matan Barakb4ff3a32016-02-09 14:57:42 +02007638 u8 reserved_at_80[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007639};
7640
7641struct mlx5_ifc_ppcnt_reg_bits {
7642 u8 swid[0x8];
7643 u8 local_port[0x8];
7644 u8 pnat[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007645 u8 reserved_at_12[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007646 u8 grp[0x6];
7647
7648 u8 clr[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007649 u8 reserved_at_21[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007650 u8 prio_tc[0x3];
7651
7652 union mlx5_ifc_eth_cntrs_grp_data_layout_auto_bits counter_set;
7653};
7654
Gal Pressman8ed1a632016-11-17 13:46:01 +02007655struct mlx5_ifc_mpcnt_reg_bits {
7656 u8 reserved_at_0[0x8];
7657 u8 pcie_index[0x8];
7658 u8 reserved_at_10[0xa];
7659 u8 grp[0x6];
7660
7661 u8 clr[0x1];
7662 u8 reserved_at_21[0x1f];
7663
7664 union mlx5_ifc_pcie_cntrs_grp_data_layout_auto_bits counter_set;
7665};
7666
Saeed Mahameede2816822015-05-28 22:28:40 +03007667struct mlx5_ifc_ppad_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007668 u8 reserved_at_0[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03007669 u8 single_mac[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007670 u8 reserved_at_4[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007671 u8 local_port[0x8];
7672 u8 mac_47_32[0x10];
7673
7674 u8 mac_31_0[0x20];
7675
Matan Barakb4ff3a32016-02-09 14:57:42 +02007676 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007677};
7678
7679struct mlx5_ifc_pmtu_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007680 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007681 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007682 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007683
7684 u8 max_mtu[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007685 u8 reserved_at_30[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007686
7687 u8 admin_mtu[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007688 u8 reserved_at_50[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007689
7690 u8 oper_mtu[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007691 u8 reserved_at_70[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007692};
7693
7694struct mlx5_ifc_pmpr_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007695 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007696 u8 module[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007697 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007698
Matan Barakb4ff3a32016-02-09 14:57:42 +02007699 u8 reserved_at_20[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007700 u8 attenuation_5g[0x8];
7701
Matan Barakb4ff3a32016-02-09 14:57:42 +02007702 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007703 u8 attenuation_7g[0x8];
7704
Matan Barakb4ff3a32016-02-09 14:57:42 +02007705 u8 reserved_at_60[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007706 u8 attenuation_12g[0x8];
7707};
7708
7709struct mlx5_ifc_pmpe_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007710 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007711 u8 module[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007712 u8 reserved_at_10[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03007713 u8 module_status[0x4];
7714
Matan Barakb4ff3a32016-02-09 14:57:42 +02007715 u8 reserved_at_20[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03007716};
7717
7718struct mlx5_ifc_pmpc_reg_bits {
7719 u8 module_state_updated[32][0x8];
7720};
7721
7722struct mlx5_ifc_pmlpn_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007723 u8 reserved_at_0[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007724 u8 mlpn_status[0x4];
7725 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007726 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007727
7728 u8 e[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007729 u8 reserved_at_21[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03007730};
7731
7732struct mlx5_ifc_pmlp_reg_bits {
7733 u8 rxtx[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007734 u8 reserved_at_1[0x7];
Saeed Mahameede2816822015-05-28 22:28:40 +03007735 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007736 u8 reserved_at_10[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007737 u8 width[0x8];
7738
7739 u8 lane0_module_mapping[0x20];
7740
7741 u8 lane1_module_mapping[0x20];
7742
7743 u8 lane2_module_mapping[0x20];
7744
7745 u8 lane3_module_mapping[0x20];
7746
Matan Barakb4ff3a32016-02-09 14:57:42 +02007747 u8 reserved_at_a0[0x160];
Saeed Mahameede2816822015-05-28 22:28:40 +03007748};
7749
7750struct mlx5_ifc_pmaos_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007751 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007752 u8 module[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007753 u8 reserved_at_10[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007754 u8 admin_status[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007755 u8 reserved_at_18[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007756 u8 oper_status[0x4];
7757
7758 u8 ase[0x1];
7759 u8 ee[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007760 u8 reserved_at_22[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007761 u8 e[0x2];
7762
Matan Barakb4ff3a32016-02-09 14:57:42 +02007763 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007764};
7765
7766struct mlx5_ifc_plpc_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007767 u8 reserved_at_0[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007768 u8 profile_id[0xc];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007769 u8 reserved_at_10[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007770 u8 proto_mask[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007771 u8 reserved_at_18[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007772
Matan Barakb4ff3a32016-02-09 14:57:42 +02007773 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007774 u8 lane_speed[0x10];
7775
Matan Barakb4ff3a32016-02-09 14:57:42 +02007776 u8 reserved_at_40[0x17];
Saeed Mahameede2816822015-05-28 22:28:40 +03007777 u8 lpbf[0x1];
7778 u8 fec_mode_policy[0x8];
7779
7780 u8 retransmission_capability[0x8];
7781 u8 fec_mode_capability[0x18];
7782
7783 u8 retransmission_support_admin[0x8];
7784 u8 fec_mode_support_admin[0x18];
7785
7786 u8 retransmission_request_admin[0x8];
7787 u8 fec_mode_request_admin[0x18];
7788
Matan Barakb4ff3a32016-02-09 14:57:42 +02007789 u8 reserved_at_c0[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03007790};
7791
7792struct mlx5_ifc_plib_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007793 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007794 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007795 u8 reserved_at_10[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007796 u8 ib_port[0x8];
7797
Matan Barakb4ff3a32016-02-09 14:57:42 +02007798 u8 reserved_at_20[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03007799};
7800
7801struct mlx5_ifc_plbf_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007802 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007803 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007804 u8 reserved_at_10[0xd];
Saeed Mahameede2816822015-05-28 22:28:40 +03007805 u8 lbf_mode[0x3];
7806
Matan Barakb4ff3a32016-02-09 14:57:42 +02007807 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007808};
7809
7810struct mlx5_ifc_pipg_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007811 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007812 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007813 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007814
7815 u8 dic[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007816 u8 reserved_at_21[0x19];
Saeed Mahameede2816822015-05-28 22:28:40 +03007817 u8 ipg[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007818 u8 reserved_at_3e[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03007819};
7820
7821struct mlx5_ifc_pifr_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007822 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007823 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007824 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007825
Matan Barakb4ff3a32016-02-09 14:57:42 +02007826 u8 reserved_at_20[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03007827
7828 u8 port_filter[8][0x20];
7829
7830 u8 port_filter_update_en[8][0x20];
7831};
7832
7833struct mlx5_ifc_pfcc_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007834 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007835 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007836 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007837
7838 u8 ppan[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007839 u8 reserved_at_24[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007840 u8 prio_mask_tx[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007841 u8 reserved_at_30[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007842 u8 prio_mask_rx[0x8];
7843
7844 u8 pptx[0x1];
7845 u8 aptx[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007846 u8 reserved_at_42[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03007847 u8 pfctx[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007848 u8 reserved_at_50[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007849
7850 u8 pprx[0x1];
7851 u8 aprx[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007852 u8 reserved_at_62[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03007853 u8 pfcrx[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007854 u8 reserved_at_70[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007855
Matan Barakb4ff3a32016-02-09 14:57:42 +02007856 u8 reserved_at_80[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03007857};
7858
7859struct mlx5_ifc_pelc_reg_bits {
7860 u8 op[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007861 u8 reserved_at_4[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007862 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007863 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007864
7865 u8 op_admin[0x8];
7866 u8 op_capability[0x8];
7867 u8 op_request[0x8];
7868 u8 op_active[0x8];
7869
7870 u8 admin[0x40];
7871
7872 u8 capability[0x40];
7873
7874 u8 request[0x40];
7875
7876 u8 active[0x40];
7877
Matan Barakb4ff3a32016-02-09 14:57:42 +02007878 u8 reserved_at_140[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03007879};
7880
7881struct mlx5_ifc_peir_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007882 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007883 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007884 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007885
Matan Barakb4ff3a32016-02-09 14:57:42 +02007886 u8 reserved_at_20[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03007887 u8 error_count[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007888 u8 reserved_at_30[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007889
Matan Barakb4ff3a32016-02-09 14:57:42 +02007890 u8 reserved_at_40[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03007891 u8 lane[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007892 u8 reserved_at_50[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007893 u8 error_type[0x8];
7894};
7895
Gal Pressmancfdcbcea2016-12-08 15:52:00 +02007896struct mlx5_ifc_pcam_enhanced_features_bits {
Inbar Karmy2fcb12d2017-08-17 16:39:47 +03007897 u8 reserved_at_0[0x76];
Gal Pressmancfdcbcea2016-12-08 15:52:00 +02007898
Inbar Karmy2fcb12d2017-08-17 16:39:47 +03007899 u8 pfcc_mask[0x1];
7900 u8 reserved_at_77[0x4];
Gal Pressman2dba0792017-06-18 14:56:45 +03007901 u8 rx_buffer_fullness_counters[0x1];
Eran Ben Elisha5b4793f2017-02-13 14:00:59 +02007902 u8 ptys_connector_type[0x1];
7903 u8 reserved_at_7d[0x1];
Gal Pressmancfdcbcea2016-12-08 15:52:00 +02007904 u8 ppcnt_discard_group[0x1];
7905 u8 ppcnt_statistical_group[0x1];
7906};
7907
7908struct mlx5_ifc_pcam_reg_bits {
7909 u8 reserved_at_0[0x8];
7910 u8 feature_group[0x8];
7911 u8 reserved_at_10[0x8];
7912 u8 access_reg_group[0x8];
7913
7914 u8 reserved_at_20[0x20];
7915
7916 union {
7917 u8 reserved_at_0[0x80];
7918 } port_access_reg_cap_mask;
7919
7920 u8 reserved_at_c0[0x80];
7921
7922 union {
7923 struct mlx5_ifc_pcam_enhanced_features_bits enhanced_features;
7924 u8 reserved_at_0[0x80];
7925 } feature_cap_mask;
7926
7927 u8 reserved_at_1c0[0xc0];
7928};
7929
7930struct mlx5_ifc_mcam_enhanced_features_bits {
Gal Pressman5405fa22017-06-15 18:29:23 +03007931 u8 reserved_at_0[0x7b];
7932 u8 pcie_outbound_stalled[0x1];
Eran Ben Elishaefae7f72017-05-12 02:47:02 +03007933 u8 tx_overflow_buffer_pkt[0x1];
Eugenia Emantayevfa367682017-05-25 16:09:34 +03007934 u8 mtpps_enh_out_per_adj[0x1];
7935 u8 mtpps_fs[0x1];
Gal Pressmancfdcbcea2016-12-08 15:52:00 +02007936 u8 pcie_performance_group[0x1];
7937};
7938
Or Gerlitz0ab87742017-06-11 15:25:38 +03007939struct mlx5_ifc_mcam_access_reg_bits {
7940 u8 reserved_at_0[0x1c];
7941 u8 mcda[0x1];
7942 u8 mcc[0x1];
7943 u8 mcqi[0x1];
7944 u8 reserved_at_1f[0x1];
7945
7946 u8 regs_95_to_64[0x20];
7947 u8 regs_63_to_32[0x20];
7948 u8 regs_31_to_0[0x20];
7949};
7950
Gal Pressmancfdcbcea2016-12-08 15:52:00 +02007951struct mlx5_ifc_mcam_reg_bits {
7952 u8 reserved_at_0[0x8];
7953 u8 feature_group[0x8];
7954 u8 reserved_at_10[0x8];
7955 u8 access_reg_group[0x8];
7956
7957 u8 reserved_at_20[0x20];
7958
7959 union {
Or Gerlitz0ab87742017-06-11 15:25:38 +03007960 struct mlx5_ifc_mcam_access_reg_bits access_regs;
Gal Pressmancfdcbcea2016-12-08 15:52:00 +02007961 u8 reserved_at_0[0x80];
7962 } mng_access_reg_cap_mask;
7963
7964 u8 reserved_at_c0[0x80];
7965
7966 union {
7967 struct mlx5_ifc_mcam_enhanced_features_bits enhanced_features;
7968 u8 reserved_at_0[0x80];
7969 } mng_feature_cap_mask;
7970
7971 u8 reserved_at_1c0[0x80];
7972};
7973
Huy Nguyenc02762e2017-07-18 16:03:17 -05007974struct mlx5_ifc_qcam_access_reg_cap_mask {
7975 u8 qcam_access_reg_cap_mask_127_to_20[0x6C];
7976 u8 qpdpm[0x1];
7977 u8 qcam_access_reg_cap_mask_18_to_4[0x0F];
7978 u8 qdpm[0x1];
7979 u8 qpts[0x1];
7980 u8 qcap[0x1];
7981 u8 qcam_access_reg_cap_mask_0[0x1];
7982};
7983
7984struct mlx5_ifc_qcam_qos_feature_cap_mask {
7985 u8 qcam_qos_feature_cap_mask_127_to_1[0x7F];
7986 u8 qpts_trust_both[0x1];
7987};
7988
7989struct mlx5_ifc_qcam_reg_bits {
7990 u8 reserved_at_0[0x8];
7991 u8 feature_group[0x8];
7992 u8 reserved_at_10[0x8];
7993 u8 access_reg_group[0x8];
7994 u8 reserved_at_20[0x20];
7995
7996 union {
7997 struct mlx5_ifc_qcam_access_reg_cap_mask reg_cap;
7998 u8 reserved_at_0[0x80];
7999 } qos_access_reg_cap_mask;
8000
8001 u8 reserved_at_c0[0x80];
8002
8003 union {
8004 struct mlx5_ifc_qcam_qos_feature_cap_mask feature_cap;
8005 u8 reserved_at_0[0x80];
8006 } qos_feature_cap_mask;
8007
8008 u8 reserved_at_1c0[0x80];
8009};
8010
Saeed Mahameede2816822015-05-28 22:28:40 +03008011struct mlx5_ifc_pcap_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02008012 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03008013 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008014 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03008015
8016 u8 port_capability_mask[4][0x20];
8017};
8018
8019struct mlx5_ifc_paos_reg_bits {
8020 u8 swid[0x8];
8021 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008022 u8 reserved_at_10[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03008023 u8 admin_status[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008024 u8 reserved_at_18[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03008025 u8 oper_status[0x4];
8026
8027 u8 ase[0x1];
8028 u8 ee[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008029 u8 reserved_at_22[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03008030 u8 e[0x2];
8031
Matan Barakb4ff3a32016-02-09 14:57:42 +02008032 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03008033};
8034
8035struct mlx5_ifc_pamp_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02008036 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03008037 u8 opamp_group[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008038 u8 reserved_at_10[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03008039 u8 opamp_group_type[0x4];
8040
8041 u8 start_index[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008042 u8 reserved_at_30[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03008043 u8 num_of_indices[0xc];
8044
8045 u8 index_data[18][0x10];
8046};
8047
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03008048struct mlx5_ifc_pcmr_reg_bits {
8049 u8 reserved_at_0[0x8];
8050 u8 local_port[0x8];
8051 u8 reserved_at_10[0x2e];
8052 u8 fcs_cap[0x1];
8053 u8 reserved_at_3f[0x1f];
8054 u8 fcs_chk[0x1];
8055 u8 reserved_at_5f[0x1];
8056};
8057
Saeed Mahameede2816822015-05-28 22:28:40 +03008058struct mlx5_ifc_lane_2_module_mapping_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02008059 u8 reserved_at_0[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03008060 u8 rx_lane[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008061 u8 reserved_at_8[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03008062 u8 tx_lane[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008063 u8 reserved_at_10[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03008064 u8 module[0x8];
8065};
8066
8067struct mlx5_ifc_bufferx_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02008068 u8 reserved_at_0[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03008069 u8 lossy[0x1];
8070 u8 epsb[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008071 u8 reserved_at_8[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03008072 u8 size[0xc];
8073
8074 u8 xoff_threshold[0x10];
8075 u8 xon_threshold[0x10];
8076};
8077
8078struct mlx5_ifc_set_node_in_bits {
8079 u8 node_description[64][0x8];
8080};
8081
8082struct mlx5_ifc_register_power_settings_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02008083 u8 reserved_at_0[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03008084 u8 power_settings_level[0x8];
8085
Matan Barakb4ff3a32016-02-09 14:57:42 +02008086 u8 reserved_at_20[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03008087};
8088
8089struct mlx5_ifc_register_host_endianness_bits {
8090 u8 he[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008091 u8 reserved_at_1[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03008092
Matan Barakb4ff3a32016-02-09 14:57:42 +02008093 u8 reserved_at_20[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03008094};
8095
8096struct mlx5_ifc_umr_pointer_desc_argument_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02008097 u8 reserved_at_0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03008098
8099 u8 mkey[0x20];
8100
8101 u8 addressh_63_32[0x20];
8102
8103 u8 addressl_31_0[0x20];
8104};
8105
8106struct mlx5_ifc_ud_adrs_vector_bits {
8107 u8 dc_key[0x40];
8108
8109 u8 ext[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008110 u8 reserved_at_41[0x7];
Saeed Mahameede2816822015-05-28 22:28:40 +03008111 u8 destination_qp_dct[0x18];
8112
8113 u8 static_rate[0x4];
8114 u8 sl_eth_prio[0x4];
8115 u8 fl[0x1];
8116 u8 mlid[0x7];
8117 u8 rlid_udp_sport[0x10];
8118
Matan Barakb4ff3a32016-02-09 14:57:42 +02008119 u8 reserved_at_80[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03008120
8121 u8 rmac_47_16[0x20];
8122
8123 u8 rmac_15_0[0x10];
8124 u8 tclass[0x8];
8125 u8 hop_limit[0x8];
8126
Matan Barakb4ff3a32016-02-09 14:57:42 +02008127 u8 reserved_at_e0[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03008128 u8 grh[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008129 u8 reserved_at_e2[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03008130 u8 src_addr_index[0x8];
8131 u8 flow_label[0x14];
8132
8133 u8 rgid_rip[16][0x8];
8134};
8135
8136struct mlx5_ifc_pages_req_event_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02008137 u8 reserved_at_0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03008138 u8 function_id[0x10];
8139
8140 u8 num_pages[0x20];
8141
Matan Barakb4ff3a32016-02-09 14:57:42 +02008142 u8 reserved_at_40[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03008143};
8144
8145struct mlx5_ifc_eqe_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02008146 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03008147 u8 event_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008148 u8 reserved_at_10[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03008149 u8 event_sub_type[0x8];
8150
Matan Barakb4ff3a32016-02-09 14:57:42 +02008151 u8 reserved_at_20[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03008152
8153 union mlx5_ifc_event_auto_bits event_data;
8154
Matan Barakb4ff3a32016-02-09 14:57:42 +02008155 u8 reserved_at_1e0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03008156 u8 signature[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008157 u8 reserved_at_1f8[0x7];
Saeed Mahameede2816822015-05-28 22:28:40 +03008158 u8 owner[0x1];
8159};
8160
8161enum {
8162 MLX5_CMD_QUEUE_ENTRY_TYPE_PCIE_CMD_IF_TRANSPORT = 0x7,
8163};
8164
8165struct mlx5_ifc_cmd_queue_entry_bits {
8166 u8 type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008167 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03008168
8169 u8 input_length[0x20];
8170
8171 u8 input_mailbox_pointer_63_32[0x20];
8172
8173 u8 input_mailbox_pointer_31_9[0x17];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008174 u8 reserved_at_77[0x9];
Saeed Mahameede2816822015-05-28 22:28:40 +03008175
8176 u8 command_input_inline_data[16][0x8];
8177
8178 u8 command_output_inline_data[16][0x8];
8179
8180 u8 output_mailbox_pointer_63_32[0x20];
8181
8182 u8 output_mailbox_pointer_31_9[0x17];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008183 u8 reserved_at_1b7[0x9];
Saeed Mahameede2816822015-05-28 22:28:40 +03008184
8185 u8 output_length[0x20];
8186
8187 u8 token[0x8];
8188 u8 signature[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008189 u8 reserved_at_1f0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03008190 u8 status[0x7];
8191 u8 ownership[0x1];
8192};
8193
8194struct mlx5_ifc_cmd_out_bits {
8195 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008196 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03008197
8198 u8 syndrome[0x20];
8199
8200 u8 command_output[0x20];
8201};
8202
8203struct mlx5_ifc_cmd_in_bits {
8204 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008205 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03008206
Matan Barakb4ff3a32016-02-09 14:57:42 +02008207 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03008208 u8 op_mod[0x10];
8209
8210 u8 command[0][0x20];
8211};
8212
8213struct mlx5_ifc_cmd_if_box_bits {
8214 u8 mailbox_data[512][0x8];
8215
Matan Barakb4ff3a32016-02-09 14:57:42 +02008216 u8 reserved_at_1000[0x180];
Saeed Mahameede2816822015-05-28 22:28:40 +03008217
8218 u8 next_pointer_63_32[0x20];
8219
8220 u8 next_pointer_31_10[0x16];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008221 u8 reserved_at_11b6[0xa];
Saeed Mahameede2816822015-05-28 22:28:40 +03008222
8223 u8 block_number[0x20];
8224
Matan Barakb4ff3a32016-02-09 14:57:42 +02008225 u8 reserved_at_11e0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03008226 u8 token[0x8];
8227 u8 ctrl_signature[0x8];
8228 u8 signature[0x8];
8229};
8230
8231struct mlx5_ifc_mtt_bits {
8232 u8 ptag_63_32[0x20];
8233
8234 u8 ptag_31_8[0x18];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008235 u8 reserved_at_38[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03008236 u8 wr_en[0x1];
8237 u8 rd_en[0x1];
8238};
8239
Tariq Toukan928cfe82016-02-22 18:17:29 +02008240struct mlx5_ifc_query_wol_rol_out_bits {
8241 u8 status[0x8];
8242 u8 reserved_at_8[0x18];
8243
8244 u8 syndrome[0x20];
8245
8246 u8 reserved_at_40[0x10];
8247 u8 rol_mode[0x8];
8248 u8 wol_mode[0x8];
8249
8250 u8 reserved_at_60[0x20];
8251};
8252
8253struct mlx5_ifc_query_wol_rol_in_bits {
8254 u8 opcode[0x10];
8255 u8 reserved_at_10[0x10];
8256
8257 u8 reserved_at_20[0x10];
8258 u8 op_mod[0x10];
8259
8260 u8 reserved_at_40[0x40];
8261};
8262
8263struct mlx5_ifc_set_wol_rol_out_bits {
8264 u8 status[0x8];
8265 u8 reserved_at_8[0x18];
8266
8267 u8 syndrome[0x20];
8268
8269 u8 reserved_at_40[0x40];
8270};
8271
8272struct mlx5_ifc_set_wol_rol_in_bits {
8273 u8 opcode[0x10];
8274 u8 reserved_at_10[0x10];
8275
8276 u8 reserved_at_20[0x10];
8277 u8 op_mod[0x10];
8278
8279 u8 rol_mode_valid[0x1];
8280 u8 wol_mode_valid[0x1];
8281 u8 reserved_at_42[0xe];
8282 u8 rol_mode[0x8];
8283 u8 wol_mode[0x8];
8284
8285 u8 reserved_at_60[0x20];
8286};
8287
Saeed Mahameede2816822015-05-28 22:28:40 +03008288enum {
8289 MLX5_INITIAL_SEG_NIC_INTERFACE_FULL_DRIVER = 0x0,
8290 MLX5_INITIAL_SEG_NIC_INTERFACE_DISABLED = 0x1,
8291 MLX5_INITIAL_SEG_NIC_INTERFACE_NO_DRAM_NIC = 0x2,
8292};
8293
8294enum {
8295 MLX5_INITIAL_SEG_NIC_INTERFACE_SUPPORTED_FULL_DRIVER = 0x0,
8296 MLX5_INITIAL_SEG_NIC_INTERFACE_SUPPORTED_DISABLED = 0x1,
8297 MLX5_INITIAL_SEG_NIC_INTERFACE_SUPPORTED_NO_DRAM_NIC = 0x2,
8298};
8299
8300enum {
8301 MLX5_INITIAL_SEG_HEALTH_SYNDROME_FW_INTERNAL_ERR = 0x1,
8302 MLX5_INITIAL_SEG_HEALTH_SYNDROME_DEAD_IRISC = 0x7,
8303 MLX5_INITIAL_SEG_HEALTH_SYNDROME_HW_FATAL_ERR = 0x8,
8304 MLX5_INITIAL_SEG_HEALTH_SYNDROME_FW_CRC_ERR = 0x9,
8305 MLX5_INITIAL_SEG_HEALTH_SYNDROME_ICM_FETCH_PCI_ERR = 0xa,
8306 MLX5_INITIAL_SEG_HEALTH_SYNDROME_ICM_PAGE_ERR = 0xb,
8307 MLX5_INITIAL_SEG_HEALTH_SYNDROME_ASYNCHRONOUS_EQ_BUF_OVERRUN = 0xc,
8308 MLX5_INITIAL_SEG_HEALTH_SYNDROME_EQ_IN_ERR = 0xd,
8309 MLX5_INITIAL_SEG_HEALTH_SYNDROME_EQ_INV = 0xe,
8310 MLX5_INITIAL_SEG_HEALTH_SYNDROME_FFSER_ERR = 0xf,
8311 MLX5_INITIAL_SEG_HEALTH_SYNDROME_HIGH_TEMP_ERR = 0x10,
8312};
8313
8314struct mlx5_ifc_initial_seg_bits {
8315 u8 fw_rev_minor[0x10];
8316 u8 fw_rev_major[0x10];
8317
8318 u8 cmd_interface_rev[0x10];
8319 u8 fw_rev_subminor[0x10];
8320
Matan Barakb4ff3a32016-02-09 14:57:42 +02008321 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03008322
8323 u8 cmdq_phy_addr_63_32[0x20];
8324
8325 u8 cmdq_phy_addr_31_12[0x14];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008326 u8 reserved_at_b4[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03008327 u8 nic_interface[0x2];
8328 u8 log_cmdq_size[0x4];
8329 u8 log_cmdq_stride[0x4];
8330
8331 u8 command_doorbell_vector[0x20];
8332
Matan Barakb4ff3a32016-02-09 14:57:42 +02008333 u8 reserved_at_e0[0xf00];
Saeed Mahameede2816822015-05-28 22:28:40 +03008334
8335 u8 initializing[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008336 u8 reserved_at_fe1[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03008337 u8 nic_interface_supported[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008338 u8 reserved_at_fe8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03008339
8340 struct mlx5_ifc_health_buffer_bits health_buffer;
8341
8342 u8 no_dram_nic_offset[0x20];
8343
Matan Barakb4ff3a32016-02-09 14:57:42 +02008344 u8 reserved_at_1220[0x6e40];
Saeed Mahameede2816822015-05-28 22:28:40 +03008345
Matan Barakb4ff3a32016-02-09 14:57:42 +02008346 u8 reserved_at_8060[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03008347 u8 clear_int[0x1];
8348
8349 u8 health_syndrome[0x8];
8350 u8 health_counter[0x18];
8351
Matan Barakb4ff3a32016-02-09 14:57:42 +02008352 u8 reserved_at_80a0[0x17fc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03008353};
8354
Eugenia Emantayevf9a1ef72016-10-10 16:05:53 +03008355struct mlx5_ifc_mtpps_reg_bits {
8356 u8 reserved_at_0[0xc];
8357 u8 cap_number_of_pps_pins[0x4];
8358 u8 reserved_at_10[0x4];
8359 u8 cap_max_num_of_pps_in_pins[0x4];
8360 u8 reserved_at_18[0x4];
8361 u8 cap_max_num_of_pps_out_pins[0x4];
8362
8363 u8 reserved_at_20[0x24];
8364 u8 cap_pin_3_mode[0x4];
8365 u8 reserved_at_48[0x4];
8366 u8 cap_pin_2_mode[0x4];
8367 u8 reserved_at_50[0x4];
8368 u8 cap_pin_1_mode[0x4];
8369 u8 reserved_at_58[0x4];
8370 u8 cap_pin_0_mode[0x4];
8371
8372 u8 reserved_at_60[0x4];
8373 u8 cap_pin_7_mode[0x4];
8374 u8 reserved_at_68[0x4];
8375 u8 cap_pin_6_mode[0x4];
8376 u8 reserved_at_70[0x4];
8377 u8 cap_pin_5_mode[0x4];
8378 u8 reserved_at_78[0x4];
8379 u8 cap_pin_4_mode[0x4];
8380
Eugenia Emantayevfa367682017-05-25 16:09:34 +03008381 u8 field_select[0x20];
8382 u8 reserved_at_a0[0x60];
Eugenia Emantayevf9a1ef72016-10-10 16:05:53 +03008383
8384 u8 enable[0x1];
8385 u8 reserved_at_101[0xb];
8386 u8 pattern[0x4];
8387 u8 reserved_at_110[0x4];
8388 u8 pin_mode[0x4];
8389 u8 pin[0x8];
8390
8391 u8 reserved_at_120[0x20];
8392
8393 u8 time_stamp[0x40];
8394
8395 u8 out_pulse_duration[0x10];
8396 u8 out_periodic_adjustment[0x10];
Eugenia Emantayevfa367682017-05-25 16:09:34 +03008397 u8 enhanced_out_periodic_adjustment[0x20];
Eugenia Emantayevf9a1ef72016-10-10 16:05:53 +03008398
Eugenia Emantayevfa367682017-05-25 16:09:34 +03008399 u8 reserved_at_1c0[0x20];
Eugenia Emantayevf9a1ef72016-10-10 16:05:53 +03008400};
8401
8402struct mlx5_ifc_mtppse_reg_bits {
8403 u8 reserved_at_0[0x18];
8404 u8 pin[0x8];
8405 u8 event_arm[0x1];
8406 u8 reserved_at_21[0x1b];
8407 u8 event_generation_mode[0x4];
8408 u8 reserved_at_40[0x40];
8409};
8410
Or Gerlitz47176282017-04-18 13:35:39 +03008411struct mlx5_ifc_mcqi_cap_bits {
8412 u8 supported_info_bitmask[0x20];
8413
8414 u8 component_size[0x20];
8415
8416 u8 max_component_size[0x20];
8417
8418 u8 log_mcda_word_size[0x4];
8419 u8 reserved_at_64[0xc];
8420 u8 mcda_max_write_size[0x10];
8421
8422 u8 rd_en[0x1];
8423 u8 reserved_at_81[0x1];
8424 u8 match_chip_id[0x1];
8425 u8 match_psid[0x1];
8426 u8 check_user_timestamp[0x1];
8427 u8 match_base_guid_mac[0x1];
8428 u8 reserved_at_86[0x1a];
8429};
8430
8431struct mlx5_ifc_mcqi_reg_bits {
8432 u8 read_pending_component[0x1];
8433 u8 reserved_at_1[0xf];
8434 u8 component_index[0x10];
8435
8436 u8 reserved_at_20[0x20];
8437
8438 u8 reserved_at_40[0x1b];
8439 u8 info_type[0x5];
8440
8441 u8 info_size[0x20];
8442
8443 u8 offset[0x20];
8444
8445 u8 reserved_at_a0[0x10];
8446 u8 data_size[0x10];
8447
8448 u8 data[0][0x20];
8449};
8450
8451struct mlx5_ifc_mcc_reg_bits {
8452 u8 reserved_at_0[0x4];
8453 u8 time_elapsed_since_last_cmd[0xc];
8454 u8 reserved_at_10[0x8];
8455 u8 instruction[0x8];
8456
8457 u8 reserved_at_20[0x10];
8458 u8 component_index[0x10];
8459
8460 u8 reserved_at_40[0x8];
8461 u8 update_handle[0x18];
8462
8463 u8 handle_owner_type[0x4];
8464 u8 handle_owner_host_id[0x4];
8465 u8 reserved_at_68[0x1];
8466 u8 control_progress[0x7];
8467 u8 error_code[0x8];
8468 u8 reserved_at_78[0x4];
8469 u8 control_state[0x4];
8470
8471 u8 component_size[0x20];
8472
8473 u8 reserved_at_a0[0x60];
8474};
8475
8476struct mlx5_ifc_mcda_reg_bits {
8477 u8 reserved_at_0[0x8];
8478 u8 update_handle[0x18];
8479
8480 u8 offset[0x20];
8481
8482 u8 reserved_at_40[0x10];
8483 u8 size[0x10];
8484
8485 u8 reserved_at_60[0x20];
8486
8487 u8 data[0][0x20];
8488};
8489
Saeed Mahameede2816822015-05-28 22:28:40 +03008490union mlx5_ifc_ports_control_registers_document_bits {
8491 struct mlx5_ifc_bufferx_reg_bits bufferx_reg;
8492 struct mlx5_ifc_eth_2819_cntrs_grp_data_layout_bits eth_2819_cntrs_grp_data_layout;
8493 struct mlx5_ifc_eth_2863_cntrs_grp_data_layout_bits eth_2863_cntrs_grp_data_layout;
8494 struct mlx5_ifc_eth_3635_cntrs_grp_data_layout_bits eth_3635_cntrs_grp_data_layout;
8495 struct mlx5_ifc_eth_802_3_cntrs_grp_data_layout_bits eth_802_3_cntrs_grp_data_layout;
8496 struct mlx5_ifc_eth_extended_cntrs_grp_data_layout_bits eth_extended_cntrs_grp_data_layout;
8497 struct mlx5_ifc_eth_per_prio_grp_data_layout_bits eth_per_prio_grp_data_layout;
8498 struct mlx5_ifc_eth_per_traffic_grp_data_layout_bits eth_per_traffic_grp_data_layout;
8499 struct mlx5_ifc_lane_2_module_mapping_bits lane_2_module_mapping;
8500 struct mlx5_ifc_pamp_reg_bits pamp_reg;
8501 struct mlx5_ifc_paos_reg_bits paos_reg;
8502 struct mlx5_ifc_pcap_reg_bits pcap_reg;
8503 struct mlx5_ifc_peir_reg_bits peir_reg;
8504 struct mlx5_ifc_pelc_reg_bits pelc_reg;
8505 struct mlx5_ifc_pfcc_reg_bits pfcc_reg;
Meny Yossefi1c64bf62016-02-18 18:15:00 +02008506 struct mlx5_ifc_ib_port_cntrs_grp_data_layout_bits ib_port_cntrs_grp_data_layout;
Saeed Mahameede2816822015-05-28 22:28:40 +03008507 struct mlx5_ifc_phys_layer_cntrs_bits phys_layer_cntrs;
8508 struct mlx5_ifc_pifr_reg_bits pifr_reg;
8509 struct mlx5_ifc_pipg_reg_bits pipg_reg;
8510 struct mlx5_ifc_plbf_reg_bits plbf_reg;
8511 struct mlx5_ifc_plib_reg_bits plib_reg;
8512 struct mlx5_ifc_plpc_reg_bits plpc_reg;
8513 struct mlx5_ifc_pmaos_reg_bits pmaos_reg;
8514 struct mlx5_ifc_pmlp_reg_bits pmlp_reg;
8515 struct mlx5_ifc_pmlpn_reg_bits pmlpn_reg;
8516 struct mlx5_ifc_pmpc_reg_bits pmpc_reg;
8517 struct mlx5_ifc_pmpe_reg_bits pmpe_reg;
8518 struct mlx5_ifc_pmpr_reg_bits pmpr_reg;
8519 struct mlx5_ifc_pmtu_reg_bits pmtu_reg;
8520 struct mlx5_ifc_ppad_reg_bits ppad_reg;
8521 struct mlx5_ifc_ppcnt_reg_bits ppcnt_reg;
Gal Pressman8ed1a632016-11-17 13:46:01 +02008522 struct mlx5_ifc_mpcnt_reg_bits mpcnt_reg;
Saeed Mahameede2816822015-05-28 22:28:40 +03008523 struct mlx5_ifc_pplm_reg_bits pplm_reg;
8524 struct mlx5_ifc_pplr_reg_bits pplr_reg;
8525 struct mlx5_ifc_ppsc_reg_bits ppsc_reg;
8526 struct mlx5_ifc_pqdr_reg_bits pqdr_reg;
8527 struct mlx5_ifc_pspa_reg_bits pspa_reg;
8528 struct mlx5_ifc_ptas_reg_bits ptas_reg;
8529 struct mlx5_ifc_ptys_reg_bits ptys_reg;
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03008530 struct mlx5_ifc_mlcr_reg_bits mlcr_reg;
Saeed Mahameede2816822015-05-28 22:28:40 +03008531 struct mlx5_ifc_pude_reg_bits pude_reg;
8532 struct mlx5_ifc_pvlc_reg_bits pvlc_reg;
8533 struct mlx5_ifc_slrg_reg_bits slrg_reg;
8534 struct mlx5_ifc_sltp_reg_bits sltp_reg;
Eugenia Emantayevf9a1ef72016-10-10 16:05:53 +03008535 struct mlx5_ifc_mtpps_reg_bits mtpps_reg;
8536 struct mlx5_ifc_mtppse_reg_bits mtppse_reg;
Ilan Tayaria9956d32017-04-18 13:10:41 +03008537 struct mlx5_ifc_fpga_access_reg_bits fpga_access_reg;
Ilan Tayarie29341f2017-03-13 20:05:45 +02008538 struct mlx5_ifc_fpga_ctrl_bits fpga_ctrl_bits;
8539 struct mlx5_ifc_fpga_cap_bits fpga_cap_bits;
Or Gerlitz47176282017-04-18 13:35:39 +03008540 struct mlx5_ifc_mcqi_reg_bits mcqi_reg;
8541 struct mlx5_ifc_mcc_reg_bits mcc_reg;
8542 struct mlx5_ifc_mcda_reg_bits mcda_reg;
Matan Barakb4ff3a32016-02-09 14:57:42 +02008543 u8 reserved_at_0[0x60e0];
Saeed Mahameede2816822015-05-28 22:28:40 +03008544};
8545
8546union mlx5_ifc_debug_enhancements_document_bits {
8547 struct mlx5_ifc_health_buffer_bits health_buffer;
Matan Barakb4ff3a32016-02-09 14:57:42 +02008548 u8 reserved_at_0[0x200];
Saeed Mahameede2816822015-05-28 22:28:40 +03008549};
8550
8551union mlx5_ifc_uplink_pci_interface_document_bits {
8552 struct mlx5_ifc_initial_seg_bits initial_seg;
Matan Barakb4ff3a32016-02-09 14:57:42 +02008553 u8 reserved_at_0[0x20060];
Eli Cohenb7755162014-10-02 12:19:44 +03008554};
8555
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008556struct mlx5_ifc_set_flow_table_root_out_bits {
8557 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008558 u8 reserved_at_8[0x18];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008559
8560 u8 syndrome[0x20];
8561
Matan Barakb4ff3a32016-02-09 14:57:42 +02008562 u8 reserved_at_40[0x40];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008563};
8564
8565struct mlx5_ifc_set_flow_table_root_in_bits {
8566 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008567 u8 reserved_at_10[0x10];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008568
Matan Barakb4ff3a32016-02-09 14:57:42 +02008569 u8 reserved_at_20[0x10];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008570 u8 op_mod[0x10];
8571
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03008572 u8 other_vport[0x1];
8573 u8 reserved_at_41[0xf];
8574 u8 vport_number[0x10];
8575
8576 u8 reserved_at_60[0x20];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008577
8578 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008579 u8 reserved_at_88[0x18];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008580
Matan Barakb4ff3a32016-02-09 14:57:42 +02008581 u8 reserved_at_a0[0x8];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008582 u8 table_id[0x18];
8583
Erez Shitrit500a3d02017-04-13 06:36:51 +03008584 u8 reserved_at_c0[0x8];
8585 u8 underlay_qpn[0x18];
8586 u8 reserved_at_e0[0x120];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008587};
8588
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008589enum {
Aviv Heller84df61e2016-05-10 13:47:50 +03008590 MLX5_MODIFY_FLOW_TABLE_MISS_TABLE_ID = (1UL << 0),
8591 MLX5_MODIFY_FLOW_TABLE_LAG_NEXT_TABLE_ID = (1UL << 15),
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008592};
8593
8594struct mlx5_ifc_modify_flow_table_out_bits {
8595 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008596 u8 reserved_at_8[0x18];
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008597
8598 u8 syndrome[0x20];
8599
Matan Barakb4ff3a32016-02-09 14:57:42 +02008600 u8 reserved_at_40[0x40];
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008601};
8602
8603struct mlx5_ifc_modify_flow_table_in_bits {
8604 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008605 u8 reserved_at_10[0x10];
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008606
Matan Barakb4ff3a32016-02-09 14:57:42 +02008607 u8 reserved_at_20[0x10];
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008608 u8 op_mod[0x10];
8609
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03008610 u8 other_vport[0x1];
8611 u8 reserved_at_41[0xf];
8612 u8 vport_number[0x10];
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008613
Matan Barakb4ff3a32016-02-09 14:57:42 +02008614 u8 reserved_at_60[0x10];
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008615 u8 modify_field_select[0x10];
8616
8617 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008618 u8 reserved_at_88[0x18];
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008619
Matan Barakb4ff3a32016-02-09 14:57:42 +02008620 u8 reserved_at_a0[0x8];
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008621 u8 table_id[0x18];
8622
Maor Gottlieb0c90e9c2017-03-12 11:35:23 +02008623 struct mlx5_ifc_flow_table_context_bits flow_table_context;
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008624};
8625
Saeed Mahameed4f3961e2016-02-22 18:17:25 +02008626struct mlx5_ifc_ets_tcn_config_reg_bits {
8627 u8 g[0x1];
8628 u8 b[0x1];
8629 u8 r[0x1];
8630 u8 reserved_at_3[0x9];
8631 u8 group[0x4];
8632 u8 reserved_at_10[0x9];
8633 u8 bw_allocation[0x7];
8634
8635 u8 reserved_at_20[0xc];
8636 u8 max_bw_units[0x4];
8637 u8 reserved_at_30[0x8];
8638 u8 max_bw_value[0x8];
8639};
8640
8641struct mlx5_ifc_ets_global_config_reg_bits {
8642 u8 reserved_at_0[0x2];
8643 u8 r[0x1];
8644 u8 reserved_at_3[0x1d];
8645
8646 u8 reserved_at_20[0xc];
8647 u8 max_bw_units[0x4];
8648 u8 reserved_at_30[0x8];
8649 u8 max_bw_value[0x8];
8650};
8651
8652struct mlx5_ifc_qetc_reg_bits {
8653 u8 reserved_at_0[0x8];
8654 u8 port_number[0x8];
8655 u8 reserved_at_10[0x30];
8656
8657 struct mlx5_ifc_ets_tcn_config_reg_bits tc_configuration[0x8];
8658 struct mlx5_ifc_ets_global_config_reg_bits global_configuration;
8659};
8660
Huy Nguyen415a64a2017-07-18 16:08:46 -05008661struct mlx5_ifc_qpdpm_dscp_reg_bits {
8662 u8 e[0x1];
8663 u8 reserved_at_01[0x0b];
8664 u8 prio[0x04];
8665};
8666
8667struct mlx5_ifc_qpdpm_reg_bits {
8668 u8 reserved_at_0[0x8];
8669 u8 local_port[0x8];
8670 u8 reserved_at_10[0x10];
8671 struct mlx5_ifc_qpdpm_dscp_reg_bits dscp[64];
8672};
8673
8674struct mlx5_ifc_qpts_reg_bits {
8675 u8 reserved_at_0[0x8];
8676 u8 local_port[0x8];
8677 u8 reserved_at_10[0x2d];
8678 u8 trust_state[0x3];
8679};
8680
Saeed Mahameed4f3961e2016-02-22 18:17:25 +02008681struct mlx5_ifc_qtct_reg_bits {
8682 u8 reserved_at_0[0x8];
8683 u8 port_number[0x8];
8684 u8 reserved_at_10[0xd];
8685 u8 prio[0x3];
8686
8687 u8 reserved_at_20[0x1d];
8688 u8 tclass[0x3];
8689};
8690
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03008691struct mlx5_ifc_mcia_reg_bits {
8692 u8 l[0x1];
8693 u8 reserved_at_1[0x7];
8694 u8 module[0x8];
8695 u8 reserved_at_10[0x8];
8696 u8 status[0x8];
8697
8698 u8 i2c_device_address[0x8];
8699 u8 page_number[0x8];
8700 u8 device_address[0x10];
8701
8702 u8 reserved_at_40[0x10];
8703 u8 size[0x10];
8704
8705 u8 reserved_at_60[0x20];
8706
8707 u8 dword_0[0x20];
8708 u8 dword_1[0x20];
8709 u8 dword_2[0x20];
8710 u8 dword_3[0x20];
8711 u8 dword_4[0x20];
8712 u8 dword_5[0x20];
8713 u8 dword_6[0x20];
8714 u8 dword_7[0x20];
8715 u8 dword_8[0x20];
8716 u8 dword_9[0x20];
8717 u8 dword_10[0x20];
8718 u8 dword_11[0x20];
8719};
8720
Saeed Mahameed74862162016-06-09 15:11:34 +03008721struct mlx5_ifc_dcbx_param_bits {
8722 u8 dcbx_cee_cap[0x1];
8723 u8 dcbx_ieee_cap[0x1];
8724 u8 dcbx_standby_cap[0x1];
8725 u8 reserved_at_0[0x5];
8726 u8 port_number[0x8];
8727 u8 reserved_at_10[0xa];
8728 u8 max_application_table_size[6];
8729 u8 reserved_at_20[0x15];
8730 u8 version_oper[0x3];
8731 u8 reserved_at_38[5];
8732 u8 version_admin[0x3];
8733 u8 willing_admin[0x1];
8734 u8 reserved_at_41[0x3];
8735 u8 pfc_cap_oper[0x4];
8736 u8 reserved_at_48[0x4];
8737 u8 pfc_cap_admin[0x4];
8738 u8 reserved_at_50[0x4];
8739 u8 num_of_tc_oper[0x4];
8740 u8 reserved_at_58[0x4];
8741 u8 num_of_tc_admin[0x4];
8742 u8 remote_willing[0x1];
8743 u8 reserved_at_61[3];
8744 u8 remote_pfc_cap[4];
8745 u8 reserved_at_68[0x14];
8746 u8 remote_num_of_tc[0x4];
8747 u8 reserved_at_80[0x18];
8748 u8 error[0x8];
8749 u8 reserved_at_a0[0x160];
8750};
Aviv Heller84df61e2016-05-10 13:47:50 +03008751
8752struct mlx5_ifc_lagc_bits {
8753 u8 reserved_at_0[0x1d];
8754 u8 lag_state[0x3];
8755
8756 u8 reserved_at_20[0x14];
8757 u8 tx_remap_affinity_2[0x4];
8758 u8 reserved_at_38[0x4];
8759 u8 tx_remap_affinity_1[0x4];
8760};
8761
8762struct mlx5_ifc_create_lag_out_bits {
8763 u8 status[0x8];
8764 u8 reserved_at_8[0x18];
8765
8766 u8 syndrome[0x20];
8767
8768 u8 reserved_at_40[0x40];
8769};
8770
8771struct mlx5_ifc_create_lag_in_bits {
8772 u8 opcode[0x10];
8773 u8 reserved_at_10[0x10];
8774
8775 u8 reserved_at_20[0x10];
8776 u8 op_mod[0x10];
8777
8778 struct mlx5_ifc_lagc_bits ctx;
8779};
8780
8781struct mlx5_ifc_modify_lag_out_bits {
8782 u8 status[0x8];
8783 u8 reserved_at_8[0x18];
8784
8785 u8 syndrome[0x20];
8786
8787 u8 reserved_at_40[0x40];
8788};
8789
8790struct mlx5_ifc_modify_lag_in_bits {
8791 u8 opcode[0x10];
8792 u8 reserved_at_10[0x10];
8793
8794 u8 reserved_at_20[0x10];
8795 u8 op_mod[0x10];
8796
8797 u8 reserved_at_40[0x20];
8798 u8 field_select[0x20];
8799
8800 struct mlx5_ifc_lagc_bits ctx;
8801};
8802
8803struct mlx5_ifc_query_lag_out_bits {
8804 u8 status[0x8];
8805 u8 reserved_at_8[0x18];
8806
8807 u8 syndrome[0x20];
8808
8809 u8 reserved_at_40[0x40];
8810
8811 struct mlx5_ifc_lagc_bits ctx;
8812};
8813
8814struct mlx5_ifc_query_lag_in_bits {
8815 u8 opcode[0x10];
8816 u8 reserved_at_10[0x10];
8817
8818 u8 reserved_at_20[0x10];
8819 u8 op_mod[0x10];
8820
8821 u8 reserved_at_40[0x40];
8822};
8823
8824struct mlx5_ifc_destroy_lag_out_bits {
8825 u8 status[0x8];
8826 u8 reserved_at_8[0x18];
8827
8828 u8 syndrome[0x20];
8829
8830 u8 reserved_at_40[0x40];
8831};
8832
8833struct mlx5_ifc_destroy_lag_in_bits {
8834 u8 opcode[0x10];
8835 u8 reserved_at_10[0x10];
8836
8837 u8 reserved_at_20[0x10];
8838 u8 op_mod[0x10];
8839
8840 u8 reserved_at_40[0x40];
8841};
8842
8843struct mlx5_ifc_create_vport_lag_out_bits {
8844 u8 status[0x8];
8845 u8 reserved_at_8[0x18];
8846
8847 u8 syndrome[0x20];
8848
8849 u8 reserved_at_40[0x40];
8850};
8851
8852struct mlx5_ifc_create_vport_lag_in_bits {
8853 u8 opcode[0x10];
8854 u8 reserved_at_10[0x10];
8855
8856 u8 reserved_at_20[0x10];
8857 u8 op_mod[0x10];
8858
8859 u8 reserved_at_40[0x40];
8860};
8861
8862struct mlx5_ifc_destroy_vport_lag_out_bits {
8863 u8 status[0x8];
8864 u8 reserved_at_8[0x18];
8865
8866 u8 syndrome[0x20];
8867
8868 u8 reserved_at_40[0x40];
8869};
8870
8871struct mlx5_ifc_destroy_vport_lag_in_bits {
8872 u8 opcode[0x10];
8873 u8 reserved_at_10[0x10];
8874
8875 u8 reserved_at_20[0x10];
8876 u8 op_mod[0x10];
8877
8878 u8 reserved_at_40[0x40];
8879};
8880
Eli Cohend29b7962014-10-02 12:19:43 +03008881#endif /* MLX5_IFC_H */