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Eli Cohend29b7962014-10-02 12:19:43 +03001/*
Saeed Mahameede2816822015-05-28 22:28:40 +03002 * Copyright (c) 2013-2015, Mellanox Technologies, Ltd. All rights reserved.
Eli Cohend29b7962014-10-02 12:19:43 +03003 *
4 * This software is available to you under a choice of one of two
5 * licenses. You may choose to be licensed under the terms of the GNU
6 * General Public License (GPL) Version 2, available from the file
7 * COPYING in the main directory of this source tree, or the
8 * OpenIB.org BSD license below:
9 *
10 * Redistribution and use in source and binary forms, with or
11 * without modification, are permitted provided that the following
12 * conditions are met:
13 *
14 * - Redistributions of source code must retain the above
15 * copyright notice, this list of conditions and the following
16 * disclaimer.
17 *
18 * - Redistributions in binary form must reproduce the above
19 * copyright notice, this list of conditions and the following
20 * disclaimer in the documentation and/or other materials
21 * provided with the distribution.
22 *
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
30 * SOFTWARE.
Saeed Mahameede2816822015-05-28 22:28:40 +030031*/
Eli Cohend29b7962014-10-02 12:19:43 +030032#ifndef MLX5_IFC_H
33#define MLX5_IFC_H
34
Ilan Tayarie29341f2017-03-13 20:05:45 +020035#include "mlx5_ifc_fpga.h"
36
Eli Cohend29b7962014-10-02 12:19:43 +030037enum {
Saeed Mahameede2816822015-05-28 22:28:40 +030038 MLX5_EVENT_TYPE_CODING_COMPLETION_EVENTS = 0x0,
39 MLX5_EVENT_TYPE_CODING_PATH_MIGRATED_SUCCEEDED = 0x1,
40 MLX5_EVENT_TYPE_CODING_COMMUNICATION_ESTABLISHED = 0x2,
41 MLX5_EVENT_TYPE_CODING_SEND_QUEUE_DRAINED = 0x3,
42 MLX5_EVENT_TYPE_CODING_LAST_WQE_REACHED = 0x13,
43 MLX5_EVENT_TYPE_CODING_SRQ_LIMIT = 0x14,
44 MLX5_EVENT_TYPE_CODING_DCT_ALL_CONNECTIONS_CLOSED = 0x1c,
45 MLX5_EVENT_TYPE_CODING_DCT_ACCESS_KEY_VIOLATION = 0x1d,
46 MLX5_EVENT_TYPE_CODING_CQ_ERROR = 0x4,
47 MLX5_EVENT_TYPE_CODING_LOCAL_WQ_CATASTROPHIC_ERROR = 0x5,
48 MLX5_EVENT_TYPE_CODING_PATH_MIGRATION_FAILED = 0x7,
49 MLX5_EVENT_TYPE_CODING_PAGE_FAULT_EVENT = 0xc,
50 MLX5_EVENT_TYPE_CODING_INVALID_REQUEST_LOCAL_WQ_ERROR = 0x10,
51 MLX5_EVENT_TYPE_CODING_LOCAL_ACCESS_VIOLATION_WQ_ERROR = 0x11,
52 MLX5_EVENT_TYPE_CODING_LOCAL_SRQ_CATASTROPHIC_ERROR = 0x12,
53 MLX5_EVENT_TYPE_CODING_INTERNAL_ERROR = 0x8,
54 MLX5_EVENT_TYPE_CODING_PORT_STATE_CHANGE = 0x9,
55 MLX5_EVENT_TYPE_CODING_GPIO_EVENT = 0x15,
56 MLX5_EVENT_TYPE_CODING_REMOTE_CONFIGURATION_PROTOCOL_EVENT = 0x19,
57 MLX5_EVENT_TYPE_CODING_DOORBELL_BLUEFLAME_CONGESTION_EVENT = 0x1a,
58 MLX5_EVENT_TYPE_CODING_STALL_VL_EVENT = 0x1b,
59 MLX5_EVENT_TYPE_CODING_DROPPED_PACKET_LOGGED_EVENT = 0x1f,
60 MLX5_EVENT_TYPE_CODING_COMMAND_INTERFACE_COMPLETION = 0xa,
Ilan Tayarie29341f2017-03-13 20:05:45 +020061 MLX5_EVENT_TYPE_CODING_PAGE_REQUEST = 0xb,
62 MLX5_EVENT_TYPE_CODING_FPGA_ERROR = 0x20,
Saeed Mahameede2816822015-05-28 22:28:40 +030063};
64
65enum {
66 MLX5_MODIFY_TIR_BITMASK_LRO = 0x0,
67 MLX5_MODIFY_TIR_BITMASK_INDIRECT_TABLE = 0x1,
68 MLX5_MODIFY_TIR_BITMASK_HASH = 0x2,
69 MLX5_MODIFY_TIR_BITMASK_TUNNELED_OFFLOAD_EN = 0x3
70};
71
72enum {
Eran Ben Elishaf91e6d82015-12-14 16:34:09 +020073 MLX5_SET_HCA_CAP_OP_MOD_GENERAL_DEVICE = 0x0,
74 MLX5_SET_HCA_CAP_OP_MOD_ATOMIC = 0x3,
75};
76
77enum {
Eli Cohend29b7962014-10-02 12:19:43 +030078 MLX5_CMD_OP_QUERY_HCA_CAP = 0x100,
79 MLX5_CMD_OP_QUERY_ADAPTER = 0x101,
80 MLX5_CMD_OP_INIT_HCA = 0x102,
81 MLX5_CMD_OP_TEARDOWN_HCA = 0x103,
82 MLX5_CMD_OP_ENABLE_HCA = 0x104,
83 MLX5_CMD_OP_DISABLE_HCA = 0x105,
84 MLX5_CMD_OP_QUERY_PAGES = 0x107,
85 MLX5_CMD_OP_MANAGE_PAGES = 0x108,
86 MLX5_CMD_OP_SET_HCA_CAP = 0x109,
Saeed Mahameede2816822015-05-28 22:28:40 +030087 MLX5_CMD_OP_QUERY_ISSI = 0x10a,
88 MLX5_CMD_OP_SET_ISSI = 0x10b,
Saeed Mahameed0dbc6fe2016-11-17 13:45:59 +020089 MLX5_CMD_OP_SET_DRIVER_VERSION = 0x10d,
Eli Cohend29b7962014-10-02 12:19:43 +030090 MLX5_CMD_OP_CREATE_MKEY = 0x200,
91 MLX5_CMD_OP_QUERY_MKEY = 0x201,
92 MLX5_CMD_OP_DESTROY_MKEY = 0x202,
93 MLX5_CMD_OP_QUERY_SPECIAL_CONTEXTS = 0x203,
94 MLX5_CMD_OP_PAGE_FAULT_RESUME = 0x204,
95 MLX5_CMD_OP_CREATE_EQ = 0x301,
96 MLX5_CMD_OP_DESTROY_EQ = 0x302,
97 MLX5_CMD_OP_QUERY_EQ = 0x303,
98 MLX5_CMD_OP_GEN_EQE = 0x304,
99 MLX5_CMD_OP_CREATE_CQ = 0x400,
100 MLX5_CMD_OP_DESTROY_CQ = 0x401,
101 MLX5_CMD_OP_QUERY_CQ = 0x402,
102 MLX5_CMD_OP_MODIFY_CQ = 0x403,
103 MLX5_CMD_OP_CREATE_QP = 0x500,
104 MLX5_CMD_OP_DESTROY_QP = 0x501,
105 MLX5_CMD_OP_RST2INIT_QP = 0x502,
106 MLX5_CMD_OP_INIT2RTR_QP = 0x503,
107 MLX5_CMD_OP_RTR2RTS_QP = 0x504,
108 MLX5_CMD_OP_RTS2RTS_QP = 0x505,
109 MLX5_CMD_OP_SQERR2RTS_QP = 0x506,
110 MLX5_CMD_OP_2ERR_QP = 0x507,
111 MLX5_CMD_OP_2RST_QP = 0x50a,
112 MLX5_CMD_OP_QUERY_QP = 0x50b,
Saeed Mahameede2816822015-05-28 22:28:40 +0300113 MLX5_CMD_OP_SQD_RTS_QP = 0x50c,
Eli Cohend29b7962014-10-02 12:19:43 +0300114 MLX5_CMD_OP_INIT2INIT_QP = 0x50e,
115 MLX5_CMD_OP_CREATE_PSV = 0x600,
116 MLX5_CMD_OP_DESTROY_PSV = 0x601,
117 MLX5_CMD_OP_CREATE_SRQ = 0x700,
118 MLX5_CMD_OP_DESTROY_SRQ = 0x701,
119 MLX5_CMD_OP_QUERY_SRQ = 0x702,
120 MLX5_CMD_OP_ARM_RQ = 0x703,
Saeed Mahameede2816822015-05-28 22:28:40 +0300121 MLX5_CMD_OP_CREATE_XRC_SRQ = 0x705,
122 MLX5_CMD_OP_DESTROY_XRC_SRQ = 0x706,
123 MLX5_CMD_OP_QUERY_XRC_SRQ = 0x707,
124 MLX5_CMD_OP_ARM_XRC_SRQ = 0x708,
Eli Cohend29b7962014-10-02 12:19:43 +0300125 MLX5_CMD_OP_CREATE_DCT = 0x710,
126 MLX5_CMD_OP_DESTROY_DCT = 0x711,
127 MLX5_CMD_OP_DRAIN_DCT = 0x712,
128 MLX5_CMD_OP_QUERY_DCT = 0x713,
129 MLX5_CMD_OP_ARM_DCT_FOR_KEY_VIOLATION = 0x714,
Saeed Mahameed74862162016-06-09 15:11:34 +0300130 MLX5_CMD_OP_CREATE_XRQ = 0x717,
131 MLX5_CMD_OP_DESTROY_XRQ = 0x718,
132 MLX5_CMD_OP_QUERY_XRQ = 0x719,
133 MLX5_CMD_OP_ARM_XRQ = 0x71a,
Eli Cohend29b7962014-10-02 12:19:43 +0300134 MLX5_CMD_OP_QUERY_VPORT_STATE = 0x750,
135 MLX5_CMD_OP_MODIFY_VPORT_STATE = 0x751,
136 MLX5_CMD_OP_QUERY_ESW_VPORT_CONTEXT = 0x752,
137 MLX5_CMD_OP_MODIFY_ESW_VPORT_CONTEXT = 0x753,
138 MLX5_CMD_OP_QUERY_NIC_VPORT_CONTEXT = 0x754,
139 MLX5_CMD_OP_MODIFY_NIC_VPORT_CONTEXT = 0x755,
Saeed Mahameede2816822015-05-28 22:28:40 +0300140 MLX5_CMD_OP_QUERY_ROCE_ADDRESS = 0x760,
Eli Cohend29b7962014-10-02 12:19:43 +0300141 MLX5_CMD_OP_SET_ROCE_ADDRESS = 0x761,
Saeed Mahameede2816822015-05-28 22:28:40 +0300142 MLX5_CMD_OP_QUERY_HCA_VPORT_CONTEXT = 0x762,
143 MLX5_CMD_OP_MODIFY_HCA_VPORT_CONTEXT = 0x763,
144 MLX5_CMD_OP_QUERY_HCA_VPORT_GID = 0x764,
145 MLX5_CMD_OP_QUERY_HCA_VPORT_PKEY = 0x765,
Eli Cohend29b7962014-10-02 12:19:43 +0300146 MLX5_CMD_OP_QUERY_VPORT_COUNTER = 0x770,
147 MLX5_CMD_OP_ALLOC_Q_COUNTER = 0x771,
148 MLX5_CMD_OP_DEALLOC_Q_COUNTER = 0x772,
149 MLX5_CMD_OP_QUERY_Q_COUNTER = 0x773,
Eran Ben Elisha37e92a92017-11-13 10:11:27 +0200150 MLX5_CMD_OP_SET_PP_RATE_LIMIT = 0x780,
Saeed Mahameed74862162016-06-09 15:11:34 +0300151 MLX5_CMD_OP_QUERY_RATE_LIMIT = 0x781,
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +0300152 MLX5_CMD_OP_CREATE_SCHEDULING_ELEMENT = 0x782,
153 MLX5_CMD_OP_DESTROY_SCHEDULING_ELEMENT = 0x783,
154 MLX5_CMD_OP_QUERY_SCHEDULING_ELEMENT = 0x784,
155 MLX5_CMD_OP_MODIFY_SCHEDULING_ELEMENT = 0x785,
156 MLX5_CMD_OP_CREATE_QOS_PARA_VPORT = 0x786,
157 MLX5_CMD_OP_DESTROY_QOS_PARA_VPORT = 0x787,
Eli Cohend29b7962014-10-02 12:19:43 +0300158 MLX5_CMD_OP_ALLOC_PD = 0x800,
159 MLX5_CMD_OP_DEALLOC_PD = 0x801,
160 MLX5_CMD_OP_ALLOC_UAR = 0x802,
161 MLX5_CMD_OP_DEALLOC_UAR = 0x803,
162 MLX5_CMD_OP_CONFIG_INT_MODERATION = 0x804,
163 MLX5_CMD_OP_ACCESS_REG = 0x805,
164 MLX5_CMD_OP_ATTACH_TO_MCG = 0x806,
Saeed Mahameed20bb5662016-07-17 02:01:45 +0300165 MLX5_CMD_OP_DETACH_FROM_MCG = 0x807,
Eli Cohend29b7962014-10-02 12:19:43 +0300166 MLX5_CMD_OP_GET_DROPPED_PACKET_LOG = 0x80a,
167 MLX5_CMD_OP_MAD_IFC = 0x50d,
168 MLX5_CMD_OP_QUERY_MAD_DEMUX = 0x80b,
169 MLX5_CMD_OP_SET_MAD_DEMUX = 0x80c,
170 MLX5_CMD_OP_NOP = 0x80d,
171 MLX5_CMD_OP_ALLOC_XRCD = 0x80e,
172 MLX5_CMD_OP_DEALLOC_XRCD = 0x80f,
Saeed Mahameede2816822015-05-28 22:28:40 +0300173 MLX5_CMD_OP_ALLOC_TRANSPORT_DOMAIN = 0x816,
174 MLX5_CMD_OP_DEALLOC_TRANSPORT_DOMAIN = 0x817,
175 MLX5_CMD_OP_QUERY_CONG_STATUS = 0x822,
176 MLX5_CMD_OP_MODIFY_CONG_STATUS = 0x823,
177 MLX5_CMD_OP_QUERY_CONG_PARAMS = 0x824,
178 MLX5_CMD_OP_MODIFY_CONG_PARAMS = 0x825,
179 MLX5_CMD_OP_QUERY_CONG_STATISTICS = 0x826,
180 MLX5_CMD_OP_ADD_VXLAN_UDP_DPORT = 0x827,
181 MLX5_CMD_OP_DELETE_VXLAN_UDP_DPORT = 0x828,
182 MLX5_CMD_OP_SET_L2_TABLE_ENTRY = 0x829,
183 MLX5_CMD_OP_QUERY_L2_TABLE_ENTRY = 0x82a,
184 MLX5_CMD_OP_DELETE_L2_TABLE_ENTRY = 0x82b,
Tariq Toukan928cfe82016-02-22 18:17:29 +0200185 MLX5_CMD_OP_SET_WOL_ROL = 0x830,
186 MLX5_CMD_OP_QUERY_WOL_ROL = 0x831,
Aviv Heller84df61e2016-05-10 13:47:50 +0300187 MLX5_CMD_OP_CREATE_LAG = 0x840,
188 MLX5_CMD_OP_MODIFY_LAG = 0x841,
189 MLX5_CMD_OP_QUERY_LAG = 0x842,
190 MLX5_CMD_OP_DESTROY_LAG = 0x843,
191 MLX5_CMD_OP_CREATE_VPORT_LAG = 0x844,
192 MLX5_CMD_OP_DESTROY_VPORT_LAG = 0x845,
Eli Cohend29b7962014-10-02 12:19:43 +0300193 MLX5_CMD_OP_CREATE_TIR = 0x900,
194 MLX5_CMD_OP_MODIFY_TIR = 0x901,
195 MLX5_CMD_OP_DESTROY_TIR = 0x902,
196 MLX5_CMD_OP_QUERY_TIR = 0x903,
Eli Cohend29b7962014-10-02 12:19:43 +0300197 MLX5_CMD_OP_CREATE_SQ = 0x904,
198 MLX5_CMD_OP_MODIFY_SQ = 0x905,
199 MLX5_CMD_OP_DESTROY_SQ = 0x906,
200 MLX5_CMD_OP_QUERY_SQ = 0x907,
201 MLX5_CMD_OP_CREATE_RQ = 0x908,
202 MLX5_CMD_OP_MODIFY_RQ = 0x909,
Maor Gottliebc1e0bfc2017-05-30 10:29:11 +0300203 MLX5_CMD_OP_SET_DELAY_DROP_PARAMS = 0x910,
Eli Cohend29b7962014-10-02 12:19:43 +0300204 MLX5_CMD_OP_DESTROY_RQ = 0x90a,
205 MLX5_CMD_OP_QUERY_RQ = 0x90b,
206 MLX5_CMD_OP_CREATE_RMP = 0x90c,
207 MLX5_CMD_OP_MODIFY_RMP = 0x90d,
208 MLX5_CMD_OP_DESTROY_RMP = 0x90e,
209 MLX5_CMD_OP_QUERY_RMP = 0x90f,
Saeed Mahameede2816822015-05-28 22:28:40 +0300210 MLX5_CMD_OP_CREATE_TIS = 0x912,
211 MLX5_CMD_OP_MODIFY_TIS = 0x913,
212 MLX5_CMD_OP_DESTROY_TIS = 0x914,
213 MLX5_CMD_OP_QUERY_TIS = 0x915,
214 MLX5_CMD_OP_CREATE_RQT = 0x916,
215 MLX5_CMD_OP_MODIFY_RQT = 0x917,
216 MLX5_CMD_OP_DESTROY_RQT = 0x918,
217 MLX5_CMD_OP_QUERY_RQT = 0x919,
Maor Gottlieb2cc43b42016-01-11 10:25:59 +0200218 MLX5_CMD_OP_SET_FLOW_TABLE_ROOT = 0x92f,
Saeed Mahameede2816822015-05-28 22:28:40 +0300219 MLX5_CMD_OP_CREATE_FLOW_TABLE = 0x930,
220 MLX5_CMD_OP_DESTROY_FLOW_TABLE = 0x931,
221 MLX5_CMD_OP_QUERY_FLOW_TABLE = 0x932,
222 MLX5_CMD_OP_CREATE_FLOW_GROUP = 0x933,
223 MLX5_CMD_OP_DESTROY_FLOW_GROUP = 0x934,
224 MLX5_CMD_OP_QUERY_FLOW_GROUP = 0x935,
225 MLX5_CMD_OP_SET_FLOW_TABLE_ENTRY = 0x936,
226 MLX5_CMD_OP_QUERY_FLOW_TABLE_ENTRY = 0x937,
Maor Gottlieb34a40e62016-01-11 10:26:00 +0200227 MLX5_CMD_OP_DELETE_FLOW_TABLE_ENTRY = 0x938,
Amir Vadai9dc0b282016-05-13 12:55:39 +0000228 MLX5_CMD_OP_ALLOC_FLOW_COUNTER = 0x939,
229 MLX5_CMD_OP_DEALLOC_FLOW_COUNTER = 0x93a,
230 MLX5_CMD_OP_QUERY_FLOW_COUNTER = 0x93b,
Shahar Klein86d56a12016-06-10 00:07:30 +0300231 MLX5_CMD_OP_MODIFY_FLOW_TABLE = 0x93c,
Hadar Hen Zion7adbde22016-08-03 15:08:33 +0300232 MLX5_CMD_OP_ALLOC_ENCAP_HEADER = 0x93d,
233 MLX5_CMD_OP_DEALLOC_ENCAP_HEADER = 0x93e,
Or Gerlitz2a69cb92017-01-19 19:31:25 +0200234 MLX5_CMD_OP_ALLOC_MODIFY_HEADER_CONTEXT = 0x940,
235 MLX5_CMD_OP_DEALLOC_MODIFY_HEADER_CONTEXT = 0x941,
Ilan Tayari60621182017-03-27 14:52:09 +0300236 MLX5_CMD_OP_FPGA_CREATE_QP = 0x960,
237 MLX5_CMD_OP_FPGA_MODIFY_QP = 0x961,
238 MLX5_CMD_OP_FPGA_QUERY_QP = 0x962,
239 MLX5_CMD_OP_FPGA_DESTROY_QP = 0x963,
240 MLX5_CMD_OP_FPGA_QUERY_QP_COUNTERS = 0x964,
Shahar Klein86d56a12016-06-10 00:07:30 +0300241 MLX5_CMD_OP_MAX
Saeed Mahameede2816822015-05-28 22:28:40 +0300242};
243
244struct mlx5_ifc_flow_table_fields_supported_bits {
245 u8 outer_dmac[0x1];
246 u8 outer_smac[0x1];
247 u8 outer_ether_type[0x1];
Ariel Levkovich19cc7522017-04-03 13:11:03 +0300248 u8 outer_ip_version[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300249 u8 outer_first_prio[0x1];
250 u8 outer_first_cfi[0x1];
251 u8 outer_first_vid[0x1];
Or Gerlitza8ade552017-06-07 17:49:56 +0300252 u8 outer_ipv4_ttl[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300253 u8 outer_second_prio[0x1];
254 u8 outer_second_cfi[0x1];
255 u8 outer_second_vid[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200256 u8 reserved_at_b[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300257 u8 outer_sip[0x1];
258 u8 outer_dip[0x1];
259 u8 outer_frag[0x1];
260 u8 outer_ip_protocol[0x1];
261 u8 outer_ip_ecn[0x1];
262 u8 outer_ip_dscp[0x1];
263 u8 outer_udp_sport[0x1];
264 u8 outer_udp_dport[0x1];
265 u8 outer_tcp_sport[0x1];
266 u8 outer_tcp_dport[0x1];
267 u8 outer_tcp_flags[0x1];
268 u8 outer_gre_protocol[0x1];
269 u8 outer_gre_key[0x1];
270 u8 outer_vxlan_vni[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200271 u8 reserved_at_1a[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +0300272 u8 source_eswitch_port[0x1];
273
274 u8 inner_dmac[0x1];
275 u8 inner_smac[0x1];
276 u8 inner_ether_type[0x1];
Ariel Levkovich19cc7522017-04-03 13:11:03 +0300277 u8 inner_ip_version[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300278 u8 inner_first_prio[0x1];
279 u8 inner_first_cfi[0x1];
280 u8 inner_first_vid[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200281 u8 reserved_at_27[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300282 u8 inner_second_prio[0x1];
283 u8 inner_second_cfi[0x1];
284 u8 inner_second_vid[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200285 u8 reserved_at_2b[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300286 u8 inner_sip[0x1];
287 u8 inner_dip[0x1];
288 u8 inner_frag[0x1];
289 u8 inner_ip_protocol[0x1];
290 u8 inner_ip_ecn[0x1];
291 u8 inner_ip_dscp[0x1];
292 u8 inner_udp_sport[0x1];
293 u8 inner_udp_dport[0x1];
294 u8 inner_tcp_sport[0x1];
295 u8 inner_tcp_dport[0x1];
296 u8 inner_tcp_flags[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200297 u8 reserved_at_37[0x9];
Boris Pismenny3346c482017-08-20 15:13:08 +0300298 u8 reserved_at_40[0x17];
299 u8 outer_esp_spi[0x1];
300 u8 reserved_at_58[0x2];
Yishai Hadasa550ddf2017-08-17 15:52:33 +0300301 u8 bth_dst_qp[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300302
Yishai Hadasa550ddf2017-08-17 15:52:33 +0300303 u8 reserved_at_5b[0x25];
Saeed Mahameede2816822015-05-28 22:28:40 +0300304};
305
306struct mlx5_ifc_flow_table_prop_layout_bits {
307 u8 ft_support[0x1];
Amir Vadai9dc0b282016-05-13 12:55:39 +0000308 u8 reserved_at_1[0x1];
309 u8 flow_counter[0x1];
Maor Gottlieb26a81452015-12-10 17:12:39 +0200310 u8 flow_modify_en[0x1];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +0200311 u8 modify_root[0x1];
Maor Gottlieb34a40e62016-01-11 10:26:00 +0200312 u8 identified_miss_table_mode[0x1];
313 u8 flow_table_modify[0x1];
Hadar Hen Zion7adbde22016-08-03 15:08:33 +0300314 u8 encap[0x1];
315 u8 decap[0x1];
316 u8 reserved_at_9[0x17];
Saeed Mahameede2816822015-05-28 22:28:40 +0300317
Matan Barakb4ff3a32016-02-09 14:57:42 +0200318 u8 reserved_at_20[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +0300319 u8 log_max_ft_size[0x6];
Or Gerlitz2a69cb92017-01-19 19:31:25 +0200320 u8 log_max_modify_header_context[0x8];
321 u8 max_modify_header_actions[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +0300322 u8 max_ft_level[0x8];
323
Matan Barakb4ff3a32016-02-09 14:57:42 +0200324 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +0300325
Matan Barakb4ff3a32016-02-09 14:57:42 +0200326 u8 reserved_at_60[0x18];
Maor Gottlieb26a81452015-12-10 17:12:39 +0200327 u8 log_max_ft_num[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +0300328
Matan Barakb4ff3a32016-02-09 14:57:42 +0200329 u8 reserved_at_80[0x18];
Maor Gottlieb26a81452015-12-10 17:12:39 +0200330 u8 log_max_destination[0x8];
331
Raed Salem16f1c5b2017-07-30 11:02:51 +0300332 u8 log_max_flow_counter[0x8];
333 u8 reserved_at_a8[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +0300334 u8 log_max_flow[0x8];
335
Matan Barakb4ff3a32016-02-09 14:57:42 +0200336 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +0300337
338 struct mlx5_ifc_flow_table_fields_supported_bits ft_field_support;
339
340 struct mlx5_ifc_flow_table_fields_supported_bits ft_field_bitmask_support;
341};
342
343struct mlx5_ifc_odp_per_transport_service_cap_bits {
344 u8 send[0x1];
345 u8 receive[0x1];
346 u8 write[0x1];
347 u8 read[0x1];
Artemy Kovalyov17d2f882017-01-02 11:37:47 +0200348 u8 atomic[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300349 u8 srq_receive[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200350 u8 reserved_at_6[0x1a];
Saeed Mahameede2816822015-05-28 22:28:40 +0300351};
352
Maor Gottliebb4d1f032016-01-11 10:26:05 +0200353struct mlx5_ifc_ipv4_layout_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +0200354 u8 reserved_at_0[0x60];
Maor Gottliebb4d1f032016-01-11 10:26:05 +0200355
356 u8 ipv4[0x20];
357};
358
359struct mlx5_ifc_ipv6_layout_bits {
360 u8 ipv6[16][0x8];
361};
362
363union mlx5_ifc_ipv6_layout_ipv4_layout_auto_bits {
364 struct mlx5_ifc_ipv6_layout_bits ipv6_layout;
365 struct mlx5_ifc_ipv4_layout_bits ipv4_layout;
Matan Barakb4ff3a32016-02-09 14:57:42 +0200366 u8 reserved_at_0[0x80];
Maor Gottliebb4d1f032016-01-11 10:26:05 +0200367};
368
Saeed Mahameede2816822015-05-28 22:28:40 +0300369struct mlx5_ifc_fte_match_set_lyr_2_4_bits {
370 u8 smac_47_16[0x20];
371
372 u8 smac_15_0[0x10];
373 u8 ethertype[0x10];
374
375 u8 dmac_47_16[0x20];
376
377 u8 dmac_15_0[0x10];
378 u8 first_prio[0x3];
379 u8 first_cfi[0x1];
380 u8 first_vid[0xc];
381
382 u8 ip_protocol[0x8];
383 u8 ip_dscp[0x6];
384 u8 ip_ecn[0x2];
Mohamad Haj Yahia10543362016-10-09 16:25:43 +0300385 u8 cvlan_tag[0x1];
386 u8 svlan_tag[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300387 u8 frag[0x1];
Ariel Levkovich19cc7522017-04-03 13:11:03 +0300388 u8 ip_version[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +0300389 u8 tcp_flags[0x9];
390
391 u8 tcp_sport[0x10];
392 u8 tcp_dport[0x10];
393
Or Gerlitza8ade552017-06-07 17:49:56 +0300394 u8 reserved_at_c0[0x18];
395 u8 ttl_hoplimit[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +0300396
397 u8 udp_sport[0x10];
398 u8 udp_dport[0x10];
399
Maor Gottliebb4d1f032016-01-11 10:26:05 +0200400 union mlx5_ifc_ipv6_layout_ipv4_layout_auto_bits src_ipv4_src_ipv6;
Saeed Mahameede2816822015-05-28 22:28:40 +0300401
Maor Gottliebb4d1f032016-01-11 10:26:05 +0200402 union mlx5_ifc_ipv6_layout_ipv4_layout_auto_bits dst_ipv4_dst_ipv6;
Saeed Mahameede2816822015-05-28 22:28:40 +0300403};
404
405struct mlx5_ifc_fte_match_set_misc_bits {
Saeed Mahameed74862162016-06-09 15:11:34 +0300406 u8 reserved_at_0[0x8];
407 u8 source_sqn[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +0300408
Matan Barakb4ff3a32016-02-09 14:57:42 +0200409 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +0300410 u8 source_port[0x10];
411
412 u8 outer_second_prio[0x3];
413 u8 outer_second_cfi[0x1];
414 u8 outer_second_vid[0xc];
415 u8 inner_second_prio[0x3];
416 u8 inner_second_cfi[0x1];
417 u8 inner_second_vid[0xc];
418
Mohamad Haj Yahia10543362016-10-09 16:25:43 +0300419 u8 outer_second_cvlan_tag[0x1];
420 u8 inner_second_cvlan_tag[0x1];
421 u8 outer_second_svlan_tag[0x1];
422 u8 inner_second_svlan_tag[0x1];
423 u8 reserved_at_64[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +0300424 u8 gre_protocol[0x10];
425
426 u8 gre_key_h[0x18];
427 u8 gre_key_l[0x8];
428
429 u8 vxlan_vni[0x18];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200430 u8 reserved_at_b8[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +0300431
Matan Barakb4ff3a32016-02-09 14:57:42 +0200432 u8 reserved_at_c0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +0300433
Matan Barakb4ff3a32016-02-09 14:57:42 +0200434 u8 reserved_at_e0[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +0300435 u8 outer_ipv6_flow_label[0x14];
436
Matan Barakb4ff3a32016-02-09 14:57:42 +0200437 u8 reserved_at_100[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +0300438 u8 inner_ipv6_flow_label[0x14];
439
Yishai Hadasa550ddf2017-08-17 15:52:33 +0300440 u8 reserved_at_120[0x28];
441 u8 bth_dst_qp[0x18];
Boris Pismenny3346c482017-08-20 15:13:08 +0300442 u8 reserved_at_160[0x20];
443 u8 outer_esp_spi[0x20];
444 u8 reserved_at_1a0[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +0300445};
446
447struct mlx5_ifc_cmd_pas_bits {
448 u8 pa_h[0x20];
449
450 u8 pa_l[0x14];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200451 u8 reserved_at_34[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +0300452};
453
454struct mlx5_ifc_uint64_bits {
455 u8 hi[0x20];
456
457 u8 lo[0x20];
458};
459
460enum {
461 MLX5_ADS_STAT_RATE_NO_LIMIT = 0x0,
462 MLX5_ADS_STAT_RATE_2_5GBPS = 0x7,
463 MLX5_ADS_STAT_RATE_10GBPS = 0x8,
464 MLX5_ADS_STAT_RATE_30GBPS = 0x9,
465 MLX5_ADS_STAT_RATE_5GBPS = 0xa,
466 MLX5_ADS_STAT_RATE_20GBPS = 0xb,
467 MLX5_ADS_STAT_RATE_40GBPS = 0xc,
468 MLX5_ADS_STAT_RATE_60GBPS = 0xd,
469 MLX5_ADS_STAT_RATE_80GBPS = 0xe,
470 MLX5_ADS_STAT_RATE_120GBPS = 0xf,
471};
472
473struct mlx5_ifc_ads_bits {
474 u8 fl[0x1];
475 u8 free_ar[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200476 u8 reserved_at_2[0xe];
Saeed Mahameede2816822015-05-28 22:28:40 +0300477 u8 pkey_index[0x10];
478
Matan Barakb4ff3a32016-02-09 14:57:42 +0200479 u8 reserved_at_20[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +0300480 u8 grh[0x1];
481 u8 mlid[0x7];
482 u8 rlid[0x10];
483
484 u8 ack_timeout[0x5];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200485 u8 reserved_at_45[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +0300486 u8 src_addr_index[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200487 u8 reserved_at_50[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +0300488 u8 stat_rate[0x4];
489 u8 hop_limit[0x8];
490
Matan Barakb4ff3a32016-02-09 14:57:42 +0200491 u8 reserved_at_60[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +0300492 u8 tclass[0x8];
493 u8 flow_label[0x14];
494
495 u8 rgid_rip[16][0x8];
496
Matan Barakb4ff3a32016-02-09 14:57:42 +0200497 u8 reserved_at_100[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +0300498 u8 f_dscp[0x1];
499 u8 f_ecn[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200500 u8 reserved_at_106[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300501 u8 f_eth_prio[0x1];
502 u8 ecn[0x2];
503 u8 dscp[0x6];
504 u8 udp_sport[0x10];
505
506 u8 dei_cfi[0x1];
507 u8 eth_prio[0x3];
508 u8 sl[0x4];
Daniel Jurgens32f69e42018-01-04 17:25:36 +0200509 u8 vhca_port_num[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +0300510 u8 rmac_47_32[0x10];
511
512 u8 rmac_31_0[0x20];
513};
514
515struct mlx5_ifc_flow_table_nic_cap_bits {
Maor Gottliebb3638e12016-03-07 18:51:46 +0200516 u8 nic_rx_multi_path_tirs[0x1];
Maor Gottliebcea824d2016-05-31 14:09:09 +0300517 u8 nic_rx_multi_path_tirs_fts[0x1];
518 u8 allow_sniffer_and_nic_rx_shared_tir[0x1];
519 u8 reserved_at_3[0x1fd];
Saeed Mahameede2816822015-05-28 22:28:40 +0300520
521 struct mlx5_ifc_flow_table_prop_layout_bits flow_table_properties_nic_receive;
522
Matan Barakb4ff3a32016-02-09 14:57:42 +0200523 u8 reserved_at_400[0x200];
Saeed Mahameede2816822015-05-28 22:28:40 +0300524
525 struct mlx5_ifc_flow_table_prop_layout_bits flow_table_properties_nic_receive_sniffer;
526
527 struct mlx5_ifc_flow_table_prop_layout_bits flow_table_properties_nic_transmit;
528
Matan Barakb4ff3a32016-02-09 14:57:42 +0200529 u8 reserved_at_a00[0x200];
Saeed Mahameede2816822015-05-28 22:28:40 +0300530
531 struct mlx5_ifc_flow_table_prop_layout_bits flow_table_properties_nic_transmit_sniffer;
532
Matan Barakb4ff3a32016-02-09 14:57:42 +0200533 u8 reserved_at_e00[0x7200];
Saeed Mahameede2816822015-05-28 22:28:40 +0300534};
535
Saeed Mahameed495716b2015-12-01 18:03:19 +0200536struct mlx5_ifc_flow_table_eswitch_cap_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +0200537 u8 reserved_at_0[0x200];
Saeed Mahameed495716b2015-12-01 18:03:19 +0200538
539 struct mlx5_ifc_flow_table_prop_layout_bits flow_table_properties_nic_esw_fdb;
540
541 struct mlx5_ifc_flow_table_prop_layout_bits flow_table_properties_esw_acl_ingress;
542
543 struct mlx5_ifc_flow_table_prop_layout_bits flow_table_properties_esw_acl_egress;
544
Matan Barakb4ff3a32016-02-09 14:57:42 +0200545 u8 reserved_at_800[0x7800];
Saeed Mahameed495716b2015-12-01 18:03:19 +0200546};
547
Saeed Mahameedd6666752015-12-01 18:03:22 +0200548struct mlx5_ifc_e_switch_cap_bits {
549 u8 vport_svlan_strip[0x1];
550 u8 vport_cvlan_strip[0x1];
551 u8 vport_svlan_insert[0x1];
552 u8 vport_cvlan_insert_if_not_exist[0x1];
553 u8 vport_cvlan_insert_overwrite[0x1];
Noa Osherovich23898c72016-06-10 00:07:37 +0300554 u8 reserved_at_5[0x19];
555 u8 nic_vport_node_guid_modify[0x1];
556 u8 nic_vport_port_guid_modify[0x1];
Saeed Mahameedd6666752015-12-01 18:03:22 +0200557
Hadar Hen Zion7adbde22016-08-03 15:08:33 +0300558 u8 vxlan_encap_decap[0x1];
559 u8 nvgre_encap_decap[0x1];
560 u8 reserved_at_22[0x9];
561 u8 log_max_encap_headers[0x5];
562 u8 reserved_2b[0x6];
563 u8 max_encap_header_size[0xa];
564
565 u8 reserved_40[0x7c0];
566
Saeed Mahameedd6666752015-12-01 18:03:22 +0200567};
568
Saeed Mahameed74862162016-06-09 15:11:34 +0300569struct mlx5_ifc_qos_cap_bits {
570 u8 packet_pacing[0x1];
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +0300571 u8 esw_scheduling[0x1];
Mohamad Haj Yahiac9497c92016-12-15 14:02:53 +0200572 u8 esw_bw_share[0x1];
573 u8 esw_rate_limit[0x1];
Bodong Wang05d3ac92018-03-19 15:10:29 +0200574 u8 reserved_at_4[0x1];
575 u8 packet_pacing_burst_bound[0x1];
576 u8 packet_pacing_typical_size[0x1];
577 u8 reserved_at_7[0x19];
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +0300578
579 u8 reserved_at_20[0x20];
580
Saeed Mahameed74862162016-06-09 15:11:34 +0300581 u8 packet_pacing_max_rate[0x20];
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +0300582
Saeed Mahameed74862162016-06-09 15:11:34 +0300583 u8 packet_pacing_min_rate[0x20];
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +0300584
585 u8 reserved_at_80[0x10];
Saeed Mahameed74862162016-06-09 15:11:34 +0300586 u8 packet_pacing_rate_table_size[0x10];
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +0300587
588 u8 esw_element_type[0x10];
589 u8 esw_tsar_type[0x10];
590
591 u8 reserved_at_c0[0x10];
592 u8 max_qos_para_vport[0x10];
593
594 u8 max_tsar_bw_share[0x20];
595
596 u8 reserved_at_100[0x700];
Saeed Mahameed74862162016-06-09 15:11:34 +0300597};
598
Saeed Mahameede2816822015-05-28 22:28:40 +0300599struct mlx5_ifc_per_protocol_networking_offload_caps_bits {
600 u8 csum_cap[0x1];
601 u8 vlan_cap[0x1];
602 u8 lro_cap[0x1];
603 u8 lro_psh_flag[0x1];
604 u8 lro_time_stamp[0x1];
Saeed Mahameed2b31f7a2016-11-28 18:04:50 +0200605 u8 reserved_at_5[0x2];
606 u8 wqe_vlan_insert[0x1];
Tariq Toukan66189962015-11-12 19:35:26 +0200607 u8 self_lb_en_modifiable[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200608 u8 reserved_at_9[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +0300609 u8 max_lso_cap[0x5];
Leon Romanovskyc226dc22016-10-31 12:15:20 +0200610 u8 multi_pkt_send_wqe[0x2];
Hadar Hen Zioncff92d72016-07-24 16:12:40 +0300611 u8 wqe_inline_mode[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +0300612 u8 rss_ind_tbl_cap[0x4];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +0300613 u8 reg_umr_sq[0x1];
614 u8 scatter_fcs[0x1];
Bodong Wang050da902017-08-17 15:52:35 +0300615 u8 enhanced_multi_pkt_send_wqe[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300616 u8 tunnel_lso_const_out_ip_id[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200617 u8 reserved_at_1c[0x2];
Gal Pressman27299842017-08-13 13:34:42 +0300618 u8 tunnel_stateless_gre[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300619 u8 tunnel_stateless_vxlan[0x1];
620
Ilan Tayari547eede2017-04-18 16:04:28 +0300621 u8 swp[0x1];
622 u8 swp_csum[0x1];
623 u8 swp_lso[0x1];
Maor Gottlieb4d350f12017-10-19 08:25:54 +0300624 u8 reserved_at_23[0x1b];
625 u8 max_geneve_opt_len[0x1];
626 u8 tunnel_stateless_geneve_rx[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300627
Matan Barakb4ff3a32016-02-09 14:57:42 +0200628 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +0300629 u8 lro_min_mss_size[0x10];
630
Matan Barakb4ff3a32016-02-09 14:57:42 +0200631 u8 reserved_at_60[0x120];
Saeed Mahameede2816822015-05-28 22:28:40 +0300632
633 u8 lro_timer_supported_periods[4][0x20];
634
Matan Barakb4ff3a32016-02-09 14:57:42 +0200635 u8 reserved_at_200[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +0300636};
637
638struct mlx5_ifc_roce_cap_bits {
639 u8 roce_apm[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200640 u8 reserved_at_1[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +0300641
Matan Barakb4ff3a32016-02-09 14:57:42 +0200642 u8 reserved_at_20[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +0300643
Matan Barakb4ff3a32016-02-09 14:57:42 +0200644 u8 reserved_at_80[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +0300645 u8 l3_type[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200646 u8 reserved_at_90[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +0300647 u8 roce_version[0x8];
648
Matan Barakb4ff3a32016-02-09 14:57:42 +0200649 u8 reserved_at_a0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +0300650 u8 r_roce_dest_udp_port[0x10];
651
652 u8 r_roce_max_src_udp_port[0x10];
653 u8 r_roce_min_src_udp_port[0x10];
654
Matan Barakb4ff3a32016-02-09 14:57:42 +0200655 u8 reserved_at_e0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +0300656 u8 roce_address_table_size[0x10];
657
Matan Barakb4ff3a32016-02-09 14:57:42 +0200658 u8 reserved_at_100[0x700];
Saeed Mahameede2816822015-05-28 22:28:40 +0300659};
660
661enum {
662 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_1_BYTE = 0x0,
663 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_2_BYTES = 0x2,
664 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_4_BYTES = 0x4,
665 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_8_BYTES = 0x8,
666 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_16_BYTES = 0x10,
667 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_32_BYTES = 0x20,
668 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_64_BYTES = 0x40,
669 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_128_BYTES = 0x80,
670 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_256_BYTES = 0x100,
671};
672
673enum {
674 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_1_BYTE = 0x1,
675 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_2_BYTES = 0x2,
676 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_4_BYTES = 0x4,
677 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_8_BYTES = 0x8,
678 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_16_BYTES = 0x10,
679 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_32_BYTES = 0x20,
680 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_64_BYTES = 0x40,
681 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_128_BYTES = 0x80,
682 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_256_BYTES = 0x100,
683};
684
685struct mlx5_ifc_atomic_caps_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +0200686 u8 reserved_at_0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +0300687
Or Gerlitzbd108382017-05-28 15:24:17 +0300688 u8 atomic_req_8B_endianness_mode[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200689 u8 reserved_at_42[0x4];
Or Gerlitzbd108382017-05-28 15:24:17 +0300690 u8 supported_atomic_req_8B_endianness_mode_1[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300691
Matan Barakb4ff3a32016-02-09 14:57:42 +0200692 u8 reserved_at_47[0x19];
Saeed Mahameede2816822015-05-28 22:28:40 +0300693
Matan Barakb4ff3a32016-02-09 14:57:42 +0200694 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +0300695
Matan Barakb4ff3a32016-02-09 14:57:42 +0200696 u8 reserved_at_80[0x10];
Eran Ben Elishaf91e6d82015-12-14 16:34:09 +0200697 u8 atomic_operations[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +0300698
Matan Barakb4ff3a32016-02-09 14:57:42 +0200699 u8 reserved_at_a0[0x10];
Eran Ben Elishaf91e6d82015-12-14 16:34:09 +0200700 u8 atomic_size_qp[0x10];
701
Matan Barakb4ff3a32016-02-09 14:57:42 +0200702 u8 reserved_at_c0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +0300703 u8 atomic_size_dc[0x10];
704
Matan Barakb4ff3a32016-02-09 14:57:42 +0200705 u8 reserved_at_e0[0x720];
Saeed Mahameede2816822015-05-28 22:28:40 +0300706};
707
708struct mlx5_ifc_odp_cap_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +0200709 u8 reserved_at_0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +0300710
711 u8 sig[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200712 u8 reserved_at_41[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +0300713
Matan Barakb4ff3a32016-02-09 14:57:42 +0200714 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +0300715
716 struct mlx5_ifc_odp_per_transport_service_cap_bits rc_odp_caps;
717
718 struct mlx5_ifc_odp_per_transport_service_cap_bits uc_odp_caps;
719
720 struct mlx5_ifc_odp_per_transport_service_cap_bits ud_odp_caps;
721
Matan Barakb4ff3a32016-02-09 14:57:42 +0200722 u8 reserved_at_e0[0x720];
Saeed Mahameede2816822015-05-28 22:28:40 +0300723};
724
Sagi Grimberg3f0393a2016-02-23 10:25:23 +0200725struct mlx5_ifc_calc_op {
726 u8 reserved_at_0[0x10];
727 u8 reserved_at_10[0x9];
728 u8 op_swap_endianness[0x1];
729 u8 op_min[0x1];
730 u8 op_xor[0x1];
731 u8 op_or[0x1];
732 u8 op_and[0x1];
733 u8 op_max[0x1];
734 u8 op_add[0x1];
735};
736
737struct mlx5_ifc_vector_calc_cap_bits {
738 u8 calc_matrix[0x1];
739 u8 reserved_at_1[0x1f];
740 u8 reserved_at_20[0x8];
741 u8 max_vec_count[0x8];
742 u8 reserved_at_30[0xd];
743 u8 max_chunk_size[0x3];
744 struct mlx5_ifc_calc_op calc0;
745 struct mlx5_ifc_calc_op calc1;
746 struct mlx5_ifc_calc_op calc2;
747 struct mlx5_ifc_calc_op calc3;
748
749 u8 reserved_at_e0[0x720];
750};
751
Saeed Mahameede2816822015-05-28 22:28:40 +0300752enum {
753 MLX5_WQ_TYPE_LINKED_LIST = 0x0,
754 MLX5_WQ_TYPE_CYCLIC = 0x1,
Saeed Mahameed7d5e1422016-04-11 23:10:22 +0300755 MLX5_WQ_TYPE_LINKED_LIST_STRIDING_RQ = 0x2,
Noa Osherovichccc87082017-10-17 18:01:13 +0300756 MLX5_WQ_TYPE_CYCLIC_STRIDING_RQ = 0x3,
Saeed Mahameede2816822015-05-28 22:28:40 +0300757};
758
759enum {
760 MLX5_WQ_END_PAD_MODE_NONE = 0x0,
761 MLX5_WQ_END_PAD_MODE_ALIGN = 0x1,
762};
763
764enum {
765 MLX5_CMD_HCA_CAP_GID_TABLE_SIZE_8_GID_ENTRIES = 0x0,
766 MLX5_CMD_HCA_CAP_GID_TABLE_SIZE_16_GID_ENTRIES = 0x1,
767 MLX5_CMD_HCA_CAP_GID_TABLE_SIZE_32_GID_ENTRIES = 0x2,
768 MLX5_CMD_HCA_CAP_GID_TABLE_SIZE_64_GID_ENTRIES = 0x3,
769 MLX5_CMD_HCA_CAP_GID_TABLE_SIZE_128_GID_ENTRIES = 0x4,
770};
771
772enum {
773 MLX5_CMD_HCA_CAP_PKEY_TABLE_SIZE_128_ENTRIES = 0x0,
774 MLX5_CMD_HCA_CAP_PKEY_TABLE_SIZE_256_ENTRIES = 0x1,
775 MLX5_CMD_HCA_CAP_PKEY_TABLE_SIZE_512_ENTRIES = 0x2,
776 MLX5_CMD_HCA_CAP_PKEY_TABLE_SIZE_1K_ENTRIES = 0x3,
777 MLX5_CMD_HCA_CAP_PKEY_TABLE_SIZE_2K_ENTRIES = 0x4,
778 MLX5_CMD_HCA_CAP_PKEY_TABLE_SIZE_4K_ENTRIES = 0x5,
779};
780
781enum {
782 MLX5_CMD_HCA_CAP_PORT_TYPE_IB = 0x0,
783 MLX5_CMD_HCA_CAP_PORT_TYPE_ETHERNET = 0x1,
784};
785
786enum {
787 MLX5_CMD_HCA_CAP_CMDIF_CHECKSUM_DISABLED = 0x0,
788 MLX5_CMD_HCA_CAP_CMDIF_CHECKSUM_INITIAL_STATE = 0x1,
789 MLX5_CMD_HCA_CAP_CMDIF_CHECKSUM_ENABLED = 0x3,
790};
791
792enum {
793 MLX5_CAP_PORT_TYPE_IB = 0x0,
794 MLX5_CAP_PORT_TYPE_ETH = 0x1,
Eli Cohend29b7962014-10-02 12:19:43 +0300795};
796
Max Gurtovoy1410a902017-05-28 10:53:10 +0300797enum {
798 MLX5_CAP_UMR_FENCE_STRONG = 0x0,
799 MLX5_CAP_UMR_FENCE_SMALL = 0x1,
800 MLX5_CAP_UMR_FENCE_NONE = 0x2,
801};
802
Eli Cohenb7755162014-10-02 12:19:44 +0300803struct mlx5_ifc_cmd_hca_cap_bits {
Daniel Jurgens32f69e42018-01-04 17:25:36 +0200804 u8 reserved_at_0[0x30];
805 u8 vhca_id[0x10];
806
807 u8 reserved_at_40[0x40];
Eli Cohenb7755162014-10-02 12:19:44 +0300808
809 u8 log_max_srq_sz[0x8];
810 u8 log_max_qp_sz[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200811 u8 reserved_at_90[0xb];
Eli Cohenb7755162014-10-02 12:19:44 +0300812 u8 log_max_qp[0x5];
813
Matan Barakb4ff3a32016-02-09 14:57:42 +0200814 u8 reserved_at_a0[0xb];
Saeed Mahameede2816822015-05-28 22:28:40 +0300815 u8 log_max_srq[0x5];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200816 u8 reserved_at_b0[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +0300817
Matan Barakb4ff3a32016-02-09 14:57:42 +0200818 u8 reserved_at_c0[0x8];
Eli Cohenb7755162014-10-02 12:19:44 +0300819 u8 log_max_cq_sz[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200820 u8 reserved_at_d0[0xb];
Eli Cohenb7755162014-10-02 12:19:44 +0300821 u8 log_max_cq[0x5];
822
823 u8 log_max_eq_sz[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200824 u8 reserved_at_e8[0x2];
Eli Cohenb7755162014-10-02 12:19:44 +0300825 u8 log_max_mkey[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200826 u8 reserved_at_f0[0xc];
Eli Cohenb7755162014-10-02 12:19:44 +0300827 u8 log_max_eq[0x4];
828
829 u8 max_indirection[0x8];
Artemy Kovalyovbcda1ac2017-01-02 11:37:41 +0200830 u8 fixed_buffer_size[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300831 u8 log_max_mrw_sz[0x7];
Majd Dibbiny8812c242017-02-09 14:20:12 +0200832 u8 force_teardown[0x1];
833 u8 reserved_at_111[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300834 u8 log_max_bsf_list_size[0x6];
Artemy Kovalyovbcda1ac2017-01-02 11:37:41 +0200835 u8 umr_extended_translation_offset[0x1];
836 u8 null_mkey[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300837 u8 log_max_klm_list_size[0x6];
838
Matan Barakb4ff3a32016-02-09 14:57:42 +0200839 u8 reserved_at_120[0xa];
Eli Cohenb7755162014-10-02 12:19:44 +0300840 u8 log_max_ra_req_dc[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200841 u8 reserved_at_130[0xa];
Eli Cohenb7755162014-10-02 12:19:44 +0300842 u8 log_max_ra_res_dc[0x6];
843
Matan Barakb4ff3a32016-02-09 14:57:42 +0200844 u8 reserved_at_140[0xa];
Eli Cohenb7755162014-10-02 12:19:44 +0300845 u8 log_max_ra_req_qp[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200846 u8 reserved_at_150[0xa];
Eli Cohenb7755162014-10-02 12:19:44 +0300847 u8 log_max_ra_res_qp[0x6];
848
Daniel Jurgensf32f5bd2015-11-19 17:12:26 +0200849 u8 end_pad[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300850 u8 cc_query_allowed[0x1];
851 u8 cc_modify_allowed[0x1];
Daniel Jurgensf32f5bd2015-11-19 17:12:26 +0200852 u8 start_pad[0x1];
853 u8 cache_line_128byte[0x1];
Huy Nguyenc02762e2017-07-18 16:03:17 -0500854 u8 reserved_at_165[0xa];
855 u8 qcam_reg[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300856 u8 gid_table_size[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +0300857
Saeed Mahameede2816822015-05-28 22:28:40 +0300858 u8 out_of_seq_cnt[0x1];
859 u8 vport_counters[0x1];
Saeed Mahameed74862162016-06-09 15:11:34 +0300860 u8 retransmission_q_counters[0x1];
Alex Vesker83b502a2016-08-04 17:32:02 +0300861 u8 reserved_at_183[0x1];
862 u8 modify_rq_counter_set_id[0x1];
Maor Gottliebc1e0bfc2017-05-30 10:29:11 +0300863 u8 rq_delay_drop[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300864 u8 max_qp_cnt[0xa];
865 u8 pkey_table_size[0x10];
866
Saeed Mahameede2816822015-05-28 22:28:40 +0300867 u8 vport_group_manager[0x1];
868 u8 vhca_group_manager[0x1];
869 u8 ib_virt[0x1];
870 u8 eth_virt[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200871 u8 reserved_at_1a4[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300872 u8 ets[0x1];
873 u8 nic_flow_table[0x1];
Saeed Mahameed54f0a412015-12-01 18:03:10 +0200874 u8 eswitch_flow_table[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300875 u8 early_vf_enable[0x1];
Gal Pressmancfdcbcea2016-12-08 15:52:00 +0200876 u8 mcam_reg[0x1];
877 u8 pcam_reg[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300878 u8 local_ca_ack_delay[0x5];
Huy Nguyen4ce3bf22016-11-17 13:45:56 +0200879 u8 port_module_event[0x1];
Parav Pandit58dcb602017-06-19 07:19:37 +0300880 u8 enhanced_error_q_counters[0x1];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +0300881 u8 ports_check[0x1];
Max Gurtovoy7b135582017-01-02 11:37:38 +0200882 u8 reserved_at_1b3[0x1];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +0300883 u8 disable_link_up[0x1];
884 u8 beacon_led[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300885 u8 port_type[0x2];
Eli Cohenb7755162014-10-02 12:19:44 +0300886 u8 num_ports[0x8];
887
Eugenia Emantayevf9a1ef72016-10-10 16:05:53 +0300888 u8 reserved_at_1c0[0x1];
889 u8 pps[0x1];
890 u8 pps_modify[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300891 u8 log_max_msg[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300892 u8 reserved_at_1c8[0x4];
Saeed Mahameed4f3961e2016-02-22 18:17:25 +0200893 u8 max_tc[0x4];
Saeed Mahameed74862162016-06-09 15:11:34 +0300894 u8 reserved_at_1d0[0x1];
895 u8 dcbx[0x1];
Maor Gottlieb246ac982017-05-30 10:29:12 +0300896 u8 general_notification_event[0x1];
897 u8 reserved_at_1d3[0x2];
Ilan Tayarie29341f2017-03-13 20:05:45 +0200898 u8 fpga[0x1];
Tariq Toukan928cfe82016-02-22 18:17:29 +0200899 u8 rol_s[0x1];
900 u8 rol_g[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300901 u8 reserved_at_1d8[0x1];
Tariq Toukan928cfe82016-02-22 18:17:29 +0200902 u8 wol_s[0x1];
903 u8 wol_g[0x1];
904 u8 wol_a[0x1];
905 u8 wol_b[0x1];
906 u8 wol_m[0x1];
907 u8 wol_u[0x1];
908 u8 wol_p[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300909
910 u8 stat_rate_support[0x10];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300911 u8 reserved_at_1f0[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +0300912 u8 cqe_version[0x4];
Eli Cohenb7755162014-10-02 12:19:44 +0300913
Saeed Mahameede2816822015-05-28 22:28:40 +0300914 u8 compact_address_vector[0x1];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +0300915 u8 striding_rq[0x1];
Erez Shitrit500a3d02017-04-13 06:36:51 +0300916 u8 reserved_at_202[0x1];
917 u8 ipoib_enhanced_offloads[0x1];
Erez Shitrit1015c2e2016-02-21 16:27:16 +0200918 u8 ipoib_basic_offloads[0x1];
Majd Dibbinyc8d75a92018-03-22 15:34:04 +0200919 u8 reserved_at_205[0x1];
920 u8 repeated_block_disabled[0x1];
921 u8 umr_modify_entity_size_disabled[0x1];
922 u8 umr_modify_atomic_disabled[0x1];
923 u8 umr_indirect_mkey_disabled[0x1];
Max Gurtovoy1410a902017-05-28 10:53:10 +0300924 u8 umr_fence[0x2];
925 u8 reserved_at_20c[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +0300926 u8 drain_sigerr[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300927 u8 cmdif_checksum[0x2];
928 u8 sigerr_cqe[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300929 u8 reserved_at_213[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300930 u8 wq_signature[0x1];
931 u8 sctr_data_cqe[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300932 u8 reserved_at_216[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300933 u8 sho[0x1];
934 u8 tph[0x1];
935 u8 rf[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300936 u8 dct[0x1];
Saeed Mahameed74862162016-06-09 15:11:34 +0300937 u8 qos[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300938 u8 eth_net_offloads[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300939 u8 roce[0x1];
940 u8 atomic[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300941 u8 reserved_at_21f[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300942
943 u8 cq_oi[0x1];
944 u8 cq_resize[0x1];
945 u8 cq_moderation[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300946 u8 reserved_at_223[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +0300947 u8 cq_eq_remap[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300948 u8 pg[0x1];
949 u8 block_lb_mc[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300950 u8 reserved_at_229[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300951 u8 scqe_break_moderation[0x1];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +0300952 u8 cq_period_start_from_cqe[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300953 u8 cd[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300954 u8 reserved_at_22d[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300955 u8 apm[0x1];
Sagi Grimberg3f0393a2016-02-23 10:25:23 +0200956 u8 vector_calc[0x1];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +0300957 u8 umr_ptr_rlky[0x1];
Matan Barakd2370e02016-02-29 18:05:30 +0200958 u8 imaicl[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300959 u8 reserved_at_232[0x4];
Eli Cohenb7755162014-10-02 12:19:44 +0300960 u8 qkv[0x1];
961 u8 pkv[0x1];
Haggai Eranb11a4f92016-02-29 15:45:03 +0200962 u8 set_deth_sqpn[0x1];
963 u8 reserved_at_239[0x3];
Eli Cohenb7755162014-10-02 12:19:44 +0300964 u8 xrc[0x1];
965 u8 ud[0x1];
966 u8 uc[0x1];
967 u8 rc[0x1];
968
Eli Cohena6d51b62017-01-03 23:55:23 +0200969 u8 uar_4k[0x1];
970 u8 reserved_at_241[0x9];
Eli Cohenb7755162014-10-02 12:19:44 +0300971 u8 uar_sz[0x6];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300972 u8 reserved_at_250[0x8];
Eli Cohenb7755162014-10-02 12:19:44 +0300973 u8 log_pg_sz[0x8];
974
975 u8 bf[0x1];
Saeed Mahameed0dbc6fe2016-11-17 13:45:59 +0200976 u8 driver_version[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300977 u8 pad_tx_eth_packet[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300978 u8 reserved_at_263[0x8];
Eli Cohenb7755162014-10-02 12:19:44 +0300979 u8 log_bf_reg_size[0x5];
Aviv Heller84df61e2016-05-10 13:47:50 +0300980
981 u8 reserved_at_270[0xb];
982 u8 lag_master[0x1];
983 u8 num_lag_ports[0x4];
Eli Cohenb7755162014-10-02 12:19:44 +0300984
Tariq Toukane1c9c622016-04-11 23:10:21 +0300985 u8 reserved_at_280[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +0300986 u8 max_wqe_sz_sq[0x10];
987
Tariq Toukane1c9c622016-04-11 23:10:21 +0300988 u8 reserved_at_2a0[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +0300989 u8 max_wqe_sz_rq[0x10];
990
Rabie Louloua8ffcc72017-07-09 13:39:30 +0300991 u8 max_flow_counter_31_16[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +0300992 u8 max_wqe_sz_sq_dc[0x10];
993
Tariq Toukane1c9c622016-04-11 23:10:21 +0300994 u8 reserved_at_2e0[0x7];
Eli Cohenb7755162014-10-02 12:19:44 +0300995 u8 max_qp_mcg[0x19];
996
Tariq Toukane1c9c622016-04-11 23:10:21 +0300997 u8 reserved_at_300[0x18];
Eli Cohenb7755162014-10-02 12:19:44 +0300998 u8 log_max_mcg[0x8];
999
Tariq Toukane1c9c622016-04-11 23:10:21 +03001000 u8 reserved_at_320[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001001 u8 log_max_transport_domain[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001002 u8 reserved_at_328[0x3];
Eli Cohenb7755162014-10-02 12:19:44 +03001003 u8 log_max_pd[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001004 u8 reserved_at_330[0xb];
Eli Cohenb7755162014-10-02 12:19:44 +03001005 u8 log_max_xrcd[0x5];
1006
Amir Vadaia351a1b02016-07-14 10:32:38 +03001007 u8 reserved_at_340[0x8];
1008 u8 log_max_flow_counter_bulk[0x8];
Rabie Louloua8ffcc72017-07-09 13:39:30 +03001009 u8 max_flow_counter_15_0[0x10];
Amir Vadaia351a1b02016-07-14 10:32:38 +03001010
Eli Cohenb7755162014-10-02 12:19:44 +03001011
Tariq Toukane1c9c622016-04-11 23:10:21 +03001012 u8 reserved_at_360[0x3];
Eli Cohenb7755162014-10-02 12:19:44 +03001013 u8 log_max_rq[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001014 u8 reserved_at_368[0x3];
Eli Cohenb7755162014-10-02 12:19:44 +03001015 u8 log_max_sq[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001016 u8 reserved_at_370[0x3];
Eli Cohenb7755162014-10-02 12:19:44 +03001017 u8 log_max_tir[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001018 u8 reserved_at_378[0x3];
Eli Cohenb7755162014-10-02 12:19:44 +03001019 u8 log_max_tis[0x5];
1020
Saeed Mahameede2816822015-05-28 22:28:40 +03001021 u8 basic_cyclic_rcv_wqe[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001022 u8 reserved_at_381[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03001023 u8 log_max_rmp[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001024 u8 reserved_at_388[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001025 u8 log_max_rqt[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001026 u8 reserved_at_390[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001027 u8 log_max_rqt_size[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001028 u8 reserved_at_398[0x3];
Eli Cohenb7755162014-10-02 12:19:44 +03001029 u8 log_max_tis_per_sq[0x5];
1030
Tariq Toukane1c9c622016-04-11 23:10:21 +03001031 u8 reserved_at_3a0[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001032 u8 log_max_stride_sz_rq[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001033 u8 reserved_at_3a8[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001034 u8 log_min_stride_sz_rq[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001035 u8 reserved_at_3b0[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001036 u8 log_max_stride_sz_sq[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001037 u8 reserved_at_3b8[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001038 u8 log_min_stride_sz_sq[0x5];
Eli Cohenb7755162014-10-02 12:19:44 +03001039
Or Gerlitz40817cd2017-06-25 12:38:45 +03001040 u8 hairpin[0x1];
1041 u8 reserved_at_3c1[0x2];
1042 u8 log_max_hairpin_queues[0x5];
1043 u8 reserved_at_3c8[0x3];
1044 u8 log_max_hairpin_wq_data_sz[0x5];
Or Gerlitz4d533e02018-01-04 12:26:21 +02001045 u8 reserved_at_3d0[0x3];
1046 u8 log_max_hairpin_num_packets[0x5];
1047 u8 reserved_at_3d8[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001048 u8 log_max_wq_sz[0x5];
1049
Saeed Mahameed54f0a412015-12-01 18:03:10 +02001050 u8 nic_vport_change_event[0x1];
Eran Ben Elisha8978cc92018-01-09 11:41:10 +02001051 u8 disable_local_lb_uc[0x1];
1052 u8 disable_local_lb_mc[0x1];
Or Gerlitz40817cd2017-06-25 12:38:45 +03001053 u8 log_min_hairpin_wq_data_sz[0x5];
1054 u8 reserved_at_3e8[0x3];
Saeed Mahameed54f0a412015-12-01 18:03:10 +02001055 u8 log_max_vlan_list[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001056 u8 reserved_at_3f0[0x3];
Saeed Mahameed54f0a412015-12-01 18:03:10 +02001057 u8 log_max_current_mc_list[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001058 u8 reserved_at_3f8[0x3];
Saeed Mahameed54f0a412015-12-01 18:03:10 +02001059 u8 log_max_current_uc_list[0x5];
1060
Tariq Toukane1c9c622016-04-11 23:10:21 +03001061 u8 reserved_at_400[0x80];
Saeed Mahameed54f0a412015-12-01 18:03:10 +02001062
Tariq Toukane1c9c622016-04-11 23:10:21 +03001063 u8 reserved_at_480[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001064 u8 log_max_l2_table[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001065 u8 reserved_at_488[0x8];
Eli Cohenb7755162014-10-02 12:19:44 +03001066 u8 log_uar_page_sz[0x10];
1067
Tariq Toukane1c9c622016-04-11 23:10:21 +03001068 u8 reserved_at_4a0[0x20];
Linus Torvalds048ccca2016-01-23 18:45:06 -08001069 u8 device_frequency_mhz[0x20];
Eran Ben Elishab0844442015-12-29 14:58:30 +02001070 u8 device_frequency_khz[0x20];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001071
Eli Cohena6d51b62017-01-03 23:55:23 +02001072 u8 reserved_at_500[0x20];
1073 u8 num_of_uars_per_page[0x20];
1074 u8 reserved_at_540[0x40];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001075
Guy Levi0ff8e792017-10-19 08:25:51 +03001076 u8 reserved_at_580[0x3d];
1077 u8 cqe_128_always[0x1];
1078 u8 cqe_compression_128[0x1];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03001079 u8 cqe_compression[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +03001080
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03001081 u8 cqe_compression_timeout[0x10];
1082 u8 cqe_compression_max_num[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +03001083
Saeed Mahameed74862162016-06-09 15:11:34 +03001084 u8 reserved_at_5e0[0x10];
1085 u8 tag_matching[0x1];
1086 u8 rndv_offload_rc[0x1];
1087 u8 rndv_offload_dc[0x1];
1088 u8 log_tag_matching_list_sz[0x5];
Max Gurtovoy7b135582017-01-02 11:37:38 +02001089 u8 reserved_at_5f8[0x3];
Saeed Mahameed74862162016-06-09 15:11:34 +03001090 u8 log_max_xrq[0x5];
1091
Daniel Jurgens32f69e42018-01-04 17:25:36 +02001092 u8 affiliate_nic_vport_criteria[0x8];
1093 u8 native_port_num[0x8];
1094 u8 num_vhca_ports[0x8];
1095 u8 reserved_at_618[0x6];
1096 u8 sw_owner_id[0x1];
Daniel Jurgens8737f812018-01-04 17:25:32 +02001097 u8 reserved_at_61f[0x1e1];
Saeed Mahameede2816822015-05-28 22:28:40 +03001098};
1099
Saeed Mahameed81848732015-12-01 18:03:20 +02001100enum mlx5_flow_destination_type {
1101 MLX5_FLOW_DESTINATION_TYPE_VPORT = 0x0,
1102 MLX5_FLOW_DESTINATION_TYPE_FLOW_TABLE = 0x1,
1103 MLX5_FLOW_DESTINATION_TYPE_TIR = 0x2,
Amir Vadaibd5251db2016-05-13 12:55:40 +00001104
Aviad Yehezkel5f418372018-02-18 13:17:17 +02001105 MLX5_FLOW_DESTINATION_TYPE_PORT = 0x99,
Amir Vadaibd5251db2016-05-13 12:55:40 +00001106 MLX5_FLOW_DESTINATION_TYPE_COUNTER = 0x100,
Saeed Mahameede2816822015-05-28 22:28:40 +03001107};
1108
1109struct mlx5_ifc_dest_format_struct_bits {
1110 u8 destination_type[0x8];
1111 u8 destination_id[0x18];
1112
Matan Barakb4ff3a32016-02-09 14:57:42 +02001113 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03001114};
1115
Amir Vadai9dc0b282016-05-13 12:55:39 +00001116struct mlx5_ifc_flow_counter_list_bits {
Rabie Louloua8ffcc72017-07-09 13:39:30 +03001117 u8 flow_counter_id[0x20];
Amir Vadai9dc0b282016-05-13 12:55:39 +00001118
1119 u8 reserved_at_20[0x20];
1120};
1121
1122union mlx5_ifc_dest_format_struct_flow_counter_list_auto_bits {
1123 struct mlx5_ifc_dest_format_struct_bits dest_format_struct;
1124 struct mlx5_ifc_flow_counter_list_bits flow_counter_list;
1125 u8 reserved_at_0[0x40];
1126};
1127
Saeed Mahameede2816822015-05-28 22:28:40 +03001128struct mlx5_ifc_fte_match_param_bits {
1129 struct mlx5_ifc_fte_match_set_lyr_2_4_bits outer_headers;
1130
1131 struct mlx5_ifc_fte_match_set_misc_bits misc_parameters;
1132
1133 struct mlx5_ifc_fte_match_set_lyr_2_4_bits inner_headers;
1134
Matan Barakb4ff3a32016-02-09 14:57:42 +02001135 u8 reserved_at_600[0xa00];
Saeed Mahameede2816822015-05-28 22:28:40 +03001136};
1137
1138enum {
1139 MLX5_RX_HASH_FIELD_SELECT_SELECTED_FIELDS_SRC_IP = 0x0,
1140 MLX5_RX_HASH_FIELD_SELECT_SELECTED_FIELDS_DST_IP = 0x1,
1141 MLX5_RX_HASH_FIELD_SELECT_SELECTED_FIELDS_L4_SPORT = 0x2,
1142 MLX5_RX_HASH_FIELD_SELECT_SELECTED_FIELDS_L4_DPORT = 0x3,
1143 MLX5_RX_HASH_FIELD_SELECT_SELECTED_FIELDS_IPSEC_SPI = 0x4,
1144};
1145
1146struct mlx5_ifc_rx_hash_field_select_bits {
1147 u8 l3_prot_type[0x1];
1148 u8 l4_prot_type[0x1];
1149 u8 selected_fields[0x1e];
1150};
1151
1152enum {
1153 MLX5_WQ_WQ_TYPE_WQ_LINKED_LIST = 0x0,
1154 MLX5_WQ_WQ_TYPE_WQ_CYCLIC = 0x1,
1155};
1156
1157enum {
1158 MLX5_WQ_END_PADDING_MODE_END_PAD_NONE = 0x0,
1159 MLX5_WQ_END_PADDING_MODE_END_PAD_ALIGN = 0x1,
1160};
1161
1162struct mlx5_ifc_wq_bits {
1163 u8 wq_type[0x4];
1164 u8 wq_signature[0x1];
1165 u8 end_padding_mode[0x2];
1166 u8 cd_slave[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001167 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03001168
1169 u8 hds_skip_first_sge[0x1];
1170 u8 log2_hds_buf_size[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001171 u8 reserved_at_24[0x7];
Saeed Mahameede2816822015-05-28 22:28:40 +03001172 u8 page_offset[0x5];
1173 u8 lwm[0x10];
1174
Matan Barakb4ff3a32016-02-09 14:57:42 +02001175 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03001176 u8 pd[0x18];
1177
Matan Barakb4ff3a32016-02-09 14:57:42 +02001178 u8 reserved_at_60[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03001179 u8 uar_page[0x18];
1180
1181 u8 dbr_addr[0x40];
1182
1183 u8 hw_counter[0x20];
1184
1185 u8 sw_counter[0x20];
1186
Matan Barakb4ff3a32016-02-09 14:57:42 +02001187 u8 reserved_at_100[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03001188 u8 log_wq_stride[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001189 u8 reserved_at_110[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001190 u8 log_wq_pg_sz[0x5];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001191 u8 reserved_at_118[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001192 u8 log_wq_sz[0x5];
1193
Or Gerlitz4d533e02018-01-04 12:26:21 +02001194 u8 reserved_at_120[0x3];
1195 u8 log_hairpin_num_packets[0x5];
1196 u8 reserved_at_128[0x3];
Or Gerlitz40817cd2017-06-25 12:38:45 +03001197 u8 log_hairpin_data_sz[0x5];
1198 u8 reserved_at_130[0x5];
1199
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03001200 u8 log_wqe_num_of_strides[0x3];
1201 u8 two_byte_shift_en[0x1];
1202 u8 reserved_at_139[0x4];
1203 u8 log_wqe_stride_size[0x3];
1204
1205 u8 reserved_at_140[0x4c0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001206
1207 struct mlx5_ifc_cmd_pas_bits pas[0];
1208};
1209
1210struct mlx5_ifc_rq_num_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001211 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03001212 u8 rq_num[0x18];
1213};
1214
1215struct mlx5_ifc_mac_address_layout_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001216 u8 reserved_at_0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03001217 u8 mac_addr_47_32[0x10];
1218
1219 u8 mac_addr_31_0[0x20];
1220};
1221
Saeed Mahameedc0046cf2015-12-01 18:03:15 +02001222struct mlx5_ifc_vlan_layout_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001223 u8 reserved_at_0[0x14];
Saeed Mahameedc0046cf2015-12-01 18:03:15 +02001224 u8 vlan[0x0c];
1225
Matan Barakb4ff3a32016-02-09 14:57:42 +02001226 u8 reserved_at_20[0x20];
Saeed Mahameedc0046cf2015-12-01 18:03:15 +02001227};
1228
Saeed Mahameede2816822015-05-28 22:28:40 +03001229struct mlx5_ifc_cong_control_r_roce_ecn_np_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001230 u8 reserved_at_0[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001231
1232 u8 min_time_between_cnps[0x20];
1233
Matan Barakb4ff3a32016-02-09 14:57:42 +02001234 u8 reserved_at_c0[0x12];
Saeed Mahameede2816822015-05-28 22:28:40 +03001235 u8 cnp_dscp[0x6];
Parav Pandit4a2da0b2017-05-30 10:05:15 +03001236 u8 reserved_at_d8[0x4];
1237 u8 cnp_prio_mode[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03001238 u8 cnp_802p_prio[0x3];
1239
Matan Barakb4ff3a32016-02-09 14:57:42 +02001240 u8 reserved_at_e0[0x720];
Saeed Mahameede2816822015-05-28 22:28:40 +03001241};
1242
1243struct mlx5_ifc_cong_control_r_roce_ecn_rp_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001244 u8 reserved_at_0[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03001245
Matan Barakb4ff3a32016-02-09 14:57:42 +02001246 u8 reserved_at_60[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03001247 u8 clamp_tgt_rate[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001248 u8 reserved_at_65[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001249 u8 clamp_tgt_rate_after_time_inc[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001250 u8 reserved_at_69[0x17];
Saeed Mahameede2816822015-05-28 22:28:40 +03001251
Matan Barakb4ff3a32016-02-09 14:57:42 +02001252 u8 reserved_at_80[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03001253
1254 u8 rpg_time_reset[0x20];
1255
1256 u8 rpg_byte_reset[0x20];
1257
1258 u8 rpg_threshold[0x20];
1259
1260 u8 rpg_max_rate[0x20];
1261
1262 u8 rpg_ai_rate[0x20];
1263
1264 u8 rpg_hai_rate[0x20];
1265
1266 u8 rpg_gd[0x20];
1267
1268 u8 rpg_min_dec_fac[0x20];
1269
1270 u8 rpg_min_rate[0x20];
1271
Matan Barakb4ff3a32016-02-09 14:57:42 +02001272 u8 reserved_at_1c0[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001273
1274 u8 rate_to_set_on_first_cnp[0x20];
1275
1276 u8 dce_tcp_g[0x20];
1277
1278 u8 dce_tcp_rtt[0x20];
1279
1280 u8 rate_reduce_monitor_period[0x20];
1281
Matan Barakb4ff3a32016-02-09 14:57:42 +02001282 u8 reserved_at_320[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03001283
1284 u8 initial_alpha_value[0x20];
1285
Matan Barakb4ff3a32016-02-09 14:57:42 +02001286 u8 reserved_at_360[0x4a0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001287};
1288
1289struct mlx5_ifc_cong_control_802_1qau_rp_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001290 u8 reserved_at_0[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03001291
1292 u8 rppp_max_rps[0x20];
1293
1294 u8 rpg_time_reset[0x20];
1295
1296 u8 rpg_byte_reset[0x20];
1297
1298 u8 rpg_threshold[0x20];
1299
1300 u8 rpg_max_rate[0x20];
1301
1302 u8 rpg_ai_rate[0x20];
1303
1304 u8 rpg_hai_rate[0x20];
1305
1306 u8 rpg_gd[0x20];
1307
1308 u8 rpg_min_dec_fac[0x20];
1309
1310 u8 rpg_min_rate[0x20];
1311
Matan Barakb4ff3a32016-02-09 14:57:42 +02001312 u8 reserved_at_1c0[0x640];
Saeed Mahameede2816822015-05-28 22:28:40 +03001313};
1314
1315enum {
1316 MLX5_RESIZE_FIELD_SELECT_RESIZE_FIELD_SELECT_LOG_CQ_SIZE = 0x1,
1317 MLX5_RESIZE_FIELD_SELECT_RESIZE_FIELD_SELECT_PAGE_OFFSET = 0x2,
1318 MLX5_RESIZE_FIELD_SELECT_RESIZE_FIELD_SELECT_LOG_PAGE_SIZE = 0x4,
1319};
1320
1321struct mlx5_ifc_resize_field_select_bits {
1322 u8 resize_field_select[0x20];
1323};
1324
1325enum {
1326 MLX5_MODIFY_FIELD_SELECT_MODIFY_FIELD_SELECT_CQ_PERIOD = 0x1,
1327 MLX5_MODIFY_FIELD_SELECT_MODIFY_FIELD_SELECT_CQ_MAX_COUNT = 0x2,
1328 MLX5_MODIFY_FIELD_SELECT_MODIFY_FIELD_SELECT_OI = 0x4,
1329 MLX5_MODIFY_FIELD_SELECT_MODIFY_FIELD_SELECT_C_EQN = 0x8,
1330};
1331
1332struct mlx5_ifc_modify_field_select_bits {
1333 u8 modify_field_select[0x20];
1334};
1335
1336struct mlx5_ifc_field_select_r_roce_np_bits {
1337 u8 field_select_r_roce_np[0x20];
1338};
1339
1340struct mlx5_ifc_field_select_r_roce_rp_bits {
1341 u8 field_select_r_roce_rp[0x20];
1342};
1343
1344enum {
1345 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPPP_MAX_RPS = 0x4,
1346 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_TIME_RESET = 0x8,
1347 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_BYTE_RESET = 0x10,
1348 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_THRESHOLD = 0x20,
1349 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_MAX_RATE = 0x40,
1350 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_AI_RATE = 0x80,
1351 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_HAI_RATE = 0x100,
1352 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_GD = 0x200,
1353 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_MIN_DEC_FAC = 0x400,
1354 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_MIN_RATE = 0x800,
1355};
1356
1357struct mlx5_ifc_field_select_802_1qau_rp_bits {
1358 u8 field_select_8021qaurp[0x20];
1359};
1360
1361struct mlx5_ifc_phys_layer_cntrs_bits {
1362 u8 time_since_last_clear_high[0x20];
1363
1364 u8 time_since_last_clear_low[0x20];
1365
1366 u8 symbol_errors_high[0x20];
1367
1368 u8 symbol_errors_low[0x20];
1369
1370 u8 sync_headers_errors_high[0x20];
1371
1372 u8 sync_headers_errors_low[0x20];
1373
1374 u8 edpl_bip_errors_lane0_high[0x20];
1375
1376 u8 edpl_bip_errors_lane0_low[0x20];
1377
1378 u8 edpl_bip_errors_lane1_high[0x20];
1379
1380 u8 edpl_bip_errors_lane1_low[0x20];
1381
1382 u8 edpl_bip_errors_lane2_high[0x20];
1383
1384 u8 edpl_bip_errors_lane2_low[0x20];
1385
1386 u8 edpl_bip_errors_lane3_high[0x20];
1387
1388 u8 edpl_bip_errors_lane3_low[0x20];
1389
1390 u8 fc_fec_corrected_blocks_lane0_high[0x20];
1391
1392 u8 fc_fec_corrected_blocks_lane0_low[0x20];
1393
1394 u8 fc_fec_corrected_blocks_lane1_high[0x20];
1395
1396 u8 fc_fec_corrected_blocks_lane1_low[0x20];
1397
1398 u8 fc_fec_corrected_blocks_lane2_high[0x20];
1399
1400 u8 fc_fec_corrected_blocks_lane2_low[0x20];
1401
1402 u8 fc_fec_corrected_blocks_lane3_high[0x20];
1403
1404 u8 fc_fec_corrected_blocks_lane3_low[0x20];
1405
1406 u8 fc_fec_uncorrectable_blocks_lane0_high[0x20];
1407
1408 u8 fc_fec_uncorrectable_blocks_lane0_low[0x20];
1409
1410 u8 fc_fec_uncorrectable_blocks_lane1_high[0x20];
1411
1412 u8 fc_fec_uncorrectable_blocks_lane1_low[0x20];
1413
1414 u8 fc_fec_uncorrectable_blocks_lane2_high[0x20];
1415
1416 u8 fc_fec_uncorrectable_blocks_lane2_low[0x20];
1417
1418 u8 fc_fec_uncorrectable_blocks_lane3_high[0x20];
1419
1420 u8 fc_fec_uncorrectable_blocks_lane3_low[0x20];
1421
1422 u8 rs_fec_corrected_blocks_high[0x20];
1423
1424 u8 rs_fec_corrected_blocks_low[0x20];
1425
1426 u8 rs_fec_uncorrectable_blocks_high[0x20];
1427
1428 u8 rs_fec_uncorrectable_blocks_low[0x20];
1429
1430 u8 rs_fec_no_errors_blocks_high[0x20];
1431
1432 u8 rs_fec_no_errors_blocks_low[0x20];
1433
1434 u8 rs_fec_single_error_blocks_high[0x20];
1435
1436 u8 rs_fec_single_error_blocks_low[0x20];
1437
1438 u8 rs_fec_corrected_symbols_total_high[0x20];
1439
1440 u8 rs_fec_corrected_symbols_total_low[0x20];
1441
1442 u8 rs_fec_corrected_symbols_lane0_high[0x20];
1443
1444 u8 rs_fec_corrected_symbols_lane0_low[0x20];
1445
1446 u8 rs_fec_corrected_symbols_lane1_high[0x20];
1447
1448 u8 rs_fec_corrected_symbols_lane1_low[0x20];
1449
1450 u8 rs_fec_corrected_symbols_lane2_high[0x20];
1451
1452 u8 rs_fec_corrected_symbols_lane2_low[0x20];
1453
1454 u8 rs_fec_corrected_symbols_lane3_high[0x20];
1455
1456 u8 rs_fec_corrected_symbols_lane3_low[0x20];
1457
1458 u8 link_down_events[0x20];
1459
1460 u8 successful_recovery_events[0x20];
1461
Matan Barakb4ff3a32016-02-09 14:57:42 +02001462 u8 reserved_at_640[0x180];
Saeed Mahameede2816822015-05-28 22:28:40 +03001463};
1464
Gal Pressmand8dc0502016-09-27 17:04:51 +03001465struct mlx5_ifc_phys_layer_statistical_cntrs_bits {
1466 u8 time_since_last_clear_high[0x20];
1467
1468 u8 time_since_last_clear_low[0x20];
1469
1470 u8 phy_received_bits_high[0x20];
1471
1472 u8 phy_received_bits_low[0x20];
1473
1474 u8 phy_symbol_errors_high[0x20];
1475
1476 u8 phy_symbol_errors_low[0x20];
1477
1478 u8 phy_corrected_bits_high[0x20];
1479
1480 u8 phy_corrected_bits_low[0x20];
1481
1482 u8 phy_corrected_bits_lane0_high[0x20];
1483
1484 u8 phy_corrected_bits_lane0_low[0x20];
1485
1486 u8 phy_corrected_bits_lane1_high[0x20];
1487
1488 u8 phy_corrected_bits_lane1_low[0x20];
1489
1490 u8 phy_corrected_bits_lane2_high[0x20];
1491
1492 u8 phy_corrected_bits_lane2_low[0x20];
1493
1494 u8 phy_corrected_bits_lane3_high[0x20];
1495
1496 u8 phy_corrected_bits_lane3_low[0x20];
1497
1498 u8 reserved_at_200[0x5c0];
1499};
1500
Meny Yossefi1c64bf62016-02-18 18:15:00 +02001501struct mlx5_ifc_ib_port_cntrs_grp_data_layout_bits {
1502 u8 symbol_error_counter[0x10];
1503
1504 u8 link_error_recovery_counter[0x8];
1505
1506 u8 link_downed_counter[0x8];
1507
1508 u8 port_rcv_errors[0x10];
1509
1510 u8 port_rcv_remote_physical_errors[0x10];
1511
1512 u8 port_rcv_switch_relay_errors[0x10];
1513
1514 u8 port_xmit_discards[0x10];
1515
1516 u8 port_xmit_constraint_errors[0x8];
1517
1518 u8 port_rcv_constraint_errors[0x8];
1519
1520 u8 reserved_at_70[0x8];
1521
1522 u8 link_overrun_errors[0x8];
1523
1524 u8 reserved_at_80[0x10];
1525
1526 u8 vl_15_dropped[0x10];
1527
Tim Wright133bea02017-05-01 17:30:08 +01001528 u8 reserved_at_a0[0x80];
1529
1530 u8 port_xmit_wait[0x20];
Meny Yossefi1c64bf62016-02-18 18:15:00 +02001531};
1532
Saeed Mahameede2816822015-05-28 22:28:40 +03001533struct mlx5_ifc_eth_per_traffic_grp_data_layout_bits {
1534 u8 transmit_queue_high[0x20];
1535
1536 u8 transmit_queue_low[0x20];
1537
Matan Barakb4ff3a32016-02-09 14:57:42 +02001538 u8 reserved_at_40[0x780];
Saeed Mahameede2816822015-05-28 22:28:40 +03001539};
1540
1541struct mlx5_ifc_eth_per_prio_grp_data_layout_bits {
1542 u8 rx_octets_high[0x20];
1543
1544 u8 rx_octets_low[0x20];
1545
Matan Barakb4ff3a32016-02-09 14:57:42 +02001546 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001547
1548 u8 rx_frames_high[0x20];
1549
1550 u8 rx_frames_low[0x20];
1551
1552 u8 tx_octets_high[0x20];
1553
1554 u8 tx_octets_low[0x20];
1555
Matan Barakb4ff3a32016-02-09 14:57:42 +02001556 u8 reserved_at_180[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001557
1558 u8 tx_frames_high[0x20];
1559
1560 u8 tx_frames_low[0x20];
1561
1562 u8 rx_pause_high[0x20];
1563
1564 u8 rx_pause_low[0x20];
1565
1566 u8 rx_pause_duration_high[0x20];
1567
1568 u8 rx_pause_duration_low[0x20];
1569
1570 u8 tx_pause_high[0x20];
1571
1572 u8 tx_pause_low[0x20];
1573
1574 u8 tx_pause_duration_high[0x20];
1575
1576 u8 tx_pause_duration_low[0x20];
1577
1578 u8 rx_pause_transition_high[0x20];
1579
1580 u8 rx_pause_transition_low[0x20];
1581
Matan Barakb4ff3a32016-02-09 14:57:42 +02001582 u8 reserved_at_3c0[0x400];
Saeed Mahameede2816822015-05-28 22:28:40 +03001583};
1584
1585struct mlx5_ifc_eth_extended_cntrs_grp_data_layout_bits {
1586 u8 port_transmit_wait_high[0x20];
1587
1588 u8 port_transmit_wait_low[0x20];
1589
Gal Pressman2dba0792017-06-18 14:56:45 +03001590 u8 reserved_at_40[0x100];
1591
1592 u8 rx_buffer_almost_full_high[0x20];
1593
1594 u8 rx_buffer_almost_full_low[0x20];
1595
1596 u8 rx_buffer_full_high[0x20];
1597
1598 u8 rx_buffer_full_low[0x20];
1599
1600 u8 reserved_at_1c0[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03001601};
1602
1603struct mlx5_ifc_eth_3635_cntrs_grp_data_layout_bits {
1604 u8 dot3stats_alignment_errors_high[0x20];
1605
1606 u8 dot3stats_alignment_errors_low[0x20];
1607
1608 u8 dot3stats_fcs_errors_high[0x20];
1609
1610 u8 dot3stats_fcs_errors_low[0x20];
1611
1612 u8 dot3stats_single_collision_frames_high[0x20];
1613
1614 u8 dot3stats_single_collision_frames_low[0x20];
1615
1616 u8 dot3stats_multiple_collision_frames_high[0x20];
1617
1618 u8 dot3stats_multiple_collision_frames_low[0x20];
1619
1620 u8 dot3stats_sqe_test_errors_high[0x20];
1621
1622 u8 dot3stats_sqe_test_errors_low[0x20];
1623
1624 u8 dot3stats_deferred_transmissions_high[0x20];
1625
1626 u8 dot3stats_deferred_transmissions_low[0x20];
1627
1628 u8 dot3stats_late_collisions_high[0x20];
1629
1630 u8 dot3stats_late_collisions_low[0x20];
1631
1632 u8 dot3stats_excessive_collisions_high[0x20];
1633
1634 u8 dot3stats_excessive_collisions_low[0x20];
1635
1636 u8 dot3stats_internal_mac_transmit_errors_high[0x20];
1637
1638 u8 dot3stats_internal_mac_transmit_errors_low[0x20];
1639
1640 u8 dot3stats_carrier_sense_errors_high[0x20];
1641
1642 u8 dot3stats_carrier_sense_errors_low[0x20];
1643
1644 u8 dot3stats_frame_too_longs_high[0x20];
1645
1646 u8 dot3stats_frame_too_longs_low[0x20];
1647
1648 u8 dot3stats_internal_mac_receive_errors_high[0x20];
1649
1650 u8 dot3stats_internal_mac_receive_errors_low[0x20];
1651
1652 u8 dot3stats_symbol_errors_high[0x20];
1653
1654 u8 dot3stats_symbol_errors_low[0x20];
1655
1656 u8 dot3control_in_unknown_opcodes_high[0x20];
1657
1658 u8 dot3control_in_unknown_opcodes_low[0x20];
1659
1660 u8 dot3in_pause_frames_high[0x20];
1661
1662 u8 dot3in_pause_frames_low[0x20];
1663
1664 u8 dot3out_pause_frames_high[0x20];
1665
1666 u8 dot3out_pause_frames_low[0x20];
1667
Matan Barakb4ff3a32016-02-09 14:57:42 +02001668 u8 reserved_at_400[0x3c0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001669};
1670
1671struct mlx5_ifc_eth_2819_cntrs_grp_data_layout_bits {
1672 u8 ether_stats_drop_events_high[0x20];
1673
1674 u8 ether_stats_drop_events_low[0x20];
1675
1676 u8 ether_stats_octets_high[0x20];
1677
1678 u8 ether_stats_octets_low[0x20];
1679
1680 u8 ether_stats_pkts_high[0x20];
1681
1682 u8 ether_stats_pkts_low[0x20];
1683
1684 u8 ether_stats_broadcast_pkts_high[0x20];
1685
1686 u8 ether_stats_broadcast_pkts_low[0x20];
1687
1688 u8 ether_stats_multicast_pkts_high[0x20];
1689
1690 u8 ether_stats_multicast_pkts_low[0x20];
1691
1692 u8 ether_stats_crc_align_errors_high[0x20];
1693
1694 u8 ether_stats_crc_align_errors_low[0x20];
1695
1696 u8 ether_stats_undersize_pkts_high[0x20];
1697
1698 u8 ether_stats_undersize_pkts_low[0x20];
1699
1700 u8 ether_stats_oversize_pkts_high[0x20];
1701
1702 u8 ether_stats_oversize_pkts_low[0x20];
1703
1704 u8 ether_stats_fragments_high[0x20];
1705
1706 u8 ether_stats_fragments_low[0x20];
1707
1708 u8 ether_stats_jabbers_high[0x20];
1709
1710 u8 ether_stats_jabbers_low[0x20];
1711
1712 u8 ether_stats_collisions_high[0x20];
1713
1714 u8 ether_stats_collisions_low[0x20];
1715
1716 u8 ether_stats_pkts64octets_high[0x20];
1717
1718 u8 ether_stats_pkts64octets_low[0x20];
1719
1720 u8 ether_stats_pkts65to127octets_high[0x20];
1721
1722 u8 ether_stats_pkts65to127octets_low[0x20];
1723
1724 u8 ether_stats_pkts128to255octets_high[0x20];
1725
1726 u8 ether_stats_pkts128to255octets_low[0x20];
1727
1728 u8 ether_stats_pkts256to511octets_high[0x20];
1729
1730 u8 ether_stats_pkts256to511octets_low[0x20];
1731
1732 u8 ether_stats_pkts512to1023octets_high[0x20];
1733
1734 u8 ether_stats_pkts512to1023octets_low[0x20];
1735
1736 u8 ether_stats_pkts1024to1518octets_high[0x20];
1737
1738 u8 ether_stats_pkts1024to1518octets_low[0x20];
1739
1740 u8 ether_stats_pkts1519to2047octets_high[0x20];
1741
1742 u8 ether_stats_pkts1519to2047octets_low[0x20];
1743
1744 u8 ether_stats_pkts2048to4095octets_high[0x20];
1745
1746 u8 ether_stats_pkts2048to4095octets_low[0x20];
1747
1748 u8 ether_stats_pkts4096to8191octets_high[0x20];
1749
1750 u8 ether_stats_pkts4096to8191octets_low[0x20];
1751
1752 u8 ether_stats_pkts8192to10239octets_high[0x20];
1753
1754 u8 ether_stats_pkts8192to10239octets_low[0x20];
1755
Matan Barakb4ff3a32016-02-09 14:57:42 +02001756 u8 reserved_at_540[0x280];
Saeed Mahameede2816822015-05-28 22:28:40 +03001757};
1758
1759struct mlx5_ifc_eth_2863_cntrs_grp_data_layout_bits {
1760 u8 if_in_octets_high[0x20];
1761
1762 u8 if_in_octets_low[0x20];
1763
1764 u8 if_in_ucast_pkts_high[0x20];
1765
1766 u8 if_in_ucast_pkts_low[0x20];
1767
1768 u8 if_in_discards_high[0x20];
1769
1770 u8 if_in_discards_low[0x20];
1771
1772 u8 if_in_errors_high[0x20];
1773
1774 u8 if_in_errors_low[0x20];
1775
1776 u8 if_in_unknown_protos_high[0x20];
1777
1778 u8 if_in_unknown_protos_low[0x20];
1779
1780 u8 if_out_octets_high[0x20];
1781
1782 u8 if_out_octets_low[0x20];
1783
1784 u8 if_out_ucast_pkts_high[0x20];
1785
1786 u8 if_out_ucast_pkts_low[0x20];
1787
1788 u8 if_out_discards_high[0x20];
1789
1790 u8 if_out_discards_low[0x20];
1791
1792 u8 if_out_errors_high[0x20];
1793
1794 u8 if_out_errors_low[0x20];
1795
1796 u8 if_in_multicast_pkts_high[0x20];
1797
1798 u8 if_in_multicast_pkts_low[0x20];
1799
1800 u8 if_in_broadcast_pkts_high[0x20];
1801
1802 u8 if_in_broadcast_pkts_low[0x20];
1803
1804 u8 if_out_multicast_pkts_high[0x20];
1805
1806 u8 if_out_multicast_pkts_low[0x20];
1807
1808 u8 if_out_broadcast_pkts_high[0x20];
1809
1810 u8 if_out_broadcast_pkts_low[0x20];
1811
Matan Barakb4ff3a32016-02-09 14:57:42 +02001812 u8 reserved_at_340[0x480];
Saeed Mahameede2816822015-05-28 22:28:40 +03001813};
1814
1815struct mlx5_ifc_eth_802_3_cntrs_grp_data_layout_bits {
1816 u8 a_frames_transmitted_ok_high[0x20];
1817
1818 u8 a_frames_transmitted_ok_low[0x20];
1819
1820 u8 a_frames_received_ok_high[0x20];
1821
1822 u8 a_frames_received_ok_low[0x20];
1823
1824 u8 a_frame_check_sequence_errors_high[0x20];
1825
1826 u8 a_frame_check_sequence_errors_low[0x20];
1827
1828 u8 a_alignment_errors_high[0x20];
1829
1830 u8 a_alignment_errors_low[0x20];
1831
1832 u8 a_octets_transmitted_ok_high[0x20];
1833
1834 u8 a_octets_transmitted_ok_low[0x20];
1835
1836 u8 a_octets_received_ok_high[0x20];
1837
1838 u8 a_octets_received_ok_low[0x20];
1839
1840 u8 a_multicast_frames_xmitted_ok_high[0x20];
1841
1842 u8 a_multicast_frames_xmitted_ok_low[0x20];
1843
1844 u8 a_broadcast_frames_xmitted_ok_high[0x20];
1845
1846 u8 a_broadcast_frames_xmitted_ok_low[0x20];
1847
1848 u8 a_multicast_frames_received_ok_high[0x20];
1849
1850 u8 a_multicast_frames_received_ok_low[0x20];
1851
1852 u8 a_broadcast_frames_received_ok_high[0x20];
1853
1854 u8 a_broadcast_frames_received_ok_low[0x20];
1855
1856 u8 a_in_range_length_errors_high[0x20];
1857
1858 u8 a_in_range_length_errors_low[0x20];
1859
1860 u8 a_out_of_range_length_field_high[0x20];
1861
1862 u8 a_out_of_range_length_field_low[0x20];
1863
1864 u8 a_frame_too_long_errors_high[0x20];
1865
1866 u8 a_frame_too_long_errors_low[0x20];
1867
1868 u8 a_symbol_error_during_carrier_high[0x20];
1869
1870 u8 a_symbol_error_during_carrier_low[0x20];
1871
1872 u8 a_mac_control_frames_transmitted_high[0x20];
1873
1874 u8 a_mac_control_frames_transmitted_low[0x20];
1875
1876 u8 a_mac_control_frames_received_high[0x20];
1877
1878 u8 a_mac_control_frames_received_low[0x20];
1879
1880 u8 a_unsupported_opcodes_received_high[0x20];
1881
1882 u8 a_unsupported_opcodes_received_low[0x20];
1883
1884 u8 a_pause_mac_ctrl_frames_received_high[0x20];
1885
1886 u8 a_pause_mac_ctrl_frames_received_low[0x20];
1887
1888 u8 a_pause_mac_ctrl_frames_transmitted_high[0x20];
1889
1890 u8 a_pause_mac_ctrl_frames_transmitted_low[0x20];
1891
Matan Barakb4ff3a32016-02-09 14:57:42 +02001892 u8 reserved_at_4c0[0x300];
Saeed Mahameede2816822015-05-28 22:28:40 +03001893};
1894
Gal Pressman8ed1a632016-11-17 13:46:01 +02001895struct mlx5_ifc_pcie_perf_cntrs_grp_data_layout_bits {
1896 u8 life_time_counter_high[0x20];
1897
1898 u8 life_time_counter_low[0x20];
1899
1900 u8 rx_errors[0x20];
1901
1902 u8 tx_errors[0x20];
1903
1904 u8 l0_to_recovery_eieos[0x20];
1905
1906 u8 l0_to_recovery_ts[0x20];
1907
1908 u8 l0_to_recovery_framing[0x20];
1909
1910 u8 l0_to_recovery_retrain[0x20];
1911
1912 u8 crc_error_dllp[0x20];
1913
1914 u8 crc_error_tlp[0x20];
1915
Eran Ben Elishaefae7f72017-05-12 02:47:02 +03001916 u8 tx_overflow_buffer_pkt_high[0x20];
1917
1918 u8 tx_overflow_buffer_pkt_low[0x20];
Gal Pressman5405fa22017-06-15 18:29:23 +03001919
1920 u8 outbound_stalled_reads[0x20];
1921
1922 u8 outbound_stalled_writes[0x20];
1923
1924 u8 outbound_stalled_reads_events[0x20];
1925
1926 u8 outbound_stalled_writes_events[0x20];
1927
1928 u8 reserved_at_200[0x5c0];
Gal Pressman8ed1a632016-11-17 13:46:01 +02001929};
1930
Saeed Mahameede2816822015-05-28 22:28:40 +03001931struct mlx5_ifc_cmd_inter_comp_event_bits {
1932 u8 command_completion_vector[0x20];
1933
Matan Barakb4ff3a32016-02-09 14:57:42 +02001934 u8 reserved_at_20[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001935};
1936
1937struct mlx5_ifc_stall_vl_event_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001938 u8 reserved_at_0[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03001939 u8 port_num[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001940 u8 reserved_at_19[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001941 u8 vl[0x4];
1942
Matan Barakb4ff3a32016-02-09 14:57:42 +02001943 u8 reserved_at_20[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001944};
1945
1946struct mlx5_ifc_db_bf_congestion_event_bits {
1947 u8 event_subtype[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001948 u8 reserved_at_8[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03001949 u8 congestion_level[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001950 u8 reserved_at_18[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03001951
Matan Barakb4ff3a32016-02-09 14:57:42 +02001952 u8 reserved_at_20[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001953};
1954
1955struct mlx5_ifc_gpio_event_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001956 u8 reserved_at_0[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03001957
1958 u8 gpio_event_hi[0x20];
1959
1960 u8 gpio_event_lo[0x20];
1961
Matan Barakb4ff3a32016-02-09 14:57:42 +02001962 u8 reserved_at_a0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03001963};
1964
1965struct mlx5_ifc_port_state_change_event_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001966 u8 reserved_at_0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03001967
1968 u8 port_num[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001969 u8 reserved_at_44[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03001970
Matan Barakb4ff3a32016-02-09 14:57:42 +02001971 u8 reserved_at_60[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03001972};
1973
1974struct mlx5_ifc_dropped_packet_logged_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001975 u8 reserved_at_0[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001976};
1977
1978enum {
1979 MLX5_CQ_ERROR_SYNDROME_CQ_OVERRUN = 0x1,
1980 MLX5_CQ_ERROR_SYNDROME_CQ_ACCESS_VIOLATION_ERROR = 0x2,
1981};
1982
1983struct mlx5_ifc_cq_error_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001984 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03001985 u8 cqn[0x18];
1986
Matan Barakb4ff3a32016-02-09 14:57:42 +02001987 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03001988
Matan Barakb4ff3a32016-02-09 14:57:42 +02001989 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03001990 u8 syndrome[0x8];
1991
Matan Barakb4ff3a32016-02-09 14:57:42 +02001992 u8 reserved_at_60[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03001993};
1994
1995struct mlx5_ifc_rdma_page_fault_event_bits {
1996 u8 bytes_committed[0x20];
1997
1998 u8 r_key[0x20];
1999
Matan Barakb4ff3a32016-02-09 14:57:42 +02002000 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03002001 u8 packet_len[0x10];
2002
2003 u8 rdma_op_len[0x20];
2004
2005 u8 rdma_va[0x40];
2006
Matan Barakb4ff3a32016-02-09 14:57:42 +02002007 u8 reserved_at_c0[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03002008 u8 rdma[0x1];
2009 u8 write[0x1];
2010 u8 requestor[0x1];
2011 u8 qp_number[0x18];
2012};
2013
2014struct mlx5_ifc_wqe_associated_page_fault_event_bits {
2015 u8 bytes_committed[0x20];
2016
Matan Barakb4ff3a32016-02-09 14:57:42 +02002017 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03002018 u8 wqe_index[0x10];
2019
Matan Barakb4ff3a32016-02-09 14:57:42 +02002020 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03002021 u8 len[0x10];
2022
Matan Barakb4ff3a32016-02-09 14:57:42 +02002023 u8 reserved_at_60[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03002024
Matan Barakb4ff3a32016-02-09 14:57:42 +02002025 u8 reserved_at_c0[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03002026 u8 rdma[0x1];
2027 u8 write_read[0x1];
2028 u8 requestor[0x1];
2029 u8 qpn[0x18];
2030};
2031
2032struct mlx5_ifc_qp_events_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002033 u8 reserved_at_0[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002034
2035 u8 type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002036 u8 reserved_at_a8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002037
Matan Barakb4ff3a32016-02-09 14:57:42 +02002038 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002039 u8 qpn_rqn_sqn[0x18];
2040};
2041
2042struct mlx5_ifc_dct_events_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002043 u8 reserved_at_0[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002044
Matan Barakb4ff3a32016-02-09 14:57:42 +02002045 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002046 u8 dct_number[0x18];
2047};
2048
2049struct mlx5_ifc_comp_event_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002050 u8 reserved_at_0[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002051
Matan Barakb4ff3a32016-02-09 14:57:42 +02002052 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002053 u8 cq_number[0x18];
2054};
2055
2056enum {
2057 MLX5_QPC_STATE_RST = 0x0,
2058 MLX5_QPC_STATE_INIT = 0x1,
2059 MLX5_QPC_STATE_RTR = 0x2,
2060 MLX5_QPC_STATE_RTS = 0x3,
2061 MLX5_QPC_STATE_SQER = 0x4,
2062 MLX5_QPC_STATE_ERR = 0x6,
2063 MLX5_QPC_STATE_SQD = 0x7,
2064 MLX5_QPC_STATE_SUSPENDED = 0x9,
2065};
2066
2067enum {
2068 MLX5_QPC_ST_RC = 0x0,
2069 MLX5_QPC_ST_UC = 0x1,
2070 MLX5_QPC_ST_UD = 0x2,
2071 MLX5_QPC_ST_XRC = 0x3,
2072 MLX5_QPC_ST_DCI = 0x5,
2073 MLX5_QPC_ST_QP0 = 0x7,
2074 MLX5_QPC_ST_QP1 = 0x8,
2075 MLX5_QPC_ST_RAW_DATAGRAM = 0x9,
2076 MLX5_QPC_ST_REG_UMR = 0xc,
2077};
2078
2079enum {
2080 MLX5_QPC_PM_STATE_ARMED = 0x0,
2081 MLX5_QPC_PM_STATE_REARM = 0x1,
2082 MLX5_QPC_PM_STATE_RESERVED = 0x2,
2083 MLX5_QPC_PM_STATE_MIGRATED = 0x3,
2084};
2085
2086enum {
Artemy Kovalyov6e446362017-08-15 11:59:02 +03002087 MLX5_QPC_OFFLOAD_TYPE_RNDV = 0x1,
2088};
2089
2090enum {
Saeed Mahameede2816822015-05-28 22:28:40 +03002091 MLX5_QPC_END_PADDING_MODE_SCATTER_AS_IS = 0x0,
2092 MLX5_QPC_END_PADDING_MODE_PAD_TO_CACHE_LINE_ALIGNMENT = 0x1,
2093};
2094
2095enum {
2096 MLX5_QPC_MTU_256_BYTES = 0x1,
2097 MLX5_QPC_MTU_512_BYTES = 0x2,
2098 MLX5_QPC_MTU_1K_BYTES = 0x3,
2099 MLX5_QPC_MTU_2K_BYTES = 0x4,
2100 MLX5_QPC_MTU_4K_BYTES = 0x5,
2101 MLX5_QPC_MTU_RAW_ETHERNET_QP = 0x7,
2102};
2103
2104enum {
2105 MLX5_QPC_ATOMIC_MODE_IB_SPEC = 0x1,
2106 MLX5_QPC_ATOMIC_MODE_ONLY_8B = 0x2,
2107 MLX5_QPC_ATOMIC_MODE_UP_TO_8B = 0x3,
2108 MLX5_QPC_ATOMIC_MODE_UP_TO_16B = 0x4,
2109 MLX5_QPC_ATOMIC_MODE_UP_TO_32B = 0x5,
2110 MLX5_QPC_ATOMIC_MODE_UP_TO_64B = 0x6,
2111 MLX5_QPC_ATOMIC_MODE_UP_TO_128B = 0x7,
2112 MLX5_QPC_ATOMIC_MODE_UP_TO_256B = 0x8,
2113};
2114
2115enum {
2116 MLX5_QPC_CS_REQ_DISABLE = 0x0,
2117 MLX5_QPC_CS_REQ_UP_TO_32B = 0x11,
2118 MLX5_QPC_CS_REQ_UP_TO_64B = 0x22,
2119};
2120
2121enum {
2122 MLX5_QPC_CS_RES_DISABLE = 0x0,
2123 MLX5_QPC_CS_RES_UP_TO_32B = 0x1,
2124 MLX5_QPC_CS_RES_UP_TO_64B = 0x2,
2125};
2126
2127struct mlx5_ifc_qpc_bits {
2128 u8 state[0x4];
Aviv Heller84df61e2016-05-10 13:47:50 +03002129 u8 lag_tx_port_affinity[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002130 u8 st[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002131 u8 reserved_at_10[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002132 u8 pm_state[0x2];
Artemy Kovalyov6e446362017-08-15 11:59:02 +03002133 u8 reserved_at_15[0x3];
2134 u8 offload_type[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002135 u8 end_padding_mode[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002136 u8 reserved_at_1e[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002137
2138 u8 wq_signature[0x1];
2139 u8 block_lb_mc[0x1];
2140 u8 atomic_like_write_en[0x1];
2141 u8 latency_sensitive[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002142 u8 reserved_at_24[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002143 u8 drain_sigerr[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002144 u8 reserved_at_26[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002145 u8 pd[0x18];
2146
2147 u8 mtu[0x3];
2148 u8 log_msg_max[0x5];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002149 u8 reserved_at_48[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002150 u8 log_rq_size[0x4];
2151 u8 log_rq_stride[0x3];
2152 u8 no_sq[0x1];
2153 u8 log_sq_size[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002154 u8 reserved_at_55[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03002155 u8 rlky[0x1];
Erez Shitrit1015c2e2016-02-21 16:27:16 +02002156 u8 ulp_stateless_offload_mode[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002157
2158 u8 counter_set_id[0x8];
2159 u8 uar_page[0x18];
2160
Matan Barakb4ff3a32016-02-09 14:57:42 +02002161 u8 reserved_at_80[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002162 u8 user_index[0x18];
2163
Matan Barakb4ff3a32016-02-09 14:57:42 +02002164 u8 reserved_at_a0[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002165 u8 log_page_size[0x5];
2166 u8 remote_qpn[0x18];
2167
2168 struct mlx5_ifc_ads_bits primary_address_path;
2169
2170 struct mlx5_ifc_ads_bits secondary_address_path;
2171
2172 u8 log_ack_req_freq[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002173 u8 reserved_at_384[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002174 u8 log_sra_max[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002175 u8 reserved_at_38b[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002176 u8 retry_count[0x3];
2177 u8 rnr_retry[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002178 u8 reserved_at_393[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002179 u8 fre[0x1];
2180 u8 cur_rnr_retry[0x3];
2181 u8 cur_retry_count[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002182 u8 reserved_at_39b[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03002183
Matan Barakb4ff3a32016-02-09 14:57:42 +02002184 u8 reserved_at_3a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002185
Matan Barakb4ff3a32016-02-09 14:57:42 +02002186 u8 reserved_at_3c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002187 u8 next_send_psn[0x18];
2188
Matan Barakb4ff3a32016-02-09 14:57:42 +02002189 u8 reserved_at_3e0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002190 u8 cqn_snd[0x18];
2191
Saeed Mahameed09a7d9e2016-07-19 01:17:59 +03002192 u8 reserved_at_400[0x8];
2193 u8 deth_sqpn[0x18];
2194
2195 u8 reserved_at_420[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002196
Matan Barakb4ff3a32016-02-09 14:57:42 +02002197 u8 reserved_at_440[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002198 u8 last_acked_psn[0x18];
2199
Matan Barakb4ff3a32016-02-09 14:57:42 +02002200 u8 reserved_at_460[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002201 u8 ssn[0x18];
2202
Matan Barakb4ff3a32016-02-09 14:57:42 +02002203 u8 reserved_at_480[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002204 u8 log_rra_max[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002205 u8 reserved_at_48b[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002206 u8 atomic_mode[0x4];
2207 u8 rre[0x1];
2208 u8 rwe[0x1];
2209 u8 rae[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002210 u8 reserved_at_493[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002211 u8 page_offset[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002212 u8 reserved_at_49a[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002213 u8 cd_slave_receive[0x1];
2214 u8 cd_slave_send[0x1];
2215 u8 cd_master[0x1];
2216
Matan Barakb4ff3a32016-02-09 14:57:42 +02002217 u8 reserved_at_4a0[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002218 u8 min_rnr_nak[0x5];
2219 u8 next_rcv_psn[0x18];
2220
Matan Barakb4ff3a32016-02-09 14:57:42 +02002221 u8 reserved_at_4c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002222 u8 xrcd[0x18];
2223
Matan Barakb4ff3a32016-02-09 14:57:42 +02002224 u8 reserved_at_4e0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002225 u8 cqn_rcv[0x18];
2226
2227 u8 dbr_addr[0x40];
2228
2229 u8 q_key[0x20];
2230
Matan Barakb4ff3a32016-02-09 14:57:42 +02002231 u8 reserved_at_560[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03002232 u8 rq_type[0x3];
Saeed Mahameed74862162016-06-09 15:11:34 +03002233 u8 srqn_rmpn_xrqn[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002234
Matan Barakb4ff3a32016-02-09 14:57:42 +02002235 u8 reserved_at_580[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002236 u8 rmsn[0x18];
2237
2238 u8 hw_sq_wqebb_counter[0x10];
2239 u8 sw_sq_wqebb_counter[0x10];
2240
2241 u8 hw_rq_counter[0x20];
2242
2243 u8 sw_rq_counter[0x20];
2244
Matan Barakb4ff3a32016-02-09 14:57:42 +02002245 u8 reserved_at_600[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002246
Matan Barakb4ff3a32016-02-09 14:57:42 +02002247 u8 reserved_at_620[0xf];
Saeed Mahameede2816822015-05-28 22:28:40 +03002248 u8 cgs[0x1];
2249 u8 cs_req[0x8];
2250 u8 cs_res[0x8];
2251
2252 u8 dc_access_key[0x40];
2253
Matan Barakb4ff3a32016-02-09 14:57:42 +02002254 u8 reserved_at_680[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002255};
2256
2257struct mlx5_ifc_roce_addr_layout_bits {
2258 u8 source_l3_address[16][0x8];
2259
Matan Barakb4ff3a32016-02-09 14:57:42 +02002260 u8 reserved_at_80[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002261 u8 vlan_valid[0x1];
2262 u8 vlan_id[0xc];
2263 u8 source_mac_47_32[0x10];
2264
2265 u8 source_mac_31_0[0x20];
2266
Matan Barakb4ff3a32016-02-09 14:57:42 +02002267 u8 reserved_at_c0[0x14];
Saeed Mahameede2816822015-05-28 22:28:40 +03002268 u8 roce_l3_type[0x4];
2269 u8 roce_version[0x8];
2270
Matan Barakb4ff3a32016-02-09 14:57:42 +02002271 u8 reserved_at_e0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002272};
2273
2274union mlx5_ifc_hca_cap_union_bits {
2275 struct mlx5_ifc_cmd_hca_cap_bits cmd_hca_cap;
2276 struct mlx5_ifc_odp_cap_bits odp_cap;
2277 struct mlx5_ifc_atomic_caps_bits atomic_caps;
2278 struct mlx5_ifc_roce_cap_bits roce_cap;
2279 struct mlx5_ifc_per_protocol_networking_offload_caps_bits per_protocol_networking_offload_caps;
2280 struct mlx5_ifc_flow_table_nic_cap_bits flow_table_nic_cap;
Saeed Mahameed495716b2015-12-01 18:03:19 +02002281 struct mlx5_ifc_flow_table_eswitch_cap_bits flow_table_eswitch_cap;
Saeed Mahameedd6666752015-12-01 18:03:22 +02002282 struct mlx5_ifc_e_switch_cap_bits e_switch_cap;
Sagi Grimberg3f0393a2016-02-23 10:25:23 +02002283 struct mlx5_ifc_vector_calc_cap_bits vector_calc_cap;
Saeed Mahameed74862162016-06-09 15:11:34 +03002284 struct mlx5_ifc_qos_cap_bits qos_cap;
Ilan Tayarie29341f2017-03-13 20:05:45 +02002285 struct mlx5_ifc_fpga_cap_bits fpga_cap;
Matan Barakb4ff3a32016-02-09 14:57:42 +02002286 u8 reserved_at_0[0x8000];
Saeed Mahameede2816822015-05-28 22:28:40 +03002287};
2288
2289enum {
2290 MLX5_FLOW_CONTEXT_ACTION_ALLOW = 0x1,
2291 MLX5_FLOW_CONTEXT_ACTION_DROP = 0x2,
2292 MLX5_FLOW_CONTEXT_ACTION_FWD_DEST = 0x4,
Amir Vadai9dc0b282016-05-13 12:55:39 +00002293 MLX5_FLOW_CONTEXT_ACTION_COUNT = 0x8,
Hadar Hen Zion7adbde22016-08-03 15:08:33 +03002294 MLX5_FLOW_CONTEXT_ACTION_ENCAP = 0x10,
2295 MLX5_FLOW_CONTEXT_ACTION_DECAP = 0x20,
Or Gerlitz2a69cb92017-01-19 19:31:25 +02002296 MLX5_FLOW_CONTEXT_ACTION_MOD_HDR = 0x40,
Saeed Mahameede2816822015-05-28 22:28:40 +03002297};
2298
2299struct mlx5_ifc_flow_context_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002300 u8 reserved_at_0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002301
2302 u8 group_id[0x20];
2303
Matan Barakb4ff3a32016-02-09 14:57:42 +02002304 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002305 u8 flow_tag[0x18];
2306
Matan Barakb4ff3a32016-02-09 14:57:42 +02002307 u8 reserved_at_60[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03002308 u8 action[0x10];
2309
Matan Barakb4ff3a32016-02-09 14:57:42 +02002310 u8 reserved_at_80[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002311 u8 destination_list_size[0x18];
2312
Amir Vadai9dc0b282016-05-13 12:55:39 +00002313 u8 reserved_at_a0[0x8];
2314 u8 flow_counter_list_size[0x18];
2315
Hadar Hen Zion7adbde22016-08-03 15:08:33 +03002316 u8 encap_id[0x20];
2317
Or Gerlitz2a69cb92017-01-19 19:31:25 +02002318 u8 modify_header_id[0x20];
2319
2320 u8 reserved_at_100[0x100];
Saeed Mahameede2816822015-05-28 22:28:40 +03002321
2322 struct mlx5_ifc_fte_match_param_bits match_value;
2323
Matan Barakb4ff3a32016-02-09 14:57:42 +02002324 u8 reserved_at_1200[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03002325
Amir Vadai9dc0b282016-05-13 12:55:39 +00002326 union mlx5_ifc_dest_format_struct_flow_counter_list_auto_bits destination[0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002327};
2328
2329enum {
2330 MLX5_XRC_SRQC_STATE_GOOD = 0x0,
2331 MLX5_XRC_SRQC_STATE_ERROR = 0x1,
2332};
2333
2334struct mlx5_ifc_xrc_srqc_bits {
2335 u8 state[0x4];
2336 u8 log_xrc_srq_size[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002337 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002338
2339 u8 wq_signature[0x1];
2340 u8 cont_srq[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002341 u8 reserved_at_22[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002342 u8 rlky[0x1];
2343 u8 basic_cyclic_rcv_wqe[0x1];
2344 u8 log_rq_stride[0x3];
2345 u8 xrcd[0x18];
2346
2347 u8 page_offset[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002348 u8 reserved_at_46[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002349 u8 cqn[0x18];
2350
Matan Barakb4ff3a32016-02-09 14:57:42 +02002351 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002352
2353 u8 user_index_equal_xrc_srqn[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002354 u8 reserved_at_81[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002355 u8 log_page_size[0x6];
2356 u8 user_index[0x18];
2357
Matan Barakb4ff3a32016-02-09 14:57:42 +02002358 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002359
Matan Barakb4ff3a32016-02-09 14:57:42 +02002360 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002361 u8 pd[0x18];
2362
2363 u8 lwm[0x10];
2364 u8 wqe_cnt[0x10];
2365
Matan Barakb4ff3a32016-02-09 14:57:42 +02002366 u8 reserved_at_100[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03002367
2368 u8 db_record_addr_h[0x20];
2369
2370 u8 db_record_addr_l[0x1e];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002371 u8 reserved_at_17e[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002372
Matan Barakb4ff3a32016-02-09 14:57:42 +02002373 u8 reserved_at_180[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03002374};
2375
2376struct mlx5_ifc_traffic_counter_bits {
2377 u8 packets[0x40];
2378
2379 u8 octets[0x40];
2380};
2381
2382struct mlx5_ifc_tisc_bits {
Aviv Heller84df61e2016-05-10 13:47:50 +03002383 u8 strict_lag_tx_port_affinity[0x1];
2384 u8 reserved_at_1[0x3];
2385 u8 lag_tx_port_affinity[0x04];
2386
2387 u8 reserved_at_8[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002388 u8 prio[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002389 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03002390
Matan Barakb4ff3a32016-02-09 14:57:42 +02002391 u8 reserved_at_20[0x100];
Saeed Mahameede2816822015-05-28 22:28:40 +03002392
Matan Barakb4ff3a32016-02-09 14:57:42 +02002393 u8 reserved_at_120[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002394 u8 transport_domain[0x18];
2395
Erez Shitrit500a3d02017-04-13 06:36:51 +03002396 u8 reserved_at_140[0x8];
2397 u8 underlay_qpn[0x18];
2398 u8 reserved_at_160[0x3a0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002399};
2400
2401enum {
2402 MLX5_TIRC_DISP_TYPE_DIRECT = 0x0,
2403 MLX5_TIRC_DISP_TYPE_INDIRECT = 0x1,
2404};
2405
2406enum {
2407 MLX5_TIRC_LRO_ENABLE_MASK_IPV4_LRO = 0x1,
2408 MLX5_TIRC_LRO_ENABLE_MASK_IPV6_LRO = 0x2,
2409};
2410
2411enum {
Saeed Mahameed2be69672015-07-23 23:35:56 +03002412 MLX5_RX_HASH_FN_NONE = 0x0,
2413 MLX5_RX_HASH_FN_INVERTED_XOR8 = 0x1,
2414 MLX5_RX_HASH_FN_TOEPLITZ = 0x2,
Saeed Mahameede2816822015-05-28 22:28:40 +03002415};
2416
2417enum {
2418 MLX5_TIRC_SELF_LB_BLOCK_BLOCK_UNICAST_ = 0x1,
2419 MLX5_TIRC_SELF_LB_BLOCK_BLOCK_MULTICAST_ = 0x2,
2420};
2421
2422struct mlx5_ifc_tirc_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002423 u8 reserved_at_0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002424
2425 u8 disp_type[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002426 u8 reserved_at_24[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03002427
Matan Barakb4ff3a32016-02-09 14:57:42 +02002428 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03002429
Matan Barakb4ff3a32016-02-09 14:57:42 +02002430 u8 reserved_at_80[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002431 u8 lro_timeout_period_usecs[0x10];
2432 u8 lro_enable_mask[0x4];
2433 u8 lro_max_ip_payload_size[0x8];
2434
Matan Barakb4ff3a32016-02-09 14:57:42 +02002435 u8 reserved_at_a0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03002436
Matan Barakb4ff3a32016-02-09 14:57:42 +02002437 u8 reserved_at_e0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002438 u8 inline_rqn[0x18];
2439
2440 u8 rx_hash_symmetric[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002441 u8 reserved_at_101[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002442 u8 tunneled_offload_en[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002443 u8 reserved_at_103[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03002444 u8 indirect_table[0x18];
2445
2446 u8 rx_hash_fn[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002447 u8 reserved_at_124[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002448 u8 self_lb_block[0x2];
2449 u8 transport_domain[0x18];
2450
2451 u8 rx_hash_toeplitz_key[10][0x20];
2452
2453 struct mlx5_ifc_rx_hash_field_select_bits rx_hash_field_selector_outer;
2454
2455 struct mlx5_ifc_rx_hash_field_select_bits rx_hash_field_selector_inner;
2456
Matan Barakb4ff3a32016-02-09 14:57:42 +02002457 u8 reserved_at_2c0[0x4c0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002458};
2459
2460enum {
2461 MLX5_SRQC_STATE_GOOD = 0x0,
2462 MLX5_SRQC_STATE_ERROR = 0x1,
2463};
2464
2465struct mlx5_ifc_srqc_bits {
2466 u8 state[0x4];
2467 u8 log_srq_size[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002468 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002469
2470 u8 wq_signature[0x1];
2471 u8 cont_srq[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002472 u8 reserved_at_22[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002473 u8 rlky[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002474 u8 reserved_at_24[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002475 u8 log_rq_stride[0x3];
2476 u8 xrcd[0x18];
2477
2478 u8 page_offset[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002479 u8 reserved_at_46[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002480 u8 cqn[0x18];
2481
Matan Barakb4ff3a32016-02-09 14:57:42 +02002482 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002483
Matan Barakb4ff3a32016-02-09 14:57:42 +02002484 u8 reserved_at_80[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002485 u8 log_page_size[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002486 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002487
Matan Barakb4ff3a32016-02-09 14:57:42 +02002488 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002489
Matan Barakb4ff3a32016-02-09 14:57:42 +02002490 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002491 u8 pd[0x18];
2492
2493 u8 lwm[0x10];
2494 u8 wqe_cnt[0x10];
2495
Matan Barakb4ff3a32016-02-09 14:57:42 +02002496 u8 reserved_at_100[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03002497
Haggai Abramonvsky01949d02015-06-04 19:30:38 +03002498 u8 dbr_addr[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03002499
Matan Barakb4ff3a32016-02-09 14:57:42 +02002500 u8 reserved_at_180[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03002501};
2502
2503enum {
2504 MLX5_SQC_STATE_RST = 0x0,
2505 MLX5_SQC_STATE_RDY = 0x1,
2506 MLX5_SQC_STATE_ERR = 0x3,
2507};
2508
2509struct mlx5_ifc_sqc_bits {
2510 u8 rlky[0x1];
2511 u8 cd_master[0x1];
2512 u8 fre[0x1];
2513 u8 flush_in_error_en[0x1];
Bodong Wang795b6092017-08-17 15:52:34 +03002514 u8 allow_multi_pkt_send_wqe[0x1];
Hadar Hen Zioncff92d72016-07-24 16:12:40 +03002515 u8 min_wqe_inline_mode[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002516 u8 state[0x4];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03002517 u8 reg_umr[0x1];
Ilan Tayari547eede2017-04-18 16:04:28 +03002518 u8 allow_swp[0x1];
Or Gerlitz40817cd2017-06-25 12:38:45 +03002519 u8 hairpin[0x1];
2520 u8 reserved_at_f[0x11];
Saeed Mahameede2816822015-05-28 22:28:40 +03002521
Matan Barakb4ff3a32016-02-09 14:57:42 +02002522 u8 reserved_at_20[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002523 u8 user_index[0x18];
2524
Matan Barakb4ff3a32016-02-09 14:57:42 +02002525 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002526 u8 cqn[0x18];
2527
Or Gerlitz40817cd2017-06-25 12:38:45 +03002528 u8 reserved_at_60[0x8];
2529 u8 hairpin_peer_rq[0x18];
2530
2531 u8 reserved_at_80[0x10];
2532 u8 hairpin_peer_vhca[0x10];
2533
2534 u8 reserved_at_a0[0x50];
Saeed Mahameede2816822015-05-28 22:28:40 +03002535
Saeed Mahameed74862162016-06-09 15:11:34 +03002536 u8 packet_pacing_rate_limit_index[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03002537 u8 tis_lst_sz[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002538 u8 reserved_at_110[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03002539
Matan Barakb4ff3a32016-02-09 14:57:42 +02002540 u8 reserved_at_120[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03002541
Matan Barakb4ff3a32016-02-09 14:57:42 +02002542 u8 reserved_at_160[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002543 u8 tis_num_0[0x18];
2544
2545 struct mlx5_ifc_wq_bits wq;
2546};
2547
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +03002548enum {
2549 SCHEDULING_CONTEXT_ELEMENT_TYPE_TSAR = 0x0,
2550 SCHEDULING_CONTEXT_ELEMENT_TYPE_VPORT = 0x1,
2551 SCHEDULING_CONTEXT_ELEMENT_TYPE_VPORT_TC = 0x2,
2552 SCHEDULING_CONTEXT_ELEMENT_TYPE_PARA_VPORT_TC = 0x3,
2553};
2554
2555struct mlx5_ifc_scheduling_context_bits {
2556 u8 element_type[0x8];
2557 u8 reserved_at_8[0x18];
2558
2559 u8 element_attributes[0x20];
2560
2561 u8 parent_element_id[0x20];
2562
2563 u8 reserved_at_60[0x40];
2564
2565 u8 bw_share[0x20];
2566
2567 u8 max_average_bw[0x20];
2568
2569 u8 reserved_at_e0[0x120];
2570};
2571
Saeed Mahameede2816822015-05-28 22:28:40 +03002572struct mlx5_ifc_rqtc_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002573 u8 reserved_at_0[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002574
Matan Barakb4ff3a32016-02-09 14:57:42 +02002575 u8 reserved_at_a0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03002576 u8 rqt_max_size[0x10];
2577
Matan Barakb4ff3a32016-02-09 14:57:42 +02002578 u8 reserved_at_c0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03002579 u8 rqt_actual_size[0x10];
2580
Matan Barakb4ff3a32016-02-09 14:57:42 +02002581 u8 reserved_at_e0[0x6a0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002582
2583 struct mlx5_ifc_rq_num_bits rq_num[0];
2584};
2585
2586enum {
2587 MLX5_RQC_MEM_RQ_TYPE_MEMORY_RQ_INLINE = 0x0,
2588 MLX5_RQC_MEM_RQ_TYPE_MEMORY_RQ_RMP = 0x1,
2589};
2590
2591enum {
2592 MLX5_RQC_STATE_RST = 0x0,
2593 MLX5_RQC_STATE_RDY = 0x1,
2594 MLX5_RQC_STATE_ERR = 0x3,
2595};
2596
2597struct mlx5_ifc_rqc_bits {
2598 u8 rlky[0x1];
Maor Gottlieb03404e82017-05-30 10:29:13 +03002599 u8 delay_drop_en[0x1];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03002600 u8 scatter_fcs[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002601 u8 vsd[0x1];
2602 u8 mem_rq_type[0x4];
2603 u8 state[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002604 u8 reserved_at_c[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002605 u8 flush_in_error_en[0x1];
Or Gerlitz40817cd2017-06-25 12:38:45 +03002606 u8 hairpin[0x1];
2607 u8 reserved_at_f[0x11];
Saeed Mahameede2816822015-05-28 22:28:40 +03002608
Matan Barakb4ff3a32016-02-09 14:57:42 +02002609 u8 reserved_at_20[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002610 u8 user_index[0x18];
2611
Matan Barakb4ff3a32016-02-09 14:57:42 +02002612 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002613 u8 cqn[0x18];
2614
2615 u8 counter_set_id[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002616 u8 reserved_at_68[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002617
Matan Barakb4ff3a32016-02-09 14:57:42 +02002618 u8 reserved_at_80[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002619 u8 rmpn[0x18];
2620
Or Gerlitz40817cd2017-06-25 12:38:45 +03002621 u8 reserved_at_a0[0x8];
2622 u8 hairpin_peer_sq[0x18];
2623
2624 u8 reserved_at_c0[0x10];
2625 u8 hairpin_peer_vhca[0x10];
2626
2627 u8 reserved_at_e0[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002628
2629 struct mlx5_ifc_wq_bits wq;
2630};
2631
2632enum {
2633 MLX5_RMPC_STATE_RDY = 0x1,
2634 MLX5_RMPC_STATE_ERR = 0x3,
2635};
2636
2637struct mlx5_ifc_rmpc_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002638 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002639 u8 state[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002640 u8 reserved_at_c[0x14];
Saeed Mahameede2816822015-05-28 22:28:40 +03002641
2642 u8 basic_cyclic_rcv_wqe[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002643 u8 reserved_at_21[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03002644
Matan Barakb4ff3a32016-02-09 14:57:42 +02002645 u8 reserved_at_40[0x140];
Saeed Mahameede2816822015-05-28 22:28:40 +03002646
2647 struct mlx5_ifc_wq_bits wq;
2648};
2649
Saeed Mahameede2816822015-05-28 22:28:40 +03002650struct mlx5_ifc_nic_vport_context_bits {
Hadar Hen Zioncff92d72016-07-24 16:12:40 +03002651 u8 reserved_at_0[0x5];
2652 u8 min_wqe_inline_mode[0x3];
Huy Nguyenbded7472017-05-30 09:42:53 +03002653 u8 reserved_at_8[0x15];
2654 u8 disable_mc_local_lb[0x1];
2655 u8 disable_uc_local_lb[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002656 u8 roce_en[0x1];
2657
Saeed Mahameedd82b7312015-12-01 18:03:14 +02002658 u8 arm_change_event[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002659 u8 reserved_at_21[0x1a];
Saeed Mahameedd82b7312015-12-01 18:03:14 +02002660 u8 event_on_mtu[0x1];
2661 u8 event_on_promisc_change[0x1];
2662 u8 event_on_vlan_change[0x1];
2663 u8 event_on_mc_address_change[0x1];
2664 u8 event_on_uc_address_change[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002665
Daniel Jurgens32f69e42018-01-04 17:25:36 +02002666 u8 reserved_at_40[0xc];
2667
2668 u8 affiliation_criteria[0x4];
2669 u8 affiliated_vhca_id[0x10];
2670
2671 u8 reserved_at_60[0xd0];
Saeed Mahameedd82b7312015-12-01 18:03:14 +02002672
2673 u8 mtu[0x10];
2674
Achiad Shochat9efa7522015-12-23 18:47:20 +02002675 u8 system_image_guid[0x40];
2676 u8 port_guid[0x40];
2677 u8 node_guid[0x40];
2678
Matan Barakb4ff3a32016-02-09 14:57:42 +02002679 u8 reserved_at_200[0x140];
Achiad Shochat9efa7522015-12-23 18:47:20 +02002680 u8 qkey_violation_counter[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002681 u8 reserved_at_350[0x430];
Saeed Mahameedd82b7312015-12-01 18:03:14 +02002682
2683 u8 promisc_uc[0x1];
2684 u8 promisc_mc[0x1];
2685 u8 promisc_all[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002686 u8 reserved_at_783[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002687 u8 allowed_list_type[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002688 u8 reserved_at_788[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03002689 u8 allowed_list_size[0xc];
2690
2691 struct mlx5_ifc_mac_address_layout_bits permanent_address;
2692
Matan Barakb4ff3a32016-02-09 14:57:42 +02002693 u8 reserved_at_7e0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002694
2695 u8 current_uc_mac_address[0][0x40];
2696};
2697
2698enum {
2699 MLX5_MKC_ACCESS_MODE_PA = 0x0,
2700 MLX5_MKC_ACCESS_MODE_MTT = 0x1,
2701 MLX5_MKC_ACCESS_MODE_KLMS = 0x2,
Artemy Kovalyovbcda1ac2017-01-02 11:37:41 +02002702 MLX5_MKC_ACCESS_MODE_KSM = 0x3,
Saeed Mahameede2816822015-05-28 22:28:40 +03002703};
2704
2705struct mlx5_ifc_mkc_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002706 u8 reserved_at_0[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002707 u8 free[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002708 u8 reserved_at_2[0xd];
Saeed Mahameede2816822015-05-28 22:28:40 +03002709 u8 small_fence_on_rdma_read_response[0x1];
2710 u8 umr_en[0x1];
2711 u8 a[0x1];
2712 u8 rw[0x1];
2713 u8 rr[0x1];
2714 u8 lw[0x1];
2715 u8 lr[0x1];
2716 u8 access_mode[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002717 u8 reserved_at_18[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002718
2719 u8 qpn[0x18];
2720 u8 mkey_7_0[0x8];
2721
Matan Barakb4ff3a32016-02-09 14:57:42 +02002722 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002723
2724 u8 length64[0x1];
2725 u8 bsf_en[0x1];
2726 u8 sync_umr[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002727 u8 reserved_at_63[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002728 u8 expected_sigerr_count[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002729 u8 reserved_at_66[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002730 u8 en_rinval[0x1];
2731 u8 pd[0x18];
2732
2733 u8 start_addr[0x40];
2734
2735 u8 len[0x40];
2736
2737 u8 bsf_octword_size[0x20];
2738
Matan Barakb4ff3a32016-02-09 14:57:42 +02002739 u8 reserved_at_120[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03002740
2741 u8 translations_octword_size[0x20];
2742
Matan Barakb4ff3a32016-02-09 14:57:42 +02002743 u8 reserved_at_1c0[0x1b];
Saeed Mahameede2816822015-05-28 22:28:40 +03002744 u8 log_page_size[0x5];
2745
Matan Barakb4ff3a32016-02-09 14:57:42 +02002746 u8 reserved_at_1e0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002747};
2748
2749struct mlx5_ifc_pkey_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002750 u8 reserved_at_0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03002751 u8 pkey[0x10];
2752};
2753
2754struct mlx5_ifc_array128_auto_bits {
2755 u8 array128_auto[16][0x8];
2756};
2757
2758struct mlx5_ifc_hca_vport_context_bits {
2759 u8 field_select[0x20];
2760
Matan Barakb4ff3a32016-02-09 14:57:42 +02002761 u8 reserved_at_20[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002762
2763 u8 sm_virt_aware[0x1];
2764 u8 has_smi[0x1];
2765 u8 has_raw[0x1];
2766 u8 grh_required[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002767 u8 reserved_at_104[0xc];
Majd Dibbiny707c4602015-06-04 19:30:41 +03002768 u8 port_physical_state[0x4];
2769 u8 vport_state_policy[0x4];
2770 u8 port_state[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002771 u8 vport_state[0x4];
2772
Matan Barakb4ff3a32016-02-09 14:57:42 +02002773 u8 reserved_at_120[0x20];
Majd Dibbiny707c4602015-06-04 19:30:41 +03002774
2775 u8 system_image_guid[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03002776
2777 u8 port_guid[0x40];
2778
2779 u8 node_guid[0x40];
2780
2781 u8 cap_mask1[0x20];
2782
2783 u8 cap_mask1_field_select[0x20];
2784
2785 u8 cap_mask2[0x20];
2786
2787 u8 cap_mask2_field_select[0x20];
2788
Matan Barakb4ff3a32016-02-09 14:57:42 +02002789 u8 reserved_at_280[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03002790
2791 u8 lid[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002792 u8 reserved_at_310[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002793 u8 init_type_reply[0x4];
2794 u8 lmc[0x3];
2795 u8 subnet_timeout[0x5];
2796
2797 u8 sm_lid[0x10];
2798 u8 sm_sl[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002799 u8 reserved_at_334[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03002800
2801 u8 qkey_violation_counter[0x10];
2802 u8 pkey_violation_counter[0x10];
2803
Matan Barakb4ff3a32016-02-09 14:57:42 +02002804 u8 reserved_at_360[0xca0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002805};
2806
Saeed Mahameedd6666752015-12-01 18:03:22 +02002807struct mlx5_ifc_esw_vport_context_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002808 u8 reserved_at_0[0x3];
Saeed Mahameedd6666752015-12-01 18:03:22 +02002809 u8 vport_svlan_strip[0x1];
2810 u8 vport_cvlan_strip[0x1];
2811 u8 vport_svlan_insert[0x1];
2812 u8 vport_cvlan_insert[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002813 u8 reserved_at_8[0x18];
Saeed Mahameedd6666752015-12-01 18:03:22 +02002814
Matan Barakb4ff3a32016-02-09 14:57:42 +02002815 u8 reserved_at_20[0x20];
Saeed Mahameedd6666752015-12-01 18:03:22 +02002816
2817 u8 svlan_cfi[0x1];
2818 u8 svlan_pcp[0x3];
2819 u8 svlan_id[0xc];
2820 u8 cvlan_cfi[0x1];
2821 u8 cvlan_pcp[0x3];
2822 u8 cvlan_id[0xc];
2823
Matan Barakb4ff3a32016-02-09 14:57:42 +02002824 u8 reserved_at_60[0x7a0];
Saeed Mahameedd6666752015-12-01 18:03:22 +02002825};
2826
Saeed Mahameede2816822015-05-28 22:28:40 +03002827enum {
2828 MLX5_EQC_STATUS_OK = 0x0,
2829 MLX5_EQC_STATUS_EQ_WRITE_FAILURE = 0xa,
2830};
2831
2832enum {
2833 MLX5_EQC_ST_ARMED = 0x9,
2834 MLX5_EQC_ST_FIRED = 0xa,
2835};
2836
2837struct mlx5_ifc_eqc_bits {
2838 u8 status[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002839 u8 reserved_at_4[0x9];
Saeed Mahameede2816822015-05-28 22:28:40 +03002840 u8 ec[0x1];
2841 u8 oi[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002842 u8 reserved_at_f[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03002843 u8 st[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002844 u8 reserved_at_18[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002845
Matan Barakb4ff3a32016-02-09 14:57:42 +02002846 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002847
Matan Barakb4ff3a32016-02-09 14:57:42 +02002848 u8 reserved_at_40[0x14];
Saeed Mahameede2816822015-05-28 22:28:40 +03002849 u8 page_offset[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002850 u8 reserved_at_5a[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03002851
Matan Barakb4ff3a32016-02-09 14:57:42 +02002852 u8 reserved_at_60[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002853 u8 log_eq_size[0x5];
2854 u8 uar_page[0x18];
2855
Matan Barakb4ff3a32016-02-09 14:57:42 +02002856 u8 reserved_at_80[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002857
Matan Barakb4ff3a32016-02-09 14:57:42 +02002858 u8 reserved_at_a0[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002859 u8 intr[0x8];
2860
Matan Barakb4ff3a32016-02-09 14:57:42 +02002861 u8 reserved_at_c0[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002862 u8 log_page_size[0x5];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002863 u8 reserved_at_c8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002864
Matan Barakb4ff3a32016-02-09 14:57:42 +02002865 u8 reserved_at_e0[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03002866
Matan Barakb4ff3a32016-02-09 14:57:42 +02002867 u8 reserved_at_140[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002868 u8 consumer_counter[0x18];
2869
Matan Barakb4ff3a32016-02-09 14:57:42 +02002870 u8 reserved_at_160[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002871 u8 producer_counter[0x18];
2872
Matan Barakb4ff3a32016-02-09 14:57:42 +02002873 u8 reserved_at_180[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03002874};
2875
2876enum {
2877 MLX5_DCTC_STATE_ACTIVE = 0x0,
2878 MLX5_DCTC_STATE_DRAINING = 0x1,
2879 MLX5_DCTC_STATE_DRAINED = 0x2,
2880};
2881
2882enum {
2883 MLX5_DCTC_CS_RES_DISABLE = 0x0,
2884 MLX5_DCTC_CS_RES_NA = 0x1,
2885 MLX5_DCTC_CS_RES_UP_TO_64B = 0x2,
2886};
2887
2888enum {
2889 MLX5_DCTC_MTU_256_BYTES = 0x1,
2890 MLX5_DCTC_MTU_512_BYTES = 0x2,
2891 MLX5_DCTC_MTU_1K_BYTES = 0x3,
2892 MLX5_DCTC_MTU_2K_BYTES = 0x4,
2893 MLX5_DCTC_MTU_4K_BYTES = 0x5,
2894};
2895
2896struct mlx5_ifc_dctc_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002897 u8 reserved_at_0[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002898 u8 state[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002899 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002900
Matan Barakb4ff3a32016-02-09 14:57:42 +02002901 u8 reserved_at_20[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002902 u8 user_index[0x18];
2903
Matan Barakb4ff3a32016-02-09 14:57:42 +02002904 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002905 u8 cqn[0x18];
2906
2907 u8 counter_set_id[0x8];
2908 u8 atomic_mode[0x4];
2909 u8 rre[0x1];
2910 u8 rwe[0x1];
2911 u8 rae[0x1];
2912 u8 atomic_like_write_en[0x1];
2913 u8 latency_sensitive[0x1];
2914 u8 rlky[0x1];
2915 u8 free_ar[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002916 u8 reserved_at_73[0xd];
Saeed Mahameede2816822015-05-28 22:28:40 +03002917
Matan Barakb4ff3a32016-02-09 14:57:42 +02002918 u8 reserved_at_80[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002919 u8 cs_res[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002920 u8 reserved_at_90[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002921 u8 min_rnr_nak[0x5];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002922 u8 reserved_at_98[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002923
Matan Barakb4ff3a32016-02-09 14:57:42 +02002924 u8 reserved_at_a0[0x8];
Saeed Mahameed74862162016-06-09 15:11:34 +03002925 u8 srqn_xrqn[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002926
Matan Barakb4ff3a32016-02-09 14:57:42 +02002927 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002928 u8 pd[0x18];
2929
2930 u8 tclass[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002931 u8 reserved_at_e8[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002932 u8 flow_label[0x14];
2933
2934 u8 dc_access_key[0x40];
2935
Matan Barakb4ff3a32016-02-09 14:57:42 +02002936 u8 reserved_at_140[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03002937 u8 mtu[0x3];
2938 u8 port[0x8];
2939 u8 pkey_index[0x10];
2940
Matan Barakb4ff3a32016-02-09 14:57:42 +02002941 u8 reserved_at_160[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002942 u8 my_addr_index[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002943 u8 reserved_at_170[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002944 u8 hop_limit[0x8];
2945
2946 u8 dc_access_key_violation_count[0x20];
2947
Matan Barakb4ff3a32016-02-09 14:57:42 +02002948 u8 reserved_at_1a0[0x14];
Saeed Mahameede2816822015-05-28 22:28:40 +03002949 u8 dei_cfi[0x1];
2950 u8 eth_prio[0x3];
2951 u8 ecn[0x2];
2952 u8 dscp[0x6];
2953
Matan Barakb4ff3a32016-02-09 14:57:42 +02002954 u8 reserved_at_1c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03002955};
2956
2957enum {
2958 MLX5_CQC_STATUS_OK = 0x0,
2959 MLX5_CQC_STATUS_CQ_OVERFLOW = 0x9,
2960 MLX5_CQC_STATUS_CQ_WRITE_FAIL = 0xa,
2961};
2962
2963enum {
2964 MLX5_CQC_CQE_SZ_64_BYTES = 0x0,
2965 MLX5_CQC_CQE_SZ_128_BYTES = 0x1,
2966};
2967
2968enum {
2969 MLX5_CQC_ST_SOLICITED_NOTIFICATION_REQUEST_ARMED = 0x6,
2970 MLX5_CQC_ST_NOTIFICATION_REQUEST_ARMED = 0x9,
2971 MLX5_CQC_ST_FIRED = 0xa,
2972};
2973
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03002974enum {
2975 MLX5_CQ_PERIOD_MODE_START_FROM_EQE = 0x0,
2976 MLX5_CQ_PERIOD_MODE_START_FROM_CQE = 0x1,
Saeed Mahameed74862162016-06-09 15:11:34 +03002977 MLX5_CQ_PERIOD_NUM_MODES
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03002978};
2979
Saeed Mahameede2816822015-05-28 22:28:40 +03002980struct mlx5_ifc_cqc_bits {
2981 u8 status[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002982 u8 reserved_at_4[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002983 u8 cqe_sz[0x3];
2984 u8 cc[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002985 u8 reserved_at_c[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002986 u8 scqe_break_moderation_en[0x1];
2987 u8 oi[0x1];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03002988 u8 cq_period_mode[0x2];
2989 u8 cqe_comp_en[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002990 u8 mini_cqe_res_format[0x2];
2991 u8 st[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002992 u8 reserved_at_18[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002993
Matan Barakb4ff3a32016-02-09 14:57:42 +02002994 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002995
Matan Barakb4ff3a32016-02-09 14:57:42 +02002996 u8 reserved_at_40[0x14];
Saeed Mahameede2816822015-05-28 22:28:40 +03002997 u8 page_offset[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002998 u8 reserved_at_5a[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03002999
Matan Barakb4ff3a32016-02-09 14:57:42 +02003000 u8 reserved_at_60[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03003001 u8 log_cq_size[0x5];
3002 u8 uar_page[0x18];
3003
Matan Barakb4ff3a32016-02-09 14:57:42 +02003004 u8 reserved_at_80[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03003005 u8 cq_period[0xc];
3006 u8 cq_max_count[0x10];
3007
Matan Barakb4ff3a32016-02-09 14:57:42 +02003008 u8 reserved_at_a0[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003009 u8 c_eqn[0x8];
3010
Matan Barakb4ff3a32016-02-09 14:57:42 +02003011 u8 reserved_at_c0[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03003012 u8 log_page_size[0x5];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003013 u8 reserved_at_c8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003014
Matan Barakb4ff3a32016-02-09 14:57:42 +02003015 u8 reserved_at_e0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003016
Matan Barakb4ff3a32016-02-09 14:57:42 +02003017 u8 reserved_at_100[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003018 u8 last_notified_index[0x18];
3019
Matan Barakb4ff3a32016-02-09 14:57:42 +02003020 u8 reserved_at_120[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003021 u8 last_solicit_index[0x18];
3022
Matan Barakb4ff3a32016-02-09 14:57:42 +02003023 u8 reserved_at_140[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003024 u8 consumer_counter[0x18];
3025
Matan Barakb4ff3a32016-02-09 14:57:42 +02003026 u8 reserved_at_160[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003027 u8 producer_counter[0x18];
3028
Matan Barakb4ff3a32016-02-09 14:57:42 +02003029 u8 reserved_at_180[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003030
3031 u8 dbr_addr[0x40];
3032};
3033
3034union mlx5_ifc_cong_control_roce_ecn_auto_bits {
3035 struct mlx5_ifc_cong_control_802_1qau_rp_bits cong_control_802_1qau_rp;
3036 struct mlx5_ifc_cong_control_r_roce_ecn_rp_bits cong_control_r_roce_ecn_rp;
3037 struct mlx5_ifc_cong_control_r_roce_ecn_np_bits cong_control_r_roce_ecn_np;
Matan Barakb4ff3a32016-02-09 14:57:42 +02003038 u8 reserved_at_0[0x800];
Saeed Mahameede2816822015-05-28 22:28:40 +03003039};
3040
3041struct mlx5_ifc_query_adapter_param_block_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02003042 u8 reserved_at_0[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003043
Matan Barakb4ff3a32016-02-09 14:57:42 +02003044 u8 reserved_at_c0[0x8];
Majd Dibbiny211e6c82015-06-04 19:30:42 +03003045 u8 ieee_vendor_id[0x18];
3046
Matan Barakb4ff3a32016-02-09 14:57:42 +02003047 u8 reserved_at_e0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003048 u8 vsd_vendor_id[0x10];
3049
3050 u8 vsd[208][0x8];
3051
3052 u8 vsd_contd_psid[16][0x8];
3053};
3054
Saeed Mahameed74862162016-06-09 15:11:34 +03003055enum {
3056 MLX5_XRQC_STATE_GOOD = 0x0,
3057 MLX5_XRQC_STATE_ERROR = 0x1,
3058};
3059
3060enum {
3061 MLX5_XRQC_TOPOLOGY_NO_SPECIAL_TOPOLOGY = 0x0,
3062 MLX5_XRQC_TOPOLOGY_TAG_MATCHING = 0x1,
3063};
3064
3065enum {
3066 MLX5_XRQC_OFFLOAD_RNDV = 0x1,
3067};
3068
3069struct mlx5_ifc_tag_matching_topology_context_bits {
3070 u8 log_matching_list_sz[0x4];
3071 u8 reserved_at_4[0xc];
3072 u8 append_next_index[0x10];
3073
3074 u8 sw_phase_cnt[0x10];
3075 u8 hw_phase_cnt[0x10];
3076
3077 u8 reserved_at_40[0x40];
3078};
3079
3080struct mlx5_ifc_xrqc_bits {
3081 u8 state[0x4];
3082 u8 rlkey[0x1];
3083 u8 reserved_at_5[0xf];
3084 u8 topology[0x4];
3085 u8 reserved_at_18[0x4];
3086 u8 offload[0x4];
3087
3088 u8 reserved_at_20[0x8];
3089 u8 user_index[0x18];
3090
3091 u8 reserved_at_40[0x8];
3092 u8 cqn[0x18];
3093
3094 u8 reserved_at_60[0xa0];
3095
3096 struct mlx5_ifc_tag_matching_topology_context_bits tag_matching_topology_context;
3097
Artemy Kovalyov6e446362017-08-15 11:59:02 +03003098 u8 reserved_at_180[0x280];
Saeed Mahameed74862162016-06-09 15:11:34 +03003099
3100 struct mlx5_ifc_wq_bits wq;
3101};
3102
Saeed Mahameede2816822015-05-28 22:28:40 +03003103union mlx5_ifc_modify_field_select_resize_field_select_auto_bits {
3104 struct mlx5_ifc_modify_field_select_bits modify_field_select;
3105 struct mlx5_ifc_resize_field_select_bits resize_field_select;
Matan Barakb4ff3a32016-02-09 14:57:42 +02003106 u8 reserved_at_0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003107};
3108
3109union mlx5_ifc_field_select_802_1_r_roce_auto_bits {
3110 struct mlx5_ifc_field_select_802_1qau_rp_bits field_select_802_1qau_rp;
3111 struct mlx5_ifc_field_select_r_roce_rp_bits field_select_r_roce_rp;
3112 struct mlx5_ifc_field_select_r_roce_np_bits field_select_r_roce_np;
Matan Barakb4ff3a32016-02-09 14:57:42 +02003113 u8 reserved_at_0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003114};
3115
3116union mlx5_ifc_eth_cntrs_grp_data_layout_auto_bits {
3117 struct mlx5_ifc_eth_802_3_cntrs_grp_data_layout_bits eth_802_3_cntrs_grp_data_layout;
3118 struct mlx5_ifc_eth_2863_cntrs_grp_data_layout_bits eth_2863_cntrs_grp_data_layout;
3119 struct mlx5_ifc_eth_2819_cntrs_grp_data_layout_bits eth_2819_cntrs_grp_data_layout;
3120 struct mlx5_ifc_eth_3635_cntrs_grp_data_layout_bits eth_3635_cntrs_grp_data_layout;
3121 struct mlx5_ifc_eth_extended_cntrs_grp_data_layout_bits eth_extended_cntrs_grp_data_layout;
3122 struct mlx5_ifc_eth_per_prio_grp_data_layout_bits eth_per_prio_grp_data_layout;
3123 struct mlx5_ifc_eth_per_traffic_grp_data_layout_bits eth_per_traffic_grp_data_layout;
Meny Yossefi1c64bf62016-02-18 18:15:00 +02003124 struct mlx5_ifc_ib_port_cntrs_grp_data_layout_bits ib_port_cntrs_grp_data_layout;
Saeed Mahameede2816822015-05-28 22:28:40 +03003125 struct mlx5_ifc_phys_layer_cntrs_bits phys_layer_cntrs;
Gal Pressmand8dc0502016-09-27 17:04:51 +03003126 struct mlx5_ifc_phys_layer_statistical_cntrs_bits phys_layer_statistical_cntrs;
Matan Barakb4ff3a32016-02-09 14:57:42 +02003127 u8 reserved_at_0[0x7c0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003128};
3129
Gal Pressman8ed1a632016-11-17 13:46:01 +02003130union mlx5_ifc_pcie_cntrs_grp_data_layout_auto_bits {
3131 struct mlx5_ifc_pcie_perf_cntrs_grp_data_layout_bits pcie_perf_cntrs_grp_data_layout;
3132 u8 reserved_at_0[0x7c0];
3133};
3134
Saeed Mahameede2816822015-05-28 22:28:40 +03003135union mlx5_ifc_event_auto_bits {
3136 struct mlx5_ifc_comp_event_bits comp_event;
3137 struct mlx5_ifc_dct_events_bits dct_events;
3138 struct mlx5_ifc_qp_events_bits qp_events;
3139 struct mlx5_ifc_wqe_associated_page_fault_event_bits wqe_associated_page_fault_event;
3140 struct mlx5_ifc_rdma_page_fault_event_bits rdma_page_fault_event;
3141 struct mlx5_ifc_cq_error_bits cq_error;
3142 struct mlx5_ifc_dropped_packet_logged_bits dropped_packet_logged;
3143 struct mlx5_ifc_port_state_change_event_bits port_state_change_event;
3144 struct mlx5_ifc_gpio_event_bits gpio_event;
3145 struct mlx5_ifc_db_bf_congestion_event_bits db_bf_congestion_event;
3146 struct mlx5_ifc_stall_vl_event_bits stall_vl_event;
3147 struct mlx5_ifc_cmd_inter_comp_event_bits cmd_inter_comp_event;
Matan Barakb4ff3a32016-02-09 14:57:42 +02003148 u8 reserved_at_0[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003149};
3150
3151struct mlx5_ifc_health_buffer_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02003152 u8 reserved_at_0[0x100];
Saeed Mahameede2816822015-05-28 22:28:40 +03003153
3154 u8 assert_existptr[0x20];
3155
3156 u8 assert_callra[0x20];
3157
Matan Barakb4ff3a32016-02-09 14:57:42 +02003158 u8 reserved_at_140[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003159
3160 u8 fw_version[0x20];
3161
3162 u8 hw_id[0x20];
3163
Matan Barakb4ff3a32016-02-09 14:57:42 +02003164 u8 reserved_at_1c0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003165
3166 u8 irisc_index[0x8];
3167 u8 synd[0x8];
3168 u8 ext_synd[0x10];
3169};
3170
3171struct mlx5_ifc_register_loopback_control_bits {
3172 u8 no_lb[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003173 u8 reserved_at_1[0x7];
Saeed Mahameede2816822015-05-28 22:28:40 +03003174 u8 port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003175 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003176
Matan Barakb4ff3a32016-02-09 14:57:42 +02003177 u8 reserved_at_20[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03003178};
3179
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +03003180struct mlx5_ifc_vport_tc_element_bits {
3181 u8 traffic_class[0x4];
3182 u8 reserved_at_4[0xc];
3183 u8 vport_number[0x10];
3184};
3185
3186struct mlx5_ifc_vport_element_bits {
3187 u8 reserved_at_0[0x10];
3188 u8 vport_number[0x10];
3189};
3190
3191enum {
3192 TSAR_ELEMENT_TSAR_TYPE_DWRR = 0x0,
3193 TSAR_ELEMENT_TSAR_TYPE_ROUND_ROBIN = 0x1,
3194 TSAR_ELEMENT_TSAR_TYPE_ETS = 0x2,
3195};
3196
3197struct mlx5_ifc_tsar_element_bits {
3198 u8 reserved_at_0[0x8];
3199 u8 tsar_type[0x8];
3200 u8 reserved_at_10[0x10];
3201};
3202
Majd Dibbiny8812c242017-02-09 14:20:12 +02003203enum {
3204 MLX5_TEARDOWN_HCA_OUT_FORCE_STATE_SUCCESS = 0x0,
3205 MLX5_TEARDOWN_HCA_OUT_FORCE_STATE_FAIL = 0x1,
3206};
3207
Saeed Mahameede2816822015-05-28 22:28:40 +03003208struct mlx5_ifc_teardown_hca_out_bits {
3209 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003210 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003211
3212 u8 syndrome[0x20];
3213
Majd Dibbiny8812c242017-02-09 14:20:12 +02003214 u8 reserved_at_40[0x3f];
3215
3216 u8 force_state[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03003217};
3218
3219enum {
3220 MLX5_TEARDOWN_HCA_IN_PROFILE_GRACEFUL_CLOSE = 0x0,
Majd Dibbiny8812c242017-02-09 14:20:12 +02003221 MLX5_TEARDOWN_HCA_IN_PROFILE_FORCE_CLOSE = 0x1,
Saeed Mahameede2816822015-05-28 22:28:40 +03003222};
3223
3224struct mlx5_ifc_teardown_hca_in_bits {
3225 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003226 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003227
Matan Barakb4ff3a32016-02-09 14:57:42 +02003228 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003229 u8 op_mod[0x10];
3230
Matan Barakb4ff3a32016-02-09 14:57:42 +02003231 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003232 u8 profile[0x10];
3233
Matan Barakb4ff3a32016-02-09 14:57:42 +02003234 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003235};
3236
3237struct mlx5_ifc_sqerr2rts_qp_out_bits {
3238 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003239 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003240
3241 u8 syndrome[0x20];
3242
Matan Barakb4ff3a32016-02-09 14:57:42 +02003243 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003244};
3245
3246struct mlx5_ifc_sqerr2rts_qp_in_bits {
3247 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003248 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003249
Matan Barakb4ff3a32016-02-09 14:57:42 +02003250 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003251 u8 op_mod[0x10];
3252
Matan Barakb4ff3a32016-02-09 14:57:42 +02003253 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003254 u8 qpn[0x18];
3255
Matan Barakb4ff3a32016-02-09 14:57:42 +02003256 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003257
3258 u8 opt_param_mask[0x20];
3259
Matan Barakb4ff3a32016-02-09 14:57:42 +02003260 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003261
3262 struct mlx5_ifc_qpc_bits qpc;
3263
Matan Barakb4ff3a32016-02-09 14:57:42 +02003264 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03003265};
3266
3267struct mlx5_ifc_sqd2rts_qp_out_bits {
3268 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003269 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003270
3271 u8 syndrome[0x20];
3272
Matan Barakb4ff3a32016-02-09 14:57:42 +02003273 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003274};
3275
3276struct mlx5_ifc_sqd2rts_qp_in_bits {
3277 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003278 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003279
Matan Barakb4ff3a32016-02-09 14:57:42 +02003280 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003281 u8 op_mod[0x10];
3282
Matan Barakb4ff3a32016-02-09 14:57:42 +02003283 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003284 u8 qpn[0x18];
3285
Matan Barakb4ff3a32016-02-09 14:57:42 +02003286 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003287
3288 u8 opt_param_mask[0x20];
3289
Matan Barakb4ff3a32016-02-09 14:57:42 +02003290 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003291
3292 struct mlx5_ifc_qpc_bits qpc;
3293
Matan Barakb4ff3a32016-02-09 14:57:42 +02003294 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03003295};
3296
3297struct mlx5_ifc_set_roce_address_out_bits {
3298 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003299 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003300
3301 u8 syndrome[0x20];
3302
Matan Barakb4ff3a32016-02-09 14:57:42 +02003303 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003304};
3305
3306struct mlx5_ifc_set_roce_address_in_bits {
3307 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003308 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003309
Matan Barakb4ff3a32016-02-09 14:57:42 +02003310 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003311 u8 op_mod[0x10];
3312
3313 u8 roce_address_index[0x10];
Daniel Jurgens32f69e42018-01-04 17:25:36 +02003314 u8 reserved_at_50[0xc];
3315 u8 vhca_port_num[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03003316
Matan Barakb4ff3a32016-02-09 14:57:42 +02003317 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003318
3319 struct mlx5_ifc_roce_addr_layout_bits roce_address;
3320};
3321
3322struct mlx5_ifc_set_mad_demux_out_bits {
3323 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003324 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003325
3326 u8 syndrome[0x20];
3327
Matan Barakb4ff3a32016-02-09 14:57:42 +02003328 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003329};
3330
3331enum {
3332 MLX5_SET_MAD_DEMUX_IN_DEMUX_MODE_PASS_ALL = 0x0,
3333 MLX5_SET_MAD_DEMUX_IN_DEMUX_MODE_SELECTIVE = 0x2,
3334};
3335
3336struct mlx5_ifc_set_mad_demux_in_bits {
3337 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003338 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003339
Matan Barakb4ff3a32016-02-09 14:57:42 +02003340 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003341 u8 op_mod[0x10];
3342
Matan Barakb4ff3a32016-02-09 14:57:42 +02003343 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003344
Matan Barakb4ff3a32016-02-09 14:57:42 +02003345 u8 reserved_at_60[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03003346 u8 demux_mode[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003347 u8 reserved_at_68[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003348};
3349
3350struct mlx5_ifc_set_l2_table_entry_out_bits {
3351 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003352 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003353
3354 u8 syndrome[0x20];
3355
Matan Barakb4ff3a32016-02-09 14:57:42 +02003356 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003357};
3358
3359struct mlx5_ifc_set_l2_table_entry_in_bits {
3360 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003361 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003362
Matan Barakb4ff3a32016-02-09 14:57:42 +02003363 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003364 u8 op_mod[0x10];
3365
Matan Barakb4ff3a32016-02-09 14:57:42 +02003366 u8 reserved_at_40[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03003367
Matan Barakb4ff3a32016-02-09 14:57:42 +02003368 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003369 u8 table_index[0x18];
3370
Matan Barakb4ff3a32016-02-09 14:57:42 +02003371 u8 reserved_at_c0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003372
Matan Barakb4ff3a32016-02-09 14:57:42 +02003373 u8 reserved_at_e0[0x13];
Saeed Mahameede2816822015-05-28 22:28:40 +03003374 u8 vlan_valid[0x1];
3375 u8 vlan[0xc];
3376
3377 struct mlx5_ifc_mac_address_layout_bits mac_address;
3378
Matan Barakb4ff3a32016-02-09 14:57:42 +02003379 u8 reserved_at_140[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003380};
3381
3382struct mlx5_ifc_set_issi_out_bits {
3383 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003384 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003385
3386 u8 syndrome[0x20];
3387
Matan Barakb4ff3a32016-02-09 14:57:42 +02003388 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003389};
3390
3391struct mlx5_ifc_set_issi_in_bits {
3392 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003393 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003394
Matan Barakb4ff3a32016-02-09 14:57:42 +02003395 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003396 u8 op_mod[0x10];
3397
Matan Barakb4ff3a32016-02-09 14:57:42 +02003398 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003399 u8 current_issi[0x10];
3400
Matan Barakb4ff3a32016-02-09 14:57:42 +02003401 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003402};
3403
3404struct mlx5_ifc_set_hca_cap_out_bits {
3405 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003406 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003407
3408 u8 syndrome[0x20];
3409
Matan Barakb4ff3a32016-02-09 14:57:42 +02003410 u8 reserved_at_40[0x40];
Eli Cohenb7755162014-10-02 12:19:44 +03003411};
3412
3413struct mlx5_ifc_set_hca_cap_in_bits {
3414 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003415 u8 reserved_at_10[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +03003416
Matan Barakb4ff3a32016-02-09 14:57:42 +02003417 u8 reserved_at_20[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +03003418 u8 op_mod[0x10];
3419
Matan Barakb4ff3a32016-02-09 14:57:42 +02003420 u8 reserved_at_40[0x40];
Eli Cohenb7755162014-10-02 12:19:44 +03003421
Saeed Mahameede2816822015-05-28 22:28:40 +03003422 union mlx5_ifc_hca_cap_union_bits capability;
3423};
3424
Maor Gottlieb26a81452015-12-10 17:12:39 +02003425enum {
3426 MLX5_SET_FTE_MODIFY_ENABLE_MASK_ACTION = 0x0,
3427 MLX5_SET_FTE_MODIFY_ENABLE_MASK_FLOW_TAG = 0x1,
3428 MLX5_SET_FTE_MODIFY_ENABLE_MASK_DESTINATION_LIST = 0x2,
3429 MLX5_SET_FTE_MODIFY_ENABLE_MASK_FLOW_COUNTERS = 0x3
3430};
3431
Saeed Mahameede2816822015-05-28 22:28:40 +03003432struct mlx5_ifc_set_fte_out_bits {
3433 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003434 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003435
3436 u8 syndrome[0x20];
3437
Matan Barakb4ff3a32016-02-09 14:57:42 +02003438 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003439};
3440
3441struct mlx5_ifc_set_fte_in_bits {
3442 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003443 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003444
Matan Barakb4ff3a32016-02-09 14:57:42 +02003445 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003446 u8 op_mod[0x10];
3447
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03003448 u8 other_vport[0x1];
3449 u8 reserved_at_41[0xf];
3450 u8 vport_number[0x10];
3451
3452 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003453
3454 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003455 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003456
Matan Barakb4ff3a32016-02-09 14:57:42 +02003457 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003458 u8 table_id[0x18];
3459
Matan Barakb4ff3a32016-02-09 14:57:42 +02003460 u8 reserved_at_c0[0x18];
Maor Gottlieb26a81452015-12-10 17:12:39 +02003461 u8 modify_enable_mask[0x8];
3462
Matan Barakb4ff3a32016-02-09 14:57:42 +02003463 u8 reserved_at_e0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003464
3465 u8 flow_index[0x20];
3466
Matan Barakb4ff3a32016-02-09 14:57:42 +02003467 u8 reserved_at_120[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003468
3469 struct mlx5_ifc_flow_context_bits flow_context;
3470};
3471
3472struct mlx5_ifc_rts2rts_qp_out_bits {
3473 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003474 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003475
3476 u8 syndrome[0x20];
3477
Matan Barakb4ff3a32016-02-09 14:57:42 +02003478 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003479};
3480
3481struct mlx5_ifc_rts2rts_qp_in_bits {
3482 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003483 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003484
Matan Barakb4ff3a32016-02-09 14:57:42 +02003485 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003486 u8 op_mod[0x10];
3487
Matan Barakb4ff3a32016-02-09 14:57:42 +02003488 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003489 u8 qpn[0x18];
3490
Matan Barakb4ff3a32016-02-09 14:57:42 +02003491 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003492
3493 u8 opt_param_mask[0x20];
3494
Matan Barakb4ff3a32016-02-09 14:57:42 +02003495 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003496
3497 struct mlx5_ifc_qpc_bits qpc;
3498
Matan Barakb4ff3a32016-02-09 14:57:42 +02003499 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03003500};
3501
3502struct mlx5_ifc_rtr2rts_qp_out_bits {
3503 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003504 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003505
3506 u8 syndrome[0x20];
3507
Matan Barakb4ff3a32016-02-09 14:57:42 +02003508 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003509};
3510
3511struct mlx5_ifc_rtr2rts_qp_in_bits {
3512 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003513 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003514
Matan Barakb4ff3a32016-02-09 14:57:42 +02003515 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003516 u8 op_mod[0x10];
3517
Matan Barakb4ff3a32016-02-09 14:57:42 +02003518 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003519 u8 qpn[0x18];
3520
Matan Barakb4ff3a32016-02-09 14:57:42 +02003521 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003522
3523 u8 opt_param_mask[0x20];
3524
Matan Barakb4ff3a32016-02-09 14:57:42 +02003525 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003526
3527 struct mlx5_ifc_qpc_bits qpc;
3528
Matan Barakb4ff3a32016-02-09 14:57:42 +02003529 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03003530};
3531
3532struct mlx5_ifc_rst2init_qp_out_bits {
3533 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003534 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003535
3536 u8 syndrome[0x20];
3537
Matan Barakb4ff3a32016-02-09 14:57:42 +02003538 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003539};
3540
3541struct mlx5_ifc_rst2init_qp_in_bits {
3542 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003543 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003544
Matan Barakb4ff3a32016-02-09 14:57:42 +02003545 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003546 u8 op_mod[0x10];
3547
Matan Barakb4ff3a32016-02-09 14:57:42 +02003548 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003549 u8 qpn[0x18];
3550
Matan Barakb4ff3a32016-02-09 14:57:42 +02003551 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003552
3553 u8 opt_param_mask[0x20];
3554
Matan Barakb4ff3a32016-02-09 14:57:42 +02003555 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003556
3557 struct mlx5_ifc_qpc_bits qpc;
3558
Matan Barakb4ff3a32016-02-09 14:57:42 +02003559 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03003560};
3561
Saeed Mahameed74862162016-06-09 15:11:34 +03003562struct mlx5_ifc_query_xrq_out_bits {
3563 u8 status[0x8];
3564 u8 reserved_at_8[0x18];
3565
3566 u8 syndrome[0x20];
3567
3568 u8 reserved_at_40[0x40];
3569
3570 struct mlx5_ifc_xrqc_bits xrq_context;
3571};
3572
3573struct mlx5_ifc_query_xrq_in_bits {
3574 u8 opcode[0x10];
3575 u8 reserved_at_10[0x10];
3576
3577 u8 reserved_at_20[0x10];
3578 u8 op_mod[0x10];
3579
3580 u8 reserved_at_40[0x8];
3581 u8 xrqn[0x18];
3582
3583 u8 reserved_at_60[0x20];
3584};
3585
Saeed Mahameede2816822015-05-28 22:28:40 +03003586struct mlx5_ifc_query_xrc_srq_out_bits {
3587 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003588 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003589
3590 u8 syndrome[0x20];
3591
Matan Barakb4ff3a32016-02-09 14:57:42 +02003592 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003593
3594 struct mlx5_ifc_xrc_srqc_bits xrc_srq_context_entry;
3595
Matan Barakb4ff3a32016-02-09 14:57:42 +02003596 u8 reserved_at_280[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03003597
3598 u8 pas[0][0x40];
3599};
3600
3601struct mlx5_ifc_query_xrc_srq_in_bits {
3602 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003603 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003604
Matan Barakb4ff3a32016-02-09 14:57:42 +02003605 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003606 u8 op_mod[0x10];
3607
Matan Barakb4ff3a32016-02-09 14:57:42 +02003608 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003609 u8 xrc_srqn[0x18];
3610
Matan Barakb4ff3a32016-02-09 14:57:42 +02003611 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003612};
3613
3614enum {
3615 MLX5_QUERY_VPORT_STATE_OUT_STATE_DOWN = 0x0,
3616 MLX5_QUERY_VPORT_STATE_OUT_STATE_UP = 0x1,
3617};
3618
3619struct mlx5_ifc_query_vport_state_out_bits {
3620 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003621 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003622
3623 u8 syndrome[0x20];
3624
Matan Barakb4ff3a32016-02-09 14:57:42 +02003625 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003626
Matan Barakb4ff3a32016-02-09 14:57:42 +02003627 u8 reserved_at_60[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003628 u8 admin_state[0x4];
3629 u8 state[0x4];
3630};
3631
3632enum {
3633 MLX5_QUERY_VPORT_STATE_IN_OP_MOD_VNIC_VPORT = 0x0,
Saeed Mahameede7546512015-12-01 18:03:13 +02003634 MLX5_QUERY_VPORT_STATE_IN_OP_MOD_ESW_VPORT = 0x1,
Saeed Mahameede2816822015-05-28 22:28:40 +03003635};
3636
3637struct mlx5_ifc_query_vport_state_in_bits {
3638 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003639 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003640
Matan Barakb4ff3a32016-02-09 14:57:42 +02003641 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003642 u8 op_mod[0x10];
3643
3644 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003645 u8 reserved_at_41[0xf];
Saeed Mahameede2816822015-05-28 22:28:40 +03003646 u8 vport_number[0x10];
3647
Matan Barakb4ff3a32016-02-09 14:57:42 +02003648 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003649};
3650
3651struct mlx5_ifc_query_vport_counter_out_bits {
3652 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003653 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003654
3655 u8 syndrome[0x20];
3656
Matan Barakb4ff3a32016-02-09 14:57:42 +02003657 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003658
3659 struct mlx5_ifc_traffic_counter_bits received_errors;
3660
3661 struct mlx5_ifc_traffic_counter_bits transmit_errors;
3662
3663 struct mlx5_ifc_traffic_counter_bits received_ib_unicast;
3664
3665 struct mlx5_ifc_traffic_counter_bits transmitted_ib_unicast;
3666
3667 struct mlx5_ifc_traffic_counter_bits received_ib_multicast;
3668
3669 struct mlx5_ifc_traffic_counter_bits transmitted_ib_multicast;
3670
3671 struct mlx5_ifc_traffic_counter_bits received_eth_broadcast;
3672
3673 struct mlx5_ifc_traffic_counter_bits transmitted_eth_broadcast;
3674
3675 struct mlx5_ifc_traffic_counter_bits received_eth_unicast;
3676
3677 struct mlx5_ifc_traffic_counter_bits transmitted_eth_unicast;
3678
3679 struct mlx5_ifc_traffic_counter_bits received_eth_multicast;
3680
3681 struct mlx5_ifc_traffic_counter_bits transmitted_eth_multicast;
3682
Matan Barakb4ff3a32016-02-09 14:57:42 +02003683 u8 reserved_at_680[0xa00];
Saeed Mahameede2816822015-05-28 22:28:40 +03003684};
3685
3686enum {
3687 MLX5_QUERY_VPORT_COUNTER_IN_OP_MOD_VPORT_COUNTERS = 0x0,
3688};
3689
3690struct mlx5_ifc_query_vport_counter_in_bits {
3691 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003692 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003693
Matan Barakb4ff3a32016-02-09 14:57:42 +02003694 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003695 u8 op_mod[0x10];
3696
3697 u8 other_vport[0x1];
Meny Yossefib54ba272016-02-18 18:14:59 +02003698 u8 reserved_at_41[0xb];
3699 u8 port_num[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03003700 u8 vport_number[0x10];
3701
Matan Barakb4ff3a32016-02-09 14:57:42 +02003702 u8 reserved_at_60[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03003703
3704 u8 clear[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003705 u8 reserved_at_c1[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03003706
Matan Barakb4ff3a32016-02-09 14:57:42 +02003707 u8 reserved_at_e0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003708};
3709
3710struct mlx5_ifc_query_tis_out_bits {
3711 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003712 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003713
3714 u8 syndrome[0x20];
3715
Matan Barakb4ff3a32016-02-09 14:57:42 +02003716 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003717
3718 struct mlx5_ifc_tisc_bits tis_context;
3719};
3720
3721struct mlx5_ifc_query_tis_in_bits {
3722 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003723 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003724
Matan Barakb4ff3a32016-02-09 14:57:42 +02003725 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003726 u8 op_mod[0x10];
3727
Matan Barakb4ff3a32016-02-09 14:57:42 +02003728 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003729 u8 tisn[0x18];
3730
Matan Barakb4ff3a32016-02-09 14:57:42 +02003731 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003732};
3733
3734struct mlx5_ifc_query_tir_out_bits {
3735 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003736 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003737
3738 u8 syndrome[0x20];
3739
Matan Barakb4ff3a32016-02-09 14:57:42 +02003740 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003741
3742 struct mlx5_ifc_tirc_bits tir_context;
3743};
3744
3745struct mlx5_ifc_query_tir_in_bits {
3746 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003747 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003748
Matan Barakb4ff3a32016-02-09 14:57:42 +02003749 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003750 u8 op_mod[0x10];
3751
Matan Barakb4ff3a32016-02-09 14:57:42 +02003752 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003753 u8 tirn[0x18];
3754
Matan Barakb4ff3a32016-02-09 14:57:42 +02003755 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003756};
3757
3758struct mlx5_ifc_query_srq_out_bits {
3759 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003760 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003761
3762 u8 syndrome[0x20];
3763
Matan Barakb4ff3a32016-02-09 14:57:42 +02003764 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003765
3766 struct mlx5_ifc_srqc_bits srq_context_entry;
3767
Matan Barakb4ff3a32016-02-09 14:57:42 +02003768 u8 reserved_at_280[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03003769
3770 u8 pas[0][0x40];
3771};
3772
3773struct mlx5_ifc_query_srq_in_bits {
3774 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003775 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003776
Matan Barakb4ff3a32016-02-09 14:57:42 +02003777 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003778 u8 op_mod[0x10];
3779
Matan Barakb4ff3a32016-02-09 14:57:42 +02003780 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003781 u8 srqn[0x18];
3782
Matan Barakb4ff3a32016-02-09 14:57:42 +02003783 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003784};
3785
3786struct mlx5_ifc_query_sq_out_bits {
3787 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003788 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003789
3790 u8 syndrome[0x20];
3791
Matan Barakb4ff3a32016-02-09 14:57:42 +02003792 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003793
3794 struct mlx5_ifc_sqc_bits sq_context;
3795};
3796
3797struct mlx5_ifc_query_sq_in_bits {
3798 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003799 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003800
Matan Barakb4ff3a32016-02-09 14:57:42 +02003801 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003802 u8 op_mod[0x10];
3803
Matan Barakb4ff3a32016-02-09 14:57:42 +02003804 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003805 u8 sqn[0x18];
3806
Matan Barakb4ff3a32016-02-09 14:57:42 +02003807 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003808};
3809
3810struct mlx5_ifc_query_special_contexts_out_bits {
3811 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003812 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003813
3814 u8 syndrome[0x20];
3815
Saeed Mahameedec22eb52016-07-16 06:28:36 +03003816 u8 dump_fill_mkey[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003817
3818 u8 resd_lkey[0x20];
Artemy Kovalyovbcda1ac2017-01-02 11:37:41 +02003819
3820 u8 null_mkey[0x20];
3821
3822 u8 reserved_at_a0[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03003823};
3824
3825struct mlx5_ifc_query_special_contexts_in_bits {
3826 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003827 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003828
Matan Barakb4ff3a32016-02-09 14:57:42 +02003829 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003830 u8 op_mod[0x10];
3831
Matan Barakb4ff3a32016-02-09 14:57:42 +02003832 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003833};
3834
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +03003835struct mlx5_ifc_query_scheduling_element_out_bits {
3836 u8 opcode[0x10];
3837 u8 reserved_at_10[0x10];
3838
3839 u8 reserved_at_20[0x10];
3840 u8 op_mod[0x10];
3841
3842 u8 reserved_at_40[0xc0];
3843
3844 struct mlx5_ifc_scheduling_context_bits scheduling_context;
3845
3846 u8 reserved_at_300[0x100];
3847};
3848
3849enum {
3850 SCHEDULING_HIERARCHY_E_SWITCH = 0x2,
3851};
3852
3853struct mlx5_ifc_query_scheduling_element_in_bits {
3854 u8 opcode[0x10];
3855 u8 reserved_at_10[0x10];
3856
3857 u8 reserved_at_20[0x10];
3858 u8 op_mod[0x10];
3859
3860 u8 scheduling_hierarchy[0x8];
3861 u8 reserved_at_48[0x18];
3862
3863 u8 scheduling_element_id[0x20];
3864
3865 u8 reserved_at_80[0x180];
3866};
3867
Saeed Mahameede2816822015-05-28 22:28:40 +03003868struct mlx5_ifc_query_rqt_out_bits {
3869 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003870 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003871
3872 u8 syndrome[0x20];
3873
Matan Barakb4ff3a32016-02-09 14:57:42 +02003874 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003875
3876 struct mlx5_ifc_rqtc_bits rqt_context;
3877};
3878
3879struct mlx5_ifc_query_rqt_in_bits {
3880 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003881 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003882
Matan Barakb4ff3a32016-02-09 14:57:42 +02003883 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003884 u8 op_mod[0x10];
3885
Matan Barakb4ff3a32016-02-09 14:57:42 +02003886 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003887 u8 rqtn[0x18];
3888
Matan Barakb4ff3a32016-02-09 14:57:42 +02003889 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003890};
3891
3892struct mlx5_ifc_query_rq_out_bits {
3893 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003894 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003895
3896 u8 syndrome[0x20];
3897
Matan Barakb4ff3a32016-02-09 14:57:42 +02003898 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003899
3900 struct mlx5_ifc_rqc_bits rq_context;
3901};
3902
3903struct mlx5_ifc_query_rq_in_bits {
3904 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003905 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003906
Matan Barakb4ff3a32016-02-09 14:57:42 +02003907 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003908 u8 op_mod[0x10];
3909
Matan Barakb4ff3a32016-02-09 14:57:42 +02003910 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003911 u8 rqn[0x18];
3912
Matan Barakb4ff3a32016-02-09 14:57:42 +02003913 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003914};
3915
3916struct mlx5_ifc_query_roce_address_out_bits {
3917 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003918 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003919
3920 u8 syndrome[0x20];
3921
Matan Barakb4ff3a32016-02-09 14:57:42 +02003922 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003923
3924 struct mlx5_ifc_roce_addr_layout_bits roce_address;
3925};
3926
3927struct mlx5_ifc_query_roce_address_in_bits {
3928 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003929 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003930
Matan Barakb4ff3a32016-02-09 14:57:42 +02003931 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003932 u8 op_mod[0x10];
3933
3934 u8 roce_address_index[0x10];
Daniel Jurgens32f69e42018-01-04 17:25:36 +02003935 u8 reserved_at_50[0xc];
3936 u8 vhca_port_num[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03003937
Matan Barakb4ff3a32016-02-09 14:57:42 +02003938 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003939};
3940
3941struct mlx5_ifc_query_rmp_out_bits {
3942 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003943 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003944
3945 u8 syndrome[0x20];
3946
Matan Barakb4ff3a32016-02-09 14:57:42 +02003947 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003948
3949 struct mlx5_ifc_rmpc_bits rmp_context;
3950};
3951
3952struct mlx5_ifc_query_rmp_in_bits {
3953 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003954 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003955
Matan Barakb4ff3a32016-02-09 14:57:42 +02003956 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003957 u8 op_mod[0x10];
3958
Matan Barakb4ff3a32016-02-09 14:57:42 +02003959 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003960 u8 rmpn[0x18];
3961
Matan Barakb4ff3a32016-02-09 14:57:42 +02003962 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003963};
3964
3965struct mlx5_ifc_query_qp_out_bits {
3966 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003967 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003968
3969 u8 syndrome[0x20];
3970
Matan Barakb4ff3a32016-02-09 14:57:42 +02003971 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003972
3973 u8 opt_param_mask[0x20];
3974
Matan Barakb4ff3a32016-02-09 14:57:42 +02003975 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003976
3977 struct mlx5_ifc_qpc_bits qpc;
3978
Matan Barakb4ff3a32016-02-09 14:57:42 +02003979 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03003980
3981 u8 pas[0][0x40];
3982};
3983
3984struct mlx5_ifc_query_qp_in_bits {
3985 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003986 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003987
Matan Barakb4ff3a32016-02-09 14:57:42 +02003988 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003989 u8 op_mod[0x10];
3990
Matan Barakb4ff3a32016-02-09 14:57:42 +02003991 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003992 u8 qpn[0x18];
3993
Matan Barakb4ff3a32016-02-09 14:57:42 +02003994 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003995};
3996
3997struct mlx5_ifc_query_q_counter_out_bits {
3998 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003999 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004000
4001 u8 syndrome[0x20];
4002
Matan Barakb4ff3a32016-02-09 14:57:42 +02004003 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004004
4005 u8 rx_write_requests[0x20];
4006
Matan Barakb4ff3a32016-02-09 14:57:42 +02004007 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004008
4009 u8 rx_read_requests[0x20];
4010
Matan Barakb4ff3a32016-02-09 14:57:42 +02004011 u8 reserved_at_e0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004012
4013 u8 rx_atomic_requests[0x20];
4014
Matan Barakb4ff3a32016-02-09 14:57:42 +02004015 u8 reserved_at_120[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004016
4017 u8 rx_dct_connect[0x20];
4018
Matan Barakb4ff3a32016-02-09 14:57:42 +02004019 u8 reserved_at_160[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004020
4021 u8 out_of_buffer[0x20];
4022
Matan Barakb4ff3a32016-02-09 14:57:42 +02004023 u8 reserved_at_1a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004024
4025 u8 out_of_sequence[0x20];
4026
Saeed Mahameed74862162016-06-09 15:11:34 +03004027 u8 reserved_at_1e0[0x20];
4028
4029 u8 duplicate_request[0x20];
4030
4031 u8 reserved_at_220[0x20];
4032
4033 u8 rnr_nak_retry_err[0x20];
4034
4035 u8 reserved_at_260[0x20];
4036
4037 u8 packet_seq_err[0x20];
4038
4039 u8 reserved_at_2a0[0x20];
4040
4041 u8 implied_nak_seq_err[0x20];
4042
4043 u8 reserved_at_2e0[0x20];
4044
4045 u8 local_ack_timeout_err[0x20];
4046
Parav Pandit58dcb602017-06-19 07:19:37 +03004047 u8 reserved_at_320[0xa0];
4048
4049 u8 resp_local_length_error[0x20];
4050
4051 u8 req_local_length_error[0x20];
4052
4053 u8 resp_local_qp_error[0x20];
4054
4055 u8 local_operation_error[0x20];
4056
4057 u8 resp_local_protection[0x20];
4058
4059 u8 req_local_protection[0x20];
4060
4061 u8 resp_cqe_error[0x20];
4062
4063 u8 req_cqe_error[0x20];
4064
4065 u8 req_mw_binding[0x20];
4066
4067 u8 req_bad_response[0x20];
4068
4069 u8 req_remote_invalid_request[0x20];
4070
4071 u8 resp_remote_invalid_request[0x20];
4072
4073 u8 req_remote_access_errors[0x20];
4074
4075 u8 resp_remote_access_errors[0x20];
4076
4077 u8 req_remote_operation_errors[0x20];
4078
4079 u8 req_transport_retries_exceeded[0x20];
4080
4081 u8 cq_overflow[0x20];
4082
4083 u8 resp_cqe_flush_error[0x20];
4084
4085 u8 req_cqe_flush_error[0x20];
4086
4087 u8 reserved_at_620[0x1e0];
Saeed Mahameede2816822015-05-28 22:28:40 +03004088};
4089
4090struct mlx5_ifc_query_q_counter_in_bits {
4091 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004092 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004093
Matan Barakb4ff3a32016-02-09 14:57:42 +02004094 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004095 u8 op_mod[0x10];
4096
Matan Barakb4ff3a32016-02-09 14:57:42 +02004097 u8 reserved_at_40[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03004098
4099 u8 clear[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004100 u8 reserved_at_c1[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03004101
Matan Barakb4ff3a32016-02-09 14:57:42 +02004102 u8 reserved_at_e0[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004103 u8 counter_set_id[0x8];
4104};
4105
4106struct mlx5_ifc_query_pages_out_bits {
4107 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004108 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004109
4110 u8 syndrome[0x20];
4111
Matan Barakb4ff3a32016-02-09 14:57:42 +02004112 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004113 u8 function_id[0x10];
4114
4115 u8 num_pages[0x20];
4116};
4117
4118enum {
4119 MLX5_QUERY_PAGES_IN_OP_MOD_BOOT_PAGES = 0x1,
4120 MLX5_QUERY_PAGES_IN_OP_MOD_INIT_PAGES = 0x2,
4121 MLX5_QUERY_PAGES_IN_OP_MOD_REGULAR_PAGES = 0x3,
4122};
4123
4124struct mlx5_ifc_query_pages_in_bits {
4125 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004126 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004127
Matan Barakb4ff3a32016-02-09 14:57:42 +02004128 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004129 u8 op_mod[0x10];
4130
Matan Barakb4ff3a32016-02-09 14:57:42 +02004131 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004132 u8 function_id[0x10];
4133
Matan Barakb4ff3a32016-02-09 14:57:42 +02004134 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004135};
4136
4137struct mlx5_ifc_query_nic_vport_context_out_bits {
4138 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004139 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004140
4141 u8 syndrome[0x20];
4142
Matan Barakb4ff3a32016-02-09 14:57:42 +02004143 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004144
4145 struct mlx5_ifc_nic_vport_context_bits nic_vport_context;
4146};
4147
4148struct mlx5_ifc_query_nic_vport_context_in_bits {
4149 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004150 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004151
Matan Barakb4ff3a32016-02-09 14:57:42 +02004152 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004153 u8 op_mod[0x10];
4154
4155 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004156 u8 reserved_at_41[0xf];
Saeed Mahameede2816822015-05-28 22:28:40 +03004157 u8 vport_number[0x10];
4158
Matan Barakb4ff3a32016-02-09 14:57:42 +02004159 u8 reserved_at_60[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03004160 u8 allowed_list_type[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004161 u8 reserved_at_68[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004162};
4163
4164struct mlx5_ifc_query_mkey_out_bits {
4165 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004166 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004167
4168 u8 syndrome[0x20];
4169
Matan Barakb4ff3a32016-02-09 14:57:42 +02004170 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004171
4172 struct mlx5_ifc_mkc_bits memory_key_mkey_entry;
4173
Matan Barakb4ff3a32016-02-09 14:57:42 +02004174 u8 reserved_at_280[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03004175
4176 u8 bsf0_klm0_pas_mtt0_1[16][0x8];
4177
4178 u8 bsf1_klm1_pas_mtt2_3[16][0x8];
4179};
4180
4181struct mlx5_ifc_query_mkey_in_bits {
4182 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004183 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004184
Matan Barakb4ff3a32016-02-09 14:57:42 +02004185 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004186 u8 op_mod[0x10];
4187
Matan Barakb4ff3a32016-02-09 14:57:42 +02004188 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004189 u8 mkey_index[0x18];
4190
4191 u8 pg_access[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004192 u8 reserved_at_61[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03004193};
4194
4195struct mlx5_ifc_query_mad_demux_out_bits {
4196 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004197 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004198
4199 u8 syndrome[0x20];
4200
Matan Barakb4ff3a32016-02-09 14:57:42 +02004201 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004202
4203 u8 mad_dumux_parameters_block[0x20];
4204};
4205
4206struct mlx5_ifc_query_mad_demux_in_bits {
4207 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004208 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004209
Matan Barakb4ff3a32016-02-09 14:57:42 +02004210 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004211 u8 op_mod[0x10];
4212
Matan Barakb4ff3a32016-02-09 14:57:42 +02004213 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004214};
4215
4216struct mlx5_ifc_query_l2_table_entry_out_bits {
4217 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004218 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004219
4220 u8 syndrome[0x20];
4221
Matan Barakb4ff3a32016-02-09 14:57:42 +02004222 u8 reserved_at_40[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03004223
Matan Barakb4ff3a32016-02-09 14:57:42 +02004224 u8 reserved_at_e0[0x13];
Saeed Mahameede2816822015-05-28 22:28:40 +03004225 u8 vlan_valid[0x1];
4226 u8 vlan[0xc];
4227
4228 struct mlx5_ifc_mac_address_layout_bits mac_address;
4229
Matan Barakb4ff3a32016-02-09 14:57:42 +02004230 u8 reserved_at_140[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03004231};
4232
4233struct mlx5_ifc_query_l2_table_entry_in_bits {
4234 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004235 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004236
Matan Barakb4ff3a32016-02-09 14:57:42 +02004237 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004238 u8 op_mod[0x10];
4239
Matan Barakb4ff3a32016-02-09 14:57:42 +02004240 u8 reserved_at_40[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03004241
Matan Barakb4ff3a32016-02-09 14:57:42 +02004242 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004243 u8 table_index[0x18];
4244
Matan Barakb4ff3a32016-02-09 14:57:42 +02004245 u8 reserved_at_c0[0x140];
Saeed Mahameede2816822015-05-28 22:28:40 +03004246};
4247
4248struct mlx5_ifc_query_issi_out_bits {
4249 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004250 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004251
4252 u8 syndrome[0x20];
4253
Matan Barakb4ff3a32016-02-09 14:57:42 +02004254 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004255 u8 current_issi[0x10];
4256
Matan Barakb4ff3a32016-02-09 14:57:42 +02004257 u8 reserved_at_60[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03004258
Matan Barakb4ff3a32016-02-09 14:57:42 +02004259 u8 reserved_at_100[76][0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004260 u8 supported_issi_dw0[0x20];
4261};
4262
4263struct mlx5_ifc_query_issi_in_bits {
4264 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004265 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004266
Matan Barakb4ff3a32016-02-09 14:57:42 +02004267 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004268 u8 op_mod[0x10];
4269
Matan Barakb4ff3a32016-02-09 14:57:42 +02004270 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004271};
4272
Saeed Mahameed0dbc6fe2016-11-17 13:45:59 +02004273struct mlx5_ifc_set_driver_version_out_bits {
4274 u8 status[0x8];
4275 u8 reserved_0[0x18];
4276
4277 u8 syndrome[0x20];
4278 u8 reserved_1[0x40];
4279};
4280
4281struct mlx5_ifc_set_driver_version_in_bits {
4282 u8 opcode[0x10];
4283 u8 reserved_0[0x10];
4284
4285 u8 reserved_1[0x10];
4286 u8 op_mod[0x10];
4287
4288 u8 reserved_2[0x40];
4289 u8 driver_version[64][0x8];
4290};
4291
Saeed Mahameede2816822015-05-28 22:28:40 +03004292struct mlx5_ifc_query_hca_vport_pkey_out_bits {
4293 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004294 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004295
4296 u8 syndrome[0x20];
4297
Matan Barakb4ff3a32016-02-09 14:57:42 +02004298 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004299
4300 struct mlx5_ifc_pkey_bits pkey[0];
4301};
4302
4303struct mlx5_ifc_query_hca_vport_pkey_in_bits {
4304 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004305 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004306
Matan Barakb4ff3a32016-02-09 14:57:42 +02004307 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004308 u8 op_mod[0x10];
4309
4310 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004311 u8 reserved_at_41[0xb];
Majd Dibbiny707c4602015-06-04 19:30:41 +03004312 u8 port_num[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03004313 u8 vport_number[0x10];
4314
Matan Barakb4ff3a32016-02-09 14:57:42 +02004315 u8 reserved_at_60[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004316 u8 pkey_index[0x10];
4317};
4318
Eli Coheneff901d2016-03-11 22:58:42 +02004319enum {
4320 MLX5_HCA_VPORT_SEL_PORT_GUID = 1 << 0,
4321 MLX5_HCA_VPORT_SEL_NODE_GUID = 1 << 1,
4322 MLX5_HCA_VPORT_SEL_STATE_POLICY = 1 << 2,
4323};
4324
Saeed Mahameede2816822015-05-28 22:28:40 +03004325struct mlx5_ifc_query_hca_vport_gid_out_bits {
4326 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004327 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004328
4329 u8 syndrome[0x20];
4330
Matan Barakb4ff3a32016-02-09 14:57:42 +02004331 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004332
4333 u8 gids_num[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004334 u8 reserved_at_70[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004335
4336 struct mlx5_ifc_array128_auto_bits gid[0];
4337};
4338
4339struct mlx5_ifc_query_hca_vport_gid_in_bits {
4340 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004341 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004342
Matan Barakb4ff3a32016-02-09 14:57:42 +02004343 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004344 u8 op_mod[0x10];
4345
4346 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004347 u8 reserved_at_41[0xb];
Majd Dibbiny707c4602015-06-04 19:30:41 +03004348 u8 port_num[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03004349 u8 vport_number[0x10];
4350
Matan Barakb4ff3a32016-02-09 14:57:42 +02004351 u8 reserved_at_60[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004352 u8 gid_index[0x10];
4353};
4354
4355struct mlx5_ifc_query_hca_vport_context_out_bits {
4356 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004357 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004358
4359 u8 syndrome[0x20];
4360
Matan Barakb4ff3a32016-02-09 14:57:42 +02004361 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004362
4363 struct mlx5_ifc_hca_vport_context_bits hca_vport_context;
4364};
4365
4366struct mlx5_ifc_query_hca_vport_context_in_bits {
4367 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004368 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004369
Matan Barakb4ff3a32016-02-09 14:57:42 +02004370 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004371 u8 op_mod[0x10];
4372
4373 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004374 u8 reserved_at_41[0xb];
Majd Dibbiny707c4602015-06-04 19:30:41 +03004375 u8 port_num[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03004376 u8 vport_number[0x10];
4377
Matan Barakb4ff3a32016-02-09 14:57:42 +02004378 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004379};
4380
4381struct mlx5_ifc_query_hca_cap_out_bits {
4382 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004383 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004384
4385 u8 syndrome[0x20];
4386
Matan Barakb4ff3a32016-02-09 14:57:42 +02004387 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004388
4389 union mlx5_ifc_hca_cap_union_bits capability;
Eli Cohenb7755162014-10-02 12:19:44 +03004390};
4391
4392struct mlx5_ifc_query_hca_cap_in_bits {
4393 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004394 u8 reserved_at_10[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +03004395
Matan Barakb4ff3a32016-02-09 14:57:42 +02004396 u8 reserved_at_20[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +03004397 u8 op_mod[0x10];
4398
Matan Barakb4ff3a32016-02-09 14:57:42 +02004399 u8 reserved_at_40[0x40];
Eli Cohenb7755162014-10-02 12:19:44 +03004400};
4401
Saeed Mahameede2816822015-05-28 22:28:40 +03004402struct mlx5_ifc_query_flow_table_out_bits {
Eli Cohenb7755162014-10-02 12:19:44 +03004403 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004404 u8 reserved_at_8[0x18];
Eli Cohenb7755162014-10-02 12:19:44 +03004405
4406 u8 syndrome[0x20];
4407
Matan Barakb4ff3a32016-02-09 14:57:42 +02004408 u8 reserved_at_40[0x80];
Eli Cohenb7755162014-10-02 12:19:44 +03004409
Matan Barakb4ff3a32016-02-09 14:57:42 +02004410 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004411 u8 level[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004412 u8 reserved_at_d0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004413 u8 log_size[0x8];
4414
Matan Barakb4ff3a32016-02-09 14:57:42 +02004415 u8 reserved_at_e0[0x120];
Eli Cohenb7755162014-10-02 12:19:44 +03004416};
4417
Saeed Mahameede2816822015-05-28 22:28:40 +03004418struct mlx5_ifc_query_flow_table_in_bits {
4419 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004420 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004421
Matan Barakb4ff3a32016-02-09 14:57:42 +02004422 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004423 u8 op_mod[0x10];
4424
Matan Barakb4ff3a32016-02-09 14:57:42 +02004425 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004426
4427 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004428 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004429
Matan Barakb4ff3a32016-02-09 14:57:42 +02004430 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004431 u8 table_id[0x18];
4432
Matan Barakb4ff3a32016-02-09 14:57:42 +02004433 u8 reserved_at_c0[0x140];
Saeed Mahameede2816822015-05-28 22:28:40 +03004434};
4435
4436struct mlx5_ifc_query_fte_out_bits {
4437 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004438 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004439
4440 u8 syndrome[0x20];
4441
Matan Barakb4ff3a32016-02-09 14:57:42 +02004442 u8 reserved_at_40[0x1c0];
Saeed Mahameede2816822015-05-28 22:28:40 +03004443
4444 struct mlx5_ifc_flow_context_bits flow_context;
4445};
4446
4447struct mlx5_ifc_query_fte_in_bits {
4448 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004449 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004450
Matan Barakb4ff3a32016-02-09 14:57:42 +02004451 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004452 u8 op_mod[0x10];
4453
Matan Barakb4ff3a32016-02-09 14:57:42 +02004454 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004455
4456 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004457 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004458
Matan Barakb4ff3a32016-02-09 14:57:42 +02004459 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004460 u8 table_id[0x18];
4461
Matan Barakb4ff3a32016-02-09 14:57:42 +02004462 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004463
4464 u8 flow_index[0x20];
4465
Matan Barakb4ff3a32016-02-09 14:57:42 +02004466 u8 reserved_at_120[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03004467};
4468
4469enum {
4470 MLX5_QUERY_FLOW_GROUP_OUT_MATCH_CRITERIA_ENABLE_OUTER_HEADERS = 0x0,
4471 MLX5_QUERY_FLOW_GROUP_OUT_MATCH_CRITERIA_ENABLE_MISC_PARAMETERS = 0x1,
4472 MLX5_QUERY_FLOW_GROUP_OUT_MATCH_CRITERIA_ENABLE_INNER_HEADERS = 0x2,
4473};
4474
4475struct mlx5_ifc_query_flow_group_out_bits {
4476 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004477 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004478
4479 u8 syndrome[0x20];
4480
Matan Barakb4ff3a32016-02-09 14:57:42 +02004481 u8 reserved_at_40[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03004482
4483 u8 start_flow_index[0x20];
4484
Matan Barakb4ff3a32016-02-09 14:57:42 +02004485 u8 reserved_at_100[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004486
4487 u8 end_flow_index[0x20];
4488
Matan Barakb4ff3a32016-02-09 14:57:42 +02004489 u8 reserved_at_140[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03004490
Matan Barakb4ff3a32016-02-09 14:57:42 +02004491 u8 reserved_at_1e0[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004492 u8 match_criteria_enable[0x8];
4493
4494 struct mlx5_ifc_fte_match_param_bits match_criteria;
4495
Matan Barakb4ff3a32016-02-09 14:57:42 +02004496 u8 reserved_at_1200[0xe00];
Saeed Mahameede2816822015-05-28 22:28:40 +03004497};
4498
4499struct mlx5_ifc_query_flow_group_in_bits {
4500 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004501 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004502
Matan Barakb4ff3a32016-02-09 14:57:42 +02004503 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004504 u8 op_mod[0x10];
4505
Matan Barakb4ff3a32016-02-09 14:57:42 +02004506 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004507
4508 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004509 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004510
Matan Barakb4ff3a32016-02-09 14:57:42 +02004511 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004512 u8 table_id[0x18];
4513
4514 u8 group_id[0x20];
4515
Matan Barakb4ff3a32016-02-09 14:57:42 +02004516 u8 reserved_at_e0[0x120];
Saeed Mahameede2816822015-05-28 22:28:40 +03004517};
4518
Amir Vadai9dc0b282016-05-13 12:55:39 +00004519struct mlx5_ifc_query_flow_counter_out_bits {
4520 u8 status[0x8];
4521 u8 reserved_at_8[0x18];
4522
4523 u8 syndrome[0x20];
4524
4525 u8 reserved_at_40[0x40];
4526
4527 struct mlx5_ifc_traffic_counter_bits flow_statistics[0];
4528};
4529
4530struct mlx5_ifc_query_flow_counter_in_bits {
4531 u8 opcode[0x10];
4532 u8 reserved_at_10[0x10];
4533
4534 u8 reserved_at_20[0x10];
4535 u8 op_mod[0x10];
4536
4537 u8 reserved_at_40[0x80];
4538
4539 u8 clear[0x1];
4540 u8 reserved_at_c1[0xf];
4541 u8 num_of_counters[0x10];
4542
Rabie Louloua8ffcc72017-07-09 13:39:30 +03004543 u8 flow_counter_id[0x20];
Amir Vadai9dc0b282016-05-13 12:55:39 +00004544};
4545
Saeed Mahameedd6666752015-12-01 18:03:22 +02004546struct mlx5_ifc_query_esw_vport_context_out_bits {
4547 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004548 u8 reserved_at_8[0x18];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004549
4550 u8 syndrome[0x20];
4551
Matan Barakb4ff3a32016-02-09 14:57:42 +02004552 u8 reserved_at_40[0x40];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004553
4554 struct mlx5_ifc_esw_vport_context_bits esw_vport_context;
4555};
4556
4557struct mlx5_ifc_query_esw_vport_context_in_bits {
4558 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004559 u8 reserved_at_10[0x10];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004560
Matan Barakb4ff3a32016-02-09 14:57:42 +02004561 u8 reserved_at_20[0x10];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004562 u8 op_mod[0x10];
4563
4564 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004565 u8 reserved_at_41[0xf];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004566 u8 vport_number[0x10];
4567
Matan Barakb4ff3a32016-02-09 14:57:42 +02004568 u8 reserved_at_60[0x20];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004569};
4570
4571struct mlx5_ifc_modify_esw_vport_context_out_bits {
4572 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004573 u8 reserved_at_8[0x18];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004574
4575 u8 syndrome[0x20];
4576
Matan Barakb4ff3a32016-02-09 14:57:42 +02004577 u8 reserved_at_40[0x40];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004578};
4579
4580struct mlx5_ifc_esw_vport_context_fields_select_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02004581 u8 reserved_at_0[0x1c];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004582 u8 vport_cvlan_insert[0x1];
4583 u8 vport_svlan_insert[0x1];
4584 u8 vport_cvlan_strip[0x1];
4585 u8 vport_svlan_strip[0x1];
4586};
4587
4588struct mlx5_ifc_modify_esw_vport_context_in_bits {
4589 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004590 u8 reserved_at_10[0x10];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004591
Matan Barakb4ff3a32016-02-09 14:57:42 +02004592 u8 reserved_at_20[0x10];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004593 u8 op_mod[0x10];
4594
4595 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004596 u8 reserved_at_41[0xf];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004597 u8 vport_number[0x10];
4598
4599 struct mlx5_ifc_esw_vport_context_fields_select_bits field_select;
4600
4601 struct mlx5_ifc_esw_vport_context_bits esw_vport_context;
4602};
4603
Saeed Mahameede2816822015-05-28 22:28:40 +03004604struct mlx5_ifc_query_eq_out_bits {
Eli Cohenb7755162014-10-02 12:19:44 +03004605 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004606 u8 reserved_at_8[0x18];
Eli Cohenb7755162014-10-02 12:19:44 +03004607
4608 u8 syndrome[0x20];
4609
Matan Barakb4ff3a32016-02-09 14:57:42 +02004610 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004611
4612 struct mlx5_ifc_eqc_bits eq_context_entry;
4613
Matan Barakb4ff3a32016-02-09 14:57:42 +02004614 u8 reserved_at_280[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004615
4616 u8 event_bitmask[0x40];
4617
Matan Barakb4ff3a32016-02-09 14:57:42 +02004618 u8 reserved_at_300[0x580];
Saeed Mahameede2816822015-05-28 22:28:40 +03004619
4620 u8 pas[0][0x40];
4621};
4622
4623struct mlx5_ifc_query_eq_in_bits {
4624 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004625 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004626
Matan Barakb4ff3a32016-02-09 14:57:42 +02004627 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004628 u8 op_mod[0x10];
4629
Matan Barakb4ff3a32016-02-09 14:57:42 +02004630 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004631 u8 eq_number[0x8];
4632
Matan Barakb4ff3a32016-02-09 14:57:42 +02004633 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004634};
4635
Hadar Hen Zion7adbde22016-08-03 15:08:33 +03004636struct mlx5_ifc_encap_header_in_bits {
4637 u8 reserved_at_0[0x5];
4638 u8 header_type[0x3];
4639 u8 reserved_at_8[0xe];
4640 u8 encap_header_size[0xa];
4641
4642 u8 reserved_at_20[0x10];
4643 u8 encap_header[2][0x8];
4644
4645 u8 more_encap_header[0][0x8];
4646};
4647
4648struct mlx5_ifc_query_encap_header_out_bits {
4649 u8 status[0x8];
4650 u8 reserved_at_8[0x18];
4651
4652 u8 syndrome[0x20];
4653
4654 u8 reserved_at_40[0xa0];
4655
4656 struct mlx5_ifc_encap_header_in_bits encap_header[0];
4657};
4658
4659struct mlx5_ifc_query_encap_header_in_bits {
4660 u8 opcode[0x10];
4661 u8 reserved_at_10[0x10];
4662
4663 u8 reserved_at_20[0x10];
4664 u8 op_mod[0x10];
4665
4666 u8 encap_id[0x20];
4667
4668 u8 reserved_at_60[0xa0];
4669};
4670
4671struct mlx5_ifc_alloc_encap_header_out_bits {
4672 u8 status[0x8];
4673 u8 reserved_at_8[0x18];
4674
4675 u8 syndrome[0x20];
4676
4677 u8 encap_id[0x20];
4678
4679 u8 reserved_at_60[0x20];
4680};
4681
4682struct mlx5_ifc_alloc_encap_header_in_bits {
4683 u8 opcode[0x10];
4684 u8 reserved_at_10[0x10];
4685
4686 u8 reserved_at_20[0x10];
4687 u8 op_mod[0x10];
4688
4689 u8 reserved_at_40[0xa0];
4690
4691 struct mlx5_ifc_encap_header_in_bits encap_header;
4692};
4693
4694struct mlx5_ifc_dealloc_encap_header_out_bits {
4695 u8 status[0x8];
4696 u8 reserved_at_8[0x18];
4697
4698 u8 syndrome[0x20];
4699
4700 u8 reserved_at_40[0x40];
4701};
4702
4703struct mlx5_ifc_dealloc_encap_header_in_bits {
4704 u8 opcode[0x10];
4705 u8 reserved_at_10[0x10];
4706
4707 u8 reserved_20[0x10];
4708 u8 op_mod[0x10];
4709
4710 u8 encap_id[0x20];
4711
4712 u8 reserved_60[0x20];
4713};
4714
Or Gerlitz2a69cb92017-01-19 19:31:25 +02004715struct mlx5_ifc_set_action_in_bits {
4716 u8 action_type[0x4];
4717 u8 field[0xc];
4718 u8 reserved_at_10[0x3];
4719 u8 offset[0x5];
4720 u8 reserved_at_18[0x3];
4721 u8 length[0x5];
4722
4723 u8 data[0x20];
4724};
4725
4726struct mlx5_ifc_add_action_in_bits {
4727 u8 action_type[0x4];
4728 u8 field[0xc];
4729 u8 reserved_at_10[0x10];
4730
4731 u8 data[0x20];
4732};
4733
4734union mlx5_ifc_set_action_in_add_action_in_auto_bits {
4735 struct mlx5_ifc_set_action_in_bits set_action_in;
4736 struct mlx5_ifc_add_action_in_bits add_action_in;
4737 u8 reserved_at_0[0x40];
4738};
4739
4740enum {
4741 MLX5_ACTION_TYPE_SET = 0x1,
4742 MLX5_ACTION_TYPE_ADD = 0x2,
4743};
4744
4745enum {
4746 MLX5_ACTION_IN_FIELD_OUT_SMAC_47_16 = 0x1,
4747 MLX5_ACTION_IN_FIELD_OUT_SMAC_15_0 = 0x2,
4748 MLX5_ACTION_IN_FIELD_OUT_ETHERTYPE = 0x3,
4749 MLX5_ACTION_IN_FIELD_OUT_DMAC_47_16 = 0x4,
4750 MLX5_ACTION_IN_FIELD_OUT_DMAC_15_0 = 0x5,
4751 MLX5_ACTION_IN_FIELD_OUT_IP_DSCP = 0x6,
4752 MLX5_ACTION_IN_FIELD_OUT_TCP_FLAGS = 0x7,
4753 MLX5_ACTION_IN_FIELD_OUT_TCP_SPORT = 0x8,
4754 MLX5_ACTION_IN_FIELD_OUT_TCP_DPORT = 0x9,
4755 MLX5_ACTION_IN_FIELD_OUT_IP_TTL = 0xa,
4756 MLX5_ACTION_IN_FIELD_OUT_UDP_SPORT = 0xb,
4757 MLX5_ACTION_IN_FIELD_OUT_UDP_DPORT = 0xc,
4758 MLX5_ACTION_IN_FIELD_OUT_SIPV6_127_96 = 0xd,
4759 MLX5_ACTION_IN_FIELD_OUT_SIPV6_95_64 = 0xe,
4760 MLX5_ACTION_IN_FIELD_OUT_SIPV6_63_32 = 0xf,
4761 MLX5_ACTION_IN_FIELD_OUT_SIPV6_31_0 = 0x10,
4762 MLX5_ACTION_IN_FIELD_OUT_DIPV6_127_96 = 0x11,
4763 MLX5_ACTION_IN_FIELD_OUT_DIPV6_95_64 = 0x12,
4764 MLX5_ACTION_IN_FIELD_OUT_DIPV6_63_32 = 0x13,
4765 MLX5_ACTION_IN_FIELD_OUT_DIPV6_31_0 = 0x14,
4766 MLX5_ACTION_IN_FIELD_OUT_SIPV4 = 0x15,
4767 MLX5_ACTION_IN_FIELD_OUT_DIPV4 = 0x16,
Or Gerlitz0c0316f2017-06-13 11:09:57 +03004768 MLX5_ACTION_IN_FIELD_OUT_IPV6_HOPLIMIT = 0x47,
Or Gerlitz2a69cb92017-01-19 19:31:25 +02004769};
4770
4771struct mlx5_ifc_alloc_modify_header_context_out_bits {
4772 u8 status[0x8];
4773 u8 reserved_at_8[0x18];
4774
4775 u8 syndrome[0x20];
4776
4777 u8 modify_header_id[0x20];
4778
4779 u8 reserved_at_60[0x20];
4780};
4781
4782struct mlx5_ifc_alloc_modify_header_context_in_bits {
4783 u8 opcode[0x10];
4784 u8 reserved_at_10[0x10];
4785
4786 u8 reserved_at_20[0x10];
4787 u8 op_mod[0x10];
4788
4789 u8 reserved_at_40[0x20];
4790
4791 u8 table_type[0x8];
4792 u8 reserved_at_68[0x10];
4793 u8 num_of_actions[0x8];
4794
4795 union mlx5_ifc_set_action_in_add_action_in_auto_bits actions[0];
4796};
4797
4798struct mlx5_ifc_dealloc_modify_header_context_out_bits {
4799 u8 status[0x8];
4800 u8 reserved_at_8[0x18];
4801
4802 u8 syndrome[0x20];
4803
4804 u8 reserved_at_40[0x40];
4805};
4806
4807struct mlx5_ifc_dealloc_modify_header_context_in_bits {
4808 u8 opcode[0x10];
4809 u8 reserved_at_10[0x10];
4810
4811 u8 reserved_at_20[0x10];
4812 u8 op_mod[0x10];
4813
4814 u8 modify_header_id[0x20];
4815
4816 u8 reserved_at_60[0x20];
4817};
4818
Saeed Mahameede2816822015-05-28 22:28:40 +03004819struct mlx5_ifc_query_dct_out_bits {
4820 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004821 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004822
4823 u8 syndrome[0x20];
4824
Matan Barakb4ff3a32016-02-09 14:57:42 +02004825 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004826
4827 struct mlx5_ifc_dctc_bits dct_context_entry;
4828
Matan Barakb4ff3a32016-02-09 14:57:42 +02004829 u8 reserved_at_280[0x180];
Saeed Mahameede2816822015-05-28 22:28:40 +03004830};
4831
4832struct mlx5_ifc_query_dct_in_bits {
4833 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004834 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004835
Matan Barakb4ff3a32016-02-09 14:57:42 +02004836 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004837 u8 op_mod[0x10];
4838
Matan Barakb4ff3a32016-02-09 14:57:42 +02004839 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004840 u8 dctn[0x18];
4841
Matan Barakb4ff3a32016-02-09 14:57:42 +02004842 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004843};
4844
4845struct mlx5_ifc_query_cq_out_bits {
4846 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004847 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004848
4849 u8 syndrome[0x20];
4850
Matan Barakb4ff3a32016-02-09 14:57:42 +02004851 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004852
4853 struct mlx5_ifc_cqc_bits cq_context;
4854
Matan Barakb4ff3a32016-02-09 14:57:42 +02004855 u8 reserved_at_280[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03004856
4857 u8 pas[0][0x40];
4858};
4859
4860struct mlx5_ifc_query_cq_in_bits {
4861 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004862 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004863
Matan Barakb4ff3a32016-02-09 14:57:42 +02004864 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004865 u8 op_mod[0x10];
4866
Matan Barakb4ff3a32016-02-09 14:57:42 +02004867 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004868 u8 cqn[0x18];
4869
Matan Barakb4ff3a32016-02-09 14:57:42 +02004870 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004871};
4872
4873struct mlx5_ifc_query_cong_status_out_bits {
4874 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004875 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004876
4877 u8 syndrome[0x20];
4878
Matan Barakb4ff3a32016-02-09 14:57:42 +02004879 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004880
4881 u8 enable[0x1];
4882 u8 tag_enable[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004883 u8 reserved_at_62[0x1e];
Saeed Mahameede2816822015-05-28 22:28:40 +03004884};
4885
4886struct mlx5_ifc_query_cong_status_in_bits {
4887 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004888 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004889
Matan Barakb4ff3a32016-02-09 14:57:42 +02004890 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004891 u8 op_mod[0x10];
4892
Matan Barakb4ff3a32016-02-09 14:57:42 +02004893 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004894 u8 priority[0x4];
4895 u8 cong_protocol[0x4];
4896
Matan Barakb4ff3a32016-02-09 14:57:42 +02004897 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004898};
4899
4900struct mlx5_ifc_query_cong_statistics_out_bits {
4901 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004902 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004903
4904 u8 syndrome[0x20];
4905
Matan Barakb4ff3a32016-02-09 14:57:42 +02004906 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004907
Parav Pandite1f24a72017-04-16 07:29:29 +03004908 u8 rp_cur_flows[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004909
4910 u8 sum_flows[0x20];
4911
Parav Pandite1f24a72017-04-16 07:29:29 +03004912 u8 rp_cnp_ignored_high[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004913
Parav Pandite1f24a72017-04-16 07:29:29 +03004914 u8 rp_cnp_ignored_low[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004915
Parav Pandite1f24a72017-04-16 07:29:29 +03004916 u8 rp_cnp_handled_high[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004917
Parav Pandite1f24a72017-04-16 07:29:29 +03004918 u8 rp_cnp_handled_low[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004919
Matan Barakb4ff3a32016-02-09 14:57:42 +02004920 u8 reserved_at_140[0x100];
Saeed Mahameede2816822015-05-28 22:28:40 +03004921
4922 u8 time_stamp_high[0x20];
4923
4924 u8 time_stamp_low[0x20];
4925
4926 u8 accumulators_period[0x20];
4927
Parav Pandite1f24a72017-04-16 07:29:29 +03004928 u8 np_ecn_marked_roce_packets_high[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004929
Parav Pandite1f24a72017-04-16 07:29:29 +03004930 u8 np_ecn_marked_roce_packets_low[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004931
Parav Pandite1f24a72017-04-16 07:29:29 +03004932 u8 np_cnp_sent_high[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004933
Parav Pandite1f24a72017-04-16 07:29:29 +03004934 u8 np_cnp_sent_low[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004935
Matan Barakb4ff3a32016-02-09 14:57:42 +02004936 u8 reserved_at_320[0x560];
Saeed Mahameede2816822015-05-28 22:28:40 +03004937};
4938
4939struct mlx5_ifc_query_cong_statistics_in_bits {
4940 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004941 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004942
Matan Barakb4ff3a32016-02-09 14:57:42 +02004943 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004944 u8 op_mod[0x10];
4945
4946 u8 clear[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004947 u8 reserved_at_41[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03004948
Matan Barakb4ff3a32016-02-09 14:57:42 +02004949 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004950};
4951
4952struct mlx5_ifc_query_cong_params_out_bits {
4953 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004954 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004955
4956 u8 syndrome[0x20];
4957
Matan Barakb4ff3a32016-02-09 14:57:42 +02004958 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004959
4960 union mlx5_ifc_cong_control_roce_ecn_auto_bits congestion_parameters;
4961};
4962
4963struct mlx5_ifc_query_cong_params_in_bits {
4964 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004965 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004966
Matan Barakb4ff3a32016-02-09 14:57:42 +02004967 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004968 u8 op_mod[0x10];
4969
Matan Barakb4ff3a32016-02-09 14:57:42 +02004970 u8 reserved_at_40[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03004971 u8 cong_protocol[0x4];
4972
Matan Barakb4ff3a32016-02-09 14:57:42 +02004973 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004974};
4975
4976struct mlx5_ifc_query_adapter_out_bits {
4977 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004978 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004979
4980 u8 syndrome[0x20];
4981
Matan Barakb4ff3a32016-02-09 14:57:42 +02004982 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004983
4984 struct mlx5_ifc_query_adapter_param_block_bits query_adapter_struct;
4985};
4986
4987struct mlx5_ifc_query_adapter_in_bits {
4988 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004989 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004990
Matan Barakb4ff3a32016-02-09 14:57:42 +02004991 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004992 u8 op_mod[0x10];
4993
Matan Barakb4ff3a32016-02-09 14:57:42 +02004994 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004995};
4996
4997struct mlx5_ifc_qp_2rst_out_bits {
4998 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004999 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005000
5001 u8 syndrome[0x20];
5002
Matan Barakb4ff3a32016-02-09 14:57:42 +02005003 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005004};
5005
5006struct mlx5_ifc_qp_2rst_in_bits {
5007 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005008 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005009
Matan Barakb4ff3a32016-02-09 14:57:42 +02005010 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005011 u8 op_mod[0x10];
5012
Matan Barakb4ff3a32016-02-09 14:57:42 +02005013 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005014 u8 qpn[0x18];
5015
Matan Barakb4ff3a32016-02-09 14:57:42 +02005016 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005017};
5018
5019struct mlx5_ifc_qp_2err_out_bits {
5020 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005021 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005022
5023 u8 syndrome[0x20];
5024
Matan Barakb4ff3a32016-02-09 14:57:42 +02005025 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005026};
5027
5028struct mlx5_ifc_qp_2err_in_bits {
5029 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005030 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005031
Matan Barakb4ff3a32016-02-09 14:57:42 +02005032 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005033 u8 op_mod[0x10];
5034
Matan Barakb4ff3a32016-02-09 14:57:42 +02005035 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005036 u8 qpn[0x18];
5037
Matan Barakb4ff3a32016-02-09 14:57:42 +02005038 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005039};
5040
5041struct mlx5_ifc_page_fault_resume_out_bits {
5042 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005043 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005044
5045 u8 syndrome[0x20];
5046
Matan Barakb4ff3a32016-02-09 14:57:42 +02005047 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005048};
5049
5050struct mlx5_ifc_page_fault_resume_in_bits {
5051 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005052 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005053
Matan Barakb4ff3a32016-02-09 14:57:42 +02005054 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005055 u8 op_mod[0x10];
5056
5057 u8 error[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005058 u8 reserved_at_41[0x4];
Artemy Kovalyov223cdc72017-01-02 11:37:45 +02005059 u8 page_fault_type[0x3];
5060 u8 wq_number[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005061
Artemy Kovalyov223cdc72017-01-02 11:37:45 +02005062 u8 reserved_at_60[0x8];
5063 u8 token[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005064};
5065
5066struct mlx5_ifc_nop_out_bits {
5067 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005068 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005069
5070 u8 syndrome[0x20];
5071
Matan Barakb4ff3a32016-02-09 14:57:42 +02005072 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005073};
5074
5075struct mlx5_ifc_nop_in_bits {
5076 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005077 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005078
Matan Barakb4ff3a32016-02-09 14:57:42 +02005079 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005080 u8 op_mod[0x10];
5081
Matan Barakb4ff3a32016-02-09 14:57:42 +02005082 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005083};
5084
5085struct mlx5_ifc_modify_vport_state_out_bits {
5086 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005087 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005088
5089 u8 syndrome[0x20];
5090
Matan Barakb4ff3a32016-02-09 14:57:42 +02005091 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005092};
5093
5094struct mlx5_ifc_modify_vport_state_in_bits {
5095 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005096 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005097
Matan Barakb4ff3a32016-02-09 14:57:42 +02005098 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005099 u8 op_mod[0x10];
5100
5101 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005102 u8 reserved_at_41[0xf];
Saeed Mahameede2816822015-05-28 22:28:40 +03005103 u8 vport_number[0x10];
5104
Matan Barakb4ff3a32016-02-09 14:57:42 +02005105 u8 reserved_at_60[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005106 u8 admin_state[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005107 u8 reserved_at_7c[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03005108};
5109
5110struct mlx5_ifc_modify_tis_out_bits {
5111 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005112 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005113
5114 u8 syndrome[0x20];
5115
Matan Barakb4ff3a32016-02-09 14:57:42 +02005116 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005117};
5118
majd@mellanox.com75850d02016-01-14 19:13:06 +02005119struct mlx5_ifc_modify_tis_bitmask_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02005120 u8 reserved_at_0[0x20];
majd@mellanox.com75850d02016-01-14 19:13:06 +02005121
Aviv Heller84df61e2016-05-10 13:47:50 +03005122 u8 reserved_at_20[0x1d];
5123 u8 lag_tx_port_affinity[0x1];
5124 u8 strict_lag_tx_port_affinity[0x1];
majd@mellanox.com75850d02016-01-14 19:13:06 +02005125 u8 prio[0x1];
5126};
5127
Saeed Mahameede2816822015-05-28 22:28:40 +03005128struct mlx5_ifc_modify_tis_in_bits {
5129 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005130 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005131
Matan Barakb4ff3a32016-02-09 14:57:42 +02005132 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005133 u8 op_mod[0x10];
5134
Matan Barakb4ff3a32016-02-09 14:57:42 +02005135 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005136 u8 tisn[0x18];
5137
Matan Barakb4ff3a32016-02-09 14:57:42 +02005138 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005139
majd@mellanox.com75850d02016-01-14 19:13:06 +02005140 struct mlx5_ifc_modify_tis_bitmask_bits bitmask;
Saeed Mahameede2816822015-05-28 22:28:40 +03005141
Matan Barakb4ff3a32016-02-09 14:57:42 +02005142 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005143
5144 struct mlx5_ifc_tisc_bits ctx;
5145};
5146
Achiad Shochatd9eea402015-08-04 14:05:42 +03005147struct mlx5_ifc_modify_tir_bitmask_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02005148 u8 reserved_at_0[0x20];
Achiad Shochatd9eea402015-08-04 14:05:42 +03005149
Matan Barakb4ff3a32016-02-09 14:57:42 +02005150 u8 reserved_at_20[0x1b];
Tariq Toukan66189962015-11-12 19:35:26 +02005151 u8 self_lb_en[0x1];
Tariq Toukanbdfc0282016-02-29 21:17:12 +02005152 u8 reserved_at_3c[0x1];
5153 u8 hash[0x1];
5154 u8 reserved_at_3e[0x1];
Achiad Shochatd9eea402015-08-04 14:05:42 +03005155 u8 lro[0x1];
5156};
5157
Saeed Mahameede2816822015-05-28 22:28:40 +03005158struct mlx5_ifc_modify_tir_out_bits {
5159 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005160 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005161
5162 u8 syndrome[0x20];
5163
Matan Barakb4ff3a32016-02-09 14:57:42 +02005164 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005165};
5166
5167struct mlx5_ifc_modify_tir_in_bits {
5168 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005169 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005170
Matan Barakb4ff3a32016-02-09 14:57:42 +02005171 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005172 u8 op_mod[0x10];
5173
Matan Barakb4ff3a32016-02-09 14:57:42 +02005174 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005175 u8 tirn[0x18];
5176
Matan Barakb4ff3a32016-02-09 14:57:42 +02005177 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005178
Achiad Shochatd9eea402015-08-04 14:05:42 +03005179 struct mlx5_ifc_modify_tir_bitmask_bits bitmask;
Saeed Mahameede2816822015-05-28 22:28:40 +03005180
Matan Barakb4ff3a32016-02-09 14:57:42 +02005181 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005182
5183 struct mlx5_ifc_tirc_bits ctx;
5184};
5185
5186struct mlx5_ifc_modify_sq_out_bits {
5187 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005188 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005189
5190 u8 syndrome[0x20];
5191
Matan Barakb4ff3a32016-02-09 14:57:42 +02005192 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005193};
5194
5195struct mlx5_ifc_modify_sq_in_bits {
5196 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005197 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005198
Matan Barakb4ff3a32016-02-09 14:57:42 +02005199 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005200 u8 op_mod[0x10];
5201
5202 u8 sq_state[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005203 u8 reserved_at_44[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03005204 u8 sqn[0x18];
5205
Matan Barakb4ff3a32016-02-09 14:57:42 +02005206 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005207
5208 u8 modify_bitmask[0x40];
5209
Matan Barakb4ff3a32016-02-09 14:57:42 +02005210 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005211
5212 struct mlx5_ifc_sqc_bits ctx;
5213};
5214
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +03005215struct mlx5_ifc_modify_scheduling_element_out_bits {
5216 u8 status[0x8];
5217 u8 reserved_at_8[0x18];
5218
5219 u8 syndrome[0x20];
5220
5221 u8 reserved_at_40[0x1c0];
5222};
5223
5224enum {
5225 MODIFY_SCHEDULING_ELEMENT_IN_MODIFY_BITMASK_BW_SHARE = 0x1,
5226 MODIFY_SCHEDULING_ELEMENT_IN_MODIFY_BITMASK_MAX_AVERAGE_BW = 0x2,
5227};
5228
5229struct mlx5_ifc_modify_scheduling_element_in_bits {
5230 u8 opcode[0x10];
5231 u8 reserved_at_10[0x10];
5232
5233 u8 reserved_at_20[0x10];
5234 u8 op_mod[0x10];
5235
5236 u8 scheduling_hierarchy[0x8];
5237 u8 reserved_at_48[0x18];
5238
5239 u8 scheduling_element_id[0x20];
5240
5241 u8 reserved_at_80[0x20];
5242
5243 u8 modify_bitmask[0x20];
5244
5245 u8 reserved_at_c0[0x40];
5246
5247 struct mlx5_ifc_scheduling_context_bits scheduling_context;
5248
5249 u8 reserved_at_300[0x100];
5250};
5251
Saeed Mahameede2816822015-05-28 22:28:40 +03005252struct mlx5_ifc_modify_rqt_out_bits {
5253 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005254 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005255
5256 u8 syndrome[0x20];
5257
Matan Barakb4ff3a32016-02-09 14:57:42 +02005258 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005259};
5260
Achiad Shochat5c503682015-08-04 14:05:43 +03005261struct mlx5_ifc_rqt_bitmask_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02005262 u8 reserved_at_0[0x20];
Achiad Shochat5c503682015-08-04 14:05:43 +03005263
Matan Barakb4ff3a32016-02-09 14:57:42 +02005264 u8 reserved_at_20[0x1f];
Achiad Shochat5c503682015-08-04 14:05:43 +03005265 u8 rqn_list[0x1];
5266};
5267
Saeed Mahameede2816822015-05-28 22:28:40 +03005268struct mlx5_ifc_modify_rqt_in_bits {
5269 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005270 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005271
Matan Barakb4ff3a32016-02-09 14:57:42 +02005272 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005273 u8 op_mod[0x10];
5274
Matan Barakb4ff3a32016-02-09 14:57:42 +02005275 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005276 u8 rqtn[0x18];
5277
Matan Barakb4ff3a32016-02-09 14:57:42 +02005278 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005279
Achiad Shochat5c503682015-08-04 14:05:43 +03005280 struct mlx5_ifc_rqt_bitmask_bits bitmask;
Saeed Mahameede2816822015-05-28 22:28:40 +03005281
Matan Barakb4ff3a32016-02-09 14:57:42 +02005282 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005283
5284 struct mlx5_ifc_rqtc_bits ctx;
5285};
5286
5287struct mlx5_ifc_modify_rq_out_bits {
5288 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005289 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005290
5291 u8 syndrome[0x20];
5292
Matan Barakb4ff3a32016-02-09 14:57:42 +02005293 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005294};
5295
Alex Vesker83b502a2016-08-04 17:32:02 +03005296enum {
5297 MLX5_MODIFY_RQ_IN_MODIFY_BITMASK_VSD = 1ULL << 1,
Guy Ergas102722f2017-02-20 16:18:17 +02005298 MLX5_MODIFY_RQ_IN_MODIFY_BITMASK_SCATTER_FCS = 1ULL << 2,
Majd Dibbiny23a69642017-01-18 15:25:10 +02005299 MLX5_MODIFY_RQ_IN_MODIFY_BITMASK_RQ_COUNTER_SET_ID = 1ULL << 3,
Alex Vesker83b502a2016-08-04 17:32:02 +03005300};
5301
Saeed Mahameede2816822015-05-28 22:28:40 +03005302struct mlx5_ifc_modify_rq_in_bits {
5303 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005304 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005305
Matan Barakb4ff3a32016-02-09 14:57:42 +02005306 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005307 u8 op_mod[0x10];
5308
5309 u8 rq_state[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005310 u8 reserved_at_44[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03005311 u8 rqn[0x18];
5312
Matan Barakb4ff3a32016-02-09 14:57:42 +02005313 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005314
5315 u8 modify_bitmask[0x40];
5316
Matan Barakb4ff3a32016-02-09 14:57:42 +02005317 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005318
5319 struct mlx5_ifc_rqc_bits ctx;
5320};
5321
5322struct mlx5_ifc_modify_rmp_out_bits {
5323 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005324 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005325
5326 u8 syndrome[0x20];
5327
Matan Barakb4ff3a32016-02-09 14:57:42 +02005328 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005329};
5330
Haggai Abramonvsky01949d02015-06-04 19:30:38 +03005331struct mlx5_ifc_rmp_bitmask_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02005332 u8 reserved_at_0[0x20];
Haggai Abramonvsky01949d02015-06-04 19:30:38 +03005333
Matan Barakb4ff3a32016-02-09 14:57:42 +02005334 u8 reserved_at_20[0x1f];
Haggai Abramonvsky01949d02015-06-04 19:30:38 +03005335 u8 lwm[0x1];
5336};
5337
Saeed Mahameede2816822015-05-28 22:28:40 +03005338struct mlx5_ifc_modify_rmp_in_bits {
5339 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005340 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005341
Matan Barakb4ff3a32016-02-09 14:57:42 +02005342 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005343 u8 op_mod[0x10];
5344
5345 u8 rmp_state[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005346 u8 reserved_at_44[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03005347 u8 rmpn[0x18];
5348
Matan Barakb4ff3a32016-02-09 14:57:42 +02005349 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005350
Haggai Abramonvsky01949d02015-06-04 19:30:38 +03005351 struct mlx5_ifc_rmp_bitmask_bits bitmask;
Saeed Mahameede2816822015-05-28 22:28:40 +03005352
Matan Barakb4ff3a32016-02-09 14:57:42 +02005353 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005354
5355 struct mlx5_ifc_rmpc_bits ctx;
5356};
5357
5358struct mlx5_ifc_modify_nic_vport_context_out_bits {
5359 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005360 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005361
5362 u8 syndrome[0x20];
5363
Matan Barakb4ff3a32016-02-09 14:57:42 +02005364 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005365};
5366
5367struct mlx5_ifc_modify_nic_vport_field_select_bits {
Daniel Jurgens32f69e42018-01-04 17:25:36 +02005368 u8 reserved_at_0[0x12];
5369 u8 affiliation[0x1];
5370 u8 reserved_at_e[0x1];
Huy Nguyenbded7472017-05-30 09:42:53 +03005371 u8 disable_uc_local_lb[0x1];
5372 u8 disable_mc_local_lb[0x1];
Noa Osherovich23898c72016-06-10 00:07:37 +03005373 u8 node_guid[0x1];
5374 u8 port_guid[0x1];
Hadar Hen Zion9def7122016-08-03 17:27:30 +03005375 u8 min_inline[0x1];
Saeed Mahameedd82b7312015-12-01 18:03:14 +02005376 u8 mtu[0x1];
5377 u8 change_event[0x1];
5378 u8 promisc[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03005379 u8 permanent_address[0x1];
5380 u8 addresses_list[0x1];
5381 u8 roce_en[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005382 u8 reserved_at_1f[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03005383};
5384
5385struct mlx5_ifc_modify_nic_vport_context_in_bits {
5386 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005387 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005388
Matan Barakb4ff3a32016-02-09 14:57:42 +02005389 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005390 u8 op_mod[0x10];
5391
5392 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005393 u8 reserved_at_41[0xf];
Saeed Mahameede2816822015-05-28 22:28:40 +03005394 u8 vport_number[0x10];
5395
5396 struct mlx5_ifc_modify_nic_vport_field_select_bits field_select;
5397
Matan Barakb4ff3a32016-02-09 14:57:42 +02005398 u8 reserved_at_80[0x780];
Saeed Mahameede2816822015-05-28 22:28:40 +03005399
5400 struct mlx5_ifc_nic_vport_context_bits nic_vport_context;
5401};
5402
5403struct mlx5_ifc_modify_hca_vport_context_out_bits {
5404 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005405 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005406
5407 u8 syndrome[0x20];
5408
Matan Barakb4ff3a32016-02-09 14:57:42 +02005409 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005410};
5411
5412struct mlx5_ifc_modify_hca_vport_context_in_bits {
5413 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005414 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005415
Matan Barakb4ff3a32016-02-09 14:57:42 +02005416 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005417 u8 op_mod[0x10];
5418
5419 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005420 u8 reserved_at_41[0xb];
Majd Dibbiny707c4602015-06-04 19:30:41 +03005421 u8 port_num[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03005422 u8 vport_number[0x10];
5423
Matan Barakb4ff3a32016-02-09 14:57:42 +02005424 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005425
5426 struct mlx5_ifc_hca_vport_context_bits hca_vport_context;
5427};
5428
5429struct mlx5_ifc_modify_cq_out_bits {
5430 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005431 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005432
5433 u8 syndrome[0x20];
5434
Matan Barakb4ff3a32016-02-09 14:57:42 +02005435 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005436};
5437
5438enum {
5439 MLX5_MODIFY_CQ_IN_OP_MOD_MODIFY_CQ = 0x0,
5440 MLX5_MODIFY_CQ_IN_OP_MOD_RESIZE_CQ = 0x1,
5441};
5442
5443struct mlx5_ifc_modify_cq_in_bits {
5444 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005445 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005446
Matan Barakb4ff3a32016-02-09 14:57:42 +02005447 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005448 u8 op_mod[0x10];
5449
Matan Barakb4ff3a32016-02-09 14:57:42 +02005450 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005451 u8 cqn[0x18];
5452
5453 union mlx5_ifc_modify_field_select_resize_field_select_auto_bits modify_field_select_resize_field_select;
5454
5455 struct mlx5_ifc_cqc_bits cq_context;
5456
Matan Barakb4ff3a32016-02-09 14:57:42 +02005457 u8 reserved_at_280[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03005458
5459 u8 pas[0][0x40];
5460};
5461
5462struct mlx5_ifc_modify_cong_status_out_bits {
5463 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005464 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005465
5466 u8 syndrome[0x20];
5467
Matan Barakb4ff3a32016-02-09 14:57:42 +02005468 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005469};
5470
5471struct mlx5_ifc_modify_cong_status_in_bits {
5472 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005473 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005474
Matan Barakb4ff3a32016-02-09 14:57:42 +02005475 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005476 u8 op_mod[0x10];
5477
Matan Barakb4ff3a32016-02-09 14:57:42 +02005478 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005479 u8 priority[0x4];
5480 u8 cong_protocol[0x4];
5481
5482 u8 enable[0x1];
5483 u8 tag_enable[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005484 u8 reserved_at_62[0x1e];
Saeed Mahameede2816822015-05-28 22:28:40 +03005485};
5486
5487struct mlx5_ifc_modify_cong_params_out_bits {
5488 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005489 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005490
5491 u8 syndrome[0x20];
5492
Matan Barakb4ff3a32016-02-09 14:57:42 +02005493 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005494};
5495
5496struct mlx5_ifc_modify_cong_params_in_bits {
5497 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005498 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005499
Matan Barakb4ff3a32016-02-09 14:57:42 +02005500 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005501 u8 op_mod[0x10];
5502
Matan Barakb4ff3a32016-02-09 14:57:42 +02005503 u8 reserved_at_40[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03005504 u8 cong_protocol[0x4];
5505
5506 union mlx5_ifc_field_select_802_1_r_roce_auto_bits field_select;
5507
Matan Barakb4ff3a32016-02-09 14:57:42 +02005508 u8 reserved_at_80[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03005509
5510 union mlx5_ifc_cong_control_roce_ecn_auto_bits congestion_parameters;
5511};
5512
5513struct mlx5_ifc_manage_pages_out_bits {
5514 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005515 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005516
5517 u8 syndrome[0x20];
5518
5519 u8 output_num_entries[0x20];
5520
Matan Barakb4ff3a32016-02-09 14:57:42 +02005521 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005522
5523 u8 pas[0][0x40];
5524};
5525
5526enum {
5527 MLX5_MANAGE_PAGES_IN_OP_MOD_ALLOCATION_FAIL = 0x0,
5528 MLX5_MANAGE_PAGES_IN_OP_MOD_ALLOCATION_SUCCESS = 0x1,
5529 MLX5_MANAGE_PAGES_IN_OP_MOD_HCA_RETURN_PAGES = 0x2,
5530};
5531
5532struct mlx5_ifc_manage_pages_in_bits {
5533 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005534 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005535
Matan Barakb4ff3a32016-02-09 14:57:42 +02005536 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005537 u8 op_mod[0x10];
5538
Matan Barakb4ff3a32016-02-09 14:57:42 +02005539 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005540 u8 function_id[0x10];
5541
5542 u8 input_num_entries[0x20];
5543
5544 u8 pas[0][0x40];
5545};
5546
5547struct mlx5_ifc_mad_ifc_out_bits {
5548 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005549 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005550
5551 u8 syndrome[0x20];
5552
Matan Barakb4ff3a32016-02-09 14:57:42 +02005553 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005554
5555 u8 response_mad_packet[256][0x8];
5556};
5557
5558struct mlx5_ifc_mad_ifc_in_bits {
5559 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005560 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005561
Matan Barakb4ff3a32016-02-09 14:57:42 +02005562 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005563 u8 op_mod[0x10];
5564
5565 u8 remote_lid[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005566 u8 reserved_at_50[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005567 u8 port[0x8];
5568
Matan Barakb4ff3a32016-02-09 14:57:42 +02005569 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005570
5571 u8 mad[256][0x8];
5572};
5573
5574struct mlx5_ifc_init_hca_out_bits {
5575 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005576 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005577
5578 u8 syndrome[0x20];
5579
Matan Barakb4ff3a32016-02-09 14:57:42 +02005580 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005581};
5582
5583struct mlx5_ifc_init_hca_in_bits {
5584 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005585 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005586
Matan Barakb4ff3a32016-02-09 14:57:42 +02005587 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005588 u8 op_mod[0x10];
5589
Matan Barakb4ff3a32016-02-09 14:57:42 +02005590 u8 reserved_at_40[0x40];
Daniel Jurgens8737f812018-01-04 17:25:32 +02005591 u8 sw_owner_id[4][0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005592};
5593
5594struct mlx5_ifc_init2rtr_qp_out_bits {
5595 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005596 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005597
5598 u8 syndrome[0x20];
5599
Matan Barakb4ff3a32016-02-09 14:57:42 +02005600 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005601};
5602
5603struct mlx5_ifc_init2rtr_qp_in_bits {
5604 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005605 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005606
Matan Barakb4ff3a32016-02-09 14:57:42 +02005607 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005608 u8 op_mod[0x10];
5609
Matan Barakb4ff3a32016-02-09 14:57:42 +02005610 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005611 u8 qpn[0x18];
5612
Matan Barakb4ff3a32016-02-09 14:57:42 +02005613 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005614
5615 u8 opt_param_mask[0x20];
5616
Matan Barakb4ff3a32016-02-09 14:57:42 +02005617 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005618
5619 struct mlx5_ifc_qpc_bits qpc;
5620
Matan Barakb4ff3a32016-02-09 14:57:42 +02005621 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03005622};
5623
5624struct mlx5_ifc_init2init_qp_out_bits {
5625 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005626 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005627
5628 u8 syndrome[0x20];
5629
Matan Barakb4ff3a32016-02-09 14:57:42 +02005630 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005631};
5632
5633struct mlx5_ifc_init2init_qp_in_bits {
5634 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005635 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005636
Matan Barakb4ff3a32016-02-09 14:57:42 +02005637 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005638 u8 op_mod[0x10];
5639
Matan Barakb4ff3a32016-02-09 14:57:42 +02005640 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005641 u8 qpn[0x18];
5642
Matan Barakb4ff3a32016-02-09 14:57:42 +02005643 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005644
5645 u8 opt_param_mask[0x20];
5646
Matan Barakb4ff3a32016-02-09 14:57:42 +02005647 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005648
5649 struct mlx5_ifc_qpc_bits qpc;
5650
Matan Barakb4ff3a32016-02-09 14:57:42 +02005651 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03005652};
5653
5654struct mlx5_ifc_get_dropped_packet_log_out_bits {
5655 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005656 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005657
5658 u8 syndrome[0x20];
5659
Matan Barakb4ff3a32016-02-09 14:57:42 +02005660 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005661
5662 u8 packet_headers_log[128][0x8];
5663
5664 u8 packet_syndrome[64][0x8];
5665};
5666
5667struct mlx5_ifc_get_dropped_packet_log_in_bits {
5668 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005669 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005670
Matan Barakb4ff3a32016-02-09 14:57:42 +02005671 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005672 u8 op_mod[0x10];
5673
Matan Barakb4ff3a32016-02-09 14:57:42 +02005674 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005675};
5676
5677struct mlx5_ifc_gen_eqe_in_bits {
5678 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005679 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005680
Matan Barakb4ff3a32016-02-09 14:57:42 +02005681 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005682 u8 op_mod[0x10];
5683
Matan Barakb4ff3a32016-02-09 14:57:42 +02005684 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005685 u8 eq_number[0x8];
5686
Matan Barakb4ff3a32016-02-09 14:57:42 +02005687 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005688
5689 u8 eqe[64][0x8];
5690};
5691
5692struct mlx5_ifc_gen_eq_out_bits {
5693 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005694 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005695
5696 u8 syndrome[0x20];
5697
Matan Barakb4ff3a32016-02-09 14:57:42 +02005698 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005699};
5700
5701struct mlx5_ifc_enable_hca_out_bits {
5702 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005703 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005704
5705 u8 syndrome[0x20];
5706
Matan Barakb4ff3a32016-02-09 14:57:42 +02005707 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005708};
5709
5710struct mlx5_ifc_enable_hca_in_bits {
5711 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005712 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005713
Matan Barakb4ff3a32016-02-09 14:57:42 +02005714 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005715 u8 op_mod[0x10];
5716
Matan Barakb4ff3a32016-02-09 14:57:42 +02005717 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005718 u8 function_id[0x10];
5719
Matan Barakb4ff3a32016-02-09 14:57:42 +02005720 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005721};
5722
5723struct mlx5_ifc_drain_dct_out_bits {
5724 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005725 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005726
5727 u8 syndrome[0x20];
5728
Matan Barakb4ff3a32016-02-09 14:57:42 +02005729 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005730};
5731
5732struct mlx5_ifc_drain_dct_in_bits {
5733 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005734 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005735
Matan Barakb4ff3a32016-02-09 14:57:42 +02005736 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005737 u8 op_mod[0x10];
5738
Matan Barakb4ff3a32016-02-09 14:57:42 +02005739 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005740 u8 dctn[0x18];
5741
Matan Barakb4ff3a32016-02-09 14:57:42 +02005742 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005743};
5744
5745struct mlx5_ifc_disable_hca_out_bits {
5746 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005747 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005748
5749 u8 syndrome[0x20];
5750
Matan Barakb4ff3a32016-02-09 14:57:42 +02005751 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005752};
5753
5754struct mlx5_ifc_disable_hca_in_bits {
5755 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005756 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005757
Matan Barakb4ff3a32016-02-09 14:57:42 +02005758 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005759 u8 op_mod[0x10];
5760
Matan Barakb4ff3a32016-02-09 14:57:42 +02005761 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005762 u8 function_id[0x10];
5763
Matan Barakb4ff3a32016-02-09 14:57:42 +02005764 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005765};
5766
5767struct mlx5_ifc_detach_from_mcg_out_bits {
5768 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005769 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005770
5771 u8 syndrome[0x20];
5772
Matan Barakb4ff3a32016-02-09 14:57:42 +02005773 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005774};
5775
5776struct mlx5_ifc_detach_from_mcg_in_bits {
5777 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005778 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005779
Matan Barakb4ff3a32016-02-09 14:57:42 +02005780 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005781 u8 op_mod[0x10];
5782
Matan Barakb4ff3a32016-02-09 14:57:42 +02005783 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005784 u8 qpn[0x18];
5785
Matan Barakb4ff3a32016-02-09 14:57:42 +02005786 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005787
5788 u8 multicast_gid[16][0x8];
5789};
5790
Saeed Mahameed74862162016-06-09 15:11:34 +03005791struct mlx5_ifc_destroy_xrq_out_bits {
5792 u8 status[0x8];
5793 u8 reserved_at_8[0x18];
5794
5795 u8 syndrome[0x20];
5796
5797 u8 reserved_at_40[0x40];
5798};
5799
5800struct mlx5_ifc_destroy_xrq_in_bits {
5801 u8 opcode[0x10];
5802 u8 reserved_at_10[0x10];
5803
5804 u8 reserved_at_20[0x10];
5805 u8 op_mod[0x10];
5806
5807 u8 reserved_at_40[0x8];
5808 u8 xrqn[0x18];
5809
5810 u8 reserved_at_60[0x20];
5811};
5812
Saeed Mahameede2816822015-05-28 22:28:40 +03005813struct mlx5_ifc_destroy_xrc_srq_out_bits {
5814 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005815 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005816
5817 u8 syndrome[0x20];
5818
Matan Barakb4ff3a32016-02-09 14:57:42 +02005819 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005820};
5821
5822struct mlx5_ifc_destroy_xrc_srq_in_bits {
5823 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005824 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005825
Matan Barakb4ff3a32016-02-09 14:57:42 +02005826 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005827 u8 op_mod[0x10];
5828
Matan Barakb4ff3a32016-02-09 14:57:42 +02005829 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005830 u8 xrc_srqn[0x18];
5831
Matan Barakb4ff3a32016-02-09 14:57:42 +02005832 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005833};
5834
5835struct mlx5_ifc_destroy_tis_out_bits {
5836 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005837 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005838
5839 u8 syndrome[0x20];
5840
Matan Barakb4ff3a32016-02-09 14:57:42 +02005841 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005842};
5843
5844struct mlx5_ifc_destroy_tis_in_bits {
5845 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005846 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005847
Matan Barakb4ff3a32016-02-09 14:57:42 +02005848 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005849 u8 op_mod[0x10];
5850
Matan Barakb4ff3a32016-02-09 14:57:42 +02005851 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005852 u8 tisn[0x18];
5853
Matan Barakb4ff3a32016-02-09 14:57:42 +02005854 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005855};
5856
5857struct mlx5_ifc_destroy_tir_out_bits {
5858 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005859 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005860
5861 u8 syndrome[0x20];
5862
Matan Barakb4ff3a32016-02-09 14:57:42 +02005863 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005864};
5865
5866struct mlx5_ifc_destroy_tir_in_bits {
5867 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005868 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005869
Matan Barakb4ff3a32016-02-09 14:57:42 +02005870 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005871 u8 op_mod[0x10];
5872
Matan Barakb4ff3a32016-02-09 14:57:42 +02005873 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005874 u8 tirn[0x18];
5875
Matan Barakb4ff3a32016-02-09 14:57:42 +02005876 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005877};
5878
5879struct mlx5_ifc_destroy_srq_out_bits {
5880 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005881 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005882
5883 u8 syndrome[0x20];
5884
Matan Barakb4ff3a32016-02-09 14:57:42 +02005885 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005886};
5887
5888struct mlx5_ifc_destroy_srq_in_bits {
5889 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005890 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005891
Matan Barakb4ff3a32016-02-09 14:57:42 +02005892 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005893 u8 op_mod[0x10];
5894
Matan Barakb4ff3a32016-02-09 14:57:42 +02005895 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005896 u8 srqn[0x18];
5897
Matan Barakb4ff3a32016-02-09 14:57:42 +02005898 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005899};
5900
5901struct mlx5_ifc_destroy_sq_out_bits {
5902 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005903 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005904
5905 u8 syndrome[0x20];
5906
Matan Barakb4ff3a32016-02-09 14:57:42 +02005907 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005908};
5909
5910struct mlx5_ifc_destroy_sq_in_bits {
5911 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005912 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005913
Matan Barakb4ff3a32016-02-09 14:57:42 +02005914 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005915 u8 op_mod[0x10];
5916
Matan Barakb4ff3a32016-02-09 14:57:42 +02005917 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005918 u8 sqn[0x18];
5919
Matan Barakb4ff3a32016-02-09 14:57:42 +02005920 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005921};
5922
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +03005923struct mlx5_ifc_destroy_scheduling_element_out_bits {
5924 u8 status[0x8];
5925 u8 reserved_at_8[0x18];
5926
5927 u8 syndrome[0x20];
5928
5929 u8 reserved_at_40[0x1c0];
5930};
5931
5932struct mlx5_ifc_destroy_scheduling_element_in_bits {
5933 u8 opcode[0x10];
5934 u8 reserved_at_10[0x10];
5935
5936 u8 reserved_at_20[0x10];
5937 u8 op_mod[0x10];
5938
5939 u8 scheduling_hierarchy[0x8];
5940 u8 reserved_at_48[0x18];
5941
5942 u8 scheduling_element_id[0x20];
5943
5944 u8 reserved_at_80[0x180];
5945};
5946
Saeed Mahameede2816822015-05-28 22:28:40 +03005947struct mlx5_ifc_destroy_rqt_out_bits {
5948 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005949 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005950
5951 u8 syndrome[0x20];
5952
Matan Barakb4ff3a32016-02-09 14:57:42 +02005953 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005954};
5955
5956struct mlx5_ifc_destroy_rqt_in_bits {
5957 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005958 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005959
Matan Barakb4ff3a32016-02-09 14:57:42 +02005960 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005961 u8 op_mod[0x10];
5962
Matan Barakb4ff3a32016-02-09 14:57:42 +02005963 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005964 u8 rqtn[0x18];
5965
Matan Barakb4ff3a32016-02-09 14:57:42 +02005966 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005967};
5968
5969struct mlx5_ifc_destroy_rq_out_bits {
5970 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005971 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005972
5973 u8 syndrome[0x20];
5974
Matan Barakb4ff3a32016-02-09 14:57:42 +02005975 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005976};
5977
5978struct mlx5_ifc_destroy_rq_in_bits {
5979 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005980 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005981
Matan Barakb4ff3a32016-02-09 14:57:42 +02005982 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005983 u8 op_mod[0x10];
5984
Matan Barakb4ff3a32016-02-09 14:57:42 +02005985 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005986 u8 rqn[0x18];
5987
Matan Barakb4ff3a32016-02-09 14:57:42 +02005988 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005989};
5990
Maor Gottliebc1e0bfc2017-05-30 10:29:11 +03005991struct mlx5_ifc_set_delay_drop_params_in_bits {
5992 u8 opcode[0x10];
5993 u8 reserved_at_10[0x10];
5994
5995 u8 reserved_at_20[0x10];
5996 u8 op_mod[0x10];
5997
5998 u8 reserved_at_40[0x20];
5999
6000 u8 reserved_at_60[0x10];
6001 u8 delay_drop_timeout[0x10];
6002};
6003
6004struct mlx5_ifc_set_delay_drop_params_out_bits {
6005 u8 status[0x8];
6006 u8 reserved_at_8[0x18];
6007
6008 u8 syndrome[0x20];
6009
6010 u8 reserved_at_40[0x40];
6011};
6012
Saeed Mahameede2816822015-05-28 22:28:40 +03006013struct mlx5_ifc_destroy_rmp_out_bits {
6014 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006015 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006016
6017 u8 syndrome[0x20];
6018
Matan Barakb4ff3a32016-02-09 14:57:42 +02006019 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006020};
6021
6022struct mlx5_ifc_destroy_rmp_in_bits {
6023 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006024 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006025
Matan Barakb4ff3a32016-02-09 14:57:42 +02006026 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006027 u8 op_mod[0x10];
6028
Matan Barakb4ff3a32016-02-09 14:57:42 +02006029 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006030 u8 rmpn[0x18];
6031
Matan Barakb4ff3a32016-02-09 14:57:42 +02006032 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006033};
6034
6035struct mlx5_ifc_destroy_qp_out_bits {
6036 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006037 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006038
6039 u8 syndrome[0x20];
6040
Matan Barakb4ff3a32016-02-09 14:57:42 +02006041 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006042};
6043
6044struct mlx5_ifc_destroy_qp_in_bits {
6045 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006046 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006047
Matan Barakb4ff3a32016-02-09 14:57:42 +02006048 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006049 u8 op_mod[0x10];
6050
Matan Barakb4ff3a32016-02-09 14:57:42 +02006051 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006052 u8 qpn[0x18];
6053
Matan Barakb4ff3a32016-02-09 14:57:42 +02006054 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006055};
6056
6057struct mlx5_ifc_destroy_psv_out_bits {
6058 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006059 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006060
6061 u8 syndrome[0x20];
6062
Matan Barakb4ff3a32016-02-09 14:57:42 +02006063 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006064};
6065
6066struct mlx5_ifc_destroy_psv_in_bits {
6067 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006068 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006069
Matan Barakb4ff3a32016-02-09 14:57:42 +02006070 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006071 u8 op_mod[0x10];
6072
Matan Barakb4ff3a32016-02-09 14:57:42 +02006073 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006074 u8 psvn[0x18];
6075
Matan Barakb4ff3a32016-02-09 14:57:42 +02006076 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006077};
6078
6079struct mlx5_ifc_destroy_mkey_out_bits {
6080 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006081 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006082
6083 u8 syndrome[0x20];
6084
Matan Barakb4ff3a32016-02-09 14:57:42 +02006085 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006086};
6087
6088struct mlx5_ifc_destroy_mkey_in_bits {
6089 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006090 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006091
Matan Barakb4ff3a32016-02-09 14:57:42 +02006092 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006093 u8 op_mod[0x10];
6094
Matan Barakb4ff3a32016-02-09 14:57:42 +02006095 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006096 u8 mkey_index[0x18];
6097
Matan Barakb4ff3a32016-02-09 14:57:42 +02006098 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006099};
6100
6101struct mlx5_ifc_destroy_flow_table_out_bits {
6102 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006103 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006104
6105 u8 syndrome[0x20];
6106
Matan Barakb4ff3a32016-02-09 14:57:42 +02006107 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006108};
6109
6110struct mlx5_ifc_destroy_flow_table_in_bits {
6111 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006112 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006113
Matan Barakb4ff3a32016-02-09 14:57:42 +02006114 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006115 u8 op_mod[0x10];
6116
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03006117 u8 other_vport[0x1];
6118 u8 reserved_at_41[0xf];
6119 u8 vport_number[0x10];
6120
6121 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006122
6123 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006124 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006125
Matan Barakb4ff3a32016-02-09 14:57:42 +02006126 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006127 u8 table_id[0x18];
6128
Matan Barakb4ff3a32016-02-09 14:57:42 +02006129 u8 reserved_at_c0[0x140];
Saeed Mahameede2816822015-05-28 22:28:40 +03006130};
6131
6132struct mlx5_ifc_destroy_flow_group_out_bits {
6133 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006134 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006135
6136 u8 syndrome[0x20];
6137
Matan Barakb4ff3a32016-02-09 14:57:42 +02006138 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006139};
6140
6141struct mlx5_ifc_destroy_flow_group_in_bits {
6142 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006143 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006144
Matan Barakb4ff3a32016-02-09 14:57:42 +02006145 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006146 u8 op_mod[0x10];
6147
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03006148 u8 other_vport[0x1];
6149 u8 reserved_at_41[0xf];
6150 u8 vport_number[0x10];
6151
6152 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006153
6154 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006155 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006156
Matan Barakb4ff3a32016-02-09 14:57:42 +02006157 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006158 u8 table_id[0x18];
6159
6160 u8 group_id[0x20];
6161
Matan Barakb4ff3a32016-02-09 14:57:42 +02006162 u8 reserved_at_e0[0x120];
Saeed Mahameede2816822015-05-28 22:28:40 +03006163};
6164
6165struct mlx5_ifc_destroy_eq_out_bits {
6166 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006167 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006168
6169 u8 syndrome[0x20];
6170
Matan Barakb4ff3a32016-02-09 14:57:42 +02006171 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006172};
6173
6174struct mlx5_ifc_destroy_eq_in_bits {
6175 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006176 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006177
Matan Barakb4ff3a32016-02-09 14:57:42 +02006178 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006179 u8 op_mod[0x10];
6180
Matan Barakb4ff3a32016-02-09 14:57:42 +02006181 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006182 u8 eq_number[0x8];
6183
Matan Barakb4ff3a32016-02-09 14:57:42 +02006184 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006185};
6186
6187struct mlx5_ifc_destroy_dct_out_bits {
6188 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006189 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006190
6191 u8 syndrome[0x20];
6192
Matan Barakb4ff3a32016-02-09 14:57:42 +02006193 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006194};
6195
6196struct mlx5_ifc_destroy_dct_in_bits {
6197 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006198 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006199
Matan Barakb4ff3a32016-02-09 14:57:42 +02006200 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006201 u8 op_mod[0x10];
6202
Matan Barakb4ff3a32016-02-09 14:57:42 +02006203 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006204 u8 dctn[0x18];
6205
Matan Barakb4ff3a32016-02-09 14:57:42 +02006206 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006207};
6208
6209struct mlx5_ifc_destroy_cq_out_bits {
6210 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006211 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006212
6213 u8 syndrome[0x20];
6214
Matan Barakb4ff3a32016-02-09 14:57:42 +02006215 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006216};
6217
6218struct mlx5_ifc_destroy_cq_in_bits {
6219 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006220 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006221
Matan Barakb4ff3a32016-02-09 14:57:42 +02006222 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006223 u8 op_mod[0x10];
6224
Matan Barakb4ff3a32016-02-09 14:57:42 +02006225 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006226 u8 cqn[0x18];
6227
Matan Barakb4ff3a32016-02-09 14:57:42 +02006228 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006229};
6230
6231struct mlx5_ifc_delete_vxlan_udp_dport_out_bits {
6232 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006233 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006234
6235 u8 syndrome[0x20];
6236
Matan Barakb4ff3a32016-02-09 14:57:42 +02006237 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006238};
6239
6240struct mlx5_ifc_delete_vxlan_udp_dport_in_bits {
6241 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006242 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006243
Matan Barakb4ff3a32016-02-09 14:57:42 +02006244 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006245 u8 op_mod[0x10];
6246
Matan Barakb4ff3a32016-02-09 14:57:42 +02006247 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006248
Matan Barakb4ff3a32016-02-09 14:57:42 +02006249 u8 reserved_at_60[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006250 u8 vxlan_udp_port[0x10];
6251};
6252
6253struct mlx5_ifc_delete_l2_table_entry_out_bits {
6254 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006255 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006256
6257 u8 syndrome[0x20];
6258
Matan Barakb4ff3a32016-02-09 14:57:42 +02006259 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006260};
6261
6262struct mlx5_ifc_delete_l2_table_entry_in_bits {
6263 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006264 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006265
Matan Barakb4ff3a32016-02-09 14:57:42 +02006266 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006267 u8 op_mod[0x10];
6268
Matan Barakb4ff3a32016-02-09 14:57:42 +02006269 u8 reserved_at_40[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03006270
Matan Barakb4ff3a32016-02-09 14:57:42 +02006271 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006272 u8 table_index[0x18];
6273
Matan Barakb4ff3a32016-02-09 14:57:42 +02006274 u8 reserved_at_c0[0x140];
Saeed Mahameede2816822015-05-28 22:28:40 +03006275};
6276
6277struct mlx5_ifc_delete_fte_out_bits {
6278 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006279 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006280
6281 u8 syndrome[0x20];
6282
Matan Barakb4ff3a32016-02-09 14:57:42 +02006283 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006284};
6285
6286struct mlx5_ifc_delete_fte_in_bits {
6287 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006288 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006289
Matan Barakb4ff3a32016-02-09 14:57:42 +02006290 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006291 u8 op_mod[0x10];
6292
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03006293 u8 other_vport[0x1];
6294 u8 reserved_at_41[0xf];
6295 u8 vport_number[0x10];
6296
6297 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006298
6299 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006300 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006301
Matan Barakb4ff3a32016-02-09 14:57:42 +02006302 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006303 u8 table_id[0x18];
6304
Matan Barakb4ff3a32016-02-09 14:57:42 +02006305 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006306
6307 u8 flow_index[0x20];
6308
Matan Barakb4ff3a32016-02-09 14:57:42 +02006309 u8 reserved_at_120[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03006310};
6311
6312struct mlx5_ifc_dealloc_xrcd_out_bits {
6313 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006314 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006315
6316 u8 syndrome[0x20];
6317
Matan Barakb4ff3a32016-02-09 14:57:42 +02006318 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006319};
6320
6321struct mlx5_ifc_dealloc_xrcd_in_bits {
6322 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006323 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006324
Matan Barakb4ff3a32016-02-09 14:57:42 +02006325 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006326 u8 op_mod[0x10];
6327
Matan Barakb4ff3a32016-02-09 14:57:42 +02006328 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006329 u8 xrcd[0x18];
6330
Matan Barakb4ff3a32016-02-09 14:57:42 +02006331 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006332};
6333
6334struct mlx5_ifc_dealloc_uar_out_bits {
6335 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006336 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006337
6338 u8 syndrome[0x20];
6339
Matan Barakb4ff3a32016-02-09 14:57:42 +02006340 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006341};
6342
6343struct mlx5_ifc_dealloc_uar_in_bits {
6344 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006345 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006346
Matan Barakb4ff3a32016-02-09 14:57:42 +02006347 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006348 u8 op_mod[0x10];
6349
Matan Barakb4ff3a32016-02-09 14:57:42 +02006350 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006351 u8 uar[0x18];
6352
Matan Barakb4ff3a32016-02-09 14:57:42 +02006353 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006354};
6355
6356struct mlx5_ifc_dealloc_transport_domain_out_bits {
6357 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006358 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006359
6360 u8 syndrome[0x20];
6361
Matan Barakb4ff3a32016-02-09 14:57:42 +02006362 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006363};
6364
6365struct mlx5_ifc_dealloc_transport_domain_in_bits {
6366 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006367 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006368
Matan Barakb4ff3a32016-02-09 14:57:42 +02006369 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006370 u8 op_mod[0x10];
6371
Matan Barakb4ff3a32016-02-09 14:57:42 +02006372 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006373 u8 transport_domain[0x18];
6374
Matan Barakb4ff3a32016-02-09 14:57:42 +02006375 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006376};
6377
6378struct mlx5_ifc_dealloc_q_counter_out_bits {
6379 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006380 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006381
6382 u8 syndrome[0x20];
6383
Matan Barakb4ff3a32016-02-09 14:57:42 +02006384 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006385};
6386
6387struct mlx5_ifc_dealloc_q_counter_in_bits {
6388 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006389 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006390
Matan Barakb4ff3a32016-02-09 14:57:42 +02006391 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006392 u8 op_mod[0x10];
6393
Matan Barakb4ff3a32016-02-09 14:57:42 +02006394 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006395 u8 counter_set_id[0x8];
6396
Matan Barakb4ff3a32016-02-09 14:57:42 +02006397 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006398};
6399
6400struct mlx5_ifc_dealloc_pd_out_bits {
6401 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006402 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006403
6404 u8 syndrome[0x20];
6405
Matan Barakb4ff3a32016-02-09 14:57:42 +02006406 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006407};
6408
6409struct mlx5_ifc_dealloc_pd_in_bits {
6410 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006411 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006412
Matan Barakb4ff3a32016-02-09 14:57:42 +02006413 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006414 u8 op_mod[0x10];
6415
Matan Barakb4ff3a32016-02-09 14:57:42 +02006416 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006417 u8 pd[0x18];
6418
Matan Barakb4ff3a32016-02-09 14:57:42 +02006419 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006420};
6421
Amir Vadai9dc0b282016-05-13 12:55:39 +00006422struct mlx5_ifc_dealloc_flow_counter_out_bits {
6423 u8 status[0x8];
6424 u8 reserved_at_8[0x18];
6425
6426 u8 syndrome[0x20];
6427
6428 u8 reserved_at_40[0x40];
6429};
6430
6431struct mlx5_ifc_dealloc_flow_counter_in_bits {
6432 u8 opcode[0x10];
6433 u8 reserved_at_10[0x10];
6434
6435 u8 reserved_at_20[0x10];
6436 u8 op_mod[0x10];
6437
Rabie Louloua8ffcc72017-07-09 13:39:30 +03006438 u8 flow_counter_id[0x20];
Amir Vadai9dc0b282016-05-13 12:55:39 +00006439
6440 u8 reserved_at_60[0x20];
6441};
6442
Saeed Mahameed74862162016-06-09 15:11:34 +03006443struct mlx5_ifc_create_xrq_out_bits {
6444 u8 status[0x8];
6445 u8 reserved_at_8[0x18];
6446
6447 u8 syndrome[0x20];
6448
6449 u8 reserved_at_40[0x8];
6450 u8 xrqn[0x18];
6451
6452 u8 reserved_at_60[0x20];
6453};
6454
6455struct mlx5_ifc_create_xrq_in_bits {
6456 u8 opcode[0x10];
6457 u8 reserved_at_10[0x10];
6458
6459 u8 reserved_at_20[0x10];
6460 u8 op_mod[0x10];
6461
6462 u8 reserved_at_40[0x40];
6463
6464 struct mlx5_ifc_xrqc_bits xrq_context;
6465};
6466
Saeed Mahameede2816822015-05-28 22:28:40 +03006467struct mlx5_ifc_create_xrc_srq_out_bits {
6468 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006469 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006470
6471 u8 syndrome[0x20];
6472
Matan Barakb4ff3a32016-02-09 14:57:42 +02006473 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006474 u8 xrc_srqn[0x18];
6475
Matan Barakb4ff3a32016-02-09 14:57:42 +02006476 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006477};
6478
6479struct mlx5_ifc_create_xrc_srq_in_bits {
6480 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006481 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006482
Matan Barakb4ff3a32016-02-09 14:57:42 +02006483 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006484 u8 op_mod[0x10];
6485
Matan Barakb4ff3a32016-02-09 14:57:42 +02006486 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006487
6488 struct mlx5_ifc_xrc_srqc_bits xrc_srq_context_entry;
6489
Matan Barakb4ff3a32016-02-09 14:57:42 +02006490 u8 reserved_at_280[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03006491
6492 u8 pas[0][0x40];
6493};
6494
6495struct mlx5_ifc_create_tis_out_bits {
6496 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006497 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006498
6499 u8 syndrome[0x20];
6500
Matan Barakb4ff3a32016-02-09 14:57:42 +02006501 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006502 u8 tisn[0x18];
6503
Matan Barakb4ff3a32016-02-09 14:57:42 +02006504 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006505};
6506
6507struct mlx5_ifc_create_tis_in_bits {
6508 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006509 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006510
Matan Barakb4ff3a32016-02-09 14:57:42 +02006511 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006512 u8 op_mod[0x10];
6513
Matan Barakb4ff3a32016-02-09 14:57:42 +02006514 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03006515
6516 struct mlx5_ifc_tisc_bits ctx;
6517};
6518
6519struct mlx5_ifc_create_tir_out_bits {
6520 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006521 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006522
6523 u8 syndrome[0x20];
6524
Matan Barakb4ff3a32016-02-09 14:57:42 +02006525 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006526 u8 tirn[0x18];
6527
Matan Barakb4ff3a32016-02-09 14:57:42 +02006528 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006529};
6530
6531struct mlx5_ifc_create_tir_in_bits {
6532 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006533 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006534
Matan Barakb4ff3a32016-02-09 14:57:42 +02006535 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006536 u8 op_mod[0x10];
6537
Matan Barakb4ff3a32016-02-09 14:57:42 +02006538 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03006539
6540 struct mlx5_ifc_tirc_bits ctx;
6541};
6542
6543struct mlx5_ifc_create_srq_out_bits {
6544 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006545 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006546
6547 u8 syndrome[0x20];
6548
Matan Barakb4ff3a32016-02-09 14:57:42 +02006549 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006550 u8 srqn[0x18];
6551
Matan Barakb4ff3a32016-02-09 14:57:42 +02006552 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006553};
6554
6555struct mlx5_ifc_create_srq_in_bits {
6556 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006557 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006558
Matan Barakb4ff3a32016-02-09 14:57:42 +02006559 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006560 u8 op_mod[0x10];
6561
Matan Barakb4ff3a32016-02-09 14:57:42 +02006562 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006563
6564 struct mlx5_ifc_srqc_bits srq_context_entry;
6565
Matan Barakb4ff3a32016-02-09 14:57:42 +02006566 u8 reserved_at_280[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03006567
6568 u8 pas[0][0x40];
6569};
6570
6571struct mlx5_ifc_create_sq_out_bits {
6572 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006573 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006574
6575 u8 syndrome[0x20];
6576
Matan Barakb4ff3a32016-02-09 14:57:42 +02006577 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006578 u8 sqn[0x18];
6579
Matan Barakb4ff3a32016-02-09 14:57:42 +02006580 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006581};
6582
6583struct mlx5_ifc_create_sq_in_bits {
6584 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006585 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006586
Matan Barakb4ff3a32016-02-09 14:57:42 +02006587 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006588 u8 op_mod[0x10];
6589
Matan Barakb4ff3a32016-02-09 14:57:42 +02006590 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03006591
6592 struct mlx5_ifc_sqc_bits ctx;
6593};
6594
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +03006595struct mlx5_ifc_create_scheduling_element_out_bits {
6596 u8 status[0x8];
6597 u8 reserved_at_8[0x18];
6598
6599 u8 syndrome[0x20];
6600
6601 u8 reserved_at_40[0x40];
6602
6603 u8 scheduling_element_id[0x20];
6604
6605 u8 reserved_at_a0[0x160];
6606};
6607
6608struct mlx5_ifc_create_scheduling_element_in_bits {
6609 u8 opcode[0x10];
6610 u8 reserved_at_10[0x10];
6611
6612 u8 reserved_at_20[0x10];
6613 u8 op_mod[0x10];
6614
6615 u8 scheduling_hierarchy[0x8];
6616 u8 reserved_at_48[0x18];
6617
6618 u8 reserved_at_60[0xa0];
6619
6620 struct mlx5_ifc_scheduling_context_bits scheduling_context;
6621
6622 u8 reserved_at_300[0x100];
6623};
6624
Saeed Mahameede2816822015-05-28 22:28:40 +03006625struct mlx5_ifc_create_rqt_out_bits {
6626 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006627 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006628
6629 u8 syndrome[0x20];
6630
Matan Barakb4ff3a32016-02-09 14:57:42 +02006631 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006632 u8 rqtn[0x18];
6633
Matan Barakb4ff3a32016-02-09 14:57:42 +02006634 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006635};
6636
6637struct mlx5_ifc_create_rqt_in_bits {
6638 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006639 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006640
Matan Barakb4ff3a32016-02-09 14:57:42 +02006641 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006642 u8 op_mod[0x10];
6643
Matan Barakb4ff3a32016-02-09 14:57:42 +02006644 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03006645
6646 struct mlx5_ifc_rqtc_bits rqt_context;
6647};
6648
6649struct mlx5_ifc_create_rq_out_bits {
6650 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006651 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006652
6653 u8 syndrome[0x20];
6654
Matan Barakb4ff3a32016-02-09 14:57:42 +02006655 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006656 u8 rqn[0x18];
6657
Matan Barakb4ff3a32016-02-09 14:57:42 +02006658 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006659};
6660
6661struct mlx5_ifc_create_rq_in_bits {
6662 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006663 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006664
Matan Barakb4ff3a32016-02-09 14:57:42 +02006665 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006666 u8 op_mod[0x10];
6667
Matan Barakb4ff3a32016-02-09 14:57:42 +02006668 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03006669
6670 struct mlx5_ifc_rqc_bits ctx;
6671};
6672
6673struct mlx5_ifc_create_rmp_out_bits {
6674 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006675 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006676
6677 u8 syndrome[0x20];
6678
Matan Barakb4ff3a32016-02-09 14:57:42 +02006679 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006680 u8 rmpn[0x18];
6681
Matan Barakb4ff3a32016-02-09 14:57:42 +02006682 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006683};
6684
6685struct mlx5_ifc_create_rmp_in_bits {
6686 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006687 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006688
Matan Barakb4ff3a32016-02-09 14:57:42 +02006689 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006690 u8 op_mod[0x10];
6691
Matan Barakb4ff3a32016-02-09 14:57:42 +02006692 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03006693
6694 struct mlx5_ifc_rmpc_bits ctx;
6695};
6696
6697struct mlx5_ifc_create_qp_out_bits {
6698 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006699 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006700
6701 u8 syndrome[0x20];
6702
Matan Barakb4ff3a32016-02-09 14:57:42 +02006703 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006704 u8 qpn[0x18];
6705
Matan Barakb4ff3a32016-02-09 14:57:42 +02006706 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006707};
6708
6709struct mlx5_ifc_create_qp_in_bits {
6710 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006711 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006712
Matan Barakb4ff3a32016-02-09 14:57:42 +02006713 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006714 u8 op_mod[0x10];
6715
Matan Barakb4ff3a32016-02-09 14:57:42 +02006716 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006717
6718 u8 opt_param_mask[0x20];
6719
Matan Barakb4ff3a32016-02-09 14:57:42 +02006720 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006721
6722 struct mlx5_ifc_qpc_bits qpc;
6723
Matan Barakb4ff3a32016-02-09 14:57:42 +02006724 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03006725
6726 u8 pas[0][0x40];
6727};
6728
6729struct mlx5_ifc_create_psv_out_bits {
6730 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006731 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006732
6733 u8 syndrome[0x20];
6734
Matan Barakb4ff3a32016-02-09 14:57:42 +02006735 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006736
Matan Barakb4ff3a32016-02-09 14:57:42 +02006737 u8 reserved_at_80[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006738 u8 psv0_index[0x18];
6739
Matan Barakb4ff3a32016-02-09 14:57:42 +02006740 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006741 u8 psv1_index[0x18];
6742
Matan Barakb4ff3a32016-02-09 14:57:42 +02006743 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006744 u8 psv2_index[0x18];
6745
Matan Barakb4ff3a32016-02-09 14:57:42 +02006746 u8 reserved_at_e0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006747 u8 psv3_index[0x18];
6748};
6749
6750struct mlx5_ifc_create_psv_in_bits {
6751 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006752 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006753
Matan Barakb4ff3a32016-02-09 14:57:42 +02006754 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006755 u8 op_mod[0x10];
6756
6757 u8 num_psv[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006758 u8 reserved_at_44[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03006759 u8 pd[0x18];
6760
Matan Barakb4ff3a32016-02-09 14:57:42 +02006761 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006762};
6763
6764struct mlx5_ifc_create_mkey_out_bits {
6765 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006766 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006767
6768 u8 syndrome[0x20];
6769
Matan Barakb4ff3a32016-02-09 14:57:42 +02006770 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006771 u8 mkey_index[0x18];
6772
Matan Barakb4ff3a32016-02-09 14:57:42 +02006773 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006774};
6775
6776struct mlx5_ifc_create_mkey_in_bits {
6777 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006778 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006779
Matan Barakb4ff3a32016-02-09 14:57:42 +02006780 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006781 u8 op_mod[0x10];
6782
Matan Barakb4ff3a32016-02-09 14:57:42 +02006783 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006784
6785 u8 pg_access[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006786 u8 reserved_at_61[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03006787
6788 struct mlx5_ifc_mkc_bits memory_key_mkey_entry;
6789
Matan Barakb4ff3a32016-02-09 14:57:42 +02006790 u8 reserved_at_280[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03006791
6792 u8 translations_octword_actual_size[0x20];
6793
Matan Barakb4ff3a32016-02-09 14:57:42 +02006794 u8 reserved_at_320[0x560];
Saeed Mahameede2816822015-05-28 22:28:40 +03006795
6796 u8 klm_pas_mtt[0][0x20];
6797};
6798
6799struct mlx5_ifc_create_flow_table_out_bits {
6800 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006801 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006802
6803 u8 syndrome[0x20];
6804
Matan Barakb4ff3a32016-02-09 14:57:42 +02006805 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006806 u8 table_id[0x18];
6807
Matan Barakb4ff3a32016-02-09 14:57:42 +02006808 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006809};
6810
Maor Gottlieb0c90e9c2017-03-12 11:35:23 +02006811struct mlx5_ifc_flow_table_context_bits {
6812 u8 encap_en[0x1];
6813 u8 decap_en[0x1];
6814 u8 reserved_at_2[0x2];
6815 u8 table_miss_action[0x4];
6816 u8 level[0x8];
6817 u8 reserved_at_10[0x8];
6818 u8 log_size[0x8];
6819
6820 u8 reserved_at_20[0x8];
6821 u8 table_miss_id[0x18];
6822
6823 u8 reserved_at_40[0x8];
6824 u8 lag_master_next_table_id[0x18];
6825
6826 u8 reserved_at_60[0xe0];
6827};
6828
Saeed Mahameede2816822015-05-28 22:28:40 +03006829struct mlx5_ifc_create_flow_table_in_bits {
6830 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006831 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006832
Matan Barakb4ff3a32016-02-09 14:57:42 +02006833 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006834 u8 op_mod[0x10];
6835
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03006836 u8 other_vport[0x1];
6837 u8 reserved_at_41[0xf];
6838 u8 vport_number[0x10];
6839
6840 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006841
6842 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006843 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006844
Matan Barakb4ff3a32016-02-09 14:57:42 +02006845 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006846
Maor Gottlieb0c90e9c2017-03-12 11:35:23 +02006847 struct mlx5_ifc_flow_table_context_bits flow_table_context;
Saeed Mahameede2816822015-05-28 22:28:40 +03006848};
6849
6850struct mlx5_ifc_create_flow_group_out_bits {
6851 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006852 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006853
6854 u8 syndrome[0x20];
6855
Matan Barakb4ff3a32016-02-09 14:57:42 +02006856 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006857 u8 group_id[0x18];
6858
Matan Barakb4ff3a32016-02-09 14:57:42 +02006859 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006860};
6861
6862enum {
6863 MLX5_CREATE_FLOW_GROUP_IN_MATCH_CRITERIA_ENABLE_OUTER_HEADERS = 0x0,
6864 MLX5_CREATE_FLOW_GROUP_IN_MATCH_CRITERIA_ENABLE_MISC_PARAMETERS = 0x1,
6865 MLX5_CREATE_FLOW_GROUP_IN_MATCH_CRITERIA_ENABLE_INNER_HEADERS = 0x2,
6866};
6867
6868struct mlx5_ifc_create_flow_group_in_bits {
6869 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006870 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006871
Matan Barakb4ff3a32016-02-09 14:57:42 +02006872 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006873 u8 op_mod[0x10];
6874
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03006875 u8 other_vport[0x1];
6876 u8 reserved_at_41[0xf];
6877 u8 vport_number[0x10];
6878
6879 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006880
6881 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006882 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006883
Matan Barakb4ff3a32016-02-09 14:57:42 +02006884 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006885 u8 table_id[0x18];
6886
Matan Barakb4ff3a32016-02-09 14:57:42 +02006887 u8 reserved_at_c0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006888
6889 u8 start_flow_index[0x20];
6890
Matan Barakb4ff3a32016-02-09 14:57:42 +02006891 u8 reserved_at_100[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006892
6893 u8 end_flow_index[0x20];
6894
Matan Barakb4ff3a32016-02-09 14:57:42 +02006895 u8 reserved_at_140[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03006896
Matan Barakb4ff3a32016-02-09 14:57:42 +02006897 u8 reserved_at_1e0[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006898 u8 match_criteria_enable[0x8];
6899
6900 struct mlx5_ifc_fte_match_param_bits match_criteria;
6901
Matan Barakb4ff3a32016-02-09 14:57:42 +02006902 u8 reserved_at_1200[0xe00];
Saeed Mahameede2816822015-05-28 22:28:40 +03006903};
6904
6905struct mlx5_ifc_create_eq_out_bits {
6906 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006907 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006908
6909 u8 syndrome[0x20];
6910
Matan Barakb4ff3a32016-02-09 14:57:42 +02006911 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006912 u8 eq_number[0x8];
6913
Matan Barakb4ff3a32016-02-09 14:57:42 +02006914 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006915};
6916
6917struct mlx5_ifc_create_eq_in_bits {
6918 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006919 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006920
Matan Barakb4ff3a32016-02-09 14:57:42 +02006921 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006922 u8 op_mod[0x10];
6923
Matan Barakb4ff3a32016-02-09 14:57:42 +02006924 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006925
6926 struct mlx5_ifc_eqc_bits eq_context_entry;
6927
Matan Barakb4ff3a32016-02-09 14:57:42 +02006928 u8 reserved_at_280[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006929
6930 u8 event_bitmask[0x40];
6931
Matan Barakb4ff3a32016-02-09 14:57:42 +02006932 u8 reserved_at_300[0x580];
Saeed Mahameede2816822015-05-28 22:28:40 +03006933
6934 u8 pas[0][0x40];
6935};
6936
6937struct mlx5_ifc_create_dct_out_bits {
6938 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006939 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006940
6941 u8 syndrome[0x20];
6942
Matan Barakb4ff3a32016-02-09 14:57:42 +02006943 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006944 u8 dctn[0x18];
6945
Matan Barakb4ff3a32016-02-09 14:57:42 +02006946 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006947};
6948
6949struct mlx5_ifc_create_dct_in_bits {
6950 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006951 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006952
Matan Barakb4ff3a32016-02-09 14:57:42 +02006953 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006954 u8 op_mod[0x10];
6955
Matan Barakb4ff3a32016-02-09 14:57:42 +02006956 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006957
6958 struct mlx5_ifc_dctc_bits dct_context_entry;
6959
Matan Barakb4ff3a32016-02-09 14:57:42 +02006960 u8 reserved_at_280[0x180];
Saeed Mahameede2816822015-05-28 22:28:40 +03006961};
6962
6963struct mlx5_ifc_create_cq_out_bits {
6964 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006965 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006966
6967 u8 syndrome[0x20];
6968
Matan Barakb4ff3a32016-02-09 14:57:42 +02006969 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006970 u8 cqn[0x18];
6971
Matan Barakb4ff3a32016-02-09 14:57:42 +02006972 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006973};
6974
6975struct mlx5_ifc_create_cq_in_bits {
6976 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006977 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006978
Matan Barakb4ff3a32016-02-09 14:57:42 +02006979 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006980 u8 op_mod[0x10];
6981
Matan Barakb4ff3a32016-02-09 14:57:42 +02006982 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006983
6984 struct mlx5_ifc_cqc_bits cq_context;
6985
Matan Barakb4ff3a32016-02-09 14:57:42 +02006986 u8 reserved_at_280[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03006987
6988 u8 pas[0][0x40];
6989};
6990
6991struct mlx5_ifc_config_int_moderation_out_bits {
6992 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006993 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006994
6995 u8 syndrome[0x20];
6996
Matan Barakb4ff3a32016-02-09 14:57:42 +02006997 u8 reserved_at_40[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03006998 u8 min_delay[0xc];
6999 u8 int_vector[0x10];
7000
Matan Barakb4ff3a32016-02-09 14:57:42 +02007001 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007002};
7003
7004enum {
7005 MLX5_CONFIG_INT_MODERATION_IN_OP_MOD_WRITE = 0x0,
7006 MLX5_CONFIG_INT_MODERATION_IN_OP_MOD_READ = 0x1,
7007};
7008
7009struct mlx5_ifc_config_int_moderation_in_bits {
7010 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007011 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007012
Matan Barakb4ff3a32016-02-09 14:57:42 +02007013 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007014 u8 op_mod[0x10];
7015
Matan Barakb4ff3a32016-02-09 14:57:42 +02007016 u8 reserved_at_40[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007017 u8 min_delay[0xc];
7018 u8 int_vector[0x10];
7019
Matan Barakb4ff3a32016-02-09 14:57:42 +02007020 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007021};
7022
7023struct mlx5_ifc_attach_to_mcg_out_bits {
7024 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007025 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007026
7027 u8 syndrome[0x20];
7028
Matan Barakb4ff3a32016-02-09 14:57:42 +02007029 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007030};
7031
7032struct mlx5_ifc_attach_to_mcg_in_bits {
7033 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007034 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007035
Matan Barakb4ff3a32016-02-09 14:57:42 +02007036 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007037 u8 op_mod[0x10];
7038
Matan Barakb4ff3a32016-02-09 14:57:42 +02007039 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007040 u8 qpn[0x18];
7041
Matan Barakb4ff3a32016-02-09 14:57:42 +02007042 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007043
7044 u8 multicast_gid[16][0x8];
7045};
7046
Saeed Mahameed74862162016-06-09 15:11:34 +03007047struct mlx5_ifc_arm_xrq_out_bits {
7048 u8 status[0x8];
7049 u8 reserved_at_8[0x18];
7050
7051 u8 syndrome[0x20];
7052
7053 u8 reserved_at_40[0x40];
7054};
7055
7056struct mlx5_ifc_arm_xrq_in_bits {
7057 u8 opcode[0x10];
7058 u8 reserved_at_10[0x10];
7059
7060 u8 reserved_at_20[0x10];
7061 u8 op_mod[0x10];
7062
7063 u8 reserved_at_40[0x8];
7064 u8 xrqn[0x18];
7065
7066 u8 reserved_at_60[0x10];
7067 u8 lwm[0x10];
7068};
7069
Saeed Mahameede2816822015-05-28 22:28:40 +03007070struct mlx5_ifc_arm_xrc_srq_out_bits {
7071 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007072 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007073
7074 u8 syndrome[0x20];
7075
Matan Barakb4ff3a32016-02-09 14:57:42 +02007076 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007077};
7078
7079enum {
7080 MLX5_ARM_XRC_SRQ_IN_OP_MOD_XRC_SRQ = 0x1,
7081};
7082
7083struct mlx5_ifc_arm_xrc_srq_in_bits {
7084 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007085 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007086
Matan Barakb4ff3a32016-02-09 14:57:42 +02007087 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007088 u8 op_mod[0x10];
7089
Matan Barakb4ff3a32016-02-09 14:57:42 +02007090 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007091 u8 xrc_srqn[0x18];
7092
Matan Barakb4ff3a32016-02-09 14:57:42 +02007093 u8 reserved_at_60[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007094 u8 lwm[0x10];
7095};
7096
7097struct mlx5_ifc_arm_rq_out_bits {
7098 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007099 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007100
7101 u8 syndrome[0x20];
7102
Matan Barakb4ff3a32016-02-09 14:57:42 +02007103 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007104};
7105
7106enum {
Saeed Mahameed74862162016-06-09 15:11:34 +03007107 MLX5_ARM_RQ_IN_OP_MOD_SRQ = 0x1,
7108 MLX5_ARM_RQ_IN_OP_MOD_XRQ = 0x2,
Saeed Mahameede2816822015-05-28 22:28:40 +03007109};
7110
7111struct mlx5_ifc_arm_rq_in_bits {
7112 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007113 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007114
Matan Barakb4ff3a32016-02-09 14:57:42 +02007115 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007116 u8 op_mod[0x10];
7117
Matan Barakb4ff3a32016-02-09 14:57:42 +02007118 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007119 u8 srq_number[0x18];
7120
Matan Barakb4ff3a32016-02-09 14:57:42 +02007121 u8 reserved_at_60[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007122 u8 lwm[0x10];
7123};
7124
7125struct mlx5_ifc_arm_dct_out_bits {
7126 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007127 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007128
7129 u8 syndrome[0x20];
7130
Matan Barakb4ff3a32016-02-09 14:57:42 +02007131 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007132};
7133
7134struct mlx5_ifc_arm_dct_in_bits {
7135 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007136 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007137
Matan Barakb4ff3a32016-02-09 14:57:42 +02007138 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007139 u8 op_mod[0x10];
7140
Matan Barakb4ff3a32016-02-09 14:57:42 +02007141 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007142 u8 dct_number[0x18];
7143
Matan Barakb4ff3a32016-02-09 14:57:42 +02007144 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007145};
7146
7147struct mlx5_ifc_alloc_xrcd_out_bits {
7148 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007149 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007150
7151 u8 syndrome[0x20];
7152
Matan Barakb4ff3a32016-02-09 14:57:42 +02007153 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007154 u8 xrcd[0x18];
7155
Matan Barakb4ff3a32016-02-09 14:57:42 +02007156 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007157};
7158
7159struct mlx5_ifc_alloc_xrcd_in_bits {
7160 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007161 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007162
Matan Barakb4ff3a32016-02-09 14:57:42 +02007163 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007164 u8 op_mod[0x10];
7165
Matan Barakb4ff3a32016-02-09 14:57:42 +02007166 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007167};
7168
7169struct mlx5_ifc_alloc_uar_out_bits {
7170 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007171 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007172
7173 u8 syndrome[0x20];
7174
Matan Barakb4ff3a32016-02-09 14:57:42 +02007175 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007176 u8 uar[0x18];
7177
Matan Barakb4ff3a32016-02-09 14:57:42 +02007178 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007179};
7180
7181struct mlx5_ifc_alloc_uar_in_bits {
7182 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007183 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007184
Matan Barakb4ff3a32016-02-09 14:57:42 +02007185 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007186 u8 op_mod[0x10];
7187
Matan Barakb4ff3a32016-02-09 14:57:42 +02007188 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007189};
7190
7191struct mlx5_ifc_alloc_transport_domain_out_bits {
7192 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007193 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007194
7195 u8 syndrome[0x20];
7196
Matan Barakb4ff3a32016-02-09 14:57:42 +02007197 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007198 u8 transport_domain[0x18];
7199
Matan Barakb4ff3a32016-02-09 14:57:42 +02007200 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007201};
7202
7203struct mlx5_ifc_alloc_transport_domain_in_bits {
7204 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007205 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007206
Matan Barakb4ff3a32016-02-09 14:57:42 +02007207 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007208 u8 op_mod[0x10];
7209
Matan Barakb4ff3a32016-02-09 14:57:42 +02007210 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007211};
7212
7213struct mlx5_ifc_alloc_q_counter_out_bits {
7214 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007215 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007216
7217 u8 syndrome[0x20];
7218
Matan Barakb4ff3a32016-02-09 14:57:42 +02007219 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007220 u8 counter_set_id[0x8];
7221
Matan Barakb4ff3a32016-02-09 14:57:42 +02007222 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007223};
7224
7225struct mlx5_ifc_alloc_q_counter_in_bits {
7226 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007227 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007228
Matan Barakb4ff3a32016-02-09 14:57:42 +02007229 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007230 u8 op_mod[0x10];
7231
Matan Barakb4ff3a32016-02-09 14:57:42 +02007232 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007233};
7234
7235struct mlx5_ifc_alloc_pd_out_bits {
7236 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007237 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007238
7239 u8 syndrome[0x20];
7240
Matan Barakb4ff3a32016-02-09 14:57:42 +02007241 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007242 u8 pd[0x18];
7243
Matan Barakb4ff3a32016-02-09 14:57:42 +02007244 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007245};
7246
7247struct mlx5_ifc_alloc_pd_in_bits {
7248 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007249 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007250
Matan Barakb4ff3a32016-02-09 14:57:42 +02007251 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007252 u8 op_mod[0x10];
7253
Matan Barakb4ff3a32016-02-09 14:57:42 +02007254 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007255};
7256
Amir Vadai9dc0b282016-05-13 12:55:39 +00007257struct mlx5_ifc_alloc_flow_counter_out_bits {
7258 u8 status[0x8];
7259 u8 reserved_at_8[0x18];
7260
7261 u8 syndrome[0x20];
7262
Rabie Louloua8ffcc72017-07-09 13:39:30 +03007263 u8 flow_counter_id[0x20];
Amir Vadai9dc0b282016-05-13 12:55:39 +00007264
7265 u8 reserved_at_60[0x20];
7266};
7267
7268struct mlx5_ifc_alloc_flow_counter_in_bits {
7269 u8 opcode[0x10];
7270 u8 reserved_at_10[0x10];
7271
7272 u8 reserved_at_20[0x10];
7273 u8 op_mod[0x10];
7274
7275 u8 reserved_at_40[0x40];
7276};
7277
Saeed Mahameede2816822015-05-28 22:28:40 +03007278struct mlx5_ifc_add_vxlan_udp_dport_out_bits {
7279 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007280 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007281
7282 u8 syndrome[0x20];
7283
Matan Barakb4ff3a32016-02-09 14:57:42 +02007284 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007285};
7286
7287struct mlx5_ifc_add_vxlan_udp_dport_in_bits {
7288 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007289 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007290
Matan Barakb4ff3a32016-02-09 14:57:42 +02007291 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007292 u8 op_mod[0x10];
7293
Matan Barakb4ff3a32016-02-09 14:57:42 +02007294 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007295
Matan Barakb4ff3a32016-02-09 14:57:42 +02007296 u8 reserved_at_60[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007297 u8 vxlan_udp_port[0x10];
7298};
7299
Eran Ben Elisha37e92a92017-11-13 10:11:27 +02007300struct mlx5_ifc_set_pp_rate_limit_out_bits {
Saeed Mahameed74862162016-06-09 15:11:34 +03007301 u8 status[0x8];
7302 u8 reserved_at_8[0x18];
7303
7304 u8 syndrome[0x20];
7305
7306 u8 reserved_at_40[0x40];
7307};
7308
Eran Ben Elisha37e92a92017-11-13 10:11:27 +02007309struct mlx5_ifc_set_pp_rate_limit_in_bits {
Saeed Mahameed74862162016-06-09 15:11:34 +03007310 u8 opcode[0x10];
7311 u8 reserved_at_10[0x10];
7312
7313 u8 reserved_at_20[0x10];
7314 u8 op_mod[0x10];
7315
7316 u8 reserved_at_40[0x10];
7317 u8 rate_limit_index[0x10];
7318
7319 u8 reserved_at_60[0x20];
7320
7321 u8 rate_limit[0x20];
Eran Ben Elisha37e92a92017-11-13 10:11:27 +02007322
Bodong Wang05d3ac92018-03-19 15:10:29 +02007323 u8 burst_upper_bound[0x20];
7324
7325 u8 reserved_at_c0[0x10];
7326 u8 typical_packet_size[0x10];
7327
7328 u8 reserved_at_e0[0x120];
Saeed Mahameed74862162016-06-09 15:11:34 +03007329};
7330
Saeed Mahameede2816822015-05-28 22:28:40 +03007331struct mlx5_ifc_access_register_out_bits {
7332 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007333 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007334
7335 u8 syndrome[0x20];
7336
Matan Barakb4ff3a32016-02-09 14:57:42 +02007337 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007338
7339 u8 register_data[0][0x20];
7340};
7341
7342enum {
7343 MLX5_ACCESS_REGISTER_IN_OP_MOD_WRITE = 0x0,
7344 MLX5_ACCESS_REGISTER_IN_OP_MOD_READ = 0x1,
7345};
7346
7347struct mlx5_ifc_access_register_in_bits {
7348 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007349 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007350
Matan Barakb4ff3a32016-02-09 14:57:42 +02007351 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007352 u8 op_mod[0x10];
7353
Matan Barakb4ff3a32016-02-09 14:57:42 +02007354 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007355 u8 register_id[0x10];
7356
7357 u8 argument[0x20];
7358
7359 u8 register_data[0][0x20];
7360};
7361
7362struct mlx5_ifc_sltp_reg_bits {
7363 u8 status[0x4];
7364 u8 version[0x4];
7365 u8 local_port[0x8];
7366 u8 pnat[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007367 u8 reserved_at_12[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03007368 u8 lane[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007369 u8 reserved_at_18[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007370
Matan Barakb4ff3a32016-02-09 14:57:42 +02007371 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007372
Matan Barakb4ff3a32016-02-09 14:57:42 +02007373 u8 reserved_at_40[0x7];
Saeed Mahameede2816822015-05-28 22:28:40 +03007374 u8 polarity[0x1];
7375 u8 ob_tap0[0x8];
7376 u8 ob_tap1[0x8];
7377 u8 ob_tap2[0x8];
7378
Matan Barakb4ff3a32016-02-09 14:57:42 +02007379 u8 reserved_at_60[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03007380 u8 ob_preemp_mode[0x4];
7381 u8 ob_reg[0x8];
7382 u8 ob_bias[0x8];
7383
Matan Barakb4ff3a32016-02-09 14:57:42 +02007384 u8 reserved_at_80[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007385};
7386
7387struct mlx5_ifc_slrg_reg_bits {
7388 u8 status[0x4];
7389 u8 version[0x4];
7390 u8 local_port[0x8];
7391 u8 pnat[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007392 u8 reserved_at_12[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03007393 u8 lane[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007394 u8 reserved_at_18[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007395
7396 u8 time_to_link_up[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007397 u8 reserved_at_30[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03007398 u8 grade_lane_speed[0x4];
7399
7400 u8 grade_version[0x8];
7401 u8 grade[0x18];
7402
Matan Barakb4ff3a32016-02-09 14:57:42 +02007403 u8 reserved_at_60[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007404 u8 height_grade_type[0x4];
7405 u8 height_grade[0x18];
7406
7407 u8 height_dz[0x10];
7408 u8 height_dv[0x10];
7409
Matan Barakb4ff3a32016-02-09 14:57:42 +02007410 u8 reserved_at_a0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007411 u8 height_sigma[0x10];
7412
Matan Barakb4ff3a32016-02-09 14:57:42 +02007413 u8 reserved_at_c0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007414
Matan Barakb4ff3a32016-02-09 14:57:42 +02007415 u8 reserved_at_e0[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007416 u8 phase_grade_type[0x4];
7417 u8 phase_grade[0x18];
7418
Matan Barakb4ff3a32016-02-09 14:57:42 +02007419 u8 reserved_at_100[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007420 u8 phase_eo_pos[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007421 u8 reserved_at_110[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007422 u8 phase_eo_neg[0x8];
7423
7424 u8 ffe_set_tested[0x10];
7425 u8 test_errors_per_lane[0x10];
7426};
7427
7428struct mlx5_ifc_pvlc_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007429 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007430 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007431 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007432
Matan Barakb4ff3a32016-02-09 14:57:42 +02007433 u8 reserved_at_20[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007434 u8 vl_hw_cap[0x4];
7435
Matan Barakb4ff3a32016-02-09 14:57:42 +02007436 u8 reserved_at_40[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007437 u8 vl_admin[0x4];
7438
Matan Barakb4ff3a32016-02-09 14:57:42 +02007439 u8 reserved_at_60[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007440 u8 vl_operational[0x4];
7441};
7442
7443struct mlx5_ifc_pude_reg_bits {
7444 u8 swid[0x8];
7445 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007446 u8 reserved_at_10[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007447 u8 admin_status[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007448 u8 reserved_at_18[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007449 u8 oper_status[0x4];
7450
Matan Barakb4ff3a32016-02-09 14:57:42 +02007451 u8 reserved_at_20[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03007452};
7453
7454struct mlx5_ifc_ptys_reg_bits {
Bodong Wange7e31ca2016-09-07 19:07:58 +03007455 u8 reserved_at_0[0x1];
Saeed Mahameed74862162016-06-09 15:11:34 +03007456 u8 an_disable_admin[0x1];
Bodong Wange7e31ca2016-09-07 19:07:58 +03007457 u8 an_disable_cap[0x1];
7458 u8 reserved_at_3[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03007459 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007460 u8 reserved_at_10[0xd];
Saeed Mahameede2816822015-05-28 22:28:40 +03007461 u8 proto_mask[0x3];
7462
Saeed Mahameed74862162016-06-09 15:11:34 +03007463 u8 an_status[0x4];
7464 u8 reserved_at_24[0x3c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007465
7466 u8 eth_proto_capability[0x20];
7467
7468 u8 ib_link_width_capability[0x10];
7469 u8 ib_proto_capability[0x10];
7470
Matan Barakb4ff3a32016-02-09 14:57:42 +02007471 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007472
7473 u8 eth_proto_admin[0x20];
7474
7475 u8 ib_link_width_admin[0x10];
7476 u8 ib_proto_admin[0x10];
7477
Matan Barakb4ff3a32016-02-09 14:57:42 +02007478 u8 reserved_at_100[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007479
7480 u8 eth_proto_oper[0x20];
7481
7482 u8 ib_link_width_oper[0x10];
7483 u8 ib_proto_oper[0x10];
7484
Eran Ben Elisha5b4793f2017-02-13 14:00:59 +02007485 u8 reserved_at_160[0x1c];
7486 u8 connector_type[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007487
7488 u8 eth_proto_lp_advertise[0x20];
7489
Matan Barakb4ff3a32016-02-09 14:57:42 +02007490 u8 reserved_at_1a0[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03007491};
7492
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03007493struct mlx5_ifc_mlcr_reg_bits {
7494 u8 reserved_at_0[0x8];
7495 u8 local_port[0x8];
7496 u8 reserved_at_10[0x20];
7497
7498 u8 beacon_duration[0x10];
7499 u8 reserved_at_40[0x10];
7500
7501 u8 beacon_remain[0x10];
7502};
7503
Saeed Mahameede2816822015-05-28 22:28:40 +03007504struct mlx5_ifc_ptas_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007505 u8 reserved_at_0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007506
7507 u8 algorithm_options[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007508 u8 reserved_at_30[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007509 u8 repetitions_mode[0x4];
7510 u8 num_of_repetitions[0x8];
7511
7512 u8 grade_version[0x8];
7513 u8 height_grade_type[0x4];
7514 u8 phase_grade_type[0x4];
7515 u8 height_grade_weight[0x8];
7516 u8 phase_grade_weight[0x8];
7517
7518 u8 gisim_measure_bits[0x10];
7519 u8 adaptive_tap_measure_bits[0x10];
7520
7521 u8 ber_bath_high_error_threshold[0x10];
7522 u8 ber_bath_mid_error_threshold[0x10];
7523
7524 u8 ber_bath_low_error_threshold[0x10];
7525 u8 one_ratio_high_threshold[0x10];
7526
7527 u8 one_ratio_high_mid_threshold[0x10];
7528 u8 one_ratio_low_mid_threshold[0x10];
7529
7530 u8 one_ratio_low_threshold[0x10];
7531 u8 ndeo_error_threshold[0x10];
7532
7533 u8 mixer_offset_step_size[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007534 u8 reserved_at_110[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007535 u8 mix90_phase_for_voltage_bath[0x8];
7536
7537 u8 mixer_offset_start[0x10];
7538 u8 mixer_offset_end[0x10];
7539
Matan Barakb4ff3a32016-02-09 14:57:42 +02007540 u8 reserved_at_140[0x15];
Saeed Mahameede2816822015-05-28 22:28:40 +03007541 u8 ber_test_time[0xb];
7542};
7543
7544struct mlx5_ifc_pspa_reg_bits {
7545 u8 swid[0x8];
7546 u8 local_port[0x8];
7547 u8 sub_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007548 u8 reserved_at_18[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007549
Matan Barakb4ff3a32016-02-09 14:57:42 +02007550 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007551};
7552
7553struct mlx5_ifc_pqdr_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007554 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007555 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007556 u8 reserved_at_10[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03007557 u8 prio[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007558 u8 reserved_at_18[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03007559 u8 mode[0x2];
7560
Matan Barakb4ff3a32016-02-09 14:57:42 +02007561 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007562
Matan Barakb4ff3a32016-02-09 14:57:42 +02007563 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007564 u8 min_threshold[0x10];
7565
Matan Barakb4ff3a32016-02-09 14:57:42 +02007566 u8 reserved_at_60[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007567 u8 max_threshold[0x10];
7568
Matan Barakb4ff3a32016-02-09 14:57:42 +02007569 u8 reserved_at_80[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007570 u8 mark_probability_denominator[0x10];
7571
Matan Barakb4ff3a32016-02-09 14:57:42 +02007572 u8 reserved_at_a0[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03007573};
7574
7575struct mlx5_ifc_ppsc_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007576 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007577 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007578 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007579
Matan Barakb4ff3a32016-02-09 14:57:42 +02007580 u8 reserved_at_20[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03007581
Matan Barakb4ff3a32016-02-09 14:57:42 +02007582 u8 reserved_at_80[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007583 u8 wrps_admin[0x4];
7584
Matan Barakb4ff3a32016-02-09 14:57:42 +02007585 u8 reserved_at_a0[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007586 u8 wrps_status[0x4];
7587
Matan Barakb4ff3a32016-02-09 14:57:42 +02007588 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007589 u8 up_threshold[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007590 u8 reserved_at_d0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007591 u8 down_threshold[0x8];
7592
Matan Barakb4ff3a32016-02-09 14:57:42 +02007593 u8 reserved_at_e0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007594
Matan Barakb4ff3a32016-02-09 14:57:42 +02007595 u8 reserved_at_100[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007596 u8 srps_admin[0x4];
7597
Matan Barakb4ff3a32016-02-09 14:57:42 +02007598 u8 reserved_at_120[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007599 u8 srps_status[0x4];
7600
Matan Barakb4ff3a32016-02-09 14:57:42 +02007601 u8 reserved_at_140[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007602};
7603
7604struct mlx5_ifc_pplr_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007605 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007606 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007607 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007608
Matan Barakb4ff3a32016-02-09 14:57:42 +02007609 u8 reserved_at_20[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007610 u8 lb_cap[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007611 u8 reserved_at_30[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007612 u8 lb_en[0x8];
7613};
7614
7615struct mlx5_ifc_pplm_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007616 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007617 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007618 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007619
Matan Barakb4ff3a32016-02-09 14:57:42 +02007620 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007621
7622 u8 port_profile_mode[0x8];
7623 u8 static_port_profile[0x8];
7624 u8 active_port_profile[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007625 u8 reserved_at_58[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007626
7627 u8 retransmission_active[0x8];
7628 u8 fec_mode_active[0x18];
7629
Matan Barakb4ff3a32016-02-09 14:57:42 +02007630 u8 reserved_at_80[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007631};
7632
7633struct mlx5_ifc_ppcnt_reg_bits {
7634 u8 swid[0x8];
7635 u8 local_port[0x8];
7636 u8 pnat[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007637 u8 reserved_at_12[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007638 u8 grp[0x6];
7639
7640 u8 clr[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007641 u8 reserved_at_21[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007642 u8 prio_tc[0x3];
7643
7644 union mlx5_ifc_eth_cntrs_grp_data_layout_auto_bits counter_set;
7645};
7646
Gal Pressman8ed1a632016-11-17 13:46:01 +02007647struct mlx5_ifc_mpcnt_reg_bits {
7648 u8 reserved_at_0[0x8];
7649 u8 pcie_index[0x8];
7650 u8 reserved_at_10[0xa];
7651 u8 grp[0x6];
7652
7653 u8 clr[0x1];
7654 u8 reserved_at_21[0x1f];
7655
7656 union mlx5_ifc_pcie_cntrs_grp_data_layout_auto_bits counter_set;
7657};
7658
Saeed Mahameede2816822015-05-28 22:28:40 +03007659struct mlx5_ifc_ppad_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007660 u8 reserved_at_0[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03007661 u8 single_mac[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007662 u8 reserved_at_4[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007663 u8 local_port[0x8];
7664 u8 mac_47_32[0x10];
7665
7666 u8 mac_31_0[0x20];
7667
Matan Barakb4ff3a32016-02-09 14:57:42 +02007668 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007669};
7670
7671struct mlx5_ifc_pmtu_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007672 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007673 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007674 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007675
7676 u8 max_mtu[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007677 u8 reserved_at_30[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007678
7679 u8 admin_mtu[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007680 u8 reserved_at_50[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007681
7682 u8 oper_mtu[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007683 u8 reserved_at_70[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007684};
7685
7686struct mlx5_ifc_pmpr_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007687 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007688 u8 module[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007689 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007690
Matan Barakb4ff3a32016-02-09 14:57:42 +02007691 u8 reserved_at_20[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007692 u8 attenuation_5g[0x8];
7693
Matan Barakb4ff3a32016-02-09 14:57:42 +02007694 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007695 u8 attenuation_7g[0x8];
7696
Matan Barakb4ff3a32016-02-09 14:57:42 +02007697 u8 reserved_at_60[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007698 u8 attenuation_12g[0x8];
7699};
7700
7701struct mlx5_ifc_pmpe_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007702 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007703 u8 module[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007704 u8 reserved_at_10[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03007705 u8 module_status[0x4];
7706
Matan Barakb4ff3a32016-02-09 14:57:42 +02007707 u8 reserved_at_20[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03007708};
7709
7710struct mlx5_ifc_pmpc_reg_bits {
7711 u8 module_state_updated[32][0x8];
7712};
7713
7714struct mlx5_ifc_pmlpn_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007715 u8 reserved_at_0[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007716 u8 mlpn_status[0x4];
7717 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007718 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007719
7720 u8 e[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007721 u8 reserved_at_21[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03007722};
7723
7724struct mlx5_ifc_pmlp_reg_bits {
7725 u8 rxtx[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007726 u8 reserved_at_1[0x7];
Saeed Mahameede2816822015-05-28 22:28:40 +03007727 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007728 u8 reserved_at_10[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007729 u8 width[0x8];
7730
7731 u8 lane0_module_mapping[0x20];
7732
7733 u8 lane1_module_mapping[0x20];
7734
7735 u8 lane2_module_mapping[0x20];
7736
7737 u8 lane3_module_mapping[0x20];
7738
Matan Barakb4ff3a32016-02-09 14:57:42 +02007739 u8 reserved_at_a0[0x160];
Saeed Mahameede2816822015-05-28 22:28:40 +03007740};
7741
7742struct mlx5_ifc_pmaos_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007743 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007744 u8 module[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007745 u8 reserved_at_10[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007746 u8 admin_status[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007747 u8 reserved_at_18[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007748 u8 oper_status[0x4];
7749
7750 u8 ase[0x1];
7751 u8 ee[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007752 u8 reserved_at_22[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007753 u8 e[0x2];
7754
Matan Barakb4ff3a32016-02-09 14:57:42 +02007755 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007756};
7757
7758struct mlx5_ifc_plpc_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007759 u8 reserved_at_0[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007760 u8 profile_id[0xc];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007761 u8 reserved_at_10[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007762 u8 proto_mask[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007763 u8 reserved_at_18[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007764
Matan Barakb4ff3a32016-02-09 14:57:42 +02007765 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007766 u8 lane_speed[0x10];
7767
Matan Barakb4ff3a32016-02-09 14:57:42 +02007768 u8 reserved_at_40[0x17];
Saeed Mahameede2816822015-05-28 22:28:40 +03007769 u8 lpbf[0x1];
7770 u8 fec_mode_policy[0x8];
7771
7772 u8 retransmission_capability[0x8];
7773 u8 fec_mode_capability[0x18];
7774
7775 u8 retransmission_support_admin[0x8];
7776 u8 fec_mode_support_admin[0x18];
7777
7778 u8 retransmission_request_admin[0x8];
7779 u8 fec_mode_request_admin[0x18];
7780
Matan Barakb4ff3a32016-02-09 14:57:42 +02007781 u8 reserved_at_c0[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03007782};
7783
7784struct mlx5_ifc_plib_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007785 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007786 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007787 u8 reserved_at_10[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007788 u8 ib_port[0x8];
7789
Matan Barakb4ff3a32016-02-09 14:57:42 +02007790 u8 reserved_at_20[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03007791};
7792
7793struct mlx5_ifc_plbf_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007794 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007795 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007796 u8 reserved_at_10[0xd];
Saeed Mahameede2816822015-05-28 22:28:40 +03007797 u8 lbf_mode[0x3];
7798
Matan Barakb4ff3a32016-02-09 14:57:42 +02007799 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007800};
7801
7802struct mlx5_ifc_pipg_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007803 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007804 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007805 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007806
7807 u8 dic[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007808 u8 reserved_at_21[0x19];
Saeed Mahameede2816822015-05-28 22:28:40 +03007809 u8 ipg[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007810 u8 reserved_at_3e[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03007811};
7812
7813struct mlx5_ifc_pifr_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007814 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007815 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007816 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007817
Matan Barakb4ff3a32016-02-09 14:57:42 +02007818 u8 reserved_at_20[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03007819
7820 u8 port_filter[8][0x20];
7821
7822 u8 port_filter_update_en[8][0x20];
7823};
7824
7825struct mlx5_ifc_pfcc_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007826 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007827 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007828 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007829
7830 u8 ppan[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007831 u8 reserved_at_24[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007832 u8 prio_mask_tx[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007833 u8 reserved_at_30[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007834 u8 prio_mask_rx[0x8];
7835
7836 u8 pptx[0x1];
7837 u8 aptx[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007838 u8 reserved_at_42[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03007839 u8 pfctx[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007840 u8 reserved_at_50[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007841
7842 u8 pprx[0x1];
7843 u8 aprx[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007844 u8 reserved_at_62[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03007845 u8 pfcrx[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007846 u8 reserved_at_70[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007847
Matan Barakb4ff3a32016-02-09 14:57:42 +02007848 u8 reserved_at_80[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03007849};
7850
7851struct mlx5_ifc_pelc_reg_bits {
7852 u8 op[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007853 u8 reserved_at_4[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007854 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007855 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007856
7857 u8 op_admin[0x8];
7858 u8 op_capability[0x8];
7859 u8 op_request[0x8];
7860 u8 op_active[0x8];
7861
7862 u8 admin[0x40];
7863
7864 u8 capability[0x40];
7865
7866 u8 request[0x40];
7867
7868 u8 active[0x40];
7869
Matan Barakb4ff3a32016-02-09 14:57:42 +02007870 u8 reserved_at_140[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03007871};
7872
7873struct mlx5_ifc_peir_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007874 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007875 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007876 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007877
Matan Barakb4ff3a32016-02-09 14:57:42 +02007878 u8 reserved_at_20[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03007879 u8 error_count[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007880 u8 reserved_at_30[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007881
Matan Barakb4ff3a32016-02-09 14:57:42 +02007882 u8 reserved_at_40[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03007883 u8 lane[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007884 u8 reserved_at_50[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007885 u8 error_type[0x8];
7886};
7887
Gal Pressmancfdcbcea2016-12-08 15:52:00 +02007888struct mlx5_ifc_pcam_enhanced_features_bits {
Gal Pressman2dba0792017-06-18 14:56:45 +03007889 u8 reserved_at_0[0x7b];
Gal Pressmancfdcbcea2016-12-08 15:52:00 +02007890
Gal Pressman2dba0792017-06-18 14:56:45 +03007891 u8 rx_buffer_fullness_counters[0x1];
Eran Ben Elisha5b4793f2017-02-13 14:00:59 +02007892 u8 ptys_connector_type[0x1];
7893 u8 reserved_at_7d[0x1];
Gal Pressmancfdcbcea2016-12-08 15:52:00 +02007894 u8 ppcnt_discard_group[0x1];
7895 u8 ppcnt_statistical_group[0x1];
7896};
7897
7898struct mlx5_ifc_pcam_reg_bits {
7899 u8 reserved_at_0[0x8];
7900 u8 feature_group[0x8];
7901 u8 reserved_at_10[0x8];
7902 u8 access_reg_group[0x8];
7903
7904 u8 reserved_at_20[0x20];
7905
7906 union {
7907 u8 reserved_at_0[0x80];
7908 } port_access_reg_cap_mask;
7909
7910 u8 reserved_at_c0[0x80];
7911
7912 union {
7913 struct mlx5_ifc_pcam_enhanced_features_bits enhanced_features;
7914 u8 reserved_at_0[0x80];
7915 } feature_cap_mask;
7916
7917 u8 reserved_at_1c0[0xc0];
7918};
7919
7920struct mlx5_ifc_mcam_enhanced_features_bits {
Gal Pressman5405fa22017-06-15 18:29:23 +03007921 u8 reserved_at_0[0x7b];
7922 u8 pcie_outbound_stalled[0x1];
Eran Ben Elishaefae7f72017-05-12 02:47:02 +03007923 u8 tx_overflow_buffer_pkt[0x1];
Eugenia Emantayevfa367682017-05-25 16:09:34 +03007924 u8 mtpps_enh_out_per_adj[0x1];
7925 u8 mtpps_fs[0x1];
Gal Pressmancfdcbcea2016-12-08 15:52:00 +02007926 u8 pcie_performance_group[0x1];
7927};
7928
Or Gerlitz0ab87742017-06-11 15:25:38 +03007929struct mlx5_ifc_mcam_access_reg_bits {
7930 u8 reserved_at_0[0x1c];
7931 u8 mcda[0x1];
7932 u8 mcc[0x1];
7933 u8 mcqi[0x1];
7934 u8 reserved_at_1f[0x1];
7935
7936 u8 regs_95_to_64[0x20];
7937 u8 regs_63_to_32[0x20];
7938 u8 regs_31_to_0[0x20];
7939};
7940
Gal Pressmancfdcbcea2016-12-08 15:52:00 +02007941struct mlx5_ifc_mcam_reg_bits {
7942 u8 reserved_at_0[0x8];
7943 u8 feature_group[0x8];
7944 u8 reserved_at_10[0x8];
7945 u8 access_reg_group[0x8];
7946
7947 u8 reserved_at_20[0x20];
7948
7949 union {
Or Gerlitz0ab87742017-06-11 15:25:38 +03007950 struct mlx5_ifc_mcam_access_reg_bits access_regs;
Gal Pressmancfdcbcea2016-12-08 15:52:00 +02007951 u8 reserved_at_0[0x80];
7952 } mng_access_reg_cap_mask;
7953
7954 u8 reserved_at_c0[0x80];
7955
7956 union {
7957 struct mlx5_ifc_mcam_enhanced_features_bits enhanced_features;
7958 u8 reserved_at_0[0x80];
7959 } mng_feature_cap_mask;
7960
7961 u8 reserved_at_1c0[0x80];
7962};
7963
Huy Nguyenc02762e2017-07-18 16:03:17 -05007964struct mlx5_ifc_qcam_access_reg_cap_mask {
7965 u8 qcam_access_reg_cap_mask_127_to_20[0x6C];
7966 u8 qpdpm[0x1];
7967 u8 qcam_access_reg_cap_mask_18_to_4[0x0F];
7968 u8 qdpm[0x1];
7969 u8 qpts[0x1];
7970 u8 qcap[0x1];
7971 u8 qcam_access_reg_cap_mask_0[0x1];
7972};
7973
7974struct mlx5_ifc_qcam_qos_feature_cap_mask {
7975 u8 qcam_qos_feature_cap_mask_127_to_1[0x7F];
7976 u8 qpts_trust_both[0x1];
7977};
7978
7979struct mlx5_ifc_qcam_reg_bits {
7980 u8 reserved_at_0[0x8];
7981 u8 feature_group[0x8];
7982 u8 reserved_at_10[0x8];
7983 u8 access_reg_group[0x8];
7984 u8 reserved_at_20[0x20];
7985
7986 union {
7987 struct mlx5_ifc_qcam_access_reg_cap_mask reg_cap;
7988 u8 reserved_at_0[0x80];
7989 } qos_access_reg_cap_mask;
7990
7991 u8 reserved_at_c0[0x80];
7992
7993 union {
7994 struct mlx5_ifc_qcam_qos_feature_cap_mask feature_cap;
7995 u8 reserved_at_0[0x80];
7996 } qos_feature_cap_mask;
7997
7998 u8 reserved_at_1c0[0x80];
7999};
8000
Saeed Mahameede2816822015-05-28 22:28:40 +03008001struct mlx5_ifc_pcap_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02008002 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03008003 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008004 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03008005
8006 u8 port_capability_mask[4][0x20];
8007};
8008
8009struct mlx5_ifc_paos_reg_bits {
8010 u8 swid[0x8];
8011 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008012 u8 reserved_at_10[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03008013 u8 admin_status[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008014 u8 reserved_at_18[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03008015 u8 oper_status[0x4];
8016
8017 u8 ase[0x1];
8018 u8 ee[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008019 u8 reserved_at_22[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03008020 u8 e[0x2];
8021
Matan Barakb4ff3a32016-02-09 14:57:42 +02008022 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03008023};
8024
8025struct mlx5_ifc_pamp_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02008026 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03008027 u8 opamp_group[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008028 u8 reserved_at_10[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03008029 u8 opamp_group_type[0x4];
8030
8031 u8 start_index[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008032 u8 reserved_at_30[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03008033 u8 num_of_indices[0xc];
8034
8035 u8 index_data[18][0x10];
8036};
8037
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03008038struct mlx5_ifc_pcmr_reg_bits {
8039 u8 reserved_at_0[0x8];
8040 u8 local_port[0x8];
8041 u8 reserved_at_10[0x2e];
8042 u8 fcs_cap[0x1];
8043 u8 reserved_at_3f[0x1f];
8044 u8 fcs_chk[0x1];
8045 u8 reserved_at_5f[0x1];
8046};
8047
Saeed Mahameede2816822015-05-28 22:28:40 +03008048struct mlx5_ifc_lane_2_module_mapping_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02008049 u8 reserved_at_0[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03008050 u8 rx_lane[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008051 u8 reserved_at_8[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03008052 u8 tx_lane[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008053 u8 reserved_at_10[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03008054 u8 module[0x8];
8055};
8056
8057struct mlx5_ifc_bufferx_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02008058 u8 reserved_at_0[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03008059 u8 lossy[0x1];
8060 u8 epsb[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008061 u8 reserved_at_8[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03008062 u8 size[0xc];
8063
8064 u8 xoff_threshold[0x10];
8065 u8 xon_threshold[0x10];
8066};
8067
8068struct mlx5_ifc_set_node_in_bits {
8069 u8 node_description[64][0x8];
8070};
8071
8072struct mlx5_ifc_register_power_settings_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02008073 u8 reserved_at_0[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03008074 u8 power_settings_level[0x8];
8075
Matan Barakb4ff3a32016-02-09 14:57:42 +02008076 u8 reserved_at_20[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03008077};
8078
8079struct mlx5_ifc_register_host_endianness_bits {
8080 u8 he[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008081 u8 reserved_at_1[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03008082
Matan Barakb4ff3a32016-02-09 14:57:42 +02008083 u8 reserved_at_20[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03008084};
8085
8086struct mlx5_ifc_umr_pointer_desc_argument_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02008087 u8 reserved_at_0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03008088
8089 u8 mkey[0x20];
8090
8091 u8 addressh_63_32[0x20];
8092
8093 u8 addressl_31_0[0x20];
8094};
8095
8096struct mlx5_ifc_ud_adrs_vector_bits {
8097 u8 dc_key[0x40];
8098
8099 u8 ext[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008100 u8 reserved_at_41[0x7];
Saeed Mahameede2816822015-05-28 22:28:40 +03008101 u8 destination_qp_dct[0x18];
8102
8103 u8 static_rate[0x4];
8104 u8 sl_eth_prio[0x4];
8105 u8 fl[0x1];
8106 u8 mlid[0x7];
8107 u8 rlid_udp_sport[0x10];
8108
Matan Barakb4ff3a32016-02-09 14:57:42 +02008109 u8 reserved_at_80[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03008110
8111 u8 rmac_47_16[0x20];
8112
8113 u8 rmac_15_0[0x10];
8114 u8 tclass[0x8];
8115 u8 hop_limit[0x8];
8116
Matan Barakb4ff3a32016-02-09 14:57:42 +02008117 u8 reserved_at_e0[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03008118 u8 grh[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008119 u8 reserved_at_e2[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03008120 u8 src_addr_index[0x8];
8121 u8 flow_label[0x14];
8122
8123 u8 rgid_rip[16][0x8];
8124};
8125
8126struct mlx5_ifc_pages_req_event_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02008127 u8 reserved_at_0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03008128 u8 function_id[0x10];
8129
8130 u8 num_pages[0x20];
8131
Matan Barakb4ff3a32016-02-09 14:57:42 +02008132 u8 reserved_at_40[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03008133};
8134
8135struct mlx5_ifc_eqe_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02008136 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03008137 u8 event_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008138 u8 reserved_at_10[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03008139 u8 event_sub_type[0x8];
8140
Matan Barakb4ff3a32016-02-09 14:57:42 +02008141 u8 reserved_at_20[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03008142
8143 union mlx5_ifc_event_auto_bits event_data;
8144
Matan Barakb4ff3a32016-02-09 14:57:42 +02008145 u8 reserved_at_1e0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03008146 u8 signature[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008147 u8 reserved_at_1f8[0x7];
Saeed Mahameede2816822015-05-28 22:28:40 +03008148 u8 owner[0x1];
8149};
8150
8151enum {
8152 MLX5_CMD_QUEUE_ENTRY_TYPE_PCIE_CMD_IF_TRANSPORT = 0x7,
8153};
8154
8155struct mlx5_ifc_cmd_queue_entry_bits {
8156 u8 type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008157 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03008158
8159 u8 input_length[0x20];
8160
8161 u8 input_mailbox_pointer_63_32[0x20];
8162
8163 u8 input_mailbox_pointer_31_9[0x17];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008164 u8 reserved_at_77[0x9];
Saeed Mahameede2816822015-05-28 22:28:40 +03008165
8166 u8 command_input_inline_data[16][0x8];
8167
8168 u8 command_output_inline_data[16][0x8];
8169
8170 u8 output_mailbox_pointer_63_32[0x20];
8171
8172 u8 output_mailbox_pointer_31_9[0x17];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008173 u8 reserved_at_1b7[0x9];
Saeed Mahameede2816822015-05-28 22:28:40 +03008174
8175 u8 output_length[0x20];
8176
8177 u8 token[0x8];
8178 u8 signature[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008179 u8 reserved_at_1f0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03008180 u8 status[0x7];
8181 u8 ownership[0x1];
8182};
8183
8184struct mlx5_ifc_cmd_out_bits {
8185 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008186 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03008187
8188 u8 syndrome[0x20];
8189
8190 u8 command_output[0x20];
8191};
8192
8193struct mlx5_ifc_cmd_in_bits {
8194 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008195 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03008196
Matan Barakb4ff3a32016-02-09 14:57:42 +02008197 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03008198 u8 op_mod[0x10];
8199
8200 u8 command[0][0x20];
8201};
8202
8203struct mlx5_ifc_cmd_if_box_bits {
8204 u8 mailbox_data[512][0x8];
8205
Matan Barakb4ff3a32016-02-09 14:57:42 +02008206 u8 reserved_at_1000[0x180];
Saeed Mahameede2816822015-05-28 22:28:40 +03008207
8208 u8 next_pointer_63_32[0x20];
8209
8210 u8 next_pointer_31_10[0x16];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008211 u8 reserved_at_11b6[0xa];
Saeed Mahameede2816822015-05-28 22:28:40 +03008212
8213 u8 block_number[0x20];
8214
Matan Barakb4ff3a32016-02-09 14:57:42 +02008215 u8 reserved_at_11e0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03008216 u8 token[0x8];
8217 u8 ctrl_signature[0x8];
8218 u8 signature[0x8];
8219};
8220
8221struct mlx5_ifc_mtt_bits {
8222 u8 ptag_63_32[0x20];
8223
8224 u8 ptag_31_8[0x18];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008225 u8 reserved_at_38[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03008226 u8 wr_en[0x1];
8227 u8 rd_en[0x1];
8228};
8229
Tariq Toukan928cfe82016-02-22 18:17:29 +02008230struct mlx5_ifc_query_wol_rol_out_bits {
8231 u8 status[0x8];
8232 u8 reserved_at_8[0x18];
8233
8234 u8 syndrome[0x20];
8235
8236 u8 reserved_at_40[0x10];
8237 u8 rol_mode[0x8];
8238 u8 wol_mode[0x8];
8239
8240 u8 reserved_at_60[0x20];
8241};
8242
8243struct mlx5_ifc_query_wol_rol_in_bits {
8244 u8 opcode[0x10];
8245 u8 reserved_at_10[0x10];
8246
8247 u8 reserved_at_20[0x10];
8248 u8 op_mod[0x10];
8249
8250 u8 reserved_at_40[0x40];
8251};
8252
8253struct mlx5_ifc_set_wol_rol_out_bits {
8254 u8 status[0x8];
8255 u8 reserved_at_8[0x18];
8256
8257 u8 syndrome[0x20];
8258
8259 u8 reserved_at_40[0x40];
8260};
8261
8262struct mlx5_ifc_set_wol_rol_in_bits {
8263 u8 opcode[0x10];
8264 u8 reserved_at_10[0x10];
8265
8266 u8 reserved_at_20[0x10];
8267 u8 op_mod[0x10];
8268
8269 u8 rol_mode_valid[0x1];
8270 u8 wol_mode_valid[0x1];
8271 u8 reserved_at_42[0xe];
8272 u8 rol_mode[0x8];
8273 u8 wol_mode[0x8];
8274
8275 u8 reserved_at_60[0x20];
8276};
8277
Saeed Mahameede2816822015-05-28 22:28:40 +03008278enum {
8279 MLX5_INITIAL_SEG_NIC_INTERFACE_FULL_DRIVER = 0x0,
8280 MLX5_INITIAL_SEG_NIC_INTERFACE_DISABLED = 0x1,
8281 MLX5_INITIAL_SEG_NIC_INTERFACE_NO_DRAM_NIC = 0x2,
8282};
8283
8284enum {
8285 MLX5_INITIAL_SEG_NIC_INTERFACE_SUPPORTED_FULL_DRIVER = 0x0,
8286 MLX5_INITIAL_SEG_NIC_INTERFACE_SUPPORTED_DISABLED = 0x1,
8287 MLX5_INITIAL_SEG_NIC_INTERFACE_SUPPORTED_NO_DRAM_NIC = 0x2,
8288};
8289
8290enum {
8291 MLX5_INITIAL_SEG_HEALTH_SYNDROME_FW_INTERNAL_ERR = 0x1,
8292 MLX5_INITIAL_SEG_HEALTH_SYNDROME_DEAD_IRISC = 0x7,
8293 MLX5_INITIAL_SEG_HEALTH_SYNDROME_HW_FATAL_ERR = 0x8,
8294 MLX5_INITIAL_SEG_HEALTH_SYNDROME_FW_CRC_ERR = 0x9,
8295 MLX5_INITIAL_SEG_HEALTH_SYNDROME_ICM_FETCH_PCI_ERR = 0xa,
8296 MLX5_INITIAL_SEG_HEALTH_SYNDROME_ICM_PAGE_ERR = 0xb,
8297 MLX5_INITIAL_SEG_HEALTH_SYNDROME_ASYNCHRONOUS_EQ_BUF_OVERRUN = 0xc,
8298 MLX5_INITIAL_SEG_HEALTH_SYNDROME_EQ_IN_ERR = 0xd,
8299 MLX5_INITIAL_SEG_HEALTH_SYNDROME_EQ_INV = 0xe,
8300 MLX5_INITIAL_SEG_HEALTH_SYNDROME_FFSER_ERR = 0xf,
8301 MLX5_INITIAL_SEG_HEALTH_SYNDROME_HIGH_TEMP_ERR = 0x10,
8302};
8303
8304struct mlx5_ifc_initial_seg_bits {
8305 u8 fw_rev_minor[0x10];
8306 u8 fw_rev_major[0x10];
8307
8308 u8 cmd_interface_rev[0x10];
8309 u8 fw_rev_subminor[0x10];
8310
Matan Barakb4ff3a32016-02-09 14:57:42 +02008311 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03008312
8313 u8 cmdq_phy_addr_63_32[0x20];
8314
8315 u8 cmdq_phy_addr_31_12[0x14];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008316 u8 reserved_at_b4[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03008317 u8 nic_interface[0x2];
8318 u8 log_cmdq_size[0x4];
8319 u8 log_cmdq_stride[0x4];
8320
8321 u8 command_doorbell_vector[0x20];
8322
Matan Barakb4ff3a32016-02-09 14:57:42 +02008323 u8 reserved_at_e0[0xf00];
Saeed Mahameede2816822015-05-28 22:28:40 +03008324
8325 u8 initializing[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008326 u8 reserved_at_fe1[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03008327 u8 nic_interface_supported[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008328 u8 reserved_at_fe8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03008329
8330 struct mlx5_ifc_health_buffer_bits health_buffer;
8331
8332 u8 no_dram_nic_offset[0x20];
8333
Matan Barakb4ff3a32016-02-09 14:57:42 +02008334 u8 reserved_at_1220[0x6e40];
Saeed Mahameede2816822015-05-28 22:28:40 +03008335
Matan Barakb4ff3a32016-02-09 14:57:42 +02008336 u8 reserved_at_8060[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03008337 u8 clear_int[0x1];
8338
8339 u8 health_syndrome[0x8];
8340 u8 health_counter[0x18];
8341
Matan Barakb4ff3a32016-02-09 14:57:42 +02008342 u8 reserved_at_80a0[0x17fc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03008343};
8344
Eugenia Emantayevf9a1ef72016-10-10 16:05:53 +03008345struct mlx5_ifc_mtpps_reg_bits {
8346 u8 reserved_at_0[0xc];
8347 u8 cap_number_of_pps_pins[0x4];
8348 u8 reserved_at_10[0x4];
8349 u8 cap_max_num_of_pps_in_pins[0x4];
8350 u8 reserved_at_18[0x4];
8351 u8 cap_max_num_of_pps_out_pins[0x4];
8352
8353 u8 reserved_at_20[0x24];
8354 u8 cap_pin_3_mode[0x4];
8355 u8 reserved_at_48[0x4];
8356 u8 cap_pin_2_mode[0x4];
8357 u8 reserved_at_50[0x4];
8358 u8 cap_pin_1_mode[0x4];
8359 u8 reserved_at_58[0x4];
8360 u8 cap_pin_0_mode[0x4];
8361
8362 u8 reserved_at_60[0x4];
8363 u8 cap_pin_7_mode[0x4];
8364 u8 reserved_at_68[0x4];
8365 u8 cap_pin_6_mode[0x4];
8366 u8 reserved_at_70[0x4];
8367 u8 cap_pin_5_mode[0x4];
8368 u8 reserved_at_78[0x4];
8369 u8 cap_pin_4_mode[0x4];
8370
Eugenia Emantayevfa367682017-05-25 16:09:34 +03008371 u8 field_select[0x20];
8372 u8 reserved_at_a0[0x60];
Eugenia Emantayevf9a1ef72016-10-10 16:05:53 +03008373
8374 u8 enable[0x1];
8375 u8 reserved_at_101[0xb];
8376 u8 pattern[0x4];
8377 u8 reserved_at_110[0x4];
8378 u8 pin_mode[0x4];
8379 u8 pin[0x8];
8380
8381 u8 reserved_at_120[0x20];
8382
8383 u8 time_stamp[0x40];
8384
8385 u8 out_pulse_duration[0x10];
8386 u8 out_periodic_adjustment[0x10];
Eugenia Emantayevfa367682017-05-25 16:09:34 +03008387 u8 enhanced_out_periodic_adjustment[0x20];
Eugenia Emantayevf9a1ef72016-10-10 16:05:53 +03008388
Eugenia Emantayevfa367682017-05-25 16:09:34 +03008389 u8 reserved_at_1c0[0x20];
Eugenia Emantayevf9a1ef72016-10-10 16:05:53 +03008390};
8391
8392struct mlx5_ifc_mtppse_reg_bits {
8393 u8 reserved_at_0[0x18];
8394 u8 pin[0x8];
8395 u8 event_arm[0x1];
8396 u8 reserved_at_21[0x1b];
8397 u8 event_generation_mode[0x4];
8398 u8 reserved_at_40[0x40];
8399};
8400
Or Gerlitz47176282017-04-18 13:35:39 +03008401struct mlx5_ifc_mcqi_cap_bits {
8402 u8 supported_info_bitmask[0x20];
8403
8404 u8 component_size[0x20];
8405
8406 u8 max_component_size[0x20];
8407
8408 u8 log_mcda_word_size[0x4];
8409 u8 reserved_at_64[0xc];
8410 u8 mcda_max_write_size[0x10];
8411
8412 u8 rd_en[0x1];
8413 u8 reserved_at_81[0x1];
8414 u8 match_chip_id[0x1];
8415 u8 match_psid[0x1];
8416 u8 check_user_timestamp[0x1];
8417 u8 match_base_guid_mac[0x1];
8418 u8 reserved_at_86[0x1a];
8419};
8420
8421struct mlx5_ifc_mcqi_reg_bits {
8422 u8 read_pending_component[0x1];
8423 u8 reserved_at_1[0xf];
8424 u8 component_index[0x10];
8425
8426 u8 reserved_at_20[0x20];
8427
8428 u8 reserved_at_40[0x1b];
8429 u8 info_type[0x5];
8430
8431 u8 info_size[0x20];
8432
8433 u8 offset[0x20];
8434
8435 u8 reserved_at_a0[0x10];
8436 u8 data_size[0x10];
8437
8438 u8 data[0][0x20];
8439};
8440
8441struct mlx5_ifc_mcc_reg_bits {
8442 u8 reserved_at_0[0x4];
8443 u8 time_elapsed_since_last_cmd[0xc];
8444 u8 reserved_at_10[0x8];
8445 u8 instruction[0x8];
8446
8447 u8 reserved_at_20[0x10];
8448 u8 component_index[0x10];
8449
8450 u8 reserved_at_40[0x8];
8451 u8 update_handle[0x18];
8452
8453 u8 handle_owner_type[0x4];
8454 u8 handle_owner_host_id[0x4];
8455 u8 reserved_at_68[0x1];
8456 u8 control_progress[0x7];
8457 u8 error_code[0x8];
8458 u8 reserved_at_78[0x4];
8459 u8 control_state[0x4];
8460
8461 u8 component_size[0x20];
8462
8463 u8 reserved_at_a0[0x60];
8464};
8465
8466struct mlx5_ifc_mcda_reg_bits {
8467 u8 reserved_at_0[0x8];
8468 u8 update_handle[0x18];
8469
8470 u8 offset[0x20];
8471
8472 u8 reserved_at_40[0x10];
8473 u8 size[0x10];
8474
8475 u8 reserved_at_60[0x20];
8476
8477 u8 data[0][0x20];
8478};
8479
Saeed Mahameede2816822015-05-28 22:28:40 +03008480union mlx5_ifc_ports_control_registers_document_bits {
8481 struct mlx5_ifc_bufferx_reg_bits bufferx_reg;
8482 struct mlx5_ifc_eth_2819_cntrs_grp_data_layout_bits eth_2819_cntrs_grp_data_layout;
8483 struct mlx5_ifc_eth_2863_cntrs_grp_data_layout_bits eth_2863_cntrs_grp_data_layout;
8484 struct mlx5_ifc_eth_3635_cntrs_grp_data_layout_bits eth_3635_cntrs_grp_data_layout;
8485 struct mlx5_ifc_eth_802_3_cntrs_grp_data_layout_bits eth_802_3_cntrs_grp_data_layout;
8486 struct mlx5_ifc_eth_extended_cntrs_grp_data_layout_bits eth_extended_cntrs_grp_data_layout;
8487 struct mlx5_ifc_eth_per_prio_grp_data_layout_bits eth_per_prio_grp_data_layout;
8488 struct mlx5_ifc_eth_per_traffic_grp_data_layout_bits eth_per_traffic_grp_data_layout;
8489 struct mlx5_ifc_lane_2_module_mapping_bits lane_2_module_mapping;
8490 struct mlx5_ifc_pamp_reg_bits pamp_reg;
8491 struct mlx5_ifc_paos_reg_bits paos_reg;
8492 struct mlx5_ifc_pcap_reg_bits pcap_reg;
8493 struct mlx5_ifc_peir_reg_bits peir_reg;
8494 struct mlx5_ifc_pelc_reg_bits pelc_reg;
8495 struct mlx5_ifc_pfcc_reg_bits pfcc_reg;
Meny Yossefi1c64bf62016-02-18 18:15:00 +02008496 struct mlx5_ifc_ib_port_cntrs_grp_data_layout_bits ib_port_cntrs_grp_data_layout;
Saeed Mahameede2816822015-05-28 22:28:40 +03008497 struct mlx5_ifc_phys_layer_cntrs_bits phys_layer_cntrs;
8498 struct mlx5_ifc_pifr_reg_bits pifr_reg;
8499 struct mlx5_ifc_pipg_reg_bits pipg_reg;
8500 struct mlx5_ifc_plbf_reg_bits plbf_reg;
8501 struct mlx5_ifc_plib_reg_bits plib_reg;
8502 struct mlx5_ifc_plpc_reg_bits plpc_reg;
8503 struct mlx5_ifc_pmaos_reg_bits pmaos_reg;
8504 struct mlx5_ifc_pmlp_reg_bits pmlp_reg;
8505 struct mlx5_ifc_pmlpn_reg_bits pmlpn_reg;
8506 struct mlx5_ifc_pmpc_reg_bits pmpc_reg;
8507 struct mlx5_ifc_pmpe_reg_bits pmpe_reg;
8508 struct mlx5_ifc_pmpr_reg_bits pmpr_reg;
8509 struct mlx5_ifc_pmtu_reg_bits pmtu_reg;
8510 struct mlx5_ifc_ppad_reg_bits ppad_reg;
8511 struct mlx5_ifc_ppcnt_reg_bits ppcnt_reg;
Gal Pressman8ed1a632016-11-17 13:46:01 +02008512 struct mlx5_ifc_mpcnt_reg_bits mpcnt_reg;
Saeed Mahameede2816822015-05-28 22:28:40 +03008513 struct mlx5_ifc_pplm_reg_bits pplm_reg;
8514 struct mlx5_ifc_pplr_reg_bits pplr_reg;
8515 struct mlx5_ifc_ppsc_reg_bits ppsc_reg;
8516 struct mlx5_ifc_pqdr_reg_bits pqdr_reg;
8517 struct mlx5_ifc_pspa_reg_bits pspa_reg;
8518 struct mlx5_ifc_ptas_reg_bits ptas_reg;
8519 struct mlx5_ifc_ptys_reg_bits ptys_reg;
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03008520 struct mlx5_ifc_mlcr_reg_bits mlcr_reg;
Saeed Mahameede2816822015-05-28 22:28:40 +03008521 struct mlx5_ifc_pude_reg_bits pude_reg;
8522 struct mlx5_ifc_pvlc_reg_bits pvlc_reg;
8523 struct mlx5_ifc_slrg_reg_bits slrg_reg;
8524 struct mlx5_ifc_sltp_reg_bits sltp_reg;
Eugenia Emantayevf9a1ef72016-10-10 16:05:53 +03008525 struct mlx5_ifc_mtpps_reg_bits mtpps_reg;
8526 struct mlx5_ifc_mtppse_reg_bits mtppse_reg;
Ilan Tayaria9956d32017-04-18 13:10:41 +03008527 struct mlx5_ifc_fpga_access_reg_bits fpga_access_reg;
Ilan Tayarie29341f2017-03-13 20:05:45 +02008528 struct mlx5_ifc_fpga_ctrl_bits fpga_ctrl_bits;
8529 struct mlx5_ifc_fpga_cap_bits fpga_cap_bits;
Or Gerlitz47176282017-04-18 13:35:39 +03008530 struct mlx5_ifc_mcqi_reg_bits mcqi_reg;
8531 struct mlx5_ifc_mcc_reg_bits mcc_reg;
8532 struct mlx5_ifc_mcda_reg_bits mcda_reg;
Matan Barakb4ff3a32016-02-09 14:57:42 +02008533 u8 reserved_at_0[0x60e0];
Saeed Mahameede2816822015-05-28 22:28:40 +03008534};
8535
8536union mlx5_ifc_debug_enhancements_document_bits {
8537 struct mlx5_ifc_health_buffer_bits health_buffer;
Matan Barakb4ff3a32016-02-09 14:57:42 +02008538 u8 reserved_at_0[0x200];
Saeed Mahameede2816822015-05-28 22:28:40 +03008539};
8540
8541union mlx5_ifc_uplink_pci_interface_document_bits {
8542 struct mlx5_ifc_initial_seg_bits initial_seg;
Matan Barakb4ff3a32016-02-09 14:57:42 +02008543 u8 reserved_at_0[0x20060];
Eli Cohenb7755162014-10-02 12:19:44 +03008544};
8545
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008546struct mlx5_ifc_set_flow_table_root_out_bits {
8547 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008548 u8 reserved_at_8[0x18];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008549
8550 u8 syndrome[0x20];
8551
Matan Barakb4ff3a32016-02-09 14:57:42 +02008552 u8 reserved_at_40[0x40];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008553};
8554
8555struct mlx5_ifc_set_flow_table_root_in_bits {
8556 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008557 u8 reserved_at_10[0x10];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008558
Matan Barakb4ff3a32016-02-09 14:57:42 +02008559 u8 reserved_at_20[0x10];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008560 u8 op_mod[0x10];
8561
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03008562 u8 other_vport[0x1];
8563 u8 reserved_at_41[0xf];
8564 u8 vport_number[0x10];
8565
8566 u8 reserved_at_60[0x20];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008567
8568 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008569 u8 reserved_at_88[0x18];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008570
Matan Barakb4ff3a32016-02-09 14:57:42 +02008571 u8 reserved_at_a0[0x8];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008572 u8 table_id[0x18];
8573
Erez Shitrit500a3d02017-04-13 06:36:51 +03008574 u8 reserved_at_c0[0x8];
8575 u8 underlay_qpn[0x18];
8576 u8 reserved_at_e0[0x120];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008577};
8578
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008579enum {
Aviv Heller84df61e2016-05-10 13:47:50 +03008580 MLX5_MODIFY_FLOW_TABLE_MISS_TABLE_ID = (1UL << 0),
8581 MLX5_MODIFY_FLOW_TABLE_LAG_NEXT_TABLE_ID = (1UL << 15),
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008582};
8583
8584struct mlx5_ifc_modify_flow_table_out_bits {
8585 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008586 u8 reserved_at_8[0x18];
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008587
8588 u8 syndrome[0x20];
8589
Matan Barakb4ff3a32016-02-09 14:57:42 +02008590 u8 reserved_at_40[0x40];
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008591};
8592
8593struct mlx5_ifc_modify_flow_table_in_bits {
8594 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008595 u8 reserved_at_10[0x10];
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008596
Matan Barakb4ff3a32016-02-09 14:57:42 +02008597 u8 reserved_at_20[0x10];
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008598 u8 op_mod[0x10];
8599
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03008600 u8 other_vport[0x1];
8601 u8 reserved_at_41[0xf];
8602 u8 vport_number[0x10];
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008603
Matan Barakb4ff3a32016-02-09 14:57:42 +02008604 u8 reserved_at_60[0x10];
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008605 u8 modify_field_select[0x10];
8606
8607 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008608 u8 reserved_at_88[0x18];
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008609
Matan Barakb4ff3a32016-02-09 14:57:42 +02008610 u8 reserved_at_a0[0x8];
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008611 u8 table_id[0x18];
8612
Maor Gottlieb0c90e9c2017-03-12 11:35:23 +02008613 struct mlx5_ifc_flow_table_context_bits flow_table_context;
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008614};
8615
Saeed Mahameed4f3961e2016-02-22 18:17:25 +02008616struct mlx5_ifc_ets_tcn_config_reg_bits {
8617 u8 g[0x1];
8618 u8 b[0x1];
8619 u8 r[0x1];
8620 u8 reserved_at_3[0x9];
8621 u8 group[0x4];
8622 u8 reserved_at_10[0x9];
8623 u8 bw_allocation[0x7];
8624
8625 u8 reserved_at_20[0xc];
8626 u8 max_bw_units[0x4];
8627 u8 reserved_at_30[0x8];
8628 u8 max_bw_value[0x8];
8629};
8630
8631struct mlx5_ifc_ets_global_config_reg_bits {
8632 u8 reserved_at_0[0x2];
8633 u8 r[0x1];
8634 u8 reserved_at_3[0x1d];
8635
8636 u8 reserved_at_20[0xc];
8637 u8 max_bw_units[0x4];
8638 u8 reserved_at_30[0x8];
8639 u8 max_bw_value[0x8];
8640};
8641
8642struct mlx5_ifc_qetc_reg_bits {
8643 u8 reserved_at_0[0x8];
8644 u8 port_number[0x8];
8645 u8 reserved_at_10[0x30];
8646
8647 struct mlx5_ifc_ets_tcn_config_reg_bits tc_configuration[0x8];
8648 struct mlx5_ifc_ets_global_config_reg_bits global_configuration;
8649};
8650
Huy Nguyen415a64a2017-07-18 16:08:46 -05008651struct mlx5_ifc_qpdpm_dscp_reg_bits {
8652 u8 e[0x1];
8653 u8 reserved_at_01[0x0b];
8654 u8 prio[0x04];
8655};
8656
8657struct mlx5_ifc_qpdpm_reg_bits {
8658 u8 reserved_at_0[0x8];
8659 u8 local_port[0x8];
8660 u8 reserved_at_10[0x10];
8661 struct mlx5_ifc_qpdpm_dscp_reg_bits dscp[64];
8662};
8663
8664struct mlx5_ifc_qpts_reg_bits {
8665 u8 reserved_at_0[0x8];
8666 u8 local_port[0x8];
8667 u8 reserved_at_10[0x2d];
8668 u8 trust_state[0x3];
8669};
8670
Saeed Mahameed4f3961e2016-02-22 18:17:25 +02008671struct mlx5_ifc_qtct_reg_bits {
8672 u8 reserved_at_0[0x8];
8673 u8 port_number[0x8];
8674 u8 reserved_at_10[0xd];
8675 u8 prio[0x3];
8676
8677 u8 reserved_at_20[0x1d];
8678 u8 tclass[0x3];
8679};
8680
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03008681struct mlx5_ifc_mcia_reg_bits {
8682 u8 l[0x1];
8683 u8 reserved_at_1[0x7];
8684 u8 module[0x8];
8685 u8 reserved_at_10[0x8];
8686 u8 status[0x8];
8687
8688 u8 i2c_device_address[0x8];
8689 u8 page_number[0x8];
8690 u8 device_address[0x10];
8691
8692 u8 reserved_at_40[0x10];
8693 u8 size[0x10];
8694
8695 u8 reserved_at_60[0x20];
8696
8697 u8 dword_0[0x20];
8698 u8 dword_1[0x20];
8699 u8 dword_2[0x20];
8700 u8 dword_3[0x20];
8701 u8 dword_4[0x20];
8702 u8 dword_5[0x20];
8703 u8 dword_6[0x20];
8704 u8 dword_7[0x20];
8705 u8 dword_8[0x20];
8706 u8 dword_9[0x20];
8707 u8 dword_10[0x20];
8708 u8 dword_11[0x20];
8709};
8710
Saeed Mahameed74862162016-06-09 15:11:34 +03008711struct mlx5_ifc_dcbx_param_bits {
8712 u8 dcbx_cee_cap[0x1];
8713 u8 dcbx_ieee_cap[0x1];
8714 u8 dcbx_standby_cap[0x1];
8715 u8 reserved_at_0[0x5];
8716 u8 port_number[0x8];
8717 u8 reserved_at_10[0xa];
8718 u8 max_application_table_size[6];
8719 u8 reserved_at_20[0x15];
8720 u8 version_oper[0x3];
8721 u8 reserved_at_38[5];
8722 u8 version_admin[0x3];
8723 u8 willing_admin[0x1];
8724 u8 reserved_at_41[0x3];
8725 u8 pfc_cap_oper[0x4];
8726 u8 reserved_at_48[0x4];
8727 u8 pfc_cap_admin[0x4];
8728 u8 reserved_at_50[0x4];
8729 u8 num_of_tc_oper[0x4];
8730 u8 reserved_at_58[0x4];
8731 u8 num_of_tc_admin[0x4];
8732 u8 remote_willing[0x1];
8733 u8 reserved_at_61[3];
8734 u8 remote_pfc_cap[4];
8735 u8 reserved_at_68[0x14];
8736 u8 remote_num_of_tc[0x4];
8737 u8 reserved_at_80[0x18];
8738 u8 error[0x8];
8739 u8 reserved_at_a0[0x160];
8740};
Aviv Heller84df61e2016-05-10 13:47:50 +03008741
8742struct mlx5_ifc_lagc_bits {
8743 u8 reserved_at_0[0x1d];
8744 u8 lag_state[0x3];
8745
8746 u8 reserved_at_20[0x14];
8747 u8 tx_remap_affinity_2[0x4];
8748 u8 reserved_at_38[0x4];
8749 u8 tx_remap_affinity_1[0x4];
8750};
8751
8752struct mlx5_ifc_create_lag_out_bits {
8753 u8 status[0x8];
8754 u8 reserved_at_8[0x18];
8755
8756 u8 syndrome[0x20];
8757
8758 u8 reserved_at_40[0x40];
8759};
8760
8761struct mlx5_ifc_create_lag_in_bits {
8762 u8 opcode[0x10];
8763 u8 reserved_at_10[0x10];
8764
8765 u8 reserved_at_20[0x10];
8766 u8 op_mod[0x10];
8767
8768 struct mlx5_ifc_lagc_bits ctx;
8769};
8770
8771struct mlx5_ifc_modify_lag_out_bits {
8772 u8 status[0x8];
8773 u8 reserved_at_8[0x18];
8774
8775 u8 syndrome[0x20];
8776
8777 u8 reserved_at_40[0x40];
8778};
8779
8780struct mlx5_ifc_modify_lag_in_bits {
8781 u8 opcode[0x10];
8782 u8 reserved_at_10[0x10];
8783
8784 u8 reserved_at_20[0x10];
8785 u8 op_mod[0x10];
8786
8787 u8 reserved_at_40[0x20];
8788 u8 field_select[0x20];
8789
8790 struct mlx5_ifc_lagc_bits ctx;
8791};
8792
8793struct mlx5_ifc_query_lag_out_bits {
8794 u8 status[0x8];
8795 u8 reserved_at_8[0x18];
8796
8797 u8 syndrome[0x20];
8798
8799 u8 reserved_at_40[0x40];
8800
8801 struct mlx5_ifc_lagc_bits ctx;
8802};
8803
8804struct mlx5_ifc_query_lag_in_bits {
8805 u8 opcode[0x10];
8806 u8 reserved_at_10[0x10];
8807
8808 u8 reserved_at_20[0x10];
8809 u8 op_mod[0x10];
8810
8811 u8 reserved_at_40[0x40];
8812};
8813
8814struct mlx5_ifc_destroy_lag_out_bits {
8815 u8 status[0x8];
8816 u8 reserved_at_8[0x18];
8817
8818 u8 syndrome[0x20];
8819
8820 u8 reserved_at_40[0x40];
8821};
8822
8823struct mlx5_ifc_destroy_lag_in_bits {
8824 u8 opcode[0x10];
8825 u8 reserved_at_10[0x10];
8826
8827 u8 reserved_at_20[0x10];
8828 u8 op_mod[0x10];
8829
8830 u8 reserved_at_40[0x40];
8831};
8832
8833struct mlx5_ifc_create_vport_lag_out_bits {
8834 u8 status[0x8];
8835 u8 reserved_at_8[0x18];
8836
8837 u8 syndrome[0x20];
8838
8839 u8 reserved_at_40[0x40];
8840};
8841
8842struct mlx5_ifc_create_vport_lag_in_bits {
8843 u8 opcode[0x10];
8844 u8 reserved_at_10[0x10];
8845
8846 u8 reserved_at_20[0x10];
8847 u8 op_mod[0x10];
8848
8849 u8 reserved_at_40[0x40];
8850};
8851
8852struct mlx5_ifc_destroy_vport_lag_out_bits {
8853 u8 status[0x8];
8854 u8 reserved_at_8[0x18];
8855
8856 u8 syndrome[0x20];
8857
8858 u8 reserved_at_40[0x40];
8859};
8860
8861struct mlx5_ifc_destroy_vport_lag_in_bits {
8862 u8 opcode[0x10];
8863 u8 reserved_at_10[0x10];
8864
8865 u8 reserved_at_20[0x10];
8866 u8 op_mod[0x10];
8867
8868 u8 reserved_at_40[0x40];
8869};
8870
Eli Cohend29b7962014-10-02 12:19:43 +03008871#endif /* MLX5_IFC_H */