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sewardj2019a972011-03-07 16:04:07 +00001/* -*- mode: C; c-basic-offset: 3; -*- */
2
3/*---------------------------------------------------------------*/
4/*--- begin guest_s390_toIR.c ---*/
5/*---------------------------------------------------------------*/
6
7/*
8 This file is part of Valgrind, a dynamic binary instrumentation
9 framework.
10
11 Copyright IBM Corp. 2010-2011
12
13 This program is free software; you can redistribute it and/or
14 modify it under the terms of the GNU General Public License as
15 published by the Free Software Foundation; either version 2 of the
16 License, or (at your option) any later version.
17
18 This program is distributed in the hope that it will be useful, but
19 WITHOUT ANY WARRANTY; without even the implied warranty of
20 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
21 General Public License for more details.
22
23 You should have received a copy of the GNU General Public License
24 along with this program; if not, write to the Free Software
25 Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
26 02110-1301, USA.
27
28 The GNU General Public License is contained in the file COPYING.
29*/
30
31/* Contributed by Florian Krohm and Christian Borntraeger */
32
33/* Translates s390 code to IR. */
34
35#include "libvex_basictypes.h"
36#include "libvex_ir.h"
sewardj2019a972011-03-07 16:04:07 +000037#include "libvex.h" /* needed for bb_to_IR.h */
florian933065d2011-07-11 01:48:02 +000038#include "libvex_s390x_common.h"
sewardj2019a972011-03-07 16:04:07 +000039#include "main_util.h" /* vassert */
40#include "main_globals.h" /* vex_traceflags */
41#include "guest_generic_bb_to_IR.h" /* DisResult */
42#include "guest_s390_defs.h" /* prototypes for this file's functions */
43#include "host_s390_disasm.h"
44#include "host_s390_defs.h" /* S390_ROUND_xyzzy */
45
sewardj2019a972011-03-07 16:04:07 +000046
47/*------------------------------------------------------------*/
florianb4df7682011-07-05 02:09:01 +000048/*--- Forward declarations ---*/
49/*------------------------------------------------------------*/
50static UInt s390_decode_and_irgen(UChar *, UInt, DisResult *);
51
52
53/*------------------------------------------------------------*/
sewardj2019a972011-03-07 16:04:07 +000054/*--- Globals ---*/
55/*------------------------------------------------------------*/
56
57/* The IRSB* into which we're generating code. */
58static IRSB *irsb;
59
60/* The guest address for the instruction currently being
61 translated. */
62static Addr64 guest_IA_curr_instr;
63
64/* The guest address for the instruction following the current instruction. */
65static Addr64 guest_IA_next_instr;
66
67/* Result of disassembly step. */
68static DisResult *dis_res;
69
floriana64c2432011-07-16 02:11:50 +000070/* Resteer function and callback data */
71static Bool (*resteer_fn)(void *, Addr64);
72static void *resteer_data;
73
sewardj2019a972011-03-07 16:04:07 +000074/* The last seen execute target instruction */
75ULong last_execute_target;
76
77/* The possible outcomes of a decoding operation */
78typedef enum {
79 S390_DECODE_OK,
80 S390_DECODE_UNKNOWN_INSN,
81 S390_DECODE_UNIMPLEMENTED_INSN,
82 S390_DECODE_UNKNOWN_SPECIAL_INSN,
83 S390_DECODE_ERROR
84} s390_decode_t;
85
florian428dfdd2012-03-27 03:09:49 +000086
sewardj2019a972011-03-07 16:04:07 +000087/*------------------------------------------------------------*/
88/*--- Helpers for constructing IR. ---*/
89/*------------------------------------------------------------*/
90
91/* Sign extend a value with the given number of bits. This is a
92 macro because it allows us to overload the type of the value.
93 Note that VALUE must have a signed type! */
94#undef sign_extend
95#define sign_extend(value,num_bits) \
96(((value) << (sizeof(__typeof__(value)) * 8 - (num_bits))) >> \
97 (sizeof(__typeof__(value)) * 8 - (num_bits)))
98
99
100/* Add a statement to the current irsb. */
101static __inline__ void
102stmt(IRStmt *st)
103{
104 addStmtToIRSB(irsb, st);
105}
106
107/* Allocate a new temporary of the given type. */
108static __inline__ IRTemp
109newTemp(IRType type)
110{
111 vassert(isPlausibleIRType(type));
112
113 return newIRTemp(irsb->tyenv, type);
114}
115
116/* Create an expression node for a temporary */
117static __inline__ IRExpr *
118mkexpr(IRTemp tmp)
119{
120 return IRExpr_RdTmp(tmp);
121}
122
florian8844a632012-04-13 04:04:06 +0000123/* Generate an expression node for an address. */
124static __inline__ IRExpr *
125mkaddr_expr(Addr64 addr)
126{
127 return IRExpr_Const(IRConst_U64(addr));
128}
129
sewardj2019a972011-03-07 16:04:07 +0000130/* Add a statement that assigns to a temporary */
131static __inline__ void
132assign(IRTemp dst, IRExpr *expr)
133{
134 stmt(IRStmt_WrTmp(dst, expr));
135}
136
florian8844a632012-04-13 04:04:06 +0000137/* Write an address into the guest_IA */
138static __inline__ void
139put_IA(IRExpr *address)
140{
141 stmt(IRStmt_Put(S390X_GUEST_OFFSET(guest_IA), address));
142}
143
144/* Add a dummy put to the guest_IA to satisfy an assert in bb_to_IR
145 that wants the last statement in an IRSB to be a put to the guest_IA.
146 Mostly used for insns that use the "counter" pseudo guest reg. */
147static __inline__ void
148dummy_put_IA(void)
149{
150 put_IA(IRExpr_Get(S390X_GUEST_OFFSET(guest_IA), Ity_I64));
151}
152
sewardj2019a972011-03-07 16:04:07 +0000153/* Create a temporary of the given type and assign the expression to it */
154static __inline__ IRTemp
155mktemp(IRType type, IRExpr *expr)
156{
157 IRTemp temp = newTemp(type);
158
159 assign(temp, expr);
160
161 return temp;
162}
163
164/* Create a unary expression */
165static __inline__ IRExpr *
166unop(IROp kind, IRExpr *op)
167{
168 return IRExpr_Unop(kind, op);
169}
170
171/* Create a binary expression */
172static __inline__ IRExpr *
173binop(IROp kind, IRExpr *op1, IRExpr *op2)
174{
175 return IRExpr_Binop(kind, op1, op2);
176}
177
178/* Create a ternary expression */
179static __inline__ IRExpr *
180triop(IROp kind, IRExpr *op1, IRExpr *op2, IRExpr *op3)
181{
182 return IRExpr_Triop(kind, op1, op2, op3);
183}
184
185/* Create a quaternary expression */
186static __inline__ IRExpr *
187qop(IROp kind, IRExpr *op1, IRExpr *op2, IRExpr *op3, IRExpr *op4)
188{
189 return IRExpr_Qop(kind, op1, op2, op3, op4);
190}
191
192/* Create an expression node for an 8-bit integer constant */
193static __inline__ IRExpr *
194mkU8(UInt value)
195{
196 vassert(value < 256);
197
198 return IRExpr_Const(IRConst_U8((UChar)value));
199}
200
201/* Create an expression node for a 16-bit integer constant */
202static __inline__ IRExpr *
203mkU16(UInt value)
204{
205 vassert(value < 65536);
206
207 return IRExpr_Const(IRConst_U16((UShort)value));
208}
209
210/* Create an expression node for a 32-bit integer constant */
211static __inline__ IRExpr *
212mkU32(UInt value)
213{
214 return IRExpr_Const(IRConst_U32(value));
215}
216
217/* Create an expression node for a 64-bit integer constant */
218static __inline__ IRExpr *
219mkU64(ULong value)
220{
221 return IRExpr_Const(IRConst_U64(value));
222}
223
224/* Create an expression node for a 32-bit floating point constant
225 whose value is given by a bit pattern. */
226static __inline__ IRExpr *
227mkF32i(UInt value)
228{
229 return IRExpr_Const(IRConst_F32i(value));
230}
231
232/* Create an expression node for a 32-bit floating point constant
233 whose value is given by a bit pattern. */
234static __inline__ IRExpr *
235mkF64i(ULong value)
236{
237 return IRExpr_Const(IRConst_F64i(value));
238}
239
240/* Little helper function for my sanity. ITE = if-then-else */
241static IRExpr *
242mkite(IRExpr *condition, IRExpr *iftrue, IRExpr *iffalse)
243{
244 vassert(typeOfIRExpr(irsb->tyenv, condition) == Ity_I1);
245
246 return IRExpr_Mux0X(unop(Iop_1Uto8, condition), iffalse, iftrue);
247}
248
249/* Add a statement that stores DATA at ADDR. This is a big-endian machine. */
250static void __inline__
251store(IRExpr *addr, IRExpr *data)
252{
253 stmt(IRStmt_Store(Iend_BE, addr, data));
254}
255
256/* Create an expression that loads a TYPE sized value from ADDR.
257 This is a big-endian machine. */
258static __inline__ IRExpr *
259load(IRType type, IRExpr *addr)
260{
261 return IRExpr_Load(Iend_BE, type, addr);
262}
263
264/* Function call */
265static void
266call_function(IRExpr *callee_address)
267{
florian8844a632012-04-13 04:04:06 +0000268 put_IA(callee_address);
sewardj2019a972011-03-07 16:04:07 +0000269
florian8844a632012-04-13 04:04:06 +0000270 dis_res->whatNext = Dis_StopHere;
271 dis_res->jk_StopHere = Ijk_Call;
sewardj2019a972011-03-07 16:04:07 +0000272}
273
floriana64c2432011-07-16 02:11:50 +0000274/* Function call with known target. */
275static void
276call_function_and_chase(Addr64 callee_address)
277{
278 if (resteer_fn(resteer_data, callee_address)) {
279 dis_res->whatNext = Dis_ResteerU;
280 dis_res->continueAt = callee_address;
281 } else {
florian8844a632012-04-13 04:04:06 +0000282 put_IA(mkaddr_expr(callee_address));
283
floriana64c2432011-07-16 02:11:50 +0000284 dis_res->whatNext = Dis_StopHere;
florian8844a632012-04-13 04:04:06 +0000285 dis_res->jk_StopHere = Ijk_Call;
floriana64c2432011-07-16 02:11:50 +0000286 }
287}
288
sewardj2019a972011-03-07 16:04:07 +0000289/* Function return sequence */
290static void
291return_from_function(IRExpr *return_address)
292{
florian8844a632012-04-13 04:04:06 +0000293 put_IA(return_address);
sewardj2019a972011-03-07 16:04:07 +0000294
florian8844a632012-04-13 04:04:06 +0000295 dis_res->whatNext = Dis_StopHere;
296 dis_res->jk_StopHere = Ijk_Ret;
sewardj2019a972011-03-07 16:04:07 +0000297}
298
299/* A conditional branch whose target is not known at instrumentation time.
300
301 if (condition) goto computed_target;
302
303 Needs to be represented as:
304
305 if (! condition) goto next_instruction;
306 goto computed_target;
307
308 This inversion is being handled at code generation time. So we just
309 take the condition here as is.
310*/
311static void
312if_not_condition_goto_computed(IRExpr *condition, IRExpr *target)
313{
314 vassert(typeOfIRExpr(irsb->tyenv, condition) == Ity_I1);
315
florian8844a632012-04-13 04:04:06 +0000316 stmt(IRStmt_Exit(condition, Ijk_Boring, IRConst_U64(guest_IA_next_instr),
317 S390X_GUEST_OFFSET(guest_IA)));
sewardj2019a972011-03-07 16:04:07 +0000318
florian8844a632012-04-13 04:04:06 +0000319 put_IA(target);
sewardj2019a972011-03-07 16:04:07 +0000320
florian8844a632012-04-13 04:04:06 +0000321 dis_res->whatNext = Dis_StopHere;
322 dis_res->jk_StopHere = Ijk_Boring;
sewardj2019a972011-03-07 16:04:07 +0000323}
324
325/* A conditional branch whose target is known at instrumentation time. */
326static void
327if_condition_goto(IRExpr *condition, Addr64 target)
328{
329 vassert(typeOfIRExpr(irsb->tyenv, condition) == Ity_I1);
330
florian8844a632012-04-13 04:04:06 +0000331 stmt(IRStmt_Exit(condition, Ijk_Boring, IRConst_U64(target),
332 S390X_GUEST_OFFSET(guest_IA)));
333
334 put_IA(mkaddr_expr(target));
335
336 dis_res->whatNext = Dis_StopHere;
337 dis_res->jk_StopHere = Ijk_Boring;
sewardj2019a972011-03-07 16:04:07 +0000338}
339
340/* An unconditional branch. Target may or may not be known at instrumentation
341 time. */
342static void
343always_goto(IRExpr *target)
344{
florian8844a632012-04-13 04:04:06 +0000345 put_IA(target);
sewardj2019a972011-03-07 16:04:07 +0000346
florian8844a632012-04-13 04:04:06 +0000347 dis_res->whatNext = Dis_StopHere;
348 dis_res->jk_StopHere = Ijk_Boring;
sewardj2019a972011-03-07 16:04:07 +0000349}
350
florian8844a632012-04-13 04:04:06 +0000351
floriana64c2432011-07-16 02:11:50 +0000352/* An unconditional branch to a known target. */
353static void
354always_goto_and_chase(Addr64 target)
355{
356 if (resteer_fn(resteer_data, target)) {
florian8844a632012-04-13 04:04:06 +0000357 /* Follow into the target */
floriana64c2432011-07-16 02:11:50 +0000358 dis_res->whatNext = Dis_ResteerU;
359 dis_res->continueAt = target;
360 } else {
florian8844a632012-04-13 04:04:06 +0000361 put_IA(mkaddr_expr(target));
362
363 dis_res->whatNext = Dis_StopHere;
364 dis_res->jk_StopHere = Ijk_Boring;
floriana64c2432011-07-16 02:11:50 +0000365 }
366}
367
sewardj2019a972011-03-07 16:04:07 +0000368/* A system call */
369static void
370system_call(IRExpr *sysno)
371{
372 /* Store the system call number in the pseudo register. */
florian428dfdd2012-03-27 03:09:49 +0000373 stmt(IRStmt_Put(S390X_GUEST_OFFSET(guest_SYSNO), sysno));
sewardj2019a972011-03-07 16:04:07 +0000374
sewardj69007022011-04-28 20:13:45 +0000375 /* Store the current IA into guest_IP_AT_SYSCALL. libvex_ir.h says so. */
florian428dfdd2012-03-27 03:09:49 +0000376 stmt(IRStmt_Put(S390X_GUEST_OFFSET(guest_IP_AT_SYSCALL),
377 mkU64(guest_IA_curr_instr)));
sewardj2019a972011-03-07 16:04:07 +0000378
florian8844a632012-04-13 04:04:06 +0000379 put_IA(mkaddr_expr(guest_IA_next_instr));
380
sewardj2019a972011-03-07 16:04:07 +0000381 /* It's important that all ArchRegs carry their up-to-date value
382 at this point. So we declare an end-of-block here, which
383 forces any TempRegs caching ArchRegs to be flushed. */
florian8844a632012-04-13 04:04:06 +0000384 dis_res->whatNext = Dis_StopHere;
385 dis_res->jk_StopHere = Ijk_Sys_syscall;
sewardj2019a972011-03-07 16:04:07 +0000386}
387
388/* Encode the s390 rounding mode as it appears in the m3/m4 fields of certain
389 instructions to VEX's IRRoundingMode. */
390static IRRoundingMode
391encode_rounding_mode(UChar mode)
392{
393 switch (mode) {
394 case S390_ROUND_NEAREST_EVEN: return Irrm_NEAREST;
395 case S390_ROUND_ZERO: return Irrm_ZERO;
396 case S390_ROUND_POSINF: return Irrm_PosINF;
397 case S390_ROUND_NEGINF: return Irrm_NegINF;
398 }
399 vpanic("encode_rounding_mode");
400}
401
402static __inline__ IRExpr *get_fpr_dw0(UInt);
403static __inline__ void put_fpr_dw0(UInt, IRExpr *);
404
405/* Read a floating point register pair and combine their contents into a
406 128-bit value */
407static IRExpr *
408get_fpr_pair(UInt archreg)
409{
410 IRExpr *high = get_fpr_dw0(archreg);
411 IRExpr *low = get_fpr_dw0(archreg + 2);
412
413 return binop(Iop_F64HLtoF128, high, low);
414}
415
416/* Write a 128-bit floating point value into a register pair. */
417static void
418put_fpr_pair(UInt archreg, IRExpr *expr)
419{
420 IRExpr *high = unop(Iop_F128HItoF64, expr);
421 IRExpr *low = unop(Iop_F128LOtoF64, expr);
422
423 put_fpr_dw0(archreg, high);
424 put_fpr_dw0(archreg + 2, low);
425}
426
427
sewardj2019a972011-03-07 16:04:07 +0000428/*------------------------------------------------------------*/
429/*--- Build the flags thunk. ---*/
430/*------------------------------------------------------------*/
431
432/* Completely fill the flags thunk. We're always filling all fields.
433 Apparently, that is better for redundant PUT elimination. */
434static void
435s390_cc_thunk_fill(IRExpr *op, IRExpr *dep1, IRExpr *dep2, IRExpr *ndep)
436{
437 UInt op_off, dep1_off, dep2_off, ndep_off;
438
florian428dfdd2012-03-27 03:09:49 +0000439 op_off = S390X_GUEST_OFFSET(guest_CC_OP);
440 dep1_off = S390X_GUEST_OFFSET(guest_CC_DEP1);
441 dep2_off = S390X_GUEST_OFFSET(guest_CC_DEP2);
442 ndep_off = S390X_GUEST_OFFSET(guest_CC_NDEP);
sewardj2019a972011-03-07 16:04:07 +0000443
444 stmt(IRStmt_Put(op_off, op));
445 stmt(IRStmt_Put(dep1_off, dep1));
446 stmt(IRStmt_Put(dep2_off, dep2));
447 stmt(IRStmt_Put(ndep_off, ndep));
448}
449
450
451/* Create an expression for V and widen the result to 64 bit. */
452static IRExpr *
453s390_cc_widen(IRTemp v, Bool sign_extend)
454{
455 IRExpr *expr;
456
457 expr = mkexpr(v);
458
459 switch (typeOfIRTemp(irsb->tyenv, v)) {
460 case Ity_I64:
461 break;
462 case Ity_I32:
463 expr = unop(sign_extend ? Iop_32Sto64 : Iop_32Uto64, expr);
464 break;
465 case Ity_I16:
466 expr = unop(sign_extend ? Iop_16Sto64 : Iop_16Uto64, expr);
467 break;
468 case Ity_I8:
469 expr = unop(sign_extend ? Iop_8Sto64 : Iop_8Uto64, expr);
470 break;
471 default:
472 vpanic("s390_cc_widen");
473 }
474
475 return expr;
476}
477
478static void
479s390_cc_thunk_put1(UInt opc, IRTemp d1, Bool sign_extend)
480{
481 IRExpr *op, *dep1, *dep2, *ndep;
482
483 op = mkU64(opc);
484 dep1 = s390_cc_widen(d1, sign_extend);
485 dep2 = mkU64(0);
486 ndep = mkU64(0);
487
488 s390_cc_thunk_fill(op, dep1, dep2, ndep);
489}
490
491
492static void
493s390_cc_thunk_put2(UInt opc, IRTemp d1, IRTemp d2, Bool sign_extend)
494{
495 IRExpr *op, *dep1, *dep2, *ndep;
496
497 op = mkU64(opc);
498 dep1 = s390_cc_widen(d1, sign_extend);
499 dep2 = s390_cc_widen(d2, sign_extend);
500 ndep = mkU64(0);
501
502 s390_cc_thunk_fill(op, dep1, dep2, ndep);
503}
504
505
506/* memcheck believes that the NDEP field in the flags thunk is always
507 defined. But for some flag computations (e.g. add with carry) that is
508 just not true. We therefore need to convey to memcheck that the value
509 of the ndep field does matter and therefore we make the DEP2 field
510 depend on it:
511
512 DEP2 = original_DEP2 ^ NDEP
513
514 In s390_calculate_cc we exploit that (a^b)^b == a
515 I.e. we xor the DEP2 value with the NDEP value to recover the
516 original_DEP2 value. */
517static void
518s390_cc_thunk_put3(UInt opc, IRTemp d1, IRTemp d2, IRTemp nd, Bool sign_extend)
519{
520 IRExpr *op, *dep1, *dep2, *ndep, *dep2x;
521
522 op = mkU64(opc);
523 dep1 = s390_cc_widen(d1, sign_extend);
524 dep2 = s390_cc_widen(d2, sign_extend);
525 ndep = s390_cc_widen(nd, sign_extend);
526
527 dep2x = binop(Iop_Xor64, dep2, ndep);
528
529 s390_cc_thunk_fill(op, dep1, dep2x, ndep);
530}
531
532
533/* Write one floating point value into the flags thunk */
534static void
535s390_cc_thunk_put1f(UInt opc, IRTemp d1)
536{
537 IRExpr *op, *dep1, *dep2, *ndep;
538
539 op = mkU64(opc);
540 dep1 = mkexpr(d1);
541 dep2 = mkU64(0);
542 ndep = mkU64(0);
543
544 s390_cc_thunk_fill(op, dep1, dep2, ndep);
545}
546
547
548/* Write a floating point value and an integer into the flags thunk. The
549 integer value is zero-extended first. */
550static void
551s390_cc_thunk_putFZ(UInt opc, IRTemp d1, IRTemp d2)
552{
553 IRExpr *op, *dep1, *dep2, *ndep;
554
555 op = mkU64(opc);
556 dep1 = mkexpr(d1);
557 dep2 = s390_cc_widen(d2, False);
558 ndep = mkU64(0);
559
560 s390_cc_thunk_fill(op, dep1, dep2, ndep);
561}
562
563
564/* Write a 128-bit floating point value into the flags thunk. This is
565 done by splitting the value into two 64-bits values. */
566static void
567s390_cc_thunk_put1f128(UInt opc, IRTemp d1)
568{
569 IRExpr *op, *hi, *lo, *ndep;
570
571 op = mkU64(opc);
572 hi = unop(Iop_F128HItoF64, mkexpr(d1));
573 lo = unop(Iop_F128LOtoF64, mkexpr(d1));
574 ndep = mkU64(0);
575
576 s390_cc_thunk_fill(op, hi, lo, ndep);
577}
578
579
580/* Write a 128-bit floating point value and an integer into the flags thunk.
581 The integer value is zero-extended first. */
582static void
583s390_cc_thunk_put1f128Z(UInt opc, IRTemp d1, IRTemp nd)
584{
585 IRExpr *op, *hi, *lo, *lox, *ndep;
586
587 op = mkU64(opc);
588 hi = unop(Iop_F128HItoF64, mkexpr(d1));
589 lo = unop(Iop_ReinterpF64asI64, unop(Iop_F128LOtoF64, mkexpr(d1)));
590 ndep = s390_cc_widen(nd, False);
591
592 lox = binop(Iop_Xor64, lo, ndep); /* convey dependency */
593
594 s390_cc_thunk_fill(op, hi, lox, ndep);
595}
596
597
598static void
599s390_cc_set(UInt val)
600{
601 s390_cc_thunk_fill(mkU64(S390_CC_OP_SET),
602 mkU64(val), mkU64(0), mkU64(0));
603}
604
605/* Build IR to calculate the condition code from flags thunk.
606 Returns an expression of type Ity_I32 */
607static IRExpr *
608s390_call_calculate_cc(void)
609{
610 IRExpr **args, *call, *op, *dep1, *dep2, *ndep;
611
florian428dfdd2012-03-27 03:09:49 +0000612 op = IRExpr_Get(S390X_GUEST_OFFSET(guest_CC_OP), Ity_I64);
613 dep1 = IRExpr_Get(S390X_GUEST_OFFSET(guest_CC_DEP1), Ity_I64);
614 dep2 = IRExpr_Get(S390X_GUEST_OFFSET(guest_CC_DEP2), Ity_I64);
615 ndep = IRExpr_Get(S390X_GUEST_OFFSET(guest_CC_NDEP), Ity_I64);
sewardj2019a972011-03-07 16:04:07 +0000616
617 args = mkIRExprVec_4(op, dep1, dep2, ndep);
618 call = mkIRExprCCall(Ity_I32, 0 /*regparm*/,
619 "s390_calculate_cc", &s390_calculate_cc, args);
620
621 /* Exclude OP and NDEP from definedness checking. We're only
622 interested in DEP1 and DEP2. */
623 call->Iex.CCall.cee->mcx_mask = (1<<0) | (1<<3);
624
625 return call;
626}
627
628/* Build IR to calculate the internal condition code for a "compare and branch"
629 insn. Returns an expression of type Ity_I32 */
630static IRExpr *
631s390_call_calculate_icc(UInt opc, IRTemp op1, IRTemp op2, Bool sign_extend)
632{
633 IRExpr **args, *call, *op, *dep1, *dep2;
634
635 op = mkU64(opc);
636 dep1 = s390_cc_widen(op1, sign_extend);
637 dep2 = s390_cc_widen(op2, sign_extend);
638
639 args = mkIRExprVec_3(op, dep1, dep2);
640 call = mkIRExprCCall(Ity_I32, 0 /*regparm*/,
641 "s390_calculate_icc", &s390_calculate_icc, args);
642
643 /* Exclude OP from definedness checking. We're only
644 interested in DEP1 and DEP2. */
645 call->Iex.CCall.cee->mcx_mask = (1<<0);
646
647 return call;
648}
649
650/* Build IR to calculate the condition code from flags thunk.
651 Returns an expression of type Ity_I32 */
652static IRExpr *
653s390_call_calculate_cond(UInt m)
654{
655 IRExpr **args, *call, *op, *dep1, *dep2, *ndep, *mask;
656
657 mask = mkU64(m);
florian428dfdd2012-03-27 03:09:49 +0000658 op = IRExpr_Get(S390X_GUEST_OFFSET(guest_CC_OP), Ity_I64);
659 dep1 = IRExpr_Get(S390X_GUEST_OFFSET(guest_CC_DEP1), Ity_I64);
660 dep2 = IRExpr_Get(S390X_GUEST_OFFSET(guest_CC_DEP2), Ity_I64);
661 ndep = IRExpr_Get(S390X_GUEST_OFFSET(guest_CC_NDEP), Ity_I64);
sewardj2019a972011-03-07 16:04:07 +0000662
663 args = mkIRExprVec_5(mask, op, dep1, dep2, ndep);
664 call = mkIRExprCCall(Ity_I32, 0 /*regparm*/,
665 "s390_calculate_cond", &s390_calculate_cond, args);
666
667 /* Exclude the requested condition, OP and NDEP from definedness
668 checking. We're only interested in DEP1 and DEP2. */
669 call->Iex.CCall.cee->mcx_mask = (1<<0) | (1<<1) | (1<<4);
670
671 return call;
672}
673
674#define s390_cc_thunk_putZ(op,dep1) s390_cc_thunk_put1(op,dep1,False)
675#define s390_cc_thunk_putS(op,dep1) s390_cc_thunk_put1(op,dep1,True)
676#define s390_cc_thunk_putF(op,dep1) s390_cc_thunk_put1f(op,dep1)
677#define s390_cc_thunk_putZZ(op,dep1,dep2) s390_cc_thunk_put2(op,dep1,dep2,False)
678#define s390_cc_thunk_putSS(op,dep1,dep2) s390_cc_thunk_put2(op,dep1,dep2,True)
679#define s390_cc_thunk_putFF(op,dep1,dep2) s390_cc_thunk_put2f(op,dep1,dep2)
680#define s390_cc_thunk_putZZZ(op,dep1,dep2,ndep) \
681 s390_cc_thunk_put3(op,dep1,dep2,ndep,False)
682#define s390_cc_thunk_putSSS(op,dep1,dep2,ndep) \
683 s390_cc_thunk_put3(op,dep1,dep2,ndep,True)
684#define s390_call_calculate_iccZZ(op,dep1,dep2) \
685 s390_call_calculate_icc(op,dep1,dep2,False)
686#define s390_call_calculate_iccSS(op,dep1,dep2) \
687 s390_call_calculate_icc(op,dep1,dep2,True)
688
689
sewardj2019a972011-03-07 16:04:07 +0000690
691
692/*------------------------------------------------------------*/
693/*--- Guest register access ---*/
694/*------------------------------------------------------------*/
695
696
697/*------------------------------------------------------------*/
698/*--- ar registers ---*/
699/*------------------------------------------------------------*/
700
701/* Return the guest state offset of a ar register. */
702static UInt
703ar_offset(UInt archreg)
704{
705 static const UInt offset[16] = {
floriane88b3c92011-07-05 02:48:39 +0000706 S390X_GUEST_OFFSET(guest_a0),
707 S390X_GUEST_OFFSET(guest_a1),
708 S390X_GUEST_OFFSET(guest_a2),
709 S390X_GUEST_OFFSET(guest_a3),
710 S390X_GUEST_OFFSET(guest_a4),
711 S390X_GUEST_OFFSET(guest_a5),
712 S390X_GUEST_OFFSET(guest_a6),
713 S390X_GUEST_OFFSET(guest_a7),
714 S390X_GUEST_OFFSET(guest_a8),
715 S390X_GUEST_OFFSET(guest_a9),
716 S390X_GUEST_OFFSET(guest_a10),
717 S390X_GUEST_OFFSET(guest_a11),
718 S390X_GUEST_OFFSET(guest_a12),
719 S390X_GUEST_OFFSET(guest_a13),
720 S390X_GUEST_OFFSET(guest_a14),
721 S390X_GUEST_OFFSET(guest_a15),
sewardj2019a972011-03-07 16:04:07 +0000722 };
723
724 vassert(archreg < 16);
725
726 return offset[archreg];
727}
728
729
730/* Return the guest state offset of word #0 of a ar register. */
731static __inline__ UInt
732ar_w0_offset(UInt archreg)
733{
734 return ar_offset(archreg) + 0;
735}
736
737/* Write word #0 of a ar to the guest state. */
738static __inline__ void
739put_ar_w0(UInt archreg, IRExpr *expr)
740{
741 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I32);
742
743 stmt(IRStmt_Put(ar_w0_offset(archreg), expr));
744}
745
746/* Read word #0 of a ar register. */
747static __inline__ IRExpr *
748get_ar_w0(UInt archreg)
749{
750 return IRExpr_Get(ar_w0_offset(archreg), Ity_I32);
751}
752
753
754/*------------------------------------------------------------*/
755/*--- fpr registers ---*/
756/*------------------------------------------------------------*/
757
758/* Return the guest state offset of a fpr register. */
759static UInt
760fpr_offset(UInt archreg)
761{
762 static const UInt offset[16] = {
floriane88b3c92011-07-05 02:48:39 +0000763 S390X_GUEST_OFFSET(guest_f0),
764 S390X_GUEST_OFFSET(guest_f1),
765 S390X_GUEST_OFFSET(guest_f2),
766 S390X_GUEST_OFFSET(guest_f3),
767 S390X_GUEST_OFFSET(guest_f4),
768 S390X_GUEST_OFFSET(guest_f5),
769 S390X_GUEST_OFFSET(guest_f6),
770 S390X_GUEST_OFFSET(guest_f7),
771 S390X_GUEST_OFFSET(guest_f8),
772 S390X_GUEST_OFFSET(guest_f9),
773 S390X_GUEST_OFFSET(guest_f10),
774 S390X_GUEST_OFFSET(guest_f11),
775 S390X_GUEST_OFFSET(guest_f12),
776 S390X_GUEST_OFFSET(guest_f13),
777 S390X_GUEST_OFFSET(guest_f14),
778 S390X_GUEST_OFFSET(guest_f15),
sewardj2019a972011-03-07 16:04:07 +0000779 };
780
781 vassert(archreg < 16);
782
783 return offset[archreg];
784}
785
786
787/* Return the guest state offset of word #0 of a fpr register. */
788static __inline__ UInt
789fpr_w0_offset(UInt archreg)
790{
791 return fpr_offset(archreg) + 0;
792}
793
794/* Write word #0 of a fpr to the guest state. */
795static __inline__ void
796put_fpr_w0(UInt archreg, IRExpr *expr)
797{
798 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_F32);
799
800 stmt(IRStmt_Put(fpr_w0_offset(archreg), expr));
801}
802
803/* Read word #0 of a fpr register. */
804static __inline__ IRExpr *
805get_fpr_w0(UInt archreg)
806{
807 return IRExpr_Get(fpr_w0_offset(archreg), Ity_F32);
808}
809
810/* Return the guest state offset of double word #0 of a fpr register. */
811static __inline__ UInt
812fpr_dw0_offset(UInt archreg)
813{
814 return fpr_offset(archreg) + 0;
815}
816
817/* Write double word #0 of a fpr to the guest state. */
818static __inline__ void
819put_fpr_dw0(UInt archreg, IRExpr *expr)
820{
821 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_F64);
822
823 stmt(IRStmt_Put(fpr_dw0_offset(archreg), expr));
824}
825
826/* Read double word #0 of a fpr register. */
827static __inline__ IRExpr *
828get_fpr_dw0(UInt archreg)
829{
830 return IRExpr_Get(fpr_dw0_offset(archreg), Ity_F64);
831}
832
833
834/*------------------------------------------------------------*/
835/*--- gpr registers ---*/
836/*------------------------------------------------------------*/
837
838/* Return the guest state offset of a gpr register. */
839static UInt
840gpr_offset(UInt archreg)
841{
842 static const UInt offset[16] = {
floriane88b3c92011-07-05 02:48:39 +0000843 S390X_GUEST_OFFSET(guest_r0),
844 S390X_GUEST_OFFSET(guest_r1),
845 S390X_GUEST_OFFSET(guest_r2),
846 S390X_GUEST_OFFSET(guest_r3),
847 S390X_GUEST_OFFSET(guest_r4),
848 S390X_GUEST_OFFSET(guest_r5),
849 S390X_GUEST_OFFSET(guest_r6),
850 S390X_GUEST_OFFSET(guest_r7),
851 S390X_GUEST_OFFSET(guest_r8),
852 S390X_GUEST_OFFSET(guest_r9),
853 S390X_GUEST_OFFSET(guest_r10),
854 S390X_GUEST_OFFSET(guest_r11),
855 S390X_GUEST_OFFSET(guest_r12),
856 S390X_GUEST_OFFSET(guest_r13),
857 S390X_GUEST_OFFSET(guest_r14),
858 S390X_GUEST_OFFSET(guest_r15),
sewardj2019a972011-03-07 16:04:07 +0000859 };
860
861 vassert(archreg < 16);
862
863 return offset[archreg];
864}
865
866
867/* Return the guest state offset of word #0 of a gpr register. */
868static __inline__ UInt
869gpr_w0_offset(UInt archreg)
870{
871 return gpr_offset(archreg) + 0;
872}
873
874/* Write word #0 of a gpr to the guest state. */
875static __inline__ void
876put_gpr_w0(UInt archreg, IRExpr *expr)
877{
878 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I32);
879
880 stmt(IRStmt_Put(gpr_w0_offset(archreg), expr));
881}
882
883/* Read word #0 of a gpr register. */
884static __inline__ IRExpr *
885get_gpr_w0(UInt archreg)
886{
887 return IRExpr_Get(gpr_w0_offset(archreg), Ity_I32);
888}
889
890/* Return the guest state offset of double word #0 of a gpr register. */
891static __inline__ UInt
892gpr_dw0_offset(UInt archreg)
893{
894 return gpr_offset(archreg) + 0;
895}
896
897/* Write double word #0 of a gpr to the guest state. */
898static __inline__ void
899put_gpr_dw0(UInt archreg, IRExpr *expr)
900{
901 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I64);
902
903 stmt(IRStmt_Put(gpr_dw0_offset(archreg), expr));
904}
905
906/* Read double word #0 of a gpr register. */
907static __inline__ IRExpr *
908get_gpr_dw0(UInt archreg)
909{
910 return IRExpr_Get(gpr_dw0_offset(archreg), Ity_I64);
911}
912
913/* Return the guest state offset of half word #1 of a gpr register. */
914static __inline__ UInt
915gpr_hw1_offset(UInt archreg)
916{
917 return gpr_offset(archreg) + 2;
918}
919
920/* Write half word #1 of a gpr to the guest state. */
921static __inline__ void
922put_gpr_hw1(UInt archreg, IRExpr *expr)
923{
924 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I16);
925
926 stmt(IRStmt_Put(gpr_hw1_offset(archreg), expr));
927}
928
929/* Read half word #1 of a gpr register. */
930static __inline__ IRExpr *
931get_gpr_hw1(UInt archreg)
932{
933 return IRExpr_Get(gpr_hw1_offset(archreg), Ity_I16);
934}
935
936/* Return the guest state offset of byte #6 of a gpr register. */
937static __inline__ UInt
938gpr_b6_offset(UInt archreg)
939{
940 return gpr_offset(archreg) + 6;
941}
942
943/* Write byte #6 of a gpr to the guest state. */
944static __inline__ void
945put_gpr_b6(UInt archreg, IRExpr *expr)
946{
947 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I8);
948
949 stmt(IRStmt_Put(gpr_b6_offset(archreg), expr));
950}
951
952/* Read byte #6 of a gpr register. */
953static __inline__ IRExpr *
954get_gpr_b6(UInt archreg)
955{
956 return IRExpr_Get(gpr_b6_offset(archreg), Ity_I8);
957}
958
959/* Return the guest state offset of byte #3 of a gpr register. */
960static __inline__ UInt
961gpr_b3_offset(UInt archreg)
962{
963 return gpr_offset(archreg) + 3;
964}
965
966/* Write byte #3 of a gpr to the guest state. */
967static __inline__ void
968put_gpr_b3(UInt archreg, IRExpr *expr)
969{
970 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I8);
971
972 stmt(IRStmt_Put(gpr_b3_offset(archreg), expr));
973}
974
975/* Read byte #3 of a gpr register. */
976static __inline__ IRExpr *
977get_gpr_b3(UInt archreg)
978{
979 return IRExpr_Get(gpr_b3_offset(archreg), Ity_I8);
980}
981
982/* Return the guest state offset of byte #0 of a gpr register. */
983static __inline__ UInt
984gpr_b0_offset(UInt archreg)
985{
986 return gpr_offset(archreg) + 0;
987}
988
989/* Write byte #0 of a gpr to the guest state. */
990static __inline__ void
991put_gpr_b0(UInt archreg, IRExpr *expr)
992{
993 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I8);
994
995 stmt(IRStmt_Put(gpr_b0_offset(archreg), expr));
996}
997
998/* Read byte #0 of a gpr register. */
999static __inline__ IRExpr *
1000get_gpr_b0(UInt archreg)
1001{
1002 return IRExpr_Get(gpr_b0_offset(archreg), Ity_I8);
1003}
1004
1005/* Return the guest state offset of word #1 of a gpr register. */
1006static __inline__ UInt
1007gpr_w1_offset(UInt archreg)
1008{
1009 return gpr_offset(archreg) + 4;
1010}
1011
1012/* Write word #1 of a gpr to the guest state. */
1013static __inline__ void
1014put_gpr_w1(UInt archreg, IRExpr *expr)
1015{
1016 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I32);
1017
1018 stmt(IRStmt_Put(gpr_w1_offset(archreg), expr));
1019}
1020
1021/* Read word #1 of a gpr register. */
1022static __inline__ IRExpr *
1023get_gpr_w1(UInt archreg)
1024{
1025 return IRExpr_Get(gpr_w1_offset(archreg), Ity_I32);
1026}
1027
1028/* Return the guest state offset of half word #3 of a gpr register. */
1029static __inline__ UInt
1030gpr_hw3_offset(UInt archreg)
1031{
1032 return gpr_offset(archreg) + 6;
1033}
1034
1035/* Write half word #3 of a gpr to the guest state. */
1036static __inline__ void
1037put_gpr_hw3(UInt archreg, IRExpr *expr)
1038{
1039 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I16);
1040
1041 stmt(IRStmt_Put(gpr_hw3_offset(archreg), expr));
1042}
1043
1044/* Read half word #3 of a gpr register. */
1045static __inline__ IRExpr *
1046get_gpr_hw3(UInt archreg)
1047{
1048 return IRExpr_Get(gpr_hw3_offset(archreg), Ity_I16);
1049}
1050
1051/* Return the guest state offset of byte #7 of a gpr register. */
1052static __inline__ UInt
1053gpr_b7_offset(UInt archreg)
1054{
1055 return gpr_offset(archreg) + 7;
1056}
1057
1058/* Write byte #7 of a gpr to the guest state. */
1059static __inline__ void
1060put_gpr_b7(UInt archreg, IRExpr *expr)
1061{
1062 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I8);
1063
1064 stmt(IRStmt_Put(gpr_b7_offset(archreg), expr));
1065}
1066
1067/* Read byte #7 of a gpr register. */
1068static __inline__ IRExpr *
1069get_gpr_b7(UInt archreg)
1070{
1071 return IRExpr_Get(gpr_b7_offset(archreg), Ity_I8);
1072}
1073
1074/* Return the guest state offset of half word #0 of a gpr register. */
1075static __inline__ UInt
1076gpr_hw0_offset(UInt archreg)
1077{
1078 return gpr_offset(archreg) + 0;
1079}
1080
1081/* Write half word #0 of a gpr to the guest state. */
1082static __inline__ void
1083put_gpr_hw0(UInt archreg, IRExpr *expr)
1084{
1085 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I16);
1086
1087 stmt(IRStmt_Put(gpr_hw0_offset(archreg), expr));
1088}
1089
1090/* Read half word #0 of a gpr register. */
1091static __inline__ IRExpr *
1092get_gpr_hw0(UInt archreg)
1093{
1094 return IRExpr_Get(gpr_hw0_offset(archreg), Ity_I16);
1095}
1096
1097/* Return the guest state offset of byte #4 of a gpr register. */
1098static __inline__ UInt
1099gpr_b4_offset(UInt archreg)
1100{
1101 return gpr_offset(archreg) + 4;
1102}
1103
1104/* Write byte #4 of a gpr to the guest state. */
1105static __inline__ void
1106put_gpr_b4(UInt archreg, IRExpr *expr)
1107{
1108 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I8);
1109
1110 stmt(IRStmt_Put(gpr_b4_offset(archreg), expr));
1111}
1112
1113/* Read byte #4 of a gpr register. */
1114static __inline__ IRExpr *
1115get_gpr_b4(UInt archreg)
1116{
1117 return IRExpr_Get(gpr_b4_offset(archreg), Ity_I8);
1118}
1119
1120/* Return the guest state offset of byte #1 of a gpr register. */
1121static __inline__ UInt
1122gpr_b1_offset(UInt archreg)
1123{
1124 return gpr_offset(archreg) + 1;
1125}
1126
1127/* Write byte #1 of a gpr to the guest state. */
1128static __inline__ void
1129put_gpr_b1(UInt archreg, IRExpr *expr)
1130{
1131 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I8);
1132
1133 stmt(IRStmt_Put(gpr_b1_offset(archreg), expr));
1134}
1135
1136/* Read byte #1 of a gpr register. */
1137static __inline__ IRExpr *
1138get_gpr_b1(UInt archreg)
1139{
1140 return IRExpr_Get(gpr_b1_offset(archreg), Ity_I8);
1141}
1142
1143/* Return the guest state offset of half word #2 of a gpr register. */
1144static __inline__ UInt
1145gpr_hw2_offset(UInt archreg)
1146{
1147 return gpr_offset(archreg) + 4;
1148}
1149
1150/* Write half word #2 of a gpr to the guest state. */
1151static __inline__ void
1152put_gpr_hw2(UInt archreg, IRExpr *expr)
1153{
1154 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I16);
1155
1156 stmt(IRStmt_Put(gpr_hw2_offset(archreg), expr));
1157}
1158
1159/* Read half word #2 of a gpr register. */
1160static __inline__ IRExpr *
1161get_gpr_hw2(UInt archreg)
1162{
1163 return IRExpr_Get(gpr_hw2_offset(archreg), Ity_I16);
1164}
1165
1166/* Return the guest state offset of byte #5 of a gpr register. */
1167static __inline__ UInt
1168gpr_b5_offset(UInt archreg)
1169{
1170 return gpr_offset(archreg) + 5;
1171}
1172
1173/* Write byte #5 of a gpr to the guest state. */
1174static __inline__ void
1175put_gpr_b5(UInt archreg, IRExpr *expr)
1176{
1177 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I8);
1178
1179 stmt(IRStmt_Put(gpr_b5_offset(archreg), expr));
1180}
1181
1182/* Read byte #5 of a gpr register. */
1183static __inline__ IRExpr *
1184get_gpr_b5(UInt archreg)
1185{
1186 return IRExpr_Get(gpr_b5_offset(archreg), Ity_I8);
1187}
1188
1189/* Return the guest state offset of byte #2 of a gpr register. */
1190static __inline__ UInt
1191gpr_b2_offset(UInt archreg)
1192{
1193 return gpr_offset(archreg) + 2;
1194}
1195
1196/* Write byte #2 of a gpr to the guest state. */
1197static __inline__ void
1198put_gpr_b2(UInt archreg, IRExpr *expr)
1199{
1200 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I8);
1201
1202 stmt(IRStmt_Put(gpr_b2_offset(archreg), expr));
1203}
1204
1205/* Read byte #2 of a gpr register. */
1206static __inline__ IRExpr *
1207get_gpr_b2(UInt archreg)
1208{
1209 return IRExpr_Get(gpr_b2_offset(archreg), Ity_I8);
1210}
1211
1212/* Return the guest state offset of the counter register. */
1213static UInt
1214counter_offset(void)
1215{
floriane88b3c92011-07-05 02:48:39 +00001216 return S390X_GUEST_OFFSET(guest_counter);
sewardj2019a972011-03-07 16:04:07 +00001217}
1218
1219/* Return the guest state offset of double word #0 of the counter register. */
1220static __inline__ UInt
1221counter_dw0_offset(void)
1222{
1223 return counter_offset() + 0;
1224}
1225
1226/* Write double word #0 of the counter to the guest state. */
1227static __inline__ void
1228put_counter_dw0(IRExpr *expr)
1229{
1230 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I64);
1231
1232 stmt(IRStmt_Put(counter_dw0_offset(), expr));
1233}
1234
1235/* Read double word #0 of the counter register. */
1236static __inline__ IRExpr *
1237get_counter_dw0(void)
1238{
1239 return IRExpr_Get(counter_dw0_offset(), Ity_I64);
1240}
1241
1242/* Return the guest state offset of word #0 of the counter register. */
1243static __inline__ UInt
1244counter_w0_offset(void)
1245{
1246 return counter_offset() + 0;
1247}
1248
1249/* Return the guest state offset of word #1 of the counter register. */
1250static __inline__ UInt
1251counter_w1_offset(void)
1252{
1253 return counter_offset() + 4;
1254}
1255
1256/* Write word #0 of the counter to the guest state. */
1257static __inline__ void
1258put_counter_w0(IRExpr *expr)
1259{
1260 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I32);
1261
1262 stmt(IRStmt_Put(counter_w0_offset(), expr));
1263}
1264
1265/* Read word #0 of the counter register. */
1266static __inline__ IRExpr *
1267get_counter_w0(void)
1268{
1269 return IRExpr_Get(counter_w0_offset(), Ity_I32);
1270}
1271
1272/* Write word #1 of the counter to the guest state. */
1273static __inline__ void
1274put_counter_w1(IRExpr *expr)
1275{
1276 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I32);
1277
1278 stmt(IRStmt_Put(counter_w1_offset(), expr));
1279}
1280
1281/* Read word #1 of the counter register. */
1282static __inline__ IRExpr *
1283get_counter_w1(void)
1284{
1285 return IRExpr_Get(counter_w1_offset(), Ity_I32);
1286}
1287
1288/* Return the guest state offset of the fpc register. */
1289static UInt
1290fpc_offset(void)
1291{
floriane88b3c92011-07-05 02:48:39 +00001292 return S390X_GUEST_OFFSET(guest_fpc);
sewardj2019a972011-03-07 16:04:07 +00001293}
1294
1295/* Return the guest state offset of word #0 of the fpc register. */
1296static __inline__ UInt
1297fpc_w0_offset(void)
1298{
1299 return fpc_offset() + 0;
1300}
1301
1302/* Write word #0 of the fpc to the guest state. */
1303static __inline__ void
1304put_fpc_w0(IRExpr *expr)
1305{
1306 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I32);
1307
1308 stmt(IRStmt_Put(fpc_w0_offset(), expr));
1309}
1310
1311/* Read word #0 of the fpc register. */
1312static __inline__ IRExpr *
1313get_fpc_w0(void)
1314{
1315 return IRExpr_Get(fpc_w0_offset(), Ity_I32);
1316}
1317
1318
1319/*------------------------------------------------------------*/
1320/*--- Build IR for formats ---*/
1321/*------------------------------------------------------------*/
1322static void
1323s390_format_I(HChar *(*irgen)(UChar i),
1324 UChar i)
1325{
1326 HChar *mnm = irgen(i);
1327
sewardj7ee97522011-05-09 21:45:04 +00001328 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001329 s390_disasm(ENC2(MNM, UINT), mnm, i);
1330}
1331
1332static void
1333s390_format_RI(HChar *(*irgen)(UChar r1, UShort i2),
1334 UChar r1, UShort i2)
1335{
1336 irgen(r1, i2);
1337}
1338
1339static void
1340s390_format_RI_RU(HChar *(*irgen)(UChar r1, UShort i2),
1341 UChar r1, UShort i2)
1342{
1343 HChar *mnm = irgen(r1, i2);
1344
sewardj7ee97522011-05-09 21:45:04 +00001345 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001346 s390_disasm(ENC3(MNM, GPR, UINT), mnm, r1, i2);
1347}
1348
1349static void
1350s390_format_RI_RI(HChar *(*irgen)(UChar r1, UShort i2),
1351 UChar r1, UShort i2)
1352{
1353 HChar *mnm = irgen(r1, i2);
1354
sewardj7ee97522011-05-09 21:45:04 +00001355 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001356 s390_disasm(ENC3(MNM, GPR, INT), mnm, r1, (Int)(Short)i2);
1357}
1358
1359static void
1360s390_format_RI_RP(HChar *(*irgen)(UChar r1, UShort i2),
1361 UChar r1, UShort i2)
1362{
1363 HChar *mnm = irgen(r1, i2);
1364
sewardj7ee97522011-05-09 21:45:04 +00001365 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001366 s390_disasm(ENC3(MNM, GPR, PCREL), mnm, r1, (Int)(Short)i2);
1367}
1368
1369static void
1370s390_format_RIE_RRP(HChar *(*irgen)(UChar r1, UChar r3, UShort i2),
1371 UChar r1, UChar r3, UShort i2)
1372{
1373 HChar *mnm = irgen(r1, r3, i2);
1374
sewardj7ee97522011-05-09 21:45:04 +00001375 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001376 s390_disasm(ENC4(MNM, GPR, GPR, PCREL), mnm, r1, r3, (Int)(Short)i2);
1377}
1378
1379static void
1380s390_format_RIE_RRI0(HChar *(*irgen)(UChar r1, UChar r3, UShort i2),
1381 UChar r1, UChar r3, UShort i2)
1382{
1383 HChar *mnm = irgen(r1, r3, i2);
1384
sewardj7ee97522011-05-09 21:45:04 +00001385 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001386 s390_disasm(ENC4(MNM, GPR, GPR, INT), mnm, r1, r3, (Int)(Short)i2);
1387}
1388
1389static void
1390s390_format_RIE_RRUUU(HChar *(*irgen)(UChar r1, UChar r2, UChar i3, UChar i4,
1391 UChar i5),
1392 UChar r1, UChar r2, UChar i3, UChar i4, UChar i5)
1393{
1394 HChar *mnm = irgen(r1, r2, i3, i4, i5);
1395
sewardj7ee97522011-05-09 21:45:04 +00001396 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001397 s390_disasm(ENC6(MNM, GPR, GPR, UINT, UINT, UINT), mnm, r1, r2, i3, i4,
1398 i5);
1399}
1400
1401static void
1402s390_format_RIE_RRPU(HChar *(*irgen)(UChar r1, UChar r2, UShort i4, UChar m3),
1403 UChar r1, UChar r2, UShort i4, UChar m3)
1404{
1405 HChar *mnm = irgen(r1, r2, i4, m3);
1406
sewardj7ee97522011-05-09 21:45:04 +00001407 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001408 s390_disasm(ENC5(XMNM, GPR, GPR, CABM, PCREL), S390_XMNM_CAB, mnm, m3, r1,
1409 r2, m3, (Int)(Short)i4);
1410}
1411
1412static void
1413s390_format_RIE_RUPU(HChar *(*irgen)(UChar r1, UChar m3, UShort i4, UChar i2),
1414 UChar r1, UChar m3, UShort i4, UChar i2)
1415{
1416 HChar *mnm = irgen(r1, m3, i4, i2);
1417
sewardj7ee97522011-05-09 21:45:04 +00001418 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001419 s390_disasm(ENC5(XMNM, GPR, UINT, CABM, PCREL), S390_XMNM_CAB, mnm, m3,
1420 r1, i2, m3, (Int)(Short)i4);
1421}
1422
1423static void
1424s390_format_RIE_RUPI(HChar *(*irgen)(UChar r1, UChar m3, UShort i4, UChar i2),
1425 UChar r1, UChar m3, UShort i4, UChar i2)
1426{
1427 HChar *mnm = irgen(r1, m3, i4, i2);
1428
sewardj7ee97522011-05-09 21:45:04 +00001429 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001430 s390_disasm(ENC5(XMNM, GPR, INT, CABM, PCREL), S390_XMNM_CAB, mnm, m3, r1,
1431 (Int)(Char)i2, m3, (Int)(Short)i4);
1432}
1433
1434static void
1435s390_format_RIL(HChar *(*irgen)(UChar r1, UInt i2),
1436 UChar r1, UInt i2)
1437{
1438 irgen(r1, i2);
1439}
1440
1441static void
1442s390_format_RIL_RU(HChar *(*irgen)(UChar r1, UInt i2),
1443 UChar r1, UInt i2)
1444{
1445 HChar *mnm = irgen(r1, i2);
1446
sewardj7ee97522011-05-09 21:45:04 +00001447 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001448 s390_disasm(ENC3(MNM, GPR, UINT), mnm, r1, i2);
1449}
1450
1451static void
1452s390_format_RIL_RI(HChar *(*irgen)(UChar r1, UInt i2),
1453 UChar r1, UInt i2)
1454{
1455 HChar *mnm = irgen(r1, i2);
1456
sewardj7ee97522011-05-09 21:45:04 +00001457 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001458 s390_disasm(ENC3(MNM, GPR, INT), mnm, r1, i2);
1459}
1460
1461static void
1462s390_format_RIL_RP(HChar *(*irgen)(UChar r1, UInt i2),
1463 UChar r1, UInt i2)
1464{
1465 HChar *mnm = irgen(r1, i2);
1466
sewardj7ee97522011-05-09 21:45:04 +00001467 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001468 s390_disasm(ENC3(MNM, GPR, PCREL), mnm, r1, i2);
1469}
1470
1471static void
1472s390_format_RIL_UP(HChar *(*irgen)(void),
1473 UChar r1, UInt i2)
1474{
1475 HChar *mnm = irgen();
1476
sewardj7ee97522011-05-09 21:45:04 +00001477 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001478 s390_disasm(ENC3(MNM, UINT, PCREL), mnm, r1, i2);
1479}
1480
1481static void
1482s390_format_RIS_RURDI(HChar *(*irgen)(UChar r1, UChar m3, UChar i2,
1483 IRTemp op4addr),
1484 UChar r1, UChar m3, UChar b4, UShort d4, UChar i2)
1485{
1486 HChar *mnm;
1487 IRTemp op4addr = newTemp(Ity_I64);
1488
1489 assign(op4addr, binop(Iop_Add64, mkU64(d4), b4 != 0 ? get_gpr_dw0(b4) :
1490 mkU64(0)));
1491
1492 mnm = irgen(r1, m3, i2, op4addr);
1493
sewardj7ee97522011-05-09 21:45:04 +00001494 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001495 s390_disasm(ENC5(XMNM, GPR, INT, CABM, UDXB), S390_XMNM_CAB, mnm, m3, r1,
1496 (Int)(Char)i2, m3, d4, 0, b4);
1497}
1498
1499static void
1500s390_format_RIS_RURDU(HChar *(*irgen)(UChar r1, UChar m3, UChar i2,
1501 IRTemp op4addr),
1502 UChar r1, UChar m3, UChar b4, UShort d4, UChar i2)
1503{
1504 HChar *mnm;
1505 IRTemp op4addr = newTemp(Ity_I64);
1506
1507 assign(op4addr, binop(Iop_Add64, mkU64(d4), b4 != 0 ? get_gpr_dw0(b4) :
1508 mkU64(0)));
1509
1510 mnm = irgen(r1, m3, i2, op4addr);
1511
sewardj7ee97522011-05-09 21:45:04 +00001512 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001513 s390_disasm(ENC5(XMNM, GPR, UINT, CABM, UDXB), S390_XMNM_CAB, mnm, m3, r1,
1514 i2, m3, d4, 0, b4);
1515}
1516
1517static void
1518s390_format_RR(HChar *(*irgen)(UChar r1, UChar r2),
1519 UChar r1, UChar r2)
1520{
1521 irgen(r1, r2);
1522}
1523
1524static void
1525s390_format_RR_RR(HChar *(*irgen)(UChar r1, UChar r2),
1526 UChar r1, UChar r2)
1527{
1528 HChar *mnm = irgen(r1, r2);
1529
sewardj7ee97522011-05-09 21:45:04 +00001530 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001531 s390_disasm(ENC3(MNM, GPR, GPR), mnm, r1, r2);
1532}
1533
1534static void
1535s390_format_RR_FF(HChar *(*irgen)(UChar r1, UChar r2),
1536 UChar r1, UChar r2)
1537{
1538 HChar *mnm = irgen(r1, r2);
1539
sewardj7ee97522011-05-09 21:45:04 +00001540 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001541 s390_disasm(ENC3(MNM, FPR, FPR), mnm, r1, r2);
1542}
1543
1544static void
1545s390_format_RRE(HChar *(*irgen)(UChar r1, UChar r2),
1546 UChar r1, UChar r2)
1547{
1548 irgen(r1, r2);
1549}
1550
1551static void
1552s390_format_RRE_RR(HChar *(*irgen)(UChar r1, UChar r2),
1553 UChar r1, UChar r2)
1554{
1555 HChar *mnm = irgen(r1, r2);
1556
sewardj7ee97522011-05-09 21:45:04 +00001557 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001558 s390_disasm(ENC3(MNM, GPR, GPR), mnm, r1, r2);
1559}
1560
1561static void
1562s390_format_RRE_FF(HChar *(*irgen)(UChar r1, UChar r2),
1563 UChar r1, UChar r2)
1564{
1565 HChar *mnm = irgen(r1, r2);
1566
sewardj7ee97522011-05-09 21:45:04 +00001567 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001568 s390_disasm(ENC3(MNM, FPR, FPR), mnm, r1, r2);
1569}
1570
1571static void
1572s390_format_RRE_RF(HChar *(*irgen)(UChar, UChar),
1573 UChar r1, UChar r2)
1574{
1575 HChar *mnm = irgen(r1, r2);
1576
sewardj7ee97522011-05-09 21:45:04 +00001577 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001578 s390_disasm(ENC3(MNM, GPR, FPR), mnm, r1, r2);
1579}
1580
1581static void
1582s390_format_RRE_FR(HChar *(*irgen)(UChar r1, UChar r2),
1583 UChar r1, UChar r2)
1584{
1585 HChar *mnm = irgen(r1, r2);
1586
sewardj7ee97522011-05-09 21:45:04 +00001587 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001588 s390_disasm(ENC3(MNM, FPR, GPR), mnm, r1, r2);
1589}
1590
1591static void
1592s390_format_RRE_R0(HChar *(*irgen)(UChar r1),
1593 UChar r1)
1594{
1595 HChar *mnm = irgen(r1);
1596
sewardj7ee97522011-05-09 21:45:04 +00001597 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001598 s390_disasm(ENC2(MNM, GPR), mnm, r1);
1599}
1600
1601static void
1602s390_format_RRE_F0(HChar *(*irgen)(UChar r1),
1603 UChar r1)
1604{
1605 HChar *mnm = irgen(r1);
1606
sewardj7ee97522011-05-09 21:45:04 +00001607 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001608 s390_disasm(ENC2(MNM, FPR), mnm, r1);
1609}
1610
1611static void
florian9af37692012-01-15 21:01:16 +00001612s390_format_RRF_M0RERE(HChar *(*irgen)(UChar m3, UChar r1, UChar r2),
1613 UChar m3, UChar r1, UChar r2)
1614{
1615 irgen(m3, r1, r2);
1616
1617 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
1618 s390_disasm(ENC3(MNM, GPR, GPR), m3, r1, r2);
1619}
1620
1621static void
sewardj2019a972011-03-07 16:04:07 +00001622s390_format_RRF_F0FF(HChar *(*irgen)(UChar, UChar, UChar),
1623 UChar r1, UChar r3, UChar r2)
1624{
1625 HChar *mnm = irgen(r1, r3, r2);
1626
sewardj7ee97522011-05-09 21:45:04 +00001627 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001628 s390_disasm(ENC4(MNM, FPR, FPR, FPR), mnm, r1, r3, r2);
1629}
1630
1631static void
sewardjd7bde722011-04-05 13:19:33 +00001632s390_format_RRF_U0RR(HChar *(*irgen)(UChar m3, UChar r1, UChar r2),
1633 UChar m3, UChar r1, UChar r2, Int xmnm_kind)
1634{
1635 irgen(m3, r1, r2);
1636
sewardj7ee97522011-05-09 21:45:04 +00001637 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardjd7bde722011-04-05 13:19:33 +00001638 s390_disasm(ENC3(XMNM, GPR, GPR), xmnm_kind, m3, r1, r2);
1639}
1640
1641static void
sewardj2019a972011-03-07 16:04:07 +00001642s390_format_RRF_U0RF(HChar *(*irgen)(UChar r3, UChar r1, UChar r2),
1643 UChar r3, UChar r1, UChar r2)
1644{
1645 HChar *mnm = irgen(r3, r1, r2);
1646
sewardj7ee97522011-05-09 21:45:04 +00001647 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001648 s390_disasm(ENC4(MNM, GPR, UINT, FPR), mnm, r1, r3, r2);
1649}
1650
1651static void
1652s390_format_RRF_F0FF2(HChar *(*irgen)(UChar, UChar, UChar),
1653 UChar r3, UChar r1, UChar r2)
1654{
1655 HChar *mnm = irgen(r3, r1, r2);
1656
sewardj7ee97522011-05-09 21:45:04 +00001657 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001658 s390_disasm(ENC4(MNM, FPR, FPR, FPR), mnm, r1, r3, r2);
1659}
1660
1661static void
1662s390_format_RRF_R0RR2(HChar *(*irgen)(UChar r3, UChar r1, UChar r2),
1663 UChar r3, UChar r1, UChar r2)
1664{
1665 HChar *mnm = irgen(r3, r1, r2);
1666
sewardj7ee97522011-05-09 21:45:04 +00001667 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001668 s390_disasm(ENC4(MNM, GPR, GPR, GPR), mnm, r1, r2, r3);
1669}
1670
1671static void
1672s390_format_RRS(HChar *(*irgen)(UChar r1, UChar r2, UChar m3, IRTemp op4addr),
1673 UChar r1, UChar r2, UChar b4, UShort d4, UChar m3)
1674{
1675 HChar *mnm;
1676 IRTemp op4addr = newTemp(Ity_I64);
1677
1678 assign(op4addr, binop(Iop_Add64, mkU64(d4), b4 != 0 ? get_gpr_dw0(b4) :
1679 mkU64(0)));
1680
1681 mnm = irgen(r1, r2, m3, op4addr);
1682
sewardj7ee97522011-05-09 21:45:04 +00001683 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001684 s390_disasm(ENC5(XMNM, GPR, GPR, CABM, UDXB), S390_XMNM_CAB, mnm, m3, r1,
1685 r2, m3, d4, 0, b4);
1686}
1687
1688static void
1689s390_format_RS_R0RD(HChar *(*irgen)(UChar r1, IRTemp op2addr),
1690 UChar r1, UChar b2, UShort d2)
1691{
1692 HChar *mnm;
1693 IRTemp op2addr = newTemp(Ity_I64);
1694
1695 assign(op2addr, binop(Iop_Add64, mkU64(d2), b2 != 0 ? get_gpr_dw0(b2) :
1696 mkU64(0)));
1697
1698 mnm = irgen(r1, op2addr);
1699
sewardj7ee97522011-05-09 21:45:04 +00001700 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001701 s390_disasm(ENC3(MNM, GPR, UDXB), mnm, r1, d2, 0, b2);
1702}
1703
1704static void
1705s390_format_RS_RRRD(HChar *(*irgen)(UChar r1, UChar r3, IRTemp op2addr),
1706 UChar r1, UChar r3, UChar b2, UShort d2)
1707{
1708 HChar *mnm;
1709 IRTemp op2addr = newTemp(Ity_I64);
1710
1711 assign(op2addr, binop(Iop_Add64, mkU64(d2), b2 != 0 ? get_gpr_dw0(b2) :
1712 mkU64(0)));
1713
1714 mnm = irgen(r1, r3, op2addr);
1715
sewardj7ee97522011-05-09 21:45:04 +00001716 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001717 s390_disasm(ENC4(MNM, GPR, GPR, UDXB), mnm, r1, r3, d2, 0, b2);
1718}
1719
1720static void
1721s390_format_RS_RURD(HChar *(*irgen)(UChar r1, UChar r3, IRTemp op2addr),
1722 UChar r1, UChar r3, UChar b2, UShort d2)
1723{
1724 HChar *mnm;
1725 IRTemp op2addr = newTemp(Ity_I64);
1726
1727 assign(op2addr, binop(Iop_Add64, mkU64(d2), b2 != 0 ? get_gpr_dw0(b2) :
1728 mkU64(0)));
1729
1730 mnm = irgen(r1, r3, op2addr);
1731
sewardj7ee97522011-05-09 21:45:04 +00001732 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001733 s390_disasm(ENC4(MNM, GPR, UINT, UDXB), mnm, r1, r3, d2, 0, b2);
1734}
1735
1736static void
1737s390_format_RS_AARD(HChar *(*irgen)(UChar, UChar, IRTemp),
1738 UChar r1, UChar r3, UChar b2, UShort d2)
1739{
1740 HChar *mnm;
1741 IRTemp op2addr = newTemp(Ity_I64);
1742
1743 assign(op2addr, binop(Iop_Add64, mkU64(d2), b2 != 0 ? get_gpr_dw0(b2) :
1744 mkU64(0)));
1745
1746 mnm = irgen(r1, r3, op2addr);
1747
sewardj7ee97522011-05-09 21:45:04 +00001748 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001749 s390_disasm(ENC4(MNM, AR, AR, UDXB), mnm, r1, r3, d2, 0, b2);
1750}
1751
1752static void
1753s390_format_RSI_RRP(HChar *(*irgen)(UChar r1, UChar r3, UShort i2),
1754 UChar r1, UChar r3, UShort i2)
1755{
1756 HChar *mnm = irgen(r1, r3, i2);
1757
sewardj7ee97522011-05-09 21:45:04 +00001758 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001759 s390_disasm(ENC4(MNM, GPR, GPR, PCREL), mnm, r1, r3, (Int)(Short)i2);
1760}
1761
1762static void
1763s390_format_RSY_RRRD(HChar *(*irgen)(UChar r1, UChar r3, IRTemp op2addr),
1764 UChar r1, UChar r3, UChar b2, UShort dl2, UChar dh2)
1765{
1766 HChar *mnm;
1767 IRTemp op2addr = newTemp(Ity_I64);
1768 IRTemp d2 = newTemp(Ity_I64);
1769
1770 assign(d2, mkU64(((ULong)(Long)(Char)dh2 << 12) | ((ULong)dl2)));
1771 assign(op2addr, binop(Iop_Add64, mkexpr(d2), b2 != 0 ? get_gpr_dw0(b2) :
1772 mkU64(0)));
1773
1774 mnm = irgen(r1, r3, op2addr);
1775
sewardj7ee97522011-05-09 21:45:04 +00001776 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001777 s390_disasm(ENC4(MNM, GPR, GPR, SDXB), mnm, r1, r3, dh2, dl2, 0, b2);
1778}
1779
1780static void
1781s390_format_RSY_AARD(HChar *(*irgen)(UChar, UChar, IRTemp),
1782 UChar r1, UChar r3, UChar b2, UShort dl2, UChar dh2)
1783{
1784 HChar *mnm;
1785 IRTemp op2addr = newTemp(Ity_I64);
1786 IRTemp d2 = newTemp(Ity_I64);
1787
1788 assign(d2, mkU64(((ULong)(Long)(Char)dh2 << 12) | ((ULong)dl2)));
1789 assign(op2addr, binop(Iop_Add64, mkexpr(d2), b2 != 0 ? get_gpr_dw0(b2) :
1790 mkU64(0)));
1791
1792 mnm = irgen(r1, r3, op2addr);
1793
sewardj7ee97522011-05-09 21:45:04 +00001794 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001795 s390_disasm(ENC4(MNM, AR, AR, SDXB), mnm, r1, r3, dh2, dl2, 0, b2);
1796}
1797
1798static void
1799s390_format_RSY_RURD(HChar *(*irgen)(UChar r1, UChar r3, IRTemp op2addr),
1800 UChar r1, UChar r3, UChar b2, UShort dl2, UChar dh2)
1801{
1802 HChar *mnm;
1803 IRTemp op2addr = newTemp(Ity_I64);
1804 IRTemp d2 = newTemp(Ity_I64);
1805
1806 assign(d2, mkU64(((ULong)(Long)(Char)dh2 << 12) | ((ULong)dl2)));
1807 assign(op2addr, binop(Iop_Add64, mkexpr(d2), b2 != 0 ? get_gpr_dw0(b2) :
1808 mkU64(0)));
1809
1810 mnm = irgen(r1, r3, op2addr);
1811
sewardj7ee97522011-05-09 21:45:04 +00001812 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001813 s390_disasm(ENC4(MNM, GPR, UINT, SDXB), mnm, r1, r3, dh2, dl2, 0, b2);
1814}
1815
1816static void
sewardjd7bde722011-04-05 13:19:33 +00001817s390_format_RSY_RDRM(HChar *(*irgen)(UChar r1, IRTemp op2addr),
1818 UChar r1, UChar m3, UChar b2, UShort dl2, UChar dh2,
1819 Int xmnm_kind)
1820{
1821 IRTemp op2addr = newTemp(Ity_I64);
1822 IRTemp d2 = newTemp(Ity_I64);
1823
1824 if_condition_goto(binop(Iop_CmpEQ32, s390_call_calculate_cond(m3), mkU32(0)),
1825 guest_IA_next_instr);
1826 assign(d2, mkU64(((ULong)(Long)(Char)dh2 << 12) | ((ULong)dl2)));
1827 assign(op2addr, binop(Iop_Add64, mkexpr(d2), b2 != 0 ? get_gpr_dw0(b2) :
1828 mkU64(0)));
1829
1830 irgen(r1, op2addr);
1831
sewardj7ee97522011-05-09 21:45:04 +00001832 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardjd7bde722011-04-05 13:19:33 +00001833 s390_disasm(ENC3(XMNM, GPR, SDXB), xmnm_kind, m3, r1, dh2, dl2, 0, b2);
1834}
1835
1836static void
sewardj2019a972011-03-07 16:04:07 +00001837s390_format_RX(HChar *(*irgen)(UChar r1, UChar x2, UChar b2, UShort d2,
1838 IRTemp op2addr),
1839 UChar r1, UChar x2, UChar b2, UShort d2)
1840{
1841 IRTemp op2addr = newTemp(Ity_I64);
1842
1843 assign(op2addr, binop(Iop_Add64, binop(Iop_Add64, mkU64(d2),
1844 b2 != 0 ? get_gpr_dw0(b2) : mkU64(0)), x2 != 0 ? get_gpr_dw0(x2) :
1845 mkU64(0)));
1846
1847 irgen(r1, x2, b2, d2, op2addr);
1848}
1849
1850static void
1851s390_format_RX_RRRD(HChar *(*irgen)(UChar r1, IRTemp op2addr),
1852 UChar r1, UChar x2, UChar b2, UShort d2)
1853{
1854 HChar *mnm;
1855 IRTemp op2addr = newTemp(Ity_I64);
1856
1857 assign(op2addr, binop(Iop_Add64, binop(Iop_Add64, mkU64(d2),
1858 b2 != 0 ? get_gpr_dw0(b2) : mkU64(0)), x2 != 0 ? get_gpr_dw0(x2) :
1859 mkU64(0)));
1860
1861 mnm = irgen(r1, op2addr);
1862
sewardj7ee97522011-05-09 21:45:04 +00001863 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001864 s390_disasm(ENC3(MNM, GPR, UDXB), mnm, r1, d2, x2, b2);
1865}
1866
1867static void
1868s390_format_RX_FRRD(HChar *(*irgen)(UChar r1, IRTemp op2addr),
1869 UChar r1, UChar x2, UChar b2, UShort d2)
1870{
1871 HChar *mnm;
1872 IRTemp op2addr = newTemp(Ity_I64);
1873
1874 assign(op2addr, binop(Iop_Add64, binop(Iop_Add64, mkU64(d2),
1875 b2 != 0 ? get_gpr_dw0(b2) : mkU64(0)), x2 != 0 ? get_gpr_dw0(x2) :
1876 mkU64(0)));
1877
1878 mnm = irgen(r1, op2addr);
1879
sewardj7ee97522011-05-09 21:45:04 +00001880 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001881 s390_disasm(ENC3(MNM, FPR, UDXB), mnm, r1, d2, x2, b2);
1882}
1883
1884static void
1885s390_format_RXE_FRRD(HChar *(*irgen)(UChar r1, IRTemp op2addr),
1886 UChar r1, UChar x2, UChar b2, UShort d2)
1887{
1888 HChar *mnm;
1889 IRTemp op2addr = newTemp(Ity_I64);
1890
1891 assign(op2addr, binop(Iop_Add64, binop(Iop_Add64, mkU64(d2),
1892 b2 != 0 ? get_gpr_dw0(b2) : mkU64(0)), x2 != 0 ? get_gpr_dw0(x2) :
1893 mkU64(0)));
1894
1895 mnm = irgen(r1, op2addr);
1896
sewardj7ee97522011-05-09 21:45:04 +00001897 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001898 s390_disasm(ENC3(MNM, FPR, UDXB), mnm, r1, d2, x2, b2);
1899}
1900
1901static void
1902s390_format_RXF_FRRDF(HChar *(*irgen)(UChar, IRTemp, UChar),
1903 UChar r3, UChar x2, UChar b2, UShort d2, UChar r1)
1904{
1905 HChar *mnm;
1906 IRTemp op2addr = newTemp(Ity_I64);
1907
1908 assign(op2addr, binop(Iop_Add64, binop(Iop_Add64, mkU64(d2),
1909 b2 != 0 ? get_gpr_dw0(b2) : mkU64(0)), x2 != 0 ? get_gpr_dw0(x2) :
1910 mkU64(0)));
1911
1912 mnm = irgen(r3, op2addr, r1);
1913
sewardj7ee97522011-05-09 21:45:04 +00001914 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001915 s390_disasm(ENC4(MNM, FPR, FPR, UDXB), mnm, r1, r3, d2, x2, b2);
1916}
1917
1918static void
1919s390_format_RXY_RRRD(HChar *(*irgen)(UChar r1, IRTemp op2addr),
1920 UChar r1, UChar x2, UChar b2, UShort dl2, UChar dh2)
1921{
1922 HChar *mnm;
1923 IRTemp op2addr = newTemp(Ity_I64);
1924 IRTemp d2 = newTemp(Ity_I64);
1925
1926 assign(d2, mkU64(((ULong)(Long)(Char)dh2 << 12) | ((ULong)dl2)));
1927 assign(op2addr, binop(Iop_Add64, binop(Iop_Add64, mkexpr(d2),
1928 b2 != 0 ? get_gpr_dw0(b2) : mkU64(0)), x2 != 0 ? get_gpr_dw0(x2) :
1929 mkU64(0)));
1930
1931 mnm = irgen(r1, op2addr);
1932
sewardj7ee97522011-05-09 21:45:04 +00001933 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001934 s390_disasm(ENC3(MNM, GPR, SDXB), mnm, r1, dh2, dl2, x2, b2);
1935}
1936
1937static void
1938s390_format_RXY_FRRD(HChar *(*irgen)(UChar r1, IRTemp op2addr),
1939 UChar r1, UChar x2, UChar b2, UShort dl2, UChar dh2)
1940{
1941 HChar *mnm;
1942 IRTemp op2addr = newTemp(Ity_I64);
1943 IRTemp d2 = newTemp(Ity_I64);
1944
1945 assign(d2, mkU64(((ULong)(Long)(Char)dh2 << 12) | ((ULong)dl2)));
1946 assign(op2addr, binop(Iop_Add64, binop(Iop_Add64, mkexpr(d2),
1947 b2 != 0 ? get_gpr_dw0(b2) : mkU64(0)), x2 != 0 ? get_gpr_dw0(x2) :
1948 mkU64(0)));
1949
1950 mnm = irgen(r1, op2addr);
1951
sewardj7ee97522011-05-09 21:45:04 +00001952 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001953 s390_disasm(ENC3(MNM, FPR, SDXB), mnm, r1, dh2, dl2, x2, b2);
1954}
1955
1956static void
1957s390_format_RXY_URRD(HChar *(*irgen)(void),
1958 UChar r1, UChar x2, UChar b2, UShort dl2, UChar dh2)
1959{
1960 HChar *mnm;
1961 IRTemp op2addr = newTemp(Ity_I64);
1962 IRTemp d2 = newTemp(Ity_I64);
1963
1964 assign(d2, mkU64(((ULong)(Long)(Char)dh2 << 12) | ((ULong)dl2)));
1965 assign(op2addr, binop(Iop_Add64, binop(Iop_Add64, mkexpr(d2),
1966 b2 != 0 ? get_gpr_dw0(b2) : mkU64(0)), x2 != 0 ? get_gpr_dw0(x2) :
1967 mkU64(0)));
1968
1969 mnm = irgen();
1970
sewardj7ee97522011-05-09 21:45:04 +00001971 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001972 s390_disasm(ENC3(MNM, UINT, SDXB), mnm, r1, dh2, dl2, x2, b2);
1973}
1974
1975static void
1976s390_format_S_RD(HChar *(*irgen)(IRTemp op2addr),
1977 UChar b2, UShort d2)
1978{
1979 HChar *mnm;
1980 IRTemp op2addr = newTemp(Ity_I64);
1981
1982 assign(op2addr, binop(Iop_Add64, mkU64(d2), b2 != 0 ? get_gpr_dw0(b2) :
1983 mkU64(0)));
1984
1985 mnm = irgen(op2addr);
1986
sewardj7ee97522011-05-09 21:45:04 +00001987 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001988 s390_disasm(ENC2(MNM, UDXB), mnm, d2, 0, b2);
1989}
1990
1991static void
1992s390_format_SI_URD(HChar *(*irgen)(UChar i2, IRTemp op1addr),
1993 UChar i2, UChar b1, UShort d1)
1994{
1995 HChar *mnm;
1996 IRTemp op1addr = newTemp(Ity_I64);
1997
1998 assign(op1addr, binop(Iop_Add64, mkU64(d1), b1 != 0 ? get_gpr_dw0(b1) :
1999 mkU64(0)));
2000
2001 mnm = irgen(i2, op1addr);
2002
sewardj7ee97522011-05-09 21:45:04 +00002003 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00002004 s390_disasm(ENC3(MNM, UDXB, UINT), mnm, d1, 0, b1, i2);
2005}
2006
2007static void
2008s390_format_SIY_URD(HChar *(*irgen)(UChar i2, IRTemp op1addr),
2009 UChar i2, UChar b1, UShort dl1, UChar dh1)
2010{
2011 HChar *mnm;
2012 IRTemp op1addr = newTemp(Ity_I64);
2013 IRTemp d1 = newTemp(Ity_I64);
2014
2015 assign(d1, mkU64(((ULong)(Long)(Char)dh1 << 12) | ((ULong)dl1)));
2016 assign(op1addr, binop(Iop_Add64, mkexpr(d1), b1 != 0 ? get_gpr_dw0(b1) :
2017 mkU64(0)));
2018
2019 mnm = irgen(i2, op1addr);
2020
sewardj7ee97522011-05-09 21:45:04 +00002021 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00002022 s390_disasm(ENC3(MNM, SDXB, UINT), mnm, dh1, dl1, 0, b1, i2);
2023}
2024
2025static void
2026s390_format_SIY_IRD(HChar *(*irgen)(UChar i2, IRTemp op1addr),
2027 UChar i2, UChar b1, UShort dl1, UChar dh1)
2028{
2029 HChar *mnm;
2030 IRTemp op1addr = newTemp(Ity_I64);
2031 IRTemp d1 = newTemp(Ity_I64);
2032
2033 assign(d1, mkU64(((ULong)(Long)(Char)dh1 << 12) | ((ULong)dl1)));
2034 assign(op1addr, binop(Iop_Add64, mkexpr(d1), b1 != 0 ? get_gpr_dw0(b1) :
2035 mkU64(0)));
2036
2037 mnm = irgen(i2, op1addr);
2038
sewardj7ee97522011-05-09 21:45:04 +00002039 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00002040 s390_disasm(ENC3(MNM, SDXB, INT), mnm, dh1, dl1, 0, b1, (Int)(Char)i2);
2041}
2042
2043static void
2044s390_format_SS_L0RDRD(HChar *(*irgen)(UChar, IRTemp, IRTemp),
2045 UChar l, UChar b1, UShort d1, UChar b2, UShort d2)
2046{
2047 HChar *mnm;
2048 IRTemp op1addr = newTemp(Ity_I64);
2049 IRTemp op2addr = newTemp(Ity_I64);
2050
2051 assign(op1addr, binop(Iop_Add64, mkU64(d1), b1 != 0 ? get_gpr_dw0(b1) :
2052 mkU64(0)));
2053 assign(op2addr, binop(Iop_Add64, mkU64(d2), b2 != 0 ? get_gpr_dw0(b2) :
2054 mkU64(0)));
2055
2056 mnm = irgen(l, op1addr, op2addr);
2057
sewardj7ee97522011-05-09 21:45:04 +00002058 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00002059 s390_disasm(ENC3(MNM, UDLB, UDXB), mnm, d1, l, b1, d2, 0, b2);
2060}
2061
2062static void
2063s390_format_SIL_RDI(HChar *(*irgen)(UShort i2, IRTemp op1addr),
2064 UChar b1, UShort d1, UShort i2)
2065{
2066 HChar *mnm;
2067 IRTemp op1addr = newTemp(Ity_I64);
2068
2069 assign(op1addr, binop(Iop_Add64, mkU64(d1), b1 != 0 ? get_gpr_dw0(b1) :
2070 mkU64(0)));
2071
2072 mnm = irgen(i2, op1addr);
2073
sewardj7ee97522011-05-09 21:45:04 +00002074 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00002075 s390_disasm(ENC3(MNM, UDXB, INT), mnm, d1, 0, b1, (Int)(Short)i2);
2076}
2077
2078static void
2079s390_format_SIL_RDU(HChar *(*irgen)(UShort i2, IRTemp op1addr),
2080 UChar b1, UShort d1, UShort i2)
2081{
2082 HChar *mnm;
2083 IRTemp op1addr = newTemp(Ity_I64);
2084
2085 assign(op1addr, binop(Iop_Add64, mkU64(d1), b1 != 0 ? get_gpr_dw0(b1) :
2086 mkU64(0)));
2087
2088 mnm = irgen(i2, op1addr);
2089
sewardj7ee97522011-05-09 21:45:04 +00002090 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00002091 s390_disasm(ENC3(MNM, UDXB, UINT), mnm, d1, 0, b1, i2);
2092}
2093
2094
2095
2096/*------------------------------------------------------------*/
2097/*--- Build IR for opcodes ---*/
2098/*------------------------------------------------------------*/
2099
2100static HChar *
florian30e89012011-08-08 18:22:58 +00002101s390_irgen_00(UChar r1 __attribute__((unused)),
2102 UChar r2 __attribute__((unused)))
2103{
2104 IRDirty *d;
2105
2106 d = unsafeIRDirty_0_N (0, "s390x_dirtyhelper_00", &s390x_dirtyhelper_00,
2107 mkIRExprVec_0());
2108 d->needsBBP = 1; /* Need to pass pointer to guest state to helper */
2109
2110 d->fxState[0].fx = Ifx_Modify; /* read then write */
2111 d->fxState[0].offset = S390X_GUEST_OFFSET(guest_IA);
2112 d->fxState[0].size = sizeof(ULong);
2113 d->nFxState = 1;
2114
2115 stmt(IRStmt_Dirty(d));
2116
2117 return "00";
2118}
2119
2120static HChar *
sewardj2019a972011-03-07 16:04:07 +00002121s390_irgen_AR(UChar r1, UChar r2)
2122{
2123 IRTemp op1 = newTemp(Ity_I32);
2124 IRTemp op2 = newTemp(Ity_I32);
2125 IRTemp result = newTemp(Ity_I32);
2126
2127 assign(op1, get_gpr_w1(r1));
2128 assign(op2, get_gpr_w1(r2));
2129 assign(result, binop(Iop_Add32, mkexpr(op1), mkexpr(op2)));
2130 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_32, op1, op2);
2131 put_gpr_w1(r1, mkexpr(result));
2132
2133 return "ar";
2134}
2135
2136static HChar *
2137s390_irgen_AGR(UChar r1, UChar r2)
2138{
2139 IRTemp op1 = newTemp(Ity_I64);
2140 IRTemp op2 = newTemp(Ity_I64);
2141 IRTemp result = newTemp(Ity_I64);
2142
2143 assign(op1, get_gpr_dw0(r1));
2144 assign(op2, get_gpr_dw0(r2));
2145 assign(result, binop(Iop_Add64, mkexpr(op1), mkexpr(op2)));
2146 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_64, op1, op2);
2147 put_gpr_dw0(r1, mkexpr(result));
2148
2149 return "agr";
2150}
2151
2152static HChar *
2153s390_irgen_AGFR(UChar r1, UChar r2)
2154{
2155 IRTemp op1 = newTemp(Ity_I64);
2156 IRTemp op2 = newTemp(Ity_I64);
2157 IRTemp result = newTemp(Ity_I64);
2158
2159 assign(op1, get_gpr_dw0(r1));
2160 assign(op2, unop(Iop_32Sto64, get_gpr_w1(r2)));
2161 assign(result, binop(Iop_Add64, mkexpr(op1), mkexpr(op2)));
2162 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_64, op1, op2);
2163 put_gpr_dw0(r1, mkexpr(result));
2164
2165 return "agfr";
2166}
2167
2168static HChar *
2169s390_irgen_ARK(UChar r3, UChar r1, UChar r2)
2170{
2171 IRTemp op2 = newTemp(Ity_I32);
2172 IRTemp op3 = newTemp(Ity_I32);
2173 IRTemp result = newTemp(Ity_I32);
2174
2175 assign(op2, get_gpr_w1(r2));
2176 assign(op3, get_gpr_w1(r3));
2177 assign(result, binop(Iop_Add32, mkexpr(op2), mkexpr(op3)));
2178 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_32, op2, op3);
2179 put_gpr_w1(r1, mkexpr(result));
2180
2181 return "ark";
2182}
2183
2184static HChar *
2185s390_irgen_AGRK(UChar r3, UChar r1, UChar r2)
2186{
2187 IRTemp op2 = newTemp(Ity_I64);
2188 IRTemp op3 = newTemp(Ity_I64);
2189 IRTemp result = newTemp(Ity_I64);
2190
2191 assign(op2, get_gpr_dw0(r2));
2192 assign(op3, get_gpr_dw0(r3));
2193 assign(result, binop(Iop_Add64, mkexpr(op2), mkexpr(op3)));
2194 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_64, op2, op3);
2195 put_gpr_dw0(r1, mkexpr(result));
2196
2197 return "agrk";
2198}
2199
2200static HChar *
2201s390_irgen_A(UChar r1, IRTemp op2addr)
2202{
2203 IRTemp op1 = newTemp(Ity_I32);
2204 IRTemp op2 = newTemp(Ity_I32);
2205 IRTemp result = newTemp(Ity_I32);
2206
2207 assign(op1, get_gpr_w1(r1));
2208 assign(op2, load(Ity_I32, mkexpr(op2addr)));
2209 assign(result, binop(Iop_Add32, mkexpr(op1), mkexpr(op2)));
2210 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_32, op1, op2);
2211 put_gpr_w1(r1, mkexpr(result));
2212
2213 return "a";
2214}
2215
2216static HChar *
2217s390_irgen_AY(UChar r1, IRTemp op2addr)
2218{
2219 IRTemp op1 = newTemp(Ity_I32);
2220 IRTemp op2 = newTemp(Ity_I32);
2221 IRTemp result = newTemp(Ity_I32);
2222
2223 assign(op1, get_gpr_w1(r1));
2224 assign(op2, load(Ity_I32, mkexpr(op2addr)));
2225 assign(result, binop(Iop_Add32, mkexpr(op1), mkexpr(op2)));
2226 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_32, op1, op2);
2227 put_gpr_w1(r1, mkexpr(result));
2228
2229 return "ay";
2230}
2231
2232static HChar *
2233s390_irgen_AG(UChar r1, IRTemp op2addr)
2234{
2235 IRTemp op1 = newTemp(Ity_I64);
2236 IRTemp op2 = newTemp(Ity_I64);
2237 IRTemp result = newTemp(Ity_I64);
2238
2239 assign(op1, get_gpr_dw0(r1));
2240 assign(op2, load(Ity_I64, mkexpr(op2addr)));
2241 assign(result, binop(Iop_Add64, mkexpr(op1), mkexpr(op2)));
2242 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_64, op1, op2);
2243 put_gpr_dw0(r1, mkexpr(result));
2244
2245 return "ag";
2246}
2247
2248static HChar *
2249s390_irgen_AGF(UChar r1, IRTemp op2addr)
2250{
2251 IRTemp op1 = newTemp(Ity_I64);
2252 IRTemp op2 = newTemp(Ity_I64);
2253 IRTemp result = newTemp(Ity_I64);
2254
2255 assign(op1, get_gpr_dw0(r1));
2256 assign(op2, unop(Iop_32Sto64, load(Ity_I32, mkexpr(op2addr))));
2257 assign(result, binop(Iop_Add64, mkexpr(op1), mkexpr(op2)));
2258 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_64, op1, op2);
2259 put_gpr_dw0(r1, mkexpr(result));
2260
2261 return "agf";
2262}
2263
2264static HChar *
2265s390_irgen_AFI(UChar r1, UInt i2)
2266{
2267 IRTemp op1 = newTemp(Ity_I32);
2268 Int op2;
2269 IRTemp result = newTemp(Ity_I32);
2270
2271 assign(op1, get_gpr_w1(r1));
2272 op2 = (Int)i2;
2273 assign(result, binop(Iop_Add32, mkexpr(op1), mkU32((UInt)op2)));
2274 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_32, op1, mktemp(Ity_I32,
2275 mkU32((UInt)op2)));
2276 put_gpr_w1(r1, mkexpr(result));
2277
2278 return "afi";
2279}
2280
2281static HChar *
2282s390_irgen_AGFI(UChar r1, UInt i2)
2283{
2284 IRTemp op1 = newTemp(Ity_I64);
2285 Long op2;
2286 IRTemp result = newTemp(Ity_I64);
2287
2288 assign(op1, get_gpr_dw0(r1));
2289 op2 = (Long)(Int)i2;
2290 assign(result, binop(Iop_Add64, mkexpr(op1), mkU64((ULong)op2)));
2291 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_64, op1, mktemp(Ity_I64,
2292 mkU64((ULong)op2)));
2293 put_gpr_dw0(r1, mkexpr(result));
2294
2295 return "agfi";
2296}
2297
2298static HChar *
2299s390_irgen_AHIK(UChar r1, UChar r3, UShort i2)
2300{
2301 Int op2;
2302 IRTemp op3 = newTemp(Ity_I32);
2303 IRTemp result = newTemp(Ity_I32);
2304
2305 op2 = (Int)(Short)i2;
2306 assign(op3, get_gpr_w1(r3));
2307 assign(result, binop(Iop_Add32, mkU32((UInt)op2), mkexpr(op3)));
2308 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_32, mktemp(Ity_I32, mkU32((UInt)
2309 op2)), op3);
2310 put_gpr_w1(r1, mkexpr(result));
2311
2312 return "ahik";
2313}
2314
2315static HChar *
2316s390_irgen_AGHIK(UChar r1, UChar r3, UShort i2)
2317{
2318 Long op2;
2319 IRTemp op3 = newTemp(Ity_I64);
2320 IRTemp result = newTemp(Ity_I64);
2321
2322 op2 = (Long)(Short)i2;
2323 assign(op3, get_gpr_dw0(r3));
2324 assign(result, binop(Iop_Add64, mkU64((ULong)op2), mkexpr(op3)));
2325 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_64, mktemp(Ity_I64, mkU64((ULong)
2326 op2)), op3);
2327 put_gpr_dw0(r1, mkexpr(result));
2328
2329 return "aghik";
2330}
2331
2332static HChar *
2333s390_irgen_ASI(UChar i2, IRTemp op1addr)
2334{
2335 IRTemp op1 = newTemp(Ity_I32);
2336 Int op2;
2337 IRTemp result = newTemp(Ity_I32);
2338
2339 assign(op1, load(Ity_I32, mkexpr(op1addr)));
2340 op2 = (Int)(Char)i2;
2341 assign(result, binop(Iop_Add32, mkexpr(op1), mkU32((UInt)op2)));
2342 store(mkexpr(op1addr), mkexpr(result));
2343 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_32, op1, mktemp(Ity_I32,
2344 mkU32((UInt)op2)));
2345
2346 return "asi";
2347}
2348
2349static HChar *
2350s390_irgen_AGSI(UChar i2, IRTemp op1addr)
2351{
2352 IRTemp op1 = newTemp(Ity_I64);
2353 Long op2;
2354 IRTemp result = newTemp(Ity_I64);
2355
2356 assign(op1, load(Ity_I64, mkexpr(op1addr)));
2357 op2 = (Long)(Char)i2;
2358 assign(result, binop(Iop_Add64, mkexpr(op1), mkU64((ULong)op2)));
2359 store(mkexpr(op1addr), mkexpr(result));
2360 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_64, op1, mktemp(Ity_I64,
2361 mkU64((ULong)op2)));
2362
2363 return "agsi";
2364}
2365
2366static HChar *
2367s390_irgen_AH(UChar r1, IRTemp op2addr)
2368{
2369 IRTemp op1 = newTemp(Ity_I32);
2370 IRTemp op2 = newTemp(Ity_I32);
2371 IRTemp result = newTemp(Ity_I32);
2372
2373 assign(op1, get_gpr_w1(r1));
2374 assign(op2, unop(Iop_16Sto32, load(Ity_I16, mkexpr(op2addr))));
2375 assign(result, binop(Iop_Add32, mkexpr(op1), mkexpr(op2)));
2376 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_32, op1, op2);
2377 put_gpr_w1(r1, mkexpr(result));
2378
2379 return "ah";
2380}
2381
2382static HChar *
2383s390_irgen_AHY(UChar r1, IRTemp op2addr)
2384{
2385 IRTemp op1 = newTemp(Ity_I32);
2386 IRTemp op2 = newTemp(Ity_I32);
2387 IRTemp result = newTemp(Ity_I32);
2388
2389 assign(op1, get_gpr_w1(r1));
2390 assign(op2, unop(Iop_16Sto32, load(Ity_I16, mkexpr(op2addr))));
2391 assign(result, binop(Iop_Add32, mkexpr(op1), mkexpr(op2)));
2392 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_32, op1, op2);
2393 put_gpr_w1(r1, mkexpr(result));
2394
2395 return "ahy";
2396}
2397
2398static HChar *
2399s390_irgen_AHI(UChar r1, UShort i2)
2400{
2401 IRTemp op1 = newTemp(Ity_I32);
2402 Int op2;
2403 IRTemp result = newTemp(Ity_I32);
2404
2405 assign(op1, get_gpr_w1(r1));
2406 op2 = (Int)(Short)i2;
2407 assign(result, binop(Iop_Add32, mkexpr(op1), mkU32((UInt)op2)));
2408 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_32, op1, mktemp(Ity_I32,
2409 mkU32((UInt)op2)));
2410 put_gpr_w1(r1, mkexpr(result));
2411
2412 return "ahi";
2413}
2414
2415static HChar *
2416s390_irgen_AGHI(UChar r1, UShort i2)
2417{
2418 IRTemp op1 = newTemp(Ity_I64);
2419 Long op2;
2420 IRTemp result = newTemp(Ity_I64);
2421
2422 assign(op1, get_gpr_dw0(r1));
2423 op2 = (Long)(Short)i2;
2424 assign(result, binop(Iop_Add64, mkexpr(op1), mkU64((ULong)op2)));
2425 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_64, op1, mktemp(Ity_I64,
2426 mkU64((ULong)op2)));
2427 put_gpr_dw0(r1, mkexpr(result));
2428
2429 return "aghi";
2430}
2431
2432static HChar *
2433s390_irgen_AHHHR(UChar r3, UChar r1, UChar r2)
2434{
2435 IRTemp op2 = newTemp(Ity_I32);
2436 IRTemp op3 = newTemp(Ity_I32);
2437 IRTemp result = newTemp(Ity_I32);
2438
2439 assign(op2, get_gpr_w0(r2));
2440 assign(op3, get_gpr_w0(r3));
2441 assign(result, binop(Iop_Add32, mkexpr(op2), mkexpr(op3)));
2442 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_32, op2, op3);
2443 put_gpr_w0(r1, mkexpr(result));
2444
2445 return "ahhhr";
2446}
2447
2448static HChar *
2449s390_irgen_AHHLR(UChar r3, UChar r1, UChar r2)
2450{
2451 IRTemp op2 = newTemp(Ity_I32);
2452 IRTemp op3 = newTemp(Ity_I32);
2453 IRTemp result = newTemp(Ity_I32);
2454
2455 assign(op2, get_gpr_w0(r2));
2456 assign(op3, get_gpr_w1(r3));
2457 assign(result, binop(Iop_Add32, mkexpr(op2), mkexpr(op3)));
2458 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_32, op2, op3);
2459 put_gpr_w0(r1, mkexpr(result));
2460
2461 return "ahhlr";
2462}
2463
2464static HChar *
2465s390_irgen_AIH(UChar r1, UInt i2)
2466{
2467 IRTemp op1 = newTemp(Ity_I32);
2468 Int op2;
2469 IRTemp result = newTemp(Ity_I32);
2470
2471 assign(op1, get_gpr_w0(r1));
2472 op2 = (Int)i2;
2473 assign(result, binop(Iop_Add32, mkexpr(op1), mkU32((UInt)op2)));
2474 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_32, op1, mktemp(Ity_I32,
2475 mkU32((UInt)op2)));
2476 put_gpr_w0(r1, mkexpr(result));
2477
2478 return "aih";
2479}
2480
2481static HChar *
2482s390_irgen_ALR(UChar r1, UChar r2)
2483{
2484 IRTemp op1 = newTemp(Ity_I32);
2485 IRTemp op2 = newTemp(Ity_I32);
2486 IRTemp result = newTemp(Ity_I32);
2487
2488 assign(op1, get_gpr_w1(r1));
2489 assign(op2, get_gpr_w1(r2));
2490 assign(result, binop(Iop_Add32, mkexpr(op1), mkexpr(op2)));
2491 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_32, op1, op2);
2492 put_gpr_w1(r1, mkexpr(result));
2493
2494 return "alr";
2495}
2496
2497static HChar *
2498s390_irgen_ALGR(UChar r1, UChar r2)
2499{
2500 IRTemp op1 = newTemp(Ity_I64);
2501 IRTemp op2 = newTemp(Ity_I64);
2502 IRTemp result = newTemp(Ity_I64);
2503
2504 assign(op1, get_gpr_dw0(r1));
2505 assign(op2, get_gpr_dw0(r2));
2506 assign(result, binop(Iop_Add64, mkexpr(op1), mkexpr(op2)));
2507 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_64, op1, op2);
2508 put_gpr_dw0(r1, mkexpr(result));
2509
2510 return "algr";
2511}
2512
2513static HChar *
2514s390_irgen_ALGFR(UChar r1, UChar r2)
2515{
2516 IRTemp op1 = newTemp(Ity_I64);
2517 IRTemp op2 = newTemp(Ity_I64);
2518 IRTemp result = newTemp(Ity_I64);
2519
2520 assign(op1, get_gpr_dw0(r1));
2521 assign(op2, unop(Iop_32Uto64, get_gpr_w1(r2)));
2522 assign(result, binop(Iop_Add64, mkexpr(op1), mkexpr(op2)));
2523 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_64, op1, op2);
2524 put_gpr_dw0(r1, mkexpr(result));
2525
2526 return "algfr";
2527}
2528
2529static HChar *
2530s390_irgen_ALRK(UChar r3, UChar r1, UChar r2)
2531{
2532 IRTemp op2 = newTemp(Ity_I32);
2533 IRTemp op3 = newTemp(Ity_I32);
2534 IRTemp result = newTemp(Ity_I32);
2535
2536 assign(op2, get_gpr_w1(r2));
2537 assign(op3, get_gpr_w1(r3));
2538 assign(result, binop(Iop_Add32, mkexpr(op2), mkexpr(op3)));
2539 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_32, op2, op3);
2540 put_gpr_w1(r1, mkexpr(result));
2541
2542 return "alrk";
2543}
2544
2545static HChar *
2546s390_irgen_ALGRK(UChar r3, UChar r1, UChar r2)
2547{
2548 IRTemp op2 = newTemp(Ity_I64);
2549 IRTemp op3 = newTemp(Ity_I64);
2550 IRTemp result = newTemp(Ity_I64);
2551
2552 assign(op2, get_gpr_dw0(r2));
2553 assign(op3, get_gpr_dw0(r3));
2554 assign(result, binop(Iop_Add64, mkexpr(op2), mkexpr(op3)));
2555 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_64, op2, op3);
2556 put_gpr_dw0(r1, mkexpr(result));
2557
2558 return "algrk";
2559}
2560
2561static HChar *
2562s390_irgen_AL(UChar r1, IRTemp op2addr)
2563{
2564 IRTemp op1 = newTemp(Ity_I32);
2565 IRTemp op2 = newTemp(Ity_I32);
2566 IRTemp result = newTemp(Ity_I32);
2567
2568 assign(op1, get_gpr_w1(r1));
2569 assign(op2, load(Ity_I32, mkexpr(op2addr)));
2570 assign(result, binop(Iop_Add32, mkexpr(op1), mkexpr(op2)));
2571 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_32, op1, op2);
2572 put_gpr_w1(r1, mkexpr(result));
2573
2574 return "al";
2575}
2576
2577static HChar *
2578s390_irgen_ALY(UChar r1, IRTemp op2addr)
2579{
2580 IRTemp op1 = newTemp(Ity_I32);
2581 IRTemp op2 = newTemp(Ity_I32);
2582 IRTemp result = newTemp(Ity_I32);
2583
2584 assign(op1, get_gpr_w1(r1));
2585 assign(op2, load(Ity_I32, mkexpr(op2addr)));
2586 assign(result, binop(Iop_Add32, mkexpr(op1), mkexpr(op2)));
2587 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_32, op1, op2);
2588 put_gpr_w1(r1, mkexpr(result));
2589
2590 return "aly";
2591}
2592
2593static HChar *
2594s390_irgen_ALG(UChar r1, IRTemp op2addr)
2595{
2596 IRTemp op1 = newTemp(Ity_I64);
2597 IRTemp op2 = newTemp(Ity_I64);
2598 IRTemp result = newTemp(Ity_I64);
2599
2600 assign(op1, get_gpr_dw0(r1));
2601 assign(op2, load(Ity_I64, mkexpr(op2addr)));
2602 assign(result, binop(Iop_Add64, mkexpr(op1), mkexpr(op2)));
2603 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_64, op1, op2);
2604 put_gpr_dw0(r1, mkexpr(result));
2605
2606 return "alg";
2607}
2608
2609static HChar *
2610s390_irgen_ALGF(UChar r1, IRTemp op2addr)
2611{
2612 IRTemp op1 = newTemp(Ity_I64);
2613 IRTemp op2 = newTemp(Ity_I64);
2614 IRTemp result = newTemp(Ity_I64);
2615
2616 assign(op1, get_gpr_dw0(r1));
2617 assign(op2, unop(Iop_32Uto64, load(Ity_I32, mkexpr(op2addr))));
2618 assign(result, binop(Iop_Add64, mkexpr(op1), mkexpr(op2)));
2619 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_64, op1, op2);
2620 put_gpr_dw0(r1, mkexpr(result));
2621
2622 return "algf";
2623}
2624
2625static HChar *
2626s390_irgen_ALFI(UChar r1, UInt i2)
2627{
2628 IRTemp op1 = newTemp(Ity_I32);
2629 UInt op2;
2630 IRTemp result = newTemp(Ity_I32);
2631
2632 assign(op1, get_gpr_w1(r1));
2633 op2 = i2;
2634 assign(result, binop(Iop_Add32, mkexpr(op1), mkU32(op2)));
2635 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_32, op1, mktemp(Ity_I32,
2636 mkU32(op2)));
2637 put_gpr_w1(r1, mkexpr(result));
2638
2639 return "alfi";
2640}
2641
2642static HChar *
2643s390_irgen_ALGFI(UChar r1, UInt i2)
2644{
2645 IRTemp op1 = newTemp(Ity_I64);
2646 ULong op2;
2647 IRTemp result = newTemp(Ity_I64);
2648
2649 assign(op1, get_gpr_dw0(r1));
2650 op2 = (ULong)i2;
2651 assign(result, binop(Iop_Add64, mkexpr(op1), mkU64(op2)));
2652 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_64, op1, mktemp(Ity_I64,
2653 mkU64(op2)));
2654 put_gpr_dw0(r1, mkexpr(result));
2655
2656 return "algfi";
2657}
2658
2659static HChar *
2660s390_irgen_ALHHHR(UChar r3, UChar r1, UChar r2)
2661{
2662 IRTemp op2 = newTemp(Ity_I32);
2663 IRTemp op3 = newTemp(Ity_I32);
2664 IRTemp result = newTemp(Ity_I32);
2665
2666 assign(op2, get_gpr_w0(r2));
2667 assign(op3, get_gpr_w0(r3));
2668 assign(result, binop(Iop_Add32, mkexpr(op2), mkexpr(op3)));
2669 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_32, op2, op3);
2670 put_gpr_w0(r1, mkexpr(result));
2671
2672 return "alhhhr";
2673}
2674
2675static HChar *
2676s390_irgen_ALHHLR(UChar r3, UChar r1, UChar r2)
2677{
2678 IRTemp op2 = newTemp(Ity_I32);
2679 IRTemp op3 = newTemp(Ity_I32);
2680 IRTemp result = newTemp(Ity_I32);
2681
2682 assign(op2, get_gpr_w0(r2));
2683 assign(op3, get_gpr_w1(r3));
2684 assign(result, binop(Iop_Add32, mkexpr(op2), mkexpr(op3)));
2685 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_32, op2, op3);
2686 put_gpr_w0(r1, mkexpr(result));
2687
2688 return "alhhlr";
2689}
2690
2691static HChar *
2692s390_irgen_ALCR(UChar r1, UChar r2)
2693{
2694 IRTemp op1 = newTemp(Ity_I32);
2695 IRTemp op2 = newTemp(Ity_I32);
2696 IRTemp result = newTemp(Ity_I32);
2697 IRTemp carry_in = newTemp(Ity_I32);
2698
2699 assign(op1, get_gpr_w1(r1));
2700 assign(op2, get_gpr_w1(r2));
2701 assign(carry_in, binop(Iop_Shr32, s390_call_calculate_cc(), mkU8(1)));
2702 assign(result, binop(Iop_Add32, binop(Iop_Add32, mkexpr(op1), mkexpr(op2)),
2703 mkexpr(carry_in)));
2704 s390_cc_thunk_putZZZ(S390_CC_OP_UNSIGNED_ADDC_32, op1, op2, carry_in);
2705 put_gpr_w1(r1, mkexpr(result));
2706
2707 return "alcr";
2708}
2709
2710static HChar *
2711s390_irgen_ALCGR(UChar r1, UChar r2)
2712{
2713 IRTemp op1 = newTemp(Ity_I64);
2714 IRTemp op2 = newTemp(Ity_I64);
2715 IRTemp result = newTemp(Ity_I64);
2716 IRTemp carry_in = newTemp(Ity_I64);
2717
2718 assign(op1, get_gpr_dw0(r1));
2719 assign(op2, get_gpr_dw0(r2));
2720 assign(carry_in, unop(Iop_32Uto64, binop(Iop_Shr32, s390_call_calculate_cc(),
2721 mkU8(1))));
2722 assign(result, binop(Iop_Add64, binop(Iop_Add64, mkexpr(op1), mkexpr(op2)),
2723 mkexpr(carry_in)));
2724 s390_cc_thunk_putZZZ(S390_CC_OP_UNSIGNED_ADDC_64, op1, op2, carry_in);
2725 put_gpr_dw0(r1, mkexpr(result));
2726
2727 return "alcgr";
2728}
2729
2730static HChar *
2731s390_irgen_ALC(UChar r1, IRTemp op2addr)
2732{
2733 IRTemp op1 = newTemp(Ity_I32);
2734 IRTemp op2 = newTemp(Ity_I32);
2735 IRTemp result = newTemp(Ity_I32);
2736 IRTemp carry_in = newTemp(Ity_I32);
2737
2738 assign(op1, get_gpr_w1(r1));
2739 assign(op2, load(Ity_I32, mkexpr(op2addr)));
2740 assign(carry_in, binop(Iop_Shr32, s390_call_calculate_cc(), mkU8(1)));
2741 assign(result, binop(Iop_Add32, binop(Iop_Add32, mkexpr(op1), mkexpr(op2)),
2742 mkexpr(carry_in)));
2743 s390_cc_thunk_putZZZ(S390_CC_OP_UNSIGNED_ADDC_32, op1, op2, carry_in);
2744 put_gpr_w1(r1, mkexpr(result));
2745
2746 return "alc";
2747}
2748
2749static HChar *
2750s390_irgen_ALCG(UChar r1, IRTemp op2addr)
2751{
2752 IRTemp op1 = newTemp(Ity_I64);
2753 IRTemp op2 = newTemp(Ity_I64);
2754 IRTemp result = newTemp(Ity_I64);
2755 IRTemp carry_in = newTemp(Ity_I64);
2756
2757 assign(op1, get_gpr_dw0(r1));
2758 assign(op2, load(Ity_I64, mkexpr(op2addr)));
2759 assign(carry_in, unop(Iop_32Uto64, binop(Iop_Shr32, s390_call_calculate_cc(),
2760 mkU8(1))));
2761 assign(result, binop(Iop_Add64, binop(Iop_Add64, mkexpr(op1), mkexpr(op2)),
2762 mkexpr(carry_in)));
2763 s390_cc_thunk_putZZZ(S390_CC_OP_UNSIGNED_ADDC_64, op1, op2, carry_in);
2764 put_gpr_dw0(r1, mkexpr(result));
2765
2766 return "alcg";
2767}
2768
2769static HChar *
2770s390_irgen_ALSI(UChar i2, IRTemp op1addr)
2771{
2772 IRTemp op1 = newTemp(Ity_I32);
2773 UInt op2;
2774 IRTemp result = newTemp(Ity_I32);
2775
2776 assign(op1, load(Ity_I32, mkexpr(op1addr)));
2777 op2 = (UInt)(Int)(Char)i2;
2778 assign(result, binop(Iop_Add32, mkexpr(op1), mkU32(op2)));
2779 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_32, op1, mktemp(Ity_I32,
2780 mkU32(op2)));
2781 store(mkexpr(op1addr), mkexpr(result));
2782
2783 return "alsi";
2784}
2785
2786static HChar *
2787s390_irgen_ALGSI(UChar i2, IRTemp op1addr)
2788{
2789 IRTemp op1 = newTemp(Ity_I64);
2790 ULong op2;
2791 IRTemp result = newTemp(Ity_I64);
2792
2793 assign(op1, load(Ity_I64, mkexpr(op1addr)));
2794 op2 = (ULong)(Long)(Char)i2;
2795 assign(result, binop(Iop_Add64, mkexpr(op1), mkU64(op2)));
2796 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_64, op1, mktemp(Ity_I64,
2797 mkU64(op2)));
2798 store(mkexpr(op1addr), mkexpr(result));
2799
2800 return "algsi";
2801}
2802
2803static HChar *
2804s390_irgen_ALHSIK(UChar r1, UChar r3, UShort i2)
2805{
2806 UInt op2;
2807 IRTemp op3 = newTemp(Ity_I32);
2808 IRTemp result = newTemp(Ity_I32);
2809
2810 op2 = (UInt)(Int)(Short)i2;
2811 assign(op3, get_gpr_w1(r3));
2812 assign(result, binop(Iop_Add32, mkU32(op2), mkexpr(op3)));
2813 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_32, mktemp(Ity_I32, mkU32(op2)),
2814 op3);
2815 put_gpr_w1(r1, mkexpr(result));
2816
2817 return "alhsik";
2818}
2819
2820static HChar *
2821s390_irgen_ALGHSIK(UChar r1, UChar r3, UShort i2)
2822{
2823 ULong op2;
2824 IRTemp op3 = newTemp(Ity_I64);
2825 IRTemp result = newTemp(Ity_I64);
2826
2827 op2 = (ULong)(Long)(Short)i2;
2828 assign(op3, get_gpr_dw0(r3));
2829 assign(result, binop(Iop_Add64, mkU64(op2), mkexpr(op3)));
2830 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_64, mktemp(Ity_I64, mkU64(op2)),
2831 op3);
2832 put_gpr_dw0(r1, mkexpr(result));
2833
2834 return "alghsik";
2835}
2836
2837static HChar *
2838s390_irgen_ALSIH(UChar r1, UInt i2)
2839{
2840 IRTemp op1 = newTemp(Ity_I32);
2841 UInt op2;
2842 IRTemp result = newTemp(Ity_I32);
2843
2844 assign(op1, get_gpr_w0(r1));
2845 op2 = i2;
2846 assign(result, binop(Iop_Add32, mkexpr(op1), mkU32(op2)));
2847 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_32, op1, mktemp(Ity_I32,
2848 mkU32(op2)));
2849 put_gpr_w0(r1, mkexpr(result));
2850
2851 return "alsih";
2852}
2853
2854static HChar *
2855s390_irgen_ALSIHN(UChar r1, UInt i2)
2856{
2857 IRTemp op1 = newTemp(Ity_I32);
2858 UInt op2;
2859 IRTemp result = newTemp(Ity_I32);
2860
2861 assign(op1, get_gpr_w0(r1));
2862 op2 = i2;
2863 assign(result, binop(Iop_Add32, mkexpr(op1), mkU32(op2)));
2864 put_gpr_w0(r1, mkexpr(result));
2865
2866 return "alsihn";
2867}
2868
2869static HChar *
2870s390_irgen_NR(UChar r1, UChar r2)
2871{
2872 IRTemp op1 = newTemp(Ity_I32);
2873 IRTemp op2 = newTemp(Ity_I32);
2874 IRTemp result = newTemp(Ity_I32);
2875
2876 assign(op1, get_gpr_w1(r1));
2877 assign(op2, get_gpr_w1(r2));
2878 assign(result, binop(Iop_And32, mkexpr(op1), mkexpr(op2)));
2879 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
2880 put_gpr_w1(r1, mkexpr(result));
2881
2882 return "nr";
2883}
2884
2885static HChar *
2886s390_irgen_NGR(UChar r1, UChar r2)
2887{
2888 IRTemp op1 = newTemp(Ity_I64);
2889 IRTemp op2 = newTemp(Ity_I64);
2890 IRTemp result = newTemp(Ity_I64);
2891
2892 assign(op1, get_gpr_dw0(r1));
2893 assign(op2, get_gpr_dw0(r2));
2894 assign(result, binop(Iop_And64, mkexpr(op1), mkexpr(op2)));
2895 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
2896 put_gpr_dw0(r1, mkexpr(result));
2897
2898 return "ngr";
2899}
2900
2901static HChar *
2902s390_irgen_NRK(UChar r3, UChar r1, UChar r2)
2903{
2904 IRTemp op2 = newTemp(Ity_I32);
2905 IRTemp op3 = newTemp(Ity_I32);
2906 IRTemp result = newTemp(Ity_I32);
2907
2908 assign(op2, get_gpr_w1(r2));
2909 assign(op3, get_gpr_w1(r3));
2910 assign(result, binop(Iop_And32, mkexpr(op2), mkexpr(op3)));
2911 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
2912 put_gpr_w1(r1, mkexpr(result));
2913
2914 return "nrk";
2915}
2916
2917static HChar *
2918s390_irgen_NGRK(UChar r3, UChar r1, UChar r2)
2919{
2920 IRTemp op2 = newTemp(Ity_I64);
2921 IRTemp op3 = newTemp(Ity_I64);
2922 IRTemp result = newTemp(Ity_I64);
2923
2924 assign(op2, get_gpr_dw0(r2));
2925 assign(op3, get_gpr_dw0(r3));
2926 assign(result, binop(Iop_And64, mkexpr(op2), mkexpr(op3)));
2927 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
2928 put_gpr_dw0(r1, mkexpr(result));
2929
2930 return "ngrk";
2931}
2932
2933static HChar *
2934s390_irgen_N(UChar r1, IRTemp op2addr)
2935{
2936 IRTemp op1 = newTemp(Ity_I32);
2937 IRTemp op2 = newTemp(Ity_I32);
2938 IRTemp result = newTemp(Ity_I32);
2939
2940 assign(op1, get_gpr_w1(r1));
2941 assign(op2, load(Ity_I32, mkexpr(op2addr)));
2942 assign(result, binop(Iop_And32, mkexpr(op1), mkexpr(op2)));
2943 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
2944 put_gpr_w1(r1, mkexpr(result));
2945
2946 return "n";
2947}
2948
2949static HChar *
2950s390_irgen_NY(UChar r1, IRTemp op2addr)
2951{
2952 IRTemp op1 = newTemp(Ity_I32);
2953 IRTemp op2 = newTemp(Ity_I32);
2954 IRTemp result = newTemp(Ity_I32);
2955
2956 assign(op1, get_gpr_w1(r1));
2957 assign(op2, load(Ity_I32, mkexpr(op2addr)));
2958 assign(result, binop(Iop_And32, mkexpr(op1), mkexpr(op2)));
2959 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
2960 put_gpr_w1(r1, mkexpr(result));
2961
2962 return "ny";
2963}
2964
2965static HChar *
2966s390_irgen_NG(UChar r1, IRTemp op2addr)
2967{
2968 IRTemp op1 = newTemp(Ity_I64);
2969 IRTemp op2 = newTemp(Ity_I64);
2970 IRTemp result = newTemp(Ity_I64);
2971
2972 assign(op1, get_gpr_dw0(r1));
2973 assign(op2, load(Ity_I64, mkexpr(op2addr)));
2974 assign(result, binop(Iop_And64, mkexpr(op1), mkexpr(op2)));
2975 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
2976 put_gpr_dw0(r1, mkexpr(result));
2977
2978 return "ng";
2979}
2980
2981static HChar *
2982s390_irgen_NI(UChar i2, IRTemp op1addr)
2983{
2984 IRTemp op1 = newTemp(Ity_I8);
2985 UChar op2;
2986 IRTemp result = newTemp(Ity_I8);
2987
2988 assign(op1, load(Ity_I8, mkexpr(op1addr)));
2989 op2 = i2;
2990 assign(result, binop(Iop_And8, mkexpr(op1), mkU8(op2)));
2991 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
2992 store(mkexpr(op1addr), mkexpr(result));
2993
2994 return "ni";
2995}
2996
2997static HChar *
2998s390_irgen_NIY(UChar i2, IRTemp op1addr)
2999{
3000 IRTemp op1 = newTemp(Ity_I8);
3001 UChar op2;
3002 IRTemp result = newTemp(Ity_I8);
3003
3004 assign(op1, load(Ity_I8, mkexpr(op1addr)));
3005 op2 = i2;
3006 assign(result, binop(Iop_And8, mkexpr(op1), mkU8(op2)));
3007 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
3008 store(mkexpr(op1addr), mkexpr(result));
3009
3010 return "niy";
3011}
3012
3013static HChar *
3014s390_irgen_NIHF(UChar r1, UInt i2)
3015{
3016 IRTemp op1 = newTemp(Ity_I32);
3017 UInt op2;
3018 IRTemp result = newTemp(Ity_I32);
3019
3020 assign(op1, get_gpr_w0(r1));
3021 op2 = i2;
3022 assign(result, binop(Iop_And32, mkexpr(op1), mkU32(op2)));
3023 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
3024 put_gpr_w0(r1, mkexpr(result));
3025
3026 return "nihf";
3027}
3028
3029static HChar *
3030s390_irgen_NIHH(UChar r1, UShort i2)
3031{
3032 IRTemp op1 = newTemp(Ity_I16);
3033 UShort op2;
3034 IRTemp result = newTemp(Ity_I16);
3035
3036 assign(op1, get_gpr_hw0(r1));
3037 op2 = i2;
3038 assign(result, binop(Iop_And16, mkexpr(op1), mkU16(op2)));
3039 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
3040 put_gpr_hw0(r1, mkexpr(result));
3041
3042 return "nihh";
3043}
3044
3045static HChar *
3046s390_irgen_NIHL(UChar r1, UShort i2)
3047{
3048 IRTemp op1 = newTemp(Ity_I16);
3049 UShort op2;
3050 IRTemp result = newTemp(Ity_I16);
3051
3052 assign(op1, get_gpr_hw1(r1));
3053 op2 = i2;
3054 assign(result, binop(Iop_And16, mkexpr(op1), mkU16(op2)));
3055 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
3056 put_gpr_hw1(r1, mkexpr(result));
3057
3058 return "nihl";
3059}
3060
3061static HChar *
3062s390_irgen_NILF(UChar r1, UInt i2)
3063{
3064 IRTemp op1 = newTemp(Ity_I32);
3065 UInt op2;
3066 IRTemp result = newTemp(Ity_I32);
3067
3068 assign(op1, get_gpr_w1(r1));
3069 op2 = i2;
3070 assign(result, binop(Iop_And32, mkexpr(op1), mkU32(op2)));
3071 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
3072 put_gpr_w1(r1, mkexpr(result));
3073
3074 return "nilf";
3075}
3076
3077static HChar *
3078s390_irgen_NILH(UChar r1, UShort i2)
3079{
3080 IRTemp op1 = newTemp(Ity_I16);
3081 UShort op2;
3082 IRTemp result = newTemp(Ity_I16);
3083
3084 assign(op1, get_gpr_hw2(r1));
3085 op2 = i2;
3086 assign(result, binop(Iop_And16, mkexpr(op1), mkU16(op2)));
3087 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
3088 put_gpr_hw2(r1, mkexpr(result));
3089
3090 return "nilh";
3091}
3092
3093static HChar *
3094s390_irgen_NILL(UChar r1, UShort i2)
3095{
3096 IRTemp op1 = newTemp(Ity_I16);
3097 UShort op2;
3098 IRTemp result = newTemp(Ity_I16);
3099
3100 assign(op1, get_gpr_hw3(r1));
3101 op2 = i2;
3102 assign(result, binop(Iop_And16, mkexpr(op1), mkU16(op2)));
3103 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
3104 put_gpr_hw3(r1, mkexpr(result));
3105
3106 return "nill";
3107}
3108
3109static HChar *
3110s390_irgen_BASR(UChar r1, UChar r2)
3111{
3112 IRTemp target = newTemp(Ity_I64);
3113
3114 if (r2 == 0) {
3115 put_gpr_dw0(r1, mkU64(guest_IA_curr_instr + 2ULL));
3116 } else {
3117 if (r1 != r2) {
3118 put_gpr_dw0(r1, mkU64(guest_IA_curr_instr + 2ULL));
3119 call_function(get_gpr_dw0(r2));
3120 } else {
3121 assign(target, get_gpr_dw0(r2));
3122 put_gpr_dw0(r1, mkU64(guest_IA_curr_instr + 2ULL));
3123 call_function(mkexpr(target));
3124 }
3125 }
3126
3127 return "basr";
3128}
3129
3130static HChar *
3131s390_irgen_BAS(UChar r1, IRTemp op2addr)
3132{
3133 IRTemp target = newTemp(Ity_I64);
3134
3135 put_gpr_dw0(r1, mkU64(guest_IA_curr_instr + 4ULL));
3136 assign(target, mkexpr(op2addr));
3137 call_function(mkexpr(target));
3138
3139 return "bas";
3140}
3141
3142static HChar *
3143s390_irgen_BCR(UChar r1, UChar r2)
3144{
3145 IRTemp cond = newTemp(Ity_I32);
3146
sewardja52e37e2011-04-28 18:48:06 +00003147 if (r2 == 0 && (r1 >= 14)) { /* serialization */
3148 stmt(IRStmt_MBE(Imbe_Fence));
3149 }
3150
sewardj2019a972011-03-07 16:04:07 +00003151 if ((r2 == 0) || (r1 == 0)) {
3152 } else {
3153 if (r1 == 15) {
3154 return_from_function(get_gpr_dw0(r2));
3155 } else {
3156 assign(cond, s390_call_calculate_cond(r1));
3157 if_not_condition_goto_computed(binop(Iop_CmpEQ32, mkexpr(cond),
3158 mkU32(0)), get_gpr_dw0(r2));
3159 }
3160 }
sewardj7ee97522011-05-09 21:45:04 +00003161 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00003162 s390_disasm(ENC2(XMNM, GPR), S390_XMNM_BCR, r1, r2);
3163
3164 return "bcr";
3165}
3166
3167static HChar *
3168s390_irgen_BC(UChar r1, UChar x2, UChar b2, UShort d2, IRTemp op2addr)
3169{
3170 IRTemp cond = newTemp(Ity_I32);
3171
3172 if (r1 == 0) {
3173 } else {
3174 if (r1 == 15) {
3175 always_goto(mkexpr(op2addr));
3176 } else {
3177 assign(cond, s390_call_calculate_cond(r1));
3178 if_not_condition_goto_computed(binop(Iop_CmpEQ32, mkexpr(cond),
3179 mkU32(0)), mkexpr(op2addr));
3180 }
3181 }
sewardj7ee97522011-05-09 21:45:04 +00003182 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00003183 s390_disasm(ENC2(XMNM, UDXB), S390_XMNM_BC, r1, d2, x2, b2);
3184
3185 return "bc";
3186}
3187
3188static HChar *
3189s390_irgen_BCTR(UChar r1, UChar r2)
3190{
3191 put_gpr_w1(r1, binop(Iop_Sub32, get_gpr_w1(r1), mkU32(1)));
3192 if (r2 != 0) {
3193 if_not_condition_goto_computed(binop(Iop_CmpEQ32, get_gpr_w1(r1), mkU32(0)
3194 ), get_gpr_dw0(r2));
3195 }
3196
3197 return "bctr";
3198}
3199
3200static HChar *
3201s390_irgen_BCTGR(UChar r1, UChar r2)
3202{
3203 put_gpr_dw0(r1, binop(Iop_Sub64, get_gpr_dw0(r1), mkU64(1)));
3204 if (r2 != 0) {
3205 if_not_condition_goto_computed(binop(Iop_CmpEQ64, get_gpr_dw0(r1),
3206 mkU64(0)), get_gpr_dw0(r2));
3207 }
3208
3209 return "bctgr";
3210}
3211
3212static HChar *
3213s390_irgen_BCT(UChar r1, IRTemp op2addr)
3214{
3215 put_gpr_w1(r1, binop(Iop_Sub32, get_gpr_w1(r1), mkU32(1)));
3216 if_not_condition_goto_computed(binop(Iop_CmpEQ32, get_gpr_w1(r1), mkU32(0)),
3217 mkexpr(op2addr));
3218
3219 return "bct";
3220}
3221
3222static HChar *
3223s390_irgen_BCTG(UChar r1, IRTemp op2addr)
3224{
3225 put_gpr_dw0(r1, binop(Iop_Sub64, get_gpr_dw0(r1), mkU64(1)));
3226 if_not_condition_goto_computed(binop(Iop_CmpEQ64, get_gpr_dw0(r1), mkU64(0)),
3227 mkexpr(op2addr));
3228
3229 return "bctg";
3230}
3231
3232static HChar *
3233s390_irgen_BXH(UChar r1, UChar r3, IRTemp op2addr)
3234{
3235 IRTemp value = newTemp(Ity_I32);
3236
3237 assign(value, get_gpr_w1(r3 | 1));
3238 put_gpr_w1(r1, binop(Iop_Add32, get_gpr_w1(r1), get_gpr_w1(r3)));
3239 if_not_condition_goto_computed(binop(Iop_CmpLE32S, get_gpr_w1(r1),
3240 mkexpr(value)), mkexpr(op2addr));
3241
3242 return "bxh";
3243}
3244
3245static HChar *
3246s390_irgen_BXHG(UChar r1, UChar r3, IRTemp op2addr)
3247{
3248 IRTemp value = newTemp(Ity_I64);
3249
3250 assign(value, get_gpr_dw0(r3 | 1));
3251 put_gpr_dw0(r1, binop(Iop_Add64, get_gpr_dw0(r1), get_gpr_dw0(r3)));
3252 if_not_condition_goto_computed(binop(Iop_CmpLE64S, get_gpr_dw0(r1),
3253 mkexpr(value)), mkexpr(op2addr));
3254
3255 return "bxhg";
3256}
3257
3258static HChar *
3259s390_irgen_BXLE(UChar r1, UChar r3, IRTemp op2addr)
3260{
3261 IRTemp value = newTemp(Ity_I32);
3262
3263 assign(value, get_gpr_w1(r3 | 1));
3264 put_gpr_w1(r1, binop(Iop_Add32, get_gpr_w1(r1), get_gpr_w1(r3)));
3265 if_not_condition_goto_computed(binop(Iop_CmpLT32S, mkexpr(value),
3266 get_gpr_w1(r1)), mkexpr(op2addr));
3267
3268 return "bxle";
3269}
3270
3271static HChar *
3272s390_irgen_BXLEG(UChar r1, UChar r3, IRTemp op2addr)
3273{
3274 IRTemp value = newTemp(Ity_I64);
3275
3276 assign(value, get_gpr_dw0(r3 | 1));
3277 put_gpr_dw0(r1, binop(Iop_Add64, get_gpr_dw0(r1), get_gpr_dw0(r3)));
3278 if_not_condition_goto_computed(binop(Iop_CmpLT64S, mkexpr(value),
3279 get_gpr_dw0(r1)), mkexpr(op2addr));
3280
3281 return "bxleg";
3282}
3283
3284static HChar *
3285s390_irgen_BRAS(UChar r1, UShort i2)
3286{
3287 put_gpr_dw0(r1, mkU64(guest_IA_curr_instr + 4ULL));
floriana64c2432011-07-16 02:11:50 +00003288 call_function_and_chase(guest_IA_curr_instr + ((ULong)(Long)(Short)i2 << 1));
sewardj2019a972011-03-07 16:04:07 +00003289
3290 return "bras";
3291}
3292
3293static HChar *
3294s390_irgen_BRASL(UChar r1, UInt i2)
3295{
3296 put_gpr_dw0(r1, mkU64(guest_IA_curr_instr + 6ULL));
floriana64c2432011-07-16 02:11:50 +00003297 call_function_and_chase(guest_IA_curr_instr + ((ULong)(Long)(Int)i2 << 1));
sewardj2019a972011-03-07 16:04:07 +00003298
3299 return "brasl";
3300}
3301
3302static HChar *
3303s390_irgen_BRC(UChar r1, UShort i2)
3304{
3305 IRTemp cond = newTemp(Ity_I32);
3306
3307 if (r1 == 0) {
3308 } else {
3309 if (r1 == 15) {
floriana64c2432011-07-16 02:11:50 +00003310 always_goto_and_chase(
3311 guest_IA_curr_instr + ((ULong)(Long)(Short)i2 << 1));
sewardj2019a972011-03-07 16:04:07 +00003312 } else {
3313 assign(cond, s390_call_calculate_cond(r1));
3314 if_condition_goto(binop(Iop_CmpNE32, mkexpr(cond), mkU32(0)),
3315 guest_IA_curr_instr + ((ULong)(Long)(Short)i2 << 1));
3316
3317 }
3318 }
sewardj7ee97522011-05-09 21:45:04 +00003319 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00003320 s390_disasm(ENC2(XMNM, PCREL), S390_XMNM_BRC, r1, (Int)(Short)i2);
3321
3322 return "brc";
3323}
3324
3325static HChar *
3326s390_irgen_BRCL(UChar r1, UInt i2)
3327{
3328 IRTemp cond = newTemp(Ity_I32);
3329
3330 if (r1 == 0) {
3331 } else {
3332 if (r1 == 15) {
floriana64c2432011-07-16 02:11:50 +00003333 always_goto_and_chase(guest_IA_curr_instr + ((ULong)(Long)(Int)i2 << 1));
sewardj2019a972011-03-07 16:04:07 +00003334 } else {
3335 assign(cond, s390_call_calculate_cond(r1));
3336 if_condition_goto(binop(Iop_CmpNE32, mkexpr(cond), mkU32(0)),
3337 guest_IA_curr_instr + ((ULong)(Long)(Int)i2 << 1));
3338 }
3339 }
sewardj7ee97522011-05-09 21:45:04 +00003340 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00003341 s390_disasm(ENC2(XMNM, PCREL), S390_XMNM_BRCL, r1, i2);
3342
3343 return "brcl";
3344}
3345
3346static HChar *
3347s390_irgen_BRCT(UChar r1, UShort i2)
3348{
3349 put_gpr_w1(r1, binop(Iop_Sub32, get_gpr_w1(r1), mkU32(1)));
3350 if_condition_goto(binop(Iop_CmpNE32, get_gpr_w1(r1), mkU32(0)),
3351 guest_IA_curr_instr + ((ULong)(Long)(Short)i2 << 1));
3352
3353 return "brct";
3354}
3355
3356static HChar *
3357s390_irgen_BRCTG(UChar r1, UShort i2)
3358{
3359 put_gpr_dw0(r1, binop(Iop_Sub64, get_gpr_dw0(r1), mkU64(1)));
3360 if_condition_goto(binop(Iop_CmpNE64, get_gpr_dw0(r1), mkU64(0)),
3361 guest_IA_curr_instr + ((ULong)(Long)(Short)i2 << 1));
3362
3363 return "brctg";
3364}
3365
3366static HChar *
3367s390_irgen_BRXH(UChar r1, UChar r3, UShort i2)
3368{
3369 IRTemp value = newTemp(Ity_I32);
3370
3371 assign(value, get_gpr_w1(r3 | 1));
3372 put_gpr_w1(r1, binop(Iop_Add32, get_gpr_w1(r1), get_gpr_w1(r3)));
3373 if_condition_goto(binop(Iop_CmpLT32S, mkexpr(value), get_gpr_w1(r1)),
3374 guest_IA_curr_instr + ((ULong)(Long)(Short)i2 << 1));
3375
3376 return "brxh";
3377}
3378
3379static HChar *
3380s390_irgen_BRXHG(UChar r1, UChar r3, UShort i2)
3381{
3382 IRTemp value = newTemp(Ity_I64);
3383
3384 assign(value, get_gpr_dw0(r3 | 1));
3385 put_gpr_dw0(r1, binop(Iop_Add64, get_gpr_dw0(r1), get_gpr_dw0(r3)));
3386 if_condition_goto(binop(Iop_CmpLT64S, mkexpr(value), get_gpr_dw0(r1)),
3387 guest_IA_curr_instr + ((ULong)(Long)(Short)i2 << 1));
3388
3389 return "brxhg";
3390}
3391
3392static HChar *
3393s390_irgen_BRXLE(UChar r1, UChar r3, UShort i2)
3394{
3395 IRTemp value = newTemp(Ity_I32);
3396
3397 assign(value, get_gpr_w1(r3 | 1));
3398 put_gpr_w1(r1, binop(Iop_Add32, get_gpr_w1(r1), get_gpr_w1(r3)));
3399 if_condition_goto(binop(Iop_CmpLE32S, get_gpr_w1(r1), mkexpr(value)),
3400 guest_IA_curr_instr + ((ULong)(Long)(Short)i2 << 1));
3401
3402 return "brxle";
3403}
3404
3405static HChar *
3406s390_irgen_BRXLG(UChar r1, UChar r3, UShort i2)
3407{
3408 IRTemp value = newTemp(Ity_I64);
3409
3410 assign(value, get_gpr_dw0(r3 | 1));
3411 put_gpr_dw0(r1, binop(Iop_Add64, get_gpr_dw0(r1), get_gpr_dw0(r3)));
3412 if_condition_goto(binop(Iop_CmpLE64S, get_gpr_dw0(r1), mkexpr(value)),
3413 guest_IA_curr_instr + ((ULong)(Long)(Short)i2 << 1));
3414
3415 return "brxlg";
3416}
3417
3418static HChar *
3419s390_irgen_CR(UChar r1, UChar r2)
3420{
3421 IRTemp op1 = newTemp(Ity_I32);
3422 IRTemp op2 = newTemp(Ity_I32);
3423
3424 assign(op1, get_gpr_w1(r1));
3425 assign(op2, get_gpr_w1(r2));
3426 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
3427
3428 return "cr";
3429}
3430
3431static HChar *
3432s390_irgen_CGR(UChar r1, UChar r2)
3433{
3434 IRTemp op1 = newTemp(Ity_I64);
3435 IRTemp op2 = newTemp(Ity_I64);
3436
3437 assign(op1, get_gpr_dw0(r1));
3438 assign(op2, get_gpr_dw0(r2));
3439 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
3440
3441 return "cgr";
3442}
3443
3444static HChar *
3445s390_irgen_CGFR(UChar r1, UChar r2)
3446{
3447 IRTemp op1 = newTemp(Ity_I64);
3448 IRTemp op2 = newTemp(Ity_I64);
3449
3450 assign(op1, get_gpr_dw0(r1));
3451 assign(op2, unop(Iop_32Sto64, get_gpr_w1(r2)));
3452 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
3453
3454 return "cgfr";
3455}
3456
3457static HChar *
3458s390_irgen_C(UChar r1, IRTemp op2addr)
3459{
3460 IRTemp op1 = newTemp(Ity_I32);
3461 IRTemp op2 = newTemp(Ity_I32);
3462
3463 assign(op1, get_gpr_w1(r1));
3464 assign(op2, load(Ity_I32, mkexpr(op2addr)));
3465 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
3466
3467 return "c";
3468}
3469
3470static HChar *
3471s390_irgen_CY(UChar r1, IRTemp op2addr)
3472{
3473 IRTemp op1 = newTemp(Ity_I32);
3474 IRTemp op2 = newTemp(Ity_I32);
3475
3476 assign(op1, get_gpr_w1(r1));
3477 assign(op2, load(Ity_I32, mkexpr(op2addr)));
3478 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
3479
3480 return "cy";
3481}
3482
3483static HChar *
3484s390_irgen_CG(UChar r1, IRTemp op2addr)
3485{
3486 IRTemp op1 = newTemp(Ity_I64);
3487 IRTemp op2 = newTemp(Ity_I64);
3488
3489 assign(op1, get_gpr_dw0(r1));
3490 assign(op2, load(Ity_I64, mkexpr(op2addr)));
3491 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
3492
3493 return "cg";
3494}
3495
3496static HChar *
3497s390_irgen_CGF(UChar r1, IRTemp op2addr)
3498{
3499 IRTemp op1 = newTemp(Ity_I64);
3500 IRTemp op2 = newTemp(Ity_I64);
3501
3502 assign(op1, get_gpr_dw0(r1));
3503 assign(op2, unop(Iop_32Sto64, load(Ity_I32, mkexpr(op2addr))));
3504 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
3505
3506 return "cgf";
3507}
3508
3509static HChar *
3510s390_irgen_CFI(UChar r1, UInt i2)
3511{
3512 IRTemp op1 = newTemp(Ity_I32);
3513 Int op2;
3514
3515 assign(op1, get_gpr_w1(r1));
3516 op2 = (Int)i2;
3517 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, mktemp(Ity_I32,
3518 mkU32((UInt)op2)));
3519
3520 return "cfi";
3521}
3522
3523static HChar *
3524s390_irgen_CGFI(UChar r1, UInt i2)
3525{
3526 IRTemp op1 = newTemp(Ity_I64);
3527 Long op2;
3528
3529 assign(op1, get_gpr_dw0(r1));
3530 op2 = (Long)(Int)i2;
3531 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, mktemp(Ity_I64,
3532 mkU64((ULong)op2)));
3533
3534 return "cgfi";
3535}
3536
3537static HChar *
3538s390_irgen_CRL(UChar r1, UInt i2)
3539{
3540 IRTemp op1 = newTemp(Ity_I32);
3541 IRTemp op2 = newTemp(Ity_I32);
3542
3543 assign(op1, get_gpr_w1(r1));
3544 assign(op2, load(Ity_I32, mkU64(guest_IA_curr_instr + ((ULong)(Long)(Int)
3545 i2 << 1))));
3546 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
3547
3548 return "crl";
3549}
3550
3551static HChar *
3552s390_irgen_CGRL(UChar r1, UInt i2)
3553{
3554 IRTemp op1 = newTemp(Ity_I64);
3555 IRTemp op2 = newTemp(Ity_I64);
3556
3557 assign(op1, get_gpr_dw0(r1));
3558 assign(op2, load(Ity_I64, mkU64(guest_IA_curr_instr + ((ULong)(Long)(Int)
3559 i2 << 1))));
3560 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
3561
3562 return "cgrl";
3563}
3564
3565static HChar *
3566s390_irgen_CGFRL(UChar r1, UInt i2)
3567{
3568 IRTemp op1 = newTemp(Ity_I64);
3569 IRTemp op2 = newTemp(Ity_I64);
3570
3571 assign(op1, get_gpr_dw0(r1));
3572 assign(op2, unop(Iop_32Sto64, load(Ity_I32, mkU64(guest_IA_curr_instr +
3573 ((ULong)(Long)(Int)i2 << 1)))));
3574 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
3575
3576 return "cgfrl";
3577}
3578
3579static HChar *
3580s390_irgen_CRB(UChar r1, UChar r2, UChar m3, IRTemp op4addr)
3581{
3582 IRTemp op1 = newTemp(Ity_I32);
3583 IRTemp op2 = newTemp(Ity_I32);
3584 IRTemp icc = newTemp(Ity_I32);
3585 IRTemp cond = newTemp(Ity_I32);
3586
3587 if (m3 == 0) {
3588 } else {
3589 if (m3 == 14) {
3590 always_goto(mkexpr(op4addr));
3591 } else {
3592 assign(op1, get_gpr_w1(r1));
3593 assign(op2, get_gpr_w1(r2));
3594 assign(icc, s390_call_calculate_iccSS(S390_CC_OP_SIGNED_COMPARE, op1,
3595 op2));
3596 assign(cond, binop(Iop_And32, binop(Iop_Shl32, mkU32(m3),
3597 unop(Iop_32to8, mkexpr(icc))), mkU32(8)));
3598 if_not_condition_goto_computed(binop(Iop_CmpEQ32, mkexpr(cond),
3599 mkU32(0)), mkexpr(op4addr));
3600 }
3601 }
3602
3603 return "crb";
3604}
3605
3606static HChar *
3607s390_irgen_CGRB(UChar r1, UChar r2, UChar m3, IRTemp op4addr)
3608{
3609 IRTemp op1 = newTemp(Ity_I64);
3610 IRTemp op2 = newTemp(Ity_I64);
3611 IRTemp icc = newTemp(Ity_I32);
3612 IRTemp cond = newTemp(Ity_I32);
3613
3614 if (m3 == 0) {
3615 } else {
3616 if (m3 == 14) {
3617 always_goto(mkexpr(op4addr));
3618 } else {
3619 assign(op1, get_gpr_dw0(r1));
3620 assign(op2, get_gpr_dw0(r2));
3621 assign(icc, s390_call_calculate_iccSS(S390_CC_OP_SIGNED_COMPARE, op1,
3622 op2));
3623 assign(cond, binop(Iop_And32, binop(Iop_Shl32, mkU32(m3),
3624 unop(Iop_32to8, mkexpr(icc))), mkU32(8)));
3625 if_not_condition_goto_computed(binop(Iop_CmpEQ32, mkexpr(cond),
3626 mkU32(0)), mkexpr(op4addr));
3627 }
3628 }
3629
3630 return "cgrb";
3631}
3632
3633static HChar *
3634s390_irgen_CRJ(UChar r1, UChar r2, UShort i4, UChar m3)
3635{
3636 IRTemp op1 = newTemp(Ity_I32);
3637 IRTemp op2 = newTemp(Ity_I32);
3638 IRTemp icc = newTemp(Ity_I32);
3639 IRTemp cond = newTemp(Ity_I32);
3640
3641 if (m3 == 0) {
3642 } else {
3643 if (m3 == 14) {
floriana64c2432011-07-16 02:11:50 +00003644 always_goto_and_chase(
3645 guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1));
sewardj2019a972011-03-07 16:04:07 +00003646 } else {
3647 assign(op1, get_gpr_w1(r1));
3648 assign(op2, get_gpr_w1(r2));
3649 assign(icc, s390_call_calculate_iccSS(S390_CC_OP_SIGNED_COMPARE, op1,
3650 op2));
3651 assign(cond, binop(Iop_And32, binop(Iop_Shl32, mkU32(m3),
3652 unop(Iop_32to8, mkexpr(icc))), mkU32(8)));
3653 if_condition_goto(binop(Iop_CmpNE32, mkexpr(cond), mkU32(0)),
3654 guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1));
3655
3656 }
3657 }
3658
3659 return "crj";
3660}
3661
3662static HChar *
3663s390_irgen_CGRJ(UChar r1, UChar r2, UShort i4, UChar m3)
3664{
3665 IRTemp op1 = newTemp(Ity_I64);
3666 IRTemp op2 = newTemp(Ity_I64);
3667 IRTemp icc = newTemp(Ity_I32);
3668 IRTemp cond = newTemp(Ity_I32);
3669
3670 if (m3 == 0) {
3671 } else {
3672 if (m3 == 14) {
floriana64c2432011-07-16 02:11:50 +00003673 always_goto_and_chase(
3674 guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1));
sewardj2019a972011-03-07 16:04:07 +00003675 } else {
3676 assign(op1, get_gpr_dw0(r1));
3677 assign(op2, get_gpr_dw0(r2));
3678 assign(icc, s390_call_calculate_iccSS(S390_CC_OP_SIGNED_COMPARE, op1,
3679 op2));
3680 assign(cond, binop(Iop_And32, binop(Iop_Shl32, mkU32(m3),
3681 unop(Iop_32to8, mkexpr(icc))), mkU32(8)));
3682 if_condition_goto(binop(Iop_CmpNE32, mkexpr(cond), mkU32(0)),
3683 guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1));
3684
3685 }
3686 }
3687
3688 return "cgrj";
3689}
3690
3691static HChar *
3692s390_irgen_CIB(UChar r1, UChar m3, UChar i2, IRTemp op4addr)
3693{
3694 IRTemp op1 = newTemp(Ity_I32);
3695 Int op2;
3696 IRTemp icc = newTemp(Ity_I32);
3697 IRTemp cond = newTemp(Ity_I32);
3698
3699 if (m3 == 0) {
3700 } else {
3701 if (m3 == 14) {
3702 always_goto(mkexpr(op4addr));
3703 } else {
3704 assign(op1, get_gpr_w1(r1));
3705 op2 = (Int)(Char)i2;
3706 assign(icc, s390_call_calculate_iccSS(S390_CC_OP_SIGNED_COMPARE, op1,
3707 mktemp(Ity_I32, mkU32((UInt)op2))));
3708 assign(cond, binop(Iop_And32, binop(Iop_Shl32, mkU32(m3),
3709 unop(Iop_32to8, mkexpr(icc))), mkU32(8)));
3710 if_not_condition_goto_computed(binop(Iop_CmpEQ32, mkexpr(cond),
3711 mkU32(0)), mkexpr(op4addr));
3712 }
3713 }
3714
3715 return "cib";
3716}
3717
3718static HChar *
3719s390_irgen_CGIB(UChar r1, UChar m3, UChar i2, IRTemp op4addr)
3720{
3721 IRTemp op1 = newTemp(Ity_I64);
3722 Long op2;
3723 IRTemp icc = newTemp(Ity_I32);
3724 IRTemp cond = newTemp(Ity_I32);
3725
3726 if (m3 == 0) {
3727 } else {
3728 if (m3 == 14) {
3729 always_goto(mkexpr(op4addr));
3730 } else {
3731 assign(op1, get_gpr_dw0(r1));
3732 op2 = (Long)(Char)i2;
3733 assign(icc, s390_call_calculate_iccSS(S390_CC_OP_SIGNED_COMPARE, op1,
3734 mktemp(Ity_I64, mkU64((ULong)op2))));
3735 assign(cond, binop(Iop_And32, binop(Iop_Shl32, mkU32(m3),
3736 unop(Iop_32to8, mkexpr(icc))), mkU32(8)));
3737 if_not_condition_goto_computed(binop(Iop_CmpEQ32, mkexpr(cond),
3738 mkU32(0)), mkexpr(op4addr));
3739 }
3740 }
3741
3742 return "cgib";
3743}
3744
3745static HChar *
3746s390_irgen_CIJ(UChar r1, UChar m3, UShort i4, UChar i2)
3747{
3748 IRTemp op1 = newTemp(Ity_I32);
3749 Int op2;
3750 IRTemp icc = newTemp(Ity_I32);
3751 IRTemp cond = newTemp(Ity_I32);
3752
3753 if (m3 == 0) {
3754 } else {
3755 if (m3 == 14) {
floriana64c2432011-07-16 02:11:50 +00003756 always_goto_and_chase(guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1));
sewardj2019a972011-03-07 16:04:07 +00003757 } else {
3758 assign(op1, get_gpr_w1(r1));
3759 op2 = (Int)(Char)i2;
3760 assign(icc, s390_call_calculate_iccSS(S390_CC_OP_SIGNED_COMPARE, op1,
3761 mktemp(Ity_I32, mkU32((UInt)op2))));
3762 assign(cond, binop(Iop_And32, binop(Iop_Shl32, mkU32(m3),
3763 unop(Iop_32to8, mkexpr(icc))), mkU32(8)));
3764 if_condition_goto(binop(Iop_CmpNE32, mkexpr(cond), mkU32(0)),
3765 guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1));
3766
3767 }
3768 }
3769
3770 return "cij";
3771}
3772
3773static HChar *
3774s390_irgen_CGIJ(UChar r1, UChar m3, UShort i4, UChar i2)
3775{
3776 IRTemp op1 = newTemp(Ity_I64);
3777 Long op2;
3778 IRTemp icc = newTemp(Ity_I32);
3779 IRTemp cond = newTemp(Ity_I32);
3780
3781 if (m3 == 0) {
3782 } else {
3783 if (m3 == 14) {
floriana64c2432011-07-16 02:11:50 +00003784 always_goto_and_chase(guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1));
sewardj2019a972011-03-07 16:04:07 +00003785 } else {
3786 assign(op1, get_gpr_dw0(r1));
3787 op2 = (Long)(Char)i2;
3788 assign(icc, s390_call_calculate_iccSS(S390_CC_OP_SIGNED_COMPARE, op1,
3789 mktemp(Ity_I64, mkU64((ULong)op2))));
3790 assign(cond, binop(Iop_And32, binop(Iop_Shl32, mkU32(m3),
3791 unop(Iop_32to8, mkexpr(icc))), mkU32(8)));
3792 if_condition_goto(binop(Iop_CmpNE32, mkexpr(cond), mkU32(0)),
3793 guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1));
3794
3795 }
3796 }
3797
3798 return "cgij";
3799}
3800
3801static HChar *
3802s390_irgen_CH(UChar r1, IRTemp op2addr)
3803{
3804 IRTemp op1 = newTemp(Ity_I32);
3805 IRTemp op2 = newTemp(Ity_I32);
3806
3807 assign(op1, get_gpr_w1(r1));
3808 assign(op2, unop(Iop_16Sto32, load(Ity_I16, mkexpr(op2addr))));
3809 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
3810
3811 return "ch";
3812}
3813
3814static HChar *
3815s390_irgen_CHY(UChar r1, IRTemp op2addr)
3816{
3817 IRTemp op1 = newTemp(Ity_I32);
3818 IRTemp op2 = newTemp(Ity_I32);
3819
3820 assign(op1, get_gpr_w1(r1));
3821 assign(op2, unop(Iop_16Sto32, load(Ity_I16, mkexpr(op2addr))));
3822 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
3823
3824 return "chy";
3825}
3826
3827static HChar *
3828s390_irgen_CGH(UChar r1, IRTemp op2addr)
3829{
3830 IRTemp op1 = newTemp(Ity_I64);
3831 IRTemp op2 = newTemp(Ity_I64);
3832
3833 assign(op1, get_gpr_dw0(r1));
3834 assign(op2, unop(Iop_16Sto64, load(Ity_I16, mkexpr(op2addr))));
3835 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
3836
3837 return "cgh";
3838}
3839
3840static HChar *
3841s390_irgen_CHI(UChar r1, UShort i2)
3842{
3843 IRTemp op1 = newTemp(Ity_I32);
3844 Int op2;
3845
3846 assign(op1, get_gpr_w1(r1));
3847 op2 = (Int)(Short)i2;
3848 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, mktemp(Ity_I32,
3849 mkU32((UInt)op2)));
3850
3851 return "chi";
3852}
3853
3854static HChar *
3855s390_irgen_CGHI(UChar r1, UShort i2)
3856{
3857 IRTemp op1 = newTemp(Ity_I64);
3858 Long op2;
3859
3860 assign(op1, get_gpr_dw0(r1));
3861 op2 = (Long)(Short)i2;
3862 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, mktemp(Ity_I64,
3863 mkU64((ULong)op2)));
3864
3865 return "cghi";
3866}
3867
3868static HChar *
3869s390_irgen_CHHSI(UShort i2, IRTemp op1addr)
3870{
3871 IRTemp op1 = newTemp(Ity_I16);
3872 Short op2;
3873
3874 assign(op1, load(Ity_I16, mkexpr(op1addr)));
3875 op2 = (Short)i2;
3876 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, mktemp(Ity_I16,
3877 mkU16((UShort)op2)));
3878
3879 return "chhsi";
3880}
3881
3882static HChar *
3883s390_irgen_CHSI(UShort i2, IRTemp op1addr)
3884{
3885 IRTemp op1 = newTemp(Ity_I32);
3886 Int op2;
3887
3888 assign(op1, load(Ity_I32, mkexpr(op1addr)));
3889 op2 = (Int)(Short)i2;
3890 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, mktemp(Ity_I32,
3891 mkU32((UInt)op2)));
3892
3893 return "chsi";
3894}
3895
3896static HChar *
3897s390_irgen_CGHSI(UShort i2, IRTemp op1addr)
3898{
3899 IRTemp op1 = newTemp(Ity_I64);
3900 Long op2;
3901
3902 assign(op1, load(Ity_I64, mkexpr(op1addr)));
3903 op2 = (Long)(Short)i2;
3904 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, mktemp(Ity_I64,
3905 mkU64((ULong)op2)));
3906
3907 return "cghsi";
3908}
3909
3910static HChar *
3911s390_irgen_CHRL(UChar r1, UInt i2)
3912{
3913 IRTemp op1 = newTemp(Ity_I32);
3914 IRTemp op2 = newTemp(Ity_I32);
3915
3916 assign(op1, get_gpr_w1(r1));
3917 assign(op2, unop(Iop_16Sto32, load(Ity_I16, mkU64(guest_IA_curr_instr +
3918 ((ULong)(Long)(Int)i2 << 1)))));
3919 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
3920
3921 return "chrl";
3922}
3923
3924static HChar *
3925s390_irgen_CGHRL(UChar r1, UInt i2)
3926{
3927 IRTemp op1 = newTemp(Ity_I64);
3928 IRTemp op2 = newTemp(Ity_I64);
3929
3930 assign(op1, get_gpr_dw0(r1));
3931 assign(op2, unop(Iop_16Sto64, load(Ity_I16, mkU64(guest_IA_curr_instr +
3932 ((ULong)(Long)(Int)i2 << 1)))));
3933 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
3934
3935 return "cghrl";
3936}
3937
3938static HChar *
3939s390_irgen_CHHR(UChar r1, UChar r2)
3940{
3941 IRTemp op1 = newTemp(Ity_I32);
3942 IRTemp op2 = newTemp(Ity_I32);
3943
3944 assign(op1, get_gpr_w0(r1));
3945 assign(op2, get_gpr_w0(r2));
3946 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
3947
3948 return "chhr";
3949}
3950
3951static HChar *
3952s390_irgen_CHLR(UChar r1, UChar r2)
3953{
3954 IRTemp op1 = newTemp(Ity_I32);
3955 IRTemp op2 = newTemp(Ity_I32);
3956
3957 assign(op1, get_gpr_w0(r1));
3958 assign(op2, get_gpr_w1(r2));
3959 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
3960
3961 return "chlr";
3962}
3963
3964static HChar *
3965s390_irgen_CHF(UChar r1, IRTemp op2addr)
3966{
3967 IRTemp op1 = newTemp(Ity_I32);
3968 IRTemp op2 = newTemp(Ity_I32);
3969
3970 assign(op1, get_gpr_w0(r1));
3971 assign(op2, load(Ity_I32, mkexpr(op2addr)));
3972 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
3973
3974 return "chf";
3975}
3976
3977static HChar *
3978s390_irgen_CIH(UChar r1, UInt i2)
3979{
3980 IRTemp op1 = newTemp(Ity_I32);
3981 Int op2;
3982
3983 assign(op1, get_gpr_w0(r1));
3984 op2 = (Int)i2;
3985 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, mktemp(Ity_I32,
3986 mkU32((UInt)op2)));
3987
3988 return "cih";
3989}
3990
3991static HChar *
3992s390_irgen_CLR(UChar r1, UChar r2)
3993{
3994 IRTemp op1 = newTemp(Ity_I32);
3995 IRTemp op2 = newTemp(Ity_I32);
3996
3997 assign(op1, get_gpr_w1(r1));
3998 assign(op2, get_gpr_w1(r2));
3999 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
4000
4001 return "clr";
4002}
4003
4004static HChar *
4005s390_irgen_CLGR(UChar r1, UChar r2)
4006{
4007 IRTemp op1 = newTemp(Ity_I64);
4008 IRTemp op2 = newTemp(Ity_I64);
4009
4010 assign(op1, get_gpr_dw0(r1));
4011 assign(op2, get_gpr_dw0(r2));
4012 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
4013
4014 return "clgr";
4015}
4016
4017static HChar *
4018s390_irgen_CLGFR(UChar r1, UChar r2)
4019{
4020 IRTemp op1 = newTemp(Ity_I64);
4021 IRTemp op2 = newTemp(Ity_I64);
4022
4023 assign(op1, get_gpr_dw0(r1));
4024 assign(op2, unop(Iop_32Uto64, get_gpr_w1(r2)));
4025 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
4026
4027 return "clgfr";
4028}
4029
4030static HChar *
4031s390_irgen_CL(UChar r1, IRTemp op2addr)
4032{
4033 IRTemp op1 = newTemp(Ity_I32);
4034 IRTemp op2 = newTemp(Ity_I32);
4035
4036 assign(op1, get_gpr_w1(r1));
4037 assign(op2, load(Ity_I32, mkexpr(op2addr)));
4038 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
4039
4040 return "cl";
4041}
4042
4043static HChar *
4044s390_irgen_CLY(UChar r1, IRTemp op2addr)
4045{
4046 IRTemp op1 = newTemp(Ity_I32);
4047 IRTemp op2 = newTemp(Ity_I32);
4048
4049 assign(op1, get_gpr_w1(r1));
4050 assign(op2, load(Ity_I32, mkexpr(op2addr)));
4051 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
4052
4053 return "cly";
4054}
4055
4056static HChar *
4057s390_irgen_CLG(UChar r1, IRTemp op2addr)
4058{
4059 IRTemp op1 = newTemp(Ity_I64);
4060 IRTemp op2 = newTemp(Ity_I64);
4061
4062 assign(op1, get_gpr_dw0(r1));
4063 assign(op2, load(Ity_I64, mkexpr(op2addr)));
4064 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
4065
4066 return "clg";
4067}
4068
4069static HChar *
4070s390_irgen_CLGF(UChar r1, IRTemp op2addr)
4071{
4072 IRTemp op1 = newTemp(Ity_I64);
4073 IRTemp op2 = newTemp(Ity_I64);
4074
4075 assign(op1, get_gpr_dw0(r1));
4076 assign(op2, unop(Iop_32Uto64, load(Ity_I32, mkexpr(op2addr))));
4077 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
4078
4079 return "clgf";
4080}
4081
4082static HChar *
4083s390_irgen_CLFI(UChar r1, UInt i2)
4084{
4085 IRTemp op1 = newTemp(Ity_I32);
4086 UInt op2;
4087
4088 assign(op1, get_gpr_w1(r1));
4089 op2 = i2;
4090 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, mktemp(Ity_I32,
4091 mkU32(op2)));
4092
4093 return "clfi";
4094}
4095
4096static HChar *
4097s390_irgen_CLGFI(UChar r1, UInt i2)
4098{
4099 IRTemp op1 = newTemp(Ity_I64);
4100 ULong op2;
4101
4102 assign(op1, get_gpr_dw0(r1));
4103 op2 = (ULong)i2;
4104 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, mktemp(Ity_I64,
4105 mkU64(op2)));
4106
4107 return "clgfi";
4108}
4109
4110static HChar *
4111s390_irgen_CLI(UChar i2, IRTemp op1addr)
4112{
4113 IRTemp op1 = newTemp(Ity_I8);
4114 UChar op2;
4115
4116 assign(op1, load(Ity_I8, mkexpr(op1addr)));
4117 op2 = i2;
4118 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, mktemp(Ity_I8,
4119 mkU8(op2)));
4120
4121 return "cli";
4122}
4123
4124static HChar *
4125s390_irgen_CLIY(UChar i2, IRTemp op1addr)
4126{
4127 IRTemp op1 = newTemp(Ity_I8);
4128 UChar op2;
4129
4130 assign(op1, load(Ity_I8, mkexpr(op1addr)));
4131 op2 = i2;
4132 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, mktemp(Ity_I8,
4133 mkU8(op2)));
4134
4135 return "cliy";
4136}
4137
4138static HChar *
4139s390_irgen_CLFHSI(UShort i2, IRTemp op1addr)
4140{
4141 IRTemp op1 = newTemp(Ity_I32);
4142 UInt op2;
4143
4144 assign(op1, load(Ity_I32, mkexpr(op1addr)));
4145 op2 = (UInt)i2;
4146 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, mktemp(Ity_I32,
4147 mkU32(op2)));
4148
4149 return "clfhsi";
4150}
4151
4152static HChar *
4153s390_irgen_CLGHSI(UShort i2, IRTemp op1addr)
4154{
4155 IRTemp op1 = newTemp(Ity_I64);
4156 ULong op2;
4157
4158 assign(op1, load(Ity_I64, mkexpr(op1addr)));
4159 op2 = (ULong)i2;
4160 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, mktemp(Ity_I64,
4161 mkU64(op2)));
4162
4163 return "clghsi";
4164}
4165
4166static HChar *
4167s390_irgen_CLHHSI(UShort i2, IRTemp op1addr)
4168{
4169 IRTemp op1 = newTemp(Ity_I16);
4170 UShort op2;
4171
4172 assign(op1, load(Ity_I16, mkexpr(op1addr)));
4173 op2 = i2;
4174 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, mktemp(Ity_I16,
4175 mkU16(op2)));
4176
4177 return "clhhsi";
4178}
4179
4180static HChar *
4181s390_irgen_CLRL(UChar r1, UInt i2)
4182{
4183 IRTemp op1 = newTemp(Ity_I32);
4184 IRTemp op2 = newTemp(Ity_I32);
4185
4186 assign(op1, get_gpr_w1(r1));
4187 assign(op2, load(Ity_I32, mkU64(guest_IA_curr_instr + ((ULong)(Long)(Int)
4188 i2 << 1))));
4189 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
4190
4191 return "clrl";
4192}
4193
4194static HChar *
4195s390_irgen_CLGRL(UChar r1, UInt i2)
4196{
4197 IRTemp op1 = newTemp(Ity_I64);
4198 IRTemp op2 = newTemp(Ity_I64);
4199
4200 assign(op1, get_gpr_dw0(r1));
4201 assign(op2, load(Ity_I64, mkU64(guest_IA_curr_instr + ((ULong)(Long)(Int)
4202 i2 << 1))));
4203 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
4204
4205 return "clgrl";
4206}
4207
4208static HChar *
4209s390_irgen_CLGFRL(UChar r1, UInt i2)
4210{
4211 IRTemp op1 = newTemp(Ity_I64);
4212 IRTemp op2 = newTemp(Ity_I64);
4213
4214 assign(op1, get_gpr_dw0(r1));
4215 assign(op2, unop(Iop_32Uto64, load(Ity_I32, mkU64(guest_IA_curr_instr +
4216 ((ULong)(Long)(Int)i2 << 1)))));
4217 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
4218
4219 return "clgfrl";
4220}
4221
4222static HChar *
4223s390_irgen_CLHRL(UChar r1, UInt i2)
4224{
4225 IRTemp op1 = newTemp(Ity_I32);
4226 IRTemp op2 = newTemp(Ity_I32);
4227
4228 assign(op1, get_gpr_w1(r1));
4229 assign(op2, unop(Iop_16Uto32, load(Ity_I16, mkU64(guest_IA_curr_instr +
4230 ((ULong)(Long)(Int)i2 << 1)))));
4231 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
4232
4233 return "clhrl";
4234}
4235
4236static HChar *
4237s390_irgen_CLGHRL(UChar r1, UInt i2)
4238{
4239 IRTemp op1 = newTemp(Ity_I64);
4240 IRTemp op2 = newTemp(Ity_I64);
4241
4242 assign(op1, get_gpr_dw0(r1));
4243 assign(op2, unop(Iop_16Uto64, load(Ity_I16, mkU64(guest_IA_curr_instr +
4244 ((ULong)(Long)(Int)i2 << 1)))));
4245 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
4246
4247 return "clghrl";
4248}
4249
4250static HChar *
4251s390_irgen_CLRB(UChar r1, UChar r2, UChar m3, IRTemp op4addr)
4252{
4253 IRTemp op1 = newTemp(Ity_I32);
4254 IRTemp op2 = newTemp(Ity_I32);
4255 IRTemp icc = newTemp(Ity_I32);
4256 IRTemp cond = newTemp(Ity_I32);
4257
4258 if (m3 == 0) {
4259 } else {
4260 if (m3 == 14) {
4261 always_goto(mkexpr(op4addr));
4262 } else {
4263 assign(op1, get_gpr_w1(r1));
4264 assign(op2, get_gpr_w1(r2));
4265 assign(icc, s390_call_calculate_iccZZ(S390_CC_OP_UNSIGNED_COMPARE, op1,
4266 op2));
4267 assign(cond, binop(Iop_And32, binop(Iop_Shl32, mkU32(m3),
4268 unop(Iop_32to8, mkexpr(icc))), mkU32(8)));
4269 if_not_condition_goto_computed(binop(Iop_CmpEQ32, mkexpr(cond),
4270 mkU32(0)), mkexpr(op4addr));
4271 }
4272 }
4273
4274 return "clrb";
4275}
4276
4277static HChar *
4278s390_irgen_CLGRB(UChar r1, UChar r2, UChar m3, IRTemp op4addr)
4279{
4280 IRTemp op1 = newTemp(Ity_I64);
4281 IRTemp op2 = newTemp(Ity_I64);
4282 IRTemp icc = newTemp(Ity_I32);
4283 IRTemp cond = newTemp(Ity_I32);
4284
4285 if (m3 == 0) {
4286 } else {
4287 if (m3 == 14) {
4288 always_goto(mkexpr(op4addr));
4289 } else {
4290 assign(op1, get_gpr_dw0(r1));
4291 assign(op2, get_gpr_dw0(r2));
4292 assign(icc, s390_call_calculate_iccZZ(S390_CC_OP_UNSIGNED_COMPARE, op1,
4293 op2));
4294 assign(cond, binop(Iop_And32, binop(Iop_Shl32, mkU32(m3),
4295 unop(Iop_32to8, mkexpr(icc))), mkU32(8)));
4296 if_not_condition_goto_computed(binop(Iop_CmpEQ32, mkexpr(cond),
4297 mkU32(0)), mkexpr(op4addr));
4298 }
4299 }
4300
4301 return "clgrb";
4302}
4303
4304static HChar *
4305s390_irgen_CLRJ(UChar r1, UChar r2, UShort i4, UChar m3)
4306{
4307 IRTemp op1 = newTemp(Ity_I32);
4308 IRTemp op2 = newTemp(Ity_I32);
4309 IRTemp icc = newTemp(Ity_I32);
4310 IRTemp cond = newTemp(Ity_I32);
4311
4312 if (m3 == 0) {
4313 } else {
4314 if (m3 == 14) {
floriana64c2432011-07-16 02:11:50 +00004315 always_goto_and_chase(guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1));
sewardj2019a972011-03-07 16:04:07 +00004316 } else {
4317 assign(op1, get_gpr_w1(r1));
4318 assign(op2, get_gpr_w1(r2));
4319 assign(icc, s390_call_calculate_iccZZ(S390_CC_OP_UNSIGNED_COMPARE, op1,
4320 op2));
4321 assign(cond, binop(Iop_And32, binop(Iop_Shl32, mkU32(m3),
4322 unop(Iop_32to8, mkexpr(icc))), mkU32(8)));
4323 if_condition_goto(binop(Iop_CmpNE32, mkexpr(cond), mkU32(0)),
4324 guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1));
4325
4326 }
4327 }
4328
4329 return "clrj";
4330}
4331
4332static HChar *
4333s390_irgen_CLGRJ(UChar r1, UChar r2, UShort i4, UChar m3)
4334{
4335 IRTemp op1 = newTemp(Ity_I64);
4336 IRTemp op2 = newTemp(Ity_I64);
4337 IRTemp icc = newTemp(Ity_I32);
4338 IRTemp cond = newTemp(Ity_I32);
4339
4340 if (m3 == 0) {
4341 } else {
4342 if (m3 == 14) {
floriana64c2432011-07-16 02:11:50 +00004343 always_goto_and_chase(guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1));
sewardj2019a972011-03-07 16:04:07 +00004344 } else {
4345 assign(op1, get_gpr_dw0(r1));
4346 assign(op2, get_gpr_dw0(r2));
4347 assign(icc, s390_call_calculate_iccZZ(S390_CC_OP_UNSIGNED_COMPARE, op1,
4348 op2));
4349 assign(cond, binop(Iop_And32, binop(Iop_Shl32, mkU32(m3),
4350 unop(Iop_32to8, mkexpr(icc))), mkU32(8)));
4351 if_condition_goto(binop(Iop_CmpNE32, mkexpr(cond), mkU32(0)),
4352 guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1));
4353
4354 }
4355 }
4356
4357 return "clgrj";
4358}
4359
4360static HChar *
4361s390_irgen_CLIB(UChar r1, UChar m3, UChar i2, IRTemp op4addr)
4362{
4363 IRTemp op1 = newTemp(Ity_I32);
4364 UInt op2;
4365 IRTemp icc = newTemp(Ity_I32);
4366 IRTemp cond = newTemp(Ity_I32);
4367
4368 if (m3 == 0) {
4369 } else {
4370 if (m3 == 14) {
4371 always_goto(mkexpr(op4addr));
4372 } else {
4373 assign(op1, get_gpr_w1(r1));
4374 op2 = (UInt)i2;
4375 assign(icc, s390_call_calculate_iccZZ(S390_CC_OP_UNSIGNED_COMPARE, op1,
4376 mktemp(Ity_I32, mkU32(op2))));
4377 assign(cond, binop(Iop_And32, binop(Iop_Shl32, mkU32(m3),
4378 unop(Iop_32to8, mkexpr(icc))), mkU32(8)));
4379 if_not_condition_goto_computed(binop(Iop_CmpEQ32, mkexpr(cond),
4380 mkU32(0)), mkexpr(op4addr));
4381 }
4382 }
4383
4384 return "clib";
4385}
4386
4387static HChar *
4388s390_irgen_CLGIB(UChar r1, UChar m3, UChar i2, IRTemp op4addr)
4389{
4390 IRTemp op1 = newTemp(Ity_I64);
4391 ULong op2;
4392 IRTemp icc = newTemp(Ity_I32);
4393 IRTemp cond = newTemp(Ity_I32);
4394
4395 if (m3 == 0) {
4396 } else {
4397 if (m3 == 14) {
4398 always_goto(mkexpr(op4addr));
4399 } else {
4400 assign(op1, get_gpr_dw0(r1));
4401 op2 = (ULong)i2;
4402 assign(icc, s390_call_calculate_iccZZ(S390_CC_OP_UNSIGNED_COMPARE, op1,
4403 mktemp(Ity_I64, mkU64(op2))));
4404 assign(cond, binop(Iop_And32, binop(Iop_Shl32, mkU32(m3),
4405 unop(Iop_32to8, mkexpr(icc))), mkU32(8)));
4406 if_not_condition_goto_computed(binop(Iop_CmpEQ32, mkexpr(cond),
4407 mkU32(0)), mkexpr(op4addr));
4408 }
4409 }
4410
4411 return "clgib";
4412}
4413
4414static HChar *
4415s390_irgen_CLIJ(UChar r1, UChar m3, UShort i4, UChar i2)
4416{
4417 IRTemp op1 = newTemp(Ity_I32);
4418 UInt op2;
4419 IRTemp icc = newTemp(Ity_I32);
4420 IRTemp cond = newTemp(Ity_I32);
4421
4422 if (m3 == 0) {
4423 } else {
4424 if (m3 == 14) {
floriana64c2432011-07-16 02:11:50 +00004425 always_goto_and_chase(guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1));
sewardj2019a972011-03-07 16:04:07 +00004426 } else {
4427 assign(op1, get_gpr_w1(r1));
4428 op2 = (UInt)i2;
4429 assign(icc, s390_call_calculate_iccZZ(S390_CC_OP_UNSIGNED_COMPARE, op1,
4430 mktemp(Ity_I32, mkU32(op2))));
4431 assign(cond, binop(Iop_And32, binop(Iop_Shl32, mkU32(m3),
4432 unop(Iop_32to8, mkexpr(icc))), mkU32(8)));
4433 if_condition_goto(binop(Iop_CmpNE32, mkexpr(cond), mkU32(0)),
4434 guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1));
4435
4436 }
4437 }
4438
4439 return "clij";
4440}
4441
4442static HChar *
4443s390_irgen_CLGIJ(UChar r1, UChar m3, UShort i4, UChar i2)
4444{
4445 IRTemp op1 = newTemp(Ity_I64);
4446 ULong op2;
4447 IRTemp icc = newTemp(Ity_I32);
4448 IRTemp cond = newTemp(Ity_I32);
4449
4450 if (m3 == 0) {
4451 } else {
4452 if (m3 == 14) {
floriana64c2432011-07-16 02:11:50 +00004453 always_goto_and_chase(guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1));
sewardj2019a972011-03-07 16:04:07 +00004454 } else {
4455 assign(op1, get_gpr_dw0(r1));
4456 op2 = (ULong)i2;
4457 assign(icc, s390_call_calculate_iccZZ(S390_CC_OP_UNSIGNED_COMPARE, op1,
4458 mktemp(Ity_I64, mkU64(op2))));
4459 assign(cond, binop(Iop_And32, binop(Iop_Shl32, mkU32(m3),
4460 unop(Iop_32to8, mkexpr(icc))), mkU32(8)));
4461 if_condition_goto(binop(Iop_CmpNE32, mkexpr(cond), mkU32(0)),
4462 guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1));
4463
4464 }
4465 }
4466
4467 return "clgij";
4468}
4469
4470static HChar *
4471s390_irgen_CLM(UChar r1, UChar r3, IRTemp op2addr)
4472{
4473 IRTemp op1 = newTemp(Ity_I32);
4474 IRTemp op2 = newTemp(Ity_I32);
4475 IRTemp b0 = newTemp(Ity_I32);
4476 IRTemp b1 = newTemp(Ity_I32);
4477 IRTemp b2 = newTemp(Ity_I32);
4478 IRTemp b3 = newTemp(Ity_I32);
4479 IRTemp c0 = newTemp(Ity_I32);
4480 IRTemp c1 = newTemp(Ity_I32);
4481 IRTemp c2 = newTemp(Ity_I32);
4482 IRTemp c3 = newTemp(Ity_I32);
4483 UChar n;
4484
4485 n = 0;
4486 if ((r3 & 8) != 0) {
4487 assign(b0, unop(Iop_8Uto32, get_gpr_b4(r1)));
4488 assign(c0, unop(Iop_8Uto32, load(Ity_I8, mkexpr(op2addr))));
4489 n = n + 1;
4490 } else {
4491 assign(b0, mkU32(0));
4492 assign(c0, mkU32(0));
4493 }
4494 if ((r3 & 4) != 0) {
4495 assign(b1, unop(Iop_8Uto32, get_gpr_b5(r1)));
4496 assign(c1, unop(Iop_8Uto32, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr),
4497 mkU64(n)))));
4498 n = n + 1;
4499 } else {
4500 assign(b1, mkU32(0));
4501 assign(c1, mkU32(0));
4502 }
4503 if ((r3 & 2) != 0) {
4504 assign(b2, unop(Iop_8Uto32, get_gpr_b6(r1)));
4505 assign(c2, unop(Iop_8Uto32, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr),
4506 mkU64(n)))));
4507 n = n + 1;
4508 } else {
4509 assign(b2, mkU32(0));
4510 assign(c2, mkU32(0));
4511 }
4512 if ((r3 & 1) != 0) {
4513 assign(b3, unop(Iop_8Uto32, get_gpr_b7(r1)));
4514 assign(c3, unop(Iop_8Uto32, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr),
4515 mkU64(n)))));
4516 n = n + 1;
4517 } else {
4518 assign(b3, mkU32(0));
4519 assign(c3, mkU32(0));
4520 }
4521 assign(op1, binop(Iop_Or32, binop(Iop_Or32, binop(Iop_Or32, binop(Iop_Shl32,
4522 mkexpr(b0), mkU8(24)), binop(Iop_Shl32, mkexpr(b1), mkU8(16))),
4523 binop(Iop_Shl32, mkexpr(b2), mkU8(8))), mkexpr(b3)));
4524 assign(op2, binop(Iop_Or32, binop(Iop_Or32, binop(Iop_Or32, binop(Iop_Shl32,
4525 mkexpr(c0), mkU8(24)), binop(Iop_Shl32, mkexpr(c1), mkU8(16))),
4526 binop(Iop_Shl32, mkexpr(c2), mkU8(8))), mkexpr(c3)));
4527 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
4528
4529 return "clm";
4530}
4531
4532static HChar *
4533s390_irgen_CLMY(UChar r1, UChar r3, IRTemp op2addr)
4534{
4535 IRTemp op1 = newTemp(Ity_I32);
4536 IRTemp op2 = newTemp(Ity_I32);
4537 IRTemp b0 = newTemp(Ity_I32);
4538 IRTemp b1 = newTemp(Ity_I32);
4539 IRTemp b2 = newTemp(Ity_I32);
4540 IRTemp b3 = newTemp(Ity_I32);
4541 IRTemp c0 = newTemp(Ity_I32);
4542 IRTemp c1 = newTemp(Ity_I32);
4543 IRTemp c2 = newTemp(Ity_I32);
4544 IRTemp c3 = newTemp(Ity_I32);
4545 UChar n;
4546
4547 n = 0;
4548 if ((r3 & 8) != 0) {
4549 assign(b0, unop(Iop_8Uto32, get_gpr_b4(r1)));
4550 assign(c0, unop(Iop_8Uto32, load(Ity_I8, mkexpr(op2addr))));
4551 n = n + 1;
4552 } else {
4553 assign(b0, mkU32(0));
4554 assign(c0, mkU32(0));
4555 }
4556 if ((r3 & 4) != 0) {
4557 assign(b1, unop(Iop_8Uto32, get_gpr_b5(r1)));
4558 assign(c1, unop(Iop_8Uto32, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr),
4559 mkU64(n)))));
4560 n = n + 1;
4561 } else {
4562 assign(b1, mkU32(0));
4563 assign(c1, mkU32(0));
4564 }
4565 if ((r3 & 2) != 0) {
4566 assign(b2, unop(Iop_8Uto32, get_gpr_b6(r1)));
4567 assign(c2, unop(Iop_8Uto32, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr),
4568 mkU64(n)))));
4569 n = n + 1;
4570 } else {
4571 assign(b2, mkU32(0));
4572 assign(c2, mkU32(0));
4573 }
4574 if ((r3 & 1) != 0) {
4575 assign(b3, unop(Iop_8Uto32, get_gpr_b7(r1)));
4576 assign(c3, unop(Iop_8Uto32, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr),
4577 mkU64(n)))));
4578 n = n + 1;
4579 } else {
4580 assign(b3, mkU32(0));
4581 assign(c3, mkU32(0));
4582 }
4583 assign(op1, binop(Iop_Or32, binop(Iop_Or32, binop(Iop_Or32, binop(Iop_Shl32,
4584 mkexpr(b0), mkU8(24)), binop(Iop_Shl32, mkexpr(b1), mkU8(16))),
4585 binop(Iop_Shl32, mkexpr(b2), mkU8(8))), mkexpr(b3)));
4586 assign(op2, binop(Iop_Or32, binop(Iop_Or32, binop(Iop_Or32, binop(Iop_Shl32,
4587 mkexpr(c0), mkU8(24)), binop(Iop_Shl32, mkexpr(c1), mkU8(16))),
4588 binop(Iop_Shl32, mkexpr(c2), mkU8(8))), mkexpr(c3)));
4589 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
4590
4591 return "clmy";
4592}
4593
4594static HChar *
4595s390_irgen_CLMH(UChar r1, UChar r3, IRTemp op2addr)
4596{
4597 IRTemp op1 = newTemp(Ity_I32);
4598 IRTemp op2 = newTemp(Ity_I32);
4599 IRTemp b0 = newTemp(Ity_I32);
4600 IRTemp b1 = newTemp(Ity_I32);
4601 IRTemp b2 = newTemp(Ity_I32);
4602 IRTemp b3 = newTemp(Ity_I32);
4603 IRTemp c0 = newTemp(Ity_I32);
4604 IRTemp c1 = newTemp(Ity_I32);
4605 IRTemp c2 = newTemp(Ity_I32);
4606 IRTemp c3 = newTemp(Ity_I32);
4607 UChar n;
4608
4609 n = 0;
4610 if ((r3 & 8) != 0) {
4611 assign(b0, unop(Iop_8Uto32, get_gpr_b0(r1)));
4612 assign(c0, unop(Iop_8Uto32, load(Ity_I8, mkexpr(op2addr))));
4613 n = n + 1;
4614 } else {
4615 assign(b0, mkU32(0));
4616 assign(c0, mkU32(0));
4617 }
4618 if ((r3 & 4) != 0) {
4619 assign(b1, unop(Iop_8Uto32, get_gpr_b1(r1)));
4620 assign(c1, unop(Iop_8Uto32, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr),
4621 mkU64(n)))));
4622 n = n + 1;
4623 } else {
4624 assign(b1, mkU32(0));
4625 assign(c1, mkU32(0));
4626 }
4627 if ((r3 & 2) != 0) {
4628 assign(b2, unop(Iop_8Uto32, get_gpr_b2(r1)));
4629 assign(c2, unop(Iop_8Uto32, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr),
4630 mkU64(n)))));
4631 n = n + 1;
4632 } else {
4633 assign(b2, mkU32(0));
4634 assign(c2, mkU32(0));
4635 }
4636 if ((r3 & 1) != 0) {
4637 assign(b3, unop(Iop_8Uto32, get_gpr_b3(r1)));
4638 assign(c3, unop(Iop_8Uto32, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr),
4639 mkU64(n)))));
4640 n = n + 1;
4641 } else {
4642 assign(b3, mkU32(0));
4643 assign(c3, mkU32(0));
4644 }
4645 assign(op1, binop(Iop_Or32, binop(Iop_Or32, binop(Iop_Or32, binop(Iop_Shl32,
4646 mkexpr(b0), mkU8(24)), binop(Iop_Shl32, mkexpr(b1), mkU8(16))),
4647 binop(Iop_Shl32, mkexpr(b2), mkU8(8))), mkexpr(b3)));
4648 assign(op2, binop(Iop_Or32, binop(Iop_Or32, binop(Iop_Or32, binop(Iop_Shl32,
4649 mkexpr(c0), mkU8(24)), binop(Iop_Shl32, mkexpr(c1), mkU8(16))),
4650 binop(Iop_Shl32, mkexpr(c2), mkU8(8))), mkexpr(c3)));
4651 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
4652
4653 return "clmh";
4654}
4655
4656static HChar *
4657s390_irgen_CLHHR(UChar r1, UChar r2)
4658{
4659 IRTemp op1 = newTemp(Ity_I32);
4660 IRTemp op2 = newTemp(Ity_I32);
4661
4662 assign(op1, get_gpr_w0(r1));
4663 assign(op2, get_gpr_w0(r2));
4664 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
4665
4666 return "clhhr";
4667}
4668
4669static HChar *
4670s390_irgen_CLHLR(UChar r1, UChar r2)
4671{
4672 IRTemp op1 = newTemp(Ity_I32);
4673 IRTemp op2 = newTemp(Ity_I32);
4674
4675 assign(op1, get_gpr_w0(r1));
4676 assign(op2, get_gpr_w1(r2));
4677 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
4678
4679 return "clhlr";
4680}
4681
4682static HChar *
4683s390_irgen_CLHF(UChar r1, IRTemp op2addr)
4684{
4685 IRTemp op1 = newTemp(Ity_I32);
4686 IRTemp op2 = newTemp(Ity_I32);
4687
4688 assign(op1, get_gpr_w0(r1));
4689 assign(op2, load(Ity_I32, mkexpr(op2addr)));
4690 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
4691
4692 return "clhf";
4693}
4694
4695static HChar *
4696s390_irgen_CLIH(UChar r1, UInt i2)
4697{
4698 IRTemp op1 = newTemp(Ity_I32);
4699 UInt op2;
4700
4701 assign(op1, get_gpr_w0(r1));
4702 op2 = i2;
4703 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, mktemp(Ity_I32,
4704 mkU32(op2)));
4705
4706 return "clih";
4707}
4708
4709static HChar *
4710s390_irgen_CPYA(UChar r1, UChar r2)
4711{
4712 put_ar_w0(r1, get_ar_w0(r2));
sewardj7ee97522011-05-09 21:45:04 +00004713 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00004714 s390_disasm(ENC3(MNM, AR, AR), "cpya", r1, r2);
4715
4716 return "cpya";
4717}
4718
4719static HChar *
4720s390_irgen_XR(UChar r1, UChar r2)
4721{
4722 IRTemp op1 = newTemp(Ity_I32);
4723 IRTemp op2 = newTemp(Ity_I32);
4724 IRTemp result = newTemp(Ity_I32);
4725
4726 if (r1 == r2) {
4727 assign(result, mkU32(0));
4728 } else {
4729 assign(op1, get_gpr_w1(r1));
4730 assign(op2, get_gpr_w1(r2));
4731 assign(result, binop(Iop_Xor32, mkexpr(op1), mkexpr(op2)));
4732 }
4733 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
4734 put_gpr_w1(r1, mkexpr(result));
4735
4736 return "xr";
4737}
4738
4739static HChar *
4740s390_irgen_XGR(UChar r1, UChar r2)
4741{
4742 IRTemp op1 = newTemp(Ity_I64);
4743 IRTemp op2 = newTemp(Ity_I64);
4744 IRTemp result = newTemp(Ity_I64);
4745
4746 if (r1 == r2) {
4747 assign(result, mkU64(0));
4748 } else {
4749 assign(op1, get_gpr_dw0(r1));
4750 assign(op2, get_gpr_dw0(r2));
4751 assign(result, binop(Iop_Xor64, mkexpr(op1), mkexpr(op2)));
4752 }
4753 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
4754 put_gpr_dw0(r1, mkexpr(result));
4755
4756 return "xgr";
4757}
4758
4759static HChar *
4760s390_irgen_XRK(UChar r3, UChar r1, UChar r2)
4761{
4762 IRTemp op2 = newTemp(Ity_I32);
4763 IRTemp op3 = newTemp(Ity_I32);
4764 IRTemp result = newTemp(Ity_I32);
4765
4766 assign(op2, get_gpr_w1(r2));
4767 assign(op3, get_gpr_w1(r3));
4768 assign(result, binop(Iop_Xor32, mkexpr(op2), mkexpr(op3)));
4769 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
4770 put_gpr_w1(r1, mkexpr(result));
4771
4772 return "xrk";
4773}
4774
4775static HChar *
4776s390_irgen_XGRK(UChar r3, UChar r1, UChar r2)
4777{
4778 IRTemp op2 = newTemp(Ity_I64);
4779 IRTemp op3 = newTemp(Ity_I64);
4780 IRTemp result = newTemp(Ity_I64);
4781
4782 assign(op2, get_gpr_dw0(r2));
4783 assign(op3, get_gpr_dw0(r3));
4784 assign(result, binop(Iop_Xor64, mkexpr(op2), mkexpr(op3)));
4785 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
4786 put_gpr_dw0(r1, mkexpr(result));
4787
4788 return "xgrk";
4789}
4790
4791static HChar *
4792s390_irgen_X(UChar r1, IRTemp op2addr)
4793{
4794 IRTemp op1 = newTemp(Ity_I32);
4795 IRTemp op2 = newTemp(Ity_I32);
4796 IRTemp result = newTemp(Ity_I32);
4797
4798 assign(op1, get_gpr_w1(r1));
4799 assign(op2, load(Ity_I32, mkexpr(op2addr)));
4800 assign(result, binop(Iop_Xor32, mkexpr(op1), mkexpr(op2)));
4801 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
4802 put_gpr_w1(r1, mkexpr(result));
4803
4804 return "x";
4805}
4806
4807static HChar *
4808s390_irgen_XY(UChar r1, IRTemp op2addr)
4809{
4810 IRTemp op1 = newTemp(Ity_I32);
4811 IRTemp op2 = newTemp(Ity_I32);
4812 IRTemp result = newTemp(Ity_I32);
4813
4814 assign(op1, get_gpr_w1(r1));
4815 assign(op2, load(Ity_I32, mkexpr(op2addr)));
4816 assign(result, binop(Iop_Xor32, mkexpr(op1), mkexpr(op2)));
4817 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
4818 put_gpr_w1(r1, mkexpr(result));
4819
4820 return "xy";
4821}
4822
4823static HChar *
4824s390_irgen_XG(UChar r1, IRTemp op2addr)
4825{
4826 IRTemp op1 = newTemp(Ity_I64);
4827 IRTemp op2 = newTemp(Ity_I64);
4828 IRTemp result = newTemp(Ity_I64);
4829
4830 assign(op1, get_gpr_dw0(r1));
4831 assign(op2, load(Ity_I64, mkexpr(op2addr)));
4832 assign(result, binop(Iop_Xor64, mkexpr(op1), mkexpr(op2)));
4833 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
4834 put_gpr_dw0(r1, mkexpr(result));
4835
4836 return "xg";
4837}
4838
4839static HChar *
4840s390_irgen_XI(UChar i2, IRTemp op1addr)
4841{
4842 IRTemp op1 = newTemp(Ity_I8);
4843 UChar op2;
4844 IRTemp result = newTemp(Ity_I8);
4845
4846 assign(op1, load(Ity_I8, mkexpr(op1addr)));
4847 op2 = i2;
4848 assign(result, binop(Iop_Xor8, mkexpr(op1), mkU8(op2)));
4849 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
4850 store(mkexpr(op1addr), mkexpr(result));
4851
4852 return "xi";
4853}
4854
4855static HChar *
4856s390_irgen_XIY(UChar i2, IRTemp op1addr)
4857{
4858 IRTemp op1 = newTemp(Ity_I8);
4859 UChar op2;
4860 IRTemp result = newTemp(Ity_I8);
4861
4862 assign(op1, load(Ity_I8, mkexpr(op1addr)));
4863 op2 = i2;
4864 assign(result, binop(Iop_Xor8, mkexpr(op1), mkU8(op2)));
4865 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
4866 store(mkexpr(op1addr), mkexpr(result));
4867
4868 return "xiy";
4869}
4870
4871static HChar *
4872s390_irgen_XIHF(UChar r1, UInt i2)
4873{
4874 IRTemp op1 = newTemp(Ity_I32);
4875 UInt op2;
4876 IRTemp result = newTemp(Ity_I32);
4877
4878 assign(op1, get_gpr_w0(r1));
4879 op2 = i2;
4880 assign(result, binop(Iop_Xor32, mkexpr(op1), mkU32(op2)));
4881 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
4882 put_gpr_w0(r1, mkexpr(result));
4883
4884 return "xihf";
4885}
4886
4887static HChar *
4888s390_irgen_XILF(UChar r1, UInt i2)
4889{
4890 IRTemp op1 = newTemp(Ity_I32);
4891 UInt op2;
4892 IRTemp result = newTemp(Ity_I32);
4893
4894 assign(op1, get_gpr_w1(r1));
4895 op2 = i2;
4896 assign(result, binop(Iop_Xor32, mkexpr(op1), mkU32(op2)));
4897 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
4898 put_gpr_w1(r1, mkexpr(result));
4899
4900 return "xilf";
4901}
4902
4903static HChar *
4904s390_irgen_EAR(UChar r1, UChar r2)
4905{
4906 put_gpr_w1(r1, get_ar_w0(r2));
sewardj7ee97522011-05-09 21:45:04 +00004907 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00004908 s390_disasm(ENC3(MNM, GPR, AR), "ear", r1, r2);
4909
4910 return "ear";
4911}
4912
4913static HChar *
4914s390_irgen_IC(UChar r1, IRTemp op2addr)
4915{
4916 put_gpr_b7(r1, load(Ity_I8, mkexpr(op2addr)));
4917
4918 return "ic";
4919}
4920
4921static HChar *
4922s390_irgen_ICY(UChar r1, IRTemp op2addr)
4923{
4924 put_gpr_b7(r1, load(Ity_I8, mkexpr(op2addr)));
4925
4926 return "icy";
4927}
4928
4929static HChar *
4930s390_irgen_ICM(UChar r1, UChar r3, IRTemp op2addr)
4931{
4932 UChar n;
4933 IRTemp result = newTemp(Ity_I32);
4934 UInt mask;
4935
4936 n = 0;
4937 mask = (UInt)r3;
4938 if ((mask & 8) != 0) {
4939 put_gpr_b4(r1, load(Ity_I8, mkexpr(op2addr)));
4940 n = n + 1;
4941 }
4942 if ((mask & 4) != 0) {
4943 put_gpr_b5(r1, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr), mkU64(n))));
4944
4945 n = n + 1;
4946 }
4947 if ((mask & 2) != 0) {
4948 put_gpr_b6(r1, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr), mkU64(n))));
4949
4950 n = n + 1;
4951 }
4952 if ((mask & 1) != 0) {
4953 put_gpr_b7(r1, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr), mkU64(n))));
4954
4955 n = n + 1;
4956 }
4957 assign(result, get_gpr_w1(r1));
4958 s390_cc_thunk_putZZ(S390_CC_OP_INSERT_CHAR_MASK_32, result, mktemp(Ity_I32,
4959 mkU32(mask)));
4960
4961 return "icm";
4962}
4963
4964static HChar *
4965s390_irgen_ICMY(UChar r1, UChar r3, IRTemp op2addr)
4966{
4967 UChar n;
4968 IRTemp result = newTemp(Ity_I32);
4969 UInt mask;
4970
4971 n = 0;
4972 mask = (UInt)r3;
4973 if ((mask & 8) != 0) {
4974 put_gpr_b4(r1, load(Ity_I8, mkexpr(op2addr)));
4975 n = n + 1;
4976 }
4977 if ((mask & 4) != 0) {
4978 put_gpr_b5(r1, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr), mkU64(n))));
4979
4980 n = n + 1;
4981 }
4982 if ((mask & 2) != 0) {
4983 put_gpr_b6(r1, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr), mkU64(n))));
4984
4985 n = n + 1;
4986 }
4987 if ((mask & 1) != 0) {
4988 put_gpr_b7(r1, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr), mkU64(n))));
4989
4990 n = n + 1;
4991 }
4992 assign(result, get_gpr_w1(r1));
4993 s390_cc_thunk_putZZ(S390_CC_OP_INSERT_CHAR_MASK_32, result, mktemp(Ity_I32,
4994 mkU32(mask)));
4995
4996 return "icmy";
4997}
4998
4999static HChar *
5000s390_irgen_ICMH(UChar r1, UChar r3, IRTemp op2addr)
5001{
5002 UChar n;
5003 IRTemp result = newTemp(Ity_I32);
5004 UInt mask;
5005
5006 n = 0;
5007 mask = (UInt)r3;
5008 if ((mask & 8) != 0) {
5009 put_gpr_b0(r1, load(Ity_I8, mkexpr(op2addr)));
5010 n = n + 1;
5011 }
5012 if ((mask & 4) != 0) {
5013 put_gpr_b1(r1, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr), mkU64(n))));
5014
5015 n = n + 1;
5016 }
5017 if ((mask & 2) != 0) {
5018 put_gpr_b2(r1, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr), mkU64(n))));
5019
5020 n = n + 1;
5021 }
5022 if ((mask & 1) != 0) {
5023 put_gpr_b3(r1, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr), mkU64(n))));
5024
5025 n = n + 1;
5026 }
5027 assign(result, get_gpr_w0(r1));
5028 s390_cc_thunk_putZZ(S390_CC_OP_INSERT_CHAR_MASK_32, result, mktemp(Ity_I32,
5029 mkU32(mask)));
5030
5031 return "icmh";
5032}
5033
5034static HChar *
5035s390_irgen_IIHF(UChar r1, UInt i2)
5036{
5037 put_gpr_w0(r1, mkU32(i2));
5038
5039 return "iihf";
5040}
5041
5042static HChar *
5043s390_irgen_IIHH(UChar r1, UShort i2)
5044{
5045 put_gpr_hw0(r1, mkU16(i2));
5046
5047 return "iihh";
5048}
5049
5050static HChar *
5051s390_irgen_IIHL(UChar r1, UShort i2)
5052{
5053 put_gpr_hw1(r1, mkU16(i2));
5054
5055 return "iihl";
5056}
5057
5058static HChar *
5059s390_irgen_IILF(UChar r1, UInt i2)
5060{
5061 put_gpr_w1(r1, mkU32(i2));
5062
5063 return "iilf";
5064}
5065
5066static HChar *
5067s390_irgen_IILH(UChar r1, UShort i2)
5068{
5069 put_gpr_hw2(r1, mkU16(i2));
5070
5071 return "iilh";
5072}
5073
5074static HChar *
5075s390_irgen_IILL(UChar r1, UShort i2)
5076{
5077 put_gpr_hw3(r1, mkU16(i2));
5078
5079 return "iill";
5080}
5081
5082static HChar *
5083s390_irgen_LR(UChar r1, UChar r2)
5084{
5085 put_gpr_w1(r1, get_gpr_w1(r2));
5086
5087 return "lr";
5088}
5089
5090static HChar *
5091s390_irgen_LGR(UChar r1, UChar r2)
5092{
5093 put_gpr_dw0(r1, get_gpr_dw0(r2));
5094
5095 return "lgr";
5096}
5097
5098static HChar *
5099s390_irgen_LGFR(UChar r1, UChar r2)
5100{
5101 put_gpr_dw0(r1, unop(Iop_32Sto64, get_gpr_w1(r2)));
5102
5103 return "lgfr";
5104}
5105
5106static HChar *
5107s390_irgen_L(UChar r1, IRTemp op2addr)
5108{
5109 put_gpr_w1(r1, load(Ity_I32, mkexpr(op2addr)));
5110
5111 return "l";
5112}
5113
5114static HChar *
5115s390_irgen_LY(UChar r1, IRTemp op2addr)
5116{
5117 put_gpr_w1(r1, load(Ity_I32, mkexpr(op2addr)));
5118
5119 return "ly";
5120}
5121
5122static HChar *
5123s390_irgen_LG(UChar r1, IRTemp op2addr)
5124{
5125 put_gpr_dw0(r1, load(Ity_I64, mkexpr(op2addr)));
5126
5127 return "lg";
5128}
5129
5130static HChar *
5131s390_irgen_LGF(UChar r1, IRTemp op2addr)
5132{
5133 put_gpr_dw0(r1, unop(Iop_32Sto64, load(Ity_I32, mkexpr(op2addr))));
5134
5135 return "lgf";
5136}
5137
5138static HChar *
5139s390_irgen_LGFI(UChar r1, UInt i2)
5140{
5141 put_gpr_dw0(r1, mkU64((ULong)(Long)(Int)i2));
5142
5143 return "lgfi";
5144}
5145
5146static HChar *
5147s390_irgen_LRL(UChar r1, UInt i2)
5148{
5149 put_gpr_w1(r1, load(Ity_I32, mkU64(guest_IA_curr_instr + ((ULong)(Long)(Int)
5150 i2 << 1))));
5151
5152 return "lrl";
5153}
5154
5155static HChar *
5156s390_irgen_LGRL(UChar r1, UInt i2)
5157{
5158 put_gpr_dw0(r1, load(Ity_I64, mkU64(guest_IA_curr_instr + ((ULong)(Long)(Int)
5159 i2 << 1))));
5160
5161 return "lgrl";
5162}
5163
5164static HChar *
5165s390_irgen_LGFRL(UChar r1, UInt i2)
5166{
5167 put_gpr_dw0(r1, unop(Iop_32Sto64, load(Ity_I32, mkU64(guest_IA_curr_instr +
5168 ((ULong)(Long)(Int)i2 << 1)))));
5169
5170 return "lgfrl";
5171}
5172
5173static HChar *
5174s390_irgen_LA(UChar r1, IRTemp op2addr)
5175{
5176 put_gpr_dw0(r1, mkexpr(op2addr));
5177
5178 return "la";
5179}
5180
5181static HChar *
5182s390_irgen_LAY(UChar r1, IRTemp op2addr)
5183{
5184 put_gpr_dw0(r1, mkexpr(op2addr));
5185
5186 return "lay";
5187}
5188
5189static HChar *
5190s390_irgen_LAE(UChar r1, IRTemp op2addr)
5191{
5192 put_gpr_dw0(r1, mkexpr(op2addr));
5193
5194 return "lae";
5195}
5196
5197static HChar *
5198s390_irgen_LAEY(UChar r1, IRTemp op2addr)
5199{
5200 put_gpr_dw0(r1, mkexpr(op2addr));
5201
5202 return "laey";
5203}
5204
5205static HChar *
5206s390_irgen_LARL(UChar r1, UInt i2)
5207{
5208 put_gpr_dw0(r1, mkU64(guest_IA_curr_instr + ((ULong)(Long)(Int)i2 << 1)));
5209
5210 return "larl";
5211}
5212
5213static HChar *
5214s390_irgen_LAA(UChar r1, UChar r3, IRTemp op2addr)
5215{
5216 IRTemp op2 = newTemp(Ity_I32);
5217 IRTemp op3 = newTemp(Ity_I32);
5218 IRTemp result = newTemp(Ity_I32);
5219
5220 assign(op2, load(Ity_I32, mkexpr(op2addr)));
5221 assign(op3, get_gpr_w1(r3));
5222 assign(result, binop(Iop_Add32, mkexpr(op2), mkexpr(op3)));
5223 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_32, op2, op3);
5224 store(mkexpr(op2addr), mkexpr(result));
5225 put_gpr_w1(r1, mkexpr(op2));
5226
5227 return "laa";
5228}
5229
5230static HChar *
5231s390_irgen_LAAG(UChar r1, UChar r3, IRTemp op2addr)
5232{
5233 IRTemp op2 = newTemp(Ity_I64);
5234 IRTemp op3 = newTemp(Ity_I64);
5235 IRTemp result = newTemp(Ity_I64);
5236
5237 assign(op2, load(Ity_I64, mkexpr(op2addr)));
5238 assign(op3, get_gpr_dw0(r3));
5239 assign(result, binop(Iop_Add64, mkexpr(op2), mkexpr(op3)));
5240 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_64, op2, op3);
5241 store(mkexpr(op2addr), mkexpr(result));
5242 put_gpr_dw0(r1, mkexpr(op2));
5243
5244 return "laag";
5245}
5246
5247static HChar *
5248s390_irgen_LAAL(UChar r1, UChar r3, IRTemp op2addr)
5249{
5250 IRTemp op2 = newTemp(Ity_I32);
5251 IRTemp op3 = newTemp(Ity_I32);
5252 IRTemp result = newTemp(Ity_I32);
5253
5254 assign(op2, load(Ity_I32, mkexpr(op2addr)));
5255 assign(op3, get_gpr_w1(r3));
5256 assign(result, binop(Iop_Add32, mkexpr(op2), mkexpr(op3)));
5257 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_32, op2, op3);
5258 store(mkexpr(op2addr), mkexpr(result));
5259 put_gpr_w1(r1, mkexpr(op2));
5260
5261 return "laal";
5262}
5263
5264static HChar *
5265s390_irgen_LAALG(UChar r1, UChar r3, IRTemp op2addr)
5266{
5267 IRTemp op2 = newTemp(Ity_I64);
5268 IRTemp op3 = newTemp(Ity_I64);
5269 IRTemp result = newTemp(Ity_I64);
5270
5271 assign(op2, load(Ity_I64, mkexpr(op2addr)));
5272 assign(op3, get_gpr_dw0(r3));
5273 assign(result, binop(Iop_Add64, mkexpr(op2), mkexpr(op3)));
5274 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_64, op2, op3);
5275 store(mkexpr(op2addr), mkexpr(result));
5276 put_gpr_dw0(r1, mkexpr(op2));
5277
5278 return "laalg";
5279}
5280
5281static HChar *
5282s390_irgen_LAN(UChar r1, UChar r3, IRTemp op2addr)
5283{
5284 IRTemp op2 = newTemp(Ity_I32);
5285 IRTemp op3 = newTemp(Ity_I32);
5286 IRTemp result = newTemp(Ity_I32);
5287
5288 assign(op2, load(Ity_I32, mkexpr(op2addr)));
5289 assign(op3, get_gpr_w1(r3));
5290 assign(result, binop(Iop_And32, mkexpr(op2), mkexpr(op3)));
5291 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
5292 store(mkexpr(op2addr), mkexpr(result));
5293 put_gpr_w1(r1, mkexpr(op2));
5294
5295 return "lan";
5296}
5297
5298static HChar *
5299s390_irgen_LANG(UChar r1, UChar r3, IRTemp op2addr)
5300{
5301 IRTemp op2 = newTemp(Ity_I64);
5302 IRTemp op3 = newTemp(Ity_I64);
5303 IRTemp result = newTemp(Ity_I64);
5304
5305 assign(op2, load(Ity_I64, mkexpr(op2addr)));
5306 assign(op3, get_gpr_dw0(r3));
5307 assign(result, binop(Iop_And64, mkexpr(op2), mkexpr(op3)));
5308 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
5309 store(mkexpr(op2addr), mkexpr(result));
5310 put_gpr_dw0(r1, mkexpr(op2));
5311
5312 return "lang";
5313}
5314
5315static HChar *
5316s390_irgen_LAX(UChar r1, UChar r3, IRTemp op2addr)
5317{
5318 IRTemp op2 = newTemp(Ity_I32);
5319 IRTemp op3 = newTemp(Ity_I32);
5320 IRTemp result = newTemp(Ity_I32);
5321
5322 assign(op2, load(Ity_I32, mkexpr(op2addr)));
5323 assign(op3, get_gpr_w1(r3));
5324 assign(result, binop(Iop_Xor32, mkexpr(op2), mkexpr(op3)));
5325 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
5326 store(mkexpr(op2addr), mkexpr(result));
5327 put_gpr_w1(r1, mkexpr(op2));
5328
5329 return "lax";
5330}
5331
5332static HChar *
5333s390_irgen_LAXG(UChar r1, UChar r3, IRTemp op2addr)
5334{
5335 IRTemp op2 = newTemp(Ity_I64);
5336 IRTemp op3 = newTemp(Ity_I64);
5337 IRTemp result = newTemp(Ity_I64);
5338
5339 assign(op2, load(Ity_I64, mkexpr(op2addr)));
5340 assign(op3, get_gpr_dw0(r3));
5341 assign(result, binop(Iop_Xor64, mkexpr(op2), mkexpr(op3)));
5342 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
5343 store(mkexpr(op2addr), mkexpr(result));
5344 put_gpr_dw0(r1, mkexpr(op2));
5345
5346 return "laxg";
5347}
5348
5349static HChar *
5350s390_irgen_LAO(UChar r1, UChar r3, IRTemp op2addr)
5351{
5352 IRTemp op2 = newTemp(Ity_I32);
5353 IRTemp op3 = newTemp(Ity_I32);
5354 IRTemp result = newTemp(Ity_I32);
5355
5356 assign(op2, load(Ity_I32, mkexpr(op2addr)));
5357 assign(op3, get_gpr_w1(r3));
5358 assign(result, binop(Iop_Or32, mkexpr(op2), mkexpr(op3)));
5359 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
5360 store(mkexpr(op2addr), mkexpr(result));
5361 put_gpr_w1(r1, mkexpr(op2));
5362
5363 return "lao";
5364}
5365
5366static HChar *
5367s390_irgen_LAOG(UChar r1, UChar r3, IRTemp op2addr)
5368{
5369 IRTemp op2 = newTemp(Ity_I64);
5370 IRTemp op3 = newTemp(Ity_I64);
5371 IRTemp result = newTemp(Ity_I64);
5372
5373 assign(op2, load(Ity_I64, mkexpr(op2addr)));
5374 assign(op3, get_gpr_dw0(r3));
5375 assign(result, binop(Iop_Or64, mkexpr(op2), mkexpr(op3)));
5376 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
5377 store(mkexpr(op2addr), mkexpr(result));
5378 put_gpr_dw0(r1, mkexpr(op2));
5379
5380 return "laog";
5381}
5382
5383static HChar *
5384s390_irgen_LTR(UChar r1, UChar r2)
5385{
5386 IRTemp op2 = newTemp(Ity_I32);
5387
5388 assign(op2, get_gpr_w1(r2));
5389 put_gpr_w1(r1, mkexpr(op2));
5390 s390_cc_thunk_putS(S390_CC_OP_LOAD_AND_TEST, op2);
5391
5392 return "ltr";
5393}
5394
5395static HChar *
5396s390_irgen_LTGR(UChar r1, UChar r2)
5397{
5398 IRTemp op2 = newTemp(Ity_I64);
5399
5400 assign(op2, get_gpr_dw0(r2));
5401 put_gpr_dw0(r1, mkexpr(op2));
5402 s390_cc_thunk_putS(S390_CC_OP_LOAD_AND_TEST, op2);
5403
5404 return "ltgr";
5405}
5406
5407static HChar *
5408s390_irgen_LTGFR(UChar r1, UChar r2)
5409{
5410 IRTemp op2 = newTemp(Ity_I64);
5411
5412 assign(op2, unop(Iop_32Sto64, get_gpr_w1(r2)));
5413 put_gpr_dw0(r1, mkexpr(op2));
5414 s390_cc_thunk_putS(S390_CC_OP_LOAD_AND_TEST, op2);
5415
5416 return "ltgfr";
5417}
5418
5419static HChar *
5420s390_irgen_LT(UChar r1, IRTemp op2addr)
5421{
5422 IRTemp op2 = newTemp(Ity_I32);
5423
5424 assign(op2, load(Ity_I32, mkexpr(op2addr)));
5425 put_gpr_w1(r1, mkexpr(op2));
5426 s390_cc_thunk_putS(S390_CC_OP_LOAD_AND_TEST, op2);
5427
5428 return "lt";
5429}
5430
5431static HChar *
5432s390_irgen_LTG(UChar r1, IRTemp op2addr)
5433{
5434 IRTemp op2 = newTemp(Ity_I64);
5435
5436 assign(op2, load(Ity_I64, mkexpr(op2addr)));
5437 put_gpr_dw0(r1, mkexpr(op2));
5438 s390_cc_thunk_putS(S390_CC_OP_LOAD_AND_TEST, op2);
5439
5440 return "ltg";
5441}
5442
5443static HChar *
5444s390_irgen_LTGF(UChar r1, IRTemp op2addr)
5445{
5446 IRTemp op2 = newTemp(Ity_I64);
5447
5448 assign(op2, unop(Iop_32Sto64, load(Ity_I32, mkexpr(op2addr))));
5449 put_gpr_dw0(r1, mkexpr(op2));
5450 s390_cc_thunk_putS(S390_CC_OP_LOAD_AND_TEST, op2);
5451
5452 return "ltgf";
5453}
5454
5455static HChar *
5456s390_irgen_LBR(UChar r1, UChar r2)
5457{
5458 put_gpr_w1(r1, unop(Iop_8Sto32, get_gpr_b7(r2)));
5459
5460 return "lbr";
5461}
5462
5463static HChar *
5464s390_irgen_LGBR(UChar r1, UChar r2)
5465{
5466 put_gpr_dw0(r1, unop(Iop_8Sto64, get_gpr_b7(r2)));
5467
5468 return "lgbr";
5469}
5470
5471static HChar *
5472s390_irgen_LB(UChar r1, IRTemp op2addr)
5473{
5474 put_gpr_w1(r1, unop(Iop_8Sto32, load(Ity_I8, mkexpr(op2addr))));
5475
5476 return "lb";
5477}
5478
5479static HChar *
5480s390_irgen_LGB(UChar r1, IRTemp op2addr)
5481{
5482 put_gpr_dw0(r1, unop(Iop_8Sto64, load(Ity_I8, mkexpr(op2addr))));
5483
5484 return "lgb";
5485}
5486
5487static HChar *
5488s390_irgen_LBH(UChar r1, IRTemp op2addr)
5489{
5490 put_gpr_w0(r1, unop(Iop_8Sto32, load(Ity_I8, mkexpr(op2addr))));
5491
5492 return "lbh";
5493}
5494
5495static HChar *
5496s390_irgen_LCR(UChar r1, UChar r2)
5497{
5498 Int op1;
5499 IRTemp op2 = newTemp(Ity_I32);
5500 IRTemp result = newTemp(Ity_I32);
5501
5502 op1 = 0;
5503 assign(op2, get_gpr_w1(r2));
5504 assign(result, binop(Iop_Sub32, mkU32((UInt)op1), mkexpr(op2)));
5505 put_gpr_w1(r1, mkexpr(result));
5506 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_32, mktemp(Ity_I32, mkU32((UInt)
5507 op1)), op2);
5508
5509 return "lcr";
5510}
5511
5512static HChar *
5513s390_irgen_LCGR(UChar r1, UChar r2)
5514{
5515 Long op1;
5516 IRTemp op2 = newTemp(Ity_I64);
5517 IRTemp result = newTemp(Ity_I64);
5518
5519 op1 = 0ULL;
5520 assign(op2, get_gpr_dw0(r2));
5521 assign(result, binop(Iop_Sub64, mkU64((ULong)op1), mkexpr(op2)));
5522 put_gpr_dw0(r1, mkexpr(result));
5523 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_64, mktemp(Ity_I64, mkU64((ULong)
5524 op1)), op2);
5525
5526 return "lcgr";
5527}
5528
5529static HChar *
5530s390_irgen_LCGFR(UChar r1, UChar r2)
5531{
5532 Long op1;
5533 IRTemp op2 = newTemp(Ity_I64);
5534 IRTemp result = newTemp(Ity_I64);
5535
5536 op1 = 0ULL;
5537 assign(op2, unop(Iop_32Sto64, get_gpr_w1(r2)));
5538 assign(result, binop(Iop_Sub64, mkU64((ULong)op1), mkexpr(op2)));
5539 put_gpr_dw0(r1, mkexpr(result));
5540 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_64, mktemp(Ity_I64, mkU64((ULong)
5541 op1)), op2);
5542
5543 return "lcgfr";
5544}
5545
5546static HChar *
5547s390_irgen_LHR(UChar r1, UChar r2)
5548{
5549 put_gpr_w1(r1, unop(Iop_16Sto32, get_gpr_hw3(r2)));
5550
5551 return "lhr";
5552}
5553
5554static HChar *
5555s390_irgen_LGHR(UChar r1, UChar r2)
5556{
5557 put_gpr_dw0(r1, unop(Iop_16Sto64, get_gpr_hw3(r2)));
5558
5559 return "lghr";
5560}
5561
5562static HChar *
5563s390_irgen_LH(UChar r1, IRTemp op2addr)
5564{
5565 put_gpr_w1(r1, unop(Iop_16Sto32, load(Ity_I16, mkexpr(op2addr))));
5566
5567 return "lh";
5568}
5569
5570static HChar *
5571s390_irgen_LHY(UChar r1, IRTemp op2addr)
5572{
5573 put_gpr_w1(r1, unop(Iop_16Sto32, load(Ity_I16, mkexpr(op2addr))));
5574
5575 return "lhy";
5576}
5577
5578static HChar *
5579s390_irgen_LGH(UChar r1, IRTemp op2addr)
5580{
5581 put_gpr_dw0(r1, unop(Iop_16Sto64, load(Ity_I16, mkexpr(op2addr))));
5582
5583 return "lgh";
5584}
5585
5586static HChar *
5587s390_irgen_LHI(UChar r1, UShort i2)
5588{
5589 put_gpr_w1(r1, mkU32((UInt)(Int)(Short)i2));
5590
5591 return "lhi";
5592}
5593
5594static HChar *
5595s390_irgen_LGHI(UChar r1, UShort i2)
5596{
5597 put_gpr_dw0(r1, mkU64((ULong)(Long)(Short)i2));
5598
5599 return "lghi";
5600}
5601
5602static HChar *
5603s390_irgen_LHRL(UChar r1, UInt i2)
5604{
5605 put_gpr_w1(r1, unop(Iop_16Sto32, load(Ity_I16, mkU64(guest_IA_curr_instr +
5606 ((ULong)(Long)(Int)i2 << 1)))));
5607
5608 return "lhrl";
5609}
5610
5611static HChar *
5612s390_irgen_LGHRL(UChar r1, UInt i2)
5613{
5614 put_gpr_dw0(r1, unop(Iop_16Sto64, load(Ity_I16, mkU64(guest_IA_curr_instr +
5615 ((ULong)(Long)(Int)i2 << 1)))));
5616
5617 return "lghrl";
5618}
5619
5620static HChar *
5621s390_irgen_LHH(UChar r1, IRTemp op2addr)
5622{
5623 put_gpr_w0(r1, unop(Iop_16Sto32, load(Ity_I16, mkexpr(op2addr))));
5624
5625 return "lhh";
5626}
5627
5628static HChar *
5629s390_irgen_LFH(UChar r1, IRTemp op2addr)
5630{
5631 put_gpr_w0(r1, load(Ity_I32, mkexpr(op2addr)));
5632
5633 return "lfh";
5634}
5635
5636static HChar *
5637s390_irgen_LLGFR(UChar r1, UChar r2)
5638{
5639 put_gpr_dw0(r1, unop(Iop_32Uto64, get_gpr_w1(r2)));
5640
5641 return "llgfr";
5642}
5643
5644static HChar *
5645s390_irgen_LLGF(UChar r1, IRTemp op2addr)
5646{
5647 put_gpr_dw0(r1, unop(Iop_32Uto64, load(Ity_I32, mkexpr(op2addr))));
5648
5649 return "llgf";
5650}
5651
5652static HChar *
5653s390_irgen_LLGFRL(UChar r1, UInt i2)
5654{
5655 put_gpr_dw0(r1, unop(Iop_32Uto64, load(Ity_I32, mkU64(guest_IA_curr_instr +
5656 ((ULong)(Long)(Int)i2 << 1)))));
5657
5658 return "llgfrl";
5659}
5660
5661static HChar *
5662s390_irgen_LLCR(UChar r1, UChar r2)
5663{
5664 put_gpr_w1(r1, unop(Iop_8Uto32, get_gpr_b7(r2)));
5665
5666 return "llcr";
5667}
5668
5669static HChar *
5670s390_irgen_LLGCR(UChar r1, UChar r2)
5671{
5672 put_gpr_dw0(r1, unop(Iop_8Uto64, get_gpr_b7(r2)));
5673
5674 return "llgcr";
5675}
5676
5677static HChar *
5678s390_irgen_LLC(UChar r1, IRTemp op2addr)
5679{
5680 put_gpr_w1(r1, unop(Iop_8Uto32, load(Ity_I8, mkexpr(op2addr))));
5681
5682 return "llc";
5683}
5684
5685static HChar *
5686s390_irgen_LLGC(UChar r1, IRTemp op2addr)
5687{
5688 put_gpr_dw0(r1, unop(Iop_8Uto64, load(Ity_I8, mkexpr(op2addr))));
5689
5690 return "llgc";
5691}
5692
5693static HChar *
5694s390_irgen_LLCH(UChar r1, IRTemp op2addr)
5695{
5696 put_gpr_w0(r1, unop(Iop_8Uto32, load(Ity_I8, mkexpr(op2addr))));
5697
5698 return "llch";
5699}
5700
5701static HChar *
5702s390_irgen_LLHR(UChar r1, UChar r2)
5703{
5704 put_gpr_w1(r1, unop(Iop_16Uto32, get_gpr_hw3(r2)));
5705
5706 return "llhr";
5707}
5708
5709static HChar *
5710s390_irgen_LLGHR(UChar r1, UChar r2)
5711{
5712 put_gpr_dw0(r1, unop(Iop_16Uto64, get_gpr_hw3(r2)));
5713
5714 return "llghr";
5715}
5716
5717static HChar *
5718s390_irgen_LLH(UChar r1, IRTemp op2addr)
5719{
5720 put_gpr_w1(r1, unop(Iop_16Uto32, load(Ity_I16, mkexpr(op2addr))));
5721
5722 return "llh";
5723}
5724
5725static HChar *
5726s390_irgen_LLGH(UChar r1, IRTemp op2addr)
5727{
5728 put_gpr_dw0(r1, unop(Iop_16Uto64, load(Ity_I16, mkexpr(op2addr))));
5729
5730 return "llgh";
5731}
5732
5733static HChar *
5734s390_irgen_LLHRL(UChar r1, UInt i2)
5735{
5736 put_gpr_w1(r1, unop(Iop_16Uto32, load(Ity_I16, mkU64(guest_IA_curr_instr +
5737 ((ULong)(Long)(Int)i2 << 1)))));
5738
5739 return "llhrl";
5740}
5741
5742static HChar *
5743s390_irgen_LLGHRL(UChar r1, UInt i2)
5744{
5745 put_gpr_dw0(r1, unop(Iop_16Uto64, load(Ity_I16, mkU64(guest_IA_curr_instr +
5746 ((ULong)(Long)(Int)i2 << 1)))));
5747
5748 return "llghrl";
5749}
5750
5751static HChar *
5752s390_irgen_LLHH(UChar r1, IRTemp op2addr)
5753{
5754 put_gpr_w0(r1, unop(Iop_16Uto32, load(Ity_I16, mkexpr(op2addr))));
5755
5756 return "llhh";
5757}
5758
5759static HChar *
5760s390_irgen_LLIHF(UChar r1, UInt i2)
5761{
5762 put_gpr_dw0(r1, mkU64(((ULong)i2) << 32));
5763
5764 return "llihf";
5765}
5766
5767static HChar *
5768s390_irgen_LLIHH(UChar r1, UShort i2)
5769{
5770 put_gpr_dw0(r1, mkU64(((ULong)i2) << 48));
5771
5772 return "llihh";
5773}
5774
5775static HChar *
5776s390_irgen_LLIHL(UChar r1, UShort i2)
5777{
5778 put_gpr_dw0(r1, mkU64(((ULong)i2) << 32));
5779
5780 return "llihl";
5781}
5782
5783static HChar *
5784s390_irgen_LLILF(UChar r1, UInt i2)
5785{
5786 put_gpr_dw0(r1, mkU64(i2));
5787
5788 return "llilf";
5789}
5790
5791static HChar *
5792s390_irgen_LLILH(UChar r1, UShort i2)
5793{
5794 put_gpr_dw0(r1, mkU64(((ULong)i2) << 16));
5795
5796 return "llilh";
5797}
5798
5799static HChar *
5800s390_irgen_LLILL(UChar r1, UShort i2)
5801{
5802 put_gpr_dw0(r1, mkU64(i2));
5803
5804 return "llill";
5805}
5806
5807static HChar *
5808s390_irgen_LLGTR(UChar r1, UChar r2)
5809{
5810 put_gpr_dw0(r1, unop(Iop_32Uto64, binop(Iop_And32, get_gpr_w1(r2),
5811 mkU32(2147483647))));
5812
5813 return "llgtr";
5814}
5815
5816static HChar *
5817s390_irgen_LLGT(UChar r1, IRTemp op2addr)
5818{
5819 put_gpr_dw0(r1, unop(Iop_32Uto64, binop(Iop_And32, load(Ity_I32,
5820 mkexpr(op2addr)), mkU32(2147483647))));
5821
5822 return "llgt";
5823}
5824
5825static HChar *
5826s390_irgen_LNR(UChar r1, UChar r2)
5827{
5828 IRTemp op2 = newTemp(Ity_I32);
5829 IRTemp result = newTemp(Ity_I32);
5830
5831 assign(op2, get_gpr_w1(r2));
5832 assign(result, mkite(binop(Iop_CmpLE32S, mkexpr(op2), mkU32(0)), mkexpr(op2),
5833 binop(Iop_Sub32, mkU32(0), mkexpr(op2))));
5834 put_gpr_w1(r1, mkexpr(result));
5835 s390_cc_thunk_putS(S390_CC_OP_BITWISE, result);
5836
5837 return "lnr";
5838}
5839
5840static HChar *
5841s390_irgen_LNGR(UChar r1, UChar r2)
5842{
5843 IRTemp op2 = newTemp(Ity_I64);
5844 IRTemp result = newTemp(Ity_I64);
5845
5846 assign(op2, get_gpr_dw0(r2));
5847 assign(result, mkite(binop(Iop_CmpLE64S, mkexpr(op2), mkU64(0)), mkexpr(op2),
5848 binop(Iop_Sub64, mkU64(0), mkexpr(op2))));
5849 put_gpr_dw0(r1, mkexpr(result));
5850 s390_cc_thunk_putS(S390_CC_OP_BITWISE, result);
5851
5852 return "lngr";
5853}
5854
5855static HChar *
5856s390_irgen_LNGFR(UChar r1, UChar r2 __attribute__((unused)))
5857{
5858 IRTemp op2 = newTemp(Ity_I64);
5859 IRTemp result = newTemp(Ity_I64);
5860
5861 assign(op2, unop(Iop_32Sto64, get_gpr_w1(r1)));
5862 assign(result, mkite(binop(Iop_CmpLE64S, mkexpr(op2), mkU64(0)), mkexpr(op2),
5863 binop(Iop_Sub64, mkU64(0), mkexpr(op2))));
5864 put_gpr_dw0(r1, mkexpr(result));
5865 s390_cc_thunk_putS(S390_CC_OP_BITWISE, result);
5866
5867 return "lngfr";
5868}
5869
5870static HChar *
sewardjd7bde722011-04-05 13:19:33 +00005871s390_irgen_LOCR(UChar m3, UChar r1, UChar r2)
5872{
5873 if_condition_goto(binop(Iop_CmpEQ32, s390_call_calculate_cond(m3), mkU32(0)),
5874 guest_IA_next_instr);
5875 put_gpr_w1(r1, get_gpr_w1(r2));
5876
5877 return "locr";
5878}
5879
5880static HChar *
5881s390_irgen_LOCGR(UChar m3, UChar r1, UChar r2)
5882{
5883 if_condition_goto(binop(Iop_CmpEQ32, s390_call_calculate_cond(m3), mkU32(0)),
5884 guest_IA_next_instr);
5885 put_gpr_dw0(r1, get_gpr_dw0(r2));
5886
5887 return "locgr";
5888}
5889
5890static HChar *
5891s390_irgen_LOC(UChar r1, IRTemp op2addr)
5892{
5893 /* condition is checked in format handler */
5894 put_gpr_w1(r1, load(Ity_I32, mkexpr(op2addr)));
5895
5896 return "loc";
5897}
5898
5899static HChar *
5900s390_irgen_LOCG(UChar r1, IRTemp op2addr)
5901{
5902 /* condition is checked in format handler */
5903 put_gpr_dw0(r1, load(Ity_I64, mkexpr(op2addr)));
5904
5905 return "locg";
5906}
5907
5908static HChar *
sewardj2019a972011-03-07 16:04:07 +00005909s390_irgen_LPQ(UChar r1, IRTemp op2addr)
5910{
5911 put_gpr_dw0(r1, load(Ity_I64, mkexpr(op2addr)));
5912 put_gpr_dw0(r1 + 1, load(Ity_I64, binop(Iop_Add64, mkexpr(op2addr), mkU64(8))
5913 ));
5914
5915 return "lpq";
5916}
5917
5918static HChar *
5919s390_irgen_LPR(UChar r1, UChar r2)
5920{
5921 IRTemp op2 = newTemp(Ity_I32);
5922 IRTemp result = newTemp(Ity_I32);
5923
5924 assign(op2, get_gpr_w1(r2));
5925 assign(result, mkite(binop(Iop_CmpLT32S, mkexpr(op2), mkU32(0)),
5926 binop(Iop_Sub32, mkU32(0), mkexpr(op2)), mkexpr(op2)));
5927 put_gpr_w1(r1, mkexpr(result));
5928 s390_cc_thunk_putS(S390_CC_OP_LOAD_POSITIVE_32, op2);
5929
5930 return "lpr";
5931}
5932
5933static HChar *
5934s390_irgen_LPGR(UChar r1, UChar r2)
5935{
5936 IRTemp op2 = newTemp(Ity_I64);
5937 IRTemp result = newTemp(Ity_I64);
5938
5939 assign(op2, get_gpr_dw0(r2));
5940 assign(result, mkite(binop(Iop_CmpLT64S, mkexpr(op2), mkU64(0)),
5941 binop(Iop_Sub64, mkU64(0), mkexpr(op2)), mkexpr(op2)));
5942 put_gpr_dw0(r1, mkexpr(result));
5943 s390_cc_thunk_putS(S390_CC_OP_LOAD_POSITIVE_64, op2);
5944
5945 return "lpgr";
5946}
5947
5948static HChar *
5949s390_irgen_LPGFR(UChar r1, UChar r2)
5950{
5951 IRTemp op2 = newTemp(Ity_I64);
5952 IRTemp result = newTemp(Ity_I64);
5953
5954 assign(op2, unop(Iop_32Sto64, get_gpr_w1(r2)));
5955 assign(result, mkite(binop(Iop_CmpLT64S, mkexpr(op2), mkU64(0)),
5956 binop(Iop_Sub64, mkU64(0), mkexpr(op2)), mkexpr(op2)));
5957 put_gpr_dw0(r1, mkexpr(result));
5958 s390_cc_thunk_putS(S390_CC_OP_LOAD_POSITIVE_64, op2);
5959
5960 return "lpgfr";
5961}
5962
5963static HChar *
5964s390_irgen_LRVR(UChar r1, UChar r2)
5965{
5966 IRTemp b0 = newTemp(Ity_I8);
5967 IRTemp b1 = newTemp(Ity_I8);
5968 IRTemp b2 = newTemp(Ity_I8);
5969 IRTemp b3 = newTemp(Ity_I8);
5970
5971 assign(b3, get_gpr_b7(r2));
5972 assign(b2, get_gpr_b6(r2));
5973 assign(b1, get_gpr_b5(r2));
5974 assign(b0, get_gpr_b4(r2));
5975 put_gpr_b4(r1, mkexpr(b3));
5976 put_gpr_b5(r1, mkexpr(b2));
5977 put_gpr_b6(r1, mkexpr(b1));
5978 put_gpr_b7(r1, mkexpr(b0));
5979
5980 return "lrvr";
5981}
5982
5983static HChar *
5984s390_irgen_LRVGR(UChar r1, UChar r2)
5985{
5986 IRTemp b0 = newTemp(Ity_I8);
5987 IRTemp b1 = newTemp(Ity_I8);
5988 IRTemp b2 = newTemp(Ity_I8);
5989 IRTemp b3 = newTemp(Ity_I8);
5990 IRTemp b4 = newTemp(Ity_I8);
5991 IRTemp b5 = newTemp(Ity_I8);
5992 IRTemp b6 = newTemp(Ity_I8);
5993 IRTemp b7 = newTemp(Ity_I8);
5994
5995 assign(b7, get_gpr_b7(r2));
5996 assign(b6, get_gpr_b6(r2));
5997 assign(b5, get_gpr_b5(r2));
5998 assign(b4, get_gpr_b4(r2));
5999 assign(b3, get_gpr_b3(r2));
6000 assign(b2, get_gpr_b2(r2));
6001 assign(b1, get_gpr_b1(r2));
6002 assign(b0, get_gpr_b0(r2));
6003 put_gpr_b0(r1, mkexpr(b7));
6004 put_gpr_b1(r1, mkexpr(b6));
6005 put_gpr_b2(r1, mkexpr(b5));
6006 put_gpr_b3(r1, mkexpr(b4));
6007 put_gpr_b4(r1, mkexpr(b3));
6008 put_gpr_b5(r1, mkexpr(b2));
6009 put_gpr_b6(r1, mkexpr(b1));
6010 put_gpr_b7(r1, mkexpr(b0));
6011
6012 return "lrvgr";
6013}
6014
6015static HChar *
6016s390_irgen_LRVH(UChar r1, IRTemp op2addr)
6017{
6018 IRTemp op2 = newTemp(Ity_I16);
6019
6020 assign(op2, load(Ity_I16, mkexpr(op2addr)));
6021 put_gpr_b6(r1, unop(Iop_16to8, mkexpr(op2)));
6022 put_gpr_b7(r1, unop(Iop_16HIto8, mkexpr(op2)));
6023
6024 return "lrvh";
6025}
6026
6027static HChar *
6028s390_irgen_LRV(UChar r1, IRTemp op2addr)
6029{
6030 IRTemp op2 = newTemp(Ity_I32);
6031
6032 assign(op2, load(Ity_I32, mkexpr(op2addr)));
6033 put_gpr_b4(r1, unop(Iop_32to8, binop(Iop_And32, mkexpr(op2), mkU32(255))));
6034 put_gpr_b5(r1, unop(Iop_32to8, binop(Iop_And32, binop(Iop_Shr32, mkexpr(op2),
6035 mkU8(8)), mkU32(255))));
6036 put_gpr_b6(r1, unop(Iop_32to8, binop(Iop_And32, binop(Iop_Shr32, mkexpr(op2),
6037 mkU8(16)), mkU32(255))));
6038 put_gpr_b7(r1, unop(Iop_32to8, binop(Iop_And32, binop(Iop_Shr32, mkexpr(op2),
6039 mkU8(24)), mkU32(255))));
6040
6041 return "lrv";
6042}
6043
6044static HChar *
6045s390_irgen_LRVG(UChar r1, IRTemp op2addr)
6046{
6047 IRTemp op2 = newTemp(Ity_I64);
6048
6049 assign(op2, load(Ity_I64, mkexpr(op2addr)));
6050 put_gpr_b0(r1, unop(Iop_64to8, binop(Iop_And64, mkexpr(op2), mkU64(255))));
6051 put_gpr_b1(r1, unop(Iop_64to8, binop(Iop_And64, binop(Iop_Shr64, mkexpr(op2),
6052 mkU8(8)), mkU64(255))));
6053 put_gpr_b2(r1, unop(Iop_64to8, binop(Iop_And64, binop(Iop_Shr64, mkexpr(op2),
6054 mkU8(16)), mkU64(255))));
6055 put_gpr_b3(r1, unop(Iop_64to8, binop(Iop_And64, binop(Iop_Shr64, mkexpr(op2),
6056 mkU8(24)), mkU64(255))));
6057 put_gpr_b4(r1, unop(Iop_64to8, binop(Iop_And64, binop(Iop_Shr64, mkexpr(op2),
6058 mkU8(32)), mkU64(255))));
6059 put_gpr_b5(r1, unop(Iop_64to8, binop(Iop_And64, binop(Iop_Shr64, mkexpr(op2),
6060 mkU8(40)), mkU64(255))));
6061 put_gpr_b6(r1, unop(Iop_64to8, binop(Iop_And64, binop(Iop_Shr64, mkexpr(op2),
6062 mkU8(48)), mkU64(255))));
6063 put_gpr_b7(r1, unop(Iop_64to8, binop(Iop_And64, binop(Iop_Shr64, mkexpr(op2),
6064 mkU8(56)), mkU64(255))));
6065
6066 return "lrvg";
6067}
6068
6069static HChar *
6070s390_irgen_MVHHI(UShort i2, IRTemp op1addr)
6071{
6072 store(mkexpr(op1addr), mkU16(i2));
6073
6074 return "mvhhi";
6075}
6076
6077static HChar *
6078s390_irgen_MVHI(UShort i2, IRTemp op1addr)
6079{
6080 store(mkexpr(op1addr), mkU32((UInt)(Int)(Short)i2));
6081
6082 return "mvhi";
6083}
6084
6085static HChar *
6086s390_irgen_MVGHI(UShort i2, IRTemp op1addr)
6087{
6088 store(mkexpr(op1addr), mkU64((ULong)(Long)(Short)i2));
6089
6090 return "mvghi";
6091}
6092
6093static HChar *
6094s390_irgen_MVI(UChar i2, IRTemp op1addr)
6095{
6096 store(mkexpr(op1addr), mkU8(i2));
6097
6098 return "mvi";
6099}
6100
6101static HChar *
6102s390_irgen_MVIY(UChar i2, IRTemp op1addr)
6103{
6104 store(mkexpr(op1addr), mkU8(i2));
6105
6106 return "mviy";
6107}
6108
6109static HChar *
6110s390_irgen_MR(UChar r1, UChar r2)
6111{
6112 IRTemp op1 = newTemp(Ity_I32);
6113 IRTemp op2 = newTemp(Ity_I32);
6114 IRTemp result = newTemp(Ity_I64);
6115
6116 assign(op1, get_gpr_w1(r1 + 1));
6117 assign(op2, get_gpr_w1(r2));
6118 assign(result, binop(Iop_MullS32, mkexpr(op1), mkexpr(op2)));
6119 put_gpr_w1(r1, unop(Iop_64HIto32, mkexpr(result)));
6120 put_gpr_w1(r1 + 1, unop(Iop_64to32, mkexpr(result)));
6121
6122 return "mr";
6123}
6124
6125static HChar *
6126s390_irgen_M(UChar r1, IRTemp op2addr)
6127{
6128 IRTemp op1 = newTemp(Ity_I32);
6129 IRTemp op2 = newTemp(Ity_I32);
6130 IRTemp result = newTemp(Ity_I64);
6131
6132 assign(op1, get_gpr_w1(r1 + 1));
6133 assign(op2, load(Ity_I32, mkexpr(op2addr)));
6134 assign(result, binop(Iop_MullS32, mkexpr(op1), mkexpr(op2)));
6135 put_gpr_w1(r1, unop(Iop_64HIto32, mkexpr(result)));
6136 put_gpr_w1(r1 + 1, unop(Iop_64to32, mkexpr(result)));
6137
6138 return "m";
6139}
6140
6141static HChar *
6142s390_irgen_MFY(UChar r1, IRTemp op2addr)
6143{
6144 IRTemp op1 = newTemp(Ity_I32);
6145 IRTemp op2 = newTemp(Ity_I32);
6146 IRTemp result = newTemp(Ity_I64);
6147
6148 assign(op1, get_gpr_w1(r1 + 1));
6149 assign(op2, load(Ity_I32, mkexpr(op2addr)));
6150 assign(result, binop(Iop_MullS32, mkexpr(op1), mkexpr(op2)));
6151 put_gpr_w1(r1, unop(Iop_64HIto32, mkexpr(result)));
6152 put_gpr_w1(r1 + 1, unop(Iop_64to32, mkexpr(result)));
6153
6154 return "mfy";
6155}
6156
6157static HChar *
6158s390_irgen_MH(UChar r1, IRTemp op2addr)
6159{
6160 IRTemp op1 = newTemp(Ity_I32);
6161 IRTemp op2 = newTemp(Ity_I16);
6162 IRTemp result = newTemp(Ity_I64);
6163
6164 assign(op1, get_gpr_w1(r1));
6165 assign(op2, load(Ity_I16, mkexpr(op2addr)));
6166 assign(result, binop(Iop_MullS32, mkexpr(op1), unop(Iop_16Sto32, mkexpr(op2))
6167 ));
6168 put_gpr_w1(r1, unop(Iop_64to32, mkexpr(result)));
6169
6170 return "mh";
6171}
6172
6173static HChar *
6174s390_irgen_MHY(UChar r1, IRTemp op2addr)
6175{
6176 IRTemp op1 = newTemp(Ity_I32);
6177 IRTemp op2 = newTemp(Ity_I16);
6178 IRTemp result = newTemp(Ity_I64);
6179
6180 assign(op1, get_gpr_w1(r1));
6181 assign(op2, load(Ity_I16, mkexpr(op2addr)));
6182 assign(result, binop(Iop_MullS32, mkexpr(op1), unop(Iop_16Sto32, mkexpr(op2))
6183 ));
6184 put_gpr_w1(r1, unop(Iop_64to32, mkexpr(result)));
6185
6186 return "mhy";
6187}
6188
6189static HChar *
6190s390_irgen_MHI(UChar r1, UShort i2)
6191{
6192 IRTemp op1 = newTemp(Ity_I32);
6193 Short op2;
6194 IRTemp result = newTemp(Ity_I64);
6195
6196 assign(op1, get_gpr_w1(r1));
6197 op2 = (Short)i2;
6198 assign(result, binop(Iop_MullS32, mkexpr(op1), unop(Iop_16Sto32,
6199 mkU16((UShort)op2))));
6200 put_gpr_w1(r1, unop(Iop_64to32, mkexpr(result)));
6201
6202 return "mhi";
6203}
6204
6205static HChar *
6206s390_irgen_MGHI(UChar r1, UShort i2)
6207{
6208 IRTemp op1 = newTemp(Ity_I64);
6209 Short op2;
6210 IRTemp result = newTemp(Ity_I128);
6211
6212 assign(op1, get_gpr_dw0(r1));
6213 op2 = (Short)i2;
6214 assign(result, binop(Iop_MullS64, mkexpr(op1), unop(Iop_16Sto64,
6215 mkU16((UShort)op2))));
6216 put_gpr_dw0(r1, unop(Iop_128to64, mkexpr(result)));
6217
6218 return "mghi";
6219}
6220
6221static HChar *
6222s390_irgen_MLR(UChar r1, UChar r2)
6223{
6224 IRTemp op1 = newTemp(Ity_I32);
6225 IRTemp op2 = newTemp(Ity_I32);
6226 IRTemp result = newTemp(Ity_I64);
6227
6228 assign(op1, get_gpr_w1(r1 + 1));
6229 assign(op2, get_gpr_w1(r2));
6230 assign(result, binop(Iop_MullU32, mkexpr(op1), mkexpr(op2)));
6231 put_gpr_w1(r1, unop(Iop_64HIto32, mkexpr(result)));
6232 put_gpr_w1(r1 + 1, unop(Iop_64to32, mkexpr(result)));
6233
6234 return "mlr";
6235}
6236
6237static HChar *
6238s390_irgen_MLGR(UChar r1, UChar r2)
6239{
6240 IRTemp op1 = newTemp(Ity_I64);
6241 IRTemp op2 = newTemp(Ity_I64);
6242 IRTemp result = newTemp(Ity_I128);
6243
6244 assign(op1, get_gpr_dw0(r1 + 1));
6245 assign(op2, get_gpr_dw0(r2));
6246 assign(result, binop(Iop_MullU64, mkexpr(op1), mkexpr(op2)));
6247 put_gpr_dw0(r1, unop(Iop_128HIto64, mkexpr(result)));
6248 put_gpr_dw0(r1 + 1, unop(Iop_128to64, mkexpr(result)));
6249
6250 return "mlgr";
6251}
6252
6253static HChar *
6254s390_irgen_ML(UChar r1, IRTemp op2addr)
6255{
6256 IRTemp op1 = newTemp(Ity_I32);
6257 IRTemp op2 = newTemp(Ity_I32);
6258 IRTemp result = newTemp(Ity_I64);
6259
6260 assign(op1, get_gpr_w1(r1 + 1));
6261 assign(op2, load(Ity_I32, mkexpr(op2addr)));
6262 assign(result, binop(Iop_MullU32, mkexpr(op1), mkexpr(op2)));
6263 put_gpr_w1(r1, unop(Iop_64HIto32, mkexpr(result)));
6264 put_gpr_w1(r1 + 1, unop(Iop_64to32, mkexpr(result)));
6265
6266 return "ml";
6267}
6268
6269static HChar *
6270s390_irgen_MLG(UChar r1, IRTemp op2addr)
6271{
6272 IRTemp op1 = newTemp(Ity_I64);
6273 IRTemp op2 = newTemp(Ity_I64);
6274 IRTemp result = newTemp(Ity_I128);
6275
6276 assign(op1, get_gpr_dw0(r1 + 1));
6277 assign(op2, load(Ity_I64, mkexpr(op2addr)));
6278 assign(result, binop(Iop_MullU64, mkexpr(op1), mkexpr(op2)));
6279 put_gpr_dw0(r1, unop(Iop_128HIto64, mkexpr(result)));
6280 put_gpr_dw0(r1 + 1, unop(Iop_128to64, mkexpr(result)));
6281
6282 return "mlg";
6283}
6284
6285static HChar *
6286s390_irgen_MSR(UChar r1, UChar r2)
6287{
6288 IRTemp op1 = newTemp(Ity_I32);
6289 IRTemp op2 = newTemp(Ity_I32);
6290 IRTemp result = newTemp(Ity_I64);
6291
6292 assign(op1, get_gpr_w1(r1));
6293 assign(op2, get_gpr_w1(r2));
6294 assign(result, binop(Iop_MullS32, mkexpr(op1), mkexpr(op2)));
6295 put_gpr_w1(r1, unop(Iop_64to32, mkexpr(result)));
6296
6297 return "msr";
6298}
6299
6300static HChar *
6301s390_irgen_MSGR(UChar r1, UChar r2)
6302{
6303 IRTemp op1 = newTemp(Ity_I64);
6304 IRTemp op2 = newTemp(Ity_I64);
6305 IRTemp result = newTemp(Ity_I128);
6306
6307 assign(op1, get_gpr_dw0(r1));
6308 assign(op2, get_gpr_dw0(r2));
6309 assign(result, binop(Iop_MullS64, mkexpr(op1), mkexpr(op2)));
6310 put_gpr_dw0(r1, unop(Iop_128to64, mkexpr(result)));
6311
6312 return "msgr";
6313}
6314
6315static HChar *
6316s390_irgen_MSGFR(UChar r1, UChar r2)
6317{
6318 IRTemp op1 = newTemp(Ity_I64);
6319 IRTemp op2 = newTemp(Ity_I32);
6320 IRTemp result = newTemp(Ity_I128);
6321
6322 assign(op1, get_gpr_dw0(r1));
6323 assign(op2, get_gpr_w1(r2));
6324 assign(result, binop(Iop_MullS64, mkexpr(op1), unop(Iop_32Sto64, mkexpr(op2))
6325 ));
6326 put_gpr_dw0(r1, unop(Iop_128to64, mkexpr(result)));
6327
6328 return "msgfr";
6329}
6330
6331static HChar *
6332s390_irgen_MS(UChar r1, IRTemp op2addr)
6333{
6334 IRTemp op1 = newTemp(Ity_I32);
6335 IRTemp op2 = newTemp(Ity_I32);
6336 IRTemp result = newTemp(Ity_I64);
6337
6338 assign(op1, get_gpr_w1(r1));
6339 assign(op2, load(Ity_I32, mkexpr(op2addr)));
6340 assign(result, binop(Iop_MullS32, mkexpr(op1), mkexpr(op2)));
6341 put_gpr_w1(r1, unop(Iop_64to32, mkexpr(result)));
6342
6343 return "ms";
6344}
6345
6346static HChar *
6347s390_irgen_MSY(UChar r1, IRTemp op2addr)
6348{
6349 IRTemp op1 = newTemp(Ity_I32);
6350 IRTemp op2 = newTemp(Ity_I32);
6351 IRTemp result = newTemp(Ity_I64);
6352
6353 assign(op1, get_gpr_w1(r1));
6354 assign(op2, load(Ity_I32, mkexpr(op2addr)));
6355 assign(result, binop(Iop_MullS32, mkexpr(op1), mkexpr(op2)));
6356 put_gpr_w1(r1, unop(Iop_64to32, mkexpr(result)));
6357
6358 return "msy";
6359}
6360
6361static HChar *
6362s390_irgen_MSG(UChar r1, IRTemp op2addr)
6363{
6364 IRTemp op1 = newTemp(Ity_I64);
6365 IRTemp op2 = newTemp(Ity_I64);
6366 IRTemp result = newTemp(Ity_I128);
6367
6368 assign(op1, get_gpr_dw0(r1));
6369 assign(op2, load(Ity_I64, mkexpr(op2addr)));
6370 assign(result, binop(Iop_MullS64, mkexpr(op1), mkexpr(op2)));
6371 put_gpr_dw0(r1, unop(Iop_128to64, mkexpr(result)));
6372
6373 return "msg";
6374}
6375
6376static HChar *
6377s390_irgen_MSGF(UChar r1, IRTemp op2addr)
6378{
6379 IRTemp op1 = newTemp(Ity_I64);
6380 IRTemp op2 = newTemp(Ity_I32);
6381 IRTemp result = newTemp(Ity_I128);
6382
6383 assign(op1, get_gpr_dw0(r1));
6384 assign(op2, load(Ity_I32, mkexpr(op2addr)));
6385 assign(result, binop(Iop_MullS64, mkexpr(op1), unop(Iop_32Sto64, mkexpr(op2))
6386 ));
6387 put_gpr_dw0(r1, unop(Iop_128to64, mkexpr(result)));
6388
6389 return "msgf";
6390}
6391
6392static HChar *
6393s390_irgen_MSFI(UChar r1, UInt i2)
6394{
6395 IRTemp op1 = newTemp(Ity_I32);
6396 Int op2;
6397 IRTemp result = newTemp(Ity_I64);
6398
6399 assign(op1, get_gpr_w1(r1));
6400 op2 = (Int)i2;
6401 assign(result, binop(Iop_MullS32, mkexpr(op1), mkU32((UInt)op2)));
6402 put_gpr_w1(r1, unop(Iop_64to32, mkexpr(result)));
6403
6404 return "msfi";
6405}
6406
6407static HChar *
6408s390_irgen_MSGFI(UChar r1, UInt i2)
6409{
6410 IRTemp op1 = newTemp(Ity_I64);
6411 Int op2;
6412 IRTemp result = newTemp(Ity_I128);
6413
6414 assign(op1, get_gpr_dw0(r1));
6415 op2 = (Int)i2;
6416 assign(result, binop(Iop_MullS64, mkexpr(op1), unop(Iop_32Sto64, mkU32((UInt)
6417 op2))));
6418 put_gpr_dw0(r1, unop(Iop_128to64, mkexpr(result)));
6419
6420 return "msgfi";
6421}
6422
6423static HChar *
6424s390_irgen_OR(UChar r1, UChar r2)
6425{
6426 IRTemp op1 = newTemp(Ity_I32);
6427 IRTemp op2 = newTemp(Ity_I32);
6428 IRTemp result = newTemp(Ity_I32);
6429
6430 assign(op1, get_gpr_w1(r1));
6431 assign(op2, get_gpr_w1(r2));
6432 assign(result, binop(Iop_Or32, mkexpr(op1), mkexpr(op2)));
6433 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
6434 put_gpr_w1(r1, mkexpr(result));
6435
6436 return "or";
6437}
6438
6439static HChar *
6440s390_irgen_OGR(UChar r1, UChar r2)
6441{
6442 IRTemp op1 = newTemp(Ity_I64);
6443 IRTemp op2 = newTemp(Ity_I64);
6444 IRTemp result = newTemp(Ity_I64);
6445
6446 assign(op1, get_gpr_dw0(r1));
6447 assign(op2, get_gpr_dw0(r2));
6448 assign(result, binop(Iop_Or64, mkexpr(op1), mkexpr(op2)));
6449 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
6450 put_gpr_dw0(r1, mkexpr(result));
6451
6452 return "ogr";
6453}
6454
6455static HChar *
6456s390_irgen_ORK(UChar r3, UChar r1, UChar r2)
6457{
6458 IRTemp op2 = newTemp(Ity_I32);
6459 IRTemp op3 = newTemp(Ity_I32);
6460 IRTemp result = newTemp(Ity_I32);
6461
6462 assign(op2, get_gpr_w1(r2));
6463 assign(op3, get_gpr_w1(r3));
6464 assign(result, binop(Iop_Or32, mkexpr(op2), mkexpr(op3)));
6465 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
6466 put_gpr_w1(r1, mkexpr(result));
6467
6468 return "ork";
6469}
6470
6471static HChar *
6472s390_irgen_OGRK(UChar r3, UChar r1, UChar r2)
6473{
6474 IRTemp op2 = newTemp(Ity_I64);
6475 IRTemp op3 = newTemp(Ity_I64);
6476 IRTemp result = newTemp(Ity_I64);
6477
6478 assign(op2, get_gpr_dw0(r2));
6479 assign(op3, get_gpr_dw0(r3));
6480 assign(result, binop(Iop_Or64, mkexpr(op2), mkexpr(op3)));
6481 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
6482 put_gpr_dw0(r1, mkexpr(result));
6483
6484 return "ogrk";
6485}
6486
6487static HChar *
6488s390_irgen_O(UChar r1, IRTemp op2addr)
6489{
6490 IRTemp op1 = newTemp(Ity_I32);
6491 IRTemp op2 = newTemp(Ity_I32);
6492 IRTemp result = newTemp(Ity_I32);
6493
6494 assign(op1, get_gpr_w1(r1));
6495 assign(op2, load(Ity_I32, mkexpr(op2addr)));
6496 assign(result, binop(Iop_Or32, mkexpr(op1), mkexpr(op2)));
6497 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
6498 put_gpr_w1(r1, mkexpr(result));
6499
6500 return "o";
6501}
6502
6503static HChar *
6504s390_irgen_OY(UChar r1, IRTemp op2addr)
6505{
6506 IRTemp op1 = newTemp(Ity_I32);
6507 IRTemp op2 = newTemp(Ity_I32);
6508 IRTemp result = newTemp(Ity_I32);
6509
6510 assign(op1, get_gpr_w1(r1));
6511 assign(op2, load(Ity_I32, mkexpr(op2addr)));
6512 assign(result, binop(Iop_Or32, mkexpr(op1), mkexpr(op2)));
6513 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
6514 put_gpr_w1(r1, mkexpr(result));
6515
6516 return "oy";
6517}
6518
6519static HChar *
6520s390_irgen_OG(UChar r1, IRTemp op2addr)
6521{
6522 IRTemp op1 = newTemp(Ity_I64);
6523 IRTemp op2 = newTemp(Ity_I64);
6524 IRTemp result = newTemp(Ity_I64);
6525
6526 assign(op1, get_gpr_dw0(r1));
6527 assign(op2, load(Ity_I64, mkexpr(op2addr)));
6528 assign(result, binop(Iop_Or64, mkexpr(op1), mkexpr(op2)));
6529 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
6530 put_gpr_dw0(r1, mkexpr(result));
6531
6532 return "og";
6533}
6534
6535static HChar *
6536s390_irgen_OI(UChar i2, IRTemp op1addr)
6537{
6538 IRTemp op1 = newTemp(Ity_I8);
6539 UChar op2;
6540 IRTemp result = newTemp(Ity_I8);
6541
6542 assign(op1, load(Ity_I8, mkexpr(op1addr)));
6543 op2 = i2;
6544 assign(result, binop(Iop_Or8, mkexpr(op1), mkU8(op2)));
6545 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
6546 store(mkexpr(op1addr), mkexpr(result));
6547
6548 return "oi";
6549}
6550
6551static HChar *
6552s390_irgen_OIY(UChar i2, IRTemp op1addr)
6553{
6554 IRTemp op1 = newTemp(Ity_I8);
6555 UChar op2;
6556 IRTemp result = newTemp(Ity_I8);
6557
6558 assign(op1, load(Ity_I8, mkexpr(op1addr)));
6559 op2 = i2;
6560 assign(result, binop(Iop_Or8, mkexpr(op1), mkU8(op2)));
6561 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
6562 store(mkexpr(op1addr), mkexpr(result));
6563
6564 return "oiy";
6565}
6566
6567static HChar *
6568s390_irgen_OIHF(UChar r1, UInt i2)
6569{
6570 IRTemp op1 = newTemp(Ity_I32);
6571 UInt op2;
6572 IRTemp result = newTemp(Ity_I32);
6573
6574 assign(op1, get_gpr_w0(r1));
6575 op2 = i2;
6576 assign(result, binop(Iop_Or32, mkexpr(op1), mkU32(op2)));
6577 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
6578 put_gpr_w0(r1, mkexpr(result));
6579
6580 return "oihf";
6581}
6582
6583static HChar *
6584s390_irgen_OIHH(UChar r1, UShort i2)
6585{
6586 IRTemp op1 = newTemp(Ity_I16);
6587 UShort op2;
6588 IRTemp result = newTemp(Ity_I16);
6589
6590 assign(op1, get_gpr_hw0(r1));
6591 op2 = i2;
6592 assign(result, binop(Iop_Or16, mkexpr(op1), mkU16(op2)));
6593 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
6594 put_gpr_hw0(r1, mkexpr(result));
6595
6596 return "oihh";
6597}
6598
6599static HChar *
6600s390_irgen_OIHL(UChar r1, UShort i2)
6601{
6602 IRTemp op1 = newTemp(Ity_I16);
6603 UShort op2;
6604 IRTemp result = newTemp(Ity_I16);
6605
6606 assign(op1, get_gpr_hw1(r1));
6607 op2 = i2;
6608 assign(result, binop(Iop_Or16, mkexpr(op1), mkU16(op2)));
6609 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
6610 put_gpr_hw1(r1, mkexpr(result));
6611
6612 return "oihl";
6613}
6614
6615static HChar *
6616s390_irgen_OILF(UChar r1, UInt i2)
6617{
6618 IRTemp op1 = newTemp(Ity_I32);
6619 UInt op2;
6620 IRTemp result = newTemp(Ity_I32);
6621
6622 assign(op1, get_gpr_w1(r1));
6623 op2 = i2;
6624 assign(result, binop(Iop_Or32, mkexpr(op1), mkU32(op2)));
6625 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
6626 put_gpr_w1(r1, mkexpr(result));
6627
6628 return "oilf";
6629}
6630
6631static HChar *
6632s390_irgen_OILH(UChar r1, UShort i2)
6633{
6634 IRTemp op1 = newTemp(Ity_I16);
6635 UShort op2;
6636 IRTemp result = newTemp(Ity_I16);
6637
6638 assign(op1, get_gpr_hw2(r1));
6639 op2 = i2;
6640 assign(result, binop(Iop_Or16, mkexpr(op1), mkU16(op2)));
6641 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
6642 put_gpr_hw2(r1, mkexpr(result));
6643
6644 return "oilh";
6645}
6646
6647static HChar *
6648s390_irgen_OILL(UChar r1, UShort i2)
6649{
6650 IRTemp op1 = newTemp(Ity_I16);
6651 UShort op2;
6652 IRTemp result = newTemp(Ity_I16);
6653
6654 assign(op1, get_gpr_hw3(r1));
6655 op2 = i2;
6656 assign(result, binop(Iop_Or16, mkexpr(op1), mkU16(op2)));
6657 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
6658 put_gpr_hw3(r1, mkexpr(result));
6659
6660 return "oill";
6661}
6662
6663static HChar *
6664s390_irgen_PFD(void)
6665{
6666
6667 return "pfd";
6668}
6669
6670static HChar *
6671s390_irgen_PFDRL(void)
6672{
6673
6674 return "pfdrl";
6675}
6676
6677static HChar *
6678s390_irgen_RLL(UChar r1, UChar r3, IRTemp op2addr)
6679{
6680 IRTemp amount = newTemp(Ity_I64);
6681 IRTemp op = newTemp(Ity_I32);
6682
6683 assign(amount, binop(Iop_And64, mkexpr(op2addr), mkU64(31)));
6684 assign(op, get_gpr_w1(r3));
6685 put_gpr_w1(r1, binop(Iop_Or32, binop(Iop_Shl32, mkexpr(op), unop(Iop_64to8,
6686 mkexpr(amount))), binop(Iop_Shr32, mkexpr(op), unop(Iop_64to8,
6687 binop(Iop_Sub64, mkU64(32), mkexpr(amount))))));
6688
6689 return "rll";
6690}
6691
6692static HChar *
6693s390_irgen_RLLG(UChar r1, UChar r3, IRTemp op2addr)
6694{
6695 IRTemp amount = newTemp(Ity_I64);
6696 IRTemp op = newTemp(Ity_I64);
6697
6698 assign(amount, binop(Iop_And64, mkexpr(op2addr), mkU64(63)));
6699 assign(op, get_gpr_dw0(r3));
6700 put_gpr_dw0(r1, binop(Iop_Or64, binop(Iop_Shl64, mkexpr(op), unop(Iop_64to8,
6701 mkexpr(amount))), binop(Iop_Shr64, mkexpr(op), unop(Iop_64to8,
6702 binop(Iop_Sub64, mkU64(64), mkexpr(amount))))));
6703
6704 return "rllg";
6705}
6706
6707static HChar *
6708s390_irgen_RNSBG(UChar r1, UChar r2, UChar i3, UChar i4, UChar i5)
6709{
6710 UChar from;
6711 UChar to;
6712 UChar rot;
6713 UChar t_bit;
6714 ULong mask;
6715 ULong maskc;
6716 IRTemp result = newTemp(Ity_I64);
6717 IRTemp op2 = newTemp(Ity_I64);
6718
6719 from = i3 & 63;
6720 to = i4 & 63;
6721 rot = i5 & 63;
6722 t_bit = i3 & 128;
6723 assign(op2, rot == 0 ? get_gpr_dw0(r2) : binop(Iop_Or64, binop(Iop_Shl64,
6724 get_gpr_dw0(r2), mkU8(rot)), binop(Iop_Shr64, get_gpr_dw0(r2),
6725 mkU8(64 - rot))));
6726 if (from <= to) {
6727 mask = ~0ULL;
6728 mask = (mask >> from) & (mask << (63 - to));
6729 maskc = ~mask;
6730 } else {
6731 maskc = ~0ULL;
6732 maskc = (maskc >> (to + 1)) & (maskc << (64 - from));
6733 mask = ~maskc;
6734 }
6735 assign(result, binop(Iop_And64, binop(Iop_And64, get_gpr_dw0(r1), mkexpr(op2)
6736 ), mkU64(mask)));
6737 if (t_bit == 0) {
6738 put_gpr_dw0(r1, binop(Iop_Or64, binop(Iop_And64, get_gpr_dw0(r1),
6739 mkU64(maskc)), mkexpr(result)));
6740 }
6741 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
6742
6743 return "rnsbg";
6744}
6745
6746static HChar *
6747s390_irgen_RXSBG(UChar r1, UChar r2, UChar i3, UChar i4, UChar i5)
6748{
6749 UChar from;
6750 UChar to;
6751 UChar rot;
6752 UChar t_bit;
6753 ULong mask;
6754 ULong maskc;
6755 IRTemp result = newTemp(Ity_I64);
6756 IRTemp op2 = newTemp(Ity_I64);
6757
6758 from = i3 & 63;
6759 to = i4 & 63;
6760 rot = i5 & 63;
6761 t_bit = i3 & 128;
6762 assign(op2, rot == 0 ? get_gpr_dw0(r2) : binop(Iop_Or64, binop(Iop_Shl64,
6763 get_gpr_dw0(r2), mkU8(rot)), binop(Iop_Shr64, get_gpr_dw0(r2),
6764 mkU8(64 - rot))));
6765 if (from <= to) {
6766 mask = ~0ULL;
6767 mask = (mask >> from) & (mask << (63 - to));
6768 maskc = ~mask;
6769 } else {
6770 maskc = ~0ULL;
6771 maskc = (maskc >> (to + 1)) & (maskc << (64 - from));
6772 mask = ~maskc;
6773 }
6774 assign(result, binop(Iop_And64, binop(Iop_Xor64, get_gpr_dw0(r1), mkexpr(op2)
6775 ), mkU64(mask)));
6776 if (t_bit == 0) {
6777 put_gpr_dw0(r1, binop(Iop_Or64, binop(Iop_And64, get_gpr_dw0(r1),
6778 mkU64(maskc)), mkexpr(result)));
6779 }
6780 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
6781
6782 return "rxsbg";
6783}
6784
6785static HChar *
6786s390_irgen_ROSBG(UChar r1, UChar r2, UChar i3, UChar i4, UChar i5)
6787{
6788 UChar from;
6789 UChar to;
6790 UChar rot;
6791 UChar t_bit;
6792 ULong mask;
6793 ULong maskc;
6794 IRTemp result = newTemp(Ity_I64);
6795 IRTemp op2 = newTemp(Ity_I64);
6796
6797 from = i3 & 63;
6798 to = i4 & 63;
6799 rot = i5 & 63;
6800 t_bit = i3 & 128;
6801 assign(op2, rot == 0 ? get_gpr_dw0(r2) : binop(Iop_Or64, binop(Iop_Shl64,
6802 get_gpr_dw0(r2), mkU8(rot)), binop(Iop_Shr64, get_gpr_dw0(r2),
6803 mkU8(64 - rot))));
6804 if (from <= to) {
6805 mask = ~0ULL;
6806 mask = (mask >> from) & (mask << (63 - to));
6807 maskc = ~mask;
6808 } else {
6809 maskc = ~0ULL;
6810 maskc = (maskc >> (to + 1)) & (maskc << (64 - from));
6811 mask = ~maskc;
6812 }
6813 assign(result, binop(Iop_And64, binop(Iop_Or64, get_gpr_dw0(r1), mkexpr(op2)
6814 ), mkU64(mask)));
6815 if (t_bit == 0) {
6816 put_gpr_dw0(r1, binop(Iop_Or64, binop(Iop_And64, get_gpr_dw0(r1),
6817 mkU64(maskc)), mkexpr(result)));
6818 }
6819 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
6820
6821 return "rosbg";
6822}
6823
6824static HChar *
6825s390_irgen_RISBG(UChar r1, UChar r2, UChar i3, UChar i4, UChar i5)
6826{
6827 UChar from;
6828 UChar to;
6829 UChar rot;
6830 UChar z_bit;
6831 ULong mask;
6832 ULong maskc;
6833 IRTemp op2 = newTemp(Ity_I64);
6834 IRTemp result = newTemp(Ity_I64);
6835
6836 from = i3 & 63;
6837 to = i4 & 63;
6838 rot = i5 & 63;
6839 z_bit = i4 & 128;
6840 assign(op2, rot == 0 ? get_gpr_dw0(r2) : binop(Iop_Or64, binop(Iop_Shl64,
6841 get_gpr_dw0(r2), mkU8(rot)), binop(Iop_Shr64, get_gpr_dw0(r2),
6842 mkU8(64 - rot))));
6843 if (from <= to) {
6844 mask = ~0ULL;
6845 mask = (mask >> from) & (mask << (63 - to));
6846 maskc = ~mask;
6847 } else {
6848 maskc = ~0ULL;
6849 maskc = (maskc >> (to + 1)) & (maskc << (64 - from));
6850 mask = ~maskc;
6851 }
6852 if (z_bit == 0) {
6853 put_gpr_dw0(r1, binop(Iop_Or64, binop(Iop_And64, get_gpr_dw0(r1),
6854 mkU64(maskc)), binop(Iop_And64, mkexpr(op2), mkU64(mask))));
6855 } else {
6856 put_gpr_dw0(r1, binop(Iop_And64, mkexpr(op2), mkU64(mask)));
6857 }
6858 assign(result, get_gpr_dw0(r1));
6859 s390_cc_thunk_putS(S390_CC_OP_LOAD_AND_TEST, op2);
6860
6861 return "risbg";
6862}
6863
6864static HChar *
6865s390_irgen_SAR(UChar r1, UChar r2)
6866{
6867 put_ar_w0(r1, get_gpr_w1(r2));
sewardj7ee97522011-05-09 21:45:04 +00006868 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00006869 s390_disasm(ENC3(MNM, AR, GPR), "sar", r1, r2);
6870
6871 return "sar";
6872}
6873
6874static HChar *
6875s390_irgen_SLDA(UChar r1, IRTemp op2addr)
6876{
6877 IRTemp p1 = newTemp(Ity_I64);
6878 IRTemp p2 = newTemp(Ity_I64);
6879 IRTemp op = newTemp(Ity_I64);
6880 IRTemp result = newTemp(Ity_I64);
6881 Long sign_mask;
6882 IRTemp shift_amount = newTemp(Ity_I64);
6883
6884 assign(p1, unop(Iop_32Uto64, get_gpr_w1(r1)));
6885 assign(p2, unop(Iop_32Uto64, get_gpr_w1(r1 + 1)));
6886 assign(op, binop(Iop_Or64, binop(Iop_Shl64, mkexpr(p1), mkU8(32)), mkexpr(p2)
6887 ));
6888 sign_mask = 1ULL << 63;
6889 assign(shift_amount, binop(Iop_And64, mkexpr(op2addr), mkU64(63)));
6890 assign(result, binop(Iop_Or64, binop(Iop_And64, binop(Iop_Shl64, mkexpr(op),
6891 unop(Iop_64to8, mkexpr(shift_amount))), mkU64((ULong)(~sign_mask))),
6892 binop(Iop_And64, mkexpr(op), mkU64((ULong)sign_mask))));
6893 put_gpr_w1(r1, unop(Iop_64HIto32, mkexpr(result)));
6894 put_gpr_w1(r1 + 1, unop(Iop_64to32, mkexpr(result)));
6895 s390_cc_thunk_putZZ(S390_CC_OP_SHIFT_LEFT_64, op, shift_amount);
6896
6897 return "slda";
6898}
6899
6900static HChar *
6901s390_irgen_SLDL(UChar r1, IRTemp op2addr)
6902{
6903 IRTemp p1 = newTemp(Ity_I64);
6904 IRTemp p2 = newTemp(Ity_I64);
6905 IRTemp result = newTemp(Ity_I64);
6906
6907 assign(p1, unop(Iop_32Uto64, get_gpr_w1(r1)));
6908 assign(p2, unop(Iop_32Uto64, get_gpr_w1(r1 + 1)));
6909 assign(result, binop(Iop_Shl64, binop(Iop_Or64, binop(Iop_Shl64, mkexpr(p1),
6910 mkU8(32)), mkexpr(p2)), unop(Iop_64to8, binop(Iop_And64,
6911 mkexpr(op2addr), mkU64(63)))));
6912 put_gpr_w1(r1, unop(Iop_64HIto32, mkexpr(result)));
6913 put_gpr_w1(r1 + 1, unop(Iop_64to32, mkexpr(result)));
6914
6915 return "sldl";
6916}
6917
6918static HChar *
6919s390_irgen_SLA(UChar r1, IRTemp op2addr)
6920{
6921 IRTemp uop = newTemp(Ity_I32);
6922 IRTemp result = newTemp(Ity_I32);
6923 UInt sign_mask;
6924 IRTemp shift_amount = newTemp(Ity_I64);
6925 IRTemp op = newTemp(Ity_I32);
6926
6927 assign(op, get_gpr_w1(r1));
6928 assign(uop, get_gpr_w1(r1));
6929 sign_mask = 2147483648U;
6930 assign(shift_amount, binop(Iop_And64, mkexpr(op2addr), mkU64(63)));
6931 assign(result, binop(Iop_Or32, binop(Iop_And32, binop(Iop_Shl32, mkexpr(uop),
6932 unop(Iop_64to8, mkexpr(shift_amount))), mkU32(~sign_mask)),
6933 binop(Iop_And32, mkexpr(uop), mkU32(sign_mask))));
6934 put_gpr_w1(r1, mkexpr(result));
6935 s390_cc_thunk_putZZ(S390_CC_OP_SHIFT_LEFT_32, op, shift_amount);
6936
6937 return "sla";
6938}
6939
6940static HChar *
6941s390_irgen_SLAK(UChar r1, UChar r3, IRTemp op2addr)
6942{
6943 IRTemp uop = newTemp(Ity_I32);
6944 IRTemp result = newTemp(Ity_I32);
6945 UInt sign_mask;
6946 IRTemp shift_amount = newTemp(Ity_I64);
6947 IRTemp op = newTemp(Ity_I32);
6948
6949 assign(op, get_gpr_w1(r3));
6950 assign(uop, get_gpr_w1(r3));
6951 sign_mask = 2147483648U;
6952 assign(shift_amount, binop(Iop_And64, mkexpr(op2addr), mkU64(63)));
6953 assign(result, binop(Iop_Or32, binop(Iop_And32, binop(Iop_Shl32, mkexpr(uop),
6954 unop(Iop_64to8, mkexpr(shift_amount))), mkU32(~sign_mask)),
6955 binop(Iop_And32, mkexpr(uop), mkU32(sign_mask))));
6956 put_gpr_w1(r1, mkexpr(result));
6957 s390_cc_thunk_putZZ(S390_CC_OP_SHIFT_LEFT_32, op, shift_amount);
6958
6959 return "slak";
6960}
6961
6962static HChar *
6963s390_irgen_SLAG(UChar r1, UChar r3, IRTemp op2addr)
6964{
6965 IRTemp uop = newTemp(Ity_I64);
6966 IRTemp result = newTemp(Ity_I64);
6967 ULong sign_mask;
6968 IRTemp shift_amount = newTemp(Ity_I64);
6969 IRTemp op = newTemp(Ity_I64);
6970
6971 assign(op, get_gpr_dw0(r3));
6972 assign(uop, get_gpr_dw0(r3));
6973 sign_mask = 9223372036854775808ULL;
6974 assign(shift_amount, binop(Iop_And64, mkexpr(op2addr), mkU64(63)));
6975 assign(result, binop(Iop_Or64, binop(Iop_And64, binop(Iop_Shl64, mkexpr(uop),
6976 unop(Iop_64to8, mkexpr(shift_amount))), mkU64(~sign_mask)),
6977 binop(Iop_And64, mkexpr(uop), mkU64(sign_mask))));
6978 put_gpr_dw0(r1, mkexpr(result));
6979 s390_cc_thunk_putZZ(S390_CC_OP_SHIFT_LEFT_64, op, shift_amount);
6980
6981 return "slag";
6982}
6983
6984static HChar *
6985s390_irgen_SLL(UChar r1, IRTemp op2addr)
6986{
6987 put_gpr_w1(r1, binop(Iop_Shl32, get_gpr_w1(r1), unop(Iop_64to8,
6988 binop(Iop_And64, mkexpr(op2addr), mkU64(63)))));
6989
6990 return "sll";
6991}
6992
6993static HChar *
6994s390_irgen_SLLK(UChar r1, UChar r3, IRTemp op2addr)
6995{
6996 put_gpr_w1(r1, binop(Iop_Shl32, get_gpr_w1(r3), unop(Iop_64to8,
6997 binop(Iop_And64, mkexpr(op2addr), mkU64(63)))));
6998
6999 return "sllk";
7000}
7001
7002static HChar *
7003s390_irgen_SLLG(UChar r1, UChar r3, IRTemp op2addr)
7004{
7005 put_gpr_dw0(r1, binop(Iop_Shl64, get_gpr_dw0(r3), unop(Iop_64to8,
7006 binop(Iop_And64, mkexpr(op2addr), mkU64(63)))));
7007
7008 return "sllg";
7009}
7010
7011static HChar *
7012s390_irgen_SRDA(UChar r1, IRTemp op2addr)
7013{
7014 IRTemp p1 = newTemp(Ity_I64);
7015 IRTemp p2 = newTemp(Ity_I64);
7016 IRTemp result = newTemp(Ity_I64);
7017
7018 assign(p1, unop(Iop_32Uto64, get_gpr_w1(r1)));
7019 assign(p2, unop(Iop_32Uto64, get_gpr_w1(r1 + 1)));
7020 assign(result, binop(Iop_Sar64, binop(Iop_Or64, binop(Iop_Shl64, mkexpr(p1),
7021 mkU8(32)), mkexpr(p2)), unop(Iop_64to8, binop(Iop_And64,
7022 mkexpr(op2addr), mkU64(63)))));
7023 put_gpr_w1(r1, unop(Iop_64HIto32, mkexpr(result)));
7024 put_gpr_w1(r1 + 1, unop(Iop_64to32, mkexpr(result)));
7025 s390_cc_thunk_putS(S390_CC_OP_LOAD_AND_TEST, result);
7026
7027 return "srda";
7028}
7029
7030static HChar *
7031s390_irgen_SRDL(UChar r1, IRTemp op2addr)
7032{
7033 IRTemp p1 = newTemp(Ity_I64);
7034 IRTemp p2 = newTemp(Ity_I64);
7035 IRTemp result = newTemp(Ity_I64);
7036
7037 assign(p1, unop(Iop_32Uto64, get_gpr_w1(r1)));
7038 assign(p2, unop(Iop_32Uto64, get_gpr_w1(r1 + 1)));
7039 assign(result, binop(Iop_Shr64, binop(Iop_Or64, binop(Iop_Shl64, mkexpr(p1),
7040 mkU8(32)), mkexpr(p2)), unop(Iop_64to8, binop(Iop_And64,
7041 mkexpr(op2addr), mkU64(63)))));
7042 put_gpr_w1(r1, unop(Iop_64HIto32, mkexpr(result)));
7043 put_gpr_w1(r1 + 1, unop(Iop_64to32, mkexpr(result)));
7044
7045 return "srdl";
7046}
7047
7048static HChar *
7049s390_irgen_SRA(UChar r1, IRTemp op2addr)
7050{
7051 IRTemp result = newTemp(Ity_I32);
7052 IRTemp op = newTemp(Ity_I32);
7053
7054 assign(op, get_gpr_w1(r1));
7055 assign(result, binop(Iop_Sar32, mkexpr(op), unop(Iop_64to8, binop(Iop_And64,
7056 mkexpr(op2addr), mkU64(63)))));
7057 put_gpr_w1(r1, mkexpr(result));
7058 s390_cc_thunk_putS(S390_CC_OP_LOAD_AND_TEST, result);
7059
7060 return "sra";
7061}
7062
7063static HChar *
7064s390_irgen_SRAK(UChar r1, UChar r3, IRTemp op2addr)
7065{
7066 IRTemp result = newTemp(Ity_I32);
7067 IRTemp op = newTemp(Ity_I32);
7068
7069 assign(op, get_gpr_w1(r3));
7070 assign(result, binop(Iop_Sar32, mkexpr(op), unop(Iop_64to8, binop(Iop_And64,
7071 mkexpr(op2addr), mkU64(63)))));
7072 put_gpr_w1(r1, mkexpr(result));
7073 s390_cc_thunk_putS(S390_CC_OP_LOAD_AND_TEST, result);
7074
7075 return "srak";
7076}
7077
7078static HChar *
7079s390_irgen_SRAG(UChar r1, UChar r3, IRTemp op2addr)
7080{
7081 IRTemp result = newTemp(Ity_I64);
7082 IRTemp op = newTemp(Ity_I64);
7083
7084 assign(op, get_gpr_dw0(r3));
7085 assign(result, binop(Iop_Sar64, mkexpr(op), unop(Iop_64to8, binop(Iop_And64,
7086 mkexpr(op2addr), mkU64(63)))));
7087 put_gpr_dw0(r1, mkexpr(result));
7088 s390_cc_thunk_putS(S390_CC_OP_LOAD_AND_TEST, result);
7089
7090 return "srag";
7091}
7092
7093static HChar *
7094s390_irgen_SRL(UChar r1, IRTemp op2addr)
7095{
7096 IRTemp op = newTemp(Ity_I32);
7097
7098 assign(op, get_gpr_w1(r1));
7099 put_gpr_w1(r1, binop(Iop_Shr32, mkexpr(op), unop(Iop_64to8, binop(Iop_And64,
7100 mkexpr(op2addr), mkU64(63)))));
7101
7102 return "srl";
7103}
7104
7105static HChar *
7106s390_irgen_SRLK(UChar r1, UChar r3, IRTemp op2addr)
7107{
7108 IRTemp op = newTemp(Ity_I32);
7109
7110 assign(op, get_gpr_w1(r3));
7111 put_gpr_w1(r1, binop(Iop_Shr32, mkexpr(op), unop(Iop_64to8, binop(Iop_And64,
7112 mkexpr(op2addr), mkU64(63)))));
7113
7114 return "srlk";
7115}
7116
7117static HChar *
7118s390_irgen_SRLG(UChar r1, UChar r3, IRTemp op2addr)
7119{
7120 IRTemp op = newTemp(Ity_I64);
7121
7122 assign(op, get_gpr_dw0(r3));
7123 put_gpr_dw0(r1, binop(Iop_Shr64, mkexpr(op), unop(Iop_64to8, binop(Iop_And64,
7124 mkexpr(op2addr), mkU64(63)))));
7125
7126 return "srlg";
7127}
7128
7129static HChar *
7130s390_irgen_ST(UChar r1, IRTemp op2addr)
7131{
7132 store(mkexpr(op2addr), get_gpr_w1(r1));
7133
7134 return "st";
7135}
7136
7137static HChar *
7138s390_irgen_STY(UChar r1, IRTemp op2addr)
7139{
7140 store(mkexpr(op2addr), get_gpr_w1(r1));
7141
7142 return "sty";
7143}
7144
7145static HChar *
7146s390_irgen_STG(UChar r1, IRTemp op2addr)
7147{
7148 store(mkexpr(op2addr), get_gpr_dw0(r1));
7149
7150 return "stg";
7151}
7152
7153static HChar *
7154s390_irgen_STRL(UChar r1, UInt i2)
7155{
7156 store(mkU64(guest_IA_curr_instr + ((ULong)(Long)(Int)i2 << 1)),
7157 get_gpr_w1(r1));
7158
7159 return "strl";
7160}
7161
7162static HChar *
7163s390_irgen_STGRL(UChar r1, UInt i2)
7164{
7165 store(mkU64(guest_IA_curr_instr + ((ULong)(Long)(Int)i2 << 1)),
7166 get_gpr_dw0(r1));
7167
7168 return "stgrl";
7169}
7170
7171static HChar *
7172s390_irgen_STC(UChar r1, IRTemp op2addr)
7173{
7174 store(mkexpr(op2addr), get_gpr_b7(r1));
7175
7176 return "stc";
7177}
7178
7179static HChar *
7180s390_irgen_STCY(UChar r1, IRTemp op2addr)
7181{
7182 store(mkexpr(op2addr), get_gpr_b7(r1));
7183
7184 return "stcy";
7185}
7186
7187static HChar *
7188s390_irgen_STCH(UChar r1, IRTemp op2addr)
7189{
7190 store(mkexpr(op2addr), get_gpr_b3(r1));
7191
7192 return "stch";
7193}
7194
7195static HChar *
7196s390_irgen_STCM(UChar r1, UChar r3, IRTemp op2addr)
7197{
7198 UChar mask;
7199 UChar n;
7200
7201 mask = (UChar)r3;
7202 n = 0;
7203 if ((mask & 8) != 0) {
7204 store(mkexpr(op2addr), get_gpr_b4(r1));
7205 n = n + 1;
7206 }
7207 if ((mask & 4) != 0) {
7208 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(n)), get_gpr_b5(r1));
7209 n = n + 1;
7210 }
7211 if ((mask & 2) != 0) {
7212 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(n)), get_gpr_b6(r1));
7213 n = n + 1;
7214 }
7215 if ((mask & 1) != 0) {
7216 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(n)), get_gpr_b7(r1));
7217 }
7218
7219 return "stcm";
7220}
7221
7222static HChar *
7223s390_irgen_STCMY(UChar r1, UChar r3, IRTemp op2addr)
7224{
7225 UChar mask;
7226 UChar n;
7227
7228 mask = (UChar)r3;
7229 n = 0;
7230 if ((mask & 8) != 0) {
7231 store(mkexpr(op2addr), get_gpr_b4(r1));
7232 n = n + 1;
7233 }
7234 if ((mask & 4) != 0) {
7235 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(n)), get_gpr_b5(r1));
7236 n = n + 1;
7237 }
7238 if ((mask & 2) != 0) {
7239 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(n)), get_gpr_b6(r1));
7240 n = n + 1;
7241 }
7242 if ((mask & 1) != 0) {
7243 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(n)), get_gpr_b7(r1));
7244 }
7245
7246 return "stcmy";
7247}
7248
7249static HChar *
7250s390_irgen_STCMH(UChar r1, UChar r3, IRTemp op2addr)
7251{
7252 UChar mask;
7253 UChar n;
7254
7255 mask = (UChar)r3;
7256 n = 0;
7257 if ((mask & 8) != 0) {
7258 store(mkexpr(op2addr), get_gpr_b0(r1));
7259 n = n + 1;
7260 }
7261 if ((mask & 4) != 0) {
7262 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(n)), get_gpr_b1(r1));
7263 n = n + 1;
7264 }
7265 if ((mask & 2) != 0) {
7266 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(n)), get_gpr_b2(r1));
7267 n = n + 1;
7268 }
7269 if ((mask & 1) != 0) {
7270 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(n)), get_gpr_b3(r1));
7271 }
7272
7273 return "stcmh";
7274}
7275
7276static HChar *
7277s390_irgen_STH(UChar r1, IRTemp op2addr)
7278{
7279 store(mkexpr(op2addr), get_gpr_hw3(r1));
7280
7281 return "sth";
7282}
7283
7284static HChar *
7285s390_irgen_STHY(UChar r1, IRTemp op2addr)
7286{
7287 store(mkexpr(op2addr), get_gpr_hw3(r1));
7288
7289 return "sthy";
7290}
7291
7292static HChar *
7293s390_irgen_STHRL(UChar r1, UInt i2)
7294{
7295 store(mkU64(guest_IA_curr_instr + ((ULong)(Long)(Int)i2 << 1)),
7296 get_gpr_hw3(r1));
7297
7298 return "sthrl";
7299}
7300
7301static HChar *
7302s390_irgen_STHH(UChar r1, IRTemp op2addr)
7303{
7304 store(mkexpr(op2addr), get_gpr_hw1(r1));
7305
7306 return "sthh";
7307}
7308
7309static HChar *
7310s390_irgen_STFH(UChar r1, IRTemp op2addr)
7311{
7312 store(mkexpr(op2addr), get_gpr_w0(r1));
7313
7314 return "stfh";
7315}
7316
7317static HChar *
sewardjd7bde722011-04-05 13:19:33 +00007318s390_irgen_STOC(UChar r1, IRTemp op2addr)
7319{
7320 /* condition is checked in format handler */
7321 store(mkexpr(op2addr), get_gpr_w1(r1));
7322
7323 return "stoc";
7324}
7325
7326static HChar *
7327s390_irgen_STOCG(UChar r1, IRTemp op2addr)
7328{
7329 /* condition is checked in format handler */
7330 store(mkexpr(op2addr), get_gpr_dw0(r1));
7331
7332 return "stocg";
7333}
7334
7335static HChar *
sewardj2019a972011-03-07 16:04:07 +00007336s390_irgen_STPQ(UChar r1, IRTemp op2addr)
7337{
7338 store(mkexpr(op2addr), get_gpr_dw0(r1));
7339 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(8)), get_gpr_dw0(r1 + 1));
7340
7341 return "stpq";
7342}
7343
7344static HChar *
7345s390_irgen_STRVH(UChar r1, IRTemp op2addr)
7346{
7347 store(mkexpr(op2addr), get_gpr_b7(r1));
7348 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(1)), get_gpr_b6(r1));
7349
7350 return "strvh";
7351}
7352
7353static HChar *
7354s390_irgen_STRV(UChar r1, IRTemp op2addr)
7355{
7356 store(mkexpr(op2addr), get_gpr_b7(r1));
7357 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(1)), get_gpr_b6(r1));
7358 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(2)), get_gpr_b5(r1));
7359 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(3)), get_gpr_b4(r1));
7360
7361 return "strv";
7362}
7363
7364static HChar *
7365s390_irgen_STRVG(UChar r1, IRTemp op2addr)
7366{
7367 store(mkexpr(op2addr), get_gpr_b7(r1));
7368 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(1)), get_gpr_b6(r1));
7369 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(2)), get_gpr_b5(r1));
7370 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(3)), get_gpr_b4(r1));
7371 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(4)), get_gpr_b3(r1));
7372 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(5)), get_gpr_b2(r1));
7373 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(6)), get_gpr_b1(r1));
7374 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(7)), get_gpr_b0(r1));
7375
7376 return "strvg";
7377}
7378
7379static HChar *
7380s390_irgen_SR(UChar r1, UChar r2)
7381{
7382 IRTemp op1 = newTemp(Ity_I32);
7383 IRTemp op2 = newTemp(Ity_I32);
7384 IRTemp result = newTemp(Ity_I32);
7385
7386 assign(op1, get_gpr_w1(r1));
7387 assign(op2, get_gpr_w1(r2));
7388 assign(result, binop(Iop_Sub32, mkexpr(op1), mkexpr(op2)));
7389 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_32, op1, op2);
7390 put_gpr_w1(r1, mkexpr(result));
7391
7392 return "sr";
7393}
7394
7395static HChar *
7396s390_irgen_SGR(UChar r1, UChar r2)
7397{
7398 IRTemp op1 = newTemp(Ity_I64);
7399 IRTemp op2 = newTemp(Ity_I64);
7400 IRTemp result = newTemp(Ity_I64);
7401
7402 assign(op1, get_gpr_dw0(r1));
7403 assign(op2, get_gpr_dw0(r2));
7404 assign(result, binop(Iop_Sub64, mkexpr(op1), mkexpr(op2)));
7405 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_64, op1, op2);
7406 put_gpr_dw0(r1, mkexpr(result));
7407
7408 return "sgr";
7409}
7410
7411static HChar *
7412s390_irgen_SGFR(UChar r1, UChar r2)
7413{
7414 IRTemp op1 = newTemp(Ity_I64);
7415 IRTemp op2 = newTemp(Ity_I64);
7416 IRTemp result = newTemp(Ity_I64);
7417
7418 assign(op1, get_gpr_dw0(r1));
7419 assign(op2, unop(Iop_32Sto64, get_gpr_w1(r2)));
7420 assign(result, binop(Iop_Sub64, mkexpr(op1), mkexpr(op2)));
7421 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_64, op1, op2);
7422 put_gpr_dw0(r1, mkexpr(result));
7423
7424 return "sgfr";
7425}
7426
7427static HChar *
7428s390_irgen_SRK(UChar r3, UChar r1, UChar r2)
7429{
7430 IRTemp op2 = newTemp(Ity_I32);
7431 IRTemp op3 = newTemp(Ity_I32);
7432 IRTemp result = newTemp(Ity_I32);
7433
7434 assign(op2, get_gpr_w1(r2));
7435 assign(op3, get_gpr_w1(r3));
7436 assign(result, binop(Iop_Sub32, mkexpr(op2), mkexpr(op3)));
7437 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_32, op2, op3);
7438 put_gpr_w1(r1, mkexpr(result));
7439
7440 return "srk";
7441}
7442
7443static HChar *
7444s390_irgen_SGRK(UChar r3, UChar r1, UChar r2)
7445{
7446 IRTemp op2 = newTemp(Ity_I64);
7447 IRTemp op3 = newTemp(Ity_I64);
7448 IRTemp result = newTemp(Ity_I64);
7449
7450 assign(op2, get_gpr_dw0(r2));
7451 assign(op3, get_gpr_dw0(r3));
7452 assign(result, binop(Iop_Sub64, mkexpr(op2), mkexpr(op3)));
7453 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_64, op2, op3);
7454 put_gpr_dw0(r1, mkexpr(result));
7455
7456 return "sgrk";
7457}
7458
7459static HChar *
7460s390_irgen_S(UChar r1, IRTemp op2addr)
7461{
7462 IRTemp op1 = newTemp(Ity_I32);
7463 IRTemp op2 = newTemp(Ity_I32);
7464 IRTemp result = newTemp(Ity_I32);
7465
7466 assign(op1, get_gpr_w1(r1));
7467 assign(op2, load(Ity_I32, mkexpr(op2addr)));
7468 assign(result, binop(Iop_Sub32, mkexpr(op1), mkexpr(op2)));
7469 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_32, op1, op2);
7470 put_gpr_w1(r1, mkexpr(result));
7471
7472 return "s";
7473}
7474
7475static HChar *
7476s390_irgen_SY(UChar r1, IRTemp op2addr)
7477{
7478 IRTemp op1 = newTemp(Ity_I32);
7479 IRTemp op2 = newTemp(Ity_I32);
7480 IRTemp result = newTemp(Ity_I32);
7481
7482 assign(op1, get_gpr_w1(r1));
7483 assign(op2, load(Ity_I32, mkexpr(op2addr)));
7484 assign(result, binop(Iop_Sub32, mkexpr(op1), mkexpr(op2)));
7485 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_32, op1, op2);
7486 put_gpr_w1(r1, mkexpr(result));
7487
7488 return "sy";
7489}
7490
7491static HChar *
7492s390_irgen_SG(UChar r1, IRTemp op2addr)
7493{
7494 IRTemp op1 = newTemp(Ity_I64);
7495 IRTemp op2 = newTemp(Ity_I64);
7496 IRTemp result = newTemp(Ity_I64);
7497
7498 assign(op1, get_gpr_dw0(r1));
7499 assign(op2, load(Ity_I64, mkexpr(op2addr)));
7500 assign(result, binop(Iop_Sub64, mkexpr(op1), mkexpr(op2)));
7501 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_64, op1, op2);
7502 put_gpr_dw0(r1, mkexpr(result));
7503
7504 return "sg";
7505}
7506
7507static HChar *
7508s390_irgen_SGF(UChar r1, IRTemp op2addr)
7509{
7510 IRTemp op1 = newTemp(Ity_I64);
7511 IRTemp op2 = newTemp(Ity_I64);
7512 IRTemp result = newTemp(Ity_I64);
7513
7514 assign(op1, get_gpr_dw0(r1));
7515 assign(op2, unop(Iop_32Sto64, load(Ity_I32, mkexpr(op2addr))));
7516 assign(result, binop(Iop_Sub64, mkexpr(op1), mkexpr(op2)));
7517 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_64, op1, op2);
7518 put_gpr_dw0(r1, mkexpr(result));
7519
7520 return "sgf";
7521}
7522
7523static HChar *
7524s390_irgen_SH(UChar r1, IRTemp op2addr)
7525{
7526 IRTemp op1 = newTemp(Ity_I32);
7527 IRTemp op2 = newTemp(Ity_I32);
7528 IRTemp result = newTemp(Ity_I32);
7529
7530 assign(op1, get_gpr_w1(r1));
7531 assign(op2, unop(Iop_16Sto32, load(Ity_I16, mkexpr(op2addr))));
7532 assign(result, binop(Iop_Sub32, mkexpr(op1), mkexpr(op2)));
7533 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_32, op1, op2);
7534 put_gpr_w1(r1, mkexpr(result));
7535
7536 return "sh";
7537}
7538
7539static HChar *
7540s390_irgen_SHY(UChar r1, IRTemp op2addr)
7541{
7542 IRTemp op1 = newTemp(Ity_I32);
7543 IRTemp op2 = newTemp(Ity_I32);
7544 IRTemp result = newTemp(Ity_I32);
7545
7546 assign(op1, get_gpr_w1(r1));
7547 assign(op2, unop(Iop_16Sto32, load(Ity_I16, mkexpr(op2addr))));
7548 assign(result, binop(Iop_Sub32, mkexpr(op1), mkexpr(op2)));
7549 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_32, op1, op2);
7550 put_gpr_w1(r1, mkexpr(result));
7551
7552 return "shy";
7553}
7554
7555static HChar *
7556s390_irgen_SHHHR(UChar r3 __attribute__((unused)), UChar r1, UChar r2)
7557{
7558 IRTemp op2 = newTemp(Ity_I32);
7559 IRTemp op3 = newTemp(Ity_I32);
7560 IRTemp result = newTemp(Ity_I32);
7561
7562 assign(op2, get_gpr_w0(r1));
7563 assign(op3, get_gpr_w0(r2));
7564 assign(result, binop(Iop_Sub32, mkexpr(op2), mkexpr(op3)));
7565 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_32, op2, op3);
7566 put_gpr_w0(r1, mkexpr(result));
7567
7568 return "shhhr";
7569}
7570
7571static HChar *
7572s390_irgen_SHHLR(UChar r3 __attribute__((unused)), UChar r1, UChar r2)
7573{
7574 IRTemp op2 = newTemp(Ity_I32);
7575 IRTemp op3 = newTemp(Ity_I32);
7576 IRTemp result = newTemp(Ity_I32);
7577
7578 assign(op2, get_gpr_w0(r1));
7579 assign(op3, get_gpr_w1(r2));
7580 assign(result, binop(Iop_Sub32, mkexpr(op2), mkexpr(op3)));
7581 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_32, op2, op3);
7582 put_gpr_w0(r1, mkexpr(result));
7583
7584 return "shhlr";
7585}
7586
7587static HChar *
7588s390_irgen_SLR(UChar r1, UChar r2)
7589{
7590 IRTemp op1 = newTemp(Ity_I32);
7591 IRTemp op2 = newTemp(Ity_I32);
7592 IRTemp result = newTemp(Ity_I32);
7593
7594 assign(op1, get_gpr_w1(r1));
7595 assign(op2, get_gpr_w1(r2));
7596 assign(result, binop(Iop_Sub32, mkexpr(op1), mkexpr(op2)));
7597 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_SUB_32, op1, op2);
7598 put_gpr_w1(r1, mkexpr(result));
7599
7600 return "slr";
7601}
7602
7603static HChar *
7604s390_irgen_SLGR(UChar r1, UChar r2)
7605{
7606 IRTemp op1 = newTemp(Ity_I64);
7607 IRTemp op2 = newTemp(Ity_I64);
7608 IRTemp result = newTemp(Ity_I64);
7609
7610 assign(op1, get_gpr_dw0(r1));
7611 assign(op2, get_gpr_dw0(r2));
7612 assign(result, binop(Iop_Sub64, mkexpr(op1), mkexpr(op2)));
7613 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_SUB_64, op1, op2);
7614 put_gpr_dw0(r1, mkexpr(result));
7615
7616 return "slgr";
7617}
7618
7619static HChar *
7620s390_irgen_SLGFR(UChar r1, UChar r2)
7621{
7622 IRTemp op1 = newTemp(Ity_I64);
7623 IRTemp op2 = newTemp(Ity_I64);
7624 IRTemp result = newTemp(Ity_I64);
7625
7626 assign(op1, get_gpr_dw0(r1));
7627 assign(op2, unop(Iop_32Uto64, get_gpr_w1(r2)));
7628 assign(result, binop(Iop_Sub64, mkexpr(op1), mkexpr(op2)));
7629 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_SUB_64, op1, op2);
7630 put_gpr_dw0(r1, mkexpr(result));
7631
7632 return "slgfr";
7633}
7634
7635static HChar *
7636s390_irgen_SLRK(UChar r3, UChar r1, UChar r2)
7637{
7638 IRTemp op2 = newTemp(Ity_I32);
7639 IRTemp op3 = newTemp(Ity_I32);
7640 IRTemp result = newTemp(Ity_I32);
7641
7642 assign(op2, get_gpr_w1(r2));
7643 assign(op3, get_gpr_w1(r3));
7644 assign(result, binop(Iop_Sub32, mkexpr(op2), mkexpr(op3)));
7645 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_SUB_32, op2, op3);
7646 put_gpr_w1(r1, mkexpr(result));
7647
7648 return "slrk";
7649}
7650
7651static HChar *
7652s390_irgen_SLGRK(UChar r3, UChar r1, UChar r2)
7653{
7654 IRTemp op2 = newTemp(Ity_I64);
7655 IRTemp op3 = newTemp(Ity_I64);
7656 IRTemp result = newTemp(Ity_I64);
7657
7658 assign(op2, get_gpr_dw0(r2));
7659 assign(op3, get_gpr_dw0(r3));
7660 assign(result, binop(Iop_Sub64, mkexpr(op2), mkexpr(op3)));
7661 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_SUB_64, op2, op3);
7662 put_gpr_dw0(r1, mkexpr(result));
7663
7664 return "slgrk";
7665}
7666
7667static HChar *
7668s390_irgen_SL(UChar r1, IRTemp op2addr)
7669{
7670 IRTemp op1 = newTemp(Ity_I32);
7671 IRTemp op2 = newTemp(Ity_I32);
7672 IRTemp result = newTemp(Ity_I32);
7673
7674 assign(op1, get_gpr_w1(r1));
7675 assign(op2, load(Ity_I32, mkexpr(op2addr)));
7676 assign(result, binop(Iop_Sub32, mkexpr(op1), mkexpr(op2)));
7677 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_SUB_32, op1, op2);
7678 put_gpr_w1(r1, mkexpr(result));
7679
7680 return "sl";
7681}
7682
7683static HChar *
7684s390_irgen_SLY(UChar r1, IRTemp op2addr)
7685{
7686 IRTemp op1 = newTemp(Ity_I32);
7687 IRTemp op2 = newTemp(Ity_I32);
7688 IRTemp result = newTemp(Ity_I32);
7689
7690 assign(op1, get_gpr_w1(r1));
7691 assign(op2, load(Ity_I32, mkexpr(op2addr)));
7692 assign(result, binop(Iop_Sub32, mkexpr(op1), mkexpr(op2)));
7693 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_SUB_32, op1, op2);
7694 put_gpr_w1(r1, mkexpr(result));
7695
7696 return "sly";
7697}
7698
7699static HChar *
7700s390_irgen_SLG(UChar r1, IRTemp op2addr)
7701{
7702 IRTemp op1 = newTemp(Ity_I64);
7703 IRTemp op2 = newTemp(Ity_I64);
7704 IRTemp result = newTemp(Ity_I64);
7705
7706 assign(op1, get_gpr_dw0(r1));
7707 assign(op2, load(Ity_I64, mkexpr(op2addr)));
7708 assign(result, binop(Iop_Sub64, mkexpr(op1), mkexpr(op2)));
7709 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_SUB_64, op1, op2);
7710 put_gpr_dw0(r1, mkexpr(result));
7711
7712 return "slg";
7713}
7714
7715static HChar *
7716s390_irgen_SLGF(UChar r1, IRTemp op2addr)
7717{
7718 IRTemp op1 = newTemp(Ity_I64);
7719 IRTemp op2 = newTemp(Ity_I64);
7720 IRTemp result = newTemp(Ity_I64);
7721
7722 assign(op1, get_gpr_dw0(r1));
7723 assign(op2, unop(Iop_32Uto64, load(Ity_I32, mkexpr(op2addr))));
7724 assign(result, binop(Iop_Sub64, mkexpr(op1), mkexpr(op2)));
7725 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_SUB_64, op1, op2);
7726 put_gpr_dw0(r1, mkexpr(result));
7727
7728 return "slgf";
7729}
7730
7731static HChar *
7732s390_irgen_SLFI(UChar r1, UInt i2)
7733{
7734 IRTemp op1 = newTemp(Ity_I32);
7735 UInt op2;
7736 IRTemp result = newTemp(Ity_I32);
7737
7738 assign(op1, get_gpr_w1(r1));
7739 op2 = i2;
7740 assign(result, binop(Iop_Sub32, mkexpr(op1), mkU32(op2)));
7741 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_SUB_32, op1, mktemp(Ity_I32,
7742 mkU32(op2)));
7743 put_gpr_w1(r1, mkexpr(result));
7744
7745 return "slfi";
7746}
7747
7748static HChar *
7749s390_irgen_SLGFI(UChar r1, UInt i2)
7750{
7751 IRTemp op1 = newTemp(Ity_I64);
7752 ULong op2;
7753 IRTemp result = newTemp(Ity_I64);
7754
7755 assign(op1, get_gpr_dw0(r1));
7756 op2 = (ULong)i2;
7757 assign(result, binop(Iop_Sub64, mkexpr(op1), mkU64(op2)));
7758 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_SUB_64, op1, mktemp(Ity_I64,
7759 mkU64(op2)));
7760 put_gpr_dw0(r1, mkexpr(result));
7761
7762 return "slgfi";
7763}
7764
7765static HChar *
7766s390_irgen_SLHHHR(UChar r3 __attribute__((unused)), UChar r1, UChar r2)
7767{
7768 IRTemp op2 = newTemp(Ity_I32);
7769 IRTemp op3 = newTemp(Ity_I32);
7770 IRTemp result = newTemp(Ity_I32);
7771
7772 assign(op2, get_gpr_w0(r1));
7773 assign(op3, get_gpr_w0(r2));
7774 assign(result, binop(Iop_Sub32, mkexpr(op2), mkexpr(op3)));
7775 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_SUB_32, op2, op3);
7776 put_gpr_w0(r1, mkexpr(result));
7777
7778 return "slhhhr";
7779}
7780
7781static HChar *
7782s390_irgen_SLHHLR(UChar r3 __attribute__((unused)), UChar r1, UChar r2)
7783{
7784 IRTemp op2 = newTemp(Ity_I32);
7785 IRTemp op3 = newTemp(Ity_I32);
7786 IRTemp result = newTemp(Ity_I32);
7787
7788 assign(op2, get_gpr_w0(r1));
7789 assign(op3, get_gpr_w1(r2));
7790 assign(result, binop(Iop_Sub32, mkexpr(op2), mkexpr(op3)));
7791 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_SUB_32, op2, op3);
7792 put_gpr_w0(r1, mkexpr(result));
7793
7794 return "slhhlr";
7795}
7796
7797static HChar *
7798s390_irgen_SLBR(UChar r1, UChar r2)
7799{
7800 IRTemp op1 = newTemp(Ity_I32);
7801 IRTemp op2 = newTemp(Ity_I32);
7802 IRTemp result = newTemp(Ity_I32);
7803 IRTemp borrow_in = newTemp(Ity_I32);
7804
7805 assign(op1, get_gpr_w1(r1));
7806 assign(op2, get_gpr_w1(r2));
7807 assign(borrow_in, binop(Iop_Sub32, mkU32(1), binop(Iop_Shr32,
7808 s390_call_calculate_cc(), mkU8(1))));
7809 assign(result, binop(Iop_Sub32, binop(Iop_Sub32, mkexpr(op1), mkexpr(op2)),
7810 mkexpr(borrow_in)));
7811 s390_cc_thunk_putZZZ(S390_CC_OP_UNSIGNED_SUBB_32, op1, op2, borrow_in);
7812 put_gpr_w1(r1, mkexpr(result));
7813
7814 return "slbr";
7815}
7816
7817static HChar *
7818s390_irgen_SLBGR(UChar r1, UChar r2)
7819{
7820 IRTemp op1 = newTemp(Ity_I64);
7821 IRTemp op2 = newTemp(Ity_I64);
7822 IRTemp result = newTemp(Ity_I64);
7823 IRTemp borrow_in = newTemp(Ity_I64);
7824
7825 assign(op1, get_gpr_dw0(r1));
7826 assign(op2, get_gpr_dw0(r2));
7827 assign(borrow_in, unop(Iop_32Uto64, binop(Iop_Sub32, mkU32(1),
7828 binop(Iop_Shr32, s390_call_calculate_cc(), mkU8(1)))));
7829 assign(result, binop(Iop_Sub64, binop(Iop_Sub64, mkexpr(op1), mkexpr(op2)),
7830 mkexpr(borrow_in)));
7831 s390_cc_thunk_putZZZ(S390_CC_OP_UNSIGNED_SUBB_64, op1, op2, borrow_in);
7832 put_gpr_dw0(r1, mkexpr(result));
7833
7834 return "slbgr";
7835}
7836
7837static HChar *
7838s390_irgen_SLB(UChar r1, IRTemp op2addr)
7839{
7840 IRTemp op1 = newTemp(Ity_I32);
7841 IRTemp op2 = newTemp(Ity_I32);
7842 IRTemp result = newTemp(Ity_I32);
7843 IRTemp borrow_in = newTemp(Ity_I32);
7844
7845 assign(op1, get_gpr_w1(r1));
7846 assign(op2, load(Ity_I32, mkexpr(op2addr)));
7847 assign(borrow_in, binop(Iop_Sub32, mkU32(1), binop(Iop_Shr32,
7848 s390_call_calculate_cc(), mkU8(1))));
7849 assign(result, binop(Iop_Sub32, binop(Iop_Sub32, mkexpr(op1), mkexpr(op2)),
7850 mkexpr(borrow_in)));
7851 s390_cc_thunk_putZZZ(S390_CC_OP_UNSIGNED_SUBB_32, op1, op2, borrow_in);
7852 put_gpr_w1(r1, mkexpr(result));
7853
7854 return "slb";
7855}
7856
7857static HChar *
7858s390_irgen_SLBG(UChar r1, IRTemp op2addr)
7859{
7860 IRTemp op1 = newTemp(Ity_I64);
7861 IRTemp op2 = newTemp(Ity_I64);
7862 IRTemp result = newTemp(Ity_I64);
7863 IRTemp borrow_in = newTemp(Ity_I64);
7864
7865 assign(op1, get_gpr_dw0(r1));
7866 assign(op2, load(Ity_I64, mkexpr(op2addr)));
7867 assign(borrow_in, unop(Iop_32Uto64, binop(Iop_Sub32, mkU32(1),
7868 binop(Iop_Shr32, s390_call_calculate_cc(), mkU8(1)))));
7869 assign(result, binop(Iop_Sub64, binop(Iop_Sub64, mkexpr(op1), mkexpr(op2)),
7870 mkexpr(borrow_in)));
7871 s390_cc_thunk_putZZZ(S390_CC_OP_UNSIGNED_SUBB_64, op1, op2, borrow_in);
7872 put_gpr_dw0(r1, mkexpr(result));
7873
7874 return "slbg";
7875}
7876
7877static HChar *
7878s390_irgen_SVC(UChar i)
7879{
7880 IRTemp sysno = newTemp(Ity_I64);
7881
7882 if (i != 0) {
7883 assign(sysno, mkU64(i));
7884 } else {
7885 assign(sysno, unop(Iop_32Uto64, get_gpr_w1(1)));
7886 }
7887 system_call(mkexpr(sysno));
7888
7889 return "svc";
7890}
7891
7892static HChar *
sewardj2019a972011-03-07 16:04:07 +00007893s390_irgen_TM(UChar i2, IRTemp op1addr)
7894{
7895 UChar mask;
7896 IRTemp value = newTemp(Ity_I8);
7897
7898 mask = i2;
7899 assign(value, load(Ity_I8, mkexpr(op1addr)));
7900 s390_cc_thunk_putZZ(S390_CC_OP_TEST_UNDER_MASK_8, value, mktemp(Ity_I8,
7901 mkU8(mask)));
7902
7903 return "tm";
7904}
7905
7906static HChar *
7907s390_irgen_TMY(UChar i2, IRTemp op1addr)
7908{
7909 UChar mask;
7910 IRTemp value = newTemp(Ity_I8);
7911
7912 mask = i2;
7913 assign(value, load(Ity_I8, mkexpr(op1addr)));
7914 s390_cc_thunk_putZZ(S390_CC_OP_TEST_UNDER_MASK_8, value, mktemp(Ity_I8,
7915 mkU8(mask)));
7916
7917 return "tmy";
7918}
7919
7920static HChar *
7921s390_irgen_TMHH(UChar r1, UShort i2)
7922{
7923 UShort mask;
7924 IRTemp value = newTemp(Ity_I16);
7925
7926 mask = i2;
7927 assign(value, get_gpr_hw0(r1));
7928 s390_cc_thunk_putZZ(S390_CC_OP_TEST_UNDER_MASK_16, value, mktemp(Ity_I16,
7929 mkU16(mask)));
7930
7931 return "tmhh";
7932}
7933
7934static HChar *
7935s390_irgen_TMHL(UChar r1, UShort i2)
7936{
7937 UShort mask;
7938 IRTemp value = newTemp(Ity_I16);
7939
7940 mask = i2;
7941 assign(value, get_gpr_hw1(r1));
7942 s390_cc_thunk_putZZ(S390_CC_OP_TEST_UNDER_MASK_16, value, mktemp(Ity_I16,
7943 mkU16(mask)));
7944
7945 return "tmhl";
7946}
7947
7948static HChar *
7949s390_irgen_TMLH(UChar r1, UShort i2)
7950{
7951 UShort mask;
7952 IRTemp value = newTemp(Ity_I16);
7953
7954 mask = i2;
7955 assign(value, get_gpr_hw2(r1));
7956 s390_cc_thunk_putZZ(S390_CC_OP_TEST_UNDER_MASK_16, value, mktemp(Ity_I16,
7957 mkU16(mask)));
7958
7959 return "tmlh";
7960}
7961
7962static HChar *
7963s390_irgen_TMLL(UChar r1, UShort i2)
7964{
7965 UShort mask;
7966 IRTemp value = newTemp(Ity_I16);
7967
7968 mask = i2;
7969 assign(value, get_gpr_hw3(r1));
7970 s390_cc_thunk_putZZ(S390_CC_OP_TEST_UNDER_MASK_16, value, mktemp(Ity_I16,
7971 mkU16(mask)));
7972
7973 return "tmll";
7974}
7975
7976static HChar *
7977s390_irgen_EFPC(UChar r1)
7978{
7979 put_gpr_w1(r1, get_fpc_w0());
7980
7981 return "efpc";
7982}
7983
7984static HChar *
7985s390_irgen_LER(UChar r1, UChar r2)
7986{
7987 put_fpr_w0(r1, get_fpr_w0(r2));
7988
7989 return "ler";
7990}
7991
7992static HChar *
7993s390_irgen_LDR(UChar r1, UChar r2)
7994{
7995 put_fpr_dw0(r1, get_fpr_dw0(r2));
7996
7997 return "ldr";
7998}
7999
8000static HChar *
8001s390_irgen_LXR(UChar r1, UChar r2)
8002{
8003 put_fpr_dw0(r1, get_fpr_dw0(r2));
8004 put_fpr_dw0(r1 + 2, get_fpr_dw0(r2 + 2));
8005
8006 return "lxr";
8007}
8008
8009static HChar *
8010s390_irgen_LE(UChar r1, IRTemp op2addr)
8011{
8012 put_fpr_w0(r1, load(Ity_F32, mkexpr(op2addr)));
8013
8014 return "le";
8015}
8016
8017static HChar *
8018s390_irgen_LD(UChar r1, IRTemp op2addr)
8019{
8020 put_fpr_dw0(r1, load(Ity_F64, mkexpr(op2addr)));
8021
8022 return "ld";
8023}
8024
8025static HChar *
8026s390_irgen_LEY(UChar r1, IRTemp op2addr)
8027{
8028 put_fpr_w0(r1, load(Ity_F32, mkexpr(op2addr)));
8029
8030 return "ley";
8031}
8032
8033static HChar *
8034s390_irgen_LDY(UChar r1, IRTemp op2addr)
8035{
8036 put_fpr_dw0(r1, load(Ity_F64, mkexpr(op2addr)));
8037
8038 return "ldy";
8039}
8040
8041static HChar *
8042s390_irgen_LFPC(IRTemp op2addr)
8043{
8044 put_fpc_w0(load(Ity_I32, mkexpr(op2addr)));
8045
8046 return "lfpc";
8047}
8048
8049static HChar *
8050s390_irgen_LZER(UChar r1)
8051{
8052 put_fpr_w0(r1, mkF32i(0x0));
8053
8054 return "lzer";
8055}
8056
8057static HChar *
8058s390_irgen_LZDR(UChar r1)
8059{
8060 put_fpr_dw0(r1, mkF64i(0x0));
8061
8062 return "lzdr";
8063}
8064
8065static HChar *
8066s390_irgen_LZXR(UChar r1)
8067{
8068 put_fpr_dw0(r1, mkF64i(0x0));
8069 put_fpr_dw0(r1 + 2, mkF64i(0x0));
8070
8071 return "lzxr";
8072}
8073
8074static HChar *
8075s390_irgen_SRNM(IRTemp op2addr)
8076{
8077 UInt mask;
8078
8079 mask = 3;
8080 put_fpc_w0(binop(Iop_Or32, binop(Iop_And32, get_fpc_w0(), mkU32(~mask)),
8081 binop(Iop_And32, unop(Iop_64to32, mkexpr(op2addr)), mkU32(mask)))
8082 );
8083
8084 return "srnm";
8085}
8086
8087static HChar *
8088s390_irgen_SFPC(UChar r1)
8089{
8090 put_fpc_w0(get_gpr_w1(r1));
8091
8092 return "sfpc";
8093}
8094
8095static HChar *
8096s390_irgen_STE(UChar r1, IRTemp op2addr)
8097{
8098 store(mkexpr(op2addr), get_fpr_w0(r1));
8099
8100 return "ste";
8101}
8102
8103static HChar *
8104s390_irgen_STD(UChar r1, IRTemp op2addr)
8105{
8106 store(mkexpr(op2addr), get_fpr_dw0(r1));
8107
8108 return "std";
8109}
8110
8111static HChar *
8112s390_irgen_STEY(UChar r1, IRTemp op2addr)
8113{
8114 store(mkexpr(op2addr), get_fpr_w0(r1));
8115
8116 return "stey";
8117}
8118
8119static HChar *
8120s390_irgen_STDY(UChar r1, IRTemp op2addr)
8121{
8122 store(mkexpr(op2addr), get_fpr_dw0(r1));
8123
8124 return "stdy";
8125}
8126
8127static HChar *
8128s390_irgen_STFPC(IRTemp op2addr)
8129{
8130 store(mkexpr(op2addr), get_fpc_w0());
8131
8132 return "stfpc";
8133}
8134
8135static HChar *
8136s390_irgen_AEBR(UChar r1, UChar r2)
8137{
8138 IRTemp op1 = newTemp(Ity_F32);
8139 IRTemp op2 = newTemp(Ity_F32);
8140 IRTemp result = newTemp(Ity_F32);
8141
8142 assign(op1, get_fpr_w0(r1));
8143 assign(op2, get_fpr_w0(r2));
8144 assign(result, triop(Iop_AddF32, mkU32(Irrm_NEAREST), mkexpr(op1),
8145 mkexpr(op2)));
8146 s390_cc_thunk_putF(S390_CC_OP_BFP_RESULT_32, result);
8147 put_fpr_w0(r1, mkexpr(result));
8148
8149 return "aebr";
8150}
8151
8152static HChar *
8153s390_irgen_ADBR(UChar r1, UChar r2)
8154{
8155 IRTemp op1 = newTemp(Ity_F64);
8156 IRTemp op2 = newTemp(Ity_F64);
8157 IRTemp result = newTemp(Ity_F64);
8158
8159 assign(op1, get_fpr_dw0(r1));
8160 assign(op2, get_fpr_dw0(r2));
8161 assign(result, triop(Iop_AddF64, mkU32(Irrm_NEAREST), mkexpr(op1),
8162 mkexpr(op2)));
8163 s390_cc_thunk_putF(S390_CC_OP_BFP_RESULT_64, result);
8164 put_fpr_dw0(r1, mkexpr(result));
8165
8166 return "adbr";
8167}
8168
8169static HChar *
8170s390_irgen_AEB(UChar r1, IRTemp op2addr)
8171{
8172 IRTemp op1 = newTemp(Ity_F32);
8173 IRTemp op2 = newTemp(Ity_F32);
8174 IRTemp result = newTemp(Ity_F32);
8175
8176 assign(op1, get_fpr_w0(r1));
8177 assign(op2, load(Ity_F32, mkexpr(op2addr)));
8178 assign(result, triop(Iop_AddF32, mkU32(Irrm_NEAREST), mkexpr(op1),
8179 mkexpr(op2)));
8180 s390_cc_thunk_putF(S390_CC_OP_BFP_RESULT_32, result);
8181 put_fpr_w0(r1, mkexpr(result));
8182
8183 return "aeb";
8184}
8185
8186static HChar *
8187s390_irgen_ADB(UChar r1, IRTemp op2addr)
8188{
8189 IRTemp op1 = newTemp(Ity_F64);
8190 IRTemp op2 = newTemp(Ity_F64);
8191 IRTemp result = newTemp(Ity_F64);
8192
8193 assign(op1, get_fpr_dw0(r1));
8194 assign(op2, load(Ity_F64, mkexpr(op2addr)));
8195 assign(result, triop(Iop_AddF64, mkU32(Irrm_NEAREST), mkexpr(op1),
8196 mkexpr(op2)));
8197 s390_cc_thunk_putF(S390_CC_OP_BFP_RESULT_64, result);
8198 put_fpr_dw0(r1, mkexpr(result));
8199
8200 return "adb";
8201}
8202
8203static HChar *
8204s390_irgen_CEFBR(UChar r1, UChar r2)
8205{
8206 IRTemp op2 = newTemp(Ity_I32);
8207
8208 assign(op2, get_gpr_w1(r2));
8209 put_fpr_w0(r1, binop(Iop_I32StoF32, mkU32(Irrm_NEAREST), mkexpr(op2)));
8210
8211 return "cefbr";
8212}
8213
8214static HChar *
8215s390_irgen_CDFBR(UChar r1, UChar r2)
8216{
8217 IRTemp op2 = newTemp(Ity_I32);
8218
8219 assign(op2, get_gpr_w1(r2));
8220 put_fpr_dw0(r1, unop(Iop_I32StoF64, mkexpr(op2)));
8221
8222 return "cdfbr";
8223}
8224
8225static HChar *
8226s390_irgen_CEGBR(UChar r1, UChar r2)
8227{
8228 IRTemp op2 = newTemp(Ity_I64);
8229
8230 assign(op2, get_gpr_dw0(r2));
8231 put_fpr_w0(r1, binop(Iop_I64StoF32, mkU32(Irrm_NEAREST), mkexpr(op2)));
8232
8233 return "cegbr";
8234}
8235
8236static HChar *
8237s390_irgen_CDGBR(UChar r1, UChar r2)
8238{
8239 IRTemp op2 = newTemp(Ity_I64);
8240
8241 assign(op2, get_gpr_dw0(r2));
8242 put_fpr_dw0(r1, binop(Iop_I64StoF64, mkU32(Irrm_NEAREST), mkexpr(op2)));
8243
8244 return "cdgbr";
8245}
8246
8247static HChar *
8248s390_irgen_CFEBR(UChar r3, UChar r1, UChar r2)
8249{
8250 IRTemp op = newTemp(Ity_F32);
8251 IRTemp result = newTemp(Ity_I32);
8252
8253 assign(op, get_fpr_w0(r2));
8254 assign(result, binop(Iop_F32toI32S, mkU32(encode_rounding_mode(r3)),
8255 mkexpr(op)));
8256 put_gpr_w1(r1, mkexpr(result));
8257 s390_cc_thunk_putF(S390_CC_OP_BFP_32_TO_INT_32, op);
8258
8259 return "cfebr";
8260}
8261
8262static HChar *
8263s390_irgen_CFDBR(UChar r3, UChar r1, UChar r2)
8264{
8265 IRTemp op = newTemp(Ity_F64);
8266 IRTemp result = newTemp(Ity_I32);
8267
8268 assign(op, get_fpr_dw0(r2));
8269 assign(result, binop(Iop_F64toI32S, mkU32(encode_rounding_mode(r3)),
8270 mkexpr(op)));
8271 put_gpr_w1(r1, mkexpr(result));
8272 s390_cc_thunk_putF(S390_CC_OP_BFP_64_TO_INT_32, op);
8273
8274 return "cfdbr";
8275}
8276
8277static HChar *
8278s390_irgen_CGEBR(UChar r3, UChar r1, UChar r2)
8279{
8280 IRTemp op = newTemp(Ity_F32);
8281 IRTemp result = newTemp(Ity_I64);
8282
8283 assign(op, get_fpr_w0(r2));
8284 assign(result, binop(Iop_F32toI64S, mkU32(encode_rounding_mode(r3)),
8285 mkexpr(op)));
8286 put_gpr_dw0(r1, mkexpr(result));
8287 s390_cc_thunk_putF(S390_CC_OP_BFP_32_TO_INT_64, op);
8288
8289 return "cgebr";
8290}
8291
8292static HChar *
8293s390_irgen_CGDBR(UChar r3, UChar r1, UChar r2)
8294{
8295 IRTemp op = newTemp(Ity_F64);
8296 IRTemp result = newTemp(Ity_I64);
8297
8298 assign(op, get_fpr_dw0(r2));
8299 assign(result, binop(Iop_F64toI64S, mkU32(encode_rounding_mode(r3)),
8300 mkexpr(op)));
8301 put_gpr_dw0(r1, mkexpr(result));
8302 s390_cc_thunk_putF(S390_CC_OP_BFP_64_TO_INT_64, op);
8303
8304 return "cgdbr";
8305}
8306
8307static HChar *
8308s390_irgen_DEBR(UChar r1, UChar r2)
8309{
8310 IRTemp op1 = newTemp(Ity_F32);
8311 IRTemp op2 = newTemp(Ity_F32);
8312 IRTemp result = newTemp(Ity_F32);
8313
8314 assign(op1, get_fpr_w0(r1));
8315 assign(op2, get_fpr_w0(r2));
8316 assign(result, triop(Iop_DivF32, mkU32(Irrm_NEAREST), mkexpr(op1),
8317 mkexpr(op2)));
8318 put_fpr_w0(r1, mkexpr(result));
8319
8320 return "debr";
8321}
8322
8323static HChar *
8324s390_irgen_DDBR(UChar r1, UChar r2)
8325{
8326 IRTemp op1 = newTemp(Ity_F64);
8327 IRTemp op2 = newTemp(Ity_F64);
8328 IRTemp result = newTemp(Ity_F64);
8329
8330 assign(op1, get_fpr_dw0(r1));
8331 assign(op2, get_fpr_dw0(r2));
8332 assign(result, triop(Iop_DivF64, mkU32(Irrm_NEAREST), mkexpr(op1),
8333 mkexpr(op2)));
8334 put_fpr_dw0(r1, mkexpr(result));
8335
8336 return "ddbr";
8337}
8338
8339static HChar *
8340s390_irgen_DEB(UChar r1, IRTemp op2addr)
8341{
8342 IRTemp op1 = newTemp(Ity_F32);
8343 IRTemp op2 = newTemp(Ity_F32);
8344 IRTemp result = newTemp(Ity_F32);
8345
8346 assign(op1, get_fpr_w0(r1));
8347 assign(op2, load(Ity_F32, mkexpr(op2addr)));
8348 assign(result, triop(Iop_DivF32, mkU32(Irrm_NEAREST), mkexpr(op1),
8349 mkexpr(op2)));
8350 put_fpr_w0(r1, mkexpr(result));
8351
8352 return "deb";
8353}
8354
8355static HChar *
8356s390_irgen_DDB(UChar r1, IRTemp op2addr)
8357{
8358 IRTemp op1 = newTemp(Ity_F64);
8359 IRTemp op2 = newTemp(Ity_F64);
8360 IRTemp result = newTemp(Ity_F64);
8361
8362 assign(op1, get_fpr_dw0(r1));
8363 assign(op2, load(Ity_F64, mkexpr(op2addr)));
8364 assign(result, triop(Iop_DivF64, mkU32(Irrm_NEAREST), mkexpr(op1),
8365 mkexpr(op2)));
8366 put_fpr_dw0(r1, mkexpr(result));
8367
8368 return "ddb";
8369}
8370
8371static HChar *
8372s390_irgen_LTEBR(UChar r1, UChar r2)
8373{
8374 IRTemp result = newTemp(Ity_F32);
8375
8376 assign(result, get_fpr_w0(r2));
8377 put_fpr_w0(r1, mkexpr(result));
8378 s390_cc_thunk_putF(S390_CC_OP_BFP_RESULT_32, result);
8379
8380 return "ltebr";
8381}
8382
8383static HChar *
8384s390_irgen_LTDBR(UChar r1, UChar r2)
8385{
8386 IRTemp result = newTemp(Ity_F64);
8387
8388 assign(result, get_fpr_dw0(r2));
8389 put_fpr_dw0(r1, mkexpr(result));
8390 s390_cc_thunk_putF(S390_CC_OP_BFP_RESULT_64, result);
8391
8392 return "ltdbr";
8393}
8394
8395static HChar *
8396s390_irgen_LCEBR(UChar r1, UChar r2)
8397{
8398 IRTemp result = newTemp(Ity_F32);
8399
8400 assign(result, unop(Iop_NegF32, get_fpr_w0(r2)));
8401 put_fpr_w0(r1, mkexpr(result));
8402 s390_cc_thunk_putF(S390_CC_OP_BFP_RESULT_32, result);
8403
8404 return "lcebr";
8405}
8406
8407static HChar *
8408s390_irgen_LCDBR(UChar r1, UChar r2)
8409{
8410 IRTemp result = newTemp(Ity_F64);
8411
8412 assign(result, unop(Iop_NegF64, get_fpr_dw0(r2)));
8413 put_fpr_dw0(r1, mkexpr(result));
8414 s390_cc_thunk_putF(S390_CC_OP_BFP_RESULT_64, result);
8415
8416 return "lcdbr";
8417}
8418
8419static HChar *
8420s390_irgen_LDEBR(UChar r1, UChar r2)
8421{
8422 IRTemp op = newTemp(Ity_F32);
8423
8424 assign(op, get_fpr_w0(r2));
8425 put_fpr_dw0(r1, unop(Iop_F32toF64, mkexpr(op)));
8426
8427 return "ldebr";
8428}
8429
8430static HChar *
8431s390_irgen_LDEB(UChar r1, IRTemp op2addr)
8432{
8433 IRTemp op = newTemp(Ity_F32);
8434
8435 assign(op, load(Ity_F32, mkexpr(op2addr)));
8436 put_fpr_dw0(r1, unop(Iop_F32toF64, mkexpr(op)));
8437
8438 return "ldeb";
8439}
8440
8441static HChar *
8442s390_irgen_LEDBR(UChar r1, UChar r2)
8443{
8444 IRTemp op = newTemp(Ity_F64);
8445
8446 assign(op, get_fpr_dw0(r2));
8447 put_fpr_w0(r1, binop(Iop_F64toF32, mkU32(Irrm_NEAREST), mkexpr(op)));
8448
8449 return "ledbr";
8450}
8451
8452static HChar *
8453s390_irgen_MEEBR(UChar r1, UChar r2)
8454{
8455 IRTemp op1 = newTemp(Ity_F32);
8456 IRTemp op2 = newTemp(Ity_F32);
8457 IRTemp result = newTemp(Ity_F32);
8458
8459 assign(op1, get_fpr_w0(r1));
8460 assign(op2, get_fpr_w0(r2));
8461 assign(result, triop(Iop_MulF32, mkU32(Irrm_NEAREST), mkexpr(op1),
8462 mkexpr(op2)));
8463 put_fpr_w0(r1, mkexpr(result));
8464
8465 return "meebr";
8466}
8467
8468static HChar *
8469s390_irgen_MDBR(UChar r1, UChar r2)
8470{
8471 IRTemp op1 = newTemp(Ity_F64);
8472 IRTemp op2 = newTemp(Ity_F64);
8473 IRTemp result = newTemp(Ity_F64);
8474
8475 assign(op1, get_fpr_dw0(r1));
8476 assign(op2, get_fpr_dw0(r2));
8477 assign(result, triop(Iop_MulF64, mkU32(Irrm_NEAREST), mkexpr(op1),
8478 mkexpr(op2)));
8479 put_fpr_dw0(r1, mkexpr(result));
8480
8481 return "mdbr";
8482}
8483
8484static HChar *
8485s390_irgen_MEEB(UChar r1, IRTemp op2addr)
8486{
8487 IRTemp op1 = newTemp(Ity_F32);
8488 IRTemp op2 = newTemp(Ity_F32);
8489 IRTemp result = newTemp(Ity_F32);
8490
8491 assign(op1, get_fpr_w0(r1));
8492 assign(op2, load(Ity_F32, mkexpr(op2addr)));
8493 assign(result, triop(Iop_MulF32, mkU32(Irrm_NEAREST), mkexpr(op1),
8494 mkexpr(op2)));
8495 put_fpr_w0(r1, mkexpr(result));
8496
8497 return "meeb";
8498}
8499
8500static HChar *
8501s390_irgen_MDB(UChar r1, IRTemp op2addr)
8502{
8503 IRTemp op1 = newTemp(Ity_F64);
8504 IRTemp op2 = newTemp(Ity_F64);
8505 IRTemp result = newTemp(Ity_F64);
8506
8507 assign(op1, get_fpr_dw0(r1));
8508 assign(op2, load(Ity_F64, mkexpr(op2addr)));
8509 assign(result, triop(Iop_MulF64, mkU32(Irrm_NEAREST), mkexpr(op1),
8510 mkexpr(op2)));
8511 put_fpr_dw0(r1, mkexpr(result));
8512
8513 return "mdb";
8514}
8515
8516static HChar *
8517s390_irgen_SEBR(UChar r1, UChar r2)
8518{
8519 IRTemp op1 = newTemp(Ity_F32);
8520 IRTemp op2 = newTemp(Ity_F32);
8521 IRTemp result = newTemp(Ity_F32);
8522
8523 assign(op1, get_fpr_w0(r1));
8524 assign(op2, get_fpr_w0(r2));
8525 assign(result, triop(Iop_SubF32, mkU32(Irrm_NEAREST), mkexpr(op1),
8526 mkexpr(op2)));
8527 s390_cc_thunk_putF(S390_CC_OP_BFP_RESULT_32, result);
8528 put_fpr_w0(r1, mkexpr(result));
8529
8530 return "sebr";
8531}
8532
8533static HChar *
8534s390_irgen_SDBR(UChar r1, UChar r2)
8535{
8536 IRTemp op1 = newTemp(Ity_F64);
8537 IRTemp op2 = newTemp(Ity_F64);
8538 IRTemp result = newTemp(Ity_F64);
8539
8540 assign(op1, get_fpr_dw0(r1));
8541 assign(op2, get_fpr_dw0(r2));
8542 assign(result, triop(Iop_SubF64, mkU32(Irrm_NEAREST), mkexpr(op1),
8543 mkexpr(op2)));
8544 s390_cc_thunk_putF(S390_CC_OP_BFP_RESULT_64, result);
8545 put_fpr_dw0(r1, mkexpr(result));
8546
8547 return "sdbr";
8548}
8549
8550static HChar *
8551s390_irgen_SEB(UChar r1, IRTemp op2addr)
8552{
8553 IRTemp op1 = newTemp(Ity_F32);
8554 IRTemp op2 = newTemp(Ity_F32);
8555 IRTemp result = newTemp(Ity_F32);
8556
8557 assign(op1, get_fpr_w0(r1));
8558 assign(op2, load(Ity_F32, mkexpr(op2addr)));
8559 assign(result, triop(Iop_SubF32, mkU32(Irrm_NEAREST), mkexpr(op1),
8560 mkexpr(op2)));
8561 s390_cc_thunk_putF(S390_CC_OP_BFP_RESULT_32, result);
8562 put_fpr_w0(r1, mkexpr(result));
8563
8564 return "seb";
8565}
8566
8567static HChar *
8568s390_irgen_SDB(UChar r1, IRTemp op2addr)
8569{
8570 IRTemp op1 = newTemp(Ity_F64);
8571 IRTemp op2 = newTemp(Ity_F64);
8572 IRTemp result = newTemp(Ity_F64);
8573
8574 assign(op1, get_fpr_dw0(r1));
8575 assign(op2, load(Ity_F64, mkexpr(op2addr)));
8576 assign(result, triop(Iop_SubF64, mkU32(Irrm_NEAREST), mkexpr(op1),
8577 mkexpr(op2)));
8578 s390_cc_thunk_putF(S390_CC_OP_BFP_RESULT_64, result);
8579 put_fpr_dw0(r1, mkexpr(result));
8580
8581 return "sdb";
8582}
8583
8584
8585static HChar *
8586s390_irgen_CLC(UChar length, IRTemp start1, IRTemp start2)
8587{
8588 IRTemp current1 = newTemp(Ity_I8);
8589 IRTemp current2 = newTemp(Ity_I8);
8590 IRTemp counter = newTemp(Ity_I64);
8591
8592 assign(counter, get_counter_dw0());
8593 put_counter_dw0(mkU64(0));
8594
8595 assign(current1, load(Ity_I8, binop(Iop_Add64, mkexpr(start1),
8596 mkexpr(counter))));
8597 assign(current2, load(Ity_I8, binop(Iop_Add64, mkexpr(start2),
8598 mkexpr(counter))));
8599 s390_cc_thunk_put2(S390_CC_OP_UNSIGNED_COMPARE, current1, current2,
8600 False);
8601
8602 /* Both fields differ ? */
8603 if_condition_goto(binop(Iop_CmpNE8, mkexpr(current1), mkexpr(current2)),
8604 guest_IA_next_instr);
8605
8606 /* Check for end of field */
8607 put_counter_dw0(binop(Iop_Add64, mkexpr(counter), mkU64(1)));
8608 if_condition_goto(binop(Iop_CmpNE64, mkexpr(counter), mkU64(length)),
8609 guest_IA_curr_instr);
8610 put_counter_dw0(mkU64(0));
florian8844a632012-04-13 04:04:06 +00008611 dummy_put_IA();
sewardj2019a972011-03-07 16:04:07 +00008612
8613 return "clc";
8614}
8615
8616static HChar *
florianb0c9a132011-09-08 15:37:39 +00008617s390_irgen_CLCL(UChar r1, UChar r2)
8618{
8619 IRTemp addr1 = newTemp(Ity_I64);
8620 IRTemp addr2 = newTemp(Ity_I64);
8621 IRTemp addr1_load = newTemp(Ity_I64);
8622 IRTemp addr2_load = newTemp(Ity_I64);
8623 IRTemp len1 = newTemp(Ity_I32);
8624 IRTemp len2 = newTemp(Ity_I32);
8625 IRTemp r1p1 = newTemp(Ity_I32); /* contents of r1 + 1 */
8626 IRTemp r2p1 = newTemp(Ity_I32); /* contents of r2 + 1 */
8627 IRTemp single1 = newTemp(Ity_I8);
8628 IRTemp single2 = newTemp(Ity_I8);
8629 IRTemp pad = newTemp(Ity_I8);
8630
8631 assign(addr1, get_gpr_dw0(r1));
8632 assign(r1p1, get_gpr_w1(r1 + 1));
8633 assign(len1, binop(Iop_And32, mkexpr(r1p1), mkU32(0x00ffffff)));
8634 assign(addr2, get_gpr_dw0(r2));
8635 assign(r2p1, get_gpr_w1(r2 + 1));
8636 assign(len2, binop(Iop_And32, mkexpr(r2p1), mkU32(0x00ffffff)));
8637 assign(pad, get_gpr_b4(r2 + 1));
8638
8639 /* len1 == 0 and len2 == 0? Exit */
8640 s390_cc_set(0);
8641 if_condition_goto(binop(Iop_CmpEQ32, binop(Iop_Or32, mkexpr(len1),
8642 mkexpr(len2)), mkU32(0)),
8643 guest_IA_next_instr);
8644
8645 /* Because mkite evaluates both the then-clause and the else-clause
8646 we cannot load directly from addr1 here. If len1 is 0, then adddr1
8647 may be NULL and loading from there would segfault. So we provide a
8648 valid dummy address in that case. Loading from there does no harm and
8649 the value will be discarded at runtime. */
8650 assign(addr1_load,
8651 mkite(binop(Iop_CmpEQ32, mkexpr(len1), mkU32(0)),
8652 mkU64(guest_IA_curr_instr), mkexpr(addr1)));
8653 assign(single1,
8654 mkite(binop(Iop_CmpEQ32, mkexpr(len1), mkU32(0)),
8655 mkexpr(pad), load(Ity_I8, mkexpr(addr1_load))));
8656
8657 assign(addr2_load,
8658 mkite(binop(Iop_CmpEQ32, mkexpr(len2), mkU32(0)),
8659 mkU64(guest_IA_curr_instr), mkexpr(addr2)));
8660 assign(single2,
8661 mkite(binop(Iop_CmpEQ32, mkexpr(len2), mkU32(0)),
8662 mkexpr(pad), load(Ity_I8, mkexpr(addr2_load))));
8663
8664 s390_cc_thunk_put2(S390_CC_OP_UNSIGNED_COMPARE, single1, single2, False);
8665 /* Fields differ ? */
8666 if_condition_goto(binop(Iop_CmpNE8, mkexpr(single1), mkexpr(single2)),
8667 guest_IA_next_instr);
8668
8669 /* Update len1 and addr1, unless len1 == 0. */
8670 put_gpr_dw0(r1,
8671 mkite(binop(Iop_CmpEQ32, mkexpr(len1), mkU32(0)),
8672 mkexpr(addr1),
8673 binop(Iop_Add64, mkexpr(addr1), mkU64(1))));
8674
8675 /* When updating len1 we must not modify bits (r1+1)[0:39] */
8676 put_gpr_w1(r1 + 1,
8677 mkite(binop(Iop_CmpEQ32, mkexpr(len1), mkU32(0)),
8678 binop(Iop_And32, mkexpr(r1p1), mkU32(0xFF000000u)),
8679 binop(Iop_Sub32, mkexpr(r1p1), mkU32(1))));
8680
8681 /* Update len2 and addr2, unless len2 == 0. */
8682 put_gpr_dw0(r2,
8683 mkite(binop(Iop_CmpEQ32, mkexpr(len2), mkU32(0)),
8684 mkexpr(addr2),
8685 binop(Iop_Add64, mkexpr(addr2), mkU64(1))));
8686
8687 /* When updating len2 we must not modify bits (r2+1)[0:39] */
8688 put_gpr_w1(r2 + 1,
8689 mkite(binop(Iop_CmpEQ32, mkexpr(len2), mkU32(0)),
8690 binop(Iop_And32, mkexpr(r2p1), mkU32(0xFF000000u)),
8691 binop(Iop_Sub32, mkexpr(r2p1), mkU32(1))));
8692
8693 always_goto_and_chase(guest_IA_curr_instr);
8694
8695 return "clcl";
8696}
8697
8698static HChar *
sewardj2019a972011-03-07 16:04:07 +00008699s390_irgen_CLCLE(UChar r1, UChar r3, IRTemp pad2)
8700{
8701 IRTemp addr1, addr3, addr1_load, addr3_load, len1, len3, single1, single3;
8702
8703 addr1 = newTemp(Ity_I64);
8704 addr3 = newTemp(Ity_I64);
8705 addr1_load = newTemp(Ity_I64);
8706 addr3_load = newTemp(Ity_I64);
8707 len1 = newTemp(Ity_I64);
8708 len3 = newTemp(Ity_I64);
8709 single1 = newTemp(Ity_I8);
8710 single3 = newTemp(Ity_I8);
8711
8712 assign(addr1, get_gpr_dw0(r1));
8713 assign(len1, get_gpr_dw0(r1 + 1));
8714 assign(addr3, get_gpr_dw0(r3));
8715 assign(len3, get_gpr_dw0(r3 + 1));
8716
8717 /* len1 == 0 and len3 == 0? Exit */
8718 s390_cc_set(0);
8719 if_condition_goto(binop(Iop_CmpEQ64,binop(Iop_Or64, mkexpr(len1),
8720 mkexpr(len3)), mkU64(0)),
8721 guest_IA_next_instr);
8722
8723 /* A mux requires both ways to be possible. This is a way to prevent clcle
8724 from reading from addr1 if it should read from the pad. Since the pad
8725 has no address, just read from the instruction, we discard that anyway */
8726 assign(addr1_load,
florian6ad49522011-09-09 02:38:55 +00008727 mkite(binop(Iop_CmpEQ64, mkexpr(len1), mkU64(0)),
8728 mkU64(guest_IA_curr_instr), mkexpr(addr1)));
sewardj2019a972011-03-07 16:04:07 +00008729
8730 /* same for addr3 */
8731 assign(addr3_load,
florian6ad49522011-09-09 02:38:55 +00008732 mkite(binop(Iop_CmpEQ64, mkexpr(len3), mkU64(0)),
8733 mkU64(guest_IA_curr_instr), mkexpr(addr3)));
sewardj2019a972011-03-07 16:04:07 +00008734
8735 assign(single1,
florian6ad49522011-09-09 02:38:55 +00008736 mkite(binop(Iop_CmpEQ64, mkexpr(len1), mkU64(0)),
8737 unop(Iop_64to8, mkexpr(pad2)),
8738 load(Ity_I8, mkexpr(addr1_load))));
sewardj2019a972011-03-07 16:04:07 +00008739
8740 assign(single3,
florian6ad49522011-09-09 02:38:55 +00008741 mkite(binop(Iop_CmpEQ64, mkexpr(len3), mkU64(0)),
8742 unop(Iop_64to8, mkexpr(pad2)),
8743 load(Ity_I8, mkexpr(addr3_load))));
sewardj2019a972011-03-07 16:04:07 +00008744
8745 s390_cc_thunk_put2(S390_CC_OP_UNSIGNED_COMPARE, single1, single3, False);
8746 /* Both fields differ ? */
8747 if_condition_goto(binop(Iop_CmpNE8, mkexpr(single1), mkexpr(single3)),
8748 guest_IA_next_instr);
8749
8750 /* If a length in 0 we must not change this length and the address */
8751 put_gpr_dw0(r1,
florian6ad49522011-09-09 02:38:55 +00008752 mkite(binop(Iop_CmpEQ64, mkexpr(len1), mkU64(0)),
8753 mkexpr(addr1),
8754 binop(Iop_Add64, mkexpr(addr1), mkU64(1))));
sewardj2019a972011-03-07 16:04:07 +00008755
8756 put_gpr_dw0(r1 + 1,
florian6ad49522011-09-09 02:38:55 +00008757 mkite(binop(Iop_CmpEQ64, mkexpr(len1), mkU64(0)),
8758 mkU64(0), binop(Iop_Sub64, mkexpr(len1), mkU64(1))));
sewardj2019a972011-03-07 16:04:07 +00008759
8760 put_gpr_dw0(r3,
florian6ad49522011-09-09 02:38:55 +00008761 mkite(binop(Iop_CmpEQ64, mkexpr(len3), mkU64(0)),
8762 mkexpr(addr3),
8763 binop(Iop_Add64, mkexpr(addr3), mkU64(1))));
sewardj2019a972011-03-07 16:04:07 +00008764
8765 put_gpr_dw0(r3 + 1,
florian6ad49522011-09-09 02:38:55 +00008766 mkite(binop(Iop_CmpEQ64, mkexpr(len3), mkU64(0)),
8767 mkU64(0), binop(Iop_Sub64, mkexpr(len3), mkU64(1))));
sewardj2019a972011-03-07 16:04:07 +00008768
8769 /* The architecture requires that we exit with CC3 after a machine specific
8770 amount of bytes. We do that if len1+len3 % 4096 == 0 */
8771 s390_cc_set(3);
8772 if_condition_goto(binop(Iop_CmpEQ64,
8773 binop(Iop_And64,
8774 binop(Iop_Add64, mkexpr(len1), mkexpr(len3)),
8775 mkU64(0xfff)),
8776 mkU64(0)),
8777 guest_IA_next_instr);
8778
floriana64c2432011-07-16 02:11:50 +00008779 always_goto_and_chase(guest_IA_curr_instr);
sewardj2019a972011-03-07 16:04:07 +00008780
8781 return "clcle";
8782}
floriana64c2432011-07-16 02:11:50 +00008783
sewardj2019a972011-03-07 16:04:07 +00008784static void
8785s390_irgen_XC_EX(IRTemp length, IRTemp start1, IRTemp start2)
8786{
8787 IRTemp old1 = newTemp(Ity_I8);
8788 IRTemp old2 = newTemp(Ity_I8);
8789 IRTemp new1 = newTemp(Ity_I8);
8790 IRTemp counter = newTemp(Ity_I32);
8791 IRTemp addr1 = newTemp(Ity_I64);
8792
8793 assign(counter, get_counter_w0());
8794
8795 assign(addr1, binop(Iop_Add64, mkexpr(start1),
8796 unop(Iop_32Uto64, mkexpr(counter))));
8797
8798 assign(old1, load(Ity_I8, mkexpr(addr1)));
8799 assign(old2, load(Ity_I8, binop(Iop_Add64, mkexpr(start2),
8800 unop(Iop_32Uto64,mkexpr(counter)))));
8801 assign(new1, binop(Iop_Xor8, mkexpr(old1), mkexpr(old2)));
8802
8803 store(mkexpr(addr1),
florian6ad49522011-09-09 02:38:55 +00008804 mkite(binop(Iop_CmpEQ64, mkexpr(start1), mkexpr(start2)),
8805 mkU8(0), mkexpr(new1)));
sewardj2019a972011-03-07 16:04:07 +00008806 put_counter_w1(binop(Iop_Or32, unop(Iop_8Uto32, mkexpr(new1)),
8807 get_counter_w1()));
8808
8809 /* Check for end of field */
8810 put_counter_w0(binop(Iop_Add32, mkexpr(counter), mkU32(1)));
8811 if_condition_goto(binop(Iop_CmpNE32, mkexpr(counter), mkexpr(length)),
8812 guest_IA_curr_instr);
8813 s390_cc_thunk_put1(S390_CC_OP_BITWISE, mktemp(Ity_I32, get_counter_w1()),
8814 False);
8815 put_counter_dw0(mkU64(0));
8816}
8817
8818
8819static void
8820s390_irgen_CLC_EX(IRTemp length, IRTemp start1, IRTemp start2)
8821{
8822 IRTemp current1 = newTemp(Ity_I8);
8823 IRTemp current2 = newTemp(Ity_I8);
8824 IRTemp counter = newTemp(Ity_I64);
8825
8826 assign(counter, get_counter_dw0());
8827 put_counter_dw0(mkU64(0));
8828
8829 assign(current1, load(Ity_I8, binop(Iop_Add64, mkexpr(start1),
8830 mkexpr(counter))));
8831 assign(current2, load(Ity_I8, binop(Iop_Add64, mkexpr(start2),
8832 mkexpr(counter))));
8833 s390_cc_thunk_put2(S390_CC_OP_UNSIGNED_COMPARE, current1, current2,
8834 False);
8835
8836 /* Both fields differ ? */
8837 if_condition_goto(binop(Iop_CmpNE8, mkexpr(current1), mkexpr(current2)),
8838 guest_IA_next_instr);
8839
8840 /* Check for end of field */
8841 put_counter_dw0(binop(Iop_Add64, mkexpr(counter), mkU64(1)));
8842 if_condition_goto(binop(Iop_CmpNE64, mkexpr(counter), mkexpr(length)),
8843 guest_IA_curr_instr);
8844 put_counter_dw0(mkU64(0));
8845}
8846
8847static void
8848s390_irgen_MVC_EX(IRTemp length, IRTemp start1, IRTemp start2)
8849{
8850 IRTemp counter = newTemp(Ity_I64);
8851
8852 assign(counter, get_counter_dw0());
8853
8854 store(binop(Iop_Add64, mkexpr(start1), mkexpr(counter)),
8855 load(Ity_I8, binop(Iop_Add64, mkexpr(start2), mkexpr(counter))));
8856
8857 /* Check for end of field */
8858 put_counter_dw0(binop(Iop_Add64, mkexpr(counter), mkU64(1)));
8859 if_condition_goto(binop(Iop_CmpNE64, mkexpr(counter), mkexpr(length)),
8860 guest_IA_curr_instr);
8861 put_counter_dw0(mkU64(0));
8862}
8863
8864
8865
8866static void
8867s390_irgen_EX_SS(UChar r, IRTemp addr2,
8868void (*irgen)(IRTemp length, IRTemp start1, IRTemp start2), int lensize)
8869{
8870 struct SS {
8871 unsigned int op : 8;
8872 unsigned int l : 8;
8873 unsigned int b1 : 4;
8874 unsigned int d1 : 12;
8875 unsigned int b2 : 4;
8876 unsigned int d2 : 12;
8877 };
8878 union {
8879 struct SS dec;
8880 unsigned long bytes;
8881 } ss;
8882 IRTemp cond;
8883 IRDirty *d;
8884 IRTemp torun;
8885
8886 IRTemp start1 = newTemp(Ity_I64);
8887 IRTemp start2 = newTemp(Ity_I64);
8888 IRTemp len = newTemp(lensize == 64 ? Ity_I64 : Ity_I32);
8889 cond = newTemp(Ity_I1);
8890 torun = newTemp(Ity_I64);
8891
8892 assign(torun, load(Ity_I64, mkexpr(addr2)));
8893 /* Start with a check that the saved code is still correct */
8894 assign(cond, binop(Iop_CmpNE64, mkexpr(torun), mkU64(last_execute_target)));
8895 /* If not, save the new value */
8896 d = unsafeIRDirty_0_N (0, "s390x_dirtyhelper_EX", &s390x_dirtyhelper_EX,
8897 mkIRExprVec_1(mkexpr(torun)));
8898 d->guard = mkexpr(cond);
8899 stmt(IRStmt_Dirty(d));
8900
8901 /* and restart */
florian428dfdd2012-03-27 03:09:49 +00008902 stmt(IRStmt_Put(S390X_GUEST_OFFSET(guest_TISTART),
8903 mkU64(guest_IA_curr_instr)));
8904 stmt(IRStmt_Put(S390X_GUEST_OFFSET(guest_TILEN), mkU64(4)));
florian8844a632012-04-13 04:04:06 +00008905 stmt(IRStmt_Exit(mkexpr(cond), Ijk_TInval, IRConst_U64(guest_IA_curr_instr),
8906 S390X_GUEST_OFFSET(guest_IA)));
sewardj2019a972011-03-07 16:04:07 +00008907
8908 ss.bytes = last_execute_target;
8909 assign(start1, binop(Iop_Add64, mkU64(ss.dec.d1),
8910 ss.dec.b1 != 0 ? get_gpr_dw0(ss.dec.b1) : mkU64(0)));
8911 assign(start2, binop(Iop_Add64, mkU64(ss.dec.d2),
8912 ss.dec.b2 != 0 ? get_gpr_dw0(ss.dec.b2) : mkU64(0)));
8913 assign(len, unop(lensize == 64 ? Iop_8Uto64 : Iop_8Uto32, binop(Iop_Or8,
8914 r != 0 ? get_gpr_b7(r): mkU8(0), mkU8(ss.dec.l))));
8915 irgen(len, start1, start2);
florian8844a632012-04-13 04:04:06 +00008916 dummy_put_IA();
8917
sewardj2019a972011-03-07 16:04:07 +00008918 last_execute_target = 0;
8919}
8920
8921static HChar *
8922s390_irgen_EX(UChar r1, IRTemp addr2)
8923{
8924 switch(last_execute_target & 0xff00000000000000ULL) {
8925 case 0:
8926 {
8927 /* no code information yet */
8928 IRDirty *d;
8929
8930 /* so safe the code... */
8931 d = unsafeIRDirty_0_N (0, "s390x_dirtyhelper_EX", &s390x_dirtyhelper_EX,
8932 mkIRExprVec_1(load(Ity_I64, mkexpr(addr2))));
8933 stmt(IRStmt_Dirty(d));
8934 /* and restart */
florian428dfdd2012-03-27 03:09:49 +00008935 stmt(IRStmt_Put(S390X_GUEST_OFFSET(guest_TISTART),
8936 mkU64(guest_IA_curr_instr)));
8937 stmt(IRStmt_Put(S390X_GUEST_OFFSET(guest_TILEN), mkU64(4)));
florian8844a632012-04-13 04:04:06 +00008938 stmt(IRStmt_Exit(IRExpr_Const(IRConst_U1(True)), Ijk_TInval,
8939 IRConst_U64(guest_IA_curr_instr),
8940 S390X_GUEST_OFFSET(guest_IA)));
sewardj2019a972011-03-07 16:04:07 +00008941 /* we know that this will be invalidated */
8942 irsb->next = mkU64(guest_IA_next_instr);
8943 dis_res->whatNext = Dis_StopHere;
8944 break;
8945 }
8946
8947 case 0xd200000000000000ULL:
8948 /* special case MVC */
8949 s390_irgen_EX_SS(r1, addr2, s390_irgen_MVC_EX, 64);
8950 return "mvc via ex";
8951
8952 case 0xd500000000000000ULL:
8953 /* special case CLC */
8954 s390_irgen_EX_SS(r1, addr2, s390_irgen_CLC_EX, 64);
8955 return "clc via ex";
8956
8957 case 0xd700000000000000ULL:
8958 /* special case XC */
8959 s390_irgen_EX_SS(r1, addr2, s390_irgen_XC_EX, 32);
8960 return "xc via ex";
8961
8962
8963 default:
8964 {
8965 /* everything else will get a self checking prefix that also checks the
8966 register content */
8967 IRDirty *d;
8968 UChar *bytes;
8969 IRTemp cond;
8970 IRTemp orperand;
8971 IRTemp torun;
8972
8973 cond = newTemp(Ity_I1);
8974 orperand = newTemp(Ity_I64);
8975 torun = newTemp(Ity_I64);
8976
8977 if (r1 == 0)
8978 assign(orperand, mkU64(0));
8979 else
8980 assign(orperand, unop(Iop_8Uto64,get_gpr_b7(r1)));
8981 /* This code is going to be translated */
8982 assign(torun, binop(Iop_Or64, load(Ity_I64, mkexpr(addr2)),
8983 binop(Iop_Shl64, mkexpr(orperand), mkU8(48))));
8984
8985 /* Start with a check that saved code is still correct */
8986 assign(cond, binop(Iop_CmpNE64, mkexpr(torun),
8987 mkU64(last_execute_target)));
8988 /* If not, save the new value */
8989 d = unsafeIRDirty_0_N (0, "s390x_dirtyhelper_EX", &s390x_dirtyhelper_EX,
8990 mkIRExprVec_1(mkexpr(torun)));
8991 d->guard = mkexpr(cond);
8992 stmt(IRStmt_Dirty(d));
8993
8994 /* and restart */
florian428dfdd2012-03-27 03:09:49 +00008995 stmt(IRStmt_Put(S390X_GUEST_OFFSET(guest_TISTART), mkU64(guest_IA_curr_instr)));
8996 stmt(IRStmt_Put(S390X_GUEST_OFFSET(guest_TILEN), mkU64(4)));
florian8844a632012-04-13 04:04:06 +00008997 stmt(IRStmt_Exit(mkexpr(cond), Ijk_TInval,
8998 IRConst_U64(guest_IA_curr_instr),
8999 S390X_GUEST_OFFSET(guest_IA)));
sewardj2019a972011-03-07 16:04:07 +00009000
9001 /* Now comes the actual translation */
9002 bytes = (UChar *) &last_execute_target;
9003 s390_decode_and_irgen(bytes, ((((bytes[0] >> 6) + 1) >> 1) + 1) << 1,
9004 dis_res);
sewardj7ee97522011-05-09 21:45:04 +00009005 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00009006 vex_printf(" which was executed by\n");
9007 /* dont make useless translations in the next execute */
9008 last_execute_target = 0;
9009 }
9010 }
9011 return "ex";
9012}
9013
9014static HChar *
9015s390_irgen_EXRL(UChar r1, UInt offset)
9016{
9017 IRTemp addr = newTemp(Ity_I64);
9018 /* we might save one round trip because we know the target */
9019 if (!last_execute_target)
9020 last_execute_target = *(ULong *)(HWord)
9021 (guest_IA_curr_instr + offset * 2UL);
9022 assign(addr, mkU64(guest_IA_curr_instr + offset * 2UL));
9023 s390_irgen_EX(r1, addr);
9024 return "exrl";
9025}
9026
9027static HChar *
9028s390_irgen_IPM(UChar r1)
9029{
9030 // As long as we dont support SPM, lets just assume 0 as program mask
9031 put_gpr_b4(r1, unop(Iop_32to8, binop(Iop_Or32, mkU32(0 /* program mask */),
9032 binop(Iop_Shl32, s390_call_calculate_cc(), mkU8(4)))));
9033
9034 return "ipm";
9035}
9036
9037
9038static HChar *
9039s390_irgen_SRST(UChar r1, UChar r2)
9040{
9041 IRTemp address = newTemp(Ity_I64);
9042 IRTemp next = newTemp(Ity_I64);
9043 IRTemp delim = newTemp(Ity_I8);
9044 IRTemp counter = newTemp(Ity_I64);
9045 IRTemp byte = newTemp(Ity_I8);
9046
9047 assign(address, get_gpr_dw0(r2));
9048 assign(next, get_gpr_dw0(r1));
9049
9050 assign(counter, get_counter_dw0());
9051 put_counter_dw0(mkU64(0));
9052
9053 // start = next? CC=2 and out r1 and r2 unchanged
9054 s390_cc_set(2);
9055 put_gpr_dw0(r2, binop(Iop_Sub64, mkexpr(address), mkexpr(counter)));
9056 if_condition_goto(binop(Iop_CmpEQ64, mkexpr(address), mkexpr(next)),
9057 guest_IA_next_instr);
9058
9059 assign(byte, load(Ity_I8, mkexpr(address)));
9060 assign(delim, get_gpr_b7(0));
9061
9062 // byte = delim? CC=1, R1=address
9063 s390_cc_set(1);
9064 put_gpr_dw0(r1, mkexpr(address));
9065 if_condition_goto(binop(Iop_CmpEQ8, mkexpr(delim), mkexpr(byte)),
9066 guest_IA_next_instr);
9067
9068 // else: all equal, no end yet, loop
9069 put_counter_dw0(binop(Iop_Add64, mkexpr(counter), mkU64(1)));
9070 put_gpr_dw0(r1, mkexpr(next));
9071 put_gpr_dw0(r2, binop(Iop_Add64, mkexpr(address), mkU64(1)));
florian8844a632012-04-13 04:04:06 +00009072 stmt(IRStmt_Exit(binop(Iop_CmpNE64, mkexpr(counter), mkU64(255)),
9073 Ijk_Boring, IRConst_U64(guest_IA_curr_instr),
9074 S390X_GUEST_OFFSET(guest_IA)));
sewardj2019a972011-03-07 16:04:07 +00009075 // >= 256 bytes done CC=3
9076 s390_cc_set(3);
9077 put_counter_dw0(mkU64(0));
florian8844a632012-04-13 04:04:06 +00009078 dummy_put_IA();
sewardj2019a972011-03-07 16:04:07 +00009079
9080 return "srst";
9081}
9082
9083static HChar *
9084s390_irgen_CLST(UChar r1, UChar r2)
9085{
9086 IRTemp address1 = newTemp(Ity_I64);
9087 IRTemp address2 = newTemp(Ity_I64);
9088 IRTemp end = newTemp(Ity_I8);
9089 IRTemp counter = newTemp(Ity_I64);
9090 IRTemp byte1 = newTemp(Ity_I8);
9091 IRTemp byte2 = newTemp(Ity_I8);
9092
9093 assign(address1, get_gpr_dw0(r1));
9094 assign(address2, get_gpr_dw0(r2));
9095 assign(end, get_gpr_b7(0));
9096 assign(counter, get_counter_dw0());
9097 put_counter_dw0(mkU64(0));
9098 assign(byte1, load(Ity_I8, mkexpr(address1)));
9099 assign(byte2, load(Ity_I8, mkexpr(address2)));
9100
9101 // end in both? all equal, reset r1 and r2 to start values
9102 s390_cc_set(0);
9103 put_gpr_dw0(r1, binop(Iop_Sub64, mkexpr(address1), mkexpr(counter)));
9104 put_gpr_dw0(r2, binop(Iop_Sub64, mkexpr(address2), mkexpr(counter)));
9105 if_condition_goto(binop(Iop_CmpEQ8, mkU8(0),
9106 binop(Iop_Or8,
9107 binop(Iop_Xor8, mkexpr(byte1), mkexpr(end)),
9108 binop(Iop_Xor8, mkexpr(byte2), mkexpr(end)))),
9109 guest_IA_next_instr);
9110
9111 put_gpr_dw0(r1, mkexpr(address1));
9112 put_gpr_dw0(r2, mkexpr(address2));
9113
9114 // End found in string1
9115 s390_cc_set(1);
9116 if_condition_goto(binop(Iop_CmpEQ8, mkexpr(end), mkexpr(byte1)),
9117 guest_IA_next_instr);
9118
9119 // End found in string2
9120 s390_cc_set(2);
9121 if_condition_goto(binop(Iop_CmpEQ8, mkexpr(end), mkexpr(byte2)),
9122 guest_IA_next_instr);
9123
9124 // string1 < string2
9125 s390_cc_set(1);
9126 if_condition_goto(binop(Iop_CmpLT32U, unop(Iop_8Uto32, mkexpr(byte1)),
9127 unop(Iop_8Uto32, mkexpr(byte2))),
9128 guest_IA_next_instr);
9129
9130 // string2 < string1
9131 s390_cc_set(2);
9132 if_condition_goto(binop(Iop_CmpLT32U, unop(Iop_8Uto32, mkexpr(byte2)),
9133 unop(Iop_8Uto32, mkexpr(byte1))),
9134 guest_IA_next_instr);
9135
9136 // else: all equal, no end yet, loop
9137 put_counter_dw0(binop(Iop_Add64, mkexpr(counter), mkU64(1)));
9138 put_gpr_dw0(r1, binop(Iop_Add64, get_gpr_dw0(r1), mkU64(1)));
9139 put_gpr_dw0(r2, binop(Iop_Add64, get_gpr_dw0(r2), mkU64(1)));
florian8844a632012-04-13 04:04:06 +00009140 stmt(IRStmt_Exit(binop(Iop_CmpNE64, mkexpr(counter), mkU64(255)),
9141 Ijk_Boring, IRConst_U64(guest_IA_curr_instr),
9142 S390X_GUEST_OFFSET(guest_IA)));
sewardj2019a972011-03-07 16:04:07 +00009143 // >= 256 bytes done CC=3
9144 s390_cc_set(3);
9145 put_counter_dw0(mkU64(0));
florian8844a632012-04-13 04:04:06 +00009146 dummy_put_IA();
sewardj2019a972011-03-07 16:04:07 +00009147
9148 return "clst";
9149}
9150
9151static void
9152s390_irgen_load_multiple_32bit(UChar r1, UChar r3, IRTemp op2addr)
9153{
9154 UChar reg;
9155 IRTemp addr = newTemp(Ity_I64);
9156
9157 assign(addr, mkexpr(op2addr));
9158 reg = r1;
9159 do {
9160 IRTemp old = addr;
9161
9162 reg %= 16;
9163 put_gpr_w1(reg, load(Ity_I32, mkexpr(addr)));
9164 addr = newTemp(Ity_I64);
9165 assign(addr, binop(Iop_Add64, mkexpr(old), mkU64(4)));
9166 reg++;
9167 } while (reg != (r3 + 1));
9168}
9169
9170static HChar *
9171s390_irgen_LM(UChar r1, UChar r3, IRTemp op2addr)
9172{
9173 s390_irgen_load_multiple_32bit(r1, r3, op2addr);
9174
9175 return "lm";
9176}
9177
9178static HChar *
9179s390_irgen_LMY(UChar r1, UChar r3, IRTemp op2addr)
9180{
9181 s390_irgen_load_multiple_32bit(r1, r3, op2addr);
9182
9183 return "lmy";
9184}
9185
9186static HChar *
9187s390_irgen_LMH(UChar r1, UChar r3, IRTemp op2addr)
9188{
9189 UChar reg;
9190 IRTemp addr = newTemp(Ity_I64);
9191
9192 assign(addr, mkexpr(op2addr));
9193 reg = r1;
9194 do {
9195 IRTemp old = addr;
9196
9197 reg %= 16;
9198 put_gpr_w0(reg, load(Ity_I32, mkexpr(addr)));
9199 addr = newTemp(Ity_I64);
9200 assign(addr, binop(Iop_Add64, mkexpr(old), mkU64(4)));
9201 reg++;
9202 } while (reg != (r3 + 1));
9203
9204 return "lmh";
9205}
9206
9207static HChar *
9208s390_irgen_LMG(UChar r1, UChar r3, IRTemp op2addr)
9209{
9210 UChar reg;
9211 IRTemp addr = newTemp(Ity_I64);
9212
9213 assign(addr, mkexpr(op2addr));
9214 reg = r1;
9215 do {
9216 IRTemp old = addr;
9217
9218 reg %= 16;
9219 put_gpr_dw0(reg, load(Ity_I64, mkexpr(addr)));
9220 addr = newTemp(Ity_I64);
9221 assign(addr, binop(Iop_Add64, mkexpr(old), mkU64(8)));
9222 reg++;
9223 } while (reg != (r3 + 1));
9224
9225 return "lmg";
9226}
9227
9228static void
9229s390_irgen_store_multiple_32bit(UChar r1, UChar r3, IRTemp op2addr)
9230{
9231 UChar reg;
9232 IRTemp addr = newTemp(Ity_I64);
9233
9234 assign(addr, mkexpr(op2addr));
9235 reg = r1;
9236 do {
9237 IRTemp old = addr;
9238
9239 reg %= 16;
9240 store(mkexpr(addr), get_gpr_w1(reg));
9241 addr = newTemp(Ity_I64);
9242 assign(addr, binop(Iop_Add64, mkexpr(old), mkU64(4)));
9243 reg++;
9244 } while( reg != (r3 + 1));
9245}
9246
9247static HChar *
9248s390_irgen_STM(UChar r1, UChar r3, IRTemp op2addr)
9249{
9250 s390_irgen_store_multiple_32bit(r1, r3, op2addr);
9251
9252 return "stm";
9253}
9254
9255static HChar *
9256s390_irgen_STMY(UChar r1, UChar r3, IRTemp op2addr)
9257{
9258 s390_irgen_store_multiple_32bit(r1, r3, op2addr);
9259
9260 return "stmy";
9261}
9262
9263static HChar *
9264s390_irgen_STMH(UChar r1, UChar r3, IRTemp op2addr)
9265{
9266 UChar reg;
9267 IRTemp addr = newTemp(Ity_I64);
9268
9269 assign(addr, mkexpr(op2addr));
9270 reg = r1;
9271 do {
9272 IRTemp old = addr;
9273
9274 reg %= 16;
9275 store(mkexpr(addr), get_gpr_w0(reg));
9276 addr = newTemp(Ity_I64);
9277 assign(addr, binop(Iop_Add64, mkexpr(old), mkU64(4)));
9278 reg++;
9279 } while( reg != (r3 + 1));
9280
9281 return "stmh";
9282}
9283
9284static HChar *
9285s390_irgen_STMG(UChar r1, UChar r3, IRTemp op2addr)
9286{
9287 UChar reg;
9288 IRTemp addr = newTemp(Ity_I64);
9289
9290 assign(addr, mkexpr(op2addr));
9291 reg = r1;
9292 do {
9293 IRTemp old = addr;
9294
9295 reg %= 16;
9296 store(mkexpr(addr), get_gpr_dw0(reg));
9297 addr = newTemp(Ity_I64);
9298 assign(addr, binop(Iop_Add64, mkexpr(old), mkU64(8)));
9299 reg++;
9300 } while( reg != (r3 + 1));
9301
9302 return "stmg";
9303}
9304
9305static void
florian7e8c6922012-03-17 23:38:39 +00009306s390_irgen_xonc(IROp op, UChar length, IRTemp start1, IRTemp start2)
sewardj2019a972011-03-07 16:04:07 +00009307{
9308 IRTemp old1 = newTemp(Ity_I8);
9309 IRTemp old2 = newTemp(Ity_I8);
9310 IRTemp new1 = newTemp(Ity_I8);
9311 IRTemp counter = newTemp(Ity_I32);
9312 IRTemp addr1 = newTemp(Ity_I64);
9313
9314 assign(counter, get_counter_w0());
9315
9316 assign(addr1, binop(Iop_Add64, mkexpr(start1),
9317 unop(Iop_32Uto64, mkexpr(counter))));
9318
9319 assign(old1, load(Ity_I8, mkexpr(addr1)));
9320 assign(old2, load(Ity_I8, binop(Iop_Add64, mkexpr(start2),
9321 unop(Iop_32Uto64,mkexpr(counter)))));
9322 assign(new1, binop(op, mkexpr(old1), mkexpr(old2)));
9323
9324 /* Special case: xc is used to zero memory */
sewardj2019a972011-03-07 16:04:07 +00009325 if (op == Iop_Xor8) {
9326 store(mkexpr(addr1),
florian6ad49522011-09-09 02:38:55 +00009327 mkite(binop(Iop_CmpEQ64, mkexpr(start1), mkexpr(start2)),
9328 mkU8(0), mkexpr(new1)));
sewardj2019a972011-03-07 16:04:07 +00009329 } else
9330 store(mkexpr(addr1), mkexpr(new1));
9331 put_counter_w1(binop(Iop_Or32, unop(Iop_8Uto32, mkexpr(new1)),
9332 get_counter_w1()));
9333
9334 /* Check for end of field */
9335 put_counter_w0(binop(Iop_Add32, mkexpr(counter), mkU32(1)));
9336 if_condition_goto(binop(Iop_CmpNE32, mkexpr(counter), mkU32(length)),
9337 guest_IA_curr_instr);
9338 s390_cc_thunk_put1(S390_CC_OP_BITWISE, mktemp(Ity_I32, get_counter_w1()),
9339 False);
9340 put_counter_dw0(mkU64(0));
florian8844a632012-04-13 04:04:06 +00009341 dummy_put_IA();
sewardj2019a972011-03-07 16:04:07 +00009342}
9343
9344static HChar *
9345s390_irgen_XC(UChar length, IRTemp start1, IRTemp start2)
9346{
florian7e8c6922012-03-17 23:38:39 +00009347 s390_irgen_xonc(Iop_Xor8, length, start1, start2);
sewardj2019a972011-03-07 16:04:07 +00009348
9349 return "xc";
9350}
9351
sewardjb63967e2011-03-24 08:50:04 +00009352static void
9353s390_irgen_XC_sameloc(UChar length, UChar b, UShort d)
9354{
9355 IRTemp counter = newTemp(Ity_I32);
9356 IRTemp start = newTemp(Ity_I64);
9357 IRTemp addr = newTemp(Ity_I64);
9358
9359 assign(start,
9360 binop(Iop_Add64, mkU64(d), b != 0 ? get_gpr_dw0(b) : mkU64(0)));
9361
9362 if (length < 8) {
9363 UInt i;
9364
9365 for (i = 0; i <= length; ++i) {
9366 store(binop(Iop_Add64, mkexpr(start), mkU64(i)), mkU8(0));
9367 }
9368 } else {
9369 assign(counter, get_counter_w0());
9370
9371 assign(addr, binop(Iop_Add64, mkexpr(start),
9372 unop(Iop_32Uto64, mkexpr(counter))));
9373
9374 store(mkexpr(addr), mkU8(0));
9375
9376 /* Check for end of field */
9377 put_counter_w0(binop(Iop_Add32, mkexpr(counter), mkU32(1)));
9378 if_condition_goto(binop(Iop_CmpNE32, mkexpr(counter), mkU32(length)),
9379 guest_IA_curr_instr);
9380
9381 /* Reset counter */
9382 put_counter_dw0(mkU64(0));
florian8844a632012-04-13 04:04:06 +00009383 dummy_put_IA();
sewardjb63967e2011-03-24 08:50:04 +00009384 }
9385
9386 s390_cc_thunk_put1(S390_CC_OP_BITWISE, mktemp(Ity_I32, mkU32(0)), False);
9387
sewardj7ee97522011-05-09 21:45:04 +00009388 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardjb63967e2011-03-24 08:50:04 +00009389 s390_disasm(ENC3(MNM, UDLB, UDXB), "xc", d, length, b, d, 0, b);
9390}
9391
sewardj2019a972011-03-07 16:04:07 +00009392static HChar *
9393s390_irgen_NC(UChar length, IRTemp start1, IRTemp start2)
9394{
florian7e8c6922012-03-17 23:38:39 +00009395 s390_irgen_xonc(Iop_And8, length, start1, start2);
sewardj2019a972011-03-07 16:04:07 +00009396
9397 return "nc";
9398}
9399
9400static HChar *
9401s390_irgen_OC(UChar length, IRTemp start1, IRTemp start2)
9402{
florian7e8c6922012-03-17 23:38:39 +00009403 s390_irgen_xonc(Iop_Or8, length, start1, start2);
sewardj2019a972011-03-07 16:04:07 +00009404
9405 return "oc";
9406}
9407
9408
9409static HChar *
9410s390_irgen_MVC(UChar length, IRTemp start1, IRTemp start2)
9411{
9412 IRTemp counter = newTemp(Ity_I64);
9413
9414 assign(counter, get_counter_dw0());
9415
9416 store(binop(Iop_Add64, mkexpr(start1), mkexpr(counter)),
9417 load(Ity_I8, binop(Iop_Add64, mkexpr(start2), mkexpr(counter))));
9418
9419 /* Check for end of field */
9420 put_counter_dw0(binop(Iop_Add64, mkexpr(counter), mkU64(1)));
9421 if_condition_goto(binop(Iop_CmpNE64, mkexpr(counter), mkU64(length)),
9422 guest_IA_curr_instr);
9423 put_counter_dw0(mkU64(0));
florian8844a632012-04-13 04:04:06 +00009424 dummy_put_IA();
sewardj2019a972011-03-07 16:04:07 +00009425
9426 return "mvc";
9427}
9428
9429static HChar *
florianb0c9a132011-09-08 15:37:39 +00009430s390_irgen_MVCL(UChar r1, UChar r2)
9431{
9432 IRTemp addr1 = newTemp(Ity_I64);
9433 IRTemp addr2 = newTemp(Ity_I64);
9434 IRTemp addr2_load = newTemp(Ity_I64);
9435 IRTemp r1p1 = newTemp(Ity_I32); /* contents of r1 + 1 */
9436 IRTemp r2p1 = newTemp(Ity_I32); /* contents of r2 + 1 */
9437 IRTemp len1 = newTemp(Ity_I32);
9438 IRTemp len2 = newTemp(Ity_I32);
9439 IRTemp pad = newTemp(Ity_I8);
9440 IRTemp single = newTemp(Ity_I8);
9441
9442 assign(addr1, get_gpr_dw0(r1));
9443 assign(r1p1, get_gpr_w1(r1 + 1));
9444 assign(len1, binop(Iop_And32, mkexpr(r1p1), mkU32(0x00ffffff)));
9445 assign(addr2, get_gpr_dw0(r2));
9446 assign(r2p1, get_gpr_w1(r2 + 1));
9447 assign(len2, binop(Iop_And32, mkexpr(r2p1), mkU32(0x00ffffff)));
9448 assign(pad, get_gpr_b4(r2 + 1));
9449
9450 /* len1 == 0 ? */
9451 s390_cc_thunk_put2(S390_CC_OP_UNSIGNED_COMPARE, len1, len2, False);
9452 if_condition_goto(binop(Iop_CmpEQ32, mkexpr(len1), mkU32(0)),
9453 guest_IA_next_instr);
9454
9455 /* Check for destructive overlap:
9456 addr1 > addr2 && addr2 + len1 > addr1 && (addr2 + len2) > addr1 */
9457 s390_cc_set(3);
9458 IRTemp cond1 = newTemp(Ity_I32);
9459 assign(cond1, unop(Iop_1Uto32,
9460 binop(Iop_CmpLT64U, mkexpr(addr2), mkexpr(addr1))));
9461 IRTemp cond2 = newTemp(Ity_I32);
9462 assign(cond2, unop(Iop_1Uto32,
9463 binop(Iop_CmpLT64U, mkexpr(addr1),
9464 binop(Iop_Add64, mkexpr(addr2),
9465 unop(Iop_32Uto64, mkexpr(len1))))));
9466 IRTemp cond3 = newTemp(Ity_I32);
9467 assign(cond3, unop(Iop_1Uto32,
9468 binop(Iop_CmpLT64U,
9469 mkexpr(addr1),
9470 binop(Iop_Add64, mkexpr(addr2),
9471 unop(Iop_32Uto64, mkexpr(len2))))));
9472
9473 if_condition_goto(binop(Iop_CmpEQ32,
9474 binop(Iop_And32,
9475 binop(Iop_And32, mkexpr(cond1), mkexpr(cond2)),
9476 mkexpr(cond3)),
9477 mkU32(1)),
9478 guest_IA_next_instr);
9479
9480 /* See s390_irgen_CLCL for explanation why we cannot load directly
9481 and need two steps. */
9482 assign(addr2_load,
9483 mkite(binop(Iop_CmpEQ32, mkexpr(len2), mkU32(0)),
9484 mkU64(guest_IA_curr_instr), mkexpr(addr2)));
9485 assign(single,
9486 mkite(binop(Iop_CmpEQ32, mkexpr(len2), mkU32(0)),
9487 mkexpr(pad), load(Ity_I8, mkexpr(addr2_load))));
9488
9489 store(mkexpr(addr1), mkexpr(single));
9490
9491 /* Update addr1 and len1 */
9492 put_gpr_dw0(r1, binop(Iop_Add64, mkexpr(addr1), mkU64(1)));
9493 put_gpr_w1(r1 + 1, binop(Iop_Sub32, mkexpr(r1p1), mkU32(1)));
9494
9495 /* Update addr2 and len2 */
9496 put_gpr_dw0(r2,
9497 mkite(binop(Iop_CmpEQ32, mkexpr(len2), mkU32(0)),
9498 mkexpr(addr2),
9499 binop(Iop_Add64, mkexpr(addr2), mkU64(1))));
9500
9501 /* When updating len2 we must not modify bits (r2+1)[0:39] */
9502 put_gpr_w1(r2 + 1,
9503 mkite(binop(Iop_CmpEQ32, mkexpr(len2), mkU32(0)),
9504 binop(Iop_And32, mkexpr(r2p1), mkU32(0xFF000000u)),
9505 binop(Iop_Sub32, mkexpr(r2p1), mkU32(1))));
9506
9507 s390_cc_thunk_put2(S390_CC_OP_UNSIGNED_COMPARE, len1, len2, False);
9508 if_condition_goto(binop(Iop_CmpNE32, mkexpr(len1), mkU32(1)),
9509 guest_IA_curr_instr);
9510
9511 return "mvcl";
9512}
9513
9514
9515static HChar *
sewardj2019a972011-03-07 16:04:07 +00009516s390_irgen_MVCLE(UChar r1, UChar r3, IRTemp pad2)
9517{
9518 IRTemp addr1, addr3, addr3_load, len1, len3, single;
9519
9520 addr1 = newTemp(Ity_I64);
9521 addr3 = newTemp(Ity_I64);
9522 addr3_load = newTemp(Ity_I64);
9523 len1 = newTemp(Ity_I64);
9524 len3 = newTemp(Ity_I64);
9525 single = newTemp(Ity_I8);
9526
9527 assign(addr1, get_gpr_dw0(r1));
9528 assign(len1, get_gpr_dw0(r1 + 1));
9529 assign(addr3, get_gpr_dw0(r3));
9530 assign(len3, get_gpr_dw0(r3 + 1));
9531
9532 // len1 == 0 ?
9533 s390_cc_thunk_put2(S390_CC_OP_UNSIGNED_COMPARE, len1, len3, False);
9534 if_condition_goto(binop(Iop_CmpEQ64,mkexpr(len1), mkU64(0)),
9535 guest_IA_next_instr);
9536
9537 /* This is a hack to prevent mvcle from reading from addr3 if it
9538 should read from the pad. Since the pad has no address, just
9539 read from the instruction, we discard that anyway */
9540 assign(addr3_load,
florian6ad49522011-09-09 02:38:55 +00009541 mkite(binop(Iop_CmpEQ64, mkexpr(len3), mkU64(0)),
9542 mkU64(guest_IA_curr_instr), mkexpr(addr3)));
sewardj2019a972011-03-07 16:04:07 +00009543
9544 assign(single,
florian6ad49522011-09-09 02:38:55 +00009545 mkite(binop(Iop_CmpEQ64, mkexpr(len3), mkU64(0)),
9546 unop(Iop_64to8, mkexpr(pad2)),
9547 load(Ity_I8, mkexpr(addr3_load))));
sewardj2019a972011-03-07 16:04:07 +00009548 store(mkexpr(addr1), mkexpr(single));
9549
9550 put_gpr_dw0(r1, binop(Iop_Add64, mkexpr(addr1), mkU64(1)));
9551
9552 put_gpr_dw0(r1 + 1, binop(Iop_Sub64, mkexpr(len1), mkU64(1)));
9553
9554 put_gpr_dw0(r3,
florian6ad49522011-09-09 02:38:55 +00009555 mkite(binop(Iop_CmpEQ64, mkexpr(len3), mkU64(0)),
9556 mkexpr(addr3),
9557 binop(Iop_Add64, mkexpr(addr3), mkU64(1))));
sewardj2019a972011-03-07 16:04:07 +00009558
9559 put_gpr_dw0(r3 + 1,
florian6ad49522011-09-09 02:38:55 +00009560 mkite(binop(Iop_CmpEQ64, mkexpr(len3), mkU64(0)),
9561 mkU64(0), binop(Iop_Sub64, mkexpr(len3), mkU64(1))));
sewardj2019a972011-03-07 16:04:07 +00009562
9563 /* We should set CC=3 (faked by overflow add) and leave after
9564 a maximum of ~4096 bytes have been processed. This is simpler:
9565 we leave whenever (len1 % 4096) == 0 */
9566 s390_cc_thunk_put2(S390_CC_OP_UNSIGNED_ADD_64, mktemp(Ity_I64, mkU64(-1ULL)),
sewardj2019a972011-03-07 16:04:07 +00009567 mktemp(Ity_I64, mkU64(-1ULL)), False);
9568 if_condition_goto(binop(Iop_CmpEQ64,
9569 binop(Iop_And64, mkexpr(len1), mkU64(0xfff)),
9570 mkU64(0)),
9571 guest_IA_next_instr);
9572
9573 s390_cc_thunk_put2(S390_CC_OP_UNSIGNED_COMPARE, len1, len3, False);
9574 if_condition_goto(binop(Iop_CmpNE64, mkexpr(len1), mkU64(1)),
9575 guest_IA_curr_instr);
9576
9577 return "mvcle";
9578}
9579
9580static HChar *
9581s390_irgen_MVST(UChar r1, UChar r2)
9582{
9583 IRTemp addr1 = newTemp(Ity_I64);
9584 IRTemp addr2 = newTemp(Ity_I64);
9585 IRTemp end = newTemp(Ity_I8);
9586 IRTemp byte = newTemp(Ity_I8);
9587 IRTemp counter = newTemp(Ity_I64);
9588
9589 assign(addr1, get_gpr_dw0(r1));
9590 assign(addr2, get_gpr_dw0(r2));
9591 assign(counter, get_counter_dw0());
9592 assign(end, get_gpr_b7(0));
9593 assign(byte, load(Ity_I8, binop(Iop_Add64, mkexpr(addr2),mkexpr(counter))));
9594 store(binop(Iop_Add64,mkexpr(addr1),mkexpr(counter)), mkexpr(byte));
9595
9596 // We use unlimited as cpu-determined number
9597 put_counter_dw0(binop(Iop_Add64, mkexpr(counter), mkU64(1)));
9598 if_condition_goto(binop(Iop_CmpNE8, mkexpr(end), mkexpr(byte)),
9599 guest_IA_curr_instr);
9600
9601 // and always set cc=1 at the end + update r1
9602 s390_cc_set(1);
9603 put_gpr_dw0(r1, binop(Iop_Add64, mkexpr(addr1), mkexpr(counter)));
9604 put_counter_dw0(mkU64(0));
florian8844a632012-04-13 04:04:06 +00009605 dummy_put_IA();
sewardj2019a972011-03-07 16:04:07 +00009606
9607 return "mvst";
9608}
9609
9610static void
9611s390_irgen_divide_64to32(IROp op, UChar r1, IRTemp op2)
9612{
9613 IRTemp op1 = newTemp(Ity_I64);
9614 IRTemp result = newTemp(Ity_I64);
9615
9616 assign(op1, binop(Iop_32HLto64,
9617 get_gpr_w1(r1), // high 32 bits
9618 get_gpr_w1(r1 + 1))); // low 32 bits
9619 assign(result, binop(op, mkexpr(op1), mkexpr(op2)));
9620 put_gpr_w1(r1, unop(Iop_64HIto32, mkexpr(result))); // remainder
9621 put_gpr_w1(r1 + 1, unop(Iop_64to32, mkexpr(result))); // quotient
9622}
9623
9624static void
9625s390_irgen_divide_128to64(IROp op, UChar r1, IRTemp op2)
9626{
9627 IRTemp op1 = newTemp(Ity_I128);
9628 IRTemp result = newTemp(Ity_I128);
9629
9630 assign(op1, binop(Iop_64HLto128,
9631 get_gpr_dw0(r1), // high 64 bits
9632 get_gpr_dw0(r1 + 1))); // low 64 bits
9633 assign(result, binop(op, mkexpr(op1), mkexpr(op2)));
9634 put_gpr_dw0(r1, unop(Iop_128HIto64, mkexpr(result))); // remainder
9635 put_gpr_dw0(r1 + 1, unop(Iop_128to64, mkexpr(result))); // quotient
9636}
9637
9638static void
9639s390_irgen_divide_64to64(IROp op, UChar r1, IRTemp op2)
9640{
9641 IRTemp op1 = newTemp(Ity_I64);
9642 IRTemp result = newTemp(Ity_I128);
9643
9644 assign(op1, get_gpr_dw0(r1 + 1));
9645 assign(result, binop(op, mkexpr(op1), mkexpr(op2)));
9646 put_gpr_dw0(r1, unop(Iop_128HIto64, mkexpr(result))); // remainder
9647 put_gpr_dw0(r1 + 1, unop(Iop_128to64, mkexpr(result))); // quotient
9648}
9649
9650static HChar *
9651s390_irgen_DR(UChar r1, UChar r2)
9652{
9653 IRTemp op2 = newTemp(Ity_I32);
9654
9655 assign(op2, get_gpr_w1(r2));
9656
9657 s390_irgen_divide_64to32(Iop_DivModS64to32, r1, op2);
9658
9659 return "dr";
9660}
9661
9662static HChar *
9663s390_irgen_D(UChar r1, IRTemp op2addr)
9664{
9665 IRTemp op2 = newTemp(Ity_I32);
9666
9667 assign(op2, load(Ity_I32, mkexpr(op2addr)));
9668
9669 s390_irgen_divide_64to32(Iop_DivModS64to32, r1, op2);
9670
9671 return "d";
9672}
9673
9674static HChar *
9675s390_irgen_DLR(UChar r1, UChar r2)
9676{
9677 IRTemp op2 = newTemp(Ity_I32);
9678
9679 assign(op2, get_gpr_w1(r2));
9680
9681 s390_irgen_divide_64to32(Iop_DivModU64to32, r1, op2);
9682
9683 return "dr";
9684}
9685
9686static HChar *
9687s390_irgen_DL(UChar r1, IRTemp op2addr)
9688{
9689 IRTemp op2 = newTemp(Ity_I32);
9690
9691 assign(op2, load(Ity_I32, mkexpr(op2addr)));
9692
9693 s390_irgen_divide_64to32(Iop_DivModU64to32, r1, op2);
9694
9695 return "dl";
9696}
9697
9698static HChar *
9699s390_irgen_DLG(UChar r1, IRTemp op2addr)
9700{
9701 IRTemp op2 = newTemp(Ity_I64);
9702
9703 assign(op2, load(Ity_I64, mkexpr(op2addr)));
9704
9705 s390_irgen_divide_128to64(Iop_DivModU128to64, r1, op2);
9706
9707 return "dlg";
9708}
9709
9710static HChar *
9711s390_irgen_DLGR(UChar r1, UChar r2)
9712{
9713 IRTemp op2 = newTemp(Ity_I64);
9714
9715 assign(op2, get_gpr_dw0(r2));
9716
9717 s390_irgen_divide_128to64(Iop_DivModU128to64, r1, op2);
9718
9719 return "dlgr";
9720}
9721
9722static HChar *
9723s390_irgen_DSGR(UChar r1, UChar r2)
9724{
9725 IRTemp op2 = newTemp(Ity_I64);
9726
9727 assign(op2, get_gpr_dw0(r2));
9728
9729 s390_irgen_divide_64to64(Iop_DivModS64to64, r1, op2);
9730
9731 return "dsgr";
9732}
9733
9734static HChar *
9735s390_irgen_DSG(UChar r1, IRTemp op2addr)
9736{
9737 IRTemp op2 = newTemp(Ity_I64);
9738
9739 assign(op2, load(Ity_I64, mkexpr(op2addr)));
9740
9741 s390_irgen_divide_64to64(Iop_DivModS64to64, r1, op2);
9742
9743 return "dsg";
9744}
9745
9746static HChar *
9747s390_irgen_DSGFR(UChar r1, UChar r2)
9748{
9749 IRTemp op2 = newTemp(Ity_I64);
9750
9751 assign(op2, unop(Iop_32Sto64, get_gpr_w1(r2)));
9752
9753 s390_irgen_divide_64to64(Iop_DivModS64to64, r1, op2);
9754
9755 return "dsgfr";
9756}
9757
9758static HChar *
9759s390_irgen_DSGF(UChar r1, IRTemp op2addr)
9760{
9761 IRTemp op2 = newTemp(Ity_I64);
9762
9763 assign(op2, unop(Iop_32Sto64, load(Ity_I32, mkexpr(op2addr))));
9764
9765 s390_irgen_divide_64to64(Iop_DivModS64to64, r1, op2);
9766
9767 return "dsgf";
9768}
9769
9770static void
9771s390_irgen_load_ar_multiple(UChar r1, UChar r3, IRTemp op2addr)
9772{
9773 UChar reg;
9774 IRTemp addr = newTemp(Ity_I64);
9775
9776 assign(addr, mkexpr(op2addr));
9777 reg = r1;
9778 do {
9779 IRTemp old = addr;
9780
9781 reg %= 16;
9782 put_ar_w0(reg, load(Ity_I32, mkexpr(addr)));
9783 addr = newTemp(Ity_I64);
9784 assign(addr, binop(Iop_Add64, mkexpr(old), mkU64(4)));
9785 reg++;
9786 } while (reg != (r3 + 1));
9787}
9788
9789static HChar *
9790s390_irgen_LAM(UChar r1, UChar r3, IRTemp op2addr)
9791{
9792 s390_irgen_load_ar_multiple(r1, r3, op2addr);
9793
9794 return "lam";
9795}
9796
9797static HChar *
9798s390_irgen_LAMY(UChar r1, UChar r3, IRTemp op2addr)
9799{
9800 s390_irgen_load_ar_multiple(r1, r3, op2addr);
9801
9802 return "lamy";
9803}
9804
9805static void
9806s390_irgen_store_ar_multiple(UChar r1, UChar r3, IRTemp op2addr)
9807{
9808 UChar reg;
9809 IRTemp addr = newTemp(Ity_I64);
9810
9811 assign(addr, mkexpr(op2addr));
9812 reg = r1;
9813 do {
9814 IRTemp old = addr;
9815
9816 reg %= 16;
9817 store(mkexpr(addr), get_ar_w0(reg));
9818 addr = newTemp(Ity_I64);
9819 assign(addr, binop(Iop_Add64, mkexpr(old), mkU64(4)));
9820 reg++;
9821 } while (reg != (r3 + 1));
9822}
9823
9824static HChar *
9825s390_irgen_STAM(UChar r1, UChar r3, IRTemp op2addr)
9826{
9827 s390_irgen_store_ar_multiple(r1, r3, op2addr);
9828
9829 return "stam";
9830}
9831
9832static HChar *
9833s390_irgen_STAMY(UChar r1, UChar r3, IRTemp op2addr)
9834{
9835 s390_irgen_store_ar_multiple(r1, r3, op2addr);
9836
9837 return "stamy";
9838}
9839
9840
9841/* Implementation for 32-bit compare-and-swap */
9842static void
9843s390_irgen_cas_32(UChar r1, UChar r3, IRTemp op2addr)
9844{
9845 IRCAS *cas;
9846 IRTemp op1 = newTemp(Ity_I32);
9847 IRTemp old_mem = newTemp(Ity_I32);
9848 IRTemp op3 = newTemp(Ity_I32);
9849 IRTemp result = newTemp(Ity_I32);
9850 IRTemp nequal = newTemp(Ity_I1);
9851
9852 assign(op1, get_gpr_w1(r1));
9853 assign(op3, get_gpr_w1(r3));
9854
9855 /* The first and second operands are compared. If they are equal,
9856 the third operand is stored at the second- operand location. */
9857 cas = mkIRCAS(IRTemp_INVALID, old_mem,
9858 Iend_BE, mkexpr(op2addr),
9859 NULL, mkexpr(op1), /* expected value */
9860 NULL, mkexpr(op3) /* new value */);
9861 stmt(IRStmt_CAS(cas));
9862
9863 /* Set CC. Operands compared equal -> 0, else 1. */
9864 assign(result, binop(Iop_Sub32, mkexpr(op1), mkexpr(old_mem)));
9865 s390_cc_thunk_put1(S390_CC_OP_BITWISE, result, False);
9866
9867 /* If operands were equal (cc == 0) just store the old value op1 in r1.
9868 Otherwise, store the old_value from memory in r1 and yield. */
9869 assign(nequal, binop(Iop_CmpNE32, s390_call_calculate_cc(), mkU32(0)));
9870 put_gpr_w1(r1, mkite(mkexpr(nequal), mkexpr(old_mem), mkexpr(op1)));
florian8844a632012-04-13 04:04:06 +00009871 stmt(IRStmt_Exit(mkexpr(nequal), Ijk_Yield,
9872 IRConst_U64(guest_IA_next_instr),
9873 S390X_GUEST_OFFSET(guest_IA)));
sewardj2019a972011-03-07 16:04:07 +00009874}
9875
9876static HChar *
9877s390_irgen_CS(UChar r1, UChar r3, IRTemp op2addr)
9878{
9879 s390_irgen_cas_32(r1, r3, op2addr);
9880
9881 return "cs";
9882}
9883
9884static HChar *
9885s390_irgen_CSY(UChar r1, UChar r3, IRTemp op2addr)
9886{
9887 s390_irgen_cas_32(r1, r3, op2addr);
9888
9889 return "csy";
9890}
9891
9892static HChar *
9893s390_irgen_CSG(UChar r1, UChar r3, IRTemp op2addr)
9894{
9895 IRCAS *cas;
9896 IRTemp op1 = newTemp(Ity_I64);
9897 IRTemp old_mem = newTemp(Ity_I64);
9898 IRTemp op3 = newTemp(Ity_I64);
9899 IRTemp result = newTemp(Ity_I64);
9900 IRTemp nequal = newTemp(Ity_I1);
9901
9902 assign(op1, get_gpr_dw0(r1));
9903 assign(op3, get_gpr_dw0(r3));
9904
9905 /* The first and second operands are compared. If they are equal,
9906 the third operand is stored at the second- operand location. */
9907 cas = mkIRCAS(IRTemp_INVALID, old_mem,
9908 Iend_BE, mkexpr(op2addr),
9909 NULL, mkexpr(op1), /* expected value */
9910 NULL, mkexpr(op3) /* new value */);
9911 stmt(IRStmt_CAS(cas));
9912
9913 /* Set CC. Operands compared equal -> 0, else 1. */
9914 assign(result, binop(Iop_Sub64, mkexpr(op1), mkexpr(old_mem)));
9915 s390_cc_thunk_put1(S390_CC_OP_BITWISE, result, False);
9916
9917 /* If operands were equal (cc == 0) just store the old value op1 in r1.
9918 Otherwise, store the old_value from memory in r1 and yield. */
9919 assign(nequal, binop(Iop_CmpNE32, s390_call_calculate_cc(), mkU32(0)));
9920 put_gpr_dw0(r1, mkite(mkexpr(nequal), mkexpr(old_mem), mkexpr(op1)));
florian8844a632012-04-13 04:04:06 +00009921 stmt(IRStmt_Exit(mkexpr(nequal), Ijk_Yield,
9922 IRConst_U64(guest_IA_next_instr),
9923 S390X_GUEST_OFFSET(guest_IA)));
sewardj2019a972011-03-07 16:04:07 +00009924
9925 return "csg";
9926}
9927
9928
9929/* Binary floating point */
9930
9931static HChar *
9932s390_irgen_AXBR(UChar r1, UChar r2)
9933{
9934 IRTemp op1 = newTemp(Ity_F128);
9935 IRTemp op2 = newTemp(Ity_F128);
9936 IRTemp result = newTemp(Ity_F128);
9937
9938 assign(op1, get_fpr_pair(r1));
9939 assign(op2, get_fpr_pair(r2));
9940 assign(result, triop(Iop_AddF128, mkU32(Irrm_NEAREST), mkexpr(op1),
9941 mkexpr(op2)));
9942 put_fpr_pair(r1, mkexpr(result));
9943
9944 s390_cc_thunk_put1f128(S390_CC_OP_BFP_RESULT_128, result);
9945
9946 return "axbr";
9947}
9948
9949/* The result of a Iop_CmdFxx operation is a condition code. It is
9950 encoded using the values defined in type IRCmpFxxResult.
9951 Before we can store the condition code into the guest state (or do
9952 anything else with it for that matter) we need to convert it to
9953 the encoding that s390 uses. This is what this function does.
9954
9955 s390 VEX b6 b2 b0 cc.1 cc.0
9956 0 0x40 EQ 1 0 0 0 0
9957 1 0x01 LT 0 0 1 0 1
9958 2 0x00 GT 0 0 0 1 0
9959 3 0x45 Unordered 1 1 1 1 1
9960
9961 The following bits from the VEX encoding are interesting:
9962 b0, b2, b6 with b0 being the LSB. We observe:
9963
9964 cc.0 = b0;
9965 cc.1 = b2 | (~b0 & ~b6)
9966
9967 with cc being the s390 condition code.
9968*/
9969static IRExpr *
9970convert_vex_fpcc_to_s390(IRTemp vex_cc)
9971{
9972 IRTemp cc0 = newTemp(Ity_I32);
9973 IRTemp cc1 = newTemp(Ity_I32);
9974 IRTemp b0 = newTemp(Ity_I32);
9975 IRTemp b2 = newTemp(Ity_I32);
9976 IRTemp b6 = newTemp(Ity_I32);
9977
9978 assign(b0, binop(Iop_And32, mkexpr(vex_cc), mkU32(1)));
9979 assign(b2, binop(Iop_And32, binop(Iop_Shr32, mkexpr(vex_cc), mkU8(2)),
9980 mkU32(1)));
9981 assign(b6, binop(Iop_And32, binop(Iop_Shr32, mkexpr(vex_cc), mkU8(6)),
9982 mkU32(1)));
9983
9984 assign(cc0, mkexpr(b0));
9985 assign(cc1, binop(Iop_Or32, mkexpr(b2),
9986 binop(Iop_And32,
9987 binop(Iop_Sub32, mkU32(1), mkexpr(b0)), /* ~b0 */
9988 binop(Iop_Sub32, mkU32(1), mkexpr(b6)) /* ~b6 */
9989 )));
9990
9991 return binop(Iop_Or32, mkexpr(cc0), binop(Iop_Shl32, mkexpr(cc1), mkU8(1)));
9992}
9993
9994static HChar *
9995s390_irgen_CEBR(UChar r1, UChar r2)
9996{
9997 IRTemp op1 = newTemp(Ity_F32);
9998 IRTemp op2 = newTemp(Ity_F32);
9999 IRTemp cc_vex = newTemp(Ity_I32);
10000 IRTemp cc_s390 = newTemp(Ity_I32);
10001
10002 assign(op1, get_fpr_w0(r1));
10003 assign(op2, get_fpr_w0(r2));
10004 assign(cc_vex, binop(Iop_CmpF32, mkexpr(op1), mkexpr(op2)));
10005
10006 assign(cc_s390, convert_vex_fpcc_to_s390(cc_vex));
10007 s390_cc_thunk_put1(S390_CC_OP_SET, cc_s390, False);
10008
10009 return "cebr";
10010}
10011
10012static HChar *
10013s390_irgen_CDBR(UChar r1, UChar r2)
10014{
10015 IRTemp op1 = newTemp(Ity_F64);
10016 IRTemp op2 = newTemp(Ity_F64);
10017 IRTemp cc_vex = newTemp(Ity_I32);
10018 IRTemp cc_s390 = newTemp(Ity_I32);
10019
10020 assign(op1, get_fpr_dw0(r1));
10021 assign(op2, get_fpr_dw0(r2));
10022 assign(cc_vex, binop(Iop_CmpF64, mkexpr(op1), mkexpr(op2)));
10023
10024 assign(cc_s390, convert_vex_fpcc_to_s390(cc_vex));
10025 s390_cc_thunk_put1(S390_CC_OP_SET, cc_s390, False);
10026
10027 return "cdbr";
10028}
10029
10030static HChar *
10031s390_irgen_CXBR(UChar r1, UChar r2)
10032{
10033 IRTemp op1 = newTemp(Ity_F128);
10034 IRTemp op2 = newTemp(Ity_F128);
10035 IRTemp cc_vex = newTemp(Ity_I32);
10036 IRTemp cc_s390 = newTemp(Ity_I32);
10037
10038 assign(op1, get_fpr_pair(r1));
10039 assign(op2, get_fpr_pair(r2));
10040 assign(cc_vex, binop(Iop_CmpF128, mkexpr(op1), mkexpr(op2)));
10041
10042 assign(cc_s390, convert_vex_fpcc_to_s390(cc_vex));
10043 s390_cc_thunk_put1(S390_CC_OP_SET, cc_s390, False);
10044
10045 return "cxbr";
10046}
10047
10048static HChar *
10049s390_irgen_CEB(UChar r1, IRTemp op2addr)
10050{
10051 IRTemp op1 = newTemp(Ity_F32);
10052 IRTemp op2 = newTemp(Ity_F32);
10053 IRTemp cc_vex = newTemp(Ity_I32);
10054 IRTemp cc_s390 = newTemp(Ity_I32);
10055
10056 assign(op1, get_fpr_w0(r1));
10057 assign(op2, load(Ity_F32, mkexpr(op2addr)));
10058 assign(cc_vex, binop(Iop_CmpF32, mkexpr(op1), mkexpr(op2)));
10059
10060 assign(cc_s390, convert_vex_fpcc_to_s390(cc_vex));
10061 s390_cc_thunk_put1(S390_CC_OP_SET, cc_s390, False);
10062
10063 return "ceb";
10064}
10065
10066static HChar *
10067s390_irgen_CDB(UChar r1, IRTemp op2addr)
10068{
10069 IRTemp op1 = newTemp(Ity_F64);
10070 IRTemp op2 = newTemp(Ity_F64);
10071 IRTemp cc_vex = newTemp(Ity_I32);
10072 IRTemp cc_s390 = newTemp(Ity_I32);
10073
10074 assign(op1, get_fpr_dw0(r1));
10075 assign(op2, load(Ity_F64, mkexpr(op2addr)));
10076 assign(cc_vex, binop(Iop_CmpF64, mkexpr(op1), mkexpr(op2)));
10077
10078 assign(cc_s390, convert_vex_fpcc_to_s390(cc_vex));
10079 s390_cc_thunk_put1(S390_CC_OP_SET, cc_s390, False);
10080
10081 return "cdb";
10082}
10083
10084static HChar *
10085s390_irgen_CXFBR(UChar r1, UChar r2)
10086{
10087 IRTemp op2 = newTemp(Ity_I32);
10088
10089 assign(op2, get_gpr_w1(r2));
10090 put_fpr_pair(r1, unop(Iop_I32StoF128, mkexpr(op2)));
10091
10092 return "cxfbr";
10093}
10094
10095static HChar *
10096s390_irgen_CXGBR(UChar r1, UChar r2)
10097{
10098 IRTemp op2 = newTemp(Ity_I64);
10099
10100 assign(op2, get_gpr_dw0(r2));
10101 put_fpr_pair(r1, unop(Iop_I64StoF128, mkexpr(op2)));
10102
10103 return "cxgbr";
10104}
10105
10106static HChar *
10107s390_irgen_CFXBR(UChar r3, UChar r1, UChar r2)
10108{
10109 IRTemp op = newTemp(Ity_F128);
10110 IRTemp result = newTemp(Ity_I32);
10111
10112 assign(op, get_fpr_pair(r2));
10113 assign(result, binop(Iop_F128toI32S, mkU32(encode_rounding_mode(r3)),
10114 mkexpr(op)));
10115 put_gpr_w1(r1, mkexpr(result));
10116 s390_cc_thunk_put1f128(S390_CC_OP_BFP_128_TO_INT_32, op);
10117
10118 return "cfxbr";
10119}
10120
10121static HChar *
10122s390_irgen_CGXBR(UChar r3, UChar r1, UChar r2)
10123{
10124 IRTemp op = newTemp(Ity_F128);
10125 IRTemp result = newTemp(Ity_I64);
10126
10127 assign(op, get_fpr_pair(r2));
10128 assign(result, binop(Iop_F128toI64S, mkU32(encode_rounding_mode(r3)),
10129 mkexpr(op)));
10130 put_gpr_dw0(r1, mkexpr(result));
10131 s390_cc_thunk_put1f128(S390_CC_OP_BFP_128_TO_INT_64, op);
10132
10133 return "cgxbr";
10134}
10135
10136static HChar *
10137s390_irgen_DXBR(UChar r1, UChar r2)
10138{
10139 IRTemp op1 = newTemp(Ity_F128);
10140 IRTemp op2 = newTemp(Ity_F128);
10141 IRTemp result = newTemp(Ity_F128);
10142
10143 assign(op1, get_fpr_pair(r1));
10144 assign(op2, get_fpr_pair(r2));
10145 assign(result, triop(Iop_DivF128, mkU32(Irrm_NEAREST), mkexpr(op1),
10146 mkexpr(op2)));
10147 put_fpr_pair(r1, mkexpr(result));
10148
10149 return "dxbr";
10150}
10151
10152static HChar *
10153s390_irgen_LTXBR(UChar r1, UChar r2)
10154{
10155 IRTemp result = newTemp(Ity_F128);
10156
10157 assign(result, get_fpr_pair(r2));
10158 put_fpr_pair(r1, mkexpr(result));
10159 s390_cc_thunk_put1f128(S390_CC_OP_BFP_RESULT_128, result);
10160
10161 return "ltxbr";
10162}
10163
10164static HChar *
10165s390_irgen_LCXBR(UChar r1, UChar r2)
10166{
10167 IRTemp result = newTemp(Ity_F128);
10168
10169 assign(result, unop(Iop_NegF128, get_fpr_pair(r2)));
10170 put_fpr_pair(r1, mkexpr(result));
10171 s390_cc_thunk_put1f128(S390_CC_OP_BFP_RESULT_128, result);
10172
10173 return "lcxbr";
10174}
10175
10176static HChar *
10177s390_irgen_LXDBR(UChar r1, UChar r2)
10178{
10179 IRTemp op = newTemp(Ity_F64);
10180
10181 assign(op, get_fpr_dw0(r2));
10182 put_fpr_pair(r1, unop(Iop_F64toF128, mkexpr(op)));
10183
10184 return "lxdbr";
10185}
10186
10187static HChar *
10188s390_irgen_LXEBR(UChar r1, UChar r2)
10189{
10190 IRTemp op = newTemp(Ity_F32);
10191
10192 assign(op, get_fpr_w0(r2));
10193 put_fpr_pair(r1, unop(Iop_F32toF128, mkexpr(op)));
10194
10195 return "lxebr";
10196}
10197
10198static HChar *
10199s390_irgen_LXDB(UChar r1, IRTemp op2addr)
10200{
10201 IRTemp op = newTemp(Ity_F64);
10202
10203 assign(op, load(Ity_F64, mkexpr(op2addr)));
10204 put_fpr_pair(r1, unop(Iop_F64toF128, mkexpr(op)));
10205
10206 return "lxdb";
10207}
10208
10209static HChar *
10210s390_irgen_LXEB(UChar r1, IRTemp op2addr)
10211{
10212 IRTemp op = newTemp(Ity_F32);
10213
10214 assign(op, load(Ity_F32, mkexpr(op2addr)));
10215 put_fpr_pair(r1, unop(Iop_F32toF128, mkexpr(op)));
10216
10217 return "lxeb";
10218}
10219
10220static HChar *
10221s390_irgen_LNEBR(UChar r1, UChar r2)
10222{
10223 IRTemp result = newTemp(Ity_F32);
10224
10225 assign(result, unop(Iop_NegF32, unop(Iop_AbsF32, get_fpr_w0(r2))));
10226 put_fpr_w0(r1, mkexpr(result));
10227 s390_cc_thunk_put1f(S390_CC_OP_BFP_RESULT_32, result);
10228
10229 return "lnebr";
10230}
10231
10232static HChar *
10233s390_irgen_LNDBR(UChar r1, UChar r2)
10234{
10235 IRTemp result = newTemp(Ity_F64);
10236
10237 assign(result, unop(Iop_NegF64, unop(Iop_AbsF64, get_fpr_dw0(r2))));
10238 put_fpr_dw0(r1, mkexpr(result));
10239 s390_cc_thunk_put1f(S390_CC_OP_BFP_RESULT_64, result);
10240
10241 return "lndbr";
10242}
10243
10244static HChar *
10245s390_irgen_LNXBR(UChar r1, UChar r2)
10246{
10247 IRTemp result = newTemp(Ity_F128);
10248
10249 assign(result, unop(Iop_NegF128, unop(Iop_AbsF128, get_fpr_pair(r2))));
10250 put_fpr_pair(r1, mkexpr(result));
10251 s390_cc_thunk_put1f128(S390_CC_OP_BFP_RESULT_128, result);
10252
10253 return "lnxbr";
10254}
10255
10256static HChar *
10257s390_irgen_LPEBR(UChar r1, UChar r2)
10258{
10259 IRTemp result = newTemp(Ity_F32);
10260
10261 assign(result, unop(Iop_AbsF32, get_fpr_w0(r2)));
10262 put_fpr_w0(r1, mkexpr(result));
10263 s390_cc_thunk_put1f(S390_CC_OP_BFP_RESULT_32, result);
10264
10265 return "lpebr";
10266}
10267
10268static HChar *
10269s390_irgen_LPDBR(UChar r1, UChar r2)
10270{
10271 IRTemp result = newTemp(Ity_F64);
10272
10273 assign(result, unop(Iop_AbsF64, get_fpr_dw0(r2)));
10274 put_fpr_dw0(r1, mkexpr(result));
10275 s390_cc_thunk_put1f(S390_CC_OP_BFP_RESULT_64, result);
10276
10277 return "lpdbr";
10278}
10279
10280static HChar *
10281s390_irgen_LPXBR(UChar r1, UChar r2)
10282{
10283 IRTemp result = newTemp(Ity_F128);
10284
10285 assign(result, unop(Iop_AbsF128, get_fpr_pair(r2)));
10286 put_fpr_pair(r1, mkexpr(result));
10287 s390_cc_thunk_put1f128(S390_CC_OP_BFP_RESULT_128, result);
10288
10289 return "lpxbr";
10290}
10291
10292static HChar *
10293s390_irgen_LDXBR(UChar r1, UChar r2)
10294{
10295 IRTemp result = newTemp(Ity_F64);
10296
10297 assign(result, binop(Iop_F128toF64, mkU32(Irrm_NEAREST), get_fpr_pair(r2)));
10298 put_fpr_dw0(r1, mkexpr(result));
10299
10300 return "ldxbr";
10301}
10302
10303static HChar *
10304s390_irgen_LEXBR(UChar r1, UChar r2)
10305{
10306 IRTemp result = newTemp(Ity_F32);
10307
10308 assign(result, binop(Iop_F128toF32, mkU32(Irrm_NEAREST), get_fpr_pair(r2)));
10309 put_fpr_w0(r1, mkexpr(result));
10310
10311 return "lexbr";
10312}
10313
10314static HChar *
10315s390_irgen_MXBR(UChar r1, UChar r2)
10316{
10317 IRTemp op1 = newTemp(Ity_F128);
10318 IRTemp op2 = newTemp(Ity_F128);
10319 IRTemp result = newTemp(Ity_F128);
10320
10321 assign(op1, get_fpr_pair(r1));
10322 assign(op2, get_fpr_pair(r2));
10323 assign(result, triop(Iop_MulF128, mkU32(Irrm_NEAREST), mkexpr(op1),
10324 mkexpr(op2)));
10325 put_fpr_pair(r1, mkexpr(result));
10326
10327 return "mxbr";
10328}
10329
10330static HChar *
10331s390_irgen_MAEBR(UChar r1, UChar r3, UChar r2)
10332{
10333 put_fpr_w0(r1, qop(Iop_MAddF32, mkU32(Irrm_NEAREST),
10334 get_fpr_w0(r1), get_fpr_w0(r2), get_fpr_w0(r3)));
10335
10336 return "maebr";
10337}
10338
10339static HChar *
10340s390_irgen_MADBR(UChar r1, UChar r3, UChar r2)
10341{
10342 put_fpr_dw0(r1, qop(Iop_MAddF64, mkU32(Irrm_NEAREST),
10343 get_fpr_dw0(r1), get_fpr_dw0(r2), get_fpr_dw0(r3)));
10344
10345 return "madbr";
10346}
10347
10348static HChar *
10349s390_irgen_MAEB(UChar r3, IRTemp op2addr, UChar r1)
10350{
10351 IRExpr *op2 = load(Ity_F32, mkexpr(op2addr));
10352
10353 put_fpr_w0(r1, qop(Iop_MAddF32, mkU32(Irrm_NEAREST),
10354 get_fpr_w0(r1), op2, get_fpr_w0(r3)));
10355
10356 return "maeb";
10357}
10358
10359static HChar *
10360s390_irgen_MADB(UChar r3, IRTemp op2addr, UChar r1)
10361{
10362 IRExpr *op2 = load(Ity_F64, mkexpr(op2addr));
10363
10364 put_fpr_dw0(r1, qop(Iop_MAddF64, mkU32(Irrm_NEAREST),
10365 get_fpr_dw0(r1), op2, get_fpr_dw0(r3)));
10366
10367 return "madb";
10368}
10369
10370static HChar *
10371s390_irgen_MSEBR(UChar r1, UChar r3, UChar r2)
10372{
10373 put_fpr_w0(r1, qop(Iop_MSubF32, mkU32(Irrm_NEAREST),
10374 get_fpr_w0(r1), get_fpr_w0(r2), get_fpr_w0(r3)));
10375
10376 return "msebr";
10377}
10378
10379static HChar *
10380s390_irgen_MSDBR(UChar r1, UChar r3, UChar r2)
10381{
10382 put_fpr_dw0(r1, qop(Iop_MSubF64, mkU32(Irrm_NEAREST),
10383 get_fpr_dw0(r1), get_fpr_dw0(r2), get_fpr_dw0(r3)));
10384
10385 return "msdbr";
10386}
10387
10388static HChar *
10389s390_irgen_MSEB(UChar r3, IRTemp op2addr, UChar r1)
10390{
10391 IRExpr *op2 = load(Ity_F32, mkexpr(op2addr));
10392
10393 put_fpr_w0(r1, qop(Iop_MSubF32, mkU32(Irrm_NEAREST),
10394 get_fpr_w0(r1), op2, get_fpr_w0(r3)));
10395
10396 return "mseb";
10397}
10398
10399static HChar *
10400s390_irgen_MSDB(UChar r3, IRTemp op2addr, UChar r1)
10401{
10402 IRExpr *op2 = load(Ity_F64, mkexpr(op2addr));
10403
10404 put_fpr_dw0(r1, qop(Iop_MSubF64, mkU32(Irrm_NEAREST),
10405 get_fpr_dw0(r1), op2, get_fpr_dw0(r3)));
10406
10407 return "msdb";
10408}
10409
10410static HChar *
10411s390_irgen_SQEBR(UChar r1, UChar r2)
10412{
10413 IRTemp result = newTemp(Ity_F32);
10414
10415 assign(result, binop(Iop_SqrtF32, mkU32(Irrm_NEAREST), get_fpr_w0(r2)));
10416 put_fpr_w0(r1, mkexpr(result));
10417
10418 return "sqebr";
10419}
10420
10421static HChar *
10422s390_irgen_SQDBR(UChar r1, UChar r2)
10423{
10424 IRTemp result = newTemp(Ity_F64);
10425
10426 assign(result, binop(Iop_SqrtF64, mkU32(Irrm_NEAREST), get_fpr_dw0(r2)));
10427 put_fpr_dw0(r1, mkexpr(result));
10428
10429 return "sqdbr";
10430}
10431
10432static HChar *
10433s390_irgen_SQXBR(UChar r1, UChar r2)
10434{
10435 IRTemp result = newTemp(Ity_F128);
10436
10437 assign(result, binop(Iop_SqrtF128, mkU32(Irrm_NEAREST), get_fpr_pair(r2)));
10438 put_fpr_pair(r1, mkexpr(result));
10439
10440 return "sqxbr";
10441}
10442
10443static HChar *
10444s390_irgen_SQEB(UChar r1, IRTemp op2addr)
10445{
10446 IRTemp op = newTemp(Ity_F32);
10447
10448 assign(op, load(Ity_F32, mkexpr(op2addr)));
10449 put_fpr_w0(r1, binop(Iop_SqrtF32, mkU32(Irrm_NEAREST), mkexpr(op)));
10450
10451 return "sqeb";
10452}
10453
10454static HChar *
10455s390_irgen_SQDB(UChar r1, IRTemp op2addr)
10456{
10457 IRTemp op = newTemp(Ity_F64);
10458
10459 assign(op, load(Ity_F64, mkexpr(op2addr)));
10460 put_fpr_dw0(r1, binop(Iop_SqrtF64, mkU32(Irrm_NEAREST), mkexpr(op)));
10461
10462 return "sqdb";
10463}
10464
10465static HChar *
10466s390_irgen_SXBR(UChar r1, UChar r2)
10467{
10468 IRTemp op1 = newTemp(Ity_F128);
10469 IRTemp op2 = newTemp(Ity_F128);
10470 IRTemp result = newTemp(Ity_F128);
10471
10472 assign(op1, get_fpr_pair(r1));
10473 assign(op2, get_fpr_pair(r2));
10474 assign(result, triop(Iop_SubF128, mkU32(Irrm_NEAREST), mkexpr(op1),
10475 mkexpr(op2)));
10476 put_fpr_pair(r1, mkexpr(result));
10477 s390_cc_thunk_put1f128(S390_CC_OP_BFP_RESULT_128, result);
10478
10479 return "sxbr";
10480}
10481
10482static HChar *
10483s390_irgen_TCEB(UChar r1, IRTemp op2addr)
10484{
10485 IRTemp value = newTemp(Ity_F32);
10486
10487 assign(value, get_fpr_w0(r1));
10488
10489 s390_cc_thunk_putFZ(S390_CC_OP_BFP_TDC_32, value, op2addr);
10490
10491 return "tceb";
10492}
10493
10494static HChar *
10495s390_irgen_TCDB(UChar r1, IRTemp op2addr)
10496{
10497 IRTemp value = newTemp(Ity_F64);
10498
10499 assign(value, get_fpr_dw0(r1));
10500
10501 s390_cc_thunk_putFZ(S390_CC_OP_BFP_TDC_64, value, op2addr);
10502
10503 return "tcdb";
10504}
10505
10506static HChar *
10507s390_irgen_TCXB(UChar r1, IRTemp op2addr)
10508{
10509 IRTemp value = newTemp(Ity_F128);
10510
10511 assign(value, get_fpr_pair(r1));
10512
10513 s390_cc_thunk_put1f128Z(S390_CC_OP_BFP_TDC_128, value, op2addr);
10514
10515 return "tcxb";
10516}
10517
10518static HChar *
10519s390_irgen_LCDFR(UChar r1, UChar r2)
10520{
10521 IRTemp result = newTemp(Ity_F64);
10522
10523 assign(result, unop(Iop_NegF64, get_fpr_dw0(r2)));
10524 put_fpr_dw0(r1, mkexpr(result));
10525
10526 return "lcdfr";
10527}
10528
10529static HChar *
10530s390_irgen_LNDFR(UChar r1, UChar r2)
10531{
10532 IRTemp result = newTemp(Ity_F64);
10533
10534 assign(result, unop(Iop_NegF64, unop(Iop_AbsF64, get_fpr_dw0(r2))));
10535 put_fpr_dw0(r1, mkexpr(result));
10536
10537 return "lndfr";
10538}
10539
10540static HChar *
10541s390_irgen_LPDFR(UChar r1, UChar r2)
10542{
10543 IRTemp result = newTemp(Ity_F64);
10544
10545 assign(result, unop(Iop_AbsF64, get_fpr_dw0(r2)));
10546 put_fpr_dw0(r1, mkexpr(result));
10547
10548 return "lpdfr";
10549}
10550
10551static HChar *
10552s390_irgen_LDGR(UChar r1, UChar r2)
10553{
10554 put_fpr_dw0(r1, unop(Iop_ReinterpI64asF64, get_gpr_dw0(r2)));
10555
10556 return "ldgr";
10557}
10558
10559static HChar *
10560s390_irgen_LGDR(UChar r1, UChar r2)
10561{
10562 put_gpr_dw0(r1, unop(Iop_ReinterpF64asI64, get_fpr_dw0(r2)));
10563
10564 return "lgdr";
10565}
10566
10567
10568static HChar *
10569s390_irgen_CPSDR(UChar r3, UChar r1, UChar r2)
10570{
10571 IRTemp sign = newTemp(Ity_I64);
10572 IRTemp value = newTemp(Ity_I64);
10573
10574 assign(sign, binop(Iop_And64, unop(Iop_ReinterpF64asI64, get_fpr_dw0(r3)),
10575 mkU64(1ULL << 63)));
10576 assign(value, binop(Iop_And64, unop(Iop_ReinterpF64asI64, get_fpr_dw0(r2)),
10577 mkU64((1ULL << 63) - 1)));
10578 put_fpr_dw0(r1, unop(Iop_ReinterpI64asF64, binop(Iop_Or64, mkexpr(value),
10579 mkexpr(sign))));
10580
10581 return "cpsdr";
10582}
10583
10584
10585static UInt
10586s390_do_cvb(ULong decimal)
10587{
10588#if defined(VGA_s390x)
10589 UInt binary;
10590
10591 __asm__ volatile (
10592 "cvb %[result],%[input]\n\t"
10593 : [result] "=d"(binary)
10594 : [input] "m"(decimal)
10595 );
10596
10597 return binary;
10598#else
10599 return 0;
10600#endif
10601}
10602
10603static IRExpr *
10604s390_call_cvb(IRExpr *in)
10605{
10606 IRExpr **args, *call;
10607
10608 args = mkIRExprVec_1(in);
10609 call = mkIRExprCCall(Ity_I32, 0 /*regparm*/,
10610 "s390_do_cvb", &s390_do_cvb, args);
10611
10612 /* Nothing is excluded from definedness checking. */
10613 call->Iex.CCall.cee->mcx_mask = 0;
10614
10615 return call;
10616}
10617
10618static HChar *
10619s390_irgen_CVB(UChar r1, IRTemp op2addr)
10620{
10621 put_gpr_w1(r1, s390_call_cvb(load(Ity_I64, mkexpr(op2addr))));
10622
10623 return "cvb";
10624}
10625
10626static HChar *
10627s390_irgen_CVBY(UChar r1, IRTemp op2addr)
10628{
10629 put_gpr_w1(r1, s390_call_cvb(load(Ity_I64, mkexpr(op2addr))));
10630
10631 return "cvby";
10632}
10633
10634
10635static ULong
10636s390_do_cvd(ULong binary_in)
10637{
10638#if defined(VGA_s390x)
10639 UInt binary = binary_in & 0xffffffffULL;
10640 ULong decimal;
10641
10642 __asm__ volatile (
10643 "cvd %[input],%[result]\n\t"
10644 : [result] "=m"(decimal)
10645 : [input] "d"(binary)
10646 );
10647
10648 return decimal;
10649#else
10650 return 0;
10651#endif
10652}
10653
10654static IRExpr *
10655s390_call_cvd(IRExpr *in)
10656{
10657 IRExpr **args, *call;
10658
10659 args = mkIRExprVec_1(in);
10660 call = mkIRExprCCall(Ity_I64, 0 /*regparm*/,
10661 "s390_do_cvd", &s390_do_cvd, args);
10662
10663 /* Nothing is excluded from definedness checking. */
10664 call->Iex.CCall.cee->mcx_mask = 0;
10665
10666 return call;
10667}
10668
10669static HChar *
10670s390_irgen_CVD(UChar r1, IRTemp op2addr)
10671{
10672 store(mkexpr(op2addr), s390_call_cvd(get_gpr_w1(r1)));
10673
10674 return "cvd";
10675}
10676
10677static HChar *
10678s390_irgen_CVDY(UChar r1, IRTemp op2addr)
10679{
10680 store(mkexpr(op2addr), s390_call_cvd(get_gpr_w1(r1)));
10681
10682 return "cvdy";
10683}
10684
10685static HChar *
10686s390_irgen_FLOGR(UChar r1, UChar r2)
10687{
10688 IRTemp input = newTemp(Ity_I64);
10689 IRTemp not_zero = newTemp(Ity_I64);
10690 IRTemp tmpnum = newTemp(Ity_I64);
10691 IRTemp num = newTemp(Ity_I64);
10692 IRTemp shift_amount = newTemp(Ity_I8);
10693
10694 /* We use the "count leading zeroes" operator because the number of
10695 leading zeroes is identical with the bit position of the first '1' bit.
10696 However, that operator does not work when the input value is zero.
10697 Therefore, we set the LSB of the input value to 1 and use Clz64 on
10698 the modified value. If input == 0, then the result is 64. Otherwise,
10699 the result of Clz64 is what we want. */
10700
10701 assign(input, get_gpr_dw0(r2));
10702 assign(not_zero, binop(Iop_Or64, mkexpr(input), mkU64(1)));
10703 assign(tmpnum, unop(Iop_Clz64, mkexpr(not_zero)));
10704
10705 /* num = (input == 0) ? 64 : tmpnum */
10706 assign(num, mkite(binop(Iop_CmpEQ64, mkexpr(input), mkU64(0)),
10707 /* == 0 */ mkU64(64),
10708 /* != 0 */ mkexpr(tmpnum)));
10709
10710 put_gpr_dw0(r1, mkexpr(num));
10711
10712 /* Set the leftmost '1' bit of the input value to zero. The general scheme
10713 is to first shift the input value by NUM + 1 bits to the left which
10714 causes the leftmost '1' bit to disappear. Then we shift logically to
10715 the right by NUM + 1 bits. Because the semantics of Iop_Shl64 and
10716 Iop_Shr64 are undefined if the shift-amount is greater than or equal to
10717 the width of the value-to-be-shifted, we need to special case
10718 NUM + 1 >= 64. This is equivalent to INPUT != 0 && INPUT != 1.
10719 For both such INPUT values the result will be 0. */
10720
10721 assign(shift_amount, unop(Iop_64to8, binop(Iop_Add64, mkexpr(num),
10722 mkU64(1))));
10723
10724 put_gpr_dw0(r1 + 1,
florian6ad49522011-09-09 02:38:55 +000010725 mkite(binop(Iop_CmpLE64U, mkexpr(input), mkU64(1)),
10726 /* == 0 || == 1*/ mkU64(0),
10727 /* otherwise */
10728 binop(Iop_Shr64,
10729 binop(Iop_Shl64, mkexpr(input),
10730 mkexpr(shift_amount)),
10731 mkexpr(shift_amount))));
sewardj2019a972011-03-07 16:04:07 +000010732
10733 /* Compare the original value as an unsigned integer with 0. */
10734 s390_cc_thunk_put2(S390_CC_OP_UNSIGNED_COMPARE, input,
10735 mktemp(Ity_I64, mkU64(0)), False);
10736
10737 return "flogr";
10738}
10739
sewardj1e5fea62011-05-17 16:18:36 +000010740static HChar *
10741s390_irgen_STCK(IRTemp op2addr)
10742{
10743 IRDirty *d;
10744 IRTemp cc = newTemp(Ity_I64);
10745
10746 d = unsafeIRDirty_1_N(cc, 0, "s390x_dirtyhelper_STCK",
10747 &s390x_dirtyhelper_STCK,
10748 mkIRExprVec_1(mkexpr(op2addr)));
10749 d->mFx = Ifx_Write;
10750 d->mAddr = mkexpr(op2addr);
10751 d->mSize = 8;
10752 stmt(IRStmt_Dirty(d));
10753 s390_cc_thunk_fill(mkU64(S390_CC_OP_SET),
10754 mkexpr(cc), mkU64(0), mkU64(0));
10755 return "stck";
10756}
10757
10758static HChar *
10759s390_irgen_STCKF(IRTemp op2addr)
10760{
10761 IRDirty *d;
10762 IRTemp cc = newTemp(Ity_I64);
10763
10764 d = unsafeIRDirty_1_N(cc, 0, "s390x_dirtyhelper_STCKF",
10765 &s390x_dirtyhelper_STCKF,
10766 mkIRExprVec_1(mkexpr(op2addr)));
10767 d->mFx = Ifx_Write;
10768 d->mAddr = mkexpr(op2addr);
10769 d->mSize = 8;
10770 stmt(IRStmt_Dirty(d));
10771 s390_cc_thunk_fill(mkU64(S390_CC_OP_SET),
10772 mkexpr(cc), mkU64(0), mkU64(0));
10773 return "stckf";
10774}
10775
10776static HChar *
10777s390_irgen_STCKE(IRTemp op2addr)
10778{
10779 IRDirty *d;
10780 IRTemp cc = newTemp(Ity_I64);
10781
10782 d = unsafeIRDirty_1_N(cc, 0, "s390x_dirtyhelper_STCKE",
10783 &s390x_dirtyhelper_STCKE,
10784 mkIRExprVec_1(mkexpr(op2addr)));
10785 d->mFx = Ifx_Write;
10786 d->mAddr = mkexpr(op2addr);
10787 d->mSize = 16;
10788 stmt(IRStmt_Dirty(d));
10789 s390_cc_thunk_fill(mkU64(S390_CC_OP_SET),
10790 mkexpr(cc), mkU64(0), mkU64(0));
10791 return "stcke";
10792}
10793
florian933065d2011-07-11 01:48:02 +000010794static HChar *
10795s390_irgen_STFLE(IRTemp op2addr)
10796{
10797 IRDirty *d;
10798 IRTemp cc = newTemp(Ity_I64);
10799
10800 d = unsafeIRDirty_1_N(cc, 0, "s390x_dirtyhelper_STFLE",
10801 &s390x_dirtyhelper_STFLE,
10802 mkIRExprVec_1(mkexpr(op2addr)));
10803
10804 d->needsBBP = 1; /* Need to pass pointer to guest state to helper */
10805
10806 d->fxState[0].fx = Ifx_Modify; /* read then write */
10807 d->fxState[0].offset = S390X_GUEST_OFFSET(guest_r0);
10808 d->fxState[0].size = sizeof(ULong);
10809 d->nFxState = 1;
10810
10811 d->mAddr = mkexpr(op2addr);
10812 /* Pretend all double words are written */
10813 d->mSize = S390_NUM_FACILITY_DW * sizeof(ULong);
10814 d->mFx = Ifx_Write;
10815
10816 stmt(IRStmt_Dirty(d));
10817
10818 s390_cc_thunk_fill(mkU64(S390_CC_OP_SET), mkexpr(cc), mkU64(0), mkU64(0));
10819
10820 return "stfle";
10821}
10822
floriana4384a32011-08-11 16:58:45 +000010823static HChar *
10824s390_irgen_CKSM(UChar r1,UChar r2)
10825{
10826 IRTemp addr = newTemp(Ity_I64);
10827 IRTemp op = newTemp(Ity_I32);
10828 IRTemp len = newTemp(Ity_I64);
10829 IRTemp oldval = newTemp(Ity_I32);
10830 IRTemp mask = newTemp(Ity_I32);
10831 IRTemp newop = newTemp(Ity_I32);
10832 IRTemp result = newTemp(Ity_I32);
10833 IRTemp result1 = newTemp(Ity_I32);
10834 IRTemp inc = newTemp(Ity_I64);
10835
10836 assign(oldval, get_gpr_w1(r1));
10837 assign(addr, get_gpr_dw0(r2));
10838 assign(len, get_gpr_dw0(r2+1));
10839
10840 /* Condition code is always zero. */
10841 s390_cc_set(0);
10842
10843 /* If length is zero, there is no need to calculate the checksum */
10844 if_condition_goto(binop(Iop_CmpEQ64, mkexpr(len), mkU64(0)),
10845 guest_IA_next_instr);
10846
10847 /* Assiging the increment variable to adjust address and length
10848 later on. */
10849 assign(inc, mkite(binop(Iop_CmpLT64U, mkexpr(len), mkU64(4)),
10850 mkexpr(len), mkU64(4)));
10851
10852 /* If length < 4 the final 4-byte 2nd operand value is computed by
10853 appending the remaining bytes to the right with 0. This is done
10854 by AND'ing the 4 bytes loaded from memory with an appropriate
10855 mask. If length >= 4, that mask is simply 0xffffffff. */
10856
10857 assign(mask, mkite(binop(Iop_CmpLT64U, mkexpr(len), mkU64(4)),
10858 /* Mask computation when len < 4:
10859 0xffffffff << (32 - (len % 4)*8) */
10860 binop(Iop_Shl32, mkU32(0xffffffff),
10861 unop(Iop_32to8,
10862 binop(Iop_Sub32, mkU32(32),
10863 binop(Iop_Shl32,
10864 unop(Iop_64to32,
10865 binop(Iop_And64,
10866 mkexpr(len), mkU64(3))),
10867 mkU8(3))))),
10868 mkU32(0xffffffff)));
10869
10870 assign(op, load(Ity_I32, mkexpr(addr)));
10871 assign(newop, binop(Iop_And32, mkexpr(op), mkexpr(mask)));
10872 assign(result, binop(Iop_Add32, mkexpr(newop), mkexpr(oldval)));
10873
10874 /* Checking for carry */
10875 assign(result1, mkite(binop(Iop_CmpLT32U, mkexpr(result), mkexpr(newop)),
10876 binop(Iop_Add32, mkexpr(result), mkU32(1)),
10877 mkexpr(result)));
10878
10879 put_gpr_w1(r1, mkexpr(result1));
10880 put_gpr_dw0(r2, binop(Iop_Add64, mkexpr(addr), mkexpr(inc)));
10881 put_gpr_dw0(r2+1, binop(Iop_Sub64, mkexpr(len), mkexpr(inc)));
10882
10883 if_condition_goto(binop(Iop_CmpNE64, mkexpr(len), mkU64(0)),
10884 guest_IA_curr_instr);
10885
10886 return "cksm";
10887}
10888
florian9af37692012-01-15 21:01:16 +000010889static HChar *
10890s390_irgen_TROO(UChar m3, UChar r1, UChar r2)
10891{
10892 IRTemp src_addr, des_addr, tab_addr, src_len, test_byte;
10893 src_addr = newTemp(Ity_I64);
10894 des_addr = newTemp(Ity_I64);
10895 tab_addr = newTemp(Ity_I64);
10896 test_byte = newTemp(Ity_I8);
10897 src_len = newTemp(Ity_I64);
10898
10899 assign(src_addr, get_gpr_dw0(r2));
10900 assign(des_addr, get_gpr_dw0(r1));
10901 assign(tab_addr, get_gpr_dw0(1));
florian53518532012-01-18 14:00:31 +000010902 assign(src_len, get_gpr_dw0(r1+1));
florian9af37692012-01-15 21:01:16 +000010903 assign(test_byte, get_gpr_b7(0));
10904
10905 IRTemp op = newTemp(Ity_I8);
10906 IRTemp op1 = newTemp(Ity_I8);
10907 IRTemp result = newTemp(Ity_I64);
10908
10909 /* End of source string? We're done; proceed to next insn */
10910 s390_cc_set(0);
10911 if_condition_goto(binop(Iop_CmpEQ64, mkexpr(src_len), mkU64(0)),
10912 guest_IA_next_instr);
10913
10914 /* Load character from source string, index translation table and
10915 store translated character in op1. */
10916 assign(op, load(Ity_I8, mkexpr(src_addr)));
10917
10918 assign(result, binop(Iop_Add64, unop(Iop_8Uto64, mkexpr(op)),
10919 mkexpr(tab_addr)));
10920 assign(op1, load(Ity_I8, mkexpr(result)));
10921
10922 if (! s390_host_has_etf2 || (m3 & 0x1) == 0) {
10923 s390_cc_set(1);
10924 if_condition_goto(binop(Iop_CmpEQ8, mkexpr(op1), mkexpr(test_byte)),
10925 guest_IA_next_instr);
10926 }
10927 store(get_gpr_dw0(r1), mkexpr(op1));
10928
10929 put_gpr_dw0(r1, binop(Iop_Add64, mkexpr(des_addr), mkU64(1)));
10930 put_gpr_dw0(r2, binop(Iop_Add64, mkexpr(src_addr), mkU64(1)));
10931 put_gpr_dw0(r1+1, binop(Iop_Sub64, mkexpr(src_len), mkU64(1)));
10932
10933 always_goto_and_chase(guest_IA_curr_instr);
10934
10935 return "troo";
10936}
10937
florian730448f2012-02-04 17:07:07 +000010938static HChar *
10939s390_irgen_TRTO(UChar m3, UChar r1, UChar r2)
10940{
10941 IRTemp src_addr, des_addr, tab_addr, src_len, test_byte;
10942 src_addr = newTemp(Ity_I64);
10943 des_addr = newTemp(Ity_I64);
10944 tab_addr = newTemp(Ity_I64);
10945 test_byte = newTemp(Ity_I8);
10946 src_len = newTemp(Ity_I64);
10947
10948 assign(src_addr, get_gpr_dw0(r2));
10949 assign(des_addr, get_gpr_dw0(r1));
10950 assign(tab_addr, get_gpr_dw0(1));
10951 assign(src_len, get_gpr_dw0(r1+1));
10952 assign(test_byte, get_gpr_b7(0));
10953
10954 IRTemp op = newTemp(Ity_I16);
10955 IRTemp op1 = newTemp(Ity_I8);
10956 IRTemp result = newTemp(Ity_I64);
10957
10958 /* End of source string? We're done; proceed to next insn */
10959 s390_cc_set(0);
10960 if_condition_goto(binop(Iop_CmpEQ64, mkexpr(src_len), mkU64(0)),
10961 guest_IA_next_instr);
10962
10963 /* Load character from source string, index translation table and
10964 store translated character in op1. */
10965 assign(op, load(Ity_I16, mkexpr(src_addr)));
10966
10967 assign(result, binop(Iop_Add64, unop(Iop_16Uto64, mkexpr(op)),
10968 mkexpr(tab_addr)));
10969
10970 assign(op1, load(Ity_I8, mkexpr(result)));
10971
10972 if (! s390_host_has_etf2 || (m3 & 0x1) == 0) {
10973 s390_cc_set(1);
10974 if_condition_goto(binop(Iop_CmpEQ8, mkexpr(op1), mkexpr(test_byte)),
10975 guest_IA_next_instr);
10976 }
10977 store(get_gpr_dw0(r1), mkexpr(op1));
10978
10979 put_gpr_dw0(r2, binop(Iop_Add64, mkexpr(src_addr), mkU64(2)));
10980 put_gpr_dw0(r1, binop(Iop_Add64, mkexpr(des_addr), mkU64(1)));
10981 put_gpr_dw0(r1+1, binop(Iop_Sub64, mkexpr(src_len), mkU64(2)));
10982
10983 always_goto_and_chase(guest_IA_curr_instr);
10984
10985 return "trto";
10986}
10987
10988static HChar *
10989s390_irgen_TROT(UChar m3, UChar r1, UChar r2)
10990{
10991 IRTemp src_addr, des_addr, tab_addr, src_len, test_byte;
10992 src_addr = newTemp(Ity_I64);
10993 des_addr = newTemp(Ity_I64);
10994 tab_addr = newTemp(Ity_I64);
10995 test_byte = newTemp(Ity_I16);
10996 src_len = newTemp(Ity_I64);
10997
10998 assign(src_addr, get_gpr_dw0(r2));
10999 assign(des_addr, get_gpr_dw0(r1));
11000 assign(tab_addr, get_gpr_dw0(1));
11001 assign(src_len, get_gpr_dw0(r1+1));
11002 assign(test_byte, get_gpr_hw3(0));
11003
11004 IRTemp op = newTemp(Ity_I8);
11005 IRTemp op1 = newTemp(Ity_I16);
11006 IRTemp result = newTemp(Ity_I64);
11007
11008 /* End of source string? We're done; proceed to next insn */
11009 s390_cc_set(0);
11010 if_condition_goto(binop(Iop_CmpEQ64, mkexpr(src_len), mkU64(0)),
11011 guest_IA_next_instr);
11012
11013 /* Load character from source string, index translation table and
11014 store translated character in op1. */
11015 assign(op, binop(Iop_Shl8, load(Ity_I8, mkexpr(src_addr)), mkU8(1)));
11016
11017 assign(result, binop(Iop_Add64, unop(Iop_8Uto64, mkexpr(op)),
11018 mkexpr(tab_addr)));
11019 assign(op1, load(Ity_I16, mkexpr(result)));
11020
11021 if (! s390_host_has_etf2 || (m3 & 0x1) == 0) {
11022 s390_cc_set(1);
11023 if_condition_goto(binop(Iop_CmpEQ16, mkexpr(op1), mkexpr(test_byte)),
11024 guest_IA_next_instr);
11025 }
11026 store(get_gpr_dw0(r1), mkexpr(op1));
11027
11028 put_gpr_dw0(r2, binop(Iop_Add64, mkexpr(src_addr), mkU64(1)));
11029 put_gpr_dw0(r1, binop(Iop_Add64, mkexpr(des_addr), mkU64(2)));
11030 put_gpr_dw0(r1+1, binop(Iop_Sub64, mkexpr(src_len), mkU64(1)));
11031
11032 always_goto_and_chase(guest_IA_curr_instr);
11033
11034 return "trot";
11035}
11036
11037static HChar *
11038s390_irgen_TRTT(UChar m3, UChar r1, UChar r2)
11039{
11040 IRTemp src_addr, des_addr, tab_addr, src_len, test_byte;
11041 src_addr = newTemp(Ity_I64);
11042 des_addr = newTemp(Ity_I64);
11043 tab_addr = newTemp(Ity_I64);
11044 test_byte = newTemp(Ity_I16);
11045 src_len = newTemp(Ity_I64);
11046
11047 assign(src_addr, get_gpr_dw0(r2));
11048 assign(des_addr, get_gpr_dw0(r1));
11049 assign(tab_addr, get_gpr_dw0(1));
11050 assign(src_len, get_gpr_dw0(r1+1));
11051 assign(test_byte, get_gpr_hw3(0));
11052
11053 IRTemp op = newTemp(Ity_I16);
11054 IRTemp op1 = newTemp(Ity_I16);
11055 IRTemp result = newTemp(Ity_I64);
11056
11057 /* End of source string? We're done; proceed to next insn */
11058 s390_cc_set(0);
11059 if_condition_goto(binop(Iop_CmpEQ64, mkexpr(src_len), mkU64(0)),
11060 guest_IA_next_instr);
11061
11062 /* Load character from source string, index translation table and
11063 store translated character in op1. */
11064 assign(op, binop(Iop_Shl16, load(Ity_I16, mkexpr(src_addr)), mkU8(1)));
11065
11066 assign(result, binop(Iop_Add64, unop(Iop_16Uto64, mkexpr(op)),
11067 mkexpr(tab_addr)));
11068 assign(op1, load(Ity_I16, mkexpr(result)));
11069
11070 if (! s390_host_has_etf2 || (m3 & 0x1) == 0) {
11071 s390_cc_set(1);
11072 if_condition_goto(binop(Iop_CmpEQ16, mkexpr(op1), mkexpr(test_byte)),
11073 guest_IA_next_instr);
11074 }
11075
11076 store(get_gpr_dw0(r1), mkexpr(op1));
11077
11078 put_gpr_dw0(r2, binop(Iop_Add64, mkexpr(src_addr), mkU64(2)));
11079 put_gpr_dw0(r1, binop(Iop_Add64, mkexpr(des_addr), mkU64(2)));
11080 put_gpr_dw0(r1+1, binop(Iop_Sub64, mkexpr(src_len), mkU64(2)));
11081
11082 always_goto_and_chase(guest_IA_curr_instr);
11083
11084 return "trtt";
11085}
11086
11087static HChar *
11088s390_irgen_TR(UChar length, IRTemp start1, IRTemp start2)
11089{
11090 IRTemp op = newTemp(Ity_I8);
11091 IRTemp op1 = newTemp(Ity_I8);
11092 IRTemp result = newTemp(Ity_I64);
11093 IRTemp counter = newTemp(Ity_I64);
11094
11095 assign(counter, get_counter_dw0());
11096
11097 assign(op, load(Ity_I8, binop(Iop_Add64, mkexpr(start1), mkexpr(counter))));
11098
11099 assign(result, binop(Iop_Add64, unop(Iop_8Uto64, mkexpr(op)), mkexpr(start2)));
11100
11101 assign(op1, load(Ity_I8, mkexpr(result)));
11102 store(binop(Iop_Add64, mkexpr(start1), mkexpr(counter)), mkexpr(op1));
11103
11104 put_counter_dw0(binop(Iop_Add64, mkexpr(counter), mkU64(1)));
11105 if_condition_goto(binop(Iop_CmpNE64, mkexpr(counter), mkU64(length)),
11106 guest_IA_curr_instr);
11107
11108 put_counter_dw0(mkU64(0));
florian8844a632012-04-13 04:04:06 +000011109 dummy_put_IA();
florian730448f2012-02-04 17:07:07 +000011110
11111 return "tr";
11112}
11113
11114static HChar *
11115s390_irgen_TRE(UChar r1,UChar r2)
11116{
11117 IRTemp src_addr, tab_addr, src_len, test_byte;
11118 src_addr = newTemp(Ity_I64);
11119 tab_addr = newTemp(Ity_I64);
11120 src_len = newTemp(Ity_I64);
11121 test_byte = newTemp(Ity_I8);
11122
11123 assign(src_addr, get_gpr_dw0(r1));
11124 assign(src_len, get_gpr_dw0(r1+1));
11125 assign(tab_addr, get_gpr_dw0(r2));
11126 assign(test_byte, get_gpr_b7(0));
11127
11128 IRTemp op = newTemp(Ity_I8);
11129 IRTemp op1 = newTemp(Ity_I8);
11130 IRTemp result = newTemp(Ity_I64);
11131
11132 /* End of source string? We're done; proceed to next insn */
11133 s390_cc_set(0);
11134 if_condition_goto(binop(Iop_CmpEQ64, mkexpr(src_len), mkU64(0)),
11135 guest_IA_next_instr);
11136
11137 /* Load character from source string and compare with test byte */
11138 assign(op, load(Ity_I8, mkexpr(src_addr)));
11139
11140 s390_cc_set(1);
11141 if_condition_goto(binop(Iop_CmpEQ8, mkexpr(op), mkexpr(test_byte)),
11142 guest_IA_next_instr);
11143
11144 assign(result, binop(Iop_Add64, unop(Iop_8Uto64, mkexpr(op)),
11145 mkexpr(tab_addr)));
11146
11147 assign(op1, load(Ity_I8, mkexpr(result)));
11148
11149 store(get_gpr_dw0(r1), mkexpr(op1));
11150 put_gpr_dw0(r1, binop(Iop_Add64, mkexpr(src_addr), mkU64(1)));
11151 put_gpr_dw0(r1+1, binop(Iop_Sub64, mkexpr(src_len), mkU64(1)));
11152
11153 always_goto(mkU64(guest_IA_curr_instr));
11154
11155 return "tre";
11156}
11157
floriana4384a32011-08-11 16:58:45 +000011158
sewardj2019a972011-03-07 16:04:07 +000011159/*------------------------------------------------------------*/
11160/*--- Build IR for special instructions ---*/
11161/*------------------------------------------------------------*/
11162
florianb4df7682011-07-05 02:09:01 +000011163static void
sewardj2019a972011-03-07 16:04:07 +000011164s390_irgen_client_request(void)
11165{
11166 if (0)
11167 vex_printf("%%R3 = client_request ( %%R2 )\n");
11168
11169 irsb->next = mkU64((ULong)(guest_IA_curr_instr
11170 + S390_SPECIAL_OP_PREAMBLE_SIZE
11171 + S390_SPECIAL_OP_SIZE));
11172 irsb->jumpkind = Ijk_ClientReq;
11173
11174 dis_res->whatNext = Dis_StopHere;
11175}
11176
florianb4df7682011-07-05 02:09:01 +000011177static void
sewardj2019a972011-03-07 16:04:07 +000011178s390_irgen_guest_NRADDR(void)
11179{
11180 if (0)
11181 vex_printf("%%R3 = guest_NRADDR\n");
11182
floriane88b3c92011-07-05 02:48:39 +000011183 put_gpr_dw0(3, IRExpr_Get(S390X_GUEST_OFFSET(guest_NRADDR), Ity_I64));
sewardj2019a972011-03-07 16:04:07 +000011184}
11185
florianb4df7682011-07-05 02:09:01 +000011186static void
sewardj2019a972011-03-07 16:04:07 +000011187s390_irgen_call_noredir(void)
11188{
11189 /* Continue after special op */
11190 put_gpr_dw0(14, mkU64(guest_IA_curr_instr
11191 + S390_SPECIAL_OP_PREAMBLE_SIZE
11192 + S390_SPECIAL_OP_SIZE));
11193
11194 /* The address is in REG1, all parameters are in the right (guest) places */
11195 irsb->next = get_gpr_dw0(1);
11196 irsb->jumpkind = Ijk_NoRedir;
11197
11198 dis_res->whatNext = Dis_StopHere;
11199}
11200
11201/* Force proper alignment for the structures below. */
11202#pragma pack(1)
11203
11204
11205static s390_decode_t
11206s390_decode_2byte_and_irgen(UChar *bytes)
11207{
11208 typedef union {
11209 struct {
11210 unsigned int op : 16;
11211 } E;
11212 struct {
11213 unsigned int op : 8;
11214 unsigned int i : 8;
11215 } I;
11216 struct {
11217 unsigned int op : 8;
11218 unsigned int r1 : 4;
11219 unsigned int r2 : 4;
11220 } RR;
11221 } formats;
11222 union {
11223 formats fmt;
11224 UShort value;
11225 } ovl;
11226
11227 vassert(sizeof(formats) == 2);
11228
11229 ((char *)(&ovl.value))[0] = bytes[0];
11230 ((char *)(&ovl.value))[1] = bytes[1];
11231
11232 switch (ovl.value & 0xffff) {
florian30e89012011-08-08 18:22:58 +000011233 case 0x0000: /* invalid opcode */
11234 s390_format_RR_RR(s390_irgen_00, 0, 0); goto ok;
sewardj2019a972011-03-07 16:04:07 +000011235 case 0x0101: /* PR */ goto unimplemented;
11236 case 0x0102: /* UPT */ goto unimplemented;
11237 case 0x0104: /* PTFF */ goto unimplemented;
11238 case 0x0107: /* SCKPF */ goto unimplemented;
11239 case 0x010a: /* PFPO */ goto unimplemented;
11240 case 0x010b: /* TAM */ goto unimplemented;
11241 case 0x010c: /* SAM24 */ goto unimplemented;
11242 case 0x010d: /* SAM31 */ goto unimplemented;
11243 case 0x010e: /* SAM64 */ goto unimplemented;
11244 case 0x01ff: /* TRAP2 */ goto unimplemented;
11245 }
11246
11247 switch ((ovl.value & 0xff00) >> 8) {
11248 case 0x04: /* SPM */ goto unimplemented;
11249 case 0x05: /* BALR */ goto unimplemented;
11250 case 0x06: s390_format_RR_RR(s390_irgen_BCTR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
11251 goto ok;
11252 case 0x07: s390_format_RR(s390_irgen_BCR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
11253 goto ok;
11254 case 0x0a: s390_format_I(s390_irgen_SVC, ovl.fmt.I.i); goto ok;
11255 case 0x0b: /* BSM */ goto unimplemented;
11256 case 0x0c: /* BASSM */ goto unimplemented;
11257 case 0x0d: s390_format_RR_RR(s390_irgen_BASR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
11258 goto ok;
florianb0c9a132011-09-08 15:37:39 +000011259 case 0x0e: s390_format_RR(s390_irgen_MVCL, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
11260 goto ok;
11261 case 0x0f: s390_format_RR(s390_irgen_CLCL, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
11262 goto ok;
sewardj2019a972011-03-07 16:04:07 +000011263 case 0x10: s390_format_RR_RR(s390_irgen_LPR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
11264 goto ok;
11265 case 0x11: s390_format_RR_RR(s390_irgen_LNR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
11266 goto ok;
11267 case 0x12: s390_format_RR_RR(s390_irgen_LTR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
11268 goto ok;
11269 case 0x13: s390_format_RR_RR(s390_irgen_LCR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
11270 goto ok;
11271 case 0x14: s390_format_RR_RR(s390_irgen_NR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
11272 goto ok;
11273 case 0x15: s390_format_RR_RR(s390_irgen_CLR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
11274 goto ok;
11275 case 0x16: s390_format_RR_RR(s390_irgen_OR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
11276 goto ok;
11277 case 0x17: s390_format_RR_RR(s390_irgen_XR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
11278 goto ok;
11279 case 0x18: s390_format_RR_RR(s390_irgen_LR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
11280 goto ok;
11281 case 0x19: s390_format_RR_RR(s390_irgen_CR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
11282 goto ok;
11283 case 0x1a: s390_format_RR_RR(s390_irgen_AR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
11284 goto ok;
11285 case 0x1b: s390_format_RR_RR(s390_irgen_SR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
11286 goto ok;
11287 case 0x1c: s390_format_RR_RR(s390_irgen_MR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
11288 goto ok;
11289 case 0x1d: s390_format_RR_RR(s390_irgen_DR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
11290 goto ok;
11291 case 0x1e: s390_format_RR_RR(s390_irgen_ALR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
11292 goto ok;
11293 case 0x1f: s390_format_RR_RR(s390_irgen_SLR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
11294 goto ok;
11295 case 0x20: /* LPDR */ goto unimplemented;
11296 case 0x21: /* LNDR */ goto unimplemented;
11297 case 0x22: /* LTDR */ goto unimplemented;
11298 case 0x23: /* LCDR */ goto unimplemented;
11299 case 0x24: /* HDR */ goto unimplemented;
11300 case 0x25: /* LDXR */ goto unimplemented;
11301 case 0x26: /* MXR */ goto unimplemented;
11302 case 0x27: /* MXDR */ goto unimplemented;
11303 case 0x28: s390_format_RR_FF(s390_irgen_LDR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
11304 goto ok;
11305 case 0x29: /* CDR */ goto unimplemented;
11306 case 0x2a: /* ADR */ goto unimplemented;
11307 case 0x2b: /* SDR */ goto unimplemented;
11308 case 0x2c: /* MDR */ goto unimplemented;
11309 case 0x2d: /* DDR */ goto unimplemented;
11310 case 0x2e: /* AWR */ goto unimplemented;
11311 case 0x2f: /* SWR */ goto unimplemented;
11312 case 0x30: /* LPER */ goto unimplemented;
11313 case 0x31: /* LNER */ goto unimplemented;
11314 case 0x32: /* LTER */ goto unimplemented;
11315 case 0x33: /* LCER */ goto unimplemented;
11316 case 0x34: /* HER */ goto unimplemented;
11317 case 0x35: /* LEDR */ goto unimplemented;
11318 case 0x36: /* AXR */ goto unimplemented;
11319 case 0x37: /* SXR */ goto unimplemented;
11320 case 0x38: s390_format_RR_FF(s390_irgen_LER, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
11321 goto ok;
11322 case 0x39: /* CER */ goto unimplemented;
11323 case 0x3a: /* AER */ goto unimplemented;
11324 case 0x3b: /* SER */ goto unimplemented;
11325 case 0x3c: /* MDER */ goto unimplemented;
11326 case 0x3d: /* DER */ goto unimplemented;
11327 case 0x3e: /* AUR */ goto unimplemented;
11328 case 0x3f: /* SUR */ goto unimplemented;
11329 }
11330
11331 return S390_DECODE_UNKNOWN_INSN;
11332
11333ok:
11334 return S390_DECODE_OK;
11335
11336unimplemented:
11337 return S390_DECODE_UNIMPLEMENTED_INSN;
11338}
11339
11340static s390_decode_t
11341s390_decode_4byte_and_irgen(UChar *bytes)
11342{
11343 typedef union {
11344 struct {
11345 unsigned int op1 : 8;
11346 unsigned int r1 : 4;
11347 unsigned int op2 : 4;
11348 unsigned int i2 : 16;
11349 } RI;
11350 struct {
11351 unsigned int op : 16;
11352 unsigned int : 8;
11353 unsigned int r1 : 4;
11354 unsigned int r2 : 4;
11355 } RRE;
11356 struct {
11357 unsigned int op : 16;
11358 unsigned int r1 : 4;
11359 unsigned int : 4;
11360 unsigned int r3 : 4;
11361 unsigned int r2 : 4;
11362 } RRF;
11363 struct {
11364 unsigned int op : 16;
11365 unsigned int r3 : 4;
11366 unsigned int m4 : 4;
11367 unsigned int r1 : 4;
11368 unsigned int r2 : 4;
11369 } RRF2;
11370 struct {
11371 unsigned int op : 16;
11372 unsigned int r3 : 4;
11373 unsigned int : 4;
11374 unsigned int r1 : 4;
11375 unsigned int r2 : 4;
11376 } RRF3;
11377 struct {
11378 unsigned int op : 16;
11379 unsigned int r3 : 4;
11380 unsigned int : 4;
11381 unsigned int r1 : 4;
11382 unsigned int r2 : 4;
11383 } RRR;
11384 struct {
11385 unsigned int op : 16;
11386 unsigned int r3 : 4;
11387 unsigned int : 4;
11388 unsigned int r1 : 4;
11389 unsigned int r2 : 4;
11390 } RRF4;
11391 struct {
11392 unsigned int op : 8;
11393 unsigned int r1 : 4;
11394 unsigned int r3 : 4;
11395 unsigned int b2 : 4;
11396 unsigned int d2 : 12;
11397 } RS;
11398 struct {
11399 unsigned int op : 8;
11400 unsigned int r1 : 4;
11401 unsigned int r3 : 4;
11402 unsigned int i2 : 16;
11403 } RSI;
11404 struct {
11405 unsigned int op : 8;
11406 unsigned int r1 : 4;
11407 unsigned int x2 : 4;
11408 unsigned int b2 : 4;
11409 unsigned int d2 : 12;
11410 } RX;
11411 struct {
11412 unsigned int op : 16;
11413 unsigned int b2 : 4;
11414 unsigned int d2 : 12;
11415 } S;
11416 struct {
11417 unsigned int op : 8;
11418 unsigned int i2 : 8;
11419 unsigned int b1 : 4;
11420 unsigned int d1 : 12;
11421 } SI;
11422 } formats;
11423 union {
11424 formats fmt;
11425 UInt value;
11426 } ovl;
11427
11428 vassert(sizeof(formats) == 4);
11429
11430 ((char *)(&ovl.value))[0] = bytes[0];
11431 ((char *)(&ovl.value))[1] = bytes[1];
11432 ((char *)(&ovl.value))[2] = bytes[2];
11433 ((char *)(&ovl.value))[3] = bytes[3];
11434
11435 switch ((ovl.value & 0xff0f0000) >> 16) {
11436 case 0xa500: s390_format_RI_RU(s390_irgen_IIHH, ovl.fmt.RI.r1,
11437 ovl.fmt.RI.i2); goto ok;
11438 case 0xa501: s390_format_RI_RU(s390_irgen_IIHL, ovl.fmt.RI.r1,
11439 ovl.fmt.RI.i2); goto ok;
11440 case 0xa502: s390_format_RI_RU(s390_irgen_IILH, ovl.fmt.RI.r1,
11441 ovl.fmt.RI.i2); goto ok;
11442 case 0xa503: s390_format_RI_RU(s390_irgen_IILL, ovl.fmt.RI.r1,
11443 ovl.fmt.RI.i2); goto ok;
11444 case 0xa504: s390_format_RI_RU(s390_irgen_NIHH, ovl.fmt.RI.r1,
11445 ovl.fmt.RI.i2); goto ok;
11446 case 0xa505: s390_format_RI_RU(s390_irgen_NIHL, ovl.fmt.RI.r1,
11447 ovl.fmt.RI.i2); goto ok;
11448 case 0xa506: s390_format_RI_RU(s390_irgen_NILH, ovl.fmt.RI.r1,
11449 ovl.fmt.RI.i2); goto ok;
11450 case 0xa507: s390_format_RI_RU(s390_irgen_NILL, ovl.fmt.RI.r1,
11451 ovl.fmt.RI.i2); goto ok;
11452 case 0xa508: s390_format_RI_RU(s390_irgen_OIHH, ovl.fmt.RI.r1,
11453 ovl.fmt.RI.i2); goto ok;
11454 case 0xa509: s390_format_RI_RU(s390_irgen_OIHL, ovl.fmt.RI.r1,
11455 ovl.fmt.RI.i2); goto ok;
11456 case 0xa50a: s390_format_RI_RU(s390_irgen_OILH, ovl.fmt.RI.r1,
11457 ovl.fmt.RI.i2); goto ok;
11458 case 0xa50b: s390_format_RI_RU(s390_irgen_OILL, ovl.fmt.RI.r1,
11459 ovl.fmt.RI.i2); goto ok;
11460 case 0xa50c: s390_format_RI_RU(s390_irgen_LLIHH, ovl.fmt.RI.r1,
11461 ovl.fmt.RI.i2); goto ok;
11462 case 0xa50d: s390_format_RI_RU(s390_irgen_LLIHL, ovl.fmt.RI.r1,
11463 ovl.fmt.RI.i2); goto ok;
11464 case 0xa50e: s390_format_RI_RU(s390_irgen_LLILH, ovl.fmt.RI.r1,
11465 ovl.fmt.RI.i2); goto ok;
11466 case 0xa50f: s390_format_RI_RU(s390_irgen_LLILL, ovl.fmt.RI.r1,
11467 ovl.fmt.RI.i2); goto ok;
11468 case 0xa700: s390_format_RI_RU(s390_irgen_TMLH, ovl.fmt.RI.r1,
11469 ovl.fmt.RI.i2); goto ok;
11470 case 0xa701: s390_format_RI_RU(s390_irgen_TMLL, ovl.fmt.RI.r1,
11471 ovl.fmt.RI.i2); goto ok;
11472 case 0xa702: s390_format_RI_RU(s390_irgen_TMHH, ovl.fmt.RI.r1,
11473 ovl.fmt.RI.i2); goto ok;
11474 case 0xa703: s390_format_RI_RU(s390_irgen_TMHL, ovl.fmt.RI.r1,
11475 ovl.fmt.RI.i2); goto ok;
11476 case 0xa704: s390_format_RI(s390_irgen_BRC, ovl.fmt.RI.r1, ovl.fmt.RI.i2);
11477 goto ok;
11478 case 0xa705: s390_format_RI_RP(s390_irgen_BRAS, ovl.fmt.RI.r1,
11479 ovl.fmt.RI.i2); goto ok;
11480 case 0xa706: s390_format_RI_RP(s390_irgen_BRCT, ovl.fmt.RI.r1,
11481 ovl.fmt.RI.i2); goto ok;
11482 case 0xa707: s390_format_RI_RP(s390_irgen_BRCTG, ovl.fmt.RI.r1,
11483 ovl.fmt.RI.i2); goto ok;
11484 case 0xa708: s390_format_RI_RI(s390_irgen_LHI, ovl.fmt.RI.r1, ovl.fmt.RI.i2);
11485 goto ok;
11486 case 0xa709: s390_format_RI_RI(s390_irgen_LGHI, ovl.fmt.RI.r1,
11487 ovl.fmt.RI.i2); goto ok;
11488 case 0xa70a: s390_format_RI_RI(s390_irgen_AHI, ovl.fmt.RI.r1, ovl.fmt.RI.i2);
11489 goto ok;
11490 case 0xa70b: s390_format_RI_RI(s390_irgen_AGHI, ovl.fmt.RI.r1,
11491 ovl.fmt.RI.i2); goto ok;
11492 case 0xa70c: s390_format_RI_RI(s390_irgen_MHI, ovl.fmt.RI.r1, ovl.fmt.RI.i2);
11493 goto ok;
11494 case 0xa70d: s390_format_RI_RI(s390_irgen_MGHI, ovl.fmt.RI.r1,
11495 ovl.fmt.RI.i2); goto ok;
11496 case 0xa70e: s390_format_RI_RI(s390_irgen_CHI, ovl.fmt.RI.r1, ovl.fmt.RI.i2);
11497 goto ok;
11498 case 0xa70f: s390_format_RI_RI(s390_irgen_CGHI, ovl.fmt.RI.r1,
11499 ovl.fmt.RI.i2); goto ok;
11500 }
11501
11502 switch ((ovl.value & 0xffff0000) >> 16) {
11503 case 0x8000: /* SSM */ goto unimplemented;
11504 case 0x8200: /* LPSW */ goto unimplemented;
florian7700fc92012-01-16 17:25:55 +000011505 case 0x9300: /* TS */ goto unimplemented;
sewardj2019a972011-03-07 16:04:07 +000011506 case 0xb202: /* STIDP */ goto unimplemented;
11507 case 0xb204: /* SCK */ goto unimplemented;
florian7700fc92012-01-16 17:25:55 +000011508 case 0xb205: s390_format_S_RD(s390_irgen_STCK, ovl.fmt.S.b2, ovl.fmt.S.d2);
11509 goto ok;
sewardj2019a972011-03-07 16:04:07 +000011510 case 0xb206: /* SCKC */ goto unimplemented;
11511 case 0xb207: /* STCKC */ goto unimplemented;
11512 case 0xb208: /* SPT */ goto unimplemented;
11513 case 0xb209: /* STPT */ goto unimplemented;
11514 case 0xb20a: /* SPKA */ goto unimplemented;
11515 case 0xb20b: /* IPK */ goto unimplemented;
11516 case 0xb20d: /* PTLB */ goto unimplemented;
11517 case 0xb210: /* SPX */ goto unimplemented;
11518 case 0xb211: /* STPX */ goto unimplemented;
11519 case 0xb212: /* STAP */ goto unimplemented;
11520 case 0xb214: /* SIE */ goto unimplemented;
11521 case 0xb218: /* PC */ goto unimplemented;
11522 case 0xb219: /* SAC */ goto unimplemented;
11523 case 0xb21a: /* CFC */ goto unimplemented;
11524 case 0xb221: /* IPTE */ goto unimplemented;
11525 case 0xb222: s390_format_RRE_R0(s390_irgen_IPM, ovl.fmt.RRE.r1); goto ok;
11526 case 0xb223: /* IVSK */ goto unimplemented;
11527 case 0xb224: /* IAC */ goto unimplemented;
11528 case 0xb225: /* SSAR */ goto unimplemented;
11529 case 0xb226: /* EPAR */ goto unimplemented;
11530 case 0xb227: /* ESAR */ goto unimplemented;
11531 case 0xb228: /* PT */ goto unimplemented;
11532 case 0xb229: /* ISKE */ goto unimplemented;
11533 case 0xb22a: /* RRBE */ goto unimplemented;
11534 case 0xb22b: /* SSKE */ goto unimplemented;
11535 case 0xb22c: /* TB */ goto unimplemented;
11536 case 0xb22d: /* DXR */ goto unimplemented;
11537 case 0xb22e: /* PGIN */ goto unimplemented;
11538 case 0xb22f: /* PGOUT */ goto unimplemented;
11539 case 0xb230: /* CSCH */ goto unimplemented;
11540 case 0xb231: /* HSCH */ goto unimplemented;
11541 case 0xb232: /* MSCH */ goto unimplemented;
11542 case 0xb233: /* SSCH */ goto unimplemented;
11543 case 0xb234: /* STSCH */ goto unimplemented;
11544 case 0xb235: /* TSCH */ goto unimplemented;
11545 case 0xb236: /* TPI */ goto unimplemented;
11546 case 0xb237: /* SAL */ goto unimplemented;
11547 case 0xb238: /* RSCH */ goto unimplemented;
11548 case 0xb239: /* STCRW */ goto unimplemented;
11549 case 0xb23a: /* STCPS */ goto unimplemented;
11550 case 0xb23b: /* RCHP */ goto unimplemented;
11551 case 0xb23c: /* SCHM */ goto unimplemented;
11552 case 0xb240: /* BAKR */ goto unimplemented;
floriana4384a32011-08-11 16:58:45 +000011553 case 0xb241: s390_format_RRE(s390_irgen_CKSM, ovl.fmt.RRE.r1,
11554 ovl.fmt.RRE.r2); goto ok;
sewardj2019a972011-03-07 16:04:07 +000011555 case 0xb244: /* SQDR */ goto unimplemented;
11556 case 0xb245: /* SQER */ goto unimplemented;
11557 case 0xb246: /* STURA */ goto unimplemented;
11558 case 0xb247: /* MSTA */ goto unimplemented;
11559 case 0xb248: /* PALB */ goto unimplemented;
11560 case 0xb249: /* EREG */ goto unimplemented;
11561 case 0xb24a: /* ESTA */ goto unimplemented;
11562 case 0xb24b: /* LURA */ goto unimplemented;
11563 case 0xb24c: /* TAR */ goto unimplemented;
11564 case 0xb24d: s390_format_RRE(s390_irgen_CPYA, ovl.fmt.RRE.r1,
11565 ovl.fmt.RRE.r2); goto ok;
11566 case 0xb24e: s390_format_RRE(s390_irgen_SAR, ovl.fmt.RRE.r1, ovl.fmt.RRE.r2);
11567 goto ok;
11568 case 0xb24f: s390_format_RRE(s390_irgen_EAR, ovl.fmt.RRE.r1, ovl.fmt.RRE.r2);
11569 goto ok;
11570 case 0xb250: /* CSP */ goto unimplemented;
11571 case 0xb252: s390_format_RRE_RR(s390_irgen_MSR, ovl.fmt.RRE.r1,
11572 ovl.fmt.RRE.r2); goto ok;
11573 case 0xb254: /* MVPG */ goto unimplemented;
11574 case 0xb255: s390_format_RRE_RR(s390_irgen_MVST, ovl.fmt.RRE.r1,
11575 ovl.fmt.RRE.r2); goto ok;
11576 case 0xb257: /* CUSE */ goto unimplemented;
11577 case 0xb258: /* BSG */ goto unimplemented;
11578 case 0xb25a: /* BSA */ goto unimplemented;
11579 case 0xb25d: s390_format_RRE_RR(s390_irgen_CLST, ovl.fmt.RRE.r1,
11580 ovl.fmt.RRE.r2); goto ok;
11581 case 0xb25e: s390_format_RRE_RR(s390_irgen_SRST, ovl.fmt.RRE.r1,
11582 ovl.fmt.RRE.r2); goto ok;
11583 case 0xb263: /* CMPSC */ goto unimplemented;
11584 case 0xb274: /* SIGA */ goto unimplemented;
11585 case 0xb276: /* XSCH */ goto unimplemented;
11586 case 0xb277: /* RP */ goto unimplemented;
sewardj1e5fea62011-05-17 16:18:36 +000011587 case 0xb278: s390_format_S_RD(s390_irgen_STCKE, ovl.fmt.S.b2, ovl.fmt.S.d2);goto ok;
sewardj2019a972011-03-07 16:04:07 +000011588 case 0xb279: /* SACF */ goto unimplemented;
sewardj1e5fea62011-05-17 16:18:36 +000011589 case 0xb27c: s390_format_S_RD(s390_irgen_STCKF, ovl.fmt.S.b2, ovl.fmt.S.d2);goto ok;
sewardj2019a972011-03-07 16:04:07 +000011590 case 0xb27d: /* STSI */ goto unimplemented;
11591 case 0xb299: s390_format_S_RD(s390_irgen_SRNM, ovl.fmt.S.b2, ovl.fmt.S.d2);
11592 goto ok;
11593 case 0xb29c: s390_format_S_RD(s390_irgen_STFPC, ovl.fmt.S.b2, ovl.fmt.S.d2);
11594 goto ok;
11595 case 0xb29d: s390_format_S_RD(s390_irgen_LFPC, ovl.fmt.S.b2, ovl.fmt.S.d2);
11596 goto ok;
florian730448f2012-02-04 17:07:07 +000011597 case 0xb2a5: s390_format_RRE_FF(s390_irgen_TRE, ovl.fmt.RRE.r1, ovl.fmt.RRE.r2); goto ok;
sewardj2019a972011-03-07 16:04:07 +000011598 case 0xb2a6: /* CU21 */ goto unimplemented;
11599 case 0xb2a7: /* CU12 */ goto unimplemented;
florian933065d2011-07-11 01:48:02 +000011600 case 0xb2b0: s390_format_S_RD(s390_irgen_STFLE, ovl.fmt.S.b2, ovl.fmt.S.d2);
11601 goto ok;
sewardj2019a972011-03-07 16:04:07 +000011602 case 0xb2b1: /* STFL */ goto unimplemented;
11603 case 0xb2b2: /* LPSWE */ goto unimplemented;
11604 case 0xb2b8: /* SRNMB */ goto unimplemented;
11605 case 0xb2b9: /* SRNMT */ goto unimplemented;
11606 case 0xb2bd: /* LFAS */ goto unimplemented;
11607 case 0xb2ff: /* TRAP4 */ goto unimplemented;
11608 case 0xb300: s390_format_RRE_FF(s390_irgen_LPEBR, ovl.fmt.RRE.r1,
11609 ovl.fmt.RRE.r2); goto ok;
11610 case 0xb301: s390_format_RRE_FF(s390_irgen_LNEBR, ovl.fmt.RRE.r1,
11611 ovl.fmt.RRE.r2); goto ok;
11612 case 0xb302: s390_format_RRE_FF(s390_irgen_LTEBR, ovl.fmt.RRE.r1,
11613 ovl.fmt.RRE.r2); goto ok;
11614 case 0xb303: s390_format_RRE_FF(s390_irgen_LCEBR, ovl.fmt.RRE.r1,
11615 ovl.fmt.RRE.r2); goto ok;
11616 case 0xb304: s390_format_RRE_FF(s390_irgen_LDEBR, ovl.fmt.RRE.r1,
11617 ovl.fmt.RRE.r2); goto ok;
11618 case 0xb305: s390_format_RRE_FF(s390_irgen_LXDBR, ovl.fmt.RRE.r1,
11619 ovl.fmt.RRE.r2); goto ok;
11620 case 0xb306: s390_format_RRE_FF(s390_irgen_LXEBR, ovl.fmt.RRE.r1,
11621 ovl.fmt.RRE.r2); goto ok;
11622 case 0xb307: /* MXDBR */ goto unimplemented;
11623 case 0xb308: /* KEBR */ goto unimplemented;
11624 case 0xb309: s390_format_RRE_FF(s390_irgen_CEBR, ovl.fmt.RRE.r1,
11625 ovl.fmt.RRE.r2); goto ok;
11626 case 0xb30a: s390_format_RRE_FF(s390_irgen_AEBR, ovl.fmt.RRE.r1,
11627 ovl.fmt.RRE.r2); goto ok;
11628 case 0xb30b: s390_format_RRE_FF(s390_irgen_SEBR, ovl.fmt.RRE.r1,
11629 ovl.fmt.RRE.r2); goto ok;
11630 case 0xb30c: /* MDEBR */ goto unimplemented;
11631 case 0xb30d: s390_format_RRE_FF(s390_irgen_DEBR, ovl.fmt.RRE.r1,
11632 ovl.fmt.RRE.r2); goto ok;
11633 case 0xb30e: s390_format_RRF_F0FF(s390_irgen_MAEBR, ovl.fmt.RRF.r1,
11634 ovl.fmt.RRF.r3, ovl.fmt.RRF.r2); goto ok;
11635 case 0xb30f: s390_format_RRF_F0FF(s390_irgen_MSEBR, ovl.fmt.RRF.r1,
11636 ovl.fmt.RRF.r3, ovl.fmt.RRF.r2); goto ok;
11637 case 0xb310: s390_format_RRE_FF(s390_irgen_LPDBR, ovl.fmt.RRE.r1,
11638 ovl.fmt.RRE.r2); goto ok;
11639 case 0xb311: s390_format_RRE_FF(s390_irgen_LNDBR, ovl.fmt.RRE.r1,
11640 ovl.fmt.RRE.r2); goto ok;
11641 case 0xb312: s390_format_RRE_FF(s390_irgen_LTDBR, ovl.fmt.RRE.r1,
11642 ovl.fmt.RRE.r2); goto ok;
11643 case 0xb313: s390_format_RRE_FF(s390_irgen_LCDBR, ovl.fmt.RRE.r1,
11644 ovl.fmt.RRE.r2); goto ok;
11645 case 0xb314: s390_format_RRE_FF(s390_irgen_SQEBR, ovl.fmt.RRE.r1,
11646 ovl.fmt.RRE.r2); goto ok;
11647 case 0xb315: s390_format_RRE_FF(s390_irgen_SQDBR, ovl.fmt.RRE.r1,
11648 ovl.fmt.RRE.r2); goto ok;
11649 case 0xb316: s390_format_RRE_FF(s390_irgen_SQXBR, ovl.fmt.RRE.r1,
11650 ovl.fmt.RRE.r2); goto ok;
11651 case 0xb317: s390_format_RRE_FF(s390_irgen_MEEBR, ovl.fmt.RRE.r1,
11652 ovl.fmt.RRE.r2); goto ok;
11653 case 0xb318: /* KDBR */ goto unimplemented;
11654 case 0xb319: s390_format_RRE_FF(s390_irgen_CDBR, ovl.fmt.RRE.r1,
11655 ovl.fmt.RRE.r2); goto ok;
11656 case 0xb31a: s390_format_RRE_FF(s390_irgen_ADBR, ovl.fmt.RRE.r1,
11657 ovl.fmt.RRE.r2); goto ok;
11658 case 0xb31b: s390_format_RRE_FF(s390_irgen_SDBR, ovl.fmt.RRE.r1,
11659 ovl.fmt.RRE.r2); goto ok;
11660 case 0xb31c: s390_format_RRE_FF(s390_irgen_MDBR, ovl.fmt.RRE.r1,
11661 ovl.fmt.RRE.r2); goto ok;
11662 case 0xb31d: s390_format_RRE_FF(s390_irgen_DDBR, ovl.fmt.RRE.r1,
11663 ovl.fmt.RRE.r2); goto ok;
11664 case 0xb31e: s390_format_RRF_F0FF(s390_irgen_MADBR, ovl.fmt.RRF.r1,
11665 ovl.fmt.RRF.r3, ovl.fmt.RRF.r2); goto ok;
11666 case 0xb31f: s390_format_RRF_F0FF(s390_irgen_MSDBR, ovl.fmt.RRF.r1,
11667 ovl.fmt.RRF.r3, ovl.fmt.RRF.r2); goto ok;
11668 case 0xb324: /* LDER */ goto unimplemented;
11669 case 0xb325: /* LXDR */ goto unimplemented;
11670 case 0xb326: /* LXER */ goto unimplemented;
11671 case 0xb32e: /* MAER */ goto unimplemented;
11672 case 0xb32f: /* MSER */ goto unimplemented;
11673 case 0xb336: /* SQXR */ goto unimplemented;
11674 case 0xb337: /* MEER */ goto unimplemented;
11675 case 0xb338: /* MAYLR */ goto unimplemented;
11676 case 0xb339: /* MYLR */ goto unimplemented;
11677 case 0xb33a: /* MAYR */ goto unimplemented;
11678 case 0xb33b: /* MYR */ goto unimplemented;
11679 case 0xb33c: /* MAYHR */ goto unimplemented;
11680 case 0xb33d: /* MYHR */ goto unimplemented;
11681 case 0xb33e: /* MADR */ goto unimplemented;
11682 case 0xb33f: /* MSDR */ goto unimplemented;
11683 case 0xb340: s390_format_RRE_FF(s390_irgen_LPXBR, ovl.fmt.RRE.r1,
11684 ovl.fmt.RRE.r2); goto ok;
11685 case 0xb341: s390_format_RRE_FF(s390_irgen_LNXBR, ovl.fmt.RRE.r1,
11686 ovl.fmt.RRE.r2); goto ok;
11687 case 0xb342: s390_format_RRE_FF(s390_irgen_LTXBR, ovl.fmt.RRE.r1,
11688 ovl.fmt.RRE.r2); goto ok;
11689 case 0xb343: s390_format_RRE_FF(s390_irgen_LCXBR, ovl.fmt.RRE.r1,
11690 ovl.fmt.RRE.r2); goto ok;
11691 case 0xb344: s390_format_RRE_FF(s390_irgen_LEDBR, ovl.fmt.RRE.r1,
11692 ovl.fmt.RRE.r2); goto ok;
11693 case 0xb345: s390_format_RRE_FF(s390_irgen_LDXBR, ovl.fmt.RRE.r1,
11694 ovl.fmt.RRE.r2); goto ok;
11695 case 0xb346: s390_format_RRE_FF(s390_irgen_LEXBR, ovl.fmt.RRE.r1,
11696 ovl.fmt.RRE.r2); goto ok;
11697 case 0xb347: /* FIXBR */ goto unimplemented;
11698 case 0xb348: /* KXBR */ goto unimplemented;
11699 case 0xb349: s390_format_RRE_FF(s390_irgen_CXBR, ovl.fmt.RRE.r1,
11700 ovl.fmt.RRE.r2); goto ok;
11701 case 0xb34a: s390_format_RRE_FF(s390_irgen_AXBR, ovl.fmt.RRE.r1,
11702 ovl.fmt.RRE.r2); goto ok;
11703 case 0xb34b: s390_format_RRE_FF(s390_irgen_SXBR, ovl.fmt.RRE.r1,
11704 ovl.fmt.RRE.r2); goto ok;
11705 case 0xb34c: s390_format_RRE_FF(s390_irgen_MXBR, ovl.fmt.RRE.r1,
11706 ovl.fmt.RRE.r2); goto ok;
11707 case 0xb34d: s390_format_RRE_FF(s390_irgen_DXBR, ovl.fmt.RRE.r1,
11708 ovl.fmt.RRE.r2); goto ok;
11709 case 0xb350: /* TBEDR */ goto unimplemented;
11710 case 0xb351: /* TBDR */ goto unimplemented;
11711 case 0xb353: /* DIEBR */ goto unimplemented;
11712 case 0xb357: /* FIEBR */ goto unimplemented;
11713 case 0xb358: /* THDER */ goto unimplemented;
11714 case 0xb359: /* THDR */ goto unimplemented;
11715 case 0xb35b: /* DIDBR */ goto unimplemented;
11716 case 0xb35f: /* FIDBR */ goto unimplemented;
11717 case 0xb360: /* LPXR */ goto unimplemented;
11718 case 0xb361: /* LNXR */ goto unimplemented;
11719 case 0xb362: /* LTXR */ goto unimplemented;
11720 case 0xb363: /* LCXR */ goto unimplemented;
11721 case 0xb365: s390_format_RRE_FF(s390_irgen_LXR, ovl.fmt.RRE.r1,
11722 ovl.fmt.RRE.r2); goto ok;
11723 case 0xb366: /* LEXR */ goto unimplemented;
11724 case 0xb367: /* FIXR */ goto unimplemented;
11725 case 0xb369: /* CXR */ goto unimplemented;
11726 case 0xb370: s390_format_RRE_FF(s390_irgen_LPDFR, ovl.fmt.RRE.r1,
11727 ovl.fmt.RRE.r2); goto ok;
11728 case 0xb371: s390_format_RRE_FF(s390_irgen_LNDFR, ovl.fmt.RRE.r1,
11729 ovl.fmt.RRE.r2); goto ok;
11730 case 0xb372: s390_format_RRF_F0FF2(s390_irgen_CPSDR, ovl.fmt.RRF3.r3,
11731 ovl.fmt.RRF3.r1, ovl.fmt.RRF3.r2);
11732 goto ok;
11733 case 0xb373: s390_format_RRE_FF(s390_irgen_LCDFR, ovl.fmt.RRE.r1,
11734 ovl.fmt.RRE.r2); goto ok;
11735 case 0xb374: s390_format_RRE_F0(s390_irgen_LZER, ovl.fmt.RRE.r1); goto ok;
11736 case 0xb375: s390_format_RRE_F0(s390_irgen_LZDR, ovl.fmt.RRE.r1); goto ok;
11737 case 0xb376: s390_format_RRE_F0(s390_irgen_LZXR, ovl.fmt.RRE.r1); goto ok;
11738 case 0xb377: /* FIER */ goto unimplemented;
11739 case 0xb37f: /* FIDR */ goto unimplemented;
11740 case 0xb384: s390_format_RRE_R0(s390_irgen_SFPC, ovl.fmt.RRE.r1); goto ok;
11741 case 0xb385: /* SFASR */ goto unimplemented;
11742 case 0xb38c: s390_format_RRE_R0(s390_irgen_EFPC, ovl.fmt.RRE.r1); goto ok;
11743 case 0xb390: /* CELFBR */ goto unimplemented;
11744 case 0xb391: /* CDLFBR */ goto unimplemented;
11745 case 0xb392: /* CXLFBR */ goto unimplemented;
11746 case 0xb394: s390_format_RRE_FR(s390_irgen_CEFBR, ovl.fmt.RRE.r1,
11747 ovl.fmt.RRE.r2); goto ok;
11748 case 0xb395: s390_format_RRE_FR(s390_irgen_CDFBR, ovl.fmt.RRE.r1,
11749 ovl.fmt.RRE.r2); goto ok;
11750 case 0xb396: s390_format_RRE_FR(s390_irgen_CXFBR, ovl.fmt.RRE.r1,
11751 ovl.fmt.RRE.r2); goto ok;
11752 case 0xb398: s390_format_RRF_U0RF(s390_irgen_CFEBR, ovl.fmt.RRF3.r3,
11753 ovl.fmt.RRF3.r1, ovl.fmt.RRF3.r2);
11754 goto ok;
11755 case 0xb399: s390_format_RRF_U0RF(s390_irgen_CFDBR, ovl.fmt.RRF3.r3,
11756 ovl.fmt.RRF3.r1, ovl.fmt.RRF3.r2);
11757 goto ok;
11758 case 0xb39a: s390_format_RRF_U0RF(s390_irgen_CFXBR, ovl.fmt.RRF3.r3,
11759 ovl.fmt.RRF3.r1, ovl.fmt.RRF3.r2);
11760 goto ok;
11761 case 0xb3a0: /* CELGBR */ goto unimplemented;
11762 case 0xb3a1: /* CDLGBR */ goto unimplemented;
11763 case 0xb3a2: /* CXLGBR */ goto unimplemented;
11764 case 0xb3a4: s390_format_RRE_FR(s390_irgen_CEGBR, ovl.fmt.RRE.r1,
11765 ovl.fmt.RRE.r2); goto ok;
11766 case 0xb3a5: s390_format_RRE_FR(s390_irgen_CDGBR, ovl.fmt.RRE.r1,
11767 ovl.fmt.RRE.r2); goto ok;
11768 case 0xb3a6: s390_format_RRE_FR(s390_irgen_CXGBR, ovl.fmt.RRE.r1,
11769 ovl.fmt.RRE.r2); goto ok;
11770 case 0xb3a8: s390_format_RRF_U0RF(s390_irgen_CGEBR, ovl.fmt.RRF3.r3,
11771 ovl.fmt.RRF3.r1, ovl.fmt.RRF3.r2);
11772 goto ok;
11773 case 0xb3a9: s390_format_RRF_U0RF(s390_irgen_CGDBR, ovl.fmt.RRF3.r3,
11774 ovl.fmt.RRF3.r1, ovl.fmt.RRF3.r2);
11775 goto ok;
11776 case 0xb3aa: s390_format_RRF_U0RF(s390_irgen_CGXBR, ovl.fmt.RRF3.r3,
11777 ovl.fmt.RRF3.r1, ovl.fmt.RRF3.r2);
11778 goto ok;
11779 case 0xb3b4: /* CEFR */ goto unimplemented;
11780 case 0xb3b5: /* CDFR */ goto unimplemented;
11781 case 0xb3b6: /* CXFR */ goto unimplemented;
11782 case 0xb3b8: /* CFER */ goto unimplemented;
11783 case 0xb3b9: /* CFDR */ goto unimplemented;
11784 case 0xb3ba: /* CFXR */ goto unimplemented;
11785 case 0xb3c1: s390_format_RRE_FR(s390_irgen_LDGR, ovl.fmt.RRE.r1,
11786 ovl.fmt.RRE.r2); goto ok;
11787 case 0xb3c4: /* CEGR */ goto unimplemented;
11788 case 0xb3c5: /* CDGR */ goto unimplemented;
11789 case 0xb3c6: /* CXGR */ goto unimplemented;
11790 case 0xb3c8: /* CGER */ goto unimplemented;
11791 case 0xb3c9: /* CGDR */ goto unimplemented;
11792 case 0xb3ca: /* CGXR */ goto unimplemented;
11793 case 0xb3cd: s390_format_RRE_RF(s390_irgen_LGDR, ovl.fmt.RRE.r1,
11794 ovl.fmt.RRE.r2); goto ok;
11795 case 0xb3d0: /* MDTR */ goto unimplemented;
11796 case 0xb3d1: /* DDTR */ goto unimplemented;
11797 case 0xb3d2: /* ADTR */ goto unimplemented;
11798 case 0xb3d3: /* SDTR */ goto unimplemented;
11799 case 0xb3d4: /* LDETR */ goto unimplemented;
11800 case 0xb3d5: /* LEDTR */ goto unimplemented;
11801 case 0xb3d6: /* LTDTR */ goto unimplemented;
11802 case 0xb3d7: /* FIDTR */ goto unimplemented;
11803 case 0xb3d8: /* MXTR */ goto unimplemented;
11804 case 0xb3d9: /* DXTR */ goto unimplemented;
11805 case 0xb3da: /* AXTR */ goto unimplemented;
11806 case 0xb3db: /* SXTR */ goto unimplemented;
11807 case 0xb3dc: /* LXDTR */ goto unimplemented;
11808 case 0xb3dd: /* LDXTR */ goto unimplemented;
11809 case 0xb3de: /* LTXTR */ goto unimplemented;
11810 case 0xb3df: /* FIXTR */ goto unimplemented;
11811 case 0xb3e0: /* KDTR */ goto unimplemented;
11812 case 0xb3e1: /* CGDTR */ goto unimplemented;
11813 case 0xb3e2: /* CUDTR */ goto unimplemented;
11814 case 0xb3e3: /* CSDTR */ goto unimplemented;
11815 case 0xb3e4: /* CDTR */ goto unimplemented;
11816 case 0xb3e5: /* EEDTR */ goto unimplemented;
11817 case 0xb3e7: /* ESDTR */ goto unimplemented;
11818 case 0xb3e8: /* KXTR */ goto unimplemented;
11819 case 0xb3e9: /* CGXTR */ goto unimplemented;
11820 case 0xb3ea: /* CUXTR */ goto unimplemented;
11821 case 0xb3eb: /* CSXTR */ goto unimplemented;
11822 case 0xb3ec: /* CXTR */ goto unimplemented;
11823 case 0xb3ed: /* EEXTR */ goto unimplemented;
11824 case 0xb3ef: /* ESXTR */ goto unimplemented;
11825 case 0xb3f1: /* CDGTR */ goto unimplemented;
11826 case 0xb3f2: /* CDUTR */ goto unimplemented;
11827 case 0xb3f3: /* CDSTR */ goto unimplemented;
11828 case 0xb3f4: /* CEDTR */ goto unimplemented;
11829 case 0xb3f5: /* QADTR */ goto unimplemented;
11830 case 0xb3f6: /* IEDTR */ goto unimplemented;
11831 case 0xb3f7: /* RRDTR */ goto unimplemented;
11832 case 0xb3f9: /* CXGTR */ goto unimplemented;
11833 case 0xb3fa: /* CXUTR */ goto unimplemented;
11834 case 0xb3fb: /* CXSTR */ goto unimplemented;
11835 case 0xb3fc: /* CEXTR */ goto unimplemented;
11836 case 0xb3fd: /* QAXTR */ goto unimplemented;
11837 case 0xb3fe: /* IEXTR */ goto unimplemented;
11838 case 0xb3ff: /* RRXTR */ goto unimplemented;
11839 case 0xb900: s390_format_RRE_RR(s390_irgen_LPGR, ovl.fmt.RRE.r1,
11840 ovl.fmt.RRE.r2); goto ok;
11841 case 0xb901: s390_format_RRE_RR(s390_irgen_LNGR, ovl.fmt.RRE.r1,
11842 ovl.fmt.RRE.r2); goto ok;
11843 case 0xb902: s390_format_RRE_RR(s390_irgen_LTGR, ovl.fmt.RRE.r1,
11844 ovl.fmt.RRE.r2); goto ok;
11845 case 0xb903: s390_format_RRE_RR(s390_irgen_LCGR, ovl.fmt.RRE.r1,
11846 ovl.fmt.RRE.r2); goto ok;
11847 case 0xb904: s390_format_RRE_RR(s390_irgen_LGR, ovl.fmt.RRE.r1,
11848 ovl.fmt.RRE.r2); goto ok;
11849 case 0xb905: /* LURAG */ goto unimplemented;
11850 case 0xb906: s390_format_RRE_RR(s390_irgen_LGBR, ovl.fmt.RRE.r1,
11851 ovl.fmt.RRE.r2); goto ok;
11852 case 0xb907: s390_format_RRE_RR(s390_irgen_LGHR, ovl.fmt.RRE.r1,
11853 ovl.fmt.RRE.r2); goto ok;
11854 case 0xb908: s390_format_RRE_RR(s390_irgen_AGR, ovl.fmt.RRE.r1,
11855 ovl.fmt.RRE.r2); goto ok;
11856 case 0xb909: s390_format_RRE_RR(s390_irgen_SGR, ovl.fmt.RRE.r1,
11857 ovl.fmt.RRE.r2); goto ok;
11858 case 0xb90a: s390_format_RRE_RR(s390_irgen_ALGR, ovl.fmt.RRE.r1,
11859 ovl.fmt.RRE.r2); goto ok;
11860 case 0xb90b: s390_format_RRE_RR(s390_irgen_SLGR, ovl.fmt.RRE.r1,
11861 ovl.fmt.RRE.r2); goto ok;
11862 case 0xb90c: s390_format_RRE_RR(s390_irgen_MSGR, ovl.fmt.RRE.r1,
11863 ovl.fmt.RRE.r2); goto ok;
11864 case 0xb90d: s390_format_RRE_RR(s390_irgen_DSGR, ovl.fmt.RRE.r1,
11865 ovl.fmt.RRE.r2); goto ok;
11866 case 0xb90e: /* EREGG */ goto unimplemented;
11867 case 0xb90f: s390_format_RRE_RR(s390_irgen_LRVGR, ovl.fmt.RRE.r1,
11868 ovl.fmt.RRE.r2); goto ok;
11869 case 0xb910: s390_format_RRE_RR(s390_irgen_LPGFR, ovl.fmt.RRE.r1,
11870 ovl.fmt.RRE.r2); goto ok;
11871 case 0xb911: s390_format_RRE_RR(s390_irgen_LNGFR, ovl.fmt.RRE.r1,
11872 ovl.fmt.RRE.r2); goto ok;
11873 case 0xb912: s390_format_RRE_RR(s390_irgen_LTGFR, ovl.fmt.RRE.r1,
11874 ovl.fmt.RRE.r2); goto ok;
11875 case 0xb913: s390_format_RRE_RR(s390_irgen_LCGFR, ovl.fmt.RRE.r1,
11876 ovl.fmt.RRE.r2); goto ok;
11877 case 0xb914: s390_format_RRE_RR(s390_irgen_LGFR, ovl.fmt.RRE.r1,
11878 ovl.fmt.RRE.r2); goto ok;
11879 case 0xb916: s390_format_RRE_RR(s390_irgen_LLGFR, ovl.fmt.RRE.r1,
11880 ovl.fmt.RRE.r2); goto ok;
11881 case 0xb917: s390_format_RRE_RR(s390_irgen_LLGTR, ovl.fmt.RRE.r1,
11882 ovl.fmt.RRE.r2); goto ok;
11883 case 0xb918: s390_format_RRE_RR(s390_irgen_AGFR, ovl.fmt.RRE.r1,
11884 ovl.fmt.RRE.r2); goto ok;
11885 case 0xb919: s390_format_RRE_RR(s390_irgen_SGFR, ovl.fmt.RRE.r1,
11886 ovl.fmt.RRE.r2); goto ok;
11887 case 0xb91a: s390_format_RRE_RR(s390_irgen_ALGFR, ovl.fmt.RRE.r1,
11888 ovl.fmt.RRE.r2); goto ok;
11889 case 0xb91b: s390_format_RRE_RR(s390_irgen_SLGFR, ovl.fmt.RRE.r1,
11890 ovl.fmt.RRE.r2); goto ok;
11891 case 0xb91c: s390_format_RRE_RR(s390_irgen_MSGFR, ovl.fmt.RRE.r1,
11892 ovl.fmt.RRE.r2); goto ok;
11893 case 0xb91d: s390_format_RRE_RR(s390_irgen_DSGFR, ovl.fmt.RRE.r1,
11894 ovl.fmt.RRE.r2); goto ok;
11895 case 0xb91e: /* KMAC */ goto unimplemented;
11896 case 0xb91f: s390_format_RRE_RR(s390_irgen_LRVR, ovl.fmt.RRE.r1,
11897 ovl.fmt.RRE.r2); goto ok;
11898 case 0xb920: s390_format_RRE_RR(s390_irgen_CGR, ovl.fmt.RRE.r1,
11899 ovl.fmt.RRE.r2); goto ok;
11900 case 0xb921: s390_format_RRE_RR(s390_irgen_CLGR, ovl.fmt.RRE.r1,
11901 ovl.fmt.RRE.r2); goto ok;
11902 case 0xb925: /* STURG */ goto unimplemented;
11903 case 0xb926: s390_format_RRE_RR(s390_irgen_LBR, ovl.fmt.RRE.r1,
11904 ovl.fmt.RRE.r2); goto ok;
11905 case 0xb927: s390_format_RRE_RR(s390_irgen_LHR, ovl.fmt.RRE.r1,
11906 ovl.fmt.RRE.r2); goto ok;
11907 case 0xb928: /* PCKMO */ goto unimplemented;
11908 case 0xb92b: /* KMO */ goto unimplemented;
11909 case 0xb92c: /* PCC */ goto unimplemented;
11910 case 0xb92d: /* KMCTR */ goto unimplemented;
11911 case 0xb92e: /* KM */ goto unimplemented;
11912 case 0xb92f: /* KMC */ goto unimplemented;
11913 case 0xb930: s390_format_RRE_RR(s390_irgen_CGFR, ovl.fmt.RRE.r1,
11914 ovl.fmt.RRE.r2); goto ok;
11915 case 0xb931: s390_format_RRE_RR(s390_irgen_CLGFR, ovl.fmt.RRE.r1,
11916 ovl.fmt.RRE.r2); goto ok;
11917 case 0xb93e: /* KIMD */ goto unimplemented;
11918 case 0xb93f: /* KLMD */ goto unimplemented;
11919 case 0xb941: /* CFDTR */ goto unimplemented;
11920 case 0xb942: /* CLGDTR */ goto unimplemented;
11921 case 0xb943: /* CLFDTR */ goto unimplemented;
11922 case 0xb946: s390_format_RRE_RR(s390_irgen_BCTGR, ovl.fmt.RRE.r1,
11923 ovl.fmt.RRE.r2); goto ok;
11924 case 0xb949: /* CFXTR */ goto unimplemented;
11925 case 0xb94a: /* CLGXTR */ goto unimplemented;
11926 case 0xb94b: /* CLFXTR */ goto unimplemented;
11927 case 0xb951: /* CDFTR */ goto unimplemented;
11928 case 0xb952: /* CDLGTR */ goto unimplemented;
11929 case 0xb953: /* CDLFTR */ goto unimplemented;
11930 case 0xb959: /* CXFTR */ goto unimplemented;
11931 case 0xb95a: /* CXLGTR */ goto unimplemented;
11932 case 0xb95b: /* CXLFTR */ goto unimplemented;
11933 case 0xb960: /* CGRT */ goto unimplemented;
11934 case 0xb961: /* CLGRT */ goto unimplemented;
11935 case 0xb972: /* CRT */ goto unimplemented;
11936 case 0xb973: /* CLRT */ goto unimplemented;
11937 case 0xb980: s390_format_RRE_RR(s390_irgen_NGR, ovl.fmt.RRE.r1,
11938 ovl.fmt.RRE.r2); goto ok;
11939 case 0xb981: s390_format_RRE_RR(s390_irgen_OGR, ovl.fmt.RRE.r1,
11940 ovl.fmt.RRE.r2); goto ok;
11941 case 0xb982: s390_format_RRE_RR(s390_irgen_XGR, ovl.fmt.RRE.r1,
11942 ovl.fmt.RRE.r2); goto ok;
11943 case 0xb983: s390_format_RRE_RR(s390_irgen_FLOGR, ovl.fmt.RRE.r1,
11944 ovl.fmt.RRE.r2); goto ok;
11945 case 0xb984: s390_format_RRE_RR(s390_irgen_LLGCR, ovl.fmt.RRE.r1,
11946 ovl.fmt.RRE.r2); goto ok;
11947 case 0xb985: s390_format_RRE_RR(s390_irgen_LLGHR, ovl.fmt.RRE.r1,
11948 ovl.fmt.RRE.r2); goto ok;
11949 case 0xb986: s390_format_RRE_RR(s390_irgen_MLGR, ovl.fmt.RRE.r1,
11950 ovl.fmt.RRE.r2); goto ok;
11951 case 0xb987: s390_format_RRE_RR(s390_irgen_DLGR, ovl.fmt.RRE.r1,
11952 ovl.fmt.RRE.r2); goto ok;
11953 case 0xb988: s390_format_RRE_RR(s390_irgen_ALCGR, ovl.fmt.RRE.r1,
11954 ovl.fmt.RRE.r2); goto ok;
11955 case 0xb989: s390_format_RRE_RR(s390_irgen_SLBGR, ovl.fmt.RRE.r1,
11956 ovl.fmt.RRE.r2); goto ok;
11957 case 0xb98a: /* CSPG */ goto unimplemented;
11958 case 0xb98d: /* EPSW */ goto unimplemented;
11959 case 0xb98e: /* IDTE */ goto unimplemented;
florian730448f2012-02-04 17:07:07 +000011960 case 0xb990: s390_format_RRF_M0RERE(s390_irgen_TRTT, ovl.fmt.RRF3.r3,
11961 ovl.fmt.RRF3.r1, ovl.fmt.RRF3.r2); goto ok;
11962 case 0xb991: s390_format_RRF_M0RERE(s390_irgen_TRTO, ovl.fmt.RRF3.r3,
11963 ovl.fmt.RRF3.r1, ovl.fmt.RRF3.r2); goto ok;
11964 case 0xb992: s390_format_RRF_M0RERE(s390_irgen_TROT, ovl.fmt.RRF3.r3,
11965 ovl.fmt.RRF3.r1, ovl.fmt.RRF3.r2); goto ok;
florian9af37692012-01-15 21:01:16 +000011966 case 0xb993: s390_format_RRF_M0RERE(s390_irgen_TROO, ovl.fmt.RRF3.r3,
11967 ovl.fmt.RRF3.r1, ovl.fmt.RRF3.r2); goto ok;
sewardj2019a972011-03-07 16:04:07 +000011968 case 0xb994: s390_format_RRE_RR(s390_irgen_LLCR, ovl.fmt.RRE.r1,
11969 ovl.fmt.RRE.r2); goto ok;
11970 case 0xb995: s390_format_RRE_RR(s390_irgen_LLHR, ovl.fmt.RRE.r1,
11971 ovl.fmt.RRE.r2); goto ok;
11972 case 0xb996: s390_format_RRE_RR(s390_irgen_MLR, ovl.fmt.RRE.r1,
11973 ovl.fmt.RRE.r2); goto ok;
11974 case 0xb997: s390_format_RRE_RR(s390_irgen_DLR, ovl.fmt.RRE.r1,
11975 ovl.fmt.RRE.r2); goto ok;
11976 case 0xb998: s390_format_RRE_RR(s390_irgen_ALCR, ovl.fmt.RRE.r1,
11977 ovl.fmt.RRE.r2); goto ok;
11978 case 0xb999: s390_format_RRE_RR(s390_irgen_SLBR, ovl.fmt.RRE.r1,
11979 ovl.fmt.RRE.r2); goto ok;
11980 case 0xb99a: /* EPAIR */ goto unimplemented;
11981 case 0xb99b: /* ESAIR */ goto unimplemented;
11982 case 0xb99d: /* ESEA */ goto unimplemented;
11983 case 0xb99e: /* PTI */ goto unimplemented;
11984 case 0xb99f: /* SSAIR */ goto unimplemented;
11985 case 0xb9a2: /* PTF */ goto unimplemented;
11986 case 0xb9aa: /* LPTEA */ goto unimplemented;
11987 case 0xb9ae: /* RRBM */ goto unimplemented;
11988 case 0xb9af: /* PFMF */ goto unimplemented;
11989 case 0xb9b0: /* CU14 */ goto unimplemented;
11990 case 0xb9b1: /* CU24 */ goto unimplemented;
11991 case 0xb9b2: /* CU41 */ goto unimplemented;
11992 case 0xb9b3: /* CU42 */ goto unimplemented;
11993 case 0xb9bd: /* TRTRE */ goto unimplemented;
11994 case 0xb9be: /* SRSTU */ goto unimplemented;
11995 case 0xb9bf: /* TRTE */ goto unimplemented;
11996 case 0xb9c8: s390_format_RRF_R0RR2(s390_irgen_AHHHR, ovl.fmt.RRF4.r3,
11997 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
11998 goto ok;
11999 case 0xb9c9: s390_format_RRF_R0RR2(s390_irgen_SHHHR, ovl.fmt.RRF4.r3,
12000 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
12001 goto ok;
12002 case 0xb9ca: s390_format_RRF_R0RR2(s390_irgen_ALHHHR, ovl.fmt.RRF4.r3,
12003 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
12004 goto ok;
12005 case 0xb9cb: s390_format_RRF_R0RR2(s390_irgen_SLHHHR, ovl.fmt.RRF4.r3,
12006 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
12007 goto ok;
12008 case 0xb9cd: s390_format_RRE_RR(s390_irgen_CHHR, ovl.fmt.RRE.r1,
12009 ovl.fmt.RRE.r2); goto ok;
12010 case 0xb9cf: s390_format_RRE_RR(s390_irgen_CLHHR, ovl.fmt.RRE.r1,
12011 ovl.fmt.RRE.r2); goto ok;
12012 case 0xb9d8: s390_format_RRF_R0RR2(s390_irgen_AHHLR, ovl.fmt.RRF4.r3,
12013 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
12014 goto ok;
12015 case 0xb9d9: s390_format_RRF_R0RR2(s390_irgen_SHHLR, ovl.fmt.RRF4.r3,
12016 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
12017 goto ok;
12018 case 0xb9da: s390_format_RRF_R0RR2(s390_irgen_ALHHLR, ovl.fmt.RRF4.r3,
12019 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
12020 goto ok;
12021 case 0xb9db: s390_format_RRF_R0RR2(s390_irgen_SLHHLR, ovl.fmt.RRF4.r3,
12022 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
12023 goto ok;
12024 case 0xb9dd: s390_format_RRE_RR(s390_irgen_CHLR, ovl.fmt.RRE.r1,
12025 ovl.fmt.RRE.r2); goto ok;
12026 case 0xb9df: s390_format_RRE_RR(s390_irgen_CLHLR, ovl.fmt.RRE.r1,
12027 ovl.fmt.RRE.r2); goto ok;
12028 case 0xb9e1: /* POPCNT */ goto unimplemented;
sewardjd7bde722011-04-05 13:19:33 +000012029 case 0xb9e2: s390_format_RRF_U0RR(s390_irgen_LOCGR, ovl.fmt.RRF3.r3,
12030 ovl.fmt.RRF3.r1, ovl.fmt.RRF3.r2,
12031 S390_XMNM_LOCGR); goto ok;
sewardj2019a972011-03-07 16:04:07 +000012032 case 0xb9e4: s390_format_RRF_R0RR2(s390_irgen_NGRK, ovl.fmt.RRF4.r3,
12033 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
12034 goto ok;
12035 case 0xb9e6: s390_format_RRF_R0RR2(s390_irgen_OGRK, ovl.fmt.RRF4.r3,
12036 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
12037 goto ok;
12038 case 0xb9e7: s390_format_RRF_R0RR2(s390_irgen_XGRK, ovl.fmt.RRF4.r3,
12039 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
12040 goto ok;
12041 case 0xb9e8: s390_format_RRF_R0RR2(s390_irgen_AGRK, ovl.fmt.RRF4.r3,
12042 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
12043 goto ok;
12044 case 0xb9e9: s390_format_RRF_R0RR2(s390_irgen_SGRK, ovl.fmt.RRF4.r3,
12045 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
12046 goto ok;
12047 case 0xb9ea: s390_format_RRF_R0RR2(s390_irgen_ALGRK, ovl.fmt.RRF4.r3,
12048 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
12049 goto ok;
12050 case 0xb9eb: s390_format_RRF_R0RR2(s390_irgen_SLGRK, ovl.fmt.RRF4.r3,
12051 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
12052 goto ok;
sewardjd7bde722011-04-05 13:19:33 +000012053 case 0xb9f2: s390_format_RRF_U0RR(s390_irgen_LOCR, ovl.fmt.RRF3.r3,
12054 ovl.fmt.RRF3.r1, ovl.fmt.RRF3.r2,
12055 S390_XMNM_LOCR); goto ok;
sewardj2019a972011-03-07 16:04:07 +000012056 case 0xb9f4: s390_format_RRF_R0RR2(s390_irgen_NRK, ovl.fmt.RRF4.r3,
12057 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
12058 goto ok;
12059 case 0xb9f6: s390_format_RRF_R0RR2(s390_irgen_ORK, ovl.fmt.RRF4.r3,
12060 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
12061 goto ok;
12062 case 0xb9f7: s390_format_RRF_R0RR2(s390_irgen_XRK, ovl.fmt.RRF4.r3,
12063 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
12064 goto ok;
12065 case 0xb9f8: s390_format_RRF_R0RR2(s390_irgen_ARK, ovl.fmt.RRF4.r3,
12066 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
12067 goto ok;
12068 case 0xb9f9: s390_format_RRF_R0RR2(s390_irgen_SRK, ovl.fmt.RRF4.r3,
12069 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
12070 goto ok;
12071 case 0xb9fa: s390_format_RRF_R0RR2(s390_irgen_ALRK, ovl.fmt.RRF4.r3,
12072 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
12073 goto ok;
12074 case 0xb9fb: s390_format_RRF_R0RR2(s390_irgen_SLRK, ovl.fmt.RRF4.r3,
12075 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
12076 goto ok;
12077 }
12078
12079 switch ((ovl.value & 0xff000000) >> 24) {
12080 case 0x40: s390_format_RX_RRRD(s390_irgen_STH, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
12081 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
12082 case 0x41: s390_format_RX_RRRD(s390_irgen_LA, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
12083 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
12084 case 0x42: s390_format_RX_RRRD(s390_irgen_STC, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
12085 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
12086 case 0x43: s390_format_RX_RRRD(s390_irgen_IC, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
12087 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
12088 case 0x44: s390_format_RX_RRRD(s390_irgen_EX, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
12089 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
12090 case 0x45: /* BAL */ goto unimplemented;
12091 case 0x46: s390_format_RX_RRRD(s390_irgen_BCT, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
12092 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
12093 case 0x47: s390_format_RX(s390_irgen_BC, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
12094 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
12095 case 0x48: s390_format_RX_RRRD(s390_irgen_LH, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
12096 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
12097 case 0x49: s390_format_RX_RRRD(s390_irgen_CH, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
12098 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
12099 case 0x4a: s390_format_RX_RRRD(s390_irgen_AH, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
12100 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
12101 case 0x4b: s390_format_RX_RRRD(s390_irgen_SH, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
12102 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
12103 case 0x4c: s390_format_RX_RRRD(s390_irgen_MH, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
12104 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
12105 case 0x4d: s390_format_RX_RRRD(s390_irgen_BAS, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
12106 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
12107 case 0x4e: s390_format_RX_RRRD(s390_irgen_CVD, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
12108 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
12109 case 0x4f: s390_format_RX_RRRD(s390_irgen_CVB, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
12110 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
12111 case 0x50: s390_format_RX_RRRD(s390_irgen_ST, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
12112 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
12113 case 0x51: s390_format_RX_RRRD(s390_irgen_LAE, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
12114 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
12115 case 0x54: s390_format_RX_RRRD(s390_irgen_N, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
12116 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
12117 case 0x55: s390_format_RX_RRRD(s390_irgen_CL, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
12118 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
12119 case 0x56: s390_format_RX_RRRD(s390_irgen_O, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
12120 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
12121 case 0x57: s390_format_RX_RRRD(s390_irgen_X, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
12122 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
12123 case 0x58: s390_format_RX_RRRD(s390_irgen_L, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
12124 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
12125 case 0x59: s390_format_RX_RRRD(s390_irgen_C, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
12126 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
12127 case 0x5a: s390_format_RX_RRRD(s390_irgen_A, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
12128 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
12129 case 0x5b: s390_format_RX_RRRD(s390_irgen_S, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
12130 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
12131 case 0x5c: s390_format_RX_RRRD(s390_irgen_M, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
12132 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
12133 case 0x5d: s390_format_RX_RRRD(s390_irgen_D, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
12134 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
12135 case 0x5e: s390_format_RX_RRRD(s390_irgen_AL, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
12136 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
12137 case 0x5f: s390_format_RX_RRRD(s390_irgen_SL, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
12138 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
12139 case 0x60: s390_format_RX_FRRD(s390_irgen_STD, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
12140 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
12141 case 0x67: /* MXD */ goto unimplemented;
12142 case 0x68: s390_format_RX_FRRD(s390_irgen_LD, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
12143 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
12144 case 0x69: /* CD */ goto unimplemented;
12145 case 0x6a: /* AD */ goto unimplemented;
12146 case 0x6b: /* SD */ goto unimplemented;
12147 case 0x6c: /* MD */ goto unimplemented;
12148 case 0x6d: /* DD */ goto unimplemented;
12149 case 0x6e: /* AW */ goto unimplemented;
12150 case 0x6f: /* SW */ goto unimplemented;
12151 case 0x70: s390_format_RX_FRRD(s390_irgen_STE, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
12152 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
12153 case 0x71: s390_format_RX_RRRD(s390_irgen_MS, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
12154 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
12155 case 0x78: s390_format_RX_FRRD(s390_irgen_LE, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
12156 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
12157 case 0x79: /* CE */ goto unimplemented;
12158 case 0x7a: /* AE */ goto unimplemented;
12159 case 0x7b: /* SE */ goto unimplemented;
12160 case 0x7c: /* MDE */ goto unimplemented;
12161 case 0x7d: /* DE */ goto unimplemented;
12162 case 0x7e: /* AU */ goto unimplemented;
12163 case 0x7f: /* SU */ goto unimplemented;
12164 case 0x83: /* DIAG */ goto unimplemented;
12165 case 0x84: s390_format_RSI_RRP(s390_irgen_BRXH, ovl.fmt.RSI.r1,
12166 ovl.fmt.RSI.r3, ovl.fmt.RSI.i2); goto ok;
12167 case 0x85: s390_format_RSI_RRP(s390_irgen_BRXLE, ovl.fmt.RSI.r1,
12168 ovl.fmt.RSI.r3, ovl.fmt.RSI.i2); goto ok;
12169 case 0x86: s390_format_RS_RRRD(s390_irgen_BXH, ovl.fmt.RS.r1, ovl.fmt.RS.r3,
12170 ovl.fmt.RS.b2, ovl.fmt.RS.d2); goto ok;
12171 case 0x87: s390_format_RS_RRRD(s390_irgen_BXLE, ovl.fmt.RS.r1, ovl.fmt.RS.r3,
12172 ovl.fmt.RS.b2, ovl.fmt.RS.d2); goto ok;
12173 case 0x88: s390_format_RS_R0RD(s390_irgen_SRL, ovl.fmt.RS.r1, ovl.fmt.RS.b2,
12174 ovl.fmt.RS.d2); goto ok;
12175 case 0x89: s390_format_RS_R0RD(s390_irgen_SLL, ovl.fmt.RS.r1, ovl.fmt.RS.b2,
12176 ovl.fmt.RS.d2); goto ok;
12177 case 0x8a: s390_format_RS_R0RD(s390_irgen_SRA, ovl.fmt.RS.r1, ovl.fmt.RS.b2,
12178 ovl.fmt.RS.d2); goto ok;
12179 case 0x8b: s390_format_RS_R0RD(s390_irgen_SLA, ovl.fmt.RS.r1, ovl.fmt.RS.b2,
12180 ovl.fmt.RS.d2); goto ok;
12181 case 0x8c: s390_format_RS_R0RD(s390_irgen_SRDL, ovl.fmt.RS.r1, ovl.fmt.RS.b2,
12182 ovl.fmt.RS.d2); goto ok;
12183 case 0x8d: s390_format_RS_R0RD(s390_irgen_SLDL, ovl.fmt.RS.r1, ovl.fmt.RS.b2,
12184 ovl.fmt.RS.d2); goto ok;
12185 case 0x8e: s390_format_RS_R0RD(s390_irgen_SRDA, ovl.fmt.RS.r1, ovl.fmt.RS.b2,
12186 ovl.fmt.RS.d2); goto ok;
12187 case 0x8f: s390_format_RS_R0RD(s390_irgen_SLDA, ovl.fmt.RS.r1, ovl.fmt.RS.b2,
12188 ovl.fmt.RS.d2); goto ok;
12189 case 0x90: s390_format_RS_RRRD(s390_irgen_STM, ovl.fmt.RS.r1, ovl.fmt.RS.r3,
12190 ovl.fmt.RS.b2, ovl.fmt.RS.d2); goto ok;
12191 case 0x91: s390_format_SI_URD(s390_irgen_TM, ovl.fmt.SI.i2, ovl.fmt.SI.b1,
12192 ovl.fmt.SI.d1); goto ok;
12193 case 0x92: s390_format_SI_URD(s390_irgen_MVI, ovl.fmt.SI.i2, ovl.fmt.SI.b1,
12194 ovl.fmt.SI.d1); goto ok;
12195 case 0x94: s390_format_SI_URD(s390_irgen_NI, ovl.fmt.SI.i2, ovl.fmt.SI.b1,
12196 ovl.fmt.SI.d1); goto ok;
12197 case 0x95: s390_format_SI_URD(s390_irgen_CLI, ovl.fmt.SI.i2, ovl.fmt.SI.b1,
12198 ovl.fmt.SI.d1); goto ok;
12199 case 0x96: s390_format_SI_URD(s390_irgen_OI, ovl.fmt.SI.i2, ovl.fmt.SI.b1,
12200 ovl.fmt.SI.d1); goto ok;
12201 case 0x97: s390_format_SI_URD(s390_irgen_XI, ovl.fmt.SI.i2, ovl.fmt.SI.b1,
12202 ovl.fmt.SI.d1); goto ok;
12203 case 0x98: s390_format_RS_RRRD(s390_irgen_LM, ovl.fmt.RS.r1, ovl.fmt.RS.r3,
12204 ovl.fmt.RS.b2, ovl.fmt.RS.d2); goto ok;
12205 case 0x99: /* TRACE */ goto unimplemented;
12206 case 0x9a: s390_format_RS_AARD(s390_irgen_LAM, ovl.fmt.RS.r1, ovl.fmt.RS.r3,
12207 ovl.fmt.RS.b2, ovl.fmt.RS.d2); goto ok;
12208 case 0x9b: s390_format_RS_AARD(s390_irgen_STAM, ovl.fmt.RS.r1, ovl.fmt.RS.r3,
12209 ovl.fmt.RS.b2, ovl.fmt.RS.d2); goto ok;
12210 case 0xa8: s390_format_RS_RRRD(s390_irgen_MVCLE, ovl.fmt.RS.r1,
12211 ovl.fmt.RS.r3, ovl.fmt.RS.b2, ovl.fmt.RS.d2);
12212 goto ok;
12213 case 0xa9: s390_format_RS_RRRD(s390_irgen_CLCLE, ovl.fmt.RS.r1,
12214 ovl.fmt.RS.r3, ovl.fmt.RS.b2, ovl.fmt.RS.d2);
12215 goto ok;
12216 case 0xac: /* STNSM */ goto unimplemented;
12217 case 0xad: /* STOSM */ goto unimplemented;
12218 case 0xae: /* SIGP */ goto unimplemented;
12219 case 0xaf: /* MC */ goto unimplemented;
12220 case 0xb1: /* LRA */ goto unimplemented;
12221 case 0xb6: /* STCTL */ goto unimplemented;
12222 case 0xb7: /* LCTL */ goto unimplemented;
12223 case 0xba: s390_format_RS_RRRD(s390_irgen_CS, ovl.fmt.RS.r1, ovl.fmt.RS.r3,
12224 ovl.fmt.RS.b2, ovl.fmt.RS.d2); goto ok;
12225 case 0xbb: /* CDS */ goto unimplemented;
12226 case 0xbd: s390_format_RS_RURD(s390_irgen_CLM, ovl.fmt.RS.r1, ovl.fmt.RS.r3,
12227 ovl.fmt.RS.b2, ovl.fmt.RS.d2); goto ok;
12228 case 0xbe: s390_format_RS_RURD(s390_irgen_STCM, ovl.fmt.RS.r1, ovl.fmt.RS.r3,
12229 ovl.fmt.RS.b2, ovl.fmt.RS.d2); goto ok;
12230 case 0xbf: s390_format_RS_RURD(s390_irgen_ICM, ovl.fmt.RS.r1, ovl.fmt.RS.r3,
12231 ovl.fmt.RS.b2, ovl.fmt.RS.d2); goto ok;
12232 }
12233
12234 return S390_DECODE_UNKNOWN_INSN;
12235
12236ok:
12237 return S390_DECODE_OK;
12238
12239unimplemented:
12240 return S390_DECODE_UNIMPLEMENTED_INSN;
12241}
12242
12243static s390_decode_t
12244s390_decode_6byte_and_irgen(UChar *bytes)
12245{
12246 typedef union {
12247 struct {
12248 unsigned int op1 : 8;
12249 unsigned int r1 : 4;
12250 unsigned int r3 : 4;
12251 unsigned int i2 : 16;
12252 unsigned int : 8;
12253 unsigned int op2 : 8;
12254 } RIE;
12255 struct {
12256 unsigned int op1 : 8;
12257 unsigned int r1 : 4;
12258 unsigned int r2 : 4;
12259 unsigned int i3 : 8;
12260 unsigned int i4 : 8;
12261 unsigned int i5 : 8;
12262 unsigned int op2 : 8;
12263 } RIE_RRUUU;
12264 struct {
12265 unsigned int op1 : 8;
12266 unsigned int r1 : 4;
12267 unsigned int : 4;
12268 unsigned int i2 : 16;
12269 unsigned int m3 : 4;
12270 unsigned int : 4;
12271 unsigned int op2 : 8;
12272 } RIEv1;
12273 struct {
12274 unsigned int op1 : 8;
12275 unsigned int r1 : 4;
12276 unsigned int r2 : 4;
12277 unsigned int i4 : 16;
12278 unsigned int m3 : 4;
12279 unsigned int : 4;
12280 unsigned int op2 : 8;
12281 } RIE_RRPU;
12282 struct {
12283 unsigned int op1 : 8;
12284 unsigned int r1 : 4;
12285 unsigned int m3 : 4;
12286 unsigned int i4 : 16;
12287 unsigned int i2 : 8;
12288 unsigned int op2 : 8;
12289 } RIEv3;
12290 struct {
12291 unsigned int op1 : 8;
12292 unsigned int r1 : 4;
12293 unsigned int op2 : 4;
12294 unsigned int i2 : 32;
12295 } RIL;
12296 struct {
12297 unsigned int op1 : 8;
12298 unsigned int r1 : 4;
12299 unsigned int m3 : 4;
12300 unsigned int b4 : 4;
12301 unsigned int d4 : 12;
12302 unsigned int i2 : 8;
12303 unsigned int op2 : 8;
12304 } RIS;
12305 struct {
12306 unsigned int op1 : 8;
12307 unsigned int r1 : 4;
12308 unsigned int r2 : 4;
12309 unsigned int b4 : 4;
12310 unsigned int d4 : 12;
12311 unsigned int m3 : 4;
12312 unsigned int : 4;
12313 unsigned int op2 : 8;
12314 } RRS;
12315 struct {
12316 unsigned int op1 : 8;
12317 unsigned int l1 : 4;
12318 unsigned int : 4;
12319 unsigned int b1 : 4;
12320 unsigned int d1 : 12;
12321 unsigned int : 8;
12322 unsigned int op2 : 8;
12323 } RSL;
12324 struct {
12325 unsigned int op1 : 8;
12326 unsigned int r1 : 4;
12327 unsigned int r3 : 4;
12328 unsigned int b2 : 4;
12329 unsigned int dl2 : 12;
12330 unsigned int dh2 : 8;
12331 unsigned int op2 : 8;
12332 } RSY;
12333 struct {
12334 unsigned int op1 : 8;
12335 unsigned int r1 : 4;
12336 unsigned int x2 : 4;
12337 unsigned int b2 : 4;
12338 unsigned int d2 : 12;
12339 unsigned int : 8;
12340 unsigned int op2 : 8;
12341 } RXE;
12342 struct {
12343 unsigned int op1 : 8;
12344 unsigned int r3 : 4;
12345 unsigned int x2 : 4;
12346 unsigned int b2 : 4;
12347 unsigned int d2 : 12;
12348 unsigned int r1 : 4;
12349 unsigned int : 4;
12350 unsigned int op2 : 8;
12351 } RXF;
12352 struct {
12353 unsigned int op1 : 8;
12354 unsigned int r1 : 4;
12355 unsigned int x2 : 4;
12356 unsigned int b2 : 4;
12357 unsigned int dl2 : 12;
12358 unsigned int dh2 : 8;
12359 unsigned int op2 : 8;
12360 } RXY;
12361 struct {
12362 unsigned int op1 : 8;
12363 unsigned int i2 : 8;
12364 unsigned int b1 : 4;
12365 unsigned int dl1 : 12;
12366 unsigned int dh1 : 8;
12367 unsigned int op2 : 8;
12368 } SIY;
12369 struct {
12370 unsigned int op : 8;
12371 unsigned int l : 8;
12372 unsigned int b1 : 4;
12373 unsigned int d1 : 12;
12374 unsigned int b2 : 4;
12375 unsigned int d2 : 12;
12376 } SS;
12377 struct {
12378 unsigned int op : 8;
12379 unsigned int l1 : 4;
12380 unsigned int l2 : 4;
12381 unsigned int b1 : 4;
12382 unsigned int d1 : 12;
12383 unsigned int b2 : 4;
12384 unsigned int d2 : 12;
12385 } SS_LLRDRD;
12386 struct {
12387 unsigned int op : 8;
12388 unsigned int r1 : 4;
12389 unsigned int r3 : 4;
12390 unsigned int b2 : 4;
12391 unsigned int d2 : 12;
12392 unsigned int b4 : 4;
12393 unsigned int d4 : 12;
12394 } SS_RRRDRD2;
12395 struct {
12396 unsigned int op : 16;
12397 unsigned int b1 : 4;
12398 unsigned int d1 : 12;
12399 unsigned int b2 : 4;
12400 unsigned int d2 : 12;
12401 } SSE;
12402 struct {
12403 unsigned int op1 : 8;
12404 unsigned int r3 : 4;
12405 unsigned int op2 : 4;
12406 unsigned int b1 : 4;
12407 unsigned int d1 : 12;
12408 unsigned int b2 : 4;
12409 unsigned int d2 : 12;
12410 } SSF;
12411 struct {
12412 unsigned int op : 16;
12413 unsigned int b1 : 4;
12414 unsigned int d1 : 12;
12415 unsigned int i2 : 16;
12416 } SIL;
12417 } formats;
12418 union {
12419 formats fmt;
12420 ULong value;
12421 } ovl;
12422
12423 vassert(sizeof(formats) == 6);
12424
12425 ((char *)(&ovl.value))[0] = bytes[0];
12426 ((char *)(&ovl.value))[1] = bytes[1];
12427 ((char *)(&ovl.value))[2] = bytes[2];
12428 ((char *)(&ovl.value))[3] = bytes[3];
12429 ((char *)(&ovl.value))[4] = bytes[4];
12430 ((char *)(&ovl.value))[5] = bytes[5];
12431 ((char *)(&ovl.value))[6] = 0x0;
12432 ((char *)(&ovl.value))[7] = 0x0;
12433
12434 switch ((ovl.value >> 16) & 0xff00000000ffULL) {
12435 case 0xe30000000002ULL: s390_format_RXY_RRRD(s390_irgen_LTG, ovl.fmt.RXY.r1,
12436 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12437 ovl.fmt.RXY.dl2,
12438 ovl.fmt.RXY.dh2); goto ok;
12439 case 0xe30000000003ULL: /* LRAG */ goto unimplemented;
12440 case 0xe30000000004ULL: s390_format_RXY_RRRD(s390_irgen_LG, ovl.fmt.RXY.r1,
12441 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12442 ovl.fmt.RXY.dl2,
12443 ovl.fmt.RXY.dh2); goto ok;
12444 case 0xe30000000006ULL: s390_format_RXY_RRRD(s390_irgen_CVBY, ovl.fmt.RXY.r1,
12445 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12446 ovl.fmt.RXY.dl2,
12447 ovl.fmt.RXY.dh2); goto ok;
12448 case 0xe30000000008ULL: s390_format_RXY_RRRD(s390_irgen_AG, ovl.fmt.RXY.r1,
12449 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12450 ovl.fmt.RXY.dl2,
12451 ovl.fmt.RXY.dh2); goto ok;
12452 case 0xe30000000009ULL: s390_format_RXY_RRRD(s390_irgen_SG, ovl.fmt.RXY.r1,
12453 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12454 ovl.fmt.RXY.dl2,
12455 ovl.fmt.RXY.dh2); goto ok;
12456 case 0xe3000000000aULL: s390_format_RXY_RRRD(s390_irgen_ALG, ovl.fmt.RXY.r1,
12457 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12458 ovl.fmt.RXY.dl2,
12459 ovl.fmt.RXY.dh2); goto ok;
12460 case 0xe3000000000bULL: s390_format_RXY_RRRD(s390_irgen_SLG, ovl.fmt.RXY.r1,
12461 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12462 ovl.fmt.RXY.dl2,
12463 ovl.fmt.RXY.dh2); goto ok;
12464 case 0xe3000000000cULL: s390_format_RXY_RRRD(s390_irgen_MSG, ovl.fmt.RXY.r1,
12465 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12466 ovl.fmt.RXY.dl2,
12467 ovl.fmt.RXY.dh2); goto ok;
12468 case 0xe3000000000dULL: s390_format_RXY_RRRD(s390_irgen_DSG, ovl.fmt.RXY.r1,
12469 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12470 ovl.fmt.RXY.dl2,
12471 ovl.fmt.RXY.dh2); goto ok;
12472 case 0xe3000000000eULL: /* CVBG */ goto unimplemented;
12473 case 0xe3000000000fULL: s390_format_RXY_RRRD(s390_irgen_LRVG, ovl.fmt.RXY.r1,
12474 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12475 ovl.fmt.RXY.dl2,
12476 ovl.fmt.RXY.dh2); goto ok;
12477 case 0xe30000000012ULL: s390_format_RXY_RRRD(s390_irgen_LT, ovl.fmt.RXY.r1,
12478 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12479 ovl.fmt.RXY.dl2,
12480 ovl.fmt.RXY.dh2); goto ok;
12481 case 0xe30000000013ULL: /* LRAY */ goto unimplemented;
12482 case 0xe30000000014ULL: s390_format_RXY_RRRD(s390_irgen_LGF, ovl.fmt.RXY.r1,
12483 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12484 ovl.fmt.RXY.dl2,
12485 ovl.fmt.RXY.dh2); goto ok;
12486 case 0xe30000000015ULL: s390_format_RXY_RRRD(s390_irgen_LGH, ovl.fmt.RXY.r1,
12487 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12488 ovl.fmt.RXY.dl2,
12489 ovl.fmt.RXY.dh2); goto ok;
12490 case 0xe30000000016ULL: s390_format_RXY_RRRD(s390_irgen_LLGF, ovl.fmt.RXY.r1,
12491 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12492 ovl.fmt.RXY.dl2,
12493 ovl.fmt.RXY.dh2); goto ok;
12494 case 0xe30000000017ULL: s390_format_RXY_RRRD(s390_irgen_LLGT, ovl.fmt.RXY.r1,
12495 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12496 ovl.fmt.RXY.dl2,
12497 ovl.fmt.RXY.dh2); goto ok;
12498 case 0xe30000000018ULL: s390_format_RXY_RRRD(s390_irgen_AGF, ovl.fmt.RXY.r1,
12499 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12500 ovl.fmt.RXY.dl2,
12501 ovl.fmt.RXY.dh2); goto ok;
12502 case 0xe30000000019ULL: s390_format_RXY_RRRD(s390_irgen_SGF, ovl.fmt.RXY.r1,
12503 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12504 ovl.fmt.RXY.dl2,
12505 ovl.fmt.RXY.dh2); goto ok;
12506 case 0xe3000000001aULL: s390_format_RXY_RRRD(s390_irgen_ALGF, ovl.fmt.RXY.r1,
12507 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12508 ovl.fmt.RXY.dl2,
12509 ovl.fmt.RXY.dh2); goto ok;
12510 case 0xe3000000001bULL: s390_format_RXY_RRRD(s390_irgen_SLGF, ovl.fmt.RXY.r1,
12511 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12512 ovl.fmt.RXY.dl2,
12513 ovl.fmt.RXY.dh2); goto ok;
12514 case 0xe3000000001cULL: s390_format_RXY_RRRD(s390_irgen_MSGF, ovl.fmt.RXY.r1,
12515 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12516 ovl.fmt.RXY.dl2,
12517 ovl.fmt.RXY.dh2); goto ok;
12518 case 0xe3000000001dULL: s390_format_RXY_RRRD(s390_irgen_DSGF, ovl.fmt.RXY.r1,
12519 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12520 ovl.fmt.RXY.dl2,
12521 ovl.fmt.RXY.dh2); goto ok;
12522 case 0xe3000000001eULL: s390_format_RXY_RRRD(s390_irgen_LRV, ovl.fmt.RXY.r1,
12523 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12524 ovl.fmt.RXY.dl2,
12525 ovl.fmt.RXY.dh2); goto ok;
12526 case 0xe3000000001fULL: s390_format_RXY_RRRD(s390_irgen_LRVH, ovl.fmt.RXY.r1,
12527 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12528 ovl.fmt.RXY.dl2,
12529 ovl.fmt.RXY.dh2); goto ok;
12530 case 0xe30000000020ULL: s390_format_RXY_RRRD(s390_irgen_CG, ovl.fmt.RXY.r1,
12531 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12532 ovl.fmt.RXY.dl2,
12533 ovl.fmt.RXY.dh2); goto ok;
12534 case 0xe30000000021ULL: s390_format_RXY_RRRD(s390_irgen_CLG, ovl.fmt.RXY.r1,
12535 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12536 ovl.fmt.RXY.dl2,
12537 ovl.fmt.RXY.dh2); goto ok;
12538 case 0xe30000000024ULL: s390_format_RXY_RRRD(s390_irgen_STG, ovl.fmt.RXY.r1,
12539 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12540 ovl.fmt.RXY.dl2,
12541 ovl.fmt.RXY.dh2); goto ok;
12542 case 0xe30000000026ULL: s390_format_RXY_RRRD(s390_irgen_CVDY, ovl.fmt.RXY.r1,
12543 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12544 ovl.fmt.RXY.dl2,
12545 ovl.fmt.RXY.dh2); goto ok;
12546 case 0xe3000000002eULL: /* CVDG */ goto unimplemented;
12547 case 0xe3000000002fULL: s390_format_RXY_RRRD(s390_irgen_STRVG,
12548 ovl.fmt.RXY.r1, ovl.fmt.RXY.x2,
12549 ovl.fmt.RXY.b2, ovl.fmt.RXY.dl2,
12550 ovl.fmt.RXY.dh2); goto ok;
12551 case 0xe30000000030ULL: s390_format_RXY_RRRD(s390_irgen_CGF, ovl.fmt.RXY.r1,
12552 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12553 ovl.fmt.RXY.dl2,
12554 ovl.fmt.RXY.dh2); goto ok;
12555 case 0xe30000000031ULL: s390_format_RXY_RRRD(s390_irgen_CLGF, ovl.fmt.RXY.r1,
12556 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12557 ovl.fmt.RXY.dl2,
12558 ovl.fmt.RXY.dh2); goto ok;
12559 case 0xe30000000032ULL: s390_format_RXY_RRRD(s390_irgen_LTGF, ovl.fmt.RXY.r1,
12560 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12561 ovl.fmt.RXY.dl2,
12562 ovl.fmt.RXY.dh2); goto ok;
12563 case 0xe30000000034ULL: s390_format_RXY_RRRD(s390_irgen_CGH, ovl.fmt.RXY.r1,
12564 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12565 ovl.fmt.RXY.dl2,
12566 ovl.fmt.RXY.dh2); goto ok;
12567 case 0xe30000000036ULL: s390_format_RXY_URRD(s390_irgen_PFD, ovl.fmt.RXY.r1,
12568 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12569 ovl.fmt.RXY.dl2,
12570 ovl.fmt.RXY.dh2); goto ok;
12571 case 0xe3000000003eULL: s390_format_RXY_RRRD(s390_irgen_STRV, ovl.fmt.RXY.r1,
12572 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12573 ovl.fmt.RXY.dl2,
12574 ovl.fmt.RXY.dh2); goto ok;
12575 case 0xe3000000003fULL: s390_format_RXY_RRRD(s390_irgen_STRVH,
12576 ovl.fmt.RXY.r1, ovl.fmt.RXY.x2,
12577 ovl.fmt.RXY.b2, ovl.fmt.RXY.dl2,
12578 ovl.fmt.RXY.dh2); goto ok;
12579 case 0xe30000000046ULL: s390_format_RXY_RRRD(s390_irgen_BCTG, ovl.fmt.RXY.r1,
12580 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12581 ovl.fmt.RXY.dl2,
12582 ovl.fmt.RXY.dh2); goto ok;
12583 case 0xe30000000050ULL: s390_format_RXY_RRRD(s390_irgen_STY, ovl.fmt.RXY.r1,
12584 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12585 ovl.fmt.RXY.dl2,
12586 ovl.fmt.RXY.dh2); goto ok;
12587 case 0xe30000000051ULL: s390_format_RXY_RRRD(s390_irgen_MSY, ovl.fmt.RXY.r1,
12588 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12589 ovl.fmt.RXY.dl2,
12590 ovl.fmt.RXY.dh2); goto ok;
12591 case 0xe30000000054ULL: s390_format_RXY_RRRD(s390_irgen_NY, ovl.fmt.RXY.r1,
12592 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12593 ovl.fmt.RXY.dl2,
12594 ovl.fmt.RXY.dh2); goto ok;
12595 case 0xe30000000055ULL: s390_format_RXY_RRRD(s390_irgen_CLY, ovl.fmt.RXY.r1,
12596 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12597 ovl.fmt.RXY.dl2,
12598 ovl.fmt.RXY.dh2); goto ok;
12599 case 0xe30000000056ULL: s390_format_RXY_RRRD(s390_irgen_OY, ovl.fmt.RXY.r1,
12600 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12601 ovl.fmt.RXY.dl2,
12602 ovl.fmt.RXY.dh2); goto ok;
12603 case 0xe30000000057ULL: s390_format_RXY_RRRD(s390_irgen_XY, ovl.fmt.RXY.r1,
12604 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12605 ovl.fmt.RXY.dl2,
12606 ovl.fmt.RXY.dh2); goto ok;
12607 case 0xe30000000058ULL: s390_format_RXY_RRRD(s390_irgen_LY, ovl.fmt.RXY.r1,
12608 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12609 ovl.fmt.RXY.dl2,
12610 ovl.fmt.RXY.dh2); goto ok;
12611 case 0xe30000000059ULL: s390_format_RXY_RRRD(s390_irgen_CY, ovl.fmt.RXY.r1,
12612 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12613 ovl.fmt.RXY.dl2,
12614 ovl.fmt.RXY.dh2); goto ok;
12615 case 0xe3000000005aULL: s390_format_RXY_RRRD(s390_irgen_AY, ovl.fmt.RXY.r1,
12616 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12617 ovl.fmt.RXY.dl2,
12618 ovl.fmt.RXY.dh2); goto ok;
12619 case 0xe3000000005bULL: s390_format_RXY_RRRD(s390_irgen_SY, ovl.fmt.RXY.r1,
12620 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12621 ovl.fmt.RXY.dl2,
12622 ovl.fmt.RXY.dh2); goto ok;
12623 case 0xe3000000005cULL: s390_format_RXY_RRRD(s390_irgen_MFY, ovl.fmt.RXY.r1,
12624 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12625 ovl.fmt.RXY.dl2,
12626 ovl.fmt.RXY.dh2); goto ok;
12627 case 0xe3000000005eULL: s390_format_RXY_RRRD(s390_irgen_ALY, ovl.fmt.RXY.r1,
12628 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12629 ovl.fmt.RXY.dl2,
12630 ovl.fmt.RXY.dh2); goto ok;
12631 case 0xe3000000005fULL: s390_format_RXY_RRRD(s390_irgen_SLY, ovl.fmt.RXY.r1,
12632 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12633 ovl.fmt.RXY.dl2,
12634 ovl.fmt.RXY.dh2); goto ok;
12635 case 0xe30000000070ULL: s390_format_RXY_RRRD(s390_irgen_STHY, ovl.fmt.RXY.r1,
12636 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12637 ovl.fmt.RXY.dl2,
12638 ovl.fmt.RXY.dh2); goto ok;
12639 case 0xe30000000071ULL: s390_format_RXY_RRRD(s390_irgen_LAY, ovl.fmt.RXY.r1,
12640 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12641 ovl.fmt.RXY.dl2,
12642 ovl.fmt.RXY.dh2); goto ok;
12643 case 0xe30000000072ULL: s390_format_RXY_RRRD(s390_irgen_STCY, ovl.fmt.RXY.r1,
12644 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12645 ovl.fmt.RXY.dl2,
12646 ovl.fmt.RXY.dh2); goto ok;
12647 case 0xe30000000073ULL: s390_format_RXY_RRRD(s390_irgen_ICY, ovl.fmt.RXY.r1,
12648 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12649 ovl.fmt.RXY.dl2,
12650 ovl.fmt.RXY.dh2); goto ok;
12651 case 0xe30000000075ULL: s390_format_RXY_RRRD(s390_irgen_LAEY, ovl.fmt.RXY.r1,
12652 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12653 ovl.fmt.RXY.dl2,
12654 ovl.fmt.RXY.dh2); goto ok;
12655 case 0xe30000000076ULL: s390_format_RXY_RRRD(s390_irgen_LB, ovl.fmt.RXY.r1,
12656 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12657 ovl.fmt.RXY.dl2,
12658 ovl.fmt.RXY.dh2); goto ok;
12659 case 0xe30000000077ULL: s390_format_RXY_RRRD(s390_irgen_LGB, ovl.fmt.RXY.r1,
12660 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12661 ovl.fmt.RXY.dl2,
12662 ovl.fmt.RXY.dh2); goto ok;
12663 case 0xe30000000078ULL: s390_format_RXY_RRRD(s390_irgen_LHY, ovl.fmt.RXY.r1,
12664 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12665 ovl.fmt.RXY.dl2,
12666 ovl.fmt.RXY.dh2); goto ok;
12667 case 0xe30000000079ULL: s390_format_RXY_RRRD(s390_irgen_CHY, ovl.fmt.RXY.r1,
12668 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12669 ovl.fmt.RXY.dl2,
12670 ovl.fmt.RXY.dh2); goto ok;
12671 case 0xe3000000007aULL: s390_format_RXY_RRRD(s390_irgen_AHY, ovl.fmt.RXY.r1,
12672 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12673 ovl.fmt.RXY.dl2,
12674 ovl.fmt.RXY.dh2); goto ok;
12675 case 0xe3000000007bULL: s390_format_RXY_RRRD(s390_irgen_SHY, ovl.fmt.RXY.r1,
12676 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12677 ovl.fmt.RXY.dl2,
12678 ovl.fmt.RXY.dh2); goto ok;
12679 case 0xe3000000007cULL: s390_format_RXY_RRRD(s390_irgen_MHY, ovl.fmt.RXY.r1,
12680 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12681 ovl.fmt.RXY.dl2,
12682 ovl.fmt.RXY.dh2); goto ok;
12683 case 0xe30000000080ULL: s390_format_RXY_RRRD(s390_irgen_NG, ovl.fmt.RXY.r1,
12684 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12685 ovl.fmt.RXY.dl2,
12686 ovl.fmt.RXY.dh2); goto ok;
12687 case 0xe30000000081ULL: s390_format_RXY_RRRD(s390_irgen_OG, ovl.fmt.RXY.r1,
12688 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12689 ovl.fmt.RXY.dl2,
12690 ovl.fmt.RXY.dh2); goto ok;
12691 case 0xe30000000082ULL: s390_format_RXY_RRRD(s390_irgen_XG, ovl.fmt.RXY.r1,
12692 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12693 ovl.fmt.RXY.dl2,
12694 ovl.fmt.RXY.dh2); goto ok;
12695 case 0xe30000000086ULL: s390_format_RXY_RRRD(s390_irgen_MLG, ovl.fmt.RXY.r1,
12696 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12697 ovl.fmt.RXY.dl2,
12698 ovl.fmt.RXY.dh2); goto ok;
12699 case 0xe30000000087ULL: s390_format_RXY_RRRD(s390_irgen_DLG, ovl.fmt.RXY.r1,
12700 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12701 ovl.fmt.RXY.dl2,
12702 ovl.fmt.RXY.dh2); goto ok;
12703 case 0xe30000000088ULL: s390_format_RXY_RRRD(s390_irgen_ALCG, ovl.fmt.RXY.r1,
12704 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12705 ovl.fmt.RXY.dl2,
12706 ovl.fmt.RXY.dh2); goto ok;
12707 case 0xe30000000089ULL: s390_format_RXY_RRRD(s390_irgen_SLBG, ovl.fmt.RXY.r1,
12708 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12709 ovl.fmt.RXY.dl2,
12710 ovl.fmt.RXY.dh2); goto ok;
12711 case 0xe3000000008eULL: s390_format_RXY_RRRD(s390_irgen_STPQ, ovl.fmt.RXY.r1,
12712 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12713 ovl.fmt.RXY.dl2,
12714 ovl.fmt.RXY.dh2); goto ok;
12715 case 0xe3000000008fULL: s390_format_RXY_RRRD(s390_irgen_LPQ, ovl.fmt.RXY.r1,
12716 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12717 ovl.fmt.RXY.dl2,
12718 ovl.fmt.RXY.dh2); goto ok;
12719 case 0xe30000000090ULL: s390_format_RXY_RRRD(s390_irgen_LLGC, ovl.fmt.RXY.r1,
12720 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12721 ovl.fmt.RXY.dl2,
12722 ovl.fmt.RXY.dh2); goto ok;
12723 case 0xe30000000091ULL: s390_format_RXY_RRRD(s390_irgen_LLGH, ovl.fmt.RXY.r1,
12724 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12725 ovl.fmt.RXY.dl2,
12726 ovl.fmt.RXY.dh2); goto ok;
12727 case 0xe30000000094ULL: s390_format_RXY_RRRD(s390_irgen_LLC, ovl.fmt.RXY.r1,
12728 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12729 ovl.fmt.RXY.dl2,
12730 ovl.fmt.RXY.dh2); goto ok;
12731 case 0xe30000000095ULL: s390_format_RXY_RRRD(s390_irgen_LLH, ovl.fmt.RXY.r1,
12732 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12733 ovl.fmt.RXY.dl2,
12734 ovl.fmt.RXY.dh2); goto ok;
12735 case 0xe30000000096ULL: s390_format_RXY_RRRD(s390_irgen_ML, ovl.fmt.RXY.r1,
12736 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12737 ovl.fmt.RXY.dl2,
12738 ovl.fmt.RXY.dh2); goto ok;
12739 case 0xe30000000097ULL: s390_format_RXY_RRRD(s390_irgen_DL, ovl.fmt.RXY.r1,
12740 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12741 ovl.fmt.RXY.dl2,
12742 ovl.fmt.RXY.dh2); goto ok;
12743 case 0xe30000000098ULL: s390_format_RXY_RRRD(s390_irgen_ALC, ovl.fmt.RXY.r1,
12744 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12745 ovl.fmt.RXY.dl2,
12746 ovl.fmt.RXY.dh2); goto ok;
12747 case 0xe30000000099ULL: s390_format_RXY_RRRD(s390_irgen_SLB, ovl.fmt.RXY.r1,
12748 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12749 ovl.fmt.RXY.dl2,
12750 ovl.fmt.RXY.dh2); goto ok;
12751 case 0xe300000000c0ULL: s390_format_RXY_RRRD(s390_irgen_LBH, ovl.fmt.RXY.r1,
12752 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12753 ovl.fmt.RXY.dl2,
12754 ovl.fmt.RXY.dh2); goto ok;
12755 case 0xe300000000c2ULL: s390_format_RXY_RRRD(s390_irgen_LLCH, ovl.fmt.RXY.r1,
12756 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12757 ovl.fmt.RXY.dl2,
12758 ovl.fmt.RXY.dh2); goto ok;
12759 case 0xe300000000c3ULL: s390_format_RXY_RRRD(s390_irgen_STCH, ovl.fmt.RXY.r1,
12760 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12761 ovl.fmt.RXY.dl2,
12762 ovl.fmt.RXY.dh2); goto ok;
12763 case 0xe300000000c4ULL: s390_format_RXY_RRRD(s390_irgen_LHH, ovl.fmt.RXY.r1,
12764 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12765 ovl.fmt.RXY.dl2,
12766 ovl.fmt.RXY.dh2); goto ok;
12767 case 0xe300000000c6ULL: s390_format_RXY_RRRD(s390_irgen_LLHH, ovl.fmt.RXY.r1,
12768 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12769 ovl.fmt.RXY.dl2,
12770 ovl.fmt.RXY.dh2); goto ok;
12771 case 0xe300000000c7ULL: s390_format_RXY_RRRD(s390_irgen_STHH, ovl.fmt.RXY.r1,
12772 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12773 ovl.fmt.RXY.dl2,
12774 ovl.fmt.RXY.dh2); goto ok;
12775 case 0xe300000000caULL: s390_format_RXY_RRRD(s390_irgen_LFH, ovl.fmt.RXY.r1,
12776 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12777 ovl.fmt.RXY.dl2,
12778 ovl.fmt.RXY.dh2); goto ok;
12779 case 0xe300000000cbULL: s390_format_RXY_RRRD(s390_irgen_STFH, ovl.fmt.RXY.r1,
12780 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12781 ovl.fmt.RXY.dl2,
12782 ovl.fmt.RXY.dh2); goto ok;
12783 case 0xe300000000cdULL: s390_format_RXY_RRRD(s390_irgen_CHF, ovl.fmt.RXY.r1,
12784 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12785 ovl.fmt.RXY.dl2,
12786 ovl.fmt.RXY.dh2); goto ok;
12787 case 0xe300000000cfULL: s390_format_RXY_RRRD(s390_irgen_CLHF, ovl.fmt.RXY.r1,
12788 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12789 ovl.fmt.RXY.dl2,
12790 ovl.fmt.RXY.dh2); goto ok;
12791 case 0xeb0000000004ULL: s390_format_RSY_RRRD(s390_irgen_LMG, ovl.fmt.RSY.r1,
12792 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12793 ovl.fmt.RSY.dl2,
12794 ovl.fmt.RSY.dh2); goto ok;
12795 case 0xeb000000000aULL: s390_format_RSY_RRRD(s390_irgen_SRAG, ovl.fmt.RSY.r1,
12796 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12797 ovl.fmt.RSY.dl2,
12798 ovl.fmt.RSY.dh2); goto ok;
12799 case 0xeb000000000bULL: s390_format_RSY_RRRD(s390_irgen_SLAG, ovl.fmt.RSY.r1,
12800 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12801 ovl.fmt.RSY.dl2,
12802 ovl.fmt.RSY.dh2); goto ok;
12803 case 0xeb000000000cULL: s390_format_RSY_RRRD(s390_irgen_SRLG, ovl.fmt.RSY.r1,
12804 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12805 ovl.fmt.RSY.dl2,
12806 ovl.fmt.RSY.dh2); goto ok;
12807 case 0xeb000000000dULL: s390_format_RSY_RRRD(s390_irgen_SLLG, ovl.fmt.RSY.r1,
12808 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12809 ovl.fmt.RSY.dl2,
12810 ovl.fmt.RSY.dh2); goto ok;
12811 case 0xeb000000000fULL: /* TRACG */ goto unimplemented;
12812 case 0xeb0000000014ULL: s390_format_RSY_RRRD(s390_irgen_CSY, ovl.fmt.RSY.r1,
12813 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12814 ovl.fmt.RSY.dl2,
12815 ovl.fmt.RSY.dh2); goto ok;
12816 case 0xeb000000001cULL: s390_format_RSY_RRRD(s390_irgen_RLLG, ovl.fmt.RSY.r1,
12817 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12818 ovl.fmt.RSY.dl2,
12819 ovl.fmt.RSY.dh2); goto ok;
12820 case 0xeb000000001dULL: s390_format_RSY_RRRD(s390_irgen_RLL, ovl.fmt.RSY.r1,
12821 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12822 ovl.fmt.RSY.dl2,
12823 ovl.fmt.RSY.dh2); goto ok;
12824 case 0xeb0000000020ULL: s390_format_RSY_RURD(s390_irgen_CLMH, ovl.fmt.RSY.r1,
12825 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12826 ovl.fmt.RSY.dl2,
12827 ovl.fmt.RSY.dh2); goto ok;
12828 case 0xeb0000000021ULL: s390_format_RSY_RURD(s390_irgen_CLMY, ovl.fmt.RSY.r1,
12829 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12830 ovl.fmt.RSY.dl2,
12831 ovl.fmt.RSY.dh2); goto ok;
12832 case 0xeb0000000024ULL: s390_format_RSY_RRRD(s390_irgen_STMG, ovl.fmt.RSY.r1,
12833 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12834 ovl.fmt.RSY.dl2,
12835 ovl.fmt.RSY.dh2); goto ok;
12836 case 0xeb0000000025ULL: /* STCTG */ goto unimplemented;
12837 case 0xeb0000000026ULL: s390_format_RSY_RRRD(s390_irgen_STMH, ovl.fmt.RSY.r1,
12838 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12839 ovl.fmt.RSY.dl2,
12840 ovl.fmt.RSY.dh2); goto ok;
12841 case 0xeb000000002cULL: s390_format_RSY_RURD(s390_irgen_STCMH,
12842 ovl.fmt.RSY.r1, ovl.fmt.RSY.r3,
12843 ovl.fmt.RSY.b2, ovl.fmt.RSY.dl2,
12844 ovl.fmt.RSY.dh2); goto ok;
12845 case 0xeb000000002dULL: s390_format_RSY_RURD(s390_irgen_STCMY,
12846 ovl.fmt.RSY.r1, ovl.fmt.RSY.r3,
12847 ovl.fmt.RSY.b2, ovl.fmt.RSY.dl2,
12848 ovl.fmt.RSY.dh2); goto ok;
12849 case 0xeb000000002fULL: /* LCTLG */ goto unimplemented;
12850 case 0xeb0000000030ULL: s390_format_RSY_RRRD(s390_irgen_CSG, ovl.fmt.RSY.r1,
12851 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12852 ovl.fmt.RSY.dl2,
12853 ovl.fmt.RSY.dh2); goto ok;
12854 case 0xeb0000000031ULL: /* CDSY */ goto unimplemented;
12855 case 0xeb000000003eULL: /* CDSG */ goto unimplemented;
12856 case 0xeb0000000044ULL: s390_format_RSY_RRRD(s390_irgen_BXHG, ovl.fmt.RSY.r1,
12857 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12858 ovl.fmt.RSY.dl2,
12859 ovl.fmt.RSY.dh2); goto ok;
12860 case 0xeb0000000045ULL: s390_format_RSY_RRRD(s390_irgen_BXLEG,
12861 ovl.fmt.RSY.r1, ovl.fmt.RSY.r3,
12862 ovl.fmt.RSY.b2, ovl.fmt.RSY.dl2,
12863 ovl.fmt.RSY.dh2); goto ok;
12864 case 0xeb000000004cULL: /* ECAG */ goto unimplemented;
12865 case 0xeb0000000051ULL: s390_format_SIY_URD(s390_irgen_TMY, ovl.fmt.SIY.i2,
12866 ovl.fmt.SIY.b1, ovl.fmt.SIY.dl1,
12867 ovl.fmt.SIY.dh1); goto ok;
12868 case 0xeb0000000052ULL: s390_format_SIY_URD(s390_irgen_MVIY, ovl.fmt.SIY.i2,
12869 ovl.fmt.SIY.b1, ovl.fmt.SIY.dl1,
12870 ovl.fmt.SIY.dh1); goto ok;
12871 case 0xeb0000000054ULL: s390_format_SIY_URD(s390_irgen_NIY, ovl.fmt.SIY.i2,
12872 ovl.fmt.SIY.b1, ovl.fmt.SIY.dl1,
12873 ovl.fmt.SIY.dh1); goto ok;
12874 case 0xeb0000000055ULL: s390_format_SIY_URD(s390_irgen_CLIY, ovl.fmt.SIY.i2,
12875 ovl.fmt.SIY.b1, ovl.fmt.SIY.dl1,
12876 ovl.fmt.SIY.dh1); goto ok;
12877 case 0xeb0000000056ULL: s390_format_SIY_URD(s390_irgen_OIY, ovl.fmt.SIY.i2,
12878 ovl.fmt.SIY.b1, ovl.fmt.SIY.dl1,
12879 ovl.fmt.SIY.dh1); goto ok;
12880 case 0xeb0000000057ULL: s390_format_SIY_URD(s390_irgen_XIY, ovl.fmt.SIY.i2,
12881 ovl.fmt.SIY.b1, ovl.fmt.SIY.dl1,
12882 ovl.fmt.SIY.dh1); goto ok;
12883 case 0xeb000000006aULL: s390_format_SIY_IRD(s390_irgen_ASI, ovl.fmt.SIY.i2,
12884 ovl.fmt.SIY.b1, ovl.fmt.SIY.dl1,
12885 ovl.fmt.SIY.dh1); goto ok;
12886 case 0xeb000000006eULL: s390_format_SIY_IRD(s390_irgen_ALSI, ovl.fmt.SIY.i2,
12887 ovl.fmt.SIY.b1, ovl.fmt.SIY.dl1,
12888 ovl.fmt.SIY.dh1); goto ok;
12889 case 0xeb000000007aULL: s390_format_SIY_IRD(s390_irgen_AGSI, ovl.fmt.SIY.i2,
12890 ovl.fmt.SIY.b1, ovl.fmt.SIY.dl1,
12891 ovl.fmt.SIY.dh1); goto ok;
12892 case 0xeb000000007eULL: s390_format_SIY_IRD(s390_irgen_ALGSI, ovl.fmt.SIY.i2,
12893 ovl.fmt.SIY.b1, ovl.fmt.SIY.dl1,
12894 ovl.fmt.SIY.dh1); goto ok;
12895 case 0xeb0000000080ULL: s390_format_RSY_RURD(s390_irgen_ICMH, ovl.fmt.RSY.r1,
12896 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12897 ovl.fmt.RSY.dl2,
12898 ovl.fmt.RSY.dh2); goto ok;
12899 case 0xeb0000000081ULL: s390_format_RSY_RURD(s390_irgen_ICMY, ovl.fmt.RSY.r1,
12900 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12901 ovl.fmt.RSY.dl2,
12902 ovl.fmt.RSY.dh2); goto ok;
12903 case 0xeb000000008eULL: /* MVCLU */ goto unimplemented;
12904 case 0xeb000000008fULL: /* CLCLU */ goto unimplemented;
12905 case 0xeb0000000090ULL: s390_format_RSY_RRRD(s390_irgen_STMY, ovl.fmt.RSY.r1,
12906 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12907 ovl.fmt.RSY.dl2,
12908 ovl.fmt.RSY.dh2); goto ok;
12909 case 0xeb0000000096ULL: s390_format_RSY_RRRD(s390_irgen_LMH, ovl.fmt.RSY.r1,
12910 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12911 ovl.fmt.RSY.dl2,
12912 ovl.fmt.RSY.dh2); goto ok;
12913 case 0xeb0000000098ULL: s390_format_RSY_RRRD(s390_irgen_LMY, ovl.fmt.RSY.r1,
12914 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12915 ovl.fmt.RSY.dl2,
12916 ovl.fmt.RSY.dh2); goto ok;
12917 case 0xeb000000009aULL: s390_format_RSY_AARD(s390_irgen_LAMY, ovl.fmt.RSY.r1,
12918 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12919 ovl.fmt.RSY.dl2,
12920 ovl.fmt.RSY.dh2); goto ok;
12921 case 0xeb000000009bULL: s390_format_RSY_AARD(s390_irgen_STAMY,
12922 ovl.fmt.RSY.r1, ovl.fmt.RSY.r3,
12923 ovl.fmt.RSY.b2, ovl.fmt.RSY.dl2,
12924 ovl.fmt.RSY.dh2); goto ok;
12925 case 0xeb00000000c0ULL: /* TP */ goto unimplemented;
12926 case 0xeb00000000dcULL: s390_format_RSY_RRRD(s390_irgen_SRAK, ovl.fmt.RSY.r1,
12927 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12928 ovl.fmt.RSY.dl2,
12929 ovl.fmt.RSY.dh2); goto ok;
12930 case 0xeb00000000ddULL: s390_format_RSY_RRRD(s390_irgen_SLAK, ovl.fmt.RSY.r1,
12931 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12932 ovl.fmt.RSY.dl2,
12933 ovl.fmt.RSY.dh2); goto ok;
12934 case 0xeb00000000deULL: s390_format_RSY_RRRD(s390_irgen_SRLK, ovl.fmt.RSY.r1,
12935 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12936 ovl.fmt.RSY.dl2,
12937 ovl.fmt.RSY.dh2); goto ok;
12938 case 0xeb00000000dfULL: s390_format_RSY_RRRD(s390_irgen_SLLK, ovl.fmt.RSY.r1,
12939 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12940 ovl.fmt.RSY.dl2,
12941 ovl.fmt.RSY.dh2); goto ok;
sewardjd7bde722011-04-05 13:19:33 +000012942 case 0xeb00000000e2ULL: s390_format_RSY_RDRM(s390_irgen_LOCG, ovl.fmt.RSY.r1,
12943 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12944 ovl.fmt.RSY.dl2,
12945 ovl.fmt.RSY.dh2,
12946 S390_XMNM_LOCG); goto ok;
12947 case 0xeb00000000e3ULL: s390_format_RSY_RDRM(s390_irgen_STOCG,
12948 ovl.fmt.RSY.r1, ovl.fmt.RSY.r3,
12949 ovl.fmt.RSY.b2, ovl.fmt.RSY.dl2,
12950 ovl.fmt.RSY.dh2,
12951 S390_XMNM_STOCG); goto ok;
sewardj2019a972011-03-07 16:04:07 +000012952 case 0xeb00000000e4ULL: s390_format_RSY_RRRD(s390_irgen_LANG, ovl.fmt.RSY.r1,
12953 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12954 ovl.fmt.RSY.dl2,
12955 ovl.fmt.RSY.dh2); goto ok;
12956 case 0xeb00000000e6ULL: s390_format_RSY_RRRD(s390_irgen_LAOG, ovl.fmt.RSY.r1,
12957 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12958 ovl.fmt.RSY.dl2,
12959 ovl.fmt.RSY.dh2); goto ok;
12960 case 0xeb00000000e7ULL: s390_format_RSY_RRRD(s390_irgen_LAXG, ovl.fmt.RSY.r1,
12961 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12962 ovl.fmt.RSY.dl2,
12963 ovl.fmt.RSY.dh2); goto ok;
12964 case 0xeb00000000e8ULL: s390_format_RSY_RRRD(s390_irgen_LAAG, ovl.fmt.RSY.r1,
12965 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12966 ovl.fmt.RSY.dl2,
12967 ovl.fmt.RSY.dh2); goto ok;
12968 case 0xeb00000000eaULL: s390_format_RSY_RRRD(s390_irgen_LAALG,
12969 ovl.fmt.RSY.r1, ovl.fmt.RSY.r3,
12970 ovl.fmt.RSY.b2, ovl.fmt.RSY.dl2,
12971 ovl.fmt.RSY.dh2); goto ok;
sewardjd7bde722011-04-05 13:19:33 +000012972 case 0xeb00000000f2ULL: s390_format_RSY_RDRM(s390_irgen_LOC, ovl.fmt.RSY.r1,
12973 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12974 ovl.fmt.RSY.dl2,
12975 ovl.fmt.RSY.dh2, S390_XMNM_LOC);
12976 goto ok;
12977 case 0xeb00000000f3ULL: s390_format_RSY_RDRM(s390_irgen_STOC, ovl.fmt.RSY.r1,
12978 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12979 ovl.fmt.RSY.dl2,
12980 ovl.fmt.RSY.dh2,
12981 S390_XMNM_STOC); goto ok;
sewardj2019a972011-03-07 16:04:07 +000012982 case 0xeb00000000f4ULL: s390_format_RSY_RRRD(s390_irgen_LAN, ovl.fmt.RSY.r1,
12983 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12984 ovl.fmt.RSY.dl2,
12985 ovl.fmt.RSY.dh2); goto ok;
12986 case 0xeb00000000f6ULL: s390_format_RSY_RRRD(s390_irgen_LAO, ovl.fmt.RSY.r1,
12987 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12988 ovl.fmt.RSY.dl2,
12989 ovl.fmt.RSY.dh2); goto ok;
12990 case 0xeb00000000f7ULL: s390_format_RSY_RRRD(s390_irgen_LAX, ovl.fmt.RSY.r1,
12991 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12992 ovl.fmt.RSY.dl2,
12993 ovl.fmt.RSY.dh2); goto ok;
12994 case 0xeb00000000f8ULL: s390_format_RSY_RRRD(s390_irgen_LAA, ovl.fmt.RSY.r1,
12995 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12996 ovl.fmt.RSY.dl2,
12997 ovl.fmt.RSY.dh2); goto ok;
12998 case 0xeb00000000faULL: s390_format_RSY_RRRD(s390_irgen_LAAL, ovl.fmt.RSY.r1,
12999 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
13000 ovl.fmt.RSY.dl2,
13001 ovl.fmt.RSY.dh2); goto ok;
13002 case 0xec0000000044ULL: s390_format_RIE_RRP(s390_irgen_BRXHG, ovl.fmt.RIE.r1,
13003 ovl.fmt.RIE.r3, ovl.fmt.RIE.i2);
13004 goto ok;
13005 case 0xec0000000045ULL: s390_format_RIE_RRP(s390_irgen_BRXLG, ovl.fmt.RIE.r1,
13006 ovl.fmt.RIE.r3, ovl.fmt.RIE.i2);
13007 goto ok;
13008 case 0xec0000000051ULL: /* RISBLG */ goto unimplemented;
13009 case 0xec0000000054ULL: s390_format_RIE_RRUUU(s390_irgen_RNSBG,
13010 ovl.fmt.RIE_RRUUU.r1,
13011 ovl.fmt.RIE_RRUUU.r2,
13012 ovl.fmt.RIE_RRUUU.i3,
13013 ovl.fmt.RIE_RRUUU.i4,
13014 ovl.fmt.RIE_RRUUU.i5);
13015 goto ok;
13016 case 0xec0000000055ULL: s390_format_RIE_RRUUU(s390_irgen_RISBG,
13017 ovl.fmt.RIE_RRUUU.r1,
13018 ovl.fmt.RIE_RRUUU.r2,
13019 ovl.fmt.RIE_RRUUU.i3,
13020 ovl.fmt.RIE_RRUUU.i4,
13021 ovl.fmt.RIE_RRUUU.i5);
13022 goto ok;
13023 case 0xec0000000056ULL: s390_format_RIE_RRUUU(s390_irgen_ROSBG,
13024 ovl.fmt.RIE_RRUUU.r1,
13025 ovl.fmt.RIE_RRUUU.r2,
13026 ovl.fmt.RIE_RRUUU.i3,
13027 ovl.fmt.RIE_RRUUU.i4,
13028 ovl.fmt.RIE_RRUUU.i5);
13029 goto ok;
13030 case 0xec0000000057ULL: s390_format_RIE_RRUUU(s390_irgen_RXSBG,
13031 ovl.fmt.RIE_RRUUU.r1,
13032 ovl.fmt.RIE_RRUUU.r2,
13033 ovl.fmt.RIE_RRUUU.i3,
13034 ovl.fmt.RIE_RRUUU.i4,
13035 ovl.fmt.RIE_RRUUU.i5);
13036 goto ok;
13037 case 0xec000000005dULL: /* RISBHG */ goto unimplemented;
13038 case 0xec0000000064ULL: s390_format_RIE_RRPU(s390_irgen_CGRJ,
13039 ovl.fmt.RIE_RRPU.r1,
13040 ovl.fmt.RIE_RRPU.r2,
13041 ovl.fmt.RIE_RRPU.i4,
13042 ovl.fmt.RIE_RRPU.m3); goto ok;
13043 case 0xec0000000065ULL: s390_format_RIE_RRPU(s390_irgen_CLGRJ,
13044 ovl.fmt.RIE_RRPU.r1,
13045 ovl.fmt.RIE_RRPU.r2,
13046 ovl.fmt.RIE_RRPU.i4,
13047 ovl.fmt.RIE_RRPU.m3); goto ok;
13048 case 0xec0000000070ULL: /* CGIT */ goto unimplemented;
13049 case 0xec0000000071ULL: /* CLGIT */ goto unimplemented;
13050 case 0xec0000000072ULL: /* CIT */ goto unimplemented;
13051 case 0xec0000000073ULL: /* CLFIT */ goto unimplemented;
13052 case 0xec0000000076ULL: s390_format_RIE_RRPU(s390_irgen_CRJ,
13053 ovl.fmt.RIE_RRPU.r1,
13054 ovl.fmt.RIE_RRPU.r2,
13055 ovl.fmt.RIE_RRPU.i4,
13056 ovl.fmt.RIE_RRPU.m3); goto ok;
13057 case 0xec0000000077ULL: s390_format_RIE_RRPU(s390_irgen_CLRJ,
13058 ovl.fmt.RIE_RRPU.r1,
13059 ovl.fmt.RIE_RRPU.r2,
13060 ovl.fmt.RIE_RRPU.i4,
13061 ovl.fmt.RIE_RRPU.m3); goto ok;
13062 case 0xec000000007cULL: s390_format_RIE_RUPI(s390_irgen_CGIJ,
13063 ovl.fmt.RIEv3.r1,
13064 ovl.fmt.RIEv3.m3,
13065 ovl.fmt.RIEv3.i4,
13066 ovl.fmt.RIEv3.i2); goto ok;
13067 case 0xec000000007dULL: s390_format_RIE_RUPU(s390_irgen_CLGIJ,
13068 ovl.fmt.RIEv3.r1,
13069 ovl.fmt.RIEv3.m3,
13070 ovl.fmt.RIEv3.i4,
13071 ovl.fmt.RIEv3.i2); goto ok;
13072 case 0xec000000007eULL: s390_format_RIE_RUPI(s390_irgen_CIJ,
13073 ovl.fmt.RIEv3.r1,
13074 ovl.fmt.RIEv3.m3,
13075 ovl.fmt.RIEv3.i4,
13076 ovl.fmt.RIEv3.i2); goto ok;
13077 case 0xec000000007fULL: s390_format_RIE_RUPU(s390_irgen_CLIJ,
13078 ovl.fmt.RIEv3.r1,
13079 ovl.fmt.RIEv3.m3,
13080 ovl.fmt.RIEv3.i4,
13081 ovl.fmt.RIEv3.i2); goto ok;
13082 case 0xec00000000d8ULL: s390_format_RIE_RRI0(s390_irgen_AHIK, ovl.fmt.RIE.r1,
13083 ovl.fmt.RIE.r3, ovl.fmt.RIE.i2);
13084 goto ok;
13085 case 0xec00000000d9ULL: s390_format_RIE_RRI0(s390_irgen_AGHIK,
13086 ovl.fmt.RIE.r1, ovl.fmt.RIE.r3,
13087 ovl.fmt.RIE.i2); goto ok;
13088 case 0xec00000000daULL: s390_format_RIE_RRI0(s390_irgen_ALHSIK,
13089 ovl.fmt.RIE.r1, ovl.fmt.RIE.r3,
13090 ovl.fmt.RIE.i2); goto ok;
13091 case 0xec00000000dbULL: s390_format_RIE_RRI0(s390_irgen_ALGHSIK,
13092 ovl.fmt.RIE.r1, ovl.fmt.RIE.r3,
13093 ovl.fmt.RIE.i2); goto ok;
13094 case 0xec00000000e4ULL: s390_format_RRS(s390_irgen_CGRB, ovl.fmt.RRS.r1,
13095 ovl.fmt.RRS.r2, ovl.fmt.RRS.b4,
13096 ovl.fmt.RRS.d4, ovl.fmt.RRS.m3);
13097 goto ok;
13098 case 0xec00000000e5ULL: s390_format_RRS(s390_irgen_CLGRB, ovl.fmt.RRS.r1,
13099 ovl.fmt.RRS.r2, ovl.fmt.RRS.b4,
13100 ovl.fmt.RRS.d4, ovl.fmt.RRS.m3);
13101 goto ok;
13102 case 0xec00000000f6ULL: s390_format_RRS(s390_irgen_CRB, ovl.fmt.RRS.r1,
13103 ovl.fmt.RRS.r2, ovl.fmt.RRS.b4,
13104 ovl.fmt.RRS.d4, ovl.fmt.RRS.m3);
13105 goto ok;
13106 case 0xec00000000f7ULL: s390_format_RRS(s390_irgen_CLRB, ovl.fmt.RRS.r1,
13107 ovl.fmt.RRS.r2, ovl.fmt.RRS.b4,
13108 ovl.fmt.RRS.d4, ovl.fmt.RRS.m3);
13109 goto ok;
13110 case 0xec00000000fcULL: s390_format_RIS_RURDI(s390_irgen_CGIB,
13111 ovl.fmt.RIS.r1, ovl.fmt.RIS.m3,
13112 ovl.fmt.RIS.b4, ovl.fmt.RIS.d4,
13113 ovl.fmt.RIS.i2); goto ok;
13114 case 0xec00000000fdULL: s390_format_RIS_RURDU(s390_irgen_CLGIB,
13115 ovl.fmt.RIS.r1, ovl.fmt.RIS.m3,
13116 ovl.fmt.RIS.b4, ovl.fmt.RIS.d4,
13117 ovl.fmt.RIS.i2); goto ok;
13118 case 0xec00000000feULL: s390_format_RIS_RURDI(s390_irgen_CIB, ovl.fmt.RIS.r1,
13119 ovl.fmt.RIS.m3, ovl.fmt.RIS.b4,
13120 ovl.fmt.RIS.d4,
13121 ovl.fmt.RIS.i2); goto ok;
13122 case 0xec00000000ffULL: s390_format_RIS_RURDU(s390_irgen_CLIB,
13123 ovl.fmt.RIS.r1, ovl.fmt.RIS.m3,
13124 ovl.fmt.RIS.b4, ovl.fmt.RIS.d4,
13125 ovl.fmt.RIS.i2); goto ok;
13126 case 0xed0000000004ULL: s390_format_RXE_FRRD(s390_irgen_LDEB, ovl.fmt.RXE.r1,
13127 ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
13128 ovl.fmt.RXE.d2); goto ok;
13129 case 0xed0000000005ULL: s390_format_RXE_FRRD(s390_irgen_LXDB, ovl.fmt.RXE.r1,
13130 ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
13131 ovl.fmt.RXE.d2); goto ok;
13132 case 0xed0000000006ULL: s390_format_RXE_FRRD(s390_irgen_LXEB, ovl.fmt.RXE.r1,
13133 ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
13134 ovl.fmt.RXE.d2); goto ok;
13135 case 0xed0000000007ULL: /* MXDB */ goto unimplemented;
13136 case 0xed0000000008ULL: /* KEB */ goto unimplemented;
13137 case 0xed0000000009ULL: s390_format_RXE_FRRD(s390_irgen_CEB, ovl.fmt.RXE.r1,
13138 ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
13139 ovl.fmt.RXE.d2); goto ok;
13140 case 0xed000000000aULL: s390_format_RXE_FRRD(s390_irgen_AEB, ovl.fmt.RXE.r1,
13141 ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
13142 ovl.fmt.RXE.d2); goto ok;
13143 case 0xed000000000bULL: s390_format_RXE_FRRD(s390_irgen_SEB, ovl.fmt.RXE.r1,
13144 ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
13145 ovl.fmt.RXE.d2); goto ok;
13146 case 0xed000000000cULL: /* MDEB */ goto unimplemented;
13147 case 0xed000000000dULL: s390_format_RXE_FRRD(s390_irgen_DEB, ovl.fmt.RXE.r1,
13148 ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
13149 ovl.fmt.RXE.d2); goto ok;
13150 case 0xed000000000eULL: s390_format_RXF_FRRDF(s390_irgen_MAEB,
13151 ovl.fmt.RXF.r3, ovl.fmt.RXF.x2,
13152 ovl.fmt.RXF.b2, ovl.fmt.RXF.d2,
13153 ovl.fmt.RXF.r1); goto ok;
13154 case 0xed000000000fULL: s390_format_RXF_FRRDF(s390_irgen_MSEB,
13155 ovl.fmt.RXF.r3, ovl.fmt.RXF.x2,
13156 ovl.fmt.RXF.b2, ovl.fmt.RXF.d2,
13157 ovl.fmt.RXF.r1); goto ok;
13158 case 0xed0000000010ULL: s390_format_RXE_FRRD(s390_irgen_TCEB, ovl.fmt.RXE.r1,
13159 ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
13160 ovl.fmt.RXE.d2); goto ok;
13161 case 0xed0000000011ULL: s390_format_RXE_FRRD(s390_irgen_TCDB, ovl.fmt.RXE.r1,
13162 ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
13163 ovl.fmt.RXE.d2); goto ok;
13164 case 0xed0000000012ULL: s390_format_RXE_FRRD(s390_irgen_TCXB, ovl.fmt.RXE.r1,
13165 ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
13166 ovl.fmt.RXE.d2); goto ok;
13167 case 0xed0000000014ULL: s390_format_RXE_FRRD(s390_irgen_SQEB, ovl.fmt.RXE.r1,
13168 ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
13169 ovl.fmt.RXE.d2); goto ok;
13170 case 0xed0000000015ULL: s390_format_RXE_FRRD(s390_irgen_SQDB, ovl.fmt.RXE.r1,
13171 ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
13172 ovl.fmt.RXE.d2); goto ok;
13173 case 0xed0000000017ULL: s390_format_RXE_FRRD(s390_irgen_MEEB, ovl.fmt.RXE.r1,
13174 ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
13175 ovl.fmt.RXE.d2); goto ok;
13176 case 0xed0000000018ULL: /* KDB */ goto unimplemented;
13177 case 0xed0000000019ULL: s390_format_RXE_FRRD(s390_irgen_CDB, ovl.fmt.RXE.r1,
13178 ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
13179 ovl.fmt.RXE.d2); goto ok;
13180 case 0xed000000001aULL: s390_format_RXE_FRRD(s390_irgen_ADB, ovl.fmt.RXE.r1,
13181 ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
13182 ovl.fmt.RXE.d2); goto ok;
13183 case 0xed000000001bULL: s390_format_RXE_FRRD(s390_irgen_SDB, ovl.fmt.RXE.r1,
13184 ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
13185 ovl.fmt.RXE.d2); goto ok;
13186 case 0xed000000001cULL: s390_format_RXE_FRRD(s390_irgen_MDB, ovl.fmt.RXE.r1,
13187 ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
13188 ovl.fmt.RXE.d2); goto ok;
13189 case 0xed000000001dULL: s390_format_RXE_FRRD(s390_irgen_DDB, ovl.fmt.RXE.r1,
13190 ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
13191 ovl.fmt.RXE.d2); goto ok;
13192 case 0xed000000001eULL: s390_format_RXF_FRRDF(s390_irgen_MADB,
13193 ovl.fmt.RXF.r3, ovl.fmt.RXF.x2,
13194 ovl.fmt.RXF.b2, ovl.fmt.RXF.d2,
13195 ovl.fmt.RXF.r1); goto ok;
13196 case 0xed000000001fULL: s390_format_RXF_FRRDF(s390_irgen_MSDB,
13197 ovl.fmt.RXF.r3, ovl.fmt.RXF.x2,
13198 ovl.fmt.RXF.b2, ovl.fmt.RXF.d2,
13199 ovl.fmt.RXF.r1); goto ok;
13200 case 0xed0000000024ULL: /* LDE */ goto unimplemented;
13201 case 0xed0000000025ULL: /* LXD */ goto unimplemented;
13202 case 0xed0000000026ULL: /* LXE */ goto unimplemented;
13203 case 0xed000000002eULL: /* MAE */ goto unimplemented;
13204 case 0xed000000002fULL: /* MSE */ goto unimplemented;
13205 case 0xed0000000034ULL: /* SQE */ goto unimplemented;
13206 case 0xed0000000035ULL: /* SQD */ goto unimplemented;
13207 case 0xed0000000037ULL: /* MEE */ goto unimplemented;
13208 case 0xed0000000038ULL: /* MAYL */ goto unimplemented;
13209 case 0xed0000000039ULL: /* MYL */ goto unimplemented;
13210 case 0xed000000003aULL: /* MAY */ goto unimplemented;
13211 case 0xed000000003bULL: /* MY */ goto unimplemented;
13212 case 0xed000000003cULL: /* MAYH */ goto unimplemented;
13213 case 0xed000000003dULL: /* MYH */ goto unimplemented;
13214 case 0xed000000003eULL: /* MAD */ goto unimplemented;
13215 case 0xed000000003fULL: /* MSD */ goto unimplemented;
13216 case 0xed0000000040ULL: /* SLDT */ goto unimplemented;
13217 case 0xed0000000041ULL: /* SRDT */ goto unimplemented;
13218 case 0xed0000000048ULL: /* SLXT */ goto unimplemented;
13219 case 0xed0000000049ULL: /* SRXT */ goto unimplemented;
13220 case 0xed0000000050ULL: /* TDCET */ goto unimplemented;
13221 case 0xed0000000051ULL: /* TDGET */ goto unimplemented;
13222 case 0xed0000000054ULL: /* TDCDT */ goto unimplemented;
13223 case 0xed0000000055ULL: /* TDGDT */ goto unimplemented;
13224 case 0xed0000000058ULL: /* TDCXT */ goto unimplemented;
13225 case 0xed0000000059ULL: /* TDGXT */ goto unimplemented;
13226 case 0xed0000000064ULL: s390_format_RXY_FRRD(s390_irgen_LEY, ovl.fmt.RXY.r1,
13227 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
13228 ovl.fmt.RXY.dl2,
13229 ovl.fmt.RXY.dh2); goto ok;
13230 case 0xed0000000065ULL: s390_format_RXY_FRRD(s390_irgen_LDY, ovl.fmt.RXY.r1,
13231 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
13232 ovl.fmt.RXY.dl2,
13233 ovl.fmt.RXY.dh2); goto ok;
13234 case 0xed0000000066ULL: s390_format_RXY_FRRD(s390_irgen_STEY, ovl.fmt.RXY.r1,
13235 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
13236 ovl.fmt.RXY.dl2,
13237 ovl.fmt.RXY.dh2); goto ok;
13238 case 0xed0000000067ULL: s390_format_RXY_FRRD(s390_irgen_STDY, ovl.fmt.RXY.r1,
13239 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
13240 ovl.fmt.RXY.dl2,
13241 ovl.fmt.RXY.dh2); goto ok;
13242 }
13243
13244 switch (((ovl.value >> 16) & 0xff0f00000000ULL) >> 32) {
13245 case 0xc000ULL: s390_format_RIL_RP(s390_irgen_LARL, ovl.fmt.RIL.r1,
13246 ovl.fmt.RIL.i2); goto ok;
13247 case 0xc001ULL: s390_format_RIL_RI(s390_irgen_LGFI, ovl.fmt.RIL.r1,
13248 ovl.fmt.RIL.i2); goto ok;
13249 case 0xc004ULL: s390_format_RIL(s390_irgen_BRCL, ovl.fmt.RIL.r1,
13250 ovl.fmt.RIL.i2); goto ok;
13251 case 0xc005ULL: s390_format_RIL_RP(s390_irgen_BRASL, ovl.fmt.RIL.r1,
13252 ovl.fmt.RIL.i2); goto ok;
13253 case 0xc006ULL: s390_format_RIL_RU(s390_irgen_XIHF, ovl.fmt.RIL.r1,
13254 ovl.fmt.RIL.i2); goto ok;
13255 case 0xc007ULL: s390_format_RIL_RU(s390_irgen_XILF, ovl.fmt.RIL.r1,
13256 ovl.fmt.RIL.i2); goto ok;
13257 case 0xc008ULL: s390_format_RIL_RU(s390_irgen_IIHF, ovl.fmt.RIL.r1,
13258 ovl.fmt.RIL.i2); goto ok;
13259 case 0xc009ULL: s390_format_RIL_RU(s390_irgen_IILF, ovl.fmt.RIL.r1,
13260 ovl.fmt.RIL.i2); goto ok;
13261 case 0xc00aULL: s390_format_RIL_RU(s390_irgen_NIHF, ovl.fmt.RIL.r1,
13262 ovl.fmt.RIL.i2); goto ok;
13263 case 0xc00bULL: s390_format_RIL_RU(s390_irgen_NILF, ovl.fmt.RIL.r1,
13264 ovl.fmt.RIL.i2); goto ok;
13265 case 0xc00cULL: s390_format_RIL_RU(s390_irgen_OIHF, ovl.fmt.RIL.r1,
13266 ovl.fmt.RIL.i2); goto ok;
13267 case 0xc00dULL: s390_format_RIL_RU(s390_irgen_OILF, ovl.fmt.RIL.r1,
13268 ovl.fmt.RIL.i2); goto ok;
13269 case 0xc00eULL: s390_format_RIL_RU(s390_irgen_LLIHF, ovl.fmt.RIL.r1,
13270 ovl.fmt.RIL.i2); goto ok;
13271 case 0xc00fULL: s390_format_RIL_RU(s390_irgen_LLILF, ovl.fmt.RIL.r1,
13272 ovl.fmt.RIL.i2); goto ok;
13273 case 0xc200ULL: s390_format_RIL_RI(s390_irgen_MSGFI, ovl.fmt.RIL.r1,
13274 ovl.fmt.RIL.i2); goto ok;
13275 case 0xc201ULL: s390_format_RIL_RI(s390_irgen_MSFI, ovl.fmt.RIL.r1,
13276 ovl.fmt.RIL.i2); goto ok;
13277 case 0xc204ULL: s390_format_RIL_RU(s390_irgen_SLGFI, ovl.fmt.RIL.r1,
13278 ovl.fmt.RIL.i2); goto ok;
13279 case 0xc205ULL: s390_format_RIL_RU(s390_irgen_SLFI, ovl.fmt.RIL.r1,
13280 ovl.fmt.RIL.i2); goto ok;
13281 case 0xc208ULL: s390_format_RIL_RI(s390_irgen_AGFI, ovl.fmt.RIL.r1,
13282 ovl.fmt.RIL.i2); goto ok;
13283 case 0xc209ULL: s390_format_RIL_RI(s390_irgen_AFI, ovl.fmt.RIL.r1,
13284 ovl.fmt.RIL.i2); goto ok;
13285 case 0xc20aULL: s390_format_RIL_RU(s390_irgen_ALGFI, ovl.fmt.RIL.r1,
13286 ovl.fmt.RIL.i2); goto ok;
13287 case 0xc20bULL: s390_format_RIL_RU(s390_irgen_ALFI, ovl.fmt.RIL.r1,
13288 ovl.fmt.RIL.i2); goto ok;
13289 case 0xc20cULL: s390_format_RIL_RI(s390_irgen_CGFI, ovl.fmt.RIL.r1,
13290 ovl.fmt.RIL.i2); goto ok;
13291 case 0xc20dULL: s390_format_RIL_RI(s390_irgen_CFI, ovl.fmt.RIL.r1,
13292 ovl.fmt.RIL.i2); goto ok;
13293 case 0xc20eULL: s390_format_RIL_RU(s390_irgen_CLGFI, ovl.fmt.RIL.r1,
13294 ovl.fmt.RIL.i2); goto ok;
13295 case 0xc20fULL: s390_format_RIL_RU(s390_irgen_CLFI, ovl.fmt.RIL.r1,
13296 ovl.fmt.RIL.i2); goto ok;
13297 case 0xc402ULL: s390_format_RIL_RP(s390_irgen_LLHRL, ovl.fmt.RIL.r1,
13298 ovl.fmt.RIL.i2); goto ok;
13299 case 0xc404ULL: s390_format_RIL_RP(s390_irgen_LGHRL, ovl.fmt.RIL.r1,
13300 ovl.fmt.RIL.i2); goto ok;
13301 case 0xc405ULL: s390_format_RIL_RP(s390_irgen_LHRL, ovl.fmt.RIL.r1,
13302 ovl.fmt.RIL.i2); goto ok;
13303 case 0xc406ULL: s390_format_RIL_RP(s390_irgen_LLGHRL, ovl.fmt.RIL.r1,
13304 ovl.fmt.RIL.i2); goto ok;
13305 case 0xc407ULL: s390_format_RIL_RP(s390_irgen_STHRL, ovl.fmt.RIL.r1,
13306 ovl.fmt.RIL.i2); goto ok;
13307 case 0xc408ULL: s390_format_RIL_RP(s390_irgen_LGRL, ovl.fmt.RIL.r1,
13308 ovl.fmt.RIL.i2); goto ok;
13309 case 0xc40bULL: s390_format_RIL_RP(s390_irgen_STGRL, ovl.fmt.RIL.r1,
13310 ovl.fmt.RIL.i2); goto ok;
13311 case 0xc40cULL: s390_format_RIL_RP(s390_irgen_LGFRL, ovl.fmt.RIL.r1,
13312 ovl.fmt.RIL.i2); goto ok;
13313 case 0xc40dULL: s390_format_RIL_RP(s390_irgen_LRL, ovl.fmt.RIL.r1,
13314 ovl.fmt.RIL.i2); goto ok;
13315 case 0xc40eULL: s390_format_RIL_RP(s390_irgen_LLGFRL, ovl.fmt.RIL.r1,
13316 ovl.fmt.RIL.i2); goto ok;
13317 case 0xc40fULL: s390_format_RIL_RP(s390_irgen_STRL, ovl.fmt.RIL.r1,
13318 ovl.fmt.RIL.i2); goto ok;
13319 case 0xc600ULL: s390_format_RIL_RP(s390_irgen_EXRL, ovl.fmt.RIL.r1,
13320 ovl.fmt.RIL.i2); goto ok;
13321 case 0xc602ULL: s390_format_RIL_UP(s390_irgen_PFDRL, ovl.fmt.RIL.r1,
13322 ovl.fmt.RIL.i2); goto ok;
13323 case 0xc604ULL: s390_format_RIL_RP(s390_irgen_CGHRL, ovl.fmt.RIL.r1,
13324 ovl.fmt.RIL.i2); goto ok;
13325 case 0xc605ULL: s390_format_RIL_RP(s390_irgen_CHRL, ovl.fmt.RIL.r1,
13326 ovl.fmt.RIL.i2); goto ok;
13327 case 0xc606ULL: s390_format_RIL_RP(s390_irgen_CLGHRL, ovl.fmt.RIL.r1,
13328 ovl.fmt.RIL.i2); goto ok;
13329 case 0xc607ULL: s390_format_RIL_RP(s390_irgen_CLHRL, ovl.fmt.RIL.r1,
13330 ovl.fmt.RIL.i2); goto ok;
13331 case 0xc608ULL: s390_format_RIL_RP(s390_irgen_CGRL, ovl.fmt.RIL.r1,
13332 ovl.fmt.RIL.i2); goto ok;
13333 case 0xc60aULL: s390_format_RIL_RP(s390_irgen_CLGRL, ovl.fmt.RIL.r1,
13334 ovl.fmt.RIL.i2); goto ok;
13335 case 0xc60cULL: s390_format_RIL_RP(s390_irgen_CGFRL, ovl.fmt.RIL.r1,
13336 ovl.fmt.RIL.i2); goto ok;
13337 case 0xc60dULL: s390_format_RIL_RP(s390_irgen_CRL, ovl.fmt.RIL.r1,
13338 ovl.fmt.RIL.i2); goto ok;
13339 case 0xc60eULL: s390_format_RIL_RP(s390_irgen_CLGFRL, ovl.fmt.RIL.r1,
13340 ovl.fmt.RIL.i2); goto ok;
13341 case 0xc60fULL: s390_format_RIL_RP(s390_irgen_CLRL, ovl.fmt.RIL.r1,
13342 ovl.fmt.RIL.i2); goto ok;
13343 case 0xc800ULL: /* MVCOS */ goto unimplemented;
13344 case 0xc801ULL: /* ECTG */ goto unimplemented;
13345 case 0xc802ULL: /* CSST */ goto unimplemented;
13346 case 0xc804ULL: /* LPD */ goto unimplemented;
13347 case 0xc805ULL: /* LPDG */ goto unimplemented;
13348 case 0xcc06ULL: /* BRCTH */ goto unimplemented;
13349 case 0xcc08ULL: s390_format_RIL_RI(s390_irgen_AIH, ovl.fmt.RIL.r1,
13350 ovl.fmt.RIL.i2); goto ok;
13351 case 0xcc0aULL: s390_format_RIL_RI(s390_irgen_ALSIH, ovl.fmt.RIL.r1,
13352 ovl.fmt.RIL.i2); goto ok;
13353 case 0xcc0bULL: s390_format_RIL_RI(s390_irgen_ALSIHN, ovl.fmt.RIL.r1,
13354 ovl.fmt.RIL.i2); goto ok;
13355 case 0xcc0dULL: s390_format_RIL_RI(s390_irgen_CIH, ovl.fmt.RIL.r1,
13356 ovl.fmt.RIL.i2); goto ok;
13357 case 0xcc0fULL: s390_format_RIL_RU(s390_irgen_CLIH, ovl.fmt.RIL.r1,
13358 ovl.fmt.RIL.i2); goto ok;
13359 }
13360
13361 switch (((ovl.value >> 16) & 0xff0000000000ULL) >> 40) {
13362 case 0xd0ULL: /* TRTR */ goto unimplemented;
13363 case 0xd1ULL: /* MVN */ goto unimplemented;
13364 case 0xd2ULL: s390_format_SS_L0RDRD(s390_irgen_MVC, ovl.fmt.SS.l,
13365 ovl.fmt.SS.b1, ovl.fmt.SS.d1,
13366 ovl.fmt.SS.b2, ovl.fmt.SS.d2); goto ok;
13367 case 0xd3ULL: /* MVZ */ goto unimplemented;
13368 case 0xd4ULL: s390_format_SS_L0RDRD(s390_irgen_NC, ovl.fmt.SS.l,
13369 ovl.fmt.SS.b1, ovl.fmt.SS.d1,
13370 ovl.fmt.SS.b2, ovl.fmt.SS.d2); goto ok;
13371 case 0xd5ULL: s390_format_SS_L0RDRD(s390_irgen_CLC, ovl.fmt.SS.l,
13372 ovl.fmt.SS.b1, ovl.fmt.SS.d1,
13373 ovl.fmt.SS.b2, ovl.fmt.SS.d2); goto ok;
13374 case 0xd6ULL: s390_format_SS_L0RDRD(s390_irgen_OC, ovl.fmt.SS.l,
13375 ovl.fmt.SS.b1, ovl.fmt.SS.d1,
13376 ovl.fmt.SS.b2, ovl.fmt.SS.d2); goto ok;
sewardjb63967e2011-03-24 08:50:04 +000013377 case 0xd7ULL:
13378 if (ovl.fmt.SS.b1 == ovl.fmt.SS.b2 && ovl.fmt.SS.d1 == ovl.fmt.SS.d2)
13379 s390_irgen_XC_sameloc(ovl.fmt.SS.l, ovl.fmt.SS.b1, ovl.fmt.SS.d1);
13380 else
13381 s390_format_SS_L0RDRD(s390_irgen_XC, ovl.fmt.SS.l,
13382 ovl.fmt.SS.b1, ovl.fmt.SS.d1,
13383 ovl.fmt.SS.b2, ovl.fmt.SS.d2);
13384 goto ok;
sewardj2019a972011-03-07 16:04:07 +000013385 case 0xd9ULL: /* MVCK */ goto unimplemented;
13386 case 0xdaULL: /* MVCP */ goto unimplemented;
13387 case 0xdbULL: /* MVCS */ goto unimplemented;
florian730448f2012-02-04 17:07:07 +000013388 case 0xdcULL: s390_format_SS_L0RDRD(s390_irgen_TR, ovl.fmt.SS.l,
13389 ovl.fmt.SS.b1, ovl.fmt.SS.d1,
13390 ovl.fmt.SS.b2, ovl.fmt.SS.d2); goto ok;
sewardj2019a972011-03-07 16:04:07 +000013391 case 0xddULL: /* TRT */ goto unimplemented;
13392 case 0xdeULL: /* ED */ goto unimplemented;
13393 case 0xdfULL: /* EDMK */ goto unimplemented;
13394 case 0xe1ULL: /* PKU */ goto unimplemented;
13395 case 0xe2ULL: /* UNPKU */ goto unimplemented;
13396 case 0xe8ULL: /* MVCIN */ goto unimplemented;
13397 case 0xe9ULL: /* PKA */ goto unimplemented;
13398 case 0xeaULL: /* UNPKA */ goto unimplemented;
13399 case 0xeeULL: /* PLO */ goto unimplemented;
13400 case 0xefULL: /* LMD */ goto unimplemented;
13401 case 0xf0ULL: /* SRP */ goto unimplemented;
13402 case 0xf1ULL: /* MVO */ goto unimplemented;
13403 case 0xf2ULL: /* PACK */ goto unimplemented;
13404 case 0xf3ULL: /* UNPK */ goto unimplemented;
13405 case 0xf8ULL: /* ZAP */ goto unimplemented;
13406 case 0xf9ULL: /* CP */ goto unimplemented;
13407 case 0xfaULL: /* AP */ goto unimplemented;
13408 case 0xfbULL: /* SP */ goto unimplemented;
13409 case 0xfcULL: /* MP */ goto unimplemented;
13410 case 0xfdULL: /* DP */ goto unimplemented;
13411 }
13412
13413 switch (((ovl.value >> 16) & 0xffff00000000ULL) >> 32) {
13414 case 0xe500ULL: /* LASP */ goto unimplemented;
13415 case 0xe501ULL: /* TPROT */ goto unimplemented;
13416 case 0xe502ULL: /* STRAG */ goto unimplemented;
13417 case 0xe50eULL: /* MVCSK */ goto unimplemented;
13418 case 0xe50fULL: /* MVCDK */ goto unimplemented;
13419 case 0xe544ULL: s390_format_SIL_RDI(s390_irgen_MVHHI, ovl.fmt.SIL.b1,
13420 ovl.fmt.SIL.d1, ovl.fmt.SIL.i2);
13421 goto ok;
13422 case 0xe548ULL: s390_format_SIL_RDI(s390_irgen_MVGHI, ovl.fmt.SIL.b1,
13423 ovl.fmt.SIL.d1, ovl.fmt.SIL.i2);
13424 goto ok;
13425 case 0xe54cULL: s390_format_SIL_RDI(s390_irgen_MVHI, ovl.fmt.SIL.b1,
13426 ovl.fmt.SIL.d1, ovl.fmt.SIL.i2);
13427 goto ok;
13428 case 0xe554ULL: s390_format_SIL_RDI(s390_irgen_CHHSI, ovl.fmt.SIL.b1,
13429 ovl.fmt.SIL.d1, ovl.fmt.SIL.i2);
13430 goto ok;
13431 case 0xe555ULL: s390_format_SIL_RDU(s390_irgen_CLHHSI, ovl.fmt.SIL.b1,
13432 ovl.fmt.SIL.d1, ovl.fmt.SIL.i2);
13433 goto ok;
13434 case 0xe558ULL: s390_format_SIL_RDI(s390_irgen_CGHSI, ovl.fmt.SIL.b1,
13435 ovl.fmt.SIL.d1, ovl.fmt.SIL.i2);
13436 goto ok;
13437 case 0xe559ULL: s390_format_SIL_RDU(s390_irgen_CLGHSI, ovl.fmt.SIL.b1,
13438 ovl.fmt.SIL.d1, ovl.fmt.SIL.i2);
13439 goto ok;
13440 case 0xe55cULL: s390_format_SIL_RDI(s390_irgen_CHSI, ovl.fmt.SIL.b1,
13441 ovl.fmt.SIL.d1, ovl.fmt.SIL.i2);
13442 goto ok;
13443 case 0xe55dULL: s390_format_SIL_RDU(s390_irgen_CLFHSI, ovl.fmt.SIL.b1,
13444 ovl.fmt.SIL.d1, ovl.fmt.SIL.i2);
13445 goto ok;
13446 }
13447
13448 return S390_DECODE_UNKNOWN_INSN;
13449
13450ok:
13451 return S390_DECODE_OK;
13452
13453unimplemented:
13454 return S390_DECODE_UNIMPLEMENTED_INSN;
13455}
13456
13457/* Handle "special" instructions. */
13458static s390_decode_t
13459s390_decode_special_and_irgen(UChar *bytes)
13460{
13461 s390_decode_t status = S390_DECODE_OK;
13462
13463 /* Got a "Special" instruction preamble. Which one is it? */
13464 if (bytes[0] == 0x18 && bytes[1] == 0x22 /* lr %r2, %r2 */) {
13465 s390_irgen_client_request();
13466 } else if (bytes[0] == 0x18 && bytes[1] == 0x33 /* lr %r3, %r3 */) {
13467 s390_irgen_guest_NRADDR();
13468 } else if (bytes[0] == 0x18 && bytes[1] == 0x44 /* lr %r4, %r4 */) {
13469 s390_irgen_call_noredir();
13470 } else {
13471 /* We don't know what it is. */
13472 return S390_DECODE_UNKNOWN_SPECIAL_INSN;
13473 }
13474
13475 dis_res->len = S390_SPECIAL_OP_PREAMBLE_SIZE + S390_SPECIAL_OP_SIZE;
13476
13477 return status;
13478}
13479
13480
13481/* Function returns # bytes that were decoded or 0 in case of failure */
florianb4df7682011-07-05 02:09:01 +000013482static UInt
sewardj2019a972011-03-07 16:04:07 +000013483s390_decode_and_irgen(UChar *bytes, UInt insn_length, DisResult *dres)
13484{
13485 s390_decode_t status;
13486
13487 dis_res = dres;
13488
13489 /* Spot the 8-byte preamble: 18ff lr r15,r15
13490 1811 lr r1,r1
13491 1822 lr r2,r2
13492 1833 lr r3,r3 */
13493 if (bytes[ 0] == 0x18 && bytes[ 1] == 0xff && bytes[ 2] == 0x18 &&
13494 bytes[ 3] == 0x11 && bytes[ 4] == 0x18 && bytes[ 5] == 0x22 &&
13495 bytes[ 6] == 0x18 && bytes[ 7] == 0x33) {
13496
13497 /* Handle special instruction that follows that preamble. */
13498 if (0) vex_printf("special function handling...\n");
florian2c8ed942011-08-01 22:07:51 +000013499
13500 insn_length = S390_SPECIAL_OP_PREAMBLE_SIZE + S390_SPECIAL_OP_SIZE;
13501 guest_IA_next_instr = guest_IA_curr_instr + insn_length;
13502
13503 status =
13504 s390_decode_special_and_irgen(bytes + S390_SPECIAL_OP_PREAMBLE_SIZE);
sewardj2019a972011-03-07 16:04:07 +000013505 } else {
13506 /* Handle normal instructions. */
13507 switch (insn_length) {
13508 case 2:
13509 status = s390_decode_2byte_and_irgen(bytes);
13510 break;
13511
13512 case 4:
13513 status = s390_decode_4byte_and_irgen(bytes);
13514 break;
13515
13516 case 6:
13517 status = s390_decode_6byte_and_irgen(bytes);
13518 break;
13519
13520 default:
13521 status = S390_DECODE_ERROR;
13522 break;
13523 }
13524 }
florian5fcbba22011-07-27 20:40:22 +000013525 /* If next instruction is execute, stop here */
florianed0b9532011-10-20 21:15:55 +000013526 if (irsb->next == NULL && dis_res->whatNext == Dis_Continue
13527 && bytes[insn_length] == 0x44) {
sewardj2019a972011-03-07 16:04:07 +000013528 irsb->next = IRExpr_Const(IRConst_U64(guest_IA_next_instr));
13529 dis_res->whatNext = Dis_StopHere;
florianb0c1ed82011-07-30 20:09:28 +000013530 dis_res->continueAt = 0;
sewardj2019a972011-03-07 16:04:07 +000013531 }
13532
13533 if (status == S390_DECODE_OK) return insn_length; /* OK */
13534
13535 /* Decoding failed somehow */
13536 vex_printf("vex s390->IR: ");
13537 switch (status) {
13538 case S390_DECODE_UNKNOWN_INSN:
13539 vex_printf("unknown insn: ");
13540 break;
13541
13542 case S390_DECODE_UNIMPLEMENTED_INSN:
13543 vex_printf("unimplemented insn: ");
13544 break;
13545
13546 case S390_DECODE_UNKNOWN_SPECIAL_INSN:
13547 vex_printf("unimplemented special insn: ");
13548 break;
13549
13550 default:
13551 case S390_DECODE_ERROR:
13552 vex_printf("decoding error: ");
13553 break;
13554 }
13555
13556 vex_printf("%02x%02x", bytes[0], bytes[1]);
13557 if (insn_length > 2) {
13558 vex_printf(" %02x%02x", bytes[2], bytes[3]);
13559 }
13560 if (insn_length > 4) {
13561 vex_printf(" %02x%02x", bytes[4], bytes[5]);
13562 }
13563 vex_printf("\n");
13564
13565 return 0; /* Failed */
13566}
13567
13568
sewardj2019a972011-03-07 16:04:07 +000013569/* Disassemble a single instruction INSN into IR. */
13570static DisResult
florian420c5012011-07-22 02:12:28 +000013571disInstr_S390_WRK(UChar *insn)
sewardj2019a972011-03-07 16:04:07 +000013572{
13573 UChar byte;
13574 UInt insn_length;
13575 DisResult dres;
13576
13577 /* ---------------------------------------------------- */
13578 /* --- Compute instruction length -- */
13579 /* ---------------------------------------------------- */
13580
13581 /* Get the first byte of the insn. */
13582 byte = insn[0];
13583
13584 /* The leftmost two bits (0:1) encode the length of the insn in bytes.
13585 00 -> 2 bytes, 01 -> 4 bytes, 10 -> 4 bytes, 11 -> 6 bytes. */
13586 insn_length = ((((byte >> 6) + 1) >> 1) + 1) << 1;
13587
13588 guest_IA_next_instr = guest_IA_curr_instr + insn_length;
13589
13590 /* ---------------------------------------------------- */
13591 /* --- Initialise the DisResult data -- */
13592 /* ---------------------------------------------------- */
13593 dres.whatNext = Dis_Continue;
13594 dres.len = insn_length;
13595 dres.continueAt = 0;
florian8844a632012-04-13 04:04:06 +000013596 dres.jk_StopHere = Ijk_INVALID;
sewardj2019a972011-03-07 16:04:07 +000013597
floriana99f20e2011-07-17 14:16:41 +000013598 /* fixs390: consider chasing of conditional jumps */
13599
sewardj2019a972011-03-07 16:04:07 +000013600 /* Normal and special instruction handling starts here. */
13601 if (s390_decode_and_irgen(insn, insn_length, &dres) == 0) {
13602 /* All decode failures end up here. The decoder has already issued an
13603 error message.
13604 Tell the dispatcher that this insn cannot be decoded, and so has
florian8844a632012-04-13 04:04:06 +000013605 not been executed, and (is currently) the next to be executed. */
13606 put_IA(mkaddr_expr(guest_IA_curr_instr));
sewardj2019a972011-03-07 16:04:07 +000013607
florian8844a632012-04-13 04:04:06 +000013608 dres.whatNext = Dis_StopHere;
13609 dres.jk_StopHere = Ijk_NoDecode;
13610 dres.continueAt = 0;
13611 dres.len = 0;
13612 } else {
13613 /* Decode success */
13614 switch (dres.whatNext) {
13615 case Dis_Continue:
13616 put_IA(mkaddr_expr(guest_IA_curr_instr));
13617 break;
13618 case Dis_ResteerU:
13619 case Dis_ResteerC:
13620 put_IA(mkaddr_expr(dres.continueAt));
13621 break;
13622 case Dis_StopHere:
13623 break;
13624 default:
13625 vassert(0);
13626 }
sewardj2019a972011-03-07 16:04:07 +000013627 }
13628
13629 return dres;
13630}
13631
13632
13633/*------------------------------------------------------------*/
13634/*--- Top-level fn ---*/
13635/*------------------------------------------------------------*/
13636
13637/* Disassemble a single instruction into IR. The instruction
13638 is located in host memory at &guest_code[delta]. */
13639
13640DisResult
13641disInstr_S390(IRSB *irsb_IN,
sewardj2019a972011-03-07 16:04:07 +000013642 Bool (*resteerOkFn)(void *, Addr64),
13643 Bool resteerCisOk,
13644 void *callback_opaque,
13645 UChar *guest_code,
13646 Long delta,
13647 Addr64 guest_IP,
13648 VexArch guest_arch,
13649 VexArchInfo *archinfo,
13650 VexAbiInfo *abiinfo,
13651 Bool host_bigendian)
13652{
13653 vassert(guest_arch == VexArchS390X);
13654
13655 /* The instruction decoder requires a big-endian machine. */
13656 vassert(host_bigendian == True);
13657
13658 /* Set globals (see top of this file) */
13659 guest_IA_curr_instr = guest_IP;
sewardj2019a972011-03-07 16:04:07 +000013660 irsb = irsb_IN;
florian420c5012011-07-22 02:12:28 +000013661 resteer_fn = resteerOkFn;
13662 resteer_data = callback_opaque;
sewardj2019a972011-03-07 16:04:07 +000013663
florian420c5012011-07-22 02:12:28 +000013664 return disInstr_S390_WRK(guest_code + delta);
sewardj2019a972011-03-07 16:04:07 +000013665}
13666
13667/*---------------------------------------------------------------*/
13668/*--- end guest_s390_toIR.c ---*/
13669/*---------------------------------------------------------------*/