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Chia-I Wu09142132014-08-11 15:42:55 +08001/*
2 * XGL
3 *
4 * Copyright (C) 2014 LunarG, Inc.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included
14 * in all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
22 * DEALINGS IN THE SOFTWARE.
23 */
24
25#ifndef CMD_H
26#define CMD_H
27
28#include "intel.h"
29#include "obj.h"
Chia-I Wub2755562014-08-20 13:38:52 +080030#include "view.h"
31
32struct intel_pipeline;
33struct intel_pipeline_delta;
34struct intel_viewport_state;
35struct intel_raster_state;
36struct intel_msaa_state;
37struct intel_blend_state;
38struct intel_ds_state;
39struct intel_dset;
Courtney Goeltzenleuchterd85c1d62014-08-27 14:04:53 -060040struct intel_pipe_shader;
Chia-I Wub2755562014-08-20 13:38:52 +080041
Chia-I Wu958d1b72014-08-21 11:28:11 +080042struct intel_cmd_reloc;
43
Courtney Goeltzenleuchterd85c1d62014-08-27 14:04:53 -060044struct intel_cmd_shader {
Chia-I Wu338fe642014-08-28 10:43:04 +080045 const struct intel_pipe_shader *shader;
Courtney Goeltzenleuchterd85c1d62014-08-27 14:04:53 -060046 XGL_UINT kernel_pos;
47};
48
Chia-I Wub2755562014-08-20 13:38:52 +080049/*
50 * States bounded to the command buffer. We want to write states directly to
51 * the command buffer when possible, and reduce this struct.
52 */
53struct intel_cmd_bind {
54 struct {
55 const struct intel_pipeline *graphics;
56 const struct intel_pipeline *compute;
57 const struct intel_pipeline_delta *graphics_delta;
58 const struct intel_pipeline_delta *compute_delta;
59 } pipeline;
60
61 struct {
Chia-I Wu338fe642014-08-28 10:43:04 +080062 XGL_UINT count;
63 XGL_UINT used;
64 struct intel_cmd_shader *shaderArray;
Courtney Goeltzenleuchterd85c1d62014-08-27 14:04:53 -060065 } shaderCache;
66
67 struct {
Chia-I Wub2755562014-08-20 13:38:52 +080068 const struct intel_viewport_state *viewport;
69 const struct intel_raster_state *raster;
70 const struct intel_msaa_state *msaa;
71 const struct intel_blend_state *blend;
72 const struct intel_ds_state *ds;
73 } state;
74
75 struct {
76 const struct intel_dset *graphics;
77 XGL_UINT graphics_offset;
78 const struct intel_dset *compute;
79 XGL_UINT compute_offset;
80 } dset;
81
82 struct {
83 struct intel_mem_view graphics;
84 struct intel_mem_view compute;
Chia-I Wu9f1722c2014-08-25 10:17:58 +080085 } dyn_view;
Chia-I Wub2755562014-08-20 13:38:52 +080086
87 struct {
88 const struct intel_mem *mem;
89 XGL_GPU_SIZE offset;
90 XGL_INDEX_TYPE type;
91 } index;
92
93 struct {
94 const struct intel_rt_view *rt[XGL_MAX_COLOR_ATTACHMENTS];
95 XGL_UINT rt_count;
96
97 const struct intel_ds_view *ds;
98 } att;
Chia-I Wu48c283d2014-08-25 23:13:46 +080099
Chia-I Wu707a29e2014-08-27 12:51:47 +0800100 XGL_UINT draw_count;
Chia-I Wu48c283d2014-08-25 23:13:46 +0800101 uint32_t wa_flags;
Chia-I Wub2755562014-08-20 13:38:52 +0800102};
Chia-I Wu09142132014-08-11 15:42:55 +0800103
Chia-I Wue24c3292014-08-21 14:05:23 +0800104struct intel_cmd_writer {
105 struct intel_bo *bo;
106 void *ptr_opaque;
107
108 /* in DWords */
109 XGL_UINT size;
110 XGL_UINT used;
111};
112
Chia-I Wu730e5362014-08-19 12:15:09 +0800113struct intel_cmd {
114 struct intel_obj obj;
115
116 struct intel_dev *dev;
Chia-I Wu0b784442014-08-25 22:54:16 +0800117 struct intel_bo *scratch_bo;
Chia-I Wu63883292014-08-25 13:50:26 +0800118 int pipeline_select;
Chia-I Wu730e5362014-08-19 12:15:09 +0800119
Chia-I Wu343b1372014-08-20 16:39:20 +0800120 struct intel_cmd_reloc *relocs;
121 XGL_UINT reloc_count;
122
Chia-I Wu730e5362014-08-19 12:15:09 +0800123 XGL_FLAGS flags;
124
Chia-I Wue24c3292014-08-21 14:05:23 +0800125 struct intel_cmd_writer batch;
Chia-I Wu24565ee2014-08-21 20:24:31 +0800126 struct intel_cmd_writer state;
Chia-I Wu1cbc0052014-08-25 09:50:12 +0800127 struct intel_cmd_writer kernel;
Chia-I Wu730e5362014-08-19 12:15:09 +0800128
Chia-I Wu343b1372014-08-20 16:39:20 +0800129 XGL_UINT reloc_used;
Chia-I Wu04966702014-08-20 15:05:03 +0800130 XGL_RESULT result;
Chia-I Wub2755562014-08-20 13:38:52 +0800131
132 struct intel_cmd_bind bind;
Chia-I Wu730e5362014-08-19 12:15:09 +0800133};
134
135static inline struct intel_cmd *intel_cmd(XGL_CMD_BUFFER cmd)
136{
137 return (struct intel_cmd *) cmd;
138}
139
140static inline struct intel_cmd *intel_cmd_from_obj(struct intel_obj *obj)
141{
142 return (struct intel_cmd *) obj;
143}
144
145XGL_RESULT intel_cmd_create(struct intel_dev *dev,
146 const XGL_CMD_BUFFER_CREATE_INFO *info,
147 struct intel_cmd **cmd_ret);
148void intel_cmd_destroy(struct intel_cmd *cmd);
149
150XGL_RESULT intel_cmd_begin(struct intel_cmd *cmd, XGL_FLAGS flags);
151XGL_RESULT intel_cmd_end(struct intel_cmd *cmd);
152
Chia-I Wue24c3292014-08-21 14:05:23 +0800153static inline struct intel_bo *intel_cmd_get_batch(const struct intel_cmd *cmd,
154 XGL_GPU_SIZE *used)
155{
156 const struct intel_cmd_writer *writer = &cmd->batch;
157
158 if (used)
159 *used = sizeof(uint32_t) * writer->used;
160
161 return writer->bo;
162}
163
Chia-I Wu09142132014-08-11 15:42:55 +0800164XGL_RESULT XGLAPI intelCreateCommandBuffer(
165 XGL_DEVICE device,
166 const XGL_CMD_BUFFER_CREATE_INFO* pCreateInfo,
167 XGL_CMD_BUFFER* pCmdBuffer);
168
169XGL_RESULT XGLAPI intelBeginCommandBuffer(
170 XGL_CMD_BUFFER cmdBuffer,
171 XGL_FLAGS flags);
172
173XGL_RESULT XGLAPI intelEndCommandBuffer(
174 XGL_CMD_BUFFER cmdBuffer);
175
176XGL_RESULT XGLAPI intelResetCommandBuffer(
177 XGL_CMD_BUFFER cmdBuffer);
178
179XGL_VOID XGLAPI intelCmdBindPipeline(
180 XGL_CMD_BUFFER cmdBuffer,
181 XGL_PIPELINE_BIND_POINT pipelineBindPoint,
182 XGL_PIPELINE pipeline);
183
184XGL_VOID XGLAPI intelCmdBindPipelineDelta(
185 XGL_CMD_BUFFER cmdBuffer,
186 XGL_PIPELINE_BIND_POINT pipelineBindPoint,
187 XGL_PIPELINE_DELTA delta);
188
189XGL_VOID XGLAPI intelCmdBindStateObject(
190 XGL_CMD_BUFFER cmdBuffer,
191 XGL_STATE_BIND_POINT stateBindPoint,
192 XGL_STATE_OBJECT state);
193
194XGL_VOID XGLAPI intelCmdBindDescriptorSet(
195 XGL_CMD_BUFFER cmdBuffer,
196 XGL_PIPELINE_BIND_POINT pipelineBindPoint,
197 XGL_UINT index,
198 XGL_DESCRIPTOR_SET descriptorSet,
199 XGL_UINT slotOffset);
200
201XGL_VOID XGLAPI intelCmdBindDynamicMemoryView(
202 XGL_CMD_BUFFER cmdBuffer,
203 XGL_PIPELINE_BIND_POINT pipelineBindPoint,
204 const XGL_MEMORY_VIEW_ATTACH_INFO* pMemView);
205
206XGL_VOID XGLAPI intelCmdBindIndexData(
207 XGL_CMD_BUFFER cmdBuffer,
208 XGL_GPU_MEMORY mem,
209 XGL_GPU_SIZE offset,
210 XGL_INDEX_TYPE indexType);
211
212XGL_VOID XGLAPI intelCmdBindAttachments(
213 XGL_CMD_BUFFER cmdBuffer,
214 XGL_UINT colorAttachmentCount,
215 const XGL_COLOR_ATTACHMENT_BIND_INFO* pColorAttachments,
216 const XGL_DEPTH_STENCIL_BIND_INFO* pDepthStencilAttachment);
217
218XGL_VOID XGLAPI intelCmdPrepareMemoryRegions(
219 XGL_CMD_BUFFER cmdBuffer,
220 XGL_UINT transitionCount,
221 const XGL_MEMORY_STATE_TRANSITION* pStateTransitions);
222
223XGL_VOID XGLAPI intelCmdPrepareImages(
224 XGL_CMD_BUFFER cmdBuffer,
225 XGL_UINT transitionCount,
226 const XGL_IMAGE_STATE_TRANSITION* pStateTransitions);
227
228XGL_VOID XGLAPI intelCmdDraw(
229 XGL_CMD_BUFFER cmdBuffer,
230 XGL_UINT firstVertex,
231 XGL_UINT vertexCount,
232 XGL_UINT firstInstance,
233 XGL_UINT instanceCount);
234
235XGL_VOID XGLAPI intelCmdDrawIndexed(
236 XGL_CMD_BUFFER cmdBuffer,
237 XGL_UINT firstIndex,
238 XGL_UINT indexCount,
239 XGL_INT vertexOffset,
240 XGL_UINT firstInstance,
241 XGL_UINT instanceCount);
242
243XGL_VOID XGLAPI intelCmdDrawIndirect(
244 XGL_CMD_BUFFER cmdBuffer,
245 XGL_GPU_MEMORY mem,
246 XGL_GPU_SIZE offset,
247 XGL_UINT32 count,
248 XGL_UINT32 stride);
249
250XGL_VOID XGLAPI intelCmdDrawIndexedIndirect(
251 XGL_CMD_BUFFER cmdBuffer,
252 XGL_GPU_MEMORY mem,
253 XGL_GPU_SIZE offset,
254 XGL_UINT32 count,
255 XGL_UINT32 stride);
256
257XGL_VOID XGLAPI intelCmdDispatch(
258 XGL_CMD_BUFFER cmdBuffer,
259 XGL_UINT x,
260 XGL_UINT y,
261 XGL_UINT z);
262
263XGL_VOID XGLAPI intelCmdDispatchIndirect(
264 XGL_CMD_BUFFER cmdBuffer,
265 XGL_GPU_MEMORY mem,
266 XGL_GPU_SIZE offset);
267
268XGL_VOID XGLAPI intelCmdCopyMemory(
269 XGL_CMD_BUFFER cmdBuffer,
270 XGL_GPU_MEMORY srcMem,
271 XGL_GPU_MEMORY destMem,
272 XGL_UINT regionCount,
273 const XGL_MEMORY_COPY* pRegions);
274
275XGL_VOID XGLAPI intelCmdCopyImage(
276 XGL_CMD_BUFFER cmdBuffer,
277 XGL_IMAGE srcImage,
278 XGL_IMAGE destImage,
279 XGL_UINT regionCount,
280 const XGL_IMAGE_COPY* pRegions);
281
282XGL_VOID XGLAPI intelCmdCopyMemoryToImage(
283 XGL_CMD_BUFFER cmdBuffer,
284 XGL_GPU_MEMORY srcMem,
285 XGL_IMAGE destImage,
286 XGL_UINT regionCount,
287 const XGL_MEMORY_IMAGE_COPY* pRegions);
288
289XGL_VOID XGLAPI intelCmdCopyImageToMemory(
290 XGL_CMD_BUFFER cmdBuffer,
291 XGL_IMAGE srcImage,
292 XGL_GPU_MEMORY destMem,
293 XGL_UINT regionCount,
294 const XGL_MEMORY_IMAGE_COPY* pRegions);
295
296XGL_VOID XGLAPI intelCmdCloneImageData(
297 XGL_CMD_BUFFER cmdBuffer,
298 XGL_IMAGE srcImage,
299 XGL_IMAGE_STATE srcImageState,
300 XGL_IMAGE destImage,
301 XGL_IMAGE_STATE destImageState);
302
303XGL_VOID XGLAPI intelCmdUpdateMemory(
304 XGL_CMD_BUFFER cmdBuffer,
305 XGL_GPU_MEMORY destMem,
306 XGL_GPU_SIZE destOffset,
307 XGL_GPU_SIZE dataSize,
308 const XGL_UINT32* pData);
309
310XGL_VOID XGLAPI intelCmdFillMemory(
311 XGL_CMD_BUFFER cmdBuffer,
312 XGL_GPU_MEMORY destMem,
313 XGL_GPU_SIZE destOffset,
314 XGL_GPU_SIZE fillSize,
315 XGL_UINT32 data);
316
317XGL_VOID XGLAPI intelCmdClearColorImage(
318 XGL_CMD_BUFFER cmdBuffer,
319 XGL_IMAGE image,
320 const XGL_FLOAT color[4],
321 XGL_UINT rangeCount,
322 const XGL_IMAGE_SUBRESOURCE_RANGE* pRanges);
323
324XGL_VOID XGLAPI intelCmdClearColorImageRaw(
325 XGL_CMD_BUFFER cmdBuffer,
326 XGL_IMAGE image,
327 const XGL_UINT32 color[4],
328 XGL_UINT rangeCount,
329 const XGL_IMAGE_SUBRESOURCE_RANGE* pRanges);
330
331XGL_VOID XGLAPI intelCmdClearDepthStencil(
332 XGL_CMD_BUFFER cmdBuffer,
333 XGL_IMAGE image,
334 XGL_FLOAT depth,
335 XGL_UINT32 stencil,
336 XGL_UINT rangeCount,
337 const XGL_IMAGE_SUBRESOURCE_RANGE* pRanges);
338
339XGL_VOID XGLAPI intelCmdResolveImage(
340 XGL_CMD_BUFFER cmdBuffer,
341 XGL_IMAGE srcImage,
342 XGL_IMAGE destImage,
343 XGL_UINT rectCount,
344 const XGL_IMAGE_RESOLVE* pRects);
345
346XGL_VOID XGLAPI intelCmdSetEvent(
347 XGL_CMD_BUFFER cmdBuffer,
348 XGL_EVENT event);
349
350XGL_VOID XGLAPI intelCmdResetEvent(
351 XGL_CMD_BUFFER cmdBuffer,
352 XGL_EVENT event);
353
354XGL_VOID XGLAPI intelCmdMemoryAtomic(
355 XGL_CMD_BUFFER cmdBuffer,
356 XGL_GPU_MEMORY destMem,
357 XGL_GPU_SIZE destOffset,
358 XGL_UINT64 srcData,
359 XGL_ATOMIC_OP atomicOp);
360
361XGL_VOID XGLAPI intelCmdBeginQuery(
362 XGL_CMD_BUFFER cmdBuffer,
363 XGL_QUERY_POOL queryPool,
364 XGL_UINT slot,
365 XGL_FLAGS flags);
366
367XGL_VOID XGLAPI intelCmdEndQuery(
368 XGL_CMD_BUFFER cmdBuffer,
369 XGL_QUERY_POOL queryPool,
370 XGL_UINT slot);
371
372XGL_VOID XGLAPI intelCmdResetQueryPool(
373 XGL_CMD_BUFFER cmdBuffer,
374 XGL_QUERY_POOL queryPool,
375 XGL_UINT startQuery,
376 XGL_UINT queryCount);
377
378XGL_VOID XGLAPI intelCmdWriteTimestamp(
379 XGL_CMD_BUFFER cmdBuffer,
380 XGL_TIMESTAMP_TYPE timestampType,
381 XGL_GPU_MEMORY destMem,
382 XGL_GPU_SIZE destOffset);
383
384XGL_VOID XGLAPI intelCmdInitAtomicCounters(
385 XGL_CMD_BUFFER cmdBuffer,
386 XGL_PIPELINE_BIND_POINT pipelineBindPoint,
387 XGL_UINT startCounter,
388 XGL_UINT counterCount,
389 const XGL_UINT32* pData);
390
391XGL_VOID XGLAPI intelCmdLoadAtomicCounters(
392 XGL_CMD_BUFFER cmdBuffer,
393 XGL_PIPELINE_BIND_POINT pipelineBindPoint,
394 XGL_UINT startCounter,
395 XGL_UINT counterCount,
396 XGL_GPU_MEMORY srcMem,
397 XGL_GPU_SIZE srcOffset);
398
399XGL_VOID XGLAPI intelCmdSaveAtomicCounters(
400 XGL_CMD_BUFFER cmdBuffer,
401 XGL_PIPELINE_BIND_POINT pipelineBindPoint,
402 XGL_UINT startCounter,
403 XGL_UINT counterCount,
404 XGL_GPU_MEMORY destMem,
405 XGL_GPU_SIZE destOffset);
406
407XGL_VOID XGLAPI intelCmdDbgMarkerBegin(
408 XGL_CMD_BUFFER cmdBuffer,
409 const XGL_CHAR* pMarker);
410
411XGL_VOID XGLAPI intelCmdDbgMarkerEnd(
412 XGL_CMD_BUFFER cmdBuffer);
413
414#endif /* CMD_H */